OZE_Main.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 00000298 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0002d210 080002a0 080002a0 000012a0 2**4
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00004eac 0802d4b0 0802d4b0 0002e4b0 2**3
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM 00000008 0803235c 0803235c 0003335c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
4 .init_array 00000004 08032364 08032364 00033364 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .fini_array 00000004 08032368 08032368 00033368 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
6 .data 00000224 24000000 0803236c 00034000 2**2
CONTENTS, ALLOC, LOAD, DATA
7 .bss 0002b084 24000224 08032590 00034224 2**2
ALLOC
8 ._user_heap_stack 00000600 2402b2a8 08032590 000342a8 2**0
ALLOC
9 .lwip_sec 000192db 2402b8a8 08032590 000348a8 2**2
ALLOC
10 .ARM.attributes 0000002e 00000000 00000000 00034224 2**0
CONTENTS, READONLY
11 .debug_info 00052728 00000000 00000000 00034252 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
12 .debug_abbrev 0000b925 00000000 00000000 0008697a 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_aranges 00003890 00000000 00000000 000922a0 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_rnglists 00002d2b 00000000 00000000 00095b30 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_macro 0004f916 00000000 00000000 0009885b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_line 00058d59 00000000 00000000 000e8171 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_str 0018f269 00000000 00000000 00140eca 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .comment 00000043 00000000 00000000 002d0133 2**0
CONTENTS, READONLY
19 .debug_frame 0000fd04 00000000 00000000 002d0178 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
20 .debug_line_str 00000064 00000000 00000000 002dfe7c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
080002a0 <__do_global_dtors_aux>:
80002a0: b510 push {r4, lr}
80002a2: 4c05 ldr r4, [pc, #20] @ (80002b8 <__do_global_dtors_aux+0x18>)
80002a4: 7823 ldrb r3, [r4, #0]
80002a6: b933 cbnz r3, 80002b6 <__do_global_dtors_aux+0x16>
80002a8: 4b04 ldr r3, [pc, #16] @ (80002bc <__do_global_dtors_aux+0x1c>)
80002aa: b113 cbz r3, 80002b2 <__do_global_dtors_aux+0x12>
80002ac: 4804 ldr r0, [pc, #16] @ (80002c0 <__do_global_dtors_aux+0x20>)
80002ae: f3af 8000 nop.w
80002b2: 2301 movs r3, #1
80002b4: 7023 strb r3, [r4, #0]
80002b6: bd10 pop {r4, pc}
80002b8: 24000224 .word 0x24000224
80002bc: 00000000 .word 0x00000000
80002c0: 0802d498 .word 0x0802d498
080002c4 <frame_dummy>:
80002c4: b508 push {r3, lr}
80002c6: 4b03 ldr r3, [pc, #12] @ (80002d4 <frame_dummy+0x10>)
80002c8: b11b cbz r3, 80002d2 <frame_dummy+0xe>
80002ca: 4903 ldr r1, [pc, #12] @ (80002d8 <frame_dummy+0x14>)
80002cc: 4803 ldr r0, [pc, #12] @ (80002dc <frame_dummy+0x18>)
80002ce: f3af 8000 nop.w
80002d2: bd08 pop {r3, pc}
80002d4: 00000000 .word 0x00000000
80002d8: 24000228 .word 0x24000228
80002dc: 0802d498 .word 0x0802d498
080002e0 <strcmp>:
80002e0: f810 2b01 ldrb.w r2, [r0], #1
80002e4: f811 3b01 ldrb.w r3, [r1], #1
80002e8: 2a01 cmp r2, #1
80002ea: bf28 it cs
80002ec: 429a cmpcs r2, r3
80002ee: d0f7 beq.n 80002e0 <strcmp>
80002f0: 1ad0 subs r0, r2, r3
80002f2: 4770 bx lr
...
08000300 <memchr>:
8000300: f001 01ff and.w r1, r1, #255 @ 0xff
8000304: 2a10 cmp r2, #16
8000306: db2b blt.n 8000360 <memchr+0x60>
8000308: f010 0f07 tst.w r0, #7
800030c: d008 beq.n 8000320 <memchr+0x20>
800030e: f810 3b01 ldrb.w r3, [r0], #1
8000312: 3a01 subs r2, #1
8000314: 428b cmp r3, r1
8000316: d02d beq.n 8000374 <memchr+0x74>
8000318: f010 0f07 tst.w r0, #7
800031c: b342 cbz r2, 8000370 <memchr+0x70>
800031e: d1f6 bne.n 800030e <memchr+0xe>
8000320: b4f0 push {r4, r5, r6, r7}
8000322: ea41 2101 orr.w r1, r1, r1, lsl #8
8000326: ea41 4101 orr.w r1, r1, r1, lsl #16
800032a: f022 0407 bic.w r4, r2, #7
800032e: f07f 0700 mvns.w r7, #0
8000332: 2300 movs r3, #0
8000334: e8f0 5602 ldrd r5, r6, [r0], #8
8000338: 3c08 subs r4, #8
800033a: ea85 0501 eor.w r5, r5, r1
800033e: ea86 0601 eor.w r6, r6, r1
8000342: fa85 f547 uadd8 r5, r5, r7
8000346: faa3 f587 sel r5, r3, r7
800034a: fa86 f647 uadd8 r6, r6, r7
800034e: faa5 f687 sel r6, r5, r7
8000352: b98e cbnz r6, 8000378 <memchr+0x78>
8000354: d1ee bne.n 8000334 <memchr+0x34>
8000356: bcf0 pop {r4, r5, r6, r7}
8000358: f001 01ff and.w r1, r1, #255 @ 0xff
800035c: f002 0207 and.w r2, r2, #7
8000360: b132 cbz r2, 8000370 <memchr+0x70>
8000362: f810 3b01 ldrb.w r3, [r0], #1
8000366: 3a01 subs r2, #1
8000368: ea83 0301 eor.w r3, r3, r1
800036c: b113 cbz r3, 8000374 <memchr+0x74>
800036e: d1f8 bne.n 8000362 <memchr+0x62>
8000370: 2000 movs r0, #0
8000372: 4770 bx lr
8000374: 3801 subs r0, #1
8000376: 4770 bx lr
8000378: 2d00 cmp r5, #0
800037a: bf06 itte eq
800037c: 4635 moveq r5, r6
800037e: 3803 subeq r0, #3
8000380: 3807 subne r0, #7
8000382: f015 0f01 tst.w r5, #1
8000386: d107 bne.n 8000398 <memchr+0x98>
8000388: 3001 adds r0, #1
800038a: f415 7f80 tst.w r5, #256 @ 0x100
800038e: bf02 ittt eq
8000390: 3001 addeq r0, #1
8000392: f415 3fc0 tsteq.w r5, #98304 @ 0x18000
8000396: 3001 addeq r0, #1
8000398: bcf0 pop {r4, r5, r6, r7}
800039a: 3801 subs r0, #1
800039c: 4770 bx lr
800039e: bf00 nop
080003a0 <strlen>:
80003a0: 4603 mov r3, r0
80003a2: f813 2b01 ldrb.w r2, [r3], #1
80003a6: 2a00 cmp r2, #0
80003a8: d1fb bne.n 80003a2 <strlen+0x2>
80003aa: 1a18 subs r0, r3, r0
80003ac: 3801 subs r0, #1
80003ae: 4770 bx lr
080003b0 <__aeabi_drsub>:
80003b0: f081 4100 eor.w r1, r1, #2147483648 @ 0x80000000
80003b4: e002 b.n 80003bc <__adddf3>
80003b6: bf00 nop
080003b8 <__aeabi_dsub>:
80003b8: f083 4300 eor.w r3, r3, #2147483648 @ 0x80000000
080003bc <__adddf3>:
80003bc: b530 push {r4, r5, lr}
80003be: ea4f 0441 mov.w r4, r1, lsl #1
80003c2: ea4f 0543 mov.w r5, r3, lsl #1
80003c6: ea94 0f05 teq r4, r5
80003ca: bf08 it eq
80003cc: ea90 0f02 teqeq r0, r2
80003d0: bf1f itttt ne
80003d2: ea54 0c00 orrsne.w ip, r4, r0
80003d6: ea55 0c02 orrsne.w ip, r5, r2
80003da: ea7f 5c64 mvnsne.w ip, r4, asr #21
80003de: ea7f 5c65 mvnsne.w ip, r5, asr #21
80003e2: f000 80e2 beq.w 80005aa <__adddf3+0x1ee>
80003e6: ea4f 5454 mov.w r4, r4, lsr #21
80003ea: ebd4 5555 rsbs r5, r4, r5, lsr #21
80003ee: bfb8 it lt
80003f0: 426d neglt r5, r5
80003f2: dd0c ble.n 800040e <__adddf3+0x52>
80003f4: 442c add r4, r5
80003f6: ea80 0202 eor.w r2, r0, r2
80003fa: ea81 0303 eor.w r3, r1, r3
80003fe: ea82 0000 eor.w r0, r2, r0
8000402: ea83 0101 eor.w r1, r3, r1
8000406: ea80 0202 eor.w r2, r0, r2
800040a: ea81 0303 eor.w r3, r1, r3
800040e: 2d36 cmp r5, #54 @ 0x36
8000410: bf88 it hi
8000412: bd30 pophi {r4, r5, pc}
8000414: f011 4f00 tst.w r1, #2147483648 @ 0x80000000
8000418: ea4f 3101 mov.w r1, r1, lsl #12
800041c: f44f 1c80 mov.w ip, #1048576 @ 0x100000
8000420: ea4c 3111 orr.w r1, ip, r1, lsr #12
8000424: d002 beq.n 800042c <__adddf3+0x70>
8000426: 4240 negs r0, r0
8000428: eb61 0141 sbc.w r1, r1, r1, lsl #1
800042c: f013 4f00 tst.w r3, #2147483648 @ 0x80000000
8000430: ea4f 3303 mov.w r3, r3, lsl #12
8000434: ea4c 3313 orr.w r3, ip, r3, lsr #12
8000438: d002 beq.n 8000440 <__adddf3+0x84>
800043a: 4252 negs r2, r2
800043c: eb63 0343 sbc.w r3, r3, r3, lsl #1
8000440: ea94 0f05 teq r4, r5
8000444: f000 80a7 beq.w 8000596 <__adddf3+0x1da>
8000448: f1a4 0401 sub.w r4, r4, #1
800044c: f1d5 0e20 rsbs lr, r5, #32
8000450: db0d blt.n 800046e <__adddf3+0xb2>
8000452: fa02 fc0e lsl.w ip, r2, lr
8000456: fa22 f205 lsr.w r2, r2, r5
800045a: 1880 adds r0, r0, r2
800045c: f141 0100 adc.w r1, r1, #0
8000460: fa03 f20e lsl.w r2, r3, lr
8000464: 1880 adds r0, r0, r2
8000466: fa43 f305 asr.w r3, r3, r5
800046a: 4159 adcs r1, r3
800046c: e00e b.n 800048c <__adddf3+0xd0>
800046e: f1a5 0520 sub.w r5, r5, #32
8000472: f10e 0e20 add.w lr, lr, #32
8000476: 2a01 cmp r2, #1
8000478: fa03 fc0e lsl.w ip, r3, lr
800047c: bf28 it cs
800047e: f04c 0c02 orrcs.w ip, ip, #2
8000482: fa43 f305 asr.w r3, r3, r5
8000486: 18c0 adds r0, r0, r3
8000488: eb51 71e3 adcs.w r1, r1, r3, asr #31
800048c: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000
8000490: d507 bpl.n 80004a2 <__adddf3+0xe6>
8000492: f04f 0e00 mov.w lr, #0
8000496: f1dc 0c00 rsbs ip, ip, #0
800049a: eb7e 0000 sbcs.w r0, lr, r0
800049e: eb6e 0101 sbc.w r1, lr, r1
80004a2: f5b1 1f80 cmp.w r1, #1048576 @ 0x100000
80004a6: d31b bcc.n 80004e0 <__adddf3+0x124>
80004a8: f5b1 1f00 cmp.w r1, #2097152 @ 0x200000
80004ac: d30c bcc.n 80004c8 <__adddf3+0x10c>
80004ae: 0849 lsrs r1, r1, #1
80004b0: ea5f 0030 movs.w r0, r0, rrx
80004b4: ea4f 0c3c mov.w ip, ip, rrx
80004b8: f104 0401 add.w r4, r4, #1
80004bc: ea4f 5244 mov.w r2, r4, lsl #21
80004c0: f512 0f80 cmn.w r2, #4194304 @ 0x400000
80004c4: f080 809a bcs.w 80005fc <__adddf3+0x240>
80004c8: f1bc 4f00 cmp.w ip, #2147483648 @ 0x80000000
80004cc: bf08 it eq
80004ce: ea5f 0c50 movseq.w ip, r0, lsr #1
80004d2: f150 0000 adcs.w r0, r0, #0
80004d6: eb41 5104 adc.w r1, r1, r4, lsl #20
80004da: ea41 0105 orr.w r1, r1, r5
80004de: bd30 pop {r4, r5, pc}
80004e0: ea5f 0c4c movs.w ip, ip, lsl #1
80004e4: 4140 adcs r0, r0
80004e6: eb41 0101 adc.w r1, r1, r1
80004ea: 3c01 subs r4, #1
80004ec: bf28 it cs
80004ee: f5b1 1f80 cmpcs.w r1, #1048576 @ 0x100000
80004f2: d2e9 bcs.n 80004c8 <__adddf3+0x10c>
80004f4: f091 0f00 teq r1, #0
80004f8: bf04 itt eq
80004fa: 4601 moveq r1, r0
80004fc: 2000 moveq r0, #0
80004fe: fab1 f381 clz r3, r1
8000502: bf08 it eq
8000504: 3320 addeq r3, #32
8000506: f1a3 030b sub.w r3, r3, #11
800050a: f1b3 0220 subs.w r2, r3, #32
800050e: da0c bge.n 800052a <__adddf3+0x16e>
8000510: 320c adds r2, #12
8000512: dd08 ble.n 8000526 <__adddf3+0x16a>
8000514: f102 0c14 add.w ip, r2, #20
8000518: f1c2 020c rsb r2, r2, #12
800051c: fa01 f00c lsl.w r0, r1, ip
8000520: fa21 f102 lsr.w r1, r1, r2
8000524: e00c b.n 8000540 <__adddf3+0x184>
8000526: f102 0214 add.w r2, r2, #20
800052a: bfd8 it le
800052c: f1c2 0c20 rsble ip, r2, #32
8000530: fa01 f102 lsl.w r1, r1, r2
8000534: fa20 fc0c lsr.w ip, r0, ip
8000538: bfdc itt le
800053a: ea41 010c orrle.w r1, r1, ip
800053e: 4090 lslle r0, r2
8000540: 1ae4 subs r4, r4, r3
8000542: bfa2 ittt ge
8000544: eb01 5104 addge.w r1, r1, r4, lsl #20
8000548: 4329 orrge r1, r5
800054a: bd30 popge {r4, r5, pc}
800054c: ea6f 0404 mvn.w r4, r4
8000550: 3c1f subs r4, #31
8000552: da1c bge.n 800058e <__adddf3+0x1d2>
8000554: 340c adds r4, #12
8000556: dc0e bgt.n 8000576 <__adddf3+0x1ba>
8000558: f104 0414 add.w r4, r4, #20
800055c: f1c4 0220 rsb r2, r4, #32
8000560: fa20 f004 lsr.w r0, r0, r4
8000564: fa01 f302 lsl.w r3, r1, r2
8000568: ea40 0003 orr.w r0, r0, r3
800056c: fa21 f304 lsr.w r3, r1, r4
8000570: ea45 0103 orr.w r1, r5, r3
8000574: bd30 pop {r4, r5, pc}
8000576: f1c4 040c rsb r4, r4, #12
800057a: f1c4 0220 rsb r2, r4, #32
800057e: fa20 f002 lsr.w r0, r0, r2
8000582: fa01 f304 lsl.w r3, r1, r4
8000586: ea40 0003 orr.w r0, r0, r3
800058a: 4629 mov r1, r5
800058c: bd30 pop {r4, r5, pc}
800058e: fa21 f004 lsr.w r0, r1, r4
8000592: 4629 mov r1, r5
8000594: bd30 pop {r4, r5, pc}
8000596: f094 0f00 teq r4, #0
800059a: f483 1380 eor.w r3, r3, #1048576 @ 0x100000
800059e: bf06 itte eq
80005a0: f481 1180 eoreq.w r1, r1, #1048576 @ 0x100000
80005a4: 3401 addeq r4, #1
80005a6: 3d01 subne r5, #1
80005a8: e74e b.n 8000448 <__adddf3+0x8c>
80005aa: ea7f 5c64 mvns.w ip, r4, asr #21
80005ae: bf18 it ne
80005b0: ea7f 5c65 mvnsne.w ip, r5, asr #21
80005b4: d029 beq.n 800060a <__adddf3+0x24e>
80005b6: ea94 0f05 teq r4, r5
80005ba: bf08 it eq
80005bc: ea90 0f02 teqeq r0, r2
80005c0: d005 beq.n 80005ce <__adddf3+0x212>
80005c2: ea54 0c00 orrs.w ip, r4, r0
80005c6: bf04 itt eq
80005c8: 4619 moveq r1, r3
80005ca: 4610 moveq r0, r2
80005cc: bd30 pop {r4, r5, pc}
80005ce: ea91 0f03 teq r1, r3
80005d2: bf1e ittt ne
80005d4: 2100 movne r1, #0
80005d6: 2000 movne r0, #0
80005d8: bd30 popne {r4, r5, pc}
80005da: ea5f 5c54 movs.w ip, r4, lsr #21
80005de: d105 bne.n 80005ec <__adddf3+0x230>
80005e0: 0040 lsls r0, r0, #1
80005e2: 4149 adcs r1, r1
80005e4: bf28 it cs
80005e6: f041 4100 orrcs.w r1, r1, #2147483648 @ 0x80000000
80005ea: bd30 pop {r4, r5, pc}
80005ec: f514 0480 adds.w r4, r4, #4194304 @ 0x400000
80005f0: bf3c itt cc
80005f2: f501 1180 addcc.w r1, r1, #1048576 @ 0x100000
80005f6: bd30 popcc {r4, r5, pc}
80005f8: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000
80005fc: f045 41fe orr.w r1, r5, #2130706432 @ 0x7f000000
8000600: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000
8000604: f04f 0000 mov.w r0, #0
8000608: bd30 pop {r4, r5, pc}
800060a: ea7f 5c64 mvns.w ip, r4, asr #21
800060e: bf1a itte ne
8000610: 4619 movne r1, r3
8000612: 4610 movne r0, r2
8000614: ea7f 5c65 mvnseq.w ip, r5, asr #21
8000618: bf1c itt ne
800061a: 460b movne r3, r1
800061c: 4602 movne r2, r0
800061e: ea50 3401 orrs.w r4, r0, r1, lsl #12
8000622: bf06 itte eq
8000624: ea52 3503 orrseq.w r5, r2, r3, lsl #12
8000628: ea91 0f03 teqeq r1, r3
800062c: f441 2100 orrne.w r1, r1, #524288 @ 0x80000
8000630: bd30 pop {r4, r5, pc}
8000632: bf00 nop
08000634 <__aeabi_ui2d>:
8000634: f090 0f00 teq r0, #0
8000638: bf04 itt eq
800063a: 2100 moveq r1, #0
800063c: 4770 bxeq lr
800063e: b530 push {r4, r5, lr}
8000640: f44f 6480 mov.w r4, #1024 @ 0x400
8000644: f104 0432 add.w r4, r4, #50 @ 0x32
8000648: f04f 0500 mov.w r5, #0
800064c: f04f 0100 mov.w r1, #0
8000650: e750 b.n 80004f4 <__adddf3+0x138>
8000652: bf00 nop
08000654 <__aeabi_i2d>:
8000654: f090 0f00 teq r0, #0
8000658: bf04 itt eq
800065a: 2100 moveq r1, #0
800065c: 4770 bxeq lr
800065e: b530 push {r4, r5, lr}
8000660: f44f 6480 mov.w r4, #1024 @ 0x400
8000664: f104 0432 add.w r4, r4, #50 @ 0x32
8000668: f010 4500 ands.w r5, r0, #2147483648 @ 0x80000000
800066c: bf48 it mi
800066e: 4240 negmi r0, r0
8000670: f04f 0100 mov.w r1, #0
8000674: e73e b.n 80004f4 <__adddf3+0x138>
8000676: bf00 nop
08000678 <__aeabi_f2d>:
8000678: 0042 lsls r2, r0, #1
800067a: ea4f 01e2 mov.w r1, r2, asr #3
800067e: ea4f 0131 mov.w r1, r1, rrx
8000682: ea4f 7002 mov.w r0, r2, lsl #28
8000686: bf1f itttt ne
8000688: f012 437f andsne.w r3, r2, #4278190080 @ 0xff000000
800068c: f093 4f7f teqne r3, #4278190080 @ 0xff000000
8000690: f081 5160 eorne.w r1, r1, #939524096 @ 0x38000000
8000694: 4770 bxne lr
8000696: f032 427f bics.w r2, r2, #4278190080 @ 0xff000000
800069a: bf08 it eq
800069c: 4770 bxeq lr
800069e: f093 4f7f teq r3, #4278190080 @ 0xff000000
80006a2: bf04 itt eq
80006a4: f441 2100 orreq.w r1, r1, #524288 @ 0x80000
80006a8: 4770 bxeq lr
80006aa: b530 push {r4, r5, lr}
80006ac: f44f 7460 mov.w r4, #896 @ 0x380
80006b0: f001 4500 and.w r5, r1, #2147483648 @ 0x80000000
80006b4: f021 4100 bic.w r1, r1, #2147483648 @ 0x80000000
80006b8: e71c b.n 80004f4 <__adddf3+0x138>
80006ba: bf00 nop
080006bc <__aeabi_ul2d>:
80006bc: ea50 0201 orrs.w r2, r0, r1
80006c0: bf08 it eq
80006c2: 4770 bxeq lr
80006c4: b530 push {r4, r5, lr}
80006c6: f04f 0500 mov.w r5, #0
80006ca: e00a b.n 80006e2 <__aeabi_l2d+0x16>
080006cc <__aeabi_l2d>:
80006cc: ea50 0201 orrs.w r2, r0, r1
80006d0: bf08 it eq
80006d2: 4770 bxeq lr
80006d4: b530 push {r4, r5, lr}
80006d6: f011 4500 ands.w r5, r1, #2147483648 @ 0x80000000
80006da: d502 bpl.n 80006e2 <__aeabi_l2d+0x16>
80006dc: 4240 negs r0, r0
80006de: eb61 0141 sbc.w r1, r1, r1, lsl #1
80006e2: f44f 6480 mov.w r4, #1024 @ 0x400
80006e6: f104 0432 add.w r4, r4, #50 @ 0x32
80006ea: ea5f 5c91 movs.w ip, r1, lsr #22
80006ee: f43f aed8 beq.w 80004a2 <__adddf3+0xe6>
80006f2: f04f 0203 mov.w r2, #3
80006f6: ea5f 0cdc movs.w ip, ip, lsr #3
80006fa: bf18 it ne
80006fc: 3203 addne r2, #3
80006fe: ea5f 0cdc movs.w ip, ip, lsr #3
8000702: bf18 it ne
8000704: 3203 addne r2, #3
8000706: eb02 02dc add.w r2, r2, ip, lsr #3
800070a: f1c2 0320 rsb r3, r2, #32
800070e: fa00 fc03 lsl.w ip, r0, r3
8000712: fa20 f002 lsr.w r0, r0, r2
8000716: fa01 fe03 lsl.w lr, r1, r3
800071a: ea40 000e orr.w r0, r0, lr
800071e: fa21 f102 lsr.w r1, r1, r2
8000722: 4414 add r4, r2
8000724: e6bd b.n 80004a2 <__adddf3+0xe6>
8000726: bf00 nop
08000728 <__aeabi_uldivmod>:
8000728: b953 cbnz r3, 8000740 <__aeabi_uldivmod+0x18>
800072a: b94a cbnz r2, 8000740 <__aeabi_uldivmod+0x18>
800072c: 2900 cmp r1, #0
800072e: bf08 it eq
8000730: 2800 cmpeq r0, #0
8000732: bf1c itt ne
8000734: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff
8000738: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff
800073c: f000 b9a2 b.w 8000a84 <__aeabi_idiv0>
8000740: f1ad 0c08 sub.w ip, sp, #8
8000744: e96d ce04 strd ip, lr, [sp, #-16]!
8000748: f000 f83e bl 80007c8 <__udivmoddi4>
800074c: f8dd e004 ldr.w lr, [sp, #4]
8000750: e9dd 2302 ldrd r2, r3, [sp, #8]
8000754: b004 add sp, #16
8000756: 4770 bx lr
08000758 <__aeabi_d2lz>:
8000758: b508 push {r3, lr}
800075a: 4602 mov r2, r0
800075c: 460b mov r3, r1
800075e: ec43 2b17 vmov d7, r2, r3
8000762: eeb5 7bc0 vcmpe.f64 d7, #0.0
8000766: eef1 fa10 vmrs APSR_nzcv, fpscr
800076a: d403 bmi.n 8000774 <__aeabi_d2lz+0x1c>
800076c: e8bd 4008 ldmia.w sp!, {r3, lr}
8000770: f000 b80a b.w 8000788 <__aeabi_d2ulz>
8000774: eeb1 7b47 vneg.f64 d7, d7
8000778: ec51 0b17 vmov r0, r1, d7
800077c: f000 f804 bl 8000788 <__aeabi_d2ulz>
8000780: 4240 negs r0, r0
8000782: eb61 0141 sbc.w r1, r1, r1, lsl #1
8000786: bd08 pop {r3, pc}
08000788 <__aeabi_d2ulz>:
8000788: ed9f 6b0b vldr d6, [pc, #44] @ 80007b8 <__aeabi_d2ulz+0x30>
800078c: ec41 0b17 vmov d7, r0, r1
8000790: ed9f 5b0b vldr d5, [pc, #44] @ 80007c0 <__aeabi_d2ulz+0x38>
8000794: ee27 6b06 vmul.f64 d6, d7, d6
8000798: eebc 6bc6 vcvt.u32.f64 s12, d6
800079c: eeb8 4b46 vcvt.f64.u32 d4, s12
80007a0: eea4 7b45 vfms.f64 d7, d4, d5
80007a4: eefc 7bc7 vcvt.u32.f64 s15, d7
80007a8: ee16 1a10 vmov r1, s12
80007ac: ee17 0a90 vmov r0, s15
80007b0: 4770 bx lr
80007b2: bf00 nop
80007b4: f3af 8000 nop.w
80007b8: 00000000 .word 0x00000000
80007bc: 3df00000 .word 0x3df00000
80007c0: 00000000 .word 0x00000000
80007c4: 41f00000 .word 0x41f00000
080007c8 <__udivmoddi4>:
80007c8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
80007cc: 9d08 ldr r5, [sp, #32]
80007ce: 460c mov r4, r1
80007d0: 2b00 cmp r3, #0
80007d2: d14e bne.n 8000872 <__udivmoddi4+0xaa>
80007d4: 4694 mov ip, r2
80007d6: 458c cmp ip, r1
80007d8: 4686 mov lr, r0
80007da: fab2 f282 clz r2, r2
80007de: d962 bls.n 80008a6 <__udivmoddi4+0xde>
80007e0: b14a cbz r2, 80007f6 <__udivmoddi4+0x2e>
80007e2: f1c2 0320 rsb r3, r2, #32
80007e6: 4091 lsls r1, r2
80007e8: fa20 f303 lsr.w r3, r0, r3
80007ec: fa0c fc02 lsl.w ip, ip, r2
80007f0: 4319 orrs r1, r3
80007f2: fa00 fe02 lsl.w lr, r0, r2
80007f6: ea4f 471c mov.w r7, ip, lsr #16
80007fa: fa1f f68c uxth.w r6, ip
80007fe: fbb1 f4f7 udiv r4, r1, r7
8000802: ea4f 431e mov.w r3, lr, lsr #16
8000806: fb07 1114 mls r1, r7, r4, r1
800080a: ea43 4301 orr.w r3, r3, r1, lsl #16
800080e: fb04 f106 mul.w r1, r4, r6
8000812: 4299 cmp r1, r3
8000814: d90a bls.n 800082c <__udivmoddi4+0x64>
8000816: eb1c 0303 adds.w r3, ip, r3
800081a: f104 30ff add.w r0, r4, #4294967295 @ 0xffffffff
800081e: f080 8112 bcs.w 8000a46 <__udivmoddi4+0x27e>
8000822: 4299 cmp r1, r3
8000824: f240 810f bls.w 8000a46 <__udivmoddi4+0x27e>
8000828: 3c02 subs r4, #2
800082a: 4463 add r3, ip
800082c: 1a59 subs r1, r3, r1
800082e: fa1f f38e uxth.w r3, lr
8000832: fbb1 f0f7 udiv r0, r1, r7
8000836: fb07 1110 mls r1, r7, r0, r1
800083a: ea43 4301 orr.w r3, r3, r1, lsl #16
800083e: fb00 f606 mul.w r6, r0, r6
8000842: 429e cmp r6, r3
8000844: d90a bls.n 800085c <__udivmoddi4+0x94>
8000846: eb1c 0303 adds.w r3, ip, r3
800084a: f100 31ff add.w r1, r0, #4294967295 @ 0xffffffff
800084e: f080 80fc bcs.w 8000a4a <__udivmoddi4+0x282>
8000852: 429e cmp r6, r3
8000854: f240 80f9 bls.w 8000a4a <__udivmoddi4+0x282>
8000858: 4463 add r3, ip
800085a: 3802 subs r0, #2
800085c: 1b9b subs r3, r3, r6
800085e: ea40 4004 orr.w r0, r0, r4, lsl #16
8000862: 2100 movs r1, #0
8000864: b11d cbz r5, 800086e <__udivmoddi4+0xa6>
8000866: 40d3 lsrs r3, r2
8000868: 2200 movs r2, #0
800086a: e9c5 3200 strd r3, r2, [r5]
800086e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8000872: 428b cmp r3, r1
8000874: d905 bls.n 8000882 <__udivmoddi4+0xba>
8000876: b10d cbz r5, 800087c <__udivmoddi4+0xb4>
8000878: e9c5 0100 strd r0, r1, [r5]
800087c: 2100 movs r1, #0
800087e: 4608 mov r0, r1
8000880: e7f5 b.n 800086e <__udivmoddi4+0xa6>
8000882: fab3 f183 clz r1, r3
8000886: 2900 cmp r1, #0
8000888: d146 bne.n 8000918 <__udivmoddi4+0x150>
800088a: 42a3 cmp r3, r4
800088c: d302 bcc.n 8000894 <__udivmoddi4+0xcc>
800088e: 4290 cmp r0, r2
8000890: f0c0 80f0 bcc.w 8000a74 <__udivmoddi4+0x2ac>
8000894: 1a86 subs r6, r0, r2
8000896: eb64 0303 sbc.w r3, r4, r3
800089a: 2001 movs r0, #1
800089c: 2d00 cmp r5, #0
800089e: d0e6 beq.n 800086e <__udivmoddi4+0xa6>
80008a0: e9c5 6300 strd r6, r3, [r5]
80008a4: e7e3 b.n 800086e <__udivmoddi4+0xa6>
80008a6: 2a00 cmp r2, #0
80008a8: f040 8090 bne.w 80009cc <__udivmoddi4+0x204>
80008ac: eba1 040c sub.w r4, r1, ip
80008b0: ea4f 481c mov.w r8, ip, lsr #16
80008b4: fa1f f78c uxth.w r7, ip
80008b8: 2101 movs r1, #1
80008ba: fbb4 f6f8 udiv r6, r4, r8
80008be: ea4f 431e mov.w r3, lr, lsr #16
80008c2: fb08 4416 mls r4, r8, r6, r4
80008c6: ea43 4304 orr.w r3, r3, r4, lsl #16
80008ca: fb07 f006 mul.w r0, r7, r6
80008ce: 4298 cmp r0, r3
80008d0: d908 bls.n 80008e4 <__udivmoddi4+0x11c>
80008d2: eb1c 0303 adds.w r3, ip, r3
80008d6: f106 34ff add.w r4, r6, #4294967295 @ 0xffffffff
80008da: d202 bcs.n 80008e2 <__udivmoddi4+0x11a>
80008dc: 4298 cmp r0, r3
80008de: f200 80cd bhi.w 8000a7c <__udivmoddi4+0x2b4>
80008e2: 4626 mov r6, r4
80008e4: 1a1c subs r4, r3, r0
80008e6: fa1f f38e uxth.w r3, lr
80008ea: fbb4 f0f8 udiv r0, r4, r8
80008ee: fb08 4410 mls r4, r8, r0, r4
80008f2: ea43 4304 orr.w r3, r3, r4, lsl #16
80008f6: fb00 f707 mul.w r7, r0, r7
80008fa: 429f cmp r7, r3
80008fc: d908 bls.n 8000910 <__udivmoddi4+0x148>
80008fe: eb1c 0303 adds.w r3, ip, r3
8000902: f100 34ff add.w r4, r0, #4294967295 @ 0xffffffff
8000906: d202 bcs.n 800090e <__udivmoddi4+0x146>
8000908: 429f cmp r7, r3
800090a: f200 80b0 bhi.w 8000a6e <__udivmoddi4+0x2a6>
800090e: 4620 mov r0, r4
8000910: 1bdb subs r3, r3, r7
8000912: ea40 4006 orr.w r0, r0, r6, lsl #16
8000916: e7a5 b.n 8000864 <__udivmoddi4+0x9c>
8000918: f1c1 0620 rsb r6, r1, #32
800091c: 408b lsls r3, r1
800091e: fa22 f706 lsr.w r7, r2, r6
8000922: 431f orrs r7, r3
8000924: fa20 fc06 lsr.w ip, r0, r6
8000928: fa04 f301 lsl.w r3, r4, r1
800092c: ea43 030c orr.w r3, r3, ip
8000930: 40f4 lsrs r4, r6
8000932: fa00 f801 lsl.w r8, r0, r1
8000936: 0c38 lsrs r0, r7, #16
8000938: ea4f 4913 mov.w r9, r3, lsr #16
800093c: fbb4 fef0 udiv lr, r4, r0
8000940: fa1f fc87 uxth.w ip, r7
8000944: fb00 441e mls r4, r0, lr, r4
8000948: ea49 4404 orr.w r4, r9, r4, lsl #16
800094c: fb0e f90c mul.w r9, lr, ip
8000950: 45a1 cmp r9, r4
8000952: fa02 f201 lsl.w r2, r2, r1
8000956: d90a bls.n 800096e <__udivmoddi4+0x1a6>
8000958: 193c adds r4, r7, r4
800095a: f10e 3aff add.w sl, lr, #4294967295 @ 0xffffffff
800095e: f080 8084 bcs.w 8000a6a <__udivmoddi4+0x2a2>
8000962: 45a1 cmp r9, r4
8000964: f240 8081 bls.w 8000a6a <__udivmoddi4+0x2a2>
8000968: f1ae 0e02 sub.w lr, lr, #2
800096c: 443c add r4, r7
800096e: eba4 0409 sub.w r4, r4, r9
8000972: fa1f f983 uxth.w r9, r3
8000976: fbb4 f3f0 udiv r3, r4, r0
800097a: fb00 4413 mls r4, r0, r3, r4
800097e: ea49 4404 orr.w r4, r9, r4, lsl #16
8000982: fb03 fc0c mul.w ip, r3, ip
8000986: 45a4 cmp ip, r4
8000988: d907 bls.n 800099a <__udivmoddi4+0x1d2>
800098a: 193c adds r4, r7, r4
800098c: f103 30ff add.w r0, r3, #4294967295 @ 0xffffffff
8000990: d267 bcs.n 8000a62 <__udivmoddi4+0x29a>
8000992: 45a4 cmp ip, r4
8000994: d965 bls.n 8000a62 <__udivmoddi4+0x29a>
8000996: 3b02 subs r3, #2
8000998: 443c add r4, r7
800099a: ea43 400e orr.w r0, r3, lr, lsl #16
800099e: fba0 9302 umull r9, r3, r0, r2
80009a2: eba4 040c sub.w r4, r4, ip
80009a6: 429c cmp r4, r3
80009a8: 46ce mov lr, r9
80009aa: 469c mov ip, r3
80009ac: d351 bcc.n 8000a52 <__udivmoddi4+0x28a>
80009ae: d04e beq.n 8000a4e <__udivmoddi4+0x286>
80009b0: b155 cbz r5, 80009c8 <__udivmoddi4+0x200>
80009b2: ebb8 030e subs.w r3, r8, lr
80009b6: eb64 040c sbc.w r4, r4, ip
80009ba: fa04 f606 lsl.w r6, r4, r6
80009be: 40cb lsrs r3, r1
80009c0: 431e orrs r6, r3
80009c2: 40cc lsrs r4, r1
80009c4: e9c5 6400 strd r6, r4, [r5]
80009c8: 2100 movs r1, #0
80009ca: e750 b.n 800086e <__udivmoddi4+0xa6>
80009cc: f1c2 0320 rsb r3, r2, #32
80009d0: fa20 f103 lsr.w r1, r0, r3
80009d4: fa0c fc02 lsl.w ip, ip, r2
80009d8: fa24 f303 lsr.w r3, r4, r3
80009dc: 4094 lsls r4, r2
80009de: 430c orrs r4, r1
80009e0: ea4f 481c mov.w r8, ip, lsr #16
80009e4: fa00 fe02 lsl.w lr, r0, r2
80009e8: fa1f f78c uxth.w r7, ip
80009ec: fbb3 f0f8 udiv r0, r3, r8
80009f0: fb08 3110 mls r1, r8, r0, r3
80009f4: 0c23 lsrs r3, r4, #16
80009f6: ea43 4301 orr.w r3, r3, r1, lsl #16
80009fa: fb00 f107 mul.w r1, r0, r7
80009fe: 4299 cmp r1, r3
8000a00: d908 bls.n 8000a14 <__udivmoddi4+0x24c>
8000a02: eb1c 0303 adds.w r3, ip, r3
8000a06: f100 36ff add.w r6, r0, #4294967295 @ 0xffffffff
8000a0a: d22c bcs.n 8000a66 <__udivmoddi4+0x29e>
8000a0c: 4299 cmp r1, r3
8000a0e: d92a bls.n 8000a66 <__udivmoddi4+0x29e>
8000a10: 3802 subs r0, #2
8000a12: 4463 add r3, ip
8000a14: 1a5b subs r3, r3, r1
8000a16: b2a4 uxth r4, r4
8000a18: fbb3 f1f8 udiv r1, r3, r8
8000a1c: fb08 3311 mls r3, r8, r1, r3
8000a20: ea44 4403 orr.w r4, r4, r3, lsl #16
8000a24: fb01 f307 mul.w r3, r1, r7
8000a28: 42a3 cmp r3, r4
8000a2a: d908 bls.n 8000a3e <__udivmoddi4+0x276>
8000a2c: eb1c 0404 adds.w r4, ip, r4
8000a30: f101 36ff add.w r6, r1, #4294967295 @ 0xffffffff
8000a34: d213 bcs.n 8000a5e <__udivmoddi4+0x296>
8000a36: 42a3 cmp r3, r4
8000a38: d911 bls.n 8000a5e <__udivmoddi4+0x296>
8000a3a: 3902 subs r1, #2
8000a3c: 4464 add r4, ip
8000a3e: 1ae4 subs r4, r4, r3
8000a40: ea41 4100 orr.w r1, r1, r0, lsl #16
8000a44: e739 b.n 80008ba <__udivmoddi4+0xf2>
8000a46: 4604 mov r4, r0
8000a48: e6f0 b.n 800082c <__udivmoddi4+0x64>
8000a4a: 4608 mov r0, r1
8000a4c: e706 b.n 800085c <__udivmoddi4+0x94>
8000a4e: 45c8 cmp r8, r9
8000a50: d2ae bcs.n 80009b0 <__udivmoddi4+0x1e8>
8000a52: ebb9 0e02 subs.w lr, r9, r2
8000a56: eb63 0c07 sbc.w ip, r3, r7
8000a5a: 3801 subs r0, #1
8000a5c: e7a8 b.n 80009b0 <__udivmoddi4+0x1e8>
8000a5e: 4631 mov r1, r6
8000a60: e7ed b.n 8000a3e <__udivmoddi4+0x276>
8000a62: 4603 mov r3, r0
8000a64: e799 b.n 800099a <__udivmoddi4+0x1d2>
8000a66: 4630 mov r0, r6
8000a68: e7d4 b.n 8000a14 <__udivmoddi4+0x24c>
8000a6a: 46d6 mov lr, sl
8000a6c: e77f b.n 800096e <__udivmoddi4+0x1a6>
8000a6e: 4463 add r3, ip
8000a70: 3802 subs r0, #2
8000a72: e74d b.n 8000910 <__udivmoddi4+0x148>
8000a74: 4606 mov r6, r0
8000a76: 4623 mov r3, r4
8000a78: 4608 mov r0, r1
8000a7a: e70f b.n 800089c <__udivmoddi4+0xd4>
8000a7c: 3e02 subs r6, #2
8000a7e: 4463 add r3, ip
8000a80: e730 b.n 80008e4 <__udivmoddi4+0x11c>
8000a82: bf00 nop
08000a84 <__aeabi_idiv0>:
8000a84: 4770 bx lr
8000a86: bf00 nop
08000a88 <case_insensitive_strcmp>:
return version;
}
/* Case insensitive string comparison, doesn't consider two NULL pointers equal though */
static int case_insensitive_strcmp(const unsigned char *string1, const unsigned char *string2)
{
8000a88: b480 push {r7}
8000a8a: b085 sub sp, #20
8000a8c: af00 add r7, sp, #0
8000a8e: 6078 str r0, [r7, #4]
8000a90: 6039 str r1, [r7, #0]
if ((string1 == NULL) || (string2 == NULL))
8000a92: 687b ldr r3, [r7, #4]
8000a94: 2b00 cmp r3, #0
8000a96: d002 beq.n 8000a9e <case_insensitive_strcmp+0x16>
8000a98: 683b ldr r3, [r7, #0]
8000a9a: 2b00 cmp r3, #0
8000a9c: d101 bne.n 8000aa2 <case_insensitive_strcmp+0x1a>
{
return 1;
8000a9e: 2301 movs r3, #1
8000aa0: e056 b.n 8000b50 <case_insensitive_strcmp+0xc8>
}
if (string1 == string2)
8000aa2: 687a ldr r2, [r7, #4]
8000aa4: 683b ldr r3, [r7, #0]
8000aa6: 429a cmp r2, r3
8000aa8: d10d bne.n 8000ac6 <case_insensitive_strcmp+0x3e>
{
return 0;
8000aaa: 2300 movs r3, #0
8000aac: e050 b.n 8000b50 <case_insensitive_strcmp+0xc8>
}
for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
{
if (*string1 == '\0')
8000aae: 687b ldr r3, [r7, #4]
8000ab0: 781b ldrb r3, [r3, #0]
8000ab2: 2b00 cmp r3, #0
8000ab4: d101 bne.n 8000aba <case_insensitive_strcmp+0x32>
{
return 0;
8000ab6: 2300 movs r3, #0
8000ab8: e04a b.n 8000b50 <case_insensitive_strcmp+0xc8>
for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
8000aba: 687b ldr r3, [r7, #4]
8000abc: 3301 adds r3, #1
8000abe: 607b str r3, [r7, #4]
8000ac0: 683b ldr r3, [r7, #0]
8000ac2: 3301 adds r3, #1
8000ac4: 603b str r3, [r7, #0]
8000ac6: 687b ldr r3, [r7, #4]
8000ac8: 781b ldrb r3, [r3, #0]
8000aca: 73fb strb r3, [r7, #15]
8000acc: 7bfb ldrb r3, [r7, #15]
8000ace: 3301 adds r3, #1
8000ad0: 4a22 ldr r2, [pc, #136] @ (8000b5c <case_insensitive_strcmp+0xd4>)
8000ad2: 4413 add r3, r2
8000ad4: 781b ldrb r3, [r3, #0]
8000ad6: f003 0303 and.w r3, r3, #3
8000ada: 2b01 cmp r3, #1
8000adc: d103 bne.n 8000ae6 <case_insensitive_strcmp+0x5e>
8000ade: 7bfb ldrb r3, [r7, #15]
8000ae0: f103 0220 add.w r2, r3, #32
8000ae4: e000 b.n 8000ae8 <case_insensitive_strcmp+0x60>
8000ae6: 7bfa ldrb r2, [r7, #15]
8000ae8: 683b ldr r3, [r7, #0]
8000aea: 781b ldrb r3, [r3, #0]
8000aec: 73bb strb r3, [r7, #14]
8000aee: 7bbb ldrb r3, [r7, #14]
8000af0: 3301 adds r3, #1
8000af2: 491a ldr r1, [pc, #104] @ (8000b5c <case_insensitive_strcmp+0xd4>)
8000af4: 440b add r3, r1
8000af6: 781b ldrb r3, [r3, #0]
8000af8: f003 0303 and.w r3, r3, #3
8000afc: 2b01 cmp r3, #1
8000afe: d102 bne.n 8000b06 <case_insensitive_strcmp+0x7e>
8000b00: 7bbb ldrb r3, [r7, #14]
8000b02: 3320 adds r3, #32
8000b04: e000 b.n 8000b08 <case_insensitive_strcmp+0x80>
8000b06: 7bbb ldrb r3, [r7, #14]
8000b08: 429a cmp r2, r3
8000b0a: d0d0 beq.n 8000aae <case_insensitive_strcmp+0x26>
}
}
return tolower(*string1) - tolower(*string2);
8000b0c: 687b ldr r3, [r7, #4]
8000b0e: 781b ldrb r3, [r3, #0]
8000b10: 737b strb r3, [r7, #13]
8000b12: 7b7b ldrb r3, [r7, #13]
8000b14: 3301 adds r3, #1
8000b16: 4a11 ldr r2, [pc, #68] @ (8000b5c <case_insensitive_strcmp+0xd4>)
8000b18: 4413 add r3, r2
8000b1a: 781b ldrb r3, [r3, #0]
8000b1c: f003 0303 and.w r3, r3, #3
8000b20: 2b01 cmp r3, #1
8000b22: d103 bne.n 8000b2c <case_insensitive_strcmp+0xa4>
8000b24: 7b7b ldrb r3, [r7, #13]
8000b26: f103 0220 add.w r2, r3, #32
8000b2a: e000 b.n 8000b2e <case_insensitive_strcmp+0xa6>
8000b2c: 7b7a ldrb r2, [r7, #13]
8000b2e: 683b ldr r3, [r7, #0]
8000b30: 781b ldrb r3, [r3, #0]
8000b32: 733b strb r3, [r7, #12]
8000b34: 7b3b ldrb r3, [r7, #12]
8000b36: 3301 adds r3, #1
8000b38: 4908 ldr r1, [pc, #32] @ (8000b5c <case_insensitive_strcmp+0xd4>)
8000b3a: 440b add r3, r1
8000b3c: 781b ldrb r3, [r3, #0]
8000b3e: f003 0303 and.w r3, r3, #3
8000b42: 2b01 cmp r3, #1
8000b44: d102 bne.n 8000b4c <case_insensitive_strcmp+0xc4>
8000b46: 7b3b ldrb r3, [r7, #12]
8000b48: 3320 adds r3, #32
8000b4a: e000 b.n 8000b4e <case_insensitive_strcmp+0xc6>
8000b4c: 7b3b ldrb r3, [r7, #12]
8000b4e: 1ad3 subs r3, r2, r3
}
8000b50: 4618 mov r0, r3
8000b52: 3714 adds r7, #20
8000b54: 46bd mov sp, r7
8000b56: f85d 7b04 ldr.w r7, [sp], #4
8000b5a: 4770 bx lr
8000b5c: 08031fa0 .word 0x08031fa0
08000b60 <cJSON_New_Item>:
}
}
/* Internal constructor. */
static cJSON *cJSON_New_Item(const internal_hooks * const hooks)
{
8000b60: b580 push {r7, lr}
8000b62: b084 sub sp, #16
8000b64: af00 add r7, sp, #0
8000b66: 6078 str r0, [r7, #4]
cJSON* node = (cJSON*)hooks->allocate(sizeof(cJSON));
8000b68: 687b ldr r3, [r7, #4]
8000b6a: 681b ldr r3, [r3, #0]
8000b6c: 2028 movs r0, #40 @ 0x28
8000b6e: 4798 blx r3
8000b70: 60f8 str r0, [r7, #12]
if (node)
8000b72: 68fb ldr r3, [r7, #12]
8000b74: 2b00 cmp r3, #0
8000b76: d004 beq.n 8000b82 <cJSON_New_Item+0x22>
{
memset(node, '\0', sizeof(cJSON));
8000b78: 2228 movs r2, #40 @ 0x28
8000b7a: 2100 movs r1, #0
8000b7c: 68f8 ldr r0, [r7, #12]
8000b7e: f02a f8e7 bl 802ad50 <memset>
}
return node;
8000b82: 68fb ldr r3, [r7, #12]
}
8000b84: 4618 mov r0, r3
8000b86: 3710 adds r7, #16
8000b88: 46bd mov sp, r7
8000b8a: bd80 pop {r7, pc}
08000b8c <cJSON_Delete>:
/* Delete a cJSON structure. */
CJSON_PUBLIC(void) cJSON_Delete(cJSON *item)
{
8000b8c: b580 push {r7, lr}
8000b8e: b084 sub sp, #16
8000b90: af00 add r7, sp, #0
8000b92: 6078 str r0, [r7, #4]
cJSON *next = NULL;
8000b94: 2300 movs r3, #0
8000b96: 60fb str r3, [r7, #12]
while (item != NULL)
8000b98: e03d b.n 8000c16 <cJSON_Delete+0x8a>
{
next = item->next;
8000b9a: 687b ldr r3, [r7, #4]
8000b9c: 681b ldr r3, [r3, #0]
8000b9e: 60fb str r3, [r7, #12]
if (!(item->type & cJSON_IsReference) && (item->child != NULL))
8000ba0: 687b ldr r3, [r7, #4]
8000ba2: 68db ldr r3, [r3, #12]
8000ba4: f403 7380 and.w r3, r3, #256 @ 0x100
8000ba8: 2b00 cmp r3, #0
8000baa: d108 bne.n 8000bbe <cJSON_Delete+0x32>
8000bac: 687b ldr r3, [r7, #4]
8000bae: 689b ldr r3, [r3, #8]
8000bb0: 2b00 cmp r3, #0
8000bb2: d004 beq.n 8000bbe <cJSON_Delete+0x32>
{
cJSON_Delete(item->child);
8000bb4: 687b ldr r3, [r7, #4]
8000bb6: 689b ldr r3, [r3, #8]
8000bb8: 4618 mov r0, r3
8000bba: f7ff ffe7 bl 8000b8c <cJSON_Delete>
}
if (!(item->type & cJSON_IsReference) && (item->valuestring != NULL))
8000bbe: 687b ldr r3, [r7, #4]
8000bc0: 68db ldr r3, [r3, #12]
8000bc2: f403 7380 and.w r3, r3, #256 @ 0x100
8000bc6: 2b00 cmp r3, #0
8000bc8: d10c bne.n 8000be4 <cJSON_Delete+0x58>
8000bca: 687b ldr r3, [r7, #4]
8000bcc: 691b ldr r3, [r3, #16]
8000bce: 2b00 cmp r3, #0
8000bd0: d008 beq.n 8000be4 <cJSON_Delete+0x58>
{
global_hooks.deallocate(item->valuestring);
8000bd2: 4b15 ldr r3, [pc, #84] @ (8000c28 <cJSON_Delete+0x9c>)
8000bd4: 685b ldr r3, [r3, #4]
8000bd6: 687a ldr r2, [r7, #4]
8000bd8: 6912 ldr r2, [r2, #16]
8000bda: 4610 mov r0, r2
8000bdc: 4798 blx r3
item->valuestring = NULL;
8000bde: 687b ldr r3, [r7, #4]
8000be0: 2200 movs r2, #0
8000be2: 611a str r2, [r3, #16]
}
if (!(item->type & cJSON_StringIsConst) && (item->string != NULL))
8000be4: 687b ldr r3, [r7, #4]
8000be6: 68db ldr r3, [r3, #12]
8000be8: f403 7300 and.w r3, r3, #512 @ 0x200
8000bec: 2b00 cmp r3, #0
8000bee: d10c bne.n 8000c0a <cJSON_Delete+0x7e>
8000bf0: 687b ldr r3, [r7, #4]
8000bf2: 6a1b ldr r3, [r3, #32]
8000bf4: 2b00 cmp r3, #0
8000bf6: d008 beq.n 8000c0a <cJSON_Delete+0x7e>
{
global_hooks.deallocate(item->string);
8000bf8: 4b0b ldr r3, [pc, #44] @ (8000c28 <cJSON_Delete+0x9c>)
8000bfa: 685b ldr r3, [r3, #4]
8000bfc: 687a ldr r2, [r7, #4]
8000bfe: 6a12 ldr r2, [r2, #32]
8000c00: 4610 mov r0, r2
8000c02: 4798 blx r3
item->string = NULL;
8000c04: 687b ldr r3, [r7, #4]
8000c06: 2200 movs r2, #0
8000c08: 621a str r2, [r3, #32]
}
global_hooks.deallocate(item);
8000c0a: 4b07 ldr r3, [pc, #28] @ (8000c28 <cJSON_Delete+0x9c>)
8000c0c: 685b ldr r3, [r3, #4]
8000c0e: 6878 ldr r0, [r7, #4]
8000c10: 4798 blx r3
item = next;
8000c12: 68fb ldr r3, [r7, #12]
8000c14: 607b str r3, [r7, #4]
while (item != NULL)
8000c16: 687b ldr r3, [r7, #4]
8000c18: 2b00 cmp r3, #0
8000c1a: d1be bne.n 8000b9a <cJSON_Delete+0xe>
}
}
8000c1c: bf00 nop
8000c1e: bf00 nop
8000c20: 3710 adds r7, #16
8000c22: 46bd mov sp, r7
8000c24: bd80 pop {r7, pc}
8000c26: bf00 nop
8000c28: 24000000 .word 0x24000000
08000c2c <get_decimal_point>:
/* get the decimal point character of the current locale */
static unsigned char get_decimal_point(void)
{
8000c2c: b480 push {r7}
8000c2e: af00 add r7, sp, #0
#ifdef ENABLE_LOCALES
struct lconv *lconv = localeconv();
return (unsigned char) lconv->decimal_point[0];
#else
return '.';
8000c30: 232e movs r3, #46 @ 0x2e
#endif
}
8000c32: 4618 mov r0, r3
8000c34: 46bd mov sp, r7
8000c36: f85d 7b04 ldr.w r7, [sp], #4
8000c3a: 4770 bx lr
8000c3c: 0000 movs r0, r0
...
08000c40 <parse_number>:
/* get a pointer to the buffer at the position */
#define buffer_at_offset(buffer) ((buffer)->content + (buffer)->offset)
/* Parse the input text to generate a number, and populate the result into item. */
static cJSON_bool parse_number(cJSON * const item, parse_buffer * const input_buffer)
{
8000c40: b580 push {r7, lr}
8000c42: b098 sub sp, #96 @ 0x60
8000c44: af00 add r7, sp, #0
8000c46: 6078 str r0, [r7, #4]
8000c48: 6039 str r1, [r7, #0]
double number = 0;
8000c4a: f04f 0200 mov.w r2, #0
8000c4e: f04f 0300 mov.w r3, #0
8000c52: e9c7 2314 strd r2, r3, [r7, #80] @ 0x50
unsigned char *after_end = NULL;
8000c56: 2300 movs r3, #0
8000c58: 64bb str r3, [r7, #72] @ 0x48
unsigned char number_c_string[64];
unsigned char decimal_point = get_decimal_point();
8000c5a: f7ff ffe7 bl 8000c2c <get_decimal_point>
8000c5e: 4603 mov r3, r0
8000c60: f887 304f strb.w r3, [r7, #79] @ 0x4f
size_t i = 0;
8000c64: 2300 movs r3, #0
8000c66: 65fb str r3, [r7, #92] @ 0x5c
if ((input_buffer == NULL) || (input_buffer->content == NULL))
8000c68: 683b ldr r3, [r7, #0]
8000c6a: 2b00 cmp r3, #0
8000c6c: d003 beq.n 8000c76 <parse_number+0x36>
8000c6e: 683b ldr r3, [r7, #0]
8000c70: 681b ldr r3, [r3, #0]
8000c72: 2b00 cmp r3, #0
8000c74: d101 bne.n 8000c7a <parse_number+0x3a>
{
return false;
8000c76: 2300 movs r3, #0
8000c78: e09f b.n 8000dba <parse_number+0x17a>
}
/* copy the number into a temporary buffer and replace '.' with the decimal point
* of the current locale (for strtod)
* This also takes care of '\0' not necessarily being available for marking the end of the input */
for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
8000c7a: 2300 movs r3, #0
8000c7c: 65fb str r3, [r7, #92] @ 0x5c
8000c7e: e03d b.n 8000cfc <parse_number+0xbc>
{
switch (buffer_at_offset(input_buffer)[i])
8000c80: 683b ldr r3, [r7, #0]
8000c82: 681a ldr r2, [r3, #0]
8000c84: 683b ldr r3, [r7, #0]
8000c86: 6899 ldr r1, [r3, #8]
8000c88: 6dfb ldr r3, [r7, #92] @ 0x5c
8000c8a: 440b add r3, r1
8000c8c: 4413 add r3, r2
8000c8e: 781b ldrb r3, [r3, #0]
8000c90: 2b45 cmp r3, #69 @ 0x45
8000c92: dc17 bgt.n 8000cc4 <parse_number+0x84>
8000c94: 2b2b cmp r3, #43 @ 0x2b
8000c96: db40 blt.n 8000d1a <parse_number+0xda>
8000c98: 3b2b subs r3, #43 @ 0x2b
8000c9a: 2201 movs r2, #1
8000c9c: 409a lsls r2, r3
8000c9e: 4b4e ldr r3, [pc, #312] @ (8000dd8 <parse_number+0x198>)
8000ca0: 4013 ands r3, r2
8000ca2: 2b00 cmp r3, #0
8000ca4: bf14 ite ne
8000ca6: 2301 movne r3, #1
8000ca8: 2300 moveq r3, #0
8000caa: b2db uxtb r3, r3
8000cac: 2b00 cmp r3, #0
8000cae: d10b bne.n 8000cc8 <parse_number+0x88>
8000cb0: f002 0308 and.w r3, r2, #8
8000cb4: 2b00 cmp r3, #0
8000cb6: bf14 ite ne
8000cb8: 2301 movne r3, #1
8000cba: 2300 moveq r3, #0
8000cbc: b2db uxtb r3, r3
8000cbe: 2b00 cmp r3, #0
8000cc0: d111 bne.n 8000ce6 <parse_number+0xa6>
case '.':
number_c_string[i] = decimal_point;
break;
default:
goto loop_end;
8000cc2: e02a b.n 8000d1a <parse_number+0xda>
switch (buffer_at_offset(input_buffer)[i])
8000cc4: 2b65 cmp r3, #101 @ 0x65
8000cc6: d128 bne.n 8000d1a <parse_number+0xda>
number_c_string[i] = buffer_at_offset(input_buffer)[i];
8000cc8: 683b ldr r3, [r7, #0]
8000cca: 681a ldr r2, [r3, #0]
8000ccc: 683b ldr r3, [r7, #0]
8000cce: 6899 ldr r1, [r3, #8]
8000cd0: 6dfb ldr r3, [r7, #92] @ 0x5c
8000cd2: 440b add r3, r1
8000cd4: 4413 add r3, r2
8000cd6: 7819 ldrb r1, [r3, #0]
8000cd8: f107 0208 add.w r2, r7, #8
8000cdc: 6dfb ldr r3, [r7, #92] @ 0x5c
8000cde: 4413 add r3, r2
8000ce0: 460a mov r2, r1
8000ce2: 701a strb r2, [r3, #0]
break;
8000ce4: e007 b.n 8000cf6 <parse_number+0xb6>
number_c_string[i] = decimal_point;
8000ce6: f107 0208 add.w r2, r7, #8
8000cea: 6dfb ldr r3, [r7, #92] @ 0x5c
8000cec: 4413 add r3, r2
8000cee: f897 204f ldrb.w r2, [r7, #79] @ 0x4f
8000cf2: 701a strb r2, [r3, #0]
break;
8000cf4: bf00 nop
for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
8000cf6: 6dfb ldr r3, [r7, #92] @ 0x5c
8000cf8: 3301 adds r3, #1
8000cfa: 65fb str r3, [r7, #92] @ 0x5c
8000cfc: 6dfb ldr r3, [r7, #92] @ 0x5c
8000cfe: 2b3e cmp r3, #62 @ 0x3e
8000d00: d80d bhi.n 8000d1e <parse_number+0xde>
8000d02: 683b ldr r3, [r7, #0]
8000d04: 2b00 cmp r3, #0
8000d06: d00a beq.n 8000d1e <parse_number+0xde>
8000d08: 683b ldr r3, [r7, #0]
8000d0a: 689a ldr r2, [r3, #8]
8000d0c: 6dfb ldr r3, [r7, #92] @ 0x5c
8000d0e: 441a add r2, r3
8000d10: 683b ldr r3, [r7, #0]
8000d12: 685b ldr r3, [r3, #4]
8000d14: 429a cmp r2, r3
8000d16: d3b3 bcc.n 8000c80 <parse_number+0x40>
}
}
loop_end:
8000d18: e001 b.n 8000d1e <parse_number+0xde>
goto loop_end;
8000d1a: bf00 nop
8000d1c: e000 b.n 8000d20 <parse_number+0xe0>
loop_end:
8000d1e: bf00 nop
number_c_string[i] = '\0';
8000d20: f107 0208 add.w r2, r7, #8
8000d24: 6dfb ldr r3, [r7, #92] @ 0x5c
8000d26: 4413 add r3, r2
8000d28: 2200 movs r2, #0
8000d2a: 701a strb r2, [r3, #0]
number = strtod((const char*)number_c_string, (char**)&after_end);
8000d2c: f107 0248 add.w r2, r7, #72 @ 0x48
8000d30: f107 0308 add.w r3, r7, #8
8000d34: 4611 mov r1, r2
8000d36: 4618 mov r0, r3
8000d38: f029 f974 bl 802a024 <strtod>
8000d3c: ed87 0b14 vstr d0, [r7, #80] @ 0x50
if (number_c_string == after_end)
8000d40: 6cba ldr r2, [r7, #72] @ 0x48
8000d42: f107 0308 add.w r3, r7, #8
8000d46: 429a cmp r2, r3
8000d48: d101 bne.n 8000d4e <parse_number+0x10e>
{
return false; /* parse_error */
8000d4a: 2300 movs r3, #0
8000d4c: e035 b.n 8000dba <parse_number+0x17a>
}
item->valuedouble = number;
8000d4e: 6879 ldr r1, [r7, #4]
8000d50: e9d7 2314 ldrd r2, r3, [r7, #80] @ 0x50
8000d54: e9c1 2306 strd r2, r3, [r1, #24]
/* use saturation in case of overflow */
if (number >= INT_MAX)
8000d58: ed97 7b14 vldr d7, [r7, #80] @ 0x50
8000d5c: ed9f 6b1a vldr d6, [pc, #104] @ 8000dc8 <parse_number+0x188>
8000d60: eeb4 7bc6 vcmpe.f64 d7, d6
8000d64: eef1 fa10 vmrs APSR_nzcv, fpscr
8000d68: db04 blt.n 8000d74 <parse_number+0x134>
{
item->valueint = INT_MAX;
8000d6a: 687b ldr r3, [r7, #4]
8000d6c: f06f 4200 mvn.w r2, #2147483648 @ 0x80000000
8000d70: 615a str r2, [r3, #20]
8000d72: e015 b.n 8000da0 <parse_number+0x160>
}
else if (number <= (double)INT_MIN)
8000d74: ed97 7b14 vldr d7, [r7, #80] @ 0x50
8000d78: ed9f 6b15 vldr d6, [pc, #84] @ 8000dd0 <parse_number+0x190>
8000d7c: eeb4 7bc6 vcmpe.f64 d7, d6
8000d80: eef1 fa10 vmrs APSR_nzcv, fpscr
8000d84: d804 bhi.n 8000d90 <parse_number+0x150>
{
item->valueint = INT_MIN;
8000d86: 687b ldr r3, [r7, #4]
8000d88: f04f 4200 mov.w r2, #2147483648 @ 0x80000000
8000d8c: 615a str r2, [r3, #20]
8000d8e: e007 b.n 8000da0 <parse_number+0x160>
}
else
{
item->valueint = (int)number;
8000d90: ed97 7b14 vldr d7, [r7, #80] @ 0x50
8000d94: eefd 7bc7 vcvt.s32.f64 s15, d7
8000d98: ee17 2a90 vmov r2, s15
8000d9c: 687b ldr r3, [r7, #4]
8000d9e: 615a str r2, [r3, #20]
}
item->type = cJSON_Number;
8000da0: 687b ldr r3, [r7, #4]
8000da2: 2208 movs r2, #8
8000da4: 60da str r2, [r3, #12]
input_buffer->offset += (size_t)(after_end - number_c_string);
8000da6: 683b ldr r3, [r7, #0]
8000da8: 689b ldr r3, [r3, #8]
8000daa: 6cb9 ldr r1, [r7, #72] @ 0x48
8000dac: f107 0208 add.w r2, r7, #8
8000db0: 1a8a subs r2, r1, r2
8000db2: 441a add r2, r3
8000db4: 683b ldr r3, [r7, #0]
8000db6: 609a str r2, [r3, #8]
return true;
8000db8: 2301 movs r3, #1
}
8000dba: 4618 mov r0, r3
8000dbc: 3760 adds r7, #96 @ 0x60
8000dbe: 46bd mov sp, r7
8000dc0: bd80 pop {r7, pc}
8000dc2: bf00 nop
8000dc4: f3af 8000 nop.w
8000dc8: ffc00000 .word 0xffc00000
8000dcc: 41dfffff .word 0x41dfffff
8000dd0: 00000000 .word 0x00000000
8000dd4: c1e00000 .word 0xc1e00000
8000dd8: 04007fe5 .word 0x04007fe5
08000ddc <parse_hex4>:
return true;
}
/* parse 4 digit hexadecimal number */
static unsigned parse_hex4(const unsigned char * const input)
{
8000ddc: b480 push {r7}
8000dde: b085 sub sp, #20
8000de0: af00 add r7, sp, #0
8000de2: 6078 str r0, [r7, #4]
unsigned int h = 0;
8000de4: 2300 movs r3, #0
8000de6: 60fb str r3, [r7, #12]
size_t i = 0;
8000de8: 2300 movs r3, #0
8000dea: 60bb str r3, [r7, #8]
for (i = 0; i < 4; i++)
8000dec: 2300 movs r3, #0
8000dee: 60bb str r3, [r7, #8]
8000df0: e04c b.n 8000e8c <parse_hex4+0xb0>
{
/* parse digit */
if ((input[i] >= '0') && (input[i] <= '9'))
8000df2: 687a ldr r2, [r7, #4]
8000df4: 68bb ldr r3, [r7, #8]
8000df6: 4413 add r3, r2
8000df8: 781b ldrb r3, [r3, #0]
8000dfa: 2b2f cmp r3, #47 @ 0x2f
8000dfc: d90f bls.n 8000e1e <parse_hex4+0x42>
8000dfe: 687a ldr r2, [r7, #4]
8000e00: 68bb ldr r3, [r7, #8]
8000e02: 4413 add r3, r2
8000e04: 781b ldrb r3, [r3, #0]
8000e06: 2b39 cmp r3, #57 @ 0x39
8000e08: d809 bhi.n 8000e1e <parse_hex4+0x42>
{
h += (unsigned int) input[i] - '0';
8000e0a: 687a ldr r2, [r7, #4]
8000e0c: 68bb ldr r3, [r7, #8]
8000e0e: 4413 add r3, r2
8000e10: 781b ldrb r3, [r3, #0]
8000e12: 461a mov r2, r3
8000e14: 68fb ldr r3, [r7, #12]
8000e16: 4413 add r3, r2
8000e18: 3b30 subs r3, #48 @ 0x30
8000e1a: 60fb str r3, [r7, #12]
8000e1c: e02d b.n 8000e7a <parse_hex4+0x9e>
}
else if ((input[i] >= 'A') && (input[i] <= 'F'))
8000e1e: 687a ldr r2, [r7, #4]
8000e20: 68bb ldr r3, [r7, #8]
8000e22: 4413 add r3, r2
8000e24: 781b ldrb r3, [r3, #0]
8000e26: 2b40 cmp r3, #64 @ 0x40
8000e28: d90f bls.n 8000e4a <parse_hex4+0x6e>
8000e2a: 687a ldr r2, [r7, #4]
8000e2c: 68bb ldr r3, [r7, #8]
8000e2e: 4413 add r3, r2
8000e30: 781b ldrb r3, [r3, #0]
8000e32: 2b46 cmp r3, #70 @ 0x46
8000e34: d809 bhi.n 8000e4a <parse_hex4+0x6e>
{
h += (unsigned int) 10 + input[i] - 'A';
8000e36: 687a ldr r2, [r7, #4]
8000e38: 68bb ldr r3, [r7, #8]
8000e3a: 4413 add r3, r2
8000e3c: 781b ldrb r3, [r3, #0]
8000e3e: 461a mov r2, r3
8000e40: 68fb ldr r3, [r7, #12]
8000e42: 4413 add r3, r2
8000e44: 3b37 subs r3, #55 @ 0x37
8000e46: 60fb str r3, [r7, #12]
8000e48: e017 b.n 8000e7a <parse_hex4+0x9e>
}
else if ((input[i] >= 'a') && (input[i] <= 'f'))
8000e4a: 687a ldr r2, [r7, #4]
8000e4c: 68bb ldr r3, [r7, #8]
8000e4e: 4413 add r3, r2
8000e50: 781b ldrb r3, [r3, #0]
8000e52: 2b60 cmp r3, #96 @ 0x60
8000e54: d90f bls.n 8000e76 <parse_hex4+0x9a>
8000e56: 687a ldr r2, [r7, #4]
8000e58: 68bb ldr r3, [r7, #8]
8000e5a: 4413 add r3, r2
8000e5c: 781b ldrb r3, [r3, #0]
8000e5e: 2b66 cmp r3, #102 @ 0x66
8000e60: d809 bhi.n 8000e76 <parse_hex4+0x9a>
{
h += (unsigned int) 10 + input[i] - 'a';
8000e62: 687a ldr r2, [r7, #4]
8000e64: 68bb ldr r3, [r7, #8]
8000e66: 4413 add r3, r2
8000e68: 781b ldrb r3, [r3, #0]
8000e6a: 461a mov r2, r3
8000e6c: 68fb ldr r3, [r7, #12]
8000e6e: 4413 add r3, r2
8000e70: 3b57 subs r3, #87 @ 0x57
8000e72: 60fb str r3, [r7, #12]
8000e74: e001 b.n 8000e7a <parse_hex4+0x9e>
}
else /* invalid */
{
return 0;
8000e76: 2300 movs r3, #0
8000e78: e00c b.n 8000e94 <parse_hex4+0xb8>
}
if (i < 3)
8000e7a: 68bb ldr r3, [r7, #8]
8000e7c: 2b02 cmp r3, #2
8000e7e: d802 bhi.n 8000e86 <parse_hex4+0xaa>
{
/* shift left to make place for the next nibble */
h = h << 4;
8000e80: 68fb ldr r3, [r7, #12]
8000e82: 011b lsls r3, r3, #4
8000e84: 60fb str r3, [r7, #12]
for (i = 0; i < 4; i++)
8000e86: 68bb ldr r3, [r7, #8]
8000e88: 3301 adds r3, #1
8000e8a: 60bb str r3, [r7, #8]
8000e8c: 68bb ldr r3, [r7, #8]
8000e8e: 2b03 cmp r3, #3
8000e90: d9af bls.n 8000df2 <parse_hex4+0x16>
}
}
return h;
8000e92: 68fb ldr r3, [r7, #12]
}
8000e94: 4618 mov r0, r3
8000e96: 3714 adds r7, #20
8000e98: 46bd mov sp, r7
8000e9a: f85d 7b04 ldr.w r7, [sp], #4
8000e9e: 4770 bx lr
08000ea0 <utf16_literal_to_utf8>:
/* converts a UTF-16 literal to UTF-8
* A literal can be one or two sequences of the form \uXXXX */
static unsigned char utf16_literal_to_utf8(const unsigned char * const input_pointer, const unsigned char * const input_end, unsigned char **output_pointer)
{
8000ea0: b580 push {r7, lr}
8000ea2: b08a sub sp, #40 @ 0x28
8000ea4: af00 add r7, sp, #0
8000ea6: 60f8 str r0, [r7, #12]
8000ea8: 60b9 str r1, [r7, #8]
8000eaa: 607a str r2, [r7, #4]
long unsigned int codepoint = 0;
8000eac: 2300 movs r3, #0
8000eae: 627b str r3, [r7, #36] @ 0x24
unsigned int first_code = 0;
8000eb0: 2300 movs r3, #0
8000eb2: 61fb str r3, [r7, #28]
const unsigned char *first_sequence = input_pointer;
8000eb4: 68fb ldr r3, [r7, #12]
8000eb6: 61bb str r3, [r7, #24]
unsigned char utf8_length = 0;
8000eb8: 2300 movs r3, #0
8000eba: f887 3023 strb.w r3, [r7, #35] @ 0x23
unsigned char utf8_position = 0;
8000ebe: 2300 movs r3, #0
8000ec0: f887 3022 strb.w r3, [r7, #34] @ 0x22
unsigned char sequence_length = 0;
8000ec4: 2300 movs r3, #0
8000ec6: f887 3021 strb.w r3, [r7, #33] @ 0x21
unsigned char first_byte_mark = 0;
8000eca: 2300 movs r3, #0
8000ecc: f887 3020 strb.w r3, [r7, #32]
if ((input_end - first_sequence) < 6)
8000ed0: 68ba ldr r2, [r7, #8]
8000ed2: 69bb ldr r3, [r7, #24]
8000ed4: 1ad3 subs r3, r2, r3
8000ed6: 2b05 cmp r3, #5
8000ed8: f340 80b7 ble.w 800104a <utf16_literal_to_utf8+0x1aa>
/* input ends unexpectedly */
goto fail;
}
/* get the first utf16 sequence */
first_code = parse_hex4(first_sequence + 2);
8000edc: 69bb ldr r3, [r7, #24]
8000ede: 3302 adds r3, #2
8000ee0: 4618 mov r0, r3
8000ee2: f7ff ff7b bl 8000ddc <parse_hex4>
8000ee6: 61f8 str r0, [r7, #28]
/* check that the code is valid */
if (((first_code >= 0xDC00) && (first_code <= 0xDFFF)))
8000ee8: 69fb ldr r3, [r7, #28]
8000eea: f5b3 4f5c cmp.w r3, #56320 @ 0xdc00
8000eee: d304 bcc.n 8000efa <utf16_literal_to_utf8+0x5a>
8000ef0: 69fb ldr r3, [r7, #28]
8000ef2: f5b3 4f60 cmp.w r3, #57344 @ 0xe000
8000ef6: f0c0 80aa bcc.w 800104e <utf16_literal_to_utf8+0x1ae>
{
goto fail;
}
/* UTF16 surrogate pair */
if ((first_code >= 0xD800) && (first_code <= 0xDBFF))
8000efa: 69fb ldr r3, [r7, #28]
8000efc: f5b3 4f58 cmp.w r3, #55296 @ 0xd800
8000f00: d337 bcc.n 8000f72 <utf16_literal_to_utf8+0xd2>
8000f02: 69fb ldr r3, [r7, #28]
8000f04: f5b3 4f5c cmp.w r3, #56320 @ 0xdc00
8000f08: d233 bcs.n 8000f72 <utf16_literal_to_utf8+0xd2>
{
const unsigned char *second_sequence = first_sequence + 6;
8000f0a: 69bb ldr r3, [r7, #24]
8000f0c: 3306 adds r3, #6
8000f0e: 617b str r3, [r7, #20]
unsigned int second_code = 0;
8000f10: 2300 movs r3, #0
8000f12: 613b str r3, [r7, #16]
sequence_length = 12; /* \uXXXX\uXXXX */
8000f14: 230c movs r3, #12
8000f16: f887 3021 strb.w r3, [r7, #33] @ 0x21
if ((input_end - second_sequence) < 6)
8000f1a: 68ba ldr r2, [r7, #8]
8000f1c: 697b ldr r3, [r7, #20]
8000f1e: 1ad3 subs r3, r2, r3
8000f20: 2b05 cmp r3, #5
8000f22: f340 8096 ble.w 8001052 <utf16_literal_to_utf8+0x1b2>
{
/* input ends unexpectedly */
goto fail;
}
if ((second_sequence[0] != '\\') || (second_sequence[1] != 'u'))
8000f26: 697b ldr r3, [r7, #20]
8000f28: 781b ldrb r3, [r3, #0]
8000f2a: 2b5c cmp r3, #92 @ 0x5c
8000f2c: f040 8093 bne.w 8001056 <utf16_literal_to_utf8+0x1b6>
8000f30: 697b ldr r3, [r7, #20]
8000f32: 3301 adds r3, #1
8000f34: 781b ldrb r3, [r3, #0]
8000f36: 2b75 cmp r3, #117 @ 0x75
8000f38: f040 808d bne.w 8001056 <utf16_literal_to_utf8+0x1b6>
/* missing second half of the surrogate pair */
goto fail;
}
/* get the second utf16 sequence */
second_code = parse_hex4(second_sequence + 2);
8000f3c: 697b ldr r3, [r7, #20]
8000f3e: 3302 adds r3, #2
8000f40: 4618 mov r0, r3
8000f42: f7ff ff4b bl 8000ddc <parse_hex4>
8000f46: 6138 str r0, [r7, #16]
/* check that the code is valid */
if ((second_code < 0xDC00) || (second_code > 0xDFFF))
8000f48: 693b ldr r3, [r7, #16]
8000f4a: f5b3 4f5c cmp.w r3, #56320 @ 0xdc00
8000f4e: f0c0 8084 bcc.w 800105a <utf16_literal_to_utf8+0x1ba>
8000f52: 693b ldr r3, [r7, #16]
8000f54: f5b3 4f60 cmp.w r3, #57344 @ 0xe000
8000f58: d27f bcs.n 800105a <utf16_literal_to_utf8+0x1ba>
goto fail;
}
/* calculate the unicode codepoint from the surrogate pair */
codepoint = 0x10000 + (((first_code & 0x3FF) << 10) | (second_code & 0x3FF));
8000f5a: 69fb ldr r3, [r7, #28]
8000f5c: 029a lsls r2, r3, #10
8000f5e: 4b43 ldr r3, [pc, #268] @ (800106c <utf16_literal_to_utf8+0x1cc>)
8000f60: 4013 ands r3, r2
8000f62: 693a ldr r2, [r7, #16]
8000f64: f3c2 0209 ubfx r2, r2, #0, #10
8000f68: 4313 orrs r3, r2
8000f6a: f503 3380 add.w r3, r3, #65536 @ 0x10000
8000f6e: 627b str r3, [r7, #36] @ 0x24
{
8000f70: e004 b.n 8000f7c <utf16_literal_to_utf8+0xdc>
}
else
{
sequence_length = 6; /* \uXXXX */
8000f72: 2306 movs r3, #6
8000f74: f887 3021 strb.w r3, [r7, #33] @ 0x21
codepoint = first_code;
8000f78: 69fb ldr r3, [r7, #28]
8000f7a: 627b str r3, [r7, #36] @ 0x24
}
/* encode as UTF-8
* takes at maximum 4 bytes to encode:
* 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx */
if (codepoint < 0x80)
8000f7c: 6a7b ldr r3, [r7, #36] @ 0x24
8000f7e: 2b7f cmp r3, #127 @ 0x7f
8000f80: d803 bhi.n 8000f8a <utf16_literal_to_utf8+0xea>
{
/* normal ascii, encoding 0xxxxxxx */
utf8_length = 1;
8000f82: 2301 movs r3, #1
8000f84: f887 3023 strb.w r3, [r7, #35] @ 0x23
8000f88: e01f b.n 8000fca <utf16_literal_to_utf8+0x12a>
}
else if (codepoint < 0x800)
8000f8a: 6a7b ldr r3, [r7, #36] @ 0x24
8000f8c: f5b3 6f00 cmp.w r3, #2048 @ 0x800
8000f90: d206 bcs.n 8000fa0 <utf16_literal_to_utf8+0x100>
{
/* two bytes, encoding 110xxxxx 10xxxxxx */
utf8_length = 2;
8000f92: 2302 movs r3, #2
8000f94: f887 3023 strb.w r3, [r7, #35] @ 0x23
first_byte_mark = 0xC0; /* 11000000 */
8000f98: 23c0 movs r3, #192 @ 0xc0
8000f9a: f887 3020 strb.w r3, [r7, #32]
8000f9e: e014 b.n 8000fca <utf16_literal_to_utf8+0x12a>
}
else if (codepoint < 0x10000)
8000fa0: 6a7b ldr r3, [r7, #36] @ 0x24
8000fa2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8000fa6: d206 bcs.n 8000fb6 <utf16_literal_to_utf8+0x116>
{
/* three bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx */
utf8_length = 3;
8000fa8: 2303 movs r3, #3
8000faa: f887 3023 strb.w r3, [r7, #35] @ 0x23
first_byte_mark = 0xE0; /* 11100000 */
8000fae: 23e0 movs r3, #224 @ 0xe0
8000fb0: f887 3020 strb.w r3, [r7, #32]
8000fb4: e009 b.n 8000fca <utf16_literal_to_utf8+0x12a>
}
else if (codepoint <= 0x10FFFF)
8000fb6: 6a7b ldr r3, [r7, #36] @ 0x24
8000fb8: f5b3 1f88 cmp.w r3, #1114112 @ 0x110000
8000fbc: d24f bcs.n 800105e <utf16_literal_to_utf8+0x1be>
{
/* four bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx 10xxxxxx */
utf8_length = 4;
8000fbe: 2304 movs r3, #4
8000fc0: f887 3023 strb.w r3, [r7, #35] @ 0x23
first_byte_mark = 0xF0; /* 11110000 */
8000fc4: 23f0 movs r3, #240 @ 0xf0
8000fc6: f887 3020 strb.w r3, [r7, #32]
/* invalid unicode codepoint */
goto fail;
}
/* encode as utf8 */
for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
8000fca: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
8000fce: 3b01 subs r3, #1
8000fd0: f887 3022 strb.w r3, [r7, #34] @ 0x22
8000fd4: e015 b.n 8001002 <utf16_literal_to_utf8+0x162>
{
/* 10xxxxxx */
(*output_pointer)[utf8_position] = (unsigned char)((codepoint | 0x80) & 0xBF);
8000fd6: 6a7b ldr r3, [r7, #36] @ 0x24
8000fd8: b2db uxtb r3, r3
8000fda: f003 033f and.w r3, r3, #63 @ 0x3f
8000fde: b2da uxtb r2, r3
8000fe0: 687b ldr r3, [r7, #4]
8000fe2: 6819 ldr r1, [r3, #0]
8000fe4: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
8000fe8: 440b add r3, r1
8000fea: f062 027f orn r2, r2, #127 @ 0x7f
8000fee: b2d2 uxtb r2, r2
8000ff0: 701a strb r2, [r3, #0]
codepoint >>= 6;
8000ff2: 6a7b ldr r3, [r7, #36] @ 0x24
8000ff4: 099b lsrs r3, r3, #6
8000ff6: 627b str r3, [r7, #36] @ 0x24
for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
8000ff8: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
8000ffc: 3b01 subs r3, #1
8000ffe: f887 3022 strb.w r3, [r7, #34] @ 0x22
8001002: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
8001006: 2b00 cmp r3, #0
8001008: d1e5 bne.n 8000fd6 <utf16_literal_to_utf8+0x136>
}
/* encode first byte */
if (utf8_length > 1)
800100a: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
800100e: 2b01 cmp r3, #1
8001010: d909 bls.n 8001026 <utf16_literal_to_utf8+0x186>
{
(*output_pointer)[0] = (unsigned char)((codepoint | first_byte_mark) & 0xFF);
8001012: 6a7b ldr r3, [r7, #36] @ 0x24
8001014: b2d9 uxtb r1, r3
8001016: 687b ldr r3, [r7, #4]
8001018: 681b ldr r3, [r3, #0]
800101a: f897 2020 ldrb.w r2, [r7, #32]
800101e: 430a orrs r2, r1
8001020: b2d2 uxtb r2, r2
8001022: 701a strb r2, [r3, #0]
8001024: e007 b.n 8001036 <utf16_literal_to_utf8+0x196>
}
else
{
(*output_pointer)[0] = (unsigned char)(codepoint & 0x7F);
8001026: 6a7b ldr r3, [r7, #36] @ 0x24
8001028: b2da uxtb r2, r3
800102a: 687b ldr r3, [r7, #4]
800102c: 681b ldr r3, [r3, #0]
800102e: f002 027f and.w r2, r2, #127 @ 0x7f
8001032: b2d2 uxtb r2, r2
8001034: 701a strb r2, [r3, #0]
}
*output_pointer += utf8_length;
8001036: 687b ldr r3, [r7, #4]
8001038: 681a ldr r2, [r3, #0]
800103a: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
800103e: 441a add r2, r3
8001040: 687b ldr r3, [r7, #4]
8001042: 601a str r2, [r3, #0]
return sequence_length;
8001044: f897 3021 ldrb.w r3, [r7, #33] @ 0x21
8001048: e00b b.n 8001062 <utf16_literal_to_utf8+0x1c2>
goto fail;
800104a: bf00 nop
800104c: e008 b.n 8001060 <utf16_literal_to_utf8+0x1c0>
goto fail;
800104e: bf00 nop
8001050: e006 b.n 8001060 <utf16_literal_to_utf8+0x1c0>
goto fail;
8001052: bf00 nop
8001054: e004 b.n 8001060 <utf16_literal_to_utf8+0x1c0>
goto fail;
8001056: bf00 nop
8001058: e002 b.n 8001060 <utf16_literal_to_utf8+0x1c0>
goto fail;
800105a: bf00 nop
800105c: e000 b.n 8001060 <utf16_literal_to_utf8+0x1c0>
goto fail;
800105e: bf00 nop
fail:
return 0;
8001060: 2300 movs r3, #0
}
8001062: 4618 mov r0, r3
8001064: 3728 adds r7, #40 @ 0x28
8001066: 46bd mov sp, r7
8001068: bd80 pop {r7, pc}
800106a: bf00 nop
800106c: 000ffc00 .word 0x000ffc00
08001070 <parse_string>:
/* Parse the input text into an unescaped cinput, and populate item. */
static cJSON_bool parse_string(cJSON * const item, parse_buffer * const input_buffer)
{
8001070: b580 push {r7, lr}
8001072: b08a sub sp, #40 @ 0x28
8001074: af00 add r7, sp, #0
8001076: 6078 str r0, [r7, #4]
8001078: 6039 str r1, [r7, #0]
const unsigned char *input_pointer = buffer_at_offset(input_buffer) + 1;
800107a: 683b ldr r3, [r7, #0]
800107c: 681a ldr r2, [r3, #0]
800107e: 683b ldr r3, [r7, #0]
8001080: 689b ldr r3, [r3, #8]
8001082: 3301 adds r3, #1
8001084: 4413 add r3, r2
8001086: 627b str r3, [r7, #36] @ 0x24
const unsigned char *input_end = buffer_at_offset(input_buffer) + 1;
8001088: 683b ldr r3, [r7, #0]
800108a: 681a ldr r2, [r3, #0]
800108c: 683b ldr r3, [r7, #0]
800108e: 689b ldr r3, [r3, #8]
8001090: 3301 adds r3, #1
8001092: 4413 add r3, r2
8001094: 623b str r3, [r7, #32]
unsigned char *output_pointer = NULL;
8001096: 2300 movs r3, #0
8001098: 60fb str r3, [r7, #12]
unsigned char *output = NULL;
800109a: 2300 movs r3, #0
800109c: 61fb str r3, [r7, #28]
/* not a string */
if (buffer_at_offset(input_buffer)[0] != '\"')
800109e: 683b ldr r3, [r7, #0]
80010a0: 681a ldr r2, [r3, #0]
80010a2: 683b ldr r3, [r7, #0]
80010a4: 689b ldr r3, [r3, #8]
80010a6: 4413 add r3, r2
80010a8: 781b ldrb r3, [r3, #0]
80010aa: 2b22 cmp r3, #34 @ 0x22
80010ac: f040 8103 bne.w 80012b6 <parse_string+0x246>
goto fail;
}
{
/* calculate approximate size of the output (overestimate) */
size_t allocation_length = 0;
80010b0: 2300 movs r3, #0
80010b2: 613b str r3, [r7, #16]
size_t skipped_bytes = 0;
80010b4: 2300 movs r3, #0
80010b6: 61bb str r3, [r7, #24]
while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
80010b8: e017 b.n 80010ea <parse_string+0x7a>
{
/* is escape sequence */
if (input_end[0] == '\\')
80010ba: 6a3b ldr r3, [r7, #32]
80010bc: 781b ldrb r3, [r3, #0]
80010be: 2b5c cmp r3, #92 @ 0x5c
80010c0: d110 bne.n 80010e4 <parse_string+0x74>
{
if ((size_t)(input_end + 1 - input_buffer->content) >= input_buffer->length)
80010c2: 6a3b ldr r3, [r7, #32]
80010c4: 1c5a adds r2, r3, #1
80010c6: 683b ldr r3, [r7, #0]
80010c8: 681b ldr r3, [r3, #0]
80010ca: 1ad3 subs r3, r2, r3
80010cc: 461a mov r2, r3
80010ce: 683b ldr r3, [r7, #0]
80010d0: 685b ldr r3, [r3, #4]
80010d2: 429a cmp r2, r3
80010d4: f080 80f1 bcs.w 80012ba <parse_string+0x24a>
{
/* prevent buffer overflow when last input character is a backslash */
goto fail;
}
skipped_bytes++;
80010d8: 69bb ldr r3, [r7, #24]
80010da: 3301 adds r3, #1
80010dc: 61bb str r3, [r7, #24]
input_end++;
80010de: 6a3b ldr r3, [r7, #32]
80010e0: 3301 adds r3, #1
80010e2: 623b str r3, [r7, #32]
}
input_end++;
80010e4: 6a3b ldr r3, [r7, #32]
80010e6: 3301 adds r3, #1
80010e8: 623b str r3, [r7, #32]
while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
80010ea: 683b ldr r3, [r7, #0]
80010ec: 681b ldr r3, [r3, #0]
80010ee: 6a3a ldr r2, [r7, #32]
80010f0: 1ad3 subs r3, r2, r3
80010f2: 461a mov r2, r3
80010f4: 683b ldr r3, [r7, #0]
80010f6: 685b ldr r3, [r3, #4]
80010f8: 429a cmp r2, r3
80010fa: d203 bcs.n 8001104 <parse_string+0x94>
80010fc: 6a3b ldr r3, [r7, #32]
80010fe: 781b ldrb r3, [r3, #0]
8001100: 2b22 cmp r3, #34 @ 0x22
8001102: d1da bne.n 80010ba <parse_string+0x4a>
}
if (((size_t)(input_end - input_buffer->content) >= input_buffer->length) || (*input_end != '\"'))
8001104: 683b ldr r3, [r7, #0]
8001106: 681b ldr r3, [r3, #0]
8001108: 6a3a ldr r2, [r7, #32]
800110a: 1ad3 subs r3, r2, r3
800110c: 461a mov r2, r3
800110e: 683b ldr r3, [r7, #0]
8001110: 685b ldr r3, [r3, #4]
8001112: 429a cmp r2, r3
8001114: f080 80d3 bcs.w 80012be <parse_string+0x24e>
8001118: 6a3b ldr r3, [r7, #32]
800111a: 781b ldrb r3, [r3, #0]
800111c: 2b22 cmp r3, #34 @ 0x22
800111e: f040 80ce bne.w 80012be <parse_string+0x24e>
{
goto fail; /* string ended unexpectedly */
}
/* This is at most how much we need for the output */
allocation_length = (size_t) (input_end - buffer_at_offset(input_buffer)) - skipped_bytes;
8001122: 683b ldr r3, [r7, #0]
8001124: 681a ldr r2, [r3, #0]
8001126: 683b ldr r3, [r7, #0]
8001128: 689b ldr r3, [r3, #8]
800112a: 4413 add r3, r2
800112c: 6a3a ldr r2, [r7, #32]
800112e: 1ad3 subs r3, r2, r3
8001130: 461a mov r2, r3
8001132: 69bb ldr r3, [r7, #24]
8001134: 1ad3 subs r3, r2, r3
8001136: 613b str r3, [r7, #16]
output = (unsigned char*)input_buffer->hooks.allocate(allocation_length + sizeof(""));
8001138: 683b ldr r3, [r7, #0]
800113a: 691b ldr r3, [r3, #16]
800113c: 693a ldr r2, [r7, #16]
800113e: 3201 adds r2, #1
8001140: 4610 mov r0, r2
8001142: 4798 blx r3
8001144: 61f8 str r0, [r7, #28]
if (output == NULL)
8001146: 69fb ldr r3, [r7, #28]
8001148: 2b00 cmp r3, #0
800114a: f000 80ba beq.w 80012c2 <parse_string+0x252>
{
goto fail; /* allocation failure */
}
}
output_pointer = output;
800114e: 69fb ldr r3, [r7, #28]
8001150: 60fb str r3, [r7, #12]
/* loop through the string literal */
while (input_pointer < input_end)
8001152: e094 b.n 800127e <parse_string+0x20e>
{
if (*input_pointer != '\\')
8001154: 6a7b ldr r3, [r7, #36] @ 0x24
8001156: 781b ldrb r3, [r3, #0]
8001158: 2b5c cmp r3, #92 @ 0x5c
800115a: d008 beq.n 800116e <parse_string+0xfe>
{
*output_pointer++ = *input_pointer++;
800115c: 6a7a ldr r2, [r7, #36] @ 0x24
800115e: 1c53 adds r3, r2, #1
8001160: 627b str r3, [r7, #36] @ 0x24
8001162: 68fb ldr r3, [r7, #12]
8001164: 1c59 adds r1, r3, #1
8001166: 60f9 str r1, [r7, #12]
8001168: 7812 ldrb r2, [r2, #0]
800116a: 701a strb r2, [r3, #0]
800116c: e087 b.n 800127e <parse_string+0x20e>
}
/* escape sequence */
else
{
unsigned char sequence_length = 2;
800116e: 2302 movs r3, #2
8001170: 75fb strb r3, [r7, #23]
if ((input_end - input_pointer) < 1)
8001172: 6a3a ldr r2, [r7, #32]
8001174: 6a7b ldr r3, [r7, #36] @ 0x24
8001176: 1ad3 subs r3, r2, r3
8001178: 2b00 cmp r3, #0
800117a: f340 80a4 ble.w 80012c6 <parse_string+0x256>
{
goto fail;
}
switch (input_pointer[1])
800117e: 6a7b ldr r3, [r7, #36] @ 0x24
8001180: 3301 adds r3, #1
8001182: 781b ldrb r3, [r3, #0]
8001184: 2b75 cmp r3, #117 @ 0x75
8001186: f300 80a0 bgt.w 80012ca <parse_string+0x25a>
800118a: 2b5c cmp r3, #92 @ 0x5c
800118c: da04 bge.n 8001198 <parse_string+0x128>
800118e: 2b22 cmp r3, #34 @ 0x22
8001190: d05c beq.n 800124c <parse_string+0x1dc>
8001192: 2b2f cmp r3, #47 @ 0x2f
8001194: d05a beq.n 800124c <parse_string+0x1dc>
goto fail;
}
break;
default:
goto fail;
8001196: e098 b.n 80012ca <parse_string+0x25a>
switch (input_pointer[1])
8001198: 3b5c subs r3, #92 @ 0x5c
800119a: 2b19 cmp r3, #25
800119c: f200 8095 bhi.w 80012ca <parse_string+0x25a>
80011a0: a201 add r2, pc, #4 @ (adr r2, 80011a8 <parse_string+0x138>)
80011a2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80011a6: bf00 nop
80011a8: 0800124d .word 0x0800124d
80011ac: 080012cb .word 0x080012cb
80011b0: 080012cb .word 0x080012cb
80011b4: 080012cb .word 0x080012cb
80011b8: 080012cb .word 0x080012cb
80011bc: 080012cb .word 0x080012cb
80011c0: 08001211 .word 0x08001211
80011c4: 080012cb .word 0x080012cb
80011c8: 080012cb .word 0x080012cb
80011cc: 080012cb .word 0x080012cb
80011d0: 0800121d .word 0x0800121d
80011d4: 080012cb .word 0x080012cb
80011d8: 080012cb .word 0x080012cb
80011dc: 080012cb .word 0x080012cb
80011e0: 080012cb .word 0x080012cb
80011e4: 080012cb .word 0x080012cb
80011e8: 080012cb .word 0x080012cb
80011ec: 080012cb .word 0x080012cb
80011f0: 08001229 .word 0x08001229
80011f4: 080012cb .word 0x080012cb
80011f8: 080012cb .word 0x080012cb
80011fc: 080012cb .word 0x080012cb
8001200: 08001235 .word 0x08001235
8001204: 080012cb .word 0x080012cb
8001208: 08001241 .word 0x08001241
800120c: 0800125d .word 0x0800125d
*output_pointer++ = '\b';
8001210: 68fb ldr r3, [r7, #12]
8001212: 1c5a adds r2, r3, #1
8001214: 60fa str r2, [r7, #12]
8001216: 2208 movs r2, #8
8001218: 701a strb r2, [r3, #0]
break;
800121a: e02c b.n 8001276 <parse_string+0x206>
*output_pointer++ = '\f';
800121c: 68fb ldr r3, [r7, #12]
800121e: 1c5a adds r2, r3, #1
8001220: 60fa str r2, [r7, #12]
8001222: 220c movs r2, #12
8001224: 701a strb r2, [r3, #0]
break;
8001226: e026 b.n 8001276 <parse_string+0x206>
*output_pointer++ = '\n';
8001228: 68fb ldr r3, [r7, #12]
800122a: 1c5a adds r2, r3, #1
800122c: 60fa str r2, [r7, #12]
800122e: 220a movs r2, #10
8001230: 701a strb r2, [r3, #0]
break;
8001232: e020 b.n 8001276 <parse_string+0x206>
*output_pointer++ = '\r';
8001234: 68fb ldr r3, [r7, #12]
8001236: 1c5a adds r2, r3, #1
8001238: 60fa str r2, [r7, #12]
800123a: 220d movs r2, #13
800123c: 701a strb r2, [r3, #0]
break;
800123e: e01a b.n 8001276 <parse_string+0x206>
*output_pointer++ = '\t';
8001240: 68fb ldr r3, [r7, #12]
8001242: 1c5a adds r2, r3, #1
8001244: 60fa str r2, [r7, #12]
8001246: 2209 movs r2, #9
8001248: 701a strb r2, [r3, #0]
break;
800124a: e014 b.n 8001276 <parse_string+0x206>
*output_pointer++ = input_pointer[1];
800124c: 6a7b ldr r3, [r7, #36] @ 0x24
800124e: 1c5a adds r2, r3, #1
8001250: 68fb ldr r3, [r7, #12]
8001252: 1c59 adds r1, r3, #1
8001254: 60f9 str r1, [r7, #12]
8001256: 7812 ldrb r2, [r2, #0]
8001258: 701a strb r2, [r3, #0]
break;
800125a: e00c b.n 8001276 <parse_string+0x206>
sequence_length = utf16_literal_to_utf8(input_pointer, input_end, &output_pointer);
800125c: f107 030c add.w r3, r7, #12
8001260: 461a mov r2, r3
8001262: 6a39 ldr r1, [r7, #32]
8001264: 6a78 ldr r0, [r7, #36] @ 0x24
8001266: f7ff fe1b bl 8000ea0 <utf16_literal_to_utf8>
800126a: 4603 mov r3, r0
800126c: 75fb strb r3, [r7, #23]
if (sequence_length == 0)
800126e: 7dfb ldrb r3, [r7, #23]
8001270: 2b00 cmp r3, #0
8001272: d02c beq.n 80012ce <parse_string+0x25e>
break;
8001274: bf00 nop
}
input_pointer += sequence_length;
8001276: 7dfb ldrb r3, [r7, #23]
8001278: 6a7a ldr r2, [r7, #36] @ 0x24
800127a: 4413 add r3, r2
800127c: 627b str r3, [r7, #36] @ 0x24
while (input_pointer < input_end)
800127e: 6a7a ldr r2, [r7, #36] @ 0x24
8001280: 6a3b ldr r3, [r7, #32]
8001282: 429a cmp r2, r3
8001284: f4ff af66 bcc.w 8001154 <parse_string+0xe4>
}
}
/* zero terminate the output */
*output_pointer = '\0';
8001288: 68fb ldr r3, [r7, #12]
800128a: 2200 movs r2, #0
800128c: 701a strb r2, [r3, #0]
item->type = cJSON_String;
800128e: 687b ldr r3, [r7, #4]
8001290: 2210 movs r2, #16
8001292: 60da str r2, [r3, #12]
item->valuestring = (char*)output;
8001294: 687b ldr r3, [r7, #4]
8001296: 69fa ldr r2, [r7, #28]
8001298: 611a str r2, [r3, #16]
input_buffer->offset = (size_t) (input_end - input_buffer->content);
800129a: 683b ldr r3, [r7, #0]
800129c: 681b ldr r3, [r3, #0]
800129e: 6a3a ldr r2, [r7, #32]
80012a0: 1ad3 subs r3, r2, r3
80012a2: 461a mov r2, r3
80012a4: 683b ldr r3, [r7, #0]
80012a6: 609a str r2, [r3, #8]
input_buffer->offset++;
80012a8: 683b ldr r3, [r7, #0]
80012aa: 689b ldr r3, [r3, #8]
80012ac: 1c5a adds r2, r3, #1
80012ae: 683b ldr r3, [r7, #0]
80012b0: 609a str r2, [r3, #8]
return true;
80012b2: 2301 movs r3, #1
80012b4: e020 b.n 80012f8 <parse_string+0x288>
goto fail;
80012b6: bf00 nop
80012b8: e00a b.n 80012d0 <parse_string+0x260>
goto fail;
80012ba: bf00 nop
80012bc: e008 b.n 80012d0 <parse_string+0x260>
goto fail; /* string ended unexpectedly */
80012be: bf00 nop
80012c0: e006 b.n 80012d0 <parse_string+0x260>
goto fail; /* allocation failure */
80012c2: bf00 nop
80012c4: e004 b.n 80012d0 <parse_string+0x260>
goto fail;
80012c6: bf00 nop
80012c8: e002 b.n 80012d0 <parse_string+0x260>
goto fail;
80012ca: bf00 nop
80012cc: e000 b.n 80012d0 <parse_string+0x260>
goto fail;
80012ce: bf00 nop
fail:
if (output != NULL)
80012d0: 69fb ldr r3, [r7, #28]
80012d2: 2b00 cmp r3, #0
80012d4: d005 beq.n 80012e2 <parse_string+0x272>
{
input_buffer->hooks.deallocate(output);
80012d6: 683b ldr r3, [r7, #0]
80012d8: 695b ldr r3, [r3, #20]
80012da: 69f8 ldr r0, [r7, #28]
80012dc: 4798 blx r3
output = NULL;
80012de: 2300 movs r3, #0
80012e0: 61fb str r3, [r7, #28]
}
if (input_pointer != NULL)
80012e2: 6a7b ldr r3, [r7, #36] @ 0x24
80012e4: 2b00 cmp r3, #0
80012e6: d006 beq.n 80012f6 <parse_string+0x286>
{
input_buffer->offset = (size_t)(input_pointer - input_buffer->content);
80012e8: 683b ldr r3, [r7, #0]
80012ea: 681b ldr r3, [r3, #0]
80012ec: 6a7a ldr r2, [r7, #36] @ 0x24
80012ee: 1ad3 subs r3, r2, r3
80012f0: 461a mov r2, r3
80012f2: 683b ldr r3, [r7, #0]
80012f4: 609a str r2, [r3, #8]
}
return false;
80012f6: 2300 movs r3, #0
}
80012f8: 4618 mov r0, r3
80012fa: 3728 adds r7, #40 @ 0x28
80012fc: 46bd mov sp, r7
80012fe: bd80 pop {r7, pc}
08001300 <buffer_skip_whitespace>:
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer);
static cJSON_bool print_object(const cJSON * const item, printbuffer * const output_buffer);
/* Utility to jump whitespace and cr/lf */
static parse_buffer *buffer_skip_whitespace(parse_buffer * const buffer)
{
8001300: b480 push {r7}
8001302: b083 sub sp, #12
8001304: af00 add r7, sp, #0
8001306: 6078 str r0, [r7, #4]
if ((buffer == NULL) || (buffer->content == NULL))
8001308: 687b ldr r3, [r7, #4]
800130a: 2b00 cmp r3, #0
800130c: d003 beq.n 8001316 <buffer_skip_whitespace+0x16>
800130e: 687b ldr r3, [r7, #4]
8001310: 681b ldr r3, [r3, #0]
8001312: 2b00 cmp r3, #0
8001314: d101 bne.n 800131a <buffer_skip_whitespace+0x1a>
{
return NULL;
8001316: 2300 movs r3, #0
8001318: e02c b.n 8001374 <buffer_skip_whitespace+0x74>
}
if (cannot_access_at_index(buffer, 0))
800131a: 687b ldr r3, [r7, #4]
800131c: 2b00 cmp r3, #0
800131e: d005 beq.n 800132c <buffer_skip_whitespace+0x2c>
8001320: 687b ldr r3, [r7, #4]
8001322: 689a ldr r2, [r3, #8]
8001324: 687b ldr r3, [r7, #4]
8001326: 685b ldr r3, [r3, #4]
8001328: 429a cmp r2, r3
800132a: d306 bcc.n 800133a <buffer_skip_whitespace+0x3a>
{
return buffer;
800132c: 687b ldr r3, [r7, #4]
800132e: e021 b.n 8001374 <buffer_skip_whitespace+0x74>
}
while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
{
buffer->offset++;
8001330: 687b ldr r3, [r7, #4]
8001332: 689b ldr r3, [r3, #8]
8001334: 1c5a adds r2, r3, #1
8001336: 687b ldr r3, [r7, #4]
8001338: 609a str r2, [r3, #8]
while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
800133a: 687b ldr r3, [r7, #4]
800133c: 2b00 cmp r3, #0
800133e: d00d beq.n 800135c <buffer_skip_whitespace+0x5c>
8001340: 687b ldr r3, [r7, #4]
8001342: 689a ldr r2, [r3, #8]
8001344: 687b ldr r3, [r7, #4]
8001346: 685b ldr r3, [r3, #4]
8001348: 429a cmp r2, r3
800134a: d207 bcs.n 800135c <buffer_skip_whitespace+0x5c>
800134c: 687b ldr r3, [r7, #4]
800134e: 681a ldr r2, [r3, #0]
8001350: 687b ldr r3, [r7, #4]
8001352: 689b ldr r3, [r3, #8]
8001354: 4413 add r3, r2
8001356: 781b ldrb r3, [r3, #0]
8001358: 2b20 cmp r3, #32
800135a: d9e9 bls.n 8001330 <buffer_skip_whitespace+0x30>
}
if (buffer->offset == buffer->length)
800135c: 687b ldr r3, [r7, #4]
800135e: 689a ldr r2, [r3, #8]
8001360: 687b ldr r3, [r7, #4]
8001362: 685b ldr r3, [r3, #4]
8001364: 429a cmp r2, r3
8001366: d104 bne.n 8001372 <buffer_skip_whitespace+0x72>
{
buffer->offset--;
8001368: 687b ldr r3, [r7, #4]
800136a: 689b ldr r3, [r3, #8]
800136c: 1e5a subs r2, r3, #1
800136e: 687b ldr r3, [r7, #4]
8001370: 609a str r2, [r3, #8]
}
return buffer;
8001372: 687b ldr r3, [r7, #4]
}
8001374: 4618 mov r0, r3
8001376: 370c adds r7, #12
8001378: 46bd mov sp, r7
800137a: f85d 7b04 ldr.w r7, [sp], #4
800137e: 4770 bx lr
08001380 <skip_utf8_bom>:
/* skip the UTF-8 BOM (byte order mark) if it is at the beginning of a buffer */
static parse_buffer *skip_utf8_bom(parse_buffer * const buffer)
{
8001380: b580 push {r7, lr}
8001382: b082 sub sp, #8
8001384: af00 add r7, sp, #0
8001386: 6078 str r0, [r7, #4]
if ((buffer == NULL) || (buffer->content == NULL) || (buffer->offset != 0))
8001388: 687b ldr r3, [r7, #4]
800138a: 2b00 cmp r3, #0
800138c: d007 beq.n 800139e <skip_utf8_bom+0x1e>
800138e: 687b ldr r3, [r7, #4]
8001390: 681b ldr r3, [r3, #0]
8001392: 2b00 cmp r3, #0
8001394: d003 beq.n 800139e <skip_utf8_bom+0x1e>
8001396: 687b ldr r3, [r7, #4]
8001398: 689b ldr r3, [r3, #8]
800139a: 2b00 cmp r3, #0
800139c: d001 beq.n 80013a2 <skip_utf8_bom+0x22>
{
return NULL;
800139e: 2300 movs r3, #0
80013a0: e01c b.n 80013dc <skip_utf8_bom+0x5c>
}
if (can_access_at_index(buffer, 4) && (strncmp((const char*)buffer_at_offset(buffer), "\xEF\xBB\xBF", 3) == 0))
80013a2: 687b ldr r3, [r7, #4]
80013a4: 2b00 cmp r3, #0
80013a6: d018 beq.n 80013da <skip_utf8_bom+0x5a>
80013a8: 687b ldr r3, [r7, #4]
80013aa: 689b ldr r3, [r3, #8]
80013ac: 1d1a adds r2, r3, #4
80013ae: 687b ldr r3, [r7, #4]
80013b0: 685b ldr r3, [r3, #4]
80013b2: 429a cmp r2, r3
80013b4: d211 bcs.n 80013da <skip_utf8_bom+0x5a>
80013b6: 687b ldr r3, [r7, #4]
80013b8: 681a ldr r2, [r3, #0]
80013ba: 687b ldr r3, [r7, #4]
80013bc: 689b ldr r3, [r3, #8]
80013be: 4413 add r3, r2
80013c0: 2203 movs r2, #3
80013c2: 4908 ldr r1, [pc, #32] @ (80013e4 <skip_utf8_bom+0x64>)
80013c4: 4618 mov r0, r3
80013c6: f029 fccb bl 802ad60 <strncmp>
80013ca: 4603 mov r3, r0
80013cc: 2b00 cmp r3, #0
80013ce: d104 bne.n 80013da <skip_utf8_bom+0x5a>
{
buffer->offset += 3;
80013d0: 687b ldr r3, [r7, #4]
80013d2: 689b ldr r3, [r3, #8]
80013d4: 1cda adds r2, r3, #3
80013d6: 687b ldr r3, [r7, #4]
80013d8: 609a str r2, [r3, #8]
}
return buffer;
80013da: 687b ldr r3, [r7, #4]
}
80013dc: 4618 mov r0, r3
80013de: 3708 adds r7, #8
80013e0: 46bd mov sp, r7
80013e2: bd80 pop {r7, pc}
80013e4: 0802d4e8 .word 0x0802d4e8
080013e8 <cJSON_ParseWithOpts>:
CJSON_PUBLIC(cJSON *) cJSON_ParseWithOpts(const char *value, const char **return_parse_end, cJSON_bool require_null_terminated)
{
80013e8: b580 push {r7, lr}
80013ea: b086 sub sp, #24
80013ec: af00 add r7, sp, #0
80013ee: 60f8 str r0, [r7, #12]
80013f0: 60b9 str r1, [r7, #8]
80013f2: 607a str r2, [r7, #4]
size_t buffer_length;
if (NULL == value)
80013f4: 68fb ldr r3, [r7, #12]
80013f6: 2b00 cmp r3, #0
80013f8: d101 bne.n 80013fe <cJSON_ParseWithOpts+0x16>
{
return NULL;
80013fa: 2300 movs r3, #0
80013fc: e00c b.n 8001418 <cJSON_ParseWithOpts+0x30>
}
/* Adding null character size due to require_null_terminated. */
buffer_length = strlen(value) + sizeof("");
80013fe: 68f8 ldr r0, [r7, #12]
8001400: f7fe ffce bl 80003a0 <strlen>
8001404: 4603 mov r3, r0
8001406: 3301 adds r3, #1
8001408: 617b str r3, [r7, #20]
return cJSON_ParseWithLengthOpts(value, buffer_length, return_parse_end, require_null_terminated);
800140a: 687b ldr r3, [r7, #4]
800140c: 68ba ldr r2, [r7, #8]
800140e: 6979 ldr r1, [r7, #20]
8001410: 68f8 ldr r0, [r7, #12]
8001412: f000 f805 bl 8001420 <cJSON_ParseWithLengthOpts>
8001416: 4603 mov r3, r0
}
8001418: 4618 mov r0, r3
800141a: 3718 adds r7, #24
800141c: 46bd mov sp, r7
800141e: bd80 pop {r7, pc}
08001420 <cJSON_ParseWithLengthOpts>:
/* Parse an object - create a new root, and populate. */
CJSON_PUBLIC(cJSON *) cJSON_ParseWithLengthOpts(const char *value, size_t buffer_length, const char **return_parse_end, cJSON_bool require_null_terminated)
{
8001420: b580 push {r7, lr}
8001422: b08e sub sp, #56 @ 0x38
8001424: af00 add r7, sp, #0
8001426: 60f8 str r0, [r7, #12]
8001428: 60b9 str r1, [r7, #8]
800142a: 607a str r2, [r7, #4]
800142c: 603b str r3, [r7, #0]
parse_buffer buffer = { 0, 0, 0, 0, { 0, 0, 0 } };
800142e: f107 0318 add.w r3, r7, #24
8001432: 2200 movs r2, #0
8001434: 601a str r2, [r3, #0]
8001436: 605a str r2, [r3, #4]
8001438: 609a str r2, [r3, #8]
800143a: 60da str r2, [r3, #12]
800143c: 611a str r2, [r3, #16]
800143e: 615a str r2, [r3, #20]
8001440: 619a str r2, [r3, #24]
cJSON *item = NULL;
8001442: 2300 movs r3, #0
8001444: 637b str r3, [r7, #52] @ 0x34
/* reset error position */
global_error.json = NULL;
8001446: 4b41 ldr r3, [pc, #260] @ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
8001448: 2200 movs r2, #0
800144a: 601a str r2, [r3, #0]
global_error.position = 0;
800144c: 4b3f ldr r3, [pc, #252] @ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
800144e: 2200 movs r2, #0
8001450: 605a str r2, [r3, #4]
if (value == NULL || 0 == buffer_length)
8001452: 68fb ldr r3, [r7, #12]
8001454: 2b00 cmp r3, #0
8001456: d042 beq.n 80014de <cJSON_ParseWithLengthOpts+0xbe>
8001458: 68bb ldr r3, [r7, #8]
800145a: 2b00 cmp r3, #0
800145c: d03f beq.n 80014de <cJSON_ParseWithLengthOpts+0xbe>
{
goto fail;
}
buffer.content = (const unsigned char*)value;
800145e: 68fb ldr r3, [r7, #12]
8001460: 61bb str r3, [r7, #24]
buffer.length = buffer_length;
8001462: 68bb ldr r3, [r7, #8]
8001464: 61fb str r3, [r7, #28]
buffer.offset = 0;
8001466: 2300 movs r3, #0
8001468: 623b str r3, [r7, #32]
buffer.hooks = global_hooks;
800146a: 4a39 ldr r2, [pc, #228] @ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
800146c: f107 0328 add.w r3, r7, #40 @ 0x28
8001470: ca07 ldmia r2, {r0, r1, r2}
8001472: e883 0007 stmia.w r3, {r0, r1, r2}
item = cJSON_New_Item(&global_hooks);
8001476: 4836 ldr r0, [pc, #216] @ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
8001478: f7ff fb72 bl 8000b60 <cJSON_New_Item>
800147c: 6378 str r0, [r7, #52] @ 0x34
if (item == NULL) /* memory fail */
800147e: 6b7b ldr r3, [r7, #52] @ 0x34
8001480: 2b00 cmp r3, #0
8001482: d02e beq.n 80014e2 <cJSON_ParseWithLengthOpts+0xc2>
{
goto fail;
}
if (!parse_value(item, buffer_skip_whitespace(skip_utf8_bom(&buffer))))
8001484: f107 0318 add.w r3, r7, #24
8001488: 4618 mov r0, r3
800148a: f7ff ff79 bl 8001380 <skip_utf8_bom>
800148e: 4603 mov r3, r0
8001490: 4618 mov r0, r3
8001492: f7ff ff35 bl 8001300 <buffer_skip_whitespace>
8001496: 4603 mov r3, r0
8001498: 4619 mov r1, r3
800149a: 6b78 ldr r0, [r7, #52] @ 0x34
800149c: f000 f868 bl 8001570 <parse_value>
80014a0: 4603 mov r3, r0
80014a2: 2b00 cmp r3, #0
80014a4: d01f beq.n 80014e6 <cJSON_ParseWithLengthOpts+0xc6>
/* parse failure. ep is set. */
goto fail;
}
/* if we require null-terminated JSON without appended garbage, skip and then check for a null terminator */
if (require_null_terminated)
80014a6: 683b ldr r3, [r7, #0]
80014a8: 2b00 cmp r3, #0
80014aa: d00e beq.n 80014ca <cJSON_ParseWithLengthOpts+0xaa>
{
buffer_skip_whitespace(&buffer);
80014ac: f107 0318 add.w r3, r7, #24
80014b0: 4618 mov r0, r3
80014b2: f7ff ff25 bl 8001300 <buffer_skip_whitespace>
if ((buffer.offset >= buffer.length) || buffer_at_offset(&buffer)[0] != '\0')
80014b6: 6a3a ldr r2, [r7, #32]
80014b8: 69fb ldr r3, [r7, #28]
80014ba: 429a cmp r2, r3
80014bc: d215 bcs.n 80014ea <cJSON_ParseWithLengthOpts+0xca>
80014be: 69ba ldr r2, [r7, #24]
80014c0: 6a3b ldr r3, [r7, #32]
80014c2: 4413 add r3, r2
80014c4: 781b ldrb r3, [r3, #0]
80014c6: 2b00 cmp r3, #0
80014c8: d10f bne.n 80014ea <cJSON_ParseWithLengthOpts+0xca>
{
goto fail;
}
}
if (return_parse_end)
80014ca: 687b ldr r3, [r7, #4]
80014cc: 2b00 cmp r3, #0
80014ce: d004 beq.n 80014da <cJSON_ParseWithLengthOpts+0xba>
{
*return_parse_end = (const char*)buffer_at_offset(&buffer);
80014d0: 69ba ldr r2, [r7, #24]
80014d2: 6a3b ldr r3, [r7, #32]
80014d4: 441a add r2, r3
80014d6: 687b ldr r3, [r7, #4]
80014d8: 601a str r2, [r3, #0]
}
return item;
80014da: 6b7b ldr r3, [r7, #52] @ 0x34
80014dc: e031 b.n 8001542 <cJSON_ParseWithLengthOpts+0x122>
goto fail;
80014de: bf00 nop
80014e0: e004 b.n 80014ec <cJSON_ParseWithLengthOpts+0xcc>
goto fail;
80014e2: bf00 nop
80014e4: e002 b.n 80014ec <cJSON_ParseWithLengthOpts+0xcc>
goto fail;
80014e6: bf00 nop
80014e8: e000 b.n 80014ec <cJSON_ParseWithLengthOpts+0xcc>
goto fail;
80014ea: bf00 nop
fail:
if (item != NULL)
80014ec: 6b7b ldr r3, [r7, #52] @ 0x34
80014ee: 2b00 cmp r3, #0
80014f0: d002 beq.n 80014f8 <cJSON_ParseWithLengthOpts+0xd8>
{
cJSON_Delete(item);
80014f2: 6b78 ldr r0, [r7, #52] @ 0x34
80014f4: f7ff fb4a bl 8000b8c <cJSON_Delete>
}
if (value != NULL)
80014f8: 68fb ldr r3, [r7, #12]
80014fa: 2b00 cmp r3, #0
80014fc: d020 beq.n 8001540 <cJSON_ParseWithLengthOpts+0x120>
{
error local_error;
local_error.json = (const unsigned char*)value;
80014fe: 68fb ldr r3, [r7, #12]
8001500: 613b str r3, [r7, #16]
local_error.position = 0;
8001502: 2300 movs r3, #0
8001504: 617b str r3, [r7, #20]
if (buffer.offset < buffer.length)
8001506: 6a3a ldr r2, [r7, #32]
8001508: 69fb ldr r3, [r7, #28]
800150a: 429a cmp r2, r3
800150c: d202 bcs.n 8001514 <cJSON_ParseWithLengthOpts+0xf4>
{
local_error.position = buffer.offset;
800150e: 6a3b ldr r3, [r7, #32]
8001510: 617b str r3, [r7, #20]
8001512: e005 b.n 8001520 <cJSON_ParseWithLengthOpts+0x100>
}
else if (buffer.length > 0)
8001514: 69fb ldr r3, [r7, #28]
8001516: 2b00 cmp r3, #0
8001518: d002 beq.n 8001520 <cJSON_ParseWithLengthOpts+0x100>
{
local_error.position = buffer.length - 1;
800151a: 69fb ldr r3, [r7, #28]
800151c: 3b01 subs r3, #1
800151e: 617b str r3, [r7, #20]
}
if (return_parse_end != NULL)
8001520: 687b ldr r3, [r7, #4]
8001522: 2b00 cmp r3, #0
8001524: d004 beq.n 8001530 <cJSON_ParseWithLengthOpts+0x110>
{
*return_parse_end = (const char*)local_error.json + local_error.position;
8001526: 693a ldr r2, [r7, #16]
8001528: 697b ldr r3, [r7, #20]
800152a: 441a add r2, r3
800152c: 687b ldr r3, [r7, #4]
800152e: 601a str r2, [r3, #0]
}
global_error = local_error;
8001530: 4b06 ldr r3, [pc, #24] @ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
8001532: 461a mov r2, r3
8001534: f107 0310 add.w r3, r7, #16
8001538: e893 0003 ldmia.w r3, {r0, r1}
800153c: e882 0003 stmia.w r2, {r0, r1}
}
return NULL;
8001540: 2300 movs r3, #0
}
8001542: 4618 mov r0, r3
8001544: 3738 adds r7, #56 @ 0x38
8001546: 46bd mov sp, r7
8001548: bd80 pop {r7, pc}
800154a: bf00 nop
800154c: 24000240 .word 0x24000240
8001550: 24000000 .word 0x24000000
08001554 <cJSON_Parse>:
/* Default options for cJSON_Parse */
CJSON_PUBLIC(cJSON *) cJSON_Parse(const char *value)
{
8001554: b580 push {r7, lr}
8001556: b082 sub sp, #8
8001558: af00 add r7, sp, #0
800155a: 6078 str r0, [r7, #4]
return cJSON_ParseWithOpts(value, 0, 0);
800155c: 2200 movs r2, #0
800155e: 2100 movs r1, #0
8001560: 6878 ldr r0, [r7, #4]
8001562: f7ff ff41 bl 80013e8 <cJSON_ParseWithOpts>
8001566: 4603 mov r3, r0
}
8001568: 4618 mov r0, r3
800156a: 3708 adds r7, #8
800156c: 46bd mov sp, r7
800156e: bd80 pop {r7, pc}
08001570 <parse_value>:
return print_value(item, &p);
}
/* Parser core - when encountering text, process appropriately. */
static cJSON_bool parse_value(cJSON * const item, parse_buffer * const input_buffer)
{
8001570: b580 push {r7, lr}
8001572: b082 sub sp, #8
8001574: af00 add r7, sp, #0
8001576: 6078 str r0, [r7, #4]
8001578: 6039 str r1, [r7, #0]
if ((input_buffer == NULL) || (input_buffer->content == NULL))
800157a: 683b ldr r3, [r7, #0]
800157c: 2b00 cmp r3, #0
800157e: d003 beq.n 8001588 <parse_value+0x18>
8001580: 683b ldr r3, [r7, #0]
8001582: 681b ldr r3, [r3, #0]
8001584: 2b00 cmp r3, #0
8001586: d101 bne.n 800158c <parse_value+0x1c>
{
return false; /* no input */
8001588: 2300 movs r3, #0
800158a: e0d2 b.n 8001732 <parse_value+0x1c2>
}
/* parse the different types of values */
/* null */
if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "null", 4) == 0))
800158c: 683b ldr r3, [r7, #0]
800158e: 2b00 cmp r3, #0
8001590: d01d beq.n 80015ce <parse_value+0x5e>
8001592: 683b ldr r3, [r7, #0]
8001594: 689b ldr r3, [r3, #8]
8001596: 1d1a adds r2, r3, #4
8001598: 683b ldr r3, [r7, #0]
800159a: 685b ldr r3, [r3, #4]
800159c: 429a cmp r2, r3
800159e: d816 bhi.n 80015ce <parse_value+0x5e>
80015a0: 683b ldr r3, [r7, #0]
80015a2: 681a ldr r2, [r3, #0]
80015a4: 683b ldr r3, [r7, #0]
80015a6: 689b ldr r3, [r3, #8]
80015a8: 4413 add r3, r2
80015aa: 2204 movs r2, #4
80015ac: 4963 ldr r1, [pc, #396] @ (800173c <parse_value+0x1cc>)
80015ae: 4618 mov r0, r3
80015b0: f029 fbd6 bl 802ad60 <strncmp>
80015b4: 4603 mov r3, r0
80015b6: 2b00 cmp r3, #0
80015b8: d109 bne.n 80015ce <parse_value+0x5e>
{
item->type = cJSON_NULL;
80015ba: 687b ldr r3, [r7, #4]
80015bc: 2204 movs r2, #4
80015be: 60da str r2, [r3, #12]
input_buffer->offset += 4;
80015c0: 683b ldr r3, [r7, #0]
80015c2: 689b ldr r3, [r3, #8]
80015c4: 1d1a adds r2, r3, #4
80015c6: 683b ldr r3, [r7, #0]
80015c8: 609a str r2, [r3, #8]
return true;
80015ca: 2301 movs r3, #1
80015cc: e0b1 b.n 8001732 <parse_value+0x1c2>
}
/* false */
if (can_read(input_buffer, 5) && (strncmp((const char*)buffer_at_offset(input_buffer), "false", 5) == 0))
80015ce: 683b ldr r3, [r7, #0]
80015d0: 2b00 cmp r3, #0
80015d2: d01d beq.n 8001610 <parse_value+0xa0>
80015d4: 683b ldr r3, [r7, #0]
80015d6: 689b ldr r3, [r3, #8]
80015d8: 1d5a adds r2, r3, #5
80015da: 683b ldr r3, [r7, #0]
80015dc: 685b ldr r3, [r3, #4]
80015de: 429a cmp r2, r3
80015e0: d816 bhi.n 8001610 <parse_value+0xa0>
80015e2: 683b ldr r3, [r7, #0]
80015e4: 681a ldr r2, [r3, #0]
80015e6: 683b ldr r3, [r7, #0]
80015e8: 689b ldr r3, [r3, #8]
80015ea: 4413 add r3, r2
80015ec: 2205 movs r2, #5
80015ee: 4954 ldr r1, [pc, #336] @ (8001740 <parse_value+0x1d0>)
80015f0: 4618 mov r0, r3
80015f2: f029 fbb5 bl 802ad60 <strncmp>
80015f6: 4603 mov r3, r0
80015f8: 2b00 cmp r3, #0
80015fa: d109 bne.n 8001610 <parse_value+0xa0>
{
item->type = cJSON_False;
80015fc: 687b ldr r3, [r7, #4]
80015fe: 2201 movs r2, #1
8001600: 60da str r2, [r3, #12]
input_buffer->offset += 5;
8001602: 683b ldr r3, [r7, #0]
8001604: 689b ldr r3, [r3, #8]
8001606: 1d5a adds r2, r3, #5
8001608: 683b ldr r3, [r7, #0]
800160a: 609a str r2, [r3, #8]
return true;
800160c: 2301 movs r3, #1
800160e: e090 b.n 8001732 <parse_value+0x1c2>
}
/* true */
if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "true", 4) == 0))
8001610: 683b ldr r3, [r7, #0]
8001612: 2b00 cmp r3, #0
8001614: d020 beq.n 8001658 <parse_value+0xe8>
8001616: 683b ldr r3, [r7, #0]
8001618: 689b ldr r3, [r3, #8]
800161a: 1d1a adds r2, r3, #4
800161c: 683b ldr r3, [r7, #0]
800161e: 685b ldr r3, [r3, #4]
8001620: 429a cmp r2, r3
8001622: d819 bhi.n 8001658 <parse_value+0xe8>
8001624: 683b ldr r3, [r7, #0]
8001626: 681a ldr r2, [r3, #0]
8001628: 683b ldr r3, [r7, #0]
800162a: 689b ldr r3, [r3, #8]
800162c: 4413 add r3, r2
800162e: 2204 movs r2, #4
8001630: 4944 ldr r1, [pc, #272] @ (8001744 <parse_value+0x1d4>)
8001632: 4618 mov r0, r3
8001634: f029 fb94 bl 802ad60 <strncmp>
8001638: 4603 mov r3, r0
800163a: 2b00 cmp r3, #0
800163c: d10c bne.n 8001658 <parse_value+0xe8>
{
item->type = cJSON_True;
800163e: 687b ldr r3, [r7, #4]
8001640: 2202 movs r2, #2
8001642: 60da str r2, [r3, #12]
item->valueint = 1;
8001644: 687b ldr r3, [r7, #4]
8001646: 2201 movs r2, #1
8001648: 615a str r2, [r3, #20]
input_buffer->offset += 4;
800164a: 683b ldr r3, [r7, #0]
800164c: 689b ldr r3, [r3, #8]
800164e: 1d1a adds r2, r3, #4
8001650: 683b ldr r3, [r7, #0]
8001652: 609a str r2, [r3, #8]
return true;
8001654: 2301 movs r3, #1
8001656: e06c b.n 8001732 <parse_value+0x1c2>
}
/* string */
if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '\"'))
8001658: 683b ldr r3, [r7, #0]
800165a: 2b00 cmp r3, #0
800165c: d013 beq.n 8001686 <parse_value+0x116>
800165e: 683b ldr r3, [r7, #0]
8001660: 689a ldr r2, [r3, #8]
8001662: 683b ldr r3, [r7, #0]
8001664: 685b ldr r3, [r3, #4]
8001666: 429a cmp r2, r3
8001668: d20d bcs.n 8001686 <parse_value+0x116>
800166a: 683b ldr r3, [r7, #0]
800166c: 681a ldr r2, [r3, #0]
800166e: 683b ldr r3, [r7, #0]
8001670: 689b ldr r3, [r3, #8]
8001672: 4413 add r3, r2
8001674: 781b ldrb r3, [r3, #0]
8001676: 2b22 cmp r3, #34 @ 0x22
8001678: d105 bne.n 8001686 <parse_value+0x116>
{
return parse_string(item, input_buffer);
800167a: 6839 ldr r1, [r7, #0]
800167c: 6878 ldr r0, [r7, #4]
800167e: f7ff fcf7 bl 8001070 <parse_string>
8001682: 4603 mov r3, r0
8001684: e055 b.n 8001732 <parse_value+0x1c2>
}
/* number */
if (can_access_at_index(input_buffer, 0) && ((buffer_at_offset(input_buffer)[0] == '-') || ((buffer_at_offset(input_buffer)[0] >= '0') && (buffer_at_offset(input_buffer)[0] <= '9'))))
8001686: 683b ldr r3, [r7, #0]
8001688: 2b00 cmp r3, #0
800168a: d023 beq.n 80016d4 <parse_value+0x164>
800168c: 683b ldr r3, [r7, #0]
800168e: 689a ldr r2, [r3, #8]
8001690: 683b ldr r3, [r7, #0]
8001692: 685b ldr r3, [r3, #4]
8001694: 429a cmp r2, r3
8001696: d21d bcs.n 80016d4 <parse_value+0x164>
8001698: 683b ldr r3, [r7, #0]
800169a: 681a ldr r2, [r3, #0]
800169c: 683b ldr r3, [r7, #0]
800169e: 689b ldr r3, [r3, #8]
80016a0: 4413 add r3, r2
80016a2: 781b ldrb r3, [r3, #0]
80016a4: 2b2d cmp r3, #45 @ 0x2d
80016a6: d00f beq.n 80016c8 <parse_value+0x158>
80016a8: 683b ldr r3, [r7, #0]
80016aa: 681a ldr r2, [r3, #0]
80016ac: 683b ldr r3, [r7, #0]
80016ae: 689b ldr r3, [r3, #8]
80016b0: 4413 add r3, r2
80016b2: 781b ldrb r3, [r3, #0]
80016b4: 2b2f cmp r3, #47 @ 0x2f
80016b6: d90d bls.n 80016d4 <parse_value+0x164>
80016b8: 683b ldr r3, [r7, #0]
80016ba: 681a ldr r2, [r3, #0]
80016bc: 683b ldr r3, [r7, #0]
80016be: 689b ldr r3, [r3, #8]
80016c0: 4413 add r3, r2
80016c2: 781b ldrb r3, [r3, #0]
80016c4: 2b39 cmp r3, #57 @ 0x39
80016c6: d805 bhi.n 80016d4 <parse_value+0x164>
{
return parse_number(item, input_buffer);
80016c8: 6839 ldr r1, [r7, #0]
80016ca: 6878 ldr r0, [r7, #4]
80016cc: f7ff fab8 bl 8000c40 <parse_number>
80016d0: 4603 mov r3, r0
80016d2: e02e b.n 8001732 <parse_value+0x1c2>
}
/* array */
if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '['))
80016d4: 683b ldr r3, [r7, #0]
80016d6: 2b00 cmp r3, #0
80016d8: d013 beq.n 8001702 <parse_value+0x192>
80016da: 683b ldr r3, [r7, #0]
80016dc: 689a ldr r2, [r3, #8]
80016de: 683b ldr r3, [r7, #0]
80016e0: 685b ldr r3, [r3, #4]
80016e2: 429a cmp r2, r3
80016e4: d20d bcs.n 8001702 <parse_value+0x192>
80016e6: 683b ldr r3, [r7, #0]
80016e8: 681a ldr r2, [r3, #0]
80016ea: 683b ldr r3, [r7, #0]
80016ec: 689b ldr r3, [r3, #8]
80016ee: 4413 add r3, r2
80016f0: 781b ldrb r3, [r3, #0]
80016f2: 2b5b cmp r3, #91 @ 0x5b
80016f4: d105 bne.n 8001702 <parse_value+0x192>
{
return parse_array(item, input_buffer);
80016f6: 6839 ldr r1, [r7, #0]
80016f8: 6878 ldr r0, [r7, #4]
80016fa: f000 f825 bl 8001748 <parse_array>
80016fe: 4603 mov r3, r0
8001700: e017 b.n 8001732 <parse_value+0x1c2>
}
/* object */
if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '{'))
8001702: 683b ldr r3, [r7, #0]
8001704: 2b00 cmp r3, #0
8001706: d013 beq.n 8001730 <parse_value+0x1c0>
8001708: 683b ldr r3, [r7, #0]
800170a: 689a ldr r2, [r3, #8]
800170c: 683b ldr r3, [r7, #0]
800170e: 685b ldr r3, [r3, #4]
8001710: 429a cmp r2, r3
8001712: d20d bcs.n 8001730 <parse_value+0x1c0>
8001714: 683b ldr r3, [r7, #0]
8001716: 681a ldr r2, [r3, #0]
8001718: 683b ldr r3, [r7, #0]
800171a: 689b ldr r3, [r3, #8]
800171c: 4413 add r3, r2
800171e: 781b ldrb r3, [r3, #0]
8001720: 2b7b cmp r3, #123 @ 0x7b
8001722: d105 bne.n 8001730 <parse_value+0x1c0>
{
return parse_object(item, input_buffer);
8001724: 6839 ldr r1, [r7, #0]
8001726: 6878 ldr r0, [r7, #4]
8001728: f000 f8d2 bl 80018d0 <parse_object>
800172c: 4603 mov r3, r0
800172e: e000 b.n 8001732 <parse_value+0x1c2>
}
return false;
8001730: 2300 movs r3, #0
}
8001732: 4618 mov r0, r3
8001734: 3708 adds r7, #8
8001736: 46bd mov sp, r7
8001738: bd80 pop {r7, pc}
800173a: bf00 nop
800173c: 0802d4bc .word 0x0802d4bc
8001740: 0802d4ec .word 0x0802d4ec
8001744: 0802d4f4 .word 0x0802d4f4
08001748 <parse_array>:
}
}
/* Build an array from input text. */
static cJSON_bool parse_array(cJSON * const item, parse_buffer * const input_buffer)
{
8001748: b580 push {r7, lr}
800174a: b086 sub sp, #24
800174c: af00 add r7, sp, #0
800174e: 6078 str r0, [r7, #4]
8001750: 6039 str r1, [r7, #0]
cJSON *head = NULL; /* head of the linked list */
8001752: 2300 movs r3, #0
8001754: 617b str r3, [r7, #20]
cJSON *current_item = NULL;
8001756: 2300 movs r3, #0
8001758: 613b str r3, [r7, #16]
if (input_buffer->depth >= CJSON_NESTING_LIMIT)
800175a: 683b ldr r3, [r7, #0]
800175c: 68db ldr r3, [r3, #12]
800175e: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8
8001762: d301 bcc.n 8001768 <parse_array+0x20>
{
return false; /* to deeply nested */
8001764: 2300 movs r3, #0
8001766: e0af b.n 80018c8 <parse_array+0x180>
}
input_buffer->depth++;
8001768: 683b ldr r3, [r7, #0]
800176a: 68db ldr r3, [r3, #12]
800176c: 1c5a adds r2, r3, #1
800176e: 683b ldr r3, [r7, #0]
8001770: 60da str r2, [r3, #12]
if (buffer_at_offset(input_buffer)[0] != '[')
8001772: 683b ldr r3, [r7, #0]
8001774: 681a ldr r2, [r3, #0]
8001776: 683b ldr r3, [r7, #0]
8001778: 689b ldr r3, [r3, #8]
800177a: 4413 add r3, r2
800177c: 781b ldrb r3, [r3, #0]
800177e: 2b5b cmp r3, #91 @ 0x5b
8001780: f040 8094 bne.w 80018ac <parse_array+0x164>
{
/* not an array */
goto fail;
}
input_buffer->offset++;
8001784: 683b ldr r3, [r7, #0]
8001786: 689b ldr r3, [r3, #8]
8001788: 1c5a adds r2, r3, #1
800178a: 683b ldr r3, [r7, #0]
800178c: 609a str r2, [r3, #8]
buffer_skip_whitespace(input_buffer);
800178e: 6838 ldr r0, [r7, #0]
8001790: f7ff fdb6 bl 8001300 <buffer_skip_whitespace>
if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ']'))
8001794: 683b ldr r3, [r7, #0]
8001796: 2b00 cmp r3, #0
8001798: d00d beq.n 80017b6 <parse_array+0x6e>
800179a: 683b ldr r3, [r7, #0]
800179c: 689a ldr r2, [r3, #8]
800179e: 683b ldr r3, [r7, #0]
80017a0: 685b ldr r3, [r3, #4]
80017a2: 429a cmp r2, r3
80017a4: d207 bcs.n 80017b6 <parse_array+0x6e>
80017a6: 683b ldr r3, [r7, #0]
80017a8: 681a ldr r2, [r3, #0]
80017aa: 683b ldr r3, [r7, #0]
80017ac: 689b ldr r3, [r3, #8]
80017ae: 4413 add r3, r2
80017b0: 781b ldrb r3, [r3, #0]
80017b2: 2b5d cmp r3, #93 @ 0x5d
80017b4: d061 beq.n 800187a <parse_array+0x132>
/* empty array */
goto success;
}
/* check if we skipped to the end of the buffer */
if (cannot_access_at_index(input_buffer, 0))
80017b6: 683b ldr r3, [r7, #0]
80017b8: 2b00 cmp r3, #0
80017ba: d005 beq.n 80017c8 <parse_array+0x80>
80017bc: 683b ldr r3, [r7, #0]
80017be: 689a ldr r2, [r3, #8]
80017c0: 683b ldr r3, [r7, #0]
80017c2: 685b ldr r3, [r3, #4]
80017c4: 429a cmp r2, r3
80017c6: d305 bcc.n 80017d4 <parse_array+0x8c>
{
input_buffer->offset--;
80017c8: 683b ldr r3, [r7, #0]
80017ca: 689b ldr r3, [r3, #8]
80017cc: 1e5a subs r2, r3, #1
80017ce: 683b ldr r3, [r7, #0]
80017d0: 609a str r2, [r3, #8]
goto fail;
80017d2: e072 b.n 80018ba <parse_array+0x172>
}
/* step back to character in front of the first element */
input_buffer->offset--;
80017d4: 683b ldr r3, [r7, #0]
80017d6: 689b ldr r3, [r3, #8]
80017d8: 1e5a subs r2, r3, #1
80017da: 683b ldr r3, [r7, #0]
80017dc: 609a str r2, [r3, #8]
/* loop through the comma separated array elements */
do
{
/* allocate next item */
cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
80017de: 683b ldr r3, [r7, #0]
80017e0: 3310 adds r3, #16
80017e2: 4618 mov r0, r3
80017e4: f7ff f9bc bl 8000b60 <cJSON_New_Item>
80017e8: 60f8 str r0, [r7, #12]
if (new_item == NULL)
80017ea: 68fb ldr r3, [r7, #12]
80017ec: 2b00 cmp r3, #0
80017ee: d05f beq.n 80018b0 <parse_array+0x168>
{
goto fail; /* allocation failure */
}
/* attach next item to list */
if (head == NULL)
80017f0: 697b ldr r3, [r7, #20]
80017f2: 2b00 cmp r3, #0
80017f4: d104 bne.n 8001800 <parse_array+0xb8>
{
/* start the linked list */
current_item = head = new_item;
80017f6: 68fb ldr r3, [r7, #12]
80017f8: 617b str r3, [r7, #20]
80017fa: 697b ldr r3, [r7, #20]
80017fc: 613b str r3, [r7, #16]
80017fe: e007 b.n 8001810 <parse_array+0xc8>
}
else
{
/* add to the end and advance */
current_item->next = new_item;
8001800: 693b ldr r3, [r7, #16]
8001802: 68fa ldr r2, [r7, #12]
8001804: 601a str r2, [r3, #0]
new_item->prev = current_item;
8001806: 68fb ldr r3, [r7, #12]
8001808: 693a ldr r2, [r7, #16]
800180a: 605a str r2, [r3, #4]
current_item = new_item;
800180c: 68fb ldr r3, [r7, #12]
800180e: 613b str r3, [r7, #16]
}
/* parse next value */
input_buffer->offset++;
8001810: 683b ldr r3, [r7, #0]
8001812: 689b ldr r3, [r3, #8]
8001814: 1c5a adds r2, r3, #1
8001816: 683b ldr r3, [r7, #0]
8001818: 609a str r2, [r3, #8]
buffer_skip_whitespace(input_buffer);
800181a: 6838 ldr r0, [r7, #0]
800181c: f7ff fd70 bl 8001300 <buffer_skip_whitespace>
if (!parse_value(current_item, input_buffer))
8001820: 6839 ldr r1, [r7, #0]
8001822: 6938 ldr r0, [r7, #16]
8001824: f7ff fea4 bl 8001570 <parse_value>
8001828: 4603 mov r3, r0
800182a: 2b00 cmp r3, #0
800182c: d042 beq.n 80018b4 <parse_array+0x16c>
{
goto fail; /* failed to parse value */
}
buffer_skip_whitespace(input_buffer);
800182e: 6838 ldr r0, [r7, #0]
8001830: f7ff fd66 bl 8001300 <buffer_skip_whitespace>
}
while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
8001834: 683b ldr r3, [r7, #0]
8001836: 2b00 cmp r3, #0
8001838: d00d beq.n 8001856 <parse_array+0x10e>
800183a: 683b ldr r3, [r7, #0]
800183c: 689a ldr r2, [r3, #8]
800183e: 683b ldr r3, [r7, #0]
8001840: 685b ldr r3, [r3, #4]
8001842: 429a cmp r2, r3
8001844: d207 bcs.n 8001856 <parse_array+0x10e>
8001846: 683b ldr r3, [r7, #0]
8001848: 681a ldr r2, [r3, #0]
800184a: 683b ldr r3, [r7, #0]
800184c: 689b ldr r3, [r3, #8]
800184e: 4413 add r3, r2
8001850: 781b ldrb r3, [r3, #0]
8001852: 2b2c cmp r3, #44 @ 0x2c
8001854: d0c3 beq.n 80017de <parse_array+0x96>
if (cannot_access_at_index(input_buffer, 0) || buffer_at_offset(input_buffer)[0] != ']')
8001856: 683b ldr r3, [r7, #0]
8001858: 2b00 cmp r3, #0
800185a: d02d beq.n 80018b8 <parse_array+0x170>
800185c: 683b ldr r3, [r7, #0]
800185e: 689a ldr r2, [r3, #8]
8001860: 683b ldr r3, [r7, #0]
8001862: 685b ldr r3, [r3, #4]
8001864: 429a cmp r2, r3
8001866: d227 bcs.n 80018b8 <parse_array+0x170>
8001868: 683b ldr r3, [r7, #0]
800186a: 681a ldr r2, [r3, #0]
800186c: 683b ldr r3, [r7, #0]
800186e: 689b ldr r3, [r3, #8]
8001870: 4413 add r3, r2
8001872: 781b ldrb r3, [r3, #0]
8001874: 2b5d cmp r3, #93 @ 0x5d
8001876: d11f bne.n 80018b8 <parse_array+0x170>
{
goto fail; /* expected end of array */
}
success:
8001878: e000 b.n 800187c <parse_array+0x134>
goto success;
800187a: bf00 nop
input_buffer->depth--;
800187c: 683b ldr r3, [r7, #0]
800187e: 68db ldr r3, [r3, #12]
8001880: 1e5a subs r2, r3, #1
8001882: 683b ldr r3, [r7, #0]
8001884: 60da str r2, [r3, #12]
if (head != NULL) {
8001886: 697b ldr r3, [r7, #20]
8001888: 2b00 cmp r3, #0
800188a: d002 beq.n 8001892 <parse_array+0x14a>
head->prev = current_item;
800188c: 697b ldr r3, [r7, #20]
800188e: 693a ldr r2, [r7, #16]
8001890: 605a str r2, [r3, #4]
}
item->type = cJSON_Array;
8001892: 687b ldr r3, [r7, #4]
8001894: 2220 movs r2, #32
8001896: 60da str r2, [r3, #12]
item->child = head;
8001898: 687b ldr r3, [r7, #4]
800189a: 697a ldr r2, [r7, #20]
800189c: 609a str r2, [r3, #8]
input_buffer->offset++;
800189e: 683b ldr r3, [r7, #0]
80018a0: 689b ldr r3, [r3, #8]
80018a2: 1c5a adds r2, r3, #1
80018a4: 683b ldr r3, [r7, #0]
80018a6: 609a str r2, [r3, #8]
return true;
80018a8: 2301 movs r3, #1
80018aa: e00d b.n 80018c8 <parse_array+0x180>
goto fail;
80018ac: bf00 nop
80018ae: e004 b.n 80018ba <parse_array+0x172>
goto fail; /* allocation failure */
80018b0: bf00 nop
80018b2: e002 b.n 80018ba <parse_array+0x172>
goto fail; /* failed to parse value */
80018b4: bf00 nop
80018b6: e000 b.n 80018ba <parse_array+0x172>
goto fail; /* expected end of array */
80018b8: bf00 nop
fail:
if (head != NULL)
80018ba: 697b ldr r3, [r7, #20]
80018bc: 2b00 cmp r3, #0
80018be: d002 beq.n 80018c6 <parse_array+0x17e>
{
cJSON_Delete(head);
80018c0: 6978 ldr r0, [r7, #20]
80018c2: f7ff f963 bl 8000b8c <cJSON_Delete>
}
return false;
80018c6: 2300 movs r3, #0
}
80018c8: 4618 mov r0, r3
80018ca: 3718 adds r7, #24
80018cc: 46bd mov sp, r7
80018ce: bd80 pop {r7, pc}
080018d0 <parse_object>:
return true;
}
/* Build an object from the text. */
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer)
{
80018d0: b580 push {r7, lr}
80018d2: b086 sub sp, #24
80018d4: af00 add r7, sp, #0
80018d6: 6078 str r0, [r7, #4]
80018d8: 6039 str r1, [r7, #0]
cJSON *head = NULL; /* linked list head */
80018da: 2300 movs r3, #0
80018dc: 617b str r3, [r7, #20]
cJSON *current_item = NULL;
80018de: 2300 movs r3, #0
80018e0: 613b str r3, [r7, #16]
if (input_buffer->depth >= CJSON_NESTING_LIMIT)
80018e2: 683b ldr r3, [r7, #0]
80018e4: 68db ldr r3, [r3, #12]
80018e6: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8
80018ea: d301 bcc.n 80018f0 <parse_object+0x20>
{
return false; /* to deeply nested */
80018ec: 2300 movs r3, #0
80018ee: e0f7 b.n 8001ae0 <parse_object+0x210>
}
input_buffer->depth++;
80018f0: 683b ldr r3, [r7, #0]
80018f2: 68db ldr r3, [r3, #12]
80018f4: 1c5a adds r2, r3, #1
80018f6: 683b ldr r3, [r7, #0]
80018f8: 60da str r2, [r3, #12]
if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '{'))
80018fa: 683b ldr r3, [r7, #0]
80018fc: 2b00 cmp r3, #0
80018fe: f000 80db beq.w 8001ab8 <parse_object+0x1e8>
8001902: 683b ldr r3, [r7, #0]
8001904: 689a ldr r2, [r3, #8]
8001906: 683b ldr r3, [r7, #0]
8001908: 685b ldr r3, [r3, #4]
800190a: 429a cmp r2, r3
800190c: f080 80d4 bcs.w 8001ab8 <parse_object+0x1e8>
8001910: 683b ldr r3, [r7, #0]
8001912: 681a ldr r2, [r3, #0]
8001914: 683b ldr r3, [r7, #0]
8001916: 689b ldr r3, [r3, #8]
8001918: 4413 add r3, r2
800191a: 781b ldrb r3, [r3, #0]
800191c: 2b7b cmp r3, #123 @ 0x7b
800191e: f040 80cb bne.w 8001ab8 <parse_object+0x1e8>
{
goto fail; /* not an object */
}
input_buffer->offset++;
8001922: 683b ldr r3, [r7, #0]
8001924: 689b ldr r3, [r3, #8]
8001926: 1c5a adds r2, r3, #1
8001928: 683b ldr r3, [r7, #0]
800192a: 609a str r2, [r3, #8]
buffer_skip_whitespace(input_buffer);
800192c: 6838 ldr r0, [r7, #0]
800192e: f7ff fce7 bl 8001300 <buffer_skip_whitespace>
if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '}'))
8001932: 683b ldr r3, [r7, #0]
8001934: 2b00 cmp r3, #0
8001936: d00e beq.n 8001956 <parse_object+0x86>
8001938: 683b ldr r3, [r7, #0]
800193a: 689a ldr r2, [r3, #8]
800193c: 683b ldr r3, [r7, #0]
800193e: 685b ldr r3, [r3, #4]
8001940: 429a cmp r2, r3
8001942: d208 bcs.n 8001956 <parse_object+0x86>
8001944: 683b ldr r3, [r7, #0]
8001946: 681a ldr r2, [r3, #0]
8001948: 683b ldr r3, [r7, #0]
800194a: 689b ldr r3, [r3, #8]
800194c: 4413 add r3, r2
800194e: 781b ldrb r3, [r3, #0]
8001950: 2b7d cmp r3, #125 @ 0x7d
8001952: f000 8098 beq.w 8001a86 <parse_object+0x1b6>
{
goto success; /* empty object */
}
/* check if we skipped to the end of the buffer */
if (cannot_access_at_index(input_buffer, 0))
8001956: 683b ldr r3, [r7, #0]
8001958: 2b00 cmp r3, #0
800195a: d005 beq.n 8001968 <parse_object+0x98>
800195c: 683b ldr r3, [r7, #0]
800195e: 689a ldr r2, [r3, #8]
8001960: 683b ldr r3, [r7, #0]
8001962: 685b ldr r3, [r3, #4]
8001964: 429a cmp r2, r3
8001966: d305 bcc.n 8001974 <parse_object+0xa4>
{
input_buffer->offset--;
8001968: 683b ldr r3, [r7, #0]
800196a: 689b ldr r3, [r3, #8]
800196c: 1e5a subs r2, r3, #1
800196e: 683b ldr r3, [r7, #0]
8001970: 609a str r2, [r3, #8]
goto fail;
8001972: e0ae b.n 8001ad2 <parse_object+0x202>
}
/* step back to character in front of the first element */
input_buffer->offset--;
8001974: 683b ldr r3, [r7, #0]
8001976: 689b ldr r3, [r3, #8]
8001978: 1e5a subs r2, r3, #1
800197a: 683b ldr r3, [r7, #0]
800197c: 609a str r2, [r3, #8]
/* loop through the comma separated array elements */
do
{
/* allocate next item */
cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
800197e: 683b ldr r3, [r7, #0]
8001980: 3310 adds r3, #16
8001982: 4618 mov r0, r3
8001984: f7ff f8ec bl 8000b60 <cJSON_New_Item>
8001988: 60f8 str r0, [r7, #12]
if (new_item == NULL)
800198a: 68fb ldr r3, [r7, #12]
800198c: 2b00 cmp r3, #0
800198e: f000 8095 beq.w 8001abc <parse_object+0x1ec>
{
goto fail; /* allocation failure */
}
/* attach next item to list */
if (head == NULL)
8001992: 697b ldr r3, [r7, #20]
8001994: 2b00 cmp r3, #0
8001996: d104 bne.n 80019a2 <parse_object+0xd2>
{
/* start the linked list */
current_item = head = new_item;
8001998: 68fb ldr r3, [r7, #12]
800199a: 617b str r3, [r7, #20]
800199c: 697b ldr r3, [r7, #20]
800199e: 613b str r3, [r7, #16]
80019a0: e007 b.n 80019b2 <parse_object+0xe2>
}
else
{
/* add to the end and advance */
current_item->next = new_item;
80019a2: 693b ldr r3, [r7, #16]
80019a4: 68fa ldr r2, [r7, #12]
80019a6: 601a str r2, [r3, #0]
new_item->prev = current_item;
80019a8: 68fb ldr r3, [r7, #12]
80019aa: 693a ldr r2, [r7, #16]
80019ac: 605a str r2, [r3, #4]
current_item = new_item;
80019ae: 68fb ldr r3, [r7, #12]
80019b0: 613b str r3, [r7, #16]
}
if (cannot_access_at_index(input_buffer, 1))
80019b2: 683b ldr r3, [r7, #0]
80019b4: 2b00 cmp r3, #0
80019b6: f000 8083 beq.w 8001ac0 <parse_object+0x1f0>
80019ba: 683b ldr r3, [r7, #0]
80019bc: 689b ldr r3, [r3, #8]
80019be: 1c5a adds r2, r3, #1
80019c0: 683b ldr r3, [r7, #0]
80019c2: 685b ldr r3, [r3, #4]
80019c4: 429a cmp r2, r3
80019c6: d27b bcs.n 8001ac0 <parse_object+0x1f0>
{
goto fail; /* nothing comes after the comma */
}
/* parse the name of the child */
input_buffer->offset++;
80019c8: 683b ldr r3, [r7, #0]
80019ca: 689b ldr r3, [r3, #8]
80019cc: 1c5a adds r2, r3, #1
80019ce: 683b ldr r3, [r7, #0]
80019d0: 609a str r2, [r3, #8]
buffer_skip_whitespace(input_buffer);
80019d2: 6838 ldr r0, [r7, #0]
80019d4: f7ff fc94 bl 8001300 <buffer_skip_whitespace>
if (!parse_string(current_item, input_buffer))
80019d8: 6839 ldr r1, [r7, #0]
80019da: 6938 ldr r0, [r7, #16]
80019dc: f7ff fb48 bl 8001070 <parse_string>
80019e0: 4603 mov r3, r0
80019e2: 2b00 cmp r3, #0
80019e4: d06e beq.n 8001ac4 <parse_object+0x1f4>
{
goto fail; /* failed to parse name */
}
buffer_skip_whitespace(input_buffer);
80019e6: 6838 ldr r0, [r7, #0]
80019e8: f7ff fc8a bl 8001300 <buffer_skip_whitespace>
/* swap valuestring and string, because we parsed the name */
current_item->string = current_item->valuestring;
80019ec: 693b ldr r3, [r7, #16]
80019ee: 691a ldr r2, [r3, #16]
80019f0: 693b ldr r3, [r7, #16]
80019f2: 621a str r2, [r3, #32]
current_item->valuestring = NULL;
80019f4: 693b ldr r3, [r7, #16]
80019f6: 2200 movs r2, #0
80019f8: 611a str r2, [r3, #16]
if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != ':'))
80019fa: 683b ldr r3, [r7, #0]
80019fc: 2b00 cmp r3, #0
80019fe: d063 beq.n 8001ac8 <parse_object+0x1f8>
8001a00: 683b ldr r3, [r7, #0]
8001a02: 689a ldr r2, [r3, #8]
8001a04: 683b ldr r3, [r7, #0]
8001a06: 685b ldr r3, [r3, #4]
8001a08: 429a cmp r2, r3
8001a0a: d25d bcs.n 8001ac8 <parse_object+0x1f8>
8001a0c: 683b ldr r3, [r7, #0]
8001a0e: 681a ldr r2, [r3, #0]
8001a10: 683b ldr r3, [r7, #0]
8001a12: 689b ldr r3, [r3, #8]
8001a14: 4413 add r3, r2
8001a16: 781b ldrb r3, [r3, #0]
8001a18: 2b3a cmp r3, #58 @ 0x3a
8001a1a: d155 bne.n 8001ac8 <parse_object+0x1f8>
{
goto fail; /* invalid object */
}
/* parse the value */
input_buffer->offset++;
8001a1c: 683b ldr r3, [r7, #0]
8001a1e: 689b ldr r3, [r3, #8]
8001a20: 1c5a adds r2, r3, #1
8001a22: 683b ldr r3, [r7, #0]
8001a24: 609a str r2, [r3, #8]
buffer_skip_whitespace(input_buffer);
8001a26: 6838 ldr r0, [r7, #0]
8001a28: f7ff fc6a bl 8001300 <buffer_skip_whitespace>
if (!parse_value(current_item, input_buffer))
8001a2c: 6839 ldr r1, [r7, #0]
8001a2e: 6938 ldr r0, [r7, #16]
8001a30: f7ff fd9e bl 8001570 <parse_value>
8001a34: 4603 mov r3, r0
8001a36: 2b00 cmp r3, #0
8001a38: d048 beq.n 8001acc <parse_object+0x1fc>
{
goto fail; /* failed to parse value */
}
buffer_skip_whitespace(input_buffer);
8001a3a: 6838 ldr r0, [r7, #0]
8001a3c: f7ff fc60 bl 8001300 <buffer_skip_whitespace>
}
while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
8001a40: 683b ldr r3, [r7, #0]
8001a42: 2b00 cmp r3, #0
8001a44: d00d beq.n 8001a62 <parse_object+0x192>
8001a46: 683b ldr r3, [r7, #0]
8001a48: 689a ldr r2, [r3, #8]
8001a4a: 683b ldr r3, [r7, #0]
8001a4c: 685b ldr r3, [r3, #4]
8001a4e: 429a cmp r2, r3
8001a50: d207 bcs.n 8001a62 <parse_object+0x192>
8001a52: 683b ldr r3, [r7, #0]
8001a54: 681a ldr r2, [r3, #0]
8001a56: 683b ldr r3, [r7, #0]
8001a58: 689b ldr r3, [r3, #8]
8001a5a: 4413 add r3, r2
8001a5c: 781b ldrb r3, [r3, #0]
8001a5e: 2b2c cmp r3, #44 @ 0x2c
8001a60: d08d beq.n 800197e <parse_object+0xae>
if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '}'))
8001a62: 683b ldr r3, [r7, #0]
8001a64: 2b00 cmp r3, #0
8001a66: d033 beq.n 8001ad0 <parse_object+0x200>
8001a68: 683b ldr r3, [r7, #0]
8001a6a: 689a ldr r2, [r3, #8]
8001a6c: 683b ldr r3, [r7, #0]
8001a6e: 685b ldr r3, [r3, #4]
8001a70: 429a cmp r2, r3
8001a72: d22d bcs.n 8001ad0 <parse_object+0x200>
8001a74: 683b ldr r3, [r7, #0]
8001a76: 681a ldr r2, [r3, #0]
8001a78: 683b ldr r3, [r7, #0]
8001a7a: 689b ldr r3, [r3, #8]
8001a7c: 4413 add r3, r2
8001a7e: 781b ldrb r3, [r3, #0]
8001a80: 2b7d cmp r3, #125 @ 0x7d
8001a82: d125 bne.n 8001ad0 <parse_object+0x200>
{
goto fail; /* expected end of object */
}
success:
8001a84: e000 b.n 8001a88 <parse_object+0x1b8>
goto success; /* empty object */
8001a86: bf00 nop
input_buffer->depth--;
8001a88: 683b ldr r3, [r7, #0]
8001a8a: 68db ldr r3, [r3, #12]
8001a8c: 1e5a subs r2, r3, #1
8001a8e: 683b ldr r3, [r7, #0]
8001a90: 60da str r2, [r3, #12]
if (head != NULL) {
8001a92: 697b ldr r3, [r7, #20]
8001a94: 2b00 cmp r3, #0
8001a96: d002 beq.n 8001a9e <parse_object+0x1ce>
head->prev = current_item;
8001a98: 697b ldr r3, [r7, #20]
8001a9a: 693a ldr r2, [r7, #16]
8001a9c: 605a str r2, [r3, #4]
}
item->type = cJSON_Object;
8001a9e: 687b ldr r3, [r7, #4]
8001aa0: 2240 movs r2, #64 @ 0x40
8001aa2: 60da str r2, [r3, #12]
item->child = head;
8001aa4: 687b ldr r3, [r7, #4]
8001aa6: 697a ldr r2, [r7, #20]
8001aa8: 609a str r2, [r3, #8]
input_buffer->offset++;
8001aaa: 683b ldr r3, [r7, #0]
8001aac: 689b ldr r3, [r3, #8]
8001aae: 1c5a adds r2, r3, #1
8001ab0: 683b ldr r3, [r7, #0]
8001ab2: 609a str r2, [r3, #8]
return true;
8001ab4: 2301 movs r3, #1
8001ab6: e013 b.n 8001ae0 <parse_object+0x210>
goto fail; /* not an object */
8001ab8: bf00 nop
8001aba: e00a b.n 8001ad2 <parse_object+0x202>
goto fail; /* allocation failure */
8001abc: bf00 nop
8001abe: e008 b.n 8001ad2 <parse_object+0x202>
goto fail; /* nothing comes after the comma */
8001ac0: bf00 nop
8001ac2: e006 b.n 8001ad2 <parse_object+0x202>
goto fail; /* failed to parse name */
8001ac4: bf00 nop
8001ac6: e004 b.n 8001ad2 <parse_object+0x202>
goto fail; /* invalid object */
8001ac8: bf00 nop
8001aca: e002 b.n 8001ad2 <parse_object+0x202>
goto fail; /* failed to parse value */
8001acc: bf00 nop
8001ace: e000 b.n 8001ad2 <parse_object+0x202>
goto fail; /* expected end of object */
8001ad0: bf00 nop
fail:
if (head != NULL)
8001ad2: 697b ldr r3, [r7, #20]
8001ad4: 2b00 cmp r3, #0
8001ad6: d002 beq.n 8001ade <parse_object+0x20e>
{
cJSON_Delete(head);
8001ad8: 6978 ldr r0, [r7, #20]
8001ada: f7ff f857 bl 8000b8c <cJSON_Delete>
}
return false;
8001ade: 2300 movs r3, #0
}
8001ae0: 4618 mov r0, r3
8001ae2: 3718 adds r7, #24
8001ae4: 46bd mov sp, r7
8001ae6: bd80 pop {r7, pc}
08001ae8 <cJSON_GetArraySize>:
return true;
}
/* Get Array size/item / object item. */
CJSON_PUBLIC(int) cJSON_GetArraySize(const cJSON *array)
{
8001ae8: b480 push {r7}
8001aea: b085 sub sp, #20
8001aec: af00 add r7, sp, #0
8001aee: 6078 str r0, [r7, #4]
cJSON *child = NULL;
8001af0: 2300 movs r3, #0
8001af2: 60fb str r3, [r7, #12]
size_t size = 0;
8001af4: 2300 movs r3, #0
8001af6: 60bb str r3, [r7, #8]
if (array == NULL)
8001af8: 687b ldr r3, [r7, #4]
8001afa: 2b00 cmp r3, #0
8001afc: d101 bne.n 8001b02 <cJSON_GetArraySize+0x1a>
{
return 0;
8001afe: 2300 movs r3, #0
8001b00: e00d b.n 8001b1e <cJSON_GetArraySize+0x36>
}
child = array->child;
8001b02: 687b ldr r3, [r7, #4]
8001b04: 689b ldr r3, [r3, #8]
8001b06: 60fb str r3, [r7, #12]
while(child != NULL)
8001b08: e005 b.n 8001b16 <cJSON_GetArraySize+0x2e>
{
size++;
8001b0a: 68bb ldr r3, [r7, #8]
8001b0c: 3301 adds r3, #1
8001b0e: 60bb str r3, [r7, #8]
child = child->next;
8001b10: 68fb ldr r3, [r7, #12]
8001b12: 681b ldr r3, [r3, #0]
8001b14: 60fb str r3, [r7, #12]
while(child != NULL)
8001b16: 68fb ldr r3, [r7, #12]
8001b18: 2b00 cmp r3, #0
8001b1a: d1f6 bne.n 8001b0a <cJSON_GetArraySize+0x22>
}
/* FIXME: Can overflow here. Cannot be fixed without breaking the API */
return (int)size;
8001b1c: 68bb ldr r3, [r7, #8]
}
8001b1e: 4618 mov r0, r3
8001b20: 3714 adds r7, #20
8001b22: 46bd mov sp, r7
8001b24: f85d 7b04 ldr.w r7, [sp], #4
8001b28: 4770 bx lr
08001b2a <get_array_item>:
static cJSON* get_array_item(const cJSON *array, size_t index)
{
8001b2a: b480 push {r7}
8001b2c: b085 sub sp, #20
8001b2e: af00 add r7, sp, #0
8001b30: 6078 str r0, [r7, #4]
8001b32: 6039 str r1, [r7, #0]
cJSON *current_child = NULL;
8001b34: 2300 movs r3, #0
8001b36: 60fb str r3, [r7, #12]
if (array == NULL)
8001b38: 687b ldr r3, [r7, #4]
8001b3a: 2b00 cmp r3, #0
8001b3c: d101 bne.n 8001b42 <get_array_item+0x18>
{
return NULL;
8001b3e: 2300 movs r3, #0
8001b40: e010 b.n 8001b64 <get_array_item+0x3a>
}
current_child = array->child;
8001b42: 687b ldr r3, [r7, #4]
8001b44: 689b ldr r3, [r3, #8]
8001b46: 60fb str r3, [r7, #12]
while ((current_child != NULL) && (index > 0))
8001b48: e005 b.n 8001b56 <get_array_item+0x2c>
{
index--;
8001b4a: 683b ldr r3, [r7, #0]
8001b4c: 3b01 subs r3, #1
8001b4e: 603b str r3, [r7, #0]
current_child = current_child->next;
8001b50: 68fb ldr r3, [r7, #12]
8001b52: 681b ldr r3, [r3, #0]
8001b54: 60fb str r3, [r7, #12]
while ((current_child != NULL) && (index > 0))
8001b56: 68fb ldr r3, [r7, #12]
8001b58: 2b00 cmp r3, #0
8001b5a: d002 beq.n 8001b62 <get_array_item+0x38>
8001b5c: 683b ldr r3, [r7, #0]
8001b5e: 2b00 cmp r3, #0
8001b60: d1f3 bne.n 8001b4a <get_array_item+0x20>
}
return current_child;
8001b62: 68fb ldr r3, [r7, #12]
}
8001b64: 4618 mov r0, r3
8001b66: 3714 adds r7, #20
8001b68: 46bd mov sp, r7
8001b6a: f85d 7b04 ldr.w r7, [sp], #4
8001b6e: 4770 bx lr
08001b70 <cJSON_GetArrayItem>:
CJSON_PUBLIC(cJSON *) cJSON_GetArrayItem(const cJSON *array, int index)
{
8001b70: b580 push {r7, lr}
8001b72: b082 sub sp, #8
8001b74: af00 add r7, sp, #0
8001b76: 6078 str r0, [r7, #4]
8001b78: 6039 str r1, [r7, #0]
if (index < 0)
8001b7a: 683b ldr r3, [r7, #0]
8001b7c: 2b00 cmp r3, #0
8001b7e: da01 bge.n 8001b84 <cJSON_GetArrayItem+0x14>
{
return NULL;
8001b80: 2300 movs r3, #0
8001b82: e005 b.n 8001b90 <cJSON_GetArrayItem+0x20>
}
return get_array_item(array, (size_t)index);
8001b84: 683b ldr r3, [r7, #0]
8001b86: 4619 mov r1, r3
8001b88: 6878 ldr r0, [r7, #4]
8001b8a: f7ff ffce bl 8001b2a <get_array_item>
8001b8e: 4603 mov r3, r0
}
8001b90: 4618 mov r0, r3
8001b92: 3708 adds r7, #8
8001b94: 46bd mov sp, r7
8001b96: bd80 pop {r7, pc}
08001b98 <get_object_item>:
static cJSON *get_object_item(const cJSON * const object, const char * const name, const cJSON_bool case_sensitive)
{
8001b98: b580 push {r7, lr}
8001b9a: b086 sub sp, #24
8001b9c: af00 add r7, sp, #0
8001b9e: 60f8 str r0, [r7, #12]
8001ba0: 60b9 str r1, [r7, #8]
8001ba2: 607a str r2, [r7, #4]
cJSON *current_element = NULL;
8001ba4: 2300 movs r3, #0
8001ba6: 617b str r3, [r7, #20]
if ((object == NULL) || (name == NULL))
8001ba8: 68fb ldr r3, [r7, #12]
8001baa: 2b00 cmp r3, #0
8001bac: d002 beq.n 8001bb4 <get_object_item+0x1c>
8001bae: 68bb ldr r3, [r7, #8]
8001bb0: 2b00 cmp r3, #0
8001bb2: d101 bne.n 8001bb8 <get_object_item+0x20>
{
return NULL;
8001bb4: 2300 movs r3, #0
8001bb6: e033 b.n 8001c20 <get_object_item+0x88>
}
current_element = object->child;
8001bb8: 68fb ldr r3, [r7, #12]
8001bba: 689b ldr r3, [r3, #8]
8001bbc: 617b str r3, [r7, #20]
if (case_sensitive)
8001bbe: 687b ldr r3, [r7, #4]
8001bc0: 2b00 cmp r3, #0
8001bc2: d017 beq.n 8001bf4 <get_object_item+0x5c>
{
while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
8001bc4: e002 b.n 8001bcc <get_object_item+0x34>
{
current_element = current_element->next;
8001bc6: 697b ldr r3, [r7, #20]
8001bc8: 681b ldr r3, [r3, #0]
8001bca: 617b str r3, [r7, #20]
while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
8001bcc: 697b ldr r3, [r7, #20]
8001bce: 2b00 cmp r3, #0
8001bd0: d01c beq.n 8001c0c <get_object_item+0x74>
8001bd2: 697b ldr r3, [r7, #20]
8001bd4: 6a1b ldr r3, [r3, #32]
8001bd6: 2b00 cmp r3, #0
8001bd8: d018 beq.n 8001c0c <get_object_item+0x74>
8001bda: 697b ldr r3, [r7, #20]
8001bdc: 6a1b ldr r3, [r3, #32]
8001bde: 4619 mov r1, r3
8001be0: 68b8 ldr r0, [r7, #8]
8001be2: f7fe fb7d bl 80002e0 <strcmp>
8001be6: 4603 mov r3, r0
8001be8: 2b00 cmp r3, #0
8001bea: d1ec bne.n 8001bc6 <get_object_item+0x2e>
8001bec: e00e b.n 8001c0c <get_object_item+0x74>
}
else
{
while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
{
current_element = current_element->next;
8001bee: 697b ldr r3, [r7, #20]
8001bf0: 681b ldr r3, [r3, #0]
8001bf2: 617b str r3, [r7, #20]
while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
8001bf4: 697b ldr r3, [r7, #20]
8001bf6: 2b00 cmp r3, #0
8001bf8: d008 beq.n 8001c0c <get_object_item+0x74>
8001bfa: 697b ldr r3, [r7, #20]
8001bfc: 6a1b ldr r3, [r3, #32]
8001bfe: 4619 mov r1, r3
8001c00: 68b8 ldr r0, [r7, #8]
8001c02: f7fe ff41 bl 8000a88 <case_insensitive_strcmp>
8001c06: 4603 mov r3, r0
8001c08: 2b00 cmp r3, #0
8001c0a: d1f0 bne.n 8001bee <get_object_item+0x56>
}
}
if ((current_element == NULL) || (current_element->string == NULL)) {
8001c0c: 697b ldr r3, [r7, #20]
8001c0e: 2b00 cmp r3, #0
8001c10: d003 beq.n 8001c1a <get_object_item+0x82>
8001c12: 697b ldr r3, [r7, #20]
8001c14: 6a1b ldr r3, [r3, #32]
8001c16: 2b00 cmp r3, #0
8001c18: d101 bne.n 8001c1e <get_object_item+0x86>
return NULL;
8001c1a: 2300 movs r3, #0
8001c1c: e000 b.n 8001c20 <get_object_item+0x88>
}
return current_element;
8001c1e: 697b ldr r3, [r7, #20]
}
8001c20: 4618 mov r0, r3
8001c22: 3718 adds r7, #24
8001c24: 46bd mov sp, r7
8001c26: bd80 pop {r7, pc}
08001c28 <cJSON_GetObjectItemCaseSensitive>:
{
return get_object_item(object, string, false);
}
CJSON_PUBLIC(cJSON *) cJSON_GetObjectItemCaseSensitive(const cJSON * const object, const char * const string)
{
8001c28: b580 push {r7, lr}
8001c2a: b082 sub sp, #8
8001c2c: af00 add r7, sp, #0
8001c2e: 6078 str r0, [r7, #4]
8001c30: 6039 str r1, [r7, #0]
return get_object_item(object, string, true);
8001c32: 2201 movs r2, #1
8001c34: 6839 ldr r1, [r7, #0]
8001c36: 6878 ldr r0, [r7, #4]
8001c38: f7ff ffae bl 8001b98 <get_object_item>
8001c3c: 4603 mov r3, r0
}
8001c3e: 4618 mov r0, r3
8001c40: 3708 adds r7, #8
8001c42: 46bd mov sp, r7
8001c44: bd80 pop {r7, pc}
08001c46 <cJSON_IsNumber>:
return (item->type & 0xFF) == cJSON_NULL;
}
CJSON_PUBLIC(cJSON_bool) cJSON_IsNumber(const cJSON * const item)
{
8001c46: b480 push {r7}
8001c48: b083 sub sp, #12
8001c4a: af00 add r7, sp, #0
8001c4c: 6078 str r0, [r7, #4]
if (item == NULL)
8001c4e: 687b ldr r3, [r7, #4]
8001c50: 2b00 cmp r3, #0
8001c52: d101 bne.n 8001c58 <cJSON_IsNumber+0x12>
{
return false;
8001c54: 2300 movs r3, #0
8001c56: e007 b.n 8001c68 <cJSON_IsNumber+0x22>
}
return (item->type & 0xFF) == cJSON_Number;
8001c58: 687b ldr r3, [r7, #4]
8001c5a: 68db ldr r3, [r3, #12]
8001c5c: b2db uxtb r3, r3
8001c5e: 2b08 cmp r3, #8
8001c60: bf0c ite eq
8001c62: 2301 moveq r3, #1
8001c64: 2300 movne r3, #0
8001c66: b2db uxtb r3, r3
}
8001c68: 4618 mov r0, r3
8001c6a: 370c adds r7, #12
8001c6c: 46bd mov sp, r7
8001c6e: f85d 7b04 ldr.w r7, [sp], #4
8001c72: 4770 bx lr
08001c74 <cJSON_IsArray>:
return (item->type & 0xFF) == cJSON_String;
}
CJSON_PUBLIC(cJSON_bool) cJSON_IsArray(const cJSON * const item)
{
8001c74: b480 push {r7}
8001c76: b083 sub sp, #12
8001c78: af00 add r7, sp, #0
8001c7a: 6078 str r0, [r7, #4]
if (item == NULL)
8001c7c: 687b ldr r3, [r7, #4]
8001c7e: 2b00 cmp r3, #0
8001c80: d101 bne.n 8001c86 <cJSON_IsArray+0x12>
{
return false;
8001c82: 2300 movs r3, #0
8001c84: e007 b.n 8001c96 <cJSON_IsArray+0x22>
}
return (item->type & 0xFF) == cJSON_Array;
8001c86: 687b ldr r3, [r7, #4]
8001c88: 68db ldr r3, [r3, #12]
8001c8a: b2db uxtb r3, r3
8001c8c: 2b20 cmp r3, #32
8001c8e: bf0c ite eq
8001c90: 2301 moveq r3, #1
8001c92: 2300 movne r3, #0
8001c94: b2db uxtb r3, r3
}
8001c96: 4618 mov r0, r3
8001c98: 370c adds r7, #12
8001c9a: 46bd mov sp, r7
8001c9c: f85d 7b04 ldr.w r7, [sp], #4
8001ca0: 4770 bx lr
08001ca2 <vApplicationStackOverflowHook>:
/* Hook prototypes */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);
/* USER CODE BEGIN 4 */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
{
8001ca2: b480 push {r7}
8001ca4: b083 sub sp, #12
8001ca6: af00 add r7, sp, #0
8001ca8: 6078 str r0, [r7, #4]
8001caa: 6039 str r1, [r7, #0]
/* Run time stack overflow checking is performed if
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
called if a stack overflow is detected. */
}
8001cac: bf00 nop
8001cae: 370c adds r7, #12
8001cb0: 46bd mov sp, r7
8001cb2: f85d 7b04 ldr.w r7, [sp], #4
8001cb6: 4770 bx lr
08001cb8 <__NVIC_SystemReset>:
/**
\brief System Reset
\details Initiates a system reset request to reset the MCU.
*/
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
8001cb8: b480 push {r7}
8001cba: af00 add r7, sp, #0
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
__STATIC_FORCEINLINE void __DSB(void)
{
__ASM volatile ("dsb 0xF":::"memory");
8001cbc: f3bf 8f4f dsb sy
}
8001cc0: bf00 nop
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
8001cc2: 4b06 ldr r3, [pc, #24] @ (8001cdc <__NVIC_SystemReset+0x24>)
8001cc4: 68db ldr r3, [r3, #12]
8001cc6: f403 62e0 and.w r2, r3, #1792 @ 0x700
SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8001cca: 4904 ldr r1, [pc, #16] @ (8001cdc <__NVIC_SystemReset+0x24>)
8001ccc: 4b04 ldr r3, [pc, #16] @ (8001ce0 <__NVIC_SystemReset+0x28>)
8001cce: 4313 orrs r3, r2
8001cd0: 60cb str r3, [r1, #12]
__ASM volatile ("dsb 0xF":::"memory");
8001cd2: f3bf 8f4f dsb sy
}
8001cd6: bf00 nop
SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
__DSB(); /* Ensure completion of memory access */
for(;;) /* wait until reset */
{
__NOP();
8001cd8: bf00 nop
8001cda: e7fd b.n 8001cd8 <__NVIC_SystemReset+0x20>
8001cdc: e000ed00 .word 0xe000ed00
8001ce0: 05fa0004 .word 0x05fa0004
08001ce4 <ITM_SendChar>:
\li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
\param [in] ch Character to transmit.
\returns Character to transmit.
*/
__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
{
8001ce4: b480 push {r7}
8001ce6: b083 sub sp, #12
8001ce8: af00 add r7, sp, #0
8001cea: 6078 str r0, [r7, #4]
if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
8001cec: f04f 4360 mov.w r3, #3758096384 @ 0xe0000000
8001cf0: f8d3 3e80 ldr.w r3, [r3, #3712] @ 0xe80
8001cf4: f003 0301 and.w r3, r3, #1
8001cf8: 2b00 cmp r3, #0
8001cfa: d013 beq.n 8001d24 <ITM_SendChar+0x40>
((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
8001cfc: f04f 4360 mov.w r3, #3758096384 @ 0xe0000000
8001d00: f8d3 3e00 ldr.w r3, [r3, #3584] @ 0xe00
8001d04: f003 0301 and.w r3, r3, #1
if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
8001d08: 2b00 cmp r3, #0
8001d0a: d00b beq.n 8001d24 <ITM_SendChar+0x40>
{
while (ITM->PORT[0U].u32 == 0UL)
8001d0c: e000 b.n 8001d10 <ITM_SendChar+0x2c>
{
__NOP();
8001d0e: bf00 nop
while (ITM->PORT[0U].u32 == 0UL)
8001d10: f04f 4360 mov.w r3, #3758096384 @ 0xe0000000
8001d14: 681b ldr r3, [r3, #0]
8001d16: 2b00 cmp r3, #0
8001d18: d0f9 beq.n 8001d0e <ITM_SendChar+0x2a>
}
ITM->PORT[0U].u8 = (uint8_t)ch;
8001d1a: f04f 4360 mov.w r3, #3758096384 @ 0xe0000000
8001d1e: 687a ldr r2, [r7, #4]
8001d20: b2d2 uxtb r2, r2
8001d22: 701a strb r2, [r3, #0]
}
return (ch);
8001d24: 687b ldr r3, [r7, #4]
}
8001d26: 4618 mov r0, r3
8001d28: 370c adds r7, #12
8001d2a: 46bd mov sp, r7
8001d2c: f85d 7b04 ldr.w r7, [sp], #4
8001d30: 4770 bx lr
08001d32 <__io_putchar>:
//{
// printf("DMA callback\n");
//}
int __io_putchar(int ch)
{
8001d32: b580 push {r7, lr}
8001d34: b082 sub sp, #8
8001d36: af00 add r7, sp, #0
8001d38: 6078 str r0, [r7, #4]
#ifdef UART_TASK_LOGS
// HAL_UART_Transmit(&huart8, (uint8_t *)&ch, 1, 0xFFFF); // Use UART8 as debug interface
ITM_SendChar(ch); // Use SWV as debug interface
8001d3a: 687b ldr r3, [r7, #4]
8001d3c: 4618 mov r0, r3
8001d3e: f7ff ffd1 bl 8001ce4 <ITM_SendChar>
#endif
return ch;
8001d42: 687b ldr r3, [r7, #4]
}
8001d44: 4618 mov r0, r3
8001d46: 3708 adds r7, #8
8001d48: 46bd mov sp, r7
8001d4a: bd80 pop {r7, pc}
08001d4c <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8001d4c: b580 push {r7, lr}
8001d4e: b084 sub sp, #16
8001d50: af00 add r7, sp, #0
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MPU Configuration--------------------------------------------------------*/
MPU_Config();
8001d52: f000 fc8d bl 8002670 <MPU_Config>
if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
8001d56: 4b5f ldr r3, [pc, #380] @ (8001ed4 <main+0x188>)
8001d58: 695b ldr r3, [r3, #20]
8001d5a: f403 3300 and.w r3, r3, #131072 @ 0x20000
8001d5e: 2b00 cmp r3, #0
8001d60: d11b bne.n 8001d9a <main+0x4e>
__ASM volatile ("dsb 0xF":::"memory");
8001d62: f3bf 8f4f dsb sy
}
8001d66: bf00 nop
__ASM volatile ("isb 0xF":::"memory");
8001d68: f3bf 8f6f isb sy
}
8001d6c: bf00 nop
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
8001d6e: 4b59 ldr r3, [pc, #356] @ (8001ed4 <main+0x188>)
8001d70: 2200 movs r2, #0
8001d72: f8c3 2250 str.w r2, [r3, #592] @ 0x250
__ASM volatile ("dsb 0xF":::"memory");
8001d76: f3bf 8f4f dsb sy
}
8001d7a: bf00 nop
__ASM volatile ("isb 0xF":::"memory");
8001d7c: f3bf 8f6f isb sy
}
8001d80: bf00 nop
SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
8001d82: 4b54 ldr r3, [pc, #336] @ (8001ed4 <main+0x188>)
8001d84: 695b ldr r3, [r3, #20]
8001d86: 4a53 ldr r2, [pc, #332] @ (8001ed4 <main+0x188>)
8001d88: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8001d8c: 6153 str r3, [r2, #20]
__ASM volatile ("dsb 0xF":::"memory");
8001d8e: f3bf 8f4f dsb sy
}
8001d92: bf00 nop
__ASM volatile ("isb 0xF":::"memory");
8001d94: f3bf 8f6f isb sy
}
8001d98: e000 b.n 8001d9c <main+0x50>
if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
8001d9a: bf00 nop
if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
8001d9c: 4b4d ldr r3, [pc, #308] @ (8001ed4 <main+0x188>)
8001d9e: 695b ldr r3, [r3, #20]
8001da0: f403 3380 and.w r3, r3, #65536 @ 0x10000
8001da4: 2b00 cmp r3, #0
8001da6: d138 bne.n 8001e1a <main+0xce>
SCB->CSSELR = 0U; /* select Level 1 data cache */
8001da8: 4b4a ldr r3, [pc, #296] @ (8001ed4 <main+0x188>)
8001daa: 2200 movs r2, #0
8001dac: f8c3 2084 str.w r2, [r3, #132] @ 0x84
__ASM volatile ("dsb 0xF":::"memory");
8001db0: f3bf 8f4f dsb sy
}
8001db4: bf00 nop
ccsidr = SCB->CCSIDR;
8001db6: 4b47 ldr r3, [pc, #284] @ (8001ed4 <main+0x188>)
8001db8: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
8001dbc: 60fb str r3, [r7, #12]
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
8001dbe: 68fb ldr r3, [r7, #12]
8001dc0: 0b5b lsrs r3, r3, #13
8001dc2: f3c3 030e ubfx r3, r3, #0, #15
8001dc6: 60bb str r3, [r7, #8]
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
8001dc8: 68fb ldr r3, [r7, #12]
8001dca: 08db lsrs r3, r3, #3
8001dcc: f3c3 0309 ubfx r3, r3, #0, #10
8001dd0: 607b str r3, [r7, #4]
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
8001dd2: 68bb ldr r3, [r7, #8]
8001dd4: 015a lsls r2, r3, #5
8001dd6: f643 73e0 movw r3, #16352 @ 0x3fe0
8001dda: 4013 ands r3, r2
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
8001ddc: 687a ldr r2, [r7, #4]
8001dde: 0792 lsls r2, r2, #30
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
8001de0: 493c ldr r1, [pc, #240] @ (8001ed4 <main+0x188>)
8001de2: 4313 orrs r3, r2
8001de4: f8c1 3260 str.w r3, [r1, #608] @ 0x260
} while (ways-- != 0U);
8001de8: 687b ldr r3, [r7, #4]
8001dea: 1e5a subs r2, r3, #1
8001dec: 607a str r2, [r7, #4]
8001dee: 2b00 cmp r3, #0
8001df0: d1ef bne.n 8001dd2 <main+0x86>
} while(sets-- != 0U);
8001df2: 68bb ldr r3, [r7, #8]
8001df4: 1e5a subs r2, r3, #1
8001df6: 60ba str r2, [r7, #8]
8001df8: 2b00 cmp r3, #0
8001dfa: d1e5 bne.n 8001dc8 <main+0x7c>
__ASM volatile ("dsb 0xF":::"memory");
8001dfc: f3bf 8f4f dsb sy
}
8001e00: bf00 nop
SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
8001e02: 4b34 ldr r3, [pc, #208] @ (8001ed4 <main+0x188>)
8001e04: 695b ldr r3, [r3, #20]
8001e06: 4a33 ldr r2, [pc, #204] @ (8001ed4 <main+0x188>)
8001e08: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8001e0c: 6153 str r3, [r2, #20]
__ASM volatile ("dsb 0xF":::"memory");
8001e0e: f3bf 8f4f dsb sy
}
8001e12: bf00 nop
__ASM volatile ("isb 0xF":::"memory");
8001e14: f3bf 8f6f isb sy
}
8001e18: e000 b.n 8001e1c <main+0xd0>
if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
8001e1a: bf00 nop
SCB_EnableDCache();
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8001e1c: f003 fd84 bl 8005928 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8001e20: f000 f87c bl 8001f1c <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8001e24: f000 fb08 bl 8002438 <MX_GPIO_Init>
MX_DMA_Init();
8001e28: f000 fade bl 80023e8 <MX_DMA_Init>
MX_UART8_Init();
8001e2c: f000 f950 bl 80020d0 <MX_UART8_Init>
MX_CRC_Init();
8001e30: f000 f8f2 bl 8002018 <MX_CRC_Init>
MX_RNG_Init();
8001e34: f000 f936 bl 80020a4 <MX_RNG_Init>
MX_USART1_UART_Init();
8001e38: f000 f996 bl 8002168 <MX_USART1_UART_Init>
MX_USART2_UART_Init();
8001e3c: f000 f9e4 bl 8002208 <MX_USART2_UART_Init>
MX_USART3_UART_Init();
8001e40: f000 fa32 bl 80022a8 <MX_USART3_UART_Init>
MX_USART6_UART_Init();
8001e44: f000 fa80 bl 8002348 <MX_USART6_UART_Init>
MX_IWDG1_Init();
8001e48: f000 f910 bl 800206c <MX_IWDG1_Init>
// HAL_DMA_RegisterCallback(&hdma_uart8_rx, HAL_DMA_XFER_CPLT_CB_ID, dmaCallback);
/* USER CODE END 2 */
/* Init scheduler */
osKernelInitialize();
8001e4c: f00f faee bl 801142c <osKernelInitialize>
/* USER CODE BEGIN RTOS_MUTEX */
/* add mutexes, ... */
resMeasurementsMutex = osMutexNew (NULL);
8001e50: 2000 movs r0, #0
8001e52: f00f fcfa bl 801184a <osMutexNew>
8001e56: 4603 mov r3, r0
8001e58: 4a1f ldr r2, [pc, #124] @ (8001ed8 <main+0x18c>)
8001e5a: 6013 str r3, [r2, #0]
sensorsInfoMutex = osMutexNew (NULL);
8001e5c: 2000 movs r0, #0
8001e5e: f00f fcf4 bl 801184a <osMutexNew>
8001e62: 4603 mov r3, r0
8001e64: 4a1d ldr r2, [pc, #116] @ (8001edc <main+0x190>)
8001e66: 6013 str r3, [r2, #0]
/* add semaphores, ... */
/* USER CODE END RTOS_SEMAPHORES */
/* Create the timer(s) */
/* creation of relay1Timer */
relay1TimerHandle = osTimerNew(relay1TimerCallback, osTimerOnce, NULL, &relay1Timer_attributes);
8001e68: 4b1d ldr r3, [pc, #116] @ (8001ee0 <main+0x194>)
8001e6a: 2200 movs r2, #0
8001e6c: 2100 movs r1, #0
8001e6e: 481d ldr r0, [pc, #116] @ (8001ee4 <main+0x198>)
8001e70: f00f fc0a bl 8011688 <osTimerNew>
8001e74: 4603 mov r3, r0
8001e76: 4a1c ldr r2, [pc, #112] @ (8001ee8 <main+0x19c>)
8001e78: 6013 str r3, [r2, #0]
/* creation of relay2Timer */
relay2TimerHandle = osTimerNew(relay2TimerCallback, osTimerOnce, NULL, &relay2Timer_attributes);
8001e7a: 4b1c ldr r3, [pc, #112] @ (8001eec <main+0x1a0>)
8001e7c: 2200 movs r2, #0
8001e7e: 2100 movs r1, #0
8001e80: 481b ldr r0, [pc, #108] @ (8001ef0 <main+0x1a4>)
8001e82: f00f fc01 bl 8011688 <osTimerNew>
8001e86: 4603 mov r3, r0
8001e88: 4a1a ldr r2, [pc, #104] @ (8001ef4 <main+0x1a8>)
8001e8a: 6013 str r3, [r2, #0]
/* creation of relay3Timer */
relay3TimerHandle = osTimerNew(relay3TimerCallback, osTimerOnce, NULL, &relay3Timer_attributes);
8001e8c: 4b1a ldr r3, [pc, #104] @ (8001ef8 <main+0x1ac>)
8001e8e: 2200 movs r2, #0
8001e90: 2100 movs r1, #0
8001e92: 481a ldr r0, [pc, #104] @ (8001efc <main+0x1b0>)
8001e94: f00f fbf8 bl 8011688 <osTimerNew>
8001e98: 4603 mov r3, r0
8001e9a: 4a19 ldr r2, [pc, #100] @ (8001f00 <main+0x1b4>)
8001e9c: 6013 str r3, [r2, #0]
/* creation of relay4Timer */
relay4TimerHandle = osTimerNew(relay4TimerCallback, osTimerOnce, NULL, &relay4Timer_attributes);
8001e9e: 4b19 ldr r3, [pc, #100] @ (8001f04 <main+0x1b8>)
8001ea0: 2200 movs r2, #0
8001ea2: 2100 movs r1, #0
8001ea4: 4818 ldr r0, [pc, #96] @ (8001f08 <main+0x1bc>)
8001ea6: f00f fbef bl 8011688 <osTimerNew>
8001eaa: 4603 mov r3, r0
8001eac: 4a17 ldr r2, [pc, #92] @ (8001f0c <main+0x1c0>)
8001eae: 6013 str r3, [r2, #0]
/* add queues, ... */
/* USER CODE END RTOS_QUEUES */
/* Create the thread(s) */
/* creation of defaultTask */
defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
8001eb0: 4a17 ldr r2, [pc, #92] @ (8001f10 <main+0x1c4>)
8001eb2: 2100 movs r1, #0
8001eb4: 4817 ldr r0, [pc, #92] @ (8001f14 <main+0x1c8>)
8001eb6: f00f fb18 bl 80114ea <osThreadNew>
8001eba: 4603 mov r3, r0
8001ebc: 4a16 ldr r2, [pc, #88] @ (8001f18 <main+0x1cc>)
8001ebe: 6013 str r3, [r2, #0]
/* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */
mqtt_cli_init();
8001ec0: f001 fc5e bl 8003780 <mqtt_cli_init>
// Uart8TasksInit();
UartTasksInit();
8001ec4: f002 fb84 bl 80045d0 <UartTasksInit>
#ifdef USER_MOCKS
MockMeasurmetsTaskInit();
#else
MeasurmentsReqSchedulerTaskInit();
8001ec8: f003 fb74 bl 80055b4 <MeasurmentsReqSchedulerTaskInit>
/* USER CODE BEGIN RTOS_EVENTS */
/* add events, ... */
/* USER CODE END RTOS_EVENTS */
/* Start scheduler */
osKernelStart();
8001ecc: f00f fad2 bl 8011474 <osKernelStart>
/* We should never get here as control is now taken by the scheduler */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
8001ed0: bf00 nop
8001ed2: e7fd b.n 8001ed0 <main+0x184>
8001ed4: e000ed00 .word 0xe000ed00
8001ed8: 24002288 .word 0x24002288
8001edc: 2400228c .word 0x2400228c
8001ee0: 08031bfc .word 0x08031bfc
8001ee4: 080025f1 .word 0x080025f1
8001ee8: 24000668 .word 0x24000668
8001eec: 08031c0c .word 0x08031c0c
8001ef0: 08002611 .word 0x08002611
8001ef4: 24000698 .word 0x24000698
8001ef8: 08031c1c .word 0x08031c1c
8001efc: 08002631 .word 0x08002631
8001f00: 240006c8 .word 0x240006c8
8001f04: 08031c2c .word 0x08031c2c
8001f08: 08002651 .word 0x08002651
8001f0c: 240006f8 .word 0x240006f8
8001f10: 08031bd8 .word 0x08031bd8
8001f14: 080025d1 .word 0x080025d1
8001f18: 24000664 .word 0x24000664
08001f1c <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8001f1c: b580 push {r7, lr}
8001f1e: b09c sub sp, #112 @ 0x70
8001f20: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8001f22: f107 0324 add.w r3, r7, #36 @ 0x24
8001f26: 224c movs r2, #76 @ 0x4c
8001f28: 2100 movs r1, #0
8001f2a: 4618 mov r0, r3
8001f2c: f028 ff10 bl 802ad50 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8001f30: 1d3b adds r3, r7, #4
8001f32: 2220 movs r2, #32
8001f34: 2100 movs r1, #0
8001f36: 4618 mov r0, r3
8001f38: f028 ff0a bl 802ad50 <memset>
/** Supply configuration update enable
*/
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
8001f3c: 2002 movs r0, #2
8001f3e: f008 fb3d bl 800a5bc <HAL_PWREx_ConfigSupply>
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
8001f42: 2300 movs r3, #0
8001f44: 603b str r3, [r7, #0]
8001f46: 4b32 ldr r3, [pc, #200] @ (8002010 <SystemClock_Config+0xf4>)
8001f48: 6adb ldr r3, [r3, #44] @ 0x2c
8001f4a: 4a31 ldr r2, [pc, #196] @ (8002010 <SystemClock_Config+0xf4>)
8001f4c: f023 0301 bic.w r3, r3, #1
8001f50: 62d3 str r3, [r2, #44] @ 0x2c
8001f52: 4b2f ldr r3, [pc, #188] @ (8002010 <SystemClock_Config+0xf4>)
8001f54: 6adb ldr r3, [r3, #44] @ 0x2c
8001f56: f003 0301 and.w r3, r3, #1
8001f5a: 603b str r3, [r7, #0]
8001f5c: 4b2d ldr r3, [pc, #180] @ (8002014 <SystemClock_Config+0xf8>)
8001f5e: 699b ldr r3, [r3, #24]
8001f60: 4a2c ldr r2, [pc, #176] @ (8002014 <SystemClock_Config+0xf8>)
8001f62: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8001f66: 6193 str r3, [r2, #24]
8001f68: 4b2a ldr r3, [pc, #168] @ (8002014 <SystemClock_Config+0xf8>)
8001f6a: 699b ldr r3, [r3, #24]
8001f6c: f403 4340 and.w r3, r3, #49152 @ 0xc000
8001f70: 603b str r3, [r7, #0]
8001f72: 683b ldr r3, [r7, #0]
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
8001f74: bf00 nop
8001f76: 4b27 ldr r3, [pc, #156] @ (8002014 <SystemClock_Config+0xf8>)
8001f78: 699b ldr r3, [r3, #24]
8001f7a: f403 5300 and.w r3, r3, #8192 @ 0x2000
8001f7e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8001f82: d1f8 bne.n 8001f76 <SystemClock_Config+0x5a>
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_LSI
8001f84: 2329 movs r3, #41 @ 0x29
8001f86: 627b str r3, [r7, #36] @ 0x24
|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8001f88: f44f 3380 mov.w r3, #65536 @ 0x10000
8001f8c: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
8001f8e: 2301 movs r3, #1
8001f90: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
8001f92: 2301 movs r3, #1
8001f94: 63fb str r3, [r7, #60] @ 0x3c
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8001f96: 2302 movs r3, #2
8001f98: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8001f9a: 2302 movs r3, #2
8001f9c: 64fb str r3, [r7, #76] @ 0x4c
RCC_OscInitStruct.PLL.PLLM = 5;
8001f9e: 2305 movs r3, #5
8001fa0: 653b str r3, [r7, #80] @ 0x50
RCC_OscInitStruct.PLL.PLLN = 160;
8001fa2: 23a0 movs r3, #160 @ 0xa0
8001fa4: 657b str r3, [r7, #84] @ 0x54
RCC_OscInitStruct.PLL.PLLP = 2;
8001fa6: 2302 movs r3, #2
8001fa8: 65bb str r3, [r7, #88] @ 0x58
RCC_OscInitStruct.PLL.PLLQ = 2;
8001faa: 2302 movs r3, #2
8001fac: 65fb str r3, [r7, #92] @ 0x5c
RCC_OscInitStruct.PLL.PLLR = 2;
8001fae: 2302 movs r3, #2
8001fb0: 663b str r3, [r7, #96] @ 0x60
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
8001fb2: 2308 movs r3, #8
8001fb4: 667b str r3, [r7, #100] @ 0x64
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
8001fb6: 2300 movs r3, #0
8001fb8: 66bb str r3, [r7, #104] @ 0x68
RCC_OscInitStruct.PLL.PLLFRACN = 0;
8001fba: 2300 movs r3, #0
8001fbc: 66fb str r3, [r7, #108] @ 0x6c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8001fbe: f107 0324 add.w r3, r7, #36 @ 0x24
8001fc2: 4618 mov r0, r3
8001fc4: f008 fbba bl 800a73c <HAL_RCC_OscConfig>
8001fc8: 4603 mov r3, r0
8001fca: 2b00 cmp r3, #0
8001fcc: d001 beq.n 8001fd2 <SystemClock_Config+0xb6>
{
Error_Handler();
8001fce: f000 fbbf bl 8002750 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8001fd2: 233f movs r3, #63 @ 0x3f
8001fd4: 607b str r3, [r7, #4]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8001fd6: 2303 movs r3, #3
8001fd8: 60bb str r3, [r7, #8]
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
8001fda: 2300 movs r3, #0
8001fdc: 60fb str r3, [r7, #12]
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
8001fde: 2308 movs r3, #8
8001fe0: 613b str r3, [r7, #16]
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
8001fe2: 2340 movs r3, #64 @ 0x40
8001fe4: 617b str r3, [r7, #20]
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
8001fe6: 2340 movs r3, #64 @ 0x40
8001fe8: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
8001fea: f44f 6380 mov.w r3, #1024 @ 0x400
8001fee: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
8001ff0: 2340 movs r3, #64 @ 0x40
8001ff2: 623b str r3, [r7, #32]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
8001ff4: 1d3b adds r3, r7, #4
8001ff6: 2102 movs r1, #2
8001ff8: 4618 mov r0, r3
8001ffa: f008 fff9 bl 800aff0 <HAL_RCC_ClockConfig>
8001ffe: 4603 mov r3, r0
8002000: 2b00 cmp r3, #0
8002002: d001 beq.n 8002008 <SystemClock_Config+0xec>
{
Error_Handler();
8002004: f000 fba4 bl 8002750 <Error_Handler>
}
}
8002008: bf00 nop
800200a: 3770 adds r7, #112 @ 0x70
800200c: 46bd mov sp, r7
800200e: bd80 pop {r7, pc}
8002010: 58000400 .word 0x58000400
8002014: 58024800 .word 0x58024800
08002018 <MX_CRC_Init>:
* @brief CRC Initialization Function
* @param None
* @retval None
*/
static void MX_CRC_Init(void)
{
8002018: b580 push {r7, lr}
800201a: af00 add r7, sp, #0
/* USER CODE END CRC_Init 0 */
/* USER CODE BEGIN CRC_Init 1 */
/* USER CODE END CRC_Init 1 */
hcrc.Instance = CRC;
800201c: 4b11 ldr r3, [pc, #68] @ (8002064 <MX_CRC_Init+0x4c>)
800201e: 4a12 ldr r2, [pc, #72] @ (8002068 <MX_CRC_Init+0x50>)
8002020: 601a str r2, [r3, #0]
hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
8002022: 4b10 ldr r3, [pc, #64] @ (8002064 <MX_CRC_Init+0x4c>)
8002024: 2201 movs r2, #1
8002026: 711a strb r2, [r3, #4]
hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
8002028: 4b0e ldr r3, [pc, #56] @ (8002064 <MX_CRC_Init+0x4c>)
800202a: 2200 movs r2, #0
800202c: 715a strb r2, [r3, #5]
hcrc.Init.GeneratingPolynomial = 4129;
800202e: 4b0d ldr r3, [pc, #52] @ (8002064 <MX_CRC_Init+0x4c>)
8002030: f241 0221 movw r2, #4129 @ 0x1021
8002034: 609a str r2, [r3, #8]
hcrc.Init.CRCLength = CRC_POLYLENGTH_16B;
8002036: 4b0b ldr r3, [pc, #44] @ (8002064 <MX_CRC_Init+0x4c>)
8002038: 2208 movs r2, #8
800203a: 60da str r2, [r3, #12]
hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
800203c: 4b09 ldr r3, [pc, #36] @ (8002064 <MX_CRC_Init+0x4c>)
800203e: 2200 movs r2, #0
8002040: 615a str r2, [r3, #20]
hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
8002042: 4b08 ldr r3, [pc, #32] @ (8002064 <MX_CRC_Init+0x4c>)
8002044: 2200 movs r2, #0
8002046: 619a str r2, [r3, #24]
hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
8002048: 4b06 ldr r3, [pc, #24] @ (8002064 <MX_CRC_Init+0x4c>)
800204a: 2201 movs r2, #1
800204c: 621a str r2, [r3, #32]
if (HAL_CRC_Init(&hcrc) != HAL_OK)
800204e: 4805 ldr r0, [pc, #20] @ (8002064 <MX_CRC_Init+0x4c>)
8002050: f003 fe62 bl 8005d18 <HAL_CRC_Init>
8002054: 4603 mov r3, r0
8002056: 2b00 cmp r3, #0
8002058: d001 beq.n 800205e <MX_CRC_Init+0x46>
{
Error_Handler();
800205a: f000 fb79 bl 8002750 <Error_Handler>
}
/* USER CODE BEGIN CRC_Init 2 */
/* USER CODE END CRC_Init 2 */
}
800205e: bf00 nop
8002060: bd80 pop {r7, pc}
8002062: bf00 nop
8002064: 24000248 .word 0x24000248
8002068: 58024c00 .word 0x58024c00
0800206c <MX_IWDG1_Init>:
* @brief IWDG1 Initialization Function
* @param None
* @retval None
*/
static void MX_IWDG1_Init(void)
{
800206c: b580 push {r7, lr}
800206e: af00 add r7, sp, #0
/* USER CODE END IWDG1_Init 0 */
/* USER CODE BEGIN IWDG1_Init 1 */
/* USER CODE END IWDG1_Init 1 */
hiwdg1.Instance = IWDG1;
8002070: 4b0a ldr r3, [pc, #40] @ (800209c <MX_IWDG1_Init+0x30>)
8002072: 4a0b ldr r2, [pc, #44] @ (80020a0 <MX_IWDG1_Init+0x34>)
8002074: 601a str r2, [r3, #0]
hiwdg1.Init.Prescaler = IWDG_PRESCALER_64;
8002076: 4b09 ldr r3, [pc, #36] @ (800209c <MX_IWDG1_Init+0x30>)
8002078: 2204 movs r2, #4
800207a: 605a str r2, [r3, #4]
hiwdg1.Init.Window = 249;
800207c: 4b07 ldr r3, [pc, #28] @ (800209c <MX_IWDG1_Init+0x30>)
800207e: 22f9 movs r2, #249 @ 0xf9
8002080: 60da str r2, [r3, #12]
hiwdg1.Init.Reload = 249;
8002082: 4b06 ldr r3, [pc, #24] @ (800209c <MX_IWDG1_Init+0x30>)
8002084: 22f9 movs r2, #249 @ 0xf9
8002086: 609a str r2, [r3, #8]
if (HAL_IWDG_Init(&hiwdg1) != HAL_OK)
8002088: 4804 ldr r0, [pc, #16] @ (800209c <MX_IWDG1_Init+0x30>)
800208a: f008 f9ae bl 800a3ea <HAL_IWDG_Init>
800208e: 4603 mov r3, r0
8002090: 2b00 cmp r3, #0
8002092: d001 beq.n 8002098 <MX_IWDG1_Init+0x2c>
{
Error_Handler();
8002094: f000 fb5c bl 8002750 <Error_Handler>
}
/* USER CODE BEGIN IWDG1_Init 2 */
/* USER CODE END IWDG1_Init 2 */
}
8002098: bf00 nop
800209a: bd80 pop {r7, pc}
800209c: 2400026c .word 0x2400026c
80020a0: 58004800 .word 0x58004800
080020a4 <MX_RNG_Init>:
* @brief RNG Initialization Function
* @param None
* @retval None
*/
static void MX_RNG_Init(void)
{
80020a4: b580 push {r7, lr}
80020a6: af00 add r7, sp, #0
/* USER CODE END RNG_Init 0 */
/* USER CODE BEGIN RNG_Init 1 */
/* USER CODE END RNG_Init 1 */
hrng.Instance = RNG;
80020a8: 4b07 ldr r3, [pc, #28] @ (80020c8 <MX_RNG_Init+0x24>)
80020aa: 4a08 ldr r2, [pc, #32] @ (80020cc <MX_RNG_Init+0x28>)
80020ac: 601a str r2, [r3, #0]
hrng.Init.ClockErrorDetection = RNG_CED_ENABLE;
80020ae: 4b06 ldr r3, [pc, #24] @ (80020c8 <MX_RNG_Init+0x24>)
80020b0: 2200 movs r2, #0
80020b2: 605a str r2, [r3, #4]
if (HAL_RNG_Init(&hrng) != HAL_OK)
80020b4: 4804 ldr r0, [pc, #16] @ (80020c8 <MX_RNG_Init+0x24>)
80020b6: f00b f979 bl 800d3ac <HAL_RNG_Init>
80020ba: 4603 mov r3, r0
80020bc: 2b00 cmp r3, #0
80020be: d001 beq.n 80020c4 <MX_RNG_Init+0x20>
{
Error_Handler();
80020c0: f000 fb46 bl 8002750 <Error_Handler>
}
/* USER CODE BEGIN RNG_Init 2 */
/* USER CODE END RNG_Init 2 */
}
80020c4: bf00 nop
80020c6: bd80 pop {r7, pc}
80020c8: 2400027c .word 0x2400027c
80020cc: 48021800 .word 0x48021800
080020d0 <MX_UART8_Init>:
* @brief UART8 Initialization Function
* @param None
* @retval None
*/
static void MX_UART8_Init(void)
{
80020d0: b580 push {r7, lr}
80020d2: af00 add r7, sp, #0
/* USER CODE END UART8_Init 0 */
/* USER CODE BEGIN UART8_Init 1 */
/* USER CODE END UART8_Init 1 */
huart8.Instance = UART8;
80020d4: 4b22 ldr r3, [pc, #136] @ (8002160 <MX_UART8_Init+0x90>)
80020d6: 4a23 ldr r2, [pc, #140] @ (8002164 <MX_UART8_Init+0x94>)
80020d8: 601a str r2, [r3, #0]
huart8.Init.BaudRate = 115200;
80020da: 4b21 ldr r3, [pc, #132] @ (8002160 <MX_UART8_Init+0x90>)
80020dc: f44f 32e1 mov.w r2, #115200 @ 0x1c200
80020e0: 605a str r2, [r3, #4]
huart8.Init.WordLength = UART_WORDLENGTH_8B;
80020e2: 4b1f ldr r3, [pc, #124] @ (8002160 <MX_UART8_Init+0x90>)
80020e4: 2200 movs r2, #0
80020e6: 609a str r2, [r3, #8]
huart8.Init.StopBits = UART_STOPBITS_1;
80020e8: 4b1d ldr r3, [pc, #116] @ (8002160 <MX_UART8_Init+0x90>)
80020ea: 2200 movs r2, #0
80020ec: 60da str r2, [r3, #12]
huart8.Init.Parity = UART_PARITY_NONE;
80020ee: 4b1c ldr r3, [pc, #112] @ (8002160 <MX_UART8_Init+0x90>)
80020f0: 2200 movs r2, #0
80020f2: 611a str r2, [r3, #16]
huart8.Init.Mode = UART_MODE_TX_RX;
80020f4: 4b1a ldr r3, [pc, #104] @ (8002160 <MX_UART8_Init+0x90>)
80020f6: 220c movs r2, #12
80020f8: 615a str r2, [r3, #20]
huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
80020fa: 4b19 ldr r3, [pc, #100] @ (8002160 <MX_UART8_Init+0x90>)
80020fc: 2200 movs r2, #0
80020fe: 619a str r2, [r3, #24]
huart8.Init.OverSampling = UART_OVERSAMPLING_16;
8002100: 4b17 ldr r3, [pc, #92] @ (8002160 <MX_UART8_Init+0x90>)
8002102: 2200 movs r2, #0
8002104: 61da str r2, [r3, #28]
huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
8002106: 4b16 ldr r3, [pc, #88] @ (8002160 <MX_UART8_Init+0x90>)
8002108: 2200 movs r2, #0
800210a: 621a str r2, [r3, #32]
huart8.Init.ClockPrescaler = UART_PRESCALER_DIV1;
800210c: 4b14 ldr r3, [pc, #80] @ (8002160 <MX_UART8_Init+0x90>)
800210e: 2200 movs r2, #0
8002110: 625a str r2, [r3, #36] @ 0x24
huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
8002112: 4b13 ldr r3, [pc, #76] @ (8002160 <MX_UART8_Init+0x90>)
8002114: 2200 movs r2, #0
8002116: 629a str r2, [r3, #40] @ 0x28
if (HAL_UART_Init(&huart8) != HAL_OK)
8002118: 4811 ldr r0, [pc, #68] @ (8002160 <MX_UART8_Init+0x90>)
800211a: f00b fccd bl 800dab8 <HAL_UART_Init>
800211e: 4603 mov r3, r0
8002120: 2b00 cmp r3, #0
8002122: d001 beq.n 8002128 <MX_UART8_Init+0x58>
{
Error_Handler();
8002124: f000 fb14 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart8, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
8002128: 2100 movs r1, #0
800212a: 480d ldr r0, [pc, #52] @ (8002160 <MX_UART8_Init+0x90>)
800212c: f00e f96d bl 801040a <HAL_UARTEx_SetTxFifoThreshold>
8002130: 4603 mov r3, r0
8002132: 2b00 cmp r3, #0
8002134: d001 beq.n 800213a <MX_UART8_Init+0x6a>
{
Error_Handler();
8002136: f000 fb0b bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart8, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
800213a: 2100 movs r1, #0
800213c: 4808 ldr r0, [pc, #32] @ (8002160 <MX_UART8_Init+0x90>)
800213e: f00e f9a2 bl 8010486 <HAL_UARTEx_SetRxFifoThreshold>
8002142: 4603 mov r3, r0
8002144: 2b00 cmp r3, #0
8002146: d001 beq.n 800214c <MX_UART8_Init+0x7c>
{
Error_Handler();
8002148: f000 fb02 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_DisableFifoMode(&huart8) != HAL_OK)
800214c: 4804 ldr r0, [pc, #16] @ (8002160 <MX_UART8_Init+0x90>)
800214e: f00e f923 bl 8010398 <HAL_UARTEx_DisableFifoMode>
8002152: 4603 mov r3, r0
8002154: 2b00 cmp r3, #0
8002156: d001 beq.n 800215c <MX_UART8_Init+0x8c>
{
Error_Handler();
8002158: f000 fafa bl 8002750 <Error_Handler>
}
/* USER CODE BEGIN UART8_Init 2 */
/* USER CODE END UART8_Init 2 */
}
800215c: bf00 nop
800215e: bd80 pop {r7, pc}
8002160: 24000290 .word 0x24000290
8002164: 40007c00 .word 0x40007c00
08002168 <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
8002168: b580 push {r7, lr}
800216a: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
800216c: 4b24 ldr r3, [pc, #144] @ (8002200 <MX_USART1_UART_Init+0x98>)
800216e: 4a25 ldr r2, [pc, #148] @ (8002204 <MX_USART1_UART_Init+0x9c>)
8002170: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
8002172: 4b23 ldr r3, [pc, #140] @ (8002200 <MX_USART1_UART_Init+0x98>)
8002174: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8002178: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
800217a: 4b21 ldr r3, [pc, #132] @ (8002200 <MX_USART1_UART_Init+0x98>)
800217c: 2200 movs r2, #0
800217e: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8002180: 4b1f ldr r3, [pc, #124] @ (8002200 <MX_USART1_UART_Init+0x98>)
8002182: 2200 movs r2, #0
8002184: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
8002186: 4b1e ldr r3, [pc, #120] @ (8002200 <MX_USART1_UART_Init+0x98>)
8002188: 2200 movs r2, #0
800218a: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
800218c: 4b1c ldr r3, [pc, #112] @ (8002200 <MX_USART1_UART_Init+0x98>)
800218e: 220c movs r2, #12
8002190: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8002192: 4b1b ldr r3, [pc, #108] @ (8002200 <MX_USART1_UART_Init+0x98>)
8002194: 2200 movs r2, #0
8002196: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8002198: 4b19 ldr r3, [pc, #100] @ (8002200 <MX_USART1_UART_Init+0x98>)
800219a: 2200 movs r2, #0
800219c: 61da str r2, [r3, #28]
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
800219e: 4b18 ldr r3, [pc, #96] @ (8002200 <MX_USART1_UART_Init+0x98>)
80021a0: 2200 movs r2, #0
80021a2: 621a str r2, [r3, #32]
huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
80021a4: 4b16 ldr r3, [pc, #88] @ (8002200 <MX_USART1_UART_Init+0x98>)
80021a6: 2200 movs r2, #0
80021a8: 625a str r2, [r3, #36] @ 0x24
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
80021aa: 4b15 ldr r3, [pc, #84] @ (8002200 <MX_USART1_UART_Init+0x98>)
80021ac: 2201 movs r2, #1
80021ae: 629a str r2, [r3, #40] @ 0x28
huart1.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
80021b0: 4b13 ldr r3, [pc, #76] @ (8002200 <MX_USART1_UART_Init+0x98>)
80021b2: f44f 3200 mov.w r2, #131072 @ 0x20000
80021b6: 62da str r2, [r3, #44] @ 0x2c
if (HAL_UART_Init(&huart1) != HAL_OK)
80021b8: 4811 ldr r0, [pc, #68] @ (8002200 <MX_USART1_UART_Init+0x98>)
80021ba: f00b fc7d bl 800dab8 <HAL_UART_Init>
80021be: 4603 mov r3, r0
80021c0: 2b00 cmp r3, #0
80021c2: d001 beq.n 80021c8 <MX_USART1_UART_Init+0x60>
{
Error_Handler();
80021c4: f000 fac4 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
80021c8: 2100 movs r1, #0
80021ca: 480d ldr r0, [pc, #52] @ (8002200 <MX_USART1_UART_Init+0x98>)
80021cc: f00e f91d bl 801040a <HAL_UARTEx_SetTxFifoThreshold>
80021d0: 4603 mov r3, r0
80021d2: 2b00 cmp r3, #0
80021d4: d001 beq.n 80021da <MX_USART1_UART_Init+0x72>
{
Error_Handler();
80021d6: f000 fabb bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
80021da: 2100 movs r1, #0
80021dc: 4808 ldr r0, [pc, #32] @ (8002200 <MX_USART1_UART_Init+0x98>)
80021de: f00e f952 bl 8010486 <HAL_UARTEx_SetRxFifoThreshold>
80021e2: 4603 mov r3, r0
80021e4: 2b00 cmp r3, #0
80021e6: d001 beq.n 80021ec <MX_USART1_UART_Init+0x84>
{
Error_Handler();
80021e8: f000 fab2 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
80021ec: 4804 ldr r0, [pc, #16] @ (8002200 <MX_USART1_UART_Init+0x98>)
80021ee: f00e f8d3 bl 8010398 <HAL_UARTEx_DisableFifoMode>
80021f2: 4603 mov r3, r0
80021f4: 2b00 cmp r3, #0
80021f6: d001 beq.n 80021fc <MX_USART1_UART_Init+0x94>
{
Error_Handler();
80021f8: f000 faaa bl 8002750 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
80021fc: bf00 nop
80021fe: bd80 pop {r7, pc}
8002200: 24000324 .word 0x24000324
8002204: 40011000 .word 0x40011000
08002208 <MX_USART2_UART_Init>:
* @brief USART2 Initialization Function
* @param None
* @retval None
*/
static void MX_USART2_UART_Init(void)
{
8002208: b580 push {r7, lr}
800220a: af00 add r7, sp, #0
/* USER CODE END USART2_Init 0 */
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
huart2.Instance = USART2;
800220c: 4b24 ldr r3, [pc, #144] @ (80022a0 <MX_USART2_UART_Init+0x98>)
800220e: 4a25 ldr r2, [pc, #148] @ (80022a4 <MX_USART2_UART_Init+0x9c>)
8002210: 601a str r2, [r3, #0]
huart2.Init.BaudRate = 115200;
8002212: 4b23 ldr r3, [pc, #140] @ (80022a0 <MX_USART2_UART_Init+0x98>)
8002214: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8002218: 605a str r2, [r3, #4]
huart2.Init.WordLength = UART_WORDLENGTH_8B;
800221a: 4b21 ldr r3, [pc, #132] @ (80022a0 <MX_USART2_UART_Init+0x98>)
800221c: 2200 movs r2, #0
800221e: 609a str r2, [r3, #8]
huart2.Init.StopBits = UART_STOPBITS_1;
8002220: 4b1f ldr r3, [pc, #124] @ (80022a0 <MX_USART2_UART_Init+0x98>)
8002222: 2200 movs r2, #0
8002224: 60da str r2, [r3, #12]
huart2.Init.Parity = UART_PARITY_NONE;
8002226: 4b1e ldr r3, [pc, #120] @ (80022a0 <MX_USART2_UART_Init+0x98>)
8002228: 2200 movs r2, #0
800222a: 611a str r2, [r3, #16]
huart2.Init.Mode = UART_MODE_TX_RX;
800222c: 4b1c ldr r3, [pc, #112] @ (80022a0 <MX_USART2_UART_Init+0x98>)
800222e: 220c movs r2, #12
8002230: 615a str r2, [r3, #20]
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8002232: 4b1b ldr r3, [pc, #108] @ (80022a0 <MX_USART2_UART_Init+0x98>)
8002234: 2200 movs r2, #0
8002236: 619a str r2, [r3, #24]
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
8002238: 4b19 ldr r3, [pc, #100] @ (80022a0 <MX_USART2_UART_Init+0x98>)
800223a: 2200 movs r2, #0
800223c: 61da str r2, [r3, #28]
huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
800223e: 4b18 ldr r3, [pc, #96] @ (80022a0 <MX_USART2_UART_Init+0x98>)
8002240: 2200 movs r2, #0
8002242: 621a str r2, [r3, #32]
huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
8002244: 4b16 ldr r3, [pc, #88] @ (80022a0 <MX_USART2_UART_Init+0x98>)
8002246: 2200 movs r2, #0
8002248: 625a str r2, [r3, #36] @ 0x24
huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
800224a: 4b15 ldr r3, [pc, #84] @ (80022a0 <MX_USART2_UART_Init+0x98>)
800224c: 2201 movs r2, #1
800224e: 629a str r2, [r3, #40] @ 0x28
huart2.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
8002250: 4b13 ldr r3, [pc, #76] @ (80022a0 <MX_USART2_UART_Init+0x98>)
8002252: f44f 3200 mov.w r2, #131072 @ 0x20000
8002256: 62da str r2, [r3, #44] @ 0x2c
if (HAL_UART_Init(&huart2) != HAL_OK)
8002258: 4811 ldr r0, [pc, #68] @ (80022a0 <MX_USART2_UART_Init+0x98>)
800225a: f00b fc2d bl 800dab8 <HAL_UART_Init>
800225e: 4603 mov r3, r0
8002260: 2b00 cmp r3, #0
8002262: d001 beq.n 8002268 <MX_USART2_UART_Init+0x60>
{
Error_Handler();
8002264: f000 fa74 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
8002268: 2100 movs r1, #0
800226a: 480d ldr r0, [pc, #52] @ (80022a0 <MX_USART2_UART_Init+0x98>)
800226c: f00e f8cd bl 801040a <HAL_UARTEx_SetTxFifoThreshold>
8002270: 4603 mov r3, r0
8002272: 2b00 cmp r3, #0
8002274: d001 beq.n 800227a <MX_USART2_UART_Init+0x72>
{
Error_Handler();
8002276: f000 fa6b bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
800227a: 2100 movs r1, #0
800227c: 4808 ldr r0, [pc, #32] @ (80022a0 <MX_USART2_UART_Init+0x98>)
800227e: f00e f902 bl 8010486 <HAL_UARTEx_SetRxFifoThreshold>
8002282: 4603 mov r3, r0
8002284: 2b00 cmp r3, #0
8002286: d001 beq.n 800228c <MX_USART2_UART_Init+0x84>
{
Error_Handler();
8002288: f000 fa62 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
800228c: 4804 ldr r0, [pc, #16] @ (80022a0 <MX_USART2_UART_Init+0x98>)
800228e: f00e f883 bl 8010398 <HAL_UARTEx_DisableFifoMode>
8002292: 4603 mov r3, r0
8002294: 2b00 cmp r3, #0
8002296: d001 beq.n 800229c <MX_USART2_UART_Init+0x94>
{
Error_Handler();
8002298: f000 fa5a bl 8002750 <Error_Handler>
}
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
}
800229c: bf00 nop
800229e: bd80 pop {r7, pc}
80022a0: 240003b8 .word 0x240003b8
80022a4: 40004400 .word 0x40004400
080022a8 <MX_USART3_UART_Init>:
* @brief USART3 Initialization Function
* @param None
* @retval None
*/
static void MX_USART3_UART_Init(void)
{
80022a8: b580 push {r7, lr}
80022aa: af00 add r7, sp, #0
/* USER CODE END USART3_Init 0 */
/* USER CODE BEGIN USART3_Init 1 */
/* USER CODE END USART3_Init 1 */
huart3.Instance = USART3;
80022ac: 4b24 ldr r3, [pc, #144] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022ae: 4a25 ldr r2, [pc, #148] @ (8002344 <MX_USART3_UART_Init+0x9c>)
80022b0: 601a str r2, [r3, #0]
huart3.Init.BaudRate = 115200;
80022b2: 4b23 ldr r3, [pc, #140] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022b4: f44f 32e1 mov.w r2, #115200 @ 0x1c200
80022b8: 605a str r2, [r3, #4]
huart3.Init.WordLength = UART_WORDLENGTH_8B;
80022ba: 4b21 ldr r3, [pc, #132] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022bc: 2200 movs r2, #0
80022be: 609a str r2, [r3, #8]
huart3.Init.StopBits = UART_STOPBITS_1;
80022c0: 4b1f ldr r3, [pc, #124] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022c2: 2200 movs r2, #0
80022c4: 60da str r2, [r3, #12]
huart3.Init.Parity = UART_PARITY_NONE;
80022c6: 4b1e ldr r3, [pc, #120] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022c8: 2200 movs r2, #0
80022ca: 611a str r2, [r3, #16]
huart3.Init.Mode = UART_MODE_TX_RX;
80022cc: 4b1c ldr r3, [pc, #112] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022ce: 220c movs r2, #12
80022d0: 615a str r2, [r3, #20]
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
80022d2: 4b1b ldr r3, [pc, #108] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022d4: 2200 movs r2, #0
80022d6: 619a str r2, [r3, #24]
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
80022d8: 4b19 ldr r3, [pc, #100] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022da: 2200 movs r2, #0
80022dc: 61da str r2, [r3, #28]
huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
80022de: 4b18 ldr r3, [pc, #96] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022e0: 2200 movs r2, #0
80022e2: 621a str r2, [r3, #32]
huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
80022e4: 4b16 ldr r3, [pc, #88] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022e6: 2200 movs r2, #0
80022e8: 625a str r2, [r3, #36] @ 0x24
huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
80022ea: 4b15 ldr r3, [pc, #84] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022ec: 2201 movs r2, #1
80022ee: 629a str r2, [r3, #40] @ 0x28
huart3.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
80022f0: 4b13 ldr r3, [pc, #76] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022f2: f44f 3200 mov.w r2, #131072 @ 0x20000
80022f6: 62da str r2, [r3, #44] @ 0x2c
if (HAL_UART_Init(&huart3) != HAL_OK)
80022f8: 4811 ldr r0, [pc, #68] @ (8002340 <MX_USART3_UART_Init+0x98>)
80022fa: f00b fbdd bl 800dab8 <HAL_UART_Init>
80022fe: 4603 mov r3, r0
8002300: 2b00 cmp r3, #0
8002302: d001 beq.n 8002308 <MX_USART3_UART_Init+0x60>
{
Error_Handler();
8002304: f000 fa24 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
8002308: 2100 movs r1, #0
800230a: 480d ldr r0, [pc, #52] @ (8002340 <MX_USART3_UART_Init+0x98>)
800230c: f00e f87d bl 801040a <HAL_UARTEx_SetTxFifoThreshold>
8002310: 4603 mov r3, r0
8002312: 2b00 cmp r3, #0
8002314: d001 beq.n 800231a <MX_USART3_UART_Init+0x72>
{
Error_Handler();
8002316: f000 fa1b bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
800231a: 2100 movs r1, #0
800231c: 4808 ldr r0, [pc, #32] @ (8002340 <MX_USART3_UART_Init+0x98>)
800231e: f00e f8b2 bl 8010486 <HAL_UARTEx_SetRxFifoThreshold>
8002322: 4603 mov r3, r0
8002324: 2b00 cmp r3, #0
8002326: d001 beq.n 800232c <MX_USART3_UART_Init+0x84>
{
Error_Handler();
8002328: f000 fa12 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
800232c: 4804 ldr r0, [pc, #16] @ (8002340 <MX_USART3_UART_Init+0x98>)
800232e: f00e f833 bl 8010398 <HAL_UARTEx_DisableFifoMode>
8002332: 4603 mov r3, r0
8002334: 2b00 cmp r3, #0
8002336: d001 beq.n 800233c <MX_USART3_UART_Init+0x94>
{
Error_Handler();
8002338: f000 fa0a bl 8002750 <Error_Handler>
}
/* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */
}
800233c: bf00 nop
800233e: bd80 pop {r7, pc}
8002340: 2400044c .word 0x2400044c
8002344: 40004800 .word 0x40004800
08002348 <MX_USART6_UART_Init>:
* @brief USART6 Initialization Function
* @param None
* @retval None
*/
static void MX_USART6_UART_Init(void)
{
8002348: b580 push {r7, lr}
800234a: af00 add r7, sp, #0
/* USER CODE END USART6_Init 0 */
/* USER CODE BEGIN USART6_Init 1 */
/* USER CODE END USART6_Init 1 */
huart6.Instance = USART6;
800234c: 4b24 ldr r3, [pc, #144] @ (80023e0 <MX_USART6_UART_Init+0x98>)
800234e: 4a25 ldr r2, [pc, #148] @ (80023e4 <MX_USART6_UART_Init+0x9c>)
8002350: 601a str r2, [r3, #0]
huart6.Init.BaudRate = 115200;
8002352: 4b23 ldr r3, [pc, #140] @ (80023e0 <MX_USART6_UART_Init+0x98>)
8002354: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8002358: 605a str r2, [r3, #4]
huart6.Init.WordLength = UART_WORDLENGTH_8B;
800235a: 4b21 ldr r3, [pc, #132] @ (80023e0 <MX_USART6_UART_Init+0x98>)
800235c: 2200 movs r2, #0
800235e: 609a str r2, [r3, #8]
huart6.Init.StopBits = UART_STOPBITS_1;
8002360: 4b1f ldr r3, [pc, #124] @ (80023e0 <MX_USART6_UART_Init+0x98>)
8002362: 2200 movs r2, #0
8002364: 60da str r2, [r3, #12]
huart6.Init.Parity = UART_PARITY_NONE;
8002366: 4b1e ldr r3, [pc, #120] @ (80023e0 <MX_USART6_UART_Init+0x98>)
8002368: 2200 movs r2, #0
800236a: 611a str r2, [r3, #16]
huart6.Init.Mode = UART_MODE_TX_RX;
800236c: 4b1c ldr r3, [pc, #112] @ (80023e0 <MX_USART6_UART_Init+0x98>)
800236e: 220c movs r2, #12
8002370: 615a str r2, [r3, #20]
huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8002372: 4b1b ldr r3, [pc, #108] @ (80023e0 <MX_USART6_UART_Init+0x98>)
8002374: 2200 movs r2, #0
8002376: 619a str r2, [r3, #24]
huart6.Init.OverSampling = UART_OVERSAMPLING_16;
8002378: 4b19 ldr r3, [pc, #100] @ (80023e0 <MX_USART6_UART_Init+0x98>)
800237a: 2200 movs r2, #0
800237c: 61da str r2, [r3, #28]
huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
800237e: 4b18 ldr r3, [pc, #96] @ (80023e0 <MX_USART6_UART_Init+0x98>)
8002380: 2200 movs r2, #0
8002382: 621a str r2, [r3, #32]
huart6.Init.ClockPrescaler = UART_PRESCALER_DIV1;
8002384: 4b16 ldr r3, [pc, #88] @ (80023e0 <MX_USART6_UART_Init+0x98>)
8002386: 2200 movs r2, #0
8002388: 625a str r2, [r3, #36] @ 0x24
huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
800238a: 4b15 ldr r3, [pc, #84] @ (80023e0 <MX_USART6_UART_Init+0x98>)
800238c: 2201 movs r2, #1
800238e: 629a str r2, [r3, #40] @ 0x28
huart6.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
8002390: 4b13 ldr r3, [pc, #76] @ (80023e0 <MX_USART6_UART_Init+0x98>)
8002392: f44f 3200 mov.w r2, #131072 @ 0x20000
8002396: 62da str r2, [r3, #44] @ 0x2c
if (HAL_UART_Init(&huart6) != HAL_OK)
8002398: 4811 ldr r0, [pc, #68] @ (80023e0 <MX_USART6_UART_Init+0x98>)
800239a: f00b fb8d bl 800dab8 <HAL_UART_Init>
800239e: 4603 mov r3, r0
80023a0: 2b00 cmp r3, #0
80023a2: d001 beq.n 80023a8 <MX_USART6_UART_Init+0x60>
{
Error_Handler();
80023a4: f000 f9d4 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart6, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
80023a8: 2100 movs r1, #0
80023aa: 480d ldr r0, [pc, #52] @ (80023e0 <MX_USART6_UART_Init+0x98>)
80023ac: f00e f82d bl 801040a <HAL_UARTEx_SetTxFifoThreshold>
80023b0: 4603 mov r3, r0
80023b2: 2b00 cmp r3, #0
80023b4: d001 beq.n 80023ba <MX_USART6_UART_Init+0x72>
{
Error_Handler();
80023b6: f000 f9cb bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart6, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
80023ba: 2100 movs r1, #0
80023bc: 4808 ldr r0, [pc, #32] @ (80023e0 <MX_USART6_UART_Init+0x98>)
80023be: f00e f862 bl 8010486 <HAL_UARTEx_SetRxFifoThreshold>
80023c2: 4603 mov r3, r0
80023c4: 2b00 cmp r3, #0
80023c6: d001 beq.n 80023cc <MX_USART6_UART_Init+0x84>
{
Error_Handler();
80023c8: f000 f9c2 bl 8002750 <Error_Handler>
}
if (HAL_UARTEx_DisableFifoMode(&huart6) != HAL_OK)
80023cc: 4804 ldr r0, [pc, #16] @ (80023e0 <MX_USART6_UART_Init+0x98>)
80023ce: f00d ffe3 bl 8010398 <HAL_UARTEx_DisableFifoMode>
80023d2: 4603 mov r3, r0
80023d4: 2b00 cmp r3, #0
80023d6: d001 beq.n 80023dc <MX_USART6_UART_Init+0x94>
{
Error_Handler();
80023d8: f000 f9ba bl 8002750 <Error_Handler>
}
/* USER CODE BEGIN USART6_Init 2 */
/* USER CODE END USART6_Init 2 */
}
80023dc: bf00 nop
80023de: bd80 pop {r7, pc}
80023e0: 240004e0 .word 0x240004e0
80023e4: 40011400 .word 0x40011400
080023e8 <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
80023e8: b580 push {r7, lr}
80023ea: b082 sub sp, #8
80023ec: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();
80023ee: 4b11 ldr r3, [pc, #68] @ (8002434 <MX_DMA_Init+0x4c>)
80023f0: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
80023f4: 4a0f ldr r2, [pc, #60] @ (8002434 <MX_DMA_Init+0x4c>)
80023f6: f043 0302 orr.w r3, r3, #2
80023fa: f8c2 30d8 str.w r3, [r2, #216] @ 0xd8
80023fe: 4b0d ldr r3, [pc, #52] @ (8002434 <MX_DMA_Init+0x4c>)
8002400: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
8002404: f003 0302 and.w r3, r3, #2
8002408: 607b str r3, [r7, #4]
800240a: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA2_Stream6_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
800240c: 2200 movs r2, #0
800240e: 2105 movs r1, #5
8002410: 2045 movs r0, #69 @ 0x45
8002412: f003 fbe1 bl 8005bd8 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
8002416: 2045 movs r0, #69 @ 0x45
8002418: f003 fbf8 bl 8005c0c <HAL_NVIC_EnableIRQ>
/* DMA2_Stream7_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
800241c: 2200 movs r2, #0
800241e: 2105 movs r1, #5
8002420: 2046 movs r0, #70 @ 0x46
8002422: f003 fbd9 bl 8005bd8 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
8002426: 2046 movs r0, #70 @ 0x46
8002428: f003 fbf0 bl 8005c0c <HAL_NVIC_EnableIRQ>
}
800242c: bf00 nop
800242e: 3708 adds r7, #8
8002430: 46bd mov sp, r7
8002432: bd80 pop {r7, pc}
8002434: 58024400 .word 0x58024400
08002438 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8002438: b580 push {r7, lr}
800243a: b08c sub sp, #48 @ 0x30
800243c: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
800243e: f107 031c add.w r3, r7, #28
8002442: 2200 movs r2, #0
8002444: 601a str r2, [r3, #0]
8002446: 605a str r2, [r3, #4]
8002448: 609a str r2, [r3, #8]
800244a: 60da str r2, [r3, #12]
800244c: 611a str r2, [r3, #16]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOE_CLK_ENABLE();
800244e: 4b5d ldr r3, [pc, #372] @ (80025c4 <MX_GPIO_Init+0x18c>)
8002450: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8002454: 4a5b ldr r2, [pc, #364] @ (80025c4 <MX_GPIO_Init+0x18c>)
8002456: f043 0310 orr.w r3, r3, #16
800245a: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
800245e: 4b59 ldr r3, [pc, #356] @ (80025c4 <MX_GPIO_Init+0x18c>)
8002460: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8002464: f003 0310 and.w r3, r3, #16
8002468: 61bb str r3, [r7, #24]
800246a: 69bb ldr r3, [r7, #24]
__HAL_RCC_GPIOH_CLK_ENABLE();
800246c: 4b55 ldr r3, [pc, #340] @ (80025c4 <MX_GPIO_Init+0x18c>)
800246e: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8002472: 4a54 ldr r2, [pc, #336] @ (80025c4 <MX_GPIO_Init+0x18c>)
8002474: f043 0380 orr.w r3, r3, #128 @ 0x80
8002478: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
800247c: 4b51 ldr r3, [pc, #324] @ (80025c4 <MX_GPIO_Init+0x18c>)
800247e: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8002482: f003 0380 and.w r3, r3, #128 @ 0x80
8002486: 617b str r3, [r7, #20]
8002488: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOC_CLK_ENABLE();
800248a: 4b4e ldr r3, [pc, #312] @ (80025c4 <MX_GPIO_Init+0x18c>)
800248c: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8002490: 4a4c ldr r2, [pc, #304] @ (80025c4 <MX_GPIO_Init+0x18c>)
8002492: f043 0304 orr.w r3, r3, #4
8002496: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
800249a: 4b4a ldr r3, [pc, #296] @ (80025c4 <MX_GPIO_Init+0x18c>)
800249c: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
80024a0: f003 0304 and.w r3, r3, #4
80024a4: 613b str r3, [r7, #16]
80024a6: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
80024a8: 4b46 ldr r3, [pc, #280] @ (80025c4 <MX_GPIO_Init+0x18c>)
80024aa: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
80024ae: 4a45 ldr r2, [pc, #276] @ (80025c4 <MX_GPIO_Init+0x18c>)
80024b0: f043 0301 orr.w r3, r3, #1
80024b4: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
80024b8: 4b42 ldr r3, [pc, #264] @ (80025c4 <MX_GPIO_Init+0x18c>)
80024ba: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
80024be: f003 0301 and.w r3, r3, #1
80024c2: 60fb str r3, [r7, #12]
80024c4: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOB_CLK_ENABLE();
80024c6: 4b3f ldr r3, [pc, #252] @ (80025c4 <MX_GPIO_Init+0x18c>)
80024c8: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
80024cc: 4a3d ldr r2, [pc, #244] @ (80025c4 <MX_GPIO_Init+0x18c>)
80024ce: f043 0302 orr.w r3, r3, #2
80024d2: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
80024d6: 4b3b ldr r3, [pc, #236] @ (80025c4 <MX_GPIO_Init+0x18c>)
80024d8: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
80024dc: f003 0302 and.w r3, r3, #2
80024e0: 60bb str r3, [r7, #8]
80024e2: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOD_CLK_ENABLE();
80024e4: 4b37 ldr r3, [pc, #220] @ (80025c4 <MX_GPIO_Init+0x18c>)
80024e6: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
80024ea: 4a36 ldr r2, [pc, #216] @ (80025c4 <MX_GPIO_Init+0x18c>)
80024ec: f043 0308 orr.w r3, r3, #8
80024f0: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
80024f4: 4b33 ldr r3, [pc, #204] @ (80025c4 <MX_GPIO_Init+0x18c>)
80024f6: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
80024fa: f003 0308 and.w r3, r3, #8
80024fe: 607b str r3, [r7, #4]
8002500: 687b ldr r3, [r7, #4]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
8002502: 2200 movs r2, #0
8002504: 213c movs r1, #60 @ 0x3c
8002506: 4830 ldr r0, [pc, #192] @ (80025c8 <MX_GPIO_Init+0x190>)
8002508: f007 ff56 bl 800a3b8 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14, GPIO_PIN_RESET);
800250c: 2200 movs r2, #0
800250e: f44f 41f0 mov.w r1, #30720 @ 0x7800
8002512: 482e ldr r0, [pc, #184] @ (80025cc <MX_GPIO_Init+0x194>)
8002514: f007 ff50 bl 800a3b8 <HAL_GPIO_WritePin>
/*Configure GPIO pins : PE2 PE3 PE4 PE5 */
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
8002518: 233c movs r3, #60 @ 0x3c
800251a: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800251c: 2301 movs r3, #1
800251e: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002520: 2300 movs r3, #0
8002522: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002524: 2300 movs r3, #0
8002526: 62bb str r3, [r7, #40] @ 0x28
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
8002528: f107 031c add.w r3, r7, #28
800252c: 4619 mov r1, r3
800252e: 4826 ldr r0, [pc, #152] @ (80025c8 <MX_GPIO_Init+0x190>)
8002530: f007 fd7a bl 800a028 <HAL_GPIO_Init>
/*Configure GPIO pins : PD11 PD12 PD13 PD14 */
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14;
8002534: f44f 43f0 mov.w r3, #30720 @ 0x7800
8002538: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800253a: 2301 movs r3, #1
800253c: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800253e: 2300 movs r3, #0
8002540: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002542: 2300 movs r3, #0
8002544: 62bb str r3, [r7, #40] @ 0x28
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8002546: f107 031c add.w r3, r7, #28
800254a: 4619 mov r1, r3
800254c: 481f ldr r0, [pc, #124] @ (80025cc <MX_GPIO_Init+0x194>)
800254e: f007 fd6b bl 800a028 <HAL_GPIO_Init>
/*Configure GPIO pins : PD1 PD2 PD4 */
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4;
8002552: 2316 movs r3, #22
8002554: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8002556: 2300 movs r3, #0
8002558: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800255a: 2300 movs r3, #0
800255c: 627b str r3, [r7, #36] @ 0x24
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
800255e: f107 031c add.w r3, r7, #28
8002562: 4619 mov r1, r3
8002564: 4819 ldr r0, [pc, #100] @ (80025cc <MX_GPIO_Init+0x194>)
8002566: f007 fd5f bl 800a028 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
800256a: 2200 movs r2, #0
800256c: 213c movs r1, #60 @ 0x3c
800256e: 4816 ldr r0, [pc, #88] @ (80025c8 <MX_GPIO_Init+0x190>)
8002570: f007 ff22 bl 800a3b8 <HAL_GPIO_WritePin>
GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
8002574: f44f 4340 mov.w r3, #49152 @ 0xc000
8002578: 61fb str r3, [r7, #28]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800257a: 2301 movs r3, #1
800257c: 623b str r3, [r7, #32]
GPIO_InitStruct.Pull = GPIO_PULLUP;
800257e: 2301 movs r3, #1
8002580: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002582: 2300 movs r3, #0
8002584: 62bb str r3, [r7, #40] @ 0x28
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
8002586: f107 031c add.w r3, r7, #28
800258a: 4619 mov r1, r3
800258c: 480e ldr r0, [pc, #56] @ (80025c8 <MX_GPIO_Init+0x190>)
800258e: f007 fd4b bl 800a028 <HAL_GPIO_Init>
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_RESET);
8002592: 2200 movs r2, #0
8002594: f44f 4180 mov.w r1, #16384 @ 0x4000
8002598: 480b ldr r0, [pc, #44] @ (80025c8 <MX_GPIO_Init+0x190>)
800259a: f007 ff0d bl 800a3b8 <HAL_GPIO_WritePin>
HAL_Delay(100);
800259e: 2064 movs r0, #100 @ 0x64
80025a0: f003 fa1e bl 80059e0 <HAL_Delay>
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_SET);
80025a4: 2201 movs r2, #1
80025a6: f44f 4180 mov.w r1, #16384 @ 0x4000
80025aa: 4807 ldr r0, [pc, #28] @ (80025c8 <MX_GPIO_Init+0x190>)
80025ac: f007 ff04 bl 800a3b8 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_15, GPIO_PIN_SET);
80025b0: 2201 movs r2, #1
80025b2: f44f 4100 mov.w r1, #32768 @ 0x8000
80025b6: 4804 ldr r0, [pc, #16] @ (80025c8 <MX_GPIO_Init+0x190>)
80025b8: f007 fefe bl 800a3b8 <HAL_GPIO_WritePin>
/* USER CODE END MX_GPIO_Init_2 */
}
80025bc: bf00 nop
80025be: 3730 adds r7, #48 @ 0x30
80025c0: 46bd mov sp, r7
80025c2: bd80 pop {r7, pc}
80025c4: 58024400 .word 0x58024400
80025c8: 58021000 .word 0x58021000
80025cc: 58020c00 .word 0x58020c00
080025d0 <StartDefaultTask>:
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void *argument)
{
80025d0: b580 push {r7, lr}
80025d2: b082 sub sp, #8
80025d4: af00 add r7, sp, #0
80025d6: 6078 str r0, [r7, #4]
/* init code for LWIP */
MX_LWIP_Init();
80025d8: f00e f852 bl 8010680 <MX_LWIP_Init>
/* USER CODE BEGIN 5 */
/* Infinite loop */
for(;;)
{
HAL_IWDG_Refresh(&hiwdg1);
80025dc: 4803 ldr r0, [pc, #12] @ (80025ec <StartDefaultTask+0x1c>)
80025de: f007 ff53 bl 800a488 <HAL_IWDG_Refresh>
osDelay(pdMS_TO_TICKS(100));
80025e2: 2064 movs r0, #100 @ 0x64
80025e4: f00f f81f bl 8011626 <osDelay>
HAL_IWDG_Refresh(&hiwdg1);
80025e8: bf00 nop
80025ea: e7f7 b.n 80025dc <StartDefaultTask+0xc>
80025ec: 2400026c .word 0x2400026c
080025f0 <relay1TimerCallback>:
/* USER CODE END 5 */
}
/* relay1TimerCallback function */
void relay1TimerCallback(void *argument)
{
80025f0: b580 push {r7, lr}
80025f2: b082 sub sp, #8
80025f4: af00 add r7, sp, #0
80025f6: 6078 str r0, [r7, #4]
/* USER CODE BEGIN relay1TimerCallback */
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_5, GPIO_PIN_RESET);
80025f8: 2200 movs r2, #0
80025fa: 2120 movs r1, #32
80025fc: 4803 ldr r0, [pc, #12] @ (800260c <relay1TimerCallback+0x1c>)
80025fe: f007 fedb bl 800a3b8 <HAL_GPIO_WritePin>
/* USER CODE END relay1TimerCallback */
}
8002602: bf00 nop
8002604: 3708 adds r7, #8
8002606: 46bd mov sp, r7
8002608: bd80 pop {r7, pc}
800260a: bf00 nop
800260c: 58021000 .word 0x58021000
08002610 <relay2TimerCallback>:
/* relay2TimerCallback function */
void relay2TimerCallback(void *argument)
{
8002610: b580 push {r7, lr}
8002612: b082 sub sp, #8
8002614: af00 add r7, sp, #0
8002616: 6078 str r0, [r7, #4]
/* USER CODE BEGIN relay2TimerCallback */
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
8002618: 2200 movs r2, #0
800261a: 2108 movs r1, #8
800261c: 4803 ldr r0, [pc, #12] @ (800262c <relay2TimerCallback+0x1c>)
800261e: f007 fecb bl 800a3b8 <HAL_GPIO_WritePin>
/* USER CODE END relay2TimerCallback */
}
8002622: bf00 nop
8002624: 3708 adds r7, #8
8002626: 46bd mov sp, r7
8002628: bd80 pop {r7, pc}
800262a: bf00 nop
800262c: 58021000 .word 0x58021000
08002630 <relay3TimerCallback>:
/* relay3TimerCallback function */
void relay3TimerCallback(void *argument)
{
8002630: b580 push {r7, lr}
8002632: b082 sub sp, #8
8002634: af00 add r7, sp, #0
8002636: 6078 str r0, [r7, #4]
/* USER CODE BEGIN relay3TimerCallback */
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_4, GPIO_PIN_RESET);
8002638: 2200 movs r2, #0
800263a: 2110 movs r1, #16
800263c: 4803 ldr r0, [pc, #12] @ (800264c <relay3TimerCallback+0x1c>)
800263e: f007 febb bl 800a3b8 <HAL_GPIO_WritePin>
/* USER CODE END relay3TimerCallback */
}
8002642: bf00 nop
8002644: 3708 adds r7, #8
8002646: 46bd mov sp, r7
8002648: bd80 pop {r7, pc}
800264a: bf00 nop
800264c: 58021000 .word 0x58021000
08002650 <relay4TimerCallback>:
/* relay4TimerCallback function */
void relay4TimerCallback(void *argument)
{
8002650: b580 push {r7, lr}
8002652: b082 sub sp, #8
8002654: af00 add r7, sp, #0
8002656: 6078 str r0, [r7, #4]
/* USER CODE BEGIN relay4TimerCallback */
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
8002658: 2200 movs r2, #0
800265a: 2104 movs r1, #4
800265c: 4803 ldr r0, [pc, #12] @ (800266c <relay4TimerCallback+0x1c>)
800265e: f007 feab bl 800a3b8 <HAL_GPIO_WritePin>
/* USER CODE END relay4TimerCallback */
}
8002662: bf00 nop
8002664: 3708 adds r7, #8
8002666: 46bd mov sp, r7
8002668: bd80 pop {r7, pc}
800266a: bf00 nop
800266c: 58021000 .word 0x58021000
08002670 <MPU_Config>:
/* MPU Configuration */
void MPU_Config(void)
{
8002670: b580 push {r7, lr}
8002672: b084 sub sp, #16
8002674: af00 add r7, sp, #0
MPU_Region_InitTypeDef MPU_InitStruct = {0};
8002676: 463b mov r3, r7
8002678: 2200 movs r2, #0
800267a: 601a str r2, [r3, #0]
800267c: 605a str r2, [r3, #4]
800267e: 609a str r2, [r3, #8]
8002680: 60da str r2, [r3, #12]
/* Disables the MPU */
HAL_MPU_Disable();
8002682: f003 fad1 bl 8005c28 <HAL_MPU_Disable>
/** Initializes and configures the Region and the memory to be protected
*/
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
8002686: 2301 movs r3, #1
8002688: 703b strb r3, [r7, #0]
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
800268a: 2300 movs r3, #0
800268c: 707b strb r3, [r7, #1]
MPU_InitStruct.BaseAddress = 0x0;
800268e: 2300 movs r3, #0
8002690: 607b str r3, [r7, #4]
MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
8002692: 231f movs r3, #31
8002694: 723b strb r3, [r7, #8]
MPU_InitStruct.SubRegionDisable = 0x87;
8002696: 2387 movs r3, #135 @ 0x87
8002698: 727b strb r3, [r7, #9]
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
800269a: 2300 movs r3, #0
800269c: 72bb strb r3, [r7, #10]
MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
800269e: 2300 movs r3, #0
80026a0: 72fb strb r3, [r7, #11]
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
80026a2: 2301 movs r3, #1
80026a4: 733b strb r3, [r7, #12]
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
80026a6: 2301 movs r3, #1
80026a8: 737b strb r3, [r7, #13]
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
80026aa: 2300 movs r3, #0
80026ac: 73bb strb r3, [r7, #14]
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
80026ae: 2300 movs r3, #0
80026b0: 73fb strb r3, [r7, #15]
HAL_MPU_ConfigRegion(&MPU_InitStruct);
80026b2: 463b mov r3, r7
80026b4: 4618 mov r0, r3
80026b6: f003 faef bl 8005c98 <HAL_MPU_ConfigRegion>
/** Initializes and configures the Region and the memory to be protected
*/
MPU_InitStruct.Number = MPU_REGION_NUMBER1;
80026ba: 2301 movs r3, #1
80026bc: 707b strb r3, [r7, #1]
MPU_InitStruct.BaseAddress = 0x24020000;
80026be: 4b13 ldr r3, [pc, #76] @ (800270c <MPU_Config+0x9c>)
80026c0: 607b str r3, [r7, #4]
MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
80026c2: 2310 movs r3, #16
80026c4: 723b strb r3, [r7, #8]
MPU_InitStruct.SubRegionDisable = 0x0;
80026c6: 2300 movs r3, #0
80026c8: 727b strb r3, [r7, #9]
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
80026ca: 2301 movs r3, #1
80026cc: 72bb strb r3, [r7, #10]
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
80026ce: 2303 movs r3, #3
80026d0: 72fb strb r3, [r7, #11]
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
80026d2: 2300 movs r3, #0
80026d4: 737b strb r3, [r7, #13]
HAL_MPU_ConfigRegion(&MPU_InitStruct);
80026d6: 463b mov r3, r7
80026d8: 4618 mov r0, r3
80026da: f003 fadd bl 8005c98 <HAL_MPU_ConfigRegion>
/** Initializes and configures the Region and the memory to be protected
*/
MPU_InitStruct.Number = MPU_REGION_NUMBER2;
80026de: 2302 movs r3, #2
80026e0: 707b strb r3, [r7, #1]
MPU_InitStruct.BaseAddress = 0x24040000;
80026e2: 4b0b ldr r3, [pc, #44] @ (8002710 <MPU_Config+0xa0>)
80026e4: 607b str r3, [r7, #4]
MPU_InitStruct.Size = MPU_REGION_SIZE_512B;
80026e6: 2308 movs r3, #8
80026e8: 723b strb r3, [r7, #8]
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
80026ea: 2300 movs r3, #0
80026ec: 72bb strb r3, [r7, #10]
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
80026ee: 2301 movs r3, #1
80026f0: 737b strb r3, [r7, #13]
MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
80026f2: 2301 movs r3, #1
80026f4: 73fb strb r3, [r7, #15]
HAL_MPU_ConfigRegion(&MPU_InitStruct);
80026f6: 463b mov r3, r7
80026f8: 4618 mov r0, r3
80026fa: f003 facd bl 8005c98 <HAL_MPU_ConfigRegion>
/* Enables the MPU */
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
80026fe: 2004 movs r0, #4
8002700: f003 faaa bl 8005c58 <HAL_MPU_Enable>
}
8002704: bf00 nop
8002706: 3710 adds r7, #16
8002708: 46bd mov sp, r7
800270a: bd80 pop {r7, pc}
800270c: 24020000 .word 0x24020000
8002710: 24040000 .word 0x24040000
08002714 <HAL_TIM_PeriodElapsedCallback>:
* a global variable "uwTick" used as application time base.
* @param htim : TIM handle
* @retval None
*/
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
8002714: b580 push {r7, lr}
8002716: b082 sub sp, #8
8002718: af00 add r7, sp, #0
800271a: 6078 str r0, [r7, #4]
/* USER CODE BEGIN Callback 0 */
/* USER CODE END Callback 0 */
if (htim->Instance == TIM6) {
800271c: 687b ldr r3, [r7, #4]
800271e: 681b ldr r3, [r3, #0]
8002720: 4a09 ldr r2, [pc, #36] @ (8002748 <HAL_TIM_PeriodElapsedCallback+0x34>)
8002722: 4293 cmp r3, r2
8002724: d101 bne.n 800272a <HAL_TIM_PeriodElapsedCallback+0x16>
HAL_IncTick();
8002726: f003 f93b bl 80059a0 <HAL_IncTick>
}
/* USER CODE BEGIN Callback 1 */
if (htim->Instance == TIM6) {
800272a: 687b ldr r3, [r7, #4]
800272c: 681b ldr r3, [r3, #0]
800272e: 4a06 ldr r2, [pc, #24] @ (8002748 <HAL_TIM_PeriodElapsedCallback+0x34>)
8002730: 4293 cmp r3, r2
8002732: d104 bne.n 800273e <HAL_TIM_PeriodElapsedCallback+0x2a>
MilliTimer++;
8002734: 4b05 ldr r3, [pc, #20] @ (800274c <HAL_TIM_PeriodElapsedCallback+0x38>)
8002736: 681b ldr r3, [r3, #0]
8002738: 3301 adds r3, #1
800273a: 4a04 ldr r2, [pc, #16] @ (800274c <HAL_TIM_PeriodElapsedCallback+0x38>)
800273c: 6013 str r3, [r2, #0]
}
/* USER CODE END Callback 1 */
}
800273e: bf00 nop
8002740: 3708 adds r7, #8
8002742: 46bd mov sp, r7
8002744: bd80 pop {r7, pc}
8002746: bf00 nop
8002748: 40001000 .word 0x40001000
800274c: 2402b154 .word 0x2402b154
08002750 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8002750: b580 push {r7, lr}
8002752: af00 add r7, sp, #0
__ASM volatile ("cpsid i" : : : "memory");
8002754: b672 cpsid i
}
8002756: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
NVIC_SystemReset();
8002758: f7ff faae bl 8001cb8 <__NVIC_SystemReset>
0800275c <__NVIC_SystemReset>:
{
800275c: b480 push {r7}
800275e: af00 add r7, sp, #0
__ASM volatile ("dsb 0xF":::"memory");
8002760: f3bf 8f4f dsb sy
}
8002764: bf00 nop
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
8002766: 4b06 ldr r3, [pc, #24] @ (8002780 <__NVIC_SystemReset+0x24>)
8002768: 68db ldr r3, [r3, #12]
800276a: f403 62e0 and.w r2, r3, #1792 @ 0x700
SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
800276e: 4904 ldr r1, [pc, #16] @ (8002780 <__NVIC_SystemReset+0x24>)
8002770: 4b04 ldr r3, [pc, #16] @ (8002784 <__NVIC_SystemReset+0x28>)
8002772: 4313 orrs r3, r2
8002774: 60cb str r3, [r1, #12]
__ASM volatile ("dsb 0xF":::"memory");
8002776: f3bf 8f4f dsb sy
}
800277a: bf00 nop
__NOP();
800277c: bf00 nop
800277e: e7fd b.n 800277c <__NVIC_SystemReset+0x20>
8002780: e000ed00 .word 0xe000ed00
8002784: 05fa0004 .word 0x05fa0004
08002788 <MqttClientSubTask>:
void MqttClientSubTask (void* argument); // mqtt client subscribe task function
void MqttClientPubTask (void* argument); // mqtt client publish task function
uint32_t MqttConnectBroker (void); // mqtt broker connect function
void MqttMessageArrived (MessageData* msg); // mqtt message callback function
void MqttClientSubTask (void* argument) {
8002788: b580 push {r7, lr}
800278a: b082 sub sp, #8
800278c: af00 add r7, sp, #0
800278e: 6078 str r0, [r7, #4]
while (1) {
// waiting for valid ip address
if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
8002790: 4b16 ldr r3, [pc, #88] @ (80027ec <MqttClientSubTask+0x64>)
8002792: 685b ldr r3, [r3, #4]
8002794: 2b00 cmp r3, #0
8002796: d007 beq.n 80027a8 <MqttClientSubTask+0x20>
8002798: 4b14 ldr r3, [pc, #80] @ (80027ec <MqttClientSubTask+0x64>)
800279a: 689b ldr r3, [r3, #8]
800279c: 2b00 cmp r3, #0
800279e: d003 beq.n 80027a8 <MqttClientSubTask+0x20>
80027a0: 4b12 ldr r3, [pc, #72] @ (80027ec <MqttClientSubTask+0x64>)
80027a2: 68db ldr r3, [r3, #12]
80027a4: 2b00 cmp r3, #0
80027a6: d104 bne.n 80027b2 <MqttClientSubTask+0x2a>
{
osDelay (pdMS_TO_TICKS (1000));
80027a8: f44f 707a mov.w r0, #1000 @ 0x3e8
80027ac: f00e ff3b bl 8011626 <osDelay>
continue;
80027b0: e003 b.n 80027ba <MqttClientSubTask+0x32>
} else {
printf ("DHCP/Static IP O.K.\n");
80027b2: 480f ldr r0, [pc, #60] @ (80027f0 <MqttClientSubTask+0x68>)
80027b4: f028 f9a2 bl 802aafc <puts>
break;
80027b8: e000 b.n 80027bc <MqttClientSubTask+0x34>
if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
80027ba: e7e9 b.n 8002790 <MqttClientSubTask+0x8>
}
}
while (1) {
if (!mqttClient.isconnected) {
80027bc: 4b0d ldr r3, [pc, #52] @ (80027f4 <MqttClientSubTask+0x6c>)
80027be: 6a1b ldr r3, [r3, #32]
80027c0: 2b00 cmp r3, #0
80027c2: d109 bne.n 80027d8 <MqttClientSubTask+0x50>
// try to connect to the broker
if (MqttConnectBroker () != MQTT_SUCCESS) {
80027c4: f000 fbf2 bl 8002fac <MqttConnectBroker>
80027c8: 4603 mov r3, r0
80027ca: 2b00 cmp r3, #0
80027cc: d0f6 beq.n 80027bc <MqttClientSubTask+0x34>
osDelay (pdMS_TO_TICKS (1000));
80027ce: f44f 707a mov.w r0, #1000 @ 0x3e8
80027d2: f00e ff28 bl 8011626 <osDelay>
80027d6: e7f1 b.n 80027bc <MqttClientSubTask+0x34>
}
} else {
MQTTYield (&mqttClient, 500); // handle timer
80027d8: f44f 71fa mov.w r1, #500 @ 0x1f4
80027dc: 4805 ldr r0, [pc, #20] @ (80027f4 <MqttClientSubTask+0x6c>)
80027de: f025 fa8f bl 8027d00 <MQTTYield>
osDelay (pdMS_TO_TICKS (100));
80027e2: 2064 movs r0, #100 @ 0x64
80027e4: f00e ff1f bl 8011626 <osDelay>
if (!mqttClient.isconnected) {
80027e8: e7e8 b.n 80027bc <MqttClientSubTask+0x34>
80027ea: bf00 nop
80027ec: 24002294 .word 0x24002294
80027f0: 0802d6b8 .word 0x0802d6b8
80027f4: 24000740 .word 0x24000740
080027f8 <MqttClientPubTask>:
}
}
}
void MqttClientPubTask (void* argument) {
80027f8: b590 push {r4, r7, lr}
80027fa: f5ad 7d19 sub.w sp, sp, #612 @ 0x264
80027fe: af04 add r7, sp, #16
8002800: f507 7314 add.w r3, r7, #592 @ 0x250
8002804: f5a3 7313 sub.w r3, r3, #588 @ 0x24c
8002808: 6018 str r0, [r3, #0]
char messageBuffer[512] = { 0x00 };
800280a: f507 7314 add.w r3, r7, #592 @ 0x250
800280e: f5a3 7305 sub.w r3, r3, #532 @ 0x214
8002812: 2200 movs r2, #0
8002814: 601a str r2, [r3, #0]
8002816: 3304 adds r3, #4
8002818: f44f 72fe mov.w r2, #508 @ 0x1fc
800281c: 2100 movs r1, #0
800281e: 4618 mov r0, r3
8002820: f028 fa96 bl 802ad50 <memset>
char topicTextBuffer[32] = { 0x00 };
8002824: f507 7314 add.w r3, r7, #592 @ 0x250
8002828: f5a3 730d sub.w r3, r3, #564 @ 0x234
800282c: 2200 movs r2, #0
800282e: 601a str r2, [r3, #0]
8002830: 3304 adds r3, #4
8002832: 2200 movs r2, #0
8002834: 601a str r2, [r3, #0]
8002836: 605a str r2, [r3, #4]
8002838: 609a str r2, [r3, #8]
800283a: 60da str r2, [r3, #12]
800283c: 611a str r2, [r3, #16]
800283e: 615a str r2, [r3, #20]
8002840: 619a str r2, [r3, #24]
uint32_t bytesInBuffer = 0;
8002842: 2300 movs r3, #0
8002844: f8c7 3248 str.w r3, [r7, #584] @ 0x248
uint8_t boardNumber = 0;
8002848: 2300 movs r3, #0
800284a: f887 324f strb.w r3, [r7, #591] @ 0x24f
MQTTMessage message;
while (1) {
if (mqttClient.isconnected) {
800284e: 4b93 ldr r3, [pc, #588] @ (8002a9c <MqttClientPubTask+0x2a4>)
8002850: 6a1b ldr r3, [r3, #32]
8002852: 2b00 cmp r3, #0
8002854: f000 839c beq.w 8002f90 <MqttClientPubTask+0x798>
if (is_link_up ()) {
8002858: f00d ff02 bl 8010660 <is_link_up>
800285c: 4603 mov r3, r0
800285e: 2b00 cmp r3, #0
8002860: f000 8396 beq.w 8002f90 <MqttClientPubTask+0x798>
for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
8002864: 2300 movs r3, #0
8002866: f887 324f strb.w r3, [r7, #591] @ 0x24f
800286a: e10e b.n 8002a8a <MqttClientPubTask+0x292>
osMutexAcquire (resMeasurementsMutex, osWaitForever);
800286c: 4b8c ldr r3, [pc, #560] @ (8002aa0 <MqttClientPubTask+0x2a8>)
800286e: 681b ldr r3, [r3, #0]
8002870: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8002874: 4618 mov r0, r3
8002876: f00f f86e bl 8011956 <osMutexAcquire>
RESMeasurements* resMeas = &resMeasurements[boardNumber];
800287a: f897 224f ldrb.w r2, [r7, #591] @ 0x24f
800287e: 4613 mov r3, r2
8002880: 011b lsls r3, r3, #4
8002882: 1a9b subs r3, r3, r2
8002884: 009b lsls r3, r3, #2
8002886: 4a87 ldr r2, [pc, #540] @ (8002aa4 <MqttClientPubTask+0x2ac>)
8002888: 4413 add r3, r2
800288a: f8c7 323c str.w r3, [r7, #572] @ 0x23c
sprintf (topicTextBuffer, "RESmeasurments/%d", boardNumber + 1);
800288e: f897 324f ldrb.w r3, [r7, #591] @ 0x24f
8002892: 1c5a adds r2, r3, #1
8002894: f107 031c add.w r3, r7, #28
8002898: 4983 ldr r1, [pc, #524] @ (8002aa8 <MqttClientPubTask+0x2b0>)
800289a: 4618 mov r0, r3
800289c: f028 f936 bl 802ab0c <siprintf>
bytesInBuffer = sprintf (messageBuffer, "{\"voltageRMS\":[%.2f, %.2f, %.2f], ", resMeas->voltageRMS[0], resMeas->voltageRMS[1], resMeas->voltageRMS[2]);
80028a0: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
80028a4: edd3 7a00 vldr s15, [r3]
80028a8: eeb7 5ae7 vcvt.f64.f32 d5, s15
80028ac: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
80028b0: edd3 7a01 vldr s15, [r3, #4]
80028b4: eeb7 7ae7 vcvt.f64.f32 d7, s15
80028b8: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
80028bc: edd3 6a02 vldr s13, [r3, #8]
80028c0: eeb7 6ae6 vcvt.f64.f32 d6, s13
80028c4: f107 003c add.w r0, r7, #60 @ 0x3c
80028c8: ed8d 6b02 vstr d6, [sp, #8]
80028cc: ed8d 7b00 vstr d7, [sp]
80028d0: ec53 2b15 vmov r2, r3, d5
80028d4: 4975 ldr r1, [pc, #468] @ (8002aac <MqttClientPubTask+0x2b4>)
80028d6: f028 f919 bl 802ab0c <siprintf>
80028da: 4603 mov r3, r0
80028dc: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"voltagePeak\":[%.2f, %.2f, %.2f], ", resMeas->voltagePeak[0], resMeas->voltagePeak[1], resMeas->voltagePeak[2]);
80028e0: f107 023c add.w r2, r7, #60 @ 0x3c
80028e4: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
80028e8: 18d0 adds r0, r2, r3
80028ea: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
80028ee: edd3 7a03 vldr s15, [r3, #12]
80028f2: eeb7 5ae7 vcvt.f64.f32 d5, s15
80028f6: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
80028fa: edd3 7a04 vldr s15, [r3, #16]
80028fe: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002902: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
8002906: edd3 6a05 vldr s13, [r3, #20]
800290a: eeb7 6ae6 vcvt.f64.f32 d6, s13
800290e: ed8d 6b02 vstr d6, [sp, #8]
8002912: ed8d 7b00 vstr d7, [sp]
8002916: ec53 2b15 vmov r2, r3, d5
800291a: 4965 ldr r1, [pc, #404] @ (8002ab0 <MqttClientPubTask+0x2b8>)
800291c: f028 f8f6 bl 802ab0c <siprintf>
8002920: 4603 mov r3, r0
8002922: 461a mov r2, r3
8002924: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002928: 4413 add r3, r2
800292a: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentRMS\":[%.3f, %.3f, %.3f], ", resMeas->currentRMS[0], resMeas->currentRMS[1], resMeas->currentRMS[2]);
800292e: f107 023c add.w r2, r7, #60 @ 0x3c
8002932: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002936: 18d0 adds r0, r2, r3
8002938: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
800293c: edd3 7a06 vldr s15, [r3, #24]
8002940: eeb7 5ae7 vcvt.f64.f32 d5, s15
8002944: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
8002948: edd3 7a07 vldr s15, [r3, #28]
800294c: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002950: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
8002954: edd3 6a08 vldr s13, [r3, #32]
8002958: eeb7 6ae6 vcvt.f64.f32 d6, s13
800295c: ed8d 6b02 vstr d6, [sp, #8]
8002960: ed8d 7b00 vstr d7, [sp]
8002964: ec53 2b15 vmov r2, r3, d5
8002968: 4952 ldr r1, [pc, #328] @ (8002ab4 <MqttClientPubTask+0x2bc>)
800296a: f028 f8cf bl 802ab0c <siprintf>
800296e: 4603 mov r3, r0
8002970: 461a mov r2, r3
8002972: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002976: 4413 add r3, r2
8002978: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentPeak\":[%.3f, %.3f, %.3f], ", resMeas->currentPeak[0], resMeas->currentPeak[1], resMeas->currentPeak[2]);
800297c: f107 023c add.w r2, r7, #60 @ 0x3c
8002980: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002984: 18d0 adds r0, r2, r3
8002986: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
800298a: edd3 7a09 vldr s15, [r3, #36] @ 0x24
800298e: eeb7 5ae7 vcvt.f64.f32 d5, s15
8002992: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
8002996: edd3 7a0a vldr s15, [r3, #40] @ 0x28
800299a: eeb7 7ae7 vcvt.f64.f32 d7, s15
800299e: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
80029a2: edd3 6a0b vldr s13, [r3, #44] @ 0x2c
80029a6: eeb7 6ae6 vcvt.f64.f32 d6, s13
80029aa: ed8d 6b02 vstr d6, [sp, #8]
80029ae: ed8d 7b00 vstr d7, [sp]
80029b2: ec53 2b15 vmov r2, r3, d5
80029b6: 4940 ldr r1, [pc, #256] @ (8002ab8 <MqttClientPubTask+0x2c0>)
80029b8: f028 f8a8 bl 802ab0c <siprintf>
80029bc: 4603 mov r3, r0
80029be: 461a mov r2, r3
80029c0: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
80029c4: 4413 add r3, r2
80029c6: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"power\":[%.2f, %.2f, %.2f], ", resMeas->power[0], resMeas->power[1], resMeas->power[2]);
80029ca: f107 023c add.w r2, r7, #60 @ 0x3c
80029ce: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
80029d2: 18d0 adds r0, r2, r3
80029d4: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
80029d8: edd3 7a0c vldr s15, [r3, #48] @ 0x30
80029dc: eeb7 5ae7 vcvt.f64.f32 d5, s15
80029e0: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
80029e4: edd3 7a0d vldr s15, [r3, #52] @ 0x34
80029e8: eeb7 7ae7 vcvt.f64.f32 d7, s15
80029ec: f8d7 323c ldr.w r3, [r7, #572] @ 0x23c
80029f0: edd3 6a0e vldr s13, [r3, #56] @ 0x38
80029f4: eeb7 6ae6 vcvt.f64.f32 d6, s13
80029f8: ed8d 6b02 vstr d6, [sp, #8]
80029fc: ed8d 7b00 vstr d7, [sp]
8002a00: ec53 2b15 vmov r2, r3, d5
8002a04: 492d ldr r1, [pc, #180] @ (8002abc <MqttClientPubTask+0x2c4>)
8002a06: f028 f881 bl 802ab0c <siprintf>
8002a0a: 4603 mov r3, r0
8002a0c: 461a mov r2, r3
8002a0e: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002a12: 4413 add r3, r2
8002a14: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"lastSeen\": %ld}", slaveLastSeen[boardNumber]);
8002a18: f107 023c add.w r2, r7, #60 @ 0x3c
8002a1c: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002a20: 18d0 adds r0, r2, r3
8002a22: f897 324f ldrb.w r3, [r7, #591] @ 0x24f
8002a26: 4a26 ldr r2, [pc, #152] @ (8002ac0 <MqttClientPubTask+0x2c8>)
8002a28: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8002a2c: 461a mov r2, r3
8002a2e: 4925 ldr r1, [pc, #148] @ (8002ac4 <MqttClientPubTask+0x2cc>)
8002a30: f028 f86c bl 802ab0c <siprintf>
8002a34: 4603 mov r3, r0
8002a36: 461a mov r2, r3
8002a38: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002a3c: 4413 add r3, r2
8002a3e: f8c7 3248 str.w r3, [r7, #584] @ 0x248
osMutexRelease (resMeasurementsMutex);
8002a42: 4b17 ldr r3, [pc, #92] @ (8002aa0 <MqttClientPubTask+0x2a8>)
8002a44: 681b ldr r3, [r3, #0]
8002a46: 4618 mov r0, r3
8002a48: f00e ffd0 bl 80119ec <osMutexRelease>
message.payload = (void*)messageBuffer;
8002a4c: f507 7314 add.w r3, r7, #592 @ 0x250
8002a50: f5a3 7311 sub.w r3, r3, #580 @ 0x244
8002a54: f107 023c add.w r2, r7, #60 @ 0x3c
8002a58: 609a str r2, [r3, #8]
message.payloadlen = strlen (messageBuffer);
8002a5a: f107 033c add.w r3, r7, #60 @ 0x3c
8002a5e: 4618 mov r0, r3
8002a60: f7fd fc9e bl 80003a0 <strlen>
8002a64: 4602 mov r2, r0
8002a66: f507 7314 add.w r3, r7, #592 @ 0x250
8002a6a: f5a3 7311 sub.w r3, r3, #580 @ 0x244
8002a6e: 60da str r2, [r3, #12]
MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
8002a70: f107 020c add.w r2, r7, #12
8002a74: f107 031c add.w r3, r7, #28
8002a78: 4619 mov r1, r3
8002a7a: 4808 ldr r0, [pc, #32] @ (8002a9c <MqttClientPubTask+0x2a4>)
8002a7c: f025 fb5f bl 802813e <MQTTPublish>
for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
8002a80: f897 324f ldrb.w r3, [r7, #591] @ 0x24f
8002a84: 3301 adds r3, #1
8002a86: f887 324f strb.w r3, [r7, #591] @ 0x24f
8002a8a: f897 324f ldrb.w r3, [r7, #591] @ 0x24f
8002a8e: 2b03 cmp r3, #3
8002a90: f67f aeec bls.w 800286c <MqttClientPubTask+0x74>
}
for (boardNumber = 0; boardNumber < SLAVES_COUNT + 1; boardNumber++) {
8002a94: 2300 movs r3, #0
8002a96: f887 324f strb.w r3, [r7, #591] @ 0x24f
8002a9a: e274 b.n 8002f86 <MqttClientPubTask+0x78e>
8002a9c: 24000740 .word 0x24000740
8002aa0: 24002288 .word 0x24002288
8002aa4: 24002098 .word 0x24002098
8002aa8: 0802d6cc .word 0x0802d6cc
8002aac: 0802d6e0 .word 0x0802d6e0
8002ab0: 0802d704 .word 0x0802d704
8002ab4: 0802d728 .word 0x0802d728
8002ab8: 0802d74c .word 0x0802d74c
8002abc: 0802d770 .word 0x0802d770
8002ac0: 24002278 .word 0x24002278
8002ac4: 0802d790 .word 0x0802d790
if (boardNumber > 0) {
8002ac8: f897 324f ldrb.w r3, [r7, #591] @ 0x24f
8002acc: 2b00 cmp r3, #0
8002ace: f000 8212 beq.w 8002ef6 <MqttClientPubTask+0x6fe>
osMutexAcquire (sensorsInfoMutex, osWaitForever);
8002ad2: 4bef ldr r3, [pc, #956] @ (8002e90 <MqttClientPubTask+0x698>)
8002ad4: 681b ldr r3, [r3, #0]
8002ad6: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8002ada: 4618 mov r0, r3
8002adc: f00e ff3b bl 8011956 <osMutexAcquire>
SesnorsInfo* sensors = &sensorsInfo[boardNumber - 1];
8002ae0: f897 324f ldrb.w r3, [r7, #591] @ 0x24f
8002ae4: 1e5a subs r2, r3, #1
8002ae6: 4613 mov r3, r2
8002ae8: 011b lsls r3, r3, #4
8002aea: 1a9b subs r3, r3, r2
8002aec: 009b lsls r3, r3, #2
8002aee: 4ae9 ldr r2, [pc, #932] @ (8002e94 <MqttClientPubTask+0x69c>)
8002af0: 4413 add r3, r2
8002af2: f8c7 3240 str.w r3, [r7, #576] @ 0x240
sprintf (topicTextBuffer, "Sensors/%d", boardNumber);
8002af6: f897 224f ldrb.w r2, [r7, #591] @ 0x24f
8002afa: f107 031c add.w r3, r7, #28
8002afe: 49e6 ldr r1, [pc, #920] @ (8002e98 <MqttClientPubTask+0x6a0>)
8002b00: 4618 mov r0, r3
8002b02: f028 f803 bl 802ab0c <siprintf>
bytesInBuffer = sprintf (messageBuffer, "{\"pvTemperature\":[%.1f, %.1f], ", sensors->pvTemperature[0], sensors->pvTemperature[1]);
8002b06: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002b0a: edd3 7a00 vldr s15, [r3]
8002b0e: eeb7 6ae7 vcvt.f64.f32 d6, s15
8002b12: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002b16: edd3 7a01 vldr s15, [r3, #4]
8002b1a: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002b1e: f107 003c add.w r0, r7, #60 @ 0x3c
8002b22: ed8d 7b00 vstr d7, [sp]
8002b26: ec53 2b16 vmov r2, r3, d6
8002b2a: 49dc ldr r1, [pc, #880] @ (8002e9c <MqttClientPubTask+0x6a4>)
8002b2c: f027 ffee bl 802ab0c <siprintf>
8002b30: 4603 mov r3, r0
8002b32: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"fanVoltage\":%.2f, ", sensors->fanVoltage);
8002b36: f107 023c add.w r2, r7, #60 @ 0x3c
8002b3a: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002b3e: 18d0 adds r0, r2, r3
8002b40: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002b44: edd3 7a02 vldr s15, [r3, #8]
8002b48: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002b4c: ec53 2b17 vmov r2, r3, d7
8002b50: 49d3 ldr r1, [pc, #844] @ (8002ea0 <MqttClientPubTask+0x6a8>)
8002b52: f027 ffdb bl 802ab0c <siprintf>
8002b56: 4603 mov r3, r0
8002b58: 461a mov r2, r3
8002b5a: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002b5e: 4413 add r3, r2
8002b60: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"pvEncoderX\":%.2f, ", sensors->pvEncoderX);
8002b64: f107 023c add.w r2, r7, #60 @ 0x3c
8002b68: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002b6c: 18d0 adds r0, r2, r3
8002b6e: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002b72: edd3 7a03 vldr s15, [r3, #12]
8002b76: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002b7a: ec53 2b17 vmov r2, r3, d7
8002b7e: 49c9 ldr r1, [pc, #804] @ (8002ea4 <MqttClientPubTask+0x6ac>)
8002b80: f027 ffc4 bl 802ab0c <siprintf>
8002b84: 4603 mov r3, r0
8002b86: 461a mov r2, r3
8002b88: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002b8c: 4413 add r3, r2
8002b8e: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"pvEncoderY\":%.2f, ", sensors->pvEncoderY);
8002b92: f107 023c add.w r2, r7, #60 @ 0x3c
8002b96: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002b9a: 18d0 adds r0, r2, r3
8002b9c: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002ba0: edd3 7a04 vldr s15, [r3, #16]
8002ba4: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002ba8: ec53 2b17 vmov r2, r3, d7
8002bac: 49be ldr r1, [pc, #760] @ (8002ea8 <MqttClientPubTask+0x6b0>)
8002bae: f027 ffad bl 802ab0c <siprintf>
8002bb2: 4603 mov r3, r0
8002bb4: 461a mov r2, r3
8002bb6: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002bba: 4413 add r3, r2
8002bbc: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXStatus\":%d, ", sensors->motorXStatus);
8002bc0: f107 023c add.w r2, r7, #60 @ 0x3c
8002bc4: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002bc8: 18d0 adds r0, r2, r3
8002bca: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002bce: 7d1b ldrb r3, [r3, #20]
8002bd0: 461a mov r2, r3
8002bd2: 49b6 ldr r1, [pc, #728] @ (8002eac <MqttClientPubTask+0x6b4>)
8002bd4: f027 ff9a bl 802ab0c <siprintf>
8002bd8: 4603 mov r3, r0
8002bda: 461a mov r2, r3
8002bdc: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002be0: 4413 add r3, r2
8002be2: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYStatus\":%d, ", sensors->motorYStatus);
8002be6: f107 023c add.w r2, r7, #60 @ 0x3c
8002bea: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002bee: 18d0 adds r0, r2, r3
8002bf0: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002bf4: 7d5b ldrb r3, [r3, #21]
8002bf6: 461a mov r2, r3
8002bf8: 49ad ldr r1, [pc, #692] @ (8002eb0 <MqttClientPubTask+0x6b8>)
8002bfa: f027 ff87 bl 802ab0c <siprintf>
8002bfe: 4603 mov r3, r0
8002c00: 461a mov r2, r3
8002c02: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002c06: 4413 add r3, r2
8002c08: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXAveCurrent\":%.3f, ", sensors->motorXAveCurrent);
8002c0c: f107 023c add.w r2, r7, #60 @ 0x3c
8002c10: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002c14: 18d0 adds r0, r2, r3
8002c16: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002c1a: edd3 7a06 vldr s15, [r3, #24]
8002c1e: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002c22: ec53 2b17 vmov r2, r3, d7
8002c26: 49a3 ldr r1, [pc, #652] @ (8002eb4 <MqttClientPubTask+0x6bc>)
8002c28: f027 ff70 bl 802ab0c <siprintf>
8002c2c: 4603 mov r3, r0
8002c2e: 461a mov r2, r3
8002c30: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002c34: 4413 add r3, r2
8002c36: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYAveCurrent\":%.3f, ", sensors->motorYAveCurrent);
8002c3a: f107 023c add.w r2, r7, #60 @ 0x3c
8002c3e: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002c42: 18d0 adds r0, r2, r3
8002c44: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002c48: edd3 7a07 vldr s15, [r3, #28]
8002c4c: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002c50: ec53 2b17 vmov r2, r3, d7
8002c54: 4998 ldr r1, [pc, #608] @ (8002eb8 <MqttClientPubTask+0x6c0>)
8002c56: f027 ff59 bl 802ab0c <siprintf>
8002c5a: 4603 mov r3, r0
8002c5c: 461a mov r2, r3
8002c5e: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002c62: 4413 add r3, r2
8002c64: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXPeakCurrent\":%.3f, ", sensors->motorXPeakCurrent);
8002c68: f107 023c add.w r2, r7, #60 @ 0x3c
8002c6c: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002c70: 18d0 adds r0, r2, r3
8002c72: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002c76: edd3 7a08 vldr s15, [r3, #32]
8002c7a: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002c7e: ec53 2b17 vmov r2, r3, d7
8002c82: 498e ldr r1, [pc, #568] @ (8002ebc <MqttClientPubTask+0x6c4>)
8002c84: f027 ff42 bl 802ab0c <siprintf>
8002c88: 4603 mov r3, r0
8002c8a: 461a mov r2, r3
8002c8c: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002c90: 4413 add r3, r2
8002c92: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYPeakCurrent\":%.3f, ", sensors->motorYPeakCurrent);
8002c96: f107 023c add.w r2, r7, #60 @ 0x3c
8002c9a: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002c9e: 18d0 adds r0, r2, r3
8002ca0: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002ca4: edd3 7a09 vldr s15, [r3, #36] @ 0x24
8002ca8: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002cac: ec53 2b17 vmov r2, r3, d7
8002cb0: 4983 ldr r1, [pc, #524] @ (8002ec0 <MqttClientPubTask+0x6c8>)
8002cb2: f027 ff2b bl 802ab0c <siprintf>
8002cb6: 4603 mov r3, r0
8002cb8: 461a mov r2, r3
8002cba: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002cbe: 4413 add r3, r2
8002cc0: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchUp\":%d, ", sensors->limitXSwitchUp);
8002cc4: f107 023c add.w r2, r7, #60 @ 0x3c
8002cc8: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002ccc: 18d0 adds r0, r2, r3
8002cce: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002cd2: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8002cd6: 461a mov r2, r3
8002cd8: 497a ldr r1, [pc, #488] @ (8002ec4 <MqttClientPubTask+0x6cc>)
8002cda: f027 ff17 bl 802ab0c <siprintf>
8002cde: 4603 mov r3, r0
8002ce0: 461a mov r2, r3
8002ce2: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002ce6: 4413 add r3, r2
8002ce8: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchDown\":%d, ", sensors->limitXSwitchDown);
8002cec: f107 023c add.w r2, r7, #60 @ 0x3c
8002cf0: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002cf4: 18d0 adds r0, r2, r3
8002cf6: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002cfa: f893 3029 ldrb.w r3, [r3, #41] @ 0x29
8002cfe: 461a mov r2, r3
8002d00: 4971 ldr r1, [pc, #452] @ (8002ec8 <MqttClientPubTask+0x6d0>)
8002d02: f027 ff03 bl 802ab0c <siprintf>
8002d06: 4603 mov r3, r0
8002d08: 461a mov r2, r3
8002d0a: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002d0e: 4413 add r3, r2
8002d10: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchCenter\":%d, ", sensors->limitXSwitchCenter);
8002d14: f107 023c add.w r2, r7, #60 @ 0x3c
8002d18: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002d1c: 18d0 adds r0, r2, r3
8002d1e: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002d22: f893 302a ldrb.w r3, [r3, #42] @ 0x2a
8002d26: 461a mov r2, r3
8002d28: 4968 ldr r1, [pc, #416] @ (8002ecc <MqttClientPubTask+0x6d4>)
8002d2a: f027 feef bl 802ab0c <siprintf>
8002d2e: 4603 mov r3, r0
8002d30: 461a mov r2, r3
8002d32: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002d36: 4413 add r3, r2
8002d38: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchUp\":%d, ", sensors->limitYSwitchUp);
8002d3c: f107 023c add.w r2, r7, #60 @ 0x3c
8002d40: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002d44: 18d0 adds r0, r2, r3
8002d46: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002d4a: f893 302b ldrb.w r3, [r3, #43] @ 0x2b
8002d4e: 461a mov r2, r3
8002d50: 495f ldr r1, [pc, #380] @ (8002ed0 <MqttClientPubTask+0x6d8>)
8002d52: f027 fedb bl 802ab0c <siprintf>
8002d56: 4603 mov r3, r0
8002d58: 461a mov r2, r3
8002d5a: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002d5e: 4413 add r3, r2
8002d60: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchDown\":%d, ", sensors->limitYSwitchDown);
8002d64: f107 023c add.w r2, r7, #60 @ 0x3c
8002d68: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002d6c: 18d0 adds r0, r2, r3
8002d6e: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002d72: f893 302c ldrb.w r3, [r3, #44] @ 0x2c
8002d76: 461a mov r2, r3
8002d78: 4956 ldr r1, [pc, #344] @ (8002ed4 <MqttClientPubTask+0x6dc>)
8002d7a: f027 fec7 bl 802ab0c <siprintf>
8002d7e: 4603 mov r3, r0
8002d80: 461a mov r2, r3
8002d82: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002d86: 4413 add r3, r2
8002d88: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchCenter\":%d, ", sensors->limitYSwitchCenter);
8002d8c: f107 023c add.w r2, r7, #60 @ 0x3c
8002d90: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002d94: 18d0 adds r0, r2, r3
8002d96: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002d9a: f893 302d ldrb.w r3, [r3, #45] @ 0x2d
8002d9e: 461a mov r2, r3
8002da0: 494d ldr r1, [pc, #308] @ (8002ed8 <MqttClientPubTask+0x6e0>)
8002da2: f027 feb3 bl 802ab0c <siprintf>
8002da6: 4603 mov r3, r0
8002da8: 461a mov r2, r3
8002daa: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002dae: 4413 add r3, r2
8002db0: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentXPosition\":%.2f, ", sensors->currentXPosition);
8002db4: f107 023c add.w r2, r7, #60 @ 0x3c
8002db8: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002dbc: 18d0 adds r0, r2, r3
8002dbe: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002dc2: edd3 7a0c vldr s15, [r3, #48] @ 0x30
8002dc6: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002dca: ec53 2b17 vmov r2, r3, d7
8002dce: 4943 ldr r1, [pc, #268] @ (8002edc <MqttClientPubTask+0x6e4>)
8002dd0: f027 fe9c bl 802ab0c <siprintf>
8002dd4: 4603 mov r3, r0
8002dd6: 461a mov r2, r3
8002dd8: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002ddc: 4413 add r3, r2
8002dde: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentYPosition\":%.2f, ", sensors->currentYPosition);
8002de2: f107 023c add.w r2, r7, #60 @ 0x3c
8002de6: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002dea: 18d0 adds r0, r2, r3
8002dec: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002df0: edd3 7a0d vldr s15, [r3, #52] @ 0x34
8002df4: eeb7 7ae7 vcvt.f64.f32 d7, s15
8002df8: ec53 2b17 vmov r2, r3, d7
8002dfc: 4938 ldr r1, [pc, #224] @ (8002ee0 <MqttClientPubTask+0x6e8>)
8002dfe: f027 fe85 bl 802ab0c <siprintf>
8002e02: 4603 mov r3, r0
8002e04: 461a mov r2, r3
8002e06: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002e0a: 4413 add r3, r2
8002e0c: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"positionXWeak\":%d, ", sensors->positionXWeak);
8002e10: f107 023c add.w r2, r7, #60 @ 0x3c
8002e14: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002e18: 18d0 adds r0, r2, r3
8002e1a: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002e1e: f893 3038 ldrb.w r3, [r3, #56] @ 0x38
8002e22: 461a mov r2, r3
8002e24: 492f ldr r1, [pc, #188] @ (8002ee4 <MqttClientPubTask+0x6ec>)
8002e26: f027 fe71 bl 802ab0c <siprintf>
8002e2a: 4603 mov r3, r0
8002e2c: 461a mov r2, r3
8002e2e: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002e32: 4413 add r3, r2
8002e34: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"positionYWeak\":%d, ", sensors->positionYWeak);
8002e38: f107 023c add.w r2, r7, #60 @ 0x3c
8002e3c: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002e40: 18d0 adds r0, r2, r3
8002e42: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002e46: f893 3039 ldrb.w r3, [r3, #57] @ 0x39
8002e4a: 461a mov r2, r3
8002e4c: 4926 ldr r1, [pc, #152] @ (8002ee8 <MqttClientPubTask+0x6f0>)
8002e4e: f027 fe5d bl 802ab0c <siprintf>
8002e52: 4603 mov r3, r0
8002e54: 461a mov r2, r3
8002e56: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002e5a: 4413 add r3, r2
8002e5c: f8c7 3248 str.w r3, [r7, #584] @ 0x248
bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"powerSupplyFailMask\":%d}", sensors->powerSupplyFailMask);
8002e60: f107 023c add.w r2, r7, #60 @ 0x3c
8002e64: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002e68: 18d0 adds r0, r2, r3
8002e6a: f8d7 3240 ldr.w r3, [r7, #576] @ 0x240
8002e6e: f893 302e ldrb.w r3, [r3, #46] @ 0x2e
8002e72: 461a mov r2, r3
8002e74: 491d ldr r1, [pc, #116] @ (8002eec <MqttClientPubTask+0x6f4>)
8002e76: f027 fe49 bl 802ab0c <siprintf>
8002e7a: 4603 mov r3, r0
8002e7c: 461a mov r2, r3
8002e7e: f8d7 3248 ldr.w r3, [r7, #584] @ 0x248
8002e82: 4413 add r3, r2
8002e84: f8c7 3248 str.w r3, [r7, #584] @ 0x248
osMutexRelease (sensorsInfoMutex);
8002e88: 4b01 ldr r3, [pc, #4] @ (8002e90 <MqttClientPubTask+0x698>)
8002e8a: 681b ldr r3, [r3, #0]
8002e8c: 4618 mov r0, r3
8002e8e: e02f b.n 8002ef0 <MqttClientPubTask+0x6f8>
8002e90: 2400228c .word 0x2400228c
8002e94: 24002188 .word 0x24002188
8002e98: 0802d7a4 .word 0x0802d7a4
8002e9c: 0802d7b0 .word 0x0802d7b0
8002ea0: 0802d7d0 .word 0x0802d7d0
8002ea4: 0802d7e4 .word 0x0802d7e4
8002ea8: 0802d7f8 .word 0x0802d7f8
8002eac: 0802d80c .word 0x0802d80c
8002eb0: 0802d820 .word 0x0802d820
8002eb4: 0802d834 .word 0x0802d834
8002eb8: 0802d850 .word 0x0802d850
8002ebc: 0802d86c .word 0x0802d86c
8002ec0: 0802d888 .word 0x0802d888
8002ec4: 0802d8a4 .word 0x0802d8a4
8002ec8: 0802d8bc .word 0x0802d8bc
8002ecc: 0802d8d4 .word 0x0802d8d4
8002ed0: 0802d8f0 .word 0x0802d8f0
8002ed4: 0802d908 .word 0x0802d908
8002ed8: 0802d920 .word 0x0802d920
8002edc: 0802d93c .word 0x0802d93c
8002ee0: 0802d958 .word 0x0802d958
8002ee4: 0802d974 .word 0x0802d974
8002ee8: 0802d98c .word 0x0802d98c
8002eec: 0802d9a4 .word 0x0802d9a4
8002ef0: f00e fd7c bl 80119ec <osMutexRelease>
8002ef4: e028 b.n 8002f48 <MqttClientPubTask+0x750>
} else {
sprintf (topicTextBuffer, "Sensors/%d", boardNumber);
8002ef6: f897 224f ldrb.w r2, [r7, #591] @ 0x24f
8002efa: f107 031c add.w r3, r7, #28
8002efe: 4927 ldr r1, [pc, #156] @ (8002f9c <MqttClientPubTask+0x7a4>)
8002f00: 4618 mov r0, r3
8002f02: f027 fe03 bl 802ab0c <siprintf>
uint8_t mainBoardPowerSupplyFailMask = ~((HAL_GPIO_ReadPin (GPIOD, GPIO_PIN_4) << 1) | HAL_GPIO_ReadPin (GPIOD, GPIO_PIN_2)) & 0x3;
8002f06: 2110 movs r1, #16
8002f08: 4825 ldr r0, [pc, #148] @ (8002fa0 <MqttClientPubTask+0x7a8>)
8002f0a: f007 fa3d bl 800a388 <HAL_GPIO_ReadPin>
8002f0e: 4603 mov r3, r0
8002f10: 005b lsls r3, r3, #1
8002f12: b25c sxtb r4, r3
8002f14: 2104 movs r1, #4
8002f16: 4822 ldr r0, [pc, #136] @ (8002fa0 <MqttClientPubTask+0x7a8>)
8002f18: f007 fa36 bl 800a388 <HAL_GPIO_ReadPin>
8002f1c: 4603 mov r3, r0
8002f1e: b25b sxtb r3, r3
8002f20: 4323 orrs r3, r4
8002f22: b25b sxtb r3, r3
8002f24: 43db mvns r3, r3
8002f26: b25b sxtb r3, r3
8002f28: b2db uxtb r3, r3
8002f2a: f003 0303 and.w r3, r3, #3
8002f2e: f887 3247 strb.w r3, [r7, #583] @ 0x247
bytesInBuffer = sprintf (messageBuffer, "{\"powerSupplyFailMask\":%d}", mainBoardPowerSupplyFailMask);
8002f32: f897 2247 ldrb.w r2, [r7, #583] @ 0x247
8002f36: f107 033c add.w r3, r7, #60 @ 0x3c
8002f3a: 491a ldr r1, [pc, #104] @ (8002fa4 <MqttClientPubTask+0x7ac>)
8002f3c: 4618 mov r0, r3
8002f3e: f027 fde5 bl 802ab0c <siprintf>
8002f42: 4603 mov r3, r0
8002f44: f8c7 3248 str.w r3, [r7, #584] @ 0x248
}
message.payload = (void*)messageBuffer;
8002f48: f507 7314 add.w r3, r7, #592 @ 0x250
8002f4c: f5a3 7311 sub.w r3, r3, #580 @ 0x244
8002f50: f107 023c add.w r2, r7, #60 @ 0x3c
8002f54: 609a str r2, [r3, #8]
message.payloadlen = strlen (messageBuffer);
8002f56: f107 033c add.w r3, r7, #60 @ 0x3c
8002f5a: 4618 mov r0, r3
8002f5c: f7fd fa20 bl 80003a0 <strlen>
8002f60: 4602 mov r2, r0
8002f62: f507 7314 add.w r3, r7, #592 @ 0x250
8002f66: f5a3 7311 sub.w r3, r3, #580 @ 0x244
8002f6a: 60da str r2, [r3, #12]
MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
8002f6c: f107 020c add.w r2, r7, #12
8002f70: f107 031c add.w r3, r7, #28
8002f74: 4619 mov r1, r3
8002f76: 480c ldr r0, [pc, #48] @ (8002fa8 <MqttClientPubTask+0x7b0>)
8002f78: f025 f8e1 bl 802813e <MQTTPublish>
for (boardNumber = 0; boardNumber < SLAVES_COUNT + 1; boardNumber++) {
8002f7c: f897 324f ldrb.w r3, [r7, #591] @ 0x24f
8002f80: 3301 adds r3, #1
8002f82: f887 324f strb.w r3, [r7, #591] @ 0x24f
8002f86: f897 324f ldrb.w r3, [r7, #591] @ 0x24f
8002f8a: 2b04 cmp r3, #4
8002f8c: f67f ad9c bls.w 8002ac8 <MqttClientPubTask+0x2d0>
}
}
}
osDelay (pdMS_TO_TICKS (1000));
8002f90: f44f 707a mov.w r0, #1000 @ 0x3e8
8002f94: f00e fb47 bl 8011626 <osDelay>
if (mqttClient.isconnected) {
8002f98: e459 b.n 800284e <MqttClientPubTask+0x56>
8002f9a: bf00 nop
8002f9c: 0802d7a4 .word 0x0802d7a4
8002fa0: 58020c00 .word 0x58020c00
8002fa4: 0802d9c0 .word 0x0802d9c0
8002fa8: 24000740 .word 0x24000740
08002fac <MqttConnectBroker>:
}
}
uint32_t MqttConnectBroker () {
8002fac: b580 push {r7, lr}
8002fae: b09c sub sp, #112 @ 0x70
8002fb0: af04 add r7, sp, #16
uint8_t boardNumber = 0;
8002fb2: 2300 movs r3, #0
8002fb4: f887 305f strb.w r3, [r7, #95] @ 0x5f
int ret;
NewNetwork (&net);
8002fb8: 4839 ldr r0, [pc, #228] @ (80030a0 <MqttConnectBroker+0xf4>)
8002fba: f025 f9f9 bl 80283b0 <NewNetwork>
ret = ConnectNetwork (&net, BROKER_IP, MQTT_PORT);
8002fbe: f240 725b movw r2, #1883 @ 0x75b
8002fc2: 4938 ldr r1, [pc, #224] @ (80030a4 <MqttConnectBroker+0xf8>)
8002fc4: 4836 ldr r0, [pc, #216] @ (80030a0 <MqttConnectBroker+0xf4>)
8002fc6: f025 fa0f bl 80283e8 <ConnectNetwork>
8002fca: 65b8 str r0, [r7, #88] @ 0x58
if (ret != MQTT_SUCCESS) {
8002fcc: 6dbb ldr r3, [r7, #88] @ 0x58
8002fce: 2b00 cmp r3, #0
8002fd0: d005 beq.n 8002fde <MqttConnectBroker+0x32>
printf ("ConnectNetwork failed.\n");
8002fd2: 4835 ldr r0, [pc, #212] @ (80030a8 <MqttConnectBroker+0xfc>)
8002fd4: f027 fd92 bl 802aafc <puts>
return -1;
8002fd8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8002fdc: e05c b.n 8003098 <MqttConnectBroker+0xec>
}
MQTTClientInit (&mqttClient, &net, 1000, sndBuffer, sizeof (sndBuffer), rcvBuffer, sizeof (rcvBuffer));
8002fde: f44f 6380 mov.w r3, #1024 @ 0x400
8002fe2: 9302 str r3, [sp, #8]
8002fe4: 4b31 ldr r3, [pc, #196] @ (80030ac <MqttConnectBroker+0x100>)
8002fe6: 9301 str r3, [sp, #4]
8002fe8: f44f 6380 mov.w r3, #1024 @ 0x400
8002fec: 9300 str r3, [sp, #0]
8002fee: 4b30 ldr r3, [pc, #192] @ (80030b0 <MqttConnectBroker+0x104>)
8002ff0: f44f 727a mov.w r2, #1000 @ 0x3e8
8002ff4: 492a ldr r1, [pc, #168] @ (80030a0 <MqttConnectBroker+0xf4>)
8002ff6: 482f ldr r0, [pc, #188] @ (80030b4 <MqttConnectBroker+0x108>)
8002ff8: f024 fb14 bl 8027624 <MQTTClientInit>
MQTTPacket_connectData data = MQTTPacket_connectData_initializer;
8002ffc: 4a2e ldr r2, [pc, #184] @ (80030b8 <MqttConnectBroker+0x10c>)
8002ffe: 463b mov r3, r7
8003000: 4611 mov r1, r2
8003002: 2258 movs r2, #88 @ 0x58
8003004: 4618 mov r0, r3
8003006: f027 ff9a bl 802af3e <memcpy>
data.willFlag = 0;
800300a: 2300 movs r3, #0
800300c: 76fb strb r3, [r7, #27]
data.MQTTVersion = 3;
800300e: 2303 movs r3, #3
8003010: 723b strb r3, [r7, #8]
data.clientID.cstring = "test_user1";
8003012: 4b2a ldr r3, [pc, #168] @ (80030bc <MqttConnectBroker+0x110>)
8003014: 60fb str r3, [r7, #12]
data.username.cstring = "test_user1";
8003016: 4b29 ldr r3, [pc, #164] @ (80030bc <MqttConnectBroker+0x110>)
8003018: 643b str r3, [r7, #64] @ 0x40
data.password.cstring = "1234";
800301a: 4b29 ldr r3, [pc, #164] @ (80030c0 <MqttConnectBroker+0x114>)
800301c: 64fb str r3, [r7, #76] @ 0x4c
data.keepAliveInterval = 100;
800301e: 2364 movs r3, #100 @ 0x64
8003020: 833b strh r3, [r7, #24]
data.cleansession = 1;
8003022: 2301 movs r3, #1
8003024: 76bb strb r3, [r7, #26]
ret = MQTTConnect (&mqttClient, &data);
8003026: 463b mov r3, r7
8003028: 4619 mov r1, r3
800302a: 4822 ldr r0, [pc, #136] @ (80030b4 <MqttConnectBroker+0x108>)
800302c: f024 ff56 bl 8027edc <MQTTConnect>
8003030: 65b8 str r0, [r7, #88] @ 0x58
if (ret != MQTT_SUCCESS) {
8003032: 6dbb ldr r3, [r7, #88] @ 0x58
8003034: 2b00 cmp r3, #0
8003036: d008 beq.n 800304a <MqttConnectBroker+0x9e>
net_disconnect (&net);
8003038: 4819 ldr r0, [pc, #100] @ (80030a0 <MqttConnectBroker+0xf4>)
800303a: f025 fa5e bl 80284fa <net_disconnect>
printf ("MQTTConnect failed. Code %d\n", ret);
800303e: 6db9 ldr r1, [r7, #88] @ 0x58
8003040: 4820 ldr r0, [pc, #128] @ (80030c4 <MqttConnectBroker+0x118>)
8003042: f027 fcf3 bl 802aa2c <iprintf>
return ret;
8003046: 6dbb ldr r3, [r7, #88] @ 0x58
8003048: e026 b.n 8003098 <MqttConnectBroker+0xec>
}
for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
800304a: 2300 movs r3, #0
800304c: f887 305f strb.w r3, [r7, #95] @ 0x5f
8003050: e01a b.n 8003088 <MqttConnectBroker+0xdc>
ret = MQTTSubscribe (&mqttClient, subscribeTopicNames[boardNumber], QOS0, MqttMessageArrived);
8003052: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
8003056: 4a1c ldr r2, [pc, #112] @ (80030c8 <MqttConnectBroker+0x11c>)
8003058: f852 1023 ldr.w r1, [r2, r3, lsl #2]
800305c: 4b1b ldr r3, [pc, #108] @ (80030cc <MqttConnectBroker+0x120>)
800305e: 2200 movs r2, #0
8003060: 4814 ldr r0, [pc, #80] @ (80030b4 <MqttConnectBroker+0x108>)
8003062: f025 f856 bl 8028112 <MQTTSubscribe>
8003066: 65b8 str r0, [r7, #88] @ 0x58
if (ret != MQTT_SUCCESS) {
8003068: 6dbb ldr r3, [r7, #88] @ 0x58
800306a: 2b00 cmp r3, #0
800306c: d007 beq.n 800307e <MqttConnectBroker+0xd2>
net_disconnect (&net);
800306e: 480c ldr r0, [pc, #48] @ (80030a0 <MqttConnectBroker+0xf4>)
8003070: f025 fa43 bl 80284fa <net_disconnect>
printf ("MQTTSubscribe failed.\n");
8003074: 4816 ldr r0, [pc, #88] @ (80030d0 <MqttConnectBroker+0x124>)
8003076: f027 fd41 bl 802aafc <puts>
return ret;
800307a: 6dbb ldr r3, [r7, #88] @ 0x58
800307c: e00c b.n 8003098 <MqttConnectBroker+0xec>
for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
800307e: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
8003082: 3301 adds r3, #1
8003084: f887 305f strb.w r3, [r7, #95] @ 0x5f
8003088: f897 305f ldrb.w r3, [r7, #95] @ 0x5f
800308c: 2b03 cmp r3, #3
800308e: d9e0 bls.n 8003052 <MqttConnectBroker+0xa6>
}
}
printf ("MQTT_ConnectBroker O.K.\n");
8003090: 4810 ldr r0, [pc, #64] @ (80030d4 <MqttConnectBroker+0x128>)
8003092: f027 fd33 bl 802aafc <puts>
return MQTT_SUCCESS;
8003096: 2300 movs r3, #0
}
8003098: 4618 mov r0, r3
800309a: 3760 adds r7, #96 @ 0x60
800309c: 46bd mov sp, r7
800309e: bd80 pop {r7, pc}
80030a0: 24000730 .word 0x24000730
80030a4: 0802d9dc .word 0x0802d9dc
80030a8: 0802d9ec .word 0x0802d9ec
80030ac: 24000bac .word 0x24000bac
80030b0: 240007ac .word 0x240007ac
80030b4: 24000740 .word 0x24000740
80030b8: 0802da68 .word 0x0802da68
80030bc: 0802da04 .word 0x0802da04
80030c0: 0802da10 .word 0x0802da10
80030c4: 0802da18 .word 0x0802da18
80030c8: 08031c3c .word 0x08031c3c
80030cc: 0800323d .word 0x0800323d
80030d0: 0802da38 .word 0x0802da38
80030d4: 0802da50 .word 0x0802da50
080030d8 <RelayCtrl>:
void RelayCtrl (int32_t relayNumber, int32_t relayTimeOn) {
80030d8: b580 push {r7, lr}
80030da: b082 sub sp, #8
80030dc: af00 add r7, sp, #0
80030de: 6078 str r0, [r7, #4]
80030e0: 6039 str r1, [r7, #0]
switch (relayNumber) {
80030e2: 687b ldr r3, [r7, #4]
80030e4: 3b01 subs r3, #1
80030e6: 2b03 cmp r3, #3
80030e8: f200 8098 bhi.w 800321c <RelayCtrl+0x144>
80030ec: a201 add r2, pc, #4 @ (adr r2, 80030f4 <RelayCtrl+0x1c>)
80030ee: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80030f2: bf00 nop
80030f4: 08003105 .word 0x08003105
80030f8: 0800314b .word 0x0800314b
80030fc: 08003191 .word 0x08003191
8003100: 080031d7 .word 0x080031d7
case 1:
if (relayTimeOn > 0) {
8003104: 683b ldr r3, [r7, #0]
8003106: 2b00 cmp r3, #0
8003108: dd0b ble.n 8003122 <RelayCtrl+0x4a>
osTimerStart (relay1TimerHandle, relayTimeOn * 1000);
800310a: 4b47 ldr r3, [pc, #284] @ (8003228 <RelayCtrl+0x150>)
800310c: 681a ldr r2, [r3, #0]
800310e: 683b ldr r3, [r7, #0]
8003110: f44f 717a mov.w r1, #1000 @ 0x3e8
8003114: fb01 f303 mul.w r3, r1, r3
8003118: 4619 mov r1, r3
800311a: 4610 mov r0, r2
800311c: f00e fb30 bl 8011780 <osTimerStart>
8003120: e004 b.n 800312c <RelayCtrl+0x54>
} else {
osTimerStop (relay1TimerHandle);
8003122: 4b41 ldr r3, [pc, #260] @ (8003228 <RelayCtrl+0x150>)
8003124: 681b ldr r3, [r3, #0]
8003126: 4618 mov r0, r3
8003128: f00e fb58 bl 80117dc <osTimerStop>
}
if (relayTimeOn != 0) {
800312c: 683b ldr r3, [r7, #0]
800312e: 2b00 cmp r3, #0
8003130: d005 beq.n 800313e <RelayCtrl+0x66>
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_5, GPIO_PIN_SET);
8003132: 2201 movs r2, #1
8003134: 2120 movs r1, #32
8003136: 483d ldr r0, [pc, #244] @ (800322c <RelayCtrl+0x154>)
8003138: f007 f93e bl 800a3b8 <HAL_GPIO_WritePin>
} else {
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_5, GPIO_PIN_RESET);
}
break;
800313c: e06f b.n 800321e <RelayCtrl+0x146>
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_5, GPIO_PIN_RESET);
800313e: 2200 movs r2, #0
8003140: 2120 movs r1, #32
8003142: 483a ldr r0, [pc, #232] @ (800322c <RelayCtrl+0x154>)
8003144: f007 f938 bl 800a3b8 <HAL_GPIO_WritePin>
break;
8003148: e069 b.n 800321e <RelayCtrl+0x146>
case 2:
if (relayTimeOn > 0) {
800314a: 683b ldr r3, [r7, #0]
800314c: 2b00 cmp r3, #0
800314e: dd0b ble.n 8003168 <RelayCtrl+0x90>
osTimerStart (relay2TimerHandle, relayTimeOn * 1000);
8003150: 4b37 ldr r3, [pc, #220] @ (8003230 <RelayCtrl+0x158>)
8003152: 681a ldr r2, [r3, #0]
8003154: 683b ldr r3, [r7, #0]
8003156: f44f 717a mov.w r1, #1000 @ 0x3e8
800315a: fb01 f303 mul.w r3, r1, r3
800315e: 4619 mov r1, r3
8003160: 4610 mov r0, r2
8003162: f00e fb0d bl 8011780 <osTimerStart>
8003166: e004 b.n 8003172 <RelayCtrl+0x9a>
} else {
osTimerStop (relay2TimerHandle);
8003168: 4b31 ldr r3, [pc, #196] @ (8003230 <RelayCtrl+0x158>)
800316a: 681b ldr r3, [r3, #0]
800316c: 4618 mov r0, r3
800316e: f00e fb35 bl 80117dc <osTimerStop>
}
if (relayTimeOn != 0) {
8003172: 683b ldr r3, [r7, #0]
8003174: 2b00 cmp r3, #0
8003176: d005 beq.n 8003184 <RelayCtrl+0xac>
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_3, GPIO_PIN_SET);
8003178: 2201 movs r2, #1
800317a: 2108 movs r1, #8
800317c: 482b ldr r0, [pc, #172] @ (800322c <RelayCtrl+0x154>)
800317e: f007 f91b bl 800a3b8 <HAL_GPIO_WritePin>
} else {
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
}
break;
8003182: e04c b.n 800321e <RelayCtrl+0x146>
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
8003184: 2200 movs r2, #0
8003186: 2108 movs r1, #8
8003188: 4828 ldr r0, [pc, #160] @ (800322c <RelayCtrl+0x154>)
800318a: f007 f915 bl 800a3b8 <HAL_GPIO_WritePin>
break;
800318e: e046 b.n 800321e <RelayCtrl+0x146>
case 3:
if (relayTimeOn > 0) {
8003190: 683b ldr r3, [r7, #0]
8003192: 2b00 cmp r3, #0
8003194: dd0b ble.n 80031ae <RelayCtrl+0xd6>
osTimerStart (relay3TimerHandle, relayTimeOn * 1000);
8003196: 4b27 ldr r3, [pc, #156] @ (8003234 <RelayCtrl+0x15c>)
8003198: 681a ldr r2, [r3, #0]
800319a: 683b ldr r3, [r7, #0]
800319c: f44f 717a mov.w r1, #1000 @ 0x3e8
80031a0: fb01 f303 mul.w r3, r1, r3
80031a4: 4619 mov r1, r3
80031a6: 4610 mov r0, r2
80031a8: f00e faea bl 8011780 <osTimerStart>
80031ac: e004 b.n 80031b8 <RelayCtrl+0xe0>
} else {
osTimerStop (relay3TimerHandle);
80031ae: 4b21 ldr r3, [pc, #132] @ (8003234 <RelayCtrl+0x15c>)
80031b0: 681b ldr r3, [r3, #0]
80031b2: 4618 mov r0, r3
80031b4: f00e fb12 bl 80117dc <osTimerStop>
}
if (relayTimeOn != 0) {
80031b8: 683b ldr r3, [r7, #0]
80031ba: 2b00 cmp r3, #0
80031bc: d005 beq.n 80031ca <RelayCtrl+0xf2>
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_4, GPIO_PIN_SET);
80031be: 2201 movs r2, #1
80031c0: 2110 movs r1, #16
80031c2: 481a ldr r0, [pc, #104] @ (800322c <RelayCtrl+0x154>)
80031c4: f007 f8f8 bl 800a3b8 <HAL_GPIO_WritePin>
} else {
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_4, GPIO_PIN_RESET);
}
break;
80031c8: e029 b.n 800321e <RelayCtrl+0x146>
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_4, GPIO_PIN_RESET);
80031ca: 2200 movs r2, #0
80031cc: 2110 movs r1, #16
80031ce: 4817 ldr r0, [pc, #92] @ (800322c <RelayCtrl+0x154>)
80031d0: f007 f8f2 bl 800a3b8 <HAL_GPIO_WritePin>
break;
80031d4: e023 b.n 800321e <RelayCtrl+0x146>
case 4:
if (relayTimeOn > 0) {
80031d6: 683b ldr r3, [r7, #0]
80031d8: 2b00 cmp r3, #0
80031da: dd0b ble.n 80031f4 <RelayCtrl+0x11c>
osTimerStart (relay4TimerHandle, relayTimeOn * 1000);
80031dc: 4b16 ldr r3, [pc, #88] @ (8003238 <RelayCtrl+0x160>)
80031de: 681a ldr r2, [r3, #0]
80031e0: 683b ldr r3, [r7, #0]
80031e2: f44f 717a mov.w r1, #1000 @ 0x3e8
80031e6: fb01 f303 mul.w r3, r1, r3
80031ea: 4619 mov r1, r3
80031ec: 4610 mov r0, r2
80031ee: f00e fac7 bl 8011780 <osTimerStart>
80031f2: e004 b.n 80031fe <RelayCtrl+0x126>
} else {
osTimerStop (relay4TimerHandle);
80031f4: 4b10 ldr r3, [pc, #64] @ (8003238 <RelayCtrl+0x160>)
80031f6: 681b ldr r3, [r3, #0]
80031f8: 4618 mov r0, r3
80031fa: f00e faef bl 80117dc <osTimerStop>
}
if (relayTimeOn != 0) {
80031fe: 683b ldr r3, [r7, #0]
8003200: 2b00 cmp r3, #0
8003202: d005 beq.n 8003210 <RelayCtrl+0x138>
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_2, GPIO_PIN_SET);
8003204: 2201 movs r2, #1
8003206: 2104 movs r1, #4
8003208: 4808 ldr r0, [pc, #32] @ (800322c <RelayCtrl+0x154>)
800320a: f007 f8d5 bl 800a3b8 <HAL_GPIO_WritePin>
} else {
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
}
break;
800320e: e006 b.n 800321e <RelayCtrl+0x146>
HAL_GPIO_WritePin (GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
8003210: 2200 movs r2, #0
8003212: 2104 movs r1, #4
8003214: 4805 ldr r0, [pc, #20] @ (800322c <RelayCtrl+0x154>)
8003216: f007 f8cf bl 800a3b8 <HAL_GPIO_WritePin>
break;
800321a: e000 b.n 800321e <RelayCtrl+0x146>
default: break;
800321c: bf00 nop
}
}
800321e: bf00 nop
8003220: 3708 adds r7, #8
8003222: 46bd mov sp, r7
8003224: bd80 pop {r7, pc}
8003226: bf00 nop
8003228: 24000668 .word 0x24000668
800322c: 58021000 .word 0x58021000
8003230: 24000698 .word 0x24000698
8003234: 240006c8 .word 0x240006c8
8003238: 240006f8 .word 0x240006f8
0800323c <MqttMessageArrived>:
void MqttMessageArrived (MessageData* msg) {
800323c: b580 push {r7, lr}
800323e: b09c sub sp, #112 @ 0x70
8003240: af00 add r7, sp, #0
8003242: 6078 str r0, [r7, #4]
SerialProtocolCommands spCommand = spUnknown;
8003244: 2312 movs r3, #18
8003246: f887 306f strb.w r3, [r7, #111] @ 0x6f
BoardNoOverTopic topicForBoard = unknownBoard;
800324a: 2305 movs r3, #5
800324c: f887 306e strb.w r3, [r7, #110] @ 0x6e
uint8_t boardNumber = 0;
8003250: 2300 movs r3, #0
8003252: f887 306d strb.w r3, [r7, #109] @ 0x6d
MQTTMessage* message = msg->message;
8003256: 687b ldr r3, [r7, #4]
8003258: 681b ldr r3, [r3, #0]
800325a: 653b str r3, [r7, #80] @ 0x50
char topicName[32] = { 0 };
800325c: 2300 movs r3, #0
800325e: 61bb str r3, [r7, #24]
8003260: f107 031c add.w r3, r7, #28
8003264: 2200 movs r2, #0
8003266: 601a str r2, [r3, #0]
8003268: 605a str r2, [r3, #4]
800326a: 609a str r2, [r3, #8]
800326c: 60da str r2, [r3, #12]
800326e: 611a str r2, [r3, #16]
8003270: 615a str r2, [r3, #20]
8003272: 619a str r2, [r3, #24]
memcpy (topicName, msg->topicName->lenstring.data, msg->topicName->lenstring.len);
8003274: 687b ldr r3, [r7, #4]
8003276: 685b ldr r3, [r3, #4]
8003278: 6899 ldr r1, [r3, #8]
800327a: 687b ldr r3, [r7, #4]
800327c: 685b ldr r3, [r3, #4]
800327e: 685b ldr r3, [r3, #4]
8003280: 461a mov r2, r3
8003282: f107 0318 add.w r3, r7, #24
8003286: 4618 mov r0, r3
8003288: f027 fe59 bl 802af3e <memcpy>
for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
800328c: 2300 movs r3, #0
800328e: f887 306d strb.w r3, [r7, #109] @ 0x6d
8003292: e017 b.n 80032c4 <MqttMessageArrived+0x88>
if (strcmp (topicName, subscribeTopicNames[boardNumber]) == 0) {
8003294: f897 306d ldrb.w r3, [r7, #109] @ 0x6d
8003298: 4ab7 ldr r2, [pc, #732] @ (8003578 <MqttMessageArrived+0x33c>)
800329a: f852 2023 ldr.w r2, [r2, r3, lsl #2]
800329e: f107 0318 add.w r3, r7, #24
80032a2: 4611 mov r1, r2
80032a4: 4618 mov r0, r3
80032a6: f7fd f81b bl 80002e0 <strcmp>
80032aa: 4603 mov r3, r0
80032ac: 2b00 cmp r3, #0
80032ae: d104 bne.n 80032ba <MqttMessageArrived+0x7e>
topicForBoard = (BoardNoOverTopic)(boardNumber);
80032b0: f897 306d ldrb.w r3, [r7, #109] @ 0x6d
80032b4: f887 306e strb.w r3, [r7, #110] @ 0x6e
break;
80032b8: e008 b.n 80032cc <MqttMessageArrived+0x90>
for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
80032ba: f897 306d ldrb.w r3, [r7, #109] @ 0x6d
80032be: 3301 adds r3, #1
80032c0: f887 306d strb.w r3, [r7, #109] @ 0x6d
80032c4: f897 306d ldrb.w r3, [r7, #109] @ 0x6d
80032c8: 2b03 cmp r3, #3
80032ca: d9e3 bls.n 8003294 <MqttMessageArrived+0x58>
}
}
if (topicForBoard == unknownBoard) {
80032cc: f897 306e ldrb.w r3, [r7, #110] @ 0x6e
80032d0: 2b05 cmp r3, #5
80032d2: f000 823c beq.w 800374e <MqttMessageArrived+0x512>
return;
}
cJSON* json = cJSON_Parse (message->payload);
80032d6: 6d3b ldr r3, [r7, #80] @ 0x50
80032d8: 689b ldr r3, [r3, #8]
80032da: 4618 mov r0, r3
80032dc: f7fe f93a bl 8001554 <cJSON_Parse>
80032e0: 64f8 str r0, [r7, #76] @ 0x4c
const cJSON* objectItem = NULL;
80032e2: 2300 movs r3, #0
80032e4: 64bb str r3, [r7, #72] @ 0x48
InterProcessData data = { 0 };
80032e6: f107 0308 add.w r3, r7, #8
80032ea: 2200 movs r2, #0
80032ec: 601a str r2, [r3, #0]
80032ee: 605a str r2, [r3, #4]
80032f0: 609a str r2, [r3, #8]
80032f2: 60da str r2, [r3, #12]
uint32_t arraySize = 0;
80032f4: 2300 movs r3, #0
80032f6: 647b str r3, [r7, #68] @ 0x44
if (topicForBoard != main_board) {
80032f8: f897 306e ldrb.w r3, [r7, #110] @ 0x6e
80032fc: 2b00 cmp r3, #0
80032fe: f000 81aa beq.w 8003656 <MqttMessageArrived+0x41a>
for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
8003302: 2300 movs r3, #0
8003304: 66bb str r3, [r7, #104] @ 0x68
8003306: e1a1 b.n 800364c <MqttMessageArrived+0x410>
spCommand = spUnknown;
8003308: 2312 movs r3, #18
800330a: f887 306f strb.w r3, [r7, #111] @ 0x6f
objectItem = cJSON_GetObjectItemCaseSensitive (json, topicCommands[topicCmdNumber]);
800330e: 4a9b ldr r2, [pc, #620] @ (800357c <MqttMessageArrived+0x340>)
8003310: 6ebb ldr r3, [r7, #104] @ 0x68
8003312: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8003316: 4619 mov r1, r3
8003318: 6cf8 ldr r0, [r7, #76] @ 0x4c
800331a: f7fe fc85 bl 8001c28 <cJSON_GetObjectItemCaseSensitive>
800331e: 64b8 str r0, [r7, #72] @ 0x48
if (objectItem != NULL) {
8003320: 6cbb ldr r3, [r7, #72] @ 0x48
8003322: 2b00 cmp r3, #0
8003324: f000 818f beq.w 8003646 <MqttMessageArrived+0x40a>
switch (topicCmdNumber) {
8003328: 6ebb ldr r3, [r7, #104] @ 0x68
800332a: 2b10 cmp r3, #16
800332c: f200 8174 bhi.w 8003618 <MqttMessageArrived+0x3dc>
8003330: a201 add r2, pc, #4 @ (adr r2, 8003338 <MqttMessageArrived+0xfc>)
8003332: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003336: bf00 nop
8003338: 0800337d .word 0x0800337d
800333c: 08003383 .word 0x08003383
8003340: 08003391 .word 0x08003391
8003344: 08003401 .word 0x08003401
8003348: 0800341b .word 0x0800341b
800334c: 08003421 .word 0x08003421
8003350: 08003453 .word 0x08003453
8003354: 08003471 .word 0x08003471
8003358: 080034dd .word 0x080034dd
800335c: 080034ff .word 0x080034ff
8003360: 08003521 .word 0x08003521
8003364: 08003527 .word 0x08003527
8003368: 08003535 .word 0x08003535
800336c: 08003543 .word 0x08003543
8003370: 080035bf .word 0x080035bf
8003374: 080035d9 .word 0x080035d9
8003378: 080035f9 .word 0x080035f9
case fanSpeedTopic: spCommand = spSetFanSpeed;
800337c: 2302 movs r3, #2
800337e: f887 306f strb.w r3, [r7, #111] @ 0x6f
case motorXonTopic:
if (spCommand == spUnknown) {
8003382: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
8003386: 2b12 cmp r3, #18
8003388: d102 bne.n 8003390 <MqttMessageArrived+0x154>
spCommand = spSetMotorXOn;
800338a: 2303 movs r3, #3
800338c: f887 306f strb.w r3, [r7, #111] @ 0x6f
}
case motorYonTopic:
if (spCommand == spUnknown) {
8003390: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
8003394: 2b12 cmp r3, #18
8003396: d102 bne.n 800339e <MqttMessageArrived+0x162>
spCommand = spSetMotorYOn;
8003398: 2304 movs r3, #4
800339a: f887 306f strb.w r3, [r7, #111] @ 0x6f
}
if (cJSON_IsArray (objectItem)) {
800339e: 6cb8 ldr r0, [r7, #72] @ 0x48
80033a0: f7fe fc68 bl 8001c74 <cJSON_IsArray>
80033a4: 4603 mov r3, r0
80033a6: 2b00 cmp r3, #0
80033a8: f000 8138 beq.w 800361c <MqttMessageArrived+0x3e0>
data.spCommand = spCommand;
80033ac: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
80033b0: 723b strb r3, [r7, #8]
arraySize = cJSON_GetArraySize (objectItem);
80033b2: 6cb8 ldr r0, [r7, #72] @ 0x48
80033b4: f7fe fb98 bl 8001ae8 <cJSON_GetArraySize>
80033b8: 4603 mov r3, r0
80033ba: 647b str r3, [r7, #68] @ 0x44
if (arraySize == 2) {
80033bc: 6c7b ldr r3, [r7, #68] @ 0x44
80033be: 2b02 cmp r3, #2
80033c0: f040 812c bne.w 800361c <MqttMessageArrived+0x3e0>
for (int i = 0; i < arraySize; i++) {
80033c4: 2300 movs r3, #0
80033c6: 667b str r3, [r7, #100] @ 0x64
80033c8: e015 b.n 80033f6 <MqttMessageArrived+0x1ba>
cJSON* item = cJSON_GetArrayItem (objectItem, i);
80033ca: 6e79 ldr r1, [r7, #100] @ 0x64
80033cc: 6cb8 ldr r0, [r7, #72] @ 0x48
80033ce: f7fe fbcf bl 8001b70 <cJSON_GetArrayItem>
80033d2: 63b8 str r0, [r7, #56] @ 0x38
if (cJSON_IsNumber (item)) {
80033d4: 6bb8 ldr r0, [r7, #56] @ 0x38
80033d6: f7fe fc36 bl 8001c46 <cJSON_IsNumber>
80033da: 4603 mov r3, r0
80033dc: 2b00 cmp r3, #0
80033de: d007 beq.n 80033f0 <MqttMessageArrived+0x1b4>
data.values.integerValues.value[i] = item->valueint;
80033e0: 6bbb ldr r3, [r7, #56] @ 0x38
80033e2: 695a ldr r2, [r3, #20]
80033e4: 6e7b ldr r3, [r7, #100] @ 0x64
80033e6: 009b lsls r3, r3, #2
80033e8: 3370 adds r3, #112 @ 0x70
80033ea: 443b add r3, r7
80033ec: f843 2c64 str.w r2, [r3, #-100]
for (int i = 0; i < arraySize; i++) {
80033f0: 6e7b ldr r3, [r7, #100] @ 0x64
80033f2: 3301 adds r3, #1
80033f4: 667b str r3, [r7, #100] @ 0x64
80033f6: 6e7b ldr r3, [r7, #100] @ 0x64
80033f8: 6c7a ldr r2, [r7, #68] @ 0x44
80033fa: 429a cmp r2, r3
80033fc: d8e5 bhi.n 80033ca <MqttMessageArrived+0x18e>
}
}
}
}
break;
80033fe: e10d b.n 800361c <MqttMessageArrived+0x3e0>
case diodeTopic:
if (cJSON_IsNumber (objectItem)) {
8003400: 6cb8 ldr r0, [r7, #72] @ 0x48
8003402: f7fe fc20 bl 8001c46 <cJSON_IsNumber>
8003406: 4603 mov r3, r0
8003408: 2b00 cmp r3, #0
800340a: f000 8109 beq.w 8003620 <MqttMessageArrived+0x3e4>
data.spCommand = spSetDiodeOn;
800340e: 2307 movs r3, #7
8003410: 723b strb r3, [r7, #8]
data.values.integerValues.value[0] = objectItem->valueint;
8003412: 6cbb ldr r3, [r7, #72] @ 0x48
8003414: 695b ldr r3, [r3, #20]
8003416: 60fb str r3, [r7, #12]
}
break;
8003418: e102 b.n 8003620 <MqttMessageArrived+0x3e4>
case motorXMaxCurrentTopic: spCommand = spSetmotorXMaxCurrent;
800341a: 2305 movs r3, #5
800341c: f887 306f strb.w r3, [r7, #111] @ 0x6f
case motorYMaxCurrentTopic:
if (cJSON_IsNumber (objectItem)) {
8003420: 6cb8 ldr r0, [r7, #72] @ 0x48
8003422: f7fe fc10 bl 8001c46 <cJSON_IsNumber>
8003426: 4603 mov r3, r0
8003428: 2b00 cmp r3, #0
800342a: f000 80fb beq.w 8003624 <MqttMessageArrived+0x3e8>
if (spCommand == spUnknown) {
800342e: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
8003432: 2b12 cmp r3, #18
8003434: d102 bne.n 800343c <MqttMessageArrived+0x200>
spCommand = spSetmotorYMaxCurrent;
8003436: 2306 movs r3, #6
8003438: f887 306f strb.w r3, [r7, #111] @ 0x6f
}
data.spCommand = spCommand;
800343c: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
8003440: 723b strb r3, [r7, #8]
data.values.flaotValues.value[0] = objectItem->valuedouble;
8003442: 6cbb ldr r3, [r7, #72] @ 0x48
8003444: ed93 7b06 vldr d7, [r3, #24]
8003448: eef7 7bc7 vcvt.f32.f64 s15, d7
800344c: edc7 7a03 vstr s15, [r7, #12]
}
break;
8003450: e0e8 b.n 8003624 <MqttMessageArrived+0x3e8>
case clearPeakElectricalMeasurementsTopic:
if (cJSON_IsNumber (objectItem)) {
8003452: 6cb8 ldr r0, [r7, #72] @ 0x48
8003454: f7fe fbf7 bl 8001c46 <cJSON_IsNumber>
8003458: 4603 mov r3, r0
800345a: 2b00 cmp r3, #0
800345c: f000 80e4 beq.w 8003628 <MqttMessageArrived+0x3ec>
if (objectItem->valueint == 1) {
8003460: 6cbb ldr r3, [r7, #72] @ 0x48
8003462: 695b ldr r3, [r3, #20]
8003464: 2b01 cmp r3, #1
8003466: f040 80df bne.w 8003628 <MqttMessageArrived+0x3ec>
data.spCommand = spClearPeakMeasurments;
800346a: 2308 movs r3, #8
800346c: 723b strb r3, [r7, #8]
}
}
break;
800346e: e0db b.n 8003628 <MqttMessageArrived+0x3ec>
case mainBoardRelayTopic:
if (cJSON_IsArray (objectItem)) {
8003470: 6cb8 ldr r0, [r7, #72] @ 0x48
8003472: f7fe fbff bl 8001c74 <cJSON_IsArray>
8003476: 4603 mov r3, r0
8003478: 2b00 cmp r3, #0
800347a: f000 80d7 beq.w 800362c <MqttMessageArrived+0x3f0>
arraySize = cJSON_GetArraySize (objectItem);
800347e: 6cb8 ldr r0, [r7, #72] @ 0x48
8003480: f7fe fb32 bl 8001ae8 <cJSON_GetArraySize>
8003484: 4603 mov r3, r0
8003486: 647b str r3, [r7, #68] @ 0x44
if (arraySize == 2) {
8003488: 6c7b ldr r3, [r7, #68] @ 0x44
800348a: 2b02 cmp r3, #2
800348c: f040 80ce bne.w 800362c <MqttMessageArrived+0x3f0>
int32_t relayNumber = -1;
8003490: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8003494: 663b str r3, [r7, #96] @ 0x60
cJSON* item = cJSON_GetArrayItem (objectItem, 0);
8003496: 2100 movs r1, #0
8003498: 6cb8 ldr r0, [r7, #72] @ 0x48
800349a: f7fe fb69 bl 8001b70 <cJSON_GetArrayItem>
800349e: 63f8 str r0, [r7, #60] @ 0x3c
if (cJSON_IsNumber (item)) {
80034a0: 6bf8 ldr r0, [r7, #60] @ 0x3c
80034a2: f7fe fbd0 bl 8001c46 <cJSON_IsNumber>
80034a6: 4603 mov r3, r0
80034a8: 2b00 cmp r3, #0
80034aa: d002 beq.n 80034b2 <MqttMessageArrived+0x276>
relayNumber = item->valueint;
80034ac: 6bfb ldr r3, [r7, #60] @ 0x3c
80034ae: 695b ldr r3, [r3, #20]
80034b0: 663b str r3, [r7, #96] @ 0x60
}
int32_t relayTimeOn = 0;
80034b2: 2300 movs r3, #0
80034b4: 65fb str r3, [r7, #92] @ 0x5c
item = cJSON_GetArrayItem (objectItem, 1);
80034b6: 2101 movs r1, #1
80034b8: 6cb8 ldr r0, [r7, #72] @ 0x48
80034ba: f7fe fb59 bl 8001b70 <cJSON_GetArrayItem>
80034be: 63f8 str r0, [r7, #60] @ 0x3c
if (cJSON_IsNumber (item)) {
80034c0: 6bf8 ldr r0, [r7, #60] @ 0x3c
80034c2: f7fe fbc0 bl 8001c46 <cJSON_IsNumber>
80034c6: 4603 mov r3, r0
80034c8: 2b00 cmp r3, #0
80034ca: d002 beq.n 80034d2 <MqttMessageArrived+0x296>
relayTimeOn = item->valueint;
80034cc: 6bfb ldr r3, [r7, #60] @ 0x3c
80034ce: 695b ldr r3, [r3, #20]
80034d0: 65fb str r3, [r7, #92] @ 0x5c
}
RelayCtrl (relayNumber, relayTimeOn);
80034d2: 6df9 ldr r1, [r7, #92] @ 0x5c
80034d4: 6e38 ldr r0, [r7, #96] @ 0x60
80034d6: f7ff fdff bl 80030d8 <RelayCtrl>
}
}
break;
80034da: e0a7 b.n 800362c <MqttMessageArrived+0x3f0>
case setEncoderXValue:
if (cJSON_IsNumber (objectItem)) {
80034dc: 6cb8 ldr r0, [r7, #72] @ 0x48
80034de: f7fe fbb2 bl 8001c46 <cJSON_IsNumber>
80034e2: 4603 mov r3, r0
80034e4: 2b00 cmp r3, #0
80034e6: f000 80a3 beq.w 8003630 <MqttMessageArrived+0x3f4>
data.spCommand = spSetEncoderXValue;
80034ea: 2309 movs r3, #9
80034ec: 723b strb r3, [r7, #8]
data.values.flaotValues.value[0] = objectItem->valuedouble;
80034ee: 6cbb ldr r3, [r7, #72] @ 0x48
80034f0: ed93 7b06 vldr d7, [r3, #24]
80034f4: eef7 7bc7 vcvt.f32.f64 s15, d7
80034f8: edc7 7a03 vstr s15, [r7, #12]
}
break;
80034fc: e098 b.n 8003630 <MqttMessageArrived+0x3f4>
case setEncoderYValue:
if (cJSON_IsNumber (objectItem)) {
80034fe: 6cb8 ldr r0, [r7, #72] @ 0x48
8003500: f7fe fba1 bl 8001c46 <cJSON_IsNumber>
8003504: 4603 mov r3, r0
8003506: 2b00 cmp r3, #0
8003508: f000 8094 beq.w 8003634 <MqttMessageArrived+0x3f8>
data.spCommand = spSetEncoderYValue;
800350c: 230a movs r3, #10
800350e: 723b strb r3, [r7, #8]
data.values.flaotValues.value[0] = objectItem->valuedouble;
8003510: 6cbb ldr r3, [r7, #72] @ 0x48
8003512: ed93 7b06 vldr d7, [r3, #24]
8003516: eef7 7bc7 vcvt.f32.f64 s15, d7
800351a: edc7 7a03 vstr s15, [r7, #12]
}
break;
800351e: e089 b.n 8003634 <MqttMessageArrived+0x3f8>
case setVoltageMeasGains: spCommand = spSetVoltageMeasGains;
8003520: 230b movs r3, #11
8003522: f887 306f strb.w r3, [r7, #111] @ 0x6f
case setVoltageMeasOffsets:
if (spCommand == spUnknown) {
8003526: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
800352a: 2b12 cmp r3, #18
800352c: d102 bne.n 8003534 <MqttMessageArrived+0x2f8>
spCommand = spSetVoltageMeasOffsets;
800352e: 230c movs r3, #12
8003530: f887 306f strb.w r3, [r7, #111] @ 0x6f
}
case setCurrentMeasGains:
if (spCommand == spUnknown) {
8003534: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
8003538: 2b12 cmp r3, #18
800353a: d102 bne.n 8003542 <MqttMessageArrived+0x306>
spCommand = spSetCurrentMeasGains;
800353c: 230d movs r3, #13
800353e: f887 306f strb.w r3, [r7, #111] @ 0x6f
}
case setCurrentMeasOffsets:
if (spCommand == spUnknown) {
8003542: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
8003546: 2b12 cmp r3, #18
8003548: d102 bne.n 8003550 <MqttMessageArrived+0x314>
spCommand = spSetCurrentMeasOffsets;
800354a: 230e movs r3, #14
800354c: f887 306f strb.w r3, [r7, #111] @ 0x6f
}
if (cJSON_IsArray (objectItem)) {
8003550: 6cb8 ldr r0, [r7, #72] @ 0x48
8003552: f7fe fb8f bl 8001c74 <cJSON_IsArray>
8003556: 4603 mov r3, r0
8003558: 2b00 cmp r3, #0
800355a: d06d beq.n 8003638 <MqttMessageArrived+0x3fc>
data.spCommand = spCommand;
800355c: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
8003560: 723b strb r3, [r7, #8]
arraySize = cJSON_GetArraySize (objectItem);
8003562: 6cb8 ldr r0, [r7, #72] @ 0x48
8003564: f7fe fac0 bl 8001ae8 <cJSON_GetArraySize>
8003568: 4603 mov r3, r0
800356a: 647b str r3, [r7, #68] @ 0x44
if (arraySize == 3) {
800356c: 6c7b ldr r3, [r7, #68] @ 0x44
800356e: 2b03 cmp r3, #3
8003570: d162 bne.n 8003638 <MqttMessageArrived+0x3fc>
for (int i = 0; i < arraySize; i++) {
8003572: 2300 movs r3, #0
8003574: 65bb str r3, [r7, #88] @ 0x58
8003576: e01d b.n 80035b4 <MqttMessageArrived+0x378>
8003578: 08031c3c .word 0x08031c3c
800357c: 08031c50 .word 0x08031c50
cJSON* item = cJSON_GetArrayItem (objectItem, i);
8003580: 6db9 ldr r1, [r7, #88] @ 0x58
8003582: 6cb8 ldr r0, [r7, #72] @ 0x48
8003584: f7fe faf4 bl 8001b70 <cJSON_GetArrayItem>
8003588: 6438 str r0, [r7, #64] @ 0x40
if (cJSON_IsNumber (item)) {
800358a: 6c38 ldr r0, [r7, #64] @ 0x40
800358c: f7fe fb5b bl 8001c46 <cJSON_IsNumber>
8003590: 4603 mov r3, r0
8003592: 2b00 cmp r3, #0
8003594: d00b beq.n 80035ae <MqttMessageArrived+0x372>
data.values.flaotValues.value[i] = item->valuedouble;
8003596: 6c3b ldr r3, [r7, #64] @ 0x40
8003598: ed93 7b06 vldr d7, [r3, #24]
800359c: eef7 7bc7 vcvt.f32.f64 s15, d7
80035a0: 6dbb ldr r3, [r7, #88] @ 0x58
80035a2: 009b lsls r3, r3, #2
80035a4: 3370 adds r3, #112 @ 0x70
80035a6: 443b add r3, r7
80035a8: 3b64 subs r3, #100 @ 0x64
80035aa: edc3 7a00 vstr s15, [r3]
for (int i = 0; i < arraySize; i++) {
80035ae: 6dbb ldr r3, [r7, #88] @ 0x58
80035b0: 3301 adds r3, #1
80035b2: 65bb str r3, [r7, #88] @ 0x58
80035b4: 6dbb ldr r3, [r7, #88] @ 0x58
80035b6: 6c7a ldr r2, [r7, #68] @ 0x44
80035b8: 429a cmp r2, r3
80035ba: d8e1 bhi.n 8003580 <MqttMessageArrived+0x344>
}
}
}
}
break;
80035bc: e03c b.n 8003638 <MqttMessageArrived+0x3fc>
case resetSystem:
if (cJSON_IsNumber (objectItem)) {
80035be: 6cb8 ldr r0, [r7, #72] @ 0x48
80035c0: f7fe fb41 bl 8001c46 <cJSON_IsNumber>
80035c4: 4603 mov r3, r0
80035c6: 2b00 cmp r3, #0
80035c8: d038 beq.n 800363c <MqttMessageArrived+0x400>
if (objectItem->valueint == 1) {
80035ca: 6cbb ldr r3, [r7, #72] @ 0x48
80035cc: 695b ldr r3, [r3, #20]
80035ce: 2b01 cmp r3, #1
80035d0: d134 bne.n 800363c <MqttMessageArrived+0x400>
data.spCommand = spResetSystem;
80035d2: 230f movs r3, #15
80035d4: 723b strb r3, [r7, #8]
break;
80035d6: e036 b.n 8003646 <MqttMessageArrived+0x40a>
}
}
break;
case setPositionX:
if (cJSON_IsNumber (objectItem)) {
80035d8: 6cb8 ldr r0, [r7, #72] @ 0x48
80035da: f7fe fb34 bl 8001c46 <cJSON_IsNumber>
80035de: 4603 mov r3, r0
80035e0: 2b00 cmp r3, #0
80035e2: d02d beq.n 8003640 <MqttMessageArrived+0x404>
data.spCommand = spSetPositonX;
80035e4: 2310 movs r3, #16
80035e6: 723b strb r3, [r7, #8]
data.values.flaotValues.value[0] = objectItem->valuedouble;
80035e8: 6cbb ldr r3, [r7, #72] @ 0x48
80035ea: ed93 7b06 vldr d7, [r3, #24]
80035ee: eef7 7bc7 vcvt.f32.f64 s15, d7
80035f2: edc7 7a03 vstr s15, [r7, #12]
}
break;
80035f6: e023 b.n 8003640 <MqttMessageArrived+0x404>
case setPositionY:
if (cJSON_IsNumber (objectItem)) {
80035f8: 6cb8 ldr r0, [r7, #72] @ 0x48
80035fa: f7fe fb24 bl 8001c46 <cJSON_IsNumber>
80035fe: 4603 mov r3, r0
8003600: 2b00 cmp r3, #0
8003602: d01f beq.n 8003644 <MqttMessageArrived+0x408>
data.spCommand = spSetPositonY;
8003604: 2311 movs r3, #17
8003606: 723b strb r3, [r7, #8]
data.values.flaotValues.value[0] = objectItem->valuedouble;
8003608: 6cbb ldr r3, [r7, #72] @ 0x48
800360a: ed93 7b06 vldr d7, [r3, #24]
800360e: eef7 7bc7 vcvt.f32.f64 s15, d7
8003612: edc7 7a03 vstr s15, [r7, #12]
}
break;
8003616: e015 b.n 8003644 <MqttMessageArrived+0x408>
default: break;
8003618: bf00 nop
800361a: e014 b.n 8003646 <MqttMessageArrived+0x40a>
break;
800361c: bf00 nop
800361e: e012 b.n 8003646 <MqttMessageArrived+0x40a>
break;
8003620: bf00 nop
8003622: e010 b.n 8003646 <MqttMessageArrived+0x40a>
break;
8003624: bf00 nop
8003626: e00e b.n 8003646 <MqttMessageArrived+0x40a>
break;
8003628: bf00 nop
800362a: e00c b.n 8003646 <MqttMessageArrived+0x40a>
break;
800362c: bf00 nop
800362e: e00a b.n 8003646 <MqttMessageArrived+0x40a>
break;
8003630: bf00 nop
8003632: e008 b.n 8003646 <MqttMessageArrived+0x40a>
break;
8003634: bf00 nop
8003636: e006 b.n 8003646 <MqttMessageArrived+0x40a>
break;
8003638: bf00 nop
800363a: e004 b.n 8003646 <MqttMessageArrived+0x40a>
break;
800363c: bf00 nop
800363e: e002 b.n 8003646 <MqttMessageArrived+0x40a>
break;
8003640: bf00 nop
8003642: e000 b.n 8003646 <MqttMessageArrived+0x40a>
break;
8003644: bf00 nop
for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
8003646: 6ebb ldr r3, [r7, #104] @ 0x68
8003648: 3301 adds r3, #1
800364a: 66bb str r3, [r7, #104] @ 0x68
800364c: 6ebb ldr r3, [r7, #104] @ 0x68
800364e: 2b10 cmp r3, #16
8003650: f77f ae5a ble.w 8003308 <MqttMessageArrived+0xcc>
8003654: e01b b.n 800368e <MqttMessageArrived+0x452>
}
}
}
} else {
for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
8003656: 2300 movs r3, #0
8003658: 657b str r3, [r7, #84] @ 0x54
800365a: e015 b.n 8003688 <MqttMessageArrived+0x44c>
objectItem = cJSON_GetObjectItemCaseSensitive (json, topicCommands[topicCmdNumber]);
800365c: 4a3e ldr r2, [pc, #248] @ (8003758 <MqttMessageArrived+0x51c>)
800365e: 6d7b ldr r3, [r7, #84] @ 0x54
8003660: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8003664: 4619 mov r1, r3
8003666: 6cf8 ldr r0, [r7, #76] @ 0x4c
8003668: f7fe fade bl 8001c28 <cJSON_GetObjectItemCaseSensitive>
800366c: 64b8 str r0, [r7, #72] @ 0x48
if (objectItem != NULL) {
800366e: 6cbb ldr r3, [r7, #72] @ 0x48
8003670: 2b00 cmp r3, #0
8003672: d006 beq.n 8003682 <MqttMessageArrived+0x446>
if (topicCmdNumber == resetSystem) {
8003674: 6d7b ldr r3, [r7, #84] @ 0x54
8003676: 2b0e cmp r3, #14
8003678: d103 bne.n 8003682 <MqttMessageArrived+0x446>
__ASM volatile ("cpsid i" : : : "memory");
800367a: b672 cpsid i
}
800367c: bf00 nop
__disable_irq ();
NVIC_SystemReset ();
800367e: f7ff f86d bl 800275c <__NVIC_SystemReset>
for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
8003682: 6d7b ldr r3, [r7, #84] @ 0x54
8003684: 3301 adds r3, #1
8003686: 657b str r3, [r7, #84] @ 0x54
8003688: 6d7b ldr r3, [r7, #84] @ 0x54
800368a: 2b10 cmp r3, #16
800368c: dde6 ble.n 800365c <MqttMessageArrived+0x420>
}
}
}
}
switch (topicForBoard) {
800368e: f897 306e ldrb.w r3, [r7, #110] @ 0x6e
8003692: 2b04 cmp r3, #4
8003694: d84c bhi.n 8003730 <MqttMessageArrived+0x4f4>
8003696: a201 add r2, pc, #4 @ (adr r2, 800369c <MqttMessageArrived+0x460>)
8003698: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800369c: 08003731 .word 0x08003731
80036a0: 080036b1 .word 0x080036b1
80036a4: 080036d1 .word 0x080036d1
80036a8: 080036f1 .word 0x080036f1
80036ac: 08003711 .word 0x08003711
#ifdef USE_UART8_INSTEAD_UART1
if (uart8TaskData.sendCmdToSlaveQueue != NULL) {
osMessageQueuePut (uart8TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
}
#else
if (uart1TaskData.sendCmdToSlaveQueue != NULL) {
80036b0: 4b2a ldr r3, [pc, #168] @ (800375c <MqttMessageArrived+0x520>)
80036b2: 6adb ldr r3, [r3, #44] @ 0x2c
80036b4: 2b00 cmp r3, #0
80036b6: d007 beq.n 80036c8 <MqttMessageArrived+0x48c>
osMessageQueuePut (uart1TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
80036b8: 4b28 ldr r3, [pc, #160] @ (800375c <MqttMessageArrived+0x520>)
80036ba: 6ad8 ldr r0, [r3, #44] @ 0x2c
80036bc: f107 0108 add.w r1, r7, #8
80036c0: 2364 movs r3, #100 @ 0x64
80036c2: 2200 movs r2, #0
80036c4: f00e fb86 bl 8011dd4 <osMessageQueuePut>
}
#endif
printf ("Send cmd to board 1\n");
80036c8: 4825 ldr r0, [pc, #148] @ (8003760 <MqttMessageArrived+0x524>)
80036ca: f027 fa17 bl 802aafc <puts>
break;
80036ce: e030 b.n 8003732 <MqttMessageArrived+0x4f6>
case board_2:
if (uart3TaskData.sendCmdToSlaveQueue != NULL) {
80036d0: 4b24 ldr r3, [pc, #144] @ (8003764 <MqttMessageArrived+0x528>)
80036d2: 6adb ldr r3, [r3, #44] @ 0x2c
80036d4: 2b00 cmp r3, #0
80036d6: d007 beq.n 80036e8 <MqttMessageArrived+0x4ac>
osMessageQueuePut (uart3TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
80036d8: 4b22 ldr r3, [pc, #136] @ (8003764 <MqttMessageArrived+0x528>)
80036da: 6ad8 ldr r0, [r3, #44] @ 0x2c
80036dc: f107 0108 add.w r1, r7, #8
80036e0: 2364 movs r3, #100 @ 0x64
80036e2: 2200 movs r2, #0
80036e4: f00e fb76 bl 8011dd4 <osMessageQueuePut>
}
printf ("Send cmd to board 2\n");
80036e8: 481f ldr r0, [pc, #124] @ (8003768 <MqttMessageArrived+0x52c>)
80036ea: f027 fa07 bl 802aafc <puts>
break;
80036ee: e020 b.n 8003732 <MqttMessageArrived+0x4f6>
case board_3:
if (uart6TaskData.sendCmdToSlaveQueue != NULL) {
80036f0: 4b1e ldr r3, [pc, #120] @ (800376c <MqttMessageArrived+0x530>)
80036f2: 6adb ldr r3, [r3, #44] @ 0x2c
80036f4: 2b00 cmp r3, #0
80036f6: d007 beq.n 8003708 <MqttMessageArrived+0x4cc>
osMessageQueuePut (uart6TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
80036f8: 4b1c ldr r3, [pc, #112] @ (800376c <MqttMessageArrived+0x530>)
80036fa: 6ad8 ldr r0, [r3, #44] @ 0x2c
80036fc: f107 0108 add.w r1, r7, #8
8003700: 2364 movs r3, #100 @ 0x64
8003702: 2200 movs r2, #0
8003704: f00e fb66 bl 8011dd4 <osMessageQueuePut>
}
printf ("Send cmd to board 3\n");
8003708: 4819 ldr r0, [pc, #100] @ (8003770 <MqttMessageArrived+0x534>)
800370a: f027 f9f7 bl 802aafc <puts>
break;
800370e: e010 b.n 8003732 <MqttMessageArrived+0x4f6>
case board_4:
if (uart2TaskData.sendCmdToSlaveQueue != NULL) {
8003710: 4b18 ldr r3, [pc, #96] @ (8003774 <MqttMessageArrived+0x538>)
8003712: 6adb ldr r3, [r3, #44] @ 0x2c
8003714: 2b00 cmp r3, #0
8003716: d007 beq.n 8003728 <MqttMessageArrived+0x4ec>
osMessageQueuePut (uart2TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
8003718: 4b16 ldr r3, [pc, #88] @ (8003774 <MqttMessageArrived+0x538>)
800371a: 6ad8 ldr r0, [r3, #44] @ 0x2c
800371c: f107 0108 add.w r1, r7, #8
8003720: 2364 movs r3, #100 @ 0x64
8003722: 2200 movs r2, #0
8003724: f00e fb56 bl 8011dd4 <osMessageQueuePut>
}
printf ("Send cmd to board 4\n");
8003728: 4813 ldr r0, [pc, #76] @ (8003778 <MqttMessageArrived+0x53c>)
800372a: f027 f9e7 bl 802aafc <puts>
break;
800372e: e000 b.n 8003732 <MqttMessageArrived+0x4f6>
default: break;
8003730: bf00 nop
}
cJSON_Delete (json);
8003732: 6cf8 ldr r0, [r7, #76] @ 0x4c
8003734: f7fd fa2a bl 8000b8c <cJSON_Delete>
printf ("MQTT Topic:%s, MSG[%d]:%s\n", topicName, (int)message->payloadlen, (char*)message->payload);
8003738: 6d3b ldr r3, [r7, #80] @ 0x50
800373a: 68db ldr r3, [r3, #12]
800373c: 461a mov r2, r3
800373e: 6d3b ldr r3, [r7, #80] @ 0x50
8003740: 689b ldr r3, [r3, #8]
8003742: f107 0118 add.w r1, r7, #24
8003746: 480d ldr r0, [pc, #52] @ (800377c <MqttMessageArrived+0x540>)
8003748: f027 f970 bl 802aa2c <iprintf>
800374c: e000 b.n 8003750 <MqttMessageArrived+0x514>
return;
800374e: bf00 nop
}
8003750: 3770 adds r7, #112 @ 0x70
8003752: 46bd mov sp, r7
8003754: bd80 pop {r7, pc}
8003756: bf00 nop
8003758: 08031c50 .word 0x08031c50
800375c: 24001efc .word 0x24001efc
8003760: 0802dac0 .word 0x0802dac0
8003764: 24001f34 .word 0x24001f34
8003768: 0802dad4 .word 0x0802dad4
800376c: 24001f6c .word 0x24001f6c
8003770: 0802dae8 .word 0x0802dae8
8003774: 24001fa4 .word 0x24001fa4
8003778: 0802dafc .word 0x0802dafc
800377c: 0802db10 .word 0x0802db10
08003780 <mqtt_cli_init>:
void mqtt_cli_init (void) {
8003780: b580 push {r7, lr}
8003782: af00 add r7, sp, #0
mqttClientSubTaskHandle = osThreadNew (MqttClientSubTask, NULL, &mqttClientSubTaskAttr); // subscribe task
8003784: 4a08 ldr r2, [pc, #32] @ (80037a8 <mqtt_cli_init+0x28>)
8003786: 2100 movs r1, #0
8003788: 4808 ldr r0, [pc, #32] @ (80037ac <mqtt_cli_init+0x2c>)
800378a: f00d feae bl 80114ea <osThreadNew>
800378e: 4603 mov r3, r0
8003790: 4a07 ldr r2, [pc, #28] @ (80037b0 <mqtt_cli_init+0x30>)
8003792: 6013 str r3, [r2, #0]
mqttClientPubTaskHandle = osThreadNew (MqttClientPubTask, NULL, &mqttClientPubTaskAttr); // publish task
8003794: 4a07 ldr r2, [pc, #28] @ (80037b4 <mqtt_cli_init+0x34>)
8003796: 2100 movs r1, #0
8003798: 4807 ldr r0, [pc, #28] @ (80037b8 <mqtt_cli_init+0x38>)
800379a: f00d fea6 bl 80114ea <osThreadNew>
800379e: 4603 mov r3, r0
80037a0: 4a06 ldr r2, [pc, #24] @ (80037bc <mqtt_cli_init+0x3c>)
80037a2: 6013 str r3, [r2, #0]
}
80037a4: bf00 nop
80037a6: bd80 pop {r7, pc}
80037a8: 08031c94 .word 0x08031c94
80037ac: 08002789 .word 0x08002789
80037b0: 24000728 .word 0x24000728
80037b4: 08031cb8 .word 0x08031cb8
80037b8: 080027f9 .word 0x080027f9
80037bc: 2400072c .word 0x2400072c
080037c0 <WriteDataToBuffer>:
buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
}
*buffPos = newBuffPos;
}
void WriteDataToBuffer (uint8_t* buff, uint16_t* buffPos, void* data, uint8_t dataSize) {
80037c0: b480 push {r7}
80037c2: b089 sub sp, #36 @ 0x24
80037c4: af00 add r7, sp, #0
80037c6: 60f8 str r0, [r7, #12]
80037c8: 60b9 str r1, [r7, #8]
80037ca: 607a str r2, [r7, #4]
80037cc: 70fb strb r3, [r7, #3]
uint32_t* uDataPtr = data;
80037ce: 687b ldr r3, [r7, #4]
80037d0: 61bb str r3, [r7, #24]
uint32_t uData = *uDataPtr;
80037d2: 69bb ldr r3, [r7, #24]
80037d4: 681b ldr r3, [r3, #0]
80037d6: 617b str r3, [r7, #20]
uint8_t i = 0;
80037d8: 2300 movs r3, #0
80037da: 77fb strb r3, [r7, #31]
uint8_t newBuffPos = *buffPos;
80037dc: 68bb ldr r3, [r7, #8]
80037de: 881b ldrh r3, [r3, #0]
80037e0: 77bb strb r3, [r7, #30]
for (i = 0; i < dataSize; i++) {
80037e2: 2300 movs r3, #0
80037e4: 77fb strb r3, [r7, #31]
80037e6: e00e b.n 8003806 <WriteDataToBuffer+0x46>
buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
80037e8: 7ffb ldrb r3, [r7, #31]
80037ea: 00db lsls r3, r3, #3
80037ec: 697a ldr r2, [r7, #20]
80037ee: 40da lsrs r2, r3
80037f0: 7fbb ldrb r3, [r7, #30]
80037f2: 1c59 adds r1, r3, #1
80037f4: 77b9 strb r1, [r7, #30]
80037f6: 4619 mov r1, r3
80037f8: 68fb ldr r3, [r7, #12]
80037fa: 440b add r3, r1
80037fc: b2d2 uxtb r2, r2
80037fe: 701a strb r2, [r3, #0]
for (i = 0; i < dataSize; i++) {
8003800: 7ffb ldrb r3, [r7, #31]
8003802: 3301 adds r3, #1
8003804: 77fb strb r3, [r7, #31]
8003806: 7ffa ldrb r2, [r7, #31]
8003808: 78fb ldrb r3, [r7, #3]
800380a: 429a cmp r2, r3
800380c: d3ec bcc.n 80037e8 <WriteDataToBuffer+0x28>
}
*buffPos = newBuffPos;
800380e: 7fbb ldrb r3, [r7, #30]
8003810: b29a uxth r2, r3
8003812: 68bb ldr r3, [r7, #8]
8003814: 801a strh r2, [r3, #0]
}
8003816: bf00 nop
8003818: 3724 adds r7, #36 @ 0x24
800381a: 46bd mov sp, r7
800381c: f85d 7b04 ldr.w r7, [sp], #4
8003820: 4770 bx lr
08003822 <ReadFloatFromBuffer>:
void ReadFloatFromBuffer(uint8_t* buff, uint16_t* buffPos, float* data)
{
8003822: b480 push {r7}
8003824: b087 sub sp, #28
8003826: af00 add r7, sp, #0
8003828: 60f8 str r0, [r7, #12]
800382a: 60b9 str r1, [r7, #8]
800382c: 607a str r2, [r7, #4]
uint32_t* word = (uint32_t *)data;
800382e: 687b ldr r3, [r7, #4]
8003830: 617b str r3, [r7, #20]
*word = CONVERT_BYTES_TO_WORD(&buff[*buffPos]);
8003832: 68bb ldr r3, [r7, #8]
8003834: 881b ldrh r3, [r3, #0]
8003836: 3303 adds r3, #3
8003838: 68fa ldr r2, [r7, #12]
800383a: 4413 add r3, r2
800383c: 781b ldrb r3, [r3, #0]
800383e: 061a lsls r2, r3, #24
8003840: 68bb ldr r3, [r7, #8]
8003842: 881b ldrh r3, [r3, #0]
8003844: 3302 adds r3, #2
8003846: 68f9 ldr r1, [r7, #12]
8003848: 440b add r3, r1
800384a: 781b ldrb r3, [r3, #0]
800384c: 041b lsls r3, r3, #16
800384e: 431a orrs r2, r3
8003850: 68bb ldr r3, [r7, #8]
8003852: 881b ldrh r3, [r3, #0]
8003854: 3301 adds r3, #1
8003856: 68f9 ldr r1, [r7, #12]
8003858: 440b add r3, r1
800385a: 781b ldrb r3, [r3, #0]
800385c: 021b lsls r3, r3, #8
800385e: 4313 orrs r3, r2
8003860: 68ba ldr r2, [r7, #8]
8003862: 8812 ldrh r2, [r2, #0]
8003864: 4611 mov r1, r2
8003866: 68fa ldr r2, [r7, #12]
8003868: 440a add r2, r1
800386a: 7812 ldrb r2, [r2, #0]
800386c: 4313 orrs r3, r2
800386e: 461a mov r2, r3
8003870: 697b ldr r3, [r7, #20]
8003872: 601a str r2, [r3, #0]
*buffPos += sizeof(float);
8003874: 68bb ldr r3, [r7, #8]
8003876: 881b ldrh r3, [r3, #0]
8003878: 3304 adds r3, #4
800387a: b29a uxth r2, r3
800387c: 68bb ldr r3, [r7, #8]
800387e: 801a strh r2, [r3, #0]
}
8003880: bf00 nop
8003882: 371c adds r7, #28
8003884: 46bd mov sp, r7
8003886: f85d 7b04 ldr.w r7, [sp], #4
800388a: 4770 bx lr
0800388c <ReadByteFromBufer>:
*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
*buffPos += sizeof(uint32_t);
}
void ReadByteFromBufer(uint8_t* buff, uint16_t* buffPos, uint8_t* data)
{
800388c: b480 push {r7}
800388e: b085 sub sp, #20
8003890: af00 add r7, sp, #0
8003892: 60f8 str r0, [r7, #12]
8003894: 60b9 str r1, [r7, #8]
8003896: 607a str r2, [r7, #4]
*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
8003898: 68bb ldr r3, [r7, #8]
800389a: 881b ldrh r3, [r3, #0]
800389c: 3301 adds r3, #1
800389e: 68fa ldr r2, [r7, #12]
80038a0: 4413 add r3, r2
80038a2: 781b ldrb r3, [r3, #0]
80038a4: 021b lsls r3, r3, #8
80038a6: b25a sxtb r2, r3
80038a8: 68bb ldr r3, [r7, #8]
80038aa: 881b ldrh r3, [r3, #0]
80038ac: 4619 mov r1, r3
80038ae: 68fb ldr r3, [r7, #12]
80038b0: 440b add r3, r1
80038b2: 781b ldrb r3, [r3, #0]
80038b4: b25b sxtb r3, r3
80038b6: 4313 orrs r3, r2
80038b8: b25b sxtb r3, r3
80038ba: b2da uxtb r2, r3
80038bc: 687b ldr r3, [r7, #4]
80038be: 701a strb r2, [r3, #0]
*buffPos += sizeof(uint8_t);
80038c0: 68bb ldr r3, [r7, #8]
80038c2: 881b ldrh r3, [r3, #0]
80038c4: 3301 adds r3, #1
80038c6: b29a uxth r2, r3
80038c8: 68bb ldr r3, [r7, #8]
80038ca: 801a strh r2, [r3, #0]
}
80038cc: bf00 nop
80038ce: 3714 adds r7, #20
80038d0: 46bd mov sp, r7
80038d2: f85d 7b04 ldr.w r7, [sp], #4
80038d6: 4770 bx lr
080038d8 <PrepareReqFrame>:
uint16_t PrepareReqFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, uint8_t* dataBuffer, uint16_t dataLength) {
80038d8: b580 push {r7, lr}
80038da: b086 sub sp, #24
80038dc: af00 add r7, sp, #0
80038de: 60f8 str r0, [r7, #12]
80038e0: 607b str r3, [r7, #4]
80038e2: 460b mov r3, r1
80038e4: 817b strh r3, [r7, #10]
80038e6: 4613 mov r3, r2
80038e8: 727b strb r3, [r7, #9]
uint16_t crc = 0;
80038ea: 2300 movs r3, #0
80038ec: 82bb strh r3, [r7, #20]
uint16_t txBufferPos = 0;
80038ee: 2300 movs r3, #0
80038f0: 82fb strh r3, [r7, #22]
uint16_t frameCmd = ((uint16_t)frameCommand);
80038f2: 7a7b ldrb r3, [r7, #9]
80038f4: 827b strh r3, [r7, #18]
memset (txBuffer, 0x00, dataLength);
80038f6: 8c3b ldrh r3, [r7, #32]
80038f8: 461a mov r2, r3
80038fa: 2100 movs r1, #0
80038fc: 68f8 ldr r0, [r7, #12]
80038fe: f027 fa27 bl 802ad50 <memset>
txBuffer[txBufferPos++] = FRAME_INDICATOR;
8003902: 8afb ldrh r3, [r7, #22]
8003904: 1c5a adds r2, r3, #1
8003906: 82fa strh r2, [r7, #22]
8003908: 461a mov r2, r3
800390a: 68fb ldr r3, [r7, #12]
800390c: 4413 add r3, r2
800390e: 22aa movs r2, #170 @ 0xaa
8003910: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
8003912: 8afb ldrh r3, [r7, #22]
8003914: 1c5a adds r2, r3, #1
8003916: 82fa strh r2, [r7, #22]
8003918: 461a mov r2, r3
800391a: 68fb ldr r3, [r7, #12]
800391c: 4413 add r3, r2
800391e: 897a ldrh r2, [r7, #10]
8003920: b2d2 uxtb r2, r2
8003922: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
8003924: 897b ldrh r3, [r7, #10]
8003926: 0a1b lsrs r3, r3, #8
8003928: b29a uxth r2, r3
800392a: 8afb ldrh r3, [r7, #22]
800392c: 1c59 adds r1, r3, #1
800392e: 82f9 strh r1, [r7, #22]
8003930: 4619 mov r1, r3
8003932: 68fb ldr r3, [r7, #12]
8003934: 440b add r3, r1
8003936: b2d2 uxtb r2, r2
8003938: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
800393a: 8afb ldrh r3, [r7, #22]
800393c: 1c5a adds r2, r3, #1
800393e: 82fa strh r2, [r7, #22]
8003940: 461a mov r2, r3
8003942: 68fb ldr r3, [r7, #12]
8003944: 4413 add r3, r2
8003946: 8a7a ldrh r2, [r7, #18]
8003948: b2d2 uxtb r2, r2
800394a: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
800394c: 8a7b ldrh r3, [r7, #18]
800394e: 0a1b lsrs r3, r3, #8
8003950: b29a uxth r2, r3
8003952: 8afb ldrh r3, [r7, #22]
8003954: 1c59 adds r1, r3, #1
8003956: 82f9 strh r1, [r7, #22]
8003958: 4619 mov r1, r3
800395a: 68fb ldr r3, [r7, #12]
800395c: 440b add r3, r1
800395e: b2d2 uxtb r2, r2
8003960: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
8003962: 8afb ldrh r3, [r7, #22]
8003964: 1c5a adds r2, r3, #1
8003966: 82fa strh r2, [r7, #22]
8003968: 461a mov r2, r3
800396a: 68fb ldr r3, [r7, #12]
800396c: 4413 add r3, r2
800396e: 8c3a ldrh r2, [r7, #32]
8003970: b2d2 uxtb r2, r2
8003972: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
8003974: 8c3b ldrh r3, [r7, #32]
8003976: 0a1b lsrs r3, r3, #8
8003978: b29a uxth r2, r3
800397a: 8afb ldrh r3, [r7, #22]
800397c: 1c59 adds r1, r3, #1
800397e: 82f9 strh r1, [r7, #22]
8003980: 4619 mov r1, r3
8003982: 68fb ldr r3, [r7, #12]
8003984: 440b add r3, r1
8003986: b2d2 uxtb r2, r2
8003988: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = 0x00;
800398a: 8afb ldrh r3, [r7, #22]
800398c: 1c5a adds r2, r3, #1
800398e: 82fa strh r2, [r7, #22]
8003990: 461a mov r2, r3
8003992: 68fb ldr r3, [r7, #12]
8003994: 4413 add r3, r2
8003996: 2200 movs r2, #0
8003998: 701a strb r2, [r3, #0]
if (dataLength > 0) {
800399a: 8c3b ldrh r3, [r7, #32]
800399c: 2b00 cmp r3, #0
800399e: d00b beq.n 80039b8 <PrepareReqFrame+0xe0>
memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
80039a0: 8afb ldrh r3, [r7, #22]
80039a2: 68fa ldr r2, [r7, #12]
80039a4: 4413 add r3, r2
80039a6: 8c3a ldrh r2, [r7, #32]
80039a8: 6879 ldr r1, [r7, #4]
80039aa: 4618 mov r0, r3
80039ac: f027 fac7 bl 802af3e <memcpy>
txBufferPos += dataLength;
80039b0: 8afa ldrh r2, [r7, #22]
80039b2: 8c3b ldrh r3, [r7, #32]
80039b4: 4413 add r3, r2
80039b6: 82fb strh r3, [r7, #22]
}
crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
80039b8: 8afb ldrh r3, [r7, #22]
80039ba: 461a mov r2, r3
80039bc: 68f9 ldr r1, [r7, #12]
80039be: 480f ldr r0, [pc, #60] @ (80039fc <PrepareReqFrame+0x124>)
80039c0: f002 fa0e bl 8005de0 <HAL_CRC_Calculate>
80039c4: 4603 mov r3, r0
80039c6: 82bb strh r3, [r7, #20]
txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
80039c8: 8afb ldrh r3, [r7, #22]
80039ca: 1c5a adds r2, r3, #1
80039cc: 82fa strh r2, [r7, #22]
80039ce: 461a mov r2, r3
80039d0: 68fb ldr r3, [r7, #12]
80039d2: 4413 add r3, r2
80039d4: 8aba ldrh r2, [r7, #20]
80039d6: b2d2 uxtb r2, r2
80039d8: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
80039da: 8abb ldrh r3, [r7, #20]
80039dc: 0a1b lsrs r3, r3, #8
80039de: b29a uxth r2, r3
80039e0: 8afb ldrh r3, [r7, #22]
80039e2: 1c59 adds r1, r3, #1
80039e4: 82f9 strh r1, [r7, #22]
80039e6: 4619 mov r1, r3
80039e8: 68fb ldr r3, [r7, #12]
80039ea: 440b add r3, r1
80039ec: b2d2 uxtb r2, r2
80039ee: 701a strb r2, [r3, #0]
return txBufferPos;
80039f0: 8afb ldrh r3, [r7, #22]
}
80039f2: 4618 mov r0, r3
80039f4: 3718 adds r7, #24
80039f6: 46bd mov sp, r7
80039f8: bd80 pop {r7, pc}
80039fa: bf00 nop
80039fc: 24000248 .word 0x24000248
08003a00 <PrepareRespFrame>:
uint16_t PrepareRespFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, SerialProtocolRespStatus respStatus, uint8_t* dataBuffer, uint16_t dataLength) {
8003a00: b580 push {r7, lr}
8003a02: b084 sub sp, #16
8003a04: af00 add r7, sp, #0
8003a06: 6078 str r0, [r7, #4]
8003a08: 4608 mov r0, r1
8003a0a: 4611 mov r1, r2
8003a0c: 461a mov r2, r3
8003a0e: 4603 mov r3, r0
8003a10: 807b strh r3, [r7, #2]
8003a12: 460b mov r3, r1
8003a14: 707b strb r3, [r7, #1]
8003a16: 4613 mov r3, r2
8003a18: 703b strb r3, [r7, #0]
uint16_t crc = 0;
8003a1a: 2300 movs r3, #0
8003a1c: 81bb strh r3, [r7, #12]
uint16_t txBufferPos = 0;
8003a1e: 2300 movs r3, #0
8003a20: 81fb strh r3, [r7, #14]
uint16_t frameCmd = ((uint16_t)frameCommand) | 0x8000; // MSB set means response
8003a22: 787b ldrb r3, [r7, #1]
8003a24: b21a sxth r2, r3
8003a26: 4b43 ldr r3, [pc, #268] @ (8003b34 <PrepareRespFrame+0x134>)
8003a28: 4313 orrs r3, r2
8003a2a: b21b sxth r3, r3
8003a2c: 817b strh r3, [r7, #10]
memset (txBuffer, 0x00, dataLength);
8003a2e: 8bbb ldrh r3, [r7, #28]
8003a30: 461a mov r2, r3
8003a32: 2100 movs r1, #0
8003a34: 6878 ldr r0, [r7, #4]
8003a36: f027 f98b bl 802ad50 <memset>
txBuffer[txBufferPos++] = FRAME_INDICATOR;
8003a3a: 89fb ldrh r3, [r7, #14]
8003a3c: 1c5a adds r2, r3, #1
8003a3e: 81fa strh r2, [r7, #14]
8003a40: 461a mov r2, r3
8003a42: 687b ldr r3, [r7, #4]
8003a44: 4413 add r3, r2
8003a46: 22aa movs r2, #170 @ 0xaa
8003a48: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
8003a4a: 89fb ldrh r3, [r7, #14]
8003a4c: 1c5a adds r2, r3, #1
8003a4e: 81fa strh r2, [r7, #14]
8003a50: 461a mov r2, r3
8003a52: 687b ldr r3, [r7, #4]
8003a54: 4413 add r3, r2
8003a56: 887a ldrh r2, [r7, #2]
8003a58: b2d2 uxtb r2, r2
8003a5a: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
8003a5c: 887b ldrh r3, [r7, #2]
8003a5e: 0a1b lsrs r3, r3, #8
8003a60: b29a uxth r2, r3
8003a62: 89fb ldrh r3, [r7, #14]
8003a64: 1c59 adds r1, r3, #1
8003a66: 81f9 strh r1, [r7, #14]
8003a68: 4619 mov r1, r3
8003a6a: 687b ldr r3, [r7, #4]
8003a6c: 440b add r3, r1
8003a6e: b2d2 uxtb r2, r2
8003a70: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
8003a72: 89fb ldrh r3, [r7, #14]
8003a74: 1c5a adds r2, r3, #1
8003a76: 81fa strh r2, [r7, #14]
8003a78: 461a mov r2, r3
8003a7a: 687b ldr r3, [r7, #4]
8003a7c: 4413 add r3, r2
8003a7e: 897a ldrh r2, [r7, #10]
8003a80: b2d2 uxtb r2, r2
8003a82: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
8003a84: 897b ldrh r3, [r7, #10]
8003a86: 0a1b lsrs r3, r3, #8
8003a88: b29a uxth r2, r3
8003a8a: 89fb ldrh r3, [r7, #14]
8003a8c: 1c59 adds r1, r3, #1
8003a8e: 81f9 strh r1, [r7, #14]
8003a90: 4619 mov r1, r3
8003a92: 687b ldr r3, [r7, #4]
8003a94: 440b add r3, r1
8003a96: b2d2 uxtb r2, r2
8003a98: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
8003a9a: 89fb ldrh r3, [r7, #14]
8003a9c: 1c5a adds r2, r3, #1
8003a9e: 81fa strh r2, [r7, #14]
8003aa0: 461a mov r2, r3
8003aa2: 687b ldr r3, [r7, #4]
8003aa4: 4413 add r3, r2
8003aa6: 8bba ldrh r2, [r7, #28]
8003aa8: b2d2 uxtb r2, r2
8003aaa: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
8003aac: 8bbb ldrh r3, [r7, #28]
8003aae: 0a1b lsrs r3, r3, #8
8003ab0: b29a uxth r2, r3
8003ab2: 89fb ldrh r3, [r7, #14]
8003ab4: 1c59 adds r1, r3, #1
8003ab6: 81f9 strh r1, [r7, #14]
8003ab8: 4619 mov r1, r3
8003aba: 687b ldr r3, [r7, #4]
8003abc: 440b add r3, r1
8003abe: b2d2 uxtb r2, r2
8003ac0: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = (uint8_t)respStatus;
8003ac2: 89fb ldrh r3, [r7, #14]
8003ac4: 1c5a adds r2, r3, #1
8003ac6: 81fa strh r2, [r7, #14]
8003ac8: 461a mov r2, r3
8003aca: 687b ldr r3, [r7, #4]
8003acc: 4413 add r3, r2
8003ace: 783a ldrb r2, [r7, #0]
8003ad0: 701a strb r2, [r3, #0]
if (dataLength > 0) {
8003ad2: 8bbb ldrh r3, [r7, #28]
8003ad4: 2b00 cmp r3, #0
8003ad6: d00b beq.n 8003af0 <PrepareRespFrame+0xf0>
memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
8003ad8: 89fb ldrh r3, [r7, #14]
8003ada: 687a ldr r2, [r7, #4]
8003adc: 4413 add r3, r2
8003ade: 8bba ldrh r2, [r7, #28]
8003ae0: 69b9 ldr r1, [r7, #24]
8003ae2: 4618 mov r0, r3
8003ae4: f027 fa2b bl 802af3e <memcpy>
txBufferPos += dataLength;
8003ae8: 89fa ldrh r2, [r7, #14]
8003aea: 8bbb ldrh r3, [r7, #28]
8003aec: 4413 add r3, r2
8003aee: 81fb strh r3, [r7, #14]
}
crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
8003af0: 89fb ldrh r3, [r7, #14]
8003af2: 461a mov r2, r3
8003af4: 6879 ldr r1, [r7, #4]
8003af6: 4810 ldr r0, [pc, #64] @ (8003b38 <PrepareRespFrame+0x138>)
8003af8: f002 f972 bl 8005de0 <HAL_CRC_Calculate>
8003afc: 4603 mov r3, r0
8003afe: 81bb strh r3, [r7, #12]
txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
8003b00: 89fb ldrh r3, [r7, #14]
8003b02: 1c5a adds r2, r3, #1
8003b04: 81fa strh r2, [r7, #14]
8003b06: 461a mov r2, r3
8003b08: 687b ldr r3, [r7, #4]
8003b0a: 4413 add r3, r2
8003b0c: 89ba ldrh r2, [r7, #12]
8003b0e: b2d2 uxtb r2, r2
8003b10: 701a strb r2, [r3, #0]
txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
8003b12: 89bb ldrh r3, [r7, #12]
8003b14: 0a1b lsrs r3, r3, #8
8003b16: b29a uxth r2, r3
8003b18: 89fb ldrh r3, [r7, #14]
8003b1a: 1c59 adds r1, r3, #1
8003b1c: 81f9 strh r1, [r7, #14]
8003b1e: 4619 mov r1, r3
8003b20: 687b ldr r3, [r7, #4]
8003b22: 440b add r3, r1
8003b24: b2d2 uxtb r2, r2
8003b26: 701a strb r2, [r3, #0]
return txBufferPos;
8003b28: 89fb ldrh r3, [r7, #14]
}
8003b2a: 4618 mov r0, r3
8003b2c: 3710 adds r7, #16
8003b2e: 46bd mov sp, r7
8003b30: bd80 pop {r7, pc}
8003b32: bf00 nop
8003b34: ffff8000 .word 0xffff8000
8003b38: 24000248 .word 0x24000248
08003b3c <HAL_MspInit>:
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8003b3c: b580 push {r7, lr}
8003b3e: b086 sub sp, #24
8003b40: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
PWREx_AVDTypeDef sConfigAVD = {0};
8003b42: f107 0310 add.w r3, r7, #16
8003b46: 2200 movs r2, #0
8003b48: 601a str r2, [r3, #0]
8003b4a: 605a str r2, [r3, #4]
PWR_PVDTypeDef sConfigPVD = {0};
8003b4c: f107 0308 add.w r3, r7, #8
8003b50: 2200 movs r2, #0
8003b52: 601a str r2, [r3, #0]
8003b54: 605a str r2, [r3, #4]
__HAL_RCC_SYSCFG_CLK_ENABLE();
8003b56: 4b1c ldr r3, [pc, #112] @ (8003bc8 <HAL_MspInit+0x8c>)
8003b58: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
8003b5c: 4a1a ldr r2, [pc, #104] @ (8003bc8 <HAL_MspInit+0x8c>)
8003b5e: f043 0302 orr.w r3, r3, #2
8003b62: f8c2 30f4 str.w r3, [r2, #244] @ 0xf4
8003b66: 4b18 ldr r3, [pc, #96] @ (8003bc8 <HAL_MspInit+0x8c>)
8003b68: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
8003b6c: f003 0302 and.w r3, r3, #2
8003b70: 607b str r3, [r7, #4]
8003b72: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/* PendSV_IRQn interrupt configuration */
HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
8003b74: 2200 movs r2, #0
8003b76: 210f movs r1, #15
8003b78: f06f 0001 mvn.w r0, #1
8003b7c: f002 f82c bl 8005bd8 <HAL_NVIC_SetPriority>
/* Peripheral interrupt init */
/* RCC_IRQn interrupt configuration */
HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
8003b80: 2200 movs r2, #0
8003b82: 2105 movs r1, #5
8003b84: 2005 movs r0, #5
8003b86: f002 f827 bl 8005bd8 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(RCC_IRQn);
8003b8a: 2005 movs r0, #5
8003b8c: f002 f83e bl 8005c0c <HAL_NVIC_EnableIRQ>
/** AVD Configuration
*/
sConfigAVD.AVDLevel = PWR_AVDLEVEL_3;
8003b90: f44f 23c0 mov.w r3, #393216 @ 0x60000
8003b94: 613b str r3, [r7, #16]
sConfigAVD.Mode = PWR_AVD_MODE_NORMAL;
8003b96: 2300 movs r3, #0
8003b98: 617b str r3, [r7, #20]
HAL_PWREx_ConfigAVD(&sConfigAVD);
8003b9a: f107 0310 add.w r3, r7, #16
8003b9e: 4618 mov r0, r3
8003ba0: f006 fd46 bl 800a630 <HAL_PWREx_ConfigAVD>
/** Enable the AVD Output
*/
HAL_PWREx_EnableAVD();
8003ba4: f006 fdba bl 800a71c <HAL_PWREx_EnableAVD>
/** PVD Configuration
*/
sConfigPVD.PVDLevel = PWR_PVDLEVEL_6;
8003ba8: 23c0 movs r3, #192 @ 0xc0
8003baa: 60bb str r3, [r7, #8]
sConfigPVD.Mode = PWR_PVD_MODE_NORMAL;
8003bac: 2300 movs r3, #0
8003bae: 60fb str r3, [r7, #12]
HAL_PWR_ConfigPVD(&sConfigPVD);
8003bb0: f107 0308 add.w r3, r7, #8
8003bb4: 4618 mov r0, r3
8003bb6: f006 fc77 bl 800a4a8 <HAL_PWR_ConfigPVD>
/** Enable the PVD Output
*/
HAL_PWR_EnablePVD();
8003bba: f006 fcef bl 800a59c <HAL_PWR_EnablePVD>
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8003bbe: bf00 nop
8003bc0: 3718 adds r7, #24
8003bc2: 46bd mov sp, r7
8003bc4: bd80 pop {r7, pc}
8003bc6: bf00 nop
8003bc8: 58024400 .word 0x58024400
08003bcc <HAL_CRC_MspInit>:
* This function configures the hardware resources used in this example
* @param hcrc: CRC handle pointer
* @retval None
*/
void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
{
8003bcc: b480 push {r7}
8003bce: b085 sub sp, #20
8003bd0: af00 add r7, sp, #0
8003bd2: 6078 str r0, [r7, #4]
if(hcrc->Instance==CRC)
8003bd4: 687b ldr r3, [r7, #4]
8003bd6: 681b ldr r3, [r3, #0]
8003bd8: 4a0b ldr r2, [pc, #44] @ (8003c08 <HAL_CRC_MspInit+0x3c>)
8003bda: 4293 cmp r3, r2
8003bdc: d10e bne.n 8003bfc <HAL_CRC_MspInit+0x30>
{
/* USER CODE BEGIN CRC_MspInit 0 */
/* USER CODE END CRC_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_CRC_CLK_ENABLE();
8003bde: 4b0b ldr r3, [pc, #44] @ (8003c0c <HAL_CRC_MspInit+0x40>)
8003be0: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8003be4: 4a09 ldr r2, [pc, #36] @ (8003c0c <HAL_CRC_MspInit+0x40>)
8003be6: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8003bea: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
8003bee: 4b07 ldr r3, [pc, #28] @ (8003c0c <HAL_CRC_MspInit+0x40>)
8003bf0: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8003bf4: f403 2300 and.w r3, r3, #524288 @ 0x80000
8003bf8: 60fb str r3, [r7, #12]
8003bfa: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN CRC_MspInit 1 */
/* USER CODE END CRC_MspInit 1 */
}
}
8003bfc: bf00 nop
8003bfe: 3714 adds r7, #20
8003c00: 46bd mov sp, r7
8003c02: f85d 7b04 ldr.w r7, [sp], #4
8003c06: 4770 bx lr
8003c08: 58024c00 .word 0x58024c00
8003c0c: 58024400 .word 0x58024400
08003c10 <HAL_RNG_MspInit>:
* This function configures the hardware resources used in this example
* @param hrng: RNG handle pointer
* @retval None
*/
void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
{
8003c10: b580 push {r7, lr}
8003c12: b0b4 sub sp, #208 @ 0xd0
8003c14: af00 add r7, sp, #0
8003c16: 6078 str r0, [r7, #4]
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
8003c18: f107 0310 add.w r3, r7, #16
8003c1c: 22c0 movs r2, #192 @ 0xc0
8003c1e: 2100 movs r1, #0
8003c20: 4618 mov r0, r3
8003c22: f027 f895 bl 802ad50 <memset>
if(hrng->Instance==RNG)
8003c26: 687b ldr r3, [r7, #4]
8003c28: 681b ldr r3, [r3, #0]
8003c2a: 4a14 ldr r2, [pc, #80] @ (8003c7c <HAL_RNG_MspInit+0x6c>)
8003c2c: 4293 cmp r3, r2
8003c2e: d121 bne.n 8003c74 <HAL_RNG_MspInit+0x64>
/* USER CODE END RNG_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
8003c30: f44f 3200 mov.w r2, #131072 @ 0x20000
8003c34: f04f 0300 mov.w r3, #0
8003c38: e9c7 2304 strd r2, r3, [r7, #16]
PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
8003c3c: 2300 movs r3, #0
8003c3e: f8c7 3090 str.w r3, [r7, #144] @ 0x90
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
8003c42: f107 0310 add.w r3, r7, #16
8003c46: 4618 mov r0, r3
8003c48: f007 fda0 bl 800b78c <HAL_RCCEx_PeriphCLKConfig>
8003c4c: 4603 mov r3, r0
8003c4e: 2b00 cmp r3, #0
8003c50: d001 beq.n 8003c56 <HAL_RNG_MspInit+0x46>
{
Error_Handler();
8003c52: f7fe fd7d bl 8002750 <Error_Handler>
}
/* Peripheral clock enable */
__HAL_RCC_RNG_CLK_ENABLE();
8003c56: 4b0a ldr r3, [pc, #40] @ (8003c80 <HAL_RNG_MspInit+0x70>)
8003c58: f8d3 30dc ldr.w r3, [r3, #220] @ 0xdc
8003c5c: 4a08 ldr r2, [pc, #32] @ (8003c80 <HAL_RNG_MspInit+0x70>)
8003c5e: f043 0340 orr.w r3, r3, #64 @ 0x40
8003c62: f8c2 30dc str.w r3, [r2, #220] @ 0xdc
8003c66: 4b06 ldr r3, [pc, #24] @ (8003c80 <HAL_RNG_MspInit+0x70>)
8003c68: f8d3 30dc ldr.w r3, [r3, #220] @ 0xdc
8003c6c: f003 0340 and.w r3, r3, #64 @ 0x40
8003c70: 60fb str r3, [r7, #12]
8003c72: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN RNG_MspInit 1 */
/* USER CODE END RNG_MspInit 1 */
}
}
8003c74: bf00 nop
8003c76: 37d0 adds r7, #208 @ 0xd0
8003c78: 46bd mov sp, r7
8003c7a: bd80 pop {r7, pc}
8003c7c: 48021800 .word 0x48021800
8003c80: 58024400 .word 0x58024400
08003c84 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8003c84: b580 push {r7, lr}
8003c86: b0c2 sub sp, #264 @ 0x108
8003c88: af00 add r7, sp, #0
8003c8a: f507 7384 add.w r3, r7, #264 @ 0x108
8003c8e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8003c92: 6018 str r0, [r3, #0]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8003c94: f107 03f4 add.w r3, r7, #244 @ 0xf4
8003c98: 2200 movs r2, #0
8003c9a: 601a str r2, [r3, #0]
8003c9c: 605a str r2, [r3, #4]
8003c9e: 609a str r2, [r3, #8]
8003ca0: 60da str r2, [r3, #12]
8003ca2: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
8003ca4: f107 0330 add.w r3, r7, #48 @ 0x30
8003ca8: 22c0 movs r2, #192 @ 0xc0
8003caa: 2100 movs r1, #0
8003cac: 4618 mov r0, r3
8003cae: f027 f84f bl 802ad50 <memset>
if(huart->Instance==UART8)
8003cb2: f507 7384 add.w r3, r7, #264 @ 0x108
8003cb6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8003cba: 681b ldr r3, [r3, #0]
8003cbc: 681b ldr r3, [r3, #0]
8003cbe: 4ab8 ldr r2, [pc, #736] @ (8003fa0 <HAL_UART_MspInit+0x31c>)
8003cc0: 4293 cmp r3, r2
8003cc2: f040 80bc bne.w 8003e3e <HAL_UART_MspInit+0x1ba>
/* USER CODE END UART8_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
8003cc6: f04f 0202 mov.w r2, #2
8003cca: f04f 0300 mov.w r3, #0
8003cce: e9c7 230c strd r2, r3, [r7, #48] @ 0x30
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
8003cd2: 2300 movs r3, #0
8003cd4: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
8003cd8: f107 0330 add.w r3, r7, #48 @ 0x30
8003cdc: 4618 mov r0, r3
8003cde: f007 fd55 bl 800b78c <HAL_RCCEx_PeriphCLKConfig>
8003ce2: 4603 mov r3, r0
8003ce4: 2b00 cmp r3, #0
8003ce6: d001 beq.n 8003cec <HAL_UART_MspInit+0x68>
{
Error_Handler();
8003ce8: f7fe fd32 bl 8002750 <Error_Handler>
}
/* Peripheral clock enable */
__HAL_RCC_UART8_CLK_ENABLE();
8003cec: 4bad ldr r3, [pc, #692] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003cee: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
8003cf2: 4aac ldr r2, [pc, #688] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003cf4: f043 4300 orr.w r3, r3, #2147483648 @ 0x80000000
8003cf8: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
8003cfc: 4ba9 ldr r3, [pc, #676] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003cfe: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
8003d02: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8003d06: 62fb str r3, [r7, #44] @ 0x2c
8003d08: 6afb ldr r3, [r7, #44] @ 0x2c
__HAL_RCC_GPIOE_CLK_ENABLE();
8003d0a: 4ba6 ldr r3, [pc, #664] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003d0c: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8003d10: 4aa4 ldr r2, [pc, #656] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003d12: f043 0310 orr.w r3, r3, #16
8003d16: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
8003d1a: 4ba2 ldr r3, [pc, #648] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003d1c: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8003d20: f003 0310 and.w r3, r3, #16
8003d24: 62bb str r3, [r7, #40] @ 0x28
8003d26: 6abb ldr r3, [r7, #40] @ 0x28
/**UART8 GPIO Configuration
PE0 ------> UART8_RX
PE1 ------> UART8_TX
*/
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
8003d28: 2303 movs r3, #3
8003d2a: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8003d2e: 2302 movs r3, #2
8003d30: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003d34: 2300 movs r3, #0
8003d36: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8003d3a: 2300 movs r3, #0
8003d3c: f8c7 3100 str.w r3, [r7, #256] @ 0x100
GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
8003d40: 2308 movs r3, #8
8003d42: f8c7 3104 str.w r3, [r7, #260] @ 0x104
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
8003d46: f107 03f4 add.w r3, r7, #244 @ 0xf4
8003d4a: 4619 mov r1, r3
8003d4c: 4896 ldr r0, [pc, #600] @ (8003fa8 <HAL_UART_MspInit+0x324>)
8003d4e: f006 f96b bl 800a028 <HAL_GPIO_Init>
/* UART8 DMA Init */
/* UART8_RX Init */
hdma_uart8_rx.Instance = DMA2_Stream7;
8003d52: 4b96 ldr r3, [pc, #600] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d54: 4a96 ldr r2, [pc, #600] @ (8003fb0 <HAL_UART_MspInit+0x32c>)
8003d56: 601a str r2, [r3, #0]
hdma_uart8_rx.Init.Request = DMA_REQUEST_UART8_RX;
8003d58: 4b94 ldr r3, [pc, #592] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d5a: 2251 movs r2, #81 @ 0x51
8003d5c: 605a str r2, [r3, #4]
hdma_uart8_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
8003d5e: 4b93 ldr r3, [pc, #588] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d60: 2200 movs r2, #0
8003d62: 609a str r2, [r3, #8]
hdma_uart8_rx.Init.PeriphInc = DMA_PINC_DISABLE;
8003d64: 4b91 ldr r3, [pc, #580] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d66: 2200 movs r2, #0
8003d68: 60da str r2, [r3, #12]
hdma_uart8_rx.Init.MemInc = DMA_MINC_ENABLE;
8003d6a: 4b90 ldr r3, [pc, #576] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d6c: f44f 6280 mov.w r2, #1024 @ 0x400
8003d70: 611a str r2, [r3, #16]
hdma_uart8_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
8003d72: 4b8e ldr r3, [pc, #568] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d74: 2200 movs r2, #0
8003d76: 615a str r2, [r3, #20]
hdma_uart8_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
8003d78: 4b8c ldr r3, [pc, #560] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d7a: 2200 movs r2, #0
8003d7c: 619a str r2, [r3, #24]
hdma_uart8_rx.Init.Mode = DMA_NORMAL;
8003d7e: 4b8b ldr r3, [pc, #556] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d80: 2200 movs r2, #0
8003d82: 61da str r2, [r3, #28]
hdma_uart8_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
8003d84: 4b89 ldr r3, [pc, #548] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d86: f44f 3240 mov.w r2, #196608 @ 0x30000
8003d8a: 621a str r2, [r3, #32]
hdma_uart8_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
8003d8c: 4b87 ldr r3, [pc, #540] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d8e: 2200 movs r2, #0
8003d90: 625a str r2, [r3, #36] @ 0x24
if (HAL_DMA_Init(&hdma_uart8_rx) != HAL_OK)
8003d92: 4886 ldr r0, [pc, #536] @ (8003fac <HAL_UART_MspInit+0x328>)
8003d94: f002 f9c6 bl 8006124 <HAL_DMA_Init>
8003d98: 4603 mov r3, r0
8003d9a: 2b00 cmp r3, #0
8003d9c: d001 beq.n 8003da2 <HAL_UART_MspInit+0x11e>
{
Error_Handler();
8003d9e: f7fe fcd7 bl 8002750 <Error_Handler>
}
__HAL_LINKDMA(huart,hdmarx,hdma_uart8_rx);
8003da2: f507 7384 add.w r3, r7, #264 @ 0x108
8003da6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8003daa: 681b ldr r3, [r3, #0]
8003dac: 4a7f ldr r2, [pc, #508] @ (8003fac <HAL_UART_MspInit+0x328>)
8003dae: f8c3 2080 str.w r2, [r3, #128] @ 0x80
8003db2: 4a7e ldr r2, [pc, #504] @ (8003fac <HAL_UART_MspInit+0x328>)
8003db4: f507 7384 add.w r3, r7, #264 @ 0x108
8003db8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8003dbc: 681b ldr r3, [r3, #0]
8003dbe: 6393 str r3, [r2, #56] @ 0x38
/* UART8_TX Init */
hdma_uart8_tx.Instance = DMA2_Stream6;
8003dc0: 4b7c ldr r3, [pc, #496] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003dc2: 4a7d ldr r2, [pc, #500] @ (8003fb8 <HAL_UART_MspInit+0x334>)
8003dc4: 601a str r2, [r3, #0]
hdma_uart8_tx.Init.Request = DMA_REQUEST_UART8_TX;
8003dc6: 4b7b ldr r3, [pc, #492] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003dc8: 2252 movs r2, #82 @ 0x52
8003dca: 605a str r2, [r3, #4]
hdma_uart8_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
8003dcc: 4b79 ldr r3, [pc, #484] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003dce: 2240 movs r2, #64 @ 0x40
8003dd0: 609a str r2, [r3, #8]
hdma_uart8_tx.Init.PeriphInc = DMA_PINC_DISABLE;
8003dd2: 4b78 ldr r3, [pc, #480] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003dd4: 2200 movs r2, #0
8003dd6: 60da str r2, [r3, #12]
hdma_uart8_tx.Init.MemInc = DMA_MINC_ENABLE;
8003dd8: 4b76 ldr r3, [pc, #472] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003dda: f44f 6280 mov.w r2, #1024 @ 0x400
8003dde: 611a str r2, [r3, #16]
hdma_uart8_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
8003de0: 4b74 ldr r3, [pc, #464] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003de2: 2200 movs r2, #0
8003de4: 615a str r2, [r3, #20]
hdma_uart8_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
8003de6: 4b73 ldr r3, [pc, #460] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003de8: 2200 movs r2, #0
8003dea: 619a str r2, [r3, #24]
hdma_uart8_tx.Init.Mode = DMA_NORMAL;
8003dec: 4b71 ldr r3, [pc, #452] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003dee: 2200 movs r2, #0
8003df0: 61da str r2, [r3, #28]
hdma_uart8_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
8003df2: 4b70 ldr r3, [pc, #448] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003df4: f44f 3240 mov.w r2, #196608 @ 0x30000
8003df8: 621a str r2, [r3, #32]
hdma_uart8_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
8003dfa: 4b6e ldr r3, [pc, #440] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003dfc: 2200 movs r2, #0
8003dfe: 625a str r2, [r3, #36] @ 0x24
if (HAL_DMA_Init(&hdma_uart8_tx) != HAL_OK)
8003e00: 486c ldr r0, [pc, #432] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003e02: f002 f98f bl 8006124 <HAL_DMA_Init>
8003e06: 4603 mov r3, r0
8003e08: 2b00 cmp r3, #0
8003e0a: d001 beq.n 8003e10 <HAL_UART_MspInit+0x18c>
{
Error_Handler();
8003e0c: f7fe fca0 bl 8002750 <Error_Handler>
}
__HAL_LINKDMA(huart,hdmatx,hdma_uart8_tx);
8003e10: f507 7384 add.w r3, r7, #264 @ 0x108
8003e14: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8003e18: 681b ldr r3, [r3, #0]
8003e1a: 4a66 ldr r2, [pc, #408] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003e1c: 67da str r2, [r3, #124] @ 0x7c
8003e1e: 4a65 ldr r2, [pc, #404] @ (8003fb4 <HAL_UART_MspInit+0x330>)
8003e20: f507 7384 add.w r3, r7, #264 @ 0x108
8003e24: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8003e28: 681b ldr r3, [r3, #0]
8003e2a: 6393 str r3, [r2, #56] @ 0x38
/* UART8 interrupt Init */
HAL_NVIC_SetPriority(UART8_IRQn, 5, 0);
8003e2c: 2200 movs r2, #0
8003e2e: 2105 movs r1, #5
8003e30: 2053 movs r0, #83 @ 0x53
8003e32: f001 fed1 bl 8005bd8 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(UART8_IRQn);
8003e36: 2053 movs r0, #83 @ 0x53
8003e38: f001 fee8 bl 8005c0c <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USART6_MspInit 1 */
/* USER CODE END USART6_MspInit 1 */
}
}
8003e3c: e17e b.n 800413c <HAL_UART_MspInit+0x4b8>
else if(huart->Instance==USART1)
8003e3e: f507 7384 add.w r3, r7, #264 @ 0x108
8003e42: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8003e46: 681b ldr r3, [r3, #0]
8003e48: 681b ldr r3, [r3, #0]
8003e4a: 4a5c ldr r2, [pc, #368] @ (8003fbc <HAL_UART_MspInit+0x338>)
8003e4c: 4293 cmp r3, r2
8003e4e: d14f bne.n 8003ef0 <HAL_UART_MspInit+0x26c>
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
8003e50: f04f 0201 mov.w r2, #1
8003e54: f04f 0300 mov.w r3, #0
8003e58: e9c7 230c strd r2, r3, [r7, #48] @ 0x30
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
8003e5c: 2300 movs r3, #0
8003e5e: f8c7 30ac str.w r3, [r7, #172] @ 0xac
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
8003e62: f107 0330 add.w r3, r7, #48 @ 0x30
8003e66: 4618 mov r0, r3
8003e68: f007 fc90 bl 800b78c <HAL_RCCEx_PeriphCLKConfig>
8003e6c: 4603 mov r3, r0
8003e6e: 2b00 cmp r3, #0
8003e70: d001 beq.n 8003e76 <HAL_UART_MspInit+0x1f2>
Error_Handler();
8003e72: f7fe fc6d bl 8002750 <Error_Handler>
__HAL_RCC_USART1_CLK_ENABLE();
8003e76: 4b4b ldr r3, [pc, #300] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003e78: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
8003e7c: 4a49 ldr r2, [pc, #292] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003e7e: f043 0310 orr.w r3, r3, #16
8003e82: f8c2 30f0 str.w r3, [r2, #240] @ 0xf0
8003e86: 4b47 ldr r3, [pc, #284] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003e88: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
8003e8c: f003 0310 and.w r3, r3, #16
8003e90: 627b str r3, [r7, #36] @ 0x24
8003e92: 6a7b ldr r3, [r7, #36] @ 0x24
__HAL_RCC_GPIOB_CLK_ENABLE();
8003e94: 4b43 ldr r3, [pc, #268] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003e96: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8003e9a: 4a42 ldr r2, [pc, #264] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003e9c: f043 0302 orr.w r3, r3, #2
8003ea0: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
8003ea4: 4b3f ldr r3, [pc, #252] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003ea6: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8003eaa: f003 0302 and.w r3, r3, #2
8003eae: 623b str r3, [r7, #32]
8003eb0: 6a3b ldr r3, [r7, #32]
GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
8003eb2: f44f 4340 mov.w r3, #49152 @ 0xc000
8003eb6: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8003eba: 2302 movs r3, #2
8003ebc: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003ec0: 2300 movs r3, #0
8003ec2: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8003ec6: 2302 movs r3, #2
8003ec8: f8c7 3100 str.w r3, [r7, #256] @ 0x100
GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
8003ecc: 2304 movs r3, #4
8003ece: f8c7 3104 str.w r3, [r7, #260] @ 0x104
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8003ed2: f107 03f4 add.w r3, r7, #244 @ 0xf4
8003ed6: 4619 mov r1, r3
8003ed8: 4839 ldr r0, [pc, #228] @ (8003fc0 <HAL_UART_MspInit+0x33c>)
8003eda: f006 f8a5 bl 800a028 <HAL_GPIO_Init>
HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
8003ede: 2200 movs r2, #0
8003ee0: 2105 movs r1, #5
8003ee2: 2025 movs r0, #37 @ 0x25
8003ee4: f001 fe78 bl 8005bd8 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USART1_IRQn);
8003ee8: 2025 movs r0, #37 @ 0x25
8003eea: f001 fe8f bl 8005c0c <HAL_NVIC_EnableIRQ>
}
8003eee: e125 b.n 800413c <HAL_UART_MspInit+0x4b8>
else if(huart->Instance==USART2)
8003ef0: f507 7384 add.w r3, r7, #264 @ 0x108
8003ef4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8003ef8: 681b ldr r3, [r3, #0]
8003efa: 681b ldr r3, [r3, #0]
8003efc: 4a31 ldr r2, [pc, #196] @ (8003fc4 <HAL_UART_MspInit+0x340>)
8003efe: 4293 cmp r3, r2
8003f00: d164 bne.n 8003fcc <HAL_UART_MspInit+0x348>
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
8003f02: f04f 0202 mov.w r2, #2
8003f06: f04f 0300 mov.w r3, #0
8003f0a: e9c7 230c strd r2, r3, [r7, #48] @ 0x30
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
8003f0e: 2300 movs r3, #0
8003f10: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
8003f14: f107 0330 add.w r3, r7, #48 @ 0x30
8003f18: 4618 mov r0, r3
8003f1a: f007 fc37 bl 800b78c <HAL_RCCEx_PeriphCLKConfig>
8003f1e: 4603 mov r3, r0
8003f20: 2b00 cmp r3, #0
8003f22: d001 beq.n 8003f28 <HAL_UART_MspInit+0x2a4>
Error_Handler();
8003f24: f7fe fc14 bl 8002750 <Error_Handler>
__HAL_RCC_USART2_CLK_ENABLE();
8003f28: 4b1e ldr r3, [pc, #120] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003f2a: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
8003f2e: 4a1d ldr r2, [pc, #116] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003f30: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8003f34: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
8003f38: 4b1a ldr r3, [pc, #104] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003f3a: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
8003f3e: f403 3300 and.w r3, r3, #131072 @ 0x20000
8003f42: 61fb str r3, [r7, #28]
8003f44: 69fb ldr r3, [r7, #28]
__HAL_RCC_GPIOD_CLK_ENABLE();
8003f46: 4b17 ldr r3, [pc, #92] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003f48: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8003f4c: 4a15 ldr r2, [pc, #84] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003f4e: f043 0308 orr.w r3, r3, #8
8003f52: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
8003f56: 4b13 ldr r3, [pc, #76] @ (8003fa4 <HAL_UART_MspInit+0x320>)
8003f58: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8003f5c: f003 0308 and.w r3, r3, #8
8003f60: 61bb str r3, [r7, #24]
8003f62: 69bb ldr r3, [r7, #24]
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
8003f64: 2360 movs r3, #96 @ 0x60
8003f66: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8003f6a: 2302 movs r3, #2
8003f6c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003f70: 2300 movs r3, #0
8003f72: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8003f76: 2302 movs r3, #2
8003f78: f8c7 3100 str.w r3, [r7, #256] @ 0x100
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
8003f7c: 2307 movs r3, #7
8003f7e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8003f82: f107 03f4 add.w r3, r7, #244 @ 0xf4
8003f86: 4619 mov r1, r3
8003f88: 480f ldr r0, [pc, #60] @ (8003fc8 <HAL_UART_MspInit+0x344>)
8003f8a: f006 f84d bl 800a028 <HAL_GPIO_Init>
HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
8003f8e: 2200 movs r2, #0
8003f90: 2105 movs r1, #5
8003f92: 2026 movs r0, #38 @ 0x26
8003f94: f001 fe20 bl 8005bd8 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USART2_IRQn);
8003f98: 2026 movs r0, #38 @ 0x26
8003f9a: f001 fe37 bl 8005c0c <HAL_NVIC_EnableIRQ>
}
8003f9e: e0cd b.n 800413c <HAL_UART_MspInit+0x4b8>
8003fa0: 40007c00 .word 0x40007c00
8003fa4: 58024400 .word 0x58024400
8003fa8: 58021000 .word 0x58021000
8003fac: 24000574 .word 0x24000574
8003fb0: 400204b8 .word 0x400204b8
8003fb4: 240005ec .word 0x240005ec
8003fb8: 400204a0 .word 0x400204a0
8003fbc: 40011000 .word 0x40011000
8003fc0: 58020400 .word 0x58020400
8003fc4: 40004400 .word 0x40004400
8003fc8: 58020c00 .word 0x58020c00
else if(huart->Instance==USART3)
8003fcc: f507 7384 add.w r3, r7, #264 @ 0x108
8003fd0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8003fd4: 681b ldr r3, [r3, #0]
8003fd6: 681b ldr r3, [r3, #0]
8003fd8: 4a5b ldr r2, [pc, #364] @ (8004148 <HAL_UART_MspInit+0x4c4>)
8003fda: 4293 cmp r3, r2
8003fdc: d14f bne.n 800407e <HAL_UART_MspInit+0x3fa>
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
8003fde: f04f 0202 mov.w r2, #2
8003fe2: f04f 0300 mov.w r3, #0
8003fe6: e9c7 230c strd r2, r3, [r7, #48] @ 0x30
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
8003fea: 2300 movs r3, #0
8003fec: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
8003ff0: f107 0330 add.w r3, r7, #48 @ 0x30
8003ff4: 4618 mov r0, r3
8003ff6: f007 fbc9 bl 800b78c <HAL_RCCEx_PeriphCLKConfig>
8003ffa: 4603 mov r3, r0
8003ffc: 2b00 cmp r3, #0
8003ffe: d001 beq.n 8004004 <HAL_UART_MspInit+0x380>
Error_Handler();
8004000: f7fe fba6 bl 8002750 <Error_Handler>
__HAL_RCC_USART3_CLK_ENABLE();
8004004: 4b51 ldr r3, [pc, #324] @ (800414c <HAL_UART_MspInit+0x4c8>)
8004006: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
800400a: 4a50 ldr r2, [pc, #320] @ (800414c <HAL_UART_MspInit+0x4c8>)
800400c: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8004010: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
8004014: 4b4d ldr r3, [pc, #308] @ (800414c <HAL_UART_MspInit+0x4c8>)
8004016: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
800401a: f403 2380 and.w r3, r3, #262144 @ 0x40000
800401e: 617b str r3, [r7, #20]
8004020: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOD_CLK_ENABLE();
8004022: 4b4a ldr r3, [pc, #296] @ (800414c <HAL_UART_MspInit+0x4c8>)
8004024: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8004028: 4a48 ldr r2, [pc, #288] @ (800414c <HAL_UART_MspInit+0x4c8>)
800402a: f043 0308 orr.w r3, r3, #8
800402e: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
8004032: 4b46 ldr r3, [pc, #280] @ (800414c <HAL_UART_MspInit+0x4c8>)
8004034: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8004038: f003 0308 and.w r3, r3, #8
800403c: 613b str r3, [r7, #16]
800403e: 693b ldr r3, [r7, #16]
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
8004040: f44f 7340 mov.w r3, #768 @ 0x300
8004044: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004048: 2302 movs r3, #2
800404a: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
GPIO_InitStruct.Pull = GPIO_NOPULL;
800404e: 2300 movs r3, #0
8004050: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8004054: 2302 movs r3, #2
8004056: f8c7 3100 str.w r3, [r7, #256] @ 0x100
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
800405a: 2307 movs r3, #7
800405c: f8c7 3104 str.w r3, [r7, #260] @ 0x104
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8004060: f107 03f4 add.w r3, r7, #244 @ 0xf4
8004064: 4619 mov r1, r3
8004066: 483a ldr r0, [pc, #232] @ (8004150 <HAL_UART_MspInit+0x4cc>)
8004068: f005 ffde bl 800a028 <HAL_GPIO_Init>
HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
800406c: 2200 movs r2, #0
800406e: 2105 movs r1, #5
8004070: 2027 movs r0, #39 @ 0x27
8004072: f001 fdb1 bl 8005bd8 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USART3_IRQn);
8004076: 2027 movs r0, #39 @ 0x27
8004078: f001 fdc8 bl 8005c0c <HAL_NVIC_EnableIRQ>
}
800407c: e05e b.n 800413c <HAL_UART_MspInit+0x4b8>
else if(huart->Instance==USART6)
800407e: f507 7384 add.w r3, r7, #264 @ 0x108
8004082: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004086: 681b ldr r3, [r3, #0]
8004088: 681b ldr r3, [r3, #0]
800408a: 4a32 ldr r2, [pc, #200] @ (8004154 <HAL_UART_MspInit+0x4d0>)
800408c: 4293 cmp r3, r2
800408e: d155 bne.n 800413c <HAL_UART_MspInit+0x4b8>
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6;
8004090: f04f 0201 mov.w r2, #1
8004094: f04f 0300 mov.w r3, #0
8004098: e9c7 230c strd r2, r3, [r7, #48] @ 0x30
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
800409c: 2300 movs r3, #0
800409e: f8c7 30ac str.w r3, [r7, #172] @ 0xac
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
80040a2: f107 0330 add.w r3, r7, #48 @ 0x30
80040a6: 4618 mov r0, r3
80040a8: f007 fb70 bl 800b78c <HAL_RCCEx_PeriphCLKConfig>
80040ac: 4603 mov r3, r0
80040ae: 2b00 cmp r3, #0
80040b0: d001 beq.n 80040b6 <HAL_UART_MspInit+0x432>
Error_Handler();
80040b2: f7fe fb4d bl 8002750 <Error_Handler>
__HAL_RCC_USART6_CLK_ENABLE();
80040b6: 4b25 ldr r3, [pc, #148] @ (800414c <HAL_UART_MspInit+0x4c8>)
80040b8: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
80040bc: 4a23 ldr r2, [pc, #140] @ (800414c <HAL_UART_MspInit+0x4c8>)
80040be: f043 0320 orr.w r3, r3, #32
80040c2: f8c2 30f0 str.w r3, [r2, #240] @ 0xf0
80040c6: 4b21 ldr r3, [pc, #132] @ (800414c <HAL_UART_MspInit+0x4c8>)
80040c8: f8d3 30f0 ldr.w r3, [r3, #240] @ 0xf0
80040cc: f003 0320 and.w r3, r3, #32
80040d0: 60fb str r3, [r7, #12]
80040d2: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOC_CLK_ENABLE();
80040d4: 4b1d ldr r3, [pc, #116] @ (800414c <HAL_UART_MspInit+0x4c8>)
80040d6: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
80040da: 4a1c ldr r2, [pc, #112] @ (800414c <HAL_UART_MspInit+0x4c8>)
80040dc: f043 0304 orr.w r3, r3, #4
80040e0: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
80040e4: 4b19 ldr r3, [pc, #100] @ (800414c <HAL_UART_MspInit+0x4c8>)
80040e6: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
80040ea: f003 0204 and.w r2, r3, #4
80040ee: f507 7384 add.w r3, r7, #264 @ 0x108
80040f2: f5a3 7380 sub.w r3, r3, #256 @ 0x100
80040f6: 601a str r2, [r3, #0]
80040f8: f507 7384 add.w r3, r7, #264 @ 0x108
80040fc: f5a3 7380 sub.w r3, r3, #256 @ 0x100
8004100: 681b ldr r3, [r3, #0]
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
8004102: 23c0 movs r3, #192 @ 0xc0
8004104: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004108: 2302 movs r3, #2
800410a: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
GPIO_InitStruct.Pull = GPIO_NOPULL;
800410e: 2300 movs r3, #0
8004110: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8004114: 2302 movs r3, #2
8004116: f8c7 3100 str.w r3, [r7, #256] @ 0x100
GPIO_InitStruct.Alternate = GPIO_AF7_USART6;
800411a: 2307 movs r3, #7
800411c: f8c7 3104 str.w r3, [r7, #260] @ 0x104
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8004120: f107 03f4 add.w r3, r7, #244 @ 0xf4
8004124: 4619 mov r1, r3
8004126: 480c ldr r0, [pc, #48] @ (8004158 <HAL_UART_MspInit+0x4d4>)
8004128: f005 ff7e bl 800a028 <HAL_GPIO_Init>
HAL_NVIC_SetPriority(USART6_IRQn, 5, 0);
800412c: 2200 movs r2, #0
800412e: 2105 movs r1, #5
8004130: 2047 movs r0, #71 @ 0x47
8004132: f001 fd51 bl 8005bd8 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USART6_IRQn);
8004136: 2047 movs r0, #71 @ 0x47
8004138: f001 fd68 bl 8005c0c <HAL_NVIC_EnableIRQ>
}
800413c: bf00 nop
800413e: f507 7784 add.w r7, r7, #264 @ 0x108
8004142: 46bd mov sp, r7
8004144: bd80 pop {r7, pc}
8004146: bf00 nop
8004148: 40004800 .word 0x40004800
800414c: 58024400 .word 0x58024400
8004150: 58020c00 .word 0x58020c00
8004154: 40011400 .word 0x40011400
8004158: 58020800 .word 0x58020800
0800415c <HAL_InitTick>:
* reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
* @param TickPriority: Tick interrupt priority.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
800415c: b580 push {r7, lr}
800415e: b090 sub sp, #64 @ 0x40
8004160: af00 add r7, sp, #0
8004162: 6078 str r0, [r7, #4]
uint32_t uwTimclock, uwAPB1Prescaler;
uint32_t uwPrescalerValue;
uint32_t pFLatency;
/*Configure the TIM6 IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8004164: 687b ldr r3, [r7, #4]
8004166: 2b0f cmp r3, #15
8004168: d827 bhi.n 80041ba <HAL_InitTick+0x5e>
{
HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0U);
800416a: 2200 movs r2, #0
800416c: 6879 ldr r1, [r7, #4]
800416e: 2036 movs r0, #54 @ 0x36
8004170: f001 fd32 bl 8005bd8 <HAL_NVIC_SetPriority>
/* Enable the TIM6 global Interrupt */
HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
8004174: 2036 movs r0, #54 @ 0x36
8004176: f001 fd49 bl 8005c0c <HAL_NVIC_EnableIRQ>
uwTickPrio = TickPriority;
800417a: 4a29 ldr r2, [pc, #164] @ (8004220 <HAL_InitTick+0xc4>)
800417c: 687b ldr r3, [r7, #4]
800417e: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Enable TIM6 clock */
__HAL_RCC_TIM6_CLK_ENABLE();
8004180: 4b28 ldr r3, [pc, #160] @ (8004224 <HAL_InitTick+0xc8>)
8004182: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
8004186: 4a27 ldr r2, [pc, #156] @ (8004224 <HAL_InitTick+0xc8>)
8004188: f043 0310 orr.w r3, r3, #16
800418c: f8c2 30e8 str.w r3, [r2, #232] @ 0xe8
8004190: 4b24 ldr r3, [pc, #144] @ (8004224 <HAL_InitTick+0xc8>)
8004192: f8d3 30e8 ldr.w r3, [r3, #232] @ 0xe8
8004196: f003 0310 and.w r3, r3, #16
800419a: 60fb str r3, [r7, #12]
800419c: 68fb ldr r3, [r7, #12]
/* Get clock configuration */
HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
800419e: f107 0210 add.w r2, r7, #16
80041a2: f107 0314 add.w r3, r7, #20
80041a6: 4611 mov r1, r2
80041a8: 4618 mov r0, r3
80041aa: f007 faad bl 800b708 <HAL_RCC_GetClockConfig>
/* Get APB1 prescaler */
uwAPB1Prescaler = clkconfig.APB1CLKDivider;
80041ae: 6abb ldr r3, [r7, #40] @ 0x28
80041b0: 63bb str r3, [r7, #56] @ 0x38
/* Compute TIM6 clock */
if (uwAPB1Prescaler == RCC_HCLK_DIV1)
80041b2: 6bbb ldr r3, [r7, #56] @ 0x38
80041b4: 2b00 cmp r3, #0
80041b6: d106 bne.n 80041c6 <HAL_InitTick+0x6a>
80041b8: e001 b.n 80041be <HAL_InitTick+0x62>
return HAL_ERROR;
80041ba: 2301 movs r3, #1
80041bc: e02b b.n 8004216 <HAL_InitTick+0xba>
{
uwTimclock = HAL_RCC_GetPCLK1Freq();
80041be: f007 fa77 bl 800b6b0 <HAL_RCC_GetPCLK1Freq>
80041c2: 63f8 str r0, [r7, #60] @ 0x3c
80041c4: e004 b.n 80041d0 <HAL_InitTick+0x74>
}
else
{
uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
80041c6: f007 fa73 bl 800b6b0 <HAL_RCC_GetPCLK1Freq>
80041ca: 4603 mov r3, r0
80041cc: 005b lsls r3, r3, #1
80041ce: 63fb str r3, [r7, #60] @ 0x3c
}
/* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
80041d0: 6bfb ldr r3, [r7, #60] @ 0x3c
80041d2: 4a15 ldr r2, [pc, #84] @ (8004228 <HAL_InitTick+0xcc>)
80041d4: fba2 2303 umull r2, r3, r2, r3
80041d8: 0c9b lsrs r3, r3, #18
80041da: 3b01 subs r3, #1
80041dc: 637b str r3, [r7, #52] @ 0x34
/* Initialize TIM6 */
htim6.Instance = TIM6;
80041de: 4b13 ldr r3, [pc, #76] @ (800422c <HAL_InitTick+0xd0>)
80041e0: 4a13 ldr r2, [pc, #76] @ (8004230 <HAL_InitTick+0xd4>)
80041e2: 601a str r2, [r3, #0]
+ Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+ ClockDivision = 0
+ Counter direction = Up
*/
htim6.Init.Period = (1000000U / 1000U) - 1U;
80041e4: 4b11 ldr r3, [pc, #68] @ (800422c <HAL_InitTick+0xd0>)
80041e6: f240 32e7 movw r2, #999 @ 0x3e7
80041ea: 60da str r2, [r3, #12]
htim6.Init.Prescaler = uwPrescalerValue;
80041ec: 4a0f ldr r2, [pc, #60] @ (800422c <HAL_InitTick+0xd0>)
80041ee: 6b7b ldr r3, [r7, #52] @ 0x34
80041f0: 6053 str r3, [r2, #4]
htim6.Init.ClockDivision = 0;
80041f2: 4b0e ldr r3, [pc, #56] @ (800422c <HAL_InitTick+0xd0>)
80041f4: 2200 movs r2, #0
80041f6: 611a str r2, [r3, #16]
htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
80041f8: 4b0c ldr r3, [pc, #48] @ (800422c <HAL_InitTick+0xd0>)
80041fa: 2200 movs r2, #0
80041fc: 609a str r2, [r3, #8]
if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
80041fe: 480b ldr r0, [pc, #44] @ (800422c <HAL_InitTick+0xd0>)
8004200: f009 f98c bl 800d51c <HAL_TIM_Base_Init>
8004204: 4603 mov r3, r0
8004206: 2b00 cmp r3, #0
8004208: d104 bne.n 8004214 <HAL_InitTick+0xb8>
{
/* Start the TIM time Base generation in interrupt mode */
return HAL_TIM_Base_Start_IT(&htim6);
800420a: 4808 ldr r0, [pc, #32] @ (800422c <HAL_InitTick+0xd0>)
800420c: f009 f9e8 bl 800d5e0 <HAL_TIM_Base_Start_IT>
8004210: 4603 mov r3, r0
8004212: e000 b.n 8004216 <HAL_InitTick+0xba>
}
/* Return function status */
return HAL_ERROR;
8004214: 2301 movs r3, #1
}
8004216: 4618 mov r0, r3
8004218: 3740 adds r7, #64 @ 0x40
800421a: 46bd mov sp, r7
800421c: bd80 pop {r7, pc}
800421e: bf00 nop
8004220: 2400002c .word 0x2400002c
8004224: 58024400 .word 0x58024400
8004228: 431bde83 .word 0x431bde83
800422c: 24000fac .word 0x24000fac
8004230: 40001000 .word 0x40001000
08004234 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8004234: b480 push {r7}
8004236: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8004238: bf00 nop
800423a: e7fd b.n 8004238 <NMI_Handler+0x4>
0800423c <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
800423c: b480 push {r7}
800423e: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8004240: bf00 nop
8004242: e7fd b.n 8004240 <HardFault_Handler+0x4>
08004244 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8004244: b480 push {r7}
8004246: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8004248: bf00 nop
800424a: e7fd b.n 8004248 <MemManage_Handler+0x4>
0800424c <BusFault_Handler>:
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
800424c: b480 push {r7}
800424e: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8004250: bf00 nop
8004252: e7fd b.n 8004250 <BusFault_Handler+0x4>
08004254 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8004254: b480 push {r7}
8004256: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8004258: bf00 nop
800425a: e7fd b.n 8004258 <UsageFault_Handler+0x4>
0800425c <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
800425c: b480 push {r7}
800425e: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8004260: bf00 nop
8004262: 46bd mov sp, r7
8004264: f85d 7b04 ldr.w r7, [sp], #4
8004268: 4770 bx lr
0800426a <RCC_IRQHandler>:
/**
* @brief This function handles RCC global interrupt.
*/
void RCC_IRQHandler(void)
{
800426a: b480 push {r7}
800426c: af00 add r7, sp, #0
/* USER CODE END RCC_IRQn 0 */
/* USER CODE BEGIN RCC_IRQn 1 */
/* USER CODE END RCC_IRQn 1 */
}
800426e: bf00 nop
8004270: 46bd mov sp, r7
8004272: f85d 7b04 ldr.w r7, [sp], #4
8004276: 4770 bx lr
08004278 <USART1_IRQHandler>:
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
8004278: b580 push {r7, lr}
800427a: af00 add r7, sp, #0
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
800427c: 4802 ldr r0, [pc, #8] @ (8004288 <USART1_IRQHandler+0x10>)
800427e: f009 fcff bl 800dc80 <HAL_UART_IRQHandler>
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
8004282: bf00 nop
8004284: bd80 pop {r7, pc}
8004286: bf00 nop
8004288: 24000324 .word 0x24000324
0800428c <USART2_IRQHandler>:
/**
* @brief This function handles USART2 global interrupt.
*/
void USART2_IRQHandler(void)
{
800428c: b580 push {r7, lr}
800428e: af00 add r7, sp, #0
/* USER CODE BEGIN USART2_IRQn 0 */
/* USER CODE END USART2_IRQn 0 */
HAL_UART_IRQHandler(&huart2);
8004290: 4802 ldr r0, [pc, #8] @ (800429c <USART2_IRQHandler+0x10>)
8004292: f009 fcf5 bl 800dc80 <HAL_UART_IRQHandler>
/* USER CODE BEGIN USART2_IRQn 1 */
/* USER CODE END USART2_IRQn 1 */
}
8004296: bf00 nop
8004298: bd80 pop {r7, pc}
800429a: bf00 nop
800429c: 240003b8 .word 0x240003b8
080042a0 <USART3_IRQHandler>:
/**
* @brief This function handles USART3 global interrupt.
*/
void USART3_IRQHandler(void)
{
80042a0: b580 push {r7, lr}
80042a2: af00 add r7, sp, #0
/* USER CODE BEGIN USART3_IRQn 0 */
/* USER CODE END USART3_IRQn 0 */
HAL_UART_IRQHandler(&huart3);
80042a4: 4802 ldr r0, [pc, #8] @ (80042b0 <USART3_IRQHandler+0x10>)
80042a6: f009 fceb bl 800dc80 <HAL_UART_IRQHandler>
/* USER CODE BEGIN USART3_IRQn 1 */
/* USER CODE END USART3_IRQn 1 */
}
80042aa: bf00 nop
80042ac: bd80 pop {r7, pc}
80042ae: bf00 nop
80042b0: 2400044c .word 0x2400044c
080042b4 <TIM6_DAC_IRQHandler>:
/**
* @brief This function handles TIM6 global interrupt, DAC1_CH1 and DAC1_CH2 underrun error interrupts.
*/
void TIM6_DAC_IRQHandler(void)
{
80042b4: b580 push {r7, lr}
80042b6: af00 add r7, sp, #0
/* USER CODE BEGIN TIM6_DAC_IRQn 0 */
/* USER CODE END TIM6_DAC_IRQn 0 */
HAL_TIM_IRQHandler(&htim6);
80042b8: 4802 ldr r0, [pc, #8] @ (80042c4 <TIM6_DAC_IRQHandler+0x10>)
80042ba: f009 fa09 bl 800d6d0 <HAL_TIM_IRQHandler>
/* USER CODE BEGIN TIM6_DAC_IRQn 1 */
/* USER CODE END TIM6_DAC_IRQn 1 */
}
80042be: bf00 nop
80042c0: bd80 pop {r7, pc}
80042c2: bf00 nop
80042c4: 24000fac .word 0x24000fac
080042c8 <ETH_IRQHandler>:
/**
* @brief This function handles Ethernet global interrupt.
*/
void ETH_IRQHandler(void)
{
80042c8: b580 push {r7, lr}
80042ca: af00 add r7, sp, #0
/* USER CODE BEGIN ETH_IRQn 0 */
/* USER CODE END ETH_IRQn 0 */
HAL_ETH_IRQHandler(&heth);
80042cc: 4802 ldr r0, [pc, #8] @ (80042d8 <ETH_IRQHandler+0x10>)
80042ce: f004 fd23 bl 8008d18 <HAL_ETH_IRQHandler>
/* USER CODE BEGIN ETH_IRQn 1 */
/* USER CODE END ETH_IRQn 1 */
}
80042d2: bf00 nop
80042d4: bd80 pop {r7, pc}
80042d6: bf00 nop
80042d8: 2400230c .word 0x2400230c
080042dc <DMA2_Stream6_IRQHandler>:
/**
* @brief This function handles DMA2 stream6 global interrupt.
*/
void DMA2_Stream6_IRQHandler(void)
{
80042dc: b580 push {r7, lr}
80042de: af00 add r7, sp, #0
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
/* USER CODE END DMA2_Stream6_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_uart8_tx);
80042e0: 4802 ldr r0, [pc, #8] @ (80042ec <DMA2_Stream6_IRQHandler+0x10>)
80042e2: f002 ffdf bl 80072a4 <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
/* USER CODE END DMA2_Stream6_IRQn 1 */
}
80042e6: bf00 nop
80042e8: bd80 pop {r7, pc}
80042ea: bf00 nop
80042ec: 240005ec .word 0x240005ec
080042f0 <DMA2_Stream7_IRQHandler>:
/**
* @brief This function handles DMA2 stream7 global interrupt.
*/
void DMA2_Stream7_IRQHandler(void)
{
80042f0: b580 push {r7, lr}
80042f2: af00 add r7, sp, #0
/* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
/* USER CODE END DMA2_Stream7_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_uart8_rx);
80042f4: 4802 ldr r0, [pc, #8] @ (8004300 <DMA2_Stream7_IRQHandler+0x10>)
80042f6: f002 ffd5 bl 80072a4 <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
/* USER CODE END DMA2_Stream7_IRQn 1 */
}
80042fa: bf00 nop
80042fc: bd80 pop {r7, pc}
80042fe: bf00 nop
8004300: 24000574 .word 0x24000574
08004304 <USART6_IRQHandler>:
/**
* @brief This function handles USART6 global interrupt.
*/
void USART6_IRQHandler(void)
{
8004304: b580 push {r7, lr}
8004306: af00 add r7, sp, #0
/* USER CODE BEGIN USART6_IRQn 0 */
/* USER CODE END USART6_IRQn 0 */
HAL_UART_IRQHandler(&huart6);
8004308: 4802 ldr r0, [pc, #8] @ (8004314 <USART6_IRQHandler+0x10>)
800430a: f009 fcb9 bl 800dc80 <HAL_UART_IRQHandler>
/* USER CODE BEGIN USART6_IRQn 1 */
/* USER CODE END USART6_IRQn 1 */
}
800430e: bf00 nop
8004310: bd80 pop {r7, pc}
8004312: bf00 nop
8004314: 240004e0 .word 0x240004e0
08004318 <UART8_IRQHandler>:
/**
* @brief This function handles UART8 global interrupt.
*/
void UART8_IRQHandler(void)
{
8004318: b580 push {r7, lr}
800431a: af00 add r7, sp, #0
/* USER CODE BEGIN UART8_IRQn 0 */
/* USER CODE END UART8_IRQn 0 */
HAL_UART_IRQHandler(&huart8);
800431c: 4802 ldr r0, [pc, #8] @ (8004328 <UART8_IRQHandler+0x10>)
800431e: f009 fcaf bl 800dc80 <HAL_UART_IRQHandler>
/* USER CODE BEGIN UART8_IRQn 1 */
/* USER CODE END UART8_IRQn 1 */
}
8004322: bf00 nop
8004324: bd80 pop {r7, pc}
8004326: bf00 nop
8004328: 24000290 .word 0x24000290
0800432c <_getpid>:
void initialise_monitor_handles()
{
}
int _getpid(void)
{
800432c: b480 push {r7}
800432e: af00 add r7, sp, #0
return 1;
8004330: 2301 movs r3, #1
}
8004332: 4618 mov r0, r3
8004334: 46bd mov sp, r7
8004336: f85d 7b04 ldr.w r7, [sp], #4
800433a: 4770 bx lr
0800433c <_kill>:
int _kill(int pid, int sig)
{
800433c: b480 push {r7}
800433e: b083 sub sp, #12
8004340: af00 add r7, sp, #0
8004342: 6078 str r0, [r7, #4]
8004344: 6039 str r1, [r7, #0]
(void)pid;
(void)sig;
errno = EINVAL;
8004346: 4b05 ldr r3, [pc, #20] @ (800435c <_kill+0x20>)
8004348: 2216 movs r2, #22
800434a: 601a str r2, [r3, #0]
return -1;
800434c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
8004350: 4618 mov r0, r3
8004352: 370c adds r7, #12
8004354: 46bd mov sp, r7
8004356: f85d 7b04 ldr.w r7, [sp], #4
800435a: 4770 bx lr
800435c: 2402b2a0 .word 0x2402b2a0
08004360 <_exit>:
void _exit (int status)
{
8004360: b580 push {r7, lr}
8004362: b082 sub sp, #8
8004364: af00 add r7, sp, #0
8004366: 6078 str r0, [r7, #4]
_kill(status, -1);
8004368: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
800436c: 6878 ldr r0, [r7, #4]
800436e: f7ff ffe5 bl 800433c <_kill>
while (1) {} /* Make sure we hang here */
8004372: bf00 nop
8004374: e7fd b.n 8004372 <_exit+0x12>
08004376 <_read>:
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
8004376: b580 push {r7, lr}
8004378: b086 sub sp, #24
800437a: af00 add r7, sp, #0
800437c: 60f8 str r0, [r7, #12]
800437e: 60b9 str r1, [r7, #8]
8004380: 607a str r2, [r7, #4]
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
8004382: 2300 movs r3, #0
8004384: 617b str r3, [r7, #20]
8004386: e00a b.n 800439e <_read+0x28>
{
*ptr++ = __io_getchar();
8004388: f3af 8000 nop.w
800438c: 4601 mov r1, r0
800438e: 68bb ldr r3, [r7, #8]
8004390: 1c5a adds r2, r3, #1
8004392: 60ba str r2, [r7, #8]
8004394: b2ca uxtb r2, r1
8004396: 701a strb r2, [r3, #0]
for (DataIdx = 0; DataIdx < len; DataIdx++)
8004398: 697b ldr r3, [r7, #20]
800439a: 3301 adds r3, #1
800439c: 617b str r3, [r7, #20]
800439e: 697a ldr r2, [r7, #20]
80043a0: 687b ldr r3, [r7, #4]
80043a2: 429a cmp r2, r3
80043a4: dbf0 blt.n 8004388 <_read+0x12>
}
return len;
80043a6: 687b ldr r3, [r7, #4]
}
80043a8: 4618 mov r0, r3
80043aa: 3718 adds r7, #24
80043ac: 46bd mov sp, r7
80043ae: bd80 pop {r7, pc}
080043b0 <_write>:
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
80043b0: b580 push {r7, lr}
80043b2: b086 sub sp, #24
80043b4: af00 add r7, sp, #0
80043b6: 60f8 str r0, [r7, #12]
80043b8: 60b9 str r1, [r7, #8]
80043ba: 607a str r2, [r7, #4]
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
80043bc: 2300 movs r3, #0
80043be: 617b str r3, [r7, #20]
80043c0: e009 b.n 80043d6 <_write+0x26>
{
__io_putchar(*ptr++);
80043c2: 68bb ldr r3, [r7, #8]
80043c4: 1c5a adds r2, r3, #1
80043c6: 60ba str r2, [r7, #8]
80043c8: 781b ldrb r3, [r3, #0]
80043ca: 4618 mov r0, r3
80043cc: f7fd fcb1 bl 8001d32 <__io_putchar>
for (DataIdx = 0; DataIdx < len; DataIdx++)
80043d0: 697b ldr r3, [r7, #20]
80043d2: 3301 adds r3, #1
80043d4: 617b str r3, [r7, #20]
80043d6: 697a ldr r2, [r7, #20]
80043d8: 687b ldr r3, [r7, #4]
80043da: 429a cmp r2, r3
80043dc: dbf1 blt.n 80043c2 <_write+0x12>
// ITM_SendChar(*ptr++);
}
return len;
80043de: 687b ldr r3, [r7, #4]
}
80043e0: 4618 mov r0, r3
80043e2: 3718 adds r7, #24
80043e4: 46bd mov sp, r7
80043e6: bd80 pop {r7, pc}
080043e8 <_close>:
int _close(int file)
{
80043e8: b480 push {r7}
80043ea: b083 sub sp, #12
80043ec: af00 add r7, sp, #0
80043ee: 6078 str r0, [r7, #4]
(void)file;
return -1;
80043f0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
80043f4: 4618 mov r0, r3
80043f6: 370c adds r7, #12
80043f8: 46bd mov sp, r7
80043fa: f85d 7b04 ldr.w r7, [sp], #4
80043fe: 4770 bx lr
08004400 <_fstat>:
int _fstat(int file, struct stat *st)
{
8004400: b480 push {r7}
8004402: b083 sub sp, #12
8004404: af00 add r7, sp, #0
8004406: 6078 str r0, [r7, #4]
8004408: 6039 str r1, [r7, #0]
(void)file;
st->st_mode = S_IFCHR;
800440a: 683b ldr r3, [r7, #0]
800440c: f44f 5200 mov.w r2, #8192 @ 0x2000
8004410: 605a str r2, [r3, #4]
return 0;
8004412: 2300 movs r3, #0
}
8004414: 4618 mov r0, r3
8004416: 370c adds r7, #12
8004418: 46bd mov sp, r7
800441a: f85d 7b04 ldr.w r7, [sp], #4
800441e: 4770 bx lr
08004420 <_isatty>:
int _isatty(int file)
{
8004420: b480 push {r7}
8004422: b083 sub sp, #12
8004424: af00 add r7, sp, #0
8004426: 6078 str r0, [r7, #4]
(void)file;
return 1;
8004428: 2301 movs r3, #1
}
800442a: 4618 mov r0, r3
800442c: 370c adds r7, #12
800442e: 46bd mov sp, r7
8004430: f85d 7b04 ldr.w r7, [sp], #4
8004434: 4770 bx lr
08004436 <_lseek>:
int _lseek(int file, int ptr, int dir)
{
8004436: b480 push {r7}
8004438: b085 sub sp, #20
800443a: af00 add r7, sp, #0
800443c: 60f8 str r0, [r7, #12]
800443e: 60b9 str r1, [r7, #8]
8004440: 607a str r2, [r7, #4]
(void)file;
(void)ptr;
(void)dir;
return 0;
8004442: 2300 movs r3, #0
}
8004444: 4618 mov r0, r3
8004446: 3714 adds r7, #20
8004448: 46bd mov sp, r7
800444a: f85d 7b04 ldr.w r7, [sp], #4
800444e: 4770 bx lr
08004450 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8004450: b480 push {r7}
8004452: b087 sub sp, #28
8004454: af00 add r7, sp, #0
8004456: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8004458: 4a14 ldr r2, [pc, #80] @ (80044ac <_sbrk+0x5c>)
800445a: 4b15 ldr r3, [pc, #84] @ (80044b0 <_sbrk+0x60>)
800445c: 1ad3 subs r3, r2, r3
800445e: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8004460: 697b ldr r3, [r7, #20]
8004462: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8004464: 4b13 ldr r3, [pc, #76] @ (80044b4 <_sbrk+0x64>)
8004466: 681b ldr r3, [r3, #0]
8004468: 2b00 cmp r3, #0
800446a: d102 bne.n 8004472 <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
800446c: 4b11 ldr r3, [pc, #68] @ (80044b4 <_sbrk+0x64>)
800446e: 4a12 ldr r2, [pc, #72] @ (80044b8 <_sbrk+0x68>)
8004470: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8004472: 4b10 ldr r3, [pc, #64] @ (80044b4 <_sbrk+0x64>)
8004474: 681a ldr r2, [r3, #0]
8004476: 687b ldr r3, [r7, #4]
8004478: 4413 add r3, r2
800447a: 693a ldr r2, [r7, #16]
800447c: 429a cmp r2, r3
800447e: d205 bcs.n 800448c <_sbrk+0x3c>
{
errno = ENOMEM;
8004480: 4b0e ldr r3, [pc, #56] @ (80044bc <_sbrk+0x6c>)
8004482: 220c movs r2, #12
8004484: 601a str r2, [r3, #0]
return (void *)-1;
8004486: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
800448a: e009 b.n 80044a0 <_sbrk+0x50>
}
prev_heap_end = __sbrk_heap_end;
800448c: 4b09 ldr r3, [pc, #36] @ (80044b4 <_sbrk+0x64>)
800448e: 681b ldr r3, [r3, #0]
8004490: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8004492: 4b08 ldr r3, [pc, #32] @ (80044b4 <_sbrk+0x64>)
8004494: 681a ldr r2, [r3, #0]
8004496: 687b ldr r3, [r7, #4]
8004498: 4413 add r3, r2
800449a: 4a06 ldr r2, [pc, #24] @ (80044b4 <_sbrk+0x64>)
800449c: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
800449e: 68fb ldr r3, [r7, #12]
}
80044a0: 4618 mov r0, r3
80044a2: 371c adds r7, #28
80044a4: 46bd mov sp, r7
80044a6: f85d 7b04 ldr.w r7, [sp], #4
80044aa: 4770 bx lr
80044ac: 24060000 .word 0x24060000
80044b0: 00000400 .word 0x00000400
80044b4: 24000ff8 .word 0x24000ff8
80044b8: 2402b2a8 .word 0x2402b2a8
80044bc: 2402b2a0 .word 0x2402b2a0
080044c0 <SystemInit>:
* configuration.
* @param None
* @retval None
*/
void SystemInit (void)
{
80044c0: b480 push {r7}
80044c2: af00 add r7, sp, #0
__IO uint32_t tmpreg;
#endif /* DATA_IN_D2_SRAM */
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
80044c4: 4b37 ldr r3, [pc, #220] @ (80045a4 <SystemInit+0xe4>)
80044c6: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
80044ca: 4a36 ldr r2, [pc, #216] @ (80045a4 <SystemInit+0xe4>)
80044cc: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
80044d0: f8c2 3088 str.w r3, [r2, #136] @ 0x88
#endif
/* Reset the RCC clock configuration to the default reset state ------------*/
/* Increasing the CPU frequency */
if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
80044d4: 4b34 ldr r3, [pc, #208] @ (80045a8 <SystemInit+0xe8>)
80044d6: 681b ldr r3, [r3, #0]
80044d8: f003 030f and.w r3, r3, #15
80044dc: 2b06 cmp r3, #6
80044de: d807 bhi.n 80044f0 <SystemInit+0x30>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
80044e0: 4b31 ldr r3, [pc, #196] @ (80045a8 <SystemInit+0xe8>)
80044e2: 681b ldr r3, [r3, #0]
80044e4: f023 030f bic.w r3, r3, #15
80044e8: 4a2f ldr r2, [pc, #188] @ (80045a8 <SystemInit+0xe8>)
80044ea: f043 0307 orr.w r3, r3, #7
80044ee: 6013 str r3, [r2, #0]
}
/* Set HSION bit */
RCC->CR |= RCC_CR_HSION;
80044f0: 4b2e ldr r3, [pc, #184] @ (80045ac <SystemInit+0xec>)
80044f2: 681b ldr r3, [r3, #0]
80044f4: 4a2d ldr r2, [pc, #180] @ (80045ac <SystemInit+0xec>)
80044f6: f043 0301 orr.w r3, r3, #1
80044fa: 6013 str r3, [r2, #0]
/* Reset CFGR register */
RCC->CFGR = 0x00000000;
80044fc: 4b2b ldr r3, [pc, #172] @ (80045ac <SystemInit+0xec>)
80044fe: 2200 movs r2, #0
8004500: 611a str r2, [r3, #16]
/* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
RCC->CR &= 0xEAF6ED7FU;
8004502: 4b2a ldr r3, [pc, #168] @ (80045ac <SystemInit+0xec>)
8004504: 681a ldr r2, [r3, #0]
8004506: 4929 ldr r1, [pc, #164] @ (80045ac <SystemInit+0xec>)
8004508: 4b29 ldr r3, [pc, #164] @ (80045b0 <SystemInit+0xf0>)
800450a: 4013 ands r3, r2
800450c: 600b str r3, [r1, #0]
/* Decreasing the number of wait states because of lower CPU frequency */
if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
800450e: 4b26 ldr r3, [pc, #152] @ (80045a8 <SystemInit+0xe8>)
8004510: 681b ldr r3, [r3, #0]
8004512: f003 0308 and.w r3, r3, #8
8004516: 2b00 cmp r3, #0
8004518: d007 beq.n 800452a <SystemInit+0x6a>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
800451a: 4b23 ldr r3, [pc, #140] @ (80045a8 <SystemInit+0xe8>)
800451c: 681b ldr r3, [r3, #0]
800451e: f023 030f bic.w r3, r3, #15
8004522: 4a21 ldr r2, [pc, #132] @ (80045a8 <SystemInit+0xe8>)
8004524: f043 0307 orr.w r3, r3, #7
8004528: 6013 str r3, [r2, #0]
}
#if defined(D3_SRAM_BASE)
/* Reset D1CFGR register */
RCC->D1CFGR = 0x00000000;
800452a: 4b20 ldr r3, [pc, #128] @ (80045ac <SystemInit+0xec>)
800452c: 2200 movs r2, #0
800452e: 619a str r2, [r3, #24]
/* Reset D2CFGR register */
RCC->D2CFGR = 0x00000000;
8004530: 4b1e ldr r3, [pc, #120] @ (80045ac <SystemInit+0xec>)
8004532: 2200 movs r2, #0
8004534: 61da str r2, [r3, #28]
/* Reset D3CFGR register */
RCC->D3CFGR = 0x00000000;
8004536: 4b1d ldr r3, [pc, #116] @ (80045ac <SystemInit+0xec>)
8004538: 2200 movs r2, #0
800453a: 621a str r2, [r3, #32]
/* Reset SRDCFGR register */
RCC->SRDCFGR = 0x00000000;
#endif
/* Reset PLLCKSELR register */
RCC->PLLCKSELR = 0x02020200;
800453c: 4b1b ldr r3, [pc, #108] @ (80045ac <SystemInit+0xec>)
800453e: 4a1d ldr r2, [pc, #116] @ (80045b4 <SystemInit+0xf4>)
8004540: 629a str r2, [r3, #40] @ 0x28
/* Reset PLLCFGR register */
RCC->PLLCFGR = 0x01FF0000;
8004542: 4b1a ldr r3, [pc, #104] @ (80045ac <SystemInit+0xec>)
8004544: 4a1c ldr r2, [pc, #112] @ (80045b8 <SystemInit+0xf8>)
8004546: 62da str r2, [r3, #44] @ 0x2c
/* Reset PLL1DIVR register */
RCC->PLL1DIVR = 0x01010280;
8004548: 4b18 ldr r3, [pc, #96] @ (80045ac <SystemInit+0xec>)
800454a: 4a1c ldr r2, [pc, #112] @ (80045bc <SystemInit+0xfc>)
800454c: 631a str r2, [r3, #48] @ 0x30
/* Reset PLL1FRACR register */
RCC->PLL1FRACR = 0x00000000;
800454e: 4b17 ldr r3, [pc, #92] @ (80045ac <SystemInit+0xec>)
8004550: 2200 movs r2, #0
8004552: 635a str r2, [r3, #52] @ 0x34
/* Reset PLL2DIVR register */
RCC->PLL2DIVR = 0x01010280;
8004554: 4b15 ldr r3, [pc, #84] @ (80045ac <SystemInit+0xec>)
8004556: 4a19 ldr r2, [pc, #100] @ (80045bc <SystemInit+0xfc>)
8004558: 639a str r2, [r3, #56] @ 0x38
/* Reset PLL2FRACR register */
RCC->PLL2FRACR = 0x00000000;
800455a: 4b14 ldr r3, [pc, #80] @ (80045ac <SystemInit+0xec>)
800455c: 2200 movs r2, #0
800455e: 63da str r2, [r3, #60] @ 0x3c
/* Reset PLL3DIVR register */
RCC->PLL3DIVR = 0x01010280;
8004560: 4b12 ldr r3, [pc, #72] @ (80045ac <SystemInit+0xec>)
8004562: 4a16 ldr r2, [pc, #88] @ (80045bc <SystemInit+0xfc>)
8004564: 641a str r2, [r3, #64] @ 0x40
/* Reset PLL3FRACR register */
RCC->PLL3FRACR = 0x00000000;
8004566: 4b11 ldr r3, [pc, #68] @ (80045ac <SystemInit+0xec>)
8004568: 2200 movs r2, #0
800456a: 645a str r2, [r3, #68] @ 0x44
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
800456c: 4b0f ldr r3, [pc, #60] @ (80045ac <SystemInit+0xec>)
800456e: 681b ldr r3, [r3, #0]
8004570: 4a0e ldr r2, [pc, #56] @ (80045ac <SystemInit+0xec>)
8004572: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8004576: 6013 str r3, [r2, #0]
/* Disable all interrupts */
RCC->CIER = 0x00000000;
8004578: 4b0c ldr r3, [pc, #48] @ (80045ac <SystemInit+0xec>)
800457a: 2200 movs r2, #0
800457c: 661a str r2, [r3, #96] @ 0x60
#if (STM32H7_DEV_ID == 0x450UL)
/* dual core CM7 or single core line */
if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
800457e: 4b10 ldr r3, [pc, #64] @ (80045c0 <SystemInit+0x100>)
8004580: 681a ldr r2, [r3, #0]
8004582: 4b10 ldr r3, [pc, #64] @ (80045c4 <SystemInit+0x104>)
8004584: 4013 ands r3, r2
8004586: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800458a: d202 bcs.n 8004592 <SystemInit+0xd2>
{
/* if stm32h7 revY*/
/* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
*((__IO uint32_t*)0x51008108) = 0x000000001U;
800458c: 4b0e ldr r3, [pc, #56] @ (80045c8 <SystemInit+0x108>)
800458e: 2201 movs r2, #1
8004590: 601a str r2, [r3, #0]
/*
* Disable the FMC bank1 (enabled after reset).
* This, prevents CPU speculation access on this bank which blocks the use of FMC during
* 24us. During this time the others FMC master (such as LTDC) cannot use it!
*/
FMC_Bank1_R->BTCR[0] = 0x000030D2;
8004592: 4b0e ldr r3, [pc, #56] @ (80045cc <SystemInit+0x10c>)
8004594: f243 02d2 movw r2, #12498 @ 0x30d2
8004598: 601a str r2, [r3, #0]
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */
#endif /*DUAL_CORE && CORE_CM4*/
}
800459a: bf00 nop
800459c: 46bd mov sp, r7
800459e: f85d 7b04 ldr.w r7, [sp], #4
80045a2: 4770 bx lr
80045a4: e000ed00 .word 0xe000ed00
80045a8: 52002000 .word 0x52002000
80045ac: 58024400 .word 0x58024400
80045b0: eaf6ed7f .word 0xeaf6ed7f
80045b4: 02020200 .word 0x02020200
80045b8: 01ff0000 .word 0x01ff0000
80045bc: 01010280 .word 0x01010280
80045c0: 5c001000 .word 0x5c001000
80045c4: ffff0000 .word 0xffff0000
80045c8: 51008108 .word 0x51008108
80045cc: 52004000 .word 0x52004000
080045d0 <UartTasksInit>:
osMutexId_t resMeasurementsMutex;
osMutexId_t sensorsInfoMutex;
extern RNG_HandleTypeDef hrng;
void UartTasksInit (void) {
80045d0: b580 push {r7, lr}
80045d2: af00 add r7, sp, #0
uart1TaskData.uartRxBuffer = uart1RxBuffer;
80045d4: 4b4e ldr r3, [pc, #312] @ (8004710 <UartTasksInit+0x140>)
80045d6: 4a4f ldr r2, [pc, #316] @ (8004714 <UartTasksInit+0x144>)
80045d8: 601a str r2, [r3, #0]
uart1TaskData.uartRxBufferLen = UART1_RX_BUFF_SIZE;
80045da: 4b4d ldr r3, [pc, #308] @ (8004710 <UartTasksInit+0x140>)
80045dc: f44f 7280 mov.w r2, #256 @ 0x100
80045e0: 809a strh r2, [r3, #4]
uart1TaskData.uartTxBuffer = uart1TxBuffer;
80045e2: 4b4b ldr r3, [pc, #300] @ (8004710 <UartTasksInit+0x140>)
80045e4: 4a4c ldr r2, [pc, #304] @ (8004718 <UartTasksInit+0x148>)
80045e6: 609a str r2, [r3, #8]
uart1TaskData.uartRxBufferLen = UART1_TX_BUFF_SIZE;
80045e8: 4b49 ldr r3, [pc, #292] @ (8004710 <UartTasksInit+0x140>)
80045ea: f44f 7280 mov.w r2, #256 @ 0x100
80045ee: 809a strh r2, [r3, #4]
uart1TaskData.frameData = uart1TaskFrameData;
80045f0: 4b47 ldr r3, [pc, #284] @ (8004710 <UartTasksInit+0x140>)
80045f2: 4a4a ldr r2, [pc, #296] @ (800471c <UartTasksInit+0x14c>)
80045f4: 611a str r2, [r3, #16]
uart1TaskData.frameDataLen = UART1_RX_BUFF_SIZE;
80045f6: 4b46 ldr r3, [pc, #280] @ (8004710 <UartTasksInit+0x140>)
80045f8: f44f 7280 mov.w r2, #256 @ 0x100
80045fc: 829a strh r2, [r3, #20]
uart1TaskData.huart = &huart1;
80045fe: 4b44 ldr r3, [pc, #272] @ (8004710 <UartTasksInit+0x140>)
8004600: 4a47 ldr r2, [pc, #284] @ (8004720 <UartTasksInit+0x150>)
8004602: 631a str r2, [r3, #48] @ 0x30
uart1TaskData.uartNumber = 1;
8004604: 4b42 ldr r3, [pc, #264] @ (8004710 <UartTasksInit+0x140>)
8004606: 2201 movs r2, #1
8004608: f883 2034 strb.w r2, [r3, #52] @ 0x34
uart2TaskData.uartRxBuffer = uart2RxBuffer;
800460c: 4b45 ldr r3, [pc, #276] @ (8004724 <UartTasksInit+0x154>)
800460e: 4a46 ldr r2, [pc, #280] @ (8004728 <UartTasksInit+0x158>)
8004610: 601a str r2, [r3, #0]
uart2TaskData.uartRxBufferLen = UART2_RX_BUFF_SIZE;
8004612: 4b44 ldr r3, [pc, #272] @ (8004724 <UartTasksInit+0x154>)
8004614: f44f 7280 mov.w r2, #256 @ 0x100
8004618: 809a strh r2, [r3, #4]
uart2TaskData.uartTxBuffer = uart2TxBuffer;
800461a: 4b42 ldr r3, [pc, #264] @ (8004724 <UartTasksInit+0x154>)
800461c: 4a43 ldr r2, [pc, #268] @ (800472c <UartTasksInit+0x15c>)
800461e: 609a str r2, [r3, #8]
uart2TaskData.uartRxBufferLen = UART2_TX_BUFF_SIZE;
8004620: 4b40 ldr r3, [pc, #256] @ (8004724 <UartTasksInit+0x154>)
8004622: f44f 7280 mov.w r2, #256 @ 0x100
8004626: 809a strh r2, [r3, #4]
uart2TaskData.frameData = uart2TaskFrameData;
8004628: 4b3e ldr r3, [pc, #248] @ (8004724 <UartTasksInit+0x154>)
800462a: 4a41 ldr r2, [pc, #260] @ (8004730 <UartTasksInit+0x160>)
800462c: 611a str r2, [r3, #16]
uart2TaskData.frameDataLen = UART2_RX_BUFF_SIZE;
800462e: 4b3d ldr r3, [pc, #244] @ (8004724 <UartTasksInit+0x154>)
8004630: f44f 7280 mov.w r2, #256 @ 0x100
8004634: 829a strh r2, [r3, #20]
uart2TaskData.huart = &huart2;
8004636: 4b3b ldr r3, [pc, #236] @ (8004724 <UartTasksInit+0x154>)
8004638: 4a3e ldr r2, [pc, #248] @ (8004734 <UartTasksInit+0x164>)
800463a: 631a str r2, [r3, #48] @ 0x30
uart2TaskData.uartNumber = 2;
800463c: 4b39 ldr r3, [pc, #228] @ (8004724 <UartTasksInit+0x154>)
800463e: 2202 movs r2, #2
8004640: f883 2034 strb.w r2, [r3, #52] @ 0x34
uart3TaskData.uartRxBuffer = uart3RxBuffer;
8004644: 4b3c ldr r3, [pc, #240] @ (8004738 <UartTasksInit+0x168>)
8004646: 4a3d ldr r2, [pc, #244] @ (800473c <UartTasksInit+0x16c>)
8004648: 601a str r2, [r3, #0]
uart3TaskData.uartRxBufferLen = UART3_RX_BUFF_SIZE;
800464a: 4b3b ldr r3, [pc, #236] @ (8004738 <UartTasksInit+0x168>)
800464c: f44f 7280 mov.w r2, #256 @ 0x100
8004650: 809a strh r2, [r3, #4]
uart3TaskData.uartTxBuffer = uart3TxBuffer;
8004652: 4b39 ldr r3, [pc, #228] @ (8004738 <UartTasksInit+0x168>)
8004654: 4a3a ldr r2, [pc, #232] @ (8004740 <UartTasksInit+0x170>)
8004656: 609a str r2, [r3, #8]
uart3TaskData.uartRxBufferLen = UART3_TX_BUFF_SIZE;
8004658: 4b37 ldr r3, [pc, #220] @ (8004738 <UartTasksInit+0x168>)
800465a: f44f 7280 mov.w r2, #256 @ 0x100
800465e: 809a strh r2, [r3, #4]
uart3TaskData.frameData = uart3TaskFrameData;
8004660: 4b35 ldr r3, [pc, #212] @ (8004738 <UartTasksInit+0x168>)
8004662: 4a38 ldr r2, [pc, #224] @ (8004744 <UartTasksInit+0x174>)
8004664: 611a str r2, [r3, #16]
uart3TaskData.frameDataLen = UART3_RX_BUFF_SIZE;
8004666: 4b34 ldr r3, [pc, #208] @ (8004738 <UartTasksInit+0x168>)
8004668: f44f 7280 mov.w r2, #256 @ 0x100
800466c: 829a strh r2, [r3, #20]
uart3TaskData.huart = &huart3;
800466e: 4b32 ldr r3, [pc, #200] @ (8004738 <UartTasksInit+0x168>)
8004670: 4a35 ldr r2, [pc, #212] @ (8004748 <UartTasksInit+0x178>)
8004672: 631a str r2, [r3, #48] @ 0x30
uart3TaskData.uartNumber = 3;
8004674: 4b30 ldr r3, [pc, #192] @ (8004738 <UartTasksInit+0x168>)
8004676: 2203 movs r2, #3
8004678: f883 2034 strb.w r2, [r3, #52] @ 0x34
uart6TaskData.uartRxBuffer = uart6RxBuffer;
800467c: 4b33 ldr r3, [pc, #204] @ (800474c <UartTasksInit+0x17c>)
800467e: 4a34 ldr r2, [pc, #208] @ (8004750 <UartTasksInit+0x180>)
8004680: 601a str r2, [r3, #0]
uart6TaskData.uartRxBufferLen = UART6_RX_BUFF_SIZE;
8004682: 4b32 ldr r3, [pc, #200] @ (800474c <UartTasksInit+0x17c>)
8004684: f44f 7280 mov.w r2, #256 @ 0x100
8004688: 809a strh r2, [r3, #4]
uart6TaskData.uartTxBuffer = uart6TxBuffer;
800468a: 4b30 ldr r3, [pc, #192] @ (800474c <UartTasksInit+0x17c>)
800468c: 4a31 ldr r2, [pc, #196] @ (8004754 <UartTasksInit+0x184>)
800468e: 609a str r2, [r3, #8]
uart6TaskData.uartRxBufferLen = UART6_TX_BUFF_SIZE;
8004690: 4b2e ldr r3, [pc, #184] @ (800474c <UartTasksInit+0x17c>)
8004692: f44f 7280 mov.w r2, #256 @ 0x100
8004696: 809a strh r2, [r3, #4]
uart6TaskData.frameData = uart6TaskFrameData;
8004698: 4b2c ldr r3, [pc, #176] @ (800474c <UartTasksInit+0x17c>)
800469a: 4a2f ldr r2, [pc, #188] @ (8004758 <UartTasksInit+0x188>)
800469c: 611a str r2, [r3, #16]
uart6TaskData.frameDataLen = UART6_RX_BUFF_SIZE;
800469e: 4b2b ldr r3, [pc, #172] @ (800474c <UartTasksInit+0x17c>)
80046a0: f44f 7280 mov.w r2, #256 @ 0x100
80046a4: 829a strh r2, [r3, #20]
uart6TaskData.huart = &huart6;
80046a6: 4b29 ldr r3, [pc, #164] @ (800474c <UartTasksInit+0x17c>)
80046a8: 4a2c ldr r2, [pc, #176] @ (800475c <UartTasksInit+0x18c>)
80046aa: 631a str r2, [r3, #48] @ 0x30
uart6TaskData.uartNumber = 6;
80046ac: 4b27 ldr r3, [pc, #156] @ (800474c <UartTasksInit+0x17c>)
80046ae: 2206 movs r2, #6
80046b0: f883 2034 strb.w r2, [r3, #52] @ 0x34
uart8TaskData.uartRxBuffer = uart8RxBuffer;
80046b4: 4b2a ldr r3, [pc, #168] @ (8004760 <UartTasksInit+0x190>)
80046b6: 4a2b ldr r2, [pc, #172] @ (8004764 <UartTasksInit+0x194>)
80046b8: 601a str r2, [r3, #0]
uart8TaskData.uartRxBufferLen = UART8_RX_BUFF_SIZE;
80046ba: 4b29 ldr r3, [pc, #164] @ (8004760 <UartTasksInit+0x190>)
80046bc: f44f 7280 mov.w r2, #256 @ 0x100
80046c0: 809a strh r2, [r3, #4]
uart8TaskData.uartTxBuffer = uart8TxBuffer;
80046c2: 4b27 ldr r3, [pc, #156] @ (8004760 <UartTasksInit+0x190>)
80046c4: 4a28 ldr r2, [pc, #160] @ (8004768 <UartTasksInit+0x198>)
80046c6: 609a str r2, [r3, #8]
uart8TaskData.uartRxBufferLen = UART8_TX_BUFF_SIZE;
80046c8: 4b25 ldr r3, [pc, #148] @ (8004760 <UartTasksInit+0x190>)
80046ca: f44f 7280 mov.w r2, #256 @ 0x100
80046ce: 809a strh r2, [r3, #4]
uart8TaskData.frameData = uart8TaskFrameData;
80046d0: 4b23 ldr r3, [pc, #140] @ (8004760 <UartTasksInit+0x190>)
80046d2: 4a26 ldr r2, [pc, #152] @ (800476c <UartTasksInit+0x19c>)
80046d4: 611a str r2, [r3, #16]
uart8TaskData.frameDataLen = UART8_RX_BUFF_SIZE;
80046d6: 4b22 ldr r3, [pc, #136] @ (8004760 <UartTasksInit+0x190>)
80046d8: f44f 7280 mov.w r2, #256 @ 0x100
80046dc: 829a strh r2, [r3, #20]
uart8TaskData.huart = &huart8;
80046de: 4b20 ldr r3, [pc, #128] @ (8004760 <UartTasksInit+0x190>)
80046e0: 4a23 ldr r2, [pc, #140] @ (8004770 <UartTasksInit+0x1a0>)
80046e2: 631a str r2, [r3, #48] @ 0x30
uart8TaskData.uartNumber = 8;
80046e4: 4b1e ldr r3, [pc, #120] @ (8004760 <UartTasksInit+0x190>)
80046e6: 2208 movs r2, #8
80046e8: f883 2034 strb.w r2, [r3, #52] @ 0x34
UartTaskCreate (&uart1TaskData);
80046ec: 4808 ldr r0, [pc, #32] @ (8004710 <UartTasksInit+0x140>)
80046ee: f000 f841 bl 8004774 <UartTaskCreate>
UartTaskCreate (&uart2TaskData);
80046f2: 480c ldr r0, [pc, #48] @ (8004724 <UartTasksInit+0x154>)
80046f4: f000 f83e bl 8004774 <UartTaskCreate>
UartTaskCreate (&uart3TaskData);
80046f8: 480f ldr r0, [pc, #60] @ (8004738 <UartTasksInit+0x168>)
80046fa: f000 f83b bl 8004774 <UartTaskCreate>
UartTaskCreate (&uart6TaskData);
80046fe: 4813 ldr r0, [pc, #76] @ (800474c <UartTasksInit+0x17c>)
8004700: f000 f838 bl 8004774 <UartTaskCreate>
UartTaskCreate (&uart8TaskData);
8004704: 4816 ldr r0, [pc, #88] @ (8004760 <UartTasksInit+0x190>)
8004706: f000 f835 bl 8004774 <UartTaskCreate>
}
800470a: bf00 nop
800470c: bd80 pop {r7, pc}
800470e: bf00 nop
8004710: 24001efc .word 0x24001efc
8004714: 24000ffc .word 0x24000ffc
8004718: 240010fc .word 0x240010fc
800471c: 240011fc .word 0x240011fc
8004720: 24000324 .word 0x24000324
8004724: 24001fa4 .word 0x24001fa4
8004728: 240012fc .word 0x240012fc
800472c: 240013fc .word 0x240013fc
8004730: 240014fc .word 0x240014fc
8004734: 240003b8 .word 0x240003b8
8004738: 24001f34 .word 0x24001f34
800473c: 240015fc .word 0x240015fc
8004740: 240016fc .word 0x240016fc
8004744: 240017fc .word 0x240017fc
8004748: 2400044c .word 0x2400044c
800474c: 24001f6c .word 0x24001f6c
8004750: 240018fc .word 0x240018fc
8004754: 240019fc .word 0x240019fc
8004758: 24001afc .word 0x24001afc
800475c: 240004e0 .word 0x240004e0
8004760: 24001fdc .word 0x24001fdc
8004764: 24001bfc .word 0x24001bfc
8004768: 24001cfc .word 0x24001cfc
800476c: 24001dfc .word 0x24001dfc
8004770: 24000290 .word 0x24000290
08004774 <UartTaskCreate>:
void UartTaskCreate (UartTaskData* uartTaskData) {
8004774: b580 push {r7, lr}
8004776: b09a sub sp, #104 @ 0x68
8004778: af00 add r7, sp, #0
800477a: 6078 str r0, [r7, #4]
osThreadAttr_t osThreadAttrRxUart = { 0 };
800477c: f107 0344 add.w r3, r7, #68 @ 0x44
8004780: 2224 movs r2, #36 @ 0x24
8004782: 2100 movs r1, #0
8004784: 4618 mov r0, r3
8004786: f026 fae3 bl 802ad50 <memset>
osThreadAttr_t osThreadAttrTxUart = { 0 };
800478a: f107 0320 add.w r3, r7, #32
800478e: 2224 movs r2, #36 @ 0x24
8004790: 2100 movs r1, #0
8004792: 4618 mov r0, r3
8004794: f026 fadc bl 802ad50 <memset>
uartTaskData->processRxDataMsgBuffer = xMessageBufferCreate (INPUT_DATA_BUFF_SIZE);
8004798: 2201 movs r2, #1
800479a: 2100 movs r1, #0
800479c: f44f 7080 mov.w r0, #256 @ 0x100
80047a0: f00e fe24 bl 80133ec <xStreamBufferGenericCreate>
80047a4: 4602 mov r2, r0
80047a6: 687b ldr r3, [r7, #4]
80047a8: 625a str r2, [r3, #36] @ 0x24
uartTaskData->processDataCb = NULL;
80047aa: 687b ldr r3, [r7, #4]
80047ac: 2200 movs r2, #0
80047ae: 629a str r2, [r3, #40] @ 0x28
// osThreadAttrRxUart.name = "os_thread_uart1_rx";
osThreadAttrRxUart.stack_size = configMINIMAL_STACK_SIZE * 2;
80047b0: f44f 6380 mov.w r3, #1024 @ 0x400
80047b4: 65bb str r3, [r7, #88] @ 0x58
osThreadAttrRxUart.priority = (osPriority_t)osPriorityHigh;
80047b6: 2328 movs r3, #40 @ 0x28
80047b8: 65fb str r3, [r7, #92] @ 0x5c
uartTaskData->uartRecieveTaskHandle = osThreadNew (UartRxTask, uartTaskData, &osThreadAttrRxUart);
80047ba: f107 0344 add.w r3, r7, #68 @ 0x44
80047be: 461a mov r2, r3
80047c0: 6879 ldr r1, [r7, #4]
80047c2: 4816 ldr r0, [pc, #88] @ (800481c <UartTaskCreate+0xa8>)
80047c4: f00c fe91 bl 80114ea <osThreadNew>
80047c8: 4602 mov r2, r0
80047ca: 687b ldr r3, [r7, #4]
80047cc: 619a str r2, [r3, #24]
osMessageQueueAttr_t uartTxMsgQueueAttr = { 0 };
80047ce: f107 0308 add.w r3, r7, #8
80047d2: 2200 movs r2, #0
80047d4: 601a str r2, [r3, #0]
80047d6: 605a str r2, [r3, #4]
80047d8: 609a str r2, [r3, #8]
80047da: 60da str r2, [r3, #12]
80047dc: 611a str r2, [r3, #16]
80047de: 615a str r2, [r3, #20]
// uartTxMsgQueueAttr.name = "uart1TxMsgQueue";
uartTaskData->sendCmdToSlaveQueue = osMessageQueueNew (16, sizeof (InterProcessData), &uartTxMsgQueueAttr);
80047e0: f107 0308 add.w r3, r7, #8
80047e4: 461a mov r2, r3
80047e6: 2110 movs r1, #16
80047e8: 2010 movs r0, #16
80047ea: f00d fa7f bl 8011cec <osMessageQueueNew>
80047ee: 4602 mov r2, r0
80047f0: 687b ldr r3, [r7, #4]
80047f2: 62da str r2, [r3, #44] @ 0x2c
// osThreadAttrTxUart.name = "os_thread_uart1_tx";
osThreadAttrTxUart.stack_size = configMINIMAL_STACK_SIZE * 4;
80047f4: f44f 6300 mov.w r3, #2048 @ 0x800
80047f8: 637b str r3, [r7, #52] @ 0x34
osThreadAttrTxUart.priority = (osPriority_t)osPriorityNormal;
80047fa: 2318 movs r3, #24
80047fc: 63bb str r3, [r7, #56] @ 0x38
uartTaskData->uartTransmitTaskHandle = osThreadNew (UartTxTask, uartTaskData, &osThreadAttrTxUart);
80047fe: f107 0320 add.w r3, r7, #32
8004802: 461a mov r2, r3
8004804: 6879 ldr r1, [r7, #4]
8004806: 4806 ldr r0, [pc, #24] @ (8004820 <UartTaskCreate+0xac>)
8004808: f00c fe6f bl 80114ea <osThreadNew>
800480c: 4602 mov r2, r0
800480e: 687b ldr r3, [r7, #4]
8004810: 61da str r2, [r3, #28]
}
8004812: bf00 nop
8004814: 3768 adds r7, #104 @ 0x68
8004816: 46bd mov sp, r7
8004818: bd80 pop {r7, pc}
800481a: bf00 nop
800481c: 08004999 .word 0x08004999
8004820: 08004f85 .word 0x08004f85
08004824 <HAL_UART_RxCpltCallback>:
void HAL_UART_RxCpltCallback (UART_HandleTypeDef* huart) {
8004824: b480 push {r7}
8004826: b083 sub sp, #12
8004828: af00 add r7, sp, #0
800482a: 6078 str r0, [r7, #4]
// osSemaphoreRelease(uart8RxSemaphore);
}
800482c: bf00 nop
800482e: 370c adds r7, #12
8004830: 46bd mov sp, r7
8004832: f85d 7b04 ldr.w r7, [sp], #4
8004836: 4770 bx lr
08004838 <HAL_UARTEx_RxEventCallback>:
void HAL_UARTEx_RxEventCallback (UART_HandleTypeDef* huart, uint16_t Size) {
8004838: b580 push {r7, lr}
800483a: b082 sub sp, #8
800483c: af00 add r7, sp, #0
800483e: 6078 str r0, [r7, #4]
8004840: 460b mov r3, r1
8004842: 807b strh r3, [r7, #2]
if (huart->Instance == USART1) {
8004844: 687b ldr r3, [r7, #4]
8004846: 681b ldr r3, [r3, #0]
8004848: 4a1e ldr r2, [pc, #120] @ (80048c4 <HAL_UARTEx_RxEventCallback+0x8c>)
800484a: 4293 cmp r3, r2
800484c: d106 bne.n 800485c <HAL_UARTEx_RxEventCallback+0x24>
HandleUartRxCallback (&uart1TaskData, huart, Size);
800484e: 887b ldrh r3, [r7, #2]
8004850: 461a mov r2, r3
8004852: 6879 ldr r1, [r7, #4]
8004854: 481c ldr r0, [pc, #112] @ (80048c8 <HAL_UARTEx_RxEventCallback+0x90>)
8004856: f000 f853 bl 8004900 <HandleUartRxCallback>
} else if (huart->Instance == USART6) {
HandleUartRxCallback (&uart6TaskData, huart, Size);
} else if (huart->Instance == UART8) {
HandleUartRxCallback (&uart8TaskData, huart, Size);
}
}
800485a: e02e b.n 80048ba <HAL_UARTEx_RxEventCallback+0x82>
} else if (huart->Instance == USART2) {
800485c: 687b ldr r3, [r7, #4]
800485e: 681b ldr r3, [r3, #0]
8004860: 4a1a ldr r2, [pc, #104] @ (80048cc <HAL_UARTEx_RxEventCallback+0x94>)
8004862: 4293 cmp r3, r2
8004864: d106 bne.n 8004874 <HAL_UARTEx_RxEventCallback+0x3c>
HandleUartRxCallback (&uart2TaskData, huart, Size);
8004866: 887b ldrh r3, [r7, #2]
8004868: 461a mov r2, r3
800486a: 6879 ldr r1, [r7, #4]
800486c: 4818 ldr r0, [pc, #96] @ (80048d0 <HAL_UARTEx_RxEventCallback+0x98>)
800486e: f000 f847 bl 8004900 <HandleUartRxCallback>
}
8004872: e022 b.n 80048ba <HAL_UARTEx_RxEventCallback+0x82>
} else if (huart->Instance == USART3) {
8004874: 687b ldr r3, [r7, #4]
8004876: 681b ldr r3, [r3, #0]
8004878: 4a16 ldr r2, [pc, #88] @ (80048d4 <HAL_UARTEx_RxEventCallback+0x9c>)
800487a: 4293 cmp r3, r2
800487c: d106 bne.n 800488c <HAL_UARTEx_RxEventCallback+0x54>
HandleUartRxCallback (&uart3TaskData, huart, Size);
800487e: 887b ldrh r3, [r7, #2]
8004880: 461a mov r2, r3
8004882: 6879 ldr r1, [r7, #4]
8004884: 4814 ldr r0, [pc, #80] @ (80048d8 <HAL_UARTEx_RxEventCallback+0xa0>)
8004886: f000 f83b bl 8004900 <HandleUartRxCallback>
}
800488a: e016 b.n 80048ba <HAL_UARTEx_RxEventCallback+0x82>
} else if (huart->Instance == USART6) {
800488c: 687b ldr r3, [r7, #4]
800488e: 681b ldr r3, [r3, #0]
8004890: 4a12 ldr r2, [pc, #72] @ (80048dc <HAL_UARTEx_RxEventCallback+0xa4>)
8004892: 4293 cmp r3, r2
8004894: d106 bne.n 80048a4 <HAL_UARTEx_RxEventCallback+0x6c>
HandleUartRxCallback (&uart6TaskData, huart, Size);
8004896: 887b ldrh r3, [r7, #2]
8004898: 461a mov r2, r3
800489a: 6879 ldr r1, [r7, #4]
800489c: 4810 ldr r0, [pc, #64] @ (80048e0 <HAL_UARTEx_RxEventCallback+0xa8>)
800489e: f000 f82f bl 8004900 <HandleUartRxCallback>
}
80048a2: e00a b.n 80048ba <HAL_UARTEx_RxEventCallback+0x82>
} else if (huart->Instance == UART8) {
80048a4: 687b ldr r3, [r7, #4]
80048a6: 681b ldr r3, [r3, #0]
80048a8: 4a0e ldr r2, [pc, #56] @ (80048e4 <HAL_UARTEx_RxEventCallback+0xac>)
80048aa: 4293 cmp r3, r2
80048ac: d105 bne.n 80048ba <HAL_UARTEx_RxEventCallback+0x82>
HandleUartRxCallback (&uart8TaskData, huart, Size);
80048ae: 887b ldrh r3, [r7, #2]
80048b0: 461a mov r2, r3
80048b2: 6879 ldr r1, [r7, #4]
80048b4: 480c ldr r0, [pc, #48] @ (80048e8 <HAL_UARTEx_RxEventCallback+0xb0>)
80048b6: f000 f823 bl 8004900 <HandleUartRxCallback>
}
80048ba: bf00 nop
80048bc: 3708 adds r7, #8
80048be: 46bd mov sp, r7
80048c0: bd80 pop {r7, pc}
80048c2: bf00 nop
80048c4: 40011000 .word 0x40011000
80048c8: 24001efc .word 0x24001efc
80048cc: 40004400 .word 0x40004400
80048d0: 24001fa4 .word 0x24001fa4
80048d4: 40004800 .word 0x40004800
80048d8: 24001f34 .word 0x24001f34
80048dc: 40011400 .word 0x40011400
80048e0: 24001f6c .word 0x24001f6c
80048e4: 40007c00 .word 0x40007c00
80048e8: 24001fdc .word 0x24001fdc
080048ec <HAL_UART_TxCpltCallback>:
void HAL_UART_TxCpltCallback (UART_HandleTypeDef* huart) {
80048ec: b480 push {r7}
80048ee: b083 sub sp, #12
80048f0: af00 add r7, sp, #0
80048f2: 6078 str r0, [r7, #4]
if (huart->Instance == UART8) {
}
}
80048f4: bf00 nop
80048f6: 370c adds r7, #12
80048f8: 46bd mov sp, r7
80048fa: f85d 7b04 ldr.w r7, [sp], #4
80048fe: 4770 bx lr
08004900 <HandleUartRxCallback>:
void HandleUartRxCallback (UartTaskData* uartTaskData, UART_HandleTypeDef* huart, uint16_t Size) {
8004900: b580 push {r7, lr}
8004902: b088 sub sp, #32
8004904: af02 add r7, sp, #8
8004906: 60f8 str r0, [r7, #12]
8004908: 60b9 str r1, [r7, #8]
800490a: 4613 mov r3, r2
800490c: 80fb strh r3, [r7, #6]
BaseType_t pxHigherPriorityTaskWoken = pdFALSE;
800490e: 2300 movs r3, #0
8004910: 617b str r3, [r7, #20]
osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
8004912: 68fb ldr r3, [r7, #12]
8004914: 6a1b ldr r3, [r3, #32]
8004916: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
800491a: 4618 mov r0, r3
800491c: f00d f81b bl 8011956 <osMutexAcquire>
memcpy (&(uartTaskData->frameData[uartTaskData->frameBytesCount]), uartTaskData->uartRxBuffer, Size);
8004920: 68fb ldr r3, [r7, #12]
8004922: 691b ldr r3, [r3, #16]
8004924: 68fa ldr r2, [r7, #12]
8004926: 8ad2 ldrh r2, [r2, #22]
8004928: 1898 adds r0, r3, r2
800492a: 68fb ldr r3, [r7, #12]
800492c: 681b ldr r3, [r3, #0]
800492e: 88fa ldrh r2, [r7, #6]
8004930: 4619 mov r1, r3
8004932: f026 fb04 bl 802af3e <memcpy>
uartTaskData->frameBytesCount += Size;
8004936: 68fb ldr r3, [r7, #12]
8004938: 8ada ldrh r2, [r3, #22]
800493a: 88fb ldrh r3, [r7, #6]
800493c: 4413 add r3, r2
800493e: b29a uxth r2, r3
8004940: 68fb ldr r3, [r7, #12]
8004942: 82da strh r2, [r3, #22]
osMutexRelease (uartTaskData->rxDataBufferMutex);
8004944: 68fb ldr r3, [r7, #12]
8004946: 6a1b ldr r3, [r3, #32]
8004948: 4618 mov r0, r3
800494a: f00d f84f bl 80119ec <osMutexRelease>
xTaskNotifyFromISR (uartTaskData->uartRecieveTaskHandle, Size, eSetValueWithOverwrite, &pxHigherPriorityTaskWoken);
800494e: 68fb ldr r3, [r7, #12]
8004950: 6998 ldr r0, [r3, #24]
8004952: 88f9 ldrh r1, [r7, #6]
8004954: f107 0314 add.w r3, r7, #20
8004958: 9300 str r3, [sp, #0]
800495a: 2300 movs r3, #0
800495c: 2203 movs r2, #3
800495e: f010 fa3d bl 8014ddc <xTaskGenericNotifyFromISR>
// HAL_UARTEx_ReceiveToIdle_DMA(huart, uart8RxBuffer, UART8_RX_BUFF_SIZE);
// __HAL_DMA_DISABLE_IT(&hdma_uart8_rx, DMA_IT_HT);
HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
8004962: 68fb ldr r3, [r7, #12]
8004964: 6b18 ldr r0, [r3, #48] @ 0x30
8004966: 68fb ldr r3, [r7, #12]
8004968: 6819 ldr r1, [r3, #0]
800496a: 68fb ldr r3, [r7, #12]
800496c: 889b ldrh r3, [r3, #4]
800496e: 461a mov r2, r3
8004970: f00b fdc7 bl 8010502 <HAL_UARTEx_ReceiveToIdle_IT>
portEND_SWITCHING_ISR (pxHigherPriorityTaskWoken);
8004974: 697b ldr r3, [r7, #20]
8004976: 2b00 cmp r3, #0
8004978: d007 beq.n 800498a <HandleUartRxCallback+0x8a>
800497a: 4b06 ldr r3, [pc, #24] @ (8004994 <HandleUartRxCallback+0x94>)
800497c: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8004980: 601a str r2, [r3, #0]
8004982: f3bf 8f4f dsb sy
8004986: f3bf 8f6f isb sy
}
800498a: bf00 nop
800498c: 3718 adds r7, #24
800498e: 46bd mov sp, r7
8004990: bd80 pop {r7, pc}
8004992: bf00 nop
8004994: e000ed04 .word 0xe000ed04
08004998 <UartRxTask>:
void UartRxTask (void* argument) {
8004998: b580 push {r7, lr}
800499a: b0d2 sub sp, #328 @ 0x148
800499c: af02 add r7, sp, #8
800499e: f507 73a0 add.w r3, r7, #320 @ 0x140
80049a2: f5a3 739e sub.w r3, r3, #316 @ 0x13c
80049a6: 6018 str r0, [r3, #0]
UartTaskData* uartTaskData = (UartTaskData*)argument;
80049a8: f507 73a0 add.w r3, r7, #320 @ 0x140
80049ac: f5a3 739e sub.w r3, r3, #316 @ 0x13c
80049b0: 681b ldr r3, [r3, #0]
80049b2: f8c7 312c str.w r3, [r7, #300] @ 0x12c
SerialProtocolFrameData spFrameData = { 0 };
80049b6: f507 73a0 add.w r3, r7, #320 @ 0x140
80049ba: f5a3 7398 sub.w r3, r3, #304 @ 0x130
80049be: 4618 mov r0, r3
80049c0: f44f 7386 mov.w r3, #268 @ 0x10c
80049c4: 461a mov r2, r3
80049c6: 2100 movs r1, #0
80049c8: f026 f9c2 bl 802ad50 <memset>
uint32_t bytesRec = 0;
80049cc: f507 73a0 add.w r3, r7, #320 @ 0x140
80049d0: f5a3 739a sub.w r3, r3, #308 @ 0x134
80049d4: 2200 movs r2, #0
80049d6: 601a str r2, [r3, #0]
uint32_t crc = 0;
80049d8: 2300 movs r3, #0
80049da: f8c7 3128 str.w r3, [r7, #296] @ 0x128
uint16_t frameCommandRaw = 0x0000;
80049de: 2300 movs r3, #0
80049e0: f8a7 3126 strh.w r3, [r7, #294] @ 0x126
uint16_t frameBytesCount = 0;
80049e4: 2300 movs r3, #0
80049e6: f8a7 3124 strh.w r3, [r7, #292] @ 0x124
uint16_t frameCrc = 0;
80049ea: 2300 movs r3, #0
80049ec: f8a7 3122 strh.w r3, [r7, #290] @ 0x122
uint16_t frameTotalLength = 0;
80049f0: 2300 movs r3, #0
80049f2: f8a7 313e strh.w r3, [r7, #318] @ 0x13e
uint16_t dataToSend = 0;
80049f6: 2300 movs r3, #0
80049f8: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
portBASE_TYPE crcPass = pdFAIL;
80049fc: 2300 movs r3, #0
80049fe: f8c7 3138 str.w r3, [r7, #312] @ 0x138
portBASE_TYPE proceed = pdFALSE;
8004a02: 2300 movs r3, #0
8004a04: f8c7 3134 str.w r3, [r7, #308] @ 0x134
portBASE_TYPE frameTimeout = pdFAIL;
8004a08: 2300 movs r3, #0
8004a0a: f8c7 311c str.w r3, [r7, #284] @ 0x11c
enum SerialReceiverStates receverState = srWaitForHeader;
8004a0e: 2300 movs r3, #0
8004a10: f887 3133 strb.w r3, [r7, #307] @ 0x133
uartTaskData->rxDataBufferMutex = osMutexNew (NULL);
8004a14: 2000 movs r0, #0
8004a16: f00c ff18 bl 801184a <osMutexNew>
8004a1a: 4602 mov r2, r0
8004a1c: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004a20: 621a str r2, [r3, #32]
HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
8004a22: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004a26: 6b18 ldr r0, [r3, #48] @ 0x30
8004a28: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004a2c: 6819 ldr r1, [r3, #0]
8004a2e: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004a32: 889b ldrh r3, [r3, #4]
8004a34: 461a mov r2, r3
8004a36: f00b fd64 bl 8010502 <HAL_UARTEx_ReceiveToIdle_IT>
while (pdTRUE) {
frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
8004a3a: f107 020c add.w r2, r7, #12
8004a3e: f44f 63fa mov.w r3, #2000 @ 0x7d0
8004a42: 2100 movs r1, #0
8004a44: 2000 movs r0, #0
8004a46: f010 f8a7 bl 8014b98 <xTaskNotifyWait>
8004a4a: 4603 mov r3, r0
8004a4c: 2b00 cmp r3, #0
8004a4e: bf0c ite eq
8004a50: 2301 moveq r3, #1
8004a52: 2300 movne r3, #0
8004a54: b2db uxtb r3, r3
8004a56: f8c7 311c str.w r3, [r7, #284] @ 0x11c
osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
8004a5a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004a5e: 6a1b ldr r3, [r3, #32]
8004a60: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8004a64: 4618 mov r0, r3
8004a66: f00c ff76 bl 8011956 <osMutexAcquire>
frameBytesCount = uartTaskData->frameBytesCount;
8004a6a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004a6e: 8adb ldrh r3, [r3, #22]
8004a70: f8a7 3124 strh.w r3, [r7, #292] @ 0x124
osMutexRelease (uartTaskData->rxDataBufferMutex);
8004a74: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004a78: 6a1b ldr r3, [r3, #32]
8004a7a: 4618 mov r0, r3
8004a7c: f00c ffb6 bl 80119ec <osMutexRelease>
if ((frameTimeout == pdTRUE) && (frameBytesCount > 0)) {
8004a80: f8d7 311c ldr.w r3, [r7, #284] @ 0x11c
8004a84: 2b01 cmp r3, #1
8004a86: d10a bne.n 8004a9e <UartRxTask+0x106>
8004a88: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
8004a8c: 2b00 cmp r3, #0
8004a8e: d006 beq.n 8004a9e <UartRxTask+0x106>
receverState = srFail;
8004a90: 2304 movs r3, #4
8004a92: f887 3133 strb.w r3, [r7, #307] @ 0x133
proceed = pdTRUE;
8004a96: 2301 movs r3, #1
8004a98: f8c7 3134 str.w r3, [r7, #308] @ 0x134
8004a9c: e029 b.n 8004af2 <UartRxTask+0x15a>
} else {
if (frameTimeout == pdFALSE) {
8004a9e: f8d7 311c ldr.w r3, [r7, #284] @ 0x11c
8004aa2: 2b00 cmp r3, #0
8004aa4: d111 bne.n 8004aca <UartRxTask+0x132>
proceed = pdTRUE;
8004aa6: 2301 movs r3, #1
8004aa8: f8c7 3134 str.w r3, [r7, #308] @ 0x134
printf ("Uart%d: RX bytes received: %ld\n", uartTaskData->uartNumber, bytesRec);
8004aac: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004ab0: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8004ab4: 4619 mov r1, r3
8004ab6: f507 73a0 add.w r3, r7, #320 @ 0x140
8004aba: f5a3 739a sub.w r3, r3, #308 @ 0x134
8004abe: 681b ldr r3, [r3, #0]
8004ac0: 461a mov r2, r3
8004ac2: 48c1 ldr r0, [pc, #772] @ (8004dc8 <UartRxTask+0x430>)
8004ac4: f025 ffb2 bl 802aa2c <iprintf>
8004ac8: e22f b.n 8004f2a <UartRxTask+0x592>
} else {
if (uartTaskData->huart->RxState == HAL_UART_STATE_READY) {
8004aca: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004ace: 6b1b ldr r3, [r3, #48] @ 0x30
8004ad0: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
8004ad4: 2b20 cmp r3, #32
8004ad6: f040 8228 bne.w 8004f2a <UartRxTask+0x592>
HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
8004ada: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004ade: 6b18 ldr r0, [r3, #48] @ 0x30
8004ae0: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004ae4: 6819 ldr r1, [r3, #0]
8004ae6: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004aea: 889b ldrh r3, [r3, #4]
8004aec: 461a mov r2, r3
8004aee: f00b fd08 bl 8010502 <HAL_UARTEx_ReceiveToIdle_IT>
}
}
}
while (proceed) {
8004af2: e21a b.n 8004f2a <UartRxTask+0x592>
switch (receverState) {
8004af4: f897 3133 ldrb.w r3, [r7, #307] @ 0x133
8004af8: 2b04 cmp r3, #4
8004afa: f200 81f1 bhi.w 8004ee0 <UartRxTask+0x548>
8004afe: a201 add r2, pc, #4 @ (adr r2, 8004b04 <UartRxTask+0x16c>)
8004b00: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004b04: 08004b19 .word 0x08004b19
8004b08: 08004c7b .word 0x08004c7b
8004b0c: 08004c5f .word 0x08004c5f
8004b10: 08004d1b .word 0x08004d1b
8004b14: 08004dd5 .word 0x08004dd5
case srWaitForHeader:
osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
8004b18: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004b1c: 6a1b ldr r3, [r3, #32]
8004b1e: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8004b22: 4618 mov r0, r3
8004b24: f00c ff17 bl 8011956 <osMutexAcquire>
if (uartTaskData->frameData[0] == FRAME_INDICATOR) {
8004b28: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004b2c: 691b ldr r3, [r3, #16]
8004b2e: 781b ldrb r3, [r3, #0]
8004b30: 2baa cmp r3, #170 @ 0xaa
8004b32: f040 8082 bne.w 8004c3a <UartRxTask+0x2a2>
if (frameBytesCount > FRAME_ID_LENGTH) {
8004b36: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
8004b3a: 2b02 cmp r3, #2
8004b3c: d914 bls.n 8004b68 <UartRxTask+0x1d0>
spFrameData.frameHeader.frameId =
CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_ID_LENGTH - FRAME_COMMAND_LENGTH]));
8004b3e: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004b42: 691b ldr r3, [r3, #16]
8004b44: 3302 adds r3, #2
8004b46: 781b ldrb r3, [r3, #0]
8004b48: 021b lsls r3, r3, #8
8004b4a: b21a sxth r2, r3
8004b4c: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004b50: 691b ldr r3, [r3, #16]
8004b52: 3301 adds r3, #1
8004b54: 781b ldrb r3, [r3, #0]
8004b56: b21b sxth r3, r3
8004b58: 4313 orrs r3, r2
8004b5a: b21b sxth r3, r3
8004b5c: b29a uxth r2, r3
spFrameData.frameHeader.frameId =
8004b5e: f507 73a0 add.w r3, r7, #320 @ 0x140
8004b62: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004b66: 801a strh r2, [r3, #0]
}
if (frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH) {
8004b68: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
8004b6c: 2b04 cmp r3, #4
8004b6e: d923 bls.n 8004bb8 <UartRxTask+0x220>
frameCommandRaw = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_COMMAND_LENGTH]));
8004b70: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004b74: 691b ldr r3, [r3, #16]
8004b76: 3304 adds r3, #4
8004b78: 781b ldrb r3, [r3, #0]
8004b7a: 021b lsls r3, r3, #8
8004b7c: b21a sxth r2, r3
8004b7e: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004b82: 691b ldr r3, [r3, #16]
8004b84: 3303 adds r3, #3
8004b86: 781b ldrb r3, [r3, #0]
8004b88: b21b sxth r3, r3
8004b8a: 4313 orrs r3, r2
8004b8c: b21b sxth r3, r3
8004b8e: f8a7 3126 strh.w r3, [r7, #294] @ 0x126
spFrameData.frameHeader.frameCommand = (SerialProtocolCommands)(frameCommandRaw & 0x7FFF);
8004b92: f8b7 3126 ldrh.w r3, [r7, #294] @ 0x126
8004b96: b2da uxtb r2, r3
8004b98: f507 73a0 add.w r3, r7, #320 @ 0x140
8004b9c: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004ba0: 709a strb r2, [r3, #2]
spFrameData.frameHeader.isResponseFrame = (frameCommandRaw & 0x8000) != 0 ? pdTRUE : pdFALSE;
8004ba2: f9b7 3126 ldrsh.w r3, [r7, #294] @ 0x126
8004ba6: 13db asrs r3, r3, #15
8004ba8: b21b sxth r3, r3
8004baa: f003 0201 and.w r2, r3, #1
8004bae: f507 73a0 add.w r3, r7, #320 @ 0x140
8004bb2: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004bb6: 609a str r2, [r3, #8]
}
if ((frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH) && ((spFrameData.frameHeader.frameCommand & 0x8000) != 0)) {
8004bb8: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
8004bbc: 2b05 cmp r3, #5
8004bbe: d913 bls.n 8004be8 <UartRxTask+0x250>
8004bc0: f507 73a0 add.w r3, r7, #320 @ 0x140
8004bc4: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004bc8: 789b ldrb r3, [r3, #2]
8004bca: f403 4300 and.w r3, r3, #32768 @ 0x8000
8004bce: 2b00 cmp r3, #0
8004bd0: d00a beq.n 8004be8 <UartRxTask+0x250>
spFrameData.frameHeader.respStatus = (SerialProtocolRespStatus)(uartTaskData->frameData[FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH]);
8004bd2: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004bd6: 691b ldr r3, [r3, #16]
8004bd8: 3305 adds r3, #5
8004bda: 781b ldrb r3, [r3, #0]
8004bdc: b25a sxtb r2, r3
8004bde: f507 73a0 add.w r3, r7, #320 @ 0x140
8004be2: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004be6: 70da strb r2, [r3, #3]
}
if (frameBytesCount >= FRAME_HEADER_LENGTH) {
8004be8: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
8004bec: 2b07 cmp r3, #7
8004bee: d920 bls.n 8004c32 <UartRxTask+0x29a>
spFrameData.frameHeader.frameDataLength = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH]));
8004bf0: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004bf4: 691b ldr r3, [r3, #16]
8004bf6: 3306 adds r3, #6
8004bf8: 781b ldrb r3, [r3, #0]
8004bfa: 021b lsls r3, r3, #8
8004bfc: b21a sxth r2, r3
8004bfe: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004c02: 691b ldr r3, [r3, #16]
8004c04: 3305 adds r3, #5
8004c06: 781b ldrb r3, [r3, #0]
8004c08: b21b sxth r3, r3
8004c0a: 4313 orrs r3, r2
8004c0c: b21b sxth r3, r3
8004c0e: b29a uxth r2, r3
8004c10: f507 73a0 add.w r3, r7, #320 @ 0x140
8004c14: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004c18: 809a strh r2, [r3, #4]
frameTotalLength = FRAME_HEADER_LENGTH + spFrameData.frameHeader.frameDataLength + FRAME_CRC_LENGTH;
8004c1a: f507 73a0 add.w r3, r7, #320 @ 0x140
8004c1e: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004c22: 889b ldrh r3, [r3, #4]
8004c24: 330a adds r3, #10
8004c26: f8a7 313e strh.w r3, [r7, #318] @ 0x13e
receverState = srRecieveData;
8004c2a: 2302 movs r3, #2
8004c2c: f887 3133 strb.w r3, [r7, #307] @ 0x133
8004c30: e00e b.n 8004c50 <UartRxTask+0x2b8>
} else {
proceed = pdFALSE;
8004c32: 2300 movs r3, #0
8004c34: f8c7 3134 str.w r3, [r7, #308] @ 0x134
8004c38: e00a b.n 8004c50 <UartRxTask+0x2b8>
}
} else {
if (frameBytesCount > 0) {
8004c3a: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
8004c3e: 2b00 cmp r3, #0
8004c40: d003 beq.n 8004c4a <UartRxTask+0x2b2>
receverState = srFail;
8004c42: 2304 movs r3, #4
8004c44: f887 3133 strb.w r3, [r7, #307] @ 0x133
8004c48: e002 b.n 8004c50 <UartRxTask+0x2b8>
} else {
proceed = pdFALSE;
8004c4a: 2300 movs r3, #0
8004c4c: f8c7 3134 str.w r3, [r7, #308] @ 0x134
}
}
osMutexRelease (uartTaskData->rxDataBufferMutex);
8004c50: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004c54: 6a1b ldr r3, [r3, #32]
8004c56: 4618 mov r0, r3
8004c58: f00c fec8 bl 80119ec <osMutexRelease>
break;
8004c5c: e165 b.n 8004f2a <UartRxTask+0x592>
case srRecieveData:
if (frameBytesCount >= frameTotalLength) {
8004c5e: f8b7 2124 ldrh.w r2, [r7, #292] @ 0x124
8004c62: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
8004c66: 429a cmp r2, r3
8004c68: d303 bcc.n 8004c72 <UartRxTask+0x2da>
receverState = srCheckCrc;
8004c6a: 2301 movs r3, #1
8004c6c: f887 3133 strb.w r3, [r7, #307] @ 0x133
} else {
proceed = pdFALSE;
}
break;
8004c70: e15b b.n 8004f2a <UartRxTask+0x592>
proceed = pdFALSE;
8004c72: 2300 movs r3, #0
8004c74: f8c7 3134 str.w r3, [r7, #308] @ 0x134
break;
8004c78: e157 b.n 8004f2a <UartRxTask+0x592>
case srCheckCrc:
osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
8004c7a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004c7e: 6a1b ldr r3, [r3, #32]
8004c80: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8004c84: 4618 mov r0, r3
8004c86: f00c fe66 bl 8011956 <osMutexAcquire>
frameCrc = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[frameTotalLength - FRAME_CRC_LENGTH]));
8004c8a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004c8e: 691a ldr r2, [r3, #16]
8004c90: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
8004c94: 3b01 subs r3, #1
8004c96: 4413 add r3, r2
8004c98: 781b ldrb r3, [r3, #0]
8004c9a: 021b lsls r3, r3, #8
8004c9c: b21a sxth r2, r3
8004c9e: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004ca2: 6919 ldr r1, [r3, #16]
8004ca4: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
8004ca8: 3b02 subs r3, #2
8004caa: 440b add r3, r1
8004cac: 781b ldrb r3, [r3, #0]
8004cae: b21b sxth r3, r3
8004cb0: 4313 orrs r3, r2
8004cb2: b21b sxth r3, r3
8004cb4: f8a7 3122 strh.w r3, [r7, #290] @ 0x122
crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)(uartTaskData->frameData), frameTotalLength - FRAME_CRC_LENGTH);
8004cb8: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004cbc: 6919 ldr r1, [r3, #16]
8004cbe: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
8004cc2: 3b02 subs r3, #2
8004cc4: 461a mov r2, r3
8004cc6: 4841 ldr r0, [pc, #260] @ (8004dcc <UartRxTask+0x434>)
8004cc8: f001 f88a bl 8005de0 <HAL_CRC_Calculate>
8004ccc: f8c7 0128 str.w r0, [r7, #296] @ 0x128
osMutexRelease (uartTaskData->rxDataBufferMutex);
8004cd0: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004cd4: 6a1b ldr r3, [r3, #32]
8004cd6: 4618 mov r0, r3
8004cd8: f00c fe88 bl 80119ec <osMutexRelease>
crcPass = frameCrc == crc;
8004cdc: f8b7 3122 ldrh.w r3, [r7, #290] @ 0x122
8004ce0: f8d7 2128 ldr.w r2, [r7, #296] @ 0x128
8004ce4: 429a cmp r2, r3
8004ce6: bf0c ite eq
8004ce8: 2301 moveq r3, #1
8004cea: 2300 movne r3, #0
8004cec: b2db uxtb r3, r3
8004cee: f8c7 3138 str.w r3, [r7, #312] @ 0x138
if (crcPass) {
8004cf2: f8d7 3138 ldr.w r3, [r7, #312] @ 0x138
8004cf6: 2b00 cmp r3, #0
8004cf8: d00b beq.n 8004d12 <UartRxTask+0x37a>
printf ("Uart%d: Frame CRC PASS\n", uartTaskData->uartNumber);
8004cfa: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004cfe: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8004d02: 4619 mov r1, r3
8004d04: 4832 ldr r0, [pc, #200] @ (8004dd0 <UartRxTask+0x438>)
8004d06: f025 fe91 bl 802aa2c <iprintf>
receverState = srExecuteCmd;
8004d0a: 2303 movs r3, #3
8004d0c: f887 3133 strb.w r3, [r7, #307] @ 0x133
} else {
receverState = srFail;
}
break;
8004d10: e10b b.n 8004f2a <UartRxTask+0x592>
receverState = srFail;
8004d12: 2304 movs r3, #4
8004d14: f887 3133 strb.w r3, [r7, #307] @ 0x133
break;
8004d18: e107 b.n 8004f2a <UartRxTask+0x592>
case srExecuteCmd:
if ((uartTaskData->processDataCb != NULL) || (uartTaskData->processRxDataMsgBuffer != NULL)) {
8004d1a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004d1e: 6a9b ldr r3, [r3, #40] @ 0x28
8004d20: 2b00 cmp r3, #0
8004d22: d104 bne.n 8004d2e <UartRxTask+0x396>
8004d24: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004d28: 6a5b ldr r3, [r3, #36] @ 0x24
8004d2a: 2b00 cmp r3, #0
8004d2c: d01e beq.n 8004d6c <UartRxTask+0x3d4>
osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
8004d2e: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004d32: 6a1b ldr r3, [r3, #32]
8004d34: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8004d38: 4618 mov r0, r3
8004d3a: f00c fe0c bl 8011956 <osMutexAcquire>
memcpy (spFrameData.dataBuffer, &(uartTaskData->frameData[FRAME_HEADER_LENGTH]), spFrameData.frameHeader.frameDataLength);
8004d3e: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004d42: 691b ldr r3, [r3, #16]
8004d44: f103 0108 add.w r1, r3, #8
8004d48: f507 73a0 add.w r3, r7, #320 @ 0x140
8004d4c: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004d50: 889b ldrh r3, [r3, #4]
8004d52: 461a mov r2, r3
8004d54: f107 0310 add.w r3, r7, #16
8004d58: 330c adds r3, #12
8004d5a: 4618 mov r0, r3
8004d5c: f026 f8ef bl 802af3e <memcpy>
osMutexRelease (uartTaskData->rxDataBufferMutex);
8004d60: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004d64: 6a1b ldr r3, [r3, #32]
8004d66: 4618 mov r0, r3
8004d68: f00c fe40 bl 80119ec <osMutexRelease>
}
if (uartTaskData->processRxDataMsgBuffer != NULL) {
8004d6c: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004d70: 6a5b ldr r3, [r3, #36] @ 0x24
8004d72: 2b00 cmp r3, #0
8004d74: d015 beq.n 8004da2 <UartRxTask+0x40a>
if(xMessageBufferSend (uartTaskData->processRxDataMsgBuffer, &spFrameData, sizeof (SerialProtocolFrameHeader) + spFrameData.frameHeader.frameDataLength, pdMS_TO_TICKS (200)) == pdFALSE)
8004d76: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004d7a: 6a58 ldr r0, [r3, #36] @ 0x24
8004d7c: f507 73a0 add.w r3, r7, #320 @ 0x140
8004d80: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004d84: 889b ldrh r3, [r3, #4]
8004d86: f103 020c add.w r2, r3, #12
8004d8a: f107 0110 add.w r1, r7, #16
8004d8e: 23c8 movs r3, #200 @ 0xc8
8004d90: f00e fbbe bl 8013510 <xStreamBufferSend>
8004d94: 4603 mov r3, r0
8004d96: 2b00 cmp r3, #0
8004d98: d103 bne.n 8004da2 <UartRxTask+0x40a>
{
receverState = srFail;
8004d9a: 2304 movs r3, #4
8004d9c: f887 3133 strb.w r3, [r7, #307] @ 0x133
break;
8004da0: e0c3 b.n 8004f2a <UartRxTask+0x592>
}
}
if (uartTaskData->processDataCb != NULL) {
8004da2: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004da6: 6a9b ldr r3, [r3, #40] @ 0x28
8004da8: 2b00 cmp r3, #0
8004daa: d008 beq.n 8004dbe <UartRxTask+0x426>
uartTaskData->processDataCb (uartTaskData, &spFrameData);
8004dac: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004db0: 6a9b ldr r3, [r3, #40] @ 0x28
8004db2: f107 0210 add.w r2, r7, #16
8004db6: 4611 mov r1, r2
8004db8: f8d7 012c ldr.w r0, [r7, #300] @ 0x12c
8004dbc: 4798 blx r3
}
receverState = srFinish;
8004dbe: 2305 movs r3, #5
8004dc0: f887 3133 strb.w r3, [r7, #307] @ 0x133
break;
8004dc4: e0b1 b.n 8004f2a <UartRxTask+0x592>
8004dc6: bf00 nop
8004dc8: 0802db2c .word 0x0802db2c
8004dcc: 24000248 .word 0x24000248
8004dd0: 0802db4c .word 0x0802db4c
case srFail:
dataToSend = 0;
8004dd4: 2300 movs r3, #0
8004dd6: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
if ((frameTimeout == pdTRUE) && (frameBytesCount > 2)) {
8004dda: f8d7 311c ldr.w r3, [r7, #284] @ 0x11c
8004dde: 2b01 cmp r3, #1
8004de0: d124 bne.n 8004e2c <UartRxTask+0x494>
8004de2: f8b7 3124 ldrh.w r3, [r7, #292] @ 0x124
8004de6: 2b02 cmp r3, #2
8004de8: d920 bls.n 8004e2c <UartRxTask+0x494>
dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spTimeout, NULL, 0);
8004dea: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004dee: 6898 ldr r0, [r3, #8]
8004df0: f507 73a0 add.w r3, r7, #320 @ 0x140
8004df4: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004df8: 8819 ldrh r1, [r3, #0]
8004dfa: f507 73a0 add.w r3, r7, #320 @ 0x140
8004dfe: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004e02: 789a ldrb r2, [r3, #2]
8004e04: 2300 movs r3, #0
8004e06: 9301 str r3, [sp, #4]
8004e08: 2300 movs r3, #0
8004e0a: 9300 str r3, [sp, #0]
8004e0c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8004e10: f7fe fdf6 bl 8003a00 <PrepareRespFrame>
8004e14: 4603 mov r3, r0
8004e16: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
printf ("Uart%d: RX data receiver timeout!\n", uartTaskData->uartNumber);
8004e1a: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004e1e: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8004e22: 4619 mov r1, r3
8004e24: 4844 ldr r0, [pc, #272] @ (8004f38 <UartRxTask+0x5a0>)
8004e26: f025 fe01 bl 802aa2c <iprintf>
8004e2a: e03c b.n 8004ea6 <UartRxTask+0x50e>
} else if (!crcPass) {
8004e2c: f8d7 3138 ldr.w r3, [r7, #312] @ 0x138
8004e30: 2b00 cmp r3, #0
8004e32: d120 bne.n 8004e76 <UartRxTask+0x4de>
dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spCrcFail, NULL, 0);
8004e34: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004e38: 6898 ldr r0, [r3, #8]
8004e3a: f507 73a0 add.w r3, r7, #320 @ 0x140
8004e3e: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004e42: 8819 ldrh r1, [r3, #0]
8004e44: f507 73a0 add.w r3, r7, #320 @ 0x140
8004e48: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004e4c: 789a ldrb r2, [r3, #2]
8004e4e: 2300 movs r3, #0
8004e50: 9301 str r3, [sp, #4]
8004e52: 2300 movs r3, #0
8004e54: 9300 str r3, [sp, #0]
8004e56: f06f 0301 mvn.w r3, #1
8004e5a: f7fe fdd1 bl 8003a00 <PrepareRespFrame>
8004e5e: 4603 mov r3, r0
8004e60: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
printf ("Uart%d: Frame CRC FAIL\n", uartTaskData->uartNumber);
8004e64: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004e68: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8004e6c: 4619 mov r1, r3
8004e6e: 4833 ldr r0, [pc, #204] @ (8004f3c <UartRxTask+0x5a4>)
8004e70: f025 fddc bl 802aa2c <iprintf>
8004e74: e017 b.n 8004ea6 <UartRxTask+0x50e>
}
else
{
dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spInternalError, NULL, 0);
8004e76: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004e7a: 6898 ldr r0, [r3, #8]
8004e7c: f507 73a0 add.w r3, r7, #320 @ 0x140
8004e80: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004e84: 8819 ldrh r1, [r3, #0]
8004e86: f507 73a0 add.w r3, r7, #320 @ 0x140
8004e8a: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004e8e: 789a ldrb r2, [r3, #2]
8004e90: 2300 movs r3, #0
8004e92: 9301 str r3, [sp, #4]
8004e94: 2300 movs r3, #0
8004e96: 9300 str r3, [sp, #0]
8004e98: f06f 0303 mvn.w r3, #3
8004e9c: f7fe fdb0 bl 8003a00 <PrepareRespFrame>
8004ea0: 4603 mov r3, r0
8004ea2: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
}
if (dataToSend > 0) {
8004ea6: f8b7 313c ldrh.w r3, [r7, #316] @ 0x13c
8004eaa: 2b00 cmp r3, #0
8004eac: d00a beq.n 8004ec4 <UartRxTask+0x52c>
HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, dataToSend);
8004eae: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004eb2: 6b18 ldr r0, [r3, #48] @ 0x30
8004eb4: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004eb8: 689b ldr r3, [r3, #8]
8004eba: f8b7 213c ldrh.w r2, [r7, #316] @ 0x13c
8004ebe: 4619 mov r1, r3
8004ec0: f008 fe4a bl 800db58 <HAL_UART_Transmit_IT>
}
printf ("Uart%d: TX bytes sent: %d\n", dataToSend, uartTaskData->uartNumber);
8004ec4: f8b7 113c ldrh.w r1, [r7, #316] @ 0x13c
8004ec8: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004ecc: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8004ed0: 461a mov r2, r3
8004ed2: 481b ldr r0, [pc, #108] @ (8004f40 <UartRxTask+0x5a8>)
8004ed4: f025 fdaa bl 802aa2c <iprintf>
receverState = srFinish;
8004ed8: 2305 movs r3, #5
8004eda: f887 3133 strb.w r3, [r7, #307] @ 0x133
break;
8004ede: e024 b.n 8004f2a <UartRxTask+0x592>
case srFinish:
default:
osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
8004ee0: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004ee4: 6a1b ldr r3, [r3, #32]
8004ee6: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8004eea: 4618 mov r0, r3
8004eec: f00c fd33 bl 8011956 <osMutexAcquire>
uartTaskData->frameBytesCount = 0;
8004ef0: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004ef4: 2200 movs r2, #0
8004ef6: 82da strh r2, [r3, #22]
osMutexRelease (uartTaskData->rxDataBufferMutex);
8004ef8: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8004efc: 6a1b ldr r3, [r3, #32]
8004efe: 4618 mov r0, r3
8004f00: f00c fd74 bl 80119ec <osMutexRelease>
spFrameData.frameHeader.frameCommand = spUnknown;
8004f04: f507 73a0 add.w r3, r7, #320 @ 0x140
8004f08: f5a3 7398 sub.w r3, r3, #304 @ 0x130
8004f0c: 2212 movs r2, #18
8004f0e: 709a strb r2, [r3, #2]
frameTotalLength = 0;
8004f10: 2300 movs r3, #0
8004f12: f8a7 313e strh.w r3, [r7, #318] @ 0x13e
outputDataBufferPos = 0;
8004f16: 4b0b ldr r3, [pc, #44] @ (8004f44 <UartRxTask+0x5ac>)
8004f18: 2200 movs r2, #0
8004f1a: 801a strh r2, [r3, #0]
receverState = srWaitForHeader;
8004f1c: 2300 movs r3, #0
8004f1e: f887 3133 strb.w r3, [r7, #307] @ 0x133
proceed = pdFALSE;
8004f22: 2300 movs r3, #0
8004f24: f8c7 3134 str.w r3, [r7, #308] @ 0x134
break;
8004f28: bf00 nop
while (proceed) {
8004f2a: f8d7 3134 ldr.w r3, [r7, #308] @ 0x134
8004f2e: 2b00 cmp r3, #0
8004f30: f47f ade0 bne.w 8004af4 <UartRxTask+0x15c>
frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
8004f34: e581 b.n 8004a3a <UartRxTask+0xa2>
8004f36: bf00 nop
8004f38: 0802db64 .word 0x0802db64
8004f3c: 0802db88 .word 0x0802db88
8004f40: 0802dba0 .word 0x0802dba0
8004f44: 24002094 .word 0x24002094
08004f48 <ReadMeasSetFromBuffer>:
}
}
}
void ReadMeasSetFromBuffer(uint8_t* buff, uint16_t* buffPos, float* dataSet)
{
8004f48: b580 push {r7, lr}
8004f4a: b086 sub sp, #24
8004f4c: af00 add r7, sp, #0
8004f4e: 60f8 str r0, [r7, #12]
8004f50: 60b9 str r1, [r7, #8]
8004f52: 607a str r2, [r7, #4]
for(uint8_t i = 0; i < 3; i++)
8004f54: 2300 movs r3, #0
8004f56: 75fb strb r3, [r7, #23]
8004f58: e00b b.n 8004f72 <ReadMeasSetFromBuffer+0x2a>
{
ReadFloatFromBuffer(buff, buffPos, &dataSet[i]);
8004f5a: 7dfb ldrb r3, [r7, #23]
8004f5c: 009b lsls r3, r3, #2
8004f5e: 687a ldr r2, [r7, #4]
8004f60: 4413 add r3, r2
8004f62: 461a mov r2, r3
8004f64: 68b9 ldr r1, [r7, #8]
8004f66: 68f8 ldr r0, [r7, #12]
8004f68: f7fe fc5b bl 8003822 <ReadFloatFromBuffer>
for(uint8_t i = 0; i < 3; i++)
8004f6c: 7dfb ldrb r3, [r7, #23]
8004f6e: 3301 adds r3, #1
8004f70: 75fb strb r3, [r7, #23]
8004f72: 7dfb ldrb r3, [r7, #23]
8004f74: 2b02 cmp r3, #2
8004f76: d9f0 bls.n 8004f5a <ReadMeasSetFromBuffer+0x12>
}
}
8004f78: bf00 nop
8004f7a: bf00 nop
8004f7c: 3718 adds r7, #24
8004f7e: 46bd mov sp, r7
8004f80: bd80 pop {r7, pc}
...
08004f84 <UartTxTask>:
void UartTxTask (void* argument) {
8004f84: b580 push {r7, lr}
8004f86: b0d4 sub sp, #336 @ 0x150
8004f88: af02 add r7, sp, #8
8004f8a: f507 73a4 add.w r3, r7, #328 @ 0x148
8004f8e: f5a3 73a2 sub.w r3, r3, #324 @ 0x144
8004f92: 6018 str r0, [r3, #0]
UartTaskData* const uartTaskData = (UartTaskData*)argument;
8004f94: f507 73a4 add.w r3, r7, #328 @ 0x148
8004f98: f5a3 73a2 sub.w r3, r3, #324 @ 0x144
8004f9c: 681b ldr r3, [r3, #0]
8004f9e: f8c7 3140 str.w r3, [r7, #320] @ 0x140
InterProcessData data = { 0 };
8004fa2: f507 738e add.w r3, r7, #284 @ 0x11c
8004fa6: 2200 movs r2, #0
8004fa8: 601a str r2, [r3, #0]
8004faa: 605a str r2, [r3, #4]
8004fac: 609a str r2, [r3, #8]
8004fae: 60da str r2, [r3, #12]
SerialProtocolFrameData frameData = { 0 };
8004fb0: f507 73a4 add.w r3, r7, #328 @ 0x148
8004fb4: f5a3 739c sub.w r3, r3, #312 @ 0x138
8004fb8: 4618 mov r0, r3
8004fba: f44f 7386 mov.w r3, #268 @ 0x10c
8004fbe: 461a mov r2, r3
8004fc0: 2100 movs r1, #0
8004fc2: f025 fec5 bl 802ad50 <memset>
size_t bytesInMsg;
uint16_t frameId = 0;
8004fc6: 2300 movs r3, #0
8004fc8: f8a7 313e strh.w r3, [r7, #318] @ 0x13e
uint32_t rndVal = 0;
8004fcc: f507 73a4 add.w r3, r7, #328 @ 0x148
8004fd0: f5a3 739e sub.w r3, r3, #316 @ 0x13c
8004fd4: 2200 movs r2, #0
8004fd6: 601a str r2, [r3, #0]
uint16_t bytesToSend = 0;
8004fd8: 2300 movs r3, #0
8004fda: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
SerialProtocolCommands frameCommand = spUnknown;
8004fde: 2312 movs r3, #18
8004fe0: f887 313b strb.w r3, [r7, #315] @ 0x13b
uint16_t inputDataBufferPos = 0;
8004fe4: f507 73a4 add.w r3, r7, #328 @ 0x148
8004fe8: f5a3 739f sub.w r3, r3, #318 @ 0x13e
8004fec: 2200 movs r2, #0
8004fee: 801a strh r2, [r3, #0]
uint8_t boardNumber = 0;
8004ff0: 2300 movs r3, #0
8004ff2: f887 3147 strb.w r3, [r7, #327] @ 0x147
while (pdTRUE) {
if (uartTaskData->sendCmdToSlaveQueue != NULL) {
8004ff6: f8d7 3140 ldr.w r3, [r7, #320] @ 0x140
8004ffa: 6adb ldr r3, [r3, #44] @ 0x2c
8004ffc: 2b00 cmp r3, #0
8004ffe: f000 82cd beq.w 800559c <UartTxTask+0x618>
osMessageQueueGet (uartTaskData->sendCmdToSlaveQueue, &data, 0, osWaitForever);
8005002: f8d7 3140 ldr.w r3, [r7, #320] @ 0x140
8005006: 6ad8 ldr r0, [r3, #44] @ 0x2c
8005008: f507 718e add.w r1, r7, #284 @ 0x11c
800500c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8005010: 2200 movs r2, #0
8005012: f00c ff3f bl 8011e94 <osMessageQueueGet>
HAL_RNG_GenerateRandomNumber (&hrng, &rndVal);
8005016: f107 030c add.w r3, r7, #12
800501a: 4619 mov r1, r3
800501c: 48c5 ldr r0, [pc, #788] @ (8005334 <UartTxTask+0x3b0>)
800501e: f008 fa27 bl 800d470 <HAL_RNG_GenerateRandomNumber>
frameId = (uint16_t)(rndVal & 0xFFFF);
8005022: f507 73a4 add.w r3, r7, #328 @ 0x148
8005026: f5a3 739e sub.w r3, r3, #316 @ 0x13c
800502a: 681b ldr r3, [r3, #0]
800502c: f8a7 313e strh.w r3, [r7, #318] @ 0x13e
frameCommand = data.spCommand;
8005030: f897 311c ldrb.w r3, [r7, #284] @ 0x11c
8005034: f887 313b strb.w r3, [r7, #315] @ 0x13b
outputDataBufferPos = 0;
8005038: 4bbf ldr r3, [pc, #764] @ (8005338 <UartTxTask+0x3b4>)
800503a: 2200 movs r2, #0
800503c: 801a strh r2, [r3, #0]
memset (outputDataBuffer, 0x00, OUTPUT_DATA_BUFF_SIZE);
800503e: 2280 movs r2, #128 @ 0x80
8005040: 2100 movs r1, #0
8005042: 48be ldr r0, [pc, #760] @ (800533c <UartTxTask+0x3b8>)
8005044: f025 fe84 bl 802ad50 <memset>
switch (frameCommand) {
8005048: f897 313b ldrb.w r3, [r7, #315] @ 0x13b
800504c: 2b11 cmp r3, #17
800504e: f200 82aa bhi.w 80055a6 <UartTxTask+0x622>
8005052: a201 add r2, pc, #4 @ (adr r2, 8005058 <UartTxTask+0xd4>)
8005054: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005058: 08005155 .word 0x08005155
800505c: 08005155 .word 0x08005155
8005060: 080050a1 .word 0x080050a1
8005064: 080050a1 .word 0x080050a1
8005068: 080050a1 .word 0x080050a1
800506c: 080050d7 .word 0x080050d7
8005070: 080050d7 .word 0x080050d7
8005074: 080050c5 .word 0x080050c5
8005078: 08005155 .word 0x08005155
800507c: 080050e9 .word 0x080050e9
8005080: 080050fb .word 0x080050fb
8005084: 0800510d .word 0x0800510d
8005088: 0800510d .word 0x0800510d
800508c: 0800510d .word 0x0800510d
8005090: 0800510d .word 0x0800510d
8005094: 08005155 .word 0x08005155
8005098: 08005143 .word 0x08005143
800509c: 08005143 .word 0x08005143
case spSetFanSpeed:
case spSetMotorXOn:
case spSetMotorYOn:
WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (uint32_t));
80050a0: f507 738e add.w r3, r7, #284 @ 0x11c
80050a4: 1d1a adds r2, r3, #4
80050a6: 2304 movs r3, #4
80050a8: 49a3 ldr r1, [pc, #652] @ (8005338 <UartTxTask+0x3b4>)
80050aa: 48a4 ldr r0, [pc, #656] @ (800533c <UartTxTask+0x3b8>)
80050ac: f7fe fb88 bl 80037c0 <WriteDataToBuffer>
WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[1], sizeof (uint32_t));
80050b0: f507 738e add.w r3, r7, #284 @ 0x11c
80050b4: f103 0208 add.w r2, r3, #8
80050b8: 2304 movs r3, #4
80050ba: 499f ldr r1, [pc, #636] @ (8005338 <UartTxTask+0x3b4>)
80050bc: 489f ldr r0, [pc, #636] @ (800533c <UartTxTask+0x3b8>)
80050be: f7fe fb7f bl 80037c0 <WriteDataToBuffer>
break;
80050c2: e048 b.n 8005156 <UartTxTask+0x1d2>
case spSetDiodeOn: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (uint32_t)); break;
80050c4: f507 738e add.w r3, r7, #284 @ 0x11c
80050c8: 1d1a adds r2, r3, #4
80050ca: 2304 movs r3, #4
80050cc: 499a ldr r1, [pc, #616] @ (8005338 <UartTxTask+0x3b4>)
80050ce: 489b ldr r0, [pc, #620] @ (800533c <UartTxTask+0x3b8>)
80050d0: f7fe fb76 bl 80037c0 <WriteDataToBuffer>
80050d4: e03f b.n 8005156 <UartTxTask+0x1d2>
case spSetmotorXMaxCurrent:
case spSetmotorYMaxCurrent: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
80050d6: f507 738e add.w r3, r7, #284 @ 0x11c
80050da: 1d1a adds r2, r3, #4
80050dc: 2304 movs r3, #4
80050de: 4996 ldr r1, [pc, #600] @ (8005338 <UartTxTask+0x3b4>)
80050e0: 4896 ldr r0, [pc, #600] @ (800533c <UartTxTask+0x3b8>)
80050e2: f7fe fb6d bl 80037c0 <WriteDataToBuffer>
80050e6: e036 b.n 8005156 <UartTxTask+0x1d2>
case spGetElectricalMeasurments:
case spGetSensorMeasurments: break;
case spClearPeakMeasurments: break;
case spSetEncoderXValue: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
80050e8: f507 738e add.w r3, r7, #284 @ 0x11c
80050ec: 1d1a adds r2, r3, #4
80050ee: 2304 movs r3, #4
80050f0: 4991 ldr r1, [pc, #580] @ (8005338 <UartTxTask+0x3b4>)
80050f2: 4892 ldr r0, [pc, #584] @ (800533c <UartTxTask+0x3b8>)
80050f4: f7fe fb64 bl 80037c0 <WriteDataToBuffer>
80050f8: e02d b.n 8005156 <UartTxTask+0x1d2>
case spSetEncoderYValue: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
80050fa: f507 738e add.w r3, r7, #284 @ 0x11c
80050fe: 1d1a adds r2, r3, #4
8005100: 2304 movs r3, #4
8005102: 498d ldr r1, [pc, #564] @ (8005338 <UartTxTask+0x3b4>)
8005104: 488d ldr r0, [pc, #564] @ (800533c <UartTxTask+0x3b8>)
8005106: f7fe fb5b bl 80037c0 <WriteDataToBuffer>
800510a: e024 b.n 8005156 <UartTxTask+0x1d2>
case spSetVoltageMeasGains:
case spSetVoltageMeasOffsets:
case spSetCurrentMeasGains:
case spSetCurrentMeasOffsets:
WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float));
800510c: f507 738e add.w r3, r7, #284 @ 0x11c
8005110: 1d1a adds r2, r3, #4
8005112: 2304 movs r3, #4
8005114: 4988 ldr r1, [pc, #544] @ (8005338 <UartTxTask+0x3b4>)
8005116: 4889 ldr r0, [pc, #548] @ (800533c <UartTxTask+0x3b8>)
8005118: f7fe fb52 bl 80037c0 <WriteDataToBuffer>
WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[1], sizeof (float));
800511c: f507 738e add.w r3, r7, #284 @ 0x11c
8005120: f103 0208 add.w r2, r3, #8
8005124: 2304 movs r3, #4
8005126: 4984 ldr r1, [pc, #528] @ (8005338 <UartTxTask+0x3b4>)
8005128: 4884 ldr r0, [pc, #528] @ (800533c <UartTxTask+0x3b8>)
800512a: f7fe fb49 bl 80037c0 <WriteDataToBuffer>
WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[2], sizeof (float));
800512e: f507 738e add.w r3, r7, #284 @ 0x11c
8005132: f103 020c add.w r2, r3, #12
8005136: 2304 movs r3, #4
8005138: 497f ldr r1, [pc, #508] @ (8005338 <UartTxTask+0x3b4>)
800513a: 4880 ldr r0, [pc, #512] @ (800533c <UartTxTask+0x3b8>)
800513c: f7fe fb40 bl 80037c0 <WriteDataToBuffer>
break;
8005140: e009 b.n 8005156 <UartTxTask+0x1d2>
case spResetSystem: break;
case spSetPositonX:
case spSetPositonY:
WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float));
8005142: f507 738e add.w r3, r7, #284 @ 0x11c
8005146: 1d1a adds r2, r3, #4
8005148: 2304 movs r3, #4
800514a: 497b ldr r1, [pc, #492] @ (8005338 <UartTxTask+0x3b4>)
800514c: 487b ldr r0, [pc, #492] @ (800533c <UartTxTask+0x3b8>)
800514e: f7fe fb37 bl 80037c0 <WriteDataToBuffer>
break;
8005152: e000 b.n 8005156 <UartTxTask+0x1d2>
case spGetSensorMeasurments: break;
8005154: bf00 nop
break;
default: continue; break;
}
bytesToSend = PrepareReqFrame (uartTaskData->uartTxBuffer, frameId, frameCommand, outputDataBuffer, outputDataBufferPos);
8005156: f8d7 3140 ldr.w r3, [r7, #320] @ 0x140
800515a: 6898 ldr r0, [r3, #8]
800515c: 4b76 ldr r3, [pc, #472] @ (8005338 <UartTxTask+0x3b4>)
800515e: 881b ldrh r3, [r3, #0]
8005160: f897 213b ldrb.w r2, [r7, #315] @ 0x13b
8005164: f8b7 113e ldrh.w r1, [r7, #318] @ 0x13e
8005168: 9300 str r3, [sp, #0]
800516a: 4b74 ldr r3, [pc, #464] @ (800533c <UartTxTask+0x3b8>)
800516c: f7fe fbb4 bl 80038d8 <PrepareReqFrame>
8005170: 4603 mov r3, r0
8005172: f8a7 313c strh.w r3, [r7, #316] @ 0x13c
HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, bytesToSend);
8005176: f8d7 3140 ldr.w r3, [r7, #320] @ 0x140
800517a: 6b18 ldr r0, [r3, #48] @ 0x30
800517c: f8d7 3140 ldr.w r3, [r7, #320] @ 0x140
8005180: 689b ldr r3, [r3, #8]
8005182: f8b7 213c ldrh.w r2, [r7, #316] @ 0x13c
8005186: 4619 mov r1, r3
8005188: f008 fce6 bl 800db58 <HAL_UART_Transmit_IT>
bytesInMsg = xMessageBufferReceive (uartTaskData->processRxDataMsgBuffer, &frameData, INPUT_DATA_BUFF_SIZE, pdMS_TO_TICKS (1000));
800518c: f8d7 3140 ldr.w r3, [r7, #320] @ 0x140
8005190: 6a58 ldr r0, [r3, #36] @ 0x24
8005192: f107 0110 add.w r1, r7, #16
8005196: f44f 737a mov.w r3, #1000 @ 0x3e8
800519a: f44f 7280 mov.w r2, #256 @ 0x100
800519e: f00e faad bl 80136fc <xStreamBufferReceive>
80051a2: f8c7 0134 str.w r0, [r7, #308] @ 0x134
for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
80051a6: 2300 movs r3, #0
80051a8: f887 3147 strb.w r3, [r7, #327] @ 0x147
80051ac: e00e b.n 80051cc <UartTxTask+0x248>
if (boardToUartNumberMap[boardNumber] == uartTaskData->uartNumber) {
80051ae: f897 3147 ldrb.w r3, [r7, #327] @ 0x147
80051b2: 4a63 ldr r2, [pc, #396] @ (8005340 <UartTxTask+0x3bc>)
80051b4: 5cd2 ldrb r2, [r2, r3]
80051b6: f8d7 3140 ldr.w r3, [r7, #320] @ 0x140
80051ba: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
80051be: 429a cmp r2, r3
80051c0: d009 beq.n 80051d6 <UartTxTask+0x252>
for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
80051c2: f897 3147 ldrb.w r3, [r7, #327] @ 0x147
80051c6: 3301 adds r3, #1
80051c8: f887 3147 strb.w r3, [r7, #327] @ 0x147
80051cc: f897 3147 ldrb.w r3, [r7, #327] @ 0x147
80051d0: 2b03 cmp r3, #3
80051d2: d9ec bls.n 80051ae <UartTxTask+0x22a>
80051d4: e000 b.n 80051d8 <UartTxTask+0x254>
break;
80051d6: bf00 nop
}
}
if (bytesInMsg == 0) {
80051d8: f8d7 3134 ldr.w r3, [r7, #308] @ 0x134
80051dc: 2b00 cmp r3, #0
80051de: d124 bne.n 800522a <UartTxTask+0x2a6>
if (frameCommand == spGetElectricalMeasurments) {
80051e0: f897 313b ldrb.w r3, [r7, #315] @ 0x13b
80051e4: 2b00 cmp r3, #0
80051e6: d114 bne.n 8005212 <UartTxTask+0x28e>
osMutexAcquire (resMeasurementsMutex, osWaitForever);
80051e8: 4b56 ldr r3, [pc, #344] @ (8005344 <UartTxTask+0x3c0>)
80051ea: 681b ldr r3, [r3, #0]
80051ec: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
80051f0: 4618 mov r0, r3
80051f2: f00c fbb0 bl 8011956 <osMutexAcquire>
slaveLastSeen[boardNumber]++;
80051f6: f897 3147 ldrb.w r3, [r7, #327] @ 0x147
80051fa: 4a53 ldr r2, [pc, #332] @ (8005348 <UartTxTask+0x3c4>)
80051fc: f852 2023 ldr.w r2, [r2, r3, lsl #2]
8005200: 3201 adds r2, #1
8005202: 4951 ldr r1, [pc, #324] @ (8005348 <UartTxTask+0x3c4>)
8005204: f841 2023 str.w r2, [r1, r3, lsl #2]
osMutexRelease (resMeasurementsMutex);
8005208: 4b4e ldr r3, [pc, #312] @ (8005344 <UartTxTask+0x3c0>)
800520a: 681b ldr r3, [r3, #0]
800520c: 4618 mov r0, r3
800520e: f00c fbed bl 80119ec <osMutexRelease>
}
printf ("Uart%d: Response timeout for frameId 0x%x\n", uartTaskData->uartNumber, frameId);
8005212: f8d7 3140 ldr.w r3, [r7, #320] @ 0x140
8005216: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
800521a: 4619 mov r1, r3
800521c: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
8005220: 461a mov r2, r3
8005222: 484a ldr r0, [pc, #296] @ (800534c <UartTxTask+0x3c8>)
8005224: f025 fc02 bl 802aa2c <iprintf>
8005228: e6e5 b.n 8004ff6 <UartTxTask+0x72>
} else {
if ((frameId == frameData.frameHeader.frameId) && (frameData.frameHeader.respStatus == spOK)) {
800522a: f507 73a4 add.w r3, r7, #328 @ 0x148
800522e: f5a3 739c sub.w r3, r3, #312 @ 0x138
8005232: 881b ldrh r3, [r3, #0]
8005234: f8b7 213e ldrh.w r2, [r7, #318] @ 0x13e
8005238: 429a cmp r2, r3
800523a: f47f aedc bne.w 8004ff6 <UartTxTask+0x72>
800523e: f507 73a4 add.w r3, r7, #328 @ 0x148
8005242: f5a3 739c sub.w r3, r3, #312 @ 0x138
8005246: f993 3003 ldrsb.w r3, [r3, #3]
800524a: 2b00 cmp r3, #0
800524c: f47f aed3 bne.w 8004ff6 <UartTxTask+0x72>
printf ("Uart%d: Response for frameId 0x%x OK\n", uartTaskData->uartNumber, frameId);
8005250: f8d7 3140 ldr.w r3, [r7, #320] @ 0x140
8005254: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8005258: 4619 mov r1, r3
800525a: f8b7 313e ldrh.w r3, [r7, #318] @ 0x13e
800525e: 461a mov r2, r3
8005260: 483b ldr r0, [pc, #236] @ (8005350 <UartTxTask+0x3cc>)
8005262: f025 fbe3 bl 802aa2c <iprintf>
slaveLastSeen[boardNumber] = 0;
8005266: f897 3147 ldrb.w r3, [r7, #327] @ 0x147
800526a: 4a37 ldr r2, [pc, #220] @ (8005348 <UartTxTask+0x3c4>)
800526c: 2100 movs r1, #0
800526e: f842 1023 str.w r1, [r2, r3, lsl #2]
switch (frameData.frameHeader.frameCommand) {
8005272: f507 73a4 add.w r3, r7, #328 @ 0x148
8005276: f5a3 739c sub.w r3, r3, #312 @ 0x138
800527a: 789b ldrb r3, [r3, #2]
800527c: 2b00 cmp r3, #0
800527e: d002 beq.n 8005286 <UartTxTask+0x302>
8005280: 2b01 cmp r3, #1
8005282: d069 beq.n 8005358 <UartTxTask+0x3d4>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->currentYPosition);
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->positionXWeak);
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->positionYWeak);
osMutexRelease (sensorsInfoMutex);
break;
default: break;
8005284: e190 b.n 80055a8 <UartTxTask+0x624>
osMutexAcquire (resMeasurementsMutex, osWaitForever);
8005286: 4b2f ldr r3, [pc, #188] @ (8005344 <UartTxTask+0x3c0>)
8005288: 681b ldr r3, [r3, #0]
800528a: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
800528e: 4618 mov r0, r3
8005290: f00c fb61 bl 8011956 <osMutexAcquire>
RESMeasurements* resMeas = &resMeasurements[boardNumber];
8005294: f897 2147 ldrb.w r2, [r7, #327] @ 0x147
8005298: 4613 mov r3, r2
800529a: 011b lsls r3, r3, #4
800529c: 1a9b subs r3, r3, r2
800529e: 009b lsls r3, r3, #2
80052a0: 4a2c ldr r2, [pc, #176] @ (8005354 <UartTxTask+0x3d0>)
80052a2: 4413 add r3, r2
80052a4: f8c7 312c str.w r3, [r7, #300] @ 0x12c
inputDataBufferPos = 0;
80052a8: f507 73a4 add.w r3, r7, #328 @ 0x148
80052ac: f5a3 739f sub.w r3, r3, #318 @ 0x13e
80052b0: 2200 movs r2, #0
80052b2: 801a strh r2, [r3, #0]
ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->voltageRMS);
80052b4: f8d7 212c ldr.w r2, [r7, #300] @ 0x12c
80052b8: f107 010a add.w r1, r7, #10
80052bc: f107 0310 add.w r3, r7, #16
80052c0: 330c adds r3, #12
80052c2: 4618 mov r0, r3
80052c4: f7ff fe40 bl 8004f48 <ReadMeasSetFromBuffer>
ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->voltagePeak);
80052c8: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
80052cc: f103 020c add.w r2, r3, #12
80052d0: f107 010a add.w r1, r7, #10
80052d4: f107 0310 add.w r3, r7, #16
80052d8: 330c adds r3, #12
80052da: 4618 mov r0, r3
80052dc: f7ff fe34 bl 8004f48 <ReadMeasSetFromBuffer>
ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->currentRMS);
80052e0: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
80052e4: f103 0218 add.w r2, r3, #24
80052e8: f107 010a add.w r1, r7, #10
80052ec: f107 0310 add.w r3, r7, #16
80052f0: 330c adds r3, #12
80052f2: 4618 mov r0, r3
80052f4: f7ff fe28 bl 8004f48 <ReadMeasSetFromBuffer>
ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->currentPeak);
80052f8: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
80052fc: f103 0224 add.w r2, r3, #36 @ 0x24
8005300: f107 010a add.w r1, r7, #10
8005304: f107 0310 add.w r3, r7, #16
8005308: 330c adds r3, #12
800530a: 4618 mov r0, r3
800530c: f7ff fe1c bl 8004f48 <ReadMeasSetFromBuffer>
ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->power);
8005310: f8d7 312c ldr.w r3, [r7, #300] @ 0x12c
8005314: f103 0230 add.w r2, r3, #48 @ 0x30
8005318: f107 010a add.w r1, r7, #10
800531c: f107 0310 add.w r3, r7, #16
8005320: 330c adds r3, #12
8005322: 4618 mov r0, r3
8005324: f7ff fe10 bl 8004f48 <ReadMeasSetFromBuffer>
osMutexRelease (resMeasurementsMutex);
8005328: 4b06 ldr r3, [pc, #24] @ (8005344 <UartTxTask+0x3c0>)
800532a: 681b ldr r3, [r3, #0]
800532c: 4618 mov r0, r3
800532e: f00c fb5d bl 80119ec <osMutexRelease>
break;
8005332: e139 b.n 80055a8 <UartTxTask+0x624>
8005334: 2400027c .word 0x2400027c
8005338: 24002094 .word 0x24002094
800533c: 24002014 .word 0x24002014
8005340: 24000014 .word 0x24000014
8005344: 24002288 .word 0x24002288
8005348: 24002278 .word 0x24002278
800534c: 0802dbbc .word 0x0802dbbc
8005350: 0802dbe8 .word 0x0802dbe8
8005354: 24002098 .word 0x24002098
osMutexAcquire (sensorsInfoMutex, osWaitForever);
8005358: 4b94 ldr r3, [pc, #592] @ (80055ac <UartTxTask+0x628>)
800535a: 681b ldr r3, [r3, #0]
800535c: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8005360: 4618 mov r0, r3
8005362: f00c faf8 bl 8011956 <osMutexAcquire>
inputDataBufferPos = 0;
8005366: f507 73a4 add.w r3, r7, #328 @ 0x148
800536a: f5a3 739f sub.w r3, r3, #318 @ 0x13e
800536e: 2200 movs r2, #0
8005370: 801a strh r2, [r3, #0]
SesnorsInfo* sensors = &sensorsInfo[boardNumber];
8005372: f897 2147 ldrb.w r2, [r7, #327] @ 0x147
8005376: 4613 mov r3, r2
8005378: 011b lsls r3, r3, #4
800537a: 1a9b subs r3, r3, r2
800537c: 009b lsls r3, r3, #2
800537e: 4a8c ldr r2, [pc, #560] @ (80055b0 <UartTxTask+0x62c>)
8005380: 4413 add r3, r2
8005382: f8c7 3130 str.w r3, [r7, #304] @ 0x130
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[0]);
8005386: f8d7 2130 ldr.w r2, [r7, #304] @ 0x130
800538a: f107 010a add.w r1, r7, #10
800538e: f107 0310 add.w r3, r7, #16
8005392: 330c adds r3, #12
8005394: 4618 mov r0, r3
8005396: f7fe fa44 bl 8003822 <ReadFloatFromBuffer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[1]);
800539a: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
800539e: 1d1a adds r2, r3, #4
80053a0: f107 010a add.w r1, r7, #10
80053a4: f107 0310 add.w r3, r7, #16
80053a8: 330c adds r3, #12
80053aa: 4618 mov r0, r3
80053ac: f7fe fa39 bl 8003822 <ReadFloatFromBuffer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->fanVoltage);
80053b0: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
80053b4: f103 0208 add.w r2, r3, #8
80053b8: f107 010a add.w r1, r7, #10
80053bc: f107 0310 add.w r3, r7, #16
80053c0: 330c adds r3, #12
80053c2: 4618 mov r0, r3
80053c4: f7fe fa2d bl 8003822 <ReadFloatFromBuffer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->pvEncoderX);
80053c8: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
80053cc: f103 020c add.w r2, r3, #12
80053d0: f107 010a add.w r1, r7, #10
80053d4: f107 0310 add.w r3, r7, #16
80053d8: 330c adds r3, #12
80053da: 4618 mov r0, r3
80053dc: f7fe fa21 bl 8003822 <ReadFloatFromBuffer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->pvEncoderY);
80053e0: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
80053e4: f103 0210 add.w r2, r3, #16
80053e8: f107 010a add.w r1, r7, #10
80053ec: f107 0310 add.w r3, r7, #16
80053f0: 330c adds r3, #12
80053f2: 4618 mov r0, r3
80053f4: f7fe fa15 bl 8003822 <ReadFloatFromBuffer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXStatus);
80053f8: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
80053fc: f103 0214 add.w r2, r3, #20
8005400: f107 010a add.w r1, r7, #10
8005404: f107 0310 add.w r3, r7, #16
8005408: 330c adds r3, #12
800540a: 4618 mov r0, r3
800540c: f7fe fa3e bl 800388c <ReadByteFromBufer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYStatus);
8005410: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
8005414: f103 0215 add.w r2, r3, #21
8005418: f107 010a add.w r1, r7, #10
800541c: f107 0310 add.w r3, r7, #16
8005420: 330c adds r3, #12
8005422: 4618 mov r0, r3
8005424: f7fe fa32 bl 800388c <ReadByteFromBufer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXAveCurrent);
8005428: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
800542c: f103 0218 add.w r2, r3, #24
8005430: f107 010a add.w r1, r7, #10
8005434: f107 0310 add.w r3, r7, #16
8005438: 330c adds r3, #12
800543a: 4618 mov r0, r3
800543c: f7fe f9f1 bl 8003822 <ReadFloatFromBuffer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYAveCurrent);
8005440: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
8005444: f103 021c add.w r2, r3, #28
8005448: f107 010a add.w r1, r7, #10
800544c: f107 0310 add.w r3, r7, #16
8005450: 330c adds r3, #12
8005452: 4618 mov r0, r3
8005454: f7fe f9e5 bl 8003822 <ReadFloatFromBuffer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXPeakCurrent);
8005458: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
800545c: f103 0220 add.w r2, r3, #32
8005460: f107 010a add.w r1, r7, #10
8005464: f107 0310 add.w r3, r7, #16
8005468: 330c adds r3, #12
800546a: 4618 mov r0, r3
800546c: f7fe f9d9 bl 8003822 <ReadFloatFromBuffer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYPeakCurrent);
8005470: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
8005474: f103 0224 add.w r2, r3, #36 @ 0x24
8005478: f107 010a add.w r1, r7, #10
800547c: f107 0310 add.w r3, r7, #16
8005480: 330c adds r3, #12
8005482: 4618 mov r0, r3
8005484: f7fe f9cd bl 8003822 <ReadFloatFromBuffer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchUp);
8005488: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
800548c: f103 0228 add.w r2, r3, #40 @ 0x28
8005490: f107 010a add.w r1, r7, #10
8005494: f107 0310 add.w r3, r7, #16
8005498: 330c adds r3, #12
800549a: 4618 mov r0, r3
800549c: f7fe f9f6 bl 800388c <ReadByteFromBufer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchDown);
80054a0: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
80054a4: f103 0229 add.w r2, r3, #41 @ 0x29
80054a8: f107 010a add.w r1, r7, #10
80054ac: f107 0310 add.w r3, r7, #16
80054b0: 330c adds r3, #12
80054b2: 4618 mov r0, r3
80054b4: f7fe f9ea bl 800388c <ReadByteFromBufer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchCenter);
80054b8: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
80054bc: f103 022a add.w r2, r3, #42 @ 0x2a
80054c0: f107 010a add.w r1, r7, #10
80054c4: f107 0310 add.w r3, r7, #16
80054c8: 330c adds r3, #12
80054ca: 4618 mov r0, r3
80054cc: f7fe f9de bl 800388c <ReadByteFromBufer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchUp);
80054d0: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
80054d4: f103 022b add.w r2, r3, #43 @ 0x2b
80054d8: f107 010a add.w r1, r7, #10
80054dc: f107 0310 add.w r3, r7, #16
80054e0: 330c adds r3, #12
80054e2: 4618 mov r0, r3
80054e4: f7fe f9d2 bl 800388c <ReadByteFromBufer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchDown);
80054e8: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
80054ec: f103 022c add.w r2, r3, #44 @ 0x2c
80054f0: f107 010a add.w r1, r7, #10
80054f4: f107 0310 add.w r3, r7, #16
80054f8: 330c adds r3, #12
80054fa: 4618 mov r0, r3
80054fc: f7fe f9c6 bl 800388c <ReadByteFromBufer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchCenter);
8005500: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
8005504: f103 022d add.w r2, r3, #45 @ 0x2d
8005508: f107 010a add.w r1, r7, #10
800550c: f107 0310 add.w r3, r7, #16
8005510: 330c adds r3, #12
8005512: 4618 mov r0, r3
8005514: f7fe f9ba bl 800388c <ReadByteFromBufer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->powerSupplyFailMask);
8005518: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
800551c: f103 022e add.w r2, r3, #46 @ 0x2e
8005520: f107 010a add.w r1, r7, #10
8005524: f107 0310 add.w r3, r7, #16
8005528: 330c adds r3, #12
800552a: 4618 mov r0, r3
800552c: f7fe f9ae bl 800388c <ReadByteFromBufer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->currentXPosition);
8005530: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
8005534: f103 0230 add.w r2, r3, #48 @ 0x30
8005538: f107 010a add.w r1, r7, #10
800553c: f107 0310 add.w r3, r7, #16
8005540: 330c adds r3, #12
8005542: 4618 mov r0, r3
8005544: f7fe f96d bl 8003822 <ReadFloatFromBuffer>
ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->currentYPosition);
8005548: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
800554c: f103 0234 add.w r2, r3, #52 @ 0x34
8005550: f107 010a add.w r1, r7, #10
8005554: f107 0310 add.w r3, r7, #16
8005558: 330c adds r3, #12
800555a: 4618 mov r0, r3
800555c: f7fe f961 bl 8003822 <ReadFloatFromBuffer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->positionXWeak);
8005560: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
8005564: f103 0238 add.w r2, r3, #56 @ 0x38
8005568: f107 010a add.w r1, r7, #10
800556c: f107 0310 add.w r3, r7, #16
8005570: 330c adds r3, #12
8005572: 4618 mov r0, r3
8005574: f7fe f98a bl 800388c <ReadByteFromBufer>
ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->positionYWeak);
8005578: f8d7 3130 ldr.w r3, [r7, #304] @ 0x130
800557c: f103 0239 add.w r2, r3, #57 @ 0x39
8005580: f107 010a add.w r1, r7, #10
8005584: f107 0310 add.w r3, r7, #16
8005588: 330c adds r3, #12
800558a: 4618 mov r0, r3
800558c: f7fe f97e bl 800388c <ReadByteFromBufer>
osMutexRelease (sensorsInfoMutex);
8005590: 4b06 ldr r3, [pc, #24] @ (80055ac <UartTxTask+0x628>)
8005592: 681b ldr r3, [r3, #0]
8005594: 4618 mov r0, r3
8005596: f00c fa29 bl 80119ec <osMutexRelease>
break;
800559a: e005 b.n 80055a8 <UartTxTask+0x624>
}
}
}
} else {
osDelay (pdMS_TO_TICKS (1000));
800559c: f44f 707a mov.w r0, #1000 @ 0x3e8
80055a0: f00c f841 bl 8011626 <osDelay>
80055a4: e527 b.n 8004ff6 <UartTxTask+0x72>
default: continue; break;
80055a6: bf00 nop
if (uartTaskData->sendCmdToSlaveQueue != NULL) {
80055a8: e525 b.n 8004ff6 <UartTxTask+0x72>
80055aa: bf00 nop
80055ac: 2400228c .word 0x2400228c
80055b0: 24002188 .word 0x24002188
080055b4 <MeasurmentsReqSchedulerTaskInit>:
}
}
}
void MeasurmentsReqSchedulerTaskInit (void) {
80055b4: b580 push {r7, lr}
80055b6: b08a sub sp, #40 @ 0x28
80055b8: af00 add r7, sp, #0
osThreadAttr_t osThreadAttrMeasurmentsReqSchedulerTask = { 0 };
80055ba: 1d3b adds r3, r7, #4
80055bc: 2224 movs r2, #36 @ 0x24
80055be: 2100 movs r1, #0
80055c0: 4618 mov r0, r3
80055c2: f025 fbc5 bl 802ad50 <memset>
osThreadAttrMeasurmentsReqSchedulerTask.name = "os_thread_XXX";
80055c6: 4b08 ldr r3, [pc, #32] @ (80055e8 <MeasurmentsReqSchedulerTaskInit+0x34>)
80055c8: 607b str r3, [r7, #4]
osThreadAttrMeasurmentsReqSchedulerTask.stack_size = configMINIMAL_STACK_SIZE * 2;
80055ca: f44f 6380 mov.w r3, #1024 @ 0x400
80055ce: 61bb str r3, [r7, #24]
osThreadAttrMeasurmentsReqSchedulerTask.priority = (osPriority_t)osPriorityNormal;
80055d0: 2318 movs r3, #24
80055d2: 61fb str r3, [r7, #28]
osThreadNew (MeasurmentsReqSchedulerTask, uartTasks, &osThreadAttrMeasurmentsReqSchedulerTask);
80055d4: 1d3b adds r3, r7, #4
80055d6: 461a mov r2, r3
80055d8: 4904 ldr r1, [pc, #16] @ (80055ec <MeasurmentsReqSchedulerTaskInit+0x38>)
80055da: 4805 ldr r0, [pc, #20] @ (80055f0 <MeasurmentsReqSchedulerTaskInit+0x3c>)
80055dc: f00b ff85 bl 80114ea <osThreadNew>
}
80055e0: bf00 nop
80055e2: 3728 adds r7, #40 @ 0x28
80055e4: 46bd mov sp, r7
80055e6: bd80 pop {r7, pc}
80055e8: 0802dc10 .word 0x0802dc10
80055ec: 24000018 .word 0x24000018
80055f0: 080055f5 .word 0x080055f5
080055f4 <MeasurmentsReqSchedulerTask>:
void MeasurmentsReqSchedulerTask (void* argument) {
80055f4: b580 push {r7, lr}
80055f6: b08a sub sp, #40 @ 0x28
80055f8: af00 add r7, sp, #0
80055fa: 6078 str r0, [r7, #4]
while (pdTRUE) {
__uintptr_t* ptr = (__uintptr_t*)argument;
80055fc: 687b ldr r3, [r7, #4]
80055fe: 627b str r3, [r7, #36] @ 0x24
while (*ptr != 0) {
8005600: e052 b.n 80056a8 <MeasurmentsReqSchedulerTask+0xb4>
UartTaskData* uartTask = (UartTaskData*)*ptr;
8005602: 6a7b ldr r3, [r7, #36] @ 0x24
8005604: 681b ldr r3, [r3, #0]
8005606: 61fb str r3, [r7, #28]
if (uartTask->sendCmdToSlaveQueue != NULL) {
8005608: 69fb ldr r3, [r7, #28]
800560a: 6adb ldr r3, [r3, #44] @ 0x2c
800560c: 2b00 cmp r3, #0
800560e: d048 beq.n 80056a2 <MeasurmentsReqSchedulerTask+0xae>
InterProcessData data = { 0 };
8005610: f107 030c add.w r3, r7, #12
8005614: 2200 movs r2, #0
8005616: 601a str r2, [r3, #0]
8005618: 605a str r2, [r3, #4]
800561a: 609a str r2, [r3, #8]
800561c: 60da str r2, [r3, #12]
uint8_t boardNumber = 0;
800561e: 2300 movs r3, #0
8005620: f887 3023 strb.w r3, [r7, #35] @ 0x23
for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
8005624: 2300 movs r3, #0
8005626: f887 3023 strb.w r3, [r7, #35] @ 0x23
800562a: e00d b.n 8005648 <MeasurmentsReqSchedulerTask+0x54>
{
if(boardToUartNumberMap[boardNumber] == uartTask->uartNumber)
800562c: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
8005630: 4a22 ldr r2, [pc, #136] @ (80056bc <MeasurmentsReqSchedulerTask+0xc8>)
8005632: 5cd2 ldrb r2, [r2, r3]
8005634: 69fb ldr r3, [r7, #28]
8005636: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
800563a: 429a cmp r2, r3
800563c: d009 beq.n 8005652 <MeasurmentsReqSchedulerTask+0x5e>
for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
800563e: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
8005642: 3301 adds r3, #1
8005644: f887 3023 strb.w r3, [r7, #35] @ 0x23
8005648: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
800564c: 2b03 cmp r3, #3
800564e: d9ed bls.n 800562c <MeasurmentsReqSchedulerTask+0x38>
8005650: e000 b.n 8005654 <MeasurmentsReqSchedulerTask+0x60>
{
break;
8005652: bf00 nop
}
}
data.spCommand = spGetElectricalMeasurments;
8005654: 2300 movs r3, #0
8005656: 733b strb r3, [r7, #12]
osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
8005658: 69fb ldr r3, [r7, #28]
800565a: 6ad8 ldr r0, [r3, #44] @ 0x2c
800565c: f107 010c add.w r1, r7, #12
8005660: 2364 movs r3, #100 @ 0x64
8005662: 2200 movs r2, #0
8005664: f00c fbb6 bl 8011dd4 <osMessageQueuePut>
osMutexAcquire (resMeasurementsMutex, osWaitForever);
8005668: 4b15 ldr r3, [pc, #84] @ (80056c0 <MeasurmentsReqSchedulerTask+0xcc>)
800566a: 681b ldr r3, [r3, #0]
800566c: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8005670: 4618 mov r0, r3
8005672: f00c f970 bl 8011956 <osMutexAcquire>
if(slaveLastSeen[boardNumber] == 0)
8005676: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
800567a: 4a12 ldr r2, [pc, #72] @ (80056c4 <MeasurmentsReqSchedulerTask+0xd0>)
800567c: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8005680: 2b00 cmp r3, #0
8005682: d109 bne.n 8005698 <MeasurmentsReqSchedulerTask+0xa4>
{
data.spCommand = spGetSensorMeasurments;
8005684: 2301 movs r3, #1
8005686: 733b strb r3, [r7, #12]
osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
8005688: 69fb ldr r3, [r7, #28]
800568a: 6ad8 ldr r0, [r3, #44] @ 0x2c
800568c: f107 010c add.w r1, r7, #12
8005690: 2364 movs r3, #100 @ 0x64
8005692: 2200 movs r2, #0
8005694: f00c fb9e bl 8011dd4 <osMessageQueuePut>
}
osMutexRelease(resMeasurementsMutex);
8005698: 4b09 ldr r3, [pc, #36] @ (80056c0 <MeasurmentsReqSchedulerTask+0xcc>)
800569a: 681b ldr r3, [r3, #0]
800569c: 4618 mov r0, r3
800569e: f00c f9a5 bl 80119ec <osMutexRelease>
}
ptr++;
80056a2: 6a7b ldr r3, [r7, #36] @ 0x24
80056a4: 3304 adds r3, #4
80056a6: 627b str r3, [r7, #36] @ 0x24
while (*ptr != 0) {
80056a8: 6a7b ldr r3, [r7, #36] @ 0x24
80056aa: 681b ldr r3, [r3, #0]
80056ac: 2b00 cmp r3, #0
80056ae: d1a8 bne.n 8005602 <MeasurmentsReqSchedulerTask+0xe>
}
osDelay (pdMS_TO_TICKS (MEASURMENTS_SCHEDULER_INTERVAL_MS));
80056b0: f44f 707a mov.w r0, #1000 @ 0x3e8
80056b4: f00b ffb7 bl 8011626 <osDelay>
while (pdTRUE) {
80056b8: e7a0 b.n 80055fc <MeasurmentsReqSchedulerTask+0x8>
80056ba: bf00 nop
80056bc: 24000014 .word 0x24000014
80056c0: 24002288 .word 0x24002288
80056c4: 24002278 .word 0x24002278
080056c8 <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
80056c8: f8df d034 ldr.w sp, [pc, #52] @ 8005700 <LoopFillZerobss+0xe>
/* Call the clock system initialization function.*/
bl SystemInit
80056cc: f7fe fef8 bl 80044c0 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
80056d0: 480c ldr r0, [pc, #48] @ (8005704 <LoopFillZerobss+0x12>)
ldr r1, =_edata
80056d2: 490d ldr r1, [pc, #52] @ (8005708 <LoopFillZerobss+0x16>)
ldr r2, =_sidata
80056d4: 4a0d ldr r2, [pc, #52] @ (800570c <LoopFillZerobss+0x1a>)
movs r3, #0
80056d6: 2300 movs r3, #0
b LoopCopyDataInit
80056d8: e002 b.n 80056e0 <LoopCopyDataInit>
080056da <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
80056da: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
80056dc: 50c4 str r4, [r0, r3]
adds r3, r3, #4
80056de: 3304 adds r3, #4
080056e0 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
80056e0: 18c4 adds r4, r0, r3
cmp r4, r1
80056e2: 428c cmp r4, r1
bcc CopyDataInit
80056e4: d3f9 bcc.n 80056da <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
80056e6: 4a0a ldr r2, [pc, #40] @ (8005710 <LoopFillZerobss+0x1e>)
ldr r4, =_ebss
80056e8: 4c0a ldr r4, [pc, #40] @ (8005714 <LoopFillZerobss+0x22>)
movs r3, #0
80056ea: 2300 movs r3, #0
b LoopFillZerobss
80056ec: e001 b.n 80056f2 <LoopFillZerobss>
080056ee <FillZerobss>:
FillZerobss:
str r3, [r2]
80056ee: 6013 str r3, [r2, #0]
adds r2, r2, #4
80056f0: 3204 adds r2, #4
080056f2 <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
80056f2: 42a2 cmp r2, r4
bcc FillZerobss
80056f4: d3fb bcc.n 80056ee <FillZerobss>
/* Call static constructors */
bl __libc_init_array
80056f6: f025 fbfb bl 802aef0 <__libc_init_array>
/* Call the application's entry point.*/
bl main
80056fa: f7fc fb27 bl 8001d4c <main>
bx lr
80056fe: 4770 bx lr
ldr sp, =_estack /* set stack pointer */
8005700: 24060000 .word 0x24060000
ldr r0, =_sdata
8005704: 24000000 .word 0x24000000
ldr r1, =_edata
8005708: 24000224 .word 0x24000224
ldr r2, =_sidata
800570c: 0803236c .word 0x0803236c
ldr r2, =_sbss
8005710: 24000224 .word 0x24000224
ldr r4, =_ebss
8005714: 2402b2a8 .word 0x2402b2a8
08005718 <ADC3_IRQHandler>:
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8005718: e7fe b.n 8005718 <ADC3_IRQHandler>
0800571a <DP83848_RegisterBusIO>:
* @param ioctx: holds device IO functions.
* @retval DP83848_STATUS_OK if OK
* DP83848_STATUS_ERROR if missing mandatory function
*/
int32_t DP83848_RegisterBusIO(dp83848_Object_t *pObj, dp83848_IOCtx_t *ioctx)
{
800571a: b480 push {r7}
800571c: b083 sub sp, #12
800571e: af00 add r7, sp, #0
8005720: 6078 str r0, [r7, #4]
8005722: 6039 str r1, [r7, #0]
if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick)
8005724: 687b ldr r3, [r7, #4]
8005726: 2b00 cmp r3, #0
8005728: d00b beq.n 8005742 <DP83848_RegisterBusIO+0x28>
800572a: 683b ldr r3, [r7, #0]
800572c: 68db ldr r3, [r3, #12]
800572e: 2b00 cmp r3, #0
8005730: d007 beq.n 8005742 <DP83848_RegisterBusIO+0x28>
8005732: 683b ldr r3, [r7, #0]
8005734: 689b ldr r3, [r3, #8]
8005736: 2b00 cmp r3, #0
8005738: d003 beq.n 8005742 <DP83848_RegisterBusIO+0x28>
800573a: 683b ldr r3, [r7, #0]
800573c: 691b ldr r3, [r3, #16]
800573e: 2b00 cmp r3, #0
8005740: d102 bne.n 8005748 <DP83848_RegisterBusIO+0x2e>
{
return DP83848_STATUS_ERROR;
8005742: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8005746: e014 b.n 8005772 <DP83848_RegisterBusIO+0x58>
}
pObj->IO.Init = ioctx->Init;
8005748: 683b ldr r3, [r7, #0]
800574a: 681a ldr r2, [r3, #0]
800574c: 687b ldr r3, [r7, #4]
800574e: 609a str r2, [r3, #8]
pObj->IO.DeInit = ioctx->DeInit;
8005750: 683b ldr r3, [r7, #0]
8005752: 685a ldr r2, [r3, #4]
8005754: 687b ldr r3, [r7, #4]
8005756: 60da str r2, [r3, #12]
pObj->IO.ReadReg = ioctx->ReadReg;
8005758: 683b ldr r3, [r7, #0]
800575a: 68da ldr r2, [r3, #12]
800575c: 687b ldr r3, [r7, #4]
800575e: 615a str r2, [r3, #20]
pObj->IO.WriteReg = ioctx->WriteReg;
8005760: 683b ldr r3, [r7, #0]
8005762: 689a ldr r2, [r3, #8]
8005764: 687b ldr r3, [r7, #4]
8005766: 611a str r2, [r3, #16]
pObj->IO.GetTick = ioctx->GetTick;
8005768: 683b ldr r3, [r7, #0]
800576a: 691a ldr r2, [r3, #16]
800576c: 687b ldr r3, [r7, #4]
800576e: 619a str r2, [r3, #24]
return DP83848_STATUS_OK;
8005770: 2300 movs r3, #0
}
8005772: 4618 mov r0, r3
8005774: 370c adds r7, #12
8005776: 46bd mov sp, r7
8005778: f85d 7b04 ldr.w r7, [sp], #4
800577c: 4770 bx lr
0800577e <DP83848_Init>:
* @retval DP83848_STATUS_OK if OK
* DP83848_STATUS_ADDRESS_ERROR if cannot find device address
* DP83848_STATUS_READ_ERROR if connot read register
*/
int32_t DP83848_Init(dp83848_Object_t *pObj)
{
800577e: b580 push {r7, lr}
8005780: b086 sub sp, #24
8005782: af00 add r7, sp, #0
8005784: 6078 str r0, [r7, #4]
uint32_t regvalue = 0, addr = 0;
8005786: 2300 movs r3, #0
8005788: 60fb str r3, [r7, #12]
800578a: 2300 movs r3, #0
800578c: 617b str r3, [r7, #20]
int32_t status = DP83848_STATUS_OK;
800578e: 2300 movs r3, #0
8005790: 613b str r3, [r7, #16]
if(pObj->Is_Initialized == 0)
8005792: 687b ldr r3, [r7, #4]
8005794: 685b ldr r3, [r3, #4]
8005796: 2b00 cmp r3, #0
8005798: d139 bne.n 800580e <DP83848_Init+0x90>
{
if(pObj->IO.Init != 0)
800579a: 687b ldr r3, [r7, #4]
800579c: 689b ldr r3, [r3, #8]
800579e: 2b00 cmp r3, #0
80057a0: d002 beq.n 80057a8 <DP83848_Init+0x2a>
{
/* GPIO and Clocks initialization */
pObj->IO.Init();
80057a2: 687b ldr r3, [r7, #4]
80057a4: 689b ldr r3, [r3, #8]
80057a6: 4798 blx r3
}
/* for later check */
pObj->DevAddr = DP83848_MAX_DEV_ADDR + 1;
80057a8: 687b ldr r3, [r7, #4]
80057aa: 2220 movs r2, #32
80057ac: 601a str r2, [r3, #0]
/* Get the device address from special mode register */
for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
80057ae: 2300 movs r3, #0
80057b0: 617b str r3, [r7, #20]
80057b2: e01c b.n 80057ee <DP83848_Init+0x70>
{
if(pObj->IO.ReadReg(addr, DP83848_SMR, ®value) < 0)
80057b4: 687b ldr r3, [r7, #4]
80057b6: 695b ldr r3, [r3, #20]
80057b8: f107 020c add.w r2, r7, #12
80057bc: 2119 movs r1, #25
80057be: 6978 ldr r0, [r7, #20]
80057c0: 4798 blx r3
80057c2: 4603 mov r3, r0
80057c4: 2b00 cmp r3, #0
80057c6: da03 bge.n 80057d0 <DP83848_Init+0x52>
{
status = DP83848_STATUS_READ_ERROR;
80057c8: f06f 0304 mvn.w r3, #4
80057cc: 613b str r3, [r7, #16]
/* Can't read from this device address
continue with next address */
continue;
80057ce: e00b b.n 80057e8 <DP83848_Init+0x6a>
}
if((regvalue & DP83848_SMR_PHY_ADDR) == addr)
80057d0: 68fb ldr r3, [r7, #12]
80057d2: f003 031f and.w r3, r3, #31
80057d6: 697a ldr r2, [r7, #20]
80057d8: 429a cmp r2, r3
80057da: d105 bne.n 80057e8 <DP83848_Init+0x6a>
{
pObj->DevAddr = addr;
80057dc: 687b ldr r3, [r7, #4]
80057de: 697a ldr r2, [r7, #20]
80057e0: 601a str r2, [r3, #0]
status = DP83848_STATUS_OK;
80057e2: 2300 movs r3, #0
80057e4: 613b str r3, [r7, #16]
break;
80057e6: e005 b.n 80057f4 <DP83848_Init+0x76>
for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
80057e8: 697b ldr r3, [r7, #20]
80057ea: 3301 adds r3, #1
80057ec: 617b str r3, [r7, #20]
80057ee: 697b ldr r3, [r7, #20]
80057f0: 2b1f cmp r3, #31
80057f2: d9df bls.n 80057b4 <DP83848_Init+0x36>
}
}
if(pObj->DevAddr > DP83848_MAX_DEV_ADDR)
80057f4: 687b ldr r3, [r7, #4]
80057f6: 681b ldr r3, [r3, #0]
80057f8: 2b1f cmp r3, #31
80057fa: d902 bls.n 8005802 <DP83848_Init+0x84>
{
status = DP83848_STATUS_ADDRESS_ERROR;
80057fc: f06f 0302 mvn.w r3, #2
8005800: 613b str r3, [r7, #16]
}
/* if device address is matched */
if(status == DP83848_STATUS_OK)
8005802: 693b ldr r3, [r7, #16]
8005804: 2b00 cmp r3, #0
8005806: d102 bne.n 800580e <DP83848_Init+0x90>
{
pObj->Is_Initialized = 1;
8005808: 687b ldr r3, [r7, #4]
800580a: 2201 movs r2, #1
800580c: 605a str r2, [r3, #4]
}
}
return status;
800580e: 693b ldr r3, [r7, #16]
}
8005810: 4618 mov r0, r3
8005812: 3718 adds r7, #24
8005814: 46bd mov sp, r7
8005816: bd80 pop {r7, pc}
08005818 <DP83848_GetLinkState>:
* DP83848_STATUS_10MBITS_HALFDUPLEX if 10Mb/s HD
* DP83848_STATUS_READ_ERROR if connot read register
* DP83848_STATUS_WRITE_ERROR if connot write to register
*/
int32_t DP83848_GetLinkState(dp83848_Object_t *pObj)
{
8005818: b580 push {r7, lr}
800581a: b084 sub sp, #16
800581c: af00 add r7, sp, #0
800581e: 6078 str r0, [r7, #4]
uint32_t readval = 0;
8005820: 2300 movs r3, #0
8005822: 60fb str r3, [r7, #12]
/* Read Status register */
if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
8005824: 687b ldr r3, [r7, #4]
8005826: 695b ldr r3, [r3, #20]
8005828: 687a ldr r2, [r7, #4]
800582a: 6810 ldr r0, [r2, #0]
800582c: f107 020c add.w r2, r7, #12
8005830: 2101 movs r1, #1
8005832: 4798 blx r3
8005834: 4603 mov r3, r0
8005836: 2b00 cmp r3, #0
8005838: da02 bge.n 8005840 <DP83848_GetLinkState+0x28>
{
return DP83848_STATUS_READ_ERROR;
800583a: f06f 0304 mvn.w r3, #4
800583e: e06e b.n 800591e <DP83848_GetLinkState+0x106>
}
/* Read Status register again */
if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
8005840: 687b ldr r3, [r7, #4]
8005842: 695b ldr r3, [r3, #20]
8005844: 687a ldr r2, [r7, #4]
8005846: 6810 ldr r0, [r2, #0]
8005848: f107 020c add.w r2, r7, #12
800584c: 2101 movs r1, #1
800584e: 4798 blx r3
8005850: 4603 mov r3, r0
8005852: 2b00 cmp r3, #0
8005854: da02 bge.n 800585c <DP83848_GetLinkState+0x44>
{
return DP83848_STATUS_READ_ERROR;
8005856: f06f 0304 mvn.w r3, #4
800585a: e060 b.n 800591e <DP83848_GetLinkState+0x106>
}
if((readval & DP83848_BSR_LINK_STATUS) == 0)
800585c: 68fb ldr r3, [r7, #12]
800585e: f003 0304 and.w r3, r3, #4
8005862: 2b00 cmp r3, #0
8005864: d101 bne.n 800586a <DP83848_GetLinkState+0x52>
{
/* Return Link Down status */
return DP83848_STATUS_LINK_DOWN;
8005866: 2301 movs r3, #1
8005868: e059 b.n 800591e <DP83848_GetLinkState+0x106>
}
/* Check Auto negotiaition */
if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BCR, &readval) < 0)
800586a: 687b ldr r3, [r7, #4]
800586c: 695b ldr r3, [r3, #20]
800586e: 687a ldr r2, [r7, #4]
8005870: 6810 ldr r0, [r2, #0]
8005872: f107 020c add.w r2, r7, #12
8005876: 2100 movs r1, #0
8005878: 4798 blx r3
800587a: 4603 mov r3, r0
800587c: 2b00 cmp r3, #0
800587e: da02 bge.n 8005886 <DP83848_GetLinkState+0x6e>
{
return DP83848_STATUS_READ_ERROR;
8005880: f06f 0304 mvn.w r3, #4
8005884: e04b b.n 800591e <DP83848_GetLinkState+0x106>
}
if((readval & DP83848_BCR_AUTONEGO_EN) != DP83848_BCR_AUTONEGO_EN)
8005886: 68fb ldr r3, [r7, #12]
8005888: f403 5380 and.w r3, r3, #4096 @ 0x1000
800588c: 2b00 cmp r3, #0
800588e: d11b bne.n 80058c8 <DP83848_GetLinkState+0xb0>
{
if(((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT) && ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE))
8005890: 68fb ldr r3, [r7, #12]
8005892: f403 5300 and.w r3, r3, #8192 @ 0x2000
8005896: 2b00 cmp r3, #0
8005898: d006 beq.n 80058a8 <DP83848_GetLinkState+0x90>
800589a: 68fb ldr r3, [r7, #12]
800589c: f403 7380 and.w r3, r3, #256 @ 0x100
80058a0: 2b00 cmp r3, #0
80058a2: d001 beq.n 80058a8 <DP83848_GetLinkState+0x90>
{
return DP83848_STATUS_100MBITS_FULLDUPLEX;
80058a4: 2302 movs r3, #2
80058a6: e03a b.n 800591e <DP83848_GetLinkState+0x106>
}
else if ((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT)
80058a8: 68fb ldr r3, [r7, #12]
80058aa: f403 5300 and.w r3, r3, #8192 @ 0x2000
80058ae: 2b00 cmp r3, #0
80058b0: d001 beq.n 80058b6 <DP83848_GetLinkState+0x9e>
{
return DP83848_STATUS_100MBITS_HALFDUPLEX;
80058b2: 2303 movs r3, #3
80058b4: e033 b.n 800591e <DP83848_GetLinkState+0x106>
}
else if ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE)
80058b6: 68fb ldr r3, [r7, #12]
80058b8: f403 7380 and.w r3, r3, #256 @ 0x100
80058bc: 2b00 cmp r3, #0
80058be: d001 beq.n 80058c4 <DP83848_GetLinkState+0xac>
{
return DP83848_STATUS_10MBITS_FULLDUPLEX;
80058c0: 2304 movs r3, #4
80058c2: e02c b.n 800591e <DP83848_GetLinkState+0x106>
}
else
{
return DP83848_STATUS_10MBITS_HALFDUPLEX;
80058c4: 2305 movs r3, #5
80058c6: e02a b.n 800591e <DP83848_GetLinkState+0x106>
}
}
else /* Auto Nego enabled */
{
if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_PHYSCSR, &readval) < 0)
80058c8: 687b ldr r3, [r7, #4]
80058ca: 695b ldr r3, [r3, #20]
80058cc: 687a ldr r2, [r7, #4]
80058ce: 6810 ldr r0, [r2, #0]
80058d0: f107 020c add.w r2, r7, #12
80058d4: 2110 movs r1, #16
80058d6: 4798 blx r3
80058d8: 4603 mov r3, r0
80058da: 2b00 cmp r3, #0
80058dc: da02 bge.n 80058e4 <DP83848_GetLinkState+0xcc>
{
return DP83848_STATUS_READ_ERROR;
80058de: f06f 0304 mvn.w r3, #4
80058e2: e01c b.n 800591e <DP83848_GetLinkState+0x106>
}
/* Check if auto nego not done */
if((readval & DP83848_PHYSCSR_AUTONEGO_DONE) == 0)
80058e4: 68fb ldr r3, [r7, #12]
80058e6: f003 0310 and.w r3, r3, #16
80058ea: 2b00 cmp r3, #0
80058ec: d101 bne.n 80058f2 <DP83848_GetLinkState+0xda>
{
return DP83848_STATUS_AUTONEGO_NOTDONE;
80058ee: 2306 movs r3, #6
80058f0: e015 b.n 800591e <DP83848_GetLinkState+0x106>
}
if((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_FD)
80058f2: 68fb ldr r3, [r7, #12]
80058f4: f003 0306 and.w r3, r3, #6
80058f8: 2b04 cmp r3, #4
80058fa: d101 bne.n 8005900 <DP83848_GetLinkState+0xe8>
{
return DP83848_STATUS_100MBITS_FULLDUPLEX;
80058fc: 2302 movs r3, #2
80058fe: e00e b.n 800591e <DP83848_GetLinkState+0x106>
}
else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_HD)
8005900: 68fb ldr r3, [r7, #12]
8005902: f003 0306 and.w r3, r3, #6
8005906: 2b00 cmp r3, #0
8005908: d101 bne.n 800590e <DP83848_GetLinkState+0xf6>
{
return DP83848_STATUS_100MBITS_HALFDUPLEX;
800590a: 2303 movs r3, #3
800590c: e007 b.n 800591e <DP83848_GetLinkState+0x106>
}
else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_10BT_FD)
800590e: 68fb ldr r3, [r7, #12]
8005910: f003 0306 and.w r3, r3, #6
8005914: 2b06 cmp r3, #6
8005916: d101 bne.n 800591c <DP83848_GetLinkState+0x104>
{
return DP83848_STATUS_10MBITS_FULLDUPLEX;
8005918: 2304 movs r3, #4
800591a: e000 b.n 800591e <DP83848_GetLinkState+0x106>
}
else
{
return DP83848_STATUS_10MBITS_HALFDUPLEX;
800591c: 2305 movs r3, #5
}
}
}
800591e: 4618 mov r0, r3
8005920: 3710 adds r7, #16
8005922: 46bd mov sp, r7
8005924: bd80 pop {r7, pc}
...
08005928 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8005928: b580 push {r7, lr}
800592a: b082 sub sp, #8
800592c: af00 add r7, sp, #0
__HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL); /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */
__HAL_ART_ENABLE(); /* Enable the Cortex-M4 ART */
#endif /* DUAL_CORE && CORE_CM4 */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
800592e: 2003 movs r0, #3
8005930: f000 f947 bl 8005bc2 <HAL_NVIC_SetPriorityGrouping>
/* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
8005934: f005 fd12 bl 800b35c <HAL_RCC_GetSysClockFreq>
8005938: 4602 mov r2, r0
800593a: 4b15 ldr r3, [pc, #84] @ (8005990 <HAL_Init+0x68>)
800593c: 699b ldr r3, [r3, #24]
800593e: 0a1b lsrs r3, r3, #8
8005940: f003 030f and.w r3, r3, #15
8005944: 4913 ldr r1, [pc, #76] @ (8005994 <HAL_Init+0x6c>)
8005946: 5ccb ldrb r3, [r1, r3]
8005948: f003 031f and.w r3, r3, #31
800594c: fa22 f303 lsr.w r3, r2, r3
8005950: 607b str r3, [r7, #4]
common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif
/* Update the SystemD2Clock global variable */
#if defined(RCC_D1CFGR_HPRE)
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
8005952: 4b0f ldr r3, [pc, #60] @ (8005990 <HAL_Init+0x68>)
8005954: 699b ldr r3, [r3, #24]
8005956: f003 030f and.w r3, r3, #15
800595a: 4a0e ldr r2, [pc, #56] @ (8005994 <HAL_Init+0x6c>)
800595c: 5cd3 ldrb r3, [r2, r3]
800595e: f003 031f and.w r3, r3, #31
8005962: 687a ldr r2, [r7, #4]
8005964: fa22 f303 lsr.w r3, r2, r3
8005968: 4a0b ldr r2, [pc, #44] @ (8005998 <HAL_Init+0x70>)
800596a: 6013 str r3, [r2, #0]
#endif
#if defined(DUAL_CORE) && defined(CORE_CM4)
SystemCoreClock = SystemD2Clock;
#else
SystemCoreClock = common_system_clock;
800596c: 4a0b ldr r2, [pc, #44] @ (800599c <HAL_Init+0x74>)
800596e: 687b ldr r3, [r7, #4]
8005970: 6013 str r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
8005972: 200f movs r0, #15
8005974: f7fe fbf2 bl 800415c <HAL_InitTick>
8005978: 4603 mov r3, r0
800597a: 2b00 cmp r3, #0
800597c: d001 beq.n 8005982 <HAL_Init+0x5a>
{
return HAL_ERROR;
800597e: 2301 movs r3, #1
8005980: e002 b.n 8005988 <HAL_Init+0x60>
}
/* Init the low level hardware */
HAL_MspInit();
8005982: f7fe f8db bl 8003b3c <HAL_MspInit>
/* Return function status */
return HAL_OK;
8005986: 2300 movs r3, #0
}
8005988: 4618 mov r0, r3
800598a: 3708 adds r7, #8
800598c: 46bd mov sp, r7
800598e: bd80 pop {r7, pc}
8005990: 58024400 .word 0x58024400
8005994: 08031cdc .word 0x08031cdc
8005998: 24000010 .word 0x24000010
800599c: 2400000c .word 0x2400000c
080059a0 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
80059a0: b480 push {r7}
80059a2: af00 add r7, sp, #0
uwTick += (uint32_t)uwTickFreq;
80059a4: 4b06 ldr r3, [pc, #24] @ (80059c0 <HAL_IncTick+0x20>)
80059a6: 781b ldrb r3, [r3, #0]
80059a8: 461a mov r2, r3
80059aa: 4b06 ldr r3, [pc, #24] @ (80059c4 <HAL_IncTick+0x24>)
80059ac: 681b ldr r3, [r3, #0]
80059ae: 4413 add r3, r2
80059b0: 4a04 ldr r2, [pc, #16] @ (80059c4 <HAL_IncTick+0x24>)
80059b2: 6013 str r3, [r2, #0]
}
80059b4: bf00 nop
80059b6: 46bd mov sp, r7
80059b8: f85d 7b04 ldr.w r7, [sp], #4
80059bc: 4770 bx lr
80059be: bf00 nop
80059c0: 24000030 .word 0x24000030
80059c4: 24002290 .word 0x24002290
080059c8 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
80059c8: b480 push {r7}
80059ca: af00 add r7, sp, #0
return uwTick;
80059cc: 4b03 ldr r3, [pc, #12] @ (80059dc <HAL_GetTick+0x14>)
80059ce: 681b ldr r3, [r3, #0]
}
80059d0: 4618 mov r0, r3
80059d2: 46bd mov sp, r7
80059d4: f85d 7b04 ldr.w r7, [sp], #4
80059d8: 4770 bx lr
80059da: bf00 nop
80059dc: 24002290 .word 0x24002290
080059e0 <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
80059e0: b580 push {r7, lr}
80059e2: b084 sub sp, #16
80059e4: af00 add r7, sp, #0
80059e6: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
80059e8: f7ff ffee bl 80059c8 <HAL_GetTick>
80059ec: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
80059ee: 687b ldr r3, [r7, #4]
80059f0: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
80059f2: 68fb ldr r3, [r7, #12]
80059f4: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80059f8: d005 beq.n 8005a06 <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
80059fa: 4b0a ldr r3, [pc, #40] @ (8005a24 <HAL_Delay+0x44>)
80059fc: 781b ldrb r3, [r3, #0]
80059fe: 461a mov r2, r3
8005a00: 68fb ldr r3, [r7, #12]
8005a02: 4413 add r3, r2
8005a04: 60fb str r3, [r7, #12]
}
while ((HAL_GetTick() - tickstart) < wait)
8005a06: bf00 nop
8005a08: f7ff ffde bl 80059c8 <HAL_GetTick>
8005a0c: 4602 mov r2, r0
8005a0e: 68bb ldr r3, [r7, #8]
8005a10: 1ad3 subs r3, r2, r3
8005a12: 68fa ldr r2, [r7, #12]
8005a14: 429a cmp r2, r3
8005a16: d8f7 bhi.n 8005a08 <HAL_Delay+0x28>
{
}
}
8005a18: bf00 nop
8005a1a: bf00 nop
8005a1c: 3710 adds r7, #16
8005a1e: 46bd mov sp, r7
8005a20: bd80 pop {r7, pc}
8005a22: bf00 nop
8005a24: 24000030 .word 0x24000030
08005a28 <HAL_GetREVID>:
/**
* @brief Returns the device revision identifier.
* @retval Device revision identifier
*/
uint32_t HAL_GetREVID(void)
{
8005a28: b480 push {r7}
8005a2a: af00 add r7, sp, #0
return((DBGMCU->IDCODE) >> 16);
8005a2c: 4b03 ldr r3, [pc, #12] @ (8005a3c <HAL_GetREVID+0x14>)
8005a2e: 681b ldr r3, [r3, #0]
8005a30: 0c1b lsrs r3, r3, #16
}
8005a32: 4618 mov r0, r3
8005a34: 46bd mov sp, r7
8005a36: f85d 7b04 ldr.w r7, [sp], #4
8005a3a: 4770 bx lr
8005a3c: 5c001000 .word 0x5c001000
08005a40 <HAL_SYSCFG_ETHInterfaceSelect>:
* @arg SYSCFG_ETH_MII : Select the Media Independent Interface
* @arg SYSCFG_ETH_RMII: Select the Reduced Media Independent Interface
* @retval None
*/
void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface)
{
8005a40: b480 push {r7}
8005a42: b083 sub sp, #12
8005a44: af00 add r7, sp, #0
8005a46: 6078 str r0, [r7, #4]
/* Check the parameter */
assert_param(IS_SYSCFG_ETHERNET_CONFIG(SYSCFG_ETHInterface));
MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface));
8005a48: 4b06 ldr r3, [pc, #24] @ (8005a64 <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
8005a4a: 685b ldr r3, [r3, #4]
8005a4c: f423 0260 bic.w r2, r3, #14680064 @ 0xe00000
8005a50: 4904 ldr r1, [pc, #16] @ (8005a64 <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
8005a52: 687b ldr r3, [r7, #4]
8005a54: 4313 orrs r3, r2
8005a56: 604b str r3, [r1, #4]
}
8005a58: bf00 nop
8005a5a: 370c adds r7, #12
8005a5c: 46bd mov sp, r7
8005a5e: f85d 7b04 ldr.w r7, [sp], #4
8005a62: 4770 bx lr
8005a64: 58000400 .word 0x58000400
08005a68 <__NVIC_SetPriorityGrouping>:
{
8005a68: b480 push {r7}
8005a6a: b085 sub sp, #20
8005a6c: af00 add r7, sp, #0
8005a6e: 6078 str r0, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005a70: 687b ldr r3, [r7, #4]
8005a72: f003 0307 and.w r3, r3, #7
8005a76: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8005a78: 4b0b ldr r3, [pc, #44] @ (8005aa8 <__NVIC_SetPriorityGrouping+0x40>)
8005a7a: 68db ldr r3, [r3, #12]
8005a7c: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8005a7e: 68ba ldr r2, [r7, #8]
8005a80: f64f 03ff movw r3, #63743 @ 0xf8ff
8005a84: 4013 ands r3, r2
8005a86: 60bb str r3, [r7, #8]
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8005a88: 68fb ldr r3, [r7, #12]
8005a8a: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8005a8c: 68bb ldr r3, [r7, #8]
8005a8e: 431a orrs r2, r3
reg_value = (reg_value |
8005a90: 4b06 ldr r3, [pc, #24] @ (8005aac <__NVIC_SetPriorityGrouping+0x44>)
8005a92: 4313 orrs r3, r2
8005a94: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8005a96: 4a04 ldr r2, [pc, #16] @ (8005aa8 <__NVIC_SetPriorityGrouping+0x40>)
8005a98: 68bb ldr r3, [r7, #8]
8005a9a: 60d3 str r3, [r2, #12]
}
8005a9c: bf00 nop
8005a9e: 3714 adds r7, #20
8005aa0: 46bd mov sp, r7
8005aa2: f85d 7b04 ldr.w r7, [sp], #4
8005aa6: 4770 bx lr
8005aa8: e000ed00 .word 0xe000ed00
8005aac: 05fa0000 .word 0x05fa0000
08005ab0 <__NVIC_GetPriorityGrouping>:
{
8005ab0: b480 push {r7}
8005ab2: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8005ab4: 4b04 ldr r3, [pc, #16] @ (8005ac8 <__NVIC_GetPriorityGrouping+0x18>)
8005ab6: 68db ldr r3, [r3, #12]
8005ab8: 0a1b lsrs r3, r3, #8
8005aba: f003 0307 and.w r3, r3, #7
}
8005abe: 4618 mov r0, r3
8005ac0: 46bd mov sp, r7
8005ac2: f85d 7b04 ldr.w r7, [sp], #4
8005ac6: 4770 bx lr
8005ac8: e000ed00 .word 0xe000ed00
08005acc <__NVIC_EnableIRQ>:
{
8005acc: b480 push {r7}
8005ace: b083 sub sp, #12
8005ad0: af00 add r7, sp, #0
8005ad2: 4603 mov r3, r0
8005ad4: 80fb strh r3, [r7, #6]
if ((int32_t)(IRQn) >= 0)
8005ad6: f9b7 3006 ldrsh.w r3, [r7, #6]
8005ada: 2b00 cmp r3, #0
8005adc: db0b blt.n 8005af6 <__NVIC_EnableIRQ+0x2a>
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8005ade: 88fb ldrh r3, [r7, #6]
8005ae0: f003 021f and.w r2, r3, #31
8005ae4: 4907 ldr r1, [pc, #28] @ (8005b04 <__NVIC_EnableIRQ+0x38>)
8005ae6: f9b7 3006 ldrsh.w r3, [r7, #6]
8005aea: 095b lsrs r3, r3, #5
8005aec: 2001 movs r0, #1
8005aee: fa00 f202 lsl.w r2, r0, r2
8005af2: f841 2023 str.w r2, [r1, r3, lsl #2]
}
8005af6: bf00 nop
8005af8: 370c adds r7, #12
8005afa: 46bd mov sp, r7
8005afc: f85d 7b04 ldr.w r7, [sp], #4
8005b00: 4770 bx lr
8005b02: bf00 nop
8005b04: e000e100 .word 0xe000e100
08005b08 <__NVIC_SetPriority>:
{
8005b08: b480 push {r7}
8005b0a: b083 sub sp, #12
8005b0c: af00 add r7, sp, #0
8005b0e: 4603 mov r3, r0
8005b10: 6039 str r1, [r7, #0]
8005b12: 80fb strh r3, [r7, #6]
if ((int32_t)(IRQn) >= 0)
8005b14: f9b7 3006 ldrsh.w r3, [r7, #6]
8005b18: 2b00 cmp r3, #0
8005b1a: db0a blt.n 8005b32 <__NVIC_SetPriority+0x2a>
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8005b1c: 683b ldr r3, [r7, #0]
8005b1e: b2da uxtb r2, r3
8005b20: 490c ldr r1, [pc, #48] @ (8005b54 <__NVIC_SetPriority+0x4c>)
8005b22: f9b7 3006 ldrsh.w r3, [r7, #6]
8005b26: 0112 lsls r2, r2, #4
8005b28: b2d2 uxtb r2, r2
8005b2a: 440b add r3, r1
8005b2c: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
8005b30: e00a b.n 8005b48 <__NVIC_SetPriority+0x40>
SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8005b32: 683b ldr r3, [r7, #0]
8005b34: b2da uxtb r2, r3
8005b36: 4908 ldr r1, [pc, #32] @ (8005b58 <__NVIC_SetPriority+0x50>)
8005b38: 88fb ldrh r3, [r7, #6]
8005b3a: f003 030f and.w r3, r3, #15
8005b3e: 3b04 subs r3, #4
8005b40: 0112 lsls r2, r2, #4
8005b42: b2d2 uxtb r2, r2
8005b44: 440b add r3, r1
8005b46: 761a strb r2, [r3, #24]
}
8005b48: bf00 nop
8005b4a: 370c adds r7, #12
8005b4c: 46bd mov sp, r7
8005b4e: f85d 7b04 ldr.w r7, [sp], #4
8005b52: 4770 bx lr
8005b54: e000e100 .word 0xe000e100
8005b58: e000ed00 .word 0xe000ed00
08005b5c <NVIC_EncodePriority>:
{
8005b5c: b480 push {r7}
8005b5e: b089 sub sp, #36 @ 0x24
8005b60: af00 add r7, sp, #0
8005b62: 60f8 str r0, [r7, #12]
8005b64: 60b9 str r1, [r7, #8]
8005b66: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005b68: 68fb ldr r3, [r7, #12]
8005b6a: f003 0307 and.w r3, r3, #7
8005b6e: 61fb str r3, [r7, #28]
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8005b70: 69fb ldr r3, [r7, #28]
8005b72: f1c3 0307 rsb r3, r3, #7
8005b76: 2b04 cmp r3, #4
8005b78: bf28 it cs
8005b7a: 2304 movcs r3, #4
8005b7c: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8005b7e: 69fb ldr r3, [r7, #28]
8005b80: 3304 adds r3, #4
8005b82: 2b06 cmp r3, #6
8005b84: d902 bls.n 8005b8c <NVIC_EncodePriority+0x30>
8005b86: 69fb ldr r3, [r7, #28]
8005b88: 3b03 subs r3, #3
8005b8a: e000 b.n 8005b8e <NVIC_EncodePriority+0x32>
8005b8c: 2300 movs r3, #0
8005b8e: 617b str r3, [r7, #20]
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005b90: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
8005b94: 69bb ldr r3, [r7, #24]
8005b96: fa02 f303 lsl.w r3, r2, r3
8005b9a: 43da mvns r2, r3
8005b9c: 68bb ldr r3, [r7, #8]
8005b9e: 401a ands r2, r3
8005ba0: 697b ldr r3, [r7, #20]
8005ba2: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8005ba4: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8005ba8: 697b ldr r3, [r7, #20]
8005baa: fa01 f303 lsl.w r3, r1, r3
8005bae: 43d9 mvns r1, r3
8005bb0: 687b ldr r3, [r7, #4]
8005bb2: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005bb4: 4313 orrs r3, r2
}
8005bb6: 4618 mov r0, r3
8005bb8: 3724 adds r7, #36 @ 0x24
8005bba: 46bd mov sp, r7
8005bbc: f85d 7b04 ldr.w r7, [sp], #4
8005bc0: 4770 bx lr
08005bc2 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8005bc2: b580 push {r7, lr}
8005bc4: b082 sub sp, #8
8005bc6: af00 add r7, sp, #0
8005bc8: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8005bca: 6878 ldr r0, [r7, #4]
8005bcc: f7ff ff4c bl 8005a68 <__NVIC_SetPriorityGrouping>
}
8005bd0: bf00 nop
8005bd2: 3708 adds r7, #8
8005bd4: 46bd mov sp, r7
8005bd6: bd80 pop {r7, pc}
08005bd8 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8005bd8: b580 push {r7, lr}
8005bda: b086 sub sp, #24
8005bdc: af00 add r7, sp, #0
8005bde: 4603 mov r3, r0
8005be0: 60b9 str r1, [r7, #8]
8005be2: 607a str r2, [r7, #4]
8005be4: 81fb strh r3, [r7, #14]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8005be6: f7ff ff63 bl 8005ab0 <__NVIC_GetPriorityGrouping>
8005bea: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8005bec: 687a ldr r2, [r7, #4]
8005bee: 68b9 ldr r1, [r7, #8]
8005bf0: 6978 ldr r0, [r7, #20]
8005bf2: f7ff ffb3 bl 8005b5c <NVIC_EncodePriority>
8005bf6: 4602 mov r2, r0
8005bf8: f9b7 300e ldrsh.w r3, [r7, #14]
8005bfc: 4611 mov r1, r2
8005bfe: 4618 mov r0, r3
8005c00: f7ff ff82 bl 8005b08 <__NVIC_SetPriority>
}
8005c04: bf00 nop
8005c06: 3718 adds r7, #24
8005c08: 46bd mov sp, r7
8005c0a: bd80 pop {r7, pc}
08005c0c <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32h7xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8005c0c: b580 push {r7, lr}
8005c0e: b082 sub sp, #8
8005c10: af00 add r7, sp, #0
8005c12: 4603 mov r3, r0
8005c14: 80fb strh r3, [r7, #6]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8005c16: f9b7 3006 ldrsh.w r3, [r7, #6]
8005c1a: 4618 mov r0, r3
8005c1c: f7ff ff56 bl 8005acc <__NVIC_EnableIRQ>
}
8005c20: bf00 nop
8005c22: 3708 adds r7, #8
8005c24: 46bd mov sp, r7
8005c26: bd80 pop {r7, pc}
08005c28 <HAL_MPU_Disable>:
/**
* @brief Disables the MPU
* @retval None
*/
void HAL_MPU_Disable(void)
{
8005c28: b480 push {r7}
8005c2a: af00 add r7, sp, #0
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
__STATIC_FORCEINLINE void __DMB(void)
{
__ASM volatile ("dmb 0xF":::"memory");
8005c2c: f3bf 8f5f dmb sy
}
8005c30: bf00 nop
/* Make sure outstanding transfers are done */
__DMB();
/* Disable fault exceptions */
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
8005c32: 4b07 ldr r3, [pc, #28] @ (8005c50 <HAL_MPU_Disable+0x28>)
8005c34: 6a5b ldr r3, [r3, #36] @ 0x24
8005c36: 4a06 ldr r2, [pc, #24] @ (8005c50 <HAL_MPU_Disable+0x28>)
8005c38: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8005c3c: 6253 str r3, [r2, #36] @ 0x24
/* Disable the MPU and clear the control register*/
MPU->CTRL = 0;
8005c3e: 4b05 ldr r3, [pc, #20] @ (8005c54 <HAL_MPU_Disable+0x2c>)
8005c40: 2200 movs r2, #0
8005c42: 605a str r2, [r3, #4]
}
8005c44: bf00 nop
8005c46: 46bd mov sp, r7
8005c48: f85d 7b04 ldr.w r7, [sp], #4
8005c4c: 4770 bx lr
8005c4e: bf00 nop
8005c50: e000ed00 .word 0xe000ed00
8005c54: e000ed90 .word 0xe000ed90
08005c58 <HAL_MPU_Enable>:
* @arg MPU_PRIVILEGED_DEFAULT
* @arg MPU_HFNMI_PRIVDEF
* @retval None
*/
void HAL_MPU_Enable(uint32_t MPU_Control)
{
8005c58: b480 push {r7}
8005c5a: b083 sub sp, #12
8005c5c: af00 add r7, sp, #0
8005c5e: 6078 str r0, [r7, #4]
/* Enable the MPU */
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
8005c60: 4a0b ldr r2, [pc, #44] @ (8005c90 <HAL_MPU_Enable+0x38>)
8005c62: 687b ldr r3, [r7, #4]
8005c64: f043 0301 orr.w r3, r3, #1
8005c68: 6053 str r3, [r2, #4]
/* Enable fault exceptions */
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
8005c6a: 4b0a ldr r3, [pc, #40] @ (8005c94 <HAL_MPU_Enable+0x3c>)
8005c6c: 6a5b ldr r3, [r3, #36] @ 0x24
8005c6e: 4a09 ldr r2, [pc, #36] @ (8005c94 <HAL_MPU_Enable+0x3c>)
8005c70: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8005c74: 6253 str r3, [r2, #36] @ 0x24
__ASM volatile ("dsb 0xF":::"memory");
8005c76: f3bf 8f4f dsb sy
}
8005c7a: bf00 nop
__ASM volatile ("isb 0xF":::"memory");
8005c7c: f3bf 8f6f isb sy
}
8005c80: bf00 nop
/* Ensure MPU setting take effects */
__DSB();
__ISB();
}
8005c82: bf00 nop
8005c84: 370c adds r7, #12
8005c86: 46bd mov sp, r7
8005c88: f85d 7b04 ldr.w r7, [sp], #4
8005c8c: 4770 bx lr
8005c8e: bf00 nop
8005c90: e000ed90 .word 0xe000ed90
8005c94: e000ed00 .word 0xe000ed00
08005c98 <HAL_MPU_ConfigRegion>:
* @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
* the initialization and configuration information.
* @retval None
*/
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
{
8005c98: b480 push {r7}
8005c9a: b083 sub sp, #12
8005c9c: af00 add r7, sp, #0
8005c9e: 6078 str r0, [r7, #4]
assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
/* Set the Region number */
MPU->RNR = MPU_Init->Number;
8005ca0: 687b ldr r3, [r7, #4]
8005ca2: 785a ldrb r2, [r3, #1]
8005ca4: 4b1b ldr r3, [pc, #108] @ (8005d14 <HAL_MPU_ConfigRegion+0x7c>)
8005ca6: 609a str r2, [r3, #8]
/* Disable the Region */
CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
8005ca8: 4b1a ldr r3, [pc, #104] @ (8005d14 <HAL_MPU_ConfigRegion+0x7c>)
8005caa: 691b ldr r3, [r3, #16]
8005cac: 4a19 ldr r2, [pc, #100] @ (8005d14 <HAL_MPU_ConfigRegion+0x7c>)
8005cae: f023 0301 bic.w r3, r3, #1
8005cb2: 6113 str r3, [r2, #16]
/* Apply configuration */
MPU->RBAR = MPU_Init->BaseAddress;
8005cb4: 4a17 ldr r2, [pc, #92] @ (8005d14 <HAL_MPU_ConfigRegion+0x7c>)
8005cb6: 687b ldr r3, [r7, #4]
8005cb8: 685b ldr r3, [r3, #4]
8005cba: 60d3 str r3, [r2, #12]
MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
8005cbc: 687b ldr r3, [r7, #4]
8005cbe: 7b1b ldrb r3, [r3, #12]
8005cc0: 071a lsls r2, r3, #28
((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
8005cc2: 687b ldr r3, [r7, #4]
8005cc4: 7adb ldrb r3, [r3, #11]
8005cc6: 061b lsls r3, r3, #24
MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
8005cc8: 431a orrs r2, r3
((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
8005cca: 687b ldr r3, [r7, #4]
8005ccc: 7a9b ldrb r3, [r3, #10]
8005cce: 04db lsls r3, r3, #19
((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
8005cd0: 431a orrs r2, r3
((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
8005cd2: 687b ldr r3, [r7, #4]
8005cd4: 7b5b ldrb r3, [r3, #13]
8005cd6: 049b lsls r3, r3, #18
((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
8005cd8: 431a orrs r2, r3
((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
8005cda: 687b ldr r3, [r7, #4]
8005cdc: 7b9b ldrb r3, [r3, #14]
8005cde: 045b lsls r3, r3, #17
((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
8005ce0: 431a orrs r2, r3
((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
8005ce2: 687b ldr r3, [r7, #4]
8005ce4: 7bdb ldrb r3, [r3, #15]
8005ce6: 041b lsls r3, r3, #16
((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
8005ce8: 431a orrs r2, r3
((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
8005cea: 687b ldr r3, [r7, #4]
8005cec: 7a5b ldrb r3, [r3, #9]
8005cee: 021b lsls r3, r3, #8
((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
8005cf0: 431a orrs r2, r3
((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
8005cf2: 687b ldr r3, [r7, #4]
8005cf4: 7a1b ldrb r3, [r3, #8]
8005cf6: 005b lsls r3, r3, #1
((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
8005cf8: 4313 orrs r3, r2
((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
8005cfa: 687a ldr r2, [r7, #4]
8005cfc: 7812 ldrb r2, [r2, #0]
8005cfe: 4611 mov r1, r2
MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
8005d00: 4a04 ldr r2, [pc, #16] @ (8005d14 <HAL_MPU_ConfigRegion+0x7c>)
((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
8005d02: 430b orrs r3, r1
MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
8005d04: 6113 str r3, [r2, #16]
}
8005d06: bf00 nop
8005d08: 370c adds r7, #12
8005d0a: 46bd mov sp, r7
8005d0c: f85d 7b04 ldr.w r7, [sp], #4
8005d10: 4770 bx lr
8005d12: bf00 nop
8005d14: e000ed90 .word 0xe000ed90
08005d18 <HAL_CRC_Init>:
* parameters in the CRC_InitTypeDef and create the associated handle.
* @param hcrc CRC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
{
8005d18: b580 push {r7, lr}
8005d1a: b082 sub sp, #8
8005d1c: af00 add r7, sp, #0
8005d1e: 6078 str r0, [r7, #4]
/* Check the CRC handle allocation */
if (hcrc == NULL)
8005d20: 687b ldr r3, [r7, #4]
8005d22: 2b00 cmp r3, #0
8005d24: d101 bne.n 8005d2a <HAL_CRC_Init+0x12>
{
return HAL_ERROR;
8005d26: 2301 movs r3, #1
8005d28: e054 b.n 8005dd4 <HAL_CRC_Init+0xbc>
}
/* Check the parameters */
assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));
if (hcrc->State == HAL_CRC_STATE_RESET)
8005d2a: 687b ldr r3, [r7, #4]
8005d2c: 7f5b ldrb r3, [r3, #29]
8005d2e: b2db uxtb r3, r3
8005d30: 2b00 cmp r3, #0
8005d32: d105 bne.n 8005d40 <HAL_CRC_Init+0x28>
{
/* Allocate lock resource and initialize it */
hcrc->Lock = HAL_UNLOCKED;
8005d34: 687b ldr r3, [r7, #4]
8005d36: 2200 movs r2, #0
8005d38: 771a strb r2, [r3, #28]
/* Init the low level hardware */
HAL_CRC_MspInit(hcrc);
8005d3a: 6878 ldr r0, [r7, #4]
8005d3c: f7fd ff46 bl 8003bcc <HAL_CRC_MspInit>
}
hcrc->State = HAL_CRC_STATE_BUSY;
8005d40: 687b ldr r3, [r7, #4]
8005d42: 2202 movs r2, #2
8005d44: 775a strb r2, [r3, #29]
/* check whether or not non-default generating polynomial has been
* picked up by user */
assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse));
if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
8005d46: 687b ldr r3, [r7, #4]
8005d48: 791b ldrb r3, [r3, #4]
8005d4a: 2b00 cmp r3, #0
8005d4c: d10c bne.n 8005d68 <HAL_CRC_Init+0x50>
{
/* initialize peripheral with default generating polynomial */
WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);
8005d4e: 687b ldr r3, [r7, #4]
8005d50: 681b ldr r3, [r3, #0]
8005d52: 4a22 ldr r2, [pc, #136] @ (8005ddc <HAL_CRC_Init+0xc4>)
8005d54: 615a str r2, [r3, #20]
MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
8005d56: 687b ldr r3, [r7, #4]
8005d58: 681b ldr r3, [r3, #0]
8005d5a: 689a ldr r2, [r3, #8]
8005d5c: 687b ldr r3, [r7, #4]
8005d5e: 681b ldr r3, [r3, #0]
8005d60: f022 0218 bic.w r2, r2, #24
8005d64: 609a str r2, [r3, #8]
8005d66: e00c b.n 8005d82 <HAL_CRC_Init+0x6a>
}
else
{
/* initialize CRC peripheral with generating polynomial defined by user */
if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
8005d68: 687b ldr r3, [r7, #4]
8005d6a: 6899 ldr r1, [r3, #8]
8005d6c: 687b ldr r3, [r7, #4]
8005d6e: 68db ldr r3, [r3, #12]
8005d70: 461a mov r2, r3
8005d72: 6878 ldr r0, [r7, #4]
8005d74: f000 f948 bl 8006008 <HAL_CRCEx_Polynomial_Set>
8005d78: 4603 mov r3, r0
8005d7a: 2b00 cmp r3, #0
8005d7c: d001 beq.n 8005d82 <HAL_CRC_Init+0x6a>
{
return HAL_ERROR;
8005d7e: 2301 movs r3, #1
8005d80: e028 b.n 8005dd4 <HAL_CRC_Init+0xbc>
}
/* check whether or not non-default CRC initial value has been
* picked up by user */
assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
8005d82: 687b ldr r3, [r7, #4]
8005d84: 795b ldrb r3, [r3, #5]
8005d86: 2b00 cmp r3, #0
8005d88: d105 bne.n 8005d96 <HAL_CRC_Init+0x7e>
{
WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);
8005d8a: 687b ldr r3, [r7, #4]
8005d8c: 681b ldr r3, [r3, #0]
8005d8e: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
8005d92: 611a str r2, [r3, #16]
8005d94: e004 b.n 8005da0 <HAL_CRC_Init+0x88>
}
else
{
WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
8005d96: 687b ldr r3, [r7, #4]
8005d98: 681b ldr r3, [r3, #0]
8005d9a: 687a ldr r2, [r7, #4]
8005d9c: 6912 ldr r2, [r2, #16]
8005d9e: 611a str r2, [r3, #16]
}
/* set input data inversion mode */
assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode));
MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode);
8005da0: 687b ldr r3, [r7, #4]
8005da2: 681b ldr r3, [r3, #0]
8005da4: 689b ldr r3, [r3, #8]
8005da6: f023 0160 bic.w r1, r3, #96 @ 0x60
8005daa: 687b ldr r3, [r7, #4]
8005dac: 695a ldr r2, [r3, #20]
8005dae: 687b ldr r3, [r7, #4]
8005db0: 681b ldr r3, [r3, #0]
8005db2: 430a orrs r2, r1
8005db4: 609a str r2, [r3, #8]
/* set output data inversion mode */
assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode));
MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);
8005db6: 687b ldr r3, [r7, #4]
8005db8: 681b ldr r3, [r3, #0]
8005dba: 689b ldr r3, [r3, #8]
8005dbc: f023 0180 bic.w r1, r3, #128 @ 0x80
8005dc0: 687b ldr r3, [r7, #4]
8005dc2: 699a ldr r2, [r3, #24]
8005dc4: 687b ldr r3, [r7, #4]
8005dc6: 681b ldr r3, [r3, #0]
8005dc8: 430a orrs r2, r1
8005dca: 609a str r2, [r3, #8]
/* makes sure the input data format (bytes, halfwords or words stream)
* is properly specified by user */
assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
8005dcc: 687b ldr r3, [r7, #4]
8005dce: 2201 movs r2, #1
8005dd0: 775a strb r2, [r3, #29]
/* Return function status */
return HAL_OK;
8005dd2: 2300 movs r3, #0
}
8005dd4: 4618 mov r0, r3
8005dd6: 3708 adds r7, #8
8005dd8: 46bd mov sp, r7
8005dda: bd80 pop {r7, pc}
8005ddc: 04c11db7 .word 0x04c11db7
08005de0 <HAL_CRC_Calculate>:
* and the API will internally adjust its input data processing based on the
* handle field hcrc->InputDataFormat.
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
8005de0: b580 push {r7, lr}
8005de2: b086 sub sp, #24
8005de4: af00 add r7, sp, #0
8005de6: 60f8 str r0, [r7, #12]
8005de8: 60b9 str r1, [r7, #8]
8005dea: 607a str r2, [r7, #4]
uint32_t index; /* CRC input data buffer index */
uint32_t temp = 0U; /* CRC output (read from hcrc->Instance->DR register) */
8005dec: 2300 movs r3, #0
8005dee: 613b str r3, [r7, #16]
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_BUSY;
8005df0: 68fb ldr r3, [r7, #12]
8005df2: 2202 movs r2, #2
8005df4: 775a strb r2, [r3, #29]
/* Reset CRC Calculation Unit (hcrc->Instance->INIT is
* written in hcrc->Instance->DR) */
__HAL_CRC_DR_RESET(hcrc);
8005df6: 68fb ldr r3, [r7, #12]
8005df8: 681b ldr r3, [r3, #0]
8005dfa: 689a ldr r2, [r3, #8]
8005dfc: 68fb ldr r3, [r7, #12]
8005dfe: 681b ldr r3, [r3, #0]
8005e00: f042 0201 orr.w r2, r2, #1
8005e04: 609a str r2, [r3, #8]
switch (hcrc->InputDataFormat)
8005e06: 68fb ldr r3, [r7, #12]
8005e08: 6a1b ldr r3, [r3, #32]
8005e0a: 2b03 cmp r3, #3
8005e0c: d006 beq.n 8005e1c <HAL_CRC_Calculate+0x3c>
8005e0e: 2b03 cmp r3, #3
8005e10: d829 bhi.n 8005e66 <HAL_CRC_Calculate+0x86>
8005e12: 2b01 cmp r3, #1
8005e14: d019 beq.n 8005e4a <HAL_CRC_Calculate+0x6a>
8005e16: 2b02 cmp r3, #2
8005e18: d01e beq.n 8005e58 <HAL_CRC_Calculate+0x78>
/* Specific 16-bit input data handling */
temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength); /* Derogation MisraC2012 R.11.5 */
break;
default:
break;
8005e1a: e024 b.n 8005e66 <HAL_CRC_Calculate+0x86>
for (index = 0U; index < BufferLength; index++)
8005e1c: 2300 movs r3, #0
8005e1e: 617b str r3, [r7, #20]
8005e20: e00a b.n 8005e38 <HAL_CRC_Calculate+0x58>
hcrc->Instance->DR = pBuffer[index];
8005e22: 697b ldr r3, [r7, #20]
8005e24: 009b lsls r3, r3, #2
8005e26: 68ba ldr r2, [r7, #8]
8005e28: 441a add r2, r3
8005e2a: 68fb ldr r3, [r7, #12]
8005e2c: 681b ldr r3, [r3, #0]
8005e2e: 6812 ldr r2, [r2, #0]
8005e30: 601a str r2, [r3, #0]
for (index = 0U; index < BufferLength; index++)
8005e32: 697b ldr r3, [r7, #20]
8005e34: 3301 adds r3, #1
8005e36: 617b str r3, [r7, #20]
8005e38: 697a ldr r2, [r7, #20]
8005e3a: 687b ldr r3, [r7, #4]
8005e3c: 429a cmp r2, r3
8005e3e: d3f0 bcc.n 8005e22 <HAL_CRC_Calculate+0x42>
temp = hcrc->Instance->DR;
8005e40: 68fb ldr r3, [r7, #12]
8005e42: 681b ldr r3, [r3, #0]
8005e44: 681b ldr r3, [r3, #0]
8005e46: 613b str r3, [r7, #16]
break;
8005e48: e00e b.n 8005e68 <HAL_CRC_Calculate+0x88>
temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
8005e4a: 687a ldr r2, [r7, #4]
8005e4c: 68b9 ldr r1, [r7, #8]
8005e4e: 68f8 ldr r0, [r7, #12]
8005e50: f000 f812 bl 8005e78 <CRC_Handle_8>
8005e54: 6138 str r0, [r7, #16]
break;
8005e56: e007 b.n 8005e68 <HAL_CRC_Calculate+0x88>
temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength); /* Derogation MisraC2012 R.11.5 */
8005e58: 687a ldr r2, [r7, #4]
8005e5a: 68b9 ldr r1, [r7, #8]
8005e5c: 68f8 ldr r0, [r7, #12]
8005e5e: f000 f899 bl 8005f94 <CRC_Handle_16>
8005e62: 6138 str r0, [r7, #16]
break;
8005e64: e000 b.n 8005e68 <HAL_CRC_Calculate+0x88>
break;
8005e66: bf00 nop
}
/* Change CRC peripheral state */
hcrc->State = HAL_CRC_STATE_READY;
8005e68: 68fb ldr r3, [r7, #12]
8005e6a: 2201 movs r2, #1
8005e6c: 775a strb r2, [r3, #29]
/* Return the CRC computed value */
return temp;
8005e6e: 693b ldr r3, [r7, #16]
}
8005e70: 4618 mov r0, r3
8005e72: 3718 adds r7, #24
8005e74: 46bd mov sp, r7
8005e76: bd80 pop {r7, pc}
08005e78 <CRC_Handle_8>:
* @param pBuffer pointer to the input data buffer
* @param BufferLength input data buffer length
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
{
8005e78: b480 push {r7}
8005e7a: b089 sub sp, #36 @ 0x24
8005e7c: af00 add r7, sp, #0
8005e7e: 60f8 str r0, [r7, #12]
8005e80: 60b9 str r1, [r7, #8]
8005e82: 607a str r2, [r7, #4]
__IO uint16_t *pReg;
/* Processing time optimization: 4 bytes are entered in a row with a single word write,
* last bytes must be carefully fed to the CRC calculator to ensure a correct type
* handling by the peripheral */
for (i = 0U; i < (BufferLength / 4U); i++)
8005e84: 2300 movs r3, #0
8005e86: 61fb str r3, [r7, #28]
8005e88: e023 b.n 8005ed2 <CRC_Handle_8+0x5a>
{
hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
8005e8a: 69fb ldr r3, [r7, #28]
8005e8c: 009b lsls r3, r3, #2
8005e8e: 68ba ldr r2, [r7, #8]
8005e90: 4413 add r3, r2
8005e92: 781b ldrb r3, [r3, #0]
8005e94: 061a lsls r2, r3, #24
((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
8005e96: 69fb ldr r3, [r7, #28]
8005e98: 009b lsls r3, r3, #2
8005e9a: 3301 adds r3, #1
8005e9c: 68b9 ldr r1, [r7, #8]
8005e9e: 440b add r3, r1
8005ea0: 781b ldrb r3, [r3, #0]
8005ea2: 041b lsls r3, r3, #16
hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
8005ea4: 431a orrs r2, r3
((uint32_t)pBuffer[(4U * i) + 2U] << 8U) | \
8005ea6: 69fb ldr r3, [r7, #28]
8005ea8: 009b lsls r3, r3, #2
8005eaa: 3302 adds r3, #2
8005eac: 68b9 ldr r1, [r7, #8]
8005eae: 440b add r3, r1
8005eb0: 781b ldrb r3, [r3, #0]
8005eb2: 021b lsls r3, r3, #8
((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
8005eb4: 431a orrs r2, r3
(uint32_t)pBuffer[(4U * i) + 3U];
8005eb6: 69fb ldr r3, [r7, #28]
8005eb8: 009b lsls r3, r3, #2
8005eba: 3303 adds r3, #3
8005ebc: 68b9 ldr r1, [r7, #8]
8005ebe: 440b add r3, r1
8005ec0: 781b ldrb r3, [r3, #0]
8005ec2: 4619 mov r1, r3
hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
8005ec4: 68fb ldr r3, [r7, #12]
8005ec6: 681b ldr r3, [r3, #0]
((uint32_t)pBuffer[(4U * i) + 2U] << 8U) | \
8005ec8: 430a orrs r2, r1
hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
8005eca: 601a str r2, [r3, #0]
for (i = 0U; i < (BufferLength / 4U); i++)
8005ecc: 69fb ldr r3, [r7, #28]
8005ece: 3301 adds r3, #1
8005ed0: 61fb str r3, [r7, #28]
8005ed2: 687b ldr r3, [r7, #4]
8005ed4: 089b lsrs r3, r3, #2
8005ed6: 69fa ldr r2, [r7, #28]
8005ed8: 429a cmp r2, r3
8005eda: d3d6 bcc.n 8005e8a <CRC_Handle_8+0x12>
}
/* last bytes specific handling */
if ((BufferLength % 4U) != 0U)
8005edc: 687b ldr r3, [r7, #4]
8005ede: f003 0303 and.w r3, r3, #3
8005ee2: 2b00 cmp r3, #0
8005ee4: d04d beq.n 8005f82 <CRC_Handle_8+0x10a>
{
if ((BufferLength % 4U) == 1U)
8005ee6: 687b ldr r3, [r7, #4]
8005ee8: f003 0303 and.w r3, r3, #3
8005eec: 2b01 cmp r3, #1
8005eee: d107 bne.n 8005f00 <CRC_Handle_8+0x88>
{
*(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i]; /* Derogation MisraC2012 R.11.5 */
8005ef0: 69fb ldr r3, [r7, #28]
8005ef2: 009b lsls r3, r3, #2
8005ef4: 68ba ldr r2, [r7, #8]
8005ef6: 4413 add r3, r2
8005ef8: 68fa ldr r2, [r7, #12]
8005efa: 6812 ldr r2, [r2, #0]
8005efc: 781b ldrb r3, [r3, #0]
8005efe: 7013 strb r3, [r2, #0]
}
if ((BufferLength % 4U) == 2U)
8005f00: 687b ldr r3, [r7, #4]
8005f02: f003 0303 and.w r3, r3, #3
8005f06: 2b02 cmp r3, #2
8005f08: d116 bne.n 8005f38 <CRC_Handle_8+0xc0>
{
data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
8005f0a: 69fb ldr r3, [r7, #28]
8005f0c: 009b lsls r3, r3, #2
8005f0e: 68ba ldr r2, [r7, #8]
8005f10: 4413 add r3, r2
8005f12: 781b ldrb r3, [r3, #0]
8005f14: 021b lsls r3, r3, #8
8005f16: b21a sxth r2, r3
8005f18: 69fb ldr r3, [r7, #28]
8005f1a: 009b lsls r3, r3, #2
8005f1c: 3301 adds r3, #1
8005f1e: 68b9 ldr r1, [r7, #8]
8005f20: 440b add r3, r1
8005f22: 781b ldrb r3, [r3, #0]
8005f24: b21b sxth r3, r3
8005f26: 4313 orrs r3, r2
8005f28: b21b sxth r3, r3
8005f2a: 837b strh r3, [r7, #26]
pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
8005f2c: 68fb ldr r3, [r7, #12]
8005f2e: 681b ldr r3, [r3, #0]
8005f30: 617b str r3, [r7, #20]
*pReg = data;
8005f32: 697b ldr r3, [r7, #20]
8005f34: 8b7a ldrh r2, [r7, #26]
8005f36: 801a strh r2, [r3, #0]
}
if ((BufferLength % 4U) == 3U)
8005f38: 687b ldr r3, [r7, #4]
8005f3a: f003 0303 and.w r3, r3, #3
8005f3e: 2b03 cmp r3, #3
8005f40: d11f bne.n 8005f82 <CRC_Handle_8+0x10a>
{
data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
8005f42: 69fb ldr r3, [r7, #28]
8005f44: 009b lsls r3, r3, #2
8005f46: 68ba ldr r2, [r7, #8]
8005f48: 4413 add r3, r2
8005f4a: 781b ldrb r3, [r3, #0]
8005f4c: 021b lsls r3, r3, #8
8005f4e: b21a sxth r2, r3
8005f50: 69fb ldr r3, [r7, #28]
8005f52: 009b lsls r3, r3, #2
8005f54: 3301 adds r3, #1
8005f56: 68b9 ldr r1, [r7, #8]
8005f58: 440b add r3, r1
8005f5a: 781b ldrb r3, [r3, #0]
8005f5c: b21b sxth r3, r3
8005f5e: 4313 orrs r3, r2
8005f60: b21b sxth r3, r3
8005f62: 837b strh r3, [r7, #26]
pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
8005f64: 68fb ldr r3, [r7, #12]
8005f66: 681b ldr r3, [r3, #0]
8005f68: 617b str r3, [r7, #20]
*pReg = data;
8005f6a: 697b ldr r3, [r7, #20]
8005f6c: 8b7a ldrh r2, [r7, #26]
8005f6e: 801a strh r2, [r3, #0]
*(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U]; /* Derogation MisraC2012 R.11.5 */
8005f70: 69fb ldr r3, [r7, #28]
8005f72: 009b lsls r3, r3, #2
8005f74: 3302 adds r3, #2
8005f76: 68ba ldr r2, [r7, #8]
8005f78: 4413 add r3, r2
8005f7a: 68fa ldr r2, [r7, #12]
8005f7c: 6812 ldr r2, [r2, #0]
8005f7e: 781b ldrb r3, [r3, #0]
8005f80: 7013 strb r3, [r2, #0]
}
}
/* Return the CRC computed value */
return hcrc->Instance->DR;
8005f82: 68fb ldr r3, [r7, #12]
8005f84: 681b ldr r3, [r3, #0]
8005f86: 681b ldr r3, [r3, #0]
}
8005f88: 4618 mov r0, r3
8005f8a: 3724 adds r7, #36 @ 0x24
8005f8c: 46bd mov sp, r7
8005f8e: f85d 7b04 ldr.w r7, [sp], #4
8005f92: 4770 bx lr
08005f94 <CRC_Handle_16>:
* @param pBuffer pointer to the input data buffer
* @param BufferLength input data buffer length
* @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
*/
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
{
8005f94: b480 push {r7}
8005f96: b087 sub sp, #28
8005f98: af00 add r7, sp, #0
8005f9a: 60f8 str r0, [r7, #12]
8005f9c: 60b9 str r1, [r7, #8]
8005f9e: 607a str r2, [r7, #4]
__IO uint16_t *pReg;
/* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
* in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure
* a correct type handling by the peripheral */
for (i = 0U; i < (BufferLength / 2U); i++)
8005fa0: 2300 movs r3, #0
8005fa2: 617b str r3, [r7, #20]
8005fa4: e013 b.n 8005fce <CRC_Handle_16+0x3a>
{
hcrc->Instance->DR = ((uint32_t)pBuffer[2U * i] << 16U) | (uint32_t)pBuffer[(2U * i) + 1U];
8005fa6: 697b ldr r3, [r7, #20]
8005fa8: 009b lsls r3, r3, #2
8005faa: 68ba ldr r2, [r7, #8]
8005fac: 4413 add r3, r2
8005fae: 881b ldrh r3, [r3, #0]
8005fb0: 041a lsls r2, r3, #16
8005fb2: 697b ldr r3, [r7, #20]
8005fb4: 009b lsls r3, r3, #2
8005fb6: 3302 adds r3, #2
8005fb8: 68b9 ldr r1, [r7, #8]
8005fba: 440b add r3, r1
8005fbc: 881b ldrh r3, [r3, #0]
8005fbe: 4619 mov r1, r3
8005fc0: 68fb ldr r3, [r7, #12]
8005fc2: 681b ldr r3, [r3, #0]
8005fc4: 430a orrs r2, r1
8005fc6: 601a str r2, [r3, #0]
for (i = 0U; i < (BufferLength / 2U); i++)
8005fc8: 697b ldr r3, [r7, #20]
8005fca: 3301 adds r3, #1
8005fcc: 617b str r3, [r7, #20]
8005fce: 687b ldr r3, [r7, #4]
8005fd0: 085b lsrs r3, r3, #1
8005fd2: 697a ldr r2, [r7, #20]
8005fd4: 429a cmp r2, r3
8005fd6: d3e6 bcc.n 8005fa6 <CRC_Handle_16+0x12>
}
if ((BufferLength % 2U) != 0U)
8005fd8: 687b ldr r3, [r7, #4]
8005fda: f003 0301 and.w r3, r3, #1
8005fde: 2b00 cmp r3, #0
8005fe0: d009 beq.n 8005ff6 <CRC_Handle_16+0x62>
{
pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR); /* Derogation MisraC2012 R.11.5 */
8005fe2: 68fb ldr r3, [r7, #12]
8005fe4: 681b ldr r3, [r3, #0]
8005fe6: 613b str r3, [r7, #16]
*pReg = pBuffer[2U * i];
8005fe8: 697b ldr r3, [r7, #20]
8005fea: 009b lsls r3, r3, #2
8005fec: 68ba ldr r2, [r7, #8]
8005fee: 4413 add r3, r2
8005ff0: 881a ldrh r2, [r3, #0]
8005ff2: 693b ldr r3, [r7, #16]
8005ff4: 801a strh r2, [r3, #0]
}
/* Return the CRC computed value */
return hcrc->Instance->DR;
8005ff6: 68fb ldr r3, [r7, #12]
8005ff8: 681b ldr r3, [r3, #0]
8005ffa: 681b ldr r3, [r3, #0]
}
8005ffc: 4618 mov r0, r3
8005ffe: 371c adds r7, #28
8006000: 46bd mov sp, r7
8006002: f85d 7b04 ldr.w r7, [sp], #4
8006006: 4770 bx lr
08006008 <HAL_CRCEx_Polynomial_Set>:
* @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16)
* @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32)
* @retval HAL status
*/
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
{
8006008: b480 push {r7}
800600a: b087 sub sp, #28
800600c: af00 add r7, sp, #0
800600e: 60f8 str r0, [r7, #12]
8006010: 60b9 str r1, [r7, #8]
8006012: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8006014: 2300 movs r3, #0
8006016: 75fb strb r3, [r7, #23]
uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
8006018: 231f movs r3, #31
800601a: 613b str r3, [r7, #16]
/* Check the parameters */
assert_param(IS_CRC_POL_LENGTH(PolyLength));
/* Ensure that the generating polynomial is odd */
if ((Pol & (uint32_t)(0x1U)) == 0U)
800601c: 68bb ldr r3, [r7, #8]
800601e: f003 0301 and.w r3, r3, #1
8006022: 2b00 cmp r3, #0
8006024: d102 bne.n 800602c <HAL_CRCEx_Polynomial_Set+0x24>
{
status = HAL_ERROR;
8006026: 2301 movs r3, #1
8006028: 75fb strb r3, [r7, #23]
800602a: e063 b.n 80060f4 <HAL_CRCEx_Polynomial_Set+0xec>
* definition. HAL_ERROR is reported if Pol degree is
* larger than that indicated by PolyLength.
* Look for MSB position: msb will contain the degree of
* the second to the largest polynomial member. E.g., for
* X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U))
800602c: bf00 nop
800602e: 693b ldr r3, [r7, #16]
8006030: 1e5a subs r2, r3, #1
8006032: 613a str r2, [r7, #16]
8006034: 2b00 cmp r3, #0
8006036: d009 beq.n 800604c <HAL_CRCEx_Polynomial_Set+0x44>
8006038: 693b ldr r3, [r7, #16]
800603a: f003 031f and.w r3, r3, #31
800603e: 68ba ldr r2, [r7, #8]
8006040: fa22 f303 lsr.w r3, r2, r3
8006044: f003 0301 and.w r3, r3, #1
8006048: 2b00 cmp r3, #0
800604a: d0f0 beq.n 800602e <HAL_CRCEx_Polynomial_Set+0x26>
{
}
switch (PolyLength)
800604c: 687b ldr r3, [r7, #4]
800604e: 2b18 cmp r3, #24
8006050: d846 bhi.n 80060e0 <HAL_CRCEx_Polynomial_Set+0xd8>
8006052: a201 add r2, pc, #4 @ (adr r2, 8006058 <HAL_CRCEx_Polynomial_Set+0x50>)
8006054: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006058: 080060e7 .word 0x080060e7
800605c: 080060e1 .word 0x080060e1
8006060: 080060e1 .word 0x080060e1
8006064: 080060e1 .word 0x080060e1
8006068: 080060e1 .word 0x080060e1
800606c: 080060e1 .word 0x080060e1
8006070: 080060e1 .word 0x080060e1
8006074: 080060e1 .word 0x080060e1
8006078: 080060d5 .word 0x080060d5
800607c: 080060e1 .word 0x080060e1
8006080: 080060e1 .word 0x080060e1
8006084: 080060e1 .word 0x080060e1
8006088: 080060e1 .word 0x080060e1
800608c: 080060e1 .word 0x080060e1
8006090: 080060e1 .word 0x080060e1
8006094: 080060e1 .word 0x080060e1
8006098: 080060c9 .word 0x080060c9
800609c: 080060e1 .word 0x080060e1
80060a0: 080060e1 .word 0x080060e1
80060a4: 080060e1 .word 0x080060e1
80060a8: 080060e1 .word 0x080060e1
80060ac: 080060e1 .word 0x080060e1
80060b0: 080060e1 .word 0x080060e1
80060b4: 080060e1 .word 0x080060e1
80060b8: 080060bd .word 0x080060bd
{
case CRC_POLYLENGTH_7B:
if (msb >= HAL_CRC_LENGTH_7B)
80060bc: 693b ldr r3, [r7, #16]
80060be: 2b06 cmp r3, #6
80060c0: d913 bls.n 80060ea <HAL_CRCEx_Polynomial_Set+0xe2>
{
status = HAL_ERROR;
80060c2: 2301 movs r3, #1
80060c4: 75fb strb r3, [r7, #23]
}
break;
80060c6: e010 b.n 80060ea <HAL_CRCEx_Polynomial_Set+0xe2>
case CRC_POLYLENGTH_8B:
if (msb >= HAL_CRC_LENGTH_8B)
80060c8: 693b ldr r3, [r7, #16]
80060ca: 2b07 cmp r3, #7
80060cc: d90f bls.n 80060ee <HAL_CRCEx_Polynomial_Set+0xe6>
{
status = HAL_ERROR;
80060ce: 2301 movs r3, #1
80060d0: 75fb strb r3, [r7, #23]
}
break;
80060d2: e00c b.n 80060ee <HAL_CRCEx_Polynomial_Set+0xe6>
case CRC_POLYLENGTH_16B:
if (msb >= HAL_CRC_LENGTH_16B)
80060d4: 693b ldr r3, [r7, #16]
80060d6: 2b0f cmp r3, #15
80060d8: d90b bls.n 80060f2 <HAL_CRCEx_Polynomial_Set+0xea>
{
status = HAL_ERROR;
80060da: 2301 movs r3, #1
80060dc: 75fb strb r3, [r7, #23]
}
break;
80060de: e008 b.n 80060f2 <HAL_CRCEx_Polynomial_Set+0xea>
case CRC_POLYLENGTH_32B:
/* no polynomial definition vs. polynomial length issue possible */
break;
default:
status = HAL_ERROR;
80060e0: 2301 movs r3, #1
80060e2: 75fb strb r3, [r7, #23]
break;
80060e4: e006 b.n 80060f4 <HAL_CRCEx_Polynomial_Set+0xec>
break;
80060e6: bf00 nop
80060e8: e004 b.n 80060f4 <HAL_CRCEx_Polynomial_Set+0xec>
break;
80060ea: bf00 nop
80060ec: e002 b.n 80060f4 <HAL_CRCEx_Polynomial_Set+0xec>
break;
80060ee: bf00 nop
80060f0: e000 b.n 80060f4 <HAL_CRCEx_Polynomial_Set+0xec>
break;
80060f2: bf00 nop
}
}
if (status == HAL_OK)
80060f4: 7dfb ldrb r3, [r7, #23]
80060f6: 2b00 cmp r3, #0
80060f8: d10d bne.n 8006116 <HAL_CRCEx_Polynomial_Set+0x10e>
{
/* set generating polynomial */
WRITE_REG(hcrc->Instance->POL, Pol);
80060fa: 68fb ldr r3, [r7, #12]
80060fc: 681b ldr r3, [r3, #0]
80060fe: 68ba ldr r2, [r7, #8]
8006100: 615a str r2, [r3, #20]
/* set generating polynomial size */
MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);
8006102: 68fb ldr r3, [r7, #12]
8006104: 681b ldr r3, [r3, #0]
8006106: 689b ldr r3, [r3, #8]
8006108: f023 0118 bic.w r1, r3, #24
800610c: 68fb ldr r3, [r7, #12]
800610e: 681b ldr r3, [r3, #0]
8006110: 687a ldr r2, [r7, #4]
8006112: 430a orrs r2, r1
8006114: 609a str r2, [r3, #8]
}
/* Return function status */
return status;
8006116: 7dfb ldrb r3, [r7, #23]
}
8006118: 4618 mov r0, r3
800611a: 371c adds r7, #28
800611c: 46bd mov sp, r7
800611e: f85d 7b04 ldr.w r7, [sp], #4
8006122: 4770 bx lr
08006124 <HAL_DMA_Init>:
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8006124: b580 push {r7, lr}
8006126: b086 sub sp, #24
8006128: af00 add r7, sp, #0
800612a: 6078 str r0, [r7, #4]
uint32_t registerValue;
uint32_t tickstart = HAL_GetTick();
800612c: f7ff fc4c bl 80059c8 <HAL_GetTick>
8006130: 6138 str r0, [r7, #16]
DMA_Base_Registers *regs_dma;
BDMA_Base_Registers *regs_bdma;
/* Check the DMA peripheral handle */
if(hdma == NULL)
8006132: 687b ldr r3, [r7, #4]
8006134: 2b00 cmp r3, #0
8006136: d101 bne.n 800613c <HAL_DMA_Init+0x18>
{
return HAL_ERROR;
8006138: 2301 movs r3, #1
800613a: e316 b.n 800676a <HAL_DMA_Init+0x646>
assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
assert_param(IS_DMA_MODE(hdma->Init.Mode));
assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
800613c: 687b ldr r3, [r7, #4]
800613e: 681b ldr r3, [r3, #0]
8006140: 4a66 ldr r2, [pc, #408] @ (80062dc <HAL_DMA_Init+0x1b8>)
8006142: 4293 cmp r3, r2
8006144: d04a beq.n 80061dc <HAL_DMA_Init+0xb8>
8006146: 687b ldr r3, [r7, #4]
8006148: 681b ldr r3, [r3, #0]
800614a: 4a65 ldr r2, [pc, #404] @ (80062e0 <HAL_DMA_Init+0x1bc>)
800614c: 4293 cmp r3, r2
800614e: d045 beq.n 80061dc <HAL_DMA_Init+0xb8>
8006150: 687b ldr r3, [r7, #4]
8006152: 681b ldr r3, [r3, #0]
8006154: 4a63 ldr r2, [pc, #396] @ (80062e4 <HAL_DMA_Init+0x1c0>)
8006156: 4293 cmp r3, r2
8006158: d040 beq.n 80061dc <HAL_DMA_Init+0xb8>
800615a: 687b ldr r3, [r7, #4]
800615c: 681b ldr r3, [r3, #0]
800615e: 4a62 ldr r2, [pc, #392] @ (80062e8 <HAL_DMA_Init+0x1c4>)
8006160: 4293 cmp r3, r2
8006162: d03b beq.n 80061dc <HAL_DMA_Init+0xb8>
8006164: 687b ldr r3, [r7, #4]
8006166: 681b ldr r3, [r3, #0]
8006168: 4a60 ldr r2, [pc, #384] @ (80062ec <HAL_DMA_Init+0x1c8>)
800616a: 4293 cmp r3, r2
800616c: d036 beq.n 80061dc <HAL_DMA_Init+0xb8>
800616e: 687b ldr r3, [r7, #4]
8006170: 681b ldr r3, [r3, #0]
8006172: 4a5f ldr r2, [pc, #380] @ (80062f0 <HAL_DMA_Init+0x1cc>)
8006174: 4293 cmp r3, r2
8006176: d031 beq.n 80061dc <HAL_DMA_Init+0xb8>
8006178: 687b ldr r3, [r7, #4]
800617a: 681b ldr r3, [r3, #0]
800617c: 4a5d ldr r2, [pc, #372] @ (80062f4 <HAL_DMA_Init+0x1d0>)
800617e: 4293 cmp r3, r2
8006180: d02c beq.n 80061dc <HAL_DMA_Init+0xb8>
8006182: 687b ldr r3, [r7, #4]
8006184: 681b ldr r3, [r3, #0]
8006186: 4a5c ldr r2, [pc, #368] @ (80062f8 <HAL_DMA_Init+0x1d4>)
8006188: 4293 cmp r3, r2
800618a: d027 beq.n 80061dc <HAL_DMA_Init+0xb8>
800618c: 687b ldr r3, [r7, #4]
800618e: 681b ldr r3, [r3, #0]
8006190: 4a5a ldr r2, [pc, #360] @ (80062fc <HAL_DMA_Init+0x1d8>)
8006192: 4293 cmp r3, r2
8006194: d022 beq.n 80061dc <HAL_DMA_Init+0xb8>
8006196: 687b ldr r3, [r7, #4]
8006198: 681b ldr r3, [r3, #0]
800619a: 4a59 ldr r2, [pc, #356] @ (8006300 <HAL_DMA_Init+0x1dc>)
800619c: 4293 cmp r3, r2
800619e: d01d beq.n 80061dc <HAL_DMA_Init+0xb8>
80061a0: 687b ldr r3, [r7, #4]
80061a2: 681b ldr r3, [r3, #0]
80061a4: 4a57 ldr r2, [pc, #348] @ (8006304 <HAL_DMA_Init+0x1e0>)
80061a6: 4293 cmp r3, r2
80061a8: d018 beq.n 80061dc <HAL_DMA_Init+0xb8>
80061aa: 687b ldr r3, [r7, #4]
80061ac: 681b ldr r3, [r3, #0]
80061ae: 4a56 ldr r2, [pc, #344] @ (8006308 <HAL_DMA_Init+0x1e4>)
80061b0: 4293 cmp r3, r2
80061b2: d013 beq.n 80061dc <HAL_DMA_Init+0xb8>
80061b4: 687b ldr r3, [r7, #4]
80061b6: 681b ldr r3, [r3, #0]
80061b8: 4a54 ldr r2, [pc, #336] @ (800630c <HAL_DMA_Init+0x1e8>)
80061ba: 4293 cmp r3, r2
80061bc: d00e beq.n 80061dc <HAL_DMA_Init+0xb8>
80061be: 687b ldr r3, [r7, #4]
80061c0: 681b ldr r3, [r3, #0]
80061c2: 4a53 ldr r2, [pc, #332] @ (8006310 <HAL_DMA_Init+0x1ec>)
80061c4: 4293 cmp r3, r2
80061c6: d009 beq.n 80061dc <HAL_DMA_Init+0xb8>
80061c8: 687b ldr r3, [r7, #4]
80061ca: 681b ldr r3, [r3, #0]
80061cc: 4a51 ldr r2, [pc, #324] @ (8006314 <HAL_DMA_Init+0x1f0>)
80061ce: 4293 cmp r3, r2
80061d0: d004 beq.n 80061dc <HAL_DMA_Init+0xb8>
80061d2: 687b ldr r3, [r7, #4]
80061d4: 681b ldr r3, [r3, #0]
80061d6: 4a50 ldr r2, [pc, #320] @ (8006318 <HAL_DMA_Init+0x1f4>)
80061d8: 4293 cmp r3, r2
80061da: d101 bne.n 80061e0 <HAL_DMA_Init+0xbc>
80061dc: 2301 movs r3, #1
80061de: e000 b.n 80061e2 <HAL_DMA_Init+0xbe>
80061e0: 2300 movs r3, #0
80061e2: 2b00 cmp r3, #0
80061e4: f000 813b beq.w 800645e <HAL_DMA_Init+0x33a>
assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
}
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
80061e8: 687b ldr r3, [r7, #4]
80061ea: 2202 movs r2, #2
80061ec: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Allocate lock resource */
__HAL_UNLOCK(hdma);
80061f0: 687b ldr r3, [r7, #4]
80061f2: 2200 movs r2, #0
80061f4: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
80061f8: 687b ldr r3, [r7, #4]
80061fa: 681b ldr r3, [r3, #0]
80061fc: 4a37 ldr r2, [pc, #220] @ (80062dc <HAL_DMA_Init+0x1b8>)
80061fe: 4293 cmp r3, r2
8006200: d04a beq.n 8006298 <HAL_DMA_Init+0x174>
8006202: 687b ldr r3, [r7, #4]
8006204: 681b ldr r3, [r3, #0]
8006206: 4a36 ldr r2, [pc, #216] @ (80062e0 <HAL_DMA_Init+0x1bc>)
8006208: 4293 cmp r3, r2
800620a: d045 beq.n 8006298 <HAL_DMA_Init+0x174>
800620c: 687b ldr r3, [r7, #4]
800620e: 681b ldr r3, [r3, #0]
8006210: 4a34 ldr r2, [pc, #208] @ (80062e4 <HAL_DMA_Init+0x1c0>)
8006212: 4293 cmp r3, r2
8006214: d040 beq.n 8006298 <HAL_DMA_Init+0x174>
8006216: 687b ldr r3, [r7, #4]
8006218: 681b ldr r3, [r3, #0]
800621a: 4a33 ldr r2, [pc, #204] @ (80062e8 <HAL_DMA_Init+0x1c4>)
800621c: 4293 cmp r3, r2
800621e: d03b beq.n 8006298 <HAL_DMA_Init+0x174>
8006220: 687b ldr r3, [r7, #4]
8006222: 681b ldr r3, [r3, #0]
8006224: 4a31 ldr r2, [pc, #196] @ (80062ec <HAL_DMA_Init+0x1c8>)
8006226: 4293 cmp r3, r2
8006228: d036 beq.n 8006298 <HAL_DMA_Init+0x174>
800622a: 687b ldr r3, [r7, #4]
800622c: 681b ldr r3, [r3, #0]
800622e: 4a30 ldr r2, [pc, #192] @ (80062f0 <HAL_DMA_Init+0x1cc>)
8006230: 4293 cmp r3, r2
8006232: d031 beq.n 8006298 <HAL_DMA_Init+0x174>
8006234: 687b ldr r3, [r7, #4]
8006236: 681b ldr r3, [r3, #0]
8006238: 4a2e ldr r2, [pc, #184] @ (80062f4 <HAL_DMA_Init+0x1d0>)
800623a: 4293 cmp r3, r2
800623c: d02c beq.n 8006298 <HAL_DMA_Init+0x174>
800623e: 687b ldr r3, [r7, #4]
8006240: 681b ldr r3, [r3, #0]
8006242: 4a2d ldr r2, [pc, #180] @ (80062f8 <HAL_DMA_Init+0x1d4>)
8006244: 4293 cmp r3, r2
8006246: d027 beq.n 8006298 <HAL_DMA_Init+0x174>
8006248: 687b ldr r3, [r7, #4]
800624a: 681b ldr r3, [r3, #0]
800624c: 4a2b ldr r2, [pc, #172] @ (80062fc <HAL_DMA_Init+0x1d8>)
800624e: 4293 cmp r3, r2
8006250: d022 beq.n 8006298 <HAL_DMA_Init+0x174>
8006252: 687b ldr r3, [r7, #4]
8006254: 681b ldr r3, [r3, #0]
8006256: 4a2a ldr r2, [pc, #168] @ (8006300 <HAL_DMA_Init+0x1dc>)
8006258: 4293 cmp r3, r2
800625a: d01d beq.n 8006298 <HAL_DMA_Init+0x174>
800625c: 687b ldr r3, [r7, #4]
800625e: 681b ldr r3, [r3, #0]
8006260: 4a28 ldr r2, [pc, #160] @ (8006304 <HAL_DMA_Init+0x1e0>)
8006262: 4293 cmp r3, r2
8006264: d018 beq.n 8006298 <HAL_DMA_Init+0x174>
8006266: 687b ldr r3, [r7, #4]
8006268: 681b ldr r3, [r3, #0]
800626a: 4a27 ldr r2, [pc, #156] @ (8006308 <HAL_DMA_Init+0x1e4>)
800626c: 4293 cmp r3, r2
800626e: d013 beq.n 8006298 <HAL_DMA_Init+0x174>
8006270: 687b ldr r3, [r7, #4]
8006272: 681b ldr r3, [r3, #0]
8006274: 4a25 ldr r2, [pc, #148] @ (800630c <HAL_DMA_Init+0x1e8>)
8006276: 4293 cmp r3, r2
8006278: d00e beq.n 8006298 <HAL_DMA_Init+0x174>
800627a: 687b ldr r3, [r7, #4]
800627c: 681b ldr r3, [r3, #0]
800627e: 4a24 ldr r2, [pc, #144] @ (8006310 <HAL_DMA_Init+0x1ec>)
8006280: 4293 cmp r3, r2
8006282: d009 beq.n 8006298 <HAL_DMA_Init+0x174>
8006284: 687b ldr r3, [r7, #4]
8006286: 681b ldr r3, [r3, #0]
8006288: 4a22 ldr r2, [pc, #136] @ (8006314 <HAL_DMA_Init+0x1f0>)
800628a: 4293 cmp r3, r2
800628c: d004 beq.n 8006298 <HAL_DMA_Init+0x174>
800628e: 687b ldr r3, [r7, #4]
8006290: 681b ldr r3, [r3, #0]
8006292: 4a21 ldr r2, [pc, #132] @ (8006318 <HAL_DMA_Init+0x1f4>)
8006294: 4293 cmp r3, r2
8006296: d108 bne.n 80062aa <HAL_DMA_Init+0x186>
8006298: 687b ldr r3, [r7, #4]
800629a: 681b ldr r3, [r3, #0]
800629c: 681a ldr r2, [r3, #0]
800629e: 687b ldr r3, [r7, #4]
80062a0: 681b ldr r3, [r3, #0]
80062a2: f022 0201 bic.w r2, r2, #1
80062a6: 601a str r2, [r3, #0]
80062a8: e007 b.n 80062ba <HAL_DMA_Init+0x196>
80062aa: 687b ldr r3, [r7, #4]
80062ac: 681b ldr r3, [r3, #0]
80062ae: 681a ldr r2, [r3, #0]
80062b0: 687b ldr r3, [r7, #4]
80062b2: 681b ldr r3, [r3, #0]
80062b4: f022 0201 bic.w r2, r2, #1
80062b8: 601a str r2, [r3, #0]
/* Check if the DMA Stream is effectively disabled */
while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
80062ba: e02f b.n 800631c <HAL_DMA_Init+0x1f8>
{
/* Check for the Timeout */
if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
80062bc: f7ff fb84 bl 80059c8 <HAL_GetTick>
80062c0: 4602 mov r2, r0
80062c2: 693b ldr r3, [r7, #16]
80062c4: 1ad3 subs r3, r2, r3
80062c6: 2b05 cmp r3, #5
80062c8: d928 bls.n 800631c <HAL_DMA_Init+0x1f8>
{
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
80062ca: 687b ldr r3, [r7, #4]
80062cc: 2220 movs r2, #32
80062ce: 655a str r2, [r3, #84] @ 0x54
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_ERROR;
80062d0: 687b ldr r3, [r7, #4]
80062d2: 2203 movs r2, #3
80062d4: f883 2035 strb.w r2, [r3, #53] @ 0x35
return HAL_ERROR;
80062d8: 2301 movs r3, #1
80062da: e246 b.n 800676a <HAL_DMA_Init+0x646>
80062dc: 40020010 .word 0x40020010
80062e0: 40020028 .word 0x40020028
80062e4: 40020040 .word 0x40020040
80062e8: 40020058 .word 0x40020058
80062ec: 40020070 .word 0x40020070
80062f0: 40020088 .word 0x40020088
80062f4: 400200a0 .word 0x400200a0
80062f8: 400200b8 .word 0x400200b8
80062fc: 40020410 .word 0x40020410
8006300: 40020428 .word 0x40020428
8006304: 40020440 .word 0x40020440
8006308: 40020458 .word 0x40020458
800630c: 40020470 .word 0x40020470
8006310: 40020488 .word 0x40020488
8006314: 400204a0 .word 0x400204a0
8006318: 400204b8 .word 0x400204b8
while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
800631c: 687b ldr r3, [r7, #4]
800631e: 681b ldr r3, [r3, #0]
8006320: 681b ldr r3, [r3, #0]
8006322: f003 0301 and.w r3, r3, #1
8006326: 2b00 cmp r3, #0
8006328: d1c8 bne.n 80062bc <HAL_DMA_Init+0x198>
}
}
/* Get the CR register value */
registerValue = ((DMA_Stream_TypeDef *)hdma->Instance)->CR;
800632a: 687b ldr r3, [r7, #4]
800632c: 681b ldr r3, [r3, #0]
800632e: 681b ldr r3, [r3, #0]
8006330: 617b str r3, [r7, #20]
/* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
registerValue &= ((uint32_t)~(DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
8006332: 697a ldr r2, [r7, #20]
8006334: 4b83 ldr r3, [pc, #524] @ (8006544 <HAL_DMA_Init+0x420>)
8006336: 4013 ands r3, r2
8006338: 617b str r3, [r7, #20]
DMA_SxCR_PL | DMA_SxCR_MSIZE | DMA_SxCR_PSIZE | \
DMA_SxCR_MINC | DMA_SxCR_PINC | DMA_SxCR_CIRC | \
DMA_SxCR_DIR | DMA_SxCR_CT | DMA_SxCR_DBM));
/* Prepare the DMA Stream configuration */
registerValue |= hdma->Init.Direction |
800633a: 687b ldr r3, [r7, #4]
800633c: 689a ldr r2, [r3, #8]
hdma->Init.PeriphInc | hdma->Init.MemInc |
800633e: 687b ldr r3, [r7, #4]
8006340: 68db ldr r3, [r3, #12]
registerValue |= hdma->Init.Direction |
8006342: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
8006344: 687b ldr r3, [r7, #4]
8006346: 691b ldr r3, [r3, #16]
8006348: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
800634a: 687b ldr r3, [r7, #4]
800634c: 695b ldr r3, [r3, #20]
hdma->Init.PeriphInc | hdma->Init.MemInc |
800634e: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8006350: 687b ldr r3, [r7, #4]
8006352: 699b ldr r3, [r3, #24]
8006354: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8006356: 687b ldr r3, [r7, #4]
8006358: 69db ldr r3, [r3, #28]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
800635a: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
800635c: 687b ldr r3, [r7, #4]
800635e: 6a1b ldr r3, [r3, #32]
8006360: 4313 orrs r3, r2
registerValue |= hdma->Init.Direction |
8006362: 697a ldr r2, [r7, #20]
8006364: 4313 orrs r3, r2
8006366: 617b str r3, [r7, #20]
/* the Memory burst and peripheral burst are not used when the FIFO is disabled */
if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
8006368: 687b ldr r3, [r7, #4]
800636a: 6a5b ldr r3, [r3, #36] @ 0x24
800636c: 2b04 cmp r3, #4
800636e: d107 bne.n 8006380 <HAL_DMA_Init+0x25c>
{
/* Get memory burst and peripheral burst */
registerValue |= hdma->Init.MemBurst | hdma->Init.PeriphBurst;
8006370: 687b ldr r3, [r7, #4]
8006372: 6ada ldr r2, [r3, #44] @ 0x2c
8006374: 687b ldr r3, [r7, #4]
8006376: 6b1b ldr r3, [r3, #48] @ 0x30
8006378: 4313 orrs r3, r2
800637a: 697a ldr r2, [r7, #20]
800637c: 4313 orrs r3, r2
800637e: 617b str r3, [r7, #20]
}
/* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be
lock when transferring data to/from USART/UART */
#if (STM32H7_DEV_ID == 0x450UL)
if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U)
8006380: 4b71 ldr r3, [pc, #452] @ (8006548 <HAL_DMA_Init+0x424>)
8006382: 681a ldr r2, [r3, #0]
8006384: 4b71 ldr r3, [pc, #452] @ (800654c <HAL_DMA_Init+0x428>)
8006386: 4013 ands r3, r2
8006388: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800638c: d328 bcc.n 80063e0 <HAL_DMA_Init+0x2bc>
{
#endif /* STM32H7_DEV_ID == 0x450UL */
if(IS_DMA_UART_USART_REQUEST(hdma->Init.Request) != 0U)
800638e: 687b ldr r3, [r7, #4]
8006390: 685b ldr r3, [r3, #4]
8006392: 2b28 cmp r3, #40 @ 0x28
8006394: d903 bls.n 800639e <HAL_DMA_Init+0x27a>
8006396: 687b ldr r3, [r7, #4]
8006398: 685b ldr r3, [r3, #4]
800639a: 2b2e cmp r3, #46 @ 0x2e
800639c: d917 bls.n 80063ce <HAL_DMA_Init+0x2aa>
800639e: 687b ldr r3, [r7, #4]
80063a0: 685b ldr r3, [r3, #4]
80063a2: 2b3e cmp r3, #62 @ 0x3e
80063a4: d903 bls.n 80063ae <HAL_DMA_Init+0x28a>
80063a6: 687b ldr r3, [r7, #4]
80063a8: 685b ldr r3, [r3, #4]
80063aa: 2b42 cmp r3, #66 @ 0x42
80063ac: d90f bls.n 80063ce <HAL_DMA_Init+0x2aa>
80063ae: 687b ldr r3, [r7, #4]
80063b0: 685b ldr r3, [r3, #4]
80063b2: 2b46 cmp r3, #70 @ 0x46
80063b4: d903 bls.n 80063be <HAL_DMA_Init+0x29a>
80063b6: 687b ldr r3, [r7, #4]
80063b8: 685b ldr r3, [r3, #4]
80063ba: 2b48 cmp r3, #72 @ 0x48
80063bc: d907 bls.n 80063ce <HAL_DMA_Init+0x2aa>
80063be: 687b ldr r3, [r7, #4]
80063c0: 685b ldr r3, [r3, #4]
80063c2: 2b4e cmp r3, #78 @ 0x4e
80063c4: d905 bls.n 80063d2 <HAL_DMA_Init+0x2ae>
80063c6: 687b ldr r3, [r7, #4]
80063c8: 685b ldr r3, [r3, #4]
80063ca: 2b52 cmp r3, #82 @ 0x52
80063cc: d801 bhi.n 80063d2 <HAL_DMA_Init+0x2ae>
80063ce: 2301 movs r3, #1
80063d0: e000 b.n 80063d4 <HAL_DMA_Init+0x2b0>
80063d2: 2300 movs r3, #0
80063d4: 2b00 cmp r3, #0
80063d6: d003 beq.n 80063e0 <HAL_DMA_Init+0x2bc>
{
registerValue |= DMA_SxCR_TRBUFF;
80063d8: 697b ldr r3, [r7, #20]
80063da: f443 1380 orr.w r3, r3, #1048576 @ 0x100000
80063de: 617b str r3, [r7, #20]
#if (STM32H7_DEV_ID == 0x450UL)
}
#endif /* STM32H7_DEV_ID == 0x450UL */
/* Write to DMA Stream CR register */
((DMA_Stream_TypeDef *)hdma->Instance)->CR = registerValue;
80063e0: 687b ldr r3, [r7, #4]
80063e2: 681b ldr r3, [r3, #0]
80063e4: 697a ldr r2, [r7, #20]
80063e6: 601a str r2, [r3, #0]
/* Get the FCR register value */
registerValue = ((DMA_Stream_TypeDef *)hdma->Instance)->FCR;
80063e8: 687b ldr r3, [r7, #4]
80063ea: 681b ldr r3, [r3, #0]
80063ec: 695b ldr r3, [r3, #20]
80063ee: 617b str r3, [r7, #20]
/* Clear Direct mode and FIFO threshold bits */
registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
80063f0: 697b ldr r3, [r7, #20]
80063f2: f023 0307 bic.w r3, r3, #7
80063f6: 617b str r3, [r7, #20]
/* Prepare the DMA Stream FIFO configuration */
registerValue |= hdma->Init.FIFOMode;
80063f8: 687b ldr r3, [r7, #4]
80063fa: 6a5b ldr r3, [r3, #36] @ 0x24
80063fc: 697a ldr r2, [r7, #20]
80063fe: 4313 orrs r3, r2
8006400: 617b str r3, [r7, #20]
/* the FIFO threshold is not used when the FIFO mode is disabled */
if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
8006402: 687b ldr r3, [r7, #4]
8006404: 6a5b ldr r3, [r3, #36] @ 0x24
8006406: 2b04 cmp r3, #4
8006408: d117 bne.n 800643a <HAL_DMA_Init+0x316>
{
/* Get the FIFO threshold */
registerValue |= hdma->Init.FIFOThreshold;
800640a: 687b ldr r3, [r7, #4]
800640c: 6a9b ldr r3, [r3, #40] @ 0x28
800640e: 697a ldr r2, [r7, #20]
8006410: 4313 orrs r3, r2
8006412: 617b str r3, [r7, #20]
/* Check compatibility between FIFO threshold level and size of the memory burst */
/* for INCR4, INCR8, INCR16 */
if(hdma->Init.MemBurst != DMA_MBURST_SINGLE)
8006414: 687b ldr r3, [r7, #4]
8006416: 6adb ldr r3, [r3, #44] @ 0x2c
8006418: 2b00 cmp r3, #0
800641a: d00e beq.n 800643a <HAL_DMA_Init+0x316>
{
if (DMA_CheckFifoParam(hdma) != HAL_OK)
800641c: 6878 ldr r0, [r7, #4]
800641e: f001 ff1d bl 800825c <DMA_CheckFifoParam>
8006422: 4603 mov r3, r0
8006424: 2b00 cmp r3, #0
8006426: d008 beq.n 800643a <HAL_DMA_Init+0x316>
{
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
8006428: 687b ldr r3, [r7, #4]
800642a: 2240 movs r2, #64 @ 0x40
800642c: 655a str r2, [r3, #84] @ 0x54
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
800642e: 687b ldr r3, [r7, #4]
8006430: 2201 movs r2, #1
8006432: f883 2035 strb.w r2, [r3, #53] @ 0x35
return HAL_ERROR;
8006436: 2301 movs r3, #1
8006438: e197 b.n 800676a <HAL_DMA_Init+0x646>
}
}
}
/* Write to DMA Stream FCR */
((DMA_Stream_TypeDef *)hdma->Instance)->FCR = registerValue;
800643a: 687b ldr r3, [r7, #4]
800643c: 681b ldr r3, [r3, #0]
800643e: 697a ldr r2, [r7, #20]
8006440: 615a str r2, [r3, #20]
/* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
regs_dma = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
8006442: 6878 ldr r0, [r7, #4]
8006444: f001 fe58 bl 80080f8 <DMA_CalcBaseAndBitshift>
8006448: 4603 mov r3, r0
800644a: 60bb str r3, [r7, #8]
/* Clear all interrupt flags */
regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
800644c: 687b ldr r3, [r7, #4]
800644e: 6ddb ldr r3, [r3, #92] @ 0x5c
8006450: f003 031f and.w r3, r3, #31
8006454: 223f movs r2, #63 @ 0x3f
8006456: 409a lsls r2, r3
8006458: 68bb ldr r3, [r7, #8]
800645a: 609a str r2, [r3, #8]
800645c: e0cd b.n 80065fa <HAL_DMA_Init+0x4d6>
}
else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
800645e: 687b ldr r3, [r7, #4]
8006460: 681b ldr r3, [r3, #0]
8006462: 4a3b ldr r2, [pc, #236] @ (8006550 <HAL_DMA_Init+0x42c>)
8006464: 4293 cmp r3, r2
8006466: d022 beq.n 80064ae <HAL_DMA_Init+0x38a>
8006468: 687b ldr r3, [r7, #4]
800646a: 681b ldr r3, [r3, #0]
800646c: 4a39 ldr r2, [pc, #228] @ (8006554 <HAL_DMA_Init+0x430>)
800646e: 4293 cmp r3, r2
8006470: d01d beq.n 80064ae <HAL_DMA_Init+0x38a>
8006472: 687b ldr r3, [r7, #4]
8006474: 681b ldr r3, [r3, #0]
8006476: 4a38 ldr r2, [pc, #224] @ (8006558 <HAL_DMA_Init+0x434>)
8006478: 4293 cmp r3, r2
800647a: d018 beq.n 80064ae <HAL_DMA_Init+0x38a>
800647c: 687b ldr r3, [r7, #4]
800647e: 681b ldr r3, [r3, #0]
8006480: 4a36 ldr r2, [pc, #216] @ (800655c <HAL_DMA_Init+0x438>)
8006482: 4293 cmp r3, r2
8006484: d013 beq.n 80064ae <HAL_DMA_Init+0x38a>
8006486: 687b ldr r3, [r7, #4]
8006488: 681b ldr r3, [r3, #0]
800648a: 4a35 ldr r2, [pc, #212] @ (8006560 <HAL_DMA_Init+0x43c>)
800648c: 4293 cmp r3, r2
800648e: d00e beq.n 80064ae <HAL_DMA_Init+0x38a>
8006490: 687b ldr r3, [r7, #4]
8006492: 681b ldr r3, [r3, #0]
8006494: 4a33 ldr r2, [pc, #204] @ (8006564 <HAL_DMA_Init+0x440>)
8006496: 4293 cmp r3, r2
8006498: d009 beq.n 80064ae <HAL_DMA_Init+0x38a>
800649a: 687b ldr r3, [r7, #4]
800649c: 681b ldr r3, [r3, #0]
800649e: 4a32 ldr r2, [pc, #200] @ (8006568 <HAL_DMA_Init+0x444>)
80064a0: 4293 cmp r3, r2
80064a2: d004 beq.n 80064ae <HAL_DMA_Init+0x38a>
80064a4: 687b ldr r3, [r7, #4]
80064a6: 681b ldr r3, [r3, #0]
80064a8: 4a30 ldr r2, [pc, #192] @ (800656c <HAL_DMA_Init+0x448>)
80064aa: 4293 cmp r3, r2
80064ac: d101 bne.n 80064b2 <HAL_DMA_Init+0x38e>
80064ae: 2301 movs r3, #1
80064b0: e000 b.n 80064b4 <HAL_DMA_Init+0x390>
80064b2: 2300 movs r3, #0
80064b4: 2b00 cmp r3, #0
80064b6: f000 8097 beq.w 80065e8 <HAL_DMA_Init+0x4c4>
{
if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
80064ba: 687b ldr r3, [r7, #4]
80064bc: 681b ldr r3, [r3, #0]
80064be: 4a24 ldr r2, [pc, #144] @ (8006550 <HAL_DMA_Init+0x42c>)
80064c0: 4293 cmp r3, r2
80064c2: d021 beq.n 8006508 <HAL_DMA_Init+0x3e4>
80064c4: 687b ldr r3, [r7, #4]
80064c6: 681b ldr r3, [r3, #0]
80064c8: 4a22 ldr r2, [pc, #136] @ (8006554 <HAL_DMA_Init+0x430>)
80064ca: 4293 cmp r3, r2
80064cc: d01c beq.n 8006508 <HAL_DMA_Init+0x3e4>
80064ce: 687b ldr r3, [r7, #4]
80064d0: 681b ldr r3, [r3, #0]
80064d2: 4a21 ldr r2, [pc, #132] @ (8006558 <HAL_DMA_Init+0x434>)
80064d4: 4293 cmp r3, r2
80064d6: d017 beq.n 8006508 <HAL_DMA_Init+0x3e4>
80064d8: 687b ldr r3, [r7, #4]
80064da: 681b ldr r3, [r3, #0]
80064dc: 4a1f ldr r2, [pc, #124] @ (800655c <HAL_DMA_Init+0x438>)
80064de: 4293 cmp r3, r2
80064e0: d012 beq.n 8006508 <HAL_DMA_Init+0x3e4>
80064e2: 687b ldr r3, [r7, #4]
80064e4: 681b ldr r3, [r3, #0]
80064e6: 4a1e ldr r2, [pc, #120] @ (8006560 <HAL_DMA_Init+0x43c>)
80064e8: 4293 cmp r3, r2
80064ea: d00d beq.n 8006508 <HAL_DMA_Init+0x3e4>
80064ec: 687b ldr r3, [r7, #4]
80064ee: 681b ldr r3, [r3, #0]
80064f0: 4a1c ldr r2, [pc, #112] @ (8006564 <HAL_DMA_Init+0x440>)
80064f2: 4293 cmp r3, r2
80064f4: d008 beq.n 8006508 <HAL_DMA_Init+0x3e4>
80064f6: 687b ldr r3, [r7, #4]
80064f8: 681b ldr r3, [r3, #0]
80064fa: 4a1b ldr r2, [pc, #108] @ (8006568 <HAL_DMA_Init+0x444>)
80064fc: 4293 cmp r3, r2
80064fe: d003 beq.n 8006508 <HAL_DMA_Init+0x3e4>
8006500: 687b ldr r3, [r7, #4]
8006502: 681b ldr r3, [r3, #0]
8006504: 4a19 ldr r2, [pc, #100] @ (800656c <HAL_DMA_Init+0x448>)
8006506: 4293 cmp r3, r2
/* Check the request parameter */
assert_param(IS_BDMA_REQUEST(hdma->Init.Request));
}
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8006508: 687b ldr r3, [r7, #4]
800650a: 2202 movs r2, #2
800650c: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Allocate lock resource */
__HAL_UNLOCK(hdma);
8006510: 687b ldr r3, [r7, #4]
8006512: 2200 movs r2, #0
8006514: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Get the CR register value */
registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR;
8006518: 687b ldr r3, [r7, #4]
800651a: 681b ldr r3, [r3, #0]
800651c: 681b ldr r3, [r3, #0]
800651e: 617b str r3, [r7, #20]
/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, MEM2MEM, DBM and CT bits */
registerValue &= ((uint32_t)~(BDMA_CCR_PL | BDMA_CCR_MSIZE | BDMA_CCR_PSIZE | \
8006520: 697a ldr r2, [r7, #20]
8006522: 4b13 ldr r3, [pc, #76] @ (8006570 <HAL_DMA_Init+0x44c>)
8006524: 4013 ands r3, r2
8006526: 617b str r3, [r7, #20]
BDMA_CCR_MINC | BDMA_CCR_PINC | BDMA_CCR_CIRC | \
BDMA_CCR_DIR | BDMA_CCR_MEM2MEM | BDMA_CCR_DBM | \
BDMA_CCR_CT));
/* Prepare the DMA Channel configuration */
registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) |
8006528: 687b ldr r3, [r7, #4]
800652a: 689b ldr r3, [r3, #8]
800652c: 2b40 cmp r3, #64 @ 0x40
800652e: d021 beq.n 8006574 <HAL_DMA_Init+0x450>
8006530: 687b ldr r3, [r7, #4]
8006532: 689b ldr r3, [r3, #8]
8006534: 2b80 cmp r3, #128 @ 0x80
8006536: d102 bne.n 800653e <HAL_DMA_Init+0x41a>
8006538: f44f 4380 mov.w r3, #16384 @ 0x4000
800653c: e01b b.n 8006576 <HAL_DMA_Init+0x452>
800653e: 2300 movs r3, #0
8006540: e019 b.n 8006576 <HAL_DMA_Init+0x452>
8006542: bf00 nop
8006544: fe10803f .word 0xfe10803f
8006548: 5c001000 .word 0x5c001000
800654c: ffff0000 .word 0xffff0000
8006550: 58025408 .word 0x58025408
8006554: 5802541c .word 0x5802541c
8006558: 58025430 .word 0x58025430
800655c: 58025444 .word 0x58025444
8006560: 58025458 .word 0x58025458
8006564: 5802546c .word 0x5802546c
8006568: 58025480 .word 0x58025480
800656c: 58025494 .word 0x58025494
8006570: fffe000f .word 0xfffe000f
8006574: 2310 movs r3, #16
DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc) |
8006576: 687a ldr r2, [r7, #4]
8006578: 68d2 ldr r2, [r2, #12]
800657a: 08d2 lsrs r2, r2, #3
registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) |
800657c: 431a orrs r2, r3
DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc) |
800657e: 687b ldr r3, [r7, #4]
8006580: 691b ldr r3, [r3, #16]
8006582: 08db lsrs r3, r3, #3
DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc) |
8006584: 431a orrs r2, r3
DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
8006586: 687b ldr r3, [r7, #4]
8006588: 695b ldr r3, [r3, #20]
800658a: 08db lsrs r3, r3, #3
DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc) |
800658c: 431a orrs r2, r3
DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment) |
800658e: 687b ldr r3, [r7, #4]
8006590: 699b ldr r3, [r3, #24]
8006592: 08db lsrs r3, r3, #3
DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
8006594: 431a orrs r2, r3
DMA_TO_BDMA_MODE(hdma->Init.Mode) |
8006596: 687b ldr r3, [r7, #4]
8006598: 69db ldr r3, [r3, #28]
800659a: 08db lsrs r3, r3, #3
DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment) |
800659c: 431a orrs r2, r3
DMA_TO_BDMA_PRIORITY(hdma->Init.Priority);
800659e: 687b ldr r3, [r7, #4]
80065a0: 6a1b ldr r3, [r3, #32]
80065a2: 091b lsrs r3, r3, #4
DMA_TO_BDMA_MODE(hdma->Init.Mode) |
80065a4: 4313 orrs r3, r2
registerValue |= DMA_TO_BDMA_DIRECTION(hdma->Init.Direction) |
80065a6: 697a ldr r2, [r7, #20]
80065a8: 4313 orrs r3, r2
80065aa: 617b str r3, [r7, #20]
/* Write to DMA Channel CR register */
((BDMA_Channel_TypeDef *)hdma->Instance)->CCR = registerValue;
80065ac: 687b ldr r3, [r7, #4]
80065ae: 681b ldr r3, [r3, #0]
80065b0: 697a ldr r2, [r7, #20]
80065b2: 601a str r2, [r3, #0]
/* calculation of the channel index */
hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_t)BDMA_Channel1 - (uint32_t)BDMA_Channel0)) << 2U;
80065b4: 687b ldr r3, [r7, #4]
80065b6: 681b ldr r3, [r3, #0]
80065b8: 461a mov r2, r3
80065ba: 4b6e ldr r3, [pc, #440] @ (8006774 <HAL_DMA_Init+0x650>)
80065bc: 4413 add r3, r2
80065be: 4a6e ldr r2, [pc, #440] @ (8006778 <HAL_DMA_Init+0x654>)
80065c0: fba2 2303 umull r2, r3, r2, r3
80065c4: 091b lsrs r3, r3, #4
80065c6: 009a lsls r2, r3, #2
80065c8: 687b ldr r3, [r7, #4]
80065ca: 65da str r2, [r3, #92] @ 0x5c
/* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
regs_bdma = (BDMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
80065cc: 6878 ldr r0, [r7, #4]
80065ce: f001 fd93 bl 80080f8 <DMA_CalcBaseAndBitshift>
80065d2: 4603 mov r3, r0
80065d4: 60fb str r3, [r7, #12]
/* Clear all interrupt flags */
regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
80065d6: 687b ldr r3, [r7, #4]
80065d8: 6ddb ldr r3, [r3, #92] @ 0x5c
80065da: f003 031f and.w r3, r3, #31
80065de: 2201 movs r2, #1
80065e0: 409a lsls r2, r3
80065e2: 68fb ldr r3, [r7, #12]
80065e4: 605a str r2, [r3, #4]
80065e6: e008 b.n 80065fa <HAL_DMA_Init+0x4d6>
}
else
{
hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
80065e8: 687b ldr r3, [r7, #4]
80065ea: 2240 movs r2, #64 @ 0x40
80065ec: 655a str r2, [r3, #84] @ 0x54
hdma->State = HAL_DMA_STATE_ERROR;
80065ee: 687b ldr r3, [r7, #4]
80065f0: 2203 movs r2, #3
80065f2: f883 2035 strb.w r2, [r3, #53] @ 0x35
return HAL_ERROR;
80065f6: 2301 movs r3, #1
80065f8: e0b7 b.n 800676a <HAL_DMA_Init+0x646>
}
if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
80065fa: 687b ldr r3, [r7, #4]
80065fc: 681b ldr r3, [r3, #0]
80065fe: 4a5f ldr r2, [pc, #380] @ (800677c <HAL_DMA_Init+0x658>)
8006600: 4293 cmp r3, r2
8006602: d072 beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006604: 687b ldr r3, [r7, #4]
8006606: 681b ldr r3, [r3, #0]
8006608: 4a5d ldr r2, [pc, #372] @ (8006780 <HAL_DMA_Init+0x65c>)
800660a: 4293 cmp r3, r2
800660c: d06d beq.n 80066ea <HAL_DMA_Init+0x5c6>
800660e: 687b ldr r3, [r7, #4]
8006610: 681b ldr r3, [r3, #0]
8006612: 4a5c ldr r2, [pc, #368] @ (8006784 <HAL_DMA_Init+0x660>)
8006614: 4293 cmp r3, r2
8006616: d068 beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006618: 687b ldr r3, [r7, #4]
800661a: 681b ldr r3, [r3, #0]
800661c: 4a5a ldr r2, [pc, #360] @ (8006788 <HAL_DMA_Init+0x664>)
800661e: 4293 cmp r3, r2
8006620: d063 beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006622: 687b ldr r3, [r7, #4]
8006624: 681b ldr r3, [r3, #0]
8006626: 4a59 ldr r2, [pc, #356] @ (800678c <HAL_DMA_Init+0x668>)
8006628: 4293 cmp r3, r2
800662a: d05e beq.n 80066ea <HAL_DMA_Init+0x5c6>
800662c: 687b ldr r3, [r7, #4]
800662e: 681b ldr r3, [r3, #0]
8006630: 4a57 ldr r2, [pc, #348] @ (8006790 <HAL_DMA_Init+0x66c>)
8006632: 4293 cmp r3, r2
8006634: d059 beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006636: 687b ldr r3, [r7, #4]
8006638: 681b ldr r3, [r3, #0]
800663a: 4a56 ldr r2, [pc, #344] @ (8006794 <HAL_DMA_Init+0x670>)
800663c: 4293 cmp r3, r2
800663e: d054 beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006640: 687b ldr r3, [r7, #4]
8006642: 681b ldr r3, [r3, #0]
8006644: 4a54 ldr r2, [pc, #336] @ (8006798 <HAL_DMA_Init+0x674>)
8006646: 4293 cmp r3, r2
8006648: d04f beq.n 80066ea <HAL_DMA_Init+0x5c6>
800664a: 687b ldr r3, [r7, #4]
800664c: 681b ldr r3, [r3, #0]
800664e: 4a53 ldr r2, [pc, #332] @ (800679c <HAL_DMA_Init+0x678>)
8006650: 4293 cmp r3, r2
8006652: d04a beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006654: 687b ldr r3, [r7, #4]
8006656: 681b ldr r3, [r3, #0]
8006658: 4a51 ldr r2, [pc, #324] @ (80067a0 <HAL_DMA_Init+0x67c>)
800665a: 4293 cmp r3, r2
800665c: d045 beq.n 80066ea <HAL_DMA_Init+0x5c6>
800665e: 687b ldr r3, [r7, #4]
8006660: 681b ldr r3, [r3, #0]
8006662: 4a50 ldr r2, [pc, #320] @ (80067a4 <HAL_DMA_Init+0x680>)
8006664: 4293 cmp r3, r2
8006666: d040 beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006668: 687b ldr r3, [r7, #4]
800666a: 681b ldr r3, [r3, #0]
800666c: 4a4e ldr r2, [pc, #312] @ (80067a8 <HAL_DMA_Init+0x684>)
800666e: 4293 cmp r3, r2
8006670: d03b beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006672: 687b ldr r3, [r7, #4]
8006674: 681b ldr r3, [r3, #0]
8006676: 4a4d ldr r2, [pc, #308] @ (80067ac <HAL_DMA_Init+0x688>)
8006678: 4293 cmp r3, r2
800667a: d036 beq.n 80066ea <HAL_DMA_Init+0x5c6>
800667c: 687b ldr r3, [r7, #4]
800667e: 681b ldr r3, [r3, #0]
8006680: 4a4b ldr r2, [pc, #300] @ (80067b0 <HAL_DMA_Init+0x68c>)
8006682: 4293 cmp r3, r2
8006684: d031 beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006686: 687b ldr r3, [r7, #4]
8006688: 681b ldr r3, [r3, #0]
800668a: 4a4a ldr r2, [pc, #296] @ (80067b4 <HAL_DMA_Init+0x690>)
800668c: 4293 cmp r3, r2
800668e: d02c beq.n 80066ea <HAL_DMA_Init+0x5c6>
8006690: 687b ldr r3, [r7, #4]
8006692: 681b ldr r3, [r3, #0]
8006694: 4a48 ldr r2, [pc, #288] @ (80067b8 <HAL_DMA_Init+0x694>)
8006696: 4293 cmp r3, r2
8006698: d027 beq.n 80066ea <HAL_DMA_Init+0x5c6>
800669a: 687b ldr r3, [r7, #4]
800669c: 681b ldr r3, [r3, #0]
800669e: 4a47 ldr r2, [pc, #284] @ (80067bc <HAL_DMA_Init+0x698>)
80066a0: 4293 cmp r3, r2
80066a2: d022 beq.n 80066ea <HAL_DMA_Init+0x5c6>
80066a4: 687b ldr r3, [r7, #4]
80066a6: 681b ldr r3, [r3, #0]
80066a8: 4a45 ldr r2, [pc, #276] @ (80067c0 <HAL_DMA_Init+0x69c>)
80066aa: 4293 cmp r3, r2
80066ac: d01d beq.n 80066ea <HAL_DMA_Init+0x5c6>
80066ae: 687b ldr r3, [r7, #4]
80066b0: 681b ldr r3, [r3, #0]
80066b2: 4a44 ldr r2, [pc, #272] @ (80067c4 <HAL_DMA_Init+0x6a0>)
80066b4: 4293 cmp r3, r2
80066b6: d018 beq.n 80066ea <HAL_DMA_Init+0x5c6>
80066b8: 687b ldr r3, [r7, #4]
80066ba: 681b ldr r3, [r3, #0]
80066bc: 4a42 ldr r2, [pc, #264] @ (80067c8 <HAL_DMA_Init+0x6a4>)
80066be: 4293 cmp r3, r2
80066c0: d013 beq.n 80066ea <HAL_DMA_Init+0x5c6>
80066c2: 687b ldr r3, [r7, #4]
80066c4: 681b ldr r3, [r3, #0]
80066c6: 4a41 ldr r2, [pc, #260] @ (80067cc <HAL_DMA_Init+0x6a8>)
80066c8: 4293 cmp r3, r2
80066ca: d00e beq.n 80066ea <HAL_DMA_Init+0x5c6>
80066cc: 687b ldr r3, [r7, #4]
80066ce: 681b ldr r3, [r3, #0]
80066d0: 4a3f ldr r2, [pc, #252] @ (80067d0 <HAL_DMA_Init+0x6ac>)
80066d2: 4293 cmp r3, r2
80066d4: d009 beq.n 80066ea <HAL_DMA_Init+0x5c6>
80066d6: 687b ldr r3, [r7, #4]
80066d8: 681b ldr r3, [r3, #0]
80066da: 4a3e ldr r2, [pc, #248] @ (80067d4 <HAL_DMA_Init+0x6b0>)
80066dc: 4293 cmp r3, r2
80066de: d004 beq.n 80066ea <HAL_DMA_Init+0x5c6>
80066e0: 687b ldr r3, [r7, #4]
80066e2: 681b ldr r3, [r3, #0]
80066e4: 4a3c ldr r2, [pc, #240] @ (80067d8 <HAL_DMA_Init+0x6b4>)
80066e6: 4293 cmp r3, r2
80066e8: d101 bne.n 80066ee <HAL_DMA_Init+0x5ca>
80066ea: 2301 movs r3, #1
80066ec: e000 b.n 80066f0 <HAL_DMA_Init+0x5cc>
80066ee: 2300 movs r3, #0
80066f0: 2b00 cmp r3, #0
80066f2: d032 beq.n 800675a <HAL_DMA_Init+0x636>
{
/* Initialize parameters for DMAMUX channel :
DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask
*/
DMA_CalcDMAMUXChannelBaseAndMask(hdma);
80066f4: 6878 ldr r0, [r7, #4]
80066f6: f001 fe2d bl 8008354 <DMA_CalcDMAMUXChannelBaseAndMask>
if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
80066fa: 687b ldr r3, [r7, #4]
80066fc: 689b ldr r3, [r3, #8]
80066fe: 2b80 cmp r3, #128 @ 0x80
8006700: d102 bne.n 8006708 <HAL_DMA_Init+0x5e4>
{
/* if memory to memory force the request to 0*/
hdma->Init.Request = DMA_REQUEST_MEM2MEM;
8006702: 687b ldr r3, [r7, #4]
8006704: 2200 movs r2, #0
8006706: 605a str r2, [r3, #4]
}
/* Set peripheral request to DMAMUX channel */
hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);
8006708: 687b ldr r3, [r7, #4]
800670a: 685a ldr r2, [r3, #4]
800670c: 687b ldr r3, [r7, #4]
800670e: 6e1b ldr r3, [r3, #96] @ 0x60
8006710: b2d2 uxtb r2, r2
8006712: 601a str r2, [r3, #0]
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
8006714: 687b ldr r3, [r7, #4]
8006716: 6e5b ldr r3, [r3, #100] @ 0x64
8006718: 687a ldr r2, [r7, #4]
800671a: 6e92 ldr r2, [r2, #104] @ 0x68
800671c: 605a str r2, [r3, #4]
/* Initialize parameters for DMAMUX request generator :
if the DMA request is DMA_REQUEST_GENERATOR0 to DMA_REQUEST_GENERATOR7
*/
if((hdma->Init.Request >= DMA_REQUEST_GENERATOR0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR7))
800671e: 687b ldr r3, [r7, #4]
8006720: 685b ldr r3, [r3, #4]
8006722: 2b00 cmp r3, #0
8006724: d010 beq.n 8006748 <HAL_DMA_Init+0x624>
8006726: 687b ldr r3, [r7, #4]
8006728: 685b ldr r3, [r3, #4]
800672a: 2b08 cmp r3, #8
800672c: d80c bhi.n 8006748 <HAL_DMA_Init+0x624>
{
/* Initialize parameters for DMAMUX request generator :
DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask */
DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
800672e: 6878 ldr r0, [r7, #4]
8006730: f001 feaa bl 8008488 <DMA_CalcDMAMUXRequestGenBaseAndMask>
/* Reset the DMAMUX request generator register */
hdma->DMAmuxRequestGen->RGCR = 0U;
8006734: 687b ldr r3, [r7, #4]
8006736: 6edb ldr r3, [r3, #108] @ 0x6c
8006738: 2200 movs r2, #0
800673a: 601a str r2, [r3, #0]
/* Clear the DMAMUX request generator overrun flag */
hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
800673c: 687b ldr r3, [r7, #4]
800673e: 6f1b ldr r3, [r3, #112] @ 0x70
8006740: 687a ldr r2, [r7, #4]
8006742: 6f52 ldr r2, [r2, #116] @ 0x74
8006744: 605a str r2, [r3, #4]
8006746: e008 b.n 800675a <HAL_DMA_Init+0x636>
}
else
{
hdma->DMAmuxRequestGen = 0U;
8006748: 687b ldr r3, [r7, #4]
800674a: 2200 movs r2, #0
800674c: 66da str r2, [r3, #108] @ 0x6c
hdma->DMAmuxRequestGenStatus = 0U;
800674e: 687b ldr r3, [r7, #4]
8006750: 2200 movs r2, #0
8006752: 671a str r2, [r3, #112] @ 0x70
hdma->DMAmuxRequestGenStatusMask = 0U;
8006754: 687b ldr r3, [r7, #4]
8006756: 2200 movs r2, #0
8006758: 675a str r2, [r3, #116] @ 0x74
}
}
/* Initialize the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
800675a: 687b ldr r3, [r7, #4]
800675c: 2200 movs r2, #0
800675e: 655a str r2, [r3, #84] @ 0x54
/* Initialize the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8006760: 687b ldr r3, [r7, #4]
8006762: 2201 movs r2, #1
8006764: f883 2035 strb.w r2, [r3, #53] @ 0x35
return HAL_OK;
8006768: 2300 movs r3, #0
}
800676a: 4618 mov r0, r3
800676c: 3718 adds r7, #24
800676e: 46bd mov sp, r7
8006770: bd80 pop {r7, pc}
8006772: bf00 nop
8006774: a7fdabf8 .word 0xa7fdabf8
8006778: cccccccd .word 0xcccccccd
800677c: 40020010 .word 0x40020010
8006780: 40020028 .word 0x40020028
8006784: 40020040 .word 0x40020040
8006788: 40020058 .word 0x40020058
800678c: 40020070 .word 0x40020070
8006790: 40020088 .word 0x40020088
8006794: 400200a0 .word 0x400200a0
8006798: 400200b8 .word 0x400200b8
800679c: 40020410 .word 0x40020410
80067a0: 40020428 .word 0x40020428
80067a4: 40020440 .word 0x40020440
80067a8: 40020458 .word 0x40020458
80067ac: 40020470 .word 0x40020470
80067b0: 40020488 .word 0x40020488
80067b4: 400204a0 .word 0x400204a0
80067b8: 400204b8 .word 0x400204b8
80067bc: 58025408 .word 0x58025408
80067c0: 5802541c .word 0x5802541c
80067c4: 58025430 .word 0x58025430
80067c8: 58025444 .word 0x58025444
80067cc: 58025458 .word 0x58025458
80067d0: 5802546c .word 0x5802546c
80067d4: 58025480 .word 0x58025480
80067d8: 58025494 .word 0x58025494
080067dc <HAL_DMA_Abort>:
* and the Stream will be effectively disabled only after the transfer of
* this single data is finished.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
{
80067dc: b580 push {r7, lr}
80067de: b086 sub sp, #24
80067e0: af00 add r7, sp, #0
80067e2: 6078 str r0, [r7, #4]
/* calculate DMA base and stream number */
DMA_Base_Registers *regs_dma;
BDMA_Base_Registers *regs_bdma;
const __IO uint32_t *enableRegister;
uint32_t tickstart = HAL_GetTick();
80067e4: f7ff f8f0 bl 80059c8 <HAL_GetTick>
80067e8: 6138 str r0, [r7, #16]
/* Check the DMA peripheral handle */
if(hdma == NULL)
80067ea: 687b ldr r3, [r7, #4]
80067ec: 2b00 cmp r3, #0
80067ee: d101 bne.n 80067f4 <HAL_DMA_Abort+0x18>
{
return HAL_ERROR;
80067f0: 2301 movs r3, #1
80067f2: e2dc b.n 8006dae <HAL_DMA_Abort+0x5d2>
}
/* Check the DMA peripheral state */
if(hdma->State != HAL_DMA_STATE_BUSY)
80067f4: 687b ldr r3, [r7, #4]
80067f6: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
80067fa: b2db uxtb r3, r3
80067fc: 2b02 cmp r3, #2
80067fe: d008 beq.n 8006812 <HAL_DMA_Abort+0x36>
{
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
8006800: 687b ldr r3, [r7, #4]
8006802: 2280 movs r2, #128 @ 0x80
8006804: 655a str r2, [r3, #84] @ 0x54
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8006806: 687b ldr r3, [r7, #4]
8006808: 2200 movs r2, #0
800680a: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
800680e: 2301 movs r3, #1
8006810: e2cd b.n 8006dae <HAL_DMA_Abort+0x5d2>
}
else
{
/* Disable all the transfer interrupts */
if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
8006812: 687b ldr r3, [r7, #4]
8006814: 681b ldr r3, [r3, #0]
8006816: 4a76 ldr r2, [pc, #472] @ (80069f0 <HAL_DMA_Abort+0x214>)
8006818: 4293 cmp r3, r2
800681a: d04a beq.n 80068b2 <HAL_DMA_Abort+0xd6>
800681c: 687b ldr r3, [r7, #4]
800681e: 681b ldr r3, [r3, #0]
8006820: 4a74 ldr r2, [pc, #464] @ (80069f4 <HAL_DMA_Abort+0x218>)
8006822: 4293 cmp r3, r2
8006824: d045 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
8006826: 687b ldr r3, [r7, #4]
8006828: 681b ldr r3, [r3, #0]
800682a: 4a73 ldr r2, [pc, #460] @ (80069f8 <HAL_DMA_Abort+0x21c>)
800682c: 4293 cmp r3, r2
800682e: d040 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
8006830: 687b ldr r3, [r7, #4]
8006832: 681b ldr r3, [r3, #0]
8006834: 4a71 ldr r2, [pc, #452] @ (80069fc <HAL_DMA_Abort+0x220>)
8006836: 4293 cmp r3, r2
8006838: d03b beq.n 80068b2 <HAL_DMA_Abort+0xd6>
800683a: 687b ldr r3, [r7, #4]
800683c: 681b ldr r3, [r3, #0]
800683e: 4a70 ldr r2, [pc, #448] @ (8006a00 <HAL_DMA_Abort+0x224>)
8006840: 4293 cmp r3, r2
8006842: d036 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
8006844: 687b ldr r3, [r7, #4]
8006846: 681b ldr r3, [r3, #0]
8006848: 4a6e ldr r2, [pc, #440] @ (8006a04 <HAL_DMA_Abort+0x228>)
800684a: 4293 cmp r3, r2
800684c: d031 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
800684e: 687b ldr r3, [r7, #4]
8006850: 681b ldr r3, [r3, #0]
8006852: 4a6d ldr r2, [pc, #436] @ (8006a08 <HAL_DMA_Abort+0x22c>)
8006854: 4293 cmp r3, r2
8006856: d02c beq.n 80068b2 <HAL_DMA_Abort+0xd6>
8006858: 687b ldr r3, [r7, #4]
800685a: 681b ldr r3, [r3, #0]
800685c: 4a6b ldr r2, [pc, #428] @ (8006a0c <HAL_DMA_Abort+0x230>)
800685e: 4293 cmp r3, r2
8006860: d027 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
8006862: 687b ldr r3, [r7, #4]
8006864: 681b ldr r3, [r3, #0]
8006866: 4a6a ldr r2, [pc, #424] @ (8006a10 <HAL_DMA_Abort+0x234>)
8006868: 4293 cmp r3, r2
800686a: d022 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
800686c: 687b ldr r3, [r7, #4]
800686e: 681b ldr r3, [r3, #0]
8006870: 4a68 ldr r2, [pc, #416] @ (8006a14 <HAL_DMA_Abort+0x238>)
8006872: 4293 cmp r3, r2
8006874: d01d beq.n 80068b2 <HAL_DMA_Abort+0xd6>
8006876: 687b ldr r3, [r7, #4]
8006878: 681b ldr r3, [r3, #0]
800687a: 4a67 ldr r2, [pc, #412] @ (8006a18 <HAL_DMA_Abort+0x23c>)
800687c: 4293 cmp r3, r2
800687e: d018 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
8006880: 687b ldr r3, [r7, #4]
8006882: 681b ldr r3, [r3, #0]
8006884: 4a65 ldr r2, [pc, #404] @ (8006a1c <HAL_DMA_Abort+0x240>)
8006886: 4293 cmp r3, r2
8006888: d013 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
800688a: 687b ldr r3, [r7, #4]
800688c: 681b ldr r3, [r3, #0]
800688e: 4a64 ldr r2, [pc, #400] @ (8006a20 <HAL_DMA_Abort+0x244>)
8006890: 4293 cmp r3, r2
8006892: d00e beq.n 80068b2 <HAL_DMA_Abort+0xd6>
8006894: 687b ldr r3, [r7, #4]
8006896: 681b ldr r3, [r3, #0]
8006898: 4a62 ldr r2, [pc, #392] @ (8006a24 <HAL_DMA_Abort+0x248>)
800689a: 4293 cmp r3, r2
800689c: d009 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
800689e: 687b ldr r3, [r7, #4]
80068a0: 681b ldr r3, [r3, #0]
80068a2: 4a61 ldr r2, [pc, #388] @ (8006a28 <HAL_DMA_Abort+0x24c>)
80068a4: 4293 cmp r3, r2
80068a6: d004 beq.n 80068b2 <HAL_DMA_Abort+0xd6>
80068a8: 687b ldr r3, [r7, #4]
80068aa: 681b ldr r3, [r3, #0]
80068ac: 4a5f ldr r2, [pc, #380] @ (8006a2c <HAL_DMA_Abort+0x250>)
80068ae: 4293 cmp r3, r2
80068b0: d101 bne.n 80068b6 <HAL_DMA_Abort+0xda>
80068b2: 2301 movs r3, #1
80068b4: e000 b.n 80068b8 <HAL_DMA_Abort+0xdc>
80068b6: 2300 movs r3, #0
80068b8: 2b00 cmp r3, #0
80068ba: d013 beq.n 80068e4 <HAL_DMA_Abort+0x108>
{
/* Disable DMA All Interrupts */
((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT);
80068bc: 687b ldr r3, [r7, #4]
80068be: 681b ldr r3, [r3, #0]
80068c0: 681a ldr r2, [r3, #0]
80068c2: 687b ldr r3, [r7, #4]
80068c4: 681b ldr r3, [r3, #0]
80068c6: f022 021e bic.w r2, r2, #30
80068ca: 601a str r2, [r3, #0]
((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
80068cc: 687b ldr r3, [r7, #4]
80068ce: 681b ldr r3, [r3, #0]
80068d0: 695a ldr r2, [r3, #20]
80068d2: 687b ldr r3, [r7, #4]
80068d4: 681b ldr r3, [r3, #0]
80068d6: f022 0280 bic.w r2, r2, #128 @ 0x80
80068da: 615a str r2, [r3, #20]
enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef *)hdma->Instance)->CR));
80068dc: 687b ldr r3, [r7, #4]
80068de: 681b ldr r3, [r3, #0]
80068e0: 617b str r3, [r7, #20]
80068e2: e00a b.n 80068fa <HAL_DMA_Abort+0x11e>
}
else /* BDMA channel */
{
/* Disable DMA All Interrupts */
((BDMA_Channel_TypeDef *)hdma->Instance)->CCR &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
80068e4: 687b ldr r3, [r7, #4]
80068e6: 681b ldr r3, [r3, #0]
80068e8: 681a ldr r2, [r3, #0]
80068ea: 687b ldr r3, [r7, #4]
80068ec: 681b ldr r3, [r3, #0]
80068ee: f022 020e bic.w r2, r2, #14
80068f2: 601a str r2, [r3, #0]
enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef *)hdma->Instance)->CCR));
80068f4: 687b ldr r3, [r7, #4]
80068f6: 681b ldr r3, [r3, #0]
80068f8: 617b str r3, [r7, #20]
}
if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
80068fa: 687b ldr r3, [r7, #4]
80068fc: 681b ldr r3, [r3, #0]
80068fe: 4a3c ldr r2, [pc, #240] @ (80069f0 <HAL_DMA_Abort+0x214>)
8006900: 4293 cmp r3, r2
8006902: d072 beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006904: 687b ldr r3, [r7, #4]
8006906: 681b ldr r3, [r3, #0]
8006908: 4a3a ldr r2, [pc, #232] @ (80069f4 <HAL_DMA_Abort+0x218>)
800690a: 4293 cmp r3, r2
800690c: d06d beq.n 80069ea <HAL_DMA_Abort+0x20e>
800690e: 687b ldr r3, [r7, #4]
8006910: 681b ldr r3, [r3, #0]
8006912: 4a39 ldr r2, [pc, #228] @ (80069f8 <HAL_DMA_Abort+0x21c>)
8006914: 4293 cmp r3, r2
8006916: d068 beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006918: 687b ldr r3, [r7, #4]
800691a: 681b ldr r3, [r3, #0]
800691c: 4a37 ldr r2, [pc, #220] @ (80069fc <HAL_DMA_Abort+0x220>)
800691e: 4293 cmp r3, r2
8006920: d063 beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006922: 687b ldr r3, [r7, #4]
8006924: 681b ldr r3, [r3, #0]
8006926: 4a36 ldr r2, [pc, #216] @ (8006a00 <HAL_DMA_Abort+0x224>)
8006928: 4293 cmp r3, r2
800692a: d05e beq.n 80069ea <HAL_DMA_Abort+0x20e>
800692c: 687b ldr r3, [r7, #4]
800692e: 681b ldr r3, [r3, #0]
8006930: 4a34 ldr r2, [pc, #208] @ (8006a04 <HAL_DMA_Abort+0x228>)
8006932: 4293 cmp r3, r2
8006934: d059 beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006936: 687b ldr r3, [r7, #4]
8006938: 681b ldr r3, [r3, #0]
800693a: 4a33 ldr r2, [pc, #204] @ (8006a08 <HAL_DMA_Abort+0x22c>)
800693c: 4293 cmp r3, r2
800693e: d054 beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006940: 687b ldr r3, [r7, #4]
8006942: 681b ldr r3, [r3, #0]
8006944: 4a31 ldr r2, [pc, #196] @ (8006a0c <HAL_DMA_Abort+0x230>)
8006946: 4293 cmp r3, r2
8006948: d04f beq.n 80069ea <HAL_DMA_Abort+0x20e>
800694a: 687b ldr r3, [r7, #4]
800694c: 681b ldr r3, [r3, #0]
800694e: 4a30 ldr r2, [pc, #192] @ (8006a10 <HAL_DMA_Abort+0x234>)
8006950: 4293 cmp r3, r2
8006952: d04a beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006954: 687b ldr r3, [r7, #4]
8006956: 681b ldr r3, [r3, #0]
8006958: 4a2e ldr r2, [pc, #184] @ (8006a14 <HAL_DMA_Abort+0x238>)
800695a: 4293 cmp r3, r2
800695c: d045 beq.n 80069ea <HAL_DMA_Abort+0x20e>
800695e: 687b ldr r3, [r7, #4]
8006960: 681b ldr r3, [r3, #0]
8006962: 4a2d ldr r2, [pc, #180] @ (8006a18 <HAL_DMA_Abort+0x23c>)
8006964: 4293 cmp r3, r2
8006966: d040 beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006968: 687b ldr r3, [r7, #4]
800696a: 681b ldr r3, [r3, #0]
800696c: 4a2b ldr r2, [pc, #172] @ (8006a1c <HAL_DMA_Abort+0x240>)
800696e: 4293 cmp r3, r2
8006970: d03b beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006972: 687b ldr r3, [r7, #4]
8006974: 681b ldr r3, [r3, #0]
8006976: 4a2a ldr r2, [pc, #168] @ (8006a20 <HAL_DMA_Abort+0x244>)
8006978: 4293 cmp r3, r2
800697a: d036 beq.n 80069ea <HAL_DMA_Abort+0x20e>
800697c: 687b ldr r3, [r7, #4]
800697e: 681b ldr r3, [r3, #0]
8006980: 4a28 ldr r2, [pc, #160] @ (8006a24 <HAL_DMA_Abort+0x248>)
8006982: 4293 cmp r3, r2
8006984: d031 beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006986: 687b ldr r3, [r7, #4]
8006988: 681b ldr r3, [r3, #0]
800698a: 4a27 ldr r2, [pc, #156] @ (8006a28 <HAL_DMA_Abort+0x24c>)
800698c: 4293 cmp r3, r2
800698e: d02c beq.n 80069ea <HAL_DMA_Abort+0x20e>
8006990: 687b ldr r3, [r7, #4]
8006992: 681b ldr r3, [r3, #0]
8006994: 4a25 ldr r2, [pc, #148] @ (8006a2c <HAL_DMA_Abort+0x250>)
8006996: 4293 cmp r3, r2
8006998: d027 beq.n 80069ea <HAL_DMA_Abort+0x20e>
800699a: 687b ldr r3, [r7, #4]
800699c: 681b ldr r3, [r3, #0]
800699e: 4a24 ldr r2, [pc, #144] @ (8006a30 <HAL_DMA_Abort+0x254>)
80069a0: 4293 cmp r3, r2
80069a2: d022 beq.n 80069ea <HAL_DMA_Abort+0x20e>
80069a4: 687b ldr r3, [r7, #4]
80069a6: 681b ldr r3, [r3, #0]
80069a8: 4a22 ldr r2, [pc, #136] @ (8006a34 <HAL_DMA_Abort+0x258>)
80069aa: 4293 cmp r3, r2
80069ac: d01d beq.n 80069ea <HAL_DMA_Abort+0x20e>
80069ae: 687b ldr r3, [r7, #4]
80069b0: 681b ldr r3, [r3, #0]
80069b2: 4a21 ldr r2, [pc, #132] @ (8006a38 <HAL_DMA_Abort+0x25c>)
80069b4: 4293 cmp r3, r2
80069b6: d018 beq.n 80069ea <HAL_DMA_Abort+0x20e>
80069b8: 687b ldr r3, [r7, #4]
80069ba: 681b ldr r3, [r3, #0]
80069bc: 4a1f ldr r2, [pc, #124] @ (8006a3c <HAL_DMA_Abort+0x260>)
80069be: 4293 cmp r3, r2
80069c0: d013 beq.n 80069ea <HAL_DMA_Abort+0x20e>
80069c2: 687b ldr r3, [r7, #4]
80069c4: 681b ldr r3, [r3, #0]
80069c6: 4a1e ldr r2, [pc, #120] @ (8006a40 <HAL_DMA_Abort+0x264>)
80069c8: 4293 cmp r3, r2
80069ca: d00e beq.n 80069ea <HAL_DMA_Abort+0x20e>
80069cc: 687b ldr r3, [r7, #4]
80069ce: 681b ldr r3, [r3, #0]
80069d0: 4a1c ldr r2, [pc, #112] @ (8006a44 <HAL_DMA_Abort+0x268>)
80069d2: 4293 cmp r3, r2
80069d4: d009 beq.n 80069ea <HAL_DMA_Abort+0x20e>
80069d6: 687b ldr r3, [r7, #4]
80069d8: 681b ldr r3, [r3, #0]
80069da: 4a1b ldr r2, [pc, #108] @ (8006a48 <HAL_DMA_Abort+0x26c>)
80069dc: 4293 cmp r3, r2
80069de: d004 beq.n 80069ea <HAL_DMA_Abort+0x20e>
80069e0: 687b ldr r3, [r7, #4]
80069e2: 681b ldr r3, [r3, #0]
80069e4: 4a19 ldr r2, [pc, #100] @ (8006a4c <HAL_DMA_Abort+0x270>)
80069e6: 4293 cmp r3, r2
80069e8: d132 bne.n 8006a50 <HAL_DMA_Abort+0x274>
80069ea: 2301 movs r3, #1
80069ec: e031 b.n 8006a52 <HAL_DMA_Abort+0x276>
80069ee: bf00 nop
80069f0: 40020010 .word 0x40020010
80069f4: 40020028 .word 0x40020028
80069f8: 40020040 .word 0x40020040
80069fc: 40020058 .word 0x40020058
8006a00: 40020070 .word 0x40020070
8006a04: 40020088 .word 0x40020088
8006a08: 400200a0 .word 0x400200a0
8006a0c: 400200b8 .word 0x400200b8
8006a10: 40020410 .word 0x40020410
8006a14: 40020428 .word 0x40020428
8006a18: 40020440 .word 0x40020440
8006a1c: 40020458 .word 0x40020458
8006a20: 40020470 .word 0x40020470
8006a24: 40020488 .word 0x40020488
8006a28: 400204a0 .word 0x400204a0
8006a2c: 400204b8 .word 0x400204b8
8006a30: 58025408 .word 0x58025408
8006a34: 5802541c .word 0x5802541c
8006a38: 58025430 .word 0x58025430
8006a3c: 58025444 .word 0x58025444
8006a40: 58025458 .word 0x58025458
8006a44: 5802546c .word 0x5802546c
8006a48: 58025480 .word 0x58025480
8006a4c: 58025494 .word 0x58025494
8006a50: 2300 movs r3, #0
8006a52: 2b00 cmp r3, #0
8006a54: d007 beq.n 8006a66 <HAL_DMA_Abort+0x28a>
{
/* disable the DMAMUX sync overrun IT */
hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
8006a56: 687b ldr r3, [r7, #4]
8006a58: 6e1b ldr r3, [r3, #96] @ 0x60
8006a5a: 681a ldr r2, [r3, #0]
8006a5c: 687b ldr r3, [r7, #4]
8006a5e: 6e1b ldr r3, [r3, #96] @ 0x60
8006a60: f422 7280 bic.w r2, r2, #256 @ 0x100
8006a64: 601a str r2, [r3, #0]
}
/* Disable the stream */
__HAL_DMA_DISABLE(hdma);
8006a66: 687b ldr r3, [r7, #4]
8006a68: 681b ldr r3, [r3, #0]
8006a6a: 4a6d ldr r2, [pc, #436] @ (8006c20 <HAL_DMA_Abort+0x444>)
8006a6c: 4293 cmp r3, r2
8006a6e: d04a beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006a70: 687b ldr r3, [r7, #4]
8006a72: 681b ldr r3, [r3, #0]
8006a74: 4a6b ldr r2, [pc, #428] @ (8006c24 <HAL_DMA_Abort+0x448>)
8006a76: 4293 cmp r3, r2
8006a78: d045 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006a7a: 687b ldr r3, [r7, #4]
8006a7c: 681b ldr r3, [r3, #0]
8006a7e: 4a6a ldr r2, [pc, #424] @ (8006c28 <HAL_DMA_Abort+0x44c>)
8006a80: 4293 cmp r3, r2
8006a82: d040 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006a84: 687b ldr r3, [r7, #4]
8006a86: 681b ldr r3, [r3, #0]
8006a88: 4a68 ldr r2, [pc, #416] @ (8006c2c <HAL_DMA_Abort+0x450>)
8006a8a: 4293 cmp r3, r2
8006a8c: d03b beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006a8e: 687b ldr r3, [r7, #4]
8006a90: 681b ldr r3, [r3, #0]
8006a92: 4a67 ldr r2, [pc, #412] @ (8006c30 <HAL_DMA_Abort+0x454>)
8006a94: 4293 cmp r3, r2
8006a96: d036 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006a98: 687b ldr r3, [r7, #4]
8006a9a: 681b ldr r3, [r3, #0]
8006a9c: 4a65 ldr r2, [pc, #404] @ (8006c34 <HAL_DMA_Abort+0x458>)
8006a9e: 4293 cmp r3, r2
8006aa0: d031 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006aa2: 687b ldr r3, [r7, #4]
8006aa4: 681b ldr r3, [r3, #0]
8006aa6: 4a64 ldr r2, [pc, #400] @ (8006c38 <HAL_DMA_Abort+0x45c>)
8006aa8: 4293 cmp r3, r2
8006aaa: d02c beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006aac: 687b ldr r3, [r7, #4]
8006aae: 681b ldr r3, [r3, #0]
8006ab0: 4a62 ldr r2, [pc, #392] @ (8006c3c <HAL_DMA_Abort+0x460>)
8006ab2: 4293 cmp r3, r2
8006ab4: d027 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006ab6: 687b ldr r3, [r7, #4]
8006ab8: 681b ldr r3, [r3, #0]
8006aba: 4a61 ldr r2, [pc, #388] @ (8006c40 <HAL_DMA_Abort+0x464>)
8006abc: 4293 cmp r3, r2
8006abe: d022 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006ac0: 687b ldr r3, [r7, #4]
8006ac2: 681b ldr r3, [r3, #0]
8006ac4: 4a5f ldr r2, [pc, #380] @ (8006c44 <HAL_DMA_Abort+0x468>)
8006ac6: 4293 cmp r3, r2
8006ac8: d01d beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006aca: 687b ldr r3, [r7, #4]
8006acc: 681b ldr r3, [r3, #0]
8006ace: 4a5e ldr r2, [pc, #376] @ (8006c48 <HAL_DMA_Abort+0x46c>)
8006ad0: 4293 cmp r3, r2
8006ad2: d018 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006ad4: 687b ldr r3, [r7, #4]
8006ad6: 681b ldr r3, [r3, #0]
8006ad8: 4a5c ldr r2, [pc, #368] @ (8006c4c <HAL_DMA_Abort+0x470>)
8006ada: 4293 cmp r3, r2
8006adc: d013 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006ade: 687b ldr r3, [r7, #4]
8006ae0: 681b ldr r3, [r3, #0]
8006ae2: 4a5b ldr r2, [pc, #364] @ (8006c50 <HAL_DMA_Abort+0x474>)
8006ae4: 4293 cmp r3, r2
8006ae6: d00e beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006ae8: 687b ldr r3, [r7, #4]
8006aea: 681b ldr r3, [r3, #0]
8006aec: 4a59 ldr r2, [pc, #356] @ (8006c54 <HAL_DMA_Abort+0x478>)
8006aee: 4293 cmp r3, r2
8006af0: d009 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006af2: 687b ldr r3, [r7, #4]
8006af4: 681b ldr r3, [r3, #0]
8006af6: 4a58 ldr r2, [pc, #352] @ (8006c58 <HAL_DMA_Abort+0x47c>)
8006af8: 4293 cmp r3, r2
8006afa: d004 beq.n 8006b06 <HAL_DMA_Abort+0x32a>
8006afc: 687b ldr r3, [r7, #4]
8006afe: 681b ldr r3, [r3, #0]
8006b00: 4a56 ldr r2, [pc, #344] @ (8006c5c <HAL_DMA_Abort+0x480>)
8006b02: 4293 cmp r3, r2
8006b04: d108 bne.n 8006b18 <HAL_DMA_Abort+0x33c>
8006b06: 687b ldr r3, [r7, #4]
8006b08: 681b ldr r3, [r3, #0]
8006b0a: 681a ldr r2, [r3, #0]
8006b0c: 687b ldr r3, [r7, #4]
8006b0e: 681b ldr r3, [r3, #0]
8006b10: f022 0201 bic.w r2, r2, #1
8006b14: 601a str r2, [r3, #0]
8006b16: e007 b.n 8006b28 <HAL_DMA_Abort+0x34c>
8006b18: 687b ldr r3, [r7, #4]
8006b1a: 681b ldr r3, [r3, #0]
8006b1c: 681a ldr r2, [r3, #0]
8006b1e: 687b ldr r3, [r7, #4]
8006b20: 681b ldr r3, [r3, #0]
8006b22: f022 0201 bic.w r2, r2, #1
8006b26: 601a str r2, [r3, #0]
/* Check if the DMA Stream is effectively disabled */
while(((*enableRegister) & DMA_SxCR_EN) != 0U)
8006b28: e013 b.n 8006b52 <HAL_DMA_Abort+0x376>
{
/* Check for the Timeout */
if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
8006b2a: f7fe ff4d bl 80059c8 <HAL_GetTick>
8006b2e: 4602 mov r2, r0
8006b30: 693b ldr r3, [r7, #16]
8006b32: 1ad3 subs r3, r2, r3
8006b34: 2b05 cmp r3, #5
8006b36: d90c bls.n 8006b52 <HAL_DMA_Abort+0x376>
{
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
8006b38: 687b ldr r3, [r7, #4]
8006b3a: 2220 movs r2, #32
8006b3c: 655a str r2, [r3, #84] @ 0x54
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_ERROR;
8006b3e: 687b ldr r3, [r7, #4]
8006b40: 2203 movs r2, #3
8006b42: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8006b46: 687b ldr r3, [r7, #4]
8006b48: 2200 movs r2, #0
8006b4a: f883 2034 strb.w r2, [r3, #52] @ 0x34
return HAL_ERROR;
8006b4e: 2301 movs r3, #1
8006b50: e12d b.n 8006dae <HAL_DMA_Abort+0x5d2>
while(((*enableRegister) & DMA_SxCR_EN) != 0U)
8006b52: 697b ldr r3, [r7, #20]
8006b54: 681b ldr r3, [r3, #0]
8006b56: f003 0301 and.w r3, r3, #1
8006b5a: 2b00 cmp r3, #0
8006b5c: d1e5 bne.n 8006b2a <HAL_DMA_Abort+0x34e>
}
}
/* Clear all interrupt flags at correct offset within the register */
if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
8006b5e: 687b ldr r3, [r7, #4]
8006b60: 681b ldr r3, [r3, #0]
8006b62: 4a2f ldr r2, [pc, #188] @ (8006c20 <HAL_DMA_Abort+0x444>)
8006b64: 4293 cmp r3, r2
8006b66: d04a beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006b68: 687b ldr r3, [r7, #4]
8006b6a: 681b ldr r3, [r3, #0]
8006b6c: 4a2d ldr r2, [pc, #180] @ (8006c24 <HAL_DMA_Abort+0x448>)
8006b6e: 4293 cmp r3, r2
8006b70: d045 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006b72: 687b ldr r3, [r7, #4]
8006b74: 681b ldr r3, [r3, #0]
8006b76: 4a2c ldr r2, [pc, #176] @ (8006c28 <HAL_DMA_Abort+0x44c>)
8006b78: 4293 cmp r3, r2
8006b7a: d040 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006b7c: 687b ldr r3, [r7, #4]
8006b7e: 681b ldr r3, [r3, #0]
8006b80: 4a2a ldr r2, [pc, #168] @ (8006c2c <HAL_DMA_Abort+0x450>)
8006b82: 4293 cmp r3, r2
8006b84: d03b beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006b86: 687b ldr r3, [r7, #4]
8006b88: 681b ldr r3, [r3, #0]
8006b8a: 4a29 ldr r2, [pc, #164] @ (8006c30 <HAL_DMA_Abort+0x454>)
8006b8c: 4293 cmp r3, r2
8006b8e: d036 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006b90: 687b ldr r3, [r7, #4]
8006b92: 681b ldr r3, [r3, #0]
8006b94: 4a27 ldr r2, [pc, #156] @ (8006c34 <HAL_DMA_Abort+0x458>)
8006b96: 4293 cmp r3, r2
8006b98: d031 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006b9a: 687b ldr r3, [r7, #4]
8006b9c: 681b ldr r3, [r3, #0]
8006b9e: 4a26 ldr r2, [pc, #152] @ (8006c38 <HAL_DMA_Abort+0x45c>)
8006ba0: 4293 cmp r3, r2
8006ba2: d02c beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006ba4: 687b ldr r3, [r7, #4]
8006ba6: 681b ldr r3, [r3, #0]
8006ba8: 4a24 ldr r2, [pc, #144] @ (8006c3c <HAL_DMA_Abort+0x460>)
8006baa: 4293 cmp r3, r2
8006bac: d027 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006bae: 687b ldr r3, [r7, #4]
8006bb0: 681b ldr r3, [r3, #0]
8006bb2: 4a23 ldr r2, [pc, #140] @ (8006c40 <HAL_DMA_Abort+0x464>)
8006bb4: 4293 cmp r3, r2
8006bb6: d022 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006bb8: 687b ldr r3, [r7, #4]
8006bba: 681b ldr r3, [r3, #0]
8006bbc: 4a21 ldr r2, [pc, #132] @ (8006c44 <HAL_DMA_Abort+0x468>)
8006bbe: 4293 cmp r3, r2
8006bc0: d01d beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006bc2: 687b ldr r3, [r7, #4]
8006bc4: 681b ldr r3, [r3, #0]
8006bc6: 4a20 ldr r2, [pc, #128] @ (8006c48 <HAL_DMA_Abort+0x46c>)
8006bc8: 4293 cmp r3, r2
8006bca: d018 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006bcc: 687b ldr r3, [r7, #4]
8006bce: 681b ldr r3, [r3, #0]
8006bd0: 4a1e ldr r2, [pc, #120] @ (8006c4c <HAL_DMA_Abort+0x470>)
8006bd2: 4293 cmp r3, r2
8006bd4: d013 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006bd6: 687b ldr r3, [r7, #4]
8006bd8: 681b ldr r3, [r3, #0]
8006bda: 4a1d ldr r2, [pc, #116] @ (8006c50 <HAL_DMA_Abort+0x474>)
8006bdc: 4293 cmp r3, r2
8006bde: d00e beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006be0: 687b ldr r3, [r7, #4]
8006be2: 681b ldr r3, [r3, #0]
8006be4: 4a1b ldr r2, [pc, #108] @ (8006c54 <HAL_DMA_Abort+0x478>)
8006be6: 4293 cmp r3, r2
8006be8: d009 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006bea: 687b ldr r3, [r7, #4]
8006bec: 681b ldr r3, [r3, #0]
8006bee: 4a1a ldr r2, [pc, #104] @ (8006c58 <HAL_DMA_Abort+0x47c>)
8006bf0: 4293 cmp r3, r2
8006bf2: d004 beq.n 8006bfe <HAL_DMA_Abort+0x422>
8006bf4: 687b ldr r3, [r7, #4]
8006bf6: 681b ldr r3, [r3, #0]
8006bf8: 4a18 ldr r2, [pc, #96] @ (8006c5c <HAL_DMA_Abort+0x480>)
8006bfa: 4293 cmp r3, r2
8006bfc: d101 bne.n 8006c02 <HAL_DMA_Abort+0x426>
8006bfe: 2301 movs r3, #1
8006c00: e000 b.n 8006c04 <HAL_DMA_Abort+0x428>
8006c02: 2300 movs r3, #0
8006c04: 2b00 cmp r3, #0
8006c06: d02b beq.n 8006c60 <HAL_DMA_Abort+0x484>
{
regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
8006c08: 687b ldr r3, [r7, #4]
8006c0a: 6d9b ldr r3, [r3, #88] @ 0x58
8006c0c: 60bb str r3, [r7, #8]
regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
8006c0e: 687b ldr r3, [r7, #4]
8006c10: 6ddb ldr r3, [r3, #92] @ 0x5c
8006c12: f003 031f and.w r3, r3, #31
8006c16: 223f movs r2, #63 @ 0x3f
8006c18: 409a lsls r2, r3
8006c1a: 68bb ldr r3, [r7, #8]
8006c1c: 609a str r2, [r3, #8]
8006c1e: e02a b.n 8006c76 <HAL_DMA_Abort+0x49a>
8006c20: 40020010 .word 0x40020010
8006c24: 40020028 .word 0x40020028
8006c28: 40020040 .word 0x40020040
8006c2c: 40020058 .word 0x40020058
8006c30: 40020070 .word 0x40020070
8006c34: 40020088 .word 0x40020088
8006c38: 400200a0 .word 0x400200a0
8006c3c: 400200b8 .word 0x400200b8
8006c40: 40020410 .word 0x40020410
8006c44: 40020428 .word 0x40020428
8006c48: 40020440 .word 0x40020440
8006c4c: 40020458 .word 0x40020458
8006c50: 40020470 .word 0x40020470
8006c54: 40020488 .word 0x40020488
8006c58: 400204a0 .word 0x400204a0
8006c5c: 400204b8 .word 0x400204b8
}
else /* BDMA channel */
{
regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
8006c60: 687b ldr r3, [r7, #4]
8006c62: 6d9b ldr r3, [r3, #88] @ 0x58
8006c64: 60fb str r3, [r7, #12]
regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
8006c66: 687b ldr r3, [r7, #4]
8006c68: 6ddb ldr r3, [r3, #92] @ 0x5c
8006c6a: f003 031f and.w r3, r3, #31
8006c6e: 2201 movs r2, #1
8006c70: 409a lsls r2, r3
8006c72: 68fb ldr r3, [r7, #12]
8006c74: 605a str r2, [r3, #4]
}
if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
8006c76: 687b ldr r3, [r7, #4]
8006c78: 681b ldr r3, [r3, #0]
8006c7a: 4a4f ldr r2, [pc, #316] @ (8006db8 <HAL_DMA_Abort+0x5dc>)
8006c7c: 4293 cmp r3, r2
8006c7e: d072 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006c80: 687b ldr r3, [r7, #4]
8006c82: 681b ldr r3, [r3, #0]
8006c84: 4a4d ldr r2, [pc, #308] @ (8006dbc <HAL_DMA_Abort+0x5e0>)
8006c86: 4293 cmp r3, r2
8006c88: d06d beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006c8a: 687b ldr r3, [r7, #4]
8006c8c: 681b ldr r3, [r3, #0]
8006c8e: 4a4c ldr r2, [pc, #304] @ (8006dc0 <HAL_DMA_Abort+0x5e4>)
8006c90: 4293 cmp r3, r2
8006c92: d068 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006c94: 687b ldr r3, [r7, #4]
8006c96: 681b ldr r3, [r3, #0]
8006c98: 4a4a ldr r2, [pc, #296] @ (8006dc4 <HAL_DMA_Abort+0x5e8>)
8006c9a: 4293 cmp r3, r2
8006c9c: d063 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006c9e: 687b ldr r3, [r7, #4]
8006ca0: 681b ldr r3, [r3, #0]
8006ca2: 4a49 ldr r2, [pc, #292] @ (8006dc8 <HAL_DMA_Abort+0x5ec>)
8006ca4: 4293 cmp r3, r2
8006ca6: d05e beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006ca8: 687b ldr r3, [r7, #4]
8006caa: 681b ldr r3, [r3, #0]
8006cac: 4a47 ldr r2, [pc, #284] @ (8006dcc <HAL_DMA_Abort+0x5f0>)
8006cae: 4293 cmp r3, r2
8006cb0: d059 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006cb2: 687b ldr r3, [r7, #4]
8006cb4: 681b ldr r3, [r3, #0]
8006cb6: 4a46 ldr r2, [pc, #280] @ (8006dd0 <HAL_DMA_Abort+0x5f4>)
8006cb8: 4293 cmp r3, r2
8006cba: d054 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006cbc: 687b ldr r3, [r7, #4]
8006cbe: 681b ldr r3, [r3, #0]
8006cc0: 4a44 ldr r2, [pc, #272] @ (8006dd4 <HAL_DMA_Abort+0x5f8>)
8006cc2: 4293 cmp r3, r2
8006cc4: d04f beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006cc6: 687b ldr r3, [r7, #4]
8006cc8: 681b ldr r3, [r3, #0]
8006cca: 4a43 ldr r2, [pc, #268] @ (8006dd8 <HAL_DMA_Abort+0x5fc>)
8006ccc: 4293 cmp r3, r2
8006cce: d04a beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006cd0: 687b ldr r3, [r7, #4]
8006cd2: 681b ldr r3, [r3, #0]
8006cd4: 4a41 ldr r2, [pc, #260] @ (8006ddc <HAL_DMA_Abort+0x600>)
8006cd6: 4293 cmp r3, r2
8006cd8: d045 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006cda: 687b ldr r3, [r7, #4]
8006cdc: 681b ldr r3, [r3, #0]
8006cde: 4a40 ldr r2, [pc, #256] @ (8006de0 <HAL_DMA_Abort+0x604>)
8006ce0: 4293 cmp r3, r2
8006ce2: d040 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006ce4: 687b ldr r3, [r7, #4]
8006ce6: 681b ldr r3, [r3, #0]
8006ce8: 4a3e ldr r2, [pc, #248] @ (8006de4 <HAL_DMA_Abort+0x608>)
8006cea: 4293 cmp r3, r2
8006cec: d03b beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006cee: 687b ldr r3, [r7, #4]
8006cf0: 681b ldr r3, [r3, #0]
8006cf2: 4a3d ldr r2, [pc, #244] @ (8006de8 <HAL_DMA_Abort+0x60c>)
8006cf4: 4293 cmp r3, r2
8006cf6: d036 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006cf8: 687b ldr r3, [r7, #4]
8006cfa: 681b ldr r3, [r3, #0]
8006cfc: 4a3b ldr r2, [pc, #236] @ (8006dec <HAL_DMA_Abort+0x610>)
8006cfe: 4293 cmp r3, r2
8006d00: d031 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d02: 687b ldr r3, [r7, #4]
8006d04: 681b ldr r3, [r3, #0]
8006d06: 4a3a ldr r2, [pc, #232] @ (8006df0 <HAL_DMA_Abort+0x614>)
8006d08: 4293 cmp r3, r2
8006d0a: d02c beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d0c: 687b ldr r3, [r7, #4]
8006d0e: 681b ldr r3, [r3, #0]
8006d10: 4a38 ldr r2, [pc, #224] @ (8006df4 <HAL_DMA_Abort+0x618>)
8006d12: 4293 cmp r3, r2
8006d14: d027 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d16: 687b ldr r3, [r7, #4]
8006d18: 681b ldr r3, [r3, #0]
8006d1a: 4a37 ldr r2, [pc, #220] @ (8006df8 <HAL_DMA_Abort+0x61c>)
8006d1c: 4293 cmp r3, r2
8006d1e: d022 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d20: 687b ldr r3, [r7, #4]
8006d22: 681b ldr r3, [r3, #0]
8006d24: 4a35 ldr r2, [pc, #212] @ (8006dfc <HAL_DMA_Abort+0x620>)
8006d26: 4293 cmp r3, r2
8006d28: d01d beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d2a: 687b ldr r3, [r7, #4]
8006d2c: 681b ldr r3, [r3, #0]
8006d2e: 4a34 ldr r2, [pc, #208] @ (8006e00 <HAL_DMA_Abort+0x624>)
8006d30: 4293 cmp r3, r2
8006d32: d018 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d34: 687b ldr r3, [r7, #4]
8006d36: 681b ldr r3, [r3, #0]
8006d38: 4a32 ldr r2, [pc, #200] @ (8006e04 <HAL_DMA_Abort+0x628>)
8006d3a: 4293 cmp r3, r2
8006d3c: d013 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d3e: 687b ldr r3, [r7, #4]
8006d40: 681b ldr r3, [r3, #0]
8006d42: 4a31 ldr r2, [pc, #196] @ (8006e08 <HAL_DMA_Abort+0x62c>)
8006d44: 4293 cmp r3, r2
8006d46: d00e beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d48: 687b ldr r3, [r7, #4]
8006d4a: 681b ldr r3, [r3, #0]
8006d4c: 4a2f ldr r2, [pc, #188] @ (8006e0c <HAL_DMA_Abort+0x630>)
8006d4e: 4293 cmp r3, r2
8006d50: d009 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d52: 687b ldr r3, [r7, #4]
8006d54: 681b ldr r3, [r3, #0]
8006d56: 4a2e ldr r2, [pc, #184] @ (8006e10 <HAL_DMA_Abort+0x634>)
8006d58: 4293 cmp r3, r2
8006d5a: d004 beq.n 8006d66 <HAL_DMA_Abort+0x58a>
8006d5c: 687b ldr r3, [r7, #4]
8006d5e: 681b ldr r3, [r3, #0]
8006d60: 4a2c ldr r2, [pc, #176] @ (8006e14 <HAL_DMA_Abort+0x638>)
8006d62: 4293 cmp r3, r2
8006d64: d101 bne.n 8006d6a <HAL_DMA_Abort+0x58e>
8006d66: 2301 movs r3, #1
8006d68: e000 b.n 8006d6c <HAL_DMA_Abort+0x590>
8006d6a: 2300 movs r3, #0
8006d6c: 2b00 cmp r3, #0
8006d6e: d015 beq.n 8006d9c <HAL_DMA_Abort+0x5c0>
{
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
8006d70: 687b ldr r3, [r7, #4]
8006d72: 6e5b ldr r3, [r3, #100] @ 0x64
8006d74: 687a ldr r2, [r7, #4]
8006d76: 6e92 ldr r2, [r2, #104] @ 0x68
8006d78: 605a str r2, [r3, #4]
if(hdma->DMAmuxRequestGen != 0U)
8006d7a: 687b ldr r3, [r7, #4]
8006d7c: 6edb ldr r3, [r3, #108] @ 0x6c
8006d7e: 2b00 cmp r3, #0
8006d80: d00c beq.n 8006d9c <HAL_DMA_Abort+0x5c0>
{
/* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */
/* disable the request gen overrun IT */
hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
8006d82: 687b ldr r3, [r7, #4]
8006d84: 6edb ldr r3, [r3, #108] @ 0x6c
8006d86: 681a ldr r2, [r3, #0]
8006d88: 687b ldr r3, [r7, #4]
8006d8a: 6edb ldr r3, [r3, #108] @ 0x6c
8006d8c: f422 7280 bic.w r2, r2, #256 @ 0x100
8006d90: 601a str r2, [r3, #0]
/* Clear the DMAMUX request generator overrun flag */
hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
8006d92: 687b ldr r3, [r7, #4]
8006d94: 6f1b ldr r3, [r3, #112] @ 0x70
8006d96: 687a ldr r2, [r7, #4]
8006d98: 6f52 ldr r2, [r2, #116] @ 0x74
8006d9a: 605a str r2, [r3, #4]
}
}
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8006d9c: 687b ldr r3, [r7, #4]
8006d9e: 2201 movs r2, #1
8006da0: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8006da4: 687b ldr r3, [r7, #4]
8006da6: 2200 movs r2, #0
8006da8: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
return HAL_OK;
8006dac: 2300 movs r3, #0
}
8006dae: 4618 mov r0, r3
8006db0: 3718 adds r7, #24
8006db2: 46bd mov sp, r7
8006db4: bd80 pop {r7, pc}
8006db6: bf00 nop
8006db8: 40020010 .word 0x40020010
8006dbc: 40020028 .word 0x40020028
8006dc0: 40020040 .word 0x40020040
8006dc4: 40020058 .word 0x40020058
8006dc8: 40020070 .word 0x40020070
8006dcc: 40020088 .word 0x40020088
8006dd0: 400200a0 .word 0x400200a0
8006dd4: 400200b8 .word 0x400200b8
8006dd8: 40020410 .word 0x40020410
8006ddc: 40020428 .word 0x40020428
8006de0: 40020440 .word 0x40020440
8006de4: 40020458 .word 0x40020458
8006de8: 40020470 .word 0x40020470
8006dec: 40020488 .word 0x40020488
8006df0: 400204a0 .word 0x400204a0
8006df4: 400204b8 .word 0x400204b8
8006df8: 58025408 .word 0x58025408
8006dfc: 5802541c .word 0x5802541c
8006e00: 58025430 .word 0x58025430
8006e04: 58025444 .word 0x58025444
8006e08: 58025458 .word 0x58025458
8006e0c: 5802546c .word 0x5802546c
8006e10: 58025480 .word 0x58025480
8006e14: 58025494 .word 0x58025494
08006e18 <HAL_DMA_Abort_IT>:
* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
8006e18: b580 push {r7, lr}
8006e1a: b084 sub sp, #16
8006e1c: af00 add r7, sp, #0
8006e1e: 6078 str r0, [r7, #4]
BDMA_Base_Registers *regs_bdma;
/* Check the DMA peripheral handle */
if(hdma == NULL)
8006e20: 687b ldr r3, [r7, #4]
8006e22: 2b00 cmp r3, #0
8006e24: d101 bne.n 8006e2a <HAL_DMA_Abort_IT+0x12>
{
return HAL_ERROR;
8006e26: 2301 movs r3, #1
8006e28: e237 b.n 800729a <HAL_DMA_Abort_IT+0x482>
}
if(hdma->State != HAL_DMA_STATE_BUSY)
8006e2a: 687b ldr r3, [r7, #4]
8006e2c: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
8006e30: b2db uxtb r3, r3
8006e32: 2b02 cmp r3, #2
8006e34: d004 beq.n 8006e40 <HAL_DMA_Abort_IT+0x28>
{
hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
8006e36: 687b ldr r3, [r7, #4]
8006e38: 2280 movs r2, #128 @ 0x80
8006e3a: 655a str r2, [r3, #84] @ 0x54
return HAL_ERROR;
8006e3c: 2301 movs r3, #1
8006e3e: e22c b.n 800729a <HAL_DMA_Abort_IT+0x482>
}
else
{
if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
8006e40: 687b ldr r3, [r7, #4]
8006e42: 681b ldr r3, [r3, #0]
8006e44: 4a5c ldr r2, [pc, #368] @ (8006fb8 <HAL_DMA_Abort_IT+0x1a0>)
8006e46: 4293 cmp r3, r2
8006e48: d04a beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006e4a: 687b ldr r3, [r7, #4]
8006e4c: 681b ldr r3, [r3, #0]
8006e4e: 4a5b ldr r2, [pc, #364] @ (8006fbc <HAL_DMA_Abort_IT+0x1a4>)
8006e50: 4293 cmp r3, r2
8006e52: d045 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006e54: 687b ldr r3, [r7, #4]
8006e56: 681b ldr r3, [r3, #0]
8006e58: 4a59 ldr r2, [pc, #356] @ (8006fc0 <HAL_DMA_Abort_IT+0x1a8>)
8006e5a: 4293 cmp r3, r2
8006e5c: d040 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006e5e: 687b ldr r3, [r7, #4]
8006e60: 681b ldr r3, [r3, #0]
8006e62: 4a58 ldr r2, [pc, #352] @ (8006fc4 <HAL_DMA_Abort_IT+0x1ac>)
8006e64: 4293 cmp r3, r2
8006e66: d03b beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006e68: 687b ldr r3, [r7, #4]
8006e6a: 681b ldr r3, [r3, #0]
8006e6c: 4a56 ldr r2, [pc, #344] @ (8006fc8 <HAL_DMA_Abort_IT+0x1b0>)
8006e6e: 4293 cmp r3, r2
8006e70: d036 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006e72: 687b ldr r3, [r7, #4]
8006e74: 681b ldr r3, [r3, #0]
8006e76: 4a55 ldr r2, [pc, #340] @ (8006fcc <HAL_DMA_Abort_IT+0x1b4>)
8006e78: 4293 cmp r3, r2
8006e7a: d031 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006e7c: 687b ldr r3, [r7, #4]
8006e7e: 681b ldr r3, [r3, #0]
8006e80: 4a53 ldr r2, [pc, #332] @ (8006fd0 <HAL_DMA_Abort_IT+0x1b8>)
8006e82: 4293 cmp r3, r2
8006e84: d02c beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006e86: 687b ldr r3, [r7, #4]
8006e88: 681b ldr r3, [r3, #0]
8006e8a: 4a52 ldr r2, [pc, #328] @ (8006fd4 <HAL_DMA_Abort_IT+0x1bc>)
8006e8c: 4293 cmp r3, r2
8006e8e: d027 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006e90: 687b ldr r3, [r7, #4]
8006e92: 681b ldr r3, [r3, #0]
8006e94: 4a50 ldr r2, [pc, #320] @ (8006fd8 <HAL_DMA_Abort_IT+0x1c0>)
8006e96: 4293 cmp r3, r2
8006e98: d022 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006e9a: 687b ldr r3, [r7, #4]
8006e9c: 681b ldr r3, [r3, #0]
8006e9e: 4a4f ldr r2, [pc, #316] @ (8006fdc <HAL_DMA_Abort_IT+0x1c4>)
8006ea0: 4293 cmp r3, r2
8006ea2: d01d beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006ea4: 687b ldr r3, [r7, #4]
8006ea6: 681b ldr r3, [r3, #0]
8006ea8: 4a4d ldr r2, [pc, #308] @ (8006fe0 <HAL_DMA_Abort_IT+0x1c8>)
8006eaa: 4293 cmp r3, r2
8006eac: d018 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006eae: 687b ldr r3, [r7, #4]
8006eb0: 681b ldr r3, [r3, #0]
8006eb2: 4a4c ldr r2, [pc, #304] @ (8006fe4 <HAL_DMA_Abort_IT+0x1cc>)
8006eb4: 4293 cmp r3, r2
8006eb6: d013 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006eb8: 687b ldr r3, [r7, #4]
8006eba: 681b ldr r3, [r3, #0]
8006ebc: 4a4a ldr r2, [pc, #296] @ (8006fe8 <HAL_DMA_Abort_IT+0x1d0>)
8006ebe: 4293 cmp r3, r2
8006ec0: d00e beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006ec2: 687b ldr r3, [r7, #4]
8006ec4: 681b ldr r3, [r3, #0]
8006ec6: 4a49 ldr r2, [pc, #292] @ (8006fec <HAL_DMA_Abort_IT+0x1d4>)
8006ec8: 4293 cmp r3, r2
8006eca: d009 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006ecc: 687b ldr r3, [r7, #4]
8006ece: 681b ldr r3, [r3, #0]
8006ed0: 4a47 ldr r2, [pc, #284] @ (8006ff0 <HAL_DMA_Abort_IT+0x1d8>)
8006ed2: 4293 cmp r3, r2
8006ed4: d004 beq.n 8006ee0 <HAL_DMA_Abort_IT+0xc8>
8006ed6: 687b ldr r3, [r7, #4]
8006ed8: 681b ldr r3, [r3, #0]
8006eda: 4a46 ldr r2, [pc, #280] @ (8006ff4 <HAL_DMA_Abort_IT+0x1dc>)
8006edc: 4293 cmp r3, r2
8006ede: d101 bne.n 8006ee4 <HAL_DMA_Abort_IT+0xcc>
8006ee0: 2301 movs r3, #1
8006ee2: e000 b.n 8006ee6 <HAL_DMA_Abort_IT+0xce>
8006ee4: 2300 movs r3, #0
8006ee6: 2b00 cmp r3, #0
8006ee8: f000 8086 beq.w 8006ff8 <HAL_DMA_Abort_IT+0x1e0>
{
/* Set Abort State */
hdma->State = HAL_DMA_STATE_ABORT;
8006eec: 687b ldr r3, [r7, #4]
8006eee: 2204 movs r2, #4
8006ef0: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Disable the stream */
__HAL_DMA_DISABLE(hdma);
8006ef4: 687b ldr r3, [r7, #4]
8006ef6: 681b ldr r3, [r3, #0]
8006ef8: 4a2f ldr r2, [pc, #188] @ (8006fb8 <HAL_DMA_Abort_IT+0x1a0>)
8006efa: 4293 cmp r3, r2
8006efc: d04a beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006efe: 687b ldr r3, [r7, #4]
8006f00: 681b ldr r3, [r3, #0]
8006f02: 4a2e ldr r2, [pc, #184] @ (8006fbc <HAL_DMA_Abort_IT+0x1a4>)
8006f04: 4293 cmp r3, r2
8006f06: d045 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f08: 687b ldr r3, [r7, #4]
8006f0a: 681b ldr r3, [r3, #0]
8006f0c: 4a2c ldr r2, [pc, #176] @ (8006fc0 <HAL_DMA_Abort_IT+0x1a8>)
8006f0e: 4293 cmp r3, r2
8006f10: d040 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f12: 687b ldr r3, [r7, #4]
8006f14: 681b ldr r3, [r3, #0]
8006f16: 4a2b ldr r2, [pc, #172] @ (8006fc4 <HAL_DMA_Abort_IT+0x1ac>)
8006f18: 4293 cmp r3, r2
8006f1a: d03b beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f1c: 687b ldr r3, [r7, #4]
8006f1e: 681b ldr r3, [r3, #0]
8006f20: 4a29 ldr r2, [pc, #164] @ (8006fc8 <HAL_DMA_Abort_IT+0x1b0>)
8006f22: 4293 cmp r3, r2
8006f24: d036 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f26: 687b ldr r3, [r7, #4]
8006f28: 681b ldr r3, [r3, #0]
8006f2a: 4a28 ldr r2, [pc, #160] @ (8006fcc <HAL_DMA_Abort_IT+0x1b4>)
8006f2c: 4293 cmp r3, r2
8006f2e: d031 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f30: 687b ldr r3, [r7, #4]
8006f32: 681b ldr r3, [r3, #0]
8006f34: 4a26 ldr r2, [pc, #152] @ (8006fd0 <HAL_DMA_Abort_IT+0x1b8>)
8006f36: 4293 cmp r3, r2
8006f38: d02c beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f3a: 687b ldr r3, [r7, #4]
8006f3c: 681b ldr r3, [r3, #0]
8006f3e: 4a25 ldr r2, [pc, #148] @ (8006fd4 <HAL_DMA_Abort_IT+0x1bc>)
8006f40: 4293 cmp r3, r2
8006f42: d027 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f44: 687b ldr r3, [r7, #4]
8006f46: 681b ldr r3, [r3, #0]
8006f48: 4a23 ldr r2, [pc, #140] @ (8006fd8 <HAL_DMA_Abort_IT+0x1c0>)
8006f4a: 4293 cmp r3, r2
8006f4c: d022 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f4e: 687b ldr r3, [r7, #4]
8006f50: 681b ldr r3, [r3, #0]
8006f52: 4a22 ldr r2, [pc, #136] @ (8006fdc <HAL_DMA_Abort_IT+0x1c4>)
8006f54: 4293 cmp r3, r2
8006f56: d01d beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f58: 687b ldr r3, [r7, #4]
8006f5a: 681b ldr r3, [r3, #0]
8006f5c: 4a20 ldr r2, [pc, #128] @ (8006fe0 <HAL_DMA_Abort_IT+0x1c8>)
8006f5e: 4293 cmp r3, r2
8006f60: d018 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f62: 687b ldr r3, [r7, #4]
8006f64: 681b ldr r3, [r3, #0]
8006f66: 4a1f ldr r2, [pc, #124] @ (8006fe4 <HAL_DMA_Abort_IT+0x1cc>)
8006f68: 4293 cmp r3, r2
8006f6a: d013 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f6c: 687b ldr r3, [r7, #4]
8006f6e: 681b ldr r3, [r3, #0]
8006f70: 4a1d ldr r2, [pc, #116] @ (8006fe8 <HAL_DMA_Abort_IT+0x1d0>)
8006f72: 4293 cmp r3, r2
8006f74: d00e beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f76: 687b ldr r3, [r7, #4]
8006f78: 681b ldr r3, [r3, #0]
8006f7a: 4a1c ldr r2, [pc, #112] @ (8006fec <HAL_DMA_Abort_IT+0x1d4>)
8006f7c: 4293 cmp r3, r2
8006f7e: d009 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f80: 687b ldr r3, [r7, #4]
8006f82: 681b ldr r3, [r3, #0]
8006f84: 4a1a ldr r2, [pc, #104] @ (8006ff0 <HAL_DMA_Abort_IT+0x1d8>)
8006f86: 4293 cmp r3, r2
8006f88: d004 beq.n 8006f94 <HAL_DMA_Abort_IT+0x17c>
8006f8a: 687b ldr r3, [r7, #4]
8006f8c: 681b ldr r3, [r3, #0]
8006f8e: 4a19 ldr r2, [pc, #100] @ (8006ff4 <HAL_DMA_Abort_IT+0x1dc>)
8006f90: 4293 cmp r3, r2
8006f92: d108 bne.n 8006fa6 <HAL_DMA_Abort_IT+0x18e>
8006f94: 687b ldr r3, [r7, #4]
8006f96: 681b ldr r3, [r3, #0]
8006f98: 681a ldr r2, [r3, #0]
8006f9a: 687b ldr r3, [r7, #4]
8006f9c: 681b ldr r3, [r3, #0]
8006f9e: f022 0201 bic.w r2, r2, #1
8006fa2: 601a str r2, [r3, #0]
8006fa4: e178 b.n 8007298 <HAL_DMA_Abort_IT+0x480>
8006fa6: 687b ldr r3, [r7, #4]
8006fa8: 681b ldr r3, [r3, #0]
8006faa: 681a ldr r2, [r3, #0]
8006fac: 687b ldr r3, [r7, #4]
8006fae: 681b ldr r3, [r3, #0]
8006fb0: f022 0201 bic.w r2, r2, #1
8006fb4: 601a str r2, [r3, #0]
8006fb6: e16f b.n 8007298 <HAL_DMA_Abort_IT+0x480>
8006fb8: 40020010 .word 0x40020010
8006fbc: 40020028 .word 0x40020028
8006fc0: 40020040 .word 0x40020040
8006fc4: 40020058 .word 0x40020058
8006fc8: 40020070 .word 0x40020070
8006fcc: 40020088 .word 0x40020088
8006fd0: 400200a0 .word 0x400200a0
8006fd4: 400200b8 .word 0x400200b8
8006fd8: 40020410 .word 0x40020410
8006fdc: 40020428 .word 0x40020428
8006fe0: 40020440 .word 0x40020440
8006fe4: 40020458 .word 0x40020458
8006fe8: 40020470 .word 0x40020470
8006fec: 40020488 .word 0x40020488
8006ff0: 400204a0 .word 0x400204a0
8006ff4: 400204b8 .word 0x400204b8
}
else /* BDMA channel */
{
/* Disable DMA All Interrupts */
((BDMA_Channel_TypeDef *)hdma->Instance)->CCR &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
8006ff8: 687b ldr r3, [r7, #4]
8006ffa: 681b ldr r3, [r3, #0]
8006ffc: 681a ldr r2, [r3, #0]
8006ffe: 687b ldr r3, [r7, #4]
8007000: 681b ldr r3, [r3, #0]
8007002: f022 020e bic.w r2, r2, #14
8007006: 601a str r2, [r3, #0]
/* Disable the channel */
__HAL_DMA_DISABLE(hdma);
8007008: 687b ldr r3, [r7, #4]
800700a: 681b ldr r3, [r3, #0]
800700c: 4a6c ldr r2, [pc, #432] @ (80071c0 <HAL_DMA_Abort_IT+0x3a8>)
800700e: 4293 cmp r3, r2
8007010: d04a beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
8007012: 687b ldr r3, [r7, #4]
8007014: 681b ldr r3, [r3, #0]
8007016: 4a6b ldr r2, [pc, #428] @ (80071c4 <HAL_DMA_Abort_IT+0x3ac>)
8007018: 4293 cmp r3, r2
800701a: d045 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
800701c: 687b ldr r3, [r7, #4]
800701e: 681b ldr r3, [r3, #0]
8007020: 4a69 ldr r2, [pc, #420] @ (80071c8 <HAL_DMA_Abort_IT+0x3b0>)
8007022: 4293 cmp r3, r2
8007024: d040 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
8007026: 687b ldr r3, [r7, #4]
8007028: 681b ldr r3, [r3, #0]
800702a: 4a68 ldr r2, [pc, #416] @ (80071cc <HAL_DMA_Abort_IT+0x3b4>)
800702c: 4293 cmp r3, r2
800702e: d03b beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
8007030: 687b ldr r3, [r7, #4]
8007032: 681b ldr r3, [r3, #0]
8007034: 4a66 ldr r2, [pc, #408] @ (80071d0 <HAL_DMA_Abort_IT+0x3b8>)
8007036: 4293 cmp r3, r2
8007038: d036 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
800703a: 687b ldr r3, [r7, #4]
800703c: 681b ldr r3, [r3, #0]
800703e: 4a65 ldr r2, [pc, #404] @ (80071d4 <HAL_DMA_Abort_IT+0x3bc>)
8007040: 4293 cmp r3, r2
8007042: d031 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
8007044: 687b ldr r3, [r7, #4]
8007046: 681b ldr r3, [r3, #0]
8007048: 4a63 ldr r2, [pc, #396] @ (80071d8 <HAL_DMA_Abort_IT+0x3c0>)
800704a: 4293 cmp r3, r2
800704c: d02c beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
800704e: 687b ldr r3, [r7, #4]
8007050: 681b ldr r3, [r3, #0]
8007052: 4a62 ldr r2, [pc, #392] @ (80071dc <HAL_DMA_Abort_IT+0x3c4>)
8007054: 4293 cmp r3, r2
8007056: d027 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
8007058: 687b ldr r3, [r7, #4]
800705a: 681b ldr r3, [r3, #0]
800705c: 4a60 ldr r2, [pc, #384] @ (80071e0 <HAL_DMA_Abort_IT+0x3c8>)
800705e: 4293 cmp r3, r2
8007060: d022 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
8007062: 687b ldr r3, [r7, #4]
8007064: 681b ldr r3, [r3, #0]
8007066: 4a5f ldr r2, [pc, #380] @ (80071e4 <HAL_DMA_Abort_IT+0x3cc>)
8007068: 4293 cmp r3, r2
800706a: d01d beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
800706c: 687b ldr r3, [r7, #4]
800706e: 681b ldr r3, [r3, #0]
8007070: 4a5d ldr r2, [pc, #372] @ (80071e8 <HAL_DMA_Abort_IT+0x3d0>)
8007072: 4293 cmp r3, r2
8007074: d018 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
8007076: 687b ldr r3, [r7, #4]
8007078: 681b ldr r3, [r3, #0]
800707a: 4a5c ldr r2, [pc, #368] @ (80071ec <HAL_DMA_Abort_IT+0x3d4>)
800707c: 4293 cmp r3, r2
800707e: d013 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
8007080: 687b ldr r3, [r7, #4]
8007082: 681b ldr r3, [r3, #0]
8007084: 4a5a ldr r2, [pc, #360] @ (80071f0 <HAL_DMA_Abort_IT+0x3d8>)
8007086: 4293 cmp r3, r2
8007088: d00e beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
800708a: 687b ldr r3, [r7, #4]
800708c: 681b ldr r3, [r3, #0]
800708e: 4a59 ldr r2, [pc, #356] @ (80071f4 <HAL_DMA_Abort_IT+0x3dc>)
8007090: 4293 cmp r3, r2
8007092: d009 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
8007094: 687b ldr r3, [r7, #4]
8007096: 681b ldr r3, [r3, #0]
8007098: 4a57 ldr r2, [pc, #348] @ (80071f8 <HAL_DMA_Abort_IT+0x3e0>)
800709a: 4293 cmp r3, r2
800709c: d004 beq.n 80070a8 <HAL_DMA_Abort_IT+0x290>
800709e: 687b ldr r3, [r7, #4]
80070a0: 681b ldr r3, [r3, #0]
80070a2: 4a56 ldr r2, [pc, #344] @ (80071fc <HAL_DMA_Abort_IT+0x3e4>)
80070a4: 4293 cmp r3, r2
80070a6: d108 bne.n 80070ba <HAL_DMA_Abort_IT+0x2a2>
80070a8: 687b ldr r3, [r7, #4]
80070aa: 681b ldr r3, [r3, #0]
80070ac: 681a ldr r2, [r3, #0]
80070ae: 687b ldr r3, [r7, #4]
80070b0: 681b ldr r3, [r3, #0]
80070b2: f022 0201 bic.w r2, r2, #1
80070b6: 601a str r2, [r3, #0]
80070b8: e007 b.n 80070ca <HAL_DMA_Abort_IT+0x2b2>
80070ba: 687b ldr r3, [r7, #4]
80070bc: 681b ldr r3, [r3, #0]
80070be: 681a ldr r2, [r3, #0]
80070c0: 687b ldr r3, [r7, #4]
80070c2: 681b ldr r3, [r3, #0]
80070c4: f022 0201 bic.w r2, r2, #1
80070c8: 601a str r2, [r3, #0]
if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
80070ca: 687b ldr r3, [r7, #4]
80070cc: 681b ldr r3, [r3, #0]
80070ce: 4a3c ldr r2, [pc, #240] @ (80071c0 <HAL_DMA_Abort_IT+0x3a8>)
80070d0: 4293 cmp r3, r2
80070d2: d072 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
80070d4: 687b ldr r3, [r7, #4]
80070d6: 681b ldr r3, [r3, #0]
80070d8: 4a3a ldr r2, [pc, #232] @ (80071c4 <HAL_DMA_Abort_IT+0x3ac>)
80070da: 4293 cmp r3, r2
80070dc: d06d beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
80070de: 687b ldr r3, [r7, #4]
80070e0: 681b ldr r3, [r3, #0]
80070e2: 4a39 ldr r2, [pc, #228] @ (80071c8 <HAL_DMA_Abort_IT+0x3b0>)
80070e4: 4293 cmp r3, r2
80070e6: d068 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
80070e8: 687b ldr r3, [r7, #4]
80070ea: 681b ldr r3, [r3, #0]
80070ec: 4a37 ldr r2, [pc, #220] @ (80071cc <HAL_DMA_Abort_IT+0x3b4>)
80070ee: 4293 cmp r3, r2
80070f0: d063 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
80070f2: 687b ldr r3, [r7, #4]
80070f4: 681b ldr r3, [r3, #0]
80070f6: 4a36 ldr r2, [pc, #216] @ (80071d0 <HAL_DMA_Abort_IT+0x3b8>)
80070f8: 4293 cmp r3, r2
80070fa: d05e beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
80070fc: 687b ldr r3, [r7, #4]
80070fe: 681b ldr r3, [r3, #0]
8007100: 4a34 ldr r2, [pc, #208] @ (80071d4 <HAL_DMA_Abort_IT+0x3bc>)
8007102: 4293 cmp r3, r2
8007104: d059 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007106: 687b ldr r3, [r7, #4]
8007108: 681b ldr r3, [r3, #0]
800710a: 4a33 ldr r2, [pc, #204] @ (80071d8 <HAL_DMA_Abort_IT+0x3c0>)
800710c: 4293 cmp r3, r2
800710e: d054 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007110: 687b ldr r3, [r7, #4]
8007112: 681b ldr r3, [r3, #0]
8007114: 4a31 ldr r2, [pc, #196] @ (80071dc <HAL_DMA_Abort_IT+0x3c4>)
8007116: 4293 cmp r3, r2
8007118: d04f beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
800711a: 687b ldr r3, [r7, #4]
800711c: 681b ldr r3, [r3, #0]
800711e: 4a30 ldr r2, [pc, #192] @ (80071e0 <HAL_DMA_Abort_IT+0x3c8>)
8007120: 4293 cmp r3, r2
8007122: d04a beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007124: 687b ldr r3, [r7, #4]
8007126: 681b ldr r3, [r3, #0]
8007128: 4a2e ldr r2, [pc, #184] @ (80071e4 <HAL_DMA_Abort_IT+0x3cc>)
800712a: 4293 cmp r3, r2
800712c: d045 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
800712e: 687b ldr r3, [r7, #4]
8007130: 681b ldr r3, [r3, #0]
8007132: 4a2d ldr r2, [pc, #180] @ (80071e8 <HAL_DMA_Abort_IT+0x3d0>)
8007134: 4293 cmp r3, r2
8007136: d040 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007138: 687b ldr r3, [r7, #4]
800713a: 681b ldr r3, [r3, #0]
800713c: 4a2b ldr r2, [pc, #172] @ (80071ec <HAL_DMA_Abort_IT+0x3d4>)
800713e: 4293 cmp r3, r2
8007140: d03b beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007142: 687b ldr r3, [r7, #4]
8007144: 681b ldr r3, [r3, #0]
8007146: 4a2a ldr r2, [pc, #168] @ (80071f0 <HAL_DMA_Abort_IT+0x3d8>)
8007148: 4293 cmp r3, r2
800714a: d036 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
800714c: 687b ldr r3, [r7, #4]
800714e: 681b ldr r3, [r3, #0]
8007150: 4a28 ldr r2, [pc, #160] @ (80071f4 <HAL_DMA_Abort_IT+0x3dc>)
8007152: 4293 cmp r3, r2
8007154: d031 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007156: 687b ldr r3, [r7, #4]
8007158: 681b ldr r3, [r3, #0]
800715a: 4a27 ldr r2, [pc, #156] @ (80071f8 <HAL_DMA_Abort_IT+0x3e0>)
800715c: 4293 cmp r3, r2
800715e: d02c beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007160: 687b ldr r3, [r7, #4]
8007162: 681b ldr r3, [r3, #0]
8007164: 4a25 ldr r2, [pc, #148] @ (80071fc <HAL_DMA_Abort_IT+0x3e4>)
8007166: 4293 cmp r3, r2
8007168: d027 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
800716a: 687b ldr r3, [r7, #4]
800716c: 681b ldr r3, [r3, #0]
800716e: 4a24 ldr r2, [pc, #144] @ (8007200 <HAL_DMA_Abort_IT+0x3e8>)
8007170: 4293 cmp r3, r2
8007172: d022 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007174: 687b ldr r3, [r7, #4]
8007176: 681b ldr r3, [r3, #0]
8007178: 4a22 ldr r2, [pc, #136] @ (8007204 <HAL_DMA_Abort_IT+0x3ec>)
800717a: 4293 cmp r3, r2
800717c: d01d beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
800717e: 687b ldr r3, [r7, #4]
8007180: 681b ldr r3, [r3, #0]
8007182: 4a21 ldr r2, [pc, #132] @ (8007208 <HAL_DMA_Abort_IT+0x3f0>)
8007184: 4293 cmp r3, r2
8007186: d018 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007188: 687b ldr r3, [r7, #4]
800718a: 681b ldr r3, [r3, #0]
800718c: 4a1f ldr r2, [pc, #124] @ (800720c <HAL_DMA_Abort_IT+0x3f4>)
800718e: 4293 cmp r3, r2
8007190: d013 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
8007192: 687b ldr r3, [r7, #4]
8007194: 681b ldr r3, [r3, #0]
8007196: 4a1e ldr r2, [pc, #120] @ (8007210 <HAL_DMA_Abort_IT+0x3f8>)
8007198: 4293 cmp r3, r2
800719a: d00e beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
800719c: 687b ldr r3, [r7, #4]
800719e: 681b ldr r3, [r3, #0]
80071a0: 4a1c ldr r2, [pc, #112] @ (8007214 <HAL_DMA_Abort_IT+0x3fc>)
80071a2: 4293 cmp r3, r2
80071a4: d009 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
80071a6: 687b ldr r3, [r7, #4]
80071a8: 681b ldr r3, [r3, #0]
80071aa: 4a1b ldr r2, [pc, #108] @ (8007218 <HAL_DMA_Abort_IT+0x400>)
80071ac: 4293 cmp r3, r2
80071ae: d004 beq.n 80071ba <HAL_DMA_Abort_IT+0x3a2>
80071b0: 687b ldr r3, [r7, #4]
80071b2: 681b ldr r3, [r3, #0]
80071b4: 4a19 ldr r2, [pc, #100] @ (800721c <HAL_DMA_Abort_IT+0x404>)
80071b6: 4293 cmp r3, r2
80071b8: d132 bne.n 8007220 <HAL_DMA_Abort_IT+0x408>
80071ba: 2301 movs r3, #1
80071bc: e031 b.n 8007222 <HAL_DMA_Abort_IT+0x40a>
80071be: bf00 nop
80071c0: 40020010 .word 0x40020010
80071c4: 40020028 .word 0x40020028
80071c8: 40020040 .word 0x40020040
80071cc: 40020058 .word 0x40020058
80071d0: 40020070 .word 0x40020070
80071d4: 40020088 .word 0x40020088
80071d8: 400200a0 .word 0x400200a0
80071dc: 400200b8 .word 0x400200b8
80071e0: 40020410 .word 0x40020410
80071e4: 40020428 .word 0x40020428
80071e8: 40020440 .word 0x40020440
80071ec: 40020458 .word 0x40020458
80071f0: 40020470 .word 0x40020470
80071f4: 40020488 .word 0x40020488
80071f8: 400204a0 .word 0x400204a0
80071fc: 400204b8 .word 0x400204b8
8007200: 58025408 .word 0x58025408
8007204: 5802541c .word 0x5802541c
8007208: 58025430 .word 0x58025430
800720c: 58025444 .word 0x58025444
8007210: 58025458 .word 0x58025458
8007214: 5802546c .word 0x5802546c
8007218: 58025480 .word 0x58025480
800721c: 58025494 .word 0x58025494
8007220: 2300 movs r3, #0
8007222: 2b00 cmp r3, #0
8007224: d028 beq.n 8007278 <HAL_DMA_Abort_IT+0x460>
{
/* disable the DMAMUX sync overrun IT */
hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
8007226: 687b ldr r3, [r7, #4]
8007228: 6e1b ldr r3, [r3, #96] @ 0x60
800722a: 681a ldr r2, [r3, #0]
800722c: 687b ldr r3, [r7, #4]
800722e: 6e1b ldr r3, [r3, #96] @ 0x60
8007230: f422 7280 bic.w r2, r2, #256 @ 0x100
8007234: 601a str r2, [r3, #0]
/* Clear all flags */
regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
8007236: 687b ldr r3, [r7, #4]
8007238: 6d9b ldr r3, [r3, #88] @ 0x58
800723a: 60fb str r3, [r7, #12]
regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
800723c: 687b ldr r3, [r7, #4]
800723e: 6ddb ldr r3, [r3, #92] @ 0x5c
8007240: f003 031f and.w r3, r3, #31
8007244: 2201 movs r2, #1
8007246: 409a lsls r2, r3
8007248: 68fb ldr r3, [r7, #12]
800724a: 605a str r2, [r3, #4]
/* Clear the DMAMUX synchro overrun flag */
hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
800724c: 687b ldr r3, [r7, #4]
800724e: 6e5b ldr r3, [r3, #100] @ 0x64
8007250: 687a ldr r2, [r7, #4]
8007252: 6e92 ldr r2, [r2, #104] @ 0x68
8007254: 605a str r2, [r3, #4]
if(hdma->DMAmuxRequestGen != 0U)
8007256: 687b ldr r3, [r7, #4]
8007258: 6edb ldr r3, [r3, #108] @ 0x6c
800725a: 2b00 cmp r3, #0
800725c: d00c beq.n 8007278 <HAL_DMA_Abort_IT+0x460>
{
/* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
/* disable the request gen overrun IT */
hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
800725e: 687b ldr r3, [r7, #4]
8007260: 6edb ldr r3, [r3, #108] @ 0x6c
8007262: 681a ldr r2, [r3, #0]
8007264: 687b ldr r3, [r7, #4]
8007266: 6edb ldr r3, [r3, #108] @ 0x6c
8007268: f422 7280 bic.w r2, r2, #256 @ 0x100
800726c: 601a str r2, [r3, #0]
/* Clear the DMAMUX request generator overrun flag */
hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
800726e: 687b ldr r3, [r7, #4]
8007270: 6f1b ldr r3, [r3, #112] @ 0x70
8007272: 687a ldr r2, [r7, #4]
8007274: 6f52 ldr r2, [r2, #116] @ 0x74
8007276: 605a str r2, [r3, #4]
}
}
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8007278: 687b ldr r3, [r7, #4]
800727a: 2201 movs r2, #1
800727c: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8007280: 687b ldr r3, [r7, #4]
8007282: 2200 movs r2, #0
8007284: f883 2034 strb.w r2, [r3, #52] @ 0x34
/* Call User Abort callback */
if(hdma->XferAbortCallback != NULL)
8007288: 687b ldr r3, [r7, #4]
800728a: 6d1b ldr r3, [r3, #80] @ 0x50
800728c: 2b00 cmp r3, #0
800728e: d003 beq.n 8007298 <HAL_DMA_Abort_IT+0x480>
{
hdma->XferAbortCallback(hdma);
8007290: 687b ldr r3, [r7, #4]
8007292: 6d1b ldr r3, [r3, #80] @ 0x50
8007294: 6878 ldr r0, [r7, #4]
8007296: 4798 blx r3
}
}
}
return HAL_OK;
8007298: 2300 movs r3, #0
}
800729a: 4618 mov r0, r3
800729c: 3710 adds r7, #16
800729e: 46bd mov sp, r7
80072a0: bd80 pop {r7, pc}
80072a2: bf00 nop
080072a4 <HAL_DMA_IRQHandler>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
80072a4: b580 push {r7, lr}
80072a6: b08a sub sp, #40 @ 0x28
80072a8: af00 add r7, sp, #0
80072aa: 6078 str r0, [r7, #4]
uint32_t tmpisr_dma, tmpisr_bdma;
uint32_t ccr_reg;
__IO uint32_t count = 0U;
80072ac: 2300 movs r3, #0
80072ae: 60fb str r3, [r7, #12]
uint32_t timeout = SystemCoreClock / 9600U;
80072b0: 4b67 ldr r3, [pc, #412] @ (8007450 <HAL_DMA_IRQHandler+0x1ac>)
80072b2: 681b ldr r3, [r3, #0]
80072b4: 4a67 ldr r2, [pc, #412] @ (8007454 <HAL_DMA_IRQHandler+0x1b0>)
80072b6: fba2 2303 umull r2, r3, r2, r3
80072ba: 0a9b lsrs r3, r3, #10
80072bc: 627b str r3, [r7, #36] @ 0x24
/* calculate DMA base and stream number */
DMA_Base_Registers *regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
80072be: 687b ldr r3, [r7, #4]
80072c0: 6d9b ldr r3, [r3, #88] @ 0x58
80072c2: 623b str r3, [r7, #32]
BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
80072c4: 687b ldr r3, [r7, #4]
80072c6: 6d9b ldr r3, [r3, #88] @ 0x58
80072c8: 61fb str r3, [r7, #28]
tmpisr_dma = regs_dma->ISR;
80072ca: 6a3b ldr r3, [r7, #32]
80072cc: 681b ldr r3, [r3, #0]
80072ce: 61bb str r3, [r7, #24]
tmpisr_bdma = regs_bdma->ISR;
80072d0: 69fb ldr r3, [r7, #28]
80072d2: 681b ldr r3, [r3, #0]
80072d4: 617b str r3, [r7, #20]
if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
80072d6: 687b ldr r3, [r7, #4]
80072d8: 681b ldr r3, [r3, #0]
80072da: 4a5f ldr r2, [pc, #380] @ (8007458 <HAL_DMA_IRQHandler+0x1b4>)
80072dc: 4293 cmp r3, r2
80072de: d04a beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
80072e0: 687b ldr r3, [r7, #4]
80072e2: 681b ldr r3, [r3, #0]
80072e4: 4a5d ldr r2, [pc, #372] @ (800745c <HAL_DMA_IRQHandler+0x1b8>)
80072e6: 4293 cmp r3, r2
80072e8: d045 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
80072ea: 687b ldr r3, [r7, #4]
80072ec: 681b ldr r3, [r3, #0]
80072ee: 4a5c ldr r2, [pc, #368] @ (8007460 <HAL_DMA_IRQHandler+0x1bc>)
80072f0: 4293 cmp r3, r2
80072f2: d040 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
80072f4: 687b ldr r3, [r7, #4]
80072f6: 681b ldr r3, [r3, #0]
80072f8: 4a5a ldr r2, [pc, #360] @ (8007464 <HAL_DMA_IRQHandler+0x1c0>)
80072fa: 4293 cmp r3, r2
80072fc: d03b beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
80072fe: 687b ldr r3, [r7, #4]
8007300: 681b ldr r3, [r3, #0]
8007302: 4a59 ldr r2, [pc, #356] @ (8007468 <HAL_DMA_IRQHandler+0x1c4>)
8007304: 4293 cmp r3, r2
8007306: d036 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
8007308: 687b ldr r3, [r7, #4]
800730a: 681b ldr r3, [r3, #0]
800730c: 4a57 ldr r2, [pc, #348] @ (800746c <HAL_DMA_IRQHandler+0x1c8>)
800730e: 4293 cmp r3, r2
8007310: d031 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
8007312: 687b ldr r3, [r7, #4]
8007314: 681b ldr r3, [r3, #0]
8007316: 4a56 ldr r2, [pc, #344] @ (8007470 <HAL_DMA_IRQHandler+0x1cc>)
8007318: 4293 cmp r3, r2
800731a: d02c beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
800731c: 687b ldr r3, [r7, #4]
800731e: 681b ldr r3, [r3, #0]
8007320: 4a54 ldr r2, [pc, #336] @ (8007474 <HAL_DMA_IRQHandler+0x1d0>)
8007322: 4293 cmp r3, r2
8007324: d027 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
8007326: 687b ldr r3, [r7, #4]
8007328: 681b ldr r3, [r3, #0]
800732a: 4a53 ldr r2, [pc, #332] @ (8007478 <HAL_DMA_IRQHandler+0x1d4>)
800732c: 4293 cmp r3, r2
800732e: d022 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
8007330: 687b ldr r3, [r7, #4]
8007332: 681b ldr r3, [r3, #0]
8007334: 4a51 ldr r2, [pc, #324] @ (800747c <HAL_DMA_IRQHandler+0x1d8>)
8007336: 4293 cmp r3, r2
8007338: d01d beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
800733a: 687b ldr r3, [r7, #4]
800733c: 681b ldr r3, [r3, #0]
800733e: 4a50 ldr r2, [pc, #320] @ (8007480 <HAL_DMA_IRQHandler+0x1dc>)
8007340: 4293 cmp r3, r2
8007342: d018 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
8007344: 687b ldr r3, [r7, #4]
8007346: 681b ldr r3, [r3, #0]
8007348: 4a4e ldr r2, [pc, #312] @ (8007484 <HAL_DMA_IRQHandler+0x1e0>)
800734a: 4293 cmp r3, r2
800734c: d013 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
800734e: 687b ldr r3, [r7, #4]
8007350: 681b ldr r3, [r3, #0]
8007352: 4a4d ldr r2, [pc, #308] @ (8007488 <HAL_DMA_IRQHandler+0x1e4>)
8007354: 4293 cmp r3, r2
8007356: d00e beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
8007358: 687b ldr r3, [r7, #4]
800735a: 681b ldr r3, [r3, #0]
800735c: 4a4b ldr r2, [pc, #300] @ (800748c <HAL_DMA_IRQHandler+0x1e8>)
800735e: 4293 cmp r3, r2
8007360: d009 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
8007362: 687b ldr r3, [r7, #4]
8007364: 681b ldr r3, [r3, #0]
8007366: 4a4a ldr r2, [pc, #296] @ (8007490 <HAL_DMA_IRQHandler+0x1ec>)
8007368: 4293 cmp r3, r2
800736a: d004 beq.n 8007376 <HAL_DMA_IRQHandler+0xd2>
800736c: 687b ldr r3, [r7, #4]
800736e: 681b ldr r3, [r3, #0]
8007370: 4a48 ldr r2, [pc, #288] @ (8007494 <HAL_DMA_IRQHandler+0x1f0>)
8007372: 4293 cmp r3, r2
8007374: d101 bne.n 800737a <HAL_DMA_IRQHandler+0xd6>
8007376: 2301 movs r3, #1
8007378: e000 b.n 800737c <HAL_DMA_IRQHandler+0xd8>
800737a: 2300 movs r3, #0
800737c: 2b00 cmp r3, #0
800737e: f000 842b beq.w 8007bd8 <HAL_DMA_IRQHandler+0x934>
{
/* Transfer Error Interrupt management ***************************************/
if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
8007382: 687b ldr r3, [r7, #4]
8007384: 6ddb ldr r3, [r3, #92] @ 0x5c
8007386: f003 031f and.w r3, r3, #31
800738a: 2208 movs r2, #8
800738c: 409a lsls r2, r3
800738e: 69bb ldr r3, [r7, #24]
8007390: 4013 ands r3, r2
8007392: 2b00 cmp r3, #0
8007394: f000 80a2 beq.w 80074dc <HAL_DMA_IRQHandler+0x238>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != 0U)
8007398: 687b ldr r3, [r7, #4]
800739a: 681b ldr r3, [r3, #0]
800739c: 4a2e ldr r2, [pc, #184] @ (8007458 <HAL_DMA_IRQHandler+0x1b4>)
800739e: 4293 cmp r3, r2
80073a0: d04a beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073a2: 687b ldr r3, [r7, #4]
80073a4: 681b ldr r3, [r3, #0]
80073a6: 4a2d ldr r2, [pc, #180] @ (800745c <HAL_DMA_IRQHandler+0x1b8>)
80073a8: 4293 cmp r3, r2
80073aa: d045 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073ac: 687b ldr r3, [r7, #4]
80073ae: 681b ldr r3, [r3, #0]
80073b0: 4a2b ldr r2, [pc, #172] @ (8007460 <HAL_DMA_IRQHandler+0x1bc>)
80073b2: 4293 cmp r3, r2
80073b4: d040 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073b6: 687b ldr r3, [r7, #4]
80073b8: 681b ldr r3, [r3, #0]
80073ba: 4a2a ldr r2, [pc, #168] @ (8007464 <HAL_DMA_IRQHandler+0x1c0>)
80073bc: 4293 cmp r3, r2
80073be: d03b beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073c0: 687b ldr r3, [r7, #4]
80073c2: 681b ldr r3, [r3, #0]
80073c4: 4a28 ldr r2, [pc, #160] @ (8007468 <HAL_DMA_IRQHandler+0x1c4>)
80073c6: 4293 cmp r3, r2
80073c8: d036 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073ca: 687b ldr r3, [r7, #4]
80073cc: 681b ldr r3, [r3, #0]
80073ce: 4a27 ldr r2, [pc, #156] @ (800746c <HAL_DMA_IRQHandler+0x1c8>)
80073d0: 4293 cmp r3, r2
80073d2: d031 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073d4: 687b ldr r3, [r7, #4]
80073d6: 681b ldr r3, [r3, #0]
80073d8: 4a25 ldr r2, [pc, #148] @ (8007470 <HAL_DMA_IRQHandler+0x1cc>)
80073da: 4293 cmp r3, r2
80073dc: d02c beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073de: 687b ldr r3, [r7, #4]
80073e0: 681b ldr r3, [r3, #0]
80073e2: 4a24 ldr r2, [pc, #144] @ (8007474 <HAL_DMA_IRQHandler+0x1d0>)
80073e4: 4293 cmp r3, r2
80073e6: d027 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073e8: 687b ldr r3, [r7, #4]
80073ea: 681b ldr r3, [r3, #0]
80073ec: 4a22 ldr r2, [pc, #136] @ (8007478 <HAL_DMA_IRQHandler+0x1d4>)
80073ee: 4293 cmp r3, r2
80073f0: d022 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073f2: 687b ldr r3, [r7, #4]
80073f4: 681b ldr r3, [r3, #0]
80073f6: 4a21 ldr r2, [pc, #132] @ (800747c <HAL_DMA_IRQHandler+0x1d8>)
80073f8: 4293 cmp r3, r2
80073fa: d01d beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
80073fc: 687b ldr r3, [r7, #4]
80073fe: 681b ldr r3, [r3, #0]
8007400: 4a1f ldr r2, [pc, #124] @ (8007480 <HAL_DMA_IRQHandler+0x1dc>)
8007402: 4293 cmp r3, r2
8007404: d018 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
8007406: 687b ldr r3, [r7, #4]
8007408: 681b ldr r3, [r3, #0]
800740a: 4a1e ldr r2, [pc, #120] @ (8007484 <HAL_DMA_IRQHandler+0x1e0>)
800740c: 4293 cmp r3, r2
800740e: d013 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
8007410: 687b ldr r3, [r7, #4]
8007412: 681b ldr r3, [r3, #0]
8007414: 4a1c ldr r2, [pc, #112] @ (8007488 <HAL_DMA_IRQHandler+0x1e4>)
8007416: 4293 cmp r3, r2
8007418: d00e beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
800741a: 687b ldr r3, [r7, #4]
800741c: 681b ldr r3, [r3, #0]
800741e: 4a1b ldr r2, [pc, #108] @ (800748c <HAL_DMA_IRQHandler+0x1e8>)
8007420: 4293 cmp r3, r2
8007422: d009 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
8007424: 687b ldr r3, [r7, #4]
8007426: 681b ldr r3, [r3, #0]
8007428: 4a19 ldr r2, [pc, #100] @ (8007490 <HAL_DMA_IRQHandler+0x1ec>)
800742a: 4293 cmp r3, r2
800742c: d004 beq.n 8007438 <HAL_DMA_IRQHandler+0x194>
800742e: 687b ldr r3, [r7, #4]
8007430: 681b ldr r3, [r3, #0]
8007432: 4a18 ldr r2, [pc, #96] @ (8007494 <HAL_DMA_IRQHandler+0x1f0>)
8007434: 4293 cmp r3, r2
8007436: d12f bne.n 8007498 <HAL_DMA_IRQHandler+0x1f4>
8007438: 687b ldr r3, [r7, #4]
800743a: 681b ldr r3, [r3, #0]
800743c: 681b ldr r3, [r3, #0]
800743e: f003 0304 and.w r3, r3, #4
8007442: 2b00 cmp r3, #0
8007444: bf14 ite ne
8007446: 2301 movne r3, #1
8007448: 2300 moveq r3, #0
800744a: b2db uxtb r3, r3
800744c: e02e b.n 80074ac <HAL_DMA_IRQHandler+0x208>
800744e: bf00 nop
8007450: 2400000c .word 0x2400000c
8007454: 1b4e81b5 .word 0x1b4e81b5
8007458: 40020010 .word 0x40020010
800745c: 40020028 .word 0x40020028
8007460: 40020040 .word 0x40020040
8007464: 40020058 .word 0x40020058
8007468: 40020070 .word 0x40020070
800746c: 40020088 .word 0x40020088
8007470: 400200a0 .word 0x400200a0
8007474: 400200b8 .word 0x400200b8
8007478: 40020410 .word 0x40020410
800747c: 40020428 .word 0x40020428
8007480: 40020440 .word 0x40020440
8007484: 40020458 .word 0x40020458
8007488: 40020470 .word 0x40020470
800748c: 40020488 .word 0x40020488
8007490: 400204a0 .word 0x400204a0
8007494: 400204b8 .word 0x400204b8
8007498: 687b ldr r3, [r7, #4]
800749a: 681b ldr r3, [r3, #0]
800749c: 681b ldr r3, [r3, #0]
800749e: f003 0308 and.w r3, r3, #8
80074a2: 2b00 cmp r3, #0
80074a4: bf14 ite ne
80074a6: 2301 movne r3, #1
80074a8: 2300 moveq r3, #0
80074aa: b2db uxtb r3, r3
80074ac: 2b00 cmp r3, #0
80074ae: d015 beq.n 80074dc <HAL_DMA_IRQHandler+0x238>
{
/* Disable the transfer error interrupt */
((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TE);
80074b0: 687b ldr r3, [r7, #4]
80074b2: 681b ldr r3, [r3, #0]
80074b4: 681a ldr r2, [r3, #0]
80074b6: 687b ldr r3, [r7, #4]
80074b8: 681b ldr r3, [r3, #0]
80074ba: f022 0204 bic.w r2, r2, #4
80074be: 601a str r2, [r3, #0]
/* Clear the transfer error flag */
regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU);
80074c0: 687b ldr r3, [r7, #4]
80074c2: 6ddb ldr r3, [r3, #92] @ 0x5c
80074c4: f003 031f and.w r3, r3, #31
80074c8: 2208 movs r2, #8
80074ca: 409a lsls r2, r3
80074cc: 6a3b ldr r3, [r7, #32]
80074ce: 609a str r2, [r3, #8]
/* Update error code */
hdma->ErrorCode |= HAL_DMA_ERROR_TE;
80074d0: 687b ldr r3, [r7, #4]
80074d2: 6d5b ldr r3, [r3, #84] @ 0x54
80074d4: f043 0201 orr.w r2, r3, #1
80074d8: 687b ldr r3, [r7, #4]
80074da: 655a str r2, [r3, #84] @ 0x54
}
}
/* FIFO Error Interrupt management ******************************************/
if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
80074dc: 687b ldr r3, [r7, #4]
80074de: 6ddb ldr r3, [r3, #92] @ 0x5c
80074e0: f003 031f and.w r3, r3, #31
80074e4: 69ba ldr r2, [r7, #24]
80074e6: fa22 f303 lsr.w r3, r2, r3
80074ea: f003 0301 and.w r3, r3, #1
80074ee: 2b00 cmp r3, #0
80074f0: d06e beq.n 80075d0 <HAL_DMA_IRQHandler+0x32c>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != 0U)
80074f2: 687b ldr r3, [r7, #4]
80074f4: 681b ldr r3, [r3, #0]
80074f6: 4a69 ldr r2, [pc, #420] @ (800769c <HAL_DMA_IRQHandler+0x3f8>)
80074f8: 4293 cmp r3, r2
80074fa: d04a beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
80074fc: 687b ldr r3, [r7, #4]
80074fe: 681b ldr r3, [r3, #0]
8007500: 4a67 ldr r2, [pc, #412] @ (80076a0 <HAL_DMA_IRQHandler+0x3fc>)
8007502: 4293 cmp r3, r2
8007504: d045 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
8007506: 687b ldr r3, [r7, #4]
8007508: 681b ldr r3, [r3, #0]
800750a: 4a66 ldr r2, [pc, #408] @ (80076a4 <HAL_DMA_IRQHandler+0x400>)
800750c: 4293 cmp r3, r2
800750e: d040 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
8007510: 687b ldr r3, [r7, #4]
8007512: 681b ldr r3, [r3, #0]
8007514: 4a64 ldr r2, [pc, #400] @ (80076a8 <HAL_DMA_IRQHandler+0x404>)
8007516: 4293 cmp r3, r2
8007518: d03b beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
800751a: 687b ldr r3, [r7, #4]
800751c: 681b ldr r3, [r3, #0]
800751e: 4a63 ldr r2, [pc, #396] @ (80076ac <HAL_DMA_IRQHandler+0x408>)
8007520: 4293 cmp r3, r2
8007522: d036 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
8007524: 687b ldr r3, [r7, #4]
8007526: 681b ldr r3, [r3, #0]
8007528: 4a61 ldr r2, [pc, #388] @ (80076b0 <HAL_DMA_IRQHandler+0x40c>)
800752a: 4293 cmp r3, r2
800752c: d031 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
800752e: 687b ldr r3, [r7, #4]
8007530: 681b ldr r3, [r3, #0]
8007532: 4a60 ldr r2, [pc, #384] @ (80076b4 <HAL_DMA_IRQHandler+0x410>)
8007534: 4293 cmp r3, r2
8007536: d02c beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
8007538: 687b ldr r3, [r7, #4]
800753a: 681b ldr r3, [r3, #0]
800753c: 4a5e ldr r2, [pc, #376] @ (80076b8 <HAL_DMA_IRQHandler+0x414>)
800753e: 4293 cmp r3, r2
8007540: d027 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
8007542: 687b ldr r3, [r7, #4]
8007544: 681b ldr r3, [r3, #0]
8007546: 4a5d ldr r2, [pc, #372] @ (80076bc <HAL_DMA_IRQHandler+0x418>)
8007548: 4293 cmp r3, r2
800754a: d022 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
800754c: 687b ldr r3, [r7, #4]
800754e: 681b ldr r3, [r3, #0]
8007550: 4a5b ldr r2, [pc, #364] @ (80076c0 <HAL_DMA_IRQHandler+0x41c>)
8007552: 4293 cmp r3, r2
8007554: d01d beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
8007556: 687b ldr r3, [r7, #4]
8007558: 681b ldr r3, [r3, #0]
800755a: 4a5a ldr r2, [pc, #360] @ (80076c4 <HAL_DMA_IRQHandler+0x420>)
800755c: 4293 cmp r3, r2
800755e: d018 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
8007560: 687b ldr r3, [r7, #4]
8007562: 681b ldr r3, [r3, #0]
8007564: 4a58 ldr r2, [pc, #352] @ (80076c8 <HAL_DMA_IRQHandler+0x424>)
8007566: 4293 cmp r3, r2
8007568: d013 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
800756a: 687b ldr r3, [r7, #4]
800756c: 681b ldr r3, [r3, #0]
800756e: 4a57 ldr r2, [pc, #348] @ (80076cc <HAL_DMA_IRQHandler+0x428>)
8007570: 4293 cmp r3, r2
8007572: d00e beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
8007574: 687b ldr r3, [r7, #4]
8007576: 681b ldr r3, [r3, #0]
8007578: 4a55 ldr r2, [pc, #340] @ (80076d0 <HAL_DMA_IRQHandler+0x42c>)
800757a: 4293 cmp r3, r2
800757c: d009 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
800757e: 687b ldr r3, [r7, #4]
8007580: 681b ldr r3, [r3, #0]
8007582: 4a54 ldr r2, [pc, #336] @ (80076d4 <HAL_DMA_IRQHandler+0x430>)
8007584: 4293 cmp r3, r2
8007586: d004 beq.n 8007592 <HAL_DMA_IRQHandler+0x2ee>
8007588: 687b ldr r3, [r7, #4]
800758a: 681b ldr r3, [r3, #0]
800758c: 4a52 ldr r2, [pc, #328] @ (80076d8 <HAL_DMA_IRQHandler+0x434>)
800758e: 4293 cmp r3, r2
8007590: d10a bne.n 80075a8 <HAL_DMA_IRQHandler+0x304>
8007592: 687b ldr r3, [r7, #4]
8007594: 681b ldr r3, [r3, #0]
8007596: 695b ldr r3, [r3, #20]
8007598: f003 0380 and.w r3, r3, #128 @ 0x80
800759c: 2b00 cmp r3, #0
800759e: bf14 ite ne
80075a0: 2301 movne r3, #1
80075a2: 2300 moveq r3, #0
80075a4: b2db uxtb r3, r3
80075a6: e003 b.n 80075b0 <HAL_DMA_IRQHandler+0x30c>
80075a8: 687b ldr r3, [r7, #4]
80075aa: 681b ldr r3, [r3, #0]
80075ac: 681b ldr r3, [r3, #0]
80075ae: 2300 movs r3, #0
80075b0: 2b00 cmp r3, #0
80075b2: d00d beq.n 80075d0 <HAL_DMA_IRQHandler+0x32c>
{
/* Clear the FIFO error flag */
regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU);
80075b4: 687b ldr r3, [r7, #4]
80075b6: 6ddb ldr r3, [r3, #92] @ 0x5c
80075b8: f003 031f and.w r3, r3, #31
80075bc: 2201 movs r2, #1
80075be: 409a lsls r2, r3
80075c0: 6a3b ldr r3, [r7, #32]
80075c2: 609a str r2, [r3, #8]
/* Update error code */
hdma->ErrorCode |= HAL_DMA_ERROR_FE;
80075c4: 687b ldr r3, [r7, #4]
80075c6: 6d5b ldr r3, [r3, #84] @ 0x54
80075c8: f043 0202 orr.w r2, r3, #2
80075cc: 687b ldr r3, [r7, #4]
80075ce: 655a str r2, [r3, #84] @ 0x54
}
}
/* Direct Mode Error Interrupt management ***********************************/
if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
80075d0: 687b ldr r3, [r7, #4]
80075d2: 6ddb ldr r3, [r3, #92] @ 0x5c
80075d4: f003 031f and.w r3, r3, #31
80075d8: 2204 movs r2, #4
80075da: 409a lsls r2, r3
80075dc: 69bb ldr r3, [r7, #24]
80075de: 4013 ands r3, r2
80075e0: 2b00 cmp r3, #0
80075e2: f000 808f beq.w 8007704 <HAL_DMA_IRQHandler+0x460>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != 0U)
80075e6: 687b ldr r3, [r7, #4]
80075e8: 681b ldr r3, [r3, #0]
80075ea: 4a2c ldr r2, [pc, #176] @ (800769c <HAL_DMA_IRQHandler+0x3f8>)
80075ec: 4293 cmp r3, r2
80075ee: d04a beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
80075f0: 687b ldr r3, [r7, #4]
80075f2: 681b ldr r3, [r3, #0]
80075f4: 4a2a ldr r2, [pc, #168] @ (80076a0 <HAL_DMA_IRQHandler+0x3fc>)
80075f6: 4293 cmp r3, r2
80075f8: d045 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
80075fa: 687b ldr r3, [r7, #4]
80075fc: 681b ldr r3, [r3, #0]
80075fe: 4a29 ldr r2, [pc, #164] @ (80076a4 <HAL_DMA_IRQHandler+0x400>)
8007600: 4293 cmp r3, r2
8007602: d040 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
8007604: 687b ldr r3, [r7, #4]
8007606: 681b ldr r3, [r3, #0]
8007608: 4a27 ldr r2, [pc, #156] @ (80076a8 <HAL_DMA_IRQHandler+0x404>)
800760a: 4293 cmp r3, r2
800760c: d03b beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
800760e: 687b ldr r3, [r7, #4]
8007610: 681b ldr r3, [r3, #0]
8007612: 4a26 ldr r2, [pc, #152] @ (80076ac <HAL_DMA_IRQHandler+0x408>)
8007614: 4293 cmp r3, r2
8007616: d036 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
8007618: 687b ldr r3, [r7, #4]
800761a: 681b ldr r3, [r3, #0]
800761c: 4a24 ldr r2, [pc, #144] @ (80076b0 <HAL_DMA_IRQHandler+0x40c>)
800761e: 4293 cmp r3, r2
8007620: d031 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
8007622: 687b ldr r3, [r7, #4]
8007624: 681b ldr r3, [r3, #0]
8007626: 4a23 ldr r2, [pc, #140] @ (80076b4 <HAL_DMA_IRQHandler+0x410>)
8007628: 4293 cmp r3, r2
800762a: d02c beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
800762c: 687b ldr r3, [r7, #4]
800762e: 681b ldr r3, [r3, #0]
8007630: 4a21 ldr r2, [pc, #132] @ (80076b8 <HAL_DMA_IRQHandler+0x414>)
8007632: 4293 cmp r3, r2
8007634: d027 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
8007636: 687b ldr r3, [r7, #4]
8007638: 681b ldr r3, [r3, #0]
800763a: 4a20 ldr r2, [pc, #128] @ (80076bc <HAL_DMA_IRQHandler+0x418>)
800763c: 4293 cmp r3, r2
800763e: d022 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
8007640: 687b ldr r3, [r7, #4]
8007642: 681b ldr r3, [r3, #0]
8007644: 4a1e ldr r2, [pc, #120] @ (80076c0 <HAL_DMA_IRQHandler+0x41c>)
8007646: 4293 cmp r3, r2
8007648: d01d beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
800764a: 687b ldr r3, [r7, #4]
800764c: 681b ldr r3, [r3, #0]
800764e: 4a1d ldr r2, [pc, #116] @ (80076c4 <HAL_DMA_IRQHandler+0x420>)
8007650: 4293 cmp r3, r2
8007652: d018 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
8007654: 687b ldr r3, [r7, #4]
8007656: 681b ldr r3, [r3, #0]
8007658: 4a1b ldr r2, [pc, #108] @ (80076c8 <HAL_DMA_IRQHandler+0x424>)
800765a: 4293 cmp r3, r2
800765c: d013 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
800765e: 687b ldr r3, [r7, #4]
8007660: 681b ldr r3, [r3, #0]
8007662: 4a1a ldr r2, [pc, #104] @ (80076cc <HAL_DMA_IRQHandler+0x428>)
8007664: 4293 cmp r3, r2
8007666: d00e beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
8007668: 687b ldr r3, [r7, #4]
800766a: 681b ldr r3, [r3, #0]
800766c: 4a18 ldr r2, [pc, #96] @ (80076d0 <HAL_DMA_IRQHandler+0x42c>)
800766e: 4293 cmp r3, r2
8007670: d009 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
8007672: 687b ldr r3, [r7, #4]
8007674: 681b ldr r3, [r3, #0]
8007676: 4a17 ldr r2, [pc, #92] @ (80076d4 <HAL_DMA_IRQHandler+0x430>)
8007678: 4293 cmp r3, r2
800767a: d004 beq.n 8007686 <HAL_DMA_IRQHandler+0x3e2>
800767c: 687b ldr r3, [r7, #4]
800767e: 681b ldr r3, [r3, #0]
8007680: 4a15 ldr r2, [pc, #84] @ (80076d8 <HAL_DMA_IRQHandler+0x434>)
8007682: 4293 cmp r3, r2
8007684: d12a bne.n 80076dc <HAL_DMA_IRQHandler+0x438>
8007686: 687b ldr r3, [r7, #4]
8007688: 681b ldr r3, [r3, #0]
800768a: 681b ldr r3, [r3, #0]
800768c: f003 0302 and.w r3, r3, #2
8007690: 2b00 cmp r3, #0
8007692: bf14 ite ne
8007694: 2301 movne r3, #1
8007696: 2300 moveq r3, #0
8007698: b2db uxtb r3, r3
800769a: e023 b.n 80076e4 <HAL_DMA_IRQHandler+0x440>
800769c: 40020010 .word 0x40020010
80076a0: 40020028 .word 0x40020028
80076a4: 40020040 .word 0x40020040
80076a8: 40020058 .word 0x40020058
80076ac: 40020070 .word 0x40020070
80076b0: 40020088 .word 0x40020088
80076b4: 400200a0 .word 0x400200a0
80076b8: 400200b8 .word 0x400200b8
80076bc: 40020410 .word 0x40020410
80076c0: 40020428 .word 0x40020428
80076c4: 40020440 .word 0x40020440
80076c8: 40020458 .word 0x40020458
80076cc: 40020470 .word 0x40020470
80076d0: 40020488 .word 0x40020488
80076d4: 400204a0 .word 0x400204a0
80076d8: 400204b8 .word 0x400204b8
80076dc: 687b ldr r3, [r7, #4]
80076de: 681b ldr r3, [r3, #0]
80076e0: 681b ldr r3, [r3, #0]
80076e2: 2300 movs r3, #0
80076e4: 2b00 cmp r3, #0
80076e6: d00d beq.n 8007704 <HAL_DMA_IRQHandler+0x460>
{
/* Clear the direct mode error flag */
regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU);
80076e8: 687b ldr r3, [r7, #4]
80076ea: 6ddb ldr r3, [r3, #92] @ 0x5c
80076ec: f003 031f and.w r3, r3, #31
80076f0: 2204 movs r2, #4
80076f2: 409a lsls r2, r3
80076f4: 6a3b ldr r3, [r7, #32]
80076f6: 609a str r2, [r3, #8]
/* Update error code */
hdma->ErrorCode |= HAL_DMA_ERROR_DME;
80076f8: 687b ldr r3, [r7, #4]
80076fa: 6d5b ldr r3, [r3, #84] @ 0x54
80076fc: f043 0204 orr.w r2, r3, #4
8007700: 687b ldr r3, [r7, #4]
8007702: 655a str r2, [r3, #84] @ 0x54
}
}
/* Half Transfer Complete Interrupt management ******************************/
if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
8007704: 687b ldr r3, [r7, #4]
8007706: 6ddb ldr r3, [r3, #92] @ 0x5c
8007708: f003 031f and.w r3, r3, #31
800770c: 2210 movs r2, #16
800770e: 409a lsls r2, r3
8007710: 69bb ldr r3, [r7, #24]
8007712: 4013 ands r3, r2
8007714: 2b00 cmp r3, #0
8007716: f000 80a6 beq.w 8007866 <HAL_DMA_IRQHandler+0x5c2>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != 0U)
800771a: 687b ldr r3, [r7, #4]
800771c: 681b ldr r3, [r3, #0]
800771e: 4a85 ldr r2, [pc, #532] @ (8007934 <HAL_DMA_IRQHandler+0x690>)
8007720: 4293 cmp r3, r2
8007722: d04a beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
8007724: 687b ldr r3, [r7, #4]
8007726: 681b ldr r3, [r3, #0]
8007728: 4a83 ldr r2, [pc, #524] @ (8007938 <HAL_DMA_IRQHandler+0x694>)
800772a: 4293 cmp r3, r2
800772c: d045 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
800772e: 687b ldr r3, [r7, #4]
8007730: 681b ldr r3, [r3, #0]
8007732: 4a82 ldr r2, [pc, #520] @ (800793c <HAL_DMA_IRQHandler+0x698>)
8007734: 4293 cmp r3, r2
8007736: d040 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
8007738: 687b ldr r3, [r7, #4]
800773a: 681b ldr r3, [r3, #0]
800773c: 4a80 ldr r2, [pc, #512] @ (8007940 <HAL_DMA_IRQHandler+0x69c>)
800773e: 4293 cmp r3, r2
8007740: d03b beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
8007742: 687b ldr r3, [r7, #4]
8007744: 681b ldr r3, [r3, #0]
8007746: 4a7f ldr r2, [pc, #508] @ (8007944 <HAL_DMA_IRQHandler+0x6a0>)
8007748: 4293 cmp r3, r2
800774a: d036 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
800774c: 687b ldr r3, [r7, #4]
800774e: 681b ldr r3, [r3, #0]
8007750: 4a7d ldr r2, [pc, #500] @ (8007948 <HAL_DMA_IRQHandler+0x6a4>)
8007752: 4293 cmp r3, r2
8007754: d031 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
8007756: 687b ldr r3, [r7, #4]
8007758: 681b ldr r3, [r3, #0]
800775a: 4a7c ldr r2, [pc, #496] @ (800794c <HAL_DMA_IRQHandler+0x6a8>)
800775c: 4293 cmp r3, r2
800775e: d02c beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
8007760: 687b ldr r3, [r7, #4]
8007762: 681b ldr r3, [r3, #0]
8007764: 4a7a ldr r2, [pc, #488] @ (8007950 <HAL_DMA_IRQHandler+0x6ac>)
8007766: 4293 cmp r3, r2
8007768: d027 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
800776a: 687b ldr r3, [r7, #4]
800776c: 681b ldr r3, [r3, #0]
800776e: 4a79 ldr r2, [pc, #484] @ (8007954 <HAL_DMA_IRQHandler+0x6b0>)
8007770: 4293 cmp r3, r2
8007772: d022 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
8007774: 687b ldr r3, [r7, #4]
8007776: 681b ldr r3, [r3, #0]
8007778: 4a77 ldr r2, [pc, #476] @ (8007958 <HAL_DMA_IRQHandler+0x6b4>)
800777a: 4293 cmp r3, r2
800777c: d01d beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
800777e: 687b ldr r3, [r7, #4]
8007780: 681b ldr r3, [r3, #0]
8007782: 4a76 ldr r2, [pc, #472] @ (800795c <HAL_DMA_IRQHandler+0x6b8>)
8007784: 4293 cmp r3, r2
8007786: d018 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
8007788: 687b ldr r3, [r7, #4]
800778a: 681b ldr r3, [r3, #0]
800778c: 4a74 ldr r2, [pc, #464] @ (8007960 <HAL_DMA_IRQHandler+0x6bc>)
800778e: 4293 cmp r3, r2
8007790: d013 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
8007792: 687b ldr r3, [r7, #4]
8007794: 681b ldr r3, [r3, #0]
8007796: 4a73 ldr r2, [pc, #460] @ (8007964 <HAL_DMA_IRQHandler+0x6c0>)
8007798: 4293 cmp r3, r2
800779a: d00e beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
800779c: 687b ldr r3, [r7, #4]
800779e: 681b ldr r3, [r3, #0]
80077a0: 4a71 ldr r2, [pc, #452] @ (8007968 <HAL_DMA_IRQHandler+0x6c4>)
80077a2: 4293 cmp r3, r2
80077a4: d009 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
80077a6: 687b ldr r3, [r7, #4]
80077a8: 681b ldr r3, [r3, #0]
80077aa: 4a70 ldr r2, [pc, #448] @ (800796c <HAL_DMA_IRQHandler+0x6c8>)
80077ac: 4293 cmp r3, r2
80077ae: d004 beq.n 80077ba <HAL_DMA_IRQHandler+0x516>
80077b0: 687b ldr r3, [r7, #4]
80077b2: 681b ldr r3, [r3, #0]
80077b4: 4a6e ldr r2, [pc, #440] @ (8007970 <HAL_DMA_IRQHandler+0x6cc>)
80077b6: 4293 cmp r3, r2
80077b8: d10a bne.n 80077d0 <HAL_DMA_IRQHandler+0x52c>
80077ba: 687b ldr r3, [r7, #4]
80077bc: 681b ldr r3, [r3, #0]
80077be: 681b ldr r3, [r3, #0]
80077c0: f003 0308 and.w r3, r3, #8
80077c4: 2b00 cmp r3, #0
80077c6: bf14 ite ne
80077c8: 2301 movne r3, #1
80077ca: 2300 moveq r3, #0
80077cc: b2db uxtb r3, r3
80077ce: e009 b.n 80077e4 <HAL_DMA_IRQHandler+0x540>
80077d0: 687b ldr r3, [r7, #4]
80077d2: 681b ldr r3, [r3, #0]
80077d4: 681b ldr r3, [r3, #0]
80077d6: f003 0304 and.w r3, r3, #4
80077da: 2b00 cmp r3, #0
80077dc: bf14 ite ne
80077de: 2301 movne r3, #1
80077e0: 2300 moveq r3, #0
80077e2: b2db uxtb r3, r3
80077e4: 2b00 cmp r3, #0
80077e6: d03e beq.n 8007866 <HAL_DMA_IRQHandler+0x5c2>
{
/* Clear the half transfer complete flag */
regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU);
80077e8: 687b ldr r3, [r7, #4]
80077ea: 6ddb ldr r3, [r3, #92] @ 0x5c
80077ec: f003 031f and.w r3, r3, #31
80077f0: 2210 movs r2, #16
80077f2: 409a lsls r2, r3
80077f4: 6a3b ldr r3, [r7, #32]
80077f6: 609a str r2, [r3, #8]
/* Multi_Buffering mode enabled */
if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
80077f8: 687b ldr r3, [r7, #4]
80077fa: 681b ldr r3, [r3, #0]
80077fc: 681b ldr r3, [r3, #0]
80077fe: f403 2380 and.w r3, r3, #262144 @ 0x40000
8007802: 2b00 cmp r3, #0
8007804: d018 beq.n 8007838 <HAL_DMA_IRQHandler+0x594>
{
/* Current memory buffer used is Memory 0 */
if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
8007806: 687b ldr r3, [r7, #4]
8007808: 681b ldr r3, [r3, #0]
800780a: 681b ldr r3, [r3, #0]
800780c: f403 2300 and.w r3, r3, #524288 @ 0x80000
8007810: 2b00 cmp r3, #0
8007812: d108 bne.n 8007826 <HAL_DMA_IRQHandler+0x582>
{
if(hdma->XferHalfCpltCallback != NULL)
8007814: 687b ldr r3, [r7, #4]
8007816: 6c1b ldr r3, [r3, #64] @ 0x40
8007818: 2b00 cmp r3, #0
800781a: d024 beq.n 8007866 <HAL_DMA_IRQHandler+0x5c2>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
800781c: 687b ldr r3, [r7, #4]
800781e: 6c1b ldr r3, [r3, #64] @ 0x40
8007820: 6878 ldr r0, [r7, #4]
8007822: 4798 blx r3
8007824: e01f b.n 8007866 <HAL_DMA_IRQHandler+0x5c2>
}
}
/* Current memory buffer used is Memory 1 */
else
{
if(hdma->XferM1HalfCpltCallback != NULL)
8007826: 687b ldr r3, [r7, #4]
8007828: 6c9b ldr r3, [r3, #72] @ 0x48
800782a: 2b00 cmp r3, #0
800782c: d01b beq.n 8007866 <HAL_DMA_IRQHandler+0x5c2>
{
/* Half transfer callback */
hdma->XferM1HalfCpltCallback(hdma);
800782e: 687b ldr r3, [r7, #4]
8007830: 6c9b ldr r3, [r3, #72] @ 0x48
8007832: 6878 ldr r0, [r7, #4]
8007834: 4798 blx r3
8007836: e016 b.n 8007866 <HAL_DMA_IRQHandler+0x5c2>
}
}
else
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
8007838: 687b ldr r3, [r7, #4]
800783a: 681b ldr r3, [r3, #0]
800783c: 681b ldr r3, [r3, #0]
800783e: f403 7380 and.w r3, r3, #256 @ 0x100
8007842: 2b00 cmp r3, #0
8007844: d107 bne.n 8007856 <HAL_DMA_IRQHandler+0x5b2>
{
/* Disable the half transfer interrupt */
((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_HT);
8007846: 687b ldr r3, [r7, #4]
8007848: 681b ldr r3, [r3, #0]
800784a: 681a ldr r2, [r3, #0]
800784c: 687b ldr r3, [r7, #4]
800784e: 681b ldr r3, [r3, #0]
8007850: f022 0208 bic.w r2, r2, #8
8007854: 601a str r2, [r3, #0]
}
if(hdma->XferHalfCpltCallback != NULL)
8007856: 687b ldr r3, [r7, #4]
8007858: 6c1b ldr r3, [r3, #64] @ 0x40
800785a: 2b00 cmp r3, #0
800785c: d003 beq.n 8007866 <HAL_DMA_IRQHandler+0x5c2>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
800785e: 687b ldr r3, [r7, #4]
8007860: 6c1b ldr r3, [r3, #64] @ 0x40
8007862: 6878 ldr r0, [r7, #4]
8007864: 4798 blx r3
}
}
}
}
/* Transfer Complete Interrupt management ***********************************/
if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
8007866: 687b ldr r3, [r7, #4]
8007868: 6ddb ldr r3, [r3, #92] @ 0x5c
800786a: f003 031f and.w r3, r3, #31
800786e: 2220 movs r2, #32
8007870: 409a lsls r2, r3
8007872: 69bb ldr r3, [r7, #24]
8007874: 4013 ands r3, r2
8007876: 2b00 cmp r3, #0
8007878: f000 8110 beq.w 8007a9c <HAL_DMA_IRQHandler+0x7f8>
{
if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != 0U)
800787c: 687b ldr r3, [r7, #4]
800787e: 681b ldr r3, [r3, #0]
8007880: 4a2c ldr r2, [pc, #176] @ (8007934 <HAL_DMA_IRQHandler+0x690>)
8007882: 4293 cmp r3, r2
8007884: d04a beq.n 800791c <HAL_DMA_IRQHandler+0x678>
8007886: 687b ldr r3, [r7, #4]
8007888: 681b ldr r3, [r3, #0]
800788a: 4a2b ldr r2, [pc, #172] @ (8007938 <HAL_DMA_IRQHandler+0x694>)
800788c: 4293 cmp r3, r2
800788e: d045 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
8007890: 687b ldr r3, [r7, #4]
8007892: 681b ldr r3, [r3, #0]
8007894: 4a29 ldr r2, [pc, #164] @ (800793c <HAL_DMA_IRQHandler+0x698>)
8007896: 4293 cmp r3, r2
8007898: d040 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
800789a: 687b ldr r3, [r7, #4]
800789c: 681b ldr r3, [r3, #0]
800789e: 4a28 ldr r2, [pc, #160] @ (8007940 <HAL_DMA_IRQHandler+0x69c>)
80078a0: 4293 cmp r3, r2
80078a2: d03b beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078a4: 687b ldr r3, [r7, #4]
80078a6: 681b ldr r3, [r3, #0]
80078a8: 4a26 ldr r2, [pc, #152] @ (8007944 <HAL_DMA_IRQHandler+0x6a0>)
80078aa: 4293 cmp r3, r2
80078ac: d036 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078ae: 687b ldr r3, [r7, #4]
80078b0: 681b ldr r3, [r3, #0]
80078b2: 4a25 ldr r2, [pc, #148] @ (8007948 <HAL_DMA_IRQHandler+0x6a4>)
80078b4: 4293 cmp r3, r2
80078b6: d031 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078b8: 687b ldr r3, [r7, #4]
80078ba: 681b ldr r3, [r3, #0]
80078bc: 4a23 ldr r2, [pc, #140] @ (800794c <HAL_DMA_IRQHandler+0x6a8>)
80078be: 4293 cmp r3, r2
80078c0: d02c beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078c2: 687b ldr r3, [r7, #4]
80078c4: 681b ldr r3, [r3, #0]
80078c6: 4a22 ldr r2, [pc, #136] @ (8007950 <HAL_DMA_IRQHandler+0x6ac>)
80078c8: 4293 cmp r3, r2
80078ca: d027 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078cc: 687b ldr r3, [r7, #4]
80078ce: 681b ldr r3, [r3, #0]
80078d0: 4a20 ldr r2, [pc, #128] @ (8007954 <HAL_DMA_IRQHandler+0x6b0>)
80078d2: 4293 cmp r3, r2
80078d4: d022 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078d6: 687b ldr r3, [r7, #4]
80078d8: 681b ldr r3, [r3, #0]
80078da: 4a1f ldr r2, [pc, #124] @ (8007958 <HAL_DMA_IRQHandler+0x6b4>)
80078dc: 4293 cmp r3, r2
80078de: d01d beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078e0: 687b ldr r3, [r7, #4]
80078e2: 681b ldr r3, [r3, #0]
80078e4: 4a1d ldr r2, [pc, #116] @ (800795c <HAL_DMA_IRQHandler+0x6b8>)
80078e6: 4293 cmp r3, r2
80078e8: d018 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078ea: 687b ldr r3, [r7, #4]
80078ec: 681b ldr r3, [r3, #0]
80078ee: 4a1c ldr r2, [pc, #112] @ (8007960 <HAL_DMA_IRQHandler+0x6bc>)
80078f0: 4293 cmp r3, r2
80078f2: d013 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078f4: 687b ldr r3, [r7, #4]
80078f6: 681b ldr r3, [r3, #0]
80078f8: 4a1a ldr r2, [pc, #104] @ (8007964 <HAL_DMA_IRQHandler+0x6c0>)
80078fa: 4293 cmp r3, r2
80078fc: d00e beq.n 800791c <HAL_DMA_IRQHandler+0x678>
80078fe: 687b ldr r3, [r7, #4]
8007900: 681b ldr r3, [r3, #0]
8007902: 4a19 ldr r2, [pc, #100] @ (8007968 <HAL_DMA_IRQHandler+0x6c4>)
8007904: 4293 cmp r3, r2
8007906: d009 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
8007908: 687b ldr r3, [r7, #4]
800790a: 681b ldr r3, [r3, #0]
800790c: 4a17 ldr r2, [pc, #92] @ (800796c <HAL_DMA_IRQHandler+0x6c8>)
800790e: 4293 cmp r3, r2
8007910: d004 beq.n 800791c <HAL_DMA_IRQHandler+0x678>
8007912: 687b ldr r3, [r7, #4]
8007914: 681b ldr r3, [r3, #0]
8007916: 4a16 ldr r2, [pc, #88] @ (8007970 <HAL_DMA_IRQHandler+0x6cc>)
8007918: 4293 cmp r3, r2
800791a: d12b bne.n 8007974 <HAL_DMA_IRQHandler+0x6d0>
800791c: 687b ldr r3, [r7, #4]
800791e: 681b ldr r3, [r3, #0]
8007920: 681b ldr r3, [r3, #0]
8007922: f003 0310 and.w r3, r3, #16
8007926: 2b00 cmp r3, #0
8007928: bf14 ite ne
800792a: 2301 movne r3, #1
800792c: 2300 moveq r3, #0
800792e: b2db uxtb r3, r3
8007930: e02a b.n 8007988 <HAL_DMA_IRQHandler+0x6e4>
8007932: bf00 nop
8007934: 40020010 .word 0x40020010
8007938: 40020028 .word 0x40020028
800793c: 40020040 .word 0x40020040
8007940: 40020058 .word 0x40020058
8007944: 40020070 .word 0x40020070
8007948: 40020088 .word 0x40020088
800794c: 400200a0 .word 0x400200a0
8007950: 400200b8 .word 0x400200b8
8007954: 40020410 .word 0x40020410
8007958: 40020428 .word 0x40020428
800795c: 40020440 .word 0x40020440
8007960: 40020458 .word 0x40020458
8007964: 40020470 .word 0x40020470
8007968: 40020488 .word 0x40020488
800796c: 400204a0 .word 0x400204a0
8007970: 400204b8 .word 0x400204b8
8007974: 687b ldr r3, [r7, #4]
8007976: 681b ldr r3, [r3, #0]
8007978: 681b ldr r3, [r3, #0]
800797a: f003 0302 and.w r3, r3, #2
800797e: 2b00 cmp r3, #0
8007980: bf14 ite ne
8007982: 2301 movne r3, #1
8007984: 2300 moveq r3, #0
8007986: b2db uxtb r3, r3
8007988: 2b00 cmp r3, #0
800798a: f000 8087 beq.w 8007a9c <HAL_DMA_IRQHandler+0x7f8>
{
/* Clear the transfer complete flag */
regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU);
800798e: 687b ldr r3, [r7, #4]
8007990: 6ddb ldr r3, [r3, #92] @ 0x5c
8007992: f003 031f and.w r3, r3, #31
8007996: 2220 movs r2, #32
8007998: 409a lsls r2, r3
800799a: 6a3b ldr r3, [r7, #32]
800799c: 609a str r2, [r3, #8]
if(HAL_DMA_STATE_ABORT == hdma->State)
800799e: 687b ldr r3, [r7, #4]
80079a0: f893 3035 ldrb.w r3, [r3, #53] @ 0x35
80079a4: b2db uxtb r3, r3
80079a6: 2b04 cmp r3, #4
80079a8: d139 bne.n 8007a1e <HAL_DMA_IRQHandler+0x77a>
{
/* Disable all the transfer interrupts */
((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
80079aa: 687b ldr r3, [r7, #4]
80079ac: 681b ldr r3, [r3, #0]
80079ae: 681a ldr r2, [r3, #0]
80079b0: 687b ldr r3, [r7, #4]
80079b2: 681b ldr r3, [r3, #0]
80079b4: f022 0216 bic.w r2, r2, #22
80079b8: 601a str r2, [r3, #0]
((DMA_Stream_TypeDef *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
80079ba: 687b ldr r3, [r7, #4]
80079bc: 681b ldr r3, [r3, #0]
80079be: 695a ldr r2, [r3, #20]
80079c0: 687b ldr r3, [r7, #4]
80079c2: 681b ldr r3, [r3, #0]
80079c4: f022 0280 bic.w r2, r2, #128 @ 0x80
80079c8: 615a str r2, [r3, #20]
if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
80079ca: 687b ldr r3, [r7, #4]
80079cc: 6c1b ldr r3, [r3, #64] @ 0x40
80079ce: 2b00 cmp r3, #0
80079d0: d103 bne.n 80079da <HAL_DMA_IRQHandler+0x736>
80079d2: 687b ldr r3, [r7, #4]
80079d4: 6c9b ldr r3, [r3, #72] @ 0x48
80079d6: 2b00 cmp r3, #0
80079d8: d007 beq.n 80079ea <HAL_DMA_IRQHandler+0x746>
{
((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_HT);
80079da: 687b ldr r3, [r7, #4]
80079dc: 681b ldr r3, [r3, #0]
80079de: 681a ldr r2, [r3, #0]
80079e0: 687b ldr r3, [r7, #4]
80079e2: 681b ldr r3, [r3, #0]
80079e4: f022 0208 bic.w r2, r2, #8
80079e8: 601a str r2, [r3, #0]
}
/* Clear all interrupt flags at correct offset within the register */
regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
80079ea: 687b ldr r3, [r7, #4]
80079ec: 6ddb ldr r3, [r3, #92] @ 0x5c
80079ee: f003 031f and.w r3, r3, #31
80079f2: 223f movs r2, #63 @ 0x3f
80079f4: 409a lsls r2, r3
80079f6: 6a3b ldr r3, [r7, #32]
80079f8: 609a str r2, [r3, #8]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
80079fa: 687b ldr r3, [r7, #4]
80079fc: 2201 movs r2, #1
80079fe: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8007a02: 687b ldr r3, [r7, #4]
8007a04: 2200 movs r2, #0
8007a06: f883 2034 strb.w r2, [r3, #52] @ 0x34
if(hdma->XferAbortCallback != NULL)
8007a0a: 687b ldr r3, [r7, #4]
8007a0c: 6d1b ldr r3, [r3, #80] @ 0x50
8007a0e: 2b00 cmp r3, #0
8007a10: f000 834a beq.w 80080a8 <HAL_DMA_IRQHandler+0xe04>
{
hdma->XferAbortCallback(hdma);
8007a14: 687b ldr r3, [r7, #4]
8007a16: 6d1b ldr r3, [r3, #80] @ 0x50
8007a18: 6878 ldr r0, [r7, #4]
8007a1a: 4798 blx r3
}
return;
8007a1c: e344 b.n 80080a8 <HAL_DMA_IRQHandler+0xe04>
}
if(((((DMA_Stream_TypeDef *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
8007a1e: 687b ldr r3, [r7, #4]
8007a20: 681b ldr r3, [r3, #0]
8007a22: 681b ldr r3, [r3, #0]
8007a24: f403 2380 and.w r3, r3, #262144 @ 0x40000
8007a28: 2b00 cmp r3, #0
8007a2a: d018 beq.n 8007a5e <HAL_DMA_IRQHandler+0x7ba>
{
/* Current memory buffer used is Memory 0 */
if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
8007a2c: 687b ldr r3, [r7, #4]
8007a2e: 681b ldr r3, [r3, #0]
8007a30: 681b ldr r3, [r3, #0]
8007a32: f403 2300 and.w r3, r3, #524288 @ 0x80000
8007a36: 2b00 cmp r3, #0
8007a38: d108 bne.n 8007a4c <HAL_DMA_IRQHandler+0x7a8>
{
if(hdma->XferM1CpltCallback != NULL)
8007a3a: 687b ldr r3, [r7, #4]
8007a3c: 6c5b ldr r3, [r3, #68] @ 0x44
8007a3e: 2b00 cmp r3, #0
8007a40: d02c beq.n 8007a9c <HAL_DMA_IRQHandler+0x7f8>
{
/* Transfer complete Callback for memory1 */
hdma->XferM1CpltCallback(hdma);
8007a42: 687b ldr r3, [r7, #4]
8007a44: 6c5b ldr r3, [r3, #68] @ 0x44
8007a46: 6878 ldr r0, [r7, #4]
8007a48: 4798 blx r3
8007a4a: e027 b.n 8007a9c <HAL_DMA_IRQHandler+0x7f8>
}
}
/* Current memory buffer used is Memory 1 */
else
{
if(hdma->XferCpltCallback != NULL)
8007a4c: 687b ldr r3, [r7, #4]
8007a4e: 6bdb ldr r3, [r3, #60] @ 0x3c
8007a50: 2b00 cmp r3, #0
8007a52: d023 beq.n 8007a9c <HAL_DMA_IRQHandler+0x7f8>
{
/* Transfer complete Callback for memory0 */
hdma->XferCpltCallback(hdma);
8007a54: 687b ldr r3, [r7, #4]
8007a56: 6bdb ldr r3, [r3, #60] @ 0x3c
8007a58: 6878 ldr r0, [r7, #4]
8007a5a: 4798 blx r3
8007a5c: e01e b.n 8007a9c <HAL_DMA_IRQHandler+0x7f8>
}
}
/* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
else
{
if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
8007a5e: 687b ldr r3, [r7, #4]
8007a60: 681b ldr r3, [r3, #0]
8007a62: 681b ldr r3, [r3, #0]
8007a64: f403 7380 and.w r3, r3, #256 @ 0x100
8007a68: 2b00 cmp r3, #0
8007a6a: d10f bne.n 8007a8c <HAL_DMA_IRQHandler+0x7e8>
{
/* Disable the transfer complete interrupt */
((DMA_Stream_TypeDef *)hdma->Instance)->CR &= ~(DMA_IT_TC);
8007a6c: 687b ldr r3, [r7, #4]
8007a6e: 681b ldr r3, [r3, #0]
8007a70: 681a ldr r2, [r3, #0]
8007a72: 687b ldr r3, [r7, #4]
8007a74: 681b ldr r3, [r3, #0]
8007a76: f022 0210 bic.w r2, r2, #16
8007a7a: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8007a7c: 687b ldr r3, [r7, #4]
8007a7e: 2201 movs r2, #1
8007a80: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8007a84: 687b ldr r3, [r7, #4]
8007a86: 2200 movs r2, #0
8007a88: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
if(hdma->XferCpltCallback != NULL)
8007a8c: 687b ldr r3, [r7, #4]
8007a8e: 6bdb ldr r3, [r3, #60] @ 0x3c
8007a90: 2b00 cmp r3, #0
8007a92: d003 beq.n 8007a9c <HAL_DMA_IRQHandler+0x7f8>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8007a94: 687b ldr r3, [r7, #4]
8007a96: 6bdb ldr r3, [r3, #60] @ 0x3c
8007a98: 6878 ldr r0, [r7, #4]
8007a9a: 4798 blx r3
}
}
}
/* manage error case */
if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
8007a9c: 687b ldr r3, [r7, #4]
8007a9e: 6d5b ldr r3, [r3, #84] @ 0x54
8007aa0: 2b00 cmp r3, #0
8007aa2: f000 8306 beq.w 80080b2 <HAL_DMA_IRQHandler+0xe0e>
{
if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != 0U)
8007aa6: 687b ldr r3, [r7, #4]
8007aa8: 6d5b ldr r3, [r3, #84] @ 0x54
8007aaa: f003 0301 and.w r3, r3, #1
8007aae: 2b00 cmp r3, #0
8007ab0: f000 8088 beq.w 8007bc4 <HAL_DMA_IRQHandler+0x920>
{
hdma->State = HAL_DMA_STATE_ABORT;
8007ab4: 687b ldr r3, [r7, #4]
8007ab6: 2204 movs r2, #4
8007ab8: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Disable the stream */
__HAL_DMA_DISABLE(hdma);
8007abc: 687b ldr r3, [r7, #4]
8007abe: 681b ldr r3, [r3, #0]
8007ac0: 4a7a ldr r2, [pc, #488] @ (8007cac <HAL_DMA_IRQHandler+0xa08>)
8007ac2: 4293 cmp r3, r2
8007ac4: d04a beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007ac6: 687b ldr r3, [r7, #4]
8007ac8: 681b ldr r3, [r3, #0]
8007aca: 4a79 ldr r2, [pc, #484] @ (8007cb0 <HAL_DMA_IRQHandler+0xa0c>)
8007acc: 4293 cmp r3, r2
8007ace: d045 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007ad0: 687b ldr r3, [r7, #4]
8007ad2: 681b ldr r3, [r3, #0]
8007ad4: 4a77 ldr r2, [pc, #476] @ (8007cb4 <HAL_DMA_IRQHandler+0xa10>)
8007ad6: 4293 cmp r3, r2
8007ad8: d040 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007ada: 687b ldr r3, [r7, #4]
8007adc: 681b ldr r3, [r3, #0]
8007ade: 4a76 ldr r2, [pc, #472] @ (8007cb8 <HAL_DMA_IRQHandler+0xa14>)
8007ae0: 4293 cmp r3, r2
8007ae2: d03b beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007ae4: 687b ldr r3, [r7, #4]
8007ae6: 681b ldr r3, [r3, #0]
8007ae8: 4a74 ldr r2, [pc, #464] @ (8007cbc <HAL_DMA_IRQHandler+0xa18>)
8007aea: 4293 cmp r3, r2
8007aec: d036 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007aee: 687b ldr r3, [r7, #4]
8007af0: 681b ldr r3, [r3, #0]
8007af2: 4a73 ldr r2, [pc, #460] @ (8007cc0 <HAL_DMA_IRQHandler+0xa1c>)
8007af4: 4293 cmp r3, r2
8007af6: d031 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007af8: 687b ldr r3, [r7, #4]
8007afa: 681b ldr r3, [r3, #0]
8007afc: 4a71 ldr r2, [pc, #452] @ (8007cc4 <HAL_DMA_IRQHandler+0xa20>)
8007afe: 4293 cmp r3, r2
8007b00: d02c beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007b02: 687b ldr r3, [r7, #4]
8007b04: 681b ldr r3, [r3, #0]
8007b06: 4a70 ldr r2, [pc, #448] @ (8007cc8 <HAL_DMA_IRQHandler+0xa24>)
8007b08: 4293 cmp r3, r2
8007b0a: d027 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007b0c: 687b ldr r3, [r7, #4]
8007b0e: 681b ldr r3, [r3, #0]
8007b10: 4a6e ldr r2, [pc, #440] @ (8007ccc <HAL_DMA_IRQHandler+0xa28>)
8007b12: 4293 cmp r3, r2
8007b14: d022 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007b16: 687b ldr r3, [r7, #4]
8007b18: 681b ldr r3, [r3, #0]
8007b1a: 4a6d ldr r2, [pc, #436] @ (8007cd0 <HAL_DMA_IRQHandler+0xa2c>)
8007b1c: 4293 cmp r3, r2
8007b1e: d01d beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007b20: 687b ldr r3, [r7, #4]
8007b22: 681b ldr r3, [r3, #0]
8007b24: 4a6b ldr r2, [pc, #428] @ (8007cd4 <HAL_DMA_IRQHandler+0xa30>)
8007b26: 4293 cmp r3, r2
8007b28: d018 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007b2a: 687b ldr r3, [r7, #4]
8007b2c: 681b ldr r3, [r3, #0]
8007b2e: 4a6a ldr r2, [pc, #424] @ (8007cd8 <HAL_DMA_IRQHandler+0xa34>)
8007b30: 4293 cmp r3, r2
8007b32: d013 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007b34: 687b ldr r3, [r7, #4]
8007b36: 681b ldr r3, [r3, #0]
8007b38: 4a68 ldr r2, [pc, #416] @ (8007cdc <HAL_DMA_IRQHandler+0xa38>)
8007b3a: 4293 cmp r3, r2
8007b3c: d00e beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007b3e: 687b ldr r3, [r7, #4]
8007b40: 681b ldr r3, [r3, #0]
8007b42: 4a67 ldr r2, [pc, #412] @ (8007ce0 <HAL_DMA_IRQHandler+0xa3c>)
8007b44: 4293 cmp r3, r2
8007b46: d009 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007b48: 687b ldr r3, [r7, #4]
8007b4a: 681b ldr r3, [r3, #0]
8007b4c: 4a65 ldr r2, [pc, #404] @ (8007ce4 <HAL_DMA_IRQHandler+0xa40>)
8007b4e: 4293 cmp r3, r2
8007b50: d004 beq.n 8007b5c <HAL_DMA_IRQHandler+0x8b8>
8007b52: 687b ldr r3, [r7, #4]
8007b54: 681b ldr r3, [r3, #0]
8007b56: 4a64 ldr r2, [pc, #400] @ (8007ce8 <HAL_DMA_IRQHandler+0xa44>)
8007b58: 4293 cmp r3, r2
8007b5a: d108 bne.n 8007b6e <HAL_DMA_IRQHandler+0x8ca>
8007b5c: 687b ldr r3, [r7, #4]
8007b5e: 681b ldr r3, [r3, #0]
8007b60: 681a ldr r2, [r3, #0]
8007b62: 687b ldr r3, [r7, #4]
8007b64: 681b ldr r3, [r3, #0]
8007b66: f022 0201 bic.w r2, r2, #1
8007b6a: 601a str r2, [r3, #0]
8007b6c: e007 b.n 8007b7e <HAL_DMA_IRQHandler+0x8da>
8007b6e: 687b ldr r3, [r7, #4]
8007b70: 681b ldr r3, [r3, #0]
8007b72: 681a ldr r2, [r3, #0]
8007b74: 687b ldr r3, [r7, #4]
8007b76: 681b ldr r3, [r3, #0]
8007b78: f022 0201 bic.w r2, r2, #1
8007b7c: 601a str r2, [r3, #0]
do
{
if (++count > timeout)
8007b7e: 68fb ldr r3, [r7, #12]
8007b80: 3301 adds r3, #1
8007b82: 60fb str r3, [r7, #12]
8007b84: 6a7a ldr r2, [r7, #36] @ 0x24
8007b86: 429a cmp r2, r3
8007b88: d307 bcc.n 8007b9a <HAL_DMA_IRQHandler+0x8f6>
{
break;
}
}
while((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U);
8007b8a: 687b ldr r3, [r7, #4]
8007b8c: 681b ldr r3, [r3, #0]
8007b8e: 681b ldr r3, [r3, #0]
8007b90: f003 0301 and.w r3, r3, #1
8007b94: 2b00 cmp r3, #0
8007b96: d1f2 bne.n 8007b7e <HAL_DMA_IRQHandler+0x8da>
8007b98: e000 b.n 8007b9c <HAL_DMA_IRQHandler+0x8f8>
break;
8007b9a: bf00 nop
if((((DMA_Stream_TypeDef *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
8007b9c: 687b ldr r3, [r7, #4]
8007b9e: 681b ldr r3, [r3, #0]
8007ba0: 681b ldr r3, [r3, #0]
8007ba2: f003 0301 and.w r3, r3, #1
8007ba6: 2b00 cmp r3, #0
8007ba8: d004 beq.n 8007bb4 <HAL_DMA_IRQHandler+0x910>
{
/* Change the DMA state to error if DMA disable fails */
hdma->State = HAL_DMA_STATE_ERROR;
8007baa: 687b ldr r3, [r7, #4]
8007bac: 2203 movs r2, #3
8007bae: f883 2035 strb.w r2, [r3, #53] @ 0x35
8007bb2: e003 b.n 8007bbc <HAL_DMA_IRQHandler+0x918>
}
else
{
/* Change the DMA state to Ready if DMA disable success */
hdma->State = HAL_DMA_STATE_READY;
8007bb4: 687b ldr r3, [r7, #4]
8007bb6: 2201 movs r2, #1
8007bb8: f883 2035 strb.w r2, [r3, #53] @ 0x35
}
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8007bbc: 687b ldr r3, [r7, #4]
8007bbe: 2200 movs r2, #0
8007bc0: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
if(hdma->XferErrorCallback != NULL)
8007bc4: 687b ldr r3, [r7, #4]
8007bc6: 6cdb ldr r3, [r3, #76] @ 0x4c
8007bc8: 2b00 cmp r3, #0
8007bca: f000 8272 beq.w 80080b2 <HAL_DMA_IRQHandler+0xe0e>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
8007bce: 687b ldr r3, [r7, #4]
8007bd0: 6cdb ldr r3, [r3, #76] @ 0x4c
8007bd2: 6878 ldr r0, [r7, #4]
8007bd4: 4798 blx r3
8007bd6: e26c b.n 80080b2 <HAL_DMA_IRQHandler+0xe0e>
}
}
}
else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
8007bd8: 687b ldr r3, [r7, #4]
8007bda: 681b ldr r3, [r3, #0]
8007bdc: 4a43 ldr r2, [pc, #268] @ (8007cec <HAL_DMA_IRQHandler+0xa48>)
8007bde: 4293 cmp r3, r2
8007be0: d022 beq.n 8007c28 <HAL_DMA_IRQHandler+0x984>
8007be2: 687b ldr r3, [r7, #4]
8007be4: 681b ldr r3, [r3, #0]
8007be6: 4a42 ldr r2, [pc, #264] @ (8007cf0 <HAL_DMA_IRQHandler+0xa4c>)
8007be8: 4293 cmp r3, r2
8007bea: d01d beq.n 8007c28 <HAL_DMA_IRQHandler+0x984>
8007bec: 687b ldr r3, [r7, #4]
8007bee: 681b ldr r3, [r3, #0]
8007bf0: 4a40 ldr r2, [pc, #256] @ (8007cf4 <HAL_DMA_IRQHandler+0xa50>)
8007bf2: 4293 cmp r3, r2
8007bf4: d018 beq.n 8007c28 <HAL_DMA_IRQHandler+0x984>
8007bf6: 687b ldr r3, [r7, #4]
8007bf8: 681b ldr r3, [r3, #0]
8007bfa: 4a3f ldr r2, [pc, #252] @ (8007cf8 <HAL_DMA_IRQHandler+0xa54>)
8007bfc: 4293 cmp r3, r2
8007bfe: d013 beq.n 8007c28 <HAL_DMA_IRQHandler+0x984>
8007c00: 687b ldr r3, [r7, #4]
8007c02: 681b ldr r3, [r3, #0]
8007c04: 4a3d ldr r2, [pc, #244] @ (8007cfc <HAL_DMA_IRQHandler+0xa58>)
8007c06: 4293 cmp r3, r2
8007c08: d00e beq.n 8007c28 <HAL_DMA_IRQHandler+0x984>
8007c0a: 687b ldr r3, [r7, #4]
8007c0c: 681b ldr r3, [r3, #0]
8007c0e: 4a3c ldr r2, [pc, #240] @ (8007d00 <HAL_DMA_IRQHandler+0xa5c>)
8007c10: 4293 cmp r3, r2
8007c12: d009 beq.n 8007c28 <HAL_DMA_IRQHandler+0x984>
8007c14: 687b ldr r3, [r7, #4]
8007c16: 681b ldr r3, [r3, #0]
8007c18: 4a3a ldr r2, [pc, #232] @ (8007d04 <HAL_DMA_IRQHandler+0xa60>)
8007c1a: 4293 cmp r3, r2
8007c1c: d004 beq.n 8007c28 <HAL_DMA_IRQHandler+0x984>
8007c1e: 687b ldr r3, [r7, #4]
8007c20: 681b ldr r3, [r3, #0]
8007c22: 4a39 ldr r2, [pc, #228] @ (8007d08 <HAL_DMA_IRQHandler+0xa64>)
8007c24: 4293 cmp r3, r2
8007c26: d101 bne.n 8007c2c <HAL_DMA_IRQHandler+0x988>
8007c28: 2301 movs r3, #1
8007c2a: e000 b.n 8007c2e <HAL_DMA_IRQHandler+0x98a>
8007c2c: 2300 movs r3, #0
8007c2e: 2b00 cmp r3, #0
8007c30: f000 823f beq.w 80080b2 <HAL_DMA_IRQHandler+0xe0e>
{
ccr_reg = (((BDMA_Channel_TypeDef *)hdma->Instance)->CCR);
8007c34: 687b ldr r3, [r7, #4]
8007c36: 681b ldr r3, [r3, #0]
8007c38: 681b ldr r3, [r3, #0]
8007c3a: 613b str r3, [r7, #16]
/* Half Transfer Complete Interrupt management ******************************/
if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_HTIE) != 0U))
8007c3c: 687b ldr r3, [r7, #4]
8007c3e: 6ddb ldr r3, [r3, #92] @ 0x5c
8007c40: f003 031f and.w r3, r3, #31
8007c44: 2204 movs r2, #4
8007c46: 409a lsls r2, r3
8007c48: 697b ldr r3, [r7, #20]
8007c4a: 4013 ands r3, r2
8007c4c: 2b00 cmp r3, #0
8007c4e: f000 80cd beq.w 8007dec <HAL_DMA_IRQHandler+0xb48>
8007c52: 693b ldr r3, [r7, #16]
8007c54: f003 0304 and.w r3, r3, #4
8007c58: 2b00 cmp r3, #0
8007c5a: f000 80c7 beq.w 8007dec <HAL_DMA_IRQHandler+0xb48>
{
/* Clear the half transfer complete flag */
regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU));
8007c5e: 687b ldr r3, [r7, #4]
8007c60: 6ddb ldr r3, [r3, #92] @ 0x5c
8007c62: f003 031f and.w r3, r3, #31
8007c66: 2204 movs r2, #4
8007c68: 409a lsls r2, r3
8007c6a: 69fb ldr r3, [r7, #28]
8007c6c: 605a str r2, [r3, #4]
/* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
if((ccr_reg & BDMA_CCR_DBM) != 0U)
8007c6e: 693b ldr r3, [r7, #16]
8007c70: f403 4300 and.w r3, r3, #32768 @ 0x8000
8007c74: 2b00 cmp r3, #0
8007c76: d049 beq.n 8007d0c <HAL_DMA_IRQHandler+0xa68>
{
/* Current memory buffer used is Memory 0 */
if((ccr_reg & BDMA_CCR_CT) == 0U)
8007c78: 693b ldr r3, [r7, #16]
8007c7a: f403 3380 and.w r3, r3, #65536 @ 0x10000
8007c7e: 2b00 cmp r3, #0
8007c80: d109 bne.n 8007c96 <HAL_DMA_IRQHandler+0x9f2>
{
if(hdma->XferM1HalfCpltCallback != NULL)
8007c82: 687b ldr r3, [r7, #4]
8007c84: 6c9b ldr r3, [r3, #72] @ 0x48
8007c86: 2b00 cmp r3, #0
8007c88: f000 8210 beq.w 80080ac <HAL_DMA_IRQHandler+0xe08>
{
/* Half transfer Callback for Memory 1 */
hdma->XferM1HalfCpltCallback(hdma);
8007c8c: 687b ldr r3, [r7, #4]
8007c8e: 6c9b ldr r3, [r3, #72] @ 0x48
8007c90: 6878 ldr r0, [r7, #4]
8007c92: 4798 blx r3
if((ccr_reg & BDMA_CCR_DBM) != 0U)
8007c94: e20a b.n 80080ac <HAL_DMA_IRQHandler+0xe08>
}
}
/* Current memory buffer used is Memory 1 */
else
{
if(hdma->XferHalfCpltCallback != NULL)
8007c96: 687b ldr r3, [r7, #4]
8007c98: 6c1b ldr r3, [r3, #64] @ 0x40
8007c9a: 2b00 cmp r3, #0
8007c9c: f000 8206 beq.w 80080ac <HAL_DMA_IRQHandler+0xe08>
{
/* Half transfer Callback for Memory 0 */
hdma->XferHalfCpltCallback(hdma);
8007ca0: 687b ldr r3, [r7, #4]
8007ca2: 6c1b ldr r3, [r3, #64] @ 0x40
8007ca4: 6878 ldr r0, [r7, #4]
8007ca6: 4798 blx r3
if((ccr_reg & BDMA_CCR_DBM) != 0U)
8007ca8: e200 b.n 80080ac <HAL_DMA_IRQHandler+0xe08>
8007caa: bf00 nop
8007cac: 40020010 .word 0x40020010
8007cb0: 40020028 .word 0x40020028
8007cb4: 40020040 .word 0x40020040
8007cb8: 40020058 .word 0x40020058
8007cbc: 40020070 .word 0x40020070
8007cc0: 40020088 .word 0x40020088
8007cc4: 400200a0 .word 0x400200a0
8007cc8: 400200b8 .word 0x400200b8
8007ccc: 40020410 .word 0x40020410
8007cd0: 40020428 .word 0x40020428
8007cd4: 40020440 .word 0x40020440
8007cd8: 40020458 .word 0x40020458
8007cdc: 40020470 .word 0x40020470
8007ce0: 40020488 .word 0x40020488
8007ce4: 400204a0 .word 0x400204a0
8007ce8: 400204b8 .word 0x400204b8
8007cec: 58025408 .word 0x58025408
8007cf0: 5802541c .word 0x5802541c
8007cf4: 58025430 .word 0x58025430
8007cf8: 58025444 .word 0x58025444
8007cfc: 58025458 .word 0x58025458
8007d00: 5802546c .word 0x5802546c
8007d04: 58025480 .word 0x58025480
8007d08: 58025494 .word 0x58025494
}
}
}
else
{
if((ccr_reg & BDMA_CCR_CIRC) == 0U)
8007d0c: 693b ldr r3, [r7, #16]
8007d0e: f003 0320 and.w r3, r3, #32
8007d12: 2b00 cmp r3, #0
8007d14: d160 bne.n 8007dd8 <HAL_DMA_IRQHandler+0xb34>
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8007d16: 687b ldr r3, [r7, #4]
8007d18: 681b ldr r3, [r3, #0]
8007d1a: 4a7f ldr r2, [pc, #508] @ (8007f18 <HAL_DMA_IRQHandler+0xc74>)
8007d1c: 4293 cmp r3, r2
8007d1e: d04a beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d20: 687b ldr r3, [r7, #4]
8007d22: 681b ldr r3, [r3, #0]
8007d24: 4a7d ldr r2, [pc, #500] @ (8007f1c <HAL_DMA_IRQHandler+0xc78>)
8007d26: 4293 cmp r3, r2
8007d28: d045 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d2a: 687b ldr r3, [r7, #4]
8007d2c: 681b ldr r3, [r3, #0]
8007d2e: 4a7c ldr r2, [pc, #496] @ (8007f20 <HAL_DMA_IRQHandler+0xc7c>)
8007d30: 4293 cmp r3, r2
8007d32: d040 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d34: 687b ldr r3, [r7, #4]
8007d36: 681b ldr r3, [r3, #0]
8007d38: 4a7a ldr r2, [pc, #488] @ (8007f24 <HAL_DMA_IRQHandler+0xc80>)
8007d3a: 4293 cmp r3, r2
8007d3c: d03b beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d3e: 687b ldr r3, [r7, #4]
8007d40: 681b ldr r3, [r3, #0]
8007d42: 4a79 ldr r2, [pc, #484] @ (8007f28 <HAL_DMA_IRQHandler+0xc84>)
8007d44: 4293 cmp r3, r2
8007d46: d036 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d48: 687b ldr r3, [r7, #4]
8007d4a: 681b ldr r3, [r3, #0]
8007d4c: 4a77 ldr r2, [pc, #476] @ (8007f2c <HAL_DMA_IRQHandler+0xc88>)
8007d4e: 4293 cmp r3, r2
8007d50: d031 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d52: 687b ldr r3, [r7, #4]
8007d54: 681b ldr r3, [r3, #0]
8007d56: 4a76 ldr r2, [pc, #472] @ (8007f30 <HAL_DMA_IRQHandler+0xc8c>)
8007d58: 4293 cmp r3, r2
8007d5a: d02c beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d5c: 687b ldr r3, [r7, #4]
8007d5e: 681b ldr r3, [r3, #0]
8007d60: 4a74 ldr r2, [pc, #464] @ (8007f34 <HAL_DMA_IRQHandler+0xc90>)
8007d62: 4293 cmp r3, r2
8007d64: d027 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d66: 687b ldr r3, [r7, #4]
8007d68: 681b ldr r3, [r3, #0]
8007d6a: 4a73 ldr r2, [pc, #460] @ (8007f38 <HAL_DMA_IRQHandler+0xc94>)
8007d6c: 4293 cmp r3, r2
8007d6e: d022 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d70: 687b ldr r3, [r7, #4]
8007d72: 681b ldr r3, [r3, #0]
8007d74: 4a71 ldr r2, [pc, #452] @ (8007f3c <HAL_DMA_IRQHandler+0xc98>)
8007d76: 4293 cmp r3, r2
8007d78: d01d beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d7a: 687b ldr r3, [r7, #4]
8007d7c: 681b ldr r3, [r3, #0]
8007d7e: 4a70 ldr r2, [pc, #448] @ (8007f40 <HAL_DMA_IRQHandler+0xc9c>)
8007d80: 4293 cmp r3, r2
8007d82: d018 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d84: 687b ldr r3, [r7, #4]
8007d86: 681b ldr r3, [r3, #0]
8007d88: 4a6e ldr r2, [pc, #440] @ (8007f44 <HAL_DMA_IRQHandler+0xca0>)
8007d8a: 4293 cmp r3, r2
8007d8c: d013 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d8e: 687b ldr r3, [r7, #4]
8007d90: 681b ldr r3, [r3, #0]
8007d92: 4a6d ldr r2, [pc, #436] @ (8007f48 <HAL_DMA_IRQHandler+0xca4>)
8007d94: 4293 cmp r3, r2
8007d96: d00e beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007d98: 687b ldr r3, [r7, #4]
8007d9a: 681b ldr r3, [r3, #0]
8007d9c: 4a6b ldr r2, [pc, #428] @ (8007f4c <HAL_DMA_IRQHandler+0xca8>)
8007d9e: 4293 cmp r3, r2
8007da0: d009 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007da2: 687b ldr r3, [r7, #4]
8007da4: 681b ldr r3, [r3, #0]
8007da6: 4a6a ldr r2, [pc, #424] @ (8007f50 <HAL_DMA_IRQHandler+0xcac>)
8007da8: 4293 cmp r3, r2
8007daa: d004 beq.n 8007db6 <HAL_DMA_IRQHandler+0xb12>
8007dac: 687b ldr r3, [r7, #4]
8007dae: 681b ldr r3, [r3, #0]
8007db0: 4a68 ldr r2, [pc, #416] @ (8007f54 <HAL_DMA_IRQHandler+0xcb0>)
8007db2: 4293 cmp r3, r2
8007db4: d108 bne.n 8007dc8 <HAL_DMA_IRQHandler+0xb24>
8007db6: 687b ldr r3, [r7, #4]
8007db8: 681b ldr r3, [r3, #0]
8007dba: 681a ldr r2, [r3, #0]
8007dbc: 687b ldr r3, [r7, #4]
8007dbe: 681b ldr r3, [r3, #0]
8007dc0: f022 0208 bic.w r2, r2, #8
8007dc4: 601a str r2, [r3, #0]
8007dc6: e007 b.n 8007dd8 <HAL_DMA_IRQHandler+0xb34>
8007dc8: 687b ldr r3, [r7, #4]
8007dca: 681b ldr r3, [r3, #0]
8007dcc: 681a ldr r2, [r3, #0]
8007dce: 687b ldr r3, [r7, #4]
8007dd0: 681b ldr r3, [r3, #0]
8007dd2: f022 0204 bic.w r2, r2, #4
8007dd6: 601a str r2, [r3, #0]
}
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
8007dd8: 687b ldr r3, [r7, #4]
8007dda: 6c1b ldr r3, [r3, #64] @ 0x40
8007ddc: 2b00 cmp r3, #0
8007dde: f000 8165 beq.w 80080ac <HAL_DMA_IRQHandler+0xe08>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
8007de2: 687b ldr r3, [r7, #4]
8007de4: 6c1b ldr r3, [r3, #64] @ 0x40
8007de6: 6878 ldr r0, [r7, #4]
8007de8: 4798 blx r3
if((ccr_reg & BDMA_CCR_DBM) != 0U)
8007dea: e15f b.n 80080ac <HAL_DMA_IRQHandler+0xe08>
}
}
}
/* Transfer Complete Interrupt management ***********************************/
else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TCIE) != 0U))
8007dec: 687b ldr r3, [r7, #4]
8007dee: 6ddb ldr r3, [r3, #92] @ 0x5c
8007df0: f003 031f and.w r3, r3, #31
8007df4: 2202 movs r2, #2
8007df6: 409a lsls r2, r3
8007df8: 697b ldr r3, [r7, #20]
8007dfa: 4013 ands r3, r2
8007dfc: 2b00 cmp r3, #0
8007dfe: f000 80c5 beq.w 8007f8c <HAL_DMA_IRQHandler+0xce8>
8007e02: 693b ldr r3, [r7, #16]
8007e04: f003 0302 and.w r3, r3, #2
8007e08: 2b00 cmp r3, #0
8007e0a: f000 80bf beq.w 8007f8c <HAL_DMA_IRQHandler+0xce8>
{
/* Clear the transfer complete flag */
regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU);
8007e0e: 687b ldr r3, [r7, #4]
8007e10: 6ddb ldr r3, [r3, #92] @ 0x5c
8007e12: f003 031f and.w r3, r3, #31
8007e16: 2202 movs r2, #2
8007e18: 409a lsls r2, r3
8007e1a: 69fb ldr r3, [r7, #28]
8007e1c: 605a str r2, [r3, #4]
/* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
if((ccr_reg & BDMA_CCR_DBM) != 0U)
8007e1e: 693b ldr r3, [r7, #16]
8007e20: f403 4300 and.w r3, r3, #32768 @ 0x8000
8007e24: 2b00 cmp r3, #0
8007e26: d018 beq.n 8007e5a <HAL_DMA_IRQHandler+0xbb6>
{
/* Current memory buffer used is Memory 0 */
if((ccr_reg & BDMA_CCR_CT) == 0U)
8007e28: 693b ldr r3, [r7, #16]
8007e2a: f403 3380 and.w r3, r3, #65536 @ 0x10000
8007e2e: 2b00 cmp r3, #0
8007e30: d109 bne.n 8007e46 <HAL_DMA_IRQHandler+0xba2>
{
if(hdma->XferM1CpltCallback != NULL)
8007e32: 687b ldr r3, [r7, #4]
8007e34: 6c5b ldr r3, [r3, #68] @ 0x44
8007e36: 2b00 cmp r3, #0
8007e38: f000 813a beq.w 80080b0 <HAL_DMA_IRQHandler+0xe0c>
{
/* Transfer complete Callback for Memory 1 */
hdma->XferM1CpltCallback(hdma);
8007e3c: 687b ldr r3, [r7, #4]
8007e3e: 6c5b ldr r3, [r3, #68] @ 0x44
8007e40: 6878 ldr r0, [r7, #4]
8007e42: 4798 blx r3
if((ccr_reg & BDMA_CCR_DBM) != 0U)
8007e44: e134 b.n 80080b0 <HAL_DMA_IRQHandler+0xe0c>
}
}
/* Current memory buffer used is Memory 1 */
else
{
if(hdma->XferCpltCallback != NULL)
8007e46: 687b ldr r3, [r7, #4]
8007e48: 6bdb ldr r3, [r3, #60] @ 0x3c
8007e4a: 2b00 cmp r3, #0
8007e4c: f000 8130 beq.w 80080b0 <HAL_DMA_IRQHandler+0xe0c>
{
/* Transfer complete Callback for Memory 0 */
hdma->XferCpltCallback(hdma);
8007e50: 687b ldr r3, [r7, #4]
8007e52: 6bdb ldr r3, [r3, #60] @ 0x3c
8007e54: 6878 ldr r0, [r7, #4]
8007e56: 4798 blx r3
if((ccr_reg & BDMA_CCR_DBM) != 0U)
8007e58: e12a b.n 80080b0 <HAL_DMA_IRQHandler+0xe0c>
}
}
}
else
{
if((ccr_reg & BDMA_CCR_CIRC) == 0U)
8007e5a: 693b ldr r3, [r7, #16]
8007e5c: f003 0320 and.w r3, r3, #32
8007e60: 2b00 cmp r3, #0
8007e62: f040 8089 bne.w 8007f78 <HAL_DMA_IRQHandler+0xcd4>
{
/* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
8007e66: 687b ldr r3, [r7, #4]
8007e68: 681b ldr r3, [r3, #0]
8007e6a: 4a2b ldr r2, [pc, #172] @ (8007f18 <HAL_DMA_IRQHandler+0xc74>)
8007e6c: 4293 cmp r3, r2
8007e6e: d04a beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007e70: 687b ldr r3, [r7, #4]
8007e72: 681b ldr r3, [r3, #0]
8007e74: 4a29 ldr r2, [pc, #164] @ (8007f1c <HAL_DMA_IRQHandler+0xc78>)
8007e76: 4293 cmp r3, r2
8007e78: d045 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007e7a: 687b ldr r3, [r7, #4]
8007e7c: 681b ldr r3, [r3, #0]
8007e7e: 4a28 ldr r2, [pc, #160] @ (8007f20 <HAL_DMA_IRQHandler+0xc7c>)
8007e80: 4293 cmp r3, r2
8007e82: d040 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007e84: 687b ldr r3, [r7, #4]
8007e86: 681b ldr r3, [r3, #0]
8007e88: 4a26 ldr r2, [pc, #152] @ (8007f24 <HAL_DMA_IRQHandler+0xc80>)
8007e8a: 4293 cmp r3, r2
8007e8c: d03b beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007e8e: 687b ldr r3, [r7, #4]
8007e90: 681b ldr r3, [r3, #0]
8007e92: 4a25 ldr r2, [pc, #148] @ (8007f28 <HAL_DMA_IRQHandler+0xc84>)
8007e94: 4293 cmp r3, r2
8007e96: d036 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007e98: 687b ldr r3, [r7, #4]
8007e9a: 681b ldr r3, [r3, #0]
8007e9c: 4a23 ldr r2, [pc, #140] @ (8007f2c <HAL_DMA_IRQHandler+0xc88>)
8007e9e: 4293 cmp r3, r2
8007ea0: d031 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007ea2: 687b ldr r3, [r7, #4]
8007ea4: 681b ldr r3, [r3, #0]
8007ea6: 4a22 ldr r2, [pc, #136] @ (8007f30 <HAL_DMA_IRQHandler+0xc8c>)
8007ea8: 4293 cmp r3, r2
8007eaa: d02c beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007eac: 687b ldr r3, [r7, #4]
8007eae: 681b ldr r3, [r3, #0]
8007eb0: 4a20 ldr r2, [pc, #128] @ (8007f34 <HAL_DMA_IRQHandler+0xc90>)
8007eb2: 4293 cmp r3, r2
8007eb4: d027 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007eb6: 687b ldr r3, [r7, #4]
8007eb8: 681b ldr r3, [r3, #0]
8007eba: 4a1f ldr r2, [pc, #124] @ (8007f38 <HAL_DMA_IRQHandler+0xc94>)
8007ebc: 4293 cmp r3, r2
8007ebe: d022 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007ec0: 687b ldr r3, [r7, #4]
8007ec2: 681b ldr r3, [r3, #0]
8007ec4: 4a1d ldr r2, [pc, #116] @ (8007f3c <HAL_DMA_IRQHandler+0xc98>)
8007ec6: 4293 cmp r3, r2
8007ec8: d01d beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007eca: 687b ldr r3, [r7, #4]
8007ecc: 681b ldr r3, [r3, #0]
8007ece: 4a1c ldr r2, [pc, #112] @ (8007f40 <HAL_DMA_IRQHandler+0xc9c>)
8007ed0: 4293 cmp r3, r2
8007ed2: d018 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007ed4: 687b ldr r3, [r7, #4]
8007ed6: 681b ldr r3, [r3, #0]
8007ed8: 4a1a ldr r2, [pc, #104] @ (8007f44 <HAL_DMA_IRQHandler+0xca0>)
8007eda: 4293 cmp r3, r2
8007edc: d013 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007ede: 687b ldr r3, [r7, #4]
8007ee0: 681b ldr r3, [r3, #0]
8007ee2: 4a19 ldr r2, [pc, #100] @ (8007f48 <HAL_DMA_IRQHandler+0xca4>)
8007ee4: 4293 cmp r3, r2
8007ee6: d00e beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007ee8: 687b ldr r3, [r7, #4]
8007eea: 681b ldr r3, [r3, #0]
8007eec: 4a17 ldr r2, [pc, #92] @ (8007f4c <HAL_DMA_IRQHandler+0xca8>)
8007eee: 4293 cmp r3, r2
8007ef0: d009 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007ef2: 687b ldr r3, [r7, #4]
8007ef4: 681b ldr r3, [r3, #0]
8007ef6: 4a16 ldr r2, [pc, #88] @ (8007f50 <HAL_DMA_IRQHandler+0xcac>)
8007ef8: 4293 cmp r3, r2
8007efa: d004 beq.n 8007f06 <HAL_DMA_IRQHandler+0xc62>
8007efc: 687b ldr r3, [r7, #4]
8007efe: 681b ldr r3, [r3, #0]
8007f00: 4a14 ldr r2, [pc, #80] @ (8007f54 <HAL_DMA_IRQHandler+0xcb0>)
8007f02: 4293 cmp r3, r2
8007f04: d128 bne.n 8007f58 <HAL_DMA_IRQHandler+0xcb4>
8007f06: 687b ldr r3, [r7, #4]
8007f08: 681b ldr r3, [r3, #0]
8007f0a: 681a ldr r2, [r3, #0]
8007f0c: 687b ldr r3, [r7, #4]
8007f0e: 681b ldr r3, [r3, #0]
8007f10: f022 0214 bic.w r2, r2, #20
8007f14: 601a str r2, [r3, #0]
8007f16: e027 b.n 8007f68 <HAL_DMA_IRQHandler+0xcc4>
8007f18: 40020010 .word 0x40020010
8007f1c: 40020028 .word 0x40020028
8007f20: 40020040 .word 0x40020040
8007f24: 40020058 .word 0x40020058
8007f28: 40020070 .word 0x40020070
8007f2c: 40020088 .word 0x40020088
8007f30: 400200a0 .word 0x400200a0
8007f34: 400200b8 .word 0x400200b8
8007f38: 40020410 .word 0x40020410
8007f3c: 40020428 .word 0x40020428
8007f40: 40020440 .word 0x40020440
8007f44: 40020458 .word 0x40020458
8007f48: 40020470 .word 0x40020470
8007f4c: 40020488 .word 0x40020488
8007f50: 400204a0 .word 0x400204a0
8007f54: 400204b8 .word 0x400204b8
8007f58: 687b ldr r3, [r7, #4]
8007f5a: 681b ldr r3, [r3, #0]
8007f5c: 681a ldr r2, [r3, #0]
8007f5e: 687b ldr r3, [r7, #4]
8007f60: 681b ldr r3, [r3, #0]
8007f62: f022 020a bic.w r2, r2, #10
8007f66: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8007f68: 687b ldr r3, [r7, #4]
8007f6a: 2201 movs r2, #1
8007f6c: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8007f70: 687b ldr r3, [r7, #4]
8007f72: 2200 movs r2, #0
8007f74: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
if(hdma->XferCpltCallback != NULL)
8007f78: 687b ldr r3, [r7, #4]
8007f7a: 6bdb ldr r3, [r3, #60] @ 0x3c
8007f7c: 2b00 cmp r3, #0
8007f7e: f000 8097 beq.w 80080b0 <HAL_DMA_IRQHandler+0xe0c>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8007f82: 687b ldr r3, [r7, #4]
8007f84: 6bdb ldr r3, [r3, #60] @ 0x3c
8007f86: 6878 ldr r0, [r7, #4]
8007f88: 4798 blx r3
if((ccr_reg & BDMA_CCR_DBM) != 0U)
8007f8a: e091 b.n 80080b0 <HAL_DMA_IRQHandler+0xe0c>
}
}
}
/* Transfer Error Interrupt management **************************************/
else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TEIE) != 0U))
8007f8c: 687b ldr r3, [r7, #4]
8007f8e: 6ddb ldr r3, [r3, #92] @ 0x5c
8007f90: f003 031f and.w r3, r3, #31
8007f94: 2208 movs r2, #8
8007f96: 409a lsls r2, r3
8007f98: 697b ldr r3, [r7, #20]
8007f9a: 4013 ands r3, r2
8007f9c: 2b00 cmp r3, #0
8007f9e: f000 8088 beq.w 80080b2 <HAL_DMA_IRQHandler+0xe0e>
8007fa2: 693b ldr r3, [r7, #16]
8007fa4: f003 0308 and.w r3, r3, #8
8007fa8: 2b00 cmp r3, #0
8007faa: f000 8082 beq.w 80080b2 <HAL_DMA_IRQHandler+0xe0e>
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
/* Disable ALL DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8007fae: 687b ldr r3, [r7, #4]
8007fb0: 681b ldr r3, [r3, #0]
8007fb2: 4a41 ldr r2, [pc, #260] @ (80080b8 <HAL_DMA_IRQHandler+0xe14>)
8007fb4: 4293 cmp r3, r2
8007fb6: d04a beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8007fb8: 687b ldr r3, [r7, #4]
8007fba: 681b ldr r3, [r3, #0]
8007fbc: 4a3f ldr r2, [pc, #252] @ (80080bc <HAL_DMA_IRQHandler+0xe18>)
8007fbe: 4293 cmp r3, r2
8007fc0: d045 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8007fc2: 687b ldr r3, [r7, #4]
8007fc4: 681b ldr r3, [r3, #0]
8007fc6: 4a3e ldr r2, [pc, #248] @ (80080c0 <HAL_DMA_IRQHandler+0xe1c>)
8007fc8: 4293 cmp r3, r2
8007fca: d040 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8007fcc: 687b ldr r3, [r7, #4]
8007fce: 681b ldr r3, [r3, #0]
8007fd0: 4a3c ldr r2, [pc, #240] @ (80080c4 <HAL_DMA_IRQHandler+0xe20>)
8007fd2: 4293 cmp r3, r2
8007fd4: d03b beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8007fd6: 687b ldr r3, [r7, #4]
8007fd8: 681b ldr r3, [r3, #0]
8007fda: 4a3b ldr r2, [pc, #236] @ (80080c8 <HAL_DMA_IRQHandler+0xe24>)
8007fdc: 4293 cmp r3, r2
8007fde: d036 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8007fe0: 687b ldr r3, [r7, #4]
8007fe2: 681b ldr r3, [r3, #0]
8007fe4: 4a39 ldr r2, [pc, #228] @ (80080cc <HAL_DMA_IRQHandler+0xe28>)
8007fe6: 4293 cmp r3, r2
8007fe8: d031 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8007fea: 687b ldr r3, [r7, #4]
8007fec: 681b ldr r3, [r3, #0]
8007fee: 4a38 ldr r2, [pc, #224] @ (80080d0 <HAL_DMA_IRQHandler+0xe2c>)
8007ff0: 4293 cmp r3, r2
8007ff2: d02c beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8007ff4: 687b ldr r3, [r7, #4]
8007ff6: 681b ldr r3, [r3, #0]
8007ff8: 4a36 ldr r2, [pc, #216] @ (80080d4 <HAL_DMA_IRQHandler+0xe30>)
8007ffa: 4293 cmp r3, r2
8007ffc: d027 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8007ffe: 687b ldr r3, [r7, #4]
8008000: 681b ldr r3, [r3, #0]
8008002: 4a35 ldr r2, [pc, #212] @ (80080d8 <HAL_DMA_IRQHandler+0xe34>)
8008004: 4293 cmp r3, r2
8008006: d022 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8008008: 687b ldr r3, [r7, #4]
800800a: 681b ldr r3, [r3, #0]
800800c: 4a33 ldr r2, [pc, #204] @ (80080dc <HAL_DMA_IRQHandler+0xe38>)
800800e: 4293 cmp r3, r2
8008010: d01d beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8008012: 687b ldr r3, [r7, #4]
8008014: 681b ldr r3, [r3, #0]
8008016: 4a32 ldr r2, [pc, #200] @ (80080e0 <HAL_DMA_IRQHandler+0xe3c>)
8008018: 4293 cmp r3, r2
800801a: d018 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
800801c: 687b ldr r3, [r7, #4]
800801e: 681b ldr r3, [r3, #0]
8008020: 4a30 ldr r2, [pc, #192] @ (80080e4 <HAL_DMA_IRQHandler+0xe40>)
8008022: 4293 cmp r3, r2
8008024: d013 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8008026: 687b ldr r3, [r7, #4]
8008028: 681b ldr r3, [r3, #0]
800802a: 4a2f ldr r2, [pc, #188] @ (80080e8 <HAL_DMA_IRQHandler+0xe44>)
800802c: 4293 cmp r3, r2
800802e: d00e beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8008030: 687b ldr r3, [r7, #4]
8008032: 681b ldr r3, [r3, #0]
8008034: 4a2d ldr r2, [pc, #180] @ (80080ec <HAL_DMA_IRQHandler+0xe48>)
8008036: 4293 cmp r3, r2
8008038: d009 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
800803a: 687b ldr r3, [r7, #4]
800803c: 681b ldr r3, [r3, #0]
800803e: 4a2c ldr r2, [pc, #176] @ (80080f0 <HAL_DMA_IRQHandler+0xe4c>)
8008040: 4293 cmp r3, r2
8008042: d004 beq.n 800804e <HAL_DMA_IRQHandler+0xdaa>
8008044: 687b ldr r3, [r7, #4]
8008046: 681b ldr r3, [r3, #0]
8008048: 4a2a ldr r2, [pc, #168] @ (80080f4 <HAL_DMA_IRQHandler+0xe50>)
800804a: 4293 cmp r3, r2
800804c: d108 bne.n 8008060 <HAL_DMA_IRQHandler+0xdbc>
800804e: 687b ldr r3, [r7, #4]
8008050: 681b ldr r3, [r3, #0]
8008052: 681a ldr r2, [r3, #0]
8008054: 687b ldr r3, [r7, #4]
8008056: 681b ldr r3, [r3, #0]
8008058: f022 021c bic.w r2, r2, #28
800805c: 601a str r2, [r3, #0]
800805e: e007 b.n 8008070 <HAL_DMA_IRQHandler+0xdcc>
8008060: 687b ldr r3, [r7, #4]
8008062: 681b ldr r3, [r3, #0]
8008064: 681a ldr r2, [r3, #0]
8008066: 687b ldr r3, [r7, #4]
8008068: 681b ldr r3, [r3, #0]
800806a: f022 020e bic.w r2, r2, #14
800806e: 601a str r2, [r3, #0]
/* Clear all flags */
regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);
8008070: 687b ldr r3, [r7, #4]
8008072: 6ddb ldr r3, [r3, #92] @ 0x5c
8008074: f003 031f and.w r3, r3, #31
8008078: 2201 movs r2, #1
800807a: 409a lsls r2, r3
800807c: 69fb ldr r3, [r7, #28]
800807e: 605a str r2, [r3, #4]
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
8008080: 687b ldr r3, [r7, #4]
8008082: 2201 movs r2, #1
8008084: 655a str r2, [r3, #84] @ 0x54
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8008086: 687b ldr r3, [r7, #4]
8008088: 2201 movs r2, #1
800808a: f883 2035 strb.w r2, [r3, #53] @ 0x35
/* Process Unlocked */
__HAL_UNLOCK(hdma);
800808e: 687b ldr r3, [r7, #4]
8008090: 2200 movs r2, #0
8008092: f883 2034 strb.w r2, [r3, #52] @ 0x34
if (hdma->XferErrorCallback != NULL)
8008096: 687b ldr r3, [r7, #4]
8008098: 6cdb ldr r3, [r3, #76] @ 0x4c
800809a: 2b00 cmp r3, #0
800809c: d009 beq.n 80080b2 <HAL_DMA_IRQHandler+0xe0e>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
800809e: 687b ldr r3, [r7, #4]
80080a0: 6cdb ldr r3, [r3, #76] @ 0x4c
80080a2: 6878 ldr r0, [r7, #4]
80080a4: 4798 blx r3
80080a6: e004 b.n 80080b2 <HAL_DMA_IRQHandler+0xe0e>
return;
80080a8: bf00 nop
80080aa: e002 b.n 80080b2 <HAL_DMA_IRQHandler+0xe0e>
if((ccr_reg & BDMA_CCR_DBM) != 0U)
80080ac: bf00 nop
80080ae: e000 b.n 80080b2 <HAL_DMA_IRQHandler+0xe0e>
if((ccr_reg & BDMA_CCR_DBM) != 0U)
80080b0: bf00 nop
}
else
{
/* Nothing To Do */
}
}
80080b2: 3728 adds r7, #40 @ 0x28
80080b4: 46bd mov sp, r7
80080b6: bd80 pop {r7, pc}
80080b8: 40020010 .word 0x40020010
80080bc: 40020028 .word 0x40020028
80080c0: 40020040 .word 0x40020040
80080c4: 40020058 .word 0x40020058
80080c8: 40020070 .word 0x40020070
80080cc: 40020088 .word 0x40020088
80080d0: 400200a0 .word 0x400200a0
80080d4: 400200b8 .word 0x400200b8
80080d8: 40020410 .word 0x40020410
80080dc: 40020428 .word 0x40020428
80080e0: 40020440 .word 0x40020440
80080e4: 40020458 .word 0x40020458
80080e8: 40020470 .word 0x40020470
80080ec: 40020488 .word 0x40020488
80080f0: 400204a0 .word 0x400204a0
80080f4: 400204b8 .word 0x400204b8
080080f8 <DMA_CalcBaseAndBitshift>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval Stream base address
*/
static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
{
80080f8: b480 push {r7}
80080fa: b085 sub sp, #20
80080fc: af00 add r7, sp, #0
80080fe: 6078 str r0, [r7, #4]
if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
8008100: 687b ldr r3, [r7, #4]
8008102: 681b ldr r3, [r3, #0]
8008104: 4a42 ldr r2, [pc, #264] @ (8008210 <DMA_CalcBaseAndBitshift+0x118>)
8008106: 4293 cmp r3, r2
8008108: d04a beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
800810a: 687b ldr r3, [r7, #4]
800810c: 681b ldr r3, [r3, #0]
800810e: 4a41 ldr r2, [pc, #260] @ (8008214 <DMA_CalcBaseAndBitshift+0x11c>)
8008110: 4293 cmp r3, r2
8008112: d045 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
8008114: 687b ldr r3, [r7, #4]
8008116: 681b ldr r3, [r3, #0]
8008118: 4a3f ldr r2, [pc, #252] @ (8008218 <DMA_CalcBaseAndBitshift+0x120>)
800811a: 4293 cmp r3, r2
800811c: d040 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
800811e: 687b ldr r3, [r7, #4]
8008120: 681b ldr r3, [r3, #0]
8008122: 4a3e ldr r2, [pc, #248] @ (800821c <DMA_CalcBaseAndBitshift+0x124>)
8008124: 4293 cmp r3, r2
8008126: d03b beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
8008128: 687b ldr r3, [r7, #4]
800812a: 681b ldr r3, [r3, #0]
800812c: 4a3c ldr r2, [pc, #240] @ (8008220 <DMA_CalcBaseAndBitshift+0x128>)
800812e: 4293 cmp r3, r2
8008130: d036 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
8008132: 687b ldr r3, [r7, #4]
8008134: 681b ldr r3, [r3, #0]
8008136: 4a3b ldr r2, [pc, #236] @ (8008224 <DMA_CalcBaseAndBitshift+0x12c>)
8008138: 4293 cmp r3, r2
800813a: d031 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
800813c: 687b ldr r3, [r7, #4]
800813e: 681b ldr r3, [r3, #0]
8008140: 4a39 ldr r2, [pc, #228] @ (8008228 <DMA_CalcBaseAndBitshift+0x130>)
8008142: 4293 cmp r3, r2
8008144: d02c beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
8008146: 687b ldr r3, [r7, #4]
8008148: 681b ldr r3, [r3, #0]
800814a: 4a38 ldr r2, [pc, #224] @ (800822c <DMA_CalcBaseAndBitshift+0x134>)
800814c: 4293 cmp r3, r2
800814e: d027 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
8008150: 687b ldr r3, [r7, #4]
8008152: 681b ldr r3, [r3, #0]
8008154: 4a36 ldr r2, [pc, #216] @ (8008230 <DMA_CalcBaseAndBitshift+0x138>)
8008156: 4293 cmp r3, r2
8008158: d022 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
800815a: 687b ldr r3, [r7, #4]
800815c: 681b ldr r3, [r3, #0]
800815e: 4a35 ldr r2, [pc, #212] @ (8008234 <DMA_CalcBaseAndBitshift+0x13c>)
8008160: 4293 cmp r3, r2
8008162: d01d beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
8008164: 687b ldr r3, [r7, #4]
8008166: 681b ldr r3, [r3, #0]
8008168: 4a33 ldr r2, [pc, #204] @ (8008238 <DMA_CalcBaseAndBitshift+0x140>)
800816a: 4293 cmp r3, r2
800816c: d018 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
800816e: 687b ldr r3, [r7, #4]
8008170: 681b ldr r3, [r3, #0]
8008172: 4a32 ldr r2, [pc, #200] @ (800823c <DMA_CalcBaseAndBitshift+0x144>)
8008174: 4293 cmp r3, r2
8008176: d013 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
8008178: 687b ldr r3, [r7, #4]
800817a: 681b ldr r3, [r3, #0]
800817c: 4a30 ldr r2, [pc, #192] @ (8008240 <DMA_CalcBaseAndBitshift+0x148>)
800817e: 4293 cmp r3, r2
8008180: d00e beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
8008182: 687b ldr r3, [r7, #4]
8008184: 681b ldr r3, [r3, #0]
8008186: 4a2f ldr r2, [pc, #188] @ (8008244 <DMA_CalcBaseAndBitshift+0x14c>)
8008188: 4293 cmp r3, r2
800818a: d009 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
800818c: 687b ldr r3, [r7, #4]
800818e: 681b ldr r3, [r3, #0]
8008190: 4a2d ldr r2, [pc, #180] @ (8008248 <DMA_CalcBaseAndBitshift+0x150>)
8008192: 4293 cmp r3, r2
8008194: d004 beq.n 80081a0 <DMA_CalcBaseAndBitshift+0xa8>
8008196: 687b ldr r3, [r7, #4]
8008198: 681b ldr r3, [r3, #0]
800819a: 4a2c ldr r2, [pc, #176] @ (800824c <DMA_CalcBaseAndBitshift+0x154>)
800819c: 4293 cmp r3, r2
800819e: d101 bne.n 80081a4 <DMA_CalcBaseAndBitshift+0xac>
80081a0: 2301 movs r3, #1
80081a2: e000 b.n 80081a6 <DMA_CalcBaseAndBitshift+0xae>
80081a4: 2300 movs r3, #0
80081a6: 2b00 cmp r3, #0
80081a8: d024 beq.n 80081f4 <DMA_CalcBaseAndBitshift+0xfc>
{
uint32_t stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
80081aa: 687b ldr r3, [r7, #4]
80081ac: 681b ldr r3, [r3, #0]
80081ae: b2db uxtb r3, r3
80081b0: 3b10 subs r3, #16
80081b2: 4a27 ldr r2, [pc, #156] @ (8008250 <DMA_CalcBaseAndBitshift+0x158>)
80081b4: fba2 2303 umull r2, r3, r2, r3
80081b8: 091b lsrs r3, r3, #4
80081ba: 60fb str r3, [r7, #12]
/* lookup table for necessary bitshift of flags within status registers */
static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U];
80081bc: 68fb ldr r3, [r7, #12]
80081be: f003 0307 and.w r3, r3, #7
80081c2: 4a24 ldr r2, [pc, #144] @ (8008254 <DMA_CalcBaseAndBitshift+0x15c>)
80081c4: 5cd3 ldrb r3, [r2, r3]
80081c6: 461a mov r2, r3
80081c8: 687b ldr r3, [r7, #4]
80081ca: 65da str r2, [r3, #92] @ 0x5c
if (stream_number > 3U)
80081cc: 68fb ldr r3, [r7, #12]
80081ce: 2b03 cmp r3, #3
80081d0: d908 bls.n 80081e4 <DMA_CalcBaseAndBitshift+0xec>
{
/* return pointer to HISR and HIFCR */
hdma->StreamBaseAddress = (((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)) + 4U);
80081d2: 687b ldr r3, [r7, #4]
80081d4: 681b ldr r3, [r3, #0]
80081d6: 461a mov r2, r3
80081d8: 4b1f ldr r3, [pc, #124] @ (8008258 <DMA_CalcBaseAndBitshift+0x160>)
80081da: 4013 ands r3, r2
80081dc: 1d1a adds r2, r3, #4
80081de: 687b ldr r3, [r7, #4]
80081e0: 659a str r2, [r3, #88] @ 0x58
80081e2: e00d b.n 8008200 <DMA_CalcBaseAndBitshift+0x108>
}
else
{
/* return pointer to LISR and LIFCR */
hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU));
80081e4: 687b ldr r3, [r7, #4]
80081e6: 681b ldr r3, [r3, #0]
80081e8: 461a mov r2, r3
80081ea: 4b1b ldr r3, [pc, #108] @ (8008258 <DMA_CalcBaseAndBitshift+0x160>)
80081ec: 4013 ands r3, r2
80081ee: 687a ldr r2, [r7, #4]
80081f0: 6593 str r3, [r2, #88] @ 0x58
80081f2: e005 b.n 8008200 <DMA_CalcBaseAndBitshift+0x108>
}
}
else /* BDMA instance(s) */
{
/* return pointer to ISR and IFCR */
hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0xFFU));
80081f4: 687b ldr r3, [r7, #4]
80081f6: 681b ldr r3, [r3, #0]
80081f8: f023 02ff bic.w r2, r3, #255 @ 0xff
80081fc: 687b ldr r3, [r7, #4]
80081fe: 659a str r2, [r3, #88] @ 0x58
}
return hdma->StreamBaseAddress;
8008200: 687b ldr r3, [r7, #4]
8008202: 6d9b ldr r3, [r3, #88] @ 0x58
}
8008204: 4618 mov r0, r3
8008206: 3714 adds r7, #20
8008208: 46bd mov sp, r7
800820a: f85d 7b04 ldr.w r7, [sp], #4
800820e: 4770 bx lr
8008210: 40020010 .word 0x40020010
8008214: 40020028 .word 0x40020028
8008218: 40020040 .word 0x40020040
800821c: 40020058 .word 0x40020058
8008220: 40020070 .word 0x40020070
8008224: 40020088 .word 0x40020088
8008228: 400200a0 .word 0x400200a0
800822c: 400200b8 .word 0x400200b8
8008230: 40020410 .word 0x40020410
8008234: 40020428 .word 0x40020428
8008238: 40020440 .word 0x40020440
800823c: 40020458 .word 0x40020458
8008240: 40020470 .word 0x40020470
8008244: 40020488 .word 0x40020488
8008248: 400204a0 .word 0x400204a0
800824c: 400204b8 .word 0x400204b8
8008250: aaaaaaab .word 0xaaaaaaab
8008254: 08031cec .word 0x08031cec
8008258: fffffc00 .word 0xfffffc00
0800825c <DMA_CheckFifoParam>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
{
800825c: b480 push {r7}
800825e: b085 sub sp, #20
8008260: af00 add r7, sp, #0
8008262: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8008264: 2300 movs r3, #0
8008266: 73fb strb r3, [r7, #15]
/* Memory Data size equal to Byte */
if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
8008268: 687b ldr r3, [r7, #4]
800826a: 699b ldr r3, [r3, #24]
800826c: 2b00 cmp r3, #0
800826e: d120 bne.n 80082b2 <DMA_CheckFifoParam+0x56>
{
switch (hdma->Init.FIFOThreshold)
8008270: 687b ldr r3, [r7, #4]
8008272: 6a9b ldr r3, [r3, #40] @ 0x28
8008274: 2b03 cmp r3, #3
8008276: d858 bhi.n 800832a <DMA_CheckFifoParam+0xce>
8008278: a201 add r2, pc, #4 @ (adr r2, 8008280 <DMA_CheckFifoParam+0x24>)
800827a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800827e: bf00 nop
8008280: 08008291 .word 0x08008291
8008284: 080082a3 .word 0x080082a3
8008288: 08008291 .word 0x08008291
800828c: 0800832b .word 0x0800832b
{
case DMA_FIFO_THRESHOLD_1QUARTERFULL:
case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
8008290: 687b ldr r3, [r7, #4]
8008292: 6adb ldr r3, [r3, #44] @ 0x2c
8008294: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
8008298: 2b00 cmp r3, #0
800829a: d048 beq.n 800832e <DMA_CheckFifoParam+0xd2>
{
status = HAL_ERROR;
800829c: 2301 movs r3, #1
800829e: 73fb strb r3, [r7, #15]
}
break;
80082a0: e045 b.n 800832e <DMA_CheckFifoParam+0xd2>
case DMA_FIFO_THRESHOLD_HALFFULL:
if (hdma->Init.MemBurst == DMA_MBURST_INC16)
80082a2: 687b ldr r3, [r7, #4]
80082a4: 6adb ldr r3, [r3, #44] @ 0x2c
80082a6: f1b3 7fc0 cmp.w r3, #25165824 @ 0x1800000
80082aa: d142 bne.n 8008332 <DMA_CheckFifoParam+0xd6>
{
status = HAL_ERROR;
80082ac: 2301 movs r3, #1
80082ae: 73fb strb r3, [r7, #15]
}
break;
80082b0: e03f b.n 8008332 <DMA_CheckFifoParam+0xd6>
break;
}
}
/* Memory Data size equal to Half-Word */
else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
80082b2: 687b ldr r3, [r7, #4]
80082b4: 699b ldr r3, [r3, #24]
80082b6: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
80082ba: d123 bne.n 8008304 <DMA_CheckFifoParam+0xa8>
{
switch (hdma->Init.FIFOThreshold)
80082bc: 687b ldr r3, [r7, #4]
80082be: 6a9b ldr r3, [r3, #40] @ 0x28
80082c0: 2b03 cmp r3, #3
80082c2: d838 bhi.n 8008336 <DMA_CheckFifoParam+0xda>
80082c4: a201 add r2, pc, #4 @ (adr r2, 80082cc <DMA_CheckFifoParam+0x70>)
80082c6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80082ca: bf00 nop
80082cc: 080082dd .word 0x080082dd
80082d0: 080082e3 .word 0x080082e3
80082d4: 080082dd .word 0x080082dd
80082d8: 080082f5 .word 0x080082f5
{
case DMA_FIFO_THRESHOLD_1QUARTERFULL:
case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
status = HAL_ERROR;
80082dc: 2301 movs r3, #1
80082de: 73fb strb r3, [r7, #15]
break;
80082e0: e030 b.n 8008344 <DMA_CheckFifoParam+0xe8>
case DMA_FIFO_THRESHOLD_HALFFULL:
if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
80082e2: 687b ldr r3, [r7, #4]
80082e4: 6adb ldr r3, [r3, #44] @ 0x2c
80082e6: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
80082ea: 2b00 cmp r3, #0
80082ec: d025 beq.n 800833a <DMA_CheckFifoParam+0xde>
{
status = HAL_ERROR;
80082ee: 2301 movs r3, #1
80082f0: 73fb strb r3, [r7, #15]
}
break;
80082f2: e022 b.n 800833a <DMA_CheckFifoParam+0xde>
case DMA_FIFO_THRESHOLD_FULL:
if (hdma->Init.MemBurst == DMA_MBURST_INC16)
80082f4: 687b ldr r3, [r7, #4]
80082f6: 6adb ldr r3, [r3, #44] @ 0x2c
80082f8: f1b3 7fc0 cmp.w r3, #25165824 @ 0x1800000
80082fc: d11f bne.n 800833e <DMA_CheckFifoParam+0xe2>
{
status = HAL_ERROR;
80082fe: 2301 movs r3, #1
8008300: 73fb strb r3, [r7, #15]
}
break;
8008302: e01c b.n 800833e <DMA_CheckFifoParam+0xe2>
}
/* Memory Data size equal to Word */
else
{
switch (hdma->Init.FIFOThreshold)
8008304: 687b ldr r3, [r7, #4]
8008306: 6a9b ldr r3, [r3, #40] @ 0x28
8008308: 2b02 cmp r3, #2
800830a: d902 bls.n 8008312 <DMA_CheckFifoParam+0xb6>
800830c: 2b03 cmp r3, #3
800830e: d003 beq.n 8008318 <DMA_CheckFifoParam+0xbc>
status = HAL_ERROR;
}
break;
default:
break;
8008310: e018 b.n 8008344 <DMA_CheckFifoParam+0xe8>
status = HAL_ERROR;
8008312: 2301 movs r3, #1
8008314: 73fb strb r3, [r7, #15]
break;
8008316: e015 b.n 8008344 <DMA_CheckFifoParam+0xe8>
if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
8008318: 687b ldr r3, [r7, #4]
800831a: 6adb ldr r3, [r3, #44] @ 0x2c
800831c: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
8008320: 2b00 cmp r3, #0
8008322: d00e beq.n 8008342 <DMA_CheckFifoParam+0xe6>
status = HAL_ERROR;
8008324: 2301 movs r3, #1
8008326: 73fb strb r3, [r7, #15]
break;
8008328: e00b b.n 8008342 <DMA_CheckFifoParam+0xe6>
break;
800832a: bf00 nop
800832c: e00a b.n 8008344 <DMA_CheckFifoParam+0xe8>
break;
800832e: bf00 nop
8008330: e008 b.n 8008344 <DMA_CheckFifoParam+0xe8>
break;
8008332: bf00 nop
8008334: e006 b.n 8008344 <DMA_CheckFifoParam+0xe8>
break;
8008336: bf00 nop
8008338: e004 b.n 8008344 <DMA_CheckFifoParam+0xe8>
break;
800833a: bf00 nop
800833c: e002 b.n 8008344 <DMA_CheckFifoParam+0xe8>
break;
800833e: bf00 nop
8008340: e000 b.n 8008344 <DMA_CheckFifoParam+0xe8>
break;
8008342: bf00 nop
}
}
return status;
8008344: 7bfb ldrb r3, [r7, #15]
}
8008346: 4618 mov r0, r3
8008348: 3714 adds r7, #20
800834a: 46bd mov sp, r7
800834c: f85d 7b04 ldr.w r7, [sp], #4
8008350: 4770 bx lr
8008352: bf00 nop
08008354 <DMA_CalcDMAMUXChannelBaseAndMask>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)
{
8008354: b480 push {r7}
8008356: b085 sub sp, #20
8008358: af00 add r7, sp, #0
800835a: 6078 str r0, [r7, #4]
uint32_t stream_number;
uint32_t stream_baseaddress = (uint32_t)((uint32_t*)hdma->Instance);
800835c: 687b ldr r3, [r7, #4]
800835e: 681b ldr r3, [r3, #0]
8008360: 60bb str r3, [r7, #8]
if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
8008362: 687b ldr r3, [r7, #4]
8008364: 681b ldr r3, [r3, #0]
8008366: 4a38 ldr r2, [pc, #224] @ (8008448 <DMA_CalcDMAMUXChannelBaseAndMask+0xf4>)
8008368: 4293 cmp r3, r2
800836a: d022 beq.n 80083b2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
800836c: 687b ldr r3, [r7, #4]
800836e: 681b ldr r3, [r3, #0]
8008370: 4a36 ldr r2, [pc, #216] @ (800844c <DMA_CalcDMAMUXChannelBaseAndMask+0xf8>)
8008372: 4293 cmp r3, r2
8008374: d01d beq.n 80083b2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
8008376: 687b ldr r3, [r7, #4]
8008378: 681b ldr r3, [r3, #0]
800837a: 4a35 ldr r2, [pc, #212] @ (8008450 <DMA_CalcDMAMUXChannelBaseAndMask+0xfc>)
800837c: 4293 cmp r3, r2
800837e: d018 beq.n 80083b2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
8008380: 687b ldr r3, [r7, #4]
8008382: 681b ldr r3, [r3, #0]
8008384: 4a33 ldr r2, [pc, #204] @ (8008454 <DMA_CalcDMAMUXChannelBaseAndMask+0x100>)
8008386: 4293 cmp r3, r2
8008388: d013 beq.n 80083b2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
800838a: 687b ldr r3, [r7, #4]
800838c: 681b ldr r3, [r3, #0]
800838e: 4a32 ldr r2, [pc, #200] @ (8008458 <DMA_CalcDMAMUXChannelBaseAndMask+0x104>)
8008390: 4293 cmp r3, r2
8008392: d00e beq.n 80083b2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
8008394: 687b ldr r3, [r7, #4]
8008396: 681b ldr r3, [r3, #0]
8008398: 4a30 ldr r2, [pc, #192] @ (800845c <DMA_CalcDMAMUXChannelBaseAndMask+0x108>)
800839a: 4293 cmp r3, r2
800839c: d009 beq.n 80083b2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
800839e: 687b ldr r3, [r7, #4]
80083a0: 681b ldr r3, [r3, #0]
80083a2: 4a2f ldr r2, [pc, #188] @ (8008460 <DMA_CalcDMAMUXChannelBaseAndMask+0x10c>)
80083a4: 4293 cmp r3, r2
80083a6: d004 beq.n 80083b2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
80083a8: 687b ldr r3, [r7, #4]
80083aa: 681b ldr r3, [r3, #0]
80083ac: 4a2d ldr r2, [pc, #180] @ (8008464 <DMA_CalcDMAMUXChannelBaseAndMask+0x110>)
80083ae: 4293 cmp r3, r2
80083b0: d101 bne.n 80083b6 <DMA_CalcDMAMUXChannelBaseAndMask+0x62>
80083b2: 2301 movs r3, #1
80083b4: e000 b.n 80083b8 <DMA_CalcDMAMUXChannelBaseAndMask+0x64>
80083b6: 2300 movs r3, #0
80083b8: 2b00 cmp r3, #0
80083ba: d01a beq.n 80083f2 <DMA_CalcDMAMUXChannelBaseAndMask+0x9e>
{
/* BDMA Channels are connected to DMAMUX2 channels */
stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 8U) / 20U;
80083bc: 687b ldr r3, [r7, #4]
80083be: 681b ldr r3, [r3, #0]
80083c0: b2db uxtb r3, r3
80083c2: 3b08 subs r3, #8
80083c4: 4a28 ldr r2, [pc, #160] @ (8008468 <DMA_CalcDMAMUXChannelBaseAndMask+0x114>)
80083c6: fba2 2303 umull r2, r3, r2, r3
80083ca: 091b lsrs r3, r3, #4
80083cc: 60fb str r3, [r7, #12]
hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_Channel0) + (stream_number * 4U)));
80083ce: 68fa ldr r2, [r7, #12]
80083d0: 4b26 ldr r3, [pc, #152] @ (800846c <DMA_CalcDMAMUXChannelBaseAndMask+0x118>)
80083d2: 4413 add r3, r2
80083d4: 009b lsls r3, r3, #2
80083d6: 461a mov r2, r3
80083d8: 687b ldr r3, [r7, #4]
80083da: 661a str r2, [r3, #96] @ 0x60
hdma->DMAmuxChannelStatus = DMAMUX2_ChannelStatus;
80083dc: 687b ldr r3, [r7, #4]
80083de: 4a24 ldr r2, [pc, #144] @ (8008470 <DMA_CalcDMAMUXChannelBaseAndMask+0x11c>)
80083e0: 665a str r2, [r3, #100] @ 0x64
hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
80083e2: 68fb ldr r3, [r7, #12]
80083e4: f003 031f and.w r3, r3, #31
80083e8: 2201 movs r2, #1
80083ea: 409a lsls r2, r3
80083ec: 687b ldr r3, [r7, #4]
80083ee: 669a str r2, [r3, #104] @ 0x68
}
hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
}
}
80083f0: e024 b.n 800843c <DMA_CalcDMAMUXChannelBaseAndMask+0xe8>
stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
80083f2: 687b ldr r3, [r7, #4]
80083f4: 681b ldr r3, [r3, #0]
80083f6: b2db uxtb r3, r3
80083f8: 3b10 subs r3, #16
80083fa: 4a1e ldr r2, [pc, #120] @ (8008474 <DMA_CalcDMAMUXChannelBaseAndMask+0x120>)
80083fc: fba2 2303 umull r2, r3, r2, r3
8008400: 091b lsrs r3, r3, #4
8008402: 60fb str r3, [r7, #12]
if((stream_baseaddress <= ((uint32_t)DMA2_Stream7) ) && \
8008404: 68bb ldr r3, [r7, #8]
8008406: 4a1c ldr r2, [pc, #112] @ (8008478 <DMA_CalcDMAMUXChannelBaseAndMask+0x124>)
8008408: 4293 cmp r3, r2
800840a: d806 bhi.n 800841a <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
800840c: 68bb ldr r3, [r7, #8]
800840e: 4a1b ldr r2, [pc, #108] @ (800847c <DMA_CalcDMAMUXChannelBaseAndMask+0x128>)
8008410: 4293 cmp r3, r2
8008412: d902 bls.n 800841a <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
stream_number += 8U;
8008414: 68fb ldr r3, [r7, #12]
8008416: 3308 adds r3, #8
8008418: 60fb str r3, [r7, #12]
hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
800841a: 68fa ldr r2, [r7, #12]
800841c: 4b18 ldr r3, [pc, #96] @ (8008480 <DMA_CalcDMAMUXChannelBaseAndMask+0x12c>)
800841e: 4413 add r3, r2
8008420: 009b lsls r3, r3, #2
8008422: 461a mov r2, r3
8008424: 687b ldr r3, [r7, #4]
8008426: 661a str r2, [r3, #96] @ 0x60
hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
8008428: 687b ldr r3, [r7, #4]
800842a: 4a16 ldr r2, [pc, #88] @ (8008484 <DMA_CalcDMAMUXChannelBaseAndMask+0x130>)
800842c: 665a str r2, [r3, #100] @ 0x64
hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
800842e: 68fb ldr r3, [r7, #12]
8008430: f003 031f and.w r3, r3, #31
8008434: 2201 movs r2, #1
8008436: 409a lsls r2, r3
8008438: 687b ldr r3, [r7, #4]
800843a: 669a str r2, [r3, #104] @ 0x68
}
800843c: bf00 nop
800843e: 3714 adds r7, #20
8008440: 46bd mov sp, r7
8008442: f85d 7b04 ldr.w r7, [sp], #4
8008446: 4770 bx lr
8008448: 58025408 .word 0x58025408
800844c: 5802541c .word 0x5802541c
8008450: 58025430 .word 0x58025430
8008454: 58025444 .word 0x58025444
8008458: 58025458 .word 0x58025458
800845c: 5802546c .word 0x5802546c
8008460: 58025480 .word 0x58025480
8008464: 58025494 .word 0x58025494
8008468: cccccccd .word 0xcccccccd
800846c: 16009600 .word 0x16009600
8008470: 58025880 .word 0x58025880
8008474: aaaaaaab .word 0xaaaaaaab
8008478: 400204b8 .word 0x400204b8
800847c: 4002040f .word 0x4002040f
8008480: 10008200 .word 0x10008200
8008484: 40020880 .word 0x40020880
08008488 <DMA_CalcDMAMUXRequestGenBaseAndMask>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Stream.
* @retval HAL status
*/
static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
{
8008488: b480 push {r7}
800848a: b085 sub sp, #20
800848c: af00 add r7, sp, #0
800848e: 6078 str r0, [r7, #4]
uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;
8008490: 687b ldr r3, [r7, #4]
8008492: 685b ldr r3, [r3, #4]
8008494: b2db uxtb r3, r3
8008496: 60fb str r3, [r7, #12]
if((request >= DMA_REQUEST_GENERATOR0) && (request <= DMA_REQUEST_GENERATOR7))
8008498: 68fb ldr r3, [r7, #12]
800849a: 2b00 cmp r3, #0
800849c: d04a beq.n 8008534 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
800849e: 68fb ldr r3, [r7, #12]
80084a0: 2b08 cmp r3, #8
80084a2: d847 bhi.n 8008534 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
{
if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
80084a4: 687b ldr r3, [r7, #4]
80084a6: 681b ldr r3, [r3, #0]
80084a8: 4a25 ldr r2, [pc, #148] @ (8008540 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xb8>)
80084aa: 4293 cmp r3, r2
80084ac: d022 beq.n 80084f4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
80084ae: 687b ldr r3, [r7, #4]
80084b0: 681b ldr r3, [r3, #0]
80084b2: 4a24 ldr r2, [pc, #144] @ (8008544 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xbc>)
80084b4: 4293 cmp r3, r2
80084b6: d01d beq.n 80084f4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
80084b8: 687b ldr r3, [r7, #4]
80084ba: 681b ldr r3, [r3, #0]
80084bc: 4a22 ldr r2, [pc, #136] @ (8008548 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc0>)
80084be: 4293 cmp r3, r2
80084c0: d018 beq.n 80084f4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
80084c2: 687b ldr r3, [r7, #4]
80084c4: 681b ldr r3, [r3, #0]
80084c6: 4a21 ldr r2, [pc, #132] @ (800854c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc4>)
80084c8: 4293 cmp r3, r2
80084ca: d013 beq.n 80084f4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
80084cc: 687b ldr r3, [r7, #4]
80084ce: 681b ldr r3, [r3, #0]
80084d0: 4a1f ldr r2, [pc, #124] @ (8008550 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc8>)
80084d2: 4293 cmp r3, r2
80084d4: d00e beq.n 80084f4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
80084d6: 687b ldr r3, [r7, #4]
80084d8: 681b ldr r3, [r3, #0]
80084da: 4a1e ldr r2, [pc, #120] @ (8008554 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xcc>)
80084dc: 4293 cmp r3, r2
80084de: d009 beq.n 80084f4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
80084e0: 687b ldr r3, [r7, #4]
80084e2: 681b ldr r3, [r3, #0]
80084e4: 4a1c ldr r2, [pc, #112] @ (8008558 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd0>)
80084e6: 4293 cmp r3, r2
80084e8: d004 beq.n 80084f4 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
80084ea: 687b ldr r3, [r7, #4]
80084ec: 681b ldr r3, [r3, #0]
80084ee: 4a1b ldr r2, [pc, #108] @ (800855c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd4>)
80084f0: 4293 cmp r3, r2
80084f2: d101 bne.n 80084f8 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x70>
80084f4: 2301 movs r3, #1
80084f6: e000 b.n 80084fa <DMA_CalcDMAMUXRequestGenBaseAndMask+0x72>
80084f8: 2300 movs r3, #0
80084fa: 2b00 cmp r3, #0
80084fc: d00a beq.n 8008514 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x8c>
{
/* BDMA Channels are connected to DMAMUX2 request generator blocks */
hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_RequestGenerator0) + ((request - 1U) * 4U)));
80084fe: 68fa ldr r2, [r7, #12]
8008500: 4b17 ldr r3, [pc, #92] @ (8008560 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd8>)
8008502: 4413 add r3, r2
8008504: 009b lsls r3, r3, #2
8008506: 461a mov r2, r3
8008508: 687b ldr r3, [r7, #4]
800850a: 66da str r2, [r3, #108] @ 0x6c
hdma->DMAmuxRequestGenStatus = DMAMUX2_RequestGenStatus;
800850c: 687b ldr r3, [r7, #4]
800850e: 4a15 ldr r2, [pc, #84] @ (8008564 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xdc>)
8008510: 671a str r2, [r3, #112] @ 0x70
8008512: e009 b.n 8008528 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xa0>
}
else
{
/* DMA1 and DMA2 Streams use DMAMUX1 request generator blocks */
hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U)));
8008514: 68fa ldr r2, [r7, #12]
8008516: 4b14 ldr r3, [pc, #80] @ (8008568 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe0>)
8008518: 4413 add r3, r2
800851a: 009b lsls r3, r3, #2
800851c: 461a mov r2, r3
800851e: 687b ldr r3, [r7, #4]
8008520: 66da str r2, [r3, #108] @ 0x6c
hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;
8008522: 687b ldr r3, [r7, #4]
8008524: 4a11 ldr r2, [pc, #68] @ (800856c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe4>)
8008526: 671a str r2, [r3, #112] @ 0x70
}
hdma->DMAmuxRequestGenStatusMask = 1UL << (request - 1U);
8008528: 68fb ldr r3, [r7, #12]
800852a: 3b01 subs r3, #1
800852c: 2201 movs r2, #1
800852e: 409a lsls r2, r3
8008530: 687b ldr r3, [r7, #4]
8008532: 675a str r2, [r3, #116] @ 0x74
}
}
8008534: bf00 nop
8008536: 3714 adds r7, #20
8008538: 46bd mov sp, r7
800853a: f85d 7b04 ldr.w r7, [sp], #4
800853e: 4770 bx lr
8008540: 58025408 .word 0x58025408
8008544: 5802541c .word 0x5802541c
8008548: 58025430 .word 0x58025430
800854c: 58025444 .word 0x58025444
8008550: 58025458 .word 0x58025458
8008554: 5802546c .word 0x5802546c
8008558: 58025480 .word 0x58025480
800855c: 58025494 .word 0x58025494
8008560: 1600963f .word 0x1600963f
8008564: 58025940 .word 0x58025940
8008568: 1000823f .word 0x1000823f
800856c: 40020940 .word 0x40020940
08008570 <HAL_ETH_Init>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
8008570: b580 push {r7, lr}
8008572: b084 sub sp, #16
8008574: af00 add r7, sp, #0
8008576: 6078 str r0, [r7, #4]
uint32_t tickstart;
if (heth == NULL)
8008578: 687b ldr r3, [r7, #4]
800857a: 2b00 cmp r3, #0
800857c: d101 bne.n 8008582 <HAL_ETH_Init+0x12>
{
return HAL_ERROR;
800857e: 2301 movs r3, #1
8008580: e0e3 b.n 800874a <HAL_ETH_Init+0x1da>
}
if (heth->gState == HAL_ETH_STATE_RESET)
8008582: 687b ldr r3, [r7, #4]
8008584: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
8008588: 2b00 cmp r3, #0
800858a: d106 bne.n 800859a <HAL_ETH_Init+0x2a>
{
heth->gState = HAL_ETH_STATE_BUSY;
800858c: 687b ldr r3, [r7, #4]
800858e: 2223 movs r2, #35 @ 0x23
8008590: f8c3 2084 str.w r2, [r3, #132] @ 0x84
/* Init the low level hardware */
heth->MspInitCallback(heth);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC. */
HAL_ETH_MspInit(heth);
8008594: 6878 ldr r0, [r7, #4]
8008596: f008 fb89 bl 8010cac <HAL_ETH_MspInit>
#endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */
}
__HAL_RCC_SYSCFG_CLK_ENABLE();
800859a: 4b6e ldr r3, [pc, #440] @ (8008754 <HAL_ETH_Init+0x1e4>)
800859c: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
80085a0: 4a6c ldr r2, [pc, #432] @ (8008754 <HAL_ETH_Init+0x1e4>)
80085a2: f043 0302 orr.w r3, r3, #2
80085a6: f8c2 30f4 str.w r3, [r2, #244] @ 0xf4
80085aa: 4b6a ldr r3, [pc, #424] @ (8008754 <HAL_ETH_Init+0x1e4>)
80085ac: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
80085b0: f003 0302 and.w r3, r3, #2
80085b4: 60bb str r3, [r7, #8]
80085b6: 68bb ldr r3, [r7, #8]
if (heth->Init.MediaInterface == HAL_ETH_MII_MODE)
80085b8: 687b ldr r3, [r7, #4]
80085ba: 7a1b ldrb r3, [r3, #8]
80085bc: 2b00 cmp r3, #0
80085be: d103 bne.n 80085c8 <HAL_ETH_Init+0x58>
{
HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_MII);
80085c0: 2000 movs r0, #0
80085c2: f7fd fa3d bl 8005a40 <HAL_SYSCFG_ETHInterfaceSelect>
80085c6: e003 b.n 80085d0 <HAL_ETH_Init+0x60>
}
else
{
HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_RMII);
80085c8: f44f 0000 mov.w r0, #8388608 @ 0x800000
80085cc: f7fd fa38 bl 8005a40 <HAL_SYSCFG_ETHInterfaceSelect>
}
/* Dummy read to sync with ETH */
(void)SYSCFG->PMCR;
80085d0: 4b61 ldr r3, [pc, #388] @ (8008758 <HAL_ETH_Init+0x1e8>)
80085d2: 685b ldr r3, [r3, #4]
/* Ethernet Software reset */
/* Set the SWR bit: resets all MAC subsystem internal registers and logic */
/* After reset all the registers holds their respective reset values */
SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR);
80085d4: 687b ldr r3, [r7, #4]
80085d6: 681b ldr r3, [r3, #0]
80085d8: f503 5380 add.w r3, r3, #4096 @ 0x1000
80085dc: 681b ldr r3, [r3, #0]
80085de: 687a ldr r2, [r7, #4]
80085e0: 6812 ldr r2, [r2, #0]
80085e2: f043 0301 orr.w r3, r3, #1
80085e6: f502 5280 add.w r2, r2, #4096 @ 0x1000
80085ea: 6013 str r3, [r2, #0]
/* Get tick */
tickstart = HAL_GetTick();
80085ec: f7fd f9ec bl 80059c8 <HAL_GetTick>
80085f0: 60f8 str r0, [r7, #12]
/* Wait for software reset */
while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
80085f2: e011 b.n 8008618 <HAL_ETH_Init+0xa8>
{
if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT))
80085f4: f7fd f9e8 bl 80059c8 <HAL_GetTick>
80085f8: 4602 mov r2, r0
80085fa: 68fb ldr r3, [r7, #12]
80085fc: 1ad3 subs r3, r2, r3
80085fe: f5b3 7ffa cmp.w r3, #500 @ 0x1f4
8008602: d909 bls.n 8008618 <HAL_ETH_Init+0xa8>
{
/* Set Error Code */
heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT;
8008604: 687b ldr r3, [r7, #4]
8008606: 2204 movs r2, #4
8008608: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Set State as Error */
heth->gState = HAL_ETH_STATE_ERROR;
800860c: 687b ldr r3, [r7, #4]
800860e: 22e0 movs r2, #224 @ 0xe0
8008610: f8c3 2084 str.w r2, [r3, #132] @ 0x84
/* Return Error */
return HAL_ERROR;
8008614: 2301 movs r3, #1
8008616: e098 b.n 800874a <HAL_ETH_Init+0x1da>
while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
8008618: 687b ldr r3, [r7, #4]
800861a: 681b ldr r3, [r3, #0]
800861c: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008620: 681b ldr r3, [r3, #0]
8008622: f003 0301 and.w r3, r3, #1
8008626: 2b00 cmp r3, #0
8008628: d1e4 bne.n 80085f4 <HAL_ETH_Init+0x84>
}
}
/*------------------ MDIO CSR Clock Range Configuration --------------------*/
HAL_ETH_SetMDIOClockRange(heth);
800862a: 6878 ldr r0, [r7, #4]
800862c: f000 ff1c bl 8009468 <HAL_ETH_SetMDIOClockRange>
/*------------------ MAC LPI 1US Tic Counter Configuration --------------------*/
WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U));
8008630: f003 f80e bl 800b650 <HAL_RCC_GetHCLKFreq>
8008634: 4603 mov r3, r0
8008636: 4a49 ldr r2, [pc, #292] @ (800875c <HAL_ETH_Init+0x1ec>)
8008638: fba2 2303 umull r2, r3, r2, r3
800863c: 0c9a lsrs r2, r3, #18
800863e: 687b ldr r3, [r7, #4]
8008640: 681b ldr r3, [r3, #0]
8008642: 3a01 subs r2, #1
8008644: f8c3 20dc str.w r2, [r3, #220] @ 0xdc
/*------------------ MAC, MTL and DMA default Configuration ----------------*/
ETH_MACDMAConfig(heth);
8008648: 6878 ldr r0, [r7, #4]
800864a: f001 f90d bl 8009868 <ETH_MACDMAConfig>
/* SET DSL to 64 bit */
MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT);
800864e: 687b ldr r3, [r7, #4]
8008650: 681b ldr r3, [r3, #0]
8008652: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008656: f8d3 3100 ldr.w r3, [r3, #256] @ 0x100
800865a: f423 13e0 bic.w r3, r3, #1835008 @ 0x1c0000
800865e: 687a ldr r2, [r7, #4]
8008660: 6812 ldr r2, [r2, #0]
8008662: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8008666: f502 5280 add.w r2, r2, #4096 @ 0x1000
800866a: f8c2 3100 str.w r3, [r2, #256] @ 0x100
/* Set Receive Buffers Length (must be a multiple of 4) */
if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)
800866e: 687b ldr r3, [r7, #4]
8008670: 695b ldr r3, [r3, #20]
8008672: f003 0303 and.w r3, r3, #3
8008676: 2b00 cmp r3, #0
8008678: d009 beq.n 800868e <HAL_ETH_Init+0x11e>
{
/* Set Error Code */
heth->ErrorCode = HAL_ETH_ERROR_PARAM;
800867a: 687b ldr r3, [r7, #4]
800867c: 2201 movs r2, #1
800867e: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Set State as Error */
heth->gState = HAL_ETH_STATE_ERROR;
8008682: 687b ldr r3, [r7, #4]
8008684: 22e0 movs r2, #224 @ 0xe0
8008686: f8c3 2084 str.w r2, [r3, #132] @ 0x84
/* Return Error */
return HAL_ERROR;
800868a: 2301 movs r3, #1
800868c: e05d b.n 800874a <HAL_ETH_Init+0x1da>
}
else
{
MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1));
800868e: 687b ldr r3, [r7, #4]
8008690: 681b ldr r3, [r3, #0]
8008692: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008696: f8d3 2108 ldr.w r2, [r3, #264] @ 0x108
800869a: 4b31 ldr r3, [pc, #196] @ (8008760 <HAL_ETH_Init+0x1f0>)
800869c: 4013 ands r3, r2
800869e: 687a ldr r2, [r7, #4]
80086a0: 6952 ldr r2, [r2, #20]
80086a2: 0051 lsls r1, r2, #1
80086a4: 687a ldr r2, [r7, #4]
80086a6: 6812 ldr r2, [r2, #0]
80086a8: 430b orrs r3, r1
80086aa: f502 5280 add.w r2, r2, #4096 @ 0x1000
80086ae: f8c2 3108 str.w r3, [r2, #264] @ 0x108
}
/*------------------ DMA Tx Descriptors Configuration ----------------------*/
ETH_DMATxDescListInit(heth);
80086b2: 6878 ldr r0, [r7, #4]
80086b4: f001 f975 bl 80099a2 <ETH_DMATxDescListInit>
/*------------------ DMA Rx Descriptors Configuration ----------------------*/
ETH_DMARxDescListInit(heth);
80086b8: 6878 ldr r0, [r7, #4]
80086ba: f001 f9bb bl 8009a34 <ETH_DMARxDescListInit>
/*--------------------- ETHERNET MAC Address Configuration ------------------*/
/* Set MAC addr bits 32 to 47 */
heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr[4]);
80086be: 687b ldr r3, [r7, #4]
80086c0: 685b ldr r3, [r3, #4]
80086c2: 3305 adds r3, #5
80086c4: 781b ldrb r3, [r3, #0]
80086c6: 021a lsls r2, r3, #8
80086c8: 687b ldr r3, [r7, #4]
80086ca: 685b ldr r3, [r3, #4]
80086cc: 3304 adds r3, #4
80086ce: 781b ldrb r3, [r3, #0]
80086d0: 4619 mov r1, r3
80086d2: 687b ldr r3, [r7, #4]
80086d4: 681b ldr r3, [r3, #0]
80086d6: 430a orrs r2, r1
80086d8: f8c3 2300 str.w r2, [r3, #768] @ 0x300
/* Set MAC addr bits 0 to 31 */
heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
80086dc: 687b ldr r3, [r7, #4]
80086de: 685b ldr r3, [r3, #4]
80086e0: 3303 adds r3, #3
80086e2: 781b ldrb r3, [r3, #0]
80086e4: 061a lsls r2, r3, #24
80086e6: 687b ldr r3, [r7, #4]
80086e8: 685b ldr r3, [r3, #4]
80086ea: 3302 adds r3, #2
80086ec: 781b ldrb r3, [r3, #0]
80086ee: 041b lsls r3, r3, #16
80086f0: 431a orrs r2, r3
((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
80086f2: 687b ldr r3, [r7, #4]
80086f4: 685b ldr r3, [r3, #4]
80086f6: 3301 adds r3, #1
80086f8: 781b ldrb r3, [r3, #0]
80086fa: 021b lsls r3, r3, #8
heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
80086fc: 431a orrs r2, r3
((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
80086fe: 687b ldr r3, [r7, #4]
8008700: 685b ldr r3, [r3, #4]
8008702: 781b ldrb r3, [r3, #0]
8008704: 4619 mov r1, r3
heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
8008706: 687b ldr r3, [r7, #4]
8008708: 681b ldr r3, [r3, #0]
((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
800870a: 430a orrs r2, r1
heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
800870c: f8c3 2304 str.w r2, [r3, #772] @ 0x304
/* Disable Rx MMC Interrupts */
SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RXLPITRCIM | ETH_MMCRIMR_RXLPIUSCIM | \
8008710: 687b ldr r3, [r7, #4]
8008712: 681b ldr r3, [r3, #0]
8008714: f8d3 170c ldr.w r1, [r3, #1804] @ 0x70c
8008718: 687b ldr r3, [r7, #4]
800871a: 681a ldr r2, [r3, #0]
800871c: 4b11 ldr r3, [pc, #68] @ (8008764 <HAL_ETH_Init+0x1f4>)
800871e: 430b orrs r3, r1
8008720: f8c2 370c str.w r3, [r2, #1804] @ 0x70c
ETH_MMCRIMR_RXUCGPIM | ETH_MMCRIMR_RXALGNERPIM | ETH_MMCRIMR_RXCRCERPIM);
/* Disable Tx MMC Interrupts */
SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TXLPITRCIM | ETH_MMCTIMR_TXLPIUSCIM | \
8008724: 687b ldr r3, [r7, #4]
8008726: 681b ldr r3, [r3, #0]
8008728: f8d3 1710 ldr.w r1, [r3, #1808] @ 0x710
800872c: 687b ldr r3, [r7, #4]
800872e: 681a ldr r2, [r3, #0]
8008730: 4b0d ldr r3, [pc, #52] @ (8008768 <HAL_ETH_Init+0x1f8>)
8008732: 430b orrs r3, r1
8008734: f8c2 3710 str.w r3, [r2, #1808] @ 0x710
ETH_MMCTIMR_TXGPKTIM | ETH_MMCTIMR_TXMCOLGPIM | ETH_MMCTIMR_TXSCOLGPIM);
heth->ErrorCode = HAL_ETH_ERROR_NONE;
8008738: 687b ldr r3, [r7, #4]
800873a: 2200 movs r2, #0
800873c: f8c3 2088 str.w r2, [r3, #136] @ 0x88
heth->gState = HAL_ETH_STATE_READY;
8008740: 687b ldr r3, [r7, #4]
8008742: 2210 movs r2, #16
8008744: f8c3 2084 str.w r2, [r3, #132] @ 0x84
return HAL_OK;
8008748: 2300 movs r3, #0
}
800874a: 4618 mov r0, r3
800874c: 3710 adds r7, #16
800874e: 46bd mov sp, r7
8008750: bd80 pop {r7, pc}
8008752: bf00 nop
8008754: 58024400 .word 0x58024400
8008758: 58000400 .word 0x58000400
800875c: 431bde83 .word 0x431bde83
8008760: ffff8001 .word 0xffff8001
8008764: 0c020060 .word 0x0c020060
8008768: 0c20c000 .word 0x0c20c000
0800876c <HAL_ETH_Start_IT>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
{
800876c: b580 push {r7, lr}
800876e: b082 sub sp, #8
8008770: af00 add r7, sp, #0
8008772: 6078 str r0, [r7, #4]
if (heth->gState == HAL_ETH_STATE_READY)
8008774: 687b ldr r3, [r7, #4]
8008776: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800877a: 2b10 cmp r3, #16
800877c: d165 bne.n 800884a <HAL_ETH_Start_IT+0xde>
{
heth->gState = HAL_ETH_STATE_BUSY;
800877e: 687b ldr r3, [r7, #4]
8008780: 2223 movs r2, #35 @ 0x23
8008782: f8c3 2084 str.w r2, [r3, #132] @ 0x84
/* save IT mode to ETH Handle */
heth->RxDescList.ItMode = 1U;
8008786: 687b ldr r3, [r7, #4]
8008788: 2201 movs r2, #1
800878a: 659a str r2, [r3, #88] @ 0x58
/* Set number of descriptors to build */
heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT;
800878c: 687b ldr r3, [r7, #4]
800878e: 2204 movs r2, #4
8008790: 66da str r2, [r3, #108] @ 0x6c
/* Build all descriptors */
ETH_UpdateDescriptor(heth);
8008792: 6878 ldr r0, [r7, #4]
8008794: f000 f9e4 bl 8008b60 <ETH_UpdateDescriptor>
/* Enable the DMA transmission */
SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
8008798: 687b ldr r3, [r7, #4]
800879a: 681b ldr r3, [r3, #0]
800879c: f503 5380 add.w r3, r3, #4096 @ 0x1000
80087a0: f8d3 3104 ldr.w r3, [r3, #260] @ 0x104
80087a4: 687a ldr r2, [r7, #4]
80087a6: 6812 ldr r2, [r2, #0]
80087a8: f043 0301 orr.w r3, r3, #1
80087ac: f502 5280 add.w r2, r2, #4096 @ 0x1000
80087b0: f8c2 3104 str.w r3, [r2, #260] @ 0x104
/* Enable the DMA reception */
SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
80087b4: 687b ldr r3, [r7, #4]
80087b6: 681b ldr r3, [r3, #0]
80087b8: f503 5380 add.w r3, r3, #4096 @ 0x1000
80087bc: f8d3 3108 ldr.w r3, [r3, #264] @ 0x108
80087c0: 687a ldr r2, [r7, #4]
80087c2: 6812 ldr r2, [r2, #0]
80087c4: f043 0301 orr.w r3, r3, #1
80087c8: f502 5280 add.w r2, r2, #4096 @ 0x1000
80087cc: f8c2 3108 str.w r3, [r2, #264] @ 0x108
/* Clear Tx and Rx process stopped flags */
heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS);
80087d0: 687b ldr r3, [r7, #4]
80087d2: 681b ldr r3, [r3, #0]
80087d4: f503 5380 add.w r3, r3, #4096 @ 0x1000
80087d8: f8d3 3160 ldr.w r3, [r3, #352] @ 0x160
80087dc: 687a ldr r2, [r7, #4]
80087de: 6812 ldr r2, [r2, #0]
80087e0: f443 7381 orr.w r3, r3, #258 @ 0x102
80087e4: f502 5280 add.w r2, r2, #4096 @ 0x1000
80087e8: f8c2 3160 str.w r3, [r2, #352] @ 0x160
/* Set the Flush Transmit FIFO bit */
SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
80087ec: 687b ldr r3, [r7, #4]
80087ee: 681b ldr r3, [r3, #0]
80087f0: f8d3 2d00 ldr.w r2, [r3, #3328] @ 0xd00
80087f4: 687b ldr r3, [r7, #4]
80087f6: 681b ldr r3, [r3, #0]
80087f8: f042 0201 orr.w r2, r2, #1
80087fc: f8c3 2d00 str.w r2, [r3, #3328] @ 0xd00
/* Enable the MAC transmission */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
8008800: 687b ldr r3, [r7, #4]
8008802: 681b ldr r3, [r3, #0]
8008804: 681a ldr r2, [r3, #0]
8008806: 687b ldr r3, [r7, #4]
8008808: 681b ldr r3, [r3, #0]
800880a: f042 0202 orr.w r2, r2, #2
800880e: 601a str r2, [r3, #0]
/* Enable the MAC reception */
SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
8008810: 687b ldr r3, [r7, #4]
8008812: 681b ldr r3, [r3, #0]
8008814: 681a ldr r2, [r3, #0]
8008816: 687b ldr r3, [r7, #4]
8008818: 681b ldr r3, [r3, #0]
800881a: f042 0201 orr.w r2, r2, #1
800881e: 601a str r2, [r3, #0]
/* Enable ETH DMA interrupts:
- Tx complete interrupt
- Rx complete interrupt
- Fatal bus interrupt
*/
__HAL_ETH_DMA_ENABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE |
8008820: 687b ldr r3, [r7, #4]
8008822: 681b ldr r3, [r3, #0]
8008824: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008828: f8d3 1134 ldr.w r1, [r3, #308] @ 0x134
800882c: 687b ldr r3, [r7, #4]
800882e: 681a ldr r2, [r3, #0]
8008830: f24d 03c1 movw r3, #53441 @ 0xd0c1
8008834: 430b orrs r3, r1
8008836: f502 5280 add.w r2, r2, #4096 @ 0x1000
800883a: f8c2 3134 str.w r3, [r2, #308] @ 0x134
ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));
heth->gState = HAL_ETH_STATE_STARTED;
800883e: 687b ldr r3, [r7, #4]
8008840: 2223 movs r2, #35 @ 0x23
8008842: f8c3 2084 str.w r2, [r3, #132] @ 0x84
return HAL_OK;
8008846: 2300 movs r3, #0
8008848: e000 b.n 800884c <HAL_ETH_Start_IT+0xe0>
}
else
{
return HAL_ERROR;
800884a: 2301 movs r3, #1
}
}
800884c: 4618 mov r0, r3
800884e: 3708 adds r7, #8
8008850: 46bd mov sp, r7
8008852: bd80 pop {r7, pc}
08008854 <HAL_ETH_Stop_IT>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth)
{
8008854: b480 push {r7}
8008856: b085 sub sp, #20
8008858: af00 add r7, sp, #0
800885a: 6078 str r0, [r7, #4]
ETH_DMADescTypeDef *dmarxdesc;
uint32_t descindex;
if (heth->gState == HAL_ETH_STATE_STARTED)
800885c: 687b ldr r3, [r7, #4]
800885e: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
8008862: 2b23 cmp r3, #35 @ 0x23
8008864: d165 bne.n 8008932 <HAL_ETH_Stop_IT+0xde>
{
/* Set the ETH peripheral state to BUSY */
heth->gState = HAL_ETH_STATE_BUSY;
8008866: 687b ldr r3, [r7, #4]
8008868: 2223 movs r2, #35 @ 0x23
800886a: f8c3 2084 str.w r2, [r3, #132] @ 0x84
/* Disable interrupts:
- Tx complete interrupt
- Rx complete interrupt
- Fatal bus interrupt
*/
__HAL_ETH_DMA_DISABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE |
800886e: 687b ldr r3, [r7, #4]
8008870: 681b ldr r3, [r3, #0]
8008872: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008876: f8d3 1134 ldr.w r1, [r3, #308] @ 0x134
800887a: 687b ldr r3, [r7, #4]
800887c: 681a ldr r2, [r3, #0]
800887e: 4b30 ldr r3, [pc, #192] @ (8008940 <HAL_ETH_Stop_IT+0xec>)
8008880: 400b ands r3, r1
8008882: f502 5280 add.w r2, r2, #4096 @ 0x1000
8008886: f8c2 3134 str.w r3, [r2, #308] @ 0x134
ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));
/* Disable the DMA transmission */
CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
800888a: 687b ldr r3, [r7, #4]
800888c: 681b ldr r3, [r3, #0]
800888e: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008892: f8d3 3104 ldr.w r3, [r3, #260] @ 0x104
8008896: 687a ldr r2, [r7, #4]
8008898: 6812 ldr r2, [r2, #0]
800889a: f023 0301 bic.w r3, r3, #1
800889e: f502 5280 add.w r2, r2, #4096 @ 0x1000
80088a2: f8c2 3104 str.w r3, [r2, #260] @ 0x104
/* Disable the DMA reception */
CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
80088a6: 687b ldr r3, [r7, #4]
80088a8: 681b ldr r3, [r3, #0]
80088aa: f503 5380 add.w r3, r3, #4096 @ 0x1000
80088ae: f8d3 3108 ldr.w r3, [r3, #264] @ 0x108
80088b2: 687a ldr r2, [r7, #4]
80088b4: 6812 ldr r2, [r2, #0]
80088b6: f023 0301 bic.w r3, r3, #1
80088ba: f502 5280 add.w r2, r2, #4096 @ 0x1000
80088be: f8c2 3108 str.w r3, [r2, #264] @ 0x108
/* Disable the MAC reception */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
80088c2: 687b ldr r3, [r7, #4]
80088c4: 681b ldr r3, [r3, #0]
80088c6: 681a ldr r2, [r3, #0]
80088c8: 687b ldr r3, [r7, #4]
80088ca: 681b ldr r3, [r3, #0]
80088cc: f022 0201 bic.w r2, r2, #1
80088d0: 601a str r2, [r3, #0]
/* Set the Flush Transmit FIFO bit */
SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
80088d2: 687b ldr r3, [r7, #4]
80088d4: 681b ldr r3, [r3, #0]
80088d6: f8d3 2d00 ldr.w r2, [r3, #3328] @ 0xd00
80088da: 687b ldr r3, [r7, #4]
80088dc: 681b ldr r3, [r3, #0]
80088de: f042 0201 orr.w r2, r2, #1
80088e2: f8c3 2d00 str.w r2, [r3, #3328] @ 0xd00
/* Disable the MAC transmission */
CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
80088e6: 687b ldr r3, [r7, #4]
80088e8: 681b ldr r3, [r3, #0]
80088ea: 681a ldr r2, [r3, #0]
80088ec: 687b ldr r3, [r7, #4]
80088ee: 681b ldr r3, [r3, #0]
80088f0: f022 0202 bic.w r2, r2, #2
80088f4: 601a str r2, [r3, #0]
/* Clear IOC bit to all Rx descriptors */
for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
80088f6: 2300 movs r3, #0
80088f8: 60fb str r3, [r7, #12]
80088fa: e00e b.n 800891a <HAL_ETH_Stop_IT+0xc6>
{
dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex];
80088fc: 687b ldr r3, [r7, #4]
80088fe: 68fa ldr r2, [r7, #12]
8008900: 3212 adds r2, #18
8008902: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8008906: 60bb str r3, [r7, #8]
CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC);
8008908: 68bb ldr r3, [r7, #8]
800890a: 68db ldr r3, [r3, #12]
800890c: f023 4280 bic.w r2, r3, #1073741824 @ 0x40000000
8008910: 68bb ldr r3, [r7, #8]
8008912: 60da str r2, [r3, #12]
for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
8008914: 68fb ldr r3, [r7, #12]
8008916: 3301 adds r3, #1
8008918: 60fb str r3, [r7, #12]
800891a: 68fb ldr r3, [r7, #12]
800891c: 2b03 cmp r3, #3
800891e: d9ed bls.n 80088fc <HAL_ETH_Stop_IT+0xa8>
}
heth->RxDescList.ItMode = 0U;
8008920: 687b ldr r3, [r7, #4]
8008922: 2200 movs r2, #0
8008924: 659a str r2, [r3, #88] @ 0x58
heth->gState = HAL_ETH_STATE_READY;
8008926: 687b ldr r3, [r7, #4]
8008928: 2210 movs r2, #16
800892a: f8c3 2084 str.w r2, [r3, #132] @ 0x84
/* Return function status */
return HAL_OK;
800892e: 2300 movs r3, #0
8008930: e000 b.n 8008934 <HAL_ETH_Stop_IT+0xe0>
}
else
{
return HAL_ERROR;
8008932: 2301 movs r3, #1
}
}
8008934: 4618 mov r0, r3
8008936: 3714 adds r7, #20
8008938: 46bd mov sp, r7
800893a: f85d 7b04 ldr.w r7, [sp], #4
800893e: 4770 bx lr
8008940: ffff2f3e .word 0xffff2f3e
08008944 <HAL_ETH_Transmit_IT>:
* the configuration information for ETHERNET module
* @param pTxConfig: Hold the configuration of packet to be transmitted
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_Transmit_IT(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig)
{
8008944: b580 push {r7, lr}
8008946: b082 sub sp, #8
8008948: af00 add r7, sp, #0
800894a: 6078 str r0, [r7, #4]
800894c: 6039 str r1, [r7, #0]
if (pTxConfig == NULL)
800894e: 683b ldr r3, [r7, #0]
8008950: 2b00 cmp r3, #0
8008952: d109 bne.n 8008968 <HAL_ETH_Transmit_IT+0x24>
{
heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
8008954: 687b ldr r3, [r7, #4]
8008956: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800895a: f043 0201 orr.w r2, r3, #1
800895e: 687b ldr r3, [r7, #4]
8008960: f8c3 2088 str.w r2, [r3, #136] @ 0x88
return HAL_ERROR;
8008964: 2301 movs r3, #1
8008966: e03a b.n 80089de <HAL_ETH_Transmit_IT+0x9a>
}
if (heth->gState == HAL_ETH_STATE_STARTED)
8008968: 687b ldr r3, [r7, #4]
800896a: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800896e: 2b23 cmp r3, #35 @ 0x23
8008970: d134 bne.n 80089dc <HAL_ETH_Transmit_IT+0x98>
{
/* Save the packet pointer to release. */
heth->TxDescList.CurrentPacketAddress = (uint32_t *)pTxConfig->pData;
8008972: 683b ldr r3, [r7, #0]
8008974: 6b5a ldr r2, [r3, #52] @ 0x34
8008976: 687b ldr r3, [r7, #4]
8008978: 63da str r2, [r3, #60] @ 0x3c
/* Config DMA Tx descriptor by Tx Packet info */
if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 1) != HAL_ETH_ERROR_NONE)
800897a: 2201 movs r2, #1
800897c: 6839 ldr r1, [r7, #0]
800897e: 6878 ldr r0, [r7, #4]
8008980: f001 f8b6 bl 8009af0 <ETH_Prepare_Tx_Descriptors>
8008984: 4603 mov r3, r0
8008986: 2b00 cmp r3, #0
8008988: d009 beq.n 800899e <HAL_ETH_Transmit_IT+0x5a>
{
heth->ErrorCode |= HAL_ETH_ERROR_BUSY;
800898a: 687b ldr r3, [r7, #4]
800898c: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
8008990: f043 0202 orr.w r2, r3, #2
8008994: 687b ldr r3, [r7, #4]
8008996: f8c3 2088 str.w r2, [r3, #136] @ 0x88
return HAL_ERROR;
800899a: 2301 movs r3, #1
800899c: e01f b.n 80089de <HAL_ETH_Transmit_IT+0x9a>
__ASM volatile ("dsb 0xF":::"memory");
800899e: f3bf 8f4f dsb sy
}
80089a2: bf00 nop
/* Ensure completion of descriptor preparation before transmission start */
__DSB();
/* Incr current tx desc index */
INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U);
80089a4: 687b ldr r3, [r7, #4]
80089a6: 6a9b ldr r3, [r3, #40] @ 0x28
80089a8: 1c5a adds r2, r3, #1
80089aa: 687b ldr r3, [r7, #4]
80089ac: 629a str r2, [r3, #40] @ 0x28
80089ae: 687b ldr r3, [r7, #4]
80089b0: 6a9b ldr r3, [r3, #40] @ 0x28
80089b2: 2b03 cmp r3, #3
80089b4: d904 bls.n 80089c0 <HAL_ETH_Transmit_IT+0x7c>
80089b6: 687b ldr r3, [r7, #4]
80089b8: 6a9b ldr r3, [r3, #40] @ 0x28
80089ba: 1f1a subs r2, r3, #4
80089bc: 687b ldr r3, [r7, #4]
80089be: 629a str r2, [r3, #40] @ 0x28
/* Start transmission */
/* issue a poll command to Tx DMA by writing address of next immediate free descriptor */
WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc]));
80089c0: 687b ldr r3, [r7, #4]
80089c2: 6a99 ldr r1, [r3, #40] @ 0x28
80089c4: 687b ldr r3, [r7, #4]
80089c6: 681a ldr r2, [r3, #0]
80089c8: 687b ldr r3, [r7, #4]
80089ca: 3106 adds r1, #6
80089cc: f853 3021 ldr.w r3, [r3, r1, lsl #2]
80089d0: f502 5280 add.w r2, r2, #4096 @ 0x1000
80089d4: f8c2 3120 str.w r3, [r2, #288] @ 0x120
return HAL_OK;
80089d8: 2300 movs r3, #0
80089da: e000 b.n 80089de <HAL_ETH_Transmit_IT+0x9a>
}
else
{
return HAL_ERROR;
80089dc: 2301 movs r3, #1
}
}
80089de: 4618 mov r0, r3
80089e0: 3708 adds r7, #8
80089e2: 46bd mov sp, r7
80089e4: bd80 pop {r7, pc}
080089e6 <HAL_ETH_ReadData>:
* the configuration information for ETHERNET module
* @param pAppBuff: Pointer to an application buffer to receive the packet.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff)
{
80089e6: b580 push {r7, lr}
80089e8: b088 sub sp, #32
80089ea: af00 add r7, sp, #0
80089ec: 6078 str r0, [r7, #4]
80089ee: 6039 str r1, [r7, #0]
uint32_t descidx;
ETH_DMADescTypeDef *dmarxdesc;
uint32_t desccnt = 0U;
80089f0: 2300 movs r3, #0
80089f2: 617b str r3, [r7, #20]
uint32_t desccntmax;
uint32_t bufflength;
uint8_t rxdataready = 0U;
80089f4: 2300 movs r3, #0
80089f6: 74fb strb r3, [r7, #19]
if (pAppBuff == NULL)
80089f8: 683b ldr r3, [r7, #0]
80089fa: 2b00 cmp r3, #0
80089fc: d109 bne.n 8008a12 <HAL_ETH_ReadData+0x2c>
{
heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
80089fe: 687b ldr r3, [r7, #4]
8008a00: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
8008a04: f043 0201 orr.w r2, r3, #1
8008a08: 687b ldr r3, [r7, #4]
8008a0a: f8c3 2088 str.w r2, [r3, #136] @ 0x88
return HAL_ERROR;
8008a0e: 2301 movs r3, #1
8008a10: e0a2 b.n 8008b58 <HAL_ETH_ReadData+0x172>
}
if (heth->gState != HAL_ETH_STATE_STARTED)
8008a12: 687b ldr r3, [r7, #4]
8008a14: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
8008a18: 2b23 cmp r3, #35 @ 0x23
8008a1a: d001 beq.n 8008a20 <HAL_ETH_ReadData+0x3a>
{
return HAL_ERROR;
8008a1c: 2301 movs r3, #1
8008a1e: e09b b.n 8008b58 <HAL_ETH_ReadData+0x172>
}
descidx = heth->RxDescList.RxDescIdx;
8008a20: 687b ldr r3, [r7, #4]
8008a22: 6ddb ldr r3, [r3, #92] @ 0x5c
8008a24: 61fb str r3, [r7, #28]
dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
8008a26: 687b ldr r3, [r7, #4]
8008a28: 69fa ldr r2, [r7, #28]
8008a2a: 3212 adds r2, #18
8008a2c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8008a30: 61bb str r3, [r7, #24]
desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt;
8008a32: 687b ldr r3, [r7, #4]
8008a34: 6edb ldr r3, [r3, #108] @ 0x6c
8008a36: f1c3 0304 rsb r3, r3, #4
8008a3a: 60fb str r3, [r7, #12]
/* Check if descriptor is not owned by DMA */
while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
8008a3c: e064 b.n 8008b08 <HAL_ETH_ReadData+0x122>
&& (rxdataready == 0U))
{
if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_CTXT) != (uint32_t)RESET)
8008a3e: 69bb ldr r3, [r7, #24]
8008a40: 68db ldr r3, [r3, #12]
8008a42: f003 4380 and.w r3, r3, #1073741824 @ 0x40000000
8008a46: 2b00 cmp r3, #0
8008a48: d007 beq.n 8008a5a <HAL_ETH_ReadData+0x74>
{
/* Get timestamp high */
heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC1;
8008a4a: 69bb ldr r3, [r7, #24]
8008a4c: 685a ldr r2, [r3, #4]
8008a4e: 687b ldr r3, [r7, #4]
8008a50: 679a str r2, [r3, #120] @ 0x78
/* Get timestamp low */
heth->RxDescList.TimeStamp.TimeStampLow = dmarxdesc->DESC0;
8008a52: 69bb ldr r3, [r7, #24]
8008a54: 681a ldr r2, [r3, #0]
8008a56: 687b ldr r3, [r7, #4]
8008a58: 675a str r2, [r3, #116] @ 0x74
}
if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRxStart != NULL))
8008a5a: 69bb ldr r3, [r7, #24]
8008a5c: 68db ldr r3, [r3, #12]
8008a5e: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
8008a62: 2b00 cmp r3, #0
8008a64: d103 bne.n 8008a6e <HAL_ETH_ReadData+0x88>
8008a66: 687b ldr r3, [r7, #4]
8008a68: 6fdb ldr r3, [r3, #124] @ 0x7c
8008a6a: 2b00 cmp r3, #0
8008a6c: d03a beq.n 8008ae4 <HAL_ETH_ReadData+0xfe>
{
/* Check if first descriptor */
if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET)
8008a6e: 69bb ldr r3, [r7, #24]
8008a70: 68db ldr r3, [r3, #12]
8008a72: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
8008a76: 2b00 cmp r3, #0
8008a78: d005 beq.n 8008a86 <HAL_ETH_ReadData+0xa0>
{
heth->RxDescList.RxDescCnt = 0;
8008a7a: 687b ldr r3, [r7, #4]
8008a7c: 2200 movs r2, #0
8008a7e: 661a str r2, [r3, #96] @ 0x60
heth->RxDescList.RxDataLength = 0;
8008a80: 687b ldr r3, [r7, #4]
8008a82: 2200 movs r2, #0
8008a84: 665a str r2, [r3, #100] @ 0x64
}
/* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength;
8008a86: 69bb ldr r3, [r7, #24]
8008a88: 68db ldr r3, [r3, #12]
8008a8a: f3c3 020e ubfx r2, r3, #0, #15
8008a8e: 687b ldr r3, [r7, #4]
8008a90: 6e5b ldr r3, [r3, #100] @ 0x64
8008a92: 1ad3 subs r3, r2, r3
8008a94: 60bb str r3, [r7, #8]
/* Check if last descriptor */
if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET)
8008a96: 69bb ldr r3, [r7, #24]
8008a98: 68db ldr r3, [r3, #12]
8008a9a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8008a9e: 2b00 cmp r3, #0
8008aa0: d005 beq.n 8008aae <HAL_ETH_ReadData+0xc8>
{
/* Save Last descriptor index */
heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3;
8008aa2: 69bb ldr r3, [r7, #24]
8008aa4: 68da ldr r2, [r3, #12]
8008aa6: 687b ldr r3, [r7, #4]
8008aa8: 671a str r2, [r3, #112] @ 0x70
/* Packet ready */
rxdataready = 1;
8008aaa: 2301 movs r3, #1
8008aac: 74fb strb r3, [r7, #19]
/*Call registered Link callback*/
heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
(uint8_t *)dmarxdesc->BackupAddr0, bufflength);
#else
/* Link callback */
HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
8008aae: 687b ldr r3, [r7, #4]
8008ab0: f103 007c add.w r0, r3, #124 @ 0x7c
8008ab4: 687b ldr r3, [r7, #4]
8008ab6: f103 0180 add.w r1, r3, #128 @ 0x80
(uint8_t *)dmarxdesc->BackupAddr0, (uint16_t) bufflength);
8008aba: 69bb ldr r3, [r7, #24]
8008abc: 691b ldr r3, [r3, #16]
HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
8008abe: 461a mov r2, r3
8008ac0: 68bb ldr r3, [r7, #8]
8008ac2: b29b uxth r3, r3
8008ac4: f008 faf4 bl 80110b0 <HAL_ETH_RxLinkCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
heth->RxDescList.RxDescCnt++;
8008ac8: 687b ldr r3, [r7, #4]
8008aca: 6e1b ldr r3, [r3, #96] @ 0x60
8008acc: 1c5a adds r2, r3, #1
8008ace: 687b ldr r3, [r7, #4]
8008ad0: 661a str r2, [r3, #96] @ 0x60
heth->RxDescList.RxDataLength += bufflength;
8008ad2: 687b ldr r3, [r7, #4]
8008ad4: 6e5a ldr r2, [r3, #100] @ 0x64
8008ad6: 68bb ldr r3, [r7, #8]
8008ad8: 441a add r2, r3
8008ada: 687b ldr r3, [r7, #4]
8008adc: 665a str r2, [r3, #100] @ 0x64
/* Clear buffer pointer */
dmarxdesc->BackupAddr0 = 0;
8008ade: 69bb ldr r3, [r7, #24]
8008ae0: 2200 movs r2, #0
8008ae2: 611a str r2, [r3, #16]
}
/* Increment current rx descriptor index */
INCR_RX_DESC_INDEX(descidx, 1U);
8008ae4: 69fb ldr r3, [r7, #28]
8008ae6: 3301 adds r3, #1
8008ae8: 61fb str r3, [r7, #28]
8008aea: 69fb ldr r3, [r7, #28]
8008aec: 2b03 cmp r3, #3
8008aee: d902 bls.n 8008af6 <HAL_ETH_ReadData+0x110>
8008af0: 69fb ldr r3, [r7, #28]
8008af2: 3b04 subs r3, #4
8008af4: 61fb str r3, [r7, #28]
/* Get current descriptor address */
dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
8008af6: 687b ldr r3, [r7, #4]
8008af8: 69fa ldr r2, [r7, #28]
8008afa: 3212 adds r2, #18
8008afc: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8008b00: 61bb str r3, [r7, #24]
desccnt++;
8008b02: 697b ldr r3, [r7, #20]
8008b04: 3301 adds r3, #1
8008b06: 617b str r3, [r7, #20]
while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
8008b08: 69bb ldr r3, [r7, #24]
8008b0a: 68db ldr r3, [r3, #12]
&& (rxdataready == 0U))
8008b0c: 2b00 cmp r3, #0
8008b0e: db06 blt.n 8008b1e <HAL_ETH_ReadData+0x138>
while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
8008b10: 697a ldr r2, [r7, #20]
8008b12: 68fb ldr r3, [r7, #12]
8008b14: 429a cmp r2, r3
8008b16: d202 bcs.n 8008b1e <HAL_ETH_ReadData+0x138>
&& (rxdataready == 0U))
8008b18: 7cfb ldrb r3, [r7, #19]
8008b1a: 2b00 cmp r3, #0
8008b1c: d08f beq.n 8008a3e <HAL_ETH_ReadData+0x58>
}
heth->RxDescList.RxBuildDescCnt += desccnt;
8008b1e: 687b ldr r3, [r7, #4]
8008b20: 6eda ldr r2, [r3, #108] @ 0x6c
8008b22: 697b ldr r3, [r7, #20]
8008b24: 441a add r2, r3
8008b26: 687b ldr r3, [r7, #4]
8008b28: 66da str r2, [r3, #108] @ 0x6c
if ((heth->RxDescList.RxBuildDescCnt) != 0U)
8008b2a: 687b ldr r3, [r7, #4]
8008b2c: 6edb ldr r3, [r3, #108] @ 0x6c
8008b2e: 2b00 cmp r3, #0
8008b30: d002 beq.n 8008b38 <HAL_ETH_ReadData+0x152>
{
/* Update Descriptors */
ETH_UpdateDescriptor(heth);
8008b32: 6878 ldr r0, [r7, #4]
8008b34: f000 f814 bl 8008b60 <ETH_UpdateDescriptor>
}
heth->RxDescList.RxDescIdx = descidx;
8008b38: 687b ldr r3, [r7, #4]
8008b3a: 69fa ldr r2, [r7, #28]
8008b3c: 65da str r2, [r3, #92] @ 0x5c
if (rxdataready == 1U)
8008b3e: 7cfb ldrb r3, [r7, #19]
8008b40: 2b01 cmp r3, #1
8008b42: d108 bne.n 8008b56 <HAL_ETH_ReadData+0x170>
{
/* Return received packet */
*pAppBuff = heth->RxDescList.pRxStart;
8008b44: 687b ldr r3, [r7, #4]
8008b46: 6fda ldr r2, [r3, #124] @ 0x7c
8008b48: 683b ldr r3, [r7, #0]
8008b4a: 601a str r2, [r3, #0]
/* Reset first element */
heth->RxDescList.pRxStart = NULL;
8008b4c: 687b ldr r3, [r7, #4]
8008b4e: 2200 movs r2, #0
8008b50: 67da str r2, [r3, #124] @ 0x7c
return HAL_OK;
8008b52: 2300 movs r3, #0
8008b54: e000 b.n 8008b58 <HAL_ETH_ReadData+0x172>
}
/* Packet not ready */
return HAL_ERROR;
8008b56: 2301 movs r3, #1
}
8008b58: 4618 mov r0, r3
8008b5a: 3720 adds r7, #32
8008b5c: 46bd mov sp, r7
8008b5e: bd80 pop {r7, pc}
08008b60 <ETH_UpdateDescriptor>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth)
{
8008b60: b580 push {r7, lr}
8008b62: b088 sub sp, #32
8008b64: af00 add r7, sp, #0
8008b66: 6078 str r0, [r7, #4]
uint32_t descidx;
uint32_t tailidx;
uint32_t desccount;
ETH_DMADescTypeDef *dmarxdesc;
uint8_t *buff = NULL;
8008b68: 2300 movs r3, #0
8008b6a: 60bb str r3, [r7, #8]
uint8_t allocStatus = 1U;
8008b6c: 2301 movs r3, #1
8008b6e: 74fb strb r3, [r7, #19]
descidx = heth->RxDescList.RxBuildDescIdx;
8008b70: 687b ldr r3, [r7, #4]
8008b72: 6e9b ldr r3, [r3, #104] @ 0x68
8008b74: 61fb str r3, [r7, #28]
dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
8008b76: 687b ldr r3, [r7, #4]
8008b78: 69fa ldr r2, [r7, #28]
8008b7a: 3212 adds r2, #18
8008b7c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8008b80: 617b str r3, [r7, #20]
desccount = heth->RxDescList.RxBuildDescCnt;
8008b82: 687b ldr r3, [r7, #4]
8008b84: 6edb ldr r3, [r3, #108] @ 0x6c
8008b86: 61bb str r3, [r7, #24]
while ((desccount > 0U) && (allocStatus != 0U))
8008b88: e038 b.n 8008bfc <ETH_UpdateDescriptor+0x9c>
{
/* Check if a buffer's attached the descriptor */
if (READ_REG(dmarxdesc->BackupAddr0) == 0U)
8008b8a: 697b ldr r3, [r7, #20]
8008b8c: 691b ldr r3, [r3, #16]
8008b8e: 2b00 cmp r3, #0
8008b90: d112 bne.n 8008bb8 <ETH_UpdateDescriptor+0x58>
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
/*Call registered Allocate callback*/
heth->rxAllocateCallback(&buff);
#else
/* Allocate callback */
HAL_ETH_RxAllocateCallback(&buff);
8008b92: f107 0308 add.w r3, r7, #8
8008b96: 4618 mov r0, r3
8008b98: f008 fa5a bl 8011050 <HAL_ETH_RxAllocateCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
if (buff == NULL)
8008b9c: 68bb ldr r3, [r7, #8]
8008b9e: 2b00 cmp r3, #0
8008ba0: d102 bne.n 8008ba8 <ETH_UpdateDescriptor+0x48>
{
allocStatus = 0U;
8008ba2: 2300 movs r3, #0
8008ba4: 74fb strb r3, [r7, #19]
8008ba6: e007 b.n 8008bb8 <ETH_UpdateDescriptor+0x58>
}
else
{
WRITE_REG(dmarxdesc->BackupAddr0, (uint32_t)buff);
8008ba8: 68bb ldr r3, [r7, #8]
8008baa: 461a mov r2, r3
8008bac: 697b ldr r3, [r7, #20]
8008bae: 611a str r2, [r3, #16]
WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff);
8008bb0: 68bb ldr r3, [r7, #8]
8008bb2: 461a mov r2, r3
8008bb4: 697b ldr r3, [r7, #20]
8008bb6: 601a str r2, [r3, #0]
}
}
if (allocStatus != 0U)
8008bb8: 7cfb ldrb r3, [r7, #19]
8008bba: 2b00 cmp r3, #0
8008bbc: d01e beq.n 8008bfc <ETH_UpdateDescriptor+0x9c>
{
if (heth->RxDescList.ItMode != 0U)
8008bbe: 687b ldr r3, [r7, #4]
8008bc0: 6d9b ldr r3, [r3, #88] @ 0x58
8008bc2: 2b00 cmp r3, #0
8008bc4: d004 beq.n 8008bd0 <ETH_UpdateDescriptor+0x70>
{
WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC);
8008bc6: 697b ldr r3, [r7, #20]
8008bc8: f04f 4241 mov.w r2, #3238002688 @ 0xc1000000
8008bcc: 60da str r2, [r3, #12]
8008bce: e003 b.n 8008bd8 <ETH_UpdateDescriptor+0x78>
}
else
{
WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V);
8008bd0: 697b ldr r3, [r7, #20]
8008bd2: f04f 4201 mov.w r2, #2164260864 @ 0x81000000
8008bd6: 60da str r2, [r3, #12]
}
/* Increment current rx descriptor index */
INCR_RX_DESC_INDEX(descidx, 1U);
8008bd8: 69fb ldr r3, [r7, #28]
8008bda: 3301 adds r3, #1
8008bdc: 61fb str r3, [r7, #28]
8008bde: 69fb ldr r3, [r7, #28]
8008be0: 2b03 cmp r3, #3
8008be2: d902 bls.n 8008bea <ETH_UpdateDescriptor+0x8a>
8008be4: 69fb ldr r3, [r7, #28]
8008be6: 3b04 subs r3, #4
8008be8: 61fb str r3, [r7, #28]
/* Get current descriptor address */
dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
8008bea: 687b ldr r3, [r7, #4]
8008bec: 69fa ldr r2, [r7, #28]
8008bee: 3212 adds r2, #18
8008bf0: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8008bf4: 617b str r3, [r7, #20]
desccount--;
8008bf6: 69bb ldr r3, [r7, #24]
8008bf8: 3b01 subs r3, #1
8008bfa: 61bb str r3, [r7, #24]
while ((desccount > 0U) && (allocStatus != 0U))
8008bfc: 69bb ldr r3, [r7, #24]
8008bfe: 2b00 cmp r3, #0
8008c00: d002 beq.n 8008c08 <ETH_UpdateDescriptor+0xa8>
8008c02: 7cfb ldrb r3, [r7, #19]
8008c04: 2b00 cmp r3, #0
8008c06: d1c0 bne.n 8008b8a <ETH_UpdateDescriptor+0x2a>
}
}
if (heth->RxDescList.RxBuildDescCnt != desccount)
8008c08: 687b ldr r3, [r7, #4]
8008c0a: 6edb ldr r3, [r3, #108] @ 0x6c
8008c0c: 69ba ldr r2, [r7, #24]
8008c0e: 429a cmp r2, r3
8008c10: d01b beq.n 8008c4a <ETH_UpdateDescriptor+0xea>
{
/* Set the tail pointer index */
tailidx = (descidx + 1U) % ETH_RX_DESC_CNT;
8008c12: 69fb ldr r3, [r7, #28]
8008c14: 3301 adds r3, #1
8008c16: f003 0303 and.w r3, r3, #3
8008c1a: 60fb str r3, [r7, #12]
__ASM volatile ("dmb 0xF":::"memory");
8008c1c: f3bf 8f5f dmb sy
}
8008c20: bf00 nop
/* DMB instruction to avoid race condition */
__DMB();
/* Set the Tail pointer address */
WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (tailidx))));
8008c22: 687b ldr r3, [r7, #4]
8008c24: 6919 ldr r1, [r3, #16]
8008c26: 68fa ldr r2, [r7, #12]
8008c28: 4613 mov r3, r2
8008c2a: 005b lsls r3, r3, #1
8008c2c: 4413 add r3, r2
8008c2e: 00db lsls r3, r3, #3
8008c30: 18ca adds r2, r1, r3
8008c32: 687b ldr r3, [r7, #4]
8008c34: 681b ldr r3, [r3, #0]
8008c36: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008c3a: f8c3 2128 str.w r2, [r3, #296] @ 0x128
heth->RxDescList.RxBuildDescIdx = descidx;
8008c3e: 687b ldr r3, [r7, #4]
8008c40: 69fa ldr r2, [r7, #28]
8008c42: 669a str r2, [r3, #104] @ 0x68
heth->RxDescList.RxBuildDescCnt = desccount;
8008c44: 687b ldr r3, [r7, #4]
8008c46: 69ba ldr r2, [r7, #24]
8008c48: 66da str r2, [r3, #108] @ 0x6c
}
}
8008c4a: bf00 nop
8008c4c: 3720 adds r7, #32
8008c4e: 46bd mov sp, r7
8008c50: bd80 pop {r7, pc}
08008c52 <HAL_ETH_ReleaseTxPacket>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth)
{
8008c52: b580 push {r7, lr}
8008c54: b086 sub sp, #24
8008c56: af00 add r7, sp, #0
8008c58: 6078 str r0, [r7, #4]
ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
8008c5a: 687b ldr r3, [r7, #4]
8008c5c: 3318 adds r3, #24
8008c5e: 60bb str r3, [r7, #8]
uint32_t numOfBuf = dmatxdesclist->BuffersInUse;
8008c60: 68bb ldr r3, [r7, #8]
8008c62: 6a9b ldr r3, [r3, #40] @ 0x28
8008c64: 617b str r3, [r7, #20]
uint32_t idx = dmatxdesclist->releaseIndex;
8008c66: 68bb ldr r3, [r7, #8]
8008c68: 6adb ldr r3, [r3, #44] @ 0x2c
8008c6a: 613b str r3, [r7, #16]
uint8_t pktTxStatus = 1U;
8008c6c: 2301 movs r3, #1
8008c6e: 73fb strb r3, [r7, #15]
#ifdef HAL_ETH_USE_PTP
ETH_TimeStampTypeDef *timestamp = &heth->TxTimestamp;
#endif /* HAL_ETH_USE_PTP */
/* Loop through buffers in use. */
while ((numOfBuf != 0U) && (pktTxStatus != 0U))
8008c70: e047 b.n 8008d02 <HAL_ETH_ReleaseTxPacket+0xb0>
{
pktInUse = 1U;
8008c72: 2301 movs r3, #1
8008c74: 73bb strb r3, [r7, #14]
numOfBuf--;
8008c76: 697b ldr r3, [r7, #20]
8008c78: 3b01 subs r3, #1
8008c7a: 617b str r3, [r7, #20]
/* If no packet, just examine the next packet. */
if (dmatxdesclist->PacketAddress[idx] == NULL)
8008c7c: 68ba ldr r2, [r7, #8]
8008c7e: 693b ldr r3, [r7, #16]
8008c80: 3304 adds r3, #4
8008c82: 009b lsls r3, r3, #2
8008c84: 4413 add r3, r2
8008c86: 685b ldr r3, [r3, #4]
8008c88: 2b00 cmp r3, #0
8008c8a: d10a bne.n 8008ca2 <HAL_ETH_ReleaseTxPacket+0x50>
{
/* No packet in use, skip to next. */
INCR_TX_DESC_INDEX(idx, 1U);
8008c8c: 693b ldr r3, [r7, #16]
8008c8e: 3301 adds r3, #1
8008c90: 613b str r3, [r7, #16]
8008c92: 693b ldr r3, [r7, #16]
8008c94: 2b03 cmp r3, #3
8008c96: d902 bls.n 8008c9e <HAL_ETH_ReleaseTxPacket+0x4c>
8008c98: 693b ldr r3, [r7, #16]
8008c9a: 3b04 subs r3, #4
8008c9c: 613b str r3, [r7, #16]
pktInUse = 0U;
8008c9e: 2300 movs r3, #0
8008ca0: 73bb strb r3, [r7, #14]
}
if (pktInUse != 0U)
8008ca2: 7bbb ldrb r3, [r7, #14]
8008ca4: 2b00 cmp r3, #0
8008ca6: d02c beq.n 8008d02 <HAL_ETH_ReleaseTxPacket+0xb0>
{
/* Determine if the packet has been transmitted. */
if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U)
8008ca8: 687b ldr r3, [r7, #4]
8008caa: 68d9 ldr r1, [r3, #12]
8008cac: 693a ldr r2, [r7, #16]
8008cae: 4613 mov r3, r2
8008cb0: 005b lsls r3, r3, #1
8008cb2: 4413 add r3, r2
8008cb4: 00db lsls r3, r3, #3
8008cb6: 440b add r3, r1
8008cb8: 68db ldr r3, [r3, #12]
8008cba: 2b00 cmp r3, #0
8008cbc: db1f blt.n 8008cfe <HAL_ETH_ReleaseTxPacket+0xac>
{
HAL_ETH_TxPtpCallback(dmatxdesclist->PacketAddress[idx], timestamp);
}
#endif /* HAL_ETH_USE_PTP */
/* Release the packet. */
HAL_ETH_TxFreeCallback(dmatxdesclist->PacketAddress[idx]);
8008cbe: 68ba ldr r2, [r7, #8]
8008cc0: 693b ldr r3, [r7, #16]
8008cc2: 3304 adds r3, #4
8008cc4: 009b lsls r3, r3, #2
8008cc6: 4413 add r3, r2
8008cc8: 685b ldr r3, [r3, #4]
8008cca: 4618 mov r0, r3
8008ccc: f008 fa58 bl 8011180 <HAL_ETH_TxFreeCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
/* Clear the entry in the in-use array. */
dmatxdesclist->PacketAddress[idx] = NULL;
8008cd0: 68ba ldr r2, [r7, #8]
8008cd2: 693b ldr r3, [r7, #16]
8008cd4: 3304 adds r3, #4
8008cd6: 009b lsls r3, r3, #2
8008cd8: 4413 add r3, r2
8008cda: 2200 movs r2, #0
8008cdc: 605a str r2, [r3, #4]
/* Update the transmit relesae index and number of buffers in use. */
INCR_TX_DESC_INDEX(idx, 1U);
8008cde: 693b ldr r3, [r7, #16]
8008ce0: 3301 adds r3, #1
8008ce2: 613b str r3, [r7, #16]
8008ce4: 693b ldr r3, [r7, #16]
8008ce6: 2b03 cmp r3, #3
8008ce8: d902 bls.n 8008cf0 <HAL_ETH_ReleaseTxPacket+0x9e>
8008cea: 693b ldr r3, [r7, #16]
8008cec: 3b04 subs r3, #4
8008cee: 613b str r3, [r7, #16]
dmatxdesclist->BuffersInUse = numOfBuf;
8008cf0: 68bb ldr r3, [r7, #8]
8008cf2: 697a ldr r2, [r7, #20]
8008cf4: 629a str r2, [r3, #40] @ 0x28
dmatxdesclist->releaseIndex = idx;
8008cf6: 68bb ldr r3, [r7, #8]
8008cf8: 693a ldr r2, [r7, #16]
8008cfa: 62da str r2, [r3, #44] @ 0x2c
8008cfc: e001 b.n 8008d02 <HAL_ETH_ReleaseTxPacket+0xb0>
}
else
{
/* Get out of the loop! */
pktTxStatus = 0U;
8008cfe: 2300 movs r3, #0
8008d00: 73fb strb r3, [r7, #15]
while ((numOfBuf != 0U) && (pktTxStatus != 0U))
8008d02: 697b ldr r3, [r7, #20]
8008d04: 2b00 cmp r3, #0
8008d06: d002 beq.n 8008d0e <HAL_ETH_ReleaseTxPacket+0xbc>
8008d08: 7bfb ldrb r3, [r7, #15]
8008d0a: 2b00 cmp r3, #0
8008d0c: d1b1 bne.n 8008c72 <HAL_ETH_ReleaseTxPacket+0x20>
}
}
}
return HAL_OK;
8008d0e: 2300 movs r3, #0
}
8008d10: 4618 mov r0, r3
8008d12: 3718 adds r7, #24
8008d14: 46bd mov sp, r7
8008d16: bd80 pop {r7, pc}
08008d18 <HAL_ETH_IRQHandler>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
{
8008d18: b580 push {r7, lr}
8008d1a: b086 sub sp, #24
8008d1c: af00 add r7, sp, #0
8008d1e: 6078 str r0, [r7, #4]
uint32_t mac_flag = READ_REG(heth->Instance->MACISR);
8008d20: 687b ldr r3, [r7, #4]
8008d22: 681b ldr r3, [r3, #0]
8008d24: f8d3 30b0 ldr.w r3, [r3, #176] @ 0xb0
8008d28: 617b str r3, [r7, #20]
uint32_t dma_flag = READ_REG(heth->Instance->DMACSR);
8008d2a: 687b ldr r3, [r7, #4]
8008d2c: 681b ldr r3, [r3, #0]
8008d2e: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008d32: f8d3 3160 ldr.w r3, [r3, #352] @ 0x160
8008d36: 613b str r3, [r7, #16]
uint32_t dma_itsource = READ_REG(heth->Instance->DMACIER);
8008d38: 687b ldr r3, [r7, #4]
8008d3a: 681b ldr r3, [r3, #0]
8008d3c: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008d40: f8d3 3134 ldr.w r3, [r3, #308] @ 0x134
8008d44: 60fb str r3, [r7, #12]
uint32_t exti_d1_flag = READ_REG(EXTI_D1->PR3);
8008d46: 4b6d ldr r3, [pc, #436] @ (8008efc <HAL_ETH_IRQHandler+0x1e4>)
8008d48: 6a9b ldr r3, [r3, #40] @ 0x28
8008d4a: 60bb str r3, [r7, #8]
#if defined(DUAL_CORE)
uint32_t exti_d2_flag = READ_REG(EXTI_D2->PR3);
#endif /* DUAL_CORE */
/* Packet received */
if (((dma_flag & ETH_DMACSR_RI) != 0U) && ((dma_itsource & ETH_DMACIER_RIE) != 0U))
8008d4c: 693b ldr r3, [r7, #16]
8008d4e: f003 0340 and.w r3, r3, #64 @ 0x40
8008d52: 2b00 cmp r3, #0
8008d54: d010 beq.n 8008d78 <HAL_ETH_IRQHandler+0x60>
8008d56: 68fb ldr r3, [r7, #12]
8008d58: f003 0340 and.w r3, r3, #64 @ 0x40
8008d5c: 2b00 cmp r3, #0
8008d5e: d00b beq.n 8008d78 <HAL_ETH_IRQHandler+0x60>
{
/* Clear the Eth DMA Rx IT pending bits */
__HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_RI | ETH_DMACSR_NIS);
8008d60: 687b ldr r3, [r7, #4]
8008d62: 681b ldr r3, [r3, #0]
8008d64: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008d68: 461a mov r2, r3
8008d6a: f248 0340 movw r3, #32832 @ 0x8040
8008d6e: f8c2 3160 str.w r3, [r2, #352] @ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
/*Call registered Receive complete callback*/
heth->RxCpltCallback(heth);
#else
/* Receive complete callback */
HAL_ETH_RxCpltCallback(heth);
8008d72: 6878 ldr r0, [r7, #4]
8008d74: f007 fcf4 bl 8010760 <HAL_ETH_RxCpltCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
}
/* Packet transmitted */
if (((dma_flag & ETH_DMACSR_TI) != 0U) && ((dma_itsource & ETH_DMACIER_TIE) != 0U))
8008d78: 693b ldr r3, [r7, #16]
8008d7a: f003 0301 and.w r3, r3, #1
8008d7e: 2b00 cmp r3, #0
8008d80: d010 beq.n 8008da4 <HAL_ETH_IRQHandler+0x8c>
8008d82: 68fb ldr r3, [r7, #12]
8008d84: f003 0301 and.w r3, r3, #1
8008d88: 2b00 cmp r3, #0
8008d8a: d00b beq.n 8008da4 <HAL_ETH_IRQHandler+0x8c>
{
/* Clear the Eth DMA Tx IT pending bits */
__HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_TI | ETH_DMACSR_NIS);
8008d8c: 687b ldr r3, [r7, #4]
8008d8e: 681b ldr r3, [r3, #0]
8008d90: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008d94: 461a mov r2, r3
8008d96: f248 0301 movw r3, #32769 @ 0x8001
8008d9a: f8c2 3160 str.w r3, [r2, #352] @ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
/*Call registered Transmit complete callback*/
heth->TxCpltCallback(heth);
#else
/* Transfer complete callback */
HAL_ETH_TxCpltCallback(heth);
8008d9e: 6878 ldr r0, [r7, #4]
8008da0: f007 fcee bl 8010780 <HAL_ETH_TxCpltCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
}
/* ETH DMA Error */
if (((dma_flag & ETH_DMACSR_AIS) != 0U) && ((dma_itsource & ETH_DMACIER_AIE) != 0U))
8008da4: 693b ldr r3, [r7, #16]
8008da6: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008daa: 2b00 cmp r3, #0
8008dac: d047 beq.n 8008e3e <HAL_ETH_IRQHandler+0x126>
8008dae: 68fb ldr r3, [r7, #12]
8008db0: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008db4: 2b00 cmp r3, #0
8008db6: d042 beq.n 8008e3e <HAL_ETH_IRQHandler+0x126>
{
heth->ErrorCode |= HAL_ETH_ERROR_DMA;
8008db8: 687b ldr r3, [r7, #4]
8008dba: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
8008dbe: f043 0208 orr.w r2, r3, #8
8008dc2: 687b ldr r3, [r7, #4]
8008dc4: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* if fatal bus error occurred */
if ((dma_flag & ETH_DMACSR_FBE) != 0U)
8008dc8: 693b ldr r3, [r7, #16]
8008dca: f403 5380 and.w r3, r3, #4096 @ 0x1000
8008dce: 2b00 cmp r3, #0
8008dd0: d01e beq.n 8008e10 <HAL_ETH_IRQHandler+0xf8>
{
/* Get DMA error code */
heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_FBE | ETH_DMACSR_TPS | ETH_DMACSR_RPS));
8008dd2: 687b ldr r3, [r7, #4]
8008dd4: 681b ldr r3, [r3, #0]
8008dd6: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008dda: f8d3 2160 ldr.w r2, [r3, #352] @ 0x160
8008dde: f241 1302 movw r3, #4354 @ 0x1102
8008de2: 4013 ands r3, r2
8008de4: 687a ldr r2, [r7, #4]
8008de6: f8c2 308c str.w r3, [r2, #140] @ 0x8c
/* Disable all interrupts */
__HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMACIER_NIE | ETH_DMACIER_AIE);
8008dea: 687b ldr r3, [r7, #4]
8008dec: 681b ldr r3, [r3, #0]
8008dee: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008df2: f8d3 3134 ldr.w r3, [r3, #308] @ 0x134
8008df6: 687a ldr r2, [r7, #4]
8008df8: 6812 ldr r2, [r2, #0]
8008dfa: f423 4340 bic.w r3, r3, #49152 @ 0xc000
8008dfe: f502 5280 add.w r2, r2, #4096 @ 0x1000
8008e02: f8c2 3134 str.w r3, [r2, #308] @ 0x134
/* Set HAL state to ERROR */
heth->gState = HAL_ETH_STATE_ERROR;
8008e06: 687b ldr r3, [r7, #4]
8008e08: 22e0 movs r2, #224 @ 0xe0
8008e0a: f8c3 2084 str.w r2, [r3, #132] @ 0x84
8008e0e: e013 b.n 8008e38 <HAL_ETH_IRQHandler+0x120>
}
else
{
/* Get DMA error status */
heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
8008e10: 687b ldr r3, [r7, #4]
8008e12: 681b ldr r3, [r3, #0]
8008e14: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008e18: f8d3 3160 ldr.w r3, [r3, #352] @ 0x160
8008e1c: f403 42cd and.w r2, r3, #26240 @ 0x6680
8008e20: 687b ldr r3, [r7, #4]
8008e22: f8c3 208c str.w r2, [r3, #140] @ 0x8c
ETH_DMACSR_RBU | ETH_DMACSR_AIS));
/* Clear the interrupt summary flag */
__HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
8008e26: 687b ldr r3, [r7, #4]
8008e28: 681b ldr r3, [r3, #0]
8008e2a: f503 5380 add.w r3, r3, #4096 @ 0x1000
8008e2e: 461a mov r2, r3
8008e30: f44f 43cd mov.w r3, #26240 @ 0x6680
8008e34: f8c2 3160 str.w r3, [r2, #352] @ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
/* Call registered Error callback*/
heth->ErrorCallback(heth);
#else
/* Ethernet DMA Error callback */
HAL_ETH_ErrorCallback(heth);
8008e38: 6878 ldr r0, [r7, #4]
8008e3a: f007 fcb1 bl 80107a0 <HAL_ETH_ErrorCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
}
/* ETH MAC Error IT */
if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
8008e3e: 697b ldr r3, [r7, #20]
8008e40: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008e44: 2b00 cmp r3, #0
8008e46: d104 bne.n 8008e52 <HAL_ETH_IRQHandler+0x13a>
((mac_flag & ETH_MACIER_TXSTSIE) == ETH_MACIER_TXSTSIE))
8008e48: 697b ldr r3, [r7, #20]
8008e4a: f403 5300 and.w r3, r3, #8192 @ 0x2000
if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
8008e4e: 2b00 cmp r3, #0
8008e50: d019 beq.n 8008e86 <HAL_ETH_IRQHandler+0x16e>
{
heth->ErrorCode |= HAL_ETH_ERROR_MAC;
8008e52: 687b ldr r3, [r7, #4]
8008e54: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
8008e58: f043 0210 orr.w r2, r3, #16
8008e5c: 687b ldr r3, [r7, #4]
8008e5e: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Get MAC Rx Tx status and clear Status register pending bit */
heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR);
8008e62: 687b ldr r3, [r7, #4]
8008e64: 681b ldr r3, [r3, #0]
8008e66: f8d3 20b8 ldr.w r2, [r3, #184] @ 0xb8
8008e6a: 687b ldr r3, [r7, #4]
8008e6c: f8c3 2090 str.w r2, [r3, #144] @ 0x90
heth->gState = HAL_ETH_STATE_ERROR;
8008e70: 687b ldr r3, [r7, #4]
8008e72: 22e0 movs r2, #224 @ 0xe0
8008e74: f8c3 2084 str.w r2, [r3, #132] @ 0x84
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
/* Call registered Error callback*/
heth->ErrorCallback(heth);
#else
/* Ethernet Error callback */
HAL_ETH_ErrorCallback(heth);
8008e78: 6878 ldr r0, [r7, #4]
8008e7a: f007 fc91 bl 80107a0 <HAL_ETH_ErrorCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
heth->MACErrorCode = (uint32_t)(0x0U);
8008e7e: 687b ldr r3, [r7, #4]
8008e80: 2200 movs r2, #0
8008e82: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* ETH PMT IT */
if ((mac_flag & ETH_MAC_PMT_IT) != 0U)
8008e86: 697b ldr r3, [r7, #20]
8008e88: f003 0310 and.w r3, r3, #16
8008e8c: 2b00 cmp r3, #0
8008e8e: d00f beq.n 8008eb0 <HAL_ETH_IRQHandler+0x198>
{
/* Get MAC Wake-up source and clear the status register pending bit */
heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPRCVD));
8008e90: 687b ldr r3, [r7, #4]
8008e92: 681b ldr r3, [r3, #0]
8008e94: f8d3 30c0 ldr.w r3, [r3, #192] @ 0xc0
8008e98: f003 0260 and.w r2, r3, #96 @ 0x60
8008e9c: 687b ldr r3, [r7, #4]
8008e9e: f8c3 2094 str.w r2, [r3, #148] @ 0x94
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
/* Call registered PMT callback*/
heth->PMTCallback(heth);
#else
/* Ethernet PMT callback */
HAL_ETH_PMTCallback(heth);
8008ea2: 6878 ldr r0, [r7, #4]
8008ea4: f000 f82c bl 8008f00 <HAL_ETH_PMTCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
heth->MACWakeUpEvent = (uint32_t)(0x0U);
8008ea8: 687b ldr r3, [r7, #4]
8008eaa: 2200 movs r2, #0
8008eac: f8c3 2094 str.w r2, [r3, #148] @ 0x94
}
/* ETH EEE IT */
if ((mac_flag & ETH_MAC_LPI_IT) != 0U)
8008eb0: 697b ldr r3, [r7, #20]
8008eb2: f003 0320 and.w r3, r3, #32
8008eb6: 2b00 cmp r3, #0
8008eb8: d00f beq.n 8008eda <HAL_ETH_IRQHandler+0x1c2>
{
/* Get MAC LPI interrupt source and clear the status register pending bit */
heth->MACLPIEvent = READ_BIT(heth->Instance->MACLCSR, 0x0000000FU);
8008eba: 687b ldr r3, [r7, #4]
8008ebc: 681b ldr r3, [r3, #0]
8008ebe: f8d3 30d0 ldr.w r3, [r3, #208] @ 0xd0
8008ec2: f003 020f and.w r2, r3, #15
8008ec6: 687b ldr r3, [r7, #4]
8008ec8: f8c3 2098 str.w r2, [r3, #152] @ 0x98
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
/* Call registered EEE callback*/
heth->EEECallback(heth);
#else
/* Ethernet EEE callback */
HAL_ETH_EEECallback(heth);
8008ecc: 6878 ldr r0, [r7, #4]
8008ece: f000 f821 bl 8008f14 <HAL_ETH_EEECallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
heth->MACLPIEvent = (uint32_t)(0x0U);
8008ed2: 687b ldr r3, [r7, #4]
8008ed4: 2200 movs r2, #0
8008ed6: f8c3 2098 str.w r2, [r3, #152] @ 0x98
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
}
}
#else /* DUAL_CORE not defined */
/* check ETH WAKEUP exti flag */
if ((exti_d1_flag & ETH_WAKEUP_EXTI_LINE) != 0U)
8008eda: 68bb ldr r3, [r7, #8]
8008edc: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8008ee0: 2b00 cmp r3, #0
8008ee2: d006 beq.n 8008ef2 <HAL_ETH_IRQHandler+0x1da>
{
/* Clear ETH WAKEUP Exti pending bit */
__HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG(ETH_WAKEUP_EXTI_LINE);
8008ee4: 4b05 ldr r3, [pc, #20] @ (8008efc <HAL_ETH_IRQHandler+0x1e4>)
8008ee6: f44f 0280 mov.w r2, #4194304 @ 0x400000
8008eea: 629a str r2, [r3, #40] @ 0x28
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
/* Call registered WakeUp callback*/
heth->WakeUpCallback(heth);
#else
/* ETH WAKEUP callback */
HAL_ETH_WakeUpCallback(heth);
8008eec: 6878 ldr r0, [r7, #4]
8008eee: f000 f81b bl 8008f28 <HAL_ETH_WakeUpCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
}
#endif /* DUAL_CORE */
}
8008ef2: bf00 nop
8008ef4: 3718 adds r7, #24
8008ef6: 46bd mov sp, r7
8008ef8: bd80 pop {r7, pc}
8008efa: bf00 nop
8008efc: 58000080 .word 0x58000080
08008f00 <HAL_ETH_PMTCallback>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth)
{
8008f00: b480 push {r7}
8008f02: b083 sub sp, #12
8008f04: af00 add r7, sp, #0
8008f06: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(heth);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_ETH_PMTCallback could be implemented in the user file
*/
}
8008f08: bf00 nop
8008f0a: 370c adds r7, #12
8008f0c: 46bd mov sp, r7
8008f0e: f85d 7b04 ldr.w r7, [sp], #4
8008f12: 4770 bx lr
08008f14 <HAL_ETH_EEECallback>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth)
{
8008f14: b480 push {r7}
8008f16: b083 sub sp, #12
8008f18: af00 add r7, sp, #0
8008f1a: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(heth);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_ETH_EEECallback could be implemented in the user file
*/
}
8008f1c: bf00 nop
8008f1e: 370c adds r7, #12
8008f20: 46bd mov sp, r7
8008f22: f85d 7b04 ldr.w r7, [sp], #4
8008f26: 4770 bx lr
08008f28 <HAL_ETH_WakeUpCallback>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
__weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth)
{
8008f28: b480 push {r7}
8008f2a: b083 sub sp, #12
8008f2c: af00 add r7, sp, #0
8008f2e: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(heth);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_ETH_WakeUpCallback could be implemented in the user file
*/
}
8008f30: bf00 nop
8008f32: 370c adds r7, #12
8008f34: 46bd mov sp, r7
8008f36: f85d 7b04 ldr.w r7, [sp], #4
8008f3a: 4770 bx lr
08008f3c <HAL_ETH_ReadPHYRegister>:
* @param pRegValue: parameter to hold read value
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
uint32_t *pRegValue)
{
8008f3c: b580 push {r7, lr}
8008f3e: b086 sub sp, #24
8008f40: af00 add r7, sp, #0
8008f42: 60f8 str r0, [r7, #12]
8008f44: 60b9 str r1, [r7, #8]
8008f46: 607a str r2, [r7, #4]
8008f48: 603b str r3, [r7, #0]
uint32_t tickstart;
uint32_t tmpreg;
/* Check for the Busy flag */
if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
8008f4a: 68fb ldr r3, [r7, #12]
8008f4c: 681b ldr r3, [r3, #0]
8008f4e: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200
8008f52: f003 0301 and.w r3, r3, #1
8008f56: 2b00 cmp r3, #0
8008f58: d001 beq.n 8008f5e <HAL_ETH_ReadPHYRegister+0x22>
{
return HAL_ERROR;
8008f5a: 2301 movs r3, #1
8008f5c: e03e b.n 8008fdc <HAL_ETH_ReadPHYRegister+0xa0>
}
/* Get the MACMDIOAR value */
WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
8008f5e: 68fb ldr r3, [r7, #12]
8008f60: 681b ldr r3, [r3, #0]
8008f62: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200
8008f66: 617b str r3, [r7, #20]
- Set the PHY device address
- Set the PHY register address
- Set the read mode
- Set the MII Busy bit */
MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
8008f68: 697b ldr r3, [r7, #20]
8008f6a: f023 7278 bic.w r2, r3, #65011712 @ 0x3e00000
8008f6e: 68bb ldr r3, [r7, #8]
8008f70: 055b lsls r3, r3, #21
8008f72: 4313 orrs r3, r2
8008f74: 617b str r3, [r7, #20]
MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
8008f76: 697b ldr r3, [r7, #20]
8008f78: f423 12f8 bic.w r2, r3, #2031616 @ 0x1f0000
8008f7c: 687b ldr r3, [r7, #4]
8008f7e: 041b lsls r3, r3, #16
8008f80: 4313 orrs r3, r2
8008f82: 617b str r3, [r7, #20]
MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_RD);
8008f84: 697b ldr r3, [r7, #20]
8008f86: f043 030c orr.w r3, r3, #12
8008f8a: 617b str r3, [r7, #20]
SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
8008f8c: 697b ldr r3, [r7, #20]
8008f8e: f043 0301 orr.w r3, r3, #1
8008f92: 617b str r3, [r7, #20]
/* Write the result value into the MDII Address register */
WRITE_REG(heth->Instance->MACMDIOAR, tmpreg);
8008f94: 68fb ldr r3, [r7, #12]
8008f96: 681b ldr r3, [r3, #0]
8008f98: 697a ldr r2, [r7, #20]
8008f9a: f8c3 2200 str.w r2, [r3, #512] @ 0x200
tickstart = HAL_GetTick();
8008f9e: f7fc fd13 bl 80059c8 <HAL_GetTick>
8008fa2: 6138 str r0, [r7, #16]
/* Wait for the Busy flag */
while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
8008fa4: e009 b.n 8008fba <HAL_ETH_ReadPHYRegister+0x7e>
{
if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
8008fa6: f7fc fd0f bl 80059c8 <HAL_GetTick>
8008faa: 4602 mov r2, r0
8008fac: 693b ldr r3, [r7, #16]
8008fae: 1ad3 subs r3, r2, r3
8008fb0: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8
8008fb4: d901 bls.n 8008fba <HAL_ETH_ReadPHYRegister+0x7e>
{
return HAL_ERROR;
8008fb6: 2301 movs r3, #1
8008fb8: e010 b.n 8008fdc <HAL_ETH_ReadPHYRegister+0xa0>
while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
8008fba: 68fb ldr r3, [r7, #12]
8008fbc: 681b ldr r3, [r3, #0]
8008fbe: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200
8008fc2: f003 0301 and.w r3, r3, #1
8008fc6: 2b00 cmp r3, #0
8008fc8: d1ed bne.n 8008fa6 <HAL_ETH_ReadPHYRegister+0x6a>
}
}
/* Get MACMIIDR value */
WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR);
8008fca: 68fb ldr r3, [r7, #12]
8008fcc: 681b ldr r3, [r3, #0]
8008fce: f8d3 3204 ldr.w r3, [r3, #516] @ 0x204
8008fd2: b29b uxth r3, r3
8008fd4: 461a mov r2, r3
8008fd6: 683b ldr r3, [r7, #0]
8008fd8: 601a str r2, [r3, #0]
return HAL_OK;
8008fda: 2300 movs r3, #0
}
8008fdc: 4618 mov r0, r3
8008fde: 3718 adds r7, #24
8008fe0: 46bd mov sp, r7
8008fe2: bd80 pop {r7, pc}
08008fe4 <HAL_ETH_WritePHYRegister>:
* @param RegValue: the value to write
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
uint32_t RegValue)
{
8008fe4: b580 push {r7, lr}
8008fe6: b086 sub sp, #24
8008fe8: af00 add r7, sp, #0
8008fea: 60f8 str r0, [r7, #12]
8008fec: 60b9 str r1, [r7, #8]
8008fee: 607a str r2, [r7, #4]
8008ff0: 603b str r3, [r7, #0]
uint32_t tickstart;
uint32_t tmpreg;
/* Check for the Busy flag */
if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
8008ff2: 68fb ldr r3, [r7, #12]
8008ff4: 681b ldr r3, [r3, #0]
8008ff6: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200
8008ffa: f003 0301 and.w r3, r3, #1
8008ffe: 2b00 cmp r3, #0
8009000: d001 beq.n 8009006 <HAL_ETH_WritePHYRegister+0x22>
{
return HAL_ERROR;
8009002: 2301 movs r3, #1
8009004: e03c b.n 8009080 <HAL_ETH_WritePHYRegister+0x9c>
}
/* Get the MACMDIOAR value */
WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
8009006: 68fb ldr r3, [r7, #12]
8009008: 681b ldr r3, [r3, #0]
800900a: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200
800900e: 617b str r3, [r7, #20]
- Set the PHY device address
- Set the PHY register address
- Set the write mode
- Set the MII Busy bit */
MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
8009010: 697b ldr r3, [r7, #20]
8009012: f023 7278 bic.w r2, r3, #65011712 @ 0x3e00000
8009016: 68bb ldr r3, [r7, #8]
8009018: 055b lsls r3, r3, #21
800901a: 4313 orrs r3, r2
800901c: 617b str r3, [r7, #20]
MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
800901e: 697b ldr r3, [r7, #20]
8009020: f423 12f8 bic.w r2, r3, #2031616 @ 0x1f0000
8009024: 687b ldr r3, [r7, #4]
8009026: 041b lsls r3, r3, #16
8009028: 4313 orrs r3, r2
800902a: 617b str r3, [r7, #20]
MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_WR);
800902c: 697b ldr r3, [r7, #20]
800902e: f023 030c bic.w r3, r3, #12
8009032: f043 0304 orr.w r3, r3, #4
8009036: 617b str r3, [r7, #20]
SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
8009038: 697b ldr r3, [r7, #20]
800903a: f043 0301 orr.w r3, r3, #1
800903e: 617b str r3, [r7, #20]
/* Give the value to the MII data register */
WRITE_REG(ETH->MACMDIODR, (uint16_t)RegValue);
8009040: 683b ldr r3, [r7, #0]
8009042: b29a uxth r2, r3
8009044: 4b10 ldr r3, [pc, #64] @ (8009088 <HAL_ETH_WritePHYRegister+0xa4>)
8009046: f8c3 2204 str.w r2, [r3, #516] @ 0x204
/* Write the result value into the MII Address register */
WRITE_REG(ETH->MACMDIOAR, tmpreg);
800904a: 4a0f ldr r2, [pc, #60] @ (8009088 <HAL_ETH_WritePHYRegister+0xa4>)
800904c: 697b ldr r3, [r7, #20]
800904e: f8c2 3200 str.w r3, [r2, #512] @ 0x200
tickstart = HAL_GetTick();
8009052: f7fc fcb9 bl 80059c8 <HAL_GetTick>
8009056: 6138 str r0, [r7, #16]
/* Wait for the Busy flag */
while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
8009058: e009 b.n 800906e <HAL_ETH_WritePHYRegister+0x8a>
{
if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
800905a: f7fc fcb5 bl 80059c8 <HAL_GetTick>
800905e: 4602 mov r2, r0
8009060: 693b ldr r3, [r7, #16]
8009062: 1ad3 subs r3, r2, r3
8009064: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8
8009068: d901 bls.n 800906e <HAL_ETH_WritePHYRegister+0x8a>
{
return HAL_ERROR;
800906a: 2301 movs r3, #1
800906c: e008 b.n 8009080 <HAL_ETH_WritePHYRegister+0x9c>
while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
800906e: 68fb ldr r3, [r7, #12]
8009070: 681b ldr r3, [r3, #0]
8009072: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200
8009076: f003 0301 and.w r3, r3, #1
800907a: 2b00 cmp r3, #0
800907c: d1ed bne.n 800905a <HAL_ETH_WritePHYRegister+0x76>
}
}
return HAL_OK;
800907e: 2300 movs r3, #0
}
8009080: 4618 mov r0, r3
8009082: 3718 adds r7, #24
8009084: 46bd mov sp, r7
8009086: bd80 pop {r7, pc}
8009088: 40028000 .word 0x40028000
0800908c <HAL_ETH_GetMACConfig>:
* @param macconf: pointer to a ETH_MACConfigTypeDef structure that will hold
* the configuration of the MAC.
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_ETH_GetMACConfig(const ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf)
{
800908c: b480 push {r7}
800908e: b083 sub sp, #12
8009090: af00 add r7, sp, #0
8009092: 6078 str r0, [r7, #4]
8009094: 6039 str r1, [r7, #0]
if (macconf == NULL)
8009096: 683b ldr r3, [r7, #0]
8009098: 2b00 cmp r3, #0
800909a: d101 bne.n 80090a0 <HAL_ETH_GetMACConfig+0x14>
{
return HAL_ERROR;
800909c: 2301 movs r3, #1
800909e: e1c3 b.n 8009428 <HAL_ETH_GetMACConfig+0x39c>
}
/* Get MAC parameters */
macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN);
80090a0: 687b ldr r3, [r7, #4]
80090a2: 681b ldr r3, [r3, #0]
80090a4: 681b ldr r3, [r3, #0]
80090a6: f003 020c and.w r2, r3, #12
80090aa: 683b ldr r3, [r7, #0]
80090ac: 62da str r2, [r3, #44] @ 0x2c
macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DISABLE;
80090ae: 687b ldr r3, [r7, #4]
80090b0: 681b ldr r3, [r3, #0]
80090b2: 681b ldr r3, [r3, #0]
80090b4: f003 0310 and.w r3, r3, #16
80090b8: 2b00 cmp r3, #0
80090ba: bf14 ite ne
80090bc: 2301 movne r3, #1
80090be: 2300 moveq r3, #0
80090c0: b2db uxtb r3, r3
80090c2: 461a mov r2, r3
80090c4: 683b ldr r3, [r7, #0]
80090c6: f883 2028 strb.w r2, [r3, #40] @ 0x28
macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL);
80090ca: 687b ldr r3, [r7, #4]
80090cc: 681b ldr r3, [r3, #0]
80090ce: 681b ldr r3, [r3, #0]
80090d0: f003 0260 and.w r2, r3, #96 @ 0x60
80090d4: 683b ldr r3, [r7, #0]
80090d6: 625a str r2, [r3, #36] @ 0x24
macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE;
80090d8: 687b ldr r3, [r7, #4]
80090da: 681b ldr r3, [r3, #0]
80090dc: 681b ldr r3, [r3, #0]
80090de: f403 7380 and.w r3, r3, #256 @ 0x100
80090e2: 2b00 cmp r3, #0
80090e4: bf0c ite eq
80090e6: 2301 moveq r3, #1
80090e8: 2300 movne r3, #0
80090ea: b2db uxtb r3, r3
80090ec: 461a mov r2, r3
80090ee: 683b ldr r3, [r7, #0]
80090f0: f883 2020 strb.w r2, [r3, #32]
macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
80090f4: 687b ldr r3, [r7, #4]
80090f6: 681b ldr r3, [r3, #0]
80090f8: 681b ldr r3, [r3, #0]
80090fa: f403 7300 and.w r3, r3, #512 @ 0x200
? ENABLE : DISABLE;
80090fe: 2b00 cmp r3, #0
8009100: bf14 ite ne
8009102: 2301 movne r3, #1
8009104: 2300 moveq r3, #0
8009106: b2db uxtb r3, r3
8009108: 461a mov r2, r3
macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
800910a: 683b ldr r3, [r7, #0]
800910c: 77da strb r2, [r3, #31]
macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE;
800910e: 687b ldr r3, [r7, #4]
8009110: 681b ldr r3, [r3, #0]
8009112: 681b ldr r3, [r3, #0]
8009114: f403 6380 and.w r3, r3, #1024 @ 0x400
8009118: 2b00 cmp r3, #0
800911a: bf0c ite eq
800911c: 2301 moveq r3, #1
800911e: 2300 movne r3, #0
8009120: b2db uxtb r3, r3
8009122: 461a mov r2, r3
8009124: 683b ldr r3, [r7, #0]
8009126: 779a strb r2, [r3, #30]
macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
8009128: 687b ldr r3, [r7, #4]
800912a: 681b ldr r3, [r3, #0]
800912c: 681b ldr r3, [r3, #0]
ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE;
800912e: f403 6300 and.w r3, r3, #2048 @ 0x800
8009132: 2b00 cmp r3, #0
8009134: bf14 ite ne
8009136: 2301 movne r3, #1
8009138: 2300 moveq r3, #0
800913a: b2db uxtb r3, r3
800913c: 461a mov r2, r3
macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
800913e: 683b ldr r3, [r7, #0]
8009140: 775a strb r2, [r3, #29]
macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE;
8009142: 687b ldr r3, [r7, #4]
8009144: 681b ldr r3, [r3, #0]
8009146: 681b ldr r3, [r3, #0]
8009148: f403 5380 and.w r3, r3, #4096 @ 0x1000
800914c: 2b00 cmp r3, #0
800914e: bf14 ite ne
8009150: 2301 movne r3, #1
8009152: 2300 moveq r3, #0
8009154: b2db uxtb r3, r3
8009156: 461a mov r2, r3
8009158: 683b ldr r3, [r7, #0]
800915a: 771a strb r2, [r3, #28]
macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM);
800915c: 687b ldr r3, [r7, #4]
800915e: 681b ldr r3, [r3, #0]
8009160: 681b ldr r3, [r3, #0]
8009162: f403 5200 and.w r2, r3, #8192 @ 0x2000
8009166: 683b ldr r3, [r7, #0]
8009168: 619a str r2, [r3, #24]
macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES);
800916a: 687b ldr r3, [r7, #4]
800916c: 681b ldr r3, [r3, #0]
800916e: 681b ldr r3, [r3, #0]
8009170: f403 4280 and.w r2, r3, #16384 @ 0x4000
8009174: 683b ldr r3, [r7, #0]
8009176: 615a str r2, [r3, #20]
macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE;
8009178: 687b ldr r3, [r7, #4]
800917a: 681b ldr r3, [r3, #0]
800917c: 681b ldr r3, [r3, #0]
800917e: f403 3380 and.w r3, r3, #65536 @ 0x10000
8009182: 2b00 cmp r3, #0
8009184: bf14 ite ne
8009186: 2301 movne r3, #1
8009188: 2300 moveq r3, #0
800918a: b2db uxtb r3, r3
800918c: 461a mov r2, r3
800918e: 683b ldr r3, [r7, #0]
8009190: 749a strb r2, [r3, #18]
macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE;
8009192: 687b ldr r3, [r7, #4]
8009194: 681b ldr r3, [r3, #0]
8009196: 681b ldr r3, [r3, #0]
8009198: f403 3300 and.w r3, r3, #131072 @ 0x20000
800919c: 2b00 cmp r3, #0
800919e: bf0c ite eq
80091a0: 2301 moveq r3, #1
80091a2: 2300 movne r3, #0
80091a4: b2db uxtb r3, r3
80091a6: 461a mov r2, r3
80091a8: 683b ldr r3, [r7, #0]
80091aa: 745a strb r2, [r3, #17]
macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISABLE;
80091ac: 687b ldr r3, [r7, #4]
80091ae: 681b ldr r3, [r3, #0]
80091b0: 681b ldr r3, [r3, #0]
80091b2: f403 2300 and.w r3, r3, #524288 @ 0x80000
80091b6: 2b00 cmp r3, #0
80091b8: bf0c ite eq
80091ba: 2301 moveq r3, #1
80091bc: 2300 movne r3, #0
80091be: b2db uxtb r3, r3
80091c0: 461a mov r2, r3
80091c2: 683b ldr r3, [r7, #0]
80091c4: 741a strb r2, [r3, #16]
macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE;
80091c6: 687b ldr r3, [r7, #4]
80091c8: 681b ldr r3, [r3, #0]
80091ca: 681b ldr r3, [r3, #0]
80091cc: f403 1380 and.w r3, r3, #1048576 @ 0x100000
80091d0: 2b00 cmp r3, #0
80091d2: bf14 ite ne
80091d4: 2301 movne r3, #1
80091d6: 2300 moveq r3, #0
80091d8: b2db uxtb r3, r3
80091da: 461a mov r2, r3
80091dc: 683b ldr r3, [r7, #0]
80091de: 73da strb r2, [r3, #15]
macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENABLE : DISABLE;
80091e0: 687b ldr r3, [r7, #4]
80091e2: 681b ldr r3, [r3, #0]
80091e4: 681b ldr r3, [r3, #0]
80091e6: f403 1300 and.w r3, r3, #2097152 @ 0x200000
80091ea: 2b00 cmp r3, #0
80091ec: bf14 ite ne
80091ee: 2301 movne r3, #1
80091f0: 2300 moveq r3, #0
80091f2: b2db uxtb r3, r3
80091f4: 461a mov r2, r3
80091f6: 683b ldr r3, [r7, #0]
80091f8: 739a strb r2, [r3, #14]
macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE : DISABLE;
80091fa: 687b ldr r3, [r7, #4]
80091fc: 681b ldr r3, [r3, #0]
80091fe: 681b ldr r3, [r3, #0]
8009200: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8009204: 2b00 cmp r3, #0
8009206: bf14 ite ne
8009208: 2301 movne r3, #1
800920a: 2300 moveq r3, #0
800920c: b2db uxtb r3, r3
800920e: 461a mov r2, r3
8009210: 683b ldr r3, [r7, #0]
8009212: 735a strb r2, [r3, #13]
macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
8009214: 687b ldr r3, [r7, #4]
8009216: 681b ldr r3, [r3, #0]
8009218: 681b ldr r3, [r3, #0]
ETH_MACCR_GPSLCE) >> 23) > 0U) ? ENABLE : DISABLE;
800921a: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800921e: 2b00 cmp r3, #0
8009220: bf14 ite ne
8009222: 2301 movne r3, #1
8009224: 2300 moveq r3, #0
8009226: b2db uxtb r3, r3
8009228: 461a mov r2, r3
macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
800922a: 683b ldr r3, [r7, #0]
800922c: 731a strb r2, [r3, #12]
macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG);
800922e: 687b ldr r3, [r7, #4]
8009230: 681b ldr r3, [r3, #0]
8009232: 681b ldr r3, [r3, #0]
8009234: f003 62e0 and.w r2, r3, #117440512 @ 0x7000000
8009238: 683b ldr r3, [r7, #0]
800923a: 609a str r2, [r3, #8]
macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE : DISABLE;
800923c: 687b ldr r3, [r7, #4]
800923e: 681b ldr r3, [r3, #0]
8009240: 681b ldr r3, [r3, #0]
8009242: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
8009246: 2b00 cmp r3, #0
8009248: bf14 ite ne
800924a: 2301 movne r3, #1
800924c: 2300 moveq r3, #0
800924e: b2db uxtb r3, r3
8009250: 461a mov r2, r3
8009252: 683b ldr r3, [r7, #0]
8009254: 711a strb r2, [r3, #4]
macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC);
8009256: 687b ldr r3, [r7, #4]
8009258: 681b ldr r3, [r3, #0]
800925a: 681b ldr r3, [r3, #0]
800925c: f003 42e0 and.w r2, r3, #1879048192 @ 0x70000000
8009260: 683b ldr r3, [r7, #0]
8009262: 601a str r2, [r3, #0]
macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL);
8009264: 687b ldr r3, [r7, #4]
8009266: 681b ldr r3, [r3, #0]
8009268: 685b ldr r3, [r3, #4]
800926a: f3c3 020d ubfx r2, r3, #0, #14
800926e: 683b ldr r3, [r7, #0]
8009270: 635a str r2, [r3, #52] @ 0x34
macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_DCRCC) >> 16) == 0U) ? ENABLE : DISABLE;
8009272: 687b ldr r3, [r7, #4]
8009274: 681b ldr r3, [r3, #0]
8009276: 685b ldr r3, [r3, #4]
8009278: f403 3380 and.w r3, r3, #65536 @ 0x10000
800927c: 2b00 cmp r3, #0
800927e: bf0c ite eq
8009280: 2301 moveq r3, #1
8009282: 2300 movne r3, #0
8009284: b2db uxtb r3, r3
8009286: 461a mov r2, r3
8009288: 683b ldr r3, [r7, #0]
800928a: f883 2032 strb.w r2, [r3, #50] @ 0x32
macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? ENABLE : DISABLE;
800928e: 687b ldr r3, [r7, #4]
8009290: 681b ldr r3, [r3, #0]
8009292: 685b ldr r3, [r3, #4]
8009294: f403 3300 and.w r3, r3, #131072 @ 0x20000
8009298: 2b00 cmp r3, #0
800929a: bf14 ite ne
800929c: 2301 movne r3, #1
800929e: 2300 moveq r3, #0
80092a0: b2db uxtb r3, r3
80092a2: 461a mov r2, r3
80092a4: 683b ldr r3, [r7, #0]
80092a6: f883 2031 strb.w r2, [r3, #49] @ 0x31
macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
80092aa: 687b ldr r3, [r7, #4]
80092ac: 681b ldr r3, [r3, #0]
80092ae: 685b ldr r3, [r3, #4]
ETH_MACECR_USP) >> 18) > 0U) ? ENABLE : DISABLE;
80092b0: f403 2380 and.w r3, r3, #262144 @ 0x40000
80092b4: 2b00 cmp r3, #0
80092b6: bf14 ite ne
80092b8: 2301 movne r3, #1
80092ba: 2300 moveq r3, #0
80092bc: b2db uxtb r3, r3
80092be: 461a mov r2, r3
macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
80092c0: 683b ldr r3, [r7, #0]
80092c2: f883 2030 strb.w r2, [r3, #48] @ 0x30
macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
80092c6: 687b ldr r3, [r7, #4]
80092c8: 681b ldr r3, [r3, #0]
80092ca: 685b ldr r3, [r3, #4]
80092cc: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
? ENABLE : DISABLE;
80092d0: 2b00 cmp r3, #0
80092d2: bf14 ite ne
80092d4: 2301 movne r3, #1
80092d6: 2300 moveq r3, #0
80092d8: b2db uxtb r3, r3
80092da: 461a mov r2, r3
macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
80092dc: 683b ldr r3, [r7, #0]
80092de: f883 2038 strb.w r2, [r3, #56] @ 0x38
macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25;
80092e2: 687b ldr r3, [r7, #4]
80092e4: 681b ldr r3, [r3, #0]
80092e6: 685b ldr r3, [r3, #4]
80092e8: 0e5b lsrs r3, r3, #25
80092ea: f003 021f and.w r2, r3, #31
80092ee: 683b ldr r3, [r7, #0]
80092f0: 63da str r2, [r3, #60] @ 0x3c
macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? ENABLE : DISABLE;
80092f2: 687b ldr r3, [r7, #4]
80092f4: 681b ldr r3, [r3, #0]
80092f6: 68db ldr r3, [r3, #12]
80092f8: f403 7380 and.w r3, r3, #256 @ 0x100
80092fc: 2b00 cmp r3, #0
80092fe: bf14 ite ne
8009300: 2301 movne r3, #1
8009302: 2300 moveq r3, #0
8009304: b2db uxtb r3, r3
8009306: 461a mov r2, r3
8009308: 683b ldr r3, [r7, #0]
800930a: f883 2040 strb.w r2, [r3, #64] @ 0x40
macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO);
800930e: 687b ldr r3, [r7, #4]
8009310: 681b ldr r3, [r3, #0]
8009312: 68db ldr r3, [r3, #12]
8009314: f003 020f and.w r2, r3, #15
8009318: 683b ldr r3, [r7, #0]
800931a: 645a str r2, [r3, #68] @ 0x44
macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_TFE) >> 1) > 0U) ? ENABLE : DISABLE;
800931c: 687b ldr r3, [r7, #4]
800931e: 681b ldr r3, [r3, #0]
8009320: 6f1b ldr r3, [r3, #112] @ 0x70
8009322: f003 0302 and.w r3, r3, #2
8009326: 2b00 cmp r3, #0
8009328: bf14 ite ne
800932a: 2301 movne r3, #1
800932c: 2300 moveq r3, #0
800932e: b2db uxtb r3, r3
8009330: 461a mov r2, r3
8009332: 683b ldr r3, [r7, #0]
8009334: f883 2054 strb.w r2, [r3, #84] @ 0x54
macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_DZPQ) >> 7) == 0U) ? ENABLE : DISABLE;
8009338: 687b ldr r3, [r7, #4]
800933a: 681b ldr r3, [r3, #0]
800933c: 6f1b ldr r3, [r3, #112] @ 0x70
800933e: f003 0380 and.w r3, r3, #128 @ 0x80
8009342: 2b00 cmp r3, #0
8009344: bf0c ite eq
8009346: 2301 moveq r3, #1
8009348: 2300 movne r3, #0
800934a: b2db uxtb r3, r3
800934c: 461a mov r2, r3
800934e: 683b ldr r3, [r7, #0]
8009350: f883 204c strb.w r2, [r3, #76] @ 0x4c
macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PLT);
8009354: 687b ldr r3, [r7, #4]
8009356: 681b ldr r3, [r3, #0]
8009358: 6f1b ldr r3, [r3, #112] @ 0x70
800935a: f003 0270 and.w r2, r3, #112 @ 0x70
800935e: 683b ldr r3, [r7, #0]
8009360: 651a str r2, [r3, #80] @ 0x50
macconf->PauseTime = (READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PT) >> 16);
8009362: 687b ldr r3, [r7, #4]
8009364: 681b ldr r3, [r3, #0]
8009366: 6f1b ldr r3, [r3, #112] @ 0x70
8009368: 0c1b lsrs r3, r3, #16
800936a: b29a uxth r2, r3
800936c: 683b ldr r3, [r7, #0]
800936e: 649a str r2, [r3, #72] @ 0x48
macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_RFE) > 0U) ? ENABLE : DISABLE;
8009370: 687b ldr r3, [r7, #4]
8009372: 681b ldr r3, [r3, #0]
8009374: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
8009378: f003 0301 and.w r3, r3, #1
800937c: 2b00 cmp r3, #0
800937e: bf14 ite ne
8009380: 2301 movne r3, #1
8009382: 2300 moveq r3, #0
8009384: b2db uxtb r3, r3
8009386: 461a mov r2, r3
8009388: 683b ldr r3, [r7, #0]
800938a: f883 2056 strb.w r2, [r3, #86] @ 0x56
macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
800938e: 687b ldr r3, [r7, #4]
8009390: 681b ldr r3, [r3, #0]
8009392: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
8009396: f003 0302 and.w r3, r3, #2
? ENABLE : DISABLE;
800939a: 2b00 cmp r3, #0
800939c: bf14 ite ne
800939e: 2301 movne r3, #1
80093a0: 2300 moveq r3, #0
80093a2: b2db uxtb r3, r3
80093a4: 461a mov r2, r3
macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
80093a6: 683b ldr r3, [r7, #0]
80093a8: f883 2055 strb.w r2, [r3, #85] @ 0x55
macconf->TransmitQueueMode = READ_BIT(heth->Instance->MTLTQOMR, (ETH_MTLTQOMR_TTC | ETH_MTLTQOMR_TSF));
80093ac: 687b ldr r3, [r7, #4]
80093ae: 681b ldr r3, [r3, #0]
80093b0: f8d3 3d00 ldr.w r3, [r3, #3328] @ 0xd00
80093b4: f003 0272 and.w r2, r3, #114 @ 0x72
80093b8: 683b ldr r3, [r7, #0]
80093ba: 659a str r2, [r3, #88] @ 0x58
macconf->ReceiveQueueMode = READ_BIT(heth->Instance->MTLRQOMR, (ETH_MTLRQOMR_RTC | ETH_MTLRQOMR_RSF));
80093bc: 687b ldr r3, [r7, #4]
80093be: 681b ldr r3, [r3, #0]
80093c0: f8d3 3d30 ldr.w r3, [r3, #3376] @ 0xd30
80093c4: f003 0223 and.w r2, r3, #35 @ 0x23
80093c8: 683b ldr r3, [r7, #0]
80093ca: 65da str r2, [r3, #92] @ 0x5c
macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
80093cc: 687b ldr r3, [r7, #4]
80093ce: 681b ldr r3, [r3, #0]
80093d0: f8d3 3d30 ldr.w r3, [r3, #3376] @ 0xd30
ETH_MTLRQOMR_FUP) >> 3) > 0U) ? ENABLE : DISABLE;
80093d4: f003 0308 and.w r3, r3, #8
80093d8: 2b00 cmp r3, #0
80093da: bf14 ite ne
80093dc: 2301 movne r3, #1
80093de: 2300 moveq r3, #0
80093e0: b2db uxtb r3, r3
80093e2: 461a mov r2, r3
macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
80093e4: 683b ldr r3, [r7, #0]
80093e6: f883 2062 strb.w r2, [r3, #98] @ 0x62
macconf->ForwardRxErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_FEP) >> 4) > 0U) ? ENABLE : DISABLE;
80093ea: 687b ldr r3, [r7, #4]
80093ec: 681b ldr r3, [r3, #0]
80093ee: f8d3 3d30 ldr.w r3, [r3, #3376] @ 0xd30
80093f2: f003 0310 and.w r3, r3, #16
80093f6: 2b00 cmp r3, #0
80093f8: bf14 ite ne
80093fa: 2301 movne r3, #1
80093fc: 2300 moveq r3, #0
80093fe: b2db uxtb r3, r3
8009400: 461a mov r2, r3
8009402: 683b ldr r3, [r7, #0]
8009404: f883 2061 strb.w r2, [r3, #97] @ 0x61
macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
8009408: 687b ldr r3, [r7, #4]
800940a: 681b ldr r3, [r3, #0]
800940c: f8d3 3d30 ldr.w r3, [r3, #3376] @ 0xd30
ETH_MTLRQOMR_DISTCPEF) >> 6) == 0U) ? ENABLE : DISABLE;
8009410: f003 0340 and.w r3, r3, #64 @ 0x40
8009414: 2b00 cmp r3, #0
8009416: bf0c ite eq
8009418: 2301 moveq r3, #1
800941a: 2300 movne r3, #0
800941c: b2db uxtb r3, r3
800941e: 461a mov r2, r3
macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
8009420: 683b ldr r3, [r7, #0]
8009422: f883 2060 strb.w r2, [r3, #96] @ 0x60
return HAL_OK;
8009426: 2300 movs r3, #0
}
8009428: 4618 mov r0, r3
800942a: 370c adds r7, #12
800942c: 46bd mov sp, r7
800942e: f85d 7b04 ldr.w r7, [sp], #4
8009432: 4770 bx lr
08009434 <HAL_ETH_SetMACConfig>:
* @param macconf: pointer to a ETH_MACConfigTypeDef structure that contains
* the configuration of the MAC.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf)
{
8009434: b580 push {r7, lr}
8009436: b082 sub sp, #8
8009438: af00 add r7, sp, #0
800943a: 6078 str r0, [r7, #4]
800943c: 6039 str r1, [r7, #0]
if (macconf == NULL)
800943e: 683b ldr r3, [r7, #0]
8009440: 2b00 cmp r3, #0
8009442: d101 bne.n 8009448 <HAL_ETH_SetMACConfig+0x14>
{
return HAL_ERROR;
8009444: 2301 movs r3, #1
8009446: e00b b.n 8009460 <HAL_ETH_SetMACConfig+0x2c>
}
if (heth->gState == HAL_ETH_STATE_READY)
8009448: 687b ldr r3, [r7, #4]
800944a: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800944e: 2b10 cmp r3, #16
8009450: d105 bne.n 800945e <HAL_ETH_SetMACConfig+0x2a>
{
ETH_SetMACConfig(heth, macconf);
8009452: 6839 ldr r1, [r7, #0]
8009454: 6878 ldr r0, [r7, #4]
8009456: f000 f865 bl 8009524 <ETH_SetMACConfig>
return HAL_OK;
800945a: 2300 movs r3, #0
800945c: e000 b.n 8009460 <HAL_ETH_SetMACConfig+0x2c>
}
else
{
return HAL_ERROR;
800945e: 2301 movs r3, #1
}
}
8009460: 4618 mov r0, r3
8009462: 3708 adds r7, #8
8009464: 46bd mov sp, r7
8009466: bd80 pop {r7, pc}
08009468 <HAL_ETH_SetMDIOClockRange>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth)
{
8009468: b580 push {r7, lr}
800946a: b084 sub sp, #16
800946c: af00 add r7, sp, #0
800946e: 6078 str r0, [r7, #4]
uint32_t hclk;
uint32_t tmpreg;
/* Get the ETHERNET MACMDIOAR value */
tmpreg = (heth->Instance)->MACMDIOAR;
8009470: 687b ldr r3, [r7, #4]
8009472: 681b ldr r3, [r3, #0]
8009474: f8d3 3200 ldr.w r3, [r3, #512] @ 0x200
8009478: 60fb str r3, [r7, #12]
/* Clear CSR Clock Range bits */
tmpreg &= ~ETH_MACMDIOAR_CR;
800947a: 68fb ldr r3, [r7, #12]
800947c: f423 6370 bic.w r3, r3, #3840 @ 0xf00
8009480: 60fb str r3, [r7, #12]
/* Get hclk frequency value */
hclk = HAL_RCC_GetHCLKFreq();
8009482: f002 f8e5 bl 800b650 <HAL_RCC_GetHCLKFreq>
8009486: 60b8 str r0, [r7, #8]
/* Set CR bits depending on hclk value */
if (hclk < 35000000U)
8009488: 68bb ldr r3, [r7, #8]
800948a: 4a1a ldr r2, [pc, #104] @ (80094f4 <HAL_ETH_SetMDIOClockRange+0x8c>)
800948c: 4293 cmp r3, r2
800948e: d804 bhi.n 800949a <HAL_ETH_SetMDIOClockRange+0x32>
{
/* CSR Clock Range between 0-35 MHz */
tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV16;
8009490: 68fb ldr r3, [r7, #12]
8009492: f443 7300 orr.w r3, r3, #512 @ 0x200
8009496: 60fb str r3, [r7, #12]
8009498: e022 b.n 80094e0 <HAL_ETH_SetMDIOClockRange+0x78>
}
else if (hclk < 60000000U)
800949a: 68bb ldr r3, [r7, #8]
800949c: 4a16 ldr r2, [pc, #88] @ (80094f8 <HAL_ETH_SetMDIOClockRange+0x90>)
800949e: 4293 cmp r3, r2
80094a0: d204 bcs.n 80094ac <HAL_ETH_SetMDIOClockRange+0x44>
{
/* CSR Clock Range between 35-60 MHz */
tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV26;
80094a2: 68fb ldr r3, [r7, #12]
80094a4: f443 7340 orr.w r3, r3, #768 @ 0x300
80094a8: 60fb str r3, [r7, #12]
80094aa: e019 b.n 80094e0 <HAL_ETH_SetMDIOClockRange+0x78>
}
else if (hclk < 100000000U)
80094ac: 68bb ldr r3, [r7, #8]
80094ae: 4a13 ldr r2, [pc, #76] @ (80094fc <HAL_ETH_SetMDIOClockRange+0x94>)
80094b0: 4293 cmp r3, r2
80094b2: d915 bls.n 80094e0 <HAL_ETH_SetMDIOClockRange+0x78>
{
/* CSR Clock Range between 60-100 MHz */
tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42;
}
else if (hclk < 150000000U)
80094b4: 68bb ldr r3, [r7, #8]
80094b6: 4a12 ldr r2, [pc, #72] @ (8009500 <HAL_ETH_SetMDIOClockRange+0x98>)
80094b8: 4293 cmp r3, r2
80094ba: d804 bhi.n 80094c6 <HAL_ETH_SetMDIOClockRange+0x5e>
{
/* CSR Clock Range between 100-150 MHz */
tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV62;
80094bc: 68fb ldr r3, [r7, #12]
80094be: f443 7380 orr.w r3, r3, #256 @ 0x100
80094c2: 60fb str r3, [r7, #12]
80094c4: e00c b.n 80094e0 <HAL_ETH_SetMDIOClockRange+0x78>
}
else if (hclk < 250000000U)
80094c6: 68bb ldr r3, [r7, #8]
80094c8: 4a0e ldr r2, [pc, #56] @ (8009504 <HAL_ETH_SetMDIOClockRange+0x9c>)
80094ca: 4293 cmp r3, r2
80094cc: d804 bhi.n 80094d8 <HAL_ETH_SetMDIOClockRange+0x70>
{
/* CSR Clock Range between 150-250 MHz */
tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV102;
80094ce: 68fb ldr r3, [r7, #12]
80094d0: f443 6380 orr.w r3, r3, #1024 @ 0x400
80094d4: 60fb str r3, [r7, #12]
80094d6: e003 b.n 80094e0 <HAL_ETH_SetMDIOClockRange+0x78>
}
else /* (hclk >= 250000000U) */
{
/* CSR Clock >= 250 MHz */
tmpreg |= (uint32_t)(ETH_MACMDIOAR_CR_DIV124);
80094d8: 68fb ldr r3, [r7, #12]
80094da: f443 63a0 orr.w r3, r3, #1280 @ 0x500
80094de: 60fb str r3, [r7, #12]
}
/* Configure the CSR Clock Range */
(heth->Instance)->MACMDIOAR = (uint32_t)tmpreg;
80094e0: 687b ldr r3, [r7, #4]
80094e2: 681b ldr r3, [r3, #0]
80094e4: 68fa ldr r2, [r7, #12]
80094e6: f8c3 2200 str.w r2, [r3, #512] @ 0x200
}
80094ea: bf00 nop
80094ec: 3710 adds r7, #16
80094ee: 46bd mov sp, r7
80094f0: bd80 pop {r7, pc}
80094f2: bf00 nop
80094f4: 02160ebf .word 0x02160ebf
80094f8: 03938700 .word 0x03938700
80094fc: 05f5e0ff .word 0x05f5e0ff
8009500: 08f0d17f .word 0x08f0d17f
8009504: 0ee6b27f .word 0x0ee6b27f
08009508 <HAL_ETH_GetDMAError>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval ETH DMA Error Code
*/
uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth)
{
8009508: b480 push {r7}
800950a: b083 sub sp, #12
800950c: af00 add r7, sp, #0
800950e: 6078 str r0, [r7, #4]
return heth->DMAErrorCode;
8009510: 687b ldr r3, [r7, #4]
8009512: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
}
8009516: 4618 mov r0, r3
8009518: 370c adds r7, #12
800951a: 46bd mov sp, r7
800951c: f85d 7b04 ldr.w r7, [sp], #4
8009520: 4770 bx lr
...
08009524 <ETH_SetMACConfig>:
/** @addtogroup ETH_Private_Functions ETH Private Functions
* @{
*/
static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf)
{
8009524: b480 push {r7}
8009526: b085 sub sp, #20
8009528: af00 add r7, sp, #0
800952a: 6078 str r0, [r7, #4]
800952c: 6039 str r1, [r7, #0]
uint32_t macregval;
/*------------------------ MACCR Configuration --------------------*/
macregval = (macconf->InterPacketGapVal |
800952e: 683b ldr r3, [r7, #0]
8009530: 689a ldr r2, [r3, #8]
macconf->SourceAddrControl |
8009532: 683b ldr r3, [r7, #0]
8009534: 681b ldr r3, [r3, #0]
macregval = (macconf->InterPacketGapVal |
8009536: 431a orrs r2, r3
((uint32_t)macconf->ChecksumOffload << 27) |
8009538: 683b ldr r3, [r7, #0]
800953a: 791b ldrb r3, [r3, #4]
800953c: 06db lsls r3, r3, #27
macconf->SourceAddrControl |
800953e: 431a orrs r2, r3
((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
8009540: 683b ldr r3, [r7, #0]
8009542: 7b1b ldrb r3, [r3, #12]
8009544: 05db lsls r3, r3, #23
((uint32_t)macconf->ChecksumOffload << 27) |
8009546: 431a orrs r2, r3
((uint32_t)macconf->Support2KPacket << 22) |
8009548: 683b ldr r3, [r7, #0]
800954a: 7b5b ldrb r3, [r3, #13]
800954c: 059b lsls r3, r3, #22
((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
800954e: 431a orrs r2, r3
((uint32_t)macconf->CRCStripTypePacket << 21) |
8009550: 683b ldr r3, [r7, #0]
8009552: 7b9b ldrb r3, [r3, #14]
8009554: 055b lsls r3, r3, #21
((uint32_t)macconf->Support2KPacket << 22) |
8009556: 431a orrs r2, r3
((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
8009558: 683b ldr r3, [r7, #0]
800955a: 7bdb ldrb r3, [r3, #15]
800955c: 051b lsls r3, r3, #20
((uint32_t)macconf->CRCStripTypePacket << 21) |
800955e: 4313 orrs r3, r2
((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
8009560: 683a ldr r2, [r7, #0]
8009562: 7c12 ldrb r2, [r2, #16]
8009564: 2a00 cmp r2, #0
8009566: d102 bne.n 800956e <ETH_SetMACConfig+0x4a>
8009568: f44f 2200 mov.w r2, #524288 @ 0x80000
800956c: e000 b.n 8009570 <ETH_SetMACConfig+0x4c>
800956e: 2200 movs r2, #0
((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
8009570: 4313 orrs r3, r2
((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
8009572: 683a ldr r2, [r7, #0]
8009574: 7c52 ldrb r2, [r2, #17]
8009576: 2a00 cmp r2, #0
8009578: d102 bne.n 8009580 <ETH_SetMACConfig+0x5c>
800957a: f44f 3200 mov.w r2, #131072 @ 0x20000
800957e: e000 b.n 8009582 <ETH_SetMACConfig+0x5e>
8009580: 2200 movs r2, #0
((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
8009582: 431a orrs r2, r3
((uint32_t)macconf->JumboPacket << 16) |
8009584: 683b ldr r3, [r7, #0]
8009586: 7c9b ldrb r3, [r3, #18]
8009588: 041b lsls r3, r3, #16
((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
800958a: 431a orrs r2, r3
macconf->Speed |
800958c: 683b ldr r3, [r7, #0]
800958e: 695b ldr r3, [r3, #20]
((uint32_t)macconf->JumboPacket << 16) |
8009590: 431a orrs r2, r3
macconf->DuplexMode |
8009592: 683b ldr r3, [r7, #0]
8009594: 699b ldr r3, [r3, #24]
macconf->Speed |
8009596: 431a orrs r2, r3
((uint32_t)macconf->LoopbackMode << 12) |
8009598: 683b ldr r3, [r7, #0]
800959a: 7f1b ldrb r3, [r3, #28]
800959c: 031b lsls r3, r3, #12
macconf->DuplexMode |
800959e: 431a orrs r2, r3
((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
80095a0: 683b ldr r3, [r7, #0]
80095a2: 7f5b ldrb r3, [r3, #29]
80095a4: 02db lsls r3, r3, #11
((uint32_t)macconf->LoopbackMode << 12) |
80095a6: 4313 orrs r3, r2
((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
80095a8: 683a ldr r2, [r7, #0]
80095aa: 7f92 ldrb r2, [r2, #30]
80095ac: 2a00 cmp r2, #0
80095ae: d102 bne.n 80095b6 <ETH_SetMACConfig+0x92>
80095b0: f44f 6280 mov.w r2, #1024 @ 0x400
80095b4: e000 b.n 80095b8 <ETH_SetMACConfig+0x94>
80095b6: 2200 movs r2, #0
((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
80095b8: 431a orrs r2, r3
((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
80095ba: 683b ldr r3, [r7, #0]
80095bc: 7fdb ldrb r3, [r3, #31]
80095be: 025b lsls r3, r3, #9
((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
80095c0: 4313 orrs r3, r2
((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
80095c2: 683a ldr r2, [r7, #0]
80095c4: f892 2020 ldrb.w r2, [r2, #32]
80095c8: 2a00 cmp r2, #0
80095ca: d102 bne.n 80095d2 <ETH_SetMACConfig+0xae>
80095cc: f44f 7280 mov.w r2, #256 @ 0x100
80095d0: e000 b.n 80095d4 <ETH_SetMACConfig+0xb0>
80095d2: 2200 movs r2, #0
((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
80095d4: 431a orrs r2, r3
macconf->BackOffLimit |
80095d6: 683b ldr r3, [r7, #0]
80095d8: 6a5b ldr r3, [r3, #36] @ 0x24
((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
80095da: 431a orrs r2, r3
((uint32_t)macconf->DeferralCheck << 4) |
80095dc: 683b ldr r3, [r7, #0]
80095de: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
80095e2: 011b lsls r3, r3, #4
macconf->BackOffLimit |
80095e4: 431a orrs r2, r3
macconf->PreambleLength);
80095e6: 683b ldr r3, [r7, #0]
80095e8: 6adb ldr r3, [r3, #44] @ 0x2c
macregval = (macconf->InterPacketGapVal |
80095ea: 4313 orrs r3, r2
80095ec: 60fb str r3, [r7, #12]
/* Write to MACCR */
MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval);
80095ee: 687b ldr r3, [r7, #4]
80095f0: 681b ldr r3, [r3, #0]
80095f2: 681a ldr r2, [r3, #0]
80095f4: 4b56 ldr r3, [pc, #344] @ (8009750 <ETH_SetMACConfig+0x22c>)
80095f6: 4013 ands r3, r2
80095f8: 687a ldr r2, [r7, #4]
80095fa: 6812 ldr r2, [r2, #0]
80095fc: 68f9 ldr r1, [r7, #12]
80095fe: 430b orrs r3, r1
8009600: 6013 str r3, [r2, #0]
/*------------------------ MACECR Configuration --------------------*/
macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
8009602: 683b ldr r3, [r7, #0]
8009604: 6bdb ldr r3, [r3, #60] @ 0x3c
8009606: 065a lsls r2, r3, #25
((uint32_t)macconf->ExtendedInterPacketGap << 24) |
8009608: 683b ldr r3, [r7, #0]
800960a: f893 3038 ldrb.w r3, [r3, #56] @ 0x38
800960e: 061b lsls r3, r3, #24
macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
8009610: 431a orrs r2, r3
((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
8009612: 683b ldr r3, [r7, #0]
8009614: f893 3030 ldrb.w r3, [r3, #48] @ 0x30
8009618: 049b lsls r3, r3, #18
((uint32_t)macconf->ExtendedInterPacketGap << 24) |
800961a: 431a orrs r2, r3
((uint32_t)macconf->SlowProtocolDetect << 17) |
800961c: 683b ldr r3, [r7, #0]
800961e: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8009622: 045b lsls r3, r3, #17
((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
8009624: 4313 orrs r3, r2
((uint32_t)((macconf->CRCCheckingRxPackets == DISABLE) ? 1U : 0U) << 16) |
8009626: 683a ldr r2, [r7, #0]
8009628: f892 2032 ldrb.w r2, [r2, #50] @ 0x32
800962c: 2a00 cmp r2, #0
800962e: d102 bne.n 8009636 <ETH_SetMACConfig+0x112>
8009630: f44f 3280 mov.w r2, #65536 @ 0x10000
8009634: e000 b.n 8009638 <ETH_SetMACConfig+0x114>
8009636: 2200 movs r2, #0
((uint32_t)macconf->SlowProtocolDetect << 17) |
8009638: 431a orrs r2, r3
macconf->GiantPacketSizeLimit);
800963a: 683b ldr r3, [r7, #0]
800963c: 6b5b ldr r3, [r3, #52] @ 0x34
macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
800963e: 4313 orrs r3, r2
8009640: 60fb str r3, [r7, #12]
/* Write to MACECR */
MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval);
8009642: 687b ldr r3, [r7, #4]
8009644: 681b ldr r3, [r3, #0]
8009646: 685a ldr r2, [r3, #4]
8009648: 4b42 ldr r3, [pc, #264] @ (8009754 <ETH_SetMACConfig+0x230>)
800964a: 4013 ands r3, r2
800964c: 687a ldr r2, [r7, #4]
800964e: 6812 ldr r2, [r2, #0]
8009650: 68f9 ldr r1, [r7, #12]
8009652: 430b orrs r3, r1
8009654: 6053 str r3, [r2, #4]
/*------------------------ MACWTR Configuration --------------------*/
macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
8009656: 683b ldr r3, [r7, #0]
8009658: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
800965c: 021a lsls r2, r3, #8
macconf->WatchdogTimeout);
800965e: 683b ldr r3, [r7, #0]
8009660: 6c5b ldr r3, [r3, #68] @ 0x44
macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
8009662: 4313 orrs r3, r2
8009664: 60fb str r3, [r7, #12]
/* Write to MACWTR */
MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval);
8009666: 687b ldr r3, [r7, #4]
8009668: 681b ldr r3, [r3, #0]
800966a: 68da ldr r2, [r3, #12]
800966c: 4b3a ldr r3, [pc, #232] @ (8009758 <ETH_SetMACConfig+0x234>)
800966e: 4013 ands r3, r2
8009670: 687a ldr r2, [r7, #4]
8009672: 6812 ldr r2, [r2, #0]
8009674: 68f9 ldr r1, [r7, #12]
8009676: 430b orrs r3, r1
8009678: 60d3 str r3, [r2, #12]
/*------------------------ MACTFCR Configuration --------------------*/
macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
800967a: 683b ldr r3, [r7, #0]
800967c: f893 3054 ldrb.w r3, [r3, #84] @ 0x54
8009680: 005a lsls r2, r3, #1
macconf->PauseLowThreshold |
8009682: 683b ldr r3, [r7, #0]
8009684: 6d1b ldr r3, [r3, #80] @ 0x50
macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
8009686: 4313 orrs r3, r2
((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7) |
8009688: 683a ldr r2, [r7, #0]
800968a: f892 204c ldrb.w r2, [r2, #76] @ 0x4c
800968e: 2a00 cmp r2, #0
8009690: d101 bne.n 8009696 <ETH_SetMACConfig+0x172>
8009692: 2280 movs r2, #128 @ 0x80
8009694: e000 b.n 8009698 <ETH_SetMACConfig+0x174>
8009696: 2200 movs r2, #0
macconf->PauseLowThreshold |
8009698: 431a orrs r2, r3
(macconf->PauseTime << 16));
800969a: 683b ldr r3, [r7, #0]
800969c: 6c9b ldr r3, [r3, #72] @ 0x48
800969e: 041b lsls r3, r3, #16
macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
80096a0: 4313 orrs r3, r2
80096a2: 60fb str r3, [r7, #12]
/* Write to MACTFCR */
MODIFY_REG(heth->Instance->MACTFCR, ETH_MACTFCR_MASK, macregval);
80096a4: 687b ldr r3, [r7, #4]
80096a6: 681b ldr r3, [r3, #0]
80096a8: 6f1a ldr r2, [r3, #112] @ 0x70
80096aa: f64f 730d movw r3, #65293 @ 0xff0d
80096ae: 4013 ands r3, r2
80096b0: 687a ldr r2, [r7, #4]
80096b2: 6812 ldr r2, [r2, #0]
80096b4: 68f9 ldr r1, [r7, #12]
80096b6: 430b orrs r3, r1
80096b8: 6713 str r3, [r2, #112] @ 0x70
/*------------------------ MACRFCR Configuration --------------------*/
macregval = ((uint32_t)macconf->ReceiveFlowControl |
80096ba: 683b ldr r3, [r7, #0]
80096bc: f893 3056 ldrb.w r3, [r3, #86] @ 0x56
80096c0: 461a mov r2, r3
((uint32_t)macconf->UnicastPausePacketDetect << 1));
80096c2: 683b ldr r3, [r7, #0]
80096c4: f893 3055 ldrb.w r3, [r3, #85] @ 0x55
80096c8: 005b lsls r3, r3, #1
macregval = ((uint32_t)macconf->ReceiveFlowControl |
80096ca: 4313 orrs r3, r2
80096cc: 60fb str r3, [r7, #12]
/* Write to MACRFCR */
MODIFY_REG(heth->Instance->MACRFCR, ETH_MACRFCR_MASK, macregval);
80096ce: 687b ldr r3, [r7, #4]
80096d0: 681b ldr r3, [r3, #0]
80096d2: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
80096d6: f023 0103 bic.w r1, r3, #3
80096da: 687b ldr r3, [r7, #4]
80096dc: 681b ldr r3, [r3, #0]
80096de: 68fa ldr r2, [r7, #12]
80096e0: 430a orrs r2, r1
80096e2: f8c3 2090 str.w r2, [r3, #144] @ 0x90
/*------------------------ MTLTQOMR Configuration --------------------*/
/* Write to MTLTQOMR */
MODIFY_REG(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_MASK, macconf->TransmitQueueMode);
80096e6: 687b ldr r3, [r7, #4]
80096e8: 681b ldr r3, [r3, #0]
80096ea: f8d3 3d00 ldr.w r3, [r3, #3328] @ 0xd00
80096ee: f023 0172 bic.w r1, r3, #114 @ 0x72
80096f2: 683b ldr r3, [r7, #0]
80096f4: 6d9a ldr r2, [r3, #88] @ 0x58
80096f6: 687b ldr r3, [r7, #4]
80096f8: 681b ldr r3, [r3, #0]
80096fa: 430a orrs r2, r1
80096fc: f8c3 2d00 str.w r2, [r3, #3328] @ 0xd00
/*------------------------ MTLRQOMR Configuration --------------------*/
macregval = (macconf->ReceiveQueueMode |
8009700: 683b ldr r3, [r7, #0]
8009702: 6ddb ldr r3, [r3, #92] @ 0x5c
((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
8009704: 683a ldr r2, [r7, #0]
8009706: f892 2060 ldrb.w r2, [r2, #96] @ 0x60
800970a: 2a00 cmp r2, #0
800970c: d101 bne.n 8009712 <ETH_SetMACConfig+0x1ee>
800970e: 2240 movs r2, #64 @ 0x40
8009710: e000 b.n 8009714 <ETH_SetMACConfig+0x1f0>
8009712: 2200 movs r2, #0
macregval = (macconf->ReceiveQueueMode |
8009714: 431a orrs r2, r3
((uint32_t)macconf->ForwardRxErrorPacket << 4) |
8009716: 683b ldr r3, [r7, #0]
8009718: f893 3061 ldrb.w r3, [r3, #97] @ 0x61
800971c: 011b lsls r3, r3, #4
((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
800971e: 431a orrs r2, r3
((uint32_t)macconf->ForwardRxUndersizedGoodPacket << 3));
8009720: 683b ldr r3, [r7, #0]
8009722: f893 3062 ldrb.w r3, [r3, #98] @ 0x62
8009726: 00db lsls r3, r3, #3
macregval = (macconf->ReceiveQueueMode |
8009728: 4313 orrs r3, r2
800972a: 60fb str r3, [r7, #12]
/* Write to MTLRQOMR */
MODIFY_REG(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_MASK, macregval);
800972c: 687b ldr r3, [r7, #4]
800972e: 681b ldr r3, [r3, #0]
8009730: f8d3 3d30 ldr.w r3, [r3, #3376] @ 0xd30
8009734: f023 017b bic.w r1, r3, #123 @ 0x7b
8009738: 687b ldr r3, [r7, #4]
800973a: 681b ldr r3, [r3, #0]
800973c: 68fa ldr r2, [r7, #12]
800973e: 430a orrs r2, r1
8009740: f8c3 2d30 str.w r2, [r3, #3376] @ 0xd30
}
8009744: bf00 nop
8009746: 3714 adds r7, #20
8009748: 46bd mov sp, r7
800974a: f85d 7b04 ldr.w r7, [sp], #4
800974e: 4770 bx lr
8009750: 00048083 .word 0x00048083
8009754: c0f88000 .word 0xc0f88000
8009758: fffffef0 .word 0xfffffef0
0800975c <ETH_SetDMAConfig>:
static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf)
{
800975c: b480 push {r7}
800975e: b085 sub sp, #20
8009760: af00 add r7, sp, #0
8009762: 6078 str r0, [r7, #4]
8009764: 6039 str r1, [r7, #0]
uint32_t dmaregval;
/*------------------------ DMAMR Configuration --------------------*/
MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaconf->DMAArbitration);
8009766: 687b ldr r3, [r7, #4]
8009768: 681b ldr r3, [r3, #0]
800976a: f503 5380 add.w r3, r3, #4096 @ 0x1000
800976e: 681a ldr r2, [r3, #0]
8009770: 4b38 ldr r3, [pc, #224] @ (8009854 <ETH_SetDMAConfig+0xf8>)
8009772: 4013 ands r3, r2
8009774: 683a ldr r2, [r7, #0]
8009776: 6811 ldr r1, [r2, #0]
8009778: 687a ldr r2, [r7, #4]
800977a: 6812 ldr r2, [r2, #0]
800977c: 430b orrs r3, r1
800977e: f502 5280 add.w r2, r2, #4096 @ 0x1000
8009782: 6013 str r3, [r2, #0]
/*------------------------ DMASBMR Configuration --------------------*/
dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
8009784: 683b ldr r3, [r7, #0]
8009786: 791b ldrb r3, [r3, #4]
8009788: 031a lsls r2, r3, #12
dmaconf->BurstMode |
800978a: 683b ldr r3, [r7, #0]
800978c: 689b ldr r3, [r3, #8]
dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
800978e: 431a orrs r2, r3
((uint32_t)dmaconf->RebuildINCRxBurst << 15));
8009790: 683b ldr r3, [r7, #0]
8009792: 7b1b ldrb r3, [r3, #12]
8009794: 03db lsls r3, r3, #15
dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
8009796: 4313 orrs r3, r2
8009798: 60fb str r3, [r7, #12]
MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval);
800979a: 687b ldr r3, [r7, #4]
800979c: 681b ldr r3, [r3, #0]
800979e: f503 5380 add.w r3, r3, #4096 @ 0x1000
80097a2: 685a ldr r2, [r3, #4]
80097a4: 4b2c ldr r3, [pc, #176] @ (8009858 <ETH_SetDMAConfig+0xfc>)
80097a6: 4013 ands r3, r2
80097a8: 687a ldr r2, [r7, #4]
80097aa: 6812 ldr r2, [r2, #0]
80097ac: 68f9 ldr r1, [r7, #12]
80097ae: 430b orrs r3, r1
80097b0: f502 5280 add.w r2, r2, #4096 @ 0x1000
80097b4: 6053 str r3, [r2, #4]
/*------------------------ DMACCR Configuration --------------------*/
dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
80097b6: 683b ldr r3, [r7, #0]
80097b8: 7b5b ldrb r3, [r3, #13]
80097ba: 041a lsls r2, r3, #16
dmaconf->MaximumSegmentSize);
80097bc: 683b ldr r3, [r7, #0]
80097be: 6a1b ldr r3, [r3, #32]
dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
80097c0: 4313 orrs r3, r2
80097c2: 60fb str r3, [r7, #12]
MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_MASK, dmaregval);
80097c4: 687b ldr r3, [r7, #4]
80097c6: 681b ldr r3, [r3, #0]
80097c8: f503 5380 add.w r3, r3, #4096 @ 0x1000
80097cc: f8d3 2100 ldr.w r2, [r3, #256] @ 0x100
80097d0: 4b22 ldr r3, [pc, #136] @ (800985c <ETH_SetDMAConfig+0x100>)
80097d2: 4013 ands r3, r2
80097d4: 687a ldr r2, [r7, #4]
80097d6: 6812 ldr r2, [r2, #0]
80097d8: 68f9 ldr r1, [r7, #12]
80097da: 430b orrs r3, r1
80097dc: f502 5280 add.w r2, r2, #4096 @ 0x1000
80097e0: f8c2 3100 str.w r3, [r2, #256] @ 0x100
/*------------------------ DMACTCR Configuration --------------------*/
dmaregval = (dmaconf->TxDMABurstLength |
80097e4: 683b ldr r3, [r7, #0]
80097e6: 691a ldr r2, [r3, #16]
((uint32_t)dmaconf->SecondPacketOperate << 4) |
80097e8: 683b ldr r3, [r7, #0]
80097ea: 7d1b ldrb r3, [r3, #20]
80097ec: 011b lsls r3, r3, #4
dmaregval = (dmaconf->TxDMABurstLength |
80097ee: 431a orrs r2, r3
((uint32_t)dmaconf->TCPSegmentation << 12));
80097f0: 683b ldr r3, [r7, #0]
80097f2: 7f5b ldrb r3, [r3, #29]
80097f4: 031b lsls r3, r3, #12
dmaregval = (dmaconf->TxDMABurstLength |
80097f6: 4313 orrs r3, r2
80097f8: 60fb str r3, [r7, #12]
MODIFY_REG(heth->Instance->DMACTCR, ETH_DMACTCR_MASK, dmaregval);
80097fa: 687b ldr r3, [r7, #4]
80097fc: 681b ldr r3, [r3, #0]
80097fe: f503 5380 add.w r3, r3, #4096 @ 0x1000
8009802: f8d3 2104 ldr.w r2, [r3, #260] @ 0x104
8009806: 4b16 ldr r3, [pc, #88] @ (8009860 <ETH_SetDMAConfig+0x104>)
8009808: 4013 ands r3, r2
800980a: 687a ldr r2, [r7, #4]
800980c: 6812 ldr r2, [r2, #0]
800980e: 68f9 ldr r1, [r7, #12]
8009810: 430b orrs r3, r1
8009812: f502 5280 add.w r2, r2, #4096 @ 0x1000
8009816: f8c2 3104 str.w r3, [r2, #260] @ 0x104
/*------------------------ DMACRCR Configuration --------------------*/
dmaregval = (((uint32_t)dmaconf->FlushRxPacket << 31) |
800981a: 683b ldr r3, [r7, #0]
800981c: 7f1b ldrb r3, [r3, #28]
800981e: 07da lsls r2, r3, #31
dmaconf->RxDMABurstLength);
8009820: 683b ldr r3, [r7, #0]
8009822: 699b ldr r3, [r3, #24]
dmaregval = (((uint32_t)dmaconf->FlushRxPacket << 31) |
8009824: 4313 orrs r3, r2
8009826: 60fb str r3, [r7, #12]
/* Write to DMACRCR */
MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_MASK, dmaregval);
8009828: 687b ldr r3, [r7, #4]
800982a: 681b ldr r3, [r3, #0]
800982c: f503 5380 add.w r3, r3, #4096 @ 0x1000
8009830: f8d3 2108 ldr.w r2, [r3, #264] @ 0x108
8009834: 4b0b ldr r3, [pc, #44] @ (8009864 <ETH_SetDMAConfig+0x108>)
8009836: 4013 ands r3, r2
8009838: 687a ldr r2, [r7, #4]
800983a: 6812 ldr r2, [r2, #0]
800983c: 68f9 ldr r1, [r7, #12]
800983e: 430b orrs r3, r1
8009840: f502 5280 add.w r2, r2, #4096 @ 0x1000
8009844: f8c2 3108 str.w r3, [r2, #264] @ 0x108
}
8009848: bf00 nop
800984a: 3714 adds r7, #20
800984c: 46bd mov sp, r7
800984e: f85d 7b04 ldr.w r7, [sp], #4
8009852: 4770 bx lr
8009854: ffff87fd .word 0xffff87fd
8009858: ffff2ffe .word 0xffff2ffe
800985c: fffec000 .word 0xfffec000
8009860: ffc0efef .word 0xffc0efef
8009864: 7fc0ffff .word 0x7fc0ffff
08009868 <ETH_MACDMAConfig>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval HAL status
*/
static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth)
{
8009868: b580 push {r7, lr}
800986a: b0a4 sub sp, #144 @ 0x90
800986c: af00 add r7, sp, #0
800986e: 6078 str r0, [r7, #4]
ETH_MACConfigTypeDef macDefaultConf;
ETH_DMAConfigTypeDef dmaDefaultConf;
/*--------------- ETHERNET MAC registers default Configuration --------------*/
macDefaultConf.AutomaticPadCRCStrip = ENABLE;
8009870: 2301 movs r3, #1
8009872: f887 303b strb.w r3, [r7, #59] @ 0x3b
macDefaultConf.BackOffLimit = ETH_BACKOFFLIMIT_10;
8009876: 2300 movs r3, #0
8009878: 653b str r3, [r7, #80] @ 0x50
macDefaultConf.CarrierSenseBeforeTransmit = DISABLE;
800987a: 2300 movs r3, #0
800987c: f887 3049 strb.w r3, [r7, #73] @ 0x49
macDefaultConf.CarrierSenseDuringTransmit = DISABLE;
8009880: 2300 movs r3, #0
8009882: f887 304b strb.w r3, [r7, #75] @ 0x4b
macDefaultConf.ChecksumOffload = ENABLE;
8009886: 2301 movs r3, #1
8009888: f887 3030 strb.w r3, [r7, #48] @ 0x30
macDefaultConf.CRCCheckingRxPackets = ENABLE;
800988c: 2301 movs r3, #1
800988e: f887 305e strb.w r3, [r7, #94] @ 0x5e
macDefaultConf.CRCStripTypePacket = ENABLE;
8009892: 2301 movs r3, #1
8009894: f887 303a strb.w r3, [r7, #58] @ 0x3a
macDefaultConf.DeferralCheck = DISABLE;
8009898: 2300 movs r3, #0
800989a: f887 3054 strb.w r3, [r7, #84] @ 0x54
macDefaultConf.DropTCPIPChecksumErrorPacket = ENABLE;
800989e: 2301 movs r3, #1
80098a0: f887 308c strb.w r3, [r7, #140] @ 0x8c
macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE;
80098a4: f44f 5300 mov.w r3, #8192 @ 0x2000
80098a8: 647b str r3, [r7, #68] @ 0x44
macDefaultConf.ExtendedInterPacketGap = DISABLE;
80098aa: 2300 movs r3, #0
80098ac: f887 3064 strb.w r3, [r7, #100] @ 0x64
macDefaultConf.ExtendedInterPacketGapVal = 0x0U;
80098b0: 2300 movs r3, #0
80098b2: 66bb str r3, [r7, #104] @ 0x68
macDefaultConf.ForwardRxErrorPacket = DISABLE;
80098b4: 2300 movs r3, #0
80098b6: f887 308d strb.w r3, [r7, #141] @ 0x8d
macDefaultConf.ForwardRxUndersizedGoodPacket = DISABLE;
80098ba: 2300 movs r3, #0
80098bc: f887 308e strb.w r3, [r7, #142] @ 0x8e
macDefaultConf.GiantPacketSizeLimit = 0x618U;
80098c0: f44f 63c3 mov.w r3, #1560 @ 0x618
80098c4: 663b str r3, [r7, #96] @ 0x60
macDefaultConf.GiantPacketSizeLimitControl = DISABLE;
80098c6: 2300 movs r3, #0
80098c8: f887 3038 strb.w r3, [r7, #56] @ 0x38
macDefaultConf.InterPacketGapVal = ETH_INTERPACKETGAP_96BIT;
80098cc: 2300 movs r3, #0
80098ce: 637b str r3, [r7, #52] @ 0x34
macDefaultConf.Jabber = ENABLE;
80098d0: 2301 movs r3, #1
80098d2: f887 303d strb.w r3, [r7, #61] @ 0x3d
macDefaultConf.JumboPacket = DISABLE;
80098d6: 2300 movs r3, #0
80098d8: f887 303e strb.w r3, [r7, #62] @ 0x3e
macDefaultConf.LoopbackMode = DISABLE;
80098dc: 2300 movs r3, #0
80098de: f887 3048 strb.w r3, [r7, #72] @ 0x48
macDefaultConf.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS_4;
80098e2: 2300 movs r3, #0
80098e4: 67fb str r3, [r7, #124] @ 0x7c
macDefaultConf.PauseTime = 0x0U;
80098e6: 2300 movs r3, #0
80098e8: 677b str r3, [r7, #116] @ 0x74
macDefaultConf.PreambleLength = ETH_PREAMBLELENGTH_7;
80098ea: 2300 movs r3, #0
80098ec: 65bb str r3, [r7, #88] @ 0x58
macDefaultConf.ProgrammableWatchdog = DISABLE;
80098ee: 2300 movs r3, #0
80098f0: f887 306c strb.w r3, [r7, #108] @ 0x6c
macDefaultConf.ReceiveFlowControl = DISABLE;
80098f4: 2300 movs r3, #0
80098f6: f887 3082 strb.w r3, [r7, #130] @ 0x82
macDefaultConf.ReceiveOwn = ENABLE;
80098fa: 2301 movs r3, #1
80098fc: f887 304a strb.w r3, [r7, #74] @ 0x4a
macDefaultConf.ReceiveQueueMode = ETH_RECEIVESTOREFORWARD;
8009900: 2320 movs r3, #32
8009902: f8c7 3088 str.w r3, [r7, #136] @ 0x88
macDefaultConf.RetryTransmission = ENABLE;
8009906: 2301 movs r3, #1
8009908: f887 304c strb.w r3, [r7, #76] @ 0x4c
macDefaultConf.SlowProtocolDetect = DISABLE;
800990c: 2300 movs r3, #0
800990e: f887 305d strb.w r3, [r7, #93] @ 0x5d
macDefaultConf.SourceAddrControl = ETH_SOURCEADDRESS_REPLACE_ADDR0;
8009912: f04f 5340 mov.w r3, #805306368 @ 0x30000000
8009916: 62fb str r3, [r7, #44] @ 0x2c
macDefaultConf.Speed = ETH_SPEED_100M;
8009918: f44f 4380 mov.w r3, #16384 @ 0x4000
800991c: 643b str r3, [r7, #64] @ 0x40
macDefaultConf.Support2KPacket = DISABLE;
800991e: 2300 movs r3, #0
8009920: f887 3039 strb.w r3, [r7, #57] @ 0x39
macDefaultConf.TransmitQueueMode = ETH_TRANSMITSTOREFORWARD;
8009924: 2302 movs r3, #2
8009926: f8c7 3084 str.w r3, [r7, #132] @ 0x84
macDefaultConf.TransmitFlowControl = DISABLE;
800992a: 2300 movs r3, #0
800992c: f887 3080 strb.w r3, [r7, #128] @ 0x80
macDefaultConf.UnicastPausePacketDetect = DISABLE;
8009930: 2300 movs r3, #0
8009932: f887 3081 strb.w r3, [r7, #129] @ 0x81
macDefaultConf.UnicastSlowProtocolPacketDetect = DISABLE;
8009936: 2300 movs r3, #0
8009938: f887 305c strb.w r3, [r7, #92] @ 0x5c
macDefaultConf.Watchdog = ENABLE;
800993c: 2301 movs r3, #1
800993e: f887 303c strb.w r3, [r7, #60] @ 0x3c
macDefaultConf.WatchdogTimeout = ETH_MACWTR_WTO_2KB;
8009942: 2300 movs r3, #0
8009944: 673b str r3, [r7, #112] @ 0x70
macDefaultConf.ZeroQuantaPause = ENABLE;
8009946: 2301 movs r3, #1
8009948: f887 3078 strb.w r3, [r7, #120] @ 0x78
/* MAC default configuration */
ETH_SetMACConfig(heth, &macDefaultConf);
800994c: f107 032c add.w r3, r7, #44 @ 0x2c
8009950: 4619 mov r1, r3
8009952: 6878 ldr r0, [r7, #4]
8009954: f7ff fde6 bl 8009524 <ETH_SetMACConfig>
/*--------------- ETHERNET DMA registers default Configuration --------------*/
dmaDefaultConf.AddressAlignedBeats = ENABLE;
8009958: 2301 movs r3, #1
800995a: 733b strb r3, [r7, #12]
dmaDefaultConf.BurstMode = ETH_BURSTLENGTH_FIXED;
800995c: 2301 movs r3, #1
800995e: 613b str r3, [r7, #16]
dmaDefaultConf.DMAArbitration = ETH_DMAARBITRATION_RX1_TX1;
8009960: 2300 movs r3, #0
8009962: 60bb str r3, [r7, #8]
dmaDefaultConf.FlushRxPacket = DISABLE;
8009964: 2300 movs r3, #0
8009966: f887 3024 strb.w r3, [r7, #36] @ 0x24
dmaDefaultConf.PBLx8Mode = DISABLE;
800996a: 2300 movs r3, #0
800996c: 757b strb r3, [r7, #21]
dmaDefaultConf.RebuildINCRxBurst = DISABLE;
800996e: 2300 movs r3, #0
8009970: 753b strb r3, [r7, #20]
dmaDefaultConf.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT;
8009972: f44f 1300 mov.w r3, #2097152 @ 0x200000
8009976: 623b str r3, [r7, #32]
dmaDefaultConf.SecondPacketOperate = DISABLE;
8009978: 2300 movs r3, #0
800997a: 773b strb r3, [r7, #28]
dmaDefaultConf.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT;
800997c: f44f 1300 mov.w r3, #2097152 @ 0x200000
8009980: 61bb str r3, [r7, #24]
dmaDefaultConf.TCPSegmentation = DISABLE;
8009982: 2300 movs r3, #0
8009984: f887 3025 strb.w r3, [r7, #37] @ 0x25
dmaDefaultConf.MaximumSegmentSize = ETH_SEGMENT_SIZE_DEFAULT;
8009988: f44f 7306 mov.w r3, #536 @ 0x218
800998c: 62bb str r3, [r7, #40] @ 0x28
/* DMA default configuration */
ETH_SetDMAConfig(heth, &dmaDefaultConf);
800998e: f107 0308 add.w r3, r7, #8
8009992: 4619 mov r1, r3
8009994: 6878 ldr r0, [r7, #4]
8009996: f7ff fee1 bl 800975c <ETH_SetDMAConfig>
}
800999a: bf00 nop
800999c: 3790 adds r7, #144 @ 0x90
800999e: 46bd mov sp, r7
80099a0: bd80 pop {r7, pc}
080099a2 <ETH_DMATxDescListInit>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
{
80099a2: b480 push {r7}
80099a4: b085 sub sp, #20
80099a6: af00 add r7, sp, #0
80099a8: 6078 str r0, [r7, #4]
ETH_DMADescTypeDef *dmatxdesc;
uint32_t i;
/* Fill each DMATxDesc descriptor with the right values */
for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
80099aa: 2300 movs r3, #0
80099ac: 60fb str r3, [r7, #12]
80099ae: e01d b.n 80099ec <ETH_DMATxDescListInit+0x4a>
{
dmatxdesc = heth->Init.TxDesc + i;
80099b0: 687b ldr r3, [r7, #4]
80099b2: 68d9 ldr r1, [r3, #12]
80099b4: 68fa ldr r2, [r7, #12]
80099b6: 4613 mov r3, r2
80099b8: 005b lsls r3, r3, #1
80099ba: 4413 add r3, r2
80099bc: 00db lsls r3, r3, #3
80099be: 440b add r3, r1
80099c0: 60bb str r3, [r7, #8]
WRITE_REG(dmatxdesc->DESC0, 0x0U);
80099c2: 68bb ldr r3, [r7, #8]
80099c4: 2200 movs r2, #0
80099c6: 601a str r2, [r3, #0]
WRITE_REG(dmatxdesc->DESC1, 0x0U);
80099c8: 68bb ldr r3, [r7, #8]
80099ca: 2200 movs r2, #0
80099cc: 605a str r2, [r3, #4]
WRITE_REG(dmatxdesc->DESC2, 0x0U);
80099ce: 68bb ldr r3, [r7, #8]
80099d0: 2200 movs r2, #0
80099d2: 609a str r2, [r3, #8]
WRITE_REG(dmatxdesc->DESC3, 0x0U);
80099d4: 68bb ldr r3, [r7, #8]
80099d6: 2200 movs r2, #0
80099d8: 60da str r2, [r3, #12]
WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc);
80099da: 68b9 ldr r1, [r7, #8]
80099dc: 687b ldr r3, [r7, #4]
80099de: 68fa ldr r2, [r7, #12]
80099e0: 3206 adds r2, #6
80099e2: f843 1022 str.w r1, [r3, r2, lsl #2]
for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
80099e6: 68fb ldr r3, [r7, #12]
80099e8: 3301 adds r3, #1
80099ea: 60fb str r3, [r7, #12]
80099ec: 68fb ldr r3, [r7, #12]
80099ee: 2b03 cmp r3, #3
80099f0: d9de bls.n 80099b0 <ETH_DMATxDescListInit+0xe>
}
heth->TxDescList.CurTxDesc = 0;
80099f2: 687b ldr r3, [r7, #4]
80099f4: 2200 movs r2, #0
80099f6: 629a str r2, [r3, #40] @ 0x28
/* Set Transmit Descriptor Ring Length */
WRITE_REG(heth->Instance->DMACTDRLR, (ETH_TX_DESC_CNT - 1U));
80099f8: 687b ldr r3, [r7, #4]
80099fa: 681b ldr r3, [r3, #0]
80099fc: f503 5380 add.w r3, r3, #4096 @ 0x1000
8009a00: 461a mov r2, r3
8009a02: 2303 movs r3, #3
8009a04: f8c2 312c str.w r3, [r2, #300] @ 0x12c
/* Set Transmit Descriptor List Address */
WRITE_REG(heth->Instance->DMACTDLAR, (uint32_t) heth->Init.TxDesc);
8009a08: 687b ldr r3, [r7, #4]
8009a0a: 68da ldr r2, [r3, #12]
8009a0c: 687b ldr r3, [r7, #4]
8009a0e: 681b ldr r3, [r3, #0]
8009a10: f503 5380 add.w r3, r3, #4096 @ 0x1000
8009a14: f8c3 2114 str.w r2, [r3, #276] @ 0x114
/* Set Transmit Descriptor Tail pointer */
WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc);
8009a18: 687b ldr r3, [r7, #4]
8009a1a: 68da ldr r2, [r3, #12]
8009a1c: 687b ldr r3, [r7, #4]
8009a1e: 681b ldr r3, [r3, #0]
8009a20: f503 5380 add.w r3, r3, #4096 @ 0x1000
8009a24: f8c3 2120 str.w r2, [r3, #288] @ 0x120
}
8009a28: bf00 nop
8009a2a: 3714 adds r7, #20
8009a2c: 46bd mov sp, r7
8009a2e: f85d 7b04 ldr.w r7, [sp], #4
8009a32: 4770 bx lr
08009a34 <ETH_DMARxDescListInit>:
* @param heth: pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
{
8009a34: b480 push {r7}
8009a36: b085 sub sp, #20
8009a38: af00 add r7, sp, #0
8009a3a: 6078 str r0, [r7, #4]
ETH_DMADescTypeDef *dmarxdesc;
uint32_t i;
for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
8009a3c: 2300 movs r3, #0
8009a3e: 60fb str r3, [r7, #12]
8009a40: e023 b.n 8009a8a <ETH_DMARxDescListInit+0x56>
{
dmarxdesc = heth->Init.RxDesc + i;
8009a42: 687b ldr r3, [r7, #4]
8009a44: 6919 ldr r1, [r3, #16]
8009a46: 68fa ldr r2, [r7, #12]
8009a48: 4613 mov r3, r2
8009a4a: 005b lsls r3, r3, #1
8009a4c: 4413 add r3, r2
8009a4e: 00db lsls r3, r3, #3
8009a50: 440b add r3, r1
8009a52: 60bb str r3, [r7, #8]
WRITE_REG(dmarxdesc->DESC0, 0x0U);
8009a54: 68bb ldr r3, [r7, #8]
8009a56: 2200 movs r2, #0
8009a58: 601a str r2, [r3, #0]
WRITE_REG(dmarxdesc->DESC1, 0x0U);
8009a5a: 68bb ldr r3, [r7, #8]
8009a5c: 2200 movs r2, #0
8009a5e: 605a str r2, [r3, #4]
WRITE_REG(dmarxdesc->DESC2, 0x0U);
8009a60: 68bb ldr r3, [r7, #8]
8009a62: 2200 movs r2, #0
8009a64: 609a str r2, [r3, #8]
WRITE_REG(dmarxdesc->DESC3, 0x0U);
8009a66: 68bb ldr r3, [r7, #8]
8009a68: 2200 movs r2, #0
8009a6a: 60da str r2, [r3, #12]
WRITE_REG(dmarxdesc->BackupAddr0, 0x0U);
8009a6c: 68bb ldr r3, [r7, #8]
8009a6e: 2200 movs r2, #0
8009a70: 611a str r2, [r3, #16]
WRITE_REG(dmarxdesc->BackupAddr1, 0x0U);
8009a72: 68bb ldr r3, [r7, #8]
8009a74: 2200 movs r2, #0
8009a76: 615a str r2, [r3, #20]
/* Set Rx descritors addresses */
WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc);
8009a78: 68b9 ldr r1, [r7, #8]
8009a7a: 687b ldr r3, [r7, #4]
8009a7c: 68fa ldr r2, [r7, #12]
8009a7e: 3212 adds r2, #18
8009a80: f843 1022 str.w r1, [r3, r2, lsl #2]
for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
8009a84: 68fb ldr r3, [r7, #12]
8009a86: 3301 adds r3, #1
8009a88: 60fb str r3, [r7, #12]
8009a8a: 68fb ldr r3, [r7, #12]
8009a8c: 2b03 cmp r3, #3
8009a8e: d9d8 bls.n 8009a42 <ETH_DMARxDescListInit+0xe>
}
WRITE_REG(heth->RxDescList.RxDescIdx, 0U);
8009a90: 687b ldr r3, [r7, #4]
8009a92: 2200 movs r2, #0
8009a94: 65da str r2, [r3, #92] @ 0x5c
WRITE_REG(heth->RxDescList.RxDescCnt, 0U);
8009a96: 687b ldr r3, [r7, #4]
8009a98: 2200 movs r2, #0
8009a9a: 661a str r2, [r3, #96] @ 0x60
WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0U);
8009a9c: 687b ldr r3, [r7, #4]
8009a9e: 2200 movs r2, #0
8009aa0: 669a str r2, [r3, #104] @ 0x68
WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0U);
8009aa2: 687b ldr r3, [r7, #4]
8009aa4: 2200 movs r2, #0
8009aa6: 66da str r2, [r3, #108] @ 0x6c
WRITE_REG(heth->RxDescList.ItMode, 0U);
8009aa8: 687b ldr r3, [r7, #4]
8009aaa: 2200 movs r2, #0
8009aac: 659a str r2, [r3, #88] @ 0x58
/* Set Receive Descriptor Ring Length */
WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U)));
8009aae: 687b ldr r3, [r7, #4]
8009ab0: 681b ldr r3, [r3, #0]
8009ab2: f503 5380 add.w r3, r3, #4096 @ 0x1000
8009ab6: 461a mov r2, r3
8009ab8: 2303 movs r3, #3
8009aba: f8c2 3130 str.w r3, [r2, #304] @ 0x130
/* Set Receive Descriptor List Address */
WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc);
8009abe: 687b ldr r3, [r7, #4]
8009ac0: 691a ldr r2, [r3, #16]
8009ac2: 687b ldr r3, [r7, #4]
8009ac4: 681b ldr r3, [r3, #0]
8009ac6: f503 5380 add.w r3, r3, #4096 @ 0x1000
8009aca: f8c3 211c str.w r2, [r3, #284] @ 0x11c
/* Set Receive Descriptor Tail pointer Address */
WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (uint32_t)(ETH_RX_DESC_CNT - 1U))));
8009ace: 687b ldr r3, [r7, #4]
8009ad0: 691b ldr r3, [r3, #16]
8009ad2: f103 0248 add.w r2, r3, #72 @ 0x48
8009ad6: 687b ldr r3, [r7, #4]
8009ad8: 681b ldr r3, [r3, #0]
8009ada: f503 5380 add.w r3, r3, #4096 @ 0x1000
8009ade: f8c3 2128 str.w r2, [r3, #296] @ 0x128
}
8009ae2: bf00 nop
8009ae4: 3714 adds r7, #20
8009ae6: 46bd mov sp, r7
8009ae8: f85d 7b04 ldr.w r7, [sp], #4
8009aec: 4770 bx lr
...
08009af0 <ETH_Prepare_Tx_Descriptors>:
* @param ItMode: Enable or disable Tx EOT interrept
* @retval Status
*/
static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef *pTxConfig,
uint32_t ItMode)
{
8009af0: b480 push {r7}
8009af2: b091 sub sp, #68 @ 0x44
8009af4: af00 add r7, sp, #0
8009af6: 60f8 str r0, [r7, #12]
8009af8: 60b9 str r1, [r7, #8]
8009afa: 607a str r2, [r7, #4]
ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
8009afc: 68fb ldr r3, [r7, #12]
8009afe: 3318 adds r3, #24
8009b00: 627b str r3, [r7, #36] @ 0x24
uint32_t descidx = dmatxdesclist->CurTxDesc;
8009b02: 6a7b ldr r3, [r7, #36] @ 0x24
8009b04: 691b ldr r3, [r3, #16]
8009b06: 63fb str r3, [r7, #60] @ 0x3c
uint32_t firstdescidx = dmatxdesclist->CurTxDesc;
8009b08: 6a7b ldr r3, [r7, #36] @ 0x24
8009b0a: 691b ldr r3, [r3, #16]
8009b0c: 623b str r3, [r7, #32]
uint32_t idx;
uint32_t descnbr = 0;
8009b0e: 2300 movs r3, #0
8009b10: 637b str r3, [r7, #52] @ 0x34
ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
8009b12: 6a7b ldr r3, [r7, #36] @ 0x24
8009b14: 6bfa ldr r2, [r7, #60] @ 0x3c
8009b16: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009b1a: 633b str r3, [r7, #48] @ 0x30
ETH_BufferTypeDef *txbuffer = pTxConfig->TxBuffer;
8009b1c: 68bb ldr r3, [r7, #8]
8009b1e: 689b ldr r3, [r3, #8]
8009b20: 62fb str r3, [r7, #44] @ 0x2c
uint32_t bd_count = 0;
8009b22: 2300 movs r3, #0
8009b24: 62bb str r3, [r7, #40] @ 0x28
uint32_t primask_bit;
/* Current Tx Descriptor Owned by DMA: cannot be used by the application */
if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
8009b26: 6b3b ldr r3, [r7, #48] @ 0x30
8009b28: 68db ldr r3, [r3, #12]
8009b2a: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8009b2e: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8009b32: d007 beq.n 8009b44 <ETH_Prepare_Tx_Descriptors+0x54>
|| (dmatxdesclist->PacketAddress[descidx] != NULL))
8009b34: 6a7a ldr r2, [r7, #36] @ 0x24
8009b36: 6bfb ldr r3, [r7, #60] @ 0x3c
8009b38: 3304 adds r3, #4
8009b3a: 009b lsls r3, r3, #2
8009b3c: 4413 add r3, r2
8009b3e: 685b ldr r3, [r3, #4]
8009b40: 2b00 cmp r3, #0
8009b42: d001 beq.n 8009b48 <ETH_Prepare_Tx_Descriptors+0x58>
{
return HAL_ETH_ERROR_BUSY;
8009b44: 2302 movs r3, #2
8009b46: e266 b.n 800a016 <ETH_Prepare_Tx_Descriptors+0x526>
/***************************************************************************/
/***************** Context descriptor configuration (Optional) **********/
/***************************************************************************/
/* If VLAN tag is enabled for this packet */
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
8009b48: 68bb ldr r3, [r7, #8]
8009b4a: 681b ldr r3, [r3, #0]
8009b4c: f003 0304 and.w r3, r3, #4
8009b50: 2b00 cmp r3, #0
8009b52: d044 beq.n 8009bde <ETH_Prepare_Tx_Descriptors+0xee>
{
/* Set vlan tag value */
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag);
8009b54: 6b3b ldr r3, [r7, #48] @ 0x30
8009b56: 68da ldr r2, [r3, #12]
8009b58: 4b75 ldr r3, [pc, #468] @ (8009d30 <ETH_Prepare_Tx_Descriptors+0x240>)
8009b5a: 4013 ands r3, r2
8009b5c: 68ba ldr r2, [r7, #8]
8009b5e: 6a52 ldr r2, [r2, #36] @ 0x24
8009b60: 431a orrs r2, r3
8009b62: 6b3b ldr r3, [r7, #48] @ 0x30
8009b64: 60da str r2, [r3, #12]
/* Set vlan tag valid bit */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV);
8009b66: 6b3b ldr r3, [r7, #48] @ 0x30
8009b68: 68db ldr r3, [r3, #12]
8009b6a: f443 3280 orr.w r2, r3, #65536 @ 0x10000
8009b6e: 6b3b ldr r3, [r7, #48] @ 0x30
8009b70: 60da str r2, [r3, #12]
/* Set the descriptor as the vlan input source */
SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI);
8009b72: 68fb ldr r3, [r7, #12]
8009b74: 681b ldr r3, [r3, #0]
8009b76: 6e1a ldr r2, [r3, #96] @ 0x60
8009b78: 68fb ldr r3, [r7, #12]
8009b7a: 681b ldr r3, [r3, #0]
8009b7c: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
8009b80: 661a str r2, [r3, #96] @ 0x60
/* if inner VLAN is enabled */
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_INNERVLANTAG) != (uint32_t)RESET)
8009b82: 68bb ldr r3, [r7, #8]
8009b84: 681b ldr r3, [r3, #0]
8009b86: f003 0308 and.w r3, r3, #8
8009b8a: 2b00 cmp r3, #0
8009b8c: d027 beq.n 8009bde <ETH_Prepare_Tx_Descriptors+0xee>
{
/* Set inner vlan tag value */
MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16));
8009b8e: 6b3b ldr r3, [r7, #48] @ 0x30
8009b90: 689b ldr r3, [r3, #8]
8009b92: b29a uxth r2, r3
8009b94: 68bb ldr r3, [r7, #8]
8009b96: 6adb ldr r3, [r3, #44] @ 0x2c
8009b98: 041b lsls r3, r3, #16
8009b9a: 431a orrs r2, r3
8009b9c: 6b3b ldr r3, [r7, #48] @ 0x30
8009b9e: 609a str r2, [r3, #8]
/* Set inner vlan tag valid bit */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV);
8009ba0: 6b3b ldr r3, [r7, #48] @ 0x30
8009ba2: 68db ldr r3, [r3, #12]
8009ba4: f443 3200 orr.w r2, r3, #131072 @ 0x20000
8009ba8: 6b3b ldr r3, [r7, #48] @ 0x30
8009baa: 60da str r2, [r3, #12]
/* Set Vlan Tag control */
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl);
8009bac: 6b3b ldr r3, [r7, #48] @ 0x30
8009bae: 68db ldr r3, [r3, #12]
8009bb0: f423 2240 bic.w r2, r3, #786432 @ 0xc0000
8009bb4: 68bb ldr r3, [r7, #8]
8009bb6: 6b1b ldr r3, [r3, #48] @ 0x30
8009bb8: 431a orrs r2, r3
8009bba: 6b3b ldr r3, [r7, #48] @ 0x30
8009bbc: 60da str r2, [r3, #12]
/* Set the descriptor as the inner vlan input source */
SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI);
8009bbe: 68fb ldr r3, [r7, #12]
8009bc0: 681b ldr r3, [r3, #0]
8009bc2: 6e5a ldr r2, [r3, #100] @ 0x64
8009bc4: 68fb ldr r3, [r7, #12]
8009bc6: 681b ldr r3, [r3, #0]
8009bc8: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
8009bcc: 665a str r2, [r3, #100] @ 0x64
/* Enable double VLAN processing */
SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP);
8009bce: 68fb ldr r3, [r7, #12]
8009bd0: 681b ldr r3, [r3, #0]
8009bd2: 6d1a ldr r2, [r3, #80] @ 0x50
8009bd4: 68fb ldr r3, [r7, #12]
8009bd6: 681b ldr r3, [r3, #0]
8009bd8: f042 6280 orr.w r2, r2, #67108864 @ 0x4000000
8009bdc: 651a str r2, [r3, #80] @ 0x50
}
}
/* if tcp segmentation is enabled for this packet */
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
8009bde: 68bb ldr r3, [r7, #8]
8009be0: 681b ldr r3, [r3, #0]
8009be2: f003 0310 and.w r3, r3, #16
8009be6: 2b00 cmp r3, #0
8009be8: d00e beq.n 8009c08 <ETH_Prepare_Tx_Descriptors+0x118>
{
/* Set MSS value */
MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize);
8009bea: 6b3b ldr r3, [r7, #48] @ 0x30
8009bec: 689a ldr r2, [r3, #8]
8009bee: 4b51 ldr r3, [pc, #324] @ (8009d34 <ETH_Prepare_Tx_Descriptors+0x244>)
8009bf0: 4013 ands r3, r2
8009bf2: 68ba ldr r2, [r7, #8]
8009bf4: 6992 ldr r2, [r2, #24]
8009bf6: 431a orrs r2, r3
8009bf8: 6b3b ldr r3, [r7, #48] @ 0x30
8009bfa: 609a str r2, [r3, #8]
/* Set MSS valid bit */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV);
8009bfc: 6b3b ldr r3, [r7, #48] @ 0x30
8009bfe: 68db ldr r3, [r3, #12]
8009c00: f043 6280 orr.w r2, r3, #67108864 @ 0x4000000
8009c04: 6b3b ldr r3, [r7, #48] @ 0x30
8009c06: 60da str r2, [r3, #12]
}
if ((READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
8009c08: 68bb ldr r3, [r7, #8]
8009c0a: 681b ldr r3, [r3, #0]
8009c0c: f003 0304 and.w r3, r3, #4
8009c10: 2b00 cmp r3, #0
8009c12: d105 bne.n 8009c20 <ETH_Prepare_Tx_Descriptors+0x130>
|| (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET))
8009c14: 68bb ldr r3, [r7, #8]
8009c16: 681b ldr r3, [r3, #0]
8009c18: f003 0310 and.w r3, r3, #16
8009c1c: 2b00 cmp r3, #0
8009c1e: d036 beq.n 8009c8e <ETH_Prepare_Tx_Descriptors+0x19e>
{
/* Set as context descriptor */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT);
8009c20: 6b3b ldr r3, [r7, #48] @ 0x30
8009c22: 68db ldr r3, [r3, #12]
8009c24: f043 4280 orr.w r2, r3, #1073741824 @ 0x40000000
8009c28: 6b3b ldr r3, [r7, #48] @ 0x30
8009c2a: 60da str r2, [r3, #12]
__ASM volatile ("dmb 0xF":::"memory");
8009c2c: f3bf 8f5f dmb sy
}
8009c30: bf00 nop
/* Ensure rest of descriptor is written to RAM before the OWN bit */
__DMB();
/* Set own bit */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
8009c32: 6b3b ldr r3, [r7, #48] @ 0x30
8009c34: 68db ldr r3, [r3, #12]
8009c36: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
8009c3a: 6b3b ldr r3, [r7, #48] @ 0x30
8009c3c: 60da str r2, [r3, #12]
/* Increment current tx descriptor index */
INCR_TX_DESC_INDEX(descidx, 1U);
8009c3e: 6bfb ldr r3, [r7, #60] @ 0x3c
8009c40: 3301 adds r3, #1
8009c42: 63fb str r3, [r7, #60] @ 0x3c
8009c44: 6bfb ldr r3, [r7, #60] @ 0x3c
8009c46: 2b03 cmp r3, #3
8009c48: d902 bls.n 8009c50 <ETH_Prepare_Tx_Descriptors+0x160>
8009c4a: 6bfb ldr r3, [r7, #60] @ 0x3c
8009c4c: 3b04 subs r3, #4
8009c4e: 63fb str r3, [r7, #60] @ 0x3c
/* Get current descriptor address */
dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
8009c50: 6a7b ldr r3, [r7, #36] @ 0x24
8009c52: 6bfa ldr r2, [r7, #60] @ 0x3c
8009c54: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009c58: 633b str r3, [r7, #48] @ 0x30
descnbr += 1U;
8009c5a: 6b7b ldr r3, [r7, #52] @ 0x34
8009c5c: 3301 adds r3, #1
8009c5e: 637b str r3, [r7, #52] @ 0x34
/* Current Tx Descriptor Owned by DMA: cannot be used by the application */
if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
8009c60: 6b3b ldr r3, [r7, #48] @ 0x30
8009c62: 68db ldr r3, [r3, #12]
8009c64: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8009c68: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8009c6c: d10f bne.n 8009c8e <ETH_Prepare_Tx_Descriptors+0x19e>
{
dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[firstdescidx];
8009c6e: 6a7b ldr r3, [r7, #36] @ 0x24
8009c70: 6a3a ldr r2, [r7, #32]
8009c72: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009c76: 633b str r3, [r7, #48] @ 0x30
__ASM volatile ("dmb 0xF":::"memory");
8009c78: f3bf 8f5f dmb sy
}
8009c7c: bf00 nop
/* Ensure rest of descriptor is written to RAM before the OWN bit */
__DMB();
/* Clear own bit */
CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
8009c7e: 6b3b ldr r3, [r7, #48] @ 0x30
8009c80: 68db ldr r3, [r3, #12]
8009c82: f023 4200 bic.w r2, r3, #2147483648 @ 0x80000000
8009c86: 6b3b ldr r3, [r7, #48] @ 0x30
8009c88: 60da str r2, [r3, #12]
return HAL_ETH_ERROR_BUSY;
8009c8a: 2302 movs r3, #2
8009c8c: e1c3 b.n 800a016 <ETH_Prepare_Tx_Descriptors+0x526>
/***************************************************************************/
/***************** Normal descriptors configuration *****************/
/***************************************************************************/
descnbr += 1U;
8009c8e: 6b7b ldr r3, [r7, #52] @ 0x34
8009c90: 3301 adds r3, #1
8009c92: 637b str r3, [r7, #52] @ 0x34
/* Set header or buffer 1 address */
WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
8009c94: 6afb ldr r3, [r7, #44] @ 0x2c
8009c96: 681b ldr r3, [r3, #0]
8009c98: 461a mov r2, r3
8009c9a: 6b3b ldr r3, [r7, #48] @ 0x30
8009c9c: 601a str r2, [r3, #0]
/* Set header or buffer 1 Length */
MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
8009c9e: 6b3b ldr r3, [r7, #48] @ 0x30
8009ca0: 689a ldr r2, [r3, #8]
8009ca2: 4b24 ldr r3, [pc, #144] @ (8009d34 <ETH_Prepare_Tx_Descriptors+0x244>)
8009ca4: 4013 ands r3, r2
8009ca6: 6afa ldr r2, [r7, #44] @ 0x2c
8009ca8: 6852 ldr r2, [r2, #4]
8009caa: 431a orrs r2, r3
8009cac: 6b3b ldr r3, [r7, #48] @ 0x30
8009cae: 609a str r2, [r3, #8]
if (txbuffer->next != NULL)
8009cb0: 6afb ldr r3, [r7, #44] @ 0x2c
8009cb2: 689b ldr r3, [r3, #8]
8009cb4: 2b00 cmp r3, #0
8009cb6: d012 beq.n 8009cde <ETH_Prepare_Tx_Descriptors+0x1ee>
{
txbuffer = txbuffer->next;
8009cb8: 6afb ldr r3, [r7, #44] @ 0x2c
8009cba: 689b ldr r3, [r3, #8]
8009cbc: 62fb str r3, [r7, #44] @ 0x2c
/* Set buffer 2 address */
WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
8009cbe: 6afb ldr r3, [r7, #44] @ 0x2c
8009cc0: 681b ldr r3, [r3, #0]
8009cc2: 461a mov r2, r3
8009cc4: 6b3b ldr r3, [r7, #48] @ 0x30
8009cc6: 605a str r2, [r3, #4]
/* Set buffer 2 Length */
MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
8009cc8: 6b3b ldr r3, [r7, #48] @ 0x30
8009cca: 689a ldr r2, [r3, #8]
8009ccc: 4b1a ldr r3, [pc, #104] @ (8009d38 <ETH_Prepare_Tx_Descriptors+0x248>)
8009cce: 4013 ands r3, r2
8009cd0: 6afa ldr r2, [r7, #44] @ 0x2c
8009cd2: 6852 ldr r2, [r2, #4]
8009cd4: 0412 lsls r2, r2, #16
8009cd6: 431a orrs r2, r3
8009cd8: 6b3b ldr r3, [r7, #48] @ 0x30
8009cda: 609a str r2, [r3, #8]
8009cdc: e008 b.n 8009cf0 <ETH_Prepare_Tx_Descriptors+0x200>
}
else
{
WRITE_REG(dmatxdesc->DESC1, 0x0U);
8009cde: 6b3b ldr r3, [r7, #48] @ 0x30
8009ce0: 2200 movs r2, #0
8009ce2: 605a str r2, [r3, #4]
/* Set buffer 2 Length */
MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
8009ce4: 6b3b ldr r3, [r7, #48] @ 0x30
8009ce6: 689a ldr r2, [r3, #8]
8009ce8: 4b13 ldr r3, [pc, #76] @ (8009d38 <ETH_Prepare_Tx_Descriptors+0x248>)
8009cea: 4013 ands r3, r2
8009cec: 6b3a ldr r2, [r7, #48] @ 0x30
8009cee: 6093 str r3, [r2, #8]
}
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
8009cf0: 68bb ldr r3, [r7, #8]
8009cf2: 681b ldr r3, [r3, #0]
8009cf4: f003 0310 and.w r3, r3, #16
8009cf8: 2b00 cmp r3, #0
8009cfa: d021 beq.n 8009d40 <ETH_Prepare_Tx_Descriptors+0x250>
{
/* Set TCP Header length */
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19));
8009cfc: 6b3b ldr r3, [r7, #48] @ 0x30
8009cfe: 68db ldr r3, [r3, #12]
8009d00: f423 02f0 bic.w r2, r3, #7864320 @ 0x780000
8009d04: 68bb ldr r3, [r7, #8]
8009d06: 6a1b ldr r3, [r3, #32]
8009d08: 04db lsls r3, r3, #19
8009d0a: 431a orrs r2, r3
8009d0c: 6b3b ldr r3, [r7, #48] @ 0x30
8009d0e: 60da str r2, [r3, #12]
/* Set TCP payload length */
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
8009d10: 6b3b ldr r3, [r7, #48] @ 0x30
8009d12: 68da ldr r2, [r3, #12]
8009d14: 4b09 ldr r3, [pc, #36] @ (8009d3c <ETH_Prepare_Tx_Descriptors+0x24c>)
8009d16: 4013 ands r3, r2
8009d18: 68ba ldr r2, [r7, #8]
8009d1a: 69d2 ldr r2, [r2, #28]
8009d1c: 431a orrs r2, r3
8009d1e: 6b3b ldr r3, [r7, #48] @ 0x30
8009d20: 60da str r2, [r3, #12]
/* Set TCP Segmentation Enabled bit */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
8009d22: 6b3b ldr r3, [r7, #48] @ 0x30
8009d24: 68db ldr r3, [r3, #12]
8009d26: f443 2280 orr.w r2, r3, #262144 @ 0x40000
8009d2a: 6b3b ldr r3, [r7, #48] @ 0x30
8009d2c: 60da str r2, [r3, #12]
8009d2e: e02e b.n 8009d8e <ETH_Prepare_Tx_Descriptors+0x29e>
8009d30: ffff0000 .word 0xffff0000
8009d34: ffffc000 .word 0xffffc000
8009d38: c000ffff .word 0xc000ffff
8009d3c: fffc0000 .word 0xfffc0000
}
else
{
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
8009d40: 6b3b ldr r3, [r7, #48] @ 0x30
8009d42: 68da ldr r2, [r3, #12]
8009d44: 4b7b ldr r3, [pc, #492] @ (8009f34 <ETH_Prepare_Tx_Descriptors+0x444>)
8009d46: 4013 ands r3, r2
8009d48: 68ba ldr r2, [r7, #8]
8009d4a: 6852 ldr r2, [r2, #4]
8009d4c: 431a orrs r2, r3
8009d4e: 6b3b ldr r3, [r7, #48] @ 0x30
8009d50: 60da str r2, [r3, #12]
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
8009d52: 68bb ldr r3, [r7, #8]
8009d54: 681b ldr r3, [r3, #0]
8009d56: f003 0301 and.w r3, r3, #1
8009d5a: 2b00 cmp r3, #0
8009d5c: d008 beq.n 8009d70 <ETH_Prepare_Tx_Descriptors+0x280>
{
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
8009d5e: 6b3b ldr r3, [r7, #48] @ 0x30
8009d60: 68db ldr r3, [r3, #12]
8009d62: f423 3240 bic.w r2, r3, #196608 @ 0x30000
8009d66: 68bb ldr r3, [r7, #8]
8009d68: 695b ldr r3, [r3, #20]
8009d6a: 431a orrs r2, r3
8009d6c: 6b3b ldr r3, [r7, #48] @ 0x30
8009d6e: 60da str r2, [r3, #12]
}
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CRCPAD) != (uint32_t)RESET)
8009d70: 68bb ldr r3, [r7, #8]
8009d72: 681b ldr r3, [r3, #0]
8009d74: f003 0320 and.w r3, r3, #32
8009d78: 2b00 cmp r3, #0
8009d7a: d008 beq.n 8009d8e <ETH_Prepare_Tx_Descriptors+0x29e>
{
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl);
8009d7c: 6b3b ldr r3, [r7, #48] @ 0x30
8009d7e: 68db ldr r3, [r3, #12]
8009d80: f023 6240 bic.w r2, r3, #201326592 @ 0xc000000
8009d84: 68bb ldr r3, [r7, #8]
8009d86: 691b ldr r3, [r3, #16]
8009d88: 431a orrs r2, r3
8009d8a: 6b3b ldr r3, [r7, #48] @ 0x30
8009d8c: 60da str r2, [r3, #12]
}
}
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
8009d8e: 68bb ldr r3, [r7, #8]
8009d90: 681b ldr r3, [r3, #0]
8009d92: f003 0304 and.w r3, r3, #4
8009d96: 2b00 cmp r3, #0
8009d98: d008 beq.n 8009dac <ETH_Prepare_Tx_Descriptors+0x2bc>
{
/* Set Vlan Tag control */
MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl);
8009d9a: 6b3b ldr r3, [r7, #48] @ 0x30
8009d9c: 689b ldr r3, [r3, #8]
8009d9e: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8009da2: 68bb ldr r3, [r7, #8]
8009da4: 6a9b ldr r3, [r3, #40] @ 0x28
8009da6: 431a orrs r2, r3
8009da8: 6b3b ldr r3, [r7, #48] @ 0x30
8009daa: 609a str r2, [r3, #8]
}
/* Mark it as First Descriptor */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
8009dac: 6b3b ldr r3, [r7, #48] @ 0x30
8009dae: 68db ldr r3, [r3, #12]
8009db0: f043 5200 orr.w r2, r3, #536870912 @ 0x20000000
8009db4: 6b3b ldr r3, [r7, #48] @ 0x30
8009db6: 60da str r2, [r3, #12]
/* Mark it as NORMAL descriptor */
CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
8009db8: 6b3b ldr r3, [r7, #48] @ 0x30
8009dba: 68db ldr r3, [r3, #12]
8009dbc: f023 4280 bic.w r2, r3, #1073741824 @ 0x40000000
8009dc0: 6b3b ldr r3, [r7, #48] @ 0x30
8009dc2: 60da str r2, [r3, #12]
__ASM volatile ("dmb 0xF":::"memory");
8009dc4: f3bf 8f5f dmb sy
}
8009dc8: bf00 nop
/* Ensure rest of descriptor is written to RAM before the OWN bit */
__DMB();
/* set OWN bit of FIRST descriptor */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
8009dca: 6b3b ldr r3, [r7, #48] @ 0x30
8009dcc: 68db ldr r3, [r3, #12]
8009dce: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
8009dd2: 6b3b ldr r3, [r7, #48] @ 0x30
8009dd4: 60da str r2, [r3, #12]
/* If source address insertion/replacement is enabled for this packet */
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_SAIC) != (uint32_t)RESET)
8009dd6: 68bb ldr r3, [r7, #8]
8009dd8: 681b ldr r3, [r3, #0]
8009dda: f003 0302 and.w r3, r3, #2
8009dde: 2b00 cmp r3, #0
8009de0: f000 80da beq.w 8009f98 <ETH_Prepare_Tx_Descriptors+0x4a8>
{
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl);
8009de4: 6b3b ldr r3, [r7, #48] @ 0x30
8009de6: 68db ldr r3, [r3, #12]
8009de8: f023 7260 bic.w r2, r3, #58720256 @ 0x3800000
8009dec: 68bb ldr r3, [r7, #8]
8009dee: 68db ldr r3, [r3, #12]
8009df0: 431a orrs r2, r3
8009df2: 6b3b ldr r3, [r7, #48] @ 0x30
8009df4: 60da str r2, [r3, #12]
}
/* only if the packet is split into more than one descriptors > 1 */
while (txbuffer->next != NULL)
8009df6: e0cf b.n 8009f98 <ETH_Prepare_Tx_Descriptors+0x4a8>
{
/* Clear the LD bit of previous descriptor */
CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
8009df8: 6b3b ldr r3, [r7, #48] @ 0x30
8009dfa: 68db ldr r3, [r3, #12]
8009dfc: f023 5280 bic.w r2, r3, #268435456 @ 0x10000000
8009e00: 6b3b ldr r3, [r7, #48] @ 0x30
8009e02: 60da str r2, [r3, #12]
/* Increment current tx descriptor index */
INCR_TX_DESC_INDEX(descidx, 1U);
8009e04: 6bfb ldr r3, [r7, #60] @ 0x3c
8009e06: 3301 adds r3, #1
8009e08: 63fb str r3, [r7, #60] @ 0x3c
8009e0a: 6bfb ldr r3, [r7, #60] @ 0x3c
8009e0c: 2b03 cmp r3, #3
8009e0e: d902 bls.n 8009e16 <ETH_Prepare_Tx_Descriptors+0x326>
8009e10: 6bfb ldr r3, [r7, #60] @ 0x3c
8009e12: 3b04 subs r3, #4
8009e14: 63fb str r3, [r7, #60] @ 0x3c
/* Get current descriptor address */
dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
8009e16: 6a7b ldr r3, [r7, #36] @ 0x24
8009e18: 6bfa ldr r2, [r7, #60] @ 0x3c
8009e1a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009e1e: 633b str r3, [r7, #48] @ 0x30
/* Clear the FD bit of new Descriptor */
CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
8009e20: 6b3b ldr r3, [r7, #48] @ 0x30
8009e22: 68db ldr r3, [r3, #12]
8009e24: f023 5200 bic.w r2, r3, #536870912 @ 0x20000000
8009e28: 6b3b ldr r3, [r7, #48] @ 0x30
8009e2a: 60da str r2, [r3, #12]
/* Current Tx Descriptor Owned by DMA: cannot be used by the application */
if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN)
8009e2c: 6b3b ldr r3, [r7, #48] @ 0x30
8009e2e: 68db ldr r3, [r3, #12]
8009e30: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8009e34: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8009e38: d007 beq.n 8009e4a <ETH_Prepare_Tx_Descriptors+0x35a>
|| (dmatxdesclist->PacketAddress[descidx] != NULL))
8009e3a: 6a7a ldr r2, [r7, #36] @ 0x24
8009e3c: 6bfb ldr r3, [r7, #60] @ 0x3c
8009e3e: 3304 adds r3, #4
8009e40: 009b lsls r3, r3, #2
8009e42: 4413 add r3, r2
8009e44: 685b ldr r3, [r3, #4]
8009e46: 2b00 cmp r3, #0
8009e48: d029 beq.n 8009e9e <ETH_Prepare_Tx_Descriptors+0x3ae>
{
descidx = firstdescidx;
8009e4a: 6a3b ldr r3, [r7, #32]
8009e4c: 63fb str r3, [r7, #60] @ 0x3c
dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
8009e4e: 6a7b ldr r3, [r7, #36] @ 0x24
8009e50: 6bfa ldr r2, [r7, #60] @ 0x3c
8009e52: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009e56: 633b str r3, [r7, #48] @ 0x30
/* clear previous desc own bit */
for (idx = 0; idx < descnbr; idx ++)
8009e58: 2300 movs r3, #0
8009e5a: 63bb str r3, [r7, #56] @ 0x38
8009e5c: e019 b.n 8009e92 <ETH_Prepare_Tx_Descriptors+0x3a2>
__ASM volatile ("dmb 0xF":::"memory");
8009e5e: f3bf 8f5f dmb sy
}
8009e62: bf00 nop
{
/* Ensure rest of descriptor is written to RAM before the OWN bit */
__DMB();
CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
8009e64: 6b3b ldr r3, [r7, #48] @ 0x30
8009e66: 68db ldr r3, [r3, #12]
8009e68: f023 4200 bic.w r2, r3, #2147483648 @ 0x80000000
8009e6c: 6b3b ldr r3, [r7, #48] @ 0x30
8009e6e: 60da str r2, [r3, #12]
/* Increment current tx descriptor index */
INCR_TX_DESC_INDEX(descidx, 1U);
8009e70: 6bfb ldr r3, [r7, #60] @ 0x3c
8009e72: 3301 adds r3, #1
8009e74: 63fb str r3, [r7, #60] @ 0x3c
8009e76: 6bfb ldr r3, [r7, #60] @ 0x3c
8009e78: 2b03 cmp r3, #3
8009e7a: d902 bls.n 8009e82 <ETH_Prepare_Tx_Descriptors+0x392>
8009e7c: 6bfb ldr r3, [r7, #60] @ 0x3c
8009e7e: 3b04 subs r3, #4
8009e80: 63fb str r3, [r7, #60] @ 0x3c
/* Get current descriptor address */
dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
8009e82: 6a7b ldr r3, [r7, #36] @ 0x24
8009e84: 6bfa ldr r2, [r7, #60] @ 0x3c
8009e86: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8009e8a: 633b str r3, [r7, #48] @ 0x30
for (idx = 0; idx < descnbr; idx ++)
8009e8c: 6bbb ldr r3, [r7, #56] @ 0x38
8009e8e: 3301 adds r3, #1
8009e90: 63bb str r3, [r7, #56] @ 0x38
8009e92: 6bba ldr r2, [r7, #56] @ 0x38
8009e94: 6b7b ldr r3, [r7, #52] @ 0x34
8009e96: 429a cmp r2, r3
8009e98: d3e1 bcc.n 8009e5e <ETH_Prepare_Tx_Descriptors+0x36e>
}
return HAL_ETH_ERROR_BUSY;
8009e9a: 2302 movs r3, #2
8009e9c: e0bb b.n 800a016 <ETH_Prepare_Tx_Descriptors+0x526>
}
descnbr += 1U;
8009e9e: 6b7b ldr r3, [r7, #52] @ 0x34
8009ea0: 3301 adds r3, #1
8009ea2: 637b str r3, [r7, #52] @ 0x34
/* Get the next Tx buffer in the list */
txbuffer = txbuffer->next;
8009ea4: 6afb ldr r3, [r7, #44] @ 0x2c
8009ea6: 689b ldr r3, [r3, #8]
8009ea8: 62fb str r3, [r7, #44] @ 0x2c
/* Set header or buffer 1 address */
WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
8009eaa: 6afb ldr r3, [r7, #44] @ 0x2c
8009eac: 681b ldr r3, [r3, #0]
8009eae: 461a mov r2, r3
8009eb0: 6b3b ldr r3, [r7, #48] @ 0x30
8009eb2: 601a str r2, [r3, #0]
/* Set header or buffer 1 Length */
MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
8009eb4: 6b3b ldr r3, [r7, #48] @ 0x30
8009eb6: 689a ldr r2, [r3, #8]
8009eb8: 4b1f ldr r3, [pc, #124] @ (8009f38 <ETH_Prepare_Tx_Descriptors+0x448>)
8009eba: 4013 ands r3, r2
8009ebc: 6afa ldr r2, [r7, #44] @ 0x2c
8009ebe: 6852 ldr r2, [r2, #4]
8009ec0: 431a orrs r2, r3
8009ec2: 6b3b ldr r3, [r7, #48] @ 0x30
8009ec4: 609a str r2, [r3, #8]
if (txbuffer->next != NULL)
8009ec6: 6afb ldr r3, [r7, #44] @ 0x2c
8009ec8: 689b ldr r3, [r3, #8]
8009eca: 2b00 cmp r3, #0
8009ecc: d012 beq.n 8009ef4 <ETH_Prepare_Tx_Descriptors+0x404>
{
/* Get the next Tx buffer in the list */
txbuffer = txbuffer->next;
8009ece: 6afb ldr r3, [r7, #44] @ 0x2c
8009ed0: 689b ldr r3, [r3, #8]
8009ed2: 62fb str r3, [r7, #44] @ 0x2c
/* Set buffer 2 address */
WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
8009ed4: 6afb ldr r3, [r7, #44] @ 0x2c
8009ed6: 681b ldr r3, [r3, #0]
8009ed8: 461a mov r2, r3
8009eda: 6b3b ldr r3, [r7, #48] @ 0x30
8009edc: 605a str r2, [r3, #4]
/* Set buffer 2 Length */
MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
8009ede: 6b3b ldr r3, [r7, #48] @ 0x30
8009ee0: 689a ldr r2, [r3, #8]
8009ee2: 4b16 ldr r3, [pc, #88] @ (8009f3c <ETH_Prepare_Tx_Descriptors+0x44c>)
8009ee4: 4013 ands r3, r2
8009ee6: 6afa ldr r2, [r7, #44] @ 0x2c
8009ee8: 6852 ldr r2, [r2, #4]
8009eea: 0412 lsls r2, r2, #16
8009eec: 431a orrs r2, r3
8009eee: 6b3b ldr r3, [r7, #48] @ 0x30
8009ef0: 609a str r2, [r3, #8]
8009ef2: e008 b.n 8009f06 <ETH_Prepare_Tx_Descriptors+0x416>
}
else
{
WRITE_REG(dmatxdesc->DESC1, 0x0U);
8009ef4: 6b3b ldr r3, [r7, #48] @ 0x30
8009ef6: 2200 movs r2, #0
8009ef8: 605a str r2, [r3, #4]
/* Set buffer 2 Length */
MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
8009efa: 6b3b ldr r3, [r7, #48] @ 0x30
8009efc: 689a ldr r2, [r3, #8]
8009efe: 4b0f ldr r3, [pc, #60] @ (8009f3c <ETH_Prepare_Tx_Descriptors+0x44c>)
8009f00: 4013 ands r3, r2
8009f02: 6b3a ldr r2, [r7, #48] @ 0x30
8009f04: 6093 str r3, [r2, #8]
}
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
8009f06: 68bb ldr r3, [r7, #8]
8009f08: 681b ldr r3, [r3, #0]
8009f0a: f003 0310 and.w r3, r3, #16
8009f0e: 2b00 cmp r3, #0
8009f10: d018 beq.n 8009f44 <ETH_Prepare_Tx_Descriptors+0x454>
{
/* Set TCP payload length */
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
8009f12: 6b3b ldr r3, [r7, #48] @ 0x30
8009f14: 68da ldr r2, [r3, #12]
8009f16: 4b0a ldr r3, [pc, #40] @ (8009f40 <ETH_Prepare_Tx_Descriptors+0x450>)
8009f18: 4013 ands r3, r2
8009f1a: 68ba ldr r2, [r7, #8]
8009f1c: 69d2 ldr r2, [r2, #28]
8009f1e: 431a orrs r2, r3
8009f20: 6b3b ldr r3, [r7, #48] @ 0x30
8009f22: 60da str r2, [r3, #12]
/* Set TCP Segmentation Enabled bit */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
8009f24: 6b3b ldr r3, [r7, #48] @ 0x30
8009f26: 68db ldr r3, [r3, #12]
8009f28: f443 2280 orr.w r2, r3, #262144 @ 0x40000
8009f2c: 6b3b ldr r3, [r7, #48] @ 0x30
8009f2e: 60da str r2, [r3, #12]
8009f30: e020 b.n 8009f74 <ETH_Prepare_Tx_Descriptors+0x484>
8009f32: bf00 nop
8009f34: ffff8000 .word 0xffff8000
8009f38: ffffc000 .word 0xffffc000
8009f3c: c000ffff .word 0xc000ffff
8009f40: fffc0000 .word 0xfffc0000
}
else
{
/* Set the packet length */
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
8009f44: 6b3b ldr r3, [r7, #48] @ 0x30
8009f46: 68da ldr r2, [r3, #12]
8009f48: 4b36 ldr r3, [pc, #216] @ (800a024 <ETH_Prepare_Tx_Descriptors+0x534>)
8009f4a: 4013 ands r3, r2
8009f4c: 68ba ldr r2, [r7, #8]
8009f4e: 6852 ldr r2, [r2, #4]
8009f50: 431a orrs r2, r3
8009f52: 6b3b ldr r3, [r7, #48] @ 0x30
8009f54: 60da str r2, [r3, #12]
if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
8009f56: 68bb ldr r3, [r7, #8]
8009f58: 681b ldr r3, [r3, #0]
8009f5a: f003 0301 and.w r3, r3, #1
8009f5e: 2b00 cmp r3, #0
8009f60: d008 beq.n 8009f74 <ETH_Prepare_Tx_Descriptors+0x484>
{
/* Checksum Insertion Control */
MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
8009f62: 6b3b ldr r3, [r7, #48] @ 0x30
8009f64: 68db ldr r3, [r3, #12]
8009f66: f423 3240 bic.w r2, r3, #196608 @ 0x30000
8009f6a: 68bb ldr r3, [r7, #8]
8009f6c: 695b ldr r3, [r3, #20]
8009f6e: 431a orrs r2, r3
8009f70: 6b3b ldr r3, [r7, #48] @ 0x30
8009f72: 60da str r2, [r3, #12]
}
}
bd_count += 1U;
8009f74: 6abb ldr r3, [r7, #40] @ 0x28
8009f76: 3301 adds r3, #1
8009f78: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("dmb 0xF":::"memory");
8009f7a: f3bf 8f5f dmb sy
}
8009f7e: bf00 nop
/* Ensure rest of descriptor is written to RAM before the OWN bit */
__DMB();
/* Set Own bit */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
8009f80: 6b3b ldr r3, [r7, #48] @ 0x30
8009f82: 68db ldr r3, [r3, #12]
8009f84: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
8009f88: 6b3b ldr r3, [r7, #48] @ 0x30
8009f8a: 60da str r2, [r3, #12]
/* Mark it as NORMAL descriptor */
CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
8009f8c: 6b3b ldr r3, [r7, #48] @ 0x30
8009f8e: 68db ldr r3, [r3, #12]
8009f90: f023 4280 bic.w r2, r3, #1073741824 @ 0x40000000
8009f94: 6b3b ldr r3, [r7, #48] @ 0x30
8009f96: 60da str r2, [r3, #12]
while (txbuffer->next != NULL)
8009f98: 6afb ldr r3, [r7, #44] @ 0x2c
8009f9a: 689b ldr r3, [r3, #8]
8009f9c: 2b00 cmp r3, #0
8009f9e: f47f af2b bne.w 8009df8 <ETH_Prepare_Tx_Descriptors+0x308>
}
if (ItMode != ((uint32_t)RESET))
8009fa2: 687b ldr r3, [r7, #4]
8009fa4: 2b00 cmp r3, #0
8009fa6: d006 beq.n 8009fb6 <ETH_Prepare_Tx_Descriptors+0x4c6>
{
/* Set Interrupt on completion bit */
SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
8009fa8: 6b3b ldr r3, [r7, #48] @ 0x30
8009faa: 689b ldr r3, [r3, #8]
8009fac: f043 4200 orr.w r2, r3, #2147483648 @ 0x80000000
8009fb0: 6b3b ldr r3, [r7, #48] @ 0x30
8009fb2: 609a str r2, [r3, #8]
8009fb4: e005 b.n 8009fc2 <ETH_Prepare_Tx_Descriptors+0x4d2>
}
else
{
/* Clear Interrupt on completion bit */
CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
8009fb6: 6b3b ldr r3, [r7, #48] @ 0x30
8009fb8: 689b ldr r3, [r3, #8]
8009fba: f023 4200 bic.w r2, r3, #2147483648 @ 0x80000000
8009fbe: 6b3b ldr r3, [r7, #48] @ 0x30
8009fc0: 609a str r2, [r3, #8]
}
/* Mark it as LAST descriptor */
SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
8009fc2: 6b3b ldr r3, [r7, #48] @ 0x30
8009fc4: 68db ldr r3, [r3, #12]
8009fc6: f043 5280 orr.w r2, r3, #268435456 @ 0x10000000
8009fca: 6b3b ldr r3, [r7, #48] @ 0x30
8009fcc: 60da str r2, [r3, #12]
/* Save the current packet address to expose it to the application */
dmatxdesclist->PacketAddress[descidx] = dmatxdesclist->CurrentPacketAddress;
8009fce: 6a7b ldr r3, [r7, #36] @ 0x24
8009fd0: 6a5a ldr r2, [r3, #36] @ 0x24
8009fd2: 6a79 ldr r1, [r7, #36] @ 0x24
8009fd4: 6bfb ldr r3, [r7, #60] @ 0x3c
8009fd6: 3304 adds r3, #4
8009fd8: 009b lsls r3, r3, #2
8009fda: 440b add r3, r1
8009fdc: 605a str r2, [r3, #4]
dmatxdesclist->CurTxDesc = descidx;
8009fde: 6a7b ldr r3, [r7, #36] @ 0x24
8009fe0: 6bfa ldr r2, [r7, #60] @ 0x3c
8009fe2: 611a str r2, [r3, #16]
__ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
8009fe4: f3ef 8310 mrs r3, PRIMASK
8009fe8: 613b str r3, [r7, #16]
return(result);
8009fea: 693b ldr r3, [r7, #16]
/* Enter critical section */
primask_bit = __get_PRIMASK();
8009fec: 61fb str r3, [r7, #28]
8009fee: 2301 movs r3, #1
8009ff0: 617b str r3, [r7, #20]
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
8009ff2: 697b ldr r3, [r7, #20]
8009ff4: f383 8810 msr PRIMASK, r3
}
8009ff8: bf00 nop
__set_PRIMASK(1);
dmatxdesclist->BuffersInUse += bd_count + 1U;
8009ffa: 6a7b ldr r3, [r7, #36] @ 0x24
8009ffc: 6a9a ldr r2, [r3, #40] @ 0x28
8009ffe: 6abb ldr r3, [r7, #40] @ 0x28
800a000: 4413 add r3, r2
800a002: 1c5a adds r2, r3, #1
800a004: 6a7b ldr r3, [r7, #36] @ 0x24
800a006: 629a str r2, [r3, #40] @ 0x28
800a008: 69fb ldr r3, [r7, #28]
800a00a: 61bb str r3, [r7, #24]
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
800a00c: 69bb ldr r3, [r7, #24]
800a00e: f383 8810 msr PRIMASK, r3
}
800a012: bf00 nop
/* Exit critical section: restore previous priority mask */
__set_PRIMASK(primask_bit);
/* Return function status */
return HAL_ETH_ERROR_NONE;
800a014: 2300 movs r3, #0
}
800a016: 4618 mov r0, r3
800a018: 3744 adds r7, #68 @ 0x44
800a01a: 46bd mov sp, r7
800a01c: f85d 7b04 ldr.w r7, [sp], #4
800a020: 4770 bx lr
800a022: bf00 nop
800a024: ffff8000 .word 0xffff8000
0800a028 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
800a028: b480 push {r7}
800a02a: b089 sub sp, #36 @ 0x24
800a02c: af00 add r7, sp, #0
800a02e: 6078 str r0, [r7, #4]
800a030: 6039 str r1, [r7, #0]
uint32_t position = 0x00U;
800a032: 2300 movs r3, #0
800a034: 61fb str r3, [r7, #28]
EXTI_Core_TypeDef *EXTI_CurrentCPU;
#if defined(DUAL_CORE) && defined(CORE_CM4)
EXTI_CurrentCPU = EXTI_D2; /* EXTI for CM4 CPU */
#else
EXTI_CurrentCPU = EXTI_D1; /* EXTI for CM7 CPU */
800a036: 4b89 ldr r3, [pc, #548] @ (800a25c <HAL_GPIO_Init+0x234>)
800a038: 617b str r3, [r7, #20]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00U)
800a03a: e194 b.n 800a366 <HAL_GPIO_Init+0x33e>
{
/* Get current io position */
iocurrent = (GPIO_Init->Pin) & (1UL << position);
800a03c: 683b ldr r3, [r7, #0]
800a03e: 681a ldr r2, [r3, #0]
800a040: 2101 movs r1, #1
800a042: 69fb ldr r3, [r7, #28]
800a044: fa01 f303 lsl.w r3, r1, r3
800a048: 4013 ands r3, r2
800a04a: 613b str r3, [r7, #16]
if (iocurrent != 0x00U)
800a04c: 693b ldr r3, [r7, #16]
800a04e: 2b00 cmp r3, #0
800a050: f000 8186 beq.w 800a360 <HAL_GPIO_Init+0x338>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
800a054: 683b ldr r3, [r7, #0]
800a056: 685b ldr r3, [r3, #4]
800a058: f003 0303 and.w r3, r3, #3
800a05c: 2b01 cmp r3, #1
800a05e: d005 beq.n 800a06c <HAL_GPIO_Init+0x44>
800a060: 683b ldr r3, [r7, #0]
800a062: 685b ldr r3, [r3, #4]
800a064: f003 0303 and.w r3, r3, #3
800a068: 2b02 cmp r3, #2
800a06a: d130 bne.n 800a0ce <HAL_GPIO_Init+0xa6>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
800a06c: 687b ldr r3, [r7, #4]
800a06e: 689b ldr r3, [r3, #8]
800a070: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U));
800a072: 69fb ldr r3, [r7, #28]
800a074: 005b lsls r3, r3, #1
800a076: 2203 movs r2, #3
800a078: fa02 f303 lsl.w r3, r2, r3
800a07c: 43db mvns r3, r3
800a07e: 69ba ldr r2, [r7, #24]
800a080: 4013 ands r3, r2
800a082: 61bb str r3, [r7, #24]
temp |= (GPIO_Init->Speed << (position * 2U));
800a084: 683b ldr r3, [r7, #0]
800a086: 68da ldr r2, [r3, #12]
800a088: 69fb ldr r3, [r7, #28]
800a08a: 005b lsls r3, r3, #1
800a08c: fa02 f303 lsl.w r3, r2, r3
800a090: 69ba ldr r2, [r7, #24]
800a092: 4313 orrs r3, r2
800a094: 61bb str r3, [r7, #24]
GPIOx->OSPEEDR = temp;
800a096: 687b ldr r3, [r7, #4]
800a098: 69ba ldr r2, [r7, #24]
800a09a: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
800a09c: 687b ldr r3, [r7, #4]
800a09e: 685b ldr r3, [r3, #4]
800a0a0: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OTYPER_OT0 << position) ;
800a0a2: 2201 movs r2, #1
800a0a4: 69fb ldr r3, [r7, #28]
800a0a6: fa02 f303 lsl.w r3, r2, r3
800a0aa: 43db mvns r3, r3
800a0ac: 69ba ldr r2, [r7, #24]
800a0ae: 4013 ands r3, r2
800a0b0: 61bb str r3, [r7, #24]
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
800a0b2: 683b ldr r3, [r7, #0]
800a0b4: 685b ldr r3, [r3, #4]
800a0b6: 091b lsrs r3, r3, #4
800a0b8: f003 0201 and.w r2, r3, #1
800a0bc: 69fb ldr r3, [r7, #28]
800a0be: fa02 f303 lsl.w r3, r2, r3
800a0c2: 69ba ldr r2, [r7, #24]
800a0c4: 4313 orrs r3, r2
800a0c6: 61bb str r3, [r7, #24]
GPIOx->OTYPER = temp;
800a0c8: 687b ldr r3, [r7, #4]
800a0ca: 69ba ldr r2, [r7, #24]
800a0cc: 605a str r2, [r3, #4]
}
if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
800a0ce: 683b ldr r3, [r7, #0]
800a0d0: 685b ldr r3, [r3, #4]
800a0d2: f003 0303 and.w r3, r3, #3
800a0d6: 2b03 cmp r3, #3
800a0d8: d017 beq.n 800a10a <HAL_GPIO_Init+0xe2>
{
/* Check the Pull parameter */
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
800a0da: 687b ldr r3, [r7, #4]
800a0dc: 68db ldr r3, [r3, #12]
800a0de: 61bb str r3, [r7, #24]
temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
800a0e0: 69fb ldr r3, [r7, #28]
800a0e2: 005b lsls r3, r3, #1
800a0e4: 2203 movs r2, #3
800a0e6: fa02 f303 lsl.w r3, r2, r3
800a0ea: 43db mvns r3, r3
800a0ec: 69ba ldr r2, [r7, #24]
800a0ee: 4013 ands r3, r2
800a0f0: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Pull) << (position * 2U));
800a0f2: 683b ldr r3, [r7, #0]
800a0f4: 689a ldr r2, [r3, #8]
800a0f6: 69fb ldr r3, [r7, #28]
800a0f8: 005b lsls r3, r3, #1
800a0fa: fa02 f303 lsl.w r3, r2, r3
800a0fe: 69ba ldr r2, [r7, #24]
800a100: 4313 orrs r3, r2
800a102: 61bb str r3, [r7, #24]
GPIOx->PUPDR = temp;
800a104: 687b ldr r3, [r7, #4]
800a106: 69ba ldr r2, [r7, #24]
800a108: 60da str r2, [r3, #12]
}
/* In case of Alternate function mode selection */
if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
800a10a: 683b ldr r3, [r7, #0]
800a10c: 685b ldr r3, [r3, #4]
800a10e: f003 0303 and.w r3, r3, #3
800a112: 2b02 cmp r3, #2
800a114: d123 bne.n 800a15e <HAL_GPIO_Init+0x136>
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3U];
800a116: 69fb ldr r3, [r7, #28]
800a118: 08da lsrs r2, r3, #3
800a11a: 687b ldr r3, [r7, #4]
800a11c: 3208 adds r2, #8
800a11e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800a122: 61bb str r3, [r7, #24]
temp &= ~(0xFU << ((position & 0x07U) * 4U));
800a124: 69fb ldr r3, [r7, #28]
800a126: f003 0307 and.w r3, r3, #7
800a12a: 009b lsls r3, r3, #2
800a12c: 220f movs r2, #15
800a12e: fa02 f303 lsl.w r3, r2, r3
800a132: 43db mvns r3, r3
800a134: 69ba ldr r2, [r7, #24]
800a136: 4013 ands r3, r2
800a138: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Alternate) << ((position & 0x07U) * 4U));
800a13a: 683b ldr r3, [r7, #0]
800a13c: 691a ldr r2, [r3, #16]
800a13e: 69fb ldr r3, [r7, #28]
800a140: f003 0307 and.w r3, r3, #7
800a144: 009b lsls r3, r3, #2
800a146: fa02 f303 lsl.w r3, r2, r3
800a14a: 69ba ldr r2, [r7, #24]
800a14c: 4313 orrs r3, r2
800a14e: 61bb str r3, [r7, #24]
GPIOx->AFR[position >> 3U] = temp;
800a150: 69fb ldr r3, [r7, #28]
800a152: 08da lsrs r2, r3, #3
800a154: 687b ldr r3, [r7, #4]
800a156: 3208 adds r2, #8
800a158: 69b9 ldr r1, [r7, #24]
800a15a: f843 1022 str.w r1, [r3, r2, lsl #2]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
800a15e: 687b ldr r3, [r7, #4]
800a160: 681b ldr r3, [r3, #0]
800a162: 61bb str r3, [r7, #24]
temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
800a164: 69fb ldr r3, [r7, #28]
800a166: 005b lsls r3, r3, #1
800a168: 2203 movs r2, #3
800a16a: fa02 f303 lsl.w r3, r2, r3
800a16e: 43db mvns r3, r3
800a170: 69ba ldr r2, [r7, #24]
800a172: 4013 ands r3, r2
800a174: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
800a176: 683b ldr r3, [r7, #0]
800a178: 685b ldr r3, [r3, #4]
800a17a: f003 0203 and.w r2, r3, #3
800a17e: 69fb ldr r3, [r7, #28]
800a180: 005b lsls r3, r3, #1
800a182: fa02 f303 lsl.w r3, r2, r3
800a186: 69ba ldr r2, [r7, #24]
800a188: 4313 orrs r3, r2
800a18a: 61bb str r3, [r7, #24]
GPIOx->MODER = temp;
800a18c: 687b ldr r3, [r7, #4]
800a18e: 69ba ldr r2, [r7, #24]
800a190: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
800a192: 683b ldr r3, [r7, #0]
800a194: 685b ldr r3, [r3, #4]
800a196: f403 3340 and.w r3, r3, #196608 @ 0x30000
800a19a: 2b00 cmp r3, #0
800a19c: f000 80e0 beq.w 800a360 <HAL_GPIO_Init+0x338>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
800a1a0: 4b2f ldr r3, [pc, #188] @ (800a260 <HAL_GPIO_Init+0x238>)
800a1a2: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
800a1a6: 4a2e ldr r2, [pc, #184] @ (800a260 <HAL_GPIO_Init+0x238>)
800a1a8: f043 0302 orr.w r3, r3, #2
800a1ac: f8c2 30f4 str.w r3, [r2, #244] @ 0xf4
800a1b0: 4b2b ldr r3, [pc, #172] @ (800a260 <HAL_GPIO_Init+0x238>)
800a1b2: f8d3 30f4 ldr.w r3, [r3, #244] @ 0xf4
800a1b6: f003 0302 and.w r3, r3, #2
800a1ba: 60fb str r3, [r7, #12]
800a1bc: 68fb ldr r3, [r7, #12]
temp = SYSCFG->EXTICR[position >> 2U];
800a1be: 4a29 ldr r2, [pc, #164] @ (800a264 <HAL_GPIO_Init+0x23c>)
800a1c0: 69fb ldr r3, [r7, #28]
800a1c2: 089b lsrs r3, r3, #2
800a1c4: 3302 adds r3, #2
800a1c6: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800a1ca: 61bb str r3, [r7, #24]
temp &= ~(0x0FUL << (4U * (position & 0x03U)));
800a1cc: 69fb ldr r3, [r7, #28]
800a1ce: f003 0303 and.w r3, r3, #3
800a1d2: 009b lsls r3, r3, #2
800a1d4: 220f movs r2, #15
800a1d6: fa02 f303 lsl.w r3, r2, r3
800a1da: 43db mvns r3, r3
800a1dc: 69ba ldr r2, [r7, #24]
800a1de: 4013 ands r3, r2
800a1e0: 61bb str r3, [r7, #24]
temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)));
800a1e2: 687b ldr r3, [r7, #4]
800a1e4: 4a20 ldr r2, [pc, #128] @ (800a268 <HAL_GPIO_Init+0x240>)
800a1e6: 4293 cmp r3, r2
800a1e8: d052 beq.n 800a290 <HAL_GPIO_Init+0x268>
800a1ea: 687b ldr r3, [r7, #4]
800a1ec: 4a1f ldr r2, [pc, #124] @ (800a26c <HAL_GPIO_Init+0x244>)
800a1ee: 4293 cmp r3, r2
800a1f0: d031 beq.n 800a256 <HAL_GPIO_Init+0x22e>
800a1f2: 687b ldr r3, [r7, #4]
800a1f4: 4a1e ldr r2, [pc, #120] @ (800a270 <HAL_GPIO_Init+0x248>)
800a1f6: 4293 cmp r3, r2
800a1f8: d02b beq.n 800a252 <HAL_GPIO_Init+0x22a>
800a1fa: 687b ldr r3, [r7, #4]
800a1fc: 4a1d ldr r2, [pc, #116] @ (800a274 <HAL_GPIO_Init+0x24c>)
800a1fe: 4293 cmp r3, r2
800a200: d025 beq.n 800a24e <HAL_GPIO_Init+0x226>
800a202: 687b ldr r3, [r7, #4]
800a204: 4a1c ldr r2, [pc, #112] @ (800a278 <HAL_GPIO_Init+0x250>)
800a206: 4293 cmp r3, r2
800a208: d01f beq.n 800a24a <HAL_GPIO_Init+0x222>
800a20a: 687b ldr r3, [r7, #4]
800a20c: 4a1b ldr r2, [pc, #108] @ (800a27c <HAL_GPIO_Init+0x254>)
800a20e: 4293 cmp r3, r2
800a210: d019 beq.n 800a246 <HAL_GPIO_Init+0x21e>
800a212: 687b ldr r3, [r7, #4]
800a214: 4a1a ldr r2, [pc, #104] @ (800a280 <HAL_GPIO_Init+0x258>)
800a216: 4293 cmp r3, r2
800a218: d013 beq.n 800a242 <HAL_GPIO_Init+0x21a>
800a21a: 687b ldr r3, [r7, #4]
800a21c: 4a19 ldr r2, [pc, #100] @ (800a284 <HAL_GPIO_Init+0x25c>)
800a21e: 4293 cmp r3, r2
800a220: d00d beq.n 800a23e <HAL_GPIO_Init+0x216>
800a222: 687b ldr r3, [r7, #4]
800a224: 4a18 ldr r2, [pc, #96] @ (800a288 <HAL_GPIO_Init+0x260>)
800a226: 4293 cmp r3, r2
800a228: d007 beq.n 800a23a <HAL_GPIO_Init+0x212>
800a22a: 687b ldr r3, [r7, #4]
800a22c: 4a17 ldr r2, [pc, #92] @ (800a28c <HAL_GPIO_Init+0x264>)
800a22e: 4293 cmp r3, r2
800a230: d101 bne.n 800a236 <HAL_GPIO_Init+0x20e>
800a232: 2309 movs r3, #9
800a234: e02d b.n 800a292 <HAL_GPIO_Init+0x26a>
800a236: 230a movs r3, #10
800a238: e02b b.n 800a292 <HAL_GPIO_Init+0x26a>
800a23a: 2308 movs r3, #8
800a23c: e029 b.n 800a292 <HAL_GPIO_Init+0x26a>
800a23e: 2307 movs r3, #7
800a240: e027 b.n 800a292 <HAL_GPIO_Init+0x26a>
800a242: 2306 movs r3, #6
800a244: e025 b.n 800a292 <HAL_GPIO_Init+0x26a>
800a246: 2305 movs r3, #5
800a248: e023 b.n 800a292 <HAL_GPIO_Init+0x26a>
800a24a: 2304 movs r3, #4
800a24c: e021 b.n 800a292 <HAL_GPIO_Init+0x26a>
800a24e: 2303 movs r3, #3
800a250: e01f b.n 800a292 <HAL_GPIO_Init+0x26a>
800a252: 2302 movs r3, #2
800a254: e01d b.n 800a292 <HAL_GPIO_Init+0x26a>
800a256: 2301 movs r3, #1
800a258: e01b b.n 800a292 <HAL_GPIO_Init+0x26a>
800a25a: bf00 nop
800a25c: 58000080 .word 0x58000080
800a260: 58024400 .word 0x58024400
800a264: 58000400 .word 0x58000400
800a268: 58020000 .word 0x58020000
800a26c: 58020400 .word 0x58020400
800a270: 58020800 .word 0x58020800
800a274: 58020c00 .word 0x58020c00
800a278: 58021000 .word 0x58021000
800a27c: 58021400 .word 0x58021400
800a280: 58021800 .word 0x58021800
800a284: 58021c00 .word 0x58021c00
800a288: 58022000 .word 0x58022000
800a28c: 58022400 .word 0x58022400
800a290: 2300 movs r3, #0
800a292: 69fa ldr r2, [r7, #28]
800a294: f002 0203 and.w r2, r2, #3
800a298: 0092 lsls r2, r2, #2
800a29a: 4093 lsls r3, r2
800a29c: 69ba ldr r2, [r7, #24]
800a29e: 4313 orrs r3, r2
800a2a0: 61bb str r3, [r7, #24]
SYSCFG->EXTICR[position >> 2U] = temp;
800a2a2: 4938 ldr r1, [pc, #224] @ (800a384 <HAL_GPIO_Init+0x35c>)
800a2a4: 69fb ldr r3, [r7, #28]
800a2a6: 089b lsrs r3, r3, #2
800a2a8: 3302 adds r3, #2
800a2aa: 69ba ldr r2, [r7, #24]
800a2ac: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR1;
800a2b0: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a2b4: 681b ldr r3, [r3, #0]
800a2b6: 61bb str r3, [r7, #24]
temp &= ~(iocurrent);
800a2b8: 693b ldr r3, [r7, #16]
800a2ba: 43db mvns r3, r3
800a2bc: 69ba ldr r2, [r7, #24]
800a2be: 4013 ands r3, r2
800a2c0: 61bb str r3, [r7, #24]
if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
800a2c2: 683b ldr r3, [r7, #0]
800a2c4: 685b ldr r3, [r3, #4]
800a2c6: f403 1380 and.w r3, r3, #1048576 @ 0x100000
800a2ca: 2b00 cmp r3, #0
800a2cc: d003 beq.n 800a2d6 <HAL_GPIO_Init+0x2ae>
{
temp |= iocurrent;
800a2ce: 69ba ldr r2, [r7, #24]
800a2d0: 693b ldr r3, [r7, #16]
800a2d2: 4313 orrs r3, r2
800a2d4: 61bb str r3, [r7, #24]
}
EXTI->RTSR1 = temp;
800a2d6: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a2da: 69bb ldr r3, [r7, #24]
800a2dc: 6013 str r3, [r2, #0]
temp = EXTI->FTSR1;
800a2de: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a2e2: 685b ldr r3, [r3, #4]
800a2e4: 61bb str r3, [r7, #24]
temp &= ~(iocurrent);
800a2e6: 693b ldr r3, [r7, #16]
800a2e8: 43db mvns r3, r3
800a2ea: 69ba ldr r2, [r7, #24]
800a2ec: 4013 ands r3, r2
800a2ee: 61bb str r3, [r7, #24]
if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
800a2f0: 683b ldr r3, [r7, #0]
800a2f2: 685b ldr r3, [r3, #4]
800a2f4: f403 1300 and.w r3, r3, #2097152 @ 0x200000
800a2f8: 2b00 cmp r3, #0
800a2fa: d003 beq.n 800a304 <HAL_GPIO_Init+0x2dc>
{
temp |= iocurrent;
800a2fc: 69ba ldr r2, [r7, #24]
800a2fe: 693b ldr r3, [r7, #16]
800a300: 4313 orrs r3, r2
800a302: 61bb str r3, [r7, #24]
}
EXTI->FTSR1 = temp;
800a304: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a308: 69bb ldr r3, [r7, #24]
800a30a: 6053 str r3, [r2, #4]
temp = EXTI_CurrentCPU->EMR1;
800a30c: 697b ldr r3, [r7, #20]
800a30e: 685b ldr r3, [r3, #4]
800a310: 61bb str r3, [r7, #24]
temp &= ~(iocurrent);
800a312: 693b ldr r3, [r7, #16]
800a314: 43db mvns r3, r3
800a316: 69ba ldr r2, [r7, #24]
800a318: 4013 ands r3, r2
800a31a: 61bb str r3, [r7, #24]
if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
800a31c: 683b ldr r3, [r7, #0]
800a31e: 685b ldr r3, [r3, #4]
800a320: f403 3300 and.w r3, r3, #131072 @ 0x20000
800a324: 2b00 cmp r3, #0
800a326: d003 beq.n 800a330 <HAL_GPIO_Init+0x308>
{
temp |= iocurrent;
800a328: 69ba ldr r2, [r7, #24]
800a32a: 693b ldr r3, [r7, #16]
800a32c: 4313 orrs r3, r2
800a32e: 61bb str r3, [r7, #24]
}
EXTI_CurrentCPU->EMR1 = temp;
800a330: 697b ldr r3, [r7, #20]
800a332: 69ba ldr r2, [r7, #24]
800a334: 605a str r2, [r3, #4]
/* Clear EXTI line configuration */
temp = EXTI_CurrentCPU->IMR1;
800a336: 697b ldr r3, [r7, #20]
800a338: 681b ldr r3, [r3, #0]
800a33a: 61bb str r3, [r7, #24]
temp &= ~(iocurrent);
800a33c: 693b ldr r3, [r7, #16]
800a33e: 43db mvns r3, r3
800a340: 69ba ldr r2, [r7, #24]
800a342: 4013 ands r3, r2
800a344: 61bb str r3, [r7, #24]
if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
800a346: 683b ldr r3, [r7, #0]
800a348: 685b ldr r3, [r3, #4]
800a34a: f403 3380 and.w r3, r3, #65536 @ 0x10000
800a34e: 2b00 cmp r3, #0
800a350: d003 beq.n 800a35a <HAL_GPIO_Init+0x332>
{
temp |= iocurrent;
800a352: 69ba ldr r2, [r7, #24]
800a354: 693b ldr r3, [r7, #16]
800a356: 4313 orrs r3, r2
800a358: 61bb str r3, [r7, #24]
}
EXTI_CurrentCPU->IMR1 = temp;
800a35a: 697b ldr r3, [r7, #20]
800a35c: 69ba ldr r2, [r7, #24]
800a35e: 601a str r2, [r3, #0]
}
}
position++;
800a360: 69fb ldr r3, [r7, #28]
800a362: 3301 adds r3, #1
800a364: 61fb str r3, [r7, #28]
while (((GPIO_Init->Pin) >> position) != 0x00U)
800a366: 683b ldr r3, [r7, #0]
800a368: 681a ldr r2, [r3, #0]
800a36a: 69fb ldr r3, [r7, #28]
800a36c: fa22 f303 lsr.w r3, r2, r3
800a370: 2b00 cmp r3, #0
800a372: f47f ae63 bne.w 800a03c <HAL_GPIO_Init+0x14>
}
}
800a376: bf00 nop
800a378: bf00 nop
800a37a: 3724 adds r7, #36 @ 0x24
800a37c: 46bd mov sp, r7
800a37e: f85d 7b04 ldr.w r7, [sp], #4
800a382: 4770 bx lr
800a384: 58000400 .word 0x58000400
0800a388 <HAL_GPIO_ReadPin>:
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
800a388: b480 push {r7}
800a38a: b085 sub sp, #20
800a38c: af00 add r7, sp, #0
800a38e: 6078 str r0, [r7, #4]
800a390: 460b mov r3, r1
800a392: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != 0x00U)
800a394: 687b ldr r3, [r7, #4]
800a396: 691a ldr r2, [r3, #16]
800a398: 887b ldrh r3, [r7, #2]
800a39a: 4013 ands r3, r2
800a39c: 2b00 cmp r3, #0
800a39e: d002 beq.n 800a3a6 <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
800a3a0: 2301 movs r3, #1
800a3a2: 73fb strb r3, [r7, #15]
800a3a4: e001 b.n 800a3aa <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
800a3a6: 2300 movs r3, #0
800a3a8: 73fb strb r3, [r7, #15]
}
return bitstatus;
800a3aa: 7bfb ldrb r3, [r7, #15]
}
800a3ac: 4618 mov r0, r3
800a3ae: 3714 adds r7, #20
800a3b0: 46bd mov sp, r7
800a3b2: f85d 7b04 ldr.w r7, [sp], #4
800a3b6: 4770 bx lr
0800a3b8 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
800a3b8: b480 push {r7}
800a3ba: b083 sub sp, #12
800a3bc: af00 add r7, sp, #0
800a3be: 6078 str r0, [r7, #4]
800a3c0: 460b mov r3, r1
800a3c2: 807b strh r3, [r7, #2]
800a3c4: 4613 mov r3, r2
800a3c6: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
800a3c8: 787b ldrb r3, [r7, #1]
800a3ca: 2b00 cmp r3, #0
800a3cc: d003 beq.n 800a3d6 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
800a3ce: 887a ldrh r2, [r7, #2]
800a3d0: 687b ldr r3, [r7, #4]
800a3d2: 619a str r2, [r3, #24]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
}
}
800a3d4: e003 b.n 800a3de <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
800a3d6: 887b ldrh r3, [r7, #2]
800a3d8: 041a lsls r2, r3, #16
800a3da: 687b ldr r3, [r7, #4]
800a3dc: 619a str r2, [r3, #24]
}
800a3de: bf00 nop
800a3e0: 370c adds r7, #12
800a3e2: 46bd mov sp, r7
800a3e4: f85d 7b04 ldr.w r7, [sp], #4
800a3e8: 4770 bx lr
0800a3ea <HAL_IWDG_Init>:
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
* the configuration information for the specified IWDG module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
{
800a3ea: b580 push {r7, lr}
800a3ec: b084 sub sp, #16
800a3ee: af00 add r7, sp, #0
800a3f0: 6078 str r0, [r7, #4]
uint32_t tickstart;
/* Check the IWDG handle allocation */
if (hiwdg == NULL)
800a3f2: 687b ldr r3, [r7, #4]
800a3f4: 2b00 cmp r3, #0
800a3f6: d101 bne.n 800a3fc <HAL_IWDG_Init+0x12>
{
return HAL_ERROR;
800a3f8: 2301 movs r3, #1
800a3fa: e041 b.n 800a480 <HAL_IWDG_Init+0x96>
assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));
/* Enable IWDG. LSI is turned on automatically */
__HAL_IWDG_START(hiwdg);
800a3fc: 687b ldr r3, [r7, #4]
800a3fe: 681b ldr r3, [r3, #0]
800a400: f64c 42cc movw r2, #52428 @ 0xcccc
800a404: 601a str r2, [r3, #0]
/* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
0x5555 in KR */
IWDG_ENABLE_WRITE_ACCESS(hiwdg);
800a406: 687b ldr r3, [r7, #4]
800a408: 681b ldr r3, [r3, #0]
800a40a: f245 5255 movw r2, #21845 @ 0x5555
800a40e: 601a str r2, [r3, #0]
/* Write to IWDG registers the Prescaler & Reload values to work with */
hiwdg->Instance->PR = hiwdg->Init.Prescaler;
800a410: 687b ldr r3, [r7, #4]
800a412: 681b ldr r3, [r3, #0]
800a414: 687a ldr r2, [r7, #4]
800a416: 6852 ldr r2, [r2, #4]
800a418: 605a str r2, [r3, #4]
hiwdg->Instance->RLR = hiwdg->Init.Reload;
800a41a: 687b ldr r3, [r7, #4]
800a41c: 681b ldr r3, [r3, #0]
800a41e: 687a ldr r2, [r7, #4]
800a420: 6892 ldr r2, [r2, #8]
800a422: 609a str r2, [r3, #8]
/* Check pending flag, if previous update not done, return timeout */
tickstart = HAL_GetTick();
800a424: f7fb fad0 bl 80059c8 <HAL_GetTick>
800a428: 60f8 str r0, [r7, #12]
/* Wait for register to be updated */
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
800a42a: e00f b.n 800a44c <HAL_IWDG_Init+0x62>
{
if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
800a42c: f7fb facc bl 80059c8 <HAL_GetTick>
800a430: 4602 mov r2, r0
800a432: 68fb ldr r3, [r7, #12]
800a434: 1ad3 subs r3, r2, r3
800a436: 2b31 cmp r3, #49 @ 0x31
800a438: d908 bls.n 800a44c <HAL_IWDG_Init+0x62>
{
if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
800a43a: 687b ldr r3, [r7, #4]
800a43c: 681b ldr r3, [r3, #0]
800a43e: 68db ldr r3, [r3, #12]
800a440: f003 0307 and.w r3, r3, #7
800a444: 2b00 cmp r3, #0
800a446: d001 beq.n 800a44c <HAL_IWDG_Init+0x62>
{
return HAL_TIMEOUT;
800a448: 2303 movs r3, #3
800a44a: e019 b.n 800a480 <HAL_IWDG_Init+0x96>
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
800a44c: 687b ldr r3, [r7, #4]
800a44e: 681b ldr r3, [r3, #0]
800a450: 68db ldr r3, [r3, #12]
800a452: f003 0307 and.w r3, r3, #7
800a456: 2b00 cmp r3, #0
800a458: d1e8 bne.n 800a42c <HAL_IWDG_Init+0x42>
}
}
/* If window parameter is different than current value, modify window
register */
if (hiwdg->Instance->WINR != hiwdg->Init.Window)
800a45a: 687b ldr r3, [r7, #4]
800a45c: 681b ldr r3, [r3, #0]
800a45e: 691a ldr r2, [r3, #16]
800a460: 687b ldr r3, [r7, #4]
800a462: 68db ldr r3, [r3, #12]
800a464: 429a cmp r2, r3
800a466: d005 beq.n 800a474 <HAL_IWDG_Init+0x8a>
{
/* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
even if window feature is disabled, Watchdog will be reloaded by writing
windows register */
hiwdg->Instance->WINR = hiwdg->Init.Window;
800a468: 687b ldr r3, [r7, #4]
800a46a: 681b ldr r3, [r3, #0]
800a46c: 687a ldr r2, [r7, #4]
800a46e: 68d2 ldr r2, [r2, #12]
800a470: 611a str r2, [r3, #16]
800a472: e004 b.n 800a47e <HAL_IWDG_Init+0x94>
}
else
{
/* Reload IWDG counter with value defined in the reload register */
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
800a474: 687b ldr r3, [r7, #4]
800a476: 681b ldr r3, [r3, #0]
800a478: f64a 22aa movw r2, #43690 @ 0xaaaa
800a47c: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
800a47e: 2300 movs r3, #0
}
800a480: 4618 mov r0, r3
800a482: 3710 adds r7, #16
800a484: 46bd mov sp, r7
800a486: bd80 pop {r7, pc}
0800a488 <HAL_IWDG_Refresh>:
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
* the configuration information for the specified IWDG module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
{
800a488: b480 push {r7}
800a48a: b083 sub sp, #12
800a48c: af00 add r7, sp, #0
800a48e: 6078 str r0, [r7, #4]
/* Reload IWDG counter with value defined in the reload register */
__HAL_IWDG_RELOAD_COUNTER(hiwdg);
800a490: 687b ldr r3, [r7, #4]
800a492: 681b ldr r3, [r3, #0]
800a494: f64a 22aa movw r2, #43690 @ 0xaaaa
800a498: 601a str r2, [r3, #0]
/* Return function status */
return HAL_OK;
800a49a: 2300 movs r3, #0
}
800a49c: 4618 mov r0, r3
800a49e: 370c adds r7, #12
800a4a0: 46bd mov sp, r7
800a4a2: f85d 7b04 ldr.w r7, [sp], #4
800a4a6: 4770 bx lr
0800a4a8 <HAL_PWR_ConfigPVD>:
* driver. All combination are allowed: wake up only Cortex-M7, wake up
* only Cortex-M4 or wake up Cortex-M7 and Cortex-M4.
* @retval None.
*/
void HAL_PWR_ConfigPVD (PWR_PVDTypeDef *sConfigPVD)
{
800a4a8: b480 push {r7}
800a4aa: b083 sub sp, #12
800a4ac: af00 add r7, sp, #0
800a4ae: 6078 str r0, [r7, #4]
/* Check the PVD configuration parameter */
if (sConfigPVD == NULL)
800a4b0: 687b ldr r3, [r7, #4]
800a4b2: 2b00 cmp r3, #0
800a4b4: d069 beq.n 800a58a <HAL_PWR_ConfigPVD+0xe2>
/* Check the parameters */
assert_param (IS_PWR_PVD_LEVEL (sConfigPVD->PVDLevel));
assert_param (IS_PWR_PVD_MODE (sConfigPVD->Mode));
/* Set PLS[7:5] bits according to PVDLevel value */
MODIFY_REG (PWR->CR1, PWR_CR1_PLS, sConfigPVD->PVDLevel);
800a4b6: 4b38 ldr r3, [pc, #224] @ (800a598 <HAL_PWR_ConfigPVD+0xf0>)
800a4b8: 681b ldr r3, [r3, #0]
800a4ba: f023 02e0 bic.w r2, r3, #224 @ 0xe0
800a4be: 687b ldr r3, [r7, #4]
800a4c0: 681b ldr r3, [r3, #0]
800a4c2: 4935 ldr r1, [pc, #212] @ (800a598 <HAL_PWR_ConfigPVD+0xf0>)
800a4c4: 4313 orrs r3, r2
800a4c6: 600b str r3, [r1, #0]
/* Clear previous config */
#if !defined (DUAL_CORE)
__HAL_PWR_PVD_EXTI_DISABLE_EVENT ();
800a4c8: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a4cc: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800a4d0: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a4d4: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a4d8: f8c2 3084 str.w r3, [r2, #132] @ 0x84
__HAL_PWR_PVD_EXTI_DISABLE_IT ();
800a4dc: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a4e0: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800a4e4: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a4e8: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a4ec: f8c2 3080 str.w r3, [r2, #128] @ 0x80
#endif /* !defined (DUAL_CORE) */
__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE ();
800a4f0: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a4f4: 681b ldr r3, [r3, #0]
800a4f6: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a4fa: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a4fe: 6013 str r3, [r2, #0]
__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE ();
800a500: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a504: 685b ldr r3, [r3, #4]
800a506: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a50a: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a50e: 6053 str r3, [r2, #4]
#if !defined (DUAL_CORE)
/* Interrupt mode configuration */
if ((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
800a510: 687b ldr r3, [r7, #4]
800a512: 685b ldr r3, [r3, #4]
800a514: f403 3380 and.w r3, r3, #65536 @ 0x10000
800a518: 2b00 cmp r3, #0
800a51a: d009 beq.n 800a530 <HAL_PWR_ConfigPVD+0x88>
{
__HAL_PWR_PVD_EXTI_ENABLE_IT ();
800a51c: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a520: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800a524: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a528: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a52c: f8c2 3080 str.w r3, [r2, #128] @ 0x80
}
/* Event mode configuration */
if ((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
800a530: 687b ldr r3, [r7, #4]
800a532: 685b ldr r3, [r3, #4]
800a534: f403 3300 and.w r3, r3, #131072 @ 0x20000
800a538: 2b00 cmp r3, #0
800a53a: d009 beq.n 800a550 <HAL_PWR_ConfigPVD+0xa8>
{
__HAL_PWR_PVD_EXTI_ENABLE_EVENT ();
800a53c: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a540: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800a544: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a548: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a54c: f8c2 3084 str.w r3, [r2, #132] @ 0x84
}
#endif /* !defined (DUAL_CORE) */
/* Rising edge configuration */
if ((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
800a550: 687b ldr r3, [r7, #4]
800a552: 685b ldr r3, [r3, #4]
800a554: f003 0301 and.w r3, r3, #1
800a558: 2b00 cmp r3, #0
800a55a: d007 beq.n 800a56c <HAL_PWR_ConfigPVD+0xc4>
{
__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE ();
800a55c: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a560: 681b ldr r3, [r3, #0]
800a562: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a566: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a56a: 6013 str r3, [r2, #0]
}
/* Falling edge configuration */
if ((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
800a56c: 687b ldr r3, [r7, #4]
800a56e: 685b ldr r3, [r3, #4]
800a570: f003 0302 and.w r3, r3, #2
800a574: 2b00 cmp r3, #0
800a576: d009 beq.n 800a58c <HAL_PWR_ConfigPVD+0xe4>
{
__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE ();
800a578: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a57c: 685b ldr r3, [r3, #4]
800a57e: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a582: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a586: 6053 str r3, [r2, #4]
800a588: e000 b.n 800a58c <HAL_PWR_ConfigPVD+0xe4>
return;
800a58a: bf00 nop
}
}
800a58c: 370c adds r7, #12
800a58e: 46bd mov sp, r7
800a590: f85d 7b04 ldr.w r7, [sp], #4
800a594: 4770 bx lr
800a596: bf00 nop
800a598: 58024800 .word 0x58024800
0800a59c <HAL_PWR_EnablePVD>:
/**
* @brief Enable the Programmable Voltage Detector (PVD).
* @retval None.
*/
void HAL_PWR_EnablePVD (void)
{
800a59c: b480 push {r7}
800a59e: af00 add r7, sp, #0
/* Enable the power voltage detector */
SET_BIT (PWR->CR1, PWR_CR1_PVDEN);
800a5a0: 4b05 ldr r3, [pc, #20] @ (800a5b8 <HAL_PWR_EnablePVD+0x1c>)
800a5a2: 681b ldr r3, [r3, #0]
800a5a4: 4a04 ldr r2, [pc, #16] @ (800a5b8 <HAL_PWR_EnablePVD+0x1c>)
800a5a6: f043 0310 orr.w r3, r3, #16
800a5aa: 6013 str r3, [r2, #0]
}
800a5ac: bf00 nop
800a5ae: 46bd mov sp, r7
800a5b0: f85d 7b04 ldr.w r7, [sp], #4
800a5b4: 4770 bx lr
800a5b6: bf00 nop
800a5b8: 58024800 .word 0x58024800
0800a5bc <HAL_PWREx_ConfigSupply>:
* PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS
* regulator.
* @retval HAL status.
*/
HAL_StatusTypeDef HAL_PWREx_ConfigSupply (uint32_t SupplySource)
{
800a5bc: b580 push {r7, lr}
800a5be: b084 sub sp, #16
800a5c0: af00 add r7, sp, #0
800a5c2: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param (IS_PWR_SUPPLY (SupplySource));
/* Check if supply source was configured */
#if defined (PWR_FLAG_SCUEN)
if (__HAL_PWR_GET_FLAG (PWR_FLAG_SCUEN) == 0U)
800a5c4: 4b19 ldr r3, [pc, #100] @ (800a62c <HAL_PWREx_ConfigSupply+0x70>)
800a5c6: 68db ldr r3, [r3, #12]
800a5c8: f003 0304 and.w r3, r3, #4
800a5cc: 2b04 cmp r3, #4
800a5ce: d00a beq.n 800a5e6 <HAL_PWREx_ConfigSupply+0x2a>
#else
if ((PWR->CR3 & (PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)) != (PWR_CR3_SMPSEN | PWR_CR3_LDOEN))
#endif /* defined (PWR_FLAG_SCUEN) */
{
/* Check supply configuration */
if ((PWR->CR3 & PWR_SUPPLY_CONFIG_MASK) != SupplySource)
800a5d0: 4b16 ldr r3, [pc, #88] @ (800a62c <HAL_PWREx_ConfigSupply+0x70>)
800a5d2: 68db ldr r3, [r3, #12]
800a5d4: f003 0307 and.w r3, r3, #7
800a5d8: 687a ldr r2, [r7, #4]
800a5da: 429a cmp r2, r3
800a5dc: d001 beq.n 800a5e2 <HAL_PWREx_ConfigSupply+0x26>
{
/* Supply configuration update locked, can't apply a new supply config */
return HAL_ERROR;
800a5de: 2301 movs r3, #1
800a5e0: e01f b.n 800a622 <HAL_PWREx_ConfigSupply+0x66>
else
{
/* Supply configuration update locked, but new supply configuration
matches with old supply configuration : nothing to do
*/
return HAL_OK;
800a5e2: 2300 movs r3, #0
800a5e4: e01d b.n 800a622 <HAL_PWREx_ConfigSupply+0x66>
}
}
/* Set the power supply configuration */
MODIFY_REG (PWR->CR3, PWR_SUPPLY_CONFIG_MASK, SupplySource);
800a5e6: 4b11 ldr r3, [pc, #68] @ (800a62c <HAL_PWREx_ConfigSupply+0x70>)
800a5e8: 68db ldr r3, [r3, #12]
800a5ea: f023 0207 bic.w r2, r3, #7
800a5ee: 490f ldr r1, [pc, #60] @ (800a62c <HAL_PWREx_ConfigSupply+0x70>)
800a5f0: 687b ldr r3, [r7, #4]
800a5f2: 4313 orrs r3, r2
800a5f4: 60cb str r3, [r1, #12]
/* Get tick */
tickstart = HAL_GetTick ();
800a5f6: f7fb f9e7 bl 80059c8 <HAL_GetTick>
800a5fa: 60f8 str r0, [r7, #12]
/* Wait till voltage level flag is set */
while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
800a5fc: e009 b.n 800a612 <HAL_PWREx_ConfigSupply+0x56>
{
if ((HAL_GetTick () - tickstart) > PWR_FLAG_SETTING_DELAY)
800a5fe: f7fb f9e3 bl 80059c8 <HAL_GetTick>
800a602: 4602 mov r2, r0
800a604: 68fb ldr r3, [r7, #12]
800a606: 1ad3 subs r3, r2, r3
800a608: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8
800a60c: d901 bls.n 800a612 <HAL_PWREx_ConfigSupply+0x56>
{
return HAL_ERROR;
800a60e: 2301 movs r3, #1
800a610: e007 b.n 800a622 <HAL_PWREx_ConfigSupply+0x66>
while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
800a612: 4b06 ldr r3, [pc, #24] @ (800a62c <HAL_PWREx_ConfigSupply+0x70>)
800a614: 685b ldr r3, [r3, #4]
800a616: f403 5300 and.w r3, r3, #8192 @ 0x2000
800a61a: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800a61e: d1ee bne.n 800a5fe <HAL_PWREx_ConfigSupply+0x42>
}
}
}
#endif /* defined (SMPS) */
return HAL_OK;
800a620: 2300 movs r3, #0
}
800a622: 4618 mov r0, r3
800a624: 3710 adds r7, #16
800a626: 46bd mov sp, r7
800a628: bd80 pop {r7, pc}
800a62a: bf00 nop
800a62c: 58024800 .word 0x58024800
0800a630 <HAL_PWREx_ConfigAVD>:
* driver. All combination are allowed: wake up only Cortex-M7, wake up
* only Cortex-M4 and wake up Cortex-M7 and Cortex-M4.
* @retval None.
*/
void HAL_PWREx_ConfigAVD (PWREx_AVDTypeDef *sConfigAVD)
{
800a630: b480 push {r7}
800a632: b083 sub sp, #12
800a634: af00 add r7, sp, #0
800a636: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param (IS_PWR_AVD_LEVEL (sConfigAVD->AVDLevel));
assert_param (IS_PWR_AVD_MODE (sConfigAVD->Mode));
/* Set the ALS[18:17] bits according to AVDLevel value */
MODIFY_REG (PWR->CR1, PWR_CR1_ALS, sConfigAVD->AVDLevel);
800a638: 4b37 ldr r3, [pc, #220] @ (800a718 <HAL_PWREx_ConfigAVD+0xe8>)
800a63a: 681b ldr r3, [r3, #0]
800a63c: f423 22c0 bic.w r2, r3, #393216 @ 0x60000
800a640: 687b ldr r3, [r7, #4]
800a642: 681b ldr r3, [r3, #0]
800a644: 4934 ldr r1, [pc, #208] @ (800a718 <HAL_PWREx_ConfigAVD+0xe8>)
800a646: 4313 orrs r3, r2
800a648: 600b str r3, [r1, #0]
/* Clear any previous config */
#if !defined (DUAL_CORE)
__HAL_PWR_AVD_EXTI_DISABLE_EVENT ();
800a64a: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a64e: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800a652: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a656: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a65a: f8c2 3084 str.w r3, [r2, #132] @ 0x84
__HAL_PWR_AVD_EXTI_DISABLE_IT ();
800a65e: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a662: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800a666: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a66a: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a66e: f8c2 3080 str.w r3, [r2, #128] @ 0x80
#endif /* !defined (DUAL_CORE) */
__HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE ();
800a672: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a676: 681b ldr r3, [r3, #0]
800a678: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a67c: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a680: 6013 str r3, [r2, #0]
__HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE ();
800a682: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a686: 685b ldr r3, [r3, #4]
800a688: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a68c: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a690: 6053 str r3, [r2, #4]
#if !defined (DUAL_CORE)
/* Configure the interrupt mode */
if ((sConfigAVD->Mode & AVD_MODE_IT) == AVD_MODE_IT)
800a692: 687b ldr r3, [r7, #4]
800a694: 685b ldr r3, [r3, #4]
800a696: f403 3380 and.w r3, r3, #65536 @ 0x10000
800a69a: 2b00 cmp r3, #0
800a69c: d009 beq.n 800a6b2 <HAL_PWREx_ConfigAVD+0x82>
{
__HAL_PWR_AVD_EXTI_ENABLE_IT ();
800a69e: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a6a2: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800a6a6: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a6aa: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a6ae: f8c2 3080 str.w r3, [r2, #128] @ 0x80
}
/* Configure the event mode */
if ((sConfigAVD->Mode & AVD_MODE_EVT) == AVD_MODE_EVT)
800a6b2: 687b ldr r3, [r7, #4]
800a6b4: 685b ldr r3, [r3, #4]
800a6b6: f403 3300 and.w r3, r3, #131072 @ 0x20000
800a6ba: 2b00 cmp r3, #0
800a6bc: d009 beq.n 800a6d2 <HAL_PWREx_ConfigAVD+0xa2>
{
__HAL_PWR_AVD_EXTI_ENABLE_EVENT ();
800a6be: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a6c2: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800a6c6: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a6ca: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a6ce: f8c2 3084 str.w r3, [r2, #132] @ 0x84
}
#endif /* !defined (DUAL_CORE) */
/* Rising edge configuration */
if ((sConfigAVD->Mode & AVD_RISING_EDGE) == AVD_RISING_EDGE)
800a6d2: 687b ldr r3, [r7, #4]
800a6d4: 685b ldr r3, [r3, #4]
800a6d6: f003 0301 and.w r3, r3, #1
800a6da: 2b00 cmp r3, #0
800a6dc: d007 beq.n 800a6ee <HAL_PWREx_ConfigAVD+0xbe>
{
__HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE ();
800a6de: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a6e2: 681b ldr r3, [r3, #0]
800a6e4: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a6e8: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a6ec: 6013 str r3, [r2, #0]
}
/* Falling edge configuration */
if ((sConfigAVD->Mode & AVD_FALLING_EDGE) == AVD_FALLING_EDGE)
800a6ee: 687b ldr r3, [r7, #4]
800a6f0: 685b ldr r3, [r3, #4]
800a6f2: f003 0302 and.w r3, r3, #2
800a6f6: 2b00 cmp r3, #0
800a6f8: d007 beq.n 800a70a <HAL_PWREx_ConfigAVD+0xda>
{
__HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE ();
800a6fa: f04f 43b0 mov.w r3, #1476395008 @ 0x58000000
800a6fe: 685b ldr r3, [r3, #4]
800a700: f04f 42b0 mov.w r2, #1476395008 @ 0x58000000
800a704: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a708: 6053 str r3, [r2, #4]
}
}
800a70a: bf00 nop
800a70c: 370c adds r7, #12
800a70e: 46bd mov sp, r7
800a710: f85d 7b04 ldr.w r7, [sp], #4
800a714: 4770 bx lr
800a716: bf00 nop
800a718: 58024800 .word 0x58024800
0800a71c <HAL_PWREx_EnableAVD>:
/**
* @brief Enable the Analog Voltage Detector (AVD).
* @retval None.
*/
void HAL_PWREx_EnableAVD (void)
{
800a71c: b480 push {r7}
800a71e: af00 add r7, sp, #0
/* Enable the Analog Voltage Detector */
SET_BIT (PWR->CR1, PWR_CR1_AVDEN);
800a720: 4b05 ldr r3, [pc, #20] @ (800a738 <HAL_PWREx_EnableAVD+0x1c>)
800a722: 681b ldr r3, [r3, #0]
800a724: 4a04 ldr r2, [pc, #16] @ (800a738 <HAL_PWREx_EnableAVD+0x1c>)
800a726: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a72a: 6013 str r3, [r2, #0]
}
800a72c: bf00 nop
800a72e: 46bd mov sp, r7
800a730: f85d 7b04 ldr.w r7, [sp], #4
800a734: 4770 bx lr
800a736: bf00 nop
800a738: 58024800 .word 0x58024800
0800a73c <HAL_RCC_OscConfig>:
* supported by this function. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
800a73c: b580 push {r7, lr}
800a73e: b08c sub sp, #48 @ 0x30
800a740: af00 add r7, sp, #0
800a742: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t temp1_pllckcfg, temp2_pllckcfg;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
800a744: 687b ldr r3, [r7, #4]
800a746: 2b00 cmp r3, #0
800a748: d102 bne.n 800a750 <HAL_RCC_OscConfig+0x14>
{
return HAL_ERROR;
800a74a: 2301 movs r3, #1
800a74c: f000 bc48 b.w 800afe0 <HAL_RCC_OscConfig+0x8a4>
}
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
800a750: 687b ldr r3, [r7, #4]
800a752: 681b ldr r3, [r3, #0]
800a754: f003 0301 and.w r3, r3, #1
800a758: 2b00 cmp r3, #0
800a75a: f000 8088 beq.w 800a86e <HAL_RCC_OscConfig+0x132>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
800a75e: 4b99 ldr r3, [pc, #612] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a760: 691b ldr r3, [r3, #16]
800a762: f003 0338 and.w r3, r3, #56 @ 0x38
800a766: 62fb str r3, [r7, #44] @ 0x2c
const uint32_t temp_pllckselr = RCC->PLLCKSELR;
800a768: 4b96 ldr r3, [pc, #600] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a76a: 6a9b ldr r3, [r3, #40] @ 0x28
800a76c: 62bb str r3, [r7, #40] @ 0x28
/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
if ((temp_sysclksrc == RCC_CFGR_SWS_HSE) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSE)))
800a76e: 6afb ldr r3, [r7, #44] @ 0x2c
800a770: 2b10 cmp r3, #16
800a772: d007 beq.n 800a784 <HAL_RCC_OscConfig+0x48>
800a774: 6afb ldr r3, [r7, #44] @ 0x2c
800a776: 2b18 cmp r3, #24
800a778: d111 bne.n 800a79e <HAL_RCC_OscConfig+0x62>
800a77a: 6abb ldr r3, [r7, #40] @ 0x28
800a77c: f003 0303 and.w r3, r3, #3
800a780: 2b02 cmp r3, #2
800a782: d10c bne.n 800a79e <HAL_RCC_OscConfig+0x62>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
800a784: 4b8f ldr r3, [pc, #572] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a786: 681b ldr r3, [r3, #0]
800a788: f403 3300 and.w r3, r3, #131072 @ 0x20000
800a78c: 2b00 cmp r3, #0
800a78e: d06d beq.n 800a86c <HAL_RCC_OscConfig+0x130>
800a790: 687b ldr r3, [r7, #4]
800a792: 685b ldr r3, [r3, #4]
800a794: 2b00 cmp r3, #0
800a796: d169 bne.n 800a86c <HAL_RCC_OscConfig+0x130>
{
return HAL_ERROR;
800a798: 2301 movs r3, #1
800a79a: f000 bc21 b.w 800afe0 <HAL_RCC_OscConfig+0x8a4>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
800a79e: 687b ldr r3, [r7, #4]
800a7a0: 685b ldr r3, [r3, #4]
800a7a2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800a7a6: d106 bne.n 800a7b6 <HAL_RCC_OscConfig+0x7a>
800a7a8: 4b86 ldr r3, [pc, #536] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7aa: 681b ldr r3, [r3, #0]
800a7ac: 4a85 ldr r2, [pc, #532] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7ae: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a7b2: 6013 str r3, [r2, #0]
800a7b4: e02e b.n 800a814 <HAL_RCC_OscConfig+0xd8>
800a7b6: 687b ldr r3, [r7, #4]
800a7b8: 685b ldr r3, [r3, #4]
800a7ba: 2b00 cmp r3, #0
800a7bc: d10c bne.n 800a7d8 <HAL_RCC_OscConfig+0x9c>
800a7be: 4b81 ldr r3, [pc, #516] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7c0: 681b ldr r3, [r3, #0]
800a7c2: 4a80 ldr r2, [pc, #512] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7c4: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a7c8: 6013 str r3, [r2, #0]
800a7ca: 4b7e ldr r3, [pc, #504] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7cc: 681b ldr r3, [r3, #0]
800a7ce: 4a7d ldr r2, [pc, #500] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7d0: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800a7d4: 6013 str r3, [r2, #0]
800a7d6: e01d b.n 800a814 <HAL_RCC_OscConfig+0xd8>
800a7d8: 687b ldr r3, [r7, #4]
800a7da: 685b ldr r3, [r3, #4]
800a7dc: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
800a7e0: d10c bne.n 800a7fc <HAL_RCC_OscConfig+0xc0>
800a7e2: 4b78 ldr r3, [pc, #480] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7e4: 681b ldr r3, [r3, #0]
800a7e6: 4a77 ldr r2, [pc, #476] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7e8: f443 2380 orr.w r3, r3, #262144 @ 0x40000
800a7ec: 6013 str r3, [r2, #0]
800a7ee: 4b75 ldr r3, [pc, #468] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7f0: 681b ldr r3, [r3, #0]
800a7f2: 4a74 ldr r2, [pc, #464] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7f4: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800a7f8: 6013 str r3, [r2, #0]
800a7fa: e00b b.n 800a814 <HAL_RCC_OscConfig+0xd8>
800a7fc: 4b71 ldr r3, [pc, #452] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a7fe: 681b ldr r3, [r3, #0]
800a800: 4a70 ldr r2, [pc, #448] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a802: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800a806: 6013 str r3, [r2, #0]
800a808: 4b6e ldr r3, [pc, #440] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a80a: 681b ldr r3, [r3, #0]
800a80c: 4a6d ldr r2, [pc, #436] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a80e: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800a812: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
800a814: 687b ldr r3, [r7, #4]
800a816: 685b ldr r3, [r3, #4]
800a818: 2b00 cmp r3, #0
800a81a: d013 beq.n 800a844 <HAL_RCC_OscConfig+0x108>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
800a81c: f7fb f8d4 bl 80059c8 <HAL_GetTick>
800a820: 6278 str r0, [r7, #36] @ 0x24
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
800a822: e008 b.n 800a836 <HAL_RCC_OscConfig+0xfa>
{
if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
800a824: f7fb f8d0 bl 80059c8 <HAL_GetTick>
800a828: 4602 mov r2, r0
800a82a: 6a7b ldr r3, [r7, #36] @ 0x24
800a82c: 1ad3 subs r3, r2, r3
800a82e: 2b64 cmp r3, #100 @ 0x64
800a830: d901 bls.n 800a836 <HAL_RCC_OscConfig+0xfa>
{
return HAL_TIMEOUT;
800a832: 2303 movs r3, #3
800a834: e3d4 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
800a836: 4b63 ldr r3, [pc, #396] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a838: 681b ldr r3, [r3, #0]
800a83a: f403 3300 and.w r3, r3, #131072 @ 0x20000
800a83e: 2b00 cmp r3, #0
800a840: d0f0 beq.n 800a824 <HAL_RCC_OscConfig+0xe8>
800a842: e014 b.n 800a86e <HAL_RCC_OscConfig+0x132>
}
}
else
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
800a844: f7fb f8c0 bl 80059c8 <HAL_GetTick>
800a848: 6278 str r0, [r7, #36] @ 0x24
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
800a84a: e008 b.n 800a85e <HAL_RCC_OscConfig+0x122>
{
if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
800a84c: f7fb f8bc bl 80059c8 <HAL_GetTick>
800a850: 4602 mov r2, r0
800a852: 6a7b ldr r3, [r7, #36] @ 0x24
800a854: 1ad3 subs r3, r2, r3
800a856: 2b64 cmp r3, #100 @ 0x64
800a858: d901 bls.n 800a85e <HAL_RCC_OscConfig+0x122>
{
return HAL_TIMEOUT;
800a85a: 2303 movs r3, #3
800a85c: e3c0 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
800a85e: 4b59 ldr r3, [pc, #356] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a860: 681b ldr r3, [r3, #0]
800a862: f403 3300 and.w r3, r3, #131072 @ 0x20000
800a866: 2b00 cmp r3, #0
800a868: d1f0 bne.n 800a84c <HAL_RCC_OscConfig+0x110>
800a86a: e000 b.n 800a86e <HAL_RCC_OscConfig+0x132>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
800a86c: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
800a86e: 687b ldr r3, [r7, #4]
800a870: 681b ldr r3, [r3, #0]
800a872: f003 0302 and.w r3, r3, #2
800a876: 2b00 cmp r3, #0
800a878: f000 80ca beq.w 800aa10 <HAL_RCC_OscConfig+0x2d4>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_HSICALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* When the HSI is used as system clock it will not be disabled */
const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
800a87c: 4b51 ldr r3, [pc, #324] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a87e: 691b ldr r3, [r3, #16]
800a880: f003 0338 and.w r3, r3, #56 @ 0x38
800a884: 623b str r3, [r7, #32]
const uint32_t temp_pllckselr = RCC->PLLCKSELR;
800a886: 4b4f ldr r3, [pc, #316] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a888: 6a9b ldr r3, [r3, #40] @ 0x28
800a88a: 61fb str r3, [r7, #28]
if ((temp_sysclksrc == RCC_CFGR_SWS_HSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSI)))
800a88c: 6a3b ldr r3, [r7, #32]
800a88e: 2b00 cmp r3, #0
800a890: d007 beq.n 800a8a2 <HAL_RCC_OscConfig+0x166>
800a892: 6a3b ldr r3, [r7, #32]
800a894: 2b18 cmp r3, #24
800a896: d156 bne.n 800a946 <HAL_RCC_OscConfig+0x20a>
800a898: 69fb ldr r3, [r7, #28]
800a89a: f003 0303 and.w r3, r3, #3
800a89e: 2b00 cmp r3, #0
800a8a0: d151 bne.n 800a946 <HAL_RCC_OscConfig+0x20a>
{
/* When HSI is used as system clock it will not be disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
800a8a2: 4b48 ldr r3, [pc, #288] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a8a4: 681b ldr r3, [r3, #0]
800a8a6: f003 0304 and.w r3, r3, #4
800a8aa: 2b00 cmp r3, #0
800a8ac: d005 beq.n 800a8ba <HAL_RCC_OscConfig+0x17e>
800a8ae: 687b ldr r3, [r7, #4]
800a8b0: 68db ldr r3, [r3, #12]
800a8b2: 2b00 cmp r3, #0
800a8b4: d101 bne.n 800a8ba <HAL_RCC_OscConfig+0x17e>
{
return HAL_ERROR;
800a8b6: 2301 movs r3, #1
800a8b8: e392 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
}
/* Otherwise, only HSI division and calibration are allowed */
else
{
/* Enable the Internal High Speed oscillator (HSI, HSIDIV2, HSIDIV4, or HSIDIV8) */
__HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
800a8ba: 4b42 ldr r3, [pc, #264] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a8bc: 681b ldr r3, [r3, #0]
800a8be: f023 0219 bic.w r2, r3, #25
800a8c2: 687b ldr r3, [r7, #4]
800a8c4: 68db ldr r3, [r3, #12]
800a8c6: 493f ldr r1, [pc, #252] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a8c8: 4313 orrs r3, r2
800a8ca: 600b str r3, [r1, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800a8cc: f7fb f87c bl 80059c8 <HAL_GetTick>
800a8d0: 6278 str r0, [r7, #36] @ 0x24
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
800a8d2: e008 b.n 800a8e6 <HAL_RCC_OscConfig+0x1aa>
{
if ((uint32_t)(HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800a8d4: f7fb f878 bl 80059c8 <HAL_GetTick>
800a8d8: 4602 mov r2, r0
800a8da: 6a7b ldr r3, [r7, #36] @ 0x24
800a8dc: 1ad3 subs r3, r2, r3
800a8de: 2b02 cmp r3, #2
800a8e0: d901 bls.n 800a8e6 <HAL_RCC_OscConfig+0x1aa>
{
return HAL_TIMEOUT;
800a8e2: 2303 movs r3, #3
800a8e4: e37c b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
800a8e6: 4b37 ldr r3, [pc, #220] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a8e8: 681b ldr r3, [r3, #0]
800a8ea: f003 0304 and.w r3, r3, #4
800a8ee: 2b00 cmp r3, #0
800a8f0: d0f0 beq.n 800a8d4 <HAL_RCC_OscConfig+0x198>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800a8f2: f7fb f899 bl 8005a28 <HAL_GetREVID>
800a8f6: 4603 mov r3, r0
800a8f8: f241 0203 movw r2, #4099 @ 0x1003
800a8fc: 4293 cmp r3, r2
800a8fe: d817 bhi.n 800a930 <HAL_RCC_OscConfig+0x1f4>
800a900: 687b ldr r3, [r7, #4]
800a902: 691b ldr r3, [r3, #16]
800a904: 2b40 cmp r3, #64 @ 0x40
800a906: d108 bne.n 800a91a <HAL_RCC_OscConfig+0x1de>
800a908: 4b2e ldr r3, [pc, #184] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a90a: 685b ldr r3, [r3, #4]
800a90c: f423 337c bic.w r3, r3, #258048 @ 0x3f000
800a910: 4a2c ldr r2, [pc, #176] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a912: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800a916: 6053 str r3, [r2, #4]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
800a918: e07a b.n 800aa10 <HAL_RCC_OscConfig+0x2d4>
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800a91a: 4b2a ldr r3, [pc, #168] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a91c: 685b ldr r3, [r3, #4]
800a91e: f423 327c bic.w r2, r3, #258048 @ 0x3f000
800a922: 687b ldr r3, [r7, #4]
800a924: 691b ldr r3, [r3, #16]
800a926: 031b lsls r3, r3, #12
800a928: 4926 ldr r1, [pc, #152] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a92a: 4313 orrs r3, r2
800a92c: 604b str r3, [r1, #4]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
800a92e: e06f b.n 800aa10 <HAL_RCC_OscConfig+0x2d4>
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800a930: 4b24 ldr r3, [pc, #144] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a932: 685b ldr r3, [r3, #4]
800a934: f023 42fe bic.w r2, r3, #2130706432 @ 0x7f000000
800a938: 687b ldr r3, [r7, #4]
800a93a: 691b ldr r3, [r3, #16]
800a93c: 061b lsls r3, r3, #24
800a93e: 4921 ldr r1, [pc, #132] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a940: 4313 orrs r3, r2
800a942: 604b str r3, [r1, #4]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
800a944: e064 b.n 800aa10 <HAL_RCC_OscConfig+0x2d4>
}
else
{
/* Check the HSI State */
if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
800a946: 687b ldr r3, [r7, #4]
800a948: 68db ldr r3, [r3, #12]
800a94a: 2b00 cmp r3, #0
800a94c: d047 beq.n 800a9de <HAL_RCC_OscConfig+0x2a2>
{
/* Enable the Internal High Speed oscillator (HSI, HSIDIV2,HSIDIV4, or HSIDIV8) */
__HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
800a94e: 4b1d ldr r3, [pc, #116] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a950: 681b ldr r3, [r3, #0]
800a952: f023 0219 bic.w r2, r3, #25
800a956: 687b ldr r3, [r7, #4]
800a958: 68db ldr r3, [r3, #12]
800a95a: 491a ldr r1, [pc, #104] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a95c: 4313 orrs r3, r2
800a95e: 600b str r3, [r1, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800a960: f7fb f832 bl 80059c8 <HAL_GetTick>
800a964: 6278 str r0, [r7, #36] @ 0x24
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
800a966: e008 b.n 800a97a <HAL_RCC_OscConfig+0x23e>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800a968: f7fb f82e bl 80059c8 <HAL_GetTick>
800a96c: 4602 mov r2, r0
800a96e: 6a7b ldr r3, [r7, #36] @ 0x24
800a970: 1ad3 subs r3, r2, r3
800a972: 2b02 cmp r3, #2
800a974: d901 bls.n 800a97a <HAL_RCC_OscConfig+0x23e>
{
return HAL_TIMEOUT;
800a976: 2303 movs r3, #3
800a978: e332 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
800a97a: 4b12 ldr r3, [pc, #72] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a97c: 681b ldr r3, [r3, #0]
800a97e: f003 0304 and.w r3, r3, #4
800a982: 2b00 cmp r3, #0
800a984: d0f0 beq.n 800a968 <HAL_RCC_OscConfig+0x22c>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800a986: f7fb f84f bl 8005a28 <HAL_GetREVID>
800a98a: 4603 mov r3, r0
800a98c: f241 0203 movw r2, #4099 @ 0x1003
800a990: 4293 cmp r3, r2
800a992: d819 bhi.n 800a9c8 <HAL_RCC_OscConfig+0x28c>
800a994: 687b ldr r3, [r7, #4]
800a996: 691b ldr r3, [r3, #16]
800a998: 2b40 cmp r3, #64 @ 0x40
800a99a: d108 bne.n 800a9ae <HAL_RCC_OscConfig+0x272>
800a99c: 4b09 ldr r3, [pc, #36] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a99e: 685b ldr r3, [r3, #4]
800a9a0: f423 337c bic.w r3, r3, #258048 @ 0x3f000
800a9a4: 4a07 ldr r2, [pc, #28] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a9a6: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800a9aa: 6053 str r3, [r2, #4]
800a9ac: e030 b.n 800aa10 <HAL_RCC_OscConfig+0x2d4>
800a9ae: 4b05 ldr r3, [pc, #20] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a9b0: 685b ldr r3, [r3, #4]
800a9b2: f423 327c bic.w r2, r3, #258048 @ 0x3f000
800a9b6: 687b ldr r3, [r7, #4]
800a9b8: 691b ldr r3, [r3, #16]
800a9ba: 031b lsls r3, r3, #12
800a9bc: 4901 ldr r1, [pc, #4] @ (800a9c4 <HAL_RCC_OscConfig+0x288>)
800a9be: 4313 orrs r3, r2
800a9c0: 604b str r3, [r1, #4]
800a9c2: e025 b.n 800aa10 <HAL_RCC_OscConfig+0x2d4>
800a9c4: 58024400 .word 0x58024400
800a9c8: 4b9a ldr r3, [pc, #616] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800a9ca: 685b ldr r3, [r3, #4]
800a9cc: f023 42fe bic.w r2, r3, #2130706432 @ 0x7f000000
800a9d0: 687b ldr r3, [r7, #4]
800a9d2: 691b ldr r3, [r3, #16]
800a9d4: 061b lsls r3, r3, #24
800a9d6: 4997 ldr r1, [pc, #604] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800a9d8: 4313 orrs r3, r2
800a9da: 604b str r3, [r1, #4]
800a9dc: e018 b.n 800aa10 <HAL_RCC_OscConfig+0x2d4>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
800a9de: 4b95 ldr r3, [pc, #596] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800a9e0: 681b ldr r3, [r3, #0]
800a9e2: 4a94 ldr r2, [pc, #592] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800a9e4: f023 0301 bic.w r3, r3, #1
800a9e8: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800a9ea: f7fa ffed bl 80059c8 <HAL_GetTick>
800a9ee: 6278 str r0, [r7, #36] @ 0x24
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
800a9f0: e008 b.n 800aa04 <HAL_RCC_OscConfig+0x2c8>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800a9f2: f7fa ffe9 bl 80059c8 <HAL_GetTick>
800a9f6: 4602 mov r2, r0
800a9f8: 6a7b ldr r3, [r7, #36] @ 0x24
800a9fa: 1ad3 subs r3, r2, r3
800a9fc: 2b02 cmp r3, #2
800a9fe: d901 bls.n 800aa04 <HAL_RCC_OscConfig+0x2c8>
{
return HAL_TIMEOUT;
800aa00: 2303 movs r3, #3
800aa02: e2ed b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
800aa04: 4b8b ldr r3, [pc, #556] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aa06: 681b ldr r3, [r3, #0]
800aa08: f003 0304 and.w r3, r3, #4
800aa0c: 2b00 cmp r3, #0
800aa0e: d1f0 bne.n 800a9f2 <HAL_RCC_OscConfig+0x2b6>
}
}
}
}
/*----------------------------- CSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_CSI) == RCC_OSCILLATORTYPE_CSI)
800aa10: 687b ldr r3, [r7, #4]
800aa12: 681b ldr r3, [r3, #0]
800aa14: f003 0310 and.w r3, r3, #16
800aa18: 2b00 cmp r3, #0
800aa1a: f000 80a9 beq.w 800ab70 <HAL_RCC_OscConfig+0x434>
/* Check the parameters */
assert_param(IS_RCC_CSI(RCC_OscInitStruct->CSIState));
assert_param(IS_RCC_CSICALIBRATION_VALUE(RCC_OscInitStruct->CSICalibrationValue));
/* When the CSI is used as system clock it will not disabled */
const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
800aa1e: 4b85 ldr r3, [pc, #532] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aa20: 691b ldr r3, [r3, #16]
800aa22: f003 0338 and.w r3, r3, #56 @ 0x38
800aa26: 61bb str r3, [r7, #24]
const uint32_t temp_pllckselr = RCC->PLLCKSELR;
800aa28: 4b82 ldr r3, [pc, #520] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aa2a: 6a9b ldr r3, [r3, #40] @ 0x28
800aa2c: 617b str r3, [r7, #20]
if ((temp_sysclksrc == RCC_CFGR_SWS_CSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_CSI)))
800aa2e: 69bb ldr r3, [r7, #24]
800aa30: 2b08 cmp r3, #8
800aa32: d007 beq.n 800aa44 <HAL_RCC_OscConfig+0x308>
800aa34: 69bb ldr r3, [r7, #24]
800aa36: 2b18 cmp r3, #24
800aa38: d13a bne.n 800aab0 <HAL_RCC_OscConfig+0x374>
800aa3a: 697b ldr r3, [r7, #20]
800aa3c: f003 0303 and.w r3, r3, #3
800aa40: 2b01 cmp r3, #1
800aa42: d135 bne.n 800aab0 <HAL_RCC_OscConfig+0x374>
{
/* When CSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
800aa44: 4b7b ldr r3, [pc, #492] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aa46: 681b ldr r3, [r3, #0]
800aa48: f403 7380 and.w r3, r3, #256 @ 0x100
800aa4c: 2b00 cmp r3, #0
800aa4e: d005 beq.n 800aa5c <HAL_RCC_OscConfig+0x320>
800aa50: 687b ldr r3, [r7, #4]
800aa52: 69db ldr r3, [r3, #28]
800aa54: 2b80 cmp r3, #128 @ 0x80
800aa56: d001 beq.n 800aa5c <HAL_RCC_OscConfig+0x320>
{
return HAL_ERROR;
800aa58: 2301 movs r3, #1
800aa5a: e2c1 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
__HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
800aa5c: f7fa ffe4 bl 8005a28 <HAL_GetREVID>
800aa60: 4603 mov r3, r0
800aa62: f241 0203 movw r2, #4099 @ 0x1003
800aa66: 4293 cmp r3, r2
800aa68: d817 bhi.n 800aa9a <HAL_RCC_OscConfig+0x35e>
800aa6a: 687b ldr r3, [r7, #4]
800aa6c: 6a1b ldr r3, [r3, #32]
800aa6e: 2b20 cmp r3, #32
800aa70: d108 bne.n 800aa84 <HAL_RCC_OscConfig+0x348>
800aa72: 4b70 ldr r3, [pc, #448] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aa74: 685b ldr r3, [r3, #4]
800aa76: f023 43f8 bic.w r3, r3, #2080374784 @ 0x7c000000
800aa7a: 4a6e ldr r2, [pc, #440] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aa7c: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
800aa80: 6053 str r3, [r2, #4]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
800aa82: e075 b.n 800ab70 <HAL_RCC_OscConfig+0x434>
__HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
800aa84: 4b6b ldr r3, [pc, #428] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aa86: 685b ldr r3, [r3, #4]
800aa88: f023 42f8 bic.w r2, r3, #2080374784 @ 0x7c000000
800aa8c: 687b ldr r3, [r7, #4]
800aa8e: 6a1b ldr r3, [r3, #32]
800aa90: 069b lsls r3, r3, #26
800aa92: 4968 ldr r1, [pc, #416] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aa94: 4313 orrs r3, r2
800aa96: 604b str r3, [r1, #4]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
800aa98: e06a b.n 800ab70 <HAL_RCC_OscConfig+0x434>
__HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
800aa9a: 4b66 ldr r3, [pc, #408] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aa9c: 68db ldr r3, [r3, #12]
800aa9e: f023 527c bic.w r2, r3, #1056964608 @ 0x3f000000
800aaa2: 687b ldr r3, [r7, #4]
800aaa4: 6a1b ldr r3, [r3, #32]
800aaa6: 061b lsls r3, r3, #24
800aaa8: 4962 ldr r1, [pc, #392] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aaaa: 4313 orrs r3, r2
800aaac: 60cb str r3, [r1, #12]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
800aaae: e05f b.n 800ab70 <HAL_RCC_OscConfig+0x434>
}
}
else
{
/* Check the CSI State */
if ((RCC_OscInitStruct->CSIState) != RCC_CSI_OFF)
800aab0: 687b ldr r3, [r7, #4]
800aab2: 69db ldr r3, [r3, #28]
800aab4: 2b00 cmp r3, #0
800aab6: d042 beq.n 800ab3e <HAL_RCC_OscConfig+0x402>
{
/* Enable the Internal High Speed oscillator (CSI). */
__HAL_RCC_CSI_ENABLE();
800aab8: 4b5e ldr r3, [pc, #376] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aaba: 681b ldr r3, [r3, #0]
800aabc: 4a5d ldr r2, [pc, #372] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aabe: f043 0380 orr.w r3, r3, #128 @ 0x80
800aac2: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800aac4: f7fa ff80 bl 80059c8 <HAL_GetTick>
800aac8: 6278 str r0, [r7, #36] @ 0x24
/* Wait till CSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
800aaca: e008 b.n 800aade <HAL_RCC_OscConfig+0x3a2>
{
if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
800aacc: f7fa ff7c bl 80059c8 <HAL_GetTick>
800aad0: 4602 mov r2, r0
800aad2: 6a7b ldr r3, [r7, #36] @ 0x24
800aad4: 1ad3 subs r3, r2, r3
800aad6: 2b02 cmp r3, #2
800aad8: d901 bls.n 800aade <HAL_RCC_OscConfig+0x3a2>
{
return HAL_TIMEOUT;
800aada: 2303 movs r3, #3
800aadc: e280 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
800aade: 4b55 ldr r3, [pc, #340] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800aae0: 681b ldr r3, [r3, #0]
800aae2: f403 7380 and.w r3, r3, #256 @ 0x100
800aae6: 2b00 cmp r3, #0
800aae8: d0f0 beq.n 800aacc <HAL_RCC_OscConfig+0x390>
}
}
/* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
__HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
800aaea: f7fa ff9d bl 8005a28 <HAL_GetREVID>
800aaee: 4603 mov r3, r0
800aaf0: f241 0203 movw r2, #4099 @ 0x1003
800aaf4: 4293 cmp r3, r2
800aaf6: d817 bhi.n 800ab28 <HAL_RCC_OscConfig+0x3ec>
800aaf8: 687b ldr r3, [r7, #4]
800aafa: 6a1b ldr r3, [r3, #32]
800aafc: 2b20 cmp r3, #32
800aafe: d108 bne.n 800ab12 <HAL_RCC_OscConfig+0x3d6>
800ab00: 4b4c ldr r3, [pc, #304] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab02: 685b ldr r3, [r3, #4]
800ab04: f023 43f8 bic.w r3, r3, #2080374784 @ 0x7c000000
800ab08: 4a4a ldr r2, [pc, #296] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab0a: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
800ab0e: 6053 str r3, [r2, #4]
800ab10: e02e b.n 800ab70 <HAL_RCC_OscConfig+0x434>
800ab12: 4b48 ldr r3, [pc, #288] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab14: 685b ldr r3, [r3, #4]
800ab16: f023 42f8 bic.w r2, r3, #2080374784 @ 0x7c000000
800ab1a: 687b ldr r3, [r7, #4]
800ab1c: 6a1b ldr r3, [r3, #32]
800ab1e: 069b lsls r3, r3, #26
800ab20: 4944 ldr r1, [pc, #272] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab22: 4313 orrs r3, r2
800ab24: 604b str r3, [r1, #4]
800ab26: e023 b.n 800ab70 <HAL_RCC_OscConfig+0x434>
800ab28: 4b42 ldr r3, [pc, #264] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab2a: 68db ldr r3, [r3, #12]
800ab2c: f023 527c bic.w r2, r3, #1056964608 @ 0x3f000000
800ab30: 687b ldr r3, [r7, #4]
800ab32: 6a1b ldr r3, [r3, #32]
800ab34: 061b lsls r3, r3, #24
800ab36: 493f ldr r1, [pc, #252] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab38: 4313 orrs r3, r2
800ab3a: 60cb str r3, [r1, #12]
800ab3c: e018 b.n 800ab70 <HAL_RCC_OscConfig+0x434>
}
else
{
/* Disable the Internal High Speed oscillator (CSI). */
__HAL_RCC_CSI_DISABLE();
800ab3e: 4b3d ldr r3, [pc, #244] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab40: 681b ldr r3, [r3, #0]
800ab42: 4a3c ldr r2, [pc, #240] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab44: f023 0380 bic.w r3, r3, #128 @ 0x80
800ab48: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800ab4a: f7fa ff3d bl 80059c8 <HAL_GetTick>
800ab4e: 6278 str r0, [r7, #36] @ 0x24
/* Wait till CSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
800ab50: e008 b.n 800ab64 <HAL_RCC_OscConfig+0x428>
{
if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
800ab52: f7fa ff39 bl 80059c8 <HAL_GetTick>
800ab56: 4602 mov r2, r0
800ab58: 6a7b ldr r3, [r7, #36] @ 0x24
800ab5a: 1ad3 subs r3, r2, r3
800ab5c: 2b02 cmp r3, #2
800ab5e: d901 bls.n 800ab64 <HAL_RCC_OscConfig+0x428>
{
return HAL_TIMEOUT;
800ab60: 2303 movs r3, #3
800ab62: e23d b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
800ab64: 4b33 ldr r3, [pc, #204] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab66: 681b ldr r3, [r3, #0]
800ab68: f403 7380 and.w r3, r3, #256 @ 0x100
800ab6c: 2b00 cmp r3, #0
800ab6e: d1f0 bne.n 800ab52 <HAL_RCC_OscConfig+0x416>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
800ab70: 687b ldr r3, [r7, #4]
800ab72: 681b ldr r3, [r3, #0]
800ab74: f003 0308 and.w r3, r3, #8
800ab78: 2b00 cmp r3, #0
800ab7a: d036 beq.n 800abea <HAL_RCC_OscConfig+0x4ae>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
800ab7c: 687b ldr r3, [r7, #4]
800ab7e: 695b ldr r3, [r3, #20]
800ab80: 2b00 cmp r3, #0
800ab82: d019 beq.n 800abb8 <HAL_RCC_OscConfig+0x47c>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
800ab84: 4b2b ldr r3, [pc, #172] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab86: 6f5b ldr r3, [r3, #116] @ 0x74
800ab88: 4a2a ldr r2, [pc, #168] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ab8a: f043 0301 orr.w r3, r3, #1
800ab8e: 6753 str r3, [r2, #116] @ 0x74
/* Get Start Tick*/
tickstart = HAL_GetTick();
800ab90: f7fa ff1a bl 80059c8 <HAL_GetTick>
800ab94: 6278 str r0, [r7, #36] @ 0x24
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
800ab96: e008 b.n 800abaa <HAL_RCC_OscConfig+0x46e>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
800ab98: f7fa ff16 bl 80059c8 <HAL_GetTick>
800ab9c: 4602 mov r2, r0
800ab9e: 6a7b ldr r3, [r7, #36] @ 0x24
800aba0: 1ad3 subs r3, r2, r3
800aba2: 2b02 cmp r3, #2
800aba4: d901 bls.n 800abaa <HAL_RCC_OscConfig+0x46e>
{
return HAL_TIMEOUT;
800aba6: 2303 movs r3, #3
800aba8: e21a b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
800abaa: 4b22 ldr r3, [pc, #136] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800abac: 6f5b ldr r3, [r3, #116] @ 0x74
800abae: f003 0302 and.w r3, r3, #2
800abb2: 2b00 cmp r3, #0
800abb4: d0f0 beq.n 800ab98 <HAL_RCC_OscConfig+0x45c>
800abb6: e018 b.n 800abea <HAL_RCC_OscConfig+0x4ae>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
800abb8: 4b1e ldr r3, [pc, #120] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800abba: 6f5b ldr r3, [r3, #116] @ 0x74
800abbc: 4a1d ldr r2, [pc, #116] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800abbe: f023 0301 bic.w r3, r3, #1
800abc2: 6753 str r3, [r2, #116] @ 0x74
/* Get Start Tick*/
tickstart = HAL_GetTick();
800abc4: f7fa ff00 bl 80059c8 <HAL_GetTick>
800abc8: 6278 str r0, [r7, #36] @ 0x24
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
800abca: e008 b.n 800abde <HAL_RCC_OscConfig+0x4a2>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
800abcc: f7fa fefc bl 80059c8 <HAL_GetTick>
800abd0: 4602 mov r2, r0
800abd2: 6a7b ldr r3, [r7, #36] @ 0x24
800abd4: 1ad3 subs r3, r2, r3
800abd6: 2b02 cmp r3, #2
800abd8: d901 bls.n 800abde <HAL_RCC_OscConfig+0x4a2>
{
return HAL_TIMEOUT;
800abda: 2303 movs r3, #3
800abdc: e200 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
800abde: 4b15 ldr r3, [pc, #84] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800abe0: 6f5b ldr r3, [r3, #116] @ 0x74
800abe2: f003 0302 and.w r3, r3, #2
800abe6: 2b00 cmp r3, #0
800abe8: d1f0 bne.n 800abcc <HAL_RCC_OscConfig+0x490>
}
}
}
/*------------------------------ HSI48 Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
800abea: 687b ldr r3, [r7, #4]
800abec: 681b ldr r3, [r3, #0]
800abee: f003 0320 and.w r3, r3, #32
800abf2: 2b00 cmp r3, #0
800abf4: d039 beq.n 800ac6a <HAL_RCC_OscConfig+0x52e>
{
/* Check the parameters */
assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
/* Check the HSI48 State */
if ((RCC_OscInitStruct->HSI48State) != RCC_HSI48_OFF)
800abf6: 687b ldr r3, [r7, #4]
800abf8: 699b ldr r3, [r3, #24]
800abfa: 2b00 cmp r3, #0
800abfc: d01c beq.n 800ac38 <HAL_RCC_OscConfig+0x4fc>
{
/* Enable the Internal Low Speed oscillator (HSI48). */
__HAL_RCC_HSI48_ENABLE();
800abfe: 4b0d ldr r3, [pc, #52] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ac00: 681b ldr r3, [r3, #0]
800ac02: 4a0c ldr r2, [pc, #48] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ac04: f443 5380 orr.w r3, r3, #4096 @ 0x1000
800ac08: 6013 str r3, [r2, #0]
/* Get time-out */
tickstart = HAL_GetTick();
800ac0a: f7fa fedd bl 80059c8 <HAL_GetTick>
800ac0e: 6278 str r0, [r7, #36] @ 0x24
/* Wait till HSI48 is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
800ac10: e008 b.n 800ac24 <HAL_RCC_OscConfig+0x4e8>
{
if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
800ac12: f7fa fed9 bl 80059c8 <HAL_GetTick>
800ac16: 4602 mov r2, r0
800ac18: 6a7b ldr r3, [r7, #36] @ 0x24
800ac1a: 1ad3 subs r3, r2, r3
800ac1c: 2b02 cmp r3, #2
800ac1e: d901 bls.n 800ac24 <HAL_RCC_OscConfig+0x4e8>
{
return HAL_TIMEOUT;
800ac20: 2303 movs r3, #3
800ac22: e1dd b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
800ac24: 4b03 ldr r3, [pc, #12] @ (800ac34 <HAL_RCC_OscConfig+0x4f8>)
800ac26: 681b ldr r3, [r3, #0]
800ac28: f403 5300 and.w r3, r3, #8192 @ 0x2000
800ac2c: 2b00 cmp r3, #0
800ac2e: d0f0 beq.n 800ac12 <HAL_RCC_OscConfig+0x4d6>
800ac30: e01b b.n 800ac6a <HAL_RCC_OscConfig+0x52e>
800ac32: bf00 nop
800ac34: 58024400 .word 0x58024400
}
}
else
{
/* Disable the Internal Low Speed oscillator (HSI48). */
__HAL_RCC_HSI48_DISABLE();
800ac38: 4b9b ldr r3, [pc, #620] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ac3a: 681b ldr r3, [r3, #0]
800ac3c: 4a9a ldr r2, [pc, #616] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ac3e: f423 5380 bic.w r3, r3, #4096 @ 0x1000
800ac42: 6013 str r3, [r2, #0]
/* Get time-out */
tickstart = HAL_GetTick();
800ac44: f7fa fec0 bl 80059c8 <HAL_GetTick>
800ac48: 6278 str r0, [r7, #36] @ 0x24
/* Wait till HSI48 is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
800ac4a: e008 b.n 800ac5e <HAL_RCC_OscConfig+0x522>
{
if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
800ac4c: f7fa febc bl 80059c8 <HAL_GetTick>
800ac50: 4602 mov r2, r0
800ac52: 6a7b ldr r3, [r7, #36] @ 0x24
800ac54: 1ad3 subs r3, r2, r3
800ac56: 2b02 cmp r3, #2
800ac58: d901 bls.n 800ac5e <HAL_RCC_OscConfig+0x522>
{
return HAL_TIMEOUT;
800ac5a: 2303 movs r3, #3
800ac5c: e1c0 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
800ac5e: 4b92 ldr r3, [pc, #584] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ac60: 681b ldr r3, [r3, #0]
800ac62: f403 5300 and.w r3, r3, #8192 @ 0x2000
800ac66: 2b00 cmp r3, #0
800ac68: d1f0 bne.n 800ac4c <HAL_RCC_OscConfig+0x510>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
800ac6a: 687b ldr r3, [r7, #4]
800ac6c: 681b ldr r3, [r3, #0]
800ac6e: f003 0304 and.w r3, r3, #4
800ac72: 2b00 cmp r3, #0
800ac74: f000 8081 beq.w 800ad7a <HAL_RCC_OscConfig+0x63e>
{
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Enable write access to Backup domain */
PWR->CR1 |= PWR_CR1_DBP;
800ac78: 4b8c ldr r3, [pc, #560] @ (800aeac <HAL_RCC_OscConfig+0x770>)
800ac7a: 681b ldr r3, [r3, #0]
800ac7c: 4a8b ldr r2, [pc, #556] @ (800aeac <HAL_RCC_OscConfig+0x770>)
800ac7e: f443 7380 orr.w r3, r3, #256 @ 0x100
800ac82: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800ac84: f7fa fea0 bl 80059c8 <HAL_GetTick>
800ac88: 6278 str r0, [r7, #36] @ 0x24
while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
800ac8a: e008 b.n 800ac9e <HAL_RCC_OscConfig+0x562>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
800ac8c: f7fa fe9c bl 80059c8 <HAL_GetTick>
800ac90: 4602 mov r2, r0
800ac92: 6a7b ldr r3, [r7, #36] @ 0x24
800ac94: 1ad3 subs r3, r2, r3
800ac96: 2b64 cmp r3, #100 @ 0x64
800ac98: d901 bls.n 800ac9e <HAL_RCC_OscConfig+0x562>
{
return HAL_TIMEOUT;
800ac9a: 2303 movs r3, #3
800ac9c: e1a0 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
800ac9e: 4b83 ldr r3, [pc, #524] @ (800aeac <HAL_RCC_OscConfig+0x770>)
800aca0: 681b ldr r3, [r3, #0]
800aca2: f403 7380 and.w r3, r3, #256 @ 0x100
800aca6: 2b00 cmp r3, #0
800aca8: d0f0 beq.n 800ac8c <HAL_RCC_OscConfig+0x550>
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
800acaa: 687b ldr r3, [r7, #4]
800acac: 689b ldr r3, [r3, #8]
800acae: 2b01 cmp r3, #1
800acb0: d106 bne.n 800acc0 <HAL_RCC_OscConfig+0x584>
800acb2: 4b7d ldr r3, [pc, #500] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acb4: 6f1b ldr r3, [r3, #112] @ 0x70
800acb6: 4a7c ldr r2, [pc, #496] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acb8: f043 0301 orr.w r3, r3, #1
800acbc: 6713 str r3, [r2, #112] @ 0x70
800acbe: e02d b.n 800ad1c <HAL_RCC_OscConfig+0x5e0>
800acc0: 687b ldr r3, [r7, #4]
800acc2: 689b ldr r3, [r3, #8]
800acc4: 2b00 cmp r3, #0
800acc6: d10c bne.n 800ace2 <HAL_RCC_OscConfig+0x5a6>
800acc8: 4b77 ldr r3, [pc, #476] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acca: 6f1b ldr r3, [r3, #112] @ 0x70
800accc: 4a76 ldr r2, [pc, #472] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acce: f023 0301 bic.w r3, r3, #1
800acd2: 6713 str r3, [r2, #112] @ 0x70
800acd4: 4b74 ldr r3, [pc, #464] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acd6: 6f1b ldr r3, [r3, #112] @ 0x70
800acd8: 4a73 ldr r2, [pc, #460] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acda: f023 0304 bic.w r3, r3, #4
800acde: 6713 str r3, [r2, #112] @ 0x70
800ace0: e01c b.n 800ad1c <HAL_RCC_OscConfig+0x5e0>
800ace2: 687b ldr r3, [r7, #4]
800ace4: 689b ldr r3, [r3, #8]
800ace6: 2b05 cmp r3, #5
800ace8: d10c bne.n 800ad04 <HAL_RCC_OscConfig+0x5c8>
800acea: 4b6f ldr r3, [pc, #444] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acec: 6f1b ldr r3, [r3, #112] @ 0x70
800acee: 4a6e ldr r2, [pc, #440] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acf0: f043 0304 orr.w r3, r3, #4
800acf4: 6713 str r3, [r2, #112] @ 0x70
800acf6: 4b6c ldr r3, [pc, #432] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acf8: 6f1b ldr r3, [r3, #112] @ 0x70
800acfa: 4a6b ldr r2, [pc, #428] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800acfc: f043 0301 orr.w r3, r3, #1
800ad00: 6713 str r3, [r2, #112] @ 0x70
800ad02: e00b b.n 800ad1c <HAL_RCC_OscConfig+0x5e0>
800ad04: 4b68 ldr r3, [pc, #416] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ad06: 6f1b ldr r3, [r3, #112] @ 0x70
800ad08: 4a67 ldr r2, [pc, #412] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ad0a: f023 0301 bic.w r3, r3, #1
800ad0e: 6713 str r3, [r2, #112] @ 0x70
800ad10: 4b65 ldr r3, [pc, #404] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ad12: 6f1b ldr r3, [r3, #112] @ 0x70
800ad14: 4a64 ldr r2, [pc, #400] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ad16: f023 0304 bic.w r3, r3, #4
800ad1a: 6713 str r3, [r2, #112] @ 0x70
/* Check the LSE State */
if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
800ad1c: 687b ldr r3, [r7, #4]
800ad1e: 689b ldr r3, [r3, #8]
800ad20: 2b00 cmp r3, #0
800ad22: d015 beq.n 800ad50 <HAL_RCC_OscConfig+0x614>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
800ad24: f7fa fe50 bl 80059c8 <HAL_GetTick>
800ad28: 6278 str r0, [r7, #36] @ 0x24
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
800ad2a: e00a b.n 800ad42 <HAL_RCC_OscConfig+0x606>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800ad2c: f7fa fe4c bl 80059c8 <HAL_GetTick>
800ad30: 4602 mov r2, r0
800ad32: 6a7b ldr r3, [r7, #36] @ 0x24
800ad34: 1ad3 subs r3, r2, r3
800ad36: f241 3288 movw r2, #5000 @ 0x1388
800ad3a: 4293 cmp r3, r2
800ad3c: d901 bls.n 800ad42 <HAL_RCC_OscConfig+0x606>
{
return HAL_TIMEOUT;
800ad3e: 2303 movs r3, #3
800ad40: e14e b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
800ad42: 4b59 ldr r3, [pc, #356] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ad44: 6f1b ldr r3, [r3, #112] @ 0x70
800ad46: f003 0302 and.w r3, r3, #2
800ad4a: 2b00 cmp r3, #0
800ad4c: d0ee beq.n 800ad2c <HAL_RCC_OscConfig+0x5f0>
800ad4e: e014 b.n 800ad7a <HAL_RCC_OscConfig+0x63e>
}
}
else
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
800ad50: f7fa fe3a bl 80059c8 <HAL_GetTick>
800ad54: 6278 str r0, [r7, #36] @ 0x24
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
800ad56: e00a b.n 800ad6e <HAL_RCC_OscConfig+0x632>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800ad58: f7fa fe36 bl 80059c8 <HAL_GetTick>
800ad5c: 4602 mov r2, r0
800ad5e: 6a7b ldr r3, [r7, #36] @ 0x24
800ad60: 1ad3 subs r3, r2, r3
800ad62: f241 3288 movw r2, #5000 @ 0x1388
800ad66: 4293 cmp r3, r2
800ad68: d901 bls.n 800ad6e <HAL_RCC_OscConfig+0x632>
{
return HAL_TIMEOUT;
800ad6a: 2303 movs r3, #3
800ad6c: e138 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
800ad6e: 4b4e ldr r3, [pc, #312] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ad70: 6f1b ldr r3, [r3, #112] @ 0x70
800ad72: f003 0302 and.w r3, r3, #2
800ad76: 2b00 cmp r3, #0
800ad78: d1ee bne.n 800ad58 <HAL_RCC_OscConfig+0x61c>
}
}
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
800ad7a: 687b ldr r3, [r7, #4]
800ad7c: 6a5b ldr r3, [r3, #36] @ 0x24
800ad7e: 2b00 cmp r3, #0
800ad80: f000 812d beq.w 800afde <HAL_RCC_OscConfig+0x8a2>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1)
800ad84: 4b48 ldr r3, [pc, #288] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ad86: 691b ldr r3, [r3, #16]
800ad88: f003 0338 and.w r3, r3, #56 @ 0x38
800ad8c: 2b18 cmp r3, #24
800ad8e: f000 80bd beq.w 800af0c <HAL_RCC_OscConfig+0x7d0>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
800ad92: 687b ldr r3, [r7, #4]
800ad94: 6a5b ldr r3, [r3, #36] @ 0x24
800ad96: 2b02 cmp r3, #2
800ad98: f040 809e bne.w 800aed8 <HAL_RCC_OscConfig+0x79c>
assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
800ad9c: 4b42 ldr r3, [pc, #264] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ad9e: 681b ldr r3, [r3, #0]
800ada0: 4a41 ldr r2, [pc, #260] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ada2: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000
800ada6: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800ada8: f7fa fe0e bl 80059c8 <HAL_GetTick>
800adac: 6278 str r0, [r7, #36] @ 0x24
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
800adae: e008 b.n 800adc2 <HAL_RCC_OscConfig+0x686>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800adb0: f7fa fe0a bl 80059c8 <HAL_GetTick>
800adb4: 4602 mov r2, r0
800adb6: 6a7b ldr r3, [r7, #36] @ 0x24
800adb8: 1ad3 subs r3, r2, r3
800adba: 2b02 cmp r3, #2
800adbc: d901 bls.n 800adc2 <HAL_RCC_OscConfig+0x686>
{
return HAL_TIMEOUT;
800adbe: 2303 movs r3, #3
800adc0: e10e b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
800adc2: 4b39 ldr r3, [pc, #228] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800adc4: 681b ldr r3, [r3, #0]
800adc6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800adca: 2b00 cmp r3, #0
800adcc: d1f0 bne.n 800adb0 <HAL_RCC_OscConfig+0x674>
}
}
/* Configure the main PLL clock source, multiplication and division factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
800adce: 4b36 ldr r3, [pc, #216] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800add0: 6a9a ldr r2, [r3, #40] @ 0x28
800add2: 4b37 ldr r3, [pc, #220] @ (800aeb0 <HAL_RCC_OscConfig+0x774>)
800add4: 4013 ands r3, r2
800add6: 687a ldr r2, [r7, #4]
800add8: 6a91 ldr r1, [r2, #40] @ 0x28
800adda: 687a ldr r2, [r7, #4]
800addc: 6ad2 ldr r2, [r2, #44] @ 0x2c
800adde: 0112 lsls r2, r2, #4
800ade0: 430a orrs r2, r1
800ade2: 4931 ldr r1, [pc, #196] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ade4: 4313 orrs r3, r2
800ade6: 628b str r3, [r1, #40] @ 0x28
800ade8: 687b ldr r3, [r7, #4]
800adea: 6b1b ldr r3, [r3, #48] @ 0x30
800adec: 3b01 subs r3, #1
800adee: f3c3 0208 ubfx r2, r3, #0, #9
800adf2: 687b ldr r3, [r7, #4]
800adf4: 6b5b ldr r3, [r3, #52] @ 0x34
800adf6: 3b01 subs r3, #1
800adf8: 025b lsls r3, r3, #9
800adfa: b29b uxth r3, r3
800adfc: 431a orrs r2, r3
800adfe: 687b ldr r3, [r7, #4]
800ae00: 6b9b ldr r3, [r3, #56] @ 0x38
800ae02: 3b01 subs r3, #1
800ae04: 041b lsls r3, r3, #16
800ae06: f403 03fe and.w r3, r3, #8323072 @ 0x7f0000
800ae0a: 431a orrs r2, r3
800ae0c: 687b ldr r3, [r7, #4]
800ae0e: 6bdb ldr r3, [r3, #60] @ 0x3c
800ae10: 3b01 subs r3, #1
800ae12: 061b lsls r3, r3, #24
800ae14: f003 43fe and.w r3, r3, #2130706432 @ 0x7f000000
800ae18: 4923 ldr r1, [pc, #140] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae1a: 4313 orrs r3, r2
800ae1c: 630b str r3, [r1, #48] @ 0x30
RCC_OscInitStruct->PLL.PLLP,
RCC_OscInitStruct->PLL.PLLQ,
RCC_OscInitStruct->PLL.PLLR);
/* Disable PLLFRACN . */
__HAL_RCC_PLLFRACN_DISABLE();
800ae1e: 4b22 ldr r3, [pc, #136] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae20: 6adb ldr r3, [r3, #44] @ 0x2c
800ae22: 4a21 ldr r2, [pc, #132] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae24: f023 0301 bic.w r3, r3, #1
800ae28: 62d3 str r3, [r2, #44] @ 0x2c
/* Configure PLL PLL1FRACN */
__HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
800ae2a: 4b1f ldr r3, [pc, #124] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae2c: 6b5a ldr r2, [r3, #52] @ 0x34
800ae2e: 4b21 ldr r3, [pc, #132] @ (800aeb4 <HAL_RCC_OscConfig+0x778>)
800ae30: 4013 ands r3, r2
800ae32: 687a ldr r2, [r7, #4]
800ae34: 6c92 ldr r2, [r2, #72] @ 0x48
800ae36: 00d2 lsls r2, r2, #3
800ae38: 491b ldr r1, [pc, #108] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae3a: 4313 orrs r3, r2
800ae3c: 634b str r3, [r1, #52] @ 0x34
/* Select PLL1 input reference frequency range: VCI */
__HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ;
800ae3e: 4b1a ldr r3, [pc, #104] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae40: 6adb ldr r3, [r3, #44] @ 0x2c
800ae42: f023 020c bic.w r2, r3, #12
800ae46: 687b ldr r3, [r7, #4]
800ae48: 6c1b ldr r3, [r3, #64] @ 0x40
800ae4a: 4917 ldr r1, [pc, #92] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae4c: 4313 orrs r3, r2
800ae4e: 62cb str r3, [r1, #44] @ 0x2c
/* Select PLL1 output frequency range : VCO */
__HAL_RCC_PLL_VCORANGE(RCC_OscInitStruct->PLL.PLLVCOSEL) ;
800ae50: 4b15 ldr r3, [pc, #84] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae52: 6adb ldr r3, [r3, #44] @ 0x2c
800ae54: f023 0202 bic.w r2, r3, #2
800ae58: 687b ldr r3, [r7, #4]
800ae5a: 6c5b ldr r3, [r3, #68] @ 0x44
800ae5c: 4912 ldr r1, [pc, #72] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae5e: 4313 orrs r3, r2
800ae60: 62cb str r3, [r1, #44] @ 0x2c
/* Enable PLL System Clock output. */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP);
800ae62: 4b11 ldr r3, [pc, #68] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae64: 6adb ldr r3, [r3, #44] @ 0x2c
800ae66: 4a10 ldr r2, [pc, #64] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae68: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800ae6c: 62d3 str r3, [r2, #44] @ 0x2c
/* Enable PLL1Q Clock output. */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800ae6e: 4b0e ldr r3, [pc, #56] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae70: 6adb ldr r3, [r3, #44] @ 0x2c
800ae72: 4a0d ldr r2, [pc, #52] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae74: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800ae78: 62d3 str r3, [r2, #44] @ 0x2c
/* Enable PLL1R Clock output. */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVR);
800ae7a: 4b0b ldr r3, [pc, #44] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae7c: 6adb ldr r3, [r3, #44] @ 0x2c
800ae7e: 4a0a ldr r2, [pc, #40] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae80: f443 2380 orr.w r3, r3, #262144 @ 0x40000
800ae84: 62d3 str r3, [r2, #44] @ 0x2c
/* Enable PLL1FRACN . */
__HAL_RCC_PLLFRACN_ENABLE();
800ae86: 4b08 ldr r3, [pc, #32] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae88: 6adb ldr r3, [r3, #44] @ 0x2c
800ae8a: 4a07 ldr r2, [pc, #28] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae8c: f043 0301 orr.w r3, r3, #1
800ae90: 62d3 str r3, [r2, #44] @ 0x2c
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
800ae92: 4b05 ldr r3, [pc, #20] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae94: 681b ldr r3, [r3, #0]
800ae96: 4a04 ldr r2, [pc, #16] @ (800aea8 <HAL_RCC_OscConfig+0x76c>)
800ae98: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
800ae9c: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800ae9e: f7fa fd93 bl 80059c8 <HAL_GetTick>
800aea2: 6278 str r0, [r7, #36] @ 0x24
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
800aea4: e011 b.n 800aeca <HAL_RCC_OscConfig+0x78e>
800aea6: bf00 nop
800aea8: 58024400 .word 0x58024400
800aeac: 58024800 .word 0x58024800
800aeb0: fffffc0c .word 0xfffffc0c
800aeb4: ffff0007 .word 0xffff0007
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800aeb8: f7fa fd86 bl 80059c8 <HAL_GetTick>
800aebc: 4602 mov r2, r0
800aebe: 6a7b ldr r3, [r7, #36] @ 0x24
800aec0: 1ad3 subs r3, r2, r3
800aec2: 2b02 cmp r3, #2
800aec4: d901 bls.n 800aeca <HAL_RCC_OscConfig+0x78e>
{
return HAL_TIMEOUT;
800aec6: 2303 movs r3, #3
800aec8: e08a b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
800aeca: 4b47 ldr r3, [pc, #284] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800aecc: 681b ldr r3, [r3, #0]
800aece: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800aed2: 2b00 cmp r3, #0
800aed4: d0f0 beq.n 800aeb8 <HAL_RCC_OscConfig+0x77c>
800aed6: e082 b.n 800afde <HAL_RCC_OscConfig+0x8a2>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
800aed8: 4b43 ldr r3, [pc, #268] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800aeda: 681b ldr r3, [r3, #0]
800aedc: 4a42 ldr r2, [pc, #264] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800aede: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000
800aee2: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800aee4: f7fa fd70 bl 80059c8 <HAL_GetTick>
800aee8: 6278 str r0, [r7, #36] @ 0x24
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
800aeea: e008 b.n 800aefe <HAL_RCC_OscConfig+0x7c2>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800aeec: f7fa fd6c bl 80059c8 <HAL_GetTick>
800aef0: 4602 mov r2, r0
800aef2: 6a7b ldr r3, [r7, #36] @ 0x24
800aef4: 1ad3 subs r3, r2, r3
800aef6: 2b02 cmp r3, #2
800aef8: d901 bls.n 800aefe <HAL_RCC_OscConfig+0x7c2>
{
return HAL_TIMEOUT;
800aefa: 2303 movs r3, #3
800aefc: e070 b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
800aefe: 4b3a ldr r3, [pc, #232] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800af00: 681b ldr r3, [r3, #0]
800af02: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800af06: 2b00 cmp r3, #0
800af08: d1f0 bne.n 800aeec <HAL_RCC_OscConfig+0x7b0>
800af0a: e068 b.n 800afde <HAL_RCC_OscConfig+0x8a2>
}
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
temp1_pllckcfg = RCC->PLLCKSELR;
800af0c: 4b36 ldr r3, [pc, #216] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800af0e: 6a9b ldr r3, [r3, #40] @ 0x28
800af10: 613b str r3, [r7, #16]
temp2_pllckcfg = RCC->PLL1DIVR;
800af12: 4b35 ldr r3, [pc, #212] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800af14: 6b1b ldr r3, [r3, #48] @ 0x30
800af16: 60fb str r3, [r7, #12]
if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
800af18: 687b ldr r3, [r7, #4]
800af1a: 6a5b ldr r3, [r3, #36] @ 0x24
800af1c: 2b01 cmp r3, #1
800af1e: d031 beq.n 800af84 <HAL_RCC_OscConfig+0x848>
(READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800af20: 693b ldr r3, [r7, #16]
800af22: f003 0203 and.w r2, r3, #3
800af26: 687b ldr r3, [r7, #4]
800af28: 6a9b ldr r3, [r3, #40] @ 0x28
if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
800af2a: 429a cmp r2, r3
800af2c: d12a bne.n 800af84 <HAL_RCC_OscConfig+0x848>
((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
800af2e: 693b ldr r3, [r7, #16]
800af30: 091b lsrs r3, r3, #4
800af32: f003 023f and.w r2, r3, #63 @ 0x3f
800af36: 687b ldr r3, [r7, #4]
800af38: 6adb ldr r3, [r3, #44] @ 0x2c
(READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800af3a: 429a cmp r2, r3
800af3c: d122 bne.n 800af84 <HAL_RCC_OscConfig+0x848>
(READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
800af3e: 68fb ldr r3, [r7, #12]
800af40: f3c3 0208 ubfx r2, r3, #0, #9
800af44: 687b ldr r3, [r7, #4]
800af46: 6b1b ldr r3, [r3, #48] @ 0x30
800af48: 3b01 subs r3, #1
((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
800af4a: 429a cmp r2, r3
800af4c: d11a bne.n 800af84 <HAL_RCC_OscConfig+0x848>
((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
800af4e: 68fb ldr r3, [r7, #12]
800af50: 0a5b lsrs r3, r3, #9
800af52: f003 027f and.w r2, r3, #127 @ 0x7f
800af56: 687b ldr r3, [r7, #4]
800af58: 6b5b ldr r3, [r3, #52] @ 0x34
800af5a: 3b01 subs r3, #1
(READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
800af5c: 429a cmp r2, r3
800af5e: d111 bne.n 800af84 <HAL_RCC_OscConfig+0x848>
((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
800af60: 68fb ldr r3, [r7, #12]
800af62: 0c1b lsrs r3, r3, #16
800af64: f003 027f and.w r2, r3, #127 @ 0x7f
800af68: 687b ldr r3, [r7, #4]
800af6a: 6b9b ldr r3, [r3, #56] @ 0x38
800af6c: 3b01 subs r3, #1
((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
800af6e: 429a cmp r2, r3
800af70: d108 bne.n 800af84 <HAL_RCC_OscConfig+0x848>
((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_R1) >> RCC_PLL1DIVR_R1_Pos) != (RCC_OscInitStruct->PLL.PLLR - 1U)))
800af72: 68fb ldr r3, [r7, #12]
800af74: 0e1b lsrs r3, r3, #24
800af76: f003 027f and.w r2, r3, #127 @ 0x7f
800af7a: 687b ldr r3, [r7, #4]
800af7c: 6bdb ldr r3, [r3, #60] @ 0x3c
800af7e: 3b01 subs r3, #1
((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
800af80: 429a cmp r2, r3
800af82: d001 beq.n 800af88 <HAL_RCC_OscConfig+0x84c>
{
return HAL_ERROR;
800af84: 2301 movs r3, #1
800af86: e02b b.n 800afe0 <HAL_RCC_OscConfig+0x8a4>
}
else
{
/* Check if only fractional part needs to be updated */
temp1_pllckcfg = ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> RCC_PLL1FRACR_FRACN1_Pos);
800af88: 4b17 ldr r3, [pc, #92] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800af8a: 6b5b ldr r3, [r3, #52] @ 0x34
800af8c: 08db lsrs r3, r3, #3
800af8e: f3c3 030c ubfx r3, r3, #0, #13
800af92: 613b str r3, [r7, #16]
if (RCC_OscInitStruct->PLL.PLLFRACN != temp1_pllckcfg)
800af94: 687b ldr r3, [r7, #4]
800af96: 6c9b ldr r3, [r3, #72] @ 0x48
800af98: 693a ldr r2, [r7, #16]
800af9a: 429a cmp r2, r3
800af9c: d01f beq.n 800afde <HAL_RCC_OscConfig+0x8a2>
{
assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));
/* Disable PLL1FRACEN */
__HAL_RCC_PLLFRACN_DISABLE();
800af9e: 4b12 ldr r3, [pc, #72] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800afa0: 6adb ldr r3, [r3, #44] @ 0x2c
800afa2: 4a11 ldr r2, [pc, #68] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800afa4: f023 0301 bic.w r3, r3, #1
800afa8: 62d3 str r3, [r2, #44] @ 0x2c
/* Get Start Tick*/
tickstart = HAL_GetTick();
800afaa: f7fa fd0d bl 80059c8 <HAL_GetTick>
800afae: 6278 str r0, [r7, #36] @ 0x24
/* Wait at least 2 CK_REF (PLL input source divided by M) period to make sure next latched value will be taken into account. */
while ((HAL_GetTick() - tickstart) < PLL_FRAC_TIMEOUT_VALUE)
800afb0: bf00 nop
800afb2: f7fa fd09 bl 80059c8 <HAL_GetTick>
800afb6: 4602 mov r2, r0
800afb8: 6a7b ldr r3, [r7, #36] @ 0x24
800afba: 4293 cmp r3, r2
800afbc: d0f9 beq.n 800afb2 <HAL_RCC_OscConfig+0x876>
{
}
/* Configure PLL1 PLL1FRACN */
__HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
800afbe: 4b0a ldr r3, [pc, #40] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800afc0: 6b5a ldr r2, [r3, #52] @ 0x34
800afc2: 4b0a ldr r3, [pc, #40] @ (800afec <HAL_RCC_OscConfig+0x8b0>)
800afc4: 4013 ands r3, r2
800afc6: 687a ldr r2, [r7, #4]
800afc8: 6c92 ldr r2, [r2, #72] @ 0x48
800afca: 00d2 lsls r2, r2, #3
800afcc: 4906 ldr r1, [pc, #24] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800afce: 4313 orrs r3, r2
800afd0: 634b str r3, [r1, #52] @ 0x34
/* Enable PLL1FRACEN to latch new value. */
__HAL_RCC_PLLFRACN_ENABLE();
800afd2: 4b05 ldr r3, [pc, #20] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800afd4: 6adb ldr r3, [r3, #44] @ 0x2c
800afd6: 4a04 ldr r2, [pc, #16] @ (800afe8 <HAL_RCC_OscConfig+0x8ac>)
800afd8: f043 0301 orr.w r3, r3, #1
800afdc: 62d3 str r3, [r2, #44] @ 0x2c
}
}
}
}
return HAL_OK;
800afde: 2300 movs r3, #0
}
800afe0: 4618 mov r0, r3
800afe2: 3730 adds r7, #48 @ 0x30
800afe4: 46bd mov sp, r7
800afe6: bd80 pop {r7, pc}
800afe8: 58024400 .word 0x58024400
800afec: ffff0007 .word 0xffff0007
0800aff0 <HAL_RCC_ClockConfig>:
* D1CPRE[3:0] bits to ensure that Domain1 core clock not exceed the maximum allowed frequency
* (for more details refer to section above "Initialization/de-initialization functions")
* @retval None
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
800aff0: b580 push {r7, lr}
800aff2: b086 sub sp, #24
800aff4: af00 add r7, sp, #0
800aff6: 6078 str r0, [r7, #4]
800aff8: 6039 str r1, [r7, #0]
HAL_StatusTypeDef halstatus;
uint32_t tickstart;
uint32_t common_system_clock;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
800affa: 687b ldr r3, [r7, #4]
800affc: 2b00 cmp r3, #0
800affe: d101 bne.n 800b004 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
800b000: 2301 movs r3, #1
800b002: e19c b.n 800b33e <HAL_RCC_ClockConfig+0x34e>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) and the supply voltage of the device. */
/* Increasing the CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
800b004: 4b8a ldr r3, [pc, #552] @ (800b230 <HAL_RCC_ClockConfig+0x240>)
800b006: 681b ldr r3, [r3, #0]
800b008: f003 030f and.w r3, r3, #15
800b00c: 683a ldr r2, [r7, #0]
800b00e: 429a cmp r2, r3
800b010: d910 bls.n 800b034 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800b012: 4b87 ldr r3, [pc, #540] @ (800b230 <HAL_RCC_ClockConfig+0x240>)
800b014: 681b ldr r3, [r3, #0]
800b016: f023 020f bic.w r2, r3, #15
800b01a: 4985 ldr r1, [pc, #532] @ (800b230 <HAL_RCC_ClockConfig+0x240>)
800b01c: 683b ldr r3, [r7, #0]
800b01e: 4313 orrs r3, r2
800b020: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
800b022: 4b83 ldr r3, [pc, #524] @ (800b230 <HAL_RCC_ClockConfig+0x240>)
800b024: 681b ldr r3, [r3, #0]
800b026: f003 030f and.w r3, r3, #15
800b02a: 683a ldr r2, [r7, #0]
800b02c: 429a cmp r2, r3
800b02e: d001 beq.n 800b034 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
800b030: 2301 movs r3, #1
800b032: e184 b.n 800b33e <HAL_RCC_ClockConfig+0x34e>
}
/* Increasing the BUS frequency divider */
/*-------------------------- D1PCLK1/CDPCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
800b034: 687b ldr r3, [r7, #4]
800b036: 681b ldr r3, [r3, #0]
800b038: f003 0304 and.w r3, r3, #4
800b03c: 2b00 cmp r3, #0
800b03e: d010 beq.n 800b062 <HAL_RCC_ClockConfig+0x72>
{
#if defined (RCC_D1CFGR_D1PPRE)
if ((RCC_ClkInitStruct->APB3CLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
800b040: 687b ldr r3, [r7, #4]
800b042: 691a ldr r2, [r3, #16]
800b044: 4b7b ldr r3, [pc, #492] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b046: 699b ldr r3, [r3, #24]
800b048: f003 0370 and.w r3, r3, #112 @ 0x70
800b04c: 429a cmp r2, r3
800b04e: d908 bls.n 800b062 <HAL_RCC_ClockConfig+0x72>
{
assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
800b050: 4b78 ldr r3, [pc, #480] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b052: 699b ldr r3, [r3, #24]
800b054: f023 0270 bic.w r2, r3, #112 @ 0x70
800b058: 687b ldr r3, [r7, #4]
800b05a: 691b ldr r3, [r3, #16]
800b05c: 4975 ldr r1, [pc, #468] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b05e: 4313 orrs r3, r2
800b060: 618b str r3, [r1, #24]
}
#endif
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
800b062: 687b ldr r3, [r7, #4]
800b064: 681b ldr r3, [r3, #0]
800b066: f003 0308 and.w r3, r3, #8
800b06a: 2b00 cmp r3, #0
800b06c: d010 beq.n 800b090 <HAL_RCC_ClockConfig+0xa0>
{
#if defined (RCC_D2CFGR_D2PPRE1)
if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
800b06e: 687b ldr r3, [r7, #4]
800b070: 695a ldr r2, [r3, #20]
800b072: 4b70 ldr r3, [pc, #448] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b074: 69db ldr r3, [r3, #28]
800b076: f003 0370 and.w r3, r3, #112 @ 0x70
800b07a: 429a cmp r2, r3
800b07c: d908 bls.n 800b090 <HAL_RCC_ClockConfig+0xa0>
{
assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
800b07e: 4b6d ldr r3, [pc, #436] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b080: 69db ldr r3, [r3, #28]
800b082: f023 0270 bic.w r2, r3, #112 @ 0x70
800b086: 687b ldr r3, [r7, #4]
800b088: 695b ldr r3, [r3, #20]
800b08a: 496a ldr r1, [pc, #424] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b08c: 4313 orrs r3, r2
800b08e: 61cb str r3, [r1, #28]
MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
}
#endif
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
800b090: 687b ldr r3, [r7, #4]
800b092: 681b ldr r3, [r3, #0]
800b094: f003 0310 and.w r3, r3, #16
800b098: 2b00 cmp r3, #0
800b09a: d010 beq.n 800b0be <HAL_RCC_ClockConfig+0xce>
{
#if defined(RCC_D2CFGR_D2PPRE2)
if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
800b09c: 687b ldr r3, [r7, #4]
800b09e: 699a ldr r2, [r3, #24]
800b0a0: 4b64 ldr r3, [pc, #400] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b0a2: 69db ldr r3, [r3, #28]
800b0a4: f403 63e0 and.w r3, r3, #1792 @ 0x700
800b0a8: 429a cmp r2, r3
800b0aa: d908 bls.n 800b0be <HAL_RCC_ClockConfig+0xce>
{
assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
800b0ac: 4b61 ldr r3, [pc, #388] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b0ae: 69db ldr r3, [r3, #28]
800b0b0: f423 62e0 bic.w r2, r3, #1792 @ 0x700
800b0b4: 687b ldr r3, [r7, #4]
800b0b6: 699b ldr r3, [r3, #24]
800b0b8: 495e ldr r1, [pc, #376] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b0ba: 4313 orrs r3, r2
800b0bc: 61cb str r3, [r1, #28]
}
#endif
}
/*-------------------------- D3PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
800b0be: 687b ldr r3, [r7, #4]
800b0c0: 681b ldr r3, [r3, #0]
800b0c2: f003 0320 and.w r3, r3, #32
800b0c6: 2b00 cmp r3, #0
800b0c8: d010 beq.n 800b0ec <HAL_RCC_ClockConfig+0xfc>
{
#if defined(RCC_D3CFGR_D3PPRE)
if ((RCC_ClkInitStruct->APB4CLKDivider) > (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
800b0ca: 687b ldr r3, [r7, #4]
800b0cc: 69da ldr r2, [r3, #28]
800b0ce: 4b59 ldr r3, [pc, #356] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b0d0: 6a1b ldr r3, [r3, #32]
800b0d2: f003 0370 and.w r3, r3, #112 @ 0x70
800b0d6: 429a cmp r2, r3
800b0d8: d908 bls.n 800b0ec <HAL_RCC_ClockConfig+0xfc>
{
assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
800b0da: 4b56 ldr r3, [pc, #344] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b0dc: 6a1b ldr r3, [r3, #32]
800b0de: f023 0270 bic.w r2, r3, #112 @ 0x70
800b0e2: 687b ldr r3, [r7, #4]
800b0e4: 69db ldr r3, [r3, #28]
800b0e6: 4953 ldr r1, [pc, #332] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b0e8: 4313 orrs r3, r2
800b0ea: 620b str r3, [r1, #32]
}
#endif
}
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
800b0ec: 687b ldr r3, [r7, #4]
800b0ee: 681b ldr r3, [r3, #0]
800b0f0: f003 0302 and.w r3, r3, #2
800b0f4: 2b00 cmp r3, #0
800b0f6: d010 beq.n 800b11a <HAL_RCC_ClockConfig+0x12a>
{
#if defined (RCC_D1CFGR_HPRE)
if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE))
800b0f8: 687b ldr r3, [r7, #4]
800b0fa: 68da ldr r2, [r3, #12]
800b0fc: 4b4d ldr r3, [pc, #308] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b0fe: 699b ldr r3, [r3, #24]
800b100: f003 030f and.w r3, r3, #15
800b104: 429a cmp r2, r3
800b106: d908 bls.n 800b11a <HAL_RCC_ClockConfig+0x12a>
{
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
800b108: 4b4a ldr r3, [pc, #296] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b10a: 699b ldr r3, [r3, #24]
800b10c: f023 020f bic.w r2, r3, #15
800b110: 687b ldr r3, [r7, #4]
800b112: 68db ldr r3, [r3, #12]
800b114: 4947 ldr r1, [pc, #284] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b116: 4313 orrs r3, r2
800b118: 618b str r3, [r1, #24]
}
#endif
}
/*------------------------- SYSCLK Configuration -------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
800b11a: 687b ldr r3, [r7, #4]
800b11c: 681b ldr r3, [r3, #0]
800b11e: f003 0301 and.w r3, r3, #1
800b122: 2b00 cmp r3, #0
800b124: d055 beq.n 800b1d2 <HAL_RCC_ClockConfig+0x1e2>
{
assert_param(IS_RCC_SYSCLK(RCC_ClkInitStruct->SYSCLKDivider));
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
#if defined(RCC_D1CFGR_D1CPRE)
MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, RCC_ClkInitStruct->SYSCLKDivider);
800b126: 4b43 ldr r3, [pc, #268] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b128: 699b ldr r3, [r3, #24]
800b12a: f423 6270 bic.w r2, r3, #3840 @ 0xf00
800b12e: 687b ldr r3, [r7, #4]
800b130: 689b ldr r3, [r3, #8]
800b132: 4940 ldr r1, [pc, #256] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b134: 4313 orrs r3, r2
800b136: 618b str r3, [r1, #24]
#else
MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, RCC_ClkInitStruct->SYSCLKDivider);
#endif
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
800b138: 687b ldr r3, [r7, #4]
800b13a: 685b ldr r3, [r3, #4]
800b13c: 2b02 cmp r3, #2
800b13e: d107 bne.n 800b150 <HAL_RCC_ClockConfig+0x160>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
800b140: 4b3c ldr r3, [pc, #240] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b142: 681b ldr r3, [r3, #0]
800b144: f403 3300 and.w r3, r3, #131072 @ 0x20000
800b148: 2b00 cmp r3, #0
800b14a: d121 bne.n 800b190 <HAL_RCC_ClockConfig+0x1a0>
{
return HAL_ERROR;
800b14c: 2301 movs r3, #1
800b14e: e0f6 b.n 800b33e <HAL_RCC_ClockConfig+0x34e>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
800b150: 687b ldr r3, [r7, #4]
800b152: 685b ldr r3, [r3, #4]
800b154: 2b03 cmp r3, #3
800b156: d107 bne.n 800b168 <HAL_RCC_ClockConfig+0x178>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
800b158: 4b36 ldr r3, [pc, #216] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b15a: 681b ldr r3, [r3, #0]
800b15c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800b160: 2b00 cmp r3, #0
800b162: d115 bne.n 800b190 <HAL_RCC_ClockConfig+0x1a0>
{
return HAL_ERROR;
800b164: 2301 movs r3, #1
800b166: e0ea b.n 800b33e <HAL_RCC_ClockConfig+0x34e>
}
}
/* CSI is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_CSI)
800b168: 687b ldr r3, [r7, #4]
800b16a: 685b ldr r3, [r3, #4]
800b16c: 2b01 cmp r3, #1
800b16e: d107 bne.n 800b180 <HAL_RCC_ClockConfig+0x190>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
800b170: 4b30 ldr r3, [pc, #192] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b172: 681b ldr r3, [r3, #0]
800b174: f403 7380 and.w r3, r3, #256 @ 0x100
800b178: 2b00 cmp r3, #0
800b17a: d109 bne.n 800b190 <HAL_RCC_ClockConfig+0x1a0>
{
return HAL_ERROR;
800b17c: 2301 movs r3, #1
800b17e: e0de b.n 800b33e <HAL_RCC_ClockConfig+0x34e>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
800b180: 4b2c ldr r3, [pc, #176] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b182: 681b ldr r3, [r3, #0]
800b184: f003 0304 and.w r3, r3, #4
800b188: 2b00 cmp r3, #0
800b18a: d101 bne.n 800b190 <HAL_RCC_ClockConfig+0x1a0>
{
return HAL_ERROR;
800b18c: 2301 movs r3, #1
800b18e: e0d6 b.n 800b33e <HAL_RCC_ClockConfig+0x34e>
}
}
MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
800b190: 4b28 ldr r3, [pc, #160] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b192: 691b ldr r3, [r3, #16]
800b194: f023 0207 bic.w r2, r3, #7
800b198: 687b ldr r3, [r7, #4]
800b19a: 685b ldr r3, [r3, #4]
800b19c: 4925 ldr r1, [pc, #148] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b19e: 4313 orrs r3, r2
800b1a0: 610b str r3, [r1, #16]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800b1a2: f7fa fc11 bl 80059c8 <HAL_GetTick>
800b1a6: 6178 str r0, [r7, #20]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800b1a8: e00a b.n 800b1c0 <HAL_RCC_ClockConfig+0x1d0>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
800b1aa: f7fa fc0d bl 80059c8 <HAL_GetTick>
800b1ae: 4602 mov r2, r0
800b1b0: 697b ldr r3, [r7, #20]
800b1b2: 1ad3 subs r3, r2, r3
800b1b4: f241 3288 movw r2, #5000 @ 0x1388
800b1b8: 4293 cmp r3, r2
800b1ba: d901 bls.n 800b1c0 <HAL_RCC_ClockConfig+0x1d0>
{
return HAL_TIMEOUT;
800b1bc: 2303 movs r3, #3
800b1be: e0be b.n 800b33e <HAL_RCC_ClockConfig+0x34e>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800b1c0: 4b1c ldr r3, [pc, #112] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b1c2: 691b ldr r3, [r3, #16]
800b1c4: f003 0238 and.w r2, r3, #56 @ 0x38
800b1c8: 687b ldr r3, [r7, #4]
800b1ca: 685b ldr r3, [r3, #4]
800b1cc: 00db lsls r3, r3, #3
800b1ce: 429a cmp r2, r3
800b1d0: d1eb bne.n 800b1aa <HAL_RCC_ClockConfig+0x1ba>
}
/* Decreasing the BUS frequency divider */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
800b1d2: 687b ldr r3, [r7, #4]
800b1d4: 681b ldr r3, [r3, #0]
800b1d6: f003 0302 and.w r3, r3, #2
800b1da: 2b00 cmp r3, #0
800b1dc: d010 beq.n 800b200 <HAL_RCC_ClockConfig+0x210>
{
#if defined(RCC_D1CFGR_HPRE)
if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE))
800b1de: 687b ldr r3, [r7, #4]
800b1e0: 68da ldr r2, [r3, #12]
800b1e2: 4b14 ldr r3, [pc, #80] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b1e4: 699b ldr r3, [r3, #24]
800b1e6: f003 030f and.w r3, r3, #15
800b1ea: 429a cmp r2, r3
800b1ec: d208 bcs.n 800b200 <HAL_RCC_ClockConfig+0x210>
{
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
800b1ee: 4b11 ldr r3, [pc, #68] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b1f0: 699b ldr r3, [r3, #24]
800b1f2: f023 020f bic.w r2, r3, #15
800b1f6: 687b ldr r3, [r7, #4]
800b1f8: 68db ldr r3, [r3, #12]
800b1fa: 490e ldr r1, [pc, #56] @ (800b234 <HAL_RCC_ClockConfig+0x244>)
800b1fc: 4313 orrs r3, r2
800b1fe: 618b str r3, [r1, #24]
}
#endif
}
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
800b200: 4b0b ldr r3, [pc, #44] @ (800b230 <HAL_RCC_ClockConfig+0x240>)
800b202: 681b ldr r3, [r3, #0]
800b204: f003 030f and.w r3, r3, #15
800b208: 683a ldr r2, [r7, #0]
800b20a: 429a cmp r2, r3
800b20c: d214 bcs.n 800b238 <HAL_RCC_ClockConfig+0x248>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800b20e: 4b08 ldr r3, [pc, #32] @ (800b230 <HAL_RCC_ClockConfig+0x240>)
800b210: 681b ldr r3, [r3, #0]
800b212: f023 020f bic.w r2, r3, #15
800b216: 4906 ldr r1, [pc, #24] @ (800b230 <HAL_RCC_ClockConfig+0x240>)
800b218: 683b ldr r3, [r7, #0]
800b21a: 4313 orrs r3, r2
800b21c: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
800b21e: 4b04 ldr r3, [pc, #16] @ (800b230 <HAL_RCC_ClockConfig+0x240>)
800b220: 681b ldr r3, [r3, #0]
800b222: f003 030f and.w r3, r3, #15
800b226: 683a ldr r2, [r7, #0]
800b228: 429a cmp r2, r3
800b22a: d005 beq.n 800b238 <HAL_RCC_ClockConfig+0x248>
{
return HAL_ERROR;
800b22c: 2301 movs r3, #1
800b22e: e086 b.n 800b33e <HAL_RCC_ClockConfig+0x34e>
800b230: 52002000 .word 0x52002000
800b234: 58024400 .word 0x58024400
}
}
/*-------------------------- D1PCLK1/CDPCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
800b238: 687b ldr r3, [r7, #4]
800b23a: 681b ldr r3, [r3, #0]
800b23c: f003 0304 and.w r3, r3, #4
800b240: 2b00 cmp r3, #0
800b242: d010 beq.n 800b266 <HAL_RCC_ClockConfig+0x276>
{
#if defined(RCC_D1CFGR_D1PPRE)
if ((RCC_ClkInitStruct->APB3CLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
800b244: 687b ldr r3, [r7, #4]
800b246: 691a ldr r2, [r3, #16]
800b248: 4b3f ldr r3, [pc, #252] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b24a: 699b ldr r3, [r3, #24]
800b24c: f003 0370 and.w r3, r3, #112 @ 0x70
800b250: 429a cmp r2, r3
800b252: d208 bcs.n 800b266 <HAL_RCC_ClockConfig+0x276>
{
assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
800b254: 4b3c ldr r3, [pc, #240] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b256: 699b ldr r3, [r3, #24]
800b258: f023 0270 bic.w r2, r3, #112 @ 0x70
800b25c: 687b ldr r3, [r7, #4]
800b25e: 691b ldr r3, [r3, #16]
800b260: 4939 ldr r1, [pc, #228] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b262: 4313 orrs r3, r2
800b264: 618b str r3, [r1, #24]
}
#endif
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
800b266: 687b ldr r3, [r7, #4]
800b268: 681b ldr r3, [r3, #0]
800b26a: f003 0308 and.w r3, r3, #8
800b26e: 2b00 cmp r3, #0
800b270: d010 beq.n 800b294 <HAL_RCC_ClockConfig+0x2a4>
{
#if defined(RCC_D2CFGR_D2PPRE1)
if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
800b272: 687b ldr r3, [r7, #4]
800b274: 695a ldr r2, [r3, #20]
800b276: 4b34 ldr r3, [pc, #208] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b278: 69db ldr r3, [r3, #28]
800b27a: f003 0370 and.w r3, r3, #112 @ 0x70
800b27e: 429a cmp r2, r3
800b280: d208 bcs.n 800b294 <HAL_RCC_ClockConfig+0x2a4>
{
assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
800b282: 4b31 ldr r3, [pc, #196] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b284: 69db ldr r3, [r3, #28]
800b286: f023 0270 bic.w r2, r3, #112 @ 0x70
800b28a: 687b ldr r3, [r7, #4]
800b28c: 695b ldr r3, [r3, #20]
800b28e: 492e ldr r1, [pc, #184] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b290: 4313 orrs r3, r2
800b292: 61cb str r3, [r1, #28]
}
#endif
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
800b294: 687b ldr r3, [r7, #4]
800b296: 681b ldr r3, [r3, #0]
800b298: f003 0310 and.w r3, r3, #16
800b29c: 2b00 cmp r3, #0
800b29e: d010 beq.n 800b2c2 <HAL_RCC_ClockConfig+0x2d2>
{
#if defined (RCC_D2CFGR_D2PPRE2)
if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
800b2a0: 687b ldr r3, [r7, #4]
800b2a2: 699a ldr r2, [r3, #24]
800b2a4: 4b28 ldr r3, [pc, #160] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b2a6: 69db ldr r3, [r3, #28]
800b2a8: f403 63e0 and.w r3, r3, #1792 @ 0x700
800b2ac: 429a cmp r2, r3
800b2ae: d208 bcs.n 800b2c2 <HAL_RCC_ClockConfig+0x2d2>
{
assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
800b2b0: 4b25 ldr r3, [pc, #148] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b2b2: 69db ldr r3, [r3, #28]
800b2b4: f423 62e0 bic.w r2, r3, #1792 @ 0x700
800b2b8: 687b ldr r3, [r7, #4]
800b2ba: 699b ldr r3, [r3, #24]
800b2bc: 4922 ldr r1, [pc, #136] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b2be: 4313 orrs r3, r2
800b2c0: 61cb str r3, [r1, #28]
}
#endif
}
/*-------------------------- D3PCLK1/SRDPCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
800b2c2: 687b ldr r3, [r7, #4]
800b2c4: 681b ldr r3, [r3, #0]
800b2c6: f003 0320 and.w r3, r3, #32
800b2ca: 2b00 cmp r3, #0
800b2cc: d010 beq.n 800b2f0 <HAL_RCC_ClockConfig+0x300>
{
#if defined(RCC_D3CFGR_D3PPRE)
if ((RCC_ClkInitStruct->APB4CLKDivider) < (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
800b2ce: 687b ldr r3, [r7, #4]
800b2d0: 69da ldr r2, [r3, #28]
800b2d2: 4b1d ldr r3, [pc, #116] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b2d4: 6a1b ldr r3, [r3, #32]
800b2d6: f003 0370 and.w r3, r3, #112 @ 0x70
800b2da: 429a cmp r2, r3
800b2dc: d208 bcs.n 800b2f0 <HAL_RCC_ClockConfig+0x300>
{
assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
800b2de: 4b1a ldr r3, [pc, #104] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b2e0: 6a1b ldr r3, [r3, #32]
800b2e2: f023 0270 bic.w r2, r3, #112 @ 0x70
800b2e6: 687b ldr r3, [r7, #4]
800b2e8: 69db ldr r3, [r3, #28]
800b2ea: 4917 ldr r1, [pc, #92] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b2ec: 4313 orrs r3, r2
800b2ee: 620b str r3, [r1, #32]
#endif
}
/* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
800b2f0: f000 f834 bl 800b35c <HAL_RCC_GetSysClockFreq>
800b2f4: 4602 mov r2, r0
800b2f6: 4b14 ldr r3, [pc, #80] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b2f8: 699b ldr r3, [r3, #24]
800b2fa: 0a1b lsrs r3, r3, #8
800b2fc: f003 030f and.w r3, r3, #15
800b300: 4912 ldr r1, [pc, #72] @ (800b34c <HAL_RCC_ClockConfig+0x35c>)
800b302: 5ccb ldrb r3, [r1, r3]
800b304: f003 031f and.w r3, r3, #31
800b308: fa22 f303 lsr.w r3, r2, r3
800b30c: 613b str r3, [r7, #16]
#else
common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif
#if defined(RCC_D1CFGR_HPRE)
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
800b30e: 4b0e ldr r3, [pc, #56] @ (800b348 <HAL_RCC_ClockConfig+0x358>)
800b310: 699b ldr r3, [r3, #24]
800b312: f003 030f and.w r3, r3, #15
800b316: 4a0d ldr r2, [pc, #52] @ (800b34c <HAL_RCC_ClockConfig+0x35c>)
800b318: 5cd3 ldrb r3, [r2, r3]
800b31a: f003 031f and.w r3, r3, #31
800b31e: 693a ldr r2, [r7, #16]
800b320: fa22 f303 lsr.w r3, r2, r3
800b324: 4a0a ldr r2, [pc, #40] @ (800b350 <HAL_RCC_ClockConfig+0x360>)
800b326: 6013 str r3, [r2, #0]
#endif
#if defined(DUAL_CORE) && defined(CORE_CM4)
SystemCoreClock = SystemD2Clock;
#else
SystemCoreClock = common_system_clock;
800b328: 4a0a ldr r2, [pc, #40] @ (800b354 <HAL_RCC_ClockConfig+0x364>)
800b32a: 693b ldr r3, [r7, #16]
800b32c: 6013 str r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */
/* Configure the source of time base considering new system clocks settings*/
halstatus = HAL_InitTick(uwTickPrio);
800b32e: 4b0a ldr r3, [pc, #40] @ (800b358 <HAL_RCC_ClockConfig+0x368>)
800b330: 681b ldr r3, [r3, #0]
800b332: 4618 mov r0, r3
800b334: f7f8 ff12 bl 800415c <HAL_InitTick>
800b338: 4603 mov r3, r0
800b33a: 73fb strb r3, [r7, #15]
return halstatus;
800b33c: 7bfb ldrb r3, [r7, #15]
}
800b33e: 4618 mov r0, r3
800b340: 3718 adds r7, #24
800b342: 46bd mov sp, r7
800b344: bd80 pop {r7, pc}
800b346: bf00 nop
800b348: 58024400 .word 0x58024400
800b34c: 08031cdc .word 0x08031cdc
800b350: 24000010 .word 0x24000010
800b354: 2400000c .word 0x2400000c
800b358: 2400002c .word 0x2400002c
0800b35c <HAL_RCC_GetSysClockFreq>:
*
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
800b35c: b480 push {r7}
800b35e: b089 sub sp, #36 @ 0x24
800b360: af00 add r7, sp, #0
float_t fracn1, pllvco;
uint32_t sysclockfreq;
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
800b362: 4bb3 ldr r3, [pc, #716] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b364: 691b ldr r3, [r3, #16]
800b366: f003 0338 and.w r3, r3, #56 @ 0x38
800b36a: 2b18 cmp r3, #24
800b36c: f200 8155 bhi.w 800b61a <HAL_RCC_GetSysClockFreq+0x2be>
800b370: a201 add r2, pc, #4 @ (adr r2, 800b378 <HAL_RCC_GetSysClockFreq+0x1c>)
800b372: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800b376: bf00 nop
800b378: 0800b3dd .word 0x0800b3dd
800b37c: 0800b61b .word 0x0800b61b
800b380: 0800b61b .word 0x0800b61b
800b384: 0800b61b .word 0x0800b61b
800b388: 0800b61b .word 0x0800b61b
800b38c: 0800b61b .word 0x0800b61b
800b390: 0800b61b .word 0x0800b61b
800b394: 0800b61b .word 0x0800b61b
800b398: 0800b403 .word 0x0800b403
800b39c: 0800b61b .word 0x0800b61b
800b3a0: 0800b61b .word 0x0800b61b
800b3a4: 0800b61b .word 0x0800b61b
800b3a8: 0800b61b .word 0x0800b61b
800b3ac: 0800b61b .word 0x0800b61b
800b3b0: 0800b61b .word 0x0800b61b
800b3b4: 0800b61b .word 0x0800b61b
800b3b8: 0800b409 .word 0x0800b409
800b3bc: 0800b61b .word 0x0800b61b
800b3c0: 0800b61b .word 0x0800b61b
800b3c4: 0800b61b .word 0x0800b61b
800b3c8: 0800b61b .word 0x0800b61b
800b3cc: 0800b61b .word 0x0800b61b
800b3d0: 0800b61b .word 0x0800b61b
800b3d4: 0800b61b .word 0x0800b61b
800b3d8: 0800b40f .word 0x0800b40f
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
800b3dc: 4b94 ldr r3, [pc, #592] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b3de: 681b ldr r3, [r3, #0]
800b3e0: f003 0320 and.w r3, r3, #32
800b3e4: 2b00 cmp r3, #0
800b3e6: d009 beq.n 800b3fc <HAL_RCC_GetSysClockFreq+0xa0>
{
sysclockfreq = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
800b3e8: 4b91 ldr r3, [pc, #580] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b3ea: 681b ldr r3, [r3, #0]
800b3ec: 08db lsrs r3, r3, #3
800b3ee: f003 0303 and.w r3, r3, #3
800b3f2: 4a90 ldr r2, [pc, #576] @ (800b634 <HAL_RCC_GetSysClockFreq+0x2d8>)
800b3f4: fa22 f303 lsr.w r3, r2, r3
800b3f8: 61bb str r3, [r7, #24]
else
{
sysclockfreq = (uint32_t) HSI_VALUE;
}
break;
800b3fa: e111 b.n 800b620 <HAL_RCC_GetSysClockFreq+0x2c4>
sysclockfreq = (uint32_t) HSI_VALUE;
800b3fc: 4b8d ldr r3, [pc, #564] @ (800b634 <HAL_RCC_GetSysClockFreq+0x2d8>)
800b3fe: 61bb str r3, [r7, #24]
break;
800b400: e10e b.n 800b620 <HAL_RCC_GetSysClockFreq+0x2c4>
case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */
sysclockfreq = CSI_VALUE;
800b402: 4b8d ldr r3, [pc, #564] @ (800b638 <HAL_RCC_GetSysClockFreq+0x2dc>)
800b404: 61bb str r3, [r7, #24]
break;
800b406: e10b b.n 800b620 <HAL_RCC_GetSysClockFreq+0x2c4>
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
sysclockfreq = HSE_VALUE;
800b408: 4b8c ldr r3, [pc, #560] @ (800b63c <HAL_RCC_GetSysClockFreq+0x2e0>)
800b40a: 61bb str r3, [r7, #24]
break;
800b40c: e108 b.n 800b620 <HAL_RCC_GetSysClockFreq+0x2c4>
case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
SYSCLK = PLL_VCO / PLLR
*/
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
800b40e: 4b88 ldr r3, [pc, #544] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b410: 6a9b ldr r3, [r3, #40] @ 0x28
800b412: f003 0303 and.w r3, r3, #3
800b416: 617b str r3, [r7, #20]
pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4) ;
800b418: 4b85 ldr r3, [pc, #532] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b41a: 6a9b ldr r3, [r3, #40] @ 0x28
800b41c: 091b lsrs r3, r3, #4
800b41e: f003 033f and.w r3, r3, #63 @ 0x3f
800b422: 613b str r3, [r7, #16]
pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos);
800b424: 4b82 ldr r3, [pc, #520] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b426: 6adb ldr r3, [r3, #44] @ 0x2c
800b428: f003 0301 and.w r3, r3, #1
800b42c: 60fb str r3, [r7, #12]
fracn1 = (float_t)(uint32_t)(pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> 3));
800b42e: 4b80 ldr r3, [pc, #512] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b430: 6b5b ldr r3, [r3, #52] @ 0x34
800b432: 08db lsrs r3, r3, #3
800b434: f3c3 030c ubfx r3, r3, #0, #13
800b438: 68fa ldr r2, [r7, #12]
800b43a: fb02 f303 mul.w r3, r2, r3
800b43e: ee07 3a90 vmov s15, r3
800b442: eef8 7a67 vcvt.f32.u32 s15, s15
800b446: edc7 7a02 vstr s15, [r7, #8]
if (pllm != 0U)
800b44a: 693b ldr r3, [r7, #16]
800b44c: 2b00 cmp r3, #0
800b44e: f000 80e1 beq.w 800b614 <HAL_RCC_GetSysClockFreq+0x2b8>
800b452: 697b ldr r3, [r7, #20]
800b454: 2b02 cmp r3, #2
800b456: f000 8083 beq.w 800b560 <HAL_RCC_GetSysClockFreq+0x204>
800b45a: 697b ldr r3, [r7, #20]
800b45c: 2b02 cmp r3, #2
800b45e: f200 80a1 bhi.w 800b5a4 <HAL_RCC_GetSysClockFreq+0x248>
800b462: 697b ldr r3, [r7, #20]
800b464: 2b00 cmp r3, #0
800b466: d003 beq.n 800b470 <HAL_RCC_GetSysClockFreq+0x114>
800b468: 697b ldr r3, [r7, #20]
800b46a: 2b01 cmp r3, #1
800b46c: d056 beq.n 800b51c <HAL_RCC_GetSysClockFreq+0x1c0>
800b46e: e099 b.n 800b5a4 <HAL_RCC_GetSysClockFreq+0x248>
{
switch (pllsource)
{
case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
800b470: 4b6f ldr r3, [pc, #444] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b472: 681b ldr r3, [r3, #0]
800b474: f003 0320 and.w r3, r3, #32
800b478: 2b00 cmp r3, #0
800b47a: d02d beq.n 800b4d8 <HAL_RCC_GetSysClockFreq+0x17c>
{
hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
800b47c: 4b6c ldr r3, [pc, #432] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b47e: 681b ldr r3, [r3, #0]
800b480: 08db lsrs r3, r3, #3
800b482: f003 0303 and.w r3, r3, #3
800b486: 4a6b ldr r2, [pc, #428] @ (800b634 <HAL_RCC_GetSysClockFreq+0x2d8>)
800b488: fa22 f303 lsr.w r3, r2, r3
800b48c: 607b str r3, [r7, #4]
pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
800b48e: 687b ldr r3, [r7, #4]
800b490: ee07 3a90 vmov s15, r3
800b494: eef8 6a67 vcvt.f32.u32 s13, s15
800b498: 693b ldr r3, [r7, #16]
800b49a: ee07 3a90 vmov s15, r3
800b49e: eef8 7a67 vcvt.f32.u32 s15, s15
800b4a2: ee86 7aa7 vdiv.f32 s14, s13, s15
800b4a6: 4b62 ldr r3, [pc, #392] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b4a8: 6b1b ldr r3, [r3, #48] @ 0x30
800b4aa: f3c3 0308 ubfx r3, r3, #0, #9
800b4ae: ee07 3a90 vmov s15, r3
800b4b2: eef8 6a67 vcvt.f32.u32 s13, s15
800b4b6: ed97 6a02 vldr s12, [r7, #8]
800b4ba: eddf 5a61 vldr s11, [pc, #388] @ 800b640 <HAL_RCC_GetSysClockFreq+0x2e4>
800b4be: eec6 7a25 vdiv.f32 s15, s12, s11
800b4c2: ee76 7aa7 vadd.f32 s15, s13, s15
800b4c6: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800b4ca: ee77 7aa6 vadd.f32 s15, s15, s13
800b4ce: ee67 7a27 vmul.f32 s15, s14, s15
800b4d2: edc7 7a07 vstr s15, [r7, #28]
}
else
{
pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
}
break;
800b4d6: e087 b.n 800b5e8 <HAL_RCC_GetSysClockFreq+0x28c>
pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
800b4d8: 693b ldr r3, [r7, #16]
800b4da: ee07 3a90 vmov s15, r3
800b4de: eef8 7a67 vcvt.f32.u32 s15, s15
800b4e2: eddf 6a58 vldr s13, [pc, #352] @ 800b644 <HAL_RCC_GetSysClockFreq+0x2e8>
800b4e6: ee86 7aa7 vdiv.f32 s14, s13, s15
800b4ea: 4b51 ldr r3, [pc, #324] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b4ec: 6b1b ldr r3, [r3, #48] @ 0x30
800b4ee: f3c3 0308 ubfx r3, r3, #0, #9
800b4f2: ee07 3a90 vmov s15, r3
800b4f6: eef8 6a67 vcvt.f32.u32 s13, s15
800b4fa: ed97 6a02 vldr s12, [r7, #8]
800b4fe: eddf 5a50 vldr s11, [pc, #320] @ 800b640 <HAL_RCC_GetSysClockFreq+0x2e4>
800b502: eec6 7a25 vdiv.f32 s15, s12, s11
800b506: ee76 7aa7 vadd.f32 s15, s13, s15
800b50a: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800b50e: ee77 7aa6 vadd.f32 s15, s15, s13
800b512: ee67 7a27 vmul.f32 s15, s14, s15
800b516: edc7 7a07 vstr s15, [r7, #28]
break;
800b51a: e065 b.n 800b5e8 <HAL_RCC_GetSysClockFreq+0x28c>
case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */
pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
800b51c: 693b ldr r3, [r7, #16]
800b51e: ee07 3a90 vmov s15, r3
800b522: eef8 7a67 vcvt.f32.u32 s15, s15
800b526: eddf 6a48 vldr s13, [pc, #288] @ 800b648 <HAL_RCC_GetSysClockFreq+0x2ec>
800b52a: ee86 7aa7 vdiv.f32 s14, s13, s15
800b52e: 4b40 ldr r3, [pc, #256] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b530: 6b1b ldr r3, [r3, #48] @ 0x30
800b532: f3c3 0308 ubfx r3, r3, #0, #9
800b536: ee07 3a90 vmov s15, r3
800b53a: eef8 6a67 vcvt.f32.u32 s13, s15
800b53e: ed97 6a02 vldr s12, [r7, #8]
800b542: eddf 5a3f vldr s11, [pc, #252] @ 800b640 <HAL_RCC_GetSysClockFreq+0x2e4>
800b546: eec6 7a25 vdiv.f32 s15, s12, s11
800b54a: ee76 7aa7 vadd.f32 s15, s13, s15
800b54e: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800b552: ee77 7aa6 vadd.f32 s15, s15, s13
800b556: ee67 7a27 vmul.f32 s15, s14, s15
800b55a: edc7 7a07 vstr s15, [r7, #28]
break;
800b55e: e043 b.n 800b5e8 <HAL_RCC_GetSysClockFreq+0x28c>
case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
800b560: 693b ldr r3, [r7, #16]
800b562: ee07 3a90 vmov s15, r3
800b566: eef8 7a67 vcvt.f32.u32 s15, s15
800b56a: eddf 6a38 vldr s13, [pc, #224] @ 800b64c <HAL_RCC_GetSysClockFreq+0x2f0>
800b56e: ee86 7aa7 vdiv.f32 s14, s13, s15
800b572: 4b2f ldr r3, [pc, #188] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b574: 6b1b ldr r3, [r3, #48] @ 0x30
800b576: f3c3 0308 ubfx r3, r3, #0, #9
800b57a: ee07 3a90 vmov s15, r3
800b57e: eef8 6a67 vcvt.f32.u32 s13, s15
800b582: ed97 6a02 vldr s12, [r7, #8]
800b586: eddf 5a2e vldr s11, [pc, #184] @ 800b640 <HAL_RCC_GetSysClockFreq+0x2e4>
800b58a: eec6 7a25 vdiv.f32 s15, s12, s11
800b58e: ee76 7aa7 vadd.f32 s15, s13, s15
800b592: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800b596: ee77 7aa6 vadd.f32 s15, s15, s13
800b59a: ee67 7a27 vmul.f32 s15, s14, s15
800b59e: edc7 7a07 vstr s15, [r7, #28]
break;
800b5a2: e021 b.n 800b5e8 <HAL_RCC_GetSysClockFreq+0x28c>
default:
pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
800b5a4: 693b ldr r3, [r7, #16]
800b5a6: ee07 3a90 vmov s15, r3
800b5aa: eef8 7a67 vcvt.f32.u32 s15, s15
800b5ae: eddf 6a26 vldr s13, [pc, #152] @ 800b648 <HAL_RCC_GetSysClockFreq+0x2ec>
800b5b2: ee86 7aa7 vdiv.f32 s14, s13, s15
800b5b6: 4b1e ldr r3, [pc, #120] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b5b8: 6b1b ldr r3, [r3, #48] @ 0x30
800b5ba: f3c3 0308 ubfx r3, r3, #0, #9
800b5be: ee07 3a90 vmov s15, r3
800b5c2: eef8 6a67 vcvt.f32.u32 s13, s15
800b5c6: ed97 6a02 vldr s12, [r7, #8]
800b5ca: eddf 5a1d vldr s11, [pc, #116] @ 800b640 <HAL_RCC_GetSysClockFreq+0x2e4>
800b5ce: eec6 7a25 vdiv.f32 s15, s12, s11
800b5d2: ee76 7aa7 vadd.f32 s15, s13, s15
800b5d6: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800b5da: ee77 7aa6 vadd.f32 s15, s15, s13
800b5de: ee67 7a27 vmul.f32 s15, s14, s15
800b5e2: edc7 7a07 vstr s15, [r7, #28]
break;
800b5e6: bf00 nop
}
pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >> 9) + 1U) ;
800b5e8: 4b11 ldr r3, [pc, #68] @ (800b630 <HAL_RCC_GetSysClockFreq+0x2d4>)
800b5ea: 6b1b ldr r3, [r3, #48] @ 0x30
800b5ec: 0a5b lsrs r3, r3, #9
800b5ee: f003 037f and.w r3, r3, #127 @ 0x7f
800b5f2: 3301 adds r3, #1
800b5f4: 603b str r3, [r7, #0]
sysclockfreq = (uint32_t)(float_t)(pllvco / (float_t)pllp);
800b5f6: 683b ldr r3, [r7, #0]
800b5f8: ee07 3a90 vmov s15, r3
800b5fc: eeb8 7a67 vcvt.f32.u32 s14, s15
800b600: edd7 6a07 vldr s13, [r7, #28]
800b604: eec6 7a87 vdiv.f32 s15, s13, s14
800b608: eefc 7ae7 vcvt.u32.f32 s15, s15
800b60c: ee17 3a90 vmov r3, s15
800b610: 61bb str r3, [r7, #24]
}
else
{
sysclockfreq = 0U;
}
break;
800b612: e005 b.n 800b620 <HAL_RCC_GetSysClockFreq+0x2c4>
sysclockfreq = 0U;
800b614: 2300 movs r3, #0
800b616: 61bb str r3, [r7, #24]
break;
800b618: e002 b.n 800b620 <HAL_RCC_GetSysClockFreq+0x2c4>
default:
sysclockfreq = CSI_VALUE;
800b61a: 4b07 ldr r3, [pc, #28] @ (800b638 <HAL_RCC_GetSysClockFreq+0x2dc>)
800b61c: 61bb str r3, [r7, #24]
break;
800b61e: bf00 nop
}
return sysclockfreq;
800b620: 69bb ldr r3, [r7, #24]
}
800b622: 4618 mov r0, r3
800b624: 3724 adds r7, #36 @ 0x24
800b626: 46bd mov sp, r7
800b628: f85d 7b04 ldr.w r7, [sp], #4
800b62c: 4770 bx lr
800b62e: bf00 nop
800b630: 58024400 .word 0x58024400
800b634: 03d09000 .word 0x03d09000
800b638: 003d0900 .word 0x003d0900
800b63c: 017d7840 .word 0x017d7840
800b640: 46000000 .word 0x46000000
800b644: 4c742400 .word 0x4c742400
800b648: 4a742400 .word 0x4a742400
800b64c: 4bbebc20 .word 0x4bbebc20
0800b650 <HAL_RCC_GetHCLKFreq>:
* @note The SystemD2Clock CMSIS variable is used to store System domain2 Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
800b650: b580 push {r7, lr}
800b652: b082 sub sp, #8
800b654: af00 add r7, sp, #0
uint32_t common_system_clock;
#if defined(RCC_D1CFGR_D1CPRE)
common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos] & 0x1FU);
800b656: f7ff fe81 bl 800b35c <HAL_RCC_GetSysClockFreq>
800b65a: 4602 mov r2, r0
800b65c: 4b10 ldr r3, [pc, #64] @ (800b6a0 <HAL_RCC_GetHCLKFreq+0x50>)
800b65e: 699b ldr r3, [r3, #24]
800b660: 0a1b lsrs r3, r3, #8
800b662: f003 030f and.w r3, r3, #15
800b666: 490f ldr r1, [pc, #60] @ (800b6a4 <HAL_RCC_GetHCLKFreq+0x54>)
800b668: 5ccb ldrb r3, [r1, r3]
800b66a: f003 031f and.w r3, r3, #31
800b66e: fa22 f303 lsr.w r3, r2, r3
800b672: 607b str r3, [r7, #4]
#else
common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos] & 0x1FU);
#endif
#if defined(RCC_D1CFGR_HPRE)
SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
800b674: 4b0a ldr r3, [pc, #40] @ (800b6a0 <HAL_RCC_GetHCLKFreq+0x50>)
800b676: 699b ldr r3, [r3, #24]
800b678: f003 030f and.w r3, r3, #15
800b67c: 4a09 ldr r2, [pc, #36] @ (800b6a4 <HAL_RCC_GetHCLKFreq+0x54>)
800b67e: 5cd3 ldrb r3, [r2, r3]
800b680: f003 031f and.w r3, r3, #31
800b684: 687a ldr r2, [r7, #4]
800b686: fa22 f303 lsr.w r3, r2, r3
800b68a: 4a07 ldr r2, [pc, #28] @ (800b6a8 <HAL_RCC_GetHCLKFreq+0x58>)
800b68c: 6013 str r3, [r2, #0]
#endif
#if defined(DUAL_CORE) && defined(CORE_CM4)
SystemCoreClock = SystemD2Clock;
#else
SystemCoreClock = common_system_clock;
800b68e: 4a07 ldr r2, [pc, #28] @ (800b6ac <HAL_RCC_GetHCLKFreq+0x5c>)
800b690: 687b ldr r3, [r7, #4]
800b692: 6013 str r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */
return SystemD2Clock;
800b694: 4b04 ldr r3, [pc, #16] @ (800b6a8 <HAL_RCC_GetHCLKFreq+0x58>)
800b696: 681b ldr r3, [r3, #0]
}
800b698: 4618 mov r0, r3
800b69a: 3708 adds r7, #8
800b69c: 46bd mov sp, r7
800b69e: bd80 pop {r7, pc}
800b6a0: 58024400 .word 0x58024400
800b6a4: 08031cdc .word 0x08031cdc
800b6a8: 24000010 .word 0x24000010
800b6ac: 2400000c .word 0x2400000c
0800b6b0 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
800b6b0: b580 push {r7, lr}
800b6b2: af00 add r7, sp, #0
#if defined (RCC_D2CFGR_D2PPRE1)
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1) >> RCC_D2CFGR_D2PPRE1_Pos]) & 0x1FU));
800b6b4: f7ff ffcc bl 800b650 <HAL_RCC_GetHCLKFreq>
800b6b8: 4602 mov r2, r0
800b6ba: 4b06 ldr r3, [pc, #24] @ (800b6d4 <HAL_RCC_GetPCLK1Freq+0x24>)
800b6bc: 69db ldr r3, [r3, #28]
800b6be: 091b lsrs r3, r3, #4
800b6c0: f003 0307 and.w r3, r3, #7
800b6c4: 4904 ldr r1, [pc, #16] @ (800b6d8 <HAL_RCC_GetPCLK1Freq+0x28>)
800b6c6: 5ccb ldrb r3, [r1, r3]
800b6c8: f003 031f and.w r3, r3, #31
800b6cc: fa22 f303 lsr.w r3, r2, r3
#else
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1) >> RCC_CDCFGR2_CDPPRE1_Pos]) & 0x1FU));
#endif
}
800b6d0: 4618 mov r0, r3
800b6d2: bd80 pop {r7, pc}
800b6d4: 58024400 .word 0x58024400
800b6d8: 08031cdc .word 0x08031cdc
0800b6dc <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
800b6dc: b580 push {r7, lr}
800b6de: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
#if defined(RCC_D2CFGR_D2PPRE2)
return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2) >> RCC_D2CFGR_D2PPRE2_Pos]) & 0x1FU));
800b6e0: f7ff ffb6 bl 800b650 <HAL_RCC_GetHCLKFreq>
800b6e4: 4602 mov r2, r0
800b6e6: 4b06 ldr r3, [pc, #24] @ (800b700 <HAL_RCC_GetPCLK2Freq+0x24>)
800b6e8: 69db ldr r3, [r3, #28]
800b6ea: 0a1b lsrs r3, r3, #8
800b6ec: f003 0307 and.w r3, r3, #7
800b6f0: 4904 ldr r1, [pc, #16] @ (800b704 <HAL_RCC_GetPCLK2Freq+0x28>)
800b6f2: 5ccb ldrb r3, [r1, r3]
800b6f4: f003 031f and.w r3, r3, #31
800b6f8: fa22 f303 lsr.w r3, r2, r3
#else
return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2) >> RCC_CDCFGR2_CDPPRE2_Pos]) & 0x1FU));
#endif
}
800b6fc: 4618 mov r0, r3
800b6fe: bd80 pop {r7, pc}
800b700: 58024400 .word 0x58024400
800b704: 08031cdc .word 0x08031cdc
0800b708 <HAL_RCC_GetClockConfig>:
* will be configured.
* @param pFLatency: Pointer on the Flash Latency.
* @retval None
*/
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
{
800b708: b480 push {r7}
800b70a: b083 sub sp, #12
800b70c: af00 add r7, sp, #0
800b70e: 6078 str r0, [r7, #4]
800b710: 6039 str r1, [r7, #0]
/* Set all possible values for the Clock type parameter --------------------*/
RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 |
800b712: 687b ldr r3, [r7, #4]
800b714: 223f movs r2, #63 @ 0x3f
800b716: 601a str r2, [r3, #0]
RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1 ;
/* Get the SYSCLK configuration --------------------------------------------*/
RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
800b718: 4b1a ldr r3, [pc, #104] @ (800b784 <HAL_RCC_GetClockConfig+0x7c>)
800b71a: 691b ldr r3, [r3, #16]
800b71c: f003 0207 and.w r2, r3, #7
800b720: 687b ldr r3, [r7, #4]
800b722: 605a str r2, [r3, #4]
#if defined(RCC_D1CFGR_D1CPRE)
/* Get the SYSCLK configuration ----------------------------------------------*/
RCC_ClkInitStruct->SYSCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1CPRE);
800b724: 4b17 ldr r3, [pc, #92] @ (800b784 <HAL_RCC_GetClockConfig+0x7c>)
800b726: 699b ldr r3, [r3, #24]
800b728: f403 6270 and.w r2, r3, #3840 @ 0xf00
800b72c: 687b ldr r3, [r7, #4]
800b72e: 609a str r2, [r3, #8]
/* Get the D1HCLK configuration ----------------------------------------------*/
RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_HPRE);
800b730: 4b14 ldr r3, [pc, #80] @ (800b784 <HAL_RCC_GetClockConfig+0x7c>)
800b732: 699b ldr r3, [r3, #24]
800b734: f003 020f and.w r2, r3, #15
800b738: 687b ldr r3, [r7, #4]
800b73a: 60da str r2, [r3, #12]
/* Get the APB3 configuration ----------------------------------------------*/
RCC_ClkInitStruct->APB3CLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1PPRE);
800b73c: 4b11 ldr r3, [pc, #68] @ (800b784 <HAL_RCC_GetClockConfig+0x7c>)
800b73e: 699b ldr r3, [r3, #24]
800b740: f003 0270 and.w r2, r3, #112 @ 0x70
800b744: 687b ldr r3, [r7, #4]
800b746: 611a str r2, [r3, #16]
/* Get the APB1 configuration ----------------------------------------------*/
RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1);
800b748: 4b0e ldr r3, [pc, #56] @ (800b784 <HAL_RCC_GetClockConfig+0x7c>)
800b74a: 69db ldr r3, [r3, #28]
800b74c: f003 0270 and.w r2, r3, #112 @ 0x70
800b750: 687b ldr r3, [r7, #4]
800b752: 615a str r2, [r3, #20]
/* Get the APB2 configuration ----------------------------------------------*/
RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2);
800b754: 4b0b ldr r3, [pc, #44] @ (800b784 <HAL_RCC_GetClockConfig+0x7c>)
800b756: 69db ldr r3, [r3, #28]
800b758: f403 62e0 and.w r2, r3, #1792 @ 0x700
800b75c: 687b ldr r3, [r7, #4]
800b75e: 619a str r2, [r3, #24]
/* Get the APB4 configuration ----------------------------------------------*/
RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->D3CFGR & RCC_D3CFGR_D3PPRE);
800b760: 4b08 ldr r3, [pc, #32] @ (800b784 <HAL_RCC_GetClockConfig+0x7c>)
800b762: 6a1b ldr r3, [r3, #32]
800b764: f003 0270 and.w r2, r3, #112 @ 0x70
800b768: 687b ldr r3, [r7, #4]
800b76a: 61da str r2, [r3, #28]
/* Get the APB4 configuration ----------------------------------------------*/
RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE);
#endif
/* Get the Flash Wait State (Latency) configuration ------------------------*/
*pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
800b76c: 4b06 ldr r3, [pc, #24] @ (800b788 <HAL_RCC_GetClockConfig+0x80>)
800b76e: 681b ldr r3, [r3, #0]
800b770: f003 020f and.w r2, r3, #15
800b774: 683b ldr r3, [r7, #0]
800b776: 601a str r2, [r3, #0]
}
800b778: bf00 nop
800b77a: 370c adds r7, #12
800b77c: 46bd mov sp, r7
800b77e: f85d 7b04 ldr.w r7, [sp], #4
800b782: 4770 bx lr
800b784: 58024400 .word 0x58024400
800b788: 52002000 .word 0x52002000
0800b78c <HAL_RCCEx_PeriphCLKConfig>:
* (*) : Available on some STM32H7 lines only.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
800b78c: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
800b790: b0c8 sub sp, #288 @ 0x120
800b792: af00 add r7, sp, #0
800b794: f8c7 010c str.w r0, [r7, #268] @ 0x10c
uint32_t tmpreg;
uint32_t tickstart;
HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */
800b798: 2300 movs r3, #0
800b79a: f887 311f strb.w r3, [r7, #287] @ 0x11f
HAL_StatusTypeDef status = HAL_OK; /* Final status */
800b79e: 2300 movs r3, #0
800b7a0: f887 311e strb.w r3, [r7, #286] @ 0x11e
/*---------------------------- SPDIFRX configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
800b7a4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b7a8: e9d3 2300 ldrd r2, r3, [r3]
800b7ac: f002 6400 and.w r4, r2, #134217728 @ 0x8000000
800b7b0: 2500 movs r5, #0
800b7b2: ea54 0305 orrs.w r3, r4, r5
800b7b6: d049 beq.n 800b84c <HAL_RCCEx_PeriphCLKConfig+0xc0>
{
switch (PeriphClkInit->SpdifrxClockSelection)
800b7b8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b7bc: 6e9b ldr r3, [r3, #104] @ 0x68
800b7be: f5b3 1f40 cmp.w r3, #3145728 @ 0x300000
800b7c2: d02f beq.n 800b824 <HAL_RCCEx_PeriphCLKConfig+0x98>
800b7c4: f5b3 1f40 cmp.w r3, #3145728 @ 0x300000
800b7c8: d828 bhi.n 800b81c <HAL_RCCEx_PeriphCLKConfig+0x90>
800b7ca: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
800b7ce: d01a beq.n 800b806 <HAL_RCCEx_PeriphCLKConfig+0x7a>
800b7d0: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
800b7d4: d822 bhi.n 800b81c <HAL_RCCEx_PeriphCLKConfig+0x90>
800b7d6: 2b00 cmp r3, #0
800b7d8: d003 beq.n 800b7e2 <HAL_RCCEx_PeriphCLKConfig+0x56>
800b7da: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
800b7de: d007 beq.n 800b7f0 <HAL_RCCEx_PeriphCLKConfig+0x64>
800b7e0: e01c b.n 800b81c <HAL_RCCEx_PeriphCLKConfig+0x90>
{
case RCC_SPDIFRXCLKSOURCE_PLL: /* PLL is used as clock source for SPDIFRX*/
/* Enable PLL1Q Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800b7e2: 4bb8 ldr r3, [pc, #736] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b7e4: 6adb ldr r3, [r3, #44] @ 0x2c
800b7e6: 4ab7 ldr r2, [pc, #732] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b7e8: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800b7ec: 62d3 str r3, [r2, #44] @ 0x2c
/* SPDIFRX clock source configuration done later after clock selection check */
break;
800b7ee: e01a b.n 800b826 <HAL_RCCEx_PeriphCLKConfig+0x9a>
case RCC_SPDIFRXCLKSOURCE_PLL2: /* PLL2 is used as clock source for SPDIFRX*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
800b7f0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b7f4: 3308 adds r3, #8
800b7f6: 2102 movs r1, #2
800b7f8: 4618 mov r0, r3
800b7fa: f001 fc73 bl 800d0e4 <RCCEx_PLL2_Config>
800b7fe: 4603 mov r3, r0
800b800: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SPDIFRX clock source configuration done later after clock selection check */
break;
800b804: e00f b.n 800b826 <HAL_RCCEx_PeriphCLKConfig+0x9a>
case RCC_SPDIFRXCLKSOURCE_PLL3: /* PLL3 is used as clock source for SPDIFRX*/
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
800b806: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b80a: 3328 adds r3, #40 @ 0x28
800b80c: 2102 movs r1, #2
800b80e: 4618 mov r0, r3
800b810: f001 fd1a bl 800d248 <RCCEx_PLL3_Config>
800b814: 4603 mov r3, r0
800b816: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SPDIFRX clock source configuration done later after clock selection check */
break;
800b81a: e004 b.n 800b826 <HAL_RCCEx_PeriphCLKConfig+0x9a>
/* Internal OSC clock is used as source of SPDIFRX clock*/
/* SPDIFRX clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800b81c: 2301 movs r3, #1
800b81e: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800b822: e000 b.n 800b826 <HAL_RCCEx_PeriphCLKConfig+0x9a>
break;
800b824: bf00 nop
}
if (ret == HAL_OK)
800b826: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800b82a: 2b00 cmp r3, #0
800b82c: d10a bne.n 800b844 <HAL_RCCEx_PeriphCLKConfig+0xb8>
{
/* Set the source of SPDIFRX clock*/
__HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifrxClockSelection);
800b82e: 4ba5 ldr r3, [pc, #660] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b830: 6d1b ldr r3, [r3, #80] @ 0x50
800b832: f423 1140 bic.w r1, r3, #3145728 @ 0x300000
800b836: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b83a: 6e9b ldr r3, [r3, #104] @ 0x68
800b83c: 4aa1 ldr r2, [pc, #644] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b83e: 430b orrs r3, r1
800b840: 6513 str r3, [r2, #80] @ 0x50
800b842: e003 b.n 800b84c <HAL_RCCEx_PeriphCLKConfig+0xc0>
}
else
{
/* set overall return value */
status = ret;
800b844: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800b848: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*---------------------------- SAI1 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
800b84c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b850: e9d3 2300 ldrd r2, r3, [r3]
800b854: f402 7880 and.w r8, r2, #256 @ 0x100
800b858: f04f 0900 mov.w r9, #0
800b85c: ea58 0309 orrs.w r3, r8, r9
800b860: d047 beq.n 800b8f2 <HAL_RCCEx_PeriphCLKConfig+0x166>
{
switch (PeriphClkInit->Sai1ClockSelection)
800b862: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b866: 6d9b ldr r3, [r3, #88] @ 0x58
800b868: 2b04 cmp r3, #4
800b86a: d82a bhi.n 800b8c2 <HAL_RCCEx_PeriphCLKConfig+0x136>
800b86c: a201 add r2, pc, #4 @ (adr r2, 800b874 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
800b86e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800b872: bf00 nop
800b874: 0800b889 .word 0x0800b889
800b878: 0800b897 .word 0x0800b897
800b87c: 0800b8ad .word 0x0800b8ad
800b880: 0800b8cb .word 0x0800b8cb
800b884: 0800b8cb .word 0x0800b8cb
{
case RCC_SAI1CLKSOURCE_PLL: /* PLL is used as clock source for SAI1*/
/* Enable SAI Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800b888: 4b8e ldr r3, [pc, #568] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b88a: 6adb ldr r3, [r3, #44] @ 0x2c
800b88c: 4a8d ldr r2, [pc, #564] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b88e: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800b892: 62d3 str r3, [r2, #44] @ 0x2c
/* SAI1 clock source configuration done later after clock selection check */
break;
800b894: e01a b.n 800b8cc <HAL_RCCEx_PeriphCLKConfig+0x140>
case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI1*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800b896: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b89a: 3308 adds r3, #8
800b89c: 2100 movs r1, #0
800b89e: 4618 mov r0, r3
800b8a0: f001 fc20 bl 800d0e4 <RCCEx_PLL2_Config>
800b8a4: 4603 mov r3, r0
800b8a6: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SAI1 clock source configuration done later after clock selection check */
break;
800b8aa: e00f b.n 800b8cc <HAL_RCCEx_PeriphCLKConfig+0x140>
case RCC_SAI1CLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI1*/
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
800b8ac: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b8b0: 3328 adds r3, #40 @ 0x28
800b8b2: 2100 movs r1, #0
800b8b4: 4618 mov r0, r3
800b8b6: f001 fcc7 bl 800d248 <RCCEx_PLL3_Config>
800b8ba: 4603 mov r3, r0
800b8bc: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SAI1 clock source configuration done later after clock selection check */
break;
800b8c0: e004 b.n 800b8cc <HAL_RCCEx_PeriphCLKConfig+0x140>
/* HSI, HSE, or CSI oscillator is used as source of SAI1 clock */
/* SAI1 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800b8c2: 2301 movs r3, #1
800b8c4: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800b8c8: e000 b.n 800b8cc <HAL_RCCEx_PeriphCLKConfig+0x140>
break;
800b8ca: bf00 nop
}
if (ret == HAL_OK)
800b8cc: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800b8d0: 2b00 cmp r3, #0
800b8d2: d10a bne.n 800b8ea <HAL_RCCEx_PeriphCLKConfig+0x15e>
{
/* Set the source of SAI1 clock*/
__HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
800b8d4: 4b7b ldr r3, [pc, #492] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b8d6: 6d1b ldr r3, [r3, #80] @ 0x50
800b8d8: f023 0107 bic.w r1, r3, #7
800b8dc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b8e0: 6d9b ldr r3, [r3, #88] @ 0x58
800b8e2: 4a78 ldr r2, [pc, #480] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b8e4: 430b orrs r3, r1
800b8e6: 6513 str r3, [r2, #80] @ 0x50
800b8e8: e003 b.n 800b8f2 <HAL_RCCEx_PeriphCLKConfig+0x166>
}
else
{
/* set overall return value */
status = ret;
800b8ea: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800b8ee: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
#if defined(SAI3)
/*---------------------------- SAI2/3 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI23) == RCC_PERIPHCLK_SAI23)
800b8f2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b8f6: e9d3 2300 ldrd r2, r3, [r3]
800b8fa: f402 7a00 and.w sl, r2, #512 @ 0x200
800b8fe: f04f 0b00 mov.w fp, #0
800b902: ea5a 030b orrs.w r3, sl, fp
800b906: d04c beq.n 800b9a2 <HAL_RCCEx_PeriphCLKConfig+0x216>
{
switch (PeriphClkInit->Sai23ClockSelection)
800b908: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b90c: 6ddb ldr r3, [r3, #92] @ 0x5c
800b90e: f5b3 7f80 cmp.w r3, #256 @ 0x100
800b912: d030 beq.n 800b976 <HAL_RCCEx_PeriphCLKConfig+0x1ea>
800b914: f5b3 7f80 cmp.w r3, #256 @ 0x100
800b918: d829 bhi.n 800b96e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
800b91a: 2bc0 cmp r3, #192 @ 0xc0
800b91c: d02d beq.n 800b97a <HAL_RCCEx_PeriphCLKConfig+0x1ee>
800b91e: 2bc0 cmp r3, #192 @ 0xc0
800b920: d825 bhi.n 800b96e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
800b922: 2b80 cmp r3, #128 @ 0x80
800b924: d018 beq.n 800b958 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
800b926: 2b80 cmp r3, #128 @ 0x80
800b928: d821 bhi.n 800b96e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
800b92a: 2b00 cmp r3, #0
800b92c: d002 beq.n 800b934 <HAL_RCCEx_PeriphCLKConfig+0x1a8>
800b92e: 2b40 cmp r3, #64 @ 0x40
800b930: d007 beq.n 800b942 <HAL_RCCEx_PeriphCLKConfig+0x1b6>
800b932: e01c b.n 800b96e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
{
case RCC_SAI23CLKSOURCE_PLL: /* PLL is used as clock source for SAI2/3 */
/* Enable SAI Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800b934: 4b63 ldr r3, [pc, #396] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b936: 6adb ldr r3, [r3, #44] @ 0x2c
800b938: 4a62 ldr r2, [pc, #392] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b93a: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800b93e: 62d3 str r3, [r2, #44] @ 0x2c
/* SAI2/3 clock source configuration done later after clock selection check */
break;
800b940: e01c b.n 800b97c <HAL_RCCEx_PeriphCLKConfig+0x1f0>
case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2/3 */
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800b942: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b946: 3308 adds r3, #8
800b948: 2100 movs r1, #0
800b94a: 4618 mov r0, r3
800b94c: f001 fbca bl 800d0e4 <RCCEx_PLL2_Config>
800b950: 4603 mov r3, r0
800b952: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SAI2/3 clock source configuration done later after clock selection check */
break;
800b956: e011 b.n 800b97c <HAL_RCCEx_PeriphCLKConfig+0x1f0>
case RCC_SAI23CLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2/3 */
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
800b958: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b95c: 3328 adds r3, #40 @ 0x28
800b95e: 2100 movs r1, #0
800b960: 4618 mov r0, r3
800b962: f001 fc71 bl 800d248 <RCCEx_PLL3_Config>
800b966: 4603 mov r3, r0
800b968: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SAI2/3 clock source configuration done later after clock selection check */
break;
800b96c: e006 b.n 800b97c <HAL_RCCEx_PeriphCLKConfig+0x1f0>
/* HSI, HSE, or CSI oscillator is used as source of SAI2/3 clock */
/* SAI2/3 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800b96e: 2301 movs r3, #1
800b970: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800b974: e002 b.n 800b97c <HAL_RCCEx_PeriphCLKConfig+0x1f0>
break;
800b976: bf00 nop
800b978: e000 b.n 800b97c <HAL_RCCEx_PeriphCLKConfig+0x1f0>
break;
800b97a: bf00 nop
}
if (ret == HAL_OK)
800b97c: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800b980: 2b00 cmp r3, #0
800b982: d10a bne.n 800b99a <HAL_RCCEx_PeriphCLKConfig+0x20e>
{
/* Set the source of SAI2/3 clock*/
__HAL_RCC_SAI23_CONFIG(PeriphClkInit->Sai23ClockSelection);
800b984: 4b4f ldr r3, [pc, #316] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b986: 6d1b ldr r3, [r3, #80] @ 0x50
800b988: f423 71e0 bic.w r1, r3, #448 @ 0x1c0
800b98c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b990: 6ddb ldr r3, [r3, #92] @ 0x5c
800b992: 4a4c ldr r2, [pc, #304] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b994: 430b orrs r3, r1
800b996: 6513 str r3, [r2, #80] @ 0x50
800b998: e003 b.n 800b9a2 <HAL_RCCEx_PeriphCLKConfig+0x216>
}
else
{
/* set overall return value */
status = ret;
800b99a: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800b99e: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
#endif /*SAI2B*/
#if defined(SAI4)
/*---------------------------- SAI4A configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4A) == RCC_PERIPHCLK_SAI4A)
800b9a2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b9a6: e9d3 2300 ldrd r2, r3, [r3]
800b9aa: f402 6380 and.w r3, r2, #1024 @ 0x400
800b9ae: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800b9b2: 2300 movs r3, #0
800b9b4: f8c7 3104 str.w r3, [r7, #260] @ 0x104
800b9b8: e9d7 1240 ldrd r1, r2, [r7, #256] @ 0x100
800b9bc: 460b mov r3, r1
800b9be: 4313 orrs r3, r2
800b9c0: d053 beq.n 800ba6a <HAL_RCCEx_PeriphCLKConfig+0x2de>
{
switch (PeriphClkInit->Sai4AClockSelection)
800b9c2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800b9c6: f8d3 30a8 ldr.w r3, [r3, #168] @ 0xa8
800b9ca: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000
800b9ce: d035 beq.n 800ba3c <HAL_RCCEx_PeriphCLKConfig+0x2b0>
800b9d0: f5b3 0f00 cmp.w r3, #8388608 @ 0x800000
800b9d4: d82e bhi.n 800ba34 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
800b9d6: f5b3 0fc0 cmp.w r3, #6291456 @ 0x600000
800b9da: d031 beq.n 800ba40 <HAL_RCCEx_PeriphCLKConfig+0x2b4>
800b9dc: f5b3 0fc0 cmp.w r3, #6291456 @ 0x600000
800b9e0: d828 bhi.n 800ba34 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
800b9e2: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
800b9e6: d01a beq.n 800ba1e <HAL_RCCEx_PeriphCLKConfig+0x292>
800b9e8: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
800b9ec: d822 bhi.n 800ba34 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
800b9ee: 2b00 cmp r3, #0
800b9f0: d003 beq.n 800b9fa <HAL_RCCEx_PeriphCLKConfig+0x26e>
800b9f2: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
800b9f6: d007 beq.n 800ba08 <HAL_RCCEx_PeriphCLKConfig+0x27c>
800b9f8: e01c b.n 800ba34 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
{
case RCC_SAI4ACLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/
/* Enable SAI Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800b9fa: 4b32 ldr r3, [pc, #200] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800b9fc: 6adb ldr r3, [r3, #44] @ 0x2c
800b9fe: 4a31 ldr r2, [pc, #196] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800ba00: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800ba04: 62d3 str r3, [r2, #44] @ 0x2c
/* SAI1 clock source configuration done later after clock selection check */
break;
800ba06: e01c b.n 800ba42 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
case RCC_SAI4ACLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800ba08: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ba0c: 3308 adds r3, #8
800ba0e: 2100 movs r1, #0
800ba10: 4618 mov r0, r3
800ba12: f001 fb67 bl 800d0e4 <RCCEx_PLL2_Config>
800ba16: 4603 mov r3, r0
800ba18: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SAI2 clock source configuration done later after clock selection check */
break;
800ba1c: e011 b.n 800ba42 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
case RCC_SAI4ACLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2*/
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
800ba1e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ba22: 3328 adds r3, #40 @ 0x28
800ba24: 2100 movs r1, #0
800ba26: 4618 mov r0, r3
800ba28: f001 fc0e bl 800d248 <RCCEx_PLL3_Config>
800ba2c: 4603 mov r3, r0
800ba2e: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SAI1 clock source configuration done later after clock selection check */
break;
800ba32: e006 b.n 800ba42 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
/* SAI4A clock source configuration done later after clock selection check */
break;
#endif /* RCC_VER_3_0 */
default:
ret = HAL_ERROR;
800ba34: 2301 movs r3, #1
800ba36: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800ba3a: e002 b.n 800ba42 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
break;
800ba3c: bf00 nop
800ba3e: e000 b.n 800ba42 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
break;
800ba40: bf00 nop
}
if (ret == HAL_OK)
800ba42: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800ba46: 2b00 cmp r3, #0
800ba48: d10b bne.n 800ba62 <HAL_RCCEx_PeriphCLKConfig+0x2d6>
{
/* Set the source of SAI4A clock*/
__HAL_RCC_SAI4A_CONFIG(PeriphClkInit->Sai4AClockSelection);
800ba4a: 4b1e ldr r3, [pc, #120] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800ba4c: 6d9b ldr r3, [r3, #88] @ 0x58
800ba4e: f423 0160 bic.w r1, r3, #14680064 @ 0xe00000
800ba52: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ba56: f8d3 30a8 ldr.w r3, [r3, #168] @ 0xa8
800ba5a: 4a1a ldr r2, [pc, #104] @ (800bac4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800ba5c: 430b orrs r3, r1
800ba5e: 6593 str r3, [r2, #88] @ 0x58
800ba60: e003 b.n 800ba6a <HAL_RCCEx_PeriphCLKConfig+0x2de>
}
else
{
/* set overall return value */
status = ret;
800ba62: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800ba66: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*---------------------------- SAI4B configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4B) == RCC_PERIPHCLK_SAI4B)
800ba6a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ba6e: e9d3 2300 ldrd r2, r3, [r3]
800ba72: f402 6300 and.w r3, r2, #2048 @ 0x800
800ba76: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ba7a: 2300 movs r3, #0
800ba7c: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ba80: e9d7 123e ldrd r1, r2, [r7, #248] @ 0xf8
800ba84: 460b mov r3, r1
800ba86: 4313 orrs r3, r2
800ba88: d056 beq.n 800bb38 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
{
switch (PeriphClkInit->Sai4BClockSelection)
800ba8a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ba8e: f8d3 30ac ldr.w r3, [r3, #172] @ 0xac
800ba92: f1b3 6f80 cmp.w r3, #67108864 @ 0x4000000
800ba96: d038 beq.n 800bb0a <HAL_RCCEx_PeriphCLKConfig+0x37e>
800ba98: f1b3 6f80 cmp.w r3, #67108864 @ 0x4000000
800ba9c: d831 bhi.n 800bb02 <HAL_RCCEx_PeriphCLKConfig+0x376>
800ba9e: f1b3 7f40 cmp.w r3, #50331648 @ 0x3000000
800baa2: d034 beq.n 800bb0e <HAL_RCCEx_PeriphCLKConfig+0x382>
800baa4: f1b3 7f40 cmp.w r3, #50331648 @ 0x3000000
800baa8: d82b bhi.n 800bb02 <HAL_RCCEx_PeriphCLKConfig+0x376>
800baaa: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
800baae: d01d beq.n 800baec <HAL_RCCEx_PeriphCLKConfig+0x360>
800bab0: f1b3 7f00 cmp.w r3, #33554432 @ 0x2000000
800bab4: d825 bhi.n 800bb02 <HAL_RCCEx_PeriphCLKConfig+0x376>
800bab6: 2b00 cmp r3, #0
800bab8: d006 beq.n 800bac8 <HAL_RCCEx_PeriphCLKConfig+0x33c>
800baba: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
800babe: d00a beq.n 800bad6 <HAL_RCCEx_PeriphCLKConfig+0x34a>
800bac0: e01f b.n 800bb02 <HAL_RCCEx_PeriphCLKConfig+0x376>
800bac2: bf00 nop
800bac4: 58024400 .word 0x58024400
{
case RCC_SAI4BCLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/
/* Enable SAI Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800bac8: 4ba2 ldr r3, [pc, #648] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800baca: 6adb ldr r3, [r3, #44] @ 0x2c
800bacc: 4aa1 ldr r2, [pc, #644] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bace: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800bad2: 62d3 str r3, [r2, #44] @ 0x2c
/* SAI1 clock source configuration done later after clock selection check */
break;
800bad4: e01c b.n 800bb10 <HAL_RCCEx_PeriphCLKConfig+0x384>
case RCC_SAI4BCLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800bad6: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bada: 3308 adds r3, #8
800badc: 2100 movs r1, #0
800bade: 4618 mov r0, r3
800bae0: f001 fb00 bl 800d0e4 <RCCEx_PLL2_Config>
800bae4: 4603 mov r3, r0
800bae6: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SAI2 clock source configuration done later after clock selection check */
break;
800baea: e011 b.n 800bb10 <HAL_RCCEx_PeriphCLKConfig+0x384>
case RCC_SAI4BCLKSOURCE_PLL3: /* PLL3 is used as clock source for SAI2*/
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
800baec: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800baf0: 3328 adds r3, #40 @ 0x28
800baf2: 2100 movs r1, #0
800baf4: 4618 mov r0, r3
800baf6: f001 fba7 bl 800d248 <RCCEx_PLL3_Config>
800bafa: 4603 mov r3, r0
800bafc: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SAI1 clock source configuration done later after clock selection check */
break;
800bb00: e006 b.n 800bb10 <HAL_RCCEx_PeriphCLKConfig+0x384>
/* SAI4B clock source configuration done later after clock selection check */
break;
#endif /* RCC_VER_3_0 */
default:
ret = HAL_ERROR;
800bb02: 2301 movs r3, #1
800bb04: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800bb08: e002 b.n 800bb10 <HAL_RCCEx_PeriphCLKConfig+0x384>
break;
800bb0a: bf00 nop
800bb0c: e000 b.n 800bb10 <HAL_RCCEx_PeriphCLKConfig+0x384>
break;
800bb0e: bf00 nop
}
if (ret == HAL_OK)
800bb10: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bb14: 2b00 cmp r3, #0
800bb16: d10b bne.n 800bb30 <HAL_RCCEx_PeriphCLKConfig+0x3a4>
{
/* Set the source of SAI4B clock*/
__HAL_RCC_SAI4B_CONFIG(PeriphClkInit->Sai4BClockSelection);
800bb18: 4b8e ldr r3, [pc, #568] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bb1a: 6d9b ldr r3, [r3, #88] @ 0x58
800bb1c: f023 61e0 bic.w r1, r3, #117440512 @ 0x7000000
800bb20: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bb24: f8d3 30ac ldr.w r3, [r3, #172] @ 0xac
800bb28: 4a8a ldr r2, [pc, #552] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bb2a: 430b orrs r3, r1
800bb2c: 6593 str r3, [r2, #88] @ 0x58
800bb2e: e003 b.n 800bb38 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
}
else
{
/* set overall return value */
status = ret;
800bb30: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bb34: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
#endif /*SAI4*/
#if defined(QUADSPI)
/*---------------------------- QSPI configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI)
800bb38: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bb3c: e9d3 2300 ldrd r2, r3, [r3]
800bb40: f002 7300 and.w r3, r2, #33554432 @ 0x2000000
800bb44: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800bb48: 2300 movs r3, #0
800bb4a: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800bb4e: e9d7 123c ldrd r1, r2, [r7, #240] @ 0xf0
800bb52: 460b mov r3, r1
800bb54: 4313 orrs r3, r2
800bb56: d03a beq.n 800bbce <HAL_RCCEx_PeriphCLKConfig+0x442>
{
switch (PeriphClkInit->QspiClockSelection)
800bb58: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bb5c: 6cdb ldr r3, [r3, #76] @ 0x4c
800bb5e: 2b30 cmp r3, #48 @ 0x30
800bb60: d01f beq.n 800bba2 <HAL_RCCEx_PeriphCLKConfig+0x416>
800bb62: 2b30 cmp r3, #48 @ 0x30
800bb64: d819 bhi.n 800bb9a <HAL_RCCEx_PeriphCLKConfig+0x40e>
800bb66: 2b20 cmp r3, #32
800bb68: d00c beq.n 800bb84 <HAL_RCCEx_PeriphCLKConfig+0x3f8>
800bb6a: 2b20 cmp r3, #32
800bb6c: d815 bhi.n 800bb9a <HAL_RCCEx_PeriphCLKConfig+0x40e>
800bb6e: 2b00 cmp r3, #0
800bb70: d019 beq.n 800bba6 <HAL_RCCEx_PeriphCLKConfig+0x41a>
800bb72: 2b10 cmp r3, #16
800bb74: d111 bne.n 800bb9a <HAL_RCCEx_PeriphCLKConfig+0x40e>
{
case RCC_QSPICLKSOURCE_PLL: /* PLL is used as clock source for QSPI*/
/* Enable QSPI Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800bb76: 4b77 ldr r3, [pc, #476] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bb78: 6adb ldr r3, [r3, #44] @ 0x2c
800bb7a: 4a76 ldr r2, [pc, #472] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bb7c: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800bb80: 62d3 str r3, [r2, #44] @ 0x2c
/* QSPI clock source configuration done later after clock selection check */
break;
800bb82: e011 b.n 800bba8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
case RCC_QSPICLKSOURCE_PLL2: /* PLL2 is used as clock source for QSPI*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
800bb84: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bb88: 3308 adds r3, #8
800bb8a: 2102 movs r1, #2
800bb8c: 4618 mov r0, r3
800bb8e: f001 faa9 bl 800d0e4 <RCCEx_PLL2_Config>
800bb92: 4603 mov r3, r0
800bb94: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* QSPI clock source configuration done later after clock selection check */
break;
800bb98: e006 b.n 800bba8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
case RCC_QSPICLKSOURCE_D1HCLK:
/* Domain1 HCLK clock selected as QSPI kernel peripheral clock */
break;
default:
ret = HAL_ERROR;
800bb9a: 2301 movs r3, #1
800bb9c: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800bba0: e002 b.n 800bba8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
break;
800bba2: bf00 nop
800bba4: e000 b.n 800bba8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
break;
800bba6: bf00 nop
}
if (ret == HAL_OK)
800bba8: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bbac: 2b00 cmp r3, #0
800bbae: d10a bne.n 800bbc6 <HAL_RCCEx_PeriphCLKConfig+0x43a>
{
/* Set the source of QSPI clock*/
__HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection);
800bbb0: 4b68 ldr r3, [pc, #416] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bbb2: 6cdb ldr r3, [r3, #76] @ 0x4c
800bbb4: f023 0130 bic.w r1, r3, #48 @ 0x30
800bbb8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bbbc: 6cdb ldr r3, [r3, #76] @ 0x4c
800bbbe: 4a65 ldr r2, [pc, #404] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bbc0: 430b orrs r3, r1
800bbc2: 64d3 str r3, [r2, #76] @ 0x4c
800bbc4: e003 b.n 800bbce <HAL_RCCEx_PeriphCLKConfig+0x442>
}
else
{
/* set overall return value */
status = ret;
800bbc6: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bbca: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
#endif /*OCTOSPI*/
/*---------------------------- SPI1/2/3 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI123) == RCC_PERIPHCLK_SPI123)
800bbce: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bbd2: e9d3 2300 ldrd r2, r3, [r3]
800bbd6: f402 5380 and.w r3, r2, #4096 @ 0x1000
800bbda: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800bbde: 2300 movs r3, #0
800bbe0: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800bbe4: e9d7 123a ldrd r1, r2, [r7, #232] @ 0xe8
800bbe8: 460b mov r3, r1
800bbea: 4313 orrs r3, r2
800bbec: d051 beq.n 800bc92 <HAL_RCCEx_PeriphCLKConfig+0x506>
{
switch (PeriphClkInit->Spi123ClockSelection)
800bbee: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bbf2: 6e1b ldr r3, [r3, #96] @ 0x60
800bbf4: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
800bbf8: d035 beq.n 800bc66 <HAL_RCCEx_PeriphCLKConfig+0x4da>
800bbfa: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
800bbfe: d82e bhi.n 800bc5e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
800bc00: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
800bc04: d031 beq.n 800bc6a <HAL_RCCEx_PeriphCLKConfig+0x4de>
800bc06: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
800bc0a: d828 bhi.n 800bc5e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
800bc0c: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800bc10: d01a beq.n 800bc48 <HAL_RCCEx_PeriphCLKConfig+0x4bc>
800bc12: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800bc16: d822 bhi.n 800bc5e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
800bc18: 2b00 cmp r3, #0
800bc1a: d003 beq.n 800bc24 <HAL_RCCEx_PeriphCLKConfig+0x498>
800bc1c: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800bc20: d007 beq.n 800bc32 <HAL_RCCEx_PeriphCLKConfig+0x4a6>
800bc22: e01c b.n 800bc5e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
{
case RCC_SPI123CLKSOURCE_PLL: /* PLL is used as clock source for SPI1/2/3 */
/* Enable SPI Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800bc24: 4b4b ldr r3, [pc, #300] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bc26: 6adb ldr r3, [r3, #44] @ 0x2c
800bc28: 4a4a ldr r2, [pc, #296] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bc2a: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800bc2e: 62d3 str r3, [r2, #44] @ 0x2c
/* SPI1/2/3 clock source configuration done later after clock selection check */
break;
800bc30: e01c b.n 800bc6c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI1/2/3 */
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800bc32: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bc36: 3308 adds r3, #8
800bc38: 2100 movs r1, #0
800bc3a: 4618 mov r0, r3
800bc3c: f001 fa52 bl 800d0e4 <RCCEx_PLL2_Config>
800bc40: 4603 mov r3, r0
800bc42: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SPI1/2/3 clock source configuration done later after clock selection check */
break;
800bc46: e011 b.n 800bc6c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
case RCC_SPI123CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI1/2/3 */
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
800bc48: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bc4c: 3328 adds r3, #40 @ 0x28
800bc4e: 2100 movs r1, #0
800bc50: 4618 mov r0, r3
800bc52: f001 faf9 bl 800d248 <RCCEx_PLL3_Config>
800bc56: 4603 mov r3, r0
800bc58: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SPI1/2/3 clock source configuration done later after clock selection check */
break;
800bc5c: e006 b.n 800bc6c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
/* HSI, HSE, or CSI oscillator is used as source of SPI1/2/3 clock */
/* SPI1/2/3 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800bc5e: 2301 movs r3, #1
800bc60: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800bc64: e002 b.n 800bc6c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
break;
800bc66: bf00 nop
800bc68: e000 b.n 800bc6c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
break;
800bc6a: bf00 nop
}
if (ret == HAL_OK)
800bc6c: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bc70: 2b00 cmp r3, #0
800bc72: d10a bne.n 800bc8a <HAL_RCCEx_PeriphCLKConfig+0x4fe>
{
/* Set the source of SPI1/2/3 clock*/
__HAL_RCC_SPI123_CONFIG(PeriphClkInit->Spi123ClockSelection);
800bc74: 4b37 ldr r3, [pc, #220] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bc76: 6d1b ldr r3, [r3, #80] @ 0x50
800bc78: f423 41e0 bic.w r1, r3, #28672 @ 0x7000
800bc7c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bc80: 6e1b ldr r3, [r3, #96] @ 0x60
800bc82: 4a34 ldr r2, [pc, #208] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bc84: 430b orrs r3, r1
800bc86: 6513 str r3, [r2, #80] @ 0x50
800bc88: e003 b.n 800bc92 <HAL_RCCEx_PeriphCLKConfig+0x506>
}
else
{
/* set overall return value */
status = ret;
800bc8a: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bc8e: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*---------------------------- SPI4/5 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI45) == RCC_PERIPHCLK_SPI45)
800bc92: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bc96: e9d3 2300 ldrd r2, r3, [r3]
800bc9a: f402 5300 and.w r3, r2, #8192 @ 0x2000
800bc9e: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800bca2: 2300 movs r3, #0
800bca4: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800bca8: e9d7 1238 ldrd r1, r2, [r7, #224] @ 0xe0
800bcac: 460b mov r3, r1
800bcae: 4313 orrs r3, r2
800bcb0: d056 beq.n 800bd60 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
{
switch (PeriphClkInit->Spi45ClockSelection)
800bcb2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bcb6: 6e5b ldr r3, [r3, #100] @ 0x64
800bcb8: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
800bcbc: d033 beq.n 800bd26 <HAL_RCCEx_PeriphCLKConfig+0x59a>
800bcbe: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
800bcc2: d82c bhi.n 800bd1e <HAL_RCCEx_PeriphCLKConfig+0x592>
800bcc4: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
800bcc8: d02f beq.n 800bd2a <HAL_RCCEx_PeriphCLKConfig+0x59e>
800bcca: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
800bcce: d826 bhi.n 800bd1e <HAL_RCCEx_PeriphCLKConfig+0x592>
800bcd0: f5b3 3f40 cmp.w r3, #196608 @ 0x30000
800bcd4: d02b beq.n 800bd2e <HAL_RCCEx_PeriphCLKConfig+0x5a2>
800bcd6: f5b3 3f40 cmp.w r3, #196608 @ 0x30000
800bcda: d820 bhi.n 800bd1e <HAL_RCCEx_PeriphCLKConfig+0x592>
800bcdc: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
800bce0: d012 beq.n 800bd08 <HAL_RCCEx_PeriphCLKConfig+0x57c>
800bce2: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
800bce6: d81a bhi.n 800bd1e <HAL_RCCEx_PeriphCLKConfig+0x592>
800bce8: 2b00 cmp r3, #0
800bcea: d022 beq.n 800bd32 <HAL_RCCEx_PeriphCLKConfig+0x5a6>
800bcec: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800bcf0: d115 bne.n 800bd1e <HAL_RCCEx_PeriphCLKConfig+0x592>
/* SPI4/5 clock source configuration done later after clock selection check */
break;
case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI4/5 */
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
800bcf2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bcf6: 3308 adds r3, #8
800bcf8: 2101 movs r1, #1
800bcfa: 4618 mov r0, r3
800bcfc: f001 f9f2 bl 800d0e4 <RCCEx_PLL2_Config>
800bd00: 4603 mov r3, r0
800bd02: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SPI4/5 clock source configuration done later after clock selection check */
break;
800bd06: e015 b.n 800bd34 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
case RCC_SPI45CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI4/5 */
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
800bd08: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bd0c: 3328 adds r3, #40 @ 0x28
800bd0e: 2101 movs r1, #1
800bd10: 4618 mov r0, r3
800bd12: f001 fa99 bl 800d248 <RCCEx_PLL3_Config>
800bd16: 4603 mov r3, r0
800bd18: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SPI4/5 clock source configuration done later after clock selection check */
break;
800bd1c: e00a b.n 800bd34 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
/* HSE, oscillator is used as source of SPI4/5 clock */
/* SPI4/5 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800bd1e: 2301 movs r3, #1
800bd20: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800bd24: e006 b.n 800bd34 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
break;
800bd26: bf00 nop
800bd28: e004 b.n 800bd34 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
break;
800bd2a: bf00 nop
800bd2c: e002 b.n 800bd34 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
break;
800bd2e: bf00 nop
800bd30: e000 b.n 800bd34 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
break;
800bd32: bf00 nop
}
if (ret == HAL_OK)
800bd34: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bd38: 2b00 cmp r3, #0
800bd3a: d10d bne.n 800bd58 <HAL_RCCEx_PeriphCLKConfig+0x5cc>
{
/* Set the source of SPI4/5 clock*/
__HAL_RCC_SPI45_CONFIG(PeriphClkInit->Spi45ClockSelection);
800bd3c: 4b05 ldr r3, [pc, #20] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bd3e: 6d1b ldr r3, [r3, #80] @ 0x50
800bd40: f423 21e0 bic.w r1, r3, #458752 @ 0x70000
800bd44: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bd48: 6e5b ldr r3, [r3, #100] @ 0x64
800bd4a: 4a02 ldr r2, [pc, #8] @ (800bd54 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
800bd4c: 430b orrs r3, r1
800bd4e: 6513 str r3, [r2, #80] @ 0x50
800bd50: e006 b.n 800bd60 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
800bd52: bf00 nop
800bd54: 58024400 .word 0x58024400
}
else
{
/* set overall return value */
status = ret;
800bd58: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bd5c: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*---------------------------- SPI6 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI6) == RCC_PERIPHCLK_SPI6)
800bd60: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bd64: e9d3 2300 ldrd r2, r3, [r3]
800bd68: f402 4380 and.w r3, r2, #16384 @ 0x4000
800bd6c: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bd70: 2300 movs r3, #0
800bd72: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bd76: e9d7 1236 ldrd r1, r2, [r7, #216] @ 0xd8
800bd7a: 460b mov r3, r1
800bd7c: 4313 orrs r3, r2
800bd7e: d055 beq.n 800be2c <HAL_RCCEx_PeriphCLKConfig+0x6a0>
{
switch (PeriphClkInit->Spi6ClockSelection)
800bd80: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bd84: f8d3 30b0 ldr.w r3, [r3, #176] @ 0xb0
800bd88: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
800bd8c: d033 beq.n 800bdf6 <HAL_RCCEx_PeriphCLKConfig+0x66a>
800bd8e: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
800bd92: d82c bhi.n 800bdee <HAL_RCCEx_PeriphCLKConfig+0x662>
800bd94: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800bd98: d02f beq.n 800bdfa <HAL_RCCEx_PeriphCLKConfig+0x66e>
800bd9a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800bd9e: d826 bhi.n 800bdee <HAL_RCCEx_PeriphCLKConfig+0x662>
800bda0: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
800bda4: d02b beq.n 800bdfe <HAL_RCCEx_PeriphCLKConfig+0x672>
800bda6: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
800bdaa: d820 bhi.n 800bdee <HAL_RCCEx_PeriphCLKConfig+0x662>
800bdac: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800bdb0: d012 beq.n 800bdd8 <HAL_RCCEx_PeriphCLKConfig+0x64c>
800bdb2: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800bdb6: d81a bhi.n 800bdee <HAL_RCCEx_PeriphCLKConfig+0x662>
800bdb8: 2b00 cmp r3, #0
800bdba: d022 beq.n 800be02 <HAL_RCCEx_PeriphCLKConfig+0x676>
800bdbc: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
800bdc0: d115 bne.n 800bdee <HAL_RCCEx_PeriphCLKConfig+0x662>
/* SPI6 clock source configuration done later after clock selection check */
break;
case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI6*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
800bdc2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bdc6: 3308 adds r3, #8
800bdc8: 2101 movs r1, #1
800bdca: 4618 mov r0, r3
800bdcc: f001 f98a bl 800d0e4 <RCCEx_PLL2_Config>
800bdd0: 4603 mov r3, r0
800bdd2: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SPI6 clock source configuration done later after clock selection check */
break;
800bdd6: e015 b.n 800be04 <HAL_RCCEx_PeriphCLKConfig+0x678>
case RCC_SPI6CLKSOURCE_PLL3: /* PLL3 is used as clock source for SPI6*/
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
800bdd8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bddc: 3328 adds r3, #40 @ 0x28
800bdde: 2101 movs r1, #1
800bde0: 4618 mov r0, r3
800bde2: f001 fa31 bl 800d248 <RCCEx_PLL3_Config>
800bde6: 4603 mov r3, r0
800bde8: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SPI6 clock source configuration done later after clock selection check */
break;
800bdec: e00a b.n 800be04 <HAL_RCCEx_PeriphCLKConfig+0x678>
/* SPI6 clock source configuration done later after clock selection check */
break;
#endif
default:
ret = HAL_ERROR;
800bdee: 2301 movs r3, #1
800bdf0: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800bdf4: e006 b.n 800be04 <HAL_RCCEx_PeriphCLKConfig+0x678>
break;
800bdf6: bf00 nop
800bdf8: e004 b.n 800be04 <HAL_RCCEx_PeriphCLKConfig+0x678>
break;
800bdfa: bf00 nop
800bdfc: e002 b.n 800be04 <HAL_RCCEx_PeriphCLKConfig+0x678>
break;
800bdfe: bf00 nop
800be00: e000 b.n 800be04 <HAL_RCCEx_PeriphCLKConfig+0x678>
break;
800be02: bf00 nop
}
if (ret == HAL_OK)
800be04: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800be08: 2b00 cmp r3, #0
800be0a: d10b bne.n 800be24 <HAL_RCCEx_PeriphCLKConfig+0x698>
{
/* Set the source of SPI6 clock*/
__HAL_RCC_SPI6_CONFIG(PeriphClkInit->Spi6ClockSelection);
800be0c: 4ba3 ldr r3, [pc, #652] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800be0e: 6d9b ldr r3, [r3, #88] @ 0x58
800be10: f023 41e0 bic.w r1, r3, #1879048192 @ 0x70000000
800be14: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800be18: f8d3 30b0 ldr.w r3, [r3, #176] @ 0xb0
800be1c: 4a9f ldr r2, [pc, #636] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800be1e: 430b orrs r3, r1
800be20: 6593 str r3, [r2, #88] @ 0x58
800be22: e003 b.n 800be2c <HAL_RCCEx_PeriphCLKConfig+0x6a0>
}
else
{
/* set overall return value */
status = ret;
800be24: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800be28: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
#endif /*DSI*/
#if defined(FDCAN1) || defined(FDCAN2)
/*---------------------------- FDCAN configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN)
800be2c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800be30: e9d3 2300 ldrd r2, r3, [r3]
800be34: f402 4300 and.w r3, r2, #32768 @ 0x8000
800be38: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800be3c: 2300 movs r3, #0
800be3e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800be42: e9d7 1234 ldrd r1, r2, [r7, #208] @ 0xd0
800be46: 460b mov r3, r1
800be48: 4313 orrs r3, r2
800be4a: d037 beq.n 800bebc <HAL_RCCEx_PeriphCLKConfig+0x730>
{
switch (PeriphClkInit->FdcanClockSelection)
800be4c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800be50: 6f1b ldr r3, [r3, #112] @ 0x70
800be52: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800be56: d00e beq.n 800be76 <HAL_RCCEx_PeriphCLKConfig+0x6ea>
800be58: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800be5c: d816 bhi.n 800be8c <HAL_RCCEx_PeriphCLKConfig+0x700>
800be5e: 2b00 cmp r3, #0
800be60: d018 beq.n 800be94 <HAL_RCCEx_PeriphCLKConfig+0x708>
800be62: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
800be66: d111 bne.n 800be8c <HAL_RCCEx_PeriphCLKConfig+0x700>
{
case RCC_FDCANCLKSOURCE_PLL: /* PLL is used as clock source for FDCAN*/
/* Enable FDCAN Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800be68: 4b8c ldr r3, [pc, #560] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800be6a: 6adb ldr r3, [r3, #44] @ 0x2c
800be6c: 4a8b ldr r2, [pc, #556] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800be6e: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800be72: 62d3 str r3, [r2, #44] @ 0x2c
/* FDCAN clock source configuration done later after clock selection check */
break;
800be74: e00f b.n 800be96 <HAL_RCCEx_PeriphCLKConfig+0x70a>
case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is used as clock source for FDCAN*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
800be76: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800be7a: 3308 adds r3, #8
800be7c: 2101 movs r1, #1
800be7e: 4618 mov r0, r3
800be80: f001 f930 bl 800d0e4 <RCCEx_PLL2_Config>
800be84: 4603 mov r3, r0
800be86: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* FDCAN clock source configuration done later after clock selection check */
break;
800be8a: e004 b.n 800be96 <HAL_RCCEx_PeriphCLKConfig+0x70a>
/* HSE is used as clock source for FDCAN*/
/* FDCAN clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800be8c: 2301 movs r3, #1
800be8e: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800be92: e000 b.n 800be96 <HAL_RCCEx_PeriphCLKConfig+0x70a>
break;
800be94: bf00 nop
}
if (ret == HAL_OK)
800be96: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800be9a: 2b00 cmp r3, #0
800be9c: d10a bne.n 800beb4 <HAL_RCCEx_PeriphCLKConfig+0x728>
{
/* Set the source of FDCAN clock*/
__HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection);
800be9e: 4b7f ldr r3, [pc, #508] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bea0: 6d1b ldr r3, [r3, #80] @ 0x50
800bea2: f023 5140 bic.w r1, r3, #805306368 @ 0x30000000
800bea6: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800beaa: 6f1b ldr r3, [r3, #112] @ 0x70
800beac: 4a7b ldr r2, [pc, #492] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800beae: 430b orrs r3, r1
800beb0: 6513 str r3, [r2, #80] @ 0x50
800beb2: e003 b.n 800bebc <HAL_RCCEx_PeriphCLKConfig+0x730>
}
else
{
/* set overall return value */
status = ret;
800beb4: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800beb8: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
#endif /*FDCAN1 || FDCAN2*/
/*---------------------------- FMC configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMC) == RCC_PERIPHCLK_FMC)
800bebc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bec0: e9d3 2300 ldrd r2, r3, [r3]
800bec4: f002 7380 and.w r3, r2, #16777216 @ 0x1000000
800bec8: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
800becc: 2300 movs r3, #0
800bece: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800bed2: e9d7 1232 ldrd r1, r2, [r7, #200] @ 0xc8
800bed6: 460b mov r3, r1
800bed8: 4313 orrs r3, r2
800beda: d039 beq.n 800bf50 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
{
switch (PeriphClkInit->FmcClockSelection)
800bedc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bee0: 6c9b ldr r3, [r3, #72] @ 0x48
800bee2: 2b03 cmp r3, #3
800bee4: d81c bhi.n 800bf20 <HAL_RCCEx_PeriphCLKConfig+0x794>
800bee6: a201 add r2, pc, #4 @ (adr r2, 800beec <HAL_RCCEx_PeriphCLKConfig+0x760>)
800bee8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800beec: 0800bf29 .word 0x0800bf29
800bef0: 0800befd .word 0x0800befd
800bef4: 0800bf0b .word 0x0800bf0b
800bef8: 0800bf29 .word 0x0800bf29
{
case RCC_FMCCLKSOURCE_PLL: /* PLL is used as clock source for FMC*/
/* Enable FMC Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800befc: 4b67 ldr r3, [pc, #412] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800befe: 6adb ldr r3, [r3, #44] @ 0x2c
800bf00: 4a66 ldr r2, [pc, #408] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bf02: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800bf06: 62d3 str r3, [r2, #44] @ 0x2c
/* FMC clock source configuration done later after clock selection check */
break;
800bf08: e00f b.n 800bf2a <HAL_RCCEx_PeriphCLKConfig+0x79e>
case RCC_FMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for FMC*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
800bf0a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bf0e: 3308 adds r3, #8
800bf10: 2102 movs r1, #2
800bf12: 4618 mov r0, r3
800bf14: f001 f8e6 bl 800d0e4 <RCCEx_PLL2_Config>
800bf18: 4603 mov r3, r0
800bf1a: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* FMC clock source configuration done later after clock selection check */
break;
800bf1e: e004 b.n 800bf2a <HAL_RCCEx_PeriphCLKConfig+0x79e>
case RCC_FMCCLKSOURCE_HCLK:
/* D1/CD HCLK clock selected as FMC kernel peripheral clock */
break;
default:
ret = HAL_ERROR;
800bf20: 2301 movs r3, #1
800bf22: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800bf26: e000 b.n 800bf2a <HAL_RCCEx_PeriphCLKConfig+0x79e>
break;
800bf28: bf00 nop
}
if (ret == HAL_OK)
800bf2a: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bf2e: 2b00 cmp r3, #0
800bf30: d10a bne.n 800bf48 <HAL_RCCEx_PeriphCLKConfig+0x7bc>
{
/* Set the source of FMC clock*/
__HAL_RCC_FMC_CONFIG(PeriphClkInit->FmcClockSelection);
800bf32: 4b5a ldr r3, [pc, #360] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bf34: 6cdb ldr r3, [r3, #76] @ 0x4c
800bf36: f023 0103 bic.w r1, r3, #3
800bf3a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bf3e: 6c9b ldr r3, [r3, #72] @ 0x48
800bf40: 4a56 ldr r2, [pc, #344] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bf42: 430b orrs r3, r1
800bf44: 64d3 str r3, [r2, #76] @ 0x4c
800bf46: e003 b.n 800bf50 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
}
else
{
/* set overall return value */
status = ret;
800bf48: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bf4c: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*---------------------------- RTC configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
800bf50: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bf54: e9d3 2300 ldrd r2, r3, [r3]
800bf58: f402 0380 and.w r3, r2, #4194304 @ 0x400000
800bf5c: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800bf60: 2300 movs r3, #0
800bf62: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800bf66: e9d7 1230 ldrd r1, r2, [r7, #192] @ 0xc0
800bf6a: 460b mov r3, r1
800bf6c: 4313 orrs r3, r2
800bf6e: f000 809f beq.w 800c0b0 <HAL_RCCEx_PeriphCLKConfig+0x924>
{
/* check for RTC Parameters used to output RTCCLK */
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* Enable write access to Backup domain */
SET_BIT(PWR->CR1, PWR_CR1_DBP);
800bf72: 4b4b ldr r3, [pc, #300] @ (800c0a0 <HAL_RCCEx_PeriphCLKConfig+0x914>)
800bf74: 681b ldr r3, [r3, #0]
800bf76: 4a4a ldr r2, [pc, #296] @ (800c0a0 <HAL_RCCEx_PeriphCLKConfig+0x914>)
800bf78: f443 7380 orr.w r3, r3, #256 @ 0x100
800bf7c: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800bf7e: f7f9 fd23 bl 80059c8 <HAL_GetTick>
800bf82: f8c7 0118 str.w r0, [r7, #280] @ 0x118
while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
800bf86: e00b b.n 800bfa0 <HAL_RCCEx_PeriphCLKConfig+0x814>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
800bf88: f7f9 fd1e bl 80059c8 <HAL_GetTick>
800bf8c: 4602 mov r2, r0
800bf8e: f8d7 3118 ldr.w r3, [r7, #280] @ 0x118
800bf92: 1ad3 subs r3, r2, r3
800bf94: 2b64 cmp r3, #100 @ 0x64
800bf96: d903 bls.n 800bfa0 <HAL_RCCEx_PeriphCLKConfig+0x814>
{
ret = HAL_TIMEOUT;
800bf98: 2303 movs r3, #3
800bf9a: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800bf9e: e005 b.n 800bfac <HAL_RCCEx_PeriphCLKConfig+0x820>
while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
800bfa0: 4b3f ldr r3, [pc, #252] @ (800c0a0 <HAL_RCCEx_PeriphCLKConfig+0x914>)
800bfa2: 681b ldr r3, [r3, #0]
800bfa4: f403 7380 and.w r3, r3, #256 @ 0x100
800bfa8: 2b00 cmp r3, #0
800bfaa: d0ed beq.n 800bf88 <HAL_RCCEx_PeriphCLKConfig+0x7fc>
}
}
if (ret == HAL_OK)
800bfac: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800bfb0: 2b00 cmp r3, #0
800bfb2: d179 bne.n 800c0a8 <HAL_RCCEx_PeriphCLKConfig+0x91c>
{
/* Reset the Backup domain only if the RTC Clock source selection is modified */
if ((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
800bfb4: 4b39 ldr r3, [pc, #228] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bfb6: 6f1a ldr r2, [r3, #112] @ 0x70
800bfb8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bfbc: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
800bfc0: 4053 eors r3, r2
800bfc2: f403 7340 and.w r3, r3, #768 @ 0x300
800bfc6: 2b00 cmp r3, #0
800bfc8: d015 beq.n 800bff6 <HAL_RCCEx_PeriphCLKConfig+0x86a>
{
/* Store the content of BDCR register before the reset of Backup Domain */
tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
800bfca: 4b34 ldr r3, [pc, #208] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bfcc: 6f1b ldr r3, [r3, #112] @ 0x70
800bfce: f423 7340 bic.w r3, r3, #768 @ 0x300
800bfd2: f8c7 3114 str.w r3, [r7, #276] @ 0x114
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
800bfd6: 4b31 ldr r3, [pc, #196] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bfd8: 6f1b ldr r3, [r3, #112] @ 0x70
800bfda: 4a30 ldr r2, [pc, #192] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bfdc: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800bfe0: 6713 str r3, [r2, #112] @ 0x70
__HAL_RCC_BACKUPRESET_RELEASE();
800bfe2: 4b2e ldr r3, [pc, #184] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bfe4: 6f1b ldr r3, [r3, #112] @ 0x70
800bfe6: 4a2d ldr r2, [pc, #180] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bfe8: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800bfec: 6713 str r3, [r2, #112] @ 0x70
/* Restore the Content of BDCR register */
RCC->BDCR = tmpreg;
800bfee: 4a2b ldr r2, [pc, #172] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800bff0: f8d7 3114 ldr.w r3, [r7, #276] @ 0x114
800bff4: 6713 str r3, [r2, #112] @ 0x70
}
/* If LSE is selected as RTC clock source (and enabled prior to Backup Domain reset), wait for LSE reactivation */
if (PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
800bff6: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800bffa: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
800bffe: f5b3 7f80 cmp.w r3, #256 @ 0x100
800c002: d118 bne.n 800c036 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
800c004: f7f9 fce0 bl 80059c8 <HAL_GetTick>
800c008: f8c7 0118 str.w r0, [r7, #280] @ 0x118
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
800c00c: e00d b.n 800c02a <HAL_RCCEx_PeriphCLKConfig+0x89e>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800c00e: f7f9 fcdb bl 80059c8 <HAL_GetTick>
800c012: 4602 mov r2, r0
800c014: f8d7 3118 ldr.w r3, [r7, #280] @ 0x118
800c018: 1ad2 subs r2, r2, r3
800c01a: f241 3388 movw r3, #5000 @ 0x1388
800c01e: 429a cmp r2, r3
800c020: d903 bls.n 800c02a <HAL_RCCEx_PeriphCLKConfig+0x89e>
{
ret = HAL_TIMEOUT;
800c022: 2303 movs r3, #3
800c024: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c028: e005 b.n 800c036 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
800c02a: 4b1c ldr r3, [pc, #112] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800c02c: 6f1b ldr r3, [r3, #112] @ 0x70
800c02e: f003 0302 and.w r3, r3, #2
800c032: 2b00 cmp r3, #0
800c034: d0eb beq.n 800c00e <HAL_RCCEx_PeriphCLKConfig+0x882>
}
}
}
if (ret == HAL_OK)
800c036: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c03a: 2b00 cmp r3, #0
800c03c: d129 bne.n 800c092 <HAL_RCCEx_PeriphCLKConfig+0x906>
{
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
800c03e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c042: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
800c046: f403 7340 and.w r3, r3, #768 @ 0x300
800c04a: f5b3 7f40 cmp.w r3, #768 @ 0x300
800c04e: d10e bne.n 800c06e <HAL_RCCEx_PeriphCLKConfig+0x8e2>
800c050: 4b12 ldr r3, [pc, #72] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800c052: 691b ldr r3, [r3, #16]
800c054: f423 517c bic.w r1, r3, #16128 @ 0x3f00
800c058: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c05c: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
800c060: 091a lsrs r2, r3, #4
800c062: 4b10 ldr r3, [pc, #64] @ (800c0a4 <HAL_RCCEx_PeriphCLKConfig+0x918>)
800c064: 4013 ands r3, r2
800c066: 4a0d ldr r2, [pc, #52] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800c068: 430b orrs r3, r1
800c06a: 6113 str r3, [r2, #16]
800c06c: e005 b.n 800c07a <HAL_RCCEx_PeriphCLKConfig+0x8ee>
800c06e: 4b0b ldr r3, [pc, #44] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800c070: 691b ldr r3, [r3, #16]
800c072: 4a0a ldr r2, [pc, #40] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800c074: f423 537c bic.w r3, r3, #16128 @ 0x3f00
800c078: 6113 str r3, [r2, #16]
800c07a: 4b08 ldr r3, [pc, #32] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800c07c: 6f19 ldr r1, [r3, #112] @ 0x70
800c07e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c082: f8d3 30b4 ldr.w r3, [r3, #180] @ 0xb4
800c086: f3c3 030b ubfx r3, r3, #0, #12
800c08a: 4a04 ldr r2, [pc, #16] @ (800c09c <HAL_RCCEx_PeriphCLKConfig+0x910>)
800c08c: 430b orrs r3, r1
800c08e: 6713 str r3, [r2, #112] @ 0x70
800c090: e00e b.n 800c0b0 <HAL_RCCEx_PeriphCLKConfig+0x924>
}
else
{
/* set overall return value */
status = ret;
800c092: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c096: f887 311e strb.w r3, [r7, #286] @ 0x11e
800c09a: e009 b.n 800c0b0 <HAL_RCCEx_PeriphCLKConfig+0x924>
800c09c: 58024400 .word 0x58024400
800c0a0: 58024800 .word 0x58024800
800c0a4: 00ffffcf .word 0x00ffffcf
}
}
else
{
/* set overall return value */
status = ret;
800c0a8: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c0ac: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*-------------------------- USART1/6 configuration --------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART16) == RCC_PERIPHCLK_USART16)
800c0b0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c0b4: e9d3 2300 ldrd r2, r3, [r3]
800c0b8: f002 0301 and.w r3, r2, #1
800c0bc: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
800c0c0: 2300 movs r3, #0
800c0c2: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800c0c6: e9d7 122e ldrd r1, r2, [r7, #184] @ 0xb8
800c0ca: 460b mov r3, r1
800c0cc: 4313 orrs r3, r2
800c0ce: f000 8089 beq.w 800c1e4 <HAL_RCCEx_PeriphCLKConfig+0xa58>
{
switch (PeriphClkInit->Usart16ClockSelection)
800c0d2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c0d6: 6fdb ldr r3, [r3, #124] @ 0x7c
800c0d8: 2b28 cmp r3, #40 @ 0x28
800c0da: d86b bhi.n 800c1b4 <HAL_RCCEx_PeriphCLKConfig+0xa28>
800c0dc: a201 add r2, pc, #4 @ (adr r2, 800c0e4 <HAL_RCCEx_PeriphCLKConfig+0x958>)
800c0de: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c0e2: bf00 nop
800c0e4: 0800c1bd .word 0x0800c1bd
800c0e8: 0800c1b5 .word 0x0800c1b5
800c0ec: 0800c1b5 .word 0x0800c1b5
800c0f0: 0800c1b5 .word 0x0800c1b5
800c0f4: 0800c1b5 .word 0x0800c1b5
800c0f8: 0800c1b5 .word 0x0800c1b5
800c0fc: 0800c1b5 .word 0x0800c1b5
800c100: 0800c1b5 .word 0x0800c1b5
800c104: 0800c189 .word 0x0800c189
800c108: 0800c1b5 .word 0x0800c1b5
800c10c: 0800c1b5 .word 0x0800c1b5
800c110: 0800c1b5 .word 0x0800c1b5
800c114: 0800c1b5 .word 0x0800c1b5
800c118: 0800c1b5 .word 0x0800c1b5
800c11c: 0800c1b5 .word 0x0800c1b5
800c120: 0800c1b5 .word 0x0800c1b5
800c124: 0800c19f .word 0x0800c19f
800c128: 0800c1b5 .word 0x0800c1b5
800c12c: 0800c1b5 .word 0x0800c1b5
800c130: 0800c1b5 .word 0x0800c1b5
800c134: 0800c1b5 .word 0x0800c1b5
800c138: 0800c1b5 .word 0x0800c1b5
800c13c: 0800c1b5 .word 0x0800c1b5
800c140: 0800c1b5 .word 0x0800c1b5
800c144: 0800c1bd .word 0x0800c1bd
800c148: 0800c1b5 .word 0x0800c1b5
800c14c: 0800c1b5 .word 0x0800c1b5
800c150: 0800c1b5 .word 0x0800c1b5
800c154: 0800c1b5 .word 0x0800c1b5
800c158: 0800c1b5 .word 0x0800c1b5
800c15c: 0800c1b5 .word 0x0800c1b5
800c160: 0800c1b5 .word 0x0800c1b5
800c164: 0800c1bd .word 0x0800c1bd
800c168: 0800c1b5 .word 0x0800c1b5
800c16c: 0800c1b5 .word 0x0800c1b5
800c170: 0800c1b5 .word 0x0800c1b5
800c174: 0800c1b5 .word 0x0800c1b5
800c178: 0800c1b5 .word 0x0800c1b5
800c17c: 0800c1b5 .word 0x0800c1b5
800c180: 0800c1b5 .word 0x0800c1b5
800c184: 0800c1bd .word 0x0800c1bd
case RCC_USART16CLKSOURCE_PCLK2: /* CD/D2 PCLK2 as clock source for USART1/6 */
/* USART1/6 clock source configuration done later after clock selection check */
break;
case RCC_USART16CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART1/6 */
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
800c188: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c18c: 3308 adds r3, #8
800c18e: 2101 movs r1, #1
800c190: 4618 mov r0, r3
800c192: f000 ffa7 bl 800d0e4 <RCCEx_PLL2_Config>
800c196: 4603 mov r3, r0
800c198: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* USART1/6 clock source configuration done later after clock selection check */
break;
800c19c: e00f b.n 800c1be <HAL_RCCEx_PeriphCLKConfig+0xa32>
case RCC_USART16CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART1/6 */
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
800c19e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c1a2: 3328 adds r3, #40 @ 0x28
800c1a4: 2101 movs r1, #1
800c1a6: 4618 mov r0, r3
800c1a8: f001 f84e bl 800d248 <RCCEx_PLL3_Config>
800c1ac: 4603 mov r3, r0
800c1ae: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* USART1/6 clock source configuration done later after clock selection check */
break;
800c1b2: e004 b.n 800c1be <HAL_RCCEx_PeriphCLKConfig+0xa32>
/* LSE, oscillator is used as source of USART1/6 clock */
/* USART1/6 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800c1b4: 2301 movs r3, #1
800c1b6: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c1ba: e000 b.n 800c1be <HAL_RCCEx_PeriphCLKConfig+0xa32>
break;
800c1bc: bf00 nop
}
if (ret == HAL_OK)
800c1be: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c1c2: 2b00 cmp r3, #0
800c1c4: d10a bne.n 800c1dc <HAL_RCCEx_PeriphCLKConfig+0xa50>
{
/* Set the source of USART1/6 clock */
__HAL_RCC_USART16_CONFIG(PeriphClkInit->Usart16ClockSelection);
800c1c6: 4bbf ldr r3, [pc, #764] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c1c8: 6d5b ldr r3, [r3, #84] @ 0x54
800c1ca: f023 0138 bic.w r1, r3, #56 @ 0x38
800c1ce: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c1d2: 6fdb ldr r3, [r3, #124] @ 0x7c
800c1d4: 4abb ldr r2, [pc, #748] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c1d6: 430b orrs r3, r1
800c1d8: 6553 str r3, [r2, #84] @ 0x54
800c1da: e003 b.n 800c1e4 <HAL_RCCEx_PeriphCLKConfig+0xa58>
}
else
{
/* set overall return value */
status = ret;
800c1dc: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c1e0: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*-------------------------- USART2/3/4/5/7/8 Configuration --------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART234578) == RCC_PERIPHCLK_USART234578)
800c1e4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c1e8: e9d3 2300 ldrd r2, r3, [r3]
800c1ec: f002 0302 and.w r3, r2, #2
800c1f0: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
800c1f4: 2300 movs r3, #0
800c1f6: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800c1fa: e9d7 122c ldrd r1, r2, [r7, #176] @ 0xb0
800c1fe: 460b mov r3, r1
800c200: 4313 orrs r3, r2
800c202: d041 beq.n 800c288 <HAL_RCCEx_PeriphCLKConfig+0xafc>
{
switch (PeriphClkInit->Usart234578ClockSelection)
800c204: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c208: 6f9b ldr r3, [r3, #120] @ 0x78
800c20a: 2b05 cmp r3, #5
800c20c: d824 bhi.n 800c258 <HAL_RCCEx_PeriphCLKConfig+0xacc>
800c20e: a201 add r2, pc, #4 @ (adr r2, 800c214 <HAL_RCCEx_PeriphCLKConfig+0xa88>)
800c210: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c214: 0800c261 .word 0x0800c261
800c218: 0800c22d .word 0x0800c22d
800c21c: 0800c243 .word 0x0800c243
800c220: 0800c261 .word 0x0800c261
800c224: 0800c261 .word 0x0800c261
800c228: 0800c261 .word 0x0800c261
case RCC_USART234578CLKSOURCE_PCLK1: /* CD/D2 PCLK1 as clock source for USART2/3/4/5/7/8 */
/* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
break;
case RCC_USART234578CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART2/3/4/5/7/8 */
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
800c22c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c230: 3308 adds r3, #8
800c232: 2101 movs r1, #1
800c234: 4618 mov r0, r3
800c236: f000 ff55 bl 800d0e4 <RCCEx_PLL2_Config>
800c23a: 4603 mov r3, r0
800c23c: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
break;
800c240: e00f b.n 800c262 <HAL_RCCEx_PeriphCLKConfig+0xad6>
case RCC_USART234578CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART2/3/4/5/7/8 */
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
800c242: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c246: 3328 adds r3, #40 @ 0x28
800c248: 2101 movs r1, #1
800c24a: 4618 mov r0, r3
800c24c: f000 fffc bl 800d248 <RCCEx_PLL3_Config>
800c250: 4603 mov r3, r0
800c252: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
break;
800c256: e004 b.n 800c262 <HAL_RCCEx_PeriphCLKConfig+0xad6>
/* LSE, oscillator is used as source of USART2/3/4/5/7/8 clock */
/* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800c258: 2301 movs r3, #1
800c25a: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c25e: e000 b.n 800c262 <HAL_RCCEx_PeriphCLKConfig+0xad6>
break;
800c260: bf00 nop
}
if (ret == HAL_OK)
800c262: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c266: 2b00 cmp r3, #0
800c268: d10a bne.n 800c280 <HAL_RCCEx_PeriphCLKConfig+0xaf4>
{
/* Set the source of USART2/3/4/5/7/8 clock */
__HAL_RCC_USART234578_CONFIG(PeriphClkInit->Usart234578ClockSelection);
800c26a: 4b96 ldr r3, [pc, #600] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c26c: 6d5b ldr r3, [r3, #84] @ 0x54
800c26e: f023 0107 bic.w r1, r3, #7
800c272: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c276: 6f9b ldr r3, [r3, #120] @ 0x78
800c278: 4a92 ldr r2, [pc, #584] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c27a: 430b orrs r3, r1
800c27c: 6553 str r3, [r2, #84] @ 0x54
800c27e: e003 b.n 800c288 <HAL_RCCEx_PeriphCLKConfig+0xafc>
}
else
{
/* set overall return value */
status = ret;
800c280: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c284: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*-------------------------- LPUART1 Configuration -------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
800c288: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c28c: e9d3 2300 ldrd r2, r3, [r3]
800c290: f002 0304 and.w r3, r2, #4
800c294: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
800c298: 2300 movs r3, #0
800c29a: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800c29e: e9d7 122a ldrd r1, r2, [r7, #168] @ 0xa8
800c2a2: 460b mov r3, r1
800c2a4: 4313 orrs r3, r2
800c2a6: d044 beq.n 800c332 <HAL_RCCEx_PeriphCLKConfig+0xba6>
{
switch (PeriphClkInit->Lpuart1ClockSelection)
800c2a8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c2ac: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
800c2b0: 2b05 cmp r3, #5
800c2b2: d825 bhi.n 800c300 <HAL_RCCEx_PeriphCLKConfig+0xb74>
800c2b4: a201 add r2, pc, #4 @ (adr r2, 800c2bc <HAL_RCCEx_PeriphCLKConfig+0xb30>)
800c2b6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c2ba: bf00 nop
800c2bc: 0800c309 .word 0x0800c309
800c2c0: 0800c2d5 .word 0x0800c2d5
800c2c4: 0800c2eb .word 0x0800c2eb
800c2c8: 0800c309 .word 0x0800c309
800c2cc: 0800c309 .word 0x0800c309
800c2d0: 0800c309 .word 0x0800c309
case RCC_LPUART1CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPUART1 */
/* LPUART1 clock source configuration done later after clock selection check */
break;
case RCC_LPUART1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPUART1 */
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
800c2d4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c2d8: 3308 adds r3, #8
800c2da: 2101 movs r1, #1
800c2dc: 4618 mov r0, r3
800c2de: f000 ff01 bl 800d0e4 <RCCEx_PLL2_Config>
800c2e2: 4603 mov r3, r0
800c2e4: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* LPUART1 clock source configuration done later after clock selection check */
break;
800c2e8: e00f b.n 800c30a <HAL_RCCEx_PeriphCLKConfig+0xb7e>
case RCC_LPUART1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPUART1 */
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
800c2ea: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c2ee: 3328 adds r3, #40 @ 0x28
800c2f0: 2101 movs r1, #1
800c2f2: 4618 mov r0, r3
800c2f4: f000 ffa8 bl 800d248 <RCCEx_PLL3_Config>
800c2f8: 4603 mov r3, r0
800c2fa: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* LPUART1 clock source configuration done later after clock selection check */
break;
800c2fe: e004 b.n 800c30a <HAL_RCCEx_PeriphCLKConfig+0xb7e>
/* LSE, oscillator is used as source of LPUART1 clock */
/* LPUART1 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800c300: 2301 movs r3, #1
800c302: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c306: e000 b.n 800c30a <HAL_RCCEx_PeriphCLKConfig+0xb7e>
break;
800c308: bf00 nop
}
if (ret == HAL_OK)
800c30a: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c30e: 2b00 cmp r3, #0
800c310: d10b bne.n 800c32a <HAL_RCCEx_PeriphCLKConfig+0xb9e>
{
/* Set the source of LPUART1 clock */
__HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
800c312: 4b6c ldr r3, [pc, #432] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c314: 6d9b ldr r3, [r3, #88] @ 0x58
800c316: f023 0107 bic.w r1, r3, #7
800c31a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c31e: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
800c322: 4a68 ldr r2, [pc, #416] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c324: 430b orrs r3, r1
800c326: 6593 str r3, [r2, #88] @ 0x58
800c328: e003 b.n 800c332 <HAL_RCCEx_PeriphCLKConfig+0xba6>
}
else
{
/* set overall return value */
status = ret;
800c32a: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c32e: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*---------------------------- LPTIM1 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
800c332: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c336: e9d3 2300 ldrd r2, r3, [r3]
800c33a: f002 0320 and.w r3, r2, #32
800c33e: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
800c342: 2300 movs r3, #0
800c344: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800c348: e9d7 1228 ldrd r1, r2, [r7, #160] @ 0xa0
800c34c: 460b mov r3, r1
800c34e: 4313 orrs r3, r2
800c350: d055 beq.n 800c3fe <HAL_RCCEx_PeriphCLKConfig+0xc72>
{
switch (PeriphClkInit->Lptim1ClockSelection)
800c352: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c356: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800c35a: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
800c35e: d033 beq.n 800c3c8 <HAL_RCCEx_PeriphCLKConfig+0xc3c>
800c360: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
800c364: d82c bhi.n 800c3c0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
800c366: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800c36a: d02f beq.n 800c3cc <HAL_RCCEx_PeriphCLKConfig+0xc40>
800c36c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800c370: d826 bhi.n 800c3c0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
800c372: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
800c376: d02b beq.n 800c3d0 <HAL_RCCEx_PeriphCLKConfig+0xc44>
800c378: f1b3 5f40 cmp.w r3, #805306368 @ 0x30000000
800c37c: d820 bhi.n 800c3c0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
800c37e: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800c382: d012 beq.n 800c3aa <HAL_RCCEx_PeriphCLKConfig+0xc1e>
800c384: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800c388: d81a bhi.n 800c3c0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
800c38a: 2b00 cmp r3, #0
800c38c: d022 beq.n 800c3d4 <HAL_RCCEx_PeriphCLKConfig+0xc48>
800c38e: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
800c392: d115 bne.n 800c3c0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
/* LPTIM1 clock source configuration done later after clock selection check */
break;
case RCC_LPTIM1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM1*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800c394: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c398: 3308 adds r3, #8
800c39a: 2100 movs r1, #0
800c39c: 4618 mov r0, r3
800c39e: f000 fea1 bl 800d0e4 <RCCEx_PLL2_Config>
800c3a2: 4603 mov r3, r0
800c3a4: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* LPTIM1 clock source configuration done later after clock selection check */
break;
800c3a8: e015 b.n 800c3d6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
case RCC_LPTIM1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM1*/
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
800c3aa: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c3ae: 3328 adds r3, #40 @ 0x28
800c3b0: 2102 movs r1, #2
800c3b2: 4618 mov r0, r3
800c3b4: f000 ff48 bl 800d248 <RCCEx_PLL3_Config>
800c3b8: 4603 mov r3, r0
800c3ba: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* LPTIM1 clock source configuration done later after clock selection check */
break;
800c3be: e00a b.n 800c3d6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
/* HSI, HSE, or CSI oscillator is used as source of LPTIM1 clock */
/* LPTIM1 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800c3c0: 2301 movs r3, #1
800c3c2: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c3c6: e006 b.n 800c3d6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
break;
800c3c8: bf00 nop
800c3ca: e004 b.n 800c3d6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
break;
800c3cc: bf00 nop
800c3ce: e002 b.n 800c3d6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
break;
800c3d0: bf00 nop
800c3d2: e000 b.n 800c3d6 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
break;
800c3d4: bf00 nop
}
if (ret == HAL_OK)
800c3d6: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c3da: 2b00 cmp r3, #0
800c3dc: d10b bne.n 800c3f6 <HAL_RCCEx_PeriphCLKConfig+0xc6a>
{
/* Set the source of LPTIM1 clock*/
__HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
800c3de: 4b39 ldr r3, [pc, #228] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c3e0: 6d5b ldr r3, [r3, #84] @ 0x54
800c3e2: f023 41e0 bic.w r1, r3, #1879048192 @ 0x70000000
800c3e6: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c3ea: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800c3ee: 4a35 ldr r2, [pc, #212] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c3f0: 430b orrs r3, r1
800c3f2: 6553 str r3, [r2, #84] @ 0x54
800c3f4: e003 b.n 800c3fe <HAL_RCCEx_PeriphCLKConfig+0xc72>
}
else
{
/* set overall return value */
status = ret;
800c3f6: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c3fa: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*---------------------------- LPTIM2 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2)
800c3fe: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c402: e9d3 2300 ldrd r2, r3, [r3]
800c406: f002 0340 and.w r3, r2, #64 @ 0x40
800c40a: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800c40e: 2300 movs r3, #0
800c410: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800c414: e9d7 1226 ldrd r1, r2, [r7, #152] @ 0x98
800c418: 460b mov r3, r1
800c41a: 4313 orrs r3, r2
800c41c: d058 beq.n 800c4d0 <HAL_RCCEx_PeriphCLKConfig+0xd44>
{
switch (PeriphClkInit->Lptim2ClockSelection)
800c41e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c422: f8d3 309c ldr.w r3, [r3, #156] @ 0x9c
800c426: f5b3 5fa0 cmp.w r3, #5120 @ 0x1400
800c42a: d033 beq.n 800c494 <HAL_RCCEx_PeriphCLKConfig+0xd08>
800c42c: f5b3 5fa0 cmp.w r3, #5120 @ 0x1400
800c430: d82c bhi.n 800c48c <HAL_RCCEx_PeriphCLKConfig+0xd00>
800c432: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800c436: d02f beq.n 800c498 <HAL_RCCEx_PeriphCLKConfig+0xd0c>
800c438: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800c43c: d826 bhi.n 800c48c <HAL_RCCEx_PeriphCLKConfig+0xd00>
800c43e: f5b3 6f40 cmp.w r3, #3072 @ 0xc00
800c442: d02b beq.n 800c49c <HAL_RCCEx_PeriphCLKConfig+0xd10>
800c444: f5b3 6f40 cmp.w r3, #3072 @ 0xc00
800c448: d820 bhi.n 800c48c <HAL_RCCEx_PeriphCLKConfig+0xd00>
800c44a: f5b3 6f00 cmp.w r3, #2048 @ 0x800
800c44e: d012 beq.n 800c476 <HAL_RCCEx_PeriphCLKConfig+0xcea>
800c450: f5b3 6f00 cmp.w r3, #2048 @ 0x800
800c454: d81a bhi.n 800c48c <HAL_RCCEx_PeriphCLKConfig+0xd00>
800c456: 2b00 cmp r3, #0
800c458: d022 beq.n 800c4a0 <HAL_RCCEx_PeriphCLKConfig+0xd14>
800c45a: f5b3 6f80 cmp.w r3, #1024 @ 0x400
800c45e: d115 bne.n 800c48c <HAL_RCCEx_PeriphCLKConfig+0xd00>
/* LPTIM2 clock source configuration done later after clock selection check */
break;
case RCC_LPTIM2CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM2*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800c460: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c464: 3308 adds r3, #8
800c466: 2100 movs r1, #0
800c468: 4618 mov r0, r3
800c46a: f000 fe3b bl 800d0e4 <RCCEx_PLL2_Config>
800c46e: 4603 mov r3, r0
800c470: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* LPTIM2 clock source configuration done later after clock selection check */
break;
800c474: e015 b.n 800c4a2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
case RCC_LPTIM2CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM2*/
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
800c476: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c47a: 3328 adds r3, #40 @ 0x28
800c47c: 2102 movs r1, #2
800c47e: 4618 mov r0, r3
800c480: f000 fee2 bl 800d248 <RCCEx_PLL3_Config>
800c484: 4603 mov r3, r0
800c486: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* LPTIM2 clock source configuration done later after clock selection check */
break;
800c48a: e00a b.n 800c4a2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
/* HSI, HSE, or CSI oscillator is used as source of LPTIM2 clock */
/* LPTIM2 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800c48c: 2301 movs r3, #1
800c48e: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c492: e006 b.n 800c4a2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
break;
800c494: bf00 nop
800c496: e004 b.n 800c4a2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
break;
800c498: bf00 nop
800c49a: e002 b.n 800c4a2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
break;
800c49c: bf00 nop
800c49e: e000 b.n 800c4a2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
break;
800c4a0: bf00 nop
}
if (ret == HAL_OK)
800c4a2: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c4a6: 2b00 cmp r3, #0
800c4a8: d10e bne.n 800c4c8 <HAL_RCCEx_PeriphCLKConfig+0xd3c>
{
/* Set the source of LPTIM2 clock*/
__HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection);
800c4aa: 4b06 ldr r3, [pc, #24] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c4ac: 6d9b ldr r3, [r3, #88] @ 0x58
800c4ae: f423 51e0 bic.w r1, r3, #7168 @ 0x1c00
800c4b2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c4b6: f8d3 309c ldr.w r3, [r3, #156] @ 0x9c
800c4ba: 4a02 ldr r2, [pc, #8] @ (800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
800c4bc: 430b orrs r3, r1
800c4be: 6593 str r3, [r2, #88] @ 0x58
800c4c0: e006 b.n 800c4d0 <HAL_RCCEx_PeriphCLKConfig+0xd44>
800c4c2: bf00 nop
800c4c4: 58024400 .word 0x58024400
}
else
{
/* set overall return value */
status = ret;
800c4c8: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c4cc: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*---------------------------- LPTIM345 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM345) == RCC_PERIPHCLK_LPTIM345)
800c4d0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c4d4: e9d3 2300 ldrd r2, r3, [r3]
800c4d8: f002 0380 and.w r3, r2, #128 @ 0x80
800c4dc: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800c4e0: 2300 movs r3, #0
800c4e2: f8c7 3094 str.w r3, [r7, #148] @ 0x94
800c4e6: e9d7 1224 ldrd r1, r2, [r7, #144] @ 0x90
800c4ea: 460b mov r3, r1
800c4ec: 4313 orrs r3, r2
800c4ee: d055 beq.n 800c59c <HAL_RCCEx_PeriphCLKConfig+0xe10>
{
switch (PeriphClkInit->Lptim345ClockSelection)
800c4f0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c4f4: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
800c4f8: f5b3 4f20 cmp.w r3, #40960 @ 0xa000
800c4fc: d033 beq.n 800c566 <HAL_RCCEx_PeriphCLKConfig+0xdda>
800c4fe: f5b3 4f20 cmp.w r3, #40960 @ 0xa000
800c502: d82c bhi.n 800c55e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
800c504: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
800c508: d02f beq.n 800c56a <HAL_RCCEx_PeriphCLKConfig+0xdde>
800c50a: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
800c50e: d826 bhi.n 800c55e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
800c510: f5b3 4fc0 cmp.w r3, #24576 @ 0x6000
800c514: d02b beq.n 800c56e <HAL_RCCEx_PeriphCLKConfig+0xde2>
800c516: f5b3 4fc0 cmp.w r3, #24576 @ 0x6000
800c51a: d820 bhi.n 800c55e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
800c51c: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
800c520: d012 beq.n 800c548 <HAL_RCCEx_PeriphCLKConfig+0xdbc>
800c522: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
800c526: d81a bhi.n 800c55e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
800c528: 2b00 cmp r3, #0
800c52a: d022 beq.n 800c572 <HAL_RCCEx_PeriphCLKConfig+0xde6>
800c52c: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800c530: d115 bne.n 800c55e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
case RCC_LPTIM345CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPTIM3/4/5 */
/* LPTIM3/4/5 clock source configuration done later after clock selection check */
break;
case RCC_LPTIM345CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM3/4/5 */
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800c532: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c536: 3308 adds r3, #8
800c538: 2100 movs r1, #0
800c53a: 4618 mov r0, r3
800c53c: f000 fdd2 bl 800d0e4 <RCCEx_PLL2_Config>
800c540: 4603 mov r3, r0
800c542: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* LPTIM3/4/5 clock source configuration done later after clock selection check */
break;
800c546: e015 b.n 800c574 <HAL_RCCEx_PeriphCLKConfig+0xde8>
case RCC_LPTIM345CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPTIM3/4/5 */
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
800c548: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c54c: 3328 adds r3, #40 @ 0x28
800c54e: 2102 movs r1, #2
800c550: 4618 mov r0, r3
800c552: f000 fe79 bl 800d248 <RCCEx_PLL3_Config>
800c556: 4603 mov r3, r0
800c558: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* LPTIM3/4/5 clock source configuration done later after clock selection check */
break;
800c55c: e00a b.n 800c574 <HAL_RCCEx_PeriphCLKConfig+0xde8>
/* HSI, HSE, or CSI oscillator is used as source of LPTIM3/4/5 clock */
/* LPTIM3/4/5 clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800c55e: 2301 movs r3, #1
800c560: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c564: e006 b.n 800c574 <HAL_RCCEx_PeriphCLKConfig+0xde8>
break;
800c566: bf00 nop
800c568: e004 b.n 800c574 <HAL_RCCEx_PeriphCLKConfig+0xde8>
break;
800c56a: bf00 nop
800c56c: e002 b.n 800c574 <HAL_RCCEx_PeriphCLKConfig+0xde8>
break;
800c56e: bf00 nop
800c570: e000 b.n 800c574 <HAL_RCCEx_PeriphCLKConfig+0xde8>
break;
800c572: bf00 nop
}
if (ret == HAL_OK)
800c574: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c578: 2b00 cmp r3, #0
800c57a: d10b bne.n 800c594 <HAL_RCCEx_PeriphCLKConfig+0xe08>
{
/* Set the source of LPTIM3/4/5 clock */
__HAL_RCC_LPTIM345_CONFIG(PeriphClkInit->Lptim345ClockSelection);
800c57c: 4bbb ldr r3, [pc, #748] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c57e: 6d9b ldr r3, [r3, #88] @ 0x58
800c580: f423 4160 bic.w r1, r3, #57344 @ 0xe000
800c584: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c588: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
800c58c: 4ab7 ldr r2, [pc, #732] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c58e: 430b orrs r3, r1
800c590: 6593 str r3, [r2, #88] @ 0x58
800c592: e003 b.n 800c59c <HAL_RCCEx_PeriphCLKConfig+0xe10>
}
else
{
/* set overall return value */
status = ret;
800c594: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c598: f887 311e strb.w r3, [r7, #286] @ 0x11e
__HAL_RCC_I2C1235_CONFIG(PeriphClkInit->I2c1235ClockSelection);
}
#else
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C123) == RCC_PERIPHCLK_I2C123)
800c59c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c5a0: e9d3 2300 ldrd r2, r3, [r3]
800c5a4: f002 0308 and.w r3, r2, #8
800c5a8: f8c7 3088 str.w r3, [r7, #136] @ 0x88
800c5ac: 2300 movs r3, #0
800c5ae: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800c5b2: e9d7 1222 ldrd r1, r2, [r7, #136] @ 0x88
800c5b6: 460b mov r3, r1
800c5b8: 4313 orrs r3, r2
800c5ba: d01e beq.n 800c5fa <HAL_RCCEx_PeriphCLKConfig+0xe6e>
{
/* Check the parameters */
assert_param(IS_RCC_I2C123CLKSOURCE(PeriphClkInit->I2c123ClockSelection));
if ((PeriphClkInit->I2c123ClockSelection) == RCC_I2C123CLKSOURCE_PLL3)
800c5bc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c5c0: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800c5c4: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800c5c8: d10c bne.n 800c5e4 <HAL_RCCEx_PeriphCLKConfig+0xe58>
{
if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
800c5ca: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c5ce: 3328 adds r3, #40 @ 0x28
800c5d0: 2102 movs r1, #2
800c5d2: 4618 mov r0, r3
800c5d4: f000 fe38 bl 800d248 <RCCEx_PLL3_Config>
800c5d8: 4603 mov r3, r0
800c5da: 2b00 cmp r3, #0
800c5dc: d002 beq.n 800c5e4 <HAL_RCCEx_PeriphCLKConfig+0xe58>
{
status = HAL_ERROR;
800c5de: 2301 movs r3, #1
800c5e0: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
__HAL_RCC_I2C123_CONFIG(PeriphClkInit->I2c123ClockSelection);
800c5e4: 4ba1 ldr r3, [pc, #644] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c5e6: 6d5b ldr r3, [r3, #84] @ 0x54
800c5e8: f423 5140 bic.w r1, r3, #12288 @ 0x3000
800c5ec: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c5f0: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
800c5f4: 4a9d ldr r2, [pc, #628] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c5f6: 430b orrs r3, r1
800c5f8: 6553 str r3, [r2, #84] @ 0x54
}
#endif /* I2C5 */
/*------------------------------ I2C4 Configuration ------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
800c5fa: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c5fe: e9d3 2300 ldrd r2, r3, [r3]
800c602: f002 0310 and.w r3, r2, #16
800c606: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800c60a: 2300 movs r3, #0
800c60c: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800c610: e9d7 1220 ldrd r1, r2, [r7, #128] @ 0x80
800c614: 460b mov r3, r1
800c616: 4313 orrs r3, r2
800c618: d01e beq.n 800c658 <HAL_RCCEx_PeriphCLKConfig+0xecc>
{
/* Check the parameters */
assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));
if ((PeriphClkInit->I2c4ClockSelection) == RCC_I2C4CLKSOURCE_PLL3)
800c61a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c61e: f8d3 3098 ldr.w r3, [r3, #152] @ 0x98
800c622: f5b3 7f80 cmp.w r3, #256 @ 0x100
800c626: d10c bne.n 800c642 <HAL_RCCEx_PeriphCLKConfig+0xeb6>
{
if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
800c628: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c62c: 3328 adds r3, #40 @ 0x28
800c62e: 2102 movs r1, #2
800c630: 4618 mov r0, r3
800c632: f000 fe09 bl 800d248 <RCCEx_PLL3_Config>
800c636: 4603 mov r3, r0
800c638: 2b00 cmp r3, #0
800c63a: d002 beq.n 800c642 <HAL_RCCEx_PeriphCLKConfig+0xeb6>
{
status = HAL_ERROR;
800c63c: 2301 movs r3, #1
800c63e: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
__HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
800c642: 4b8a ldr r3, [pc, #552] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c644: 6d9b ldr r3, [r3, #88] @ 0x58
800c646: f423 7140 bic.w r1, r3, #768 @ 0x300
800c64a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c64e: f8d3 3098 ldr.w r3, [r3, #152] @ 0x98
800c652: 4a86 ldr r2, [pc, #536] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c654: 430b orrs r3, r1
800c656: 6593 str r3, [r2, #88] @ 0x58
}
/*---------------------------- ADC configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
800c658: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c65c: e9d3 2300 ldrd r2, r3, [r3]
800c660: f402 2300 and.w r3, r2, #524288 @ 0x80000
800c664: 67bb str r3, [r7, #120] @ 0x78
800c666: 2300 movs r3, #0
800c668: 67fb str r3, [r7, #124] @ 0x7c
800c66a: e9d7 121e ldrd r1, r2, [r7, #120] @ 0x78
800c66e: 460b mov r3, r1
800c670: 4313 orrs r3, r2
800c672: d03e beq.n 800c6f2 <HAL_RCCEx_PeriphCLKConfig+0xf66>
{
switch (PeriphClkInit->AdcClockSelection)
800c674: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c678: f8d3 30a4 ldr.w r3, [r3, #164] @ 0xa4
800c67c: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
800c680: d022 beq.n 800c6c8 <HAL_RCCEx_PeriphCLKConfig+0xf3c>
800c682: f5b3 3f00 cmp.w r3, #131072 @ 0x20000
800c686: d81b bhi.n 800c6c0 <HAL_RCCEx_PeriphCLKConfig+0xf34>
800c688: 2b00 cmp r3, #0
800c68a: d003 beq.n 800c694 <HAL_RCCEx_PeriphCLKConfig+0xf08>
800c68c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800c690: d00b beq.n 800c6aa <HAL_RCCEx_PeriphCLKConfig+0xf1e>
800c692: e015 b.n 800c6c0 <HAL_RCCEx_PeriphCLKConfig+0xf34>
{
case RCC_ADCCLKSOURCE_PLL2: /* PLL2 is used as clock source for ADC*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800c694: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c698: 3308 adds r3, #8
800c69a: 2100 movs r1, #0
800c69c: 4618 mov r0, r3
800c69e: f000 fd21 bl 800d0e4 <RCCEx_PLL2_Config>
800c6a2: 4603 mov r3, r0
800c6a4: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* ADC clock source configuration done later after clock selection check */
break;
800c6a8: e00f b.n 800c6ca <HAL_RCCEx_PeriphCLKConfig+0xf3e>
case RCC_ADCCLKSOURCE_PLL3: /* PLL3 is used as clock source for ADC*/
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
800c6aa: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c6ae: 3328 adds r3, #40 @ 0x28
800c6b0: 2102 movs r1, #2
800c6b2: 4618 mov r0, r3
800c6b4: f000 fdc8 bl 800d248 <RCCEx_PLL3_Config>
800c6b8: 4603 mov r3, r0
800c6ba: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* ADC clock source configuration done later after clock selection check */
break;
800c6be: e004 b.n 800c6ca <HAL_RCCEx_PeriphCLKConfig+0xf3e>
/* HSI, HSE, or CSI oscillator is used as source of ADC clock */
/* ADC clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800c6c0: 2301 movs r3, #1
800c6c2: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c6c6: e000 b.n 800c6ca <HAL_RCCEx_PeriphCLKConfig+0xf3e>
break;
800c6c8: bf00 nop
}
if (ret == HAL_OK)
800c6ca: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c6ce: 2b00 cmp r3, #0
800c6d0: d10b bne.n 800c6ea <HAL_RCCEx_PeriphCLKConfig+0xf5e>
{
/* Set the source of ADC clock*/
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
800c6d2: 4b66 ldr r3, [pc, #408] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c6d4: 6d9b ldr r3, [r3, #88] @ 0x58
800c6d6: f423 3140 bic.w r1, r3, #196608 @ 0x30000
800c6da: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c6de: f8d3 30a4 ldr.w r3, [r3, #164] @ 0xa4
800c6e2: 4a62 ldr r2, [pc, #392] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c6e4: 430b orrs r3, r1
800c6e6: 6593 str r3, [r2, #88] @ 0x58
800c6e8: e003 b.n 800c6f2 <HAL_RCCEx_PeriphCLKConfig+0xf66>
}
else
{
/* set overall return value */
status = ret;
800c6ea: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c6ee: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*------------------------------ USB Configuration -------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
800c6f2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c6f6: e9d3 2300 ldrd r2, r3, [r3]
800c6fa: f402 2380 and.w r3, r2, #262144 @ 0x40000
800c6fe: 673b str r3, [r7, #112] @ 0x70
800c700: 2300 movs r3, #0
800c702: 677b str r3, [r7, #116] @ 0x74
800c704: e9d7 121c ldrd r1, r2, [r7, #112] @ 0x70
800c708: 460b mov r3, r1
800c70a: 4313 orrs r3, r2
800c70c: d03b beq.n 800c786 <HAL_RCCEx_PeriphCLKConfig+0xffa>
{
switch (PeriphClkInit->UsbClockSelection)
800c70e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c712: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800c716: f5b3 1f40 cmp.w r3, #3145728 @ 0x300000
800c71a: d01f beq.n 800c75c <HAL_RCCEx_PeriphCLKConfig+0xfd0>
800c71c: f5b3 1f40 cmp.w r3, #3145728 @ 0x300000
800c720: d818 bhi.n 800c754 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
800c722: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
800c726: d003 beq.n 800c730 <HAL_RCCEx_PeriphCLKConfig+0xfa4>
800c728: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
800c72c: d007 beq.n 800c73e <HAL_RCCEx_PeriphCLKConfig+0xfb2>
800c72e: e011 b.n 800c754 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
{
case RCC_USBCLKSOURCE_PLL: /* PLL is used as clock source for USB*/
/* Enable USB Clock output generated form System USB . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800c730: 4b4e ldr r3, [pc, #312] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c732: 6adb ldr r3, [r3, #44] @ 0x2c
800c734: 4a4d ldr r2, [pc, #308] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c736: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800c73a: 62d3 str r3, [r2, #44] @ 0x2c
/* USB clock source configuration done later after clock selection check */
break;
800c73c: e00f b.n 800c75e <HAL_RCCEx_PeriphCLKConfig+0xfd2>
case RCC_USBCLKSOURCE_PLL3: /* PLL3 is used as clock source for USB*/
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
800c73e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c742: 3328 adds r3, #40 @ 0x28
800c744: 2101 movs r1, #1
800c746: 4618 mov r0, r3
800c748: f000 fd7e bl 800d248 <RCCEx_PLL3_Config>
800c74c: 4603 mov r3, r0
800c74e: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* USB clock source configuration done later after clock selection check */
break;
800c752: e004 b.n 800c75e <HAL_RCCEx_PeriphCLKConfig+0xfd2>
/* HSI48 oscillator is used as source of USB clock */
/* USB clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800c754: 2301 movs r3, #1
800c756: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c75a: e000 b.n 800c75e <HAL_RCCEx_PeriphCLKConfig+0xfd2>
break;
800c75c: bf00 nop
}
if (ret == HAL_OK)
800c75e: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c762: 2b00 cmp r3, #0
800c764: d10b bne.n 800c77e <HAL_RCCEx_PeriphCLKConfig+0xff2>
{
/* Set the source of USB clock*/
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
800c766: 4b41 ldr r3, [pc, #260] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c768: 6d5b ldr r3, [r3, #84] @ 0x54
800c76a: f423 1140 bic.w r1, r3, #3145728 @ 0x300000
800c76e: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c772: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800c776: 4a3d ldr r2, [pc, #244] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c778: 430b orrs r3, r1
800c77a: 6553 str r3, [r2, #84] @ 0x54
800c77c: e003 b.n 800c786 <HAL_RCCEx_PeriphCLKConfig+0xffa>
}
else
{
/* set overall return value */
status = ret;
800c77e: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c782: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*------------------------------------- SDMMC Configuration ------------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC) == RCC_PERIPHCLK_SDMMC)
800c786: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c78a: e9d3 2300 ldrd r2, r3, [r3]
800c78e: f402 3380 and.w r3, r2, #65536 @ 0x10000
800c792: 66bb str r3, [r7, #104] @ 0x68
800c794: 2300 movs r3, #0
800c796: 66fb str r3, [r7, #108] @ 0x6c
800c798: e9d7 121a ldrd r1, r2, [r7, #104] @ 0x68
800c79c: 460b mov r3, r1
800c79e: 4313 orrs r3, r2
800c7a0: d031 beq.n 800c806 <HAL_RCCEx_PeriphCLKConfig+0x107a>
{
/* Check the parameters */
assert_param(IS_RCC_SDMMC(PeriphClkInit->SdmmcClockSelection));
switch (PeriphClkInit->SdmmcClockSelection)
800c7a2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c7a6: 6d1b ldr r3, [r3, #80] @ 0x50
800c7a8: 2b00 cmp r3, #0
800c7aa: d003 beq.n 800c7b4 <HAL_RCCEx_PeriphCLKConfig+0x1028>
800c7ac: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800c7b0: d007 beq.n 800c7c2 <HAL_RCCEx_PeriphCLKConfig+0x1036>
800c7b2: e011 b.n 800c7d8 <HAL_RCCEx_PeriphCLKConfig+0x104c>
{
case RCC_SDMMCCLKSOURCE_PLL: /* PLL is used as clock source for SDMMC*/
/* Enable SDMMC Clock output generated form System PLL . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800c7b4: 4b2d ldr r3, [pc, #180] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c7b6: 6adb ldr r3, [r3, #44] @ 0x2c
800c7b8: 4a2c ldr r2, [pc, #176] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c7ba: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800c7be: 62d3 str r3, [r2, #44] @ 0x2c
/* SDMMC clock source configuration done later after clock selection check */
break;
800c7c0: e00e b.n 800c7e0 <HAL_RCCEx_PeriphCLKConfig+0x1054>
case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for SDMMC*/
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
800c7c2: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c7c6: 3308 adds r3, #8
800c7c8: 2102 movs r1, #2
800c7ca: 4618 mov r0, r3
800c7cc: f000 fc8a bl 800d0e4 <RCCEx_PLL2_Config>
800c7d0: 4603 mov r3, r0
800c7d2: f887 311f strb.w r3, [r7, #287] @ 0x11f
/* SDMMC clock source configuration done later after clock selection check */
break;
800c7d6: e003 b.n 800c7e0 <HAL_RCCEx_PeriphCLKConfig+0x1054>
default:
ret = HAL_ERROR;
800c7d8: 2301 movs r3, #1
800c7da: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c7de: bf00 nop
}
if (ret == HAL_OK)
800c7e0: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c7e4: 2b00 cmp r3, #0
800c7e6: d10a bne.n 800c7fe <HAL_RCCEx_PeriphCLKConfig+0x1072>
{
/* Set the source of SDMMC clock*/
__HAL_RCC_SDMMC_CONFIG(PeriphClkInit->SdmmcClockSelection);
800c7e8: 4b20 ldr r3, [pc, #128] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c7ea: 6cdb ldr r3, [r3, #76] @ 0x4c
800c7ec: f423 3180 bic.w r1, r3, #65536 @ 0x10000
800c7f0: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c7f4: 6d1b ldr r3, [r3, #80] @ 0x50
800c7f6: 4a1d ldr r2, [pc, #116] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c7f8: 430b orrs r3, r1
800c7fa: 64d3 str r3, [r2, #76] @ 0x4c
800c7fc: e003 b.n 800c806 <HAL_RCCEx_PeriphCLKConfig+0x107a>
}
else
{
/* set overall return value */
status = ret;
800c7fe: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c802: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
#endif /* LTDC */
/*------------------------------ RNG Configuration -------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG)
800c806: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c80a: e9d3 2300 ldrd r2, r3, [r3]
800c80e: f402 3300 and.w r3, r2, #131072 @ 0x20000
800c812: 663b str r3, [r7, #96] @ 0x60
800c814: 2300 movs r3, #0
800c816: 667b str r3, [r7, #100] @ 0x64
800c818: e9d7 1218 ldrd r1, r2, [r7, #96] @ 0x60
800c81c: 460b mov r3, r1
800c81e: 4313 orrs r3, r2
800c820: d03b beq.n 800c89a <HAL_RCCEx_PeriphCLKConfig+0x110e>
{
switch (PeriphClkInit->RngClockSelection)
800c822: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c826: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800c82a: f5b3 7f40 cmp.w r3, #768 @ 0x300
800c82e: d018 beq.n 800c862 <HAL_RCCEx_PeriphCLKConfig+0x10d6>
800c830: f5b3 7f40 cmp.w r3, #768 @ 0x300
800c834: d811 bhi.n 800c85a <HAL_RCCEx_PeriphCLKConfig+0x10ce>
800c836: f5b3 7f00 cmp.w r3, #512 @ 0x200
800c83a: d014 beq.n 800c866 <HAL_RCCEx_PeriphCLKConfig+0x10da>
800c83c: f5b3 7f00 cmp.w r3, #512 @ 0x200
800c840: d80b bhi.n 800c85a <HAL_RCCEx_PeriphCLKConfig+0x10ce>
800c842: 2b00 cmp r3, #0
800c844: d014 beq.n 800c870 <HAL_RCCEx_PeriphCLKConfig+0x10e4>
800c846: f5b3 7f80 cmp.w r3, #256 @ 0x100
800c84a: d106 bne.n 800c85a <HAL_RCCEx_PeriphCLKConfig+0x10ce>
{
case RCC_RNGCLKSOURCE_PLL: /* PLL is used as clock source for RNG*/
/* Enable RNG Clock output generated form System RNG . */
__HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
800c84c: 4b07 ldr r3, [pc, #28] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c84e: 6adb ldr r3, [r3, #44] @ 0x2c
800c850: 4a06 ldr r2, [pc, #24] @ (800c86c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
800c852: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800c856: 62d3 str r3, [r2, #44] @ 0x2c
/* RNG clock source configuration done later after clock selection check */
break;
800c858: e00b b.n 800c872 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
/* HSI48 oscillator is used as source of RNG clock */
/* RNG clock source configuration done later after clock selection check */
break;
default:
ret = HAL_ERROR;
800c85a: 2301 movs r3, #1
800c85c: f887 311f strb.w r3, [r7, #287] @ 0x11f
break;
800c860: e007 b.n 800c872 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
break;
800c862: bf00 nop
800c864: e005 b.n 800c872 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
break;
800c866: bf00 nop
800c868: e003 b.n 800c872 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
800c86a: bf00 nop
800c86c: 58024400 .word 0x58024400
break;
800c870: bf00 nop
}
if (ret == HAL_OK)
800c872: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c876: 2b00 cmp r3, #0
800c878: d10b bne.n 800c892 <HAL_RCCEx_PeriphCLKConfig+0x1106>
{
/* Set the source of RNG clock*/
__HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection);
800c87a: 4bba ldr r3, [pc, #744] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c87c: 6d5b ldr r3, [r3, #84] @ 0x54
800c87e: f423 7140 bic.w r1, r3, #768 @ 0x300
800c882: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c886: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800c88a: 4ab6 ldr r2, [pc, #728] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c88c: 430b orrs r3, r1
800c88e: 6553 str r3, [r2, #84] @ 0x54
800c890: e003 b.n 800c89a <HAL_RCCEx_PeriphCLKConfig+0x110e>
}
else
{
/* set overall return value */
status = ret;
800c892: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c896: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*------------------------------ SWPMI1 Configuration ------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1)
800c89a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c89e: e9d3 2300 ldrd r2, r3, [r3]
800c8a2: f402 1380 and.w r3, r2, #1048576 @ 0x100000
800c8a6: 65bb str r3, [r7, #88] @ 0x58
800c8a8: 2300 movs r3, #0
800c8aa: 65fb str r3, [r7, #92] @ 0x5c
800c8ac: e9d7 1216 ldrd r1, r2, [r7, #88] @ 0x58
800c8b0: 460b mov r3, r1
800c8b2: 4313 orrs r3, r2
800c8b4: d009 beq.n 800c8ca <HAL_RCCEx_PeriphCLKConfig+0x113e>
{
/* Check the parameters */
assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection));
/* Configure the SWPMI1 interface clock source */
__HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection);
800c8b6: 4bab ldr r3, [pc, #684] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c8b8: 6d1b ldr r3, [r3, #80] @ 0x50
800c8ba: f023 4100 bic.w r1, r3, #2147483648 @ 0x80000000
800c8be: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c8c2: 6f5b ldr r3, [r3, #116] @ 0x74
800c8c4: 4aa7 ldr r2, [pc, #668] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c8c6: 430b orrs r3, r1
800c8c8: 6513 str r3, [r2, #80] @ 0x50
}
#if defined(HRTIM1)
/*------------------------------ HRTIM1 clock Configuration ----------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1)
800c8ca: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c8ce: e9d3 2300 ldrd r2, r3, [r3]
800c8d2: f002 5380 and.w r3, r2, #268435456 @ 0x10000000
800c8d6: 653b str r3, [r7, #80] @ 0x50
800c8d8: 2300 movs r3, #0
800c8da: 657b str r3, [r7, #84] @ 0x54
800c8dc: e9d7 1214 ldrd r1, r2, [r7, #80] @ 0x50
800c8e0: 460b mov r3, r1
800c8e2: 4313 orrs r3, r2
800c8e4: d00a beq.n 800c8fc <HAL_RCCEx_PeriphCLKConfig+0x1170>
{
/* Check the parameters */
assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection));
/* Configure the HRTIM1 clock source */
__HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection);
800c8e6: 4b9f ldr r3, [pc, #636] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c8e8: 691b ldr r3, [r3, #16]
800c8ea: f423 4180 bic.w r1, r3, #16384 @ 0x4000
800c8ee: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c8f2: f8d3 30b8 ldr.w r3, [r3, #184] @ 0xb8
800c8f6: 4a9b ldr r2, [pc, #620] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c8f8: 430b orrs r3, r1
800c8fa: 6113 str r3, [r2, #16]
}
#endif /*HRTIM1*/
/*------------------------------ DFSDM1 Configuration ------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
800c8fc: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c900: e9d3 2300 ldrd r2, r3, [r3]
800c904: f402 1300 and.w r3, r2, #2097152 @ 0x200000
800c908: 64bb str r3, [r7, #72] @ 0x48
800c90a: 2300 movs r3, #0
800c90c: 64fb str r3, [r7, #76] @ 0x4c
800c90e: e9d7 1212 ldrd r1, r2, [r7, #72] @ 0x48
800c912: 460b mov r3, r1
800c914: 4313 orrs r3, r2
800c916: d009 beq.n 800c92c <HAL_RCCEx_PeriphCLKConfig+0x11a0>
{
/* Check the parameters */
assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));
/* Configure the DFSDM1 interface clock source */
__HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
800c918: 4b92 ldr r3, [pc, #584] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c91a: 6d1b ldr r3, [r3, #80] @ 0x50
800c91c: f023 7180 bic.w r1, r3, #16777216 @ 0x1000000
800c920: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c924: 6edb ldr r3, [r3, #108] @ 0x6c
800c926: 4a8f ldr r2, [pc, #572] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c928: 430b orrs r3, r1
800c92a: 6513 str r3, [r2, #80] @ 0x50
__HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
}
#endif /* DFSDM2 */
/*------------------------------------ TIM configuration --------------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == RCC_PERIPHCLK_TIM)
800c92c: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c930: e9d3 2300 ldrd r2, r3, [r3]
800c934: f002 4380 and.w r3, r2, #1073741824 @ 0x40000000
800c938: 643b str r3, [r7, #64] @ 0x40
800c93a: 2300 movs r3, #0
800c93c: 647b str r3, [r7, #68] @ 0x44
800c93e: e9d7 1210 ldrd r1, r2, [r7, #64] @ 0x40
800c942: 460b mov r3, r1
800c944: 4313 orrs r3, r2
800c946: d00e beq.n 800c966 <HAL_RCCEx_PeriphCLKConfig+0x11da>
{
/* Check the parameters */
assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));
/* Configure Timer Prescaler */
__HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
800c948: 4b86 ldr r3, [pc, #536] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c94a: 691b ldr r3, [r3, #16]
800c94c: 4a85 ldr r2, [pc, #532] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c94e: f423 4300 bic.w r3, r3, #32768 @ 0x8000
800c952: 6113 str r3, [r2, #16]
800c954: 4b83 ldr r3, [pc, #524] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c956: 6919 ldr r1, [r3, #16]
800c958: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c95c: f8d3 30bc ldr.w r3, [r3, #188] @ 0xbc
800c960: 4a80 ldr r2, [pc, #512] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c962: 430b orrs r3, r1
800c964: 6113 str r3, [r2, #16]
}
/*------------------------------------ CKPER configuration --------------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CKPER) == RCC_PERIPHCLK_CKPER)
800c966: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c96a: e9d3 2300 ldrd r2, r3, [r3]
800c96e: f002 4300 and.w r3, r2, #2147483648 @ 0x80000000
800c972: 63bb str r3, [r7, #56] @ 0x38
800c974: 2300 movs r3, #0
800c976: 63fb str r3, [r7, #60] @ 0x3c
800c978: e9d7 120e ldrd r1, r2, [r7, #56] @ 0x38
800c97c: 460b mov r3, r1
800c97e: 4313 orrs r3, r2
800c980: d009 beq.n 800c996 <HAL_RCCEx_PeriphCLKConfig+0x120a>
{
/* Check the parameters */
assert_param(IS_RCC_CLKPSOURCE(PeriphClkInit->CkperClockSelection));
/* Configure the CKPER clock source */
__HAL_RCC_CLKP_CONFIG(PeriphClkInit->CkperClockSelection);
800c982: 4b78 ldr r3, [pc, #480] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c984: 6cdb ldr r3, [r3, #76] @ 0x4c
800c986: f023 5140 bic.w r1, r3, #805306368 @ 0x30000000
800c98a: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c98e: 6d5b ldr r3, [r3, #84] @ 0x54
800c990: 4a74 ldr r2, [pc, #464] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c992: 430b orrs r3, r1
800c994: 64d3 str r3, [r2, #76] @ 0x4c
}
/*------------------------------ CEC Configuration ------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
800c996: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c99a: e9d3 2300 ldrd r2, r3, [r3]
800c99e: f402 0300 and.w r3, r2, #8388608 @ 0x800000
800c9a2: 633b str r3, [r7, #48] @ 0x30
800c9a4: 2300 movs r3, #0
800c9a6: 637b str r3, [r7, #52] @ 0x34
800c9a8: e9d7 120c ldrd r1, r2, [r7, #48] @ 0x30
800c9ac: 460b mov r3, r1
800c9ae: 4313 orrs r3, r2
800c9b0: d00a beq.n 800c9c8 <HAL_RCCEx_PeriphCLKConfig+0x123c>
{
/* Check the parameters */
assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
/* Configure the CEC interface clock source */
__HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
800c9b2: 4b6c ldr r3, [pc, #432] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c9b4: 6d5b ldr r3, [r3, #84] @ 0x54
800c9b6: f423 0140 bic.w r1, r3, #12582912 @ 0xc00000
800c9ba: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c9be: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
800c9c2: 4a68 ldr r2, [pc, #416] @ (800cb64 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
800c9c4: 430b orrs r3, r1
800c9c6: 6553 str r3, [r2, #84] @ 0x54
}
/*---------------------------- PLL2 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVP) == RCC_PERIPHCLK_PLL2_DIVP)
800c9c8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c9cc: e9d3 2300 ldrd r2, r3, [r3]
800c9d0: 2100 movs r1, #0
800c9d2: 62b9 str r1, [r7, #40] @ 0x28
800c9d4: f003 0301 and.w r3, r3, #1
800c9d8: 62fb str r3, [r7, #44] @ 0x2c
800c9da: e9d7 120a ldrd r1, r2, [r7, #40] @ 0x28
800c9de: 460b mov r3, r1
800c9e0: 4313 orrs r3, r2
800c9e2: d011 beq.n 800ca08 <HAL_RCCEx_PeriphCLKConfig+0x127c>
{
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
800c9e4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800c9e8: 3308 adds r3, #8
800c9ea: 2100 movs r1, #0
800c9ec: 4618 mov r0, r3
800c9ee: f000 fb79 bl 800d0e4 <RCCEx_PLL2_Config>
800c9f2: 4603 mov r3, r0
800c9f4: f887 311f strb.w r3, [r7, #287] @ 0x11f
if (ret == HAL_OK)
800c9f8: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800c9fc: 2b00 cmp r3, #0
800c9fe: d003 beq.n 800ca08 <HAL_RCCEx_PeriphCLKConfig+0x127c>
/*Nothing to do*/
}
else
{
/* set overall return value */
status = ret;
800ca00: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800ca04: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVQ) == RCC_PERIPHCLK_PLL2_DIVQ)
800ca08: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ca0c: e9d3 2300 ldrd r2, r3, [r3]
800ca10: 2100 movs r1, #0
800ca12: 6239 str r1, [r7, #32]
800ca14: f003 0302 and.w r3, r3, #2
800ca18: 627b str r3, [r7, #36] @ 0x24
800ca1a: e9d7 1208 ldrd r1, r2, [r7, #32]
800ca1e: 460b mov r3, r1
800ca20: 4313 orrs r3, r2
800ca22: d011 beq.n 800ca48 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
{
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
800ca24: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ca28: 3308 adds r3, #8
800ca2a: 2101 movs r1, #1
800ca2c: 4618 mov r0, r3
800ca2e: f000 fb59 bl 800d0e4 <RCCEx_PLL2_Config>
800ca32: 4603 mov r3, r0
800ca34: f887 311f strb.w r3, [r7, #287] @ 0x11f
if (ret == HAL_OK)
800ca38: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800ca3c: 2b00 cmp r3, #0
800ca3e: d003 beq.n 800ca48 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
/*Nothing to do*/
}
else
{
/* set overall return value */
status = ret;
800ca40: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800ca44: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVR) == RCC_PERIPHCLK_PLL2_DIVR)
800ca48: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ca4c: e9d3 2300 ldrd r2, r3, [r3]
800ca50: 2100 movs r1, #0
800ca52: 61b9 str r1, [r7, #24]
800ca54: f003 0304 and.w r3, r3, #4
800ca58: 61fb str r3, [r7, #28]
800ca5a: e9d7 1206 ldrd r1, r2, [r7, #24]
800ca5e: 460b mov r3, r1
800ca60: 4313 orrs r3, r2
800ca62: d011 beq.n 800ca88 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
{
ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
800ca64: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ca68: 3308 adds r3, #8
800ca6a: 2102 movs r1, #2
800ca6c: 4618 mov r0, r3
800ca6e: f000 fb39 bl 800d0e4 <RCCEx_PLL2_Config>
800ca72: 4603 mov r3, r0
800ca74: f887 311f strb.w r3, [r7, #287] @ 0x11f
if (ret == HAL_OK)
800ca78: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800ca7c: 2b00 cmp r3, #0
800ca7e: d003 beq.n 800ca88 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
/*Nothing to do*/
}
else
{
/* set overall return value */
status = ret;
800ca80: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800ca84: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
/*---------------------------- PLL3 configuration -------------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVP) == RCC_PERIPHCLK_PLL3_DIVP)
800ca88: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800ca8c: e9d3 2300 ldrd r2, r3, [r3]
800ca90: 2100 movs r1, #0
800ca92: 6139 str r1, [r7, #16]
800ca94: f003 0308 and.w r3, r3, #8
800ca98: 617b str r3, [r7, #20]
800ca9a: e9d7 1204 ldrd r1, r2, [r7, #16]
800ca9e: 460b mov r3, r1
800caa0: 4313 orrs r3, r2
800caa2: d011 beq.n 800cac8 <HAL_RCCEx_PeriphCLKConfig+0x133c>
{
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
800caa4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800caa8: 3328 adds r3, #40 @ 0x28
800caaa: 2100 movs r1, #0
800caac: 4618 mov r0, r3
800caae: f000 fbcb bl 800d248 <RCCEx_PLL3_Config>
800cab2: 4603 mov r3, r0
800cab4: f887 311f strb.w r3, [r7, #287] @ 0x11f
if (ret == HAL_OK)
800cab8: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800cabc: 2b00 cmp r3, #0
800cabe: d003 beq.n 800cac8 <HAL_RCCEx_PeriphCLKConfig+0x133c>
/*Nothing to do*/
}
else
{
/* set overall return value */
status = ret;
800cac0: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800cac4: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVQ) == RCC_PERIPHCLK_PLL3_DIVQ)
800cac8: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800cacc: e9d3 2300 ldrd r2, r3, [r3]
800cad0: 2100 movs r1, #0
800cad2: 60b9 str r1, [r7, #8]
800cad4: f003 0310 and.w r3, r3, #16
800cad8: 60fb str r3, [r7, #12]
800cada: e9d7 1202 ldrd r1, r2, [r7, #8]
800cade: 460b mov r3, r1
800cae0: 4313 orrs r3, r2
800cae2: d011 beq.n 800cb08 <HAL_RCCEx_PeriphCLKConfig+0x137c>
{
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
800cae4: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800cae8: 3328 adds r3, #40 @ 0x28
800caea: 2101 movs r1, #1
800caec: 4618 mov r0, r3
800caee: f000 fbab bl 800d248 <RCCEx_PLL3_Config>
800caf2: 4603 mov r3, r0
800caf4: f887 311f strb.w r3, [r7, #287] @ 0x11f
if (ret == HAL_OK)
800caf8: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800cafc: 2b00 cmp r3, #0
800cafe: d003 beq.n 800cb08 <HAL_RCCEx_PeriphCLKConfig+0x137c>
/*Nothing to do*/
}
else
{
/* set overall return value */
status = ret;
800cb00: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800cb04: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVR) == RCC_PERIPHCLK_PLL3_DIVR)
800cb08: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800cb0c: e9d3 2300 ldrd r2, r3, [r3]
800cb10: 2100 movs r1, #0
800cb12: 6039 str r1, [r7, #0]
800cb14: f003 0320 and.w r3, r3, #32
800cb18: 607b str r3, [r7, #4]
800cb1a: e9d7 1200 ldrd r1, r2, [r7]
800cb1e: 460b mov r3, r1
800cb20: 4313 orrs r3, r2
800cb22: d011 beq.n 800cb48 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
{
ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
800cb24: f8d7 310c ldr.w r3, [r7, #268] @ 0x10c
800cb28: 3328 adds r3, #40 @ 0x28
800cb2a: 2102 movs r1, #2
800cb2c: 4618 mov r0, r3
800cb2e: f000 fb8b bl 800d248 <RCCEx_PLL3_Config>
800cb32: 4603 mov r3, r0
800cb34: f887 311f strb.w r3, [r7, #287] @ 0x11f
if (ret == HAL_OK)
800cb38: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800cb3c: 2b00 cmp r3, #0
800cb3e: d003 beq.n 800cb48 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
/*Nothing to do*/
}
else
{
/* set overall return value */
status = ret;
800cb40: f897 311f ldrb.w r3, [r7, #287] @ 0x11f
800cb44: f887 311e strb.w r3, [r7, #286] @ 0x11e
}
}
if (status == HAL_OK)
800cb48: f897 311e ldrb.w r3, [r7, #286] @ 0x11e
800cb4c: 2b00 cmp r3, #0
800cb4e: d101 bne.n 800cb54 <HAL_RCCEx_PeriphCLKConfig+0x13c8>
{
return HAL_OK;
800cb50: 2300 movs r3, #0
800cb52: e000 b.n 800cb56 <HAL_RCCEx_PeriphCLKConfig+0x13ca>
}
return HAL_ERROR;
800cb54: 2301 movs r3, #1
}
800cb56: 4618 mov r0, r3
800cb58: f507 7790 add.w r7, r7, #288 @ 0x120
800cb5c: 46bd mov sp, r7
800cb5e: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
800cb62: bf00 nop
800cb64: 58024400 .word 0x58024400
0800cb68 <HAL_RCCEx_GetD3PCLK1Freq>:
* @note Each time D3PCLK1 changes, this function must be called to update the
* right D3PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval D3PCLK1 frequency
*/
uint32_t HAL_RCCEx_GetD3PCLK1Freq(void)
{
800cb68: b580 push {r7, lr}
800cb6a: af00 add r7, sp, #0
#if defined(RCC_D3CFGR_D3PPRE)
/* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->D3CFGR & RCC_D3CFGR_D3PPRE) >> RCC_D3CFGR_D3PPRE_Pos] & 0x1FU));
800cb6c: f7fe fd70 bl 800b650 <HAL_RCC_GetHCLKFreq>
800cb70: 4602 mov r2, r0
800cb72: 4b06 ldr r3, [pc, #24] @ (800cb8c <HAL_RCCEx_GetD3PCLK1Freq+0x24>)
800cb74: 6a1b ldr r3, [r3, #32]
800cb76: 091b lsrs r3, r3, #4
800cb78: f003 0307 and.w r3, r3, #7
800cb7c: 4904 ldr r1, [pc, #16] @ (800cb90 <HAL_RCCEx_GetD3PCLK1Freq+0x28>)
800cb7e: 5ccb ldrb r3, [r1, r3]
800cb80: f003 031f and.w r3, r3, #31
800cb84: fa22 f303 lsr.w r3, r2, r3
#else
/* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE) >> RCC_SRDCFGR_SRDPPRE_Pos] & 0x1FU));
#endif
}
800cb88: 4618 mov r0, r3
800cb8a: bd80 pop {r7, pc}
800cb8c: 58024400 .word 0x58024400
800cb90: 08031cdc .word 0x08031cdc
0800cb94 <HAL_RCCEx_GetPLL2ClockFreq>:
* right PLL2CLK value. Otherwise, any configuration based on this function will be incorrect.
* @param PLL2_Clocks structure.
* @retval None
*/
void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks)
{
800cb94: b480 push {r7}
800cb96: b089 sub sp, #36 @ 0x24
800cb98: af00 add r7, sp, #0
800cb9a: 6078 str r0, [r7, #4]
float_t fracn2, pll2vco;
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL2M) * PLL2N
PLL2xCLK = PLL2_VCO / PLL2x
*/
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
800cb9c: 4ba1 ldr r3, [pc, #644] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cb9e: 6a9b ldr r3, [r3, #40] @ 0x28
800cba0: f003 0303 and.w r3, r3, #3
800cba4: 61bb str r3, [r7, #24]
pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2) >> 12);
800cba6: 4b9f ldr r3, [pc, #636] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cba8: 6a9b ldr r3, [r3, #40] @ 0x28
800cbaa: 0b1b lsrs r3, r3, #12
800cbac: f003 033f and.w r3, r3, #63 @ 0x3f
800cbb0: 617b str r3, [r7, #20]
pll2fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL2FRACEN) >> RCC_PLLCFGR_PLL2FRACEN_Pos;
800cbb2: 4b9c ldr r3, [pc, #624] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cbb4: 6adb ldr r3, [r3, #44] @ 0x2c
800cbb6: 091b lsrs r3, r3, #4
800cbb8: f003 0301 and.w r3, r3, #1
800cbbc: 613b str r3, [r7, #16]
fracn2 = (float_t)(uint32_t)(pll2fracen * ((RCC->PLL2FRACR & RCC_PLL2FRACR_FRACN2) >> 3));
800cbbe: 4b99 ldr r3, [pc, #612] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cbc0: 6bdb ldr r3, [r3, #60] @ 0x3c
800cbc2: 08db lsrs r3, r3, #3
800cbc4: f3c3 030c ubfx r3, r3, #0, #13
800cbc8: 693a ldr r2, [r7, #16]
800cbca: fb02 f303 mul.w r3, r2, r3
800cbce: ee07 3a90 vmov s15, r3
800cbd2: eef8 7a67 vcvt.f32.u32 s15, s15
800cbd6: edc7 7a03 vstr s15, [r7, #12]
if (pll2m != 0U)
800cbda: 697b ldr r3, [r7, #20]
800cbdc: 2b00 cmp r3, #0
800cbde: f000 8111 beq.w 800ce04 <HAL_RCCEx_GetPLL2ClockFreq+0x270>
{
switch (pllsource)
800cbe2: 69bb ldr r3, [r7, #24]
800cbe4: 2b02 cmp r3, #2
800cbe6: f000 8083 beq.w 800ccf0 <HAL_RCCEx_GetPLL2ClockFreq+0x15c>
800cbea: 69bb ldr r3, [r7, #24]
800cbec: 2b02 cmp r3, #2
800cbee: f200 80a1 bhi.w 800cd34 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
800cbf2: 69bb ldr r3, [r7, #24]
800cbf4: 2b00 cmp r3, #0
800cbf6: d003 beq.n 800cc00 <HAL_RCCEx_GetPLL2ClockFreq+0x6c>
800cbf8: 69bb ldr r3, [r7, #24]
800cbfa: 2b01 cmp r3, #1
800cbfc: d056 beq.n 800ccac <HAL_RCCEx_GetPLL2ClockFreq+0x118>
800cbfe: e099 b.n 800cd34 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
{
case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
800cc00: 4b88 ldr r3, [pc, #544] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cc02: 681b ldr r3, [r3, #0]
800cc04: f003 0320 and.w r3, r3, #32
800cc08: 2b00 cmp r3, #0
800cc0a: d02d beq.n 800cc68 <HAL_RCCEx_GetPLL2ClockFreq+0xd4>
{
hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
800cc0c: 4b85 ldr r3, [pc, #532] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cc0e: 681b ldr r3, [r3, #0]
800cc10: 08db lsrs r3, r3, #3
800cc12: f003 0303 and.w r3, r3, #3
800cc16: 4a84 ldr r2, [pc, #528] @ (800ce28 <HAL_RCCEx_GetPLL2ClockFreq+0x294>)
800cc18: fa22 f303 lsr.w r3, r2, r3
800cc1c: 60bb str r3, [r7, #8]
pll2vco = ((float_t)hsivalue / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
800cc1e: 68bb ldr r3, [r7, #8]
800cc20: ee07 3a90 vmov s15, r3
800cc24: eef8 6a67 vcvt.f32.u32 s13, s15
800cc28: 697b ldr r3, [r7, #20]
800cc2a: ee07 3a90 vmov s15, r3
800cc2e: eef8 7a67 vcvt.f32.u32 s15, s15
800cc32: ee86 7aa7 vdiv.f32 s14, s13, s15
800cc36: 4b7b ldr r3, [pc, #492] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cc38: 6b9b ldr r3, [r3, #56] @ 0x38
800cc3a: f3c3 0308 ubfx r3, r3, #0, #9
800cc3e: ee07 3a90 vmov s15, r3
800cc42: eef8 6a67 vcvt.f32.u32 s13, s15
800cc46: ed97 6a03 vldr s12, [r7, #12]
800cc4a: eddf 5a78 vldr s11, [pc, #480] @ 800ce2c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
800cc4e: eec6 7a25 vdiv.f32 s15, s12, s11
800cc52: ee76 7aa7 vadd.f32 s15, s13, s15
800cc56: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800cc5a: ee77 7aa6 vadd.f32 s15, s15, s13
800cc5e: ee67 7a27 vmul.f32 s15, s14, s15
800cc62: edc7 7a07 vstr s15, [r7, #28]
}
else
{
pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
}
break;
800cc66: e087 b.n 800cd78 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
800cc68: 697b ldr r3, [r7, #20]
800cc6a: ee07 3a90 vmov s15, r3
800cc6e: eef8 7a67 vcvt.f32.u32 s15, s15
800cc72: eddf 6a6f vldr s13, [pc, #444] @ 800ce30 <HAL_RCCEx_GetPLL2ClockFreq+0x29c>
800cc76: ee86 7aa7 vdiv.f32 s14, s13, s15
800cc7a: 4b6a ldr r3, [pc, #424] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cc7c: 6b9b ldr r3, [r3, #56] @ 0x38
800cc7e: f3c3 0308 ubfx r3, r3, #0, #9
800cc82: ee07 3a90 vmov s15, r3
800cc86: eef8 6a67 vcvt.f32.u32 s13, s15
800cc8a: ed97 6a03 vldr s12, [r7, #12]
800cc8e: eddf 5a67 vldr s11, [pc, #412] @ 800ce2c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
800cc92: eec6 7a25 vdiv.f32 s15, s12, s11
800cc96: ee76 7aa7 vadd.f32 s15, s13, s15
800cc9a: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800cc9e: ee77 7aa6 vadd.f32 s15, s15, s13
800cca2: ee67 7a27 vmul.f32 s15, s14, s15
800cca6: edc7 7a07 vstr s15, [r7, #28]
break;
800ccaa: e065 b.n 800cd78 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */
pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
800ccac: 697b ldr r3, [r7, #20]
800ccae: ee07 3a90 vmov s15, r3
800ccb2: eef8 7a67 vcvt.f32.u32 s15, s15
800ccb6: eddf 6a5f vldr s13, [pc, #380] @ 800ce34 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
800ccba: ee86 7aa7 vdiv.f32 s14, s13, s15
800ccbe: 4b59 ldr r3, [pc, #356] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800ccc0: 6b9b ldr r3, [r3, #56] @ 0x38
800ccc2: f3c3 0308 ubfx r3, r3, #0, #9
800ccc6: ee07 3a90 vmov s15, r3
800ccca: eef8 6a67 vcvt.f32.u32 s13, s15
800ccce: ed97 6a03 vldr s12, [r7, #12]
800ccd2: eddf 5a56 vldr s11, [pc, #344] @ 800ce2c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
800ccd6: eec6 7a25 vdiv.f32 s15, s12, s11
800ccda: ee76 7aa7 vadd.f32 s15, s13, s15
800ccde: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800cce2: ee77 7aa6 vadd.f32 s15, s15, s13
800cce6: ee67 7a27 vmul.f32 s15, s14, s15
800ccea: edc7 7a07 vstr s15, [r7, #28]
break;
800ccee: e043 b.n 800cd78 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
pll2vco = ((float_t)HSE_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
800ccf0: 697b ldr r3, [r7, #20]
800ccf2: ee07 3a90 vmov s15, r3
800ccf6: eef8 7a67 vcvt.f32.u32 s15, s15
800ccfa: eddf 6a4f vldr s13, [pc, #316] @ 800ce38 <HAL_RCCEx_GetPLL2ClockFreq+0x2a4>
800ccfe: ee86 7aa7 vdiv.f32 s14, s13, s15
800cd02: 4b48 ldr r3, [pc, #288] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cd04: 6b9b ldr r3, [r3, #56] @ 0x38
800cd06: f3c3 0308 ubfx r3, r3, #0, #9
800cd0a: ee07 3a90 vmov s15, r3
800cd0e: eef8 6a67 vcvt.f32.u32 s13, s15
800cd12: ed97 6a03 vldr s12, [r7, #12]
800cd16: eddf 5a45 vldr s11, [pc, #276] @ 800ce2c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
800cd1a: eec6 7a25 vdiv.f32 s15, s12, s11
800cd1e: ee76 7aa7 vadd.f32 s15, s13, s15
800cd22: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800cd26: ee77 7aa6 vadd.f32 s15, s15, s13
800cd2a: ee67 7a27 vmul.f32 s15, s14, s15
800cd2e: edc7 7a07 vstr s15, [r7, #28]
break;
800cd32: e021 b.n 800cd78 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
default:
pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
800cd34: 697b ldr r3, [r7, #20]
800cd36: ee07 3a90 vmov s15, r3
800cd3a: eef8 7a67 vcvt.f32.u32 s15, s15
800cd3e: eddf 6a3d vldr s13, [pc, #244] @ 800ce34 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
800cd42: ee86 7aa7 vdiv.f32 s14, s13, s15
800cd46: 4b37 ldr r3, [pc, #220] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cd48: 6b9b ldr r3, [r3, #56] @ 0x38
800cd4a: f3c3 0308 ubfx r3, r3, #0, #9
800cd4e: ee07 3a90 vmov s15, r3
800cd52: eef8 6a67 vcvt.f32.u32 s13, s15
800cd56: ed97 6a03 vldr s12, [r7, #12]
800cd5a: eddf 5a34 vldr s11, [pc, #208] @ 800ce2c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
800cd5e: eec6 7a25 vdiv.f32 s15, s12, s11
800cd62: ee76 7aa7 vadd.f32 s15, s13, s15
800cd66: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800cd6a: ee77 7aa6 vadd.f32 s15, s15, s13
800cd6e: ee67 7a27 vmul.f32 s15, s14, s15
800cd72: edc7 7a07 vstr s15, [r7, #28]
break;
800cd76: bf00 nop
}
PLL2_Clocks->PLL2_P_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_P2) >> 9) + (float_t)1)) ;
800cd78: 4b2a ldr r3, [pc, #168] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cd7a: 6b9b ldr r3, [r3, #56] @ 0x38
800cd7c: 0a5b lsrs r3, r3, #9
800cd7e: f003 037f and.w r3, r3, #127 @ 0x7f
800cd82: ee07 3a90 vmov s15, r3
800cd86: eef8 7a67 vcvt.f32.u32 s15, s15
800cd8a: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
800cd8e: ee37 7a87 vadd.f32 s14, s15, s14
800cd92: edd7 6a07 vldr s13, [r7, #28]
800cd96: eec6 7a87 vdiv.f32 s15, s13, s14
800cd9a: eefc 7ae7 vcvt.u32.f32 s15, s15
800cd9e: ee17 2a90 vmov r2, s15
800cda2: 687b ldr r3, [r7, #4]
800cda4: 601a str r2, [r3, #0]
PLL2_Clocks->PLL2_Q_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_Q2) >> 16) + (float_t)1)) ;
800cda6: 4b1f ldr r3, [pc, #124] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cda8: 6b9b ldr r3, [r3, #56] @ 0x38
800cdaa: 0c1b lsrs r3, r3, #16
800cdac: f003 037f and.w r3, r3, #127 @ 0x7f
800cdb0: ee07 3a90 vmov s15, r3
800cdb4: eef8 7a67 vcvt.f32.u32 s15, s15
800cdb8: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
800cdbc: ee37 7a87 vadd.f32 s14, s15, s14
800cdc0: edd7 6a07 vldr s13, [r7, #28]
800cdc4: eec6 7a87 vdiv.f32 s15, s13, s14
800cdc8: eefc 7ae7 vcvt.u32.f32 s15, s15
800cdcc: ee17 2a90 vmov r2, s15
800cdd0: 687b ldr r3, [r7, #4]
800cdd2: 605a str r2, [r3, #4]
PLL2_Clocks->PLL2_R_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_R2) >> 24) + (float_t)1)) ;
800cdd4: 4b13 ldr r3, [pc, #76] @ (800ce24 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
800cdd6: 6b9b ldr r3, [r3, #56] @ 0x38
800cdd8: 0e1b lsrs r3, r3, #24
800cdda: f003 037f and.w r3, r3, #127 @ 0x7f
800cdde: ee07 3a90 vmov s15, r3
800cde2: eef8 7a67 vcvt.f32.u32 s15, s15
800cde6: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
800cdea: ee37 7a87 vadd.f32 s14, s15, s14
800cdee: edd7 6a07 vldr s13, [r7, #28]
800cdf2: eec6 7a87 vdiv.f32 s15, s13, s14
800cdf6: eefc 7ae7 vcvt.u32.f32 s15, s15
800cdfa: ee17 2a90 vmov r2, s15
800cdfe: 687b ldr r3, [r7, #4]
800ce00: 609a str r2, [r3, #8]
{
PLL2_Clocks->PLL2_P_Frequency = 0U;
PLL2_Clocks->PLL2_Q_Frequency = 0U;
PLL2_Clocks->PLL2_R_Frequency = 0U;
}
}
800ce02: e008 b.n 800ce16 <HAL_RCCEx_GetPLL2ClockFreq+0x282>
PLL2_Clocks->PLL2_P_Frequency = 0U;
800ce04: 687b ldr r3, [r7, #4]
800ce06: 2200 movs r2, #0
800ce08: 601a str r2, [r3, #0]
PLL2_Clocks->PLL2_Q_Frequency = 0U;
800ce0a: 687b ldr r3, [r7, #4]
800ce0c: 2200 movs r2, #0
800ce0e: 605a str r2, [r3, #4]
PLL2_Clocks->PLL2_R_Frequency = 0U;
800ce10: 687b ldr r3, [r7, #4]
800ce12: 2200 movs r2, #0
800ce14: 609a str r2, [r3, #8]
}
800ce16: bf00 nop
800ce18: 3724 adds r7, #36 @ 0x24
800ce1a: 46bd mov sp, r7
800ce1c: f85d 7b04 ldr.w r7, [sp], #4
800ce20: 4770 bx lr
800ce22: bf00 nop
800ce24: 58024400 .word 0x58024400
800ce28: 03d09000 .word 0x03d09000
800ce2c: 46000000 .word 0x46000000
800ce30: 4c742400 .word 0x4c742400
800ce34: 4a742400 .word 0x4a742400
800ce38: 4bbebc20 .word 0x4bbebc20
0800ce3c <HAL_RCCEx_GetPLL3ClockFreq>:
* right PLL3CLK value. Otherwise, any configuration based on this function will be incorrect.
* @param PLL3_Clocks structure.
* @retval None
*/
void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks)
{
800ce3c: b480 push {r7}
800ce3e: b089 sub sp, #36 @ 0x24
800ce40: af00 add r7, sp, #0
800ce42: 6078 str r0, [r7, #4]
float_t fracn3, pll3vco;
/* PLL3_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL3M) * PLL3N
PLL3xCLK = PLL3_VCO / PLLxR
*/
pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
800ce44: 4ba1 ldr r3, [pc, #644] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800ce46: 6a9b ldr r3, [r3, #40] @ 0x28
800ce48: f003 0303 and.w r3, r3, #3
800ce4c: 61bb str r3, [r7, #24]
pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3) >> 20) ;
800ce4e: 4b9f ldr r3, [pc, #636] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800ce50: 6a9b ldr r3, [r3, #40] @ 0x28
800ce52: 0d1b lsrs r3, r3, #20
800ce54: f003 033f and.w r3, r3, #63 @ 0x3f
800ce58: 617b str r3, [r7, #20]
pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN) >> RCC_PLLCFGR_PLL3FRACEN_Pos;
800ce5a: 4b9c ldr r3, [pc, #624] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800ce5c: 6adb ldr r3, [r3, #44] @ 0x2c
800ce5e: 0a1b lsrs r3, r3, #8
800ce60: f003 0301 and.w r3, r3, #1
800ce64: 613b str r3, [r7, #16]
fracn3 = (float_t)(uint32_t)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACN3) >> 3));
800ce66: 4b99 ldr r3, [pc, #612] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800ce68: 6c5b ldr r3, [r3, #68] @ 0x44
800ce6a: 08db lsrs r3, r3, #3
800ce6c: f3c3 030c ubfx r3, r3, #0, #13
800ce70: 693a ldr r2, [r7, #16]
800ce72: fb02 f303 mul.w r3, r2, r3
800ce76: ee07 3a90 vmov s15, r3
800ce7a: eef8 7a67 vcvt.f32.u32 s15, s15
800ce7e: edc7 7a03 vstr s15, [r7, #12]
if (pll3m != 0U)
800ce82: 697b ldr r3, [r7, #20]
800ce84: 2b00 cmp r3, #0
800ce86: f000 8111 beq.w 800d0ac <HAL_RCCEx_GetPLL3ClockFreq+0x270>
{
switch (pllsource)
800ce8a: 69bb ldr r3, [r7, #24]
800ce8c: 2b02 cmp r3, #2
800ce8e: f000 8083 beq.w 800cf98 <HAL_RCCEx_GetPLL3ClockFreq+0x15c>
800ce92: 69bb ldr r3, [r7, #24]
800ce94: 2b02 cmp r3, #2
800ce96: f200 80a1 bhi.w 800cfdc <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
800ce9a: 69bb ldr r3, [r7, #24]
800ce9c: 2b00 cmp r3, #0
800ce9e: d003 beq.n 800cea8 <HAL_RCCEx_GetPLL3ClockFreq+0x6c>
800cea0: 69bb ldr r3, [r7, #24]
800cea2: 2b01 cmp r3, #1
800cea4: d056 beq.n 800cf54 <HAL_RCCEx_GetPLL3ClockFreq+0x118>
800cea6: e099 b.n 800cfdc <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
{
case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
800cea8: 4b88 ldr r3, [pc, #544] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800ceaa: 681b ldr r3, [r3, #0]
800ceac: f003 0320 and.w r3, r3, #32
800ceb0: 2b00 cmp r3, #0
800ceb2: d02d beq.n 800cf10 <HAL_RCCEx_GetPLL3ClockFreq+0xd4>
{
hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
800ceb4: 4b85 ldr r3, [pc, #532] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800ceb6: 681b ldr r3, [r3, #0]
800ceb8: 08db lsrs r3, r3, #3
800ceba: f003 0303 and.w r3, r3, #3
800cebe: 4a84 ldr r2, [pc, #528] @ (800d0d0 <HAL_RCCEx_GetPLL3ClockFreq+0x294>)
800cec0: fa22 f303 lsr.w r3, r2, r3
800cec4: 60bb str r3, [r7, #8]
pll3vco = ((float_t)hsivalue / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
800cec6: 68bb ldr r3, [r7, #8]
800cec8: ee07 3a90 vmov s15, r3
800cecc: eef8 6a67 vcvt.f32.u32 s13, s15
800ced0: 697b ldr r3, [r7, #20]
800ced2: ee07 3a90 vmov s15, r3
800ced6: eef8 7a67 vcvt.f32.u32 s15, s15
800ceda: ee86 7aa7 vdiv.f32 s14, s13, s15
800cede: 4b7b ldr r3, [pc, #492] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800cee0: 6c1b ldr r3, [r3, #64] @ 0x40
800cee2: f3c3 0308 ubfx r3, r3, #0, #9
800cee6: ee07 3a90 vmov s15, r3
800ceea: eef8 6a67 vcvt.f32.u32 s13, s15
800ceee: ed97 6a03 vldr s12, [r7, #12]
800cef2: eddf 5a78 vldr s11, [pc, #480] @ 800d0d4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
800cef6: eec6 7a25 vdiv.f32 s15, s12, s11
800cefa: ee76 7aa7 vadd.f32 s15, s13, s15
800cefe: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800cf02: ee77 7aa6 vadd.f32 s15, s15, s13
800cf06: ee67 7a27 vmul.f32 s15, s14, s15
800cf0a: edc7 7a07 vstr s15, [r7, #28]
}
else
{
pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
}
break;
800cf0e: e087 b.n 800d020 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
800cf10: 697b ldr r3, [r7, #20]
800cf12: ee07 3a90 vmov s15, r3
800cf16: eef8 7a67 vcvt.f32.u32 s15, s15
800cf1a: eddf 6a6f vldr s13, [pc, #444] @ 800d0d8 <HAL_RCCEx_GetPLL3ClockFreq+0x29c>
800cf1e: ee86 7aa7 vdiv.f32 s14, s13, s15
800cf22: 4b6a ldr r3, [pc, #424] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800cf24: 6c1b ldr r3, [r3, #64] @ 0x40
800cf26: f3c3 0308 ubfx r3, r3, #0, #9
800cf2a: ee07 3a90 vmov s15, r3
800cf2e: eef8 6a67 vcvt.f32.u32 s13, s15
800cf32: ed97 6a03 vldr s12, [r7, #12]
800cf36: eddf 5a67 vldr s11, [pc, #412] @ 800d0d4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
800cf3a: eec6 7a25 vdiv.f32 s15, s12, s11
800cf3e: ee76 7aa7 vadd.f32 s15, s13, s15
800cf42: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800cf46: ee77 7aa6 vadd.f32 s15, s15, s13
800cf4a: ee67 7a27 vmul.f32 s15, s14, s15
800cf4e: edc7 7a07 vstr s15, [r7, #28]
break;
800cf52: e065 b.n 800d020 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
case RCC_PLLSOURCE_CSI: /* CSI used as PLL clock source */
pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
800cf54: 697b ldr r3, [r7, #20]
800cf56: ee07 3a90 vmov s15, r3
800cf5a: eef8 7a67 vcvt.f32.u32 s15, s15
800cf5e: eddf 6a5f vldr s13, [pc, #380] @ 800d0dc <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
800cf62: ee86 7aa7 vdiv.f32 s14, s13, s15
800cf66: 4b59 ldr r3, [pc, #356] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800cf68: 6c1b ldr r3, [r3, #64] @ 0x40
800cf6a: f3c3 0308 ubfx r3, r3, #0, #9
800cf6e: ee07 3a90 vmov s15, r3
800cf72: eef8 6a67 vcvt.f32.u32 s13, s15
800cf76: ed97 6a03 vldr s12, [r7, #12]
800cf7a: eddf 5a56 vldr s11, [pc, #344] @ 800d0d4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
800cf7e: eec6 7a25 vdiv.f32 s15, s12, s11
800cf82: ee76 7aa7 vadd.f32 s15, s13, s15
800cf86: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800cf8a: ee77 7aa6 vadd.f32 s15, s15, s13
800cf8e: ee67 7a27 vmul.f32 s15, s14, s15
800cf92: edc7 7a07 vstr s15, [r7, #28]
break;
800cf96: e043 b.n 800d020 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
pll3vco = ((float_t)HSE_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
800cf98: 697b ldr r3, [r7, #20]
800cf9a: ee07 3a90 vmov s15, r3
800cf9e: eef8 7a67 vcvt.f32.u32 s15, s15
800cfa2: eddf 6a4f vldr s13, [pc, #316] @ 800d0e0 <HAL_RCCEx_GetPLL3ClockFreq+0x2a4>
800cfa6: ee86 7aa7 vdiv.f32 s14, s13, s15
800cfaa: 4b48 ldr r3, [pc, #288] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800cfac: 6c1b ldr r3, [r3, #64] @ 0x40
800cfae: f3c3 0308 ubfx r3, r3, #0, #9
800cfb2: ee07 3a90 vmov s15, r3
800cfb6: eef8 6a67 vcvt.f32.u32 s13, s15
800cfba: ed97 6a03 vldr s12, [r7, #12]
800cfbe: eddf 5a45 vldr s11, [pc, #276] @ 800d0d4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
800cfc2: eec6 7a25 vdiv.f32 s15, s12, s11
800cfc6: ee76 7aa7 vadd.f32 s15, s13, s15
800cfca: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800cfce: ee77 7aa6 vadd.f32 s15, s15, s13
800cfd2: ee67 7a27 vmul.f32 s15, s14, s15
800cfd6: edc7 7a07 vstr s15, [r7, #28]
break;
800cfda: e021 b.n 800d020 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
default:
pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
800cfdc: 697b ldr r3, [r7, #20]
800cfde: ee07 3a90 vmov s15, r3
800cfe2: eef8 7a67 vcvt.f32.u32 s15, s15
800cfe6: eddf 6a3d vldr s13, [pc, #244] @ 800d0dc <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
800cfea: ee86 7aa7 vdiv.f32 s14, s13, s15
800cfee: 4b37 ldr r3, [pc, #220] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800cff0: 6c1b ldr r3, [r3, #64] @ 0x40
800cff2: f3c3 0308 ubfx r3, r3, #0, #9
800cff6: ee07 3a90 vmov s15, r3
800cffa: eef8 6a67 vcvt.f32.u32 s13, s15
800cffe: ed97 6a03 vldr s12, [r7, #12]
800d002: eddf 5a34 vldr s11, [pc, #208] @ 800d0d4 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
800d006: eec6 7a25 vdiv.f32 s15, s12, s11
800d00a: ee76 7aa7 vadd.f32 s15, s13, s15
800d00e: eef7 6a00 vmov.f32 s13, #112 @ 0x3f800000 1.0
800d012: ee77 7aa6 vadd.f32 s15, s15, s13
800d016: ee67 7a27 vmul.f32 s15, s14, s15
800d01a: edc7 7a07 vstr s15, [r7, #28]
break;
800d01e: bf00 nop
}
PLL3_Clocks->PLL3_P_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >> 9) + (float_t)1)) ;
800d020: 4b2a ldr r3, [pc, #168] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800d022: 6c1b ldr r3, [r3, #64] @ 0x40
800d024: 0a5b lsrs r3, r3, #9
800d026: f003 037f and.w r3, r3, #127 @ 0x7f
800d02a: ee07 3a90 vmov s15, r3
800d02e: eef8 7a67 vcvt.f32.u32 s15, s15
800d032: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
800d036: ee37 7a87 vadd.f32 s14, s15, s14
800d03a: edd7 6a07 vldr s13, [r7, #28]
800d03e: eec6 7a87 vdiv.f32 s15, s13, s14
800d042: eefc 7ae7 vcvt.u32.f32 s15, s15
800d046: ee17 2a90 vmov r2, s15
800d04a: 687b ldr r3, [r7, #4]
800d04c: 601a str r2, [r3, #0]
PLL3_Clocks->PLL3_Q_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_Q3) >> 16) + (float_t)1)) ;
800d04e: 4b1f ldr r3, [pc, #124] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800d050: 6c1b ldr r3, [r3, #64] @ 0x40
800d052: 0c1b lsrs r3, r3, #16
800d054: f003 037f and.w r3, r3, #127 @ 0x7f
800d058: ee07 3a90 vmov s15, r3
800d05c: eef8 7a67 vcvt.f32.u32 s15, s15
800d060: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
800d064: ee37 7a87 vadd.f32 s14, s15, s14
800d068: edd7 6a07 vldr s13, [r7, #28]
800d06c: eec6 7a87 vdiv.f32 s15, s13, s14
800d070: eefc 7ae7 vcvt.u32.f32 s15, s15
800d074: ee17 2a90 vmov r2, s15
800d078: 687b ldr r3, [r7, #4]
800d07a: 605a str r2, [r3, #4]
PLL3_Clocks->PLL3_R_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_R3) >> 24) + (float_t)1)) ;
800d07c: 4b13 ldr r3, [pc, #76] @ (800d0cc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
800d07e: 6c1b ldr r3, [r3, #64] @ 0x40
800d080: 0e1b lsrs r3, r3, #24
800d082: f003 037f and.w r3, r3, #127 @ 0x7f
800d086: ee07 3a90 vmov s15, r3
800d08a: eef8 7a67 vcvt.f32.u32 s15, s15
800d08e: eeb7 7a00 vmov.f32 s14, #112 @ 0x3f800000 1.0
800d092: ee37 7a87 vadd.f32 s14, s15, s14
800d096: edd7 6a07 vldr s13, [r7, #28]
800d09a: eec6 7a87 vdiv.f32 s15, s13, s14
800d09e: eefc 7ae7 vcvt.u32.f32 s15, s15
800d0a2: ee17 2a90 vmov r2, s15
800d0a6: 687b ldr r3, [r7, #4]
800d0a8: 609a str r2, [r3, #8]
PLL3_Clocks->PLL3_P_Frequency = 0U;
PLL3_Clocks->PLL3_Q_Frequency = 0U;
PLL3_Clocks->PLL3_R_Frequency = 0U;
}
}
800d0aa: e008 b.n 800d0be <HAL_RCCEx_GetPLL3ClockFreq+0x282>
PLL3_Clocks->PLL3_P_Frequency = 0U;
800d0ac: 687b ldr r3, [r7, #4]
800d0ae: 2200 movs r2, #0
800d0b0: 601a str r2, [r3, #0]
PLL3_Clocks->PLL3_Q_Frequency = 0U;
800d0b2: 687b ldr r3, [r7, #4]
800d0b4: 2200 movs r2, #0
800d0b6: 605a str r2, [r3, #4]
PLL3_Clocks->PLL3_R_Frequency = 0U;
800d0b8: 687b ldr r3, [r7, #4]
800d0ba: 2200 movs r2, #0
800d0bc: 609a str r2, [r3, #8]
}
800d0be: bf00 nop
800d0c0: 3724 adds r7, #36 @ 0x24
800d0c2: 46bd mov sp, r7
800d0c4: f85d 7b04 ldr.w r7, [sp], #4
800d0c8: 4770 bx lr
800d0ca: bf00 nop
800d0cc: 58024400 .word 0x58024400
800d0d0: 03d09000 .word 0x03d09000
800d0d4: 46000000 .word 0x46000000
800d0d8: 4c742400 .word 0x4c742400
800d0dc: 4a742400 .word 0x4a742400
800d0e0: 4bbebc20 .word 0x4bbebc20
0800d0e4 <RCCEx_PLL2_Config>:
* @note PLL2 is temporary disabled to apply new parameters
*
* @retval HAL status
*/
static HAL_StatusTypeDef RCCEx_PLL2_Config(RCC_PLL2InitTypeDef *pll2, uint32_t Divider)
{
800d0e4: b580 push {r7, lr}
800d0e6: b084 sub sp, #16
800d0e8: af00 add r7, sp, #0
800d0ea: 6078 str r0, [r7, #4]
800d0ec: 6039 str r1, [r7, #0]
uint32_t tickstart;
HAL_StatusTypeDef status = HAL_OK;
800d0ee: 2300 movs r3, #0
800d0f0: 73fb strb r3, [r7, #15]
assert_param(IS_RCC_PLL2RGE_VALUE(pll2->PLL2RGE));
assert_param(IS_RCC_PLL2VCO_VALUE(pll2->PLL2VCOSEL));
assert_param(IS_RCC_PLLFRACN_VALUE(pll2->PLL2FRACN));
/* Check that PLL2 OSC clock source is already set */
if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
800d0f2: 4b53 ldr r3, [pc, #332] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d0f4: 6a9b ldr r3, [r3, #40] @ 0x28
800d0f6: f003 0303 and.w r3, r3, #3
800d0fa: 2b03 cmp r3, #3
800d0fc: d101 bne.n 800d102 <RCCEx_PLL2_Config+0x1e>
{
return HAL_ERROR;
800d0fe: 2301 movs r3, #1
800d100: e099 b.n 800d236 <RCCEx_PLL2_Config+0x152>
else
{
/* Disable PLL2. */
__HAL_RCC_PLL2_DISABLE();
800d102: 4b4f ldr r3, [pc, #316] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d104: 681b ldr r3, [r3, #0]
800d106: 4a4e ldr r2, [pc, #312] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d108: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
800d10c: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800d10e: f7f8 fc5b bl 80059c8 <HAL_GetTick>
800d112: 60b8 str r0, [r7, #8]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
800d114: e008 b.n 800d128 <RCCEx_PLL2_Config+0x44>
{
if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
800d116: f7f8 fc57 bl 80059c8 <HAL_GetTick>
800d11a: 4602 mov r2, r0
800d11c: 68bb ldr r3, [r7, #8]
800d11e: 1ad3 subs r3, r2, r3
800d120: 2b02 cmp r3, #2
800d122: d901 bls.n 800d128 <RCCEx_PLL2_Config+0x44>
{
return HAL_TIMEOUT;
800d124: 2303 movs r3, #3
800d126: e086 b.n 800d236 <RCCEx_PLL2_Config+0x152>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
800d128: 4b45 ldr r3, [pc, #276] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d12a: 681b ldr r3, [r3, #0]
800d12c: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
800d130: 2b00 cmp r3, #0
800d132: d1f0 bne.n 800d116 <RCCEx_PLL2_Config+0x32>
}
}
/* Configure PLL2 multiplication and division factors. */
__HAL_RCC_PLL2_CONFIG(pll2->PLL2M,
800d134: 4b42 ldr r3, [pc, #264] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d136: 6a9b ldr r3, [r3, #40] @ 0x28
800d138: f423 327c bic.w r2, r3, #258048 @ 0x3f000
800d13c: 687b ldr r3, [r7, #4]
800d13e: 681b ldr r3, [r3, #0]
800d140: 031b lsls r3, r3, #12
800d142: 493f ldr r1, [pc, #252] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d144: 4313 orrs r3, r2
800d146: 628b str r3, [r1, #40] @ 0x28
800d148: 687b ldr r3, [r7, #4]
800d14a: 685b ldr r3, [r3, #4]
800d14c: 3b01 subs r3, #1
800d14e: f3c3 0208 ubfx r2, r3, #0, #9
800d152: 687b ldr r3, [r7, #4]
800d154: 689b ldr r3, [r3, #8]
800d156: 3b01 subs r3, #1
800d158: 025b lsls r3, r3, #9
800d15a: b29b uxth r3, r3
800d15c: 431a orrs r2, r3
800d15e: 687b ldr r3, [r7, #4]
800d160: 68db ldr r3, [r3, #12]
800d162: 3b01 subs r3, #1
800d164: 041b lsls r3, r3, #16
800d166: f403 03fe and.w r3, r3, #8323072 @ 0x7f0000
800d16a: 431a orrs r2, r3
800d16c: 687b ldr r3, [r7, #4]
800d16e: 691b ldr r3, [r3, #16]
800d170: 3b01 subs r3, #1
800d172: 061b lsls r3, r3, #24
800d174: f003 43fe and.w r3, r3, #2130706432 @ 0x7f000000
800d178: 4931 ldr r1, [pc, #196] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d17a: 4313 orrs r3, r2
800d17c: 638b str r3, [r1, #56] @ 0x38
pll2->PLL2P,
pll2->PLL2Q,
pll2->PLL2R);
/* Select PLL2 input reference frequency range: VCI */
__HAL_RCC_PLL2_VCIRANGE(pll2->PLL2RGE) ;
800d17e: 4b30 ldr r3, [pc, #192] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d180: 6adb ldr r3, [r3, #44] @ 0x2c
800d182: f023 02c0 bic.w r2, r3, #192 @ 0xc0
800d186: 687b ldr r3, [r7, #4]
800d188: 695b ldr r3, [r3, #20]
800d18a: 492d ldr r1, [pc, #180] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d18c: 4313 orrs r3, r2
800d18e: 62cb str r3, [r1, #44] @ 0x2c
/* Select PLL2 output frequency range : VCO */
__HAL_RCC_PLL2_VCORANGE(pll2->PLL2VCOSEL) ;
800d190: 4b2b ldr r3, [pc, #172] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d192: 6adb ldr r3, [r3, #44] @ 0x2c
800d194: f023 0220 bic.w r2, r3, #32
800d198: 687b ldr r3, [r7, #4]
800d19a: 699b ldr r3, [r3, #24]
800d19c: 4928 ldr r1, [pc, #160] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d19e: 4313 orrs r3, r2
800d1a0: 62cb str r3, [r1, #44] @ 0x2c
/* Disable PLL2FRACN . */
__HAL_RCC_PLL2FRACN_DISABLE();
800d1a2: 4b27 ldr r3, [pc, #156] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1a4: 6adb ldr r3, [r3, #44] @ 0x2c
800d1a6: 4a26 ldr r2, [pc, #152] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1a8: f023 0310 bic.w r3, r3, #16
800d1ac: 62d3 str r3, [r2, #44] @ 0x2c
/* Configures PLL2 clock Fractional Part Of The Multiplication Factor */
__HAL_RCC_PLL2FRACN_CONFIG(pll2->PLL2FRACN);
800d1ae: 4b24 ldr r3, [pc, #144] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1b0: 6bda ldr r2, [r3, #60] @ 0x3c
800d1b2: 4b24 ldr r3, [pc, #144] @ (800d244 <RCCEx_PLL2_Config+0x160>)
800d1b4: 4013 ands r3, r2
800d1b6: 687a ldr r2, [r7, #4]
800d1b8: 69d2 ldr r2, [r2, #28]
800d1ba: 00d2 lsls r2, r2, #3
800d1bc: 4920 ldr r1, [pc, #128] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1be: 4313 orrs r3, r2
800d1c0: 63cb str r3, [r1, #60] @ 0x3c
/* Enable PLL2FRACN . */
__HAL_RCC_PLL2FRACN_ENABLE();
800d1c2: 4b1f ldr r3, [pc, #124] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1c4: 6adb ldr r3, [r3, #44] @ 0x2c
800d1c6: 4a1e ldr r2, [pc, #120] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1c8: f043 0310 orr.w r3, r3, #16
800d1cc: 62d3 str r3, [r2, #44] @ 0x2c
/* Enable the PLL2 clock output */
if (Divider == DIVIDER_P_UPDATE)
800d1ce: 683b ldr r3, [r7, #0]
800d1d0: 2b00 cmp r3, #0
800d1d2: d106 bne.n 800d1e2 <RCCEx_PLL2_Config+0xfe>
{
__HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP);
800d1d4: 4b1a ldr r3, [pc, #104] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1d6: 6adb ldr r3, [r3, #44] @ 0x2c
800d1d8: 4a19 ldr r2, [pc, #100] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1da: f443 2300 orr.w r3, r3, #524288 @ 0x80000
800d1de: 62d3 str r3, [r2, #44] @ 0x2c
800d1e0: e00f b.n 800d202 <RCCEx_PLL2_Config+0x11e>
}
else if (Divider == DIVIDER_Q_UPDATE)
800d1e2: 683b ldr r3, [r7, #0]
800d1e4: 2b01 cmp r3, #1
800d1e6: d106 bne.n 800d1f6 <RCCEx_PLL2_Config+0x112>
{
__HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVQ);
800d1e8: 4b15 ldr r3, [pc, #84] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1ea: 6adb ldr r3, [r3, #44] @ 0x2c
800d1ec: 4a14 ldr r2, [pc, #80] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1ee: f443 1380 orr.w r3, r3, #1048576 @ 0x100000
800d1f2: 62d3 str r3, [r2, #44] @ 0x2c
800d1f4: e005 b.n 800d202 <RCCEx_PLL2_Config+0x11e>
}
else
{
__HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVR);
800d1f6: 4b12 ldr r3, [pc, #72] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1f8: 6adb ldr r3, [r3, #44] @ 0x2c
800d1fa: 4a11 ldr r2, [pc, #68] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d1fc: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
800d200: 62d3 str r3, [r2, #44] @ 0x2c
}
/* Enable PLL2. */
__HAL_RCC_PLL2_ENABLE();
800d202: 4b0f ldr r3, [pc, #60] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d204: 681b ldr r3, [r3, #0]
800d206: 4a0e ldr r2, [pc, #56] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d208: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000
800d20c: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800d20e: f7f8 fbdb bl 80059c8 <HAL_GetTick>
800d212: 60b8 str r0, [r7, #8]
/* Wait till PLL2 is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
800d214: e008 b.n 800d228 <RCCEx_PLL2_Config+0x144>
{
if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
800d216: f7f8 fbd7 bl 80059c8 <HAL_GetTick>
800d21a: 4602 mov r2, r0
800d21c: 68bb ldr r3, [r7, #8]
800d21e: 1ad3 subs r3, r2, r3
800d220: 2b02 cmp r3, #2
800d222: d901 bls.n 800d228 <RCCEx_PLL2_Config+0x144>
{
return HAL_TIMEOUT;
800d224: 2303 movs r3, #3
800d226: e006 b.n 800d236 <RCCEx_PLL2_Config+0x152>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
800d228: 4b05 ldr r3, [pc, #20] @ (800d240 <RCCEx_PLL2_Config+0x15c>)
800d22a: 681b ldr r3, [r3, #0]
800d22c: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
800d230: 2b00 cmp r3, #0
800d232: d0f0 beq.n 800d216 <RCCEx_PLL2_Config+0x132>
}
}
return status;
800d234: 7bfb ldrb r3, [r7, #15]
}
800d236: 4618 mov r0, r3
800d238: 3710 adds r7, #16
800d23a: 46bd mov sp, r7
800d23c: bd80 pop {r7, pc}
800d23e: bf00 nop
800d240: 58024400 .word 0x58024400
800d244: ffff0007 .word 0xffff0007
0800d248 <RCCEx_PLL3_Config>:
* @note PLL3 is temporary disabled to apply new parameters
*
* @retval HAL status
*/
static HAL_StatusTypeDef RCCEx_PLL3_Config(RCC_PLL3InitTypeDef *pll3, uint32_t Divider)
{
800d248: b580 push {r7, lr}
800d24a: b084 sub sp, #16
800d24c: af00 add r7, sp, #0
800d24e: 6078 str r0, [r7, #4]
800d250: 6039 str r1, [r7, #0]
uint32_t tickstart;
HAL_StatusTypeDef status = HAL_OK;
800d252: 2300 movs r3, #0
800d254: 73fb strb r3, [r7, #15]
assert_param(IS_RCC_PLL3RGE_VALUE(pll3->PLL3RGE));
assert_param(IS_RCC_PLL3VCO_VALUE(pll3->PLL3VCOSEL));
assert_param(IS_RCC_PLLFRACN_VALUE(pll3->PLL3FRACN));
/* Check that PLL3 OSC clock source is already set */
if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
800d256: 4b53 ldr r3, [pc, #332] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d258: 6a9b ldr r3, [r3, #40] @ 0x28
800d25a: f003 0303 and.w r3, r3, #3
800d25e: 2b03 cmp r3, #3
800d260: d101 bne.n 800d266 <RCCEx_PLL3_Config+0x1e>
{
return HAL_ERROR;
800d262: 2301 movs r3, #1
800d264: e099 b.n 800d39a <RCCEx_PLL3_Config+0x152>
else
{
/* Disable PLL3. */
__HAL_RCC_PLL3_DISABLE();
800d266: 4b4f ldr r3, [pc, #316] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d268: 681b ldr r3, [r3, #0]
800d26a: 4a4e ldr r2, [pc, #312] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d26c: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
800d270: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800d272: f7f8 fba9 bl 80059c8 <HAL_GetTick>
800d276: 60b8 str r0, [r7, #8]
/* Wait till PLL3 is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
800d278: e008 b.n 800d28c <RCCEx_PLL3_Config+0x44>
{
if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
800d27a: f7f8 fba5 bl 80059c8 <HAL_GetTick>
800d27e: 4602 mov r2, r0
800d280: 68bb ldr r3, [r7, #8]
800d282: 1ad3 subs r3, r2, r3
800d284: 2b02 cmp r3, #2
800d286: d901 bls.n 800d28c <RCCEx_PLL3_Config+0x44>
{
return HAL_TIMEOUT;
800d288: 2303 movs r3, #3
800d28a: e086 b.n 800d39a <RCCEx_PLL3_Config+0x152>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
800d28c: 4b45 ldr r3, [pc, #276] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d28e: 681b ldr r3, [r3, #0]
800d290: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
800d294: 2b00 cmp r3, #0
800d296: d1f0 bne.n 800d27a <RCCEx_PLL3_Config+0x32>
}
}
/* Configure the PLL3 multiplication and division factors. */
__HAL_RCC_PLL3_CONFIG(pll3->PLL3M,
800d298: 4b42 ldr r3, [pc, #264] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d29a: 6a9b ldr r3, [r3, #40] @ 0x28
800d29c: f023 727c bic.w r2, r3, #66060288 @ 0x3f00000
800d2a0: 687b ldr r3, [r7, #4]
800d2a2: 681b ldr r3, [r3, #0]
800d2a4: 051b lsls r3, r3, #20
800d2a6: 493f ldr r1, [pc, #252] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d2a8: 4313 orrs r3, r2
800d2aa: 628b str r3, [r1, #40] @ 0x28
800d2ac: 687b ldr r3, [r7, #4]
800d2ae: 685b ldr r3, [r3, #4]
800d2b0: 3b01 subs r3, #1
800d2b2: f3c3 0208 ubfx r2, r3, #0, #9
800d2b6: 687b ldr r3, [r7, #4]
800d2b8: 689b ldr r3, [r3, #8]
800d2ba: 3b01 subs r3, #1
800d2bc: 025b lsls r3, r3, #9
800d2be: b29b uxth r3, r3
800d2c0: 431a orrs r2, r3
800d2c2: 687b ldr r3, [r7, #4]
800d2c4: 68db ldr r3, [r3, #12]
800d2c6: 3b01 subs r3, #1
800d2c8: 041b lsls r3, r3, #16
800d2ca: f403 03fe and.w r3, r3, #8323072 @ 0x7f0000
800d2ce: 431a orrs r2, r3
800d2d0: 687b ldr r3, [r7, #4]
800d2d2: 691b ldr r3, [r3, #16]
800d2d4: 3b01 subs r3, #1
800d2d6: 061b lsls r3, r3, #24
800d2d8: f003 43fe and.w r3, r3, #2130706432 @ 0x7f000000
800d2dc: 4931 ldr r1, [pc, #196] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d2de: 4313 orrs r3, r2
800d2e0: 640b str r3, [r1, #64] @ 0x40
pll3->PLL3P,
pll3->PLL3Q,
pll3->PLL3R);
/* Select PLL3 input reference frequency range: VCI */
__HAL_RCC_PLL3_VCIRANGE(pll3->PLL3RGE) ;
800d2e2: 4b30 ldr r3, [pc, #192] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d2e4: 6adb ldr r3, [r3, #44] @ 0x2c
800d2e6: f423 6240 bic.w r2, r3, #3072 @ 0xc00
800d2ea: 687b ldr r3, [r7, #4]
800d2ec: 695b ldr r3, [r3, #20]
800d2ee: 492d ldr r1, [pc, #180] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d2f0: 4313 orrs r3, r2
800d2f2: 62cb str r3, [r1, #44] @ 0x2c
/* Select PLL3 output frequency range : VCO */
__HAL_RCC_PLL3_VCORANGE(pll3->PLL3VCOSEL) ;
800d2f4: 4b2b ldr r3, [pc, #172] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d2f6: 6adb ldr r3, [r3, #44] @ 0x2c
800d2f8: f423 7200 bic.w r2, r3, #512 @ 0x200
800d2fc: 687b ldr r3, [r7, #4]
800d2fe: 699b ldr r3, [r3, #24]
800d300: 4928 ldr r1, [pc, #160] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d302: 4313 orrs r3, r2
800d304: 62cb str r3, [r1, #44] @ 0x2c
/* Disable PLL3FRACN . */
__HAL_RCC_PLL3FRACN_DISABLE();
800d306: 4b27 ldr r3, [pc, #156] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d308: 6adb ldr r3, [r3, #44] @ 0x2c
800d30a: 4a26 ldr r2, [pc, #152] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d30c: f423 7380 bic.w r3, r3, #256 @ 0x100
800d310: 62d3 str r3, [r2, #44] @ 0x2c
/* Configures PLL3 clock Fractional Part Of The Multiplication Factor */
__HAL_RCC_PLL3FRACN_CONFIG(pll3->PLL3FRACN);
800d312: 4b24 ldr r3, [pc, #144] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d314: 6c5a ldr r2, [r3, #68] @ 0x44
800d316: 4b24 ldr r3, [pc, #144] @ (800d3a8 <RCCEx_PLL3_Config+0x160>)
800d318: 4013 ands r3, r2
800d31a: 687a ldr r2, [r7, #4]
800d31c: 69d2 ldr r2, [r2, #28]
800d31e: 00d2 lsls r2, r2, #3
800d320: 4920 ldr r1, [pc, #128] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d322: 4313 orrs r3, r2
800d324: 644b str r3, [r1, #68] @ 0x44
/* Enable PLL3FRACN . */
__HAL_RCC_PLL3FRACN_ENABLE();
800d326: 4b1f ldr r3, [pc, #124] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d328: 6adb ldr r3, [r3, #44] @ 0x2c
800d32a: 4a1e ldr r2, [pc, #120] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d32c: f443 7380 orr.w r3, r3, #256 @ 0x100
800d330: 62d3 str r3, [r2, #44] @ 0x2c
/* Enable the PLL3 clock output */
if (Divider == DIVIDER_P_UPDATE)
800d332: 683b ldr r3, [r7, #0]
800d334: 2b00 cmp r3, #0
800d336: d106 bne.n 800d346 <RCCEx_PLL3_Config+0xfe>
{
__HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP);
800d338: 4b1a ldr r3, [pc, #104] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d33a: 6adb ldr r3, [r3, #44] @ 0x2c
800d33c: 4a19 ldr r2, [pc, #100] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d33e: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
800d342: 62d3 str r3, [r2, #44] @ 0x2c
800d344: e00f b.n 800d366 <RCCEx_PLL3_Config+0x11e>
}
else if (Divider == DIVIDER_Q_UPDATE)
800d346: 683b ldr r3, [r7, #0]
800d348: 2b01 cmp r3, #1
800d34a: d106 bne.n 800d35a <RCCEx_PLL3_Config+0x112>
{
__HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ);
800d34c: 4b15 ldr r3, [pc, #84] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d34e: 6adb ldr r3, [r3, #44] @ 0x2c
800d350: 4a14 ldr r2, [pc, #80] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d352: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800d356: 62d3 str r3, [r2, #44] @ 0x2c
800d358: e005 b.n 800d366 <RCCEx_PLL3_Config+0x11e>
}
else
{
__HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVR);
800d35a: 4b12 ldr r3, [pc, #72] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d35c: 6adb ldr r3, [r3, #44] @ 0x2c
800d35e: 4a11 ldr r2, [pc, #68] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d360: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
800d364: 62d3 str r3, [r2, #44] @ 0x2c
}
/* Enable PLL3. */
__HAL_RCC_PLL3_ENABLE();
800d366: 4b0f ldr r3, [pc, #60] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d368: 681b ldr r3, [r3, #0]
800d36a: 4a0e ldr r2, [pc, #56] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d36c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
800d370: 6013 str r3, [r2, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
800d372: f7f8 fb29 bl 80059c8 <HAL_GetTick>
800d376: 60b8 str r0, [r7, #8]
/* Wait till PLL3 is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
800d378: e008 b.n 800d38c <RCCEx_PLL3_Config+0x144>
{
if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
800d37a: f7f8 fb25 bl 80059c8 <HAL_GetTick>
800d37e: 4602 mov r2, r0
800d380: 68bb ldr r3, [r7, #8]
800d382: 1ad3 subs r3, r2, r3
800d384: 2b02 cmp r3, #2
800d386: d901 bls.n 800d38c <RCCEx_PLL3_Config+0x144>
{
return HAL_TIMEOUT;
800d388: 2303 movs r3, #3
800d38a: e006 b.n 800d39a <RCCEx_PLL3_Config+0x152>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
800d38c: 4b05 ldr r3, [pc, #20] @ (800d3a4 <RCCEx_PLL3_Config+0x15c>)
800d38e: 681b ldr r3, [r3, #0]
800d390: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
800d394: 2b00 cmp r3, #0
800d396: d0f0 beq.n 800d37a <RCCEx_PLL3_Config+0x132>
}
}
return status;
800d398: 7bfb ldrb r3, [r7, #15]
}
800d39a: 4618 mov r0, r3
800d39c: 3710 adds r7, #16
800d39e: 46bd mov sp, r7
800d3a0: bd80 pop {r7, pc}
800d3a2: bf00 nop
800d3a4: 58024400 .word 0x58024400
800d3a8: ffff0007 .word 0xffff0007
0800d3ac <HAL_RNG_Init>:
* @param hrng pointer to a RNG_HandleTypeDef structure that contains
* the configuration information for RNG.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
{
800d3ac: b580 push {r7, lr}
800d3ae: b084 sub sp, #16
800d3b0: af00 add r7, sp, #0
800d3b2: 6078 str r0, [r7, #4]
uint32_t tickstart;
/* Check the RNG handle allocation */
if (hrng == NULL)
800d3b4: 687b ldr r3, [r7, #4]
800d3b6: 2b00 cmp r3, #0
800d3b8: d101 bne.n 800d3be <HAL_RNG_Init+0x12>
{
return HAL_ERROR;
800d3ba: 2301 movs r3, #1
800d3bc: e054 b.n 800d468 <HAL_RNG_Init+0xbc>
/* Init the low level hardware */
hrng->MspInitCallback(hrng);
}
#else
if (hrng->State == HAL_RNG_STATE_RESET)
800d3be: 687b ldr r3, [r7, #4]
800d3c0: 7a5b ldrb r3, [r3, #9]
800d3c2: b2db uxtb r3, r3
800d3c4: 2b00 cmp r3, #0
800d3c6: d105 bne.n 800d3d4 <HAL_RNG_Init+0x28>
{
/* Allocate lock resource and initialize it */
hrng->Lock = HAL_UNLOCKED;
800d3c8: 687b ldr r3, [r7, #4]
800d3ca: 2200 movs r2, #0
800d3cc: 721a strb r2, [r3, #8]
/* Init the low level hardware */
HAL_RNG_MspInit(hrng);
800d3ce: 6878 ldr r0, [r7, #4]
800d3d0: f7f6 fc1e bl 8003c10 <HAL_RNG_MspInit>
}
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
/* Change RNG peripheral state */
hrng->State = HAL_RNG_STATE_BUSY;
800d3d4: 687b ldr r3, [r7, #4]
800d3d6: 2202 movs r2, #2
800d3d8: 725a strb r2, [r3, #9]
}
}
}
#else
/* Clock Error Detection Configuration */
MODIFY_REG(hrng->Instance->CR, RNG_CR_CED, hrng->Init.ClockErrorDetection);
800d3da: 687b ldr r3, [r7, #4]
800d3dc: 681b ldr r3, [r3, #0]
800d3de: 681b ldr r3, [r3, #0]
800d3e0: f023 0120 bic.w r1, r3, #32
800d3e4: 687b ldr r3, [r7, #4]
800d3e6: 685a ldr r2, [r3, #4]
800d3e8: 687b ldr r3, [r7, #4]
800d3ea: 681b ldr r3, [r3, #0]
800d3ec: 430a orrs r2, r1
800d3ee: 601a str r2, [r3, #0]
#endif /* RNG_CR_CONDRST */
/* Enable the RNG Peripheral */
__HAL_RNG_ENABLE(hrng);
800d3f0: 687b ldr r3, [r7, #4]
800d3f2: 681b ldr r3, [r3, #0]
800d3f4: 681a ldr r2, [r3, #0]
800d3f6: 687b ldr r3, [r7, #4]
800d3f8: 681b ldr r3, [r3, #0]
800d3fa: f042 0204 orr.w r2, r2, #4
800d3fe: 601a str r2, [r3, #0]
/* verify that no seed error */
if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)
800d400: 687b ldr r3, [r7, #4]
800d402: 681b ldr r3, [r3, #0]
800d404: 685b ldr r3, [r3, #4]
800d406: f003 0340 and.w r3, r3, #64 @ 0x40
800d40a: 2b40 cmp r3, #64 @ 0x40
800d40c: d104 bne.n 800d418 <HAL_RNG_Init+0x6c>
{
hrng->State = HAL_RNG_STATE_ERROR;
800d40e: 687b ldr r3, [r7, #4]
800d410: 2204 movs r2, #4
800d412: 725a strb r2, [r3, #9]
return HAL_ERROR;
800d414: 2301 movs r3, #1
800d416: e027 b.n 800d468 <HAL_RNG_Init+0xbc>
}
/* Get tick */
tickstart = HAL_GetTick();
800d418: f7f8 fad6 bl 80059c8 <HAL_GetTick>
800d41c: 60f8 str r0, [r7, #12]
/* Check if data register contains valid random data */
while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
800d41e: e015 b.n 800d44c <HAL_RNG_Init+0xa0>
{
if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
800d420: f7f8 fad2 bl 80059c8 <HAL_GetTick>
800d424: 4602 mov r2, r0
800d426: 68fb ldr r3, [r7, #12]
800d428: 1ad3 subs r3, r2, r3
800d42a: 2b02 cmp r3, #2
800d42c: d90e bls.n 800d44c <HAL_RNG_Init+0xa0>
{
/* New check to avoid false timeout detection in case of preemption */
if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
800d42e: 687b ldr r3, [r7, #4]
800d430: 681b ldr r3, [r3, #0]
800d432: 685b ldr r3, [r3, #4]
800d434: f003 0304 and.w r3, r3, #4
800d438: 2b04 cmp r3, #4
800d43a: d107 bne.n 800d44c <HAL_RNG_Init+0xa0>
{
hrng->State = HAL_RNG_STATE_ERROR;
800d43c: 687b ldr r3, [r7, #4]
800d43e: 2204 movs r2, #4
800d440: 725a strb r2, [r3, #9]
hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
800d442: 687b ldr r3, [r7, #4]
800d444: 2202 movs r2, #2
800d446: 60da str r2, [r3, #12]
return HAL_ERROR;
800d448: 2301 movs r3, #1
800d44a: e00d b.n 800d468 <HAL_RNG_Init+0xbc>
while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
800d44c: 687b ldr r3, [r7, #4]
800d44e: 681b ldr r3, [r3, #0]
800d450: 685b ldr r3, [r3, #4]
800d452: f003 0304 and.w r3, r3, #4
800d456: 2b04 cmp r3, #4
800d458: d0e2 beq.n 800d420 <HAL_RNG_Init+0x74>
}
}
}
/* Initialize the RNG state */
hrng->State = HAL_RNG_STATE_READY;
800d45a: 687b ldr r3, [r7, #4]
800d45c: 2201 movs r2, #1
800d45e: 725a strb r2, [r3, #9]
/* Initialise the error code */
hrng->ErrorCode = HAL_RNG_ERROR_NONE;
800d460: 687b ldr r3, [r7, #4]
800d462: 2200 movs r2, #0
800d464: 60da str r2, [r3, #12]
/* Return function status */
return HAL_OK;
800d466: 2300 movs r3, #0
}
800d468: 4618 mov r0, r3
800d46a: 3710 adds r7, #16
800d46c: 46bd mov sp, r7
800d46e: bd80 pop {r7, pc}
0800d470 <HAL_RNG_GenerateRandomNumber>:
* @param random32bit pointer to generated random number variable if successful.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit)
{
800d470: b580 push {r7, lr}
800d472: b084 sub sp, #16
800d474: af00 add r7, sp, #0
800d476: 6078 str r0, [r7, #4]
800d478: 6039 str r1, [r7, #0]
uint32_t tickstart;
HAL_StatusTypeDef status = HAL_OK;
800d47a: 2300 movs r3, #0
800d47c: 73fb strb r3, [r7, #15]
/* Process Locked */
__HAL_LOCK(hrng);
800d47e: 687b ldr r3, [r7, #4]
800d480: 7a1b ldrb r3, [r3, #8]
800d482: 2b01 cmp r3, #1
800d484: d101 bne.n 800d48a <HAL_RNG_GenerateRandomNumber+0x1a>
800d486: 2302 movs r3, #2
800d488: e044 b.n 800d514 <HAL_RNG_GenerateRandomNumber+0xa4>
800d48a: 687b ldr r3, [r7, #4]
800d48c: 2201 movs r2, #1
800d48e: 721a strb r2, [r3, #8]
/* Check RNG peripheral state */
if (hrng->State == HAL_RNG_STATE_READY)
800d490: 687b ldr r3, [r7, #4]
800d492: 7a5b ldrb r3, [r3, #9]
800d494: b2db uxtb r3, r3
800d496: 2b01 cmp r3, #1
800d498: d133 bne.n 800d502 <HAL_RNG_GenerateRandomNumber+0x92>
{
/* Change RNG peripheral state */
hrng->State = HAL_RNG_STATE_BUSY;
800d49a: 687b ldr r3, [r7, #4]
800d49c: 2202 movs r2, #2
800d49e: 725a strb r2, [r3, #9]
}
}
#endif /* RNG_CR_CONDRST */
/* Get tick */
tickstart = HAL_GetTick();
800d4a0: f7f8 fa92 bl 80059c8 <HAL_GetTick>
800d4a4: 60b8 str r0, [r7, #8]
/* Check if data register contains valid random data */
while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
800d4a6: e018 b.n 800d4da <HAL_RNG_GenerateRandomNumber+0x6a>
{
if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
800d4a8: f7f8 fa8e bl 80059c8 <HAL_GetTick>
800d4ac: 4602 mov r2, r0
800d4ae: 68bb ldr r3, [r7, #8]
800d4b0: 1ad3 subs r3, r2, r3
800d4b2: 2b02 cmp r3, #2
800d4b4: d911 bls.n 800d4da <HAL_RNG_GenerateRandomNumber+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
800d4b6: 687b ldr r3, [r7, #4]
800d4b8: 681b ldr r3, [r3, #0]
800d4ba: 685b ldr r3, [r3, #4]
800d4bc: f003 0301 and.w r3, r3, #1
800d4c0: 2b01 cmp r3, #1
800d4c2: d00a beq.n 800d4da <HAL_RNG_GenerateRandomNumber+0x6a>
{
hrng->State = HAL_RNG_STATE_READY;
800d4c4: 687b ldr r3, [r7, #4]
800d4c6: 2201 movs r2, #1
800d4c8: 725a strb r2, [r3, #9]
hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
800d4ca: 687b ldr r3, [r7, #4]
800d4cc: 2202 movs r2, #2
800d4ce: 60da str r2, [r3, #12]
/* Process Unlocked */
__HAL_UNLOCK(hrng);
800d4d0: 687b ldr r3, [r7, #4]
800d4d2: 2200 movs r2, #0
800d4d4: 721a strb r2, [r3, #8]
return HAL_ERROR;
800d4d6: 2301 movs r3, #1
800d4d8: e01c b.n 800d514 <HAL_RNG_GenerateRandomNumber+0xa4>
while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
800d4da: 687b ldr r3, [r7, #4]
800d4dc: 681b ldr r3, [r3, #0]
800d4de: 685b ldr r3, [r3, #4]
800d4e0: f003 0301 and.w r3, r3, #1
800d4e4: 2b01 cmp r3, #1
800d4e6: d1df bne.n 800d4a8 <HAL_RNG_GenerateRandomNumber+0x38>
}
}
}
/* Get a 32bit Random number */
hrng->RandomNumber = hrng->Instance->DR;
800d4e8: 687b ldr r3, [r7, #4]
800d4ea: 681b ldr r3, [r3, #0]
800d4ec: 689a ldr r2, [r3, #8]
800d4ee: 687b ldr r3, [r7, #4]
800d4f0: 611a str r2, [r3, #16]
else /* No seed error */
{
*random32bit = hrng->RandomNumber;
}
#else
*random32bit = hrng->RandomNumber;
800d4f2: 687b ldr r3, [r7, #4]
800d4f4: 691a ldr r2, [r3, #16]
800d4f6: 683b ldr r3, [r7, #0]
800d4f8: 601a str r2, [r3, #0]
#endif /* RNG_CR_CONDRST */
hrng->State = HAL_RNG_STATE_READY;
800d4fa: 687b ldr r3, [r7, #4]
800d4fc: 2201 movs r2, #1
800d4fe: 725a strb r2, [r3, #9]
800d500: e004 b.n 800d50c <HAL_RNG_GenerateRandomNumber+0x9c>
}
else
{
hrng->ErrorCode = HAL_RNG_ERROR_BUSY;
800d502: 687b ldr r3, [r7, #4]
800d504: 2204 movs r2, #4
800d506: 60da str r2, [r3, #12]
status = HAL_ERROR;
800d508: 2301 movs r3, #1
800d50a: 73fb strb r3, [r7, #15]
}
/* Process Unlocked */
__HAL_UNLOCK(hrng);
800d50c: 687b ldr r3, [r7, #4]
800d50e: 2200 movs r2, #0
800d510: 721a strb r2, [r3, #8]
return status;
800d512: 7bfb ldrb r3, [r7, #15]
}
800d514: 4618 mov r0, r3
800d516: 3710 adds r7, #16
800d518: 46bd mov sp, r7
800d51a: bd80 pop {r7, pc}
0800d51c <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
800d51c: b580 push {r7, lr}
800d51e: b082 sub sp, #8
800d520: af00 add r7, sp, #0
800d522: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
800d524: 687b ldr r3, [r7, #4]
800d526: 2b00 cmp r3, #0
800d528: d101 bne.n 800d52e <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
800d52a: 2301 movs r3, #1
800d52c: e049 b.n 800d5c2 <HAL_TIM_Base_Init+0xa6>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
800d52e: 687b ldr r3, [r7, #4]
800d530: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
800d534: b2db uxtb r3, r3
800d536: 2b00 cmp r3, #0
800d538: d106 bne.n 800d548 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
800d53a: 687b ldr r3, [r7, #4]
800d53c: 2200 movs r2, #0
800d53e: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
800d542: 6878 ldr r0, [r7, #4]
800d544: f000 f841 bl 800d5ca <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
800d548: 687b ldr r3, [r7, #4]
800d54a: 2202 movs r2, #2
800d54c: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
800d550: 687b ldr r3, [r7, #4]
800d552: 681a ldr r2, [r3, #0]
800d554: 687b ldr r3, [r7, #4]
800d556: 3304 adds r3, #4
800d558: 4619 mov r1, r3
800d55a: 4610 mov r0, r2
800d55c: f000 f9e8 bl 800d930 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
800d560: 687b ldr r3, [r7, #4]
800d562: 2201 movs r2, #1
800d564: f883 2048 strb.w r2, [r3, #72] @ 0x48
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
800d568: 687b ldr r3, [r7, #4]
800d56a: 2201 movs r2, #1
800d56c: f883 203e strb.w r2, [r3, #62] @ 0x3e
800d570: 687b ldr r3, [r7, #4]
800d572: 2201 movs r2, #1
800d574: f883 203f strb.w r2, [r3, #63] @ 0x3f
800d578: 687b ldr r3, [r7, #4]
800d57a: 2201 movs r2, #1
800d57c: f883 2040 strb.w r2, [r3, #64] @ 0x40
800d580: 687b ldr r3, [r7, #4]
800d582: 2201 movs r2, #1
800d584: f883 2041 strb.w r2, [r3, #65] @ 0x41
800d588: 687b ldr r3, [r7, #4]
800d58a: 2201 movs r2, #1
800d58c: f883 2042 strb.w r2, [r3, #66] @ 0x42
800d590: 687b ldr r3, [r7, #4]
800d592: 2201 movs r2, #1
800d594: f883 2043 strb.w r2, [r3, #67] @ 0x43
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
800d598: 687b ldr r3, [r7, #4]
800d59a: 2201 movs r2, #1
800d59c: f883 2044 strb.w r2, [r3, #68] @ 0x44
800d5a0: 687b ldr r3, [r7, #4]
800d5a2: 2201 movs r2, #1
800d5a4: f883 2045 strb.w r2, [r3, #69] @ 0x45
800d5a8: 687b ldr r3, [r7, #4]
800d5aa: 2201 movs r2, #1
800d5ac: f883 2046 strb.w r2, [r3, #70] @ 0x46
800d5b0: 687b ldr r3, [r7, #4]
800d5b2: 2201 movs r2, #1
800d5b4: f883 2047 strb.w r2, [r3, #71] @ 0x47
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
800d5b8: 687b ldr r3, [r7, #4]
800d5ba: 2201 movs r2, #1
800d5bc: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800d5c0: 2300 movs r3, #0
}
800d5c2: 4618 mov r0, r3
800d5c4: 3708 adds r7, #8
800d5c6: 46bd mov sp, r7
800d5c8: bd80 pop {r7, pc}
0800d5ca <HAL_TIM_Base_MspInit>:
* @brief Initializes the TIM Base MSP.
* @param htim TIM Base handle
* @retval None
*/
__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
{
800d5ca: b480 push {r7}
800d5cc: b083 sub sp, #12
800d5ce: af00 add r7, sp, #0
800d5d0: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_Base_MspInit could be implemented in the user file
*/
}
800d5d2: bf00 nop
800d5d4: 370c adds r7, #12
800d5d6: 46bd mov sp, r7
800d5d8: f85d 7b04 ldr.w r7, [sp], #4
800d5dc: 4770 bx lr
...
0800d5e0 <HAL_TIM_Base_Start_IT>:
* @brief Starts the TIM Base generation in interrupt mode.
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
800d5e0: b480 push {r7}
800d5e2: b085 sub sp, #20
800d5e4: af00 add r7, sp, #0
800d5e6: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_INSTANCE(htim->Instance));
/* Check the TIM state */
if (htim->State != HAL_TIM_STATE_READY)
800d5e8: 687b ldr r3, [r7, #4]
800d5ea: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
800d5ee: b2db uxtb r3, r3
800d5f0: 2b01 cmp r3, #1
800d5f2: d001 beq.n 800d5f8 <HAL_TIM_Base_Start_IT+0x18>
{
return HAL_ERROR;
800d5f4: 2301 movs r3, #1
800d5f6: e054 b.n 800d6a2 <HAL_TIM_Base_Start_IT+0xc2>
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
800d5f8: 687b ldr r3, [r7, #4]
800d5fa: 2202 movs r2, #2
800d5fc: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Enable the TIM Update interrupt */
__HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
800d600: 687b ldr r3, [r7, #4]
800d602: 681b ldr r3, [r3, #0]
800d604: 68da ldr r2, [r3, #12]
800d606: 687b ldr r3, [r7, #4]
800d608: 681b ldr r3, [r3, #0]
800d60a: f042 0201 orr.w r2, r2, #1
800d60e: 60da str r2, [r3, #12]
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
800d610: 687b ldr r3, [r7, #4]
800d612: 681b ldr r3, [r3, #0]
800d614: 4a26 ldr r2, [pc, #152] @ (800d6b0 <HAL_TIM_Base_Start_IT+0xd0>)
800d616: 4293 cmp r3, r2
800d618: d022 beq.n 800d660 <HAL_TIM_Base_Start_IT+0x80>
800d61a: 687b ldr r3, [r7, #4]
800d61c: 681b ldr r3, [r3, #0]
800d61e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800d622: d01d beq.n 800d660 <HAL_TIM_Base_Start_IT+0x80>
800d624: 687b ldr r3, [r7, #4]
800d626: 681b ldr r3, [r3, #0]
800d628: 4a22 ldr r2, [pc, #136] @ (800d6b4 <HAL_TIM_Base_Start_IT+0xd4>)
800d62a: 4293 cmp r3, r2
800d62c: d018 beq.n 800d660 <HAL_TIM_Base_Start_IT+0x80>
800d62e: 687b ldr r3, [r7, #4]
800d630: 681b ldr r3, [r3, #0]
800d632: 4a21 ldr r2, [pc, #132] @ (800d6b8 <HAL_TIM_Base_Start_IT+0xd8>)
800d634: 4293 cmp r3, r2
800d636: d013 beq.n 800d660 <HAL_TIM_Base_Start_IT+0x80>
800d638: 687b ldr r3, [r7, #4]
800d63a: 681b ldr r3, [r3, #0]
800d63c: 4a1f ldr r2, [pc, #124] @ (800d6bc <HAL_TIM_Base_Start_IT+0xdc>)
800d63e: 4293 cmp r3, r2
800d640: d00e beq.n 800d660 <HAL_TIM_Base_Start_IT+0x80>
800d642: 687b ldr r3, [r7, #4]
800d644: 681b ldr r3, [r3, #0]
800d646: 4a1e ldr r2, [pc, #120] @ (800d6c0 <HAL_TIM_Base_Start_IT+0xe0>)
800d648: 4293 cmp r3, r2
800d64a: d009 beq.n 800d660 <HAL_TIM_Base_Start_IT+0x80>
800d64c: 687b ldr r3, [r7, #4]
800d64e: 681b ldr r3, [r3, #0]
800d650: 4a1c ldr r2, [pc, #112] @ (800d6c4 <HAL_TIM_Base_Start_IT+0xe4>)
800d652: 4293 cmp r3, r2
800d654: d004 beq.n 800d660 <HAL_TIM_Base_Start_IT+0x80>
800d656: 687b ldr r3, [r7, #4]
800d658: 681b ldr r3, [r3, #0]
800d65a: 4a1b ldr r2, [pc, #108] @ (800d6c8 <HAL_TIM_Base_Start_IT+0xe8>)
800d65c: 4293 cmp r3, r2
800d65e: d115 bne.n 800d68c <HAL_TIM_Base_Start_IT+0xac>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
800d660: 687b ldr r3, [r7, #4]
800d662: 681b ldr r3, [r3, #0]
800d664: 689a ldr r2, [r3, #8]
800d666: 4b19 ldr r3, [pc, #100] @ (800d6cc <HAL_TIM_Base_Start_IT+0xec>)
800d668: 4013 ands r3, r2
800d66a: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
800d66c: 68fb ldr r3, [r7, #12]
800d66e: 2b06 cmp r3, #6
800d670: d015 beq.n 800d69e <HAL_TIM_Base_Start_IT+0xbe>
800d672: 68fb ldr r3, [r7, #12]
800d674: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800d678: d011 beq.n 800d69e <HAL_TIM_Base_Start_IT+0xbe>
{
__HAL_TIM_ENABLE(htim);
800d67a: 687b ldr r3, [r7, #4]
800d67c: 681b ldr r3, [r3, #0]
800d67e: 681a ldr r2, [r3, #0]
800d680: 687b ldr r3, [r7, #4]
800d682: 681b ldr r3, [r3, #0]
800d684: f042 0201 orr.w r2, r2, #1
800d688: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
800d68a: e008 b.n 800d69e <HAL_TIM_Base_Start_IT+0xbe>
}
}
else
{
__HAL_TIM_ENABLE(htim);
800d68c: 687b ldr r3, [r7, #4]
800d68e: 681b ldr r3, [r3, #0]
800d690: 681a ldr r2, [r3, #0]
800d692: 687b ldr r3, [r7, #4]
800d694: 681b ldr r3, [r3, #0]
800d696: f042 0201 orr.w r2, r2, #1
800d69a: 601a str r2, [r3, #0]
800d69c: e000 b.n 800d6a0 <HAL_TIM_Base_Start_IT+0xc0>
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
800d69e: bf00 nop
}
/* Return function status */
return HAL_OK;
800d6a0: 2300 movs r3, #0
}
800d6a2: 4618 mov r0, r3
800d6a4: 3714 adds r7, #20
800d6a6: 46bd mov sp, r7
800d6a8: f85d 7b04 ldr.w r7, [sp], #4
800d6ac: 4770 bx lr
800d6ae: bf00 nop
800d6b0: 40010000 .word 0x40010000
800d6b4: 40000400 .word 0x40000400
800d6b8: 40000800 .word 0x40000800
800d6bc: 40000c00 .word 0x40000c00
800d6c0: 40010400 .word 0x40010400
800d6c4: 40001800 .word 0x40001800
800d6c8: 40014000 .word 0x40014000
800d6cc: 00010007 .word 0x00010007
0800d6d0 <HAL_TIM_IRQHandler>:
* @brief This function handles TIM interrupts requests.
* @param htim TIM handle
* @retval None
*/
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
800d6d0: b580 push {r7, lr}
800d6d2: b084 sub sp, #16
800d6d4: af00 add r7, sp, #0
800d6d6: 6078 str r0, [r7, #4]
uint32_t itsource = htim->Instance->DIER;
800d6d8: 687b ldr r3, [r7, #4]
800d6da: 681b ldr r3, [r3, #0]
800d6dc: 68db ldr r3, [r3, #12]
800d6de: 60fb str r3, [r7, #12]
uint32_t itflag = htim->Instance->SR;
800d6e0: 687b ldr r3, [r7, #4]
800d6e2: 681b ldr r3, [r3, #0]
800d6e4: 691b ldr r3, [r3, #16]
800d6e6: 60bb str r3, [r7, #8]
/* Capture compare 1 event */
if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
800d6e8: 68bb ldr r3, [r7, #8]
800d6ea: f003 0302 and.w r3, r3, #2
800d6ee: 2b00 cmp r3, #0
800d6f0: d020 beq.n 800d734 <HAL_TIM_IRQHandler+0x64>
{
if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
800d6f2: 68fb ldr r3, [r7, #12]
800d6f4: f003 0302 and.w r3, r3, #2
800d6f8: 2b00 cmp r3, #0
800d6fa: d01b beq.n 800d734 <HAL_TIM_IRQHandler+0x64>
{
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
800d6fc: 687b ldr r3, [r7, #4]
800d6fe: 681b ldr r3, [r3, #0]
800d700: f06f 0202 mvn.w r2, #2
800d704: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
800d706: 687b ldr r3, [r7, #4]
800d708: 2201 movs r2, #1
800d70a: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
800d70c: 687b ldr r3, [r7, #4]
800d70e: 681b ldr r3, [r3, #0]
800d710: 699b ldr r3, [r3, #24]
800d712: f003 0303 and.w r3, r3, #3
800d716: 2b00 cmp r3, #0
800d718: d003 beq.n 800d722 <HAL_TIM_IRQHandler+0x52>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
800d71a: 6878 ldr r0, [r7, #4]
800d71c: f000 f8e9 bl 800d8f2 <HAL_TIM_IC_CaptureCallback>
800d720: e005 b.n 800d72e <HAL_TIM_IRQHandler+0x5e>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
800d722: 6878 ldr r0, [r7, #4]
800d724: f000 f8db bl 800d8de <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
800d728: 6878 ldr r0, [r7, #4]
800d72a: f000 f8ec bl 800d906 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
800d72e: 687b ldr r3, [r7, #4]
800d730: 2200 movs r2, #0
800d732: 771a strb r2, [r3, #28]
}
}
}
/* Capture compare 2 event */
if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
800d734: 68bb ldr r3, [r7, #8]
800d736: f003 0304 and.w r3, r3, #4
800d73a: 2b00 cmp r3, #0
800d73c: d020 beq.n 800d780 <HAL_TIM_IRQHandler+0xb0>
{
if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
800d73e: 68fb ldr r3, [r7, #12]
800d740: f003 0304 and.w r3, r3, #4
800d744: 2b00 cmp r3, #0
800d746: d01b beq.n 800d780 <HAL_TIM_IRQHandler+0xb0>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
800d748: 687b ldr r3, [r7, #4]
800d74a: 681b ldr r3, [r3, #0]
800d74c: f06f 0204 mvn.w r2, #4
800d750: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
800d752: 687b ldr r3, [r7, #4]
800d754: 2202 movs r2, #2
800d756: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
800d758: 687b ldr r3, [r7, #4]
800d75a: 681b ldr r3, [r3, #0]
800d75c: 699b ldr r3, [r3, #24]
800d75e: f403 7340 and.w r3, r3, #768 @ 0x300
800d762: 2b00 cmp r3, #0
800d764: d003 beq.n 800d76e <HAL_TIM_IRQHandler+0x9e>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
800d766: 6878 ldr r0, [r7, #4]
800d768: f000 f8c3 bl 800d8f2 <HAL_TIM_IC_CaptureCallback>
800d76c: e005 b.n 800d77a <HAL_TIM_IRQHandler+0xaa>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
800d76e: 6878 ldr r0, [r7, #4]
800d770: f000 f8b5 bl 800d8de <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
800d774: 6878 ldr r0, [r7, #4]
800d776: f000 f8c6 bl 800d906 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
800d77a: 687b ldr r3, [r7, #4]
800d77c: 2200 movs r2, #0
800d77e: 771a strb r2, [r3, #28]
}
}
/* Capture compare 3 event */
if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
800d780: 68bb ldr r3, [r7, #8]
800d782: f003 0308 and.w r3, r3, #8
800d786: 2b00 cmp r3, #0
800d788: d020 beq.n 800d7cc <HAL_TIM_IRQHandler+0xfc>
{
if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
800d78a: 68fb ldr r3, [r7, #12]
800d78c: f003 0308 and.w r3, r3, #8
800d790: 2b00 cmp r3, #0
800d792: d01b beq.n 800d7cc <HAL_TIM_IRQHandler+0xfc>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
800d794: 687b ldr r3, [r7, #4]
800d796: 681b ldr r3, [r3, #0]
800d798: f06f 0208 mvn.w r2, #8
800d79c: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
800d79e: 687b ldr r3, [r7, #4]
800d7a0: 2204 movs r2, #4
800d7a2: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
800d7a4: 687b ldr r3, [r7, #4]
800d7a6: 681b ldr r3, [r3, #0]
800d7a8: 69db ldr r3, [r3, #28]
800d7aa: f003 0303 and.w r3, r3, #3
800d7ae: 2b00 cmp r3, #0
800d7b0: d003 beq.n 800d7ba <HAL_TIM_IRQHandler+0xea>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
800d7b2: 6878 ldr r0, [r7, #4]
800d7b4: f000 f89d bl 800d8f2 <HAL_TIM_IC_CaptureCallback>
800d7b8: e005 b.n 800d7c6 <HAL_TIM_IRQHandler+0xf6>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
800d7ba: 6878 ldr r0, [r7, #4]
800d7bc: f000 f88f bl 800d8de <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
800d7c0: 6878 ldr r0, [r7, #4]
800d7c2: f000 f8a0 bl 800d906 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
800d7c6: 687b ldr r3, [r7, #4]
800d7c8: 2200 movs r2, #0
800d7ca: 771a strb r2, [r3, #28]
}
}
/* Capture compare 4 event */
if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
800d7cc: 68bb ldr r3, [r7, #8]
800d7ce: f003 0310 and.w r3, r3, #16
800d7d2: 2b00 cmp r3, #0
800d7d4: d020 beq.n 800d818 <HAL_TIM_IRQHandler+0x148>
{
if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
800d7d6: 68fb ldr r3, [r7, #12]
800d7d8: f003 0310 and.w r3, r3, #16
800d7dc: 2b00 cmp r3, #0
800d7de: d01b beq.n 800d818 <HAL_TIM_IRQHandler+0x148>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
800d7e0: 687b ldr r3, [r7, #4]
800d7e2: 681b ldr r3, [r3, #0]
800d7e4: f06f 0210 mvn.w r2, #16
800d7e8: 611a str r2, [r3, #16]
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
800d7ea: 687b ldr r3, [r7, #4]
800d7ec: 2208 movs r2, #8
800d7ee: 771a strb r2, [r3, #28]
/* Input capture event */
if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
800d7f0: 687b ldr r3, [r7, #4]
800d7f2: 681b ldr r3, [r3, #0]
800d7f4: 69db ldr r3, [r3, #28]
800d7f6: f403 7340 and.w r3, r3, #768 @ 0x300
800d7fa: 2b00 cmp r3, #0
800d7fc: d003 beq.n 800d806 <HAL_TIM_IRQHandler+0x136>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->IC_CaptureCallback(htim);
#else
HAL_TIM_IC_CaptureCallback(htim);
800d7fe: 6878 ldr r0, [r7, #4]
800d800: f000 f877 bl 800d8f2 <HAL_TIM_IC_CaptureCallback>
800d804: e005 b.n 800d812 <HAL_TIM_IRQHandler+0x142>
{
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->OC_DelayElapsedCallback(htim);
htim->PWM_PulseFinishedCallback(htim);
#else
HAL_TIM_OC_DelayElapsedCallback(htim);
800d806: 6878 ldr r0, [r7, #4]
800d808: f000 f869 bl 800d8de <HAL_TIM_OC_DelayElapsedCallback>
HAL_TIM_PWM_PulseFinishedCallback(htim);
800d80c: 6878 ldr r0, [r7, #4]
800d80e: f000 f87a bl 800d906 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
800d812: 687b ldr r3, [r7, #4]
800d814: 2200 movs r2, #0
800d816: 771a strb r2, [r3, #28]
}
}
/* TIM Update event */
if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
800d818: 68bb ldr r3, [r7, #8]
800d81a: f003 0301 and.w r3, r3, #1
800d81e: 2b00 cmp r3, #0
800d820: d00c beq.n 800d83c <HAL_TIM_IRQHandler+0x16c>
{
if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
800d822: 68fb ldr r3, [r7, #12]
800d824: f003 0301 and.w r3, r3, #1
800d828: 2b00 cmp r3, #0
800d82a: d007 beq.n 800d83c <HAL_TIM_IRQHandler+0x16c>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
800d82c: 687b ldr r3, [r7, #4]
800d82e: 681b ldr r3, [r3, #0]
800d830: f06f 0201 mvn.w r2, #1
800d834: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->PeriodElapsedCallback(htim);
#else
HAL_TIM_PeriodElapsedCallback(htim);
800d836: 6878 ldr r0, [r7, #4]
800d838: f7f4 ff6c bl 8002714 <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Break input event */
if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
800d83c: 68bb ldr r3, [r7, #8]
800d83e: f003 0380 and.w r3, r3, #128 @ 0x80
800d842: 2b00 cmp r3, #0
800d844: d104 bne.n 800d850 <HAL_TIM_IRQHandler+0x180>
((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK)))
800d846: 68bb ldr r3, [r7, #8]
800d848: f403 5300 and.w r3, r3, #8192 @ 0x2000
if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
800d84c: 2b00 cmp r3, #0
800d84e: d00c beq.n 800d86a <HAL_TIM_IRQHandler+0x19a>
{
if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
800d850: 68fb ldr r3, [r7, #12]
800d852: f003 0380 and.w r3, r3, #128 @ 0x80
800d856: 2b00 cmp r3, #0
800d858: d007 beq.n 800d86a <HAL_TIM_IRQHandler+0x19a>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK);
800d85a: 687b ldr r3, [r7, #4]
800d85c: 681b ldr r3, [r3, #0]
800d85e: f46f 5202 mvn.w r2, #8320 @ 0x2080
800d862: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->BreakCallback(htim);
#else
HAL_TIMEx_BreakCallback(htim);
800d864: 6878 ldr r0, [r7, #4]
800d866: f000 f913 bl 800da90 <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Break2 input event */
if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2))
800d86a: 68bb ldr r3, [r7, #8]
800d86c: f403 7380 and.w r3, r3, #256 @ 0x100
800d870: 2b00 cmp r3, #0
800d872: d00c beq.n 800d88e <HAL_TIM_IRQHandler+0x1be>
{
if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
800d874: 68fb ldr r3, [r7, #12]
800d876: f003 0380 and.w r3, r3, #128 @ 0x80
800d87a: 2b00 cmp r3, #0
800d87c: d007 beq.n 800d88e <HAL_TIM_IRQHandler+0x1be>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
800d87e: 687b ldr r3, [r7, #4]
800d880: 681b ldr r3, [r3, #0]
800d882: f46f 7280 mvn.w r2, #256 @ 0x100
800d886: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->Break2Callback(htim);
#else
HAL_TIMEx_Break2Callback(htim);
800d888: 6878 ldr r0, [r7, #4]
800d88a: f000 f90b bl 800daa4 <HAL_TIMEx_Break2Callback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM Trigger detection event */
if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
800d88e: 68bb ldr r3, [r7, #8]
800d890: f003 0340 and.w r3, r3, #64 @ 0x40
800d894: 2b00 cmp r3, #0
800d896: d00c beq.n 800d8b2 <HAL_TIM_IRQHandler+0x1e2>
{
if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
800d898: 68fb ldr r3, [r7, #12]
800d89a: f003 0340 and.w r3, r3, #64 @ 0x40
800d89e: 2b00 cmp r3, #0
800d8a0: d007 beq.n 800d8b2 <HAL_TIM_IRQHandler+0x1e2>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
800d8a2: 687b ldr r3, [r7, #4]
800d8a4: 681b ldr r3, [r3, #0]
800d8a6: f06f 0240 mvn.w r2, #64 @ 0x40
800d8aa: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->TriggerCallback(htim);
#else
HAL_TIM_TriggerCallback(htim);
800d8ac: 6878 ldr r0, [r7, #4]
800d8ae: f000 f834 bl 800d91a <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
/* TIM commutation event */
if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
800d8b2: 68bb ldr r3, [r7, #8]
800d8b4: f003 0320 and.w r3, r3, #32
800d8b8: 2b00 cmp r3, #0
800d8ba: d00c beq.n 800d8d6 <HAL_TIM_IRQHandler+0x206>
{
if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
800d8bc: 68fb ldr r3, [r7, #12]
800d8be: f003 0320 and.w r3, r3, #32
800d8c2: 2b00 cmp r3, #0
800d8c4: d007 beq.n 800d8d6 <HAL_TIM_IRQHandler+0x206>
{
__HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
800d8c6: 687b ldr r3, [r7, #4]
800d8c8: 681b ldr r3, [r3, #0]
800d8ca: f06f 0220 mvn.w r2, #32
800d8ce: 611a str r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
htim->CommutationCallback(htim);
#else
HAL_TIMEx_CommutCallback(htim);
800d8d0: 6878 ldr r0, [r7, #4]
800d8d2: f000 f8d3 bl 800da7c <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
}
}
800d8d6: bf00 nop
800d8d8: 3710 adds r7, #16
800d8da: 46bd mov sp, r7
800d8dc: bd80 pop {r7, pc}
0800d8de <HAL_TIM_OC_DelayElapsedCallback>:
* @brief Output Compare callback in non-blocking mode
* @param htim TIM OC handle
* @retval None
*/
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
800d8de: b480 push {r7}
800d8e0: b083 sub sp, #12
800d8e2: af00 add r7, sp, #0
800d8e4: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
*/
}
800d8e6: bf00 nop
800d8e8: 370c adds r7, #12
800d8ea: 46bd mov sp, r7
800d8ec: f85d 7b04 ldr.w r7, [sp], #4
800d8f0: 4770 bx lr
0800d8f2 <HAL_TIM_IC_CaptureCallback>:
* @brief Input Capture callback in non-blocking mode
* @param htim TIM IC handle
* @retval None
*/
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
800d8f2: b480 push {r7}
800d8f4: b083 sub sp, #12
800d8f6: af00 add r7, sp, #0
800d8f8: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_IC_CaptureCallback could be implemented in the user file
*/
}
800d8fa: bf00 nop
800d8fc: 370c adds r7, #12
800d8fe: 46bd mov sp, r7
800d900: f85d 7b04 ldr.w r7, [sp], #4
800d904: 4770 bx lr
0800d906 <HAL_TIM_PWM_PulseFinishedCallback>:
* @brief PWM Pulse finished callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
800d906: b480 push {r7}
800d908: b083 sub sp, #12
800d90a: af00 add r7, sp, #0
800d90c: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
*/
}
800d90e: bf00 nop
800d910: 370c adds r7, #12
800d912: 46bd mov sp, r7
800d914: f85d 7b04 ldr.w r7, [sp], #4
800d918: 4770 bx lr
0800d91a <HAL_TIM_TriggerCallback>:
* @brief Hall Trigger detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
800d91a: b480 push {r7}
800d91c: b083 sub sp, #12
800d91e: af00 add r7, sp, #0
800d920: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_TriggerCallback could be implemented in the user file
*/
}
800d922: bf00 nop
800d924: 370c adds r7, #12
800d926: 46bd mov sp, r7
800d928: f85d 7b04 ldr.w r7, [sp], #4
800d92c: 4770 bx lr
...
0800d930 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
800d930: b480 push {r7}
800d932: b085 sub sp, #20
800d934: af00 add r7, sp, #0
800d936: 6078 str r0, [r7, #4]
800d938: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
800d93a: 687b ldr r3, [r7, #4]
800d93c: 681b ldr r3, [r3, #0]
800d93e: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
800d940: 687b ldr r3, [r7, #4]
800d942: 4a46 ldr r2, [pc, #280] @ (800da5c <TIM_Base_SetConfig+0x12c>)
800d944: 4293 cmp r3, r2
800d946: d013 beq.n 800d970 <TIM_Base_SetConfig+0x40>
800d948: 687b ldr r3, [r7, #4]
800d94a: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800d94e: d00f beq.n 800d970 <TIM_Base_SetConfig+0x40>
800d950: 687b ldr r3, [r7, #4]
800d952: 4a43 ldr r2, [pc, #268] @ (800da60 <TIM_Base_SetConfig+0x130>)
800d954: 4293 cmp r3, r2
800d956: d00b beq.n 800d970 <TIM_Base_SetConfig+0x40>
800d958: 687b ldr r3, [r7, #4]
800d95a: 4a42 ldr r2, [pc, #264] @ (800da64 <TIM_Base_SetConfig+0x134>)
800d95c: 4293 cmp r3, r2
800d95e: d007 beq.n 800d970 <TIM_Base_SetConfig+0x40>
800d960: 687b ldr r3, [r7, #4]
800d962: 4a41 ldr r2, [pc, #260] @ (800da68 <TIM_Base_SetConfig+0x138>)
800d964: 4293 cmp r3, r2
800d966: d003 beq.n 800d970 <TIM_Base_SetConfig+0x40>
800d968: 687b ldr r3, [r7, #4]
800d96a: 4a40 ldr r2, [pc, #256] @ (800da6c <TIM_Base_SetConfig+0x13c>)
800d96c: 4293 cmp r3, r2
800d96e: d108 bne.n 800d982 <TIM_Base_SetConfig+0x52>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
800d970: 68fb ldr r3, [r7, #12]
800d972: f023 0370 bic.w r3, r3, #112 @ 0x70
800d976: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
800d978: 683b ldr r3, [r7, #0]
800d97a: 685b ldr r3, [r3, #4]
800d97c: 68fa ldr r2, [r7, #12]
800d97e: 4313 orrs r3, r2
800d980: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
800d982: 687b ldr r3, [r7, #4]
800d984: 4a35 ldr r2, [pc, #212] @ (800da5c <TIM_Base_SetConfig+0x12c>)
800d986: 4293 cmp r3, r2
800d988: d01f beq.n 800d9ca <TIM_Base_SetConfig+0x9a>
800d98a: 687b ldr r3, [r7, #4]
800d98c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800d990: d01b beq.n 800d9ca <TIM_Base_SetConfig+0x9a>
800d992: 687b ldr r3, [r7, #4]
800d994: 4a32 ldr r2, [pc, #200] @ (800da60 <TIM_Base_SetConfig+0x130>)
800d996: 4293 cmp r3, r2
800d998: d017 beq.n 800d9ca <TIM_Base_SetConfig+0x9a>
800d99a: 687b ldr r3, [r7, #4]
800d99c: 4a31 ldr r2, [pc, #196] @ (800da64 <TIM_Base_SetConfig+0x134>)
800d99e: 4293 cmp r3, r2
800d9a0: d013 beq.n 800d9ca <TIM_Base_SetConfig+0x9a>
800d9a2: 687b ldr r3, [r7, #4]
800d9a4: 4a30 ldr r2, [pc, #192] @ (800da68 <TIM_Base_SetConfig+0x138>)
800d9a6: 4293 cmp r3, r2
800d9a8: d00f beq.n 800d9ca <TIM_Base_SetConfig+0x9a>
800d9aa: 687b ldr r3, [r7, #4]
800d9ac: 4a2f ldr r2, [pc, #188] @ (800da6c <TIM_Base_SetConfig+0x13c>)
800d9ae: 4293 cmp r3, r2
800d9b0: d00b beq.n 800d9ca <TIM_Base_SetConfig+0x9a>
800d9b2: 687b ldr r3, [r7, #4]
800d9b4: 4a2e ldr r2, [pc, #184] @ (800da70 <TIM_Base_SetConfig+0x140>)
800d9b6: 4293 cmp r3, r2
800d9b8: d007 beq.n 800d9ca <TIM_Base_SetConfig+0x9a>
800d9ba: 687b ldr r3, [r7, #4]
800d9bc: 4a2d ldr r2, [pc, #180] @ (800da74 <TIM_Base_SetConfig+0x144>)
800d9be: 4293 cmp r3, r2
800d9c0: d003 beq.n 800d9ca <TIM_Base_SetConfig+0x9a>
800d9c2: 687b ldr r3, [r7, #4]
800d9c4: 4a2c ldr r2, [pc, #176] @ (800da78 <TIM_Base_SetConfig+0x148>)
800d9c6: 4293 cmp r3, r2
800d9c8: d108 bne.n 800d9dc <TIM_Base_SetConfig+0xac>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
800d9ca: 68fb ldr r3, [r7, #12]
800d9cc: f423 7340 bic.w r3, r3, #768 @ 0x300
800d9d0: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
800d9d2: 683b ldr r3, [r7, #0]
800d9d4: 68db ldr r3, [r3, #12]
800d9d6: 68fa ldr r2, [r7, #12]
800d9d8: 4313 orrs r3, r2
800d9da: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
800d9dc: 68fb ldr r3, [r7, #12]
800d9de: f023 0280 bic.w r2, r3, #128 @ 0x80
800d9e2: 683b ldr r3, [r7, #0]
800d9e4: 695b ldr r3, [r3, #20]
800d9e6: 4313 orrs r3, r2
800d9e8: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
800d9ea: 687b ldr r3, [r7, #4]
800d9ec: 68fa ldr r2, [r7, #12]
800d9ee: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
800d9f0: 683b ldr r3, [r7, #0]
800d9f2: 689a ldr r2, [r3, #8]
800d9f4: 687b ldr r3, [r7, #4]
800d9f6: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
800d9f8: 683b ldr r3, [r7, #0]
800d9fa: 681a ldr r2, [r3, #0]
800d9fc: 687b ldr r3, [r7, #4]
800d9fe: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
800da00: 687b ldr r3, [r7, #4]
800da02: 4a16 ldr r2, [pc, #88] @ (800da5c <TIM_Base_SetConfig+0x12c>)
800da04: 4293 cmp r3, r2
800da06: d00f beq.n 800da28 <TIM_Base_SetConfig+0xf8>
800da08: 687b ldr r3, [r7, #4]
800da0a: 4a18 ldr r2, [pc, #96] @ (800da6c <TIM_Base_SetConfig+0x13c>)
800da0c: 4293 cmp r3, r2
800da0e: d00b beq.n 800da28 <TIM_Base_SetConfig+0xf8>
800da10: 687b ldr r3, [r7, #4]
800da12: 4a17 ldr r2, [pc, #92] @ (800da70 <TIM_Base_SetConfig+0x140>)
800da14: 4293 cmp r3, r2
800da16: d007 beq.n 800da28 <TIM_Base_SetConfig+0xf8>
800da18: 687b ldr r3, [r7, #4]
800da1a: 4a16 ldr r2, [pc, #88] @ (800da74 <TIM_Base_SetConfig+0x144>)
800da1c: 4293 cmp r3, r2
800da1e: d003 beq.n 800da28 <TIM_Base_SetConfig+0xf8>
800da20: 687b ldr r3, [r7, #4]
800da22: 4a15 ldr r2, [pc, #84] @ (800da78 <TIM_Base_SetConfig+0x148>)
800da24: 4293 cmp r3, r2
800da26: d103 bne.n 800da30 <TIM_Base_SetConfig+0x100>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
800da28: 683b ldr r3, [r7, #0]
800da2a: 691a ldr r2, [r3, #16]
800da2c: 687b ldr r3, [r7, #4]
800da2e: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
800da30: 687b ldr r3, [r7, #4]
800da32: 2201 movs r2, #1
800da34: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
800da36: 687b ldr r3, [r7, #4]
800da38: 691b ldr r3, [r3, #16]
800da3a: f003 0301 and.w r3, r3, #1
800da3e: 2b01 cmp r3, #1
800da40: d105 bne.n 800da4e <TIM_Base_SetConfig+0x11e>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
800da42: 687b ldr r3, [r7, #4]
800da44: 691b ldr r3, [r3, #16]
800da46: f023 0201 bic.w r2, r3, #1
800da4a: 687b ldr r3, [r7, #4]
800da4c: 611a str r2, [r3, #16]
}
}
800da4e: bf00 nop
800da50: 3714 adds r7, #20
800da52: 46bd mov sp, r7
800da54: f85d 7b04 ldr.w r7, [sp], #4
800da58: 4770 bx lr
800da5a: bf00 nop
800da5c: 40010000 .word 0x40010000
800da60: 40000400 .word 0x40000400
800da64: 40000800 .word 0x40000800
800da68: 40000c00 .word 0x40000c00
800da6c: 40010400 .word 0x40010400
800da70: 40014000 .word 0x40014000
800da74: 40014400 .word 0x40014400
800da78: 40014800 .word 0x40014800
0800da7c <HAL_TIMEx_CommutCallback>:
* @brief Commutation callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
800da7c: b480 push {r7}
800da7e: b083 sub sp, #12
800da80: af00 add r7, sp, #0
800da82: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_CommutCallback could be implemented in the user file
*/
}
800da84: bf00 nop
800da86: 370c adds r7, #12
800da88: 46bd mov sp, r7
800da8a: f85d 7b04 ldr.w r7, [sp], #4
800da8e: 4770 bx lr
0800da90 <HAL_TIMEx_BreakCallback>:
* @brief Break detection callback in non-blocking mode
* @param htim TIM handle
* @retval None
*/
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
800da90: b480 push {r7}
800da92: b083 sub sp, #12
800da94: af00 add r7, sp, #0
800da96: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIMEx_BreakCallback could be implemented in the user file
*/
}
800da98: bf00 nop
800da9a: 370c adds r7, #12
800da9c: 46bd mov sp, r7
800da9e: f85d 7b04 ldr.w r7, [sp], #4
800daa2: 4770 bx lr
0800daa4 <HAL_TIMEx_Break2Callback>:
* @brief Break2 detection callback in non blocking mode
* @param htim: TIM handle
* @retval None
*/
__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
{
800daa4: b480 push {r7}
800daa6: b083 sub sp, #12
800daa8: af00 add r7, sp, #0
800daaa: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function Should not be modified, when the callback is needed,
the HAL_TIMEx_Break2Callback could be implemented in the user file
*/
}
800daac: bf00 nop
800daae: 370c adds r7, #12
800dab0: 46bd mov sp, r7
800dab2: f85d 7b04 ldr.w r7, [sp], #4
800dab6: 4770 bx lr
0800dab8 <HAL_UART_Init>:
* parameters in the UART_InitTypeDef and initialize the associated handle.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
800dab8: b580 push {r7, lr}
800daba: b082 sub sp, #8
800dabc: af00 add r7, sp, #0
800dabe: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
800dac0: 687b ldr r3, [r7, #4]
800dac2: 2b00 cmp r3, #0
800dac4: d101 bne.n 800daca <HAL_UART_Init+0x12>
{
return HAL_ERROR;
800dac6: 2301 movs r3, #1
800dac8: e042 b.n 800db50 <HAL_UART_Init+0x98>
{
/* Check the parameters */
assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
}
if (huart->gState == HAL_UART_STATE_RESET)
800daca: 687b ldr r3, [r7, #4]
800dacc: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800dad0: 2b00 cmp r3, #0
800dad2: d106 bne.n 800dae2 <HAL_UART_Init+0x2a>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
800dad4: 687b ldr r3, [r7, #4]
800dad6: 2200 movs r2, #0
800dad8: f883 2084 strb.w r2, [r3, #132] @ 0x84
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
800dadc: 6878 ldr r0, [r7, #4]
800dade: f7f6 f8d1 bl 8003c84 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
800dae2: 687b ldr r3, [r7, #4]
800dae4: 2224 movs r2, #36 @ 0x24
800dae6: f8c3 2088 str.w r2, [r3, #136] @ 0x88
__HAL_UART_DISABLE(huart);
800daea: 687b ldr r3, [r7, #4]
800daec: 681b ldr r3, [r3, #0]
800daee: 681a ldr r2, [r3, #0]
800daf0: 687b ldr r3, [r7, #4]
800daf2: 681b ldr r3, [r3, #0]
800daf4: f022 0201 bic.w r2, r2, #1
800daf8: 601a str r2, [r3, #0]
/* Perform advanced settings configuration */
/* For some items, configuration requires to be done prior TE and RE bits are set */
if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
800dafa: 687b ldr r3, [r7, #4]
800dafc: 6a9b ldr r3, [r3, #40] @ 0x28
800dafe: 2b00 cmp r3, #0
800db00: d002 beq.n 800db08 <HAL_UART_Init+0x50>
{
UART_AdvFeatureConfig(huart);
800db02: 6878 ldr r0, [r7, #4]
800db04: f001 f9e8 bl 800eed8 <UART_AdvFeatureConfig>
}
/* Set the UART Communication parameters */
if (UART_SetConfig(huart) == HAL_ERROR)
800db08: 6878 ldr r0, [r7, #4]
800db0a: f000 fc7d bl 800e408 <UART_SetConfig>
800db0e: 4603 mov r3, r0
800db10: 2b01 cmp r3, #1
800db12: d101 bne.n 800db18 <HAL_UART_Init+0x60>
{
return HAL_ERROR;
800db14: 2301 movs r3, #1
800db16: e01b b.n 800db50 <HAL_UART_Init+0x98>
}
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
800db18: 687b ldr r3, [r7, #4]
800db1a: 681b ldr r3, [r3, #0]
800db1c: 685a ldr r2, [r3, #4]
800db1e: 687b ldr r3, [r7, #4]
800db20: 681b ldr r3, [r3, #0]
800db22: f422 4290 bic.w r2, r2, #18432 @ 0x4800
800db26: 605a str r2, [r3, #4]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
800db28: 687b ldr r3, [r7, #4]
800db2a: 681b ldr r3, [r3, #0]
800db2c: 689a ldr r2, [r3, #8]
800db2e: 687b ldr r3, [r7, #4]
800db30: 681b ldr r3, [r3, #0]
800db32: f022 022a bic.w r2, r2, #42 @ 0x2a
800db36: 609a str r2, [r3, #8]
__HAL_UART_ENABLE(huart);
800db38: 687b ldr r3, [r7, #4]
800db3a: 681b ldr r3, [r3, #0]
800db3c: 681a ldr r2, [r3, #0]
800db3e: 687b ldr r3, [r7, #4]
800db40: 681b ldr r3, [r3, #0]
800db42: f042 0201 orr.w r2, r2, #1
800db46: 601a str r2, [r3, #0]
/* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
return (UART_CheckIdleState(huart));
800db48: 6878 ldr r0, [r7, #4]
800db4a: f001 fa67 bl 800f01c <UART_CheckIdleState>
800db4e: 4603 mov r3, r0
}
800db50: 4618 mov r0, r3
800db52: 3708 adds r7, #8
800db54: 46bd mov sp, r7
800db56: bd80 pop {r7, pc}
0800db58 <HAL_UART_Transmit_IT>:
* @param pData Pointer to data buffer (u8 or u16 data elements).
* @param Size Amount of data elements (u8 or u16) to be sent.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
{
800db58: b480 push {r7}
800db5a: b091 sub sp, #68 @ 0x44
800db5c: af00 add r7, sp, #0
800db5e: 60f8 str r0, [r7, #12]
800db60: 60b9 str r1, [r7, #8]
800db62: 4613 mov r3, r2
800db64: 80fb strh r3, [r7, #6]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
800db66: 68fb ldr r3, [r7, #12]
800db68: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800db6c: 2b20 cmp r3, #32
800db6e: d178 bne.n 800dc62 <HAL_UART_Transmit_IT+0x10a>
{
if ((pData == NULL) || (Size == 0U))
800db70: 68bb ldr r3, [r7, #8]
800db72: 2b00 cmp r3, #0
800db74: d002 beq.n 800db7c <HAL_UART_Transmit_IT+0x24>
800db76: 88fb ldrh r3, [r7, #6]
800db78: 2b00 cmp r3, #0
800db7a: d101 bne.n 800db80 <HAL_UART_Transmit_IT+0x28>
{
return HAL_ERROR;
800db7c: 2301 movs r3, #1
800db7e: e071 b.n 800dc64 <HAL_UART_Transmit_IT+0x10c>
}
huart->pTxBuffPtr = pData;
800db80: 68fb ldr r3, [r7, #12]
800db82: 68ba ldr r2, [r7, #8]
800db84: 651a str r2, [r3, #80] @ 0x50
huart->TxXferSize = Size;
800db86: 68fb ldr r3, [r7, #12]
800db88: 88fa ldrh r2, [r7, #6]
800db8a: f8a3 2054 strh.w r2, [r3, #84] @ 0x54
huart->TxXferCount = Size;
800db8e: 68fb ldr r3, [r7, #12]
800db90: 88fa ldrh r2, [r7, #6]
800db92: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
huart->TxISR = NULL;
800db96: 68fb ldr r3, [r7, #12]
800db98: 2200 movs r2, #0
800db9a: 679a str r2, [r3, #120] @ 0x78
huart->ErrorCode = HAL_UART_ERROR_NONE;
800db9c: 68fb ldr r3, [r7, #12]
800db9e: 2200 movs r2, #0
800dba0: f8c3 2090 str.w r2, [r3, #144] @ 0x90
huart->gState = HAL_UART_STATE_BUSY_TX;
800dba4: 68fb ldr r3, [r7, #12]
800dba6: 2221 movs r2, #33 @ 0x21
800dba8: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Configure Tx interrupt processing */
if (huart->FifoMode == UART_FIFOMODE_ENABLE)
800dbac: 68fb ldr r3, [r7, #12]
800dbae: 6e5b ldr r3, [r3, #100] @ 0x64
800dbb0: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800dbb4: d12a bne.n 800dc0c <HAL_UART_Transmit_IT+0xb4>
{
/* Set the Tx ISR function pointer according to the data word length */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
800dbb6: 68fb ldr r3, [r7, #12]
800dbb8: 689b ldr r3, [r3, #8]
800dbba: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800dbbe: d107 bne.n 800dbd0 <HAL_UART_Transmit_IT+0x78>
800dbc0: 68fb ldr r3, [r7, #12]
800dbc2: 691b ldr r3, [r3, #16]
800dbc4: 2b00 cmp r3, #0
800dbc6: d103 bne.n 800dbd0 <HAL_UART_Transmit_IT+0x78>
{
huart->TxISR = UART_TxISR_16BIT_FIFOEN;
800dbc8: 68fb ldr r3, [r7, #12]
800dbca: 4a29 ldr r2, [pc, #164] @ (800dc70 <HAL_UART_Transmit_IT+0x118>)
800dbcc: 679a str r2, [r3, #120] @ 0x78
800dbce: e002 b.n 800dbd6 <HAL_UART_Transmit_IT+0x7e>
}
else
{
huart->TxISR = UART_TxISR_8BIT_FIFOEN;
800dbd0: 68fb ldr r3, [r7, #12]
800dbd2: 4a28 ldr r2, [pc, #160] @ (800dc74 <HAL_UART_Transmit_IT+0x11c>)
800dbd4: 679a str r2, [r3, #120] @ 0x78
}
/* Enable the TX FIFO threshold interrupt */
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
800dbd6: 68fb ldr r3, [r7, #12]
800dbd8: 681b ldr r3, [r3, #0]
800dbda: 3308 adds r3, #8
800dbdc: 62bb str r3, [r7, #40] @ 0x28
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800dbde: 6abb ldr r3, [r7, #40] @ 0x28
800dbe0: e853 3f00 ldrex r3, [r3]
800dbe4: 627b str r3, [r7, #36] @ 0x24
return(result);
800dbe6: 6a7b ldr r3, [r7, #36] @ 0x24
800dbe8: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800dbec: 63bb str r3, [r7, #56] @ 0x38
800dbee: 68fb ldr r3, [r7, #12]
800dbf0: 681b ldr r3, [r3, #0]
800dbf2: 3308 adds r3, #8
800dbf4: 6bba ldr r2, [r7, #56] @ 0x38
800dbf6: 637a str r2, [r7, #52] @ 0x34
800dbf8: 633b str r3, [r7, #48] @ 0x30
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800dbfa: 6b39 ldr r1, [r7, #48] @ 0x30
800dbfc: 6b7a ldr r2, [r7, #52] @ 0x34
800dbfe: e841 2300 strex r3, r2, [r1]
800dc02: 62fb str r3, [r7, #44] @ 0x2c
return(result);
800dc04: 6afb ldr r3, [r7, #44] @ 0x2c
800dc06: 2b00 cmp r3, #0
800dc08: d1e5 bne.n 800dbd6 <HAL_UART_Transmit_IT+0x7e>
800dc0a: e028 b.n 800dc5e <HAL_UART_Transmit_IT+0x106>
}
else
{
/* Set the Tx ISR function pointer according to the data word length */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
800dc0c: 68fb ldr r3, [r7, #12]
800dc0e: 689b ldr r3, [r3, #8]
800dc10: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800dc14: d107 bne.n 800dc26 <HAL_UART_Transmit_IT+0xce>
800dc16: 68fb ldr r3, [r7, #12]
800dc18: 691b ldr r3, [r3, #16]
800dc1a: 2b00 cmp r3, #0
800dc1c: d103 bne.n 800dc26 <HAL_UART_Transmit_IT+0xce>
{
huart->TxISR = UART_TxISR_16BIT;
800dc1e: 68fb ldr r3, [r7, #12]
800dc20: 4a15 ldr r2, [pc, #84] @ (800dc78 <HAL_UART_Transmit_IT+0x120>)
800dc22: 679a str r2, [r3, #120] @ 0x78
800dc24: e002 b.n 800dc2c <HAL_UART_Transmit_IT+0xd4>
}
else
{
huart->TxISR = UART_TxISR_8BIT;
800dc26: 68fb ldr r3, [r7, #12]
800dc28: 4a14 ldr r2, [pc, #80] @ (800dc7c <HAL_UART_Transmit_IT+0x124>)
800dc2a: 679a str r2, [r3, #120] @ 0x78
}
/* Enable the Transmit Data Register Empty interrupt */
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
800dc2c: 68fb ldr r3, [r7, #12]
800dc2e: 681b ldr r3, [r3, #0]
800dc30: 617b str r3, [r7, #20]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800dc32: 697b ldr r3, [r7, #20]
800dc34: e853 3f00 ldrex r3, [r3]
800dc38: 613b str r3, [r7, #16]
return(result);
800dc3a: 693b ldr r3, [r7, #16]
800dc3c: f043 0380 orr.w r3, r3, #128 @ 0x80
800dc40: 63fb str r3, [r7, #60] @ 0x3c
800dc42: 68fb ldr r3, [r7, #12]
800dc44: 681b ldr r3, [r3, #0]
800dc46: 461a mov r2, r3
800dc48: 6bfb ldr r3, [r7, #60] @ 0x3c
800dc4a: 623b str r3, [r7, #32]
800dc4c: 61fa str r2, [r7, #28]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800dc4e: 69f9 ldr r1, [r7, #28]
800dc50: 6a3a ldr r2, [r7, #32]
800dc52: e841 2300 strex r3, r2, [r1]
800dc56: 61bb str r3, [r7, #24]
return(result);
800dc58: 69bb ldr r3, [r7, #24]
800dc5a: 2b00 cmp r3, #0
800dc5c: d1e6 bne.n 800dc2c <HAL_UART_Transmit_IT+0xd4>
}
return HAL_OK;
800dc5e: 2300 movs r3, #0
800dc60: e000 b.n 800dc64 <HAL_UART_Transmit_IT+0x10c>
}
else
{
return HAL_BUSY;
800dc62: 2302 movs r3, #2
}
}
800dc64: 4618 mov r0, r3
800dc66: 3744 adds r7, #68 @ 0x44
800dc68: 46bd mov sp, r7
800dc6a: f85d 7b04 ldr.w r7, [sp], #4
800dc6e: 4770 bx lr
800dc70: 0800f7e3 .word 0x0800f7e3
800dc74: 0800f703 .word 0x0800f703
800dc78: 0800f641 .word 0x0800f641
800dc7c: 0800f589 .word 0x0800f589
0800dc80 <HAL_UART_IRQHandler>:
* @brief Handle UART interrupt request.
* @param huart UART handle.
* @retval None
*/
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
{
800dc80: b580 push {r7, lr}
800dc82: b0ba sub sp, #232 @ 0xe8
800dc84: af00 add r7, sp, #0
800dc86: 6078 str r0, [r7, #4]
uint32_t isrflags = READ_REG(huart->Instance->ISR);
800dc88: 687b ldr r3, [r7, #4]
800dc8a: 681b ldr r3, [r3, #0]
800dc8c: 69db ldr r3, [r3, #28]
800dc8e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
uint32_t cr1its = READ_REG(huart->Instance->CR1);
800dc92: 687b ldr r3, [r7, #4]
800dc94: 681b ldr r3, [r3, #0]
800dc96: 681b ldr r3, [r3, #0]
800dc98: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
uint32_t cr3its = READ_REG(huart->Instance->CR3);
800dc9c: 687b ldr r3, [r7, #4]
800dc9e: 681b ldr r3, [r3, #0]
800dca0: 689b ldr r3, [r3, #8]
800dca2: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
uint32_t errorflags;
uint32_t errorcode;
/* If no error occurs */
errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
800dca6: f8d7 20e4 ldr.w r2, [r7, #228] @ 0xe4
800dcaa: f640 030f movw r3, #2063 @ 0x80f
800dcae: 4013 ands r3, r2
800dcb0: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
if (errorflags == 0U)
800dcb4: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800dcb8: 2b00 cmp r3, #0
800dcba: d11b bne.n 800dcf4 <HAL_UART_IRQHandler+0x74>
{
/* UART in mode Receiver ---------------------------------------------------*/
if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
800dcbc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800dcc0: f003 0320 and.w r3, r3, #32
800dcc4: 2b00 cmp r3, #0
800dcc6: d015 beq.n 800dcf4 <HAL_UART_IRQHandler+0x74>
&& (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
800dcc8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800dccc: f003 0320 and.w r3, r3, #32
800dcd0: 2b00 cmp r3, #0
800dcd2: d105 bne.n 800dce0 <HAL_UART_IRQHandler+0x60>
|| ((cr3its & USART_CR3_RXFTIE) != 0U)))
800dcd4: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800dcd8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800dcdc: 2b00 cmp r3, #0
800dcde: d009 beq.n 800dcf4 <HAL_UART_IRQHandler+0x74>
{
if (huart->RxISR != NULL)
800dce0: 687b ldr r3, [r7, #4]
800dce2: 6f5b ldr r3, [r3, #116] @ 0x74
800dce4: 2b00 cmp r3, #0
800dce6: f000 8377 beq.w 800e3d8 <HAL_UART_IRQHandler+0x758>
{
huart->RxISR(huart);
800dcea: 687b ldr r3, [r7, #4]
800dcec: 6f5b ldr r3, [r3, #116] @ 0x74
800dcee: 6878 ldr r0, [r7, #4]
800dcf0: 4798 blx r3
}
return;
800dcf2: e371 b.n 800e3d8 <HAL_UART_IRQHandler+0x758>
}
}
/* If some errors occur */
if ((errorflags != 0U)
800dcf4: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800dcf8: 2b00 cmp r3, #0
800dcfa: f000 8123 beq.w 800df44 <HAL_UART_IRQHandler+0x2c4>
&& ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
800dcfe: f8d7 20dc ldr.w r2, [r7, #220] @ 0xdc
800dd02: 4b8d ldr r3, [pc, #564] @ (800df38 <HAL_UART_IRQHandler+0x2b8>)
800dd04: 4013 ands r3, r2
800dd06: 2b00 cmp r3, #0
800dd08: d106 bne.n 800dd18 <HAL_UART_IRQHandler+0x98>
|| ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
800dd0a: f8d7 20e0 ldr.w r2, [r7, #224] @ 0xe0
800dd0e: 4b8b ldr r3, [pc, #556] @ (800df3c <HAL_UART_IRQHandler+0x2bc>)
800dd10: 4013 ands r3, r2
800dd12: 2b00 cmp r3, #0
800dd14: f000 8116 beq.w 800df44 <HAL_UART_IRQHandler+0x2c4>
{
/* UART parity error interrupt occurred -------------------------------------*/
if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
800dd18: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800dd1c: f003 0301 and.w r3, r3, #1
800dd20: 2b00 cmp r3, #0
800dd22: d011 beq.n 800dd48 <HAL_UART_IRQHandler+0xc8>
800dd24: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800dd28: f403 7380 and.w r3, r3, #256 @ 0x100
800dd2c: 2b00 cmp r3, #0
800dd2e: d00b beq.n 800dd48 <HAL_UART_IRQHandler+0xc8>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
800dd30: 687b ldr r3, [r7, #4]
800dd32: 681b ldr r3, [r3, #0]
800dd34: 2201 movs r2, #1
800dd36: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_PE;
800dd38: 687b ldr r3, [r7, #4]
800dd3a: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800dd3e: f043 0201 orr.w r2, r3, #1
800dd42: 687b ldr r3, [r7, #4]
800dd44: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* UART frame error interrupt occurred --------------------------------------*/
if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
800dd48: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800dd4c: f003 0302 and.w r3, r3, #2
800dd50: 2b00 cmp r3, #0
800dd52: d011 beq.n 800dd78 <HAL_UART_IRQHandler+0xf8>
800dd54: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800dd58: f003 0301 and.w r3, r3, #1
800dd5c: 2b00 cmp r3, #0
800dd5e: d00b beq.n 800dd78 <HAL_UART_IRQHandler+0xf8>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
800dd60: 687b ldr r3, [r7, #4]
800dd62: 681b ldr r3, [r3, #0]
800dd64: 2202 movs r2, #2
800dd66: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_FE;
800dd68: 687b ldr r3, [r7, #4]
800dd6a: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800dd6e: f043 0204 orr.w r2, r3, #4
800dd72: 687b ldr r3, [r7, #4]
800dd74: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* UART noise error interrupt occurred --------------------------------------*/
if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
800dd78: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800dd7c: f003 0304 and.w r3, r3, #4
800dd80: 2b00 cmp r3, #0
800dd82: d011 beq.n 800dda8 <HAL_UART_IRQHandler+0x128>
800dd84: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800dd88: f003 0301 and.w r3, r3, #1
800dd8c: 2b00 cmp r3, #0
800dd8e: d00b beq.n 800dda8 <HAL_UART_IRQHandler+0x128>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
800dd90: 687b ldr r3, [r7, #4]
800dd92: 681b ldr r3, [r3, #0]
800dd94: 2204 movs r2, #4
800dd96: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_NE;
800dd98: 687b ldr r3, [r7, #4]
800dd9a: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800dd9e: f043 0202 orr.w r2, r3, #2
800dda2: 687b ldr r3, [r7, #4]
800dda4: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* UART Over-Run interrupt occurred -----------------------------------------*/
if (((isrflags & USART_ISR_ORE) != 0U)
800dda8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800ddac: f003 0308 and.w r3, r3, #8
800ddb0: 2b00 cmp r3, #0
800ddb2: d017 beq.n 800dde4 <HAL_UART_IRQHandler+0x164>
&& (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
800ddb4: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800ddb8: f003 0320 and.w r3, r3, #32
800ddbc: 2b00 cmp r3, #0
800ddbe: d105 bne.n 800ddcc <HAL_UART_IRQHandler+0x14c>
((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
800ddc0: f8d7 20dc ldr.w r2, [r7, #220] @ 0xdc
800ddc4: 4b5c ldr r3, [pc, #368] @ (800df38 <HAL_UART_IRQHandler+0x2b8>)
800ddc6: 4013 ands r3, r2
&& (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
800ddc8: 2b00 cmp r3, #0
800ddca: d00b beq.n 800dde4 <HAL_UART_IRQHandler+0x164>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
800ddcc: 687b ldr r3, [r7, #4]
800ddce: 681b ldr r3, [r3, #0]
800ddd0: 2208 movs r2, #8
800ddd2: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_ORE;
800ddd4: 687b ldr r3, [r7, #4]
800ddd6: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800ddda: f043 0208 orr.w r2, r3, #8
800ddde: 687b ldr r3, [r7, #4]
800dde0: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* UART Receiver Timeout interrupt occurred ---------------------------------*/
if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
800dde4: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800dde8: f403 6300 and.w r3, r3, #2048 @ 0x800
800ddec: 2b00 cmp r3, #0
800ddee: d012 beq.n 800de16 <HAL_UART_IRQHandler+0x196>
800ddf0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800ddf4: f003 6380 and.w r3, r3, #67108864 @ 0x4000000
800ddf8: 2b00 cmp r3, #0
800ddfa: d00c beq.n 800de16 <HAL_UART_IRQHandler+0x196>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
800ddfc: 687b ldr r3, [r7, #4]
800ddfe: 681b ldr r3, [r3, #0]
800de00: f44f 6200 mov.w r2, #2048 @ 0x800
800de04: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_RTO;
800de06: 687b ldr r3, [r7, #4]
800de08: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800de0c: f043 0220 orr.w r2, r3, #32
800de10: 687b ldr r3, [r7, #4]
800de12: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* Call UART Error Call back function if need be ----------------------------*/
if (huart->ErrorCode != HAL_UART_ERROR_NONE)
800de16: 687b ldr r3, [r7, #4]
800de18: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800de1c: 2b00 cmp r3, #0
800de1e: f000 82dd beq.w 800e3dc <HAL_UART_IRQHandler+0x75c>
{
/* UART in mode Receiver --------------------------------------------------*/
if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
800de22: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800de26: f003 0320 and.w r3, r3, #32
800de2a: 2b00 cmp r3, #0
800de2c: d013 beq.n 800de56 <HAL_UART_IRQHandler+0x1d6>
&& (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
800de2e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800de32: f003 0320 and.w r3, r3, #32
800de36: 2b00 cmp r3, #0
800de38: d105 bne.n 800de46 <HAL_UART_IRQHandler+0x1c6>
|| ((cr3its & USART_CR3_RXFTIE) != 0U)))
800de3a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800de3e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800de42: 2b00 cmp r3, #0
800de44: d007 beq.n 800de56 <HAL_UART_IRQHandler+0x1d6>
{
if (huart->RxISR != NULL)
800de46: 687b ldr r3, [r7, #4]
800de48: 6f5b ldr r3, [r3, #116] @ 0x74
800de4a: 2b00 cmp r3, #0
800de4c: d003 beq.n 800de56 <HAL_UART_IRQHandler+0x1d6>
{
huart->RxISR(huart);
800de4e: 687b ldr r3, [r7, #4]
800de50: 6f5b ldr r3, [r3, #116] @ 0x74
800de52: 6878 ldr r0, [r7, #4]
800de54: 4798 blx r3
/* If Error is to be considered as blocking :
- Receiver Timeout error in Reception
- Overrun error in Reception
- any error occurs in DMA mode reception
*/
errorcode = huart->ErrorCode;
800de56: 687b ldr r3, [r7, #4]
800de58: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800de5c: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
800de60: 687b ldr r3, [r7, #4]
800de62: 681b ldr r3, [r3, #0]
800de64: 689b ldr r3, [r3, #8]
800de66: f003 0340 and.w r3, r3, #64 @ 0x40
800de6a: 2b40 cmp r3, #64 @ 0x40
800de6c: d005 beq.n 800de7a <HAL_UART_IRQHandler+0x1fa>
((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
800de6e: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800de72: f003 0328 and.w r3, r3, #40 @ 0x28
if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
800de76: 2b00 cmp r3, #0
800de78: d054 beq.n 800df24 <HAL_UART_IRQHandler+0x2a4>
{
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
UART_EndRxTransfer(huart);
800de7a: 6878 ldr r0, [r7, #4]
800de7c: f001 fb08 bl 800f490 <UART_EndRxTransfer>
/* Abort the UART DMA Rx channel if enabled */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
800de80: 687b ldr r3, [r7, #4]
800de82: 681b ldr r3, [r3, #0]
800de84: 689b ldr r3, [r3, #8]
800de86: f003 0340 and.w r3, r3, #64 @ 0x40
800de8a: 2b40 cmp r3, #64 @ 0x40
800de8c: d146 bne.n 800df1c <HAL_UART_IRQHandler+0x29c>
{
/* Disable the UART DMA Rx request if enabled */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
800de8e: 687b ldr r3, [r7, #4]
800de90: 681b ldr r3, [r3, #0]
800de92: 3308 adds r3, #8
800de94: f8c7 309c str.w r3, [r7, #156] @ 0x9c
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800de98: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800de9c: e853 3f00 ldrex r3, [r3]
800dea0: f8c7 3098 str.w r3, [r7, #152] @ 0x98
return(result);
800dea4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800dea8: f023 0340 bic.w r3, r3, #64 @ 0x40
800deac: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800deb0: 687b ldr r3, [r7, #4]
800deb2: 681b ldr r3, [r3, #0]
800deb4: 3308 adds r3, #8
800deb6: f8d7 20d0 ldr.w r2, [r7, #208] @ 0xd0
800deba: f8c7 20a8 str.w r2, [r7, #168] @ 0xa8
800debe: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800dec2: f8d7 10a4 ldr.w r1, [r7, #164] @ 0xa4
800dec6: f8d7 20a8 ldr.w r2, [r7, #168] @ 0xa8
800deca: e841 2300 strex r3, r2, [r1]
800dece: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
return(result);
800ded2: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800ded6: 2b00 cmp r3, #0
800ded8: d1d9 bne.n 800de8e <HAL_UART_IRQHandler+0x20e>
/* Abort the UART DMA Rx channel */
if (huart->hdmarx != NULL)
800deda: 687b ldr r3, [r7, #4]
800dedc: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800dee0: 2b00 cmp r3, #0
800dee2: d017 beq.n 800df14 <HAL_UART_IRQHandler+0x294>
{
/* Set the UART DMA Abort callback :
will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
800dee4: 687b ldr r3, [r7, #4]
800dee6: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800deea: 4a15 ldr r2, [pc, #84] @ (800df40 <HAL_UART_IRQHandler+0x2c0>)
800deec: 651a str r2, [r3, #80] @ 0x50
/* Abort DMA RX */
if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
800deee: 687b ldr r3, [r7, #4]
800def0: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800def4: 4618 mov r0, r3
800def6: f7f8 ff8f bl 8006e18 <HAL_DMA_Abort_IT>
800defa: 4603 mov r3, r0
800defc: 2b00 cmp r3, #0
800defe: d019 beq.n 800df34 <HAL_UART_IRQHandler+0x2b4>
{
/* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
huart->hdmarx->XferAbortCallback(huart->hdmarx);
800df00: 687b ldr r3, [r7, #4]
800df02: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800df06: 6d1b ldr r3, [r3, #80] @ 0x50
800df08: 687a ldr r2, [r7, #4]
800df0a: f8d2 2080 ldr.w r2, [r2, #128] @ 0x80
800df0e: 4610 mov r0, r2
800df10: 4798 blx r3
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
800df12: e00f b.n 800df34 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
800df14: 6878 ldr r0, [r7, #4]
800df16: f000 fa6d bl 800e3f4 <HAL_UART_ErrorCallback>
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
800df1a: e00b b.n 800df34 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
800df1c: 6878 ldr r0, [r7, #4]
800df1e: f000 fa69 bl 800e3f4 <HAL_UART_ErrorCallback>
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
800df22: e007 b.n 800df34 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
800df24: 6878 ldr r0, [r7, #4]
800df26: f000 fa65 bl 800e3f4 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
huart->ErrorCode = HAL_UART_ERROR_NONE;
800df2a: 687b ldr r3, [r7, #4]
800df2c: 2200 movs r2, #0
800df2e: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
}
return;
800df32: e253 b.n 800e3dc <HAL_UART_IRQHandler+0x75c>
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
800df34: bf00 nop
return;
800df36: e251 b.n 800e3dc <HAL_UART_IRQHandler+0x75c>
800df38: 10000001 .word 0x10000001
800df3c: 04000120 .word 0x04000120
800df40: 0800f55d .word 0x0800f55d
} /* End if some error occurs */
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
800df44: 687b ldr r3, [r7, #4]
800df46: 6edb ldr r3, [r3, #108] @ 0x6c
800df48: 2b01 cmp r3, #1
800df4a: f040 81e7 bne.w 800e31c <HAL_UART_IRQHandler+0x69c>
&& ((isrflags & USART_ISR_IDLE) != 0U)
800df4e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800df52: f003 0310 and.w r3, r3, #16
800df56: 2b00 cmp r3, #0
800df58: f000 81e0 beq.w 800e31c <HAL_UART_IRQHandler+0x69c>
&& ((cr1its & USART_ISR_IDLE) != 0U))
800df5c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800df60: f003 0310 and.w r3, r3, #16
800df64: 2b00 cmp r3, #0
800df66: f000 81d9 beq.w 800e31c <HAL_UART_IRQHandler+0x69c>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
800df6a: 687b ldr r3, [r7, #4]
800df6c: 681b ldr r3, [r3, #0]
800df6e: 2210 movs r2, #16
800df70: 621a str r2, [r3, #32]
/* Check if DMA mode is enabled in UART */
if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
800df72: 687b ldr r3, [r7, #4]
800df74: 681b ldr r3, [r3, #0]
800df76: 689b ldr r3, [r3, #8]
800df78: f003 0340 and.w r3, r3, #64 @ 0x40
800df7c: 2b40 cmp r3, #64 @ 0x40
800df7e: f040 8151 bne.w 800e224 <HAL_UART_IRQHandler+0x5a4>
{
/* DMA mode enabled */
/* Check received length : If all expected data are received, do nothing,
(DMA cplt callback will be called).
Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
800df82: 687b ldr r3, [r7, #4]
800df84: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800df88: 681b ldr r3, [r3, #0]
800df8a: 4a96 ldr r2, [pc, #600] @ (800e1e4 <HAL_UART_IRQHandler+0x564>)
800df8c: 4293 cmp r3, r2
800df8e: d068 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800df90: 687b ldr r3, [r7, #4]
800df92: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800df96: 681b ldr r3, [r3, #0]
800df98: 4a93 ldr r2, [pc, #588] @ (800e1e8 <HAL_UART_IRQHandler+0x568>)
800df9a: 4293 cmp r3, r2
800df9c: d061 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800df9e: 687b ldr r3, [r7, #4]
800dfa0: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800dfa4: 681b ldr r3, [r3, #0]
800dfa6: 4a91 ldr r2, [pc, #580] @ (800e1ec <HAL_UART_IRQHandler+0x56c>)
800dfa8: 4293 cmp r3, r2
800dfaa: d05a beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800dfac: 687b ldr r3, [r7, #4]
800dfae: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800dfb2: 681b ldr r3, [r3, #0]
800dfb4: 4a8e ldr r2, [pc, #568] @ (800e1f0 <HAL_UART_IRQHandler+0x570>)
800dfb6: 4293 cmp r3, r2
800dfb8: d053 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800dfba: 687b ldr r3, [r7, #4]
800dfbc: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800dfc0: 681b ldr r3, [r3, #0]
800dfc2: 4a8c ldr r2, [pc, #560] @ (800e1f4 <HAL_UART_IRQHandler+0x574>)
800dfc4: 4293 cmp r3, r2
800dfc6: d04c beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800dfc8: 687b ldr r3, [r7, #4]
800dfca: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800dfce: 681b ldr r3, [r3, #0]
800dfd0: 4a89 ldr r2, [pc, #548] @ (800e1f8 <HAL_UART_IRQHandler+0x578>)
800dfd2: 4293 cmp r3, r2
800dfd4: d045 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800dfd6: 687b ldr r3, [r7, #4]
800dfd8: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800dfdc: 681b ldr r3, [r3, #0]
800dfde: 4a87 ldr r2, [pc, #540] @ (800e1fc <HAL_UART_IRQHandler+0x57c>)
800dfe0: 4293 cmp r3, r2
800dfe2: d03e beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800dfe4: 687b ldr r3, [r7, #4]
800dfe6: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800dfea: 681b ldr r3, [r3, #0]
800dfec: 4a84 ldr r2, [pc, #528] @ (800e200 <HAL_UART_IRQHandler+0x580>)
800dfee: 4293 cmp r3, r2
800dff0: d037 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800dff2: 687b ldr r3, [r7, #4]
800dff4: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800dff8: 681b ldr r3, [r3, #0]
800dffa: 4a82 ldr r2, [pc, #520] @ (800e204 <HAL_UART_IRQHandler+0x584>)
800dffc: 4293 cmp r3, r2
800dffe: d030 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800e000: 687b ldr r3, [r7, #4]
800e002: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e006: 681b ldr r3, [r3, #0]
800e008: 4a7f ldr r2, [pc, #508] @ (800e208 <HAL_UART_IRQHandler+0x588>)
800e00a: 4293 cmp r3, r2
800e00c: d029 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800e00e: 687b ldr r3, [r7, #4]
800e010: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e014: 681b ldr r3, [r3, #0]
800e016: 4a7d ldr r2, [pc, #500] @ (800e20c <HAL_UART_IRQHandler+0x58c>)
800e018: 4293 cmp r3, r2
800e01a: d022 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800e01c: 687b ldr r3, [r7, #4]
800e01e: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e022: 681b ldr r3, [r3, #0]
800e024: 4a7a ldr r2, [pc, #488] @ (800e210 <HAL_UART_IRQHandler+0x590>)
800e026: 4293 cmp r3, r2
800e028: d01b beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800e02a: 687b ldr r3, [r7, #4]
800e02c: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e030: 681b ldr r3, [r3, #0]
800e032: 4a78 ldr r2, [pc, #480] @ (800e214 <HAL_UART_IRQHandler+0x594>)
800e034: 4293 cmp r3, r2
800e036: d014 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800e038: 687b ldr r3, [r7, #4]
800e03a: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e03e: 681b ldr r3, [r3, #0]
800e040: 4a75 ldr r2, [pc, #468] @ (800e218 <HAL_UART_IRQHandler+0x598>)
800e042: 4293 cmp r3, r2
800e044: d00d beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800e046: 687b ldr r3, [r7, #4]
800e048: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e04c: 681b ldr r3, [r3, #0]
800e04e: 4a73 ldr r2, [pc, #460] @ (800e21c <HAL_UART_IRQHandler+0x59c>)
800e050: 4293 cmp r3, r2
800e052: d006 beq.n 800e062 <HAL_UART_IRQHandler+0x3e2>
800e054: 687b ldr r3, [r7, #4]
800e056: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e05a: 681b ldr r3, [r3, #0]
800e05c: 4a70 ldr r2, [pc, #448] @ (800e220 <HAL_UART_IRQHandler+0x5a0>)
800e05e: 4293 cmp r3, r2
800e060: d106 bne.n 800e070 <HAL_UART_IRQHandler+0x3f0>
800e062: 687b ldr r3, [r7, #4]
800e064: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e068: 681b ldr r3, [r3, #0]
800e06a: 685b ldr r3, [r3, #4]
800e06c: b29b uxth r3, r3
800e06e: e005 b.n 800e07c <HAL_UART_IRQHandler+0x3fc>
800e070: 687b ldr r3, [r7, #4]
800e072: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e076: 681b ldr r3, [r3, #0]
800e078: 685b ldr r3, [r3, #4]
800e07a: b29b uxth r3, r3
800e07c: f8a7 30be strh.w r3, [r7, #190] @ 0xbe
if ((nb_remaining_rx_data > 0U)
800e080: f8b7 30be ldrh.w r3, [r7, #190] @ 0xbe
800e084: 2b00 cmp r3, #0
800e086: f000 81ab beq.w 800e3e0 <HAL_UART_IRQHandler+0x760>
&& (nb_remaining_rx_data < huart->RxXferSize))
800e08a: 687b ldr r3, [r7, #4]
800e08c: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
800e090: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe
800e094: 429a cmp r2, r3
800e096: f080 81a3 bcs.w 800e3e0 <HAL_UART_IRQHandler+0x760>
{
/* Reception is not complete */
huart->RxXferCount = nb_remaining_rx_data;
800e09a: 687b ldr r3, [r7, #4]
800e09c: f8b7 20be ldrh.w r2, [r7, #190] @ 0xbe
800e0a0: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
/* In Normal mode, end DMA xfer and HAL UART Rx process*/
if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
800e0a4: 687b ldr r3, [r7, #4]
800e0a6: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e0aa: 69db ldr r3, [r3, #28]
800e0ac: f5b3 7f80 cmp.w r3, #256 @ 0x100
800e0b0: f000 8087 beq.w 800e1c2 <HAL_UART_IRQHandler+0x542>
{
/* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
800e0b4: 687b ldr r3, [r7, #4]
800e0b6: 681b ldr r3, [r3, #0]
800e0b8: f8c7 3088 str.w r3, [r7, #136] @ 0x88
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800e0bc: f8d7 3088 ldr.w r3, [r7, #136] @ 0x88
800e0c0: e853 3f00 ldrex r3, [r3]
800e0c4: f8c7 3084 str.w r3, [r7, #132] @ 0x84
return(result);
800e0c8: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800e0cc: f423 7380 bic.w r3, r3, #256 @ 0x100
800e0d0: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
800e0d4: 687b ldr r3, [r7, #4]
800e0d6: 681b ldr r3, [r3, #0]
800e0d8: 461a mov r2, r3
800e0da: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800e0de: f8c7 3094 str.w r3, [r7, #148] @ 0x94
800e0e2: f8c7 2090 str.w r2, [r7, #144] @ 0x90
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800e0e6: f8d7 1090 ldr.w r1, [r7, #144] @ 0x90
800e0ea: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94
800e0ee: e841 2300 strex r3, r2, [r1]
800e0f2: f8c7 308c str.w r3, [r7, #140] @ 0x8c
return(result);
800e0f6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800e0fa: 2b00 cmp r3, #0
800e0fc: d1da bne.n 800e0b4 <HAL_UART_IRQHandler+0x434>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
800e0fe: 687b ldr r3, [r7, #4]
800e100: 681b ldr r3, [r3, #0]
800e102: 3308 adds r3, #8
800e104: 677b str r3, [r7, #116] @ 0x74
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800e106: 6f7b ldr r3, [r7, #116] @ 0x74
800e108: e853 3f00 ldrex r3, [r3]
800e10c: 673b str r3, [r7, #112] @ 0x70
return(result);
800e10e: 6f3b ldr r3, [r7, #112] @ 0x70
800e110: f023 0301 bic.w r3, r3, #1
800e114: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800e118: 687b ldr r3, [r7, #4]
800e11a: 681b ldr r3, [r3, #0]
800e11c: 3308 adds r3, #8
800e11e: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4
800e122: f8c7 2080 str.w r2, [r7, #128] @ 0x80
800e126: 67fb str r3, [r7, #124] @ 0x7c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800e128: 6ff9 ldr r1, [r7, #124] @ 0x7c
800e12a: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80
800e12e: e841 2300 strex r3, r2, [r1]
800e132: 67bb str r3, [r7, #120] @ 0x78
return(result);
800e134: 6fbb ldr r3, [r7, #120] @ 0x78
800e136: 2b00 cmp r3, #0
800e138: d1e1 bne.n 800e0fe <HAL_UART_IRQHandler+0x47e>
/* Disable the DMA transfer for the receiver request by resetting the DMAR bit
in the UART CR3 register */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
800e13a: 687b ldr r3, [r7, #4]
800e13c: 681b ldr r3, [r3, #0]
800e13e: 3308 adds r3, #8
800e140: 663b str r3, [r7, #96] @ 0x60
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800e142: 6e3b ldr r3, [r7, #96] @ 0x60
800e144: e853 3f00 ldrex r3, [r3]
800e148: 65fb str r3, [r7, #92] @ 0x5c
return(result);
800e14a: 6dfb ldr r3, [r7, #92] @ 0x5c
800e14c: f023 0340 bic.w r3, r3, #64 @ 0x40
800e150: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
800e154: 687b ldr r3, [r7, #4]
800e156: 681b ldr r3, [r3, #0]
800e158: 3308 adds r3, #8
800e15a: f8d7 20b0 ldr.w r2, [r7, #176] @ 0xb0
800e15e: 66fa str r2, [r7, #108] @ 0x6c
800e160: 66bb str r3, [r7, #104] @ 0x68
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800e162: 6eb9 ldr r1, [r7, #104] @ 0x68
800e164: 6efa ldr r2, [r7, #108] @ 0x6c
800e166: e841 2300 strex r3, r2, [r1]
800e16a: 667b str r3, [r7, #100] @ 0x64
return(result);
800e16c: 6e7b ldr r3, [r7, #100] @ 0x64
800e16e: 2b00 cmp r3, #0
800e170: d1e3 bne.n 800e13a <HAL_UART_IRQHandler+0x4ba>
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
800e172: 687b ldr r3, [r7, #4]
800e174: 2220 movs r2, #32
800e176: f8c3 208c str.w r2, [r3, #140] @ 0x8c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
800e17a: 687b ldr r3, [r7, #4]
800e17c: 2200 movs r2, #0
800e17e: 66da str r2, [r3, #108] @ 0x6c
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
800e180: 687b ldr r3, [r7, #4]
800e182: 681b ldr r3, [r3, #0]
800e184: 64fb str r3, [r7, #76] @ 0x4c
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800e186: 6cfb ldr r3, [r7, #76] @ 0x4c
800e188: e853 3f00 ldrex r3, [r3]
800e18c: 64bb str r3, [r7, #72] @ 0x48
return(result);
800e18e: 6cbb ldr r3, [r7, #72] @ 0x48
800e190: f023 0310 bic.w r3, r3, #16
800e194: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800e198: 687b ldr r3, [r7, #4]
800e19a: 681b ldr r3, [r3, #0]
800e19c: 461a mov r2, r3
800e19e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800e1a2: 65bb str r3, [r7, #88] @ 0x58
800e1a4: 657a str r2, [r7, #84] @ 0x54
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800e1a6: 6d79 ldr r1, [r7, #84] @ 0x54
800e1a8: 6dba ldr r2, [r7, #88] @ 0x58
800e1aa: e841 2300 strex r3, r2, [r1]
800e1ae: 653b str r3, [r7, #80] @ 0x50
return(result);
800e1b0: 6d3b ldr r3, [r7, #80] @ 0x50
800e1b2: 2b00 cmp r3, #0
800e1b4: d1e4 bne.n 800e180 <HAL_UART_IRQHandler+0x500>
/* Last bytes received, so no need as the abort is immediate */
(void)HAL_DMA_Abort(huart->hdmarx);
800e1b6: 687b ldr r3, [r7, #4]
800e1b8: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
800e1bc: 4618 mov r0, r3
800e1be: f7f8 fb0d bl 80067dc <HAL_DMA_Abort>
}
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
In this case, Rx Event type is Idle Event */
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
800e1c2: 687b ldr r3, [r7, #4]
800e1c4: 2202 movs r2, #2
800e1c6: 671a str r2, [r3, #112] @ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
#else
/*Call legacy weak Rx Event callback*/
HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
800e1c8: 687b ldr r3, [r7, #4]
800e1ca: f8b3 205c ldrh.w r2, [r3, #92] @ 0x5c
800e1ce: 687b ldr r3, [r7, #4]
800e1d0: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800e1d4: b29b uxth r3, r3
800e1d6: 1ad3 subs r3, r2, r3
800e1d8: b29b uxth r3, r3
800e1da: 4619 mov r1, r3
800e1dc: 6878 ldr r0, [r7, #4]
800e1de: f7f6 fb2b bl 8004838 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
return;
800e1e2: e0fd b.n 800e3e0 <HAL_UART_IRQHandler+0x760>
800e1e4: 40020010 .word 0x40020010
800e1e8: 40020028 .word 0x40020028
800e1ec: 40020040 .word 0x40020040
800e1f0: 40020058 .word 0x40020058
800e1f4: 40020070 .word 0x40020070
800e1f8: 40020088 .word 0x40020088
800e1fc: 400200a0 .word 0x400200a0
800e200: 400200b8 .word 0x400200b8
800e204: 40020410 .word 0x40020410
800e208: 40020428 .word 0x40020428
800e20c: 40020440 .word 0x40020440
800e210: 40020458 .word 0x40020458
800e214: 40020470 .word 0x40020470
800e218: 40020488 .word 0x40020488
800e21c: 400204a0 .word 0x400204a0
800e220: 400204b8 .word 0x400204b8
else
{
/* DMA mode not enabled */
/* Check received length : If all expected data are received, do nothing.
Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
800e224: 687b ldr r3, [r7, #4]
800e226: f8b3 205c ldrh.w r2, [r3, #92] @ 0x5c
800e22a: 687b ldr r3, [r7, #4]
800e22c: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800e230: b29b uxth r3, r3
800e232: 1ad3 subs r3, r2, r3
800e234: f8a7 30ce strh.w r3, [r7, #206] @ 0xce
if ((huart->RxXferCount > 0U)
800e238: 687b ldr r3, [r7, #4]
800e23a: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800e23e: b29b uxth r3, r3
800e240: 2b00 cmp r3, #0
800e242: f000 80cf beq.w 800e3e4 <HAL_UART_IRQHandler+0x764>
&& (nb_rx_data > 0U))
800e246: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce
800e24a: 2b00 cmp r3, #0
800e24c: f000 80ca beq.w 800e3e4 <HAL_UART_IRQHandler+0x764>
{
/* Disable the UART Parity Error Interrupt and RXNE interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
800e250: 687b ldr r3, [r7, #4]
800e252: 681b ldr r3, [r3, #0]
800e254: 63bb str r3, [r7, #56] @ 0x38
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800e256: 6bbb ldr r3, [r7, #56] @ 0x38
800e258: e853 3f00 ldrex r3, [r3]
800e25c: 637b str r3, [r7, #52] @ 0x34
return(result);
800e25e: 6b7b ldr r3, [r7, #52] @ 0x34
800e260: f423 7390 bic.w r3, r3, #288 @ 0x120
800e264: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
800e268: 687b ldr r3, [r7, #4]
800e26a: 681b ldr r3, [r3, #0]
800e26c: 461a mov r2, r3
800e26e: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800e272: 647b str r3, [r7, #68] @ 0x44
800e274: 643a str r2, [r7, #64] @ 0x40
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800e276: 6c39 ldr r1, [r7, #64] @ 0x40
800e278: 6c7a ldr r2, [r7, #68] @ 0x44
800e27a: e841 2300 strex r3, r2, [r1]
800e27e: 63fb str r3, [r7, #60] @ 0x3c
return(result);
800e280: 6bfb ldr r3, [r7, #60] @ 0x3c
800e282: 2b00 cmp r3, #0
800e284: d1e4 bne.n 800e250 <HAL_UART_IRQHandler+0x5d0>
/* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
800e286: 687b ldr r3, [r7, #4]
800e288: 681b ldr r3, [r3, #0]
800e28a: 3308 adds r3, #8
800e28c: 627b str r3, [r7, #36] @ 0x24
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800e28e: 6a7b ldr r3, [r7, #36] @ 0x24
800e290: e853 3f00 ldrex r3, [r3]
800e294: 623b str r3, [r7, #32]
return(result);
800e296: 6a3a ldr r2, [r7, #32]
800e298: 4b55 ldr r3, [pc, #340] @ (800e3f0 <HAL_UART_IRQHandler+0x770>)
800e29a: 4013 ands r3, r2
800e29c: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800e2a0: 687b ldr r3, [r7, #4]
800e2a2: 681b ldr r3, [r3, #0]
800e2a4: 3308 adds r3, #8
800e2a6: f8d7 20c4 ldr.w r2, [r7, #196] @ 0xc4
800e2aa: 633a str r2, [r7, #48] @ 0x30
800e2ac: 62fb str r3, [r7, #44] @ 0x2c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800e2ae: 6af9 ldr r1, [r7, #44] @ 0x2c
800e2b0: 6b3a ldr r2, [r7, #48] @ 0x30
800e2b2: e841 2300 strex r3, r2, [r1]
800e2b6: 62bb str r3, [r7, #40] @ 0x28
return(result);
800e2b8: 6abb ldr r3, [r7, #40] @ 0x28
800e2ba: 2b00 cmp r3, #0
800e2bc: d1e3 bne.n 800e286 <HAL_UART_IRQHandler+0x606>
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
800e2be: 687b ldr r3, [r7, #4]
800e2c0: 2220 movs r2, #32
800e2c2: f8c3 208c str.w r2, [r3, #140] @ 0x8c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
800e2c6: 687b ldr r3, [r7, #4]
800e2c8: 2200 movs r2, #0
800e2ca: 66da str r2, [r3, #108] @ 0x6c
/* Clear RxISR function pointer */
huart->RxISR = NULL;
800e2cc: 687b ldr r3, [r7, #4]
800e2ce: 2200 movs r2, #0
800e2d0: 675a str r2, [r3, #116] @ 0x74
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
800e2d2: 687b ldr r3, [r7, #4]
800e2d4: 681b ldr r3, [r3, #0]
800e2d6: 613b str r3, [r7, #16]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800e2d8: 693b ldr r3, [r7, #16]
800e2da: e853 3f00 ldrex r3, [r3]
800e2de: 60fb str r3, [r7, #12]
return(result);
800e2e0: 68fb ldr r3, [r7, #12]
800e2e2: f023 0310 bic.w r3, r3, #16
800e2e6: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800e2ea: 687b ldr r3, [r7, #4]
800e2ec: 681b ldr r3, [r3, #0]
800e2ee: 461a mov r2, r3
800e2f0: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800e2f4: 61fb str r3, [r7, #28]
800e2f6: 61ba str r2, [r7, #24]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800e2f8: 69b9 ldr r1, [r7, #24]
800e2fa: 69fa ldr r2, [r7, #28]
800e2fc: e841 2300 strex r3, r2, [r1]
800e300: 617b str r3, [r7, #20]
return(result);
800e302: 697b ldr r3, [r7, #20]
800e304: 2b00 cmp r3, #0
800e306: d1e4 bne.n 800e2d2 <HAL_UART_IRQHandler+0x652>
/* Initialize type of RxEvent that correspond to RxEvent callback execution;
In this case, Rx Event type is Idle Event */
huart->RxEventType = HAL_UART_RXEVENT_IDLE;
800e308: 687b ldr r3, [r7, #4]
800e30a: 2202 movs r2, #2
800e30c: 671a str r2, [r3, #112] @ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx complete callback*/
huart->RxEventCallback(huart, nb_rx_data);
#else
/*Call legacy weak Rx Event callback*/
HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
800e30e: f8b7 30ce ldrh.w r3, [r7, #206] @ 0xce
800e312: 4619 mov r1, r3
800e314: 6878 ldr r0, [r7, #4]
800e316: f7f6 fa8f bl 8004838 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
return;
800e31a: e063 b.n 800e3e4 <HAL_UART_IRQHandler+0x764>
}
}
/* UART wakeup from Stop mode interrupt occurred ---------------------------*/
if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
800e31c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800e320: f403 1380 and.w r3, r3, #1048576 @ 0x100000
800e324: 2b00 cmp r3, #0
800e326: d00e beq.n 800e346 <HAL_UART_IRQHandler+0x6c6>
800e328: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800e32c: f403 0380 and.w r3, r3, #4194304 @ 0x400000
800e330: 2b00 cmp r3, #0
800e332: d008 beq.n 800e346 <HAL_UART_IRQHandler+0x6c6>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
800e334: 687b ldr r3, [r7, #4]
800e336: 681b ldr r3, [r3, #0]
800e338: f44f 1280 mov.w r2, #1048576 @ 0x100000
800e33c: 621a str r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/* Call registered Wakeup Callback */
huart->WakeupCallback(huart);
#else
/* Call legacy weak Wakeup Callback */
HAL_UARTEx_WakeupCallback(huart);
800e33e: 6878 ldr r0, [r7, #4]
800e340: f002 f80c bl 801035c <HAL_UARTEx_WakeupCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
return;
800e344: e051 b.n 800e3ea <HAL_UART_IRQHandler+0x76a>
}
/* UART in mode Transmitter ------------------------------------------------*/
if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
800e346: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800e34a: f003 0380 and.w r3, r3, #128 @ 0x80
800e34e: 2b00 cmp r3, #0
800e350: d014 beq.n 800e37c <HAL_UART_IRQHandler+0x6fc>
&& (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
800e352: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800e356: f003 0380 and.w r3, r3, #128 @ 0x80
800e35a: 2b00 cmp r3, #0
800e35c: d105 bne.n 800e36a <HAL_UART_IRQHandler+0x6ea>
|| ((cr3its & USART_CR3_TXFTIE) != 0U)))
800e35e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800e362: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800e366: 2b00 cmp r3, #0
800e368: d008 beq.n 800e37c <HAL_UART_IRQHandler+0x6fc>
{
if (huart->TxISR != NULL)
800e36a: 687b ldr r3, [r7, #4]
800e36c: 6f9b ldr r3, [r3, #120] @ 0x78
800e36e: 2b00 cmp r3, #0
800e370: d03a beq.n 800e3e8 <HAL_UART_IRQHandler+0x768>
{
huart->TxISR(huart);
800e372: 687b ldr r3, [r7, #4]
800e374: 6f9b ldr r3, [r3, #120] @ 0x78
800e376: 6878 ldr r0, [r7, #4]
800e378: 4798 blx r3
}
return;
800e37a: e035 b.n 800e3e8 <HAL_UART_IRQHandler+0x768>
}
/* UART in mode Transmitter (transmission end) -----------------------------*/
if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
800e37c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800e380: f003 0340 and.w r3, r3, #64 @ 0x40
800e384: 2b00 cmp r3, #0
800e386: d009 beq.n 800e39c <HAL_UART_IRQHandler+0x71c>
800e388: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800e38c: f003 0340 and.w r3, r3, #64 @ 0x40
800e390: 2b00 cmp r3, #0
800e392: d003 beq.n 800e39c <HAL_UART_IRQHandler+0x71c>
{
UART_EndTransmit_IT(huart);
800e394: 6878 ldr r0, [r7, #4]
800e396: f001 fa99 bl 800f8cc <UART_EndTransmit_IT>
return;
800e39a: e026 b.n 800e3ea <HAL_UART_IRQHandler+0x76a>
}
/* UART TX Fifo Empty occurred ----------------------------------------------*/
if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
800e39c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800e3a0: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800e3a4: 2b00 cmp r3, #0
800e3a6: d009 beq.n 800e3bc <HAL_UART_IRQHandler+0x73c>
800e3a8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800e3ac: f003 4380 and.w r3, r3, #1073741824 @ 0x40000000
800e3b0: 2b00 cmp r3, #0
800e3b2: d003 beq.n 800e3bc <HAL_UART_IRQHandler+0x73c>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/* Call registered Tx Fifo Empty Callback */
huart->TxFifoEmptyCallback(huart);
#else
/* Call legacy weak Tx Fifo Empty Callback */
HAL_UARTEx_TxFifoEmptyCallback(huart);
800e3b4: 6878 ldr r0, [r7, #4]
800e3b6: f001 ffe5 bl 8010384 <HAL_UARTEx_TxFifoEmptyCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
return;
800e3ba: e016 b.n 800e3ea <HAL_UART_IRQHandler+0x76a>
}
/* UART RX Fifo Full occurred ----------------------------------------------*/
if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
800e3bc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800e3c0: f003 7380 and.w r3, r3, #16777216 @ 0x1000000
800e3c4: 2b00 cmp r3, #0
800e3c6: d010 beq.n 800e3ea <HAL_UART_IRQHandler+0x76a>
800e3c8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800e3cc: 2b00 cmp r3, #0
800e3ce: da0c bge.n 800e3ea <HAL_UART_IRQHandler+0x76a>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/* Call registered Rx Fifo Full Callback */
huart->RxFifoFullCallback(huart);
#else
/* Call legacy weak Rx Fifo Full Callback */
HAL_UARTEx_RxFifoFullCallback(huart);
800e3d0: 6878 ldr r0, [r7, #4]
800e3d2: f001 ffcd bl 8010370 <HAL_UARTEx_RxFifoFullCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
return;
800e3d6: e008 b.n 800e3ea <HAL_UART_IRQHandler+0x76a>
return;
800e3d8: bf00 nop
800e3da: e006 b.n 800e3ea <HAL_UART_IRQHandler+0x76a>
return;
800e3dc: bf00 nop
800e3de: e004 b.n 800e3ea <HAL_UART_IRQHandler+0x76a>
return;
800e3e0: bf00 nop
800e3e2: e002 b.n 800e3ea <HAL_UART_IRQHandler+0x76a>
return;
800e3e4: bf00 nop
800e3e6: e000 b.n 800e3ea <HAL_UART_IRQHandler+0x76a>
return;
800e3e8: bf00 nop
}
}
800e3ea: 37e8 adds r7, #232 @ 0xe8
800e3ec: 46bd mov sp, r7
800e3ee: bd80 pop {r7, pc}
800e3f0: effffffe .word 0xeffffffe
0800e3f4 <HAL_UART_ErrorCallback>:
* @brief UART error callback.
* @param huart UART handle.
* @retval None
*/
__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
800e3f4: b480 push {r7}
800e3f6: b083 sub sp, #12
800e3f8: af00 add r7, sp, #0
800e3fa: 6078 str r0, [r7, #4]
UNUSED(huart);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_UART_ErrorCallback can be implemented in the user file.
*/
}
800e3fc: bf00 nop
800e3fe: 370c adds r7, #12
800e400: 46bd mov sp, r7
800e402: f85d 7b04 ldr.w r7, [sp], #4
800e406: 4770 bx lr
0800e408 <UART_SetConfig>:
* @brief Configure the UART peripheral.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
800e408: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
800e40c: b092 sub sp, #72 @ 0x48
800e40e: af00 add r7, sp, #0
800e410: 6178 str r0, [r7, #20]
uint32_t tmpreg;
uint16_t brrtemp;
UART_ClockSourceTypeDef clocksource;
uint32_t usartdiv;
HAL_StatusTypeDef ret = HAL_OK;
800e412: 2300 movs r3, #0
800e414: f887 3042 strb.w r3, [r7, #66] @ 0x42
* the UART Word Length, Parity, Mode and oversampling:
* set the M bits according to huart->Init.WordLength value
* set PCE and PS bits according to huart->Init.Parity value
* set TE and RE bits according to huart->Init.Mode value
* set OVER8 bit according to huart->Init.OverSampling value */
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
800e418: 697b ldr r3, [r7, #20]
800e41a: 689a ldr r2, [r3, #8]
800e41c: 697b ldr r3, [r7, #20]
800e41e: 691b ldr r3, [r3, #16]
800e420: 431a orrs r2, r3
800e422: 697b ldr r3, [r7, #20]
800e424: 695b ldr r3, [r3, #20]
800e426: 431a orrs r2, r3
800e428: 697b ldr r3, [r7, #20]
800e42a: 69db ldr r3, [r3, #28]
800e42c: 4313 orrs r3, r2
800e42e: 647b str r3, [r7, #68] @ 0x44
MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
800e430: 697b ldr r3, [r7, #20]
800e432: 681b ldr r3, [r3, #0]
800e434: 681a ldr r2, [r3, #0]
800e436: 4bbe ldr r3, [pc, #760] @ (800e730 <UART_SetConfig+0x328>)
800e438: 4013 ands r3, r2
800e43a: 697a ldr r2, [r7, #20]
800e43c: 6812 ldr r2, [r2, #0]
800e43e: 6c79 ldr r1, [r7, #68] @ 0x44
800e440: 430b orrs r3, r1
800e442: 6013 str r3, [r2, #0]
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits according
* to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
800e444: 697b ldr r3, [r7, #20]
800e446: 681b ldr r3, [r3, #0]
800e448: 685b ldr r3, [r3, #4]
800e44a: f423 5140 bic.w r1, r3, #12288 @ 0x3000
800e44e: 697b ldr r3, [r7, #20]
800e450: 68da ldr r2, [r3, #12]
800e452: 697b ldr r3, [r7, #20]
800e454: 681b ldr r3, [r3, #0]
800e456: 430a orrs r2, r1
800e458: 605a str r2, [r3, #4]
/* Configure
* - UART HardWare Flow Control: set CTSE and RTSE bits according
* to huart->Init.HwFlowCtl value
* - one-bit sampling method versus three samples' majority rule according
* to huart->Init.OneBitSampling (not applicable to LPUART) */
tmpreg = (uint32_t)huart->Init.HwFlowCtl;
800e45a: 697b ldr r3, [r7, #20]
800e45c: 699b ldr r3, [r3, #24]
800e45e: 647b str r3, [r7, #68] @ 0x44
if (!(UART_INSTANCE_LOWPOWER(huart)))
800e460: 697b ldr r3, [r7, #20]
800e462: 681b ldr r3, [r3, #0]
800e464: 4ab3 ldr r2, [pc, #716] @ (800e734 <UART_SetConfig+0x32c>)
800e466: 4293 cmp r3, r2
800e468: d004 beq.n 800e474 <UART_SetConfig+0x6c>
{
tmpreg |= huart->Init.OneBitSampling;
800e46a: 697b ldr r3, [r7, #20]
800e46c: 6a1b ldr r3, [r3, #32]
800e46e: 6c7a ldr r2, [r7, #68] @ 0x44
800e470: 4313 orrs r3, r2
800e472: 647b str r3, [r7, #68] @ 0x44
}
MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
800e474: 697b ldr r3, [r7, #20]
800e476: 681b ldr r3, [r3, #0]
800e478: 689a ldr r2, [r3, #8]
800e47a: 4baf ldr r3, [pc, #700] @ (800e738 <UART_SetConfig+0x330>)
800e47c: 4013 ands r3, r2
800e47e: 697a ldr r2, [r7, #20]
800e480: 6812 ldr r2, [r2, #0]
800e482: 6c79 ldr r1, [r7, #68] @ 0x44
800e484: 430b orrs r3, r1
800e486: 6093 str r3, [r2, #8]
/*-------------------------- USART PRESC Configuration -----------------------*/
/* Configure
* - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
800e488: 697b ldr r3, [r7, #20]
800e48a: 681b ldr r3, [r3, #0]
800e48c: 6adb ldr r3, [r3, #44] @ 0x2c
800e48e: f023 010f bic.w r1, r3, #15
800e492: 697b ldr r3, [r7, #20]
800e494: 6a5a ldr r2, [r3, #36] @ 0x24
800e496: 697b ldr r3, [r7, #20]
800e498: 681b ldr r3, [r3, #0]
800e49a: 430a orrs r2, r1
800e49c: 62da str r2, [r3, #44] @ 0x2c
/*-------------------------- USART BRR Configuration -----------------------*/
UART_GETCLOCKSOURCE(huart, clocksource);
800e49e: 697b ldr r3, [r7, #20]
800e4a0: 681b ldr r3, [r3, #0]
800e4a2: 4aa6 ldr r2, [pc, #664] @ (800e73c <UART_SetConfig+0x334>)
800e4a4: 4293 cmp r3, r2
800e4a6: d177 bne.n 800e598 <UART_SetConfig+0x190>
800e4a8: 4ba5 ldr r3, [pc, #660] @ (800e740 <UART_SetConfig+0x338>)
800e4aa: 6d5b ldr r3, [r3, #84] @ 0x54
800e4ac: f003 0338 and.w r3, r3, #56 @ 0x38
800e4b0: 2b28 cmp r3, #40 @ 0x28
800e4b2: d86d bhi.n 800e590 <UART_SetConfig+0x188>
800e4b4: a201 add r2, pc, #4 @ (adr r2, 800e4bc <UART_SetConfig+0xb4>)
800e4b6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e4ba: bf00 nop
800e4bc: 0800e561 .word 0x0800e561
800e4c0: 0800e591 .word 0x0800e591
800e4c4: 0800e591 .word 0x0800e591
800e4c8: 0800e591 .word 0x0800e591
800e4cc: 0800e591 .word 0x0800e591
800e4d0: 0800e591 .word 0x0800e591
800e4d4: 0800e591 .word 0x0800e591
800e4d8: 0800e591 .word 0x0800e591
800e4dc: 0800e569 .word 0x0800e569
800e4e0: 0800e591 .word 0x0800e591
800e4e4: 0800e591 .word 0x0800e591
800e4e8: 0800e591 .word 0x0800e591
800e4ec: 0800e591 .word 0x0800e591
800e4f0: 0800e591 .word 0x0800e591
800e4f4: 0800e591 .word 0x0800e591
800e4f8: 0800e591 .word 0x0800e591
800e4fc: 0800e571 .word 0x0800e571
800e500: 0800e591 .word 0x0800e591
800e504: 0800e591 .word 0x0800e591
800e508: 0800e591 .word 0x0800e591
800e50c: 0800e591 .word 0x0800e591
800e510: 0800e591 .word 0x0800e591
800e514: 0800e591 .word 0x0800e591
800e518: 0800e591 .word 0x0800e591
800e51c: 0800e579 .word 0x0800e579
800e520: 0800e591 .word 0x0800e591
800e524: 0800e591 .word 0x0800e591
800e528: 0800e591 .word 0x0800e591
800e52c: 0800e591 .word 0x0800e591
800e530: 0800e591 .word 0x0800e591
800e534: 0800e591 .word 0x0800e591
800e538: 0800e591 .word 0x0800e591
800e53c: 0800e581 .word 0x0800e581
800e540: 0800e591 .word 0x0800e591
800e544: 0800e591 .word 0x0800e591
800e548: 0800e591 .word 0x0800e591
800e54c: 0800e591 .word 0x0800e591
800e550: 0800e591 .word 0x0800e591
800e554: 0800e591 .word 0x0800e591
800e558: 0800e591 .word 0x0800e591
800e55c: 0800e589 .word 0x0800e589
800e560: 2301 movs r3, #1
800e562: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e566: e222 b.n 800e9ae <UART_SetConfig+0x5a6>
800e568: 2304 movs r3, #4
800e56a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e56e: e21e b.n 800e9ae <UART_SetConfig+0x5a6>
800e570: 2308 movs r3, #8
800e572: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e576: e21a b.n 800e9ae <UART_SetConfig+0x5a6>
800e578: 2310 movs r3, #16
800e57a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e57e: e216 b.n 800e9ae <UART_SetConfig+0x5a6>
800e580: 2320 movs r3, #32
800e582: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e586: e212 b.n 800e9ae <UART_SetConfig+0x5a6>
800e588: 2340 movs r3, #64 @ 0x40
800e58a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e58e: e20e b.n 800e9ae <UART_SetConfig+0x5a6>
800e590: 2380 movs r3, #128 @ 0x80
800e592: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e596: e20a b.n 800e9ae <UART_SetConfig+0x5a6>
800e598: 697b ldr r3, [r7, #20]
800e59a: 681b ldr r3, [r3, #0]
800e59c: 4a69 ldr r2, [pc, #420] @ (800e744 <UART_SetConfig+0x33c>)
800e59e: 4293 cmp r3, r2
800e5a0: d130 bne.n 800e604 <UART_SetConfig+0x1fc>
800e5a2: 4b67 ldr r3, [pc, #412] @ (800e740 <UART_SetConfig+0x338>)
800e5a4: 6d5b ldr r3, [r3, #84] @ 0x54
800e5a6: f003 0307 and.w r3, r3, #7
800e5aa: 2b05 cmp r3, #5
800e5ac: d826 bhi.n 800e5fc <UART_SetConfig+0x1f4>
800e5ae: a201 add r2, pc, #4 @ (adr r2, 800e5b4 <UART_SetConfig+0x1ac>)
800e5b0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e5b4: 0800e5cd .word 0x0800e5cd
800e5b8: 0800e5d5 .word 0x0800e5d5
800e5bc: 0800e5dd .word 0x0800e5dd
800e5c0: 0800e5e5 .word 0x0800e5e5
800e5c4: 0800e5ed .word 0x0800e5ed
800e5c8: 0800e5f5 .word 0x0800e5f5
800e5cc: 2300 movs r3, #0
800e5ce: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e5d2: e1ec b.n 800e9ae <UART_SetConfig+0x5a6>
800e5d4: 2304 movs r3, #4
800e5d6: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e5da: e1e8 b.n 800e9ae <UART_SetConfig+0x5a6>
800e5dc: 2308 movs r3, #8
800e5de: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e5e2: e1e4 b.n 800e9ae <UART_SetConfig+0x5a6>
800e5e4: 2310 movs r3, #16
800e5e6: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e5ea: e1e0 b.n 800e9ae <UART_SetConfig+0x5a6>
800e5ec: 2320 movs r3, #32
800e5ee: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e5f2: e1dc b.n 800e9ae <UART_SetConfig+0x5a6>
800e5f4: 2340 movs r3, #64 @ 0x40
800e5f6: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e5fa: e1d8 b.n 800e9ae <UART_SetConfig+0x5a6>
800e5fc: 2380 movs r3, #128 @ 0x80
800e5fe: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e602: e1d4 b.n 800e9ae <UART_SetConfig+0x5a6>
800e604: 697b ldr r3, [r7, #20]
800e606: 681b ldr r3, [r3, #0]
800e608: 4a4f ldr r2, [pc, #316] @ (800e748 <UART_SetConfig+0x340>)
800e60a: 4293 cmp r3, r2
800e60c: d130 bne.n 800e670 <UART_SetConfig+0x268>
800e60e: 4b4c ldr r3, [pc, #304] @ (800e740 <UART_SetConfig+0x338>)
800e610: 6d5b ldr r3, [r3, #84] @ 0x54
800e612: f003 0307 and.w r3, r3, #7
800e616: 2b05 cmp r3, #5
800e618: d826 bhi.n 800e668 <UART_SetConfig+0x260>
800e61a: a201 add r2, pc, #4 @ (adr r2, 800e620 <UART_SetConfig+0x218>)
800e61c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e620: 0800e639 .word 0x0800e639
800e624: 0800e641 .word 0x0800e641
800e628: 0800e649 .word 0x0800e649
800e62c: 0800e651 .word 0x0800e651
800e630: 0800e659 .word 0x0800e659
800e634: 0800e661 .word 0x0800e661
800e638: 2300 movs r3, #0
800e63a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e63e: e1b6 b.n 800e9ae <UART_SetConfig+0x5a6>
800e640: 2304 movs r3, #4
800e642: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e646: e1b2 b.n 800e9ae <UART_SetConfig+0x5a6>
800e648: 2308 movs r3, #8
800e64a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e64e: e1ae b.n 800e9ae <UART_SetConfig+0x5a6>
800e650: 2310 movs r3, #16
800e652: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e656: e1aa b.n 800e9ae <UART_SetConfig+0x5a6>
800e658: 2320 movs r3, #32
800e65a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e65e: e1a6 b.n 800e9ae <UART_SetConfig+0x5a6>
800e660: 2340 movs r3, #64 @ 0x40
800e662: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e666: e1a2 b.n 800e9ae <UART_SetConfig+0x5a6>
800e668: 2380 movs r3, #128 @ 0x80
800e66a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e66e: e19e b.n 800e9ae <UART_SetConfig+0x5a6>
800e670: 697b ldr r3, [r7, #20]
800e672: 681b ldr r3, [r3, #0]
800e674: 4a35 ldr r2, [pc, #212] @ (800e74c <UART_SetConfig+0x344>)
800e676: 4293 cmp r3, r2
800e678: d130 bne.n 800e6dc <UART_SetConfig+0x2d4>
800e67a: 4b31 ldr r3, [pc, #196] @ (800e740 <UART_SetConfig+0x338>)
800e67c: 6d5b ldr r3, [r3, #84] @ 0x54
800e67e: f003 0307 and.w r3, r3, #7
800e682: 2b05 cmp r3, #5
800e684: d826 bhi.n 800e6d4 <UART_SetConfig+0x2cc>
800e686: a201 add r2, pc, #4 @ (adr r2, 800e68c <UART_SetConfig+0x284>)
800e688: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e68c: 0800e6a5 .word 0x0800e6a5
800e690: 0800e6ad .word 0x0800e6ad
800e694: 0800e6b5 .word 0x0800e6b5
800e698: 0800e6bd .word 0x0800e6bd
800e69c: 0800e6c5 .word 0x0800e6c5
800e6a0: 0800e6cd .word 0x0800e6cd
800e6a4: 2300 movs r3, #0
800e6a6: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e6aa: e180 b.n 800e9ae <UART_SetConfig+0x5a6>
800e6ac: 2304 movs r3, #4
800e6ae: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e6b2: e17c b.n 800e9ae <UART_SetConfig+0x5a6>
800e6b4: 2308 movs r3, #8
800e6b6: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e6ba: e178 b.n 800e9ae <UART_SetConfig+0x5a6>
800e6bc: 2310 movs r3, #16
800e6be: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e6c2: e174 b.n 800e9ae <UART_SetConfig+0x5a6>
800e6c4: 2320 movs r3, #32
800e6c6: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e6ca: e170 b.n 800e9ae <UART_SetConfig+0x5a6>
800e6cc: 2340 movs r3, #64 @ 0x40
800e6ce: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e6d2: e16c b.n 800e9ae <UART_SetConfig+0x5a6>
800e6d4: 2380 movs r3, #128 @ 0x80
800e6d6: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e6da: e168 b.n 800e9ae <UART_SetConfig+0x5a6>
800e6dc: 697b ldr r3, [r7, #20]
800e6de: 681b ldr r3, [r3, #0]
800e6e0: 4a1b ldr r2, [pc, #108] @ (800e750 <UART_SetConfig+0x348>)
800e6e2: 4293 cmp r3, r2
800e6e4: d142 bne.n 800e76c <UART_SetConfig+0x364>
800e6e6: 4b16 ldr r3, [pc, #88] @ (800e740 <UART_SetConfig+0x338>)
800e6e8: 6d5b ldr r3, [r3, #84] @ 0x54
800e6ea: f003 0307 and.w r3, r3, #7
800e6ee: 2b05 cmp r3, #5
800e6f0: d838 bhi.n 800e764 <UART_SetConfig+0x35c>
800e6f2: a201 add r2, pc, #4 @ (adr r2, 800e6f8 <UART_SetConfig+0x2f0>)
800e6f4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e6f8: 0800e711 .word 0x0800e711
800e6fc: 0800e719 .word 0x0800e719
800e700: 0800e721 .word 0x0800e721
800e704: 0800e729 .word 0x0800e729
800e708: 0800e755 .word 0x0800e755
800e70c: 0800e75d .word 0x0800e75d
800e710: 2300 movs r3, #0
800e712: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e716: e14a b.n 800e9ae <UART_SetConfig+0x5a6>
800e718: 2304 movs r3, #4
800e71a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e71e: e146 b.n 800e9ae <UART_SetConfig+0x5a6>
800e720: 2308 movs r3, #8
800e722: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e726: e142 b.n 800e9ae <UART_SetConfig+0x5a6>
800e728: 2310 movs r3, #16
800e72a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e72e: e13e b.n 800e9ae <UART_SetConfig+0x5a6>
800e730: cfff69f3 .word 0xcfff69f3
800e734: 58000c00 .word 0x58000c00
800e738: 11fff4ff .word 0x11fff4ff
800e73c: 40011000 .word 0x40011000
800e740: 58024400 .word 0x58024400
800e744: 40004400 .word 0x40004400
800e748: 40004800 .word 0x40004800
800e74c: 40004c00 .word 0x40004c00
800e750: 40005000 .word 0x40005000
800e754: 2320 movs r3, #32
800e756: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e75a: e128 b.n 800e9ae <UART_SetConfig+0x5a6>
800e75c: 2340 movs r3, #64 @ 0x40
800e75e: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e762: e124 b.n 800e9ae <UART_SetConfig+0x5a6>
800e764: 2380 movs r3, #128 @ 0x80
800e766: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e76a: e120 b.n 800e9ae <UART_SetConfig+0x5a6>
800e76c: 697b ldr r3, [r7, #20]
800e76e: 681b ldr r3, [r3, #0]
800e770: 4acb ldr r2, [pc, #812] @ (800eaa0 <UART_SetConfig+0x698>)
800e772: 4293 cmp r3, r2
800e774: d176 bne.n 800e864 <UART_SetConfig+0x45c>
800e776: 4bcb ldr r3, [pc, #812] @ (800eaa4 <UART_SetConfig+0x69c>)
800e778: 6d5b ldr r3, [r3, #84] @ 0x54
800e77a: f003 0338 and.w r3, r3, #56 @ 0x38
800e77e: 2b28 cmp r3, #40 @ 0x28
800e780: d86c bhi.n 800e85c <UART_SetConfig+0x454>
800e782: a201 add r2, pc, #4 @ (adr r2, 800e788 <UART_SetConfig+0x380>)
800e784: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e788: 0800e82d .word 0x0800e82d
800e78c: 0800e85d .word 0x0800e85d
800e790: 0800e85d .word 0x0800e85d
800e794: 0800e85d .word 0x0800e85d
800e798: 0800e85d .word 0x0800e85d
800e79c: 0800e85d .word 0x0800e85d
800e7a0: 0800e85d .word 0x0800e85d
800e7a4: 0800e85d .word 0x0800e85d
800e7a8: 0800e835 .word 0x0800e835
800e7ac: 0800e85d .word 0x0800e85d
800e7b0: 0800e85d .word 0x0800e85d
800e7b4: 0800e85d .word 0x0800e85d
800e7b8: 0800e85d .word 0x0800e85d
800e7bc: 0800e85d .word 0x0800e85d
800e7c0: 0800e85d .word 0x0800e85d
800e7c4: 0800e85d .word 0x0800e85d
800e7c8: 0800e83d .word 0x0800e83d
800e7cc: 0800e85d .word 0x0800e85d
800e7d0: 0800e85d .word 0x0800e85d
800e7d4: 0800e85d .word 0x0800e85d
800e7d8: 0800e85d .word 0x0800e85d
800e7dc: 0800e85d .word 0x0800e85d
800e7e0: 0800e85d .word 0x0800e85d
800e7e4: 0800e85d .word 0x0800e85d
800e7e8: 0800e845 .word 0x0800e845
800e7ec: 0800e85d .word 0x0800e85d
800e7f0: 0800e85d .word 0x0800e85d
800e7f4: 0800e85d .word 0x0800e85d
800e7f8: 0800e85d .word 0x0800e85d
800e7fc: 0800e85d .word 0x0800e85d
800e800: 0800e85d .word 0x0800e85d
800e804: 0800e85d .word 0x0800e85d
800e808: 0800e84d .word 0x0800e84d
800e80c: 0800e85d .word 0x0800e85d
800e810: 0800e85d .word 0x0800e85d
800e814: 0800e85d .word 0x0800e85d
800e818: 0800e85d .word 0x0800e85d
800e81c: 0800e85d .word 0x0800e85d
800e820: 0800e85d .word 0x0800e85d
800e824: 0800e85d .word 0x0800e85d
800e828: 0800e855 .word 0x0800e855
800e82c: 2301 movs r3, #1
800e82e: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e832: e0bc b.n 800e9ae <UART_SetConfig+0x5a6>
800e834: 2304 movs r3, #4
800e836: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e83a: e0b8 b.n 800e9ae <UART_SetConfig+0x5a6>
800e83c: 2308 movs r3, #8
800e83e: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e842: e0b4 b.n 800e9ae <UART_SetConfig+0x5a6>
800e844: 2310 movs r3, #16
800e846: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e84a: e0b0 b.n 800e9ae <UART_SetConfig+0x5a6>
800e84c: 2320 movs r3, #32
800e84e: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e852: e0ac b.n 800e9ae <UART_SetConfig+0x5a6>
800e854: 2340 movs r3, #64 @ 0x40
800e856: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e85a: e0a8 b.n 800e9ae <UART_SetConfig+0x5a6>
800e85c: 2380 movs r3, #128 @ 0x80
800e85e: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e862: e0a4 b.n 800e9ae <UART_SetConfig+0x5a6>
800e864: 697b ldr r3, [r7, #20]
800e866: 681b ldr r3, [r3, #0]
800e868: 4a8f ldr r2, [pc, #572] @ (800eaa8 <UART_SetConfig+0x6a0>)
800e86a: 4293 cmp r3, r2
800e86c: d130 bne.n 800e8d0 <UART_SetConfig+0x4c8>
800e86e: 4b8d ldr r3, [pc, #564] @ (800eaa4 <UART_SetConfig+0x69c>)
800e870: 6d5b ldr r3, [r3, #84] @ 0x54
800e872: f003 0307 and.w r3, r3, #7
800e876: 2b05 cmp r3, #5
800e878: d826 bhi.n 800e8c8 <UART_SetConfig+0x4c0>
800e87a: a201 add r2, pc, #4 @ (adr r2, 800e880 <UART_SetConfig+0x478>)
800e87c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e880: 0800e899 .word 0x0800e899
800e884: 0800e8a1 .word 0x0800e8a1
800e888: 0800e8a9 .word 0x0800e8a9
800e88c: 0800e8b1 .word 0x0800e8b1
800e890: 0800e8b9 .word 0x0800e8b9
800e894: 0800e8c1 .word 0x0800e8c1
800e898: 2300 movs r3, #0
800e89a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e89e: e086 b.n 800e9ae <UART_SetConfig+0x5a6>
800e8a0: 2304 movs r3, #4
800e8a2: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e8a6: e082 b.n 800e9ae <UART_SetConfig+0x5a6>
800e8a8: 2308 movs r3, #8
800e8aa: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e8ae: e07e b.n 800e9ae <UART_SetConfig+0x5a6>
800e8b0: 2310 movs r3, #16
800e8b2: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e8b6: e07a b.n 800e9ae <UART_SetConfig+0x5a6>
800e8b8: 2320 movs r3, #32
800e8ba: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e8be: e076 b.n 800e9ae <UART_SetConfig+0x5a6>
800e8c0: 2340 movs r3, #64 @ 0x40
800e8c2: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e8c6: e072 b.n 800e9ae <UART_SetConfig+0x5a6>
800e8c8: 2380 movs r3, #128 @ 0x80
800e8ca: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e8ce: e06e b.n 800e9ae <UART_SetConfig+0x5a6>
800e8d0: 697b ldr r3, [r7, #20]
800e8d2: 681b ldr r3, [r3, #0]
800e8d4: 4a75 ldr r2, [pc, #468] @ (800eaac <UART_SetConfig+0x6a4>)
800e8d6: 4293 cmp r3, r2
800e8d8: d130 bne.n 800e93c <UART_SetConfig+0x534>
800e8da: 4b72 ldr r3, [pc, #456] @ (800eaa4 <UART_SetConfig+0x69c>)
800e8dc: 6d5b ldr r3, [r3, #84] @ 0x54
800e8de: f003 0307 and.w r3, r3, #7
800e8e2: 2b05 cmp r3, #5
800e8e4: d826 bhi.n 800e934 <UART_SetConfig+0x52c>
800e8e6: a201 add r2, pc, #4 @ (adr r2, 800e8ec <UART_SetConfig+0x4e4>)
800e8e8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e8ec: 0800e905 .word 0x0800e905
800e8f0: 0800e90d .word 0x0800e90d
800e8f4: 0800e915 .word 0x0800e915
800e8f8: 0800e91d .word 0x0800e91d
800e8fc: 0800e925 .word 0x0800e925
800e900: 0800e92d .word 0x0800e92d
800e904: 2300 movs r3, #0
800e906: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e90a: e050 b.n 800e9ae <UART_SetConfig+0x5a6>
800e90c: 2304 movs r3, #4
800e90e: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e912: e04c b.n 800e9ae <UART_SetConfig+0x5a6>
800e914: 2308 movs r3, #8
800e916: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e91a: e048 b.n 800e9ae <UART_SetConfig+0x5a6>
800e91c: 2310 movs r3, #16
800e91e: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e922: e044 b.n 800e9ae <UART_SetConfig+0x5a6>
800e924: 2320 movs r3, #32
800e926: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e92a: e040 b.n 800e9ae <UART_SetConfig+0x5a6>
800e92c: 2340 movs r3, #64 @ 0x40
800e92e: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e932: e03c b.n 800e9ae <UART_SetConfig+0x5a6>
800e934: 2380 movs r3, #128 @ 0x80
800e936: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e93a: e038 b.n 800e9ae <UART_SetConfig+0x5a6>
800e93c: 697b ldr r3, [r7, #20]
800e93e: 681b ldr r3, [r3, #0]
800e940: 4a5b ldr r2, [pc, #364] @ (800eab0 <UART_SetConfig+0x6a8>)
800e942: 4293 cmp r3, r2
800e944: d130 bne.n 800e9a8 <UART_SetConfig+0x5a0>
800e946: 4b57 ldr r3, [pc, #348] @ (800eaa4 <UART_SetConfig+0x69c>)
800e948: 6d9b ldr r3, [r3, #88] @ 0x58
800e94a: f003 0307 and.w r3, r3, #7
800e94e: 2b05 cmp r3, #5
800e950: d826 bhi.n 800e9a0 <UART_SetConfig+0x598>
800e952: a201 add r2, pc, #4 @ (adr r2, 800e958 <UART_SetConfig+0x550>)
800e954: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e958: 0800e971 .word 0x0800e971
800e95c: 0800e979 .word 0x0800e979
800e960: 0800e981 .word 0x0800e981
800e964: 0800e989 .word 0x0800e989
800e968: 0800e991 .word 0x0800e991
800e96c: 0800e999 .word 0x0800e999
800e970: 2302 movs r3, #2
800e972: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e976: e01a b.n 800e9ae <UART_SetConfig+0x5a6>
800e978: 2304 movs r3, #4
800e97a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e97e: e016 b.n 800e9ae <UART_SetConfig+0x5a6>
800e980: 2308 movs r3, #8
800e982: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e986: e012 b.n 800e9ae <UART_SetConfig+0x5a6>
800e988: 2310 movs r3, #16
800e98a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e98e: e00e b.n 800e9ae <UART_SetConfig+0x5a6>
800e990: 2320 movs r3, #32
800e992: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e996: e00a b.n 800e9ae <UART_SetConfig+0x5a6>
800e998: 2340 movs r3, #64 @ 0x40
800e99a: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e99e: e006 b.n 800e9ae <UART_SetConfig+0x5a6>
800e9a0: 2380 movs r3, #128 @ 0x80
800e9a2: f887 3043 strb.w r3, [r7, #67] @ 0x43
800e9a6: e002 b.n 800e9ae <UART_SetConfig+0x5a6>
800e9a8: 2380 movs r3, #128 @ 0x80
800e9aa: f887 3043 strb.w r3, [r7, #67] @ 0x43
/* Check LPUART instance */
if (UART_INSTANCE_LOWPOWER(huart))
800e9ae: 697b ldr r3, [r7, #20]
800e9b0: 681b ldr r3, [r3, #0]
800e9b2: 4a3f ldr r2, [pc, #252] @ (800eab0 <UART_SetConfig+0x6a8>)
800e9b4: 4293 cmp r3, r2
800e9b6: f040 80f8 bne.w 800ebaa <UART_SetConfig+0x7a2>
{
/* Retrieve frequency clock */
switch (clocksource)
800e9ba: f897 3043 ldrb.w r3, [r7, #67] @ 0x43
800e9be: 2b20 cmp r3, #32
800e9c0: dc46 bgt.n 800ea50 <UART_SetConfig+0x648>
800e9c2: 2b02 cmp r3, #2
800e9c4: f2c0 8082 blt.w 800eacc <UART_SetConfig+0x6c4>
800e9c8: 3b02 subs r3, #2
800e9ca: 2b1e cmp r3, #30
800e9cc: d87e bhi.n 800eacc <UART_SetConfig+0x6c4>
800e9ce: a201 add r2, pc, #4 @ (adr r2, 800e9d4 <UART_SetConfig+0x5cc>)
800e9d0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e9d4: 0800ea57 .word 0x0800ea57
800e9d8: 0800eacd .word 0x0800eacd
800e9dc: 0800ea5f .word 0x0800ea5f
800e9e0: 0800eacd .word 0x0800eacd
800e9e4: 0800eacd .word 0x0800eacd
800e9e8: 0800eacd .word 0x0800eacd
800e9ec: 0800ea6f .word 0x0800ea6f
800e9f0: 0800eacd .word 0x0800eacd
800e9f4: 0800eacd .word 0x0800eacd
800e9f8: 0800eacd .word 0x0800eacd
800e9fc: 0800eacd .word 0x0800eacd
800ea00: 0800eacd .word 0x0800eacd
800ea04: 0800eacd .word 0x0800eacd
800ea08: 0800eacd .word 0x0800eacd
800ea0c: 0800ea7f .word 0x0800ea7f
800ea10: 0800eacd .word 0x0800eacd
800ea14: 0800eacd .word 0x0800eacd
800ea18: 0800eacd .word 0x0800eacd
800ea1c: 0800eacd .word 0x0800eacd
800ea20: 0800eacd .word 0x0800eacd
800ea24: 0800eacd .word 0x0800eacd
800ea28: 0800eacd .word 0x0800eacd
800ea2c: 0800eacd .word 0x0800eacd
800ea30: 0800eacd .word 0x0800eacd
800ea34: 0800eacd .word 0x0800eacd
800ea38: 0800eacd .word 0x0800eacd
800ea3c: 0800eacd .word 0x0800eacd
800ea40: 0800eacd .word 0x0800eacd
800ea44: 0800eacd .word 0x0800eacd
800ea48: 0800eacd .word 0x0800eacd
800ea4c: 0800eabf .word 0x0800eabf
800ea50: 2b40 cmp r3, #64 @ 0x40
800ea52: d037 beq.n 800eac4 <UART_SetConfig+0x6bc>
800ea54: e03a b.n 800eacc <UART_SetConfig+0x6c4>
{
case UART_CLOCKSOURCE_D3PCLK1:
pclk = HAL_RCCEx_GetD3PCLK1Freq();
800ea56: f7fe f887 bl 800cb68 <HAL_RCCEx_GetD3PCLK1Freq>
800ea5a: 63f8 str r0, [r7, #60] @ 0x3c
break;
800ea5c: e03c b.n 800ead8 <UART_SetConfig+0x6d0>
case UART_CLOCKSOURCE_PLL2:
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
800ea5e: f107 0324 add.w r3, r7, #36 @ 0x24
800ea62: 4618 mov r0, r3
800ea64: f7fe f896 bl 800cb94 <HAL_RCCEx_GetPLL2ClockFreq>
pclk = pll2_clocks.PLL2_Q_Frequency;
800ea68: 6abb ldr r3, [r7, #40] @ 0x28
800ea6a: 63fb str r3, [r7, #60] @ 0x3c
break;
800ea6c: e034 b.n 800ead8 <UART_SetConfig+0x6d0>
case UART_CLOCKSOURCE_PLL3:
HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
800ea6e: f107 0318 add.w r3, r7, #24
800ea72: 4618 mov r0, r3
800ea74: f7fe f9e2 bl 800ce3c <HAL_RCCEx_GetPLL3ClockFreq>
pclk = pll3_clocks.PLL3_Q_Frequency;
800ea78: 69fb ldr r3, [r7, #28]
800ea7a: 63fb str r3, [r7, #60] @ 0x3c
break;
800ea7c: e02c b.n 800ead8 <UART_SetConfig+0x6d0>
case UART_CLOCKSOURCE_HSI:
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
800ea7e: 4b09 ldr r3, [pc, #36] @ (800eaa4 <UART_SetConfig+0x69c>)
800ea80: 681b ldr r3, [r3, #0]
800ea82: f003 0320 and.w r3, r3, #32
800ea86: 2b00 cmp r3, #0
800ea88: d016 beq.n 800eab8 <UART_SetConfig+0x6b0>
{
pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
800ea8a: 4b06 ldr r3, [pc, #24] @ (800eaa4 <UART_SetConfig+0x69c>)
800ea8c: 681b ldr r3, [r3, #0]
800ea8e: 08db lsrs r3, r3, #3
800ea90: f003 0303 and.w r3, r3, #3
800ea94: 4a07 ldr r2, [pc, #28] @ (800eab4 <UART_SetConfig+0x6ac>)
800ea96: fa22 f303 lsr.w r3, r2, r3
800ea9a: 63fb str r3, [r7, #60] @ 0x3c
}
else
{
pclk = (uint32_t) HSI_VALUE;
}
break;
800ea9c: e01c b.n 800ead8 <UART_SetConfig+0x6d0>
800ea9e: bf00 nop
800eaa0: 40011400 .word 0x40011400
800eaa4: 58024400 .word 0x58024400
800eaa8: 40007800 .word 0x40007800
800eaac: 40007c00 .word 0x40007c00
800eab0: 58000c00 .word 0x58000c00
800eab4: 03d09000 .word 0x03d09000
pclk = (uint32_t) HSI_VALUE;
800eab8: 4b9d ldr r3, [pc, #628] @ (800ed30 <UART_SetConfig+0x928>)
800eaba: 63fb str r3, [r7, #60] @ 0x3c
break;
800eabc: e00c b.n 800ead8 <UART_SetConfig+0x6d0>
case UART_CLOCKSOURCE_CSI:
pclk = (uint32_t) CSI_VALUE;
800eabe: 4b9d ldr r3, [pc, #628] @ (800ed34 <UART_SetConfig+0x92c>)
800eac0: 63fb str r3, [r7, #60] @ 0x3c
break;
800eac2: e009 b.n 800ead8 <UART_SetConfig+0x6d0>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
800eac4: f44f 4300 mov.w r3, #32768 @ 0x8000
800eac8: 63fb str r3, [r7, #60] @ 0x3c
break;
800eaca: e005 b.n 800ead8 <UART_SetConfig+0x6d0>
default:
pclk = 0U;
800eacc: 2300 movs r3, #0
800eace: 63fb str r3, [r7, #60] @ 0x3c
ret = HAL_ERROR;
800ead0: 2301 movs r3, #1
800ead2: f887 3042 strb.w r3, [r7, #66] @ 0x42
break;
800ead6: bf00 nop
}
/* If proper clock source reported */
if (pclk != 0U)
800ead8: 6bfb ldr r3, [r7, #60] @ 0x3c
800eada: 2b00 cmp r3, #0
800eadc: f000 81de beq.w 800ee9c <UART_SetConfig+0xa94>
{
/* Compute clock after Prescaler */
lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
800eae0: 697b ldr r3, [r7, #20]
800eae2: 6a5b ldr r3, [r3, #36] @ 0x24
800eae4: 4a94 ldr r2, [pc, #592] @ (800ed38 <UART_SetConfig+0x930>)
800eae6: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
800eaea: 461a mov r2, r3
800eaec: 6bfb ldr r3, [r7, #60] @ 0x3c
800eaee: fbb3 f3f2 udiv r3, r3, r2
800eaf2: 633b str r3, [r7, #48] @ 0x30
/* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
800eaf4: 697b ldr r3, [r7, #20]
800eaf6: 685a ldr r2, [r3, #4]
800eaf8: 4613 mov r3, r2
800eafa: 005b lsls r3, r3, #1
800eafc: 4413 add r3, r2
800eafe: 6b3a ldr r2, [r7, #48] @ 0x30
800eb00: 429a cmp r2, r3
800eb02: d305 bcc.n 800eb10 <UART_SetConfig+0x708>
(lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
800eb04: 697b ldr r3, [r7, #20]
800eb06: 685b ldr r3, [r3, #4]
800eb08: 031b lsls r3, r3, #12
if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
800eb0a: 6b3a ldr r2, [r7, #48] @ 0x30
800eb0c: 429a cmp r2, r3
800eb0e: d903 bls.n 800eb18 <UART_SetConfig+0x710>
{
ret = HAL_ERROR;
800eb10: 2301 movs r3, #1
800eb12: f887 3042 strb.w r3, [r7, #66] @ 0x42
800eb16: e1c1 b.n 800ee9c <UART_SetConfig+0xa94>
}
else
{
/* Check computed UsartDiv value is in allocated range
(it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
800eb18: 6bfb ldr r3, [r7, #60] @ 0x3c
800eb1a: 2200 movs r2, #0
800eb1c: 60bb str r3, [r7, #8]
800eb1e: 60fa str r2, [r7, #12]
800eb20: 697b ldr r3, [r7, #20]
800eb22: 6a5b ldr r3, [r3, #36] @ 0x24
800eb24: 4a84 ldr r2, [pc, #528] @ (800ed38 <UART_SetConfig+0x930>)
800eb26: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
800eb2a: b29b uxth r3, r3
800eb2c: 2200 movs r2, #0
800eb2e: 603b str r3, [r7, #0]
800eb30: 607a str r2, [r7, #4]
800eb32: e9d7 2300 ldrd r2, r3, [r7]
800eb36: e9d7 0102 ldrd r0, r1, [r7, #8]
800eb3a: f7f1 fdf5 bl 8000728 <__aeabi_uldivmod>
800eb3e: 4602 mov r2, r0
800eb40: 460b mov r3, r1
800eb42: 4610 mov r0, r2
800eb44: 4619 mov r1, r3
800eb46: f04f 0200 mov.w r2, #0
800eb4a: f04f 0300 mov.w r3, #0
800eb4e: 020b lsls r3, r1, #8
800eb50: ea43 6310 orr.w r3, r3, r0, lsr #24
800eb54: 0202 lsls r2, r0, #8
800eb56: 6979 ldr r1, [r7, #20]
800eb58: 6849 ldr r1, [r1, #4]
800eb5a: 0849 lsrs r1, r1, #1
800eb5c: 2000 movs r0, #0
800eb5e: 460c mov r4, r1
800eb60: 4605 mov r5, r0
800eb62: eb12 0804 adds.w r8, r2, r4
800eb66: eb43 0905 adc.w r9, r3, r5
800eb6a: 697b ldr r3, [r7, #20]
800eb6c: 685b ldr r3, [r3, #4]
800eb6e: 2200 movs r2, #0
800eb70: 469a mov sl, r3
800eb72: 4693 mov fp, r2
800eb74: 4652 mov r2, sl
800eb76: 465b mov r3, fp
800eb78: 4640 mov r0, r8
800eb7a: 4649 mov r1, r9
800eb7c: f7f1 fdd4 bl 8000728 <__aeabi_uldivmod>
800eb80: 4602 mov r2, r0
800eb82: 460b mov r3, r1
800eb84: 4613 mov r3, r2
800eb86: 63bb str r3, [r7, #56] @ 0x38
if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
800eb88: 6bbb ldr r3, [r7, #56] @ 0x38
800eb8a: f5b3 7f40 cmp.w r3, #768 @ 0x300
800eb8e: d308 bcc.n 800eba2 <UART_SetConfig+0x79a>
800eb90: 6bbb ldr r3, [r7, #56] @ 0x38
800eb92: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
800eb96: d204 bcs.n 800eba2 <UART_SetConfig+0x79a>
{
huart->Instance->BRR = usartdiv;
800eb98: 697b ldr r3, [r7, #20]
800eb9a: 681b ldr r3, [r3, #0]
800eb9c: 6bba ldr r2, [r7, #56] @ 0x38
800eb9e: 60da str r2, [r3, #12]
800eba0: e17c b.n 800ee9c <UART_SetConfig+0xa94>
}
else
{
ret = HAL_ERROR;
800eba2: 2301 movs r3, #1
800eba4: f887 3042 strb.w r3, [r7, #66] @ 0x42
800eba8: e178 b.n 800ee9c <UART_SetConfig+0xa94>
} /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
(lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
} /* if (pclk != 0) */
}
/* Check UART Over Sampling to set Baud Rate Register */
else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
800ebaa: 697b ldr r3, [r7, #20]
800ebac: 69db ldr r3, [r3, #28]
800ebae: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
800ebb2: f040 80c5 bne.w 800ed40 <UART_SetConfig+0x938>
{
switch (clocksource)
800ebb6: f897 3043 ldrb.w r3, [r7, #67] @ 0x43
800ebba: 2b20 cmp r3, #32
800ebbc: dc48 bgt.n 800ec50 <UART_SetConfig+0x848>
800ebbe: 2b00 cmp r3, #0
800ebc0: db7b blt.n 800ecba <UART_SetConfig+0x8b2>
800ebc2: 2b20 cmp r3, #32
800ebc4: d879 bhi.n 800ecba <UART_SetConfig+0x8b2>
800ebc6: a201 add r2, pc, #4 @ (adr r2, 800ebcc <UART_SetConfig+0x7c4>)
800ebc8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800ebcc: 0800ec57 .word 0x0800ec57
800ebd0: 0800ec5f .word 0x0800ec5f
800ebd4: 0800ecbb .word 0x0800ecbb
800ebd8: 0800ecbb .word 0x0800ecbb
800ebdc: 0800ec67 .word 0x0800ec67
800ebe0: 0800ecbb .word 0x0800ecbb
800ebe4: 0800ecbb .word 0x0800ecbb
800ebe8: 0800ecbb .word 0x0800ecbb
800ebec: 0800ec77 .word 0x0800ec77
800ebf0: 0800ecbb .word 0x0800ecbb
800ebf4: 0800ecbb .word 0x0800ecbb
800ebf8: 0800ecbb .word 0x0800ecbb
800ebfc: 0800ecbb .word 0x0800ecbb
800ec00: 0800ecbb .word 0x0800ecbb
800ec04: 0800ecbb .word 0x0800ecbb
800ec08: 0800ecbb .word 0x0800ecbb
800ec0c: 0800ec87 .word 0x0800ec87
800ec10: 0800ecbb .word 0x0800ecbb
800ec14: 0800ecbb .word 0x0800ecbb
800ec18: 0800ecbb .word 0x0800ecbb
800ec1c: 0800ecbb .word 0x0800ecbb
800ec20: 0800ecbb .word 0x0800ecbb
800ec24: 0800ecbb .word 0x0800ecbb
800ec28: 0800ecbb .word 0x0800ecbb
800ec2c: 0800ecbb .word 0x0800ecbb
800ec30: 0800ecbb .word 0x0800ecbb
800ec34: 0800ecbb .word 0x0800ecbb
800ec38: 0800ecbb .word 0x0800ecbb
800ec3c: 0800ecbb .word 0x0800ecbb
800ec40: 0800ecbb .word 0x0800ecbb
800ec44: 0800ecbb .word 0x0800ecbb
800ec48: 0800ecbb .word 0x0800ecbb
800ec4c: 0800ecad .word 0x0800ecad
800ec50: 2b40 cmp r3, #64 @ 0x40
800ec52: d02e beq.n 800ecb2 <UART_SetConfig+0x8aa>
800ec54: e031 b.n 800ecba <UART_SetConfig+0x8b2>
{
case UART_CLOCKSOURCE_D2PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
800ec56: f7fc fd2b bl 800b6b0 <HAL_RCC_GetPCLK1Freq>
800ec5a: 63f8 str r0, [r7, #60] @ 0x3c
break;
800ec5c: e033 b.n 800ecc6 <UART_SetConfig+0x8be>
case UART_CLOCKSOURCE_D2PCLK2:
pclk = HAL_RCC_GetPCLK2Freq();
800ec5e: f7fc fd3d bl 800b6dc <HAL_RCC_GetPCLK2Freq>
800ec62: 63f8 str r0, [r7, #60] @ 0x3c
break;
800ec64: e02f b.n 800ecc6 <UART_SetConfig+0x8be>
case UART_CLOCKSOURCE_PLL2:
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
800ec66: f107 0324 add.w r3, r7, #36 @ 0x24
800ec6a: 4618 mov r0, r3
800ec6c: f7fd ff92 bl 800cb94 <HAL_RCCEx_GetPLL2ClockFreq>
pclk = pll2_clocks.PLL2_Q_Frequency;
800ec70: 6abb ldr r3, [r7, #40] @ 0x28
800ec72: 63fb str r3, [r7, #60] @ 0x3c
break;
800ec74: e027 b.n 800ecc6 <UART_SetConfig+0x8be>
case UART_CLOCKSOURCE_PLL3:
HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
800ec76: f107 0318 add.w r3, r7, #24
800ec7a: 4618 mov r0, r3
800ec7c: f7fe f8de bl 800ce3c <HAL_RCCEx_GetPLL3ClockFreq>
pclk = pll3_clocks.PLL3_Q_Frequency;
800ec80: 69fb ldr r3, [r7, #28]
800ec82: 63fb str r3, [r7, #60] @ 0x3c
break;
800ec84: e01f b.n 800ecc6 <UART_SetConfig+0x8be>
case UART_CLOCKSOURCE_HSI:
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
800ec86: 4b2d ldr r3, [pc, #180] @ (800ed3c <UART_SetConfig+0x934>)
800ec88: 681b ldr r3, [r3, #0]
800ec8a: f003 0320 and.w r3, r3, #32
800ec8e: 2b00 cmp r3, #0
800ec90: d009 beq.n 800eca6 <UART_SetConfig+0x89e>
{
pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
800ec92: 4b2a ldr r3, [pc, #168] @ (800ed3c <UART_SetConfig+0x934>)
800ec94: 681b ldr r3, [r3, #0]
800ec96: 08db lsrs r3, r3, #3
800ec98: f003 0303 and.w r3, r3, #3
800ec9c: 4a24 ldr r2, [pc, #144] @ (800ed30 <UART_SetConfig+0x928>)
800ec9e: fa22 f303 lsr.w r3, r2, r3
800eca2: 63fb str r3, [r7, #60] @ 0x3c
}
else
{
pclk = (uint32_t) HSI_VALUE;
}
break;
800eca4: e00f b.n 800ecc6 <UART_SetConfig+0x8be>
pclk = (uint32_t) HSI_VALUE;
800eca6: 4b22 ldr r3, [pc, #136] @ (800ed30 <UART_SetConfig+0x928>)
800eca8: 63fb str r3, [r7, #60] @ 0x3c
break;
800ecaa: e00c b.n 800ecc6 <UART_SetConfig+0x8be>
case UART_CLOCKSOURCE_CSI:
pclk = (uint32_t) CSI_VALUE;
800ecac: 4b21 ldr r3, [pc, #132] @ (800ed34 <UART_SetConfig+0x92c>)
800ecae: 63fb str r3, [r7, #60] @ 0x3c
break;
800ecb0: e009 b.n 800ecc6 <UART_SetConfig+0x8be>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
800ecb2: f44f 4300 mov.w r3, #32768 @ 0x8000
800ecb6: 63fb str r3, [r7, #60] @ 0x3c
break;
800ecb8: e005 b.n 800ecc6 <UART_SetConfig+0x8be>
default:
pclk = 0U;
800ecba: 2300 movs r3, #0
800ecbc: 63fb str r3, [r7, #60] @ 0x3c
ret = HAL_ERROR;
800ecbe: 2301 movs r3, #1
800ecc0: f887 3042 strb.w r3, [r7, #66] @ 0x42
break;
800ecc4: bf00 nop
}
/* USARTDIV must be greater than or equal to 0d16 */
if (pclk != 0U)
800ecc6: 6bfb ldr r3, [r7, #60] @ 0x3c
800ecc8: 2b00 cmp r3, #0
800ecca: f000 80e7 beq.w 800ee9c <UART_SetConfig+0xa94>
{
usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
800ecce: 697b ldr r3, [r7, #20]
800ecd0: 6a5b ldr r3, [r3, #36] @ 0x24
800ecd2: 4a19 ldr r2, [pc, #100] @ (800ed38 <UART_SetConfig+0x930>)
800ecd4: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
800ecd8: 461a mov r2, r3
800ecda: 6bfb ldr r3, [r7, #60] @ 0x3c
800ecdc: fbb3 f3f2 udiv r3, r3, r2
800ece0: 005a lsls r2, r3, #1
800ece2: 697b ldr r3, [r7, #20]
800ece4: 685b ldr r3, [r3, #4]
800ece6: 085b lsrs r3, r3, #1
800ece8: 441a add r2, r3
800ecea: 697b ldr r3, [r7, #20]
800ecec: 685b ldr r3, [r3, #4]
800ecee: fbb2 f3f3 udiv r3, r2, r3
800ecf2: 63bb str r3, [r7, #56] @ 0x38
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
800ecf4: 6bbb ldr r3, [r7, #56] @ 0x38
800ecf6: 2b0f cmp r3, #15
800ecf8: d916 bls.n 800ed28 <UART_SetConfig+0x920>
800ecfa: 6bbb ldr r3, [r7, #56] @ 0x38
800ecfc: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800ed00: d212 bcs.n 800ed28 <UART_SetConfig+0x920>
{
brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
800ed02: 6bbb ldr r3, [r7, #56] @ 0x38
800ed04: b29b uxth r3, r3
800ed06: f023 030f bic.w r3, r3, #15
800ed0a: 86fb strh r3, [r7, #54] @ 0x36
brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
800ed0c: 6bbb ldr r3, [r7, #56] @ 0x38
800ed0e: 085b lsrs r3, r3, #1
800ed10: b29b uxth r3, r3
800ed12: f003 0307 and.w r3, r3, #7
800ed16: b29a uxth r2, r3
800ed18: 8efb ldrh r3, [r7, #54] @ 0x36
800ed1a: 4313 orrs r3, r2
800ed1c: 86fb strh r3, [r7, #54] @ 0x36
huart->Instance->BRR = brrtemp;
800ed1e: 697b ldr r3, [r7, #20]
800ed20: 681b ldr r3, [r3, #0]
800ed22: 8efa ldrh r2, [r7, #54] @ 0x36
800ed24: 60da str r2, [r3, #12]
800ed26: e0b9 b.n 800ee9c <UART_SetConfig+0xa94>
}
else
{
ret = HAL_ERROR;
800ed28: 2301 movs r3, #1
800ed2a: f887 3042 strb.w r3, [r7, #66] @ 0x42
800ed2e: e0b5 b.n 800ee9c <UART_SetConfig+0xa94>
800ed30: 03d09000 .word 0x03d09000
800ed34: 003d0900 .word 0x003d0900
800ed38: 08031cf4 .word 0x08031cf4
800ed3c: 58024400 .word 0x58024400
}
}
}
else
{
switch (clocksource)
800ed40: f897 3043 ldrb.w r3, [r7, #67] @ 0x43
800ed44: 2b20 cmp r3, #32
800ed46: dc49 bgt.n 800eddc <UART_SetConfig+0x9d4>
800ed48: 2b00 cmp r3, #0
800ed4a: db7c blt.n 800ee46 <UART_SetConfig+0xa3e>
800ed4c: 2b20 cmp r3, #32
800ed4e: d87a bhi.n 800ee46 <UART_SetConfig+0xa3e>
800ed50: a201 add r2, pc, #4 @ (adr r2, 800ed58 <UART_SetConfig+0x950>)
800ed52: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800ed56: bf00 nop
800ed58: 0800ede3 .word 0x0800ede3
800ed5c: 0800edeb .word 0x0800edeb
800ed60: 0800ee47 .word 0x0800ee47
800ed64: 0800ee47 .word 0x0800ee47
800ed68: 0800edf3 .word 0x0800edf3
800ed6c: 0800ee47 .word 0x0800ee47
800ed70: 0800ee47 .word 0x0800ee47
800ed74: 0800ee47 .word 0x0800ee47
800ed78: 0800ee03 .word 0x0800ee03
800ed7c: 0800ee47 .word 0x0800ee47
800ed80: 0800ee47 .word 0x0800ee47
800ed84: 0800ee47 .word 0x0800ee47
800ed88: 0800ee47 .word 0x0800ee47
800ed8c: 0800ee47 .word 0x0800ee47
800ed90: 0800ee47 .word 0x0800ee47
800ed94: 0800ee47 .word 0x0800ee47
800ed98: 0800ee13 .word 0x0800ee13
800ed9c: 0800ee47 .word 0x0800ee47
800eda0: 0800ee47 .word 0x0800ee47
800eda4: 0800ee47 .word 0x0800ee47
800eda8: 0800ee47 .word 0x0800ee47
800edac: 0800ee47 .word 0x0800ee47
800edb0: 0800ee47 .word 0x0800ee47
800edb4: 0800ee47 .word 0x0800ee47
800edb8: 0800ee47 .word 0x0800ee47
800edbc: 0800ee47 .word 0x0800ee47
800edc0: 0800ee47 .word 0x0800ee47
800edc4: 0800ee47 .word 0x0800ee47
800edc8: 0800ee47 .word 0x0800ee47
800edcc: 0800ee47 .word 0x0800ee47
800edd0: 0800ee47 .word 0x0800ee47
800edd4: 0800ee47 .word 0x0800ee47
800edd8: 0800ee39 .word 0x0800ee39
800eddc: 2b40 cmp r3, #64 @ 0x40
800edde: d02e beq.n 800ee3e <UART_SetConfig+0xa36>
800ede0: e031 b.n 800ee46 <UART_SetConfig+0xa3e>
{
case UART_CLOCKSOURCE_D2PCLK1:
pclk = HAL_RCC_GetPCLK1Freq();
800ede2: f7fc fc65 bl 800b6b0 <HAL_RCC_GetPCLK1Freq>
800ede6: 63f8 str r0, [r7, #60] @ 0x3c
break;
800ede8: e033 b.n 800ee52 <UART_SetConfig+0xa4a>
case UART_CLOCKSOURCE_D2PCLK2:
pclk = HAL_RCC_GetPCLK2Freq();
800edea: f7fc fc77 bl 800b6dc <HAL_RCC_GetPCLK2Freq>
800edee: 63f8 str r0, [r7, #60] @ 0x3c
break;
800edf0: e02f b.n 800ee52 <UART_SetConfig+0xa4a>
case UART_CLOCKSOURCE_PLL2:
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
800edf2: f107 0324 add.w r3, r7, #36 @ 0x24
800edf6: 4618 mov r0, r3
800edf8: f7fd fecc bl 800cb94 <HAL_RCCEx_GetPLL2ClockFreq>
pclk = pll2_clocks.PLL2_Q_Frequency;
800edfc: 6abb ldr r3, [r7, #40] @ 0x28
800edfe: 63fb str r3, [r7, #60] @ 0x3c
break;
800ee00: e027 b.n 800ee52 <UART_SetConfig+0xa4a>
case UART_CLOCKSOURCE_PLL3:
HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
800ee02: f107 0318 add.w r3, r7, #24
800ee06: 4618 mov r0, r3
800ee08: f7fe f818 bl 800ce3c <HAL_RCCEx_GetPLL3ClockFreq>
pclk = pll3_clocks.PLL3_Q_Frequency;
800ee0c: 69fb ldr r3, [r7, #28]
800ee0e: 63fb str r3, [r7, #60] @ 0x3c
break;
800ee10: e01f b.n 800ee52 <UART_SetConfig+0xa4a>
case UART_CLOCKSOURCE_HSI:
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
800ee12: 4b2d ldr r3, [pc, #180] @ (800eec8 <UART_SetConfig+0xac0>)
800ee14: 681b ldr r3, [r3, #0]
800ee16: f003 0320 and.w r3, r3, #32
800ee1a: 2b00 cmp r3, #0
800ee1c: d009 beq.n 800ee32 <UART_SetConfig+0xa2a>
{
pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
800ee1e: 4b2a ldr r3, [pc, #168] @ (800eec8 <UART_SetConfig+0xac0>)
800ee20: 681b ldr r3, [r3, #0]
800ee22: 08db lsrs r3, r3, #3
800ee24: f003 0303 and.w r3, r3, #3
800ee28: 4a28 ldr r2, [pc, #160] @ (800eecc <UART_SetConfig+0xac4>)
800ee2a: fa22 f303 lsr.w r3, r2, r3
800ee2e: 63fb str r3, [r7, #60] @ 0x3c
}
else
{
pclk = (uint32_t) HSI_VALUE;
}
break;
800ee30: e00f b.n 800ee52 <UART_SetConfig+0xa4a>
pclk = (uint32_t) HSI_VALUE;
800ee32: 4b26 ldr r3, [pc, #152] @ (800eecc <UART_SetConfig+0xac4>)
800ee34: 63fb str r3, [r7, #60] @ 0x3c
break;
800ee36: e00c b.n 800ee52 <UART_SetConfig+0xa4a>
case UART_CLOCKSOURCE_CSI:
pclk = (uint32_t) CSI_VALUE;
800ee38: 4b25 ldr r3, [pc, #148] @ (800eed0 <UART_SetConfig+0xac8>)
800ee3a: 63fb str r3, [r7, #60] @ 0x3c
break;
800ee3c: e009 b.n 800ee52 <UART_SetConfig+0xa4a>
case UART_CLOCKSOURCE_LSE:
pclk = (uint32_t) LSE_VALUE;
800ee3e: f44f 4300 mov.w r3, #32768 @ 0x8000
800ee42: 63fb str r3, [r7, #60] @ 0x3c
break;
800ee44: e005 b.n 800ee52 <UART_SetConfig+0xa4a>
default:
pclk = 0U;
800ee46: 2300 movs r3, #0
800ee48: 63fb str r3, [r7, #60] @ 0x3c
ret = HAL_ERROR;
800ee4a: 2301 movs r3, #1
800ee4c: f887 3042 strb.w r3, [r7, #66] @ 0x42
break;
800ee50: bf00 nop
}
if (pclk != 0U)
800ee52: 6bfb ldr r3, [r7, #60] @ 0x3c
800ee54: 2b00 cmp r3, #0
800ee56: d021 beq.n 800ee9c <UART_SetConfig+0xa94>
{
/* USARTDIV must be greater than or equal to 0d16 */
usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
800ee58: 697b ldr r3, [r7, #20]
800ee5a: 6a5b ldr r3, [r3, #36] @ 0x24
800ee5c: 4a1d ldr r2, [pc, #116] @ (800eed4 <UART_SetConfig+0xacc>)
800ee5e: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
800ee62: 461a mov r2, r3
800ee64: 6bfb ldr r3, [r7, #60] @ 0x3c
800ee66: fbb3 f2f2 udiv r2, r3, r2
800ee6a: 697b ldr r3, [r7, #20]
800ee6c: 685b ldr r3, [r3, #4]
800ee6e: 085b lsrs r3, r3, #1
800ee70: 441a add r2, r3
800ee72: 697b ldr r3, [r7, #20]
800ee74: 685b ldr r3, [r3, #4]
800ee76: fbb2 f3f3 udiv r3, r2, r3
800ee7a: 63bb str r3, [r7, #56] @ 0x38
if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
800ee7c: 6bbb ldr r3, [r7, #56] @ 0x38
800ee7e: 2b0f cmp r3, #15
800ee80: d909 bls.n 800ee96 <UART_SetConfig+0xa8e>
800ee82: 6bbb ldr r3, [r7, #56] @ 0x38
800ee84: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800ee88: d205 bcs.n 800ee96 <UART_SetConfig+0xa8e>
{
huart->Instance->BRR = (uint16_t)usartdiv;
800ee8a: 6bbb ldr r3, [r7, #56] @ 0x38
800ee8c: b29a uxth r2, r3
800ee8e: 697b ldr r3, [r7, #20]
800ee90: 681b ldr r3, [r3, #0]
800ee92: 60da str r2, [r3, #12]
800ee94: e002 b.n 800ee9c <UART_SetConfig+0xa94>
}
else
{
ret = HAL_ERROR;
800ee96: 2301 movs r3, #1
800ee98: f887 3042 strb.w r3, [r7, #66] @ 0x42
}
}
}
/* Initialize the number of data to process during RX/TX ISR execution */
huart->NbTxDataToProcess = 1;
800ee9c: 697b ldr r3, [r7, #20]
800ee9e: 2201 movs r2, #1
800eea0: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
huart->NbRxDataToProcess = 1;
800eea4: 697b ldr r3, [r7, #20]
800eea6: 2201 movs r2, #1
800eea8: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
/* Clear ISR function pointers */
huart->RxISR = NULL;
800eeac: 697b ldr r3, [r7, #20]
800eeae: 2200 movs r2, #0
800eeb0: 675a str r2, [r3, #116] @ 0x74
huart->TxISR = NULL;
800eeb2: 697b ldr r3, [r7, #20]
800eeb4: 2200 movs r2, #0
800eeb6: 679a str r2, [r3, #120] @ 0x78
return ret;
800eeb8: f897 3042 ldrb.w r3, [r7, #66] @ 0x42
}
800eebc: 4618 mov r0, r3
800eebe: 3748 adds r7, #72 @ 0x48
800eec0: 46bd mov sp, r7
800eec2: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
800eec6: bf00 nop
800eec8: 58024400 .word 0x58024400
800eecc: 03d09000 .word 0x03d09000
800eed0: 003d0900 .word 0x003d0900
800eed4: 08031cf4 .word 0x08031cf4
0800eed8 <UART_AdvFeatureConfig>:
* @brief Configure the UART peripheral advanced features.
* @param huart UART handle.
* @retval None
*/
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
800eed8: b480 push {r7}
800eeda: b083 sub sp, #12
800eedc: af00 add r7, sp, #0
800eede: 6078 str r0, [r7, #4]
/* Check whether the set of advanced features to configure is properly set */
assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
/* if required, configure RX/TX pins swap */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
800eee0: 687b ldr r3, [r7, #4]
800eee2: 6a9b ldr r3, [r3, #40] @ 0x28
800eee4: f003 0308 and.w r3, r3, #8
800eee8: 2b00 cmp r3, #0
800eeea: d00a beq.n 800ef02 <UART_AdvFeatureConfig+0x2a>
{
assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
800eeec: 687b ldr r3, [r7, #4]
800eeee: 681b ldr r3, [r3, #0]
800eef0: 685b ldr r3, [r3, #4]
800eef2: f423 4100 bic.w r1, r3, #32768 @ 0x8000
800eef6: 687b ldr r3, [r7, #4]
800eef8: 6b9a ldr r2, [r3, #56] @ 0x38
800eefa: 687b ldr r3, [r7, #4]
800eefc: 681b ldr r3, [r3, #0]
800eefe: 430a orrs r2, r1
800ef00: 605a str r2, [r3, #4]
}
/* if required, configure TX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
800ef02: 687b ldr r3, [r7, #4]
800ef04: 6a9b ldr r3, [r3, #40] @ 0x28
800ef06: f003 0301 and.w r3, r3, #1
800ef0a: 2b00 cmp r3, #0
800ef0c: d00a beq.n 800ef24 <UART_AdvFeatureConfig+0x4c>
{
assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
800ef0e: 687b ldr r3, [r7, #4]
800ef10: 681b ldr r3, [r3, #0]
800ef12: 685b ldr r3, [r3, #4]
800ef14: f423 3100 bic.w r1, r3, #131072 @ 0x20000
800ef18: 687b ldr r3, [r7, #4]
800ef1a: 6ada ldr r2, [r3, #44] @ 0x2c
800ef1c: 687b ldr r3, [r7, #4]
800ef1e: 681b ldr r3, [r3, #0]
800ef20: 430a orrs r2, r1
800ef22: 605a str r2, [r3, #4]
}
/* if required, configure RX pin active level inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
800ef24: 687b ldr r3, [r7, #4]
800ef26: 6a9b ldr r3, [r3, #40] @ 0x28
800ef28: f003 0302 and.w r3, r3, #2
800ef2c: 2b00 cmp r3, #0
800ef2e: d00a beq.n 800ef46 <UART_AdvFeatureConfig+0x6e>
{
assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
800ef30: 687b ldr r3, [r7, #4]
800ef32: 681b ldr r3, [r3, #0]
800ef34: 685b ldr r3, [r3, #4]
800ef36: f423 3180 bic.w r1, r3, #65536 @ 0x10000
800ef3a: 687b ldr r3, [r7, #4]
800ef3c: 6b1a ldr r2, [r3, #48] @ 0x30
800ef3e: 687b ldr r3, [r7, #4]
800ef40: 681b ldr r3, [r3, #0]
800ef42: 430a orrs r2, r1
800ef44: 605a str r2, [r3, #4]
}
/* if required, configure data inversion */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
800ef46: 687b ldr r3, [r7, #4]
800ef48: 6a9b ldr r3, [r3, #40] @ 0x28
800ef4a: f003 0304 and.w r3, r3, #4
800ef4e: 2b00 cmp r3, #0
800ef50: d00a beq.n 800ef68 <UART_AdvFeatureConfig+0x90>
{
assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
800ef52: 687b ldr r3, [r7, #4]
800ef54: 681b ldr r3, [r3, #0]
800ef56: 685b ldr r3, [r3, #4]
800ef58: f423 2180 bic.w r1, r3, #262144 @ 0x40000
800ef5c: 687b ldr r3, [r7, #4]
800ef5e: 6b5a ldr r2, [r3, #52] @ 0x34
800ef60: 687b ldr r3, [r7, #4]
800ef62: 681b ldr r3, [r3, #0]
800ef64: 430a orrs r2, r1
800ef66: 605a str r2, [r3, #4]
}
/* if required, configure RX overrun detection disabling */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
800ef68: 687b ldr r3, [r7, #4]
800ef6a: 6a9b ldr r3, [r3, #40] @ 0x28
800ef6c: f003 0310 and.w r3, r3, #16
800ef70: 2b00 cmp r3, #0
800ef72: d00a beq.n 800ef8a <UART_AdvFeatureConfig+0xb2>
{
assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
800ef74: 687b ldr r3, [r7, #4]
800ef76: 681b ldr r3, [r3, #0]
800ef78: 689b ldr r3, [r3, #8]
800ef7a: f423 5180 bic.w r1, r3, #4096 @ 0x1000
800ef7e: 687b ldr r3, [r7, #4]
800ef80: 6bda ldr r2, [r3, #60] @ 0x3c
800ef82: 687b ldr r3, [r7, #4]
800ef84: 681b ldr r3, [r3, #0]
800ef86: 430a orrs r2, r1
800ef88: 609a str r2, [r3, #8]
}
/* if required, configure DMA disabling on reception error */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
800ef8a: 687b ldr r3, [r7, #4]
800ef8c: 6a9b ldr r3, [r3, #40] @ 0x28
800ef8e: f003 0320 and.w r3, r3, #32
800ef92: 2b00 cmp r3, #0
800ef94: d00a beq.n 800efac <UART_AdvFeatureConfig+0xd4>
{
assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
800ef96: 687b ldr r3, [r7, #4]
800ef98: 681b ldr r3, [r3, #0]
800ef9a: 689b ldr r3, [r3, #8]
800ef9c: f423 5100 bic.w r1, r3, #8192 @ 0x2000
800efa0: 687b ldr r3, [r7, #4]
800efa2: 6c1a ldr r2, [r3, #64] @ 0x40
800efa4: 687b ldr r3, [r7, #4]
800efa6: 681b ldr r3, [r3, #0]
800efa8: 430a orrs r2, r1
800efaa: 609a str r2, [r3, #8]
}
/* if required, configure auto Baud rate detection scheme */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
800efac: 687b ldr r3, [r7, #4]
800efae: 6a9b ldr r3, [r3, #40] @ 0x28
800efb0: f003 0340 and.w r3, r3, #64 @ 0x40
800efb4: 2b00 cmp r3, #0
800efb6: d01a beq.n 800efee <UART_AdvFeatureConfig+0x116>
{
assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
800efb8: 687b ldr r3, [r7, #4]
800efba: 681b ldr r3, [r3, #0]
800efbc: 685b ldr r3, [r3, #4]
800efbe: f423 1180 bic.w r1, r3, #1048576 @ 0x100000
800efc2: 687b ldr r3, [r7, #4]
800efc4: 6c5a ldr r2, [r3, #68] @ 0x44
800efc6: 687b ldr r3, [r7, #4]
800efc8: 681b ldr r3, [r3, #0]
800efca: 430a orrs r2, r1
800efcc: 605a str r2, [r3, #4]
/* set auto Baudrate detection parameters if detection is enabled */
if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
800efce: 687b ldr r3, [r7, #4]
800efd0: 6c5b ldr r3, [r3, #68] @ 0x44
800efd2: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
800efd6: d10a bne.n 800efee <UART_AdvFeatureConfig+0x116>
{
assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
800efd8: 687b ldr r3, [r7, #4]
800efda: 681b ldr r3, [r3, #0]
800efdc: 685b ldr r3, [r3, #4]
800efde: f423 01c0 bic.w r1, r3, #6291456 @ 0x600000
800efe2: 687b ldr r3, [r7, #4]
800efe4: 6c9a ldr r2, [r3, #72] @ 0x48
800efe6: 687b ldr r3, [r7, #4]
800efe8: 681b ldr r3, [r3, #0]
800efea: 430a orrs r2, r1
800efec: 605a str r2, [r3, #4]
}
}
/* if required, configure MSB first on communication line */
if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
800efee: 687b ldr r3, [r7, #4]
800eff0: 6a9b ldr r3, [r3, #40] @ 0x28
800eff2: f003 0380 and.w r3, r3, #128 @ 0x80
800eff6: 2b00 cmp r3, #0
800eff8: d00a beq.n 800f010 <UART_AdvFeatureConfig+0x138>
{
assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
800effa: 687b ldr r3, [r7, #4]
800effc: 681b ldr r3, [r3, #0]
800effe: 685b ldr r3, [r3, #4]
800f000: f423 2100 bic.w r1, r3, #524288 @ 0x80000
800f004: 687b ldr r3, [r7, #4]
800f006: 6cda ldr r2, [r3, #76] @ 0x4c
800f008: 687b ldr r3, [r7, #4]
800f00a: 681b ldr r3, [r3, #0]
800f00c: 430a orrs r2, r1
800f00e: 605a str r2, [r3, #4]
}
}
800f010: bf00 nop
800f012: 370c adds r7, #12
800f014: 46bd mov sp, r7
800f016: f85d 7b04 ldr.w r7, [sp], #4
800f01a: 4770 bx lr
0800f01c <UART_CheckIdleState>:
* @brief Check the UART Idle State.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
800f01c: b580 push {r7, lr}
800f01e: b098 sub sp, #96 @ 0x60
800f020: af02 add r7, sp, #8
800f022: 6078 str r0, [r7, #4]
uint32_t tickstart;
/* Initialize the UART ErrorCode */
huart->ErrorCode = HAL_UART_ERROR_NONE;
800f024: 687b ldr r3, [r7, #4]
800f026: 2200 movs r2, #0
800f028: f8c3 2090 str.w r2, [r3, #144] @ 0x90
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
800f02c: f7f6 fccc bl 80059c8 <HAL_GetTick>
800f030: 6578 str r0, [r7, #84] @ 0x54
/* Check if the Transmitter is enabled */
if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
800f032: 687b ldr r3, [r7, #4]
800f034: 681b ldr r3, [r3, #0]
800f036: 681b ldr r3, [r3, #0]
800f038: f003 0308 and.w r3, r3, #8
800f03c: 2b08 cmp r3, #8
800f03e: d12f bne.n 800f0a0 <UART_CheckIdleState+0x84>
{
/* Wait until TEACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
800f040: f06f 437e mvn.w r3, #4261412864 @ 0xfe000000
800f044: 9300 str r3, [sp, #0]
800f046: 6d7b ldr r3, [r7, #84] @ 0x54
800f048: 2200 movs r2, #0
800f04a: f44f 1100 mov.w r1, #2097152 @ 0x200000
800f04e: 6878 ldr r0, [r7, #4]
800f050: f000 f88e bl 800f170 <UART_WaitOnFlagUntilTimeout>
800f054: 4603 mov r3, r0
800f056: 2b00 cmp r3, #0
800f058: d022 beq.n 800f0a0 <UART_CheckIdleState+0x84>
{
/* Disable TXE interrupt for the interrupt process */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
800f05a: 687b ldr r3, [r7, #4]
800f05c: 681b ldr r3, [r3, #0]
800f05e: 63bb str r3, [r7, #56] @ 0x38
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f060: 6bbb ldr r3, [r7, #56] @ 0x38
800f062: e853 3f00 ldrex r3, [r3]
800f066: 637b str r3, [r7, #52] @ 0x34
return(result);
800f068: 6b7b ldr r3, [r7, #52] @ 0x34
800f06a: f023 0380 bic.w r3, r3, #128 @ 0x80
800f06e: 653b str r3, [r7, #80] @ 0x50
800f070: 687b ldr r3, [r7, #4]
800f072: 681b ldr r3, [r3, #0]
800f074: 461a mov r2, r3
800f076: 6d3b ldr r3, [r7, #80] @ 0x50
800f078: 647b str r3, [r7, #68] @ 0x44
800f07a: 643a str r2, [r7, #64] @ 0x40
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f07c: 6c39 ldr r1, [r7, #64] @ 0x40
800f07e: 6c7a ldr r2, [r7, #68] @ 0x44
800f080: e841 2300 strex r3, r2, [r1]
800f084: 63fb str r3, [r7, #60] @ 0x3c
return(result);
800f086: 6bfb ldr r3, [r7, #60] @ 0x3c
800f088: 2b00 cmp r3, #0
800f08a: d1e6 bne.n 800f05a <UART_CheckIdleState+0x3e>
huart->gState = HAL_UART_STATE_READY;
800f08c: 687b ldr r3, [r7, #4]
800f08e: 2220 movs r2, #32
800f090: f8c3 2088 str.w r2, [r3, #136] @ 0x88
__HAL_UNLOCK(huart);
800f094: 687b ldr r3, [r7, #4]
800f096: 2200 movs r2, #0
800f098: f883 2084 strb.w r2, [r3, #132] @ 0x84
/* Timeout occurred */
return HAL_TIMEOUT;
800f09c: 2303 movs r3, #3
800f09e: e063 b.n 800f168 <UART_CheckIdleState+0x14c>
}
}
/* Check if the Receiver is enabled */
if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
800f0a0: 687b ldr r3, [r7, #4]
800f0a2: 681b ldr r3, [r3, #0]
800f0a4: 681b ldr r3, [r3, #0]
800f0a6: f003 0304 and.w r3, r3, #4
800f0aa: 2b04 cmp r3, #4
800f0ac: d149 bne.n 800f142 <UART_CheckIdleState+0x126>
{
/* Wait until REACK flag is set */
if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
800f0ae: f06f 437e mvn.w r3, #4261412864 @ 0xfe000000
800f0b2: 9300 str r3, [sp, #0]
800f0b4: 6d7b ldr r3, [r7, #84] @ 0x54
800f0b6: 2200 movs r2, #0
800f0b8: f44f 0180 mov.w r1, #4194304 @ 0x400000
800f0bc: 6878 ldr r0, [r7, #4]
800f0be: f000 f857 bl 800f170 <UART_WaitOnFlagUntilTimeout>
800f0c2: 4603 mov r3, r0
800f0c4: 2b00 cmp r3, #0
800f0c6: d03c beq.n 800f142 <UART_CheckIdleState+0x126>
{
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
interrupts for the interrupt process */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
800f0c8: 687b ldr r3, [r7, #4]
800f0ca: 681b ldr r3, [r3, #0]
800f0cc: 627b str r3, [r7, #36] @ 0x24
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f0ce: 6a7b ldr r3, [r7, #36] @ 0x24
800f0d0: e853 3f00 ldrex r3, [r3]
800f0d4: 623b str r3, [r7, #32]
return(result);
800f0d6: 6a3b ldr r3, [r7, #32]
800f0d8: f423 7390 bic.w r3, r3, #288 @ 0x120
800f0dc: 64fb str r3, [r7, #76] @ 0x4c
800f0de: 687b ldr r3, [r7, #4]
800f0e0: 681b ldr r3, [r3, #0]
800f0e2: 461a mov r2, r3
800f0e4: 6cfb ldr r3, [r7, #76] @ 0x4c
800f0e6: 633b str r3, [r7, #48] @ 0x30
800f0e8: 62fa str r2, [r7, #44] @ 0x2c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f0ea: 6af9 ldr r1, [r7, #44] @ 0x2c
800f0ec: 6b3a ldr r2, [r7, #48] @ 0x30
800f0ee: e841 2300 strex r3, r2, [r1]
800f0f2: 62bb str r3, [r7, #40] @ 0x28
return(result);
800f0f4: 6abb ldr r3, [r7, #40] @ 0x28
800f0f6: 2b00 cmp r3, #0
800f0f8: d1e6 bne.n 800f0c8 <UART_CheckIdleState+0xac>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
800f0fa: 687b ldr r3, [r7, #4]
800f0fc: 681b ldr r3, [r3, #0]
800f0fe: 3308 adds r3, #8
800f100: 613b str r3, [r7, #16]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f102: 693b ldr r3, [r7, #16]
800f104: e853 3f00 ldrex r3, [r3]
800f108: 60fb str r3, [r7, #12]
return(result);
800f10a: 68fb ldr r3, [r7, #12]
800f10c: f023 0301 bic.w r3, r3, #1
800f110: 64bb str r3, [r7, #72] @ 0x48
800f112: 687b ldr r3, [r7, #4]
800f114: 681b ldr r3, [r3, #0]
800f116: 3308 adds r3, #8
800f118: 6cba ldr r2, [r7, #72] @ 0x48
800f11a: 61fa str r2, [r7, #28]
800f11c: 61bb str r3, [r7, #24]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f11e: 69b9 ldr r1, [r7, #24]
800f120: 69fa ldr r2, [r7, #28]
800f122: e841 2300 strex r3, r2, [r1]
800f126: 617b str r3, [r7, #20]
return(result);
800f128: 697b ldr r3, [r7, #20]
800f12a: 2b00 cmp r3, #0
800f12c: d1e5 bne.n 800f0fa <UART_CheckIdleState+0xde>
huart->RxState = HAL_UART_STATE_READY;
800f12e: 687b ldr r3, [r7, #4]
800f130: 2220 movs r2, #32
800f132: f8c3 208c str.w r2, [r3, #140] @ 0x8c
__HAL_UNLOCK(huart);
800f136: 687b ldr r3, [r7, #4]
800f138: 2200 movs r2, #0
800f13a: f883 2084 strb.w r2, [r3, #132] @ 0x84
/* Timeout occurred */
return HAL_TIMEOUT;
800f13e: 2303 movs r3, #3
800f140: e012 b.n 800f168 <UART_CheckIdleState+0x14c>
}
}
/* Initialize the UART State */
huart->gState = HAL_UART_STATE_READY;
800f142: 687b ldr r3, [r7, #4]
800f144: 2220 movs r2, #32
800f146: f8c3 2088 str.w r2, [r3, #136] @ 0x88
huart->RxState = HAL_UART_STATE_READY;
800f14a: 687b ldr r3, [r7, #4]
800f14c: 2220 movs r2, #32
800f14e: f8c3 208c str.w r2, [r3, #140] @ 0x8c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
800f152: 687b ldr r3, [r7, #4]
800f154: 2200 movs r2, #0
800f156: 66da str r2, [r3, #108] @ 0x6c
huart->RxEventType = HAL_UART_RXEVENT_TC;
800f158: 687b ldr r3, [r7, #4]
800f15a: 2200 movs r2, #0
800f15c: 671a str r2, [r3, #112] @ 0x70
__HAL_UNLOCK(huart);
800f15e: 687b ldr r3, [r7, #4]
800f160: 2200 movs r2, #0
800f162: f883 2084 strb.w r2, [r3, #132] @ 0x84
return HAL_OK;
800f166: 2300 movs r3, #0
}
800f168: 4618 mov r0, r3
800f16a: 3758 adds r7, #88 @ 0x58
800f16c: 46bd mov sp, r7
800f16e: bd80 pop {r7, pc}
0800f170 <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
800f170: b580 push {r7, lr}
800f172: b084 sub sp, #16
800f174: af00 add r7, sp, #0
800f176: 60f8 str r0, [r7, #12]
800f178: 60b9 str r1, [r7, #8]
800f17a: 603b str r3, [r7, #0]
800f17c: 4613 mov r3, r2
800f17e: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
800f180: e04f b.n 800f222 <UART_WaitOnFlagUntilTimeout+0xb2>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
800f182: 69bb ldr r3, [r7, #24]
800f184: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
800f188: d04b beq.n 800f222 <UART_WaitOnFlagUntilTimeout+0xb2>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
800f18a: f7f6 fc1d bl 80059c8 <HAL_GetTick>
800f18e: 4602 mov r2, r0
800f190: 683b ldr r3, [r7, #0]
800f192: 1ad3 subs r3, r2, r3
800f194: 69ba ldr r2, [r7, #24]
800f196: 429a cmp r2, r3
800f198: d302 bcc.n 800f1a0 <UART_WaitOnFlagUntilTimeout+0x30>
800f19a: 69bb ldr r3, [r7, #24]
800f19c: 2b00 cmp r3, #0
800f19e: d101 bne.n 800f1a4 <UART_WaitOnFlagUntilTimeout+0x34>
{
return HAL_TIMEOUT;
800f1a0: 2303 movs r3, #3
800f1a2: e04e b.n 800f242 <UART_WaitOnFlagUntilTimeout+0xd2>
}
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
800f1a4: 68fb ldr r3, [r7, #12]
800f1a6: 681b ldr r3, [r3, #0]
800f1a8: 681b ldr r3, [r3, #0]
800f1aa: f003 0304 and.w r3, r3, #4
800f1ae: 2b00 cmp r3, #0
800f1b0: d037 beq.n 800f222 <UART_WaitOnFlagUntilTimeout+0xb2>
800f1b2: 68bb ldr r3, [r7, #8]
800f1b4: 2b80 cmp r3, #128 @ 0x80
800f1b6: d034 beq.n 800f222 <UART_WaitOnFlagUntilTimeout+0xb2>
800f1b8: 68bb ldr r3, [r7, #8]
800f1ba: 2b40 cmp r3, #64 @ 0x40
800f1bc: d031 beq.n 800f222 <UART_WaitOnFlagUntilTimeout+0xb2>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
800f1be: 68fb ldr r3, [r7, #12]
800f1c0: 681b ldr r3, [r3, #0]
800f1c2: 69db ldr r3, [r3, #28]
800f1c4: f003 0308 and.w r3, r3, #8
800f1c8: 2b08 cmp r3, #8
800f1ca: d110 bne.n 800f1ee <UART_WaitOnFlagUntilTimeout+0x7e>
{
/* Clear Overrun Error flag*/
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
800f1cc: 68fb ldr r3, [r7, #12]
800f1ce: 681b ldr r3, [r3, #0]
800f1d0: 2208 movs r2, #8
800f1d2: 621a str r2, [r3, #32]
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
800f1d4: 68f8 ldr r0, [r7, #12]
800f1d6: f000 f95b bl 800f490 <UART_EndRxTransfer>
huart->ErrorCode = HAL_UART_ERROR_ORE;
800f1da: 68fb ldr r3, [r7, #12]
800f1dc: 2208 movs r2, #8
800f1de: f8c3 2090 str.w r2, [r3, #144] @ 0x90
/* Process Unlocked */
__HAL_UNLOCK(huart);
800f1e2: 68fb ldr r3, [r7, #12]
800f1e4: 2200 movs r2, #0
800f1e6: f883 2084 strb.w r2, [r3, #132] @ 0x84
return HAL_ERROR;
800f1ea: 2301 movs r3, #1
800f1ec: e029 b.n 800f242 <UART_WaitOnFlagUntilTimeout+0xd2>
}
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
800f1ee: 68fb ldr r3, [r7, #12]
800f1f0: 681b ldr r3, [r3, #0]
800f1f2: 69db ldr r3, [r3, #28]
800f1f4: f403 6300 and.w r3, r3, #2048 @ 0x800
800f1f8: f5b3 6f00 cmp.w r3, #2048 @ 0x800
800f1fc: d111 bne.n 800f222 <UART_WaitOnFlagUntilTimeout+0xb2>
{
/* Clear Receiver Timeout flag*/
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
800f1fe: 68fb ldr r3, [r7, #12]
800f200: 681b ldr r3, [r3, #0]
800f202: f44f 6200 mov.w r2, #2048 @ 0x800
800f206: 621a str r2, [r3, #32]
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
800f208: 68f8 ldr r0, [r7, #12]
800f20a: f000 f941 bl 800f490 <UART_EndRxTransfer>
huart->ErrorCode = HAL_UART_ERROR_RTO;
800f20e: 68fb ldr r3, [r7, #12]
800f210: 2220 movs r2, #32
800f212: f8c3 2090 str.w r2, [r3, #144] @ 0x90
/* Process Unlocked */
__HAL_UNLOCK(huart);
800f216: 68fb ldr r3, [r7, #12]
800f218: 2200 movs r2, #0
800f21a: f883 2084 strb.w r2, [r3, #132] @ 0x84
return HAL_TIMEOUT;
800f21e: 2303 movs r3, #3
800f220: e00f b.n 800f242 <UART_WaitOnFlagUntilTimeout+0xd2>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
800f222: 68fb ldr r3, [r7, #12]
800f224: 681b ldr r3, [r3, #0]
800f226: 69da ldr r2, [r3, #28]
800f228: 68bb ldr r3, [r7, #8]
800f22a: 4013 ands r3, r2
800f22c: 68ba ldr r2, [r7, #8]
800f22e: 429a cmp r2, r3
800f230: bf0c ite eq
800f232: 2301 moveq r3, #1
800f234: 2300 movne r3, #0
800f236: b2db uxtb r3, r3
800f238: 461a mov r2, r3
800f23a: 79fb ldrb r3, [r7, #7]
800f23c: 429a cmp r2, r3
800f23e: d0a0 beq.n 800f182 <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
800f240: 2300 movs r3, #0
}
800f242: 4618 mov r0, r3
800f244: 3710 adds r7, #16
800f246: 46bd mov sp, r7
800f248: bd80 pop {r7, pc}
...
0800f24c <UART_Start_Receive_IT>:
* @param pData Pointer to data buffer (u8 or u16 data elements).
* @param Size Amount of data elements (u8 or u16) to be received.
* @retval HAL status
*/
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
800f24c: b480 push {r7}
800f24e: b0a3 sub sp, #140 @ 0x8c
800f250: af00 add r7, sp, #0
800f252: 60f8 str r0, [r7, #12]
800f254: 60b9 str r1, [r7, #8]
800f256: 4613 mov r3, r2
800f258: 80fb strh r3, [r7, #6]
huart->pRxBuffPtr = pData;
800f25a: 68fb ldr r3, [r7, #12]
800f25c: 68ba ldr r2, [r7, #8]
800f25e: 659a str r2, [r3, #88] @ 0x58
huart->RxXferSize = Size;
800f260: 68fb ldr r3, [r7, #12]
800f262: 88fa ldrh r2, [r7, #6]
800f264: f8a3 205c strh.w r2, [r3, #92] @ 0x5c
huart->RxXferCount = Size;
800f268: 68fb ldr r3, [r7, #12]
800f26a: 88fa ldrh r2, [r7, #6]
800f26c: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
huart->RxISR = NULL;
800f270: 68fb ldr r3, [r7, #12]
800f272: 2200 movs r2, #0
800f274: 675a str r2, [r3, #116] @ 0x74
/* Computation of UART mask to apply to RDR register */
UART_MASK_COMPUTATION(huart);
800f276: 68fb ldr r3, [r7, #12]
800f278: 689b ldr r3, [r3, #8]
800f27a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800f27e: d10e bne.n 800f29e <UART_Start_Receive_IT+0x52>
800f280: 68fb ldr r3, [r7, #12]
800f282: 691b ldr r3, [r3, #16]
800f284: 2b00 cmp r3, #0
800f286: d105 bne.n 800f294 <UART_Start_Receive_IT+0x48>
800f288: 68fb ldr r3, [r7, #12]
800f28a: f240 12ff movw r2, #511 @ 0x1ff
800f28e: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
800f292: e02d b.n 800f2f0 <UART_Start_Receive_IT+0xa4>
800f294: 68fb ldr r3, [r7, #12]
800f296: 22ff movs r2, #255 @ 0xff
800f298: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
800f29c: e028 b.n 800f2f0 <UART_Start_Receive_IT+0xa4>
800f29e: 68fb ldr r3, [r7, #12]
800f2a0: 689b ldr r3, [r3, #8]
800f2a2: 2b00 cmp r3, #0
800f2a4: d10d bne.n 800f2c2 <UART_Start_Receive_IT+0x76>
800f2a6: 68fb ldr r3, [r7, #12]
800f2a8: 691b ldr r3, [r3, #16]
800f2aa: 2b00 cmp r3, #0
800f2ac: d104 bne.n 800f2b8 <UART_Start_Receive_IT+0x6c>
800f2ae: 68fb ldr r3, [r7, #12]
800f2b0: 22ff movs r2, #255 @ 0xff
800f2b2: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
800f2b6: e01b b.n 800f2f0 <UART_Start_Receive_IT+0xa4>
800f2b8: 68fb ldr r3, [r7, #12]
800f2ba: 227f movs r2, #127 @ 0x7f
800f2bc: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
800f2c0: e016 b.n 800f2f0 <UART_Start_Receive_IT+0xa4>
800f2c2: 68fb ldr r3, [r7, #12]
800f2c4: 689b ldr r3, [r3, #8]
800f2c6: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
800f2ca: d10d bne.n 800f2e8 <UART_Start_Receive_IT+0x9c>
800f2cc: 68fb ldr r3, [r7, #12]
800f2ce: 691b ldr r3, [r3, #16]
800f2d0: 2b00 cmp r3, #0
800f2d2: d104 bne.n 800f2de <UART_Start_Receive_IT+0x92>
800f2d4: 68fb ldr r3, [r7, #12]
800f2d6: 227f movs r2, #127 @ 0x7f
800f2d8: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
800f2dc: e008 b.n 800f2f0 <UART_Start_Receive_IT+0xa4>
800f2de: 68fb ldr r3, [r7, #12]
800f2e0: 223f movs r2, #63 @ 0x3f
800f2e2: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
800f2e6: e003 b.n 800f2f0 <UART_Start_Receive_IT+0xa4>
800f2e8: 68fb ldr r3, [r7, #12]
800f2ea: 2200 movs r2, #0
800f2ec: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
huart->ErrorCode = HAL_UART_ERROR_NONE;
800f2f0: 68fb ldr r3, [r7, #12]
800f2f2: 2200 movs r2, #0
800f2f4: f8c3 2090 str.w r2, [r3, #144] @ 0x90
huart->RxState = HAL_UART_STATE_BUSY_RX;
800f2f8: 68fb ldr r3, [r7, #12]
800f2fa: 2222 movs r2, #34 @ 0x22
800f2fc: f8c3 208c str.w r2, [r3, #140] @ 0x8c
/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
800f300: 68fb ldr r3, [r7, #12]
800f302: 681b ldr r3, [r3, #0]
800f304: 3308 adds r3, #8
800f306: 667b str r3, [r7, #100] @ 0x64
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f308: 6e7b ldr r3, [r7, #100] @ 0x64
800f30a: e853 3f00 ldrex r3, [r3]
800f30e: 663b str r3, [r7, #96] @ 0x60
return(result);
800f310: 6e3b ldr r3, [r7, #96] @ 0x60
800f312: f043 0301 orr.w r3, r3, #1
800f316: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800f31a: 68fb ldr r3, [r7, #12]
800f31c: 681b ldr r3, [r3, #0]
800f31e: 3308 adds r3, #8
800f320: f8d7 2084 ldr.w r2, [r7, #132] @ 0x84
800f324: 673a str r2, [r7, #112] @ 0x70
800f326: 66fb str r3, [r7, #108] @ 0x6c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f328: 6ef9 ldr r1, [r7, #108] @ 0x6c
800f32a: 6f3a ldr r2, [r7, #112] @ 0x70
800f32c: e841 2300 strex r3, r2, [r1]
800f330: 66bb str r3, [r7, #104] @ 0x68
return(result);
800f332: 6ebb ldr r3, [r7, #104] @ 0x68
800f334: 2b00 cmp r3, #0
800f336: d1e3 bne.n 800f300 <UART_Start_Receive_IT+0xb4>
/* Configure Rx interrupt processing */
if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
800f338: 68fb ldr r3, [r7, #12]
800f33a: 6e5b ldr r3, [r3, #100] @ 0x64
800f33c: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
800f340: d14f bne.n 800f3e2 <UART_Start_Receive_IT+0x196>
800f342: 68fb ldr r3, [r7, #12]
800f344: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
800f348: 88fa ldrh r2, [r7, #6]
800f34a: 429a cmp r2, r3
800f34c: d349 bcc.n 800f3e2 <UART_Start_Receive_IT+0x196>
{
/* Set the Rx ISR function pointer according to the data word length */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
800f34e: 68fb ldr r3, [r7, #12]
800f350: 689b ldr r3, [r3, #8]
800f352: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800f356: d107 bne.n 800f368 <UART_Start_Receive_IT+0x11c>
800f358: 68fb ldr r3, [r7, #12]
800f35a: 691b ldr r3, [r3, #16]
800f35c: 2b00 cmp r3, #0
800f35e: d103 bne.n 800f368 <UART_Start_Receive_IT+0x11c>
{
huart->RxISR = UART_RxISR_16BIT_FIFOEN;
800f360: 68fb ldr r3, [r7, #12]
800f362: 4a47 ldr r2, [pc, #284] @ (800f480 <UART_Start_Receive_IT+0x234>)
800f364: 675a str r2, [r3, #116] @ 0x74
800f366: e002 b.n 800f36e <UART_Start_Receive_IT+0x122>
}
else
{
huart->RxISR = UART_RxISR_8BIT_FIFOEN;
800f368: 68fb ldr r3, [r7, #12]
800f36a: 4a46 ldr r2, [pc, #280] @ (800f484 <UART_Start_Receive_IT+0x238>)
800f36c: 675a str r2, [r3, #116] @ 0x74
}
/* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
if (huart->Init.Parity != UART_PARITY_NONE)
800f36e: 68fb ldr r3, [r7, #12]
800f370: 691b ldr r3, [r3, #16]
800f372: 2b00 cmp r3, #0
800f374: d01a beq.n 800f3ac <UART_Start_Receive_IT+0x160>
{
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
800f376: 68fb ldr r3, [r7, #12]
800f378: 681b ldr r3, [r3, #0]
800f37a: 653b str r3, [r7, #80] @ 0x50
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f37c: 6d3b ldr r3, [r7, #80] @ 0x50
800f37e: e853 3f00 ldrex r3, [r3]
800f382: 64fb str r3, [r7, #76] @ 0x4c
return(result);
800f384: 6cfb ldr r3, [r7, #76] @ 0x4c
800f386: f443 7380 orr.w r3, r3, #256 @ 0x100
800f38a: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800f38e: 68fb ldr r3, [r7, #12]
800f390: 681b ldr r3, [r3, #0]
800f392: 461a mov r2, r3
800f394: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800f398: 65fb str r3, [r7, #92] @ 0x5c
800f39a: 65ba str r2, [r7, #88] @ 0x58
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f39c: 6db9 ldr r1, [r7, #88] @ 0x58
800f39e: 6dfa ldr r2, [r7, #92] @ 0x5c
800f3a0: e841 2300 strex r3, r2, [r1]
800f3a4: 657b str r3, [r7, #84] @ 0x54
return(result);
800f3a6: 6d7b ldr r3, [r7, #84] @ 0x54
800f3a8: 2b00 cmp r3, #0
800f3aa: d1e4 bne.n 800f376 <UART_Start_Receive_IT+0x12a>
}
ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
800f3ac: 68fb ldr r3, [r7, #12]
800f3ae: 681b ldr r3, [r3, #0]
800f3b0: 3308 adds r3, #8
800f3b2: 63fb str r3, [r7, #60] @ 0x3c
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f3b4: 6bfb ldr r3, [r7, #60] @ 0x3c
800f3b6: e853 3f00 ldrex r3, [r3]
800f3ba: 63bb str r3, [r7, #56] @ 0x38
return(result);
800f3bc: 6bbb ldr r3, [r7, #56] @ 0x38
800f3be: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
800f3c2: 67fb str r3, [r7, #124] @ 0x7c
800f3c4: 68fb ldr r3, [r7, #12]
800f3c6: 681b ldr r3, [r3, #0]
800f3c8: 3308 adds r3, #8
800f3ca: 6ffa ldr r2, [r7, #124] @ 0x7c
800f3cc: 64ba str r2, [r7, #72] @ 0x48
800f3ce: 647b str r3, [r7, #68] @ 0x44
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f3d0: 6c79 ldr r1, [r7, #68] @ 0x44
800f3d2: 6cba ldr r2, [r7, #72] @ 0x48
800f3d4: e841 2300 strex r3, r2, [r1]
800f3d8: 643b str r3, [r7, #64] @ 0x40
return(result);
800f3da: 6c3b ldr r3, [r7, #64] @ 0x40
800f3dc: 2b00 cmp r3, #0
800f3de: d1e5 bne.n 800f3ac <UART_Start_Receive_IT+0x160>
800f3e0: e046 b.n 800f470 <UART_Start_Receive_IT+0x224>
}
else
{
/* Set the Rx ISR function pointer according to the data word length */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
800f3e2: 68fb ldr r3, [r7, #12]
800f3e4: 689b ldr r3, [r3, #8]
800f3e6: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800f3ea: d107 bne.n 800f3fc <UART_Start_Receive_IT+0x1b0>
800f3ec: 68fb ldr r3, [r7, #12]
800f3ee: 691b ldr r3, [r3, #16]
800f3f0: 2b00 cmp r3, #0
800f3f2: d103 bne.n 800f3fc <UART_Start_Receive_IT+0x1b0>
{
huart->RxISR = UART_RxISR_16BIT;
800f3f4: 68fb ldr r3, [r7, #12]
800f3f6: 4a24 ldr r2, [pc, #144] @ (800f488 <UART_Start_Receive_IT+0x23c>)
800f3f8: 675a str r2, [r3, #116] @ 0x74
800f3fa: e002 b.n 800f402 <UART_Start_Receive_IT+0x1b6>
}
else
{
huart->RxISR = UART_RxISR_8BIT;
800f3fc: 68fb ldr r3, [r7, #12]
800f3fe: 4a23 ldr r2, [pc, #140] @ (800f48c <UART_Start_Receive_IT+0x240>)
800f400: 675a str r2, [r3, #116] @ 0x74
}
/* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
if (huart->Init.Parity != UART_PARITY_NONE)
800f402: 68fb ldr r3, [r7, #12]
800f404: 691b ldr r3, [r3, #16]
800f406: 2b00 cmp r3, #0
800f408: d019 beq.n 800f43e <UART_Start_Receive_IT+0x1f2>
{
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
800f40a: 68fb ldr r3, [r7, #12]
800f40c: 681b ldr r3, [r3, #0]
800f40e: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f410: 6abb ldr r3, [r7, #40] @ 0x28
800f412: e853 3f00 ldrex r3, [r3]
800f416: 627b str r3, [r7, #36] @ 0x24
return(result);
800f418: 6a7b ldr r3, [r7, #36] @ 0x24
800f41a: f443 7390 orr.w r3, r3, #288 @ 0x120
800f41e: 677b str r3, [r7, #116] @ 0x74
800f420: 68fb ldr r3, [r7, #12]
800f422: 681b ldr r3, [r3, #0]
800f424: 461a mov r2, r3
800f426: 6f7b ldr r3, [r7, #116] @ 0x74
800f428: 637b str r3, [r7, #52] @ 0x34
800f42a: 633a str r2, [r7, #48] @ 0x30
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f42c: 6b39 ldr r1, [r7, #48] @ 0x30
800f42e: 6b7a ldr r2, [r7, #52] @ 0x34
800f430: e841 2300 strex r3, r2, [r1]
800f434: 62fb str r3, [r7, #44] @ 0x2c
return(result);
800f436: 6afb ldr r3, [r7, #44] @ 0x2c
800f438: 2b00 cmp r3, #0
800f43a: d1e6 bne.n 800f40a <UART_Start_Receive_IT+0x1be>
800f43c: e018 b.n 800f470 <UART_Start_Receive_IT+0x224>
}
else
{
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
800f43e: 68fb ldr r3, [r7, #12]
800f440: 681b ldr r3, [r3, #0]
800f442: 617b str r3, [r7, #20]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f444: 697b ldr r3, [r7, #20]
800f446: e853 3f00 ldrex r3, [r3]
800f44a: 613b str r3, [r7, #16]
return(result);
800f44c: 693b ldr r3, [r7, #16]
800f44e: f043 0320 orr.w r3, r3, #32
800f452: 67bb str r3, [r7, #120] @ 0x78
800f454: 68fb ldr r3, [r7, #12]
800f456: 681b ldr r3, [r3, #0]
800f458: 461a mov r2, r3
800f45a: 6fbb ldr r3, [r7, #120] @ 0x78
800f45c: 623b str r3, [r7, #32]
800f45e: 61fa str r2, [r7, #28]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f460: 69f9 ldr r1, [r7, #28]
800f462: 6a3a ldr r2, [r7, #32]
800f464: e841 2300 strex r3, r2, [r1]
800f468: 61bb str r3, [r7, #24]
return(result);
800f46a: 69bb ldr r3, [r7, #24]
800f46c: 2b00 cmp r3, #0
800f46e: d1e6 bne.n 800f43e <UART_Start_Receive_IT+0x1f2>
}
}
return HAL_OK;
800f470: 2300 movs r3, #0
}
800f472: 4618 mov r0, r3
800f474: 378c adds r7, #140 @ 0x8c
800f476: 46bd mov sp, r7
800f478: f85d 7b04 ldr.w r7, [sp], #4
800f47c: 4770 bx lr
800f47e: bf00 nop
800f480: 0800fff5 .word 0x0800fff5
800f484: 0800fc95 .word 0x0800fc95
800f488: 0800fadd .word 0x0800fadd
800f48c: 0800f925 .word 0x0800f925
0800f490 <UART_EndRxTransfer>:
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
* @param huart UART handle.
* @retval None
*/
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
800f490: b480 push {r7}
800f492: b095 sub sp, #84 @ 0x54
800f494: af00 add r7, sp, #0
800f496: 6078 str r0, [r7, #4]
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
800f498: 687b ldr r3, [r7, #4]
800f49a: 681b ldr r3, [r3, #0]
800f49c: 637b str r3, [r7, #52] @ 0x34
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f49e: 6b7b ldr r3, [r7, #52] @ 0x34
800f4a0: e853 3f00 ldrex r3, [r3]
800f4a4: 633b str r3, [r7, #48] @ 0x30
return(result);
800f4a6: 6b3b ldr r3, [r7, #48] @ 0x30
800f4a8: f423 7390 bic.w r3, r3, #288 @ 0x120
800f4ac: 64fb str r3, [r7, #76] @ 0x4c
800f4ae: 687b ldr r3, [r7, #4]
800f4b0: 681b ldr r3, [r3, #0]
800f4b2: 461a mov r2, r3
800f4b4: 6cfb ldr r3, [r7, #76] @ 0x4c
800f4b6: 643b str r3, [r7, #64] @ 0x40
800f4b8: 63fa str r2, [r7, #60] @ 0x3c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f4ba: 6bf9 ldr r1, [r7, #60] @ 0x3c
800f4bc: 6c3a ldr r2, [r7, #64] @ 0x40
800f4be: e841 2300 strex r3, r2, [r1]
800f4c2: 63bb str r3, [r7, #56] @ 0x38
return(result);
800f4c4: 6bbb ldr r3, [r7, #56] @ 0x38
800f4c6: 2b00 cmp r3, #0
800f4c8: d1e6 bne.n 800f498 <UART_EndRxTransfer+0x8>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
800f4ca: 687b ldr r3, [r7, #4]
800f4cc: 681b ldr r3, [r3, #0]
800f4ce: 3308 adds r3, #8
800f4d0: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f4d2: 6a3b ldr r3, [r7, #32]
800f4d4: e853 3f00 ldrex r3, [r3]
800f4d8: 61fb str r3, [r7, #28]
return(result);
800f4da: 69fa ldr r2, [r7, #28]
800f4dc: 4b1e ldr r3, [pc, #120] @ (800f558 <UART_EndRxTransfer+0xc8>)
800f4de: 4013 ands r3, r2
800f4e0: 64bb str r3, [r7, #72] @ 0x48
800f4e2: 687b ldr r3, [r7, #4]
800f4e4: 681b ldr r3, [r3, #0]
800f4e6: 3308 adds r3, #8
800f4e8: 6cba ldr r2, [r7, #72] @ 0x48
800f4ea: 62fa str r2, [r7, #44] @ 0x2c
800f4ec: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f4ee: 6ab9 ldr r1, [r7, #40] @ 0x28
800f4f0: 6afa ldr r2, [r7, #44] @ 0x2c
800f4f2: e841 2300 strex r3, r2, [r1]
800f4f6: 627b str r3, [r7, #36] @ 0x24
return(result);
800f4f8: 6a7b ldr r3, [r7, #36] @ 0x24
800f4fa: 2b00 cmp r3, #0
800f4fc: d1e5 bne.n 800f4ca <UART_EndRxTransfer+0x3a>
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
800f4fe: 687b ldr r3, [r7, #4]
800f500: 6edb ldr r3, [r3, #108] @ 0x6c
800f502: 2b01 cmp r3, #1
800f504: d118 bne.n 800f538 <UART_EndRxTransfer+0xa8>
{
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
800f506: 687b ldr r3, [r7, #4]
800f508: 681b ldr r3, [r3, #0]
800f50a: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f50c: 68fb ldr r3, [r7, #12]
800f50e: e853 3f00 ldrex r3, [r3]
800f512: 60bb str r3, [r7, #8]
return(result);
800f514: 68bb ldr r3, [r7, #8]
800f516: f023 0310 bic.w r3, r3, #16
800f51a: 647b str r3, [r7, #68] @ 0x44
800f51c: 687b ldr r3, [r7, #4]
800f51e: 681b ldr r3, [r3, #0]
800f520: 461a mov r2, r3
800f522: 6c7b ldr r3, [r7, #68] @ 0x44
800f524: 61bb str r3, [r7, #24]
800f526: 617a str r2, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f528: 6979 ldr r1, [r7, #20]
800f52a: 69ba ldr r2, [r7, #24]
800f52c: e841 2300 strex r3, r2, [r1]
800f530: 613b str r3, [r7, #16]
return(result);
800f532: 693b ldr r3, [r7, #16]
800f534: 2b00 cmp r3, #0
800f536: d1e6 bne.n 800f506 <UART_EndRxTransfer+0x76>
}
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
800f538: 687b ldr r3, [r7, #4]
800f53a: 2220 movs r2, #32
800f53c: f8c3 208c str.w r2, [r3, #140] @ 0x8c
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
800f540: 687b ldr r3, [r7, #4]
800f542: 2200 movs r2, #0
800f544: 66da str r2, [r3, #108] @ 0x6c
/* Reset RxIsr function pointer */
huart->RxISR = NULL;
800f546: 687b ldr r3, [r7, #4]
800f548: 2200 movs r2, #0
800f54a: 675a str r2, [r3, #116] @ 0x74
}
800f54c: bf00 nop
800f54e: 3754 adds r7, #84 @ 0x54
800f550: 46bd mov sp, r7
800f552: f85d 7b04 ldr.w r7, [sp], #4
800f556: 4770 bx lr
800f558: effffffe .word 0xeffffffe
0800f55c <UART_DMAAbortOnError>:
* (To be called at end of DMA Abort procedure following error occurrence).
* @param hdma DMA handle.
* @retval None
*/
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
800f55c: b580 push {r7, lr}
800f55e: b084 sub sp, #16
800f560: af00 add r7, sp, #0
800f562: 6078 str r0, [r7, #4]
UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
800f564: 687b ldr r3, [r7, #4]
800f566: 6b9b ldr r3, [r3, #56] @ 0x38
800f568: 60fb str r3, [r7, #12]
huart->RxXferCount = 0U;
800f56a: 68fb ldr r3, [r7, #12]
800f56c: 2200 movs r2, #0
800f56e: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
huart->TxXferCount = 0U;
800f572: 68fb ldr r3, [r7, #12]
800f574: 2200 movs r2, #0
800f576: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
800f57a: 68f8 ldr r0, [r7, #12]
800f57c: f7fe ff3a bl 800e3f4 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
800f580: bf00 nop
800f582: 3710 adds r7, #16
800f584: 46bd mov sp, r7
800f586: bd80 pop {r7, pc}
0800f588 <UART_TxISR_8BIT>:
* interruptions have been enabled by HAL_UART_Transmit_IT().
* @param huart UART handle.
* @retval None
*/
static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
{
800f588: b480 push {r7}
800f58a: b08f sub sp, #60 @ 0x3c
800f58c: af00 add r7, sp, #0
800f58e: 6078 str r0, [r7, #4]
/* Check that a Tx process is ongoing */
if (huart->gState == HAL_UART_STATE_BUSY_TX)
800f590: 687b ldr r3, [r7, #4]
800f592: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800f596: 2b21 cmp r3, #33 @ 0x21
800f598: d14c bne.n 800f634 <UART_TxISR_8BIT+0xac>
{
if (huart->TxXferCount == 0U)
800f59a: 687b ldr r3, [r7, #4]
800f59c: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
800f5a0: b29b uxth r3, r3
800f5a2: 2b00 cmp r3, #0
800f5a4: d132 bne.n 800f60c <UART_TxISR_8BIT+0x84>
{
/* Disable the UART Transmit Data Register Empty Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
800f5a6: 687b ldr r3, [r7, #4]
800f5a8: 681b ldr r3, [r3, #0]
800f5aa: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f5ac: 6a3b ldr r3, [r7, #32]
800f5ae: e853 3f00 ldrex r3, [r3]
800f5b2: 61fb str r3, [r7, #28]
return(result);
800f5b4: 69fb ldr r3, [r7, #28]
800f5b6: f023 0380 bic.w r3, r3, #128 @ 0x80
800f5ba: 637b str r3, [r7, #52] @ 0x34
800f5bc: 687b ldr r3, [r7, #4]
800f5be: 681b ldr r3, [r3, #0]
800f5c0: 461a mov r2, r3
800f5c2: 6b7b ldr r3, [r7, #52] @ 0x34
800f5c4: 62fb str r3, [r7, #44] @ 0x2c
800f5c6: 62ba str r2, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f5c8: 6ab9 ldr r1, [r7, #40] @ 0x28
800f5ca: 6afa ldr r2, [r7, #44] @ 0x2c
800f5cc: e841 2300 strex r3, r2, [r1]
800f5d0: 627b str r3, [r7, #36] @ 0x24
return(result);
800f5d2: 6a7b ldr r3, [r7, #36] @ 0x24
800f5d4: 2b00 cmp r3, #0
800f5d6: d1e6 bne.n 800f5a6 <UART_TxISR_8BIT+0x1e>
/* Enable the UART Transmit Complete Interrupt */
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
800f5d8: 687b ldr r3, [r7, #4]
800f5da: 681b ldr r3, [r3, #0]
800f5dc: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f5de: 68fb ldr r3, [r7, #12]
800f5e0: e853 3f00 ldrex r3, [r3]
800f5e4: 60bb str r3, [r7, #8]
return(result);
800f5e6: 68bb ldr r3, [r7, #8]
800f5e8: f043 0340 orr.w r3, r3, #64 @ 0x40
800f5ec: 633b str r3, [r7, #48] @ 0x30
800f5ee: 687b ldr r3, [r7, #4]
800f5f0: 681b ldr r3, [r3, #0]
800f5f2: 461a mov r2, r3
800f5f4: 6b3b ldr r3, [r7, #48] @ 0x30
800f5f6: 61bb str r3, [r7, #24]
800f5f8: 617a str r2, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f5fa: 6979 ldr r1, [r7, #20]
800f5fc: 69ba ldr r2, [r7, #24]
800f5fe: e841 2300 strex r3, r2, [r1]
800f602: 613b str r3, [r7, #16]
return(result);
800f604: 693b ldr r3, [r7, #16]
800f606: 2b00 cmp r3, #0
800f608: d1e6 bne.n 800f5d8 <UART_TxISR_8BIT+0x50>
huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
huart->pTxBuffPtr++;
huart->TxXferCount--;
}
}
}
800f60a: e013 b.n 800f634 <UART_TxISR_8BIT+0xac>
huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
800f60c: 687b ldr r3, [r7, #4]
800f60e: 6d1b ldr r3, [r3, #80] @ 0x50
800f610: 781a ldrb r2, [r3, #0]
800f612: 687b ldr r3, [r7, #4]
800f614: 681b ldr r3, [r3, #0]
800f616: 629a str r2, [r3, #40] @ 0x28
huart->pTxBuffPtr++;
800f618: 687b ldr r3, [r7, #4]
800f61a: 6d1b ldr r3, [r3, #80] @ 0x50
800f61c: 1c5a adds r2, r3, #1
800f61e: 687b ldr r3, [r7, #4]
800f620: 651a str r2, [r3, #80] @ 0x50
huart->TxXferCount--;
800f622: 687b ldr r3, [r7, #4]
800f624: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
800f628: b29b uxth r3, r3
800f62a: 3b01 subs r3, #1
800f62c: b29a uxth r2, r3
800f62e: 687b ldr r3, [r7, #4]
800f630: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
}
800f634: bf00 nop
800f636: 373c adds r7, #60 @ 0x3c
800f638: 46bd mov sp, r7
800f63a: f85d 7b04 ldr.w r7, [sp], #4
800f63e: 4770 bx lr
0800f640 <UART_TxISR_16BIT>:
* interruptions have been enabled by HAL_UART_Transmit_IT().
* @param huart UART handle.
* @retval None
*/
static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
{
800f640: b480 push {r7}
800f642: b091 sub sp, #68 @ 0x44
800f644: af00 add r7, sp, #0
800f646: 6078 str r0, [r7, #4]
const uint16_t *tmp;
/* Check that a Tx process is ongoing */
if (huart->gState == HAL_UART_STATE_BUSY_TX)
800f648: 687b ldr r3, [r7, #4]
800f64a: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800f64e: 2b21 cmp r3, #33 @ 0x21
800f650: d151 bne.n 800f6f6 <UART_TxISR_16BIT+0xb6>
{
if (huart->TxXferCount == 0U)
800f652: 687b ldr r3, [r7, #4]
800f654: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
800f658: b29b uxth r3, r3
800f65a: 2b00 cmp r3, #0
800f65c: d132 bne.n 800f6c4 <UART_TxISR_16BIT+0x84>
{
/* Disable the UART Transmit Data Register Empty Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
800f65e: 687b ldr r3, [r7, #4]
800f660: 681b ldr r3, [r3, #0]
800f662: 627b str r3, [r7, #36] @ 0x24
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f664: 6a7b ldr r3, [r7, #36] @ 0x24
800f666: e853 3f00 ldrex r3, [r3]
800f66a: 623b str r3, [r7, #32]
return(result);
800f66c: 6a3b ldr r3, [r7, #32]
800f66e: f023 0380 bic.w r3, r3, #128 @ 0x80
800f672: 63bb str r3, [r7, #56] @ 0x38
800f674: 687b ldr r3, [r7, #4]
800f676: 681b ldr r3, [r3, #0]
800f678: 461a mov r2, r3
800f67a: 6bbb ldr r3, [r7, #56] @ 0x38
800f67c: 633b str r3, [r7, #48] @ 0x30
800f67e: 62fa str r2, [r7, #44] @ 0x2c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f680: 6af9 ldr r1, [r7, #44] @ 0x2c
800f682: 6b3a ldr r2, [r7, #48] @ 0x30
800f684: e841 2300 strex r3, r2, [r1]
800f688: 62bb str r3, [r7, #40] @ 0x28
return(result);
800f68a: 6abb ldr r3, [r7, #40] @ 0x28
800f68c: 2b00 cmp r3, #0
800f68e: d1e6 bne.n 800f65e <UART_TxISR_16BIT+0x1e>
/* Enable the UART Transmit Complete Interrupt */
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
800f690: 687b ldr r3, [r7, #4]
800f692: 681b ldr r3, [r3, #0]
800f694: 613b str r3, [r7, #16]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f696: 693b ldr r3, [r7, #16]
800f698: e853 3f00 ldrex r3, [r3]
800f69c: 60fb str r3, [r7, #12]
return(result);
800f69e: 68fb ldr r3, [r7, #12]
800f6a0: f043 0340 orr.w r3, r3, #64 @ 0x40
800f6a4: 637b str r3, [r7, #52] @ 0x34
800f6a6: 687b ldr r3, [r7, #4]
800f6a8: 681b ldr r3, [r3, #0]
800f6aa: 461a mov r2, r3
800f6ac: 6b7b ldr r3, [r7, #52] @ 0x34
800f6ae: 61fb str r3, [r7, #28]
800f6b0: 61ba str r2, [r7, #24]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f6b2: 69b9 ldr r1, [r7, #24]
800f6b4: 69fa ldr r2, [r7, #28]
800f6b6: e841 2300 strex r3, r2, [r1]
800f6ba: 617b str r3, [r7, #20]
return(result);
800f6bc: 697b ldr r3, [r7, #20]
800f6be: 2b00 cmp r3, #0
800f6c0: d1e6 bne.n 800f690 <UART_TxISR_16BIT+0x50>
huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
huart->pTxBuffPtr += 2U;
huart->TxXferCount--;
}
}
}
800f6c2: e018 b.n 800f6f6 <UART_TxISR_16BIT+0xb6>
tmp = (const uint16_t *) huart->pTxBuffPtr;
800f6c4: 687b ldr r3, [r7, #4]
800f6c6: 6d1b ldr r3, [r3, #80] @ 0x50
800f6c8: 63fb str r3, [r7, #60] @ 0x3c
huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
800f6ca: 6bfb ldr r3, [r7, #60] @ 0x3c
800f6cc: 881b ldrh r3, [r3, #0]
800f6ce: 461a mov r2, r3
800f6d0: 687b ldr r3, [r7, #4]
800f6d2: 681b ldr r3, [r3, #0]
800f6d4: f3c2 0208 ubfx r2, r2, #0, #9
800f6d8: 629a str r2, [r3, #40] @ 0x28
huart->pTxBuffPtr += 2U;
800f6da: 687b ldr r3, [r7, #4]
800f6dc: 6d1b ldr r3, [r3, #80] @ 0x50
800f6de: 1c9a adds r2, r3, #2
800f6e0: 687b ldr r3, [r7, #4]
800f6e2: 651a str r2, [r3, #80] @ 0x50
huart->TxXferCount--;
800f6e4: 687b ldr r3, [r7, #4]
800f6e6: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
800f6ea: b29b uxth r3, r3
800f6ec: 3b01 subs r3, #1
800f6ee: b29a uxth r2, r3
800f6f0: 687b ldr r3, [r7, #4]
800f6f2: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
}
800f6f6: bf00 nop
800f6f8: 3744 adds r7, #68 @ 0x44
800f6fa: 46bd mov sp, r7
800f6fc: f85d 7b04 ldr.w r7, [sp], #4
800f700: 4770 bx lr
0800f702 <UART_TxISR_8BIT_FIFOEN>:
* interruptions have been enabled by HAL_UART_Transmit_IT().
* @param huart UART handle.
* @retval None
*/
static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
800f702: b480 push {r7}
800f704: b091 sub sp, #68 @ 0x44
800f706: af00 add r7, sp, #0
800f708: 6078 str r0, [r7, #4]
uint16_t nb_tx_data;
/* Check that a Tx process is ongoing */
if (huart->gState == HAL_UART_STATE_BUSY_TX)
800f70a: 687b ldr r3, [r7, #4]
800f70c: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800f710: 2b21 cmp r3, #33 @ 0x21
800f712: d160 bne.n 800f7d6 <UART_TxISR_8BIT_FIFOEN+0xd4>
{
for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
800f714: 687b ldr r3, [r7, #4]
800f716: f8b3 306a ldrh.w r3, [r3, #106] @ 0x6a
800f71a: 87fb strh r3, [r7, #62] @ 0x3e
800f71c: e057 b.n 800f7ce <UART_TxISR_8BIT_FIFOEN+0xcc>
{
if (huart->TxXferCount == 0U)
800f71e: 687b ldr r3, [r7, #4]
800f720: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
800f724: b29b uxth r3, r3
800f726: 2b00 cmp r3, #0
800f728: d133 bne.n 800f792 <UART_TxISR_8BIT_FIFOEN+0x90>
{
/* Disable the TX FIFO threshold interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
800f72a: 687b ldr r3, [r7, #4]
800f72c: 681b ldr r3, [r3, #0]
800f72e: 3308 adds r3, #8
800f730: 627b str r3, [r7, #36] @ 0x24
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f732: 6a7b ldr r3, [r7, #36] @ 0x24
800f734: e853 3f00 ldrex r3, [r3]
800f738: 623b str r3, [r7, #32]
return(result);
800f73a: 6a3b ldr r3, [r7, #32]
800f73c: f423 0300 bic.w r3, r3, #8388608 @ 0x800000
800f740: 63bb str r3, [r7, #56] @ 0x38
800f742: 687b ldr r3, [r7, #4]
800f744: 681b ldr r3, [r3, #0]
800f746: 3308 adds r3, #8
800f748: 6bba ldr r2, [r7, #56] @ 0x38
800f74a: 633a str r2, [r7, #48] @ 0x30
800f74c: 62fb str r3, [r7, #44] @ 0x2c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f74e: 6af9 ldr r1, [r7, #44] @ 0x2c
800f750: 6b3a ldr r2, [r7, #48] @ 0x30
800f752: e841 2300 strex r3, r2, [r1]
800f756: 62bb str r3, [r7, #40] @ 0x28
return(result);
800f758: 6abb ldr r3, [r7, #40] @ 0x28
800f75a: 2b00 cmp r3, #0
800f75c: d1e5 bne.n 800f72a <UART_TxISR_8BIT_FIFOEN+0x28>
/* Enable the UART Transmit Complete Interrupt */
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
800f75e: 687b ldr r3, [r7, #4]
800f760: 681b ldr r3, [r3, #0]
800f762: 613b str r3, [r7, #16]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f764: 693b ldr r3, [r7, #16]
800f766: e853 3f00 ldrex r3, [r3]
800f76a: 60fb str r3, [r7, #12]
return(result);
800f76c: 68fb ldr r3, [r7, #12]
800f76e: f043 0340 orr.w r3, r3, #64 @ 0x40
800f772: 637b str r3, [r7, #52] @ 0x34
800f774: 687b ldr r3, [r7, #4]
800f776: 681b ldr r3, [r3, #0]
800f778: 461a mov r2, r3
800f77a: 6b7b ldr r3, [r7, #52] @ 0x34
800f77c: 61fb str r3, [r7, #28]
800f77e: 61ba str r2, [r7, #24]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f780: 69b9 ldr r1, [r7, #24]
800f782: 69fa ldr r2, [r7, #28]
800f784: e841 2300 strex r3, r2, [r1]
800f788: 617b str r3, [r7, #20]
return(result);
800f78a: 697b ldr r3, [r7, #20]
800f78c: 2b00 cmp r3, #0
800f78e: d1e6 bne.n 800f75e <UART_TxISR_8BIT_FIFOEN+0x5c>
break; /* force exit loop */
800f790: e021 b.n 800f7d6 <UART_TxISR_8BIT_FIFOEN+0xd4>
}
else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
800f792: 687b ldr r3, [r7, #4]
800f794: 681b ldr r3, [r3, #0]
800f796: 69db ldr r3, [r3, #28]
800f798: f003 0380 and.w r3, r3, #128 @ 0x80
800f79c: 2b00 cmp r3, #0
800f79e: d013 beq.n 800f7c8 <UART_TxISR_8BIT_FIFOEN+0xc6>
{
huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
800f7a0: 687b ldr r3, [r7, #4]
800f7a2: 6d1b ldr r3, [r3, #80] @ 0x50
800f7a4: 781a ldrb r2, [r3, #0]
800f7a6: 687b ldr r3, [r7, #4]
800f7a8: 681b ldr r3, [r3, #0]
800f7aa: 629a str r2, [r3, #40] @ 0x28
huart->pTxBuffPtr++;
800f7ac: 687b ldr r3, [r7, #4]
800f7ae: 6d1b ldr r3, [r3, #80] @ 0x50
800f7b0: 1c5a adds r2, r3, #1
800f7b2: 687b ldr r3, [r7, #4]
800f7b4: 651a str r2, [r3, #80] @ 0x50
huart->TxXferCount--;
800f7b6: 687b ldr r3, [r7, #4]
800f7b8: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
800f7bc: b29b uxth r3, r3
800f7be: 3b01 subs r3, #1
800f7c0: b29a uxth r2, r3
800f7c2: 687b ldr r3, [r7, #4]
800f7c4: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
800f7c8: 8ffb ldrh r3, [r7, #62] @ 0x3e
800f7ca: 3b01 subs r3, #1
800f7cc: 87fb strh r3, [r7, #62] @ 0x3e
800f7ce: 8ffb ldrh r3, [r7, #62] @ 0x3e
800f7d0: 2b00 cmp r3, #0
800f7d2: d1a4 bne.n 800f71e <UART_TxISR_8BIT_FIFOEN+0x1c>
{
/* Nothing to do */
}
}
}
}
800f7d4: e7ff b.n 800f7d6 <UART_TxISR_8BIT_FIFOEN+0xd4>
800f7d6: bf00 nop
800f7d8: 3744 adds r7, #68 @ 0x44
800f7da: 46bd mov sp, r7
800f7dc: f85d 7b04 ldr.w r7, [sp], #4
800f7e0: 4770 bx lr
0800f7e2 <UART_TxISR_16BIT_FIFOEN>:
* interruptions have been enabled by HAL_UART_Transmit_IT().
* @param huart UART handle.
* @retval None
*/
static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
800f7e2: b480 push {r7}
800f7e4: b091 sub sp, #68 @ 0x44
800f7e6: af00 add r7, sp, #0
800f7e8: 6078 str r0, [r7, #4]
const uint16_t *tmp;
uint16_t nb_tx_data;
/* Check that a Tx process is ongoing */
if (huart->gState == HAL_UART_STATE_BUSY_TX)
800f7ea: 687b ldr r3, [r7, #4]
800f7ec: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800f7f0: 2b21 cmp r3, #33 @ 0x21
800f7f2: d165 bne.n 800f8c0 <UART_TxISR_16BIT_FIFOEN+0xde>
{
for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
800f7f4: 687b ldr r3, [r7, #4]
800f7f6: f8b3 306a ldrh.w r3, [r3, #106] @ 0x6a
800f7fa: 87fb strh r3, [r7, #62] @ 0x3e
800f7fc: e05c b.n 800f8b8 <UART_TxISR_16BIT_FIFOEN+0xd6>
{
if (huart->TxXferCount == 0U)
800f7fe: 687b ldr r3, [r7, #4]
800f800: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
800f804: b29b uxth r3, r3
800f806: 2b00 cmp r3, #0
800f808: d133 bne.n 800f872 <UART_TxISR_16BIT_FIFOEN+0x90>
{
/* Disable the TX FIFO threshold interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
800f80a: 687b ldr r3, [r7, #4]
800f80c: 681b ldr r3, [r3, #0]
800f80e: 3308 adds r3, #8
800f810: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f812: 6a3b ldr r3, [r7, #32]
800f814: e853 3f00 ldrex r3, [r3]
800f818: 61fb str r3, [r7, #28]
return(result);
800f81a: 69fb ldr r3, [r7, #28]
800f81c: f423 0300 bic.w r3, r3, #8388608 @ 0x800000
800f820: 637b str r3, [r7, #52] @ 0x34
800f822: 687b ldr r3, [r7, #4]
800f824: 681b ldr r3, [r3, #0]
800f826: 3308 adds r3, #8
800f828: 6b7a ldr r2, [r7, #52] @ 0x34
800f82a: 62fa str r2, [r7, #44] @ 0x2c
800f82c: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f82e: 6ab9 ldr r1, [r7, #40] @ 0x28
800f830: 6afa ldr r2, [r7, #44] @ 0x2c
800f832: e841 2300 strex r3, r2, [r1]
800f836: 627b str r3, [r7, #36] @ 0x24
return(result);
800f838: 6a7b ldr r3, [r7, #36] @ 0x24
800f83a: 2b00 cmp r3, #0
800f83c: d1e5 bne.n 800f80a <UART_TxISR_16BIT_FIFOEN+0x28>
/* Enable the UART Transmit Complete Interrupt */
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
800f83e: 687b ldr r3, [r7, #4]
800f840: 681b ldr r3, [r3, #0]
800f842: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f844: 68fb ldr r3, [r7, #12]
800f846: e853 3f00 ldrex r3, [r3]
800f84a: 60bb str r3, [r7, #8]
return(result);
800f84c: 68bb ldr r3, [r7, #8]
800f84e: f043 0340 orr.w r3, r3, #64 @ 0x40
800f852: 633b str r3, [r7, #48] @ 0x30
800f854: 687b ldr r3, [r7, #4]
800f856: 681b ldr r3, [r3, #0]
800f858: 461a mov r2, r3
800f85a: 6b3b ldr r3, [r7, #48] @ 0x30
800f85c: 61bb str r3, [r7, #24]
800f85e: 617a str r2, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f860: 6979 ldr r1, [r7, #20]
800f862: 69ba ldr r2, [r7, #24]
800f864: e841 2300 strex r3, r2, [r1]
800f868: 613b str r3, [r7, #16]
return(result);
800f86a: 693b ldr r3, [r7, #16]
800f86c: 2b00 cmp r3, #0
800f86e: d1e6 bne.n 800f83e <UART_TxISR_16BIT_FIFOEN+0x5c>
break; /* force exit loop */
800f870: e026 b.n 800f8c0 <UART_TxISR_16BIT_FIFOEN+0xde>
}
else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
800f872: 687b ldr r3, [r7, #4]
800f874: 681b ldr r3, [r3, #0]
800f876: 69db ldr r3, [r3, #28]
800f878: f003 0380 and.w r3, r3, #128 @ 0x80
800f87c: 2b00 cmp r3, #0
800f87e: d018 beq.n 800f8b2 <UART_TxISR_16BIT_FIFOEN+0xd0>
{
tmp = (const uint16_t *) huart->pTxBuffPtr;
800f880: 687b ldr r3, [r7, #4]
800f882: 6d1b ldr r3, [r3, #80] @ 0x50
800f884: 63bb str r3, [r7, #56] @ 0x38
huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
800f886: 6bbb ldr r3, [r7, #56] @ 0x38
800f888: 881b ldrh r3, [r3, #0]
800f88a: 461a mov r2, r3
800f88c: 687b ldr r3, [r7, #4]
800f88e: 681b ldr r3, [r3, #0]
800f890: f3c2 0208 ubfx r2, r2, #0, #9
800f894: 629a str r2, [r3, #40] @ 0x28
huart->pTxBuffPtr += 2U;
800f896: 687b ldr r3, [r7, #4]
800f898: 6d1b ldr r3, [r3, #80] @ 0x50
800f89a: 1c9a adds r2, r3, #2
800f89c: 687b ldr r3, [r7, #4]
800f89e: 651a str r2, [r3, #80] @ 0x50
huart->TxXferCount--;
800f8a0: 687b ldr r3, [r7, #4]
800f8a2: f8b3 3056 ldrh.w r3, [r3, #86] @ 0x56
800f8a6: b29b uxth r3, r3
800f8a8: 3b01 subs r3, #1
800f8aa: b29a uxth r2, r3
800f8ac: 687b ldr r3, [r7, #4]
800f8ae: f8a3 2056 strh.w r2, [r3, #86] @ 0x56
for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
800f8b2: 8ffb ldrh r3, [r7, #62] @ 0x3e
800f8b4: 3b01 subs r3, #1
800f8b6: 87fb strh r3, [r7, #62] @ 0x3e
800f8b8: 8ffb ldrh r3, [r7, #62] @ 0x3e
800f8ba: 2b00 cmp r3, #0
800f8bc: d19f bne.n 800f7fe <UART_TxISR_16BIT_FIFOEN+0x1c>
{
/* Nothing to do */
}
}
}
}
800f8be: e7ff b.n 800f8c0 <UART_TxISR_16BIT_FIFOEN+0xde>
800f8c0: bf00 nop
800f8c2: 3744 adds r7, #68 @ 0x44
800f8c4: 46bd mov sp, r7
800f8c6: f85d 7b04 ldr.w r7, [sp], #4
800f8ca: 4770 bx lr
0800f8cc <UART_EndTransmit_IT>:
* @param huart pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
{
800f8cc: b580 push {r7, lr}
800f8ce: b088 sub sp, #32
800f8d0: af00 add r7, sp, #0
800f8d2: 6078 str r0, [r7, #4]
/* Disable the UART Transmit Complete Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
800f8d4: 687b ldr r3, [r7, #4]
800f8d6: 681b ldr r3, [r3, #0]
800f8d8: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f8da: 68fb ldr r3, [r7, #12]
800f8dc: e853 3f00 ldrex r3, [r3]
800f8e0: 60bb str r3, [r7, #8]
return(result);
800f8e2: 68bb ldr r3, [r7, #8]
800f8e4: f023 0340 bic.w r3, r3, #64 @ 0x40
800f8e8: 61fb str r3, [r7, #28]
800f8ea: 687b ldr r3, [r7, #4]
800f8ec: 681b ldr r3, [r3, #0]
800f8ee: 461a mov r2, r3
800f8f0: 69fb ldr r3, [r7, #28]
800f8f2: 61bb str r3, [r7, #24]
800f8f4: 617a str r2, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f8f6: 6979 ldr r1, [r7, #20]
800f8f8: 69ba ldr r2, [r7, #24]
800f8fa: e841 2300 strex r3, r2, [r1]
800f8fe: 613b str r3, [r7, #16]
return(result);
800f900: 693b ldr r3, [r7, #16]
800f902: 2b00 cmp r3, #0
800f904: d1e6 bne.n 800f8d4 <UART_EndTransmit_IT+0x8>
/* Tx process is ended, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
800f906: 687b ldr r3, [r7, #4]
800f908: 2220 movs r2, #32
800f90a: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Cleat TxISR function pointer */
huart->TxISR = NULL;
800f90e: 687b ldr r3, [r7, #4]
800f910: 2200 movs r2, #0
800f912: 679a str r2, [r3, #120] @ 0x78
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Tx complete callback*/
huart->TxCpltCallback(huart);
#else
/*Call legacy weak Tx complete callback*/
HAL_UART_TxCpltCallback(huart);
800f914: 6878 ldr r0, [r7, #4]
800f916: f7f4 ffe9 bl 80048ec <HAL_UART_TxCpltCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
800f91a: bf00 nop
800f91c: 3720 adds r7, #32
800f91e: 46bd mov sp, r7
800f920: bd80 pop {r7, pc}
...
0800f924 <UART_RxISR_8BIT>:
* @brief RX interrupt handler for 7 or 8 bits data word length .
* @param huart UART handle.
* @retval None
*/
static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
{
800f924: b580 push {r7, lr}
800f926: b09c sub sp, #112 @ 0x70
800f928: af00 add r7, sp, #0
800f92a: 6078 str r0, [r7, #4]
uint16_t uhMask = huart->Mask;
800f92c: 687b ldr r3, [r7, #4]
800f92e: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
800f932: f8a7 306e strh.w r3, [r7, #110] @ 0x6e
uint16_t uhdata;
/* Check that a Rx process is ongoing */
if (huart->RxState == HAL_UART_STATE_BUSY_RX)
800f936: 687b ldr r3, [r7, #4]
800f938: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
800f93c: 2b22 cmp r3, #34 @ 0x22
800f93e: f040 80be bne.w 800fabe <UART_RxISR_8BIT+0x19a>
{
uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
800f942: 687b ldr r3, [r7, #4]
800f944: 681b ldr r3, [r3, #0]
800f946: 6a5b ldr r3, [r3, #36] @ 0x24
800f948: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
*huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
800f94c: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
800f950: b2d9 uxtb r1, r3
800f952: f8b7 306e ldrh.w r3, [r7, #110] @ 0x6e
800f956: b2da uxtb r2, r3
800f958: 687b ldr r3, [r7, #4]
800f95a: 6d9b ldr r3, [r3, #88] @ 0x58
800f95c: 400a ands r2, r1
800f95e: b2d2 uxtb r2, r2
800f960: 701a strb r2, [r3, #0]
huart->pRxBuffPtr++;
800f962: 687b ldr r3, [r7, #4]
800f964: 6d9b ldr r3, [r3, #88] @ 0x58
800f966: 1c5a adds r2, r3, #1
800f968: 687b ldr r3, [r7, #4]
800f96a: 659a str r2, [r3, #88] @ 0x58
huart->RxXferCount--;
800f96c: 687b ldr r3, [r7, #4]
800f96e: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800f972: b29b uxth r3, r3
800f974: 3b01 subs r3, #1
800f976: b29a uxth r2, r3
800f978: 687b ldr r3, [r7, #4]
800f97a: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
if (huart->RxXferCount == 0U)
800f97e: 687b ldr r3, [r7, #4]
800f980: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800f984: b29b uxth r3, r3
800f986: 2b00 cmp r3, #0
800f988: f040 80a1 bne.w 800face <UART_RxISR_8BIT+0x1aa>
{
/* Disable the UART Parity Error Interrupt and RXNE interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
800f98c: 687b ldr r3, [r7, #4]
800f98e: 681b ldr r3, [r3, #0]
800f990: 64fb str r3, [r7, #76] @ 0x4c
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f992: 6cfb ldr r3, [r7, #76] @ 0x4c
800f994: e853 3f00 ldrex r3, [r3]
800f998: 64bb str r3, [r7, #72] @ 0x48
return(result);
800f99a: 6cbb ldr r3, [r7, #72] @ 0x48
800f99c: f423 7390 bic.w r3, r3, #288 @ 0x120
800f9a0: 66bb str r3, [r7, #104] @ 0x68
800f9a2: 687b ldr r3, [r7, #4]
800f9a4: 681b ldr r3, [r3, #0]
800f9a6: 461a mov r2, r3
800f9a8: 6ebb ldr r3, [r7, #104] @ 0x68
800f9aa: 65bb str r3, [r7, #88] @ 0x58
800f9ac: 657a str r2, [r7, #84] @ 0x54
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f9ae: 6d79 ldr r1, [r7, #84] @ 0x54
800f9b0: 6dba ldr r2, [r7, #88] @ 0x58
800f9b2: e841 2300 strex r3, r2, [r1]
800f9b6: 653b str r3, [r7, #80] @ 0x50
return(result);
800f9b8: 6d3b ldr r3, [r7, #80] @ 0x50
800f9ba: 2b00 cmp r3, #0
800f9bc: d1e6 bne.n 800f98c <UART_RxISR_8BIT+0x68>
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
800f9be: 687b ldr r3, [r7, #4]
800f9c0: 681b ldr r3, [r3, #0]
800f9c2: 3308 adds r3, #8
800f9c4: 63bb str r3, [r7, #56] @ 0x38
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800f9c6: 6bbb ldr r3, [r7, #56] @ 0x38
800f9c8: e853 3f00 ldrex r3, [r3]
800f9cc: 637b str r3, [r7, #52] @ 0x34
return(result);
800f9ce: 6b7b ldr r3, [r7, #52] @ 0x34
800f9d0: f023 0301 bic.w r3, r3, #1
800f9d4: 667b str r3, [r7, #100] @ 0x64
800f9d6: 687b ldr r3, [r7, #4]
800f9d8: 681b ldr r3, [r3, #0]
800f9da: 3308 adds r3, #8
800f9dc: 6e7a ldr r2, [r7, #100] @ 0x64
800f9de: 647a str r2, [r7, #68] @ 0x44
800f9e0: 643b str r3, [r7, #64] @ 0x40
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800f9e2: 6c39 ldr r1, [r7, #64] @ 0x40
800f9e4: 6c7a ldr r2, [r7, #68] @ 0x44
800f9e6: e841 2300 strex r3, r2, [r1]
800f9ea: 63fb str r3, [r7, #60] @ 0x3c
return(result);
800f9ec: 6bfb ldr r3, [r7, #60] @ 0x3c
800f9ee: 2b00 cmp r3, #0
800f9f0: d1e5 bne.n 800f9be <UART_RxISR_8BIT+0x9a>
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
800f9f2: 687b ldr r3, [r7, #4]
800f9f4: 2220 movs r2, #32
800f9f6: f8c3 208c str.w r2, [r3, #140] @ 0x8c
/* Clear RxISR function pointer */
huart->RxISR = NULL;
800f9fa: 687b ldr r3, [r7, #4]
800f9fc: 2200 movs r2, #0
800f9fe: 675a str r2, [r3, #116] @ 0x74
/* Initialize type of RxEvent to Transfer Complete */
huart->RxEventType = HAL_UART_RXEVENT_TC;
800fa00: 687b ldr r3, [r7, #4]
800fa02: 2200 movs r2, #0
800fa04: 671a str r2, [r3, #112] @ 0x70
if (!(IS_LPUART_INSTANCE(huart->Instance)))
800fa06: 687b ldr r3, [r7, #4]
800fa08: 681b ldr r3, [r3, #0]
800fa0a: 4a33 ldr r2, [pc, #204] @ (800fad8 <UART_RxISR_8BIT+0x1b4>)
800fa0c: 4293 cmp r3, r2
800fa0e: d01f beq.n 800fa50 <UART_RxISR_8BIT+0x12c>
{
/* Check that USART RTOEN bit is set */
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
800fa10: 687b ldr r3, [r7, #4]
800fa12: 681b ldr r3, [r3, #0]
800fa14: 685b ldr r3, [r3, #4]
800fa16: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800fa1a: 2b00 cmp r3, #0
800fa1c: d018 beq.n 800fa50 <UART_RxISR_8BIT+0x12c>
{
/* Enable the UART Receiver Timeout Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
800fa1e: 687b ldr r3, [r7, #4]
800fa20: 681b ldr r3, [r3, #0]
800fa22: 627b str r3, [r7, #36] @ 0x24
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fa24: 6a7b ldr r3, [r7, #36] @ 0x24
800fa26: e853 3f00 ldrex r3, [r3]
800fa2a: 623b str r3, [r7, #32]
return(result);
800fa2c: 6a3b ldr r3, [r7, #32]
800fa2e: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
800fa32: 663b str r3, [r7, #96] @ 0x60
800fa34: 687b ldr r3, [r7, #4]
800fa36: 681b ldr r3, [r3, #0]
800fa38: 461a mov r2, r3
800fa3a: 6e3b ldr r3, [r7, #96] @ 0x60
800fa3c: 633b str r3, [r7, #48] @ 0x30
800fa3e: 62fa str r2, [r7, #44] @ 0x2c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fa40: 6af9 ldr r1, [r7, #44] @ 0x2c
800fa42: 6b3a ldr r2, [r7, #48] @ 0x30
800fa44: e841 2300 strex r3, r2, [r1]
800fa48: 62bb str r3, [r7, #40] @ 0x28
return(result);
800fa4a: 6abb ldr r3, [r7, #40] @ 0x28
800fa4c: 2b00 cmp r3, #0
800fa4e: d1e6 bne.n 800fa1e <UART_RxISR_8BIT+0xfa>
}
}
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
800fa50: 687b ldr r3, [r7, #4]
800fa52: 6edb ldr r3, [r3, #108] @ 0x6c
800fa54: 2b01 cmp r3, #1
800fa56: d12e bne.n 800fab6 <UART_RxISR_8BIT+0x192>
{
/* Set reception type to Standard */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
800fa58: 687b ldr r3, [r7, #4]
800fa5a: 2200 movs r2, #0
800fa5c: 66da str r2, [r3, #108] @ 0x6c
/* Disable IDLE interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
800fa5e: 687b ldr r3, [r7, #4]
800fa60: 681b ldr r3, [r3, #0]
800fa62: 613b str r3, [r7, #16]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fa64: 693b ldr r3, [r7, #16]
800fa66: e853 3f00 ldrex r3, [r3]
800fa6a: 60fb str r3, [r7, #12]
return(result);
800fa6c: 68fb ldr r3, [r7, #12]
800fa6e: f023 0310 bic.w r3, r3, #16
800fa72: 65fb str r3, [r7, #92] @ 0x5c
800fa74: 687b ldr r3, [r7, #4]
800fa76: 681b ldr r3, [r3, #0]
800fa78: 461a mov r2, r3
800fa7a: 6dfb ldr r3, [r7, #92] @ 0x5c
800fa7c: 61fb str r3, [r7, #28]
800fa7e: 61ba str r2, [r7, #24]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fa80: 69b9 ldr r1, [r7, #24]
800fa82: 69fa ldr r2, [r7, #28]
800fa84: e841 2300 strex r3, r2, [r1]
800fa88: 617b str r3, [r7, #20]
return(result);
800fa8a: 697b ldr r3, [r7, #20]
800fa8c: 2b00 cmp r3, #0
800fa8e: d1e6 bne.n 800fa5e <UART_RxISR_8BIT+0x13a>
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
800fa90: 687b ldr r3, [r7, #4]
800fa92: 681b ldr r3, [r3, #0]
800fa94: 69db ldr r3, [r3, #28]
800fa96: f003 0310 and.w r3, r3, #16
800fa9a: 2b10 cmp r3, #16
800fa9c: d103 bne.n 800faa6 <UART_RxISR_8BIT+0x182>
{
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
800fa9e: 687b ldr r3, [r7, #4]
800faa0: 681b ldr r3, [r3, #0]
800faa2: 2210 movs r2, #16
800faa4: 621a str r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
#else
/*Call legacy weak Rx Event callback*/
HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
800faa6: 687b ldr r3, [r7, #4]
800faa8: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
800faac: 4619 mov r1, r3
800faae: 6878 ldr r0, [r7, #4]
800fab0: f7f4 fec2 bl 8004838 <HAL_UARTEx_RxEventCallback>
else
{
/* Clear RXNE interrupt flag */
__HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
}
}
800fab4: e00b b.n 800face <UART_RxISR_8BIT+0x1aa>
HAL_UART_RxCpltCallback(huart);
800fab6: 6878 ldr r0, [r7, #4]
800fab8: f7f4 feb4 bl 8004824 <HAL_UART_RxCpltCallback>
}
800fabc: e007 b.n 800face <UART_RxISR_8BIT+0x1aa>
__HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
800fabe: 687b ldr r3, [r7, #4]
800fac0: 681b ldr r3, [r3, #0]
800fac2: 699a ldr r2, [r3, #24]
800fac4: 687b ldr r3, [r7, #4]
800fac6: 681b ldr r3, [r3, #0]
800fac8: f042 0208 orr.w r2, r2, #8
800facc: 619a str r2, [r3, #24]
}
800face: bf00 nop
800fad0: 3770 adds r7, #112 @ 0x70
800fad2: 46bd mov sp, r7
800fad4: bd80 pop {r7, pc}
800fad6: bf00 nop
800fad8: 58000c00 .word 0x58000c00
0800fadc <UART_RxISR_16BIT>:
* interruptions have been enabled by HAL_UART_Receive_IT()
* @param huart UART handle.
* @retval None
*/
static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
{
800fadc: b580 push {r7, lr}
800fade: b09c sub sp, #112 @ 0x70
800fae0: af00 add r7, sp, #0
800fae2: 6078 str r0, [r7, #4]
uint16_t *tmp;
uint16_t uhMask = huart->Mask;
800fae4: 687b ldr r3, [r7, #4]
800fae6: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
800faea: f8a7 306e strh.w r3, [r7, #110] @ 0x6e
uint16_t uhdata;
/* Check that a Rx process is ongoing */
if (huart->RxState == HAL_UART_STATE_BUSY_RX)
800faee: 687b ldr r3, [r7, #4]
800faf0: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
800faf4: 2b22 cmp r3, #34 @ 0x22
800faf6: f040 80be bne.w 800fc76 <UART_RxISR_16BIT+0x19a>
{
uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
800fafa: 687b ldr r3, [r7, #4]
800fafc: 681b ldr r3, [r3, #0]
800fafe: 6a5b ldr r3, [r3, #36] @ 0x24
800fb00: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
tmp = (uint16_t *) huart->pRxBuffPtr ;
800fb04: 687b ldr r3, [r7, #4]
800fb06: 6d9b ldr r3, [r3, #88] @ 0x58
800fb08: 66bb str r3, [r7, #104] @ 0x68
*tmp = (uint16_t)(uhdata & uhMask);
800fb0a: f8b7 206c ldrh.w r2, [r7, #108] @ 0x6c
800fb0e: f8b7 306e ldrh.w r3, [r7, #110] @ 0x6e
800fb12: 4013 ands r3, r2
800fb14: b29a uxth r2, r3
800fb16: 6ebb ldr r3, [r7, #104] @ 0x68
800fb18: 801a strh r2, [r3, #0]
huart->pRxBuffPtr += 2U;
800fb1a: 687b ldr r3, [r7, #4]
800fb1c: 6d9b ldr r3, [r3, #88] @ 0x58
800fb1e: 1c9a adds r2, r3, #2
800fb20: 687b ldr r3, [r7, #4]
800fb22: 659a str r2, [r3, #88] @ 0x58
huart->RxXferCount--;
800fb24: 687b ldr r3, [r7, #4]
800fb26: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800fb2a: b29b uxth r3, r3
800fb2c: 3b01 subs r3, #1
800fb2e: b29a uxth r2, r3
800fb30: 687b ldr r3, [r7, #4]
800fb32: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
if (huart->RxXferCount == 0U)
800fb36: 687b ldr r3, [r7, #4]
800fb38: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800fb3c: b29b uxth r3, r3
800fb3e: 2b00 cmp r3, #0
800fb40: f040 80a1 bne.w 800fc86 <UART_RxISR_16BIT+0x1aa>
{
/* Disable the UART Parity Error Interrupt and RXNE interrupt*/
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
800fb44: 687b ldr r3, [r7, #4]
800fb46: 681b ldr r3, [r3, #0]
800fb48: 64bb str r3, [r7, #72] @ 0x48
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fb4a: 6cbb ldr r3, [r7, #72] @ 0x48
800fb4c: e853 3f00 ldrex r3, [r3]
800fb50: 647b str r3, [r7, #68] @ 0x44
return(result);
800fb52: 6c7b ldr r3, [r7, #68] @ 0x44
800fb54: f423 7390 bic.w r3, r3, #288 @ 0x120
800fb58: 667b str r3, [r7, #100] @ 0x64
800fb5a: 687b ldr r3, [r7, #4]
800fb5c: 681b ldr r3, [r3, #0]
800fb5e: 461a mov r2, r3
800fb60: 6e7b ldr r3, [r7, #100] @ 0x64
800fb62: 657b str r3, [r7, #84] @ 0x54
800fb64: 653a str r2, [r7, #80] @ 0x50
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fb66: 6d39 ldr r1, [r7, #80] @ 0x50
800fb68: 6d7a ldr r2, [r7, #84] @ 0x54
800fb6a: e841 2300 strex r3, r2, [r1]
800fb6e: 64fb str r3, [r7, #76] @ 0x4c
return(result);
800fb70: 6cfb ldr r3, [r7, #76] @ 0x4c
800fb72: 2b00 cmp r3, #0
800fb74: d1e6 bne.n 800fb44 <UART_RxISR_16BIT+0x68>
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
800fb76: 687b ldr r3, [r7, #4]
800fb78: 681b ldr r3, [r3, #0]
800fb7a: 3308 adds r3, #8
800fb7c: 637b str r3, [r7, #52] @ 0x34
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fb7e: 6b7b ldr r3, [r7, #52] @ 0x34
800fb80: e853 3f00 ldrex r3, [r3]
800fb84: 633b str r3, [r7, #48] @ 0x30
return(result);
800fb86: 6b3b ldr r3, [r7, #48] @ 0x30
800fb88: f023 0301 bic.w r3, r3, #1
800fb8c: 663b str r3, [r7, #96] @ 0x60
800fb8e: 687b ldr r3, [r7, #4]
800fb90: 681b ldr r3, [r3, #0]
800fb92: 3308 adds r3, #8
800fb94: 6e3a ldr r2, [r7, #96] @ 0x60
800fb96: 643a str r2, [r7, #64] @ 0x40
800fb98: 63fb str r3, [r7, #60] @ 0x3c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fb9a: 6bf9 ldr r1, [r7, #60] @ 0x3c
800fb9c: 6c3a ldr r2, [r7, #64] @ 0x40
800fb9e: e841 2300 strex r3, r2, [r1]
800fba2: 63bb str r3, [r7, #56] @ 0x38
return(result);
800fba4: 6bbb ldr r3, [r7, #56] @ 0x38
800fba6: 2b00 cmp r3, #0
800fba8: d1e5 bne.n 800fb76 <UART_RxISR_16BIT+0x9a>
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
800fbaa: 687b ldr r3, [r7, #4]
800fbac: 2220 movs r2, #32
800fbae: f8c3 208c str.w r2, [r3, #140] @ 0x8c
/* Clear RxISR function pointer */
huart->RxISR = NULL;
800fbb2: 687b ldr r3, [r7, #4]
800fbb4: 2200 movs r2, #0
800fbb6: 675a str r2, [r3, #116] @ 0x74
/* Initialize type of RxEvent to Transfer Complete */
huart->RxEventType = HAL_UART_RXEVENT_TC;
800fbb8: 687b ldr r3, [r7, #4]
800fbba: 2200 movs r2, #0
800fbbc: 671a str r2, [r3, #112] @ 0x70
if (!(IS_LPUART_INSTANCE(huart->Instance)))
800fbbe: 687b ldr r3, [r7, #4]
800fbc0: 681b ldr r3, [r3, #0]
800fbc2: 4a33 ldr r2, [pc, #204] @ (800fc90 <UART_RxISR_16BIT+0x1b4>)
800fbc4: 4293 cmp r3, r2
800fbc6: d01f beq.n 800fc08 <UART_RxISR_16BIT+0x12c>
{
/* Check that USART RTOEN bit is set */
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
800fbc8: 687b ldr r3, [r7, #4]
800fbca: 681b ldr r3, [r3, #0]
800fbcc: 685b ldr r3, [r3, #4]
800fbce: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800fbd2: 2b00 cmp r3, #0
800fbd4: d018 beq.n 800fc08 <UART_RxISR_16BIT+0x12c>
{
/* Enable the UART Receiver Timeout Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
800fbd6: 687b ldr r3, [r7, #4]
800fbd8: 681b ldr r3, [r3, #0]
800fbda: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fbdc: 6a3b ldr r3, [r7, #32]
800fbde: e853 3f00 ldrex r3, [r3]
800fbe2: 61fb str r3, [r7, #28]
return(result);
800fbe4: 69fb ldr r3, [r7, #28]
800fbe6: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
800fbea: 65fb str r3, [r7, #92] @ 0x5c
800fbec: 687b ldr r3, [r7, #4]
800fbee: 681b ldr r3, [r3, #0]
800fbf0: 461a mov r2, r3
800fbf2: 6dfb ldr r3, [r7, #92] @ 0x5c
800fbf4: 62fb str r3, [r7, #44] @ 0x2c
800fbf6: 62ba str r2, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fbf8: 6ab9 ldr r1, [r7, #40] @ 0x28
800fbfa: 6afa ldr r2, [r7, #44] @ 0x2c
800fbfc: e841 2300 strex r3, r2, [r1]
800fc00: 627b str r3, [r7, #36] @ 0x24
return(result);
800fc02: 6a7b ldr r3, [r7, #36] @ 0x24
800fc04: 2b00 cmp r3, #0
800fc06: d1e6 bne.n 800fbd6 <UART_RxISR_16BIT+0xfa>
}
}
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
800fc08: 687b ldr r3, [r7, #4]
800fc0a: 6edb ldr r3, [r3, #108] @ 0x6c
800fc0c: 2b01 cmp r3, #1
800fc0e: d12e bne.n 800fc6e <UART_RxISR_16BIT+0x192>
{
/* Set reception type to Standard */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
800fc10: 687b ldr r3, [r7, #4]
800fc12: 2200 movs r2, #0
800fc14: 66da str r2, [r3, #108] @ 0x6c
/* Disable IDLE interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
800fc16: 687b ldr r3, [r7, #4]
800fc18: 681b ldr r3, [r3, #0]
800fc1a: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fc1c: 68fb ldr r3, [r7, #12]
800fc1e: e853 3f00 ldrex r3, [r3]
800fc22: 60bb str r3, [r7, #8]
return(result);
800fc24: 68bb ldr r3, [r7, #8]
800fc26: f023 0310 bic.w r3, r3, #16
800fc2a: 65bb str r3, [r7, #88] @ 0x58
800fc2c: 687b ldr r3, [r7, #4]
800fc2e: 681b ldr r3, [r3, #0]
800fc30: 461a mov r2, r3
800fc32: 6dbb ldr r3, [r7, #88] @ 0x58
800fc34: 61bb str r3, [r7, #24]
800fc36: 617a str r2, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fc38: 6979 ldr r1, [r7, #20]
800fc3a: 69ba ldr r2, [r7, #24]
800fc3c: e841 2300 strex r3, r2, [r1]
800fc40: 613b str r3, [r7, #16]
return(result);
800fc42: 693b ldr r3, [r7, #16]
800fc44: 2b00 cmp r3, #0
800fc46: d1e6 bne.n 800fc16 <UART_RxISR_16BIT+0x13a>
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
800fc48: 687b ldr r3, [r7, #4]
800fc4a: 681b ldr r3, [r3, #0]
800fc4c: 69db ldr r3, [r3, #28]
800fc4e: f003 0310 and.w r3, r3, #16
800fc52: 2b10 cmp r3, #16
800fc54: d103 bne.n 800fc5e <UART_RxISR_16BIT+0x182>
{
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
800fc56: 687b ldr r3, [r7, #4]
800fc58: 681b ldr r3, [r3, #0]
800fc5a: 2210 movs r2, #16
800fc5c: 621a str r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
#else
/*Call legacy weak Rx Event callback*/
HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
800fc5e: 687b ldr r3, [r7, #4]
800fc60: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
800fc64: 4619 mov r1, r3
800fc66: 6878 ldr r0, [r7, #4]
800fc68: f7f4 fde6 bl 8004838 <HAL_UARTEx_RxEventCallback>
else
{
/* Clear RXNE interrupt flag */
__HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
}
}
800fc6c: e00b b.n 800fc86 <UART_RxISR_16BIT+0x1aa>
HAL_UART_RxCpltCallback(huart);
800fc6e: 6878 ldr r0, [r7, #4]
800fc70: f7f4 fdd8 bl 8004824 <HAL_UART_RxCpltCallback>
}
800fc74: e007 b.n 800fc86 <UART_RxISR_16BIT+0x1aa>
__HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
800fc76: 687b ldr r3, [r7, #4]
800fc78: 681b ldr r3, [r3, #0]
800fc7a: 699a ldr r2, [r3, #24]
800fc7c: 687b ldr r3, [r7, #4]
800fc7e: 681b ldr r3, [r3, #0]
800fc80: f042 0208 orr.w r2, r2, #8
800fc84: 619a str r2, [r3, #24]
}
800fc86: bf00 nop
800fc88: 3770 adds r7, #112 @ 0x70
800fc8a: 46bd mov sp, r7
800fc8c: bd80 pop {r7, pc}
800fc8e: bf00 nop
800fc90: 58000c00 .word 0x58000c00
0800fc94 <UART_RxISR_8BIT_FIFOEN>:
* interruptions have been enabled by HAL_UART_Receive_IT()
* @param huart UART handle.
* @retval None
*/
static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
800fc94: b580 push {r7, lr}
800fc96: b0ac sub sp, #176 @ 0xb0
800fc98: af00 add r7, sp, #0
800fc9a: 6078 str r0, [r7, #4]
uint16_t uhMask = huart->Mask;
800fc9c: 687b ldr r3, [r7, #4]
800fc9e: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
800fca2: f8a7 30aa strh.w r3, [r7, #170] @ 0xaa
uint16_t uhdata;
uint16_t nb_rx_data;
uint16_t rxdatacount;
uint32_t isrflags = READ_REG(huart->Instance->ISR);
800fca6: 687b ldr r3, [r7, #4]
800fca8: 681b ldr r3, [r3, #0]
800fcaa: 69db ldr r3, [r3, #28]
800fcac: f8c7 30ac str.w r3, [r7, #172] @ 0xac
uint32_t cr1its = READ_REG(huart->Instance->CR1);
800fcb0: 687b ldr r3, [r7, #4]
800fcb2: 681b ldr r3, [r3, #0]
800fcb4: 681b ldr r3, [r3, #0]
800fcb6: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
uint32_t cr3its = READ_REG(huart->Instance->CR3);
800fcba: 687b ldr r3, [r7, #4]
800fcbc: 681b ldr r3, [r3, #0]
800fcbe: 689b ldr r3, [r3, #8]
800fcc0: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
/* Check that a Rx process is ongoing */
if (huart->RxState == HAL_UART_STATE_BUSY_RX)
800fcc4: 687b ldr r3, [r7, #4]
800fcc6: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
800fcca: 2b22 cmp r3, #34 @ 0x22
800fccc: f040 8180 bne.w 800ffd0 <UART_RxISR_8BIT_FIFOEN+0x33c>
{
nb_rx_data = huart->NbRxDataToProcess;
800fcd0: 687b ldr r3, [r7, #4]
800fcd2: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
800fcd6: f8a7 309e strh.w r3, [r7, #158] @ 0x9e
while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
800fcda: e123 b.n 800ff24 <UART_RxISR_8BIT_FIFOEN+0x290>
{
uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
800fcdc: 687b ldr r3, [r7, #4]
800fcde: 681b ldr r3, [r3, #0]
800fce0: 6a5b ldr r3, [r3, #36] @ 0x24
800fce2: f8a7 309c strh.w r3, [r7, #156] @ 0x9c
*huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
800fce6: f8b7 309c ldrh.w r3, [r7, #156] @ 0x9c
800fcea: b2d9 uxtb r1, r3
800fcec: f8b7 30aa ldrh.w r3, [r7, #170] @ 0xaa
800fcf0: b2da uxtb r2, r3
800fcf2: 687b ldr r3, [r7, #4]
800fcf4: 6d9b ldr r3, [r3, #88] @ 0x58
800fcf6: 400a ands r2, r1
800fcf8: b2d2 uxtb r2, r2
800fcfa: 701a strb r2, [r3, #0]
huart->pRxBuffPtr++;
800fcfc: 687b ldr r3, [r7, #4]
800fcfe: 6d9b ldr r3, [r3, #88] @ 0x58
800fd00: 1c5a adds r2, r3, #1
800fd02: 687b ldr r3, [r7, #4]
800fd04: 659a str r2, [r3, #88] @ 0x58
huart->RxXferCount--;
800fd06: 687b ldr r3, [r7, #4]
800fd08: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800fd0c: b29b uxth r3, r3
800fd0e: 3b01 subs r3, #1
800fd10: b29a uxth r2, r3
800fd12: 687b ldr r3, [r7, #4]
800fd14: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
isrflags = READ_REG(huart->Instance->ISR);
800fd18: 687b ldr r3, [r7, #4]
800fd1a: 681b ldr r3, [r3, #0]
800fd1c: 69db ldr r3, [r3, #28]
800fd1e: f8c7 30ac str.w r3, [r7, #172] @ 0xac
/* If some non blocking errors occurred */
if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
800fd22: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800fd26: f003 0307 and.w r3, r3, #7
800fd2a: 2b00 cmp r3, #0
800fd2c: d053 beq.n 800fdd6 <UART_RxISR_8BIT_FIFOEN+0x142>
{
/* UART parity error interrupt occurred -------------------------------------*/
if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
800fd2e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800fd32: f003 0301 and.w r3, r3, #1
800fd36: 2b00 cmp r3, #0
800fd38: d011 beq.n 800fd5e <UART_RxISR_8BIT_FIFOEN+0xca>
800fd3a: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800fd3e: f403 7380 and.w r3, r3, #256 @ 0x100
800fd42: 2b00 cmp r3, #0
800fd44: d00b beq.n 800fd5e <UART_RxISR_8BIT_FIFOEN+0xca>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
800fd46: 687b ldr r3, [r7, #4]
800fd48: 681b ldr r3, [r3, #0]
800fd4a: 2201 movs r2, #1
800fd4c: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_PE;
800fd4e: 687b ldr r3, [r7, #4]
800fd50: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800fd54: f043 0201 orr.w r2, r3, #1
800fd58: 687b ldr r3, [r7, #4]
800fd5a: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* UART frame error interrupt occurred --------------------------------------*/
if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
800fd5e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800fd62: f003 0302 and.w r3, r3, #2
800fd66: 2b00 cmp r3, #0
800fd68: d011 beq.n 800fd8e <UART_RxISR_8BIT_FIFOEN+0xfa>
800fd6a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800fd6e: f003 0301 and.w r3, r3, #1
800fd72: 2b00 cmp r3, #0
800fd74: d00b beq.n 800fd8e <UART_RxISR_8BIT_FIFOEN+0xfa>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
800fd76: 687b ldr r3, [r7, #4]
800fd78: 681b ldr r3, [r3, #0]
800fd7a: 2202 movs r2, #2
800fd7c: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_FE;
800fd7e: 687b ldr r3, [r7, #4]
800fd80: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800fd84: f043 0204 orr.w r2, r3, #4
800fd88: 687b ldr r3, [r7, #4]
800fd8a: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* UART noise error interrupt occurred --------------------------------------*/
if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
800fd8e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800fd92: f003 0304 and.w r3, r3, #4
800fd96: 2b00 cmp r3, #0
800fd98: d011 beq.n 800fdbe <UART_RxISR_8BIT_FIFOEN+0x12a>
800fd9a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800fd9e: f003 0301 and.w r3, r3, #1
800fda2: 2b00 cmp r3, #0
800fda4: d00b beq.n 800fdbe <UART_RxISR_8BIT_FIFOEN+0x12a>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
800fda6: 687b ldr r3, [r7, #4]
800fda8: 681b ldr r3, [r3, #0]
800fdaa: 2204 movs r2, #4
800fdac: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_NE;
800fdae: 687b ldr r3, [r7, #4]
800fdb0: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800fdb4: f043 0202 orr.w r2, r3, #2
800fdb8: 687b ldr r3, [r7, #4]
800fdba: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* Call UART Error Call back function if need be ----------------------------*/
if (huart->ErrorCode != HAL_UART_ERROR_NONE)
800fdbe: 687b ldr r3, [r7, #4]
800fdc0: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
800fdc4: 2b00 cmp r3, #0
800fdc6: d006 beq.n 800fdd6 <UART_RxISR_8BIT_FIFOEN+0x142>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
800fdc8: 6878 ldr r0, [r7, #4]
800fdca: f7fe fb13 bl 800e3f4 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
huart->ErrorCode = HAL_UART_ERROR_NONE;
800fdce: 687b ldr r3, [r7, #4]
800fdd0: 2200 movs r2, #0
800fdd2: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
}
if (huart->RxXferCount == 0U)
800fdd6: 687b ldr r3, [r7, #4]
800fdd8: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800fddc: b29b uxth r3, r3
800fdde: 2b00 cmp r3, #0
800fde0: f040 80a0 bne.w 800ff24 <UART_RxISR_8BIT_FIFOEN+0x290>
{
/* Disable the UART Parity Error Interrupt and RXFT interrupt*/
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
800fde4: 687b ldr r3, [r7, #4]
800fde6: 681b ldr r3, [r3, #0]
800fde8: 673b str r3, [r7, #112] @ 0x70
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fdea: 6f3b ldr r3, [r7, #112] @ 0x70
800fdec: e853 3f00 ldrex r3, [r3]
800fdf0: 66fb str r3, [r7, #108] @ 0x6c
return(result);
800fdf2: 6efb ldr r3, [r7, #108] @ 0x6c
800fdf4: f423 7380 bic.w r3, r3, #256 @ 0x100
800fdf8: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800fdfc: 687b ldr r3, [r7, #4]
800fdfe: 681b ldr r3, [r3, #0]
800fe00: 461a mov r2, r3
800fe02: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800fe06: 67fb str r3, [r7, #124] @ 0x7c
800fe08: 67ba str r2, [r7, #120] @ 0x78
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fe0a: 6fb9 ldr r1, [r7, #120] @ 0x78
800fe0c: 6ffa ldr r2, [r7, #124] @ 0x7c
800fe0e: e841 2300 strex r3, r2, [r1]
800fe12: 677b str r3, [r7, #116] @ 0x74
return(result);
800fe14: 6f7b ldr r3, [r7, #116] @ 0x74
800fe16: 2b00 cmp r3, #0
800fe18: d1e4 bne.n 800fde4 <UART_RxISR_8BIT_FIFOEN+0x150>
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
and RX FIFO Threshold interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
800fe1a: 687b ldr r3, [r7, #4]
800fe1c: 681b ldr r3, [r3, #0]
800fe1e: 3308 adds r3, #8
800fe20: 65fb str r3, [r7, #92] @ 0x5c
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fe22: 6dfb ldr r3, [r7, #92] @ 0x5c
800fe24: e853 3f00 ldrex r3, [r3]
800fe28: 65bb str r3, [r7, #88] @ 0x58
return(result);
800fe2a: 6dba ldr r2, [r7, #88] @ 0x58
800fe2c: 4b6e ldr r3, [pc, #440] @ (800ffe8 <UART_RxISR_8BIT_FIFOEN+0x354>)
800fe2e: 4013 ands r3, r2
800fe30: f8c7 3094 str.w r3, [r7, #148] @ 0x94
800fe34: 687b ldr r3, [r7, #4]
800fe36: 681b ldr r3, [r3, #0]
800fe38: 3308 adds r3, #8
800fe3a: f8d7 2094 ldr.w r2, [r7, #148] @ 0x94
800fe3e: 66ba str r2, [r7, #104] @ 0x68
800fe40: 667b str r3, [r7, #100] @ 0x64
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fe42: 6e79 ldr r1, [r7, #100] @ 0x64
800fe44: 6eba ldr r2, [r7, #104] @ 0x68
800fe46: e841 2300 strex r3, r2, [r1]
800fe4a: 663b str r3, [r7, #96] @ 0x60
return(result);
800fe4c: 6e3b ldr r3, [r7, #96] @ 0x60
800fe4e: 2b00 cmp r3, #0
800fe50: d1e3 bne.n 800fe1a <UART_RxISR_8BIT_FIFOEN+0x186>
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
800fe52: 687b ldr r3, [r7, #4]
800fe54: 2220 movs r2, #32
800fe56: f8c3 208c str.w r2, [r3, #140] @ 0x8c
/* Clear RxISR function pointer */
huart->RxISR = NULL;
800fe5a: 687b ldr r3, [r7, #4]
800fe5c: 2200 movs r2, #0
800fe5e: 675a str r2, [r3, #116] @ 0x74
/* Initialize type of RxEvent to Transfer Complete */
huart->RxEventType = HAL_UART_RXEVENT_TC;
800fe60: 687b ldr r3, [r7, #4]
800fe62: 2200 movs r2, #0
800fe64: 671a str r2, [r3, #112] @ 0x70
if (!(IS_LPUART_INSTANCE(huart->Instance)))
800fe66: 687b ldr r3, [r7, #4]
800fe68: 681b ldr r3, [r3, #0]
800fe6a: 4a60 ldr r2, [pc, #384] @ (800ffec <UART_RxISR_8BIT_FIFOEN+0x358>)
800fe6c: 4293 cmp r3, r2
800fe6e: d021 beq.n 800feb4 <UART_RxISR_8BIT_FIFOEN+0x220>
{
/* Check that USART RTOEN bit is set */
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
800fe70: 687b ldr r3, [r7, #4]
800fe72: 681b ldr r3, [r3, #0]
800fe74: 685b ldr r3, [r3, #4]
800fe76: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800fe7a: 2b00 cmp r3, #0
800fe7c: d01a beq.n 800feb4 <UART_RxISR_8BIT_FIFOEN+0x220>
{
/* Enable the UART Receiver Timeout Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
800fe7e: 687b ldr r3, [r7, #4]
800fe80: 681b ldr r3, [r3, #0]
800fe82: 64bb str r3, [r7, #72] @ 0x48
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fe84: 6cbb ldr r3, [r7, #72] @ 0x48
800fe86: e853 3f00 ldrex r3, [r3]
800fe8a: 647b str r3, [r7, #68] @ 0x44
return(result);
800fe8c: 6c7b ldr r3, [r7, #68] @ 0x44
800fe8e: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
800fe92: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800fe96: 687b ldr r3, [r7, #4]
800fe98: 681b ldr r3, [r3, #0]
800fe9a: 461a mov r2, r3
800fe9c: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800fea0: 657b str r3, [r7, #84] @ 0x54
800fea2: 653a str r2, [r7, #80] @ 0x50
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fea4: 6d39 ldr r1, [r7, #80] @ 0x50
800fea6: 6d7a ldr r2, [r7, #84] @ 0x54
800fea8: e841 2300 strex r3, r2, [r1]
800feac: 64fb str r3, [r7, #76] @ 0x4c
return(result);
800feae: 6cfb ldr r3, [r7, #76] @ 0x4c
800feb0: 2b00 cmp r3, #0
800feb2: d1e4 bne.n 800fe7e <UART_RxISR_8BIT_FIFOEN+0x1ea>
}
}
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
800feb4: 687b ldr r3, [r7, #4]
800feb6: 6edb ldr r3, [r3, #108] @ 0x6c
800feb8: 2b01 cmp r3, #1
800feba: d130 bne.n 800ff1e <UART_RxISR_8BIT_FIFOEN+0x28a>
{
/* Set reception type to Standard */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
800febc: 687b ldr r3, [r7, #4]
800febe: 2200 movs r2, #0
800fec0: 66da str r2, [r3, #108] @ 0x6c
/* Disable IDLE interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
800fec2: 687b ldr r3, [r7, #4]
800fec4: 681b ldr r3, [r3, #0]
800fec6: 637b str r3, [r7, #52] @ 0x34
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800fec8: 6b7b ldr r3, [r7, #52] @ 0x34
800feca: e853 3f00 ldrex r3, [r3]
800fece: 633b str r3, [r7, #48] @ 0x30
return(result);
800fed0: 6b3b ldr r3, [r7, #48] @ 0x30
800fed2: f023 0310 bic.w r3, r3, #16
800fed6: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800feda: 687b ldr r3, [r7, #4]
800fedc: 681b ldr r3, [r3, #0]
800fede: 461a mov r2, r3
800fee0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800fee4: 643b str r3, [r7, #64] @ 0x40
800fee6: 63fa str r2, [r7, #60] @ 0x3c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800fee8: 6bf9 ldr r1, [r7, #60] @ 0x3c
800feea: 6c3a ldr r2, [r7, #64] @ 0x40
800feec: e841 2300 strex r3, r2, [r1]
800fef0: 63bb str r3, [r7, #56] @ 0x38
return(result);
800fef2: 6bbb ldr r3, [r7, #56] @ 0x38
800fef4: 2b00 cmp r3, #0
800fef6: d1e4 bne.n 800fec2 <UART_RxISR_8BIT_FIFOEN+0x22e>
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
800fef8: 687b ldr r3, [r7, #4]
800fefa: 681b ldr r3, [r3, #0]
800fefc: 69db ldr r3, [r3, #28]
800fefe: f003 0310 and.w r3, r3, #16
800ff02: 2b10 cmp r3, #16
800ff04: d103 bne.n 800ff0e <UART_RxISR_8BIT_FIFOEN+0x27a>
{
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
800ff06: 687b ldr r3, [r7, #4]
800ff08: 681b ldr r3, [r3, #0]
800ff0a: 2210 movs r2, #16
800ff0c: 621a str r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
#else
/*Call legacy weak Rx Event callback*/
HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
800ff0e: 687b ldr r3, [r7, #4]
800ff10: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
800ff14: 4619 mov r1, r3
800ff16: 6878 ldr r0, [r7, #4]
800ff18: f7f4 fc8e bl 8004838 <HAL_UARTEx_RxEventCallback>
800ff1c: e002 b.n 800ff24 <UART_RxISR_8BIT_FIFOEN+0x290>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx complete callback*/
huart->RxCpltCallback(huart);
#else
/*Call legacy weak Rx complete callback*/
HAL_UART_RxCpltCallback(huart);
800ff1e: 6878 ldr r0, [r7, #4]
800ff20: f7f4 fc80 bl 8004824 <HAL_UART_RxCpltCallback>
while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
800ff24: f8b7 309e ldrh.w r3, [r7, #158] @ 0x9e
800ff28: 2b00 cmp r3, #0
800ff2a: d006 beq.n 800ff3a <UART_RxISR_8BIT_FIFOEN+0x2a6>
800ff2c: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800ff30: f003 0320 and.w r3, r3, #32
800ff34: 2b00 cmp r3, #0
800ff36: f47f aed1 bne.w 800fcdc <UART_RxISR_8BIT_FIFOEN+0x48>
/* When remaining number of bytes to receive is less than the RX FIFO
threshold, next incoming frames are processed as if FIFO mode was
disabled (i.e. one interrupt per received frame).
*/
rxdatacount = huart->RxXferCount;
800ff3a: 687b ldr r3, [r7, #4]
800ff3c: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
800ff40: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
800ff44: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800ff48: 2b00 cmp r3, #0
800ff4a: d049 beq.n 800ffe0 <UART_RxISR_8BIT_FIFOEN+0x34c>
800ff4c: 687b ldr r3, [r7, #4]
800ff4e: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
800ff52: f8b7 208a ldrh.w r2, [r7, #138] @ 0x8a
800ff56: 429a cmp r2, r3
800ff58: d242 bcs.n 800ffe0 <UART_RxISR_8BIT_FIFOEN+0x34c>
{
/* Disable the UART RXFT interrupt*/
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
800ff5a: 687b ldr r3, [r7, #4]
800ff5c: 681b ldr r3, [r3, #0]
800ff5e: 3308 adds r3, #8
800ff60: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800ff62: 6a3b ldr r3, [r7, #32]
800ff64: e853 3f00 ldrex r3, [r3]
800ff68: 61fb str r3, [r7, #28]
return(result);
800ff6a: 69fb ldr r3, [r7, #28]
800ff6c: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
800ff70: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800ff74: 687b ldr r3, [r7, #4]
800ff76: 681b ldr r3, [r3, #0]
800ff78: 3308 adds r3, #8
800ff7a: f8d7 2084 ldr.w r2, [r7, #132] @ 0x84
800ff7e: 62fa str r2, [r7, #44] @ 0x2c
800ff80: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800ff82: 6ab9 ldr r1, [r7, #40] @ 0x28
800ff84: 6afa ldr r2, [r7, #44] @ 0x2c
800ff86: e841 2300 strex r3, r2, [r1]
800ff8a: 627b str r3, [r7, #36] @ 0x24
return(result);
800ff8c: 6a7b ldr r3, [r7, #36] @ 0x24
800ff8e: 2b00 cmp r3, #0
800ff90: d1e3 bne.n 800ff5a <UART_RxISR_8BIT_FIFOEN+0x2c6>
/* Update the RxISR function pointer */
huart->RxISR = UART_RxISR_8BIT;
800ff92: 687b ldr r3, [r7, #4]
800ff94: 4a16 ldr r2, [pc, #88] @ (800fff0 <UART_RxISR_8BIT_FIFOEN+0x35c>)
800ff96: 675a str r2, [r3, #116] @ 0x74
/* Enable the UART Data Register Not Empty interrupt */
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
800ff98: 687b ldr r3, [r7, #4]
800ff9a: 681b ldr r3, [r3, #0]
800ff9c: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800ff9e: 68fb ldr r3, [r7, #12]
800ffa0: e853 3f00 ldrex r3, [r3]
800ffa4: 60bb str r3, [r7, #8]
return(result);
800ffa6: 68bb ldr r3, [r7, #8]
800ffa8: f043 0320 orr.w r3, r3, #32
800ffac: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800ffb0: 687b ldr r3, [r7, #4]
800ffb2: 681b ldr r3, [r3, #0]
800ffb4: 461a mov r2, r3
800ffb6: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800ffba: 61bb str r3, [r7, #24]
800ffbc: 617a str r2, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800ffbe: 6979 ldr r1, [r7, #20]
800ffc0: 69ba ldr r2, [r7, #24]
800ffc2: e841 2300 strex r3, r2, [r1]
800ffc6: 613b str r3, [r7, #16]
return(result);
800ffc8: 693b ldr r3, [r7, #16]
800ffca: 2b00 cmp r3, #0
800ffcc: d1e4 bne.n 800ff98 <UART_RxISR_8BIT_FIFOEN+0x304>
else
{
/* Clear RXNE interrupt flag */
__HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
}
}
800ffce: e007 b.n 800ffe0 <UART_RxISR_8BIT_FIFOEN+0x34c>
__HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
800ffd0: 687b ldr r3, [r7, #4]
800ffd2: 681b ldr r3, [r3, #0]
800ffd4: 699a ldr r2, [r3, #24]
800ffd6: 687b ldr r3, [r7, #4]
800ffd8: 681b ldr r3, [r3, #0]
800ffda: f042 0208 orr.w r2, r2, #8
800ffde: 619a str r2, [r3, #24]
}
800ffe0: bf00 nop
800ffe2: 37b0 adds r7, #176 @ 0xb0
800ffe4: 46bd mov sp, r7
800ffe6: bd80 pop {r7, pc}
800ffe8: effffffe .word 0xeffffffe
800ffec: 58000c00 .word 0x58000c00
800fff0: 0800f925 .word 0x0800f925
0800fff4 <UART_RxISR_16BIT_FIFOEN>:
* interruptions have been enabled by HAL_UART_Receive_IT()
* @param huart UART handle.
* @retval None
*/
static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
800fff4: b580 push {r7, lr}
800fff6: b0ae sub sp, #184 @ 0xb8
800fff8: af00 add r7, sp, #0
800fffa: 6078 str r0, [r7, #4]
uint16_t *tmp;
uint16_t uhMask = huart->Mask;
800fffc: 687b ldr r3, [r7, #4]
800fffe: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
8010002: f8a7 30b2 strh.w r3, [r7, #178] @ 0xb2
uint16_t uhdata;
uint16_t nb_rx_data;
uint16_t rxdatacount;
uint32_t isrflags = READ_REG(huart->Instance->ISR);
8010006: 687b ldr r3, [r7, #4]
8010008: 681b ldr r3, [r3, #0]
801000a: 69db ldr r3, [r3, #28]
801000c: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
uint32_t cr1its = READ_REG(huart->Instance->CR1);
8010010: 687b ldr r3, [r7, #4]
8010012: 681b ldr r3, [r3, #0]
8010014: 681b ldr r3, [r3, #0]
8010016: f8c7 30ac str.w r3, [r7, #172] @ 0xac
uint32_t cr3its = READ_REG(huart->Instance->CR3);
801001a: 687b ldr r3, [r7, #4]
801001c: 681b ldr r3, [r3, #0]
801001e: 689b ldr r3, [r3, #8]
8010020: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
/* Check that a Rx process is ongoing */
if (huart->RxState == HAL_UART_STATE_BUSY_RX)
8010024: 687b ldr r3, [r7, #4]
8010026: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
801002a: 2b22 cmp r3, #34 @ 0x22
801002c: f040 8184 bne.w 8010338 <UART_RxISR_16BIT_FIFOEN+0x344>
{
nb_rx_data = huart->NbRxDataToProcess;
8010030: 687b ldr r3, [r7, #4]
8010032: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
8010036: f8a7 30a6 strh.w r3, [r7, #166] @ 0xa6
while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
801003a: e127 b.n 801028c <UART_RxISR_16BIT_FIFOEN+0x298>
{
uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
801003c: 687b ldr r3, [r7, #4]
801003e: 681b ldr r3, [r3, #0]
8010040: 6a5b ldr r3, [r3, #36] @ 0x24
8010042: f8a7 30a4 strh.w r3, [r7, #164] @ 0xa4
tmp = (uint16_t *) huart->pRxBuffPtr ;
8010046: 687b ldr r3, [r7, #4]
8010048: 6d9b ldr r3, [r3, #88] @ 0x58
801004a: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
*tmp = (uint16_t)(uhdata & uhMask);
801004e: f8b7 20a4 ldrh.w r2, [r7, #164] @ 0xa4
8010052: f8b7 30b2 ldrh.w r3, [r7, #178] @ 0xb2
8010056: 4013 ands r3, r2
8010058: b29a uxth r2, r3
801005a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
801005e: 801a strh r2, [r3, #0]
huart->pRxBuffPtr += 2U;
8010060: 687b ldr r3, [r7, #4]
8010062: 6d9b ldr r3, [r3, #88] @ 0x58
8010064: 1c9a adds r2, r3, #2
8010066: 687b ldr r3, [r7, #4]
8010068: 659a str r2, [r3, #88] @ 0x58
huart->RxXferCount--;
801006a: 687b ldr r3, [r7, #4]
801006c: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
8010070: b29b uxth r3, r3
8010072: 3b01 subs r3, #1
8010074: b29a uxth r2, r3
8010076: 687b ldr r3, [r7, #4]
8010078: f8a3 205e strh.w r2, [r3, #94] @ 0x5e
isrflags = READ_REG(huart->Instance->ISR);
801007c: 687b ldr r3, [r7, #4]
801007e: 681b ldr r3, [r3, #0]
8010080: 69db ldr r3, [r3, #28]
8010082: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
/* If some non blocking errors occurred */
if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
8010086: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
801008a: f003 0307 and.w r3, r3, #7
801008e: 2b00 cmp r3, #0
8010090: d053 beq.n 801013a <UART_RxISR_16BIT_FIFOEN+0x146>
{
/* UART parity error interrupt occurred -------------------------------------*/
if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
8010092: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8010096: f003 0301 and.w r3, r3, #1
801009a: 2b00 cmp r3, #0
801009c: d011 beq.n 80100c2 <UART_RxISR_16BIT_FIFOEN+0xce>
801009e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
80100a2: f403 7380 and.w r3, r3, #256 @ 0x100
80100a6: 2b00 cmp r3, #0
80100a8: d00b beq.n 80100c2 <UART_RxISR_16BIT_FIFOEN+0xce>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
80100aa: 687b ldr r3, [r7, #4]
80100ac: 681b ldr r3, [r3, #0]
80100ae: 2201 movs r2, #1
80100b0: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_PE;
80100b2: 687b ldr r3, [r7, #4]
80100b4: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
80100b8: f043 0201 orr.w r2, r3, #1
80100bc: 687b ldr r3, [r7, #4]
80100be: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* UART frame error interrupt occurred --------------------------------------*/
if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
80100c2: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
80100c6: f003 0302 and.w r3, r3, #2
80100ca: 2b00 cmp r3, #0
80100cc: d011 beq.n 80100f2 <UART_RxISR_16BIT_FIFOEN+0xfe>
80100ce: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80100d2: f003 0301 and.w r3, r3, #1
80100d6: 2b00 cmp r3, #0
80100d8: d00b beq.n 80100f2 <UART_RxISR_16BIT_FIFOEN+0xfe>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
80100da: 687b ldr r3, [r7, #4]
80100dc: 681b ldr r3, [r3, #0]
80100de: 2202 movs r2, #2
80100e0: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_FE;
80100e2: 687b ldr r3, [r7, #4]
80100e4: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
80100e8: f043 0204 orr.w r2, r3, #4
80100ec: 687b ldr r3, [r7, #4]
80100ee: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* UART noise error interrupt occurred --------------------------------------*/
if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
80100f2: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
80100f6: f003 0304 and.w r3, r3, #4
80100fa: 2b00 cmp r3, #0
80100fc: d011 beq.n 8010122 <UART_RxISR_16BIT_FIFOEN+0x12e>
80100fe: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8010102: f003 0301 and.w r3, r3, #1
8010106: 2b00 cmp r3, #0
8010108: d00b beq.n 8010122 <UART_RxISR_16BIT_FIFOEN+0x12e>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
801010a: 687b ldr r3, [r7, #4]
801010c: 681b ldr r3, [r3, #0]
801010e: 2204 movs r2, #4
8010110: 621a str r2, [r3, #32]
huart->ErrorCode |= HAL_UART_ERROR_NE;
8010112: 687b ldr r3, [r7, #4]
8010114: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
8010118: f043 0202 orr.w r2, r3, #2
801011c: 687b ldr r3, [r7, #4]
801011e: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
/* Call UART Error Call back function if need be ----------------------------*/
if (huart->ErrorCode != HAL_UART_ERROR_NONE)
8010122: 687b ldr r3, [r7, #4]
8010124: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
8010128: 2b00 cmp r3, #0
801012a: d006 beq.n 801013a <UART_RxISR_16BIT_FIFOEN+0x146>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered error callback*/
huart->ErrorCallback(huart);
#else
/*Call legacy weak error callback*/
HAL_UART_ErrorCallback(huart);
801012c: 6878 ldr r0, [r7, #4]
801012e: f7fe f961 bl 800e3f4 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8010132: 687b ldr r3, [r7, #4]
8010134: 2200 movs r2, #0
8010136: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
}
if (huart->RxXferCount == 0U)
801013a: 687b ldr r3, [r7, #4]
801013c: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
8010140: b29b uxth r3, r3
8010142: 2b00 cmp r3, #0
8010144: f040 80a2 bne.w 801028c <UART_RxISR_16BIT_FIFOEN+0x298>
{
/* Disable the UART Parity Error Interrupt and RXFT interrupt*/
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
8010148: 687b ldr r3, [r7, #4]
801014a: 681b ldr r3, [r3, #0]
801014c: 677b str r3, [r7, #116] @ 0x74
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
801014e: 6f7b ldr r3, [r7, #116] @ 0x74
8010150: e853 3f00 ldrex r3, [r3]
8010154: 673b str r3, [r7, #112] @ 0x70
return(result);
8010156: 6f3b ldr r3, [r7, #112] @ 0x70
8010158: f423 7380 bic.w r3, r3, #256 @ 0x100
801015c: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8010160: 687b ldr r3, [r7, #4]
8010162: 681b ldr r3, [r3, #0]
8010164: 461a mov r2, r3
8010166: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
801016a: f8c7 3080 str.w r3, [r7, #128] @ 0x80
801016e: 67fa str r2, [r7, #124] @ 0x7c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8010170: 6ff9 ldr r1, [r7, #124] @ 0x7c
8010172: f8d7 2080 ldr.w r2, [r7, #128] @ 0x80
8010176: e841 2300 strex r3, r2, [r1]
801017a: 67bb str r3, [r7, #120] @ 0x78
return(result);
801017c: 6fbb ldr r3, [r7, #120] @ 0x78
801017e: 2b00 cmp r3, #0
8010180: d1e2 bne.n 8010148 <UART_RxISR_16BIT_FIFOEN+0x154>
/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
and RX FIFO Threshold interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
8010182: 687b ldr r3, [r7, #4]
8010184: 681b ldr r3, [r3, #0]
8010186: 3308 adds r3, #8
8010188: 663b str r3, [r7, #96] @ 0x60
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
801018a: 6e3b ldr r3, [r7, #96] @ 0x60
801018c: e853 3f00 ldrex r3, [r3]
8010190: 65fb str r3, [r7, #92] @ 0x5c
return(result);
8010192: 6dfa ldr r2, [r7, #92] @ 0x5c
8010194: 4b6e ldr r3, [pc, #440] @ (8010350 <UART_RxISR_16BIT_FIFOEN+0x35c>)
8010196: 4013 ands r3, r2
8010198: f8c7 3098 str.w r3, [r7, #152] @ 0x98
801019c: 687b ldr r3, [r7, #4]
801019e: 681b ldr r3, [r3, #0]
80101a0: 3308 adds r3, #8
80101a2: f8d7 2098 ldr.w r2, [r7, #152] @ 0x98
80101a6: 66fa str r2, [r7, #108] @ 0x6c
80101a8: 66bb str r3, [r7, #104] @ 0x68
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
80101aa: 6eb9 ldr r1, [r7, #104] @ 0x68
80101ac: 6efa ldr r2, [r7, #108] @ 0x6c
80101ae: e841 2300 strex r3, r2, [r1]
80101b2: 667b str r3, [r7, #100] @ 0x64
return(result);
80101b4: 6e7b ldr r3, [r7, #100] @ 0x64
80101b6: 2b00 cmp r3, #0
80101b8: d1e3 bne.n 8010182 <UART_RxISR_16BIT_FIFOEN+0x18e>
/* Rx process is completed, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
80101ba: 687b ldr r3, [r7, #4]
80101bc: 2220 movs r2, #32
80101be: f8c3 208c str.w r2, [r3, #140] @ 0x8c
/* Clear RxISR function pointer */
huart->RxISR = NULL;
80101c2: 687b ldr r3, [r7, #4]
80101c4: 2200 movs r2, #0
80101c6: 675a str r2, [r3, #116] @ 0x74
/* Initialize type of RxEvent to Transfer Complete */
huart->RxEventType = HAL_UART_RXEVENT_TC;
80101c8: 687b ldr r3, [r7, #4]
80101ca: 2200 movs r2, #0
80101cc: 671a str r2, [r3, #112] @ 0x70
if (!(IS_LPUART_INSTANCE(huart->Instance)))
80101ce: 687b ldr r3, [r7, #4]
80101d0: 681b ldr r3, [r3, #0]
80101d2: 4a60 ldr r2, [pc, #384] @ (8010354 <UART_RxISR_16BIT_FIFOEN+0x360>)
80101d4: 4293 cmp r3, r2
80101d6: d021 beq.n 801021c <UART_RxISR_16BIT_FIFOEN+0x228>
{
/* Check that USART RTOEN bit is set */
if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
80101d8: 687b ldr r3, [r7, #4]
80101da: 681b ldr r3, [r3, #0]
80101dc: 685b ldr r3, [r3, #4]
80101de: f403 0300 and.w r3, r3, #8388608 @ 0x800000
80101e2: 2b00 cmp r3, #0
80101e4: d01a beq.n 801021c <UART_RxISR_16BIT_FIFOEN+0x228>
{
/* Enable the UART Receiver Timeout Interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
80101e6: 687b ldr r3, [r7, #4]
80101e8: 681b ldr r3, [r3, #0]
80101ea: 64fb str r3, [r7, #76] @ 0x4c
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
80101ec: 6cfb ldr r3, [r7, #76] @ 0x4c
80101ee: e853 3f00 ldrex r3, [r3]
80101f2: 64bb str r3, [r7, #72] @ 0x48
return(result);
80101f4: 6cbb ldr r3, [r7, #72] @ 0x48
80101f6: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000
80101fa: f8c7 3094 str.w r3, [r7, #148] @ 0x94
80101fe: 687b ldr r3, [r7, #4]
8010200: 681b ldr r3, [r3, #0]
8010202: 461a mov r2, r3
8010204: f8d7 3094 ldr.w r3, [r7, #148] @ 0x94
8010208: 65bb str r3, [r7, #88] @ 0x58
801020a: 657a str r2, [r7, #84] @ 0x54
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
801020c: 6d79 ldr r1, [r7, #84] @ 0x54
801020e: 6dba ldr r2, [r7, #88] @ 0x58
8010210: e841 2300 strex r3, r2, [r1]
8010214: 653b str r3, [r7, #80] @ 0x50
return(result);
8010216: 6d3b ldr r3, [r7, #80] @ 0x50
8010218: 2b00 cmp r3, #0
801021a: d1e4 bne.n 80101e6 <UART_RxISR_16BIT_FIFOEN+0x1f2>
}
}
/* Check current reception Mode :
If Reception till IDLE event has been selected : */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
801021c: 687b ldr r3, [r7, #4]
801021e: 6edb ldr r3, [r3, #108] @ 0x6c
8010220: 2b01 cmp r3, #1
8010222: d130 bne.n 8010286 <UART_RxISR_16BIT_FIFOEN+0x292>
{
/* Set reception type to Standard */
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8010224: 687b ldr r3, [r7, #4]
8010226: 2200 movs r2, #0
8010228: 66da str r2, [r3, #108] @ 0x6c
/* Disable IDLE interrupt */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
801022a: 687b ldr r3, [r7, #4]
801022c: 681b ldr r3, [r3, #0]
801022e: 63bb str r3, [r7, #56] @ 0x38
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8010230: 6bbb ldr r3, [r7, #56] @ 0x38
8010232: e853 3f00 ldrex r3, [r3]
8010236: 637b str r3, [r7, #52] @ 0x34
return(result);
8010238: 6b7b ldr r3, [r7, #52] @ 0x34
801023a: f023 0310 bic.w r3, r3, #16
801023e: f8c7 3090 str.w r3, [r7, #144] @ 0x90
8010242: 687b ldr r3, [r7, #4]
8010244: 681b ldr r3, [r3, #0]
8010246: 461a mov r2, r3
8010248: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
801024c: 647b str r3, [r7, #68] @ 0x44
801024e: 643a str r2, [r7, #64] @ 0x40
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8010250: 6c39 ldr r1, [r7, #64] @ 0x40
8010252: 6c7a ldr r2, [r7, #68] @ 0x44
8010254: e841 2300 strex r3, r2, [r1]
8010258: 63fb str r3, [r7, #60] @ 0x3c
return(result);
801025a: 6bfb ldr r3, [r7, #60] @ 0x3c
801025c: 2b00 cmp r3, #0
801025e: d1e4 bne.n 801022a <UART_RxISR_16BIT_FIFOEN+0x236>
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
8010260: 687b ldr r3, [r7, #4]
8010262: 681b ldr r3, [r3, #0]
8010264: 69db ldr r3, [r3, #28]
8010266: f003 0310 and.w r3, r3, #16
801026a: 2b10 cmp r3, #16
801026c: d103 bne.n 8010276 <UART_RxISR_16BIT_FIFOEN+0x282>
{
/* Clear IDLE Flag */
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
801026e: 687b ldr r3, [r7, #4]
8010270: 681b ldr r3, [r3, #0]
8010272: 2210 movs r2, #16
8010274: 621a str r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx Event callback*/
huart->RxEventCallback(huart, huart->RxXferSize);
#else
/*Call legacy weak Rx Event callback*/
HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
8010276: 687b ldr r3, [r7, #4]
8010278: f8b3 305c ldrh.w r3, [r3, #92] @ 0x5c
801027c: 4619 mov r1, r3
801027e: 6878 ldr r0, [r7, #4]
8010280: f7f4 fada bl 8004838 <HAL_UARTEx_RxEventCallback>
8010284: e002 b.n 801028c <UART_RxISR_16BIT_FIFOEN+0x298>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/*Call registered Rx complete callback*/
huart->RxCpltCallback(huart);
#else
/*Call legacy weak Rx complete callback*/
HAL_UART_RxCpltCallback(huart);
8010286: 6878 ldr r0, [r7, #4]
8010288: f7f4 facc bl 8004824 <HAL_UART_RxCpltCallback>
while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
801028c: f8b7 30a6 ldrh.w r3, [r7, #166] @ 0xa6
8010290: 2b00 cmp r3, #0
8010292: d006 beq.n 80102a2 <UART_RxISR_16BIT_FIFOEN+0x2ae>
8010294: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8010298: f003 0320 and.w r3, r3, #32
801029c: 2b00 cmp r3, #0
801029e: f47f aecd bne.w 801003c <UART_RxISR_16BIT_FIFOEN+0x48>
/* When remaining number of bytes to receive is less than the RX FIFO
threshold, next incoming frames are processed as if FIFO mode was
disabled (i.e. one interrupt per received frame).
*/
rxdatacount = huart->RxXferCount;
80102a2: 687b ldr r3, [r7, #4]
80102a4: f8b3 305e ldrh.w r3, [r3, #94] @ 0x5e
80102a8: f8a7 308e strh.w r3, [r7, #142] @ 0x8e
if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
80102ac: f8b7 308e ldrh.w r3, [r7, #142] @ 0x8e
80102b0: 2b00 cmp r3, #0
80102b2: d049 beq.n 8010348 <UART_RxISR_16BIT_FIFOEN+0x354>
80102b4: 687b ldr r3, [r7, #4]
80102b6: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
80102ba: f8b7 208e ldrh.w r2, [r7, #142] @ 0x8e
80102be: 429a cmp r2, r3
80102c0: d242 bcs.n 8010348 <UART_RxISR_16BIT_FIFOEN+0x354>
{
/* Disable the UART RXFT interrupt*/
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
80102c2: 687b ldr r3, [r7, #4]
80102c4: 681b ldr r3, [r3, #0]
80102c6: 3308 adds r3, #8
80102c8: 627b str r3, [r7, #36] @ 0x24
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
80102ca: 6a7b ldr r3, [r7, #36] @ 0x24
80102cc: e853 3f00 ldrex r3, [r3]
80102d0: 623b str r3, [r7, #32]
return(result);
80102d2: 6a3b ldr r3, [r7, #32]
80102d4: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
80102d8: f8c7 3088 str.w r3, [r7, #136] @ 0x88
80102dc: 687b ldr r3, [r7, #4]
80102de: 681b ldr r3, [r3, #0]
80102e0: 3308 adds r3, #8
80102e2: f8d7 2088 ldr.w r2, [r7, #136] @ 0x88
80102e6: 633a str r2, [r7, #48] @ 0x30
80102e8: 62fb str r3, [r7, #44] @ 0x2c
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
80102ea: 6af9 ldr r1, [r7, #44] @ 0x2c
80102ec: 6b3a ldr r2, [r7, #48] @ 0x30
80102ee: e841 2300 strex r3, r2, [r1]
80102f2: 62bb str r3, [r7, #40] @ 0x28
return(result);
80102f4: 6abb ldr r3, [r7, #40] @ 0x28
80102f6: 2b00 cmp r3, #0
80102f8: d1e3 bne.n 80102c2 <UART_RxISR_16BIT_FIFOEN+0x2ce>
/* Update the RxISR function pointer */
huart->RxISR = UART_RxISR_16BIT;
80102fa: 687b ldr r3, [r7, #4]
80102fc: 4a16 ldr r2, [pc, #88] @ (8010358 <UART_RxISR_16BIT_FIFOEN+0x364>)
80102fe: 675a str r2, [r3, #116] @ 0x74
/* Enable the UART Data Register Not Empty interrupt */
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
8010300: 687b ldr r3, [r7, #4]
8010302: 681b ldr r3, [r3, #0]
8010304: 613b str r3, [r7, #16]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8010306: 693b ldr r3, [r7, #16]
8010308: e853 3f00 ldrex r3, [r3]
801030c: 60fb str r3, [r7, #12]
return(result);
801030e: 68fb ldr r3, [r7, #12]
8010310: f043 0320 orr.w r3, r3, #32
8010314: f8c7 3084 str.w r3, [r7, #132] @ 0x84
8010318: 687b ldr r3, [r7, #4]
801031a: 681b ldr r3, [r3, #0]
801031c: 461a mov r2, r3
801031e: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
8010322: 61fb str r3, [r7, #28]
8010324: 61ba str r2, [r7, #24]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8010326: 69b9 ldr r1, [r7, #24]
8010328: 69fa ldr r2, [r7, #28]
801032a: e841 2300 strex r3, r2, [r1]
801032e: 617b str r3, [r7, #20]
return(result);
8010330: 697b ldr r3, [r7, #20]
8010332: 2b00 cmp r3, #0
8010334: d1e4 bne.n 8010300 <UART_RxISR_16BIT_FIFOEN+0x30c>
else
{
/* Clear RXNE interrupt flag */
__HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
}
}
8010336: e007 b.n 8010348 <UART_RxISR_16BIT_FIFOEN+0x354>
__HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
8010338: 687b ldr r3, [r7, #4]
801033a: 681b ldr r3, [r3, #0]
801033c: 699a ldr r2, [r3, #24]
801033e: 687b ldr r3, [r7, #4]
8010340: 681b ldr r3, [r3, #0]
8010342: f042 0208 orr.w r2, r2, #8
8010346: 619a str r2, [r3, #24]
}
8010348: bf00 nop
801034a: 37b8 adds r7, #184 @ 0xb8
801034c: 46bd mov sp, r7
801034e: bd80 pop {r7, pc}
8010350: effffffe .word 0xeffffffe
8010354: 58000c00 .word 0x58000c00
8010358: 0800fadd .word 0x0800fadd
0801035c <HAL_UARTEx_WakeupCallback>:
* @brief UART wakeup from Stop mode callback.
* @param huart UART handle.
* @retval None
*/
__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
{
801035c: b480 push {r7}
801035e: b083 sub sp, #12
8010360: af00 add r7, sp, #0
8010362: 6078 str r0, [r7, #4]
UNUSED(huart);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_UARTEx_WakeupCallback can be implemented in the user file.
*/
}
8010364: bf00 nop
8010366: 370c adds r7, #12
8010368: 46bd mov sp, r7
801036a: f85d 7b04 ldr.w r7, [sp], #4
801036e: 4770 bx lr
08010370 <HAL_UARTEx_RxFifoFullCallback>:
* @brief UART RX Fifo full callback.
* @param huart UART handle.
* @retval None
*/
__weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
{
8010370: b480 push {r7}
8010372: b083 sub sp, #12
8010374: af00 add r7, sp, #0
8010376: 6078 str r0, [r7, #4]
UNUSED(huart);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file.
*/
}
8010378: bf00 nop
801037a: 370c adds r7, #12
801037c: 46bd mov sp, r7
801037e: f85d 7b04 ldr.w r7, [sp], #4
8010382: 4770 bx lr
08010384 <HAL_UARTEx_TxFifoEmptyCallback>:
* @brief UART TX Fifo empty callback.
* @param huart UART handle.
* @retval None
*/
__weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
{
8010384: b480 push {r7}
8010386: b083 sub sp, #12
8010388: af00 add r7, sp, #0
801038a: 6078 str r0, [r7, #4]
UNUSED(huart);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file.
*/
}
801038c: bf00 nop
801038e: 370c adds r7, #12
8010390: 46bd mov sp, r7
8010392: f85d 7b04 ldr.w r7, [sp], #4
8010396: 4770 bx lr
08010398 <HAL_UARTEx_DisableFifoMode>:
* @brief Disable the FIFO mode.
* @param huart UART handle.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
{
8010398: b480 push {r7}
801039a: b085 sub sp, #20
801039c: af00 add r7, sp, #0
801039e: 6078 str r0, [r7, #4]
/* Check parameters */
assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
/* Process Locked */
__HAL_LOCK(huart);
80103a0: 687b ldr r3, [r7, #4]
80103a2: f893 3084 ldrb.w r3, [r3, #132] @ 0x84
80103a6: 2b01 cmp r3, #1
80103a8: d101 bne.n 80103ae <HAL_UARTEx_DisableFifoMode+0x16>
80103aa: 2302 movs r3, #2
80103ac: e027 b.n 80103fe <HAL_UARTEx_DisableFifoMode+0x66>
80103ae: 687b ldr r3, [r7, #4]
80103b0: 2201 movs r2, #1
80103b2: f883 2084 strb.w r2, [r3, #132] @ 0x84
huart->gState = HAL_UART_STATE_BUSY;
80103b6: 687b ldr r3, [r7, #4]
80103b8: 2224 movs r2, #36 @ 0x24
80103ba: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Save actual UART configuration */
tmpcr1 = READ_REG(huart->Instance->CR1);
80103be: 687b ldr r3, [r7, #4]
80103c0: 681b ldr r3, [r3, #0]
80103c2: 681b ldr r3, [r3, #0]
80103c4: 60fb str r3, [r7, #12]
/* Disable UART */
__HAL_UART_DISABLE(huart);
80103c6: 687b ldr r3, [r7, #4]
80103c8: 681b ldr r3, [r3, #0]
80103ca: 681a ldr r2, [r3, #0]
80103cc: 687b ldr r3, [r7, #4]
80103ce: 681b ldr r3, [r3, #0]
80103d0: f022 0201 bic.w r2, r2, #1
80103d4: 601a str r2, [r3, #0]
/* Enable FIFO mode */
CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN);
80103d6: 68fb ldr r3, [r7, #12]
80103d8: f023 5300 bic.w r3, r3, #536870912 @ 0x20000000
80103dc: 60fb str r3, [r7, #12]
huart->FifoMode = UART_FIFOMODE_DISABLE;
80103de: 687b ldr r3, [r7, #4]
80103e0: 2200 movs r2, #0
80103e2: 665a str r2, [r3, #100] @ 0x64
/* Restore UART configuration */
WRITE_REG(huart->Instance->CR1, tmpcr1);
80103e4: 687b ldr r3, [r7, #4]
80103e6: 681b ldr r3, [r3, #0]
80103e8: 68fa ldr r2, [r7, #12]
80103ea: 601a str r2, [r3, #0]
huart->gState = HAL_UART_STATE_READY;
80103ec: 687b ldr r3, [r7, #4]
80103ee: 2220 movs r2, #32
80103f0: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Process Unlocked */
__HAL_UNLOCK(huart);
80103f4: 687b ldr r3, [r7, #4]
80103f6: 2200 movs r2, #0
80103f8: f883 2084 strb.w r2, [r3, #132] @ 0x84
return HAL_OK;
80103fc: 2300 movs r3, #0
}
80103fe: 4618 mov r0, r3
8010400: 3714 adds r7, #20
8010402: 46bd mov sp, r7
8010404: f85d 7b04 ldr.w r7, [sp], #4
8010408: 4770 bx lr
0801040a <HAL_UARTEx_SetTxFifoThreshold>:
* @arg @ref UART_TXFIFO_THRESHOLD_7_8
* @arg @ref UART_TXFIFO_THRESHOLD_8_8
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
801040a: b580 push {r7, lr}
801040c: b084 sub sp, #16
801040e: af00 add r7, sp, #0
8010410: 6078 str r0, [r7, #4]
8010412: 6039 str r1, [r7, #0]
/* Check parameters */
assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold));
/* Process Locked */
__HAL_LOCK(huart);
8010414: 687b ldr r3, [r7, #4]
8010416: f893 3084 ldrb.w r3, [r3, #132] @ 0x84
801041a: 2b01 cmp r3, #1
801041c: d101 bne.n 8010422 <HAL_UARTEx_SetTxFifoThreshold+0x18>
801041e: 2302 movs r3, #2
8010420: e02d b.n 801047e <HAL_UARTEx_SetTxFifoThreshold+0x74>
8010422: 687b ldr r3, [r7, #4]
8010424: 2201 movs r2, #1
8010426: f883 2084 strb.w r2, [r3, #132] @ 0x84
huart->gState = HAL_UART_STATE_BUSY;
801042a: 687b ldr r3, [r7, #4]
801042c: 2224 movs r2, #36 @ 0x24
801042e: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Save actual UART configuration */
tmpcr1 = READ_REG(huart->Instance->CR1);
8010432: 687b ldr r3, [r7, #4]
8010434: 681b ldr r3, [r3, #0]
8010436: 681b ldr r3, [r3, #0]
8010438: 60fb str r3, [r7, #12]
/* Disable UART */
__HAL_UART_DISABLE(huart);
801043a: 687b ldr r3, [r7, #4]
801043c: 681b ldr r3, [r3, #0]
801043e: 681a ldr r2, [r3, #0]
8010440: 687b ldr r3, [r7, #4]
8010442: 681b ldr r3, [r3, #0]
8010444: f022 0201 bic.w r2, r2, #1
8010448: 601a str r2, [r3, #0]
/* Update TX threshold configuration */
MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold);
801044a: 687b ldr r3, [r7, #4]
801044c: 681b ldr r3, [r3, #0]
801044e: 689b ldr r3, [r3, #8]
8010450: f023 4160 bic.w r1, r3, #3758096384 @ 0xe0000000
8010454: 687b ldr r3, [r7, #4]
8010456: 681b ldr r3, [r3, #0]
8010458: 683a ldr r2, [r7, #0]
801045a: 430a orrs r2, r1
801045c: 609a str r2, [r3, #8]
/* Determine the number of data to process during RX/TX ISR execution */
UARTEx_SetNbDataToProcess(huart);
801045e: 6878 ldr r0, [r7, #4]
8010460: f000 f8a0 bl 80105a4 <UARTEx_SetNbDataToProcess>
/* Restore UART configuration */
WRITE_REG(huart->Instance->CR1, tmpcr1);
8010464: 687b ldr r3, [r7, #4]
8010466: 681b ldr r3, [r3, #0]
8010468: 68fa ldr r2, [r7, #12]
801046a: 601a str r2, [r3, #0]
huart->gState = HAL_UART_STATE_READY;
801046c: 687b ldr r3, [r7, #4]
801046e: 2220 movs r2, #32
8010470: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Process Unlocked */
__HAL_UNLOCK(huart);
8010474: 687b ldr r3, [r7, #4]
8010476: 2200 movs r2, #0
8010478: f883 2084 strb.w r2, [r3, #132] @ 0x84
return HAL_OK;
801047c: 2300 movs r3, #0
}
801047e: 4618 mov r0, r3
8010480: 3710 adds r7, #16
8010482: 46bd mov sp, r7
8010484: bd80 pop {r7, pc}
08010486 <HAL_UARTEx_SetRxFifoThreshold>:
* @arg @ref UART_RXFIFO_THRESHOLD_7_8
* @arg @ref UART_RXFIFO_THRESHOLD_8_8
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
8010486: b580 push {r7, lr}
8010488: b084 sub sp, #16
801048a: af00 add r7, sp, #0
801048c: 6078 str r0, [r7, #4]
801048e: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold));
/* Process Locked */
__HAL_LOCK(huart);
8010490: 687b ldr r3, [r7, #4]
8010492: f893 3084 ldrb.w r3, [r3, #132] @ 0x84
8010496: 2b01 cmp r3, #1
8010498: d101 bne.n 801049e <HAL_UARTEx_SetRxFifoThreshold+0x18>
801049a: 2302 movs r3, #2
801049c: e02d b.n 80104fa <HAL_UARTEx_SetRxFifoThreshold+0x74>
801049e: 687b ldr r3, [r7, #4]
80104a0: 2201 movs r2, #1
80104a2: f883 2084 strb.w r2, [r3, #132] @ 0x84
huart->gState = HAL_UART_STATE_BUSY;
80104a6: 687b ldr r3, [r7, #4]
80104a8: 2224 movs r2, #36 @ 0x24
80104aa: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Save actual UART configuration */
tmpcr1 = READ_REG(huart->Instance->CR1);
80104ae: 687b ldr r3, [r7, #4]
80104b0: 681b ldr r3, [r3, #0]
80104b2: 681b ldr r3, [r3, #0]
80104b4: 60fb str r3, [r7, #12]
/* Disable UART */
__HAL_UART_DISABLE(huart);
80104b6: 687b ldr r3, [r7, #4]
80104b8: 681b ldr r3, [r3, #0]
80104ba: 681a ldr r2, [r3, #0]
80104bc: 687b ldr r3, [r7, #4]
80104be: 681b ldr r3, [r3, #0]
80104c0: f022 0201 bic.w r2, r2, #1
80104c4: 601a str r2, [r3, #0]
/* Update RX threshold configuration */
MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold);
80104c6: 687b ldr r3, [r7, #4]
80104c8: 681b ldr r3, [r3, #0]
80104ca: 689b ldr r3, [r3, #8]
80104cc: f023 6160 bic.w r1, r3, #234881024 @ 0xe000000
80104d0: 687b ldr r3, [r7, #4]
80104d2: 681b ldr r3, [r3, #0]
80104d4: 683a ldr r2, [r7, #0]
80104d6: 430a orrs r2, r1
80104d8: 609a str r2, [r3, #8]
/* Determine the number of data to process during RX/TX ISR execution */
UARTEx_SetNbDataToProcess(huart);
80104da: 6878 ldr r0, [r7, #4]
80104dc: f000 f862 bl 80105a4 <UARTEx_SetNbDataToProcess>
/* Restore UART configuration */
WRITE_REG(huart->Instance->CR1, tmpcr1);
80104e0: 687b ldr r3, [r7, #4]
80104e2: 681b ldr r3, [r3, #0]
80104e4: 68fa ldr r2, [r7, #12]
80104e6: 601a str r2, [r3, #0]
huart->gState = HAL_UART_STATE_READY;
80104e8: 687b ldr r3, [r7, #4]
80104ea: 2220 movs r2, #32
80104ec: f8c3 2088 str.w r2, [r3, #136] @ 0x88
/* Process Unlocked */
__HAL_UNLOCK(huart);
80104f0: 687b ldr r3, [r7, #4]
80104f2: 2200 movs r2, #0
80104f4: f883 2084 strb.w r2, [r3, #132] @ 0x84
return HAL_OK;
80104f8: 2300 movs r3, #0
}
80104fa: 4618 mov r0, r3
80104fc: 3710 adds r7, #16
80104fe: 46bd mov sp, r7
8010500: bd80 pop {r7, pc}
08010502 <HAL_UARTEx_ReceiveToIdle_IT>:
* @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
* @param Size Amount of data elements (uint8_t or uint16_t) to be received.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
8010502: b580 push {r7, lr}
8010504: b08c sub sp, #48 @ 0x30
8010506: af00 add r7, sp, #0
8010508: 60f8 str r0, [r7, #12]
801050a: 60b9 str r1, [r7, #8]
801050c: 4613 mov r3, r2
801050e: 80fb strh r3, [r7, #6]
HAL_StatusTypeDef status = HAL_OK;
8010510: 2300 movs r3, #0
8010512: f887 302f strb.w r3, [r7, #47] @ 0x2f
/* Check that a Rx process is not already ongoing */
if (huart->RxState == HAL_UART_STATE_READY)
8010516: 68fb ldr r3, [r7, #12]
8010518: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
801051c: 2b20 cmp r3, #32
801051e: d13b bne.n 8010598 <HAL_UARTEx_ReceiveToIdle_IT+0x96>
{
if ((pData == NULL) || (Size == 0U))
8010520: 68bb ldr r3, [r7, #8]
8010522: 2b00 cmp r3, #0
8010524: d002 beq.n 801052c <HAL_UARTEx_ReceiveToIdle_IT+0x2a>
8010526: 88fb ldrh r3, [r7, #6]
8010528: 2b00 cmp r3, #0
801052a: d101 bne.n 8010530 <HAL_UARTEx_ReceiveToIdle_IT+0x2e>
{
return HAL_ERROR;
801052c: 2301 movs r3, #1
801052e: e034 b.n 801059a <HAL_UARTEx_ReceiveToIdle_IT+0x98>
}
/* Set Reception type to reception till IDLE Event*/
huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
8010530: 68fb ldr r3, [r7, #12]
8010532: 2201 movs r2, #1
8010534: 66da str r2, [r3, #108] @ 0x6c
huart->RxEventType = HAL_UART_RXEVENT_TC;
8010536: 68fb ldr r3, [r7, #12]
8010538: 2200 movs r2, #0
801053a: 671a str r2, [r3, #112] @ 0x70
(void)UART_Start_Receive_IT(huart, pData, Size);
801053c: 88fb ldrh r3, [r7, #6]
801053e: 461a mov r2, r3
8010540: 68b9 ldr r1, [r7, #8]
8010542: 68f8 ldr r0, [r7, #12]
8010544: f7fe fe82 bl 800f24c <UART_Start_Receive_IT>
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
8010548: 68fb ldr r3, [r7, #12]
801054a: 6edb ldr r3, [r3, #108] @ 0x6c
801054c: 2b01 cmp r3, #1
801054e: d11d bne.n 801058c <HAL_UARTEx_ReceiveToIdle_IT+0x8a>
{
__HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
8010550: 68fb ldr r3, [r7, #12]
8010552: 681b ldr r3, [r3, #0]
8010554: 2210 movs r2, #16
8010556: 621a str r2, [r3, #32]
ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
8010558: 68fb ldr r3, [r7, #12]
801055a: 681b ldr r3, [r3, #0]
801055c: 61bb str r3, [r7, #24]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
801055e: 69bb ldr r3, [r7, #24]
8010560: e853 3f00 ldrex r3, [r3]
8010564: 617b str r3, [r7, #20]
return(result);
8010566: 697b ldr r3, [r7, #20]
8010568: f043 0310 orr.w r3, r3, #16
801056c: 62bb str r3, [r7, #40] @ 0x28
801056e: 68fb ldr r3, [r7, #12]
8010570: 681b ldr r3, [r3, #0]
8010572: 461a mov r2, r3
8010574: 6abb ldr r3, [r7, #40] @ 0x28
8010576: 627b str r3, [r7, #36] @ 0x24
8010578: 623a str r2, [r7, #32]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
801057a: 6a39 ldr r1, [r7, #32]
801057c: 6a7a ldr r2, [r7, #36] @ 0x24
801057e: e841 2300 strex r3, r2, [r1]
8010582: 61fb str r3, [r7, #28]
return(result);
8010584: 69fb ldr r3, [r7, #28]
8010586: 2b00 cmp r3, #0
8010588: d1e6 bne.n 8010558 <HAL_UARTEx_ReceiveToIdle_IT+0x56>
801058a: e002 b.n 8010592 <HAL_UARTEx_ReceiveToIdle_IT+0x90>
{
/* In case of errors already pending when reception is started,
Interrupts may have already been raised and lead to reception abortion.
(Overrun error for instance).
In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
status = HAL_ERROR;
801058c: 2301 movs r3, #1
801058e: f887 302f strb.w r3, [r7, #47] @ 0x2f
}
return status;
8010592: f897 302f ldrb.w r3, [r7, #47] @ 0x2f
8010596: e000 b.n 801059a <HAL_UARTEx_ReceiveToIdle_IT+0x98>
}
else
{
return HAL_BUSY;
8010598: 2302 movs r3, #2
}
}
801059a: 4618 mov r0, r3
801059c: 3730 adds r7, #48 @ 0x30
801059e: 46bd mov sp, r7
80105a0: bd80 pop {r7, pc}
...
080105a4 <UARTEx_SetNbDataToProcess>:
* the UART configuration registers.
* @param huart UART handle.
* @retval None
*/
static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart)
{
80105a4: b480 push {r7}
80105a6: b085 sub sp, #20
80105a8: af00 add r7, sp, #0
80105aa: 6078 str r0, [r7, #4]
uint8_t rx_fifo_threshold;
uint8_t tx_fifo_threshold;
static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U};
static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U};
if (huart->FifoMode == UART_FIFOMODE_DISABLE)
80105ac: 687b ldr r3, [r7, #4]
80105ae: 6e5b ldr r3, [r3, #100] @ 0x64
80105b0: 2b00 cmp r3, #0
80105b2: d108 bne.n 80105c6 <UARTEx_SetNbDataToProcess+0x22>
{
huart->NbTxDataToProcess = 1U;
80105b4: 687b ldr r3, [r7, #4]
80105b6: 2201 movs r2, #1
80105b8: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
huart->NbRxDataToProcess = 1U;
80105bc: 687b ldr r3, [r7, #4]
80105be: 2201 movs r2, #1
80105c0: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
(uint16_t)denominator[tx_fifo_threshold];
huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
(uint16_t)denominator[rx_fifo_threshold];
}
}
80105c4: e031 b.n 801062a <UARTEx_SetNbDataToProcess+0x86>
rx_fifo_depth = RX_FIFO_DEPTH;
80105c6: 2310 movs r3, #16
80105c8: 73fb strb r3, [r7, #15]
tx_fifo_depth = TX_FIFO_DEPTH;
80105ca: 2310 movs r3, #16
80105cc: 73bb strb r3, [r7, #14]
rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
80105ce: 687b ldr r3, [r7, #4]
80105d0: 681b ldr r3, [r3, #0]
80105d2: 689b ldr r3, [r3, #8]
80105d4: 0e5b lsrs r3, r3, #25
80105d6: b2db uxtb r3, r3
80105d8: f003 0307 and.w r3, r3, #7
80105dc: 737b strb r3, [r7, #13]
tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
80105de: 687b ldr r3, [r7, #4]
80105e0: 681b ldr r3, [r3, #0]
80105e2: 689b ldr r3, [r3, #8]
80105e4: 0f5b lsrs r3, r3, #29
80105e6: b2db uxtb r3, r3
80105e8: f003 0307 and.w r3, r3, #7
80105ec: 733b strb r3, [r7, #12]
huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
80105ee: 7bbb ldrb r3, [r7, #14]
80105f0: 7b3a ldrb r2, [r7, #12]
80105f2: 4911 ldr r1, [pc, #68] @ (8010638 <UARTEx_SetNbDataToProcess+0x94>)
80105f4: 5c8a ldrb r2, [r1, r2]
80105f6: fb02 f303 mul.w r3, r2, r3
(uint16_t)denominator[tx_fifo_threshold];
80105fa: 7b3a ldrb r2, [r7, #12]
80105fc: 490f ldr r1, [pc, #60] @ (801063c <UARTEx_SetNbDataToProcess+0x98>)
80105fe: 5c8a ldrb r2, [r1, r2]
huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
8010600: fb93 f3f2 sdiv r3, r3, r2
8010604: b29a uxth r2, r3
8010606: 687b ldr r3, [r7, #4]
8010608: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
801060c: 7bfb ldrb r3, [r7, #15]
801060e: 7b7a ldrb r2, [r7, #13]
8010610: 4909 ldr r1, [pc, #36] @ (8010638 <UARTEx_SetNbDataToProcess+0x94>)
8010612: 5c8a ldrb r2, [r1, r2]
8010614: fb02 f303 mul.w r3, r2, r3
(uint16_t)denominator[rx_fifo_threshold];
8010618: 7b7a ldrb r2, [r7, #13]
801061a: 4908 ldr r1, [pc, #32] @ (801063c <UARTEx_SetNbDataToProcess+0x98>)
801061c: 5c8a ldrb r2, [r1, r2]
huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
801061e: fb93 f3f2 sdiv r3, r3, r2
8010622: b29a uxth r2, r3
8010624: 687b ldr r3, [r7, #4]
8010626: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
}
801062a: bf00 nop
801062c: 3714 adds r7, #20
801062e: 46bd mov sp, r7
8010630: f85d 7b04 ldr.w r7, [sp], #4
8010634: 4770 bx lr
8010636: bf00 nop
8010638: 08031d0c .word 0x08031d0c
801063c: 08031d14 .word 0x08031d14
08010640 <tcpip_init_wrap>:
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */
/* USER CODE BEGIN 2 */
/* ETH_CODE: workaround to call LOCK_TCPIP_CORE after tcpip_init in MX_LWIP_Init
* This is to keep the code after MX code re-generation */
static inline void tcpip_init_wrap(tcpip_init_done_fn tcpip_init_done, void *arg){
8010640: b580 push {r7, lr}
8010642: b082 sub sp, #8
8010644: af00 add r7, sp, #0
8010646: 6078 str r0, [r7, #4]
8010648: 6039 str r1, [r7, #0]
tcpip_init(tcpip_init_done, arg);
801064a: 6839 ldr r1, [r7, #0]
801064c: 6878 ldr r0, [r7, #4]
801064e: f009 fa49 bl 8019ae4 <tcpip_init>
LOCK_TCPIP_CORE();
8010652: f000 fda1 bl 8011198 <sys_lock_tcpip_core>
}
8010656: bf00 nop
8010658: 3708 adds r7, #8
801065a: 46bd mov sp, r7
801065c: bd80 pop {r7, pc}
...
08010660 <is_link_up>:
#define tcpip_init tcpip_init_wrap
uint8_t is_link_up(void)
{
8010660: b480 push {r7}
8010662: af00 add r7, sp, #0
return netif_is_up(&gnetif);
8010664: 4b05 ldr r3, [pc, #20] @ (801067c <is_link_up+0x1c>)
8010666: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801066a: f003 0301 and.w r3, r3, #1
801066e: b2db uxtb r3, r3
}
8010670: 4618 mov r0, r3
8010672: 46bd mov sp, r7
8010674: f85d 7b04 ldr.w r7, [sp], #4
8010678: 4770 bx lr
801067a: bf00 nop
801067c: 24002294 .word 0x24002294
08010680 <MX_LWIP_Init>:
/**
* LwIP initialization function
*/
void MX_LWIP_Init(void)
{
8010680: b580 push {r7, lr}
8010682: b084 sub sp, #16
8010684: af04 add r7, sp, #16
/* IP addresses initialization without DHCP (IPv4) */
ipaddr_aton(STATIC_IP, &ipaddr);
ipaddr_aton(STATIC_MASK, &netmask);
ipaddr_aton(STATIC_GW, &gw);
#else
ip_addr_set_zero_ip4(&ipaddr);
8010686: 4b27 ldr r3, [pc, #156] @ (8010724 <MX_LWIP_Init+0xa4>)
8010688: 2200 movs r2, #0
801068a: 601a str r2, [r3, #0]
ip_addr_set_zero_ip4(&netmask);
801068c: 4b26 ldr r3, [pc, #152] @ (8010728 <MX_LWIP_Init+0xa8>)
801068e: 2200 movs r2, #0
8010690: 601a str r2, [r3, #0]
ip_addr_set_zero_ip4(&gw);
8010692: 4b26 ldr r3, [pc, #152] @ (801072c <MX_LWIP_Init+0xac>)
8010694: 2200 movs r2, #0
8010696: 601a str r2, [r3, #0]
#endif
/* USER CODE END IP_ADDRESSES */
/* Initilialize the LwIP stack with RTOS */
tcpip_init( NULL, NULL );
8010698: 2100 movs r1, #0
801069a: 2000 movs r0, #0
801069c: f7ff ffd0 bl 8010640 <tcpip_init_wrap>
// IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
// IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
// IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);
/* add the network interface (IPv4/IPv6) with RTOS */
netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, ðernetif_init, &tcpip_input);
80106a0: 4b23 ldr r3, [pc, #140] @ (8010730 <MX_LWIP_Init+0xb0>)
80106a2: 9302 str r3, [sp, #8]
80106a4: 4b23 ldr r3, [pc, #140] @ (8010734 <MX_LWIP_Init+0xb4>)
80106a6: 9301 str r3, [sp, #4]
80106a8: 2300 movs r3, #0
80106aa: 9300 str r3, [sp, #0]
80106ac: 4b1f ldr r3, [pc, #124] @ (801072c <MX_LWIP_Init+0xac>)
80106ae: 4a1e ldr r2, [pc, #120] @ (8010728 <MX_LWIP_Init+0xa8>)
80106b0: 491c ldr r1, [pc, #112] @ (8010724 <MX_LWIP_Init+0xa4>)
80106b2: 4821 ldr r0, [pc, #132] @ (8010738 <MX_LWIP_Init+0xb8>)
80106b4: f00a f886 bl 801a7c4 <netif_add>
/* Registers the default network interface */
netif_set_default(&gnetif);
80106b8: 481f ldr r0, [pc, #124] @ (8010738 <MX_LWIP_Init+0xb8>)
80106ba: f00a fa41 bl 801ab40 <netif_set_default>
if (netif_is_link_up(&gnetif))
80106be: 4b1e ldr r3, [pc, #120] @ (8010738 <MX_LWIP_Init+0xb8>)
80106c0: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
80106c4: 089b lsrs r3, r3, #2
80106c6: f003 0301 and.w r3, r3, #1
80106ca: b2db uxtb r3, r3
80106cc: 2b00 cmp r3, #0
80106ce: d003 beq.n 80106d8 <MX_LWIP_Init+0x58>
{
/* When the netif is fully configured this function must be called */
netif_set_up(&gnetif);
80106d0: 4819 ldr r0, [pc, #100] @ (8010738 <MX_LWIP_Init+0xb8>)
80106d2: f00a fa45 bl 801ab60 <netif_set_up>
80106d6: e002 b.n 80106de <MX_LWIP_Init+0x5e>
}
else
{
/* When the netif link is down this function must be called */
netif_set_down(&gnetif);
80106d8: 4817 ldr r0, [pc, #92] @ (8010738 <MX_LWIP_Init+0xb8>)
80106da: f00a faaf bl 801ac3c <netif_set_down>
}
/* Set the link callback function, this function is called on change of link status*/
netif_set_link_callback(&gnetif, ethernet_link_status_updated);
80106de: 4917 ldr r1, [pc, #92] @ (801073c <MX_LWIP_Init+0xbc>)
80106e0: 4815 ldr r0, [pc, #84] @ (8010738 <MX_LWIP_Init+0xb8>)
80106e2: f00a fb4b bl 801ad7c <netif_set_link_callback>
/* Create the Ethernet link handler thread */
/* USER CODE BEGIN H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */
memset(&attributes, 0x0, sizeof(osThreadAttr_t));
80106e6: 2224 movs r2, #36 @ 0x24
80106e8: 2100 movs r1, #0
80106ea: 4815 ldr r0, [pc, #84] @ (8010740 <MX_LWIP_Init+0xc0>)
80106ec: f01a fb30 bl 802ad50 <memset>
attributes.name = "EthLink";
80106f0: 4b13 ldr r3, [pc, #76] @ (8010740 <MX_LWIP_Init+0xc0>)
80106f2: 4a14 ldr r2, [pc, #80] @ (8010744 <MX_LWIP_Init+0xc4>)
80106f4: 601a str r2, [r3, #0]
attributes.stack_size = INTERFACE_THREAD_STACK_SIZE * 2;
80106f6: 4b12 ldr r3, [pc, #72] @ (8010740 <MX_LWIP_Init+0xc0>)
80106f8: f44f 6200 mov.w r2, #2048 @ 0x800
80106fc: 615a str r2, [r3, #20]
attributes.priority = osPriorityBelowNormal;
80106fe: 4b10 ldr r3, [pc, #64] @ (8010740 <MX_LWIP_Init+0xc0>)
8010700: 2210 movs r2, #16
8010702: 619a str r2, [r3, #24]
osThreadNew(ethernet_link_thread, &gnetif, &attributes);
8010704: 4a0e ldr r2, [pc, #56] @ (8010740 <MX_LWIP_Init+0xc0>)
8010706: 490c ldr r1, [pc, #48] @ (8010738 <MX_LWIP_Init+0xb8>)
8010708: 480f ldr r0, [pc, #60] @ (8010748 <MX_LWIP_Init+0xc8>)
801070a: f000 feee bl 80114ea <osThreadNew>
/* USER CODE END H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */
/* USER CODE BEGIN 3 */
/* Start DHCP negotiation for a network interface (IPv4) */
#if USE_DHCP
netif_set_up(&gnetif);
801070e: 480a ldr r0, [pc, #40] @ (8010738 <MX_LWIP_Init+0xb8>)
8010710: f00a fa26 bl 801ab60 <netif_set_up>
dhcp_start(&gnetif);
8010714: 4808 ldr r0, [pc, #32] @ (8010738 <MX_LWIP_Init+0xb8>)
8010716: f012 fd13 bl 8023140 <dhcp_start>
#else
netif_set_addr(&gnetif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
#endif
/* ETH_CODE: call UNLOCK_TCPIP_CORE after we are done */
UNLOCK_TCPIP_CORE();
801071a: f000 fd4d bl 80111b8 <sys_unlock_tcpip_core>
/* USER CODE END 3 */
}
801071e: bf00 nop
8010720: 46bd mov sp, r7
8010722: bd80 pop {r7, pc}
8010724: 240022cc .word 0x240022cc
8010728: 240022d0 .word 0x240022d0
801072c: 240022d4 .word 0x240022d4
8010730: 080199fd .word 0x080199fd
8010734: 08010c01 .word 0x08010c01
8010738: 24002294 .word 0x24002294
801073c: 0801074d .word 0x0801074d
8010740: 240022d8 .word 0x240022d8
8010744: 0802dc20 .word 0x0802dc20
8010748: 08010ed1 .word 0x08010ed1
0801074c <ethernet_link_status_updated>:
* @brief Notify the User about the network interface config status
* @param netif: the network interface
* @retval None
*/
static void ethernet_link_status_updated(struct netif *netif)
{
801074c: b480 push {r7}
801074e: b083 sub sp, #12
8010750: af00 add r7, sp, #0
8010752: 6078 str r0, [r7, #4]
else /* netif is down */
{
/* USER CODE BEGIN 6 */
/* USER CODE END 6 */
}
}
8010754: bf00 nop
8010756: 370c adds r7, #12
8010758: 46bd mov sp, r7
801075a: f85d 7b04 ldr.w r7, [sp], #4
801075e: 4770 bx lr
08010760 <HAL_ETH_RxCpltCallback>:
* @brief Ethernet Rx Transfer completed callback
* @param handlerEth: ETH handler
* @retval None
*/
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
8010760: b580 push {r7, lr}
8010762: b082 sub sp, #8
8010764: af00 add r7, sp, #0
8010766: 6078 str r0, [r7, #4]
osSemaphoreRelease(RxPktSemaphore);
8010768: 4b04 ldr r3, [pc, #16] @ (801077c <HAL_ETH_RxCpltCallback+0x1c>)
801076a: 681b ldr r3, [r3, #0]
801076c: 4618 mov r0, r3
801076e: f001 fa55 bl 8011c1c <osSemaphoreRelease>
}
8010772: bf00 nop
8010774: 3708 adds r7, #8
8010776: 46bd mov sp, r7
8010778: bd80 pop {r7, pc}
801077a: bf00 nop
801077c: 24002304 .word 0x24002304
08010780 <HAL_ETH_TxCpltCallback>:
* @brief Ethernet Tx Transfer completed callback
* @param handlerEth: ETH handler
* @retval None
*/
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
8010780: b580 push {r7, lr}
8010782: b082 sub sp, #8
8010784: af00 add r7, sp, #0
8010786: 6078 str r0, [r7, #4]
osSemaphoreRelease(TxPktSemaphore);
8010788: 4b04 ldr r3, [pc, #16] @ (801079c <HAL_ETH_TxCpltCallback+0x1c>)
801078a: 681b ldr r3, [r3, #0]
801078c: 4618 mov r0, r3
801078e: f001 fa45 bl 8011c1c <osSemaphoreRelease>
}
8010792: bf00 nop
8010794: 3708 adds r7, #8
8010796: 46bd mov sp, r7
8010798: bd80 pop {r7, pc}
801079a: bf00 nop
801079c: 24002308 .word 0x24002308
080107a0 <HAL_ETH_ErrorCallback>:
* @brief Ethernet DMA transfer error callback
* @param handlerEth: ETH handler
* @retval None
*/
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{
80107a0: b580 push {r7, lr}
80107a2: b082 sub sp, #8
80107a4: af00 add r7, sp, #0
80107a6: 6078 str r0, [r7, #4]
if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMACSR_RBU) == ETH_DMACSR_RBU)
80107a8: 6878 ldr r0, [r7, #4]
80107aa: f7f8 fead bl 8009508 <HAL_ETH_GetDMAError>
80107ae: 4603 mov r3, r0
80107b0: f003 0380 and.w r3, r3, #128 @ 0x80
80107b4: 2b80 cmp r3, #128 @ 0x80
80107b6: d104 bne.n 80107c2 <HAL_ETH_ErrorCallback+0x22>
{
osSemaphoreRelease(RxPktSemaphore);
80107b8: 4b04 ldr r3, [pc, #16] @ (80107cc <HAL_ETH_ErrorCallback+0x2c>)
80107ba: 681b ldr r3, [r3, #0]
80107bc: 4618 mov r0, r3
80107be: f001 fa2d bl 8011c1c <osSemaphoreRelease>
}
}
80107c2: bf00 nop
80107c4: 3708 adds r7, #8
80107c6: 46bd mov sp, r7
80107c8: bd80 pop {r7, pc}
80107ca: bf00 nop
80107cc: 24002304 .word 0x24002304
080107d0 <low_level_init>:
*
* @param netif the already initialized lwip network interface structure
* for this ethernetif
*/
static void low_level_init(struct netif *netif)
{
80107d0: b580 push {r7, lr}
80107d2: b0aa sub sp, #168 @ 0xa8
80107d4: af00 add r7, sp, #0
80107d6: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_eth_init_status = HAL_OK;
80107d8: 2300 movs r3, #0
80107da: f887 309f strb.w r3, [r7, #159] @ 0x9f
/* USER CODE BEGIN OS_THREAD_ATTR_CMSIS_RTOS_V2 */
osThreadAttr_t attributes;
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */
uint32_t duplex, speed = 0;
80107de: 2300 movs r3, #0
80107e0: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
int32_t PHYLinkState = 0;
80107e4: 2300 movs r3, #0
80107e6: f8c7 3098 str.w r3, [r7, #152] @ 0x98
ETH_MACConfigTypeDef MACConf = {0};
80107ea: f107 0310 add.w r3, r7, #16
80107ee: 2264 movs r2, #100 @ 0x64
80107f0: 2100 movs r1, #0
80107f2: 4618 mov r0, r3
80107f4: f01a faac bl 802ad50 <memset>
/* Start ETH HAL Init */
uint8_t MACAddr[6] ;
heth.Instance = ETH;
80107f8: 4b86 ldr r3, [pc, #536] @ (8010a14 <low_level_init+0x244>)
80107fa: 4a87 ldr r2, [pc, #540] @ (8010a18 <low_level_init+0x248>)
80107fc: 601a str r2, [r3, #0]
// MACAddr[1] = 0x80;
// MACAddr[2] = 0xE1;
// MACAddr[3] = 0x00;
// MACAddr[4] = 0x00;
// MACAddr[5] = 0x00;
MACAddr[0] = 0x7C;
80107fe: 237c movs r3, #124 @ 0x7c
8010800: 723b strb r3, [r7, #8]
MACAddr[1] = 0xF6;
8010802: 23f6 movs r3, #246 @ 0xf6
8010804: 727b strb r3, [r7, #9]
MACAddr[2] = 0x66;
8010806: 2366 movs r3, #102 @ 0x66
8010808: 72bb strb r3, [r7, #10]
MACAddr[3] = 0xE4;
801080a: 23e4 movs r3, #228 @ 0xe4
801080c: 72fb strb r3, [r7, #11]
MACAddr[4] = 0xB5;
801080e: 23b5 movs r3, #181 @ 0xb5
8010810: 733b strb r3, [r7, #12]
MACAddr[5] = 0x41;
8010812: 2341 movs r3, #65 @ 0x41
8010814: 737b strb r3, [r7, #13]
heth.Init.MACAddr = &MACAddr[0];
8010816: 4a7f ldr r2, [pc, #508] @ (8010a14 <low_level_init+0x244>)
8010818: f107 0308 add.w r3, r7, #8
801081c: 6053 str r3, [r2, #4]
heth.Init.MediaInterface = HAL_ETH_MII_MODE;
801081e: 4b7d ldr r3, [pc, #500] @ (8010a14 <low_level_init+0x244>)
8010820: 2200 movs r2, #0
8010822: 721a strb r2, [r3, #8]
heth.Init.TxDesc = DMATxDscrTab;
8010824: 4b7b ldr r3, [pc, #492] @ (8010a14 <low_level_init+0x244>)
8010826: 4a7d ldr r2, [pc, #500] @ (8010a1c <low_level_init+0x24c>)
8010828: 60da str r2, [r3, #12]
heth.Init.RxDesc = DMARxDscrTab;
801082a: 4b7a ldr r3, [pc, #488] @ (8010a14 <low_level_init+0x244>)
801082c: 4a7c ldr r2, [pc, #496] @ (8010a20 <low_level_init+0x250>)
801082e: 611a str r2, [r3, #16]
heth.Init.RxBuffLen = 1536;
8010830: 4b78 ldr r3, [pc, #480] @ (8010a14 <low_level_init+0x244>)
8010832: f44f 62c0 mov.w r2, #1536 @ 0x600
8010836: 615a str r2, [r3, #20]
/* USER CODE BEGIN MACADDRESS */
/* USER CODE END MACADDRESS */
hal_eth_init_status = HAL_ETH_Init(&heth);
8010838: 4876 ldr r0, [pc, #472] @ (8010a14 <low_level_init+0x244>)
801083a: f7f7 fe99 bl 8008570 <HAL_ETH_Init>
801083e: 4603 mov r3, r0
8010840: f887 309f strb.w r3, [r7, #159] @ 0x9f
memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
8010844: 2238 movs r2, #56 @ 0x38
8010846: 2100 movs r1, #0
8010848: 4876 ldr r0, [pc, #472] @ (8010a24 <low_level_init+0x254>)
801084a: f01a fa81 bl 802ad50 <memset>
TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
801084e: 4b75 ldr r3, [pc, #468] @ (8010a24 <low_level_init+0x254>)
8010850: 2221 movs r2, #33 @ 0x21
8010852: 601a str r2, [r3, #0]
TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
8010854: 4b73 ldr r3, [pc, #460] @ (8010a24 <low_level_init+0x254>)
8010856: f44f 3240 mov.w r2, #196608 @ 0x30000
801085a: 615a str r2, [r3, #20]
TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
801085c: 4b71 ldr r3, [pc, #452] @ (8010a24 <low_level_init+0x254>)
801085e: 2200 movs r2, #0
8010860: 611a str r2, [r3, #16]
/* End ETH HAL Init */
/* Initialize the RX POOL */
LWIP_MEMPOOL_INIT(RX_POOL);
8010862: 4871 ldr r0, [pc, #452] @ (8010a28 <low_level_init+0x258>)
8010864: f009 fe68 bl 801a538 <memp_init_pool>
#if LWIP_ARP || LWIP_ETHERNET
/* set MAC hardware address length */
netif->hwaddr_len = ETH_HWADDR_LEN;
8010868: 687b ldr r3, [r7, #4]
801086a: 2206 movs r2, #6
801086c: f883 2030 strb.w r2, [r3, #48] @ 0x30
/* set MAC hardware address */
netif->hwaddr[0] = heth.Init.MACAddr[0];
8010870: 4b68 ldr r3, [pc, #416] @ (8010a14 <low_level_init+0x244>)
8010872: 685b ldr r3, [r3, #4]
8010874: 781a ldrb r2, [r3, #0]
8010876: 687b ldr r3, [r7, #4]
8010878: f883 202a strb.w r2, [r3, #42] @ 0x2a
netif->hwaddr[1] = heth.Init.MACAddr[1];
801087c: 4b65 ldr r3, [pc, #404] @ (8010a14 <low_level_init+0x244>)
801087e: 685b ldr r3, [r3, #4]
8010880: 785a ldrb r2, [r3, #1]
8010882: 687b ldr r3, [r7, #4]
8010884: f883 202b strb.w r2, [r3, #43] @ 0x2b
netif->hwaddr[2] = heth.Init.MACAddr[2];
8010888: 4b62 ldr r3, [pc, #392] @ (8010a14 <low_level_init+0x244>)
801088a: 685b ldr r3, [r3, #4]
801088c: 789a ldrb r2, [r3, #2]
801088e: 687b ldr r3, [r7, #4]
8010890: f883 202c strb.w r2, [r3, #44] @ 0x2c
netif->hwaddr[3] = heth.Init.MACAddr[3];
8010894: 4b5f ldr r3, [pc, #380] @ (8010a14 <low_level_init+0x244>)
8010896: 685b ldr r3, [r3, #4]
8010898: 78da ldrb r2, [r3, #3]
801089a: 687b ldr r3, [r7, #4]
801089c: f883 202d strb.w r2, [r3, #45] @ 0x2d
netif->hwaddr[4] = heth.Init.MACAddr[4];
80108a0: 4b5c ldr r3, [pc, #368] @ (8010a14 <low_level_init+0x244>)
80108a2: 685b ldr r3, [r3, #4]
80108a4: 791a ldrb r2, [r3, #4]
80108a6: 687b ldr r3, [r7, #4]
80108a8: f883 202e strb.w r2, [r3, #46] @ 0x2e
netif->hwaddr[5] = heth.Init.MACAddr[5];
80108ac: 4b59 ldr r3, [pc, #356] @ (8010a14 <low_level_init+0x244>)
80108ae: 685b ldr r3, [r3, #4]
80108b0: 795a ldrb r2, [r3, #5]
80108b2: 687b ldr r3, [r7, #4]
80108b4: f883 202f strb.w r2, [r3, #47] @ 0x2f
/* maximum transfer unit */
netif->mtu = ETH_MAX_PAYLOAD;
80108b8: 687b ldr r3, [r7, #4]
80108ba: f240 52dc movw r2, #1500 @ 0x5dc
80108be: 851a strh r2, [r3, #40] @ 0x28
/* Accept broadcast address and ARP traffic */
/* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
#if LWIP_ARP
netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
80108c0: 687b ldr r3, [r7, #4]
80108c2: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
80108c6: f043 030a orr.w r3, r3, #10
80108ca: b2da uxtb r2, r3
80108cc: 687b ldr r3, [r7, #4]
80108ce: f883 2031 strb.w r2, [r3, #49] @ 0x31
#else
netif->flags |= NETIF_FLAG_BROADCAST;
#endif /* LWIP_ARP */
/* create a binary semaphore used for informing ethernetif of frame reception */
RxPktSemaphore = osSemaphoreNew(1, 1, NULL);
80108d2: 2200 movs r2, #0
80108d4: 2101 movs r1, #1
80108d6: 2001 movs r0, #1
80108d8: f001 f8c5 bl 8011a66 <osSemaphoreNew>
80108dc: 4603 mov r3, r0
80108de: 4a53 ldr r2, [pc, #332] @ (8010a2c <low_level_init+0x25c>)
80108e0: 6013 str r3, [r2, #0]
/* create a binary semaphore used for informing ethernetif of frame transmission */
TxPktSemaphore = osSemaphoreNew(1, 1, NULL);
80108e2: 2200 movs r2, #0
80108e4: 2101 movs r1, #1
80108e6: 2001 movs r0, #1
80108e8: f001 f8bd bl 8011a66 <osSemaphoreNew>
80108ec: 4603 mov r3, r0
80108ee: 4a50 ldr r2, [pc, #320] @ (8010a30 <low_level_init+0x260>)
80108f0: 6013 str r3, [r2, #0]
/* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_NEW_CMSIS_RTOS_V2 */
memset(&attributes, 0x0, sizeof(osThreadAttr_t));
80108f2: f107 0374 add.w r3, r7, #116 @ 0x74
80108f6: 2224 movs r2, #36 @ 0x24
80108f8: 2100 movs r1, #0
80108fa: 4618 mov r0, r3
80108fc: f01a fa28 bl 802ad50 <memset>
attributes.name = "EthIf";
8010900: 4b4c ldr r3, [pc, #304] @ (8010a34 <low_level_init+0x264>)
8010902: 677b str r3, [r7, #116] @ 0x74
attributes.stack_size = INTERFACE_THREAD_STACK_SIZE;
8010904: f44f 6380 mov.w r3, #1024 @ 0x400
8010908: f8c7 3088 str.w r3, [r7, #136] @ 0x88
attributes.priority = osPriorityRealtime;
801090c: 2330 movs r3, #48 @ 0x30
801090e: f8c7 308c str.w r3, [r7, #140] @ 0x8c
osThreadNew(ethernetif_input, netif, &attributes);
8010912: f107 0374 add.w r3, r7, #116 @ 0x74
8010916: 461a mov r2, r3
8010918: 6879 ldr r1, [r7, #4]
801091a: 4847 ldr r0, [pc, #284] @ (8010a38 <low_level_init+0x268>)
801091c: f000 fde5 bl 80114ea <osThreadNew>
/* USER CODE BEGIN PHY_PRE_CONFIG */
/* USER CODE END PHY_PRE_CONFIG */
/* Set PHY IO functions */
DP83848_RegisterBusIO(&DP83848, &DP83848_IOCtx);
8010920: 4946 ldr r1, [pc, #280] @ (8010a3c <low_level_init+0x26c>)
8010922: 4847 ldr r0, [pc, #284] @ (8010a40 <low_level_init+0x270>)
8010924: f7f4 fef9 bl 800571a <DP83848_RegisterBusIO>
/* Initialize the DP83848 ETH PHY */
DP83848_Init(&DP83848);
8010928: 4845 ldr r0, [pc, #276] @ (8010a40 <low_level_init+0x270>)
801092a: f7f4 ff28 bl 800577e <DP83848_Init>
if (hal_eth_init_status == HAL_OK)
801092e: f897 309f ldrb.w r3, [r7, #159] @ 0x9f
8010932: 2b00 cmp r3, #0
8010934: d168 bne.n 8010a08 <low_level_init+0x238>
{
PHYLinkState = DP83848_GetLinkState(&DP83848);
8010936: 4842 ldr r0, [pc, #264] @ (8010a40 <low_level_init+0x270>)
8010938: f7f4 ff6e bl 8005818 <DP83848_GetLinkState>
801093c: f8c7 0098 str.w r0, [r7, #152] @ 0x98
/* Get link state */
if(PHYLinkState <= DP83848_STATUS_LINK_DOWN)
8010940: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8010944: 2b01 cmp r3, #1
8010946: dc06 bgt.n 8010956 <low_level_init+0x186>
{
netif_set_link_down(netif);
8010948: 6878 ldr r0, [r7, #4]
801094a: f00a f9e5 bl 801ad18 <netif_set_link_down>
netif_set_down(netif);
801094e: 6878 ldr r0, [r7, #4]
8010950: f00a f974 bl 801ac3c <netif_set_down>
#endif /* LWIP_ARP || LWIP_ETHERNET */
/* USER CODE BEGIN LOW_LEVEL_INIT */
/* USER CODE END LOW_LEVEL_INIT */
}
8010954: e05a b.n 8010a0c <low_level_init+0x23c>
switch (PHYLinkState)
8010956: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
801095a: 3b02 subs r3, #2
801095c: 2b03 cmp r3, #3
801095e: d82b bhi.n 80109b8 <low_level_init+0x1e8>
8010960: a201 add r2, pc, #4 @ (adr r2, 8010968 <low_level_init+0x198>)
8010962: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8010966: bf00 nop
8010968: 08010979 .word 0x08010979
801096c: 0801098b .word 0x0801098b
8010970: 0801099b .word 0x0801099b
8010974: 080109ab .word 0x080109ab
duplex = ETH_FULLDUPLEX_MODE;
8010978: f44f 5300 mov.w r3, #8192 @ 0x2000
801097c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
speed = ETH_SPEED_100M;
8010980: f44f 4380 mov.w r3, #16384 @ 0x4000
8010984: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
break;
8010988: e01f b.n 80109ca <low_level_init+0x1fa>
duplex = ETH_HALFDUPLEX_MODE;
801098a: 2300 movs r3, #0
801098c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
speed = ETH_SPEED_100M;
8010990: f44f 4380 mov.w r3, #16384 @ 0x4000
8010994: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
break;
8010998: e017 b.n 80109ca <low_level_init+0x1fa>
duplex = ETH_FULLDUPLEX_MODE;
801099a: f44f 5300 mov.w r3, #8192 @ 0x2000
801099e: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
speed = ETH_SPEED_10M;
80109a2: 2300 movs r3, #0
80109a4: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
break;
80109a8: e00f b.n 80109ca <low_level_init+0x1fa>
duplex = ETH_HALFDUPLEX_MODE;
80109aa: 2300 movs r3, #0
80109ac: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
speed = ETH_SPEED_10M;
80109b0: 2300 movs r3, #0
80109b2: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
break;
80109b6: e008 b.n 80109ca <low_level_init+0x1fa>
duplex = ETH_FULLDUPLEX_MODE;
80109b8: f44f 5300 mov.w r3, #8192 @ 0x2000
80109bc: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
speed = ETH_SPEED_100M;
80109c0: f44f 4380 mov.w r3, #16384 @ 0x4000
80109c4: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
break;
80109c8: bf00 nop
HAL_ETH_GetMACConfig(&heth, &MACConf);
80109ca: f107 0310 add.w r3, r7, #16
80109ce: 4619 mov r1, r3
80109d0: 4810 ldr r0, [pc, #64] @ (8010a14 <low_level_init+0x244>)
80109d2: f7f8 fb5b bl 800908c <HAL_ETH_GetMACConfig>
MACConf.DuplexMode = duplex;
80109d6: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
80109da: 62bb str r3, [r7, #40] @ 0x28
MACConf.Speed = speed;
80109dc: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
80109e0: 627b str r3, [r7, #36] @ 0x24
HAL_ETH_SetMACConfig(&heth, &MACConf);
80109e2: f107 0310 add.w r3, r7, #16
80109e6: 4619 mov r1, r3
80109e8: 480a ldr r0, [pc, #40] @ (8010a14 <low_level_init+0x244>)
80109ea: f7f8 fd23 bl 8009434 <HAL_ETH_SetMACConfig>
HAL_ETH_Start_IT(&heth);
80109ee: 4809 ldr r0, [pc, #36] @ (8010a14 <low_level_init+0x244>)
80109f0: f7f7 febc bl 800876c <HAL_ETH_Start_IT>
netif_set_up(netif);
80109f4: 6878 ldr r0, [r7, #4]
80109f6: f00a f8b3 bl 801ab60 <netif_set_up>
netif_set_link_up(netif);
80109fa: 6878 ldr r0, [r7, #4]
80109fc: f00a f952 bl 801aca4 <netif_set_link_up>
ethernetif_notify_conn_changed(netif);
8010a00: 6878 ldr r0, [r7, #4]
8010a02: f000 fb1b bl 801103c <ethernetif_notify_conn_changed>
}
8010a06: e001 b.n 8010a0c <low_level_init+0x23c>
Error_Handler();
8010a08: f7f1 fea2 bl 8002750 <Error_Handler>
}
8010a0c: bf00 nop
8010a0e: 37a8 adds r7, #168 @ 0xa8
8010a10: 46bd mov sp, r7
8010a12: bd80 pop {r7, pc}
8010a14: 2400230c .word 0x2400230c
8010a18: 40028000 .word 0x40028000
8010a1c: 24040100 .word 0x24040100
8010a20: 24040000 .word 0x24040000
8010a24: 240023bc .word 0x240023bc
8010a28: 08031d1c .word 0x08031d1c
8010a2c: 24002304 .word 0x24002304
8010a30: 24002308 .word 0x24002308
8010a34: 0802dc40 .word 0x0802dc40
8010a38: 08010bad .word 0x08010bad
8010a3c: 24000034 .word 0x24000034
8010a40: 240023f4 .word 0x240023f4
08010a44 <low_level_output>:
* to become available since the stack doesn't retry to send a packet
* dropped because of memory failure (except for the TCP timers).
*/
static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
8010a44: b580 push {r7, lr}
8010a46: b092 sub sp, #72 @ 0x48
8010a48: af00 add r7, sp, #0
8010a4a: 6078 str r0, [r7, #4]
8010a4c: 6039 str r1, [r7, #0]
uint32_t i = 0U;
8010a4e: 2300 movs r3, #0
8010a50: 647b str r3, [r7, #68] @ 0x44
struct pbuf *q = NULL;
8010a52: 2300 movs r3, #0
8010a54: 643b str r3, [r7, #64] @ 0x40
err_t errval = ERR_OK;
8010a56: 2300 movs r3, #0
8010a58: f887 303f strb.w r3, [r7, #63] @ 0x3f
ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
8010a5c: f107 030c add.w r3, r7, #12
8010a60: 2230 movs r2, #48 @ 0x30
8010a62: 2100 movs r1, #0
8010a64: 4618 mov r0, r3
8010a66: f01a f973 bl 802ad50 <memset>
memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
8010a6a: f107 030c add.w r3, r7, #12
8010a6e: 2230 movs r2, #48 @ 0x30
8010a70: 2100 movs r1, #0
8010a72: 4618 mov r0, r3
8010a74: f01a f96c bl 802ad50 <memset>
for(q = p; q != NULL; q = q->next)
8010a78: 683b ldr r3, [r7, #0]
8010a7a: 643b str r3, [r7, #64] @ 0x40
8010a7c: e045 b.n 8010b0a <low_level_output+0xc6>
{
if(i >= ETH_TX_DESC_CNT)
8010a7e: 6c7b ldr r3, [r7, #68] @ 0x44
8010a80: 2b03 cmp r3, #3
8010a82: d902 bls.n 8010a8a <low_level_output+0x46>
return ERR_IF;
8010a84: f06f 030b mvn.w r3, #11
8010a88: e06c b.n 8010b64 <low_level_output+0x120>
Txbuffer[i].buffer = q->payload;
8010a8a: 6c3b ldr r3, [r7, #64] @ 0x40
8010a8c: 6859 ldr r1, [r3, #4]
8010a8e: 6c7a ldr r2, [r7, #68] @ 0x44
8010a90: 4613 mov r3, r2
8010a92: 005b lsls r3, r3, #1
8010a94: 4413 add r3, r2
8010a96: 009b lsls r3, r3, #2
8010a98: 3348 adds r3, #72 @ 0x48
8010a9a: 443b add r3, r7
8010a9c: 3b3c subs r3, #60 @ 0x3c
8010a9e: 6019 str r1, [r3, #0]
Txbuffer[i].len = q->len;
8010aa0: 6c3b ldr r3, [r7, #64] @ 0x40
8010aa2: 895b ldrh r3, [r3, #10]
8010aa4: 4619 mov r1, r3
8010aa6: 6c7a ldr r2, [r7, #68] @ 0x44
8010aa8: 4613 mov r3, r2
8010aaa: 005b lsls r3, r3, #1
8010aac: 4413 add r3, r2
8010aae: 009b lsls r3, r3, #2
8010ab0: 3348 adds r3, #72 @ 0x48
8010ab2: 443b add r3, r7
8010ab4: 3b38 subs r3, #56 @ 0x38
8010ab6: 6019 str r1, [r3, #0]
if(i>0)
8010ab8: 6c7b ldr r3, [r7, #68] @ 0x44
8010aba: 2b00 cmp r3, #0
8010abc: d011 beq.n 8010ae2 <low_level_output+0x9e>
{
Txbuffer[i-1].next = &Txbuffer[i];
8010abe: 6c7b ldr r3, [r7, #68] @ 0x44
8010ac0: 1e5a subs r2, r3, #1
8010ac2: f107 000c add.w r0, r7, #12
8010ac6: 6c79 ldr r1, [r7, #68] @ 0x44
8010ac8: 460b mov r3, r1
8010aca: 005b lsls r3, r3, #1
8010acc: 440b add r3, r1
8010ace: 009b lsls r3, r3, #2
8010ad0: 18c1 adds r1, r0, r3
8010ad2: 4613 mov r3, r2
8010ad4: 005b lsls r3, r3, #1
8010ad6: 4413 add r3, r2
8010ad8: 009b lsls r3, r3, #2
8010ada: 3348 adds r3, #72 @ 0x48
8010adc: 443b add r3, r7
8010ade: 3b34 subs r3, #52 @ 0x34
8010ae0: 6019 str r1, [r3, #0]
}
if(q->next == NULL)
8010ae2: 6c3b ldr r3, [r7, #64] @ 0x40
8010ae4: 681b ldr r3, [r3, #0]
8010ae6: 2b00 cmp r3, #0
8010ae8: d109 bne.n 8010afe <low_level_output+0xba>
{
Txbuffer[i].next = NULL;
8010aea: 6c7a ldr r2, [r7, #68] @ 0x44
8010aec: 4613 mov r3, r2
8010aee: 005b lsls r3, r3, #1
8010af0: 4413 add r3, r2
8010af2: 009b lsls r3, r3, #2
8010af4: 3348 adds r3, #72 @ 0x48
8010af6: 443b add r3, r7
8010af8: 3b34 subs r3, #52 @ 0x34
8010afa: 2200 movs r2, #0
8010afc: 601a str r2, [r3, #0]
}
i++;
8010afe: 6c7b ldr r3, [r7, #68] @ 0x44
8010b00: 3301 adds r3, #1
8010b02: 647b str r3, [r7, #68] @ 0x44
for(q = p; q != NULL; q = q->next)
8010b04: 6c3b ldr r3, [r7, #64] @ 0x40
8010b06: 681b ldr r3, [r3, #0]
8010b08: 643b str r3, [r7, #64] @ 0x40
8010b0a: 6c3b ldr r3, [r7, #64] @ 0x40
8010b0c: 2b00 cmp r3, #0
8010b0e: d1b6 bne.n 8010a7e <low_level_output+0x3a>
}
TxConfig.Length = p->tot_len;
8010b10: 683b ldr r3, [r7, #0]
8010b12: 891b ldrh r3, [r3, #8]
8010b14: 461a mov r2, r3
8010b16: 4b15 ldr r3, [pc, #84] @ (8010b6c <low_level_output+0x128>)
8010b18: 605a str r2, [r3, #4]
TxConfig.TxBuffer = Txbuffer;
8010b1a: 4a14 ldr r2, [pc, #80] @ (8010b6c <low_level_output+0x128>)
8010b1c: f107 030c add.w r3, r7, #12
8010b20: 6093 str r3, [r2, #8]
TxConfig.pData = p;
8010b22: 4a12 ldr r2, [pc, #72] @ (8010b6c <low_level_output+0x128>)
8010b24: 683b ldr r3, [r7, #0]
8010b26: 6353 str r3, [r2, #52] @ 0x34
pbuf_ref(p);
8010b28: 6838 ldr r0, [r7, #0]
8010b2a: f00a fdad bl 801b688 <pbuf_ref>
#if 1
if (HAL_ETH_Transmit_IT(&heth, &TxConfig) == HAL_OK) {
8010b2e: 490f ldr r1, [pc, #60] @ (8010b6c <low_level_output+0x128>)
8010b30: 480f ldr r0, [pc, #60] @ (8010b70 <low_level_output+0x12c>)
8010b32: f7f7 ff07 bl 8008944 <HAL_ETH_Transmit_IT>
8010b36: 4603 mov r3, r0
8010b38: 2b00 cmp r3, #0
8010b3a: d10e bne.n 8010b5a <low_level_output+0x116>
while(osSemaphoreAcquire(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
8010b3c: bf00 nop
8010b3e: 4b0d ldr r3, [pc, #52] @ (8010b74 <low_level_output+0x130>)
8010b40: 681b ldr r3, [r3, #0]
8010b42: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8010b46: 4618 mov r0, r3
8010b48: f001 f816 bl 8011b78 <osSemaphoreAcquire>
8010b4c: 4603 mov r3, r0
8010b4e: 2b00 cmp r3, #0
8010b50: d1f5 bne.n 8010b3e <low_level_output+0xfa>
{
}
// osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(1000));
HAL_ETH_ReleaseTxPacket(&heth);
8010b52: 4807 ldr r0, [pc, #28] @ (8010b70 <low_level_output+0x12c>)
8010b54: f7f8 f87d bl 8008c52 <HAL_ETH_ReleaseTxPacket>
8010b58: e002 b.n 8010b60 <low_level_output+0x11c>
} else {
pbuf_free(p);
8010b5a: 6838 ldr r0, [r7, #0]
8010b5c: f00a fcee bl 801b53c <pbuf_free>
HAL_ETH_Transmit_IT(&heth, &TxConfig);
osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(100));
HAL_ETH_ReleaseTxPacket(&heth);
#endif
return errval;
8010b60: f997 303f ldrsb.w r3, [r7, #63] @ 0x3f
}
8010b64: 4618 mov r0, r3
8010b66: 3748 adds r7, #72 @ 0x48
8010b68: 46bd mov sp, r7
8010b6a: bd80 pop {r7, pc}
8010b6c: 240023bc .word 0x240023bc
8010b70: 2400230c .word 0x2400230c
8010b74: 24002308 .word 0x24002308
08010b78 <low_level_input>:
* @param netif the lwip network interface structure for this ethernetif
* @return a pbuf filled with the received packet (including MAC header)
* NULL on memory error
*/
static struct pbuf * low_level_input(struct netif *netif)
{
8010b78: b580 push {r7, lr}
8010b7a: b084 sub sp, #16
8010b7c: af00 add r7, sp, #0
8010b7e: 6078 str r0, [r7, #4]
struct pbuf *p = NULL;
8010b80: 2300 movs r3, #0
8010b82: 60fb str r3, [r7, #12]
if(RxAllocStatus == RX_ALLOC_OK)
8010b84: 4b07 ldr r3, [pc, #28] @ (8010ba4 <low_level_input+0x2c>)
8010b86: 781b ldrb r3, [r3, #0]
8010b88: 2b00 cmp r3, #0
8010b8a: d105 bne.n 8010b98 <low_level_input+0x20>
{
HAL_ETH_ReadData(&heth, (void **)&p);
8010b8c: f107 030c add.w r3, r7, #12
8010b90: 4619 mov r1, r3
8010b92: 4805 ldr r0, [pc, #20] @ (8010ba8 <low_level_input+0x30>)
8010b94: f7f7 ff27 bl 80089e6 <HAL_ETH_ReadData>
}
return p;
8010b98: 68fb ldr r3, [r7, #12]
}
8010b9a: 4618 mov r0, r3
8010b9c: 3710 adds r7, #16
8010b9e: 46bd mov sp, r7
8010ba0: bd80 pop {r7, pc}
8010ba2: bf00 nop
8010ba4: 24002300 .word 0x24002300
8010ba8: 2400230c .word 0x2400230c
08010bac <ethernetif_input>:
* the appropriate input function is called.
*
* @param netif the lwip network interface structure for this ethernetif
*/
void ethernetif_input(void* argument)
{
8010bac: b580 push {r7, lr}
8010bae: b084 sub sp, #16
8010bb0: af00 add r7, sp, #0
8010bb2: 6078 str r0, [r7, #4]
struct pbuf *p = NULL;
8010bb4: 2300 movs r3, #0
8010bb6: 60fb str r3, [r7, #12]
struct netif *netif = (struct netif *) argument;
8010bb8: 687b ldr r3, [r7, #4]
8010bba: 60bb str r3, [r7, #8]
for( ;; )
{
if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
8010bbc: 4b0f ldr r3, [pc, #60] @ (8010bfc <ethernetif_input+0x50>)
8010bbe: 681b ldr r3, [r3, #0]
8010bc0: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8010bc4: 4618 mov r0, r3
8010bc6: f000 ffd7 bl 8011b78 <osSemaphoreAcquire>
8010bca: 4603 mov r3, r0
8010bcc: 2b00 cmp r3, #0
8010bce: d1f5 bne.n 8010bbc <ethernetif_input+0x10>
{
do
{
p = low_level_input( netif );
8010bd0: 68b8 ldr r0, [r7, #8]
8010bd2: f7ff ffd1 bl 8010b78 <low_level_input>
8010bd6: 60f8 str r0, [r7, #12]
if (p != NULL)
8010bd8: 68fb ldr r3, [r7, #12]
8010bda: 2b00 cmp r3, #0
8010bdc: d00a beq.n 8010bf4 <ethernetif_input+0x48>
{
if (netif->input( p, netif) != ERR_OK )
8010bde: 68bb ldr r3, [r7, #8]
8010be0: 691b ldr r3, [r3, #16]
8010be2: 68b9 ldr r1, [r7, #8]
8010be4: 68f8 ldr r0, [r7, #12]
8010be6: 4798 blx r3
8010be8: 4603 mov r3, r0
8010bea: 2b00 cmp r3, #0
8010bec: d002 beq.n 8010bf4 <ethernetif_input+0x48>
{
pbuf_free(p);
8010bee: 68f8 ldr r0, [r7, #12]
8010bf0: f00a fca4 bl 801b53c <pbuf_free>
}
}
} while(p!=NULL);
8010bf4: 68fb ldr r3, [r7, #12]
8010bf6: 2b00 cmp r3, #0
8010bf8: d1ea bne.n 8010bd0 <ethernetif_input+0x24>
if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
8010bfa: e7df b.n 8010bbc <ethernetif_input+0x10>
8010bfc: 24002304 .word 0x24002304
08010c00 <ethernetif_init>:
* @return ERR_OK if the loopif is initialized
* ERR_MEM if private data couldn't be allocated
* any other err_t on error
*/
err_t ethernetif_init(struct netif *netif)
{
8010c00: b580 push {r7, lr}
8010c02: b082 sub sp, #8
8010c04: af00 add r7, sp, #0
8010c06: 6078 str r0, [r7, #4]
LWIP_ASSERT("netif != NULL", (netif != NULL));
8010c08: 687b ldr r3, [r7, #4]
8010c0a: 2b00 cmp r3, #0
8010c0c: d106 bne.n 8010c1c <ethernetif_init+0x1c>
8010c0e: 4b0e ldr r3, [pc, #56] @ (8010c48 <ethernetif_init+0x48>)
8010c10: f240 2235 movw r2, #565 @ 0x235
8010c14: 490d ldr r1, [pc, #52] @ (8010c4c <ethernetif_init+0x4c>)
8010c16: 480e ldr r0, [pc, #56] @ (8010c50 <ethernetif_init+0x50>)
8010c18: f019 ff08 bl 802aa2c <iprintf>
* The last argument should be replaced with your link speed, in units
* of bits per second.
*/
// MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS);
netif->name[0] = IFNAME0;
8010c1c: 687b ldr r3, [r7, #4]
8010c1e: 2273 movs r2, #115 @ 0x73
8010c20: f883 2032 strb.w r2, [r3, #50] @ 0x32
netif->name[1] = IFNAME1;
8010c24: 687b ldr r3, [r7, #4]
8010c26: 2274 movs r2, #116 @ 0x74
8010c28: f883 2033 strb.w r2, [r3, #51] @ 0x33
* is available...) */
#if LWIP_IPV4
#if LWIP_ARP || LWIP_ETHERNET
#if LWIP_ARP
netif->output = etharp_output;
8010c2c: 687b ldr r3, [r7, #4]
8010c2e: 4a09 ldr r2, [pc, #36] @ (8010c54 <ethernetif_init+0x54>)
8010c30: 615a str r2, [r3, #20]
#if LWIP_IPV6
netif->output_ip6 = ethip6_output;
#endif /* LWIP_IPV6 */
netif->linkoutput = low_level_output;
8010c32: 687b ldr r3, [r7, #4]
8010c34: 4a08 ldr r2, [pc, #32] @ (8010c58 <ethernetif_init+0x58>)
8010c36: 619a str r2, [r3, #24]
/* initialize the hardware */
low_level_init(netif);
8010c38: 6878 ldr r0, [r7, #4]
8010c3a: f7ff fdc9 bl 80107d0 <low_level_init>
return ERR_OK;
8010c3e: 2300 movs r3, #0
}
8010c40: 4618 mov r0, r3
8010c42: 3708 adds r7, #8
8010c44: 46bd mov sp, r7
8010c46: bd80 pop {r7, pc}
8010c48: 0802dc48 .word 0x0802dc48
8010c4c: 0802dc64 .word 0x0802dc64
8010c50: 0802dc74 .word 0x0802dc74
8010c54: 0802509d .word 0x0802509d
8010c58: 08010a45 .word 0x08010a45
08010c5c <pbuf_free_custom>:
* @brief Custom Rx pbuf free callback
* @param pbuf: pbuf to be freed
* @retval None
*/
void pbuf_free_custom(struct pbuf *p)
{
8010c5c: b580 push {r7, lr}
8010c5e: b084 sub sp, #16
8010c60: af00 add r7, sp, #0
8010c62: 6078 str r0, [r7, #4]
struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
8010c64: 687b ldr r3, [r7, #4]
8010c66: 60fb str r3, [r7, #12]
LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
8010c68: 68f9 ldr r1, [r7, #12]
8010c6a: 4809 ldr r0, [pc, #36] @ (8010c90 <pbuf_free_custom+0x34>)
8010c6c: f009 fd54 bl 801a718 <memp_free_pool>
/* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
* call HAL_ETH_GetRxDataBuffer to rebuild the Rx descriptors. */
if (RxAllocStatus == RX_ALLOC_ERROR)
8010c70: 4b08 ldr r3, [pc, #32] @ (8010c94 <pbuf_free_custom+0x38>)
8010c72: 781b ldrb r3, [r3, #0]
8010c74: 2b01 cmp r3, #1
8010c76: d107 bne.n 8010c88 <pbuf_free_custom+0x2c>
{
RxAllocStatus = RX_ALLOC_OK;
8010c78: 4b06 ldr r3, [pc, #24] @ (8010c94 <pbuf_free_custom+0x38>)
8010c7a: 2200 movs r2, #0
8010c7c: 701a strb r2, [r3, #0]
osSemaphoreRelease(RxPktSemaphore);
8010c7e: 4b06 ldr r3, [pc, #24] @ (8010c98 <pbuf_free_custom+0x3c>)
8010c80: 681b ldr r3, [r3, #0]
8010c82: 4618 mov r0, r3
8010c84: f000 ffca bl 8011c1c <osSemaphoreRelease>
}
}
8010c88: bf00 nop
8010c8a: 3710 adds r7, #16
8010c8c: 46bd mov sp, r7
8010c8e: bd80 pop {r7, pc}
8010c90: 08031d1c .word 0x08031d1c
8010c94: 24002300 .word 0x24002300
8010c98: 24002304 .word 0x24002304
08010c9c <sys_now>:
* when LWIP_TIMERS == 1 and NO_SYS == 1
* @param None
* @retval Current Time value
*/
u32_t sys_now(void)
{
8010c9c: b580 push {r7, lr}
8010c9e: af00 add r7, sp, #0
return HAL_GetTick();
8010ca0: f7f4 fe92 bl 80059c8 <HAL_GetTick>
8010ca4: 4603 mov r3, r0
}
8010ca6: 4618 mov r0, r3
8010ca8: bd80 pop {r7, pc}
...
08010cac <HAL_ETH_MspInit>:
* @param ethHandle: ETH handle
* @retval None
*/
void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
{
8010cac: b580 push {r7, lr}
8010cae: b08e sub sp, #56 @ 0x38
8010cb0: af00 add r7, sp, #0
8010cb2: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8010cb4: f107 0324 add.w r3, r7, #36 @ 0x24
8010cb8: 2200 movs r2, #0
8010cba: 601a str r2, [r3, #0]
8010cbc: 605a str r2, [r3, #4]
8010cbe: 609a str r2, [r3, #8]
8010cc0: 60da str r2, [r3, #12]
8010cc2: 611a str r2, [r3, #16]
if(ethHandle->Instance==ETH)
8010cc4: 687b ldr r3, [r7, #4]
8010cc6: 681b ldr r3, [r3, #0]
8010cc8: 4a55 ldr r2, [pc, #340] @ (8010e20 <HAL_ETH_MspInit+0x174>)
8010cca: 4293 cmp r3, r2
8010ccc: f040 80a4 bne.w 8010e18 <HAL_ETH_MspInit+0x16c>
{
/* USER CODE BEGIN ETH_MspInit 0 */
/* USER CODE END ETH_MspInit 0 */
/* Enable Peripheral clock */
__HAL_RCC_ETH1MAC_CLK_ENABLE();
8010cd0: 4b54 ldr r3, [pc, #336] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010cd2: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
8010cd6: 4a53 ldr r2, [pc, #332] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010cd8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8010cdc: f8c2 30d8 str.w r3, [r2, #216] @ 0xd8
8010ce0: 4b50 ldr r3, [pc, #320] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010ce2: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
8010ce6: f403 4300 and.w r3, r3, #32768 @ 0x8000
8010cea: 623b str r3, [r7, #32]
8010cec: 6a3b ldr r3, [r7, #32]
__HAL_RCC_ETH1TX_CLK_ENABLE();
8010cee: 4b4d ldr r3, [pc, #308] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010cf0: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
8010cf4: 4a4b ldr r2, [pc, #300] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010cf6: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8010cfa: f8c2 30d8 str.w r3, [r2, #216] @ 0xd8
8010cfe: 4b49 ldr r3, [pc, #292] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d00: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
8010d04: f403 3380 and.w r3, r3, #65536 @ 0x10000
8010d08: 61fb str r3, [r7, #28]
8010d0a: 69fb ldr r3, [r7, #28]
__HAL_RCC_ETH1RX_CLK_ENABLE();
8010d0c: 4b45 ldr r3, [pc, #276] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d0e: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
8010d12: 4a44 ldr r2, [pc, #272] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d14: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8010d18: f8c2 30d8 str.w r3, [r2, #216] @ 0xd8
8010d1c: 4b41 ldr r3, [pc, #260] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d1e: f8d3 30d8 ldr.w r3, [r3, #216] @ 0xd8
8010d22: f403 3300 and.w r3, r3, #131072 @ 0x20000
8010d26: 61bb str r3, [r7, #24]
8010d28: 69bb ldr r3, [r7, #24]
__HAL_RCC_GPIOC_CLK_ENABLE();
8010d2a: 4b3e ldr r3, [pc, #248] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d2c: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8010d30: 4a3c ldr r2, [pc, #240] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d32: f043 0304 orr.w r3, r3, #4
8010d36: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
8010d3a: 4b3a ldr r3, [pc, #232] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d3c: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8010d40: f003 0304 and.w r3, r3, #4
8010d44: 617b str r3, [r7, #20]
8010d46: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
8010d48: 4b36 ldr r3, [pc, #216] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d4a: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8010d4e: 4a35 ldr r2, [pc, #212] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d50: f043 0301 orr.w r3, r3, #1
8010d54: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
8010d58: 4b32 ldr r3, [pc, #200] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d5a: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8010d5e: f003 0301 and.w r3, r3, #1
8010d62: 613b str r3, [r7, #16]
8010d64: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
8010d66: 4b2f ldr r3, [pc, #188] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d68: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8010d6c: 4a2d ldr r2, [pc, #180] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d6e: f043 0302 orr.w r3, r3, #2
8010d72: f8c2 30e0 str.w r3, [r2, #224] @ 0xe0
8010d76: 4b2b ldr r3, [pc, #172] @ (8010e24 <HAL_ETH_MspInit+0x178>)
8010d78: f8d3 30e0 ldr.w r3, [r3, #224] @ 0xe0
8010d7c: f003 0302 and.w r3, r3, #2
8010d80: 60fb str r3, [r7, #12]
8010d82: 68fb ldr r3, [r7, #12]
PB11 ------> ETH_TX_EN
PB12 ------> ETH_TXD0
PB13 ------> ETH_TXD1
PB8 ------> ETH_TXD3
*/
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4
8010d84: 233e movs r3, #62 @ 0x3e
8010d86: 627b str r3, [r7, #36] @ 0x24
|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8010d88: 2302 movs r3, #2
8010d8a: 62bb str r3, [r7, #40] @ 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8010d8c: 2300 movs r3, #0
8010d8e: 62fb str r3, [r7, #44] @ 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8010d90: 2303 movs r3, #3
8010d92: 633b str r3, [r7, #48] @ 0x30
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
8010d94: 230b movs r3, #11
8010d96: 637b str r3, [r7, #52] @ 0x34
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8010d98: f107 0324 add.w r3, r7, #36 @ 0x24
8010d9c: 4619 mov r1, r3
8010d9e: 4822 ldr r0, [pc, #136] @ (8010e28 <HAL_ETH_MspInit+0x17c>)
8010da0: f7f9 f942 bl 800a028 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
8010da4: 238f movs r3, #143 @ 0x8f
8010da6: 627b str r3, [r7, #36] @ 0x24
|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8010da8: 2302 movs r3, #2
8010daa: 62bb str r3, [r7, #40] @ 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8010dac: 2300 movs r3, #0
8010dae: 62fb str r3, [r7, #44] @ 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8010db0: 2303 movs r3, #3
8010db2: 633b str r3, [r7, #48] @ 0x30
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
8010db4: 230b movs r3, #11
8010db6: 637b str r3, [r7, #52] @ 0x34
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8010db8: f107 0324 add.w r3, r7, #36 @ 0x24
8010dbc: 4619 mov r1, r3
8010dbe: 481b ldr r0, [pc, #108] @ (8010e2c <HAL_ETH_MspInit+0x180>)
8010dc0: f7f9 f932 bl 800a028 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_11|GPIO_PIN_12
8010dc4: f643 1303 movw r3, #14595 @ 0x3903
8010dc8: 627b str r3, [r7, #36] @ 0x24
|GPIO_PIN_13|GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8010dca: 2302 movs r3, #2
8010dcc: 62bb str r3, [r7, #40] @ 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8010dce: 2300 movs r3, #0
8010dd0: 62fb str r3, [r7, #44] @ 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8010dd2: 2303 movs r3, #3
8010dd4: 633b str r3, [r7, #48] @ 0x30
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
8010dd6: 230b movs r3, #11
8010dd8: 637b str r3, [r7, #52] @ 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8010dda: f107 0324 add.w r3, r7, #36 @ 0x24
8010dde: 4619 mov r1, r3
8010de0: 4813 ldr r0, [pc, #76] @ (8010e30 <HAL_ETH_MspInit+0x184>)
8010de2: f7f9 f921 bl 800a028 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
8010de6: f44f 6380 mov.w r3, #1024 @ 0x400
8010dea: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8010dec: 2302 movs r3, #2
8010dee: 62bb str r3, [r7, #40] @ 0x28
GPIO_InitStruct.Pull = GPIO_NOPULL;
8010df0: 2300 movs r3, #0
8010df2: 62fb str r3, [r7, #44] @ 0x2c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8010df4: 2303 movs r3, #3
8010df6: 633b str r3, [r7, #48] @ 0x30
GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
8010df8: 230b movs r3, #11
8010dfa: 637b str r3, [r7, #52] @ 0x34
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8010dfc: f107 0324 add.w r3, r7, #36 @ 0x24
8010e00: 4619 mov r1, r3
8010e02: 480b ldr r0, [pc, #44] @ (8010e30 <HAL_ETH_MspInit+0x184>)
8010e04: f7f9 f910 bl 800a028 <HAL_GPIO_Init>
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
8010e08: 2200 movs r2, #0
8010e0a: 2105 movs r1, #5
8010e0c: 203d movs r0, #61 @ 0x3d
8010e0e: f7f4 fee3 bl 8005bd8 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(ETH_IRQn);
8010e12: 203d movs r0, #61 @ 0x3d
8010e14: f7f4 fefa bl 8005c0c <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN ETH_MspInit 1 */
/* USER CODE END ETH_MspInit 1 */
}
}
8010e18: bf00 nop
8010e1a: 3738 adds r7, #56 @ 0x38
8010e1c: 46bd mov sp, r7
8010e1e: bd80 pop {r7, pc}
8010e20: 40028000 .word 0x40028000
8010e24: 58024400 .word 0x58024400
8010e28: 58020800 .word 0x58020800
8010e2c: 58020000 .word 0x58020000
8010e30: 58020400 .word 0x58020400
08010e34 <ETH_PHY_IO_Init>:
* @brief Initializes the MDIO interface GPIO and clocks.
* @param None
* @retval 0 if OK, -1 if ERROR
*/
int32_t ETH_PHY_IO_Init(void)
{
8010e34: b580 push {r7, lr}
8010e36: af00 add r7, sp, #0
/* We assume that MDIO GPIO configuration is already done
in the ETH_MspInit() else it should be done here
*/
/* Configure the MDIO Clock */
HAL_ETH_SetMDIOClockRange(&heth);
8010e38: 4802 ldr r0, [pc, #8] @ (8010e44 <ETH_PHY_IO_Init+0x10>)
8010e3a: f7f8 fb15 bl 8009468 <HAL_ETH_SetMDIOClockRange>
return 0;
8010e3e: 2300 movs r3, #0
}
8010e40: 4618 mov r0, r3
8010e42: bd80 pop {r7, pc}
8010e44: 2400230c .word 0x2400230c
08010e48 <ETH_PHY_IO_DeInit>:
* @brief De-Initializes the MDIO interface .
* @param None
* @retval 0 if OK, -1 if ERROR
*/
int32_t ETH_PHY_IO_DeInit (void)
{
8010e48: b480 push {r7}
8010e4a: af00 add r7, sp, #0
return 0;
8010e4c: 2300 movs r3, #0
}
8010e4e: 4618 mov r0, r3
8010e50: 46bd mov sp, r7
8010e52: f85d 7b04 ldr.w r7, [sp], #4
8010e56: 4770 bx lr
08010e58 <ETH_PHY_IO_ReadReg>:
* @param RegAddr: PHY register address
* @param pRegVal: pointer to hold the register value
* @retval 0 if OK -1 if Error
*/
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{
8010e58: b580 push {r7, lr}
8010e5a: b084 sub sp, #16
8010e5c: af00 add r7, sp, #0
8010e5e: 60f8 str r0, [r7, #12]
8010e60: 60b9 str r1, [r7, #8]
8010e62: 607a str r2, [r7, #4]
if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
8010e64: 687b ldr r3, [r7, #4]
8010e66: 68ba ldr r2, [r7, #8]
8010e68: 68f9 ldr r1, [r7, #12]
8010e6a: 4807 ldr r0, [pc, #28] @ (8010e88 <ETH_PHY_IO_ReadReg+0x30>)
8010e6c: f7f8 f866 bl 8008f3c <HAL_ETH_ReadPHYRegister>
8010e70: 4603 mov r3, r0
8010e72: 2b00 cmp r3, #0
8010e74: d002 beq.n 8010e7c <ETH_PHY_IO_ReadReg+0x24>
{
return -1;
8010e76: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8010e7a: e000 b.n 8010e7e <ETH_PHY_IO_ReadReg+0x26>
}
return 0;
8010e7c: 2300 movs r3, #0
}
8010e7e: 4618 mov r0, r3
8010e80: 3710 adds r7, #16
8010e82: 46bd mov sp, r7
8010e84: bd80 pop {r7, pc}
8010e86: bf00 nop
8010e88: 2400230c .word 0x2400230c
08010e8c <ETH_PHY_IO_WriteReg>:
* @param RegAddr: PHY register address
* @param RegVal: Value to be written
* @retval 0 if OK -1 if Error
*/
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{
8010e8c: b580 push {r7, lr}
8010e8e: b084 sub sp, #16
8010e90: af00 add r7, sp, #0
8010e92: 60f8 str r0, [r7, #12]
8010e94: 60b9 str r1, [r7, #8]
8010e96: 607a str r2, [r7, #4]
if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
8010e98: 687b ldr r3, [r7, #4]
8010e9a: 68ba ldr r2, [r7, #8]
8010e9c: 68f9 ldr r1, [r7, #12]
8010e9e: 4807 ldr r0, [pc, #28] @ (8010ebc <ETH_PHY_IO_WriteReg+0x30>)
8010ea0: f7f8 f8a0 bl 8008fe4 <HAL_ETH_WritePHYRegister>
8010ea4: 4603 mov r3, r0
8010ea6: 2b00 cmp r3, #0
8010ea8: d002 beq.n 8010eb0 <ETH_PHY_IO_WriteReg+0x24>
{
return -1;
8010eaa: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8010eae: e000 b.n 8010eb2 <ETH_PHY_IO_WriteReg+0x26>
}
return 0;
8010eb0: 2300 movs r3, #0
}
8010eb2: 4618 mov r0, r3
8010eb4: 3710 adds r7, #16
8010eb6: 46bd mov sp, r7
8010eb8: bd80 pop {r7, pc}
8010eba: bf00 nop
8010ebc: 2400230c .word 0x2400230c
08010ec0 <ETH_PHY_IO_GetTick>:
/**
* @brief Get the time in millisecons used for internal PHY driver process.
* @retval Time value
*/
int32_t ETH_PHY_IO_GetTick(void)
{
8010ec0: b580 push {r7, lr}
8010ec2: af00 add r7, sp, #0
return HAL_GetTick();
8010ec4: f7f4 fd80 bl 80059c8 <HAL_GetTick>
8010ec8: 4603 mov r3, r0
}
8010eca: 4618 mov r0, r3
8010ecc: bd80 pop {r7, pc}
...
08010ed0 <ethernet_link_thread>:
/**
* @brief Check the ETH link state then update ETH driver and netif link accordingly.
* @retval None
*/
void ethernet_link_thread(void* argument)
{
8010ed0: b580 push {r7, lr}
8010ed2: b0a2 sub sp, #136 @ 0x88
8010ed4: af00 add r7, sp, #0
8010ed6: 6078 str r0, [r7, #4]
ETH_MACConfigTypeDef MACConf = {0};
8010ed8: f107 0310 add.w r3, r7, #16
8010edc: 2264 movs r2, #100 @ 0x64
8010ede: 2100 movs r1, #0
8010ee0: 4618 mov r0, r3
8010ee2: f019 ff35 bl 802ad50 <memset>
int32_t PHYLinkState = 0;
8010ee6: 2300 movs r3, #0
8010ee8: 67bb str r3, [r7, #120] @ 0x78
uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
8010eea: 2300 movs r3, #0
8010eec: f8c7 3084 str.w r3, [r7, #132] @ 0x84
8010ef0: 2300 movs r3, #0
8010ef2: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8010ef6: 2300 movs r3, #0
8010ef8: 67fb str r3, [r7, #124] @ 0x7c
struct netif *netif = (struct netif *) argument;
8010efa: 687b ldr r3, [r7, #4]
8010efc: 677b str r3, [r7, #116] @ 0x74
/* USER CODE BEGIN ETH link init */
#if USE_DHCP
enum dhcp_states DHCP_state = DHCP_START;
8010efe: 2301 movs r3, #1
8010f00: 73fb strb r3, [r7, #15]
// LOCK_TCPIP_CORE();
/* USER CODE END ETH link init */
for(;;)
{
PHYLinkState = DP83848_GetLinkState(&DP83848);
8010f02: 484a ldr r0, [pc, #296] @ (801102c <ethernet_link_thread+0x15c>)
8010f04: f7f4 fc88 bl 8005818 <DP83848_GetLinkState>
8010f08: 67b8 str r0, [r7, #120] @ 0x78
if(netif_is_link_up(netif) && (PHYLinkState <= DP83848_STATUS_LINK_DOWN))
8010f0a: 6f7b ldr r3, [r7, #116] @ 0x74
8010f0c: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8010f10: 089b lsrs r3, r3, #2
8010f12: f003 0301 and.w r3, r3, #1
8010f16: b2db uxtb r3, r3
8010f18: 2b00 cmp r3, #0
8010f1a: d013 beq.n 8010f44 <ethernet_link_thread+0x74>
8010f1c: 6fbb ldr r3, [r7, #120] @ 0x78
8010f1e: 2b01 cmp r3, #1
8010f20: dc10 bgt.n 8010f44 <ethernet_link_thread+0x74>
{
HAL_ETH_Stop_IT(&heth);
8010f22: 4843 ldr r0, [pc, #268] @ (8011030 <ethernet_link_thread+0x160>)
8010f24: f7f7 fc96 bl 8008854 <HAL_ETH_Stop_IT>
LOCK_TCPIP_CORE();
8010f28: f000 f936 bl 8011198 <sys_lock_tcpip_core>
netif_set_down(netif);
8010f2c: 6f78 ldr r0, [r7, #116] @ 0x74
8010f2e: f009 fe85 bl 801ac3c <netif_set_down>
netif_set_link_down(netif);
8010f32: 6f78 ldr r0, [r7, #116] @ 0x74
8010f34: f009 fef0 bl 801ad18 <netif_set_link_down>
UNLOCK_TCPIP_CORE();
8010f38: f000 f93e bl 80111b8 <sys_unlock_tcpip_core>
printf("Link down...\r\n");
8010f3c: 483d ldr r0, [pc, #244] @ (8011034 <ethernet_link_thread+0x164>)
8010f3e: f019 fddd bl 802aafc <puts>
8010f42: e067 b.n 8011014 <ethernet_link_thread+0x144>
}
else if(!netif_is_link_up(netif) && (PHYLinkState > DP83848_STATUS_LINK_DOWN))
8010f44: 6f7b ldr r3, [r7, #116] @ 0x74
8010f46: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8010f4a: f003 0304 and.w r3, r3, #4
8010f4e: 2b00 cmp r3, #0
8010f50: d160 bne.n 8011014 <ethernet_link_thread+0x144>
8010f52: 6fbb ldr r3, [r7, #120] @ 0x78
8010f54: 2b01 cmp r3, #1
8010f56: dd5d ble.n 8011014 <ethernet_link_thread+0x144>
{
switch (PHYLinkState)
8010f58: 6fbb ldr r3, [r7, #120] @ 0x78
8010f5a: 3b02 subs r3, #2
8010f5c: 2b03 cmp r3, #3
8010f5e: d833 bhi.n 8010fc8 <ethernet_link_thread+0xf8>
8010f60: a201 add r2, pc, #4 @ (adr r2, 8010f68 <ethernet_link_thread+0x98>)
8010f62: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8010f66: bf00 nop
8010f68: 08010f79 .word 0x08010f79
8010f6c: 08010f8f .word 0x08010f8f
8010f70: 08010fa3 .word 0x08010fa3
8010f74: 08010fb7 .word 0x08010fb7
{
case DP83848_STATUS_100MBITS_FULLDUPLEX:
duplex = ETH_FULLDUPLEX_MODE;
8010f78: f44f 5300 mov.w r3, #8192 @ 0x2000
8010f7c: 67fb str r3, [r7, #124] @ 0x7c
speed = ETH_SPEED_100M;
8010f7e: f44f 4380 mov.w r3, #16384 @ 0x4000
8010f82: f8c7 3080 str.w r3, [r7, #128] @ 0x80
linkchanged = 1;
8010f86: 2301 movs r3, #1
8010f88: f8c7 3084 str.w r3, [r7, #132] @ 0x84
break;
8010f8c: e01d b.n 8010fca <ethernet_link_thread+0xfa>
case DP83848_STATUS_100MBITS_HALFDUPLEX:
duplex = ETH_HALFDUPLEX_MODE;
8010f8e: 2300 movs r3, #0
8010f90: 67fb str r3, [r7, #124] @ 0x7c
speed = ETH_SPEED_100M;
8010f92: f44f 4380 mov.w r3, #16384 @ 0x4000
8010f96: f8c7 3080 str.w r3, [r7, #128] @ 0x80
linkchanged = 1;
8010f9a: 2301 movs r3, #1
8010f9c: f8c7 3084 str.w r3, [r7, #132] @ 0x84
break;
8010fa0: e013 b.n 8010fca <ethernet_link_thread+0xfa>
case DP83848_STATUS_10MBITS_FULLDUPLEX:
duplex = ETH_FULLDUPLEX_MODE;
8010fa2: f44f 5300 mov.w r3, #8192 @ 0x2000
8010fa6: 67fb str r3, [r7, #124] @ 0x7c
speed = ETH_SPEED_10M;
8010fa8: 2300 movs r3, #0
8010faa: f8c7 3080 str.w r3, [r7, #128] @ 0x80
linkchanged = 1;
8010fae: 2301 movs r3, #1
8010fb0: f8c7 3084 str.w r3, [r7, #132] @ 0x84
break;
8010fb4: e009 b.n 8010fca <ethernet_link_thread+0xfa>
case DP83848_STATUS_10MBITS_HALFDUPLEX:
duplex = ETH_HALFDUPLEX_MODE;
8010fb6: 2300 movs r3, #0
8010fb8: 67fb str r3, [r7, #124] @ 0x7c
speed = ETH_SPEED_10M;
8010fba: 2300 movs r3, #0
8010fbc: f8c7 3080 str.w r3, [r7, #128] @ 0x80
linkchanged = 1;
8010fc0: 2301 movs r3, #1
8010fc2: f8c7 3084 str.w r3, [r7, #132] @ 0x84
break;
8010fc6: e000 b.n 8010fca <ethernet_link_thread+0xfa>
default:
break;
8010fc8: bf00 nop
}
if(linkchanged)
8010fca: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
8010fce: 2b00 cmp r3, #0
8010fd0: d020 beq.n 8011014 <ethernet_link_thread+0x144>
{
/* Get MAC Config MAC */
HAL_ETH_GetMACConfig(&heth, &MACConf);
8010fd2: f107 0310 add.w r3, r7, #16
8010fd6: 4619 mov r1, r3
8010fd8: 4815 ldr r0, [pc, #84] @ (8011030 <ethernet_link_thread+0x160>)
8010fda: f7f8 f857 bl 800908c <HAL_ETH_GetMACConfig>
MACConf.DuplexMode = duplex;
8010fde: 6ffb ldr r3, [r7, #124] @ 0x7c
8010fe0: 62bb str r3, [r7, #40] @ 0x28
MACConf.Speed = speed;
8010fe2: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8010fe6: 627b str r3, [r7, #36] @ 0x24
HAL_ETH_SetMACConfig(&heth, &MACConf);
8010fe8: f107 0310 add.w r3, r7, #16
8010fec: 4619 mov r1, r3
8010fee: 4810 ldr r0, [pc, #64] @ (8011030 <ethernet_link_thread+0x160>)
8010ff0: f7f8 fa20 bl 8009434 <HAL_ETH_SetMACConfig>
HAL_ETH_Start_IT(&heth);
8010ff4: 480e ldr r0, [pc, #56] @ (8011030 <ethernet_link_thread+0x160>)
8010ff6: f7f7 fbb9 bl 800876c <HAL_ETH_Start_IT>
LOCK_TCPIP_CORE();
8010ffa: f000 f8cd bl 8011198 <sys_lock_tcpip_core>
netif_set_up(netif);
8010ffe: 6f78 ldr r0, [r7, #116] @ 0x74
8011000: f009 fdae bl 801ab60 <netif_set_up>
netif_set_link_up(netif);
8011004: 6f78 ldr r0, [r7, #116] @ 0x74
8011006: f009 fe4d bl 801aca4 <netif_set_link_up>
UNLOCK_TCPIP_CORE();
801100a: f000 f8d5 bl 80111b8 <sys_unlock_tcpip_core>
printf("Link up...\r\n");
801100e: 480a ldr r0, [pc, #40] @ (8011038 <ethernet_link_thread+0x168>)
8011010: f019 fd74 bl 802aafc <puts>
}
}
/* USER CODE BEGIN ETH link Thread core code for User BSP */
#if USE_DHCP
dhcp_sm(netif, &DHCP_state);
8011014: f107 030f add.w r3, r7, #15
8011018: 4619 mov r1, r3
801101a: 6f78 ldr r0, [r7, #116] @ 0x74
801101c: f000 f922 bl 8011264 <dhcp_sm>
#endif
/* ETH_CODE: workaround to call LOCK_TCPIP_CORE when accessing netif link functions*/
// UNLOCK_TCPIP_CORE();
osDelay(pdMS_TO_TICKS(500));
8011020: f44f 70fa mov.w r0, #500 @ 0x1f4
8011024: f000 faff bl 8011626 <osDelay>
// LOCK_TCPIP_CORE();
continue; /* skip next osDelay */
8011028: bf00 nop
PHYLinkState = DP83848_GetLinkState(&DP83848);
801102a: e76a b.n 8010f02 <ethernet_link_thread+0x32>
801102c: 240023f4 .word 0x240023f4
8011030: 2400230c .word 0x2400230c
8011034: 0802dc9c .word 0x0802dc9c
8011038: 0802dcac .word 0x0802dcac
0801103c <ethernetif_notify_conn_changed>:
* @brief This function notify user about link status changement.
* @param netif: the network interface
* @retval None
*/
__weak void ethernetif_notify_conn_changed(struct netif *netif)
{
801103c: b480 push {r7}
801103e: b083 sub sp, #12
8011040: af00 add r7, sp, #0
8011042: 6078 str r0, [r7, #4]
/* NOTE : This is function could be implemented in user file
when the callback is needed,
*/
}
8011044: bf00 nop
8011046: 370c adds r7, #12
8011048: 46bd mov sp, r7
801104a: f85d 7b04 ldr.w r7, [sp], #4
801104e: 4770 bx lr
08011050 <HAL_ETH_RxAllocateCallback>:
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{
8011050: b580 push {r7, lr}
8011052: b086 sub sp, #24
8011054: af02 add r7, sp, #8
8011056: 6078 str r0, [r7, #4]
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
8011058: 4812 ldr r0, [pc, #72] @ (80110a4 <HAL_ETH_RxAllocateCallback+0x54>)
801105a: f009 fae9 bl 801a630 <memp_malloc_pool>
801105e: 60f8 str r0, [r7, #12]
if (p)
8011060: 68fb ldr r3, [r7, #12]
8011062: 2b00 cmp r3, #0
8011064: d014 beq.n 8011090 <HAL_ETH_RxAllocateCallback+0x40>
{
/* Get the buff from the struct pbuf address. */
*buff = (uint8_t *)p + offsetof(RxBuff_t, buff);
8011066: 68fb ldr r3, [r7, #12]
8011068: f103 0220 add.w r2, r3, #32
801106c: 687b ldr r3, [r7, #4]
801106e: 601a str r2, [r3, #0]
p->custom_free_function = pbuf_free_custom;
8011070: 68fb ldr r3, [r7, #12]
8011072: 4a0d ldr r2, [pc, #52] @ (80110a8 <HAL_ETH_RxAllocateCallback+0x58>)
8011074: 611a str r2, [r3, #16]
/* Initialize the struct pbuf.
* This must be performed whenever a buffer's allocated because it may be
* changed by lwIP or the app, e.g., pbuf_free decrements ref. */
pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUFFER_SIZE);
8011076: 687b ldr r3, [r7, #4]
8011078: 681b ldr r3, [r3, #0]
801107a: f44f 62c0 mov.w r2, #1536 @ 0x600
801107e: 9201 str r2, [sp, #4]
8011080: 9300 str r3, [sp, #0]
8011082: 68fb ldr r3, [r7, #12]
8011084: 2241 movs r2, #65 @ 0x41
8011086: 2100 movs r1, #0
8011088: 2000 movs r0, #0
801108a: f00a f86d bl 801b168 <pbuf_alloced_custom>
{
RxAllocStatus = RX_ALLOC_ERROR;
*buff = NULL;
}
/* USER CODE END HAL ETH RxAllocateCallback */
}
801108e: e005 b.n 801109c <HAL_ETH_RxAllocateCallback+0x4c>
RxAllocStatus = RX_ALLOC_ERROR;
8011090: 4b06 ldr r3, [pc, #24] @ (80110ac <HAL_ETH_RxAllocateCallback+0x5c>)
8011092: 2201 movs r2, #1
8011094: 701a strb r2, [r3, #0]
*buff = NULL;
8011096: 687b ldr r3, [r7, #4]
8011098: 2200 movs r2, #0
801109a: 601a str r2, [r3, #0]
}
801109c: bf00 nop
801109e: 3710 adds r7, #16
80110a0: 46bd mov sp, r7
80110a2: bd80 pop {r7, pc}
80110a4: 08031d1c .word 0x08031d1c
80110a8: 08010c5d .word 0x08010c5d
80110ac: 24002300 .word 0x24002300
080110b0 <HAL_ETH_RxLinkCallback>:
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{
80110b0: b480 push {r7}
80110b2: b08d sub sp, #52 @ 0x34
80110b4: af00 add r7, sp, #0
80110b6: 60f8 str r0, [r7, #12]
80110b8: 60b9 str r1, [r7, #8]
80110ba: 607a str r2, [r7, #4]
80110bc: 807b strh r3, [r7, #2]
/* USER CODE BEGIN HAL ETH RxLinkCallback */
struct pbuf **ppStart = (struct pbuf **)pStart;
80110be: 68fb ldr r3, [r7, #12]
80110c0: 62bb str r3, [r7, #40] @ 0x28
struct pbuf **ppEnd = (struct pbuf **)pEnd;
80110c2: 68bb ldr r3, [r7, #8]
80110c4: 627b str r3, [r7, #36] @ 0x24
struct pbuf *p = NULL;
80110c6: 2300 movs r3, #0
80110c8: 62fb str r3, [r7, #44] @ 0x2c
/* Get the struct pbuf from the buff address. */
p = (struct pbuf *)(buff - offsetof(RxBuff_t, buff));
80110ca: 687b ldr r3, [r7, #4]
80110cc: 3b20 subs r3, #32
80110ce: 62fb str r3, [r7, #44] @ 0x2c
p->next = NULL;
80110d0: 6afb ldr r3, [r7, #44] @ 0x2c
80110d2: 2200 movs r2, #0
80110d4: 601a str r2, [r3, #0]
p->tot_len = 0;
80110d6: 6afb ldr r3, [r7, #44] @ 0x2c
80110d8: 2200 movs r2, #0
80110da: 811a strh r2, [r3, #8]
p->len = Length;
80110dc: 6afb ldr r3, [r7, #44] @ 0x2c
80110de: 887a ldrh r2, [r7, #2]
80110e0: 815a strh r2, [r3, #10]
/* Chain the buffer. */
if (!*ppStart)
80110e2: 6abb ldr r3, [r7, #40] @ 0x28
80110e4: 681b ldr r3, [r3, #0]
80110e6: 2b00 cmp r3, #0
80110e8: d103 bne.n 80110f2 <HAL_ETH_RxLinkCallback+0x42>
{
/* The first buffer of the packet. */
*ppStart = p;
80110ea: 6abb ldr r3, [r7, #40] @ 0x28
80110ec: 6afa ldr r2, [r7, #44] @ 0x2c
80110ee: 601a str r2, [r3, #0]
80110f0: e003 b.n 80110fa <HAL_ETH_RxLinkCallback+0x4a>
}
else
{
/* Chain the buffer to the end of the packet. */
(*ppEnd)->next = p;
80110f2: 6a7b ldr r3, [r7, #36] @ 0x24
80110f4: 681b ldr r3, [r3, #0]
80110f6: 6afa ldr r2, [r7, #44] @ 0x2c
80110f8: 601a str r2, [r3, #0]
}
*ppEnd = p;
80110fa: 6a7b ldr r3, [r7, #36] @ 0x24
80110fc: 6afa ldr r2, [r7, #44] @ 0x2c
80110fe: 601a str r2, [r3, #0]
/* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len
* set to its own length, plus the length of all the following pbufs in the chain. */
for (p = *ppStart; p != NULL; p = p->next)
8011100: 6abb ldr r3, [r7, #40] @ 0x28
8011102: 681b ldr r3, [r3, #0]
8011104: 62fb str r3, [r7, #44] @ 0x2c
8011106: e009 b.n 801111c <HAL_ETH_RxLinkCallback+0x6c>
{
p->tot_len += Length;
8011108: 6afb ldr r3, [r7, #44] @ 0x2c
801110a: 891a ldrh r2, [r3, #8]
801110c: 887b ldrh r3, [r7, #2]
801110e: 4413 add r3, r2
8011110: b29a uxth r2, r3
8011112: 6afb ldr r3, [r7, #44] @ 0x2c
8011114: 811a strh r2, [r3, #8]
for (p = *ppStart; p != NULL; p = p->next)
8011116: 6afb ldr r3, [r7, #44] @ 0x2c
8011118: 681b ldr r3, [r3, #0]
801111a: 62fb str r3, [r7, #44] @ 0x2c
801111c: 6afb ldr r3, [r7, #44] @ 0x2c
801111e: 2b00 cmp r3, #0
8011120: d1f2 bne.n 8011108 <HAL_ETH_RxLinkCallback+0x58>
}
/* Invalidate data cache because Rx DMA's writing to physical memory makes it stale. */
SCB_InvalidateDCache_by_Addr((uint32_t *)buff, Length);
8011122: 887b ldrh r3, [r7, #2]
8011124: 687a ldr r2, [r7, #4]
8011126: 623a str r2, [r7, #32]
8011128: 61fb str r3, [r7, #28]
if ( dsize > 0 ) {
801112a: 69fb ldr r3, [r7, #28]
801112c: 2b00 cmp r3, #0
801112e: dd1d ble.n 801116c <HAL_ETH_RxLinkCallback+0xbc>
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
8011130: 6a3b ldr r3, [r7, #32]
8011132: f003 021f and.w r2, r3, #31
8011136: 69fb ldr r3, [r7, #28]
8011138: 4413 add r3, r2
801113a: 61bb str r3, [r7, #24]
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
801113c: 6a3b ldr r3, [r7, #32]
801113e: 617b str r3, [r7, #20]
__ASM volatile ("dsb 0xF":::"memory");
8011140: f3bf 8f4f dsb sy
}
8011144: bf00 nop
SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
8011146: 4a0d ldr r2, [pc, #52] @ (801117c <HAL_ETH_RxLinkCallback+0xcc>)
8011148: 697b ldr r3, [r7, #20]
801114a: f8c2 325c str.w r3, [r2, #604] @ 0x25c
op_addr += __SCB_DCACHE_LINE_SIZE;
801114e: 697b ldr r3, [r7, #20]
8011150: 3320 adds r3, #32
8011152: 617b str r3, [r7, #20]
op_size -= __SCB_DCACHE_LINE_SIZE;
8011154: 69bb ldr r3, [r7, #24]
8011156: 3b20 subs r3, #32
8011158: 61bb str r3, [r7, #24]
} while ( op_size > 0 );
801115a: 69bb ldr r3, [r7, #24]
801115c: 2b00 cmp r3, #0
801115e: dcf2 bgt.n 8011146 <HAL_ETH_RxLinkCallback+0x96>
__ASM volatile ("dsb 0xF":::"memory");
8011160: f3bf 8f4f dsb sy
}
8011164: bf00 nop
__ASM volatile ("isb 0xF":::"memory");
8011166: f3bf 8f6f isb sy
}
801116a: bf00 nop
}
801116c: bf00 nop
/* USER CODE END HAL ETH RxLinkCallback */
}
801116e: bf00 nop
8011170: 3734 adds r7, #52 @ 0x34
8011172: 46bd mov sp, r7
8011174: f85d 7b04 ldr.w r7, [sp], #4
8011178: 4770 bx lr
801117a: bf00 nop
801117c: e000ed00 .word 0xe000ed00
08011180 <HAL_ETH_TxFreeCallback>:
void HAL_ETH_TxFreeCallback(uint32_t * buff)
{
8011180: b580 push {r7, lr}
8011182: b082 sub sp, #8
8011184: af00 add r7, sp, #0
8011186: 6078 str r0, [r7, #4]
/* USER CODE BEGIN HAL ETH TxFreeCallback */
pbuf_free((struct pbuf *)buff);
8011188: 6878 ldr r0, [r7, #4]
801118a: f00a f9d7 bl 801b53c <pbuf_free>
/* USER CODE END HAL ETH TxFreeCallback */
}
801118e: bf00 nop
8011190: 3708 adds r7, #8
8011192: 46bd mov sp, r7
8011194: bd80 pop {r7, pc}
...
08011198 <sys_lock_tcpip_core>:
/* ETH_CODE: add functions needed for proper multithreading support and check */
static osThreadId_t lwip_core_lock_holder_thread_id;
static osThreadId_t lwip_tcpip_thread_id;
void sys_lock_tcpip_core(void){
8011198: b580 push {r7, lr}
801119a: af00 add r7, sp, #0
sys_mutex_lock(&lock_tcpip_core);
801119c: 4804 ldr r0, [pc, #16] @ (80111b0 <sys_lock_tcpip_core+0x18>)
801119e: f016 f973 bl 8027488 <sys_mutex_lock>
lwip_core_lock_holder_thread_id = osThreadGetId();
80111a2: f000 fa35 bl 8011610 <osThreadGetId>
80111a6: 4603 mov r3, r0
80111a8: 4a02 ldr r2, [pc, #8] @ (80111b4 <sys_lock_tcpip_core+0x1c>)
80111aa: 6013 str r3, [r2, #0]
}
80111ac: bf00 nop
80111ae: bd80 pop {r7, pc}
80111b0: 24024454 .word 0x24024454
80111b4: 24002414 .word 0x24002414
080111b8 <sys_unlock_tcpip_core>:
void sys_unlock_tcpip_core(void){
80111b8: b580 push {r7, lr}
80111ba: af00 add r7, sp, #0
lwip_core_lock_holder_thread_id = 0;
80111bc: 4b03 ldr r3, [pc, #12] @ (80111cc <sys_unlock_tcpip_core+0x14>)
80111be: 2200 movs r2, #0
80111c0: 601a str r2, [r3, #0]
sys_mutex_unlock(&lock_tcpip_core);
80111c2: 4803 ldr r0, [pc, #12] @ (80111d0 <sys_unlock_tcpip_core+0x18>)
80111c4: f016 f96f bl 80274a6 <sys_mutex_unlock>
}
80111c8: bf00 nop
80111ca: bd80 pop {r7, pc}
80111cc: 24002414 .word 0x24002414
80111d0: 24024454 .word 0x24024454
080111d4 <sys_check_core_locking>:
void sys_check_core_locking(void){
80111d4: b580 push {r7, lr}
80111d6: b082 sub sp, #8
80111d8: af00 add r7, sp, #0
/* Embedded systems should check we are NOT in an interrupt context here */
LWIP_ASSERT("Function called from interrupt context", (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0);
80111da: 4b15 ldr r3, [pc, #84] @ (8011230 <sys_check_core_locking+0x5c>)
80111dc: 685b ldr r3, [r3, #4]
80111de: f3c3 0308 ubfx r3, r3, #0, #9
80111e2: 2b00 cmp r3, #0
80111e4: d006 beq.n 80111f4 <sys_check_core_locking+0x20>
80111e6: 4b13 ldr r3, [pc, #76] @ (8011234 <sys_check_core_locking+0x60>)
80111e8: f240 4216 movw r2, #1046 @ 0x416
80111ec: 4912 ldr r1, [pc, #72] @ (8011238 <sys_check_core_locking+0x64>)
80111ee: 4813 ldr r0, [pc, #76] @ (801123c <sys_check_core_locking+0x68>)
80111f0: f019 fc1c bl 802aa2c <iprintf>
if (lwip_tcpip_thread_id != 0) {
80111f4: 4b12 ldr r3, [pc, #72] @ (8011240 <sys_check_core_locking+0x6c>)
80111f6: 681b ldr r3, [r3, #0]
80111f8: 2b00 cmp r3, #0
80111fa: d014 beq.n 8011226 <sys_check_core_locking+0x52>
osThreadId_t current_thread_id = osThreadGetId();
80111fc: f000 fa08 bl 8011610 <osThreadGetId>
8011200: 6078 str r0, [r7, #4]
#if LWIP_TCPIP_CORE_LOCKING
LWIP_ASSERT("Function called without core lock", current_thread_id == lwip_core_lock_holder_thread_id);
8011202: 4b10 ldr r3, [pc, #64] @ (8011244 <sys_check_core_locking+0x70>)
8011204: 681b ldr r3, [r3, #0]
8011206: 687a ldr r2, [r7, #4]
8011208: 429a cmp r2, r3
801120a: d006 beq.n 801121a <sys_check_core_locking+0x46>
801120c: 4b09 ldr r3, [pc, #36] @ (8011234 <sys_check_core_locking+0x60>)
801120e: f240 421c movw r2, #1052 @ 0x41c
8011212: 490d ldr r1, [pc, #52] @ (8011248 <sys_check_core_locking+0x74>)
8011214: 4809 ldr r0, [pc, #36] @ (801123c <sys_check_core_locking+0x68>)
8011216: f019 fc09 bl 802aa2c <iprintf>
/* ETH_CODE: to easily check that example has correct handling of core lock
* This will trigger breakpoint (__BKPT)
*/
#warning Below check should be removed in production code
if(current_thread_id != lwip_core_lock_holder_thread_id) __BKPT(0);
801121a: 4b0a ldr r3, [pc, #40] @ (8011244 <sys_check_core_locking+0x70>)
801121c: 681b ldr r3, [r3, #0]
801121e: 687a ldr r2, [r7, #4]
8011220: 429a cmp r2, r3
8011222: d000 beq.n 8011226 <sys_check_core_locking+0x52>
8011224: be00 bkpt 0x0000
#else /* LWIP_TCPIP_CORE_LOCKING */
LWIP_ASSERT("Function called from wrong thread", current_thread_id == lwip_tcpip_thread_id);
#endif /* LWIP_TCPIP_CORE_LOCKING */
LWIP_UNUSED_ARG(current_thread_id); /* for LWIP_NOASSERT */
}
}
8011226: bf00 nop
8011228: 3708 adds r7, #8
801122a: 46bd mov sp, r7
801122c: bd80 pop {r7, pc}
801122e: bf00 nop
8011230: e000ed00 .word 0xe000ed00
8011234: 0802dc48 .word 0x0802dc48
8011238: 0802dcb8 .word 0x0802dcb8
801123c: 0802dc74 .word 0x0802dc74
8011240: 24002418 .word 0x24002418
8011244: 24002414 .word 0x24002414
8011248: 0802dce0 .word 0x0802dce0
0801124c <sys_mark_tcpip_thread>:
void sys_mark_tcpip_thread(void){
801124c: b580 push {r7, lr}
801124e: af00 add r7, sp, #0
lwip_tcpip_thread_id = osThreadGetId();
8011250: f000 f9de bl 8011610 <osThreadGetId>
8011254: 4603 mov r3, r0
8011256: 4a02 ldr r2, [pc, #8] @ (8011260 <sys_mark_tcpip_thread+0x14>)
8011258: 6013 str r3, [r2, #0]
}
801125a: bf00 nop
801125c: bd80 pop {r7, pc}
801125e: bf00 nop
8011260: 24002418 .word 0x24002418
08011264 <dhcp_sm>:
#if USE_DHCP
void dhcp_sm(struct netif *netif, enum dhcp_states *state)
{
8011264: b580 push {r7, lr}
8011266: b08c sub sp, #48 @ 0x30
8011268: af00 add r7, sp, #0
801126a: 6078 str r0, [r7, #4]
801126c: 6039 str r1, [r7, #0]
ip_addr_t gw;
#ifdef DHCP_USER_LOGS
uint8_t iptxt[20];
#endif
switch(*state)
801126e: 683b ldr r3, [r7, #0]
8011270: 781b ldrb r3, [r3, #0]
8011272: 2b03 cmp r3, #3
8011274: d072 beq.n 801135c <dhcp_sm+0xf8>
8011276: 2b03 cmp r3, #3
8011278: dc7b bgt.n 8011372 <dhcp_sm+0x10e>
801127a: 2b01 cmp r3, #1
801127c: d002 beq.n 8011284 <dhcp_sm+0x20>
801127e: 2b02 cmp r3, #2
8011280: d00a beq.n 8011298 <dhcp_sm+0x34>
{
*state = DHCP_START;
}
break;
default:
break;
8011282: e076 b.n 8011372 <dhcp_sm+0x10e>
*state = DHCP_WAIT_ADDRESS;
8011284: 683b ldr r3, [r7, #0]
8011286: 2202 movs r2, #2
8011288: 701a strb r2, [r3, #0]
dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
801128a: 687b ldr r3, [r7, #4]
801128c: 6a5b ldr r3, [r3, #36] @ 0x24
801128e: 62fb str r3, [r7, #44] @ 0x2c
printf(" State: Looking for DHCP server ...\n");
8011290: 483c ldr r0, [pc, #240] @ (8011384 <dhcp_sm+0x120>)
8011292: f019 fc33 bl 802aafc <puts>
break;
8011296: e071 b.n 801137c <dhcp_sm+0x118>
if (dhcp_supplied_address(netif))
8011298: 6878 ldr r0, [r7, #4]
801129a: f013 fa59 bl 8024750 <dhcp_supplied_address>
801129e: 4603 mov r3, r0
80112a0: 2b00 cmp r3, #0
80112a2: d015 beq.n 80112d0 <dhcp_sm+0x6c>
*state = DHCP_ADDRESS_ASSIGNED;
80112a4: 683b ldr r3, [r7, #0]
80112a6: 2203 movs r2, #3
80112a8: 701a strb r2, [r3, #0]
sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
80112aa: 687b ldr r3, [r7, #4]
80112ac: 3304 adds r3, #4
80112ae: 4618 mov r0, r3
80112b0: f014 ffe6 bl 8026280 <ip4addr_ntoa>
80112b4: 4602 mov r2, r0
80112b6: f107 030c add.w r3, r7, #12
80112ba: 4933 ldr r1, [pc, #204] @ (8011388 <dhcp_sm+0x124>)
80112bc: 4618 mov r0, r3
80112be: f019 fc25 bl 802ab0c <siprintf>
printf("IP address assigned by a DHCP server: %s\n", iptxt);
80112c2: f107 030c add.w r3, r7, #12
80112c6: 4619 mov r1, r3
80112c8: 4830 ldr r0, [pc, #192] @ (801138c <dhcp_sm+0x128>)
80112ca: f019 fbaf bl 802aa2c <iprintf>
break;
80112ce: e052 b.n 8011376 <dhcp_sm+0x112>
dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
80112d0: 687b ldr r3, [r7, #4]
80112d2: 6a5b ldr r3, [r3, #36] @ 0x24
80112d4: 62fb str r3, [r7, #44] @ 0x2c
if (dhcp->tries > MAX_DHCP_TRIES)
80112d6: 6afb ldr r3, [r7, #44] @ 0x2c
80112d8: 799b ldrb r3, [r3, #6]
80112da: 2b04 cmp r3, #4
80112dc: d94b bls.n 8011376 <dhcp_sm+0x112>
*state = DHCP_TIMEOUT;
80112de: 683b ldr r3, [r7, #0]
80112e0: 2204 movs r2, #4
80112e2: 701a strb r2, [r3, #0]
LOCK_TCPIP_CORE();
80112e4: f7ff ff58 bl 8011198 <sys_lock_tcpip_core>
dhcp_stop(netif);
80112e8: 6878 ldr r0, [r7, #4]
80112ea: f012 fc89 bl 8023c00 <dhcp_stop>
UNLOCK_TCPIP_CORE();
80112ee: f7ff ff63 bl 80111b8 <sys_unlock_tcpip_core>
ipaddr_aton(STATIC_IP, &ipaddr);
80112f2: f107 0328 add.w r3, r7, #40 @ 0x28
80112f6: 4619 mov r1, r3
80112f8: 4825 ldr r0, [pc, #148] @ (8011390 <dhcp_sm+0x12c>)
80112fa: f014 fe97 bl 802602c <ip4addr_aton>
ipaddr_aton(STATIC_MASK, &netmask);
80112fe: f107 0324 add.w r3, r7, #36 @ 0x24
8011302: 4619 mov r1, r3
8011304: 4823 ldr r0, [pc, #140] @ (8011394 <dhcp_sm+0x130>)
8011306: f014 fe91 bl 802602c <ip4addr_aton>
ipaddr_aton(STATIC_GW, &gw);
801130a: f107 0320 add.w r3, r7, #32
801130e: 4619 mov r1, r3
8011310: 4821 ldr r0, [pc, #132] @ (8011398 <dhcp_sm+0x134>)
8011312: f014 fe8b bl 802602c <ip4addr_aton>
LOCK_TCPIP_CORE();
8011316: f7ff ff3f bl 8011198 <sys_lock_tcpip_core>
netif_set_addr(netif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
801131a: f107 0320 add.w r3, r7, #32
801131e: f107 0224 add.w r2, r7, #36 @ 0x24
8011322: f107 0128 add.w r1, r7, #40 @ 0x28
8011326: 6878 ldr r0, [r7, #4]
8011328: f009 fbbe bl 801aaa8 <netif_set_addr>
UNLOCK_TCPIP_CORE();
801132c: f7ff ff44 bl 80111b8 <sys_unlock_tcpip_core>
sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
8011330: 687b ldr r3, [r7, #4]
8011332: 3304 adds r3, #4
8011334: 4618 mov r0, r3
8011336: f014 ffa3 bl 8026280 <ip4addr_ntoa>
801133a: 4602 mov r2, r0
801133c: f107 030c add.w r3, r7, #12
8011340: 4911 ldr r1, [pc, #68] @ (8011388 <dhcp_sm+0x124>)
8011342: 4618 mov r0, r3
8011344: f019 fbe2 bl 802ab0c <siprintf>
printf("DHCP Timeout !! \n");
8011348: 4814 ldr r0, [pc, #80] @ (801139c <dhcp_sm+0x138>)
801134a: f019 fbd7 bl 802aafc <puts>
printf("Static IP address: %s\n", iptxt);
801134e: f107 030c add.w r3, r7, #12
8011352: 4619 mov r1, r3
8011354: 4812 ldr r0, [pc, #72] @ (80113a0 <dhcp_sm+0x13c>)
8011356: f019 fb69 bl 802aa2c <iprintf>
break;
801135a: e00c b.n 8011376 <dhcp_sm+0x112>
dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
801135c: 687b ldr r3, [r7, #4]
801135e: 6a5b ldr r3, [r3, #36] @ 0x24
8011360: 62fb str r3, [r7, #44] @ 0x2c
if(dhcp->state == 3)
8011362: 6afb ldr r3, [r7, #44] @ 0x2c
8011364: 795b ldrb r3, [r3, #5]
8011366: 2b03 cmp r3, #3
8011368: d107 bne.n 801137a <dhcp_sm+0x116>
*state = DHCP_START;
801136a: 683b ldr r3, [r7, #0]
801136c: 2201 movs r2, #1
801136e: 701a strb r2, [r3, #0]
break;
8011370: e003 b.n 801137a <dhcp_sm+0x116>
break;
8011372: bf00 nop
8011374: e002 b.n 801137c <dhcp_sm+0x118>
break;
8011376: bf00 nop
8011378: e000 b.n 801137c <dhcp_sm+0x118>
break;
801137a: bf00 nop
}
}
801137c: bf00 nop
801137e: 3730 adds r7, #48 @ 0x30
8011380: 46bd mov sp, r7
8011382: bd80 pop {r7, pc}
8011384: 0802dd04 .word 0x0802dd04
8011388: 0802dd2c .word 0x0802dd2c
801138c: 0802dd30 .word 0x0802dd30
8011390: 0802dd5c .word 0x0802dd5c
8011394: 0802dd6c .word 0x0802dd6c
8011398: 0802dd7c .word 0x0802dd7c
801139c: 0802dd88 .word 0x0802dd88
80113a0: 0802dd9c .word 0x0802dd9c
080113a4 <__NVIC_SetPriority>:
{
80113a4: b480 push {r7}
80113a6: b083 sub sp, #12
80113a8: af00 add r7, sp, #0
80113aa: 4603 mov r3, r0
80113ac: 6039 str r1, [r7, #0]
80113ae: 80fb strh r3, [r7, #6]
if ((int32_t)(IRQn) >= 0)
80113b0: f9b7 3006 ldrsh.w r3, [r7, #6]
80113b4: 2b00 cmp r3, #0
80113b6: db0a blt.n 80113ce <__NVIC_SetPriority+0x2a>
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80113b8: 683b ldr r3, [r7, #0]
80113ba: b2da uxtb r2, r3
80113bc: 490c ldr r1, [pc, #48] @ (80113f0 <__NVIC_SetPriority+0x4c>)
80113be: f9b7 3006 ldrsh.w r3, [r7, #6]
80113c2: 0112 lsls r2, r2, #4
80113c4: b2d2 uxtb r2, r2
80113c6: 440b add r3, r1
80113c8: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
80113cc: e00a b.n 80113e4 <__NVIC_SetPriority+0x40>
SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80113ce: 683b ldr r3, [r7, #0]
80113d0: b2da uxtb r2, r3
80113d2: 4908 ldr r1, [pc, #32] @ (80113f4 <__NVIC_SetPriority+0x50>)
80113d4: 88fb ldrh r3, [r7, #6]
80113d6: f003 030f and.w r3, r3, #15
80113da: 3b04 subs r3, #4
80113dc: 0112 lsls r2, r2, #4
80113de: b2d2 uxtb r2, r2
80113e0: 440b add r3, r1
80113e2: 761a strb r2, [r3, #24]
}
80113e4: bf00 nop
80113e6: 370c adds r7, #12
80113e8: 46bd mov sp, r7
80113ea: f85d 7b04 ldr.w r7, [sp], #4
80113ee: 4770 bx lr
80113f0: e000e100 .word 0xe000e100
80113f4: e000ed00 .word 0xe000ed00
080113f8 <SysTick_Handler>:
/*
SysTick handler implementation that also clears overflow flag.
*/
#if (USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION == 0)
void SysTick_Handler (void) {
80113f8: b580 push {r7, lr}
80113fa: af00 add r7, sp, #0
/* Clear overflow flag */
SysTick->CTRL;
80113fc: 4b05 ldr r3, [pc, #20] @ (8011414 <SysTick_Handler+0x1c>)
80113fe: 681b ldr r3, [r3, #0]
if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
8011400: f003 fa3c bl 801487c <xTaskGetSchedulerState>
8011404: 4603 mov r3, r0
8011406: 2b01 cmp r3, #1
8011408: d001 beq.n 801140e <SysTick_Handler+0x16>
/* Call tick handler */
xPortSysTickHandler();
801140a: f004 fc4d bl 8015ca8 <xPortSysTickHandler>
}
}
801140e: bf00 nop
8011410: bd80 pop {r7, pc}
8011412: bf00 nop
8011414: e000e010 .word 0xe000e010
08011418 <SVC_Setup>:
#endif /* SysTick */
/*
Setup SVC to reset value.
*/
__STATIC_INLINE void SVC_Setup (void) {
8011418: b580 push {r7, lr}
801141a: af00 add r7, sp, #0
#if (__ARM_ARCH_7A__ == 0U)
/* Service Call interrupt might be configured before kernel start */
/* and when its priority is lower or equal to BASEPRI, svc intruction */
/* causes a Hard Fault. */
NVIC_SetPriority (SVCall_IRQ_NBR, 0U);
801141c: 2100 movs r1, #0
801141e: f06f 0004 mvn.w r0, #4
8011422: f7ff ffbf bl 80113a4 <__NVIC_SetPriority>
#endif
}
8011426: bf00 nop
8011428: bd80 pop {r7, pc}
...
0801142c <osKernelInitialize>:
static uint32_t OS_Tick_GetOverflow (void);
/* Get OS Tick interval */
static uint32_t OS_Tick_GetInterval (void);
/*---------------------------------------------------------------------------*/
osStatus_t osKernelInitialize (void) {
801142c: b480 push {r7}
801142e: b083 sub sp, #12
8011430: af00 add r7, sp, #0
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011432: f3ef 8305 mrs r3, IPSR
8011436: 603b str r3, [r7, #0]
return(result);
8011438: 683b ldr r3, [r7, #0]
osStatus_t stat;
if (IS_IRQ()) {
801143a: 2b00 cmp r3, #0
801143c: d003 beq.n 8011446 <osKernelInitialize+0x1a>
stat = osErrorISR;
801143e: f06f 0305 mvn.w r3, #5
8011442: 607b str r3, [r7, #4]
8011444: e00c b.n 8011460 <osKernelInitialize+0x34>
}
else {
if (KernelState == osKernelInactive) {
8011446: 4b0a ldr r3, [pc, #40] @ (8011470 <osKernelInitialize+0x44>)
8011448: 681b ldr r3, [r3, #0]
801144a: 2b00 cmp r3, #0
801144c: d105 bne.n 801145a <osKernelInitialize+0x2e>
EvrFreeRTOSSetup(0U);
#endif
#if defined(USE_FreeRTOS_HEAP_5) && (HEAP_5_REGION_SETUP == 1)
vPortDefineHeapRegions (configHEAP_5_REGIONS);
#endif
KernelState = osKernelReady;
801144e: 4b08 ldr r3, [pc, #32] @ (8011470 <osKernelInitialize+0x44>)
8011450: 2201 movs r2, #1
8011452: 601a str r2, [r3, #0]
stat = osOK;
8011454: 2300 movs r3, #0
8011456: 607b str r3, [r7, #4]
8011458: e002 b.n 8011460 <osKernelInitialize+0x34>
} else {
stat = osError;
801145a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
801145e: 607b str r3, [r7, #4]
}
}
return (stat);
8011460: 687b ldr r3, [r7, #4]
}
8011462: 4618 mov r0, r3
8011464: 370c adds r7, #12
8011466: 46bd mov sp, r7
8011468: f85d 7b04 ldr.w r7, [sp], #4
801146c: 4770 bx lr
801146e: bf00 nop
8011470: 2400241c .word 0x2400241c
08011474 <osKernelStart>:
}
return (state);
}
osStatus_t osKernelStart (void) {
8011474: b580 push {r7, lr}
8011476: b082 sub sp, #8
8011478: af00 add r7, sp, #0
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
801147a: f3ef 8305 mrs r3, IPSR
801147e: 603b str r3, [r7, #0]
return(result);
8011480: 683b ldr r3, [r7, #0]
osStatus_t stat;
if (IS_IRQ()) {
8011482: 2b00 cmp r3, #0
8011484: d003 beq.n 801148e <osKernelStart+0x1a>
stat = osErrorISR;
8011486: f06f 0305 mvn.w r3, #5
801148a: 607b str r3, [r7, #4]
801148c: e010 b.n 80114b0 <osKernelStart+0x3c>
}
else {
if (KernelState == osKernelReady) {
801148e: 4b0b ldr r3, [pc, #44] @ (80114bc <osKernelStart+0x48>)
8011490: 681b ldr r3, [r3, #0]
8011492: 2b01 cmp r3, #1
8011494: d109 bne.n 80114aa <osKernelStart+0x36>
/* Ensure SVC priority is at the reset value */
SVC_Setup();
8011496: f7ff ffbf bl 8011418 <SVC_Setup>
/* Change state to enable IRQ masking check */
KernelState = osKernelRunning;
801149a: 4b08 ldr r3, [pc, #32] @ (80114bc <osKernelStart+0x48>)
801149c: 2202 movs r2, #2
801149e: 601a str r2, [r3, #0]
/* Start the kernel scheduler */
vTaskStartScheduler();
80114a0: f002 fd30 bl 8013f04 <vTaskStartScheduler>
stat = osOK;
80114a4: 2300 movs r3, #0
80114a6: 607b str r3, [r7, #4]
80114a8: e002 b.n 80114b0 <osKernelStart+0x3c>
} else {
stat = osError;
80114aa: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80114ae: 607b str r3, [r7, #4]
}
}
return (stat);
80114b0: 687b ldr r3, [r7, #4]
}
80114b2: 4618 mov r0, r3
80114b4: 3708 adds r7, #8
80114b6: 46bd mov sp, r7
80114b8: bd80 pop {r7, pc}
80114ba: bf00 nop
80114bc: 2400241c .word 0x2400241c
080114c0 <osKernelGetTickCount>:
}
return (lock);
}
uint32_t osKernelGetTickCount (void) {
80114c0: b580 push {r7, lr}
80114c2: b082 sub sp, #8
80114c4: af00 add r7, sp, #0
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
80114c6: f3ef 8305 mrs r3, IPSR
80114ca: 603b str r3, [r7, #0]
return(result);
80114cc: 683b ldr r3, [r7, #0]
TickType_t ticks;
if (IS_IRQ()) {
80114ce: 2b00 cmp r3, #0
80114d0: d003 beq.n 80114da <osKernelGetTickCount+0x1a>
ticks = xTaskGetTickCountFromISR();
80114d2: f002 fe43 bl 801415c <xTaskGetTickCountFromISR>
80114d6: 6078 str r0, [r7, #4]
80114d8: e002 b.n 80114e0 <osKernelGetTickCount+0x20>
} else {
ticks = xTaskGetTickCount();
80114da: f002 fe2f bl 801413c <xTaskGetTickCount>
80114de: 6078 str r0, [r7, #4]
}
return (ticks);
80114e0: 687b ldr r3, [r7, #4]
}
80114e2: 4618 mov r0, r3
80114e4: 3708 adds r7, #8
80114e6: 46bd mov sp, r7
80114e8: bd80 pop {r7, pc}
080114ea <osThreadNew>:
return (configCPU_CLOCK_HZ);
}
/*---------------------------------------------------------------------------*/
osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr) {
80114ea: b580 push {r7, lr}
80114ec: b08e sub sp, #56 @ 0x38
80114ee: af04 add r7, sp, #16
80114f0: 60f8 str r0, [r7, #12]
80114f2: 60b9 str r1, [r7, #8]
80114f4: 607a str r2, [r7, #4]
uint32_t stack;
TaskHandle_t hTask;
UBaseType_t prio;
int32_t mem;
hTask = NULL;
80114f6: 2300 movs r3, #0
80114f8: 613b str r3, [r7, #16]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
80114fa: f3ef 8305 mrs r3, IPSR
80114fe: 617b str r3, [r7, #20]
return(result);
8011500: 697b ldr r3, [r7, #20]
if (!IS_IRQ() && (func != NULL)) {
8011502: 2b00 cmp r3, #0
8011504: d17f bne.n 8011606 <osThreadNew+0x11c>
8011506: 68fb ldr r3, [r7, #12]
8011508: 2b00 cmp r3, #0
801150a: d07c beq.n 8011606 <osThreadNew+0x11c>
stack = configMINIMAL_STACK_SIZE;
801150c: f44f 7300 mov.w r3, #512 @ 0x200
8011510: 623b str r3, [r7, #32]
prio = (UBaseType_t)osPriorityNormal;
8011512: 2318 movs r3, #24
8011514: 61fb str r3, [r7, #28]
name = NULL;
8011516: 2300 movs r3, #0
8011518: 627b str r3, [r7, #36] @ 0x24
mem = -1;
801151a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
801151e: 61bb str r3, [r7, #24]
if (attr != NULL) {
8011520: 687b ldr r3, [r7, #4]
8011522: 2b00 cmp r3, #0
8011524: d045 beq.n 80115b2 <osThreadNew+0xc8>
if (attr->name != NULL) {
8011526: 687b ldr r3, [r7, #4]
8011528: 681b ldr r3, [r3, #0]
801152a: 2b00 cmp r3, #0
801152c: d002 beq.n 8011534 <osThreadNew+0x4a>
name = attr->name;
801152e: 687b ldr r3, [r7, #4]
8011530: 681b ldr r3, [r3, #0]
8011532: 627b str r3, [r7, #36] @ 0x24
}
if (attr->priority != osPriorityNone) {
8011534: 687b ldr r3, [r7, #4]
8011536: 699b ldr r3, [r3, #24]
8011538: 2b00 cmp r3, #0
801153a: d002 beq.n 8011542 <osThreadNew+0x58>
prio = (UBaseType_t)attr->priority;
801153c: 687b ldr r3, [r7, #4]
801153e: 699b ldr r3, [r3, #24]
8011540: 61fb str r3, [r7, #28]
}
if ((prio < osPriorityIdle) || (prio > osPriorityISR) || ((attr->attr_bits & osThreadJoinable) == osThreadJoinable)) {
8011542: 69fb ldr r3, [r7, #28]
8011544: 2b00 cmp r3, #0
8011546: d008 beq.n 801155a <osThreadNew+0x70>
8011548: 69fb ldr r3, [r7, #28]
801154a: 2b38 cmp r3, #56 @ 0x38
801154c: d805 bhi.n 801155a <osThreadNew+0x70>
801154e: 687b ldr r3, [r7, #4]
8011550: 685b ldr r3, [r3, #4]
8011552: f003 0301 and.w r3, r3, #1
8011556: 2b00 cmp r3, #0
8011558: d001 beq.n 801155e <osThreadNew+0x74>
return (NULL);
801155a: 2300 movs r3, #0
801155c: e054 b.n 8011608 <osThreadNew+0x11e>
}
if (attr->stack_size > 0U) {
801155e: 687b ldr r3, [r7, #4]
8011560: 695b ldr r3, [r3, #20]
8011562: 2b00 cmp r3, #0
8011564: d003 beq.n 801156e <osThreadNew+0x84>
/* In FreeRTOS stack is not in bytes, but in sizeof(StackType_t) which is 4 on ARM ports. */
/* Stack size should be therefore 4 byte aligned in order to avoid division caused side effects */
stack = attr->stack_size / sizeof(StackType_t);
8011566: 687b ldr r3, [r7, #4]
8011568: 695b ldr r3, [r3, #20]
801156a: 089b lsrs r3, r3, #2
801156c: 623b str r3, [r7, #32]
}
if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTask_t)) &&
801156e: 687b ldr r3, [r7, #4]
8011570: 689b ldr r3, [r3, #8]
8011572: 2b00 cmp r3, #0
8011574: d00e beq.n 8011594 <osThreadNew+0xaa>
8011576: 687b ldr r3, [r7, #4]
8011578: 68db ldr r3, [r3, #12]
801157a: 2ba7 cmp r3, #167 @ 0xa7
801157c: d90a bls.n 8011594 <osThreadNew+0xaa>
(attr->stack_mem != NULL) && (attr->stack_size > 0U)) {
801157e: 687b ldr r3, [r7, #4]
8011580: 691b ldr r3, [r3, #16]
if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTask_t)) &&
8011582: 2b00 cmp r3, #0
8011584: d006 beq.n 8011594 <osThreadNew+0xaa>
(attr->stack_mem != NULL) && (attr->stack_size > 0U)) {
8011586: 687b ldr r3, [r7, #4]
8011588: 695b ldr r3, [r3, #20]
801158a: 2b00 cmp r3, #0
801158c: d002 beq.n 8011594 <osThreadNew+0xaa>
mem = 1;
801158e: 2301 movs r3, #1
8011590: 61bb str r3, [r7, #24]
8011592: e010 b.n 80115b6 <osThreadNew+0xcc>
}
else {
if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && (attr->stack_mem == NULL)) {
8011594: 687b ldr r3, [r7, #4]
8011596: 689b ldr r3, [r3, #8]
8011598: 2b00 cmp r3, #0
801159a: d10c bne.n 80115b6 <osThreadNew+0xcc>
801159c: 687b ldr r3, [r7, #4]
801159e: 68db ldr r3, [r3, #12]
80115a0: 2b00 cmp r3, #0
80115a2: d108 bne.n 80115b6 <osThreadNew+0xcc>
80115a4: 687b ldr r3, [r7, #4]
80115a6: 691b ldr r3, [r3, #16]
80115a8: 2b00 cmp r3, #0
80115aa: d104 bne.n 80115b6 <osThreadNew+0xcc>
mem = 0;
80115ac: 2300 movs r3, #0
80115ae: 61bb str r3, [r7, #24]
80115b0: e001 b.n 80115b6 <osThreadNew+0xcc>
}
}
}
else {
mem = 0;
80115b2: 2300 movs r3, #0
80115b4: 61bb str r3, [r7, #24]
}
if (mem == 1) {
80115b6: 69bb ldr r3, [r7, #24]
80115b8: 2b01 cmp r3, #1
80115ba: d110 bne.n 80115de <osThreadNew+0xf4>
#if (configSUPPORT_STATIC_ALLOCATION == 1)
hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t *)attr->stack_mem,
80115bc: 687b ldr r3, [r7, #4]
80115be: 691b ldr r3, [r3, #16]
(StaticTask_t *)attr->cb_mem);
80115c0: 687a ldr r2, [r7, #4]
80115c2: 6892 ldr r2, [r2, #8]
hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t *)attr->stack_mem,
80115c4: 9202 str r2, [sp, #8]
80115c6: 9301 str r3, [sp, #4]
80115c8: 69fb ldr r3, [r7, #28]
80115ca: 9300 str r3, [sp, #0]
80115cc: 68bb ldr r3, [r7, #8]
80115ce: 6a3a ldr r2, [r7, #32]
80115d0: 6a79 ldr r1, [r7, #36] @ 0x24
80115d2: 68f8 ldr r0, [r7, #12]
80115d4: f002 faa2 bl 8013b1c <xTaskCreateStatic>
80115d8: 4603 mov r3, r0
80115da: 613b str r3, [r7, #16]
80115dc: e013 b.n 8011606 <osThreadNew+0x11c>
#endif
}
else {
if (mem == 0) {
80115de: 69bb ldr r3, [r7, #24]
80115e0: 2b00 cmp r3, #0
80115e2: d110 bne.n 8011606 <osThreadNew+0x11c>
#if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
if (xTaskCreate ((TaskFunction_t)func, name, (uint16_t)stack, argument, prio, &hTask) != pdPASS) {
80115e4: 6a3b ldr r3, [r7, #32]
80115e6: b29a uxth r2, r3
80115e8: f107 0310 add.w r3, r7, #16
80115ec: 9301 str r3, [sp, #4]
80115ee: 69fb ldr r3, [r7, #28]
80115f0: 9300 str r3, [sp, #0]
80115f2: 68bb ldr r3, [r7, #8]
80115f4: 6a79 ldr r1, [r7, #36] @ 0x24
80115f6: 68f8 ldr r0, [r7, #12]
80115f8: f002 faf0 bl 8013bdc <xTaskCreate>
80115fc: 4603 mov r3, r0
80115fe: 2b01 cmp r3, #1
8011600: d001 beq.n 8011606 <osThreadNew+0x11c>
hTask = NULL;
8011602: 2300 movs r3, #0
8011604: 613b str r3, [r7, #16]
#endif
}
}
}
return ((osThreadId_t)hTask);
8011606: 693b ldr r3, [r7, #16]
}
8011608: 4618 mov r0, r3
801160a: 3728 adds r7, #40 @ 0x28
801160c: 46bd mov sp, r7
801160e: bd80 pop {r7, pc}
08011610 <osThreadGetId>:
}
return (name);
}
osThreadId_t osThreadGetId (void) {
8011610: b580 push {r7, lr}
8011612: b082 sub sp, #8
8011614: af00 add r7, sp, #0
osThreadId_t id;
id = (osThreadId_t)xTaskGetCurrentTaskHandle();
8011616: f003 f921 bl 801485c <xTaskGetCurrentTaskHandle>
801161a: 6078 str r0, [r7, #4]
return (id);
801161c: 687b ldr r3, [r7, #4]
}
801161e: 4618 mov r0, r3
8011620: 3708 adds r7, #8
8011622: 46bd mov sp, r7
8011624: bd80 pop {r7, pc}
08011626 <osDelay>:
/* Return flags before clearing */
return (rflags);
}
#endif /* (configUSE_OS2_THREAD_FLAGS == 1) */
osStatus_t osDelay (uint32_t ticks) {
8011626: b580 push {r7, lr}
8011628: b084 sub sp, #16
801162a: af00 add r7, sp, #0
801162c: 6078 str r0, [r7, #4]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
801162e: f3ef 8305 mrs r3, IPSR
8011632: 60bb str r3, [r7, #8]
return(result);
8011634: 68bb ldr r3, [r7, #8]
osStatus_t stat;
if (IS_IRQ()) {
8011636: 2b00 cmp r3, #0
8011638: d003 beq.n 8011642 <osDelay+0x1c>
stat = osErrorISR;
801163a: f06f 0305 mvn.w r3, #5
801163e: 60fb str r3, [r7, #12]
8011640: e007 b.n 8011652 <osDelay+0x2c>
}
else {
stat = osOK;
8011642: 2300 movs r3, #0
8011644: 60fb str r3, [r7, #12]
if (ticks != 0U) {
8011646: 687b ldr r3, [r7, #4]
8011648: 2b00 cmp r3, #0
801164a: d002 beq.n 8011652 <osDelay+0x2c>
vTaskDelay(ticks);
801164c: 6878 ldr r0, [r7, #4]
801164e: f002 fc23 bl 8013e98 <vTaskDelay>
}
}
return (stat);
8011652: 68fb ldr r3, [r7, #12]
}
8011654: 4618 mov r0, r3
8011656: 3710 adds r7, #16
8011658: 46bd mov sp, r7
801165a: bd80 pop {r7, pc}
0801165c <TimerCallback>:
}
/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_TIMER == 1)
static void TimerCallback (TimerHandle_t hTimer) {
801165c: b580 push {r7, lr}
801165e: b084 sub sp, #16
8011660: af00 add r7, sp, #0
8011662: 6078 str r0, [r7, #4]
TimerCallback_t *callb;
callb = (TimerCallback_t *)pvTimerGetTimerID (hTimer);
8011664: 6878 ldr r0, [r7, #4]
8011666: f004 f93b bl 80158e0 <pvTimerGetTimerID>
801166a: 60f8 str r0, [r7, #12]
if (callb != NULL) {
801166c: 68fb ldr r3, [r7, #12]
801166e: 2b00 cmp r3, #0
8011670: d005 beq.n 801167e <TimerCallback+0x22>
callb->func (callb->arg);
8011672: 68fb ldr r3, [r7, #12]
8011674: 681b ldr r3, [r3, #0]
8011676: 68fa ldr r2, [r7, #12]
8011678: 6852 ldr r2, [r2, #4]
801167a: 4610 mov r0, r2
801167c: 4798 blx r3
}
}
801167e: bf00 nop
8011680: 3710 adds r7, #16
8011682: 46bd mov sp, r7
8011684: bd80 pop {r7, pc}
...
08011688 <osTimerNew>:
osTimerId_t osTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr) {
8011688: b580 push {r7, lr}
801168a: b08c sub sp, #48 @ 0x30
801168c: af02 add r7, sp, #8
801168e: 60f8 str r0, [r7, #12]
8011690: 607a str r2, [r7, #4]
8011692: 603b str r3, [r7, #0]
8011694: 460b mov r3, r1
8011696: 72fb strb r3, [r7, #11]
TimerHandle_t hTimer;
TimerCallback_t *callb;
UBaseType_t reload;
int32_t mem;
hTimer = NULL;
8011698: 2300 movs r3, #0
801169a: 623b str r3, [r7, #32]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
801169c: f3ef 8305 mrs r3, IPSR
80116a0: 613b str r3, [r7, #16]
return(result);
80116a2: 693b ldr r3, [r7, #16]
if (!IS_IRQ() && (func != NULL)) {
80116a4: 2b00 cmp r3, #0
80116a6: d163 bne.n 8011770 <osTimerNew+0xe8>
80116a8: 68fb ldr r3, [r7, #12]
80116aa: 2b00 cmp r3, #0
80116ac: d060 beq.n 8011770 <osTimerNew+0xe8>
/* Allocate memory to store callback function and argument */
callb = pvPortMalloc (sizeof(TimerCallback_t));
80116ae: 2008 movs r0, #8
80116b0: f004 fb8c bl 8015dcc <pvPortMalloc>
80116b4: 6178 str r0, [r7, #20]
if (callb != NULL) {
80116b6: 697b ldr r3, [r7, #20]
80116b8: 2b00 cmp r3, #0
80116ba: d059 beq.n 8011770 <osTimerNew+0xe8>
callb->func = func;
80116bc: 697b ldr r3, [r7, #20]
80116be: 68fa ldr r2, [r7, #12]
80116c0: 601a str r2, [r3, #0]
callb->arg = argument;
80116c2: 697b ldr r3, [r7, #20]
80116c4: 687a ldr r2, [r7, #4]
80116c6: 605a str r2, [r3, #4]
if (type == osTimerOnce) {
80116c8: 7afb ldrb r3, [r7, #11]
80116ca: 2b00 cmp r3, #0
80116cc: d102 bne.n 80116d4 <osTimerNew+0x4c>
reload = pdFALSE;
80116ce: 2300 movs r3, #0
80116d0: 61fb str r3, [r7, #28]
80116d2: e001 b.n 80116d8 <osTimerNew+0x50>
} else {
reload = pdTRUE;
80116d4: 2301 movs r3, #1
80116d6: 61fb str r3, [r7, #28]
}
mem = -1;
80116d8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80116dc: 61bb str r3, [r7, #24]
name = NULL;
80116de: 2300 movs r3, #0
80116e0: 627b str r3, [r7, #36] @ 0x24
if (attr != NULL) {
80116e2: 683b ldr r3, [r7, #0]
80116e4: 2b00 cmp r3, #0
80116e6: d01c beq.n 8011722 <osTimerNew+0x9a>
if (attr->name != NULL) {
80116e8: 683b ldr r3, [r7, #0]
80116ea: 681b ldr r3, [r3, #0]
80116ec: 2b00 cmp r3, #0
80116ee: d002 beq.n 80116f6 <osTimerNew+0x6e>
name = attr->name;
80116f0: 683b ldr r3, [r7, #0]
80116f2: 681b ldr r3, [r3, #0]
80116f4: 627b str r3, [r7, #36] @ 0x24
}
if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTimer_t))) {
80116f6: 683b ldr r3, [r7, #0]
80116f8: 689b ldr r3, [r3, #8]
80116fa: 2b00 cmp r3, #0
80116fc: d006 beq.n 801170c <osTimerNew+0x84>
80116fe: 683b ldr r3, [r7, #0]
8011700: 68db ldr r3, [r3, #12]
8011702: 2b2b cmp r3, #43 @ 0x2b
8011704: d902 bls.n 801170c <osTimerNew+0x84>
mem = 1;
8011706: 2301 movs r3, #1
8011708: 61bb str r3, [r7, #24]
801170a: e00c b.n 8011726 <osTimerNew+0x9e>
}
else {
if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
801170c: 683b ldr r3, [r7, #0]
801170e: 689b ldr r3, [r3, #8]
8011710: 2b00 cmp r3, #0
8011712: d108 bne.n 8011726 <osTimerNew+0x9e>
8011714: 683b ldr r3, [r7, #0]
8011716: 68db ldr r3, [r3, #12]
8011718: 2b00 cmp r3, #0
801171a: d104 bne.n 8011726 <osTimerNew+0x9e>
mem = 0;
801171c: 2300 movs r3, #0
801171e: 61bb str r3, [r7, #24]
8011720: e001 b.n 8011726 <osTimerNew+0x9e>
}
}
}
else {
mem = 0;
8011722: 2300 movs r3, #0
8011724: 61bb str r3, [r7, #24]
}
if (mem == 1) {
8011726: 69bb ldr r3, [r7, #24]
8011728: 2b01 cmp r3, #1
801172a: d10c bne.n 8011746 <osTimerNew+0xbe>
#if (configSUPPORT_STATIC_ALLOCATION == 1)
hTimer = xTimerCreateStatic (name, 1, reload, callb, TimerCallback, (StaticTimer_t *)attr->cb_mem);
801172c: 683b ldr r3, [r7, #0]
801172e: 689b ldr r3, [r3, #8]
8011730: 9301 str r3, [sp, #4]
8011732: 4b12 ldr r3, [pc, #72] @ (801177c <osTimerNew+0xf4>)
8011734: 9300 str r3, [sp, #0]
8011736: 697b ldr r3, [r7, #20]
8011738: 69fa ldr r2, [r7, #28]
801173a: 2101 movs r1, #1
801173c: 6a78 ldr r0, [r7, #36] @ 0x24
801173e: f003 fd18 bl 8015172 <xTimerCreateStatic>
8011742: 6238 str r0, [r7, #32]
8011744: e00b b.n 801175e <osTimerNew+0xd6>
#endif
}
else {
if (mem == 0) {
8011746: 69bb ldr r3, [r7, #24]
8011748: 2b00 cmp r3, #0
801174a: d108 bne.n 801175e <osTimerNew+0xd6>
#if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
hTimer = xTimerCreate (name, 1, reload, callb, TimerCallback);
801174c: 4b0b ldr r3, [pc, #44] @ (801177c <osTimerNew+0xf4>)
801174e: 9300 str r3, [sp, #0]
8011750: 697b ldr r3, [r7, #20]
8011752: 69fa ldr r2, [r7, #28]
8011754: 2101 movs r1, #1
8011756: 6a78 ldr r0, [r7, #36] @ 0x24
8011758: f003 fcea bl 8015130 <xTimerCreate>
801175c: 6238 str r0, [r7, #32]
#endif
}
}
if ((hTimer == NULL) && (callb != NULL)) {
801175e: 6a3b ldr r3, [r7, #32]
8011760: 2b00 cmp r3, #0
8011762: d105 bne.n 8011770 <osTimerNew+0xe8>
8011764: 697b ldr r3, [r7, #20]
8011766: 2b00 cmp r3, #0
8011768: d002 beq.n 8011770 <osTimerNew+0xe8>
vPortFree (callb);
801176a: 6978 ldr r0, [r7, #20]
801176c: f004 fbfc bl 8015f68 <vPortFree>
}
}
}
return ((osTimerId_t)hTimer);
8011770: 6a3b ldr r3, [r7, #32]
}
8011772: 4618 mov r0, r3
8011774: 3728 adds r7, #40 @ 0x28
8011776: 46bd mov sp, r7
8011778: bd80 pop {r7, pc}
801177a: bf00 nop
801177c: 0801165d .word 0x0801165d
08011780 <osTimerStart>:
}
return (p);
}
osStatus_t osTimerStart (osTimerId_t timer_id, uint32_t ticks) {
8011780: b580 push {r7, lr}
8011782: b088 sub sp, #32
8011784: af02 add r7, sp, #8
8011786: 6078 str r0, [r7, #4]
8011788: 6039 str r1, [r7, #0]
TimerHandle_t hTimer = (TimerHandle_t)timer_id;
801178a: 687b ldr r3, [r7, #4]
801178c: 613b str r3, [r7, #16]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
801178e: f3ef 8305 mrs r3, IPSR
8011792: 60fb str r3, [r7, #12]
return(result);
8011794: 68fb ldr r3, [r7, #12]
osStatus_t stat;
if (IS_IRQ()) {
8011796: 2b00 cmp r3, #0
8011798: d003 beq.n 80117a2 <osTimerStart+0x22>
stat = osErrorISR;
801179a: f06f 0305 mvn.w r3, #5
801179e: 617b str r3, [r7, #20]
80117a0: e017 b.n 80117d2 <osTimerStart+0x52>
}
else if (hTimer == NULL) {
80117a2: 693b ldr r3, [r7, #16]
80117a4: 2b00 cmp r3, #0
80117a6: d103 bne.n 80117b0 <osTimerStart+0x30>
stat = osErrorParameter;
80117a8: f06f 0303 mvn.w r3, #3
80117ac: 617b str r3, [r7, #20]
80117ae: e010 b.n 80117d2 <osTimerStart+0x52>
}
else {
if (xTimerChangePeriod (hTimer, ticks, 0) == pdPASS) {
80117b0: 2300 movs r3, #0
80117b2: 9300 str r3, [sp, #0]
80117b4: 2300 movs r3, #0
80117b6: 683a ldr r2, [r7, #0]
80117b8: 2104 movs r1, #4
80117ba: 6938 ldr r0, [r7, #16]
80117bc: f003 fd56 bl 801526c <xTimerGenericCommand>
80117c0: 4603 mov r3, r0
80117c2: 2b01 cmp r3, #1
80117c4: d102 bne.n 80117cc <osTimerStart+0x4c>
stat = osOK;
80117c6: 2300 movs r3, #0
80117c8: 617b str r3, [r7, #20]
80117ca: e002 b.n 80117d2 <osTimerStart+0x52>
} else {
stat = osErrorResource;
80117cc: f06f 0302 mvn.w r3, #2
80117d0: 617b str r3, [r7, #20]
}
}
return (stat);
80117d2: 697b ldr r3, [r7, #20]
}
80117d4: 4618 mov r0, r3
80117d6: 3718 adds r7, #24
80117d8: 46bd mov sp, r7
80117da: bd80 pop {r7, pc}
080117dc <osTimerStop>:
osStatus_t osTimerStop (osTimerId_t timer_id) {
80117dc: b580 push {r7, lr}
80117de: b088 sub sp, #32
80117e0: af02 add r7, sp, #8
80117e2: 6078 str r0, [r7, #4]
TimerHandle_t hTimer = (TimerHandle_t)timer_id;
80117e4: 687b ldr r3, [r7, #4]
80117e6: 613b str r3, [r7, #16]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
80117e8: f3ef 8305 mrs r3, IPSR
80117ec: 60fb str r3, [r7, #12]
return(result);
80117ee: 68fb ldr r3, [r7, #12]
osStatus_t stat;
if (IS_IRQ()) {
80117f0: 2b00 cmp r3, #0
80117f2: d003 beq.n 80117fc <osTimerStop+0x20>
stat = osErrorISR;
80117f4: f06f 0305 mvn.w r3, #5
80117f8: 617b str r3, [r7, #20]
80117fa: e021 b.n 8011840 <osTimerStop+0x64>
}
else if (hTimer == NULL) {
80117fc: 693b ldr r3, [r7, #16]
80117fe: 2b00 cmp r3, #0
8011800: d103 bne.n 801180a <osTimerStop+0x2e>
stat = osErrorParameter;
8011802: f06f 0303 mvn.w r3, #3
8011806: 617b str r3, [r7, #20]
8011808: e01a b.n 8011840 <osTimerStop+0x64>
}
else {
if (xTimerIsTimerActive (hTimer) == pdFALSE) {
801180a: 6938 ldr r0, [r7, #16]
801180c: f004 f83e bl 801588c <xTimerIsTimerActive>
8011810: 4603 mov r3, r0
8011812: 2b00 cmp r3, #0
8011814: d103 bne.n 801181e <osTimerStop+0x42>
stat = osErrorResource;
8011816: f06f 0302 mvn.w r3, #2
801181a: 617b str r3, [r7, #20]
801181c: e010 b.n 8011840 <osTimerStop+0x64>
}
else {
if (xTimerStop (hTimer, 0) == pdPASS) {
801181e: 2300 movs r3, #0
8011820: 9300 str r3, [sp, #0]
8011822: 2300 movs r3, #0
8011824: 2200 movs r2, #0
8011826: 2103 movs r1, #3
8011828: 6938 ldr r0, [r7, #16]
801182a: f003 fd1f bl 801526c <xTimerGenericCommand>
801182e: 4603 mov r3, r0
8011830: 2b01 cmp r3, #1
8011832: d102 bne.n 801183a <osTimerStop+0x5e>
stat = osOK;
8011834: 2300 movs r3, #0
8011836: 617b str r3, [r7, #20]
8011838: e002 b.n 8011840 <osTimerStop+0x64>
} else {
stat = osError;
801183a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
801183e: 617b str r3, [r7, #20]
}
}
}
return (stat);
8011840: 697b ldr r3, [r7, #20]
}
8011842: 4618 mov r0, r3
8011844: 3718 adds r7, #24
8011846: 46bd mov sp, r7
8011848: bd80 pop {r7, pc}
0801184a <osMutexNew>:
}
/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_MUTEX == 1)
osMutexId_t osMutexNew (const osMutexAttr_t *attr) {
801184a: b580 push {r7, lr}
801184c: b088 sub sp, #32
801184e: af00 add r7, sp, #0
8011850: 6078 str r0, [r7, #4]
int32_t mem;
#if (configQUEUE_REGISTRY_SIZE > 0)
const char *name;
#endif
hMutex = NULL;
8011852: 2300 movs r3, #0
8011854: 61fb str r3, [r7, #28]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011856: f3ef 8305 mrs r3, IPSR
801185a: 60bb str r3, [r7, #8]
return(result);
801185c: 68bb ldr r3, [r7, #8]
if (!IS_IRQ()) {
801185e: 2b00 cmp r3, #0
8011860: d174 bne.n 801194c <osMutexNew+0x102>
if (attr != NULL) {
8011862: 687b ldr r3, [r7, #4]
8011864: 2b00 cmp r3, #0
8011866: d003 beq.n 8011870 <osMutexNew+0x26>
type = attr->attr_bits;
8011868: 687b ldr r3, [r7, #4]
801186a: 685b ldr r3, [r3, #4]
801186c: 61bb str r3, [r7, #24]
801186e: e001 b.n 8011874 <osMutexNew+0x2a>
} else {
type = 0U;
8011870: 2300 movs r3, #0
8011872: 61bb str r3, [r7, #24]
}
if ((type & osMutexRecursive) == osMutexRecursive) {
8011874: 69bb ldr r3, [r7, #24]
8011876: f003 0301 and.w r3, r3, #1
801187a: 2b00 cmp r3, #0
801187c: d002 beq.n 8011884 <osMutexNew+0x3a>
rmtx = 1U;
801187e: 2301 movs r3, #1
8011880: 617b str r3, [r7, #20]
8011882: e001 b.n 8011888 <osMutexNew+0x3e>
} else {
rmtx = 0U;
8011884: 2300 movs r3, #0
8011886: 617b str r3, [r7, #20]
}
if ((type & osMutexRobust) != osMutexRobust) {
8011888: 69bb ldr r3, [r7, #24]
801188a: f003 0308 and.w r3, r3, #8
801188e: 2b00 cmp r3, #0
8011890: d15c bne.n 801194c <osMutexNew+0x102>
mem = -1;
8011892: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8011896: 613b str r3, [r7, #16]
if (attr != NULL) {
8011898: 687b ldr r3, [r7, #4]
801189a: 2b00 cmp r3, #0
801189c: d015 beq.n 80118ca <osMutexNew+0x80>
if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
801189e: 687b ldr r3, [r7, #4]
80118a0: 689b ldr r3, [r3, #8]
80118a2: 2b00 cmp r3, #0
80118a4: d006 beq.n 80118b4 <osMutexNew+0x6a>
80118a6: 687b ldr r3, [r7, #4]
80118a8: 68db ldr r3, [r3, #12]
80118aa: 2b4f cmp r3, #79 @ 0x4f
80118ac: d902 bls.n 80118b4 <osMutexNew+0x6a>
mem = 1;
80118ae: 2301 movs r3, #1
80118b0: 613b str r3, [r7, #16]
80118b2: e00c b.n 80118ce <osMutexNew+0x84>
}
else {
if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
80118b4: 687b ldr r3, [r7, #4]
80118b6: 689b ldr r3, [r3, #8]
80118b8: 2b00 cmp r3, #0
80118ba: d108 bne.n 80118ce <osMutexNew+0x84>
80118bc: 687b ldr r3, [r7, #4]
80118be: 68db ldr r3, [r3, #12]
80118c0: 2b00 cmp r3, #0
80118c2: d104 bne.n 80118ce <osMutexNew+0x84>
mem = 0;
80118c4: 2300 movs r3, #0
80118c6: 613b str r3, [r7, #16]
80118c8: e001 b.n 80118ce <osMutexNew+0x84>
}
}
}
else {
mem = 0;
80118ca: 2300 movs r3, #0
80118cc: 613b str r3, [r7, #16]
}
if (mem == 1) {
80118ce: 693b ldr r3, [r7, #16]
80118d0: 2b01 cmp r3, #1
80118d2: d112 bne.n 80118fa <osMutexNew+0xb0>
#if (configSUPPORT_STATIC_ALLOCATION == 1)
if (rmtx != 0U) {
80118d4: 697b ldr r3, [r7, #20]
80118d6: 2b00 cmp r3, #0
80118d8: d007 beq.n 80118ea <osMutexNew+0xa0>
#if (configUSE_RECURSIVE_MUTEXES == 1)
hMutex = xSemaphoreCreateRecursiveMutexStatic (attr->cb_mem);
80118da: 687b ldr r3, [r7, #4]
80118dc: 689b ldr r3, [r3, #8]
80118de: 4619 mov r1, r3
80118e0: 2004 movs r0, #4
80118e2: f000 fdd8 bl 8012496 <xQueueCreateMutexStatic>
80118e6: 61f8 str r0, [r7, #28]
80118e8: e016 b.n 8011918 <osMutexNew+0xce>
#endif
}
else {
hMutex = xSemaphoreCreateMutexStatic (attr->cb_mem);
80118ea: 687b ldr r3, [r7, #4]
80118ec: 689b ldr r3, [r3, #8]
80118ee: 4619 mov r1, r3
80118f0: 2001 movs r0, #1
80118f2: f000 fdd0 bl 8012496 <xQueueCreateMutexStatic>
80118f6: 61f8 str r0, [r7, #28]
80118f8: e00e b.n 8011918 <osMutexNew+0xce>
}
#endif
}
else {
if (mem == 0) {
80118fa: 693b ldr r3, [r7, #16]
80118fc: 2b00 cmp r3, #0
80118fe: d10b bne.n 8011918 <osMutexNew+0xce>
#if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
if (rmtx != 0U) {
8011900: 697b ldr r3, [r7, #20]
8011902: 2b00 cmp r3, #0
8011904: d004 beq.n 8011910 <osMutexNew+0xc6>
#if (configUSE_RECURSIVE_MUTEXES == 1)
hMutex = xSemaphoreCreateRecursiveMutex ();
8011906: 2004 movs r0, #4
8011908: f000 fdad bl 8012466 <xQueueCreateMutex>
801190c: 61f8 str r0, [r7, #28]
801190e: e003 b.n 8011918 <osMutexNew+0xce>
#endif
} else {
hMutex = xSemaphoreCreateMutex ();
8011910: 2001 movs r0, #1
8011912: f000 fda8 bl 8012466 <xQueueCreateMutex>
8011916: 61f8 str r0, [r7, #28]
#endif
}
}
#if (configQUEUE_REGISTRY_SIZE > 0)
if (hMutex != NULL) {
8011918: 69fb ldr r3, [r7, #28]
801191a: 2b00 cmp r3, #0
801191c: d00c beq.n 8011938 <osMutexNew+0xee>
if (attr != NULL) {
801191e: 687b ldr r3, [r7, #4]
8011920: 2b00 cmp r3, #0
8011922: d003 beq.n 801192c <osMutexNew+0xe2>
name = attr->name;
8011924: 687b ldr r3, [r7, #4]
8011926: 681b ldr r3, [r3, #0]
8011928: 60fb str r3, [r7, #12]
801192a: e001 b.n 8011930 <osMutexNew+0xe6>
} else {
name = NULL;
801192c: 2300 movs r3, #0
801192e: 60fb str r3, [r7, #12]
}
vQueueAddToRegistry (hMutex, name);
8011930: 68f9 ldr r1, [r7, #12]
8011932: 69f8 ldr r0, [r7, #28]
8011934: f001 fcd2 bl 80132dc <vQueueAddToRegistry>
}
#endif
if ((hMutex != NULL) && (rmtx != 0U)) {
8011938: 69fb ldr r3, [r7, #28]
801193a: 2b00 cmp r3, #0
801193c: d006 beq.n 801194c <osMutexNew+0x102>
801193e: 697b ldr r3, [r7, #20]
8011940: 2b00 cmp r3, #0
8011942: d003 beq.n 801194c <osMutexNew+0x102>
hMutex = (SemaphoreHandle_t)((uint32_t)hMutex | 1U);
8011944: 69fb ldr r3, [r7, #28]
8011946: f043 0301 orr.w r3, r3, #1
801194a: 61fb str r3, [r7, #28]
}
}
}
return ((osMutexId_t)hMutex);
801194c: 69fb ldr r3, [r7, #28]
}
801194e: 4618 mov r0, r3
8011950: 3720 adds r7, #32
8011952: 46bd mov sp, r7
8011954: bd80 pop {r7, pc}
08011956 <osMutexAcquire>:
osStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout) {
8011956: b580 push {r7, lr}
8011958: b086 sub sp, #24
801195a: af00 add r7, sp, #0
801195c: 6078 str r0, [r7, #4]
801195e: 6039 str r1, [r7, #0]
SemaphoreHandle_t hMutex;
osStatus_t stat;
uint32_t rmtx;
hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
8011960: 687b ldr r3, [r7, #4]
8011962: f023 0301 bic.w r3, r3, #1
8011966: 613b str r3, [r7, #16]
rmtx = (uint32_t)mutex_id & 1U;
8011968: 687b ldr r3, [r7, #4]
801196a: f003 0301 and.w r3, r3, #1
801196e: 60fb str r3, [r7, #12]
stat = osOK;
8011970: 2300 movs r3, #0
8011972: 617b str r3, [r7, #20]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011974: f3ef 8305 mrs r3, IPSR
8011978: 60bb str r3, [r7, #8]
return(result);
801197a: 68bb ldr r3, [r7, #8]
if (IS_IRQ()) {
801197c: 2b00 cmp r3, #0
801197e: d003 beq.n 8011988 <osMutexAcquire+0x32>
stat = osErrorISR;
8011980: f06f 0305 mvn.w r3, #5
8011984: 617b str r3, [r7, #20]
8011986: e02c b.n 80119e2 <osMutexAcquire+0x8c>
}
else if (hMutex == NULL) {
8011988: 693b ldr r3, [r7, #16]
801198a: 2b00 cmp r3, #0
801198c: d103 bne.n 8011996 <osMutexAcquire+0x40>
stat = osErrorParameter;
801198e: f06f 0303 mvn.w r3, #3
8011992: 617b str r3, [r7, #20]
8011994: e025 b.n 80119e2 <osMutexAcquire+0x8c>
}
else {
if (rmtx != 0U) {
8011996: 68fb ldr r3, [r7, #12]
8011998: 2b00 cmp r3, #0
801199a: d011 beq.n 80119c0 <osMutexAcquire+0x6a>
#if (configUSE_RECURSIVE_MUTEXES == 1)
if (xSemaphoreTakeRecursive (hMutex, timeout) != pdPASS) {
801199c: 6839 ldr r1, [r7, #0]
801199e: 6938 ldr r0, [r7, #16]
80119a0: f000 fdc9 bl 8012536 <xQueueTakeMutexRecursive>
80119a4: 4603 mov r3, r0
80119a6: 2b01 cmp r3, #1
80119a8: d01b beq.n 80119e2 <osMutexAcquire+0x8c>
if (timeout != 0U) {
80119aa: 683b ldr r3, [r7, #0]
80119ac: 2b00 cmp r3, #0
80119ae: d003 beq.n 80119b8 <osMutexAcquire+0x62>
stat = osErrorTimeout;
80119b0: f06f 0301 mvn.w r3, #1
80119b4: 617b str r3, [r7, #20]
80119b6: e014 b.n 80119e2 <osMutexAcquire+0x8c>
} else {
stat = osErrorResource;
80119b8: f06f 0302 mvn.w r3, #2
80119bc: 617b str r3, [r7, #20]
80119be: e010 b.n 80119e2 <osMutexAcquire+0x8c>
}
}
#endif
}
else {
if (xSemaphoreTake (hMutex, timeout) != pdPASS) {
80119c0: 6839 ldr r1, [r7, #0]
80119c2: 6938 ldr r0, [r7, #16]
80119c4: f001 f96e bl 8012ca4 <xQueueSemaphoreTake>
80119c8: 4603 mov r3, r0
80119ca: 2b01 cmp r3, #1
80119cc: d009 beq.n 80119e2 <osMutexAcquire+0x8c>
if (timeout != 0U) {
80119ce: 683b ldr r3, [r7, #0]
80119d0: 2b00 cmp r3, #0
80119d2: d003 beq.n 80119dc <osMutexAcquire+0x86>
stat = osErrorTimeout;
80119d4: f06f 0301 mvn.w r3, #1
80119d8: 617b str r3, [r7, #20]
80119da: e002 b.n 80119e2 <osMutexAcquire+0x8c>
} else {
stat = osErrorResource;
80119dc: f06f 0302 mvn.w r3, #2
80119e0: 617b str r3, [r7, #20]
}
}
}
}
return (stat);
80119e2: 697b ldr r3, [r7, #20]
}
80119e4: 4618 mov r0, r3
80119e6: 3718 adds r7, #24
80119e8: 46bd mov sp, r7
80119ea: bd80 pop {r7, pc}
080119ec <osMutexRelease>:
osStatus_t osMutexRelease (osMutexId_t mutex_id) {
80119ec: b580 push {r7, lr}
80119ee: b086 sub sp, #24
80119f0: af00 add r7, sp, #0
80119f2: 6078 str r0, [r7, #4]
SemaphoreHandle_t hMutex;
osStatus_t stat;
uint32_t rmtx;
hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
80119f4: 687b ldr r3, [r7, #4]
80119f6: f023 0301 bic.w r3, r3, #1
80119fa: 613b str r3, [r7, #16]
rmtx = (uint32_t)mutex_id & 1U;
80119fc: 687b ldr r3, [r7, #4]
80119fe: f003 0301 and.w r3, r3, #1
8011a02: 60fb str r3, [r7, #12]
stat = osOK;
8011a04: 2300 movs r3, #0
8011a06: 617b str r3, [r7, #20]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011a08: f3ef 8305 mrs r3, IPSR
8011a0c: 60bb str r3, [r7, #8]
return(result);
8011a0e: 68bb ldr r3, [r7, #8]
if (IS_IRQ()) {
8011a10: 2b00 cmp r3, #0
8011a12: d003 beq.n 8011a1c <osMutexRelease+0x30>
stat = osErrorISR;
8011a14: f06f 0305 mvn.w r3, #5
8011a18: 617b str r3, [r7, #20]
8011a1a: e01f b.n 8011a5c <osMutexRelease+0x70>
}
else if (hMutex == NULL) {
8011a1c: 693b ldr r3, [r7, #16]
8011a1e: 2b00 cmp r3, #0
8011a20: d103 bne.n 8011a2a <osMutexRelease+0x3e>
stat = osErrorParameter;
8011a22: f06f 0303 mvn.w r3, #3
8011a26: 617b str r3, [r7, #20]
8011a28: e018 b.n 8011a5c <osMutexRelease+0x70>
}
else {
if (rmtx != 0U) {
8011a2a: 68fb ldr r3, [r7, #12]
8011a2c: 2b00 cmp r3, #0
8011a2e: d009 beq.n 8011a44 <osMutexRelease+0x58>
#if (configUSE_RECURSIVE_MUTEXES == 1)
if (xSemaphoreGiveRecursive (hMutex) != pdPASS) {
8011a30: 6938 ldr r0, [r7, #16]
8011a32: f000 fd4b bl 80124cc <xQueueGiveMutexRecursive>
8011a36: 4603 mov r3, r0
8011a38: 2b01 cmp r3, #1
8011a3a: d00f beq.n 8011a5c <osMutexRelease+0x70>
stat = osErrorResource;
8011a3c: f06f 0302 mvn.w r3, #2
8011a40: 617b str r3, [r7, #20]
8011a42: e00b b.n 8011a5c <osMutexRelease+0x70>
}
#endif
}
else {
if (xSemaphoreGive (hMutex) != pdPASS) {
8011a44: 2300 movs r3, #0
8011a46: 2200 movs r2, #0
8011a48: 2100 movs r1, #0
8011a4a: 6938 ldr r0, [r7, #16]
8011a4c: f000 fe18 bl 8012680 <xQueueGenericSend>
8011a50: 4603 mov r3, r0
8011a52: 2b01 cmp r3, #1
8011a54: d002 beq.n 8011a5c <osMutexRelease+0x70>
stat = osErrorResource;
8011a56: f06f 0302 mvn.w r3, #2
8011a5a: 617b str r3, [r7, #20]
}
}
}
return (stat);
8011a5c: 697b ldr r3, [r7, #20]
}
8011a5e: 4618 mov r0, r3
8011a60: 3718 adds r7, #24
8011a62: 46bd mov sp, r7
8011a64: bd80 pop {r7, pc}
08011a66 <osSemaphoreNew>:
}
#endif /* (configUSE_OS2_MUTEX == 1) */
/*---------------------------------------------------------------------------*/
osSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr) {
8011a66: b580 push {r7, lr}
8011a68: b08a sub sp, #40 @ 0x28
8011a6a: af02 add r7, sp, #8
8011a6c: 60f8 str r0, [r7, #12]
8011a6e: 60b9 str r1, [r7, #8]
8011a70: 607a str r2, [r7, #4]
int32_t mem;
#if (configQUEUE_REGISTRY_SIZE > 0)
const char *name;
#endif
hSemaphore = NULL;
8011a72: 2300 movs r3, #0
8011a74: 61fb str r3, [r7, #28]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011a76: f3ef 8305 mrs r3, IPSR
8011a7a: 613b str r3, [r7, #16]
return(result);
8011a7c: 693b ldr r3, [r7, #16]
if (!IS_IRQ() && (max_count > 0U) && (initial_count <= max_count)) {
8011a7e: 2b00 cmp r3, #0
8011a80: d175 bne.n 8011b6e <osSemaphoreNew+0x108>
8011a82: 68fb ldr r3, [r7, #12]
8011a84: 2b00 cmp r3, #0
8011a86: d072 beq.n 8011b6e <osSemaphoreNew+0x108>
8011a88: 68ba ldr r2, [r7, #8]
8011a8a: 68fb ldr r3, [r7, #12]
8011a8c: 429a cmp r2, r3
8011a8e: d86e bhi.n 8011b6e <osSemaphoreNew+0x108>
mem = -1;
8011a90: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8011a94: 61bb str r3, [r7, #24]
if (attr != NULL) {
8011a96: 687b ldr r3, [r7, #4]
8011a98: 2b00 cmp r3, #0
8011a9a: d015 beq.n 8011ac8 <osSemaphoreNew+0x62>
if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
8011a9c: 687b ldr r3, [r7, #4]
8011a9e: 689b ldr r3, [r3, #8]
8011aa0: 2b00 cmp r3, #0
8011aa2: d006 beq.n 8011ab2 <osSemaphoreNew+0x4c>
8011aa4: 687b ldr r3, [r7, #4]
8011aa6: 68db ldr r3, [r3, #12]
8011aa8: 2b4f cmp r3, #79 @ 0x4f
8011aaa: d902 bls.n 8011ab2 <osSemaphoreNew+0x4c>
mem = 1;
8011aac: 2301 movs r3, #1
8011aae: 61bb str r3, [r7, #24]
8011ab0: e00c b.n 8011acc <osSemaphoreNew+0x66>
}
else {
if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
8011ab2: 687b ldr r3, [r7, #4]
8011ab4: 689b ldr r3, [r3, #8]
8011ab6: 2b00 cmp r3, #0
8011ab8: d108 bne.n 8011acc <osSemaphoreNew+0x66>
8011aba: 687b ldr r3, [r7, #4]
8011abc: 68db ldr r3, [r3, #12]
8011abe: 2b00 cmp r3, #0
8011ac0: d104 bne.n 8011acc <osSemaphoreNew+0x66>
mem = 0;
8011ac2: 2300 movs r3, #0
8011ac4: 61bb str r3, [r7, #24]
8011ac6: e001 b.n 8011acc <osSemaphoreNew+0x66>
}
}
}
else {
mem = 0;
8011ac8: 2300 movs r3, #0
8011aca: 61bb str r3, [r7, #24]
}
if (mem != -1) {
8011acc: 69bb ldr r3, [r7, #24]
8011ace: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8011ad2: d04c beq.n 8011b6e <osSemaphoreNew+0x108>
if (max_count == 1U) {
8011ad4: 68fb ldr r3, [r7, #12]
8011ad6: 2b01 cmp r3, #1
8011ad8: d128 bne.n 8011b2c <osSemaphoreNew+0xc6>
if (mem == 1) {
8011ada: 69bb ldr r3, [r7, #24]
8011adc: 2b01 cmp r3, #1
8011ade: d10a bne.n 8011af6 <osSemaphoreNew+0x90>
#if (configSUPPORT_STATIC_ALLOCATION == 1)
hSemaphore = xSemaphoreCreateBinaryStatic ((StaticSemaphore_t *)attr->cb_mem);
8011ae0: 687b ldr r3, [r7, #4]
8011ae2: 689b ldr r3, [r3, #8]
8011ae4: 2203 movs r2, #3
8011ae6: 9200 str r2, [sp, #0]
8011ae8: 2200 movs r2, #0
8011aea: 2100 movs r1, #0
8011aec: 2001 movs r0, #1
8011aee: f000 fbc5 bl 801227c <xQueueGenericCreateStatic>
8011af2: 61f8 str r0, [r7, #28]
8011af4: e005 b.n 8011b02 <osSemaphoreNew+0x9c>
#endif
}
else {
#if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
hSemaphore = xSemaphoreCreateBinary();
8011af6: 2203 movs r2, #3
8011af8: 2100 movs r1, #0
8011afa: 2001 movs r0, #1
8011afc: f000 fc3b bl 8012376 <xQueueGenericCreate>
8011b00: 61f8 str r0, [r7, #28]
#endif
}
if ((hSemaphore != NULL) && (initial_count != 0U)) {
8011b02: 69fb ldr r3, [r7, #28]
8011b04: 2b00 cmp r3, #0
8011b06: d022 beq.n 8011b4e <osSemaphoreNew+0xe8>
8011b08: 68bb ldr r3, [r7, #8]
8011b0a: 2b00 cmp r3, #0
8011b0c: d01f beq.n 8011b4e <osSemaphoreNew+0xe8>
if (xSemaphoreGive (hSemaphore) != pdPASS) {
8011b0e: 2300 movs r3, #0
8011b10: 2200 movs r2, #0
8011b12: 2100 movs r1, #0
8011b14: 69f8 ldr r0, [r7, #28]
8011b16: f000 fdb3 bl 8012680 <xQueueGenericSend>
8011b1a: 4603 mov r3, r0
8011b1c: 2b01 cmp r3, #1
8011b1e: d016 beq.n 8011b4e <osSemaphoreNew+0xe8>
vSemaphoreDelete (hSemaphore);
8011b20: 69f8 ldr r0, [r7, #28]
8011b22: f001 fa8f bl 8013044 <vQueueDelete>
hSemaphore = NULL;
8011b26: 2300 movs r3, #0
8011b28: 61fb str r3, [r7, #28]
8011b2a: e010 b.n 8011b4e <osSemaphoreNew+0xe8>
}
}
}
else {
if (mem == 1) {
8011b2c: 69bb ldr r3, [r7, #24]
8011b2e: 2b01 cmp r3, #1
8011b30: d108 bne.n 8011b44 <osSemaphoreNew+0xde>
#if (configSUPPORT_STATIC_ALLOCATION == 1)
hSemaphore = xSemaphoreCreateCountingStatic (max_count, initial_count, (StaticSemaphore_t *)attr->cb_mem);
8011b32: 687b ldr r3, [r7, #4]
8011b34: 689b ldr r3, [r3, #8]
8011b36: 461a mov r2, r3
8011b38: 68b9 ldr r1, [r7, #8]
8011b3a: 68f8 ldr r0, [r7, #12]
8011b3c: f000 fd32 bl 80125a4 <xQueueCreateCountingSemaphoreStatic>
8011b40: 61f8 str r0, [r7, #28]
8011b42: e004 b.n 8011b4e <osSemaphoreNew+0xe8>
#endif
}
else {
#if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
hSemaphore = xSemaphoreCreateCounting (max_count, initial_count);
8011b44: 68b9 ldr r1, [r7, #8]
8011b46: 68f8 ldr r0, [r7, #12]
8011b48: f000 fd65 bl 8012616 <xQueueCreateCountingSemaphore>
8011b4c: 61f8 str r0, [r7, #28]
#endif
}
}
#if (configQUEUE_REGISTRY_SIZE > 0)
if (hSemaphore != NULL) {
8011b4e: 69fb ldr r3, [r7, #28]
8011b50: 2b00 cmp r3, #0
8011b52: d00c beq.n 8011b6e <osSemaphoreNew+0x108>
if (attr != NULL) {
8011b54: 687b ldr r3, [r7, #4]
8011b56: 2b00 cmp r3, #0
8011b58: d003 beq.n 8011b62 <osSemaphoreNew+0xfc>
name = attr->name;
8011b5a: 687b ldr r3, [r7, #4]
8011b5c: 681b ldr r3, [r3, #0]
8011b5e: 617b str r3, [r7, #20]
8011b60: e001 b.n 8011b66 <osSemaphoreNew+0x100>
} else {
name = NULL;
8011b62: 2300 movs r3, #0
8011b64: 617b str r3, [r7, #20]
}
vQueueAddToRegistry (hSemaphore, name);
8011b66: 6979 ldr r1, [r7, #20]
8011b68: 69f8 ldr r0, [r7, #28]
8011b6a: f001 fbb7 bl 80132dc <vQueueAddToRegistry>
}
#endif
}
}
return ((osSemaphoreId_t)hSemaphore);
8011b6e: 69fb ldr r3, [r7, #28]
}
8011b70: 4618 mov r0, r3
8011b72: 3720 adds r7, #32
8011b74: 46bd mov sp, r7
8011b76: bd80 pop {r7, pc}
08011b78 <osSemaphoreAcquire>:
osStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout) {
8011b78: b580 push {r7, lr}
8011b7a: b086 sub sp, #24
8011b7c: af00 add r7, sp, #0
8011b7e: 6078 str r0, [r7, #4]
8011b80: 6039 str r1, [r7, #0]
SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
8011b82: 687b ldr r3, [r7, #4]
8011b84: 613b str r3, [r7, #16]
osStatus_t stat;
BaseType_t yield;
stat = osOK;
8011b86: 2300 movs r3, #0
8011b88: 617b str r3, [r7, #20]
if (hSemaphore == NULL) {
8011b8a: 693b ldr r3, [r7, #16]
8011b8c: 2b00 cmp r3, #0
8011b8e: d103 bne.n 8011b98 <osSemaphoreAcquire+0x20>
stat = osErrorParameter;
8011b90: f06f 0303 mvn.w r3, #3
8011b94: 617b str r3, [r7, #20]
8011b96: e039 b.n 8011c0c <osSemaphoreAcquire+0x94>
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011b98: f3ef 8305 mrs r3, IPSR
8011b9c: 60fb str r3, [r7, #12]
return(result);
8011b9e: 68fb ldr r3, [r7, #12]
}
else if (IS_IRQ()) {
8011ba0: 2b00 cmp r3, #0
8011ba2: d022 beq.n 8011bea <osSemaphoreAcquire+0x72>
if (timeout != 0U) {
8011ba4: 683b ldr r3, [r7, #0]
8011ba6: 2b00 cmp r3, #0
8011ba8: d003 beq.n 8011bb2 <osSemaphoreAcquire+0x3a>
stat = osErrorParameter;
8011baa: f06f 0303 mvn.w r3, #3
8011bae: 617b str r3, [r7, #20]
8011bb0: e02c b.n 8011c0c <osSemaphoreAcquire+0x94>
}
else {
yield = pdFALSE;
8011bb2: 2300 movs r3, #0
8011bb4: 60bb str r3, [r7, #8]
if (xSemaphoreTakeFromISR (hSemaphore, &yield) != pdPASS) {
8011bb6: f107 0308 add.w r3, r7, #8
8011bba: 461a mov r2, r3
8011bbc: 2100 movs r1, #0
8011bbe: 6938 ldr r0, [r7, #16]
8011bc0: f001 f980 bl 8012ec4 <xQueueReceiveFromISR>
8011bc4: 4603 mov r3, r0
8011bc6: 2b01 cmp r3, #1
8011bc8: d003 beq.n 8011bd2 <osSemaphoreAcquire+0x5a>
stat = osErrorResource;
8011bca: f06f 0302 mvn.w r3, #2
8011bce: 617b str r3, [r7, #20]
8011bd0: e01c b.n 8011c0c <osSemaphoreAcquire+0x94>
} else {
portYIELD_FROM_ISR (yield);
8011bd2: 68bb ldr r3, [r7, #8]
8011bd4: 2b00 cmp r3, #0
8011bd6: d019 beq.n 8011c0c <osSemaphoreAcquire+0x94>
8011bd8: 4b0f ldr r3, [pc, #60] @ (8011c18 <osSemaphoreAcquire+0xa0>)
8011bda: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8011bde: 601a str r2, [r3, #0]
8011be0: f3bf 8f4f dsb sy
8011be4: f3bf 8f6f isb sy
8011be8: e010 b.n 8011c0c <osSemaphoreAcquire+0x94>
}
}
}
else {
if (xSemaphoreTake (hSemaphore, (TickType_t)timeout) != pdPASS) {
8011bea: 6839 ldr r1, [r7, #0]
8011bec: 6938 ldr r0, [r7, #16]
8011bee: f001 f859 bl 8012ca4 <xQueueSemaphoreTake>
8011bf2: 4603 mov r3, r0
8011bf4: 2b01 cmp r3, #1
8011bf6: d009 beq.n 8011c0c <osSemaphoreAcquire+0x94>
if (timeout != 0U) {
8011bf8: 683b ldr r3, [r7, #0]
8011bfa: 2b00 cmp r3, #0
8011bfc: d003 beq.n 8011c06 <osSemaphoreAcquire+0x8e>
stat = osErrorTimeout;
8011bfe: f06f 0301 mvn.w r3, #1
8011c02: 617b str r3, [r7, #20]
8011c04: e002 b.n 8011c0c <osSemaphoreAcquire+0x94>
} else {
stat = osErrorResource;
8011c06: f06f 0302 mvn.w r3, #2
8011c0a: 617b str r3, [r7, #20]
}
}
}
return (stat);
8011c0c: 697b ldr r3, [r7, #20]
}
8011c0e: 4618 mov r0, r3
8011c10: 3718 adds r7, #24
8011c12: 46bd mov sp, r7
8011c14: bd80 pop {r7, pc}
8011c16: bf00 nop
8011c18: e000ed04 .word 0xe000ed04
08011c1c <osSemaphoreRelease>:
osStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id) {
8011c1c: b580 push {r7, lr}
8011c1e: b086 sub sp, #24
8011c20: af00 add r7, sp, #0
8011c22: 6078 str r0, [r7, #4]
SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
8011c24: 687b ldr r3, [r7, #4]
8011c26: 613b str r3, [r7, #16]
osStatus_t stat;
BaseType_t yield;
stat = osOK;
8011c28: 2300 movs r3, #0
8011c2a: 617b str r3, [r7, #20]
if (hSemaphore == NULL) {
8011c2c: 693b ldr r3, [r7, #16]
8011c2e: 2b00 cmp r3, #0
8011c30: d103 bne.n 8011c3a <osSemaphoreRelease+0x1e>
stat = osErrorParameter;
8011c32: f06f 0303 mvn.w r3, #3
8011c36: 617b str r3, [r7, #20]
8011c38: e02c b.n 8011c94 <osSemaphoreRelease+0x78>
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011c3a: f3ef 8305 mrs r3, IPSR
8011c3e: 60fb str r3, [r7, #12]
return(result);
8011c40: 68fb ldr r3, [r7, #12]
}
else if (IS_IRQ()) {
8011c42: 2b00 cmp r3, #0
8011c44: d01a beq.n 8011c7c <osSemaphoreRelease+0x60>
yield = pdFALSE;
8011c46: 2300 movs r3, #0
8011c48: 60bb str r3, [r7, #8]
if (xSemaphoreGiveFromISR (hSemaphore, &yield) != pdTRUE) {
8011c4a: f107 0308 add.w r3, r7, #8
8011c4e: 4619 mov r1, r3
8011c50: 6938 ldr r0, [r7, #16]
8011c52: f000 feb5 bl 80129c0 <xQueueGiveFromISR>
8011c56: 4603 mov r3, r0
8011c58: 2b01 cmp r3, #1
8011c5a: d003 beq.n 8011c64 <osSemaphoreRelease+0x48>
stat = osErrorResource;
8011c5c: f06f 0302 mvn.w r3, #2
8011c60: 617b str r3, [r7, #20]
8011c62: e017 b.n 8011c94 <osSemaphoreRelease+0x78>
} else {
portYIELD_FROM_ISR (yield);
8011c64: 68bb ldr r3, [r7, #8]
8011c66: 2b00 cmp r3, #0
8011c68: d014 beq.n 8011c94 <osSemaphoreRelease+0x78>
8011c6a: 4b0d ldr r3, [pc, #52] @ (8011ca0 <osSemaphoreRelease+0x84>)
8011c6c: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8011c70: 601a str r2, [r3, #0]
8011c72: f3bf 8f4f dsb sy
8011c76: f3bf 8f6f isb sy
8011c7a: e00b b.n 8011c94 <osSemaphoreRelease+0x78>
}
}
else {
if (xSemaphoreGive (hSemaphore) != pdPASS) {
8011c7c: 2300 movs r3, #0
8011c7e: 2200 movs r2, #0
8011c80: 2100 movs r1, #0
8011c82: 6938 ldr r0, [r7, #16]
8011c84: f000 fcfc bl 8012680 <xQueueGenericSend>
8011c88: 4603 mov r3, r0
8011c8a: 2b01 cmp r3, #1
8011c8c: d002 beq.n 8011c94 <osSemaphoreRelease+0x78>
stat = osErrorResource;
8011c8e: f06f 0302 mvn.w r3, #2
8011c92: 617b str r3, [r7, #20]
}
}
return (stat);
8011c94: 697b ldr r3, [r7, #20]
}
8011c96: 4618 mov r0, r3
8011c98: 3718 adds r7, #24
8011c9a: 46bd mov sp, r7
8011c9c: bd80 pop {r7, pc}
8011c9e: bf00 nop
8011ca0: e000ed04 .word 0xe000ed04
08011ca4 <osSemaphoreDelete>:
}
return (count);
}
osStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id) {
8011ca4: b580 push {r7, lr}
8011ca6: b086 sub sp, #24
8011ca8: af00 add r7, sp, #0
8011caa: 6078 str r0, [r7, #4]
SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
8011cac: 687b ldr r3, [r7, #4]
8011cae: 613b str r3, [r7, #16]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011cb0: f3ef 8305 mrs r3, IPSR
8011cb4: 60fb str r3, [r7, #12]
return(result);
8011cb6: 68fb ldr r3, [r7, #12]
osStatus_t stat;
#ifndef USE_FreeRTOS_HEAP_1
if (IS_IRQ()) {
8011cb8: 2b00 cmp r3, #0
8011cba: d003 beq.n 8011cc4 <osSemaphoreDelete+0x20>
stat = osErrorISR;
8011cbc: f06f 0305 mvn.w r3, #5
8011cc0: 617b str r3, [r7, #20]
8011cc2: e00e b.n 8011ce2 <osSemaphoreDelete+0x3e>
}
else if (hSemaphore == NULL) {
8011cc4: 693b ldr r3, [r7, #16]
8011cc6: 2b00 cmp r3, #0
8011cc8: d103 bne.n 8011cd2 <osSemaphoreDelete+0x2e>
stat = osErrorParameter;
8011cca: f06f 0303 mvn.w r3, #3
8011cce: 617b str r3, [r7, #20]
8011cd0: e007 b.n 8011ce2 <osSemaphoreDelete+0x3e>
}
else {
#if (configQUEUE_REGISTRY_SIZE > 0)
vQueueUnregisterQueue (hSemaphore);
8011cd2: 6938 ldr r0, [r7, #16]
8011cd4: f001 fb2c bl 8013330 <vQueueUnregisterQueue>
#endif
stat = osOK;
8011cd8: 2300 movs r3, #0
8011cda: 617b str r3, [r7, #20]
vSemaphoreDelete (hSemaphore);
8011cdc: 6938 ldr r0, [r7, #16]
8011cde: f001 f9b1 bl 8013044 <vQueueDelete>
}
#else
stat = osError;
#endif
return (stat);
8011ce2: 697b ldr r3, [r7, #20]
}
8011ce4: 4618 mov r0, r3
8011ce6: 3718 adds r7, #24
8011ce8: 46bd mov sp, r7
8011cea: bd80 pop {r7, pc}
08011cec <osMessageQueueNew>:
/*---------------------------------------------------------------------------*/
osMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr) {
8011cec: b580 push {r7, lr}
8011cee: b08a sub sp, #40 @ 0x28
8011cf0: af02 add r7, sp, #8
8011cf2: 60f8 str r0, [r7, #12]
8011cf4: 60b9 str r1, [r7, #8]
8011cf6: 607a str r2, [r7, #4]
int32_t mem;
#if (configQUEUE_REGISTRY_SIZE > 0)
const char *name;
#endif
hQueue = NULL;
8011cf8: 2300 movs r3, #0
8011cfa: 61fb str r3, [r7, #28]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011cfc: f3ef 8305 mrs r3, IPSR
8011d00: 613b str r3, [r7, #16]
return(result);
8011d02: 693b ldr r3, [r7, #16]
if (!IS_IRQ() && (msg_count > 0U) && (msg_size > 0U)) {
8011d04: 2b00 cmp r3, #0
8011d06: d15f bne.n 8011dc8 <osMessageQueueNew+0xdc>
8011d08: 68fb ldr r3, [r7, #12]
8011d0a: 2b00 cmp r3, #0
8011d0c: d05c beq.n 8011dc8 <osMessageQueueNew+0xdc>
8011d0e: 68bb ldr r3, [r7, #8]
8011d10: 2b00 cmp r3, #0
8011d12: d059 beq.n 8011dc8 <osMessageQueueNew+0xdc>
mem = -1;
8011d14: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8011d18: 61bb str r3, [r7, #24]
if (attr != NULL) {
8011d1a: 687b ldr r3, [r7, #4]
8011d1c: 2b00 cmp r3, #0
8011d1e: d029 beq.n 8011d74 <osMessageQueueNew+0x88>
if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
8011d20: 687b ldr r3, [r7, #4]
8011d22: 689b ldr r3, [r3, #8]
8011d24: 2b00 cmp r3, #0
8011d26: d012 beq.n 8011d4e <osMessageQueueNew+0x62>
8011d28: 687b ldr r3, [r7, #4]
8011d2a: 68db ldr r3, [r3, #12]
8011d2c: 2b4f cmp r3, #79 @ 0x4f
8011d2e: d90e bls.n 8011d4e <osMessageQueueNew+0x62>
(attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
8011d30: 687b ldr r3, [r7, #4]
8011d32: 691b ldr r3, [r3, #16]
if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
8011d34: 2b00 cmp r3, #0
8011d36: d00a beq.n 8011d4e <osMessageQueueNew+0x62>
(attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
8011d38: 687b ldr r3, [r7, #4]
8011d3a: 695a ldr r2, [r3, #20]
8011d3c: 68fb ldr r3, [r7, #12]
8011d3e: 68b9 ldr r1, [r7, #8]
8011d40: fb01 f303 mul.w r3, r1, r3
8011d44: 429a cmp r2, r3
8011d46: d302 bcc.n 8011d4e <osMessageQueueNew+0x62>
mem = 1;
8011d48: 2301 movs r3, #1
8011d4a: 61bb str r3, [r7, #24]
8011d4c: e014 b.n 8011d78 <osMessageQueueNew+0x8c>
}
else {
if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
8011d4e: 687b ldr r3, [r7, #4]
8011d50: 689b ldr r3, [r3, #8]
8011d52: 2b00 cmp r3, #0
8011d54: d110 bne.n 8011d78 <osMessageQueueNew+0x8c>
8011d56: 687b ldr r3, [r7, #4]
8011d58: 68db ldr r3, [r3, #12]
8011d5a: 2b00 cmp r3, #0
8011d5c: d10c bne.n 8011d78 <osMessageQueueNew+0x8c>
(attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
8011d5e: 687b ldr r3, [r7, #4]
8011d60: 691b ldr r3, [r3, #16]
if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
8011d62: 2b00 cmp r3, #0
8011d64: d108 bne.n 8011d78 <osMessageQueueNew+0x8c>
(attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
8011d66: 687b ldr r3, [r7, #4]
8011d68: 695b ldr r3, [r3, #20]
8011d6a: 2b00 cmp r3, #0
8011d6c: d104 bne.n 8011d78 <osMessageQueueNew+0x8c>
mem = 0;
8011d6e: 2300 movs r3, #0
8011d70: 61bb str r3, [r7, #24]
8011d72: e001 b.n 8011d78 <osMessageQueueNew+0x8c>
}
}
}
else {
mem = 0;
8011d74: 2300 movs r3, #0
8011d76: 61bb str r3, [r7, #24]
}
if (mem == 1) {
8011d78: 69bb ldr r3, [r7, #24]
8011d7a: 2b01 cmp r3, #1
8011d7c: d10b bne.n 8011d96 <osMessageQueueNew+0xaa>
#if (configSUPPORT_STATIC_ALLOCATION == 1)
hQueue = xQueueCreateStatic (msg_count, msg_size, attr->mq_mem, attr->cb_mem);
8011d7e: 687b ldr r3, [r7, #4]
8011d80: 691a ldr r2, [r3, #16]
8011d82: 687b ldr r3, [r7, #4]
8011d84: 689b ldr r3, [r3, #8]
8011d86: 2100 movs r1, #0
8011d88: 9100 str r1, [sp, #0]
8011d8a: 68b9 ldr r1, [r7, #8]
8011d8c: 68f8 ldr r0, [r7, #12]
8011d8e: f000 fa75 bl 801227c <xQueueGenericCreateStatic>
8011d92: 61f8 str r0, [r7, #28]
8011d94: e008 b.n 8011da8 <osMessageQueueNew+0xbc>
#endif
}
else {
if (mem == 0) {
8011d96: 69bb ldr r3, [r7, #24]
8011d98: 2b00 cmp r3, #0
8011d9a: d105 bne.n 8011da8 <osMessageQueueNew+0xbc>
#if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
hQueue = xQueueCreate (msg_count, msg_size);
8011d9c: 2200 movs r2, #0
8011d9e: 68b9 ldr r1, [r7, #8]
8011da0: 68f8 ldr r0, [r7, #12]
8011da2: f000 fae8 bl 8012376 <xQueueGenericCreate>
8011da6: 61f8 str r0, [r7, #28]
#endif
}
}
#if (configQUEUE_REGISTRY_SIZE > 0)
if (hQueue != NULL) {
8011da8: 69fb ldr r3, [r7, #28]
8011daa: 2b00 cmp r3, #0
8011dac: d00c beq.n 8011dc8 <osMessageQueueNew+0xdc>
if (attr != NULL) {
8011dae: 687b ldr r3, [r7, #4]
8011db0: 2b00 cmp r3, #0
8011db2: d003 beq.n 8011dbc <osMessageQueueNew+0xd0>
name = attr->name;
8011db4: 687b ldr r3, [r7, #4]
8011db6: 681b ldr r3, [r3, #0]
8011db8: 617b str r3, [r7, #20]
8011dba: e001 b.n 8011dc0 <osMessageQueueNew+0xd4>
} else {
name = NULL;
8011dbc: 2300 movs r3, #0
8011dbe: 617b str r3, [r7, #20]
}
vQueueAddToRegistry (hQueue, name);
8011dc0: 6979 ldr r1, [r7, #20]
8011dc2: 69f8 ldr r0, [r7, #28]
8011dc4: f001 fa8a bl 80132dc <vQueueAddToRegistry>
}
#endif
}
return ((osMessageQueueId_t)hQueue);
8011dc8: 69fb ldr r3, [r7, #28]
}
8011dca: 4618 mov r0, r3
8011dcc: 3720 adds r7, #32
8011dce: 46bd mov sp, r7
8011dd0: bd80 pop {r7, pc}
...
08011dd4 <osMessageQueuePut>:
osStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout) {
8011dd4: b580 push {r7, lr}
8011dd6: b088 sub sp, #32
8011dd8: af00 add r7, sp, #0
8011dda: 60f8 str r0, [r7, #12]
8011ddc: 60b9 str r1, [r7, #8]
8011dde: 603b str r3, [r7, #0]
8011de0: 4613 mov r3, r2
8011de2: 71fb strb r3, [r7, #7]
QueueHandle_t hQueue = (QueueHandle_t)mq_id;
8011de4: 68fb ldr r3, [r7, #12]
8011de6: 61bb str r3, [r7, #24]
osStatus_t stat;
BaseType_t yield;
(void)msg_prio; /* Message priority is ignored */
stat = osOK;
8011de8: 2300 movs r3, #0
8011dea: 61fb str r3, [r7, #28]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011dec: f3ef 8305 mrs r3, IPSR
8011df0: 617b str r3, [r7, #20]
return(result);
8011df2: 697b ldr r3, [r7, #20]
if (IS_IRQ()) {
8011df4: 2b00 cmp r3, #0
8011df6: d028 beq.n 8011e4a <osMessageQueuePut+0x76>
if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
8011df8: 69bb ldr r3, [r7, #24]
8011dfa: 2b00 cmp r3, #0
8011dfc: d005 beq.n 8011e0a <osMessageQueuePut+0x36>
8011dfe: 68bb ldr r3, [r7, #8]
8011e00: 2b00 cmp r3, #0
8011e02: d002 beq.n 8011e0a <osMessageQueuePut+0x36>
8011e04: 683b ldr r3, [r7, #0]
8011e06: 2b00 cmp r3, #0
8011e08: d003 beq.n 8011e12 <osMessageQueuePut+0x3e>
stat = osErrorParameter;
8011e0a: f06f 0303 mvn.w r3, #3
8011e0e: 61fb str r3, [r7, #28]
8011e10: e038 b.n 8011e84 <osMessageQueuePut+0xb0>
}
else {
yield = pdFALSE;
8011e12: 2300 movs r3, #0
8011e14: 613b str r3, [r7, #16]
if (xQueueSendToBackFromISR (hQueue, msg_ptr, &yield) != pdTRUE) {
8011e16: f107 0210 add.w r2, r7, #16
8011e1a: 2300 movs r3, #0
8011e1c: 68b9 ldr r1, [r7, #8]
8011e1e: 69b8 ldr r0, [r7, #24]
8011e20: f000 fd30 bl 8012884 <xQueueGenericSendFromISR>
8011e24: 4603 mov r3, r0
8011e26: 2b01 cmp r3, #1
8011e28: d003 beq.n 8011e32 <osMessageQueuePut+0x5e>
stat = osErrorResource;
8011e2a: f06f 0302 mvn.w r3, #2
8011e2e: 61fb str r3, [r7, #28]
8011e30: e028 b.n 8011e84 <osMessageQueuePut+0xb0>
} else {
portYIELD_FROM_ISR (yield);
8011e32: 693b ldr r3, [r7, #16]
8011e34: 2b00 cmp r3, #0
8011e36: d025 beq.n 8011e84 <osMessageQueuePut+0xb0>
8011e38: 4b15 ldr r3, [pc, #84] @ (8011e90 <osMessageQueuePut+0xbc>)
8011e3a: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8011e3e: 601a str r2, [r3, #0]
8011e40: f3bf 8f4f dsb sy
8011e44: f3bf 8f6f isb sy
8011e48: e01c b.n 8011e84 <osMessageQueuePut+0xb0>
}
}
}
else {
if ((hQueue == NULL) || (msg_ptr == NULL)) {
8011e4a: 69bb ldr r3, [r7, #24]
8011e4c: 2b00 cmp r3, #0
8011e4e: d002 beq.n 8011e56 <osMessageQueuePut+0x82>
8011e50: 68bb ldr r3, [r7, #8]
8011e52: 2b00 cmp r3, #0
8011e54: d103 bne.n 8011e5e <osMessageQueuePut+0x8a>
stat = osErrorParameter;
8011e56: f06f 0303 mvn.w r3, #3
8011e5a: 61fb str r3, [r7, #28]
8011e5c: e012 b.n 8011e84 <osMessageQueuePut+0xb0>
}
else {
if (xQueueSendToBack (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
8011e5e: 2300 movs r3, #0
8011e60: 683a ldr r2, [r7, #0]
8011e62: 68b9 ldr r1, [r7, #8]
8011e64: 69b8 ldr r0, [r7, #24]
8011e66: f000 fc0b bl 8012680 <xQueueGenericSend>
8011e6a: 4603 mov r3, r0
8011e6c: 2b01 cmp r3, #1
8011e6e: d009 beq.n 8011e84 <osMessageQueuePut+0xb0>
if (timeout != 0U) {
8011e70: 683b ldr r3, [r7, #0]
8011e72: 2b00 cmp r3, #0
8011e74: d003 beq.n 8011e7e <osMessageQueuePut+0xaa>
stat = osErrorTimeout;
8011e76: f06f 0301 mvn.w r3, #1
8011e7a: 61fb str r3, [r7, #28]
8011e7c: e002 b.n 8011e84 <osMessageQueuePut+0xb0>
} else {
stat = osErrorResource;
8011e7e: f06f 0302 mvn.w r3, #2
8011e82: 61fb str r3, [r7, #28]
}
}
}
}
return (stat);
8011e84: 69fb ldr r3, [r7, #28]
}
8011e86: 4618 mov r0, r3
8011e88: 3720 adds r7, #32
8011e8a: 46bd mov sp, r7
8011e8c: bd80 pop {r7, pc}
8011e8e: bf00 nop
8011e90: e000ed04 .word 0xe000ed04
08011e94 <osMessageQueueGet>:
osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout) {
8011e94: b580 push {r7, lr}
8011e96: b088 sub sp, #32
8011e98: af00 add r7, sp, #0
8011e9a: 60f8 str r0, [r7, #12]
8011e9c: 60b9 str r1, [r7, #8]
8011e9e: 607a str r2, [r7, #4]
8011ea0: 603b str r3, [r7, #0]
QueueHandle_t hQueue = (QueueHandle_t)mq_id;
8011ea2: 68fb ldr r3, [r7, #12]
8011ea4: 61bb str r3, [r7, #24]
osStatus_t stat;
BaseType_t yield;
(void)msg_prio; /* Message priority is ignored */
stat = osOK;
8011ea6: 2300 movs r3, #0
8011ea8: 61fb str r3, [r7, #28]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011eaa: f3ef 8305 mrs r3, IPSR
8011eae: 617b str r3, [r7, #20]
return(result);
8011eb0: 697b ldr r3, [r7, #20]
if (IS_IRQ()) {
8011eb2: 2b00 cmp r3, #0
8011eb4: d028 beq.n 8011f08 <osMessageQueueGet+0x74>
if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
8011eb6: 69bb ldr r3, [r7, #24]
8011eb8: 2b00 cmp r3, #0
8011eba: d005 beq.n 8011ec8 <osMessageQueueGet+0x34>
8011ebc: 68bb ldr r3, [r7, #8]
8011ebe: 2b00 cmp r3, #0
8011ec0: d002 beq.n 8011ec8 <osMessageQueueGet+0x34>
8011ec2: 683b ldr r3, [r7, #0]
8011ec4: 2b00 cmp r3, #0
8011ec6: d003 beq.n 8011ed0 <osMessageQueueGet+0x3c>
stat = osErrorParameter;
8011ec8: f06f 0303 mvn.w r3, #3
8011ecc: 61fb str r3, [r7, #28]
8011ece: e037 b.n 8011f40 <osMessageQueueGet+0xac>
}
else {
yield = pdFALSE;
8011ed0: 2300 movs r3, #0
8011ed2: 613b str r3, [r7, #16]
if (xQueueReceiveFromISR (hQueue, msg_ptr, &yield) != pdPASS) {
8011ed4: f107 0310 add.w r3, r7, #16
8011ed8: 461a mov r2, r3
8011eda: 68b9 ldr r1, [r7, #8]
8011edc: 69b8 ldr r0, [r7, #24]
8011ede: f000 fff1 bl 8012ec4 <xQueueReceiveFromISR>
8011ee2: 4603 mov r3, r0
8011ee4: 2b01 cmp r3, #1
8011ee6: d003 beq.n 8011ef0 <osMessageQueueGet+0x5c>
stat = osErrorResource;
8011ee8: f06f 0302 mvn.w r3, #2
8011eec: 61fb str r3, [r7, #28]
8011eee: e027 b.n 8011f40 <osMessageQueueGet+0xac>
} else {
portYIELD_FROM_ISR (yield);
8011ef0: 693b ldr r3, [r7, #16]
8011ef2: 2b00 cmp r3, #0
8011ef4: d024 beq.n 8011f40 <osMessageQueueGet+0xac>
8011ef6: 4b15 ldr r3, [pc, #84] @ (8011f4c <osMessageQueueGet+0xb8>)
8011ef8: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8011efc: 601a str r2, [r3, #0]
8011efe: f3bf 8f4f dsb sy
8011f02: f3bf 8f6f isb sy
8011f06: e01b b.n 8011f40 <osMessageQueueGet+0xac>
}
}
}
else {
if ((hQueue == NULL) || (msg_ptr == NULL)) {
8011f08: 69bb ldr r3, [r7, #24]
8011f0a: 2b00 cmp r3, #0
8011f0c: d002 beq.n 8011f14 <osMessageQueueGet+0x80>
8011f0e: 68bb ldr r3, [r7, #8]
8011f10: 2b00 cmp r3, #0
8011f12: d103 bne.n 8011f1c <osMessageQueueGet+0x88>
stat = osErrorParameter;
8011f14: f06f 0303 mvn.w r3, #3
8011f18: 61fb str r3, [r7, #28]
8011f1a: e011 b.n 8011f40 <osMessageQueueGet+0xac>
}
else {
if (xQueueReceive (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
8011f1c: 683a ldr r2, [r7, #0]
8011f1e: 68b9 ldr r1, [r7, #8]
8011f20: 69b8 ldr r0, [r7, #24]
8011f22: f000 fddd bl 8012ae0 <xQueueReceive>
8011f26: 4603 mov r3, r0
8011f28: 2b01 cmp r3, #1
8011f2a: d009 beq.n 8011f40 <osMessageQueueGet+0xac>
if (timeout != 0U) {
8011f2c: 683b ldr r3, [r7, #0]
8011f2e: 2b00 cmp r3, #0
8011f30: d003 beq.n 8011f3a <osMessageQueueGet+0xa6>
stat = osErrorTimeout;
8011f32: f06f 0301 mvn.w r3, #1
8011f36: 61fb str r3, [r7, #28]
8011f38: e002 b.n 8011f40 <osMessageQueueGet+0xac>
} else {
stat = osErrorResource;
8011f3a: f06f 0302 mvn.w r3, #2
8011f3e: 61fb str r3, [r7, #28]
}
}
}
}
return (stat);
8011f40: 69fb ldr r3, [r7, #28]
}
8011f42: 4618 mov r0, r3
8011f44: 3720 adds r7, #32
8011f46: 46bd mov sp, r7
8011f48: bd80 pop {r7, pc}
8011f4a: bf00 nop
8011f4c: e000ed04 .word 0xe000ed04
08011f50 <osMessageQueueGetCount>:
}
return (size);
}
uint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id) {
8011f50: b580 push {r7, lr}
8011f52: b086 sub sp, #24
8011f54: af00 add r7, sp, #0
8011f56: 6078 str r0, [r7, #4]
QueueHandle_t hQueue = (QueueHandle_t)mq_id;
8011f58: 687b ldr r3, [r7, #4]
8011f5a: 613b str r3, [r7, #16]
UBaseType_t count;
if (hQueue == NULL) {
8011f5c: 693b ldr r3, [r7, #16]
8011f5e: 2b00 cmp r3, #0
8011f60: d102 bne.n 8011f68 <osMessageQueueGetCount+0x18>
count = 0U;
8011f62: 2300 movs r3, #0
8011f64: 617b str r3, [r7, #20]
8011f66: e00e b.n 8011f86 <osMessageQueueGetCount+0x36>
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011f68: f3ef 8305 mrs r3, IPSR
8011f6c: 60fb str r3, [r7, #12]
return(result);
8011f6e: 68fb ldr r3, [r7, #12]
}
else if (IS_IRQ()) {
8011f70: 2b00 cmp r3, #0
8011f72: d004 beq.n 8011f7e <osMessageQueueGetCount+0x2e>
count = uxQueueMessagesWaitingFromISR (hQueue);
8011f74: 6938 ldr r0, [r7, #16]
8011f76: f001 f846 bl 8013006 <uxQueueMessagesWaitingFromISR>
8011f7a: 6178 str r0, [r7, #20]
8011f7c: e003 b.n 8011f86 <osMessageQueueGetCount+0x36>
}
else {
count = uxQueueMessagesWaiting (hQueue);
8011f7e: 6938 ldr r0, [r7, #16]
8011f80: f001 f822 bl 8012fc8 <uxQueueMessagesWaiting>
8011f84: 6178 str r0, [r7, #20]
}
return ((uint32_t)count);
8011f86: 697b ldr r3, [r7, #20]
}
8011f88: 4618 mov r0, r3
8011f8a: 3718 adds r7, #24
8011f8c: 46bd mov sp, r7
8011f8e: bd80 pop {r7, pc}
08011f90 <osMessageQueueDelete>:
}
return (stat);
}
osStatus_t osMessageQueueDelete (osMessageQueueId_t mq_id) {
8011f90: b580 push {r7, lr}
8011f92: b086 sub sp, #24
8011f94: af00 add r7, sp, #0
8011f96: 6078 str r0, [r7, #4]
QueueHandle_t hQueue = (QueueHandle_t)mq_id;
8011f98: 687b ldr r3, [r7, #4]
8011f9a: 613b str r3, [r7, #16]
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
8011f9c: f3ef 8305 mrs r3, IPSR
8011fa0: 60fb str r3, [r7, #12]
return(result);
8011fa2: 68fb ldr r3, [r7, #12]
osStatus_t stat;
#ifndef USE_FreeRTOS_HEAP_1
if (IS_IRQ()) {
8011fa4: 2b00 cmp r3, #0
8011fa6: d003 beq.n 8011fb0 <osMessageQueueDelete+0x20>
stat = osErrorISR;
8011fa8: f06f 0305 mvn.w r3, #5
8011fac: 617b str r3, [r7, #20]
8011fae: e00e b.n 8011fce <osMessageQueueDelete+0x3e>
}
else if (hQueue == NULL) {
8011fb0: 693b ldr r3, [r7, #16]
8011fb2: 2b00 cmp r3, #0
8011fb4: d103 bne.n 8011fbe <osMessageQueueDelete+0x2e>
stat = osErrorParameter;
8011fb6: f06f 0303 mvn.w r3, #3
8011fba: 617b str r3, [r7, #20]
8011fbc: e007 b.n 8011fce <osMessageQueueDelete+0x3e>
}
else {
#if (configQUEUE_REGISTRY_SIZE > 0)
vQueueUnregisterQueue (hQueue);
8011fbe: 6938 ldr r0, [r7, #16]
8011fc0: f001 f9b6 bl 8013330 <vQueueUnregisterQueue>
#endif
stat = osOK;
8011fc4: 2300 movs r3, #0
8011fc6: 617b str r3, [r7, #20]
vQueueDelete (hQueue);
8011fc8: 6938 ldr r0, [r7, #16]
8011fca: f001 f83b bl 8013044 <vQueueDelete>
}
#else
stat = osError;
#endif
return (stat);
8011fce: 697b ldr r3, [r7, #20]
}
8011fd0: 4618 mov r0, r3
8011fd2: 3718 adds r7, #24
8011fd4: 46bd mov sp, r7
8011fd6: bd80 pop {r7, pc}
08011fd8 <vApplicationGetIdleTaskMemory>:
/*
vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) {
8011fd8: b480 push {r7}
8011fda: b085 sub sp, #20
8011fdc: af00 add r7, sp, #0
8011fde: 60f8 str r0, [r7, #12]
8011fe0: 60b9 str r1, [r7, #8]
8011fe2: 607a str r2, [r7, #4]
/* Idle task control block and stack */
static StaticTask_t Idle_TCB;
static StackType_t Idle_Stack[configMINIMAL_STACK_SIZE];
*ppxIdleTaskTCBBuffer = &Idle_TCB;
8011fe4: 68fb ldr r3, [r7, #12]
8011fe6: 4a07 ldr r2, [pc, #28] @ (8012004 <vApplicationGetIdleTaskMemory+0x2c>)
8011fe8: 601a str r2, [r3, #0]
*ppxIdleTaskStackBuffer = &Idle_Stack[0];
8011fea: 68bb ldr r3, [r7, #8]
8011fec: 4a06 ldr r2, [pc, #24] @ (8012008 <vApplicationGetIdleTaskMemory+0x30>)
8011fee: 601a str r2, [r3, #0]
*pulIdleTaskStackSize = (uint32_t)configMINIMAL_STACK_SIZE;
8011ff0: 687b ldr r3, [r7, #4]
8011ff2: f44f 7200 mov.w r2, #512 @ 0x200
8011ff6: 601a str r2, [r3, #0]
}
8011ff8: bf00 nop
8011ffa: 3714 adds r7, #20
8011ffc: 46bd mov sp, r7
8011ffe: f85d 7b04 ldr.w r7, [sp], #4
8012002: 4770 bx lr
8012004: 24002420 .word 0x24002420
8012008: 240024c8 .word 0x240024c8
0801200c <vApplicationGetTimerTaskMemory>:
/*
vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) {
801200c: b480 push {r7}
801200e: b085 sub sp, #20
8012010: af00 add r7, sp, #0
8012012: 60f8 str r0, [r7, #12]
8012014: 60b9 str r1, [r7, #8]
8012016: 607a str r2, [r7, #4]
/* Timer task control block and stack */
static StaticTask_t Timer_TCB;
static StackType_t Timer_Stack[configTIMER_TASK_STACK_DEPTH];
*ppxTimerTaskTCBBuffer = &Timer_TCB;
8012018: 68fb ldr r3, [r7, #12]
801201a: 4a07 ldr r2, [pc, #28] @ (8012038 <vApplicationGetTimerTaskMemory+0x2c>)
801201c: 601a str r2, [r3, #0]
*ppxTimerTaskStackBuffer = &Timer_Stack[0];
801201e: 68bb ldr r3, [r7, #8]
8012020: 4a06 ldr r2, [pc, #24] @ (801203c <vApplicationGetTimerTaskMemory+0x30>)
8012022: 601a str r2, [r3, #0]
*pulTimerTaskStackSize = (uint32_t)configTIMER_TASK_STACK_DEPTH;
8012024: 687b ldr r3, [r7, #4]
8012026: f44f 6280 mov.w r2, #1024 @ 0x400
801202a: 601a str r2, [r3, #0]
}
801202c: bf00 nop
801202e: 3714 adds r7, #20
8012030: 46bd mov sp, r7
8012032: f85d 7b04 ldr.w r7, [sp], #4
8012036: 4770 bx lr
8012038: 24002cc8 .word 0x24002cc8
801203c: 24002d70 .word 0x24002d70
08012040 <vListInitialise>:
/*-----------------------------------------------------------
* PUBLIC LIST API documented in list.h
*----------------------------------------------------------*/
void vListInitialise( List_t * const pxList )
{
8012040: b480 push {r7}
8012042: b083 sub sp, #12
8012044: af00 add r7, sp, #0
8012046: 6078 str r0, [r7, #4]
/* The list structure contains a list item which is used to mark the
end of the list. To initialise the list the list end is inserted
as the only list entry. */
pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
8012048: 687b ldr r3, [r7, #4]
801204a: f103 0208 add.w r2, r3, #8
801204e: 687b ldr r3, [r7, #4]
8012050: 605a str r2, [r3, #4]
/* The list end value is the highest possible value in the list to
ensure it remains at the end of the list. */
pxList->xListEnd.xItemValue = portMAX_DELAY;
8012052: 687b ldr r3, [r7, #4]
8012054: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
8012058: 609a str r2, [r3, #8]
/* The list end next and previous pointers point to itself so we know
when the list is empty. */
pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
801205a: 687b ldr r3, [r7, #4]
801205c: f103 0208 add.w r2, r3, #8
8012060: 687b ldr r3, [r7, #4]
8012062: 60da str r2, [r3, #12]
pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */
8012064: 687b ldr r3, [r7, #4]
8012066: f103 0208 add.w r2, r3, #8
801206a: 687b ldr r3, [r7, #4]
801206c: 611a str r2, [r3, #16]
pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
801206e: 687b ldr r3, [r7, #4]
8012070: 2200 movs r2, #0
8012072: 601a str r2, [r3, #0]
/* Write known values into the list if
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
}
8012074: bf00 nop
8012076: 370c adds r7, #12
8012078: 46bd mov sp, r7
801207a: f85d 7b04 ldr.w r7, [sp], #4
801207e: 4770 bx lr
08012080 <vListInitialiseItem>:
/*-----------------------------------------------------------*/
void vListInitialiseItem( ListItem_t * const pxItem )
{
8012080: b480 push {r7}
8012082: b083 sub sp, #12
8012084: af00 add r7, sp, #0
8012086: 6078 str r0, [r7, #4]
/* Make sure the list item is not recorded as being on a list. */
pxItem->pxContainer = NULL;
8012088: 687b ldr r3, [r7, #4]
801208a: 2200 movs r2, #0
801208c: 611a str r2, [r3, #16]
/* Write known values into the list item if
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
}
801208e: bf00 nop
8012090: 370c adds r7, #12
8012092: 46bd mov sp, r7
8012094: f85d 7b04 ldr.w r7, [sp], #4
8012098: 4770 bx lr
0801209a <vListInsertEnd>:
/*-----------------------------------------------------------*/
void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
{
801209a: b480 push {r7}
801209c: b085 sub sp, #20
801209e: af00 add r7, sp, #0
80120a0: 6078 str r0, [r7, #4]
80120a2: 6039 str r1, [r7, #0]
ListItem_t * const pxIndex = pxList->pxIndex;
80120a4: 687b ldr r3, [r7, #4]
80120a6: 685b ldr r3, [r3, #4]
80120a8: 60fb str r3, [r7, #12]
listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
/* Insert a new list item into pxList, but rather than sort the list,
makes the new list item the last item to be removed by a call to
listGET_OWNER_OF_NEXT_ENTRY(). */
pxNewListItem->pxNext = pxIndex;
80120aa: 683b ldr r3, [r7, #0]
80120ac: 68fa ldr r2, [r7, #12]
80120ae: 605a str r2, [r3, #4]
pxNewListItem->pxPrevious = pxIndex->pxPrevious;
80120b0: 68fb ldr r3, [r7, #12]
80120b2: 689a ldr r2, [r3, #8]
80120b4: 683b ldr r3, [r7, #0]
80120b6: 609a str r2, [r3, #8]
/* Only used during decision coverage testing. */
mtCOVERAGE_TEST_DELAY();
pxIndex->pxPrevious->pxNext = pxNewListItem;
80120b8: 68fb ldr r3, [r7, #12]
80120ba: 689b ldr r3, [r3, #8]
80120bc: 683a ldr r2, [r7, #0]
80120be: 605a str r2, [r3, #4]
pxIndex->pxPrevious = pxNewListItem;
80120c0: 68fb ldr r3, [r7, #12]
80120c2: 683a ldr r2, [r7, #0]
80120c4: 609a str r2, [r3, #8]
/* Remember which list the item is in. */
pxNewListItem->pxContainer = pxList;
80120c6: 683b ldr r3, [r7, #0]
80120c8: 687a ldr r2, [r7, #4]
80120ca: 611a str r2, [r3, #16]
( pxList->uxNumberOfItems )++;
80120cc: 687b ldr r3, [r7, #4]
80120ce: 681b ldr r3, [r3, #0]
80120d0: 1c5a adds r2, r3, #1
80120d2: 687b ldr r3, [r7, #4]
80120d4: 601a str r2, [r3, #0]
}
80120d6: bf00 nop
80120d8: 3714 adds r7, #20
80120da: 46bd mov sp, r7
80120dc: f85d 7b04 ldr.w r7, [sp], #4
80120e0: 4770 bx lr
080120e2 <vListInsert>:
/*-----------------------------------------------------------*/
void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
{
80120e2: b480 push {r7}
80120e4: b085 sub sp, #20
80120e6: af00 add r7, sp, #0
80120e8: 6078 str r0, [r7, #4]
80120ea: 6039 str r1, [r7, #0]
ListItem_t *pxIterator;
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
80120ec: 683b ldr r3, [r7, #0]
80120ee: 681b ldr r3, [r3, #0]
80120f0: 60bb str r3, [r7, #8]
new list item should be placed after it. This ensures that TCBs which are
stored in ready lists (all of which have the same xItemValue value) get a
share of the CPU. However, if the xItemValue is the same as the back marker
the iteration loop below will not end. Therefore the value is checked
first, and the algorithm slightly modified if necessary. */
if( xValueOfInsertion == portMAX_DELAY )
80120f2: 68bb ldr r3, [r7, #8]
80120f4: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80120f8: d103 bne.n 8012102 <vListInsert+0x20>
{
pxIterator = pxList->xListEnd.pxPrevious;
80120fa: 687b ldr r3, [r7, #4]
80120fc: 691b ldr r3, [r3, #16]
80120fe: 60fb str r3, [r7, #12]
8012100: e00c b.n 801211c <vListInsert+0x3a>
4) Using a queue or semaphore before it has been initialised or
before the scheduler has been started (are interrupts firing
before vTaskStartScheduler() has been called?).
**********************************************************************/
for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
8012102: 687b ldr r3, [r7, #4]
8012104: 3308 adds r3, #8
8012106: 60fb str r3, [r7, #12]
8012108: e002 b.n 8012110 <vListInsert+0x2e>
801210a: 68fb ldr r3, [r7, #12]
801210c: 685b ldr r3, [r3, #4]
801210e: 60fb str r3, [r7, #12]
8012110: 68fb ldr r3, [r7, #12]
8012112: 685b ldr r3, [r3, #4]
8012114: 681b ldr r3, [r3, #0]
8012116: 68ba ldr r2, [r7, #8]
8012118: 429a cmp r2, r3
801211a: d2f6 bcs.n 801210a <vListInsert+0x28>
/* There is nothing to do here, just iterating to the wanted
insertion position. */
}
}
pxNewListItem->pxNext = pxIterator->pxNext;
801211c: 68fb ldr r3, [r7, #12]
801211e: 685a ldr r2, [r3, #4]
8012120: 683b ldr r3, [r7, #0]
8012122: 605a str r2, [r3, #4]
pxNewListItem->pxNext->pxPrevious = pxNewListItem;
8012124: 683b ldr r3, [r7, #0]
8012126: 685b ldr r3, [r3, #4]
8012128: 683a ldr r2, [r7, #0]
801212a: 609a str r2, [r3, #8]
pxNewListItem->pxPrevious = pxIterator;
801212c: 683b ldr r3, [r7, #0]
801212e: 68fa ldr r2, [r7, #12]
8012130: 609a str r2, [r3, #8]
pxIterator->pxNext = pxNewListItem;
8012132: 68fb ldr r3, [r7, #12]
8012134: 683a ldr r2, [r7, #0]
8012136: 605a str r2, [r3, #4]
/* Remember which list the item is in. This allows fast removal of the
item later. */
pxNewListItem->pxContainer = pxList;
8012138: 683b ldr r3, [r7, #0]
801213a: 687a ldr r2, [r7, #4]
801213c: 611a str r2, [r3, #16]
( pxList->uxNumberOfItems )++;
801213e: 687b ldr r3, [r7, #4]
8012140: 681b ldr r3, [r3, #0]
8012142: 1c5a adds r2, r3, #1
8012144: 687b ldr r3, [r7, #4]
8012146: 601a str r2, [r3, #0]
}
8012148: bf00 nop
801214a: 3714 adds r7, #20
801214c: 46bd mov sp, r7
801214e: f85d 7b04 ldr.w r7, [sp], #4
8012152: 4770 bx lr
08012154 <uxListRemove>:
/*-----------------------------------------------------------*/
UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
{
8012154: b480 push {r7}
8012156: b085 sub sp, #20
8012158: af00 add r7, sp, #0
801215a: 6078 str r0, [r7, #4]
/* The list item knows which list it is in. Obtain the list from the list
item. */
List_t * const pxList = pxItemToRemove->pxContainer;
801215c: 687b ldr r3, [r7, #4]
801215e: 691b ldr r3, [r3, #16]
8012160: 60fb str r3, [r7, #12]
pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
8012162: 687b ldr r3, [r7, #4]
8012164: 685b ldr r3, [r3, #4]
8012166: 687a ldr r2, [r7, #4]
8012168: 6892 ldr r2, [r2, #8]
801216a: 609a str r2, [r3, #8]
pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
801216c: 687b ldr r3, [r7, #4]
801216e: 689b ldr r3, [r3, #8]
8012170: 687a ldr r2, [r7, #4]
8012172: 6852 ldr r2, [r2, #4]
8012174: 605a str r2, [r3, #4]
/* Only used during decision coverage testing. */
mtCOVERAGE_TEST_DELAY();
/* Make sure the index is left pointing to a valid item. */
if( pxList->pxIndex == pxItemToRemove )
8012176: 68fb ldr r3, [r7, #12]
8012178: 685b ldr r3, [r3, #4]
801217a: 687a ldr r2, [r7, #4]
801217c: 429a cmp r2, r3
801217e: d103 bne.n 8012188 <uxListRemove+0x34>
{
pxList->pxIndex = pxItemToRemove->pxPrevious;
8012180: 687b ldr r3, [r7, #4]
8012182: 689a ldr r2, [r3, #8]
8012184: 68fb ldr r3, [r7, #12]
8012186: 605a str r2, [r3, #4]
else
{
mtCOVERAGE_TEST_MARKER();
}
pxItemToRemove->pxContainer = NULL;
8012188: 687b ldr r3, [r7, #4]
801218a: 2200 movs r2, #0
801218c: 611a str r2, [r3, #16]
( pxList->uxNumberOfItems )--;
801218e: 68fb ldr r3, [r7, #12]
8012190: 681b ldr r3, [r3, #0]
8012192: 1e5a subs r2, r3, #1
8012194: 68fb ldr r3, [r7, #12]
8012196: 601a str r2, [r3, #0]
return pxList->uxNumberOfItems;
8012198: 68fb ldr r3, [r7, #12]
801219a: 681b ldr r3, [r3, #0]
}
801219c: 4618 mov r0, r3
801219e: 3714 adds r7, #20
80121a0: 46bd mov sp, r7
80121a2: f85d 7b04 ldr.w r7, [sp], #4
80121a6: 4770 bx lr
080121a8 <xQueueGenericReset>:
} \
taskEXIT_CRITICAL()
/*-----------------------------------------------------------*/
BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
{
80121a8: b580 push {r7, lr}
80121aa: b084 sub sp, #16
80121ac: af00 add r7, sp, #0
80121ae: 6078 str r0, [r7, #4]
80121b0: 6039 str r1, [r7, #0]
Queue_t * const pxQueue = xQueue;
80121b2: 687b ldr r3, [r7, #4]
80121b4: 60fb str r3, [r7, #12]
configASSERT( pxQueue );
80121b6: 68fb ldr r3, [r7, #12]
80121b8: 2b00 cmp r3, #0
80121ba: d10b bne.n 80121d4 <xQueueGenericReset+0x2c>
portFORCE_INLINE static void vPortRaiseBASEPRI( void )
{
uint32_t ulNewBASEPRI;
__asm volatile
80121bc: f04f 0350 mov.w r3, #80 @ 0x50
80121c0: f383 8811 msr BASEPRI, r3
80121c4: f3bf 8f6f isb sy
80121c8: f3bf 8f4f dsb sy
80121cc: 60bb str r3, [r7, #8]
" msr basepri, %0 \n" \
" isb \n" \
" dsb \n" \
:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
);
}
80121ce: bf00 nop
80121d0: bf00 nop
80121d2: e7fd b.n 80121d0 <xQueueGenericReset+0x28>
taskENTER_CRITICAL();
80121d4: f003 fcd8 bl 8015b88 <vPortEnterCritical>
{
pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
80121d8: 68fb ldr r3, [r7, #12]
80121da: 681a ldr r2, [r3, #0]
80121dc: 68fb ldr r3, [r7, #12]
80121de: 6bdb ldr r3, [r3, #60] @ 0x3c
80121e0: 68f9 ldr r1, [r7, #12]
80121e2: 6c09 ldr r1, [r1, #64] @ 0x40
80121e4: fb01 f303 mul.w r3, r1, r3
80121e8: 441a add r2, r3
80121ea: 68fb ldr r3, [r7, #12]
80121ec: 609a str r2, [r3, #8]
pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
80121ee: 68fb ldr r3, [r7, #12]
80121f0: 2200 movs r2, #0
80121f2: 639a str r2, [r3, #56] @ 0x38
pxQueue->pcWriteTo = pxQueue->pcHead;
80121f4: 68fb ldr r3, [r7, #12]
80121f6: 681a ldr r2, [r3, #0]
80121f8: 68fb ldr r3, [r7, #12]
80121fa: 605a str r2, [r3, #4]
pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
80121fc: 68fb ldr r3, [r7, #12]
80121fe: 681a ldr r2, [r3, #0]
8012200: 68fb ldr r3, [r7, #12]
8012202: 6bdb ldr r3, [r3, #60] @ 0x3c
8012204: 3b01 subs r3, #1
8012206: 68f9 ldr r1, [r7, #12]
8012208: 6c09 ldr r1, [r1, #64] @ 0x40
801220a: fb01 f303 mul.w r3, r1, r3
801220e: 441a add r2, r3
8012210: 68fb ldr r3, [r7, #12]
8012212: 60da str r2, [r3, #12]
pxQueue->cRxLock = queueUNLOCKED;
8012214: 68fb ldr r3, [r7, #12]
8012216: 22ff movs r2, #255 @ 0xff
8012218: f883 2044 strb.w r2, [r3, #68] @ 0x44
pxQueue->cTxLock = queueUNLOCKED;
801221c: 68fb ldr r3, [r7, #12]
801221e: 22ff movs r2, #255 @ 0xff
8012220: f883 2045 strb.w r2, [r3, #69] @ 0x45
if( xNewQueue == pdFALSE )
8012224: 683b ldr r3, [r7, #0]
8012226: 2b00 cmp r3, #0
8012228: d114 bne.n 8012254 <xQueueGenericReset+0xac>
/* If there are tasks blocked waiting to read from the queue, then
the tasks will remain blocked as after this function exits the queue
will still be empty. If there are tasks blocked waiting to write to
the queue, then one should be unblocked as after this function exits
it will be possible to write to it. */
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
801222a: 68fb ldr r3, [r7, #12]
801222c: 691b ldr r3, [r3, #16]
801222e: 2b00 cmp r3, #0
8012230: d01a beq.n 8012268 <xQueueGenericReset+0xc0>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
8012232: 68fb ldr r3, [r7, #12]
8012234: 3310 adds r3, #16
8012236: 4618 mov r0, r3
8012238: f002 f922 bl 8014480 <xTaskRemoveFromEventList>
801223c: 4603 mov r3, r0
801223e: 2b00 cmp r3, #0
8012240: d012 beq.n 8012268 <xQueueGenericReset+0xc0>
{
queueYIELD_IF_USING_PREEMPTION();
8012242: 4b0d ldr r3, [pc, #52] @ (8012278 <xQueueGenericReset+0xd0>)
8012244: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8012248: 601a str r2, [r3, #0]
801224a: f3bf 8f4f dsb sy
801224e: f3bf 8f6f isb sy
8012252: e009 b.n 8012268 <xQueueGenericReset+0xc0>
}
}
else
{
/* Ensure the event queues start in the correct state. */
vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
8012254: 68fb ldr r3, [r7, #12]
8012256: 3310 adds r3, #16
8012258: 4618 mov r0, r3
801225a: f7ff fef1 bl 8012040 <vListInitialise>
vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
801225e: 68fb ldr r3, [r7, #12]
8012260: 3324 adds r3, #36 @ 0x24
8012262: 4618 mov r0, r3
8012264: f7ff feec bl 8012040 <vListInitialise>
}
}
taskEXIT_CRITICAL();
8012268: f003 fcc0 bl 8015bec <vPortExitCritical>
/* A value is returned for calling semantic consistency with previous
versions. */
return pdPASS;
801226c: 2301 movs r3, #1
}
801226e: 4618 mov r0, r3
8012270: 3710 adds r7, #16
8012272: 46bd mov sp, r7
8012274: bd80 pop {r7, pc}
8012276: bf00 nop
8012278: e000ed04 .word 0xe000ed04
0801227c <xQueueGenericCreateStatic>:
/*-----------------------------------------------------------*/
#if( configSUPPORT_STATIC_ALLOCATION == 1 )
QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
{
801227c: b580 push {r7, lr}
801227e: b08e sub sp, #56 @ 0x38
8012280: af02 add r7, sp, #8
8012282: 60f8 str r0, [r7, #12]
8012284: 60b9 str r1, [r7, #8]
8012286: 607a str r2, [r7, #4]
8012288: 603b str r3, [r7, #0]
Queue_t *pxNewQueue;
configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
801228a: 68fb ldr r3, [r7, #12]
801228c: 2b00 cmp r3, #0
801228e: d10b bne.n 80122a8 <xQueueGenericCreateStatic+0x2c>
__asm volatile
8012290: f04f 0350 mov.w r3, #80 @ 0x50
8012294: f383 8811 msr BASEPRI, r3
8012298: f3bf 8f6f isb sy
801229c: f3bf 8f4f dsb sy
80122a0: 62bb str r3, [r7, #40] @ 0x28
}
80122a2: bf00 nop
80122a4: bf00 nop
80122a6: e7fd b.n 80122a4 <xQueueGenericCreateStatic+0x28>
/* The StaticQueue_t structure and the queue storage area must be
supplied. */
configASSERT( pxStaticQueue != NULL );
80122a8: 683b ldr r3, [r7, #0]
80122aa: 2b00 cmp r3, #0
80122ac: d10b bne.n 80122c6 <xQueueGenericCreateStatic+0x4a>
__asm volatile
80122ae: f04f 0350 mov.w r3, #80 @ 0x50
80122b2: f383 8811 msr BASEPRI, r3
80122b6: f3bf 8f6f isb sy
80122ba: f3bf 8f4f dsb sy
80122be: 627b str r3, [r7, #36] @ 0x24
}
80122c0: bf00 nop
80122c2: bf00 nop
80122c4: e7fd b.n 80122c2 <xQueueGenericCreateStatic+0x46>
/* A queue storage area should be provided if the item size is not 0, and
should not be provided if the item size is 0. */
configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
80122c6: 687b ldr r3, [r7, #4]
80122c8: 2b00 cmp r3, #0
80122ca: d002 beq.n 80122d2 <xQueueGenericCreateStatic+0x56>
80122cc: 68bb ldr r3, [r7, #8]
80122ce: 2b00 cmp r3, #0
80122d0: d001 beq.n 80122d6 <xQueueGenericCreateStatic+0x5a>
80122d2: 2301 movs r3, #1
80122d4: e000 b.n 80122d8 <xQueueGenericCreateStatic+0x5c>
80122d6: 2300 movs r3, #0
80122d8: 2b00 cmp r3, #0
80122da: d10b bne.n 80122f4 <xQueueGenericCreateStatic+0x78>
__asm volatile
80122dc: f04f 0350 mov.w r3, #80 @ 0x50
80122e0: f383 8811 msr BASEPRI, r3
80122e4: f3bf 8f6f isb sy
80122e8: f3bf 8f4f dsb sy
80122ec: 623b str r3, [r7, #32]
}
80122ee: bf00 nop
80122f0: bf00 nop
80122f2: e7fd b.n 80122f0 <xQueueGenericCreateStatic+0x74>
configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
80122f4: 687b ldr r3, [r7, #4]
80122f6: 2b00 cmp r3, #0
80122f8: d102 bne.n 8012300 <xQueueGenericCreateStatic+0x84>
80122fa: 68bb ldr r3, [r7, #8]
80122fc: 2b00 cmp r3, #0
80122fe: d101 bne.n 8012304 <xQueueGenericCreateStatic+0x88>
8012300: 2301 movs r3, #1
8012302: e000 b.n 8012306 <xQueueGenericCreateStatic+0x8a>
8012304: 2300 movs r3, #0
8012306: 2b00 cmp r3, #0
8012308: d10b bne.n 8012322 <xQueueGenericCreateStatic+0xa6>
__asm volatile
801230a: f04f 0350 mov.w r3, #80 @ 0x50
801230e: f383 8811 msr BASEPRI, r3
8012312: f3bf 8f6f isb sy
8012316: f3bf 8f4f dsb sy
801231a: 61fb str r3, [r7, #28]
}
801231c: bf00 nop
801231e: bf00 nop
8012320: e7fd b.n 801231e <xQueueGenericCreateStatic+0xa2>
#if( configASSERT_DEFINED == 1 )
{
/* Sanity check that the size of the structure used to declare a
variable of type StaticQueue_t or StaticSemaphore_t equals the size of
the real queue and semaphore structures. */
volatile size_t xSize = sizeof( StaticQueue_t );
8012322: 2350 movs r3, #80 @ 0x50
8012324: 617b str r3, [r7, #20]
configASSERT( xSize == sizeof( Queue_t ) );
8012326: 697b ldr r3, [r7, #20]
8012328: 2b50 cmp r3, #80 @ 0x50
801232a: d00b beq.n 8012344 <xQueueGenericCreateStatic+0xc8>
__asm volatile
801232c: f04f 0350 mov.w r3, #80 @ 0x50
8012330: f383 8811 msr BASEPRI, r3
8012334: f3bf 8f6f isb sy
8012338: f3bf 8f4f dsb sy
801233c: 61bb str r3, [r7, #24]
}
801233e: bf00 nop
8012340: bf00 nop
8012342: e7fd b.n 8012340 <xQueueGenericCreateStatic+0xc4>
( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
8012344: 697b ldr r3, [r7, #20]
#endif /* configASSERT_DEFINED */
/* The address of a statically allocated queue was passed in, use it.
The address of a statically allocated storage area was also passed in
but is already set. */
pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
8012346: 683b ldr r3, [r7, #0]
8012348: 62fb str r3, [r7, #44] @ 0x2c
if( pxNewQueue != NULL )
801234a: 6afb ldr r3, [r7, #44] @ 0x2c
801234c: 2b00 cmp r3, #0
801234e: d00d beq.n 801236c <xQueueGenericCreateStatic+0xf0>
#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
{
/* Queues can be allocated wither statically or dynamically, so
note this queue was allocated statically in case the queue is
later deleted. */
pxNewQueue->ucStaticallyAllocated = pdTRUE;
8012350: 6afb ldr r3, [r7, #44] @ 0x2c
8012352: 2201 movs r2, #1
8012354: f883 2046 strb.w r2, [r3, #70] @ 0x46
}
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
8012358: f897 2038 ldrb.w r2, [r7, #56] @ 0x38
801235c: 6afb ldr r3, [r7, #44] @ 0x2c
801235e: 9300 str r3, [sp, #0]
8012360: 4613 mov r3, r2
8012362: 687a ldr r2, [r7, #4]
8012364: 68b9 ldr r1, [r7, #8]
8012366: 68f8 ldr r0, [r7, #12]
8012368: f000 f840 bl 80123ec <prvInitialiseNewQueue>
{
traceQUEUE_CREATE_FAILED( ucQueueType );
mtCOVERAGE_TEST_MARKER();
}
return pxNewQueue;
801236c: 6afb ldr r3, [r7, #44] @ 0x2c
}
801236e: 4618 mov r0, r3
8012370: 3730 adds r7, #48 @ 0x30
8012372: 46bd mov sp, r7
8012374: bd80 pop {r7, pc}
08012376 <xQueueGenericCreate>:
/*-----------------------------------------------------------*/
#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
{
8012376: b580 push {r7, lr}
8012378: b08a sub sp, #40 @ 0x28
801237a: af02 add r7, sp, #8
801237c: 60f8 str r0, [r7, #12]
801237e: 60b9 str r1, [r7, #8]
8012380: 4613 mov r3, r2
8012382: 71fb strb r3, [r7, #7]
Queue_t *pxNewQueue;
size_t xQueueSizeInBytes;
uint8_t *pucQueueStorage;
configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
8012384: 68fb ldr r3, [r7, #12]
8012386: 2b00 cmp r3, #0
8012388: d10b bne.n 80123a2 <xQueueGenericCreate+0x2c>
__asm volatile
801238a: f04f 0350 mov.w r3, #80 @ 0x50
801238e: f383 8811 msr BASEPRI, r3
8012392: f3bf 8f6f isb sy
8012396: f3bf 8f4f dsb sy
801239a: 613b str r3, [r7, #16]
}
801239c: bf00 nop
801239e: bf00 nop
80123a0: e7fd b.n 801239e <xQueueGenericCreate+0x28>
/* Allocate enough space to hold the maximum number of items that
can be in the queue at any time. It is valid for uxItemSize to be
zero in the case the queue is used as a semaphore. */
xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
80123a2: 68fb ldr r3, [r7, #12]
80123a4: 68ba ldr r2, [r7, #8]
80123a6: fb02 f303 mul.w r3, r2, r3
80123aa: 61fb str r3, [r7, #28]
alignment requirements of the Queue_t structure - which in this case
is an int8_t *. Therefore, whenever the stack alignment requirements
are greater than or equal to the pointer to char requirements the cast
is safe. In other cases alignment requirements are not strict (one or
two bytes). */
pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
80123ac: 69fb ldr r3, [r7, #28]
80123ae: 3350 adds r3, #80 @ 0x50
80123b0: 4618 mov r0, r3
80123b2: f003 fd0b bl 8015dcc <pvPortMalloc>
80123b6: 61b8 str r0, [r7, #24]
if( pxNewQueue != NULL )
80123b8: 69bb ldr r3, [r7, #24]
80123ba: 2b00 cmp r3, #0
80123bc: d011 beq.n 80123e2 <xQueueGenericCreate+0x6c>
{
/* Jump past the queue structure to find the location of the queue
storage area. */
pucQueueStorage = ( uint8_t * ) pxNewQueue;
80123be: 69bb ldr r3, [r7, #24]
80123c0: 617b str r3, [r7, #20]
pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
80123c2: 697b ldr r3, [r7, #20]
80123c4: 3350 adds r3, #80 @ 0x50
80123c6: 617b str r3, [r7, #20]
#if( configSUPPORT_STATIC_ALLOCATION == 1 )
{
/* Queues can be created either statically or dynamically, so
note this task was created dynamically in case it is later
deleted. */
pxNewQueue->ucStaticallyAllocated = pdFALSE;
80123c8: 69bb ldr r3, [r7, #24]
80123ca: 2200 movs r2, #0
80123cc: f883 2046 strb.w r2, [r3, #70] @ 0x46
}
#endif /* configSUPPORT_STATIC_ALLOCATION */
prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
80123d0: 79fa ldrb r2, [r7, #7]
80123d2: 69bb ldr r3, [r7, #24]
80123d4: 9300 str r3, [sp, #0]
80123d6: 4613 mov r3, r2
80123d8: 697a ldr r2, [r7, #20]
80123da: 68b9 ldr r1, [r7, #8]
80123dc: 68f8 ldr r0, [r7, #12]
80123de: f000 f805 bl 80123ec <prvInitialiseNewQueue>
{
traceQUEUE_CREATE_FAILED( ucQueueType );
mtCOVERAGE_TEST_MARKER();
}
return pxNewQueue;
80123e2: 69bb ldr r3, [r7, #24]
}
80123e4: 4618 mov r0, r3
80123e6: 3720 adds r7, #32
80123e8: 46bd mov sp, r7
80123ea: bd80 pop {r7, pc}
080123ec <prvInitialiseNewQueue>:
#endif /* configSUPPORT_STATIC_ALLOCATION */
/*-----------------------------------------------------------*/
static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
{
80123ec: b580 push {r7, lr}
80123ee: b084 sub sp, #16
80123f0: af00 add r7, sp, #0
80123f2: 60f8 str r0, [r7, #12]
80123f4: 60b9 str r1, [r7, #8]
80123f6: 607a str r2, [r7, #4]
80123f8: 70fb strb r3, [r7, #3]
/* Remove compiler warnings about unused parameters should
configUSE_TRACE_FACILITY not be set to 1. */
( void ) ucQueueType;
if( uxItemSize == ( UBaseType_t ) 0 )
80123fa: 68bb ldr r3, [r7, #8]
80123fc: 2b00 cmp r3, #0
80123fe: d103 bne.n 8012408 <prvInitialiseNewQueue+0x1c>
{
/* No RAM was allocated for the queue storage area, but PC head cannot
be set to NULL because NULL is used as a key to say the queue is used as
a mutex. Therefore just set pcHead to point to the queue as a benign
value that is known to be within the memory map. */
pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
8012400: 69bb ldr r3, [r7, #24]
8012402: 69ba ldr r2, [r7, #24]
8012404: 601a str r2, [r3, #0]
8012406: e002 b.n 801240e <prvInitialiseNewQueue+0x22>
}
else
{
/* Set the head to the start of the queue storage area. */
pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
8012408: 69bb ldr r3, [r7, #24]
801240a: 687a ldr r2, [r7, #4]
801240c: 601a str r2, [r3, #0]
}
/* Initialise the queue members as described where the queue type is
defined. */
pxNewQueue->uxLength = uxQueueLength;
801240e: 69bb ldr r3, [r7, #24]
8012410: 68fa ldr r2, [r7, #12]
8012412: 63da str r2, [r3, #60] @ 0x3c
pxNewQueue->uxItemSize = uxItemSize;
8012414: 69bb ldr r3, [r7, #24]
8012416: 68ba ldr r2, [r7, #8]
8012418: 641a str r2, [r3, #64] @ 0x40
( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
801241a: 2101 movs r1, #1
801241c: 69b8 ldr r0, [r7, #24]
801241e: f7ff fec3 bl 80121a8 <xQueueGenericReset>
#if ( configUSE_TRACE_FACILITY == 1 )
{
pxNewQueue->ucQueueType = ucQueueType;
8012422: 69bb ldr r3, [r7, #24]
8012424: 78fa ldrb r2, [r7, #3]
8012426: f883 204c strb.w r2, [r3, #76] @ 0x4c
pxNewQueue->pxQueueSetContainer = NULL;
}
#endif /* configUSE_QUEUE_SETS */
traceQUEUE_CREATE( pxNewQueue );
}
801242a: bf00 nop
801242c: 3710 adds r7, #16
801242e: 46bd mov sp, r7
8012430: bd80 pop {r7, pc}
08012432 <prvInitialiseMutex>:
/*-----------------------------------------------------------*/
#if( configUSE_MUTEXES == 1 )
static void prvInitialiseMutex( Queue_t *pxNewQueue )
{
8012432: b580 push {r7, lr}
8012434: b082 sub sp, #8
8012436: af00 add r7, sp, #0
8012438: 6078 str r0, [r7, #4]
if( pxNewQueue != NULL )
801243a: 687b ldr r3, [r7, #4]
801243c: 2b00 cmp r3, #0
801243e: d00e beq.n 801245e <prvInitialiseMutex+0x2c>
{
/* The queue create function will set all the queue structure members
correctly for a generic queue, but this function is creating a
mutex. Overwrite those members that need to be set differently -
in particular the information required for priority inheritance. */
pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
8012440: 687b ldr r3, [r7, #4]
8012442: 2200 movs r2, #0
8012444: 609a str r2, [r3, #8]
pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
8012446: 687b ldr r3, [r7, #4]
8012448: 2200 movs r2, #0
801244a: 601a str r2, [r3, #0]
/* In case this is a recursive mutex. */
pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
801244c: 687b ldr r3, [r7, #4]
801244e: 2200 movs r2, #0
8012450: 60da str r2, [r3, #12]
traceCREATE_MUTEX( pxNewQueue );
/* Start with the semaphore in the expected state. */
( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
8012452: 2300 movs r3, #0
8012454: 2200 movs r2, #0
8012456: 2100 movs r1, #0
8012458: 6878 ldr r0, [r7, #4]
801245a: f000 f911 bl 8012680 <xQueueGenericSend>
}
else
{
traceCREATE_MUTEX_FAILED();
}
}
801245e: bf00 nop
8012460: 3708 adds r7, #8
8012462: 46bd mov sp, r7
8012464: bd80 pop {r7, pc}
08012466 <xQueueCreateMutex>:
/*-----------------------------------------------------------*/
#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
{
8012466: b580 push {r7, lr}
8012468: b086 sub sp, #24
801246a: af00 add r7, sp, #0
801246c: 4603 mov r3, r0
801246e: 71fb strb r3, [r7, #7]
QueueHandle_t xNewQueue;
const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
8012470: 2301 movs r3, #1
8012472: 617b str r3, [r7, #20]
8012474: 2300 movs r3, #0
8012476: 613b str r3, [r7, #16]
xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
8012478: 79fb ldrb r3, [r7, #7]
801247a: 461a mov r2, r3
801247c: 6939 ldr r1, [r7, #16]
801247e: 6978 ldr r0, [r7, #20]
8012480: f7ff ff79 bl 8012376 <xQueueGenericCreate>
8012484: 60f8 str r0, [r7, #12]
prvInitialiseMutex( ( Queue_t * ) xNewQueue );
8012486: 68f8 ldr r0, [r7, #12]
8012488: f7ff ffd3 bl 8012432 <prvInitialiseMutex>
return xNewQueue;
801248c: 68fb ldr r3, [r7, #12]
}
801248e: 4618 mov r0, r3
8012490: 3718 adds r7, #24
8012492: 46bd mov sp, r7
8012494: bd80 pop {r7, pc}
08012496 <xQueueCreateMutexStatic>:
/*-----------------------------------------------------------*/
#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
{
8012496: b580 push {r7, lr}
8012498: b088 sub sp, #32
801249a: af02 add r7, sp, #8
801249c: 4603 mov r3, r0
801249e: 6039 str r1, [r7, #0]
80124a0: 71fb strb r3, [r7, #7]
QueueHandle_t xNewQueue;
const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
80124a2: 2301 movs r3, #1
80124a4: 617b str r3, [r7, #20]
80124a6: 2300 movs r3, #0
80124a8: 613b str r3, [r7, #16]
/* Prevent compiler warnings about unused parameters if
configUSE_TRACE_FACILITY does not equal 1. */
( void ) ucQueueType;
xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
80124aa: 79fb ldrb r3, [r7, #7]
80124ac: 9300 str r3, [sp, #0]
80124ae: 683b ldr r3, [r7, #0]
80124b0: 2200 movs r2, #0
80124b2: 6939 ldr r1, [r7, #16]
80124b4: 6978 ldr r0, [r7, #20]
80124b6: f7ff fee1 bl 801227c <xQueueGenericCreateStatic>
80124ba: 60f8 str r0, [r7, #12]
prvInitialiseMutex( ( Queue_t * ) xNewQueue );
80124bc: 68f8 ldr r0, [r7, #12]
80124be: f7ff ffb8 bl 8012432 <prvInitialiseMutex>
return xNewQueue;
80124c2: 68fb ldr r3, [r7, #12]
}
80124c4: 4618 mov r0, r3
80124c6: 3718 adds r7, #24
80124c8: 46bd mov sp, r7
80124ca: bd80 pop {r7, pc}
080124cc <xQueueGiveMutexRecursive>:
/*-----------------------------------------------------------*/
#if ( configUSE_RECURSIVE_MUTEXES == 1 )
BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
{
80124cc: b590 push {r4, r7, lr}
80124ce: b087 sub sp, #28
80124d0: af00 add r7, sp, #0
80124d2: 6078 str r0, [r7, #4]
BaseType_t xReturn;
Queue_t * const pxMutex = ( Queue_t * ) xMutex;
80124d4: 687b ldr r3, [r7, #4]
80124d6: 613b str r3, [r7, #16]
configASSERT( pxMutex );
80124d8: 693b ldr r3, [r7, #16]
80124da: 2b00 cmp r3, #0
80124dc: d10b bne.n 80124f6 <xQueueGiveMutexRecursive+0x2a>
__asm volatile
80124de: f04f 0350 mov.w r3, #80 @ 0x50
80124e2: f383 8811 msr BASEPRI, r3
80124e6: f3bf 8f6f isb sy
80124ea: f3bf 8f4f dsb sy
80124ee: 60fb str r3, [r7, #12]
}
80124f0: bf00 nop
80124f2: bf00 nop
80124f4: e7fd b.n 80124f2 <xQueueGiveMutexRecursive+0x26>
change outside of this task. If this task does not hold the mutex then
pxMutexHolder can never coincidentally equal the tasks handle, and as
this is the only condition we are interested in it does not matter if
pxMutexHolder is accessed simultaneously by another task. Therefore no
mutual exclusion is required to test the pxMutexHolder variable. */
if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
80124f6: 693b ldr r3, [r7, #16]
80124f8: 689c ldr r4, [r3, #8]
80124fa: f002 f9af bl 801485c <xTaskGetCurrentTaskHandle>
80124fe: 4603 mov r3, r0
8012500: 429c cmp r4, r3
8012502: d111 bne.n 8012528 <xQueueGiveMutexRecursive+0x5c>
/* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
the task handle, therefore no underflow check is required. Also,
uxRecursiveCallCount is only modified by the mutex holder, and as
there can only be one, no mutual exclusion is required to modify the
uxRecursiveCallCount member. */
( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
8012504: 693b ldr r3, [r7, #16]
8012506: 68db ldr r3, [r3, #12]
8012508: 1e5a subs r2, r3, #1
801250a: 693b ldr r3, [r7, #16]
801250c: 60da str r2, [r3, #12]
/* Has the recursive call count unwound to 0? */
if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
801250e: 693b ldr r3, [r7, #16]
8012510: 68db ldr r3, [r3, #12]
8012512: 2b00 cmp r3, #0
8012514: d105 bne.n 8012522 <xQueueGiveMutexRecursive+0x56>
{
/* Return the mutex. This will automatically unblock any other
task that might be waiting to access the mutex. */
( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
8012516: 2300 movs r3, #0
8012518: 2200 movs r2, #0
801251a: 2100 movs r1, #0
801251c: 6938 ldr r0, [r7, #16]
801251e: f000 f8af bl 8012680 <xQueueGenericSend>
else
{
mtCOVERAGE_TEST_MARKER();
}
xReturn = pdPASS;
8012522: 2301 movs r3, #1
8012524: 617b str r3, [r7, #20]
8012526: e001 b.n 801252c <xQueueGiveMutexRecursive+0x60>
}
else
{
/* The mutex cannot be given because the calling task is not the
holder. */
xReturn = pdFAIL;
8012528: 2300 movs r3, #0
801252a: 617b str r3, [r7, #20]
traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
}
return xReturn;
801252c: 697b ldr r3, [r7, #20]
}
801252e: 4618 mov r0, r3
8012530: 371c adds r7, #28
8012532: 46bd mov sp, r7
8012534: bd90 pop {r4, r7, pc}
08012536 <xQueueTakeMutexRecursive>:
/*-----------------------------------------------------------*/
#if ( configUSE_RECURSIVE_MUTEXES == 1 )
BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
{
8012536: b590 push {r4, r7, lr}
8012538: b087 sub sp, #28
801253a: af00 add r7, sp, #0
801253c: 6078 str r0, [r7, #4]
801253e: 6039 str r1, [r7, #0]
BaseType_t xReturn;
Queue_t * const pxMutex = ( Queue_t * ) xMutex;
8012540: 687b ldr r3, [r7, #4]
8012542: 613b str r3, [r7, #16]
configASSERT( pxMutex );
8012544: 693b ldr r3, [r7, #16]
8012546: 2b00 cmp r3, #0
8012548: d10b bne.n 8012562 <xQueueTakeMutexRecursive+0x2c>
__asm volatile
801254a: f04f 0350 mov.w r3, #80 @ 0x50
801254e: f383 8811 msr BASEPRI, r3
8012552: f3bf 8f6f isb sy
8012556: f3bf 8f4f dsb sy
801255a: 60fb str r3, [r7, #12]
}
801255c: bf00 nop
801255e: bf00 nop
8012560: e7fd b.n 801255e <xQueueTakeMutexRecursive+0x28>
/* Comments regarding mutual exclusion as per those within
xQueueGiveMutexRecursive(). */
traceTAKE_MUTEX_RECURSIVE( pxMutex );
if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
8012562: 693b ldr r3, [r7, #16]
8012564: 689c ldr r4, [r3, #8]
8012566: f002 f979 bl 801485c <xTaskGetCurrentTaskHandle>
801256a: 4603 mov r3, r0
801256c: 429c cmp r4, r3
801256e: d107 bne.n 8012580 <xQueueTakeMutexRecursive+0x4a>
{
( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
8012570: 693b ldr r3, [r7, #16]
8012572: 68db ldr r3, [r3, #12]
8012574: 1c5a adds r2, r3, #1
8012576: 693b ldr r3, [r7, #16]
8012578: 60da str r2, [r3, #12]
xReturn = pdPASS;
801257a: 2301 movs r3, #1
801257c: 617b str r3, [r7, #20]
801257e: e00c b.n 801259a <xQueueTakeMutexRecursive+0x64>
}
else
{
xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
8012580: 6839 ldr r1, [r7, #0]
8012582: 6938 ldr r0, [r7, #16]
8012584: f000 fb8e bl 8012ca4 <xQueueSemaphoreTake>
8012588: 6178 str r0, [r7, #20]
/* pdPASS will only be returned if the mutex was successfully
obtained. The calling task may have entered the Blocked state
before reaching here. */
if( xReturn != pdFAIL )
801258a: 697b ldr r3, [r7, #20]
801258c: 2b00 cmp r3, #0
801258e: d004 beq.n 801259a <xQueueTakeMutexRecursive+0x64>
{
( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
8012590: 693b ldr r3, [r7, #16]
8012592: 68db ldr r3, [r3, #12]
8012594: 1c5a adds r2, r3, #1
8012596: 693b ldr r3, [r7, #16]
8012598: 60da str r2, [r3, #12]
{
traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
}
}
return xReturn;
801259a: 697b ldr r3, [r7, #20]
}
801259c: 4618 mov r0, r3
801259e: 371c adds r7, #28
80125a0: 46bd mov sp, r7
80125a2: bd90 pop {r4, r7, pc}
080125a4 <xQueueCreateCountingSemaphoreStatic>:
/*-----------------------------------------------------------*/
#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
{
80125a4: b580 push {r7, lr}
80125a6: b08a sub sp, #40 @ 0x28
80125a8: af02 add r7, sp, #8
80125aa: 60f8 str r0, [r7, #12]
80125ac: 60b9 str r1, [r7, #8]
80125ae: 607a str r2, [r7, #4]
QueueHandle_t xHandle;
configASSERT( uxMaxCount != 0 );
80125b0: 68fb ldr r3, [r7, #12]
80125b2: 2b00 cmp r3, #0
80125b4: d10b bne.n 80125ce <xQueueCreateCountingSemaphoreStatic+0x2a>
__asm volatile
80125b6: f04f 0350 mov.w r3, #80 @ 0x50
80125ba: f383 8811 msr BASEPRI, r3
80125be: f3bf 8f6f isb sy
80125c2: f3bf 8f4f dsb sy
80125c6: 61bb str r3, [r7, #24]
}
80125c8: bf00 nop
80125ca: bf00 nop
80125cc: e7fd b.n 80125ca <xQueueCreateCountingSemaphoreStatic+0x26>
configASSERT( uxInitialCount <= uxMaxCount );
80125ce: 68ba ldr r2, [r7, #8]
80125d0: 68fb ldr r3, [r7, #12]
80125d2: 429a cmp r2, r3
80125d4: d90b bls.n 80125ee <xQueueCreateCountingSemaphoreStatic+0x4a>
__asm volatile
80125d6: f04f 0350 mov.w r3, #80 @ 0x50
80125da: f383 8811 msr BASEPRI, r3
80125de: f3bf 8f6f isb sy
80125e2: f3bf 8f4f dsb sy
80125e6: 617b str r3, [r7, #20]
}
80125e8: bf00 nop
80125ea: bf00 nop
80125ec: e7fd b.n 80125ea <xQueueCreateCountingSemaphoreStatic+0x46>
xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
80125ee: 2302 movs r3, #2
80125f0: 9300 str r3, [sp, #0]
80125f2: 687b ldr r3, [r7, #4]
80125f4: 2200 movs r2, #0
80125f6: 2100 movs r1, #0
80125f8: 68f8 ldr r0, [r7, #12]
80125fa: f7ff fe3f bl 801227c <xQueueGenericCreateStatic>
80125fe: 61f8 str r0, [r7, #28]
if( xHandle != NULL )
8012600: 69fb ldr r3, [r7, #28]
8012602: 2b00 cmp r3, #0
8012604: d002 beq.n 801260c <xQueueCreateCountingSemaphoreStatic+0x68>
{
( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
8012606: 69fb ldr r3, [r7, #28]
8012608: 68ba ldr r2, [r7, #8]
801260a: 639a str r2, [r3, #56] @ 0x38
else
{
traceCREATE_COUNTING_SEMAPHORE_FAILED();
}
return xHandle;
801260c: 69fb ldr r3, [r7, #28]
}
801260e: 4618 mov r0, r3
8012610: 3720 adds r7, #32
8012612: 46bd mov sp, r7
8012614: bd80 pop {r7, pc}
08012616 <xQueueCreateCountingSemaphore>:
/*-----------------------------------------------------------*/
#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
{
8012616: b580 push {r7, lr}
8012618: b086 sub sp, #24
801261a: af00 add r7, sp, #0
801261c: 6078 str r0, [r7, #4]
801261e: 6039 str r1, [r7, #0]
QueueHandle_t xHandle;
configASSERT( uxMaxCount != 0 );
8012620: 687b ldr r3, [r7, #4]
8012622: 2b00 cmp r3, #0
8012624: d10b bne.n 801263e <xQueueCreateCountingSemaphore+0x28>
__asm volatile
8012626: f04f 0350 mov.w r3, #80 @ 0x50
801262a: f383 8811 msr BASEPRI, r3
801262e: f3bf 8f6f isb sy
8012632: f3bf 8f4f dsb sy
8012636: 613b str r3, [r7, #16]
}
8012638: bf00 nop
801263a: bf00 nop
801263c: e7fd b.n 801263a <xQueueCreateCountingSemaphore+0x24>
configASSERT( uxInitialCount <= uxMaxCount );
801263e: 683a ldr r2, [r7, #0]
8012640: 687b ldr r3, [r7, #4]
8012642: 429a cmp r2, r3
8012644: d90b bls.n 801265e <xQueueCreateCountingSemaphore+0x48>
__asm volatile
8012646: f04f 0350 mov.w r3, #80 @ 0x50
801264a: f383 8811 msr BASEPRI, r3
801264e: f3bf 8f6f isb sy
8012652: f3bf 8f4f dsb sy
8012656: 60fb str r3, [r7, #12]
}
8012658: bf00 nop
801265a: bf00 nop
801265c: e7fd b.n 801265a <xQueueCreateCountingSemaphore+0x44>
xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
801265e: 2202 movs r2, #2
8012660: 2100 movs r1, #0
8012662: 6878 ldr r0, [r7, #4]
8012664: f7ff fe87 bl 8012376 <xQueueGenericCreate>
8012668: 6178 str r0, [r7, #20]
if( xHandle != NULL )
801266a: 697b ldr r3, [r7, #20]
801266c: 2b00 cmp r3, #0
801266e: d002 beq.n 8012676 <xQueueCreateCountingSemaphore+0x60>
{
( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
8012670: 697b ldr r3, [r7, #20]
8012672: 683a ldr r2, [r7, #0]
8012674: 639a str r2, [r3, #56] @ 0x38
else
{
traceCREATE_COUNTING_SEMAPHORE_FAILED();
}
return xHandle;
8012676: 697b ldr r3, [r7, #20]
}
8012678: 4618 mov r0, r3
801267a: 3718 adds r7, #24
801267c: 46bd mov sp, r7
801267e: bd80 pop {r7, pc}
08012680 <xQueueGenericSend>:
#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
/*-----------------------------------------------------------*/
BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
{
8012680: b580 push {r7, lr}
8012682: b08e sub sp, #56 @ 0x38
8012684: af00 add r7, sp, #0
8012686: 60f8 str r0, [r7, #12]
8012688: 60b9 str r1, [r7, #8]
801268a: 607a str r2, [r7, #4]
801268c: 603b str r3, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
801268e: 2300 movs r3, #0
8012690: 637b str r3, [r7, #52] @ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
8012692: 68fb ldr r3, [r7, #12]
8012694: 633b str r3, [r7, #48] @ 0x30
configASSERT( pxQueue );
8012696: 6b3b ldr r3, [r7, #48] @ 0x30
8012698: 2b00 cmp r3, #0
801269a: d10b bne.n 80126b4 <xQueueGenericSend+0x34>
__asm volatile
801269c: f04f 0350 mov.w r3, #80 @ 0x50
80126a0: f383 8811 msr BASEPRI, r3
80126a4: f3bf 8f6f isb sy
80126a8: f3bf 8f4f dsb sy
80126ac: 62bb str r3, [r7, #40] @ 0x28
}
80126ae: bf00 nop
80126b0: bf00 nop
80126b2: e7fd b.n 80126b0 <xQueueGenericSend+0x30>
configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
80126b4: 68bb ldr r3, [r7, #8]
80126b6: 2b00 cmp r3, #0
80126b8: d103 bne.n 80126c2 <xQueueGenericSend+0x42>
80126ba: 6b3b ldr r3, [r7, #48] @ 0x30
80126bc: 6c1b ldr r3, [r3, #64] @ 0x40
80126be: 2b00 cmp r3, #0
80126c0: d101 bne.n 80126c6 <xQueueGenericSend+0x46>
80126c2: 2301 movs r3, #1
80126c4: e000 b.n 80126c8 <xQueueGenericSend+0x48>
80126c6: 2300 movs r3, #0
80126c8: 2b00 cmp r3, #0
80126ca: d10b bne.n 80126e4 <xQueueGenericSend+0x64>
__asm volatile
80126cc: f04f 0350 mov.w r3, #80 @ 0x50
80126d0: f383 8811 msr BASEPRI, r3
80126d4: f3bf 8f6f isb sy
80126d8: f3bf 8f4f dsb sy
80126dc: 627b str r3, [r7, #36] @ 0x24
}
80126de: bf00 nop
80126e0: bf00 nop
80126e2: e7fd b.n 80126e0 <xQueueGenericSend+0x60>
configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
80126e4: 683b ldr r3, [r7, #0]
80126e6: 2b02 cmp r3, #2
80126e8: d103 bne.n 80126f2 <xQueueGenericSend+0x72>
80126ea: 6b3b ldr r3, [r7, #48] @ 0x30
80126ec: 6bdb ldr r3, [r3, #60] @ 0x3c
80126ee: 2b01 cmp r3, #1
80126f0: d101 bne.n 80126f6 <xQueueGenericSend+0x76>
80126f2: 2301 movs r3, #1
80126f4: e000 b.n 80126f8 <xQueueGenericSend+0x78>
80126f6: 2300 movs r3, #0
80126f8: 2b00 cmp r3, #0
80126fa: d10b bne.n 8012714 <xQueueGenericSend+0x94>
__asm volatile
80126fc: f04f 0350 mov.w r3, #80 @ 0x50
8012700: f383 8811 msr BASEPRI, r3
8012704: f3bf 8f6f isb sy
8012708: f3bf 8f4f dsb sy
801270c: 623b str r3, [r7, #32]
}
801270e: bf00 nop
8012710: bf00 nop
8012712: e7fd b.n 8012710 <xQueueGenericSend+0x90>
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
{
configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
8012714: f002 f8b2 bl 801487c <xTaskGetSchedulerState>
8012718: 4603 mov r3, r0
801271a: 2b00 cmp r3, #0
801271c: d102 bne.n 8012724 <xQueueGenericSend+0xa4>
801271e: 687b ldr r3, [r7, #4]
8012720: 2b00 cmp r3, #0
8012722: d101 bne.n 8012728 <xQueueGenericSend+0xa8>
8012724: 2301 movs r3, #1
8012726: e000 b.n 801272a <xQueueGenericSend+0xaa>
8012728: 2300 movs r3, #0
801272a: 2b00 cmp r3, #0
801272c: d10b bne.n 8012746 <xQueueGenericSend+0xc6>
__asm volatile
801272e: f04f 0350 mov.w r3, #80 @ 0x50
8012732: f383 8811 msr BASEPRI, r3
8012736: f3bf 8f6f isb sy
801273a: f3bf 8f4f dsb sy
801273e: 61fb str r3, [r7, #28]
}
8012740: bf00 nop
8012742: bf00 nop
8012744: e7fd b.n 8012742 <xQueueGenericSend+0xc2>
/*lint -save -e904 This function relaxes the coding standard somewhat to
allow return statements within the function itself. This is done in the
interest of execution time efficiency. */
for( ;; )
{
taskENTER_CRITICAL();
8012746: f003 fa1f bl 8015b88 <vPortEnterCritical>
{
/* Is there room on the queue now? The running task must be the
highest priority task wanting to access the queue. If the head item
in the queue is to be overwritten then it does not matter if the
queue is full. */
if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
801274a: 6b3b ldr r3, [r7, #48] @ 0x30
801274c: 6b9a ldr r2, [r3, #56] @ 0x38
801274e: 6b3b ldr r3, [r7, #48] @ 0x30
8012750: 6bdb ldr r3, [r3, #60] @ 0x3c
8012752: 429a cmp r2, r3
8012754: d302 bcc.n 801275c <xQueueGenericSend+0xdc>
8012756: 683b ldr r3, [r7, #0]
8012758: 2b02 cmp r3, #2
801275a: d129 bne.n 80127b0 <xQueueGenericSend+0x130>
}
}
}
#else /* configUSE_QUEUE_SETS */
{
xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
801275c: 683a ldr r2, [r7, #0]
801275e: 68b9 ldr r1, [r7, #8]
8012760: 6b38 ldr r0, [r7, #48] @ 0x30
8012762: f000 fcab bl 80130bc <prvCopyDataToQueue>
8012766: 62f8 str r0, [r7, #44] @ 0x2c
/* If there was a task waiting for data to arrive on the
queue then unblock it now. */
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
8012768: 6b3b ldr r3, [r7, #48] @ 0x30
801276a: 6a5b ldr r3, [r3, #36] @ 0x24
801276c: 2b00 cmp r3, #0
801276e: d010 beq.n 8012792 <xQueueGenericSend+0x112>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
8012770: 6b3b ldr r3, [r7, #48] @ 0x30
8012772: 3324 adds r3, #36 @ 0x24
8012774: 4618 mov r0, r3
8012776: f001 fe83 bl 8014480 <xTaskRemoveFromEventList>
801277a: 4603 mov r3, r0
801277c: 2b00 cmp r3, #0
801277e: d013 beq.n 80127a8 <xQueueGenericSend+0x128>
{
/* The unblocked task has a priority higher than
our own so yield immediately. Yes it is ok to do
this from within the critical section - the kernel
takes care of that. */
queueYIELD_IF_USING_PREEMPTION();
8012780: 4b3f ldr r3, [pc, #252] @ (8012880 <xQueueGenericSend+0x200>)
8012782: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8012786: 601a str r2, [r3, #0]
8012788: f3bf 8f4f dsb sy
801278c: f3bf 8f6f isb sy
8012790: e00a b.n 80127a8 <xQueueGenericSend+0x128>
else
{
mtCOVERAGE_TEST_MARKER();
}
}
else if( xYieldRequired != pdFALSE )
8012792: 6afb ldr r3, [r7, #44] @ 0x2c
8012794: 2b00 cmp r3, #0
8012796: d007 beq.n 80127a8 <xQueueGenericSend+0x128>
{
/* This path is a special case that will only get
executed if the task was holding multiple mutexes and
the mutexes were given back in an order that is
different to that in which they were taken. */
queueYIELD_IF_USING_PREEMPTION();
8012798: 4b39 ldr r3, [pc, #228] @ (8012880 <xQueueGenericSend+0x200>)
801279a: f04f 5280 mov.w r2, #268435456 @ 0x10000000
801279e: 601a str r2, [r3, #0]
80127a0: f3bf 8f4f dsb sy
80127a4: f3bf 8f6f isb sy
mtCOVERAGE_TEST_MARKER();
}
}
#endif /* configUSE_QUEUE_SETS */
taskEXIT_CRITICAL();
80127a8: f003 fa20 bl 8015bec <vPortExitCritical>
return pdPASS;
80127ac: 2301 movs r3, #1
80127ae: e063 b.n 8012878 <xQueueGenericSend+0x1f8>
}
else
{
if( xTicksToWait == ( TickType_t ) 0 )
80127b0: 687b ldr r3, [r7, #4]
80127b2: 2b00 cmp r3, #0
80127b4: d103 bne.n 80127be <xQueueGenericSend+0x13e>
{
/* The queue was full and no block time is specified (or
the block time has expired) so leave now. */
taskEXIT_CRITICAL();
80127b6: f003 fa19 bl 8015bec <vPortExitCritical>
/* Return to the original privilege level before exiting
the function. */
traceQUEUE_SEND_FAILED( pxQueue );
return errQUEUE_FULL;
80127ba: 2300 movs r3, #0
80127bc: e05c b.n 8012878 <xQueueGenericSend+0x1f8>
}
else if( xEntryTimeSet == pdFALSE )
80127be: 6b7b ldr r3, [r7, #52] @ 0x34
80127c0: 2b00 cmp r3, #0
80127c2: d106 bne.n 80127d2 <xQueueGenericSend+0x152>
{
/* The queue was full and a block time was specified so
configure the timeout structure. */
vTaskInternalSetTimeOutState( &xTimeOut );
80127c4: f107 0314 add.w r3, r7, #20
80127c8: 4618 mov r0, r3
80127ca: f001 fee5 bl 8014598 <vTaskInternalSetTimeOutState>
xEntryTimeSet = pdTRUE;
80127ce: 2301 movs r3, #1
80127d0: 637b str r3, [r7, #52] @ 0x34
/* Entry time was already set. */
mtCOVERAGE_TEST_MARKER();
}
}
}
taskEXIT_CRITICAL();
80127d2: f003 fa0b bl 8015bec <vPortExitCritical>
/* Interrupts and other tasks can send to and receive from the queue
now the critical section has been exited. */
vTaskSuspendAll();
80127d6: f001 fc05 bl 8013fe4 <vTaskSuspendAll>
prvLockQueue( pxQueue );
80127da: f003 f9d5 bl 8015b88 <vPortEnterCritical>
80127de: 6b3b ldr r3, [r7, #48] @ 0x30
80127e0: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
80127e4: b25b sxtb r3, r3
80127e6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80127ea: d103 bne.n 80127f4 <xQueueGenericSend+0x174>
80127ec: 6b3b ldr r3, [r7, #48] @ 0x30
80127ee: 2200 movs r2, #0
80127f0: f883 2044 strb.w r2, [r3, #68] @ 0x44
80127f4: 6b3b ldr r3, [r7, #48] @ 0x30
80127f6: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
80127fa: b25b sxtb r3, r3
80127fc: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8012800: d103 bne.n 801280a <xQueueGenericSend+0x18a>
8012802: 6b3b ldr r3, [r7, #48] @ 0x30
8012804: 2200 movs r2, #0
8012806: f883 2045 strb.w r2, [r3, #69] @ 0x45
801280a: f003 f9ef bl 8015bec <vPortExitCritical>
/* Update the timeout state to see if it has expired yet. */
if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
801280e: 1d3a adds r2, r7, #4
8012810: f107 0314 add.w r3, r7, #20
8012814: 4611 mov r1, r2
8012816: 4618 mov r0, r3
8012818: f001 fed4 bl 80145c4 <xTaskCheckForTimeOut>
801281c: 4603 mov r3, r0
801281e: 2b00 cmp r3, #0
8012820: d124 bne.n 801286c <xQueueGenericSend+0x1ec>
{
if( prvIsQueueFull( pxQueue ) != pdFALSE )
8012822: 6b38 ldr r0, [r7, #48] @ 0x30
8012824: f000 fd42 bl 80132ac <prvIsQueueFull>
8012828: 4603 mov r3, r0
801282a: 2b00 cmp r3, #0
801282c: d018 beq.n 8012860 <xQueueGenericSend+0x1e0>
{
traceBLOCKING_ON_QUEUE_SEND( pxQueue );
vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
801282e: 6b3b ldr r3, [r7, #48] @ 0x30
8012830: 3310 adds r3, #16
8012832: 687a ldr r2, [r7, #4]
8012834: 4611 mov r1, r2
8012836: 4618 mov r0, r3
8012838: f001 fdd0 bl 80143dc <vTaskPlaceOnEventList>
/* Unlocking the queue means queue events can effect the
event list. It is possible that interrupts occurring now
remove this task from the event list again - but as the
scheduler is suspended the task will go onto the pending
ready last instead of the actual ready list. */
prvUnlockQueue( pxQueue );
801283c: 6b38 ldr r0, [r7, #48] @ 0x30
801283e: f000 fccd bl 80131dc <prvUnlockQueue>
/* Resuming the scheduler will move tasks from the pending
ready list into the ready list - so it is feasible that this
task is already in a ready list before it yields - in which
case the yield will not cause a context switch unless there
is also a higher priority task in the pending ready list. */
if( xTaskResumeAll() == pdFALSE )
8012842: f001 fbdd bl 8014000 <xTaskResumeAll>
8012846: 4603 mov r3, r0
8012848: 2b00 cmp r3, #0
801284a: f47f af7c bne.w 8012746 <xQueueGenericSend+0xc6>
{
portYIELD_WITHIN_API();
801284e: 4b0c ldr r3, [pc, #48] @ (8012880 <xQueueGenericSend+0x200>)
8012850: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8012854: 601a str r2, [r3, #0]
8012856: f3bf 8f4f dsb sy
801285a: f3bf 8f6f isb sy
801285e: e772 b.n 8012746 <xQueueGenericSend+0xc6>
}
}
else
{
/* Try again. */
prvUnlockQueue( pxQueue );
8012860: 6b38 ldr r0, [r7, #48] @ 0x30
8012862: f000 fcbb bl 80131dc <prvUnlockQueue>
( void ) xTaskResumeAll();
8012866: f001 fbcb bl 8014000 <xTaskResumeAll>
801286a: e76c b.n 8012746 <xQueueGenericSend+0xc6>
}
}
else
{
/* The timeout has expired. */
prvUnlockQueue( pxQueue );
801286c: 6b38 ldr r0, [r7, #48] @ 0x30
801286e: f000 fcb5 bl 80131dc <prvUnlockQueue>
( void ) xTaskResumeAll();
8012872: f001 fbc5 bl 8014000 <xTaskResumeAll>
traceQUEUE_SEND_FAILED( pxQueue );
return errQUEUE_FULL;
8012876: 2300 movs r3, #0
}
} /*lint -restore */
}
8012878: 4618 mov r0, r3
801287a: 3738 adds r7, #56 @ 0x38
801287c: 46bd mov sp, r7
801287e: bd80 pop {r7, pc}
8012880: e000ed04 .word 0xe000ed04
08012884 <xQueueGenericSendFromISR>:
/*-----------------------------------------------------------*/
BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
{
8012884: b580 push {r7, lr}
8012886: b090 sub sp, #64 @ 0x40
8012888: af00 add r7, sp, #0
801288a: 60f8 str r0, [r7, #12]
801288c: 60b9 str r1, [r7, #8]
801288e: 607a str r2, [r7, #4]
8012890: 603b str r3, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
8012892: 68fb ldr r3, [r7, #12]
8012894: 63bb str r3, [r7, #56] @ 0x38
configASSERT( pxQueue );
8012896: 6bbb ldr r3, [r7, #56] @ 0x38
8012898: 2b00 cmp r3, #0
801289a: d10b bne.n 80128b4 <xQueueGenericSendFromISR+0x30>
__asm volatile
801289c: f04f 0350 mov.w r3, #80 @ 0x50
80128a0: f383 8811 msr BASEPRI, r3
80128a4: f3bf 8f6f isb sy
80128a8: f3bf 8f4f dsb sy
80128ac: 62bb str r3, [r7, #40] @ 0x28
}
80128ae: bf00 nop
80128b0: bf00 nop
80128b2: e7fd b.n 80128b0 <xQueueGenericSendFromISR+0x2c>
configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
80128b4: 68bb ldr r3, [r7, #8]
80128b6: 2b00 cmp r3, #0
80128b8: d103 bne.n 80128c2 <xQueueGenericSendFromISR+0x3e>
80128ba: 6bbb ldr r3, [r7, #56] @ 0x38
80128bc: 6c1b ldr r3, [r3, #64] @ 0x40
80128be: 2b00 cmp r3, #0
80128c0: d101 bne.n 80128c6 <xQueueGenericSendFromISR+0x42>
80128c2: 2301 movs r3, #1
80128c4: e000 b.n 80128c8 <xQueueGenericSendFromISR+0x44>
80128c6: 2300 movs r3, #0
80128c8: 2b00 cmp r3, #0
80128ca: d10b bne.n 80128e4 <xQueueGenericSendFromISR+0x60>
__asm volatile
80128cc: f04f 0350 mov.w r3, #80 @ 0x50
80128d0: f383 8811 msr BASEPRI, r3
80128d4: f3bf 8f6f isb sy
80128d8: f3bf 8f4f dsb sy
80128dc: 627b str r3, [r7, #36] @ 0x24
}
80128de: bf00 nop
80128e0: bf00 nop
80128e2: e7fd b.n 80128e0 <xQueueGenericSendFromISR+0x5c>
configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
80128e4: 683b ldr r3, [r7, #0]
80128e6: 2b02 cmp r3, #2
80128e8: d103 bne.n 80128f2 <xQueueGenericSendFromISR+0x6e>
80128ea: 6bbb ldr r3, [r7, #56] @ 0x38
80128ec: 6bdb ldr r3, [r3, #60] @ 0x3c
80128ee: 2b01 cmp r3, #1
80128f0: d101 bne.n 80128f6 <xQueueGenericSendFromISR+0x72>
80128f2: 2301 movs r3, #1
80128f4: e000 b.n 80128f8 <xQueueGenericSendFromISR+0x74>
80128f6: 2300 movs r3, #0
80128f8: 2b00 cmp r3, #0
80128fa: d10b bne.n 8012914 <xQueueGenericSendFromISR+0x90>
__asm volatile
80128fc: f04f 0350 mov.w r3, #80 @ 0x50
8012900: f383 8811 msr BASEPRI, r3
8012904: f3bf 8f6f isb sy
8012908: f3bf 8f4f dsb sy
801290c: 623b str r3, [r7, #32]
}
801290e: bf00 nop
8012910: bf00 nop
8012912: e7fd b.n 8012910 <xQueueGenericSendFromISR+0x8c>
that have been assigned a priority at or (logically) below the maximum
system call interrupt priority. FreeRTOS maintains a separate interrupt
safe API to ensure interrupt entry is as fast and as simple as possible.
More information (albeit Cortex-M specific) is provided on the following
link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
8012914: f003 fa18 bl 8015d48 <vPortValidateInterruptPriority>
portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
{
uint32_t ulOriginalBASEPRI, ulNewBASEPRI;
__asm volatile
8012918: f3ef 8211 mrs r2, BASEPRI
801291c: f04f 0350 mov.w r3, #80 @ 0x50
8012920: f383 8811 msr BASEPRI, r3
8012924: f3bf 8f6f isb sy
8012928: f3bf 8f4f dsb sy
801292c: 61fa str r2, [r7, #28]
801292e: 61bb str r3, [r7, #24]
:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
);
/* This return will not be reached but is necessary to prevent compiler
warnings. */
return ulOriginalBASEPRI;
8012930: 69fb ldr r3, [r7, #28]
/* Similar to xQueueGenericSend, except without blocking if there is no room
in the queue. Also don't directly wake a task that was blocked on a queue
read, instead return a flag to say whether a context switch is required or
not (i.e. has a task with a higher priority than us been woken by this
post). */
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
8012932: 637b str r3, [r7, #52] @ 0x34
{
if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
8012934: 6bbb ldr r3, [r7, #56] @ 0x38
8012936: 6b9a ldr r2, [r3, #56] @ 0x38
8012938: 6bbb ldr r3, [r7, #56] @ 0x38
801293a: 6bdb ldr r3, [r3, #60] @ 0x3c
801293c: 429a cmp r2, r3
801293e: d302 bcc.n 8012946 <xQueueGenericSendFromISR+0xc2>
8012940: 683b ldr r3, [r7, #0]
8012942: 2b02 cmp r3, #2
8012944: d12f bne.n 80129a6 <xQueueGenericSendFromISR+0x122>
{
const int8_t cTxLock = pxQueue->cTxLock;
8012946: 6bbb ldr r3, [r7, #56] @ 0x38
8012948: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
801294c: f887 3033 strb.w r3, [r7, #51] @ 0x33
const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
8012950: 6bbb ldr r3, [r7, #56] @ 0x38
8012952: 6b9b ldr r3, [r3, #56] @ 0x38
8012954: 62fb str r3, [r7, #44] @ 0x2c
/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
semaphore or mutex. That means prvCopyDataToQueue() cannot result
in a task disinheriting a priority and prvCopyDataToQueue() can be
called here even though the disinherit function does not check if
the scheduler is suspended before accessing the ready lists. */
( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
8012956: 683a ldr r2, [r7, #0]
8012958: 68b9 ldr r1, [r7, #8]
801295a: 6bb8 ldr r0, [r7, #56] @ 0x38
801295c: f000 fbae bl 80130bc <prvCopyDataToQueue>
/* The event list is not altered if the queue is locked. This will
be done when the queue is unlocked later. */
if( cTxLock == queueUNLOCKED )
8012960: f997 3033 ldrsb.w r3, [r7, #51] @ 0x33
8012964: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8012968: d112 bne.n 8012990 <xQueueGenericSendFromISR+0x10c>
}
}
}
#else /* configUSE_QUEUE_SETS */
{
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
801296a: 6bbb ldr r3, [r7, #56] @ 0x38
801296c: 6a5b ldr r3, [r3, #36] @ 0x24
801296e: 2b00 cmp r3, #0
8012970: d016 beq.n 80129a0 <xQueueGenericSendFromISR+0x11c>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
8012972: 6bbb ldr r3, [r7, #56] @ 0x38
8012974: 3324 adds r3, #36 @ 0x24
8012976: 4618 mov r0, r3
8012978: f001 fd82 bl 8014480 <xTaskRemoveFromEventList>
801297c: 4603 mov r3, r0
801297e: 2b00 cmp r3, #0
8012980: d00e beq.n 80129a0 <xQueueGenericSendFromISR+0x11c>
{
/* The task waiting has a higher priority so record that a
context switch is required. */
if( pxHigherPriorityTaskWoken != NULL )
8012982: 687b ldr r3, [r7, #4]
8012984: 2b00 cmp r3, #0
8012986: d00b beq.n 80129a0 <xQueueGenericSendFromISR+0x11c>
{
*pxHigherPriorityTaskWoken = pdTRUE;
8012988: 687b ldr r3, [r7, #4]
801298a: 2201 movs r2, #1
801298c: 601a str r2, [r3, #0]
801298e: e007 b.n 80129a0 <xQueueGenericSendFromISR+0x11c>
}
else
{
/* Increment the lock count so the task that unlocks the queue
knows that data was posted while it was locked. */
pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
8012990: f897 3033 ldrb.w r3, [r7, #51] @ 0x33
8012994: 3301 adds r3, #1
8012996: b2db uxtb r3, r3
8012998: b25a sxtb r2, r3
801299a: 6bbb ldr r3, [r7, #56] @ 0x38
801299c: f883 2045 strb.w r2, [r3, #69] @ 0x45
}
xReturn = pdPASS;
80129a0: 2301 movs r3, #1
80129a2: 63fb str r3, [r7, #60] @ 0x3c
{
80129a4: e001 b.n 80129aa <xQueueGenericSendFromISR+0x126>
}
else
{
traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
xReturn = errQUEUE_FULL;
80129a6: 2300 movs r3, #0
80129a8: 63fb str r3, [r7, #60] @ 0x3c
80129aa: 6b7b ldr r3, [r7, #52] @ 0x34
80129ac: 617b str r3, [r7, #20]
}
/*-----------------------------------------------------------*/
portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
{
__asm volatile
80129ae: 697b ldr r3, [r7, #20]
80129b0: f383 8811 msr BASEPRI, r3
(
" msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory"
);
}
80129b4: bf00 nop
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn;
80129b6: 6bfb ldr r3, [r7, #60] @ 0x3c
}
80129b8: 4618 mov r0, r3
80129ba: 3740 adds r7, #64 @ 0x40
80129bc: 46bd mov sp, r7
80129be: bd80 pop {r7, pc}
080129c0 <xQueueGiveFromISR>:
/*-----------------------------------------------------------*/
BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
{
80129c0: b580 push {r7, lr}
80129c2: b08e sub sp, #56 @ 0x38
80129c4: af00 add r7, sp, #0
80129c6: 6078 str r0, [r7, #4]
80129c8: 6039 str r1, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
80129ca: 687b ldr r3, [r7, #4]
80129cc: 633b str r3, [r7, #48] @ 0x30
item size is 0. Don't directly wake a task that was blocked on a queue
read, instead return a flag to say whether a context switch is required or
not (i.e. has a task with a higher priority than us been woken by this
post). */
configASSERT( pxQueue );
80129ce: 6b3b ldr r3, [r7, #48] @ 0x30
80129d0: 2b00 cmp r3, #0
80129d2: d10b bne.n 80129ec <xQueueGiveFromISR+0x2c>
__asm volatile
80129d4: f04f 0350 mov.w r3, #80 @ 0x50
80129d8: f383 8811 msr BASEPRI, r3
80129dc: f3bf 8f6f isb sy
80129e0: f3bf 8f4f dsb sy
80129e4: 623b str r3, [r7, #32]
}
80129e6: bf00 nop
80129e8: bf00 nop
80129ea: e7fd b.n 80129e8 <xQueueGiveFromISR+0x28>
/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
if the item size is not 0. */
configASSERT( pxQueue->uxItemSize == 0 );
80129ec: 6b3b ldr r3, [r7, #48] @ 0x30
80129ee: 6c1b ldr r3, [r3, #64] @ 0x40
80129f0: 2b00 cmp r3, #0
80129f2: d00b beq.n 8012a0c <xQueueGiveFromISR+0x4c>
__asm volatile
80129f4: f04f 0350 mov.w r3, #80 @ 0x50
80129f8: f383 8811 msr BASEPRI, r3
80129fc: f3bf 8f6f isb sy
8012a00: f3bf 8f4f dsb sy
8012a04: 61fb str r3, [r7, #28]
}
8012a06: bf00 nop
8012a08: bf00 nop
8012a0a: e7fd b.n 8012a08 <xQueueGiveFromISR+0x48>
/* Normally a mutex would not be given from an interrupt, especially if
there is a mutex holder, as priority inheritance makes no sense for an
interrupts, only tasks. */
configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
8012a0c: 6b3b ldr r3, [r7, #48] @ 0x30
8012a0e: 681b ldr r3, [r3, #0]
8012a10: 2b00 cmp r3, #0
8012a12: d103 bne.n 8012a1c <xQueueGiveFromISR+0x5c>
8012a14: 6b3b ldr r3, [r7, #48] @ 0x30
8012a16: 689b ldr r3, [r3, #8]
8012a18: 2b00 cmp r3, #0
8012a1a: d101 bne.n 8012a20 <xQueueGiveFromISR+0x60>
8012a1c: 2301 movs r3, #1
8012a1e: e000 b.n 8012a22 <xQueueGiveFromISR+0x62>
8012a20: 2300 movs r3, #0
8012a22: 2b00 cmp r3, #0
8012a24: d10b bne.n 8012a3e <xQueueGiveFromISR+0x7e>
__asm volatile
8012a26: f04f 0350 mov.w r3, #80 @ 0x50
8012a2a: f383 8811 msr BASEPRI, r3
8012a2e: f3bf 8f6f isb sy
8012a32: f3bf 8f4f dsb sy
8012a36: 61bb str r3, [r7, #24]
}
8012a38: bf00 nop
8012a3a: bf00 nop
8012a3c: e7fd b.n 8012a3a <xQueueGiveFromISR+0x7a>
that have been assigned a priority at or (logically) below the maximum
system call interrupt priority. FreeRTOS maintains a separate interrupt
safe API to ensure interrupt entry is as fast and as simple as possible.
More information (albeit Cortex-M specific) is provided on the following
link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
8012a3e: f003 f983 bl 8015d48 <vPortValidateInterruptPriority>
__asm volatile
8012a42: f3ef 8211 mrs r2, BASEPRI
8012a46: f04f 0350 mov.w r3, #80 @ 0x50
8012a4a: f383 8811 msr BASEPRI, r3
8012a4e: f3bf 8f6f isb sy
8012a52: f3bf 8f4f dsb sy
8012a56: 617a str r2, [r7, #20]
8012a58: 613b str r3, [r7, #16]
return ulOriginalBASEPRI;
8012a5a: 697b ldr r3, [r7, #20]
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
8012a5c: 62fb str r3, [r7, #44] @ 0x2c
{
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
8012a5e: 6b3b ldr r3, [r7, #48] @ 0x30
8012a60: 6b9b ldr r3, [r3, #56] @ 0x38
8012a62: 62bb str r3, [r7, #40] @ 0x28
/* When the queue is used to implement a semaphore no data is ever
moved through the queue but it is still valid to see if the queue 'has
space'. */
if( uxMessagesWaiting < pxQueue->uxLength )
8012a64: 6b3b ldr r3, [r7, #48] @ 0x30
8012a66: 6bdb ldr r3, [r3, #60] @ 0x3c
8012a68: 6aba ldr r2, [r7, #40] @ 0x28
8012a6a: 429a cmp r2, r3
8012a6c: d22b bcs.n 8012ac6 <xQueueGiveFromISR+0x106>
{
const int8_t cTxLock = pxQueue->cTxLock;
8012a6e: 6b3b ldr r3, [r7, #48] @ 0x30
8012a70: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
8012a74: f887 3027 strb.w r3, [r7, #39] @ 0x27
holder - and if there is a mutex holder then the mutex cannot be
given from an ISR. As this is the ISR version of the function it
can be assumed there is no mutex holder and no need to determine if
priority disinheritance is needed. Simply increase the count of
messages (semaphores) available. */
pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
8012a78: 6abb ldr r3, [r7, #40] @ 0x28
8012a7a: 1c5a adds r2, r3, #1
8012a7c: 6b3b ldr r3, [r7, #48] @ 0x30
8012a7e: 639a str r2, [r3, #56] @ 0x38
/* The event list is not altered if the queue is locked. This will
be done when the queue is unlocked later. */
if( cTxLock == queueUNLOCKED )
8012a80: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
8012a84: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8012a88: d112 bne.n 8012ab0 <xQueueGiveFromISR+0xf0>
}
}
}
#else /* configUSE_QUEUE_SETS */
{
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
8012a8a: 6b3b ldr r3, [r7, #48] @ 0x30
8012a8c: 6a5b ldr r3, [r3, #36] @ 0x24
8012a8e: 2b00 cmp r3, #0
8012a90: d016 beq.n 8012ac0 <xQueueGiveFromISR+0x100>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
8012a92: 6b3b ldr r3, [r7, #48] @ 0x30
8012a94: 3324 adds r3, #36 @ 0x24
8012a96: 4618 mov r0, r3
8012a98: f001 fcf2 bl 8014480 <xTaskRemoveFromEventList>
8012a9c: 4603 mov r3, r0
8012a9e: 2b00 cmp r3, #0
8012aa0: d00e beq.n 8012ac0 <xQueueGiveFromISR+0x100>
{
/* The task waiting has a higher priority so record that a
context switch is required. */
if( pxHigherPriorityTaskWoken != NULL )
8012aa2: 683b ldr r3, [r7, #0]
8012aa4: 2b00 cmp r3, #0
8012aa6: d00b beq.n 8012ac0 <xQueueGiveFromISR+0x100>
{
*pxHigherPriorityTaskWoken = pdTRUE;
8012aa8: 683b ldr r3, [r7, #0]
8012aaa: 2201 movs r2, #1
8012aac: 601a str r2, [r3, #0]
8012aae: e007 b.n 8012ac0 <xQueueGiveFromISR+0x100>
}
else
{
/* Increment the lock count so the task that unlocks the queue
knows that data was posted while it was locked. */
pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
8012ab0: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
8012ab4: 3301 adds r3, #1
8012ab6: b2db uxtb r3, r3
8012ab8: b25a sxtb r2, r3
8012aba: 6b3b ldr r3, [r7, #48] @ 0x30
8012abc: f883 2045 strb.w r2, [r3, #69] @ 0x45
}
xReturn = pdPASS;
8012ac0: 2301 movs r3, #1
8012ac2: 637b str r3, [r7, #52] @ 0x34
8012ac4: e001 b.n 8012aca <xQueueGiveFromISR+0x10a>
}
else
{
traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
xReturn = errQUEUE_FULL;
8012ac6: 2300 movs r3, #0
8012ac8: 637b str r3, [r7, #52] @ 0x34
8012aca: 6afb ldr r3, [r7, #44] @ 0x2c
8012acc: 60fb str r3, [r7, #12]
__asm volatile
8012ace: 68fb ldr r3, [r7, #12]
8012ad0: f383 8811 msr BASEPRI, r3
}
8012ad4: bf00 nop
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn;
8012ad6: 6b7b ldr r3, [r7, #52] @ 0x34
}
8012ad8: 4618 mov r0, r3
8012ada: 3738 adds r7, #56 @ 0x38
8012adc: 46bd mov sp, r7
8012ade: bd80 pop {r7, pc}
08012ae0 <xQueueReceive>:
/*-----------------------------------------------------------*/
BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
{
8012ae0: b580 push {r7, lr}
8012ae2: b08c sub sp, #48 @ 0x30
8012ae4: af00 add r7, sp, #0
8012ae6: 60f8 str r0, [r7, #12]
8012ae8: 60b9 str r1, [r7, #8]
8012aea: 607a str r2, [r7, #4]
BaseType_t xEntryTimeSet = pdFALSE;
8012aec: 2300 movs r3, #0
8012aee: 62fb str r3, [r7, #44] @ 0x2c
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
8012af0: 68fb ldr r3, [r7, #12]
8012af2: 62bb str r3, [r7, #40] @ 0x28
/* Check the pointer is not NULL. */
configASSERT( ( pxQueue ) );
8012af4: 6abb ldr r3, [r7, #40] @ 0x28
8012af6: 2b00 cmp r3, #0
8012af8: d10b bne.n 8012b12 <xQueueReceive+0x32>
__asm volatile
8012afa: f04f 0350 mov.w r3, #80 @ 0x50
8012afe: f383 8811 msr BASEPRI, r3
8012b02: f3bf 8f6f isb sy
8012b06: f3bf 8f4f dsb sy
8012b0a: 623b str r3, [r7, #32]
}
8012b0c: bf00 nop
8012b0e: bf00 nop
8012b10: e7fd b.n 8012b0e <xQueueReceive+0x2e>
/* The buffer into which data is received can only be NULL if the data size
is zero (so no data is copied into the buffer. */
configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
8012b12: 68bb ldr r3, [r7, #8]
8012b14: 2b00 cmp r3, #0
8012b16: d103 bne.n 8012b20 <xQueueReceive+0x40>
8012b18: 6abb ldr r3, [r7, #40] @ 0x28
8012b1a: 6c1b ldr r3, [r3, #64] @ 0x40
8012b1c: 2b00 cmp r3, #0
8012b1e: d101 bne.n 8012b24 <xQueueReceive+0x44>
8012b20: 2301 movs r3, #1
8012b22: e000 b.n 8012b26 <xQueueReceive+0x46>
8012b24: 2300 movs r3, #0
8012b26: 2b00 cmp r3, #0
8012b28: d10b bne.n 8012b42 <xQueueReceive+0x62>
__asm volatile
8012b2a: f04f 0350 mov.w r3, #80 @ 0x50
8012b2e: f383 8811 msr BASEPRI, r3
8012b32: f3bf 8f6f isb sy
8012b36: f3bf 8f4f dsb sy
8012b3a: 61fb str r3, [r7, #28]
}
8012b3c: bf00 nop
8012b3e: bf00 nop
8012b40: e7fd b.n 8012b3e <xQueueReceive+0x5e>
/* Cannot block if the scheduler is suspended. */
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
{
configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
8012b42: f001 fe9b bl 801487c <xTaskGetSchedulerState>
8012b46: 4603 mov r3, r0
8012b48: 2b00 cmp r3, #0
8012b4a: d102 bne.n 8012b52 <xQueueReceive+0x72>
8012b4c: 687b ldr r3, [r7, #4]
8012b4e: 2b00 cmp r3, #0
8012b50: d101 bne.n 8012b56 <xQueueReceive+0x76>
8012b52: 2301 movs r3, #1
8012b54: e000 b.n 8012b58 <xQueueReceive+0x78>
8012b56: 2300 movs r3, #0
8012b58: 2b00 cmp r3, #0
8012b5a: d10b bne.n 8012b74 <xQueueReceive+0x94>
__asm volatile
8012b5c: f04f 0350 mov.w r3, #80 @ 0x50
8012b60: f383 8811 msr BASEPRI, r3
8012b64: f3bf 8f6f isb sy
8012b68: f3bf 8f4f dsb sy
8012b6c: 61bb str r3, [r7, #24]
}
8012b6e: bf00 nop
8012b70: bf00 nop
8012b72: e7fd b.n 8012b70 <xQueueReceive+0x90>
/*lint -save -e904 This function relaxes the coding standard somewhat to
allow return statements within the function itself. This is done in the
interest of execution time efficiency. */
for( ;; )
{
taskENTER_CRITICAL();
8012b74: f003 f808 bl 8015b88 <vPortEnterCritical>
{
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
8012b78: 6abb ldr r3, [r7, #40] @ 0x28
8012b7a: 6b9b ldr r3, [r3, #56] @ 0x38
8012b7c: 627b str r3, [r7, #36] @ 0x24
/* Is there data in the queue now? To be running the calling task
must be the highest priority task wanting to access the queue. */
if( uxMessagesWaiting > ( UBaseType_t ) 0 )
8012b7e: 6a7b ldr r3, [r7, #36] @ 0x24
8012b80: 2b00 cmp r3, #0
8012b82: d01f beq.n 8012bc4 <xQueueReceive+0xe4>
{
/* Data available, remove one item. */
prvCopyDataFromQueue( pxQueue, pvBuffer );
8012b84: 68b9 ldr r1, [r7, #8]
8012b86: 6ab8 ldr r0, [r7, #40] @ 0x28
8012b88: f000 fb02 bl 8013190 <prvCopyDataFromQueue>
traceQUEUE_RECEIVE( pxQueue );
pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
8012b8c: 6a7b ldr r3, [r7, #36] @ 0x24
8012b8e: 1e5a subs r2, r3, #1
8012b90: 6abb ldr r3, [r7, #40] @ 0x28
8012b92: 639a str r2, [r3, #56] @ 0x38
/* There is now space in the queue, were any tasks waiting to
post to the queue? If so, unblock the highest priority waiting
task. */
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
8012b94: 6abb ldr r3, [r7, #40] @ 0x28
8012b96: 691b ldr r3, [r3, #16]
8012b98: 2b00 cmp r3, #0
8012b9a: d00f beq.n 8012bbc <xQueueReceive+0xdc>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
8012b9c: 6abb ldr r3, [r7, #40] @ 0x28
8012b9e: 3310 adds r3, #16
8012ba0: 4618 mov r0, r3
8012ba2: f001 fc6d bl 8014480 <xTaskRemoveFromEventList>
8012ba6: 4603 mov r3, r0
8012ba8: 2b00 cmp r3, #0
8012baa: d007 beq.n 8012bbc <xQueueReceive+0xdc>
{
queueYIELD_IF_USING_PREEMPTION();
8012bac: 4b3c ldr r3, [pc, #240] @ (8012ca0 <xQueueReceive+0x1c0>)
8012bae: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8012bb2: 601a str r2, [r3, #0]
8012bb4: f3bf 8f4f dsb sy
8012bb8: f3bf 8f6f isb sy
else
{
mtCOVERAGE_TEST_MARKER();
}
taskEXIT_CRITICAL();
8012bbc: f003 f816 bl 8015bec <vPortExitCritical>
return pdPASS;
8012bc0: 2301 movs r3, #1
8012bc2: e069 b.n 8012c98 <xQueueReceive+0x1b8>
}
else
{
if( xTicksToWait == ( TickType_t ) 0 )
8012bc4: 687b ldr r3, [r7, #4]
8012bc6: 2b00 cmp r3, #0
8012bc8: d103 bne.n 8012bd2 <xQueueReceive+0xf2>
{
/* The queue was empty and no block time is specified (or
the block time has expired) so leave now. */
taskEXIT_CRITICAL();
8012bca: f003 f80f bl 8015bec <vPortExitCritical>
traceQUEUE_RECEIVE_FAILED( pxQueue );
return errQUEUE_EMPTY;
8012bce: 2300 movs r3, #0
8012bd0: e062 b.n 8012c98 <xQueueReceive+0x1b8>
}
else if( xEntryTimeSet == pdFALSE )
8012bd2: 6afb ldr r3, [r7, #44] @ 0x2c
8012bd4: 2b00 cmp r3, #0
8012bd6: d106 bne.n 8012be6 <xQueueReceive+0x106>
{
/* The queue was empty and a block time was specified so
configure the timeout structure. */
vTaskInternalSetTimeOutState( &xTimeOut );
8012bd8: f107 0310 add.w r3, r7, #16
8012bdc: 4618 mov r0, r3
8012bde: f001 fcdb bl 8014598 <vTaskInternalSetTimeOutState>
xEntryTimeSet = pdTRUE;
8012be2: 2301 movs r3, #1
8012be4: 62fb str r3, [r7, #44] @ 0x2c
/* Entry time was already set. */
mtCOVERAGE_TEST_MARKER();
}
}
}
taskEXIT_CRITICAL();
8012be6: f003 f801 bl 8015bec <vPortExitCritical>
/* Interrupts and other tasks can send to and receive from the queue
now the critical section has been exited. */
vTaskSuspendAll();
8012bea: f001 f9fb bl 8013fe4 <vTaskSuspendAll>
prvLockQueue( pxQueue );
8012bee: f002 ffcb bl 8015b88 <vPortEnterCritical>
8012bf2: 6abb ldr r3, [r7, #40] @ 0x28
8012bf4: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
8012bf8: b25b sxtb r3, r3
8012bfa: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8012bfe: d103 bne.n 8012c08 <xQueueReceive+0x128>
8012c00: 6abb ldr r3, [r7, #40] @ 0x28
8012c02: 2200 movs r2, #0
8012c04: f883 2044 strb.w r2, [r3, #68] @ 0x44
8012c08: 6abb ldr r3, [r7, #40] @ 0x28
8012c0a: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
8012c0e: b25b sxtb r3, r3
8012c10: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8012c14: d103 bne.n 8012c1e <xQueueReceive+0x13e>
8012c16: 6abb ldr r3, [r7, #40] @ 0x28
8012c18: 2200 movs r2, #0
8012c1a: f883 2045 strb.w r2, [r3, #69] @ 0x45
8012c1e: f002 ffe5 bl 8015bec <vPortExitCritical>
/* Update the timeout state to see if it has expired yet. */
if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
8012c22: 1d3a adds r2, r7, #4
8012c24: f107 0310 add.w r3, r7, #16
8012c28: 4611 mov r1, r2
8012c2a: 4618 mov r0, r3
8012c2c: f001 fcca bl 80145c4 <xTaskCheckForTimeOut>
8012c30: 4603 mov r3, r0
8012c32: 2b00 cmp r3, #0
8012c34: d123 bne.n 8012c7e <xQueueReceive+0x19e>
{
/* The timeout has not expired. If the queue is still empty place
the task on the list of tasks waiting to receive from the queue. */
if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
8012c36: 6ab8 ldr r0, [r7, #40] @ 0x28
8012c38: f000 fb22 bl 8013280 <prvIsQueueEmpty>
8012c3c: 4603 mov r3, r0
8012c3e: 2b00 cmp r3, #0
8012c40: d017 beq.n 8012c72 <xQueueReceive+0x192>
{
traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
8012c42: 6abb ldr r3, [r7, #40] @ 0x28
8012c44: 3324 adds r3, #36 @ 0x24
8012c46: 687a ldr r2, [r7, #4]
8012c48: 4611 mov r1, r2
8012c4a: 4618 mov r0, r3
8012c4c: f001 fbc6 bl 80143dc <vTaskPlaceOnEventList>
prvUnlockQueue( pxQueue );
8012c50: 6ab8 ldr r0, [r7, #40] @ 0x28
8012c52: f000 fac3 bl 80131dc <prvUnlockQueue>
if( xTaskResumeAll() == pdFALSE )
8012c56: f001 f9d3 bl 8014000 <xTaskResumeAll>
8012c5a: 4603 mov r3, r0
8012c5c: 2b00 cmp r3, #0
8012c5e: d189 bne.n 8012b74 <xQueueReceive+0x94>
{
portYIELD_WITHIN_API();
8012c60: 4b0f ldr r3, [pc, #60] @ (8012ca0 <xQueueReceive+0x1c0>)
8012c62: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8012c66: 601a str r2, [r3, #0]
8012c68: f3bf 8f4f dsb sy
8012c6c: f3bf 8f6f isb sy
8012c70: e780 b.n 8012b74 <xQueueReceive+0x94>
}
else
{
/* The queue contains data again. Loop back to try and read the
data. */
prvUnlockQueue( pxQueue );
8012c72: 6ab8 ldr r0, [r7, #40] @ 0x28
8012c74: f000 fab2 bl 80131dc <prvUnlockQueue>
( void ) xTaskResumeAll();
8012c78: f001 f9c2 bl 8014000 <xTaskResumeAll>
8012c7c: e77a b.n 8012b74 <xQueueReceive+0x94>
}
else
{
/* Timed out. If there is no data in the queue exit, otherwise loop
back and attempt to read the data. */
prvUnlockQueue( pxQueue );
8012c7e: 6ab8 ldr r0, [r7, #40] @ 0x28
8012c80: f000 faac bl 80131dc <prvUnlockQueue>
( void ) xTaskResumeAll();
8012c84: f001 f9bc bl 8014000 <xTaskResumeAll>
if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
8012c88: 6ab8 ldr r0, [r7, #40] @ 0x28
8012c8a: f000 faf9 bl 8013280 <prvIsQueueEmpty>
8012c8e: 4603 mov r3, r0
8012c90: 2b00 cmp r3, #0
8012c92: f43f af6f beq.w 8012b74 <xQueueReceive+0x94>
{
traceQUEUE_RECEIVE_FAILED( pxQueue );
return errQUEUE_EMPTY;
8012c96: 2300 movs r3, #0
{
mtCOVERAGE_TEST_MARKER();
}
}
} /*lint -restore */
}
8012c98: 4618 mov r0, r3
8012c9a: 3730 adds r7, #48 @ 0x30
8012c9c: 46bd mov sp, r7
8012c9e: bd80 pop {r7, pc}
8012ca0: e000ed04 .word 0xe000ed04
08012ca4 <xQueueSemaphoreTake>:
/*-----------------------------------------------------------*/
BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
{
8012ca4: b580 push {r7, lr}
8012ca6: b08e sub sp, #56 @ 0x38
8012ca8: af00 add r7, sp, #0
8012caa: 6078 str r0, [r7, #4]
8012cac: 6039 str r1, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE;
8012cae: 2300 movs r3, #0
8012cb0: 637b str r3, [r7, #52] @ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
8012cb2: 687b ldr r3, [r7, #4]
8012cb4: 62fb str r3, [r7, #44] @ 0x2c
#if( configUSE_MUTEXES == 1 )
BaseType_t xInheritanceOccurred = pdFALSE;
8012cb6: 2300 movs r3, #0
8012cb8: 633b str r3, [r7, #48] @ 0x30
#endif
/* Check the queue pointer is not NULL. */
configASSERT( ( pxQueue ) );
8012cba: 6afb ldr r3, [r7, #44] @ 0x2c
8012cbc: 2b00 cmp r3, #0
8012cbe: d10b bne.n 8012cd8 <xQueueSemaphoreTake+0x34>
__asm volatile
8012cc0: f04f 0350 mov.w r3, #80 @ 0x50
8012cc4: f383 8811 msr BASEPRI, r3
8012cc8: f3bf 8f6f isb sy
8012ccc: f3bf 8f4f dsb sy
8012cd0: 623b str r3, [r7, #32]
}
8012cd2: bf00 nop
8012cd4: bf00 nop
8012cd6: e7fd b.n 8012cd4 <xQueueSemaphoreTake+0x30>
/* Check this really is a semaphore, in which case the item size will be
0. */
configASSERT( pxQueue->uxItemSize == 0 );
8012cd8: 6afb ldr r3, [r7, #44] @ 0x2c
8012cda: 6c1b ldr r3, [r3, #64] @ 0x40
8012cdc: 2b00 cmp r3, #0
8012cde: d00b beq.n 8012cf8 <xQueueSemaphoreTake+0x54>
__asm volatile
8012ce0: f04f 0350 mov.w r3, #80 @ 0x50
8012ce4: f383 8811 msr BASEPRI, r3
8012ce8: f3bf 8f6f isb sy
8012cec: f3bf 8f4f dsb sy
8012cf0: 61fb str r3, [r7, #28]
}
8012cf2: bf00 nop
8012cf4: bf00 nop
8012cf6: e7fd b.n 8012cf4 <xQueueSemaphoreTake+0x50>
/* Cannot block if the scheduler is suspended. */
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
{
configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
8012cf8: f001 fdc0 bl 801487c <xTaskGetSchedulerState>
8012cfc: 4603 mov r3, r0
8012cfe: 2b00 cmp r3, #0
8012d00: d102 bne.n 8012d08 <xQueueSemaphoreTake+0x64>
8012d02: 683b ldr r3, [r7, #0]
8012d04: 2b00 cmp r3, #0
8012d06: d101 bne.n 8012d0c <xQueueSemaphoreTake+0x68>
8012d08: 2301 movs r3, #1
8012d0a: e000 b.n 8012d0e <xQueueSemaphoreTake+0x6a>
8012d0c: 2300 movs r3, #0
8012d0e: 2b00 cmp r3, #0
8012d10: d10b bne.n 8012d2a <xQueueSemaphoreTake+0x86>
__asm volatile
8012d12: f04f 0350 mov.w r3, #80 @ 0x50
8012d16: f383 8811 msr BASEPRI, r3
8012d1a: f3bf 8f6f isb sy
8012d1e: f3bf 8f4f dsb sy
8012d22: 61bb str r3, [r7, #24]
}
8012d24: bf00 nop
8012d26: bf00 nop
8012d28: e7fd b.n 8012d26 <xQueueSemaphoreTake+0x82>
/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
statements within the function itself. This is done in the interest
of execution time efficiency. */
for( ;; )
{
taskENTER_CRITICAL();
8012d2a: f002 ff2d bl 8015b88 <vPortEnterCritical>
{
/* Semaphores are queues with an item size of 0, and where the
number of messages in the queue is the semaphore's count value. */
const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
8012d2e: 6afb ldr r3, [r7, #44] @ 0x2c
8012d30: 6b9b ldr r3, [r3, #56] @ 0x38
8012d32: 62bb str r3, [r7, #40] @ 0x28
/* Is there data in the queue now? To be running the calling task
must be the highest priority task wanting to access the queue. */
if( uxSemaphoreCount > ( UBaseType_t ) 0 )
8012d34: 6abb ldr r3, [r7, #40] @ 0x28
8012d36: 2b00 cmp r3, #0
8012d38: d024 beq.n 8012d84 <xQueueSemaphoreTake+0xe0>
{
traceQUEUE_RECEIVE( pxQueue );
/* Semaphores are queues with a data size of zero and where the
messages waiting is the semaphore's count. Reduce the count. */
pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
8012d3a: 6abb ldr r3, [r7, #40] @ 0x28
8012d3c: 1e5a subs r2, r3, #1
8012d3e: 6afb ldr r3, [r7, #44] @ 0x2c
8012d40: 639a str r2, [r3, #56] @ 0x38
#if ( configUSE_MUTEXES == 1 )
{
if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
8012d42: 6afb ldr r3, [r7, #44] @ 0x2c
8012d44: 681b ldr r3, [r3, #0]
8012d46: 2b00 cmp r3, #0
8012d48: d104 bne.n 8012d54 <xQueueSemaphoreTake+0xb0>
{
/* Record the information required to implement
priority inheritance should it become necessary. */
pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
8012d4a: f001 ff11 bl 8014b70 <pvTaskIncrementMutexHeldCount>
8012d4e: 4602 mov r2, r0
8012d50: 6afb ldr r3, [r7, #44] @ 0x2c
8012d52: 609a str r2, [r3, #8]
}
#endif /* configUSE_MUTEXES */
/* Check to see if other tasks are blocked waiting to give the
semaphore, and if so, unblock the highest priority such task. */
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
8012d54: 6afb ldr r3, [r7, #44] @ 0x2c
8012d56: 691b ldr r3, [r3, #16]
8012d58: 2b00 cmp r3, #0
8012d5a: d00f beq.n 8012d7c <xQueueSemaphoreTake+0xd8>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
8012d5c: 6afb ldr r3, [r7, #44] @ 0x2c
8012d5e: 3310 adds r3, #16
8012d60: 4618 mov r0, r3
8012d62: f001 fb8d bl 8014480 <xTaskRemoveFromEventList>
8012d66: 4603 mov r3, r0
8012d68: 2b00 cmp r3, #0
8012d6a: d007 beq.n 8012d7c <xQueueSemaphoreTake+0xd8>
{
queueYIELD_IF_USING_PREEMPTION();
8012d6c: 4b54 ldr r3, [pc, #336] @ (8012ec0 <xQueueSemaphoreTake+0x21c>)
8012d6e: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8012d72: 601a str r2, [r3, #0]
8012d74: f3bf 8f4f dsb sy
8012d78: f3bf 8f6f isb sy
else
{
mtCOVERAGE_TEST_MARKER();
}
taskEXIT_CRITICAL();
8012d7c: f002 ff36 bl 8015bec <vPortExitCritical>
return pdPASS;
8012d80: 2301 movs r3, #1
8012d82: e098 b.n 8012eb6 <xQueueSemaphoreTake+0x212>
}
else
{
if( xTicksToWait == ( TickType_t ) 0 )
8012d84: 683b ldr r3, [r7, #0]
8012d86: 2b00 cmp r3, #0
8012d88: d112 bne.n 8012db0 <xQueueSemaphoreTake+0x10c>
/* For inheritance to have occurred there must have been an
initial timeout, and an adjusted timeout cannot become 0, as
if it were 0 the function would have exited. */
#if( configUSE_MUTEXES == 1 )
{
configASSERT( xInheritanceOccurred == pdFALSE );
8012d8a: 6b3b ldr r3, [r7, #48] @ 0x30
8012d8c: 2b00 cmp r3, #0
8012d8e: d00b beq.n 8012da8 <xQueueSemaphoreTake+0x104>
__asm volatile
8012d90: f04f 0350 mov.w r3, #80 @ 0x50
8012d94: f383 8811 msr BASEPRI, r3
8012d98: f3bf 8f6f isb sy
8012d9c: f3bf 8f4f dsb sy
8012da0: 617b str r3, [r7, #20]
}
8012da2: bf00 nop
8012da4: bf00 nop
8012da6: e7fd b.n 8012da4 <xQueueSemaphoreTake+0x100>
}
#endif /* configUSE_MUTEXES */
/* The semaphore count was 0 and no block time is specified
(or the block time has expired) so exit now. */
taskEXIT_CRITICAL();
8012da8: f002 ff20 bl 8015bec <vPortExitCritical>
traceQUEUE_RECEIVE_FAILED( pxQueue );
return errQUEUE_EMPTY;
8012dac: 2300 movs r3, #0
8012dae: e082 b.n 8012eb6 <xQueueSemaphoreTake+0x212>
}
else if( xEntryTimeSet == pdFALSE )
8012db0: 6b7b ldr r3, [r7, #52] @ 0x34
8012db2: 2b00 cmp r3, #0
8012db4: d106 bne.n 8012dc4 <xQueueSemaphoreTake+0x120>
{
/* The semaphore count was 0 and a block time was specified
so configure the timeout structure ready to block. */
vTaskInternalSetTimeOutState( &xTimeOut );
8012db6: f107 030c add.w r3, r7, #12
8012dba: 4618 mov r0, r3
8012dbc: f001 fbec bl 8014598 <vTaskInternalSetTimeOutState>
xEntryTimeSet = pdTRUE;
8012dc0: 2301 movs r3, #1
8012dc2: 637b str r3, [r7, #52] @ 0x34
/* Entry time was already set. */
mtCOVERAGE_TEST_MARKER();
}
}
}
taskEXIT_CRITICAL();
8012dc4: f002 ff12 bl 8015bec <vPortExitCritical>
/* Interrupts and other tasks can give to and take from the semaphore
now the critical section has been exited. */
vTaskSuspendAll();
8012dc8: f001 f90c bl 8013fe4 <vTaskSuspendAll>
prvLockQueue( pxQueue );
8012dcc: f002 fedc bl 8015b88 <vPortEnterCritical>
8012dd0: 6afb ldr r3, [r7, #44] @ 0x2c
8012dd2: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
8012dd6: b25b sxtb r3, r3
8012dd8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8012ddc: d103 bne.n 8012de6 <xQueueSemaphoreTake+0x142>
8012dde: 6afb ldr r3, [r7, #44] @ 0x2c
8012de0: 2200 movs r2, #0
8012de2: f883 2044 strb.w r2, [r3, #68] @ 0x44
8012de6: 6afb ldr r3, [r7, #44] @ 0x2c
8012de8: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
8012dec: b25b sxtb r3, r3
8012dee: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8012df2: d103 bne.n 8012dfc <xQueueSemaphoreTake+0x158>
8012df4: 6afb ldr r3, [r7, #44] @ 0x2c
8012df6: 2200 movs r2, #0
8012df8: f883 2045 strb.w r2, [r3, #69] @ 0x45
8012dfc: f002 fef6 bl 8015bec <vPortExitCritical>
/* Update the timeout state to see if it has expired yet. */
if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
8012e00: 463a mov r2, r7
8012e02: f107 030c add.w r3, r7, #12
8012e06: 4611 mov r1, r2
8012e08: 4618 mov r0, r3
8012e0a: f001 fbdb bl 80145c4 <xTaskCheckForTimeOut>
8012e0e: 4603 mov r3, r0
8012e10: 2b00 cmp r3, #0
8012e12: d132 bne.n 8012e7a <xQueueSemaphoreTake+0x1d6>
{
/* A block time is specified and not expired. If the semaphore
count is 0 then enter the Blocked state to wait for a semaphore to
become available. As semaphores are implemented with queues the
queue being empty is equivalent to the semaphore count being 0. */
if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
8012e14: 6af8 ldr r0, [r7, #44] @ 0x2c
8012e16: f000 fa33 bl 8013280 <prvIsQueueEmpty>
8012e1a: 4603 mov r3, r0
8012e1c: 2b00 cmp r3, #0
8012e1e: d026 beq.n 8012e6e <xQueueSemaphoreTake+0x1ca>
{
traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
#if ( configUSE_MUTEXES == 1 )
{
if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
8012e20: 6afb ldr r3, [r7, #44] @ 0x2c
8012e22: 681b ldr r3, [r3, #0]
8012e24: 2b00 cmp r3, #0
8012e26: d109 bne.n 8012e3c <xQueueSemaphoreTake+0x198>
{
taskENTER_CRITICAL();
8012e28: f002 feae bl 8015b88 <vPortEnterCritical>
{
xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
8012e2c: 6afb ldr r3, [r7, #44] @ 0x2c
8012e2e: 689b ldr r3, [r3, #8]
8012e30: 4618 mov r0, r3
8012e32: f001 fd41 bl 80148b8 <xTaskPriorityInherit>
8012e36: 6338 str r0, [r7, #48] @ 0x30
}
taskEXIT_CRITICAL();
8012e38: f002 fed8 bl 8015bec <vPortExitCritical>
mtCOVERAGE_TEST_MARKER();
}
}
#endif
vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
8012e3c: 6afb ldr r3, [r7, #44] @ 0x2c
8012e3e: 3324 adds r3, #36 @ 0x24
8012e40: 683a ldr r2, [r7, #0]
8012e42: 4611 mov r1, r2
8012e44: 4618 mov r0, r3
8012e46: f001 fac9 bl 80143dc <vTaskPlaceOnEventList>
prvUnlockQueue( pxQueue );
8012e4a: 6af8 ldr r0, [r7, #44] @ 0x2c
8012e4c: f000 f9c6 bl 80131dc <prvUnlockQueue>
if( xTaskResumeAll() == pdFALSE )
8012e50: f001 f8d6 bl 8014000 <xTaskResumeAll>
8012e54: 4603 mov r3, r0
8012e56: 2b00 cmp r3, #0
8012e58: f47f af67 bne.w 8012d2a <xQueueSemaphoreTake+0x86>
{
portYIELD_WITHIN_API();
8012e5c: 4b18 ldr r3, [pc, #96] @ (8012ec0 <xQueueSemaphoreTake+0x21c>)
8012e5e: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8012e62: 601a str r2, [r3, #0]
8012e64: f3bf 8f4f dsb sy
8012e68: f3bf 8f6f isb sy
8012e6c: e75d b.n 8012d2a <xQueueSemaphoreTake+0x86>
}
else
{
/* There was no timeout and the semaphore count was not 0, so
attempt to take the semaphore again. */
prvUnlockQueue( pxQueue );
8012e6e: 6af8 ldr r0, [r7, #44] @ 0x2c
8012e70: f000 f9b4 bl 80131dc <prvUnlockQueue>
( void ) xTaskResumeAll();
8012e74: f001 f8c4 bl 8014000 <xTaskResumeAll>
8012e78: e757 b.n 8012d2a <xQueueSemaphoreTake+0x86>
}
}
else
{
/* Timed out. */
prvUnlockQueue( pxQueue );
8012e7a: 6af8 ldr r0, [r7, #44] @ 0x2c
8012e7c: f000 f9ae bl 80131dc <prvUnlockQueue>
( void ) xTaskResumeAll();
8012e80: f001 f8be bl 8014000 <xTaskResumeAll>
/* If the semaphore count is 0 exit now as the timeout has
expired. Otherwise return to attempt to take the semaphore that is
known to be available. As semaphores are implemented by queues the
queue being empty is equivalent to the semaphore count being 0. */
if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
8012e84: 6af8 ldr r0, [r7, #44] @ 0x2c
8012e86: f000 f9fb bl 8013280 <prvIsQueueEmpty>
8012e8a: 4603 mov r3, r0
8012e8c: 2b00 cmp r3, #0
8012e8e: f43f af4c beq.w 8012d2a <xQueueSemaphoreTake+0x86>
#if ( configUSE_MUTEXES == 1 )
{
/* xInheritanceOccurred could only have be set if
pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
test the mutex type again to check it is actually a mutex. */
if( xInheritanceOccurred != pdFALSE )
8012e92: 6b3b ldr r3, [r7, #48] @ 0x30
8012e94: 2b00 cmp r3, #0
8012e96: d00d beq.n 8012eb4 <xQueueSemaphoreTake+0x210>
{
taskENTER_CRITICAL();
8012e98: f002 fe76 bl 8015b88 <vPortEnterCritical>
/* This task blocking on the mutex caused another
task to inherit this task's priority. Now this task
has timed out the priority should be disinherited
again, but only as low as the next highest priority
task that is waiting for the same mutex. */
uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
8012e9c: 6af8 ldr r0, [r7, #44] @ 0x2c
8012e9e: f000 f8f5 bl 801308c <prvGetDisinheritPriorityAfterTimeout>
8012ea2: 6278 str r0, [r7, #36] @ 0x24
vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
8012ea4: 6afb ldr r3, [r7, #44] @ 0x2c
8012ea6: 689b ldr r3, [r3, #8]
8012ea8: 6a79 ldr r1, [r7, #36] @ 0x24
8012eaa: 4618 mov r0, r3
8012eac: f001 fddc bl 8014a68 <vTaskPriorityDisinheritAfterTimeout>
}
taskEXIT_CRITICAL();
8012eb0: f002 fe9c bl 8015bec <vPortExitCritical>
}
}
#endif /* configUSE_MUTEXES */
traceQUEUE_RECEIVE_FAILED( pxQueue );
return errQUEUE_EMPTY;
8012eb4: 2300 movs r3, #0
{
mtCOVERAGE_TEST_MARKER();
}
}
} /*lint -restore */
}
8012eb6: 4618 mov r0, r3
8012eb8: 3738 adds r7, #56 @ 0x38
8012eba: 46bd mov sp, r7
8012ebc: bd80 pop {r7, pc}
8012ebe: bf00 nop
8012ec0: e000ed04 .word 0xe000ed04
08012ec4 <xQueueReceiveFromISR>:
} /*lint -restore */
}
/*-----------------------------------------------------------*/
BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
{
8012ec4: b580 push {r7, lr}
8012ec6: b08e sub sp, #56 @ 0x38
8012ec8: af00 add r7, sp, #0
8012eca: 60f8 str r0, [r7, #12]
8012ecc: 60b9 str r1, [r7, #8]
8012ece: 607a str r2, [r7, #4]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
8012ed0: 68fb ldr r3, [r7, #12]
8012ed2: 633b str r3, [r7, #48] @ 0x30
configASSERT( pxQueue );
8012ed4: 6b3b ldr r3, [r7, #48] @ 0x30
8012ed6: 2b00 cmp r3, #0
8012ed8: d10b bne.n 8012ef2 <xQueueReceiveFromISR+0x2e>
__asm volatile
8012eda: f04f 0350 mov.w r3, #80 @ 0x50
8012ede: f383 8811 msr BASEPRI, r3
8012ee2: f3bf 8f6f isb sy
8012ee6: f3bf 8f4f dsb sy
8012eea: 623b str r3, [r7, #32]
}
8012eec: bf00 nop
8012eee: bf00 nop
8012ef0: e7fd b.n 8012eee <xQueueReceiveFromISR+0x2a>
configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
8012ef2: 68bb ldr r3, [r7, #8]
8012ef4: 2b00 cmp r3, #0
8012ef6: d103 bne.n 8012f00 <xQueueReceiveFromISR+0x3c>
8012ef8: 6b3b ldr r3, [r7, #48] @ 0x30
8012efa: 6c1b ldr r3, [r3, #64] @ 0x40
8012efc: 2b00 cmp r3, #0
8012efe: d101 bne.n 8012f04 <xQueueReceiveFromISR+0x40>
8012f00: 2301 movs r3, #1
8012f02: e000 b.n 8012f06 <xQueueReceiveFromISR+0x42>
8012f04: 2300 movs r3, #0
8012f06: 2b00 cmp r3, #0
8012f08: d10b bne.n 8012f22 <xQueueReceiveFromISR+0x5e>
__asm volatile
8012f0a: f04f 0350 mov.w r3, #80 @ 0x50
8012f0e: f383 8811 msr BASEPRI, r3
8012f12: f3bf 8f6f isb sy
8012f16: f3bf 8f4f dsb sy
8012f1a: 61fb str r3, [r7, #28]
}
8012f1c: bf00 nop
8012f1e: bf00 nop
8012f20: e7fd b.n 8012f1e <xQueueReceiveFromISR+0x5a>
that have been assigned a priority at or (logically) below the maximum
system call interrupt priority. FreeRTOS maintains a separate interrupt
safe API to ensure interrupt entry is as fast and as simple as possible.
More information (albeit Cortex-M specific) is provided on the following
link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
8012f22: f002 ff11 bl 8015d48 <vPortValidateInterruptPriority>
__asm volatile
8012f26: f3ef 8211 mrs r2, BASEPRI
8012f2a: f04f 0350 mov.w r3, #80 @ 0x50
8012f2e: f383 8811 msr BASEPRI, r3
8012f32: f3bf 8f6f isb sy
8012f36: f3bf 8f4f dsb sy
8012f3a: 61ba str r2, [r7, #24]
8012f3c: 617b str r3, [r7, #20]
return ulOriginalBASEPRI;
8012f3e: 69bb ldr r3, [r7, #24]
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
8012f40: 62fb str r3, [r7, #44] @ 0x2c
{
const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
8012f42: 6b3b ldr r3, [r7, #48] @ 0x30
8012f44: 6b9b ldr r3, [r3, #56] @ 0x38
8012f46: 62bb str r3, [r7, #40] @ 0x28
/* Cannot block in an ISR, so check there is data available. */
if( uxMessagesWaiting > ( UBaseType_t ) 0 )
8012f48: 6abb ldr r3, [r7, #40] @ 0x28
8012f4a: 2b00 cmp r3, #0
8012f4c: d02f beq.n 8012fae <xQueueReceiveFromISR+0xea>
{
const int8_t cRxLock = pxQueue->cRxLock;
8012f4e: 6b3b ldr r3, [r7, #48] @ 0x30
8012f50: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
8012f54: f887 3027 strb.w r3, [r7, #39] @ 0x27
traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
prvCopyDataFromQueue( pxQueue, pvBuffer );
8012f58: 68b9 ldr r1, [r7, #8]
8012f5a: 6b38 ldr r0, [r7, #48] @ 0x30
8012f5c: f000 f918 bl 8013190 <prvCopyDataFromQueue>
pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
8012f60: 6abb ldr r3, [r7, #40] @ 0x28
8012f62: 1e5a subs r2, r3, #1
8012f64: 6b3b ldr r3, [r7, #48] @ 0x30
8012f66: 639a str r2, [r3, #56] @ 0x38
/* If the queue is locked the event list will not be modified.
Instead update the lock count so the task that unlocks the queue
will know that an ISR has removed data while the queue was
locked. */
if( cRxLock == queueUNLOCKED )
8012f68: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
8012f6c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8012f70: d112 bne.n 8012f98 <xQueueReceiveFromISR+0xd4>
{
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
8012f72: 6b3b ldr r3, [r7, #48] @ 0x30
8012f74: 691b ldr r3, [r3, #16]
8012f76: 2b00 cmp r3, #0
8012f78: d016 beq.n 8012fa8 <xQueueReceiveFromISR+0xe4>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
8012f7a: 6b3b ldr r3, [r7, #48] @ 0x30
8012f7c: 3310 adds r3, #16
8012f7e: 4618 mov r0, r3
8012f80: f001 fa7e bl 8014480 <xTaskRemoveFromEventList>
8012f84: 4603 mov r3, r0
8012f86: 2b00 cmp r3, #0
8012f88: d00e beq.n 8012fa8 <xQueueReceiveFromISR+0xe4>
{
/* The task waiting has a higher priority than us so
force a context switch. */
if( pxHigherPriorityTaskWoken != NULL )
8012f8a: 687b ldr r3, [r7, #4]
8012f8c: 2b00 cmp r3, #0
8012f8e: d00b beq.n 8012fa8 <xQueueReceiveFromISR+0xe4>
{
*pxHigherPriorityTaskWoken = pdTRUE;
8012f90: 687b ldr r3, [r7, #4]
8012f92: 2201 movs r2, #1
8012f94: 601a str r2, [r3, #0]
8012f96: e007 b.n 8012fa8 <xQueueReceiveFromISR+0xe4>
}
else
{
/* Increment the lock count so the task that unlocks the queue
knows that data was removed while it was locked. */
pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
8012f98: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
8012f9c: 3301 adds r3, #1
8012f9e: b2db uxtb r3, r3
8012fa0: b25a sxtb r2, r3
8012fa2: 6b3b ldr r3, [r7, #48] @ 0x30
8012fa4: f883 2044 strb.w r2, [r3, #68] @ 0x44
}
xReturn = pdPASS;
8012fa8: 2301 movs r3, #1
8012faa: 637b str r3, [r7, #52] @ 0x34
8012fac: e001 b.n 8012fb2 <xQueueReceiveFromISR+0xee>
}
else
{
xReturn = pdFAIL;
8012fae: 2300 movs r3, #0
8012fb0: 637b str r3, [r7, #52] @ 0x34
8012fb2: 6afb ldr r3, [r7, #44] @ 0x2c
8012fb4: 613b str r3, [r7, #16]
__asm volatile
8012fb6: 693b ldr r3, [r7, #16]
8012fb8: f383 8811 msr BASEPRI, r3
}
8012fbc: bf00 nop
traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn;
8012fbe: 6b7b ldr r3, [r7, #52] @ 0x34
}
8012fc0: 4618 mov r0, r3
8012fc2: 3738 adds r7, #56 @ 0x38
8012fc4: 46bd mov sp, r7
8012fc6: bd80 pop {r7, pc}
08012fc8 <uxQueueMessagesWaiting>:
return xReturn;
}
/*-----------------------------------------------------------*/
UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
{
8012fc8: b580 push {r7, lr}
8012fca: b084 sub sp, #16
8012fcc: af00 add r7, sp, #0
8012fce: 6078 str r0, [r7, #4]
UBaseType_t uxReturn;
configASSERT( xQueue );
8012fd0: 687b ldr r3, [r7, #4]
8012fd2: 2b00 cmp r3, #0
8012fd4: d10b bne.n 8012fee <uxQueueMessagesWaiting+0x26>
__asm volatile
8012fd6: f04f 0350 mov.w r3, #80 @ 0x50
8012fda: f383 8811 msr BASEPRI, r3
8012fde: f3bf 8f6f isb sy
8012fe2: f3bf 8f4f dsb sy
8012fe6: 60bb str r3, [r7, #8]
}
8012fe8: bf00 nop
8012fea: bf00 nop
8012fec: e7fd b.n 8012fea <uxQueueMessagesWaiting+0x22>
taskENTER_CRITICAL();
8012fee: f002 fdcb bl 8015b88 <vPortEnterCritical>
{
uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
8012ff2: 687b ldr r3, [r7, #4]
8012ff4: 6b9b ldr r3, [r3, #56] @ 0x38
8012ff6: 60fb str r3, [r7, #12]
}
taskEXIT_CRITICAL();
8012ff8: f002 fdf8 bl 8015bec <vPortExitCritical>
return uxReturn;
8012ffc: 68fb ldr r3, [r7, #12]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
8012ffe: 4618 mov r0, r3
8013000: 3710 adds r7, #16
8013002: 46bd mov sp, r7
8013004: bd80 pop {r7, pc}
08013006 <uxQueueMessagesWaitingFromISR>:
return uxReturn;
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
/*-----------------------------------------------------------*/
UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
{
8013006: b480 push {r7}
8013008: b087 sub sp, #28
801300a: af00 add r7, sp, #0
801300c: 6078 str r0, [r7, #4]
UBaseType_t uxReturn;
Queue_t * const pxQueue = xQueue;
801300e: 687b ldr r3, [r7, #4]
8013010: 617b str r3, [r7, #20]
configASSERT( pxQueue );
8013012: 697b ldr r3, [r7, #20]
8013014: 2b00 cmp r3, #0
8013016: d10b bne.n 8013030 <uxQueueMessagesWaitingFromISR+0x2a>
__asm volatile
8013018: f04f 0350 mov.w r3, #80 @ 0x50
801301c: f383 8811 msr BASEPRI, r3
8013020: f3bf 8f6f isb sy
8013024: f3bf 8f4f dsb sy
8013028: 60fb str r3, [r7, #12]
}
801302a: bf00 nop
801302c: bf00 nop
801302e: e7fd b.n 801302c <uxQueueMessagesWaitingFromISR+0x26>
uxReturn = pxQueue->uxMessagesWaiting;
8013030: 697b ldr r3, [r7, #20]
8013032: 6b9b ldr r3, [r3, #56] @ 0x38
8013034: 613b str r3, [r7, #16]
return uxReturn;
8013036: 693b ldr r3, [r7, #16]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
8013038: 4618 mov r0, r3
801303a: 371c adds r7, #28
801303c: 46bd mov sp, r7
801303e: f85d 7b04 ldr.w r7, [sp], #4
8013042: 4770 bx lr
08013044 <vQueueDelete>:
/*-----------------------------------------------------------*/
void vQueueDelete( QueueHandle_t xQueue )
{
8013044: b580 push {r7, lr}
8013046: b084 sub sp, #16
8013048: af00 add r7, sp, #0
801304a: 6078 str r0, [r7, #4]
Queue_t * const pxQueue = xQueue;
801304c: 687b ldr r3, [r7, #4]
801304e: 60fb str r3, [r7, #12]
configASSERT( pxQueue );
8013050: 68fb ldr r3, [r7, #12]
8013052: 2b00 cmp r3, #0
8013054: d10b bne.n 801306e <vQueueDelete+0x2a>
__asm volatile
8013056: f04f 0350 mov.w r3, #80 @ 0x50
801305a: f383 8811 msr BASEPRI, r3
801305e: f3bf 8f6f isb sy
8013062: f3bf 8f4f dsb sy
8013066: 60bb str r3, [r7, #8]
}
8013068: bf00 nop
801306a: bf00 nop
801306c: e7fd b.n 801306a <vQueueDelete+0x26>
traceQUEUE_DELETE( pxQueue );
#if ( configQUEUE_REGISTRY_SIZE > 0 )
{
vQueueUnregisterQueue( pxQueue );
801306e: 68f8 ldr r0, [r7, #12]
8013070: f000 f95e bl 8013330 <vQueueUnregisterQueue>
}
#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
{
/* The queue could have been allocated statically or dynamically, so
check before attempting to free the memory. */
if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
8013074: 68fb ldr r3, [r7, #12]
8013076: f893 3046 ldrb.w r3, [r3, #70] @ 0x46
801307a: 2b00 cmp r3, #0
801307c: d102 bne.n 8013084 <vQueueDelete+0x40>
{
vPortFree( pxQueue );
801307e: 68f8 ldr r0, [r7, #12]
8013080: f002 ff72 bl 8015f68 <vPortFree>
/* The queue must have been statically allocated, so is not going to be
deleted. Avoid compiler warnings about the unused parameter. */
( void ) pxQueue;
}
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
}
8013084: bf00 nop
8013086: 3710 adds r7, #16
8013088: 46bd mov sp, r7
801308a: bd80 pop {r7, pc}
0801308c <prvGetDisinheritPriorityAfterTimeout>:
/*-----------------------------------------------------------*/
#if( configUSE_MUTEXES == 1 )
static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
{
801308c: b480 push {r7}
801308e: b085 sub sp, #20
8013090: af00 add r7, sp, #0
8013092: 6078 str r0, [r7, #4]
priority, but the waiting task times out, then the holder should
disinherit the priority - but only down to the highest priority of any
other tasks that are waiting for the same mutex. For this purpose,
return the priority of the highest priority task that is waiting for the
mutex. */
if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
8013094: 687b ldr r3, [r7, #4]
8013096: 6a5b ldr r3, [r3, #36] @ 0x24
8013098: 2b00 cmp r3, #0
801309a: d006 beq.n 80130aa <prvGetDisinheritPriorityAfterTimeout+0x1e>
{
uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
801309c: 687b ldr r3, [r7, #4]
801309e: 6b1b ldr r3, [r3, #48] @ 0x30
80130a0: 681b ldr r3, [r3, #0]
80130a2: f1c3 0338 rsb r3, r3, #56 @ 0x38
80130a6: 60fb str r3, [r7, #12]
80130a8: e001 b.n 80130ae <prvGetDisinheritPriorityAfterTimeout+0x22>
}
else
{
uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
80130aa: 2300 movs r3, #0
80130ac: 60fb str r3, [r7, #12]
}
return uxHighestPriorityOfWaitingTasks;
80130ae: 68fb ldr r3, [r7, #12]
}
80130b0: 4618 mov r0, r3
80130b2: 3714 adds r7, #20
80130b4: 46bd mov sp, r7
80130b6: f85d 7b04 ldr.w r7, [sp], #4
80130ba: 4770 bx lr
080130bc <prvCopyDataToQueue>:
#endif /* configUSE_MUTEXES */
/*-----------------------------------------------------------*/
static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
{
80130bc: b580 push {r7, lr}
80130be: b086 sub sp, #24
80130c0: af00 add r7, sp, #0
80130c2: 60f8 str r0, [r7, #12]
80130c4: 60b9 str r1, [r7, #8]
80130c6: 607a str r2, [r7, #4]
BaseType_t xReturn = pdFALSE;
80130c8: 2300 movs r3, #0
80130ca: 617b str r3, [r7, #20]
UBaseType_t uxMessagesWaiting;
/* This function is called from a critical section. */
uxMessagesWaiting = pxQueue->uxMessagesWaiting;
80130cc: 68fb ldr r3, [r7, #12]
80130ce: 6b9b ldr r3, [r3, #56] @ 0x38
80130d0: 613b str r3, [r7, #16]
if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
80130d2: 68fb ldr r3, [r7, #12]
80130d4: 6c1b ldr r3, [r3, #64] @ 0x40
80130d6: 2b00 cmp r3, #0
80130d8: d10d bne.n 80130f6 <prvCopyDataToQueue+0x3a>
{
#if ( configUSE_MUTEXES == 1 )
{
if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
80130da: 68fb ldr r3, [r7, #12]
80130dc: 681b ldr r3, [r3, #0]
80130de: 2b00 cmp r3, #0
80130e0: d14d bne.n 801317e <prvCopyDataToQueue+0xc2>
{
/* The mutex is no longer being held. */
xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
80130e2: 68fb ldr r3, [r7, #12]
80130e4: 689b ldr r3, [r3, #8]
80130e6: 4618 mov r0, r3
80130e8: f001 fc4e bl 8014988 <xTaskPriorityDisinherit>
80130ec: 6178 str r0, [r7, #20]
pxQueue->u.xSemaphore.xMutexHolder = NULL;
80130ee: 68fb ldr r3, [r7, #12]
80130f0: 2200 movs r2, #0
80130f2: 609a str r2, [r3, #8]
80130f4: e043 b.n 801317e <prvCopyDataToQueue+0xc2>
mtCOVERAGE_TEST_MARKER();
}
}
#endif /* configUSE_MUTEXES */
}
else if( xPosition == queueSEND_TO_BACK )
80130f6: 687b ldr r3, [r7, #4]
80130f8: 2b00 cmp r3, #0
80130fa: d119 bne.n 8013130 <prvCopyDataToQueue+0x74>
{
( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
80130fc: 68fb ldr r3, [r7, #12]
80130fe: 6858 ldr r0, [r3, #4]
8013100: 68fb ldr r3, [r7, #12]
8013102: 6c1b ldr r3, [r3, #64] @ 0x40
8013104: 461a mov r2, r3
8013106: 68b9 ldr r1, [r7, #8]
8013108: f017 ff19 bl 802af3e <memcpy>
pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
801310c: 68fb ldr r3, [r7, #12]
801310e: 685a ldr r2, [r3, #4]
8013110: 68fb ldr r3, [r7, #12]
8013112: 6c1b ldr r3, [r3, #64] @ 0x40
8013114: 441a add r2, r3
8013116: 68fb ldr r3, [r7, #12]
8013118: 605a str r2, [r3, #4]
if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
801311a: 68fb ldr r3, [r7, #12]
801311c: 685a ldr r2, [r3, #4]
801311e: 68fb ldr r3, [r7, #12]
8013120: 689b ldr r3, [r3, #8]
8013122: 429a cmp r2, r3
8013124: d32b bcc.n 801317e <prvCopyDataToQueue+0xc2>
{
pxQueue->pcWriteTo = pxQueue->pcHead;
8013126: 68fb ldr r3, [r7, #12]
8013128: 681a ldr r2, [r3, #0]
801312a: 68fb ldr r3, [r7, #12]
801312c: 605a str r2, [r3, #4]
801312e: e026 b.n 801317e <prvCopyDataToQueue+0xc2>
mtCOVERAGE_TEST_MARKER();
}
}
else
{
( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. Assert checks null pointer only used when length is 0. */
8013130: 68fb ldr r3, [r7, #12]
8013132: 68d8 ldr r0, [r3, #12]
8013134: 68fb ldr r3, [r7, #12]
8013136: 6c1b ldr r3, [r3, #64] @ 0x40
8013138: 461a mov r2, r3
801313a: 68b9 ldr r1, [r7, #8]
801313c: f017 feff bl 802af3e <memcpy>
pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
8013140: 68fb ldr r3, [r7, #12]
8013142: 68da ldr r2, [r3, #12]
8013144: 68fb ldr r3, [r7, #12]
8013146: 6c1b ldr r3, [r3, #64] @ 0x40
8013148: 425b negs r3, r3
801314a: 441a add r2, r3
801314c: 68fb ldr r3, [r7, #12]
801314e: 60da str r2, [r3, #12]
if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
8013150: 68fb ldr r3, [r7, #12]
8013152: 68da ldr r2, [r3, #12]
8013154: 68fb ldr r3, [r7, #12]
8013156: 681b ldr r3, [r3, #0]
8013158: 429a cmp r2, r3
801315a: d207 bcs.n 801316c <prvCopyDataToQueue+0xb0>
{
pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
801315c: 68fb ldr r3, [r7, #12]
801315e: 689a ldr r2, [r3, #8]
8013160: 68fb ldr r3, [r7, #12]
8013162: 6c1b ldr r3, [r3, #64] @ 0x40
8013164: 425b negs r3, r3
8013166: 441a add r2, r3
8013168: 68fb ldr r3, [r7, #12]
801316a: 60da str r2, [r3, #12]
else
{
mtCOVERAGE_TEST_MARKER();
}
if( xPosition == queueOVERWRITE )
801316c: 687b ldr r3, [r7, #4]
801316e: 2b02 cmp r3, #2
8013170: d105 bne.n 801317e <prvCopyDataToQueue+0xc2>
{
if( uxMessagesWaiting > ( UBaseType_t ) 0 )
8013172: 693b ldr r3, [r7, #16]
8013174: 2b00 cmp r3, #0
8013176: d002 beq.n 801317e <prvCopyDataToQueue+0xc2>
{
/* An item is not being added but overwritten, so subtract
one from the recorded number of items in the queue so when
one is added again below the number of recorded items remains
correct. */
--uxMessagesWaiting;
8013178: 693b ldr r3, [r7, #16]
801317a: 3b01 subs r3, #1
801317c: 613b str r3, [r7, #16]
{
mtCOVERAGE_TEST_MARKER();
}
}
pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
801317e: 693b ldr r3, [r7, #16]
8013180: 1c5a adds r2, r3, #1
8013182: 68fb ldr r3, [r7, #12]
8013184: 639a str r2, [r3, #56] @ 0x38
return xReturn;
8013186: 697b ldr r3, [r7, #20]
}
8013188: 4618 mov r0, r3
801318a: 3718 adds r7, #24
801318c: 46bd mov sp, r7
801318e: bd80 pop {r7, pc}
08013190 <prvCopyDataFromQueue>:
/*-----------------------------------------------------------*/
static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
{
8013190: b580 push {r7, lr}
8013192: b082 sub sp, #8
8013194: af00 add r7, sp, #0
8013196: 6078 str r0, [r7, #4]
8013198: 6039 str r1, [r7, #0]
if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
801319a: 687b ldr r3, [r7, #4]
801319c: 6c1b ldr r3, [r3, #64] @ 0x40
801319e: 2b00 cmp r3, #0
80131a0: d018 beq.n 80131d4 <prvCopyDataFromQueue+0x44>
{
pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
80131a2: 687b ldr r3, [r7, #4]
80131a4: 68da ldr r2, [r3, #12]
80131a6: 687b ldr r3, [r7, #4]
80131a8: 6c1b ldr r3, [r3, #64] @ 0x40
80131aa: 441a add r2, r3
80131ac: 687b ldr r3, [r7, #4]
80131ae: 60da str r2, [r3, #12]
if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
80131b0: 687b ldr r3, [r7, #4]
80131b2: 68da ldr r2, [r3, #12]
80131b4: 687b ldr r3, [r7, #4]
80131b6: 689b ldr r3, [r3, #8]
80131b8: 429a cmp r2, r3
80131ba: d303 bcc.n 80131c4 <prvCopyDataFromQueue+0x34>
{
pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
80131bc: 687b ldr r3, [r7, #4]
80131be: 681a ldr r2, [r3, #0]
80131c0: 687b ldr r3, [r7, #4]
80131c2: 60da str r2, [r3, #12]
}
else
{
mtCOVERAGE_TEST_MARKER();
}
( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports. Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0. Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
80131c4: 687b ldr r3, [r7, #4]
80131c6: 68d9 ldr r1, [r3, #12]
80131c8: 687b ldr r3, [r7, #4]
80131ca: 6c1b ldr r3, [r3, #64] @ 0x40
80131cc: 461a mov r2, r3
80131ce: 6838 ldr r0, [r7, #0]
80131d0: f017 feb5 bl 802af3e <memcpy>
}
}
80131d4: bf00 nop
80131d6: 3708 adds r7, #8
80131d8: 46bd mov sp, r7
80131da: bd80 pop {r7, pc}
080131dc <prvUnlockQueue>:
/*-----------------------------------------------------------*/
static void prvUnlockQueue( Queue_t * const pxQueue )
{
80131dc: b580 push {r7, lr}
80131de: b084 sub sp, #16
80131e0: af00 add r7, sp, #0
80131e2: 6078 str r0, [r7, #4]
/* The lock counts contains the number of extra data items placed or
removed from the queue while the queue was locked. When a queue is
locked items can be added or removed, but the event lists cannot be
updated. */
taskENTER_CRITICAL();
80131e4: f002 fcd0 bl 8015b88 <vPortEnterCritical>
{
int8_t cTxLock = pxQueue->cTxLock;
80131e8: 687b ldr r3, [r7, #4]
80131ea: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
80131ee: 73fb strb r3, [r7, #15]
/* See if data was added to the queue while it was locked. */
while( cTxLock > queueLOCKED_UNMODIFIED )
80131f0: e011 b.n 8013216 <prvUnlockQueue+0x3a>
}
#else /* configUSE_QUEUE_SETS */
{
/* Tasks that are removed from the event list will get added to
the pending ready list as the scheduler is still suspended. */
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
80131f2: 687b ldr r3, [r7, #4]
80131f4: 6a5b ldr r3, [r3, #36] @ 0x24
80131f6: 2b00 cmp r3, #0
80131f8: d012 beq.n 8013220 <prvUnlockQueue+0x44>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
80131fa: 687b ldr r3, [r7, #4]
80131fc: 3324 adds r3, #36 @ 0x24
80131fe: 4618 mov r0, r3
8013200: f001 f93e bl 8014480 <xTaskRemoveFromEventList>
8013204: 4603 mov r3, r0
8013206: 2b00 cmp r3, #0
8013208: d001 beq.n 801320e <prvUnlockQueue+0x32>
{
/* The task waiting has a higher priority so record that
a context switch is required. */
vTaskMissedYield();
801320a: f001 fa3f bl 801468c <vTaskMissedYield>
break;
}
}
#endif /* configUSE_QUEUE_SETS */
--cTxLock;
801320e: 7bfb ldrb r3, [r7, #15]
8013210: 3b01 subs r3, #1
8013212: b2db uxtb r3, r3
8013214: 73fb strb r3, [r7, #15]
while( cTxLock > queueLOCKED_UNMODIFIED )
8013216: f997 300f ldrsb.w r3, [r7, #15]
801321a: 2b00 cmp r3, #0
801321c: dce9 bgt.n 80131f2 <prvUnlockQueue+0x16>
801321e: e000 b.n 8013222 <prvUnlockQueue+0x46>
break;
8013220: bf00 nop
}
pxQueue->cTxLock = queueUNLOCKED;
8013222: 687b ldr r3, [r7, #4]
8013224: 22ff movs r2, #255 @ 0xff
8013226: f883 2045 strb.w r2, [r3, #69] @ 0x45
}
taskEXIT_CRITICAL();
801322a: f002 fcdf bl 8015bec <vPortExitCritical>
/* Do the same for the Rx lock. */
taskENTER_CRITICAL();
801322e: f002 fcab bl 8015b88 <vPortEnterCritical>
{
int8_t cRxLock = pxQueue->cRxLock;
8013232: 687b ldr r3, [r7, #4]
8013234: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
8013238: 73bb strb r3, [r7, #14]
while( cRxLock > queueLOCKED_UNMODIFIED )
801323a: e011 b.n 8013260 <prvUnlockQueue+0x84>
{
if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
801323c: 687b ldr r3, [r7, #4]
801323e: 691b ldr r3, [r3, #16]
8013240: 2b00 cmp r3, #0
8013242: d012 beq.n 801326a <prvUnlockQueue+0x8e>
{
if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
8013244: 687b ldr r3, [r7, #4]
8013246: 3310 adds r3, #16
8013248: 4618 mov r0, r3
801324a: f001 f919 bl 8014480 <xTaskRemoveFromEventList>
801324e: 4603 mov r3, r0
8013250: 2b00 cmp r3, #0
8013252: d001 beq.n 8013258 <prvUnlockQueue+0x7c>
{
vTaskMissedYield();
8013254: f001 fa1a bl 801468c <vTaskMissedYield>
else
{
mtCOVERAGE_TEST_MARKER();
}
--cRxLock;
8013258: 7bbb ldrb r3, [r7, #14]
801325a: 3b01 subs r3, #1
801325c: b2db uxtb r3, r3
801325e: 73bb strb r3, [r7, #14]
while( cRxLock > queueLOCKED_UNMODIFIED )
8013260: f997 300e ldrsb.w r3, [r7, #14]
8013264: 2b00 cmp r3, #0
8013266: dce9 bgt.n 801323c <prvUnlockQueue+0x60>
8013268: e000 b.n 801326c <prvUnlockQueue+0x90>
}
else
{
break;
801326a: bf00 nop
}
}
pxQueue->cRxLock = queueUNLOCKED;
801326c: 687b ldr r3, [r7, #4]
801326e: 22ff movs r2, #255 @ 0xff
8013270: f883 2044 strb.w r2, [r3, #68] @ 0x44
}
taskEXIT_CRITICAL();
8013274: f002 fcba bl 8015bec <vPortExitCritical>
}
8013278: bf00 nop
801327a: 3710 adds r7, #16
801327c: 46bd mov sp, r7
801327e: bd80 pop {r7, pc}
08013280 <prvIsQueueEmpty>:
/*-----------------------------------------------------------*/
static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
{
8013280: b580 push {r7, lr}
8013282: b084 sub sp, #16
8013284: af00 add r7, sp, #0
8013286: 6078 str r0, [r7, #4]
BaseType_t xReturn;
taskENTER_CRITICAL();
8013288: f002 fc7e bl 8015b88 <vPortEnterCritical>
{
if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
801328c: 687b ldr r3, [r7, #4]
801328e: 6b9b ldr r3, [r3, #56] @ 0x38
8013290: 2b00 cmp r3, #0
8013292: d102 bne.n 801329a <prvIsQueueEmpty+0x1a>
{
xReturn = pdTRUE;
8013294: 2301 movs r3, #1
8013296: 60fb str r3, [r7, #12]
8013298: e001 b.n 801329e <prvIsQueueEmpty+0x1e>
}
else
{
xReturn = pdFALSE;
801329a: 2300 movs r3, #0
801329c: 60fb str r3, [r7, #12]
}
}
taskEXIT_CRITICAL();
801329e: f002 fca5 bl 8015bec <vPortExitCritical>
return xReturn;
80132a2: 68fb ldr r3, [r7, #12]
}
80132a4: 4618 mov r0, r3
80132a6: 3710 adds r7, #16
80132a8: 46bd mov sp, r7
80132aa: bd80 pop {r7, pc}
080132ac <prvIsQueueFull>:
return xReturn;
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
/*-----------------------------------------------------------*/
static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
{
80132ac: b580 push {r7, lr}
80132ae: b084 sub sp, #16
80132b0: af00 add r7, sp, #0
80132b2: 6078 str r0, [r7, #4]
BaseType_t xReturn;
taskENTER_CRITICAL();
80132b4: f002 fc68 bl 8015b88 <vPortEnterCritical>
{
if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
80132b8: 687b ldr r3, [r7, #4]
80132ba: 6b9a ldr r2, [r3, #56] @ 0x38
80132bc: 687b ldr r3, [r7, #4]
80132be: 6bdb ldr r3, [r3, #60] @ 0x3c
80132c0: 429a cmp r2, r3
80132c2: d102 bne.n 80132ca <prvIsQueueFull+0x1e>
{
xReturn = pdTRUE;
80132c4: 2301 movs r3, #1
80132c6: 60fb str r3, [r7, #12]
80132c8: e001 b.n 80132ce <prvIsQueueFull+0x22>
}
else
{
xReturn = pdFALSE;
80132ca: 2300 movs r3, #0
80132cc: 60fb str r3, [r7, #12]
}
}
taskEXIT_CRITICAL();
80132ce: f002 fc8d bl 8015bec <vPortExitCritical>
return xReturn;
80132d2: 68fb ldr r3, [r7, #12]
}
80132d4: 4618 mov r0, r3
80132d6: 3710 adds r7, #16
80132d8: 46bd mov sp, r7
80132da: bd80 pop {r7, pc}
080132dc <vQueueAddToRegistry>:
/*-----------------------------------------------------------*/
#if ( configQUEUE_REGISTRY_SIZE > 0 )
void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
{
80132dc: b480 push {r7}
80132de: b085 sub sp, #20
80132e0: af00 add r7, sp, #0
80132e2: 6078 str r0, [r7, #4]
80132e4: 6039 str r1, [r7, #0]
UBaseType_t ux;
/* See if there is an empty space in the registry. A NULL name denotes
a free slot. */
for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
80132e6: 2300 movs r3, #0
80132e8: 60fb str r3, [r7, #12]
80132ea: e014 b.n 8013316 <vQueueAddToRegistry+0x3a>
{
if( xQueueRegistry[ ux ].pcQueueName == NULL )
80132ec: 4a0f ldr r2, [pc, #60] @ (801332c <vQueueAddToRegistry+0x50>)
80132ee: 68fb ldr r3, [r7, #12]
80132f0: f852 3033 ldr.w r3, [r2, r3, lsl #3]
80132f4: 2b00 cmp r3, #0
80132f6: d10b bne.n 8013310 <vQueueAddToRegistry+0x34>
{
/* Store the information on this queue. */
xQueueRegistry[ ux ].pcQueueName = pcQueueName;
80132f8: 490c ldr r1, [pc, #48] @ (801332c <vQueueAddToRegistry+0x50>)
80132fa: 68fb ldr r3, [r7, #12]
80132fc: 683a ldr r2, [r7, #0]
80132fe: f841 2033 str.w r2, [r1, r3, lsl #3]
xQueueRegistry[ ux ].xHandle = xQueue;
8013302: 4a0a ldr r2, [pc, #40] @ (801332c <vQueueAddToRegistry+0x50>)
8013304: 68fb ldr r3, [r7, #12]
8013306: 00db lsls r3, r3, #3
8013308: 4413 add r3, r2
801330a: 687a ldr r2, [r7, #4]
801330c: 605a str r2, [r3, #4]
traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
break;
801330e: e006 b.n 801331e <vQueueAddToRegistry+0x42>
for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
8013310: 68fb ldr r3, [r7, #12]
8013312: 3301 adds r3, #1
8013314: 60fb str r3, [r7, #12]
8013316: 68fb ldr r3, [r7, #12]
8013318: 2b07 cmp r3, #7
801331a: d9e7 bls.n 80132ec <vQueueAddToRegistry+0x10>
else
{
mtCOVERAGE_TEST_MARKER();
}
}
}
801331c: bf00 nop
801331e: bf00 nop
8013320: 3714 adds r7, #20
8013322: 46bd mov sp, r7
8013324: f85d 7b04 ldr.w r7, [sp], #4
8013328: 4770 bx lr
801332a: bf00 nop
801332c: 24003d70 .word 0x24003d70
08013330 <vQueueUnregisterQueue>:
/*-----------------------------------------------------------*/
#if ( configQUEUE_REGISTRY_SIZE > 0 )
void vQueueUnregisterQueue( QueueHandle_t xQueue )
{
8013330: b480 push {r7}
8013332: b085 sub sp, #20
8013334: af00 add r7, sp, #0
8013336: 6078 str r0, [r7, #4]
UBaseType_t ux;
/* See if the handle of the queue being unregistered in actually in the
registry. */
for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
8013338: 2300 movs r3, #0
801333a: 60fb str r3, [r7, #12]
801333c: e016 b.n 801336c <vQueueUnregisterQueue+0x3c>
{
if( xQueueRegistry[ ux ].xHandle == xQueue )
801333e: 4a10 ldr r2, [pc, #64] @ (8013380 <vQueueUnregisterQueue+0x50>)
8013340: 68fb ldr r3, [r7, #12]
8013342: 00db lsls r3, r3, #3
8013344: 4413 add r3, r2
8013346: 685b ldr r3, [r3, #4]
8013348: 687a ldr r2, [r7, #4]
801334a: 429a cmp r2, r3
801334c: d10b bne.n 8013366 <vQueueUnregisterQueue+0x36>
{
/* Set the name to NULL to show that this slot if free again. */
xQueueRegistry[ ux ].pcQueueName = NULL;
801334e: 4a0c ldr r2, [pc, #48] @ (8013380 <vQueueUnregisterQueue+0x50>)
8013350: 68fb ldr r3, [r7, #12]
8013352: 2100 movs r1, #0
8013354: f842 1033 str.w r1, [r2, r3, lsl #3]
/* Set the handle to NULL to ensure the same queue handle cannot
appear in the registry twice if it is added, removed, then
added again. */
xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
8013358: 4a09 ldr r2, [pc, #36] @ (8013380 <vQueueUnregisterQueue+0x50>)
801335a: 68fb ldr r3, [r7, #12]
801335c: 00db lsls r3, r3, #3
801335e: 4413 add r3, r2
8013360: 2200 movs r2, #0
8013362: 605a str r2, [r3, #4]
break;
8013364: e006 b.n 8013374 <vQueueUnregisterQueue+0x44>
for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
8013366: 68fb ldr r3, [r7, #12]
8013368: 3301 adds r3, #1
801336a: 60fb str r3, [r7, #12]
801336c: 68fb ldr r3, [r7, #12]
801336e: 2b07 cmp r3, #7
8013370: d9e5 bls.n 801333e <vQueueUnregisterQueue+0xe>
{
mtCOVERAGE_TEST_MARKER();
}
}
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
8013372: bf00 nop
8013374: bf00 nop
8013376: 3714 adds r7, #20
8013378: 46bd mov sp, r7
801337a: f85d 7b04 ldr.w r7, [sp], #4
801337e: 4770 bx lr
8013380: 24003d70 .word 0x24003d70
08013384 <vQueueWaitForMessageRestricted>:
/*-----------------------------------------------------------*/
#if ( configUSE_TIMERS == 1 )
void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
{
8013384: b580 push {r7, lr}
8013386: b086 sub sp, #24
8013388: af00 add r7, sp, #0
801338a: 60f8 str r0, [r7, #12]
801338c: 60b9 str r1, [r7, #8]
801338e: 607a str r2, [r7, #4]
Queue_t * const pxQueue = xQueue;
8013390: 68fb ldr r3, [r7, #12]
8013392: 617b str r3, [r7, #20]
will not actually cause the task to block, just place it on a blocked
list. It will not block until the scheduler is unlocked - at which
time a yield will be performed. If an item is added to the queue while
the queue is locked, and the calling task blocks on the queue, then the
calling task will be immediately unblocked when the queue is unlocked. */
prvLockQueue( pxQueue );
8013394: f002 fbf8 bl 8015b88 <vPortEnterCritical>
8013398: 697b ldr r3, [r7, #20]
801339a: f893 3044 ldrb.w r3, [r3, #68] @ 0x44
801339e: b25b sxtb r3, r3
80133a0: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80133a4: d103 bne.n 80133ae <vQueueWaitForMessageRestricted+0x2a>
80133a6: 697b ldr r3, [r7, #20]
80133a8: 2200 movs r2, #0
80133aa: f883 2044 strb.w r2, [r3, #68] @ 0x44
80133ae: 697b ldr r3, [r7, #20]
80133b0: f893 3045 ldrb.w r3, [r3, #69] @ 0x45
80133b4: b25b sxtb r3, r3
80133b6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80133ba: d103 bne.n 80133c4 <vQueueWaitForMessageRestricted+0x40>
80133bc: 697b ldr r3, [r7, #20]
80133be: 2200 movs r2, #0
80133c0: f883 2045 strb.w r2, [r3, #69] @ 0x45
80133c4: f002 fc12 bl 8015bec <vPortExitCritical>
if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
80133c8: 697b ldr r3, [r7, #20]
80133ca: 6b9b ldr r3, [r3, #56] @ 0x38
80133cc: 2b00 cmp r3, #0
80133ce: d106 bne.n 80133de <vQueueWaitForMessageRestricted+0x5a>
{
/* There is nothing in the queue, block for the specified period. */
vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
80133d0: 697b ldr r3, [r7, #20]
80133d2: 3324 adds r3, #36 @ 0x24
80133d4: 687a ldr r2, [r7, #4]
80133d6: 68b9 ldr r1, [r7, #8]
80133d8: 4618 mov r0, r3
80133da: f001 f825 bl 8014428 <vTaskPlaceOnEventListRestricted>
}
else
{
mtCOVERAGE_TEST_MARKER();
}
prvUnlockQueue( pxQueue );
80133de: 6978 ldr r0, [r7, #20]
80133e0: f7ff fefc bl 80131dc <prvUnlockQueue>
}
80133e4: bf00 nop
80133e6: 3718 adds r7, #24
80133e8: 46bd mov sp, r7
80133ea: bd80 pop {r7, pc}
080133ec <xStreamBufferGenericCreate>:
/*-----------------------------------------------------------*/
#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer )
{
80133ec: b580 push {r7, lr}
80133ee: b08c sub sp, #48 @ 0x30
80133f0: af02 add r7, sp, #8
80133f2: 60f8 str r0, [r7, #12]
80133f4: 60b9 str r1, [r7, #8]
80133f6: 607a str r2, [r7, #4]
/* In case the stream buffer is going to be used as a message buffer
(that is, it will hold discrete messages with a little meta data that
says how big the next message is) check the buffer will be large enough
to hold at least one message. */
if( xIsMessageBuffer == pdTRUE )
80133f8: 687b ldr r3, [r7, #4]
80133fa: 2b01 cmp r3, #1
80133fc: d111 bne.n 8013422 <xStreamBufferGenericCreate+0x36>
{
/* Is a message buffer but not statically allocated. */
ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
80133fe: 2301 movs r3, #1
8013400: f887 3027 strb.w r3, [r7, #39] @ 0x27
configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
8013404: 68fb ldr r3, [r7, #12]
8013406: 2b04 cmp r3, #4
8013408: d81d bhi.n 8013446 <xStreamBufferGenericCreate+0x5a>
__asm volatile
801340a: f04f 0350 mov.w r3, #80 @ 0x50
801340e: f383 8811 msr BASEPRI, r3
8013412: f3bf 8f6f isb sy
8013416: f3bf 8f4f dsb sy
801341a: 61fb str r3, [r7, #28]
}
801341c: bf00 nop
801341e: bf00 nop
8013420: e7fd b.n 801341e <xStreamBufferGenericCreate+0x32>
}
else
{
/* Not a message buffer and not statically allocated. */
ucFlags = 0;
8013422: 2300 movs r3, #0
8013424: f887 3027 strb.w r3, [r7, #39] @ 0x27
configASSERT( xBufferSizeBytes > 0 );
8013428: 68fb ldr r3, [r7, #12]
801342a: 2b00 cmp r3, #0
801342c: d10b bne.n 8013446 <xStreamBufferGenericCreate+0x5a>
__asm volatile
801342e: f04f 0350 mov.w r3, #80 @ 0x50
8013432: f383 8811 msr BASEPRI, r3
8013436: f3bf 8f6f isb sy
801343a: f3bf 8f4f dsb sy
801343e: 61bb str r3, [r7, #24]
}
8013440: bf00 nop
8013442: bf00 nop
8013444: e7fd b.n 8013442 <xStreamBufferGenericCreate+0x56>
}
configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
8013446: 68ba ldr r2, [r7, #8]
8013448: 68fb ldr r3, [r7, #12]
801344a: 429a cmp r2, r3
801344c: d90b bls.n 8013466 <xStreamBufferGenericCreate+0x7a>
__asm volatile
801344e: f04f 0350 mov.w r3, #80 @ 0x50
8013452: f383 8811 msr BASEPRI, r3
8013456: f3bf 8f6f isb sy
801345a: f3bf 8f4f dsb sy
801345e: 617b str r3, [r7, #20]
}
8013460: bf00 nop
8013462: bf00 nop
8013464: e7fd b.n 8013462 <xStreamBufferGenericCreate+0x76>
/* A trigger level of 0 would cause a waiting task to unblock even when
the buffer was empty. */
if( xTriggerLevelBytes == ( size_t ) 0 )
8013466: 68bb ldr r3, [r7, #8]
8013468: 2b00 cmp r3, #0
801346a: d101 bne.n 8013470 <xStreamBufferGenericCreate+0x84>
{
xTriggerLevelBytes = ( size_t ) 1;
801346c: 2301 movs r3, #1
801346e: 60bb str r3, [r7, #8]
and the buffer follows immediately after. The requested size is
incremented so the free space is returned as the user would expect -
this is a quirk of the implementation that means otherwise the free
space would be reported as one byte smaller than would be logically
expected. */
xBufferSizeBytes++;
8013470: 68fb ldr r3, [r7, #12]
8013472: 3301 adds r3, #1
8013474: 60fb str r3, [r7, #12]
pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
8013476: 68fb ldr r3, [r7, #12]
8013478: 3324 adds r3, #36 @ 0x24
801347a: 4618 mov r0, r3
801347c: f002 fca6 bl 8015dcc <pvPortMalloc>
8013480: 6238 str r0, [r7, #32]
if( pucAllocatedMemory != NULL )
8013482: 6a3b ldr r3, [r7, #32]
8013484: 2b00 cmp r3, #0
8013486: d00a beq.n 801349e <xStreamBufferGenericCreate+0xb2>
{
prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
8013488: 6a3b ldr r3, [r7, #32]
801348a: f103 0124 add.w r1, r3, #36 @ 0x24
801348e: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
8013492: 9300 str r3, [sp, #0]
8013494: 68bb ldr r3, [r7, #8]
8013496: 68fa ldr r2, [r7, #12]
8013498: 6a38 ldr r0, [r7, #32]
801349a: f000 fb0b bl 8013ab4 <prvInitialiseNewStreamBuffer>
else
{
traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
}
return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
801349e: 6a3b ldr r3, [r7, #32]
}
80134a0: 4618 mov r0, r3
80134a2: 3728 adds r7, #40 @ 0x28
80134a4: 46bd mov sp, r7
80134a6: bd80 pop {r7, pc}
080134a8 <xStreamBufferSpacesAvailable>:
return xReturn;
}
/*-----------------------------------------------------------*/
size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
{
80134a8: b480 push {r7}
80134aa: b087 sub sp, #28
80134ac: af00 add r7, sp, #0
80134ae: 6078 str r0, [r7, #4]
const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
80134b0: 687b ldr r3, [r7, #4]
80134b2: 613b str r3, [r7, #16]
size_t xSpace;
configASSERT( pxStreamBuffer );
80134b4: 693b ldr r3, [r7, #16]
80134b6: 2b00 cmp r3, #0
80134b8: d10b bne.n 80134d2 <xStreamBufferSpacesAvailable+0x2a>
__asm volatile
80134ba: f04f 0350 mov.w r3, #80 @ 0x50
80134be: f383 8811 msr BASEPRI, r3
80134c2: f3bf 8f6f isb sy
80134c6: f3bf 8f4f dsb sy
80134ca: 60fb str r3, [r7, #12]
}
80134cc: bf00 nop
80134ce: bf00 nop
80134d0: e7fd b.n 80134ce <xStreamBufferSpacesAvailable+0x26>
xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
80134d2: 693b ldr r3, [r7, #16]
80134d4: 689a ldr r2, [r3, #8]
80134d6: 693b ldr r3, [r7, #16]
80134d8: 681b ldr r3, [r3, #0]
80134da: 4413 add r3, r2
80134dc: 617b str r3, [r7, #20]
xSpace -= pxStreamBuffer->xHead;
80134de: 693b ldr r3, [r7, #16]
80134e0: 685b ldr r3, [r3, #4]
80134e2: 697a ldr r2, [r7, #20]
80134e4: 1ad3 subs r3, r2, r3
80134e6: 617b str r3, [r7, #20]
xSpace -= ( size_t ) 1;
80134e8: 697b ldr r3, [r7, #20]
80134ea: 3b01 subs r3, #1
80134ec: 617b str r3, [r7, #20]
if( xSpace >= pxStreamBuffer->xLength )
80134ee: 693b ldr r3, [r7, #16]
80134f0: 689b ldr r3, [r3, #8]
80134f2: 697a ldr r2, [r7, #20]
80134f4: 429a cmp r2, r3
80134f6: d304 bcc.n 8013502 <xStreamBufferSpacesAvailable+0x5a>
{
xSpace -= pxStreamBuffer->xLength;
80134f8: 693b ldr r3, [r7, #16]
80134fa: 689b ldr r3, [r3, #8]
80134fc: 697a ldr r2, [r7, #20]
80134fe: 1ad3 subs r3, r2, r3
8013500: 617b str r3, [r7, #20]
else
{
mtCOVERAGE_TEST_MARKER();
}
return xSpace;
8013502: 697b ldr r3, [r7, #20]
}
8013504: 4618 mov r0, r3
8013506: 371c adds r7, #28
8013508: 46bd mov sp, r7
801350a: f85d 7b04 ldr.w r7, [sp], #4
801350e: 4770 bx lr
08013510 <xStreamBufferSend>:
size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
const void *pvTxData,
size_t xDataLengthBytes,
TickType_t xTicksToWait )
{
8013510: b580 push {r7, lr}
8013512: b090 sub sp, #64 @ 0x40
8013514: af02 add r7, sp, #8
8013516: 60f8 str r0, [r7, #12]
8013518: 60b9 str r1, [r7, #8]
801351a: 607a str r2, [r7, #4]
801351c: 603b str r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
801351e: 68fb ldr r3, [r7, #12]
8013520: 62fb str r3, [r7, #44] @ 0x2c
size_t xReturn, xSpace = 0;
8013522: 2300 movs r3, #0
8013524: 637b str r3, [r7, #52] @ 0x34
size_t xRequiredSpace = xDataLengthBytes;
8013526: 687b ldr r3, [r7, #4]
8013528: 633b str r3, [r7, #48] @ 0x30
TimeOut_t xTimeOut;
configASSERT( pvTxData );
801352a: 68bb ldr r3, [r7, #8]
801352c: 2b00 cmp r3, #0
801352e: d10b bne.n 8013548 <xStreamBufferSend+0x38>
__asm volatile
8013530: f04f 0350 mov.w r3, #80 @ 0x50
8013534: f383 8811 msr BASEPRI, r3
8013538: f3bf 8f6f isb sy
801353c: f3bf 8f4f dsb sy
8013540: 627b str r3, [r7, #36] @ 0x24
}
8013542: bf00 nop
8013544: bf00 nop
8013546: e7fd b.n 8013544 <xStreamBufferSend+0x34>
configASSERT( pxStreamBuffer );
8013548: 6afb ldr r3, [r7, #44] @ 0x2c
801354a: 2b00 cmp r3, #0
801354c: d10b bne.n 8013566 <xStreamBufferSend+0x56>
__asm volatile
801354e: f04f 0350 mov.w r3, #80 @ 0x50
8013552: f383 8811 msr BASEPRI, r3
8013556: f3bf 8f6f isb sy
801355a: f3bf 8f4f dsb sy
801355e: 623b str r3, [r7, #32]
}
8013560: bf00 nop
8013562: bf00 nop
8013564: e7fd b.n 8013562 <xStreamBufferSend+0x52>
/* This send function is used to write to both message buffers and stream
buffers. If this is a message buffer then the space needed must be
increased by the amount of bytes needed to store the length of the
message. */
if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
8013566: 6afb ldr r3, [r7, #44] @ 0x2c
8013568: 7f1b ldrb r3, [r3, #28]
801356a: f003 0301 and.w r3, r3, #1
801356e: 2b00 cmp r3, #0
8013570: d012 beq.n 8013598 <xStreamBufferSend+0x88>
{
xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
8013572: 6b3b ldr r3, [r7, #48] @ 0x30
8013574: 3304 adds r3, #4
8013576: 633b str r3, [r7, #48] @ 0x30
/* Overflow? */
configASSERT( xRequiredSpace > xDataLengthBytes );
8013578: 6b3a ldr r2, [r7, #48] @ 0x30
801357a: 687b ldr r3, [r7, #4]
801357c: 429a cmp r2, r3
801357e: d80b bhi.n 8013598 <xStreamBufferSend+0x88>
__asm volatile
8013580: f04f 0350 mov.w r3, #80 @ 0x50
8013584: f383 8811 msr BASEPRI, r3
8013588: f3bf 8f6f isb sy
801358c: f3bf 8f4f dsb sy
8013590: 61fb str r3, [r7, #28]
}
8013592: bf00 nop
8013594: bf00 nop
8013596: e7fd b.n 8013594 <xStreamBufferSend+0x84>
else
{
mtCOVERAGE_TEST_MARKER();
}
if( xTicksToWait != ( TickType_t ) 0 )
8013598: 683b ldr r3, [r7, #0]
801359a: 2b00 cmp r3, #0
801359c: d03f beq.n 801361e <xStreamBufferSend+0x10e>
{
vTaskSetTimeOutState( &xTimeOut );
801359e: f107 0310 add.w r3, r7, #16
80135a2: 4618 mov r0, r3
80135a4: f000 ffd0 bl 8014548 <vTaskSetTimeOutState>
do
{
/* Wait until the required number of bytes are free in the message
buffer. */
taskENTER_CRITICAL();
80135a8: f002 faee bl 8015b88 <vPortEnterCritical>
{
xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
80135ac: 6af8 ldr r0, [r7, #44] @ 0x2c
80135ae: f7ff ff7b bl 80134a8 <xStreamBufferSpacesAvailable>
80135b2: 6378 str r0, [r7, #52] @ 0x34
if( xSpace < xRequiredSpace )
80135b4: 6b7a ldr r2, [r7, #52] @ 0x34
80135b6: 6b3b ldr r3, [r7, #48] @ 0x30
80135b8: 429a cmp r2, r3
80135ba: d218 bcs.n 80135ee <xStreamBufferSend+0xde>
{
/* Clear notification state as going to wait for space. */
( void ) xTaskNotifyStateClear( NULL );
80135bc: 2000 movs r0, #0
80135be: f001 fcf3 bl 8014fa8 <xTaskNotifyStateClear>
/* Should only be one writer. */
configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
80135c2: 6afb ldr r3, [r7, #44] @ 0x2c
80135c4: 695b ldr r3, [r3, #20]
80135c6: 2b00 cmp r3, #0
80135c8: d00b beq.n 80135e2 <xStreamBufferSend+0xd2>
__asm volatile
80135ca: f04f 0350 mov.w r3, #80 @ 0x50
80135ce: f383 8811 msr BASEPRI, r3
80135d2: f3bf 8f6f isb sy
80135d6: f3bf 8f4f dsb sy
80135da: 61bb str r3, [r7, #24]
}
80135dc: bf00 nop
80135de: bf00 nop
80135e0: e7fd b.n 80135de <xStreamBufferSend+0xce>
pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
80135e2: f001 f93b bl 801485c <xTaskGetCurrentTaskHandle>
80135e6: 4602 mov r2, r0
80135e8: 6afb ldr r3, [r7, #44] @ 0x2c
80135ea: 615a str r2, [r3, #20]
80135ec: e002 b.n 80135f4 <xStreamBufferSend+0xe4>
}
else
{
taskEXIT_CRITICAL();
80135ee: f002 fafd bl 8015bec <vPortExitCritical>
break;
80135f2: e014 b.n 801361e <xStreamBufferSend+0x10e>
}
}
taskEXIT_CRITICAL();
80135f4: f002 fafa bl 8015bec <vPortExitCritical>
traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
80135f8: 683b ldr r3, [r7, #0]
80135fa: 2200 movs r2, #0
80135fc: 2100 movs r1, #0
80135fe: 2000 movs r0, #0
8013600: f001 faca bl 8014b98 <xTaskNotifyWait>
pxStreamBuffer->xTaskWaitingToSend = NULL;
8013604: 6afb ldr r3, [r7, #44] @ 0x2c
8013606: 2200 movs r2, #0
8013608: 615a str r2, [r3, #20]
} while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
801360a: 463a mov r2, r7
801360c: f107 0310 add.w r3, r7, #16
8013610: 4611 mov r1, r2
8013612: 4618 mov r0, r3
8013614: f000 ffd6 bl 80145c4 <xTaskCheckForTimeOut>
8013618: 4603 mov r3, r0
801361a: 2b00 cmp r3, #0
801361c: d0c4 beq.n 80135a8 <xStreamBufferSend+0x98>
else
{
mtCOVERAGE_TEST_MARKER();
}
if( xSpace == ( size_t ) 0 )
801361e: 6b7b ldr r3, [r7, #52] @ 0x34
8013620: 2b00 cmp r3, #0
8013622: d103 bne.n 801362c <xStreamBufferSend+0x11c>
{
xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
8013624: 6af8 ldr r0, [r7, #44] @ 0x2c
8013626: f7ff ff3f bl 80134a8 <xStreamBufferSpacesAvailable>
801362a: 6378 str r0, [r7, #52] @ 0x34
else
{
mtCOVERAGE_TEST_MARKER();
}
xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
801362c: 6b3b ldr r3, [r7, #48] @ 0x30
801362e: 9300 str r3, [sp, #0]
8013630: 6b7b ldr r3, [r7, #52] @ 0x34
8013632: 687a ldr r2, [r7, #4]
8013634: 68b9 ldr r1, [r7, #8]
8013636: 6af8 ldr r0, [r7, #44] @ 0x2c
8013638: f000 f823 bl 8013682 <prvWriteMessageToBuffer>
801363c: 62b8 str r0, [r7, #40] @ 0x28
if( xReturn > ( size_t ) 0 )
801363e: 6abb ldr r3, [r7, #40] @ 0x28
8013640: 2b00 cmp r3, #0
8013642: d019 beq.n 8013678 <xStreamBufferSend+0x168>
{
traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );
/* Was a task waiting for the data? */
if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
8013644: 6af8 ldr r0, [r7, #44] @ 0x2c
8013646: f000 fa15 bl 8013a74 <prvBytesInBuffer>
801364a: 4602 mov r2, r0
801364c: 6afb ldr r3, [r7, #44] @ 0x2c
801364e: 68db ldr r3, [r3, #12]
8013650: 429a cmp r2, r3
8013652: d311 bcc.n 8013678 <xStreamBufferSend+0x168>
{
sbSEND_COMPLETED( pxStreamBuffer );
8013654: f000 fcc6 bl 8013fe4 <vTaskSuspendAll>
8013658: 6afb ldr r3, [r7, #44] @ 0x2c
801365a: 691b ldr r3, [r3, #16]
801365c: 2b00 cmp r3, #0
801365e: d009 beq.n 8013674 <xStreamBufferSend+0x164>
8013660: 6afb ldr r3, [r7, #44] @ 0x2c
8013662: 6918 ldr r0, [r3, #16]
8013664: 2300 movs r3, #0
8013666: 2200 movs r2, #0
8013668: 2100 movs r1, #0
801366a: f001 faf5 bl 8014c58 <xTaskGenericNotify>
801366e: 6afb ldr r3, [r7, #44] @ 0x2c
8013670: 2200 movs r2, #0
8013672: 611a str r2, [r3, #16]
8013674: f000 fcc4 bl 8014000 <xTaskResumeAll>
{
mtCOVERAGE_TEST_MARKER();
traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
}
return xReturn;
8013678: 6abb ldr r3, [r7, #40] @ 0x28
}
801367a: 4618 mov r0, r3
801367c: 3738 adds r7, #56 @ 0x38
801367e: 46bd mov sp, r7
8013680: bd80 pop {r7, pc}
08013682 <prvWriteMessageToBuffer>:
static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
const void * pvTxData,
size_t xDataLengthBytes,
size_t xSpace,
size_t xRequiredSpace )
{
8013682: b580 push {r7, lr}
8013684: b086 sub sp, #24
8013686: af00 add r7, sp, #0
8013688: 60f8 str r0, [r7, #12]
801368a: 60b9 str r1, [r7, #8]
801368c: 607a str r2, [r7, #4]
801368e: 603b str r3, [r7, #0]
BaseType_t xShouldWrite;
size_t xReturn;
if( xSpace == ( size_t ) 0 )
8013690: 683b ldr r3, [r7, #0]
8013692: 2b00 cmp r3, #0
8013694: d102 bne.n 801369c <prvWriteMessageToBuffer+0x1a>
{
/* Doesn't matter if this is a stream buffer or a message buffer, there
is no space to write. */
xShouldWrite = pdFALSE;
8013696: 2300 movs r3, #0
8013698: 617b str r3, [r7, #20]
801369a: e01d b.n 80136d8 <prvWriteMessageToBuffer+0x56>
}
else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
801369c: 68fb ldr r3, [r7, #12]
801369e: 7f1b ldrb r3, [r3, #28]
80136a0: f003 0301 and.w r3, r3, #1
80136a4: 2b00 cmp r3, #0
80136a6: d108 bne.n 80136ba <prvWriteMessageToBuffer+0x38>
{
/* This is a stream buffer, as opposed to a message buffer, so writing a
stream of bytes rather than discrete messages. Write as many bytes as
possible. */
xShouldWrite = pdTRUE;
80136a8: 2301 movs r3, #1
80136aa: 617b str r3, [r7, #20]
xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
80136ac: 687a ldr r2, [r7, #4]
80136ae: 683b ldr r3, [r7, #0]
80136b0: 4293 cmp r3, r2
80136b2: bf28 it cs
80136b4: 4613 movcs r3, r2
80136b6: 607b str r3, [r7, #4]
80136b8: e00e b.n 80136d8 <prvWriteMessageToBuffer+0x56>
}
else if( xSpace >= xRequiredSpace )
80136ba: 683a ldr r2, [r7, #0]
80136bc: 6a3b ldr r3, [r7, #32]
80136be: 429a cmp r2, r3
80136c0: d308 bcc.n 80136d4 <prvWriteMessageToBuffer+0x52>
{
/* This is a message buffer, as opposed to a stream buffer, and there
is enough space to write both the message length and the message itself
into the buffer. Start by writing the length of the data, the data
itself will be written later in this function. */
xShouldWrite = pdTRUE;
80136c2: 2301 movs r3, #1
80136c4: 617b str r3, [r7, #20]
( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
80136c6: 1d3b adds r3, r7, #4
80136c8: 2204 movs r2, #4
80136ca: 4619 mov r1, r3
80136cc: 68f8 ldr r0, [r7, #12]
80136ce: f000 f8df bl 8013890 <prvWriteBytesToBuffer>
80136d2: e001 b.n 80136d8 <prvWriteMessageToBuffer+0x56>
}
else
{
/* There is space available, but not enough space. */
xShouldWrite = pdFALSE;
80136d4: 2300 movs r3, #0
80136d6: 617b str r3, [r7, #20]
}
if( xShouldWrite != pdFALSE )
80136d8: 697b ldr r3, [r7, #20]
80136da: 2b00 cmp r3, #0
80136dc: d007 beq.n 80136ee <prvWriteMessageToBuffer+0x6c>
{
/* Writes the data itself. */
xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */
80136de: 687b ldr r3, [r7, #4]
80136e0: 461a mov r2, r3
80136e2: 68b9 ldr r1, [r7, #8]
80136e4: 68f8 ldr r0, [r7, #12]
80136e6: f000 f8d3 bl 8013890 <prvWriteBytesToBuffer>
80136ea: 6138 str r0, [r7, #16]
80136ec: e001 b.n 80136f2 <prvWriteMessageToBuffer+0x70>
}
else
{
xReturn = 0;
80136ee: 2300 movs r3, #0
80136f0: 613b str r3, [r7, #16]
}
return xReturn;
80136f2: 693b ldr r3, [r7, #16]
}
80136f4: 4618 mov r0, r3
80136f6: 3718 adds r7, #24
80136f8: 46bd mov sp, r7
80136fa: bd80 pop {r7, pc}
080136fc <xStreamBufferReceive>:
size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
void *pvRxData,
size_t xBufferLengthBytes,
TickType_t xTicksToWait )
{
80136fc: b580 push {r7, lr}
80136fe: b08e sub sp, #56 @ 0x38
8013700: af02 add r7, sp, #8
8013702: 60f8 str r0, [r7, #12]
8013704: 60b9 str r1, [r7, #8]
8013706: 607a str r2, [r7, #4]
8013708: 603b str r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
801370a: 68fb ldr r3, [r7, #12]
801370c: 623b str r3, [r7, #32]
size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
801370e: 2300 movs r3, #0
8013710: 62fb str r3, [r7, #44] @ 0x2c
configASSERT( pvRxData );
8013712: 68bb ldr r3, [r7, #8]
8013714: 2b00 cmp r3, #0
8013716: d10b bne.n 8013730 <xStreamBufferReceive+0x34>
__asm volatile
8013718: f04f 0350 mov.w r3, #80 @ 0x50
801371c: f383 8811 msr BASEPRI, r3
8013720: f3bf 8f6f isb sy
8013724: f3bf 8f4f dsb sy
8013728: 61fb str r3, [r7, #28]
}
801372a: bf00 nop
801372c: bf00 nop
801372e: e7fd b.n 801372c <xStreamBufferReceive+0x30>
configASSERT( pxStreamBuffer );
8013730: 6a3b ldr r3, [r7, #32]
8013732: 2b00 cmp r3, #0
8013734: d10b bne.n 801374e <xStreamBufferReceive+0x52>
__asm volatile
8013736: f04f 0350 mov.w r3, #80 @ 0x50
801373a: f383 8811 msr BASEPRI, r3
801373e: f3bf 8f6f isb sy
8013742: f3bf 8f4f dsb sy
8013746: 61bb str r3, [r7, #24]
}
8013748: bf00 nop
801374a: bf00 nop
801374c: e7fd b.n 801374a <xStreamBufferReceive+0x4e>
/* This receive function is used by both message buffers, which store
discrete messages, and stream buffers, which store a continuous stream of
bytes. Discrete messages include an additional
sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
message. */
if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
801374e: 6a3b ldr r3, [r7, #32]
8013750: 7f1b ldrb r3, [r3, #28]
8013752: f003 0301 and.w r3, r3, #1
8013756: 2b00 cmp r3, #0
8013758: d002 beq.n 8013760 <xStreamBufferReceive+0x64>
{
xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
801375a: 2304 movs r3, #4
801375c: 627b str r3, [r7, #36] @ 0x24
801375e: e001 b.n 8013764 <xStreamBufferReceive+0x68>
}
else
{
xBytesToStoreMessageLength = 0;
8013760: 2300 movs r3, #0
8013762: 627b str r3, [r7, #36] @ 0x24
}
if( xTicksToWait != ( TickType_t ) 0 )
8013764: 683b ldr r3, [r7, #0]
8013766: 2b00 cmp r3, #0
8013768: d035 beq.n 80137d6 <xStreamBufferReceive+0xda>
{
/* Checking if there is data and clearing the notification state must be
performed atomically. */
taskENTER_CRITICAL();
801376a: f002 fa0d bl 8015b88 <vPortEnterCritical>
{
xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
801376e: 6a38 ldr r0, [r7, #32]
8013770: f000 f980 bl 8013a74 <prvBytesInBuffer>
8013774: 62b8 str r0, [r7, #40] @ 0x28
/* If this function was invoked by a message buffer read then
xBytesToStoreMessageLength holds the number of bytes used to hold
the length of the next discrete message. If this function was
invoked by a stream buffer read then xBytesToStoreMessageLength will
be 0. */
if( xBytesAvailable <= xBytesToStoreMessageLength )
8013776: 6aba ldr r2, [r7, #40] @ 0x28
8013778: 6a7b ldr r3, [r7, #36] @ 0x24
801377a: 429a cmp r2, r3
801377c: d817 bhi.n 80137ae <xStreamBufferReceive+0xb2>
{
/* Clear notification state as going to wait for data. */
( void ) xTaskNotifyStateClear( NULL );
801377e: 2000 movs r0, #0
8013780: f001 fc12 bl 8014fa8 <xTaskNotifyStateClear>
/* Should only be one reader. */
configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
8013784: 6a3b ldr r3, [r7, #32]
8013786: 691b ldr r3, [r3, #16]
8013788: 2b00 cmp r3, #0
801378a: d00b beq.n 80137a4 <xStreamBufferReceive+0xa8>
__asm volatile
801378c: f04f 0350 mov.w r3, #80 @ 0x50
8013790: f383 8811 msr BASEPRI, r3
8013794: f3bf 8f6f isb sy
8013798: f3bf 8f4f dsb sy
801379c: 617b str r3, [r7, #20]
}
801379e: bf00 nop
80137a0: bf00 nop
80137a2: e7fd b.n 80137a0 <xStreamBufferReceive+0xa4>
pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
80137a4: f001 f85a bl 801485c <xTaskGetCurrentTaskHandle>
80137a8: 4602 mov r2, r0
80137aa: 6a3b ldr r3, [r7, #32]
80137ac: 611a str r2, [r3, #16]
else
{
mtCOVERAGE_TEST_MARKER();
}
}
taskEXIT_CRITICAL();
80137ae: f002 fa1d bl 8015bec <vPortExitCritical>
if( xBytesAvailable <= xBytesToStoreMessageLength )
80137b2: 6aba ldr r2, [r7, #40] @ 0x28
80137b4: 6a7b ldr r3, [r7, #36] @ 0x24
80137b6: 429a cmp r2, r3
80137b8: d811 bhi.n 80137de <xStreamBufferReceive+0xe2>
{
/* Wait for data to be available. */
traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
80137ba: 683b ldr r3, [r7, #0]
80137bc: 2200 movs r2, #0
80137be: 2100 movs r1, #0
80137c0: 2000 movs r0, #0
80137c2: f001 f9e9 bl 8014b98 <xTaskNotifyWait>
pxStreamBuffer->xTaskWaitingToReceive = NULL;
80137c6: 6a3b ldr r3, [r7, #32]
80137c8: 2200 movs r2, #0
80137ca: 611a str r2, [r3, #16]
/* Recheck the data available after blocking. */
xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
80137cc: 6a38 ldr r0, [r7, #32]
80137ce: f000 f951 bl 8013a74 <prvBytesInBuffer>
80137d2: 62b8 str r0, [r7, #40] @ 0x28
80137d4: e003 b.n 80137de <xStreamBufferReceive+0xe2>
mtCOVERAGE_TEST_MARKER();
}
}
else
{
xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
80137d6: 6a38 ldr r0, [r7, #32]
80137d8: f000 f94c bl 8013a74 <prvBytesInBuffer>
80137dc: 62b8 str r0, [r7, #40] @ 0x28
/* Whether receiving a discrete message (where xBytesToStoreMessageLength
holds the number of bytes used to store the message length) or a stream of
bytes (where xBytesToStoreMessageLength is zero), the number of bytes
available must be greater than xBytesToStoreMessageLength to be able to
read bytes from the buffer. */
if( xBytesAvailable > xBytesToStoreMessageLength )
80137de: 6aba ldr r2, [r7, #40] @ 0x28
80137e0: 6a7b ldr r3, [r7, #36] @ 0x24
80137e2: 429a cmp r2, r3
80137e4: d91d bls.n 8013822 <xStreamBufferReceive+0x126>
{
xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
80137e6: 6a7b ldr r3, [r7, #36] @ 0x24
80137e8: 9300 str r3, [sp, #0]
80137ea: 6abb ldr r3, [r7, #40] @ 0x28
80137ec: 687a ldr r2, [r7, #4]
80137ee: 68b9 ldr r1, [r7, #8]
80137f0: 6a38 ldr r0, [r7, #32]
80137f2: f000 f81b bl 801382c <prvReadMessageFromBuffer>
80137f6: 62f8 str r0, [r7, #44] @ 0x2c
/* Was a task waiting for space in the buffer? */
if( xReceivedLength != ( size_t ) 0 )
80137f8: 6afb ldr r3, [r7, #44] @ 0x2c
80137fa: 2b00 cmp r3, #0
80137fc: d011 beq.n 8013822 <xStreamBufferReceive+0x126>
{
traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
sbRECEIVE_COMPLETED( pxStreamBuffer );
80137fe: f000 fbf1 bl 8013fe4 <vTaskSuspendAll>
8013802: 6a3b ldr r3, [r7, #32]
8013804: 695b ldr r3, [r3, #20]
8013806: 2b00 cmp r3, #0
8013808: d009 beq.n 801381e <xStreamBufferReceive+0x122>
801380a: 6a3b ldr r3, [r7, #32]
801380c: 6958 ldr r0, [r3, #20]
801380e: 2300 movs r3, #0
8013810: 2200 movs r2, #0
8013812: 2100 movs r1, #0
8013814: f001 fa20 bl 8014c58 <xTaskGenericNotify>
8013818: 6a3b ldr r3, [r7, #32]
801381a: 2200 movs r2, #0
801381c: 615a str r2, [r3, #20]
801381e: f000 fbef bl 8014000 <xTaskResumeAll>
{
traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
mtCOVERAGE_TEST_MARKER();
}
return xReceivedLength;
8013822: 6afb ldr r3, [r7, #44] @ 0x2c
}
8013824: 4618 mov r0, r3
8013826: 3730 adds r7, #48 @ 0x30
8013828: 46bd mov sp, r7
801382a: bd80 pop {r7, pc}
0801382c <prvReadMessageFromBuffer>:
static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
void *pvRxData,
size_t xBufferLengthBytes,
size_t xBytesAvailable,
size_t xBytesToStoreMessageLength )
{
801382c: b580 push {r7, lr}
801382e: b088 sub sp, #32
8013830: af00 add r7, sp, #0
8013832: 60f8 str r0, [r7, #12]
8013834: 60b9 str r1, [r7, #8]
8013836: 607a str r2, [r7, #4]
8013838: 603b str r3, [r7, #0]
size_t xOriginalTail, xReceivedLength, xNextMessageLength;
configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;
if( xBytesToStoreMessageLength != ( size_t ) 0 )
801383a: 6abb ldr r3, [r7, #40] @ 0x28
801383c: 2b00 cmp r3, #0
801383e: d019 beq.n 8013874 <prvReadMessageFromBuffer+0x48>
{
/* A discrete message is being received. First receive the length
of the message. A copy of the tail is stored so the buffer can be
returned to its prior state if the length of the message is too
large for the provided buffer. */
xOriginalTail = pxStreamBuffer->xTail;
8013840: 68fb ldr r3, [r7, #12]
8013842: 681b ldr r3, [r3, #0]
8013844: 61bb str r3, [r7, #24]
( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable );
8013846: f107 0110 add.w r1, r7, #16
801384a: 683b ldr r3, [r7, #0]
801384c: 6aba ldr r2, [r7, #40] @ 0x28
801384e: 68f8 ldr r0, [r7, #12]
8013850: f000 f893 bl 801397a <prvReadBytesFromBuffer>
xNextMessageLength = ( size_t ) xTempNextMessageLength;
8013854: 693b ldr r3, [r7, #16]
8013856: 61fb str r3, [r7, #28]
/* Reduce the number of bytes available by the number of bytes just
read out. */
xBytesAvailable -= xBytesToStoreMessageLength;
8013858: 683a ldr r2, [r7, #0]
801385a: 6abb ldr r3, [r7, #40] @ 0x28
801385c: 1ad3 subs r3, r2, r3
801385e: 603b str r3, [r7, #0]
/* Check there is enough space in the buffer provided by the
user. */
if( xNextMessageLength > xBufferLengthBytes )
8013860: 69fa ldr r2, [r7, #28]
8013862: 687b ldr r3, [r7, #4]
8013864: 429a cmp r2, r3
8013866: d907 bls.n 8013878 <prvReadMessageFromBuffer+0x4c>
{
/* The user has provided insufficient space to read the message
so return the buffer to its previous state (so the length of
the message is in the buffer again). */
pxStreamBuffer->xTail = xOriginalTail;
8013868: 68fb ldr r3, [r7, #12]
801386a: 69ba ldr r2, [r7, #24]
801386c: 601a str r2, [r3, #0]
xNextMessageLength = 0;
801386e: 2300 movs r3, #0
8013870: 61fb str r3, [r7, #28]
8013872: e001 b.n 8013878 <prvReadMessageFromBuffer+0x4c>
}
else
{
/* A stream of bytes is being received (as opposed to a discrete
message), so read as many bytes as possible. */
xNextMessageLength = xBufferLengthBytes;
8013874: 687b ldr r3, [r7, #4]
8013876: 61fb str r3, [r7, #28]
}
/* Read the actual data. */
xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
8013878: 683b ldr r3, [r7, #0]
801387a: 69fa ldr r2, [r7, #28]
801387c: 68b9 ldr r1, [r7, #8]
801387e: 68f8 ldr r0, [r7, #12]
8013880: f000 f87b bl 801397a <prvReadBytesFromBuffer>
8013884: 6178 str r0, [r7, #20]
return xReceivedLength;
8013886: 697b ldr r3, [r7, #20]
}
8013888: 4618 mov r0, r3
801388a: 3720 adds r7, #32
801388c: 46bd mov sp, r7
801388e: bd80 pop {r7, pc}
08013890 <prvWriteBytesToBuffer>:
return xReturn;
}
/*-----------------------------------------------------------*/
static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount )
{
8013890: b580 push {r7, lr}
8013892: b08a sub sp, #40 @ 0x28
8013894: af00 add r7, sp, #0
8013896: 60f8 str r0, [r7, #12]
8013898: 60b9 str r1, [r7, #8]
801389a: 607a str r2, [r7, #4]
size_t xNextHead, xFirstLength;
configASSERT( xCount > ( size_t ) 0 );
801389c: 687b ldr r3, [r7, #4]
801389e: 2b00 cmp r3, #0
80138a0: d10b bne.n 80138ba <prvWriteBytesToBuffer+0x2a>
__asm volatile
80138a2: f04f 0350 mov.w r3, #80 @ 0x50
80138a6: f383 8811 msr BASEPRI, r3
80138aa: f3bf 8f6f isb sy
80138ae: f3bf 8f4f dsb sy
80138b2: 61fb str r3, [r7, #28]
}
80138b4: bf00 nop
80138b6: bf00 nop
80138b8: e7fd b.n 80138b6 <prvWriteBytesToBuffer+0x26>
xNextHead = pxStreamBuffer->xHead;
80138ba: 68fb ldr r3, [r7, #12]
80138bc: 685b ldr r3, [r3, #4]
80138be: 627b str r3, [r7, #36] @ 0x24
/* Calculate the number of bytes that can be added in the first write -
which may be less than the total number of bytes that need to be added if
the buffer will wrap back to the beginning. */
xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
80138c0: 68fb ldr r3, [r7, #12]
80138c2: 689a ldr r2, [r3, #8]
80138c4: 6a7b ldr r3, [r7, #36] @ 0x24
80138c6: 1ad3 subs r3, r2, r3
80138c8: 687a ldr r2, [r7, #4]
80138ca: 4293 cmp r3, r2
80138cc: bf28 it cs
80138ce: 4613 movcs r3, r2
80138d0: 623b str r3, [r7, #32]
/* Write as many bytes as can be written in the first write. */
configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
80138d2: 6a7a ldr r2, [r7, #36] @ 0x24
80138d4: 6a3b ldr r3, [r7, #32]
80138d6: 441a add r2, r3
80138d8: 68fb ldr r3, [r7, #12]
80138da: 689b ldr r3, [r3, #8]
80138dc: 429a cmp r2, r3
80138de: d90b bls.n 80138f8 <prvWriteBytesToBuffer+0x68>
__asm volatile
80138e0: f04f 0350 mov.w r3, #80 @ 0x50
80138e4: f383 8811 msr BASEPRI, r3
80138e8: f3bf 8f6f isb sy
80138ec: f3bf 8f4f dsb sy
80138f0: 61bb str r3, [r7, #24]
}
80138f2: bf00 nop
80138f4: bf00 nop
80138f6: e7fd b.n 80138f4 <prvWriteBytesToBuffer+0x64>
( void ) memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
80138f8: 68fb ldr r3, [r7, #12]
80138fa: 699a ldr r2, [r3, #24]
80138fc: 6a7b ldr r3, [r7, #36] @ 0x24
80138fe: 4413 add r3, r2
8013900: 6a3a ldr r2, [r7, #32]
8013902: 68b9 ldr r1, [r7, #8]
8013904: 4618 mov r0, r3
8013906: f017 fb1a bl 802af3e <memcpy>
/* If the number of bytes written was less than the number that could be
written in the first write... */
if( xCount > xFirstLength )
801390a: 687a ldr r2, [r7, #4]
801390c: 6a3b ldr r3, [r7, #32]
801390e: 429a cmp r2, r3
8013910: d91d bls.n 801394e <prvWriteBytesToBuffer+0xbe>
{
/* ...then write the remaining bytes to the start of the buffer. */
configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
8013912: 687a ldr r2, [r7, #4]
8013914: 6a3b ldr r3, [r7, #32]
8013916: 1ad2 subs r2, r2, r3
8013918: 68fb ldr r3, [r7, #12]
801391a: 689b ldr r3, [r3, #8]
801391c: 429a cmp r2, r3
801391e: d90b bls.n 8013938 <prvWriteBytesToBuffer+0xa8>
__asm volatile
8013920: f04f 0350 mov.w r3, #80 @ 0x50
8013924: f383 8811 msr BASEPRI, r3
8013928: f3bf 8f6f isb sy
801392c: f3bf 8f4f dsb sy
8013930: 617b str r3, [r7, #20]
}
8013932: bf00 nop
8013934: bf00 nop
8013936: e7fd b.n 8013934 <prvWriteBytesToBuffer+0xa4>
( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
8013938: 68fb ldr r3, [r7, #12]
801393a: 6998 ldr r0, [r3, #24]
801393c: 68ba ldr r2, [r7, #8]
801393e: 6a3b ldr r3, [r7, #32]
8013940: 18d1 adds r1, r2, r3
8013942: 687a ldr r2, [r7, #4]
8013944: 6a3b ldr r3, [r7, #32]
8013946: 1ad3 subs r3, r2, r3
8013948: 461a mov r2, r3
801394a: f017 faf8 bl 802af3e <memcpy>
else
{
mtCOVERAGE_TEST_MARKER();
}
xNextHead += xCount;
801394e: 6a7a ldr r2, [r7, #36] @ 0x24
8013950: 687b ldr r3, [r7, #4]
8013952: 4413 add r3, r2
8013954: 627b str r3, [r7, #36] @ 0x24
if( xNextHead >= pxStreamBuffer->xLength )
8013956: 68fb ldr r3, [r7, #12]
8013958: 689b ldr r3, [r3, #8]
801395a: 6a7a ldr r2, [r7, #36] @ 0x24
801395c: 429a cmp r2, r3
801395e: d304 bcc.n 801396a <prvWriteBytesToBuffer+0xda>
{
xNextHead -= pxStreamBuffer->xLength;
8013960: 68fb ldr r3, [r7, #12]
8013962: 689b ldr r3, [r3, #8]
8013964: 6a7a ldr r2, [r7, #36] @ 0x24
8013966: 1ad3 subs r3, r2, r3
8013968: 627b str r3, [r7, #36] @ 0x24
else
{
mtCOVERAGE_TEST_MARKER();
}
pxStreamBuffer->xHead = xNextHead;
801396a: 68fb ldr r3, [r7, #12]
801396c: 6a7a ldr r2, [r7, #36] @ 0x24
801396e: 605a str r2, [r3, #4]
return xCount;
8013970: 687b ldr r3, [r7, #4]
}
8013972: 4618 mov r0, r3
8013974: 3728 adds r7, #40 @ 0x28
8013976: 46bd mov sp, r7
8013978: bd80 pop {r7, pc}
0801397a <prvReadBytesFromBuffer>:
/*-----------------------------------------------------------*/
static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, uint8_t *pucData, size_t xMaxCount, size_t xBytesAvailable )
{
801397a: b580 push {r7, lr}
801397c: b08a sub sp, #40 @ 0x28
801397e: af00 add r7, sp, #0
8013980: 60f8 str r0, [r7, #12]
8013982: 60b9 str r1, [r7, #8]
8013984: 607a str r2, [r7, #4]
8013986: 603b str r3, [r7, #0]
size_t xCount, xFirstLength, xNextTail;
/* Use the minimum of the wanted bytes and the available bytes. */
xCount = configMIN( xBytesAvailable, xMaxCount );
8013988: 687a ldr r2, [r7, #4]
801398a: 683b ldr r3, [r7, #0]
801398c: 4293 cmp r3, r2
801398e: bf28 it cs
8013990: 4613 movcs r3, r2
8013992: 623b str r3, [r7, #32]
if( xCount > ( size_t ) 0 )
8013994: 6a3b ldr r3, [r7, #32]
8013996: 2b00 cmp r3, #0
8013998: d067 beq.n 8013a6a <prvReadBytesFromBuffer+0xf0>
{
xNextTail = pxStreamBuffer->xTail;
801399a: 68fb ldr r3, [r7, #12]
801399c: 681b ldr r3, [r3, #0]
801399e: 627b str r3, [r7, #36] @ 0x24
/* Calculate the number of bytes that can be read - which may be
less than the number wanted if the data wraps around to the start of
the buffer. */
xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount );
80139a0: 68fb ldr r3, [r7, #12]
80139a2: 689a ldr r2, [r3, #8]
80139a4: 6a7b ldr r3, [r7, #36] @ 0x24
80139a6: 1ad3 subs r3, r2, r3
80139a8: 6a3a ldr r2, [r7, #32]
80139aa: 4293 cmp r3, r2
80139ac: bf28 it cs
80139ae: 4613 movcs r3, r2
80139b0: 61fb str r3, [r7, #28]
/* Obtain the number of bytes it is possible to obtain in the first
read. Asserts check bounds of read and write. */
configASSERT( xFirstLength <= xMaxCount );
80139b2: 69fa ldr r2, [r7, #28]
80139b4: 687b ldr r3, [r7, #4]
80139b6: 429a cmp r2, r3
80139b8: d90b bls.n 80139d2 <prvReadBytesFromBuffer+0x58>
__asm volatile
80139ba: f04f 0350 mov.w r3, #80 @ 0x50
80139be: f383 8811 msr BASEPRI, r3
80139c2: f3bf 8f6f isb sy
80139c6: f3bf 8f4f dsb sy
80139ca: 61bb str r3, [r7, #24]
}
80139cc: bf00 nop
80139ce: bf00 nop
80139d0: e7fd b.n 80139ce <prvReadBytesFromBuffer+0x54>
configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength );
80139d2: 6a7a ldr r2, [r7, #36] @ 0x24
80139d4: 69fb ldr r3, [r7, #28]
80139d6: 441a add r2, r3
80139d8: 68fb ldr r3, [r7, #12]
80139da: 689b ldr r3, [r3, #8]
80139dc: 429a cmp r2, r3
80139de: d90b bls.n 80139f8 <prvReadBytesFromBuffer+0x7e>
__asm volatile
80139e0: f04f 0350 mov.w r3, #80 @ 0x50
80139e4: f383 8811 msr BASEPRI, r3
80139e8: f3bf 8f6f isb sy
80139ec: f3bf 8f4f dsb sy
80139f0: 617b str r3, [r7, #20]
}
80139f2: bf00 nop
80139f4: bf00 nop
80139f6: e7fd b.n 80139f4 <prvReadBytesFromBuffer+0x7a>
( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
80139f8: 68fb ldr r3, [r7, #12]
80139fa: 699a ldr r2, [r3, #24]
80139fc: 6a7b ldr r3, [r7, #36] @ 0x24
80139fe: 4413 add r3, r2
8013a00: 69fa ldr r2, [r7, #28]
8013a02: 4619 mov r1, r3
8013a04: 68b8 ldr r0, [r7, #8]
8013a06: f017 fa9a bl 802af3e <memcpy>
/* If the total number of wanted bytes is greater than the number
that could be read in the first read... */
if( xCount > xFirstLength )
8013a0a: 6a3a ldr r2, [r7, #32]
8013a0c: 69fb ldr r3, [r7, #28]
8013a0e: 429a cmp r2, r3
8013a10: d91a bls.n 8013a48 <prvReadBytesFromBuffer+0xce>
{
/*...then read the remaining bytes from the start of the buffer. */
configASSERT( xCount <= xMaxCount );
8013a12: 6a3a ldr r2, [r7, #32]
8013a14: 687b ldr r3, [r7, #4]
8013a16: 429a cmp r2, r3
8013a18: d90b bls.n 8013a32 <prvReadBytesFromBuffer+0xb8>
__asm volatile
8013a1a: f04f 0350 mov.w r3, #80 @ 0x50
8013a1e: f383 8811 msr BASEPRI, r3
8013a22: f3bf 8f6f isb sy
8013a26: f3bf 8f4f dsb sy
8013a2a: 613b str r3, [r7, #16]
}
8013a2c: bf00 nop
8013a2e: bf00 nop
8013a30: e7fd b.n 8013a2e <prvReadBytesFromBuffer+0xb4>
( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
8013a32: 68ba ldr r2, [r7, #8]
8013a34: 69fb ldr r3, [r7, #28]
8013a36: 18d0 adds r0, r2, r3
8013a38: 68fb ldr r3, [r7, #12]
8013a3a: 6999 ldr r1, [r3, #24]
8013a3c: 6a3a ldr r2, [r7, #32]
8013a3e: 69fb ldr r3, [r7, #28]
8013a40: 1ad3 subs r3, r2, r3
8013a42: 461a mov r2, r3
8013a44: f017 fa7b bl 802af3e <memcpy>
mtCOVERAGE_TEST_MARKER();
}
/* Move the tail pointer to effectively remove the data read from
the buffer. */
xNextTail += xCount;
8013a48: 6a7a ldr r2, [r7, #36] @ 0x24
8013a4a: 6a3b ldr r3, [r7, #32]
8013a4c: 4413 add r3, r2
8013a4e: 627b str r3, [r7, #36] @ 0x24
if( xNextTail >= pxStreamBuffer->xLength )
8013a50: 68fb ldr r3, [r7, #12]
8013a52: 689b ldr r3, [r3, #8]
8013a54: 6a7a ldr r2, [r7, #36] @ 0x24
8013a56: 429a cmp r2, r3
8013a58: d304 bcc.n 8013a64 <prvReadBytesFromBuffer+0xea>
{
xNextTail -= pxStreamBuffer->xLength;
8013a5a: 68fb ldr r3, [r7, #12]
8013a5c: 689b ldr r3, [r3, #8]
8013a5e: 6a7a ldr r2, [r7, #36] @ 0x24
8013a60: 1ad3 subs r3, r2, r3
8013a62: 627b str r3, [r7, #36] @ 0x24
}
pxStreamBuffer->xTail = xNextTail;
8013a64: 68fb ldr r3, [r7, #12]
8013a66: 6a7a ldr r2, [r7, #36] @ 0x24
8013a68: 601a str r2, [r3, #0]
else
{
mtCOVERAGE_TEST_MARKER();
}
return xCount;
8013a6a: 6a3b ldr r3, [r7, #32]
}
8013a6c: 4618 mov r0, r3
8013a6e: 3728 adds r7, #40 @ 0x28
8013a70: 46bd mov sp, r7
8013a72: bd80 pop {r7, pc}
08013a74 <prvBytesInBuffer>:
/*-----------------------------------------------------------*/
static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
{
8013a74: b480 push {r7}
8013a76: b085 sub sp, #20
8013a78: af00 add r7, sp, #0
8013a7a: 6078 str r0, [r7, #4]
/* Returns the distance between xTail and xHead. */
size_t xCount;
xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
8013a7c: 687b ldr r3, [r7, #4]
8013a7e: 689a ldr r2, [r3, #8]
8013a80: 687b ldr r3, [r7, #4]
8013a82: 685b ldr r3, [r3, #4]
8013a84: 4413 add r3, r2
8013a86: 60fb str r3, [r7, #12]
xCount -= pxStreamBuffer->xTail;
8013a88: 687b ldr r3, [r7, #4]
8013a8a: 681b ldr r3, [r3, #0]
8013a8c: 68fa ldr r2, [r7, #12]
8013a8e: 1ad3 subs r3, r2, r3
8013a90: 60fb str r3, [r7, #12]
if ( xCount >= pxStreamBuffer->xLength )
8013a92: 687b ldr r3, [r7, #4]
8013a94: 689b ldr r3, [r3, #8]
8013a96: 68fa ldr r2, [r7, #12]
8013a98: 429a cmp r2, r3
8013a9a: d304 bcc.n 8013aa6 <prvBytesInBuffer+0x32>
{
xCount -= pxStreamBuffer->xLength;
8013a9c: 687b ldr r3, [r7, #4]
8013a9e: 689b ldr r3, [r3, #8]
8013aa0: 68fa ldr r2, [r7, #12]
8013aa2: 1ad3 subs r3, r2, r3
8013aa4: 60fb str r3, [r7, #12]
else
{
mtCOVERAGE_TEST_MARKER();
}
return xCount;
8013aa6: 68fb ldr r3, [r7, #12]
}
8013aa8: 4618 mov r0, r3
8013aaa: 3714 adds r7, #20
8013aac: 46bd mov sp, r7
8013aae: f85d 7b04 ldr.w r7, [sp], #4
8013ab2: 4770 bx lr
08013ab4 <prvInitialiseNewStreamBuffer>:
static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
uint8_t * const pucBuffer,
size_t xBufferSizeBytes,
size_t xTriggerLevelBytes,
uint8_t ucFlags )
{
8013ab4: b580 push {r7, lr}
8013ab6: b086 sub sp, #24
8013ab8: af00 add r7, sp, #0
8013aba: 60f8 str r0, [r7, #12]
8013abc: 60b9 str r1, [r7, #8]
8013abe: 607a str r2, [r7, #4]
8013ac0: 603b str r3, [r7, #0]
#if( configASSERT_DEFINED == 1 )
{
/* The value written just has to be identifiable when looking at the
memory. Don't use 0xA5 as that is the stack fill value and could
result in confusion as to what is actually being observed. */
const BaseType_t xWriteValue = 0x55;
8013ac2: 2355 movs r3, #85 @ 0x55
8013ac4: 617b str r3, [r7, #20]
configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
8013ac6: 687a ldr r2, [r7, #4]
8013ac8: 6979 ldr r1, [r7, #20]
8013aca: 68b8 ldr r0, [r7, #8]
8013acc: f017 f940 bl 802ad50 <memset>
8013ad0: 4602 mov r2, r0
8013ad2: 68bb ldr r3, [r7, #8]
8013ad4: 4293 cmp r3, r2
8013ad6: d00b beq.n 8013af0 <prvInitialiseNewStreamBuffer+0x3c>
__asm volatile
8013ad8: f04f 0350 mov.w r3, #80 @ 0x50
8013adc: f383 8811 msr BASEPRI, r3
8013ae0: f3bf 8f6f isb sy
8013ae4: f3bf 8f4f dsb sy
8013ae8: 613b str r3, [r7, #16]
}
8013aea: bf00 nop
8013aec: bf00 nop
8013aee: e7fd b.n 8013aec <prvInitialiseNewStreamBuffer+0x38>
} /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
#endif
( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
8013af0: 2224 movs r2, #36 @ 0x24
8013af2: 2100 movs r1, #0
8013af4: 68f8 ldr r0, [r7, #12]
8013af6: f017 f92b bl 802ad50 <memset>
pxStreamBuffer->pucBuffer = pucBuffer;
8013afa: 68fb ldr r3, [r7, #12]
8013afc: 68ba ldr r2, [r7, #8]
8013afe: 619a str r2, [r3, #24]
pxStreamBuffer->xLength = xBufferSizeBytes;
8013b00: 68fb ldr r3, [r7, #12]
8013b02: 687a ldr r2, [r7, #4]
8013b04: 609a str r2, [r3, #8]
pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
8013b06: 68fb ldr r3, [r7, #12]
8013b08: 683a ldr r2, [r7, #0]
8013b0a: 60da str r2, [r3, #12]
pxStreamBuffer->ucFlags = ucFlags;
8013b0c: 68fb ldr r3, [r7, #12]
8013b0e: f897 2020 ldrb.w r2, [r7, #32]
8013b12: 771a strb r2, [r3, #28]
}
8013b14: bf00 nop
8013b16: 3718 adds r7, #24
8013b18: 46bd mov sp, r7
8013b1a: bd80 pop {r7, pc}
08013b1c <xTaskCreateStatic>:
const uint32_t ulStackDepth,
void * const pvParameters,
UBaseType_t uxPriority,
StackType_t * const puxStackBuffer,
StaticTask_t * const pxTaskBuffer )
{
8013b1c: b580 push {r7, lr}
8013b1e: b08e sub sp, #56 @ 0x38
8013b20: af04 add r7, sp, #16
8013b22: 60f8 str r0, [r7, #12]
8013b24: 60b9 str r1, [r7, #8]
8013b26: 607a str r2, [r7, #4]
8013b28: 603b str r3, [r7, #0]
TCB_t *pxNewTCB;
TaskHandle_t xReturn;
configASSERT( puxStackBuffer != NULL );
8013b2a: 6b7b ldr r3, [r7, #52] @ 0x34
8013b2c: 2b00 cmp r3, #0
8013b2e: d10b bne.n 8013b48 <xTaskCreateStatic+0x2c>
__asm volatile
8013b30: f04f 0350 mov.w r3, #80 @ 0x50
8013b34: f383 8811 msr BASEPRI, r3
8013b38: f3bf 8f6f isb sy
8013b3c: f3bf 8f4f dsb sy
8013b40: 623b str r3, [r7, #32]
}
8013b42: bf00 nop
8013b44: bf00 nop
8013b46: e7fd b.n 8013b44 <xTaskCreateStatic+0x28>
configASSERT( pxTaskBuffer != NULL );
8013b48: 6bbb ldr r3, [r7, #56] @ 0x38
8013b4a: 2b00 cmp r3, #0
8013b4c: d10b bne.n 8013b66 <xTaskCreateStatic+0x4a>
__asm volatile
8013b4e: f04f 0350 mov.w r3, #80 @ 0x50
8013b52: f383 8811 msr BASEPRI, r3
8013b56: f3bf 8f6f isb sy
8013b5a: f3bf 8f4f dsb sy
8013b5e: 61fb str r3, [r7, #28]
}
8013b60: bf00 nop
8013b62: bf00 nop
8013b64: e7fd b.n 8013b62 <xTaskCreateStatic+0x46>
#if( configASSERT_DEFINED == 1 )
{
/* Sanity check that the size of the structure used to declare a
variable of type StaticTask_t equals the size of the real task
structure. */
volatile size_t xSize = sizeof( StaticTask_t );
8013b66: 23a8 movs r3, #168 @ 0xa8
8013b68: 613b str r3, [r7, #16]
configASSERT( xSize == sizeof( TCB_t ) );
8013b6a: 693b ldr r3, [r7, #16]
8013b6c: 2ba8 cmp r3, #168 @ 0xa8
8013b6e: d00b beq.n 8013b88 <xTaskCreateStatic+0x6c>
__asm volatile
8013b70: f04f 0350 mov.w r3, #80 @ 0x50
8013b74: f383 8811 msr BASEPRI, r3
8013b78: f3bf 8f6f isb sy
8013b7c: f3bf 8f4f dsb sy
8013b80: 61bb str r3, [r7, #24]
}
8013b82: bf00 nop
8013b84: bf00 nop
8013b86: e7fd b.n 8013b84 <xTaskCreateStatic+0x68>
( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
8013b88: 693b ldr r3, [r7, #16]
}
#endif /* configASSERT_DEFINED */
if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
8013b8a: 6bbb ldr r3, [r7, #56] @ 0x38
8013b8c: 2b00 cmp r3, #0
8013b8e: d01e beq.n 8013bce <xTaskCreateStatic+0xb2>
8013b90: 6b7b ldr r3, [r7, #52] @ 0x34
8013b92: 2b00 cmp r3, #0
8013b94: d01b beq.n 8013bce <xTaskCreateStatic+0xb2>
{
/* The memory used for the task's TCB and stack are passed into this
function - use them. */
pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
8013b96: 6bbb ldr r3, [r7, #56] @ 0x38
8013b98: 627b str r3, [r7, #36] @ 0x24
pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
8013b9a: 6a7b ldr r3, [r7, #36] @ 0x24
8013b9c: 6b7a ldr r2, [r7, #52] @ 0x34
8013b9e: 631a str r2, [r3, #48] @ 0x30
#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
{
/* Tasks can be created statically or dynamically, so note this
task was created statically in case the task is later deleted. */
pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
8013ba0: 6a7b ldr r3, [r7, #36] @ 0x24
8013ba2: 2202 movs r2, #2
8013ba4: f883 20a5 strb.w r2, [r3, #165] @ 0xa5
}
#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
8013ba8: 2300 movs r3, #0
8013baa: 9303 str r3, [sp, #12]
8013bac: 6a7b ldr r3, [r7, #36] @ 0x24
8013bae: 9302 str r3, [sp, #8]
8013bb0: f107 0314 add.w r3, r7, #20
8013bb4: 9301 str r3, [sp, #4]
8013bb6: 6b3b ldr r3, [r7, #48] @ 0x30
8013bb8: 9300 str r3, [sp, #0]
8013bba: 683b ldr r3, [r7, #0]
8013bbc: 687a ldr r2, [r7, #4]
8013bbe: 68b9 ldr r1, [r7, #8]
8013bc0: 68f8 ldr r0, [r7, #12]
8013bc2: f000 f851 bl 8013c68 <prvInitialiseNewTask>
prvAddNewTaskToReadyList( pxNewTCB );
8013bc6: 6a78 ldr r0, [r7, #36] @ 0x24
8013bc8: f000 f8f6 bl 8013db8 <prvAddNewTaskToReadyList>
8013bcc: e001 b.n 8013bd2 <xTaskCreateStatic+0xb6>
}
else
{
xReturn = NULL;
8013bce: 2300 movs r3, #0
8013bd0: 617b str r3, [r7, #20]
}
return xReturn;
8013bd2: 697b ldr r3, [r7, #20]
}
8013bd4: 4618 mov r0, r3
8013bd6: 3728 adds r7, #40 @ 0x28
8013bd8: 46bd mov sp, r7
8013bda: bd80 pop {r7, pc}
08013bdc <xTaskCreate>:
const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
const configSTACK_DEPTH_TYPE usStackDepth,
void * const pvParameters,
UBaseType_t uxPriority,
TaskHandle_t * const pxCreatedTask )
{
8013bdc: b580 push {r7, lr}
8013bde: b08c sub sp, #48 @ 0x30
8013be0: af04 add r7, sp, #16
8013be2: 60f8 str r0, [r7, #12]
8013be4: 60b9 str r1, [r7, #8]
8013be6: 603b str r3, [r7, #0]
8013be8: 4613 mov r3, r2
8013bea: 80fb strh r3, [r7, #6]
#else /* portSTACK_GROWTH */
{
StackType_t *pxStack;
/* Allocate space for the stack used by the task being created. */
pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
8013bec: 88fb ldrh r3, [r7, #6]
8013bee: 009b lsls r3, r3, #2
8013bf0: 4618 mov r0, r3
8013bf2: f002 f8eb bl 8015dcc <pvPortMalloc>
8013bf6: 6178 str r0, [r7, #20]
if( pxStack != NULL )
8013bf8: 697b ldr r3, [r7, #20]
8013bfa: 2b00 cmp r3, #0
8013bfc: d00e beq.n 8013c1c <xTaskCreate+0x40>
{
/* Allocate space for the TCB. */
pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
8013bfe: 20a8 movs r0, #168 @ 0xa8
8013c00: f002 f8e4 bl 8015dcc <pvPortMalloc>
8013c04: 61f8 str r0, [r7, #28]
if( pxNewTCB != NULL )
8013c06: 69fb ldr r3, [r7, #28]
8013c08: 2b00 cmp r3, #0
8013c0a: d003 beq.n 8013c14 <xTaskCreate+0x38>
{
/* Store the stack location in the TCB. */
pxNewTCB->pxStack = pxStack;
8013c0c: 69fb ldr r3, [r7, #28]
8013c0e: 697a ldr r2, [r7, #20]
8013c10: 631a str r2, [r3, #48] @ 0x30
8013c12: e005 b.n 8013c20 <xTaskCreate+0x44>
}
else
{
/* The stack cannot be used as the TCB was not created. Free
it again. */
vPortFree( pxStack );
8013c14: 6978 ldr r0, [r7, #20]
8013c16: f002 f9a7 bl 8015f68 <vPortFree>
8013c1a: e001 b.n 8013c20 <xTaskCreate+0x44>
}
}
else
{
pxNewTCB = NULL;
8013c1c: 2300 movs r3, #0
8013c1e: 61fb str r3, [r7, #28]
}
}
#endif /* portSTACK_GROWTH */
if( pxNewTCB != NULL )
8013c20: 69fb ldr r3, [r7, #28]
8013c22: 2b00 cmp r3, #0
8013c24: d017 beq.n 8013c56 <xTaskCreate+0x7a>
{
#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
{
/* Tasks can be created statically or dynamically, so note this
task was created dynamically in case it is later deleted. */
pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
8013c26: 69fb ldr r3, [r7, #28]
8013c28: 2200 movs r2, #0
8013c2a: f883 20a5 strb.w r2, [r3, #165] @ 0xa5
}
#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
8013c2e: 88fa ldrh r2, [r7, #6]
8013c30: 2300 movs r3, #0
8013c32: 9303 str r3, [sp, #12]
8013c34: 69fb ldr r3, [r7, #28]
8013c36: 9302 str r3, [sp, #8]
8013c38: 6afb ldr r3, [r7, #44] @ 0x2c
8013c3a: 9301 str r3, [sp, #4]
8013c3c: 6abb ldr r3, [r7, #40] @ 0x28
8013c3e: 9300 str r3, [sp, #0]
8013c40: 683b ldr r3, [r7, #0]
8013c42: 68b9 ldr r1, [r7, #8]
8013c44: 68f8 ldr r0, [r7, #12]
8013c46: f000 f80f bl 8013c68 <prvInitialiseNewTask>
prvAddNewTaskToReadyList( pxNewTCB );
8013c4a: 69f8 ldr r0, [r7, #28]
8013c4c: f000 f8b4 bl 8013db8 <prvAddNewTaskToReadyList>
xReturn = pdPASS;
8013c50: 2301 movs r3, #1
8013c52: 61bb str r3, [r7, #24]
8013c54: e002 b.n 8013c5c <xTaskCreate+0x80>
}
else
{
xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
8013c56: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8013c5a: 61bb str r3, [r7, #24]
}
return xReturn;
8013c5c: 69bb ldr r3, [r7, #24]
}
8013c5e: 4618 mov r0, r3
8013c60: 3720 adds r7, #32
8013c62: 46bd mov sp, r7
8013c64: bd80 pop {r7, pc}
...
08013c68 <prvInitialiseNewTask>:
void * const pvParameters,
UBaseType_t uxPriority,
TaskHandle_t * const pxCreatedTask,
TCB_t *pxNewTCB,
const MemoryRegion_t * const xRegions )
{
8013c68: b580 push {r7, lr}
8013c6a: b088 sub sp, #32
8013c6c: af00 add r7, sp, #0
8013c6e: 60f8 str r0, [r7, #12]
8013c70: 60b9 str r1, [r7, #8]
8013c72: 607a str r2, [r7, #4]
8013c74: 603b str r3, [r7, #0]
/* Avoid dependency on memset() if it is not required. */
#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
{
/* Fill the stack with a known value to assist debugging. */
( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
8013c76: 6b3b ldr r3, [r7, #48] @ 0x30
8013c78: 6b18 ldr r0, [r3, #48] @ 0x30
8013c7a: 687b ldr r3, [r7, #4]
8013c7c: 009b lsls r3, r3, #2
8013c7e: 461a mov r2, r3
8013c80: 21a5 movs r1, #165 @ 0xa5
8013c82: f017 f865 bl 802ad50 <memset>
grows from high memory to low (as per the 80x86) or vice versa.
portSTACK_GROWTH is used to make the result positive or negative as required
by the port. */
#if( portSTACK_GROWTH < 0 )
{
pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
8013c86: 6b3b ldr r3, [r7, #48] @ 0x30
8013c88: 6b1a ldr r2, [r3, #48] @ 0x30
8013c8a: 6879 ldr r1, [r7, #4]
8013c8c: f06f 4340 mvn.w r3, #3221225472 @ 0xc0000000
8013c90: 440b add r3, r1
8013c92: 009b lsls r3, r3, #2
8013c94: 4413 add r3, r2
8013c96: 61bb str r3, [r7, #24]
pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. Checked by assert(). */
8013c98: 69bb ldr r3, [r7, #24]
8013c9a: f023 0307 bic.w r3, r3, #7
8013c9e: 61bb str r3, [r7, #24]
/* Check the alignment of the calculated top of stack is correct. */
configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
8013ca0: 69bb ldr r3, [r7, #24]
8013ca2: f003 0307 and.w r3, r3, #7
8013ca6: 2b00 cmp r3, #0
8013ca8: d00b beq.n 8013cc2 <prvInitialiseNewTask+0x5a>
__asm volatile
8013caa: f04f 0350 mov.w r3, #80 @ 0x50
8013cae: f383 8811 msr BASEPRI, r3
8013cb2: f3bf 8f6f isb sy
8013cb6: f3bf 8f4f dsb sy
8013cba: 617b str r3, [r7, #20]
}
8013cbc: bf00 nop
8013cbe: bf00 nop
8013cc0: e7fd b.n 8013cbe <prvInitialiseNewTask+0x56>
pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
}
#endif /* portSTACK_GROWTH */
/* Store the task name in the TCB. */
if( pcName != NULL )
8013cc2: 68bb ldr r3, [r7, #8]
8013cc4: 2b00 cmp r3, #0
8013cc6: d01f beq.n 8013d08 <prvInitialiseNewTask+0xa0>
{
for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
8013cc8: 2300 movs r3, #0
8013cca: 61fb str r3, [r7, #28]
8013ccc: e012 b.n 8013cf4 <prvInitialiseNewTask+0x8c>
{
pxNewTCB->pcTaskName[ x ] = pcName[ x ];
8013cce: 68ba ldr r2, [r7, #8]
8013cd0: 69fb ldr r3, [r7, #28]
8013cd2: 4413 add r3, r2
8013cd4: 7819 ldrb r1, [r3, #0]
8013cd6: 6b3a ldr r2, [r7, #48] @ 0x30
8013cd8: 69fb ldr r3, [r7, #28]
8013cda: 4413 add r3, r2
8013cdc: 3334 adds r3, #52 @ 0x34
8013cde: 460a mov r2, r1
8013ce0: 701a strb r2, [r3, #0]
/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
configMAX_TASK_NAME_LEN characters just in case the memory after the
string is not accessible (extremely unlikely). */
if( pcName[ x ] == ( char ) 0x00 )
8013ce2: 68ba ldr r2, [r7, #8]
8013ce4: 69fb ldr r3, [r7, #28]
8013ce6: 4413 add r3, r2
8013ce8: 781b ldrb r3, [r3, #0]
8013cea: 2b00 cmp r3, #0
8013cec: d006 beq.n 8013cfc <prvInitialiseNewTask+0x94>
for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
8013cee: 69fb ldr r3, [r7, #28]
8013cf0: 3301 adds r3, #1
8013cf2: 61fb str r3, [r7, #28]
8013cf4: 69fb ldr r3, [r7, #28]
8013cf6: 2b0f cmp r3, #15
8013cf8: d9e9 bls.n 8013cce <prvInitialiseNewTask+0x66>
8013cfa: e000 b.n 8013cfe <prvInitialiseNewTask+0x96>
{
break;
8013cfc: bf00 nop
}
}
/* Ensure the name string is terminated in the case that the string length
was greater or equal to configMAX_TASK_NAME_LEN. */
pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
8013cfe: 6b3b ldr r3, [r7, #48] @ 0x30
8013d00: 2200 movs r2, #0
8013d02: f883 2043 strb.w r2, [r3, #67] @ 0x43
8013d06: e003 b.n 8013d10 <prvInitialiseNewTask+0xa8>
}
else
{
/* The task has not been given a name, so just ensure there is a NULL
terminator when it is read out. */
pxNewTCB->pcTaskName[ 0 ] = 0x00;
8013d08: 6b3b ldr r3, [r7, #48] @ 0x30
8013d0a: 2200 movs r2, #0
8013d0c: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
/* This is used as an array index so must ensure it's not too large. First
remove the privilege bit if one is present. */
if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
8013d10: 6abb ldr r3, [r7, #40] @ 0x28
8013d12: 2b37 cmp r3, #55 @ 0x37
8013d14: d901 bls.n 8013d1a <prvInitialiseNewTask+0xb2>
{
uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
8013d16: 2337 movs r3, #55 @ 0x37
8013d18: 62bb str r3, [r7, #40] @ 0x28
else
{
mtCOVERAGE_TEST_MARKER();
}
pxNewTCB->uxPriority = uxPriority;
8013d1a: 6b3b ldr r3, [r7, #48] @ 0x30
8013d1c: 6aba ldr r2, [r7, #40] @ 0x28
8013d1e: 62da str r2, [r3, #44] @ 0x2c
#if ( configUSE_MUTEXES == 1 )
{
pxNewTCB->uxBasePriority = uxPriority;
8013d20: 6b3b ldr r3, [r7, #48] @ 0x30
8013d22: 6aba ldr r2, [r7, #40] @ 0x28
8013d24: 64da str r2, [r3, #76] @ 0x4c
pxNewTCB->uxMutexesHeld = 0;
8013d26: 6b3b ldr r3, [r7, #48] @ 0x30
8013d28: 2200 movs r2, #0
8013d2a: 651a str r2, [r3, #80] @ 0x50
}
#endif /* configUSE_MUTEXES */
vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
8013d2c: 6b3b ldr r3, [r7, #48] @ 0x30
8013d2e: 3304 adds r3, #4
8013d30: 4618 mov r0, r3
8013d32: f7fe f9a5 bl 8012080 <vListInitialiseItem>
vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
8013d36: 6b3b ldr r3, [r7, #48] @ 0x30
8013d38: 3318 adds r3, #24
8013d3a: 4618 mov r0, r3
8013d3c: f7fe f9a0 bl 8012080 <vListInitialiseItem>
/* Set the pxNewTCB as a link back from the ListItem_t. This is so we can get
back to the containing TCB from a generic item in a list. */
listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
8013d40: 6b3b ldr r3, [r7, #48] @ 0x30
8013d42: 6b3a ldr r2, [r7, #48] @ 0x30
8013d44: 611a str r2, [r3, #16]
/* Event lists are always in priority order. */
listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
8013d46: 6abb ldr r3, [r7, #40] @ 0x28
8013d48: f1c3 0238 rsb r2, r3, #56 @ 0x38
8013d4c: 6b3b ldr r3, [r7, #48] @ 0x30
8013d4e: 619a str r2, [r3, #24]
listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
8013d50: 6b3b ldr r3, [r7, #48] @ 0x30
8013d52: 6b3a ldr r2, [r7, #48] @ 0x30
8013d54: 625a str r2, [r3, #36] @ 0x24
}
#endif
#if ( configUSE_TASK_NOTIFICATIONS == 1 )
{
pxNewTCB->ulNotifiedValue = 0;
8013d56: 6b3b ldr r3, [r7, #48] @ 0x30
8013d58: 2200 movs r2, #0
8013d5a: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
8013d5e: 6b3b ldr r3, [r7, #48] @ 0x30
8013d60: 2200 movs r2, #0
8013d62: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
#if ( configUSE_NEWLIB_REENTRANT == 1 )
{
/* Initialise this task's Newlib reent structure.
See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
for additional information. */
_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
8013d66: 6b3b ldr r3, [r7, #48] @ 0x30
8013d68: 3354 adds r3, #84 @ 0x54
8013d6a: 224c movs r2, #76 @ 0x4c
8013d6c: 2100 movs r1, #0
8013d6e: 4618 mov r0, r3
8013d70: f016 ffee bl 802ad50 <memset>
8013d74: 6b3b ldr r3, [r7, #48] @ 0x30
8013d76: 4a0d ldr r2, [pc, #52] @ (8013dac <prvInitialiseNewTask+0x144>)
8013d78: 659a str r2, [r3, #88] @ 0x58
8013d7a: 6b3b ldr r3, [r7, #48] @ 0x30
8013d7c: 4a0c ldr r2, [pc, #48] @ (8013db0 <prvInitialiseNewTask+0x148>)
8013d7e: 65da str r2, [r3, #92] @ 0x5c
8013d80: 6b3b ldr r3, [r7, #48] @ 0x30
8013d82: 4a0c ldr r2, [pc, #48] @ (8013db4 <prvInitialiseNewTask+0x14c>)
8013d84: 661a str r2, [r3, #96] @ 0x60
}
#endif /* portSTACK_GROWTH */
}
#else /* portHAS_STACK_OVERFLOW_CHECKING */
{
pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
8013d86: 683a ldr r2, [r7, #0]
8013d88: 68f9 ldr r1, [r7, #12]
8013d8a: 69b8 ldr r0, [r7, #24]
8013d8c: f001 fdca bl 8015924 <pxPortInitialiseStack>
8013d90: 4602 mov r2, r0
8013d92: 6b3b ldr r3, [r7, #48] @ 0x30
8013d94: 601a str r2, [r3, #0]
}
#endif /* portHAS_STACK_OVERFLOW_CHECKING */
}
#endif /* portUSING_MPU_WRAPPERS */
if( pxCreatedTask != NULL )
8013d96: 6afb ldr r3, [r7, #44] @ 0x2c
8013d98: 2b00 cmp r3, #0
8013d9a: d002 beq.n 8013da2 <prvInitialiseNewTask+0x13a>
{
/* Pass the handle out in an anonymous way. The handle can be used to
change the created task's priority, delete the created task, etc.*/
*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
8013d9c: 6afb ldr r3, [r7, #44] @ 0x2c
8013d9e: 6b3a ldr r2, [r7, #48] @ 0x30
8013da0: 601a str r2, [r3, #0]
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8013da2: bf00 nop
8013da4: 3720 adds r7, #32
8013da6: 46bd mov sp, r7
8013da8: bd80 pop {r7, pc}
8013daa: bf00 nop
8013dac: 2402b164 .word 0x2402b164
8013db0: 2402b1cc .word 0x2402b1cc
8013db4: 2402b234 .word 0x2402b234
08013db8 <prvAddNewTaskToReadyList>:
/*-----------------------------------------------------------*/
static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
{
8013db8: b580 push {r7, lr}
8013dba: b082 sub sp, #8
8013dbc: af00 add r7, sp, #0
8013dbe: 6078 str r0, [r7, #4]
/* Ensure interrupts don't access the task lists while the lists are being
updated. */
taskENTER_CRITICAL();
8013dc0: f001 fee2 bl 8015b88 <vPortEnterCritical>
{
uxCurrentNumberOfTasks++;
8013dc4: 4b2d ldr r3, [pc, #180] @ (8013e7c <prvAddNewTaskToReadyList+0xc4>)
8013dc6: 681b ldr r3, [r3, #0]
8013dc8: 3301 adds r3, #1
8013dca: 4a2c ldr r2, [pc, #176] @ (8013e7c <prvAddNewTaskToReadyList+0xc4>)
8013dcc: 6013 str r3, [r2, #0]
if( pxCurrentTCB == NULL )
8013dce: 4b2c ldr r3, [pc, #176] @ (8013e80 <prvAddNewTaskToReadyList+0xc8>)
8013dd0: 681b ldr r3, [r3, #0]
8013dd2: 2b00 cmp r3, #0
8013dd4: d109 bne.n 8013dea <prvAddNewTaskToReadyList+0x32>
{
/* There are no other tasks, or all the other tasks are in
the suspended state - make this the current task. */
pxCurrentTCB = pxNewTCB;
8013dd6: 4a2a ldr r2, [pc, #168] @ (8013e80 <prvAddNewTaskToReadyList+0xc8>)
8013dd8: 687b ldr r3, [r7, #4]
8013dda: 6013 str r3, [r2, #0]
if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
8013ddc: 4b27 ldr r3, [pc, #156] @ (8013e7c <prvAddNewTaskToReadyList+0xc4>)
8013dde: 681b ldr r3, [r3, #0]
8013de0: 2b01 cmp r3, #1
8013de2: d110 bne.n 8013e06 <prvAddNewTaskToReadyList+0x4e>
{
/* This is the first task to be created so do the preliminary
initialisation required. We will not recover if this call
fails, but we will report the failure. */
prvInitialiseTaskLists();
8013de4: f000 fc76 bl 80146d4 <prvInitialiseTaskLists>
8013de8: e00d b.n 8013e06 <prvAddNewTaskToReadyList+0x4e>
else
{
/* If the scheduler is not already running, make this task the
current task if it is the highest priority task to be created
so far. */
if( xSchedulerRunning == pdFALSE )
8013dea: 4b26 ldr r3, [pc, #152] @ (8013e84 <prvAddNewTaskToReadyList+0xcc>)
8013dec: 681b ldr r3, [r3, #0]
8013dee: 2b00 cmp r3, #0
8013df0: d109 bne.n 8013e06 <prvAddNewTaskToReadyList+0x4e>
{
if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
8013df2: 4b23 ldr r3, [pc, #140] @ (8013e80 <prvAddNewTaskToReadyList+0xc8>)
8013df4: 681b ldr r3, [r3, #0]
8013df6: 6ada ldr r2, [r3, #44] @ 0x2c
8013df8: 687b ldr r3, [r7, #4]
8013dfa: 6adb ldr r3, [r3, #44] @ 0x2c
8013dfc: 429a cmp r2, r3
8013dfe: d802 bhi.n 8013e06 <prvAddNewTaskToReadyList+0x4e>
{
pxCurrentTCB = pxNewTCB;
8013e00: 4a1f ldr r2, [pc, #124] @ (8013e80 <prvAddNewTaskToReadyList+0xc8>)
8013e02: 687b ldr r3, [r7, #4]
8013e04: 6013 str r3, [r2, #0]
{
mtCOVERAGE_TEST_MARKER();
}
}
uxTaskNumber++;
8013e06: 4b20 ldr r3, [pc, #128] @ (8013e88 <prvAddNewTaskToReadyList+0xd0>)
8013e08: 681b ldr r3, [r3, #0]
8013e0a: 3301 adds r3, #1
8013e0c: 4a1e ldr r2, [pc, #120] @ (8013e88 <prvAddNewTaskToReadyList+0xd0>)
8013e0e: 6013 str r3, [r2, #0]
#if ( configUSE_TRACE_FACILITY == 1 )
{
/* Add a counter into the TCB for tracing only. */
pxNewTCB->uxTCBNumber = uxTaskNumber;
8013e10: 4b1d ldr r3, [pc, #116] @ (8013e88 <prvAddNewTaskToReadyList+0xd0>)
8013e12: 681a ldr r2, [r3, #0]
8013e14: 687b ldr r3, [r7, #4]
8013e16: 645a str r2, [r3, #68] @ 0x44
}
#endif /* configUSE_TRACE_FACILITY */
traceTASK_CREATE( pxNewTCB );
prvAddTaskToReadyList( pxNewTCB );
8013e18: 687b ldr r3, [r7, #4]
8013e1a: 6ada ldr r2, [r3, #44] @ 0x2c
8013e1c: 4b1b ldr r3, [pc, #108] @ (8013e8c <prvAddNewTaskToReadyList+0xd4>)
8013e1e: 681b ldr r3, [r3, #0]
8013e20: 429a cmp r2, r3
8013e22: d903 bls.n 8013e2c <prvAddNewTaskToReadyList+0x74>
8013e24: 687b ldr r3, [r7, #4]
8013e26: 6adb ldr r3, [r3, #44] @ 0x2c
8013e28: 4a18 ldr r2, [pc, #96] @ (8013e8c <prvAddNewTaskToReadyList+0xd4>)
8013e2a: 6013 str r3, [r2, #0]
8013e2c: 687b ldr r3, [r7, #4]
8013e2e: 6ada ldr r2, [r3, #44] @ 0x2c
8013e30: 4613 mov r3, r2
8013e32: 009b lsls r3, r3, #2
8013e34: 4413 add r3, r2
8013e36: 009b lsls r3, r3, #2
8013e38: 4a15 ldr r2, [pc, #84] @ (8013e90 <prvAddNewTaskToReadyList+0xd8>)
8013e3a: 441a add r2, r3
8013e3c: 687b ldr r3, [r7, #4]
8013e3e: 3304 adds r3, #4
8013e40: 4619 mov r1, r3
8013e42: 4610 mov r0, r2
8013e44: f7fe f929 bl 801209a <vListInsertEnd>
portSETUP_TCB( pxNewTCB );
}
taskEXIT_CRITICAL();
8013e48: f001 fed0 bl 8015bec <vPortExitCritical>
if( xSchedulerRunning != pdFALSE )
8013e4c: 4b0d ldr r3, [pc, #52] @ (8013e84 <prvAddNewTaskToReadyList+0xcc>)
8013e4e: 681b ldr r3, [r3, #0]
8013e50: 2b00 cmp r3, #0
8013e52: d00e beq.n 8013e72 <prvAddNewTaskToReadyList+0xba>
{
/* If the created task is of a higher priority than the current task
then it should run now. */
if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
8013e54: 4b0a ldr r3, [pc, #40] @ (8013e80 <prvAddNewTaskToReadyList+0xc8>)
8013e56: 681b ldr r3, [r3, #0]
8013e58: 6ada ldr r2, [r3, #44] @ 0x2c
8013e5a: 687b ldr r3, [r7, #4]
8013e5c: 6adb ldr r3, [r3, #44] @ 0x2c
8013e5e: 429a cmp r2, r3
8013e60: d207 bcs.n 8013e72 <prvAddNewTaskToReadyList+0xba>
{
taskYIELD_IF_USING_PREEMPTION();
8013e62: 4b0c ldr r3, [pc, #48] @ (8013e94 <prvAddNewTaskToReadyList+0xdc>)
8013e64: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8013e68: 601a str r2, [r3, #0]
8013e6a: f3bf 8f4f dsb sy
8013e6e: f3bf 8f6f isb sy
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8013e72: bf00 nop
8013e74: 3708 adds r7, #8
8013e76: 46bd mov sp, r7
8013e78: bd80 pop {r7, pc}
8013e7a: bf00 nop
8013e7c: 24004284 .word 0x24004284
8013e80: 24003db0 .word 0x24003db0
8013e84: 24004290 .word 0x24004290
8013e88: 240042a0 .word 0x240042a0
8013e8c: 2400428c .word 0x2400428c
8013e90: 24003db4 .word 0x24003db4
8013e94: e000ed04 .word 0xe000ed04
08013e98 <vTaskDelay>:
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskDelay == 1 )
void vTaskDelay( const TickType_t xTicksToDelay )
{
8013e98: b580 push {r7, lr}
8013e9a: b084 sub sp, #16
8013e9c: af00 add r7, sp, #0
8013e9e: 6078 str r0, [r7, #4]
BaseType_t xAlreadyYielded = pdFALSE;
8013ea0: 2300 movs r3, #0
8013ea2: 60fb str r3, [r7, #12]
/* A delay time of zero just forces a reschedule. */
if( xTicksToDelay > ( TickType_t ) 0U )
8013ea4: 687b ldr r3, [r7, #4]
8013ea6: 2b00 cmp r3, #0
8013ea8: d018 beq.n 8013edc <vTaskDelay+0x44>
{
configASSERT( uxSchedulerSuspended == 0 );
8013eaa: 4b14 ldr r3, [pc, #80] @ (8013efc <vTaskDelay+0x64>)
8013eac: 681b ldr r3, [r3, #0]
8013eae: 2b00 cmp r3, #0
8013eb0: d00b beq.n 8013eca <vTaskDelay+0x32>
__asm volatile
8013eb2: f04f 0350 mov.w r3, #80 @ 0x50
8013eb6: f383 8811 msr BASEPRI, r3
8013eba: f3bf 8f6f isb sy
8013ebe: f3bf 8f4f dsb sy
8013ec2: 60bb str r3, [r7, #8]
}
8013ec4: bf00 nop
8013ec6: bf00 nop
8013ec8: e7fd b.n 8013ec6 <vTaskDelay+0x2e>
vTaskSuspendAll();
8013eca: f000 f88b bl 8013fe4 <vTaskSuspendAll>
list or removed from the blocked list until the scheduler
is resumed.
This task cannot be in an event list as it is the currently
executing task. */
prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
8013ece: 2100 movs r1, #0
8013ed0: 6878 ldr r0, [r7, #4]
8013ed2: f001 f88f bl 8014ff4 <prvAddCurrentTaskToDelayedList>
}
xAlreadyYielded = xTaskResumeAll();
8013ed6: f000 f893 bl 8014000 <xTaskResumeAll>
8013eda: 60f8 str r0, [r7, #12]
mtCOVERAGE_TEST_MARKER();
}
/* Force a reschedule if xTaskResumeAll has not already done so, we may
have put ourselves to sleep. */
if( xAlreadyYielded == pdFALSE )
8013edc: 68fb ldr r3, [r7, #12]
8013ede: 2b00 cmp r3, #0
8013ee0: d107 bne.n 8013ef2 <vTaskDelay+0x5a>
{
portYIELD_WITHIN_API();
8013ee2: 4b07 ldr r3, [pc, #28] @ (8013f00 <vTaskDelay+0x68>)
8013ee4: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8013ee8: 601a str r2, [r3, #0]
8013eea: f3bf 8f4f dsb sy
8013eee: f3bf 8f6f isb sy
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8013ef2: bf00 nop
8013ef4: 3710 adds r7, #16
8013ef6: 46bd mov sp, r7
8013ef8: bd80 pop {r7, pc}
8013efa: bf00 nop
8013efc: 240042ac .word 0x240042ac
8013f00: e000ed04 .word 0xe000ed04
08013f04 <vTaskStartScheduler>:
#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
/*-----------------------------------------------------------*/
void vTaskStartScheduler( void )
{
8013f04: b580 push {r7, lr}
8013f06: b08a sub sp, #40 @ 0x28
8013f08: af04 add r7, sp, #16
BaseType_t xReturn;
/* Add the idle task at the lowest priority. */
#if( configSUPPORT_STATIC_ALLOCATION == 1 )
{
StaticTask_t *pxIdleTaskTCBBuffer = NULL;
8013f0a: 2300 movs r3, #0
8013f0c: 60bb str r3, [r7, #8]
StackType_t *pxIdleTaskStackBuffer = NULL;
8013f0e: 2300 movs r3, #0
8013f10: 607b str r3, [r7, #4]
uint32_t ulIdleTaskStackSize;
/* The Idle task is created using user provided RAM - obtain the
address of the RAM then create the idle task. */
vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
8013f12: 463a mov r2, r7
8013f14: 1d39 adds r1, r7, #4
8013f16: f107 0308 add.w r3, r7, #8
8013f1a: 4618 mov r0, r3
8013f1c: f7fe f85c bl 8011fd8 <vApplicationGetIdleTaskMemory>
xIdleTaskHandle = xTaskCreateStatic( prvIdleTask,
8013f20: 6839 ldr r1, [r7, #0]
8013f22: 687b ldr r3, [r7, #4]
8013f24: 68ba ldr r2, [r7, #8]
8013f26: 9202 str r2, [sp, #8]
8013f28: 9301 str r3, [sp, #4]
8013f2a: 2300 movs r3, #0
8013f2c: 9300 str r3, [sp, #0]
8013f2e: 2300 movs r3, #0
8013f30: 460a mov r2, r1
8013f32: 4924 ldr r1, [pc, #144] @ (8013fc4 <vTaskStartScheduler+0xc0>)
8013f34: 4824 ldr r0, [pc, #144] @ (8013fc8 <vTaskStartScheduler+0xc4>)
8013f36: f7ff fdf1 bl 8013b1c <xTaskCreateStatic>
8013f3a: 4603 mov r3, r0
8013f3c: 4a23 ldr r2, [pc, #140] @ (8013fcc <vTaskStartScheduler+0xc8>)
8013f3e: 6013 str r3, [r2, #0]
( void * ) NULL, /*lint !e961. The cast is not redundant for all compilers. */
portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
pxIdleTaskStackBuffer,
pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
if( xIdleTaskHandle != NULL )
8013f40: 4b22 ldr r3, [pc, #136] @ (8013fcc <vTaskStartScheduler+0xc8>)
8013f42: 681b ldr r3, [r3, #0]
8013f44: 2b00 cmp r3, #0
8013f46: d002 beq.n 8013f4e <vTaskStartScheduler+0x4a>
{
xReturn = pdPASS;
8013f48: 2301 movs r3, #1
8013f4a: 617b str r3, [r7, #20]
8013f4c: e001 b.n 8013f52 <vTaskStartScheduler+0x4e>
}
else
{
xReturn = pdFAIL;
8013f4e: 2300 movs r3, #0
8013f50: 617b str r3, [r7, #20]
}
#endif /* configSUPPORT_STATIC_ALLOCATION */
#if ( configUSE_TIMERS == 1 )
{
if( xReturn == pdPASS )
8013f52: 697b ldr r3, [r7, #20]
8013f54: 2b01 cmp r3, #1
8013f56: d102 bne.n 8013f5e <vTaskStartScheduler+0x5a>
{
xReturn = xTimerCreateTimerTask();
8013f58: f001 f8a0 bl 801509c <xTimerCreateTimerTask>
8013f5c: 6178 str r0, [r7, #20]
mtCOVERAGE_TEST_MARKER();
}
}
#endif /* configUSE_TIMERS */
if( xReturn == pdPASS )
8013f5e: 697b ldr r3, [r7, #20]
8013f60: 2b01 cmp r3, #1
8013f62: d11b bne.n 8013f9c <vTaskStartScheduler+0x98>
__asm volatile
8013f64: f04f 0350 mov.w r3, #80 @ 0x50
8013f68: f383 8811 msr BASEPRI, r3
8013f6c: f3bf 8f6f isb sy
8013f70: f3bf 8f4f dsb sy
8013f74: 613b str r3, [r7, #16]
}
8013f76: bf00 nop
{
/* Switch Newlib's _impure_ptr variable to point to the _reent
structure specific to the task that will run first.
See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
for additional information. */
_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
8013f78: 4b15 ldr r3, [pc, #84] @ (8013fd0 <vTaskStartScheduler+0xcc>)
8013f7a: 681b ldr r3, [r3, #0]
8013f7c: 3354 adds r3, #84 @ 0x54
8013f7e: 4a15 ldr r2, [pc, #84] @ (8013fd4 <vTaskStartScheduler+0xd0>)
8013f80: 6013 str r3, [r2, #0]
}
#endif /* configUSE_NEWLIB_REENTRANT */
xNextTaskUnblockTime = portMAX_DELAY;
8013f82: 4b15 ldr r3, [pc, #84] @ (8013fd8 <vTaskStartScheduler+0xd4>)
8013f84: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
8013f88: 601a str r2, [r3, #0]
xSchedulerRunning = pdTRUE;
8013f8a: 4b14 ldr r3, [pc, #80] @ (8013fdc <vTaskStartScheduler+0xd8>)
8013f8c: 2201 movs r2, #1
8013f8e: 601a str r2, [r3, #0]
xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
8013f90: 4b13 ldr r3, [pc, #76] @ (8013fe0 <vTaskStartScheduler+0xdc>)
8013f92: 2200 movs r2, #0
8013f94: 601a str r2, [r3, #0]
traceTASK_SWITCHED_IN();
/* Setting up the timer tick is hardware specific and thus in the
portable interface. */
if( xPortStartScheduler() != pdFALSE )
8013f96: f001 fd53 bl 8015a40 <xPortStartScheduler>
}
/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
meaning xIdleTaskHandle is not used anywhere else. */
( void ) xIdleTaskHandle;
}
8013f9a: e00f b.n 8013fbc <vTaskStartScheduler+0xb8>
configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
8013f9c: 697b ldr r3, [r7, #20]
8013f9e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8013fa2: d10b bne.n 8013fbc <vTaskStartScheduler+0xb8>
__asm volatile
8013fa4: f04f 0350 mov.w r3, #80 @ 0x50
8013fa8: f383 8811 msr BASEPRI, r3
8013fac: f3bf 8f6f isb sy
8013fb0: f3bf 8f4f dsb sy
8013fb4: 60fb str r3, [r7, #12]
}
8013fb6: bf00 nop
8013fb8: bf00 nop
8013fba: e7fd b.n 8013fb8 <vTaskStartScheduler+0xb4>
}
8013fbc: bf00 nop
8013fbe: 3718 adds r7, #24
8013fc0: 46bd mov sp, r7
8013fc2: bd80 pop {r7, pc}
8013fc4: 0802ddb4 .word 0x0802ddb4
8013fc8: 080146a5 .word 0x080146a5
8013fcc: 240042a8 .word 0x240042a8
8013fd0: 24003db0 .word 0x24003db0
8013fd4: 240001d4 .word 0x240001d4
8013fd8: 240042a4 .word 0x240042a4
8013fdc: 24004290 .word 0x24004290
8013fe0: 24004288 .word 0x24004288
08013fe4 <vTaskSuspendAll>:
vPortEndScheduler();
}
/*----------------------------------------------------------*/
void vTaskSuspendAll( void )
{
8013fe4: b480 push {r7}
8013fe6: af00 add r7, sp, #0
do not otherwise exhibit real time behaviour. */
portSOFTWARE_BARRIER();
/* The scheduler is suspended if uxSchedulerSuspended is non-zero. An increment
is used to allow calls to vTaskSuspendAll() to nest. */
++uxSchedulerSuspended;
8013fe8: 4b04 ldr r3, [pc, #16] @ (8013ffc <vTaskSuspendAll+0x18>)
8013fea: 681b ldr r3, [r3, #0]
8013fec: 3301 adds r3, #1
8013fee: 4a03 ldr r2, [pc, #12] @ (8013ffc <vTaskSuspendAll+0x18>)
8013ff0: 6013 str r3, [r2, #0]
/* Enforces ordering for ports and optimised compilers that may otherwise place
the above increment elsewhere. */
portMEMORY_BARRIER();
}
8013ff2: bf00 nop
8013ff4: 46bd mov sp, r7
8013ff6: f85d 7b04 ldr.w r7, [sp], #4
8013ffa: 4770 bx lr
8013ffc: 240042ac .word 0x240042ac
08014000 <xTaskResumeAll>:
#endif /* configUSE_TICKLESS_IDLE */
/*----------------------------------------------------------*/
BaseType_t xTaskResumeAll( void )
{
8014000: b580 push {r7, lr}
8014002: b084 sub sp, #16
8014004: af00 add r7, sp, #0
TCB_t *pxTCB = NULL;
8014006: 2300 movs r3, #0
8014008: 60fb str r3, [r7, #12]
BaseType_t xAlreadyYielded = pdFALSE;
801400a: 2300 movs r3, #0
801400c: 60bb str r3, [r7, #8]
/* If uxSchedulerSuspended is zero then this function does not match a
previous call to vTaskSuspendAll(). */
configASSERT( uxSchedulerSuspended );
801400e: 4b42 ldr r3, [pc, #264] @ (8014118 <xTaskResumeAll+0x118>)
8014010: 681b ldr r3, [r3, #0]
8014012: 2b00 cmp r3, #0
8014014: d10b bne.n 801402e <xTaskResumeAll+0x2e>
__asm volatile
8014016: f04f 0350 mov.w r3, #80 @ 0x50
801401a: f383 8811 msr BASEPRI, r3
801401e: f3bf 8f6f isb sy
8014022: f3bf 8f4f dsb sy
8014026: 603b str r3, [r7, #0]
}
8014028: bf00 nop
801402a: bf00 nop
801402c: e7fd b.n 801402a <xTaskResumeAll+0x2a>
/* It is possible that an ISR caused a task to be removed from an event
list while the scheduler was suspended. If this was the case then the
removed task will have been added to the xPendingReadyList. Once the
scheduler has been resumed it is safe to move all the pending ready
tasks from this list into their appropriate ready list. */
taskENTER_CRITICAL();
801402e: f001 fdab bl 8015b88 <vPortEnterCritical>
{
--uxSchedulerSuspended;
8014032: 4b39 ldr r3, [pc, #228] @ (8014118 <xTaskResumeAll+0x118>)
8014034: 681b ldr r3, [r3, #0]
8014036: 3b01 subs r3, #1
8014038: 4a37 ldr r2, [pc, #220] @ (8014118 <xTaskResumeAll+0x118>)
801403a: 6013 str r3, [r2, #0]
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
801403c: 4b36 ldr r3, [pc, #216] @ (8014118 <xTaskResumeAll+0x118>)
801403e: 681b ldr r3, [r3, #0]
8014040: 2b00 cmp r3, #0
8014042: d162 bne.n 801410a <xTaskResumeAll+0x10a>
{
if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
8014044: 4b35 ldr r3, [pc, #212] @ (801411c <xTaskResumeAll+0x11c>)
8014046: 681b ldr r3, [r3, #0]
8014048: 2b00 cmp r3, #0
801404a: d05e beq.n 801410a <xTaskResumeAll+0x10a>
{
/* Move any readied tasks from the pending list into the
appropriate ready list. */
while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
801404c: e02f b.n 80140ae <xTaskResumeAll+0xae>
{
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
801404e: 4b34 ldr r3, [pc, #208] @ (8014120 <xTaskResumeAll+0x120>)
8014050: 68db ldr r3, [r3, #12]
8014052: 68db ldr r3, [r3, #12]
8014054: 60fb str r3, [r7, #12]
( void ) uxListRemove( &( pxTCB->xEventListItem ) );
8014056: 68fb ldr r3, [r7, #12]
8014058: 3318 adds r3, #24
801405a: 4618 mov r0, r3
801405c: f7fe f87a bl 8012154 <uxListRemove>
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
8014060: 68fb ldr r3, [r7, #12]
8014062: 3304 adds r3, #4
8014064: 4618 mov r0, r3
8014066: f7fe f875 bl 8012154 <uxListRemove>
prvAddTaskToReadyList( pxTCB );
801406a: 68fb ldr r3, [r7, #12]
801406c: 6ada ldr r2, [r3, #44] @ 0x2c
801406e: 4b2d ldr r3, [pc, #180] @ (8014124 <xTaskResumeAll+0x124>)
8014070: 681b ldr r3, [r3, #0]
8014072: 429a cmp r2, r3
8014074: d903 bls.n 801407e <xTaskResumeAll+0x7e>
8014076: 68fb ldr r3, [r7, #12]
8014078: 6adb ldr r3, [r3, #44] @ 0x2c
801407a: 4a2a ldr r2, [pc, #168] @ (8014124 <xTaskResumeAll+0x124>)
801407c: 6013 str r3, [r2, #0]
801407e: 68fb ldr r3, [r7, #12]
8014080: 6ada ldr r2, [r3, #44] @ 0x2c
8014082: 4613 mov r3, r2
8014084: 009b lsls r3, r3, #2
8014086: 4413 add r3, r2
8014088: 009b lsls r3, r3, #2
801408a: 4a27 ldr r2, [pc, #156] @ (8014128 <xTaskResumeAll+0x128>)
801408c: 441a add r2, r3
801408e: 68fb ldr r3, [r7, #12]
8014090: 3304 adds r3, #4
8014092: 4619 mov r1, r3
8014094: 4610 mov r0, r2
8014096: f7fe f800 bl 801209a <vListInsertEnd>
/* If the moved task has a priority higher than the current
task then a yield must be performed. */
if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
801409a: 68fb ldr r3, [r7, #12]
801409c: 6ada ldr r2, [r3, #44] @ 0x2c
801409e: 4b23 ldr r3, [pc, #140] @ (801412c <xTaskResumeAll+0x12c>)
80140a0: 681b ldr r3, [r3, #0]
80140a2: 6adb ldr r3, [r3, #44] @ 0x2c
80140a4: 429a cmp r2, r3
80140a6: d302 bcc.n 80140ae <xTaskResumeAll+0xae>
{
xYieldPending = pdTRUE;
80140a8: 4b21 ldr r3, [pc, #132] @ (8014130 <xTaskResumeAll+0x130>)
80140aa: 2201 movs r2, #1
80140ac: 601a str r2, [r3, #0]
while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
80140ae: 4b1c ldr r3, [pc, #112] @ (8014120 <xTaskResumeAll+0x120>)
80140b0: 681b ldr r3, [r3, #0]
80140b2: 2b00 cmp r3, #0
80140b4: d1cb bne.n 801404e <xTaskResumeAll+0x4e>
{
mtCOVERAGE_TEST_MARKER();
}
}
if( pxTCB != NULL )
80140b6: 68fb ldr r3, [r7, #12]
80140b8: 2b00 cmp r3, #0
80140ba: d001 beq.n 80140c0 <xTaskResumeAll+0xc0>
which may have prevented the next unblock time from being
re-calculated, in which case re-calculate it now. Mainly
important for low power tickless implementations, where
this can prevent an unnecessary exit from low power
state. */
prvResetNextTaskUnblockTime();
80140bc: f000 fbae bl 801481c <prvResetNextTaskUnblockTime>
/* If any ticks occurred while the scheduler was suspended then
they should be processed now. This ensures the tick count does
not slip, and that any delayed tasks are resumed at the correct
time. */
{
TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
80140c0: 4b1c ldr r3, [pc, #112] @ (8014134 <xTaskResumeAll+0x134>)
80140c2: 681b ldr r3, [r3, #0]
80140c4: 607b str r3, [r7, #4]
if( xPendedCounts > ( TickType_t ) 0U )
80140c6: 687b ldr r3, [r7, #4]
80140c8: 2b00 cmp r3, #0
80140ca: d010 beq.n 80140ee <xTaskResumeAll+0xee>
{
do
{
if( xTaskIncrementTick() != pdFALSE )
80140cc: f000 f858 bl 8014180 <xTaskIncrementTick>
80140d0: 4603 mov r3, r0
80140d2: 2b00 cmp r3, #0
80140d4: d002 beq.n 80140dc <xTaskResumeAll+0xdc>
{
xYieldPending = pdTRUE;
80140d6: 4b16 ldr r3, [pc, #88] @ (8014130 <xTaskResumeAll+0x130>)
80140d8: 2201 movs r2, #1
80140da: 601a str r2, [r3, #0]
}
else
{
mtCOVERAGE_TEST_MARKER();
}
--xPendedCounts;
80140dc: 687b ldr r3, [r7, #4]
80140de: 3b01 subs r3, #1
80140e0: 607b str r3, [r7, #4]
} while( xPendedCounts > ( TickType_t ) 0U );
80140e2: 687b ldr r3, [r7, #4]
80140e4: 2b00 cmp r3, #0
80140e6: d1f1 bne.n 80140cc <xTaskResumeAll+0xcc>
xPendedTicks = 0;
80140e8: 4b12 ldr r3, [pc, #72] @ (8014134 <xTaskResumeAll+0x134>)
80140ea: 2200 movs r2, #0
80140ec: 601a str r2, [r3, #0]
{
mtCOVERAGE_TEST_MARKER();
}
}
if( xYieldPending != pdFALSE )
80140ee: 4b10 ldr r3, [pc, #64] @ (8014130 <xTaskResumeAll+0x130>)
80140f0: 681b ldr r3, [r3, #0]
80140f2: 2b00 cmp r3, #0
80140f4: d009 beq.n 801410a <xTaskResumeAll+0x10a>
{
#if( configUSE_PREEMPTION != 0 )
{
xAlreadyYielded = pdTRUE;
80140f6: 2301 movs r3, #1
80140f8: 60bb str r3, [r7, #8]
}
#endif
taskYIELD_IF_USING_PREEMPTION();
80140fa: 4b0f ldr r3, [pc, #60] @ (8014138 <xTaskResumeAll+0x138>)
80140fc: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8014100: 601a str r2, [r3, #0]
8014102: f3bf 8f4f dsb sy
8014106: f3bf 8f6f isb sy
else
{
mtCOVERAGE_TEST_MARKER();
}
}
taskEXIT_CRITICAL();
801410a: f001 fd6f bl 8015bec <vPortExitCritical>
return xAlreadyYielded;
801410e: 68bb ldr r3, [r7, #8]
}
8014110: 4618 mov r0, r3
8014112: 3710 adds r7, #16
8014114: 46bd mov sp, r7
8014116: bd80 pop {r7, pc}
8014118: 240042ac .word 0x240042ac
801411c: 24004284 .word 0x24004284
8014120: 24004244 .word 0x24004244
8014124: 2400428c .word 0x2400428c
8014128: 24003db4 .word 0x24003db4
801412c: 24003db0 .word 0x24003db0
8014130: 24004298 .word 0x24004298
8014134: 24004294 .word 0x24004294
8014138: e000ed04 .word 0xe000ed04
0801413c <xTaskGetTickCount>:
/*-----------------------------------------------------------*/
TickType_t xTaskGetTickCount( void )
{
801413c: b480 push {r7}
801413e: b083 sub sp, #12
8014140: af00 add r7, sp, #0
TickType_t xTicks;
/* Critical section required if running on a 16 bit processor. */
portTICK_TYPE_ENTER_CRITICAL();
{
xTicks = xTickCount;
8014142: 4b05 ldr r3, [pc, #20] @ (8014158 <xTaskGetTickCount+0x1c>)
8014144: 681b ldr r3, [r3, #0]
8014146: 607b str r3, [r7, #4]
}
portTICK_TYPE_EXIT_CRITICAL();
return xTicks;
8014148: 687b ldr r3, [r7, #4]
}
801414a: 4618 mov r0, r3
801414c: 370c adds r7, #12
801414e: 46bd mov sp, r7
8014150: f85d 7b04 ldr.w r7, [sp], #4
8014154: 4770 bx lr
8014156: bf00 nop
8014158: 24004288 .word 0x24004288
0801415c <xTaskGetTickCountFromISR>:
/*-----------------------------------------------------------*/
TickType_t xTaskGetTickCountFromISR( void )
{
801415c: b580 push {r7, lr}
801415e: b082 sub sp, #8
8014160: af00 add r7, sp, #0
that have been assigned a priority at or (logically) below the maximum
system call interrupt priority. FreeRTOS maintains a separate interrupt
safe API to ensure interrupt entry is as fast and as simple as possible.
More information (albeit Cortex-M specific) is provided on the following
link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
8014162: f001 fdf1 bl 8015d48 <vPortValidateInterruptPriority>
uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
8014166: 2300 movs r3, #0
8014168: 607b str r3, [r7, #4]
{
xReturn = xTickCount;
801416a: 4b04 ldr r3, [pc, #16] @ (801417c <xTaskGetTickCountFromISR+0x20>)
801416c: 681b ldr r3, [r3, #0]
801416e: 603b str r3, [r7, #0]
}
portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn;
8014170: 683b ldr r3, [r7, #0]
}
8014172: 4618 mov r0, r3
8014174: 3708 adds r7, #8
8014176: 46bd mov sp, r7
8014178: bd80 pop {r7, pc}
801417a: bf00 nop
801417c: 24004288 .word 0x24004288
08014180 <xTaskIncrementTick>:
#endif /* INCLUDE_xTaskAbortDelay */
/*----------------------------------------------------------*/
BaseType_t xTaskIncrementTick( void )
{
8014180: b580 push {r7, lr}
8014182: b086 sub sp, #24
8014184: af00 add r7, sp, #0
TCB_t * pxTCB;
TickType_t xItemValue;
BaseType_t xSwitchRequired = pdFALSE;
8014186: 2300 movs r3, #0
8014188: 617b str r3, [r7, #20]
/* Called by the portable layer each time a tick interrupt occurs.
Increments the tick then checks to see if the new tick value will cause any
tasks to be unblocked. */
traceTASK_INCREMENT_TICK( xTickCount );
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
801418a: 4b4f ldr r3, [pc, #316] @ (80142c8 <xTaskIncrementTick+0x148>)
801418c: 681b ldr r3, [r3, #0]
801418e: 2b00 cmp r3, #0
8014190: f040 8090 bne.w 80142b4 <xTaskIncrementTick+0x134>
{
/* Minor optimisation. The tick count cannot change in this
block. */
const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
8014194: 4b4d ldr r3, [pc, #308] @ (80142cc <xTaskIncrementTick+0x14c>)
8014196: 681b ldr r3, [r3, #0]
8014198: 3301 adds r3, #1
801419a: 613b str r3, [r7, #16]
/* Increment the RTOS tick, switching the delayed and overflowed
delayed lists if it wraps to 0. */
xTickCount = xConstTickCount;
801419c: 4a4b ldr r2, [pc, #300] @ (80142cc <xTaskIncrementTick+0x14c>)
801419e: 693b ldr r3, [r7, #16]
80141a0: 6013 str r3, [r2, #0]
if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
80141a2: 693b ldr r3, [r7, #16]
80141a4: 2b00 cmp r3, #0
80141a6: d121 bne.n 80141ec <xTaskIncrementTick+0x6c>
{
taskSWITCH_DELAYED_LISTS();
80141a8: 4b49 ldr r3, [pc, #292] @ (80142d0 <xTaskIncrementTick+0x150>)
80141aa: 681b ldr r3, [r3, #0]
80141ac: 681b ldr r3, [r3, #0]
80141ae: 2b00 cmp r3, #0
80141b0: d00b beq.n 80141ca <xTaskIncrementTick+0x4a>
__asm volatile
80141b2: f04f 0350 mov.w r3, #80 @ 0x50
80141b6: f383 8811 msr BASEPRI, r3
80141ba: f3bf 8f6f isb sy
80141be: f3bf 8f4f dsb sy
80141c2: 603b str r3, [r7, #0]
}
80141c4: bf00 nop
80141c6: bf00 nop
80141c8: e7fd b.n 80141c6 <xTaskIncrementTick+0x46>
80141ca: 4b41 ldr r3, [pc, #260] @ (80142d0 <xTaskIncrementTick+0x150>)
80141cc: 681b ldr r3, [r3, #0]
80141ce: 60fb str r3, [r7, #12]
80141d0: 4b40 ldr r3, [pc, #256] @ (80142d4 <xTaskIncrementTick+0x154>)
80141d2: 681b ldr r3, [r3, #0]
80141d4: 4a3e ldr r2, [pc, #248] @ (80142d0 <xTaskIncrementTick+0x150>)
80141d6: 6013 str r3, [r2, #0]
80141d8: 4a3e ldr r2, [pc, #248] @ (80142d4 <xTaskIncrementTick+0x154>)
80141da: 68fb ldr r3, [r7, #12]
80141dc: 6013 str r3, [r2, #0]
80141de: 4b3e ldr r3, [pc, #248] @ (80142d8 <xTaskIncrementTick+0x158>)
80141e0: 681b ldr r3, [r3, #0]
80141e2: 3301 adds r3, #1
80141e4: 4a3c ldr r2, [pc, #240] @ (80142d8 <xTaskIncrementTick+0x158>)
80141e6: 6013 str r3, [r2, #0]
80141e8: f000 fb18 bl 801481c <prvResetNextTaskUnblockTime>
/* See if this tick has made a timeout expire. Tasks are stored in
the queue in the order of their wake time - meaning once one task
has been found whose block time has not expired there is no need to
look any further down the list. */
if( xConstTickCount >= xNextTaskUnblockTime )
80141ec: 4b3b ldr r3, [pc, #236] @ (80142dc <xTaskIncrementTick+0x15c>)
80141ee: 681b ldr r3, [r3, #0]
80141f0: 693a ldr r2, [r7, #16]
80141f2: 429a cmp r2, r3
80141f4: d349 bcc.n 801428a <xTaskIncrementTick+0x10a>
{
for( ;; )
{
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
80141f6: 4b36 ldr r3, [pc, #216] @ (80142d0 <xTaskIncrementTick+0x150>)
80141f8: 681b ldr r3, [r3, #0]
80141fa: 681b ldr r3, [r3, #0]
80141fc: 2b00 cmp r3, #0
80141fe: d104 bne.n 801420a <xTaskIncrementTick+0x8a>
/* The delayed list is empty. Set xNextTaskUnblockTime
to the maximum possible value so it is extremely
unlikely that the
if( xTickCount >= xNextTaskUnblockTime ) test will pass
next time through. */
xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
8014200: 4b36 ldr r3, [pc, #216] @ (80142dc <xTaskIncrementTick+0x15c>)
8014202: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
8014206: 601a str r2, [r3, #0]
break;
8014208: e03f b.n 801428a <xTaskIncrementTick+0x10a>
{
/* The delayed list is not empty, get the value of the
item at the head of the delayed list. This is the time
at which the task at the head of the delayed list must
be removed from the Blocked state. */
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
801420a: 4b31 ldr r3, [pc, #196] @ (80142d0 <xTaskIncrementTick+0x150>)
801420c: 681b ldr r3, [r3, #0]
801420e: 68db ldr r3, [r3, #12]
8014210: 68db ldr r3, [r3, #12]
8014212: 60bb str r3, [r7, #8]
xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
8014214: 68bb ldr r3, [r7, #8]
8014216: 685b ldr r3, [r3, #4]
8014218: 607b str r3, [r7, #4]
if( xConstTickCount < xItemValue )
801421a: 693a ldr r2, [r7, #16]
801421c: 687b ldr r3, [r7, #4]
801421e: 429a cmp r2, r3
8014220: d203 bcs.n 801422a <xTaskIncrementTick+0xaa>
/* It is not time to unblock this item yet, but the
item value is the time at which the task at the head
of the blocked list must be removed from the Blocked
state - so record the item value in
xNextTaskUnblockTime. */
xNextTaskUnblockTime = xItemValue;
8014222: 4a2e ldr r2, [pc, #184] @ (80142dc <xTaskIncrementTick+0x15c>)
8014224: 687b ldr r3, [r7, #4]
8014226: 6013 str r3, [r2, #0]
break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
8014228: e02f b.n 801428a <xTaskIncrementTick+0x10a>
{
mtCOVERAGE_TEST_MARKER();
}
/* It is time to remove the item from the Blocked state. */
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
801422a: 68bb ldr r3, [r7, #8]
801422c: 3304 adds r3, #4
801422e: 4618 mov r0, r3
8014230: f7fd ff90 bl 8012154 <uxListRemove>
/* Is the task waiting on an event also? If so remove
it from the event list. */
if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
8014234: 68bb ldr r3, [r7, #8]
8014236: 6a9b ldr r3, [r3, #40] @ 0x28
8014238: 2b00 cmp r3, #0
801423a: d004 beq.n 8014246 <xTaskIncrementTick+0xc6>
{
( void ) uxListRemove( &( pxTCB->xEventListItem ) );
801423c: 68bb ldr r3, [r7, #8]
801423e: 3318 adds r3, #24
8014240: 4618 mov r0, r3
8014242: f7fd ff87 bl 8012154 <uxListRemove>
mtCOVERAGE_TEST_MARKER();
}
/* Place the unblocked task into the appropriate ready
list. */
prvAddTaskToReadyList( pxTCB );
8014246: 68bb ldr r3, [r7, #8]
8014248: 6ada ldr r2, [r3, #44] @ 0x2c
801424a: 4b25 ldr r3, [pc, #148] @ (80142e0 <xTaskIncrementTick+0x160>)
801424c: 681b ldr r3, [r3, #0]
801424e: 429a cmp r2, r3
8014250: d903 bls.n 801425a <xTaskIncrementTick+0xda>
8014252: 68bb ldr r3, [r7, #8]
8014254: 6adb ldr r3, [r3, #44] @ 0x2c
8014256: 4a22 ldr r2, [pc, #136] @ (80142e0 <xTaskIncrementTick+0x160>)
8014258: 6013 str r3, [r2, #0]
801425a: 68bb ldr r3, [r7, #8]
801425c: 6ada ldr r2, [r3, #44] @ 0x2c
801425e: 4613 mov r3, r2
8014260: 009b lsls r3, r3, #2
8014262: 4413 add r3, r2
8014264: 009b lsls r3, r3, #2
8014266: 4a1f ldr r2, [pc, #124] @ (80142e4 <xTaskIncrementTick+0x164>)
8014268: 441a add r2, r3
801426a: 68bb ldr r3, [r7, #8]
801426c: 3304 adds r3, #4
801426e: 4619 mov r1, r3
8014270: 4610 mov r0, r2
8014272: f7fd ff12 bl 801209a <vListInsertEnd>
{
/* Preemption is on, but a context switch should
only be performed if the unblocked task has a
priority that is equal to or higher than the
currently executing task. */
if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
8014276: 68bb ldr r3, [r7, #8]
8014278: 6ada ldr r2, [r3, #44] @ 0x2c
801427a: 4b1b ldr r3, [pc, #108] @ (80142e8 <xTaskIncrementTick+0x168>)
801427c: 681b ldr r3, [r3, #0]
801427e: 6adb ldr r3, [r3, #44] @ 0x2c
8014280: 429a cmp r2, r3
8014282: d3b8 bcc.n 80141f6 <xTaskIncrementTick+0x76>
{
xSwitchRequired = pdTRUE;
8014284: 2301 movs r3, #1
8014286: 617b str r3, [r7, #20]
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
8014288: e7b5 b.n 80141f6 <xTaskIncrementTick+0x76>
/* Tasks of equal priority to the currently running task will share
processing time (time slice) if preemption is on, and the application
writer has not explicitly turned time slicing off. */
#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
{
if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
801428a: 4b17 ldr r3, [pc, #92] @ (80142e8 <xTaskIncrementTick+0x168>)
801428c: 681b ldr r3, [r3, #0]
801428e: 6ada ldr r2, [r3, #44] @ 0x2c
8014290: 4914 ldr r1, [pc, #80] @ (80142e4 <xTaskIncrementTick+0x164>)
8014292: 4613 mov r3, r2
8014294: 009b lsls r3, r3, #2
8014296: 4413 add r3, r2
8014298: 009b lsls r3, r3, #2
801429a: 440b add r3, r1
801429c: 681b ldr r3, [r3, #0]
801429e: 2b01 cmp r3, #1
80142a0: d901 bls.n 80142a6 <xTaskIncrementTick+0x126>
{
xSwitchRequired = pdTRUE;
80142a2: 2301 movs r3, #1
80142a4: 617b str r3, [r7, #20]
}
#endif /* configUSE_TICK_HOOK */
#if ( configUSE_PREEMPTION == 1 )
{
if( xYieldPending != pdFALSE )
80142a6: 4b11 ldr r3, [pc, #68] @ (80142ec <xTaskIncrementTick+0x16c>)
80142a8: 681b ldr r3, [r3, #0]
80142aa: 2b00 cmp r3, #0
80142ac: d007 beq.n 80142be <xTaskIncrementTick+0x13e>
{
xSwitchRequired = pdTRUE;
80142ae: 2301 movs r3, #1
80142b0: 617b str r3, [r7, #20]
80142b2: e004 b.n 80142be <xTaskIncrementTick+0x13e>
}
#endif /* configUSE_PREEMPTION */
}
else
{
++xPendedTicks;
80142b4: 4b0e ldr r3, [pc, #56] @ (80142f0 <xTaskIncrementTick+0x170>)
80142b6: 681b ldr r3, [r3, #0]
80142b8: 3301 adds r3, #1
80142ba: 4a0d ldr r2, [pc, #52] @ (80142f0 <xTaskIncrementTick+0x170>)
80142bc: 6013 str r3, [r2, #0]
vApplicationTickHook();
}
#endif
}
return xSwitchRequired;
80142be: 697b ldr r3, [r7, #20]
}
80142c0: 4618 mov r0, r3
80142c2: 3718 adds r7, #24
80142c4: 46bd mov sp, r7
80142c6: bd80 pop {r7, pc}
80142c8: 240042ac .word 0x240042ac
80142cc: 24004288 .word 0x24004288
80142d0: 2400423c .word 0x2400423c
80142d4: 24004240 .word 0x24004240
80142d8: 2400429c .word 0x2400429c
80142dc: 240042a4 .word 0x240042a4
80142e0: 2400428c .word 0x2400428c
80142e4: 24003db4 .word 0x24003db4
80142e8: 24003db0 .word 0x24003db0
80142ec: 24004298 .word 0x24004298
80142f0: 24004294 .word 0x24004294
080142f4 <vTaskSwitchContext>:
#endif /* configUSE_APPLICATION_TASK_TAG */
/*-----------------------------------------------------------*/
void vTaskSwitchContext( void )
{
80142f4: b580 push {r7, lr}
80142f6: b084 sub sp, #16
80142f8: af00 add r7, sp, #0
if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
80142fa: 4b32 ldr r3, [pc, #200] @ (80143c4 <vTaskSwitchContext+0xd0>)
80142fc: 681b ldr r3, [r3, #0]
80142fe: 2b00 cmp r3, #0
8014300: d003 beq.n 801430a <vTaskSwitchContext+0x16>
{
/* The scheduler is currently suspended - do not allow a context
switch. */
xYieldPending = pdTRUE;
8014302: 4b31 ldr r3, [pc, #196] @ (80143c8 <vTaskSwitchContext+0xd4>)
8014304: 2201 movs r2, #1
8014306: 601a str r2, [r3, #0]
for additional information. */
_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
}
#endif /* configUSE_NEWLIB_REENTRANT */
}
}
8014308: e058 b.n 80143bc <vTaskSwitchContext+0xc8>
xYieldPending = pdFALSE;
801430a: 4b2f ldr r3, [pc, #188] @ (80143c8 <vTaskSwitchContext+0xd4>)
801430c: 2200 movs r2, #0
801430e: 601a str r2, [r3, #0]
taskCHECK_FOR_STACK_OVERFLOW();
8014310: 4b2e ldr r3, [pc, #184] @ (80143cc <vTaskSwitchContext+0xd8>)
8014312: 681b ldr r3, [r3, #0]
8014314: 681a ldr r2, [r3, #0]
8014316: 4b2d ldr r3, [pc, #180] @ (80143cc <vTaskSwitchContext+0xd8>)
8014318: 681b ldr r3, [r3, #0]
801431a: 6b1b ldr r3, [r3, #48] @ 0x30
801431c: 429a cmp r2, r3
801431e: d808 bhi.n 8014332 <vTaskSwitchContext+0x3e>
8014320: 4b2a ldr r3, [pc, #168] @ (80143cc <vTaskSwitchContext+0xd8>)
8014322: 681a ldr r2, [r3, #0]
8014324: 4b29 ldr r3, [pc, #164] @ (80143cc <vTaskSwitchContext+0xd8>)
8014326: 681b ldr r3, [r3, #0]
8014328: 3334 adds r3, #52 @ 0x34
801432a: 4619 mov r1, r3
801432c: 4610 mov r0, r2
801432e: f7ed fcb8 bl 8001ca2 <vApplicationStackOverflowHook>
taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8014332: 4b27 ldr r3, [pc, #156] @ (80143d0 <vTaskSwitchContext+0xdc>)
8014334: 681b ldr r3, [r3, #0]
8014336: 60fb str r3, [r7, #12]
8014338: e011 b.n 801435e <vTaskSwitchContext+0x6a>
801433a: 68fb ldr r3, [r7, #12]
801433c: 2b00 cmp r3, #0
801433e: d10b bne.n 8014358 <vTaskSwitchContext+0x64>
__asm volatile
8014340: f04f 0350 mov.w r3, #80 @ 0x50
8014344: f383 8811 msr BASEPRI, r3
8014348: f3bf 8f6f isb sy
801434c: f3bf 8f4f dsb sy
8014350: 607b str r3, [r7, #4]
}
8014352: bf00 nop
8014354: bf00 nop
8014356: e7fd b.n 8014354 <vTaskSwitchContext+0x60>
8014358: 68fb ldr r3, [r7, #12]
801435a: 3b01 subs r3, #1
801435c: 60fb str r3, [r7, #12]
801435e: 491d ldr r1, [pc, #116] @ (80143d4 <vTaskSwitchContext+0xe0>)
8014360: 68fa ldr r2, [r7, #12]
8014362: 4613 mov r3, r2
8014364: 009b lsls r3, r3, #2
8014366: 4413 add r3, r2
8014368: 009b lsls r3, r3, #2
801436a: 440b add r3, r1
801436c: 681b ldr r3, [r3, #0]
801436e: 2b00 cmp r3, #0
8014370: d0e3 beq.n 801433a <vTaskSwitchContext+0x46>
8014372: 68fa ldr r2, [r7, #12]
8014374: 4613 mov r3, r2
8014376: 009b lsls r3, r3, #2
8014378: 4413 add r3, r2
801437a: 009b lsls r3, r3, #2
801437c: 4a15 ldr r2, [pc, #84] @ (80143d4 <vTaskSwitchContext+0xe0>)
801437e: 4413 add r3, r2
8014380: 60bb str r3, [r7, #8]
8014382: 68bb ldr r3, [r7, #8]
8014384: 685b ldr r3, [r3, #4]
8014386: 685a ldr r2, [r3, #4]
8014388: 68bb ldr r3, [r7, #8]
801438a: 605a str r2, [r3, #4]
801438c: 68bb ldr r3, [r7, #8]
801438e: 685a ldr r2, [r3, #4]
8014390: 68bb ldr r3, [r7, #8]
8014392: 3308 adds r3, #8
8014394: 429a cmp r2, r3
8014396: d104 bne.n 80143a2 <vTaskSwitchContext+0xae>
8014398: 68bb ldr r3, [r7, #8]
801439a: 685b ldr r3, [r3, #4]
801439c: 685a ldr r2, [r3, #4]
801439e: 68bb ldr r3, [r7, #8]
80143a0: 605a str r2, [r3, #4]
80143a2: 68bb ldr r3, [r7, #8]
80143a4: 685b ldr r3, [r3, #4]
80143a6: 68db ldr r3, [r3, #12]
80143a8: 4a08 ldr r2, [pc, #32] @ (80143cc <vTaskSwitchContext+0xd8>)
80143aa: 6013 str r3, [r2, #0]
80143ac: 4a08 ldr r2, [pc, #32] @ (80143d0 <vTaskSwitchContext+0xdc>)
80143ae: 68fb ldr r3, [r7, #12]
80143b0: 6013 str r3, [r2, #0]
_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
80143b2: 4b06 ldr r3, [pc, #24] @ (80143cc <vTaskSwitchContext+0xd8>)
80143b4: 681b ldr r3, [r3, #0]
80143b6: 3354 adds r3, #84 @ 0x54
80143b8: 4a07 ldr r2, [pc, #28] @ (80143d8 <vTaskSwitchContext+0xe4>)
80143ba: 6013 str r3, [r2, #0]
}
80143bc: bf00 nop
80143be: 3710 adds r7, #16
80143c0: 46bd mov sp, r7
80143c2: bd80 pop {r7, pc}
80143c4: 240042ac .word 0x240042ac
80143c8: 24004298 .word 0x24004298
80143cc: 24003db0 .word 0x24003db0
80143d0: 2400428c .word 0x2400428c
80143d4: 24003db4 .word 0x24003db4
80143d8: 240001d4 .word 0x240001d4
080143dc <vTaskPlaceOnEventList>:
/*-----------------------------------------------------------*/
void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
{
80143dc: b580 push {r7, lr}
80143de: b084 sub sp, #16
80143e0: af00 add r7, sp, #0
80143e2: 6078 str r0, [r7, #4]
80143e4: 6039 str r1, [r7, #0]
configASSERT( pxEventList );
80143e6: 687b ldr r3, [r7, #4]
80143e8: 2b00 cmp r3, #0
80143ea: d10b bne.n 8014404 <vTaskPlaceOnEventList+0x28>
__asm volatile
80143ec: f04f 0350 mov.w r3, #80 @ 0x50
80143f0: f383 8811 msr BASEPRI, r3
80143f4: f3bf 8f6f isb sy
80143f8: f3bf 8f4f dsb sy
80143fc: 60fb str r3, [r7, #12]
}
80143fe: bf00 nop
8014400: bf00 nop
8014402: e7fd b.n 8014400 <vTaskPlaceOnEventList+0x24>
/* Place the event list item of the TCB in the appropriate event list.
This is placed in the list in priority order so the highest priority task
is the first to be woken by the event. The queue that contains the event
list is locked, preventing simultaneous access from interrupts. */
vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
8014404: 4b07 ldr r3, [pc, #28] @ (8014424 <vTaskPlaceOnEventList+0x48>)
8014406: 681b ldr r3, [r3, #0]
8014408: 3318 adds r3, #24
801440a: 4619 mov r1, r3
801440c: 6878 ldr r0, [r7, #4]
801440e: f7fd fe68 bl 80120e2 <vListInsert>
prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
8014412: 2101 movs r1, #1
8014414: 6838 ldr r0, [r7, #0]
8014416: f000 fded bl 8014ff4 <prvAddCurrentTaskToDelayedList>
}
801441a: bf00 nop
801441c: 3710 adds r7, #16
801441e: 46bd mov sp, r7
8014420: bd80 pop {r7, pc}
8014422: bf00 nop
8014424: 24003db0 .word 0x24003db0
08014428 <vTaskPlaceOnEventListRestricted>:
/*-----------------------------------------------------------*/
#if( configUSE_TIMERS == 1 )
void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
{
8014428: b580 push {r7, lr}
801442a: b086 sub sp, #24
801442c: af00 add r7, sp, #0
801442e: 60f8 str r0, [r7, #12]
8014430: 60b9 str r1, [r7, #8]
8014432: 607a str r2, [r7, #4]
configASSERT( pxEventList );
8014434: 68fb ldr r3, [r7, #12]
8014436: 2b00 cmp r3, #0
8014438: d10b bne.n 8014452 <vTaskPlaceOnEventListRestricted+0x2a>
__asm volatile
801443a: f04f 0350 mov.w r3, #80 @ 0x50
801443e: f383 8811 msr BASEPRI, r3
8014442: f3bf 8f6f isb sy
8014446: f3bf 8f4f dsb sy
801444a: 617b str r3, [r7, #20]
}
801444c: bf00 nop
801444e: bf00 nop
8014450: e7fd b.n 801444e <vTaskPlaceOnEventListRestricted+0x26>
/* Place the event list item of the TCB in the appropriate event list.
In this case it is assume that this is the only task that is going to
be waiting on this event list, so the faster vListInsertEnd() function
can be used in place of vListInsert. */
vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
8014452: 4b0a ldr r3, [pc, #40] @ (801447c <vTaskPlaceOnEventListRestricted+0x54>)
8014454: 681b ldr r3, [r3, #0]
8014456: 3318 adds r3, #24
8014458: 4619 mov r1, r3
801445a: 68f8 ldr r0, [r7, #12]
801445c: f7fd fe1d bl 801209a <vListInsertEnd>
/* If the task should block indefinitely then set the block time to a
value that will be recognised as an indefinite delay inside the
prvAddCurrentTaskToDelayedList() function. */
if( xWaitIndefinitely != pdFALSE )
8014460: 687b ldr r3, [r7, #4]
8014462: 2b00 cmp r3, #0
8014464: d002 beq.n 801446c <vTaskPlaceOnEventListRestricted+0x44>
{
xTicksToWait = portMAX_DELAY;
8014466: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
801446a: 60bb str r3, [r7, #8]
}
traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
801446c: 6879 ldr r1, [r7, #4]
801446e: 68b8 ldr r0, [r7, #8]
8014470: f000 fdc0 bl 8014ff4 <prvAddCurrentTaskToDelayedList>
}
8014474: bf00 nop
8014476: 3718 adds r7, #24
8014478: 46bd mov sp, r7
801447a: bd80 pop {r7, pc}
801447c: 24003db0 .word 0x24003db0
08014480 <xTaskRemoveFromEventList>:
#endif /* configUSE_TIMERS */
/*-----------------------------------------------------------*/
BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
{
8014480: b580 push {r7, lr}
8014482: b086 sub sp, #24
8014484: af00 add r7, sp, #0
8014486: 6078 str r0, [r7, #4]
get called - the lock count on the queue will get modified instead. This
means exclusive access to the event list is guaranteed here.
This function assumes that a check has already been made to ensure that
pxEventList is not empty. */
pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8014488: 687b ldr r3, [r7, #4]
801448a: 68db ldr r3, [r3, #12]
801448c: 68db ldr r3, [r3, #12]
801448e: 613b str r3, [r7, #16]
configASSERT( pxUnblockedTCB );
8014490: 693b ldr r3, [r7, #16]
8014492: 2b00 cmp r3, #0
8014494: d10b bne.n 80144ae <xTaskRemoveFromEventList+0x2e>
__asm volatile
8014496: f04f 0350 mov.w r3, #80 @ 0x50
801449a: f383 8811 msr BASEPRI, r3
801449e: f3bf 8f6f isb sy
80144a2: f3bf 8f4f dsb sy
80144a6: 60fb str r3, [r7, #12]
}
80144a8: bf00 nop
80144aa: bf00 nop
80144ac: e7fd b.n 80144aa <xTaskRemoveFromEventList+0x2a>
( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
80144ae: 693b ldr r3, [r7, #16]
80144b0: 3318 adds r3, #24
80144b2: 4618 mov r0, r3
80144b4: f7fd fe4e bl 8012154 <uxListRemove>
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
80144b8: 4b1d ldr r3, [pc, #116] @ (8014530 <xTaskRemoveFromEventList+0xb0>)
80144ba: 681b ldr r3, [r3, #0]
80144bc: 2b00 cmp r3, #0
80144be: d11d bne.n 80144fc <xTaskRemoveFromEventList+0x7c>
{
( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
80144c0: 693b ldr r3, [r7, #16]
80144c2: 3304 adds r3, #4
80144c4: 4618 mov r0, r3
80144c6: f7fd fe45 bl 8012154 <uxListRemove>
prvAddTaskToReadyList( pxUnblockedTCB );
80144ca: 693b ldr r3, [r7, #16]
80144cc: 6ada ldr r2, [r3, #44] @ 0x2c
80144ce: 4b19 ldr r3, [pc, #100] @ (8014534 <xTaskRemoveFromEventList+0xb4>)
80144d0: 681b ldr r3, [r3, #0]
80144d2: 429a cmp r2, r3
80144d4: d903 bls.n 80144de <xTaskRemoveFromEventList+0x5e>
80144d6: 693b ldr r3, [r7, #16]
80144d8: 6adb ldr r3, [r3, #44] @ 0x2c
80144da: 4a16 ldr r2, [pc, #88] @ (8014534 <xTaskRemoveFromEventList+0xb4>)
80144dc: 6013 str r3, [r2, #0]
80144de: 693b ldr r3, [r7, #16]
80144e0: 6ada ldr r2, [r3, #44] @ 0x2c
80144e2: 4613 mov r3, r2
80144e4: 009b lsls r3, r3, #2
80144e6: 4413 add r3, r2
80144e8: 009b lsls r3, r3, #2
80144ea: 4a13 ldr r2, [pc, #76] @ (8014538 <xTaskRemoveFromEventList+0xb8>)
80144ec: 441a add r2, r3
80144ee: 693b ldr r3, [r7, #16]
80144f0: 3304 adds r3, #4
80144f2: 4619 mov r1, r3
80144f4: 4610 mov r0, r2
80144f6: f7fd fdd0 bl 801209a <vListInsertEnd>
80144fa: e005 b.n 8014508 <xTaskRemoveFromEventList+0x88>
}
else
{
/* The delayed and ready lists cannot be accessed, so hold this task
pending until the scheduler is resumed. */
vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
80144fc: 693b ldr r3, [r7, #16]
80144fe: 3318 adds r3, #24
8014500: 4619 mov r1, r3
8014502: 480e ldr r0, [pc, #56] @ (801453c <xTaskRemoveFromEventList+0xbc>)
8014504: f7fd fdc9 bl 801209a <vListInsertEnd>
}
if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
8014508: 693b ldr r3, [r7, #16]
801450a: 6ada ldr r2, [r3, #44] @ 0x2c
801450c: 4b0c ldr r3, [pc, #48] @ (8014540 <xTaskRemoveFromEventList+0xc0>)
801450e: 681b ldr r3, [r3, #0]
8014510: 6adb ldr r3, [r3, #44] @ 0x2c
8014512: 429a cmp r2, r3
8014514: d905 bls.n 8014522 <xTaskRemoveFromEventList+0xa2>
{
/* Return true if the task removed from the event list has a higher
priority than the calling task. This allows the calling task to know if
it should force a context switch now. */
xReturn = pdTRUE;
8014516: 2301 movs r3, #1
8014518: 617b str r3, [r7, #20]
/* Mark that a yield is pending in case the user is not using the
"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
xYieldPending = pdTRUE;
801451a: 4b0a ldr r3, [pc, #40] @ (8014544 <xTaskRemoveFromEventList+0xc4>)
801451c: 2201 movs r2, #1
801451e: 601a str r2, [r3, #0]
8014520: e001 b.n 8014526 <xTaskRemoveFromEventList+0xa6>
}
else
{
xReturn = pdFALSE;
8014522: 2300 movs r3, #0
8014524: 617b str r3, [r7, #20]
}
return xReturn;
8014526: 697b ldr r3, [r7, #20]
}
8014528: 4618 mov r0, r3
801452a: 3718 adds r7, #24
801452c: 46bd mov sp, r7
801452e: bd80 pop {r7, pc}
8014530: 240042ac .word 0x240042ac
8014534: 2400428c .word 0x2400428c
8014538: 24003db4 .word 0x24003db4
801453c: 24004244 .word 0x24004244
8014540: 24003db0 .word 0x24003db0
8014544: 24004298 .word 0x24004298
08014548 <vTaskSetTimeOutState>:
}
}
/*-----------------------------------------------------------*/
void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
{
8014548: b580 push {r7, lr}
801454a: b084 sub sp, #16
801454c: af00 add r7, sp, #0
801454e: 6078 str r0, [r7, #4]
configASSERT( pxTimeOut );
8014550: 687b ldr r3, [r7, #4]
8014552: 2b00 cmp r3, #0
8014554: d10b bne.n 801456e <vTaskSetTimeOutState+0x26>
__asm volatile
8014556: f04f 0350 mov.w r3, #80 @ 0x50
801455a: f383 8811 msr BASEPRI, r3
801455e: f3bf 8f6f isb sy
8014562: f3bf 8f4f dsb sy
8014566: 60fb str r3, [r7, #12]
}
8014568: bf00 nop
801456a: bf00 nop
801456c: e7fd b.n 801456a <vTaskSetTimeOutState+0x22>
taskENTER_CRITICAL();
801456e: f001 fb0b bl 8015b88 <vPortEnterCritical>
{
pxTimeOut->xOverflowCount = xNumOfOverflows;
8014572: 4b07 ldr r3, [pc, #28] @ (8014590 <vTaskSetTimeOutState+0x48>)
8014574: 681a ldr r2, [r3, #0]
8014576: 687b ldr r3, [r7, #4]
8014578: 601a str r2, [r3, #0]
pxTimeOut->xTimeOnEntering = xTickCount;
801457a: 4b06 ldr r3, [pc, #24] @ (8014594 <vTaskSetTimeOutState+0x4c>)
801457c: 681a ldr r2, [r3, #0]
801457e: 687b ldr r3, [r7, #4]
8014580: 605a str r2, [r3, #4]
}
taskEXIT_CRITICAL();
8014582: f001 fb33 bl 8015bec <vPortExitCritical>
}
8014586: bf00 nop
8014588: 3710 adds r7, #16
801458a: 46bd mov sp, r7
801458c: bd80 pop {r7, pc}
801458e: bf00 nop
8014590: 2400429c .word 0x2400429c
8014594: 24004288 .word 0x24004288
08014598 <vTaskInternalSetTimeOutState>:
/*-----------------------------------------------------------*/
void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
{
8014598: b480 push {r7}
801459a: b083 sub sp, #12
801459c: af00 add r7, sp, #0
801459e: 6078 str r0, [r7, #4]
/* For internal use only as it does not use a critical section. */
pxTimeOut->xOverflowCount = xNumOfOverflows;
80145a0: 4b06 ldr r3, [pc, #24] @ (80145bc <vTaskInternalSetTimeOutState+0x24>)
80145a2: 681a ldr r2, [r3, #0]
80145a4: 687b ldr r3, [r7, #4]
80145a6: 601a str r2, [r3, #0]
pxTimeOut->xTimeOnEntering = xTickCount;
80145a8: 4b05 ldr r3, [pc, #20] @ (80145c0 <vTaskInternalSetTimeOutState+0x28>)
80145aa: 681a ldr r2, [r3, #0]
80145ac: 687b ldr r3, [r7, #4]
80145ae: 605a str r2, [r3, #4]
}
80145b0: bf00 nop
80145b2: 370c adds r7, #12
80145b4: 46bd mov sp, r7
80145b6: f85d 7b04 ldr.w r7, [sp], #4
80145ba: 4770 bx lr
80145bc: 2400429c .word 0x2400429c
80145c0: 24004288 .word 0x24004288
080145c4 <xTaskCheckForTimeOut>:
/*-----------------------------------------------------------*/
BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
{
80145c4: b580 push {r7, lr}
80145c6: b088 sub sp, #32
80145c8: af00 add r7, sp, #0
80145ca: 6078 str r0, [r7, #4]
80145cc: 6039 str r1, [r7, #0]
BaseType_t xReturn;
configASSERT( pxTimeOut );
80145ce: 687b ldr r3, [r7, #4]
80145d0: 2b00 cmp r3, #0
80145d2: d10b bne.n 80145ec <xTaskCheckForTimeOut+0x28>
__asm volatile
80145d4: f04f 0350 mov.w r3, #80 @ 0x50
80145d8: f383 8811 msr BASEPRI, r3
80145dc: f3bf 8f6f isb sy
80145e0: f3bf 8f4f dsb sy
80145e4: 613b str r3, [r7, #16]
}
80145e6: bf00 nop
80145e8: bf00 nop
80145ea: e7fd b.n 80145e8 <xTaskCheckForTimeOut+0x24>
configASSERT( pxTicksToWait );
80145ec: 683b ldr r3, [r7, #0]
80145ee: 2b00 cmp r3, #0
80145f0: d10b bne.n 801460a <xTaskCheckForTimeOut+0x46>
__asm volatile
80145f2: f04f 0350 mov.w r3, #80 @ 0x50
80145f6: f383 8811 msr BASEPRI, r3
80145fa: f3bf 8f6f isb sy
80145fe: f3bf 8f4f dsb sy
8014602: 60fb str r3, [r7, #12]
}
8014604: bf00 nop
8014606: bf00 nop
8014608: e7fd b.n 8014606 <xTaskCheckForTimeOut+0x42>
taskENTER_CRITICAL();
801460a: f001 fabd bl 8015b88 <vPortEnterCritical>
{
/* Minor optimisation. The tick count cannot change in this block. */
const TickType_t xConstTickCount = xTickCount;
801460e: 4b1d ldr r3, [pc, #116] @ (8014684 <xTaskCheckForTimeOut+0xc0>)
8014610: 681b ldr r3, [r3, #0]
8014612: 61bb str r3, [r7, #24]
const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
8014614: 687b ldr r3, [r7, #4]
8014616: 685b ldr r3, [r3, #4]
8014618: 69ba ldr r2, [r7, #24]
801461a: 1ad3 subs r3, r2, r3
801461c: 617b str r3, [r7, #20]
}
else
#endif
#if ( INCLUDE_vTaskSuspend == 1 )
if( *pxTicksToWait == portMAX_DELAY )
801461e: 683b ldr r3, [r7, #0]
8014620: 681b ldr r3, [r3, #0]
8014622: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8014626: d102 bne.n 801462e <xTaskCheckForTimeOut+0x6a>
{
/* If INCLUDE_vTaskSuspend is set to 1 and the block time
specified is the maximum block time then the task should block
indefinitely, and therefore never time out. */
xReturn = pdFALSE;
8014628: 2300 movs r3, #0
801462a: 61fb str r3, [r7, #28]
801462c: e023 b.n 8014676 <xTaskCheckForTimeOut+0xb2>
}
else
#endif
if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
801462e: 687b ldr r3, [r7, #4]
8014630: 681a ldr r2, [r3, #0]
8014632: 4b15 ldr r3, [pc, #84] @ (8014688 <xTaskCheckForTimeOut+0xc4>)
8014634: 681b ldr r3, [r3, #0]
8014636: 429a cmp r2, r3
8014638: d007 beq.n 801464a <xTaskCheckForTimeOut+0x86>
801463a: 687b ldr r3, [r7, #4]
801463c: 685b ldr r3, [r3, #4]
801463e: 69ba ldr r2, [r7, #24]
8014640: 429a cmp r2, r3
8014642: d302 bcc.n 801464a <xTaskCheckForTimeOut+0x86>
/* The tick count is greater than the time at which
vTaskSetTimeout() was called, but has also overflowed since
vTaskSetTimeOut() was called. It must have wrapped all the way
around and gone past again. This passed since vTaskSetTimeout()
was called. */
xReturn = pdTRUE;
8014644: 2301 movs r3, #1
8014646: 61fb str r3, [r7, #28]
8014648: e015 b.n 8014676 <xTaskCheckForTimeOut+0xb2>
}
else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
801464a: 683b ldr r3, [r7, #0]
801464c: 681b ldr r3, [r3, #0]
801464e: 697a ldr r2, [r7, #20]
8014650: 429a cmp r2, r3
8014652: d20b bcs.n 801466c <xTaskCheckForTimeOut+0xa8>
{
/* Not a genuine timeout. Adjust parameters for time remaining. */
*pxTicksToWait -= xElapsedTime;
8014654: 683b ldr r3, [r7, #0]
8014656: 681a ldr r2, [r3, #0]
8014658: 697b ldr r3, [r7, #20]
801465a: 1ad2 subs r2, r2, r3
801465c: 683b ldr r3, [r7, #0]
801465e: 601a str r2, [r3, #0]
vTaskInternalSetTimeOutState( pxTimeOut );
8014660: 6878 ldr r0, [r7, #4]
8014662: f7ff ff99 bl 8014598 <vTaskInternalSetTimeOutState>
xReturn = pdFALSE;
8014666: 2300 movs r3, #0
8014668: 61fb str r3, [r7, #28]
801466a: e004 b.n 8014676 <xTaskCheckForTimeOut+0xb2>
}
else
{
*pxTicksToWait = 0;
801466c: 683b ldr r3, [r7, #0]
801466e: 2200 movs r2, #0
8014670: 601a str r2, [r3, #0]
xReturn = pdTRUE;
8014672: 2301 movs r3, #1
8014674: 61fb str r3, [r7, #28]
}
}
taskEXIT_CRITICAL();
8014676: f001 fab9 bl 8015bec <vPortExitCritical>
return xReturn;
801467a: 69fb ldr r3, [r7, #28]
}
801467c: 4618 mov r0, r3
801467e: 3720 adds r7, #32
8014680: 46bd mov sp, r7
8014682: bd80 pop {r7, pc}
8014684: 24004288 .word 0x24004288
8014688: 2400429c .word 0x2400429c
0801468c <vTaskMissedYield>:
/*-----------------------------------------------------------*/
void vTaskMissedYield( void )
{
801468c: b480 push {r7}
801468e: af00 add r7, sp, #0
xYieldPending = pdTRUE;
8014690: 4b03 ldr r3, [pc, #12] @ (80146a0 <vTaskMissedYield+0x14>)
8014692: 2201 movs r2, #1
8014694: 601a str r2, [r3, #0]
}
8014696: bf00 nop
8014698: 46bd mov sp, r7
801469a: f85d 7b04 ldr.w r7, [sp], #4
801469e: 4770 bx lr
80146a0: 24004298 .word 0x24004298
080146a4 <prvIdleTask>:
*
* void prvIdleTask( void *pvParameters );
*
*/
static portTASK_FUNCTION( prvIdleTask, pvParameters )
{
80146a4: b580 push {r7, lr}
80146a6: b082 sub sp, #8
80146a8: af00 add r7, sp, #0
80146aa: 6078 str r0, [r7, #4]
for( ;; )
{
/* See if any tasks have deleted themselves - if so then the idle task
is responsible for freeing the deleted task's TCB and stack. */
prvCheckTasksWaitingTermination();
80146ac: f000 f852 bl 8014754 <prvCheckTasksWaitingTermination>
A critical region is not required here as we are just reading from
the list, and an occasional incorrect value will not matter. If
the ready list at the idle priority contains more than one task
then a task other than the idle task is ready to execute. */
if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
80146b0: 4b06 ldr r3, [pc, #24] @ (80146cc <prvIdleTask+0x28>)
80146b2: 681b ldr r3, [r3, #0]
80146b4: 2b01 cmp r3, #1
80146b6: d9f9 bls.n 80146ac <prvIdleTask+0x8>
{
taskYIELD();
80146b8: 4b05 ldr r3, [pc, #20] @ (80146d0 <prvIdleTask+0x2c>)
80146ba: f04f 5280 mov.w r2, #268435456 @ 0x10000000
80146be: 601a str r2, [r3, #0]
80146c0: f3bf 8f4f dsb sy
80146c4: f3bf 8f6f isb sy
prvCheckTasksWaitingTermination();
80146c8: e7f0 b.n 80146ac <prvIdleTask+0x8>
80146ca: bf00 nop
80146cc: 24003db4 .word 0x24003db4
80146d0: e000ed04 .word 0xe000ed04
080146d4 <prvInitialiseTaskLists>:
#endif /* portUSING_MPU_WRAPPERS */
/*-----------------------------------------------------------*/
static void prvInitialiseTaskLists( void )
{
80146d4: b580 push {r7, lr}
80146d6: b082 sub sp, #8
80146d8: af00 add r7, sp, #0
UBaseType_t uxPriority;
for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
80146da: 2300 movs r3, #0
80146dc: 607b str r3, [r7, #4]
80146de: e00c b.n 80146fa <prvInitialiseTaskLists+0x26>
{
vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
80146e0: 687a ldr r2, [r7, #4]
80146e2: 4613 mov r3, r2
80146e4: 009b lsls r3, r3, #2
80146e6: 4413 add r3, r2
80146e8: 009b lsls r3, r3, #2
80146ea: 4a12 ldr r2, [pc, #72] @ (8014734 <prvInitialiseTaskLists+0x60>)
80146ec: 4413 add r3, r2
80146ee: 4618 mov r0, r3
80146f0: f7fd fca6 bl 8012040 <vListInitialise>
for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
80146f4: 687b ldr r3, [r7, #4]
80146f6: 3301 adds r3, #1
80146f8: 607b str r3, [r7, #4]
80146fa: 687b ldr r3, [r7, #4]
80146fc: 2b37 cmp r3, #55 @ 0x37
80146fe: d9ef bls.n 80146e0 <prvInitialiseTaskLists+0xc>
}
vListInitialise( &xDelayedTaskList1 );
8014700: 480d ldr r0, [pc, #52] @ (8014738 <prvInitialiseTaskLists+0x64>)
8014702: f7fd fc9d bl 8012040 <vListInitialise>
vListInitialise( &xDelayedTaskList2 );
8014706: 480d ldr r0, [pc, #52] @ (801473c <prvInitialiseTaskLists+0x68>)
8014708: f7fd fc9a bl 8012040 <vListInitialise>
vListInitialise( &xPendingReadyList );
801470c: 480c ldr r0, [pc, #48] @ (8014740 <prvInitialiseTaskLists+0x6c>)
801470e: f7fd fc97 bl 8012040 <vListInitialise>
#if ( INCLUDE_vTaskDelete == 1 )
{
vListInitialise( &xTasksWaitingTermination );
8014712: 480c ldr r0, [pc, #48] @ (8014744 <prvInitialiseTaskLists+0x70>)
8014714: f7fd fc94 bl 8012040 <vListInitialise>
}
#endif /* INCLUDE_vTaskDelete */
#if ( INCLUDE_vTaskSuspend == 1 )
{
vListInitialise( &xSuspendedTaskList );
8014718: 480b ldr r0, [pc, #44] @ (8014748 <prvInitialiseTaskLists+0x74>)
801471a: f7fd fc91 bl 8012040 <vListInitialise>
}
#endif /* INCLUDE_vTaskSuspend */
/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
using list2. */
pxDelayedTaskList = &xDelayedTaskList1;
801471e: 4b0b ldr r3, [pc, #44] @ (801474c <prvInitialiseTaskLists+0x78>)
8014720: 4a05 ldr r2, [pc, #20] @ (8014738 <prvInitialiseTaskLists+0x64>)
8014722: 601a str r2, [r3, #0]
pxOverflowDelayedTaskList = &xDelayedTaskList2;
8014724: 4b0a ldr r3, [pc, #40] @ (8014750 <prvInitialiseTaskLists+0x7c>)
8014726: 4a05 ldr r2, [pc, #20] @ (801473c <prvInitialiseTaskLists+0x68>)
8014728: 601a str r2, [r3, #0]
}
801472a: bf00 nop
801472c: 3708 adds r7, #8
801472e: 46bd mov sp, r7
8014730: bd80 pop {r7, pc}
8014732: bf00 nop
8014734: 24003db4 .word 0x24003db4
8014738: 24004214 .word 0x24004214
801473c: 24004228 .word 0x24004228
8014740: 24004244 .word 0x24004244
8014744: 24004258 .word 0x24004258
8014748: 24004270 .word 0x24004270
801474c: 2400423c .word 0x2400423c
8014750: 24004240 .word 0x24004240
08014754 <prvCheckTasksWaitingTermination>:
/*-----------------------------------------------------------*/
static void prvCheckTasksWaitingTermination( void )
{
8014754: b580 push {r7, lr}
8014756: b082 sub sp, #8
8014758: af00 add r7, sp, #0
{
TCB_t *pxTCB;
/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
being called too often in the idle task. */
while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
801475a: e019 b.n 8014790 <prvCheckTasksWaitingTermination+0x3c>
{
taskENTER_CRITICAL();
801475c: f001 fa14 bl 8015b88 <vPortEnterCritical>
{
pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8014760: 4b10 ldr r3, [pc, #64] @ (80147a4 <prvCheckTasksWaitingTermination+0x50>)
8014762: 68db ldr r3, [r3, #12]
8014764: 68db ldr r3, [r3, #12]
8014766: 607b str r3, [r7, #4]
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
8014768: 687b ldr r3, [r7, #4]
801476a: 3304 adds r3, #4
801476c: 4618 mov r0, r3
801476e: f7fd fcf1 bl 8012154 <uxListRemove>
--uxCurrentNumberOfTasks;
8014772: 4b0d ldr r3, [pc, #52] @ (80147a8 <prvCheckTasksWaitingTermination+0x54>)
8014774: 681b ldr r3, [r3, #0]
8014776: 3b01 subs r3, #1
8014778: 4a0b ldr r2, [pc, #44] @ (80147a8 <prvCheckTasksWaitingTermination+0x54>)
801477a: 6013 str r3, [r2, #0]
--uxDeletedTasksWaitingCleanUp;
801477c: 4b0b ldr r3, [pc, #44] @ (80147ac <prvCheckTasksWaitingTermination+0x58>)
801477e: 681b ldr r3, [r3, #0]
8014780: 3b01 subs r3, #1
8014782: 4a0a ldr r2, [pc, #40] @ (80147ac <prvCheckTasksWaitingTermination+0x58>)
8014784: 6013 str r3, [r2, #0]
}
taskEXIT_CRITICAL();
8014786: f001 fa31 bl 8015bec <vPortExitCritical>
prvDeleteTCB( pxTCB );
801478a: 6878 ldr r0, [r7, #4]
801478c: f000 f810 bl 80147b0 <prvDeleteTCB>
while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
8014790: 4b06 ldr r3, [pc, #24] @ (80147ac <prvCheckTasksWaitingTermination+0x58>)
8014792: 681b ldr r3, [r3, #0]
8014794: 2b00 cmp r3, #0
8014796: d1e1 bne.n 801475c <prvCheckTasksWaitingTermination+0x8>
}
}
#endif /* INCLUDE_vTaskDelete */
}
8014798: bf00 nop
801479a: bf00 nop
801479c: 3708 adds r7, #8
801479e: 46bd mov sp, r7
80147a0: bd80 pop {r7, pc}
80147a2: bf00 nop
80147a4: 24004258 .word 0x24004258
80147a8: 24004284 .word 0x24004284
80147ac: 2400426c .word 0x2400426c
080147b0 <prvDeleteTCB>:
/*-----------------------------------------------------------*/
#if ( INCLUDE_vTaskDelete == 1 )
static void prvDeleteTCB( TCB_t *pxTCB )
{
80147b0: b580 push {r7, lr}
80147b2: b084 sub sp, #16
80147b4: af00 add r7, sp, #0
80147b6: 6078 str r0, [r7, #4]
to the task to free any memory allocated at the application level.
See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
for additional information. */
#if ( configUSE_NEWLIB_REENTRANT == 1 )
{
_reclaim_reent( &( pxTCB->xNewLib_reent ) );
80147b8: 687b ldr r3, [r7, #4]
80147ba: 3354 adds r3, #84 @ 0x54
80147bc: 4618 mov r0, r3
80147be: f016 faf5 bl 802adac <_reclaim_reent>
#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
{
/* The task could have been allocated statically or dynamically, so
check what was statically allocated before trying to free the
memory. */
if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
80147c2: 687b ldr r3, [r7, #4]
80147c4: f893 30a5 ldrb.w r3, [r3, #165] @ 0xa5
80147c8: 2b00 cmp r3, #0
80147ca: d108 bne.n 80147de <prvDeleteTCB+0x2e>
{
/* Both the stack and TCB were allocated dynamically, so both
must be freed. */
vPortFree( pxTCB->pxStack );
80147cc: 687b ldr r3, [r7, #4]
80147ce: 6b1b ldr r3, [r3, #48] @ 0x30
80147d0: 4618 mov r0, r3
80147d2: f001 fbc9 bl 8015f68 <vPortFree>
vPortFree( pxTCB );
80147d6: 6878 ldr r0, [r7, #4]
80147d8: f001 fbc6 bl 8015f68 <vPortFree>
configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
mtCOVERAGE_TEST_MARKER();
}
}
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
}
80147dc: e019 b.n 8014812 <prvDeleteTCB+0x62>
else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
80147de: 687b ldr r3, [r7, #4]
80147e0: f893 30a5 ldrb.w r3, [r3, #165] @ 0xa5
80147e4: 2b01 cmp r3, #1
80147e6: d103 bne.n 80147f0 <prvDeleteTCB+0x40>
vPortFree( pxTCB );
80147e8: 6878 ldr r0, [r7, #4]
80147ea: f001 fbbd bl 8015f68 <vPortFree>
}
80147ee: e010 b.n 8014812 <prvDeleteTCB+0x62>
configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB );
80147f0: 687b ldr r3, [r7, #4]
80147f2: f893 30a5 ldrb.w r3, [r3, #165] @ 0xa5
80147f6: 2b02 cmp r3, #2
80147f8: d00b beq.n 8014812 <prvDeleteTCB+0x62>
__asm volatile
80147fa: f04f 0350 mov.w r3, #80 @ 0x50
80147fe: f383 8811 msr BASEPRI, r3
8014802: f3bf 8f6f isb sy
8014806: f3bf 8f4f dsb sy
801480a: 60fb str r3, [r7, #12]
}
801480c: bf00 nop
801480e: bf00 nop
8014810: e7fd b.n 801480e <prvDeleteTCB+0x5e>
}
8014812: bf00 nop
8014814: 3710 adds r7, #16
8014816: 46bd mov sp, r7
8014818: bd80 pop {r7, pc}
...
0801481c <prvResetNextTaskUnblockTime>:
#endif /* INCLUDE_vTaskDelete */
/*-----------------------------------------------------------*/
static void prvResetNextTaskUnblockTime( void )
{
801481c: b480 push {r7}
801481e: b083 sub sp, #12
8014820: af00 add r7, sp, #0
TCB_t *pxTCB;
if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
8014822: 4b0c ldr r3, [pc, #48] @ (8014854 <prvResetNextTaskUnblockTime+0x38>)
8014824: 681b ldr r3, [r3, #0]
8014826: 681b ldr r3, [r3, #0]
8014828: 2b00 cmp r3, #0
801482a: d104 bne.n 8014836 <prvResetNextTaskUnblockTime+0x1a>
{
/* The new current delayed list is empty. Set xNextTaskUnblockTime to
the maximum possible value so it is extremely unlikely that the
if( xTickCount >= xNextTaskUnblockTime ) test will pass until
there is an item in the delayed list. */
xNextTaskUnblockTime = portMAX_DELAY;
801482c: 4b0a ldr r3, [pc, #40] @ (8014858 <prvResetNextTaskUnblockTime+0x3c>)
801482e: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
8014832: 601a str r2, [r3, #0]
which the task at the head of the delayed list should be removed
from the Blocked state. */
( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
}
}
8014834: e008 b.n 8014848 <prvResetNextTaskUnblockTime+0x2c>
( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8014836: 4b07 ldr r3, [pc, #28] @ (8014854 <prvResetNextTaskUnblockTime+0x38>)
8014838: 681b ldr r3, [r3, #0]
801483a: 68db ldr r3, [r3, #12]
801483c: 68db ldr r3, [r3, #12]
801483e: 607b str r3, [r7, #4]
xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
8014840: 687b ldr r3, [r7, #4]
8014842: 685b ldr r3, [r3, #4]
8014844: 4a04 ldr r2, [pc, #16] @ (8014858 <prvResetNextTaskUnblockTime+0x3c>)
8014846: 6013 str r3, [r2, #0]
}
8014848: bf00 nop
801484a: 370c adds r7, #12
801484c: 46bd mov sp, r7
801484e: f85d 7b04 ldr.w r7, [sp], #4
8014852: 4770 bx lr
8014854: 2400423c .word 0x2400423c
8014858: 240042a4 .word 0x240042a4
0801485c <xTaskGetCurrentTaskHandle>:
/*-----------------------------------------------------------*/
#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )
TaskHandle_t xTaskGetCurrentTaskHandle( void )
{
801485c: b480 push {r7}
801485e: b083 sub sp, #12
8014860: af00 add r7, sp, #0
TaskHandle_t xReturn;
/* A critical section is not required as this is not called from
an interrupt and the current TCB will always be the same for any
individual execution thread. */
xReturn = pxCurrentTCB;
8014862: 4b05 ldr r3, [pc, #20] @ (8014878 <xTaskGetCurrentTaskHandle+0x1c>)
8014864: 681b ldr r3, [r3, #0]
8014866: 607b str r3, [r7, #4]
return xReturn;
8014868: 687b ldr r3, [r7, #4]
}
801486a: 4618 mov r0, r3
801486c: 370c adds r7, #12
801486e: 46bd mov sp, r7
8014870: f85d 7b04 ldr.w r7, [sp], #4
8014874: 4770 bx lr
8014876: bf00 nop
8014878: 24003db0 .word 0x24003db0
0801487c <xTaskGetSchedulerState>:
/*-----------------------------------------------------------*/
#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
BaseType_t xTaskGetSchedulerState( void )
{
801487c: b480 push {r7}
801487e: b083 sub sp, #12
8014880: af00 add r7, sp, #0
BaseType_t xReturn;
if( xSchedulerRunning == pdFALSE )
8014882: 4b0b ldr r3, [pc, #44] @ (80148b0 <xTaskGetSchedulerState+0x34>)
8014884: 681b ldr r3, [r3, #0]
8014886: 2b00 cmp r3, #0
8014888: d102 bne.n 8014890 <xTaskGetSchedulerState+0x14>
{
xReturn = taskSCHEDULER_NOT_STARTED;
801488a: 2301 movs r3, #1
801488c: 607b str r3, [r7, #4]
801488e: e008 b.n 80148a2 <xTaskGetSchedulerState+0x26>
}
else
{
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
8014890: 4b08 ldr r3, [pc, #32] @ (80148b4 <xTaskGetSchedulerState+0x38>)
8014892: 681b ldr r3, [r3, #0]
8014894: 2b00 cmp r3, #0
8014896: d102 bne.n 801489e <xTaskGetSchedulerState+0x22>
{
xReturn = taskSCHEDULER_RUNNING;
8014898: 2302 movs r3, #2
801489a: 607b str r3, [r7, #4]
801489c: e001 b.n 80148a2 <xTaskGetSchedulerState+0x26>
}
else
{
xReturn = taskSCHEDULER_SUSPENDED;
801489e: 2300 movs r3, #0
80148a0: 607b str r3, [r7, #4]
}
}
return xReturn;
80148a2: 687b ldr r3, [r7, #4]
}
80148a4: 4618 mov r0, r3
80148a6: 370c adds r7, #12
80148a8: 46bd mov sp, r7
80148aa: f85d 7b04 ldr.w r7, [sp], #4
80148ae: 4770 bx lr
80148b0: 24004290 .word 0x24004290
80148b4: 240042ac .word 0x240042ac
080148b8 <xTaskPriorityInherit>:
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
{
80148b8: b580 push {r7, lr}
80148ba: b084 sub sp, #16
80148bc: af00 add r7, sp, #0
80148be: 6078 str r0, [r7, #4]
TCB_t * const pxMutexHolderTCB = pxMutexHolder;
80148c0: 687b ldr r3, [r7, #4]
80148c2: 60bb str r3, [r7, #8]
BaseType_t xReturn = pdFALSE;
80148c4: 2300 movs r3, #0
80148c6: 60fb str r3, [r7, #12]
/* If the mutex was given back by an interrupt while the queue was
locked then the mutex holder might now be NULL. _RB_ Is this still
needed as interrupts can no longer use mutexes? */
if( pxMutexHolder != NULL )
80148c8: 687b ldr r3, [r7, #4]
80148ca: 2b00 cmp r3, #0
80148cc: d051 beq.n 8014972 <xTaskPriorityInherit+0xba>
{
/* If the holder of the mutex has a priority below the priority of
the task attempting to obtain the mutex then it will temporarily
inherit the priority of the task attempting to obtain the mutex. */
if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
80148ce: 68bb ldr r3, [r7, #8]
80148d0: 6ada ldr r2, [r3, #44] @ 0x2c
80148d2: 4b2a ldr r3, [pc, #168] @ (801497c <xTaskPriorityInherit+0xc4>)
80148d4: 681b ldr r3, [r3, #0]
80148d6: 6adb ldr r3, [r3, #44] @ 0x2c
80148d8: 429a cmp r2, r3
80148da: d241 bcs.n 8014960 <xTaskPriorityInherit+0xa8>
{
/* Adjust the mutex holder state to account for its new
priority. Only reset the event list item value if the value is
not being used for anything else. */
if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
80148dc: 68bb ldr r3, [r7, #8]
80148de: 699b ldr r3, [r3, #24]
80148e0: 2b00 cmp r3, #0
80148e2: db06 blt.n 80148f2 <xTaskPriorityInherit+0x3a>
{
listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
80148e4: 4b25 ldr r3, [pc, #148] @ (801497c <xTaskPriorityInherit+0xc4>)
80148e6: 681b ldr r3, [r3, #0]
80148e8: 6adb ldr r3, [r3, #44] @ 0x2c
80148ea: f1c3 0238 rsb r2, r3, #56 @ 0x38
80148ee: 68bb ldr r3, [r7, #8]
80148f0: 619a str r2, [r3, #24]
mtCOVERAGE_TEST_MARKER();
}
/* If the task being modified is in the ready state it will need
to be moved into a new list. */
if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
80148f2: 68bb ldr r3, [r7, #8]
80148f4: 6959 ldr r1, [r3, #20]
80148f6: 68bb ldr r3, [r7, #8]
80148f8: 6ada ldr r2, [r3, #44] @ 0x2c
80148fa: 4613 mov r3, r2
80148fc: 009b lsls r3, r3, #2
80148fe: 4413 add r3, r2
8014900: 009b lsls r3, r3, #2
8014902: 4a1f ldr r2, [pc, #124] @ (8014980 <xTaskPriorityInherit+0xc8>)
8014904: 4413 add r3, r2
8014906: 4299 cmp r1, r3
8014908: d122 bne.n 8014950 <xTaskPriorityInherit+0x98>
{
if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
801490a: 68bb ldr r3, [r7, #8]
801490c: 3304 adds r3, #4
801490e: 4618 mov r0, r3
8014910: f7fd fc20 bl 8012154 <uxListRemove>
{
mtCOVERAGE_TEST_MARKER();
}
/* Inherit the priority before being moved into the new list. */
pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
8014914: 4b19 ldr r3, [pc, #100] @ (801497c <xTaskPriorityInherit+0xc4>)
8014916: 681b ldr r3, [r3, #0]
8014918: 6ada ldr r2, [r3, #44] @ 0x2c
801491a: 68bb ldr r3, [r7, #8]
801491c: 62da str r2, [r3, #44] @ 0x2c
prvAddTaskToReadyList( pxMutexHolderTCB );
801491e: 68bb ldr r3, [r7, #8]
8014920: 6ada ldr r2, [r3, #44] @ 0x2c
8014922: 4b18 ldr r3, [pc, #96] @ (8014984 <xTaskPriorityInherit+0xcc>)
8014924: 681b ldr r3, [r3, #0]
8014926: 429a cmp r2, r3
8014928: d903 bls.n 8014932 <xTaskPriorityInherit+0x7a>
801492a: 68bb ldr r3, [r7, #8]
801492c: 6adb ldr r3, [r3, #44] @ 0x2c
801492e: 4a15 ldr r2, [pc, #84] @ (8014984 <xTaskPriorityInherit+0xcc>)
8014930: 6013 str r3, [r2, #0]
8014932: 68bb ldr r3, [r7, #8]
8014934: 6ada ldr r2, [r3, #44] @ 0x2c
8014936: 4613 mov r3, r2
8014938: 009b lsls r3, r3, #2
801493a: 4413 add r3, r2
801493c: 009b lsls r3, r3, #2
801493e: 4a10 ldr r2, [pc, #64] @ (8014980 <xTaskPriorityInherit+0xc8>)
8014940: 441a add r2, r3
8014942: 68bb ldr r3, [r7, #8]
8014944: 3304 adds r3, #4
8014946: 4619 mov r1, r3
8014948: 4610 mov r0, r2
801494a: f7fd fba6 bl 801209a <vListInsertEnd>
801494e: e004 b.n 801495a <xTaskPriorityInherit+0xa2>
}
else
{
/* Just inherit the priority. */
pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
8014950: 4b0a ldr r3, [pc, #40] @ (801497c <xTaskPriorityInherit+0xc4>)
8014952: 681b ldr r3, [r3, #0]
8014954: 6ada ldr r2, [r3, #44] @ 0x2c
8014956: 68bb ldr r3, [r7, #8]
8014958: 62da str r2, [r3, #44] @ 0x2c
}
traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );
/* Inheritance occurred. */
xReturn = pdTRUE;
801495a: 2301 movs r3, #1
801495c: 60fb str r3, [r7, #12]
801495e: e008 b.n 8014972 <xTaskPriorityInherit+0xba>
}
else
{
if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
8014960: 68bb ldr r3, [r7, #8]
8014962: 6cda ldr r2, [r3, #76] @ 0x4c
8014964: 4b05 ldr r3, [pc, #20] @ (801497c <xTaskPriorityInherit+0xc4>)
8014966: 681b ldr r3, [r3, #0]
8014968: 6adb ldr r3, [r3, #44] @ 0x2c
801496a: 429a cmp r2, r3
801496c: d201 bcs.n 8014972 <xTaskPriorityInherit+0xba>
current priority of the mutex holder is not lower than the
priority of the task attempting to take the mutex.
Therefore the mutex holder must have already inherited a
priority, but inheritance would have occurred if that had
not been the case. */
xReturn = pdTRUE;
801496e: 2301 movs r3, #1
8014970: 60fb str r3, [r7, #12]
else
{
mtCOVERAGE_TEST_MARKER();
}
return xReturn;
8014972: 68fb ldr r3, [r7, #12]
}
8014974: 4618 mov r0, r3
8014976: 3710 adds r7, #16
8014978: 46bd mov sp, r7
801497a: bd80 pop {r7, pc}
801497c: 24003db0 .word 0x24003db0
8014980: 24003db4 .word 0x24003db4
8014984: 2400428c .word 0x2400428c
08014988 <xTaskPriorityDisinherit>:
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
{
8014988: b580 push {r7, lr}
801498a: b086 sub sp, #24
801498c: af00 add r7, sp, #0
801498e: 6078 str r0, [r7, #4]
TCB_t * const pxTCB = pxMutexHolder;
8014990: 687b ldr r3, [r7, #4]
8014992: 613b str r3, [r7, #16]
BaseType_t xReturn = pdFALSE;
8014994: 2300 movs r3, #0
8014996: 617b str r3, [r7, #20]
if( pxMutexHolder != NULL )
8014998: 687b ldr r3, [r7, #4]
801499a: 2b00 cmp r3, #0
801499c: d058 beq.n 8014a50 <xTaskPriorityDisinherit+0xc8>
{
/* A task can only have an inherited priority if it holds the mutex.
If the mutex is held by a task then it cannot be given from an
interrupt, and if a mutex is given by the holding task then it must
be the running state task. */
configASSERT( pxTCB == pxCurrentTCB );
801499e: 4b2f ldr r3, [pc, #188] @ (8014a5c <xTaskPriorityDisinherit+0xd4>)
80149a0: 681b ldr r3, [r3, #0]
80149a2: 693a ldr r2, [r7, #16]
80149a4: 429a cmp r2, r3
80149a6: d00b beq.n 80149c0 <xTaskPriorityDisinherit+0x38>
__asm volatile
80149a8: f04f 0350 mov.w r3, #80 @ 0x50
80149ac: f383 8811 msr BASEPRI, r3
80149b0: f3bf 8f6f isb sy
80149b4: f3bf 8f4f dsb sy
80149b8: 60fb str r3, [r7, #12]
}
80149ba: bf00 nop
80149bc: bf00 nop
80149be: e7fd b.n 80149bc <xTaskPriorityDisinherit+0x34>
configASSERT( pxTCB->uxMutexesHeld );
80149c0: 693b ldr r3, [r7, #16]
80149c2: 6d1b ldr r3, [r3, #80] @ 0x50
80149c4: 2b00 cmp r3, #0
80149c6: d10b bne.n 80149e0 <xTaskPriorityDisinherit+0x58>
__asm volatile
80149c8: f04f 0350 mov.w r3, #80 @ 0x50
80149cc: f383 8811 msr BASEPRI, r3
80149d0: f3bf 8f6f isb sy
80149d4: f3bf 8f4f dsb sy
80149d8: 60bb str r3, [r7, #8]
}
80149da: bf00 nop
80149dc: bf00 nop
80149de: e7fd b.n 80149dc <xTaskPriorityDisinherit+0x54>
( pxTCB->uxMutexesHeld )--;
80149e0: 693b ldr r3, [r7, #16]
80149e2: 6d1b ldr r3, [r3, #80] @ 0x50
80149e4: 1e5a subs r2, r3, #1
80149e6: 693b ldr r3, [r7, #16]
80149e8: 651a str r2, [r3, #80] @ 0x50
/* Has the holder of the mutex inherited the priority of another
task? */
if( pxTCB->uxPriority != pxTCB->uxBasePriority )
80149ea: 693b ldr r3, [r7, #16]
80149ec: 6ada ldr r2, [r3, #44] @ 0x2c
80149ee: 693b ldr r3, [r7, #16]
80149f0: 6cdb ldr r3, [r3, #76] @ 0x4c
80149f2: 429a cmp r2, r3
80149f4: d02c beq.n 8014a50 <xTaskPriorityDisinherit+0xc8>
{
/* Only disinherit if no other mutexes are held. */
if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
80149f6: 693b ldr r3, [r7, #16]
80149f8: 6d1b ldr r3, [r3, #80] @ 0x50
80149fa: 2b00 cmp r3, #0
80149fc: d128 bne.n 8014a50 <xTaskPriorityDisinherit+0xc8>
/* A task can only have an inherited priority if it holds
the mutex. If the mutex is held by a task then it cannot be
given from an interrupt, and if a mutex is given by the
holding task then it must be the running state task. Remove
the holding task from the ready/delayed list. */
if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
80149fe: 693b ldr r3, [r7, #16]
8014a00: 3304 adds r3, #4
8014a02: 4618 mov r0, r3
8014a04: f7fd fba6 bl 8012154 <uxListRemove>
}
/* Disinherit the priority before adding the task into the
new ready list. */
traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
pxTCB->uxPriority = pxTCB->uxBasePriority;
8014a08: 693b ldr r3, [r7, #16]
8014a0a: 6cda ldr r2, [r3, #76] @ 0x4c
8014a0c: 693b ldr r3, [r7, #16]
8014a0e: 62da str r2, [r3, #44] @ 0x2c
/* Reset the event list item value. It cannot be in use for
any other purpose if this task is running, and it must be
running to give back the mutex. */
listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
8014a10: 693b ldr r3, [r7, #16]
8014a12: 6adb ldr r3, [r3, #44] @ 0x2c
8014a14: f1c3 0238 rsb r2, r3, #56 @ 0x38
8014a18: 693b ldr r3, [r7, #16]
8014a1a: 619a str r2, [r3, #24]
prvAddTaskToReadyList( pxTCB );
8014a1c: 693b ldr r3, [r7, #16]
8014a1e: 6ada ldr r2, [r3, #44] @ 0x2c
8014a20: 4b0f ldr r3, [pc, #60] @ (8014a60 <xTaskPriorityDisinherit+0xd8>)
8014a22: 681b ldr r3, [r3, #0]
8014a24: 429a cmp r2, r3
8014a26: d903 bls.n 8014a30 <xTaskPriorityDisinherit+0xa8>
8014a28: 693b ldr r3, [r7, #16]
8014a2a: 6adb ldr r3, [r3, #44] @ 0x2c
8014a2c: 4a0c ldr r2, [pc, #48] @ (8014a60 <xTaskPriorityDisinherit+0xd8>)
8014a2e: 6013 str r3, [r2, #0]
8014a30: 693b ldr r3, [r7, #16]
8014a32: 6ada ldr r2, [r3, #44] @ 0x2c
8014a34: 4613 mov r3, r2
8014a36: 009b lsls r3, r3, #2
8014a38: 4413 add r3, r2
8014a3a: 009b lsls r3, r3, #2
8014a3c: 4a09 ldr r2, [pc, #36] @ (8014a64 <xTaskPriorityDisinherit+0xdc>)
8014a3e: 441a add r2, r3
8014a40: 693b ldr r3, [r7, #16]
8014a42: 3304 adds r3, #4
8014a44: 4619 mov r1, r3
8014a46: 4610 mov r0, r2
8014a48: f7fd fb27 bl 801209a <vListInsertEnd>
in an order different to that in which they were taken.
If a context switch did not occur when the first mutex was
returned, even if a task was waiting on it, then a context
switch should occur when the last mutex is returned whether
a task is waiting on it or not. */
xReturn = pdTRUE;
8014a4c: 2301 movs r3, #1
8014a4e: 617b str r3, [r7, #20]
else
{
mtCOVERAGE_TEST_MARKER();
}
return xReturn;
8014a50: 697b ldr r3, [r7, #20]
}
8014a52: 4618 mov r0, r3
8014a54: 3718 adds r7, #24
8014a56: 46bd mov sp, r7
8014a58: bd80 pop {r7, pc}
8014a5a: bf00 nop
8014a5c: 24003db0 .word 0x24003db0
8014a60: 2400428c .word 0x2400428c
8014a64: 24003db4 .word 0x24003db4
08014a68 <vTaskPriorityDisinheritAfterTimeout>:
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
{
8014a68: b580 push {r7, lr}
8014a6a: b088 sub sp, #32
8014a6c: af00 add r7, sp, #0
8014a6e: 6078 str r0, [r7, #4]
8014a70: 6039 str r1, [r7, #0]
TCB_t * const pxTCB = pxMutexHolder;
8014a72: 687b ldr r3, [r7, #4]
8014a74: 61bb str r3, [r7, #24]
UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
8014a76: 2301 movs r3, #1
8014a78: 617b str r3, [r7, #20]
if( pxMutexHolder != NULL )
8014a7a: 687b ldr r3, [r7, #4]
8014a7c: 2b00 cmp r3, #0
8014a7e: d06c beq.n 8014b5a <vTaskPriorityDisinheritAfterTimeout+0xf2>
{
/* If pxMutexHolder is not NULL then the holder must hold at least
one mutex. */
configASSERT( pxTCB->uxMutexesHeld );
8014a80: 69bb ldr r3, [r7, #24]
8014a82: 6d1b ldr r3, [r3, #80] @ 0x50
8014a84: 2b00 cmp r3, #0
8014a86: d10b bne.n 8014aa0 <vTaskPriorityDisinheritAfterTimeout+0x38>
__asm volatile
8014a88: f04f 0350 mov.w r3, #80 @ 0x50
8014a8c: f383 8811 msr BASEPRI, r3
8014a90: f3bf 8f6f isb sy
8014a94: f3bf 8f4f dsb sy
8014a98: 60fb str r3, [r7, #12]
}
8014a9a: bf00 nop
8014a9c: bf00 nop
8014a9e: e7fd b.n 8014a9c <vTaskPriorityDisinheritAfterTimeout+0x34>
/* Determine the priority to which the priority of the task that
holds the mutex should be set. This will be the greater of the
holding task's base priority and the priority of the highest
priority task that is waiting to obtain the mutex. */
if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
8014aa0: 69bb ldr r3, [r7, #24]
8014aa2: 6cdb ldr r3, [r3, #76] @ 0x4c
8014aa4: 683a ldr r2, [r7, #0]
8014aa6: 429a cmp r2, r3
8014aa8: d902 bls.n 8014ab0 <vTaskPriorityDisinheritAfterTimeout+0x48>
{
uxPriorityToUse = uxHighestPriorityWaitingTask;
8014aaa: 683b ldr r3, [r7, #0]
8014aac: 61fb str r3, [r7, #28]
8014aae: e002 b.n 8014ab6 <vTaskPriorityDisinheritAfterTimeout+0x4e>
}
else
{
uxPriorityToUse = pxTCB->uxBasePriority;
8014ab0: 69bb ldr r3, [r7, #24]
8014ab2: 6cdb ldr r3, [r3, #76] @ 0x4c
8014ab4: 61fb str r3, [r7, #28]
}
/* Does the priority need to change? */
if( pxTCB->uxPriority != uxPriorityToUse )
8014ab6: 69bb ldr r3, [r7, #24]
8014ab8: 6adb ldr r3, [r3, #44] @ 0x2c
8014aba: 69fa ldr r2, [r7, #28]
8014abc: 429a cmp r2, r3
8014abe: d04c beq.n 8014b5a <vTaskPriorityDisinheritAfterTimeout+0xf2>
{
/* Only disinherit if no other mutexes are held. This is a
simplification in the priority inheritance implementation. If
the task that holds the mutex is also holding other mutexes then
the other mutexes may have caused the priority inheritance. */
if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
8014ac0: 69bb ldr r3, [r7, #24]
8014ac2: 6d1b ldr r3, [r3, #80] @ 0x50
8014ac4: 697a ldr r2, [r7, #20]
8014ac6: 429a cmp r2, r3
8014ac8: d147 bne.n 8014b5a <vTaskPriorityDisinheritAfterTimeout+0xf2>
{
/* If a task has timed out because it already holds the
mutex it was trying to obtain then it cannot of inherited
its own priority. */
configASSERT( pxTCB != pxCurrentTCB );
8014aca: 4b26 ldr r3, [pc, #152] @ (8014b64 <vTaskPriorityDisinheritAfterTimeout+0xfc>)
8014acc: 681b ldr r3, [r3, #0]
8014ace: 69ba ldr r2, [r7, #24]
8014ad0: 429a cmp r2, r3
8014ad2: d10b bne.n 8014aec <vTaskPriorityDisinheritAfterTimeout+0x84>
__asm volatile
8014ad4: f04f 0350 mov.w r3, #80 @ 0x50
8014ad8: f383 8811 msr BASEPRI, r3
8014adc: f3bf 8f6f isb sy
8014ae0: f3bf 8f4f dsb sy
8014ae4: 60bb str r3, [r7, #8]
}
8014ae6: bf00 nop
8014ae8: bf00 nop
8014aea: e7fd b.n 8014ae8 <vTaskPriorityDisinheritAfterTimeout+0x80>
/* Disinherit the priority, remembering the previous
priority to facilitate determining the subject task's
state. */
traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
uxPriorityUsedOnEntry = pxTCB->uxPriority;
8014aec: 69bb ldr r3, [r7, #24]
8014aee: 6adb ldr r3, [r3, #44] @ 0x2c
8014af0: 613b str r3, [r7, #16]
pxTCB->uxPriority = uxPriorityToUse;
8014af2: 69bb ldr r3, [r7, #24]
8014af4: 69fa ldr r2, [r7, #28]
8014af6: 62da str r2, [r3, #44] @ 0x2c
/* Only reset the event list item value if the value is not
being used for anything else. */
if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
8014af8: 69bb ldr r3, [r7, #24]
8014afa: 699b ldr r3, [r3, #24]
8014afc: 2b00 cmp r3, #0
8014afe: db04 blt.n 8014b0a <vTaskPriorityDisinheritAfterTimeout+0xa2>
{
listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
8014b00: 69fb ldr r3, [r7, #28]
8014b02: f1c3 0238 rsb r2, r3, #56 @ 0x38
8014b06: 69bb ldr r3, [r7, #24]
8014b08: 619a str r2, [r3, #24]
then the task that holds the mutex could be in either the
Ready, Blocked or Suspended states. Only remove the task
from its current state list if it is in the Ready state as
the task's priority is going to change and there is one
Ready list per priority. */
if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
8014b0a: 69bb ldr r3, [r7, #24]
8014b0c: 6959 ldr r1, [r3, #20]
8014b0e: 693a ldr r2, [r7, #16]
8014b10: 4613 mov r3, r2
8014b12: 009b lsls r3, r3, #2
8014b14: 4413 add r3, r2
8014b16: 009b lsls r3, r3, #2
8014b18: 4a13 ldr r2, [pc, #76] @ (8014b68 <vTaskPriorityDisinheritAfterTimeout+0x100>)
8014b1a: 4413 add r3, r2
8014b1c: 4299 cmp r1, r3
8014b1e: d11c bne.n 8014b5a <vTaskPriorityDisinheritAfterTimeout+0xf2>
{
if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
8014b20: 69bb ldr r3, [r7, #24]
8014b22: 3304 adds r3, #4
8014b24: 4618 mov r0, r3
8014b26: f7fd fb15 bl 8012154 <uxListRemove>
else
{
mtCOVERAGE_TEST_MARKER();
}
prvAddTaskToReadyList( pxTCB );
8014b2a: 69bb ldr r3, [r7, #24]
8014b2c: 6ada ldr r2, [r3, #44] @ 0x2c
8014b2e: 4b0f ldr r3, [pc, #60] @ (8014b6c <vTaskPriorityDisinheritAfterTimeout+0x104>)
8014b30: 681b ldr r3, [r3, #0]
8014b32: 429a cmp r2, r3
8014b34: d903 bls.n 8014b3e <vTaskPriorityDisinheritAfterTimeout+0xd6>
8014b36: 69bb ldr r3, [r7, #24]
8014b38: 6adb ldr r3, [r3, #44] @ 0x2c
8014b3a: 4a0c ldr r2, [pc, #48] @ (8014b6c <vTaskPriorityDisinheritAfterTimeout+0x104>)
8014b3c: 6013 str r3, [r2, #0]
8014b3e: 69bb ldr r3, [r7, #24]
8014b40: 6ada ldr r2, [r3, #44] @ 0x2c
8014b42: 4613 mov r3, r2
8014b44: 009b lsls r3, r3, #2
8014b46: 4413 add r3, r2
8014b48: 009b lsls r3, r3, #2
8014b4a: 4a07 ldr r2, [pc, #28] @ (8014b68 <vTaskPriorityDisinheritAfterTimeout+0x100>)
8014b4c: 441a add r2, r3
8014b4e: 69bb ldr r3, [r7, #24]
8014b50: 3304 adds r3, #4
8014b52: 4619 mov r1, r3
8014b54: 4610 mov r0, r2
8014b56: f7fd faa0 bl 801209a <vListInsertEnd>
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8014b5a: bf00 nop
8014b5c: 3720 adds r7, #32
8014b5e: 46bd mov sp, r7
8014b60: bd80 pop {r7, pc}
8014b62: bf00 nop
8014b64: 24003db0 .word 0x24003db0
8014b68: 24003db4 .word 0x24003db4
8014b6c: 2400428c .word 0x2400428c
08014b70 <pvTaskIncrementMutexHeldCount>:
/*-----------------------------------------------------------*/
#if ( configUSE_MUTEXES == 1 )
TaskHandle_t pvTaskIncrementMutexHeldCount( void )
{
8014b70: b480 push {r7}
8014b72: af00 add r7, sp, #0
/* If xSemaphoreCreateMutex() is called before any tasks have been created
then pxCurrentTCB will be NULL. */
if( pxCurrentTCB != NULL )
8014b74: 4b07 ldr r3, [pc, #28] @ (8014b94 <pvTaskIncrementMutexHeldCount+0x24>)
8014b76: 681b ldr r3, [r3, #0]
8014b78: 2b00 cmp r3, #0
8014b7a: d004 beq.n 8014b86 <pvTaskIncrementMutexHeldCount+0x16>
{
( pxCurrentTCB->uxMutexesHeld )++;
8014b7c: 4b05 ldr r3, [pc, #20] @ (8014b94 <pvTaskIncrementMutexHeldCount+0x24>)
8014b7e: 681b ldr r3, [r3, #0]
8014b80: 6d1a ldr r2, [r3, #80] @ 0x50
8014b82: 3201 adds r2, #1
8014b84: 651a str r2, [r3, #80] @ 0x50
}
return pxCurrentTCB;
8014b86: 4b03 ldr r3, [pc, #12] @ (8014b94 <pvTaskIncrementMutexHeldCount+0x24>)
8014b88: 681b ldr r3, [r3, #0]
}
8014b8a: 4618 mov r0, r3
8014b8c: 46bd mov sp, r7
8014b8e: f85d 7b04 ldr.w r7, [sp], #4
8014b92: 4770 bx lr
8014b94: 24003db0 .word 0x24003db0
08014b98 <xTaskNotifyWait>:
/*-----------------------------------------------------------*/
#if( configUSE_TASK_NOTIFICATIONS == 1 )
BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
{
8014b98: b580 push {r7, lr}
8014b9a: b086 sub sp, #24
8014b9c: af00 add r7, sp, #0
8014b9e: 60f8 str r0, [r7, #12]
8014ba0: 60b9 str r1, [r7, #8]
8014ba2: 607a str r2, [r7, #4]
8014ba4: 603b str r3, [r7, #0]
BaseType_t xReturn;
taskENTER_CRITICAL();
8014ba6: f000 ffef bl 8015b88 <vPortEnterCritical>
{
/* Only block if a notification is not already pending. */
if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
8014baa: 4b29 ldr r3, [pc, #164] @ (8014c50 <xTaskNotifyWait+0xb8>)
8014bac: 681b ldr r3, [r3, #0]
8014bae: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
8014bb2: b2db uxtb r3, r3
8014bb4: 2b02 cmp r3, #2
8014bb6: d01c beq.n 8014bf2 <xTaskNotifyWait+0x5a>
{
/* Clear bits in the task's notification value as bits may get
set by the notifying task or interrupt. This can be used to
clear the value to zero. */
pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
8014bb8: 4b25 ldr r3, [pc, #148] @ (8014c50 <xTaskNotifyWait+0xb8>)
8014bba: 681b ldr r3, [r3, #0]
8014bbc: f8d3 10a0 ldr.w r1, [r3, #160] @ 0xa0
8014bc0: 68fa ldr r2, [r7, #12]
8014bc2: 43d2 mvns r2, r2
8014bc4: 400a ands r2, r1
8014bc6: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
/* Mark this task as waiting for a notification. */
pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
8014bca: 4b21 ldr r3, [pc, #132] @ (8014c50 <xTaskNotifyWait+0xb8>)
8014bcc: 681b ldr r3, [r3, #0]
8014bce: 2201 movs r2, #1
8014bd0: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
if( xTicksToWait > ( TickType_t ) 0 )
8014bd4: 683b ldr r3, [r7, #0]
8014bd6: 2b00 cmp r3, #0
8014bd8: d00b beq.n 8014bf2 <xTaskNotifyWait+0x5a>
{
prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
8014bda: 2101 movs r1, #1
8014bdc: 6838 ldr r0, [r7, #0]
8014bde: f000 fa09 bl 8014ff4 <prvAddCurrentTaskToDelayedList>
/* All ports are written to allow a yield in a critical
section (some will yield immediately, others wait until the
critical section exits) - but it is not something that
application code should ever do. */
portYIELD_WITHIN_API();
8014be2: 4b1c ldr r3, [pc, #112] @ (8014c54 <xTaskNotifyWait+0xbc>)
8014be4: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8014be8: 601a str r2, [r3, #0]
8014bea: f3bf 8f4f dsb sy
8014bee: f3bf 8f6f isb sy
else
{
mtCOVERAGE_TEST_MARKER();
}
}
taskEXIT_CRITICAL();
8014bf2: f000 fffb bl 8015bec <vPortExitCritical>
taskENTER_CRITICAL();
8014bf6: f000 ffc7 bl 8015b88 <vPortEnterCritical>
{
traceTASK_NOTIFY_WAIT();
if( pulNotificationValue != NULL )
8014bfa: 687b ldr r3, [r7, #4]
8014bfc: 2b00 cmp r3, #0
8014bfe: d005 beq.n 8014c0c <xTaskNotifyWait+0x74>
{
/* Output the current notification value, which may or may not
have changed. */
*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
8014c00: 4b13 ldr r3, [pc, #76] @ (8014c50 <xTaskNotifyWait+0xb8>)
8014c02: 681b ldr r3, [r3, #0]
8014c04: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
8014c08: 687b ldr r3, [r7, #4]
8014c0a: 601a str r2, [r3, #0]
/* If ucNotifyValue is set then either the task never entered the
blocked state (because a notification was already pending) or the
task unblocked because of a notification. Otherwise the task
unblocked because of a timeout. */
if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
8014c0c: 4b10 ldr r3, [pc, #64] @ (8014c50 <xTaskNotifyWait+0xb8>)
8014c0e: 681b ldr r3, [r3, #0]
8014c10: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
8014c14: b2db uxtb r3, r3
8014c16: 2b02 cmp r3, #2
8014c18: d002 beq.n 8014c20 <xTaskNotifyWait+0x88>
{
/* A notification was not received. */
xReturn = pdFALSE;
8014c1a: 2300 movs r3, #0
8014c1c: 617b str r3, [r7, #20]
8014c1e: e00a b.n 8014c36 <xTaskNotifyWait+0x9e>
}
else
{
/* A notification was already pending or a notification was
received while the task was waiting. */
pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
8014c20: 4b0b ldr r3, [pc, #44] @ (8014c50 <xTaskNotifyWait+0xb8>)
8014c22: 681b ldr r3, [r3, #0]
8014c24: f8d3 10a0 ldr.w r1, [r3, #160] @ 0xa0
8014c28: 68ba ldr r2, [r7, #8]
8014c2a: 43d2 mvns r2, r2
8014c2c: 400a ands r2, r1
8014c2e: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
xReturn = pdTRUE;
8014c32: 2301 movs r3, #1
8014c34: 617b str r3, [r7, #20]
}
pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
8014c36: 4b06 ldr r3, [pc, #24] @ (8014c50 <xTaskNotifyWait+0xb8>)
8014c38: 681b ldr r3, [r3, #0]
8014c3a: 2200 movs r2, #0
8014c3c: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
}
taskEXIT_CRITICAL();
8014c40: f000 ffd4 bl 8015bec <vPortExitCritical>
return xReturn;
8014c44: 697b ldr r3, [r7, #20]
}
8014c46: 4618 mov r0, r3
8014c48: 3718 adds r7, #24
8014c4a: 46bd mov sp, r7
8014c4c: bd80 pop {r7, pc}
8014c4e: bf00 nop
8014c50: 24003db0 .word 0x24003db0
8014c54: e000ed04 .word 0xe000ed04
08014c58 <xTaskGenericNotify>:
/*-----------------------------------------------------------*/
#if( configUSE_TASK_NOTIFICATIONS == 1 )
BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
{
8014c58: b580 push {r7, lr}
8014c5a: b08a sub sp, #40 @ 0x28
8014c5c: af00 add r7, sp, #0
8014c5e: 60f8 str r0, [r7, #12]
8014c60: 60b9 str r1, [r7, #8]
8014c62: 603b str r3, [r7, #0]
8014c64: 4613 mov r3, r2
8014c66: 71fb strb r3, [r7, #7]
TCB_t * pxTCB;
BaseType_t xReturn = pdPASS;
8014c68: 2301 movs r3, #1
8014c6a: 627b str r3, [r7, #36] @ 0x24
uint8_t ucOriginalNotifyState;
configASSERT( xTaskToNotify );
8014c6c: 68fb ldr r3, [r7, #12]
8014c6e: 2b00 cmp r3, #0
8014c70: d10b bne.n 8014c8a <xTaskGenericNotify+0x32>
__asm volatile
8014c72: f04f 0350 mov.w r3, #80 @ 0x50
8014c76: f383 8811 msr BASEPRI, r3
8014c7a: f3bf 8f6f isb sy
8014c7e: f3bf 8f4f dsb sy
8014c82: 61bb str r3, [r7, #24]
}
8014c84: bf00 nop
8014c86: bf00 nop
8014c88: e7fd b.n 8014c86 <xTaskGenericNotify+0x2e>
pxTCB = xTaskToNotify;
8014c8a: 68fb ldr r3, [r7, #12]
8014c8c: 623b str r3, [r7, #32]
taskENTER_CRITICAL();
8014c8e: f000 ff7b bl 8015b88 <vPortEnterCritical>
{
if( pulPreviousNotificationValue != NULL )
8014c92: 683b ldr r3, [r7, #0]
8014c94: 2b00 cmp r3, #0
8014c96: d004 beq.n 8014ca2 <xTaskGenericNotify+0x4a>
{
*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
8014c98: 6a3b ldr r3, [r7, #32]
8014c9a: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
8014c9e: 683b ldr r3, [r7, #0]
8014ca0: 601a str r2, [r3, #0]
}
ucOriginalNotifyState = pxTCB->ucNotifyState;
8014ca2: 6a3b ldr r3, [r7, #32]
8014ca4: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
8014ca8: 77fb strb r3, [r7, #31]
pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
8014caa: 6a3b ldr r3, [r7, #32]
8014cac: 2202 movs r2, #2
8014cae: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
switch( eAction )
8014cb2: 79fb ldrb r3, [r7, #7]
8014cb4: 2b04 cmp r3, #4
8014cb6: d82e bhi.n 8014d16 <xTaskGenericNotify+0xbe>
8014cb8: a201 add r2, pc, #4 @ (adr r2, 8014cc0 <xTaskGenericNotify+0x68>)
8014cba: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8014cbe: bf00 nop
8014cc0: 08014d3b .word 0x08014d3b
8014cc4: 08014cd5 .word 0x08014cd5
8014cc8: 08014ce7 .word 0x08014ce7
8014ccc: 08014cf7 .word 0x08014cf7
8014cd0: 08014d01 .word 0x08014d01
{
case eSetBits :
pxTCB->ulNotifiedValue |= ulValue;
8014cd4: 6a3b ldr r3, [r7, #32]
8014cd6: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
8014cda: 68bb ldr r3, [r7, #8]
8014cdc: 431a orrs r2, r3
8014cde: 6a3b ldr r3, [r7, #32]
8014ce0: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
break;
8014ce4: e02c b.n 8014d40 <xTaskGenericNotify+0xe8>
case eIncrement :
( pxTCB->ulNotifiedValue )++;
8014ce6: 6a3b ldr r3, [r7, #32]
8014ce8: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
8014cec: 1c5a adds r2, r3, #1
8014cee: 6a3b ldr r3, [r7, #32]
8014cf0: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
break;
8014cf4: e024 b.n 8014d40 <xTaskGenericNotify+0xe8>
case eSetValueWithOverwrite :
pxTCB->ulNotifiedValue = ulValue;
8014cf6: 6a3b ldr r3, [r7, #32]
8014cf8: 68ba ldr r2, [r7, #8]
8014cfa: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
break;
8014cfe: e01f b.n 8014d40 <xTaskGenericNotify+0xe8>
case eSetValueWithoutOverwrite :
if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
8014d00: 7ffb ldrb r3, [r7, #31]
8014d02: 2b02 cmp r3, #2
8014d04: d004 beq.n 8014d10 <xTaskGenericNotify+0xb8>
{
pxTCB->ulNotifiedValue = ulValue;
8014d06: 6a3b ldr r3, [r7, #32]
8014d08: 68ba ldr r2, [r7, #8]
8014d0a: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
else
{
/* The value could not be written to the task. */
xReturn = pdFAIL;
}
break;
8014d0e: e017 b.n 8014d40 <xTaskGenericNotify+0xe8>
xReturn = pdFAIL;
8014d10: 2300 movs r3, #0
8014d12: 627b str r3, [r7, #36] @ 0x24
break;
8014d14: e014 b.n 8014d40 <xTaskGenericNotify+0xe8>
default:
/* Should not get here if all enums are handled.
Artificially force an assert by testing a value the
compiler can't assume is const. */
configASSERT( pxTCB->ulNotifiedValue == ~0UL );
8014d16: 6a3b ldr r3, [r7, #32]
8014d18: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
8014d1c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8014d20: d00d beq.n 8014d3e <xTaskGenericNotify+0xe6>
__asm volatile
8014d22: f04f 0350 mov.w r3, #80 @ 0x50
8014d26: f383 8811 msr BASEPRI, r3
8014d2a: f3bf 8f6f isb sy
8014d2e: f3bf 8f4f dsb sy
8014d32: 617b str r3, [r7, #20]
}
8014d34: bf00 nop
8014d36: bf00 nop
8014d38: e7fd b.n 8014d36 <xTaskGenericNotify+0xde>
break;
8014d3a: bf00 nop
8014d3c: e000 b.n 8014d40 <xTaskGenericNotify+0xe8>
break;
8014d3e: bf00 nop
traceTASK_NOTIFY();
/* If the task is in the blocked state specifically to wait for a
notification then unblock it now. */
if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
8014d40: 7ffb ldrb r3, [r7, #31]
8014d42: 2b01 cmp r3, #1
8014d44: d13b bne.n 8014dbe <xTaskGenericNotify+0x166>
{
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
8014d46: 6a3b ldr r3, [r7, #32]
8014d48: 3304 adds r3, #4
8014d4a: 4618 mov r0, r3
8014d4c: f7fd fa02 bl 8012154 <uxListRemove>
prvAddTaskToReadyList( pxTCB );
8014d50: 6a3b ldr r3, [r7, #32]
8014d52: 6ada ldr r2, [r3, #44] @ 0x2c
8014d54: 4b1d ldr r3, [pc, #116] @ (8014dcc <xTaskGenericNotify+0x174>)
8014d56: 681b ldr r3, [r3, #0]
8014d58: 429a cmp r2, r3
8014d5a: d903 bls.n 8014d64 <xTaskGenericNotify+0x10c>
8014d5c: 6a3b ldr r3, [r7, #32]
8014d5e: 6adb ldr r3, [r3, #44] @ 0x2c
8014d60: 4a1a ldr r2, [pc, #104] @ (8014dcc <xTaskGenericNotify+0x174>)
8014d62: 6013 str r3, [r2, #0]
8014d64: 6a3b ldr r3, [r7, #32]
8014d66: 6ada ldr r2, [r3, #44] @ 0x2c
8014d68: 4613 mov r3, r2
8014d6a: 009b lsls r3, r3, #2
8014d6c: 4413 add r3, r2
8014d6e: 009b lsls r3, r3, #2
8014d70: 4a17 ldr r2, [pc, #92] @ (8014dd0 <xTaskGenericNotify+0x178>)
8014d72: 441a add r2, r3
8014d74: 6a3b ldr r3, [r7, #32]
8014d76: 3304 adds r3, #4
8014d78: 4619 mov r1, r3
8014d7a: 4610 mov r0, r2
8014d7c: f7fd f98d bl 801209a <vListInsertEnd>
/* The task should not have been on an event list. */
configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
8014d80: 6a3b ldr r3, [r7, #32]
8014d82: 6a9b ldr r3, [r3, #40] @ 0x28
8014d84: 2b00 cmp r3, #0
8014d86: d00b beq.n 8014da0 <xTaskGenericNotify+0x148>
__asm volatile
8014d88: f04f 0350 mov.w r3, #80 @ 0x50
8014d8c: f383 8811 msr BASEPRI, r3
8014d90: f3bf 8f6f isb sy
8014d94: f3bf 8f4f dsb sy
8014d98: 613b str r3, [r7, #16]
}
8014d9a: bf00 nop
8014d9c: bf00 nop
8014d9e: e7fd b.n 8014d9c <xTaskGenericNotify+0x144>
earliest possible time. */
prvResetNextTaskUnblockTime();
}
#endif
if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
8014da0: 6a3b ldr r3, [r7, #32]
8014da2: 6ada ldr r2, [r3, #44] @ 0x2c
8014da4: 4b0b ldr r3, [pc, #44] @ (8014dd4 <xTaskGenericNotify+0x17c>)
8014da6: 681b ldr r3, [r3, #0]
8014da8: 6adb ldr r3, [r3, #44] @ 0x2c
8014daa: 429a cmp r2, r3
8014dac: d907 bls.n 8014dbe <xTaskGenericNotify+0x166>
{
/* The notified task has a priority above the currently
executing task so a yield is required. */
taskYIELD_IF_USING_PREEMPTION();
8014dae: 4b0a ldr r3, [pc, #40] @ (8014dd8 <xTaskGenericNotify+0x180>)
8014db0: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8014db4: 601a str r2, [r3, #0]
8014db6: f3bf 8f4f dsb sy
8014dba: f3bf 8f6f isb sy
else
{
mtCOVERAGE_TEST_MARKER();
}
}
taskEXIT_CRITICAL();
8014dbe: f000 ff15 bl 8015bec <vPortExitCritical>
return xReturn;
8014dc2: 6a7b ldr r3, [r7, #36] @ 0x24
}
8014dc4: 4618 mov r0, r3
8014dc6: 3728 adds r7, #40 @ 0x28
8014dc8: 46bd mov sp, r7
8014dca: bd80 pop {r7, pc}
8014dcc: 2400428c .word 0x2400428c
8014dd0: 24003db4 .word 0x24003db4
8014dd4: 24003db0 .word 0x24003db0
8014dd8: e000ed04 .word 0xe000ed04
08014ddc <xTaskGenericNotifyFromISR>:
/*-----------------------------------------------------------*/
#if( configUSE_TASK_NOTIFICATIONS == 1 )
BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
{
8014ddc: b580 push {r7, lr}
8014dde: b08e sub sp, #56 @ 0x38
8014de0: af00 add r7, sp, #0
8014de2: 60f8 str r0, [r7, #12]
8014de4: 60b9 str r1, [r7, #8]
8014de6: 603b str r3, [r7, #0]
8014de8: 4613 mov r3, r2
8014dea: 71fb strb r3, [r7, #7]
TCB_t * pxTCB;
uint8_t ucOriginalNotifyState;
BaseType_t xReturn = pdPASS;
8014dec: 2301 movs r3, #1
8014dee: 637b str r3, [r7, #52] @ 0x34
UBaseType_t uxSavedInterruptStatus;
configASSERT( xTaskToNotify );
8014df0: 68fb ldr r3, [r7, #12]
8014df2: 2b00 cmp r3, #0
8014df4: d10b bne.n 8014e0e <xTaskGenericNotifyFromISR+0x32>
__asm volatile
8014df6: f04f 0350 mov.w r3, #80 @ 0x50
8014dfa: f383 8811 msr BASEPRI, r3
8014dfe: f3bf 8f6f isb sy
8014e02: f3bf 8f4f dsb sy
8014e06: 627b str r3, [r7, #36] @ 0x24
}
8014e08: bf00 nop
8014e0a: bf00 nop
8014e0c: e7fd b.n 8014e0a <xTaskGenericNotifyFromISR+0x2e>
below the maximum system call interrupt priority. FreeRTOS maintains a
separate interrupt safe API to ensure interrupt entry is as fast and as
simple as possible. More information (albeit Cortex-M specific) is
provided on the following link:
http://www.freertos.org/RTOS-Cortex-M3-M4.html */
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
8014e0e: f000 ff9b bl 8015d48 <vPortValidateInterruptPriority>
pxTCB = xTaskToNotify;
8014e12: 68fb ldr r3, [r7, #12]
8014e14: 633b str r3, [r7, #48] @ 0x30
__asm volatile
8014e16: f3ef 8211 mrs r2, BASEPRI
8014e1a: f04f 0350 mov.w r3, #80 @ 0x50
8014e1e: f383 8811 msr BASEPRI, r3
8014e22: f3bf 8f6f isb sy
8014e26: f3bf 8f4f dsb sy
8014e2a: 623a str r2, [r7, #32]
8014e2c: 61fb str r3, [r7, #28]
return ulOriginalBASEPRI;
8014e2e: 6a3b ldr r3, [r7, #32]
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
8014e30: 62fb str r3, [r7, #44] @ 0x2c
{
if( pulPreviousNotificationValue != NULL )
8014e32: 683b ldr r3, [r7, #0]
8014e34: 2b00 cmp r3, #0
8014e36: d004 beq.n 8014e42 <xTaskGenericNotifyFromISR+0x66>
{
*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
8014e38: 6b3b ldr r3, [r7, #48] @ 0x30
8014e3a: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
8014e3e: 683b ldr r3, [r7, #0]
8014e40: 601a str r2, [r3, #0]
}
ucOriginalNotifyState = pxTCB->ucNotifyState;
8014e42: 6b3b ldr r3, [r7, #48] @ 0x30
8014e44: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
8014e48: f887 302b strb.w r3, [r7, #43] @ 0x2b
pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
8014e4c: 6b3b ldr r3, [r7, #48] @ 0x30
8014e4e: 2202 movs r2, #2
8014e50: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
switch( eAction )
8014e54: 79fb ldrb r3, [r7, #7]
8014e56: 2b04 cmp r3, #4
8014e58: d82e bhi.n 8014eb8 <xTaskGenericNotifyFromISR+0xdc>
8014e5a: a201 add r2, pc, #4 @ (adr r2, 8014e60 <xTaskGenericNotifyFromISR+0x84>)
8014e5c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8014e60: 08014edd .word 0x08014edd
8014e64: 08014e75 .word 0x08014e75
8014e68: 08014e87 .word 0x08014e87
8014e6c: 08014e97 .word 0x08014e97
8014e70: 08014ea1 .word 0x08014ea1
{
case eSetBits :
pxTCB->ulNotifiedValue |= ulValue;
8014e74: 6b3b ldr r3, [r7, #48] @ 0x30
8014e76: f8d3 20a0 ldr.w r2, [r3, #160] @ 0xa0
8014e7a: 68bb ldr r3, [r7, #8]
8014e7c: 431a orrs r2, r3
8014e7e: 6b3b ldr r3, [r7, #48] @ 0x30
8014e80: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
break;
8014e84: e02d b.n 8014ee2 <xTaskGenericNotifyFromISR+0x106>
case eIncrement :
( pxTCB->ulNotifiedValue )++;
8014e86: 6b3b ldr r3, [r7, #48] @ 0x30
8014e88: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
8014e8c: 1c5a adds r2, r3, #1
8014e8e: 6b3b ldr r3, [r7, #48] @ 0x30
8014e90: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
break;
8014e94: e025 b.n 8014ee2 <xTaskGenericNotifyFromISR+0x106>
case eSetValueWithOverwrite :
pxTCB->ulNotifiedValue = ulValue;
8014e96: 6b3b ldr r3, [r7, #48] @ 0x30
8014e98: 68ba ldr r2, [r7, #8]
8014e9a: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
break;
8014e9e: e020 b.n 8014ee2 <xTaskGenericNotifyFromISR+0x106>
case eSetValueWithoutOverwrite :
if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
8014ea0: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8014ea4: 2b02 cmp r3, #2
8014ea6: d004 beq.n 8014eb2 <xTaskGenericNotifyFromISR+0xd6>
{
pxTCB->ulNotifiedValue = ulValue;
8014ea8: 6b3b ldr r3, [r7, #48] @ 0x30
8014eaa: 68ba ldr r2, [r7, #8]
8014eac: f8c3 20a0 str.w r2, [r3, #160] @ 0xa0
else
{
/* The value could not be written to the task. */
xReturn = pdFAIL;
}
break;
8014eb0: e017 b.n 8014ee2 <xTaskGenericNotifyFromISR+0x106>
xReturn = pdFAIL;
8014eb2: 2300 movs r3, #0
8014eb4: 637b str r3, [r7, #52] @ 0x34
break;
8014eb6: e014 b.n 8014ee2 <xTaskGenericNotifyFromISR+0x106>
default:
/* Should not get here if all enums are handled.
Artificially force an assert by testing a value the
compiler can't assume is const. */
configASSERT( pxTCB->ulNotifiedValue == ~0UL );
8014eb8: 6b3b ldr r3, [r7, #48] @ 0x30
8014eba: f8d3 30a0 ldr.w r3, [r3, #160] @ 0xa0
8014ebe: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8014ec2: d00d beq.n 8014ee0 <xTaskGenericNotifyFromISR+0x104>
__asm volatile
8014ec4: f04f 0350 mov.w r3, #80 @ 0x50
8014ec8: f383 8811 msr BASEPRI, r3
8014ecc: f3bf 8f6f isb sy
8014ed0: f3bf 8f4f dsb sy
8014ed4: 61bb str r3, [r7, #24]
}
8014ed6: bf00 nop
8014ed8: bf00 nop
8014eda: e7fd b.n 8014ed8 <xTaskGenericNotifyFromISR+0xfc>
break;
8014edc: bf00 nop
8014ede: e000 b.n 8014ee2 <xTaskGenericNotifyFromISR+0x106>
break;
8014ee0: bf00 nop
traceTASK_NOTIFY_FROM_ISR();
/* If the task is in the blocked state specifically to wait for a
notification then unblock it now. */
if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
8014ee2: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8014ee6: 2b01 cmp r3, #1
8014ee8: d147 bne.n 8014f7a <xTaskGenericNotifyFromISR+0x19e>
{
/* The task should not have been on an event list. */
configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
8014eea: 6b3b ldr r3, [r7, #48] @ 0x30
8014eec: 6a9b ldr r3, [r3, #40] @ 0x28
8014eee: 2b00 cmp r3, #0
8014ef0: d00b beq.n 8014f0a <xTaskGenericNotifyFromISR+0x12e>
__asm volatile
8014ef2: f04f 0350 mov.w r3, #80 @ 0x50
8014ef6: f383 8811 msr BASEPRI, r3
8014efa: f3bf 8f6f isb sy
8014efe: f3bf 8f4f dsb sy
8014f02: 617b str r3, [r7, #20]
}
8014f04: bf00 nop
8014f06: bf00 nop
8014f08: e7fd b.n 8014f06 <xTaskGenericNotifyFromISR+0x12a>
if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
8014f0a: 4b21 ldr r3, [pc, #132] @ (8014f90 <xTaskGenericNotifyFromISR+0x1b4>)
8014f0c: 681b ldr r3, [r3, #0]
8014f0e: 2b00 cmp r3, #0
8014f10: d11d bne.n 8014f4e <xTaskGenericNotifyFromISR+0x172>
{
( void ) uxListRemove( &( pxTCB->xStateListItem ) );
8014f12: 6b3b ldr r3, [r7, #48] @ 0x30
8014f14: 3304 adds r3, #4
8014f16: 4618 mov r0, r3
8014f18: f7fd f91c bl 8012154 <uxListRemove>
prvAddTaskToReadyList( pxTCB );
8014f1c: 6b3b ldr r3, [r7, #48] @ 0x30
8014f1e: 6ada ldr r2, [r3, #44] @ 0x2c
8014f20: 4b1c ldr r3, [pc, #112] @ (8014f94 <xTaskGenericNotifyFromISR+0x1b8>)
8014f22: 681b ldr r3, [r3, #0]
8014f24: 429a cmp r2, r3
8014f26: d903 bls.n 8014f30 <xTaskGenericNotifyFromISR+0x154>
8014f28: 6b3b ldr r3, [r7, #48] @ 0x30
8014f2a: 6adb ldr r3, [r3, #44] @ 0x2c
8014f2c: 4a19 ldr r2, [pc, #100] @ (8014f94 <xTaskGenericNotifyFromISR+0x1b8>)
8014f2e: 6013 str r3, [r2, #0]
8014f30: 6b3b ldr r3, [r7, #48] @ 0x30
8014f32: 6ada ldr r2, [r3, #44] @ 0x2c
8014f34: 4613 mov r3, r2
8014f36: 009b lsls r3, r3, #2
8014f38: 4413 add r3, r2
8014f3a: 009b lsls r3, r3, #2
8014f3c: 4a16 ldr r2, [pc, #88] @ (8014f98 <xTaskGenericNotifyFromISR+0x1bc>)
8014f3e: 441a add r2, r3
8014f40: 6b3b ldr r3, [r7, #48] @ 0x30
8014f42: 3304 adds r3, #4
8014f44: 4619 mov r1, r3
8014f46: 4610 mov r0, r2
8014f48: f7fd f8a7 bl 801209a <vListInsertEnd>
8014f4c: e005 b.n 8014f5a <xTaskGenericNotifyFromISR+0x17e>
}
else
{
/* The delayed and ready lists cannot be accessed, so hold
this task pending until the scheduler is resumed. */
vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
8014f4e: 6b3b ldr r3, [r7, #48] @ 0x30
8014f50: 3318 adds r3, #24
8014f52: 4619 mov r1, r3
8014f54: 4811 ldr r0, [pc, #68] @ (8014f9c <xTaskGenericNotifyFromISR+0x1c0>)
8014f56: f7fd f8a0 bl 801209a <vListInsertEnd>
}
if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
8014f5a: 6b3b ldr r3, [r7, #48] @ 0x30
8014f5c: 6ada ldr r2, [r3, #44] @ 0x2c
8014f5e: 4b10 ldr r3, [pc, #64] @ (8014fa0 <xTaskGenericNotifyFromISR+0x1c4>)
8014f60: 681b ldr r3, [r3, #0]
8014f62: 6adb ldr r3, [r3, #44] @ 0x2c
8014f64: 429a cmp r2, r3
8014f66: d908 bls.n 8014f7a <xTaskGenericNotifyFromISR+0x19e>
{
/* The notified task has a priority above the currently
executing task so a yield is required. */
if( pxHigherPriorityTaskWoken != NULL )
8014f68: 6c3b ldr r3, [r7, #64] @ 0x40
8014f6a: 2b00 cmp r3, #0
8014f6c: d002 beq.n 8014f74 <xTaskGenericNotifyFromISR+0x198>
{
*pxHigherPriorityTaskWoken = pdTRUE;
8014f6e: 6c3b ldr r3, [r7, #64] @ 0x40
8014f70: 2201 movs r2, #1
8014f72: 601a str r2, [r3, #0]
}
/* Mark that a yield is pending in case the user is not
using the "xHigherPriorityTaskWoken" parameter to an ISR
safe FreeRTOS function. */
xYieldPending = pdTRUE;
8014f74: 4b0b ldr r3, [pc, #44] @ (8014fa4 <xTaskGenericNotifyFromISR+0x1c8>)
8014f76: 2201 movs r2, #1
8014f78: 601a str r2, [r3, #0]
8014f7a: 6afb ldr r3, [r7, #44] @ 0x2c
8014f7c: 613b str r3, [r7, #16]
__asm volatile
8014f7e: 693b ldr r3, [r7, #16]
8014f80: f383 8811 msr BASEPRI, r3
}
8014f84: bf00 nop
}
}
}
portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
return xReturn;
8014f86: 6b7b ldr r3, [r7, #52] @ 0x34
}
8014f88: 4618 mov r0, r3
8014f8a: 3738 adds r7, #56 @ 0x38
8014f8c: 46bd mov sp, r7
8014f8e: bd80 pop {r7, pc}
8014f90: 240042ac .word 0x240042ac
8014f94: 2400428c .word 0x2400428c
8014f98: 24003db4 .word 0x24003db4
8014f9c: 24004244 .word 0x24004244
8014fa0: 24003db0 .word 0x24003db0
8014fa4: 24004298 .word 0x24004298
08014fa8 <xTaskNotifyStateClear>:
/*-----------------------------------------------------------*/
#if( configUSE_TASK_NOTIFICATIONS == 1 )
BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
{
8014fa8: b580 push {r7, lr}
8014faa: b084 sub sp, #16
8014fac: af00 add r7, sp, #0
8014fae: 6078 str r0, [r7, #4]
TCB_t *pxTCB;
BaseType_t xReturn;
/* If null is passed in here then it is the calling task that is having
its notification state cleared. */
pxTCB = prvGetTCBFromHandle( xTask );
8014fb0: 687b ldr r3, [r7, #4]
8014fb2: 2b00 cmp r3, #0
8014fb4: d102 bne.n 8014fbc <xTaskNotifyStateClear+0x14>
8014fb6: 4b0e ldr r3, [pc, #56] @ (8014ff0 <xTaskNotifyStateClear+0x48>)
8014fb8: 681b ldr r3, [r3, #0]
8014fba: e000 b.n 8014fbe <xTaskNotifyStateClear+0x16>
8014fbc: 687b ldr r3, [r7, #4]
8014fbe: 60bb str r3, [r7, #8]
taskENTER_CRITICAL();
8014fc0: f000 fde2 bl 8015b88 <vPortEnterCritical>
{
if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
8014fc4: 68bb ldr r3, [r7, #8]
8014fc6: f893 30a4 ldrb.w r3, [r3, #164] @ 0xa4
8014fca: b2db uxtb r3, r3
8014fcc: 2b02 cmp r3, #2
8014fce: d106 bne.n 8014fde <xTaskNotifyStateClear+0x36>
{
pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
8014fd0: 68bb ldr r3, [r7, #8]
8014fd2: 2200 movs r2, #0
8014fd4: f883 20a4 strb.w r2, [r3, #164] @ 0xa4
xReturn = pdPASS;
8014fd8: 2301 movs r3, #1
8014fda: 60fb str r3, [r7, #12]
8014fdc: e001 b.n 8014fe2 <xTaskNotifyStateClear+0x3a>
}
else
{
xReturn = pdFAIL;
8014fde: 2300 movs r3, #0
8014fe0: 60fb str r3, [r7, #12]
}
}
taskEXIT_CRITICAL();
8014fe2: f000 fe03 bl 8015bec <vPortExitCritical>
return xReturn;
8014fe6: 68fb ldr r3, [r7, #12]
}
8014fe8: 4618 mov r0, r3
8014fea: 3710 adds r7, #16
8014fec: 46bd mov sp, r7
8014fee: bd80 pop {r7, pc}
8014ff0: 24003db0 .word 0x24003db0
08014ff4 <prvAddCurrentTaskToDelayedList>:
#endif
/*-----------------------------------------------------------*/
static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
{
8014ff4: b580 push {r7, lr}
8014ff6: b084 sub sp, #16
8014ff8: af00 add r7, sp, #0
8014ffa: 6078 str r0, [r7, #4]
8014ffc: 6039 str r1, [r7, #0]
TickType_t xTimeToWake;
const TickType_t xConstTickCount = xTickCount;
8014ffe: 4b21 ldr r3, [pc, #132] @ (8015084 <prvAddCurrentTaskToDelayedList+0x90>)
8015000: 681b ldr r3, [r3, #0]
8015002: 60fb str r3, [r7, #12]
}
#endif
/* Remove the task from the ready list before adding it to the blocked list
as the same list item is used for both lists. */
if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
8015004: 4b20 ldr r3, [pc, #128] @ (8015088 <prvAddCurrentTaskToDelayedList+0x94>)
8015006: 681b ldr r3, [r3, #0]
8015008: 3304 adds r3, #4
801500a: 4618 mov r0, r3
801500c: f7fd f8a2 bl 8012154 <uxListRemove>
mtCOVERAGE_TEST_MARKER();
}
#if ( INCLUDE_vTaskSuspend == 1 )
{
if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
8015010: 687b ldr r3, [r7, #4]
8015012: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8015016: d10a bne.n 801502e <prvAddCurrentTaskToDelayedList+0x3a>
8015018: 683b ldr r3, [r7, #0]
801501a: 2b00 cmp r3, #0
801501c: d007 beq.n 801502e <prvAddCurrentTaskToDelayedList+0x3a>
{
/* Add the task to the suspended task list instead of a delayed task
list to ensure it is not woken by a timing event. It will block
indefinitely. */
vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
801501e: 4b1a ldr r3, [pc, #104] @ (8015088 <prvAddCurrentTaskToDelayedList+0x94>)
8015020: 681b ldr r3, [r3, #0]
8015022: 3304 adds r3, #4
8015024: 4619 mov r1, r3
8015026: 4819 ldr r0, [pc, #100] @ (801508c <prvAddCurrentTaskToDelayedList+0x98>)
8015028: f7fd f837 bl 801209a <vListInsertEnd>
/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
( void ) xCanBlockIndefinitely;
}
#endif /* INCLUDE_vTaskSuspend */
}
801502c: e026 b.n 801507c <prvAddCurrentTaskToDelayedList+0x88>
xTimeToWake = xConstTickCount + xTicksToWait;
801502e: 68fa ldr r2, [r7, #12]
8015030: 687b ldr r3, [r7, #4]
8015032: 4413 add r3, r2
8015034: 60bb str r3, [r7, #8]
listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
8015036: 4b14 ldr r3, [pc, #80] @ (8015088 <prvAddCurrentTaskToDelayedList+0x94>)
8015038: 681b ldr r3, [r3, #0]
801503a: 68ba ldr r2, [r7, #8]
801503c: 605a str r2, [r3, #4]
if( xTimeToWake < xConstTickCount )
801503e: 68ba ldr r2, [r7, #8]
8015040: 68fb ldr r3, [r7, #12]
8015042: 429a cmp r2, r3
8015044: d209 bcs.n 801505a <prvAddCurrentTaskToDelayedList+0x66>
vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
8015046: 4b12 ldr r3, [pc, #72] @ (8015090 <prvAddCurrentTaskToDelayedList+0x9c>)
8015048: 681a ldr r2, [r3, #0]
801504a: 4b0f ldr r3, [pc, #60] @ (8015088 <prvAddCurrentTaskToDelayedList+0x94>)
801504c: 681b ldr r3, [r3, #0]
801504e: 3304 adds r3, #4
8015050: 4619 mov r1, r3
8015052: 4610 mov r0, r2
8015054: f7fd f845 bl 80120e2 <vListInsert>
}
8015058: e010 b.n 801507c <prvAddCurrentTaskToDelayedList+0x88>
vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
801505a: 4b0e ldr r3, [pc, #56] @ (8015094 <prvAddCurrentTaskToDelayedList+0xa0>)
801505c: 681a ldr r2, [r3, #0]
801505e: 4b0a ldr r3, [pc, #40] @ (8015088 <prvAddCurrentTaskToDelayedList+0x94>)
8015060: 681b ldr r3, [r3, #0]
8015062: 3304 adds r3, #4
8015064: 4619 mov r1, r3
8015066: 4610 mov r0, r2
8015068: f7fd f83b bl 80120e2 <vListInsert>
if( xTimeToWake < xNextTaskUnblockTime )
801506c: 4b0a ldr r3, [pc, #40] @ (8015098 <prvAddCurrentTaskToDelayedList+0xa4>)
801506e: 681b ldr r3, [r3, #0]
8015070: 68ba ldr r2, [r7, #8]
8015072: 429a cmp r2, r3
8015074: d202 bcs.n 801507c <prvAddCurrentTaskToDelayedList+0x88>
xNextTaskUnblockTime = xTimeToWake;
8015076: 4a08 ldr r2, [pc, #32] @ (8015098 <prvAddCurrentTaskToDelayedList+0xa4>)
8015078: 68bb ldr r3, [r7, #8]
801507a: 6013 str r3, [r2, #0]
}
801507c: bf00 nop
801507e: 3710 adds r7, #16
8015080: 46bd mov sp, r7
8015082: bd80 pop {r7, pc}
8015084: 24004288 .word 0x24004288
8015088: 24003db0 .word 0x24003db0
801508c: 24004270 .word 0x24004270
8015090: 24004240 .word 0x24004240
8015094: 2400423c .word 0x2400423c
8015098: 240042a4 .word 0x240042a4
0801509c <xTimerCreateTimerTask>:
TimerCallbackFunction_t pxCallbackFunction,
Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
/*-----------------------------------------------------------*/
BaseType_t xTimerCreateTimerTask( void )
{
801509c: b580 push {r7, lr}
801509e: b08a sub sp, #40 @ 0x28
80150a0: af04 add r7, sp, #16
BaseType_t xReturn = pdFAIL;
80150a2: 2300 movs r3, #0
80150a4: 617b str r3, [r7, #20]
/* This function is called when the scheduler is started if
configUSE_TIMERS is set to 1. Check that the infrastructure used by the
timer service task has been created/initialised. If timers have already
been created then the initialisation will already have been performed. */
prvCheckForValidListAndQueue();
80150a6: f000 fbb1 bl 801580c <prvCheckForValidListAndQueue>
if( xTimerQueue != NULL )
80150aa: 4b1d ldr r3, [pc, #116] @ (8015120 <xTimerCreateTimerTask+0x84>)
80150ac: 681b ldr r3, [r3, #0]
80150ae: 2b00 cmp r3, #0
80150b0: d021 beq.n 80150f6 <xTimerCreateTimerTask+0x5a>
{
#if( configSUPPORT_STATIC_ALLOCATION == 1 )
{
StaticTask_t *pxTimerTaskTCBBuffer = NULL;
80150b2: 2300 movs r3, #0
80150b4: 60fb str r3, [r7, #12]
StackType_t *pxTimerTaskStackBuffer = NULL;
80150b6: 2300 movs r3, #0
80150b8: 60bb str r3, [r7, #8]
uint32_t ulTimerTaskStackSize;
vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
80150ba: 1d3a adds r2, r7, #4
80150bc: f107 0108 add.w r1, r7, #8
80150c0: f107 030c add.w r3, r7, #12
80150c4: 4618 mov r0, r3
80150c6: f7fc ffa1 bl 801200c <vApplicationGetTimerTaskMemory>
xTimerTaskHandle = xTaskCreateStatic( prvTimerTask,
80150ca: 6879 ldr r1, [r7, #4]
80150cc: 68bb ldr r3, [r7, #8]
80150ce: 68fa ldr r2, [r7, #12]
80150d0: 9202 str r2, [sp, #8]
80150d2: 9301 str r3, [sp, #4]
80150d4: 2302 movs r3, #2
80150d6: 9300 str r3, [sp, #0]
80150d8: 2300 movs r3, #0
80150da: 460a mov r2, r1
80150dc: 4911 ldr r1, [pc, #68] @ (8015124 <xTimerCreateTimerTask+0x88>)
80150de: 4812 ldr r0, [pc, #72] @ (8015128 <xTimerCreateTimerTask+0x8c>)
80150e0: f7fe fd1c bl 8013b1c <xTaskCreateStatic>
80150e4: 4603 mov r3, r0
80150e6: 4a11 ldr r2, [pc, #68] @ (801512c <xTimerCreateTimerTask+0x90>)
80150e8: 6013 str r3, [r2, #0]
NULL,
( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
pxTimerTaskStackBuffer,
pxTimerTaskTCBBuffer );
if( xTimerTaskHandle != NULL )
80150ea: 4b10 ldr r3, [pc, #64] @ (801512c <xTimerCreateTimerTask+0x90>)
80150ec: 681b ldr r3, [r3, #0]
80150ee: 2b00 cmp r3, #0
80150f0: d001 beq.n 80150f6 <xTimerCreateTimerTask+0x5a>
{
xReturn = pdPASS;
80150f2: 2301 movs r3, #1
80150f4: 617b str r3, [r7, #20]
else
{
mtCOVERAGE_TEST_MARKER();
}
configASSERT( xReturn );
80150f6: 697b ldr r3, [r7, #20]
80150f8: 2b00 cmp r3, #0
80150fa: d10b bne.n 8015114 <xTimerCreateTimerTask+0x78>
__asm volatile
80150fc: f04f 0350 mov.w r3, #80 @ 0x50
8015100: f383 8811 msr BASEPRI, r3
8015104: f3bf 8f6f isb sy
8015108: f3bf 8f4f dsb sy
801510c: 613b str r3, [r7, #16]
}
801510e: bf00 nop
8015110: bf00 nop
8015112: e7fd b.n 8015110 <xTimerCreateTimerTask+0x74>
return xReturn;
8015114: 697b ldr r3, [r7, #20]
}
8015116: 4618 mov r0, r3
8015118: 3718 adds r7, #24
801511a: 46bd mov sp, r7
801511c: bd80 pop {r7, pc}
801511e: bf00 nop
8015120: 240042e0 .word 0x240042e0
8015124: 0802ddbc .word 0x0802ddbc
8015128: 080153a5 .word 0x080153a5
801512c: 240042e4 .word 0x240042e4
08015130 <xTimerCreate>:
TimerHandle_t xTimerCreate( const char * const pcTimerName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
const TickType_t xTimerPeriodInTicks,
const UBaseType_t uxAutoReload,
void * const pvTimerID,
TimerCallbackFunction_t pxCallbackFunction )
{
8015130: b580 push {r7, lr}
8015132: b088 sub sp, #32
8015134: af02 add r7, sp, #8
8015136: 60f8 str r0, [r7, #12]
8015138: 60b9 str r1, [r7, #8]
801513a: 607a str r2, [r7, #4]
801513c: 603b str r3, [r7, #0]
Timer_t *pxNewTimer;
pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */
801513e: 202c movs r0, #44 @ 0x2c
8015140: f000 fe44 bl 8015dcc <pvPortMalloc>
8015144: 6178 str r0, [r7, #20]
if( pxNewTimer != NULL )
8015146: 697b ldr r3, [r7, #20]
8015148: 2b00 cmp r3, #0
801514a: d00d beq.n 8015168 <xTimerCreate+0x38>
{
/* Status is thus far zero as the timer is not created statically
and has not been started. The auto-reload bit may get set in
prvInitialiseNewTimer. */
pxNewTimer->ucStatus = 0x00;
801514c: 697b ldr r3, [r7, #20]
801514e: 2200 movs r2, #0
8015150: f883 2028 strb.w r2, [r3, #40] @ 0x28
prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
8015154: 697b ldr r3, [r7, #20]
8015156: 9301 str r3, [sp, #4]
8015158: 6a3b ldr r3, [r7, #32]
801515a: 9300 str r3, [sp, #0]
801515c: 683b ldr r3, [r7, #0]
801515e: 687a ldr r2, [r7, #4]
8015160: 68b9 ldr r1, [r7, #8]
8015162: 68f8 ldr r0, [r7, #12]
8015164: f000 f845 bl 80151f2 <prvInitialiseNewTimer>
}
return pxNewTimer;
8015168: 697b ldr r3, [r7, #20]
}
801516a: 4618 mov r0, r3
801516c: 3718 adds r7, #24
801516e: 46bd mov sp, r7
8015170: bd80 pop {r7, pc}
08015172 <xTimerCreateStatic>:
const TickType_t xTimerPeriodInTicks,
const UBaseType_t uxAutoReload,
void * const pvTimerID,
TimerCallbackFunction_t pxCallbackFunction,
StaticTimer_t *pxTimerBuffer )
{
8015172: b580 push {r7, lr}
8015174: b08a sub sp, #40 @ 0x28
8015176: af02 add r7, sp, #8
8015178: 60f8 str r0, [r7, #12]
801517a: 60b9 str r1, [r7, #8]
801517c: 607a str r2, [r7, #4]
801517e: 603b str r3, [r7, #0]
#if( configASSERT_DEFINED == 1 )
{
/* Sanity check that the size of the structure used to declare a
variable of type StaticTimer_t equals the size of the real timer
structure. */
volatile size_t xSize = sizeof( StaticTimer_t );
8015180: 232c movs r3, #44 @ 0x2c
8015182: 613b str r3, [r7, #16]
configASSERT( xSize == sizeof( Timer_t ) );
8015184: 693b ldr r3, [r7, #16]
8015186: 2b2c cmp r3, #44 @ 0x2c
8015188: d00b beq.n 80151a2 <xTimerCreateStatic+0x30>
__asm volatile
801518a: f04f 0350 mov.w r3, #80 @ 0x50
801518e: f383 8811 msr BASEPRI, r3
8015192: f3bf 8f6f isb sy
8015196: f3bf 8f4f dsb sy
801519a: 61bb str r3, [r7, #24]
}
801519c: bf00 nop
801519e: bf00 nop
80151a0: e7fd b.n 801519e <xTimerCreateStatic+0x2c>
( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
80151a2: 693b ldr r3, [r7, #16]
}
#endif /* configASSERT_DEFINED */
/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
configASSERT( pxTimerBuffer );
80151a4: 6afb ldr r3, [r7, #44] @ 0x2c
80151a6: 2b00 cmp r3, #0
80151a8: d10b bne.n 80151c2 <xTimerCreateStatic+0x50>
__asm volatile
80151aa: f04f 0350 mov.w r3, #80 @ 0x50
80151ae: f383 8811 msr BASEPRI, r3
80151b2: f3bf 8f6f isb sy
80151b6: f3bf 8f4f dsb sy
80151ba: 617b str r3, [r7, #20]
}
80151bc: bf00 nop
80151be: bf00 nop
80151c0: e7fd b.n 80151be <xTimerCreateStatic+0x4c>
pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
80151c2: 6afb ldr r3, [r7, #44] @ 0x2c
80151c4: 61fb str r3, [r7, #28]
if( pxNewTimer != NULL )
80151c6: 69fb ldr r3, [r7, #28]
80151c8: 2b00 cmp r3, #0
80151ca: d00d beq.n 80151e8 <xTimerCreateStatic+0x76>
{
/* Timers can be created statically or dynamically so note this
timer was created statically in case it is later deleted. The
auto-reload bit may get set in prvInitialiseNewTimer(). */
pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED;
80151cc: 69fb ldr r3, [r7, #28]
80151ce: 2202 movs r2, #2
80151d0: f883 2028 strb.w r2, [r3, #40] @ 0x28
prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
80151d4: 69fb ldr r3, [r7, #28]
80151d6: 9301 str r3, [sp, #4]
80151d8: 6abb ldr r3, [r7, #40] @ 0x28
80151da: 9300 str r3, [sp, #0]
80151dc: 683b ldr r3, [r7, #0]
80151de: 687a ldr r2, [r7, #4]
80151e0: 68b9 ldr r1, [r7, #8]
80151e2: 68f8 ldr r0, [r7, #12]
80151e4: f000 f805 bl 80151f2 <prvInitialiseNewTimer>
}
return pxNewTimer;
80151e8: 69fb ldr r3, [r7, #28]
}
80151ea: 4618 mov r0, r3
80151ec: 3720 adds r7, #32
80151ee: 46bd mov sp, r7
80151f0: bd80 pop {r7, pc}
080151f2 <prvInitialiseNewTimer>:
const TickType_t xTimerPeriodInTicks,
const UBaseType_t uxAutoReload,
void * const pvTimerID,
TimerCallbackFunction_t pxCallbackFunction,
Timer_t *pxNewTimer )
{
80151f2: b580 push {r7, lr}
80151f4: b086 sub sp, #24
80151f6: af00 add r7, sp, #0
80151f8: 60f8 str r0, [r7, #12]
80151fa: 60b9 str r1, [r7, #8]
80151fc: 607a str r2, [r7, #4]
80151fe: 603b str r3, [r7, #0]
/* 0 is not a valid value for xTimerPeriodInTicks. */
configASSERT( ( xTimerPeriodInTicks > 0 ) );
8015200: 68bb ldr r3, [r7, #8]
8015202: 2b00 cmp r3, #0
8015204: d10b bne.n 801521e <prvInitialiseNewTimer+0x2c>
__asm volatile
8015206: f04f 0350 mov.w r3, #80 @ 0x50
801520a: f383 8811 msr BASEPRI, r3
801520e: f3bf 8f6f isb sy
8015212: f3bf 8f4f dsb sy
8015216: 617b str r3, [r7, #20]
}
8015218: bf00 nop
801521a: bf00 nop
801521c: e7fd b.n 801521a <prvInitialiseNewTimer+0x28>
if( pxNewTimer != NULL )
801521e: 6a7b ldr r3, [r7, #36] @ 0x24
8015220: 2b00 cmp r3, #0
8015222: d01e beq.n 8015262 <prvInitialiseNewTimer+0x70>
{
/* Ensure the infrastructure used by the timer service task has been
created/initialised. */
prvCheckForValidListAndQueue();
8015224: f000 faf2 bl 801580c <prvCheckForValidListAndQueue>
/* Initialise the timer structure members using the function
parameters. */
pxNewTimer->pcTimerName = pcTimerName;
8015228: 6a7b ldr r3, [r7, #36] @ 0x24
801522a: 68fa ldr r2, [r7, #12]
801522c: 601a str r2, [r3, #0]
pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
801522e: 6a7b ldr r3, [r7, #36] @ 0x24
8015230: 68ba ldr r2, [r7, #8]
8015232: 619a str r2, [r3, #24]
pxNewTimer->pvTimerID = pvTimerID;
8015234: 6a7b ldr r3, [r7, #36] @ 0x24
8015236: 683a ldr r2, [r7, #0]
8015238: 61da str r2, [r3, #28]
pxNewTimer->pxCallbackFunction = pxCallbackFunction;
801523a: 6a7b ldr r3, [r7, #36] @ 0x24
801523c: 6a3a ldr r2, [r7, #32]
801523e: 621a str r2, [r3, #32]
vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
8015240: 6a7b ldr r3, [r7, #36] @ 0x24
8015242: 3304 adds r3, #4
8015244: 4618 mov r0, r3
8015246: f7fc ff1b bl 8012080 <vListInitialiseItem>
if( uxAutoReload != pdFALSE )
801524a: 687b ldr r3, [r7, #4]
801524c: 2b00 cmp r3, #0
801524e: d008 beq.n 8015262 <prvInitialiseNewTimer+0x70>
{
pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
8015250: 6a7b ldr r3, [r7, #36] @ 0x24
8015252: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8015256: f043 0304 orr.w r3, r3, #4
801525a: b2da uxtb r2, r3
801525c: 6a7b ldr r3, [r7, #36] @ 0x24
801525e: f883 2028 strb.w r2, [r3, #40] @ 0x28
}
traceTIMER_CREATE( pxNewTimer );
}
}
8015262: bf00 nop
8015264: 3718 adds r7, #24
8015266: 46bd mov sp, r7
8015268: bd80 pop {r7, pc}
...
0801526c <xTimerGenericCommand>:
/*-----------------------------------------------------------*/
BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
{
801526c: b580 push {r7, lr}
801526e: b08a sub sp, #40 @ 0x28
8015270: af00 add r7, sp, #0
8015272: 60f8 str r0, [r7, #12]
8015274: 60b9 str r1, [r7, #8]
8015276: 607a str r2, [r7, #4]
8015278: 603b str r3, [r7, #0]
BaseType_t xReturn = pdFAIL;
801527a: 2300 movs r3, #0
801527c: 627b str r3, [r7, #36] @ 0x24
DaemonTaskMessage_t xMessage;
configASSERT( xTimer );
801527e: 68fb ldr r3, [r7, #12]
8015280: 2b00 cmp r3, #0
8015282: d10b bne.n 801529c <xTimerGenericCommand+0x30>
__asm volatile
8015284: f04f 0350 mov.w r3, #80 @ 0x50
8015288: f383 8811 msr BASEPRI, r3
801528c: f3bf 8f6f isb sy
8015290: f3bf 8f4f dsb sy
8015294: 623b str r3, [r7, #32]
}
8015296: bf00 nop
8015298: bf00 nop
801529a: e7fd b.n 8015298 <xTimerGenericCommand+0x2c>
/* Send a message to the timer service task to perform a particular action
on a particular timer definition. */
if( xTimerQueue != NULL )
801529c: 4b19 ldr r3, [pc, #100] @ (8015304 <xTimerGenericCommand+0x98>)
801529e: 681b ldr r3, [r3, #0]
80152a0: 2b00 cmp r3, #0
80152a2: d02a beq.n 80152fa <xTimerGenericCommand+0x8e>
{
/* Send a command to the timer service task to start the xTimer timer. */
xMessage.xMessageID = xCommandID;
80152a4: 68bb ldr r3, [r7, #8]
80152a6: 613b str r3, [r7, #16]
xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
80152a8: 687b ldr r3, [r7, #4]
80152aa: 617b str r3, [r7, #20]
xMessage.u.xTimerParameters.pxTimer = xTimer;
80152ac: 68fb ldr r3, [r7, #12]
80152ae: 61bb str r3, [r7, #24]
if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
80152b0: 68bb ldr r3, [r7, #8]
80152b2: 2b05 cmp r3, #5
80152b4: dc18 bgt.n 80152e8 <xTimerGenericCommand+0x7c>
{
if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
80152b6: f7ff fae1 bl 801487c <xTaskGetSchedulerState>
80152ba: 4603 mov r3, r0
80152bc: 2b02 cmp r3, #2
80152be: d109 bne.n 80152d4 <xTimerGenericCommand+0x68>
{
xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
80152c0: 4b10 ldr r3, [pc, #64] @ (8015304 <xTimerGenericCommand+0x98>)
80152c2: 6818 ldr r0, [r3, #0]
80152c4: f107 0110 add.w r1, r7, #16
80152c8: 2300 movs r3, #0
80152ca: 6b3a ldr r2, [r7, #48] @ 0x30
80152cc: f7fd f9d8 bl 8012680 <xQueueGenericSend>
80152d0: 6278 str r0, [r7, #36] @ 0x24
80152d2: e012 b.n 80152fa <xTimerGenericCommand+0x8e>
}
else
{
xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
80152d4: 4b0b ldr r3, [pc, #44] @ (8015304 <xTimerGenericCommand+0x98>)
80152d6: 6818 ldr r0, [r3, #0]
80152d8: f107 0110 add.w r1, r7, #16
80152dc: 2300 movs r3, #0
80152de: 2200 movs r2, #0
80152e0: f7fd f9ce bl 8012680 <xQueueGenericSend>
80152e4: 6278 str r0, [r7, #36] @ 0x24
80152e6: e008 b.n 80152fa <xTimerGenericCommand+0x8e>
}
}
else
{
xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
80152e8: 4b06 ldr r3, [pc, #24] @ (8015304 <xTimerGenericCommand+0x98>)
80152ea: 6818 ldr r0, [r3, #0]
80152ec: f107 0110 add.w r1, r7, #16
80152f0: 2300 movs r3, #0
80152f2: 683a ldr r2, [r7, #0]
80152f4: f7fd fac6 bl 8012884 <xQueueGenericSendFromISR>
80152f8: 6278 str r0, [r7, #36] @ 0x24
else
{
mtCOVERAGE_TEST_MARKER();
}
return xReturn;
80152fa: 6a7b ldr r3, [r7, #36] @ 0x24
}
80152fc: 4618 mov r0, r3
80152fe: 3728 adds r7, #40 @ 0x28
8015300: 46bd mov sp, r7
8015302: bd80 pop {r7, pc}
8015304: 240042e0 .word 0x240042e0
08015308 <prvProcessExpiredTimer>:
return pxTimer->pcTimerName;
}
/*-----------------------------------------------------------*/
static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
{
8015308: b580 push {r7, lr}
801530a: b088 sub sp, #32
801530c: af02 add r7, sp, #8
801530e: 6078 str r0, [r7, #4]
8015310: 6039 str r1, [r7, #0]
BaseType_t xResult;
Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8015312: 4b23 ldr r3, [pc, #140] @ (80153a0 <prvProcessExpiredTimer+0x98>)
8015314: 681b ldr r3, [r3, #0]
8015316: 68db ldr r3, [r3, #12]
8015318: 68db ldr r3, [r3, #12]
801531a: 617b str r3, [r7, #20]
/* Remove the timer from the list of active timers. A check has already
been performed to ensure the list is not empty. */
( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
801531c: 697b ldr r3, [r7, #20]
801531e: 3304 adds r3, #4
8015320: 4618 mov r0, r3
8015322: f7fc ff17 bl 8012154 <uxListRemove>
traceTIMER_EXPIRED( pxTimer );
/* If the timer is an auto-reload timer then calculate the next
expiry time and re-insert the timer in the list of active timers. */
if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
8015326: 697b ldr r3, [r7, #20]
8015328: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
801532c: f003 0304 and.w r3, r3, #4
8015330: 2b00 cmp r3, #0
8015332: d023 beq.n 801537c <prvProcessExpiredTimer+0x74>
{
/* The timer is inserted into a list using a time relative to anything
other than the current time. It will therefore be inserted into the
correct list relative to the time this task thinks it is now. */
if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
8015334: 697b ldr r3, [r7, #20]
8015336: 699a ldr r2, [r3, #24]
8015338: 687b ldr r3, [r7, #4]
801533a: 18d1 adds r1, r2, r3
801533c: 687b ldr r3, [r7, #4]
801533e: 683a ldr r2, [r7, #0]
8015340: 6978 ldr r0, [r7, #20]
8015342: f000 f8d5 bl 80154f0 <prvInsertTimerInActiveList>
8015346: 4603 mov r3, r0
8015348: 2b00 cmp r3, #0
801534a: d020 beq.n 801538e <prvProcessExpiredTimer+0x86>
{
/* The timer expired before it was added to the active timer
list. Reload it now. */
xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
801534c: 2300 movs r3, #0
801534e: 9300 str r3, [sp, #0]
8015350: 2300 movs r3, #0
8015352: 687a ldr r2, [r7, #4]
8015354: 2100 movs r1, #0
8015356: 6978 ldr r0, [r7, #20]
8015358: f7ff ff88 bl 801526c <xTimerGenericCommand>
801535c: 6138 str r0, [r7, #16]
configASSERT( xResult );
801535e: 693b ldr r3, [r7, #16]
8015360: 2b00 cmp r3, #0
8015362: d114 bne.n 801538e <prvProcessExpiredTimer+0x86>
__asm volatile
8015364: f04f 0350 mov.w r3, #80 @ 0x50
8015368: f383 8811 msr BASEPRI, r3
801536c: f3bf 8f6f isb sy
8015370: f3bf 8f4f dsb sy
8015374: 60fb str r3, [r7, #12]
}
8015376: bf00 nop
8015378: bf00 nop
801537a: e7fd b.n 8015378 <prvProcessExpiredTimer+0x70>
mtCOVERAGE_TEST_MARKER();
}
}
else
{
pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
801537c: 697b ldr r3, [r7, #20]
801537e: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8015382: f023 0301 bic.w r3, r3, #1
8015386: b2da uxtb r2, r3
8015388: 697b ldr r3, [r7, #20]
801538a: f883 2028 strb.w r2, [r3, #40] @ 0x28
mtCOVERAGE_TEST_MARKER();
}
/* Call the timer callback. */
pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
801538e: 697b ldr r3, [r7, #20]
8015390: 6a1b ldr r3, [r3, #32]
8015392: 6978 ldr r0, [r7, #20]
8015394: 4798 blx r3
}
8015396: bf00 nop
8015398: 3718 adds r7, #24
801539a: 46bd mov sp, r7
801539c: bd80 pop {r7, pc}
801539e: bf00 nop
80153a0: 240042d8 .word 0x240042d8
080153a4 <prvTimerTask>:
/*-----------------------------------------------------------*/
static portTASK_FUNCTION( prvTimerTask, pvParameters )
{
80153a4: b580 push {r7, lr}
80153a6: b084 sub sp, #16
80153a8: af00 add r7, sp, #0
80153aa: 6078 str r0, [r7, #4]
for( ;; )
{
/* Query the timers list to see if it contains any timers, and if so,
obtain the time at which the next timer will expire. */
xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
80153ac: f107 0308 add.w r3, r7, #8
80153b0: 4618 mov r0, r3
80153b2: f000 f859 bl 8015468 <prvGetNextExpireTime>
80153b6: 60f8 str r0, [r7, #12]
/* If a timer has expired, process it. Otherwise, block this task
until either a timer does expire, or a command is received. */
prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
80153b8: 68bb ldr r3, [r7, #8]
80153ba: 4619 mov r1, r3
80153bc: 68f8 ldr r0, [r7, #12]
80153be: f000 f805 bl 80153cc <prvProcessTimerOrBlockTask>
/* Empty the command queue. */
prvProcessReceivedCommands();
80153c2: f000 f8d7 bl 8015574 <prvProcessReceivedCommands>
xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
80153c6: bf00 nop
80153c8: e7f0 b.n 80153ac <prvTimerTask+0x8>
...
080153cc <prvProcessTimerOrBlockTask>:
}
}
/*-----------------------------------------------------------*/
static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
{
80153cc: b580 push {r7, lr}
80153ce: b084 sub sp, #16
80153d0: af00 add r7, sp, #0
80153d2: 6078 str r0, [r7, #4]
80153d4: 6039 str r1, [r7, #0]
TickType_t xTimeNow;
BaseType_t xTimerListsWereSwitched;
vTaskSuspendAll();
80153d6: f7fe fe05 bl 8013fe4 <vTaskSuspendAll>
/* Obtain the time now to make an assessment as to whether the timer
has expired or not. If obtaining the time causes the lists to switch
then don't process this timer as any timers that remained in the list
when the lists were switched will have been processed within the
prvSampleTimeNow() function. */
xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
80153da: f107 0308 add.w r3, r7, #8
80153de: 4618 mov r0, r3
80153e0: f000 f866 bl 80154b0 <prvSampleTimeNow>
80153e4: 60f8 str r0, [r7, #12]
if( xTimerListsWereSwitched == pdFALSE )
80153e6: 68bb ldr r3, [r7, #8]
80153e8: 2b00 cmp r3, #0
80153ea: d130 bne.n 801544e <prvProcessTimerOrBlockTask+0x82>
{
/* The tick count has not overflowed, has the timer expired? */
if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
80153ec: 683b ldr r3, [r7, #0]
80153ee: 2b00 cmp r3, #0
80153f0: d10a bne.n 8015408 <prvProcessTimerOrBlockTask+0x3c>
80153f2: 687a ldr r2, [r7, #4]
80153f4: 68fb ldr r3, [r7, #12]
80153f6: 429a cmp r2, r3
80153f8: d806 bhi.n 8015408 <prvProcessTimerOrBlockTask+0x3c>
{
( void ) xTaskResumeAll();
80153fa: f7fe fe01 bl 8014000 <xTaskResumeAll>
prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
80153fe: 68f9 ldr r1, [r7, #12]
8015400: 6878 ldr r0, [r7, #4]
8015402: f7ff ff81 bl 8015308 <prvProcessExpiredTimer>
else
{
( void ) xTaskResumeAll();
}
}
}
8015406: e024 b.n 8015452 <prvProcessTimerOrBlockTask+0x86>
if( xListWasEmpty != pdFALSE )
8015408: 683b ldr r3, [r7, #0]
801540a: 2b00 cmp r3, #0
801540c: d008 beq.n 8015420 <prvProcessTimerOrBlockTask+0x54>
xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
801540e: 4b13 ldr r3, [pc, #76] @ (801545c <prvProcessTimerOrBlockTask+0x90>)
8015410: 681b ldr r3, [r3, #0]
8015412: 681b ldr r3, [r3, #0]
8015414: 2b00 cmp r3, #0
8015416: d101 bne.n 801541c <prvProcessTimerOrBlockTask+0x50>
8015418: 2301 movs r3, #1
801541a: e000 b.n 801541e <prvProcessTimerOrBlockTask+0x52>
801541c: 2300 movs r3, #0
801541e: 603b str r3, [r7, #0]
vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
8015420: 4b0f ldr r3, [pc, #60] @ (8015460 <prvProcessTimerOrBlockTask+0x94>)
8015422: 6818 ldr r0, [r3, #0]
8015424: 687a ldr r2, [r7, #4]
8015426: 68fb ldr r3, [r7, #12]
8015428: 1ad3 subs r3, r2, r3
801542a: 683a ldr r2, [r7, #0]
801542c: 4619 mov r1, r3
801542e: f7fd ffa9 bl 8013384 <vQueueWaitForMessageRestricted>
if( xTaskResumeAll() == pdFALSE )
8015432: f7fe fde5 bl 8014000 <xTaskResumeAll>
8015436: 4603 mov r3, r0
8015438: 2b00 cmp r3, #0
801543a: d10a bne.n 8015452 <prvProcessTimerOrBlockTask+0x86>
portYIELD_WITHIN_API();
801543c: 4b09 ldr r3, [pc, #36] @ (8015464 <prvProcessTimerOrBlockTask+0x98>)
801543e: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8015442: 601a str r2, [r3, #0]
8015444: f3bf 8f4f dsb sy
8015448: f3bf 8f6f isb sy
}
801544c: e001 b.n 8015452 <prvProcessTimerOrBlockTask+0x86>
( void ) xTaskResumeAll();
801544e: f7fe fdd7 bl 8014000 <xTaskResumeAll>
}
8015452: bf00 nop
8015454: 3710 adds r7, #16
8015456: 46bd mov sp, r7
8015458: bd80 pop {r7, pc}
801545a: bf00 nop
801545c: 240042dc .word 0x240042dc
8015460: 240042e0 .word 0x240042e0
8015464: e000ed04 .word 0xe000ed04
08015468 <prvGetNextExpireTime>:
/*-----------------------------------------------------------*/
static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
{
8015468: b480 push {r7}
801546a: b085 sub sp, #20
801546c: af00 add r7, sp, #0
801546e: 6078 str r0, [r7, #4]
the timer with the nearest expiry time will expire. If there are no
active timers then just set the next expire time to 0. That will cause
this task to unblock when the tick count overflows, at which point the
timer lists will be switched and the next expiry time can be
re-assessed. */
*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
8015470: 4b0e ldr r3, [pc, #56] @ (80154ac <prvGetNextExpireTime+0x44>)
8015472: 681b ldr r3, [r3, #0]
8015474: 681b ldr r3, [r3, #0]
8015476: 2b00 cmp r3, #0
8015478: d101 bne.n 801547e <prvGetNextExpireTime+0x16>
801547a: 2201 movs r2, #1
801547c: e000 b.n 8015480 <prvGetNextExpireTime+0x18>
801547e: 2200 movs r2, #0
8015480: 687b ldr r3, [r7, #4]
8015482: 601a str r2, [r3, #0]
if( *pxListWasEmpty == pdFALSE )
8015484: 687b ldr r3, [r7, #4]
8015486: 681b ldr r3, [r3, #0]
8015488: 2b00 cmp r3, #0
801548a: d105 bne.n 8015498 <prvGetNextExpireTime+0x30>
{
xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
801548c: 4b07 ldr r3, [pc, #28] @ (80154ac <prvGetNextExpireTime+0x44>)
801548e: 681b ldr r3, [r3, #0]
8015490: 68db ldr r3, [r3, #12]
8015492: 681b ldr r3, [r3, #0]
8015494: 60fb str r3, [r7, #12]
8015496: e001 b.n 801549c <prvGetNextExpireTime+0x34>
}
else
{
/* Ensure the task unblocks when the tick count rolls over. */
xNextExpireTime = ( TickType_t ) 0U;
8015498: 2300 movs r3, #0
801549a: 60fb str r3, [r7, #12]
}
return xNextExpireTime;
801549c: 68fb ldr r3, [r7, #12]
}
801549e: 4618 mov r0, r3
80154a0: 3714 adds r7, #20
80154a2: 46bd mov sp, r7
80154a4: f85d 7b04 ldr.w r7, [sp], #4
80154a8: 4770 bx lr
80154aa: bf00 nop
80154ac: 240042d8 .word 0x240042d8
080154b0 <prvSampleTimeNow>:
/*-----------------------------------------------------------*/
static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
{
80154b0: b580 push {r7, lr}
80154b2: b084 sub sp, #16
80154b4: af00 add r7, sp, #0
80154b6: 6078 str r0, [r7, #4]
TickType_t xTimeNow;
PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */
xTimeNow = xTaskGetTickCount();
80154b8: f7fe fe40 bl 801413c <xTaskGetTickCount>
80154bc: 60f8 str r0, [r7, #12]
if( xTimeNow < xLastTime )
80154be: 4b0b ldr r3, [pc, #44] @ (80154ec <prvSampleTimeNow+0x3c>)
80154c0: 681b ldr r3, [r3, #0]
80154c2: 68fa ldr r2, [r7, #12]
80154c4: 429a cmp r2, r3
80154c6: d205 bcs.n 80154d4 <prvSampleTimeNow+0x24>
{
prvSwitchTimerLists();
80154c8: f000 f93a bl 8015740 <prvSwitchTimerLists>
*pxTimerListsWereSwitched = pdTRUE;
80154cc: 687b ldr r3, [r7, #4]
80154ce: 2201 movs r2, #1
80154d0: 601a str r2, [r3, #0]
80154d2: e002 b.n 80154da <prvSampleTimeNow+0x2a>
}
else
{
*pxTimerListsWereSwitched = pdFALSE;
80154d4: 687b ldr r3, [r7, #4]
80154d6: 2200 movs r2, #0
80154d8: 601a str r2, [r3, #0]
}
xLastTime = xTimeNow;
80154da: 4a04 ldr r2, [pc, #16] @ (80154ec <prvSampleTimeNow+0x3c>)
80154dc: 68fb ldr r3, [r7, #12]
80154de: 6013 str r3, [r2, #0]
return xTimeNow;
80154e0: 68fb ldr r3, [r7, #12]
}
80154e2: 4618 mov r0, r3
80154e4: 3710 adds r7, #16
80154e6: 46bd mov sp, r7
80154e8: bd80 pop {r7, pc}
80154ea: bf00 nop
80154ec: 240042e8 .word 0x240042e8
080154f0 <prvInsertTimerInActiveList>:
/*-----------------------------------------------------------*/
static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
{
80154f0: b580 push {r7, lr}
80154f2: b086 sub sp, #24
80154f4: af00 add r7, sp, #0
80154f6: 60f8 str r0, [r7, #12]
80154f8: 60b9 str r1, [r7, #8]
80154fa: 607a str r2, [r7, #4]
80154fc: 603b str r3, [r7, #0]
BaseType_t xProcessTimerNow = pdFALSE;
80154fe: 2300 movs r3, #0
8015500: 617b str r3, [r7, #20]
listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
8015502: 68fb ldr r3, [r7, #12]
8015504: 68ba ldr r2, [r7, #8]
8015506: 605a str r2, [r3, #4]
listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
8015508: 68fb ldr r3, [r7, #12]
801550a: 68fa ldr r2, [r7, #12]
801550c: 611a str r2, [r3, #16]
if( xNextExpiryTime <= xTimeNow )
801550e: 68ba ldr r2, [r7, #8]
8015510: 687b ldr r3, [r7, #4]
8015512: 429a cmp r2, r3
8015514: d812 bhi.n 801553c <prvInsertTimerInActiveList+0x4c>
{
/* Has the expiry time elapsed between the command to start/reset a
timer was issued, and the time the command was processed? */
if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
8015516: 687a ldr r2, [r7, #4]
8015518: 683b ldr r3, [r7, #0]
801551a: 1ad2 subs r2, r2, r3
801551c: 68fb ldr r3, [r7, #12]
801551e: 699b ldr r3, [r3, #24]
8015520: 429a cmp r2, r3
8015522: d302 bcc.n 801552a <prvInsertTimerInActiveList+0x3a>
{
/* The time between a command being issued and the command being
processed actually exceeds the timers period. */
xProcessTimerNow = pdTRUE;
8015524: 2301 movs r3, #1
8015526: 617b str r3, [r7, #20]
8015528: e01b b.n 8015562 <prvInsertTimerInActiveList+0x72>
}
else
{
vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
801552a: 4b10 ldr r3, [pc, #64] @ (801556c <prvInsertTimerInActiveList+0x7c>)
801552c: 681a ldr r2, [r3, #0]
801552e: 68fb ldr r3, [r7, #12]
8015530: 3304 adds r3, #4
8015532: 4619 mov r1, r3
8015534: 4610 mov r0, r2
8015536: f7fc fdd4 bl 80120e2 <vListInsert>
801553a: e012 b.n 8015562 <prvInsertTimerInActiveList+0x72>
}
}
else
{
if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
801553c: 687a ldr r2, [r7, #4]
801553e: 683b ldr r3, [r7, #0]
8015540: 429a cmp r2, r3
8015542: d206 bcs.n 8015552 <prvInsertTimerInActiveList+0x62>
8015544: 68ba ldr r2, [r7, #8]
8015546: 683b ldr r3, [r7, #0]
8015548: 429a cmp r2, r3
801554a: d302 bcc.n 8015552 <prvInsertTimerInActiveList+0x62>
{
/* If, since the command was issued, the tick count has overflowed
but the expiry time has not, then the timer must have already passed
its expiry time and should be processed immediately. */
xProcessTimerNow = pdTRUE;
801554c: 2301 movs r3, #1
801554e: 617b str r3, [r7, #20]
8015550: e007 b.n 8015562 <prvInsertTimerInActiveList+0x72>
}
else
{
vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
8015552: 4b07 ldr r3, [pc, #28] @ (8015570 <prvInsertTimerInActiveList+0x80>)
8015554: 681a ldr r2, [r3, #0]
8015556: 68fb ldr r3, [r7, #12]
8015558: 3304 adds r3, #4
801555a: 4619 mov r1, r3
801555c: 4610 mov r0, r2
801555e: f7fc fdc0 bl 80120e2 <vListInsert>
}
}
return xProcessTimerNow;
8015562: 697b ldr r3, [r7, #20]
}
8015564: 4618 mov r0, r3
8015566: 3718 adds r7, #24
8015568: 46bd mov sp, r7
801556a: bd80 pop {r7, pc}
801556c: 240042dc .word 0x240042dc
8015570: 240042d8 .word 0x240042d8
08015574 <prvProcessReceivedCommands>:
/*-----------------------------------------------------------*/
static void prvProcessReceivedCommands( void )
{
8015574: b580 push {r7, lr}
8015576: b08e sub sp, #56 @ 0x38
8015578: af02 add r7, sp, #8
DaemonTaskMessage_t xMessage;
Timer_t *pxTimer;
BaseType_t xTimerListsWereSwitched, xResult;
TickType_t xTimeNow;
while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
801557a: e0ce b.n 801571a <prvProcessReceivedCommands+0x1a6>
{
#if ( INCLUDE_xTimerPendFunctionCall == 1 )
{
/* Negative commands are pended function calls rather than timer
commands. */
if( xMessage.xMessageID < ( BaseType_t ) 0 )
801557c: 687b ldr r3, [r7, #4]
801557e: 2b00 cmp r3, #0
8015580: da19 bge.n 80155b6 <prvProcessReceivedCommands+0x42>
{
const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
8015582: 1d3b adds r3, r7, #4
8015584: 3304 adds r3, #4
8015586: 62fb str r3, [r7, #44] @ 0x2c
/* The timer uses the xCallbackParameters member to request a
callback be executed. Check the callback is not NULL. */
configASSERT( pxCallback );
8015588: 6afb ldr r3, [r7, #44] @ 0x2c
801558a: 2b00 cmp r3, #0
801558c: d10b bne.n 80155a6 <prvProcessReceivedCommands+0x32>
__asm volatile
801558e: f04f 0350 mov.w r3, #80 @ 0x50
8015592: f383 8811 msr BASEPRI, r3
8015596: f3bf 8f6f isb sy
801559a: f3bf 8f4f dsb sy
801559e: 61fb str r3, [r7, #28]
}
80155a0: bf00 nop
80155a2: bf00 nop
80155a4: e7fd b.n 80155a2 <prvProcessReceivedCommands+0x2e>
/* Call the function. */
pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
80155a6: 6afb ldr r3, [r7, #44] @ 0x2c
80155a8: 681b ldr r3, [r3, #0]
80155aa: 6afa ldr r2, [r7, #44] @ 0x2c
80155ac: 6850 ldr r0, [r2, #4]
80155ae: 6afa ldr r2, [r7, #44] @ 0x2c
80155b0: 6892 ldr r2, [r2, #8]
80155b2: 4611 mov r1, r2
80155b4: 4798 blx r3
}
#endif /* INCLUDE_xTimerPendFunctionCall */
/* Commands that are positive are timer commands rather than pended
function calls. */
if( xMessage.xMessageID >= ( BaseType_t ) 0 )
80155b6: 687b ldr r3, [r7, #4]
80155b8: 2b00 cmp r3, #0
80155ba: f2c0 80ae blt.w 801571a <prvProcessReceivedCommands+0x1a6>
{
/* The messages uses the xTimerParameters member to work on a
software timer. */
pxTimer = xMessage.u.xTimerParameters.pxTimer;
80155be: 68fb ldr r3, [r7, #12]
80155c0: 62bb str r3, [r7, #40] @ 0x28
if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
80155c2: 6abb ldr r3, [r7, #40] @ 0x28
80155c4: 695b ldr r3, [r3, #20]
80155c6: 2b00 cmp r3, #0
80155c8: d004 beq.n 80155d4 <prvProcessReceivedCommands+0x60>
{
/* The timer is in a list, remove it. */
( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
80155ca: 6abb ldr r3, [r7, #40] @ 0x28
80155cc: 3304 adds r3, #4
80155ce: 4618 mov r0, r3
80155d0: f7fc fdc0 bl 8012154 <uxListRemove>
it must be present in the function call. prvSampleTimeNow() must be
called after the message is received from xTimerQueue so there is no
possibility of a higher priority task adding a message to the message
queue with a time that is ahead of the timer daemon task (because it
pre-empted the timer daemon task after the xTimeNow value was set). */
xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
80155d4: 463b mov r3, r7
80155d6: 4618 mov r0, r3
80155d8: f7ff ff6a bl 80154b0 <prvSampleTimeNow>
80155dc: 6278 str r0, [r7, #36] @ 0x24
switch( xMessage.xMessageID )
80155de: 687b ldr r3, [r7, #4]
80155e0: 2b09 cmp r3, #9
80155e2: f200 8097 bhi.w 8015714 <prvProcessReceivedCommands+0x1a0>
80155e6: a201 add r2, pc, #4 @ (adr r2, 80155ec <prvProcessReceivedCommands+0x78>)
80155e8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80155ec: 08015615 .word 0x08015615
80155f0: 08015615 .word 0x08015615
80155f4: 08015615 .word 0x08015615
80155f8: 0801568b .word 0x0801568b
80155fc: 0801569f .word 0x0801569f
8015600: 080156eb .word 0x080156eb
8015604: 08015615 .word 0x08015615
8015608: 08015615 .word 0x08015615
801560c: 0801568b .word 0x0801568b
8015610: 0801569f .word 0x0801569f
case tmrCOMMAND_START_FROM_ISR :
case tmrCOMMAND_RESET :
case tmrCOMMAND_RESET_FROM_ISR :
case tmrCOMMAND_START_DONT_TRACE :
/* Start or restart a timer. */
pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
8015614: 6abb ldr r3, [r7, #40] @ 0x28
8015616: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
801561a: f043 0301 orr.w r3, r3, #1
801561e: b2da uxtb r2, r3
8015620: 6abb ldr r3, [r7, #40] @ 0x28
8015622: f883 2028 strb.w r2, [r3, #40] @ 0x28
if( prvInsertTimerInActiveList( pxTimer, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
8015626: 68ba ldr r2, [r7, #8]
8015628: 6abb ldr r3, [r7, #40] @ 0x28
801562a: 699b ldr r3, [r3, #24]
801562c: 18d1 adds r1, r2, r3
801562e: 68bb ldr r3, [r7, #8]
8015630: 6a7a ldr r2, [r7, #36] @ 0x24
8015632: 6ab8 ldr r0, [r7, #40] @ 0x28
8015634: f7ff ff5c bl 80154f0 <prvInsertTimerInActiveList>
8015638: 4603 mov r3, r0
801563a: 2b00 cmp r3, #0
801563c: d06c beq.n 8015718 <prvProcessReceivedCommands+0x1a4>
{
/* The timer expired before it was added to the active
timer list. Process it now. */
pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
801563e: 6abb ldr r3, [r7, #40] @ 0x28
8015640: 6a1b ldr r3, [r3, #32]
8015642: 6ab8 ldr r0, [r7, #40] @ 0x28
8015644: 4798 blx r3
traceTIMER_EXPIRED( pxTimer );
if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
8015646: 6abb ldr r3, [r7, #40] @ 0x28
8015648: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
801564c: f003 0304 and.w r3, r3, #4
8015650: 2b00 cmp r3, #0
8015652: d061 beq.n 8015718 <prvProcessReceivedCommands+0x1a4>
{
xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
8015654: 68ba ldr r2, [r7, #8]
8015656: 6abb ldr r3, [r7, #40] @ 0x28
8015658: 699b ldr r3, [r3, #24]
801565a: 441a add r2, r3
801565c: 2300 movs r3, #0
801565e: 9300 str r3, [sp, #0]
8015660: 2300 movs r3, #0
8015662: 2100 movs r1, #0
8015664: 6ab8 ldr r0, [r7, #40] @ 0x28
8015666: f7ff fe01 bl 801526c <xTimerGenericCommand>
801566a: 6238 str r0, [r7, #32]
configASSERT( xResult );
801566c: 6a3b ldr r3, [r7, #32]
801566e: 2b00 cmp r3, #0
8015670: d152 bne.n 8015718 <prvProcessReceivedCommands+0x1a4>
__asm volatile
8015672: f04f 0350 mov.w r3, #80 @ 0x50
8015676: f383 8811 msr BASEPRI, r3
801567a: f3bf 8f6f isb sy
801567e: f3bf 8f4f dsb sy
8015682: 61bb str r3, [r7, #24]
}
8015684: bf00 nop
8015686: bf00 nop
8015688: e7fd b.n 8015686 <prvProcessReceivedCommands+0x112>
break;
case tmrCOMMAND_STOP :
case tmrCOMMAND_STOP_FROM_ISR :
/* The timer has already been removed from the active list. */
pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
801568a: 6abb ldr r3, [r7, #40] @ 0x28
801568c: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8015690: f023 0301 bic.w r3, r3, #1
8015694: b2da uxtb r2, r3
8015696: 6abb ldr r3, [r7, #40] @ 0x28
8015698: f883 2028 strb.w r2, [r3, #40] @ 0x28
break;
801569c: e03d b.n 801571a <prvProcessReceivedCommands+0x1a6>
case tmrCOMMAND_CHANGE_PERIOD :
case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
801569e: 6abb ldr r3, [r7, #40] @ 0x28
80156a0: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
80156a4: f043 0301 orr.w r3, r3, #1
80156a8: b2da uxtb r2, r3
80156aa: 6abb ldr r3, [r7, #40] @ 0x28
80156ac: f883 2028 strb.w r2, [r3, #40] @ 0x28
pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
80156b0: 68ba ldr r2, [r7, #8]
80156b2: 6abb ldr r3, [r7, #40] @ 0x28
80156b4: 619a str r2, [r3, #24]
configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
80156b6: 6abb ldr r3, [r7, #40] @ 0x28
80156b8: 699b ldr r3, [r3, #24]
80156ba: 2b00 cmp r3, #0
80156bc: d10b bne.n 80156d6 <prvProcessReceivedCommands+0x162>
__asm volatile
80156be: f04f 0350 mov.w r3, #80 @ 0x50
80156c2: f383 8811 msr BASEPRI, r3
80156c6: f3bf 8f6f isb sy
80156ca: f3bf 8f4f dsb sy
80156ce: 617b str r3, [r7, #20]
}
80156d0: bf00 nop
80156d2: bf00 nop
80156d4: e7fd b.n 80156d2 <prvProcessReceivedCommands+0x15e>
be longer or shorter than the old one. The command time is
therefore set to the current time, and as the period cannot
be zero the next expiry time can only be in the future,
meaning (unlike for the xTimerStart() case above) there is
no fail case that needs to be handled here. */
( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
80156d6: 6abb ldr r3, [r7, #40] @ 0x28
80156d8: 699a ldr r2, [r3, #24]
80156da: 6a7b ldr r3, [r7, #36] @ 0x24
80156dc: 18d1 adds r1, r2, r3
80156de: 6a7b ldr r3, [r7, #36] @ 0x24
80156e0: 6a7a ldr r2, [r7, #36] @ 0x24
80156e2: 6ab8 ldr r0, [r7, #40] @ 0x28
80156e4: f7ff ff04 bl 80154f0 <prvInsertTimerInActiveList>
break;
80156e8: e017 b.n 801571a <prvProcessReceivedCommands+0x1a6>
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
{
/* The timer has already been removed from the active list,
just free up the memory if the memory was dynamically
allocated. */
if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
80156ea: 6abb ldr r3, [r7, #40] @ 0x28
80156ec: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
80156f0: f003 0302 and.w r3, r3, #2
80156f4: 2b00 cmp r3, #0
80156f6: d103 bne.n 8015700 <prvProcessReceivedCommands+0x18c>
{
vPortFree( pxTimer );
80156f8: 6ab8 ldr r0, [r7, #40] @ 0x28
80156fa: f000 fc35 bl 8015f68 <vPortFree>
no need to free the memory - just mark the timer as
"not active". */
pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
}
#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
break;
80156fe: e00c b.n 801571a <prvProcessReceivedCommands+0x1a6>
pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
8015700: 6abb ldr r3, [r7, #40] @ 0x28
8015702: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8015706: f023 0301 bic.w r3, r3, #1
801570a: b2da uxtb r2, r3
801570c: 6abb ldr r3, [r7, #40] @ 0x28
801570e: f883 2028 strb.w r2, [r3, #40] @ 0x28
break;
8015712: e002 b.n 801571a <prvProcessReceivedCommands+0x1a6>
default :
/* Don't expect to get here. */
break;
8015714: bf00 nop
8015716: e000 b.n 801571a <prvProcessReceivedCommands+0x1a6>
break;
8015718: bf00 nop
while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
801571a: 4b08 ldr r3, [pc, #32] @ (801573c <prvProcessReceivedCommands+0x1c8>)
801571c: 681b ldr r3, [r3, #0]
801571e: 1d39 adds r1, r7, #4
8015720: 2200 movs r2, #0
8015722: 4618 mov r0, r3
8015724: f7fd f9dc bl 8012ae0 <xQueueReceive>
8015728: 4603 mov r3, r0
801572a: 2b00 cmp r3, #0
801572c: f47f af26 bne.w 801557c <prvProcessReceivedCommands+0x8>
}
}
}
}
8015730: bf00 nop
8015732: bf00 nop
8015734: 3730 adds r7, #48 @ 0x30
8015736: 46bd mov sp, r7
8015738: bd80 pop {r7, pc}
801573a: bf00 nop
801573c: 240042e0 .word 0x240042e0
08015740 <prvSwitchTimerLists>:
/*-----------------------------------------------------------*/
static void prvSwitchTimerLists( void )
{
8015740: b580 push {r7, lr}
8015742: b088 sub sp, #32
8015744: af02 add r7, sp, #8
/* The tick count has overflowed. The timer lists must be switched.
If there are any timers still referenced from the current timer list
then they must have expired and should be processed before the lists
are switched. */
while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
8015746: e049 b.n 80157dc <prvSwitchTimerLists+0x9c>
{
xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
8015748: 4b2e ldr r3, [pc, #184] @ (8015804 <prvSwitchTimerLists+0xc4>)
801574a: 681b ldr r3, [r3, #0]
801574c: 68db ldr r3, [r3, #12]
801574e: 681b ldr r3, [r3, #0]
8015750: 613b str r3, [r7, #16]
/* Remove the timer from the list. */
pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
8015752: 4b2c ldr r3, [pc, #176] @ (8015804 <prvSwitchTimerLists+0xc4>)
8015754: 681b ldr r3, [r3, #0]
8015756: 68db ldr r3, [r3, #12]
8015758: 68db ldr r3, [r3, #12]
801575a: 60fb str r3, [r7, #12]
( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
801575c: 68fb ldr r3, [r7, #12]
801575e: 3304 adds r3, #4
8015760: 4618 mov r0, r3
8015762: f7fc fcf7 bl 8012154 <uxListRemove>
traceTIMER_EXPIRED( pxTimer );
/* Execute its callback, then send a command to restart the timer if
it is an auto-reload timer. It cannot be restarted here as the lists
have not yet been switched. */
pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
8015766: 68fb ldr r3, [r7, #12]
8015768: 6a1b ldr r3, [r3, #32]
801576a: 68f8 ldr r0, [r7, #12]
801576c: 4798 blx r3
if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
801576e: 68fb ldr r3, [r7, #12]
8015770: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8015774: f003 0304 and.w r3, r3, #4
8015778: 2b00 cmp r3, #0
801577a: d02f beq.n 80157dc <prvSwitchTimerLists+0x9c>
the timer going into the same timer list then it has already expired
and the timer should be re-inserted into the current list so it is
processed again within this loop. Otherwise a command should be sent
to restart the timer to ensure it is only inserted into a list after
the lists have been swapped. */
xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
801577c: 68fb ldr r3, [r7, #12]
801577e: 699b ldr r3, [r3, #24]
8015780: 693a ldr r2, [r7, #16]
8015782: 4413 add r3, r2
8015784: 60bb str r3, [r7, #8]
if( xReloadTime > xNextExpireTime )
8015786: 68ba ldr r2, [r7, #8]
8015788: 693b ldr r3, [r7, #16]
801578a: 429a cmp r2, r3
801578c: d90e bls.n 80157ac <prvSwitchTimerLists+0x6c>
{
listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
801578e: 68fb ldr r3, [r7, #12]
8015790: 68ba ldr r2, [r7, #8]
8015792: 605a str r2, [r3, #4]
listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
8015794: 68fb ldr r3, [r7, #12]
8015796: 68fa ldr r2, [r7, #12]
8015798: 611a str r2, [r3, #16]
vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
801579a: 4b1a ldr r3, [pc, #104] @ (8015804 <prvSwitchTimerLists+0xc4>)
801579c: 681a ldr r2, [r3, #0]
801579e: 68fb ldr r3, [r7, #12]
80157a0: 3304 adds r3, #4
80157a2: 4619 mov r1, r3
80157a4: 4610 mov r0, r2
80157a6: f7fc fc9c bl 80120e2 <vListInsert>
80157aa: e017 b.n 80157dc <prvSwitchTimerLists+0x9c>
}
else
{
xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
80157ac: 2300 movs r3, #0
80157ae: 9300 str r3, [sp, #0]
80157b0: 2300 movs r3, #0
80157b2: 693a ldr r2, [r7, #16]
80157b4: 2100 movs r1, #0
80157b6: 68f8 ldr r0, [r7, #12]
80157b8: f7ff fd58 bl 801526c <xTimerGenericCommand>
80157bc: 6078 str r0, [r7, #4]
configASSERT( xResult );
80157be: 687b ldr r3, [r7, #4]
80157c0: 2b00 cmp r3, #0
80157c2: d10b bne.n 80157dc <prvSwitchTimerLists+0x9c>
__asm volatile
80157c4: f04f 0350 mov.w r3, #80 @ 0x50
80157c8: f383 8811 msr BASEPRI, r3
80157cc: f3bf 8f6f isb sy
80157d0: f3bf 8f4f dsb sy
80157d4: 603b str r3, [r7, #0]
}
80157d6: bf00 nop
80157d8: bf00 nop
80157da: e7fd b.n 80157d8 <prvSwitchTimerLists+0x98>
while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
80157dc: 4b09 ldr r3, [pc, #36] @ (8015804 <prvSwitchTimerLists+0xc4>)
80157de: 681b ldr r3, [r3, #0]
80157e0: 681b ldr r3, [r3, #0]
80157e2: 2b00 cmp r3, #0
80157e4: d1b0 bne.n 8015748 <prvSwitchTimerLists+0x8>
{
mtCOVERAGE_TEST_MARKER();
}
}
pxTemp = pxCurrentTimerList;
80157e6: 4b07 ldr r3, [pc, #28] @ (8015804 <prvSwitchTimerLists+0xc4>)
80157e8: 681b ldr r3, [r3, #0]
80157ea: 617b str r3, [r7, #20]
pxCurrentTimerList = pxOverflowTimerList;
80157ec: 4b06 ldr r3, [pc, #24] @ (8015808 <prvSwitchTimerLists+0xc8>)
80157ee: 681b ldr r3, [r3, #0]
80157f0: 4a04 ldr r2, [pc, #16] @ (8015804 <prvSwitchTimerLists+0xc4>)
80157f2: 6013 str r3, [r2, #0]
pxOverflowTimerList = pxTemp;
80157f4: 4a04 ldr r2, [pc, #16] @ (8015808 <prvSwitchTimerLists+0xc8>)
80157f6: 697b ldr r3, [r7, #20]
80157f8: 6013 str r3, [r2, #0]
}
80157fa: bf00 nop
80157fc: 3718 adds r7, #24
80157fe: 46bd mov sp, r7
8015800: bd80 pop {r7, pc}
8015802: bf00 nop
8015804: 240042d8 .word 0x240042d8
8015808: 240042dc .word 0x240042dc
0801580c <prvCheckForValidListAndQueue>:
/*-----------------------------------------------------------*/
static void prvCheckForValidListAndQueue( void )
{
801580c: b580 push {r7, lr}
801580e: b082 sub sp, #8
8015810: af02 add r7, sp, #8
/* Check that the list from which active timers are referenced, and the
queue used to communicate with the timer service, have been
initialised. */
taskENTER_CRITICAL();
8015812: f000 f9b9 bl 8015b88 <vPortEnterCritical>
{
if( xTimerQueue == NULL )
8015816: 4b15 ldr r3, [pc, #84] @ (801586c <prvCheckForValidListAndQueue+0x60>)
8015818: 681b ldr r3, [r3, #0]
801581a: 2b00 cmp r3, #0
801581c: d120 bne.n 8015860 <prvCheckForValidListAndQueue+0x54>
{
vListInitialise( &xActiveTimerList1 );
801581e: 4814 ldr r0, [pc, #80] @ (8015870 <prvCheckForValidListAndQueue+0x64>)
8015820: f7fc fc0e bl 8012040 <vListInitialise>
vListInitialise( &xActiveTimerList2 );
8015824: 4813 ldr r0, [pc, #76] @ (8015874 <prvCheckForValidListAndQueue+0x68>)
8015826: f7fc fc0b bl 8012040 <vListInitialise>
pxCurrentTimerList = &xActiveTimerList1;
801582a: 4b13 ldr r3, [pc, #76] @ (8015878 <prvCheckForValidListAndQueue+0x6c>)
801582c: 4a10 ldr r2, [pc, #64] @ (8015870 <prvCheckForValidListAndQueue+0x64>)
801582e: 601a str r2, [r3, #0]
pxOverflowTimerList = &xActiveTimerList2;
8015830: 4b12 ldr r3, [pc, #72] @ (801587c <prvCheckForValidListAndQueue+0x70>)
8015832: 4a10 ldr r2, [pc, #64] @ (8015874 <prvCheckForValidListAndQueue+0x68>)
8015834: 601a str r2, [r3, #0]
/* The timer queue is allocated statically in case
configSUPPORT_DYNAMIC_ALLOCATION is 0. */
static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
8015836: 2300 movs r3, #0
8015838: 9300 str r3, [sp, #0]
801583a: 4b11 ldr r3, [pc, #68] @ (8015880 <prvCheckForValidListAndQueue+0x74>)
801583c: 4a11 ldr r2, [pc, #68] @ (8015884 <prvCheckForValidListAndQueue+0x78>)
801583e: 2110 movs r1, #16
8015840: 200a movs r0, #10
8015842: f7fc fd1b bl 801227c <xQueueGenericCreateStatic>
8015846: 4603 mov r3, r0
8015848: 4a08 ldr r2, [pc, #32] @ (801586c <prvCheckForValidListAndQueue+0x60>)
801584a: 6013 str r3, [r2, #0]
}
#endif
#if ( configQUEUE_REGISTRY_SIZE > 0 )
{
if( xTimerQueue != NULL )
801584c: 4b07 ldr r3, [pc, #28] @ (801586c <prvCheckForValidListAndQueue+0x60>)
801584e: 681b ldr r3, [r3, #0]
8015850: 2b00 cmp r3, #0
8015852: d005 beq.n 8015860 <prvCheckForValidListAndQueue+0x54>
{
vQueueAddToRegistry( xTimerQueue, "TmrQ" );
8015854: 4b05 ldr r3, [pc, #20] @ (801586c <prvCheckForValidListAndQueue+0x60>)
8015856: 681b ldr r3, [r3, #0]
8015858: 490b ldr r1, [pc, #44] @ (8015888 <prvCheckForValidListAndQueue+0x7c>)
801585a: 4618 mov r0, r3
801585c: f7fd fd3e bl 80132dc <vQueueAddToRegistry>
else
{
mtCOVERAGE_TEST_MARKER();
}
}
taskEXIT_CRITICAL();
8015860: f000 f9c4 bl 8015bec <vPortExitCritical>
}
8015864: bf00 nop
8015866: 46bd mov sp, r7
8015868: bd80 pop {r7, pc}
801586a: bf00 nop
801586c: 240042e0 .word 0x240042e0
8015870: 240042b0 .word 0x240042b0
8015874: 240042c4 .word 0x240042c4
8015878: 240042d8 .word 0x240042d8
801587c: 240042dc .word 0x240042dc
8015880: 2400438c .word 0x2400438c
8015884: 240042ec .word 0x240042ec
8015888: 0802ddc4 .word 0x0802ddc4
0801588c <xTimerIsTimerActive>:
/*-----------------------------------------------------------*/
BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
{
801588c: b580 push {r7, lr}
801588e: b086 sub sp, #24
8015890: af00 add r7, sp, #0
8015892: 6078 str r0, [r7, #4]
BaseType_t xReturn;
Timer_t *pxTimer = xTimer;
8015894: 687b ldr r3, [r7, #4]
8015896: 613b str r3, [r7, #16]
configASSERT( xTimer );
8015898: 687b ldr r3, [r7, #4]
801589a: 2b00 cmp r3, #0
801589c: d10b bne.n 80158b6 <xTimerIsTimerActive+0x2a>
__asm volatile
801589e: f04f 0350 mov.w r3, #80 @ 0x50
80158a2: f383 8811 msr BASEPRI, r3
80158a6: f3bf 8f6f isb sy
80158aa: f3bf 8f4f dsb sy
80158ae: 60fb str r3, [r7, #12]
}
80158b0: bf00 nop
80158b2: bf00 nop
80158b4: e7fd b.n 80158b2 <xTimerIsTimerActive+0x26>
/* Is the timer in the list of active timers? */
taskENTER_CRITICAL();
80158b6: f000 f967 bl 8015b88 <vPortEnterCritical>
{
if( ( pxTimer->ucStatus & tmrSTATUS_IS_ACTIVE ) == 0 )
80158ba: 693b ldr r3, [r7, #16]
80158bc: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
80158c0: f003 0301 and.w r3, r3, #1
80158c4: 2b00 cmp r3, #0
80158c6: d102 bne.n 80158ce <xTimerIsTimerActive+0x42>
{
xReturn = pdFALSE;
80158c8: 2300 movs r3, #0
80158ca: 617b str r3, [r7, #20]
80158cc: e001 b.n 80158d2 <xTimerIsTimerActive+0x46>
}
else
{
xReturn = pdTRUE;
80158ce: 2301 movs r3, #1
80158d0: 617b str r3, [r7, #20]
}
}
taskEXIT_CRITICAL();
80158d2: f000 f98b bl 8015bec <vPortExitCritical>
return xReturn;
80158d6: 697b ldr r3, [r7, #20]
} /*lint !e818 Can't be pointer to const due to the typedef. */
80158d8: 4618 mov r0, r3
80158da: 3718 adds r7, #24
80158dc: 46bd mov sp, r7
80158de: bd80 pop {r7, pc}
080158e0 <pvTimerGetTimerID>:
/*-----------------------------------------------------------*/
void *pvTimerGetTimerID( const TimerHandle_t xTimer )
{
80158e0: b580 push {r7, lr}
80158e2: b086 sub sp, #24
80158e4: af00 add r7, sp, #0
80158e6: 6078 str r0, [r7, #4]
Timer_t * const pxTimer = xTimer;
80158e8: 687b ldr r3, [r7, #4]
80158ea: 617b str r3, [r7, #20]
void *pvReturn;
configASSERT( xTimer );
80158ec: 687b ldr r3, [r7, #4]
80158ee: 2b00 cmp r3, #0
80158f0: d10b bne.n 801590a <pvTimerGetTimerID+0x2a>
__asm volatile
80158f2: f04f 0350 mov.w r3, #80 @ 0x50
80158f6: f383 8811 msr BASEPRI, r3
80158fa: f3bf 8f6f isb sy
80158fe: f3bf 8f4f dsb sy
8015902: 60fb str r3, [r7, #12]
}
8015904: bf00 nop
8015906: bf00 nop
8015908: e7fd b.n 8015906 <pvTimerGetTimerID+0x26>
taskENTER_CRITICAL();
801590a: f000 f93d bl 8015b88 <vPortEnterCritical>
{
pvReturn = pxTimer->pvTimerID;
801590e: 697b ldr r3, [r7, #20]
8015910: 69db ldr r3, [r3, #28]
8015912: 613b str r3, [r7, #16]
}
taskEXIT_CRITICAL();
8015914: f000 f96a bl 8015bec <vPortExitCritical>
return pvReturn;
8015918: 693b ldr r3, [r7, #16]
}
801591a: 4618 mov r0, r3
801591c: 3718 adds r7, #24
801591e: 46bd mov sp, r7
8015920: bd80 pop {r7, pc}
...
08015924 <pxPortInitialiseStack>:
/*
* See header file for description.
*/
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
8015924: b480 push {r7}
8015926: b085 sub sp, #20
8015928: af00 add r7, sp, #0
801592a: 60f8 str r0, [r7, #12]
801592c: 60b9 str r1, [r7, #8]
801592e: 607a str r2, [r7, #4]
/* Simulate the stack frame as it would be created by a context switch
interrupt. */
/* Offset added to account for the way the MCU uses the stack on entry/exit
of interrupts, and to ensure alignment. */
pxTopOfStack--;
8015930: 68fb ldr r3, [r7, #12]
8015932: 3b04 subs r3, #4
8015934: 60fb str r3, [r7, #12]
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
8015936: 68fb ldr r3, [r7, #12]
8015938: f04f 7280 mov.w r2, #16777216 @ 0x1000000
801593c: 601a str r2, [r3, #0]
pxTopOfStack--;
801593e: 68fb ldr r3, [r7, #12]
8015940: 3b04 subs r3, #4
8015942: 60fb str r3, [r7, #12]
*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */
8015944: 68bb ldr r3, [r7, #8]
8015946: f023 0201 bic.w r2, r3, #1
801594a: 68fb ldr r3, [r7, #12]
801594c: 601a str r2, [r3, #0]
pxTopOfStack--;
801594e: 68fb ldr r3, [r7, #12]
8015950: 3b04 subs r3, #4
8015952: 60fb str r3, [r7, #12]
*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
8015954: 4a0c ldr r2, [pc, #48] @ (8015988 <pxPortInitialiseStack+0x64>)
8015956: 68fb ldr r3, [r7, #12]
8015958: 601a str r2, [r3, #0]
/* Save code space by skipping register initialisation. */
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
801595a: 68fb ldr r3, [r7, #12]
801595c: 3b14 subs r3, #20
801595e: 60fb str r3, [r7, #12]
*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
8015960: 687a ldr r2, [r7, #4]
8015962: 68fb ldr r3, [r7, #12]
8015964: 601a str r2, [r3, #0]
/* A save method is being used that requires each task to maintain its
own exec return value. */
pxTopOfStack--;
8015966: 68fb ldr r3, [r7, #12]
8015968: 3b04 subs r3, #4
801596a: 60fb str r3, [r7, #12]
*pxTopOfStack = portINITIAL_EXC_RETURN;
801596c: 68fb ldr r3, [r7, #12]
801596e: f06f 0202 mvn.w r2, #2
8015972: 601a str r2, [r3, #0]
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
8015974: 68fb ldr r3, [r7, #12]
8015976: 3b20 subs r3, #32
8015978: 60fb str r3, [r7, #12]
return pxTopOfStack;
801597a: 68fb ldr r3, [r7, #12]
}
801597c: 4618 mov r0, r3
801597e: 3714 adds r7, #20
8015980: 46bd mov sp, r7
8015982: f85d 7b04 ldr.w r7, [sp], #4
8015986: 4770 bx lr
8015988: 0801598d .word 0x0801598d
0801598c <prvTaskExitError>:
/*-----------------------------------------------------------*/
static void prvTaskExitError( void )
{
801598c: b480 push {r7}
801598e: b085 sub sp, #20
8015990: af00 add r7, sp, #0
volatile uint32_t ulDummy = 0;
8015992: 2300 movs r3, #0
8015994: 607b str r3, [r7, #4]
its caller as there is nothing to return to. If a task wants to exit it
should instead call vTaskDelete( NULL ).
Artificially force an assert() to be triggered if configASSERT() is
defined, then stop here so application writers can catch the error. */
configASSERT( uxCriticalNesting == ~0UL );
8015996: 4b13 ldr r3, [pc, #76] @ (80159e4 <prvTaskExitError+0x58>)
8015998: 681b ldr r3, [r3, #0]
801599a: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
801599e: d00b beq.n 80159b8 <prvTaskExitError+0x2c>
__asm volatile
80159a0: f04f 0350 mov.w r3, #80 @ 0x50
80159a4: f383 8811 msr BASEPRI, r3
80159a8: f3bf 8f6f isb sy
80159ac: f3bf 8f4f dsb sy
80159b0: 60fb str r3, [r7, #12]
}
80159b2: bf00 nop
80159b4: bf00 nop
80159b6: e7fd b.n 80159b4 <prvTaskExitError+0x28>
__asm volatile
80159b8: f04f 0350 mov.w r3, #80 @ 0x50
80159bc: f383 8811 msr BASEPRI, r3
80159c0: f3bf 8f6f isb sy
80159c4: f3bf 8f4f dsb sy
80159c8: 60bb str r3, [r7, #8]
}
80159ca: bf00 nop
portDISABLE_INTERRUPTS();
while( ulDummy == 0 )
80159cc: bf00 nop
80159ce: 687b ldr r3, [r7, #4]
80159d0: 2b00 cmp r3, #0
80159d2: d0fc beq.n 80159ce <prvTaskExitError+0x42>
about code appearing after this function is called - making ulDummy
volatile makes the compiler think the function could return and
therefore not output an 'unreachable code' warning for code that appears
after it. */
}
}
80159d4: bf00 nop
80159d6: bf00 nop
80159d8: 3714 adds r7, #20
80159da: 46bd mov sp, r7
80159dc: f85d 7b04 ldr.w r7, [sp], #4
80159e0: 4770 bx lr
80159e2: bf00 nop
80159e4: 24000048 .word 0x24000048
...
080159f0 <SVC_Handler>:
/*-----------------------------------------------------------*/
void vPortSVCHandler( void )
{
__asm volatile (
80159f0: 4b07 ldr r3, [pc, #28] @ (8015a10 <pxCurrentTCBConst2>)
80159f2: 6819 ldr r1, [r3, #0]
80159f4: 6808 ldr r0, [r1, #0]
80159f6: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
80159fa: f380 8809 msr PSP, r0
80159fe: f3bf 8f6f isb sy
8015a02: f04f 0000 mov.w r0, #0
8015a06: f380 8811 msr BASEPRI, r0
8015a0a: 4770 bx lr
8015a0c: f3af 8000 nop.w
08015a10 <pxCurrentTCBConst2>:
8015a10: 24003db0 .word 0x24003db0
" bx r14 \n"
" \n"
" .align 4 \n"
"pxCurrentTCBConst2: .word pxCurrentTCB \n"
);
}
8015a14: bf00 nop
8015a16: bf00 nop
08015a18 <prvPortStartFirstTask>:
{
/* Start the first task. This also clears the bit that indicates the FPU is
in use in case the FPU was used before the scheduler was started - which
would otherwise result in the unnecessary leaving of space in the SVC stack
for lazy saving of FPU registers. */
__asm volatile(
8015a18: 4808 ldr r0, [pc, #32] @ (8015a3c <prvPortStartFirstTask+0x24>)
8015a1a: 6800 ldr r0, [r0, #0]
8015a1c: 6800 ldr r0, [r0, #0]
8015a1e: f380 8808 msr MSP, r0
8015a22: f04f 0000 mov.w r0, #0
8015a26: f380 8814 msr CONTROL, r0
8015a2a: b662 cpsie i
8015a2c: b661 cpsie f
8015a2e: f3bf 8f4f dsb sy
8015a32: f3bf 8f6f isb sy
8015a36: df00 svc 0
8015a38: bf00 nop
" dsb \n"
" isb \n"
" svc 0 \n" /* System call to start first task. */
" nop \n"
);
}
8015a3a: bf00 nop
8015a3c: e000ed08 .word 0xe000ed08
08015a40 <xPortStartScheduler>:
/*
* See header file for description.
*/
BaseType_t xPortStartScheduler( void )
{
8015a40: b580 push {r7, lr}
8015a42: b086 sub sp, #24
8015a44: af00 add r7, sp, #0
configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );
/* This port can be used on all revisions of the Cortex-M7 core other than
the r0p1 parts. r0p1 parts should use the port from the
/source/portable/GCC/ARM_CM7/r0p1 directory. */
configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
8015a46: 4b47 ldr r3, [pc, #284] @ (8015b64 <xPortStartScheduler+0x124>)
8015a48: 681b ldr r3, [r3, #0]
8015a4a: 4a47 ldr r2, [pc, #284] @ (8015b68 <xPortStartScheduler+0x128>)
8015a4c: 4293 cmp r3, r2
8015a4e: d10b bne.n 8015a68 <xPortStartScheduler+0x28>
__asm volatile
8015a50: f04f 0350 mov.w r3, #80 @ 0x50
8015a54: f383 8811 msr BASEPRI, r3
8015a58: f3bf 8f6f isb sy
8015a5c: f3bf 8f4f dsb sy
8015a60: 613b str r3, [r7, #16]
}
8015a62: bf00 nop
8015a64: bf00 nop
8015a66: e7fd b.n 8015a64 <xPortStartScheduler+0x24>
configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
8015a68: 4b3e ldr r3, [pc, #248] @ (8015b64 <xPortStartScheduler+0x124>)
8015a6a: 681b ldr r3, [r3, #0]
8015a6c: 4a3f ldr r2, [pc, #252] @ (8015b6c <xPortStartScheduler+0x12c>)
8015a6e: 4293 cmp r3, r2
8015a70: d10b bne.n 8015a8a <xPortStartScheduler+0x4a>
__asm volatile
8015a72: f04f 0350 mov.w r3, #80 @ 0x50
8015a76: f383 8811 msr BASEPRI, r3
8015a7a: f3bf 8f6f isb sy
8015a7e: f3bf 8f4f dsb sy
8015a82: 60fb str r3, [r7, #12]
}
8015a84: bf00 nop
8015a86: bf00 nop
8015a88: e7fd b.n 8015a86 <xPortStartScheduler+0x46>
#if( configASSERT_DEFINED == 1 )
{
volatile uint32_t ulOriginalPriority;
volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
8015a8a: 4b39 ldr r3, [pc, #228] @ (8015b70 <xPortStartScheduler+0x130>)
8015a8c: 617b str r3, [r7, #20]
functions can be called. ISR safe functions are those that end in
"FromISR". FreeRTOS maintains separate thread and ISR API functions to
ensure interrupt entry is as fast and simple as possible.
Save the interrupt priority value that is about to be clobbered. */
ulOriginalPriority = *pucFirstUserPriorityRegister;
8015a8e: 697b ldr r3, [r7, #20]
8015a90: 781b ldrb r3, [r3, #0]
8015a92: b2db uxtb r3, r3
8015a94: 607b str r3, [r7, #4]
/* Determine the number of priority bits available. First write to all
possible bits. */
*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
8015a96: 697b ldr r3, [r7, #20]
8015a98: 22ff movs r2, #255 @ 0xff
8015a9a: 701a strb r2, [r3, #0]
/* Read the value back to see how many bits stuck. */
ucMaxPriorityValue = *pucFirstUserPriorityRegister;
8015a9c: 697b ldr r3, [r7, #20]
8015a9e: 781b ldrb r3, [r3, #0]
8015aa0: b2db uxtb r3, r3
8015aa2: 70fb strb r3, [r7, #3]
/* Use the same mask on the maximum system call priority. */
ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
8015aa4: 78fb ldrb r3, [r7, #3]
8015aa6: b2db uxtb r3, r3
8015aa8: f003 0350 and.w r3, r3, #80 @ 0x50
8015aac: b2da uxtb r2, r3
8015aae: 4b31 ldr r3, [pc, #196] @ (8015b74 <xPortStartScheduler+0x134>)
8015ab0: 701a strb r2, [r3, #0]
/* Calculate the maximum acceptable priority group value for the number
of bits read back. */
ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
8015ab2: 4b31 ldr r3, [pc, #196] @ (8015b78 <xPortStartScheduler+0x138>)
8015ab4: 2207 movs r2, #7
8015ab6: 601a str r2, [r3, #0]
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
8015ab8: e009 b.n 8015ace <xPortStartScheduler+0x8e>
{
ulMaxPRIGROUPValue--;
8015aba: 4b2f ldr r3, [pc, #188] @ (8015b78 <xPortStartScheduler+0x138>)
8015abc: 681b ldr r3, [r3, #0]
8015abe: 3b01 subs r3, #1
8015ac0: 4a2d ldr r2, [pc, #180] @ (8015b78 <xPortStartScheduler+0x138>)
8015ac2: 6013 str r3, [r2, #0]
ucMaxPriorityValue <<= ( uint8_t ) 0x01;
8015ac4: 78fb ldrb r3, [r7, #3]
8015ac6: b2db uxtb r3, r3
8015ac8: 005b lsls r3, r3, #1
8015aca: b2db uxtb r3, r3
8015acc: 70fb strb r3, [r7, #3]
while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
8015ace: 78fb ldrb r3, [r7, #3]
8015ad0: b2db uxtb r3, r3
8015ad2: f003 0380 and.w r3, r3, #128 @ 0x80
8015ad6: 2b80 cmp r3, #128 @ 0x80
8015ad8: d0ef beq.n 8015aba <xPortStartScheduler+0x7a>
#ifdef configPRIO_BITS
{
/* Check the FreeRTOS configuration that defines the number of
priority bits matches the number of priority bits actually queried
from the hardware. */
configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
8015ada: 4b27 ldr r3, [pc, #156] @ (8015b78 <xPortStartScheduler+0x138>)
8015adc: 681b ldr r3, [r3, #0]
8015ade: f1c3 0307 rsb r3, r3, #7
8015ae2: 2b04 cmp r3, #4
8015ae4: d00b beq.n 8015afe <xPortStartScheduler+0xbe>
__asm volatile
8015ae6: f04f 0350 mov.w r3, #80 @ 0x50
8015aea: f383 8811 msr BASEPRI, r3
8015aee: f3bf 8f6f isb sy
8015af2: f3bf 8f4f dsb sy
8015af6: 60bb str r3, [r7, #8]
}
8015af8: bf00 nop
8015afa: bf00 nop
8015afc: e7fd b.n 8015afa <xPortStartScheduler+0xba>
}
#endif
/* Shift the priority group value back to its position within the AIRCR
register. */
ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
8015afe: 4b1e ldr r3, [pc, #120] @ (8015b78 <xPortStartScheduler+0x138>)
8015b00: 681b ldr r3, [r3, #0]
8015b02: 021b lsls r3, r3, #8
8015b04: 4a1c ldr r2, [pc, #112] @ (8015b78 <xPortStartScheduler+0x138>)
8015b06: 6013 str r3, [r2, #0]
ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
8015b08: 4b1b ldr r3, [pc, #108] @ (8015b78 <xPortStartScheduler+0x138>)
8015b0a: 681b ldr r3, [r3, #0]
8015b0c: f403 63e0 and.w r3, r3, #1792 @ 0x700
8015b10: 4a19 ldr r2, [pc, #100] @ (8015b78 <xPortStartScheduler+0x138>)
8015b12: 6013 str r3, [r2, #0]
/* Restore the clobbered interrupt priority register to its original
value. */
*pucFirstUserPriorityRegister = ulOriginalPriority;
8015b14: 687b ldr r3, [r7, #4]
8015b16: b2da uxtb r2, r3
8015b18: 697b ldr r3, [r7, #20]
8015b1a: 701a strb r2, [r3, #0]
}
#endif /* conifgASSERT_DEFINED */
/* Make PendSV and SysTick the lowest priority interrupts. */
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
8015b1c: 4b17 ldr r3, [pc, #92] @ (8015b7c <xPortStartScheduler+0x13c>)
8015b1e: 681b ldr r3, [r3, #0]
8015b20: 4a16 ldr r2, [pc, #88] @ (8015b7c <xPortStartScheduler+0x13c>)
8015b22: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
8015b26: 6013 str r3, [r2, #0]
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
8015b28: 4b14 ldr r3, [pc, #80] @ (8015b7c <xPortStartScheduler+0x13c>)
8015b2a: 681b ldr r3, [r3, #0]
8015b2c: 4a13 ldr r2, [pc, #76] @ (8015b7c <xPortStartScheduler+0x13c>)
8015b2e: f043 4370 orr.w r3, r3, #4026531840 @ 0xf0000000
8015b32: 6013 str r3, [r2, #0]
/* Start the timer that generates the tick ISR. Interrupts are disabled
here already. */
vPortSetupTimerInterrupt();
8015b34: f000 f8da bl 8015cec <vPortSetupTimerInterrupt>
/* Initialise the critical nesting count ready for the first task. */
uxCriticalNesting = 0;
8015b38: 4b11 ldr r3, [pc, #68] @ (8015b80 <xPortStartScheduler+0x140>)
8015b3a: 2200 movs r2, #0
8015b3c: 601a str r2, [r3, #0]
/* Ensure the VFP is enabled - it should be anyway. */
vPortEnableVFP();
8015b3e: f000 f8f9 bl 8015d34 <vPortEnableVFP>
/* Lazy save always. */
*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
8015b42: 4b10 ldr r3, [pc, #64] @ (8015b84 <xPortStartScheduler+0x144>)
8015b44: 681b ldr r3, [r3, #0]
8015b46: 4a0f ldr r2, [pc, #60] @ (8015b84 <xPortStartScheduler+0x144>)
8015b48: f043 4340 orr.w r3, r3, #3221225472 @ 0xc0000000
8015b4c: 6013 str r3, [r2, #0]
/* Start the first task. */
prvPortStartFirstTask();
8015b4e: f7ff ff63 bl 8015a18 <prvPortStartFirstTask>
exit error function to prevent compiler warnings about a static function
not being called in the case that the application writer overrides this
functionality by defining configTASK_RETURN_ADDRESS. Call
vTaskSwitchContext() so link time optimisation does not remove the
symbol. */
vTaskSwitchContext();
8015b52: f7fe fbcf bl 80142f4 <vTaskSwitchContext>
prvTaskExitError();
8015b56: f7ff ff19 bl 801598c <prvTaskExitError>
/* Should not get here! */
return 0;
8015b5a: 2300 movs r3, #0
}
8015b5c: 4618 mov r0, r3
8015b5e: 3718 adds r7, #24
8015b60: 46bd mov sp, r7
8015b62: bd80 pop {r7, pc}
8015b64: e000ed00 .word 0xe000ed00
8015b68: 410fc271 .word 0x410fc271
8015b6c: 410fc270 .word 0x410fc270
8015b70: e000e400 .word 0xe000e400
8015b74: 240043dc .word 0x240043dc
8015b78: 240043e0 .word 0x240043e0
8015b7c: e000ed20 .word 0xe000ed20
8015b80: 24000048 .word 0x24000048
8015b84: e000ef34 .word 0xe000ef34
08015b88 <vPortEnterCritical>:
configASSERT( uxCriticalNesting == 1000UL );
}
/*-----------------------------------------------------------*/
void vPortEnterCritical( void )
{
8015b88: b480 push {r7}
8015b8a: b083 sub sp, #12
8015b8c: af00 add r7, sp, #0
__asm volatile
8015b8e: f04f 0350 mov.w r3, #80 @ 0x50
8015b92: f383 8811 msr BASEPRI, r3
8015b96: f3bf 8f6f isb sy
8015b9a: f3bf 8f4f dsb sy
8015b9e: 607b str r3, [r7, #4]
}
8015ba0: bf00 nop
portDISABLE_INTERRUPTS();
uxCriticalNesting++;
8015ba2: 4b10 ldr r3, [pc, #64] @ (8015be4 <vPortEnterCritical+0x5c>)
8015ba4: 681b ldr r3, [r3, #0]
8015ba6: 3301 adds r3, #1
8015ba8: 4a0e ldr r2, [pc, #56] @ (8015be4 <vPortEnterCritical+0x5c>)
8015baa: 6013 str r3, [r2, #0]
/* This is not the interrupt safe version of the enter critical function so
assert() if it is being called from an interrupt context. Only API
functions that end in "FromISR" can be used in an interrupt. Only assert if
the critical nesting count is 1 to protect against recursive calls if the
assert function also uses a critical section. */
if( uxCriticalNesting == 1 )
8015bac: 4b0d ldr r3, [pc, #52] @ (8015be4 <vPortEnterCritical+0x5c>)
8015bae: 681b ldr r3, [r3, #0]
8015bb0: 2b01 cmp r3, #1
8015bb2: d110 bne.n 8015bd6 <vPortEnterCritical+0x4e>
{
configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
8015bb4: 4b0c ldr r3, [pc, #48] @ (8015be8 <vPortEnterCritical+0x60>)
8015bb6: 681b ldr r3, [r3, #0]
8015bb8: b2db uxtb r3, r3
8015bba: 2b00 cmp r3, #0
8015bbc: d00b beq.n 8015bd6 <vPortEnterCritical+0x4e>
__asm volatile
8015bbe: f04f 0350 mov.w r3, #80 @ 0x50
8015bc2: f383 8811 msr BASEPRI, r3
8015bc6: f3bf 8f6f isb sy
8015bca: f3bf 8f4f dsb sy
8015bce: 603b str r3, [r7, #0]
}
8015bd0: bf00 nop
8015bd2: bf00 nop
8015bd4: e7fd b.n 8015bd2 <vPortEnterCritical+0x4a>
}
}
8015bd6: bf00 nop
8015bd8: 370c adds r7, #12
8015bda: 46bd mov sp, r7
8015bdc: f85d 7b04 ldr.w r7, [sp], #4
8015be0: 4770 bx lr
8015be2: bf00 nop
8015be4: 24000048 .word 0x24000048
8015be8: e000ed04 .word 0xe000ed04
08015bec <vPortExitCritical>:
/*-----------------------------------------------------------*/
void vPortExitCritical( void )
{
8015bec: b480 push {r7}
8015bee: b083 sub sp, #12
8015bf0: af00 add r7, sp, #0
configASSERT( uxCriticalNesting );
8015bf2: 4b12 ldr r3, [pc, #72] @ (8015c3c <vPortExitCritical+0x50>)
8015bf4: 681b ldr r3, [r3, #0]
8015bf6: 2b00 cmp r3, #0
8015bf8: d10b bne.n 8015c12 <vPortExitCritical+0x26>
__asm volatile
8015bfa: f04f 0350 mov.w r3, #80 @ 0x50
8015bfe: f383 8811 msr BASEPRI, r3
8015c02: f3bf 8f6f isb sy
8015c06: f3bf 8f4f dsb sy
8015c0a: 607b str r3, [r7, #4]
}
8015c0c: bf00 nop
8015c0e: bf00 nop
8015c10: e7fd b.n 8015c0e <vPortExitCritical+0x22>
uxCriticalNesting--;
8015c12: 4b0a ldr r3, [pc, #40] @ (8015c3c <vPortExitCritical+0x50>)
8015c14: 681b ldr r3, [r3, #0]
8015c16: 3b01 subs r3, #1
8015c18: 4a08 ldr r2, [pc, #32] @ (8015c3c <vPortExitCritical+0x50>)
8015c1a: 6013 str r3, [r2, #0]
if( uxCriticalNesting == 0 )
8015c1c: 4b07 ldr r3, [pc, #28] @ (8015c3c <vPortExitCritical+0x50>)
8015c1e: 681b ldr r3, [r3, #0]
8015c20: 2b00 cmp r3, #0
8015c22: d105 bne.n 8015c30 <vPortExitCritical+0x44>
8015c24: 2300 movs r3, #0
8015c26: 603b str r3, [r7, #0]
__asm volatile
8015c28: 683b ldr r3, [r7, #0]
8015c2a: f383 8811 msr BASEPRI, r3
}
8015c2e: bf00 nop
{
portENABLE_INTERRUPTS();
}
}
8015c30: bf00 nop
8015c32: 370c adds r7, #12
8015c34: 46bd mov sp, r7
8015c36: f85d 7b04 ldr.w r7, [sp], #4
8015c3a: 4770 bx lr
8015c3c: 24000048 .word 0x24000048
08015c40 <PendSV_Handler>:
void xPortPendSVHandler( void )
{
/* This is a naked function. */
__asm volatile
8015c40: f3ef 8009 mrs r0, PSP
8015c44: f3bf 8f6f isb sy
8015c48: 4b15 ldr r3, [pc, #84] @ (8015ca0 <pxCurrentTCBConst>)
8015c4a: 681a ldr r2, [r3, #0]
8015c4c: f01e 0f10 tst.w lr, #16
8015c50: bf08 it eq
8015c52: ed20 8a10 vstmdbeq r0!, {s16-s31}
8015c56: e920 4ff0 stmdb r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8015c5a: 6010 str r0, [r2, #0]
8015c5c: e92d 0009 stmdb sp!, {r0, r3}
8015c60: f04f 0050 mov.w r0, #80 @ 0x50
8015c64: f380 8811 msr BASEPRI, r0
8015c68: f3bf 8f4f dsb sy
8015c6c: f3bf 8f6f isb sy
8015c70: f7fe fb40 bl 80142f4 <vTaskSwitchContext>
8015c74: f04f 0000 mov.w r0, #0
8015c78: f380 8811 msr BASEPRI, r0
8015c7c: bc09 pop {r0, r3}
8015c7e: 6819 ldr r1, [r3, #0]
8015c80: 6808 ldr r0, [r1, #0]
8015c82: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8015c86: f01e 0f10 tst.w lr, #16
8015c8a: bf08 it eq
8015c8c: ecb0 8a10 vldmiaeq r0!, {s16-s31}
8015c90: f380 8809 msr PSP, r0
8015c94: f3bf 8f6f isb sy
8015c98: 4770 bx lr
8015c9a: bf00 nop
8015c9c: f3af 8000 nop.w
08015ca0 <pxCurrentTCBConst>:
8015ca0: 24003db0 .word 0x24003db0
" \n"
" .align 4 \n"
"pxCurrentTCBConst: .word pxCurrentTCB \n"
::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
);
}
8015ca4: bf00 nop
8015ca6: bf00 nop
08015ca8 <xPortSysTickHandler>:
/*-----------------------------------------------------------*/
void xPortSysTickHandler( void )
{
8015ca8: b580 push {r7, lr}
8015caa: b082 sub sp, #8
8015cac: af00 add r7, sp, #0
__asm volatile
8015cae: f04f 0350 mov.w r3, #80 @ 0x50
8015cb2: f383 8811 msr BASEPRI, r3
8015cb6: f3bf 8f6f isb sy
8015cba: f3bf 8f4f dsb sy
8015cbe: 607b str r3, [r7, #4]
}
8015cc0: bf00 nop
save and then restore the interrupt mask value as its value is already
known. */
portDISABLE_INTERRUPTS();
{
/* Increment the RTOS tick. */
if( xTaskIncrementTick() != pdFALSE )
8015cc2: f7fe fa5d bl 8014180 <xTaskIncrementTick>
8015cc6: 4603 mov r3, r0
8015cc8: 2b00 cmp r3, #0
8015cca: d003 beq.n 8015cd4 <xPortSysTickHandler+0x2c>
{
/* A context switch is required. Context switching is performed in
the PendSV interrupt. Pend the PendSV interrupt. */
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
8015ccc: 4b06 ldr r3, [pc, #24] @ (8015ce8 <xPortSysTickHandler+0x40>)
8015cce: f04f 5280 mov.w r2, #268435456 @ 0x10000000
8015cd2: 601a str r2, [r3, #0]
8015cd4: 2300 movs r3, #0
8015cd6: 603b str r3, [r7, #0]
__asm volatile
8015cd8: 683b ldr r3, [r7, #0]
8015cda: f383 8811 msr BASEPRI, r3
}
8015cde: bf00 nop
}
}
portENABLE_INTERRUPTS();
}
8015ce0: bf00 nop
8015ce2: 3708 adds r7, #8
8015ce4: 46bd mov sp, r7
8015ce6: bd80 pop {r7, pc}
8015ce8: e000ed04 .word 0xe000ed04
08015cec <vPortSetupTimerInterrupt>:
/*
* Setup the systick timer to generate the tick interrupts at the required
* frequency.
*/
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
{
8015cec: b480 push {r7}
8015cee: af00 add r7, sp, #0
ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
}
#endif /* configUSE_TICKLESS_IDLE */
/* Stop and clear the SysTick. */
portNVIC_SYSTICK_CTRL_REG = 0UL;
8015cf0: 4b0b ldr r3, [pc, #44] @ (8015d20 <vPortSetupTimerInterrupt+0x34>)
8015cf2: 2200 movs r2, #0
8015cf4: 601a str r2, [r3, #0]
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
8015cf6: 4b0b ldr r3, [pc, #44] @ (8015d24 <vPortSetupTimerInterrupt+0x38>)
8015cf8: 2200 movs r2, #0
8015cfa: 601a str r2, [r3, #0]
/* Configure SysTick to interrupt at the requested rate. */
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
8015cfc: 4b0a ldr r3, [pc, #40] @ (8015d28 <vPortSetupTimerInterrupt+0x3c>)
8015cfe: 681b ldr r3, [r3, #0]
8015d00: 4a0a ldr r2, [pc, #40] @ (8015d2c <vPortSetupTimerInterrupt+0x40>)
8015d02: fba2 2303 umull r2, r3, r2, r3
8015d06: 099b lsrs r3, r3, #6
8015d08: 4a09 ldr r2, [pc, #36] @ (8015d30 <vPortSetupTimerInterrupt+0x44>)
8015d0a: 3b01 subs r3, #1
8015d0c: 6013 str r3, [r2, #0]
portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
8015d0e: 4b04 ldr r3, [pc, #16] @ (8015d20 <vPortSetupTimerInterrupt+0x34>)
8015d10: 2207 movs r2, #7
8015d12: 601a str r2, [r3, #0]
}
8015d14: bf00 nop
8015d16: 46bd mov sp, r7
8015d18: f85d 7b04 ldr.w r7, [sp], #4
8015d1c: 4770 bx lr
8015d1e: bf00 nop
8015d20: e000e010 .word 0xe000e010
8015d24: e000e018 .word 0xe000e018
8015d28: 2400000c .word 0x2400000c
8015d2c: 10624dd3 .word 0x10624dd3
8015d30: e000e014 .word 0xe000e014
08015d34 <vPortEnableVFP>:
/*-----------------------------------------------------------*/
/* This is a naked function. */
static void vPortEnableVFP( void )
{
__asm volatile
8015d34: f8df 000c ldr.w r0, [pc, #12] @ 8015d44 <vPortEnableVFP+0x10>
8015d38: 6801 ldr r1, [r0, #0]
8015d3a: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000
8015d3e: 6001 str r1, [r0, #0]
8015d40: 4770 bx lr
" \n"
" orr r1, r1, #( 0xf << 20 ) \n" /* Enable CP10 and CP11 coprocessors, then save back. */
" str r1, [r0] \n"
" bx r14 "
);
}
8015d42: bf00 nop
8015d44: e000ed88 .word 0xe000ed88
08015d48 <vPortValidateInterruptPriority>:
/*-----------------------------------------------------------*/
#if( configASSERT_DEFINED == 1 )
void vPortValidateInterruptPriority( void )
{
8015d48: b480 push {r7}
8015d4a: b085 sub sp, #20
8015d4c: af00 add r7, sp, #0
uint32_t ulCurrentInterrupt;
uint8_t ucCurrentPriority;
/* Obtain the number of the currently executing interrupt. */
__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
8015d4e: f3ef 8305 mrs r3, IPSR
8015d52: 60fb str r3, [r7, #12]
/* Is the interrupt number a user defined interrupt? */
if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
8015d54: 68fb ldr r3, [r7, #12]
8015d56: 2b0f cmp r3, #15
8015d58: d915 bls.n 8015d86 <vPortValidateInterruptPriority+0x3e>
{
/* Look up the interrupt's priority. */
ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
8015d5a: 4a18 ldr r2, [pc, #96] @ (8015dbc <vPortValidateInterruptPriority+0x74>)
8015d5c: 68fb ldr r3, [r7, #12]
8015d5e: 4413 add r3, r2
8015d60: 781b ldrb r3, [r3, #0]
8015d62: 72fb strb r3, [r7, #11]
interrupt entry is as fast and simple as possible.
The following links provide detailed information:
http://www.freertos.org/RTOS-Cortex-M3-M4.html
http://www.freertos.org/FAQHelp.html */
configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
8015d64: 4b16 ldr r3, [pc, #88] @ (8015dc0 <vPortValidateInterruptPriority+0x78>)
8015d66: 781b ldrb r3, [r3, #0]
8015d68: 7afa ldrb r2, [r7, #11]
8015d6a: 429a cmp r2, r3
8015d6c: d20b bcs.n 8015d86 <vPortValidateInterruptPriority+0x3e>
__asm volatile
8015d6e: f04f 0350 mov.w r3, #80 @ 0x50
8015d72: f383 8811 msr BASEPRI, r3
8015d76: f3bf 8f6f isb sy
8015d7a: f3bf 8f4f dsb sy
8015d7e: 607b str r3, [r7, #4]
}
8015d80: bf00 nop
8015d82: bf00 nop
8015d84: e7fd b.n 8015d82 <vPortValidateInterruptPriority+0x3a>
configuration then the correct setting can be achieved on all Cortex-M
devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
scheduler. Note however that some vendor specific peripheral libraries
assume a non-zero priority group setting, in which cases using a value
of zero will result in unpredictable behaviour. */
configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
8015d86: 4b0f ldr r3, [pc, #60] @ (8015dc4 <vPortValidateInterruptPriority+0x7c>)
8015d88: 681b ldr r3, [r3, #0]
8015d8a: f403 62e0 and.w r2, r3, #1792 @ 0x700
8015d8e: 4b0e ldr r3, [pc, #56] @ (8015dc8 <vPortValidateInterruptPriority+0x80>)
8015d90: 681b ldr r3, [r3, #0]
8015d92: 429a cmp r2, r3
8015d94: d90b bls.n 8015dae <vPortValidateInterruptPriority+0x66>
__asm volatile
8015d96: f04f 0350 mov.w r3, #80 @ 0x50
8015d9a: f383 8811 msr BASEPRI, r3
8015d9e: f3bf 8f6f isb sy
8015da2: f3bf 8f4f dsb sy
8015da6: 603b str r3, [r7, #0]
}
8015da8: bf00 nop
8015daa: bf00 nop
8015dac: e7fd b.n 8015daa <vPortValidateInterruptPriority+0x62>
}
8015dae: bf00 nop
8015db0: 3714 adds r7, #20
8015db2: 46bd mov sp, r7
8015db4: f85d 7b04 ldr.w r7, [sp], #4
8015db8: 4770 bx lr
8015dba: bf00 nop
8015dbc: e000e3f0 .word 0xe000e3f0
8015dc0: 240043dc .word 0x240043dc
8015dc4: e000ed0c .word 0xe000ed0c
8015dc8: 240043e0 .word 0x240043e0
08015dcc <pvPortMalloc>:
static size_t xBlockAllocatedBit = 0;
/*-----------------------------------------------------------*/
void *pvPortMalloc( size_t xWantedSize )
{
8015dcc: b580 push {r7, lr}
8015dce: b08a sub sp, #40 @ 0x28
8015dd0: af00 add r7, sp, #0
8015dd2: 6078 str r0, [r7, #4]
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
8015dd4: 2300 movs r3, #0
8015dd6: 61fb str r3, [r7, #28]
vTaskSuspendAll();
8015dd8: f7fe f904 bl 8013fe4 <vTaskSuspendAll>
{
/* If this is the first call to malloc then the heap will require
initialisation to setup the list of free blocks. */
if( pxEnd == NULL )
8015ddc: 4b5c ldr r3, [pc, #368] @ (8015f50 <pvPortMalloc+0x184>)
8015dde: 681b ldr r3, [r3, #0]
8015de0: 2b00 cmp r3, #0
8015de2: d101 bne.n 8015de8 <pvPortMalloc+0x1c>
{
prvHeapInit();
8015de4: f000 f924 bl 8016030 <prvHeapInit>
/* Check the requested block size is not so large that the top bit is
set. The top bit of the block size member of the BlockLink_t structure
is used to determine who owns the block - the application or the
kernel, so it must be free. */
if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
8015de8: 4b5a ldr r3, [pc, #360] @ (8015f54 <pvPortMalloc+0x188>)
8015dea: 681a ldr r2, [r3, #0]
8015dec: 687b ldr r3, [r7, #4]
8015dee: 4013 ands r3, r2
8015df0: 2b00 cmp r3, #0
8015df2: f040 8095 bne.w 8015f20 <pvPortMalloc+0x154>
{
/* The wanted size is increased so it can contain a BlockLink_t
structure in addition to the requested amount of bytes. */
if( xWantedSize > 0 )
8015df6: 687b ldr r3, [r7, #4]
8015df8: 2b00 cmp r3, #0
8015dfa: d01e beq.n 8015e3a <pvPortMalloc+0x6e>
{
xWantedSize += xHeapStructSize;
8015dfc: 2208 movs r2, #8
8015dfe: 687b ldr r3, [r7, #4]
8015e00: 4413 add r3, r2
8015e02: 607b str r3, [r7, #4]
/* Ensure that blocks are always aligned to the required number
of bytes. */
if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
8015e04: 687b ldr r3, [r7, #4]
8015e06: f003 0307 and.w r3, r3, #7
8015e0a: 2b00 cmp r3, #0
8015e0c: d015 beq.n 8015e3a <pvPortMalloc+0x6e>
{
/* Byte alignment required. */
xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
8015e0e: 687b ldr r3, [r7, #4]
8015e10: f023 0307 bic.w r3, r3, #7
8015e14: 3308 adds r3, #8
8015e16: 607b str r3, [r7, #4]
configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
8015e18: 687b ldr r3, [r7, #4]
8015e1a: f003 0307 and.w r3, r3, #7
8015e1e: 2b00 cmp r3, #0
8015e20: d00b beq.n 8015e3a <pvPortMalloc+0x6e>
__asm volatile
8015e22: f04f 0350 mov.w r3, #80 @ 0x50
8015e26: f383 8811 msr BASEPRI, r3
8015e2a: f3bf 8f6f isb sy
8015e2e: f3bf 8f4f dsb sy
8015e32: 617b str r3, [r7, #20]
}
8015e34: bf00 nop
8015e36: bf00 nop
8015e38: e7fd b.n 8015e36 <pvPortMalloc+0x6a>
else
{
mtCOVERAGE_TEST_MARKER();
}
if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
8015e3a: 687b ldr r3, [r7, #4]
8015e3c: 2b00 cmp r3, #0
8015e3e: d06f beq.n 8015f20 <pvPortMalloc+0x154>
8015e40: 4b45 ldr r3, [pc, #276] @ (8015f58 <pvPortMalloc+0x18c>)
8015e42: 681b ldr r3, [r3, #0]
8015e44: 687a ldr r2, [r7, #4]
8015e46: 429a cmp r2, r3
8015e48: d86a bhi.n 8015f20 <pvPortMalloc+0x154>
{
/* Traverse the list from the start (lowest address) block until
one of adequate size is found. */
pxPreviousBlock = &xStart;
8015e4a: 4b44 ldr r3, [pc, #272] @ (8015f5c <pvPortMalloc+0x190>)
8015e4c: 623b str r3, [r7, #32]
pxBlock = xStart.pxNextFreeBlock;
8015e4e: 4b43 ldr r3, [pc, #268] @ (8015f5c <pvPortMalloc+0x190>)
8015e50: 681b ldr r3, [r3, #0]
8015e52: 627b str r3, [r7, #36] @ 0x24
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
8015e54: e004 b.n 8015e60 <pvPortMalloc+0x94>
{
pxPreviousBlock = pxBlock;
8015e56: 6a7b ldr r3, [r7, #36] @ 0x24
8015e58: 623b str r3, [r7, #32]
pxBlock = pxBlock->pxNextFreeBlock;
8015e5a: 6a7b ldr r3, [r7, #36] @ 0x24
8015e5c: 681b ldr r3, [r3, #0]
8015e5e: 627b str r3, [r7, #36] @ 0x24
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
8015e60: 6a7b ldr r3, [r7, #36] @ 0x24
8015e62: 685b ldr r3, [r3, #4]
8015e64: 687a ldr r2, [r7, #4]
8015e66: 429a cmp r2, r3
8015e68: d903 bls.n 8015e72 <pvPortMalloc+0xa6>
8015e6a: 6a7b ldr r3, [r7, #36] @ 0x24
8015e6c: 681b ldr r3, [r3, #0]
8015e6e: 2b00 cmp r3, #0
8015e70: d1f1 bne.n 8015e56 <pvPortMalloc+0x8a>
}
/* If the end marker was reached then a block of adequate size
was not found. */
if( pxBlock != pxEnd )
8015e72: 4b37 ldr r3, [pc, #220] @ (8015f50 <pvPortMalloc+0x184>)
8015e74: 681b ldr r3, [r3, #0]
8015e76: 6a7a ldr r2, [r7, #36] @ 0x24
8015e78: 429a cmp r2, r3
8015e7a: d051 beq.n 8015f20 <pvPortMalloc+0x154>
{
/* Return the memory space pointed to - jumping over the
BlockLink_t structure at its start. */
pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
8015e7c: 6a3b ldr r3, [r7, #32]
8015e7e: 681b ldr r3, [r3, #0]
8015e80: 2208 movs r2, #8
8015e82: 4413 add r3, r2
8015e84: 61fb str r3, [r7, #28]
/* This block is being returned for use so must be taken out
of the list of free blocks. */
pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
8015e86: 6a7b ldr r3, [r7, #36] @ 0x24
8015e88: 681a ldr r2, [r3, #0]
8015e8a: 6a3b ldr r3, [r7, #32]
8015e8c: 601a str r2, [r3, #0]
/* If the block is larger than required it can be split into
two. */
if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
8015e8e: 6a7b ldr r3, [r7, #36] @ 0x24
8015e90: 685a ldr r2, [r3, #4]
8015e92: 687b ldr r3, [r7, #4]
8015e94: 1ad2 subs r2, r2, r3
8015e96: 2308 movs r3, #8
8015e98: 005b lsls r3, r3, #1
8015e9a: 429a cmp r2, r3
8015e9c: d920 bls.n 8015ee0 <pvPortMalloc+0x114>
{
/* This block is to be split into two. Create a new
block following the number of bytes requested. The void
cast is used to prevent byte alignment warnings from the
compiler. */
pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
8015e9e: 6a7a ldr r2, [r7, #36] @ 0x24
8015ea0: 687b ldr r3, [r7, #4]
8015ea2: 4413 add r3, r2
8015ea4: 61bb str r3, [r7, #24]
configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
8015ea6: 69bb ldr r3, [r7, #24]
8015ea8: f003 0307 and.w r3, r3, #7
8015eac: 2b00 cmp r3, #0
8015eae: d00b beq.n 8015ec8 <pvPortMalloc+0xfc>
__asm volatile
8015eb0: f04f 0350 mov.w r3, #80 @ 0x50
8015eb4: f383 8811 msr BASEPRI, r3
8015eb8: f3bf 8f6f isb sy
8015ebc: f3bf 8f4f dsb sy
8015ec0: 613b str r3, [r7, #16]
}
8015ec2: bf00 nop
8015ec4: bf00 nop
8015ec6: e7fd b.n 8015ec4 <pvPortMalloc+0xf8>
/* Calculate the sizes of two blocks split from the
single block. */
pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
8015ec8: 6a7b ldr r3, [r7, #36] @ 0x24
8015eca: 685a ldr r2, [r3, #4]
8015ecc: 687b ldr r3, [r7, #4]
8015ece: 1ad2 subs r2, r2, r3
8015ed0: 69bb ldr r3, [r7, #24]
8015ed2: 605a str r2, [r3, #4]
pxBlock->xBlockSize = xWantedSize;
8015ed4: 6a7b ldr r3, [r7, #36] @ 0x24
8015ed6: 687a ldr r2, [r7, #4]
8015ed8: 605a str r2, [r3, #4]
/* Insert the new block into the list of free blocks. */
prvInsertBlockIntoFreeList( pxNewBlockLink );
8015eda: 69b8 ldr r0, [r7, #24]
8015edc: f000 f90a bl 80160f4 <prvInsertBlockIntoFreeList>
else
{
mtCOVERAGE_TEST_MARKER();
}
xFreeBytesRemaining -= pxBlock->xBlockSize;
8015ee0: 4b1d ldr r3, [pc, #116] @ (8015f58 <pvPortMalloc+0x18c>)
8015ee2: 681a ldr r2, [r3, #0]
8015ee4: 6a7b ldr r3, [r7, #36] @ 0x24
8015ee6: 685b ldr r3, [r3, #4]
8015ee8: 1ad3 subs r3, r2, r3
8015eea: 4a1b ldr r2, [pc, #108] @ (8015f58 <pvPortMalloc+0x18c>)
8015eec: 6013 str r3, [r2, #0]
if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
8015eee: 4b1a ldr r3, [pc, #104] @ (8015f58 <pvPortMalloc+0x18c>)
8015ef0: 681a ldr r2, [r3, #0]
8015ef2: 4b1b ldr r3, [pc, #108] @ (8015f60 <pvPortMalloc+0x194>)
8015ef4: 681b ldr r3, [r3, #0]
8015ef6: 429a cmp r2, r3
8015ef8: d203 bcs.n 8015f02 <pvPortMalloc+0x136>
{
xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
8015efa: 4b17 ldr r3, [pc, #92] @ (8015f58 <pvPortMalloc+0x18c>)
8015efc: 681b ldr r3, [r3, #0]
8015efe: 4a18 ldr r2, [pc, #96] @ (8015f60 <pvPortMalloc+0x194>)
8015f00: 6013 str r3, [r2, #0]
mtCOVERAGE_TEST_MARKER();
}
/* The block is being returned - it is allocated and owned
by the application and has no "next" block. */
pxBlock->xBlockSize |= xBlockAllocatedBit;
8015f02: 6a7b ldr r3, [r7, #36] @ 0x24
8015f04: 685a ldr r2, [r3, #4]
8015f06: 4b13 ldr r3, [pc, #76] @ (8015f54 <pvPortMalloc+0x188>)
8015f08: 681b ldr r3, [r3, #0]
8015f0a: 431a orrs r2, r3
8015f0c: 6a7b ldr r3, [r7, #36] @ 0x24
8015f0e: 605a str r2, [r3, #4]
pxBlock->pxNextFreeBlock = NULL;
8015f10: 6a7b ldr r3, [r7, #36] @ 0x24
8015f12: 2200 movs r2, #0
8015f14: 601a str r2, [r3, #0]
xNumberOfSuccessfulAllocations++;
8015f16: 4b13 ldr r3, [pc, #76] @ (8015f64 <pvPortMalloc+0x198>)
8015f18: 681b ldr r3, [r3, #0]
8015f1a: 3301 adds r3, #1
8015f1c: 4a11 ldr r2, [pc, #68] @ (8015f64 <pvPortMalloc+0x198>)
8015f1e: 6013 str r3, [r2, #0]
mtCOVERAGE_TEST_MARKER();
}
traceMALLOC( pvReturn, xWantedSize );
}
( void ) xTaskResumeAll();
8015f20: f7fe f86e bl 8014000 <xTaskResumeAll>
mtCOVERAGE_TEST_MARKER();
}
}
#endif
configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
8015f24: 69fb ldr r3, [r7, #28]
8015f26: f003 0307 and.w r3, r3, #7
8015f2a: 2b00 cmp r3, #0
8015f2c: d00b beq.n 8015f46 <pvPortMalloc+0x17a>
__asm volatile
8015f2e: f04f 0350 mov.w r3, #80 @ 0x50
8015f32: f383 8811 msr BASEPRI, r3
8015f36: f3bf 8f6f isb sy
8015f3a: f3bf 8f4f dsb sy
8015f3e: 60fb str r3, [r7, #12]
}
8015f40: bf00 nop
8015f42: bf00 nop
8015f44: e7fd b.n 8015f42 <pvPortMalloc+0x176>
return pvReturn;
8015f46: 69fb ldr r3, [r7, #28]
}
8015f48: 4618 mov r0, r3
8015f4a: 3728 adds r7, #40 @ 0x28
8015f4c: 46bd mov sp, r7
8015f4e: bd80 pop {r7, pc}
8015f50: 240243ec .word 0x240243ec
8015f54: 24024400 .word 0x24024400
8015f58: 240243f0 .word 0x240243f0
8015f5c: 240243e4 .word 0x240243e4
8015f60: 240243f4 .word 0x240243f4
8015f64: 240243f8 .word 0x240243f8
08015f68 <vPortFree>:
/*-----------------------------------------------------------*/
void vPortFree( void *pv )
{
8015f68: b580 push {r7, lr}
8015f6a: b086 sub sp, #24
8015f6c: af00 add r7, sp, #0
8015f6e: 6078 str r0, [r7, #4]
uint8_t *puc = ( uint8_t * ) pv;
8015f70: 687b ldr r3, [r7, #4]
8015f72: 617b str r3, [r7, #20]
BlockLink_t *pxLink;
if( pv != NULL )
8015f74: 687b ldr r3, [r7, #4]
8015f76: 2b00 cmp r3, #0
8015f78: d04f beq.n 801601a <vPortFree+0xb2>
{
/* The memory being freed will have an BlockLink_t structure immediately
before it. */
puc -= xHeapStructSize;
8015f7a: 2308 movs r3, #8
8015f7c: 425b negs r3, r3
8015f7e: 697a ldr r2, [r7, #20]
8015f80: 4413 add r3, r2
8015f82: 617b str r3, [r7, #20]
/* This casting is to keep the compiler from issuing warnings. */
pxLink = ( void * ) puc;
8015f84: 697b ldr r3, [r7, #20]
8015f86: 613b str r3, [r7, #16]
/* Check the block is actually allocated. */
configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
8015f88: 693b ldr r3, [r7, #16]
8015f8a: 685a ldr r2, [r3, #4]
8015f8c: 4b25 ldr r3, [pc, #148] @ (8016024 <vPortFree+0xbc>)
8015f8e: 681b ldr r3, [r3, #0]
8015f90: 4013 ands r3, r2
8015f92: 2b00 cmp r3, #0
8015f94: d10b bne.n 8015fae <vPortFree+0x46>
__asm volatile
8015f96: f04f 0350 mov.w r3, #80 @ 0x50
8015f9a: f383 8811 msr BASEPRI, r3
8015f9e: f3bf 8f6f isb sy
8015fa2: f3bf 8f4f dsb sy
8015fa6: 60fb str r3, [r7, #12]
}
8015fa8: bf00 nop
8015faa: bf00 nop
8015fac: e7fd b.n 8015faa <vPortFree+0x42>
configASSERT( pxLink->pxNextFreeBlock == NULL );
8015fae: 693b ldr r3, [r7, #16]
8015fb0: 681b ldr r3, [r3, #0]
8015fb2: 2b00 cmp r3, #0
8015fb4: d00b beq.n 8015fce <vPortFree+0x66>
__asm volatile
8015fb6: f04f 0350 mov.w r3, #80 @ 0x50
8015fba: f383 8811 msr BASEPRI, r3
8015fbe: f3bf 8f6f isb sy
8015fc2: f3bf 8f4f dsb sy
8015fc6: 60bb str r3, [r7, #8]
}
8015fc8: bf00 nop
8015fca: bf00 nop
8015fcc: e7fd b.n 8015fca <vPortFree+0x62>
if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
8015fce: 693b ldr r3, [r7, #16]
8015fd0: 685a ldr r2, [r3, #4]
8015fd2: 4b14 ldr r3, [pc, #80] @ (8016024 <vPortFree+0xbc>)
8015fd4: 681b ldr r3, [r3, #0]
8015fd6: 4013 ands r3, r2
8015fd8: 2b00 cmp r3, #0
8015fda: d01e beq.n 801601a <vPortFree+0xb2>
{
if( pxLink->pxNextFreeBlock == NULL )
8015fdc: 693b ldr r3, [r7, #16]
8015fde: 681b ldr r3, [r3, #0]
8015fe0: 2b00 cmp r3, #0
8015fe2: d11a bne.n 801601a <vPortFree+0xb2>
{
/* The block is being returned to the heap - it is no longer
allocated. */
pxLink->xBlockSize &= ~xBlockAllocatedBit;
8015fe4: 693b ldr r3, [r7, #16]
8015fe6: 685a ldr r2, [r3, #4]
8015fe8: 4b0e ldr r3, [pc, #56] @ (8016024 <vPortFree+0xbc>)
8015fea: 681b ldr r3, [r3, #0]
8015fec: 43db mvns r3, r3
8015fee: 401a ands r2, r3
8015ff0: 693b ldr r3, [r7, #16]
8015ff2: 605a str r2, [r3, #4]
vTaskSuspendAll();
8015ff4: f7fd fff6 bl 8013fe4 <vTaskSuspendAll>
{
/* Add this block to the list of free blocks. */
xFreeBytesRemaining += pxLink->xBlockSize;
8015ff8: 693b ldr r3, [r7, #16]
8015ffa: 685a ldr r2, [r3, #4]
8015ffc: 4b0a ldr r3, [pc, #40] @ (8016028 <vPortFree+0xc0>)
8015ffe: 681b ldr r3, [r3, #0]
8016000: 4413 add r3, r2
8016002: 4a09 ldr r2, [pc, #36] @ (8016028 <vPortFree+0xc0>)
8016004: 6013 str r3, [r2, #0]
traceFREE( pv, pxLink->xBlockSize );
prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
8016006: 6938 ldr r0, [r7, #16]
8016008: f000 f874 bl 80160f4 <prvInsertBlockIntoFreeList>
xNumberOfSuccessfulFrees++;
801600c: 4b07 ldr r3, [pc, #28] @ (801602c <vPortFree+0xc4>)
801600e: 681b ldr r3, [r3, #0]
8016010: 3301 adds r3, #1
8016012: 4a06 ldr r2, [pc, #24] @ (801602c <vPortFree+0xc4>)
8016014: 6013 str r3, [r2, #0]
}
( void ) xTaskResumeAll();
8016016: f7fd fff3 bl 8014000 <xTaskResumeAll>
else
{
mtCOVERAGE_TEST_MARKER();
}
}
}
801601a: bf00 nop
801601c: 3718 adds r7, #24
801601e: 46bd mov sp, r7
8016020: bd80 pop {r7, pc}
8016022: bf00 nop
8016024: 24024400 .word 0x24024400
8016028: 240243f0 .word 0x240243f0
801602c: 240243fc .word 0x240243fc
08016030 <prvHeapInit>:
/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/
static void prvHeapInit( void )
{
8016030: b480 push {r7}
8016032: b085 sub sp, #20
8016034: af00 add r7, sp, #0
BlockLink_t *pxFirstFreeBlock;
uint8_t *pucAlignedHeap;
size_t uxAddress;
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
8016036: f44f 3300 mov.w r3, #131072 @ 0x20000
801603a: 60bb str r3, [r7, #8]
/* Ensure the heap starts on a correctly aligned boundary. */
uxAddress = ( size_t ) ucHeap;
801603c: 4b27 ldr r3, [pc, #156] @ (80160dc <prvHeapInit+0xac>)
801603e: 60fb str r3, [r7, #12]
if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
8016040: 68fb ldr r3, [r7, #12]
8016042: f003 0307 and.w r3, r3, #7
8016046: 2b00 cmp r3, #0
8016048: d00c beq.n 8016064 <prvHeapInit+0x34>
{
uxAddress += ( portBYTE_ALIGNMENT - 1 );
801604a: 68fb ldr r3, [r7, #12]
801604c: 3307 adds r3, #7
801604e: 60fb str r3, [r7, #12]
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
8016050: 68fb ldr r3, [r7, #12]
8016052: f023 0307 bic.w r3, r3, #7
8016056: 60fb str r3, [r7, #12]
xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
8016058: 68ba ldr r2, [r7, #8]
801605a: 68fb ldr r3, [r7, #12]
801605c: 1ad3 subs r3, r2, r3
801605e: 4a1f ldr r2, [pc, #124] @ (80160dc <prvHeapInit+0xac>)
8016060: 4413 add r3, r2
8016062: 60bb str r3, [r7, #8]
}
pucAlignedHeap = ( uint8_t * ) uxAddress;
8016064: 68fb ldr r3, [r7, #12]
8016066: 607b str r3, [r7, #4]
/* xStart is used to hold a pointer to the first item in the list of free
blocks. The void cast is used to prevent compiler warnings. */
xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
8016068: 4a1d ldr r2, [pc, #116] @ (80160e0 <prvHeapInit+0xb0>)
801606a: 687b ldr r3, [r7, #4]
801606c: 6013 str r3, [r2, #0]
xStart.xBlockSize = ( size_t ) 0;
801606e: 4b1c ldr r3, [pc, #112] @ (80160e0 <prvHeapInit+0xb0>)
8016070: 2200 movs r2, #0
8016072: 605a str r2, [r3, #4]
/* pxEnd is used to mark the end of the list of free blocks and is inserted
at the end of the heap space. */
uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
8016074: 687b ldr r3, [r7, #4]
8016076: 68ba ldr r2, [r7, #8]
8016078: 4413 add r3, r2
801607a: 60fb str r3, [r7, #12]
uxAddress -= xHeapStructSize;
801607c: 2208 movs r2, #8
801607e: 68fb ldr r3, [r7, #12]
8016080: 1a9b subs r3, r3, r2
8016082: 60fb str r3, [r7, #12]
uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
8016084: 68fb ldr r3, [r7, #12]
8016086: f023 0307 bic.w r3, r3, #7
801608a: 60fb str r3, [r7, #12]
pxEnd = ( void * ) uxAddress;
801608c: 68fb ldr r3, [r7, #12]
801608e: 4a15 ldr r2, [pc, #84] @ (80160e4 <prvHeapInit+0xb4>)
8016090: 6013 str r3, [r2, #0]
pxEnd->xBlockSize = 0;
8016092: 4b14 ldr r3, [pc, #80] @ (80160e4 <prvHeapInit+0xb4>)
8016094: 681b ldr r3, [r3, #0]
8016096: 2200 movs r2, #0
8016098: 605a str r2, [r3, #4]
pxEnd->pxNextFreeBlock = NULL;
801609a: 4b12 ldr r3, [pc, #72] @ (80160e4 <prvHeapInit+0xb4>)
801609c: 681b ldr r3, [r3, #0]
801609e: 2200 movs r2, #0
80160a0: 601a str r2, [r3, #0]
/* To start with there is a single free block that is sized to take up the
entire heap space, minus the space taken by pxEnd. */
pxFirstFreeBlock = ( void * ) pucAlignedHeap;
80160a2: 687b ldr r3, [r7, #4]
80160a4: 603b str r3, [r7, #0]
pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
80160a6: 683b ldr r3, [r7, #0]
80160a8: 68fa ldr r2, [r7, #12]
80160aa: 1ad2 subs r2, r2, r3
80160ac: 683b ldr r3, [r7, #0]
80160ae: 605a str r2, [r3, #4]
pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
80160b0: 4b0c ldr r3, [pc, #48] @ (80160e4 <prvHeapInit+0xb4>)
80160b2: 681a ldr r2, [r3, #0]
80160b4: 683b ldr r3, [r7, #0]
80160b6: 601a str r2, [r3, #0]
/* Only one block exists - and it covers the entire usable heap space. */
xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
80160b8: 683b ldr r3, [r7, #0]
80160ba: 685b ldr r3, [r3, #4]
80160bc: 4a0a ldr r2, [pc, #40] @ (80160e8 <prvHeapInit+0xb8>)
80160be: 6013 str r3, [r2, #0]
xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
80160c0: 683b ldr r3, [r7, #0]
80160c2: 685b ldr r3, [r3, #4]
80160c4: 4a09 ldr r2, [pc, #36] @ (80160ec <prvHeapInit+0xbc>)
80160c6: 6013 str r3, [r2, #0]
/* Work out the position of the top bit in a size_t variable. */
xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
80160c8: 4b09 ldr r3, [pc, #36] @ (80160f0 <prvHeapInit+0xc0>)
80160ca: f04f 4200 mov.w r2, #2147483648 @ 0x80000000
80160ce: 601a str r2, [r3, #0]
}
80160d0: bf00 nop
80160d2: 3714 adds r7, #20
80160d4: 46bd mov sp, r7
80160d6: f85d 7b04 ldr.w r7, [sp], #4
80160da: 4770 bx lr
80160dc: 240043e4 .word 0x240043e4
80160e0: 240243e4 .word 0x240243e4
80160e4: 240243ec .word 0x240243ec
80160e8: 240243f4 .word 0x240243f4
80160ec: 240243f0 .word 0x240243f0
80160f0: 24024400 .word 0x24024400
080160f4 <prvInsertBlockIntoFreeList>:
/*-----------------------------------------------------------*/
static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
{
80160f4: b480 push {r7}
80160f6: b085 sub sp, #20
80160f8: af00 add r7, sp, #0
80160fa: 6078 str r0, [r7, #4]
BlockLink_t *pxIterator;
uint8_t *puc;
/* Iterate through the list until a block is found that has a higher address
than the block being inserted. */
for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
80160fc: 4b28 ldr r3, [pc, #160] @ (80161a0 <prvInsertBlockIntoFreeList+0xac>)
80160fe: 60fb str r3, [r7, #12]
8016100: e002 b.n 8016108 <prvInsertBlockIntoFreeList+0x14>
8016102: 68fb ldr r3, [r7, #12]
8016104: 681b ldr r3, [r3, #0]
8016106: 60fb str r3, [r7, #12]
8016108: 68fb ldr r3, [r7, #12]
801610a: 681b ldr r3, [r3, #0]
801610c: 687a ldr r2, [r7, #4]
801610e: 429a cmp r2, r3
8016110: d8f7 bhi.n 8016102 <prvInsertBlockIntoFreeList+0xe>
/* Nothing to do here, just iterate to the right position. */
}
/* Do the block being inserted, and the block it is being inserted after
make a contiguous block of memory? */
puc = ( uint8_t * ) pxIterator;
8016112: 68fb ldr r3, [r7, #12]
8016114: 60bb str r3, [r7, #8]
if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
8016116: 68fb ldr r3, [r7, #12]
8016118: 685b ldr r3, [r3, #4]
801611a: 68ba ldr r2, [r7, #8]
801611c: 4413 add r3, r2
801611e: 687a ldr r2, [r7, #4]
8016120: 429a cmp r2, r3
8016122: d108 bne.n 8016136 <prvInsertBlockIntoFreeList+0x42>
{
pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
8016124: 68fb ldr r3, [r7, #12]
8016126: 685a ldr r2, [r3, #4]
8016128: 687b ldr r3, [r7, #4]
801612a: 685b ldr r3, [r3, #4]
801612c: 441a add r2, r3
801612e: 68fb ldr r3, [r7, #12]
8016130: 605a str r2, [r3, #4]
pxBlockToInsert = pxIterator;
8016132: 68fb ldr r3, [r7, #12]
8016134: 607b str r3, [r7, #4]
mtCOVERAGE_TEST_MARKER();
}
/* Do the block being inserted, and the block it is being inserted before
make a contiguous block of memory? */
puc = ( uint8_t * ) pxBlockToInsert;
8016136: 687b ldr r3, [r7, #4]
8016138: 60bb str r3, [r7, #8]
if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
801613a: 687b ldr r3, [r7, #4]
801613c: 685b ldr r3, [r3, #4]
801613e: 68ba ldr r2, [r7, #8]
8016140: 441a add r2, r3
8016142: 68fb ldr r3, [r7, #12]
8016144: 681b ldr r3, [r3, #0]
8016146: 429a cmp r2, r3
8016148: d118 bne.n 801617c <prvInsertBlockIntoFreeList+0x88>
{
if( pxIterator->pxNextFreeBlock != pxEnd )
801614a: 68fb ldr r3, [r7, #12]
801614c: 681a ldr r2, [r3, #0]
801614e: 4b15 ldr r3, [pc, #84] @ (80161a4 <prvInsertBlockIntoFreeList+0xb0>)
8016150: 681b ldr r3, [r3, #0]
8016152: 429a cmp r2, r3
8016154: d00d beq.n 8016172 <prvInsertBlockIntoFreeList+0x7e>
{
/* Form one big block from the two blocks. */
pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
8016156: 687b ldr r3, [r7, #4]
8016158: 685a ldr r2, [r3, #4]
801615a: 68fb ldr r3, [r7, #12]
801615c: 681b ldr r3, [r3, #0]
801615e: 685b ldr r3, [r3, #4]
8016160: 441a add r2, r3
8016162: 687b ldr r3, [r7, #4]
8016164: 605a str r2, [r3, #4]
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
8016166: 68fb ldr r3, [r7, #12]
8016168: 681b ldr r3, [r3, #0]
801616a: 681a ldr r2, [r3, #0]
801616c: 687b ldr r3, [r7, #4]
801616e: 601a str r2, [r3, #0]
8016170: e008 b.n 8016184 <prvInsertBlockIntoFreeList+0x90>
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxEnd;
8016172: 4b0c ldr r3, [pc, #48] @ (80161a4 <prvInsertBlockIntoFreeList+0xb0>)
8016174: 681a ldr r2, [r3, #0]
8016176: 687b ldr r3, [r7, #4]
8016178: 601a str r2, [r3, #0]
801617a: e003 b.n 8016184 <prvInsertBlockIntoFreeList+0x90>
}
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
801617c: 68fb ldr r3, [r7, #12]
801617e: 681a ldr r2, [r3, #0]
8016180: 687b ldr r3, [r7, #4]
8016182: 601a str r2, [r3, #0]
/* If the block being inserted plugged a gab, so was merged with the block
before and the block after, then it's pxNextFreeBlock pointer will have
already been set, and should not be set here as that would make it point
to itself. */
if( pxIterator != pxBlockToInsert )
8016184: 68fa ldr r2, [r7, #12]
8016186: 687b ldr r3, [r7, #4]
8016188: 429a cmp r2, r3
801618a: d002 beq.n 8016192 <prvInsertBlockIntoFreeList+0x9e>
{
pxIterator->pxNextFreeBlock = pxBlockToInsert;
801618c: 68fb ldr r3, [r7, #12]
801618e: 687a ldr r2, [r7, #4]
8016190: 601a str r2, [r3, #0]
}
else
{
mtCOVERAGE_TEST_MARKER();
}
}
8016192: bf00 nop
8016194: 3714 adds r7, #20
8016196: 46bd mov sp, r7
8016198: f85d 7b04 ldr.w r7, [sp], #4
801619c: 4770 bx lr
801619e: bf00 nop
80161a0: 240243e4 .word 0x240243e4
80161a4: 240243ec .word 0x240243ec
080161a8 <netconn_apimsg>:
* @param apimsg a struct containing the function to call and its parameters
* @return ERR_OK if the function was called, another err_t if not
*/
static err_t
netconn_apimsg(tcpip_callback_fn fn, struct api_msg *apimsg)
{
80161a8: b580 push {r7, lr}
80161aa: b084 sub sp, #16
80161ac: af00 add r7, sp, #0
80161ae: 6078 str r0, [r7, #4]
80161b0: 6039 str r1, [r7, #0]
err_t err;
#ifdef LWIP_DEBUG
/* catch functions that don't set err */
apimsg->err = ERR_VAL;
80161b2: 683b ldr r3, [r7, #0]
80161b4: 22fa movs r2, #250 @ 0xfa
80161b6: 711a strb r2, [r3, #4]
#if LWIP_NETCONN_SEM_PER_THREAD
apimsg->op_completed_sem = LWIP_NETCONN_THREAD_SEM_GET();
#endif /* LWIP_NETCONN_SEM_PER_THREAD */
err = tcpip_send_msg_wait_sem(fn, apimsg, LWIP_API_MSG_SEM(apimsg));
80161b8: 683b ldr r3, [r7, #0]
80161ba: 681b ldr r3, [r3, #0]
80161bc: 330c adds r3, #12
80161be: 461a mov r2, r3
80161c0: 6839 ldr r1, [r7, #0]
80161c2: 6878 ldr r0, [r7, #4]
80161c4: f003 fc7c bl 8019ac0 <tcpip_send_msg_wait_sem>
80161c8: 4603 mov r3, r0
80161ca: 73fb strb r3, [r7, #15]
if (err == ERR_OK) {
80161cc: f997 300f ldrsb.w r3, [r7, #15]
80161d0: 2b00 cmp r3, #0
80161d2: d103 bne.n 80161dc <netconn_apimsg+0x34>
return apimsg->err;
80161d4: 683b ldr r3, [r7, #0]
80161d6: f993 3004 ldrsb.w r3, [r3, #4]
80161da: e001 b.n 80161e0 <netconn_apimsg+0x38>
}
return err;
80161dc: f997 300f ldrsb.w r3, [r7, #15]
}
80161e0: 4618 mov r0, r3
80161e2: 3710 adds r7, #16
80161e4: 46bd mov sp, r7
80161e6: bd80 pop {r7, pc}
080161e8 <netconn_new_with_proto_and_callback>:
* @return a newly allocated struct netconn or
* NULL on memory error
*/
struct netconn *
netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, netconn_callback callback)
{
80161e8: b580 push {r7, lr}
80161ea: b08c sub sp, #48 @ 0x30
80161ec: af00 add r7, sp, #0
80161ee: 4603 mov r3, r0
80161f0: 603a str r2, [r7, #0]
80161f2: 71fb strb r3, [r7, #7]
80161f4: 460b mov r3, r1
80161f6: 71bb strb r3, [r7, #6]
struct netconn *conn;
API_MSG_VAR_DECLARE(msg);
API_MSG_VAR_ALLOC_RETURN_NULL(msg);
conn = netconn_alloc(t, callback);
80161f8: 79fb ldrb r3, [r7, #7]
80161fa: 6839 ldr r1, [r7, #0]
80161fc: 4618 mov r0, r3
80161fe: f001 f8ad bl 801735c <netconn_alloc>
8016202: 62f8 str r0, [r7, #44] @ 0x2c
if (conn != NULL) {
8016204: 6afb ldr r3, [r7, #44] @ 0x2c
8016206: 2b00 cmp r3, #0
8016208: d054 beq.n 80162b4 <netconn_new_with_proto_and_callback+0xcc>
err_t err;
API_MSG_VAR_REF(msg).msg.n.proto = proto;
801620a: 79bb ldrb r3, [r7, #6]
801620c: 743b strb r3, [r7, #16]
API_MSG_VAR_REF(msg).conn = conn;
801620e: 6afb ldr r3, [r7, #44] @ 0x2c
8016210: 60bb str r3, [r7, #8]
err = netconn_apimsg(lwip_netconn_do_newconn, &API_MSG_VAR_REF(msg));
8016212: f107 0308 add.w r3, r7, #8
8016216: 4619 mov r1, r3
8016218: 4829 ldr r0, [pc, #164] @ (80162c0 <netconn_new_with_proto_and_callback+0xd8>)
801621a: f7ff ffc5 bl 80161a8 <netconn_apimsg>
801621e: 4603 mov r3, r0
8016220: f887 302b strb.w r3, [r7, #43] @ 0x2b
if (err != ERR_OK) {
8016224: f997 302b ldrsb.w r3, [r7, #43] @ 0x2b
8016228: 2b00 cmp r3, #0
801622a: d043 beq.n 80162b4 <netconn_new_with_proto_and_callback+0xcc>
LWIP_ASSERT("freeing conn without freeing pcb", conn->pcb.tcp == NULL);
801622c: 6afb ldr r3, [r7, #44] @ 0x2c
801622e: 685b ldr r3, [r3, #4]
8016230: 2b00 cmp r3, #0
8016232: d005 beq.n 8016240 <netconn_new_with_proto_and_callback+0x58>
8016234: 4b23 ldr r3, [pc, #140] @ (80162c4 <netconn_new_with_proto_and_callback+0xdc>)
8016236: 22a3 movs r2, #163 @ 0xa3
8016238: 4923 ldr r1, [pc, #140] @ (80162c8 <netconn_new_with_proto_and_callback+0xe0>)
801623a: 4824 ldr r0, [pc, #144] @ (80162cc <netconn_new_with_proto_and_callback+0xe4>)
801623c: f014 fbf6 bl 802aa2c <iprintf>
LWIP_ASSERT("conn has no recvmbox", sys_mbox_valid(&conn->recvmbox));
8016240: 6afb ldr r3, [r7, #44] @ 0x2c
8016242: 3310 adds r3, #16
8016244: 4618 mov r0, r3
8016246: f011 f851 bl 80272ec <sys_mbox_valid>
801624a: 4603 mov r3, r0
801624c: 2b00 cmp r3, #0
801624e: d105 bne.n 801625c <netconn_new_with_proto_and_callback+0x74>
8016250: 4b1c ldr r3, [pc, #112] @ (80162c4 <netconn_new_with_proto_and_callback+0xdc>)
8016252: 22a4 movs r2, #164 @ 0xa4
8016254: 491e ldr r1, [pc, #120] @ (80162d0 <netconn_new_with_proto_and_callback+0xe8>)
8016256: 481d ldr r0, [pc, #116] @ (80162cc <netconn_new_with_proto_and_callback+0xe4>)
8016258: f014 fbe8 bl 802aa2c <iprintf>
#if LWIP_TCP
LWIP_ASSERT("conn->acceptmbox shouldn't exist", !sys_mbox_valid(&conn->acceptmbox));
801625c: 6afb ldr r3, [r7, #44] @ 0x2c
801625e: 3314 adds r3, #20
8016260: 4618 mov r0, r3
8016262: f011 f843 bl 80272ec <sys_mbox_valid>
8016266: 4603 mov r3, r0
8016268: 2b00 cmp r3, #0
801626a: d005 beq.n 8016278 <netconn_new_with_proto_and_callback+0x90>
801626c: 4b15 ldr r3, [pc, #84] @ (80162c4 <netconn_new_with_proto_and_callback+0xdc>)
801626e: 22a6 movs r2, #166 @ 0xa6
8016270: 4918 ldr r1, [pc, #96] @ (80162d4 <netconn_new_with_proto_and_callback+0xec>)
8016272: 4816 ldr r0, [pc, #88] @ (80162cc <netconn_new_with_proto_and_callback+0xe4>)
8016274: f014 fbda bl 802aa2c <iprintf>
#endif /* LWIP_TCP */
#if !LWIP_NETCONN_SEM_PER_THREAD
LWIP_ASSERT("conn has no op_completed", sys_sem_valid(&conn->op_completed));
8016278: 6afb ldr r3, [r7, #44] @ 0x2c
801627a: 330c adds r3, #12
801627c: 4618 mov r0, r3
801627e: f011 f8c3 bl 8027408 <sys_sem_valid>
8016282: 4603 mov r3, r0
8016284: 2b00 cmp r3, #0
8016286: d105 bne.n 8016294 <netconn_new_with_proto_and_callback+0xac>
8016288: 4b0e ldr r3, [pc, #56] @ (80162c4 <netconn_new_with_proto_and_callback+0xdc>)
801628a: 22a9 movs r2, #169 @ 0xa9
801628c: 4912 ldr r1, [pc, #72] @ (80162d8 <netconn_new_with_proto_and_callback+0xf0>)
801628e: 480f ldr r0, [pc, #60] @ (80162cc <netconn_new_with_proto_and_callback+0xe4>)
8016290: f014 fbcc bl 802aa2c <iprintf>
sys_sem_free(&conn->op_completed);
8016294: 6afb ldr r3, [r7, #44] @ 0x2c
8016296: 330c adds r3, #12
8016298: 4618 mov r0, r3
801629a: f011 f8a8 bl 80273ee <sys_sem_free>
#endif /* !LWIP_NETCONN_SEM_PER_THREAD */
sys_mbox_free(&conn->recvmbox);
801629e: 6afb ldr r3, [r7, #44] @ 0x2c
80162a0: 3310 adds r3, #16
80162a2: 4618 mov r0, r3
80162a4: f010 ffae bl 8027204 <sys_mbox_free>
memp_free(MEMP_NETCONN, conn);
80162a8: 6af9 ldr r1, [r7, #44] @ 0x2c
80162aa: 2007 movs r0, #7
80162ac: f004 fa58 bl 801a760 <memp_free>
API_MSG_VAR_FREE(msg);
return NULL;
80162b0: 2300 movs r3, #0
80162b2: e000 b.n 80162b6 <netconn_new_with_proto_and_callback+0xce>
}
}
API_MSG_VAR_FREE(msg);
return conn;
80162b4: 6afb ldr r3, [r7, #44] @ 0x2c
}
80162b6: 4618 mov r0, r3
80162b8: 3730 adds r7, #48 @ 0x30
80162ba: 46bd mov sp, r7
80162bc: bd80 pop {r7, pc}
80162be: bf00 nop
80162c0: 08017331 .word 0x08017331
80162c4: 0802ddcc .word 0x0802ddcc
80162c8: 0802de00 .word 0x0802de00
80162cc: 0802de24 .word 0x0802de24
80162d0: 0802de4c .word 0x0802de4c
80162d4: 0802de64 .word 0x0802de64
80162d8: 0802de88 .word 0x0802de88
080162dc <netconn_prepare_delete>:
* @param conn the netconn to delete
* @return ERR_OK if the connection was deleted
*/
err_t
netconn_prepare_delete(struct netconn *conn)
{
80162dc: b580 push {r7, lr}
80162de: b08c sub sp, #48 @ 0x30
80162e0: af00 add r7, sp, #0
80162e2: 6078 str r0, [r7, #4]
err_t err;
API_MSG_VAR_DECLARE(msg);
/* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
if (conn == NULL) {
80162e4: 687b ldr r3, [r7, #4]
80162e6: 2b00 cmp r3, #0
80162e8: d101 bne.n 80162ee <netconn_prepare_delete+0x12>
return ERR_OK;
80162ea: 2300 movs r3, #0
80162ec: e014 b.n 8016318 <netconn_prepare_delete+0x3c>
}
API_MSG_VAR_ALLOC(msg);
API_MSG_VAR_REF(msg).conn = conn;
80162ee: 687b ldr r3, [r7, #4]
80162f0: 60fb str r3, [r7, #12]
/* get the time we started, which is later compared to
sys_now() + conn->send_timeout */
API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#if LWIP_TCP
API_MSG_VAR_REF(msg).msg.sd.polls_left =
80162f2: 2329 movs r3, #41 @ 0x29
80162f4: 757b strb r3, [r7, #21]
((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_TCP */
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
err = netconn_apimsg(lwip_netconn_do_delconn, &API_MSG_VAR_REF(msg));
80162f6: f107 030c add.w r3, r7, #12
80162fa: 4619 mov r1, r3
80162fc: 4808 ldr r0, [pc, #32] @ (8016320 <netconn_prepare_delete+0x44>)
80162fe: f7ff ff53 bl 80161a8 <netconn_apimsg>
8016302: 4603 mov r3, r0
8016304: f887 302f strb.w r3, [r7, #47] @ 0x2f
API_MSG_VAR_FREE(msg);
if (err != ERR_OK) {
8016308: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f
801630c: 2b00 cmp r3, #0
801630e: d002 beq.n 8016316 <netconn_prepare_delete+0x3a>
return err;
8016310: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f
8016314: e000 b.n 8016318 <netconn_prepare_delete+0x3c>
}
return ERR_OK;
8016316: 2300 movs r3, #0
}
8016318: 4618 mov r0, r3
801631a: 3730 adds r7, #48 @ 0x30
801631c: 46bd mov sp, r7
801631e: bd80 pop {r7, pc}
8016320: 080178b5 .word 0x080178b5
08016324 <netconn_delete>:
* @param conn the netconn to delete
* @return ERR_OK if the connection was deleted
*/
err_t
netconn_delete(struct netconn *conn)
{
8016324: b580 push {r7, lr}
8016326: b084 sub sp, #16
8016328: af00 add r7, sp, #0
801632a: 6078 str r0, [r7, #4]
err_t err;
/* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
if (conn == NULL) {
801632c: 687b ldr r3, [r7, #4]
801632e: 2b00 cmp r3, #0
8016330: d101 bne.n 8016336 <netconn_delete+0x12>
return ERR_OK;
8016332: 2300 movs r3, #0
8016334: e00d b.n 8016352 <netconn_delete+0x2e>
/* Already called netconn_prepare_delete() before */
err = ERR_OK;
} else
#endif /* LWIP_NETCONN_FULLDUPLEX */
{
err = netconn_prepare_delete(conn);
8016336: 6878 ldr r0, [r7, #4]
8016338: f7ff ffd0 bl 80162dc <netconn_prepare_delete>
801633c: 4603 mov r3, r0
801633e: 73fb strb r3, [r7, #15]
}
if (err == ERR_OK) {
8016340: f997 300f ldrsb.w r3, [r7, #15]
8016344: 2b00 cmp r3, #0
8016346: d102 bne.n 801634e <netconn_delete+0x2a>
netconn_free(conn);
8016348: 6878 ldr r0, [r7, #4]
801634a: f001 f881 bl 8017450 <netconn_free>
}
return err;
801634e: f997 300f ldrsb.w r3, [r7, #15]
}
8016352: 4618 mov r0, r3
8016354: 3710 adds r7, #16
8016356: 46bd mov sp, r7
8016358: bd80 pop {r7, pc}
...
0801635c <netconn_getaddr>:
* @return ERR_CONN for invalid connections
* ERR_OK if the information was retrieved
*/
err_t
netconn_getaddr(struct netconn *conn, ip_addr_t *addr, u16_t *port, u8_t local)
{
801635c: b580 push {r7, lr}
801635e: b08e sub sp, #56 @ 0x38
8016360: af00 add r7, sp, #0
8016362: 60f8 str r0, [r7, #12]
8016364: 60b9 str r1, [r7, #8]
8016366: 607a str r2, [r7, #4]
8016368: 70fb strb r3, [r7, #3]
API_MSG_VAR_DECLARE(msg);
err_t err;
LWIP_ERROR("netconn_getaddr: invalid conn", (conn != NULL), return ERR_ARG;);
801636a: 68fb ldr r3, [r7, #12]
801636c: 2b00 cmp r3, #0
801636e: d109 bne.n 8016384 <netconn_getaddr+0x28>
8016370: 4b1d ldr r3, [pc, #116] @ (80163e8 <netconn_getaddr+0x8c>)
8016372: f44f 7289 mov.w r2, #274 @ 0x112
8016376: 491d ldr r1, [pc, #116] @ (80163ec <netconn_getaddr+0x90>)
8016378: 481d ldr r0, [pc, #116] @ (80163f0 <netconn_getaddr+0x94>)
801637a: f014 fb57 bl 802aa2c <iprintf>
801637e: f06f 030f mvn.w r3, #15
8016382: e02d b.n 80163e0 <netconn_getaddr+0x84>
LWIP_ERROR("netconn_getaddr: invalid addr", (addr != NULL), return ERR_ARG;);
8016384: 68bb ldr r3, [r7, #8]
8016386: 2b00 cmp r3, #0
8016388: d109 bne.n 801639e <netconn_getaddr+0x42>
801638a: 4b17 ldr r3, [pc, #92] @ (80163e8 <netconn_getaddr+0x8c>)
801638c: f240 1213 movw r2, #275 @ 0x113
8016390: 4918 ldr r1, [pc, #96] @ (80163f4 <netconn_getaddr+0x98>)
8016392: 4817 ldr r0, [pc, #92] @ (80163f0 <netconn_getaddr+0x94>)
8016394: f014 fb4a bl 802aa2c <iprintf>
8016398: f06f 030f mvn.w r3, #15
801639c: e020 b.n 80163e0 <netconn_getaddr+0x84>
LWIP_ERROR("netconn_getaddr: invalid port", (port != NULL), return ERR_ARG;);
801639e: 687b ldr r3, [r7, #4]
80163a0: 2b00 cmp r3, #0
80163a2: d109 bne.n 80163b8 <netconn_getaddr+0x5c>
80163a4: 4b10 ldr r3, [pc, #64] @ (80163e8 <netconn_getaddr+0x8c>)
80163a6: f44f 728a mov.w r2, #276 @ 0x114
80163aa: 4913 ldr r1, [pc, #76] @ (80163f8 <netconn_getaddr+0x9c>)
80163ac: 4810 ldr r0, [pc, #64] @ (80163f0 <netconn_getaddr+0x94>)
80163ae: f014 fb3d bl 802aa2c <iprintf>
80163b2: f06f 030f mvn.w r3, #15
80163b6: e013 b.n 80163e0 <netconn_getaddr+0x84>
API_MSG_VAR_ALLOC(msg);
API_MSG_VAR_REF(msg).conn = conn;
80163b8: 68fb ldr r3, [r7, #12]
80163ba: 617b str r3, [r7, #20]
API_MSG_VAR_REF(msg).msg.ad.local = local;
80163bc: 78fb ldrb r3, [r7, #3]
80163be: f887 3024 strb.w r3, [r7, #36] @ 0x24
#if LWIP_MPU_COMPATIBLE
err = netconn_apimsg(lwip_netconn_do_getaddr, &API_MSG_VAR_REF(msg));
*addr = msg->msg.ad.ipaddr;
*port = msg->msg.ad.port;
#else /* LWIP_MPU_COMPATIBLE */
msg.msg.ad.ipaddr = addr;
80163c2: 68bb ldr r3, [r7, #8]
80163c4: 61fb str r3, [r7, #28]
msg.msg.ad.port = port;
80163c6: 687b ldr r3, [r7, #4]
80163c8: 623b str r3, [r7, #32]
err = netconn_apimsg(lwip_netconn_do_getaddr, &msg);
80163ca: f107 0314 add.w r3, r7, #20
80163ce: 4619 mov r1, r3
80163d0: 480a ldr r0, [pc, #40] @ (80163fc <netconn_getaddr+0xa0>)
80163d2: f7ff fee9 bl 80161a8 <netconn_apimsg>
80163d6: 4603 mov r3, r0
80163d8: f887 3037 strb.w r3, [r7, #55] @ 0x37
#endif /* LWIP_MPU_COMPATIBLE */
API_MSG_VAR_FREE(msg);
return err;
80163dc: f997 3037 ldrsb.w r3, [r7, #55] @ 0x37
}
80163e0: 4618 mov r0, r3
80163e2: 3738 adds r7, #56 @ 0x38
80163e4: 46bd mov sp, r7
80163e6: bd80 pop {r7, pc}
80163e8: 0802ddcc .word 0x0802ddcc
80163ec: 0802dea4 .word 0x0802dea4
80163f0: 0802de24 .word 0x0802de24
80163f4: 0802dec4 .word 0x0802dec4
80163f8: 0802dee4 .word 0x0802dee4
80163fc: 08018311 .word 0x08018311
08016400 <netconn_connect>:
* @param port the remote port to connect to (no used for RAW)
* @return ERR_OK if connected, return value of tcp_/udp_/raw_connect otherwise
*/
err_t
netconn_connect(struct netconn *conn, const ip_addr_t *addr, u16_t port)
{
8016400: b580 push {r7, lr}
8016402: b08e sub sp, #56 @ 0x38
8016404: af00 add r7, sp, #0
8016406: 60f8 str r0, [r7, #12]
8016408: 60b9 str r1, [r7, #8]
801640a: 4613 mov r3, r2
801640c: 80fb strh r3, [r7, #6]
API_MSG_VAR_DECLARE(msg);
err_t err;
LWIP_ERROR("netconn_connect: invalid conn", (conn != NULL), return ERR_ARG;);
801640e: 68fb ldr r3, [r7, #12]
8016410: 2b00 cmp r3, #0
8016412: d109 bne.n 8016428 <netconn_connect+0x28>
8016414: 4b11 ldr r3, [pc, #68] @ (801645c <netconn_connect+0x5c>)
8016416: f44f 72bf mov.w r2, #382 @ 0x17e
801641a: 4911 ldr r1, [pc, #68] @ (8016460 <netconn_connect+0x60>)
801641c: 4811 ldr r0, [pc, #68] @ (8016464 <netconn_connect+0x64>)
801641e: f014 fb05 bl 802aa2c <iprintf>
8016422: f06f 030f mvn.w r3, #15
8016426: e015 b.n 8016454 <netconn_connect+0x54>
#if LWIP_IPV4
/* Don't propagate NULL pointer (IP_ADDR_ANY alias) to subsequent functions */
if (addr == NULL) {
8016428: 68bb ldr r3, [r7, #8]
801642a: 2b00 cmp r3, #0
801642c: d101 bne.n 8016432 <netconn_connect+0x32>
addr = IP4_ADDR_ANY;
801642e: 4b0e ldr r3, [pc, #56] @ (8016468 <netconn_connect+0x68>)
8016430: 60bb str r3, [r7, #8]
}
#endif /* LWIP_IPV4 */
API_MSG_VAR_ALLOC(msg);
API_MSG_VAR_REF(msg).conn = conn;
8016432: 68fb ldr r3, [r7, #12]
8016434: 617b str r3, [r7, #20]
API_MSG_VAR_REF(msg).msg.bc.ipaddr = API_MSG_VAR_REF(addr);
8016436: 68bb ldr r3, [r7, #8]
8016438: 61fb str r3, [r7, #28]
API_MSG_VAR_REF(msg).msg.bc.port = port;
801643a: 88fb ldrh r3, [r7, #6]
801643c: 843b strh r3, [r7, #32]
err = netconn_apimsg(lwip_netconn_do_connect, &API_MSG_VAR_REF(msg));
801643e: f107 0314 add.w r3, r7, #20
8016442: 4619 mov r1, r3
8016444: 4809 ldr r0, [pc, #36] @ (801646c <netconn_connect+0x6c>)
8016446: f7ff feaf bl 80161a8 <netconn_apimsg>
801644a: 4603 mov r3, r0
801644c: f887 3037 strb.w r3, [r7, #55] @ 0x37
API_MSG_VAR_FREE(msg);
return err;
8016450: f997 3037 ldrsb.w r3, [r7, #55] @ 0x37
}
8016454: 4618 mov r0, r3
8016456: 3738 adds r7, #56 @ 0x38
8016458: 46bd mov sp, r7
801645a: bd80 pop {r7, pc}
801645c: 0802ddcc .word 0x0802ddcc
8016460: 0802df40 .word 0x0802df40
8016464: 0802de24 .word 0x0802de24
8016468: 08031ec8 .word 0x08031ec8
801646c: 08017ba1 .word 0x08017ba1
08016470 <netconn_disconnect>:
* @param conn the netconn to disconnect
* @return See @ref err_t
*/
err_t
netconn_disconnect(struct netconn *conn)
{
8016470: b580 push {r7, lr}
8016472: b08c sub sp, #48 @ 0x30
8016474: af00 add r7, sp, #0
8016476: 6078 str r0, [r7, #4]
API_MSG_VAR_DECLARE(msg);
err_t err;
LWIP_ERROR("netconn_disconnect: invalid conn", (conn != NULL), return ERR_ARG;);
8016478: 687b ldr r3, [r7, #4]
801647a: 2b00 cmp r3, #0
801647c: d109 bne.n 8016492 <netconn_disconnect+0x22>
801647e: 4b0d ldr r3, [pc, #52] @ (80164b4 <netconn_disconnect+0x44>)
8016480: f44f 72cf mov.w r2, #414 @ 0x19e
8016484: 490c ldr r1, [pc, #48] @ (80164b8 <netconn_disconnect+0x48>)
8016486: 480d ldr r0, [pc, #52] @ (80164bc <netconn_disconnect+0x4c>)
8016488: f014 fad0 bl 802aa2c <iprintf>
801648c: f06f 030f mvn.w r3, #15
8016490: e00c b.n 80164ac <netconn_disconnect+0x3c>
API_MSG_VAR_ALLOC(msg);
API_MSG_VAR_REF(msg).conn = conn;
8016492: 687b ldr r3, [r7, #4]
8016494: 60fb str r3, [r7, #12]
err = netconn_apimsg(lwip_netconn_do_disconnect, &API_MSG_VAR_REF(msg));
8016496: f107 030c add.w r3, r7, #12
801649a: 4619 mov r1, r3
801649c: 4808 ldr r0, [pc, #32] @ (80164c0 <netconn_disconnect+0x50>)
801649e: f7ff fe83 bl 80161a8 <netconn_apimsg>
80164a2: 4603 mov r3, r0
80164a4: f887 302f strb.w r3, [r7, #47] @ 0x2f
API_MSG_VAR_FREE(msg);
return err;
80164a8: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f
}
80164ac: 4618 mov r0, r3
80164ae: 3730 adds r7, #48 @ 0x30
80164b0: 46bd mov sp, r7
80164b2: bd80 pop {r7, pc}
80164b4: 0802ddcc .word 0x0802ddcc
80164b8: 0802df60 .word 0x0802df60
80164bc: 0802de24 .word 0x0802de24
80164c0: 08017d21 .word 0x08017d21
080164c4 <netconn_recv_data>:
* ERR_WOULDBLOCK if the netconn is nonblocking but would block to wait for data
* ERR_TIMEOUT if the netconn has a receive timeout and no data was received
*/
static err_t
netconn_recv_data(struct netconn *conn, void **new_buf, u8_t apiflags)
{
80164c4: b580 push {r7, lr}
80164c6: b08a sub sp, #40 @ 0x28
80164c8: af00 add r7, sp, #0
80164ca: 60f8 str r0, [r7, #12]
80164cc: 60b9 str r1, [r7, #8]
80164ce: 4613 mov r3, r2
80164d0: 71fb strb r3, [r7, #7]
void *buf = NULL;
80164d2: 2300 movs r3, #0
80164d4: 61bb str r3, [r7, #24]
u16_t len;
LWIP_ERROR("netconn_recv: invalid pointer", (new_buf != NULL), return ERR_ARG;);
80164d6: 68bb ldr r3, [r7, #8]
80164d8: 2b00 cmp r3, #0
80164da: d109 bne.n 80164f0 <netconn_recv_data+0x2c>
80164dc: 4b64 ldr r3, [pc, #400] @ (8016670 <netconn_recv_data+0x1ac>)
80164de: f44f 7212 mov.w r2, #584 @ 0x248
80164e2: 4964 ldr r1, [pc, #400] @ (8016674 <netconn_recv_data+0x1b0>)
80164e4: 4864 ldr r0, [pc, #400] @ (8016678 <netconn_recv_data+0x1b4>)
80164e6: f014 faa1 bl 802aa2c <iprintf>
80164ea: f06f 030f mvn.w r3, #15
80164ee: e0bb b.n 8016668 <netconn_recv_data+0x1a4>
*new_buf = NULL;
80164f0: 68bb ldr r3, [r7, #8]
80164f2: 2200 movs r2, #0
80164f4: 601a str r2, [r3, #0]
LWIP_ERROR("netconn_recv: invalid conn", (conn != NULL), return ERR_ARG;);
80164f6: 68fb ldr r3, [r7, #12]
80164f8: 2b00 cmp r3, #0
80164fa: d109 bne.n 8016510 <netconn_recv_data+0x4c>
80164fc: 4b5c ldr r3, [pc, #368] @ (8016670 <netconn_recv_data+0x1ac>)
80164fe: f240 224a movw r2, #586 @ 0x24a
8016502: 495e ldr r1, [pc, #376] @ (801667c <netconn_recv_data+0x1b8>)
8016504: 485c ldr r0, [pc, #368] @ (8016678 <netconn_recv_data+0x1b4>)
8016506: f014 fa91 bl 802aa2c <iprintf>
801650a: f06f 030f mvn.w r3, #15
801650e: e0ab b.n 8016668 <netconn_recv_data+0x1a4>
if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
8016510: 68fb ldr r3, [r7, #12]
8016512: 3310 adds r3, #16
8016514: 4618 mov r0, r3
8016516: f010 fee9 bl 80272ec <sys_mbox_valid>
801651a: 4603 mov r3, r0
801651c: 2b00 cmp r3, #0
801651e: d10e bne.n 801653e <netconn_recv_data+0x7a>
err_t err = netconn_err(conn);
8016520: 68f8 ldr r0, [r7, #12]
8016522: f000 fb1f bl 8016b64 <netconn_err>
8016526: 4603 mov r3, r0
8016528: 77fb strb r3, [r7, #31]
if (err != ERR_OK) {
801652a: f997 301f ldrsb.w r3, [r7, #31]
801652e: 2b00 cmp r3, #0
8016530: d002 beq.n 8016538 <netconn_recv_data+0x74>
/* return pending error */
return err;
8016532: f997 301f ldrsb.w r3, [r7, #31]
8016536: e097 b.n 8016668 <netconn_recv_data+0x1a4>
}
return ERR_CONN;
8016538: f06f 030a mvn.w r3, #10
801653c: e094 b.n 8016668 <netconn_recv_data+0x1a4>
}
NETCONN_MBOX_WAITING_INC(conn);
if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
801653e: 68fb ldr r3, [r7, #12]
8016540: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8016544: f003 0302 and.w r3, r3, #2
8016548: 2b00 cmp r3, #0
801654a: d110 bne.n 801656e <netconn_recv_data+0xaa>
801654c: 79fb ldrb r3, [r7, #7]
801654e: f003 0304 and.w r3, r3, #4
8016552: 2b00 cmp r3, #0
8016554: d10b bne.n 801656e <netconn_recv_data+0xaa>
(conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
8016556: 68fb ldr r3, [r7, #12]
8016558: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
801655c: f003 0301 and.w r3, r3, #1
if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
8016560: 2b00 cmp r3, #0
8016562: d104 bne.n 801656e <netconn_recv_data+0xaa>
(conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
8016564: 68fb ldr r3, [r7, #12]
8016566: f993 3008 ldrsb.w r3, [r3, #8]
801656a: 2b00 cmp r3, #0
801656c: d025 beq.n 80165ba <netconn_recv_data+0xf6>
if (sys_arch_mbox_tryfetch(&conn->recvmbox, &buf) == SYS_ARCH_TIMEOUT) {
801656e: 68fb ldr r3, [r7, #12]
8016570: 3310 adds r3, #16
8016572: f107 0218 add.w r2, r7, #24
8016576: 4611 mov r1, r2
8016578: 4618 mov r0, r3
801657a: f010 fea0 bl 80272be <sys_arch_mbox_tryfetch>
801657e: 4603 mov r3, r0
8016580: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8016584: d12a bne.n 80165dc <netconn_recv_data+0x118>
err_t err;
NETCONN_MBOX_WAITING_DEC(conn);
err = netconn_err(conn);
8016586: 68f8 ldr r0, [r7, #12]
8016588: f000 faec bl 8016b64 <netconn_err>
801658c: 4603 mov r3, r0
801658e: f887 3025 strb.w r3, [r7, #37] @ 0x25
if (err != ERR_OK) {
8016592: f997 3025 ldrsb.w r3, [r7, #37] @ 0x25
8016596: 2b00 cmp r3, #0
8016598: d002 beq.n 80165a0 <netconn_recv_data+0xdc>
/* return pending error */
return err;
801659a: f997 3025 ldrsb.w r3, [r7, #37] @ 0x25
801659e: e063 b.n 8016668 <netconn_recv_data+0x1a4>
}
if (conn->flags & NETCONN_FLAG_MBOXCLOSED) {
80165a0: 68fb ldr r3, [r7, #12]
80165a2: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
80165a6: f003 0301 and.w r3, r3, #1
80165aa: 2b00 cmp r3, #0
80165ac: d002 beq.n 80165b4 <netconn_recv_data+0xf0>
return ERR_CONN;
80165ae: f06f 030a mvn.w r3, #10
80165b2: e059 b.n 8016668 <netconn_recv_data+0x1a4>
}
return ERR_WOULDBLOCK;
80165b4: f06f 0306 mvn.w r3, #6
80165b8: e056 b.n 8016668 <netconn_recv_data+0x1a4>
}
} else {
#if LWIP_SO_RCVTIMEO
if (sys_arch_mbox_fetch(&conn->recvmbox, &buf, conn->recv_timeout) == SYS_ARCH_TIMEOUT) {
80165ba: 68fb ldr r3, [r7, #12]
80165bc: f103 0010 add.w r0, r3, #16
80165c0: 68fb ldr r3, [r7, #12]
80165c2: 69da ldr r2, [r3, #28]
80165c4: f107 0318 add.w r3, r7, #24
80165c8: 4619 mov r1, r3
80165ca: f010 fe47 bl 802725c <sys_arch_mbox_fetch>
80165ce: 4603 mov r3, r0
80165d0: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80165d4: d102 bne.n 80165dc <netconn_recv_data+0x118>
NETCONN_MBOX_WAITING_DEC(conn);
return ERR_TIMEOUT;
80165d6: f06f 0302 mvn.w r3, #2
80165da: e045 b.n 8016668 <netconn_recv_data+0x1a4>
}
#endif
#if LWIP_TCP
#if (LWIP_UDP || LWIP_RAW)
if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP)
80165dc: 68fb ldr r3, [r7, #12]
80165de: 781b ldrb r3, [r3, #0]
80165e0: f003 03f0 and.w r3, r3, #240 @ 0xf0
80165e4: 2b10 cmp r3, #16
80165e6: d117 bne.n 8016618 <netconn_recv_data+0x154>
#endif /* (LWIP_UDP || LWIP_RAW) */
{
err_t err;
/* Check if this is an error message or a pbuf */
if (lwip_netconn_is_err_msg(buf, &err)) {
80165e8: 69bb ldr r3, [r7, #24]
80165ea: f107 0217 add.w r2, r7, #23
80165ee: 4611 mov r1, r2
80165f0: 4618 mov r0, r3
80165f2: f000 fb09 bl 8016c08 <lwip_netconn_is_err_msg>
80165f6: 4603 mov r3, r0
80165f8: 2b00 cmp r3, #0
80165fa: d009 beq.n 8016610 <netconn_recv_data+0x14c>
/* new_buf has been zeroed above already */
if (err == ERR_CLSD) {
80165fc: f997 3017 ldrsb.w r3, [r7, #23]
8016600: f113 0f0f cmn.w r3, #15
8016604: d101 bne.n 801660a <netconn_recv_data+0x146>
/* connection closed translates to ERR_OK with *new_buf == NULL */
return ERR_OK;
8016606: 2300 movs r3, #0
8016608: e02e b.n 8016668 <netconn_recv_data+0x1a4>
}
return err;
801660a: f997 3017 ldrsb.w r3, [r7, #23]
801660e: e02b b.n 8016668 <netconn_recv_data+0x1a4>
}
len = ((struct pbuf *)buf)->tot_len;
8016610: 69bb ldr r3, [r7, #24]
8016612: 891b ldrh r3, [r3, #8]
8016614: 84fb strh r3, [r7, #38] @ 0x26
8016616: e00d b.n 8016634 <netconn_recv_data+0x170>
#if LWIP_TCP && (LWIP_UDP || LWIP_RAW)
else
#endif /* LWIP_TCP && (LWIP_UDP || LWIP_RAW) */
#if (LWIP_UDP || LWIP_RAW)
{
LWIP_ASSERT("buf != NULL", buf != NULL);
8016618: 69bb ldr r3, [r7, #24]
801661a: 2b00 cmp r3, #0
801661c: d106 bne.n 801662c <netconn_recv_data+0x168>
801661e: 4b14 ldr r3, [pc, #80] @ (8016670 <netconn_recv_data+0x1ac>)
8016620: f240 2291 movw r2, #657 @ 0x291
8016624: 4916 ldr r1, [pc, #88] @ (8016680 <netconn_recv_data+0x1bc>)
8016626: 4814 ldr r0, [pc, #80] @ (8016678 <netconn_recv_data+0x1b4>)
8016628: f014 fa00 bl 802aa2c <iprintf>
len = netbuf_len((struct netbuf *)buf);
801662c: 69bb ldr r3, [r7, #24]
801662e: 681b ldr r3, [r3, #0]
8016630: 891b ldrh r3, [r3, #8]
8016632: 84fb strh r3, [r7, #38] @ 0x26
}
#endif /* (LWIP_UDP || LWIP_RAW) */
#if LWIP_SO_RCVBUF
SYS_ARCH_DEC(conn->recv_avail, len);
8016634: f010 ff64 bl 8027500 <sys_arch_protect>
8016638: 6238 str r0, [r7, #32]
801663a: 68fb ldr r3, [r7, #12]
801663c: 6a5a ldr r2, [r3, #36] @ 0x24
801663e: 8cfb ldrh r3, [r7, #38] @ 0x26
8016640: 1ad2 subs r2, r2, r3
8016642: 68fb ldr r3, [r7, #12]
8016644: 625a str r2, [r3, #36] @ 0x24
8016646: 6a38 ldr r0, [r7, #32]
8016648: f010 ff68 bl 802751c <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
/* Register event with callback */
API_EVENT(conn, NETCONN_EVT_RCVMINUS, len);
801664c: 68fb ldr r3, [r7, #12]
801664e: 6b1b ldr r3, [r3, #48] @ 0x30
8016650: 2b00 cmp r3, #0
8016652: d005 beq.n 8016660 <netconn_recv_data+0x19c>
8016654: 68fb ldr r3, [r7, #12]
8016656: 6b1b ldr r3, [r3, #48] @ 0x30
8016658: 8cfa ldrh r2, [r7, #38] @ 0x26
801665a: 2101 movs r1, #1
801665c: 68f8 ldr r0, [r7, #12]
801665e: 4798 blx r3
LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv_data: received %p, len=%"U16_F"\n", buf, len));
*new_buf = buf;
8016660: 69ba ldr r2, [r7, #24]
8016662: 68bb ldr r3, [r7, #8]
8016664: 601a str r2, [r3, #0]
/* don't set conn->last_err: it's only ERR_OK, anyway */
return ERR_OK;
8016666: 2300 movs r3, #0
}
8016668: 4618 mov r0, r3
801666a: 3728 adds r7, #40 @ 0x28
801666c: 46bd mov sp, r7
801666e: bd80 pop {r7, pc}
8016670: 0802ddcc .word 0x0802ddcc
8016674: 0802dfe4 .word 0x0802dfe4
8016678: 0802de24 .word 0x0802de24
801667c: 0802e004 .word 0x0802e004
8016680: 0802e020 .word 0x0802e020
08016684 <netconn_tcp_recvd_msg>:
#if LWIP_TCP
static err_t
netconn_tcp_recvd_msg(struct netconn *conn, size_t len, struct api_msg *msg)
{
8016684: b580 push {r7, lr}
8016686: b084 sub sp, #16
8016688: af00 add r7, sp, #0
801668a: 60f8 str r0, [r7, #12]
801668c: 60b9 str r1, [r7, #8]
801668e: 607a str r2, [r7, #4]
LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
8016690: 68fb ldr r3, [r7, #12]
8016692: 2b00 cmp r3, #0
8016694: d005 beq.n 80166a2 <netconn_tcp_recvd_msg+0x1e>
8016696: 68fb ldr r3, [r7, #12]
8016698: 781b ldrb r3, [r3, #0]
801669a: f003 03f0 and.w r3, r3, #240 @ 0xf0
801669e: 2b10 cmp r3, #16
80166a0: d009 beq.n 80166b6 <netconn_tcp_recvd_msg+0x32>
80166a2: 4b0c ldr r3, [pc, #48] @ (80166d4 <netconn_tcp_recvd_msg+0x50>)
80166a4: f240 22a7 movw r2, #679 @ 0x2a7
80166a8: 490b ldr r1, [pc, #44] @ (80166d8 <netconn_tcp_recvd_msg+0x54>)
80166aa: 480c ldr r0, [pc, #48] @ (80166dc <netconn_tcp_recvd_msg+0x58>)
80166ac: f014 f9be bl 802aa2c <iprintf>
80166b0: f06f 030f mvn.w r3, #15
80166b4: e00a b.n 80166cc <netconn_tcp_recvd_msg+0x48>
NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);
msg->conn = conn;
80166b6: 687b ldr r3, [r7, #4]
80166b8: 68fa ldr r2, [r7, #12]
80166ba: 601a str r2, [r3, #0]
msg->msg.r.len = len;
80166bc: 687b ldr r3, [r7, #4]
80166be: 68ba ldr r2, [r7, #8]
80166c0: 609a str r2, [r3, #8]
return netconn_apimsg(lwip_netconn_do_recv, msg);
80166c2: 6879 ldr r1, [r7, #4]
80166c4: 4806 ldr r0, [pc, #24] @ (80166e0 <netconn_tcp_recvd_msg+0x5c>)
80166c6: f7ff fd6f bl 80161a8 <netconn_apimsg>
80166ca: 4603 mov r3, r0
}
80166cc: 4618 mov r0, r3
80166ce: 3710 adds r7, #16
80166d0: 46bd mov sp, r7
80166d2: bd80 pop {r7, pc}
80166d4: 0802ddcc .word 0x0802ddcc
80166d8: 0802e02c .word 0x0802e02c
80166dc: 0802de24 .word 0x0802de24
80166e0: 08017df7 .word 0x08017df7
080166e4 <netconn_tcp_recvd>:
err_t
netconn_tcp_recvd(struct netconn *conn, size_t len)
{
80166e4: b580 push {r7, lr}
80166e6: b08c sub sp, #48 @ 0x30
80166e8: af00 add r7, sp, #0
80166ea: 6078 str r0, [r7, #4]
80166ec: 6039 str r1, [r7, #0]
err_t err;
API_MSG_VAR_DECLARE(msg);
LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
80166ee: 687b ldr r3, [r7, #4]
80166f0: 2b00 cmp r3, #0
80166f2: d005 beq.n 8016700 <netconn_tcp_recvd+0x1c>
80166f4: 687b ldr r3, [r7, #4]
80166f6: 781b ldrb r3, [r3, #0]
80166f8: f003 03f0 and.w r3, r3, #240 @ 0xf0
80166fc: 2b10 cmp r3, #16
80166fe: d009 beq.n 8016714 <netconn_tcp_recvd+0x30>
8016700: 4b0c ldr r3, [pc, #48] @ (8016734 <netconn_tcp_recvd+0x50>)
8016702: f240 22b5 movw r2, #693 @ 0x2b5
8016706: 490c ldr r1, [pc, #48] @ (8016738 <netconn_tcp_recvd+0x54>)
8016708: 480c ldr r0, [pc, #48] @ (801673c <netconn_tcp_recvd+0x58>)
801670a: f014 f98f bl 802aa2c <iprintf>
801670e: f06f 030f mvn.w r3, #15
8016712: e00b b.n 801672c <netconn_tcp_recvd+0x48>
NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);
API_MSG_VAR_ALLOC(msg);
err = netconn_tcp_recvd_msg(conn, len, &API_VAR_REF(msg));
8016714: f107 030c add.w r3, r7, #12
8016718: 461a mov r2, r3
801671a: 6839 ldr r1, [r7, #0]
801671c: 6878 ldr r0, [r7, #4]
801671e: f7ff ffb1 bl 8016684 <netconn_tcp_recvd_msg>
8016722: 4603 mov r3, r0
8016724: f887 302f strb.w r3, [r7, #47] @ 0x2f
API_MSG_VAR_FREE(msg);
return err;
8016728: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f
}
801672c: 4618 mov r0, r3
801672e: 3730 adds r7, #48 @ 0x30
8016730: 46bd mov sp, r7
8016732: bd80 pop {r7, pc}
8016734: 0802ddcc .word 0x0802ddcc
8016738: 0802e02c .word 0x0802e02c
801673c: 0802de24 .word 0x0802de24
08016740 <netconn_recv_data_tcp>:
static err_t
netconn_recv_data_tcp(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
8016740: b580 push {r7, lr}
8016742: b090 sub sp, #64 @ 0x40
8016744: af00 add r7, sp, #0
8016746: 60f8 str r0, [r7, #12]
8016748: 60b9 str r1, [r7, #8]
801674a: 4613 mov r3, r2
801674c: 71fb strb r3, [r7, #7]
API_MSG_VAR_DECLARE(msg);
#if LWIP_MPU_COMPATIBLE
msg = NULL;
#endif
if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
801674e: 68fb ldr r3, [r7, #12]
8016750: 3310 adds r3, #16
8016752: 4618 mov r0, r3
8016754: f010 fdca bl 80272ec <sys_mbox_valid>
8016758: 4603 mov r3, r0
801675a: 2b00 cmp r3, #0
801675c: d102 bne.n 8016764 <netconn_recv_data_tcp+0x24>
/* This only happens when calling this function more than once *after* receiving FIN */
return ERR_CONN;
801675e: f06f 030a mvn.w r3, #10
8016762: e072 b.n 801684a <netconn_recv_data_tcp+0x10a>
}
if (netconn_is_flag_set(conn, NETCONN_FIN_RX_PENDING)) {
8016764: 68fb ldr r3, [r7, #12]
8016766: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
801676a: b25b sxtb r3, r3
801676c: 2b00 cmp r3, #0
801676e: da09 bge.n 8016784 <netconn_recv_data_tcp+0x44>
netconn_clear_flags(conn, NETCONN_FIN_RX_PENDING);
8016770: 68fb ldr r3, [r7, #12]
8016772: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8016776: f003 037f and.w r3, r3, #127 @ 0x7f
801677a: b2da uxtb r2, r3
801677c: 68fb ldr r3, [r7, #12]
801677e: f883 2028 strb.w r2, [r3, #40] @ 0x28
goto handle_fin;
8016782: e03b b.n 80167fc <netconn_recv_data_tcp+0xbc>
/* need to allocate API message here so empty message pool does not result in event loss
* see bug #47512: MPU_COMPATIBLE may fail on empty pool */
API_MSG_VAR_ALLOC(msg);
}
err = netconn_recv_data(conn, (void **)new_buf, apiflags);
8016784: 79fb ldrb r3, [r7, #7]
8016786: 461a mov r2, r3
8016788: 68b9 ldr r1, [r7, #8]
801678a: 68f8 ldr r0, [r7, #12]
801678c: f7ff fe9a bl 80164c4 <netconn_recv_data>
8016790: 4603 mov r3, r0
8016792: f887 303f strb.w r3, [r7, #63] @ 0x3f
if (err != ERR_OK) {
8016796: f997 303f ldrsb.w r3, [r7, #63] @ 0x3f
801679a: 2b00 cmp r3, #0
801679c: d002 beq.n 80167a4 <netconn_recv_data_tcp+0x64>
if (!(apiflags & NETCONN_NOAUTORCVD)) {
API_MSG_VAR_FREE(msg);
}
return err;
801679e: f997 303f ldrsb.w r3, [r7, #63] @ 0x3f
80167a2: e052 b.n 801684a <netconn_recv_data_tcp+0x10a>
}
buf = *new_buf;
80167a4: 68bb ldr r3, [r7, #8]
80167a6: 681b ldr r3, [r3, #0]
80167a8: 63bb str r3, [r7, #56] @ 0x38
if (!(apiflags & NETCONN_NOAUTORCVD)) {
80167aa: 79fb ldrb r3, [r7, #7]
80167ac: f003 0308 and.w r3, r3, #8
80167b0: 2b00 cmp r3, #0
80167b2: d10e bne.n 80167d2 <netconn_recv_data_tcp+0x92>
/* Let the stack know that we have taken the data. */
u16_t len = buf ? buf->tot_len : 1;
80167b4: 6bbb ldr r3, [r7, #56] @ 0x38
80167b6: 2b00 cmp r3, #0
80167b8: d002 beq.n 80167c0 <netconn_recv_data_tcp+0x80>
80167ba: 6bbb ldr r3, [r7, #56] @ 0x38
80167bc: 891b ldrh r3, [r3, #8]
80167be: e000 b.n 80167c2 <netconn_recv_data_tcp+0x82>
80167c0: 2301 movs r3, #1
80167c2: 86fb strh r3, [r7, #54] @ 0x36
/* don't care for the return value of lwip_netconn_do_recv */
/* @todo: this should really be fixed, e.g. by retrying in poll on error */
netconn_tcp_recvd_msg(conn, len, &API_VAR_REF(msg));
80167c4: 8efb ldrh r3, [r7, #54] @ 0x36
80167c6: f107 0214 add.w r2, r7, #20
80167ca: 4619 mov r1, r3
80167cc: 68f8 ldr r0, [r7, #12]
80167ce: f7ff ff59 bl 8016684 <netconn_tcp_recvd_msg>
API_MSG_VAR_FREE(msg);
}
/* If we are closed, we indicate that we no longer wish to use the socket */
if (buf == NULL) {
80167d2: 6bbb ldr r3, [r7, #56] @ 0x38
80167d4: 2b00 cmp r3, #0
80167d6: d136 bne.n 8016846 <netconn_recv_data_tcp+0x106>
if (apiflags & NETCONN_NOFIN) {
80167d8: 79fb ldrb r3, [r7, #7]
80167da: f003 0310 and.w r3, r3, #16
80167de: 2b00 cmp r3, #0
80167e0: d00b beq.n 80167fa <netconn_recv_data_tcp+0xba>
/* received a FIN but the caller cannot handle it right now:
re-enqueue it and return "no data" */
netconn_set_flags(conn, NETCONN_FIN_RX_PENDING);
80167e2: 68fb ldr r3, [r7, #12]
80167e4: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
80167e8: f063 037f orn r3, r3, #127 @ 0x7f
80167ec: b2da uxtb r2, r3
80167ee: 68fb ldr r3, [r7, #12]
80167f0: f883 2028 strb.w r2, [r3, #40] @ 0x28
return ERR_WOULDBLOCK;
80167f4: f06f 0306 mvn.w r3, #6
80167f8: e027 b.n 801684a <netconn_recv_data_tcp+0x10a>
} else {
handle_fin:
80167fa: bf00 nop
API_EVENT(conn, NETCONN_EVT_RCVMINUS, 0);
80167fc: 68fb ldr r3, [r7, #12]
80167fe: 6b1b ldr r3, [r3, #48] @ 0x30
8016800: 2b00 cmp r3, #0
8016802: d005 beq.n 8016810 <netconn_recv_data_tcp+0xd0>
8016804: 68fb ldr r3, [r7, #12]
8016806: 6b1b ldr r3, [r3, #48] @ 0x30
8016808: 2200 movs r2, #0
801680a: 2101 movs r1, #1
801680c: 68f8 ldr r0, [r7, #12]
801680e: 4798 blx r3
if (conn->pcb.ip == NULL) {
8016810: 68fb ldr r3, [r7, #12]
8016812: 685b ldr r3, [r3, #4]
8016814: 2b00 cmp r3, #0
8016816: d10f bne.n 8016838 <netconn_recv_data_tcp+0xf8>
/* race condition: RST during recv */
err = netconn_err(conn);
8016818: 68f8 ldr r0, [r7, #12]
801681a: f000 f9a3 bl 8016b64 <netconn_err>
801681e: 4603 mov r3, r0
8016820: f887 303f strb.w r3, [r7, #63] @ 0x3f
if (err != ERR_OK) {
8016824: f997 303f ldrsb.w r3, [r7, #63] @ 0x3f
8016828: 2b00 cmp r3, #0
801682a: d002 beq.n 8016832 <netconn_recv_data_tcp+0xf2>
return err;
801682c: f997 303f ldrsb.w r3, [r7, #63] @ 0x3f
8016830: e00b b.n 801684a <netconn_recv_data_tcp+0x10a>
}
return ERR_RST;
8016832: f06f 030d mvn.w r3, #13
8016836: e008 b.n 801684a <netconn_recv_data_tcp+0x10a>
}
/* RX side is closed, so deallocate the recvmbox */
netconn_close_shutdown(conn, NETCONN_SHUT_RD);
8016838: 2101 movs r1, #1
801683a: 68f8 ldr r0, [r7, #12]
801683c: f000 f962 bl 8016b04 <netconn_close_shutdown>
/* Don' store ERR_CLSD as conn->err since we are only half-closed */
return ERR_CLSD;
8016840: f06f 030e mvn.w r3, #14
8016844: e001 b.n 801684a <netconn_recv_data_tcp+0x10a>
}
}
return err;
8016846: f997 303f ldrsb.w r3, [r7, #63] @ 0x3f
}
801684a: 4618 mov r0, r3
801684c: 3740 adds r7, #64 @ 0x40
801684e: 46bd mov sp, r7
8016850: bd80 pop {r7, pc}
...
08016854 <netconn_recv_tcp_pbuf_flags>:
* memory error or another error, @see netconn_recv_data)
* ERR_ARG if conn is not a TCP netconn
*/
err_t
netconn_recv_tcp_pbuf_flags(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
8016854: b580 push {r7, lr}
8016856: b084 sub sp, #16
8016858: af00 add r7, sp, #0
801685a: 60f8 str r0, [r7, #12]
801685c: 60b9 str r1, [r7, #8]
801685e: 4613 mov r3, r2
8016860: 71fb strb r3, [r7, #7]
LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
8016862: 68fb ldr r3, [r7, #12]
8016864: 2b00 cmp r3, #0
8016866: d005 beq.n 8016874 <netconn_recv_tcp_pbuf_flags+0x20>
8016868: 68fb ldr r3, [r7, #12]
801686a: 781b ldrb r3, [r3, #0]
801686c: f003 03f0 and.w r3, r3, #240 @ 0xf0
8016870: 2b10 cmp r3, #16
8016872: d009 beq.n 8016888 <netconn_recv_tcp_pbuf_flags+0x34>
8016874: 4b0a ldr r3, [pc, #40] @ (80168a0 <netconn_recv_tcp_pbuf_flags+0x4c>)
8016876: f240 3225 movw r2, #805 @ 0x325
801687a: 490a ldr r1, [pc, #40] @ (80168a4 <netconn_recv_tcp_pbuf_flags+0x50>)
801687c: 480a ldr r0, [pc, #40] @ (80168a8 <netconn_recv_tcp_pbuf_flags+0x54>)
801687e: f014 f8d5 bl 802aa2c <iprintf>
8016882: f06f 030f mvn.w r3, #15
8016886: e006 b.n 8016896 <netconn_recv_tcp_pbuf_flags+0x42>
NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);
return netconn_recv_data_tcp(conn, new_buf, apiflags);
8016888: 79fb ldrb r3, [r7, #7]
801688a: 461a mov r2, r3
801688c: 68b9 ldr r1, [r7, #8]
801688e: 68f8 ldr r0, [r7, #12]
8016890: f7ff ff56 bl 8016740 <netconn_recv_data_tcp>
8016894: 4603 mov r3, r0
}
8016896: 4618 mov r0, r3
8016898: 3710 adds r7, #16
801689a: 46bd mov sp, r7
801689c: bd80 pop {r7, pc}
801689e: bf00 nop
80168a0: 0802ddcc .word 0x0802ddcc
80168a4: 0802e02c .word 0x0802e02c
80168a8: 0802de24 .word 0x0802de24
080168ac <netconn_recv_udp_raw_netbuf_flags>:
* memory error or another error)
* ERR_ARG if conn is not a UDP/RAW netconn
*/
err_t
netconn_recv_udp_raw_netbuf_flags(struct netconn *conn, struct netbuf **new_buf, u8_t apiflags)
{
80168ac: b580 push {r7, lr}
80168ae: b084 sub sp, #16
80168b0: af00 add r7, sp, #0
80168b2: 60f8 str r0, [r7, #12]
80168b4: 60b9 str r1, [r7, #8]
80168b6: 4613 mov r3, r2
80168b8: 71fb strb r3, [r7, #7]
LWIP_ERROR("netconn_recv_udp_raw_netbuf: invalid conn", (conn != NULL) &&
80168ba: 68fb ldr r3, [r7, #12]
80168bc: 2b00 cmp r3, #0
80168be: d005 beq.n 80168cc <netconn_recv_udp_raw_netbuf_flags+0x20>
80168c0: 68fb ldr r3, [r7, #12]
80168c2: 781b ldrb r3, [r3, #0]
80168c4: f003 03f0 and.w r3, r3, #240 @ 0xf0
80168c8: 2b10 cmp r3, #16
80168ca: d109 bne.n 80168e0 <netconn_recv_udp_raw_netbuf_flags+0x34>
80168cc: 4b0a ldr r3, [pc, #40] @ (80168f8 <netconn_recv_udp_raw_netbuf_flags+0x4c>)
80168ce: f44f 7253 mov.w r2, #844 @ 0x34c
80168d2: 490a ldr r1, [pc, #40] @ (80168fc <netconn_recv_udp_raw_netbuf_flags+0x50>)
80168d4: 480a ldr r0, [pc, #40] @ (8016900 <netconn_recv_udp_raw_netbuf_flags+0x54>)
80168d6: f014 f8a9 bl 802aa2c <iprintf>
80168da: f06f 030f mvn.w r3, #15
80168de: e006 b.n 80168ee <netconn_recv_udp_raw_netbuf_flags+0x42>
NETCONNTYPE_GROUP(netconn_type(conn)) != NETCONN_TCP, return ERR_ARG;);
return netconn_recv_data(conn, (void **)new_buf, apiflags);
80168e0: 79fb ldrb r3, [r7, #7]
80168e2: 461a mov r2, r3
80168e4: 68b9 ldr r1, [r7, #8]
80168e6: 68f8 ldr r0, [r7, #12]
80168e8: f7ff fdec bl 80164c4 <netconn_recv_data>
80168ec: 4603 mov r3, r0
}
80168ee: 4618 mov r0, r3
80168f0: 3710 adds r7, #16
80168f2: 46bd mov sp, r7
80168f4: bd80 pop {r7, pc}
80168f6: bf00 nop
80168f8: 0802ddcc .word 0x0802ddcc
80168fc: 0802e050 .word 0x0802e050
8016900: 0802de24 .word 0x0802de24
08016904 <netconn_send>:
* @param buf a netbuf containing the data to send
* @return ERR_OK if data was sent, any other err_t on error
*/
err_t
netconn_send(struct netconn *conn, struct netbuf *buf)
{
8016904: b580 push {r7, lr}
8016906: b08c sub sp, #48 @ 0x30
8016908: af00 add r7, sp, #0
801690a: 6078 str r0, [r7, #4]
801690c: 6039 str r1, [r7, #0]
API_MSG_VAR_DECLARE(msg);
err_t err;
LWIP_ERROR("netconn_send: invalid conn", (conn != NULL), return ERR_ARG;);
801690e: 687b ldr r3, [r7, #4]
8016910: 2b00 cmp r3, #0
8016912: d109 bne.n 8016928 <netconn_send+0x24>
8016914: 4b0e ldr r3, [pc, #56] @ (8016950 <netconn_send+0x4c>)
8016916: f240 32b2 movw r2, #946 @ 0x3b2
801691a: 490e ldr r1, [pc, #56] @ (8016954 <netconn_send+0x50>)
801691c: 480e ldr r0, [pc, #56] @ (8016958 <netconn_send+0x54>)
801691e: f014 f885 bl 802aa2c <iprintf>
8016922: f06f 030f mvn.w r3, #15
8016926: e00e b.n 8016946 <netconn_send+0x42>
LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %"U16_F" bytes\n", buf->p->tot_len));
API_MSG_VAR_ALLOC(msg);
API_MSG_VAR_REF(msg).conn = conn;
8016928: 687b ldr r3, [r7, #4]
801692a: 60fb str r3, [r7, #12]
API_MSG_VAR_REF(msg).msg.b = buf;
801692c: 683b ldr r3, [r7, #0]
801692e: 617b str r3, [r7, #20]
err = netconn_apimsg(lwip_netconn_do_send, &API_MSG_VAR_REF(msg));
8016930: f107 030c add.w r3, r7, #12
8016934: 4619 mov r1, r3
8016936: 4809 ldr r0, [pc, #36] @ (801695c <netconn_send+0x58>)
8016938: f7ff fc36 bl 80161a8 <netconn_apimsg>
801693c: 4603 mov r3, r0
801693e: f887 302f strb.w r3, [r7, #47] @ 0x2f
API_MSG_VAR_FREE(msg);
return err;
8016942: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f
}
8016946: 4618 mov r0, r3
8016948: 3730 adds r7, #48 @ 0x30
801694a: 46bd mov sp, r7
801694c: bd80 pop {r7, pc}
801694e: bf00 nop
8016950: 0802ddcc .word 0x0802ddcc
8016954: 0802e088 .word 0x0802e088
8016958: 0802de24 .word 0x0802de24
801695c: 08017d5d .word 0x08017d5d
08016960 <netconn_write_partly>:
* @return ERR_OK if data was sent, any other err_t on error
*/
err_t
netconn_write_partly(struct netconn *conn, const void *dataptr, size_t size,
u8_t apiflags, size_t *bytes_written)
{
8016960: b580 push {r7, lr}
8016962: b088 sub sp, #32
8016964: af02 add r7, sp, #8
8016966: 60f8 str r0, [r7, #12]
8016968: 60b9 str r1, [r7, #8]
801696a: 607a str r2, [r7, #4]
801696c: 70fb strb r3, [r7, #3]
struct netvector vector;
vector.ptr = dataptr;
801696e: 68bb ldr r3, [r7, #8]
8016970: 613b str r3, [r7, #16]
vector.len = size;
8016972: 687b ldr r3, [r7, #4]
8016974: 617b str r3, [r7, #20]
return netconn_write_vectors_partly(conn, &vector, 1, apiflags, bytes_written);
8016976: 78fa ldrb r2, [r7, #3]
8016978: f107 0110 add.w r1, r7, #16
801697c: 6a3b ldr r3, [r7, #32]
801697e: 9300 str r3, [sp, #0]
8016980: 4613 mov r3, r2
8016982: 2201 movs r2, #1
8016984: 68f8 ldr r0, [r7, #12]
8016986: f000 f805 bl 8016994 <netconn_write_vectors_partly>
801698a: 4603 mov r3, r0
}
801698c: 4618 mov r0, r3
801698e: 3718 adds r7, #24
8016990: 46bd mov sp, r7
8016992: bd80 pop {r7, pc}
08016994 <netconn_write_vectors_partly>:
* @return ERR_OK if data was sent, any other err_t on error
*/
err_t
netconn_write_vectors_partly(struct netconn *conn, struct netvector *vectors, u16_t vectorcnt,
u8_t apiflags, size_t *bytes_written)
{
8016994: b580 push {r7, lr}
8016996: b092 sub sp, #72 @ 0x48
8016998: af00 add r7, sp, #0
801699a: 60f8 str r0, [r7, #12]
801699c: 60b9 str r1, [r7, #8]
801699e: 4611 mov r1, r2
80169a0: 461a mov r2, r3
80169a2: 460b mov r3, r1
80169a4: 80fb strh r3, [r7, #6]
80169a6: 4613 mov r3, r2
80169a8: 717b strb r3, [r7, #5]
err_t err;
u8_t dontblock;
size_t size;
int i;
LWIP_ERROR("netconn_write: invalid conn", (conn != NULL), return ERR_ARG;);
80169aa: 68fb ldr r3, [r7, #12]
80169ac: 2b00 cmp r3, #0
80169ae: d109 bne.n 80169c4 <netconn_write_vectors_partly+0x30>
80169b0: 4b4e ldr r3, [pc, #312] @ (8016aec <netconn_write_vectors_partly+0x158>)
80169b2: f240 32ee movw r2, #1006 @ 0x3ee
80169b6: 494e ldr r1, [pc, #312] @ (8016af0 <netconn_write_vectors_partly+0x15c>)
80169b8: 484e ldr r0, [pc, #312] @ (8016af4 <netconn_write_vectors_partly+0x160>)
80169ba: f014 f837 bl 802aa2c <iprintf>
80169be: f06f 030f mvn.w r3, #15
80169c2: e08f b.n 8016ae4 <netconn_write_vectors_partly+0x150>
LWIP_ERROR("netconn_write: invalid conn->type", (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP), return ERR_VAL;);
80169c4: 68fb ldr r3, [r7, #12]
80169c6: 781b ldrb r3, [r3, #0]
80169c8: f003 03f0 and.w r3, r3, #240 @ 0xf0
80169cc: 2b10 cmp r3, #16
80169ce: d009 beq.n 80169e4 <netconn_write_vectors_partly+0x50>
80169d0: 4b46 ldr r3, [pc, #280] @ (8016aec <netconn_write_vectors_partly+0x158>)
80169d2: f240 32ef movw r2, #1007 @ 0x3ef
80169d6: 4948 ldr r1, [pc, #288] @ (8016af8 <netconn_write_vectors_partly+0x164>)
80169d8: 4846 ldr r0, [pc, #280] @ (8016af4 <netconn_write_vectors_partly+0x160>)
80169da: f014 f827 bl 802aa2c <iprintf>
80169de: f06f 0305 mvn.w r3, #5
80169e2: e07f b.n 8016ae4 <netconn_write_vectors_partly+0x150>
dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
80169e4: 68fb ldr r3, [r7, #12]
80169e6: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
80169ea: f003 0302 and.w r3, r3, #2
80169ee: 2b00 cmp r3, #0
80169f0: d104 bne.n 80169fc <netconn_write_vectors_partly+0x68>
80169f2: 797b ldrb r3, [r7, #5]
80169f4: f003 0304 and.w r3, r3, #4
80169f8: 2b00 cmp r3, #0
80169fa: d001 beq.n 8016a00 <netconn_write_vectors_partly+0x6c>
80169fc: 2301 movs r3, #1
80169fe: e000 b.n 8016a02 <netconn_write_vectors_partly+0x6e>
8016a00: 2300 movs r3, #0
8016a02: f887 303f strb.w r3, [r7, #63] @ 0x3f
#if LWIP_SO_SNDTIMEO
if (conn->send_timeout != 0) {
dontblock = 1;
}
#endif /* LWIP_SO_SNDTIMEO */
if (dontblock && !bytes_written) {
8016a06: f897 303f ldrb.w r3, [r7, #63] @ 0x3f
8016a0a: 2b00 cmp r3, #0
8016a0c: d005 beq.n 8016a1a <netconn_write_vectors_partly+0x86>
8016a0e: 6d3b ldr r3, [r7, #80] @ 0x50
8016a10: 2b00 cmp r3, #0
8016a12: d102 bne.n 8016a1a <netconn_write_vectors_partly+0x86>
/* This implies netconn_write() cannot be used for non-blocking send, since
it has no way to return the number of bytes written. */
return ERR_VAL;
8016a14: f06f 0305 mvn.w r3, #5
8016a18: e064 b.n 8016ae4 <netconn_write_vectors_partly+0x150>
}
/* sum up the total size */
size = 0;
8016a1a: 2300 movs r3, #0
8016a1c: 647b str r3, [r7, #68] @ 0x44
for (i = 0; i < vectorcnt; i++) {
8016a1e: 2300 movs r3, #0
8016a20: 643b str r3, [r7, #64] @ 0x40
8016a22: e015 b.n 8016a50 <netconn_write_vectors_partly+0xbc>
size += vectors[i].len;
8016a24: 6c3b ldr r3, [r7, #64] @ 0x40
8016a26: 00db lsls r3, r3, #3
8016a28: 68ba ldr r2, [r7, #8]
8016a2a: 4413 add r3, r2
8016a2c: 685b ldr r3, [r3, #4]
8016a2e: 6c7a ldr r2, [r7, #68] @ 0x44
8016a30: 4413 add r3, r2
8016a32: 647b str r3, [r7, #68] @ 0x44
if (size < vectors[i].len) {
8016a34: 6c3b ldr r3, [r7, #64] @ 0x40
8016a36: 00db lsls r3, r3, #3
8016a38: 68ba ldr r2, [r7, #8]
8016a3a: 4413 add r3, r2
8016a3c: 685b ldr r3, [r3, #4]
8016a3e: 6c7a ldr r2, [r7, #68] @ 0x44
8016a40: 429a cmp r2, r3
8016a42: d202 bcs.n 8016a4a <netconn_write_vectors_partly+0xb6>
/* overflow */
return ERR_VAL;
8016a44: f06f 0305 mvn.w r3, #5
8016a48: e04c b.n 8016ae4 <netconn_write_vectors_partly+0x150>
for (i = 0; i < vectorcnt; i++) {
8016a4a: 6c3b ldr r3, [r7, #64] @ 0x40
8016a4c: 3301 adds r3, #1
8016a4e: 643b str r3, [r7, #64] @ 0x40
8016a50: 88fb ldrh r3, [r7, #6]
8016a52: 6c3a ldr r2, [r7, #64] @ 0x40
8016a54: 429a cmp r2, r3
8016a56: dbe5 blt.n 8016a24 <netconn_write_vectors_partly+0x90>
}
}
if (size == 0) {
8016a58: 6c7b ldr r3, [r7, #68] @ 0x44
8016a5a: 2b00 cmp r3, #0
8016a5c: d101 bne.n 8016a62 <netconn_write_vectors_partly+0xce>
return ERR_OK;
8016a5e: 2300 movs r3, #0
8016a60: e040 b.n 8016ae4 <netconn_write_vectors_partly+0x150>
} else if (size > SSIZE_MAX) {
8016a62: 6c7b ldr r3, [r7, #68] @ 0x44
8016a64: 2b00 cmp r3, #0
8016a66: da0a bge.n 8016a7e <netconn_write_vectors_partly+0xea>
ssize_t limited;
/* this is required by the socket layer (cannot send full size_t range) */
if (!bytes_written) {
8016a68: 6d3b ldr r3, [r7, #80] @ 0x50
8016a6a: 2b00 cmp r3, #0
8016a6c: d102 bne.n 8016a74 <netconn_write_vectors_partly+0xe0>
return ERR_VAL;
8016a6e: f06f 0305 mvn.w r3, #5
8016a72: e037 b.n 8016ae4 <netconn_write_vectors_partly+0x150>
}
/* limit the amount of data to send */
limited = SSIZE_MAX;
8016a74: f06f 4300 mvn.w r3, #2147483648 @ 0x80000000
8016a78: 63bb str r3, [r7, #56] @ 0x38
size = (size_t)limited;
8016a7a: 6bbb ldr r3, [r7, #56] @ 0x38
8016a7c: 647b str r3, [r7, #68] @ 0x44
}
API_MSG_VAR_ALLOC(msg);
/* non-blocking write sends as much */
API_MSG_VAR_REF(msg).conn = conn;
8016a7e: 68fb ldr r3, [r7, #12]
8016a80: 617b str r3, [r7, #20]
API_MSG_VAR_REF(msg).msg.w.vector = vectors;
8016a82: 68bb ldr r3, [r7, #8]
8016a84: 61fb str r3, [r7, #28]
API_MSG_VAR_REF(msg).msg.w.vector_cnt = vectorcnt;
8016a86: 88fb ldrh r3, [r7, #6]
8016a88: 843b strh r3, [r7, #32]
API_MSG_VAR_REF(msg).msg.w.vector_off = 0;
8016a8a: 2300 movs r3, #0
8016a8c: 627b str r3, [r7, #36] @ 0x24
API_MSG_VAR_REF(msg).msg.w.apiflags = apiflags;
8016a8e: 797b ldrb r3, [r7, #5]
8016a90: f887 3030 strb.w r3, [r7, #48] @ 0x30
API_MSG_VAR_REF(msg).msg.w.len = size;
8016a94: 6c7b ldr r3, [r7, #68] @ 0x44
8016a96: 62bb str r3, [r7, #40] @ 0x28
API_MSG_VAR_REF(msg).msg.w.offset = 0;
8016a98: 2300 movs r3, #0
8016a9a: 62fb str r3, [r7, #44] @ 0x2c
#endif /* LWIP_SO_SNDTIMEO */
/* For locking the core: this _can_ be delayed on low memory/low send buffer,
but if it is, this is done inside api_msg.c:do_write(), so we can use the
non-blocking version here. */
err = netconn_apimsg(lwip_netconn_do_write, &API_MSG_VAR_REF(msg));
8016a9c: f107 0314 add.w r3, r7, #20
8016aa0: 4619 mov r1, r3
8016aa2: 4816 ldr r0, [pc, #88] @ (8016afc <netconn_write_vectors_partly+0x168>)
8016aa4: f7ff fb80 bl 80161a8 <netconn_apimsg>
8016aa8: 4603 mov r3, r0
8016aaa: f887 3037 strb.w r3, [r7, #55] @ 0x37
if (err == ERR_OK) {
8016aae: f997 3037 ldrsb.w r3, [r7, #55] @ 0x37
8016ab2: 2b00 cmp r3, #0
8016ab4: d114 bne.n 8016ae0 <netconn_write_vectors_partly+0x14c>
if (bytes_written != NULL) {
8016ab6: 6d3b ldr r3, [r7, #80] @ 0x50
8016ab8: 2b00 cmp r3, #0
8016aba: d002 beq.n 8016ac2 <netconn_write_vectors_partly+0x12e>
*bytes_written = API_MSG_VAR_REF(msg).msg.w.offset;
8016abc: 6afa ldr r2, [r7, #44] @ 0x2c
8016abe: 6d3b ldr r3, [r7, #80] @ 0x50
8016ac0: 601a str r2, [r3, #0]
}
/* for blocking, check all requested bytes were written, NOTE: send_timeout is
treated as dontblock (see dontblock assignment above) */
if (!dontblock) {
8016ac2: f897 303f ldrb.w r3, [r7, #63] @ 0x3f
8016ac6: 2b00 cmp r3, #0
8016ac8: d10a bne.n 8016ae0 <netconn_write_vectors_partly+0x14c>
LWIP_ASSERT("do_write failed to write all bytes", API_MSG_VAR_REF(msg).msg.w.offset == size);
8016aca: 6afb ldr r3, [r7, #44] @ 0x2c
8016acc: 6c7a ldr r2, [r7, #68] @ 0x44
8016ace: 429a cmp r2, r3
8016ad0: d006 beq.n 8016ae0 <netconn_write_vectors_partly+0x14c>
8016ad2: 4b06 ldr r3, [pc, #24] @ (8016aec <netconn_write_vectors_partly+0x158>)
8016ad4: f44f 6286 mov.w r2, #1072 @ 0x430
8016ad8: 4909 ldr r1, [pc, #36] @ (8016b00 <netconn_write_vectors_partly+0x16c>)
8016ada: 4806 ldr r0, [pc, #24] @ (8016af4 <netconn_write_vectors_partly+0x160>)
8016adc: f013 ffa6 bl 802aa2c <iprintf>
}
}
API_MSG_VAR_FREE(msg);
return err;
8016ae0: f997 3037 ldrsb.w r3, [r7, #55] @ 0x37
}
8016ae4: 4618 mov r0, r3
8016ae6: 3748 adds r7, #72 @ 0x48
8016ae8: 46bd mov sp, r7
8016aea: bd80 pop {r7, pc}
8016aec: 0802ddcc .word 0x0802ddcc
8016af0: 0802e0a4 .word 0x0802e0a4
8016af4: 0802de24 .word 0x0802de24
8016af8: 0802e0c0 .word 0x0802e0c0
8016afc: 08018201 .word 0x08018201
8016b00: 0802e0e4 .word 0x0802e0e4
08016b04 <netconn_close_shutdown>:
* @param how fully close or only shutdown one side?
* @return ERR_OK if the netconn was closed, any other err_t on error
*/
static err_t
netconn_close_shutdown(struct netconn *conn, u8_t how)
{
8016b04: b580 push {r7, lr}
8016b06: b08c sub sp, #48 @ 0x30
8016b08: af00 add r7, sp, #0
8016b0a: 6078 str r0, [r7, #4]
8016b0c: 460b mov r3, r1
8016b0e: 70fb strb r3, [r7, #3]
API_MSG_VAR_DECLARE(msg);
err_t err;
LWIP_UNUSED_ARG(how);
LWIP_ERROR("netconn_close: invalid conn", (conn != NULL), return ERR_ARG;);
8016b10: 687b ldr r3, [r7, #4]
8016b12: 2b00 cmp r3, #0
8016b14: d109 bne.n 8016b2a <netconn_close_shutdown+0x26>
8016b16: 4b0f ldr r3, [pc, #60] @ (8016b54 <netconn_close_shutdown+0x50>)
8016b18: f240 4247 movw r2, #1095 @ 0x447
8016b1c: 490e ldr r1, [pc, #56] @ (8016b58 <netconn_close_shutdown+0x54>)
8016b1e: 480f ldr r0, [pc, #60] @ (8016b5c <netconn_close_shutdown+0x58>)
8016b20: f013 ff84 bl 802aa2c <iprintf>
8016b24: f06f 030f mvn.w r3, #15
8016b28: e010 b.n 8016b4c <netconn_close_shutdown+0x48>
API_MSG_VAR_ALLOC(msg);
API_MSG_VAR_REF(msg).conn = conn;
8016b2a: 687b ldr r3, [r7, #4]
8016b2c: 60fb str r3, [r7, #12]
#if LWIP_TCP
/* shutting down both ends is the same as closing */
API_MSG_VAR_REF(msg).msg.sd.shut = how;
8016b2e: 78fb ldrb r3, [r7, #3]
8016b30: 753b strb r3, [r7, #20]
#if LWIP_SO_SNDTIMEO || LWIP_SO_LINGER
/* get the time we started, which is later compared to
sys_now() + conn->send_timeout */
API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
API_MSG_VAR_REF(msg).msg.sd.polls_left =
8016b32: 2329 movs r3, #41 @ 0x29
8016b34: 757b strb r3, [r7, #21]
((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#endif /* LWIP_TCP */
err = netconn_apimsg(lwip_netconn_do_close, &API_MSG_VAR_REF(msg));
8016b36: f107 030c add.w r3, r7, #12
8016b3a: 4619 mov r1, r3
8016b3c: 4808 ldr r0, [pc, #32] @ (8016b60 <netconn_close_shutdown+0x5c>)
8016b3e: f7ff fb33 bl 80161a8 <netconn_apimsg>
8016b42: 4603 mov r3, r0
8016b44: f887 302f strb.w r3, [r7, #47] @ 0x2f
API_MSG_VAR_FREE(msg);
return err;
8016b48: f997 302f ldrsb.w r3, [r7, #47] @ 0x2f
}
8016b4c: 4618 mov r0, r3
8016b4e: 3730 adds r7, #48 @ 0x30
8016b50: 46bd mov sp, r7
8016b52: bd80 pop {r7, pc}
8016b54: 0802ddcc .word 0x0802ddcc
8016b58: 0802e108 .word 0x0802e108
8016b5c: 0802de24 .word 0x0802de24
8016b60: 0801841d .word 0x0801841d
08016b64 <netconn_err>:
* @param conn the netconn to get the error from
* @return and pending error or ERR_OK if no error was pending
*/
err_t
netconn_err(struct netconn *conn)
{
8016b64: b580 push {r7, lr}
8016b66: b084 sub sp, #16
8016b68: af00 add r7, sp, #0
8016b6a: 6078 str r0, [r7, #4]
err_t err;
SYS_ARCH_DECL_PROTECT(lev);
if (conn == NULL) {
8016b6c: 687b ldr r3, [r7, #4]
8016b6e: 2b00 cmp r3, #0
8016b70: d101 bne.n 8016b76 <netconn_err+0x12>
return ERR_OK;
8016b72: 2300 movs r3, #0
8016b74: e00d b.n 8016b92 <netconn_err+0x2e>
}
SYS_ARCH_PROTECT(lev);
8016b76: f010 fcc3 bl 8027500 <sys_arch_protect>
8016b7a: 60f8 str r0, [r7, #12]
err = conn->pending_err;
8016b7c: 687b ldr r3, [r7, #4]
8016b7e: 7a1b ldrb r3, [r3, #8]
8016b80: 72fb strb r3, [r7, #11]
conn->pending_err = ERR_OK;
8016b82: 687b ldr r3, [r7, #4]
8016b84: 2200 movs r2, #0
8016b86: 721a strb r2, [r3, #8]
SYS_ARCH_UNPROTECT(lev);
8016b88: 68f8 ldr r0, [r7, #12]
8016b8a: f010 fcc7 bl 802751c <sys_arch_unprotect>
return err;
8016b8e: f997 300b ldrsb.w r3, [r7, #11]
}
8016b92: 4618 mov r0, r3
8016b94: 3710 adds r7, #16
8016b96: 46bd mov sp, r7
8016b98: bd80 pop {r7, pc}
...
08016b9c <lwip_netconn_err_to_msg>:
const u8_t netconn_closed = 0;
/** Translate an error to a unique void* passed via an mbox */
static void *
lwip_netconn_err_to_msg(err_t err)
{
8016b9c: b580 push {r7, lr}
8016b9e: b082 sub sp, #8
8016ba0: af00 add r7, sp, #0
8016ba2: 4603 mov r3, r0
8016ba4: 71fb strb r3, [r7, #7]
switch (err) {
8016ba6: f997 3007 ldrsb.w r3, [r7, #7]
8016baa: f113 0f0d cmn.w r3, #13
8016bae: d009 beq.n 8016bc4 <lwip_netconn_err_to_msg+0x28>
8016bb0: f113 0f0d cmn.w r3, #13
8016bb4: dc0c bgt.n 8016bd0 <lwip_netconn_err_to_msg+0x34>
8016bb6: f113 0f0f cmn.w r3, #15
8016bba: d007 beq.n 8016bcc <lwip_netconn_err_to_msg+0x30>
8016bbc: f113 0f0e cmn.w r3, #14
8016bc0: d002 beq.n 8016bc8 <lwip_netconn_err_to_msg+0x2c>
8016bc2: e005 b.n 8016bd0 <lwip_netconn_err_to_msg+0x34>
case ERR_ABRT:
return LWIP_CONST_CAST(void *, &netconn_aborted);
8016bc4: 4b0a ldr r3, [pc, #40] @ (8016bf0 <lwip_netconn_err_to_msg+0x54>)
8016bc6: e00e b.n 8016be6 <lwip_netconn_err_to_msg+0x4a>
case ERR_RST:
return LWIP_CONST_CAST(void *, &netconn_reset);
8016bc8: 4b0a ldr r3, [pc, #40] @ (8016bf4 <lwip_netconn_err_to_msg+0x58>)
8016bca: e00c b.n 8016be6 <lwip_netconn_err_to_msg+0x4a>
case ERR_CLSD:
return LWIP_CONST_CAST(void *, &netconn_closed);
8016bcc: 4b0a ldr r3, [pc, #40] @ (8016bf8 <lwip_netconn_err_to_msg+0x5c>)
8016bce: e00a b.n 8016be6 <lwip_netconn_err_to_msg+0x4a>
default:
LWIP_ASSERT("unhandled error", err == ERR_OK);
8016bd0: f997 3007 ldrsb.w r3, [r7, #7]
8016bd4: 2b00 cmp r3, #0
8016bd6: d005 beq.n 8016be4 <lwip_netconn_err_to_msg+0x48>
8016bd8: 4b08 ldr r3, [pc, #32] @ (8016bfc <lwip_netconn_err_to_msg+0x60>)
8016bda: 227d movs r2, #125 @ 0x7d
8016bdc: 4908 ldr r1, [pc, #32] @ (8016c00 <lwip_netconn_err_to_msg+0x64>)
8016bde: 4809 ldr r0, [pc, #36] @ (8016c04 <lwip_netconn_err_to_msg+0x68>)
8016be0: f013 ff24 bl 802aa2c <iprintf>
return NULL;
8016be4: 2300 movs r3, #0
}
}
8016be6: 4618 mov r0, r3
8016be8: 3708 adds r7, #8
8016bea: 46bd mov sp, r7
8016bec: bd80 pop {r7, pc}
8016bee: bf00 nop
8016bf0: 08031d2c .word 0x08031d2c
8016bf4: 08031d2d .word 0x08031d2d
8016bf8: 08031d2e .word 0x08031d2e
8016bfc: 0802e124 .word 0x0802e124
8016c00: 0802e158 .word 0x0802e158
8016c04: 0802e168 .word 0x0802e168
08016c08 <lwip_netconn_is_err_msg>:
int
lwip_netconn_is_err_msg(void *msg, err_t *err)
{
8016c08: b580 push {r7, lr}
8016c0a: b082 sub sp, #8
8016c0c: af00 add r7, sp, #0
8016c0e: 6078 str r0, [r7, #4]
8016c10: 6039 str r1, [r7, #0]
LWIP_ASSERT("err != NULL", err != NULL);
8016c12: 683b ldr r3, [r7, #0]
8016c14: 2b00 cmp r3, #0
8016c16: d105 bne.n 8016c24 <lwip_netconn_is_err_msg+0x1c>
8016c18: 4b12 ldr r3, [pc, #72] @ (8016c64 <lwip_netconn_is_err_msg+0x5c>)
8016c1a: 2285 movs r2, #133 @ 0x85
8016c1c: 4912 ldr r1, [pc, #72] @ (8016c68 <lwip_netconn_is_err_msg+0x60>)
8016c1e: 4813 ldr r0, [pc, #76] @ (8016c6c <lwip_netconn_is_err_msg+0x64>)
8016c20: f013 ff04 bl 802aa2c <iprintf>
if (msg == &netconn_aborted) {
8016c24: 687b ldr r3, [r7, #4]
8016c26: 4a12 ldr r2, [pc, #72] @ (8016c70 <lwip_netconn_is_err_msg+0x68>)
8016c28: 4293 cmp r3, r2
8016c2a: d104 bne.n 8016c36 <lwip_netconn_is_err_msg+0x2e>
*err = ERR_ABRT;
8016c2c: 683b ldr r3, [r7, #0]
8016c2e: 22f3 movs r2, #243 @ 0xf3
8016c30: 701a strb r2, [r3, #0]
return 1;
8016c32: 2301 movs r3, #1
8016c34: e012 b.n 8016c5c <lwip_netconn_is_err_msg+0x54>
} else if (msg == &netconn_reset) {
8016c36: 687b ldr r3, [r7, #4]
8016c38: 4a0e ldr r2, [pc, #56] @ (8016c74 <lwip_netconn_is_err_msg+0x6c>)
8016c3a: 4293 cmp r3, r2
8016c3c: d104 bne.n 8016c48 <lwip_netconn_is_err_msg+0x40>
*err = ERR_RST;
8016c3e: 683b ldr r3, [r7, #0]
8016c40: 22f2 movs r2, #242 @ 0xf2
8016c42: 701a strb r2, [r3, #0]
return 1;
8016c44: 2301 movs r3, #1
8016c46: e009 b.n 8016c5c <lwip_netconn_is_err_msg+0x54>
} else if (msg == &netconn_closed) {
8016c48: 687b ldr r3, [r7, #4]
8016c4a: 4a0b ldr r2, [pc, #44] @ (8016c78 <lwip_netconn_is_err_msg+0x70>)
8016c4c: 4293 cmp r3, r2
8016c4e: d104 bne.n 8016c5a <lwip_netconn_is_err_msg+0x52>
*err = ERR_CLSD;
8016c50: 683b ldr r3, [r7, #0]
8016c52: 22f1 movs r2, #241 @ 0xf1
8016c54: 701a strb r2, [r3, #0]
return 1;
8016c56: 2301 movs r3, #1
8016c58: e000 b.n 8016c5c <lwip_netconn_is_err_msg+0x54>
}
return 0;
8016c5a: 2300 movs r3, #0
}
8016c5c: 4618 mov r0, r3
8016c5e: 3708 adds r7, #8
8016c60: 46bd mov sp, r7
8016c62: bd80 pop {r7, pc}
8016c64: 0802e124 .word 0x0802e124
8016c68: 0802e190 .word 0x0802e190
8016c6c: 0802e168 .word 0x0802e168
8016c70: 08031d2c .word 0x08031d2c
8016c74: 08031d2d .word 0x08031d2d
8016c78: 08031d2e .word 0x08031d2e
08016c7c <recv_udp>:
* @see udp.h (struct udp_pcb.recv) for parameters
*/
static void
recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p,
const ip_addr_t *addr, u16_t port)
{
8016c7c: b580 push {r7, lr}
8016c7e: b08a sub sp, #40 @ 0x28
8016c80: af00 add r7, sp, #0
8016c82: 60f8 str r0, [r7, #12]
8016c84: 60b9 str r1, [r7, #8]
8016c86: 607a str r2, [r7, #4]
8016c88: 603b str r3, [r7, #0]
#if LWIP_SO_RCVBUF
int recv_avail;
#endif /* LWIP_SO_RCVBUF */
LWIP_UNUSED_ARG(pcb); /* only used for asserts... */
LWIP_ASSERT("recv_udp must have a pcb argument", pcb != NULL);
8016c8a: 68bb ldr r3, [r7, #8]
8016c8c: 2b00 cmp r3, #0
8016c8e: d105 bne.n 8016c9c <recv_udp+0x20>
8016c90: 4b43 ldr r3, [pc, #268] @ (8016da0 <recv_udp+0x124>)
8016c92: 22e5 movs r2, #229 @ 0xe5
8016c94: 4943 ldr r1, [pc, #268] @ (8016da4 <recv_udp+0x128>)
8016c96: 4844 ldr r0, [pc, #272] @ (8016da8 <recv_udp+0x12c>)
8016c98: f013 fec8 bl 802aa2c <iprintf>
LWIP_ASSERT("recv_udp must have an argument", arg != NULL);
8016c9c: 68fb ldr r3, [r7, #12]
8016c9e: 2b00 cmp r3, #0
8016ca0: d105 bne.n 8016cae <recv_udp+0x32>
8016ca2: 4b3f ldr r3, [pc, #252] @ (8016da0 <recv_udp+0x124>)
8016ca4: 22e6 movs r2, #230 @ 0xe6
8016ca6: 4941 ldr r1, [pc, #260] @ (8016dac <recv_udp+0x130>)
8016ca8: 483f ldr r0, [pc, #252] @ (8016da8 <recv_udp+0x12c>)
8016caa: f013 febf bl 802aa2c <iprintf>
conn = (struct netconn *)arg;
8016cae: 68fb ldr r3, [r7, #12]
8016cb0: 627b str r3, [r7, #36] @ 0x24
if (conn == NULL) {
8016cb2: 6a7b ldr r3, [r7, #36] @ 0x24
8016cb4: 2b00 cmp r3, #0
8016cb6: d103 bne.n 8016cc0 <recv_udp+0x44>
pbuf_free(p);
8016cb8: 6878 ldr r0, [r7, #4]
8016cba: f004 fc3f bl 801b53c <pbuf_free>
return;
8016cbe: e06b b.n 8016d98 <recv_udp+0x11c>
}
LWIP_ASSERT("recv_udp: recv for wrong pcb!", conn->pcb.udp == pcb);
8016cc0: 6a7b ldr r3, [r7, #36] @ 0x24
8016cc2: 685b ldr r3, [r3, #4]
8016cc4: 68ba ldr r2, [r7, #8]
8016cc6: 429a cmp r2, r3
8016cc8: d005 beq.n 8016cd6 <recv_udp+0x5a>
8016cca: 4b35 ldr r3, [pc, #212] @ (8016da0 <recv_udp+0x124>)
8016ccc: 22ee movs r2, #238 @ 0xee
8016cce: 4938 ldr r1, [pc, #224] @ (8016db0 <recv_udp+0x134>)
8016cd0: 4835 ldr r0, [pc, #212] @ (8016da8 <recv_udp+0x12c>)
8016cd2: f013 feab bl 802aa2c <iprintf>
#if LWIP_SO_RCVBUF
SYS_ARCH_GET(conn->recv_avail, recv_avail);
8016cd6: f010 fc13 bl 8027500 <sys_arch_protect>
8016cda: 6238 str r0, [r7, #32]
8016cdc: 6a7b ldr r3, [r7, #36] @ 0x24
8016cde: 6a5b ldr r3, [r3, #36] @ 0x24
8016ce0: 61fb str r3, [r7, #28]
8016ce2: 6a38 ldr r0, [r7, #32]
8016ce4: f010 fc1a bl 802751c <sys_arch_unprotect>
if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
8016ce8: 6a7b ldr r3, [r7, #36] @ 0x24
8016cea: 3310 adds r3, #16
8016cec: 4618 mov r0, r3
8016cee: f010 fafd bl 80272ec <sys_mbox_valid>
8016cf2: 4603 mov r3, r0
8016cf4: 2b00 cmp r3, #0
8016cf6: d008 beq.n 8016d0a <recv_udp+0x8e>
((recv_avail + (int)(p->tot_len)) > conn->recv_bufsize)) {
8016cf8: 687b ldr r3, [r7, #4]
8016cfa: 891b ldrh r3, [r3, #8]
8016cfc: 461a mov r2, r3
8016cfe: 69fb ldr r3, [r7, #28]
8016d00: 441a add r2, r3
8016d02: 6a7b ldr r3, [r7, #36] @ 0x24
8016d04: 6a1b ldr r3, [r3, #32]
if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
8016d06: 429a cmp r2, r3
8016d08: dd03 ble.n 8016d12 <recv_udp+0x96>
#else /* LWIP_SO_RCVBUF */
if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
#endif /* LWIP_SO_RCVBUF */
pbuf_free(p);
8016d0a: 6878 ldr r0, [r7, #4]
8016d0c: f004 fc16 bl 801b53c <pbuf_free>
return;
8016d10: e042 b.n 8016d98 <recv_udp+0x11c>
}
buf = (struct netbuf *)memp_malloc(MEMP_NETBUF);
8016d12: 2006 movs r0, #6
8016d14: f003 fcae bl 801a674 <memp_malloc>
8016d18: 61b8 str r0, [r7, #24]
if (buf == NULL) {
8016d1a: 69bb ldr r3, [r7, #24]
8016d1c: 2b00 cmp r3, #0
8016d1e: d103 bne.n 8016d28 <recv_udp+0xac>
pbuf_free(p);
8016d20: 6878 ldr r0, [r7, #4]
8016d22: f004 fc0b bl 801b53c <pbuf_free>
return;
8016d26: e037 b.n 8016d98 <recv_udp+0x11c>
} else {
buf->p = p;
8016d28: 69bb ldr r3, [r7, #24]
8016d2a: 687a ldr r2, [r7, #4]
8016d2c: 601a str r2, [r3, #0]
buf->ptr = p;
8016d2e: 69bb ldr r3, [r7, #24]
8016d30: 687a ldr r2, [r7, #4]
8016d32: 605a str r2, [r3, #4]
ip_addr_set(&buf->addr, addr);
8016d34: 683b ldr r3, [r7, #0]
8016d36: 2b00 cmp r3, #0
8016d38: d002 beq.n 8016d40 <recv_udp+0xc4>
8016d3a: 683b ldr r3, [r7, #0]
8016d3c: 681b ldr r3, [r3, #0]
8016d3e: e000 b.n 8016d42 <recv_udp+0xc6>
8016d40: 2300 movs r3, #0
8016d42: 69ba ldr r2, [r7, #24]
8016d44: 6093 str r3, [r2, #8]
buf->port = port;
8016d46: 69bb ldr r3, [r7, #24]
8016d48: 8e3a ldrh r2, [r7, #48] @ 0x30
8016d4a: 819a strh r2, [r3, #12]
buf->toport_chksum = udphdr->dest;
}
#endif /* LWIP_NETBUF_RECVINFO */
}
len = p->tot_len;
8016d4c: 687b ldr r3, [r7, #4]
8016d4e: 891b ldrh r3, [r3, #8]
8016d50: 82fb strh r3, [r7, #22]
if (sys_mbox_trypost(&conn->recvmbox, buf) != ERR_OK) {
8016d52: 6a7b ldr r3, [r7, #36] @ 0x24
8016d54: 3310 adds r3, #16
8016d56: 69b9 ldr r1, [r7, #24]
8016d58: 4618 mov r0, r3
8016d5a: f010 fa65 bl 8027228 <sys_mbox_trypost>
8016d5e: 4603 mov r3, r0
8016d60: 2b00 cmp r3, #0
8016d62: d003 beq.n 8016d6c <recv_udp+0xf0>
netbuf_delete(buf);
8016d64: 69b8 ldr r0, [r7, #24]
8016d66: f001 fbff bl 8018568 <netbuf_delete>
return;
8016d6a: e015 b.n 8016d98 <recv_udp+0x11c>
} else {
#if LWIP_SO_RCVBUF
SYS_ARCH_INC(conn->recv_avail, len);
8016d6c: f010 fbc8 bl 8027500 <sys_arch_protect>
8016d70: 6138 str r0, [r7, #16]
8016d72: 6a7b ldr r3, [r7, #36] @ 0x24
8016d74: 6a5a ldr r2, [r3, #36] @ 0x24
8016d76: 8afb ldrh r3, [r7, #22]
8016d78: 441a add r2, r3
8016d7a: 6a7b ldr r3, [r7, #36] @ 0x24
8016d7c: 625a str r2, [r3, #36] @ 0x24
8016d7e: 6938 ldr r0, [r7, #16]
8016d80: f010 fbcc bl 802751c <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
/* Register event with callback */
API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
8016d84: 6a7b ldr r3, [r7, #36] @ 0x24
8016d86: 6b1b ldr r3, [r3, #48] @ 0x30
8016d88: 2b00 cmp r3, #0
8016d8a: d005 beq.n 8016d98 <recv_udp+0x11c>
8016d8c: 6a7b ldr r3, [r7, #36] @ 0x24
8016d8e: 6b1b ldr r3, [r3, #48] @ 0x30
8016d90: 8afa ldrh r2, [r7, #22]
8016d92: 2100 movs r1, #0
8016d94: 6a78 ldr r0, [r7, #36] @ 0x24
8016d96: 4798 blx r3
}
}
8016d98: 3728 adds r7, #40 @ 0x28
8016d9a: 46bd mov sp, r7
8016d9c: bd80 pop {r7, pc}
8016d9e: bf00 nop
8016da0: 0802e124 .word 0x0802e124
8016da4: 0802e19c .word 0x0802e19c
8016da8: 0802e168 .word 0x0802e168
8016dac: 0802e1c0 .word 0x0802e1c0
8016db0: 0802e1e0 .word 0x0802e1e0
08016db4 <recv_tcp>:
*
* @see tcp.h (struct tcp_pcb.recv) for parameters and return value
*/
static err_t
recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
8016db4: b580 push {r7, lr}
8016db6: b088 sub sp, #32
8016db8: af00 add r7, sp, #0
8016dba: 60f8 str r0, [r7, #12]
8016dbc: 60b9 str r1, [r7, #8]
8016dbe: 607a str r2, [r7, #4]
8016dc0: 70fb strb r3, [r7, #3]
struct netconn *conn;
u16_t len;
void *msg;
LWIP_UNUSED_ARG(pcb);
LWIP_ASSERT("recv_tcp must have a pcb argument", pcb != NULL);
8016dc2: 68bb ldr r3, [r7, #8]
8016dc4: 2b00 cmp r3, #0
8016dc6: d106 bne.n 8016dd6 <recv_tcp+0x22>
8016dc8: 4b3c ldr r3, [pc, #240] @ (8016ebc <recv_tcp+0x108>)
8016dca: f44f 7296 mov.w r2, #300 @ 0x12c
8016dce: 493c ldr r1, [pc, #240] @ (8016ec0 <recv_tcp+0x10c>)
8016dd0: 483c ldr r0, [pc, #240] @ (8016ec4 <recv_tcp+0x110>)
8016dd2: f013 fe2b bl 802aa2c <iprintf>
LWIP_ASSERT("recv_tcp must have an argument", arg != NULL);
8016dd6: 68fb ldr r3, [r7, #12]
8016dd8: 2b00 cmp r3, #0
8016dda: d106 bne.n 8016dea <recv_tcp+0x36>
8016ddc: 4b37 ldr r3, [pc, #220] @ (8016ebc <recv_tcp+0x108>)
8016dde: f240 122d movw r2, #301 @ 0x12d
8016de2: 4939 ldr r1, [pc, #228] @ (8016ec8 <recv_tcp+0x114>)
8016de4: 4837 ldr r0, [pc, #220] @ (8016ec4 <recv_tcp+0x110>)
8016de6: f013 fe21 bl 802aa2c <iprintf>
LWIP_ASSERT("err != ERR_OK unhandled", err == ERR_OK);
8016dea: f997 3003 ldrsb.w r3, [r7, #3]
8016dee: 2b00 cmp r3, #0
8016df0: d006 beq.n 8016e00 <recv_tcp+0x4c>
8016df2: 4b32 ldr r3, [pc, #200] @ (8016ebc <recv_tcp+0x108>)
8016df4: f44f 7297 mov.w r2, #302 @ 0x12e
8016df8: 4934 ldr r1, [pc, #208] @ (8016ecc <recv_tcp+0x118>)
8016dfa: 4832 ldr r0, [pc, #200] @ (8016ec4 <recv_tcp+0x110>)
8016dfc: f013 fe16 bl 802aa2c <iprintf>
LWIP_UNUSED_ARG(err); /* for LWIP_NOASSERT */
conn = (struct netconn *)arg;
8016e00: 68fb ldr r3, [r7, #12]
8016e02: 617b str r3, [r7, #20]
if (conn == NULL) {
8016e04: 697b ldr r3, [r7, #20]
8016e06: 2b00 cmp r3, #0
8016e08: d102 bne.n 8016e10 <recv_tcp+0x5c>
return ERR_VAL;
8016e0a: f06f 0305 mvn.w r3, #5
8016e0e: e051 b.n 8016eb4 <recv_tcp+0x100>
}
LWIP_ASSERT("recv_tcp: recv for wrong pcb!", conn->pcb.tcp == pcb);
8016e10: 697b ldr r3, [r7, #20]
8016e12: 685b ldr r3, [r3, #4]
8016e14: 68ba ldr r2, [r7, #8]
8016e16: 429a cmp r2, r3
8016e18: d006 beq.n 8016e28 <recv_tcp+0x74>
8016e1a: 4b28 ldr r3, [pc, #160] @ (8016ebc <recv_tcp+0x108>)
8016e1c: f240 1235 movw r2, #309 @ 0x135
8016e20: 492b ldr r1, [pc, #172] @ (8016ed0 <recv_tcp+0x11c>)
8016e22: 4828 ldr r0, [pc, #160] @ (8016ec4 <recv_tcp+0x110>)
8016e24: f013 fe02 bl 802aa2c <iprintf>
if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
8016e28: 697b ldr r3, [r7, #20]
8016e2a: 3310 adds r3, #16
8016e2c: 4618 mov r0, r3
8016e2e: f010 fa5d bl 80272ec <sys_mbox_valid>
8016e32: 4603 mov r3, r0
8016e34: 2b00 cmp r3, #0
8016e36: d10d bne.n 8016e54 <recv_tcp+0xa0>
/* recvmbox already deleted */
if (p != NULL) {
8016e38: 687b ldr r3, [r7, #4]
8016e3a: 2b00 cmp r3, #0
8016e3c: d008 beq.n 8016e50 <recv_tcp+0x9c>
tcp_recved(pcb, p->tot_len);
8016e3e: 687b ldr r3, [r7, #4]
8016e40: 891b ldrh r3, [r3, #8]
8016e42: 4619 mov r1, r3
8016e44: 68b8 ldr r0, [r7, #8]
8016e46: f005 f9e5 bl 801c214 <tcp_recved>
pbuf_free(p);
8016e4a: 6878 ldr r0, [r7, #4]
8016e4c: f004 fb76 bl 801b53c <pbuf_free>
}
return ERR_OK;
8016e50: 2300 movs r3, #0
8016e52: e02f b.n 8016eb4 <recv_tcp+0x100>
}
/* Unlike for UDP or RAW pcbs, don't check for available space
using recv_avail since that could break the connection
(data is already ACKed) */
if (p != NULL) {
8016e54: 687b ldr r3, [r7, #4]
8016e56: 2b00 cmp r3, #0
8016e58: d005 beq.n 8016e66 <recv_tcp+0xb2>
msg = p;
8016e5a: 687b ldr r3, [r7, #4]
8016e5c: 61bb str r3, [r7, #24]
len = p->tot_len;
8016e5e: 687b ldr r3, [r7, #4]
8016e60: 891b ldrh r3, [r3, #8]
8016e62: 83fb strh r3, [r7, #30]
8016e64: e003 b.n 8016e6e <recv_tcp+0xba>
} else {
msg = LWIP_CONST_CAST(void *, &netconn_closed);
8016e66: 4b1b ldr r3, [pc, #108] @ (8016ed4 <recv_tcp+0x120>)
8016e68: 61bb str r3, [r7, #24]
len = 0;
8016e6a: 2300 movs r3, #0
8016e6c: 83fb strh r3, [r7, #30]
}
if (sys_mbox_trypost(&conn->recvmbox, msg) != ERR_OK) {
8016e6e: 697b ldr r3, [r7, #20]
8016e70: 3310 adds r3, #16
8016e72: 69b9 ldr r1, [r7, #24]
8016e74: 4618 mov r0, r3
8016e76: f010 f9d7 bl 8027228 <sys_mbox_trypost>
8016e7a: 4603 mov r3, r0
8016e7c: 2b00 cmp r3, #0
8016e7e: d002 beq.n 8016e86 <recv_tcp+0xd2>
/* don't deallocate p: it is presented to us later again from tcp_fasttmr! */
return ERR_MEM;
8016e80: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8016e84: e016 b.n 8016eb4 <recv_tcp+0x100>
} else {
#if LWIP_SO_RCVBUF
SYS_ARCH_INC(conn->recv_avail, len);
8016e86: f010 fb3b bl 8027500 <sys_arch_protect>
8016e8a: 6138 str r0, [r7, #16]
8016e8c: 697b ldr r3, [r7, #20]
8016e8e: 6a5a ldr r2, [r3, #36] @ 0x24
8016e90: 8bfb ldrh r3, [r7, #30]
8016e92: 441a add r2, r3
8016e94: 697b ldr r3, [r7, #20]
8016e96: 625a str r2, [r3, #36] @ 0x24
8016e98: 6938 ldr r0, [r7, #16]
8016e9a: f010 fb3f bl 802751c <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
/* Register event with callback */
API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
8016e9e: 697b ldr r3, [r7, #20]
8016ea0: 6b1b ldr r3, [r3, #48] @ 0x30
8016ea2: 2b00 cmp r3, #0
8016ea4: d005 beq.n 8016eb2 <recv_tcp+0xfe>
8016ea6: 697b ldr r3, [r7, #20]
8016ea8: 6b1b ldr r3, [r3, #48] @ 0x30
8016eaa: 8bfa ldrh r2, [r7, #30]
8016eac: 2100 movs r1, #0
8016eae: 6978 ldr r0, [r7, #20]
8016eb0: 4798 blx r3
}
return ERR_OK;
8016eb2: 2300 movs r3, #0
}
8016eb4: 4618 mov r0, r3
8016eb6: 3720 adds r7, #32
8016eb8: 46bd mov sp, r7
8016eba: bd80 pop {r7, pc}
8016ebc: 0802e124 .word 0x0802e124
8016ec0: 0802e200 .word 0x0802e200
8016ec4: 0802e168 .word 0x0802e168
8016ec8: 0802e224 .word 0x0802e224
8016ecc: 0802e244 .word 0x0802e244
8016ed0: 0802e25c .word 0x0802e25c
8016ed4: 08031d2e .word 0x08031d2e
08016ed8 <poll_tcp>:
*
* @see tcp.h (struct tcp_pcb.poll) for parameters and return value
*/
static err_t
poll_tcp(void *arg, struct tcp_pcb *pcb)
{
8016ed8: b580 push {r7, lr}
8016eda: b084 sub sp, #16
8016edc: af00 add r7, sp, #0
8016ede: 6078 str r0, [r7, #4]
8016ee0: 6039 str r1, [r7, #0]
struct netconn *conn = (struct netconn *)arg;
8016ee2: 687b ldr r3, [r7, #4]
8016ee4: 60fb str r3, [r7, #12]
LWIP_UNUSED_ARG(pcb);
LWIP_ASSERT("conn != NULL", (conn != NULL));
8016ee6: 68fb ldr r3, [r7, #12]
8016ee8: 2b00 cmp r3, #0
8016eea: d106 bne.n 8016efa <poll_tcp+0x22>
8016eec: 4b2b ldr r3, [pc, #172] @ (8016f9c <poll_tcp+0xc4>)
8016eee: f44f 72b5 mov.w r2, #362 @ 0x16a
8016ef2: 492b ldr r1, [pc, #172] @ (8016fa0 <poll_tcp+0xc8>)
8016ef4: 482b ldr r0, [pc, #172] @ (8016fa4 <poll_tcp+0xcc>)
8016ef6: f013 fd99 bl 802aa2c <iprintf>
if (conn->state == NETCONN_WRITE) {
8016efa: 68fb ldr r3, [r7, #12]
8016efc: 785b ldrb r3, [r3, #1]
8016efe: 2b01 cmp r3, #1
8016f00: d104 bne.n 8016f0c <poll_tcp+0x34>
lwip_netconn_do_writemore(conn WRITE_DELAYED);
8016f02: 2101 movs r1, #1
8016f04: 68f8 ldr r0, [r7, #12]
8016f06: f000 ffab bl 8017e60 <lwip_netconn_do_writemore>
8016f0a: e016 b.n 8016f3a <poll_tcp+0x62>
} else if (conn->state == NETCONN_CLOSE) {
8016f0c: 68fb ldr r3, [r7, #12]
8016f0e: 785b ldrb r3, [r3, #1]
8016f10: 2b04 cmp r3, #4
8016f12: d112 bne.n 8016f3a <poll_tcp+0x62>
#if !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER
if (conn->current_msg && conn->current_msg->msg.sd.polls_left) {
8016f14: 68fb ldr r3, [r7, #12]
8016f16: 6adb ldr r3, [r3, #44] @ 0x2c
8016f18: 2b00 cmp r3, #0
8016f1a: d00a beq.n 8016f32 <poll_tcp+0x5a>
8016f1c: 68fb ldr r3, [r7, #12]
8016f1e: 6adb ldr r3, [r3, #44] @ 0x2c
8016f20: 7a5b ldrb r3, [r3, #9]
8016f22: 2b00 cmp r3, #0
8016f24: d005 beq.n 8016f32 <poll_tcp+0x5a>
conn->current_msg->msg.sd.polls_left--;
8016f26: 68fb ldr r3, [r7, #12]
8016f28: 6adb ldr r3, [r3, #44] @ 0x2c
8016f2a: 7a5a ldrb r2, [r3, #9]
8016f2c: 3a01 subs r2, #1
8016f2e: b2d2 uxtb r2, r2
8016f30: 725a strb r2, [r3, #9]
}
#endif /* !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER */
lwip_netconn_do_close_internal(conn WRITE_DELAYED);
8016f32: 2101 movs r1, #1
8016f34: 68f8 ldr r0, [r7, #12]
8016f36: f000 fb53 bl 80175e0 <lwip_netconn_do_close_internal>
}
/* @todo: implement connect timeout here? */
/* Did a nonblocking write fail before? Then check available write-space. */
if (conn->flags & NETCONN_FLAG_CHECK_WRITESPACE) {
8016f3a: 68fb ldr r3, [r7, #12]
8016f3c: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8016f40: f003 0310 and.w r3, r3, #16
8016f44: 2b00 cmp r3, #0
8016f46: d024 beq.n 8016f92 <poll_tcp+0xba>
/* If the queued byte- or pbuf-count drops below the configured low-water limit,
let select mark this pcb as writable again. */
if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
8016f48: 68fb ldr r3, [r7, #12]
8016f4a: 685b ldr r3, [r3, #4]
8016f4c: 2b00 cmp r3, #0
8016f4e: d020 beq.n 8016f92 <poll_tcp+0xba>
8016f50: 68fb ldr r3, [r7, #12]
8016f52: 685b ldr r3, [r3, #4]
8016f54: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
8016f58: f640 3269 movw r2, #2921 @ 0xb69
8016f5c: 4293 cmp r3, r2
8016f5e: d918 bls.n 8016f92 <poll_tcp+0xba>
(tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
8016f60: 68fb ldr r3, [r7, #12]
8016f62: 685b ldr r3, [r3, #4]
8016f64: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
8016f68: 2b07 cmp r3, #7
8016f6a: d812 bhi.n 8016f92 <poll_tcp+0xba>
netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
8016f6c: 68fb ldr r3, [r7, #12]
8016f6e: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8016f72: f023 0310 bic.w r3, r3, #16
8016f76: b2da uxtb r2, r3
8016f78: 68fb ldr r3, [r7, #12]
8016f7a: f883 2028 strb.w r2, [r3, #40] @ 0x28
API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
8016f7e: 68fb ldr r3, [r7, #12]
8016f80: 6b1b ldr r3, [r3, #48] @ 0x30
8016f82: 2b00 cmp r3, #0
8016f84: d005 beq.n 8016f92 <poll_tcp+0xba>
8016f86: 68fb ldr r3, [r7, #12]
8016f88: 6b1b ldr r3, [r3, #48] @ 0x30
8016f8a: 2200 movs r2, #0
8016f8c: 2102 movs r1, #2
8016f8e: 68f8 ldr r0, [r7, #12]
8016f90: 4798 blx r3
}
}
return ERR_OK;
8016f92: 2300 movs r3, #0
}
8016f94: 4618 mov r0, r3
8016f96: 3710 adds r7, #16
8016f98: 46bd mov sp, r7
8016f9a: bd80 pop {r7, pc}
8016f9c: 0802e124 .word 0x0802e124
8016fa0: 0802e27c .word 0x0802e27c
8016fa4: 0802e168 .word 0x0802e168
08016fa8 <sent_tcp>:
*
* @see tcp.h (struct tcp_pcb.sent) for parameters and return value
*/
static err_t
sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len)
{
8016fa8: b580 push {r7, lr}
8016faa: b086 sub sp, #24
8016fac: af00 add r7, sp, #0
8016fae: 60f8 str r0, [r7, #12]
8016fb0: 60b9 str r1, [r7, #8]
8016fb2: 4613 mov r3, r2
8016fb4: 80fb strh r3, [r7, #6]
struct netconn *conn = (struct netconn *)arg;
8016fb6: 68fb ldr r3, [r7, #12]
8016fb8: 617b str r3, [r7, #20]
LWIP_UNUSED_ARG(pcb);
LWIP_ASSERT("conn != NULL", (conn != NULL));
8016fba: 697b ldr r3, [r7, #20]
8016fbc: 2b00 cmp r3, #0
8016fbe: d106 bne.n 8016fce <sent_tcp+0x26>
8016fc0: 4b22 ldr r3, [pc, #136] @ (801704c <sent_tcp+0xa4>)
8016fc2: f240 1293 movw r2, #403 @ 0x193
8016fc6: 4922 ldr r1, [pc, #136] @ (8017050 <sent_tcp+0xa8>)
8016fc8: 4822 ldr r0, [pc, #136] @ (8017054 <sent_tcp+0xac>)
8016fca: f013 fd2f bl 802aa2c <iprintf>
if (conn) {
8016fce: 697b ldr r3, [r7, #20]
8016fd0: 2b00 cmp r3, #0
8016fd2: d035 beq.n 8017040 <sent_tcp+0x98>
if (conn->state == NETCONN_WRITE) {
8016fd4: 697b ldr r3, [r7, #20]
8016fd6: 785b ldrb r3, [r3, #1]
8016fd8: 2b01 cmp r3, #1
8016fda: d104 bne.n 8016fe6 <sent_tcp+0x3e>
lwip_netconn_do_writemore(conn WRITE_DELAYED);
8016fdc: 2101 movs r1, #1
8016fde: 6978 ldr r0, [r7, #20]
8016fe0: f000 ff3e bl 8017e60 <lwip_netconn_do_writemore>
8016fe4: e007 b.n 8016ff6 <sent_tcp+0x4e>
} else if (conn->state == NETCONN_CLOSE) {
8016fe6: 697b ldr r3, [r7, #20]
8016fe8: 785b ldrb r3, [r3, #1]
8016fea: 2b04 cmp r3, #4
8016fec: d103 bne.n 8016ff6 <sent_tcp+0x4e>
lwip_netconn_do_close_internal(conn WRITE_DELAYED);
8016fee: 2101 movs r1, #1
8016ff0: 6978 ldr r0, [r7, #20]
8016ff2: f000 faf5 bl 80175e0 <lwip_netconn_do_close_internal>
}
/* If the queued byte- or pbuf-count drops below the configured low-water limit,
let select mark this pcb as writable again. */
if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
8016ff6: 697b ldr r3, [r7, #20]
8016ff8: 685b ldr r3, [r3, #4]
8016ffa: 2b00 cmp r3, #0
8016ffc: d020 beq.n 8017040 <sent_tcp+0x98>
8016ffe: 697b ldr r3, [r7, #20]
8017000: 685b ldr r3, [r3, #4]
8017002: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
8017006: f640 3269 movw r2, #2921 @ 0xb69
801700a: 4293 cmp r3, r2
801700c: d918 bls.n 8017040 <sent_tcp+0x98>
(tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
801700e: 697b ldr r3, [r7, #20]
8017010: 685b ldr r3, [r3, #4]
8017012: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
8017016: 2b07 cmp r3, #7
8017018: d812 bhi.n 8017040 <sent_tcp+0x98>
netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
801701a: 697b ldr r3, [r7, #20]
801701c: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8017020: f023 0310 bic.w r3, r3, #16
8017024: b2da uxtb r2, r3
8017026: 697b ldr r3, [r7, #20]
8017028: f883 2028 strb.w r2, [r3, #40] @ 0x28
API_EVENT(conn, NETCONN_EVT_SENDPLUS, len);
801702c: 697b ldr r3, [r7, #20]
801702e: 6b1b ldr r3, [r3, #48] @ 0x30
8017030: 2b00 cmp r3, #0
8017032: d005 beq.n 8017040 <sent_tcp+0x98>
8017034: 697b ldr r3, [r7, #20]
8017036: 6b1b ldr r3, [r3, #48] @ 0x30
8017038: 88fa ldrh r2, [r7, #6]
801703a: 2102 movs r1, #2
801703c: 6978 ldr r0, [r7, #20]
801703e: 4798 blx r3
}
}
return ERR_OK;
8017040: 2300 movs r3, #0
}
8017042: 4618 mov r0, r3
8017044: 3718 adds r7, #24
8017046: 46bd mov sp, r7
8017048: bd80 pop {r7, pc}
801704a: bf00 nop
801704c: 0802e124 .word 0x0802e124
8017050: 0802e27c .word 0x0802e27c
8017054: 0802e168 .word 0x0802e168
08017058 <err_tcp>:
*
* @see tcp.h (struct tcp_pcb.err) for parameters
*/
static void
err_tcp(void *arg, err_t err)
{
8017058: b580 push {r7, lr}
801705a: b088 sub sp, #32
801705c: af00 add r7, sp, #0
801705e: 6078 str r0, [r7, #4]
8017060: 460b mov r3, r1
8017062: 70fb strb r3, [r7, #3]
struct netconn *conn;
enum netconn_state old_state;
void *mbox_msg;
SYS_ARCH_DECL_PROTECT(lev);
conn = (struct netconn *)arg;
8017064: 687b ldr r3, [r7, #4]
8017066: 61fb str r3, [r7, #28]
LWIP_ASSERT("conn != NULL", (conn != NULL));
8017068: 69fb ldr r3, [r7, #28]
801706a: 2b00 cmp r3, #0
801706c: d106 bne.n 801707c <err_tcp+0x24>
801706e: 4b61 ldr r3, [pc, #388] @ (80171f4 <err_tcp+0x19c>)
8017070: f44f 72dc mov.w r2, #440 @ 0x1b8
8017074: 4960 ldr r1, [pc, #384] @ (80171f8 <err_tcp+0x1a0>)
8017076: 4861 ldr r0, [pc, #388] @ (80171fc <err_tcp+0x1a4>)
8017078: f013 fcd8 bl 802aa2c <iprintf>
SYS_ARCH_PROTECT(lev);
801707c: f010 fa40 bl 8027500 <sys_arch_protect>
8017080: 61b8 str r0, [r7, #24]
/* when err is called, the pcb is deallocated, so delete the reference */
conn->pcb.tcp = NULL;
8017082: 69fb ldr r3, [r7, #28]
8017084: 2200 movs r2, #0
8017086: 605a str r2, [r3, #4]
/* store pending error */
conn->pending_err = err;
8017088: 69fb ldr r3, [r7, #28]
801708a: 78fa ldrb r2, [r7, #3]
801708c: 721a strb r2, [r3, #8]
/* prevent application threads from blocking on 'recvmbox'/'acceptmbox' */
conn->flags |= NETCONN_FLAG_MBOXCLOSED;
801708e: 69fb ldr r3, [r7, #28]
8017090: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8017094: f043 0301 orr.w r3, r3, #1
8017098: b2da uxtb r2, r3
801709a: 69fb ldr r3, [r7, #28]
801709c: f883 2028 strb.w r2, [r3, #40] @ 0x28
/* reset conn->state now before waking up other threads */
old_state = conn->state;
80170a0: 69fb ldr r3, [r7, #28]
80170a2: 785b ldrb r3, [r3, #1]
80170a4: 75fb strb r3, [r7, #23]
conn->state = NETCONN_NONE;
80170a6: 69fb ldr r3, [r7, #28]
80170a8: 2200 movs r2, #0
80170aa: 705a strb r2, [r3, #1]
SYS_ARCH_UNPROTECT(lev);
80170ac: 69b8 ldr r0, [r7, #24]
80170ae: f010 fa35 bl 802751c <sys_arch_unprotect>
/* Notify the user layer about a connection error. Used to signal select. */
API_EVENT(conn, NETCONN_EVT_ERROR, 0);
80170b2: 69fb ldr r3, [r7, #28]
80170b4: 6b1b ldr r3, [r3, #48] @ 0x30
80170b6: 2b00 cmp r3, #0
80170b8: d005 beq.n 80170c6 <err_tcp+0x6e>
80170ba: 69fb ldr r3, [r7, #28]
80170bc: 6b1b ldr r3, [r3, #48] @ 0x30
80170be: 2200 movs r2, #0
80170c0: 2104 movs r1, #4
80170c2: 69f8 ldr r0, [r7, #28]
80170c4: 4798 blx r3
/* Try to release selects pending on 'read' or 'write', too.
They will get an error if they actually try to read or write. */
API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
80170c6: 69fb ldr r3, [r7, #28]
80170c8: 6b1b ldr r3, [r3, #48] @ 0x30
80170ca: 2b00 cmp r3, #0
80170cc: d005 beq.n 80170da <err_tcp+0x82>
80170ce: 69fb ldr r3, [r7, #28]
80170d0: 6b1b ldr r3, [r3, #48] @ 0x30
80170d2: 2200 movs r2, #0
80170d4: 2100 movs r1, #0
80170d6: 69f8 ldr r0, [r7, #28]
80170d8: 4798 blx r3
API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
80170da: 69fb ldr r3, [r7, #28]
80170dc: 6b1b ldr r3, [r3, #48] @ 0x30
80170de: 2b00 cmp r3, #0
80170e0: d005 beq.n 80170ee <err_tcp+0x96>
80170e2: 69fb ldr r3, [r7, #28]
80170e4: 6b1b ldr r3, [r3, #48] @ 0x30
80170e6: 2200 movs r2, #0
80170e8: 2102 movs r1, #2
80170ea: 69f8 ldr r0, [r7, #28]
80170ec: 4798 blx r3
mbox_msg = lwip_netconn_err_to_msg(err);
80170ee: f997 3003 ldrsb.w r3, [r7, #3]
80170f2: 4618 mov r0, r3
80170f4: f7ff fd52 bl 8016b9c <lwip_netconn_err_to_msg>
80170f8: 6138 str r0, [r7, #16]
/* pass error message to recvmbox to wake up pending recv */
if (NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
80170fa: 69fb ldr r3, [r7, #28]
80170fc: 3310 adds r3, #16
80170fe: 4618 mov r0, r3
8017100: f010 f8f4 bl 80272ec <sys_mbox_valid>
8017104: 4603 mov r3, r0
8017106: 2b00 cmp r3, #0
8017108: d005 beq.n 8017116 <err_tcp+0xbe>
/* use trypost to prevent deadlock */
sys_mbox_trypost(&conn->recvmbox, mbox_msg);
801710a: 69fb ldr r3, [r7, #28]
801710c: 3310 adds r3, #16
801710e: 6939 ldr r1, [r7, #16]
8017110: 4618 mov r0, r3
8017112: f010 f889 bl 8027228 <sys_mbox_trypost>
}
/* pass error message to acceptmbox to wake up pending accept */
if (NETCONN_MBOX_VALID(conn, &conn->acceptmbox)) {
8017116: 69fb ldr r3, [r7, #28]
8017118: 3314 adds r3, #20
801711a: 4618 mov r0, r3
801711c: f010 f8e6 bl 80272ec <sys_mbox_valid>
8017120: 4603 mov r3, r0
8017122: 2b00 cmp r3, #0
8017124: d005 beq.n 8017132 <err_tcp+0xda>
/* use trypost to preven deadlock */
sys_mbox_trypost(&conn->acceptmbox, mbox_msg);
8017126: 69fb ldr r3, [r7, #28]
8017128: 3314 adds r3, #20
801712a: 6939 ldr r1, [r7, #16]
801712c: 4618 mov r0, r3
801712e: f010 f87b bl 8027228 <sys_mbox_trypost>
}
if ((old_state == NETCONN_WRITE) || (old_state == NETCONN_CLOSE) ||
8017132: 7dfb ldrb r3, [r7, #23]
8017134: 2b01 cmp r3, #1
8017136: d005 beq.n 8017144 <err_tcp+0xec>
8017138: 7dfb ldrb r3, [r7, #23]
801713a: 2b04 cmp r3, #4
801713c: d002 beq.n 8017144 <err_tcp+0xec>
801713e: 7dfb ldrb r3, [r7, #23]
8017140: 2b03 cmp r3, #3
8017142: d146 bne.n 80171d2 <err_tcp+0x17a>
(old_state == NETCONN_CONNECT)) {
/* calling lwip_netconn_do_writemore/lwip_netconn_do_close_internal is not necessary
since the pcb has already been deleted! */
int was_nonblocking_connect = IN_NONBLOCKING_CONNECT(conn);
8017144: 69fb ldr r3, [r7, #28]
8017146: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
801714a: f003 0304 and.w r3, r3, #4
801714e: 2b00 cmp r3, #0
8017150: bf14 ite ne
8017152: 2301 movne r3, #1
8017154: 2300 moveq r3, #0
8017156: b2db uxtb r3, r3
8017158: 60fb str r3, [r7, #12]
SET_NONBLOCKING_CONNECT(conn, 0);
801715a: 69fb ldr r3, [r7, #28]
801715c: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8017160: f023 0304 bic.w r3, r3, #4
8017164: b2da uxtb r2, r3
8017166: 69fb ldr r3, [r7, #28]
8017168: f883 2028 strb.w r2, [r3, #40] @ 0x28
if (!was_nonblocking_connect) {
801716c: 68fb ldr r3, [r7, #12]
801716e: 2b00 cmp r3, #0
8017170: d13b bne.n 80171ea <err_tcp+0x192>
sys_sem_t *op_completed_sem;
/* set error return code */
LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
8017172: 69fb ldr r3, [r7, #28]
8017174: 6adb ldr r3, [r3, #44] @ 0x2c
8017176: 2b00 cmp r3, #0
8017178: d106 bne.n 8017188 <err_tcp+0x130>
801717a: 4b1e ldr r3, [pc, #120] @ (80171f4 <err_tcp+0x19c>)
801717c: f44f 72f3 mov.w r2, #486 @ 0x1e6
8017180: 491f ldr r1, [pc, #124] @ (8017200 <err_tcp+0x1a8>)
8017182: 481e ldr r0, [pc, #120] @ (80171fc <err_tcp+0x1a4>)
8017184: f013 fc52 bl 802aa2c <iprintf>
if (old_state == NETCONN_CLOSE) {
8017188: 7dfb ldrb r3, [r7, #23]
801718a: 2b04 cmp r3, #4
801718c: d104 bne.n 8017198 <err_tcp+0x140>
/* let close succeed: the connection is closed after all... */
conn->current_msg->err = ERR_OK;
801718e: 69fb ldr r3, [r7, #28]
8017190: 6adb ldr r3, [r3, #44] @ 0x2c
8017192: 2200 movs r2, #0
8017194: 711a strb r2, [r3, #4]
8017196: e003 b.n 80171a0 <err_tcp+0x148>
} else {
/* Write and connect fail */
conn->current_msg->err = err;
8017198: 69fb ldr r3, [r7, #28]
801719a: 6adb ldr r3, [r3, #44] @ 0x2c
801719c: 78fa ldrb r2, [r7, #3]
801719e: 711a strb r2, [r3, #4]
}
op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
80171a0: 69fb ldr r3, [r7, #28]
80171a2: 6adb ldr r3, [r3, #44] @ 0x2c
80171a4: 681b ldr r3, [r3, #0]
80171a6: 330c adds r3, #12
80171a8: 60bb str r3, [r7, #8]
LWIP_ASSERT("inavlid op_completed_sem", sys_sem_valid(op_completed_sem));
80171aa: 68b8 ldr r0, [r7, #8]
80171ac: f010 f92c bl 8027408 <sys_sem_valid>
80171b0: 4603 mov r3, r0
80171b2: 2b00 cmp r3, #0
80171b4: d106 bne.n 80171c4 <err_tcp+0x16c>
80171b6: 4b0f ldr r3, [pc, #60] @ (80171f4 <err_tcp+0x19c>)
80171b8: f240 12ef movw r2, #495 @ 0x1ef
80171bc: 4911 ldr r1, [pc, #68] @ (8017204 <err_tcp+0x1ac>)
80171be: 480f ldr r0, [pc, #60] @ (80171fc <err_tcp+0x1a4>)
80171c0: f013 fc34 bl 802aa2c <iprintf>
conn->current_msg = NULL;
80171c4: 69fb ldr r3, [r7, #28]
80171c6: 2200 movs r2, #0
80171c8: 62da str r2, [r3, #44] @ 0x2c
/* wake up the waiting task */
sys_sem_signal(op_completed_sem);
80171ca: 68b8 ldr r0, [r7, #8]
80171cc: f010 f902 bl 80273d4 <sys_sem_signal>
(old_state == NETCONN_CONNECT)) {
80171d0: e00b b.n 80171ea <err_tcp+0x192>
} else {
/* @todo: test what happens for error on nonblocking connect */
}
} else {
LWIP_ASSERT("conn->current_msg == NULL", conn->current_msg == NULL);
80171d2: 69fb ldr r3, [r7, #28]
80171d4: 6adb ldr r3, [r3, #44] @ 0x2c
80171d6: 2b00 cmp r3, #0
80171d8: d008 beq.n 80171ec <err_tcp+0x194>
80171da: 4b06 ldr r3, [pc, #24] @ (80171f4 <err_tcp+0x19c>)
80171dc: f240 12f7 movw r2, #503 @ 0x1f7
80171e0: 4909 ldr r1, [pc, #36] @ (8017208 <err_tcp+0x1b0>)
80171e2: 4806 ldr r0, [pc, #24] @ (80171fc <err_tcp+0x1a4>)
80171e4: f013 fc22 bl 802aa2c <iprintf>
}
}
80171e8: e000 b.n 80171ec <err_tcp+0x194>
(old_state == NETCONN_CONNECT)) {
80171ea: bf00 nop
}
80171ec: bf00 nop
80171ee: 3720 adds r7, #32
80171f0: 46bd mov sp, r7
80171f2: bd80 pop {r7, pc}
80171f4: 0802e124 .word 0x0802e124
80171f8: 0802e27c .word 0x0802e27c
80171fc: 0802e168 .word 0x0802e168
8017200: 0802e28c .word 0x0802e28c
8017204: 0802e2a8 .word 0x0802e2a8
8017208: 0802e2c4 .word 0x0802e2c4
0801720c <setup_tcp>:
*
* @param conn the TCP netconn to setup
*/
static void
setup_tcp(struct netconn *conn)
{
801720c: b580 push {r7, lr}
801720e: b084 sub sp, #16
8017210: af00 add r7, sp, #0
8017212: 6078 str r0, [r7, #4]
struct tcp_pcb *pcb;
pcb = conn->pcb.tcp;
8017214: 687b ldr r3, [r7, #4]
8017216: 685b ldr r3, [r3, #4]
8017218: 60fb str r3, [r7, #12]
tcp_arg(pcb, conn);
801721a: 6879 ldr r1, [r7, #4]
801721c: 68f8 ldr r0, [r7, #12]
801721e: f005 ffe3 bl 801d1e8 <tcp_arg>
tcp_recv(pcb, recv_tcp);
8017222: 490a ldr r1, [pc, #40] @ (801724c <setup_tcp+0x40>)
8017224: 68f8 ldr r0, [r7, #12]
8017226: f005 fff1 bl 801d20c <tcp_recv>
tcp_sent(pcb, sent_tcp);
801722a: 4909 ldr r1, [pc, #36] @ (8017250 <setup_tcp+0x44>)
801722c: 68f8 ldr r0, [r7, #12]
801722e: f006 f811 bl 801d254 <tcp_sent>
tcp_poll(pcb, poll_tcp, NETCONN_TCP_POLL_INTERVAL);
8017232: 2202 movs r2, #2
8017234: 4907 ldr r1, [pc, #28] @ (8017254 <setup_tcp+0x48>)
8017236: 68f8 ldr r0, [r7, #12]
8017238: f006 f86c bl 801d314 <tcp_poll>
tcp_err(pcb, err_tcp);
801723c: 4906 ldr r1, [pc, #24] @ (8017258 <setup_tcp+0x4c>)
801723e: 68f8 ldr r0, [r7, #12]
8017240: f006 f82c bl 801d29c <tcp_err>
}
8017244: bf00 nop
8017246: 3710 adds r7, #16
8017248: 46bd mov sp, r7
801724a: bd80 pop {r7, pc}
801724c: 08016db5 .word 0x08016db5
8017250: 08016fa9 .word 0x08016fa9
8017254: 08016ed9 .word 0x08016ed9
8017258: 08017059 .word 0x08017059
0801725c <pcb_new>:
*
* @param msg the api_msg describing the connection type
*/
static void
pcb_new(struct api_msg *msg)
{
801725c: b590 push {r4, r7, lr}
801725e: b085 sub sp, #20
8017260: af00 add r7, sp, #0
8017262: 6078 str r0, [r7, #4]
enum lwip_ip_addr_type iptype = IPADDR_TYPE_V4;
8017264: 2300 movs r3, #0
8017266: 73fb strb r3, [r7, #15]
LWIP_ASSERT("pcb_new: pcb already allocated", msg->conn->pcb.tcp == NULL);
8017268: 687b ldr r3, [r7, #4]
801726a: 681b ldr r3, [r3, #0]
801726c: 685b ldr r3, [r3, #4]
801726e: 2b00 cmp r3, #0
8017270: d006 beq.n 8017280 <pcb_new+0x24>
8017272: 4b2b ldr r3, [pc, #172] @ (8017320 <pcb_new+0xc4>)
8017274: f240 2265 movw r2, #613 @ 0x265
8017278: 492a ldr r1, [pc, #168] @ (8017324 <pcb_new+0xc8>)
801727a: 482b ldr r0, [pc, #172] @ (8017328 <pcb_new+0xcc>)
801727c: f013 fbd6 bl 802aa2c <iprintf>
iptype = IPADDR_TYPE_ANY;
}
#endif
/* Allocate a PCB for this connection */
switch (NETCONNTYPE_GROUP(msg->conn->type)) {
8017280: 687b ldr r3, [r7, #4]
8017282: 681b ldr r3, [r3, #0]
8017284: 781b ldrb r3, [r3, #0]
8017286: f003 03f0 and.w r3, r3, #240 @ 0xf0
801728a: 2b10 cmp r3, #16
801728c: d022 beq.n 80172d4 <pcb_new+0x78>
801728e: 2b20 cmp r3, #32
8017290: d133 bne.n 80172fa <pcb_new+0x9e>
}
break;
#endif /* LWIP_RAW */
#if LWIP_UDP
case NETCONN_UDP:
msg->conn->pcb.udp = udp_new_ip_type(iptype);
8017292: 687b ldr r3, [r7, #4]
8017294: 681c ldr r4, [r3, #0]
8017296: 7bfb ldrb r3, [r7, #15]
8017298: 4618 mov r0, r3
801729a: f00b fb94 bl 80229c6 <udp_new_ip_type>
801729e: 4603 mov r3, r0
80172a0: 6063 str r3, [r4, #4]
if (msg->conn->pcb.udp != NULL) {
80172a2: 687b ldr r3, [r7, #4]
80172a4: 681b ldr r3, [r3, #0]
80172a6: 685b ldr r3, [r3, #4]
80172a8: 2b00 cmp r3, #0
80172aa: d02a beq.n 8017302 <pcb_new+0xa6>
#if LWIP_UDPLITE
if (NETCONNTYPE_ISUDPLITE(msg->conn->type)) {
udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE);
}
#endif /* LWIP_UDPLITE */
if (NETCONNTYPE_ISUDPNOCHKSUM(msg->conn->type)) {
80172ac: 687b ldr r3, [r7, #4]
80172ae: 681b ldr r3, [r3, #0]
80172b0: 781b ldrb r3, [r3, #0]
80172b2: 2b22 cmp r3, #34 @ 0x22
80172b4: d104 bne.n 80172c0 <pcb_new+0x64>
udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM);
80172b6: 687b ldr r3, [r7, #4]
80172b8: 681b ldr r3, [r3, #0]
80172ba: 685b ldr r3, [r3, #4]
80172bc: 2201 movs r2, #1
80172be: 741a strb r2, [r3, #16]
}
udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn);
80172c0: 687b ldr r3, [r7, #4]
80172c2: 681b ldr r3, [r3, #0]
80172c4: 6858 ldr r0, [r3, #4]
80172c6: 687b ldr r3, [r7, #4]
80172c8: 681b ldr r3, [r3, #0]
80172ca: 461a mov r2, r3
80172cc: 4917 ldr r1, [pc, #92] @ (801732c <pcb_new+0xd0>)
80172ce: f00b fafb bl 80228c8 <udp_recv>
}
break;
80172d2: e016 b.n 8017302 <pcb_new+0xa6>
#endif /* LWIP_UDP */
#if LWIP_TCP
case NETCONN_TCP:
msg->conn->pcb.tcp = tcp_new_ip_type(iptype);
80172d4: 687b ldr r3, [r7, #4]
80172d6: 681c ldr r4, [r3, #0]
80172d8: 7bfb ldrb r3, [r7, #15]
80172da: 4618 mov r0, r3
80172dc: f005 ff76 bl 801d1cc <tcp_new_ip_type>
80172e0: 4603 mov r3, r0
80172e2: 6063 str r3, [r4, #4]
if (msg->conn->pcb.tcp != NULL) {
80172e4: 687b ldr r3, [r7, #4]
80172e6: 681b ldr r3, [r3, #0]
80172e8: 685b ldr r3, [r3, #4]
80172ea: 2b00 cmp r3, #0
80172ec: d00b beq.n 8017306 <pcb_new+0xaa>
setup_tcp(msg->conn);
80172ee: 687b ldr r3, [r7, #4]
80172f0: 681b ldr r3, [r3, #0]
80172f2: 4618 mov r0, r3
80172f4: f7ff ff8a bl 801720c <setup_tcp>
}
break;
80172f8: e005 b.n 8017306 <pcb_new+0xaa>
#endif /* LWIP_TCP */
default:
/* Unsupported netconn type, e.g. protocol disabled */
msg->err = ERR_VAL;
80172fa: 687b ldr r3, [r7, #4]
80172fc: 22fa movs r2, #250 @ 0xfa
80172fe: 711a strb r2, [r3, #4]
return;
8017300: e00a b.n 8017318 <pcb_new+0xbc>
break;
8017302: bf00 nop
8017304: e000 b.n 8017308 <pcb_new+0xac>
break;
8017306: bf00 nop
}
if (msg->conn->pcb.ip == NULL) {
8017308: 687b ldr r3, [r7, #4]
801730a: 681b ldr r3, [r3, #0]
801730c: 685b ldr r3, [r3, #4]
801730e: 2b00 cmp r3, #0
8017310: d102 bne.n 8017318 <pcb_new+0xbc>
msg->err = ERR_MEM;
8017312: 687b ldr r3, [r7, #4]
8017314: 22ff movs r2, #255 @ 0xff
8017316: 711a strb r2, [r3, #4]
}
}
8017318: 3714 adds r7, #20
801731a: 46bd mov sp, r7
801731c: bd90 pop {r4, r7, pc}
801731e: bf00 nop
8017320: 0802e124 .word 0x0802e124
8017324: 0802e308 .word 0x0802e308
8017328: 0802e168 .word 0x0802e168
801732c: 08016c7d .word 0x08016c7d
08017330 <lwip_netconn_do_newconn>:
*
* @param m the api_msg describing the connection type
*/
void
lwip_netconn_do_newconn(void *m)
{
8017330: b580 push {r7, lr}
8017332: b084 sub sp, #16
8017334: af00 add r7, sp, #0
8017336: 6078 str r0, [r7, #4]
struct api_msg *msg = (struct api_msg *)m;
8017338: 687b ldr r3, [r7, #4]
801733a: 60fb str r3, [r7, #12]
msg->err = ERR_OK;
801733c: 68fb ldr r3, [r7, #12]
801733e: 2200 movs r2, #0
8017340: 711a strb r2, [r3, #4]
if (msg->conn->pcb.tcp == NULL) {
8017342: 68fb ldr r3, [r7, #12]
8017344: 681b ldr r3, [r3, #0]
8017346: 685b ldr r3, [r3, #4]
8017348: 2b00 cmp r3, #0
801734a: d102 bne.n 8017352 <lwip_netconn_do_newconn+0x22>
pcb_new(msg);
801734c: 68f8 ldr r0, [r7, #12]
801734e: f7ff ff85 bl 801725c <pcb_new>
/* Else? This "new" connection already has a PCB allocated. */
/* Is this an error condition? Should it be deleted? */
/* We currently just are happy and return. */
TCPIP_APIMSG_ACK(msg);
}
8017352: bf00 nop
8017354: 3710 adds r7, #16
8017356: 46bd mov sp, r7
8017358: bd80 pop {r7, pc}
...
0801735c <netconn_alloc>:
* @return a newly allocated struct netconn or
* NULL on memory error
*/
struct netconn *
netconn_alloc(enum netconn_type t, netconn_callback callback)
{
801735c: b580 push {r7, lr}
801735e: b086 sub sp, #24
8017360: af00 add r7, sp, #0
8017362: 4603 mov r3, r0
8017364: 6039 str r1, [r7, #0]
8017366: 71fb strb r3, [r7, #7]
struct netconn *conn;
int size;
u8_t init_flags = 0;
8017368: 2300 movs r3, #0
801736a: 74fb strb r3, [r7, #19]
conn = (struct netconn *)memp_malloc(MEMP_NETCONN);
801736c: 2007 movs r0, #7
801736e: f003 f981 bl 801a674 <memp_malloc>
8017372: 60f8 str r0, [r7, #12]
if (conn == NULL) {
8017374: 68fb ldr r3, [r7, #12]
8017376: 2b00 cmp r3, #0
8017378: d101 bne.n 801737e <netconn_alloc+0x22>
return NULL;
801737a: 2300 movs r3, #0
801737c: e05c b.n 8017438 <netconn_alloc+0xdc>
}
conn->pending_err = ERR_OK;
801737e: 68fb ldr r3, [r7, #12]
8017380: 2200 movs r2, #0
8017382: 721a strb r2, [r3, #8]
conn->type = t;
8017384: 68fb ldr r3, [r7, #12]
8017386: 79fa ldrb r2, [r7, #7]
8017388: 701a strb r2, [r3, #0]
conn->pcb.tcp = NULL;
801738a: 68fb ldr r3, [r7, #12]
801738c: 2200 movs r2, #0
801738e: 605a str r2, [r3, #4]
/* If all sizes are the same, every compiler should optimize this switch to nothing */
switch (NETCONNTYPE_GROUP(t)) {
8017390: 79fb ldrb r3, [r7, #7]
8017392: f003 03f0 and.w r3, r3, #240 @ 0xf0
8017396: 2b10 cmp r3, #16
8017398: d004 beq.n 80173a4 <netconn_alloc+0x48>
801739a: 2b20 cmp r3, #32
801739c: d105 bne.n 80173aa <netconn_alloc+0x4e>
size = DEFAULT_RAW_RECVMBOX_SIZE;
break;
#endif /* LWIP_RAW */
#if LWIP_UDP
case NETCONN_UDP:
size = DEFAULT_UDP_RECVMBOX_SIZE;
801739e: 2306 movs r3, #6
80173a0: 617b str r3, [r7, #20]
#if LWIP_NETBUF_RECVINFO
init_flags |= NETCONN_FLAG_PKTINFO;
#endif /* LWIP_NETBUF_RECVINFO */
break;
80173a2: e00a b.n 80173ba <netconn_alloc+0x5e>
#endif /* LWIP_UDP */
#if LWIP_TCP
case NETCONN_TCP:
size = DEFAULT_TCP_RECVMBOX_SIZE;
80173a4: 2306 movs r3, #6
80173a6: 617b str r3, [r7, #20]
break;
80173a8: e007 b.n 80173ba <netconn_alloc+0x5e>
#endif /* LWIP_TCP */
default:
LWIP_ASSERT("netconn_alloc: undefined netconn_type", 0);
80173aa: 4b25 ldr r3, [pc, #148] @ (8017440 <netconn_alloc+0xe4>)
80173ac: f240 22e5 movw r2, #741 @ 0x2e5
80173b0: 4924 ldr r1, [pc, #144] @ (8017444 <netconn_alloc+0xe8>)
80173b2: 4825 ldr r0, [pc, #148] @ (8017448 <netconn_alloc+0xec>)
80173b4: f013 fb3a bl 802aa2c <iprintf>
goto free_and_return;
80173b8: e039 b.n 801742e <netconn_alloc+0xd2>
}
if (sys_mbox_new(&conn->recvmbox, size) != ERR_OK) {
80173ba: 68fb ldr r3, [r7, #12]
80173bc: 3310 adds r3, #16
80173be: 6979 ldr r1, [r7, #20]
80173c0: 4618 mov r0, r3
80173c2: f00f ff05 bl 80271d0 <sys_mbox_new>
80173c6: 4603 mov r3, r0
80173c8: 2b00 cmp r3, #0
80173ca: d12f bne.n 801742c <netconn_alloc+0xd0>
goto free_and_return;
}
#if !LWIP_NETCONN_SEM_PER_THREAD
if (sys_sem_new(&conn->op_completed, 0) != ERR_OK) {
80173cc: 68fb ldr r3, [r7, #12]
80173ce: 330c adds r3, #12
80173d0: 2100 movs r1, #0
80173d2: 4618 mov r0, r3
80173d4: f00f ffa8 bl 8027328 <sys_sem_new>
80173d8: 4603 mov r3, r0
80173da: 2b00 cmp r3, #0
80173dc: d005 beq.n 80173ea <netconn_alloc+0x8e>
sys_mbox_free(&conn->recvmbox);
80173de: 68fb ldr r3, [r7, #12]
80173e0: 3310 adds r3, #16
80173e2: 4618 mov r0, r3
80173e4: f00f ff0e bl 8027204 <sys_mbox_free>
goto free_and_return;
80173e8: e021 b.n 801742e <netconn_alloc+0xd2>
}
#endif
#if LWIP_TCP
sys_mbox_set_invalid(&conn->acceptmbox);
80173ea: 68fb ldr r3, [r7, #12]
80173ec: 3314 adds r3, #20
80173ee: 4618 mov r0, r3
80173f0: f00f ff8d bl 802730e <sys_mbox_set_invalid>
#endif
conn->state = NETCONN_NONE;
80173f4: 68fb ldr r3, [r7, #12]
80173f6: 2200 movs r2, #0
80173f8: 705a strb r2, [r3, #1]
#if LWIP_SOCKET
/* initialize socket to -1 since 0 is a valid socket */
conn->socket = -1;
80173fa: 68fb ldr r3, [r7, #12]
80173fc: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
8017400: 619a str r2, [r3, #24]
#endif /* LWIP_SOCKET */
conn->callback = callback;
8017402: 68fb ldr r3, [r7, #12]
8017404: 683a ldr r2, [r7, #0]
8017406: 631a str r2, [r3, #48] @ 0x30
#if LWIP_TCP
conn->current_msg = NULL;
8017408: 68fb ldr r3, [r7, #12]
801740a: 2200 movs r2, #0
801740c: 62da str r2, [r3, #44] @ 0x2c
#endif /* LWIP_TCP */
#if LWIP_SO_SNDTIMEO
conn->send_timeout = 0;
#endif /* LWIP_SO_SNDTIMEO */
#if LWIP_SO_RCVTIMEO
conn->recv_timeout = 0;
801740e: 68fb ldr r3, [r7, #12]
8017410: 2200 movs r2, #0
8017412: 61da str r2, [r3, #28]
#endif /* LWIP_SO_RCVTIMEO */
#if LWIP_SO_RCVBUF
conn->recv_bufsize = RECV_BUFSIZE_DEFAULT;
8017414: 68fb ldr r3, [r7, #12]
8017416: 4a0d ldr r2, [pc, #52] @ (801744c <netconn_alloc+0xf0>)
8017418: 621a str r2, [r3, #32]
conn->recv_avail = 0;
801741a: 68fb ldr r3, [r7, #12]
801741c: 2200 movs r2, #0
801741e: 625a str r2, [r3, #36] @ 0x24
#endif /* LWIP_SO_RCVBUF */
#if LWIP_SO_LINGER
conn->linger = -1;
#endif /* LWIP_SO_LINGER */
conn->flags = init_flags;
8017420: 68fb ldr r3, [r7, #12]
8017422: 7cfa ldrb r2, [r7, #19]
8017424: f883 2028 strb.w r2, [r3, #40] @ 0x28
return conn;
8017428: 68fb ldr r3, [r7, #12]
801742a: e005 b.n 8017438 <netconn_alloc+0xdc>
goto free_and_return;
801742c: bf00 nop
free_and_return:
memp_free(MEMP_NETCONN, conn);
801742e: 68f9 ldr r1, [r7, #12]
8017430: 2007 movs r0, #7
8017432: f003 f995 bl 801a760 <memp_free>
return NULL;
8017436: 2300 movs r3, #0
}
8017438: 4618 mov r0, r3
801743a: 3718 adds r7, #24
801743c: 46bd mov sp, r7
801743e: bd80 pop {r7, pc}
8017440: 0802e124 .word 0x0802e124
8017444: 0802e328 .word 0x0802e328
8017448: 0802e168 .word 0x0802e168
801744c: 77359400 .word 0x77359400
08017450 <netconn_free>:
*
* @param conn the netconn to free
*/
void
netconn_free(struct netconn *conn)
{
8017450: b580 push {r7, lr}
8017452: b082 sub sp, #8
8017454: af00 add r7, sp, #0
8017456: 6078 str r0, [r7, #4]
LWIP_ASSERT("PCB must be deallocated outside this function", conn->pcb.tcp == NULL);
8017458: 687b ldr r3, [r7, #4]
801745a: 685b ldr r3, [r3, #4]
801745c: 2b00 cmp r3, #0
801745e: d006 beq.n 801746e <netconn_free+0x1e>
8017460: 4b1b ldr r3, [pc, #108] @ (80174d0 <netconn_free+0x80>)
8017462: f44f 7247 mov.w r2, #796 @ 0x31c
8017466: 491b ldr r1, [pc, #108] @ (80174d4 <netconn_free+0x84>)
8017468: 481b ldr r0, [pc, #108] @ (80174d8 <netconn_free+0x88>)
801746a: f013 fadf bl 802aa2c <iprintf>
#if LWIP_NETCONN_FULLDUPLEX
/* in fullduplex, netconn is drained here */
netconn_drain(conn);
#endif /* LWIP_NETCONN_FULLDUPLEX */
LWIP_ASSERT("recvmbox must be deallocated before calling this function",
801746e: 687b ldr r3, [r7, #4]
8017470: 3310 adds r3, #16
8017472: 4618 mov r0, r3
8017474: f00f ff3a bl 80272ec <sys_mbox_valid>
8017478: 4603 mov r3, r0
801747a: 2b00 cmp r3, #0
801747c: d006 beq.n 801748c <netconn_free+0x3c>
801747e: 4b14 ldr r3, [pc, #80] @ (80174d0 <netconn_free+0x80>)
8017480: f240 3223 movw r2, #803 @ 0x323
8017484: 4915 ldr r1, [pc, #84] @ (80174dc <netconn_free+0x8c>)
8017486: 4814 ldr r0, [pc, #80] @ (80174d8 <netconn_free+0x88>)
8017488: f013 fad0 bl 802aa2c <iprintf>
!sys_mbox_valid(&conn->recvmbox));
#if LWIP_TCP
LWIP_ASSERT("acceptmbox must be deallocated before calling this function",
801748c: 687b ldr r3, [r7, #4]
801748e: 3314 adds r3, #20
8017490: 4618 mov r0, r3
8017492: f00f ff2b bl 80272ec <sys_mbox_valid>
8017496: 4603 mov r3, r0
8017498: 2b00 cmp r3, #0
801749a: d006 beq.n 80174aa <netconn_free+0x5a>
801749c: 4b0c ldr r3, [pc, #48] @ (80174d0 <netconn_free+0x80>)
801749e: f240 3226 movw r2, #806 @ 0x326
80174a2: 490f ldr r1, [pc, #60] @ (80174e0 <netconn_free+0x90>)
80174a4: 480c ldr r0, [pc, #48] @ (80174d8 <netconn_free+0x88>)
80174a6: f013 fac1 bl 802aa2c <iprintf>
!sys_mbox_valid(&conn->acceptmbox));
#endif /* LWIP_TCP */
#if !LWIP_NETCONN_SEM_PER_THREAD
sys_sem_free(&conn->op_completed);
80174aa: 687b ldr r3, [r7, #4]
80174ac: 330c adds r3, #12
80174ae: 4618 mov r0, r3
80174b0: f00f ff9d bl 80273ee <sys_sem_free>
sys_sem_set_invalid(&conn->op_completed);
80174b4: 687b ldr r3, [r7, #4]
80174b6: 330c adds r3, #12
80174b8: 4618 mov r0, r3
80174ba: f00f ffb6 bl 802742a <sys_sem_set_invalid>
#endif
memp_free(MEMP_NETCONN, conn);
80174be: 6879 ldr r1, [r7, #4]
80174c0: 2007 movs r0, #7
80174c2: f003 f94d bl 801a760 <memp_free>
}
80174c6: bf00 nop
80174c8: 3708 adds r7, #8
80174ca: 46bd mov sp, r7
80174cc: bd80 pop {r7, pc}
80174ce: bf00 nop
80174d0: 0802e124 .word 0x0802e124
80174d4: 0802e350 .word 0x0802e350
80174d8: 0802e168 .word 0x0802e168
80174dc: 0802e380 .word 0x0802e380
80174e0: 0802e3bc .word 0x0802e3bc
080174e4 <netconn_drain>:
* @bytes_drained bytes drained from recvmbox
* @accepts_drained pending connections drained from acceptmbox
*/
static void
netconn_drain(struct netconn *conn)
{
80174e4: b580 push {r7, lr}
80174e6: b086 sub sp, #24
80174e8: af00 add r7, sp, #0
80174ea: 6078 str r0, [r7, #4]
#if LWIP_NETCONN_FULLDUPLEX
LWIP_ASSERT("netconn marked closed", conn->flags & NETCONN_FLAG_MBOXINVALID);
#endif /* LWIP_NETCONN_FULLDUPLEX */
/* Delete and drain the recvmbox. */
if (sys_mbox_valid(&conn->recvmbox)) {
80174ec: 687b ldr r3, [r7, #4]
80174ee: 3310 adds r3, #16
80174f0: 4618 mov r0, r3
80174f2: f00f fefb bl 80272ec <sys_mbox_valid>
80174f6: 4603 mov r3, r0
80174f8: 2b00 cmp r3, #0
80174fa: d02f beq.n 801755c <netconn_drain+0x78>
while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
80174fc: e018 b.n 8017530 <netconn_drain+0x4c>
#if LWIP_NETCONN_FULLDUPLEX
if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
{
#if LWIP_TCP
if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) {
80174fe: 687b ldr r3, [r7, #4]
8017500: 781b ldrb r3, [r3, #0]
8017502: f003 03f0 and.w r3, r3, #240 @ 0xf0
8017506: 2b10 cmp r3, #16
8017508: d10e bne.n 8017528 <netconn_drain+0x44>
err_t err;
if (!lwip_netconn_is_err_msg(mem, &err)) {
801750a: 693b ldr r3, [r7, #16]
801750c: f107 020f add.w r2, r7, #15
8017510: 4611 mov r1, r2
8017512: 4618 mov r0, r3
8017514: f7ff fb78 bl 8016c08 <lwip_netconn_is_err_msg>
8017518: 4603 mov r3, r0
801751a: 2b00 cmp r3, #0
801751c: d108 bne.n 8017530 <netconn_drain+0x4c>
pbuf_free((struct pbuf *)mem);
801751e: 693b ldr r3, [r7, #16]
8017520: 4618 mov r0, r3
8017522: f004 f80b bl 801b53c <pbuf_free>
8017526: e003 b.n 8017530 <netconn_drain+0x4c>
}
} else
#endif /* LWIP_TCP */
{
netbuf_delete((struct netbuf *)mem);
8017528: 693b ldr r3, [r7, #16]
801752a: 4618 mov r0, r3
801752c: f001 f81c bl 8018568 <netbuf_delete>
while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
8017530: 687b ldr r3, [r7, #4]
8017532: 3310 adds r3, #16
8017534: f107 0210 add.w r2, r7, #16
8017538: 4611 mov r1, r2
801753a: 4618 mov r0, r3
801753c: f00f febf bl 80272be <sys_arch_mbox_tryfetch>
8017540: 4603 mov r3, r0
8017542: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8017546: d1da bne.n 80174fe <netconn_drain+0x1a>
}
}
}
sys_mbox_free(&conn->recvmbox);
8017548: 687b ldr r3, [r7, #4]
801754a: 3310 adds r3, #16
801754c: 4618 mov r0, r3
801754e: f00f fe59 bl 8027204 <sys_mbox_free>
sys_mbox_set_invalid(&conn->recvmbox);
8017552: 687b ldr r3, [r7, #4]
8017554: 3310 adds r3, #16
8017556: 4618 mov r0, r3
8017558: f00f fed9 bl 802730e <sys_mbox_set_invalid>
}
/* Delete and drain the acceptmbox. */
#if LWIP_TCP
if (sys_mbox_valid(&conn->acceptmbox)) {
801755c: 687b ldr r3, [r7, #4]
801755e: 3314 adds r3, #20
8017560: 4618 mov r0, r3
8017562: f00f fec3 bl 80272ec <sys_mbox_valid>
8017566: 4603 mov r3, r0
8017568: 2b00 cmp r3, #0
801756a: d034 beq.n 80175d6 <netconn_drain+0xf2>
while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
801756c: e01d b.n 80175aa <netconn_drain+0xc6>
#if LWIP_NETCONN_FULLDUPLEX
if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
{
err_t err;
if (!lwip_netconn_is_err_msg(mem, &err)) {
801756e: 693b ldr r3, [r7, #16]
8017570: f107 020e add.w r2, r7, #14
8017574: 4611 mov r1, r2
8017576: 4618 mov r0, r3
8017578: f7ff fb46 bl 8016c08 <lwip_netconn_is_err_msg>
801757c: 4603 mov r3, r0
801757e: 2b00 cmp r3, #0
8017580: d113 bne.n 80175aa <netconn_drain+0xc6>
struct netconn *newconn = (struct netconn *)mem;
8017582: 693b ldr r3, [r7, #16]
8017584: 617b str r3, [r7, #20]
/* Only tcp pcbs have an acceptmbox, so no need to check conn->type */
/* pcb might be set to NULL already by err_tcp() */
/* drain recvmbox */
netconn_drain(newconn);
8017586: 6978 ldr r0, [r7, #20]
8017588: f7ff ffac bl 80174e4 <netconn_drain>
if (newconn->pcb.tcp != NULL) {
801758c: 697b ldr r3, [r7, #20]
801758e: 685b ldr r3, [r3, #4]
8017590: 2b00 cmp r3, #0
8017592: d007 beq.n 80175a4 <netconn_drain+0xc0>
tcp_abort(newconn->pcb.tcp);
8017594: 697b ldr r3, [r7, #20]
8017596: 685b ldr r3, [r3, #4]
8017598: 4618 mov r0, r3
801759a: f004 fdd5 bl 801c148 <tcp_abort>
newconn->pcb.tcp = NULL;
801759e: 697b ldr r3, [r7, #20]
80175a0: 2200 movs r2, #0
80175a2: 605a str r2, [r3, #4]
}
netconn_free(newconn);
80175a4: 6978 ldr r0, [r7, #20]
80175a6: f7ff ff53 bl 8017450 <netconn_free>
while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
80175aa: 687b ldr r3, [r7, #4]
80175ac: 3314 adds r3, #20
80175ae: f107 0210 add.w r2, r7, #16
80175b2: 4611 mov r1, r2
80175b4: 4618 mov r0, r3
80175b6: f00f fe82 bl 80272be <sys_arch_mbox_tryfetch>
80175ba: 4603 mov r3, r0
80175bc: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80175c0: d1d5 bne.n 801756e <netconn_drain+0x8a>
}
}
}
sys_mbox_free(&conn->acceptmbox);
80175c2: 687b ldr r3, [r7, #4]
80175c4: 3314 adds r3, #20
80175c6: 4618 mov r0, r3
80175c8: f00f fe1c bl 8027204 <sys_mbox_free>
sys_mbox_set_invalid(&conn->acceptmbox);
80175cc: 687b ldr r3, [r7, #4]
80175ce: 3314 adds r3, #20
80175d0: 4618 mov r0, r3
80175d2: f00f fe9c bl 802730e <sys_mbox_set_invalid>
}
#endif /* LWIP_TCP */
}
80175d6: bf00 nop
80175d8: 3718 adds r7, #24
80175da: 46bd mov sp, r7
80175dc: bd80 pop {r7, pc}
...
080175e0 <lwip_netconn_do_close_internal>:
*
* @param conn the TCP netconn to close
*/
static err_t
lwip_netconn_do_close_internal(struct netconn *conn WRITE_DELAYED_PARAM)
{
80175e0: b580 push {r7, lr}
80175e2: b086 sub sp, #24
80175e4: af00 add r7, sp, #0
80175e6: 6078 str r0, [r7, #4]
80175e8: 460b mov r3, r1
80175ea: 70fb strb r3, [r7, #3]
err_t err;
u8_t shut, shut_rx, shut_tx, shut_close;
u8_t close_finished = 0;
80175ec: 2300 movs r3, #0
80175ee: 757b strb r3, [r7, #21]
struct tcp_pcb *tpcb;
#if LWIP_SO_LINGER
u8_t linger_wait_required = 0;
#endif /* LWIP_SO_LINGER */
LWIP_ASSERT("invalid conn", (conn != NULL));
80175f0: 687b ldr r3, [r7, #4]
80175f2: 2b00 cmp r3, #0
80175f4: d106 bne.n 8017604 <lwip_netconn_do_close_internal+0x24>
80175f6: 4b87 ldr r3, [pc, #540] @ (8017814 <lwip_netconn_do_close_internal+0x234>)
80175f8: f240 32a2 movw r2, #930 @ 0x3a2
80175fc: 4986 ldr r1, [pc, #536] @ (8017818 <lwip_netconn_do_close_internal+0x238>)
80175fe: 4887 ldr r0, [pc, #540] @ (801781c <lwip_netconn_do_close_internal+0x23c>)
8017600: f013 fa14 bl 802aa2c <iprintf>
LWIP_ASSERT("this is for tcp netconns only", (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP));
8017604: 687b ldr r3, [r7, #4]
8017606: 781b ldrb r3, [r3, #0]
8017608: f003 03f0 and.w r3, r3, #240 @ 0xf0
801760c: 2b10 cmp r3, #16
801760e: d006 beq.n 801761e <lwip_netconn_do_close_internal+0x3e>
8017610: 4b80 ldr r3, [pc, #512] @ (8017814 <lwip_netconn_do_close_internal+0x234>)
8017612: f240 32a3 movw r2, #931 @ 0x3a3
8017616: 4982 ldr r1, [pc, #520] @ (8017820 <lwip_netconn_do_close_internal+0x240>)
8017618: 4880 ldr r0, [pc, #512] @ (801781c <lwip_netconn_do_close_internal+0x23c>)
801761a: f013 fa07 bl 802aa2c <iprintf>
LWIP_ASSERT("conn must be in state NETCONN_CLOSE", (conn->state == NETCONN_CLOSE));
801761e: 687b ldr r3, [r7, #4]
8017620: 785b ldrb r3, [r3, #1]
8017622: 2b04 cmp r3, #4
8017624: d006 beq.n 8017634 <lwip_netconn_do_close_internal+0x54>
8017626: 4b7b ldr r3, [pc, #492] @ (8017814 <lwip_netconn_do_close_internal+0x234>)
8017628: f44f 7269 mov.w r2, #932 @ 0x3a4
801762c: 497d ldr r1, [pc, #500] @ (8017824 <lwip_netconn_do_close_internal+0x244>)
801762e: 487b ldr r0, [pc, #492] @ (801781c <lwip_netconn_do_close_internal+0x23c>)
8017630: f013 f9fc bl 802aa2c <iprintf>
LWIP_ASSERT("pcb already closed", (conn->pcb.tcp != NULL));
8017634: 687b ldr r3, [r7, #4]
8017636: 685b ldr r3, [r3, #4]
8017638: 2b00 cmp r3, #0
801763a: d106 bne.n 801764a <lwip_netconn_do_close_internal+0x6a>
801763c: 4b75 ldr r3, [pc, #468] @ (8017814 <lwip_netconn_do_close_internal+0x234>)
801763e: f240 32a5 movw r2, #933 @ 0x3a5
8017642: 4979 ldr r1, [pc, #484] @ (8017828 <lwip_netconn_do_close_internal+0x248>)
8017644: 4875 ldr r0, [pc, #468] @ (801781c <lwip_netconn_do_close_internal+0x23c>)
8017646: f013 f9f1 bl 802aa2c <iprintf>
LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
801764a: 687b ldr r3, [r7, #4]
801764c: 6adb ldr r3, [r3, #44] @ 0x2c
801764e: 2b00 cmp r3, #0
8017650: d106 bne.n 8017660 <lwip_netconn_do_close_internal+0x80>
8017652: 4b70 ldr r3, [pc, #448] @ (8017814 <lwip_netconn_do_close_internal+0x234>)
8017654: f240 32a6 movw r2, #934 @ 0x3a6
8017658: 4974 ldr r1, [pc, #464] @ (801782c <lwip_netconn_do_close_internal+0x24c>)
801765a: 4870 ldr r0, [pc, #448] @ (801781c <lwip_netconn_do_close_internal+0x23c>)
801765c: f013 f9e6 bl 802aa2c <iprintf>
tpcb = conn->pcb.tcp;
8017660: 687b ldr r3, [r7, #4]
8017662: 685b ldr r3, [r3, #4]
8017664: 613b str r3, [r7, #16]
shut = conn->current_msg->msg.sd.shut;
8017666: 687b ldr r3, [r7, #4]
8017668: 6adb ldr r3, [r3, #44] @ 0x2c
801766a: 7a1b ldrb r3, [r3, #8]
801766c: 73fb strb r3, [r7, #15]
shut_rx = shut & NETCONN_SHUT_RD;
801766e: 7bfb ldrb r3, [r7, #15]
8017670: f003 0301 and.w r3, r3, #1
8017674: 73bb strb r3, [r7, #14]
shut_tx = shut & NETCONN_SHUT_WR;
8017676: 7bfb ldrb r3, [r7, #15]
8017678: f003 0302 and.w r3, r3, #2
801767c: 737b strb r3, [r7, #13]
/* shutting down both ends is the same as closing
(also if RD or WR side was shut down before already) */
if (shut == NETCONN_SHUT_RDWR) {
801767e: 7bfb ldrb r3, [r7, #15]
8017680: 2b03 cmp r3, #3
8017682: d102 bne.n 801768a <lwip_netconn_do_close_internal+0xaa>
shut_close = 1;
8017684: 2301 movs r3, #1
8017686: 75bb strb r3, [r7, #22]
8017688: e01f b.n 80176ca <lwip_netconn_do_close_internal+0xea>
} else if (shut_rx &&
801768a: 7bbb ldrb r3, [r7, #14]
801768c: 2b00 cmp r3, #0
801768e: d00e beq.n 80176ae <lwip_netconn_do_close_internal+0xce>
((tpcb->state == FIN_WAIT_1) ||
8017690: 693b ldr r3, [r7, #16]
8017692: 7d1b ldrb r3, [r3, #20]
} else if (shut_rx &&
8017694: 2b05 cmp r3, #5
8017696: d007 beq.n 80176a8 <lwip_netconn_do_close_internal+0xc8>
(tpcb->state == FIN_WAIT_2) ||
8017698: 693b ldr r3, [r7, #16]
801769a: 7d1b ldrb r3, [r3, #20]
((tpcb->state == FIN_WAIT_1) ||
801769c: 2b06 cmp r3, #6
801769e: d003 beq.n 80176a8 <lwip_netconn_do_close_internal+0xc8>
(tpcb->state == CLOSING))) {
80176a0: 693b ldr r3, [r7, #16]
80176a2: 7d1b ldrb r3, [r3, #20]
(tpcb->state == FIN_WAIT_2) ||
80176a4: 2b08 cmp r3, #8
80176a6: d102 bne.n 80176ae <lwip_netconn_do_close_internal+0xce>
shut_close = 1;
80176a8: 2301 movs r3, #1
80176aa: 75bb strb r3, [r7, #22]
80176ac: e00d b.n 80176ca <lwip_netconn_do_close_internal+0xea>
} else if (shut_tx && ((tpcb->flags & TF_RXCLOSED) != 0)) {
80176ae: 7b7b ldrb r3, [r7, #13]
80176b0: 2b00 cmp r3, #0
80176b2: d008 beq.n 80176c6 <lwip_netconn_do_close_internal+0xe6>
80176b4: 693b ldr r3, [r7, #16]
80176b6: 8b5b ldrh r3, [r3, #26]
80176b8: f003 0310 and.w r3, r3, #16
80176bc: 2b00 cmp r3, #0
80176be: d002 beq.n 80176c6 <lwip_netconn_do_close_internal+0xe6>
shut_close = 1;
80176c0: 2301 movs r3, #1
80176c2: 75bb strb r3, [r7, #22]
80176c4: e001 b.n 80176ca <lwip_netconn_do_close_internal+0xea>
} else {
shut_close = 0;
80176c6: 2300 movs r3, #0
80176c8: 75bb strb r3, [r7, #22]
}
/* Set back some callback pointers */
if (shut_close) {
80176ca: 7dbb ldrb r3, [r7, #22]
80176cc: 2b00 cmp r3, #0
80176ce: d003 beq.n 80176d8 <lwip_netconn_do_close_internal+0xf8>
tcp_arg(tpcb, NULL);
80176d0: 2100 movs r1, #0
80176d2: 6938 ldr r0, [r7, #16]
80176d4: f005 fd88 bl 801d1e8 <tcp_arg>
}
if (tpcb->state == LISTEN) {
80176d8: 693b ldr r3, [r7, #16]
80176da: 7d1b ldrb r3, [r3, #20]
80176dc: 2b01 cmp r3, #1
80176de: d104 bne.n 80176ea <lwip_netconn_do_close_internal+0x10a>
tcp_accept(tpcb, NULL);
80176e0: 2100 movs r1, #0
80176e2: 6938 ldr r0, [r7, #16]
80176e4: f005 fdfe bl 801d2e4 <tcp_accept>
80176e8: e01d b.n 8017726 <lwip_netconn_do_close_internal+0x146>
} else {
/* some callbacks have to be reset if tcp_close is not successful */
if (shut_rx) {
80176ea: 7bbb ldrb r3, [r7, #14]
80176ec: 2b00 cmp r3, #0
80176ee: d007 beq.n 8017700 <lwip_netconn_do_close_internal+0x120>
tcp_recv(tpcb, NULL);
80176f0: 2100 movs r1, #0
80176f2: 6938 ldr r0, [r7, #16]
80176f4: f005 fd8a bl 801d20c <tcp_recv>
tcp_accept(tpcb, NULL);
80176f8: 2100 movs r1, #0
80176fa: 6938 ldr r0, [r7, #16]
80176fc: f005 fdf2 bl 801d2e4 <tcp_accept>
}
if (shut_tx) {
8017700: 7b7b ldrb r3, [r7, #13]
8017702: 2b00 cmp r3, #0
8017704: d003 beq.n 801770e <lwip_netconn_do_close_internal+0x12e>
tcp_sent(tpcb, NULL);
8017706: 2100 movs r1, #0
8017708: 6938 ldr r0, [r7, #16]
801770a: f005 fda3 bl 801d254 <tcp_sent>
}
if (shut_close) {
801770e: 7dbb ldrb r3, [r7, #22]
8017710: 2b00 cmp r3, #0
8017712: d008 beq.n 8017726 <lwip_netconn_do_close_internal+0x146>
tcp_poll(tpcb, NULL, 0);
8017714: 2200 movs r2, #0
8017716: 2100 movs r1, #0
8017718: 6938 ldr r0, [r7, #16]
801771a: f005 fdfb bl 801d314 <tcp_poll>
tcp_err(tpcb, NULL);
801771e: 2100 movs r1, #0
8017720: 6938 ldr r0, [r7, #16]
8017722: f005 fdbb bl 801d29c <tcp_err>
}
}
/* Try to close the connection */
if (shut_close) {
8017726: 7dbb ldrb r3, [r7, #22]
8017728: 2b00 cmp r3, #0
801772a: d005 beq.n 8017738 <lwip_netconn_do_close_internal+0x158>
}
}
if ((err == ERR_OK) && (tpcb != NULL))
#endif /* LWIP_SO_LINGER */
{
err = tcp_close(tpcb);
801772c: 6938 ldr r0, [r7, #16]
801772e: f004 fbbf bl 801beb0 <tcp_close>
8017732: 4603 mov r3, r0
8017734: 75fb strb r3, [r7, #23]
8017736: e007 b.n 8017748 <lwip_netconn_do_close_internal+0x168>
}
} else {
err = tcp_shutdown(tpcb, shut_rx, shut_tx);
8017738: 7bbb ldrb r3, [r7, #14]
801773a: 7b7a ldrb r2, [r7, #13]
801773c: 4619 mov r1, r3
801773e: 6938 ldr r0, [r7, #16]
8017740: f004 fbe4 bl 801bf0c <tcp_shutdown>
8017744: 4603 mov r3, r0
8017746: 75fb strb r3, [r7, #23]
}
if (err == ERR_OK) {
8017748: f997 3017 ldrsb.w r3, [r7, #23]
801774c: 2b00 cmp r3, #0
801774e: d102 bne.n 8017756 <lwip_netconn_do_close_internal+0x176>
close_finished = 1;
8017750: 2301 movs r3, #1
8017752: 757b strb r3, [r7, #21]
8017754: e016 b.n 8017784 <lwip_netconn_do_close_internal+0x1a4>
close_finished = 0;
err = ERR_INPROGRESS;
}
#endif /* LWIP_SO_LINGER */
} else {
if (err == ERR_MEM) {
8017756: f997 3017 ldrsb.w r3, [r7, #23]
801775a: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
801775e: d10f bne.n 8017780 <lwip_netconn_do_close_internal+0x1a0>
close_timeout = conn->linger * 1000U;
}
#endif
if ((s32_t)(sys_now() - conn->current_msg->msg.sd.time_started) >= close_timeout) {
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
if (conn->current_msg->msg.sd.polls_left == 0) {
8017760: 687b ldr r3, [r7, #4]
8017762: 6adb ldr r3, [r3, #44] @ 0x2c
8017764: 7a5b ldrb r3, [r3, #9]
8017766: 2b00 cmp r3, #0
8017768: d10c bne.n 8017784 <lwip_netconn_do_close_internal+0x1a4>
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
close_finished = 1;
801776a: 2301 movs r3, #1
801776c: 757b strb r3, [r7, #21]
if (shut_close) {
801776e: 7dbb ldrb r3, [r7, #22]
8017770: 2b00 cmp r3, #0
8017772: d007 beq.n 8017784 <lwip_netconn_do_close_internal+0x1a4>
/* in this case, we want to RST the connection */
tcp_abort(tpcb);
8017774: 6938 ldr r0, [r7, #16]
8017776: f004 fce7 bl 801c148 <tcp_abort>
err = ERR_OK;
801777a: 2300 movs r3, #0
801777c: 75fb strb r3, [r7, #23]
801777e: e001 b.n 8017784 <lwip_netconn_do_close_internal+0x1a4>
}
}
} else {
/* Closing failed for a non-memory error: give up */
close_finished = 1;
8017780: 2301 movs r3, #1
8017782: 757b strb r3, [r7, #21]
}
}
if (close_finished) {
8017784: 7d7b ldrb r3, [r7, #21]
8017786: 2b00 cmp r3, #0
8017788: d052 beq.n 8017830 <lwip_netconn_do_close_internal+0x250>
/* Closing done (succeeded, non-memory error, nonblocking error or timeout) */
sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
801778a: 687b ldr r3, [r7, #4]
801778c: 6adb ldr r3, [r3, #44] @ 0x2c
801778e: 681b ldr r3, [r3, #0]
8017790: 330c adds r3, #12
8017792: 60bb str r3, [r7, #8]
conn->current_msg->err = err;
8017794: 687b ldr r3, [r7, #4]
8017796: 6adb ldr r3, [r3, #44] @ 0x2c
8017798: 7dfa ldrb r2, [r7, #23]
801779a: 711a strb r2, [r3, #4]
conn->current_msg = NULL;
801779c: 687b ldr r3, [r7, #4]
801779e: 2200 movs r2, #0
80177a0: 62da str r2, [r3, #44] @ 0x2c
conn->state = NETCONN_NONE;
80177a2: 687b ldr r3, [r7, #4]
80177a4: 2200 movs r2, #0
80177a6: 705a strb r2, [r3, #1]
if (err == ERR_OK) {
80177a8: f997 3017 ldrsb.w r3, [r7, #23]
80177ac: 2b00 cmp r3, #0
80177ae: d129 bne.n 8017804 <lwip_netconn_do_close_internal+0x224>
if (shut_close) {
80177b0: 7dbb ldrb r3, [r7, #22]
80177b2: 2b00 cmp r3, #0
80177b4: d00c beq.n 80177d0 <lwip_netconn_do_close_internal+0x1f0>
/* Set back some callback pointers as conn is going away */
conn->pcb.tcp = NULL;
80177b6: 687b ldr r3, [r7, #4]
80177b8: 2200 movs r2, #0
80177ba: 605a str r2, [r3, #4]
/* Trigger select() in socket layer. Make sure everybody notices activity
on the connection, error first! */
API_EVENT(conn, NETCONN_EVT_ERROR, 0);
80177bc: 687b ldr r3, [r7, #4]
80177be: 6b1b ldr r3, [r3, #48] @ 0x30
80177c0: 2b00 cmp r3, #0
80177c2: d005 beq.n 80177d0 <lwip_netconn_do_close_internal+0x1f0>
80177c4: 687b ldr r3, [r7, #4]
80177c6: 6b1b ldr r3, [r3, #48] @ 0x30
80177c8: 2200 movs r2, #0
80177ca: 2104 movs r1, #4
80177cc: 6878 ldr r0, [r7, #4]
80177ce: 4798 blx r3
}
if (shut_rx) {
80177d0: 7bbb ldrb r3, [r7, #14]
80177d2: 2b00 cmp r3, #0
80177d4: d009 beq.n 80177ea <lwip_netconn_do_close_internal+0x20a>
API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
80177d6: 687b ldr r3, [r7, #4]
80177d8: 6b1b ldr r3, [r3, #48] @ 0x30
80177da: 2b00 cmp r3, #0
80177dc: d005 beq.n 80177ea <lwip_netconn_do_close_internal+0x20a>
80177de: 687b ldr r3, [r7, #4]
80177e0: 6b1b ldr r3, [r3, #48] @ 0x30
80177e2: 2200 movs r2, #0
80177e4: 2100 movs r1, #0
80177e6: 6878 ldr r0, [r7, #4]
80177e8: 4798 blx r3
}
if (shut_tx) {
80177ea: 7b7b ldrb r3, [r7, #13]
80177ec: 2b00 cmp r3, #0
80177ee: d009 beq.n 8017804 <lwip_netconn_do_close_internal+0x224>
API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
80177f0: 687b ldr r3, [r7, #4]
80177f2: 6b1b ldr r3, [r3, #48] @ 0x30
80177f4: 2b00 cmp r3, #0
80177f6: d005 beq.n 8017804 <lwip_netconn_do_close_internal+0x224>
80177f8: 687b ldr r3, [r7, #4]
80177fa: 6b1b ldr r3, [r3, #48] @ 0x30
80177fc: 2200 movs r2, #0
80177fe: 2102 movs r1, #2
8017800: 6878 ldr r0, [r7, #4]
8017802: 4798 blx r3
}
}
#if LWIP_TCPIP_CORE_LOCKING
if (delayed)
8017804: 78fb ldrb r3, [r7, #3]
8017806: 2b00 cmp r3, #0
8017808: d002 beq.n 8017810 <lwip_netconn_do_close_internal+0x230>
#endif
{
/* wake up the application task */
sys_sem_signal(op_completed_sem);
801780a: 68b8 ldr r0, [r7, #8]
801780c: f00f fde2 bl 80273d4 <sys_sem_signal>
}
return ERR_OK;
8017810: 2300 movs r3, #0
8017812: e03c b.n 801788e <lwip_netconn_do_close_internal+0x2ae>
8017814: 0802e124 .word 0x0802e124
8017818: 0802e3f8 .word 0x0802e3f8
801781c: 0802e168 .word 0x0802e168
8017820: 0802e408 .word 0x0802e408
8017824: 0802e428 .word 0x0802e428
8017828: 0802e44c .word 0x0802e44c
801782c: 0802e28c .word 0x0802e28c
}
if (!close_finished) {
8017830: 7d7b ldrb r3, [r7, #21]
8017832: 2b00 cmp r3, #0
8017834: d11e bne.n 8017874 <lwip_netconn_do_close_internal+0x294>
/* Closing failed and we want to wait: restore some of the callbacks */
/* Closing of listen pcb will never fail! */
LWIP_ASSERT("Closing a listen pcb may not fail!", (tpcb->state != LISTEN));
8017836: 693b ldr r3, [r7, #16]
8017838: 7d1b ldrb r3, [r3, #20]
801783a: 2b01 cmp r3, #1
801783c: d106 bne.n 801784c <lwip_netconn_do_close_internal+0x26c>
801783e: 4b16 ldr r3, [pc, #88] @ (8017898 <lwip_netconn_do_close_internal+0x2b8>)
8017840: f240 4241 movw r2, #1089 @ 0x441
8017844: 4915 ldr r1, [pc, #84] @ (801789c <lwip_netconn_do_close_internal+0x2bc>)
8017846: 4816 ldr r0, [pc, #88] @ (80178a0 <lwip_netconn_do_close_internal+0x2c0>)
8017848: f013 f8f0 bl 802aa2c <iprintf>
if (shut_tx) {
801784c: 7b7b ldrb r3, [r7, #13]
801784e: 2b00 cmp r3, #0
8017850: d003 beq.n 801785a <lwip_netconn_do_close_internal+0x27a>
tcp_sent(tpcb, sent_tcp);
8017852: 4914 ldr r1, [pc, #80] @ (80178a4 <lwip_netconn_do_close_internal+0x2c4>)
8017854: 6938 ldr r0, [r7, #16]
8017856: f005 fcfd bl 801d254 <tcp_sent>
}
/* when waiting for close, set up poll interval to 500ms */
tcp_poll(tpcb, poll_tcp, 1);
801785a: 2201 movs r2, #1
801785c: 4912 ldr r1, [pc, #72] @ (80178a8 <lwip_netconn_do_close_internal+0x2c8>)
801785e: 6938 ldr r0, [r7, #16]
8017860: f005 fd58 bl 801d314 <tcp_poll>
tcp_err(tpcb, err_tcp);
8017864: 4911 ldr r1, [pc, #68] @ (80178ac <lwip_netconn_do_close_internal+0x2cc>)
8017866: 6938 ldr r0, [r7, #16]
8017868: f005 fd18 bl 801d29c <tcp_err>
tcp_arg(tpcb, conn);
801786c: 6879 ldr r1, [r7, #4]
801786e: 6938 ldr r0, [r7, #16]
8017870: f005 fcba bl 801d1e8 <tcp_arg>
/* don't restore recv callback: we don't want to receive any more data */
}
/* If closing didn't succeed, we get called again either
from poll_tcp or from sent_tcp */
LWIP_ASSERT("err != ERR_OK", err != ERR_OK);
8017874: f997 3017 ldrsb.w r3, [r7, #23]
8017878: 2b00 cmp r3, #0
801787a: d106 bne.n 801788a <lwip_netconn_do_close_internal+0x2aa>
801787c: 4b06 ldr r3, [pc, #24] @ (8017898 <lwip_netconn_do_close_internal+0x2b8>)
801787e: f240 424d movw r2, #1101 @ 0x44d
8017882: 490b ldr r1, [pc, #44] @ (80178b0 <lwip_netconn_do_close_internal+0x2d0>)
8017884: 4806 ldr r0, [pc, #24] @ (80178a0 <lwip_netconn_do_close_internal+0x2c0>)
8017886: f013 f8d1 bl 802aa2c <iprintf>
return err;
801788a: f997 3017 ldrsb.w r3, [r7, #23]
}
801788e: 4618 mov r0, r3
8017890: 3718 adds r7, #24
8017892: 46bd mov sp, r7
8017894: bd80 pop {r7, pc}
8017896: bf00 nop
8017898: 0802e124 .word 0x0802e124
801789c: 0802e460 .word 0x0802e460
80178a0: 0802e168 .word 0x0802e168
80178a4: 08016fa9 .word 0x08016fa9
80178a8: 08016ed9 .word 0x08016ed9
80178ac: 08017059 .word 0x08017059
80178b0: 0802e484 .word 0x0802e484
080178b4 <lwip_netconn_do_delconn>:
*
* @param m the api_msg pointing to the connection
*/
void
lwip_netconn_do_delconn(void *m)
{
80178b4: b580 push {r7, lr}
80178b6: b084 sub sp, #16
80178b8: af00 add r7, sp, #0
80178ba: 6078 str r0, [r7, #4]
struct api_msg *msg = (struct api_msg *)m;
80178bc: 687b ldr r3, [r7, #4]
80178be: 60fb str r3, [r7, #12]
enum netconn_state state = msg->conn->state;
80178c0: 68fb ldr r3, [r7, #12]
80178c2: 681b ldr r3, [r3, #0]
80178c4: 785b ldrb r3, [r3, #1]
80178c6: 72fb strb r3, [r7, #11]
LWIP_ASSERT("netconn state error", /* this only happens for TCP netconns */
80178c8: 7afb ldrb r3, [r7, #11]
80178ca: 2b00 cmp r3, #0
80178cc: d00d beq.n 80178ea <lwip_netconn_do_delconn+0x36>
80178ce: 68fb ldr r3, [r7, #12]
80178d0: 681b ldr r3, [r3, #0]
80178d2: 781b ldrb r3, [r3, #0]
80178d4: f003 03f0 and.w r3, r3, #240 @ 0xf0
80178d8: 2b10 cmp r3, #16
80178da: d006 beq.n 80178ea <lwip_netconn_do_delconn+0x36>
80178dc: 4b60 ldr r3, [pc, #384] @ (8017a60 <lwip_netconn_do_delconn+0x1ac>)
80178de: f240 425e movw r2, #1118 @ 0x45e
80178e2: 4960 ldr r1, [pc, #384] @ (8017a64 <lwip_netconn_do_delconn+0x1b0>)
80178e4: 4860 ldr r0, [pc, #384] @ (8017a68 <lwip_netconn_do_delconn+0x1b4>)
80178e6: f013 f8a1 bl 802aa2c <iprintf>
msg->conn->state = NETCONN_NONE;
sys_sem_signal(op_completed_sem);
}
}
#else /* LWIP_NETCONN_FULLDUPLEX */
if (((state != NETCONN_NONE) &&
80178ea: 7afb ldrb r3, [r7, #11]
80178ec: 2b00 cmp r3, #0
80178ee: d005 beq.n 80178fc <lwip_netconn_do_delconn+0x48>
80178f0: 7afb ldrb r3, [r7, #11]
80178f2: 2b02 cmp r3, #2
80178f4: d002 beq.n 80178fc <lwip_netconn_do_delconn+0x48>
(state != NETCONN_LISTEN) &&
80178f6: 7afb ldrb r3, [r7, #11]
80178f8: 2b03 cmp r3, #3
80178fa: d10a bne.n 8017912 <lwip_netconn_do_delconn+0x5e>
(state != NETCONN_CONNECT)) ||
80178fc: 7afb ldrb r3, [r7, #11]
80178fe: 2b03 cmp r3, #3
8017900: d10b bne.n 801791a <lwip_netconn_do_delconn+0x66>
((state == NETCONN_CONNECT) && !IN_NONBLOCKING_CONNECT(msg->conn))) {
8017902: 68fb ldr r3, [r7, #12]
8017904: 681b ldr r3, [r3, #0]
8017906: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
801790a: f003 0304 and.w r3, r3, #4
801790e: 2b00 cmp r3, #0
8017910: d103 bne.n 801791a <lwip_netconn_do_delconn+0x66>
/* This means either a blocking write or blocking connect is running
(nonblocking write returns and sets state to NONE) */
msg->err = ERR_INPROGRESS;
8017912: 68fb ldr r3, [r7, #12]
8017914: 22fb movs r2, #251 @ 0xfb
8017916: 711a strb r2, [r3, #4]
8017918: e096 b.n 8017a48 <lwip_netconn_do_delconn+0x194>
} else
#endif /* LWIP_NETCONN_FULLDUPLEX */
{
LWIP_ASSERT("blocking connect in progress",
801791a: 7afb ldrb r3, [r7, #11]
801791c: 2b03 cmp r3, #3
801791e: d10e bne.n 801793e <lwip_netconn_do_delconn+0x8a>
8017920: 68fb ldr r3, [r7, #12]
8017922: 681b ldr r3, [r3, #0]
8017924: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8017928: f003 0304 and.w r3, r3, #4
801792c: 2b00 cmp r3, #0
801792e: d106 bne.n 801793e <lwip_netconn_do_delconn+0x8a>
8017930: 4b4b ldr r3, [pc, #300] @ (8017a60 <lwip_netconn_do_delconn+0x1ac>)
8017932: f240 427a movw r2, #1146 @ 0x47a
8017936: 494d ldr r1, [pc, #308] @ (8017a6c <lwip_netconn_do_delconn+0x1b8>)
8017938: 484b ldr r0, [pc, #300] @ (8017a68 <lwip_netconn_do_delconn+0x1b4>)
801793a: f013 f877 bl 802aa2c <iprintf>
(state != NETCONN_CONNECT) || IN_NONBLOCKING_CONNECT(msg->conn));
msg->err = ERR_OK;
801793e: 68fb ldr r3, [r7, #12]
8017940: 2200 movs r2, #0
8017942: 711a strb r2, [r3, #4]
#if LWIP_NETCONN_FULLDUPLEX
/* Mark mboxes invalid */
netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
netconn_drain(msg->conn);
8017944: 68fb ldr r3, [r7, #12]
8017946: 681b ldr r3, [r3, #0]
8017948: 4618 mov r0, r3
801794a: f7ff fdcb bl 80174e4 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */
if (msg->conn->pcb.tcp != NULL) {
801794e: 68fb ldr r3, [r7, #12]
8017950: 681b ldr r3, [r3, #0]
8017952: 685b ldr r3, [r3, #4]
8017954: 2b00 cmp r3, #0
8017956: d05d beq.n 8017a14 <lwip_netconn_do_delconn+0x160>
switch (NETCONNTYPE_GROUP(msg->conn->type)) {
8017958: 68fb ldr r3, [r7, #12]
801795a: 681b ldr r3, [r3, #0]
801795c: 781b ldrb r3, [r3, #0]
801795e: f003 03f0 and.w r3, r3, #240 @ 0xf0
8017962: 2b10 cmp r3, #16
8017964: d00d beq.n 8017982 <lwip_netconn_do_delconn+0xce>
8017966: 2b20 cmp r3, #32
8017968: d14f bne.n 8017a0a <lwip_netconn_do_delconn+0x156>
raw_remove(msg->conn->pcb.raw);
break;
#endif /* LWIP_RAW */
#if LWIP_UDP
case NETCONN_UDP:
msg->conn->pcb.udp->recv_arg = NULL;
801796a: 68fb ldr r3, [r7, #12]
801796c: 681b ldr r3, [r3, #0]
801796e: 685b ldr r3, [r3, #4]
8017970: 2200 movs r2, #0
8017972: 61da str r2, [r3, #28]
udp_remove(msg->conn->pcb.udp);
8017974: 68fb ldr r3, [r7, #12]
8017976: 681b ldr r3, [r3, #0]
8017978: 685b ldr r3, [r3, #4]
801797a: 4618 mov r0, r3
801797c: f00a ffc6 bl 802290c <udp_remove>
break;
8017980: e044 b.n 8017a0c <lwip_netconn_do_delconn+0x158>
#endif /* LWIP_UDP */
#if LWIP_TCP
case NETCONN_TCP:
LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
8017982: 68fb ldr r3, [r7, #12]
8017984: 681b ldr r3, [r3, #0]
8017986: 6adb ldr r3, [r3, #44] @ 0x2c
8017988: 2b00 cmp r3, #0
801798a: d006 beq.n 801799a <lwip_netconn_do_delconn+0xe6>
801798c: 4b34 ldr r3, [pc, #208] @ (8017a60 <lwip_netconn_do_delconn+0x1ac>)
801798e: f240 4294 movw r2, #1172 @ 0x494
8017992: 4937 ldr r1, [pc, #220] @ (8017a70 <lwip_netconn_do_delconn+0x1bc>)
8017994: 4834 ldr r0, [pc, #208] @ (8017a68 <lwip_netconn_do_delconn+0x1b4>)
8017996: f013 f849 bl 802aa2c <iprintf>
msg->conn->state = NETCONN_CLOSE;
801799a: 68fb ldr r3, [r7, #12]
801799c: 681b ldr r3, [r3, #0]
801799e: 2204 movs r2, #4
80179a0: 705a strb r2, [r3, #1]
msg->msg.sd.shut = NETCONN_SHUT_RDWR;
80179a2: 68fb ldr r3, [r7, #12]
80179a4: 2203 movs r2, #3
80179a6: 721a strb r2, [r3, #8]
msg->conn->current_msg = msg;
80179a8: 68fb ldr r3, [r7, #12]
80179aa: 681b ldr r3, [r3, #0]
80179ac: 68fa ldr r2, [r7, #12]
80179ae: 62da str r2, [r3, #44] @ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
80179b0: 68fb ldr r3, [r7, #12]
80179b2: 681b ldr r3, [r3, #0]
80179b4: 2100 movs r1, #0
80179b6: 4618 mov r0, r3
80179b8: f7ff fe12 bl 80175e0 <lwip_netconn_do_close_internal>
80179bc: 4603 mov r3, r0
80179be: 2b00 cmp r3, #0
80179c0: d049 beq.n 8017a56 <lwip_netconn_do_delconn+0x1a2>
LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
80179c2: 68fb ldr r3, [r7, #12]
80179c4: 681b ldr r3, [r3, #0]
80179c6: 785b ldrb r3, [r3, #1]
80179c8: 2b04 cmp r3, #4
80179ca: d006 beq.n 80179da <lwip_netconn_do_delconn+0x126>
80179cc: 4b24 ldr r3, [pc, #144] @ (8017a60 <lwip_netconn_do_delconn+0x1ac>)
80179ce: f240 429a movw r2, #1178 @ 0x49a
80179d2: 4928 ldr r1, [pc, #160] @ (8017a74 <lwip_netconn_do_delconn+0x1c0>)
80179d4: 4824 ldr r0, [pc, #144] @ (8017a68 <lwip_netconn_do_delconn+0x1b4>)
80179d6: f013 f829 bl 802aa2c <iprintf>
UNLOCK_TCPIP_CORE();
80179da: f7f9 fbed bl 80111b8 <sys_unlock_tcpip_core>
sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
80179de: 68fb ldr r3, [r7, #12]
80179e0: 681b ldr r3, [r3, #0]
80179e2: 330c adds r3, #12
80179e4: 2100 movs r1, #0
80179e6: 4618 mov r0, r3
80179e8: f00f fcc3 bl 8027372 <sys_arch_sem_wait>
LOCK_TCPIP_CORE();
80179ec: f7f9 fbd4 bl 8011198 <sys_lock_tcpip_core>
LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
80179f0: 68fb ldr r3, [r7, #12]
80179f2: 681b ldr r3, [r3, #0]
80179f4: 785b ldrb r3, [r3, #1]
80179f6: 2b00 cmp r3, #0
80179f8: d02d beq.n 8017a56 <lwip_netconn_do_delconn+0x1a2>
80179fa: 4b19 ldr r3, [pc, #100] @ (8017a60 <lwip_netconn_do_delconn+0x1ac>)
80179fc: f240 429e movw r2, #1182 @ 0x49e
8017a00: 491c ldr r1, [pc, #112] @ (8017a74 <lwip_netconn_do_delconn+0x1c0>)
8017a02: 4819 ldr r0, [pc, #100] @ (8017a68 <lwip_netconn_do_delconn+0x1b4>)
8017a04: f013 f812 bl 802aa2c <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
/* API_EVENT is called inside lwip_netconn_do_close_internal, before releasing
the application thread, so we can return at this point! */
return;
8017a08: e025 b.n 8017a56 <lwip_netconn_do_delconn+0x1a2>
#endif /* LWIP_TCP */
default:
break;
8017a0a: bf00 nop
}
msg->conn->pcb.tcp = NULL;
8017a0c: 68fb ldr r3, [r7, #12]
8017a0e: 681b ldr r3, [r3, #0]
8017a10: 2200 movs r2, #0
8017a12: 605a str r2, [r3, #4]
}
/* tcp netconns don't come here! */
/* @todo: this lets select make the socket readable and writable,
which is wrong! errfd instead? */
API_EVENT(msg->conn, NETCONN_EVT_RCVPLUS, 0);
8017a14: 68fb ldr r3, [r7, #12]
8017a16: 681b ldr r3, [r3, #0]
8017a18: 6b1b ldr r3, [r3, #48] @ 0x30
8017a1a: 2b00 cmp r3, #0
8017a1c: d007 beq.n 8017a2e <lwip_netconn_do_delconn+0x17a>
8017a1e: 68fb ldr r3, [r7, #12]
8017a20: 681b ldr r3, [r3, #0]
8017a22: 6b1b ldr r3, [r3, #48] @ 0x30
8017a24: 68fa ldr r2, [r7, #12]
8017a26: 6810 ldr r0, [r2, #0]
8017a28: 2200 movs r2, #0
8017a2a: 2100 movs r1, #0
8017a2c: 4798 blx r3
API_EVENT(msg->conn, NETCONN_EVT_SENDPLUS, 0);
8017a2e: 68fb ldr r3, [r7, #12]
8017a30: 681b ldr r3, [r3, #0]
8017a32: 6b1b ldr r3, [r3, #48] @ 0x30
8017a34: 2b00 cmp r3, #0
8017a36: d007 beq.n 8017a48 <lwip_netconn_do_delconn+0x194>
8017a38: 68fb ldr r3, [r7, #12]
8017a3a: 681b ldr r3, [r3, #0]
8017a3c: 6b1b ldr r3, [r3, #48] @ 0x30
8017a3e: 68fa ldr r2, [r7, #12]
8017a40: 6810 ldr r0, [r2, #0]
8017a42: 2200 movs r2, #0
8017a44: 2102 movs r1, #2
8017a46: 4798 blx r3
}
if (sys_sem_valid(LWIP_API_MSG_SEM(msg))) {
8017a48: 68fb ldr r3, [r7, #12]
8017a4a: 681b ldr r3, [r3, #0]
8017a4c: 330c adds r3, #12
8017a4e: 4618 mov r0, r3
8017a50: f00f fcda bl 8027408 <sys_sem_valid>
8017a54: e000 b.n 8017a58 <lwip_netconn_do_delconn+0x1a4>
return;
8017a56: bf00 nop
TCPIP_APIMSG_ACK(msg);
}
}
8017a58: 3710 adds r7, #16
8017a5a: 46bd mov sp, r7
8017a5c: bd80 pop {r7, pc}
8017a5e: bf00 nop
8017a60: 0802e124 .word 0x0802e124
8017a64: 0802e494 .word 0x0802e494
8017a68: 0802e168 .word 0x0802e168
8017a6c: 0802e4a8 .word 0x0802e4a8
8017a70: 0802e4c8 .word 0x0802e4c8
8017a74: 0802e4e4 .word 0x0802e4e4
08017a78 <lwip_netconn_do_connected>:
*
* @see tcp.h (struct tcp_pcb.connected) for parameters and return values
*/
static err_t
lwip_netconn_do_connected(void *arg, struct tcp_pcb *pcb, err_t err)
{
8017a78: b580 push {r7, lr}
8017a7a: b088 sub sp, #32
8017a7c: af00 add r7, sp, #0
8017a7e: 60f8 str r0, [r7, #12]
8017a80: 60b9 str r1, [r7, #8]
8017a82: 4613 mov r3, r2
8017a84: 71fb strb r3, [r7, #7]
struct netconn *conn;
int was_blocking;
sys_sem_t *op_completed_sem = NULL;
8017a86: 2300 movs r3, #0
8017a88: 61fb str r3, [r7, #28]
LWIP_UNUSED_ARG(pcb);
conn = (struct netconn *)arg;
8017a8a: 68fb ldr r3, [r7, #12]
8017a8c: 61bb str r3, [r7, #24]
if (conn == NULL) {
8017a8e: 69bb ldr r3, [r7, #24]
8017a90: 2b00 cmp r3, #0
8017a92: d102 bne.n 8017a9a <lwip_netconn_do_connected+0x22>
return ERR_VAL;
8017a94: f06f 0305 mvn.w r3, #5
8017a98: e074 b.n 8017b84 <lwip_netconn_do_connected+0x10c>
}
LWIP_ASSERT("conn->state == NETCONN_CONNECT", conn->state == NETCONN_CONNECT);
8017a9a: 69bb ldr r3, [r7, #24]
8017a9c: 785b ldrb r3, [r3, #1]
8017a9e: 2b03 cmp r3, #3
8017aa0: d006 beq.n 8017ab0 <lwip_netconn_do_connected+0x38>
8017aa2: 4b3a ldr r3, [pc, #232] @ (8017b8c <lwip_netconn_do_connected+0x114>)
8017aa4: f240 5223 movw r2, #1315 @ 0x523
8017aa8: 4939 ldr r1, [pc, #228] @ (8017b90 <lwip_netconn_do_connected+0x118>)
8017aaa: 483a ldr r0, [pc, #232] @ (8017b94 <lwip_netconn_do_connected+0x11c>)
8017aac: f012 ffbe bl 802aa2c <iprintf>
LWIP_ASSERT("(conn->current_msg != NULL) || conn->in_non_blocking_connect",
8017ab0: 69bb ldr r3, [r7, #24]
8017ab2: 6adb ldr r3, [r3, #44] @ 0x2c
8017ab4: 2b00 cmp r3, #0
8017ab6: d10d bne.n 8017ad4 <lwip_netconn_do_connected+0x5c>
8017ab8: 69bb ldr r3, [r7, #24]
8017aba: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8017abe: f003 0304 and.w r3, r3, #4
8017ac2: 2b00 cmp r3, #0
8017ac4: d106 bne.n 8017ad4 <lwip_netconn_do_connected+0x5c>
8017ac6: 4b31 ldr r3, [pc, #196] @ (8017b8c <lwip_netconn_do_connected+0x114>)
8017ac8: f240 5224 movw r2, #1316 @ 0x524
8017acc: 4932 ldr r1, [pc, #200] @ (8017b98 <lwip_netconn_do_connected+0x120>)
8017ace: 4831 ldr r0, [pc, #196] @ (8017b94 <lwip_netconn_do_connected+0x11c>)
8017ad0: f012 ffac bl 802aa2c <iprintf>
(conn->current_msg != NULL) || IN_NONBLOCKING_CONNECT(conn));
if (conn->current_msg != NULL) {
8017ad4: 69bb ldr r3, [r7, #24]
8017ad6: 6adb ldr r3, [r3, #44] @ 0x2c
8017ad8: 2b00 cmp r3, #0
8017ada: d008 beq.n 8017aee <lwip_netconn_do_connected+0x76>
conn->current_msg->err = err;
8017adc: 69bb ldr r3, [r7, #24]
8017ade: 6adb ldr r3, [r3, #44] @ 0x2c
8017ae0: 79fa ldrb r2, [r7, #7]
8017ae2: 711a strb r2, [r3, #4]
op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
8017ae4: 69bb ldr r3, [r7, #24]
8017ae6: 6adb ldr r3, [r3, #44] @ 0x2c
8017ae8: 681b ldr r3, [r3, #0]
8017aea: 330c adds r3, #12
8017aec: 61fb str r3, [r7, #28]
}
if ((NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) && (err == ERR_OK)) {
8017aee: 69bb ldr r3, [r7, #24]
8017af0: 781b ldrb r3, [r3, #0]
8017af2: f003 03f0 and.w r3, r3, #240 @ 0xf0
8017af6: 2b10 cmp r3, #16
8017af8: d106 bne.n 8017b08 <lwip_netconn_do_connected+0x90>
8017afa: f997 3007 ldrsb.w r3, [r7, #7]
8017afe: 2b00 cmp r3, #0
8017b00: d102 bne.n 8017b08 <lwip_netconn_do_connected+0x90>
setup_tcp(conn);
8017b02: 69b8 ldr r0, [r7, #24]
8017b04: f7ff fb82 bl 801720c <setup_tcp>
}
was_blocking = !IN_NONBLOCKING_CONNECT(conn);
8017b08: 69bb ldr r3, [r7, #24]
8017b0a: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8017b0e: f003 0304 and.w r3, r3, #4
8017b12: 2b00 cmp r3, #0
8017b14: bf0c ite eq
8017b16: 2301 moveq r3, #1
8017b18: 2300 movne r3, #0
8017b1a: b2db uxtb r3, r3
8017b1c: 617b str r3, [r7, #20]
SET_NONBLOCKING_CONNECT(conn, 0);
8017b1e: 69bb ldr r3, [r7, #24]
8017b20: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8017b24: f023 0304 bic.w r3, r3, #4
8017b28: b2da uxtb r2, r3
8017b2a: 69bb ldr r3, [r7, #24]
8017b2c: f883 2028 strb.w r2, [r3, #40] @ 0x28
LWIP_ASSERT("blocking connect state error",
8017b30: 697b ldr r3, [r7, #20]
8017b32: 2b00 cmp r3, #0
8017b34: d002 beq.n 8017b3c <lwip_netconn_do_connected+0xc4>
8017b36: 69fb ldr r3, [r7, #28]
8017b38: 2b00 cmp r3, #0
8017b3a: d10c bne.n 8017b56 <lwip_netconn_do_connected+0xde>
8017b3c: 697b ldr r3, [r7, #20]
8017b3e: 2b00 cmp r3, #0
8017b40: d102 bne.n 8017b48 <lwip_netconn_do_connected+0xd0>
8017b42: 69fb ldr r3, [r7, #28]
8017b44: 2b00 cmp r3, #0
8017b46: d006 beq.n 8017b56 <lwip_netconn_do_connected+0xde>
8017b48: 4b10 ldr r3, [pc, #64] @ (8017b8c <lwip_netconn_do_connected+0x114>)
8017b4a: f44f 62a6 mov.w r2, #1328 @ 0x530
8017b4e: 4913 ldr r1, [pc, #76] @ (8017b9c <lwip_netconn_do_connected+0x124>)
8017b50: 4810 ldr r0, [pc, #64] @ (8017b94 <lwip_netconn_do_connected+0x11c>)
8017b52: f012 ff6b bl 802aa2c <iprintf>
(was_blocking && op_completed_sem != NULL) ||
(!was_blocking && op_completed_sem == NULL));
conn->current_msg = NULL;
8017b56: 69bb ldr r3, [r7, #24]
8017b58: 2200 movs r2, #0
8017b5a: 62da str r2, [r3, #44] @ 0x2c
conn->state = NETCONN_NONE;
8017b5c: 69bb ldr r3, [r7, #24]
8017b5e: 2200 movs r2, #0
8017b60: 705a strb r2, [r3, #1]
API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
8017b62: 69bb ldr r3, [r7, #24]
8017b64: 6b1b ldr r3, [r3, #48] @ 0x30
8017b66: 2b00 cmp r3, #0
8017b68: d005 beq.n 8017b76 <lwip_netconn_do_connected+0xfe>
8017b6a: 69bb ldr r3, [r7, #24]
8017b6c: 6b1b ldr r3, [r3, #48] @ 0x30
8017b6e: 2200 movs r2, #0
8017b70: 2102 movs r1, #2
8017b72: 69b8 ldr r0, [r7, #24]
8017b74: 4798 blx r3
if (was_blocking) {
8017b76: 697b ldr r3, [r7, #20]
8017b78: 2b00 cmp r3, #0
8017b7a: d002 beq.n 8017b82 <lwip_netconn_do_connected+0x10a>
sys_sem_signal(op_completed_sem);
8017b7c: 69f8 ldr r0, [r7, #28]
8017b7e: f00f fc29 bl 80273d4 <sys_sem_signal>
}
return ERR_OK;
8017b82: 2300 movs r3, #0
}
8017b84: 4618 mov r0, r3
8017b86: 3720 adds r7, #32
8017b88: 46bd mov sp, r7
8017b8a: bd80 pop {r7, pc}
8017b8c: 0802e124 .word 0x0802e124
8017b90: 0802e4ec .word 0x0802e4ec
8017b94: 0802e168 .word 0x0802e168
8017b98: 0802e50c .word 0x0802e50c
8017b9c: 0802e54c .word 0x0802e54c
08017ba0 <lwip_netconn_do_connect>:
* @param m the api_msg pointing to the connection and containing
* the IP address and port to connect to
*/
void
lwip_netconn_do_connect(void *m)
{
8017ba0: b580 push {r7, lr}
8017ba2: b086 sub sp, #24
8017ba4: af00 add r7, sp, #0
8017ba6: 6078 str r0, [r7, #4]
struct api_msg *msg = (struct api_msg *)m;
8017ba8: 687b ldr r3, [r7, #4]
8017baa: 613b str r3, [r7, #16]
err_t err;
if (msg->conn->pcb.tcp == NULL) {
8017bac: 693b ldr r3, [r7, #16]
8017bae: 681b ldr r3, [r3, #0]
8017bb0: 685b ldr r3, [r3, #4]
8017bb2: 2b00 cmp r3, #0
8017bb4: d102 bne.n 8017bbc <lwip_netconn_do_connect+0x1c>
/* This may happen when calling netconn_connect() a second time */
err = ERR_CLSD;
8017bb6: 23f1 movs r3, #241 @ 0xf1
8017bb8: 75fb strb r3, [r7, #23]
8017bba: e09e b.n 8017cfa <lwip_netconn_do_connect+0x15a>
} else {
switch (NETCONNTYPE_GROUP(msg->conn->type)) {
8017bbc: 693b ldr r3, [r7, #16]
8017bbe: 681b ldr r3, [r3, #0]
8017bc0: 781b ldrb r3, [r3, #0]
8017bc2: f003 03f0 and.w r3, r3, #240 @ 0xf0
8017bc6: 2b10 cmp r3, #16
8017bc8: d00f beq.n 8017bea <lwip_netconn_do_connect+0x4a>
8017bca: 2b20 cmp r3, #32
8017bcc: f040 808a bne.w 8017ce4 <lwip_netconn_do_connect+0x144>
err = raw_connect(msg->conn->pcb.raw, API_EXPR_REF(msg->msg.bc.ipaddr));
break;
#endif /* LWIP_RAW */
#if LWIP_UDP
case NETCONN_UDP:
err = udp_connect(msg->conn->pcb.udp, API_EXPR_REF(msg->msg.bc.ipaddr), msg->msg.bc.port);
8017bd0: 693b ldr r3, [r7, #16]
8017bd2: 681b ldr r3, [r3, #0]
8017bd4: 6858 ldr r0, [r3, #4]
8017bd6: 693b ldr r3, [r7, #16]
8017bd8: 6899 ldr r1, [r3, #8]
8017bda: 693b ldr r3, [r7, #16]
8017bdc: 899b ldrh r3, [r3, #12]
8017bde: 461a mov r2, r3
8017be0: f00a fdd8 bl 8022794 <udp_connect>
8017be4: 4603 mov r3, r0
8017be6: 75fb strb r3, [r7, #23]
break;
8017be8: e087 b.n 8017cfa <lwip_netconn_do_connect+0x15a>
#endif /* LWIP_UDP */
#if LWIP_TCP
case NETCONN_TCP:
/* Prevent connect while doing any other action. */
if (msg->conn->state == NETCONN_CONNECT) {
8017bea: 693b ldr r3, [r7, #16]
8017bec: 681b ldr r3, [r3, #0]
8017bee: 785b ldrb r3, [r3, #1]
8017bf0: 2b03 cmp r3, #3
8017bf2: d102 bne.n 8017bfa <lwip_netconn_do_connect+0x5a>
err = ERR_ALREADY;
8017bf4: 23f7 movs r3, #247 @ 0xf7
8017bf6: 75fb strb r3, [r7, #23]
#endif /* LWIP_TCPIP_CORE_LOCKING */
return;
}
}
}
break;
8017bf8: e07e b.n 8017cf8 <lwip_netconn_do_connect+0x158>
} else if (msg->conn->state != NETCONN_NONE) {
8017bfa: 693b ldr r3, [r7, #16]
8017bfc: 681b ldr r3, [r3, #0]
8017bfe: 785b ldrb r3, [r3, #1]
8017c00: 2b00 cmp r3, #0
8017c02: d002 beq.n 8017c0a <lwip_netconn_do_connect+0x6a>
err = ERR_ISCONN;
8017c04: 23f6 movs r3, #246 @ 0xf6
8017c06: 75fb strb r3, [r7, #23]
break;
8017c08: e076 b.n 8017cf8 <lwip_netconn_do_connect+0x158>
setup_tcp(msg->conn);
8017c0a: 693b ldr r3, [r7, #16]
8017c0c: 681b ldr r3, [r3, #0]
8017c0e: 4618 mov r0, r3
8017c10: f7ff fafc bl 801720c <setup_tcp>
err = tcp_connect(msg->conn->pcb.tcp, API_EXPR_REF(msg->msg.bc.ipaddr),
8017c14: 693b ldr r3, [r7, #16]
8017c16: 681b ldr r3, [r3, #0]
8017c18: 6858 ldr r0, [r3, #4]
8017c1a: 693b ldr r3, [r7, #16]
8017c1c: 6899 ldr r1, [r3, #8]
8017c1e: 693b ldr r3, [r7, #16]
8017c20: 899a ldrh r2, [r3, #12]
8017c22: 4b3a ldr r3, [pc, #232] @ (8017d0c <lwip_netconn_do_connect+0x16c>)
8017c24: f004 fb90 bl 801c348 <tcp_connect>
8017c28: 4603 mov r3, r0
8017c2a: 75fb strb r3, [r7, #23]
if (err == ERR_OK) {
8017c2c: f997 3017 ldrsb.w r3, [r7, #23]
8017c30: 2b00 cmp r3, #0
8017c32: d161 bne.n 8017cf8 <lwip_netconn_do_connect+0x158>
u8_t non_blocking = netconn_is_nonblocking(msg->conn);
8017c34: 693b ldr r3, [r7, #16]
8017c36: 681b ldr r3, [r3, #0]
8017c38: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8017c3c: f003 0302 and.w r3, r3, #2
8017c40: 2b00 cmp r3, #0
8017c42: bf14 ite ne
8017c44: 2301 movne r3, #1
8017c46: 2300 moveq r3, #0
8017c48: b2db uxtb r3, r3
8017c4a: 73fb strb r3, [r7, #15]
msg->conn->state = NETCONN_CONNECT;
8017c4c: 693b ldr r3, [r7, #16]
8017c4e: 681b ldr r3, [r3, #0]
8017c50: 2203 movs r2, #3
8017c52: 705a strb r2, [r3, #1]
SET_NONBLOCKING_CONNECT(msg->conn, non_blocking);
8017c54: 7bfb ldrb r3, [r7, #15]
8017c56: 2b00 cmp r3, #0
8017c58: d00b beq.n 8017c72 <lwip_netconn_do_connect+0xd2>
8017c5a: 693b ldr r3, [r7, #16]
8017c5c: 681b ldr r3, [r3, #0]
8017c5e: f893 2028 ldrb.w r2, [r3, #40] @ 0x28
8017c62: 693b ldr r3, [r7, #16]
8017c64: 681b ldr r3, [r3, #0]
8017c66: f042 0204 orr.w r2, r2, #4
8017c6a: b2d2 uxtb r2, r2
8017c6c: f883 2028 strb.w r2, [r3, #40] @ 0x28
8017c70: e00a b.n 8017c88 <lwip_netconn_do_connect+0xe8>
8017c72: 693b ldr r3, [r7, #16]
8017c74: 681b ldr r3, [r3, #0]
8017c76: f893 2028 ldrb.w r2, [r3, #40] @ 0x28
8017c7a: 693b ldr r3, [r7, #16]
8017c7c: 681b ldr r3, [r3, #0]
8017c7e: f022 0204 bic.w r2, r2, #4
8017c82: b2d2 uxtb r2, r2
8017c84: f883 2028 strb.w r2, [r3, #40] @ 0x28
if (non_blocking) {
8017c88: 7bfb ldrb r3, [r7, #15]
8017c8a: 2b00 cmp r3, #0
8017c8c: d002 beq.n 8017c94 <lwip_netconn_do_connect+0xf4>
err = ERR_INPROGRESS;
8017c8e: 23fb movs r3, #251 @ 0xfb
8017c90: 75fb strb r3, [r7, #23]
break;
8017c92: e031 b.n 8017cf8 <lwip_netconn_do_connect+0x158>
msg->conn->current_msg = msg;
8017c94: 693b ldr r3, [r7, #16]
8017c96: 681b ldr r3, [r3, #0]
8017c98: 693a ldr r2, [r7, #16]
8017c9a: 62da str r2, [r3, #44] @ 0x2c
LWIP_ASSERT("state!", msg->conn->state == NETCONN_CONNECT);
8017c9c: 693b ldr r3, [r7, #16]
8017c9e: 681b ldr r3, [r3, #0]
8017ca0: 785b ldrb r3, [r3, #1]
8017ca2: 2b03 cmp r3, #3
8017ca4: d006 beq.n 8017cb4 <lwip_netconn_do_connect+0x114>
8017ca6: 4b1a ldr r3, [pc, #104] @ (8017d10 <lwip_netconn_do_connect+0x170>)
8017ca8: f44f 62ae mov.w r2, #1392 @ 0x570
8017cac: 4919 ldr r1, [pc, #100] @ (8017d14 <lwip_netconn_do_connect+0x174>)
8017cae: 481a ldr r0, [pc, #104] @ (8017d18 <lwip_netconn_do_connect+0x178>)
8017cb0: f012 febc bl 802aa2c <iprintf>
UNLOCK_TCPIP_CORE();
8017cb4: f7f9 fa80 bl 80111b8 <sys_unlock_tcpip_core>
sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
8017cb8: 693b ldr r3, [r7, #16]
8017cba: 681b ldr r3, [r3, #0]
8017cbc: 330c adds r3, #12
8017cbe: 2100 movs r1, #0
8017cc0: 4618 mov r0, r3
8017cc2: f00f fb56 bl 8027372 <sys_arch_sem_wait>
LOCK_TCPIP_CORE();
8017cc6: f7f9 fa67 bl 8011198 <sys_lock_tcpip_core>
LWIP_ASSERT("state!", msg->conn->state != NETCONN_CONNECT);
8017cca: 693b ldr r3, [r7, #16]
8017ccc: 681b ldr r3, [r3, #0]
8017cce: 785b ldrb r3, [r3, #1]
8017cd0: 2b03 cmp r3, #3
8017cd2: d116 bne.n 8017d02 <lwip_netconn_do_connect+0x162>
8017cd4: 4b0e ldr r3, [pc, #56] @ (8017d10 <lwip_netconn_do_connect+0x170>)
8017cd6: f240 5274 movw r2, #1396 @ 0x574
8017cda: 490e ldr r1, [pc, #56] @ (8017d14 <lwip_netconn_do_connect+0x174>)
8017cdc: 480e ldr r0, [pc, #56] @ (8017d18 <lwip_netconn_do_connect+0x178>)
8017cde: f012 fea5 bl 802aa2c <iprintf>
return;
8017ce2: e00e b.n 8017d02 <lwip_netconn_do_connect+0x162>
#endif /* LWIP_TCP */
default:
LWIP_ERROR("Invalid netconn type", 0, do {
8017ce4: 4b0a ldr r3, [pc, #40] @ (8017d10 <lwip_netconn_do_connect+0x170>)
8017ce6: f240 527d movw r2, #1405 @ 0x57d
8017cea: 490c ldr r1, [pc, #48] @ (8017d1c <lwip_netconn_do_connect+0x17c>)
8017cec: 480a ldr r0, [pc, #40] @ (8017d18 <lwip_netconn_do_connect+0x178>)
8017cee: f012 fe9d bl 802aa2c <iprintf>
8017cf2: 23fa movs r3, #250 @ 0xfa
8017cf4: 75fb strb r3, [r7, #23]
err = ERR_VAL;
} while (0));
break;
8017cf6: e000 b.n 8017cfa <lwip_netconn_do_connect+0x15a>
break;
8017cf8: bf00 nop
}
}
msg->err = err;
8017cfa: 693b ldr r3, [r7, #16]
8017cfc: 7dfa ldrb r2, [r7, #23]
8017cfe: 711a strb r2, [r3, #4]
8017d00: e000 b.n 8017d04 <lwip_netconn_do_connect+0x164>
return;
8017d02: bf00 nop
/* For all other protocols, netconn_connect() calls netconn_apimsg(),
so use TCPIP_APIMSG_ACK() here. */
TCPIP_APIMSG_ACK(msg);
}
8017d04: 3718 adds r7, #24
8017d06: 46bd mov sp, r7
8017d08: bd80 pop {r7, pc}
8017d0a: bf00 nop
8017d0c: 08017a79 .word 0x08017a79
8017d10: 0802e124 .word 0x0802e124
8017d14: 0802e4e4 .word 0x0802e4e4
8017d18: 0802e168 .word 0x0802e168
8017d1c: 0802e56c .word 0x0802e56c
08017d20 <lwip_netconn_do_disconnect>:
*
* @param m the api_msg pointing to the connection to disconnect
*/
void
lwip_netconn_do_disconnect(void *m)
{
8017d20: b580 push {r7, lr}
8017d22: b084 sub sp, #16
8017d24: af00 add r7, sp, #0
8017d26: 6078 str r0, [r7, #4]
struct api_msg *msg = (struct api_msg *)m;
8017d28: 687b ldr r3, [r7, #4]
8017d2a: 60fb str r3, [r7, #12]
#if LWIP_UDP
if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) {
8017d2c: 68fb ldr r3, [r7, #12]
8017d2e: 681b ldr r3, [r3, #0]
8017d30: 781b ldrb r3, [r3, #0]
8017d32: f003 03f0 and.w r3, r3, #240 @ 0xf0
8017d36: 2b20 cmp r3, #32
8017d38: d109 bne.n 8017d4e <lwip_netconn_do_disconnect+0x2e>
udp_disconnect(msg->conn->pcb.udp);
8017d3a: 68fb ldr r3, [r7, #12]
8017d3c: 681b ldr r3, [r3, #0]
8017d3e: 685b ldr r3, [r3, #4]
8017d40: 4618 mov r0, r3
8017d42: f00a fd97 bl 8022874 <udp_disconnect>
msg->err = ERR_OK;
8017d46: 68fb ldr r3, [r7, #12]
8017d48: 2200 movs r2, #0
8017d4a: 711a strb r2, [r3, #4]
#endif /* LWIP_UDP */
{
msg->err = ERR_VAL;
}
TCPIP_APIMSG_ACK(msg);
}
8017d4c: e002 b.n 8017d54 <lwip_netconn_do_disconnect+0x34>
msg->err = ERR_VAL;
8017d4e: 68fb ldr r3, [r7, #12]
8017d50: 22fa movs r2, #250 @ 0xfa
8017d52: 711a strb r2, [r3, #4]
}
8017d54: bf00 nop
8017d56: 3710 adds r7, #16
8017d58: 46bd mov sp, r7
8017d5a: bd80 pop {r7, pc}
08017d5c <lwip_netconn_do_send>:
*
* @param m the api_msg pointing to the connection
*/
void
lwip_netconn_do_send(void *m)
{
8017d5c: b580 push {r7, lr}
8017d5e: b084 sub sp, #16
8017d60: af00 add r7, sp, #0
8017d62: 6078 str r0, [r7, #4]
struct api_msg *msg = (struct api_msg *)m;
8017d64: 687b ldr r3, [r7, #4]
8017d66: 60bb str r3, [r7, #8]
err_t err = netconn_err(msg->conn);
8017d68: 68bb ldr r3, [r7, #8]
8017d6a: 681b ldr r3, [r3, #0]
8017d6c: 4618 mov r0, r3
8017d6e: f7fe fef9 bl 8016b64 <netconn_err>
8017d72: 4603 mov r3, r0
8017d74: 73fb strb r3, [r7, #15]
if (err == ERR_OK) {
8017d76: f997 300f ldrsb.w r3, [r7, #15]
8017d7a: 2b00 cmp r3, #0
8017d7c: d134 bne.n 8017de8 <lwip_netconn_do_send+0x8c>
if (msg->conn->pcb.tcp != NULL) {
8017d7e: 68bb ldr r3, [r7, #8]
8017d80: 681b ldr r3, [r3, #0]
8017d82: 685b ldr r3, [r3, #4]
8017d84: 2b00 cmp r3, #0
8017d86: d02d beq.n 8017de4 <lwip_netconn_do_send+0x88>
switch (NETCONNTYPE_GROUP(msg->conn->type)) {
8017d88: 68bb ldr r3, [r7, #8]
8017d8a: 681b ldr r3, [r3, #0]
8017d8c: 781b ldrb r3, [r3, #0]
8017d8e: f003 03f0 and.w r3, r3, #240 @ 0xf0
8017d92: 2b20 cmp r3, #32
8017d94: d123 bne.n 8017dde <lwip_netconn_do_send+0x82>
err = udp_sendto_chksum(msg->conn->pcb.udp, msg->msg.b->p,
&msg->msg.b->addr, msg->msg.b->port,
msg->msg.b->flags & NETBUF_FLAG_CHKSUM, msg->msg.b->toport_chksum);
}
#else /* LWIP_CHECKSUM_ON_COPY */
if (ip_addr_isany_val(msg->msg.b->addr) || IP_IS_ANY_TYPE_VAL(msg->msg.b->addr)) {
8017d96: 68bb ldr r3, [r7, #8]
8017d98: 689b ldr r3, [r3, #8]
8017d9a: 689b ldr r3, [r3, #8]
8017d9c: 2b00 cmp r3, #0
8017d9e: d10c bne.n 8017dba <lwip_netconn_do_send+0x5e>
err = udp_send(msg->conn->pcb.udp, msg->msg.b->p);
8017da0: 68bb ldr r3, [r7, #8]
8017da2: 681b ldr r3, [r3, #0]
8017da4: 685a ldr r2, [r3, #4]
8017da6: 68bb ldr r3, [r7, #8]
8017da8: 689b ldr r3, [r3, #8]
8017daa: 681b ldr r3, [r3, #0]
8017dac: 4619 mov r1, r3
8017dae: 4610 mov r0, r2
8017db0: f00a fa7a bl 80222a8 <udp_send>
8017db4: 4603 mov r3, r0
8017db6: 73fb strb r3, [r7, #15]
} else {
err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
}
#endif /* LWIP_CHECKSUM_ON_COPY */
break;
8017db8: e016 b.n 8017de8 <lwip_netconn_do_send+0x8c>
err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
8017dba: 68bb ldr r3, [r7, #8]
8017dbc: 681b ldr r3, [r3, #0]
8017dbe: 6858 ldr r0, [r3, #4]
8017dc0: 68bb ldr r3, [r7, #8]
8017dc2: 689b ldr r3, [r3, #8]
8017dc4: 6819 ldr r1, [r3, #0]
8017dc6: 68bb ldr r3, [r7, #8]
8017dc8: 689b ldr r3, [r3, #8]
8017dca: f103 0208 add.w r2, r3, #8
8017dce: 68bb ldr r3, [r7, #8]
8017dd0: 689b ldr r3, [r3, #8]
8017dd2: 899b ldrh r3, [r3, #12]
8017dd4: f00a fa9c bl 8022310 <udp_sendto>
8017dd8: 4603 mov r3, r0
8017dda: 73fb strb r3, [r7, #15]
break;
8017ddc: e004 b.n 8017de8 <lwip_netconn_do_send+0x8c>
#endif /* LWIP_UDP */
default:
err = ERR_CONN;
8017dde: 23f5 movs r3, #245 @ 0xf5
8017de0: 73fb strb r3, [r7, #15]
break;
8017de2: e001 b.n 8017de8 <lwip_netconn_do_send+0x8c>
}
} else {
err = ERR_CONN;
8017de4: 23f5 movs r3, #245 @ 0xf5
8017de6: 73fb strb r3, [r7, #15]
}
}
msg->err = err;
8017de8: 68bb ldr r3, [r7, #8]
8017dea: 7bfa ldrb r2, [r7, #15]
8017dec: 711a strb r2, [r3, #4]
TCPIP_APIMSG_ACK(msg);
}
8017dee: bf00 nop
8017df0: 3710 adds r7, #16
8017df2: 46bd mov sp, r7
8017df4: bd80 pop {r7, pc}
08017df6 <lwip_netconn_do_recv>:
*
* @param m the api_msg pointing to the connection
*/
void
lwip_netconn_do_recv(void *m)
{
8017df6: b580 push {r7, lr}
8017df8: b086 sub sp, #24
8017dfa: af00 add r7, sp, #0
8017dfc: 6078 str r0, [r7, #4]
struct api_msg *msg = (struct api_msg *)m;
8017dfe: 687b ldr r3, [r7, #4]
8017e00: 613b str r3, [r7, #16]
msg->err = ERR_OK;
8017e02: 693b ldr r3, [r7, #16]
8017e04: 2200 movs r2, #0
8017e06: 711a strb r2, [r3, #4]
if (msg->conn->pcb.tcp != NULL) {
8017e08: 693b ldr r3, [r7, #16]
8017e0a: 681b ldr r3, [r3, #0]
8017e0c: 685b ldr r3, [r3, #4]
8017e0e: 2b00 cmp r3, #0
8017e10: d022 beq.n 8017e58 <lwip_netconn_do_recv+0x62>
if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
8017e12: 693b ldr r3, [r7, #16]
8017e14: 681b ldr r3, [r3, #0]
8017e16: 781b ldrb r3, [r3, #0]
8017e18: f003 03f0 and.w r3, r3, #240 @ 0xf0
8017e1c: 2b10 cmp r3, #16
8017e1e: d11b bne.n 8017e58 <lwip_netconn_do_recv+0x62>
size_t remaining = msg->msg.r.len;
8017e20: 693b ldr r3, [r7, #16]
8017e22: 689b ldr r3, [r3, #8]
8017e24: 617b str r3, [r7, #20]
do {
u16_t recved = (u16_t)((remaining > 0xffff) ? 0xffff : remaining);
8017e26: 697b ldr r3, [r7, #20]
8017e28: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8017e2c: d202 bcs.n 8017e34 <lwip_netconn_do_recv+0x3e>
8017e2e: 697b ldr r3, [r7, #20]
8017e30: b29b uxth r3, r3
8017e32: e001 b.n 8017e38 <lwip_netconn_do_recv+0x42>
8017e34: f64f 73ff movw r3, #65535 @ 0xffff
8017e38: 81fb strh r3, [r7, #14]
tcp_recved(msg->conn->pcb.tcp, recved);
8017e3a: 693b ldr r3, [r7, #16]
8017e3c: 681b ldr r3, [r3, #0]
8017e3e: 685b ldr r3, [r3, #4]
8017e40: 89fa ldrh r2, [r7, #14]
8017e42: 4611 mov r1, r2
8017e44: 4618 mov r0, r3
8017e46: f004 f9e5 bl 801c214 <tcp_recved>
remaining -= recved;
8017e4a: 89fb ldrh r3, [r7, #14]
8017e4c: 697a ldr r2, [r7, #20]
8017e4e: 1ad3 subs r3, r2, r3
8017e50: 617b str r3, [r7, #20]
} while (remaining != 0);
8017e52: 697b ldr r3, [r7, #20]
8017e54: 2b00 cmp r3, #0
8017e56: d1e6 bne.n 8017e26 <lwip_netconn_do_recv+0x30>
}
}
TCPIP_APIMSG_ACK(msg);
}
8017e58: bf00 nop
8017e5a: 3718 adds r7, #24
8017e5c: 46bd mov sp, r7
8017e5e: bd80 pop {r7, pc}
08017e60 <lwip_netconn_do_writemore>:
* @return ERR_OK
* ERR_MEM if LWIP_TCPIP_CORE_LOCKING=1 and sending hasn't yet finished
*/
static err_t
lwip_netconn_do_writemore(struct netconn *conn WRITE_DELAYED_PARAM)
{
8017e60: b580 push {r7, lr}
8017e62: b088 sub sp, #32
8017e64: af00 add r7, sp, #0
8017e66: 6078 str r0, [r7, #4]
8017e68: 460b mov r3, r1
8017e6a: 70fb strb r3, [r7, #3]
err_t err;
const void *dataptr;
u16_t len, available;
u8_t write_finished = 0;
8017e6c: 2300 movs r3, #0
8017e6e: 76fb strb r3, [r7, #27]
size_t diff;
u8_t dontblock;
u8_t apiflags;
u8_t write_more;
LWIP_ASSERT("conn != NULL", conn != NULL);
8017e70: 687b ldr r3, [r7, #4]
8017e72: 2b00 cmp r3, #0
8017e74: d106 bne.n 8017e84 <lwip_netconn_do_writemore+0x24>
8017e76: 4b61 ldr r3, [pc, #388] @ (8017ffc <lwip_netconn_do_writemore+0x19c>)
8017e78: f240 6273 movw r2, #1651 @ 0x673
8017e7c: 4960 ldr r1, [pc, #384] @ (8018000 <lwip_netconn_do_writemore+0x1a0>)
8017e7e: 4861 ldr r0, [pc, #388] @ (8018004 <lwip_netconn_do_writemore+0x1a4>)
8017e80: f012 fdd4 bl 802aa2c <iprintf>
LWIP_ASSERT("conn->state == NETCONN_WRITE", (conn->state == NETCONN_WRITE));
8017e84: 687b ldr r3, [r7, #4]
8017e86: 785b ldrb r3, [r3, #1]
8017e88: 2b01 cmp r3, #1
8017e8a: d006 beq.n 8017e9a <lwip_netconn_do_writemore+0x3a>
8017e8c: 4b5b ldr r3, [pc, #364] @ (8017ffc <lwip_netconn_do_writemore+0x19c>)
8017e8e: f240 6274 movw r2, #1652 @ 0x674
8017e92: 495d ldr r1, [pc, #372] @ (8018008 <lwip_netconn_do_writemore+0x1a8>)
8017e94: 485b ldr r0, [pc, #364] @ (8018004 <lwip_netconn_do_writemore+0x1a4>)
8017e96: f012 fdc9 bl 802aa2c <iprintf>
LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
8017e9a: 687b ldr r3, [r7, #4]
8017e9c: 6adb ldr r3, [r3, #44] @ 0x2c
8017e9e: 2b00 cmp r3, #0
8017ea0: d106 bne.n 8017eb0 <lwip_netconn_do_writemore+0x50>
8017ea2: 4b56 ldr r3, [pc, #344] @ (8017ffc <lwip_netconn_do_writemore+0x19c>)
8017ea4: f240 6275 movw r2, #1653 @ 0x675
8017ea8: 4958 ldr r1, [pc, #352] @ (801800c <lwip_netconn_do_writemore+0x1ac>)
8017eaa: 4856 ldr r0, [pc, #344] @ (8018004 <lwip_netconn_do_writemore+0x1a4>)
8017eac: f012 fdbe bl 802aa2c <iprintf>
LWIP_ASSERT("conn->pcb.tcp != NULL", conn->pcb.tcp != NULL);
8017eb0: 687b ldr r3, [r7, #4]
8017eb2: 685b ldr r3, [r3, #4]
8017eb4: 2b00 cmp r3, #0
8017eb6: d106 bne.n 8017ec6 <lwip_netconn_do_writemore+0x66>
8017eb8: 4b50 ldr r3, [pc, #320] @ (8017ffc <lwip_netconn_do_writemore+0x19c>)
8017eba: f240 6276 movw r2, #1654 @ 0x676
8017ebe: 4954 ldr r1, [pc, #336] @ (8018010 <lwip_netconn_do_writemore+0x1b0>)
8017ec0: 4850 ldr r0, [pc, #320] @ (8018004 <lwip_netconn_do_writemore+0x1a4>)
8017ec2: f012 fdb3 bl 802aa2c <iprintf>
LWIP_ASSERT("conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len",
8017ec6: 687b ldr r3, [r7, #4]
8017ec8: 6adb ldr r3, [r3, #44] @ 0x2c
8017eca: 699a ldr r2, [r3, #24]
8017ecc: 687b ldr r3, [r7, #4]
8017ece: 6adb ldr r3, [r3, #44] @ 0x2c
8017ed0: 695b ldr r3, [r3, #20]
8017ed2: 429a cmp r2, r3
8017ed4: d306 bcc.n 8017ee4 <lwip_netconn_do_writemore+0x84>
8017ed6: 4b49 ldr r3, [pc, #292] @ (8017ffc <lwip_netconn_do_writemore+0x19c>)
8017ed8: f240 6277 movw r2, #1655 @ 0x677
8017edc: 494d ldr r1, [pc, #308] @ (8018014 <lwip_netconn_do_writemore+0x1b4>)
8017ede: 4849 ldr r0, [pc, #292] @ (8018004 <lwip_netconn_do_writemore+0x1a4>)
8017ee0: f012 fda4 bl 802aa2c <iprintf>
conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len);
LWIP_ASSERT("conn->current_msg->msg.w.vector_cnt > 0", conn->current_msg->msg.w.vector_cnt > 0);
8017ee4: 687b ldr r3, [r7, #4]
8017ee6: 6adb ldr r3, [r3, #44] @ 0x2c
8017ee8: 899b ldrh r3, [r3, #12]
8017eea: 2b00 cmp r3, #0
8017eec: d106 bne.n 8017efc <lwip_netconn_do_writemore+0x9c>
8017eee: 4b43 ldr r3, [pc, #268] @ (8017ffc <lwip_netconn_do_writemore+0x19c>)
8017ef0: f240 6279 movw r2, #1657 @ 0x679
8017ef4: 4948 ldr r1, [pc, #288] @ (8018018 <lwip_netconn_do_writemore+0x1b8>)
8017ef6: 4843 ldr r0, [pc, #268] @ (8018004 <lwip_netconn_do_writemore+0x1a4>)
8017ef8: f012 fd98 bl 802aa2c <iprintf>
apiflags = conn->current_msg->msg.w.apiflags;
8017efc: 687b ldr r3, [r7, #4]
8017efe: 6adb ldr r3, [r3, #44] @ 0x2c
8017f00: 7f1b ldrb r3, [r3, #28]
8017f02: 76bb strb r3, [r7, #26]
dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
8017f04: 687b ldr r3, [r7, #4]
8017f06: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
8017f0a: f003 0302 and.w r3, r3, #2
8017f0e: 2b00 cmp r3, #0
8017f10: d104 bne.n 8017f1c <lwip_netconn_do_writemore+0xbc>
8017f12: 7ebb ldrb r3, [r7, #26]
8017f14: f003 0304 and.w r3, r3, #4
8017f18: 2b00 cmp r3, #0
8017f1a: d001 beq.n 8017f20 <lwip_netconn_do_writemore+0xc0>
8017f1c: 2301 movs r3, #1
8017f1e: e000 b.n 8017f22 <lwip_netconn_do_writemore+0xc2>
8017f20: 2300 movs r3, #0
8017f22: 763b strb r3, [r7, #24]
}
} else
#endif /* LWIP_SO_SNDTIMEO */
{
do {
dataptr = (const u8_t *)conn->current_msg->msg.w.vector->ptr + conn->current_msg->msg.w.vector_off;
8017f24: 687b ldr r3, [r7, #4]
8017f26: 6adb ldr r3, [r3, #44] @ 0x2c
8017f28: 689b ldr r3, [r3, #8]
8017f2a: 681a ldr r2, [r3, #0]
8017f2c: 687b ldr r3, [r7, #4]
8017f2e: 6adb ldr r3, [r3, #44] @ 0x2c
8017f30: 691b ldr r3, [r3, #16]
8017f32: 4413 add r3, r2
8017f34: 617b str r3, [r7, #20]
diff = conn->current_msg->msg.w.vector->len - conn->current_msg->msg.w.vector_off;
8017f36: 687b ldr r3, [r7, #4]
8017f38: 6adb ldr r3, [r3, #44] @ 0x2c
8017f3a: 689b ldr r3, [r3, #8]
8017f3c: 685a ldr r2, [r3, #4]
8017f3e: 687b ldr r3, [r7, #4]
8017f40: 6adb ldr r3, [r3, #44] @ 0x2c
8017f42: 691b ldr r3, [r3, #16]
8017f44: 1ad3 subs r3, r2, r3
8017f46: 613b str r3, [r7, #16]
if (diff > 0xffffUL) { /* max_u16_t */
8017f48: 693b ldr r3, [r7, #16]
8017f4a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8017f4e: d307 bcc.n 8017f60 <lwip_netconn_do_writemore+0x100>
len = 0xffff;
8017f50: f64f 73ff movw r3, #65535 @ 0xffff
8017f54: 83bb strh r3, [r7, #28]
apiflags |= TCP_WRITE_FLAG_MORE;
8017f56: 7ebb ldrb r3, [r7, #26]
8017f58: f043 0302 orr.w r3, r3, #2
8017f5c: 76bb strb r3, [r7, #26]
8017f5e: e001 b.n 8017f64 <lwip_netconn_do_writemore+0x104>
} else {
len = (u16_t)diff;
8017f60: 693b ldr r3, [r7, #16]
8017f62: 83bb strh r3, [r7, #28]
}
available = tcp_sndbuf(conn->pcb.tcp);
8017f64: 687b ldr r3, [r7, #4]
8017f66: 685b ldr r3, [r3, #4]
8017f68: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
8017f6c: 81fb strh r3, [r7, #14]
if (available < len) {
8017f6e: 89fa ldrh r2, [r7, #14]
8017f70: 8bbb ldrh r3, [r7, #28]
8017f72: 429a cmp r2, r3
8017f74: d216 bcs.n 8017fa4 <lwip_netconn_do_writemore+0x144>
/* don't try to write more than sendbuf */
len = available;
8017f76: 89fb ldrh r3, [r7, #14]
8017f78: 83bb strh r3, [r7, #28]
if (dontblock) {
8017f7a: 7e3b ldrb r3, [r7, #24]
8017f7c: 2b00 cmp r3, #0
8017f7e: d00d beq.n 8017f9c <lwip_netconn_do_writemore+0x13c>
if (!len) {
8017f80: 8bbb ldrh r3, [r7, #28]
8017f82: 2b00 cmp r3, #0
8017f84: d10e bne.n 8017fa4 <lwip_netconn_do_writemore+0x144>
/* set error according to partial write or not */
err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
8017f86: 687b ldr r3, [r7, #4]
8017f88: 6adb ldr r3, [r3, #44] @ 0x2c
8017f8a: 699b ldr r3, [r3, #24]
8017f8c: 2b00 cmp r3, #0
8017f8e: d102 bne.n 8017f96 <lwip_netconn_do_writemore+0x136>
8017f90: f06f 0306 mvn.w r3, #6
8017f94: e000 b.n 8017f98 <lwip_netconn_do_writemore+0x138>
8017f96: 2300 movs r3, #0
8017f98: 77fb strb r3, [r7, #31]
goto err_mem;
8017f9a: e08f b.n 80180bc <lwip_netconn_do_writemore+0x25c>
}
} else {
apiflags |= TCP_WRITE_FLAG_MORE;
8017f9c: 7ebb ldrb r3, [r7, #26]
8017f9e: f043 0302 orr.w r3, r3, #2
8017fa2: 76bb strb r3, [r7, #26]
}
}
LWIP_ASSERT("lwip_netconn_do_writemore: invalid length!",
8017fa4: 687b ldr r3, [r7, #4]
8017fa6: 6adb ldr r3, [r3, #44] @ 0x2c
8017fa8: 691a ldr r2, [r3, #16]
8017faa: 8bbb ldrh r3, [r7, #28]
8017fac: 441a add r2, r3
8017fae: 687b ldr r3, [r7, #4]
8017fb0: 6adb ldr r3, [r3, #44] @ 0x2c
8017fb2: 689b ldr r3, [r3, #8]
8017fb4: 685b ldr r3, [r3, #4]
8017fb6: 429a cmp r2, r3
8017fb8: d906 bls.n 8017fc8 <lwip_netconn_do_writemore+0x168>
8017fba: 4b10 ldr r3, [pc, #64] @ (8017ffc <lwip_netconn_do_writemore+0x19c>)
8017fbc: f240 62a3 movw r2, #1699 @ 0x6a3
8017fc0: 4916 ldr r1, [pc, #88] @ (801801c <lwip_netconn_do_writemore+0x1bc>)
8017fc2: 4810 ldr r0, [pc, #64] @ (8018004 <lwip_netconn_do_writemore+0x1a4>)
8017fc4: f012 fd32 bl 802aa2c <iprintf>
((conn->current_msg->msg.w.vector_off + len) <= conn->current_msg->msg.w.vector->len));
/* we should loop around for more sending in the following cases:
1) We couldn't finish the current vector because of 16-bit size limitations.
tcp_write() and tcp_sndbuf() both are limited to 16-bit sizes
2) We are sending the remainder of the current vector and have more */
if ((len == 0xffff && diff > 0xffffUL) ||
8017fc8: 8bbb ldrh r3, [r7, #28]
8017fca: f64f 72ff movw r2, #65535 @ 0xffff
8017fce: 4293 cmp r3, r2
8017fd0: d103 bne.n 8017fda <lwip_netconn_do_writemore+0x17a>
8017fd2: 693b ldr r3, [r7, #16]
8017fd4: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8017fd8: d209 bcs.n 8017fee <lwip_netconn_do_writemore+0x18e>
(len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
8017fda: 693b ldr r3, [r7, #16]
8017fdc: b29b uxth r3, r3
if ((len == 0xffff && diff > 0xffffUL) ||
8017fde: 8bba ldrh r2, [r7, #28]
8017fe0: 429a cmp r2, r3
8017fe2: d11d bne.n 8018020 <lwip_netconn_do_writemore+0x1c0>
(len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
8017fe4: 687b ldr r3, [r7, #4]
8017fe6: 6adb ldr r3, [r3, #44] @ 0x2c
8017fe8: 899b ldrh r3, [r3, #12]
8017fea: 2b01 cmp r3, #1
8017fec: d918 bls.n 8018020 <lwip_netconn_do_writemore+0x1c0>
write_more = 1;
8017fee: 2301 movs r3, #1
8017ff0: 767b strb r3, [r7, #25]
apiflags |= TCP_WRITE_FLAG_MORE;
8017ff2: 7ebb ldrb r3, [r7, #26]
8017ff4: f043 0302 orr.w r3, r3, #2
8017ff8: 76bb strb r3, [r7, #26]
8017ffa: e013 b.n 8018024 <lwip_netconn_do_writemore+0x1c4>
8017ffc: 0802e124 .word 0x0802e124
8018000: 0802e27c .word 0x0802e27c
8018004: 0802e168 .word 0x0802e168
8018008: 0802e584 .word 0x0802e584
801800c: 0802e28c .word 0x0802e28c
8018010: 0802e5a4 .word 0x0802e5a4
8018014: 0802e5bc .word 0x0802e5bc
8018018: 0802e5fc .word 0x0802e5fc
801801c: 0802e624 .word 0x0802e624
} else {
write_more = 0;
8018020: 2300 movs r3, #0
8018022: 767b strb r3, [r7, #25]
}
err = tcp_write(conn->pcb.tcp, dataptr, len, apiflags);
8018024: 687b ldr r3, [r7, #4]
8018026: 6858 ldr r0, [r3, #4]
8018028: 7ebb ldrb r3, [r7, #26]
801802a: 8bba ldrh r2, [r7, #28]
801802c: 6979 ldr r1, [r7, #20]
801802e: f008 f827 bl 8020080 <tcp_write>
8018032: 4603 mov r3, r0
8018034: 77fb strb r3, [r7, #31]
if (err == ERR_OK) {
8018036: f997 301f ldrsb.w r3, [r7, #31]
801803a: 2b00 cmp r3, #0
801803c: d12c bne.n 8018098 <lwip_netconn_do_writemore+0x238>
conn->current_msg->msg.w.offset += len;
801803e: 687b ldr r3, [r7, #4]
8018040: 6adb ldr r3, [r3, #44] @ 0x2c
8018042: 6999 ldr r1, [r3, #24]
8018044: 8bba ldrh r2, [r7, #28]
8018046: 687b ldr r3, [r7, #4]
8018048: 6adb ldr r3, [r3, #44] @ 0x2c
801804a: 440a add r2, r1
801804c: 619a str r2, [r3, #24]
conn->current_msg->msg.w.vector_off += len;
801804e: 687b ldr r3, [r7, #4]
8018050: 6adb ldr r3, [r3, #44] @ 0x2c
8018052: 6919 ldr r1, [r3, #16]
8018054: 8bba ldrh r2, [r7, #28]
8018056: 687b ldr r3, [r7, #4]
8018058: 6adb ldr r3, [r3, #44] @ 0x2c
801805a: 440a add r2, r1
801805c: 611a str r2, [r3, #16]
/* check if current vector is finished */
if (conn->current_msg->msg.w.vector_off == conn->current_msg->msg.w.vector->len) {
801805e: 687b ldr r3, [r7, #4]
8018060: 6adb ldr r3, [r3, #44] @ 0x2c
8018062: 691a ldr r2, [r3, #16]
8018064: 687b ldr r3, [r7, #4]
8018066: 6adb ldr r3, [r3, #44] @ 0x2c
8018068: 689b ldr r3, [r3, #8]
801806a: 685b ldr r3, [r3, #4]
801806c: 429a cmp r2, r3
801806e: d113 bne.n 8018098 <lwip_netconn_do_writemore+0x238>
conn->current_msg->msg.w.vector_cnt--;
8018070: 687b ldr r3, [r7, #4]
8018072: 6adb ldr r3, [r3, #44] @ 0x2c
8018074: 899a ldrh r2, [r3, #12]
8018076: 3a01 subs r2, #1
8018078: b292 uxth r2, r2
801807a: 819a strh r2, [r3, #12]
/* if we have additional vectors, move on to them */
if (conn->current_msg->msg.w.vector_cnt > 0) {
801807c: 687b ldr r3, [r7, #4]
801807e: 6adb ldr r3, [r3, #44] @ 0x2c
8018080: 899b ldrh r3, [r3, #12]
8018082: 2b00 cmp r3, #0
8018084: d008 beq.n 8018098 <lwip_netconn_do_writemore+0x238>
conn->current_msg->msg.w.vector++;
8018086: 687b ldr r3, [r7, #4]
8018088: 6adb ldr r3, [r3, #44] @ 0x2c
801808a: 689a ldr r2, [r3, #8]
801808c: 3208 adds r2, #8
801808e: 609a str r2, [r3, #8]
conn->current_msg->msg.w.vector_off = 0;
8018090: 687b ldr r3, [r7, #4]
8018092: 6adb ldr r3, [r3, #44] @ 0x2c
8018094: 2200 movs r2, #0
8018096: 611a str r2, [r3, #16]
}
}
}
} while (write_more && err == ERR_OK);
8018098: 7e7b ldrb r3, [r7, #25]
801809a: 2b00 cmp r3, #0
801809c: d004 beq.n 80180a8 <lwip_netconn_do_writemore+0x248>
801809e: f997 301f ldrsb.w r3, [r7, #31]
80180a2: 2b00 cmp r3, #0
80180a4: f43f af3e beq.w 8017f24 <lwip_netconn_do_writemore+0xc4>
/* if OK or memory error, check available space */
if ((err == ERR_OK) || (err == ERR_MEM)) {
80180a8: f997 301f ldrsb.w r3, [r7, #31]
80180ac: 2b00 cmp r3, #0
80180ae: d004 beq.n 80180ba <lwip_netconn_do_writemore+0x25a>
80180b0: f997 301f ldrsb.w r3, [r7, #31]
80180b4: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80180b8: d137 bne.n 801812a <lwip_netconn_do_writemore+0x2ca>
err_mem:
80180ba: bf00 nop
if (dontblock && (conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len)) {
80180bc: 7e3b ldrb r3, [r7, #24]
80180be: 2b00 cmp r3, #0
80180c0: d01b beq.n 80180fa <lwip_netconn_do_writemore+0x29a>
80180c2: 687b ldr r3, [r7, #4]
80180c4: 6adb ldr r3, [r3, #44] @ 0x2c
80180c6: 699a ldr r2, [r3, #24]
80180c8: 687b ldr r3, [r7, #4]
80180ca: 6adb ldr r3, [r3, #44] @ 0x2c
80180cc: 695b ldr r3, [r3, #20]
80180ce: 429a cmp r2, r3
80180d0: d213 bcs.n 80180fa <lwip_netconn_do_writemore+0x29a>
/* non-blocking write did not write everything: mark the pcb non-writable
and let poll_tcp check writable space to mark the pcb writable again */
API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
80180d2: 687b ldr r3, [r7, #4]
80180d4: 6b1b ldr r3, [r3, #48] @ 0x30
80180d6: 2b00 cmp r3, #0
80180d8: d005 beq.n 80180e6 <lwip_netconn_do_writemore+0x286>
80180da: 687b ldr r3, [r7, #4]
80180dc: 6b1b ldr r3, [r3, #48] @ 0x30
80180de: 2200 movs r2, #0
80180e0: 2103 movs r1, #3
80180e2: 6878 ldr r0, [r7, #4]
80180e4: 4798 blx r3
conn->flags |= NETCONN_FLAG_CHECK_WRITESPACE;
80180e6: 687b ldr r3, [r7, #4]
80180e8: f893 3028 ldrb.w r3, [r3, #40] @ 0x28
80180ec: f043 0310 orr.w r3, r3, #16
80180f0: b2da uxtb r2, r3
80180f2: 687b ldr r3, [r7, #4]
80180f4: f883 2028 strb.w r2, [r3, #40] @ 0x28
80180f8: e017 b.n 801812a <lwip_netconn_do_writemore+0x2ca>
} else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
80180fa: 687b ldr r3, [r7, #4]
80180fc: 685b ldr r3, [r3, #4]
80180fe: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
8018102: f640 3269 movw r2, #2921 @ 0xb69
8018106: 4293 cmp r3, r2
8018108: d905 bls.n 8018116 <lwip_netconn_do_writemore+0x2b6>
(tcp_sndqueuelen(conn->pcb.tcp) >= TCP_SNDQUEUELOWAT)) {
801810a: 687b ldr r3, [r7, #4]
801810c: 685b ldr r3, [r3, #4]
801810e: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
} else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
8018112: 2b07 cmp r3, #7
8018114: d909 bls.n 801812a <lwip_netconn_do_writemore+0x2ca>
/* The queued byte- or pbuf-count exceeds the configured low-water limit,
let select mark this pcb as non-writable. */
API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
8018116: 687b ldr r3, [r7, #4]
8018118: 6b1b ldr r3, [r3, #48] @ 0x30
801811a: 2b00 cmp r3, #0
801811c: d005 beq.n 801812a <lwip_netconn_do_writemore+0x2ca>
801811e: 687b ldr r3, [r7, #4]
8018120: 6b1b ldr r3, [r3, #48] @ 0x30
8018122: 2200 movs r2, #0
8018124: 2103 movs r1, #3
8018126: 6878 ldr r0, [r7, #4]
8018128: 4798 blx r3
}
}
if (err == ERR_OK) {
801812a: f997 301f ldrsb.w r3, [r7, #31]
801812e: 2b00 cmp r3, #0
8018130: d11d bne.n 801816e <lwip_netconn_do_writemore+0x30e>
err_t out_err;
if ((conn->current_msg->msg.w.offset == conn->current_msg->msg.w.len) || dontblock) {
8018132: 687b ldr r3, [r7, #4]
8018134: 6adb ldr r3, [r3, #44] @ 0x2c
8018136: 699a ldr r2, [r3, #24]
8018138: 687b ldr r3, [r7, #4]
801813a: 6adb ldr r3, [r3, #44] @ 0x2c
801813c: 695b ldr r3, [r3, #20]
801813e: 429a cmp r2, r3
8018140: d002 beq.n 8018148 <lwip_netconn_do_writemore+0x2e8>
8018142: 7e3b ldrb r3, [r7, #24]
8018144: 2b00 cmp r3, #0
8018146: d001 beq.n 801814c <lwip_netconn_do_writemore+0x2ec>
/* return sent length (caller reads length from msg.w.offset) */
write_finished = 1;
8018148: 2301 movs r3, #1
801814a: 76fb strb r3, [r7, #27]
}
out_err = tcp_output(conn->pcb.tcp);
801814c: 687b ldr r3, [r7, #4]
801814e: 685b ldr r3, [r3, #4]
8018150: 4618 mov r0, r3
8018152: f008 fddf bl 8020d14 <tcp_output>
8018156: 4603 mov r3, r0
8018158: 733b strb r3, [r7, #12]
if (out_err == ERR_RTE) {
801815a: f997 300c ldrsb.w r3, [r7, #12]
801815e: f113 0f04 cmn.w r3, #4
8018162: d12c bne.n 80181be <lwip_netconn_do_writemore+0x35e>
/* If tcp_output fails because no route is found,
don't try writing any more but return the error
to the application thread. */
err = out_err;
8018164: 7b3b ldrb r3, [r7, #12]
8018166: 77fb strb r3, [r7, #31]
write_finished = 1;
8018168: 2301 movs r3, #1
801816a: 76fb strb r3, [r7, #27]
801816c: e027 b.n 80181be <lwip_netconn_do_writemore+0x35e>
}
} else if (err == ERR_MEM) {
801816e: f997 301f ldrsb.w r3, [r7, #31]
8018172: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8018176: d120 bne.n 80181ba <lwip_netconn_do_writemore+0x35a>
For blocking sockets, we do NOT return to the application
thread, since ERR_MEM is only a temporary error! Non-blocking
will remain non-writable until sent_tcp/poll_tcp is called */
/* tcp_write returned ERR_MEM, try tcp_output anyway */
err_t out_err = tcp_output(conn->pcb.tcp);
8018178: 687b ldr r3, [r7, #4]
801817a: 685b ldr r3, [r3, #4]
801817c: 4618 mov r0, r3
801817e: f008 fdc9 bl 8020d14 <tcp_output>
8018182: 4603 mov r3, r0
8018184: 737b strb r3, [r7, #13]
if (out_err == ERR_RTE) {
8018186: f997 300d ldrsb.w r3, [r7, #13]
801818a: f113 0f04 cmn.w r3, #4
801818e: d104 bne.n 801819a <lwip_netconn_do_writemore+0x33a>
/* If tcp_output fails because no route is found,
don't try writing any more but return the error
to the application thread. */
err = out_err;
8018190: 7b7b ldrb r3, [r7, #13]
8018192: 77fb strb r3, [r7, #31]
write_finished = 1;
8018194: 2301 movs r3, #1
8018196: 76fb strb r3, [r7, #27]
8018198: e011 b.n 80181be <lwip_netconn_do_writemore+0x35e>
} else if (dontblock) {
801819a: 7e3b ldrb r3, [r7, #24]
801819c: 2b00 cmp r3, #0
801819e: d00e beq.n 80181be <lwip_netconn_do_writemore+0x35e>
/* non-blocking write is done on ERR_MEM, set error according
to partial write or not */
err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
80181a0: 687b ldr r3, [r7, #4]
80181a2: 6adb ldr r3, [r3, #44] @ 0x2c
80181a4: 699b ldr r3, [r3, #24]
80181a6: 2b00 cmp r3, #0
80181a8: d102 bne.n 80181b0 <lwip_netconn_do_writemore+0x350>
80181aa: f06f 0306 mvn.w r3, #6
80181ae: e000 b.n 80181b2 <lwip_netconn_do_writemore+0x352>
80181b0: 2300 movs r3, #0
80181b2: 77fb strb r3, [r7, #31]
write_finished = 1;
80181b4: 2301 movs r3, #1
80181b6: 76fb strb r3, [r7, #27]
80181b8: e001 b.n 80181be <lwip_netconn_do_writemore+0x35e>
}
} else {
/* On errors != ERR_MEM, we don't try writing any more but return
the error to the application thread. */
write_finished = 1;
80181ba: 2301 movs r3, #1
80181bc: 76fb strb r3, [r7, #27]
}
}
if (write_finished) {
80181be: 7efb ldrb r3, [r7, #27]
80181c0: 2b00 cmp r3, #0
80181c2: d015 beq.n 80181f0 <lwip_netconn_do_writemore+0x390>
/* everything was written: set back connection state
and back to application task */
sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
80181c4: 687b ldr r3, [r7, #4]
80181c6: 6adb ldr r3, [r3, #44] @ 0x2c
80181c8: 681b ldr r3, [r3, #0]
80181ca: 330c adds r3, #12
80181cc: 60bb str r3, [r7, #8]
conn->current_msg->err = err;
80181ce: 687b ldr r3, [r7, #4]
80181d0: 6adb ldr r3, [r3, #44] @ 0x2c
80181d2: 7ffa ldrb r2, [r7, #31]
80181d4: 711a strb r2, [r3, #4]
conn->current_msg = NULL;
80181d6: 687b ldr r3, [r7, #4]
80181d8: 2200 movs r2, #0
80181da: 62da str r2, [r3, #44] @ 0x2c
conn->state = NETCONN_NONE;
80181dc: 687b ldr r3, [r7, #4]
80181de: 2200 movs r2, #0
80181e0: 705a strb r2, [r3, #1]
#if LWIP_TCPIP_CORE_LOCKING
if (delayed)
80181e2: 78fb ldrb r3, [r7, #3]
80181e4: 2b00 cmp r3, #0
80181e6: d006 beq.n 80181f6 <lwip_netconn_do_writemore+0x396>
#endif
{
sys_sem_signal(op_completed_sem);
80181e8: 68b8 ldr r0, [r7, #8]
80181ea: f00f f8f3 bl 80273d4 <sys_sem_signal>
80181ee: e002 b.n 80181f6 <lwip_netconn_do_writemore+0x396>
}
}
#if LWIP_TCPIP_CORE_LOCKING
else {
return ERR_MEM;
80181f0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80181f4: e000 b.n 80181f8 <lwip_netconn_do_writemore+0x398>
}
#endif
return ERR_OK;
80181f6: 2300 movs r3, #0
}
80181f8: 4618 mov r0, r3
80181fa: 3720 adds r7, #32
80181fc: 46bd mov sp, r7
80181fe: bd80 pop {r7, pc}
08018200 <lwip_netconn_do_write>:
*
* @param m the api_msg pointing to the connection
*/
void
lwip_netconn_do_write(void *m)
{
8018200: b580 push {r7, lr}
8018202: b084 sub sp, #16
8018204: af00 add r7, sp, #0
8018206: 6078 str r0, [r7, #4]
struct api_msg *msg = (struct api_msg *)m;
8018208: 687b ldr r3, [r7, #4]
801820a: 60bb str r3, [r7, #8]
err_t err = netconn_err(msg->conn);
801820c: 68bb ldr r3, [r7, #8]
801820e: 681b ldr r3, [r3, #0]
8018210: 4618 mov r0, r3
8018212: f7fe fca7 bl 8016b64 <netconn_err>
8018216: 4603 mov r3, r0
8018218: 73fb strb r3, [r7, #15]
if (err == ERR_OK) {
801821a: f997 300f ldrsb.w r3, [r7, #15]
801821e: 2b00 cmp r3, #0
8018220: d164 bne.n 80182ec <lwip_netconn_do_write+0xec>
if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
8018222: 68bb ldr r3, [r7, #8]
8018224: 681b ldr r3, [r3, #0]
8018226: 781b ldrb r3, [r3, #0]
8018228: f003 03f0 and.w r3, r3, #240 @ 0xf0
801822c: 2b10 cmp r3, #16
801822e: d15b bne.n 80182e8 <lwip_netconn_do_write+0xe8>
#if LWIP_TCP
if (msg->conn->state != NETCONN_NONE) {
8018230: 68bb ldr r3, [r7, #8]
8018232: 681b ldr r3, [r3, #0]
8018234: 785b ldrb r3, [r3, #1]
8018236: 2b00 cmp r3, #0
8018238: d002 beq.n 8018240 <lwip_netconn_do_write+0x40>
/* netconn is connecting, closing or in blocking write */
err = ERR_INPROGRESS;
801823a: 23fb movs r3, #251 @ 0xfb
801823c: 73fb strb r3, [r7, #15]
801823e: e055 b.n 80182ec <lwip_netconn_do_write+0xec>
} else if (msg->conn->pcb.tcp != NULL) {
8018240: 68bb ldr r3, [r7, #8]
8018242: 681b ldr r3, [r3, #0]
8018244: 685b ldr r3, [r3, #4]
8018246: 2b00 cmp r3, #0
8018248: d04b beq.n 80182e2 <lwip_netconn_do_write+0xe2>
msg->conn->state = NETCONN_WRITE;
801824a: 68bb ldr r3, [r7, #8]
801824c: 681b ldr r3, [r3, #0]
801824e: 2201 movs r2, #1
8018250: 705a strb r2, [r3, #1]
/* set all the variables used by lwip_netconn_do_writemore */
LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
8018252: 68bb ldr r3, [r7, #8]
8018254: 681b ldr r3, [r3, #0]
8018256: 6adb ldr r3, [r3, #44] @ 0x2c
8018258: 2b00 cmp r3, #0
801825a: d006 beq.n 801826a <lwip_netconn_do_write+0x6a>
801825c: 4b27 ldr r3, [pc, #156] @ (80182fc <lwip_netconn_do_write+0xfc>)
801825e: f240 7223 movw r2, #1827 @ 0x723
8018262: 4927 ldr r1, [pc, #156] @ (8018300 <lwip_netconn_do_write+0x100>)
8018264: 4827 ldr r0, [pc, #156] @ (8018304 <lwip_netconn_do_write+0x104>)
8018266: f012 fbe1 bl 802aa2c <iprintf>
LWIP_ASSERT("msg->msg.w.len != 0", msg->msg.w.len != 0);
801826a: 68bb ldr r3, [r7, #8]
801826c: 695b ldr r3, [r3, #20]
801826e: 2b00 cmp r3, #0
8018270: d106 bne.n 8018280 <lwip_netconn_do_write+0x80>
8018272: 4b22 ldr r3, [pc, #136] @ (80182fc <lwip_netconn_do_write+0xfc>)
8018274: f240 7224 movw r2, #1828 @ 0x724
8018278: 4923 ldr r1, [pc, #140] @ (8018308 <lwip_netconn_do_write+0x108>)
801827a: 4822 ldr r0, [pc, #136] @ (8018304 <lwip_netconn_do_write+0x104>)
801827c: f012 fbd6 bl 802aa2c <iprintf>
msg->conn->current_msg = msg;
8018280: 68bb ldr r3, [r7, #8]
8018282: 681b ldr r3, [r3, #0]
8018284: 68ba ldr r2, [r7, #8]
8018286: 62da str r2, [r3, #44] @ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
if (lwip_netconn_do_writemore(msg->conn, 0) != ERR_OK) {
8018288: 68bb ldr r3, [r7, #8]
801828a: 681b ldr r3, [r3, #0]
801828c: 2100 movs r1, #0
801828e: 4618 mov r0, r3
8018290: f7ff fde6 bl 8017e60 <lwip_netconn_do_writemore>
8018294: 4603 mov r3, r0
8018296: 2b00 cmp r3, #0
8018298: d02c beq.n 80182f4 <lwip_netconn_do_write+0xf4>
LWIP_ASSERT("state!", msg->conn->state == NETCONN_WRITE);
801829a: 68bb ldr r3, [r7, #8]
801829c: 681b ldr r3, [r3, #0]
801829e: 785b ldrb r3, [r3, #1]
80182a0: 2b01 cmp r3, #1
80182a2: d006 beq.n 80182b2 <lwip_netconn_do_write+0xb2>
80182a4: 4b15 ldr r3, [pc, #84] @ (80182fc <lwip_netconn_do_write+0xfc>)
80182a6: f44f 62e5 mov.w r2, #1832 @ 0x728
80182aa: 4918 ldr r1, [pc, #96] @ (801830c <lwip_netconn_do_write+0x10c>)
80182ac: 4815 ldr r0, [pc, #84] @ (8018304 <lwip_netconn_do_write+0x104>)
80182ae: f012 fbbd bl 802aa2c <iprintf>
UNLOCK_TCPIP_CORE();
80182b2: f7f8 ff81 bl 80111b8 <sys_unlock_tcpip_core>
sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
80182b6: 68bb ldr r3, [r7, #8]
80182b8: 681b ldr r3, [r3, #0]
80182ba: 330c adds r3, #12
80182bc: 2100 movs r1, #0
80182be: 4618 mov r0, r3
80182c0: f00f f857 bl 8027372 <sys_arch_sem_wait>
LOCK_TCPIP_CORE();
80182c4: f7f8 ff68 bl 8011198 <sys_lock_tcpip_core>
LWIP_ASSERT("state!", msg->conn->state != NETCONN_WRITE);
80182c8: 68bb ldr r3, [r7, #8]
80182ca: 681b ldr r3, [r3, #0]
80182cc: 785b ldrb r3, [r3, #1]
80182ce: 2b01 cmp r3, #1
80182d0: d110 bne.n 80182f4 <lwip_netconn_do_write+0xf4>
80182d2: 4b0a ldr r3, [pc, #40] @ (80182fc <lwip_netconn_do_write+0xfc>)
80182d4: f240 722c movw r2, #1836 @ 0x72c
80182d8: 490c ldr r1, [pc, #48] @ (801830c <lwip_netconn_do_write+0x10c>)
80182da: 480a ldr r0, [pc, #40] @ (8018304 <lwip_netconn_do_write+0x104>)
80182dc: f012 fba6 bl 802aa2c <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
lwip_netconn_do_writemore(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
/* for both cases: if lwip_netconn_do_writemore was called, don't ACK the APIMSG
since lwip_netconn_do_writemore ACKs it! */
return;
80182e0: e008 b.n 80182f4 <lwip_netconn_do_write+0xf4>
} else {
err = ERR_CONN;
80182e2: 23f5 movs r3, #245 @ 0xf5
80182e4: 73fb strb r3, [r7, #15]
80182e6: e001 b.n 80182ec <lwip_netconn_do_write+0xec>
#else /* LWIP_TCP */
err = ERR_VAL;
#endif /* LWIP_TCP */
#if (LWIP_UDP || LWIP_RAW)
} else {
err = ERR_VAL;
80182e8: 23fa movs r3, #250 @ 0xfa
80182ea: 73fb strb r3, [r7, #15]
#endif /* (LWIP_UDP || LWIP_RAW) */
}
}
msg->err = err;
80182ec: 68bb ldr r3, [r7, #8]
80182ee: 7bfa ldrb r2, [r7, #15]
80182f0: 711a strb r2, [r3, #4]
80182f2: e000 b.n 80182f6 <lwip_netconn_do_write+0xf6>
return;
80182f4: bf00 nop
TCPIP_APIMSG_ACK(msg);
}
80182f6: 3710 adds r7, #16
80182f8: 46bd mov sp, r7
80182fa: bd80 pop {r7, pc}
80182fc: 0802e124 .word 0x0802e124
8018300: 0802e4c8 .word 0x0802e4c8
8018304: 0802e168 .word 0x0802e168
8018308: 0802e650 .word 0x0802e650
801830c: 0802e4e4 .word 0x0802e4e4
08018310 <lwip_netconn_do_getaddr>:
*
* @param m the api_msg pointing to the connection
*/
void
lwip_netconn_do_getaddr(void *m)
{
8018310: b580 push {r7, lr}
8018312: b084 sub sp, #16
8018314: af00 add r7, sp, #0
8018316: 6078 str r0, [r7, #4]
struct api_msg *msg = (struct api_msg *)m;
8018318: 687b ldr r3, [r7, #4]
801831a: 60fb str r3, [r7, #12]
if (msg->conn->pcb.ip != NULL) {
801831c: 68fb ldr r3, [r7, #12]
801831e: 681b ldr r3, [r3, #0]
8018320: 685b ldr r3, [r3, #4]
8018322: 2b00 cmp r3, #0
8018324: d06b beq.n 80183fe <lwip_netconn_do_getaddr+0xee>
if (msg->msg.ad.local) {
8018326: 68fb ldr r3, [r7, #12]
8018328: 7c1b ldrb r3, [r3, #16]
801832a: 2b00 cmp r3, #0
801832c: d007 beq.n 801833e <lwip_netconn_do_getaddr+0x2e>
ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
801832e: 68fb ldr r3, [r7, #12]
8018330: 681b ldr r3, [r3, #0]
8018332: 685a ldr r2, [r3, #4]
8018334: 68fb ldr r3, [r7, #12]
8018336: 689b ldr r3, [r3, #8]
8018338: 6812 ldr r2, [r2, #0]
801833a: 601a str r2, [r3, #0]
801833c: e006 b.n 801834c <lwip_netconn_do_getaddr+0x3c>
msg->conn->pcb.ip->local_ip);
} else {
ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
801833e: 68fb ldr r3, [r7, #12]
8018340: 681b ldr r3, [r3, #0]
8018342: 685a ldr r2, [r3, #4]
8018344: 68fb ldr r3, [r7, #12]
8018346: 689b ldr r3, [r3, #8]
8018348: 6852 ldr r2, [r2, #4]
801834a: 601a str r2, [r3, #0]
msg->conn->pcb.ip->remote_ip);
}
msg->err = ERR_OK;
801834c: 68fb ldr r3, [r7, #12]
801834e: 2200 movs r2, #0
8018350: 711a strb r2, [r3, #4]
switch (NETCONNTYPE_GROUP(msg->conn->type)) {
8018352: 68fb ldr r3, [r7, #12]
8018354: 681b ldr r3, [r3, #0]
8018356: 781b ldrb r3, [r3, #0]
8018358: f003 03f0 and.w r3, r3, #240 @ 0xf0
801835c: 2b10 cmp r3, #16
801835e: d021 beq.n 80183a4 <lwip_netconn_do_getaddr+0x94>
8018360: 2b20 cmp r3, #32
8018362: d144 bne.n 80183ee <lwip_netconn_do_getaddr+0xde>
}
break;
#endif /* LWIP_RAW */
#if LWIP_UDP
case NETCONN_UDP:
if (msg->msg.ad.local) {
8018364: 68fb ldr r3, [r7, #12]
8018366: 7c1b ldrb r3, [r3, #16]
8018368: 2b00 cmp r3, #0
801836a: d007 beq.n 801837c <lwip_netconn_do_getaddr+0x6c>
API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->local_port;
801836c: 68fb ldr r3, [r7, #12]
801836e: 681b ldr r3, [r3, #0]
8018370: 685a ldr r2, [r3, #4]
8018372: 68fb ldr r3, [r7, #12]
8018374: 68db ldr r3, [r3, #12]
8018376: 8a52 ldrh r2, [r2, #18]
8018378: 801a strh r2, [r3, #0]
msg->err = ERR_CONN;
} else {
API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
}
}
break;
801837a: e044 b.n 8018406 <lwip_netconn_do_getaddr+0xf6>
if ((msg->conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0) {
801837c: 68fb ldr r3, [r7, #12]
801837e: 681b ldr r3, [r3, #0]
8018380: 685b ldr r3, [r3, #4]
8018382: 7c1b ldrb r3, [r3, #16]
8018384: f003 0304 and.w r3, r3, #4
8018388: 2b00 cmp r3, #0
801838a: d103 bne.n 8018394 <lwip_netconn_do_getaddr+0x84>
msg->err = ERR_CONN;
801838c: 68fb ldr r3, [r7, #12]
801838e: 22f5 movs r2, #245 @ 0xf5
8018390: 711a strb r2, [r3, #4]
break;
8018392: e038 b.n 8018406 <lwip_netconn_do_getaddr+0xf6>
API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
8018394: 68fb ldr r3, [r7, #12]
8018396: 681b ldr r3, [r3, #0]
8018398: 685a ldr r2, [r3, #4]
801839a: 68fb ldr r3, [r7, #12]
801839c: 68db ldr r3, [r3, #12]
801839e: 8a92 ldrh r2, [r2, #20]
80183a0: 801a strh r2, [r3, #0]
break;
80183a2: e030 b.n 8018406 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_UDP */
#if LWIP_TCP
case NETCONN_TCP:
if ((msg->msg.ad.local == 0) &&
80183a4: 68fb ldr r3, [r7, #12]
80183a6: 7c1b ldrb r3, [r3, #16]
80183a8: 2b00 cmp r3, #0
80183aa: d10f bne.n 80183cc <lwip_netconn_do_getaddr+0xbc>
((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
80183ac: 68fb ldr r3, [r7, #12]
80183ae: 681b ldr r3, [r3, #0]
80183b0: 685b ldr r3, [r3, #4]
80183b2: 7d1b ldrb r3, [r3, #20]
if ((msg->msg.ad.local == 0) &&
80183b4: 2b00 cmp r3, #0
80183b6: d005 beq.n 80183c4 <lwip_netconn_do_getaddr+0xb4>
((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
80183b8: 68fb ldr r3, [r7, #12]
80183ba: 681b ldr r3, [r3, #0]
80183bc: 685b ldr r3, [r3, #4]
80183be: 7d1b ldrb r3, [r3, #20]
80183c0: 2b01 cmp r3, #1
80183c2: d103 bne.n 80183cc <lwip_netconn_do_getaddr+0xbc>
/* pcb is not connected and remote name is requested */
msg->err = ERR_CONN;
80183c4: 68fb ldr r3, [r7, #12]
80183c6: 22f5 movs r2, #245 @ 0xf5
80183c8: 711a strb r2, [r3, #4]
} else {
API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
}
break;
80183ca: e01c b.n 8018406 <lwip_netconn_do_getaddr+0xf6>
API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
80183cc: 68fb ldr r3, [r7, #12]
80183ce: 7c1b ldrb r3, [r3, #16]
80183d0: 2b00 cmp r3, #0
80183d2: d004 beq.n 80183de <lwip_netconn_do_getaddr+0xce>
80183d4: 68fb ldr r3, [r7, #12]
80183d6: 681b ldr r3, [r3, #0]
80183d8: 685b ldr r3, [r3, #4]
80183da: 8adb ldrh r3, [r3, #22]
80183dc: e003 b.n 80183e6 <lwip_netconn_do_getaddr+0xd6>
80183de: 68fb ldr r3, [r7, #12]
80183e0: 681b ldr r3, [r3, #0]
80183e2: 685b ldr r3, [r3, #4]
80183e4: 8b1b ldrh r3, [r3, #24]
80183e6: 68fa ldr r2, [r7, #12]
80183e8: 68d2 ldr r2, [r2, #12]
80183ea: 8013 strh r3, [r2, #0]
break;
80183ec: e00b b.n 8018406 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_TCP */
default:
LWIP_ASSERT("invalid netconn_type", 0);
80183ee: 4b08 ldr r3, [pc, #32] @ (8018410 <lwip_netconn_do_getaddr+0x100>)
80183f0: f240 727d movw r2, #1917 @ 0x77d
80183f4: 4907 ldr r1, [pc, #28] @ (8018414 <lwip_netconn_do_getaddr+0x104>)
80183f6: 4808 ldr r0, [pc, #32] @ (8018418 <lwip_netconn_do_getaddr+0x108>)
80183f8: f012 fb18 bl 802aa2c <iprintf>
break;
80183fc: e003 b.n 8018406 <lwip_netconn_do_getaddr+0xf6>
}
} else {
msg->err = ERR_CONN;
80183fe: 68fb ldr r3, [r7, #12]
8018400: 22f5 movs r2, #245 @ 0xf5
8018402: 711a strb r2, [r3, #4]
}
TCPIP_APIMSG_ACK(msg);
}
8018404: bf00 nop
8018406: bf00 nop
8018408: 3710 adds r7, #16
801840a: 46bd mov sp, r7
801840c: bd80 pop {r7, pc}
801840e: bf00 nop
8018410: 0802e124 .word 0x0802e124
8018414: 0802e664 .word 0x0802e664
8018418: 0802e168 .word 0x0802e168
0801841c <lwip_netconn_do_close>:
*
* @param m the api_msg pointing to the connection
*/
void
lwip_netconn_do_close(void *m)
{
801841c: b580 push {r7, lr}
801841e: b084 sub sp, #16
8018420: af00 add r7, sp, #0
8018422: 6078 str r0, [r7, #4]
struct api_msg *msg = (struct api_msg *)m;
8018424: 687b ldr r3, [r7, #4]
8018426: 60fb str r3, [r7, #12]
#if LWIP_TCP
enum netconn_state state = msg->conn->state;
8018428: 68fb ldr r3, [r7, #12]
801842a: 681b ldr r3, [r3, #0]
801842c: 785b ldrb r3, [r3, #1]
801842e: 72fb strb r3, [r7, #11]
/* First check if this is a TCP netconn and if it is in a correct state
(LISTEN doesn't support half shutdown) */
if ((msg->conn->pcb.tcp != NULL) &&
8018430: 68fb ldr r3, [r7, #12]
8018432: 681b ldr r3, [r3, #0]
8018434: 685b ldr r3, [r3, #4]
8018436: 2b00 cmp r3, #0
8018438: d067 beq.n 801850a <lwip_netconn_do_close+0xee>
(NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
801843a: 68fb ldr r3, [r7, #12]
801843c: 681b ldr r3, [r3, #0]
801843e: 781b ldrb r3, [r3, #0]
8018440: f003 03f0 and.w r3, r3, #240 @ 0xf0
if ((msg->conn->pcb.tcp != NULL) &&
8018444: 2b10 cmp r3, #16
8018446: d160 bne.n 801850a <lwip_netconn_do_close+0xee>
((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
8018448: 68fb ldr r3, [r7, #12]
801844a: 7a1b ldrb r3, [r3, #8]
(NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
801844c: 2b03 cmp r3, #3
801844e: d002 beq.n 8018456 <lwip_netconn_do_close+0x3a>
((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
8018450: 7afb ldrb r3, [r7, #11]
8018452: 2b02 cmp r3, #2
8018454: d059 beq.n 801850a <lwip_netconn_do_close+0xee>
/* Check if we are in a connected state */
if (state == NETCONN_CONNECT) {
8018456: 7afb ldrb r3, [r7, #11]
8018458: 2b03 cmp r3, #3
801845a: d103 bne.n 8018464 <lwip_netconn_do_close+0x48>
/* TCP connect in progress: cannot shutdown */
msg->err = ERR_CONN;
801845c: 68fb ldr r3, [r7, #12]
801845e: 22f5 movs r2, #245 @ 0xf5
8018460: 711a strb r2, [r3, #4]
if (state == NETCONN_CONNECT) {
8018462: e057 b.n 8018514 <lwip_netconn_do_close+0xf8>
} else if (state == NETCONN_WRITE) {
8018464: 7afb ldrb r3, [r7, #11]
8018466: 2b01 cmp r3, #1
8018468: d103 bne.n 8018472 <lwip_netconn_do_close+0x56>
msg->err = tcp_shutdown(msg->conn->pcb.tcp, 1, 0);
}
}
if (state == NETCONN_NONE) {
#else /* LWIP_NETCONN_FULLDUPLEX */
msg->err = ERR_INPROGRESS;
801846a: 68fb ldr r3, [r7, #12]
801846c: 22fb movs r2, #251 @ 0xfb
801846e: 711a strb r2, [r3, #4]
if (state == NETCONN_CONNECT) {
8018470: e050 b.n 8018514 <lwip_netconn_do_close+0xf8>
} else {
#endif /* LWIP_NETCONN_FULLDUPLEX */
if (msg->msg.sd.shut & NETCONN_SHUT_RD) {
8018472: 68fb ldr r3, [r7, #12]
8018474: 7a1b ldrb r3, [r3, #8]
8018476: f003 0301 and.w r3, r3, #1
801847a: 2b00 cmp r3, #0
801847c: d004 beq.n 8018488 <lwip_netconn_do_close+0x6c>
#if LWIP_NETCONN_FULLDUPLEX
/* Mark mboxes invalid */
netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
netconn_drain(msg->conn);
801847e: 68fb ldr r3, [r7, #12]
8018480: 681b ldr r3, [r3, #0]
8018482: 4618 mov r0, r3
8018484: f7ff f82e bl 80174e4 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */
}
LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
8018488: 68fb ldr r3, [r7, #12]
801848a: 681b ldr r3, [r3, #0]
801848c: 6adb ldr r3, [r3, #44] @ 0x2c
801848e: 2b00 cmp r3, #0
8018490: d006 beq.n 80184a0 <lwip_netconn_do_close+0x84>
8018492: 4b22 ldr r3, [pc, #136] @ (801851c <lwip_netconn_do_close+0x100>)
8018494: f240 72bd movw r2, #1981 @ 0x7bd
8018498: 4921 ldr r1, [pc, #132] @ (8018520 <lwip_netconn_do_close+0x104>)
801849a: 4822 ldr r0, [pc, #136] @ (8018524 <lwip_netconn_do_close+0x108>)
801849c: f012 fac6 bl 802aa2c <iprintf>
msg->conn->state = NETCONN_CLOSE;
80184a0: 68fb ldr r3, [r7, #12]
80184a2: 681b ldr r3, [r3, #0]
80184a4: 2204 movs r2, #4
80184a6: 705a strb r2, [r3, #1]
msg->conn->current_msg = msg;
80184a8: 68fb ldr r3, [r7, #12]
80184aa: 681b ldr r3, [r3, #0]
80184ac: 68fa ldr r2, [r7, #12]
80184ae: 62da str r2, [r3, #44] @ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
80184b0: 68fb ldr r3, [r7, #12]
80184b2: 681b ldr r3, [r3, #0]
80184b4: 2100 movs r1, #0
80184b6: 4618 mov r0, r3
80184b8: f7ff f892 bl 80175e0 <lwip_netconn_do_close_internal>
80184bc: 4603 mov r3, r0
80184be: 2b00 cmp r3, #0
80184c0: d027 beq.n 8018512 <lwip_netconn_do_close+0xf6>
LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
80184c2: 68fb ldr r3, [r7, #12]
80184c4: 681b ldr r3, [r3, #0]
80184c6: 785b ldrb r3, [r3, #1]
80184c8: 2b04 cmp r3, #4
80184ca: d006 beq.n 80184da <lwip_netconn_do_close+0xbe>
80184cc: 4b13 ldr r3, [pc, #76] @ (801851c <lwip_netconn_do_close+0x100>)
80184ce: f240 72c2 movw r2, #1986 @ 0x7c2
80184d2: 4915 ldr r1, [pc, #84] @ (8018528 <lwip_netconn_do_close+0x10c>)
80184d4: 4813 ldr r0, [pc, #76] @ (8018524 <lwip_netconn_do_close+0x108>)
80184d6: f012 faa9 bl 802aa2c <iprintf>
UNLOCK_TCPIP_CORE();
80184da: f7f8 fe6d bl 80111b8 <sys_unlock_tcpip_core>
sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
80184de: 68fb ldr r3, [r7, #12]
80184e0: 681b ldr r3, [r3, #0]
80184e2: 330c adds r3, #12
80184e4: 2100 movs r1, #0
80184e6: 4618 mov r0, r3
80184e8: f00e ff43 bl 8027372 <sys_arch_sem_wait>
LOCK_TCPIP_CORE();
80184ec: f7f8 fe54 bl 8011198 <sys_lock_tcpip_core>
LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
80184f0: 68fb ldr r3, [r7, #12]
80184f2: 681b ldr r3, [r3, #0]
80184f4: 785b ldrb r3, [r3, #1]
80184f6: 2b00 cmp r3, #0
80184f8: d00b beq.n 8018512 <lwip_netconn_do_close+0xf6>
80184fa: 4b08 ldr r3, [pc, #32] @ (801851c <lwip_netconn_do_close+0x100>)
80184fc: f240 72c6 movw r2, #1990 @ 0x7c6
8018500: 4909 ldr r1, [pc, #36] @ (8018528 <lwip_netconn_do_close+0x10c>)
8018502: 4808 ldr r0, [pc, #32] @ (8018524 <lwip_netconn_do_close+0x108>)
8018504: f012 fa92 bl 802aa2c <iprintf>
}
#else /* LWIP_TCPIP_CORE_LOCKING */
lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
/* for tcp netconns, lwip_netconn_do_close_internal ACKs the message */
return;
8018508: e003 b.n 8018512 <lwip_netconn_do_close+0xf6>
}
} else
#endif /* LWIP_TCP */
{
msg->err = ERR_CONN;
801850a: 68fb ldr r3, [r7, #12]
801850c: 22f5 movs r2, #245 @ 0xf5
801850e: 711a strb r2, [r3, #4]
8018510: e000 b.n 8018514 <lwip_netconn_do_close+0xf8>
return;
8018512: bf00 nop
}
TCPIP_APIMSG_ACK(msg);
}
8018514: 3710 adds r7, #16
8018516: 46bd mov sp, r7
8018518: bd80 pop {r7, pc}
801851a: bf00 nop
801851c: 0802e124 .word 0x0802e124
8018520: 0802e4c8 .word 0x0802e4c8
8018524: 0802e168 .word 0x0802e168
8018528: 0802e4e4 .word 0x0802e4e4
0801852c <err_to_errno>:
EIO /* ERR_ARG -16 Illegal argument. */
};
int
err_to_errno(err_t err)
{
801852c: b480 push {r7}
801852e: b083 sub sp, #12
8018530: af00 add r7, sp, #0
8018532: 4603 mov r3, r0
8018534: 71fb strb r3, [r7, #7]
if ((err > 0) || (-err >= (err_t)LWIP_ARRAYSIZE(err_to_errno_table))) {
8018536: f997 3007 ldrsb.w r3, [r7, #7]
801853a: 2b00 cmp r3, #0
801853c: dc04 bgt.n 8018548 <err_to_errno+0x1c>
801853e: f997 3007 ldrsb.w r3, [r7, #7]
8018542: f113 0f10 cmn.w r3, #16
8018546: da01 bge.n 801854c <err_to_errno+0x20>
return EIO;
8018548: 2305 movs r3, #5
801854a: e005 b.n 8018558 <err_to_errno+0x2c>
}
return err_to_errno_table[-err];
801854c: f997 3007 ldrsb.w r3, [r7, #7]
8018550: 425b negs r3, r3
8018552: 4a04 ldr r2, [pc, #16] @ (8018564 <err_to_errno+0x38>)
8018554: f852 3023 ldr.w r3, [r2, r3, lsl #2]
}
8018558: 4618 mov r0, r3
801855a: 370c adds r7, #12
801855c: 46bd mov sp, r7
801855e: f85d 7b04 ldr.w r7, [sp], #4
8018562: 4770 bx lr
8018564: 08031d30 .word 0x08031d30
08018568 <netbuf_delete>:
*
* @param buf pointer to a netbuf allocated by netbuf_new()
*/
void
netbuf_delete(struct netbuf *buf)
{
8018568: b580 push {r7, lr}
801856a: b082 sub sp, #8
801856c: af00 add r7, sp, #0
801856e: 6078 str r0, [r7, #4]
if (buf != NULL) {
8018570: 687b ldr r3, [r7, #4]
8018572: 2b00 cmp r3, #0
8018574: d013 beq.n 801859e <netbuf_delete+0x36>
if (buf->p != NULL) {
8018576: 687b ldr r3, [r7, #4]
8018578: 681b ldr r3, [r3, #0]
801857a: 2b00 cmp r3, #0
801857c: d00b beq.n 8018596 <netbuf_delete+0x2e>
pbuf_free(buf->p);
801857e: 687b ldr r3, [r7, #4]
8018580: 681b ldr r3, [r3, #0]
8018582: 4618 mov r0, r3
8018584: f002 ffda bl 801b53c <pbuf_free>
buf->p = buf->ptr = NULL;
8018588: 687b ldr r3, [r7, #4]
801858a: 2200 movs r2, #0
801858c: 605a str r2, [r3, #4]
801858e: 687b ldr r3, [r7, #4]
8018590: 685a ldr r2, [r3, #4]
8018592: 687b ldr r3, [r7, #4]
8018594: 601a str r2, [r3, #0]
}
memp_free(MEMP_NETBUF, buf);
8018596: 6879 ldr r1, [r7, #4]
8018598: 2006 movs r0, #6
801859a: f002 f8e1 bl 801a760 <memp_free>
}
}
801859e: bf00 nop
80185a0: 3708 adds r7, #8
80185a2: 46bd mov sp, r7
80185a4: bd80 pop {r7, pc}
...
080185a8 <netbuf_free>:
*
* @param buf pointer to the netbuf which contains the packet buffer to free
*/
void
netbuf_free(struct netbuf *buf)
{
80185a8: b580 push {r7, lr}
80185aa: b082 sub sp, #8
80185ac: af00 add r7, sp, #0
80185ae: 6078 str r0, [r7, #4]
LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;);
80185b0: 687b ldr r3, [r7, #4]
80185b2: 2b00 cmp r3, #0
80185b4: d106 bne.n 80185c4 <netbuf_free+0x1c>
80185b6: 4b0d ldr r3, [pc, #52] @ (80185ec <netbuf_free+0x44>)
80185b8: 2281 movs r2, #129 @ 0x81
80185ba: 490d ldr r1, [pc, #52] @ (80185f0 <netbuf_free+0x48>)
80185bc: 480d ldr r0, [pc, #52] @ (80185f4 <netbuf_free+0x4c>)
80185be: f012 fa35 bl 802aa2c <iprintf>
80185c2: e00f b.n 80185e4 <netbuf_free+0x3c>
if (buf->p != NULL) {
80185c4: 687b ldr r3, [r7, #4]
80185c6: 681b ldr r3, [r3, #0]
80185c8: 2b00 cmp r3, #0
80185ca: d004 beq.n 80185d6 <netbuf_free+0x2e>
pbuf_free(buf->p);
80185cc: 687b ldr r3, [r7, #4]
80185ce: 681b ldr r3, [r3, #0]
80185d0: 4618 mov r0, r3
80185d2: f002 ffb3 bl 801b53c <pbuf_free>
}
buf->p = buf->ptr = NULL;
80185d6: 687b ldr r3, [r7, #4]
80185d8: 2200 movs r2, #0
80185da: 605a str r2, [r3, #4]
80185dc: 687b ldr r3, [r7, #4]
80185de: 685a ldr r2, [r3, #4]
80185e0: 687b ldr r3, [r7, #4]
80185e2: 601a str r2, [r3, #0]
#if LWIP_CHECKSUM_ON_COPY
buf->flags = 0;
buf->toport_chksum = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
}
80185e4: 3708 adds r7, #8
80185e6: 46bd mov sp, r7
80185e8: bd80 pop {r7, pc}
80185ea: bf00 nop
80185ec: 0802e67c .word 0x0802e67c
80185f0: 0802e718 .word 0x0802e718
80185f4: 0802e6cc .word 0x0802e6cc
080185f8 <netbuf_ref>:
* @return ERR_OK if data is referenced
* ERR_MEM if data couldn't be referenced due to lack of memory
*/
err_t
netbuf_ref(struct netbuf *buf, const void *dataptr, u16_t size)
{
80185f8: b580 push {r7, lr}
80185fa: b084 sub sp, #16
80185fc: af00 add r7, sp, #0
80185fe: 60f8 str r0, [r7, #12]
8018600: 60b9 str r1, [r7, #8]
8018602: 4613 mov r3, r2
8018604: 80fb strh r3, [r7, #6]
LWIP_ERROR("netbuf_ref: invalid buf", (buf != NULL), return ERR_ARG;);
8018606: 68fb ldr r3, [r7, #12]
8018608: 2b00 cmp r3, #0
801860a: d108 bne.n 801861e <netbuf_ref+0x26>
801860c: 4b1c ldr r3, [pc, #112] @ (8018680 <netbuf_ref+0x88>)
801860e: 2299 movs r2, #153 @ 0x99
8018610: 491c ldr r1, [pc, #112] @ (8018684 <netbuf_ref+0x8c>)
8018612: 481d ldr r0, [pc, #116] @ (8018688 <netbuf_ref+0x90>)
8018614: f012 fa0a bl 802aa2c <iprintf>
8018618: f06f 030f mvn.w r3, #15
801861c: e02b b.n 8018676 <netbuf_ref+0x7e>
if (buf->p != NULL) {
801861e: 68fb ldr r3, [r7, #12]
8018620: 681b ldr r3, [r3, #0]
8018622: 2b00 cmp r3, #0
8018624: d004 beq.n 8018630 <netbuf_ref+0x38>
pbuf_free(buf->p);
8018626: 68fb ldr r3, [r7, #12]
8018628: 681b ldr r3, [r3, #0]
801862a: 4618 mov r0, r3
801862c: f002 ff86 bl 801b53c <pbuf_free>
}
buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF);
8018630: 2241 movs r2, #65 @ 0x41
8018632: 2100 movs r1, #0
8018634: 2036 movs r0, #54 @ 0x36
8018636: f002 fc6b bl 801af10 <pbuf_alloc>
801863a: 4602 mov r2, r0
801863c: 68fb ldr r3, [r7, #12]
801863e: 601a str r2, [r3, #0]
if (buf->p == NULL) {
8018640: 68fb ldr r3, [r7, #12]
8018642: 681b ldr r3, [r3, #0]
8018644: 2b00 cmp r3, #0
8018646: d105 bne.n 8018654 <netbuf_ref+0x5c>
buf->ptr = NULL;
8018648: 68fb ldr r3, [r7, #12]
801864a: 2200 movs r2, #0
801864c: 605a str r2, [r3, #4]
return ERR_MEM;
801864e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8018652: e010 b.n 8018676 <netbuf_ref+0x7e>
}
((struct pbuf_rom *)buf->p)->payload = dataptr;
8018654: 68fb ldr r3, [r7, #12]
8018656: 681b ldr r3, [r3, #0]
8018658: 68ba ldr r2, [r7, #8]
801865a: 605a str r2, [r3, #4]
buf->p->len = buf->p->tot_len = size;
801865c: 68fb ldr r3, [r7, #12]
801865e: 681b ldr r3, [r3, #0]
8018660: 88fa ldrh r2, [r7, #6]
8018662: 811a strh r2, [r3, #8]
8018664: 68fa ldr r2, [r7, #12]
8018666: 6812 ldr r2, [r2, #0]
8018668: 891b ldrh r3, [r3, #8]
801866a: 8153 strh r3, [r2, #10]
buf->ptr = buf->p;
801866c: 68fb ldr r3, [r7, #12]
801866e: 681a ldr r2, [r3, #0]
8018670: 68fb ldr r3, [r7, #12]
8018672: 605a str r2, [r3, #4]
return ERR_OK;
8018674: 2300 movs r3, #0
}
8018676: 4618 mov r0, r3
8018678: 3710 adds r7, #16
801867a: 46bd mov sp, r7
801867c: bd80 pop {r7, pc}
801867e: bf00 nop
8018680: 0802e67c .word 0x0802e67c
8018684: 0802e734 .word 0x0802e734
8018688: 0802e6cc .word 0x0802e6cc
0801868c <tryget_socket_unconn_nouse>:
#endif /* LWIP_NETCONN_FULLDUPLEX */
/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn_nouse(int fd)
{
801868c: b480 push {r7}
801868e: b085 sub sp, #20
8018690: af00 add r7, sp, #0
8018692: 6078 str r0, [r7, #4]
int s = fd - LWIP_SOCKET_OFFSET;
8018694: 687b ldr r3, [r7, #4]
8018696: 60fb str r3, [r7, #12]
if ((s < 0) || (s >= NUM_SOCKETS)) {
8018698: 68fb ldr r3, [r7, #12]
801869a: 2b00 cmp r3, #0
801869c: db02 blt.n 80186a4 <tryget_socket_unconn_nouse+0x18>
801869e: 68fb ldr r3, [r7, #12]
80186a0: 2b03 cmp r3, #3
80186a2: dd01 ble.n 80186a8 <tryget_socket_unconn_nouse+0x1c>
LWIP_DEBUGF(SOCKETS_DEBUG, ("tryget_socket_unconn(%d): invalid\n", fd));
return NULL;
80186a4: 2300 movs r3, #0
80186a6: e003 b.n 80186b0 <tryget_socket_unconn_nouse+0x24>
}
return &sockets[s];
80186a8: 68fb ldr r3, [r7, #12]
80186aa: 011b lsls r3, r3, #4
80186ac: 4a03 ldr r2, [pc, #12] @ (80186bc <tryget_socket_unconn_nouse+0x30>)
80186ae: 4413 add r3, r2
}
80186b0: 4618 mov r0, r3
80186b2: 3714 adds r7, #20
80186b4: 46bd mov sp, r7
80186b6: f85d 7b04 ldr.w r7, [sp], #4
80186ba: 4770 bx lr
80186bc: 24024404 .word 0x24024404
080186c0 <tryget_socket_unconn>:
}
/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn(int fd)
{
80186c0: b580 push {r7, lr}
80186c2: b084 sub sp, #16
80186c4: af00 add r7, sp, #0
80186c6: 6078 str r0, [r7, #4]
struct lwip_sock *ret = tryget_socket_unconn_nouse(fd);
80186c8: 6878 ldr r0, [r7, #4]
80186ca: f7ff ffdf bl 801868c <tryget_socket_unconn_nouse>
80186ce: 60f8 str r0, [r7, #12]
if (ret != NULL) {
if (!sock_inc_used(ret)) {
return NULL;
}
}
return ret;
80186d0: 68fb ldr r3, [r7, #12]
}
80186d2: 4618 mov r0, r3
80186d4: 3710 adds r7, #16
80186d6: 46bd mov sp, r7
80186d8: bd80 pop {r7, pc}
080186da <tryget_socket>:
* @param fd externally used socket index
* @return struct lwip_sock for the socket or NULL if not found
*/
static struct lwip_sock *
tryget_socket(int fd)
{
80186da: b580 push {r7, lr}
80186dc: b084 sub sp, #16
80186de: af00 add r7, sp, #0
80186e0: 6078 str r0, [r7, #4]
struct lwip_sock *sock = tryget_socket_unconn(fd);
80186e2: 6878 ldr r0, [r7, #4]
80186e4: f7ff ffec bl 80186c0 <tryget_socket_unconn>
80186e8: 60f8 str r0, [r7, #12]
if (sock != NULL) {
80186ea: 68fb ldr r3, [r7, #12]
80186ec: 2b00 cmp r3, #0
80186ee: d005 beq.n 80186fc <tryget_socket+0x22>
if (sock->conn) {
80186f0: 68fb ldr r3, [r7, #12]
80186f2: 681b ldr r3, [r3, #0]
80186f4: 2b00 cmp r3, #0
80186f6: d001 beq.n 80186fc <tryget_socket+0x22>
return sock;
80186f8: 68fb ldr r3, [r7, #12]
80186fa: e000 b.n 80186fe <tryget_socket+0x24>
}
done_socket(sock);
}
return NULL;
80186fc: 2300 movs r3, #0
}
80186fe: 4618 mov r0, r3
8018700: 3710 adds r7, #16
8018702: 46bd mov sp, r7
8018704: bd80 pop {r7, pc}
...
08018708 <get_socket>:
* @param fd externally used socket index
* @return struct lwip_sock for the socket or NULL if not found
*/
static struct lwip_sock *
get_socket(int fd)
{
8018708: b580 push {r7, lr}
801870a: b084 sub sp, #16
801870c: af00 add r7, sp, #0
801870e: 6078 str r0, [r7, #4]
struct lwip_sock *sock = tryget_socket(fd);
8018710: 6878 ldr r0, [r7, #4]
8018712: f7ff ffe2 bl 80186da <tryget_socket>
8018716: 60f8 str r0, [r7, #12]
if (!sock) {
8018718: 68fb ldr r3, [r7, #12]
801871a: 2b00 cmp r3, #0
801871c: d104 bne.n 8018728 <get_socket+0x20>
if ((fd < LWIP_SOCKET_OFFSET) || (fd >= (LWIP_SOCKET_OFFSET + NUM_SOCKETS))) {
LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", fd));
}
set_errno(EBADF);
801871e: 4b05 ldr r3, [pc, #20] @ (8018734 <get_socket+0x2c>)
8018720: 2209 movs r2, #9
8018722: 601a str r2, [r3, #0]
return NULL;
8018724: 2300 movs r3, #0
8018726: e000 b.n 801872a <get_socket+0x22>
}
return sock;
8018728: 68fb ldr r3, [r7, #12]
}
801872a: 4618 mov r0, r3
801872c: 3710 adds r7, #16
801872e: 46bd mov sp, r7
8018730: bd80 pop {r7, pc}
8018732: bf00 nop
8018734: 2402b2a0 .word 0x2402b2a0
08018738 <alloc_socket>:
* 0 if socket has been created by socket()
* @return the index of the new socket; -1 on error
*/
static int
alloc_socket(struct netconn *newconn, int accepted)
{
8018738: b580 push {r7, lr}
801873a: b084 sub sp, #16
801873c: af00 add r7, sp, #0
801873e: 6078 str r0, [r7, #4]
8018740: 6039 str r1, [r7, #0]
int i;
SYS_ARCH_DECL_PROTECT(lev);
LWIP_UNUSED_ARG(accepted);
/* allocate a new socket identifier */
for (i = 0; i < NUM_SOCKETS; ++i) {
8018742: 2300 movs r3, #0
8018744: 60fb str r3, [r7, #12]
8018746: e052 b.n 80187ee <alloc_socket+0xb6>
/* Protect socket array */
SYS_ARCH_PROTECT(lev);
8018748: f00e feda bl 8027500 <sys_arch_protect>
801874c: 60b8 str r0, [r7, #8]
if (!sockets[i].conn) {
801874e: 4a2c ldr r2, [pc, #176] @ (8018800 <alloc_socket+0xc8>)
8018750: 68fb ldr r3, [r7, #12]
8018752: 011b lsls r3, r3, #4
8018754: 4413 add r3, r2
8018756: 681b ldr r3, [r3, #0]
8018758: 2b00 cmp r3, #0
801875a: d142 bne.n 80187e2 <alloc_socket+0xaa>
continue;
}
sockets[i].fd_used = 1;
sockets[i].fd_free_pending = 0;
#endif
sockets[i].conn = newconn;
801875c: 4a28 ldr r2, [pc, #160] @ (8018800 <alloc_socket+0xc8>)
801875e: 68fb ldr r3, [r7, #12]
8018760: 011b lsls r3, r3, #4
8018762: 4413 add r3, r2
8018764: 687a ldr r2, [r7, #4]
8018766: 601a str r2, [r3, #0]
/* The socket is not yet known to anyone, so no need to protect
after having marked it as used. */
SYS_ARCH_UNPROTECT(lev);
8018768: 68b8 ldr r0, [r7, #8]
801876a: f00e fed7 bl 802751c <sys_arch_unprotect>
sockets[i].lastdata.pbuf = NULL;
801876e: 4a24 ldr r2, [pc, #144] @ (8018800 <alloc_socket+0xc8>)
8018770: 68fb ldr r3, [r7, #12]
8018772: 011b lsls r3, r3, #4
8018774: 4413 add r3, r2
8018776: 3304 adds r3, #4
8018778: 2200 movs r2, #0
801877a: 601a str r2, [r3, #0]
#if LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL
LWIP_ASSERT("sockets[i].select_waiting == 0", sockets[i].select_waiting == 0);
801877c: 4a20 ldr r2, [pc, #128] @ (8018800 <alloc_socket+0xc8>)
801877e: 68fb ldr r3, [r7, #12]
8018780: 011b lsls r3, r3, #4
8018782: 4413 add r3, r2
8018784: 330e adds r3, #14
8018786: 781b ldrb r3, [r3, #0]
8018788: 2b00 cmp r3, #0
801878a: d006 beq.n 801879a <alloc_socket+0x62>
801878c: 4b1d ldr r3, [pc, #116] @ (8018804 <alloc_socket+0xcc>)
801878e: f240 220e movw r2, #526 @ 0x20e
8018792: 491d ldr r1, [pc, #116] @ (8018808 <alloc_socket+0xd0>)
8018794: 481d ldr r0, [pc, #116] @ (801880c <alloc_socket+0xd4>)
8018796: f012 f949 bl 802aa2c <iprintf>
sockets[i].rcvevent = 0;
801879a: 4a19 ldr r2, [pc, #100] @ (8018800 <alloc_socket+0xc8>)
801879c: 68fb ldr r3, [r7, #12]
801879e: 011b lsls r3, r3, #4
80187a0: 4413 add r3, r2
80187a2: 3308 adds r3, #8
80187a4: 2200 movs r2, #0
80187a6: 801a strh r2, [r3, #0]
/* TCP sendbuf is empty, but the socket is not yet writable until connected
* (unless it has been created by accept()). */
sockets[i].sendevent = (NETCONNTYPE_GROUP(newconn->type) == NETCONN_TCP ? (accepted != 0) : 1);
80187a8: 687b ldr r3, [r7, #4]
80187aa: 781b ldrb r3, [r3, #0]
80187ac: f003 03f0 and.w r3, r3, #240 @ 0xf0
80187b0: 2b10 cmp r3, #16
80187b2: d102 bne.n 80187ba <alloc_socket+0x82>
80187b4: 683b ldr r3, [r7, #0]
80187b6: 2b00 cmp r3, #0
80187b8: d001 beq.n 80187be <alloc_socket+0x86>
80187ba: 2301 movs r3, #1
80187bc: e000 b.n 80187c0 <alloc_socket+0x88>
80187be: 2300 movs r3, #0
80187c0: b299 uxth r1, r3
80187c2: 4a0f ldr r2, [pc, #60] @ (8018800 <alloc_socket+0xc8>)
80187c4: 68fb ldr r3, [r7, #12]
80187c6: 011b lsls r3, r3, #4
80187c8: 4413 add r3, r2
80187ca: 330a adds r3, #10
80187cc: 460a mov r2, r1
80187ce: 801a strh r2, [r3, #0]
sockets[i].errevent = 0;
80187d0: 4a0b ldr r2, [pc, #44] @ (8018800 <alloc_socket+0xc8>)
80187d2: 68fb ldr r3, [r7, #12]
80187d4: 011b lsls r3, r3, #4
80187d6: 4413 add r3, r2
80187d8: 330c adds r3, #12
80187da: 2200 movs r2, #0
80187dc: 801a strh r2, [r3, #0]
#endif /* LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL */
return i + LWIP_SOCKET_OFFSET;
80187de: 68fb ldr r3, [r7, #12]
80187e0: e00a b.n 80187f8 <alloc_socket+0xc0>
}
SYS_ARCH_UNPROTECT(lev);
80187e2: 68b8 ldr r0, [r7, #8]
80187e4: f00e fe9a bl 802751c <sys_arch_unprotect>
for (i = 0; i < NUM_SOCKETS; ++i) {
80187e8: 68fb ldr r3, [r7, #12]
80187ea: 3301 adds r3, #1
80187ec: 60fb str r3, [r7, #12]
80187ee: 68fb ldr r3, [r7, #12]
80187f0: 2b03 cmp r3, #3
80187f2: dda9 ble.n 8018748 <alloc_socket+0x10>
}
return -1;
80187f4: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
80187f8: 4618 mov r0, r3
80187fa: 3710 adds r7, #16
80187fc: 46bd mov sp, r7
80187fe: bd80 pop {r7, pc}
8018800: 24024404 .word 0x24024404
8018804: 0802e814 .word 0x0802e814
8018808: 0802e848 .word 0x0802e848
801880c: 0802e868 .word 0x0802e868
08018810 <free_socket_locked>:
* @param lastdata lastdata is stored here, must be freed externally
*/
static int
free_socket_locked(struct lwip_sock *sock, int is_tcp, struct netconn **conn,
union lwip_sock_lastdata *lastdata)
{
8018810: b480 push {r7}
8018812: b085 sub sp, #20
8018814: af00 add r7, sp, #0
8018816: 60f8 str r0, [r7, #12]
8018818: 60b9 str r1, [r7, #8]
801881a: 607a str r2, [r7, #4]
801881c: 603b str r3, [r7, #0]
}
#else /* LWIP_NETCONN_FULLDUPLEX */
LWIP_UNUSED_ARG(is_tcp);
#endif /* LWIP_NETCONN_FULLDUPLEX */
*lastdata = sock->lastdata;
801881e: 683b ldr r3, [r7, #0]
8018820: 68fa ldr r2, [r7, #12]
8018822: 6852 ldr r2, [r2, #4]
8018824: 601a str r2, [r3, #0]
sock->lastdata.pbuf = NULL;
8018826: 68fb ldr r3, [r7, #12]
8018828: 2200 movs r2, #0
801882a: 605a str r2, [r3, #4]
*conn = sock->conn;
801882c: 68fb ldr r3, [r7, #12]
801882e: 681a ldr r2, [r3, #0]
8018830: 687b ldr r3, [r7, #4]
8018832: 601a str r2, [r3, #0]
sock->conn = NULL;
8018834: 68fb ldr r3, [r7, #12]
8018836: 2200 movs r2, #0
8018838: 601a str r2, [r3, #0]
return 1;
801883a: 2301 movs r3, #1
}
801883c: 4618 mov r0, r3
801883e: 3714 adds r7, #20
8018840: 46bd mov sp, r7
8018842: f85d 7b04 ldr.w r7, [sp], #4
8018846: 4770 bx lr
08018848 <free_socket_free_elements>:
/** Free a socket's leftover members.
*/
static void
free_socket_free_elements(int is_tcp, struct netconn *conn, union lwip_sock_lastdata *lastdata)
{
8018848: b580 push {r7, lr}
801884a: b084 sub sp, #16
801884c: af00 add r7, sp, #0
801884e: 60f8 str r0, [r7, #12]
8018850: 60b9 str r1, [r7, #8]
8018852: 607a str r2, [r7, #4]
if (lastdata->pbuf != NULL) {
8018854: 687b ldr r3, [r7, #4]
8018856: 681b ldr r3, [r3, #0]
8018858: 2b00 cmp r3, #0
801885a: d00d beq.n 8018878 <free_socket_free_elements+0x30>
if (is_tcp) {
801885c: 68fb ldr r3, [r7, #12]
801885e: 2b00 cmp r3, #0
8018860: d005 beq.n 801886e <free_socket_free_elements+0x26>
pbuf_free(lastdata->pbuf);
8018862: 687b ldr r3, [r7, #4]
8018864: 681b ldr r3, [r3, #0]
8018866: 4618 mov r0, r3
8018868: f002 fe68 bl 801b53c <pbuf_free>
801886c: e004 b.n 8018878 <free_socket_free_elements+0x30>
} else {
netbuf_delete(lastdata->netbuf);
801886e: 687b ldr r3, [r7, #4]
8018870: 681b ldr r3, [r3, #0]
8018872: 4618 mov r0, r3
8018874: f7ff fe78 bl 8018568 <netbuf_delete>
}
}
if (conn != NULL) {
8018878: 68bb ldr r3, [r7, #8]
801887a: 2b00 cmp r3, #0
801887c: d002 beq.n 8018884 <free_socket_free_elements+0x3c>
/* netconn_prepare_delete() has already been called, here we only free the conn */
netconn_delete(conn);
801887e: 68b8 ldr r0, [r7, #8]
8018880: f7fd fd50 bl 8016324 <netconn_delete>
}
}
8018884: bf00 nop
8018886: 3710 adds r7, #16
8018888: 46bd mov sp, r7
801888a: bd80 pop {r7, pc}
0801888c <free_socket>:
* @param sock the socket to free
* @param is_tcp != 0 for TCP sockets, used to free lastdata
*/
static void
free_socket(struct lwip_sock *sock, int is_tcp)
{
801888c: b580 push {r7, lr}
801888e: b086 sub sp, #24
8018890: af00 add r7, sp, #0
8018892: 6078 str r0, [r7, #4]
8018894: 6039 str r1, [r7, #0]
struct netconn *conn;
union lwip_sock_lastdata lastdata;
SYS_ARCH_DECL_PROTECT(lev);
/* Protect socket array */
SYS_ARCH_PROTECT(lev);
8018896: f00e fe33 bl 8027500 <sys_arch_protect>
801889a: 6178 str r0, [r7, #20]
freed = free_socket_locked(sock, is_tcp, &conn, &lastdata);
801889c: f107 0308 add.w r3, r7, #8
80188a0: f107 020c add.w r2, r7, #12
80188a4: 6839 ldr r1, [r7, #0]
80188a6: 6878 ldr r0, [r7, #4]
80188a8: f7ff ffb2 bl 8018810 <free_socket_locked>
80188ac: 6138 str r0, [r7, #16]
SYS_ARCH_UNPROTECT(lev);
80188ae: 6978 ldr r0, [r7, #20]
80188b0: f00e fe34 bl 802751c <sys_arch_unprotect>
/* don't use 'sock' after this line, as another task might have allocated it */
if (freed) {
80188b4: 693b ldr r3, [r7, #16]
80188b6: 2b00 cmp r3, #0
80188b8: d006 beq.n 80188c8 <free_socket+0x3c>
free_socket_free_elements(is_tcp, conn, &lastdata);
80188ba: 68fb ldr r3, [r7, #12]
80188bc: f107 0208 add.w r2, r7, #8
80188c0: 4619 mov r1, r3
80188c2: 6838 ldr r0, [r7, #0]
80188c4: f7ff ffc0 bl 8018848 <free_socket_free_elements>
}
}
80188c8: bf00 nop
80188ca: 3718 adds r7, #24
80188cc: 46bd mov sp, r7
80188ce: bd80 pop {r7, pc}
080188d0 <lwip_close>:
return 0;
}
int
lwip_close(int s)
{
80188d0: b580 push {r7, lr}
80188d2: b086 sub sp, #24
80188d4: af00 add r7, sp, #0
80188d6: 6078 str r0, [r7, #4]
struct lwip_sock *sock;
int is_tcp = 0;
80188d8: 2300 movs r3, #0
80188da: 617b str r3, [r7, #20]
err_t err;
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s));
sock = get_socket(s);
80188dc: 6878 ldr r0, [r7, #4]
80188de: f7ff ff13 bl 8018708 <get_socket>
80188e2: 6138 str r0, [r7, #16]
if (!sock) {
80188e4: 693b ldr r3, [r7, #16]
80188e6: 2b00 cmp r3, #0
80188e8: d102 bne.n 80188f0 <lwip_close+0x20>
return -1;
80188ea: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80188ee: e039 b.n 8018964 <lwip_close+0x94>
}
if (sock->conn != NULL) {
80188f0: 693b ldr r3, [r7, #16]
80188f2: 681b ldr r3, [r3, #0]
80188f4: 2b00 cmp r3, #0
80188f6: d00b beq.n 8018910 <lwip_close+0x40>
is_tcp = NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP;
80188f8: 693b ldr r3, [r7, #16]
80188fa: 681b ldr r3, [r3, #0]
80188fc: 781b ldrb r3, [r3, #0]
80188fe: f003 03f0 and.w r3, r3, #240 @ 0xf0
8018902: 2b10 cmp r3, #16
8018904: bf0c ite eq
8018906: 2301 moveq r3, #1
8018908: 2300 movne r3, #0
801890a: b2db uxtb r3, r3
801890c: 617b str r3, [r7, #20]
801890e: e00a b.n 8018926 <lwip_close+0x56>
} else {
LWIP_ASSERT("sock->lastdata == NULL", sock->lastdata.pbuf == NULL);
8018910: 693b ldr r3, [r7, #16]
8018912: 685b ldr r3, [r3, #4]
8018914: 2b00 cmp r3, #0
8018916: d006 beq.n 8018926 <lwip_close+0x56>
8018918: 4b14 ldr r3, [pc, #80] @ (801896c <lwip_close+0x9c>)
801891a: f44f 7245 mov.w r2, #788 @ 0x314
801891e: 4914 ldr r1, [pc, #80] @ (8018970 <lwip_close+0xa0>)
8018920: 4814 ldr r0, [pc, #80] @ (8018974 <lwip_close+0xa4>)
8018922: f012 f883 bl 802aa2c <iprintf>
#if LWIP_IPV6_MLD
/* drop all possibly joined MLD6 memberships */
lwip_socket_drop_registered_mld6_memberships(s);
#endif /* LWIP_IPV6_MLD */
err = netconn_prepare_delete(sock->conn);
8018926: 693b ldr r3, [r7, #16]
8018928: 681b ldr r3, [r3, #0]
801892a: 4618 mov r0, r3
801892c: f7fd fcd6 bl 80162dc <netconn_prepare_delete>
8018930: 4603 mov r3, r0
8018932: 73fb strb r3, [r7, #15]
if (err != ERR_OK) {
8018934: f997 300f ldrsb.w r3, [r7, #15]
8018938: 2b00 cmp r3, #0
801893a: d00e beq.n 801895a <lwip_close+0x8a>
sock_set_errno(sock, err_to_errno(err));
801893c: f997 300f ldrsb.w r3, [r7, #15]
8018940: 4618 mov r0, r3
8018942: f7ff fdf3 bl 801852c <err_to_errno>
8018946: 60b8 str r0, [r7, #8]
8018948: 68bb ldr r3, [r7, #8]
801894a: 2b00 cmp r3, #0
801894c: d002 beq.n 8018954 <lwip_close+0x84>
801894e: 4a0a ldr r2, [pc, #40] @ (8018978 <lwip_close+0xa8>)
8018950: 68bb ldr r3, [r7, #8]
8018952: 6013 str r3, [r2, #0]
done_socket(sock);
return -1;
8018954: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8018958: e004 b.n 8018964 <lwip_close+0x94>
}
free_socket(sock, is_tcp);
801895a: 6979 ldr r1, [r7, #20]
801895c: 6938 ldr r0, [r7, #16]
801895e: f7ff ff95 bl 801888c <free_socket>
set_errno(0);
return 0;
8018962: 2300 movs r3, #0
}
8018964: 4618 mov r0, r3
8018966: 3718 adds r7, #24
8018968: 46bd mov sp, r7
801896a: bd80 pop {r7, pc}
801896c: 0802e814 .word 0x0802e814
8018970: 0802e8d4 .word 0x0802e8d4
8018974: 0802e868 .word 0x0802e868
8018978: 2402b2a0 .word 0x2402b2a0
0801897c <lwip_connect>:
int
lwip_connect(int s, const struct sockaddr *name, socklen_t namelen)
{
801897c: b580 push {r7, lr}
801897e: b08a sub sp, #40 @ 0x28
8018980: af00 add r7, sp, #0
8018982: 60f8 str r0, [r7, #12]
8018984: 60b9 str r1, [r7, #8]
8018986: 607a str r2, [r7, #4]
struct lwip_sock *sock;
err_t err;
sock = get_socket(s);
8018988: 68f8 ldr r0, [r7, #12]
801898a: f7ff febd bl 8018708 <get_socket>
801898e: 6278 str r0, [r7, #36] @ 0x24
if (!sock) {
8018990: 6a7b ldr r3, [r7, #36] @ 0x24
8018992: 2b00 cmp r3, #0
8018994: d102 bne.n 801899c <lwip_connect+0x20>
return -1;
8018996: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
801899a: e062 b.n 8018a62 <lwip_connect+0xe6>
done_socket(sock);
return -1;
}
LWIP_UNUSED_ARG(namelen);
if (name->sa_family == AF_UNSPEC) {
801899c: 68bb ldr r3, [r7, #8]
801899e: 785b ldrb r3, [r3, #1]
80189a0: 2b00 cmp r3, #0
80189a2: d108 bne.n 80189b6 <lwip_connect+0x3a>
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s));
err = netconn_disconnect(sock->conn);
80189a4: 6a7b ldr r3, [r7, #36] @ 0x24
80189a6: 681b ldr r3, [r3, #0]
80189a8: 4618 mov r0, r3
80189aa: f7fd fd61 bl 8016470 <netconn_disconnect>
80189ae: 4603 mov r3, r0
80189b0: f887 3021 strb.w r3, [r7, #33] @ 0x21
80189b4: e039 b.n 8018a2a <lwip_connect+0xae>
} else {
ip_addr_t remote_addr;
u16_t remote_port;
/* check size, family and alignment of 'name' */
LWIP_ERROR("lwip_connect: invalid address", IS_SOCK_ADDR_LEN_VALID(namelen) &&
80189b6: 687b ldr r3, [r7, #4]
80189b8: 2b10 cmp r3, #16
80189ba: d10c bne.n 80189d6 <lwip_connect+0x5a>
80189bc: 68bb ldr r3, [r7, #8]
80189be: 785b ldrb r3, [r3, #1]
80189c0: 2b00 cmp r3, #0
80189c2: d003 beq.n 80189cc <lwip_connect+0x50>
80189c4: 68bb ldr r3, [r7, #8]
80189c6: 785b ldrb r3, [r3, #1]
80189c8: 2b02 cmp r3, #2
80189ca: d104 bne.n 80189d6 <lwip_connect+0x5a>
80189cc: 68bb ldr r3, [r7, #8]
80189ce: f003 0303 and.w r3, r3, #3
80189d2: 2b00 cmp r3, #0
80189d4: d014 beq.n 8018a00 <lwip_connect+0x84>
80189d6: 4b25 ldr r3, [pc, #148] @ (8018a6c <lwip_connect+0xf0>)
80189d8: f240 3247 movw r2, #839 @ 0x347
80189dc: 4924 ldr r1, [pc, #144] @ (8018a70 <lwip_connect+0xf4>)
80189de: 4825 ldr r0, [pc, #148] @ (8018a74 <lwip_connect+0xf8>)
80189e0: f012 f824 bl 802aa2c <iprintf>
80189e4: f06f 000f mvn.w r0, #15
80189e8: f7ff fda0 bl 801852c <err_to_errno>
80189ec: 61f8 str r0, [r7, #28]
80189ee: 69fb ldr r3, [r7, #28]
80189f0: 2b00 cmp r3, #0
80189f2: d002 beq.n 80189fa <lwip_connect+0x7e>
80189f4: 4a20 ldr r2, [pc, #128] @ (8018a78 <lwip_connect+0xfc>)
80189f6: 69fb ldr r3, [r7, #28]
80189f8: 6013 str r3, [r2, #0]
80189fa: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80189fe: e030 b.n 8018a62 <lwip_connect+0xe6>
IS_SOCK_ADDR_TYPE_VALID_OR_UNSPEC(name) && IS_SOCK_ADDR_ALIGNED(name),
sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);
SOCKADDR_TO_IPADDR_PORT(name, &remote_addr, remote_port);
8018a00: 68bb ldr r3, [r7, #8]
8018a02: 685b ldr r3, [r3, #4]
8018a04: 613b str r3, [r7, #16]
8018a06: 68bb ldr r3, [r7, #8]
8018a08: 885b ldrh r3, [r3, #2]
8018a0a: 4618 mov r0, r3
8018a0c: f001 f8b4 bl 8019b78 <lwip_htons>
8018a10: 4603 mov r3, r0
8018a12: 847b strh r3, [r7, #34] @ 0x22
unmap_ipv4_mapped_ipv6(ip_2_ip4(&remote_addr), ip_2_ip6(&remote_addr));
IP_SET_TYPE_VAL(remote_addr, IPADDR_TYPE_V4);
}
#endif /* LWIP_IPV4 && LWIP_IPV6 */
err = netconn_connect(sock->conn, &remote_addr, remote_port);
8018a14: 6a7b ldr r3, [r7, #36] @ 0x24
8018a16: 681b ldr r3, [r3, #0]
8018a18: 8c7a ldrh r2, [r7, #34] @ 0x22
8018a1a: f107 0110 add.w r1, r7, #16
8018a1e: 4618 mov r0, r3
8018a20: f7fd fcee bl 8016400 <netconn_connect>
8018a24: 4603 mov r3, r0
8018a26: f887 3021 strb.w r3, [r7, #33] @ 0x21
}
if (err != ERR_OK) {
8018a2a: f997 3021 ldrsb.w r3, [r7, #33] @ 0x21
8018a2e: 2b00 cmp r3, #0
8018a30: d00e beq.n 8018a50 <lwip_connect+0xd4>
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err));
sock_set_errno(sock, err_to_errno(err));
8018a32: f997 3021 ldrsb.w r3, [r7, #33] @ 0x21
8018a36: 4618 mov r0, r3
8018a38: f7ff fd78 bl 801852c <err_to_errno>
8018a3c: 6178 str r0, [r7, #20]
8018a3e: 697b ldr r3, [r7, #20]
8018a40: 2b00 cmp r3, #0
8018a42: d002 beq.n 8018a4a <lwip_connect+0xce>
8018a44: 4a0c ldr r2, [pc, #48] @ (8018a78 <lwip_connect+0xfc>)
8018a46: 697b ldr r3, [r7, #20]
8018a48: 6013 str r3, [r2, #0]
done_socket(sock);
return -1;
8018a4a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8018a4e: e008 b.n 8018a62 <lwip_connect+0xe6>
}
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s));
sock_set_errno(sock, 0);
8018a50: 2300 movs r3, #0
8018a52: 61bb str r3, [r7, #24]
8018a54: 69bb ldr r3, [r7, #24]
8018a56: 2b00 cmp r3, #0
8018a58: d002 beq.n 8018a60 <lwip_connect+0xe4>
8018a5a: 4a07 ldr r2, [pc, #28] @ (8018a78 <lwip_connect+0xfc>)
8018a5c: 69bb ldr r3, [r7, #24]
8018a5e: 6013 str r3, [r2, #0]
done_socket(sock);
return 0;
8018a60: 2300 movs r3, #0
}
8018a62: 4618 mov r0, r3
8018a64: 3728 adds r7, #40 @ 0x28
8018a66: 46bd mov sp, r7
8018a68: bd80 pop {r7, pc}
8018a6a: bf00 nop
8018a6c: 0802e814 .word 0x0802e814
8018a70: 0802e8ec .word 0x0802e8ec
8018a74: 0802e868 .word 0x0802e868
8018a78: 2402b2a0 .word 0x2402b2a0
08018a7c <lwip_recv_tcp>:
* until "len" bytes are received or we're otherwise done.
* Keeps sock->lastdata for peeking or partly copying.
*/
static ssize_t
lwip_recv_tcp(struct lwip_sock *sock, void *mem, size_t len, int flags)
{
8018a7c: b580 push {r7, lr}
8018a7e: b08c sub sp, #48 @ 0x30
8018a80: af00 add r7, sp, #0
8018a82: 60f8 str r0, [r7, #12]
8018a84: 60b9 str r1, [r7, #8]
8018a86: 607a str r2, [r7, #4]
8018a88: 603b str r3, [r7, #0]
u8_t apiflags = NETCONN_NOAUTORCVD;
8018a8a: 2308 movs r3, #8
8018a8c: f887 3023 strb.w r3, [r7, #35] @ 0x23
ssize_t recvd = 0;
8018a90: 2300 movs r3, #0
8018a92: 62bb str r3, [r7, #40] @ 0x28
ssize_t recv_left = (len <= SSIZE_MAX) ? (ssize_t)len : SSIZE_MAX;
8018a94: 687b ldr r3, [r7, #4]
8018a96: 2b00 cmp r3, #0
8018a98: db01 blt.n 8018a9e <lwip_recv_tcp+0x22>
8018a9a: 687b ldr r3, [r7, #4]
8018a9c: e001 b.n 8018aa2 <lwip_recv_tcp+0x26>
8018a9e: f06f 4300 mvn.w r3, #2147483648 @ 0x80000000
8018aa2: 627b str r3, [r7, #36] @ 0x24
LWIP_ASSERT("no socket given", sock != NULL);
8018aa4: 68fb ldr r3, [r7, #12]
8018aa6: 2b00 cmp r3, #0
8018aa8: d106 bne.n 8018ab8 <lwip_recv_tcp+0x3c>
8018aaa: 4b74 ldr r3, [pc, #464] @ (8018c7c <lwip_recv_tcp+0x200>)
8018aac: f240 329e movw r2, #926 @ 0x39e
8018ab0: 4973 ldr r1, [pc, #460] @ (8018c80 <lwip_recv_tcp+0x204>)
8018ab2: 4874 ldr r0, [pc, #464] @ (8018c84 <lwip_recv_tcp+0x208>)
8018ab4: f011 ffba bl 802aa2c <iprintf>
LWIP_ASSERT("this should be checked internally", NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP);
8018ab8: 68fb ldr r3, [r7, #12]
8018aba: 681b ldr r3, [r3, #0]
8018abc: 781b ldrb r3, [r3, #0]
8018abe: f003 03f0 and.w r3, r3, #240 @ 0xf0
8018ac2: 2b10 cmp r3, #16
8018ac4: d006 beq.n 8018ad4 <lwip_recv_tcp+0x58>
8018ac6: 4b6d ldr r3, [pc, #436] @ (8018c7c <lwip_recv_tcp+0x200>)
8018ac8: f240 329f movw r2, #927 @ 0x39f
8018acc: 496e ldr r1, [pc, #440] @ (8018c88 <lwip_recv_tcp+0x20c>)
8018ace: 486d ldr r0, [pc, #436] @ (8018c84 <lwip_recv_tcp+0x208>)
8018ad0: f011 ffac bl 802aa2c <iprintf>
if (flags & MSG_DONTWAIT) {
8018ad4: 683b ldr r3, [r7, #0]
8018ad6: f003 0308 and.w r3, r3, #8
8018ada: 2b00 cmp r3, #0
8018adc: d005 beq.n 8018aea <lwip_recv_tcp+0x6e>
apiflags |= NETCONN_DONTBLOCK;
8018ade: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
8018ae2: f043 0304 orr.w r3, r3, #4
8018ae6: f887 3023 strb.w r3, [r7, #35] @ 0x23
err_t err;
u16_t copylen;
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: top while sock->lastdata=%p\n", (void *)sock->lastdata.pbuf));
/* Check if there is data left from the last recv operation. */
if (sock->lastdata.pbuf) {
8018aea: 68fb ldr r3, [r7, #12]
8018aec: 685b ldr r3, [r3, #4]
8018aee: 2b00 cmp r3, #0
8018af0: d003 beq.n 8018afa <lwip_recv_tcp+0x7e>
p = sock->lastdata.pbuf;
8018af2: 68fb ldr r3, [r7, #12]
8018af4: 685b ldr r3, [r3, #4]
8018af6: 617b str r3, [r7, #20]
8018af8: e036 b.n 8018b68 <lwip_recv_tcp+0xec>
} else {
/* No data was left from the previous operation, so we try to get
some from the network. */
err = netconn_recv_tcp_pbuf_flags(sock->conn, &p, apiflags);
8018afa: 68fb ldr r3, [r7, #12]
8018afc: 681b ldr r3, [r3, #0]
8018afe: f897 2023 ldrb.w r2, [r7, #35] @ 0x23
8018b02: f107 0114 add.w r1, r7, #20
8018b06: 4618 mov r0, r3
8018b08: f7fd fea4 bl 8016854 <netconn_recv_tcp_pbuf_flags>
8018b0c: 4603 mov r3, r0
8018b0e: f887 3022 strb.w r3, [r7, #34] @ 0x22
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: netconn_recv err=%d, pbuf=%p\n",
err, (void *)p));
if (err != ERR_OK) {
8018b12: f997 3022 ldrsb.w r3, [r7, #34] @ 0x22
8018b16: 2b00 cmp r3, #0
8018b18: d019 beq.n 8018b4e <lwip_recv_tcp+0xd2>
if (recvd > 0) {
8018b1a: 6abb ldr r3, [r7, #40] @ 0x28
8018b1c: 2b00 cmp r3, #0
8018b1e: f300 808d bgt.w 8018c3c <lwip_recv_tcp+0x1c0>
goto lwip_recv_tcp_done;
}
/* We should really do some error checking here. */
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: p == NULL, error is \"%s\"!\n",
lwip_strerr(err)));
sock_set_errno(sock, err_to_errno(err));
8018b22: f997 3022 ldrsb.w r3, [r7, #34] @ 0x22
8018b26: 4618 mov r0, r3
8018b28: f7ff fd00 bl 801852c <err_to_errno>
8018b2c: 61f8 str r0, [r7, #28]
8018b2e: 69fb ldr r3, [r7, #28]
8018b30: 2b00 cmp r3, #0
8018b32: d002 beq.n 8018b3a <lwip_recv_tcp+0xbe>
8018b34: 4a55 ldr r2, [pc, #340] @ (8018c8c <lwip_recv_tcp+0x210>)
8018b36: 69fb ldr r3, [r7, #28]
8018b38: 6013 str r3, [r2, #0]
if (err == ERR_CLSD) {
8018b3a: f997 3022 ldrsb.w r3, [r7, #34] @ 0x22
8018b3e: f113 0f0f cmn.w r3, #15
8018b42: d101 bne.n 8018b48 <lwip_recv_tcp+0xcc>
return 0;
8018b44: 2300 movs r3, #0
8018b46: e094 b.n 8018c72 <lwip_recv_tcp+0x1f6>
} else {
return -1;
8018b48: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8018b4c: e091 b.n 8018c72 <lwip_recv_tcp+0x1f6>
}
}
LWIP_ASSERT("p != NULL", p != NULL);
8018b4e: 697b ldr r3, [r7, #20]
8018b50: 2b00 cmp r3, #0
8018b52: d106 bne.n 8018b62 <lwip_recv_tcp+0xe6>
8018b54: 4b49 ldr r3, [pc, #292] @ (8018c7c <lwip_recv_tcp+0x200>)
8018b56: f240 32c5 movw r2, #965 @ 0x3c5
8018b5a: 494d ldr r1, [pc, #308] @ (8018c90 <lwip_recv_tcp+0x214>)
8018b5c: 4849 ldr r0, [pc, #292] @ (8018c84 <lwip_recv_tcp+0x208>)
8018b5e: f011 ff65 bl 802aa2c <iprintf>
sock->lastdata.pbuf = p;
8018b62: 697a ldr r2, [r7, #20]
8018b64: 68fb ldr r3, [r7, #12]
8018b66: 605a str r2, [r3, #4]
}
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: buflen=%"U16_F" recv_left=%d off=%d\n",
p->tot_len, (int)recv_left, (int)recvd));
if (recv_left > p->tot_len) {
8018b68: 697b ldr r3, [r7, #20]
8018b6a: 891b ldrh r3, [r3, #8]
8018b6c: 461a mov r2, r3
8018b6e: 6a7b ldr r3, [r7, #36] @ 0x24
8018b70: 4293 cmp r3, r2
8018b72: dd03 ble.n 8018b7c <lwip_recv_tcp+0x100>
copylen = p->tot_len;
8018b74: 697b ldr r3, [r7, #20]
8018b76: 891b ldrh r3, [r3, #8]
8018b78: 85fb strh r3, [r7, #46] @ 0x2e
8018b7a: e001 b.n 8018b80 <lwip_recv_tcp+0x104>
} else {
copylen = (u16_t)recv_left;
8018b7c: 6a7b ldr r3, [r7, #36] @ 0x24
8018b7e: 85fb strh r3, [r7, #46] @ 0x2e
}
if (recvd + copylen < recvd) {
8018b80: 8dfa ldrh r2, [r7, #46] @ 0x2e
8018b82: 6abb ldr r3, [r7, #40] @ 0x28
8018b84: 4413 add r3, r2
8018b86: 6aba ldr r2, [r7, #40] @ 0x28
8018b88: 429a cmp r2, r3
8018b8a: dd03 ble.n 8018b94 <lwip_recv_tcp+0x118>
/* overflow */
copylen = (u16_t)(SSIZE_MAX - recvd);
8018b8c: 6abb ldr r3, [r7, #40] @ 0x28
8018b8e: b29b uxth r3, r3
8018b90: 43db mvns r3, r3
8018b92: 85fb strh r3, [r7, #46] @ 0x2e
}
/* copy the contents of the received buffer into
the supplied memory pointer mem */
pbuf_copy_partial(p, (u8_t *)mem + recvd, copylen, 0);
8018b94: 6978 ldr r0, [r7, #20]
8018b96: 6abb ldr r3, [r7, #40] @ 0x28
8018b98: 68ba ldr r2, [r7, #8]
8018b9a: 18d1 adds r1, r2, r3
8018b9c: 8dfa ldrh r2, [r7, #46] @ 0x2e
8018b9e: 2300 movs r3, #0
8018ba0: f002 fed2 bl 801b948 <pbuf_copy_partial>
recvd += copylen;
8018ba4: 8dfb ldrh r3, [r7, #46] @ 0x2e
8018ba6: 6aba ldr r2, [r7, #40] @ 0x28
8018ba8: 4413 add r3, r2
8018baa: 62bb str r3, [r7, #40] @ 0x28
/* TCP combines multiple pbufs for one recv */
LWIP_ASSERT("invalid copylen, len would underflow", recv_left >= copylen);
8018bac: 8dfb ldrh r3, [r7, #46] @ 0x2e
8018bae: 6a7a ldr r2, [r7, #36] @ 0x24
8018bb0: 429a cmp r2, r3
8018bb2: da06 bge.n 8018bc2 <lwip_recv_tcp+0x146>
8018bb4: 4b31 ldr r3, [pc, #196] @ (8018c7c <lwip_recv_tcp+0x200>)
8018bb6: f240 32dd movw r2, #989 @ 0x3dd
8018bba: 4936 ldr r1, [pc, #216] @ (8018c94 <lwip_recv_tcp+0x218>)
8018bbc: 4831 ldr r0, [pc, #196] @ (8018c84 <lwip_recv_tcp+0x208>)
8018bbe: f011 ff35 bl 802aa2c <iprintf>
recv_left -= copylen;
8018bc2: 8dfb ldrh r3, [r7, #46] @ 0x2e
8018bc4: 6a7a ldr r2, [r7, #36] @ 0x24
8018bc6: 1ad3 subs r3, r2, r3
8018bc8: 627b str r3, [r7, #36] @ 0x24
/* Unless we peek the incoming message... */
if ((flags & MSG_PEEK) == 0) {
8018bca: 683b ldr r3, [r7, #0]
8018bcc: f003 0301 and.w r3, r3, #1
8018bd0: 2b00 cmp r3, #0
8018bd2: d123 bne.n 8018c1c <lwip_recv_tcp+0x1a0>
/* ... check if there is data left in the pbuf */
LWIP_ASSERT("invalid copylen", p->tot_len >= copylen);
8018bd4: 697b ldr r3, [r7, #20]
8018bd6: 891b ldrh r3, [r3, #8]
8018bd8: 8dfa ldrh r2, [r7, #46] @ 0x2e
8018bda: 429a cmp r2, r3
8018bdc: d906 bls.n 8018bec <lwip_recv_tcp+0x170>
8018bde: 4b27 ldr r3, [pc, #156] @ (8018c7c <lwip_recv_tcp+0x200>)
8018be0: f240 32e3 movw r2, #995 @ 0x3e3
8018be4: 492c ldr r1, [pc, #176] @ (8018c98 <lwip_recv_tcp+0x21c>)
8018be6: 4827 ldr r0, [pc, #156] @ (8018c84 <lwip_recv_tcp+0x208>)
8018be8: f011 ff20 bl 802aa2c <iprintf>
if (p->tot_len - copylen > 0) {
8018bec: 697b ldr r3, [r7, #20]
8018bee: 891b ldrh r3, [r3, #8]
8018bf0: 461a mov r2, r3
8018bf2: 8dfb ldrh r3, [r7, #46] @ 0x2e
8018bf4: 1ad3 subs r3, r2, r3
8018bf6: 2b00 cmp r3, #0
8018bf8: dd09 ble.n 8018c0e <lwip_recv_tcp+0x192>
/* If so, it should be saved in the sock structure for the next recv call.
We store the pbuf but hide/free the consumed data: */
sock->lastdata.pbuf = pbuf_free_header(p, copylen);
8018bfa: 697b ldr r3, [r7, #20]
8018bfc: 8dfa ldrh r2, [r7, #46] @ 0x2e
8018bfe: 4611 mov r1, r2
8018c00: 4618 mov r0, r3
8018c02: f002 fc68 bl 801b4d6 <pbuf_free_header>
8018c06: 4602 mov r2, r0
8018c08: 68fb ldr r3, [r7, #12]
8018c0a: 605a str r2, [r3, #4]
8018c0c: e006 b.n 8018c1c <lwip_recv_tcp+0x1a0>
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: lastdata now pbuf=%p\n", (void *)sock->lastdata.pbuf));
} else {
sock->lastdata.pbuf = NULL;
8018c0e: 68fb ldr r3, [r7, #12]
8018c10: 2200 movs r2, #0
8018c12: 605a str r2, [r3, #4]
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: deleting pbuf=%p\n", (void *)p));
pbuf_free(p);
8018c14: 697b ldr r3, [r7, #20]
8018c16: 4618 mov r0, r3
8018c18: f002 fc90 bl 801b53c <pbuf_free>
}
}
/* once we have some data to return, only add more if we don't need to wait */
apiflags |= NETCONN_DONTBLOCK | NETCONN_NOFIN;
8018c1c: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
8018c20: f043 0314 orr.w r3, r3, #20
8018c24: f887 3023 strb.w r3, [r7, #35] @ 0x23
/* @todo: do we need to support peeking more than one pbuf? */
} while ((recv_left > 0) && !(flags & MSG_PEEK));
8018c28: 6a7b ldr r3, [r7, #36] @ 0x24
8018c2a: 2b00 cmp r3, #0
8018c2c: dd08 ble.n 8018c40 <lwip_recv_tcp+0x1c4>
8018c2e: 683b ldr r3, [r7, #0]
8018c30: f003 0301 and.w r3, r3, #1
8018c34: 2b00 cmp r3, #0
8018c36: f43f af58 beq.w 8018aea <lwip_recv_tcp+0x6e>
lwip_recv_tcp_done:
8018c3a: e001 b.n 8018c40 <lwip_recv_tcp+0x1c4>
goto lwip_recv_tcp_done;
8018c3c: bf00 nop
8018c3e: e000 b.n 8018c42 <lwip_recv_tcp+0x1c6>
lwip_recv_tcp_done:
8018c40: bf00 nop
if ((recvd > 0) && !(flags & MSG_PEEK)) {
8018c42: 6abb ldr r3, [r7, #40] @ 0x28
8018c44: 2b00 cmp r3, #0
8018c46: dd0b ble.n 8018c60 <lwip_recv_tcp+0x1e4>
8018c48: 683b ldr r3, [r7, #0]
8018c4a: f003 0301 and.w r3, r3, #1
8018c4e: 2b00 cmp r3, #0
8018c50: d106 bne.n 8018c60 <lwip_recv_tcp+0x1e4>
/* ensure window update after copying all data */
netconn_tcp_recvd(sock->conn, (size_t)recvd);
8018c52: 68fb ldr r3, [r7, #12]
8018c54: 681b ldr r3, [r3, #0]
8018c56: 6aba ldr r2, [r7, #40] @ 0x28
8018c58: 4611 mov r1, r2
8018c5a: 4618 mov r0, r3
8018c5c: f7fd fd42 bl 80166e4 <netconn_tcp_recvd>
}
sock_set_errno(sock, 0);
8018c60: 2300 movs r3, #0
8018c62: 61bb str r3, [r7, #24]
8018c64: 69bb ldr r3, [r7, #24]
8018c66: 2b00 cmp r3, #0
8018c68: d002 beq.n 8018c70 <lwip_recv_tcp+0x1f4>
8018c6a: 4a08 ldr r2, [pc, #32] @ (8018c8c <lwip_recv_tcp+0x210>)
8018c6c: 69bb ldr r3, [r7, #24]
8018c6e: 6013 str r3, [r2, #0]
return recvd;
8018c70: 6abb ldr r3, [r7, #40] @ 0x28
}
8018c72: 4618 mov r0, r3
8018c74: 3730 adds r7, #48 @ 0x30
8018c76: 46bd mov sp, r7
8018c78: bd80 pop {r7, pc}
8018c7a: bf00 nop
8018c7c: 0802e814 .word 0x0802e814
8018c80: 0802e90c .word 0x0802e90c
8018c84: 0802e868 .word 0x0802e868
8018c88: 0802e91c .word 0x0802e91c
8018c8c: 2402b2a0 .word 0x2402b2a0
8018c90: 0802e940 .word 0x0802e940
8018c94: 0802e94c .word 0x0802e94c
8018c98: 0802e974 .word 0x0802e974
08018c9c <lwip_sock_make_addr>:
/* Convert a netbuf's address data to struct sockaddr */
static int
lwip_sock_make_addr(struct netconn *conn, ip_addr_t *fromaddr, u16_t port,
struct sockaddr *from, socklen_t *fromlen)
{
8018c9c: b590 push {r4, r7, lr}
8018c9e: b08b sub sp, #44 @ 0x2c
8018ca0: af00 add r7, sp, #0
8018ca2: 60f8 str r0, [r7, #12]
8018ca4: 60b9 str r1, [r7, #8]
8018ca6: 603b str r3, [r7, #0]
8018ca8: 4613 mov r3, r2
8018caa: 80fb strh r3, [r7, #6]
int truncated = 0;
8018cac: 2300 movs r3, #0
8018cae: 627b str r3, [r7, #36] @ 0x24
union sockaddr_aligned saddr;
LWIP_UNUSED_ARG(conn);
LWIP_ASSERT("fromaddr != NULL", fromaddr != NULL);
8018cb0: 68bb ldr r3, [r7, #8]
8018cb2: 2b00 cmp r3, #0
8018cb4: d106 bne.n 8018cc4 <lwip_sock_make_addr+0x28>
8018cb6: 4b2b ldr r3, [pc, #172] @ (8018d64 <lwip_sock_make_addr+0xc8>)
8018cb8: f240 4207 movw r2, #1031 @ 0x407
8018cbc: 492a ldr r1, [pc, #168] @ (8018d68 <lwip_sock_make_addr+0xcc>)
8018cbe: 482b ldr r0, [pc, #172] @ (8018d6c <lwip_sock_make_addr+0xd0>)
8018cc0: f011 feb4 bl 802aa2c <iprintf>
LWIP_ASSERT("from != NULL", from != NULL);
8018cc4: 683b ldr r3, [r7, #0]
8018cc6: 2b00 cmp r3, #0
8018cc8: d106 bne.n 8018cd8 <lwip_sock_make_addr+0x3c>
8018cca: 4b26 ldr r3, [pc, #152] @ (8018d64 <lwip_sock_make_addr+0xc8>)
8018ccc: f44f 6281 mov.w r2, #1032 @ 0x408
8018cd0: 4927 ldr r1, [pc, #156] @ (8018d70 <lwip_sock_make_addr+0xd4>)
8018cd2: 4826 ldr r0, [pc, #152] @ (8018d6c <lwip_sock_make_addr+0xd0>)
8018cd4: f011 feaa bl 802aa2c <iprintf>
LWIP_ASSERT("fromlen != NULL", fromlen != NULL);
8018cd8: 6bbb ldr r3, [r7, #56] @ 0x38
8018cda: 2b00 cmp r3, #0
8018cdc: d106 bne.n 8018cec <lwip_sock_make_addr+0x50>
8018cde: 4b21 ldr r3, [pc, #132] @ (8018d64 <lwip_sock_make_addr+0xc8>)
8018ce0: f240 4209 movw r2, #1033 @ 0x409
8018ce4: 4923 ldr r1, [pc, #140] @ (8018d74 <lwip_sock_make_addr+0xd8>)
8018ce6: 4821 ldr r0, [pc, #132] @ (8018d6c <lwip_sock_make_addr+0xd0>)
8018ce8: f011 fea0 bl 802aa2c <iprintf>
ip4_2_ipv4_mapped_ipv6(ip_2_ip6(fromaddr), ip_2_ip4(fromaddr));
IP_SET_TYPE(fromaddr, IPADDR_TYPE_V6);
}
#endif /* LWIP_IPV4 && LWIP_IPV6 */
IPADDR_PORT_TO_SOCKADDR(&saddr, fromaddr, port);
8018cec: f107 0314 add.w r3, r7, #20
8018cf0: 2210 movs r2, #16
8018cf2: 701a strb r2, [r3, #0]
8018cf4: f107 0314 add.w r3, r7, #20
8018cf8: 2202 movs r2, #2
8018cfa: 705a strb r2, [r3, #1]
8018cfc: f107 0414 add.w r4, r7, #20
8018d00: 88fb ldrh r3, [r7, #6]
8018d02: 4618 mov r0, r3
8018d04: f000 ff38 bl 8019b78 <lwip_htons>
8018d08: 4603 mov r3, r0
8018d0a: 8063 strh r3, [r4, #2]
8018d0c: f107 0314 add.w r3, r7, #20
8018d10: 68ba ldr r2, [r7, #8]
8018d12: 6812 ldr r2, [r2, #0]
8018d14: 605a str r2, [r3, #4]
8018d16: f107 0314 add.w r3, r7, #20
8018d1a: 3308 adds r3, #8
8018d1c: 2208 movs r2, #8
8018d1e: 2100 movs r1, #0
8018d20: 4618 mov r0, r3
8018d22: f012 f815 bl 802ad50 <memset>
if (*fromlen < saddr.sa.sa_len) {
8018d26: 6bbb ldr r3, [r7, #56] @ 0x38
8018d28: 681b ldr r3, [r3, #0]
8018d2a: 7d3a ldrb r2, [r7, #20]
8018d2c: 4293 cmp r3, r2
8018d2e: d202 bcs.n 8018d36 <lwip_sock_make_addr+0x9a>
truncated = 1;
8018d30: 2301 movs r3, #1
8018d32: 627b str r3, [r7, #36] @ 0x24
8018d34: e008 b.n 8018d48 <lwip_sock_make_addr+0xac>
} else if (*fromlen > saddr.sa.sa_len) {
8018d36: 6bbb ldr r3, [r7, #56] @ 0x38
8018d38: 681b ldr r3, [r3, #0]
8018d3a: 7d3a ldrb r2, [r7, #20]
8018d3c: 4293 cmp r3, r2
8018d3e: d903 bls.n 8018d48 <lwip_sock_make_addr+0xac>
*fromlen = saddr.sa.sa_len;
8018d40: 7d3b ldrb r3, [r7, #20]
8018d42: 461a mov r2, r3
8018d44: 6bbb ldr r3, [r7, #56] @ 0x38
8018d46: 601a str r2, [r3, #0]
}
MEMCPY(from, &saddr, *fromlen);
8018d48: 6bbb ldr r3, [r7, #56] @ 0x38
8018d4a: 681a ldr r2, [r3, #0]
8018d4c: f107 0314 add.w r3, r7, #20
8018d50: 4619 mov r1, r3
8018d52: 6838 ldr r0, [r7, #0]
8018d54: f012 f8f3 bl 802af3e <memcpy>
return truncated;
8018d58: 6a7b ldr r3, [r7, #36] @ 0x24
}
8018d5a: 4618 mov r0, r3
8018d5c: 372c adds r7, #44 @ 0x2c
8018d5e: 46bd mov sp, r7
8018d60: bd90 pop {r4, r7, pc}
8018d62: bf00 nop
8018d64: 0802e814 .word 0x0802e814
8018d68: 0802e984 .word 0x0802e984
8018d6c: 0802e868 .word 0x0802e868
8018d70: 0802e998 .word 0x0802e998
8018d74: 0802e9a8 .word 0x0802e9a8
08018d78 <lwip_recv_tcp_from>:
#if LWIP_TCP
/* Helper function to get a tcp socket's remote address info */
static int
lwip_recv_tcp_from(struct lwip_sock *sock, struct sockaddr *from, socklen_t *fromlen, const char *dbg_fn, int dbg_s, ssize_t dbg_ret)
{
8018d78: b580 push {r7, lr}
8018d7a: b088 sub sp, #32
8018d7c: af02 add r7, sp, #8
8018d7e: 60f8 str r0, [r7, #12]
8018d80: 60b9 str r1, [r7, #8]
8018d82: 607a str r2, [r7, #4]
8018d84: 603b str r3, [r7, #0]
if (sock == NULL) {
8018d86: 68fb ldr r3, [r7, #12]
8018d88: 2b00 cmp r3, #0
8018d8a: d101 bne.n 8018d90 <lwip_recv_tcp_from+0x18>
return 0;
8018d8c: 2300 movs r3, #0
8018d8e: e021 b.n 8018dd4 <lwip_recv_tcp_from+0x5c>
LWIP_UNUSED_ARG(dbg_fn);
LWIP_UNUSED_ARG(dbg_s);
LWIP_UNUSED_ARG(dbg_ret);
#if !SOCKETS_DEBUG
if (from && fromlen)
8018d90: 68bb ldr r3, [r7, #8]
8018d92: 2b00 cmp r3, #0
8018d94: d01d beq.n 8018dd2 <lwip_recv_tcp_from+0x5a>
8018d96: 687b ldr r3, [r7, #4]
8018d98: 2b00 cmp r3, #0
8018d9a: d01a beq.n 8018dd2 <lwip_recv_tcp_from+0x5a>
#endif /* !SOCKETS_DEBUG */
{
/* get remote addr/port from tcp_pcb */
u16_t port;
ip_addr_t tmpaddr;
netconn_getaddr(sock->conn, &tmpaddr, &port, 0);
8018d9c: 68fb ldr r3, [r7, #12]
8018d9e: 6818 ldr r0, [r3, #0]
8018da0: f107 0216 add.w r2, r7, #22
8018da4: f107 0110 add.w r1, r7, #16
8018da8: 2300 movs r3, #0
8018daa: f7fd fad7 bl 801635c <netconn_getaddr>
LWIP_DEBUGF(SOCKETS_DEBUG, ("%s(%d): addr=", dbg_fn, dbg_s));
ip_addr_debug_print_val(SOCKETS_DEBUG, tmpaddr);
LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", port, (int)dbg_ret));
if (from && fromlen) {
8018dae: 68bb ldr r3, [r7, #8]
8018db0: 2b00 cmp r3, #0
8018db2: d00e beq.n 8018dd2 <lwip_recv_tcp_from+0x5a>
8018db4: 687b ldr r3, [r7, #4]
8018db6: 2b00 cmp r3, #0
8018db8: d00b beq.n 8018dd2 <lwip_recv_tcp_from+0x5a>
return lwip_sock_make_addr(sock->conn, &tmpaddr, port, from, fromlen);
8018dba: 68fb ldr r3, [r7, #12]
8018dbc: 6818 ldr r0, [r3, #0]
8018dbe: 8afa ldrh r2, [r7, #22]
8018dc0: f107 0110 add.w r1, r7, #16
8018dc4: 687b ldr r3, [r7, #4]
8018dc6: 9300 str r3, [sp, #0]
8018dc8: 68bb ldr r3, [r7, #8]
8018dca: f7ff ff67 bl 8018c9c <lwip_sock_make_addr>
8018dce: 4603 mov r3, r0
8018dd0: e000 b.n 8018dd4 <lwip_recv_tcp_from+0x5c>
}
}
return 0;
8018dd2: 2300 movs r3, #0
}
8018dd4: 4618 mov r0, r3
8018dd6: 3718 adds r7, #24
8018dd8: 46bd mov sp, r7
8018dda: bd80 pop {r7, pc}
08018ddc <lwip_recvfrom_udp_raw>:
/* Helper function to receive a netbuf from a udp or raw netconn.
* Keeps sock->lastdata for peeking.
*/
static err_t
lwip_recvfrom_udp_raw(struct lwip_sock *sock, int flags, struct msghdr *msg, u16_t *datagram_len, int dbg_s)
{
8018ddc: b590 push {r4, r7, lr}
8018dde: b08d sub sp, #52 @ 0x34
8018de0: af02 add r7, sp, #8
8018de2: 60f8 str r0, [r7, #12]
8018de4: 60b9 str r1, [r7, #8]
8018de6: 607a str r2, [r7, #4]
8018de8: 603b str r3, [r7, #0]
err_t err;
u16_t buflen, copylen, copied;
int i;
LWIP_UNUSED_ARG(dbg_s);
LWIP_ERROR("lwip_recvfrom_udp_raw: invalid arguments", (msg->msg_iov != NULL) || (msg->msg_iovlen <= 0), return ERR_ARG;);
8018dea: 687b ldr r3, [r7, #4]
8018dec: 689b ldr r3, [r3, #8]
8018dee: 2b00 cmp r3, #0
8018df0: d10d bne.n 8018e0e <lwip_recvfrom_udp_raw+0x32>
8018df2: 687b ldr r3, [r7, #4]
8018df4: 68db ldr r3, [r3, #12]
8018df6: 2b00 cmp r3, #0
8018df8: dd09 ble.n 8018e0e <lwip_recvfrom_udp_raw+0x32>
8018dfa: 4b5e ldr r3, [pc, #376] @ (8018f74 <lwip_recvfrom_udp_raw+0x198>)
8018dfc: f240 4249 movw r2, #1097 @ 0x449
8018e00: 495d ldr r1, [pc, #372] @ (8018f78 <lwip_recvfrom_udp_raw+0x19c>)
8018e02: 485e ldr r0, [pc, #376] @ (8018f7c <lwip_recvfrom_udp_raw+0x1a0>)
8018e04: f011 fe12 bl 802aa2c <iprintf>
8018e08: f06f 030f mvn.w r3, #15
8018e0c: e0ae b.n 8018f6c <lwip_recvfrom_udp_raw+0x190>
if (flags & MSG_DONTWAIT) {
8018e0e: 68bb ldr r3, [r7, #8]
8018e10: f003 0308 and.w r3, r3, #8
8018e14: 2b00 cmp r3, #0
8018e16: d003 beq.n 8018e20 <lwip_recvfrom_udp_raw+0x44>
apiflags = NETCONN_DONTBLOCK;
8018e18: 2304 movs r3, #4
8018e1a: f887 3026 strb.w r3, [r7, #38] @ 0x26
8018e1e: e002 b.n 8018e26 <lwip_recvfrom_udp_raw+0x4a>
} else {
apiflags = 0;
8018e20: 2300 movs r3, #0
8018e22: f887 3026 strb.w r3, [r7, #38] @ 0x26
}
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: top sock->lastdata=%p\n", (void *)sock->lastdata.netbuf));
/* Check if there is data left from the last recv operation. */
buf = sock->lastdata.netbuf;
8018e26: 68fb ldr r3, [r7, #12]
8018e28: 685b ldr r3, [r3, #4]
8018e2a: 613b str r3, [r7, #16]
if (buf == NULL) {
8018e2c: 693b ldr r3, [r7, #16]
8018e2e: 2b00 cmp r3, #0
8018e30: d11f bne.n 8018e72 <lwip_recvfrom_udp_raw+0x96>
/* No data was left from the previous operation, so we try to get
some from the network. */
err = netconn_recv_udp_raw_netbuf_flags(sock->conn, &buf, apiflags);
8018e32: 68fb ldr r3, [r7, #12]
8018e34: 681b ldr r3, [r3, #0]
8018e36: f897 2026 ldrb.w r2, [r7, #38] @ 0x26
8018e3a: f107 0110 add.w r1, r7, #16
8018e3e: 4618 mov r0, r3
8018e40: f7fd fd34 bl 80168ac <netconn_recv_udp_raw_netbuf_flags>
8018e44: 4603 mov r3, r0
8018e46: f887 3027 strb.w r3, [r7, #39] @ 0x27
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: netconn_recv err=%d, netbuf=%p\n",
err, (void *)buf));
if (err != ERR_OK) {
8018e4a: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
8018e4e: 2b00 cmp r3, #0
8018e50: d002 beq.n 8018e58 <lwip_recvfrom_udp_raw+0x7c>
return err;
8018e52: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
8018e56: e089 b.n 8018f6c <lwip_recvfrom_udp_raw+0x190>
}
LWIP_ASSERT("buf != NULL", buf != NULL);
8018e58: 693b ldr r3, [r7, #16]
8018e5a: 2b00 cmp r3, #0
8018e5c: d106 bne.n 8018e6c <lwip_recvfrom_udp_raw+0x90>
8018e5e: 4b45 ldr r3, [pc, #276] @ (8018f74 <lwip_recvfrom_udp_raw+0x198>)
8018e60: f240 425e movw r2, #1118 @ 0x45e
8018e64: 4946 ldr r1, [pc, #280] @ (8018f80 <lwip_recvfrom_udp_raw+0x1a4>)
8018e66: 4845 ldr r0, [pc, #276] @ (8018f7c <lwip_recvfrom_udp_raw+0x1a0>)
8018e68: f011 fde0 bl 802aa2c <iprintf>
sock->lastdata.netbuf = buf;
8018e6c: 693a ldr r2, [r7, #16]
8018e6e: 68fb ldr r3, [r7, #12]
8018e70: 605a str r2, [r3, #4]
}
buflen = buf->p->tot_len;
8018e72: 693b ldr r3, [r7, #16]
8018e74: 681b ldr r3, [r3, #0]
8018e76: 891b ldrh r3, [r3, #8]
8018e78: 837b strh r3, [r7, #26]
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw: buflen=%"U16_F"\n", buflen));
copied = 0;
8018e7a: 2300 movs r3, #0
8018e7c: 847b strh r3, [r7, #34] @ 0x22
/* copy the pbuf payload into the iovs */
for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
8018e7e: 2300 movs r3, #0
8018e80: 61fb str r3, [r7, #28]
8018e82: e029 b.n 8018ed8 <lwip_recvfrom_udp_raw+0xfc>
u16_t len_left = (u16_t)(buflen - copied);
8018e84: 8b7a ldrh r2, [r7, #26]
8018e86: 8c7b ldrh r3, [r7, #34] @ 0x22
8018e88: 1ad3 subs r3, r2, r3
8018e8a: 833b strh r3, [r7, #24]
if (msg->msg_iov[i].iov_len > len_left) {
8018e8c: 687b ldr r3, [r7, #4]
8018e8e: 689a ldr r2, [r3, #8]
8018e90: 69fb ldr r3, [r7, #28]
8018e92: 00db lsls r3, r3, #3
8018e94: 4413 add r3, r2
8018e96: 685a ldr r2, [r3, #4]
8018e98: 8b3b ldrh r3, [r7, #24]
8018e9a: 429a cmp r2, r3
8018e9c: d902 bls.n 8018ea4 <lwip_recvfrom_udp_raw+0xc8>
copylen = len_left;
8018e9e: 8b3b ldrh r3, [r7, #24]
8018ea0: 84bb strh r3, [r7, #36] @ 0x24
8018ea2: e006 b.n 8018eb2 <lwip_recvfrom_udp_raw+0xd6>
} else {
copylen = (u16_t)msg->msg_iov[i].iov_len;
8018ea4: 687b ldr r3, [r7, #4]
8018ea6: 689a ldr r2, [r3, #8]
8018ea8: 69fb ldr r3, [r7, #28]
8018eaa: 00db lsls r3, r3, #3
8018eac: 4413 add r3, r2
8018eae: 685b ldr r3, [r3, #4]
8018eb0: 84bb strh r3, [r7, #36] @ 0x24
}
/* copy the contents of the received buffer into
the supplied memory buffer */
pbuf_copy_partial(buf->p, (u8_t *)msg->msg_iov[i].iov_base, copylen, copied);
8018eb2: 693b ldr r3, [r7, #16]
8018eb4: 6818 ldr r0, [r3, #0]
8018eb6: 687b ldr r3, [r7, #4]
8018eb8: 689a ldr r2, [r3, #8]
8018eba: 69fb ldr r3, [r7, #28]
8018ebc: 00db lsls r3, r3, #3
8018ebe: 4413 add r3, r2
8018ec0: 6819 ldr r1, [r3, #0]
8018ec2: 8c7b ldrh r3, [r7, #34] @ 0x22
8018ec4: 8cba ldrh r2, [r7, #36] @ 0x24
8018ec6: f002 fd3f bl 801b948 <pbuf_copy_partial>
copied = (u16_t)(copied + copylen);
8018eca: 8c7a ldrh r2, [r7, #34] @ 0x22
8018ecc: 8cbb ldrh r3, [r7, #36] @ 0x24
8018ece: 4413 add r3, r2
8018ed0: 847b strh r3, [r7, #34] @ 0x22
for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
8018ed2: 69fb ldr r3, [r7, #28]
8018ed4: 3301 adds r3, #1
8018ed6: 61fb str r3, [r7, #28]
8018ed8: 687b ldr r3, [r7, #4]
8018eda: 68db ldr r3, [r3, #12]
8018edc: 69fa ldr r2, [r7, #28]
8018ede: 429a cmp r2, r3
8018ee0: da03 bge.n 8018eea <lwip_recvfrom_udp_raw+0x10e>
8018ee2: 8c7a ldrh r2, [r7, #34] @ 0x22
8018ee4: 8b7b ldrh r3, [r7, #26]
8018ee6: 429a cmp r2, r3
8018ee8: d3cc bcc.n 8018e84 <lwip_recvfrom_udp_raw+0xa8>
}
/* Check to see from where the data was.*/
#if !SOCKETS_DEBUG
if (msg->msg_name && msg->msg_namelen)
8018eea: 687b ldr r3, [r7, #4]
8018eec: 681b ldr r3, [r3, #0]
8018eee: 2b00 cmp r3, #0
8018ef0: d01a beq.n 8018f28 <lwip_recvfrom_udp_raw+0x14c>
8018ef2: 687b ldr r3, [r7, #4]
8018ef4: 685b ldr r3, [r3, #4]
8018ef6: 2b00 cmp r3, #0
8018ef8: d016 beq.n 8018f28 <lwip_recvfrom_udp_raw+0x14c>
#endif /* !SOCKETS_DEBUG */
{
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw(%d): addr=", dbg_s));
ip_addr_debug_print_val(SOCKETS_DEBUG, *netbuf_fromaddr(buf));
LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", netbuf_fromport(buf), copied));
if (msg->msg_name && msg->msg_namelen) {
8018efa: 687b ldr r3, [r7, #4]
8018efc: 681b ldr r3, [r3, #0]
8018efe: 2b00 cmp r3, #0
8018f00: d012 beq.n 8018f28 <lwip_recvfrom_udp_raw+0x14c>
8018f02: 687b ldr r3, [r7, #4]
8018f04: 685b ldr r3, [r3, #4]
8018f06: 2b00 cmp r3, #0
8018f08: d00e beq.n 8018f28 <lwip_recvfrom_udp_raw+0x14c>
lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
8018f0a: 68fb ldr r3, [r7, #12]
8018f0c: 6818 ldr r0, [r3, #0]
8018f0e: 693b ldr r3, [r7, #16]
8018f10: f103 0108 add.w r1, r3, #8
8018f14: 693b ldr r3, [r7, #16]
8018f16: 899a ldrh r2, [r3, #12]
(struct sockaddr *)msg->msg_name, &msg->msg_namelen);
8018f18: 687b ldr r3, [r7, #4]
8018f1a: 681c ldr r4, [r3, #0]
lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
8018f1c: 687b ldr r3, [r7, #4]
8018f1e: 3304 adds r3, #4
8018f20: 9300 str r3, [sp, #0]
8018f22: 4623 mov r3, r4
8018f24: f7ff feba bl 8018c9c <lwip_sock_make_addr>
}
}
/* Initialize flag output */
msg->msg_flags = 0;
8018f28: 687b ldr r3, [r7, #4]
8018f2a: 2200 movs r2, #0
8018f2c: 619a str r2, [r3, #24]
if (msg->msg_control) {
8018f2e: 687b ldr r3, [r7, #4]
8018f30: 691b ldr r3, [r3, #16]
8018f32: 2b00 cmp r3, #0
8018f34: d007 beq.n 8018f46 <lwip_recvfrom_udp_raw+0x16a>
u8_t wrote_msg = 0;
8018f36: 2300 movs r3, #0
8018f38: 75fb strb r3, [r7, #23]
#endif /* LWIP_IPV4 */
}
}
#endif /* LWIP_NETBUF_RECVINFO */
if (!wrote_msg) {
8018f3a: 7dfb ldrb r3, [r7, #23]
8018f3c: 2b00 cmp r3, #0
8018f3e: d102 bne.n 8018f46 <lwip_recvfrom_udp_raw+0x16a>
msg->msg_controllen = 0;
8018f40: 687b ldr r3, [r7, #4]
8018f42: 2200 movs r2, #0
8018f44: 615a str r2, [r3, #20]
}
}
/* If we don't peek the incoming message: zero lastdata pointer and free the netbuf */
if ((flags & MSG_PEEK) == 0) {
8018f46: 68bb ldr r3, [r7, #8]
8018f48: f003 0301 and.w r3, r3, #1
8018f4c: 2b00 cmp r3, #0
8018f4e: d106 bne.n 8018f5e <lwip_recvfrom_udp_raw+0x182>
sock->lastdata.netbuf = NULL;
8018f50: 68fb ldr r3, [r7, #12]
8018f52: 2200 movs r2, #0
8018f54: 605a str r2, [r3, #4]
netbuf_delete(buf);
8018f56: 693b ldr r3, [r7, #16]
8018f58: 4618 mov r0, r3
8018f5a: f7ff fb05 bl 8018568 <netbuf_delete>
}
if (datagram_len) {
8018f5e: 683b ldr r3, [r7, #0]
8018f60: 2b00 cmp r3, #0
8018f62: d002 beq.n 8018f6a <lwip_recvfrom_udp_raw+0x18e>
*datagram_len = buflen;
8018f64: 683b ldr r3, [r7, #0]
8018f66: 8b7a ldrh r2, [r7, #26]
8018f68: 801a strh r2, [r3, #0]
}
return ERR_OK;
8018f6a: 2300 movs r3, #0
}
8018f6c: 4618 mov r0, r3
8018f6e: 372c adds r7, #44 @ 0x2c
8018f70: 46bd mov sp, r7
8018f72: bd90 pop {r4, r7, pc}
8018f74: 0802e814 .word 0x0802e814
8018f78: 0802e9b8 .word 0x0802e9b8
8018f7c: 0802e868 .word 0x0802e868
8018f80: 0802e9e4 .word 0x0802e9e4
08018f84 <lwip_recvfrom>:
ssize_t
lwip_recvfrom(int s, void *mem, size_t len, int flags,
struct sockaddr *from, socklen_t *fromlen)
{
8018f84: b580 push {r7, lr}
8018f86: b096 sub sp, #88 @ 0x58
8018f88: af02 add r7, sp, #8
8018f8a: 60f8 str r0, [r7, #12]
8018f8c: 60b9 str r1, [r7, #8]
8018f8e: 607a str r2, [r7, #4]
8018f90: 603b str r3, [r7, #0]
struct lwip_sock *sock;
ssize_t ret;
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %"SZT_F", 0x%x, ..)\n", s, mem, len, flags));
sock = get_socket(s);
8018f92: 68f8 ldr r0, [r7, #12]
8018f94: f7ff fbb8 bl 8018708 <get_socket>
8018f98: 64f8 str r0, [r7, #76] @ 0x4c
if (!sock) {
8018f9a: 6cfb ldr r3, [r7, #76] @ 0x4c
8018f9c: 2b00 cmp r3, #0
8018f9e: d102 bne.n 8018fa6 <lwip_recvfrom+0x22>
return -1;
8018fa0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8018fa4: e078 b.n 8019098 <lwip_recvfrom+0x114>
}
#if LWIP_TCP
if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
8018fa6: 6cfb ldr r3, [r7, #76] @ 0x4c
8018fa8: 681b ldr r3, [r3, #0]
8018faa: 781b ldrb r3, [r3, #0]
8018fac: f003 03f0 and.w r3, r3, #240 @ 0xf0
8018fb0: 2b10 cmp r3, #16
8018fb2: d112 bne.n 8018fda <lwip_recvfrom+0x56>
ret = lwip_recv_tcp(sock, mem, len, flags);
8018fb4: 683b ldr r3, [r7, #0]
8018fb6: 687a ldr r2, [r7, #4]
8018fb8: 68b9 ldr r1, [r7, #8]
8018fba: 6cf8 ldr r0, [r7, #76] @ 0x4c
8018fbc: f7ff fd5e bl 8018a7c <lwip_recv_tcp>
8018fc0: 6478 str r0, [r7, #68] @ 0x44
lwip_recv_tcp_from(sock, from, fromlen, "lwip_recvfrom", s, ret);
8018fc2: 6c7b ldr r3, [r7, #68] @ 0x44
8018fc4: 9301 str r3, [sp, #4]
8018fc6: 68fb ldr r3, [r7, #12]
8018fc8: 9300 str r3, [sp, #0]
8018fca: 4b35 ldr r3, [pc, #212] @ (80190a0 <lwip_recvfrom+0x11c>)
8018fcc: 6dfa ldr r2, [r7, #92] @ 0x5c
8018fce: 6db9 ldr r1, [r7, #88] @ 0x58
8018fd0: 6cf8 ldr r0, [r7, #76] @ 0x4c
8018fd2: f7ff fed1 bl 8018d78 <lwip_recv_tcp_from>
done_socket(sock);
return ret;
8018fd6: 6c7b ldr r3, [r7, #68] @ 0x44
8018fd8: e05e b.n 8019098 <lwip_recvfrom+0x114>
} else
#endif
{
u16_t datagram_len = 0;
8018fda: 2300 movs r3, #0
8018fdc: 877b strh r3, [r7, #58] @ 0x3a
struct iovec vec;
struct msghdr msg;
err_t err;
vec.iov_base = mem;
8018fde: 68bb ldr r3, [r7, #8]
8018fe0: 633b str r3, [r7, #48] @ 0x30
vec.iov_len = len;
8018fe2: 687b ldr r3, [r7, #4]
8018fe4: 637b str r3, [r7, #52] @ 0x34
msg.msg_control = NULL;
8018fe6: 2300 movs r3, #0
8018fe8: 627b str r3, [r7, #36] @ 0x24
msg.msg_controllen = 0;
8018fea: 2300 movs r3, #0
8018fec: 62bb str r3, [r7, #40] @ 0x28
msg.msg_flags = 0;
8018fee: 2300 movs r3, #0
8018ff0: 62fb str r3, [r7, #44] @ 0x2c
msg.msg_iov = &vec;
8018ff2: f107 0330 add.w r3, r7, #48 @ 0x30
8018ff6: 61fb str r3, [r7, #28]
msg.msg_iovlen = 1;
8018ff8: 2301 movs r3, #1
8018ffa: 623b str r3, [r7, #32]
msg.msg_name = from;
8018ffc: 6dbb ldr r3, [r7, #88] @ 0x58
8018ffe: 617b str r3, [r7, #20]
msg.msg_namelen = (fromlen ? *fromlen : 0);
8019000: 6dfb ldr r3, [r7, #92] @ 0x5c
8019002: 2b00 cmp r3, #0
8019004: d002 beq.n 801900c <lwip_recvfrom+0x88>
8019006: 6dfb ldr r3, [r7, #92] @ 0x5c
8019008: 681b ldr r3, [r3, #0]
801900a: e000 b.n 801900e <lwip_recvfrom+0x8a>
801900c: 2300 movs r3, #0
801900e: 61bb str r3, [r7, #24]
err = lwip_recvfrom_udp_raw(sock, flags, &msg, &datagram_len, s);
8019010: f107 013a add.w r1, r7, #58 @ 0x3a
8019014: f107 0214 add.w r2, r7, #20
8019018: 68fb ldr r3, [r7, #12]
801901a: 9300 str r3, [sp, #0]
801901c: 460b mov r3, r1
801901e: 6839 ldr r1, [r7, #0]
8019020: 6cf8 ldr r0, [r7, #76] @ 0x4c
8019022: f7ff fedb bl 8018ddc <lwip_recvfrom_udp_raw>
8019026: 4603 mov r3, r0
8019028: f887 304b strb.w r3, [r7, #75] @ 0x4b
if (err != ERR_OK) {
801902c: f997 304b ldrsb.w r3, [r7, #75] @ 0x4b
8019030: 2b00 cmp r3, #0
8019032: d00e beq.n 8019052 <lwip_recvfrom+0xce>
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom[UDP/RAW](%d): buf == NULL, error is \"%s\"!\n",
s, lwip_strerr(err)));
sock_set_errno(sock, err_to_errno(err));
8019034: f997 304b ldrsb.w r3, [r7, #75] @ 0x4b
8019038: 4618 mov r0, r3
801903a: f7ff fa77 bl 801852c <err_to_errno>
801903e: 63f8 str r0, [r7, #60] @ 0x3c
8019040: 6bfb ldr r3, [r7, #60] @ 0x3c
8019042: 2b00 cmp r3, #0
8019044: d002 beq.n 801904c <lwip_recvfrom+0xc8>
8019046: 4a17 ldr r2, [pc, #92] @ (80190a4 <lwip_recvfrom+0x120>)
8019048: 6bfb ldr r3, [r7, #60] @ 0x3c
801904a: 6013 str r3, [r2, #0]
done_socket(sock);
return -1;
801904c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8019050: e022 b.n 8019098 <lwip_recvfrom+0x114>
}
ret = (ssize_t)LWIP_MIN(LWIP_MIN(len, datagram_len), SSIZE_MAX);
8019052: 8f7b ldrh r3, [r7, #58] @ 0x3a
8019054: 461a mov r2, r3
8019056: 687b ldr r3, [r7, #4]
8019058: 4293 cmp r3, r2
801905a: bf28 it cs
801905c: 4613 movcs r3, r2
801905e: f06f 4200 mvn.w r2, #2147483648 @ 0x80000000
8019062: 4293 cmp r3, r2
8019064: d206 bcs.n 8019074 <lwip_recvfrom+0xf0>
8019066: 8f7b ldrh r3, [r7, #58] @ 0x3a
8019068: 461a mov r2, r3
801906a: 687b ldr r3, [r7, #4]
801906c: 4293 cmp r3, r2
801906e: bf28 it cs
8019070: 4613 movcs r3, r2
8019072: e001 b.n 8019078 <lwip_recvfrom+0xf4>
8019074: f06f 4300 mvn.w r3, #2147483648 @ 0x80000000
8019078: 647b str r3, [r7, #68] @ 0x44
if (fromlen) {
801907a: 6dfb ldr r3, [r7, #92] @ 0x5c
801907c: 2b00 cmp r3, #0
801907e: d002 beq.n 8019086 <lwip_recvfrom+0x102>
*fromlen = msg.msg_namelen;
8019080: 69ba ldr r2, [r7, #24]
8019082: 6dfb ldr r3, [r7, #92] @ 0x5c
8019084: 601a str r2, [r3, #0]
}
}
sock_set_errno(sock, 0);
8019086: 2300 movs r3, #0
8019088: 643b str r3, [r7, #64] @ 0x40
801908a: 6c3b ldr r3, [r7, #64] @ 0x40
801908c: 2b00 cmp r3, #0
801908e: d002 beq.n 8019096 <lwip_recvfrom+0x112>
8019090: 4a04 ldr r2, [pc, #16] @ (80190a4 <lwip_recvfrom+0x120>)
8019092: 6c3b ldr r3, [r7, #64] @ 0x40
8019094: 6013 str r3, [r2, #0]
done_socket(sock);
return ret;
8019096: 6c7b ldr r3, [r7, #68] @ 0x44
}
8019098: 4618 mov r0, r3
801909a: 3750 adds r7, #80 @ 0x50
801909c: 46bd mov sp, r7
801909e: bd80 pop {r7, pc}
80190a0: 0802e9f0 .word 0x0802e9f0
80190a4: 2402b2a0 .word 0x2402b2a0
080190a8 <lwip_recv>:
return lwip_recvmsg(s, &msg, 0);
}
ssize_t
lwip_recv(int s, void *mem, size_t len, int flags)
{
80190a8: b580 push {r7, lr}
80190aa: b086 sub sp, #24
80190ac: af02 add r7, sp, #8
80190ae: 60f8 str r0, [r7, #12]
80190b0: 60b9 str r1, [r7, #8]
80190b2: 607a str r2, [r7, #4]
80190b4: 603b str r3, [r7, #0]
return lwip_recvfrom(s, mem, len, flags, NULL, NULL);
80190b6: 2300 movs r3, #0
80190b8: 9301 str r3, [sp, #4]
80190ba: 2300 movs r3, #0
80190bc: 9300 str r3, [sp, #0]
80190be: 683b ldr r3, [r7, #0]
80190c0: 687a ldr r2, [r7, #4]
80190c2: 68b9 ldr r1, [r7, #8]
80190c4: 68f8 ldr r0, [r7, #12]
80190c6: f7ff ff5d bl 8018f84 <lwip_recvfrom>
80190ca: 4603 mov r3, r0
}
80190cc: 4618 mov r0, r3
80190ce: 3710 adds r7, #16
80190d0: 46bd mov sp, r7
80190d2: bd80 pop {r7, pc}
080190d4 <lwip_send>:
#endif /* LWIP_UDP || LWIP_RAW */
}
ssize_t
lwip_send(int s, const void *data, size_t size, int flags)
{
80190d4: b580 push {r7, lr}
80190d6: b08a sub sp, #40 @ 0x28
80190d8: af02 add r7, sp, #8
80190da: 60f8 str r0, [r7, #12]
80190dc: 60b9 str r1, [r7, #8]
80190de: 607a str r2, [r7, #4]
80190e0: 603b str r3, [r7, #0]
size_t written;
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%"SZT_F", flags=0x%x)\n",
s, data, size, flags));
sock = get_socket(s);
80190e2: 68f8 ldr r0, [r7, #12]
80190e4: f7ff fb10 bl 8018708 <get_socket>
80190e8: 61f8 str r0, [r7, #28]
if (!sock) {
80190ea: 69fb ldr r3, [r7, #28]
80190ec: 2b00 cmp r3, #0
80190ee: d102 bne.n 80190f6 <lwip_send+0x22>
return -1;
80190f0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80190f4: e046 b.n 8019184 <lwip_send+0xb0>
}
if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) != NETCONN_TCP) {
80190f6: 69fb ldr r3, [r7, #28]
80190f8: 681b ldr r3, [r3, #0]
80190fa: 781b ldrb r3, [r3, #0]
80190fc: f003 03f0 and.w r3, r3, #240 @ 0xf0
8019100: 2b10 cmp r3, #16
8019102: d00b beq.n 801911c <lwip_send+0x48>
#if (LWIP_UDP || LWIP_RAW)
done_socket(sock);
return lwip_sendto(s, data, size, flags, NULL, 0);
8019104: 2300 movs r3, #0
8019106: 9301 str r3, [sp, #4]
8019108: 2300 movs r3, #0
801910a: 9300 str r3, [sp, #0]
801910c: 683b ldr r3, [r7, #0]
801910e: 687a ldr r2, [r7, #4]
8019110: 68b9 ldr r1, [r7, #8]
8019112: 68f8 ldr r0, [r7, #12]
8019114: f000 f83c bl 8019190 <lwip_sendto>
8019118: 4603 mov r3, r0
801911a: e033 b.n 8019184 <lwip_send+0xb0>
return -1;
#endif /* (LWIP_UDP || LWIP_RAW) */
}
write_flags = (u8_t)(NETCONN_COPY |
((flags & MSG_MORE) ? NETCONN_MORE : 0) |
801911c: 683b ldr r3, [r7, #0]
801911e: f003 0310 and.w r3, r3, #16
write_flags = (u8_t)(NETCONN_COPY |
8019122: 2b00 cmp r3, #0
8019124: d001 beq.n 801912a <lwip_send+0x56>
8019126: 2203 movs r2, #3
8019128: e000 b.n 801912c <lwip_send+0x58>
801912a: 2201 movs r2, #1
((flags & MSG_MORE) ? NETCONN_MORE : 0) |
801912c: 683b ldr r3, [r7, #0]
801912e: 105b asrs r3, r3, #1
8019130: b25b sxtb r3, r3
8019132: f003 0304 and.w r3, r3, #4
8019136: b25b sxtb r3, r3
8019138: 4313 orrs r3, r2
801913a: b25b sxtb r3, r3
write_flags = (u8_t)(NETCONN_COPY |
801913c: 76fb strb r3, [r7, #27]
((flags & MSG_DONTWAIT) ? NETCONN_DONTBLOCK : 0));
written = 0;
801913e: 2300 movs r3, #0
8019140: 613b str r3, [r7, #16]
err = netconn_write_partly(sock->conn, data, size, write_flags, &written);
8019142: 69fb ldr r3, [r7, #28]
8019144: 6818 ldr r0, [r3, #0]
8019146: 7efa ldrb r2, [r7, #27]
8019148: f107 0310 add.w r3, r7, #16
801914c: 9300 str r3, [sp, #0]
801914e: 4613 mov r3, r2
8019150: 687a ldr r2, [r7, #4]
8019152: 68b9 ldr r1, [r7, #8]
8019154: f7fd fc04 bl 8016960 <netconn_write_partly>
8019158: 4603 mov r3, r0
801915a: 76bb strb r3, [r7, #26]
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d written=%"SZT_F"\n", s, err, written));
sock_set_errno(sock, err_to_errno(err));
801915c: f997 301a ldrsb.w r3, [r7, #26]
8019160: 4618 mov r0, r3
8019162: f7ff f9e3 bl 801852c <err_to_errno>
8019166: 6178 str r0, [r7, #20]
8019168: 697b ldr r3, [r7, #20]
801916a: 2b00 cmp r3, #0
801916c: d002 beq.n 8019174 <lwip_send+0xa0>
801916e: 4a07 ldr r2, [pc, #28] @ (801918c <lwip_send+0xb8>)
8019170: 697b ldr r3, [r7, #20]
8019172: 6013 str r3, [r2, #0]
done_socket(sock);
/* casting 'written' to ssize_t is OK here since the netconn API limits it to SSIZE_MAX */
return (err == ERR_OK ? (ssize_t)written : -1);
8019174: f997 301a ldrsb.w r3, [r7, #26]
8019178: 2b00 cmp r3, #0
801917a: d101 bne.n 8019180 <lwip_send+0xac>
801917c: 693b ldr r3, [r7, #16]
801917e: e001 b.n 8019184 <lwip_send+0xb0>
8019180: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
8019184: 4618 mov r0, r3
8019186: 3720 adds r7, #32
8019188: 46bd mov sp, r7
801918a: bd80 pop {r7, pc}
801918c: 2402b2a0 .word 0x2402b2a0
08019190 <lwip_sendto>:
}
ssize_t
lwip_sendto(int s, const void *data, size_t size, int flags,
const struct sockaddr *to, socklen_t tolen)
{
8019190: b580 push {r7, lr}
8019192: b08e sub sp, #56 @ 0x38
8019194: af00 add r7, sp, #0
8019196: 60f8 str r0, [r7, #12]
8019198: 60b9 str r1, [r7, #8]
801919a: 607a str r2, [r7, #4]
801919c: 603b str r3, [r7, #0]
err_t err;
u16_t short_size;
u16_t remote_port;
struct netbuf buf;
sock = get_socket(s);
801919e: 68f8 ldr r0, [r7, #12]
80191a0: f7ff fab2 bl 8018708 <get_socket>
80191a4: 6338 str r0, [r7, #48] @ 0x30
if (!sock) {
80191a6: 6b3b ldr r3, [r7, #48] @ 0x30
80191a8: 2b00 cmp r3, #0
80191aa: d102 bne.n 80191b2 <lwip_sendto+0x22>
return -1;
80191ac: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80191b0: e093 b.n 80192da <lwip_sendto+0x14a>
}
if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
80191b2: 6b3b ldr r3, [r7, #48] @ 0x30
80191b4: 681b ldr r3, [r3, #0]
80191b6: 781b ldrb r3, [r3, #0]
80191b8: f003 03f0 and.w r3, r3, #240 @ 0xf0
80191bc: 2b10 cmp r3, #16
80191be: d107 bne.n 80191d0 <lwip_sendto+0x40>
#if LWIP_TCP
done_socket(sock);
return lwip_send(s, data, size, flags);
80191c0: 683b ldr r3, [r7, #0]
80191c2: 687a ldr r2, [r7, #4]
80191c4: 68b9 ldr r1, [r7, #8]
80191c6: 68f8 ldr r0, [r7, #12]
80191c8: f7ff ff84 bl 80190d4 <lwip_send>
80191cc: 4603 mov r3, r0
80191ce: e084 b.n 80192da <lwip_sendto+0x14a>
done_socket(sock);
return -1;
#endif /* LWIP_TCP */
}
if (size > LWIP_MIN(0xFFFF, SSIZE_MAX)) {
80191d0: 687b ldr r3, [r7, #4]
80191d2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80191d6: d30a bcc.n 80191ee <lwip_sendto+0x5e>
/* cannot fit into one datagram (at least for us) */
sock_set_errno(sock, EMSGSIZE);
80191d8: 235a movs r3, #90 @ 0x5a
80191da: 623b str r3, [r7, #32]
80191dc: 6a3b ldr r3, [r7, #32]
80191de: 2b00 cmp r3, #0
80191e0: d002 beq.n 80191e8 <lwip_sendto+0x58>
80191e2: 4a40 ldr r2, [pc, #256] @ (80192e4 <lwip_sendto+0x154>)
80191e4: 6a3b ldr r3, [r7, #32]
80191e6: 6013 str r3, [r2, #0]
done_socket(sock);
return -1;
80191e8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80191ec: e075 b.n 80192da <lwip_sendto+0x14a>
}
short_size = (u16_t)size;
80191ee: 687b ldr r3, [r7, #4]
80191f0: 85fb strh r3, [r7, #46] @ 0x2e
LWIP_ERROR("lwip_sendto: invalid address", (((to == NULL) && (tolen == 0)) ||
80191f2: 6c3b ldr r3, [r7, #64] @ 0x40
80191f4: 2b00 cmp r3, #0
80191f6: d102 bne.n 80191fe <lwip_sendto+0x6e>
80191f8: 6c7b ldr r3, [r7, #68] @ 0x44
80191fa: 2b00 cmp r3, #0
80191fc: d023 beq.n 8019246 <lwip_sendto+0xb6>
80191fe: 6c7b ldr r3, [r7, #68] @ 0x44
8019200: 2b10 cmp r3, #16
8019202: d10b bne.n 801921c <lwip_sendto+0x8c>
8019204: 6c3b ldr r3, [r7, #64] @ 0x40
8019206: 2b00 cmp r3, #0
8019208: d008 beq.n 801921c <lwip_sendto+0x8c>
801920a: 6c3b ldr r3, [r7, #64] @ 0x40
801920c: 785b ldrb r3, [r3, #1]
801920e: 2b02 cmp r3, #2
8019210: d104 bne.n 801921c <lwip_sendto+0x8c>
8019212: 6c3b ldr r3, [r7, #64] @ 0x40
8019214: f003 0303 and.w r3, r3, #3
8019218: 2b00 cmp r3, #0
801921a: d014 beq.n 8019246 <lwip_sendto+0xb6>
801921c: 4b32 ldr r3, [pc, #200] @ (80192e8 <lwip_sendto+0x158>)
801921e: f240 6252 movw r2, #1618 @ 0x652
8019222: 4932 ldr r1, [pc, #200] @ (80192ec <lwip_sendto+0x15c>)
8019224: 4832 ldr r0, [pc, #200] @ (80192f0 <lwip_sendto+0x160>)
8019226: f011 fc01 bl 802aa2c <iprintf>
801922a: f06f 000f mvn.w r0, #15
801922e: f7ff f97d bl 801852c <err_to_errno>
8019232: 62b8 str r0, [r7, #40] @ 0x28
8019234: 6abb ldr r3, [r7, #40] @ 0x28
8019236: 2b00 cmp r3, #0
8019238: d002 beq.n 8019240 <lwip_sendto+0xb0>
801923a: 4a2a ldr r2, [pc, #168] @ (80192e4 <lwip_sendto+0x154>)
801923c: 6abb ldr r3, [r7, #40] @ 0x28
801923e: 6013 str r3, [r2, #0]
8019240: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8019244: e049 b.n 80192da <lwip_sendto+0x14a>
((to != NULL) && (IS_SOCK_ADDR_TYPE_VALID(to) && IS_SOCK_ADDR_ALIGNED(to))))),
sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);
LWIP_UNUSED_ARG(tolen);
/* initialize a buffer */
buf.p = buf.ptr = NULL;
8019246: 2300 movs r3, #0
8019248: 617b str r3, [r7, #20]
801924a: 697b ldr r3, [r7, #20]
801924c: 613b str r3, [r7, #16]
#if LWIP_CHECKSUM_ON_COPY
buf.flags = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
if (to) {
801924e: 6c3b ldr r3, [r7, #64] @ 0x40
8019250: 2b00 cmp r3, #0
8019252: d00a beq.n 801926a <lwip_sendto+0xda>
SOCKADDR_TO_IPADDR_PORT(to, &buf.addr, remote_port);
8019254: 6c3b ldr r3, [r7, #64] @ 0x40
8019256: 685b ldr r3, [r3, #4]
8019258: 61bb str r3, [r7, #24]
801925a: 6c3b ldr r3, [r7, #64] @ 0x40
801925c: 885b ldrh r3, [r3, #2]
801925e: 4618 mov r0, r3
8019260: f000 fc8a bl 8019b78 <lwip_htons>
8019264: 4603 mov r3, r0
8019266: 86fb strh r3, [r7, #54] @ 0x36
8019268: e003 b.n 8019272 <lwip_sendto+0xe2>
} else {
remote_port = 0;
801926a: 2300 movs r3, #0
801926c: 86fb strh r3, [r7, #54] @ 0x36
ip_addr_set_any(NETCONNTYPE_ISIPV6(netconn_type(sock->conn)), &buf.addr);
801926e: 2300 movs r3, #0
8019270: 61bb str r3, [r7, #24]
}
netbuf_fromport(&buf) = remote_port;
8019272: 8efb ldrh r3, [r7, #54] @ 0x36
8019274: 83bb strh r3, [r7, #28]
MEMCPY(buf.p->payload, data, short_size);
}
err = ERR_OK;
}
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
err = netbuf_ref(&buf, data, short_size);
8019276: 8dfa ldrh r2, [r7, #46] @ 0x2e
8019278: f107 0310 add.w r3, r7, #16
801927c: 68b9 ldr r1, [r7, #8]
801927e: 4618 mov r0, r3
8019280: f7ff f9ba bl 80185f8 <netbuf_ref>
8019284: 4603 mov r3, r0
8019286: f887 302d strb.w r3, [r7, #45] @ 0x2d
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
if (err == ERR_OK) {
801928a: f997 302d ldrsb.w r3, [r7, #45] @ 0x2d
801928e: 2b00 cmp r3, #0
8019290: d10a bne.n 80192a8 <lwip_sendto+0x118>
IP_SET_TYPE_VAL(buf.addr, IPADDR_TYPE_V4);
}
#endif /* LWIP_IPV4 && LWIP_IPV6 */
/* send the data */
err = netconn_send(sock->conn, &buf);
8019292: 6b3b ldr r3, [r7, #48] @ 0x30
8019294: 681b ldr r3, [r3, #0]
8019296: f107 0210 add.w r2, r7, #16
801929a: 4611 mov r1, r2
801929c: 4618 mov r0, r3
801929e: f7fd fb31 bl 8016904 <netconn_send>
80192a2: 4603 mov r3, r0
80192a4: f887 302d strb.w r3, [r7, #45] @ 0x2d
}
/* deallocated the buffer */
netbuf_free(&buf);
80192a8: f107 0310 add.w r3, r7, #16
80192ac: 4618 mov r0, r3
80192ae: f7ff f97b bl 80185a8 <netbuf_free>
sock_set_errno(sock, err_to_errno(err));
80192b2: f997 302d ldrsb.w r3, [r7, #45] @ 0x2d
80192b6: 4618 mov r0, r3
80192b8: f7ff f938 bl 801852c <err_to_errno>
80192bc: 6278 str r0, [r7, #36] @ 0x24
80192be: 6a7b ldr r3, [r7, #36] @ 0x24
80192c0: 2b00 cmp r3, #0
80192c2: d002 beq.n 80192ca <lwip_sendto+0x13a>
80192c4: 4a07 ldr r2, [pc, #28] @ (80192e4 <lwip_sendto+0x154>)
80192c6: 6a7b ldr r3, [r7, #36] @ 0x24
80192c8: 6013 str r3, [r2, #0]
done_socket(sock);
return (err == ERR_OK ? short_size : -1);
80192ca: f997 302d ldrsb.w r3, [r7, #45] @ 0x2d
80192ce: 2b00 cmp r3, #0
80192d0: d101 bne.n 80192d6 <lwip_sendto+0x146>
80192d2: 8dfb ldrh r3, [r7, #46] @ 0x2e
80192d4: e001 b.n 80192da <lwip_sendto+0x14a>
80192d6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
80192da: 4618 mov r0, r3
80192dc: 3738 adds r7, #56 @ 0x38
80192de: 46bd mov sp, r7
80192e0: bd80 pop {r7, pc}
80192e2: bf00 nop
80192e4: 2402b2a0 .word 0x2402b2a0
80192e8: 0802e814 .word 0x0802e814
80192ec: 0802eaf4 .word 0x0802eaf4
80192f0: 0802e868 .word 0x0802e868
080192f4 <lwip_socket>:
int
lwip_socket(int domain, int type, int protocol)
{
80192f4: b580 push {r7, lr}
80192f6: b086 sub sp, #24
80192f8: af00 add r7, sp, #0
80192fa: 60f8 str r0, [r7, #12]
80192fc: 60b9 str r1, [r7, #8]
80192fe: 607a str r2, [r7, #4]
int i;
LWIP_UNUSED_ARG(domain); /* @todo: check this */
/* create a netconn */
switch (type) {
8019300: 68bb ldr r3, [r7, #8]
8019302: 2b03 cmp r3, #3
8019304: d009 beq.n 801931a <lwip_socket+0x26>
8019306: 68bb ldr r3, [r7, #8]
8019308: 2b03 cmp r3, #3
801930a: dc23 bgt.n 8019354 <lwip_socket+0x60>
801930c: 68bb ldr r3, [r7, #8]
801930e: 2b01 cmp r3, #1
8019310: d019 beq.n 8019346 <lwip_socket+0x52>
8019312: 68bb ldr r3, [r7, #8]
8019314: 2b02 cmp r3, #2
8019316: d009 beq.n 801932c <lwip_socket+0x38>
8019318: e01c b.n 8019354 <lwip_socket+0x60>
case SOCK_RAW:
conn = netconn_new_with_proto_and_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_RAW),
801931a: 687b ldr r3, [r7, #4]
801931c: b2db uxtb r3, r3
801931e: 4a22 ldr r2, [pc, #136] @ (80193a8 <lwip_socket+0xb4>)
8019320: 4619 mov r1, r3
8019322: 2040 movs r0, #64 @ 0x40
8019324: f7fc ff60 bl 80161e8 <netconn_new_with_proto_and_callback>
8019328: 6178 str r0, [r7, #20]
(u8_t)protocol, DEFAULT_SOCKET_EVENTCB);
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ",
domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
break;
801932a: e019 b.n 8019360 <lwip_socket+0x6c>
case SOCK_DGRAM:
conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain,
801932c: 687b ldr r3, [r7, #4]
801932e: 2b88 cmp r3, #136 @ 0x88
8019330: d101 bne.n 8019336 <lwip_socket+0x42>
8019332: 2321 movs r3, #33 @ 0x21
8019334: e000 b.n 8019338 <lwip_socket+0x44>
8019336: 2320 movs r3, #32
8019338: 4a1b ldr r2, [pc, #108] @ (80193a8 <lwip_socket+0xb4>)
801933a: 2100 movs r1, #0
801933c: 4618 mov r0, r3
801933e: f7fc ff53 bl 80161e8 <netconn_new_with_proto_and_callback>
8019342: 6178 str r0, [r7, #20]
if (conn) {
/* netconn layer enables pktinfo by default, sockets default to off */
conn->flags &= ~NETCONN_FLAG_PKTINFO;
}
#endif /* LWIP_NETBUF_RECVINFO */
break;
8019344: e00c b.n 8019360 <lwip_socket+0x6c>
case SOCK_STREAM:
conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_TCP), DEFAULT_SOCKET_EVENTCB);
8019346: 4a18 ldr r2, [pc, #96] @ (80193a8 <lwip_socket+0xb4>)
8019348: 2100 movs r1, #0
801934a: 2010 movs r0, #16
801934c: f7fc ff4c bl 80161e8 <netconn_new_with_proto_and_callback>
8019350: 6178 str r0, [r7, #20]
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ",
domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
break;
8019352: e005 b.n 8019360 <lwip_socket+0x6c>
default:
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n",
domain, type, protocol));
set_errno(EINVAL);
8019354: 4b15 ldr r3, [pc, #84] @ (80193ac <lwip_socket+0xb8>)
8019356: 2216 movs r2, #22
8019358: 601a str r2, [r3, #0]
return -1;
801935a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
801935e: e01e b.n 801939e <lwip_socket+0xaa>
}
if (!conn) {
8019360: 697b ldr r3, [r7, #20]
8019362: 2b00 cmp r3, #0
8019364: d105 bne.n 8019372 <lwip_socket+0x7e>
LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n"));
set_errno(ENOBUFS);
8019366: 4b11 ldr r3, [pc, #68] @ (80193ac <lwip_socket+0xb8>)
8019368: 2269 movs r2, #105 @ 0x69
801936a: 601a str r2, [r3, #0]
return -1;
801936c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8019370: e015 b.n 801939e <lwip_socket+0xaa>
}
i = alloc_socket(conn, 0);
8019372: 2100 movs r1, #0
8019374: 6978 ldr r0, [r7, #20]
8019376: f7ff f9df bl 8018738 <alloc_socket>
801937a: 6138 str r0, [r7, #16]
if (i == -1) {
801937c: 693b ldr r3, [r7, #16]
801937e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8019382: d108 bne.n 8019396 <lwip_socket+0xa2>
netconn_delete(conn);
8019384: 6978 ldr r0, [r7, #20]
8019386: f7fc ffcd bl 8016324 <netconn_delete>
set_errno(ENFILE);
801938a: 4b08 ldr r3, [pc, #32] @ (80193ac <lwip_socket+0xb8>)
801938c: 2217 movs r2, #23
801938e: 601a str r2, [r3, #0]
return -1;
8019390: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8019394: e003 b.n 801939e <lwip_socket+0xaa>
}
conn->socket = i;
8019396: 697b ldr r3, [r7, #20]
8019398: 693a ldr r2, [r7, #16]
801939a: 619a str r2, [r3, #24]
done_socket(&sockets[i - LWIP_SOCKET_OFFSET]);
LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i));
set_errno(0);
return i;
801939c: 693b ldr r3, [r7, #16]
}
801939e: 4618 mov r0, r3
80193a0: 3718 adds r7, #24
80193a2: 46bd mov sp, r7
80193a4: bd80 pop {r7, pc}
80193a6: bf00 nop
80193a8: 08019439 .word 0x08019439
80193ac: 2402b2a0 .word 0x2402b2a0
080193b0 <lwip_poll_should_wake>:
* Check whether event_callback should wake up a thread waiting in
* lwip_poll.
*/
static int
lwip_poll_should_wake(const struct lwip_select_cb *scb, int fd, int has_recvevent, int has_sendevent, int has_errevent)
{
80193b0: b480 push {r7}
80193b2: b087 sub sp, #28
80193b4: af00 add r7, sp, #0
80193b6: 60f8 str r0, [r7, #12]
80193b8: 60b9 str r1, [r7, #8]
80193ba: 607a str r2, [r7, #4]
80193bc: 603b str r3, [r7, #0]
nfds_t fdi;
for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
80193be: 2300 movs r3, #0
80193c0: 617b str r3, [r7, #20]
80193c2: e02c b.n 801941e <lwip_poll_should_wake+0x6e>
const struct pollfd *pollfd = &scb->poll_fds[fdi];
80193c4: 68fb ldr r3, [r7, #12]
80193c6: 695a ldr r2, [r3, #20]
80193c8: 697b ldr r3, [r7, #20]
80193ca: 00db lsls r3, r3, #3
80193cc: 4413 add r3, r2
80193ce: 613b str r3, [r7, #16]
if (pollfd->fd == fd) {
80193d0: 693b ldr r3, [r7, #16]
80193d2: 681b ldr r3, [r3, #0]
80193d4: 68ba ldr r2, [r7, #8]
80193d6: 429a cmp r2, r3
80193d8: d11e bne.n 8019418 <lwip_poll_should_wake+0x68>
/* Do not update pollfd->revents right here;
that would be a data race because lwip_pollscan
accesses revents without protecting. */
if (has_recvevent && (pollfd->events & POLLIN) != 0) {
80193da: 687b ldr r3, [r7, #4]
80193dc: 2b00 cmp r3, #0
80193de: d009 beq.n 80193f4 <lwip_poll_should_wake+0x44>
80193e0: 693b ldr r3, [r7, #16]
80193e2: f9b3 3004 ldrsh.w r3, [r3, #4]
80193e6: b29b uxth r3, r3
80193e8: f003 0301 and.w r3, r3, #1
80193ec: 2b00 cmp r3, #0
80193ee: d001 beq.n 80193f4 <lwip_poll_should_wake+0x44>
return 1;
80193f0: 2301 movs r3, #1
80193f2: e01a b.n 801942a <lwip_poll_should_wake+0x7a>
}
if (has_sendevent && (pollfd->events & POLLOUT) != 0) {
80193f4: 683b ldr r3, [r7, #0]
80193f6: 2b00 cmp r3, #0
80193f8: d009 beq.n 801940e <lwip_poll_should_wake+0x5e>
80193fa: 693b ldr r3, [r7, #16]
80193fc: f9b3 3004 ldrsh.w r3, [r3, #4]
8019400: b29b uxth r3, r3
8019402: f003 0302 and.w r3, r3, #2
8019406: 2b00 cmp r3, #0
8019408: d001 beq.n 801940e <lwip_poll_should_wake+0x5e>
return 1;
801940a: 2301 movs r3, #1
801940c: e00d b.n 801942a <lwip_poll_should_wake+0x7a>
}
if (has_errevent) {
801940e: 6a3b ldr r3, [r7, #32]
8019410: 2b00 cmp r3, #0
8019412: d001 beq.n 8019418 <lwip_poll_should_wake+0x68>
/* POLLERR is output only. */
return 1;
8019414: 2301 movs r3, #1
8019416: e008 b.n 801942a <lwip_poll_should_wake+0x7a>
for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
8019418: 697b ldr r3, [r7, #20]
801941a: 3301 adds r3, #1
801941c: 617b str r3, [r7, #20]
801941e: 68fb ldr r3, [r7, #12]
8019420: 699b ldr r3, [r3, #24]
8019422: 697a ldr r2, [r7, #20]
8019424: 429a cmp r2, r3
8019426: d3cd bcc.n 80193c4 <lwip_poll_should_wake+0x14>
}
}
}
return 0;
8019428: 2300 movs r3, #0
}
801942a: 4618 mov r0, r3
801942c: 371c adds r7, #28
801942e: 46bd mov sp, r7
8019430: f85d 7b04 ldr.w r7, [sp], #4
8019434: 4770 bx lr
...
08019438 <event_callback>:
* NETCONN_EVT_ERROR
* This requirement will be asserted in select_check_waiters()
*/
static void
event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len)
{
8019438: b580 push {r7, lr}
801943a: b08a sub sp, #40 @ 0x28
801943c: af00 add r7, sp, #0
801943e: 6078 str r0, [r7, #4]
8019440: 460b mov r3, r1
8019442: 70fb strb r3, [r7, #3]
8019444: 4613 mov r3, r2
8019446: 803b strh r3, [r7, #0]
SYS_ARCH_DECL_PROTECT(lev);
LWIP_UNUSED_ARG(len);
/* Get socket */
if (conn) {
8019448: 687b ldr r3, [r7, #4]
801944a: 2b00 cmp r3, #0
801944c: f000 80a4 beq.w 8019598 <event_callback+0x160>
s = conn->socket;
8019450: 687b ldr r3, [r7, #4]
8019452: 699b ldr r3, [r3, #24]
8019454: 627b str r3, [r7, #36] @ 0x24
if (s < 0) {
8019456: 6a7b ldr r3, [r7, #36] @ 0x24
8019458: 2b00 cmp r3, #0
801945a: da18 bge.n 801948e <event_callback+0x56>
/* Data comes in right away after an accept, even though
* the server task might not have created a new socket yet.
* Just count down (or up) if that's the case and we
* will use the data later. Note that only receive events
* can happen before the new socket is set up. */
SYS_ARCH_PROTECT(lev);
801945c: f00e f850 bl 8027500 <sys_arch_protect>
8019460: 61f8 str r0, [r7, #28]
if (conn->socket < 0) {
8019462: 687b ldr r3, [r7, #4]
8019464: 699b ldr r3, [r3, #24]
8019466: 2b00 cmp r3, #0
8019468: da0b bge.n 8019482 <event_callback+0x4a>
if (evt == NETCONN_EVT_RCVPLUS) {
801946a: 78fb ldrb r3, [r7, #3]
801946c: 2b00 cmp r3, #0
801946e: d104 bne.n 801947a <event_callback+0x42>
/* conn->socket is -1 on initialization
lwip_accept adjusts sock->recvevent if conn->socket < -1 */
conn->socket--;
8019470: 687b ldr r3, [r7, #4]
8019472: 699b ldr r3, [r3, #24]
8019474: 1e5a subs r2, r3, #1
8019476: 687b ldr r3, [r7, #4]
8019478: 619a str r2, [r3, #24]
}
SYS_ARCH_UNPROTECT(lev);
801947a: 69f8 ldr r0, [r7, #28]
801947c: f00e f84e bl 802751c <sys_arch_unprotect>
return;
8019480: e08d b.n 801959e <event_callback+0x166>
}
s = conn->socket;
8019482: 687b ldr r3, [r7, #4]
8019484: 699b ldr r3, [r3, #24]
8019486: 627b str r3, [r7, #36] @ 0x24
SYS_ARCH_UNPROTECT(lev);
8019488: 69f8 ldr r0, [r7, #28]
801948a: f00e f847 bl 802751c <sys_arch_unprotect>
}
sock = get_socket(s);
801948e: 6a78 ldr r0, [r7, #36] @ 0x24
8019490: f7ff f93a bl 8018708 <get_socket>
8019494: 61b8 str r0, [r7, #24]
if (!sock) {
8019496: 69bb ldr r3, [r7, #24]
8019498: 2b00 cmp r3, #0
801949a: d07f beq.n 801959c <event_callback+0x164>
}
} else {
return;
}
check_waiters = 1;
801949c: 2301 movs r3, #1
801949e: 623b str r3, [r7, #32]
SYS_ARCH_PROTECT(lev);
80194a0: f00e f82e bl 8027500 <sys_arch_protect>
80194a4: 61f8 str r0, [r7, #28]
/* Set event as required */
switch (evt) {
80194a6: 78fb ldrb r3, [r7, #3]
80194a8: 2b04 cmp r3, #4
80194aa: d83e bhi.n 801952a <event_callback+0xf2>
80194ac: a201 add r2, pc, #4 @ (adr r2, 80194b4 <event_callback+0x7c>)
80194ae: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80194b2: bf00 nop
80194b4: 080194c9 .word 0x080194c9
80194b8: 080194eb .word 0x080194eb
80194bc: 08019503 .word 0x08019503
80194c0: 08019517 .word 0x08019517
80194c4: 08019523 .word 0x08019523
case NETCONN_EVT_RCVPLUS:
sock->rcvevent++;
80194c8: 69bb ldr r3, [r7, #24]
80194ca: f9b3 3008 ldrsh.w r3, [r3, #8]
80194ce: b29b uxth r3, r3
80194d0: 3301 adds r3, #1
80194d2: b29b uxth r3, r3
80194d4: b21a sxth r2, r3
80194d6: 69bb ldr r3, [r7, #24]
80194d8: 811a strh r2, [r3, #8]
if (sock->rcvevent > 1) {
80194da: 69bb ldr r3, [r7, #24]
80194dc: f9b3 3008 ldrsh.w r3, [r3, #8]
80194e0: 2b01 cmp r3, #1
80194e2: dd2a ble.n 801953a <event_callback+0x102>
check_waiters = 0;
80194e4: 2300 movs r3, #0
80194e6: 623b str r3, [r7, #32]
}
break;
80194e8: e027 b.n 801953a <event_callback+0x102>
case NETCONN_EVT_RCVMINUS:
sock->rcvevent--;
80194ea: 69bb ldr r3, [r7, #24]
80194ec: f9b3 3008 ldrsh.w r3, [r3, #8]
80194f0: b29b uxth r3, r3
80194f2: 3b01 subs r3, #1
80194f4: b29b uxth r3, r3
80194f6: b21a sxth r2, r3
80194f8: 69bb ldr r3, [r7, #24]
80194fa: 811a strh r2, [r3, #8]
check_waiters = 0;
80194fc: 2300 movs r3, #0
80194fe: 623b str r3, [r7, #32]
break;
8019500: e01c b.n 801953c <event_callback+0x104>
case NETCONN_EVT_SENDPLUS:
if (sock->sendevent) {
8019502: 69bb ldr r3, [r7, #24]
8019504: 895b ldrh r3, [r3, #10]
8019506: 2b00 cmp r3, #0
8019508: d001 beq.n 801950e <event_callback+0xd6>
check_waiters = 0;
801950a: 2300 movs r3, #0
801950c: 623b str r3, [r7, #32]
}
sock->sendevent = 1;
801950e: 69bb ldr r3, [r7, #24]
8019510: 2201 movs r2, #1
8019512: 815a strh r2, [r3, #10]
break;
8019514: e012 b.n 801953c <event_callback+0x104>
case NETCONN_EVT_SENDMINUS:
sock->sendevent = 0;
8019516: 69bb ldr r3, [r7, #24]
8019518: 2200 movs r2, #0
801951a: 815a strh r2, [r3, #10]
check_waiters = 0;
801951c: 2300 movs r3, #0
801951e: 623b str r3, [r7, #32]
break;
8019520: e00c b.n 801953c <event_callback+0x104>
case NETCONN_EVT_ERROR:
sock->errevent = 1;
8019522: 69bb ldr r3, [r7, #24]
8019524: 2201 movs r2, #1
8019526: 819a strh r2, [r3, #12]
break;
8019528: e008 b.n 801953c <event_callback+0x104>
default:
LWIP_ASSERT("unknown event", 0);
801952a: 4b1e ldr r3, [pc, #120] @ (80195a4 <event_callback+0x16c>)
801952c: f44f 621f mov.w r2, #2544 @ 0x9f0
8019530: 491d ldr r1, [pc, #116] @ (80195a8 <event_callback+0x170>)
8019532: 481e ldr r0, [pc, #120] @ (80195ac <event_callback+0x174>)
8019534: f011 fa7a bl 802aa2c <iprintf>
break;
8019538: e000 b.n 801953c <event_callback+0x104>
break;
801953a: bf00 nop
}
if (sock->select_waiting && check_waiters) {
801953c: 69bb ldr r3, [r7, #24]
801953e: 7b9b ldrb r3, [r3, #14]
8019540: 2b00 cmp r3, #0
8019542: d025 beq.n 8019590 <event_callback+0x158>
8019544: 6a3b ldr r3, [r7, #32]
8019546: 2b00 cmp r3, #0
8019548: d022 beq.n 8019590 <event_callback+0x158>
/* Save which events are active */
int has_recvevent, has_sendevent, has_errevent;
has_recvevent = sock->rcvevent > 0;
801954a: 69bb ldr r3, [r7, #24]
801954c: f9b3 3008 ldrsh.w r3, [r3, #8]
8019550: 2b00 cmp r3, #0
8019552: bfcc ite gt
8019554: 2301 movgt r3, #1
8019556: 2300 movle r3, #0
8019558: b2db uxtb r3, r3
801955a: 617b str r3, [r7, #20]
has_sendevent = sock->sendevent != 0;
801955c: 69bb ldr r3, [r7, #24]
801955e: 895b ldrh r3, [r3, #10]
8019560: 2b00 cmp r3, #0
8019562: bf14 ite ne
8019564: 2301 movne r3, #1
8019566: 2300 moveq r3, #0
8019568: b2db uxtb r3, r3
801956a: 613b str r3, [r7, #16]
has_errevent = sock->errevent != 0;
801956c: 69bb ldr r3, [r7, #24]
801956e: 899b ldrh r3, [r3, #12]
8019570: 2b00 cmp r3, #0
8019572: bf14 ite ne
8019574: 2301 movne r3, #1
8019576: 2300 moveq r3, #0
8019578: b2db uxtb r3, r3
801957a: 60fb str r3, [r7, #12]
SYS_ARCH_UNPROTECT(lev);
801957c: 69f8 ldr r0, [r7, #28]
801957e: f00d ffcd bl 802751c <sys_arch_unprotect>
/* Check any select calls waiting on this socket */
select_check_waiters(s, has_recvevent, has_sendevent, has_errevent);
8019582: 68fb ldr r3, [r7, #12]
8019584: 693a ldr r2, [r7, #16]
8019586: 6979 ldr r1, [r7, #20]
8019588: 6a78 ldr r0, [r7, #36] @ 0x24
801958a: f000 f811 bl 80195b0 <select_check_waiters>
if (sock->select_waiting && check_waiters) {
801958e: e006 b.n 801959e <event_callback+0x166>
} else {
SYS_ARCH_UNPROTECT(lev);
8019590: 69f8 ldr r0, [r7, #28]
8019592: f00d ffc3 bl 802751c <sys_arch_unprotect>
8019596: e002 b.n 801959e <event_callback+0x166>
return;
8019598: bf00 nop
801959a: e000 b.n 801959e <event_callback+0x166>
return;
801959c: bf00 nop
}
done_socket(sock);
}
801959e: 3728 adds r7, #40 @ 0x28
80195a0: 46bd mov sp, r7
80195a2: bd80 pop {r7, pc}
80195a4: 0802e814 .word 0x0802e814
80195a8: 0802eb90 .word 0x0802eb90
80195ac: 0802e868 .word 0x0802e868
080195b0 <select_check_waiters>:
* of the loop, thus creating a possibility where a thread could modify the
* select_cb_list during our UNPROTECT/PROTECT. We use a generational counter to
* detect this change and restart the list walk. The list is expected to be small
*/
static void select_check_waiters(int s, int has_recvevent, int has_sendevent, int has_errevent)
{
80195b0: b580 push {r7, lr}
80195b2: b088 sub sp, #32
80195b4: af02 add r7, sp, #8
80195b6: 60f8 str r0, [r7, #12]
80195b8: 60b9 str r1, [r7, #8]
80195ba: 607a str r2, [r7, #4]
80195bc: 603b str r3, [r7, #0]
#if !LWIP_TCPIP_CORE_LOCKING
int last_select_cb_ctr;
SYS_ARCH_DECL_PROTECT(lev);
#endif /* !LWIP_TCPIP_CORE_LOCKING */
LWIP_ASSERT_CORE_LOCKED();
80195be: f7f7 fe09 bl 80111d4 <sys_check_core_locking>
SYS_ARCH_PROTECT(lev);
again:
/* remember the state of select_cb_list to detect changes */
last_select_cb_ctr = select_cb_ctr;
#endif /* !LWIP_TCPIP_CORE_LOCKING */
for (scb = select_cb_list; scb != NULL; scb = scb->next) {
80195c2: 4b42 ldr r3, [pc, #264] @ (80196cc <select_check_waiters+0x11c>)
80195c4: 681b ldr r3, [r3, #0]
80195c6: 617b str r3, [r7, #20]
80195c8: e078 b.n 80196bc <select_check_waiters+0x10c>
if (scb->sem_signalled == 0) {
80195ca: 697b ldr r3, [r7, #20]
80195cc: 69db ldr r3, [r3, #28]
80195ce: 2b00 cmp r3, #0
80195d0: d171 bne.n 80196b6 <select_check_waiters+0x106>
/* semaphore not signalled yet */
int do_signal = 0;
80195d2: 2300 movs r3, #0
80195d4: 613b str r3, [r7, #16]
#if LWIP_SOCKET_POLL
if (scb->poll_fds != NULL) {
80195d6: 697b ldr r3, [r7, #20]
80195d8: 695b ldr r3, [r3, #20]
80195da: 2b00 cmp r3, #0
80195dc: d009 beq.n 80195f2 <select_check_waiters+0x42>
do_signal = lwip_poll_should_wake(scb, s, has_recvevent, has_sendevent, has_errevent);
80195de: 683b ldr r3, [r7, #0]
80195e0: 9300 str r3, [sp, #0]
80195e2: 687b ldr r3, [r7, #4]
80195e4: 68ba ldr r2, [r7, #8]
80195e6: 68f9 ldr r1, [r7, #12]
80195e8: 6978 ldr r0, [r7, #20]
80195ea: f7ff fee1 bl 80193b0 <lwip_poll_should_wake>
80195ee: 6138 str r0, [r7, #16]
80195f0: e056 b.n 80196a0 <select_check_waiters+0xf0>
else
#endif /* LWIP_SOCKET_SELECT && LWIP_SOCKET_POLL */
#if LWIP_SOCKET_SELECT
{
/* Test this select call for our socket */
if (has_recvevent) {
80195f2: 68bb ldr r3, [r7, #8]
80195f4: 2b00 cmp r3, #0
80195f6: d017 beq.n 8019628 <select_check_waiters+0x78>
if (scb->readset && FD_ISSET(s, scb->readset)) {
80195f8: 697b ldr r3, [r7, #20]
80195fa: 689b ldr r3, [r3, #8]
80195fc: 2b00 cmp r3, #0
80195fe: d013 beq.n 8019628 <select_check_waiters+0x78>
8019600: 697b ldr r3, [r7, #20]
8019602: 689a ldr r2, [r3, #8]
8019604: 68fb ldr r3, [r7, #12]
8019606: 2b00 cmp r3, #0
8019608: da00 bge.n 801960c <select_check_waiters+0x5c>
801960a: 331f adds r3, #31
801960c: 115b asrs r3, r3, #5
801960e: f852 2023 ldr.w r2, [r2, r3, lsl #2]
8019612: 68fb ldr r3, [r7, #12]
8019614: f003 031f and.w r3, r3, #31
8019618: fa22 f303 lsr.w r3, r2, r3
801961c: f003 0301 and.w r3, r3, #1
8019620: 2b00 cmp r3, #0
8019622: d001 beq.n 8019628 <select_check_waiters+0x78>
do_signal = 1;
8019624: 2301 movs r3, #1
8019626: 613b str r3, [r7, #16]
}
}
if (has_sendevent) {
8019628: 687b ldr r3, [r7, #4]
801962a: 2b00 cmp r3, #0
801962c: d01a beq.n 8019664 <select_check_waiters+0xb4>
if (!do_signal && scb->writeset && FD_ISSET(s, scb->writeset)) {
801962e: 693b ldr r3, [r7, #16]
8019630: 2b00 cmp r3, #0
8019632: d117 bne.n 8019664 <select_check_waiters+0xb4>
8019634: 697b ldr r3, [r7, #20]
8019636: 68db ldr r3, [r3, #12]
8019638: 2b00 cmp r3, #0
801963a: d013 beq.n 8019664 <select_check_waiters+0xb4>
801963c: 697b ldr r3, [r7, #20]
801963e: 68da ldr r2, [r3, #12]
8019640: 68fb ldr r3, [r7, #12]
8019642: 2b00 cmp r3, #0
8019644: da00 bge.n 8019648 <select_check_waiters+0x98>
8019646: 331f adds r3, #31
8019648: 115b asrs r3, r3, #5
801964a: f852 2023 ldr.w r2, [r2, r3, lsl #2]
801964e: 68fb ldr r3, [r7, #12]
8019650: f003 031f and.w r3, r3, #31
8019654: fa22 f303 lsr.w r3, r2, r3
8019658: f003 0301 and.w r3, r3, #1
801965c: 2b00 cmp r3, #0
801965e: d001 beq.n 8019664 <select_check_waiters+0xb4>
do_signal = 1;
8019660: 2301 movs r3, #1
8019662: 613b str r3, [r7, #16]
}
}
if (has_errevent) {
8019664: 683b ldr r3, [r7, #0]
8019666: 2b00 cmp r3, #0
8019668: d01a beq.n 80196a0 <select_check_waiters+0xf0>
if (!do_signal && scb->exceptset && FD_ISSET(s, scb->exceptset)) {
801966a: 693b ldr r3, [r7, #16]
801966c: 2b00 cmp r3, #0
801966e: d117 bne.n 80196a0 <select_check_waiters+0xf0>
8019670: 697b ldr r3, [r7, #20]
8019672: 691b ldr r3, [r3, #16]
8019674: 2b00 cmp r3, #0
8019676: d013 beq.n 80196a0 <select_check_waiters+0xf0>
8019678: 697b ldr r3, [r7, #20]
801967a: 691a ldr r2, [r3, #16]
801967c: 68fb ldr r3, [r7, #12]
801967e: 2b00 cmp r3, #0
8019680: da00 bge.n 8019684 <select_check_waiters+0xd4>
8019682: 331f adds r3, #31
8019684: 115b asrs r3, r3, #5
8019686: f852 2023 ldr.w r2, [r2, r3, lsl #2]
801968a: 68fb ldr r3, [r7, #12]
801968c: f003 031f and.w r3, r3, #31
8019690: fa22 f303 lsr.w r3, r2, r3
8019694: f003 0301 and.w r3, r3, #1
8019698: 2b00 cmp r3, #0
801969a: d001 beq.n 80196a0 <select_check_waiters+0xf0>
do_signal = 1;
801969c: 2301 movs r3, #1
801969e: 613b str r3, [r7, #16]
}
}
}
#endif /* LWIP_SOCKET_SELECT */
if (do_signal) {
80196a0: 693b ldr r3, [r7, #16]
80196a2: 2b00 cmp r3, #0
80196a4: d007 beq.n 80196b6 <select_check_waiters+0x106>
scb->sem_signalled = 1;
80196a6: 697b ldr r3, [r7, #20]
80196a8: 2201 movs r2, #1
80196aa: 61da str r2, [r3, #28]
/* For !LWIP_TCPIP_CORE_LOCKING, we don't call SYS_ARCH_UNPROTECT() before signaling
the semaphore, as this might lead to the select thread taking itself off the list,
invalidating the semaphore. */
sys_sem_signal(SELECT_SEM_PTR(scb->sem));
80196ac: 697b ldr r3, [r7, #20]
80196ae: 3320 adds r3, #32
80196b0: 4618 mov r0, r3
80196b2: f00d fe8f bl 80273d4 <sys_sem_signal>
for (scb = select_cb_list; scb != NULL; scb = scb->next) {
80196b6: 697b ldr r3, [r7, #20]
80196b8: 681b ldr r3, [r3, #0]
80196ba: 617b str r3, [r7, #20]
80196bc: 697b ldr r3, [r7, #20]
80196be: 2b00 cmp r3, #0
80196c0: d183 bne.n 80195ca <select_check_waiters+0x1a>
/* remember the state of select_cb_list to detect changes */
last_select_cb_ctr = select_cb_ctr;
}
SYS_ARCH_UNPROTECT(lev);
#endif
}
80196c2: bf00 nop
80196c4: bf00 nop
80196c6: 3718 adds r7, #24
80196c8: 46bd mov sp, r7
80196ca: bd80 pop {r7, pc}
80196cc: 24024444 .word 0x24024444
080196d0 <lwip_ioctl>:
return err;
}
int
lwip_ioctl(int s, long cmd, void *argp)
{
80196d0: b580 push {r7, lr}
80196d2: b08c sub sp, #48 @ 0x30
80196d4: af00 add r7, sp, #0
80196d6: 60f8 str r0, [r7, #12]
80196d8: 60b9 str r1, [r7, #8]
80196da: 607a str r2, [r7, #4]
struct lwip_sock *sock = get_socket(s);
80196dc: 68f8 ldr r0, [r7, #12]
80196de: f7ff f813 bl 8018708 <get_socket>
80196e2: 6278 str r0, [r7, #36] @ 0x24
u8_t val;
#if LWIP_SO_RCVBUF
int recv_avail;
#endif /* LWIP_SO_RCVBUF */
if (!sock) {
80196e4: 6a7b ldr r3, [r7, #36] @ 0x24
80196e6: 2b00 cmp r3, #0
80196e8: d102 bne.n 80196f0 <lwip_ioctl+0x20>
return -1;
80196ea: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80196ee: e089 b.n 8019804 <lwip_ioctl+0x134>
}
switch (cmd) {
80196f0: 68bb ldr r3, [r7, #8]
80196f2: 4a46 ldr r2, [pc, #280] @ (801980c <lwip_ioctl+0x13c>)
80196f4: 4293 cmp r3, r2
80196f6: d048 beq.n 801978a <lwip_ioctl+0xba>
80196f8: 68bb ldr r3, [r7, #8]
80196fa: 4a45 ldr r2, [pc, #276] @ (8019810 <lwip_ioctl+0x140>)
80196fc: 4293 cmp r3, r2
80196fe: d176 bne.n 80197ee <lwip_ioctl+0x11e>
#if LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE
case FIONREAD:
if (!argp) {
8019700: 687b ldr r3, [r7, #4]
8019702: 2b00 cmp r3, #0
8019704: d10a bne.n 801971c <lwip_ioctl+0x4c>
sock_set_errno(sock, EINVAL);
8019706: 2316 movs r3, #22
8019708: 61bb str r3, [r7, #24]
801970a: 69bb ldr r3, [r7, #24]
801970c: 2b00 cmp r3, #0
801970e: d002 beq.n 8019716 <lwip_ioctl+0x46>
8019710: 4a40 ldr r2, [pc, #256] @ (8019814 <lwip_ioctl+0x144>)
8019712: 69bb ldr r3, [r7, #24]
8019714: 6013 str r3, [r2, #0]
done_socket(sock);
return -1;
8019716: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
801971a: e073 b.n 8019804 <lwip_ioctl+0x134>
}
#endif /* LWIP_FIONREAD_LINUXMODE */
#if LWIP_SO_RCVBUF
/* we come here if either LWIP_FIONREAD_LINUXMODE==0 or this is a TCP socket */
SYS_ARCH_GET(sock->conn->recv_avail, recv_avail);
801971c: f00d fef0 bl 8027500 <sys_arch_protect>
8019720: 6238 str r0, [r7, #32]
8019722: 6a7b ldr r3, [r7, #36] @ 0x24
8019724: 681b ldr r3, [r3, #0]
8019726: 6a5b ldr r3, [r3, #36] @ 0x24
8019728: 62fb str r3, [r7, #44] @ 0x2c
801972a: 6a38 ldr r0, [r7, #32]
801972c: f00d fef6 bl 802751c <sys_arch_unprotect>
if (recv_avail < 0) {
8019730: 6afb ldr r3, [r7, #44] @ 0x2c
8019732: 2b00 cmp r3, #0
8019734: da01 bge.n 801973a <lwip_ioctl+0x6a>
recv_avail = 0;
8019736: 2300 movs r3, #0
8019738: 62fb str r3, [r7, #44] @ 0x2c
}
/* Check if there is data left from the last recv operation. /maq 041215 */
if (sock->lastdata.netbuf) {
801973a: 6a7b ldr r3, [r7, #36] @ 0x24
801973c: 685b ldr r3, [r3, #4]
801973e: 2b00 cmp r3, #0
8019740: d016 beq.n 8019770 <lwip_ioctl+0xa0>
if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
8019742: 6a7b ldr r3, [r7, #36] @ 0x24
8019744: 681b ldr r3, [r3, #0]
8019746: 781b ldrb r3, [r3, #0]
8019748: f003 03f0 and.w r3, r3, #240 @ 0xf0
801974c: 2b10 cmp r3, #16
801974e: d107 bne.n 8019760 <lwip_ioctl+0x90>
recv_avail += sock->lastdata.pbuf->tot_len;
8019750: 6a7b ldr r3, [r7, #36] @ 0x24
8019752: 685b ldr r3, [r3, #4]
8019754: 891b ldrh r3, [r3, #8]
8019756: 461a mov r2, r3
8019758: 6afb ldr r3, [r7, #44] @ 0x2c
801975a: 4413 add r3, r2
801975c: 62fb str r3, [r7, #44] @ 0x2c
801975e: e007 b.n 8019770 <lwip_ioctl+0xa0>
} else {
recv_avail += sock->lastdata.netbuf->p->tot_len;
8019760: 6a7b ldr r3, [r7, #36] @ 0x24
8019762: 685b ldr r3, [r3, #4]
8019764: 681b ldr r3, [r3, #0]
8019766: 891b ldrh r3, [r3, #8]
8019768: 461a mov r2, r3
801976a: 6afb ldr r3, [r7, #44] @ 0x2c
801976c: 4413 add r3, r2
801976e: 62fb str r3, [r7, #44] @ 0x2c
}
}
*((int *)argp) = recv_avail;
8019770: 687b ldr r3, [r7, #4]
8019772: 6afa ldr r2, [r7, #44] @ 0x2c
8019774: 601a str r2, [r3, #0]
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %"U16_F"\n", s, argp, *((u16_t *)argp)));
sock_set_errno(sock, 0);
8019776: 2300 movs r3, #0
8019778: 61fb str r3, [r7, #28]
801977a: 69fb ldr r3, [r7, #28]
801977c: 2b00 cmp r3, #0
801977e: d002 beq.n 8019786 <lwip_ioctl+0xb6>
8019780: 4a24 ldr r2, [pc, #144] @ (8019814 <lwip_ioctl+0x144>)
8019782: 69fb ldr r3, [r7, #28]
8019784: 6013 str r3, [r2, #0]
done_socket(sock);
return 0;
8019786: 2300 movs r3, #0
8019788: e03c b.n 8019804 <lwip_ioctl+0x134>
break;
#endif /* LWIP_SO_RCVBUF */
#endif /* LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE */
case (long)FIONBIO:
val = 0;
801978a: 2300 movs r3, #0
801978c: f887 302b strb.w r3, [r7, #43] @ 0x2b
if (argp && *(int *)argp) {
8019790: 687b ldr r3, [r7, #4]
8019792: 2b00 cmp r3, #0
8019794: d006 beq.n 80197a4 <lwip_ioctl+0xd4>
8019796: 687b ldr r3, [r7, #4]
8019798: 681b ldr r3, [r3, #0]
801979a: 2b00 cmp r3, #0
801979c: d002 beq.n 80197a4 <lwip_ioctl+0xd4>
val = 1;
801979e: 2301 movs r3, #1
80197a0: f887 302b strb.w r3, [r7, #43] @ 0x2b
}
netconn_set_nonblocking(sock->conn, val);
80197a4: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
80197a8: 2b00 cmp r3, #0
80197aa: d00b beq.n 80197c4 <lwip_ioctl+0xf4>
80197ac: 6a7b ldr r3, [r7, #36] @ 0x24
80197ae: 681b ldr r3, [r3, #0]
80197b0: f893 2028 ldrb.w r2, [r3, #40] @ 0x28
80197b4: 6a7b ldr r3, [r7, #36] @ 0x24
80197b6: 681b ldr r3, [r3, #0]
80197b8: f042 0202 orr.w r2, r2, #2
80197bc: b2d2 uxtb r2, r2
80197be: f883 2028 strb.w r2, [r3, #40] @ 0x28
80197c2: e00a b.n 80197da <lwip_ioctl+0x10a>
80197c4: 6a7b ldr r3, [r7, #36] @ 0x24
80197c6: 681b ldr r3, [r3, #0]
80197c8: f893 2028 ldrb.w r2, [r3, #40] @ 0x28
80197cc: 6a7b ldr r3, [r7, #36] @ 0x24
80197ce: 681b ldr r3, [r3, #0]
80197d0: f022 0202 bic.w r2, r2, #2
80197d4: b2d2 uxtb r2, r2
80197d6: f883 2028 strb.w r2, [r3, #40] @ 0x28
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, val));
sock_set_errno(sock, 0);
80197da: 2300 movs r3, #0
80197dc: 617b str r3, [r7, #20]
80197de: 697b ldr r3, [r7, #20]
80197e0: 2b00 cmp r3, #0
80197e2: d002 beq.n 80197ea <lwip_ioctl+0x11a>
80197e4: 4a0b ldr r2, [pc, #44] @ (8019814 <lwip_ioctl+0x144>)
80197e6: 697b ldr r3, [r7, #20]
80197e8: 6013 str r3, [r2, #0]
done_socket(sock);
return 0;
80197ea: 2300 movs r3, #0
80197ec: e00a b.n 8019804 <lwip_ioctl+0x134>
default:
break;
80197ee: bf00 nop
} /* switch (cmd) */
LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp));
sock_set_errno(sock, ENOSYS); /* not yet implemented */
80197f0: 2326 movs r3, #38 @ 0x26
80197f2: 613b str r3, [r7, #16]
80197f4: 693b ldr r3, [r7, #16]
80197f6: 2b00 cmp r3, #0
80197f8: d002 beq.n 8019800 <lwip_ioctl+0x130>
80197fa: 4a06 ldr r2, [pc, #24] @ (8019814 <lwip_ioctl+0x144>)
80197fc: 693b ldr r3, [r7, #16]
80197fe: 6013 str r3, [r2, #0]
done_socket(sock);
return -1;
8019800: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
8019804: 4618 mov r0, r3
8019806: 3730 adds r7, #48 @ 0x30
8019808: 46bd mov sp, r7
801980a: bd80 pop {r7, pc}
801980c: 8004667e .word 0x8004667e
8019810: 4004667f .word 0x4004667f
8019814: 2402b2a0 .word 0x2402b2a0
08019818 <tcpip_timeouts_mbox_fetch>:
* @param mbox the mbox to fetch the message from
* @param msg the place to store the message
*/
static void
tcpip_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg)
{
8019818: b580 push {r7, lr}
801981a: b084 sub sp, #16
801981c: af00 add r7, sp, #0
801981e: 6078 str r0, [r7, #4]
8019820: 6039 str r1, [r7, #0]
u32_t sleeptime, res;
again:
LWIP_ASSERT_CORE_LOCKED();
8019822: f7f7 fcd7 bl 80111d4 <sys_check_core_locking>
sleeptime = sys_timeouts_sleeptime();
8019826: f008 fb41 bl 8021eac <sys_timeouts_sleeptime>
801982a: 60f8 str r0, [r7, #12]
if (sleeptime == SYS_TIMEOUTS_SLEEPTIME_INFINITE) {
801982c: 68fb ldr r3, [r7, #12]
801982e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8019832: d109 bne.n 8019848 <tcpip_timeouts_mbox_fetch+0x30>
UNLOCK_TCPIP_CORE();
8019834: f7f7 fcc0 bl 80111b8 <sys_unlock_tcpip_core>
sys_arch_mbox_fetch(mbox, msg, 0);
8019838: 2200 movs r2, #0
801983a: 6839 ldr r1, [r7, #0]
801983c: 6878 ldr r0, [r7, #4]
801983e: f00d fd0d bl 802725c <sys_arch_mbox_fetch>
LOCK_TCPIP_CORE();
8019842: f7f7 fca9 bl 8011198 <sys_lock_tcpip_core>
return;
8019846: e016 b.n 8019876 <tcpip_timeouts_mbox_fetch+0x5e>
} else if (sleeptime == 0) {
8019848: 68fb ldr r3, [r7, #12]
801984a: 2b00 cmp r3, #0
801984c: d102 bne.n 8019854 <tcpip_timeouts_mbox_fetch+0x3c>
sys_check_timeouts();
801984e: f008 faf1 bl 8021e34 <sys_check_timeouts>
/* We try again to fetch a message from the mbox. */
goto again;
8019852: e7e6 b.n 8019822 <tcpip_timeouts_mbox_fetch+0xa>
}
UNLOCK_TCPIP_CORE();
8019854: f7f7 fcb0 bl 80111b8 <sys_unlock_tcpip_core>
res = sys_arch_mbox_fetch(mbox, msg, sleeptime);
8019858: 68fa ldr r2, [r7, #12]
801985a: 6839 ldr r1, [r7, #0]
801985c: 6878 ldr r0, [r7, #4]
801985e: f00d fcfd bl 802725c <sys_arch_mbox_fetch>
8019862: 60b8 str r0, [r7, #8]
LOCK_TCPIP_CORE();
8019864: f7f7 fc98 bl 8011198 <sys_lock_tcpip_core>
if (res == SYS_ARCH_TIMEOUT) {
8019868: 68bb ldr r3, [r7, #8]
801986a: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
801986e: d102 bne.n 8019876 <tcpip_timeouts_mbox_fetch+0x5e>
/* If a SYS_ARCH_TIMEOUT value is returned, a timeout occurred
before a message could be fetched. */
sys_check_timeouts();
8019870: f008 fae0 bl 8021e34 <sys_check_timeouts>
/* We try again to fetch a message from the mbox. */
goto again;
8019874: e7d5 b.n 8019822 <tcpip_timeouts_mbox_fetch+0xa>
}
}
8019876: 3710 adds r7, #16
8019878: 46bd mov sp, r7
801987a: bd80 pop {r7, pc}
0801987c <tcpip_thread>:
*
* @param arg unused argument
*/
static void
tcpip_thread(void *arg)
{
801987c: b580 push {r7, lr}
801987e: b084 sub sp, #16
8019880: af00 add r7, sp, #0
8019882: 6078 str r0, [r7, #4]
struct tcpip_msg *msg;
LWIP_UNUSED_ARG(arg);
LWIP_MARK_TCPIP_THREAD();
8019884: f7f7 fce2 bl 801124c <sys_mark_tcpip_thread>
LOCK_TCPIP_CORE();
8019888: f7f7 fc86 bl 8011198 <sys_lock_tcpip_core>
if (tcpip_init_done != NULL) {
801988c: 4b0f ldr r3, [pc, #60] @ (80198cc <tcpip_thread+0x50>)
801988e: 681b ldr r3, [r3, #0]
8019890: 2b00 cmp r3, #0
8019892: d005 beq.n 80198a0 <tcpip_thread+0x24>
tcpip_init_done(tcpip_init_done_arg);
8019894: 4b0d ldr r3, [pc, #52] @ (80198cc <tcpip_thread+0x50>)
8019896: 681b ldr r3, [r3, #0]
8019898: 4a0d ldr r2, [pc, #52] @ (80198d0 <tcpip_thread+0x54>)
801989a: 6812 ldr r2, [r2, #0]
801989c: 4610 mov r0, r2
801989e: 4798 blx r3
}
while (1) { /* MAIN Loop */
LWIP_TCPIP_THREAD_ALIVE();
/* wait for a message, timeouts are processed while waiting */
TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
80198a0: f107 030c add.w r3, r7, #12
80198a4: 4619 mov r1, r3
80198a6: 480b ldr r0, [pc, #44] @ (80198d4 <tcpip_thread+0x58>)
80198a8: f7ff ffb6 bl 8019818 <tcpip_timeouts_mbox_fetch>
if (msg == NULL) {
80198ac: 68fb ldr r3, [r7, #12]
80198ae: 2b00 cmp r3, #0
80198b0: d106 bne.n 80198c0 <tcpip_thread+0x44>
LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: NULL\n"));
LWIP_ASSERT("tcpip_thread: invalid message", 0);
80198b2: 4b09 ldr r3, [pc, #36] @ (80198d8 <tcpip_thread+0x5c>)
80198b4: 2291 movs r2, #145 @ 0x91
80198b6: 4909 ldr r1, [pc, #36] @ (80198dc <tcpip_thread+0x60>)
80198b8: 4809 ldr r0, [pc, #36] @ (80198e0 <tcpip_thread+0x64>)
80198ba: f011 f8b7 bl 802aa2c <iprintf>
continue;
80198be: e003 b.n 80198c8 <tcpip_thread+0x4c>
}
tcpip_thread_handle_msg(msg);
80198c0: 68fb ldr r3, [r7, #12]
80198c2: 4618 mov r0, r3
80198c4: f000 f80e bl 80198e4 <tcpip_thread_handle_msg>
TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
80198c8: e7ea b.n 80198a0 <tcpip_thread+0x24>
80198ca: bf00 nop
80198cc: 24024448 .word 0x24024448
80198d0: 2402444c .word 0x2402444c
80198d4: 24024450 .word 0x24024450
80198d8: 0802ebe4 .word 0x0802ebe4
80198dc: 0802ec14 .word 0x0802ec14
80198e0: 0802ec34 .word 0x0802ec34
080198e4 <tcpip_thread_handle_msg>:
/* Handle a single tcpip_msg
* This is in its own function for access by tests only.
*/
static void
tcpip_thread_handle_msg(struct tcpip_msg *msg)
{
80198e4: b580 push {r7, lr}
80198e6: b082 sub sp, #8
80198e8: af00 add r7, sp, #0
80198ea: 6078 str r0, [r7, #4]
switch (msg->type) {
80198ec: 687b ldr r3, [r7, #4]
80198ee: 781b ldrb r3, [r3, #0]
80198f0: 2b02 cmp r3, #2
80198f2: d026 beq.n 8019942 <tcpip_thread_handle_msg+0x5e>
80198f4: 2b02 cmp r3, #2
80198f6: dc2b bgt.n 8019950 <tcpip_thread_handle_msg+0x6c>
80198f8: 2b00 cmp r3, #0
80198fa: d002 beq.n 8019902 <tcpip_thread_handle_msg+0x1e>
80198fc: 2b01 cmp r3, #1
80198fe: d015 beq.n 801992c <tcpip_thread_handle_msg+0x48>
8019900: e026 b.n 8019950 <tcpip_thread_handle_msg+0x6c>
#endif /* !LWIP_TCPIP_CORE_LOCKING */
#if !LWIP_TCPIP_CORE_LOCKING_INPUT
case TCPIP_MSG_INPKT:
LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: PACKET %p\n", (void *)msg));
if (msg->msg.inp.input_fn(msg->msg.inp.p, msg->msg.inp.netif) != ERR_OK) {
8019902: 687b ldr r3, [r7, #4]
8019904: 68db ldr r3, [r3, #12]
8019906: 687a ldr r2, [r7, #4]
8019908: 6850 ldr r0, [r2, #4]
801990a: 687a ldr r2, [r7, #4]
801990c: 6892 ldr r2, [r2, #8]
801990e: 4611 mov r1, r2
8019910: 4798 blx r3
8019912: 4603 mov r3, r0
8019914: 2b00 cmp r3, #0
8019916: d004 beq.n 8019922 <tcpip_thread_handle_msg+0x3e>
pbuf_free(msg->msg.inp.p);
8019918: 687b ldr r3, [r7, #4]
801991a: 685b ldr r3, [r3, #4]
801991c: 4618 mov r0, r3
801991e: f001 fe0d bl 801b53c <pbuf_free>
}
memp_free(MEMP_TCPIP_MSG_INPKT, msg);
8019922: 6879 ldr r1, [r7, #4]
8019924: 2009 movs r0, #9
8019926: f000 ff1b bl 801a760 <memp_free>
break;
801992a: e018 b.n 801995e <tcpip_thread_handle_msg+0x7a>
break;
#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */
case TCPIP_MSG_CALLBACK:
LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg));
msg->msg.cb.function(msg->msg.cb.ctx);
801992c: 687b ldr r3, [r7, #4]
801992e: 685b ldr r3, [r3, #4]
8019930: 687a ldr r2, [r7, #4]
8019932: 6892 ldr r2, [r2, #8]
8019934: 4610 mov r0, r2
8019936: 4798 blx r3
memp_free(MEMP_TCPIP_MSG_API, msg);
8019938: 6879 ldr r1, [r7, #4]
801993a: 2008 movs r0, #8
801993c: f000 ff10 bl 801a760 <memp_free>
break;
8019940: e00d b.n 801995e <tcpip_thread_handle_msg+0x7a>
case TCPIP_MSG_CALLBACK_STATIC:
LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK_STATIC %p\n", (void *)msg));
msg->msg.cb.function(msg->msg.cb.ctx);
8019942: 687b ldr r3, [r7, #4]
8019944: 685b ldr r3, [r3, #4]
8019946: 687a ldr r2, [r7, #4]
8019948: 6892 ldr r2, [r2, #8]
801994a: 4610 mov r0, r2
801994c: 4798 blx r3
break;
801994e: e006 b.n 801995e <tcpip_thread_handle_msg+0x7a>
default:
LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: %d\n", msg->type));
LWIP_ASSERT("tcpip_thread: invalid message", 0);
8019950: 4b05 ldr r3, [pc, #20] @ (8019968 <tcpip_thread_handle_msg+0x84>)
8019952: 22cf movs r2, #207 @ 0xcf
8019954: 4905 ldr r1, [pc, #20] @ (801996c <tcpip_thread_handle_msg+0x88>)
8019956: 4806 ldr r0, [pc, #24] @ (8019970 <tcpip_thread_handle_msg+0x8c>)
8019958: f011 f868 bl 802aa2c <iprintf>
break;
801995c: bf00 nop
}
}
801995e: bf00 nop
8019960: 3708 adds r7, #8
8019962: 46bd mov sp, r7
8019964: bd80 pop {r7, pc}
8019966: bf00 nop
8019968: 0802ebe4 .word 0x0802ebe4
801996c: 0802ec14 .word 0x0802ec14
8019970: 0802ec34 .word 0x0802ec34
08019974 <tcpip_inpkt>:
* @param inp the network interface on which the packet was received
* @param input_fn input function to call
*/
err_t
tcpip_inpkt(struct pbuf *p, struct netif *inp, netif_input_fn input_fn)
{
8019974: b580 push {r7, lr}
8019976: b086 sub sp, #24
8019978: af00 add r7, sp, #0
801997a: 60f8 str r0, [r7, #12]
801997c: 60b9 str r1, [r7, #8]
801997e: 607a str r2, [r7, #4]
UNLOCK_TCPIP_CORE();
return ret;
#else /* LWIP_TCPIP_CORE_LOCKING_INPUT */
struct tcpip_msg *msg;
LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
8019980: 481a ldr r0, [pc, #104] @ (80199ec <tcpip_inpkt+0x78>)
8019982: f00d fcb3 bl 80272ec <sys_mbox_valid>
8019986: 4603 mov r3, r0
8019988: 2b00 cmp r3, #0
801998a: d105 bne.n 8019998 <tcpip_inpkt+0x24>
801998c: 4b18 ldr r3, [pc, #96] @ (80199f0 <tcpip_inpkt+0x7c>)
801998e: 22fc movs r2, #252 @ 0xfc
8019990: 4918 ldr r1, [pc, #96] @ (80199f4 <tcpip_inpkt+0x80>)
8019992: 4819 ldr r0, [pc, #100] @ (80199f8 <tcpip_inpkt+0x84>)
8019994: f011 f84a bl 802aa2c <iprintf>
msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_INPKT);
8019998: 2009 movs r0, #9
801999a: f000 fe6b bl 801a674 <memp_malloc>
801999e: 6178 str r0, [r7, #20]
if (msg == NULL) {
80199a0: 697b ldr r3, [r7, #20]
80199a2: 2b00 cmp r3, #0
80199a4: d102 bne.n 80199ac <tcpip_inpkt+0x38>
return ERR_MEM;
80199a6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80199aa: e01a b.n 80199e2 <tcpip_inpkt+0x6e>
}
msg->type = TCPIP_MSG_INPKT;
80199ac: 697b ldr r3, [r7, #20]
80199ae: 2200 movs r2, #0
80199b0: 701a strb r2, [r3, #0]
msg->msg.inp.p = p;
80199b2: 697b ldr r3, [r7, #20]
80199b4: 68fa ldr r2, [r7, #12]
80199b6: 605a str r2, [r3, #4]
msg->msg.inp.netif = inp;
80199b8: 697b ldr r3, [r7, #20]
80199ba: 68ba ldr r2, [r7, #8]
80199bc: 609a str r2, [r3, #8]
msg->msg.inp.input_fn = input_fn;
80199be: 697b ldr r3, [r7, #20]
80199c0: 687a ldr r2, [r7, #4]
80199c2: 60da str r2, [r3, #12]
if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
80199c4: 6979 ldr r1, [r7, #20]
80199c6: 4809 ldr r0, [pc, #36] @ (80199ec <tcpip_inpkt+0x78>)
80199c8: f00d fc2e bl 8027228 <sys_mbox_trypost>
80199cc: 4603 mov r3, r0
80199ce: 2b00 cmp r3, #0
80199d0: d006 beq.n 80199e0 <tcpip_inpkt+0x6c>
memp_free(MEMP_TCPIP_MSG_INPKT, msg);
80199d2: 6979 ldr r1, [r7, #20]
80199d4: 2009 movs r0, #9
80199d6: f000 fec3 bl 801a760 <memp_free>
return ERR_MEM;
80199da: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80199de: e000 b.n 80199e2 <tcpip_inpkt+0x6e>
}
return ERR_OK;
80199e0: 2300 movs r3, #0
#endif /* LWIP_TCPIP_CORE_LOCKING_INPUT */
}
80199e2: 4618 mov r0, r3
80199e4: 3718 adds r7, #24
80199e6: 46bd mov sp, r7
80199e8: bd80 pop {r7, pc}
80199ea: bf00 nop
80199ec: 24024450 .word 0x24024450
80199f0: 0802ebe4 .word 0x0802ebe4
80199f4: 0802ec5c .word 0x0802ec5c
80199f8: 0802ec34 .word 0x0802ec34
080199fc <tcpip_input>:
* NETIF_FLAG_ETHERNET flags)
* @param inp the network interface on which the packet was received
*/
err_t
tcpip_input(struct pbuf *p, struct netif *inp)
{
80199fc: b580 push {r7, lr}
80199fe: b082 sub sp, #8
8019a00: af00 add r7, sp, #0
8019a02: 6078 str r0, [r7, #4]
8019a04: 6039 str r1, [r7, #0]
#if LWIP_ETHERNET
if (inp->flags & (NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET)) {
8019a06: 683b ldr r3, [r7, #0]
8019a08: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8019a0c: f003 0318 and.w r3, r3, #24
8019a10: 2b00 cmp r3, #0
8019a12: d006 beq.n 8019a22 <tcpip_input+0x26>
return tcpip_inpkt(p, inp, ethernet_input);
8019a14: 4a08 ldr r2, [pc, #32] @ (8019a38 <tcpip_input+0x3c>)
8019a16: 6839 ldr r1, [r7, #0]
8019a18: 6878 ldr r0, [r7, #4]
8019a1a: f7ff ffab bl 8019974 <tcpip_inpkt>
8019a1e: 4603 mov r3, r0
8019a20: e005 b.n 8019a2e <tcpip_input+0x32>
} else
#endif /* LWIP_ETHERNET */
return tcpip_inpkt(p, inp, ip_input);
8019a22: 4a06 ldr r2, [pc, #24] @ (8019a3c <tcpip_input+0x40>)
8019a24: 6839 ldr r1, [r7, #0]
8019a26: 6878 ldr r0, [r7, #4]
8019a28: f7ff ffa4 bl 8019974 <tcpip_inpkt>
8019a2c: 4603 mov r3, r0
}
8019a2e: 4618 mov r0, r3
8019a30: 3708 adds r7, #8
8019a32: 46bd mov sp, r7
8019a34: bd80 pop {r7, pc}
8019a36: bf00 nop
8019a38: 0802701d .word 0x0802701d
8019a3c: 08025b45 .word 0x08025b45
08019a40 <tcpip_try_callback>:
*
* @see tcpip_callback
*/
err_t
tcpip_try_callback(tcpip_callback_fn function, void *ctx)
{
8019a40: b580 push {r7, lr}
8019a42: b084 sub sp, #16
8019a44: af00 add r7, sp, #0
8019a46: 6078 str r0, [r7, #4]
8019a48: 6039 str r1, [r7, #0]
struct tcpip_msg *msg;
LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
8019a4a: 4819 ldr r0, [pc, #100] @ (8019ab0 <tcpip_try_callback+0x70>)
8019a4c: f00d fc4e bl 80272ec <sys_mbox_valid>
8019a50: 4603 mov r3, r0
8019a52: 2b00 cmp r3, #0
8019a54: d106 bne.n 8019a64 <tcpip_try_callback+0x24>
8019a56: 4b17 ldr r3, [pc, #92] @ (8019ab4 <tcpip_try_callback+0x74>)
8019a58: f240 125d movw r2, #349 @ 0x15d
8019a5c: 4916 ldr r1, [pc, #88] @ (8019ab8 <tcpip_try_callback+0x78>)
8019a5e: 4817 ldr r0, [pc, #92] @ (8019abc <tcpip_try_callback+0x7c>)
8019a60: f010 ffe4 bl 802aa2c <iprintf>
msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API);
8019a64: 2008 movs r0, #8
8019a66: f000 fe05 bl 801a674 <memp_malloc>
8019a6a: 60f8 str r0, [r7, #12]
if (msg == NULL) {
8019a6c: 68fb ldr r3, [r7, #12]
8019a6e: 2b00 cmp r3, #0
8019a70: d102 bne.n 8019a78 <tcpip_try_callback+0x38>
return ERR_MEM;
8019a72: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8019a76: e017 b.n 8019aa8 <tcpip_try_callback+0x68>
}
msg->type = TCPIP_MSG_CALLBACK;
8019a78: 68fb ldr r3, [r7, #12]
8019a7a: 2201 movs r2, #1
8019a7c: 701a strb r2, [r3, #0]
msg->msg.cb.function = function;
8019a7e: 68fb ldr r3, [r7, #12]
8019a80: 687a ldr r2, [r7, #4]
8019a82: 605a str r2, [r3, #4]
msg->msg.cb.ctx = ctx;
8019a84: 68fb ldr r3, [r7, #12]
8019a86: 683a ldr r2, [r7, #0]
8019a88: 609a str r2, [r3, #8]
if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
8019a8a: 68f9 ldr r1, [r7, #12]
8019a8c: 4808 ldr r0, [pc, #32] @ (8019ab0 <tcpip_try_callback+0x70>)
8019a8e: f00d fbcb bl 8027228 <sys_mbox_trypost>
8019a92: 4603 mov r3, r0
8019a94: 2b00 cmp r3, #0
8019a96: d006 beq.n 8019aa6 <tcpip_try_callback+0x66>
memp_free(MEMP_TCPIP_MSG_API, msg);
8019a98: 68f9 ldr r1, [r7, #12]
8019a9a: 2008 movs r0, #8
8019a9c: f000 fe60 bl 801a760 <memp_free>
return ERR_MEM;
8019aa0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8019aa4: e000 b.n 8019aa8 <tcpip_try_callback+0x68>
}
return ERR_OK;
8019aa6: 2300 movs r3, #0
}
8019aa8: 4618 mov r0, r3
8019aaa: 3710 adds r7, #16
8019aac: 46bd mov sp, r7
8019aae: bd80 pop {r7, pc}
8019ab0: 24024450 .word 0x24024450
8019ab4: 0802ebe4 .word 0x0802ebe4
8019ab8: 0802ec5c .word 0x0802ec5c
8019abc: 0802ec34 .word 0x0802ec34
08019ac0 <tcpip_send_msg_wait_sem>:
* @param sem semaphore to wait on
* @return ERR_OK if the function was called, another err_t if not
*/
err_t
tcpip_send_msg_wait_sem(tcpip_callback_fn fn, void *apimsg, sys_sem_t *sem)
{
8019ac0: b580 push {r7, lr}
8019ac2: b084 sub sp, #16
8019ac4: af00 add r7, sp, #0
8019ac6: 60f8 str r0, [r7, #12]
8019ac8: 60b9 str r1, [r7, #8]
8019aca: 607a str r2, [r7, #4]
#if LWIP_TCPIP_CORE_LOCKING
LWIP_UNUSED_ARG(sem);
LOCK_TCPIP_CORE();
8019acc: f7f7 fb64 bl 8011198 <sys_lock_tcpip_core>
fn(apimsg);
8019ad0: 68fb ldr r3, [r7, #12]
8019ad2: 68b8 ldr r0, [r7, #8]
8019ad4: 4798 blx r3
UNLOCK_TCPIP_CORE();
8019ad6: f7f7 fb6f bl 80111b8 <sys_unlock_tcpip_core>
return ERR_OK;
8019ada: 2300 movs r3, #0
sys_mbox_post(&tcpip_mbox, &TCPIP_MSG_VAR_REF(msg));
sys_arch_sem_wait(sem, 0);
TCPIP_MSG_VAR_FREE(msg);
return ERR_OK;
#endif /* LWIP_TCPIP_CORE_LOCKING */
}
8019adc: 4618 mov r0, r3
8019ade: 3710 adds r7, #16
8019ae0: 46bd mov sp, r7
8019ae2: bd80 pop {r7, pc}
08019ae4 <tcpip_init>:
* @param initfunc a function to call when tcpip_thread is running and finished initializing
* @param arg argument to pass to initfunc
*/
void
tcpip_init(tcpip_init_done_fn initfunc, void *arg)
{
8019ae4: b580 push {r7, lr}
8019ae6: b084 sub sp, #16
8019ae8: af02 add r7, sp, #8
8019aea: 6078 str r0, [r7, #4]
8019aec: 6039 str r1, [r7, #0]
lwip_init();
8019aee: f000 f92d bl 8019d4c <lwip_init>
tcpip_init_done = initfunc;
8019af2: 4a17 ldr r2, [pc, #92] @ (8019b50 <tcpip_init+0x6c>)
8019af4: 687b ldr r3, [r7, #4]
8019af6: 6013 str r3, [r2, #0]
tcpip_init_done_arg = arg;
8019af8: 4a16 ldr r2, [pc, #88] @ (8019b54 <tcpip_init+0x70>)
8019afa: 683b ldr r3, [r7, #0]
8019afc: 6013 str r3, [r2, #0]
if (sys_mbox_new(&tcpip_mbox, TCPIP_MBOX_SIZE) != ERR_OK) {
8019afe: 2106 movs r1, #6
8019b00: 4815 ldr r0, [pc, #84] @ (8019b58 <tcpip_init+0x74>)
8019b02: f00d fb65 bl 80271d0 <sys_mbox_new>
8019b06: 4603 mov r3, r0
8019b08: 2b00 cmp r3, #0
8019b0a: d006 beq.n 8019b1a <tcpip_init+0x36>
LWIP_ASSERT("failed to create tcpip_thread mbox", 0);
8019b0c: 4b13 ldr r3, [pc, #76] @ (8019b5c <tcpip_init+0x78>)
8019b0e: f240 2261 movw r2, #609 @ 0x261
8019b12: 4913 ldr r1, [pc, #76] @ (8019b60 <tcpip_init+0x7c>)
8019b14: 4813 ldr r0, [pc, #76] @ (8019b64 <tcpip_init+0x80>)
8019b16: f010 ff89 bl 802aa2c <iprintf>
}
#if LWIP_TCPIP_CORE_LOCKING
if (sys_mutex_new(&lock_tcpip_core) != ERR_OK) {
8019b1a: 4813 ldr r0, [pc, #76] @ (8019b68 <tcpip_init+0x84>)
8019b1c: f00d fc9e bl 802745c <sys_mutex_new>
8019b20: 4603 mov r3, r0
8019b22: 2b00 cmp r3, #0
8019b24: d006 beq.n 8019b34 <tcpip_init+0x50>
LWIP_ASSERT("failed to create lock_tcpip_core", 0);
8019b26: 4b0d ldr r3, [pc, #52] @ (8019b5c <tcpip_init+0x78>)
8019b28: f240 2265 movw r2, #613 @ 0x265
8019b2c: 490f ldr r1, [pc, #60] @ (8019b6c <tcpip_init+0x88>)
8019b2e: 480d ldr r0, [pc, #52] @ (8019b64 <tcpip_init+0x80>)
8019b30: f010 ff7c bl 802aa2c <iprintf>
}
#endif /* LWIP_TCPIP_CORE_LOCKING */
sys_thread_new(TCPIP_THREAD_NAME, tcpip_thread, NULL, TCPIP_THREAD_STACKSIZE, TCPIP_THREAD_PRIO);
8019b34: 2330 movs r3, #48 @ 0x30
8019b36: 9300 str r3, [sp, #0]
8019b38: f44f 5380 mov.w r3, #4096 @ 0x1000
8019b3c: 2200 movs r2, #0
8019b3e: 490c ldr r1, [pc, #48] @ (8019b70 <tcpip_init+0x8c>)
8019b40: 480c ldr r0, [pc, #48] @ (8019b74 <tcpip_init+0x90>)
8019b42: f00d fcbd bl 80274c0 <sys_thread_new>
}
8019b46: bf00 nop
8019b48: 3708 adds r7, #8
8019b4a: 46bd mov sp, r7
8019b4c: bd80 pop {r7, pc}
8019b4e: bf00 nop
8019b50: 24024448 .word 0x24024448
8019b54: 2402444c .word 0x2402444c
8019b58: 24024450 .word 0x24024450
8019b5c: 0802ebe4 .word 0x0802ebe4
8019b60: 0802ec6c .word 0x0802ec6c
8019b64: 0802ec34 .word 0x0802ec34
8019b68: 24024454 .word 0x24024454
8019b6c: 0802ec90 .word 0x0802ec90
8019b70: 0801987d .word 0x0801987d
8019b74: 0802ecb4 .word 0x0802ecb4
08019b78 <lwip_htons>:
* @param n u16_t in host byte order
* @return n in network byte order
*/
u16_t
lwip_htons(u16_t n)
{
8019b78: b480 push {r7}
8019b7a: b083 sub sp, #12
8019b7c: af00 add r7, sp, #0
8019b7e: 4603 mov r3, r0
8019b80: 80fb strh r3, [r7, #6]
return PP_HTONS(n);
8019b82: 88fb ldrh r3, [r7, #6]
8019b84: 021b lsls r3, r3, #8
8019b86: b21a sxth r2, r3
8019b88: 88fb ldrh r3, [r7, #6]
8019b8a: 0a1b lsrs r3, r3, #8
8019b8c: b29b uxth r3, r3
8019b8e: b21b sxth r3, r3
8019b90: 4313 orrs r3, r2
8019b92: b21b sxth r3, r3
8019b94: b29b uxth r3, r3
}
8019b96: 4618 mov r0, r3
8019b98: 370c adds r7, #12
8019b9a: 46bd mov sp, r7
8019b9c: f85d 7b04 ldr.w r7, [sp], #4
8019ba0: 4770 bx lr
08019ba2 <lwip_htonl>:
* @param n u32_t in host byte order
* @return n in network byte order
*/
u32_t
lwip_htonl(u32_t n)
{
8019ba2: b480 push {r7}
8019ba4: b083 sub sp, #12
8019ba6: af00 add r7, sp, #0
8019ba8: 6078 str r0, [r7, #4]
return PP_HTONL(n);
8019baa: 687b ldr r3, [r7, #4]
8019bac: 061a lsls r2, r3, #24
8019bae: 687b ldr r3, [r7, #4]
8019bb0: 021b lsls r3, r3, #8
8019bb2: f403 037f and.w r3, r3, #16711680 @ 0xff0000
8019bb6: 431a orrs r2, r3
8019bb8: 687b ldr r3, [r7, #4]
8019bba: 0a1b lsrs r3, r3, #8
8019bbc: f403 437f and.w r3, r3, #65280 @ 0xff00
8019bc0: 431a orrs r2, r3
8019bc2: 687b ldr r3, [r7, #4]
8019bc4: 0e1b lsrs r3, r3, #24
8019bc6: 4313 orrs r3, r2
}
8019bc8: 4618 mov r0, r3
8019bca: 370c adds r7, #12
8019bcc: 46bd mov sp, r7
8019bce: f85d 7b04 ldr.w r7, [sp], #4
8019bd2: 4770 bx lr
08019bd4 <lwip_standard_chksum>:
* @param len length of data to be summed
* @return host order (!) lwip checksum (non-inverted Internet sum)
*/
u16_t
lwip_standard_chksum(const void *dataptr, int len)
{
8019bd4: b480 push {r7}
8019bd6: b089 sub sp, #36 @ 0x24
8019bd8: af00 add r7, sp, #0
8019bda: 6078 str r0, [r7, #4]
8019bdc: 6039 str r1, [r7, #0]
const u8_t *pb = (const u8_t *)dataptr;
8019bde: 687b ldr r3, [r7, #4]
8019be0: 61fb str r3, [r7, #28]
const u16_t *ps;
u16_t t = 0;
8019be2: 2300 movs r3, #0
8019be4: 81fb strh r3, [r7, #14]
u32_t sum = 0;
8019be6: 2300 movs r3, #0
8019be8: 617b str r3, [r7, #20]
int odd = ((mem_ptr_t)pb & 1);
8019bea: 69fb ldr r3, [r7, #28]
8019bec: f003 0301 and.w r3, r3, #1
8019bf0: 613b str r3, [r7, #16]
/* Get aligned to u16_t */
if (odd && len > 0) {
8019bf2: 693b ldr r3, [r7, #16]
8019bf4: 2b00 cmp r3, #0
8019bf6: d00d beq.n 8019c14 <lwip_standard_chksum+0x40>
8019bf8: 683b ldr r3, [r7, #0]
8019bfa: 2b00 cmp r3, #0
8019bfc: dd0a ble.n 8019c14 <lwip_standard_chksum+0x40>
((u8_t *)&t)[1] = *pb++;
8019bfe: 69fa ldr r2, [r7, #28]
8019c00: 1c53 adds r3, r2, #1
8019c02: 61fb str r3, [r7, #28]
8019c04: f107 030e add.w r3, r7, #14
8019c08: 3301 adds r3, #1
8019c0a: 7812 ldrb r2, [r2, #0]
8019c0c: 701a strb r2, [r3, #0]
len--;
8019c0e: 683b ldr r3, [r7, #0]
8019c10: 3b01 subs r3, #1
8019c12: 603b str r3, [r7, #0]
}
/* Add the bulk of the data */
ps = (const u16_t *)(const void *)pb;
8019c14: 69fb ldr r3, [r7, #28]
8019c16: 61bb str r3, [r7, #24]
while (len > 1) {
8019c18: e00a b.n 8019c30 <lwip_standard_chksum+0x5c>
sum += *ps++;
8019c1a: 69bb ldr r3, [r7, #24]
8019c1c: 1c9a adds r2, r3, #2
8019c1e: 61ba str r2, [r7, #24]
8019c20: 881b ldrh r3, [r3, #0]
8019c22: 461a mov r2, r3
8019c24: 697b ldr r3, [r7, #20]
8019c26: 4413 add r3, r2
8019c28: 617b str r3, [r7, #20]
len -= 2;
8019c2a: 683b ldr r3, [r7, #0]
8019c2c: 3b02 subs r3, #2
8019c2e: 603b str r3, [r7, #0]
while (len > 1) {
8019c30: 683b ldr r3, [r7, #0]
8019c32: 2b01 cmp r3, #1
8019c34: dcf1 bgt.n 8019c1a <lwip_standard_chksum+0x46>
}
/* Consume left-over byte, if any */
if (len > 0) {
8019c36: 683b ldr r3, [r7, #0]
8019c38: 2b00 cmp r3, #0
8019c3a: dd04 ble.n 8019c46 <lwip_standard_chksum+0x72>
((u8_t *)&t)[0] = *(const u8_t *)ps;
8019c3c: f107 030e add.w r3, r7, #14
8019c40: 69ba ldr r2, [r7, #24]
8019c42: 7812 ldrb r2, [r2, #0]
8019c44: 701a strb r2, [r3, #0]
}
/* Add end bytes */
sum += t;
8019c46: 89fb ldrh r3, [r7, #14]
8019c48: 461a mov r2, r3
8019c4a: 697b ldr r3, [r7, #20]
8019c4c: 4413 add r3, r2
8019c4e: 617b str r3, [r7, #20]
/* Fold 32-bit sum to 16 bits
calling this twice is probably faster than if statements... */
sum = FOLD_U32T(sum);
8019c50: 697b ldr r3, [r7, #20]
8019c52: 0c1a lsrs r2, r3, #16
8019c54: 697b ldr r3, [r7, #20]
8019c56: b29b uxth r3, r3
8019c58: 4413 add r3, r2
8019c5a: 617b str r3, [r7, #20]
sum = FOLD_U32T(sum);
8019c5c: 697b ldr r3, [r7, #20]
8019c5e: 0c1a lsrs r2, r3, #16
8019c60: 697b ldr r3, [r7, #20]
8019c62: b29b uxth r3, r3
8019c64: 4413 add r3, r2
8019c66: 617b str r3, [r7, #20]
/* Swap if alignment was odd */
if (odd) {
8019c68: 693b ldr r3, [r7, #16]
8019c6a: 2b00 cmp r3, #0
8019c6c: d007 beq.n 8019c7e <lwip_standard_chksum+0xaa>
sum = SWAP_BYTES_IN_WORD(sum);
8019c6e: 697b ldr r3, [r7, #20]
8019c70: 021b lsls r3, r3, #8
8019c72: b29a uxth r2, r3
8019c74: 697b ldr r3, [r7, #20]
8019c76: 0a1b lsrs r3, r3, #8
8019c78: b2db uxtb r3, r3
8019c7a: 4313 orrs r3, r2
8019c7c: 617b str r3, [r7, #20]
}
return (u16_t)sum;
8019c7e: 697b ldr r3, [r7, #20]
8019c80: b29b uxth r3, r3
}
8019c82: 4618 mov r0, r3
8019c84: 3724 adds r7, #36 @ 0x24
8019c86: 46bd mov sp, r7
8019c88: f85d 7b04 ldr.w r7, [sp], #4
8019c8c: 4770 bx lr
08019c8e <inet_chksum>:
* @return checksum (as u16_t) to be saved directly in the protocol header
*/
u16_t
inet_chksum(const void *dataptr, u16_t len)
{
8019c8e: b580 push {r7, lr}
8019c90: b082 sub sp, #8
8019c92: af00 add r7, sp, #0
8019c94: 6078 str r0, [r7, #4]
8019c96: 460b mov r3, r1
8019c98: 807b strh r3, [r7, #2]
return (u16_t)~(unsigned int)LWIP_CHKSUM(dataptr, len);
8019c9a: 887b ldrh r3, [r7, #2]
8019c9c: 4619 mov r1, r3
8019c9e: 6878 ldr r0, [r7, #4]
8019ca0: f7ff ff98 bl 8019bd4 <lwip_standard_chksum>
8019ca4: 4603 mov r3, r0
8019ca6: 43db mvns r3, r3
8019ca8: b29b uxth r3, r3
}
8019caa: 4618 mov r0, r3
8019cac: 3708 adds r7, #8
8019cae: 46bd mov sp, r7
8019cb0: bd80 pop {r7, pc}
08019cb2 <inet_chksum_pbuf>:
* @param p pbuf chain over that the checksum should be calculated
* @return checksum (as u16_t) to be saved directly in the protocol header
*/
u16_t
inet_chksum_pbuf(struct pbuf *p)
{
8019cb2: b580 push {r7, lr}
8019cb4: b086 sub sp, #24
8019cb6: af00 add r7, sp, #0
8019cb8: 6078 str r0, [r7, #4]
u32_t acc;
struct pbuf *q;
int swapped = 0;
8019cba: 2300 movs r3, #0
8019cbc: 60fb str r3, [r7, #12]
acc = 0;
8019cbe: 2300 movs r3, #0
8019cc0: 617b str r3, [r7, #20]
for (q = p; q != NULL; q = q->next) {
8019cc2: 687b ldr r3, [r7, #4]
8019cc4: 613b str r3, [r7, #16]
8019cc6: e02b b.n 8019d20 <inet_chksum_pbuf+0x6e>
acc += LWIP_CHKSUM(q->payload, q->len);
8019cc8: 693b ldr r3, [r7, #16]
8019cca: 685a ldr r2, [r3, #4]
8019ccc: 693b ldr r3, [r7, #16]
8019cce: 895b ldrh r3, [r3, #10]
8019cd0: 4619 mov r1, r3
8019cd2: 4610 mov r0, r2
8019cd4: f7ff ff7e bl 8019bd4 <lwip_standard_chksum>
8019cd8: 4603 mov r3, r0
8019cda: 461a mov r2, r3
8019cdc: 697b ldr r3, [r7, #20]
8019cde: 4413 add r3, r2
8019ce0: 617b str r3, [r7, #20]
acc = FOLD_U32T(acc);
8019ce2: 697b ldr r3, [r7, #20]
8019ce4: 0c1a lsrs r2, r3, #16
8019ce6: 697b ldr r3, [r7, #20]
8019ce8: b29b uxth r3, r3
8019cea: 4413 add r3, r2
8019cec: 617b str r3, [r7, #20]
if (q->len % 2 != 0) {
8019cee: 693b ldr r3, [r7, #16]
8019cf0: 895b ldrh r3, [r3, #10]
8019cf2: f003 0301 and.w r3, r3, #1
8019cf6: b29b uxth r3, r3
8019cf8: 2b00 cmp r3, #0
8019cfa: d00e beq.n 8019d1a <inet_chksum_pbuf+0x68>
swapped = !swapped;
8019cfc: 68fb ldr r3, [r7, #12]
8019cfe: 2b00 cmp r3, #0
8019d00: bf0c ite eq
8019d02: 2301 moveq r3, #1
8019d04: 2300 movne r3, #0
8019d06: b2db uxtb r3, r3
8019d08: 60fb str r3, [r7, #12]
acc = SWAP_BYTES_IN_WORD(acc);
8019d0a: 697b ldr r3, [r7, #20]
8019d0c: 021b lsls r3, r3, #8
8019d0e: b29a uxth r2, r3
8019d10: 697b ldr r3, [r7, #20]
8019d12: 0a1b lsrs r3, r3, #8
8019d14: b2db uxtb r3, r3
8019d16: 4313 orrs r3, r2
8019d18: 617b str r3, [r7, #20]
for (q = p; q != NULL; q = q->next) {
8019d1a: 693b ldr r3, [r7, #16]
8019d1c: 681b ldr r3, [r3, #0]
8019d1e: 613b str r3, [r7, #16]
8019d20: 693b ldr r3, [r7, #16]
8019d22: 2b00 cmp r3, #0
8019d24: d1d0 bne.n 8019cc8 <inet_chksum_pbuf+0x16>
}
}
if (swapped) {
8019d26: 68fb ldr r3, [r7, #12]
8019d28: 2b00 cmp r3, #0
8019d2a: d007 beq.n 8019d3c <inet_chksum_pbuf+0x8a>
acc = SWAP_BYTES_IN_WORD(acc);
8019d2c: 697b ldr r3, [r7, #20]
8019d2e: 021b lsls r3, r3, #8
8019d30: b29a uxth r2, r3
8019d32: 697b ldr r3, [r7, #20]
8019d34: 0a1b lsrs r3, r3, #8
8019d36: b2db uxtb r3, r3
8019d38: 4313 orrs r3, r2
8019d3a: 617b str r3, [r7, #20]
}
return (u16_t)~(acc & 0xffffUL);
8019d3c: 697b ldr r3, [r7, #20]
8019d3e: b29b uxth r3, r3
8019d40: 43db mvns r3, r3
8019d42: b29b uxth r3, r3
}
8019d44: 4618 mov r0, r3
8019d46: 3718 adds r7, #24
8019d48: 46bd mov sp, r7
8019d4a: bd80 pop {r7, pc}
08019d4c <lwip_init>:
* Initialize all modules.
* Use this in NO_SYS mode. Use tcpip_init() otherwise.
*/
void
lwip_init(void)
{
8019d4c: b580 push {r7, lr}
8019d4e: b082 sub sp, #8
8019d50: af00 add r7, sp, #0
#ifndef LWIP_SKIP_CONST_CHECK
int a = 0;
8019d52: 2300 movs r3, #0
8019d54: 607b str r3, [r7, #4]
#endif
/* Modules initialization */
stats_init();
#if !NO_SYS
sys_init();
8019d56: f00d fb75 bl 8027444 <sys_init>
#endif /* !NO_SYS */
mem_init();
8019d5a: f000 f8d3 bl 8019f04 <mem_init>
memp_init();
8019d5e: f000 fc1b bl 801a598 <memp_init>
pbuf_init();
netif_init();
8019d62: f000 fd27 bl 801a7b4 <netif_init>
#endif /* LWIP_IPV4 */
#if LWIP_RAW
raw_init();
#endif /* LWIP_RAW */
#if LWIP_UDP
udp_init();
8019d66: f008 f8db bl 8021f20 <udp_init>
#endif /* LWIP_UDP */
#if LWIP_TCP
tcp_init();
8019d6a: f001 fe91 bl 801ba90 <tcp_init>
#if PPP_SUPPORT
ppp_init();
#endif
#if LWIP_TIMERS
sys_timeouts_init();
8019d6e: f008 f817 bl 8021da0 <sys_timeouts_init>
#endif /* LWIP_TIMERS */
}
8019d72: bf00 nop
8019d74: 3708 adds r7, #8
8019d76: 46bd mov sp, r7
8019d78: bd80 pop {r7, pc}
...
08019d7c <ptr_to_mem>:
#define mem_overflow_check_element(mem)
#endif /* MEM_OVERFLOW_CHECK */
static struct mem *
ptr_to_mem(mem_size_t ptr)
{
8019d7c: b480 push {r7}
8019d7e: b083 sub sp, #12
8019d80: af00 add r7, sp, #0
8019d82: 6078 str r0, [r7, #4]
return (struct mem *)(void *)&ram[ptr];
8019d84: 4b04 ldr r3, [pc, #16] @ (8019d98 <ptr_to_mem+0x1c>)
8019d86: 681a ldr r2, [r3, #0]
8019d88: 687b ldr r3, [r7, #4]
8019d8a: 4413 add r3, r2
}
8019d8c: 4618 mov r0, r3
8019d8e: 370c adds r7, #12
8019d90: 46bd mov sp, r7
8019d92: f85d 7b04 ldr.w r7, [sp], #4
8019d96: 4770 bx lr
8019d98: 24024470 .word 0x24024470
08019d9c <mem_to_ptr>:
static mem_size_t
mem_to_ptr(void *mem)
{
8019d9c: b480 push {r7}
8019d9e: b083 sub sp, #12
8019da0: af00 add r7, sp, #0
8019da2: 6078 str r0, [r7, #4]
return (mem_size_t)((u8_t *)mem - ram);
8019da4: 4b04 ldr r3, [pc, #16] @ (8019db8 <mem_to_ptr+0x1c>)
8019da6: 681b ldr r3, [r3, #0]
8019da8: 687a ldr r2, [r7, #4]
8019daa: 1ad3 subs r3, r2, r3
}
8019dac: 4618 mov r0, r3
8019dae: 370c adds r7, #12
8019db0: 46bd mov sp, r7
8019db2: f85d 7b04 ldr.w r7, [sp], #4
8019db6: 4770 bx lr
8019db8: 24024470 .word 0x24024470
08019dbc <plug_holes>:
* This assumes access to the heap is protected by the calling function
* already.
*/
static void
plug_holes(struct mem *mem)
{
8019dbc: b590 push {r4, r7, lr}
8019dbe: b085 sub sp, #20
8019dc0: af00 add r7, sp, #0
8019dc2: 6078 str r0, [r7, #4]
struct mem *nmem;
struct mem *pmem;
LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram);
8019dc4: 4b45 ldr r3, [pc, #276] @ (8019edc <plug_holes+0x120>)
8019dc6: 681b ldr r3, [r3, #0]
8019dc8: 687a ldr r2, [r7, #4]
8019dca: 429a cmp r2, r3
8019dcc: d206 bcs.n 8019ddc <plug_holes+0x20>
8019dce: 4b44 ldr r3, [pc, #272] @ (8019ee0 <plug_holes+0x124>)
8019dd0: f240 12df movw r2, #479 @ 0x1df
8019dd4: 4943 ldr r1, [pc, #268] @ (8019ee4 <plug_holes+0x128>)
8019dd6: 4844 ldr r0, [pc, #272] @ (8019ee8 <plug_holes+0x12c>)
8019dd8: f010 fe28 bl 802aa2c <iprintf>
LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end);
8019ddc: 4b43 ldr r3, [pc, #268] @ (8019eec <plug_holes+0x130>)
8019dde: 681b ldr r3, [r3, #0]
8019de0: 687a ldr r2, [r7, #4]
8019de2: 429a cmp r2, r3
8019de4: d306 bcc.n 8019df4 <plug_holes+0x38>
8019de6: 4b3e ldr r3, [pc, #248] @ (8019ee0 <plug_holes+0x124>)
8019de8: f44f 72f0 mov.w r2, #480 @ 0x1e0
8019dec: 4940 ldr r1, [pc, #256] @ (8019ef0 <plug_holes+0x134>)
8019dee: 483e ldr r0, [pc, #248] @ (8019ee8 <plug_holes+0x12c>)
8019df0: f010 fe1c bl 802aa2c <iprintf>
LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0);
8019df4: 687b ldr r3, [r7, #4]
8019df6: 7a1b ldrb r3, [r3, #8]
8019df8: 2b00 cmp r3, #0
8019dfa: d006 beq.n 8019e0a <plug_holes+0x4e>
8019dfc: 4b38 ldr r3, [pc, #224] @ (8019ee0 <plug_holes+0x124>)
8019dfe: f240 12e1 movw r2, #481 @ 0x1e1
8019e02: 493c ldr r1, [pc, #240] @ (8019ef4 <plug_holes+0x138>)
8019e04: 4838 ldr r0, [pc, #224] @ (8019ee8 <plug_holes+0x12c>)
8019e06: f010 fe11 bl 802aa2c <iprintf>
/* plug hole forward */
LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED);
8019e0a: 687b ldr r3, [r7, #4]
8019e0c: 681b ldr r3, [r3, #0]
8019e0e: 4a3a ldr r2, [pc, #232] @ (8019ef8 <plug_holes+0x13c>)
8019e10: 4293 cmp r3, r2
8019e12: d906 bls.n 8019e22 <plug_holes+0x66>
8019e14: 4b32 ldr r3, [pc, #200] @ (8019ee0 <plug_holes+0x124>)
8019e16: f44f 72f2 mov.w r2, #484 @ 0x1e4
8019e1a: 4938 ldr r1, [pc, #224] @ (8019efc <plug_holes+0x140>)
8019e1c: 4832 ldr r0, [pc, #200] @ (8019ee8 <plug_holes+0x12c>)
8019e1e: f010 fe05 bl 802aa2c <iprintf>
nmem = ptr_to_mem(mem->next);
8019e22: 687b ldr r3, [r7, #4]
8019e24: 681b ldr r3, [r3, #0]
8019e26: 4618 mov r0, r3
8019e28: f7ff ffa8 bl 8019d7c <ptr_to_mem>
8019e2c: 60f8 str r0, [r7, #12]
if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) {
8019e2e: 687a ldr r2, [r7, #4]
8019e30: 68fb ldr r3, [r7, #12]
8019e32: 429a cmp r2, r3
8019e34: d024 beq.n 8019e80 <plug_holes+0xc4>
8019e36: 68fb ldr r3, [r7, #12]
8019e38: 7a1b ldrb r3, [r3, #8]
8019e3a: 2b00 cmp r3, #0
8019e3c: d120 bne.n 8019e80 <plug_holes+0xc4>
8019e3e: 4b2b ldr r3, [pc, #172] @ (8019eec <plug_holes+0x130>)
8019e40: 681b ldr r3, [r3, #0]
8019e42: 68fa ldr r2, [r7, #12]
8019e44: 429a cmp r2, r3
8019e46: d01b beq.n 8019e80 <plug_holes+0xc4>
/* if mem->next is unused and not end of ram, combine mem and mem->next */
if (lfree == nmem) {
8019e48: 4b2d ldr r3, [pc, #180] @ (8019f00 <plug_holes+0x144>)
8019e4a: 681b ldr r3, [r3, #0]
8019e4c: 68fa ldr r2, [r7, #12]
8019e4e: 429a cmp r2, r3
8019e50: d102 bne.n 8019e58 <plug_holes+0x9c>
lfree = mem;
8019e52: 4a2b ldr r2, [pc, #172] @ (8019f00 <plug_holes+0x144>)
8019e54: 687b ldr r3, [r7, #4]
8019e56: 6013 str r3, [r2, #0]
}
mem->next = nmem->next;
8019e58: 68fb ldr r3, [r7, #12]
8019e5a: 681a ldr r2, [r3, #0]
8019e5c: 687b ldr r3, [r7, #4]
8019e5e: 601a str r2, [r3, #0]
if (nmem->next != MEM_SIZE_ALIGNED) {
8019e60: 68fb ldr r3, [r7, #12]
8019e62: 681b ldr r3, [r3, #0]
8019e64: 4a24 ldr r2, [pc, #144] @ (8019ef8 <plug_holes+0x13c>)
8019e66: 4293 cmp r3, r2
8019e68: d00a beq.n 8019e80 <plug_holes+0xc4>
ptr_to_mem(nmem->next)->prev = mem_to_ptr(mem);
8019e6a: 68fb ldr r3, [r7, #12]
8019e6c: 681b ldr r3, [r3, #0]
8019e6e: 4618 mov r0, r3
8019e70: f7ff ff84 bl 8019d7c <ptr_to_mem>
8019e74: 4604 mov r4, r0
8019e76: 6878 ldr r0, [r7, #4]
8019e78: f7ff ff90 bl 8019d9c <mem_to_ptr>
8019e7c: 4603 mov r3, r0
8019e7e: 6063 str r3, [r4, #4]
}
}
/* plug hole backward */
pmem = ptr_to_mem(mem->prev);
8019e80: 687b ldr r3, [r7, #4]
8019e82: 685b ldr r3, [r3, #4]
8019e84: 4618 mov r0, r3
8019e86: f7ff ff79 bl 8019d7c <ptr_to_mem>
8019e8a: 60b8 str r0, [r7, #8]
if (pmem != mem && pmem->used == 0) {
8019e8c: 68ba ldr r2, [r7, #8]
8019e8e: 687b ldr r3, [r7, #4]
8019e90: 429a cmp r2, r3
8019e92: d01f beq.n 8019ed4 <plug_holes+0x118>
8019e94: 68bb ldr r3, [r7, #8]
8019e96: 7a1b ldrb r3, [r3, #8]
8019e98: 2b00 cmp r3, #0
8019e9a: d11b bne.n 8019ed4 <plug_holes+0x118>
/* if mem->prev is unused, combine mem and mem->prev */
if (lfree == mem) {
8019e9c: 4b18 ldr r3, [pc, #96] @ (8019f00 <plug_holes+0x144>)
8019e9e: 681b ldr r3, [r3, #0]
8019ea0: 687a ldr r2, [r7, #4]
8019ea2: 429a cmp r2, r3
8019ea4: d102 bne.n 8019eac <plug_holes+0xf0>
lfree = pmem;
8019ea6: 4a16 ldr r2, [pc, #88] @ (8019f00 <plug_holes+0x144>)
8019ea8: 68bb ldr r3, [r7, #8]
8019eaa: 6013 str r3, [r2, #0]
}
pmem->next = mem->next;
8019eac: 687b ldr r3, [r7, #4]
8019eae: 681a ldr r2, [r3, #0]
8019eb0: 68bb ldr r3, [r7, #8]
8019eb2: 601a str r2, [r3, #0]
if (mem->next != MEM_SIZE_ALIGNED) {
8019eb4: 687b ldr r3, [r7, #4]
8019eb6: 681b ldr r3, [r3, #0]
8019eb8: 4a0f ldr r2, [pc, #60] @ (8019ef8 <plug_holes+0x13c>)
8019eba: 4293 cmp r3, r2
8019ebc: d00a beq.n 8019ed4 <plug_holes+0x118>
ptr_to_mem(mem->next)->prev = mem_to_ptr(pmem);
8019ebe: 687b ldr r3, [r7, #4]
8019ec0: 681b ldr r3, [r3, #0]
8019ec2: 4618 mov r0, r3
8019ec4: f7ff ff5a bl 8019d7c <ptr_to_mem>
8019ec8: 4604 mov r4, r0
8019eca: 68b8 ldr r0, [r7, #8]
8019ecc: f7ff ff66 bl 8019d9c <mem_to_ptr>
8019ed0: 4603 mov r3, r0
8019ed2: 6063 str r3, [r4, #4]
}
}
}
8019ed4: bf00 nop
8019ed6: 3714 adds r7, #20
8019ed8: 46bd mov sp, r7
8019eda: bd90 pop {r4, r7, pc}
8019edc: 24024470 .word 0x24024470
8019ee0: 0802ecc4 .word 0x0802ecc4
8019ee4: 0802ecf4 .word 0x0802ecf4
8019ee8: 0802ed0c .word 0x0802ed0c
8019eec: 24024474 .word 0x24024474
8019ef0: 0802ed34 .word 0x0802ed34
8019ef4: 0802ed50 .word 0x0802ed50
8019ef8: 0001ffe8 .word 0x0001ffe8
8019efc: 0802ed6c .word 0x0802ed6c
8019f00: 2402447c .word 0x2402447c
08019f04 <mem_init>:
/**
* Zero the heap and initialize start, end and lowest-free
*/
void
mem_init(void)
{
8019f04: b580 push {r7, lr}
8019f06: b082 sub sp, #8
8019f08: af00 add r7, sp, #0
LWIP_ASSERT("Sanity check alignment",
(SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT - 1)) == 0);
/* align the heap */
ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER);
8019f0a: 4b1b ldr r3, [pc, #108] @ (8019f78 <mem_init+0x74>)
8019f0c: 4a1b ldr r2, [pc, #108] @ (8019f7c <mem_init+0x78>)
8019f0e: 601a str r2, [r3, #0]
/* initialize the start of the heap */
mem = (struct mem *)(void *)ram;
8019f10: 4b19 ldr r3, [pc, #100] @ (8019f78 <mem_init+0x74>)
8019f12: 681b ldr r3, [r3, #0]
8019f14: 607b str r3, [r7, #4]
mem->next = MEM_SIZE_ALIGNED;
8019f16: 687b ldr r3, [r7, #4]
8019f18: 4a19 ldr r2, [pc, #100] @ (8019f80 <mem_init+0x7c>)
8019f1a: 601a str r2, [r3, #0]
mem->prev = 0;
8019f1c: 687b ldr r3, [r7, #4]
8019f1e: 2200 movs r2, #0
8019f20: 605a str r2, [r3, #4]
mem->used = 0;
8019f22: 687b ldr r3, [r7, #4]
8019f24: 2200 movs r2, #0
8019f26: 721a strb r2, [r3, #8]
/* initialize the end of the heap */
ram_end = ptr_to_mem(MEM_SIZE_ALIGNED);
8019f28: 4815 ldr r0, [pc, #84] @ (8019f80 <mem_init+0x7c>)
8019f2a: f7ff ff27 bl 8019d7c <ptr_to_mem>
8019f2e: 4603 mov r3, r0
8019f30: 4a14 ldr r2, [pc, #80] @ (8019f84 <mem_init+0x80>)
8019f32: 6013 str r3, [r2, #0]
ram_end->used = 1;
8019f34: 4b13 ldr r3, [pc, #76] @ (8019f84 <mem_init+0x80>)
8019f36: 681b ldr r3, [r3, #0]
8019f38: 2201 movs r2, #1
8019f3a: 721a strb r2, [r3, #8]
ram_end->next = MEM_SIZE_ALIGNED;
8019f3c: 4b11 ldr r3, [pc, #68] @ (8019f84 <mem_init+0x80>)
8019f3e: 681b ldr r3, [r3, #0]
8019f40: 4a0f ldr r2, [pc, #60] @ (8019f80 <mem_init+0x7c>)
8019f42: 601a str r2, [r3, #0]
ram_end->prev = MEM_SIZE_ALIGNED;
8019f44: 4b0f ldr r3, [pc, #60] @ (8019f84 <mem_init+0x80>)
8019f46: 681b ldr r3, [r3, #0]
8019f48: 4a0d ldr r2, [pc, #52] @ (8019f80 <mem_init+0x7c>)
8019f4a: 605a str r2, [r3, #4]
MEM_SANITY();
/* initialize the lowest-free pointer to the start of the heap */
lfree = (struct mem *)(void *)ram;
8019f4c: 4b0a ldr r3, [pc, #40] @ (8019f78 <mem_init+0x74>)
8019f4e: 681b ldr r3, [r3, #0]
8019f50: 4a0d ldr r2, [pc, #52] @ (8019f88 <mem_init+0x84>)
8019f52: 6013 str r3, [r2, #0]
MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED);
if (sys_mutex_new(&mem_mutex) != ERR_OK) {
8019f54: 480d ldr r0, [pc, #52] @ (8019f8c <mem_init+0x88>)
8019f56: f00d fa81 bl 802745c <sys_mutex_new>
8019f5a: 4603 mov r3, r0
8019f5c: 2b00 cmp r3, #0
8019f5e: d006 beq.n 8019f6e <mem_init+0x6a>
LWIP_ASSERT("failed to create mem_mutex", 0);
8019f60: 4b0b ldr r3, [pc, #44] @ (8019f90 <mem_init+0x8c>)
8019f62: f240 221f movw r2, #543 @ 0x21f
8019f66: 490b ldr r1, [pc, #44] @ (8019f94 <mem_init+0x90>)
8019f68: 480b ldr r0, [pc, #44] @ (8019f98 <mem_init+0x94>)
8019f6a: f010 fd5f bl 802aa2c <iprintf>
}
}
8019f6e: bf00 nop
8019f70: 3708 adds r7, #8
8019f72: 46bd mov sp, r7
8019f74: bd80 pop {r7, pc}
8019f76: bf00 nop
8019f78: 24024470 .word 0x24024470
8019f7c: 24020000 .word 0x24020000
8019f80: 0001ffe8 .word 0x0001ffe8
8019f84: 24024474 .word 0x24024474
8019f88: 2402447c .word 0x2402447c
8019f8c: 24024478 .word 0x24024478
8019f90: 0802ecc4 .word 0x0802ecc4
8019f94: 0802ed98 .word 0x0802ed98
8019f98: 0802ed0c .word 0x0802ed0c
08019f9c <mem_link_valid>:
/* Check if a struct mem is correctly linked.
* If not, double-free is a possible reason.
*/
static int
mem_link_valid(struct mem *mem)
{
8019f9c: b580 push {r7, lr}
8019f9e: b086 sub sp, #24
8019fa0: af00 add r7, sp, #0
8019fa2: 6078 str r0, [r7, #4]
struct mem *nmem, *pmem;
mem_size_t rmem_idx;
rmem_idx = mem_to_ptr(mem);
8019fa4: 6878 ldr r0, [r7, #4]
8019fa6: f7ff fef9 bl 8019d9c <mem_to_ptr>
8019faa: 6178 str r0, [r7, #20]
nmem = ptr_to_mem(mem->next);
8019fac: 687b ldr r3, [r7, #4]
8019fae: 681b ldr r3, [r3, #0]
8019fb0: 4618 mov r0, r3
8019fb2: f7ff fee3 bl 8019d7c <ptr_to_mem>
8019fb6: 6138 str r0, [r7, #16]
pmem = ptr_to_mem(mem->prev);
8019fb8: 687b ldr r3, [r7, #4]
8019fba: 685b ldr r3, [r3, #4]
8019fbc: 4618 mov r0, r3
8019fbe: f7ff fedd bl 8019d7c <ptr_to_mem>
8019fc2: 60f8 str r0, [r7, #12]
if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
8019fc4: 687b ldr r3, [r7, #4]
8019fc6: 681b ldr r3, [r3, #0]
8019fc8: 4a11 ldr r2, [pc, #68] @ (801a010 <mem_link_valid+0x74>)
8019fca: 4293 cmp r3, r2
8019fcc: d818 bhi.n 801a000 <mem_link_valid+0x64>
8019fce: 687b ldr r3, [r7, #4]
8019fd0: 685b ldr r3, [r3, #4]
8019fd2: 4a0f ldr r2, [pc, #60] @ (801a010 <mem_link_valid+0x74>)
8019fd4: 4293 cmp r3, r2
8019fd6: d813 bhi.n 801a000 <mem_link_valid+0x64>
((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
8019fd8: 687b ldr r3, [r7, #4]
8019fda: 685b ldr r3, [r3, #4]
if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
8019fdc: 697a ldr r2, [r7, #20]
8019fde: 429a cmp r2, r3
8019fe0: d004 beq.n 8019fec <mem_link_valid+0x50>
((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
8019fe2: 68fb ldr r3, [r7, #12]
8019fe4: 681b ldr r3, [r3, #0]
8019fe6: 697a ldr r2, [r7, #20]
8019fe8: 429a cmp r2, r3
8019fea: d109 bne.n 801a000 <mem_link_valid+0x64>
((nmem != ram_end) && (nmem->prev != rmem_idx))) {
8019fec: 4b09 ldr r3, [pc, #36] @ (801a014 <mem_link_valid+0x78>)
8019fee: 681b ldr r3, [r3, #0]
((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
8019ff0: 693a ldr r2, [r7, #16]
8019ff2: 429a cmp r2, r3
8019ff4: d006 beq.n 801a004 <mem_link_valid+0x68>
((nmem != ram_end) && (nmem->prev != rmem_idx))) {
8019ff6: 693b ldr r3, [r7, #16]
8019ff8: 685b ldr r3, [r3, #4]
8019ffa: 697a ldr r2, [r7, #20]
8019ffc: 429a cmp r2, r3
8019ffe: d001 beq.n 801a004 <mem_link_valid+0x68>
return 0;
801a000: 2300 movs r3, #0
801a002: e000 b.n 801a006 <mem_link_valid+0x6a>
}
return 1;
801a004: 2301 movs r3, #1
}
801a006: 4618 mov r0, r3
801a008: 3718 adds r7, #24
801a00a: 46bd mov sp, r7
801a00c: bd80 pop {r7, pc}
801a00e: bf00 nop
801a010: 0001ffe8 .word 0x0001ffe8
801a014: 24024474 .word 0x24024474
0801a018 <mem_free>:
* @param rmem is the data portion of a struct mem as returned by a previous
* call to mem_malloc()
*/
void
mem_free(void *rmem)
{
801a018: b580 push {r7, lr}
801a01a: b088 sub sp, #32
801a01c: af00 add r7, sp, #0
801a01e: 6078 str r0, [r7, #4]
struct mem *mem;
LWIP_MEM_FREE_DECL_PROTECT();
if (rmem == NULL) {
801a020: 687b ldr r3, [r7, #4]
801a022: 2b00 cmp r3, #0
801a024: d070 beq.n 801a108 <mem_free+0xf0>
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n"));
return;
}
if ((((mem_ptr_t)rmem) & (MEM_ALIGNMENT - 1)) != 0) {
801a026: 687b ldr r3, [r7, #4]
801a028: f003 0303 and.w r3, r3, #3
801a02c: 2b00 cmp r3, #0
801a02e: d00d beq.n 801a04c <mem_free+0x34>
LWIP_MEM_ILLEGAL_FREE("mem_free: sanity check alignment");
801a030: 4b37 ldr r3, [pc, #220] @ (801a110 <mem_free+0xf8>)
801a032: f240 2273 movw r2, #627 @ 0x273
801a036: 4937 ldr r1, [pc, #220] @ (801a114 <mem_free+0xfc>)
801a038: 4837 ldr r0, [pc, #220] @ (801a118 <mem_free+0x100>)
801a03a: f010 fcf7 bl 802aa2c <iprintf>
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: sanity check alignment\n"));
/* protect mem stats from concurrent access */
MEM_STATS_INC_LOCKED(illegal);
801a03e: f00d fa5f bl 8027500 <sys_arch_protect>
801a042: 60f8 str r0, [r7, #12]
801a044: 68f8 ldr r0, [r7, #12]
801a046: f00d fa69 bl 802751c <sys_arch_unprotect>
return;
801a04a: e05e b.n 801a10a <mem_free+0xf2>
}
/* Get the corresponding struct mem: */
/* cast through void* to get rid of alignment warnings */
mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
801a04c: 687b ldr r3, [r7, #4]
801a04e: 3b0c subs r3, #12
801a050: 61fb str r3, [r7, #28]
if ((u8_t *)mem < ram || (u8_t *)rmem + MIN_SIZE_ALIGNED > (u8_t *)ram_end) {
801a052: 4b32 ldr r3, [pc, #200] @ (801a11c <mem_free+0x104>)
801a054: 681b ldr r3, [r3, #0]
801a056: 69fa ldr r2, [r7, #28]
801a058: 429a cmp r2, r3
801a05a: d306 bcc.n 801a06a <mem_free+0x52>
801a05c: 687b ldr r3, [r7, #4]
801a05e: f103 020c add.w r2, r3, #12
801a062: 4b2f ldr r3, [pc, #188] @ (801a120 <mem_free+0x108>)
801a064: 681b ldr r3, [r3, #0]
801a066: 429a cmp r2, r3
801a068: d90d bls.n 801a086 <mem_free+0x6e>
LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory");
801a06a: 4b29 ldr r3, [pc, #164] @ (801a110 <mem_free+0xf8>)
801a06c: f240 227f movw r2, #639 @ 0x27f
801a070: 492c ldr r1, [pc, #176] @ (801a124 <mem_free+0x10c>)
801a072: 4829 ldr r0, [pc, #164] @ (801a118 <mem_free+0x100>)
801a074: f010 fcda bl 802aa2c <iprintf>
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n"));
/* protect mem stats from concurrent access */
MEM_STATS_INC_LOCKED(illegal);
801a078: f00d fa42 bl 8027500 <sys_arch_protect>
801a07c: 6138 str r0, [r7, #16]
801a07e: 6938 ldr r0, [r7, #16]
801a080: f00d fa4c bl 802751c <sys_arch_unprotect>
return;
801a084: e041 b.n 801a10a <mem_free+0xf2>
}
#if MEM_OVERFLOW_CHECK
mem_overflow_check_element(mem);
#endif
/* protect the heap from concurrent access */
LWIP_MEM_FREE_PROTECT();
801a086: 4828 ldr r0, [pc, #160] @ (801a128 <mem_free+0x110>)
801a088: f00d f9fe bl 8027488 <sys_mutex_lock>
/* mem has to be in a used state */
if (!mem->used) {
801a08c: 69fb ldr r3, [r7, #28]
801a08e: 7a1b ldrb r3, [r3, #8]
801a090: 2b00 cmp r3, #0
801a092: d110 bne.n 801a0b6 <mem_free+0x9e>
LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: double free");
801a094: 4b1e ldr r3, [pc, #120] @ (801a110 <mem_free+0xf8>)
801a096: f44f 7223 mov.w r2, #652 @ 0x28c
801a09a: 4924 ldr r1, [pc, #144] @ (801a12c <mem_free+0x114>)
801a09c: 481e ldr r0, [pc, #120] @ (801a118 <mem_free+0x100>)
801a09e: f010 fcc5 bl 802aa2c <iprintf>
LWIP_MEM_FREE_UNPROTECT();
801a0a2: 4821 ldr r0, [pc, #132] @ (801a128 <mem_free+0x110>)
801a0a4: f00d f9ff bl 80274a6 <sys_mutex_unlock>
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: double free?\n"));
/* protect mem stats from concurrent access */
MEM_STATS_INC_LOCKED(illegal);
801a0a8: f00d fa2a bl 8027500 <sys_arch_protect>
801a0ac: 6178 str r0, [r7, #20]
801a0ae: 6978 ldr r0, [r7, #20]
801a0b0: f00d fa34 bl 802751c <sys_arch_unprotect>
return;
801a0b4: e029 b.n 801a10a <mem_free+0xf2>
}
if (!mem_link_valid(mem)) {
801a0b6: 69f8 ldr r0, [r7, #28]
801a0b8: f7ff ff70 bl 8019f9c <mem_link_valid>
801a0bc: 4603 mov r3, r0
801a0be: 2b00 cmp r3, #0
801a0c0: d110 bne.n 801a0e4 <mem_free+0xcc>
LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: non-linked: double free");
801a0c2: 4b13 ldr r3, [pc, #76] @ (801a110 <mem_free+0xf8>)
801a0c4: f240 2295 movw r2, #661 @ 0x295
801a0c8: 4919 ldr r1, [pc, #100] @ (801a130 <mem_free+0x118>)
801a0ca: 4813 ldr r0, [pc, #76] @ (801a118 <mem_free+0x100>)
801a0cc: f010 fcae bl 802aa2c <iprintf>
LWIP_MEM_FREE_UNPROTECT();
801a0d0: 4815 ldr r0, [pc, #84] @ (801a128 <mem_free+0x110>)
801a0d2: f00d f9e8 bl 80274a6 <sys_mutex_unlock>
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: non-linked: double free?\n"));
/* protect mem stats from concurrent access */
MEM_STATS_INC_LOCKED(illegal);
801a0d6: f00d fa13 bl 8027500 <sys_arch_protect>
801a0da: 61b8 str r0, [r7, #24]
801a0dc: 69b8 ldr r0, [r7, #24]
801a0de: f00d fa1d bl 802751c <sys_arch_unprotect>
return;
801a0e2: e012 b.n 801a10a <mem_free+0xf2>
}
/* mem is now unused. */
mem->used = 0;
801a0e4: 69fb ldr r3, [r7, #28]
801a0e6: 2200 movs r2, #0
801a0e8: 721a strb r2, [r3, #8]
if (mem < lfree) {
801a0ea: 4b12 ldr r3, [pc, #72] @ (801a134 <mem_free+0x11c>)
801a0ec: 681b ldr r3, [r3, #0]
801a0ee: 69fa ldr r2, [r7, #28]
801a0f0: 429a cmp r2, r3
801a0f2: d202 bcs.n 801a0fa <mem_free+0xe2>
/* the newly freed struct is now the lowest */
lfree = mem;
801a0f4: 4a0f ldr r2, [pc, #60] @ (801a134 <mem_free+0x11c>)
801a0f6: 69fb ldr r3, [r7, #28]
801a0f8: 6013 str r3, [r2, #0]
}
MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram)));
/* finally, see if prev or next are free also */
plug_holes(mem);
801a0fa: 69f8 ldr r0, [r7, #28]
801a0fc: f7ff fe5e bl 8019dbc <plug_holes>
MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
LWIP_MEM_FREE_UNPROTECT();
801a100: 4809 ldr r0, [pc, #36] @ (801a128 <mem_free+0x110>)
801a102: f00d f9d0 bl 80274a6 <sys_mutex_unlock>
801a106: e000 b.n 801a10a <mem_free+0xf2>
return;
801a108: bf00 nop
}
801a10a: 3720 adds r7, #32
801a10c: 46bd mov sp, r7
801a10e: bd80 pop {r7, pc}
801a110: 0802ecc4 .word 0x0802ecc4
801a114: 0802edb4 .word 0x0802edb4
801a118: 0802ed0c .word 0x0802ed0c
801a11c: 24024470 .word 0x24024470
801a120: 24024474 .word 0x24024474
801a124: 0802edd8 .word 0x0802edd8
801a128: 24024478 .word 0x24024478
801a12c: 0802edf4 .word 0x0802edf4
801a130: 0802ee1c .word 0x0802ee1c
801a134: 2402447c .word 0x2402447c
0801a138 <mem_trim>:
* or NULL if newsize is > old size, in which case rmem is NOT touched
* or freed!
*/
void *
mem_trim(void *rmem, mem_size_t new_size)
{
801a138: b580 push {r7, lr}
801a13a: b08a sub sp, #40 @ 0x28
801a13c: af00 add r7, sp, #0
801a13e: 6078 str r0, [r7, #4]
801a140: 6039 str r1, [r7, #0]
/* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */
LWIP_MEM_FREE_DECL_PROTECT();
/* Expand the size of the allocated memory region so that we can
adjust for alignment. */
newsize = (mem_size_t)LWIP_MEM_ALIGN_SIZE(new_size);
801a142: 683b ldr r3, [r7, #0]
801a144: 3303 adds r3, #3
801a146: f023 0303 bic.w r3, r3, #3
801a14a: 627b str r3, [r7, #36] @ 0x24
if (newsize < MIN_SIZE_ALIGNED) {
801a14c: 6a7b ldr r3, [r7, #36] @ 0x24
801a14e: 2b0b cmp r3, #11
801a150: d801 bhi.n 801a156 <mem_trim+0x1e>
/* every data block must be at least MIN_SIZE_ALIGNED long */
newsize = MIN_SIZE_ALIGNED;
801a152: 230c movs r3, #12
801a154: 627b str r3, [r7, #36] @ 0x24
}
#if MEM_OVERFLOW_CHECK
newsize += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
if ((newsize > MEM_SIZE_ALIGNED) || (newsize < new_size)) {
801a156: 6a7b ldr r3, [r7, #36] @ 0x24
801a158: 4a6e ldr r2, [pc, #440] @ (801a314 <mem_trim+0x1dc>)
801a15a: 4293 cmp r3, r2
801a15c: d803 bhi.n 801a166 <mem_trim+0x2e>
801a15e: 6a7a ldr r2, [r7, #36] @ 0x24
801a160: 683b ldr r3, [r7, #0]
801a162: 429a cmp r2, r3
801a164: d201 bcs.n 801a16a <mem_trim+0x32>
return NULL;
801a166: 2300 movs r3, #0
801a168: e0d0 b.n 801a30c <mem_trim+0x1d4>
}
LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram &&
801a16a: 4b6b ldr r3, [pc, #428] @ (801a318 <mem_trim+0x1e0>)
801a16c: 681b ldr r3, [r3, #0]
801a16e: 687a ldr r2, [r7, #4]
801a170: 429a cmp r2, r3
801a172: d304 bcc.n 801a17e <mem_trim+0x46>
801a174: 4b69 ldr r3, [pc, #420] @ (801a31c <mem_trim+0x1e4>)
801a176: 681b ldr r3, [r3, #0]
801a178: 687a ldr r2, [r7, #4]
801a17a: 429a cmp r2, r3
801a17c: d306 bcc.n 801a18c <mem_trim+0x54>
801a17e: 4b68 ldr r3, [pc, #416] @ (801a320 <mem_trim+0x1e8>)
801a180: f240 22d1 movw r2, #721 @ 0x2d1
801a184: 4967 ldr r1, [pc, #412] @ (801a324 <mem_trim+0x1ec>)
801a186: 4868 ldr r0, [pc, #416] @ (801a328 <mem_trim+0x1f0>)
801a188: f010 fc50 bl 802aa2c <iprintf>
(u8_t *)rmem < (u8_t *)ram_end);
if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) {
801a18c: 4b62 ldr r3, [pc, #392] @ (801a318 <mem_trim+0x1e0>)
801a18e: 681b ldr r3, [r3, #0]
801a190: 687a ldr r2, [r7, #4]
801a192: 429a cmp r2, r3
801a194: d304 bcc.n 801a1a0 <mem_trim+0x68>
801a196: 4b61 ldr r3, [pc, #388] @ (801a31c <mem_trim+0x1e4>)
801a198: 681b ldr r3, [r3, #0]
801a19a: 687a ldr r2, [r7, #4]
801a19c: 429a cmp r2, r3
801a19e: d307 bcc.n 801a1b0 <mem_trim+0x78>
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n"));
/* protect mem stats from concurrent access */
MEM_STATS_INC_LOCKED(illegal);
801a1a0: f00d f9ae bl 8027500 <sys_arch_protect>
801a1a4: 60b8 str r0, [r7, #8]
801a1a6: 68b8 ldr r0, [r7, #8]
801a1a8: f00d f9b8 bl 802751c <sys_arch_unprotect>
return rmem;
801a1ac: 687b ldr r3, [r7, #4]
801a1ae: e0ad b.n 801a30c <mem_trim+0x1d4>
}
/* Get the corresponding struct mem ... */
/* cast through void* to get rid of alignment warnings */
mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
801a1b0: 687b ldr r3, [r7, #4]
801a1b2: 3b0c subs r3, #12
801a1b4: 623b str r3, [r7, #32]
#if MEM_OVERFLOW_CHECK
mem_overflow_check_element(mem);
#endif
/* ... and its offset pointer */
ptr = mem_to_ptr(mem);
801a1b6: 6a38 ldr r0, [r7, #32]
801a1b8: f7ff fdf0 bl 8019d9c <mem_to_ptr>
801a1bc: 61f8 str r0, [r7, #28]
size = (mem_size_t)((mem_size_t)(mem->next - ptr) - (SIZEOF_STRUCT_MEM + MEM_SANITY_OVERHEAD));
801a1be: 6a3b ldr r3, [r7, #32]
801a1c0: 681a ldr r2, [r3, #0]
801a1c2: 69fb ldr r3, [r7, #28]
801a1c4: 1ad3 subs r3, r2, r3
801a1c6: 3b0c subs r3, #12
801a1c8: 61bb str r3, [r7, #24]
LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size);
801a1ca: 6a7a ldr r2, [r7, #36] @ 0x24
801a1cc: 69bb ldr r3, [r7, #24]
801a1ce: 429a cmp r2, r3
801a1d0: d906 bls.n 801a1e0 <mem_trim+0xa8>
801a1d2: 4b53 ldr r3, [pc, #332] @ (801a320 <mem_trim+0x1e8>)
801a1d4: f44f 7239 mov.w r2, #740 @ 0x2e4
801a1d8: 4954 ldr r1, [pc, #336] @ (801a32c <mem_trim+0x1f4>)
801a1da: 4853 ldr r0, [pc, #332] @ (801a328 <mem_trim+0x1f0>)
801a1dc: f010 fc26 bl 802aa2c <iprintf>
if (newsize > size) {
801a1e0: 6a7a ldr r2, [r7, #36] @ 0x24
801a1e2: 69bb ldr r3, [r7, #24]
801a1e4: 429a cmp r2, r3
801a1e6: d901 bls.n 801a1ec <mem_trim+0xb4>
/* not supported */
return NULL;
801a1e8: 2300 movs r3, #0
801a1ea: e08f b.n 801a30c <mem_trim+0x1d4>
}
if (newsize == size) {
801a1ec: 6a7a ldr r2, [r7, #36] @ 0x24
801a1ee: 69bb ldr r3, [r7, #24]
801a1f0: 429a cmp r2, r3
801a1f2: d101 bne.n 801a1f8 <mem_trim+0xc0>
/* No change in size, simply return */
return rmem;
801a1f4: 687b ldr r3, [r7, #4]
801a1f6: e089 b.n 801a30c <mem_trim+0x1d4>
}
/* protect the heap from concurrent access */
LWIP_MEM_FREE_PROTECT();
801a1f8: 484d ldr r0, [pc, #308] @ (801a330 <mem_trim+0x1f8>)
801a1fa: f00d f945 bl 8027488 <sys_mutex_lock>
mem2 = ptr_to_mem(mem->next);
801a1fe: 6a3b ldr r3, [r7, #32]
801a200: 681b ldr r3, [r3, #0]
801a202: 4618 mov r0, r3
801a204: f7ff fdba bl 8019d7c <ptr_to_mem>
801a208: 6178 str r0, [r7, #20]
if (mem2->used == 0) {
801a20a: 697b ldr r3, [r7, #20]
801a20c: 7a1b ldrb r3, [r3, #8]
801a20e: 2b00 cmp r3, #0
801a210: d13c bne.n 801a28c <mem_trim+0x154>
/* The next struct is unused, we can simply move it at little */
mem_size_t next;
LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
801a212: 6a3b ldr r3, [r7, #32]
801a214: 681b ldr r3, [r3, #0]
801a216: 4a3f ldr r2, [pc, #252] @ (801a314 <mem_trim+0x1dc>)
801a218: 4293 cmp r3, r2
801a21a: d106 bne.n 801a22a <mem_trim+0xf2>
801a21c: 4b40 ldr r3, [pc, #256] @ (801a320 <mem_trim+0x1e8>)
801a21e: f240 22f5 movw r2, #757 @ 0x2f5
801a222: 4944 ldr r1, [pc, #272] @ (801a334 <mem_trim+0x1fc>)
801a224: 4840 ldr r0, [pc, #256] @ (801a328 <mem_trim+0x1f0>)
801a226: f010 fc01 bl 802aa2c <iprintf>
/* remember the old next pointer */
next = mem2->next;
801a22a: 697b ldr r3, [r7, #20]
801a22c: 681b ldr r3, [r3, #0]
801a22e: 60fb str r3, [r7, #12]
/* create new struct mem which is moved directly after the shrinked mem */
ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
801a230: 69fa ldr r2, [r7, #28]
801a232: 6a7b ldr r3, [r7, #36] @ 0x24
801a234: 4413 add r3, r2
801a236: 330c adds r3, #12
801a238: 613b str r3, [r7, #16]
if (lfree == mem2) {
801a23a: 4b3f ldr r3, [pc, #252] @ (801a338 <mem_trim+0x200>)
801a23c: 681b ldr r3, [r3, #0]
801a23e: 697a ldr r2, [r7, #20]
801a240: 429a cmp r2, r3
801a242: d105 bne.n 801a250 <mem_trim+0x118>
lfree = ptr_to_mem(ptr2);
801a244: 6938 ldr r0, [r7, #16]
801a246: f7ff fd99 bl 8019d7c <ptr_to_mem>
801a24a: 4603 mov r3, r0
801a24c: 4a3a ldr r2, [pc, #232] @ (801a338 <mem_trim+0x200>)
801a24e: 6013 str r3, [r2, #0]
}
mem2 = ptr_to_mem(ptr2);
801a250: 6938 ldr r0, [r7, #16]
801a252: f7ff fd93 bl 8019d7c <ptr_to_mem>
801a256: 6178 str r0, [r7, #20]
mem2->used = 0;
801a258: 697b ldr r3, [r7, #20]
801a25a: 2200 movs r2, #0
801a25c: 721a strb r2, [r3, #8]
/* restore the next pointer */
mem2->next = next;
801a25e: 697b ldr r3, [r7, #20]
801a260: 68fa ldr r2, [r7, #12]
801a262: 601a str r2, [r3, #0]
/* link it back to mem */
mem2->prev = ptr;
801a264: 697b ldr r3, [r7, #20]
801a266: 69fa ldr r2, [r7, #28]
801a268: 605a str r2, [r3, #4]
/* link mem to it */
mem->next = ptr2;
801a26a: 6a3b ldr r3, [r7, #32]
801a26c: 693a ldr r2, [r7, #16]
801a26e: 601a str r2, [r3, #0]
/* last thing to restore linked list: as we have moved mem2,
* let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not
* the end of the heap */
if (mem2->next != MEM_SIZE_ALIGNED) {
801a270: 697b ldr r3, [r7, #20]
801a272: 681b ldr r3, [r3, #0]
801a274: 4a27 ldr r2, [pc, #156] @ (801a314 <mem_trim+0x1dc>)
801a276: 4293 cmp r3, r2
801a278: d044 beq.n 801a304 <mem_trim+0x1cc>
ptr_to_mem(mem2->next)->prev = ptr2;
801a27a: 697b ldr r3, [r7, #20]
801a27c: 681b ldr r3, [r3, #0]
801a27e: 4618 mov r0, r3
801a280: f7ff fd7c bl 8019d7c <ptr_to_mem>
801a284: 4602 mov r2, r0
801a286: 693b ldr r3, [r7, #16]
801a288: 6053 str r3, [r2, #4]
801a28a: e03b b.n 801a304 <mem_trim+0x1cc>
}
MEM_STATS_DEC_USED(used, (size - newsize));
/* no need to plug holes, we've already done that */
} else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) {
801a28c: 6a7b ldr r3, [r7, #36] @ 0x24
801a28e: 3318 adds r3, #24
801a290: 69ba ldr r2, [r7, #24]
801a292: 429a cmp r2, r3
801a294: d336 bcc.n 801a304 <mem_trim+0x1cc>
* Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem
* ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED').
* @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
* region that couldn't hold data, but when mem->next gets freed,
* the 2 regions would be combined, resulting in more free memory */
ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
801a296: 69fa ldr r2, [r7, #28]
801a298: 6a7b ldr r3, [r7, #36] @ 0x24
801a29a: 4413 add r3, r2
801a29c: 330c adds r3, #12
801a29e: 613b str r3, [r7, #16]
LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
801a2a0: 6a3b ldr r3, [r7, #32]
801a2a2: 681b ldr r3, [r3, #0]
801a2a4: 4a1b ldr r2, [pc, #108] @ (801a314 <mem_trim+0x1dc>)
801a2a6: 4293 cmp r3, r2
801a2a8: d106 bne.n 801a2b8 <mem_trim+0x180>
801a2aa: 4b1d ldr r3, [pc, #116] @ (801a320 <mem_trim+0x1e8>)
801a2ac: f240 3216 movw r2, #790 @ 0x316
801a2b0: 4920 ldr r1, [pc, #128] @ (801a334 <mem_trim+0x1fc>)
801a2b2: 481d ldr r0, [pc, #116] @ (801a328 <mem_trim+0x1f0>)
801a2b4: f010 fbba bl 802aa2c <iprintf>
mem2 = ptr_to_mem(ptr2);
801a2b8: 6938 ldr r0, [r7, #16]
801a2ba: f7ff fd5f bl 8019d7c <ptr_to_mem>
801a2be: 6178 str r0, [r7, #20]
if (mem2 < lfree) {
801a2c0: 4b1d ldr r3, [pc, #116] @ (801a338 <mem_trim+0x200>)
801a2c2: 681b ldr r3, [r3, #0]
801a2c4: 697a ldr r2, [r7, #20]
801a2c6: 429a cmp r2, r3
801a2c8: d202 bcs.n 801a2d0 <mem_trim+0x198>
lfree = mem2;
801a2ca: 4a1b ldr r2, [pc, #108] @ (801a338 <mem_trim+0x200>)
801a2cc: 697b ldr r3, [r7, #20]
801a2ce: 6013 str r3, [r2, #0]
}
mem2->used = 0;
801a2d0: 697b ldr r3, [r7, #20]
801a2d2: 2200 movs r2, #0
801a2d4: 721a strb r2, [r3, #8]
mem2->next = mem->next;
801a2d6: 6a3b ldr r3, [r7, #32]
801a2d8: 681a ldr r2, [r3, #0]
801a2da: 697b ldr r3, [r7, #20]
801a2dc: 601a str r2, [r3, #0]
mem2->prev = ptr;
801a2de: 697b ldr r3, [r7, #20]
801a2e0: 69fa ldr r2, [r7, #28]
801a2e2: 605a str r2, [r3, #4]
mem->next = ptr2;
801a2e4: 6a3b ldr r3, [r7, #32]
801a2e6: 693a ldr r2, [r7, #16]
801a2e8: 601a str r2, [r3, #0]
if (mem2->next != MEM_SIZE_ALIGNED) {
801a2ea: 697b ldr r3, [r7, #20]
801a2ec: 681b ldr r3, [r3, #0]
801a2ee: 4a09 ldr r2, [pc, #36] @ (801a314 <mem_trim+0x1dc>)
801a2f0: 4293 cmp r3, r2
801a2f2: d007 beq.n 801a304 <mem_trim+0x1cc>
ptr_to_mem(mem2->next)->prev = ptr2;
801a2f4: 697b ldr r3, [r7, #20]
801a2f6: 681b ldr r3, [r3, #0]
801a2f8: 4618 mov r0, r3
801a2fa: f7ff fd3f bl 8019d7c <ptr_to_mem>
801a2fe: 4602 mov r2, r0
801a300: 693b ldr r3, [r7, #16]
801a302: 6053 str r3, [r2, #4]
#endif
MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
LWIP_MEM_FREE_UNPROTECT();
801a304: 480a ldr r0, [pc, #40] @ (801a330 <mem_trim+0x1f8>)
801a306: f00d f8ce bl 80274a6 <sys_mutex_unlock>
return rmem;
801a30a: 687b ldr r3, [r7, #4]
}
801a30c: 4618 mov r0, r3
801a30e: 3728 adds r7, #40 @ 0x28
801a310: 46bd mov sp, r7
801a312: bd80 pop {r7, pc}
801a314: 0001ffe8 .word 0x0001ffe8
801a318: 24024470 .word 0x24024470
801a31c: 24024474 .word 0x24024474
801a320: 0802ecc4 .word 0x0802ecc4
801a324: 0802ee50 .word 0x0802ee50
801a328: 0802ed0c .word 0x0802ed0c
801a32c: 0802ee68 .word 0x0802ee68
801a330: 24024478 .word 0x24024478
801a334: 0802ee88 .word 0x0802ee88
801a338: 2402447c .word 0x2402447c
0801a33c <mem_malloc>:
*
* Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT).
*/
void *
mem_malloc(mem_size_t size_in)
{
801a33c: b580 push {r7, lr}
801a33e: b088 sub sp, #32
801a340: af00 add r7, sp, #0
801a342: 6078 str r0, [r7, #4]
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
u8_t local_mem_free_count = 0;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
LWIP_MEM_ALLOC_DECL_PROTECT();
if (size_in == 0) {
801a344: 687b ldr r3, [r7, #4]
801a346: 2b00 cmp r3, #0
801a348: d101 bne.n 801a34e <mem_malloc+0x12>
return NULL;
801a34a: 2300 movs r3, #0
801a34c: e0d9 b.n 801a502 <mem_malloc+0x1c6>
}
/* Expand the size of the allocated memory region so that we can
adjust for alignment. */
size = (mem_size_t)LWIP_MEM_ALIGN_SIZE(size_in);
801a34e: 687b ldr r3, [r7, #4]
801a350: 3303 adds r3, #3
801a352: f023 0303 bic.w r3, r3, #3
801a356: 61bb str r3, [r7, #24]
if (size < MIN_SIZE_ALIGNED) {
801a358: 69bb ldr r3, [r7, #24]
801a35a: 2b0b cmp r3, #11
801a35c: d801 bhi.n 801a362 <mem_malloc+0x26>
/* every data block must be at least MIN_SIZE_ALIGNED long */
size = MIN_SIZE_ALIGNED;
801a35e: 230c movs r3, #12
801a360: 61bb str r3, [r7, #24]
}
#if MEM_OVERFLOW_CHECK
size += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
if ((size > MEM_SIZE_ALIGNED) || (size < size_in)) {
801a362: 69bb ldr r3, [r7, #24]
801a364: 4a69 ldr r2, [pc, #420] @ (801a50c <mem_malloc+0x1d0>)
801a366: 4293 cmp r3, r2
801a368: d803 bhi.n 801a372 <mem_malloc+0x36>
801a36a: 69ba ldr r2, [r7, #24]
801a36c: 687b ldr r3, [r7, #4]
801a36e: 429a cmp r2, r3
801a370: d201 bcs.n 801a376 <mem_malloc+0x3a>
return NULL;
801a372: 2300 movs r3, #0
801a374: e0c5 b.n 801a502 <mem_malloc+0x1c6>
}
/* protect the heap from concurrent access */
sys_mutex_lock(&mem_mutex);
801a376: 4866 ldr r0, [pc, #408] @ (801a510 <mem_malloc+0x1d4>)
801a378: f00d f886 bl 8027488 <sys_mutex_lock>
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
/* Scan through the heap searching for a free block that is big enough,
* beginning with the lowest free block.
*/
for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
801a37c: 4b65 ldr r3, [pc, #404] @ (801a514 <mem_malloc+0x1d8>)
801a37e: 681b ldr r3, [r3, #0]
801a380: 4618 mov r0, r3
801a382: f7ff fd0b bl 8019d9c <mem_to_ptr>
801a386: 61f8 str r0, [r7, #28]
801a388: e0b0 b.n 801a4ec <mem_malloc+0x1b0>
ptr = ptr_to_mem(ptr)->next) {
mem = ptr_to_mem(ptr);
801a38a: 69f8 ldr r0, [r7, #28]
801a38c: f7ff fcf6 bl 8019d7c <ptr_to_mem>
801a390: 6138 str r0, [r7, #16]
local_mem_free_count = 1;
break;
}
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
if ((!mem->used) &&
801a392: 693b ldr r3, [r7, #16]
801a394: 7a1b ldrb r3, [r3, #8]
801a396: 2b00 cmp r3, #0
801a398: f040 80a2 bne.w 801a4e0 <mem_malloc+0x1a4>
(mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) {
801a39c: 693b ldr r3, [r7, #16]
801a39e: 681a ldr r2, [r3, #0]
801a3a0: 69fb ldr r3, [r7, #28]
801a3a2: 1ad3 subs r3, r2, r3
801a3a4: 3b0c subs r3, #12
if ((!mem->used) &&
801a3a6: 69ba ldr r2, [r7, #24]
801a3a8: 429a cmp r2, r3
801a3aa: f200 8099 bhi.w 801a4e0 <mem_malloc+0x1a4>
/* mem is not used and at least perfect fit is possible:
* mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */
if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) {
801a3ae: 693b ldr r3, [r7, #16]
801a3b0: 681a ldr r2, [r3, #0]
801a3b2: 69fb ldr r3, [r7, #28]
801a3b4: 1ad3 subs r3, r2, r3
801a3b6: f1a3 020c sub.w r2, r3, #12
801a3ba: 69bb ldr r3, [r7, #24]
801a3bc: 3318 adds r3, #24
801a3be: 429a cmp r2, r3
801a3c0: d331 bcc.n 801a426 <mem_malloc+0xea>
* struct mem would fit in but no data between mem2 and mem2->next
* @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
* region that couldn't hold data, but when mem->next gets freed,
* the 2 regions would be combined, resulting in more free memory
*/
ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + size);
801a3c2: 69fa ldr r2, [r7, #28]
801a3c4: 69bb ldr r3, [r7, #24]
801a3c6: 4413 add r3, r2
801a3c8: 330c adds r3, #12
801a3ca: 60fb str r3, [r7, #12]
LWIP_ASSERT("invalid next ptr",ptr2 != MEM_SIZE_ALIGNED);
801a3cc: 68fb ldr r3, [r7, #12]
801a3ce: 4a4f ldr r2, [pc, #316] @ (801a50c <mem_malloc+0x1d0>)
801a3d0: 4293 cmp r3, r2
801a3d2: d106 bne.n 801a3e2 <mem_malloc+0xa6>
801a3d4: 4b50 ldr r3, [pc, #320] @ (801a518 <mem_malloc+0x1dc>)
801a3d6: f240 3287 movw r2, #903 @ 0x387
801a3da: 4950 ldr r1, [pc, #320] @ (801a51c <mem_malloc+0x1e0>)
801a3dc: 4850 ldr r0, [pc, #320] @ (801a520 <mem_malloc+0x1e4>)
801a3de: f010 fb25 bl 802aa2c <iprintf>
/* create mem2 struct */
mem2 = ptr_to_mem(ptr2);
801a3e2: 68f8 ldr r0, [r7, #12]
801a3e4: f7ff fcca bl 8019d7c <ptr_to_mem>
801a3e8: 60b8 str r0, [r7, #8]
mem2->used = 0;
801a3ea: 68bb ldr r3, [r7, #8]
801a3ec: 2200 movs r2, #0
801a3ee: 721a strb r2, [r3, #8]
mem2->next = mem->next;
801a3f0: 693b ldr r3, [r7, #16]
801a3f2: 681a ldr r2, [r3, #0]
801a3f4: 68bb ldr r3, [r7, #8]
801a3f6: 601a str r2, [r3, #0]
mem2->prev = ptr;
801a3f8: 68bb ldr r3, [r7, #8]
801a3fa: 69fa ldr r2, [r7, #28]
801a3fc: 605a str r2, [r3, #4]
/* and insert it between mem and mem->next */
mem->next = ptr2;
801a3fe: 693b ldr r3, [r7, #16]
801a400: 68fa ldr r2, [r7, #12]
801a402: 601a str r2, [r3, #0]
mem->used = 1;
801a404: 693b ldr r3, [r7, #16]
801a406: 2201 movs r2, #1
801a408: 721a strb r2, [r3, #8]
if (mem2->next != MEM_SIZE_ALIGNED) {
801a40a: 68bb ldr r3, [r7, #8]
801a40c: 681b ldr r3, [r3, #0]
801a40e: 4a3f ldr r2, [pc, #252] @ (801a50c <mem_malloc+0x1d0>)
801a410: 4293 cmp r3, r2
801a412: d00b beq.n 801a42c <mem_malloc+0xf0>
ptr_to_mem(mem2->next)->prev = ptr2;
801a414: 68bb ldr r3, [r7, #8]
801a416: 681b ldr r3, [r3, #0]
801a418: 4618 mov r0, r3
801a41a: f7ff fcaf bl 8019d7c <ptr_to_mem>
801a41e: 4602 mov r2, r0
801a420: 68fb ldr r3, [r7, #12]
801a422: 6053 str r3, [r2, #4]
801a424: e002 b.n 801a42c <mem_malloc+0xf0>
* take care of this).
* -> near fit or exact fit: do not split, no mem2 creation
* also can't move mem->next directly behind mem, since mem->next
* will always be used at this point!
*/
mem->used = 1;
801a426: 693b ldr r3, [r7, #16]
801a428: 2201 movs r2, #1
801a42a: 721a strb r2, [r3, #8]
MEM_STATS_INC_USED(used, mem->next - mem_to_ptr(mem));
}
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_malloc_adjust_lfree:
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
if (mem == lfree) {
801a42c: 4b39 ldr r3, [pc, #228] @ (801a514 <mem_malloc+0x1d8>)
801a42e: 681b ldr r3, [r3, #0]
801a430: 693a ldr r2, [r7, #16]
801a432: 429a cmp r2, r3
801a434: d127 bne.n 801a486 <mem_malloc+0x14a>
struct mem *cur = lfree;
801a436: 4b37 ldr r3, [pc, #220] @ (801a514 <mem_malloc+0x1d8>)
801a438: 681b ldr r3, [r3, #0]
801a43a: 617b str r3, [r7, #20]
/* Find next free block after mem and update lowest free pointer */
while (cur->used && cur != ram_end) {
801a43c: e005 b.n 801a44a <mem_malloc+0x10e>
/* If mem_free or mem_trim have run, we have to restart since they
could have altered our current struct mem or lfree. */
goto mem_malloc_adjust_lfree;
}
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
cur = ptr_to_mem(cur->next);
801a43e: 697b ldr r3, [r7, #20]
801a440: 681b ldr r3, [r3, #0]
801a442: 4618 mov r0, r3
801a444: f7ff fc9a bl 8019d7c <ptr_to_mem>
801a448: 6178 str r0, [r7, #20]
while (cur->used && cur != ram_end) {
801a44a: 697b ldr r3, [r7, #20]
801a44c: 7a1b ldrb r3, [r3, #8]
801a44e: 2b00 cmp r3, #0
801a450: d004 beq.n 801a45c <mem_malloc+0x120>
801a452: 4b34 ldr r3, [pc, #208] @ (801a524 <mem_malloc+0x1e8>)
801a454: 681b ldr r3, [r3, #0]
801a456: 697a ldr r2, [r7, #20]
801a458: 429a cmp r2, r3
801a45a: d1f0 bne.n 801a43e <mem_malloc+0x102>
}
lfree = cur;
801a45c: 4a2d ldr r2, [pc, #180] @ (801a514 <mem_malloc+0x1d8>)
801a45e: 697b ldr r3, [r7, #20]
801a460: 6013 str r3, [r2, #0]
LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used)));
801a462: 4b2c ldr r3, [pc, #176] @ (801a514 <mem_malloc+0x1d8>)
801a464: 681a ldr r2, [r3, #0]
801a466: 4b2f ldr r3, [pc, #188] @ (801a524 <mem_malloc+0x1e8>)
801a468: 681b ldr r3, [r3, #0]
801a46a: 429a cmp r2, r3
801a46c: d00b beq.n 801a486 <mem_malloc+0x14a>
801a46e: 4b29 ldr r3, [pc, #164] @ (801a514 <mem_malloc+0x1d8>)
801a470: 681b ldr r3, [r3, #0]
801a472: 7a1b ldrb r3, [r3, #8]
801a474: 2b00 cmp r3, #0
801a476: d006 beq.n 801a486 <mem_malloc+0x14a>
801a478: 4b27 ldr r3, [pc, #156] @ (801a518 <mem_malloc+0x1dc>)
801a47a: f240 32b5 movw r2, #949 @ 0x3b5
801a47e: 492a ldr r1, [pc, #168] @ (801a528 <mem_malloc+0x1ec>)
801a480: 4827 ldr r0, [pc, #156] @ (801a520 <mem_malloc+0x1e4>)
801a482: f010 fad3 bl 802aa2c <iprintf>
}
LWIP_MEM_ALLOC_UNPROTECT();
sys_mutex_unlock(&mem_mutex);
801a486: 4822 ldr r0, [pc, #136] @ (801a510 <mem_malloc+0x1d4>)
801a488: f00d f80d bl 80274a6 <sys_mutex_unlock>
LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.",
801a48c: 693a ldr r2, [r7, #16]
801a48e: 69bb ldr r3, [r7, #24]
801a490: 4413 add r3, r2
801a492: 330c adds r3, #12
801a494: 4a23 ldr r2, [pc, #140] @ (801a524 <mem_malloc+0x1e8>)
801a496: 6812 ldr r2, [r2, #0]
801a498: 4293 cmp r3, r2
801a49a: d906 bls.n 801a4aa <mem_malloc+0x16e>
801a49c: 4b1e ldr r3, [pc, #120] @ (801a518 <mem_malloc+0x1dc>)
801a49e: f240 32b9 movw r2, #953 @ 0x3b9
801a4a2: 4922 ldr r1, [pc, #136] @ (801a52c <mem_malloc+0x1f0>)
801a4a4: 481e ldr r0, [pc, #120] @ (801a520 <mem_malloc+0x1e4>)
801a4a6: f010 fac1 bl 802aa2c <iprintf>
(mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end);
LWIP_ASSERT("mem_malloc: allocated memory properly aligned.",
801a4aa: 693b ldr r3, [r7, #16]
801a4ac: f003 0303 and.w r3, r3, #3
801a4b0: 2b00 cmp r3, #0
801a4b2: d006 beq.n 801a4c2 <mem_malloc+0x186>
801a4b4: 4b18 ldr r3, [pc, #96] @ (801a518 <mem_malloc+0x1dc>)
801a4b6: f240 32bb movw r2, #955 @ 0x3bb
801a4ba: 491d ldr r1, [pc, #116] @ (801a530 <mem_malloc+0x1f4>)
801a4bc: 4818 ldr r0, [pc, #96] @ (801a520 <mem_malloc+0x1e4>)
801a4be: f010 fab5 bl 802aa2c <iprintf>
((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0);
LWIP_ASSERT("mem_malloc: sanity check alignment",
801a4c2: 693b ldr r3, [r7, #16]
801a4c4: f003 0303 and.w r3, r3, #3
801a4c8: 2b00 cmp r3, #0
801a4ca: d006 beq.n 801a4da <mem_malloc+0x19e>
801a4cc: 4b12 ldr r3, [pc, #72] @ (801a518 <mem_malloc+0x1dc>)
801a4ce: f240 32bd movw r2, #957 @ 0x3bd
801a4d2: 4918 ldr r1, [pc, #96] @ (801a534 <mem_malloc+0x1f8>)
801a4d4: 4812 ldr r0, [pc, #72] @ (801a520 <mem_malloc+0x1e4>)
801a4d6: f010 faa9 bl 802aa2c <iprintf>
#if MEM_OVERFLOW_CHECK
mem_overflow_init_element(mem, size_in);
#endif
MEM_SANITY();
return (u8_t *)mem + SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET;
801a4da: 693b ldr r3, [r7, #16]
801a4dc: 330c adds r3, #12
801a4de: e010 b.n 801a502 <mem_malloc+0x1c6>
ptr = ptr_to_mem(ptr)->next) {
801a4e0: 69f8 ldr r0, [r7, #28]
801a4e2: f7ff fc4b bl 8019d7c <ptr_to_mem>
801a4e6: 4603 mov r3, r0
801a4e8: 681b ldr r3, [r3, #0]
801a4ea: 61fb str r3, [r7, #28]
for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
801a4ec: 69ba ldr r2, [r7, #24]
801a4ee: 4b07 ldr r3, [pc, #28] @ (801a50c <mem_malloc+0x1d0>)
801a4f0: 1a9b subs r3, r3, r2
801a4f2: 69fa ldr r2, [r7, #28]
801a4f4: 429a cmp r2, r3
801a4f6: f4ff af48 bcc.w 801a38a <mem_malloc+0x4e>
/* if we got interrupted by a mem_free, try again */
} while (local_mem_free_count != 0);
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
MEM_STATS_INC(err);
LWIP_MEM_ALLOC_UNPROTECT();
sys_mutex_unlock(&mem_mutex);
801a4fa: 4805 ldr r0, [pc, #20] @ (801a510 <mem_malloc+0x1d4>)
801a4fc: f00c ffd3 bl 80274a6 <sys_mutex_unlock>
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size));
return NULL;
801a500: 2300 movs r3, #0
}
801a502: 4618 mov r0, r3
801a504: 3720 adds r7, #32
801a506: 46bd mov sp, r7
801a508: bd80 pop {r7, pc}
801a50a: bf00 nop
801a50c: 0001ffe8 .word 0x0001ffe8
801a510: 24024478 .word 0x24024478
801a514: 2402447c .word 0x2402447c
801a518: 0802ecc4 .word 0x0802ecc4
801a51c: 0802ee88 .word 0x0802ee88
801a520: 0802ed0c .word 0x0802ed0c
801a524: 24024474 .word 0x24024474
801a528: 0802ee9c .word 0x0802ee9c
801a52c: 0802eeb8 .word 0x0802eeb8
801a530: 0802eee8 .word 0x0802eee8
801a534: 0802ef18 .word 0x0802ef18
0801a538 <memp_init_pool>:
*
* @param desc pool to initialize
*/
void
memp_init_pool(const struct memp_desc *desc)
{
801a538: b480 push {r7}
801a53a: b085 sub sp, #20
801a53c: af00 add r7, sp, #0
801a53e: 6078 str r0, [r7, #4]
LWIP_UNUSED_ARG(desc);
#else
int i;
struct memp *memp;
*desc->tab = NULL;
801a540: 687b ldr r3, [r7, #4]
801a542: 68db ldr r3, [r3, #12]
801a544: 2200 movs r2, #0
801a546: 601a str r2, [r3, #0]
memp = (struct memp *)LWIP_MEM_ALIGN(desc->base);
801a548: 687b ldr r3, [r7, #4]
801a54a: 689b ldr r3, [r3, #8]
801a54c: 3303 adds r3, #3
801a54e: f023 0303 bic.w r3, r3, #3
801a552: 60bb str r3, [r7, #8]
+ MEM_SANITY_REGION_AFTER_ALIGNED
#endif
));
#endif
/* create a linked list of memp elements */
for (i = 0; i < desc->num; ++i) {
801a554: 2300 movs r3, #0
801a556: 60fb str r3, [r7, #12]
801a558: e011 b.n 801a57e <memp_init_pool+0x46>
memp->next = *desc->tab;
801a55a: 687b ldr r3, [r7, #4]
801a55c: 68db ldr r3, [r3, #12]
801a55e: 681a ldr r2, [r3, #0]
801a560: 68bb ldr r3, [r7, #8]
801a562: 601a str r2, [r3, #0]
*desc->tab = memp;
801a564: 687b ldr r3, [r7, #4]
801a566: 68db ldr r3, [r3, #12]
801a568: 68ba ldr r2, [r7, #8]
801a56a: 601a str r2, [r3, #0]
#if MEMP_OVERFLOW_CHECK
memp_overflow_init_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */
/* cast through void* to get rid of alignment warnings */
memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + desc->size
801a56c: 687b ldr r3, [r7, #4]
801a56e: 889b ldrh r3, [r3, #4]
801a570: 461a mov r2, r3
801a572: 68bb ldr r3, [r7, #8]
801a574: 4413 add r3, r2
801a576: 60bb str r3, [r7, #8]
for (i = 0; i < desc->num; ++i) {
801a578: 68fb ldr r3, [r7, #12]
801a57a: 3301 adds r3, #1
801a57c: 60fb str r3, [r7, #12]
801a57e: 687b ldr r3, [r7, #4]
801a580: 88db ldrh r3, [r3, #6]
801a582: 461a mov r2, r3
801a584: 68fb ldr r3, [r7, #12]
801a586: 4293 cmp r3, r2
801a588: dbe7 blt.n 801a55a <memp_init_pool+0x22>
#endif /* !MEMP_MEM_MALLOC */
#if MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY)
desc->stats->name = desc->desc;
#endif /* MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) */
}
801a58a: bf00 nop
801a58c: bf00 nop
801a58e: 3714 adds r7, #20
801a590: 46bd mov sp, r7
801a592: f85d 7b04 ldr.w r7, [sp], #4
801a596: 4770 bx lr
0801a598 <memp_init>:
*
* Carves out memp_memory into linked lists for each pool-type.
*/
void
memp_init(void)
{
801a598: b580 push {r7, lr}
801a59a: b082 sub sp, #8
801a59c: af00 add r7, sp, #0
u16_t i;
/* for every pool: */
for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
801a59e: 2300 movs r3, #0
801a5a0: 80fb strh r3, [r7, #6]
801a5a2: e009 b.n 801a5b8 <memp_init+0x20>
memp_init_pool(memp_pools[i]);
801a5a4: 88fb ldrh r3, [r7, #6]
801a5a6: 4a08 ldr r2, [pc, #32] @ (801a5c8 <memp_init+0x30>)
801a5a8: f852 3023 ldr.w r3, [r2, r3, lsl #2]
801a5ac: 4618 mov r0, r3
801a5ae: f7ff ffc3 bl 801a538 <memp_init_pool>
for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
801a5b2: 88fb ldrh r3, [r7, #6]
801a5b4: 3301 adds r3, #1
801a5b6: 80fb strh r3, [r7, #6]
801a5b8: 88fb ldrh r3, [r7, #6]
801a5ba: 2b0c cmp r3, #12
801a5bc: d9f2 bls.n 801a5a4 <memp_init+0xc>
#if MEMP_OVERFLOW_CHECK >= 2
/* check everything a first time to see if it worked */
memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */
}
801a5be: bf00 nop
801a5c0: bf00 nop
801a5c2: 3708 adds r7, #8
801a5c4: 46bd mov sp, r7
801a5c6: bd80 pop {r7, pc}
801a5c8: 08031e44 .word 0x08031e44
0801a5cc <do_memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
do_memp_malloc_pool(const struct memp_desc *desc)
#else
do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
801a5cc: b580 push {r7, lr}
801a5ce: b084 sub sp, #16
801a5d0: af00 add r7, sp, #0
801a5d2: 6078 str r0, [r7, #4]
#if MEMP_MEM_MALLOC
memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size));
SYS_ARCH_PROTECT(old_level);
#else /* MEMP_MEM_MALLOC */
SYS_ARCH_PROTECT(old_level);
801a5d4: f00c ff94 bl 8027500 <sys_arch_protect>
801a5d8: 60f8 str r0, [r7, #12]
memp = *desc->tab;
801a5da: 687b ldr r3, [r7, #4]
801a5dc: 68db ldr r3, [r3, #12]
801a5de: 681b ldr r3, [r3, #0]
801a5e0: 60bb str r3, [r7, #8]
#endif /* MEMP_MEM_MALLOC */
if (memp != NULL) {
801a5e2: 68bb ldr r3, [r7, #8]
801a5e4: 2b00 cmp r3, #0
801a5e6: d015 beq.n 801a614 <do_memp_malloc_pool+0x48>
#if !MEMP_MEM_MALLOC
#if MEMP_OVERFLOW_CHECK == 1
memp_overflow_check_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */
*desc->tab = memp->next;
801a5e8: 687b ldr r3, [r7, #4]
801a5ea: 68db ldr r3, [r3, #12]
801a5ec: 68ba ldr r2, [r7, #8]
801a5ee: 6812 ldr r2, [r2, #0]
801a5f0: 601a str r2, [r3, #0]
memp->line = line;
#if MEMP_MEM_MALLOC
memp_overflow_init_element(memp, desc);
#endif /* MEMP_MEM_MALLOC */
#endif /* MEMP_OVERFLOW_CHECK */
LWIP_ASSERT("memp_malloc: memp properly aligned",
801a5f2: 68bb ldr r3, [r7, #8]
801a5f4: f003 0303 and.w r3, r3, #3
801a5f8: 2b00 cmp r3, #0
801a5fa: d006 beq.n 801a60a <do_memp_malloc_pool+0x3e>
801a5fc: 4b09 ldr r3, [pc, #36] @ (801a624 <do_memp_malloc_pool+0x58>)
801a5fe: f44f 728c mov.w r2, #280 @ 0x118
801a602: 4909 ldr r1, [pc, #36] @ (801a628 <do_memp_malloc_pool+0x5c>)
801a604: 4809 ldr r0, [pc, #36] @ (801a62c <do_memp_malloc_pool+0x60>)
801a606: f010 fa11 bl 802aa2c <iprintf>
desc->stats->used++;
if (desc->stats->used > desc->stats->max) {
desc->stats->max = desc->stats->used;
}
#endif
SYS_ARCH_UNPROTECT(old_level);
801a60a: 68f8 ldr r0, [r7, #12]
801a60c: f00c ff86 bl 802751c <sys_arch_unprotect>
/* cast through u8_t* to get rid of alignment warnings */
return ((u8_t *)memp + MEMP_SIZE);
801a610: 68bb ldr r3, [r7, #8]
801a612: e003 b.n 801a61c <do_memp_malloc_pool+0x50>
} else {
#if MEMP_STATS
desc->stats->err++;
#endif
SYS_ARCH_UNPROTECT(old_level);
801a614: 68f8 ldr r0, [r7, #12]
801a616: f00c ff81 bl 802751c <sys_arch_unprotect>
LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", desc->desc));
}
return NULL;
801a61a: 2300 movs r3, #0
}
801a61c: 4618 mov r0, r3
801a61e: 3710 adds r7, #16
801a620: 46bd mov sp, r7
801a622: bd80 pop {r7, pc}
801a624: 0802efd4 .word 0x0802efd4
801a628: 0802f004 .word 0x0802f004
801a62c: 0802f028 .word 0x0802f028
0801a630 <memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc_pool(const struct memp_desc *desc)
#else
memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
801a630: b580 push {r7, lr}
801a632: b082 sub sp, #8
801a634: af00 add r7, sp, #0
801a636: 6078 str r0, [r7, #4]
LWIP_ASSERT("invalid pool desc", desc != NULL);
801a638: 687b ldr r3, [r7, #4]
801a63a: 2b00 cmp r3, #0
801a63c: d106 bne.n 801a64c <memp_malloc_pool+0x1c>
801a63e: 4b0a ldr r3, [pc, #40] @ (801a668 <memp_malloc_pool+0x38>)
801a640: f44f 729e mov.w r2, #316 @ 0x13c
801a644: 4909 ldr r1, [pc, #36] @ (801a66c <memp_malloc_pool+0x3c>)
801a646: 480a ldr r0, [pc, #40] @ (801a670 <memp_malloc_pool+0x40>)
801a648: f010 f9f0 bl 802aa2c <iprintf>
if (desc == NULL) {
801a64c: 687b ldr r3, [r7, #4]
801a64e: 2b00 cmp r3, #0
801a650: d101 bne.n 801a656 <memp_malloc_pool+0x26>
return NULL;
801a652: 2300 movs r3, #0
801a654: e003 b.n 801a65e <memp_malloc_pool+0x2e>
}
#if !MEMP_OVERFLOW_CHECK
return do_memp_malloc_pool(desc);
801a656: 6878 ldr r0, [r7, #4]
801a658: f7ff ffb8 bl 801a5cc <do_memp_malloc_pool>
801a65c: 4603 mov r3, r0
#else
return do_memp_malloc_pool_fn(desc, file, line);
#endif
}
801a65e: 4618 mov r0, r3
801a660: 3708 adds r7, #8
801a662: 46bd mov sp, r7
801a664: bd80 pop {r7, pc}
801a666: bf00 nop
801a668: 0802efd4 .word 0x0802efd4
801a66c: 0802f050 .word 0x0802f050
801a670: 0802f028 .word 0x0802f028
0801a674 <memp_malloc>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc(memp_t type)
#else
memp_malloc_fn(memp_t type, const char *file, const int line)
#endif
{
801a674: b580 push {r7, lr}
801a676: b084 sub sp, #16
801a678: af00 add r7, sp, #0
801a67a: 4603 mov r3, r0
801a67c: 71fb strb r3, [r7, #7]
void *memp;
LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;);
801a67e: 79fb ldrb r3, [r7, #7]
801a680: 2b0c cmp r3, #12
801a682: d908 bls.n 801a696 <memp_malloc+0x22>
801a684: 4b0a ldr r3, [pc, #40] @ (801a6b0 <memp_malloc+0x3c>)
801a686: f240 1257 movw r2, #343 @ 0x157
801a68a: 490a ldr r1, [pc, #40] @ (801a6b4 <memp_malloc+0x40>)
801a68c: 480a ldr r0, [pc, #40] @ (801a6b8 <memp_malloc+0x44>)
801a68e: f010 f9cd bl 802aa2c <iprintf>
801a692: 2300 movs r3, #0
801a694: e008 b.n 801a6a8 <memp_malloc+0x34>
#if MEMP_OVERFLOW_CHECK >= 2
memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */
#if !MEMP_OVERFLOW_CHECK
memp = do_memp_malloc_pool(memp_pools[type]);
801a696: 79fb ldrb r3, [r7, #7]
801a698: 4a08 ldr r2, [pc, #32] @ (801a6bc <memp_malloc+0x48>)
801a69a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
801a69e: 4618 mov r0, r3
801a6a0: f7ff ff94 bl 801a5cc <do_memp_malloc_pool>
801a6a4: 60f8 str r0, [r7, #12]
#else
memp = do_memp_malloc_pool_fn(memp_pools[type], file, line);
#endif
return memp;
801a6a6: 68fb ldr r3, [r7, #12]
}
801a6a8: 4618 mov r0, r3
801a6aa: 3710 adds r7, #16
801a6ac: 46bd mov sp, r7
801a6ae: bd80 pop {r7, pc}
801a6b0: 0802efd4 .word 0x0802efd4
801a6b4: 0802f064 .word 0x0802f064
801a6b8: 0802f028 .word 0x0802f028
801a6bc: 08031e44 .word 0x08031e44
0801a6c0 <do_memp_free_pool>:
static void
do_memp_free_pool(const struct memp_desc *desc, void *mem)
{
801a6c0: b580 push {r7, lr}
801a6c2: b084 sub sp, #16
801a6c4: af00 add r7, sp, #0
801a6c6: 6078 str r0, [r7, #4]
801a6c8: 6039 str r1, [r7, #0]
struct memp *memp;
SYS_ARCH_DECL_PROTECT(old_level);
LWIP_ASSERT("memp_free: mem properly aligned",
801a6ca: 683b ldr r3, [r7, #0]
801a6cc: f003 0303 and.w r3, r3, #3
801a6d0: 2b00 cmp r3, #0
801a6d2: d006 beq.n 801a6e2 <do_memp_free_pool+0x22>
801a6d4: 4b0d ldr r3, [pc, #52] @ (801a70c <do_memp_free_pool+0x4c>)
801a6d6: f44f 72b6 mov.w r2, #364 @ 0x16c
801a6da: 490d ldr r1, [pc, #52] @ (801a710 <do_memp_free_pool+0x50>)
801a6dc: 480d ldr r0, [pc, #52] @ (801a714 <do_memp_free_pool+0x54>)
801a6de: f010 f9a5 bl 802aa2c <iprintf>
((mem_ptr_t)mem % MEM_ALIGNMENT) == 0);
/* cast through void* to get rid of alignment warnings */
memp = (struct memp *)(void *)((u8_t *)mem - MEMP_SIZE);
801a6e2: 683b ldr r3, [r7, #0]
801a6e4: 60fb str r3, [r7, #12]
SYS_ARCH_PROTECT(old_level);
801a6e6: f00c ff0b bl 8027500 <sys_arch_protect>
801a6ea: 60b8 str r0, [r7, #8]
#if MEMP_MEM_MALLOC
LWIP_UNUSED_ARG(desc);
SYS_ARCH_UNPROTECT(old_level);
mem_free(memp);
#else /* MEMP_MEM_MALLOC */
memp->next = *desc->tab;
801a6ec: 687b ldr r3, [r7, #4]
801a6ee: 68db ldr r3, [r3, #12]
801a6f0: 681a ldr r2, [r3, #0]
801a6f2: 68fb ldr r3, [r7, #12]
801a6f4: 601a str r2, [r3, #0]
*desc->tab = memp;
801a6f6: 687b ldr r3, [r7, #4]
801a6f8: 68db ldr r3, [r3, #12]
801a6fa: 68fa ldr r2, [r7, #12]
801a6fc: 601a str r2, [r3, #0]
#if MEMP_SANITY_CHECK
LWIP_ASSERT("memp sanity", memp_sanity(desc));
#endif /* MEMP_SANITY_CHECK */
SYS_ARCH_UNPROTECT(old_level);
801a6fe: 68b8 ldr r0, [r7, #8]
801a700: f00c ff0c bl 802751c <sys_arch_unprotect>
#endif /* !MEMP_MEM_MALLOC */
}
801a704: bf00 nop
801a706: 3710 adds r7, #16
801a708: 46bd mov sp, r7
801a70a: bd80 pop {r7, pc}
801a70c: 0802efd4 .word 0x0802efd4
801a710: 0802f084 .word 0x0802f084
801a714: 0802f028 .word 0x0802f028
0801a718 <memp_free_pool>:
* @param desc the pool where to put mem
* @param mem the memp element to free
*/
void
memp_free_pool(const struct memp_desc *desc, void *mem)
{
801a718: b580 push {r7, lr}
801a71a: b082 sub sp, #8
801a71c: af00 add r7, sp, #0
801a71e: 6078 str r0, [r7, #4]
801a720: 6039 str r1, [r7, #0]
LWIP_ASSERT("invalid pool desc", desc != NULL);
801a722: 687b ldr r3, [r7, #4]
801a724: 2b00 cmp r3, #0
801a726: d106 bne.n 801a736 <memp_free_pool+0x1e>
801a728: 4b0a ldr r3, [pc, #40] @ (801a754 <memp_free_pool+0x3c>)
801a72a: f240 1295 movw r2, #405 @ 0x195
801a72e: 490a ldr r1, [pc, #40] @ (801a758 <memp_free_pool+0x40>)
801a730: 480a ldr r0, [pc, #40] @ (801a75c <memp_free_pool+0x44>)
801a732: f010 f97b bl 802aa2c <iprintf>
if ((desc == NULL) || (mem == NULL)) {
801a736: 687b ldr r3, [r7, #4]
801a738: 2b00 cmp r3, #0
801a73a: d007 beq.n 801a74c <memp_free_pool+0x34>
801a73c: 683b ldr r3, [r7, #0]
801a73e: 2b00 cmp r3, #0
801a740: d004 beq.n 801a74c <memp_free_pool+0x34>
return;
}
do_memp_free_pool(desc, mem);
801a742: 6839 ldr r1, [r7, #0]
801a744: 6878 ldr r0, [r7, #4]
801a746: f7ff ffbb bl 801a6c0 <do_memp_free_pool>
801a74a: e000 b.n 801a74e <memp_free_pool+0x36>
return;
801a74c: bf00 nop
}
801a74e: 3708 adds r7, #8
801a750: 46bd mov sp, r7
801a752: bd80 pop {r7, pc}
801a754: 0802efd4 .word 0x0802efd4
801a758: 0802f050 .word 0x0802f050
801a75c: 0802f028 .word 0x0802f028
0801a760 <memp_free>:
* @param type the pool where to put mem
* @param mem the memp element to free
*/
void
memp_free(memp_t type, void *mem)
{
801a760: b580 push {r7, lr}
801a762: b082 sub sp, #8
801a764: af00 add r7, sp, #0
801a766: 4603 mov r3, r0
801a768: 6039 str r1, [r7, #0]
801a76a: 71fb strb r3, [r7, #7]
#ifdef LWIP_HOOK_MEMP_AVAILABLE
struct memp *old_first;
#endif
LWIP_ERROR("memp_free: type < MEMP_MAX", (type < MEMP_MAX), return;);
801a76c: 79fb ldrb r3, [r7, #7]
801a76e: 2b0c cmp r3, #12
801a770: d907 bls.n 801a782 <memp_free+0x22>
801a772: 4b0c ldr r3, [pc, #48] @ (801a7a4 <memp_free+0x44>)
801a774: f44f 72d5 mov.w r2, #426 @ 0x1aa
801a778: 490b ldr r1, [pc, #44] @ (801a7a8 <memp_free+0x48>)
801a77a: 480c ldr r0, [pc, #48] @ (801a7ac <memp_free+0x4c>)
801a77c: f010 f956 bl 802aa2c <iprintf>
801a780: e00c b.n 801a79c <memp_free+0x3c>
if (mem == NULL) {
801a782: 683b ldr r3, [r7, #0]
801a784: 2b00 cmp r3, #0
801a786: d008 beq.n 801a79a <memp_free+0x3a>
#ifdef LWIP_HOOK_MEMP_AVAILABLE
old_first = *memp_pools[type]->tab;
#endif
do_memp_free_pool(memp_pools[type], mem);
801a788: 79fb ldrb r3, [r7, #7]
801a78a: 4a09 ldr r2, [pc, #36] @ (801a7b0 <memp_free+0x50>)
801a78c: f852 3023 ldr.w r3, [r2, r3, lsl #2]
801a790: 6839 ldr r1, [r7, #0]
801a792: 4618 mov r0, r3
801a794: f7ff ff94 bl 801a6c0 <do_memp_free_pool>
801a798: e000 b.n 801a79c <memp_free+0x3c>
return;
801a79a: bf00 nop
#ifdef LWIP_HOOK_MEMP_AVAILABLE
if (old_first == NULL) {
LWIP_HOOK_MEMP_AVAILABLE(type);
}
#endif
}
801a79c: 3708 adds r7, #8
801a79e: 46bd mov sp, r7
801a7a0: bd80 pop {r7, pc}
801a7a2: bf00 nop
801a7a4: 0802efd4 .word 0x0802efd4
801a7a8: 0802f0a4 .word 0x0802f0a4
801a7ac: 0802f028 .word 0x0802f028
801a7b0: 08031e44 .word 0x08031e44
0801a7b4 <netif_init>:
}
#endif /* LWIP_HAVE_LOOPIF */
void
netif_init(void)
{
801a7b4: b480 push {r7}
801a7b6: af00 add r7, sp, #0
netif_set_link_up(&loop_netif);
netif_set_up(&loop_netif);
#endif /* LWIP_HAVE_LOOPIF */
}
801a7b8: bf00 nop
801a7ba: 46bd mov sp, r7
801a7bc: f85d 7b04 ldr.w r7, [sp], #4
801a7c0: 4770 bx lr
...
0801a7c4 <netif_add>:
netif_add(struct netif *netif,
#if LWIP_IPV4
const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw,
#endif /* LWIP_IPV4 */
void *state, netif_init_fn init, netif_input_fn input)
{
801a7c4: b580 push {r7, lr}
801a7c6: b086 sub sp, #24
801a7c8: af00 add r7, sp, #0
801a7ca: 60f8 str r0, [r7, #12]
801a7cc: 60b9 str r1, [r7, #8]
801a7ce: 607a str r2, [r7, #4]
801a7d0: 603b str r3, [r7, #0]
#if LWIP_IPV6
s8_t i;
#endif
LWIP_ASSERT_CORE_LOCKED();
801a7d2: f7f6 fcff bl 80111d4 <sys_check_core_locking>
LWIP_ASSERT("single netif already set", 0);
return NULL;
}
#endif
LWIP_ERROR("netif_add: invalid netif", netif != NULL, return NULL);
801a7d6: 68fb ldr r3, [r7, #12]
801a7d8: 2b00 cmp r3, #0
801a7da: d108 bne.n 801a7ee <netif_add+0x2a>
801a7dc: 4b5b ldr r3, [pc, #364] @ (801a94c <netif_add+0x188>)
801a7de: f240 1227 movw r2, #295 @ 0x127
801a7e2: 495b ldr r1, [pc, #364] @ (801a950 <netif_add+0x18c>)
801a7e4: 485b ldr r0, [pc, #364] @ (801a954 <netif_add+0x190>)
801a7e6: f010 f921 bl 802aa2c <iprintf>
801a7ea: 2300 movs r3, #0
801a7ec: e0a9 b.n 801a942 <netif_add+0x17e>
LWIP_ERROR("netif_add: No init function given", init != NULL, return NULL);
801a7ee: 6a7b ldr r3, [r7, #36] @ 0x24
801a7f0: 2b00 cmp r3, #0
801a7f2: d108 bne.n 801a806 <netif_add+0x42>
801a7f4: 4b55 ldr r3, [pc, #340] @ (801a94c <netif_add+0x188>)
801a7f6: f44f 7294 mov.w r2, #296 @ 0x128
801a7fa: 4957 ldr r1, [pc, #348] @ (801a958 <netif_add+0x194>)
801a7fc: 4855 ldr r0, [pc, #340] @ (801a954 <netif_add+0x190>)
801a7fe: f010 f915 bl 802aa2c <iprintf>
801a802: 2300 movs r3, #0
801a804: e09d b.n 801a942 <netif_add+0x17e>
#if LWIP_IPV4
if (ipaddr == NULL) {
801a806: 68bb ldr r3, [r7, #8]
801a808: 2b00 cmp r3, #0
801a80a: d101 bne.n 801a810 <netif_add+0x4c>
ipaddr = ip_2_ip4(IP4_ADDR_ANY);
801a80c: 4b53 ldr r3, [pc, #332] @ (801a95c <netif_add+0x198>)
801a80e: 60bb str r3, [r7, #8]
}
if (netmask == NULL) {
801a810: 687b ldr r3, [r7, #4]
801a812: 2b00 cmp r3, #0
801a814: d101 bne.n 801a81a <netif_add+0x56>
netmask = ip_2_ip4(IP4_ADDR_ANY);
801a816: 4b51 ldr r3, [pc, #324] @ (801a95c <netif_add+0x198>)
801a818: 607b str r3, [r7, #4]
}
if (gw == NULL) {
801a81a: 683b ldr r3, [r7, #0]
801a81c: 2b00 cmp r3, #0
801a81e: d101 bne.n 801a824 <netif_add+0x60>
gw = ip_2_ip4(IP4_ADDR_ANY);
801a820: 4b4e ldr r3, [pc, #312] @ (801a95c <netif_add+0x198>)
801a822: 603b str r3, [r7, #0]
}
/* reset new interface configuration state */
ip_addr_set_zero_ip4(&netif->ip_addr);
801a824: 68fb ldr r3, [r7, #12]
801a826: 2200 movs r2, #0
801a828: 605a str r2, [r3, #4]
ip_addr_set_zero_ip4(&netif->netmask);
801a82a: 68fb ldr r3, [r7, #12]
801a82c: 2200 movs r2, #0
801a82e: 609a str r2, [r3, #8]
ip_addr_set_zero_ip4(&netif->gw);
801a830: 68fb ldr r3, [r7, #12]
801a832: 2200 movs r2, #0
801a834: 60da str r2, [r3, #12]
netif->output = netif_null_output_ip4;
801a836: 68fb ldr r3, [r7, #12]
801a838: 4a49 ldr r2, [pc, #292] @ (801a960 <netif_add+0x19c>)
801a83a: 615a str r2, [r3, #20]
#endif /* LWIP_IPV6_ADDRESS_LIFETIMES */
}
netif->output_ip6 = netif_null_output_ip6;
#endif /* LWIP_IPV6 */
NETIF_SET_CHECKSUM_CTRL(netif, NETIF_CHECKSUM_ENABLE_ALL);
netif->mtu = 0;
801a83c: 68fb ldr r3, [r7, #12]
801a83e: 2200 movs r2, #0
801a840: 851a strh r2, [r3, #40] @ 0x28
netif->flags = 0;
801a842: 68fb ldr r3, [r7, #12]
801a844: 2200 movs r2, #0
801a846: f883 2031 strb.w r2, [r3, #49] @ 0x31
#ifdef netif_get_client_data
memset(netif->client_data, 0, sizeof(netif->client_data));
801a84a: 68fb ldr r3, [r7, #12]
801a84c: 3324 adds r3, #36 @ 0x24
801a84e: 2204 movs r2, #4
801a850: 2100 movs r1, #0
801a852: 4618 mov r0, r3
801a854: f010 fa7c bl 802ad50 <memset>
#endif /* LWIP_IPV6 */
#if LWIP_NETIF_STATUS_CALLBACK
netif->status_callback = NULL;
#endif /* LWIP_NETIF_STATUS_CALLBACK */
#if LWIP_NETIF_LINK_CALLBACK
netif->link_callback = NULL;
801a858: 68fb ldr r3, [r7, #12]
801a85a: 2200 movs r2, #0
801a85c: 61da str r2, [r3, #28]
netif->loop_first = NULL;
netif->loop_last = NULL;
#endif /* ENABLE_LOOPBACK */
/* remember netif specific state information data */
netif->state = state;
801a85e: 68fb ldr r3, [r7, #12]
801a860: 6a3a ldr r2, [r7, #32]
801a862: 621a str r2, [r3, #32]
netif->num = netif_num;
801a864: 4b3f ldr r3, [pc, #252] @ (801a964 <netif_add+0x1a0>)
801a866: 781a ldrb r2, [r3, #0]
801a868: 68fb ldr r3, [r7, #12]
801a86a: f883 2034 strb.w r2, [r3, #52] @ 0x34
netif->input = input;
801a86e: 68fb ldr r3, [r7, #12]
801a870: 6aba ldr r2, [r7, #40] @ 0x28
801a872: 611a str r2, [r3, #16]
#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS
netif->loop_cnt_current = 0;
#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */
#if LWIP_IPV4
netif_set_addr(netif, ipaddr, netmask, gw);
801a874: 683b ldr r3, [r7, #0]
801a876: 687a ldr r2, [r7, #4]
801a878: 68b9 ldr r1, [r7, #8]
801a87a: 68f8 ldr r0, [r7, #12]
801a87c: f000 f914 bl 801aaa8 <netif_set_addr>
#endif /* LWIP_IPV4 */
/* call user specified initialization function for netif */
if (init(netif) != ERR_OK) {
801a880: 6a7b ldr r3, [r7, #36] @ 0x24
801a882: 68f8 ldr r0, [r7, #12]
801a884: 4798 blx r3
801a886: 4603 mov r3, r0
801a888: 2b00 cmp r3, #0
801a88a: d001 beq.n 801a890 <netif_add+0xcc>
return NULL;
801a88c: 2300 movs r3, #0
801a88e: e058 b.n 801a942 <netif_add+0x17e>
*/
{
struct netif *netif2;
int num_netifs;
do {
if (netif->num == 255) {
801a890: 68fb ldr r3, [r7, #12]
801a892: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
801a896: 2bff cmp r3, #255 @ 0xff
801a898: d103 bne.n 801a8a2 <netif_add+0xde>
netif->num = 0;
801a89a: 68fb ldr r3, [r7, #12]
801a89c: 2200 movs r2, #0
801a89e: f883 2034 strb.w r2, [r3, #52] @ 0x34
}
num_netifs = 0;
801a8a2: 2300 movs r3, #0
801a8a4: 613b str r3, [r7, #16]
for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
801a8a6: 4b30 ldr r3, [pc, #192] @ (801a968 <netif_add+0x1a4>)
801a8a8: 681b ldr r3, [r3, #0]
801a8aa: 617b str r3, [r7, #20]
801a8ac: e02b b.n 801a906 <netif_add+0x142>
LWIP_ASSERT("netif already added", netif2 != netif);
801a8ae: 697a ldr r2, [r7, #20]
801a8b0: 68fb ldr r3, [r7, #12]
801a8b2: 429a cmp r2, r3
801a8b4: d106 bne.n 801a8c4 <netif_add+0x100>
801a8b6: 4b25 ldr r3, [pc, #148] @ (801a94c <netif_add+0x188>)
801a8b8: f240 128b movw r2, #395 @ 0x18b
801a8bc: 492b ldr r1, [pc, #172] @ (801a96c <netif_add+0x1a8>)
801a8be: 4825 ldr r0, [pc, #148] @ (801a954 <netif_add+0x190>)
801a8c0: f010 f8b4 bl 802aa2c <iprintf>
num_netifs++;
801a8c4: 693b ldr r3, [r7, #16]
801a8c6: 3301 adds r3, #1
801a8c8: 613b str r3, [r7, #16]
LWIP_ASSERT("too many netifs, max. supported number is 255", num_netifs <= 255);
801a8ca: 693b ldr r3, [r7, #16]
801a8cc: 2bff cmp r3, #255 @ 0xff
801a8ce: dd06 ble.n 801a8de <netif_add+0x11a>
801a8d0: 4b1e ldr r3, [pc, #120] @ (801a94c <netif_add+0x188>)
801a8d2: f240 128d movw r2, #397 @ 0x18d
801a8d6: 4926 ldr r1, [pc, #152] @ (801a970 <netif_add+0x1ac>)
801a8d8: 481e ldr r0, [pc, #120] @ (801a954 <netif_add+0x190>)
801a8da: f010 f8a7 bl 802aa2c <iprintf>
if (netif2->num == netif->num) {
801a8de: 697b ldr r3, [r7, #20]
801a8e0: f893 2034 ldrb.w r2, [r3, #52] @ 0x34
801a8e4: 68fb ldr r3, [r7, #12]
801a8e6: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
801a8ea: 429a cmp r2, r3
801a8ec: d108 bne.n 801a900 <netif_add+0x13c>
netif->num++;
801a8ee: 68fb ldr r3, [r7, #12]
801a8f0: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
801a8f4: 3301 adds r3, #1
801a8f6: b2da uxtb r2, r3
801a8f8: 68fb ldr r3, [r7, #12]
801a8fa: f883 2034 strb.w r2, [r3, #52] @ 0x34
break;
801a8fe: e005 b.n 801a90c <netif_add+0x148>
for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
801a900: 697b ldr r3, [r7, #20]
801a902: 681b ldr r3, [r3, #0]
801a904: 617b str r3, [r7, #20]
801a906: 697b ldr r3, [r7, #20]
801a908: 2b00 cmp r3, #0
801a90a: d1d0 bne.n 801a8ae <netif_add+0xea>
}
}
} while (netif2 != NULL);
801a90c: 697b ldr r3, [r7, #20]
801a90e: 2b00 cmp r3, #0
801a910: d1be bne.n 801a890 <netif_add+0xcc>
}
if (netif->num == 254) {
801a912: 68fb ldr r3, [r7, #12]
801a914: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
801a918: 2bfe cmp r3, #254 @ 0xfe
801a91a: d103 bne.n 801a924 <netif_add+0x160>
netif_num = 0;
801a91c: 4b11 ldr r3, [pc, #68] @ (801a964 <netif_add+0x1a0>)
801a91e: 2200 movs r2, #0
801a920: 701a strb r2, [r3, #0]
801a922: e006 b.n 801a932 <netif_add+0x16e>
} else {
netif_num = (u8_t)(netif->num + 1);
801a924: 68fb ldr r3, [r7, #12]
801a926: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
801a92a: 3301 adds r3, #1
801a92c: b2da uxtb r2, r3
801a92e: 4b0d ldr r3, [pc, #52] @ (801a964 <netif_add+0x1a0>)
801a930: 701a strb r2, [r3, #0]
}
/* add this netif to the list */
netif->next = netif_list;
801a932: 4b0d ldr r3, [pc, #52] @ (801a968 <netif_add+0x1a4>)
801a934: 681a ldr r2, [r3, #0]
801a936: 68fb ldr r3, [r7, #12]
801a938: 601a str r2, [r3, #0]
netif_list = netif;
801a93a: 4a0b ldr r2, [pc, #44] @ (801a968 <netif_add+0x1a4>)
801a93c: 68fb ldr r3, [r7, #12]
801a93e: 6013 str r3, [r2, #0]
#endif /* LWIP_IPV4 */
LWIP_DEBUGF(NETIF_DEBUG, ("\n"));
netif_invoke_ext_callback(netif, LWIP_NSC_NETIF_ADDED, NULL);
return netif;
801a940: 68fb ldr r3, [r7, #12]
}
801a942: 4618 mov r0, r3
801a944: 3718 adds r7, #24
801a946: 46bd mov sp, r7
801a948: bd80 pop {r7, pc}
801a94a: bf00 nop
801a94c: 0802f0c0 .word 0x0802f0c0
801a950: 0802f154 .word 0x0802f154
801a954: 0802f110 .word 0x0802f110
801a958: 0802f170 .word 0x0802f170
801a95c: 08031ec8 .word 0x08031ec8
801a960: 0801ad9f .word 0x0801ad9f
801a964: 2402afa4 .word 0x2402afa4
801a968: 2402af9c .word 0x2402af9c
801a96c: 0802f194 .word 0x0802f194
801a970: 0802f1a8 .word 0x0802f1a8
0801a974 <netif_do_ip_addr_changed>:
static void
netif_do_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
801a974: b580 push {r7, lr}
801a976: b082 sub sp, #8
801a978: af00 add r7, sp, #0
801a97a: 6078 str r0, [r7, #4]
801a97c: 6039 str r1, [r7, #0]
#if LWIP_TCP
tcp_netif_ip_addr_changed(old_addr, new_addr);
801a97e: 6839 ldr r1, [r7, #0]
801a980: 6878 ldr r0, [r7, #4]
801a982: f002 fe6f bl 801d664 <tcp_netif_ip_addr_changed>
#endif /* LWIP_TCP */
#if LWIP_UDP
udp_netif_ip_addr_changed(old_addr, new_addr);
801a986: 6839 ldr r1, [r7, #0]
801a988: 6878 ldr r0, [r7, #4]
801a98a: f008 f82b bl 80229e4 <udp_netif_ip_addr_changed>
#endif /* LWIP_UDP */
#if LWIP_RAW
raw_netif_ip_addr_changed(old_addr, new_addr);
#endif /* LWIP_RAW */
}
801a98e: bf00 nop
801a990: 3708 adds r7, #8
801a992: 46bd mov sp, r7
801a994: bd80 pop {r7, pc}
...
0801a998 <netif_do_set_ipaddr>:
#if LWIP_IPV4
static int
netif_do_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr, ip_addr_t *old_addr)
{
801a998: b580 push {r7, lr}
801a99a: b086 sub sp, #24
801a99c: af00 add r7, sp, #0
801a99e: 60f8 str r0, [r7, #12]
801a9a0: 60b9 str r1, [r7, #8]
801a9a2: 607a str r2, [r7, #4]
LWIP_ASSERT("invalid pointer", ipaddr != NULL);
801a9a4: 68bb ldr r3, [r7, #8]
801a9a6: 2b00 cmp r3, #0
801a9a8: d106 bne.n 801a9b8 <netif_do_set_ipaddr+0x20>
801a9aa: 4b1d ldr r3, [pc, #116] @ (801aa20 <netif_do_set_ipaddr+0x88>)
801a9ac: f240 12cb movw r2, #459 @ 0x1cb
801a9b0: 491c ldr r1, [pc, #112] @ (801aa24 <netif_do_set_ipaddr+0x8c>)
801a9b2: 481d ldr r0, [pc, #116] @ (801aa28 <netif_do_set_ipaddr+0x90>)
801a9b4: f010 f83a bl 802aa2c <iprintf>
LWIP_ASSERT("invalid pointer", old_addr != NULL);
801a9b8: 687b ldr r3, [r7, #4]
801a9ba: 2b00 cmp r3, #0
801a9bc: d106 bne.n 801a9cc <netif_do_set_ipaddr+0x34>
801a9be: 4b18 ldr r3, [pc, #96] @ (801aa20 <netif_do_set_ipaddr+0x88>)
801a9c0: f44f 72e6 mov.w r2, #460 @ 0x1cc
801a9c4: 4917 ldr r1, [pc, #92] @ (801aa24 <netif_do_set_ipaddr+0x8c>)
801a9c6: 4818 ldr r0, [pc, #96] @ (801aa28 <netif_do_set_ipaddr+0x90>)
801a9c8: f010 f830 bl 802aa2c <iprintf>
/* address is actually being changed? */
if (ip4_addr_cmp(ipaddr, netif_ip4_addr(netif)) == 0) {
801a9cc: 68bb ldr r3, [r7, #8]
801a9ce: 681a ldr r2, [r3, #0]
801a9d0: 68fb ldr r3, [r7, #12]
801a9d2: 3304 adds r3, #4
801a9d4: 681b ldr r3, [r3, #0]
801a9d6: 429a cmp r2, r3
801a9d8: d01c beq.n 801aa14 <netif_do_set_ipaddr+0x7c>
ip_addr_t new_addr;
*ip_2_ip4(&new_addr) = *ipaddr;
801a9da: 68bb ldr r3, [r7, #8]
801a9dc: 681b ldr r3, [r3, #0]
801a9de: 617b str r3, [r7, #20]
IP_SET_TYPE_VAL(new_addr, IPADDR_TYPE_V4);
ip_addr_copy(*old_addr, *netif_ip_addr4(netif));
801a9e0: 68fb ldr r3, [r7, #12]
801a9e2: 3304 adds r3, #4
801a9e4: 681a ldr r2, [r3, #0]
801a9e6: 687b ldr r3, [r7, #4]
801a9e8: 601a str r2, [r3, #0]
LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n"));
netif_do_ip_addr_changed(old_addr, &new_addr);
801a9ea: f107 0314 add.w r3, r7, #20
801a9ee: 4619 mov r1, r3
801a9f0: 6878 ldr r0, [r7, #4]
801a9f2: f7ff ffbf bl 801a974 <netif_do_ip_addr_changed>
mib2_remove_ip4(netif);
mib2_remove_route_ip4(0, netif);
/* set new IP address to netif */
ip4_addr_set(ip_2_ip4(&netif->ip_addr), ipaddr);
801a9f6: 68bb ldr r3, [r7, #8]
801a9f8: 2b00 cmp r3, #0
801a9fa: d002 beq.n 801aa02 <netif_do_set_ipaddr+0x6a>
801a9fc: 68bb ldr r3, [r7, #8]
801a9fe: 681b ldr r3, [r3, #0]
801aa00: e000 b.n 801aa04 <netif_do_set_ipaddr+0x6c>
801aa02: 2300 movs r3, #0
801aa04: 68fa ldr r2, [r7, #12]
801aa06: 6053 str r3, [r2, #4]
IP_SET_TYPE_VAL(netif->ip_addr, IPADDR_TYPE_V4);
mib2_add_ip4(netif);
mib2_add_route_ip4(0, netif);
netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4);
801aa08: 2101 movs r1, #1
801aa0a: 68f8 ldr r0, [r7, #12]
801aa0c: f000 f8d6 bl 801abbc <netif_issue_reports>
NETIF_STATUS_CALLBACK(netif);
return 1; /* address changed */
801aa10: 2301 movs r3, #1
801aa12: e000 b.n 801aa16 <netif_do_set_ipaddr+0x7e>
}
return 0; /* address unchanged */
801aa14: 2300 movs r3, #0
}
801aa16: 4618 mov r0, r3
801aa18: 3718 adds r7, #24
801aa1a: 46bd mov sp, r7
801aa1c: bd80 pop {r7, pc}
801aa1e: bf00 nop
801aa20: 0802f0c0 .word 0x0802f0c0
801aa24: 0802f1d8 .word 0x0802f1d8
801aa28: 0802f110 .word 0x0802f110
0801aa2c <netif_do_set_netmask>:
}
}
static int
netif_do_set_netmask(struct netif *netif, const ip4_addr_t *netmask, ip_addr_t *old_nm)
{
801aa2c: b480 push {r7}
801aa2e: b085 sub sp, #20
801aa30: af00 add r7, sp, #0
801aa32: 60f8 str r0, [r7, #12]
801aa34: 60b9 str r1, [r7, #8]
801aa36: 607a str r2, [r7, #4]
/* address is actually being changed? */
if (ip4_addr_cmp(netmask, netif_ip4_netmask(netif)) == 0) {
801aa38: 68bb ldr r3, [r7, #8]
801aa3a: 681a ldr r2, [r3, #0]
801aa3c: 68fb ldr r3, [r7, #12]
801aa3e: 3308 adds r3, #8
801aa40: 681b ldr r3, [r3, #0]
801aa42: 429a cmp r2, r3
801aa44: d00a beq.n 801aa5c <netif_do_set_netmask+0x30>
#else
LWIP_UNUSED_ARG(old_nm);
#endif
mib2_remove_route_ip4(0, netif);
/* set new netmask to netif */
ip4_addr_set(ip_2_ip4(&netif->netmask), netmask);
801aa46: 68bb ldr r3, [r7, #8]
801aa48: 2b00 cmp r3, #0
801aa4a: d002 beq.n 801aa52 <netif_do_set_netmask+0x26>
801aa4c: 68bb ldr r3, [r7, #8]
801aa4e: 681b ldr r3, [r3, #0]
801aa50: e000 b.n 801aa54 <netif_do_set_netmask+0x28>
801aa52: 2300 movs r3, #0
801aa54: 68fa ldr r2, [r7, #12]
801aa56: 6093 str r3, [r2, #8]
netif->name[0], netif->name[1],
ip4_addr1_16(netif_ip4_netmask(netif)),
ip4_addr2_16(netif_ip4_netmask(netif)),
ip4_addr3_16(netif_ip4_netmask(netif)),
ip4_addr4_16(netif_ip4_netmask(netif))));
return 1; /* netmask changed */
801aa58: 2301 movs r3, #1
801aa5a: e000 b.n 801aa5e <netif_do_set_netmask+0x32>
}
return 0; /* netmask unchanged */
801aa5c: 2300 movs r3, #0
}
801aa5e: 4618 mov r0, r3
801aa60: 3714 adds r7, #20
801aa62: 46bd mov sp, r7
801aa64: f85d 7b04 ldr.w r7, [sp], #4
801aa68: 4770 bx lr
0801aa6a <netif_do_set_gw>:
}
}
static int
netif_do_set_gw(struct netif *netif, const ip4_addr_t *gw, ip_addr_t *old_gw)
{
801aa6a: b480 push {r7}
801aa6c: b085 sub sp, #20
801aa6e: af00 add r7, sp, #0
801aa70: 60f8 str r0, [r7, #12]
801aa72: 60b9 str r1, [r7, #8]
801aa74: 607a str r2, [r7, #4]
/* address is actually being changed? */
if (ip4_addr_cmp(gw, netif_ip4_gw(netif)) == 0) {
801aa76: 68bb ldr r3, [r7, #8]
801aa78: 681a ldr r2, [r3, #0]
801aa7a: 68fb ldr r3, [r7, #12]
801aa7c: 330c adds r3, #12
801aa7e: 681b ldr r3, [r3, #0]
801aa80: 429a cmp r2, r3
801aa82: d00a beq.n 801aa9a <netif_do_set_gw+0x30>
ip_addr_copy(*old_gw, *netif_ip_gw4(netif));
#else
LWIP_UNUSED_ARG(old_gw);
#endif
ip4_addr_set(ip_2_ip4(&netif->gw), gw);
801aa84: 68bb ldr r3, [r7, #8]
801aa86: 2b00 cmp r3, #0
801aa88: d002 beq.n 801aa90 <netif_do_set_gw+0x26>
801aa8a: 68bb ldr r3, [r7, #8]
801aa8c: 681b ldr r3, [r3, #0]
801aa8e: e000 b.n 801aa92 <netif_do_set_gw+0x28>
801aa90: 2300 movs r3, #0
801aa92: 68fa ldr r2, [r7, #12]
801aa94: 60d3 str r3, [r2, #12]
netif->name[0], netif->name[1],
ip4_addr1_16(netif_ip4_gw(netif)),
ip4_addr2_16(netif_ip4_gw(netif)),
ip4_addr3_16(netif_ip4_gw(netif)),
ip4_addr4_16(netif_ip4_gw(netif))));
return 1; /* gateway changed */
801aa96: 2301 movs r3, #1
801aa98: e000 b.n 801aa9c <netif_do_set_gw+0x32>
}
return 0; /* gateway unchanged */
801aa9a: 2300 movs r3, #0
}
801aa9c: 4618 mov r0, r3
801aa9e: 3714 adds r7, #20
801aaa0: 46bd mov sp, r7
801aaa2: f85d 7b04 ldr.w r7, [sp], #4
801aaa6: 4770 bx lr
0801aaa8 <netif_set_addr>:
* @param gw the new default gateway
*/
void
netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask,
const ip4_addr_t *gw)
{
801aaa8: b580 push {r7, lr}
801aaaa: b088 sub sp, #32
801aaac: af00 add r7, sp, #0
801aaae: 60f8 str r0, [r7, #12]
801aab0: 60b9 str r1, [r7, #8]
801aab2: 607a str r2, [r7, #4]
801aab4: 603b str r3, [r7, #0]
ip_addr_t old_nm_val;
ip_addr_t old_gw_val;
ip_addr_t *old_nm = &old_nm_val;
ip_addr_t *old_gw = &old_gw_val;
#else
ip_addr_t *old_nm = NULL;
801aab6: 2300 movs r3, #0
801aab8: 61fb str r3, [r7, #28]
ip_addr_t *old_gw = NULL;
801aaba: 2300 movs r3, #0
801aabc: 61bb str r3, [r7, #24]
#endif
ip_addr_t old_addr;
int remove;
LWIP_ASSERT_CORE_LOCKED();
801aabe: f7f6 fb89 bl 80111d4 <sys_check_core_locking>
/* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
if (ipaddr == NULL) {
801aac2: 68bb ldr r3, [r7, #8]
801aac4: 2b00 cmp r3, #0
801aac6: d101 bne.n 801aacc <netif_set_addr+0x24>
ipaddr = IP4_ADDR_ANY4;
801aac8: 4b1c ldr r3, [pc, #112] @ (801ab3c <netif_set_addr+0x94>)
801aaca: 60bb str r3, [r7, #8]
}
if (netmask == NULL) {
801aacc: 687b ldr r3, [r7, #4]
801aace: 2b00 cmp r3, #0
801aad0: d101 bne.n 801aad6 <netif_set_addr+0x2e>
netmask = IP4_ADDR_ANY4;
801aad2: 4b1a ldr r3, [pc, #104] @ (801ab3c <netif_set_addr+0x94>)
801aad4: 607b str r3, [r7, #4]
}
if (gw == NULL) {
801aad6: 683b ldr r3, [r7, #0]
801aad8: 2b00 cmp r3, #0
801aada: d101 bne.n 801aae0 <netif_set_addr+0x38>
gw = IP4_ADDR_ANY4;
801aadc: 4b17 ldr r3, [pc, #92] @ (801ab3c <netif_set_addr+0x94>)
801aade: 603b str r3, [r7, #0]
}
remove = ip4_addr_isany(ipaddr);
801aae0: 68bb ldr r3, [r7, #8]
801aae2: 2b00 cmp r3, #0
801aae4: d003 beq.n 801aaee <netif_set_addr+0x46>
801aae6: 68bb ldr r3, [r7, #8]
801aae8: 681b ldr r3, [r3, #0]
801aaea: 2b00 cmp r3, #0
801aaec: d101 bne.n 801aaf2 <netif_set_addr+0x4a>
801aaee: 2301 movs r3, #1
801aaf0: e000 b.n 801aaf4 <netif_set_addr+0x4c>
801aaf2: 2300 movs r3, #0
801aaf4: 617b str r3, [r7, #20]
if (remove) {
801aaf6: 697b ldr r3, [r7, #20]
801aaf8: 2b00 cmp r3, #0
801aafa: d006 beq.n 801ab0a <netif_set_addr+0x62>
/* when removing an address, we have to remove it *before* changing netmask/gw
to ensure that tcp RST segment can be sent correctly */
if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
801aafc: f107 0310 add.w r3, r7, #16
801ab00: 461a mov r2, r3
801ab02: 68b9 ldr r1, [r7, #8]
801ab04: 68f8 ldr r0, [r7, #12]
801ab06: f7ff ff47 bl 801a998 <netif_do_set_ipaddr>
change_reason |= LWIP_NSC_IPV4_ADDRESS_CHANGED;
cb_args.ipv4_changed.old_address = &old_addr;
#endif
}
}
if (netif_do_set_netmask(netif, netmask, old_nm)) {
801ab0a: 69fa ldr r2, [r7, #28]
801ab0c: 6879 ldr r1, [r7, #4]
801ab0e: 68f8 ldr r0, [r7, #12]
801ab10: f7ff ff8c bl 801aa2c <netif_do_set_netmask>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
change_reason |= LWIP_NSC_IPV4_NETMASK_CHANGED;
cb_args.ipv4_changed.old_netmask = old_nm;
#endif
}
if (netif_do_set_gw(netif, gw, old_gw)) {
801ab14: 69ba ldr r2, [r7, #24]
801ab16: 6839 ldr r1, [r7, #0]
801ab18: 68f8 ldr r0, [r7, #12]
801ab1a: f7ff ffa6 bl 801aa6a <netif_do_set_gw>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
change_reason |= LWIP_NSC_IPV4_GATEWAY_CHANGED;
cb_args.ipv4_changed.old_gw = old_gw;
#endif
}
if (!remove) {
801ab1e: 697b ldr r3, [r7, #20]
801ab20: 2b00 cmp r3, #0
801ab22: d106 bne.n 801ab32 <netif_set_addr+0x8a>
/* set ipaddr last to ensure netmask/gw have been set when status callback is called */
if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
801ab24: f107 0310 add.w r3, r7, #16
801ab28: 461a mov r2, r3
801ab2a: 68b9 ldr r1, [r7, #8]
801ab2c: 68f8 ldr r0, [r7, #12]
801ab2e: f7ff ff33 bl 801a998 <netif_do_set_ipaddr>
if (change_reason != LWIP_NSC_NONE) {
change_reason |= LWIP_NSC_IPV4_SETTINGS_CHANGED;
netif_invoke_ext_callback(netif, change_reason, &cb_args);
}
#endif
}
801ab32: bf00 nop
801ab34: 3720 adds r7, #32
801ab36: 46bd mov sp, r7
801ab38: bd80 pop {r7, pc}
801ab3a: bf00 nop
801ab3c: 08031ec8 .word 0x08031ec8
0801ab40 <netif_set_default>:
*
* @param netif the default network interface
*/
void
netif_set_default(struct netif *netif)
{
801ab40: b580 push {r7, lr}
801ab42: b082 sub sp, #8
801ab44: af00 add r7, sp, #0
801ab46: 6078 str r0, [r7, #4]
LWIP_ASSERT_CORE_LOCKED();
801ab48: f7f6 fb44 bl 80111d4 <sys_check_core_locking>
mib2_remove_route_ip4(1, netif);
} else {
/* install default route */
mib2_add_route_ip4(1, netif);
}
netif_default = netif;
801ab4c: 4a03 ldr r2, [pc, #12] @ (801ab5c <netif_set_default+0x1c>)
801ab4e: 687b ldr r3, [r7, #4]
801ab50: 6013 str r3, [r2, #0]
LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n",
netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\''));
}
801ab52: bf00 nop
801ab54: 3708 adds r7, #8
801ab56: 46bd mov sp, r7
801ab58: bd80 pop {r7, pc}
801ab5a: bf00 nop
801ab5c: 2402afa0 .word 0x2402afa0
0801ab60 <netif_set_up>:
* Bring an interface up, available for processing
* traffic.
*/
void
netif_set_up(struct netif *netif)
{
801ab60: b580 push {r7, lr}
801ab62: b082 sub sp, #8
801ab64: af00 add r7, sp, #0
801ab66: 6078 str r0, [r7, #4]
LWIP_ASSERT_CORE_LOCKED();
801ab68: f7f6 fb34 bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("netif_set_up: invalid netif", netif != NULL, return);
801ab6c: 687b ldr r3, [r7, #4]
801ab6e: 2b00 cmp r3, #0
801ab70: d107 bne.n 801ab82 <netif_set_up+0x22>
801ab72: 4b0f ldr r3, [pc, #60] @ (801abb0 <netif_set_up+0x50>)
801ab74: f44f 7254 mov.w r2, #848 @ 0x350
801ab78: 490e ldr r1, [pc, #56] @ (801abb4 <netif_set_up+0x54>)
801ab7a: 480f ldr r0, [pc, #60] @ (801abb8 <netif_set_up+0x58>)
801ab7c: f00f ff56 bl 802aa2c <iprintf>
801ab80: e013 b.n 801abaa <netif_set_up+0x4a>
if (!(netif->flags & NETIF_FLAG_UP)) {
801ab82: 687b ldr r3, [r7, #4]
801ab84: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801ab88: f003 0301 and.w r3, r3, #1
801ab8c: 2b00 cmp r3, #0
801ab8e: d10c bne.n 801abaa <netif_set_up+0x4a>
netif_set_flags(netif, NETIF_FLAG_UP);
801ab90: 687b ldr r3, [r7, #4]
801ab92: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801ab96: f043 0301 orr.w r3, r3, #1
801ab9a: b2da uxtb r2, r3
801ab9c: 687b ldr r3, [r7, #4]
801ab9e: f883 2031 strb.w r2, [r3, #49] @ 0x31
args.status_changed.state = 1;
netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
}
#endif
netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
801aba2: 2103 movs r1, #3
801aba4: 6878 ldr r0, [r7, #4]
801aba6: f000 f809 bl 801abbc <netif_issue_reports>
#if LWIP_IPV6
nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */
}
}
801abaa: 3708 adds r7, #8
801abac: 46bd mov sp, r7
801abae: bd80 pop {r7, pc}
801abb0: 0802f0c0 .word 0x0802f0c0
801abb4: 0802f248 .word 0x0802f248
801abb8: 0802f110 .word 0x0802f110
0801abbc <netif_issue_reports>:
/** Send ARP/IGMP/MLD/RS events, e.g. on link-up/netif-up or addr-change
*/
static void
netif_issue_reports(struct netif *netif, u8_t report_type)
{
801abbc: b580 push {r7, lr}
801abbe: b082 sub sp, #8
801abc0: af00 add r7, sp, #0
801abc2: 6078 str r0, [r7, #4]
801abc4: 460b mov r3, r1
801abc6: 70fb strb r3, [r7, #3]
LWIP_ASSERT("netif_issue_reports: invalid netif", netif != NULL);
801abc8: 687b ldr r3, [r7, #4]
801abca: 2b00 cmp r3, #0
801abcc: d106 bne.n 801abdc <netif_issue_reports+0x20>
801abce: 4b18 ldr r3, [pc, #96] @ (801ac30 <netif_issue_reports+0x74>)
801abd0: f240 326d movw r2, #877 @ 0x36d
801abd4: 4917 ldr r1, [pc, #92] @ (801ac34 <netif_issue_reports+0x78>)
801abd6: 4818 ldr r0, [pc, #96] @ (801ac38 <netif_issue_reports+0x7c>)
801abd8: f00f ff28 bl 802aa2c <iprintf>
/* Only send reports when both link and admin states are up */
if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
801abdc: 687b ldr r3, [r7, #4]
801abde: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801abe2: f003 0304 and.w r3, r3, #4
801abe6: 2b00 cmp r3, #0
801abe8: d01e beq.n 801ac28 <netif_issue_reports+0x6c>
!(netif->flags & NETIF_FLAG_UP)) {
801abea: 687b ldr r3, [r7, #4]
801abec: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801abf0: f003 0301 and.w r3, r3, #1
if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
801abf4: 2b00 cmp r3, #0
801abf6: d017 beq.n 801ac28 <netif_issue_reports+0x6c>
return;
}
#if LWIP_IPV4
if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
801abf8: 78fb ldrb r3, [r7, #3]
801abfa: f003 0301 and.w r3, r3, #1
801abfe: 2b00 cmp r3, #0
801ac00: d013 beq.n 801ac2a <netif_issue_reports+0x6e>
!ip4_addr_isany_val(*netif_ip4_addr(netif))) {
801ac02: 687b ldr r3, [r7, #4]
801ac04: 3304 adds r3, #4
801ac06: 681b ldr r3, [r3, #0]
if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
801ac08: 2b00 cmp r3, #0
801ac0a: d00e beq.n 801ac2a <netif_issue_reports+0x6e>
#if LWIP_ARP
/* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */
if (netif->flags & (NETIF_FLAG_ETHARP)) {
801ac0c: 687b ldr r3, [r7, #4]
801ac0e: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801ac12: f003 0308 and.w r3, r3, #8
801ac16: 2b00 cmp r3, #0
801ac18: d007 beq.n 801ac2a <netif_issue_reports+0x6e>
etharp_gratuitous(netif);
801ac1a: 687b ldr r3, [r7, #4]
801ac1c: 3304 adds r3, #4
801ac1e: 4619 mov r1, r3
801ac20: 6878 ldr r0, [r7, #4]
801ac22: f00a fd2b bl 802567c <etharp_request>
801ac26: e000 b.n 801ac2a <netif_issue_reports+0x6e>
return;
801ac28: bf00 nop
/* send mld memberships */
mld6_report_groups(netif);
#endif /* LWIP_IPV6_MLD */
}
#endif /* LWIP_IPV6 */
}
801ac2a: 3708 adds r7, #8
801ac2c: 46bd mov sp, r7
801ac2e: bd80 pop {r7, pc}
801ac30: 0802f0c0 .word 0x0802f0c0
801ac34: 0802f264 .word 0x0802f264
801ac38: 0802f110 .word 0x0802f110
0801ac3c <netif_set_down>:
* @ingroup netif
* Bring an interface down, disabling any traffic processing.
*/
void
netif_set_down(struct netif *netif)
{
801ac3c: b580 push {r7, lr}
801ac3e: b082 sub sp, #8
801ac40: af00 add r7, sp, #0
801ac42: 6078 str r0, [r7, #4]
LWIP_ASSERT_CORE_LOCKED();
801ac44: f7f6 fac6 bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("netif_set_down: invalid netif", netif != NULL, return);
801ac48: 687b ldr r3, [r7, #4]
801ac4a: 2b00 cmp r3, #0
801ac4c: d107 bne.n 801ac5e <netif_set_down+0x22>
801ac4e: 4b12 ldr r3, [pc, #72] @ (801ac98 <netif_set_down+0x5c>)
801ac50: f240 329b movw r2, #923 @ 0x39b
801ac54: 4911 ldr r1, [pc, #68] @ (801ac9c <netif_set_down+0x60>)
801ac56: 4812 ldr r0, [pc, #72] @ (801aca0 <netif_set_down+0x64>)
801ac58: f00f fee8 bl 802aa2c <iprintf>
801ac5c: e019 b.n 801ac92 <netif_set_down+0x56>
if (netif->flags & NETIF_FLAG_UP) {
801ac5e: 687b ldr r3, [r7, #4]
801ac60: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801ac64: f003 0301 and.w r3, r3, #1
801ac68: 2b00 cmp r3, #0
801ac6a: d012 beq.n 801ac92 <netif_set_down+0x56>
args.status_changed.state = 0;
netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
}
#endif
netif_clear_flags(netif, NETIF_FLAG_UP);
801ac6c: 687b ldr r3, [r7, #4]
801ac6e: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801ac72: f023 0301 bic.w r3, r3, #1
801ac76: b2da uxtb r2, r3
801ac78: 687b ldr r3, [r7, #4]
801ac7a: f883 2031 strb.w r2, [r3, #49] @ 0x31
MIB2_COPY_SYSUPTIME_TO(&netif->ts);
#if LWIP_IPV4 && LWIP_ARP
if (netif->flags & NETIF_FLAG_ETHARP) {
801ac7e: 687b ldr r3, [r7, #4]
801ac80: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801ac84: f003 0308 and.w r3, r3, #8
801ac88: 2b00 cmp r3, #0
801ac8a: d002 beq.n 801ac92 <netif_set_down+0x56>
etharp_cleanup_netif(netif);
801ac8c: 6878 ldr r0, [r7, #4]
801ac8e: f00a f8ab bl 8024de8 <etharp_cleanup_netif>
nd6_cleanup_netif(netif);
#endif /* LWIP_IPV6 */
NETIF_STATUS_CALLBACK(netif);
}
}
801ac92: 3708 adds r7, #8
801ac94: 46bd mov sp, r7
801ac96: bd80 pop {r7, pc}
801ac98: 0802f0c0 .word 0x0802f0c0
801ac9c: 0802f288 .word 0x0802f288
801aca0: 0802f110 .word 0x0802f110
0801aca4 <netif_set_link_up>:
* @ingroup netif
* Called by a driver when its link goes up
*/
void
netif_set_link_up(struct netif *netif)
{
801aca4: b580 push {r7, lr}
801aca6: b082 sub sp, #8
801aca8: af00 add r7, sp, #0
801acaa: 6078 str r0, [r7, #4]
LWIP_ASSERT_CORE_LOCKED();
801acac: f7f6 fa92 bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("netif_set_link_up: invalid netif", netif != NULL, return);
801acb0: 687b ldr r3, [r7, #4]
801acb2: 2b00 cmp r3, #0
801acb4: d107 bne.n 801acc6 <netif_set_link_up+0x22>
801acb6: 4b15 ldr r3, [pc, #84] @ (801ad0c <netif_set_link_up+0x68>)
801acb8: f44f 7278 mov.w r2, #992 @ 0x3e0
801acbc: 4914 ldr r1, [pc, #80] @ (801ad10 <netif_set_link_up+0x6c>)
801acbe: 4815 ldr r0, [pc, #84] @ (801ad14 <netif_set_link_up+0x70>)
801acc0: f00f feb4 bl 802aa2c <iprintf>
801acc4: e01e b.n 801ad04 <netif_set_link_up+0x60>
if (!(netif->flags & NETIF_FLAG_LINK_UP)) {
801acc6: 687b ldr r3, [r7, #4]
801acc8: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801accc: f003 0304 and.w r3, r3, #4
801acd0: 2b00 cmp r3, #0
801acd2: d117 bne.n 801ad04 <netif_set_link_up+0x60>
netif_set_flags(netif, NETIF_FLAG_LINK_UP);
801acd4: 687b ldr r3, [r7, #4]
801acd6: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801acda: f043 0304 orr.w r3, r3, #4
801acde: b2da uxtb r2, r3
801ace0: 687b ldr r3, [r7, #4]
801ace2: f883 2031 strb.w r2, [r3, #49] @ 0x31
#if LWIP_DHCP
dhcp_network_changed(netif);
801ace6: 6878 ldr r0, [r7, #4]
801ace8: f008 faaa bl 8023240 <dhcp_network_changed>
#if LWIP_AUTOIP
autoip_network_changed(netif);
#endif /* LWIP_AUTOIP */
netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
801acec: 2103 movs r1, #3
801acee: 6878 ldr r0, [r7, #4]
801acf0: f7ff ff64 bl 801abbc <netif_issue_reports>
#if LWIP_IPV6
nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */
NETIF_LINK_CALLBACK(netif);
801acf4: 687b ldr r3, [r7, #4]
801acf6: 69db ldr r3, [r3, #28]
801acf8: 2b00 cmp r3, #0
801acfa: d003 beq.n 801ad04 <netif_set_link_up+0x60>
801acfc: 687b ldr r3, [r7, #4]
801acfe: 69db ldr r3, [r3, #28]
801ad00: 6878 ldr r0, [r7, #4]
801ad02: 4798 blx r3
args.link_changed.state = 1;
netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
}
#endif
}
}
801ad04: 3708 adds r7, #8
801ad06: 46bd mov sp, r7
801ad08: bd80 pop {r7, pc}
801ad0a: bf00 nop
801ad0c: 0802f0c0 .word 0x0802f0c0
801ad10: 0802f2a8 .word 0x0802f2a8
801ad14: 0802f110 .word 0x0802f110
0801ad18 <netif_set_link_down>:
* @ingroup netif
* Called by a driver when its link goes down
*/
void
netif_set_link_down(struct netif *netif)
{
801ad18: b580 push {r7, lr}
801ad1a: b082 sub sp, #8
801ad1c: af00 add r7, sp, #0
801ad1e: 6078 str r0, [r7, #4]
LWIP_ASSERT_CORE_LOCKED();
801ad20: f7f6 fa58 bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("netif_set_link_down: invalid netif", netif != NULL, return);
801ad24: 687b ldr r3, [r7, #4]
801ad26: 2b00 cmp r3, #0
801ad28: d107 bne.n 801ad3a <netif_set_link_down+0x22>
801ad2a: 4b11 ldr r3, [pc, #68] @ (801ad70 <netif_set_link_down+0x58>)
801ad2c: f240 4206 movw r2, #1030 @ 0x406
801ad30: 4910 ldr r1, [pc, #64] @ (801ad74 <netif_set_link_down+0x5c>)
801ad32: 4811 ldr r0, [pc, #68] @ (801ad78 <netif_set_link_down+0x60>)
801ad34: f00f fe7a bl 802aa2c <iprintf>
801ad38: e017 b.n 801ad6a <netif_set_link_down+0x52>
if (netif->flags & NETIF_FLAG_LINK_UP) {
801ad3a: 687b ldr r3, [r7, #4]
801ad3c: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801ad40: f003 0304 and.w r3, r3, #4
801ad44: 2b00 cmp r3, #0
801ad46: d010 beq.n 801ad6a <netif_set_link_down+0x52>
netif_clear_flags(netif, NETIF_FLAG_LINK_UP);
801ad48: 687b ldr r3, [r7, #4]
801ad4a: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
801ad4e: f023 0304 bic.w r3, r3, #4
801ad52: b2da uxtb r2, r3
801ad54: 687b ldr r3, [r7, #4]
801ad56: f883 2031 strb.w r2, [r3, #49] @ 0x31
NETIF_LINK_CALLBACK(netif);
801ad5a: 687b ldr r3, [r7, #4]
801ad5c: 69db ldr r3, [r3, #28]
801ad5e: 2b00 cmp r3, #0
801ad60: d003 beq.n 801ad6a <netif_set_link_down+0x52>
801ad62: 687b ldr r3, [r7, #4]
801ad64: 69db ldr r3, [r3, #28]
801ad66: 6878 ldr r0, [r7, #4]
801ad68: 4798 blx r3
args.link_changed.state = 0;
netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
}
#endif
}
}
801ad6a: 3708 adds r7, #8
801ad6c: 46bd mov sp, r7
801ad6e: bd80 pop {r7, pc}
801ad70: 0802f0c0 .word 0x0802f0c0
801ad74: 0802f2cc .word 0x0802f2cc
801ad78: 0802f110 .word 0x0802f110
0801ad7c <netif_set_link_callback>:
* @ingroup netif
* Set callback to be called when link is brought up/down
*/
void
netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback)
{
801ad7c: b580 push {r7, lr}
801ad7e: b082 sub sp, #8
801ad80: af00 add r7, sp, #0
801ad82: 6078 str r0, [r7, #4]
801ad84: 6039 str r1, [r7, #0]
LWIP_ASSERT_CORE_LOCKED();
801ad86: f7f6 fa25 bl 80111d4 <sys_check_core_locking>
if (netif) {
801ad8a: 687b ldr r3, [r7, #4]
801ad8c: 2b00 cmp r3, #0
801ad8e: d002 beq.n 801ad96 <netif_set_link_callback+0x1a>
netif->link_callback = link_callback;
801ad90: 687b ldr r3, [r7, #4]
801ad92: 683a ldr r2, [r7, #0]
801ad94: 61da str r2, [r3, #28]
}
}
801ad96: bf00 nop
801ad98: 3708 adds r7, #8
801ad9a: 46bd mov sp, r7
801ad9c: bd80 pop {r7, pc}
0801ad9e <netif_null_output_ip4>:
#if LWIP_IPV4
/** Dummy IPv4 output function for netifs not supporting IPv4
*/
static err_t
netif_null_output_ip4(struct netif *netif, struct pbuf *p, const ip4_addr_t *ipaddr)
{
801ad9e: b480 push {r7}
801ada0: b085 sub sp, #20
801ada2: af00 add r7, sp, #0
801ada4: 60f8 str r0, [r7, #12]
801ada6: 60b9 str r1, [r7, #8]
801ada8: 607a str r2, [r7, #4]
LWIP_UNUSED_ARG(netif);
LWIP_UNUSED_ARG(p);
LWIP_UNUSED_ARG(ipaddr);
return ERR_IF;
801adaa: f06f 030b mvn.w r3, #11
}
801adae: 4618 mov r0, r3
801adb0: 3714 adds r7, #20
801adb2: 46bd mov sp, r7
801adb4: f85d 7b04 ldr.w r7, [sp], #4
801adb8: 4770 bx lr
...
0801adbc <netif_get_by_index>:
*
* @param idx index of netif to find
*/
struct netif *
netif_get_by_index(u8_t idx)
{
801adbc: b580 push {r7, lr}
801adbe: b084 sub sp, #16
801adc0: af00 add r7, sp, #0
801adc2: 4603 mov r3, r0
801adc4: 71fb strb r3, [r7, #7]
struct netif *netif;
LWIP_ASSERT_CORE_LOCKED();
801adc6: f7f6 fa05 bl 80111d4 <sys_check_core_locking>
if (idx != NETIF_NO_INDEX) {
801adca: 79fb ldrb r3, [r7, #7]
801adcc: 2b00 cmp r3, #0
801adce: d013 beq.n 801adf8 <netif_get_by_index+0x3c>
NETIF_FOREACH(netif) {
801add0: 4b0c ldr r3, [pc, #48] @ (801ae04 <netif_get_by_index+0x48>)
801add2: 681b ldr r3, [r3, #0]
801add4: 60fb str r3, [r7, #12]
801add6: e00c b.n 801adf2 <netif_get_by_index+0x36>
if (idx == netif_get_index(netif)) {
801add8: 68fb ldr r3, [r7, #12]
801adda: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
801adde: 3301 adds r3, #1
801ade0: b2db uxtb r3, r3
801ade2: 79fa ldrb r2, [r7, #7]
801ade4: 429a cmp r2, r3
801ade6: d101 bne.n 801adec <netif_get_by_index+0x30>
return netif; /* found! */
801ade8: 68fb ldr r3, [r7, #12]
801adea: e006 b.n 801adfa <netif_get_by_index+0x3e>
NETIF_FOREACH(netif) {
801adec: 68fb ldr r3, [r7, #12]
801adee: 681b ldr r3, [r3, #0]
801adf0: 60fb str r3, [r7, #12]
801adf2: 68fb ldr r3, [r7, #12]
801adf4: 2b00 cmp r3, #0
801adf6: d1ef bne.n 801add8 <netif_get_by_index+0x1c>
}
}
}
return NULL;
801adf8: 2300 movs r3, #0
}
801adfa: 4618 mov r0, r3
801adfc: 3710 adds r7, #16
801adfe: 46bd mov sp, r7
801ae00: bd80 pop {r7, pc}
801ae02: bf00 nop
801ae04: 2402af9c .word 0x2402af9c
0801ae08 <pbuf_free_ooseq>:
#if !NO_SYS
static
#endif /* !NO_SYS */
void
pbuf_free_ooseq(void)
{
801ae08: b580 push {r7, lr}
801ae0a: b082 sub sp, #8
801ae0c: af00 add r7, sp, #0
struct tcp_pcb *pcb;
SYS_ARCH_SET(pbuf_free_ooseq_pending, 0);
801ae0e: f00c fb77 bl 8027500 <sys_arch_protect>
801ae12: 6038 str r0, [r7, #0]
801ae14: 4b0d ldr r3, [pc, #52] @ (801ae4c <pbuf_free_ooseq+0x44>)
801ae16: 2200 movs r2, #0
801ae18: 701a strb r2, [r3, #0]
801ae1a: 6838 ldr r0, [r7, #0]
801ae1c: f00c fb7e bl 802751c <sys_arch_unprotect>
for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
801ae20: 4b0b ldr r3, [pc, #44] @ (801ae50 <pbuf_free_ooseq+0x48>)
801ae22: 681b ldr r3, [r3, #0]
801ae24: 607b str r3, [r7, #4]
801ae26: e00a b.n 801ae3e <pbuf_free_ooseq+0x36>
if (pcb->ooseq != NULL) {
801ae28: 687b ldr r3, [r7, #4]
801ae2a: 6f5b ldr r3, [r3, #116] @ 0x74
801ae2c: 2b00 cmp r3, #0
801ae2e: d003 beq.n 801ae38 <pbuf_free_ooseq+0x30>
/** Free the ooseq pbufs of one PCB only */
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n"));
tcp_free_ooseq(pcb);
801ae30: 6878 ldr r0, [r7, #4]
801ae32: f002 fc55 bl 801d6e0 <tcp_free_ooseq>
return;
801ae36: e005 b.n 801ae44 <pbuf_free_ooseq+0x3c>
for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
801ae38: 687b ldr r3, [r7, #4]
801ae3a: 68db ldr r3, [r3, #12]
801ae3c: 607b str r3, [r7, #4]
801ae3e: 687b ldr r3, [r7, #4]
801ae40: 2b00 cmp r3, #0
801ae42: d1f1 bne.n 801ae28 <pbuf_free_ooseq+0x20>
}
}
}
801ae44: 3708 adds r7, #8
801ae46: 46bd mov sp, r7
801ae48: bd80 pop {r7, pc}
801ae4a: bf00 nop
801ae4c: 2402afa5 .word 0x2402afa5
801ae50: 2402afb4 .word 0x2402afb4
0801ae54 <pbuf_free_ooseq_callback>:
/**
* Just a callback function for tcpip_callback() that calls pbuf_free_ooseq().
*/
static void
pbuf_free_ooseq_callback(void *arg)
{
801ae54: b580 push {r7, lr}
801ae56: b082 sub sp, #8
801ae58: af00 add r7, sp, #0
801ae5a: 6078 str r0, [r7, #4]
LWIP_UNUSED_ARG(arg);
pbuf_free_ooseq();
801ae5c: f7ff ffd4 bl 801ae08 <pbuf_free_ooseq>
}
801ae60: bf00 nop
801ae62: 3708 adds r7, #8
801ae64: 46bd mov sp, r7
801ae66: bd80 pop {r7, pc}
0801ae68 <pbuf_pool_is_empty>:
#endif /* !NO_SYS */
/** Queue a call to pbuf_free_ooseq if not already queued. */
static void
pbuf_pool_is_empty(void)
{
801ae68: b580 push {r7, lr}
801ae6a: b082 sub sp, #8
801ae6c: af00 add r7, sp, #0
#ifndef PBUF_POOL_FREE_OOSEQ_QUEUE_CALL
SYS_ARCH_SET(pbuf_free_ooseq_pending, 1);
#else /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
u8_t queued;
SYS_ARCH_DECL_PROTECT(old_level);
SYS_ARCH_PROTECT(old_level);
801ae6e: f00c fb47 bl 8027500 <sys_arch_protect>
801ae72: 6078 str r0, [r7, #4]
queued = pbuf_free_ooseq_pending;
801ae74: 4b0f ldr r3, [pc, #60] @ (801aeb4 <pbuf_pool_is_empty+0x4c>)
801ae76: 781b ldrb r3, [r3, #0]
801ae78: 70fb strb r3, [r7, #3]
pbuf_free_ooseq_pending = 1;
801ae7a: 4b0e ldr r3, [pc, #56] @ (801aeb4 <pbuf_pool_is_empty+0x4c>)
801ae7c: 2201 movs r2, #1
801ae7e: 701a strb r2, [r3, #0]
SYS_ARCH_UNPROTECT(old_level);
801ae80: 6878 ldr r0, [r7, #4]
801ae82: f00c fb4b bl 802751c <sys_arch_unprotect>
if (!queued) {
801ae86: 78fb ldrb r3, [r7, #3]
801ae88: 2b00 cmp r3, #0
801ae8a: d10f bne.n 801aeac <pbuf_pool_is_empty+0x44>
/* queue a call to pbuf_free_ooseq if not already queued */
PBUF_POOL_FREE_OOSEQ_QUEUE_CALL();
801ae8c: 2100 movs r1, #0
801ae8e: 480a ldr r0, [pc, #40] @ (801aeb8 <pbuf_pool_is_empty+0x50>)
801ae90: f7fe fdd6 bl 8019a40 <tcpip_try_callback>
801ae94: 4603 mov r3, r0
801ae96: 2b00 cmp r3, #0
801ae98: d008 beq.n 801aeac <pbuf_pool_is_empty+0x44>
801ae9a: f00c fb31 bl 8027500 <sys_arch_protect>
801ae9e: 6078 str r0, [r7, #4]
801aea0: 4b04 ldr r3, [pc, #16] @ (801aeb4 <pbuf_pool_is_empty+0x4c>)
801aea2: 2200 movs r2, #0
801aea4: 701a strb r2, [r3, #0]
801aea6: 6878 ldr r0, [r7, #4]
801aea8: f00c fb38 bl 802751c <sys_arch_unprotect>
}
#endif /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
}
801aeac: bf00 nop
801aeae: 3708 adds r7, #8
801aeb0: 46bd mov sp, r7
801aeb2: bd80 pop {r7, pc}
801aeb4: 2402afa5 .word 0x2402afa5
801aeb8: 0801ae55 .word 0x0801ae55
0801aebc <pbuf_init_alloced_pbuf>:
#endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || !PBUF_POOL_FREE_OOSEQ */
/* Initialize members of struct pbuf after allocation */
static void
pbuf_init_alloced_pbuf(struct pbuf *p, void *payload, u16_t tot_len, u16_t len, pbuf_type type, u8_t flags)
{
801aebc: b480 push {r7}
801aebe: b085 sub sp, #20
801aec0: af00 add r7, sp, #0
801aec2: 60f8 str r0, [r7, #12]
801aec4: 60b9 str r1, [r7, #8]
801aec6: 4611 mov r1, r2
801aec8: 461a mov r2, r3
801aeca: 460b mov r3, r1
801aecc: 80fb strh r3, [r7, #6]
801aece: 4613 mov r3, r2
801aed0: 80bb strh r3, [r7, #4]
p->next = NULL;
801aed2: 68fb ldr r3, [r7, #12]
801aed4: 2200 movs r2, #0
801aed6: 601a str r2, [r3, #0]
p->payload = payload;
801aed8: 68fb ldr r3, [r7, #12]
801aeda: 68ba ldr r2, [r7, #8]
801aedc: 605a str r2, [r3, #4]
p->tot_len = tot_len;
801aede: 68fb ldr r3, [r7, #12]
801aee0: 88fa ldrh r2, [r7, #6]
801aee2: 811a strh r2, [r3, #8]
p->len = len;
801aee4: 68fb ldr r3, [r7, #12]
801aee6: 88ba ldrh r2, [r7, #4]
801aee8: 815a strh r2, [r3, #10]
p->type_internal = (u8_t)type;
801aeea: 8b3b ldrh r3, [r7, #24]
801aeec: b2da uxtb r2, r3
801aeee: 68fb ldr r3, [r7, #12]
801aef0: 731a strb r2, [r3, #12]
p->flags = flags;
801aef2: 68fb ldr r3, [r7, #12]
801aef4: 7f3a ldrb r2, [r7, #28]
801aef6: 735a strb r2, [r3, #13]
p->ref = 1;
801aef8: 68fb ldr r3, [r7, #12]
801aefa: 2201 movs r2, #1
801aefc: 739a strb r2, [r3, #14]
p->if_idx = NETIF_NO_INDEX;
801aefe: 68fb ldr r3, [r7, #12]
801af00: 2200 movs r2, #0
801af02: 73da strb r2, [r3, #15]
}
801af04: bf00 nop
801af06: 3714 adds r7, #20
801af08: 46bd mov sp, r7
801af0a: f85d 7b04 ldr.w r7, [sp], #4
801af0e: 4770 bx lr
0801af10 <pbuf_alloc>:
* @return the allocated pbuf. If multiple pbufs where allocated, this
* is the first pbuf of a pbuf chain.
*/
struct pbuf *
pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type)
{
801af10: b580 push {r7, lr}
801af12: b08c sub sp, #48 @ 0x30
801af14: af02 add r7, sp, #8
801af16: 4603 mov r3, r0
801af18: 71fb strb r3, [r7, #7]
801af1a: 460b mov r3, r1
801af1c: 80bb strh r3, [r7, #4]
801af1e: 4613 mov r3, r2
801af20: 807b strh r3, [r7, #2]
struct pbuf *p;
u16_t offset = (u16_t)layer;
801af22: 79fb ldrb r3, [r7, #7]
801af24: 847b strh r3, [r7, #34] @ 0x22
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length));
switch (type) {
801af26: 887b ldrh r3, [r7, #2]
801af28: f5b3 7f20 cmp.w r3, #640 @ 0x280
801af2c: f000 8082 beq.w 801b034 <pbuf_alloc+0x124>
801af30: f5b3 7f20 cmp.w r3, #640 @ 0x280
801af34: f300 80c9 bgt.w 801b0ca <pbuf_alloc+0x1ba>
801af38: f5b3 7fc1 cmp.w r3, #386 @ 0x182
801af3c: d010 beq.n 801af60 <pbuf_alloc+0x50>
801af3e: f5b3 7fc1 cmp.w r3, #386 @ 0x182
801af42: f300 80c2 bgt.w 801b0ca <pbuf_alloc+0x1ba>
801af46: 2b01 cmp r3, #1
801af48: d002 beq.n 801af50 <pbuf_alloc+0x40>
801af4a: 2b41 cmp r3, #65 @ 0x41
801af4c: f040 80bd bne.w 801b0ca <pbuf_alloc+0x1ba>
case PBUF_REF: /* fall through */
case PBUF_ROM:
p = pbuf_alloc_reference(NULL, length, type);
801af50: 887a ldrh r2, [r7, #2]
801af52: 88bb ldrh r3, [r7, #4]
801af54: 4619 mov r1, r3
801af56: 2000 movs r0, #0
801af58: f000 f8d2 bl 801b100 <pbuf_alloc_reference>
801af5c: 6278 str r0, [r7, #36] @ 0x24
break;
801af5e: e0be b.n 801b0de <pbuf_alloc+0x1ce>
case PBUF_POOL: {
struct pbuf *q, *last;
u16_t rem_len; /* remaining length */
p = NULL;
801af60: 2300 movs r3, #0
801af62: 627b str r3, [r7, #36] @ 0x24
last = NULL;
801af64: 2300 movs r3, #0
801af66: 61fb str r3, [r7, #28]
rem_len = length;
801af68: 88bb ldrh r3, [r7, #4]
801af6a: 837b strh r3, [r7, #26]
do {
u16_t qlen;
q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL);
801af6c: 200c movs r0, #12
801af6e: f7ff fb81 bl 801a674 <memp_malloc>
801af72: 6138 str r0, [r7, #16]
if (q == NULL) {
801af74: 693b ldr r3, [r7, #16]
801af76: 2b00 cmp r3, #0
801af78: d109 bne.n 801af8e <pbuf_alloc+0x7e>
PBUF_POOL_IS_EMPTY();
801af7a: f7ff ff75 bl 801ae68 <pbuf_pool_is_empty>
/* free chain so far allocated */
if (p) {
801af7e: 6a7b ldr r3, [r7, #36] @ 0x24
801af80: 2b00 cmp r3, #0
801af82: d002 beq.n 801af8a <pbuf_alloc+0x7a>
pbuf_free(p);
801af84: 6a78 ldr r0, [r7, #36] @ 0x24
801af86: f000 fad9 bl 801b53c <pbuf_free>
}
/* bail out unsuccessfully */
return NULL;
801af8a: 2300 movs r3, #0
801af8c: e0a8 b.n 801b0e0 <pbuf_alloc+0x1d0>
}
qlen = LWIP_MIN(rem_len, (u16_t)(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)));
801af8e: 8c7b ldrh r3, [r7, #34] @ 0x22
801af90: 3303 adds r3, #3
801af92: b29b uxth r3, r3
801af94: f023 0303 bic.w r3, r3, #3
801af98: b29a uxth r2, r3
801af9a: f240 53ec movw r3, #1516 @ 0x5ec
801af9e: 1a9b subs r3, r3, r2
801afa0: b29b uxth r3, r3
801afa2: 8b7a ldrh r2, [r7, #26]
801afa4: 4293 cmp r3, r2
801afa6: bf28 it cs
801afa8: 4613 movcs r3, r2
801afaa: 81fb strh r3, [r7, #14]
pbuf_init_alloced_pbuf(q, LWIP_MEM_ALIGN((void *)((u8_t *)q + SIZEOF_STRUCT_PBUF + offset)),
801afac: 8c7b ldrh r3, [r7, #34] @ 0x22
801afae: 3310 adds r3, #16
801afb0: 693a ldr r2, [r7, #16]
801afb2: 4413 add r3, r2
801afb4: 3303 adds r3, #3
801afb6: f023 0303 bic.w r3, r3, #3
801afba: 4618 mov r0, r3
801afbc: 89f9 ldrh r1, [r7, #14]
801afbe: 8b7a ldrh r2, [r7, #26]
801afc0: 2300 movs r3, #0
801afc2: 9301 str r3, [sp, #4]
801afc4: 887b ldrh r3, [r7, #2]
801afc6: 9300 str r3, [sp, #0]
801afc8: 460b mov r3, r1
801afca: 4601 mov r1, r0
801afcc: 6938 ldr r0, [r7, #16]
801afce: f7ff ff75 bl 801aebc <pbuf_init_alloced_pbuf>
rem_len, qlen, type, 0);
LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned",
801afd2: 693b ldr r3, [r7, #16]
801afd4: 685b ldr r3, [r3, #4]
801afd6: f003 0303 and.w r3, r3, #3
801afda: 2b00 cmp r3, #0
801afdc: d006 beq.n 801afec <pbuf_alloc+0xdc>
801afde: 4b42 ldr r3, [pc, #264] @ (801b0e8 <pbuf_alloc+0x1d8>)
801afe0: f44f 7280 mov.w r2, #256 @ 0x100
801afe4: 4941 ldr r1, [pc, #260] @ (801b0ec <pbuf_alloc+0x1dc>)
801afe6: 4842 ldr r0, [pc, #264] @ (801b0f0 <pbuf_alloc+0x1e0>)
801afe8: f00f fd20 bl 802aa2c <iprintf>
((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0);
LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT",
801afec: 8c7b ldrh r3, [r7, #34] @ 0x22
801afee: 3303 adds r3, #3
801aff0: f023 0303 bic.w r3, r3, #3
801aff4: f240 52ec movw r2, #1516 @ 0x5ec
801aff8: 4293 cmp r3, r2
801affa: d106 bne.n 801b00a <pbuf_alloc+0xfa>
801affc: 4b3a ldr r3, [pc, #232] @ (801b0e8 <pbuf_alloc+0x1d8>)
801affe: f44f 7281 mov.w r2, #258 @ 0x102
801b002: 493c ldr r1, [pc, #240] @ (801b0f4 <pbuf_alloc+0x1e4>)
801b004: 483a ldr r0, [pc, #232] @ (801b0f0 <pbuf_alloc+0x1e0>)
801b006: f00f fd11 bl 802aa2c <iprintf>
(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 );
if (p == NULL) {
801b00a: 6a7b ldr r3, [r7, #36] @ 0x24
801b00c: 2b00 cmp r3, #0
801b00e: d102 bne.n 801b016 <pbuf_alloc+0x106>
/* allocated head of pbuf chain (into p) */
p = q;
801b010: 693b ldr r3, [r7, #16]
801b012: 627b str r3, [r7, #36] @ 0x24
801b014: e002 b.n 801b01c <pbuf_alloc+0x10c>
} else {
/* make previous pbuf point to this pbuf */
last->next = q;
801b016: 69fb ldr r3, [r7, #28]
801b018: 693a ldr r2, [r7, #16]
801b01a: 601a str r2, [r3, #0]
}
last = q;
801b01c: 693b ldr r3, [r7, #16]
801b01e: 61fb str r3, [r7, #28]
rem_len = (u16_t)(rem_len - qlen);
801b020: 8b7a ldrh r2, [r7, #26]
801b022: 89fb ldrh r3, [r7, #14]
801b024: 1ad3 subs r3, r2, r3
801b026: 837b strh r3, [r7, #26]
offset = 0;
801b028: 2300 movs r3, #0
801b02a: 847b strh r3, [r7, #34] @ 0x22
} while (rem_len > 0);
801b02c: 8b7b ldrh r3, [r7, #26]
801b02e: 2b00 cmp r3, #0
801b030: d19c bne.n 801af6c <pbuf_alloc+0x5c>
break;
801b032: e054 b.n 801b0de <pbuf_alloc+0x1ce>
}
case PBUF_RAM: {
u16_t payload_len = (u16_t)(LWIP_MEM_ALIGN_SIZE(offset) + LWIP_MEM_ALIGN_SIZE(length));
801b034: 8c7b ldrh r3, [r7, #34] @ 0x22
801b036: 3303 adds r3, #3
801b038: b29b uxth r3, r3
801b03a: f023 0303 bic.w r3, r3, #3
801b03e: b29a uxth r2, r3
801b040: 88bb ldrh r3, [r7, #4]
801b042: 3303 adds r3, #3
801b044: b29b uxth r3, r3
801b046: f023 0303 bic.w r3, r3, #3
801b04a: b29b uxth r3, r3
801b04c: 4413 add r3, r2
801b04e: 833b strh r3, [r7, #24]
mem_size_t alloc_len = (mem_size_t)(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF) + payload_len);
801b050: 8b3b ldrh r3, [r7, #24]
801b052: 3310 adds r3, #16
801b054: 617b str r3, [r7, #20]
/* bug #50040: Check for integer overflow when calculating alloc_len */
if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
801b056: 8b3a ldrh r2, [r7, #24]
801b058: 88bb ldrh r3, [r7, #4]
801b05a: 3303 adds r3, #3
801b05c: f023 0303 bic.w r3, r3, #3
801b060: 429a cmp r2, r3
801b062: d306 bcc.n 801b072 <pbuf_alloc+0x162>
(alloc_len < LWIP_MEM_ALIGN_SIZE(length))) {
801b064: 88bb ldrh r3, [r7, #4]
801b066: 3303 adds r3, #3
801b068: f023 0303 bic.w r3, r3, #3
if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
801b06c: 697a ldr r2, [r7, #20]
801b06e: 429a cmp r2, r3
801b070: d201 bcs.n 801b076 <pbuf_alloc+0x166>
return NULL;
801b072: 2300 movs r3, #0
801b074: e034 b.n 801b0e0 <pbuf_alloc+0x1d0>
}
/* If pbuf is to be allocated in RAM, allocate memory for it. */
p = (struct pbuf *)mem_malloc(alloc_len);
801b076: 6978 ldr r0, [r7, #20]
801b078: f7ff f960 bl 801a33c <mem_malloc>
801b07c: 6278 str r0, [r7, #36] @ 0x24
if (p == NULL) {
801b07e: 6a7b ldr r3, [r7, #36] @ 0x24
801b080: 2b00 cmp r3, #0
801b082: d101 bne.n 801b088 <pbuf_alloc+0x178>
return NULL;
801b084: 2300 movs r3, #0
801b086: e02b b.n 801b0e0 <pbuf_alloc+0x1d0>
}
pbuf_init_alloced_pbuf(p, LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)),
801b088: 8c7b ldrh r3, [r7, #34] @ 0x22
801b08a: 3310 adds r3, #16
801b08c: 6a7a ldr r2, [r7, #36] @ 0x24
801b08e: 4413 add r3, r2
801b090: 3303 adds r3, #3
801b092: f023 0303 bic.w r3, r3, #3
801b096: 4618 mov r0, r3
801b098: 88b9 ldrh r1, [r7, #4]
801b09a: 88ba ldrh r2, [r7, #4]
801b09c: 2300 movs r3, #0
801b09e: 9301 str r3, [sp, #4]
801b0a0: 887b ldrh r3, [r7, #2]
801b0a2: 9300 str r3, [sp, #0]
801b0a4: 460b mov r3, r1
801b0a6: 4601 mov r1, r0
801b0a8: 6a78 ldr r0, [r7, #36] @ 0x24
801b0aa: f7ff ff07 bl 801aebc <pbuf_init_alloced_pbuf>
length, length, type, 0);
LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned",
801b0ae: 6a7b ldr r3, [r7, #36] @ 0x24
801b0b0: 685b ldr r3, [r3, #4]
801b0b2: f003 0303 and.w r3, r3, #3
801b0b6: 2b00 cmp r3, #0
801b0b8: d010 beq.n 801b0dc <pbuf_alloc+0x1cc>
801b0ba: 4b0b ldr r3, [pc, #44] @ (801b0e8 <pbuf_alloc+0x1d8>)
801b0bc: f44f 7291 mov.w r2, #290 @ 0x122
801b0c0: 490d ldr r1, [pc, #52] @ (801b0f8 <pbuf_alloc+0x1e8>)
801b0c2: 480b ldr r0, [pc, #44] @ (801b0f0 <pbuf_alloc+0x1e0>)
801b0c4: f00f fcb2 bl 802aa2c <iprintf>
((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0);
break;
801b0c8: e008 b.n 801b0dc <pbuf_alloc+0x1cc>
}
default:
LWIP_ASSERT("pbuf_alloc: erroneous type", 0);
801b0ca: 4b07 ldr r3, [pc, #28] @ (801b0e8 <pbuf_alloc+0x1d8>)
801b0cc: f240 1227 movw r2, #295 @ 0x127
801b0d0: 490a ldr r1, [pc, #40] @ (801b0fc <pbuf_alloc+0x1ec>)
801b0d2: 4807 ldr r0, [pc, #28] @ (801b0f0 <pbuf_alloc+0x1e0>)
801b0d4: f00f fcaa bl 802aa2c <iprintf>
return NULL;
801b0d8: 2300 movs r3, #0
801b0da: e001 b.n 801b0e0 <pbuf_alloc+0x1d0>
break;
801b0dc: bf00 nop
}
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p));
return p;
801b0de: 6a7b ldr r3, [r7, #36] @ 0x24
}
801b0e0: 4618 mov r0, r3
801b0e2: 3728 adds r7, #40 @ 0x28
801b0e4: 46bd mov sp, r7
801b0e6: bd80 pop {r7, pc}
801b0e8: 0802f2f0 .word 0x0802f2f0
801b0ec: 0802f320 .word 0x0802f320
801b0f0: 0802f350 .word 0x0802f350
801b0f4: 0802f378 .word 0x0802f378
801b0f8: 0802f3ac .word 0x0802f3ac
801b0fc: 0802f3d8 .word 0x0802f3d8
0801b100 <pbuf_alloc_reference>:
*
* @return the allocated pbuf.
*/
struct pbuf *
pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type)
{
801b100: b580 push {r7, lr}
801b102: b086 sub sp, #24
801b104: af02 add r7, sp, #8
801b106: 6078 str r0, [r7, #4]
801b108: 460b mov r3, r1
801b10a: 807b strh r3, [r7, #2]
801b10c: 4613 mov r3, r2
801b10e: 803b strh r3, [r7, #0]
struct pbuf *p;
LWIP_ASSERT("invalid pbuf_type", (type == PBUF_REF) || (type == PBUF_ROM));
801b110: 883b ldrh r3, [r7, #0]
801b112: 2b41 cmp r3, #65 @ 0x41
801b114: d009 beq.n 801b12a <pbuf_alloc_reference+0x2a>
801b116: 883b ldrh r3, [r7, #0]
801b118: 2b01 cmp r3, #1
801b11a: d006 beq.n 801b12a <pbuf_alloc_reference+0x2a>
801b11c: 4b0f ldr r3, [pc, #60] @ (801b15c <pbuf_alloc_reference+0x5c>)
801b11e: f44f 72a5 mov.w r2, #330 @ 0x14a
801b122: 490f ldr r1, [pc, #60] @ (801b160 <pbuf_alloc_reference+0x60>)
801b124: 480f ldr r0, [pc, #60] @ (801b164 <pbuf_alloc_reference+0x64>)
801b126: f00f fc81 bl 802aa2c <iprintf>
/* only allocate memory for the pbuf structure */
p = (struct pbuf *)memp_malloc(MEMP_PBUF);
801b12a: 200b movs r0, #11
801b12c: f7ff faa2 bl 801a674 <memp_malloc>
801b130: 60f8 str r0, [r7, #12]
if (p == NULL) {
801b132: 68fb ldr r3, [r7, #12]
801b134: 2b00 cmp r3, #0
801b136: d101 bne.n 801b13c <pbuf_alloc_reference+0x3c>
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("pbuf_alloc_reference: Could not allocate MEMP_PBUF for PBUF_%s.\n",
(type == PBUF_ROM) ? "ROM" : "REF"));
return NULL;
801b138: 2300 movs r3, #0
801b13a: e00b b.n 801b154 <pbuf_alloc_reference+0x54>
}
pbuf_init_alloced_pbuf(p, payload, length, length, type, 0);
801b13c: 8879 ldrh r1, [r7, #2]
801b13e: 887a ldrh r2, [r7, #2]
801b140: 2300 movs r3, #0
801b142: 9301 str r3, [sp, #4]
801b144: 883b ldrh r3, [r7, #0]
801b146: 9300 str r3, [sp, #0]
801b148: 460b mov r3, r1
801b14a: 6879 ldr r1, [r7, #4]
801b14c: 68f8 ldr r0, [r7, #12]
801b14e: f7ff feb5 bl 801aebc <pbuf_init_alloced_pbuf>
return p;
801b152: 68fb ldr r3, [r7, #12]
}
801b154: 4618 mov r0, r3
801b156: 3710 adds r7, #16
801b158: 46bd mov sp, r7
801b15a: bd80 pop {r7, pc}
801b15c: 0802f2f0 .word 0x0802f2f0
801b160: 0802f3f4 .word 0x0802f3f4
801b164: 0802f350 .word 0x0802f350
0801b168 <pbuf_alloced_custom>:
* big enough to hold 'length' plus the header size
*/
struct pbuf *
pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p,
void *payload_mem, u16_t payload_mem_len)
{
801b168: b580 push {r7, lr}
801b16a: b088 sub sp, #32
801b16c: af02 add r7, sp, #8
801b16e: 607b str r3, [r7, #4]
801b170: 4603 mov r3, r0
801b172: 73fb strb r3, [r7, #15]
801b174: 460b mov r3, r1
801b176: 81bb strh r3, [r7, #12]
801b178: 4613 mov r3, r2
801b17a: 817b strh r3, [r7, #10]
u16_t offset = (u16_t)l;
801b17c: 7bfb ldrb r3, [r7, #15]
801b17e: 827b strh r3, [r7, #18]
void *payload;
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length));
if (LWIP_MEM_ALIGN_SIZE(offset) + length > payload_mem_len) {
801b180: 8a7b ldrh r3, [r7, #18]
801b182: 3303 adds r3, #3
801b184: f023 0203 bic.w r2, r3, #3
801b188: 89bb ldrh r3, [r7, #12]
801b18a: 441a add r2, r3
801b18c: 8cbb ldrh r3, [r7, #36] @ 0x24
801b18e: 429a cmp r2, r3
801b190: d901 bls.n 801b196 <pbuf_alloced_custom+0x2e>
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length));
return NULL;
801b192: 2300 movs r3, #0
801b194: e018 b.n 801b1c8 <pbuf_alloced_custom+0x60>
}
if (payload_mem != NULL) {
801b196: 6a3b ldr r3, [r7, #32]
801b198: 2b00 cmp r3, #0
801b19a: d007 beq.n 801b1ac <pbuf_alloced_custom+0x44>
payload = (u8_t *)payload_mem + LWIP_MEM_ALIGN_SIZE(offset);
801b19c: 8a7b ldrh r3, [r7, #18]
801b19e: 3303 adds r3, #3
801b1a0: f023 0303 bic.w r3, r3, #3
801b1a4: 6a3a ldr r2, [r7, #32]
801b1a6: 4413 add r3, r2
801b1a8: 617b str r3, [r7, #20]
801b1aa: e001 b.n 801b1b0 <pbuf_alloced_custom+0x48>
} else {
payload = NULL;
801b1ac: 2300 movs r3, #0
801b1ae: 617b str r3, [r7, #20]
}
pbuf_init_alloced_pbuf(&p->pbuf, payload, length, length, type, PBUF_FLAG_IS_CUSTOM);
801b1b0: 6878 ldr r0, [r7, #4]
801b1b2: 89b9 ldrh r1, [r7, #12]
801b1b4: 89ba ldrh r2, [r7, #12]
801b1b6: 2302 movs r3, #2
801b1b8: 9301 str r3, [sp, #4]
801b1ba: 897b ldrh r3, [r7, #10]
801b1bc: 9300 str r3, [sp, #0]
801b1be: 460b mov r3, r1
801b1c0: 6979 ldr r1, [r7, #20]
801b1c2: f7ff fe7b bl 801aebc <pbuf_init_alloced_pbuf>
return &p->pbuf;
801b1c6: 687b ldr r3, [r7, #4]
}
801b1c8: 4618 mov r0, r3
801b1ca: 3718 adds r7, #24
801b1cc: 46bd mov sp, r7
801b1ce: bd80 pop {r7, pc}
0801b1d0 <pbuf_realloc>:
*
* @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain).
*/
void
pbuf_realloc(struct pbuf *p, u16_t new_len)
{
801b1d0: b580 push {r7, lr}
801b1d2: b084 sub sp, #16
801b1d4: af00 add r7, sp, #0
801b1d6: 6078 str r0, [r7, #4]
801b1d8: 460b mov r3, r1
801b1da: 807b strh r3, [r7, #2]
struct pbuf *q;
u16_t rem_len; /* remaining length */
u16_t shrink;
LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL);
801b1dc: 687b ldr r3, [r7, #4]
801b1de: 2b00 cmp r3, #0
801b1e0: d106 bne.n 801b1f0 <pbuf_realloc+0x20>
801b1e2: 4b39 ldr r3, [pc, #228] @ (801b2c8 <pbuf_realloc+0xf8>)
801b1e4: f44f 72cc mov.w r2, #408 @ 0x198
801b1e8: 4938 ldr r1, [pc, #224] @ (801b2cc <pbuf_realloc+0xfc>)
801b1ea: 4839 ldr r0, [pc, #228] @ (801b2d0 <pbuf_realloc+0x100>)
801b1ec: f00f fc1e bl 802aa2c <iprintf>
/* desired length larger than current length? */
if (new_len >= p->tot_len) {
801b1f0: 687b ldr r3, [r7, #4]
801b1f2: 891b ldrh r3, [r3, #8]
801b1f4: 887a ldrh r2, [r7, #2]
801b1f6: 429a cmp r2, r3
801b1f8: d261 bcs.n 801b2be <pbuf_realloc+0xee>
return;
}
/* the pbuf chain grows by (new_len - p->tot_len) bytes
* (which may be negative in case of shrinking) */
shrink = (u16_t)(p->tot_len - new_len);
801b1fa: 687b ldr r3, [r7, #4]
801b1fc: 891a ldrh r2, [r3, #8]
801b1fe: 887b ldrh r3, [r7, #2]
801b200: 1ad3 subs r3, r2, r3
801b202: 813b strh r3, [r7, #8]
/* first, step over any pbufs that should remain in the chain */
rem_len = new_len;
801b204: 887b ldrh r3, [r7, #2]
801b206: 817b strh r3, [r7, #10]
q = p;
801b208: 687b ldr r3, [r7, #4]
801b20a: 60fb str r3, [r7, #12]
/* should this pbuf be kept? */
while (rem_len > q->len) {
801b20c: e018 b.n 801b240 <pbuf_realloc+0x70>
/* decrease remaining length by pbuf length */
rem_len = (u16_t)(rem_len - q->len);
801b20e: 68fb ldr r3, [r7, #12]
801b210: 895b ldrh r3, [r3, #10]
801b212: 897a ldrh r2, [r7, #10]
801b214: 1ad3 subs r3, r2, r3
801b216: 817b strh r3, [r7, #10]
/* decrease total length indicator */
q->tot_len = (u16_t)(q->tot_len - shrink);
801b218: 68fb ldr r3, [r7, #12]
801b21a: 891a ldrh r2, [r3, #8]
801b21c: 893b ldrh r3, [r7, #8]
801b21e: 1ad3 subs r3, r2, r3
801b220: b29a uxth r2, r3
801b222: 68fb ldr r3, [r7, #12]
801b224: 811a strh r2, [r3, #8]
/* proceed to next pbuf in chain */
q = q->next;
801b226: 68fb ldr r3, [r7, #12]
801b228: 681b ldr r3, [r3, #0]
801b22a: 60fb str r3, [r7, #12]
LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL);
801b22c: 68fb ldr r3, [r7, #12]
801b22e: 2b00 cmp r3, #0
801b230: d106 bne.n 801b240 <pbuf_realloc+0x70>
801b232: 4b25 ldr r3, [pc, #148] @ (801b2c8 <pbuf_realloc+0xf8>)
801b234: f240 12af movw r2, #431 @ 0x1af
801b238: 4926 ldr r1, [pc, #152] @ (801b2d4 <pbuf_realloc+0x104>)
801b23a: 4825 ldr r0, [pc, #148] @ (801b2d0 <pbuf_realloc+0x100>)
801b23c: f00f fbf6 bl 802aa2c <iprintf>
while (rem_len > q->len) {
801b240: 68fb ldr r3, [r7, #12]
801b242: 895b ldrh r3, [r3, #10]
801b244: 897a ldrh r2, [r7, #10]
801b246: 429a cmp r2, r3
801b248: d8e1 bhi.n 801b20e <pbuf_realloc+0x3e>
/* we have now reached the new last pbuf (in q) */
/* rem_len == desired length for pbuf q */
/* shrink allocated memory for PBUF_RAM */
/* (other types merely adjust their length fields */
if (pbuf_match_allocsrc(q, PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) && (rem_len != q->len)
801b24a: 68fb ldr r3, [r7, #12]
801b24c: 7b1b ldrb r3, [r3, #12]
801b24e: f003 030f and.w r3, r3, #15
801b252: 2b00 cmp r3, #0
801b254: d11f bne.n 801b296 <pbuf_realloc+0xc6>
801b256: 68fb ldr r3, [r7, #12]
801b258: 895b ldrh r3, [r3, #10]
801b25a: 897a ldrh r2, [r7, #10]
801b25c: 429a cmp r2, r3
801b25e: d01a beq.n 801b296 <pbuf_realloc+0xc6>
#if LWIP_SUPPORT_CUSTOM_PBUF
&& ((q->flags & PBUF_FLAG_IS_CUSTOM) == 0)
801b260: 68fb ldr r3, [r7, #12]
801b262: 7b5b ldrb r3, [r3, #13]
801b264: f003 0302 and.w r3, r3, #2
801b268: 2b00 cmp r3, #0
801b26a: d114 bne.n 801b296 <pbuf_realloc+0xc6>
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
) {
/* reallocate and adjust the length of the pbuf that will be split */
q = (struct pbuf *)mem_trim(q, (mem_size_t)(((u8_t *)q->payload - (u8_t *)q) + rem_len));
801b26c: 68fb ldr r3, [r7, #12]
801b26e: 685a ldr r2, [r3, #4]
801b270: 68fb ldr r3, [r7, #12]
801b272: 1ad2 subs r2, r2, r3
801b274: 897b ldrh r3, [r7, #10]
801b276: 4413 add r3, r2
801b278: 4619 mov r1, r3
801b27a: 68f8 ldr r0, [r7, #12]
801b27c: f7fe ff5c bl 801a138 <mem_trim>
801b280: 60f8 str r0, [r7, #12]
LWIP_ASSERT("mem_trim returned q == NULL", q != NULL);
801b282: 68fb ldr r3, [r7, #12]
801b284: 2b00 cmp r3, #0
801b286: d106 bne.n 801b296 <pbuf_realloc+0xc6>
801b288: 4b0f ldr r3, [pc, #60] @ (801b2c8 <pbuf_realloc+0xf8>)
801b28a: f240 12bd movw r2, #445 @ 0x1bd
801b28e: 4912 ldr r1, [pc, #72] @ (801b2d8 <pbuf_realloc+0x108>)
801b290: 480f ldr r0, [pc, #60] @ (801b2d0 <pbuf_realloc+0x100>)
801b292: f00f fbcb bl 802aa2c <iprintf>
}
/* adjust length fields for new last pbuf */
q->len = rem_len;
801b296: 68fb ldr r3, [r7, #12]
801b298: 897a ldrh r2, [r7, #10]
801b29a: 815a strh r2, [r3, #10]
q->tot_len = q->len;
801b29c: 68fb ldr r3, [r7, #12]
801b29e: 895a ldrh r2, [r3, #10]
801b2a0: 68fb ldr r3, [r7, #12]
801b2a2: 811a strh r2, [r3, #8]
/* any remaining pbufs in chain? */
if (q->next != NULL) {
801b2a4: 68fb ldr r3, [r7, #12]
801b2a6: 681b ldr r3, [r3, #0]
801b2a8: 2b00 cmp r3, #0
801b2aa: d004 beq.n 801b2b6 <pbuf_realloc+0xe6>
/* free remaining pbufs in chain */
pbuf_free(q->next);
801b2ac: 68fb ldr r3, [r7, #12]
801b2ae: 681b ldr r3, [r3, #0]
801b2b0: 4618 mov r0, r3
801b2b2: f000 f943 bl 801b53c <pbuf_free>
}
/* q is last packet in chain */
q->next = NULL;
801b2b6: 68fb ldr r3, [r7, #12]
801b2b8: 2200 movs r2, #0
801b2ba: 601a str r2, [r3, #0]
801b2bc: e000 b.n 801b2c0 <pbuf_realloc+0xf0>
return;
801b2be: bf00 nop
}
801b2c0: 3710 adds r7, #16
801b2c2: 46bd mov sp, r7
801b2c4: bd80 pop {r7, pc}
801b2c6: bf00 nop
801b2c8: 0802f2f0 .word 0x0802f2f0
801b2cc: 0802f408 .word 0x0802f408
801b2d0: 0802f350 .word 0x0802f350
801b2d4: 0802f420 .word 0x0802f420
801b2d8: 0802f438 .word 0x0802f438
0801b2dc <pbuf_add_header_impl>:
* @return non-zero on failure, zero on success.
*
*/
static u8_t
pbuf_add_header_impl(struct pbuf *p, size_t header_size_increment, u8_t force)
{
801b2dc: b580 push {r7, lr}
801b2de: b086 sub sp, #24
801b2e0: af00 add r7, sp, #0
801b2e2: 60f8 str r0, [r7, #12]
801b2e4: 60b9 str r1, [r7, #8]
801b2e6: 4613 mov r3, r2
801b2e8: 71fb strb r3, [r7, #7]
u16_t type_internal;
void *payload;
u16_t increment_magnitude;
LWIP_ASSERT("p != NULL", p != NULL);
801b2ea: 68fb ldr r3, [r7, #12]
801b2ec: 2b00 cmp r3, #0
801b2ee: d106 bne.n 801b2fe <pbuf_add_header_impl+0x22>
801b2f0: 4b2b ldr r3, [pc, #172] @ (801b3a0 <pbuf_add_header_impl+0xc4>)
801b2f2: f240 12df movw r2, #479 @ 0x1df
801b2f6: 492b ldr r1, [pc, #172] @ (801b3a4 <pbuf_add_header_impl+0xc8>)
801b2f8: 482b ldr r0, [pc, #172] @ (801b3a8 <pbuf_add_header_impl+0xcc>)
801b2fa: f00f fb97 bl 802aa2c <iprintf>
if ((p == NULL) || (header_size_increment > 0xFFFF)) {
801b2fe: 68fb ldr r3, [r7, #12]
801b300: 2b00 cmp r3, #0
801b302: d003 beq.n 801b30c <pbuf_add_header_impl+0x30>
801b304: 68bb ldr r3, [r7, #8]
801b306: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
801b30a: d301 bcc.n 801b310 <pbuf_add_header_impl+0x34>
return 1;
801b30c: 2301 movs r3, #1
801b30e: e043 b.n 801b398 <pbuf_add_header_impl+0xbc>
}
if (header_size_increment == 0) {
801b310: 68bb ldr r3, [r7, #8]
801b312: 2b00 cmp r3, #0
801b314: d101 bne.n 801b31a <pbuf_add_header_impl+0x3e>
return 0;
801b316: 2300 movs r3, #0
801b318: e03e b.n 801b398 <pbuf_add_header_impl+0xbc>
}
increment_magnitude = (u16_t)header_size_increment;
801b31a: 68bb ldr r3, [r7, #8]
801b31c: 827b strh r3, [r7, #18]
/* Do not allow tot_len to wrap as a result. */
if ((u16_t)(increment_magnitude + p->tot_len) < increment_magnitude) {
801b31e: 68fb ldr r3, [r7, #12]
801b320: 891a ldrh r2, [r3, #8]
801b322: 8a7b ldrh r3, [r7, #18]
801b324: 4413 add r3, r2
801b326: b29b uxth r3, r3
801b328: 8a7a ldrh r2, [r7, #18]
801b32a: 429a cmp r2, r3
801b32c: d901 bls.n 801b332 <pbuf_add_header_impl+0x56>
return 1;
801b32e: 2301 movs r3, #1
801b330: e032 b.n 801b398 <pbuf_add_header_impl+0xbc>
}
type_internal = p->type_internal;
801b332: 68fb ldr r3, [r7, #12]
801b334: 7b1b ldrb r3, [r3, #12]
801b336: 823b strh r3, [r7, #16]
/* pbuf types containing payloads? */
if (type_internal & PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS) {
801b338: 8a3b ldrh r3, [r7, #16]
801b33a: f003 0380 and.w r3, r3, #128 @ 0x80
801b33e: 2b00 cmp r3, #0
801b340: d00c beq.n 801b35c <pbuf_add_header_impl+0x80>
/* set new payload pointer */
payload = (u8_t *)p->payload - header_size_increment;
801b342: 68fb ldr r3, [r7, #12]
801b344: 685a ldr r2, [r3, #4]
801b346: 68bb ldr r3, [r7, #8]
801b348: 425b negs r3, r3
801b34a: 4413 add r3, r2
801b34c: 617b str r3, [r7, #20]
/* boundary check fails? */
if ((u8_t *)payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) {
801b34e: 68fb ldr r3, [r7, #12]
801b350: 3310 adds r3, #16
801b352: 697a ldr r2, [r7, #20]
801b354: 429a cmp r2, r3
801b356: d20d bcs.n 801b374 <pbuf_add_header_impl+0x98>
LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE,
("pbuf_add_header: failed as %p < %p (not enough space for new header size)\n",
(void *)payload, (void *)((u8_t *)p + SIZEOF_STRUCT_PBUF)));
/* bail out unsuccessfully */
return 1;
801b358: 2301 movs r3, #1
801b35a: e01d b.n 801b398 <pbuf_add_header_impl+0xbc>
}
/* pbuf types referring to external payloads? */
} else {
/* hide a header in the payload? */
if (force) {
801b35c: 79fb ldrb r3, [r7, #7]
801b35e: 2b00 cmp r3, #0
801b360: d006 beq.n 801b370 <pbuf_add_header_impl+0x94>
payload = (u8_t *)p->payload - header_size_increment;
801b362: 68fb ldr r3, [r7, #12]
801b364: 685a ldr r2, [r3, #4]
801b366: 68bb ldr r3, [r7, #8]
801b368: 425b negs r3, r3
801b36a: 4413 add r3, r2
801b36c: 617b str r3, [r7, #20]
801b36e: e001 b.n 801b374 <pbuf_add_header_impl+0x98>
} else {
/* cannot expand payload to front (yet!)
* bail out unsuccessfully */
return 1;
801b370: 2301 movs r3, #1
801b372: e011 b.n 801b398 <pbuf_add_header_impl+0xbc>
}
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: old %p new %p (%"U16_F")\n",
(void *)p->payload, (void *)payload, increment_magnitude));
/* modify pbuf fields */
p->payload = payload;
801b374: 68fb ldr r3, [r7, #12]
801b376: 697a ldr r2, [r7, #20]
801b378: 605a str r2, [r3, #4]
p->len = (u16_t)(p->len + increment_magnitude);
801b37a: 68fb ldr r3, [r7, #12]
801b37c: 895a ldrh r2, [r3, #10]
801b37e: 8a7b ldrh r3, [r7, #18]
801b380: 4413 add r3, r2
801b382: b29a uxth r2, r3
801b384: 68fb ldr r3, [r7, #12]
801b386: 815a strh r2, [r3, #10]
p->tot_len = (u16_t)(p->tot_len + increment_magnitude);
801b388: 68fb ldr r3, [r7, #12]
801b38a: 891a ldrh r2, [r3, #8]
801b38c: 8a7b ldrh r3, [r7, #18]
801b38e: 4413 add r3, r2
801b390: b29a uxth r2, r3
801b392: 68fb ldr r3, [r7, #12]
801b394: 811a strh r2, [r3, #8]
return 0;
801b396: 2300 movs r3, #0
}
801b398: 4618 mov r0, r3
801b39a: 3718 adds r7, #24
801b39c: 46bd mov sp, r7
801b39e: bd80 pop {r7, pc}
801b3a0: 0802f2f0 .word 0x0802f2f0
801b3a4: 0802f454 .word 0x0802f454
801b3a8: 0802f350 .word 0x0802f350
0801b3ac <pbuf_add_header>:
* @return non-zero on failure, zero on success.
*
*/
u8_t
pbuf_add_header(struct pbuf *p, size_t header_size_increment)
{
801b3ac: b580 push {r7, lr}
801b3ae: b082 sub sp, #8
801b3b0: af00 add r7, sp, #0
801b3b2: 6078 str r0, [r7, #4]
801b3b4: 6039 str r1, [r7, #0]
return pbuf_add_header_impl(p, header_size_increment, 0);
801b3b6: 2200 movs r2, #0
801b3b8: 6839 ldr r1, [r7, #0]
801b3ba: 6878 ldr r0, [r7, #4]
801b3bc: f7ff ff8e bl 801b2dc <pbuf_add_header_impl>
801b3c0: 4603 mov r3, r0
}
801b3c2: 4618 mov r0, r3
801b3c4: 3708 adds r7, #8
801b3c6: 46bd mov sp, r7
801b3c8: bd80 pop {r7, pc}
...
0801b3cc <pbuf_remove_header>:
* @return non-zero on failure, zero on success.
*
*/
u8_t
pbuf_remove_header(struct pbuf *p, size_t header_size_decrement)
{
801b3cc: b580 push {r7, lr}
801b3ce: b084 sub sp, #16
801b3d0: af00 add r7, sp, #0
801b3d2: 6078 str r0, [r7, #4]
801b3d4: 6039 str r1, [r7, #0]
void *payload;
u16_t increment_magnitude;
LWIP_ASSERT("p != NULL", p != NULL);
801b3d6: 687b ldr r3, [r7, #4]
801b3d8: 2b00 cmp r3, #0
801b3da: d106 bne.n 801b3ea <pbuf_remove_header+0x1e>
801b3dc: 4b20 ldr r3, [pc, #128] @ (801b460 <pbuf_remove_header+0x94>)
801b3de: f240 224b movw r2, #587 @ 0x24b
801b3e2: 4920 ldr r1, [pc, #128] @ (801b464 <pbuf_remove_header+0x98>)
801b3e4: 4820 ldr r0, [pc, #128] @ (801b468 <pbuf_remove_header+0x9c>)
801b3e6: f00f fb21 bl 802aa2c <iprintf>
if ((p == NULL) || (header_size_decrement > 0xFFFF)) {
801b3ea: 687b ldr r3, [r7, #4]
801b3ec: 2b00 cmp r3, #0
801b3ee: d003 beq.n 801b3f8 <pbuf_remove_header+0x2c>
801b3f0: 683b ldr r3, [r7, #0]
801b3f2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
801b3f6: d301 bcc.n 801b3fc <pbuf_remove_header+0x30>
return 1;
801b3f8: 2301 movs r3, #1
801b3fa: e02c b.n 801b456 <pbuf_remove_header+0x8a>
}
if (header_size_decrement == 0) {
801b3fc: 683b ldr r3, [r7, #0]
801b3fe: 2b00 cmp r3, #0
801b400: d101 bne.n 801b406 <pbuf_remove_header+0x3a>
return 0;
801b402: 2300 movs r3, #0
801b404: e027 b.n 801b456 <pbuf_remove_header+0x8a>
}
increment_magnitude = (u16_t)header_size_decrement;
801b406: 683b ldr r3, [r7, #0]
801b408: 81fb strh r3, [r7, #14]
/* Check that we aren't going to move off the end of the pbuf */
LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;);
801b40a: 687b ldr r3, [r7, #4]
801b40c: 895b ldrh r3, [r3, #10]
801b40e: 89fa ldrh r2, [r7, #14]
801b410: 429a cmp r2, r3
801b412: d908 bls.n 801b426 <pbuf_remove_header+0x5a>
801b414: 4b12 ldr r3, [pc, #72] @ (801b460 <pbuf_remove_header+0x94>)
801b416: f240 2255 movw r2, #597 @ 0x255
801b41a: 4914 ldr r1, [pc, #80] @ (801b46c <pbuf_remove_header+0xa0>)
801b41c: 4812 ldr r0, [pc, #72] @ (801b468 <pbuf_remove_header+0x9c>)
801b41e: f00f fb05 bl 802aa2c <iprintf>
801b422: 2301 movs r3, #1
801b424: e017 b.n 801b456 <pbuf_remove_header+0x8a>
/* remember current payload pointer */
payload = p->payload;
801b426: 687b ldr r3, [r7, #4]
801b428: 685b ldr r3, [r3, #4]
801b42a: 60bb str r3, [r7, #8]
LWIP_UNUSED_ARG(payload); /* only used in LWIP_DEBUGF below */
/* increase payload pointer (guarded by length check above) */
p->payload = (u8_t *)p->payload + header_size_decrement;
801b42c: 687b ldr r3, [r7, #4]
801b42e: 685a ldr r2, [r3, #4]
801b430: 683b ldr r3, [r7, #0]
801b432: 441a add r2, r3
801b434: 687b ldr r3, [r7, #4]
801b436: 605a str r2, [r3, #4]
/* modify pbuf length fields */
p->len = (u16_t)(p->len - increment_magnitude);
801b438: 687b ldr r3, [r7, #4]
801b43a: 895a ldrh r2, [r3, #10]
801b43c: 89fb ldrh r3, [r7, #14]
801b43e: 1ad3 subs r3, r2, r3
801b440: b29a uxth r2, r3
801b442: 687b ldr r3, [r7, #4]
801b444: 815a strh r2, [r3, #10]
p->tot_len = (u16_t)(p->tot_len - increment_magnitude);
801b446: 687b ldr r3, [r7, #4]
801b448: 891a ldrh r2, [r3, #8]
801b44a: 89fb ldrh r3, [r7, #14]
801b44c: 1ad3 subs r3, r2, r3
801b44e: b29a uxth r2, r3
801b450: 687b ldr r3, [r7, #4]
801b452: 811a strh r2, [r3, #8]
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_remove_header: old %p new %p (%"U16_F")\n",
(void *)payload, (void *)p->payload, increment_magnitude));
return 0;
801b454: 2300 movs r3, #0
}
801b456: 4618 mov r0, r3
801b458: 3710 adds r7, #16
801b45a: 46bd mov sp, r7
801b45c: bd80 pop {r7, pc}
801b45e: bf00 nop
801b460: 0802f2f0 .word 0x0802f2f0
801b464: 0802f454 .word 0x0802f454
801b468: 0802f350 .word 0x0802f350
801b46c: 0802f460 .word 0x0802f460
0801b470 <pbuf_header_impl>:
static u8_t
pbuf_header_impl(struct pbuf *p, s16_t header_size_increment, u8_t force)
{
801b470: b580 push {r7, lr}
801b472: b082 sub sp, #8
801b474: af00 add r7, sp, #0
801b476: 6078 str r0, [r7, #4]
801b478: 460b mov r3, r1
801b47a: 807b strh r3, [r7, #2]
801b47c: 4613 mov r3, r2
801b47e: 707b strb r3, [r7, #1]
if (header_size_increment < 0) {
801b480: f9b7 3002 ldrsh.w r3, [r7, #2]
801b484: 2b00 cmp r3, #0
801b486: da08 bge.n 801b49a <pbuf_header_impl+0x2a>
return pbuf_remove_header(p, (size_t) - header_size_increment);
801b488: f9b7 3002 ldrsh.w r3, [r7, #2]
801b48c: 425b negs r3, r3
801b48e: 4619 mov r1, r3
801b490: 6878 ldr r0, [r7, #4]
801b492: f7ff ff9b bl 801b3cc <pbuf_remove_header>
801b496: 4603 mov r3, r0
801b498: e007 b.n 801b4aa <pbuf_header_impl+0x3a>
} else {
return pbuf_add_header_impl(p, (size_t)header_size_increment, force);
801b49a: f9b7 3002 ldrsh.w r3, [r7, #2]
801b49e: 787a ldrb r2, [r7, #1]
801b4a0: 4619 mov r1, r3
801b4a2: 6878 ldr r0, [r7, #4]
801b4a4: f7ff ff1a bl 801b2dc <pbuf_add_header_impl>
801b4a8: 4603 mov r3, r0
}
}
801b4aa: 4618 mov r0, r3
801b4ac: 3708 adds r7, #8
801b4ae: 46bd mov sp, r7
801b4b0: bd80 pop {r7, pc}
0801b4b2 <pbuf_header_force>:
* Same as pbuf_header but does not check if 'header_size > 0' is allowed.
* This is used internally only, to allow PBUF_REF for RX.
*/
u8_t
pbuf_header_force(struct pbuf *p, s16_t header_size_increment)
{
801b4b2: b580 push {r7, lr}
801b4b4: b082 sub sp, #8
801b4b6: af00 add r7, sp, #0
801b4b8: 6078 str r0, [r7, #4]
801b4ba: 460b mov r3, r1
801b4bc: 807b strh r3, [r7, #2]
return pbuf_header_impl(p, header_size_increment, 1);
801b4be: f9b7 3002 ldrsh.w r3, [r7, #2]
801b4c2: 2201 movs r2, #1
801b4c4: 4619 mov r1, r3
801b4c6: 6878 ldr r0, [r7, #4]
801b4c8: f7ff ffd2 bl 801b470 <pbuf_header_impl>
801b4cc: 4603 mov r3, r0
}
801b4ce: 4618 mov r0, r3
801b4d0: 3708 adds r7, #8
801b4d2: 46bd mov sp, r7
801b4d4: bd80 pop {r7, pc}
0801b4d6 <pbuf_free_header>:
* takes an u16_t not s16_t!
* @return the new head pbuf
*/
struct pbuf *
pbuf_free_header(struct pbuf *q, u16_t size)
{
801b4d6: b580 push {r7, lr}
801b4d8: b086 sub sp, #24
801b4da: af00 add r7, sp, #0
801b4dc: 6078 str r0, [r7, #4]
801b4de: 460b mov r3, r1
801b4e0: 807b strh r3, [r7, #2]
struct pbuf *p = q;
801b4e2: 687b ldr r3, [r7, #4]
801b4e4: 617b str r3, [r7, #20]
u16_t free_left = size;
801b4e6: 887b ldrh r3, [r7, #2]
801b4e8: 827b strh r3, [r7, #18]
while (free_left && p) {
801b4ea: e01c b.n 801b526 <pbuf_free_header+0x50>
if (free_left >= p->len) {
801b4ec: 697b ldr r3, [r7, #20]
801b4ee: 895b ldrh r3, [r3, #10]
801b4f0: 8a7a ldrh r2, [r7, #18]
801b4f2: 429a cmp r2, r3
801b4f4: d310 bcc.n 801b518 <pbuf_free_header+0x42>
struct pbuf *f = p;
801b4f6: 697b ldr r3, [r7, #20]
801b4f8: 60fb str r3, [r7, #12]
free_left = (u16_t)(free_left - p->len);
801b4fa: 697b ldr r3, [r7, #20]
801b4fc: 895b ldrh r3, [r3, #10]
801b4fe: 8a7a ldrh r2, [r7, #18]
801b500: 1ad3 subs r3, r2, r3
801b502: 827b strh r3, [r7, #18]
p = p->next;
801b504: 697b ldr r3, [r7, #20]
801b506: 681b ldr r3, [r3, #0]
801b508: 617b str r3, [r7, #20]
f->next = 0;
801b50a: 68fb ldr r3, [r7, #12]
801b50c: 2200 movs r2, #0
801b50e: 601a str r2, [r3, #0]
pbuf_free(f);
801b510: 68f8 ldr r0, [r7, #12]
801b512: f000 f813 bl 801b53c <pbuf_free>
801b516: e006 b.n 801b526 <pbuf_free_header+0x50>
} else {
pbuf_remove_header(p, free_left);
801b518: 8a7b ldrh r3, [r7, #18]
801b51a: 4619 mov r1, r3
801b51c: 6978 ldr r0, [r7, #20]
801b51e: f7ff ff55 bl 801b3cc <pbuf_remove_header>
free_left = 0;
801b522: 2300 movs r3, #0
801b524: 827b strh r3, [r7, #18]
while (free_left && p) {
801b526: 8a7b ldrh r3, [r7, #18]
801b528: 2b00 cmp r3, #0
801b52a: d002 beq.n 801b532 <pbuf_free_header+0x5c>
801b52c: 697b ldr r3, [r7, #20]
801b52e: 2b00 cmp r3, #0
801b530: d1dc bne.n 801b4ec <pbuf_free_header+0x16>
}
}
return p;
801b532: 697b ldr r3, [r7, #20]
}
801b534: 4618 mov r0, r3
801b536: 3718 adds r7, #24
801b538: 46bd mov sp, r7
801b53a: bd80 pop {r7, pc}
0801b53c <pbuf_free>:
* 1->1->1 becomes .......
*
*/
u8_t
pbuf_free(struct pbuf *p)
{
801b53c: b580 push {r7, lr}
801b53e: b088 sub sp, #32
801b540: af00 add r7, sp, #0
801b542: 6078 str r0, [r7, #4]
u8_t alloc_src;
struct pbuf *q;
u8_t count;
if (p == NULL) {
801b544: 687b ldr r3, [r7, #4]
801b546: 2b00 cmp r3, #0
801b548: d10b bne.n 801b562 <pbuf_free+0x26>
LWIP_ASSERT("p != NULL", p != NULL);
801b54a: 687b ldr r3, [r7, #4]
801b54c: 2b00 cmp r3, #0
801b54e: d106 bne.n 801b55e <pbuf_free+0x22>
801b550: 4b3b ldr r3, [pc, #236] @ (801b640 <pbuf_free+0x104>)
801b552: f44f 7237 mov.w r2, #732 @ 0x2dc
801b556: 493b ldr r1, [pc, #236] @ (801b644 <pbuf_free+0x108>)
801b558: 483b ldr r0, [pc, #236] @ (801b648 <pbuf_free+0x10c>)
801b55a: f00f fa67 bl 802aa2c <iprintf>
/* if assertions are disabled, proceed with debug output */
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("pbuf_free(p == NULL) was called.\n"));
return 0;
801b55e: 2300 movs r3, #0
801b560: e069 b.n 801b636 <pbuf_free+0xfa>
}
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p));
PERF_START;
count = 0;
801b562: 2300 movs r3, #0
801b564: 77fb strb r3, [r7, #31]
/* de-allocate all consecutive pbufs from the head of the chain that
* obtain a zero reference count after decrementing*/
while (p != NULL) {
801b566: e062 b.n 801b62e <pbuf_free+0xf2>
LWIP_PBUF_REF_T ref;
SYS_ARCH_DECL_PROTECT(old_level);
/* Since decrementing ref cannot be guaranteed to be a single machine operation
* we must protect it. We put the new ref into a local variable to prevent
* further protection. */
SYS_ARCH_PROTECT(old_level);
801b568: f00b ffca bl 8027500 <sys_arch_protect>
801b56c: 61b8 str r0, [r7, #24]
/* all pbufs in a chain are referenced at least once */
LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0);
801b56e: 687b ldr r3, [r7, #4]
801b570: 7b9b ldrb r3, [r3, #14]
801b572: 2b00 cmp r3, #0
801b574: d106 bne.n 801b584 <pbuf_free+0x48>
801b576: 4b32 ldr r3, [pc, #200] @ (801b640 <pbuf_free+0x104>)
801b578: f240 22f1 movw r2, #753 @ 0x2f1
801b57c: 4933 ldr r1, [pc, #204] @ (801b64c <pbuf_free+0x110>)
801b57e: 4832 ldr r0, [pc, #200] @ (801b648 <pbuf_free+0x10c>)
801b580: f00f fa54 bl 802aa2c <iprintf>
/* decrease reference count (number of pointers to pbuf) */
ref = --(p->ref);
801b584: 687b ldr r3, [r7, #4]
801b586: 7b9b ldrb r3, [r3, #14]
801b588: 3b01 subs r3, #1
801b58a: b2da uxtb r2, r3
801b58c: 687b ldr r3, [r7, #4]
801b58e: 739a strb r2, [r3, #14]
801b590: 687b ldr r3, [r7, #4]
801b592: 7b9b ldrb r3, [r3, #14]
801b594: 75fb strb r3, [r7, #23]
SYS_ARCH_UNPROTECT(old_level);
801b596: 69b8 ldr r0, [r7, #24]
801b598: f00b ffc0 bl 802751c <sys_arch_unprotect>
/* this pbuf is no longer referenced to? */
if (ref == 0) {
801b59c: 7dfb ldrb r3, [r7, #23]
801b59e: 2b00 cmp r3, #0
801b5a0: d143 bne.n 801b62a <pbuf_free+0xee>
/* remember next pbuf in chain for next iteration */
q = p->next;
801b5a2: 687b ldr r3, [r7, #4]
801b5a4: 681b ldr r3, [r3, #0]
801b5a6: 613b str r3, [r7, #16]
LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p));
alloc_src = pbuf_get_allocsrc(p);
801b5a8: 687b ldr r3, [r7, #4]
801b5aa: 7b1b ldrb r3, [r3, #12]
801b5ac: f003 030f and.w r3, r3, #15
801b5b0: 73fb strb r3, [r7, #15]
#if LWIP_SUPPORT_CUSTOM_PBUF
/* is this a custom pbuf? */
if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) {
801b5b2: 687b ldr r3, [r7, #4]
801b5b4: 7b5b ldrb r3, [r3, #13]
801b5b6: f003 0302 and.w r3, r3, #2
801b5ba: 2b00 cmp r3, #0
801b5bc: d011 beq.n 801b5e2 <pbuf_free+0xa6>
struct pbuf_custom *pc = (struct pbuf_custom *)p;
801b5be: 687b ldr r3, [r7, #4]
801b5c0: 60bb str r3, [r7, #8]
LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL);
801b5c2: 68bb ldr r3, [r7, #8]
801b5c4: 691b ldr r3, [r3, #16]
801b5c6: 2b00 cmp r3, #0
801b5c8: d106 bne.n 801b5d8 <pbuf_free+0x9c>
801b5ca: 4b1d ldr r3, [pc, #116] @ (801b640 <pbuf_free+0x104>)
801b5cc: f240 22ff movw r2, #767 @ 0x2ff
801b5d0: 491f ldr r1, [pc, #124] @ (801b650 <pbuf_free+0x114>)
801b5d2: 481d ldr r0, [pc, #116] @ (801b648 <pbuf_free+0x10c>)
801b5d4: f00f fa2a bl 802aa2c <iprintf>
pc->custom_free_function(p);
801b5d8: 68bb ldr r3, [r7, #8]
801b5da: 691b ldr r3, [r3, #16]
801b5dc: 6878 ldr r0, [r7, #4]
801b5de: 4798 blx r3
801b5e0: e01d b.n 801b61e <pbuf_free+0xe2>
} else
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
{
/* is this a pbuf from the pool? */
if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL) {
801b5e2: 7bfb ldrb r3, [r7, #15]
801b5e4: 2b02 cmp r3, #2
801b5e6: d104 bne.n 801b5f2 <pbuf_free+0xb6>
memp_free(MEMP_PBUF_POOL, p);
801b5e8: 6879 ldr r1, [r7, #4]
801b5ea: 200c movs r0, #12
801b5ec: f7ff f8b8 bl 801a760 <memp_free>
801b5f0: e015 b.n 801b61e <pbuf_free+0xe2>
/* is this a ROM or RAM referencing pbuf? */
} else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF) {
801b5f2: 7bfb ldrb r3, [r7, #15]
801b5f4: 2b01 cmp r3, #1
801b5f6: d104 bne.n 801b602 <pbuf_free+0xc6>
memp_free(MEMP_PBUF, p);
801b5f8: 6879 ldr r1, [r7, #4]
801b5fa: 200b movs r0, #11
801b5fc: f7ff f8b0 bl 801a760 <memp_free>
801b600: e00d b.n 801b61e <pbuf_free+0xe2>
/* type == PBUF_RAM */
} else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) {
801b602: 7bfb ldrb r3, [r7, #15]
801b604: 2b00 cmp r3, #0
801b606: d103 bne.n 801b610 <pbuf_free+0xd4>
mem_free(p);
801b608: 6878 ldr r0, [r7, #4]
801b60a: f7fe fd05 bl 801a018 <mem_free>
801b60e: e006 b.n 801b61e <pbuf_free+0xe2>
} else {
/* @todo: support freeing other types */
LWIP_ASSERT("invalid pbuf type", 0);
801b610: 4b0b ldr r3, [pc, #44] @ (801b640 <pbuf_free+0x104>)
801b612: f240 320f movw r2, #783 @ 0x30f
801b616: 490f ldr r1, [pc, #60] @ (801b654 <pbuf_free+0x118>)
801b618: 480b ldr r0, [pc, #44] @ (801b648 <pbuf_free+0x10c>)
801b61a: f00f fa07 bl 802aa2c <iprintf>
}
}
count++;
801b61e: 7ffb ldrb r3, [r7, #31]
801b620: 3301 adds r3, #1
801b622: 77fb strb r3, [r7, #31]
/* proceed to next pbuf */
p = q;
801b624: 693b ldr r3, [r7, #16]
801b626: 607b str r3, [r7, #4]
801b628: e001 b.n 801b62e <pbuf_free+0xf2>
/* p->ref > 0, this pbuf is still referenced to */
/* (and so the remaining pbufs in chain as well) */
} else {
LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)ref));
/* stop walking through the chain */
p = NULL;
801b62a: 2300 movs r3, #0
801b62c: 607b str r3, [r7, #4]
while (p != NULL) {
801b62e: 687b ldr r3, [r7, #4]
801b630: 2b00 cmp r3, #0
801b632: d199 bne.n 801b568 <pbuf_free+0x2c>
}
}
PERF_STOP("pbuf_free");
/* return number of de-allocated pbufs */
return count;
801b634: 7ffb ldrb r3, [r7, #31]
}
801b636: 4618 mov r0, r3
801b638: 3720 adds r7, #32
801b63a: 46bd mov sp, r7
801b63c: bd80 pop {r7, pc}
801b63e: bf00 nop
801b640: 0802f2f0 .word 0x0802f2f0
801b644: 0802f454 .word 0x0802f454
801b648: 0802f350 .word 0x0802f350
801b64c: 0802f480 .word 0x0802f480
801b650: 0802f498 .word 0x0802f498
801b654: 0802f4bc .word 0x0802f4bc
0801b658 <pbuf_clen>:
* @param p first pbuf of chain
* @return the number of pbufs in a chain
*/
u16_t
pbuf_clen(const struct pbuf *p)
{
801b658: b480 push {r7}
801b65a: b085 sub sp, #20
801b65c: af00 add r7, sp, #0
801b65e: 6078 str r0, [r7, #4]
u16_t len;
len = 0;
801b660: 2300 movs r3, #0
801b662: 81fb strh r3, [r7, #14]
while (p != NULL) {
801b664: e005 b.n 801b672 <pbuf_clen+0x1a>
++len;
801b666: 89fb ldrh r3, [r7, #14]
801b668: 3301 adds r3, #1
801b66a: 81fb strh r3, [r7, #14]
p = p->next;
801b66c: 687b ldr r3, [r7, #4]
801b66e: 681b ldr r3, [r3, #0]
801b670: 607b str r3, [r7, #4]
while (p != NULL) {
801b672: 687b ldr r3, [r7, #4]
801b674: 2b00 cmp r3, #0
801b676: d1f6 bne.n 801b666 <pbuf_clen+0xe>
}
return len;
801b678: 89fb ldrh r3, [r7, #14]
}
801b67a: 4618 mov r0, r3
801b67c: 3714 adds r7, #20
801b67e: 46bd mov sp, r7
801b680: f85d 7b04 ldr.w r7, [sp], #4
801b684: 4770 bx lr
...
0801b688 <pbuf_ref>:
* @param p pbuf to increase reference counter of
*
*/
void
pbuf_ref(struct pbuf *p)
{
801b688: b580 push {r7, lr}
801b68a: b084 sub sp, #16
801b68c: af00 add r7, sp, #0
801b68e: 6078 str r0, [r7, #4]
/* pbuf given? */
if (p != NULL) {
801b690: 687b ldr r3, [r7, #4]
801b692: 2b00 cmp r3, #0
801b694: d016 beq.n 801b6c4 <pbuf_ref+0x3c>
SYS_ARCH_SET(p->ref, (LWIP_PBUF_REF_T)(p->ref + 1));
801b696: f00b ff33 bl 8027500 <sys_arch_protect>
801b69a: 60f8 str r0, [r7, #12]
801b69c: 687b ldr r3, [r7, #4]
801b69e: 7b9b ldrb r3, [r3, #14]
801b6a0: 3301 adds r3, #1
801b6a2: b2da uxtb r2, r3
801b6a4: 687b ldr r3, [r7, #4]
801b6a6: 739a strb r2, [r3, #14]
801b6a8: 68f8 ldr r0, [r7, #12]
801b6aa: f00b ff37 bl 802751c <sys_arch_unprotect>
LWIP_ASSERT("pbuf ref overflow", p->ref > 0);
801b6ae: 687b ldr r3, [r7, #4]
801b6b0: 7b9b ldrb r3, [r3, #14]
801b6b2: 2b00 cmp r3, #0
801b6b4: d106 bne.n 801b6c4 <pbuf_ref+0x3c>
801b6b6: 4b05 ldr r3, [pc, #20] @ (801b6cc <pbuf_ref+0x44>)
801b6b8: f240 3242 movw r2, #834 @ 0x342
801b6bc: 4904 ldr r1, [pc, #16] @ (801b6d0 <pbuf_ref+0x48>)
801b6be: 4805 ldr r0, [pc, #20] @ (801b6d4 <pbuf_ref+0x4c>)
801b6c0: f00f f9b4 bl 802aa2c <iprintf>
}
}
801b6c4: bf00 nop
801b6c6: 3710 adds r7, #16
801b6c8: 46bd mov sp, r7
801b6ca: bd80 pop {r7, pc}
801b6cc: 0802f2f0 .word 0x0802f2f0
801b6d0: 0802f4d0 .word 0x0802f4d0
801b6d4: 0802f350 .word 0x0802f350
0801b6d8 <pbuf_cat>:
*
* @see pbuf_chain()
*/
void
pbuf_cat(struct pbuf *h, struct pbuf *t)
{
801b6d8: b580 push {r7, lr}
801b6da: b084 sub sp, #16
801b6dc: af00 add r7, sp, #0
801b6de: 6078 str r0, [r7, #4]
801b6e0: 6039 str r1, [r7, #0]
struct pbuf *p;
LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)",
801b6e2: 687b ldr r3, [r7, #4]
801b6e4: 2b00 cmp r3, #0
801b6e6: d002 beq.n 801b6ee <pbuf_cat+0x16>
801b6e8: 683b ldr r3, [r7, #0]
801b6ea: 2b00 cmp r3, #0
801b6ec: d107 bne.n 801b6fe <pbuf_cat+0x26>
801b6ee: 4b20 ldr r3, [pc, #128] @ (801b770 <pbuf_cat+0x98>)
801b6f0: f240 3259 movw r2, #857 @ 0x359
801b6f4: 491f ldr r1, [pc, #124] @ (801b774 <pbuf_cat+0x9c>)
801b6f6: 4820 ldr r0, [pc, #128] @ (801b778 <pbuf_cat+0xa0>)
801b6f8: f00f f998 bl 802aa2c <iprintf>
801b6fc: e034 b.n 801b768 <pbuf_cat+0x90>
((h != NULL) && (t != NULL)), return;);
/* proceed to last pbuf of chain */
for (p = h; p->next != NULL; p = p->next) {
801b6fe: 687b ldr r3, [r7, #4]
801b700: 60fb str r3, [r7, #12]
801b702: e00a b.n 801b71a <pbuf_cat+0x42>
/* add total length of second chain to all totals of first chain */
p->tot_len = (u16_t)(p->tot_len + t->tot_len);
801b704: 68fb ldr r3, [r7, #12]
801b706: 891a ldrh r2, [r3, #8]
801b708: 683b ldr r3, [r7, #0]
801b70a: 891b ldrh r3, [r3, #8]
801b70c: 4413 add r3, r2
801b70e: b29a uxth r2, r3
801b710: 68fb ldr r3, [r7, #12]
801b712: 811a strh r2, [r3, #8]
for (p = h; p->next != NULL; p = p->next) {
801b714: 68fb ldr r3, [r7, #12]
801b716: 681b ldr r3, [r3, #0]
801b718: 60fb str r3, [r7, #12]
801b71a: 68fb ldr r3, [r7, #12]
801b71c: 681b ldr r3, [r3, #0]
801b71e: 2b00 cmp r3, #0
801b720: d1f0 bne.n 801b704 <pbuf_cat+0x2c>
}
/* { p is last pbuf of first h chain, p->next == NULL } */
LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len);
801b722: 68fb ldr r3, [r7, #12]
801b724: 891a ldrh r2, [r3, #8]
801b726: 68fb ldr r3, [r7, #12]
801b728: 895b ldrh r3, [r3, #10]
801b72a: 429a cmp r2, r3
801b72c: d006 beq.n 801b73c <pbuf_cat+0x64>
801b72e: 4b10 ldr r3, [pc, #64] @ (801b770 <pbuf_cat+0x98>)
801b730: f240 3262 movw r2, #866 @ 0x362
801b734: 4911 ldr r1, [pc, #68] @ (801b77c <pbuf_cat+0xa4>)
801b736: 4810 ldr r0, [pc, #64] @ (801b778 <pbuf_cat+0xa0>)
801b738: f00f f978 bl 802aa2c <iprintf>
LWIP_ASSERT("p->next == NULL", p->next == NULL);
801b73c: 68fb ldr r3, [r7, #12]
801b73e: 681b ldr r3, [r3, #0]
801b740: 2b00 cmp r3, #0
801b742: d006 beq.n 801b752 <pbuf_cat+0x7a>
801b744: 4b0a ldr r3, [pc, #40] @ (801b770 <pbuf_cat+0x98>)
801b746: f240 3263 movw r2, #867 @ 0x363
801b74a: 490d ldr r1, [pc, #52] @ (801b780 <pbuf_cat+0xa8>)
801b74c: 480a ldr r0, [pc, #40] @ (801b778 <pbuf_cat+0xa0>)
801b74e: f00f f96d bl 802aa2c <iprintf>
/* add total length of second chain to last pbuf total of first chain */
p->tot_len = (u16_t)(p->tot_len + t->tot_len);
801b752: 68fb ldr r3, [r7, #12]
801b754: 891a ldrh r2, [r3, #8]
801b756: 683b ldr r3, [r7, #0]
801b758: 891b ldrh r3, [r3, #8]
801b75a: 4413 add r3, r2
801b75c: b29a uxth r2, r3
801b75e: 68fb ldr r3, [r7, #12]
801b760: 811a strh r2, [r3, #8]
/* chain last pbuf of head (p) with first of tail (t) */
p->next = t;
801b762: 68fb ldr r3, [r7, #12]
801b764: 683a ldr r2, [r7, #0]
801b766: 601a str r2, [r3, #0]
/* p->next now references t, but the caller will drop its reference to t,
* so netto there is no change to the reference count of t.
*/
}
801b768: 3710 adds r7, #16
801b76a: 46bd mov sp, r7
801b76c: bd80 pop {r7, pc}
801b76e: bf00 nop
801b770: 0802f2f0 .word 0x0802f2f0
801b774: 0802f4e4 .word 0x0802f4e4
801b778: 0802f350 .word 0x0802f350
801b77c: 0802f51c .word 0x0802f51c
801b780: 0802f54c .word 0x0802f54c
0801b784 <pbuf_chain>:
* The ->ref field of the first pbuf of the tail chain is adjusted.
*
*/
void
pbuf_chain(struct pbuf *h, struct pbuf *t)
{
801b784: b580 push {r7, lr}
801b786: b082 sub sp, #8
801b788: af00 add r7, sp, #0
801b78a: 6078 str r0, [r7, #4]
801b78c: 6039 str r1, [r7, #0]
pbuf_cat(h, t);
801b78e: 6839 ldr r1, [r7, #0]
801b790: 6878 ldr r0, [r7, #4]
801b792: f7ff ffa1 bl 801b6d8 <pbuf_cat>
/* t is now referenced by h */
pbuf_ref(t);
801b796: 6838 ldr r0, [r7, #0]
801b798: f7ff ff76 bl 801b688 <pbuf_ref>
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t));
}
801b79c: bf00 nop
801b79e: 3708 adds r7, #8
801b7a0: 46bd mov sp, r7
801b7a2: bd80 pop {r7, pc}
0801b7a4 <pbuf_copy>:
* ERR_ARG if one of the pbufs is NULL or p_to is not big
* enough to hold p_from
*/
err_t
pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from)
{
801b7a4: b580 push {r7, lr}
801b7a6: b086 sub sp, #24
801b7a8: af00 add r7, sp, #0
801b7aa: 6078 str r0, [r7, #4]
801b7ac: 6039 str r1, [r7, #0]
size_t offset_to = 0, offset_from = 0, len;
801b7ae: 2300 movs r3, #0
801b7b0: 617b str r3, [r7, #20]
801b7b2: 2300 movs r3, #0
801b7b4: 613b str r3, [r7, #16]
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n",
(const void *)p_to, (const void *)p_from));
/* is the target big enough to hold the source? */
LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) &&
801b7b6: 687b ldr r3, [r7, #4]
801b7b8: 2b00 cmp r3, #0
801b7ba: d008 beq.n 801b7ce <pbuf_copy+0x2a>
801b7bc: 683b ldr r3, [r7, #0]
801b7be: 2b00 cmp r3, #0
801b7c0: d005 beq.n 801b7ce <pbuf_copy+0x2a>
801b7c2: 687b ldr r3, [r7, #4]
801b7c4: 891a ldrh r2, [r3, #8]
801b7c6: 683b ldr r3, [r7, #0]
801b7c8: 891b ldrh r3, [r3, #8]
801b7ca: 429a cmp r2, r3
801b7cc: d209 bcs.n 801b7e2 <pbuf_copy+0x3e>
801b7ce: 4b57 ldr r3, [pc, #348] @ (801b92c <pbuf_copy+0x188>)
801b7d0: f240 32c9 movw r2, #969 @ 0x3c9
801b7d4: 4956 ldr r1, [pc, #344] @ (801b930 <pbuf_copy+0x18c>)
801b7d6: 4857 ldr r0, [pc, #348] @ (801b934 <pbuf_copy+0x190>)
801b7d8: f00f f928 bl 802aa2c <iprintf>
801b7dc: f06f 030f mvn.w r3, #15
801b7e0: e09f b.n 801b922 <pbuf_copy+0x17e>
(p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;);
/* iterate through pbuf chain */
do {
/* copy one part of the original chain */
if ((p_to->len - offset_to) >= (p_from->len - offset_from)) {
801b7e2: 687b ldr r3, [r7, #4]
801b7e4: 895b ldrh r3, [r3, #10]
801b7e6: 461a mov r2, r3
801b7e8: 697b ldr r3, [r7, #20]
801b7ea: 1ad2 subs r2, r2, r3
801b7ec: 683b ldr r3, [r7, #0]
801b7ee: 895b ldrh r3, [r3, #10]
801b7f0: 4619 mov r1, r3
801b7f2: 693b ldr r3, [r7, #16]
801b7f4: 1acb subs r3, r1, r3
801b7f6: 429a cmp r2, r3
801b7f8: d306 bcc.n 801b808 <pbuf_copy+0x64>
/* complete current p_from fits into current p_to */
len = p_from->len - offset_from;
801b7fa: 683b ldr r3, [r7, #0]
801b7fc: 895b ldrh r3, [r3, #10]
801b7fe: 461a mov r2, r3
801b800: 693b ldr r3, [r7, #16]
801b802: 1ad3 subs r3, r2, r3
801b804: 60fb str r3, [r7, #12]
801b806: e005 b.n 801b814 <pbuf_copy+0x70>
} else {
/* current p_from does not fit into current p_to */
len = p_to->len - offset_to;
801b808: 687b ldr r3, [r7, #4]
801b80a: 895b ldrh r3, [r3, #10]
801b80c: 461a mov r2, r3
801b80e: 697b ldr r3, [r7, #20]
801b810: 1ad3 subs r3, r2, r3
801b812: 60fb str r3, [r7, #12]
}
MEMCPY((u8_t *)p_to->payload + offset_to, (u8_t *)p_from->payload + offset_from, len);
801b814: 687b ldr r3, [r7, #4]
801b816: 685a ldr r2, [r3, #4]
801b818: 697b ldr r3, [r7, #20]
801b81a: 18d0 adds r0, r2, r3
801b81c: 683b ldr r3, [r7, #0]
801b81e: 685a ldr r2, [r3, #4]
801b820: 693b ldr r3, [r7, #16]
801b822: 4413 add r3, r2
801b824: 68fa ldr r2, [r7, #12]
801b826: 4619 mov r1, r3
801b828: f00f fb89 bl 802af3e <memcpy>
offset_to += len;
801b82c: 697a ldr r2, [r7, #20]
801b82e: 68fb ldr r3, [r7, #12]
801b830: 4413 add r3, r2
801b832: 617b str r3, [r7, #20]
offset_from += len;
801b834: 693a ldr r2, [r7, #16]
801b836: 68fb ldr r3, [r7, #12]
801b838: 4413 add r3, r2
801b83a: 613b str r3, [r7, #16]
LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len);
801b83c: 687b ldr r3, [r7, #4]
801b83e: 895b ldrh r3, [r3, #10]
801b840: 461a mov r2, r3
801b842: 697b ldr r3, [r7, #20]
801b844: 4293 cmp r3, r2
801b846: d906 bls.n 801b856 <pbuf_copy+0xb2>
801b848: 4b38 ldr r3, [pc, #224] @ (801b92c <pbuf_copy+0x188>)
801b84a: f240 32d9 movw r2, #985 @ 0x3d9
801b84e: 493a ldr r1, [pc, #232] @ (801b938 <pbuf_copy+0x194>)
801b850: 4838 ldr r0, [pc, #224] @ (801b934 <pbuf_copy+0x190>)
801b852: f00f f8eb bl 802aa2c <iprintf>
LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len);
801b856: 683b ldr r3, [r7, #0]
801b858: 895b ldrh r3, [r3, #10]
801b85a: 461a mov r2, r3
801b85c: 693b ldr r3, [r7, #16]
801b85e: 4293 cmp r3, r2
801b860: d906 bls.n 801b870 <pbuf_copy+0xcc>
801b862: 4b32 ldr r3, [pc, #200] @ (801b92c <pbuf_copy+0x188>)
801b864: f240 32da movw r2, #986 @ 0x3da
801b868: 4934 ldr r1, [pc, #208] @ (801b93c <pbuf_copy+0x198>)
801b86a: 4832 ldr r0, [pc, #200] @ (801b934 <pbuf_copy+0x190>)
801b86c: f00f f8de bl 802aa2c <iprintf>
if (offset_from >= p_from->len) {
801b870: 683b ldr r3, [r7, #0]
801b872: 895b ldrh r3, [r3, #10]
801b874: 461a mov r2, r3
801b876: 693b ldr r3, [r7, #16]
801b878: 4293 cmp r3, r2
801b87a: d304 bcc.n 801b886 <pbuf_copy+0xe2>
/* on to next p_from (if any) */
offset_from = 0;
801b87c: 2300 movs r3, #0
801b87e: 613b str r3, [r7, #16]
p_from = p_from->next;
801b880: 683b ldr r3, [r7, #0]
801b882: 681b ldr r3, [r3, #0]
801b884: 603b str r3, [r7, #0]
}
if (offset_to == p_to->len) {
801b886: 687b ldr r3, [r7, #4]
801b888: 895b ldrh r3, [r3, #10]
801b88a: 461a mov r2, r3
801b88c: 697b ldr r3, [r7, #20]
801b88e: 4293 cmp r3, r2
801b890: d114 bne.n 801b8bc <pbuf_copy+0x118>
/* on to next p_to (if any) */
offset_to = 0;
801b892: 2300 movs r3, #0
801b894: 617b str r3, [r7, #20]
p_to = p_to->next;
801b896: 687b ldr r3, [r7, #4]
801b898: 681b ldr r3, [r3, #0]
801b89a: 607b str r3, [r7, #4]
LWIP_ERROR("p_to != NULL", (p_to != NULL) || (p_from == NULL), return ERR_ARG;);
801b89c: 687b ldr r3, [r7, #4]
801b89e: 2b00 cmp r3, #0
801b8a0: d10c bne.n 801b8bc <pbuf_copy+0x118>
801b8a2: 683b ldr r3, [r7, #0]
801b8a4: 2b00 cmp r3, #0
801b8a6: d009 beq.n 801b8bc <pbuf_copy+0x118>
801b8a8: 4b20 ldr r3, [pc, #128] @ (801b92c <pbuf_copy+0x188>)
801b8aa: f44f 7279 mov.w r2, #996 @ 0x3e4
801b8ae: 4924 ldr r1, [pc, #144] @ (801b940 <pbuf_copy+0x19c>)
801b8b0: 4820 ldr r0, [pc, #128] @ (801b934 <pbuf_copy+0x190>)
801b8b2: f00f f8bb bl 802aa2c <iprintf>
801b8b6: f06f 030f mvn.w r3, #15
801b8ba: e032 b.n 801b922 <pbuf_copy+0x17e>
}
if ((p_from != NULL) && (p_from->len == p_from->tot_len)) {
801b8bc: 683b ldr r3, [r7, #0]
801b8be: 2b00 cmp r3, #0
801b8c0: d013 beq.n 801b8ea <pbuf_copy+0x146>
801b8c2: 683b ldr r3, [r7, #0]
801b8c4: 895a ldrh r2, [r3, #10]
801b8c6: 683b ldr r3, [r7, #0]
801b8c8: 891b ldrh r3, [r3, #8]
801b8ca: 429a cmp r2, r3
801b8cc: d10d bne.n 801b8ea <pbuf_copy+0x146>
/* don't copy more than one packet! */
LWIP_ERROR("pbuf_copy() does not allow packet queues!",
801b8ce: 683b ldr r3, [r7, #0]
801b8d0: 681b ldr r3, [r3, #0]
801b8d2: 2b00 cmp r3, #0
801b8d4: d009 beq.n 801b8ea <pbuf_copy+0x146>
801b8d6: 4b15 ldr r3, [pc, #84] @ (801b92c <pbuf_copy+0x188>)
801b8d8: f240 32e9 movw r2, #1001 @ 0x3e9
801b8dc: 4919 ldr r1, [pc, #100] @ (801b944 <pbuf_copy+0x1a0>)
801b8de: 4815 ldr r0, [pc, #84] @ (801b934 <pbuf_copy+0x190>)
801b8e0: f00f f8a4 bl 802aa2c <iprintf>
801b8e4: f06f 0305 mvn.w r3, #5
801b8e8: e01b b.n 801b922 <pbuf_copy+0x17e>
(p_from->next == NULL), return ERR_VAL;);
}
if ((p_to != NULL) && (p_to->len == p_to->tot_len)) {
801b8ea: 687b ldr r3, [r7, #4]
801b8ec: 2b00 cmp r3, #0
801b8ee: d013 beq.n 801b918 <pbuf_copy+0x174>
801b8f0: 687b ldr r3, [r7, #4]
801b8f2: 895a ldrh r2, [r3, #10]
801b8f4: 687b ldr r3, [r7, #4]
801b8f6: 891b ldrh r3, [r3, #8]
801b8f8: 429a cmp r2, r3
801b8fa: d10d bne.n 801b918 <pbuf_copy+0x174>
/* don't copy more than one packet! */
LWIP_ERROR("pbuf_copy() does not allow packet queues!",
801b8fc: 687b ldr r3, [r7, #4]
801b8fe: 681b ldr r3, [r3, #0]
801b900: 2b00 cmp r3, #0
801b902: d009 beq.n 801b918 <pbuf_copy+0x174>
801b904: 4b09 ldr r3, [pc, #36] @ (801b92c <pbuf_copy+0x188>)
801b906: f240 32ee movw r2, #1006 @ 0x3ee
801b90a: 490e ldr r1, [pc, #56] @ (801b944 <pbuf_copy+0x1a0>)
801b90c: 4809 ldr r0, [pc, #36] @ (801b934 <pbuf_copy+0x190>)
801b90e: f00f f88d bl 802aa2c <iprintf>
801b912: f06f 0305 mvn.w r3, #5
801b916: e004 b.n 801b922 <pbuf_copy+0x17e>
(p_to->next == NULL), return ERR_VAL;);
}
} while (p_from);
801b918: 683b ldr r3, [r7, #0]
801b91a: 2b00 cmp r3, #0
801b91c: f47f af61 bne.w 801b7e2 <pbuf_copy+0x3e>
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n"));
return ERR_OK;
801b920: 2300 movs r3, #0
}
801b922: 4618 mov r0, r3
801b924: 3718 adds r7, #24
801b926: 46bd mov sp, r7
801b928: bd80 pop {r7, pc}
801b92a: bf00 nop
801b92c: 0802f2f0 .word 0x0802f2f0
801b930: 0802f598 .word 0x0802f598
801b934: 0802f350 .word 0x0802f350
801b938: 0802f5c8 .word 0x0802f5c8
801b93c: 0802f5e0 .word 0x0802f5e0
801b940: 0802f5fc .word 0x0802f5fc
801b944: 0802f60c .word 0x0802f60c
0801b948 <pbuf_copy_partial>:
* @param offset offset into the packet buffer from where to begin copying len bytes
* @return the number of bytes copied, or 0 on failure
*/
u16_t
pbuf_copy_partial(const struct pbuf *buf, void *dataptr, u16_t len, u16_t offset)
{
801b948: b580 push {r7, lr}
801b94a: b088 sub sp, #32
801b94c: af00 add r7, sp, #0
801b94e: 60f8 str r0, [r7, #12]
801b950: 60b9 str r1, [r7, #8]
801b952: 4611 mov r1, r2
801b954: 461a mov r2, r3
801b956: 460b mov r3, r1
801b958: 80fb strh r3, [r7, #6]
801b95a: 4613 mov r3, r2
801b95c: 80bb strh r3, [r7, #4]
const struct pbuf *p;
u16_t left = 0;
801b95e: 2300 movs r3, #0
801b960: 837b strh r3, [r7, #26]
u16_t buf_copy_len;
u16_t copied_total = 0;
801b962: 2300 movs r3, #0
801b964: 82fb strh r3, [r7, #22]
LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;);
801b966: 68fb ldr r3, [r7, #12]
801b968: 2b00 cmp r3, #0
801b96a: d108 bne.n 801b97e <pbuf_copy_partial+0x36>
801b96c: 4b2b ldr r3, [pc, #172] @ (801ba1c <pbuf_copy_partial+0xd4>)
801b96e: f240 420a movw r2, #1034 @ 0x40a
801b972: 492b ldr r1, [pc, #172] @ (801ba20 <pbuf_copy_partial+0xd8>)
801b974: 482b ldr r0, [pc, #172] @ (801ba24 <pbuf_copy_partial+0xdc>)
801b976: f00f f859 bl 802aa2c <iprintf>
801b97a: 2300 movs r3, #0
801b97c: e04a b.n 801ba14 <pbuf_copy_partial+0xcc>
LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;);
801b97e: 68bb ldr r3, [r7, #8]
801b980: 2b00 cmp r3, #0
801b982: d108 bne.n 801b996 <pbuf_copy_partial+0x4e>
801b984: 4b25 ldr r3, [pc, #148] @ (801ba1c <pbuf_copy_partial+0xd4>)
801b986: f240 420b movw r2, #1035 @ 0x40b
801b98a: 4927 ldr r1, [pc, #156] @ (801ba28 <pbuf_copy_partial+0xe0>)
801b98c: 4825 ldr r0, [pc, #148] @ (801ba24 <pbuf_copy_partial+0xdc>)
801b98e: f00f f84d bl 802aa2c <iprintf>
801b992: 2300 movs r3, #0
801b994: e03e b.n 801ba14 <pbuf_copy_partial+0xcc>
/* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */
for (p = buf; len != 0 && p != NULL; p = p->next) {
801b996: 68fb ldr r3, [r7, #12]
801b998: 61fb str r3, [r7, #28]
801b99a: e034 b.n 801ba06 <pbuf_copy_partial+0xbe>
if ((offset != 0) && (offset >= p->len)) {
801b99c: 88bb ldrh r3, [r7, #4]
801b99e: 2b00 cmp r3, #0
801b9a0: d00a beq.n 801b9b8 <pbuf_copy_partial+0x70>
801b9a2: 69fb ldr r3, [r7, #28]
801b9a4: 895b ldrh r3, [r3, #10]
801b9a6: 88ba ldrh r2, [r7, #4]
801b9a8: 429a cmp r2, r3
801b9aa: d305 bcc.n 801b9b8 <pbuf_copy_partial+0x70>
/* don't copy from this buffer -> on to the next */
offset = (u16_t)(offset - p->len);
801b9ac: 69fb ldr r3, [r7, #28]
801b9ae: 895b ldrh r3, [r3, #10]
801b9b0: 88ba ldrh r2, [r7, #4]
801b9b2: 1ad3 subs r3, r2, r3
801b9b4: 80bb strh r3, [r7, #4]
801b9b6: e023 b.n 801ba00 <pbuf_copy_partial+0xb8>
} else {
/* copy from this buffer. maybe only partially. */
buf_copy_len = (u16_t)(p->len - offset);
801b9b8: 69fb ldr r3, [r7, #28]
801b9ba: 895a ldrh r2, [r3, #10]
801b9bc: 88bb ldrh r3, [r7, #4]
801b9be: 1ad3 subs r3, r2, r3
801b9c0: 833b strh r3, [r7, #24]
if (buf_copy_len > len) {
801b9c2: 8b3a ldrh r2, [r7, #24]
801b9c4: 88fb ldrh r3, [r7, #6]
801b9c6: 429a cmp r2, r3
801b9c8: d901 bls.n 801b9ce <pbuf_copy_partial+0x86>
buf_copy_len = len;
801b9ca: 88fb ldrh r3, [r7, #6]
801b9cc: 833b strh r3, [r7, #24]
}
/* copy the necessary parts of the buffer */
MEMCPY(&((char *)dataptr)[left], &((char *)p->payload)[offset], buf_copy_len);
801b9ce: 8b7b ldrh r3, [r7, #26]
801b9d0: 68ba ldr r2, [r7, #8]
801b9d2: 18d0 adds r0, r2, r3
801b9d4: 69fb ldr r3, [r7, #28]
801b9d6: 685a ldr r2, [r3, #4]
801b9d8: 88bb ldrh r3, [r7, #4]
801b9da: 4413 add r3, r2
801b9dc: 8b3a ldrh r2, [r7, #24]
801b9de: 4619 mov r1, r3
801b9e0: f00f faad bl 802af3e <memcpy>
copied_total = (u16_t)(copied_total + buf_copy_len);
801b9e4: 8afa ldrh r2, [r7, #22]
801b9e6: 8b3b ldrh r3, [r7, #24]
801b9e8: 4413 add r3, r2
801b9ea: 82fb strh r3, [r7, #22]
left = (u16_t)(left + buf_copy_len);
801b9ec: 8b7a ldrh r2, [r7, #26]
801b9ee: 8b3b ldrh r3, [r7, #24]
801b9f0: 4413 add r3, r2
801b9f2: 837b strh r3, [r7, #26]
len = (u16_t)(len - buf_copy_len);
801b9f4: 88fa ldrh r2, [r7, #6]
801b9f6: 8b3b ldrh r3, [r7, #24]
801b9f8: 1ad3 subs r3, r2, r3
801b9fa: 80fb strh r3, [r7, #6]
offset = 0;
801b9fc: 2300 movs r3, #0
801b9fe: 80bb strh r3, [r7, #4]
for (p = buf; len != 0 && p != NULL; p = p->next) {
801ba00: 69fb ldr r3, [r7, #28]
801ba02: 681b ldr r3, [r3, #0]
801ba04: 61fb str r3, [r7, #28]
801ba06: 88fb ldrh r3, [r7, #6]
801ba08: 2b00 cmp r3, #0
801ba0a: d002 beq.n 801ba12 <pbuf_copy_partial+0xca>
801ba0c: 69fb ldr r3, [r7, #28]
801ba0e: 2b00 cmp r3, #0
801ba10: d1c4 bne.n 801b99c <pbuf_copy_partial+0x54>
}
}
return copied_total;
801ba12: 8afb ldrh r3, [r7, #22]
}
801ba14: 4618 mov r0, r3
801ba16: 3720 adds r7, #32
801ba18: 46bd mov sp, r7
801ba1a: bd80 pop {r7, pc}
801ba1c: 0802f2f0 .word 0x0802f2f0
801ba20: 0802f638 .word 0x0802f638
801ba24: 0802f350 .word 0x0802f350
801ba28: 0802f658 .word 0x0802f658
0801ba2c <pbuf_clone>:
*
* @return a new pbuf or NULL if allocation fails
*/
struct pbuf *
pbuf_clone(pbuf_layer layer, pbuf_type type, struct pbuf *p)
{
801ba2c: b580 push {r7, lr}
801ba2e: b084 sub sp, #16
801ba30: af00 add r7, sp, #0
801ba32: 4603 mov r3, r0
801ba34: 603a str r2, [r7, #0]
801ba36: 71fb strb r3, [r7, #7]
801ba38: 460b mov r3, r1
801ba3a: 80bb strh r3, [r7, #4]
struct pbuf *q;
err_t err;
q = pbuf_alloc(layer, p->tot_len, type);
801ba3c: 683b ldr r3, [r7, #0]
801ba3e: 8919 ldrh r1, [r3, #8]
801ba40: 88ba ldrh r2, [r7, #4]
801ba42: 79fb ldrb r3, [r7, #7]
801ba44: 4618 mov r0, r3
801ba46: f7ff fa63 bl 801af10 <pbuf_alloc>
801ba4a: 60f8 str r0, [r7, #12]
if (q == NULL) {
801ba4c: 68fb ldr r3, [r7, #12]
801ba4e: 2b00 cmp r3, #0
801ba50: d101 bne.n 801ba56 <pbuf_clone+0x2a>
return NULL;
801ba52: 2300 movs r3, #0
801ba54: e011 b.n 801ba7a <pbuf_clone+0x4e>
}
err = pbuf_copy(q, p);
801ba56: 6839 ldr r1, [r7, #0]
801ba58: 68f8 ldr r0, [r7, #12]
801ba5a: f7ff fea3 bl 801b7a4 <pbuf_copy>
801ba5e: 4603 mov r3, r0
801ba60: 72fb strb r3, [r7, #11]
LWIP_UNUSED_ARG(err); /* in case of LWIP_NOASSERT */
LWIP_ASSERT("pbuf_copy failed", err == ERR_OK);
801ba62: f997 300b ldrsb.w r3, [r7, #11]
801ba66: 2b00 cmp r3, #0
801ba68: d006 beq.n 801ba78 <pbuf_clone+0x4c>
801ba6a: 4b06 ldr r3, [pc, #24] @ (801ba84 <pbuf_clone+0x58>)
801ba6c: f240 5224 movw r2, #1316 @ 0x524
801ba70: 4905 ldr r1, [pc, #20] @ (801ba88 <pbuf_clone+0x5c>)
801ba72: 4806 ldr r0, [pc, #24] @ (801ba8c <pbuf_clone+0x60>)
801ba74: f00e ffda bl 802aa2c <iprintf>
return q;
801ba78: 68fb ldr r3, [r7, #12]
}
801ba7a: 4618 mov r0, r3
801ba7c: 3710 adds r7, #16
801ba7e: 46bd mov sp, r7
801ba80: bd80 pop {r7, pc}
801ba82: bf00 nop
801ba84: 0802f2f0 .word 0x0802f2f0
801ba88: 0802f764 .word 0x0802f764
801ba8c: 0802f350 .word 0x0802f350
0801ba90 <tcp_init>:
/**
* Initialize this module.
*/
void
tcp_init(void)
{
801ba90: b580 push {r7, lr}
801ba92: af00 add r7, sp, #0
#ifdef LWIP_RAND
tcp_port = TCP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
801ba94: f00d fca0 bl 80293d8 <rand>
801ba98: 4603 mov r3, r0
801ba9a: b29b uxth r3, r3
801ba9c: f3c3 030d ubfx r3, r3, #0, #14
801baa0: b29b uxth r3, r3
801baa2: f5a3 4380 sub.w r3, r3, #16384 @ 0x4000
801baa6: b29a uxth r2, r3
801baa8: 4b01 ldr r3, [pc, #4] @ (801bab0 <tcp_init+0x20>)
801baaa: 801a strh r2, [r3, #0]
#endif /* LWIP_RAND */
}
801baac: bf00 nop
801baae: bd80 pop {r7, pc}
801bab0: 2400004c .word 0x2400004c
0801bab4 <tcp_free>:
/** Free a tcp pcb */
void
tcp_free(struct tcp_pcb *pcb)
{
801bab4: b580 push {r7, lr}
801bab6: b082 sub sp, #8
801bab8: af00 add r7, sp, #0
801baba: 6078 str r0, [r7, #4]
LWIP_ASSERT("tcp_free: LISTEN", pcb->state != LISTEN);
801babc: 687b ldr r3, [r7, #4]
801babe: 7d1b ldrb r3, [r3, #20]
801bac0: 2b01 cmp r3, #1
801bac2: d105 bne.n 801bad0 <tcp_free+0x1c>
801bac4: 4b06 ldr r3, [pc, #24] @ (801bae0 <tcp_free+0x2c>)
801bac6: 22d4 movs r2, #212 @ 0xd4
801bac8: 4906 ldr r1, [pc, #24] @ (801bae4 <tcp_free+0x30>)
801baca: 4807 ldr r0, [pc, #28] @ (801bae8 <tcp_free+0x34>)
801bacc: f00e ffae bl 802aa2c <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
memp_free(MEMP_TCP_PCB, pcb);
801bad0: 6879 ldr r1, [r7, #4]
801bad2: 2001 movs r0, #1
801bad4: f7fe fe44 bl 801a760 <memp_free>
}
801bad8: bf00 nop
801bada: 3708 adds r7, #8
801badc: 46bd mov sp, r7
801bade: bd80 pop {r7, pc}
801bae0: 0802f7f0 .word 0x0802f7f0
801bae4: 0802f820 .word 0x0802f820
801bae8: 0802f834 .word 0x0802f834
0801baec <tcp_free_listen>:
/** Free a tcp listen pcb */
static void
tcp_free_listen(struct tcp_pcb *pcb)
{
801baec: b580 push {r7, lr}
801baee: b082 sub sp, #8
801baf0: af00 add r7, sp, #0
801baf2: 6078 str r0, [r7, #4]
LWIP_ASSERT("tcp_free_listen: !LISTEN", pcb->state != LISTEN);
801baf4: 687b ldr r3, [r7, #4]
801baf6: 7d1b ldrb r3, [r3, #20]
801baf8: 2b01 cmp r3, #1
801bafa: d105 bne.n 801bb08 <tcp_free_listen+0x1c>
801bafc: 4b06 ldr r3, [pc, #24] @ (801bb18 <tcp_free_listen+0x2c>)
801bafe: 22df movs r2, #223 @ 0xdf
801bb00: 4906 ldr r1, [pc, #24] @ (801bb1c <tcp_free_listen+0x30>)
801bb02: 4807 ldr r0, [pc, #28] @ (801bb20 <tcp_free_listen+0x34>)
801bb04: f00e ff92 bl 802aa2c <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
memp_free(MEMP_TCP_PCB_LISTEN, pcb);
801bb08: 6879 ldr r1, [r7, #4]
801bb0a: 2002 movs r0, #2
801bb0c: f7fe fe28 bl 801a760 <memp_free>
}
801bb10: bf00 nop
801bb12: 3708 adds r7, #8
801bb14: 46bd mov sp, r7
801bb16: bd80 pop {r7, pc}
801bb18: 0802f7f0 .word 0x0802f7f0
801bb1c: 0802f85c .word 0x0802f85c
801bb20: 0802f834 .word 0x0802f834
0801bb24 <tcp_tmr>:
/**
* Called periodically to dispatch TCP timers.
*/
void
tcp_tmr(void)
{
801bb24: b580 push {r7, lr}
801bb26: af00 add r7, sp, #0
/* Call tcp_fasttmr() every 250 ms */
tcp_fasttmr();
801bb28: f001 f86a bl 801cc00 <tcp_fasttmr>
if (++tcp_timer & 1) {
801bb2c: 4b07 ldr r3, [pc, #28] @ (801bb4c <tcp_tmr+0x28>)
801bb2e: 781b ldrb r3, [r3, #0]
801bb30: 3301 adds r3, #1
801bb32: b2da uxtb r2, r3
801bb34: 4b05 ldr r3, [pc, #20] @ (801bb4c <tcp_tmr+0x28>)
801bb36: 701a strb r2, [r3, #0]
801bb38: 4b04 ldr r3, [pc, #16] @ (801bb4c <tcp_tmr+0x28>)
801bb3a: 781b ldrb r3, [r3, #0]
801bb3c: f003 0301 and.w r3, r3, #1
801bb40: 2b00 cmp r3, #0
801bb42: d001 beq.n 801bb48 <tcp_tmr+0x24>
/* Call tcp_slowtmr() every 500 ms, i.e., every other timer
tcp_tmr() is called. */
tcp_slowtmr();
801bb44: f000 fd1a bl 801c57c <tcp_slowtmr>
}
}
801bb48: bf00 nop
801bb4a: bd80 pop {r7, pc}
801bb4c: 2402afbd .word 0x2402afbd
0801bb50 <tcp_remove_listener>:
/** Called when a listen pcb is closed. Iterates one pcb list and removes the
* closed listener pcb from pcb->listener if matching.
*/
static void
tcp_remove_listener(struct tcp_pcb *list, struct tcp_pcb_listen *lpcb)
{
801bb50: b580 push {r7, lr}
801bb52: b084 sub sp, #16
801bb54: af00 add r7, sp, #0
801bb56: 6078 str r0, [r7, #4]
801bb58: 6039 str r1, [r7, #0]
struct tcp_pcb *pcb;
LWIP_ASSERT("tcp_remove_listener: invalid listener", lpcb != NULL);
801bb5a: 683b ldr r3, [r7, #0]
801bb5c: 2b00 cmp r3, #0
801bb5e: d105 bne.n 801bb6c <tcp_remove_listener+0x1c>
801bb60: 4b0d ldr r3, [pc, #52] @ (801bb98 <tcp_remove_listener+0x48>)
801bb62: 22ff movs r2, #255 @ 0xff
801bb64: 490d ldr r1, [pc, #52] @ (801bb9c <tcp_remove_listener+0x4c>)
801bb66: 480e ldr r0, [pc, #56] @ (801bba0 <tcp_remove_listener+0x50>)
801bb68: f00e ff60 bl 802aa2c <iprintf>
for (pcb = list; pcb != NULL; pcb = pcb->next) {
801bb6c: 687b ldr r3, [r7, #4]
801bb6e: 60fb str r3, [r7, #12]
801bb70: e00a b.n 801bb88 <tcp_remove_listener+0x38>
if (pcb->listener == lpcb) {
801bb72: 68fb ldr r3, [r7, #12]
801bb74: 6fdb ldr r3, [r3, #124] @ 0x7c
801bb76: 683a ldr r2, [r7, #0]
801bb78: 429a cmp r2, r3
801bb7a: d102 bne.n 801bb82 <tcp_remove_listener+0x32>
pcb->listener = NULL;
801bb7c: 68fb ldr r3, [r7, #12]
801bb7e: 2200 movs r2, #0
801bb80: 67da str r2, [r3, #124] @ 0x7c
for (pcb = list; pcb != NULL; pcb = pcb->next) {
801bb82: 68fb ldr r3, [r7, #12]
801bb84: 68db ldr r3, [r3, #12]
801bb86: 60fb str r3, [r7, #12]
801bb88: 68fb ldr r3, [r7, #12]
801bb8a: 2b00 cmp r3, #0
801bb8c: d1f1 bne.n 801bb72 <tcp_remove_listener+0x22>
}
}
}
801bb8e: bf00 nop
801bb90: bf00 nop
801bb92: 3710 adds r7, #16
801bb94: 46bd mov sp, r7
801bb96: bd80 pop {r7, pc}
801bb98: 0802f7f0 .word 0x0802f7f0
801bb9c: 0802f878 .word 0x0802f878
801bba0: 0802f834 .word 0x0802f834
0801bba4 <tcp_listen_closed>:
/** Called when a listen pcb is closed. Iterates all pcb lists and removes the
* closed listener pcb from pcb->listener if matching.
*/
static void
tcp_listen_closed(struct tcp_pcb *pcb)
{
801bba4: b580 push {r7, lr}
801bba6: b084 sub sp, #16
801bba8: af00 add r7, sp, #0
801bbaa: 6078 str r0, [r7, #4]
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
size_t i;
LWIP_ASSERT("pcb != NULL", pcb != NULL);
801bbac: 687b ldr r3, [r7, #4]
801bbae: 2b00 cmp r3, #0
801bbb0: d106 bne.n 801bbc0 <tcp_listen_closed+0x1c>
801bbb2: 4b14 ldr r3, [pc, #80] @ (801bc04 <tcp_listen_closed+0x60>)
801bbb4: f240 1211 movw r2, #273 @ 0x111
801bbb8: 4913 ldr r1, [pc, #76] @ (801bc08 <tcp_listen_closed+0x64>)
801bbba: 4814 ldr r0, [pc, #80] @ (801bc0c <tcp_listen_closed+0x68>)
801bbbc: f00e ff36 bl 802aa2c <iprintf>
LWIP_ASSERT("pcb->state == LISTEN", pcb->state == LISTEN);
801bbc0: 687b ldr r3, [r7, #4]
801bbc2: 7d1b ldrb r3, [r3, #20]
801bbc4: 2b01 cmp r3, #1
801bbc6: d006 beq.n 801bbd6 <tcp_listen_closed+0x32>
801bbc8: 4b0e ldr r3, [pc, #56] @ (801bc04 <tcp_listen_closed+0x60>)
801bbca: f44f 7289 mov.w r2, #274 @ 0x112
801bbce: 4910 ldr r1, [pc, #64] @ (801bc10 <tcp_listen_closed+0x6c>)
801bbd0: 480e ldr r0, [pc, #56] @ (801bc0c <tcp_listen_closed+0x68>)
801bbd2: f00e ff2b bl 802aa2c <iprintf>
for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
801bbd6: 2301 movs r3, #1
801bbd8: 60fb str r3, [r7, #12]
801bbda: e00b b.n 801bbf4 <tcp_listen_closed+0x50>
tcp_remove_listener(*tcp_pcb_lists[i], (struct tcp_pcb_listen *)pcb);
801bbdc: 4a0d ldr r2, [pc, #52] @ (801bc14 <tcp_listen_closed+0x70>)
801bbde: 68fb ldr r3, [r7, #12]
801bbe0: f852 3023 ldr.w r3, [r2, r3, lsl #2]
801bbe4: 681b ldr r3, [r3, #0]
801bbe6: 6879 ldr r1, [r7, #4]
801bbe8: 4618 mov r0, r3
801bbea: f7ff ffb1 bl 801bb50 <tcp_remove_listener>
for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
801bbee: 68fb ldr r3, [r7, #12]
801bbf0: 3301 adds r3, #1
801bbf2: 60fb str r3, [r7, #12]
801bbf4: 68fb ldr r3, [r7, #12]
801bbf6: 2b03 cmp r3, #3
801bbf8: d9f0 bls.n 801bbdc <tcp_listen_closed+0x38>
}
#endif
LWIP_UNUSED_ARG(pcb);
}
801bbfa: bf00 nop
801bbfc: bf00 nop
801bbfe: 3710 adds r7, #16
801bc00: 46bd mov sp, r7
801bc02: bd80 pop {r7, pc}
801bc04: 0802f7f0 .word 0x0802f7f0
801bc08: 0802f8a0 .word 0x0802f8a0
801bc0c: 0802f834 .word 0x0802f834
801bc10: 0802f8ac .word 0x0802f8ac
801bc14: 08031e90 .word 0x08031e90
0801bc18 <tcp_close_shutdown>:
* @return ERR_OK if connection has been closed
* another err_t if closing failed and pcb is not freed
*/
static err_t
tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data)
{
801bc18: b5b0 push {r4, r5, r7, lr}
801bc1a: b088 sub sp, #32
801bc1c: af04 add r7, sp, #16
801bc1e: 6078 str r0, [r7, #4]
801bc20: 460b mov r3, r1
801bc22: 70fb strb r3, [r7, #3]
LWIP_ASSERT("tcp_close_shutdown: invalid pcb", pcb != NULL);
801bc24: 687b ldr r3, [r7, #4]
801bc26: 2b00 cmp r3, #0
801bc28: d106 bne.n 801bc38 <tcp_close_shutdown+0x20>
801bc2a: 4b63 ldr r3, [pc, #396] @ (801bdb8 <tcp_close_shutdown+0x1a0>)
801bc2c: f44f 72af mov.w r2, #350 @ 0x15e
801bc30: 4962 ldr r1, [pc, #392] @ (801bdbc <tcp_close_shutdown+0x1a4>)
801bc32: 4863 ldr r0, [pc, #396] @ (801bdc0 <tcp_close_shutdown+0x1a8>)
801bc34: f00e fefa bl 802aa2c <iprintf>
if (rst_on_unacked_data && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) {
801bc38: 78fb ldrb r3, [r7, #3]
801bc3a: 2b00 cmp r3, #0
801bc3c: d067 beq.n 801bd0e <tcp_close_shutdown+0xf6>
801bc3e: 687b ldr r3, [r7, #4]
801bc40: 7d1b ldrb r3, [r3, #20]
801bc42: 2b04 cmp r3, #4
801bc44: d003 beq.n 801bc4e <tcp_close_shutdown+0x36>
801bc46: 687b ldr r3, [r7, #4]
801bc48: 7d1b ldrb r3, [r3, #20]
801bc4a: 2b07 cmp r3, #7
801bc4c: d15f bne.n 801bd0e <tcp_close_shutdown+0xf6>
if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND_MAX(pcb))) {
801bc4e: 687b ldr r3, [r7, #4]
801bc50: 6f9b ldr r3, [r3, #120] @ 0x78
801bc52: 2b00 cmp r3, #0
801bc54: d105 bne.n 801bc62 <tcp_close_shutdown+0x4a>
801bc56: 687b ldr r3, [r7, #4]
801bc58: 8d1b ldrh r3, [r3, #40] @ 0x28
801bc5a: f241 62d0 movw r2, #5840 @ 0x16d0
801bc5e: 4293 cmp r3, r2
801bc60: d055 beq.n 801bd0e <tcp_close_shutdown+0xf6>
/* Not all data received by application, send RST to tell the remote
side about this. */
LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED);
801bc62: 687b ldr r3, [r7, #4]
801bc64: 8b5b ldrh r3, [r3, #26]
801bc66: f003 0310 and.w r3, r3, #16
801bc6a: 2b00 cmp r3, #0
801bc6c: d106 bne.n 801bc7c <tcp_close_shutdown+0x64>
801bc6e: 4b52 ldr r3, [pc, #328] @ (801bdb8 <tcp_close_shutdown+0x1a0>)
801bc70: f44f 72b2 mov.w r2, #356 @ 0x164
801bc74: 4953 ldr r1, [pc, #332] @ (801bdc4 <tcp_close_shutdown+0x1ac>)
801bc76: 4852 ldr r0, [pc, #328] @ (801bdc0 <tcp_close_shutdown+0x1a8>)
801bc78: f00e fed8 bl 802aa2c <iprintf>
/* don't call tcp_abort here: we must not deallocate the pcb since
that might not be expected when calling tcp_close */
tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
801bc7c: 687b ldr r3, [r7, #4]
801bc7e: 6d18 ldr r0, [r3, #80] @ 0x50
801bc80: 687b ldr r3, [r7, #4]
801bc82: 6a5c ldr r4, [r3, #36] @ 0x24
801bc84: 687d ldr r5, [r7, #4]
801bc86: 687b ldr r3, [r7, #4]
801bc88: 3304 adds r3, #4
801bc8a: 687a ldr r2, [r7, #4]
801bc8c: 8ad2 ldrh r2, [r2, #22]
801bc8e: 6879 ldr r1, [r7, #4]
801bc90: 8b09 ldrh r1, [r1, #24]
801bc92: 9102 str r1, [sp, #8]
801bc94: 9201 str r2, [sp, #4]
801bc96: 9300 str r3, [sp, #0]
801bc98: 462b mov r3, r5
801bc9a: 4622 mov r2, r4
801bc9c: 4601 mov r1, r0
801bc9e: 6878 ldr r0, [r7, #4]
801bca0: f005 fdfa bl 8021898 <tcp_rst>
pcb->local_port, pcb->remote_port);
tcp_pcb_purge(pcb);
801bca4: 6878 ldr r0, [r7, #4]
801bca6: f001 fb67 bl 801d378 <tcp_pcb_purge>
TCP_RMV_ACTIVE(pcb);
801bcaa: 4b47 ldr r3, [pc, #284] @ (801bdc8 <tcp_close_shutdown+0x1b0>)
801bcac: 681b ldr r3, [r3, #0]
801bcae: 687a ldr r2, [r7, #4]
801bcb0: 429a cmp r2, r3
801bcb2: d105 bne.n 801bcc0 <tcp_close_shutdown+0xa8>
801bcb4: 4b44 ldr r3, [pc, #272] @ (801bdc8 <tcp_close_shutdown+0x1b0>)
801bcb6: 681b ldr r3, [r3, #0]
801bcb8: 68db ldr r3, [r3, #12]
801bcba: 4a43 ldr r2, [pc, #268] @ (801bdc8 <tcp_close_shutdown+0x1b0>)
801bcbc: 6013 str r3, [r2, #0]
801bcbe: e013 b.n 801bce8 <tcp_close_shutdown+0xd0>
801bcc0: 4b41 ldr r3, [pc, #260] @ (801bdc8 <tcp_close_shutdown+0x1b0>)
801bcc2: 681b ldr r3, [r3, #0]
801bcc4: 60fb str r3, [r7, #12]
801bcc6: e00c b.n 801bce2 <tcp_close_shutdown+0xca>
801bcc8: 68fb ldr r3, [r7, #12]
801bcca: 68db ldr r3, [r3, #12]
801bccc: 687a ldr r2, [r7, #4]
801bcce: 429a cmp r2, r3
801bcd0: d104 bne.n 801bcdc <tcp_close_shutdown+0xc4>
801bcd2: 687b ldr r3, [r7, #4]
801bcd4: 68da ldr r2, [r3, #12]
801bcd6: 68fb ldr r3, [r7, #12]
801bcd8: 60da str r2, [r3, #12]
801bcda: e005 b.n 801bce8 <tcp_close_shutdown+0xd0>
801bcdc: 68fb ldr r3, [r7, #12]
801bcde: 68db ldr r3, [r3, #12]
801bce0: 60fb str r3, [r7, #12]
801bce2: 68fb ldr r3, [r7, #12]
801bce4: 2b00 cmp r3, #0
801bce6: d1ef bne.n 801bcc8 <tcp_close_shutdown+0xb0>
801bce8: 687b ldr r3, [r7, #4]
801bcea: 2200 movs r2, #0
801bcec: 60da str r2, [r3, #12]
801bcee: 4b37 ldr r3, [pc, #220] @ (801bdcc <tcp_close_shutdown+0x1b4>)
801bcf0: 2201 movs r2, #1
801bcf2: 701a strb r2, [r3, #0]
/* Deallocate the pcb since we already sent a RST for it */
if (tcp_input_pcb == pcb) {
801bcf4: 4b36 ldr r3, [pc, #216] @ (801bdd0 <tcp_close_shutdown+0x1b8>)
801bcf6: 681b ldr r3, [r3, #0]
801bcf8: 687a ldr r2, [r7, #4]
801bcfa: 429a cmp r2, r3
801bcfc: d102 bne.n 801bd04 <tcp_close_shutdown+0xec>
/* prevent using a deallocated pcb: free it from tcp_input later */
tcp_trigger_input_pcb_close();
801bcfe: f003 ffff bl 801fd00 <tcp_trigger_input_pcb_close>
801bd02: e002 b.n 801bd0a <tcp_close_shutdown+0xf2>
} else {
tcp_free(pcb);
801bd04: 6878 ldr r0, [r7, #4]
801bd06: f7ff fed5 bl 801bab4 <tcp_free>
}
return ERR_OK;
801bd0a: 2300 movs r3, #0
801bd0c: e050 b.n 801bdb0 <tcp_close_shutdown+0x198>
}
}
/* - states which free the pcb are handled here,
- states which send FIN and change state are handled in tcp_close_shutdown_fin() */
switch (pcb->state) {
801bd0e: 687b ldr r3, [r7, #4]
801bd10: 7d1b ldrb r3, [r3, #20]
801bd12: 2b02 cmp r3, #2
801bd14: d03b beq.n 801bd8e <tcp_close_shutdown+0x176>
801bd16: 2b02 cmp r3, #2
801bd18: dc44 bgt.n 801bda4 <tcp_close_shutdown+0x18c>
801bd1a: 2b00 cmp r3, #0
801bd1c: d002 beq.n 801bd24 <tcp_close_shutdown+0x10c>
801bd1e: 2b01 cmp r3, #1
801bd20: d02a beq.n 801bd78 <tcp_close_shutdown+0x160>
801bd22: e03f b.n 801bda4 <tcp_close_shutdown+0x18c>
* and the user needs some way to free it should the need arise.
* Calling tcp_close() with a pcb that has already been closed, (i.e. twice)
* or for a pcb that has been used and then entered the CLOSED state
* is erroneous, but this should never happen as the pcb has in those cases
* been freed, and so any remaining handles are bogus. */
if (pcb->local_port != 0) {
801bd24: 687b ldr r3, [r7, #4]
801bd26: 8adb ldrh r3, [r3, #22]
801bd28: 2b00 cmp r3, #0
801bd2a: d021 beq.n 801bd70 <tcp_close_shutdown+0x158>
TCP_RMV(&tcp_bound_pcbs, pcb);
801bd2c: 4b29 ldr r3, [pc, #164] @ (801bdd4 <tcp_close_shutdown+0x1bc>)
801bd2e: 681b ldr r3, [r3, #0]
801bd30: 687a ldr r2, [r7, #4]
801bd32: 429a cmp r2, r3
801bd34: d105 bne.n 801bd42 <tcp_close_shutdown+0x12a>
801bd36: 4b27 ldr r3, [pc, #156] @ (801bdd4 <tcp_close_shutdown+0x1bc>)
801bd38: 681b ldr r3, [r3, #0]
801bd3a: 68db ldr r3, [r3, #12]
801bd3c: 4a25 ldr r2, [pc, #148] @ (801bdd4 <tcp_close_shutdown+0x1bc>)
801bd3e: 6013 str r3, [r2, #0]
801bd40: e013 b.n 801bd6a <tcp_close_shutdown+0x152>
801bd42: 4b24 ldr r3, [pc, #144] @ (801bdd4 <tcp_close_shutdown+0x1bc>)
801bd44: 681b ldr r3, [r3, #0]
801bd46: 60bb str r3, [r7, #8]
801bd48: e00c b.n 801bd64 <tcp_close_shutdown+0x14c>
801bd4a: 68bb ldr r3, [r7, #8]
801bd4c: 68db ldr r3, [r3, #12]
801bd4e: 687a ldr r2, [r7, #4]
801bd50: 429a cmp r2, r3
801bd52: d104 bne.n 801bd5e <tcp_close_shutdown+0x146>
801bd54: 687b ldr r3, [r7, #4]
801bd56: 68da ldr r2, [r3, #12]
801bd58: 68bb ldr r3, [r7, #8]
801bd5a: 60da str r2, [r3, #12]
801bd5c: e005 b.n 801bd6a <tcp_close_shutdown+0x152>
801bd5e: 68bb ldr r3, [r7, #8]
801bd60: 68db ldr r3, [r3, #12]
801bd62: 60bb str r3, [r7, #8]
801bd64: 68bb ldr r3, [r7, #8]
801bd66: 2b00 cmp r3, #0
801bd68: d1ef bne.n 801bd4a <tcp_close_shutdown+0x132>
801bd6a: 687b ldr r3, [r7, #4]
801bd6c: 2200 movs r2, #0
801bd6e: 60da str r2, [r3, #12]
}
tcp_free(pcb);
801bd70: 6878 ldr r0, [r7, #4]
801bd72: f7ff fe9f bl 801bab4 <tcp_free>
break;
801bd76: e01a b.n 801bdae <tcp_close_shutdown+0x196>
case LISTEN:
tcp_listen_closed(pcb);
801bd78: 6878 ldr r0, [r7, #4]
801bd7a: f7ff ff13 bl 801bba4 <tcp_listen_closed>
tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb);
801bd7e: 6879 ldr r1, [r7, #4]
801bd80: 4815 ldr r0, [pc, #84] @ (801bdd8 <tcp_close_shutdown+0x1c0>)
801bd82: f001 fb49 bl 801d418 <tcp_pcb_remove>
tcp_free_listen(pcb);
801bd86: 6878 ldr r0, [r7, #4]
801bd88: f7ff feb0 bl 801baec <tcp_free_listen>
break;
801bd8c: e00f b.n 801bdae <tcp_close_shutdown+0x196>
case SYN_SENT:
TCP_PCB_REMOVE_ACTIVE(pcb);
801bd8e: 6879 ldr r1, [r7, #4]
801bd90: 480d ldr r0, [pc, #52] @ (801bdc8 <tcp_close_shutdown+0x1b0>)
801bd92: f001 fb41 bl 801d418 <tcp_pcb_remove>
801bd96: 4b0d ldr r3, [pc, #52] @ (801bdcc <tcp_close_shutdown+0x1b4>)
801bd98: 2201 movs r2, #1
801bd9a: 701a strb r2, [r3, #0]
tcp_free(pcb);
801bd9c: 6878 ldr r0, [r7, #4]
801bd9e: f7ff fe89 bl 801bab4 <tcp_free>
MIB2_STATS_INC(mib2.tcpattemptfails);
break;
801bda2: e004 b.n 801bdae <tcp_close_shutdown+0x196>
default:
return tcp_close_shutdown_fin(pcb);
801bda4: 6878 ldr r0, [r7, #4]
801bda6: f000 f819 bl 801bddc <tcp_close_shutdown_fin>
801bdaa: 4603 mov r3, r0
801bdac: e000 b.n 801bdb0 <tcp_close_shutdown+0x198>
}
return ERR_OK;
801bdae: 2300 movs r3, #0
}
801bdb0: 4618 mov r0, r3
801bdb2: 3710 adds r7, #16
801bdb4: 46bd mov sp, r7
801bdb6: bdb0 pop {r4, r5, r7, pc}
801bdb8: 0802f7f0 .word 0x0802f7f0
801bdbc: 0802f8c4 .word 0x0802f8c4
801bdc0: 0802f834 .word 0x0802f834
801bdc4: 0802f8e4 .word 0x0802f8e4
801bdc8: 2402afb4 .word 0x2402afb4
801bdcc: 2402afbc .word 0x2402afbc
801bdd0: 2402aff8 .word 0x2402aff8
801bdd4: 2402afac .word 0x2402afac
801bdd8: 2402afb0 .word 0x2402afb0
0801bddc <tcp_close_shutdown_fin>:
static err_t
tcp_close_shutdown_fin(struct tcp_pcb *pcb)
{
801bddc: b580 push {r7, lr}
801bdde: b084 sub sp, #16
801bde0: af00 add r7, sp, #0
801bde2: 6078 str r0, [r7, #4]
err_t err;
LWIP_ASSERT("pcb != NULL", pcb != NULL);
801bde4: 687b ldr r3, [r7, #4]
801bde6: 2b00 cmp r3, #0
801bde8: d106 bne.n 801bdf8 <tcp_close_shutdown_fin+0x1c>
801bdea: 4b2e ldr r3, [pc, #184] @ (801bea4 <tcp_close_shutdown_fin+0xc8>)
801bdec: f44f 72ce mov.w r2, #412 @ 0x19c
801bdf0: 492d ldr r1, [pc, #180] @ (801bea8 <tcp_close_shutdown_fin+0xcc>)
801bdf2: 482e ldr r0, [pc, #184] @ (801beac <tcp_close_shutdown_fin+0xd0>)
801bdf4: f00e fe1a bl 802aa2c <iprintf>
switch (pcb->state) {
801bdf8: 687b ldr r3, [r7, #4]
801bdfa: 7d1b ldrb r3, [r3, #20]
801bdfc: 2b07 cmp r3, #7
801bdfe: d020 beq.n 801be42 <tcp_close_shutdown_fin+0x66>
801be00: 2b07 cmp r3, #7
801be02: dc2b bgt.n 801be5c <tcp_close_shutdown_fin+0x80>
801be04: 2b03 cmp r3, #3
801be06: d002 beq.n 801be0e <tcp_close_shutdown_fin+0x32>
801be08: 2b04 cmp r3, #4
801be0a: d00d beq.n 801be28 <tcp_close_shutdown_fin+0x4c>
801be0c: e026 b.n 801be5c <tcp_close_shutdown_fin+0x80>
case SYN_RCVD:
err = tcp_send_fin(pcb);
801be0e: 6878 ldr r0, [r7, #4]
801be10: f004 fe42 bl 8020a98 <tcp_send_fin>
801be14: 4603 mov r3, r0
801be16: 73fb strb r3, [r7, #15]
if (err == ERR_OK) {
801be18: f997 300f ldrsb.w r3, [r7, #15]
801be1c: 2b00 cmp r3, #0
801be1e: d11f bne.n 801be60 <tcp_close_shutdown_fin+0x84>
tcp_backlog_accepted(pcb);
MIB2_STATS_INC(mib2.tcpattemptfails);
pcb->state = FIN_WAIT_1;
801be20: 687b ldr r3, [r7, #4]
801be22: 2205 movs r2, #5
801be24: 751a strb r2, [r3, #20]
}
break;
801be26: e01b b.n 801be60 <tcp_close_shutdown_fin+0x84>
case ESTABLISHED:
err = tcp_send_fin(pcb);
801be28: 6878 ldr r0, [r7, #4]
801be2a: f004 fe35 bl 8020a98 <tcp_send_fin>
801be2e: 4603 mov r3, r0
801be30: 73fb strb r3, [r7, #15]
if (err == ERR_OK) {
801be32: f997 300f ldrsb.w r3, [r7, #15]
801be36: 2b00 cmp r3, #0
801be38: d114 bne.n 801be64 <tcp_close_shutdown_fin+0x88>
MIB2_STATS_INC(mib2.tcpestabresets);
pcb->state = FIN_WAIT_1;
801be3a: 687b ldr r3, [r7, #4]
801be3c: 2205 movs r2, #5
801be3e: 751a strb r2, [r3, #20]
}
break;
801be40: e010 b.n 801be64 <tcp_close_shutdown_fin+0x88>
case CLOSE_WAIT:
err = tcp_send_fin(pcb);
801be42: 6878 ldr r0, [r7, #4]
801be44: f004 fe28 bl 8020a98 <tcp_send_fin>
801be48: 4603 mov r3, r0
801be4a: 73fb strb r3, [r7, #15]
if (err == ERR_OK) {
801be4c: f997 300f ldrsb.w r3, [r7, #15]
801be50: 2b00 cmp r3, #0
801be52: d109 bne.n 801be68 <tcp_close_shutdown_fin+0x8c>
MIB2_STATS_INC(mib2.tcpestabresets);
pcb->state = LAST_ACK;
801be54: 687b ldr r3, [r7, #4]
801be56: 2209 movs r2, #9
801be58: 751a strb r2, [r3, #20]
}
break;
801be5a: e005 b.n 801be68 <tcp_close_shutdown_fin+0x8c>
default:
/* Has already been closed, do nothing. */
return ERR_OK;
801be5c: 2300 movs r3, #0
801be5e: e01c b.n 801be9a <tcp_close_shutdown_fin+0xbe>
break;
801be60: bf00 nop
801be62: e002 b.n 801be6a <tcp_close_shutdown_fin+0x8e>
break;
801be64: bf00 nop
801be66: e000 b.n 801be6a <tcp_close_shutdown_fin+0x8e>
break;
801be68: bf00 nop
}
if (err == ERR_OK) {
801be6a: f997 300f ldrsb.w r3, [r7, #15]
801be6e: 2b00 cmp r3, #0
801be70: d103 bne.n 801be7a <tcp_close_shutdown_fin+0x9e>
/* To ensure all data has been sent when tcp_close returns, we have
to make sure tcp_output doesn't fail.
Since we don't really have to ensure all data has been sent when tcp_close
returns (unsent data is sent from tcp timer functions, also), we don't care
for the return value of tcp_output for now. */
tcp_output(pcb);
801be72: 6878 ldr r0, [r7, #4]
801be74: f004 ff4e bl 8020d14 <tcp_output>
801be78: e00d b.n 801be96 <tcp_close_shutdown_fin+0xba>
} else if (err == ERR_MEM) {
801be7a: f997 300f ldrsb.w r3, [r7, #15]
801be7e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
801be82: d108 bne.n 801be96 <tcp_close_shutdown_fin+0xba>
/* Mark this pcb for closing. Closing is retried from tcp_tmr. */
tcp_set_flags(pcb, TF_CLOSEPEND);
801be84: 687b ldr r3, [r7, #4]
801be86: 8b5b ldrh r3, [r3, #26]
801be88: f043 0308 orr.w r3, r3, #8
801be8c: b29a uxth r2, r3
801be8e: 687b ldr r3, [r7, #4]
801be90: 835a strh r2, [r3, #26]
/* We have to return ERR_OK from here to indicate to the callers that this
pcb should not be used any more as it will be freed soon via tcp_tmr.
This is OK here since sending FIN does not guarantee a time frime for
actually freeing the pcb, either (it is left in closure states for
remote ACK or timeout) */
return ERR_OK;
801be92: 2300 movs r3, #0
801be94: e001 b.n 801be9a <tcp_close_shutdown_fin+0xbe>
}
return err;
801be96: f997 300f ldrsb.w r3, [r7, #15]
}
801be9a: 4618 mov r0, r3
801be9c: 3710 adds r7, #16
801be9e: 46bd mov sp, r7
801bea0: bd80 pop {r7, pc}
801bea2: bf00 nop
801bea4: 0802f7f0 .word 0x0802f7f0
801bea8: 0802f8a0 .word 0x0802f8a0
801beac: 0802f834 .word 0x0802f834
0801beb0 <tcp_close>:
* @return ERR_OK if connection has been closed
* another err_t if closing failed and pcb is not freed
*/
err_t
tcp_close(struct tcp_pcb *pcb)
{
801beb0: b580 push {r7, lr}
801beb2: b082 sub sp, #8
801beb4: af00 add r7, sp, #0
801beb6: 6078 str r0, [r7, #4]
LWIP_ASSERT_CORE_LOCKED();
801beb8: f7f5 f98c bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("tcp_close: invalid pcb", pcb != NULL, return ERR_ARG);
801bebc: 687b ldr r3, [r7, #4]
801bebe: 2b00 cmp r3, #0
801bec0: d109 bne.n 801bed6 <tcp_close+0x26>
801bec2: 4b0f ldr r3, [pc, #60] @ (801bf00 <tcp_close+0x50>)
801bec4: f44f 72f4 mov.w r2, #488 @ 0x1e8
801bec8: 490e ldr r1, [pc, #56] @ (801bf04 <tcp_close+0x54>)
801beca: 480f ldr r0, [pc, #60] @ (801bf08 <tcp_close+0x58>)
801becc: f00e fdae bl 802aa2c <iprintf>
801bed0: f06f 030f mvn.w r3, #15
801bed4: e00f b.n 801bef6 <tcp_close+0x46>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in "));
tcp_debug_print_state(pcb->state);
if (pcb->state != LISTEN) {
801bed6: 687b ldr r3, [r7, #4]
801bed8: 7d1b ldrb r3, [r3, #20]
801beda: 2b01 cmp r3, #1
801bedc: d006 beq.n 801beec <tcp_close+0x3c>
/* Set a flag not to receive any more data... */
tcp_set_flags(pcb, TF_RXCLOSED);
801bede: 687b ldr r3, [r7, #4]
801bee0: 8b5b ldrh r3, [r3, #26]
801bee2: f043 0310 orr.w r3, r3, #16
801bee6: b29a uxth r2, r3
801bee8: 687b ldr r3, [r7, #4]
801beea: 835a strh r2, [r3, #26]
}
/* ... and close */
return tcp_close_shutdown(pcb, 1);
801beec: 2101 movs r1, #1
801beee: 6878 ldr r0, [r7, #4]
801bef0: f7ff fe92 bl 801bc18 <tcp_close_shutdown>
801bef4: 4603 mov r3, r0
}
801bef6: 4618 mov r0, r3
801bef8: 3708 adds r7, #8
801befa: 46bd mov sp, r7
801befc: bd80 pop {r7, pc}
801befe: bf00 nop
801bf00: 0802f7f0 .word 0x0802f7f0
801bf04: 0802f900 .word 0x0802f900
801bf08: 0802f834 .word 0x0802f834
0801bf0c <tcp_shutdown>:
* @return ERR_OK if shutdown succeeded (or the PCB has already been shut down)
* another err_t on error.
*/
err_t
tcp_shutdown(struct tcp_pcb *pcb, int shut_rx, int shut_tx)
{
801bf0c: b580 push {r7, lr}
801bf0e: b084 sub sp, #16
801bf10: af00 add r7, sp, #0
801bf12: 60f8 str r0, [r7, #12]
801bf14: 60b9 str r1, [r7, #8]
801bf16: 607a str r2, [r7, #4]
LWIP_ASSERT_CORE_LOCKED();
801bf18: f7f5 f95c bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("tcp_shutdown: invalid pcb", pcb != NULL, return ERR_ARG);
801bf1c: 68fb ldr r3, [r7, #12]
801bf1e: 2b00 cmp r3, #0
801bf20: d109 bne.n 801bf36 <tcp_shutdown+0x2a>
801bf22: 4b26 ldr r3, [pc, #152] @ (801bfbc <tcp_shutdown+0xb0>)
801bf24: f240 2207 movw r2, #519 @ 0x207
801bf28: 4925 ldr r1, [pc, #148] @ (801bfc0 <tcp_shutdown+0xb4>)
801bf2a: 4826 ldr r0, [pc, #152] @ (801bfc4 <tcp_shutdown+0xb8>)
801bf2c: f00e fd7e bl 802aa2c <iprintf>
801bf30: f06f 030f mvn.w r3, #15
801bf34: e03d b.n 801bfb2 <tcp_shutdown+0xa6>
if (pcb->state == LISTEN) {
801bf36: 68fb ldr r3, [r7, #12]
801bf38: 7d1b ldrb r3, [r3, #20]
801bf3a: 2b01 cmp r3, #1
801bf3c: d102 bne.n 801bf44 <tcp_shutdown+0x38>
return ERR_CONN;
801bf3e: f06f 030a mvn.w r3, #10
801bf42: e036 b.n 801bfb2 <tcp_shutdown+0xa6>
}
if (shut_rx) {
801bf44: 68bb ldr r3, [r7, #8]
801bf46: 2b00 cmp r3, #0
801bf48: d01b beq.n 801bf82 <tcp_shutdown+0x76>
/* shut down the receive side: set a flag not to receive any more data... */
tcp_set_flags(pcb, TF_RXCLOSED);
801bf4a: 68fb ldr r3, [r7, #12]
801bf4c: 8b5b ldrh r3, [r3, #26]
801bf4e: f043 0310 orr.w r3, r3, #16
801bf52: b29a uxth r2, r3
801bf54: 68fb ldr r3, [r7, #12]
801bf56: 835a strh r2, [r3, #26]
if (shut_tx) {
801bf58: 687b ldr r3, [r7, #4]
801bf5a: 2b00 cmp r3, #0
801bf5c: d005 beq.n 801bf6a <tcp_shutdown+0x5e>
/* shutting down the tx AND rx side is the same as closing for the raw API */
return tcp_close_shutdown(pcb, 1);
801bf5e: 2101 movs r1, #1
801bf60: 68f8 ldr r0, [r7, #12]
801bf62: f7ff fe59 bl 801bc18 <tcp_close_shutdown>
801bf66: 4603 mov r3, r0
801bf68: e023 b.n 801bfb2 <tcp_shutdown+0xa6>
}
/* ... and free buffered data */
if (pcb->refused_data != NULL) {
801bf6a: 68fb ldr r3, [r7, #12]
801bf6c: 6f9b ldr r3, [r3, #120] @ 0x78
801bf6e: 2b00 cmp r3, #0
801bf70: d007 beq.n 801bf82 <tcp_shutdown+0x76>
pbuf_free(pcb->refused_data);
801bf72: 68fb ldr r3, [r7, #12]
801bf74: 6f9b ldr r3, [r3, #120] @ 0x78
801bf76: 4618 mov r0, r3
801bf78: f7ff fae0 bl 801b53c <pbuf_free>
pcb->refused_data = NULL;
801bf7c: 68fb ldr r3, [r7, #12]
801bf7e: 2200 movs r2, #0
801bf80: 679a str r2, [r3, #120] @ 0x78
}
}
if (shut_tx) {
801bf82: 687b ldr r3, [r7, #4]
801bf84: 2b00 cmp r3, #0
801bf86: d013 beq.n 801bfb0 <tcp_shutdown+0xa4>
/* This can't happen twice since if it succeeds, the pcb's state is changed.
Only close in these states as the others directly deallocate the PCB */
switch (pcb->state) {
801bf88: 68fb ldr r3, [r7, #12]
801bf8a: 7d1b ldrb r3, [r3, #20]
801bf8c: 2b04 cmp r3, #4
801bf8e: dc02 bgt.n 801bf96 <tcp_shutdown+0x8a>
801bf90: 2b03 cmp r3, #3
801bf92: da02 bge.n 801bf9a <tcp_shutdown+0x8e>
801bf94: e009 b.n 801bfaa <tcp_shutdown+0x9e>
801bf96: 2b07 cmp r3, #7
801bf98: d107 bne.n 801bfaa <tcp_shutdown+0x9e>
case SYN_RCVD:
case ESTABLISHED:
case CLOSE_WAIT:
return tcp_close_shutdown(pcb, (u8_t)shut_rx);
801bf9a: 68bb ldr r3, [r7, #8]
801bf9c: b2db uxtb r3, r3
801bf9e: 4619 mov r1, r3
801bfa0: 68f8 ldr r0, [r7, #12]
801bfa2: f7ff fe39 bl 801bc18 <tcp_close_shutdown>
801bfa6: 4603 mov r3, r0
801bfa8: e003 b.n 801bfb2 <tcp_shutdown+0xa6>
default:
/* Not (yet?) connected, cannot shutdown the TX side as that would bring us
into CLOSED state, where the PCB is deallocated. */
return ERR_CONN;
801bfaa: f06f 030a mvn.w r3, #10
801bfae: e000 b.n 801bfb2 <tcp_shutdown+0xa6>
}
}
return ERR_OK;
801bfb0: 2300 movs r3, #0
}
801bfb2: 4618 mov r0, r3
801bfb4: 3710 adds r7, #16
801bfb6: 46bd mov sp, r7
801bfb8: bd80 pop {r7, pc}
801bfba: bf00 nop
801bfbc: 0802f7f0 .word 0x0802f7f0
801bfc0: 0802f918 .word 0x0802f918
801bfc4: 0802f834 .word 0x0802f834
0801bfc8 <tcp_abandon>:
* @param pcb the tcp_pcb to abort
* @param reset boolean to indicate whether a reset should be sent
*/
void
tcp_abandon(struct tcp_pcb *pcb, int reset)
{
801bfc8: b580 push {r7, lr}
801bfca: b08e sub sp, #56 @ 0x38
801bfcc: af04 add r7, sp, #16
801bfce: 6078 str r0, [r7, #4]
801bfd0: 6039 str r1, [r7, #0]
#if LWIP_CALLBACK_API
tcp_err_fn errf;
#endif /* LWIP_CALLBACK_API */
void *errf_arg;
LWIP_ASSERT_CORE_LOCKED();
801bfd2: f7f5 f8ff bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("tcp_abandon: invalid pcb", pcb != NULL, return);
801bfd6: 687b ldr r3, [r7, #4]
801bfd8: 2b00 cmp r3, #0
801bfda: d107 bne.n 801bfec <tcp_abandon+0x24>
801bfdc: 4b52 ldr r3, [pc, #328] @ (801c128 <tcp_abandon+0x160>)
801bfde: f240 223d movw r2, #573 @ 0x23d
801bfe2: 4952 ldr r1, [pc, #328] @ (801c12c <tcp_abandon+0x164>)
801bfe4: 4852 ldr r0, [pc, #328] @ (801c130 <tcp_abandon+0x168>)
801bfe6: f00e fd21 bl 802aa2c <iprintf>
801bfea: e099 b.n 801c120 <tcp_abandon+0x158>
/* pcb->state LISTEN not allowed here */
LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs",
801bfec: 687b ldr r3, [r7, #4]
801bfee: 7d1b ldrb r3, [r3, #20]
801bff0: 2b01 cmp r3, #1
801bff2: d106 bne.n 801c002 <tcp_abandon+0x3a>
801bff4: 4b4c ldr r3, [pc, #304] @ (801c128 <tcp_abandon+0x160>)
801bff6: f44f 7210 mov.w r2, #576 @ 0x240
801bffa: 494e ldr r1, [pc, #312] @ (801c134 <tcp_abandon+0x16c>)
801bffc: 484c ldr r0, [pc, #304] @ (801c130 <tcp_abandon+0x168>)
801bffe: f00e fd15 bl 802aa2c <iprintf>
pcb->state != LISTEN);
/* Figure out on which TCP PCB list we are, and remove us. If we
are in an active state, call the receive function associated with
the PCB with a NULL argument, and send an RST to the remote end. */
if (pcb->state == TIME_WAIT) {
801c002: 687b ldr r3, [r7, #4]
801c004: 7d1b ldrb r3, [r3, #20]
801c006: 2b0a cmp r3, #10
801c008: d107 bne.n 801c01a <tcp_abandon+0x52>
tcp_pcb_remove(&tcp_tw_pcbs, pcb);
801c00a: 6879 ldr r1, [r7, #4]
801c00c: 484a ldr r0, [pc, #296] @ (801c138 <tcp_abandon+0x170>)
801c00e: f001 fa03 bl 801d418 <tcp_pcb_remove>
tcp_free(pcb);
801c012: 6878 ldr r0, [r7, #4]
801c014: f7ff fd4e bl 801bab4 <tcp_free>
801c018: e082 b.n 801c120 <tcp_abandon+0x158>
} else {
int send_rst = 0;
801c01a: 2300 movs r3, #0
801c01c: 627b str r3, [r7, #36] @ 0x24
u16_t local_port = 0;
801c01e: 2300 movs r3, #0
801c020: 847b strh r3, [r7, #34] @ 0x22
enum tcp_state last_state;
seqno = pcb->snd_nxt;
801c022: 687b ldr r3, [r7, #4]
801c024: 6d1b ldr r3, [r3, #80] @ 0x50
801c026: 61bb str r3, [r7, #24]
ackno = pcb->rcv_nxt;
801c028: 687b ldr r3, [r7, #4]
801c02a: 6a5b ldr r3, [r3, #36] @ 0x24
801c02c: 617b str r3, [r7, #20]
#if LWIP_CALLBACK_API
errf = pcb->errf;
801c02e: 687b ldr r3, [r7, #4]
801c030: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
801c034: 613b str r3, [r7, #16]
#endif /* LWIP_CALLBACK_API */
errf_arg = pcb->callback_arg;
801c036: 687b ldr r3, [r7, #4]
801c038: 691b ldr r3, [r3, #16]
801c03a: 60fb str r3, [r7, #12]
if (pcb->state == CLOSED) {
801c03c: 687b ldr r3, [r7, #4]
801c03e: 7d1b ldrb r3, [r3, #20]
801c040: 2b00 cmp r3, #0
801c042: d126 bne.n 801c092 <tcp_abandon+0xca>
if (pcb->local_port != 0) {
801c044: 687b ldr r3, [r7, #4]
801c046: 8adb ldrh r3, [r3, #22]
801c048: 2b00 cmp r3, #0
801c04a: d02e beq.n 801c0aa <tcp_abandon+0xe2>
/* bound, not yet opened */
TCP_RMV(&tcp_bound_pcbs, pcb);
801c04c: 4b3b ldr r3, [pc, #236] @ (801c13c <tcp_abandon+0x174>)
801c04e: 681b ldr r3, [r3, #0]
801c050: 687a ldr r2, [r7, #4]
801c052: 429a cmp r2, r3
801c054: d105 bne.n 801c062 <tcp_abandon+0x9a>
801c056: 4b39 ldr r3, [pc, #228] @ (801c13c <tcp_abandon+0x174>)
801c058: 681b ldr r3, [r3, #0]
801c05a: 68db ldr r3, [r3, #12]
801c05c: 4a37 ldr r2, [pc, #220] @ (801c13c <tcp_abandon+0x174>)
801c05e: 6013 str r3, [r2, #0]
801c060: e013 b.n 801c08a <tcp_abandon+0xc2>
801c062: 4b36 ldr r3, [pc, #216] @ (801c13c <tcp_abandon+0x174>)
801c064: 681b ldr r3, [r3, #0]
801c066: 61fb str r3, [r7, #28]
801c068: e00c b.n 801c084 <tcp_abandon+0xbc>
801c06a: 69fb ldr r3, [r7, #28]
801c06c: 68db ldr r3, [r3, #12]
801c06e: 687a ldr r2, [r7, #4]
801c070: 429a cmp r2, r3
801c072: d104 bne.n 801c07e <tcp_abandon+0xb6>
801c074: 687b ldr r3, [r7, #4]
801c076: 68da ldr r2, [r3, #12]
801c078: 69fb ldr r3, [r7, #28]
801c07a: 60da str r2, [r3, #12]
801c07c: e005 b.n 801c08a <tcp_abandon+0xc2>
801c07e: 69fb ldr r3, [r7, #28]
801c080: 68db ldr r3, [r3, #12]
801c082: 61fb str r3, [r7, #28]
801c084: 69fb ldr r3, [r7, #28]
801c086: 2b00 cmp r3, #0
801c088: d1ef bne.n 801c06a <tcp_abandon+0xa2>
801c08a: 687b ldr r3, [r7, #4]
801c08c: 2200 movs r2, #0
801c08e: 60da str r2, [r3, #12]
801c090: e00b b.n 801c0aa <tcp_abandon+0xe2>
}
} else {
send_rst = reset;
801c092: 683b ldr r3, [r7, #0]
801c094: 627b str r3, [r7, #36] @ 0x24
local_port = pcb->local_port;
801c096: 687b ldr r3, [r7, #4]
801c098: 8adb ldrh r3, [r3, #22]
801c09a: 847b strh r3, [r7, #34] @ 0x22
TCP_PCB_REMOVE_ACTIVE(pcb);
801c09c: 6879 ldr r1, [r7, #4]
801c09e: 4828 ldr r0, [pc, #160] @ (801c140 <tcp_abandon+0x178>)
801c0a0: f001 f9ba bl 801d418 <tcp_pcb_remove>
801c0a4: 4b27 ldr r3, [pc, #156] @ (801c144 <tcp_abandon+0x17c>)
801c0a6: 2201 movs r2, #1
801c0a8: 701a strb r2, [r3, #0]
}
if (pcb->unacked != NULL) {
801c0aa: 687b ldr r3, [r7, #4]
801c0ac: 6f1b ldr r3, [r3, #112] @ 0x70
801c0ae: 2b00 cmp r3, #0
801c0b0: d004 beq.n 801c0bc <tcp_abandon+0xf4>
tcp_segs_free(pcb->unacked);
801c0b2: 687b ldr r3, [r7, #4]
801c0b4: 6f1b ldr r3, [r3, #112] @ 0x70
801c0b6: 4618 mov r0, r3
801c0b8: f000 fe84 bl 801cdc4 <tcp_segs_free>
}
if (pcb->unsent != NULL) {
801c0bc: 687b ldr r3, [r7, #4]
801c0be: 6edb ldr r3, [r3, #108] @ 0x6c
801c0c0: 2b00 cmp r3, #0
801c0c2: d004 beq.n 801c0ce <tcp_abandon+0x106>
tcp_segs_free(pcb->unsent);
801c0c4: 687b ldr r3, [r7, #4]
801c0c6: 6edb ldr r3, [r3, #108] @ 0x6c
801c0c8: 4618 mov r0, r3
801c0ca: f000 fe7b bl 801cdc4 <tcp_segs_free>
}
#if TCP_QUEUE_OOSEQ
if (pcb->ooseq != NULL) {
801c0ce: 687b ldr r3, [r7, #4]
801c0d0: 6f5b ldr r3, [r3, #116] @ 0x74
801c0d2: 2b00 cmp r3, #0
801c0d4: d004 beq.n 801c0e0 <tcp_abandon+0x118>
tcp_segs_free(pcb->ooseq);
801c0d6: 687b ldr r3, [r7, #4]
801c0d8: 6f5b ldr r3, [r3, #116] @ 0x74
801c0da: 4618 mov r0, r3
801c0dc: f000 fe72 bl 801cdc4 <tcp_segs_free>
}
#endif /* TCP_QUEUE_OOSEQ */
tcp_backlog_accepted(pcb);
if (send_rst) {
801c0e0: 6a7b ldr r3, [r7, #36] @ 0x24
801c0e2: 2b00 cmp r3, #0
801c0e4: d00e beq.n 801c104 <tcp_abandon+0x13c>
LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n"));
tcp_rst(pcb, seqno, ackno, &pcb->local_ip, &pcb->remote_ip, local_port, pcb->remote_port);
801c0e6: 6879 ldr r1, [r7, #4]
801c0e8: 687b ldr r3, [r7, #4]
801c0ea: 3304 adds r3, #4
801c0ec: 687a ldr r2, [r7, #4]
801c0ee: 8b12 ldrh r2, [r2, #24]
801c0f0: 9202 str r2, [sp, #8]
801c0f2: 8c7a ldrh r2, [r7, #34] @ 0x22
801c0f4: 9201 str r2, [sp, #4]
801c0f6: 9300 str r3, [sp, #0]
801c0f8: 460b mov r3, r1
801c0fa: 697a ldr r2, [r7, #20]
801c0fc: 69b9 ldr r1, [r7, #24]
801c0fe: 6878 ldr r0, [r7, #4]
801c100: f005 fbca bl 8021898 <tcp_rst>
}
last_state = pcb->state;
801c104: 687b ldr r3, [r7, #4]
801c106: 7d1b ldrb r3, [r3, #20]
801c108: 72fb strb r3, [r7, #11]
tcp_free(pcb);
801c10a: 6878 ldr r0, [r7, #4]
801c10c: f7ff fcd2 bl 801bab4 <tcp_free>
TCP_EVENT_ERR(last_state, errf, errf_arg, ERR_ABRT);
801c110: 693b ldr r3, [r7, #16]
801c112: 2b00 cmp r3, #0
801c114: d004 beq.n 801c120 <tcp_abandon+0x158>
801c116: 693b ldr r3, [r7, #16]
801c118: f06f 010c mvn.w r1, #12
801c11c: 68f8 ldr r0, [r7, #12]
801c11e: 4798 blx r3
}
}
801c120: 3728 adds r7, #40 @ 0x28
801c122: 46bd mov sp, r7
801c124: bd80 pop {r7, pc}
801c126: bf00 nop
801c128: 0802f7f0 .word 0x0802f7f0
801c12c: 0802f934 .word 0x0802f934
801c130: 0802f834 .word 0x0802f834
801c134: 0802f950 .word 0x0802f950
801c138: 2402afb8 .word 0x2402afb8
801c13c: 2402afac .word 0x2402afac
801c140: 2402afb4 .word 0x2402afb4
801c144: 2402afbc .word 0x2402afbc
0801c148 <tcp_abort>:
*
* @param pcb the tcp pcb to abort
*/
void
tcp_abort(struct tcp_pcb *pcb)
{
801c148: b580 push {r7, lr}
801c14a: b082 sub sp, #8
801c14c: af00 add r7, sp, #0
801c14e: 6078 str r0, [r7, #4]
tcp_abandon(pcb, 1);
801c150: 2101 movs r1, #1
801c152: 6878 ldr r0, [r7, #4]
801c154: f7ff ff38 bl 801bfc8 <tcp_abandon>
}
801c158: bf00 nop
801c15a: 3708 adds r7, #8
801c15c: 46bd mov sp, r7
801c15e: bd80 pop {r7, pc}
0801c160 <tcp_update_rcv_ann_wnd>:
* Returns how much extra window would be advertised if we sent an
* update now.
*/
u32_t
tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb)
{
801c160: b580 push {r7, lr}
801c162: b084 sub sp, #16
801c164: af00 add r7, sp, #0
801c166: 6078 str r0, [r7, #4]
u32_t new_right_edge;
LWIP_ASSERT("tcp_update_rcv_ann_wnd: invalid pcb", pcb != NULL);
801c168: 687b ldr r3, [r7, #4]
801c16a: 2b00 cmp r3, #0
801c16c: d106 bne.n 801c17c <tcp_update_rcv_ann_wnd+0x1c>
801c16e: 4b25 ldr r3, [pc, #148] @ (801c204 <tcp_update_rcv_ann_wnd+0xa4>)
801c170: f240 32a6 movw r2, #934 @ 0x3a6
801c174: 4924 ldr r1, [pc, #144] @ (801c208 <tcp_update_rcv_ann_wnd+0xa8>)
801c176: 4825 ldr r0, [pc, #148] @ (801c20c <tcp_update_rcv_ann_wnd+0xac>)
801c178: f00e fc58 bl 802aa2c <iprintf>
new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd;
801c17c: 687b ldr r3, [r7, #4]
801c17e: 6a5b ldr r3, [r3, #36] @ 0x24
801c180: 687a ldr r2, [r7, #4]
801c182: 8d12 ldrh r2, [r2, #40] @ 0x28
801c184: 4413 add r3, r2
801c186: 60fb str r3, [r7, #12]
if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) {
801c188: 687b ldr r3, [r7, #4]
801c18a: 6adb ldr r3, [r3, #44] @ 0x2c
801c18c: 687a ldr r2, [r7, #4]
801c18e: 8e52 ldrh r2, [r2, #50] @ 0x32
801c190: f640 3168 movw r1, #2920 @ 0xb68
801c194: 428a cmp r2, r1
801c196: bf28 it cs
801c198: 460a movcs r2, r1
801c19a: b292 uxth r2, r2
801c19c: 4413 add r3, r2
801c19e: 68fa ldr r2, [r7, #12]
801c1a0: 1ad3 subs r3, r2, r3
801c1a2: 2b00 cmp r3, #0
801c1a4: db08 blt.n 801c1b8 <tcp_update_rcv_ann_wnd+0x58>
/* we can advertise more window */
pcb->rcv_ann_wnd = pcb->rcv_wnd;
801c1a6: 687b ldr r3, [r7, #4]
801c1a8: 8d1a ldrh r2, [r3, #40] @ 0x28
801c1aa: 687b ldr r3, [r7, #4]
801c1ac: 855a strh r2, [r3, #42] @ 0x2a
return new_right_edge - pcb->rcv_ann_right_edge;
801c1ae: 687b ldr r3, [r7, #4]
801c1b0: 6adb ldr r3, [r3, #44] @ 0x2c
801c1b2: 68fa ldr r2, [r7, #12]
801c1b4: 1ad3 subs r3, r2, r3
801c1b6: e020 b.n 801c1fa <tcp_update_rcv_ann_wnd+0x9a>
} else {
if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) {
801c1b8: 687b ldr r3, [r7, #4]
801c1ba: 6a5a ldr r2, [r3, #36] @ 0x24
801c1bc: 687b ldr r3, [r7, #4]
801c1be: 6adb ldr r3, [r3, #44] @ 0x2c
801c1c0: 1ad3 subs r3, r2, r3
801c1c2: 2b00 cmp r3, #0
801c1c4: dd03 ble.n 801c1ce <tcp_update_rcv_ann_wnd+0x6e>
/* Can happen due to other end sending out of advertised window,
* but within actual available (but not yet advertised) window */
pcb->rcv_ann_wnd = 0;
801c1c6: 687b ldr r3, [r7, #4]
801c1c8: 2200 movs r2, #0
801c1ca: 855a strh r2, [r3, #42] @ 0x2a
801c1cc: e014 b.n 801c1f8 <tcp_update_rcv_ann_wnd+0x98>
} else {
/* keep the right edge of window constant */
u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt;
801c1ce: 687b ldr r3, [r7, #4]
801c1d0: 6ada ldr r2, [r3, #44] @ 0x2c
801c1d2: 687b ldr r3, [r7, #4]
801c1d4: 6a5b ldr r3, [r3, #36] @ 0x24
801c1d6: 1ad3 subs r3, r2, r3
801c1d8: 60bb str r3, [r7, #8]
#if !LWIP_WND_SCALE
LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff);
801c1da: 68bb ldr r3, [r7, #8]
801c1dc: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
801c1e0: d306 bcc.n 801c1f0 <tcp_update_rcv_ann_wnd+0x90>
801c1e2: 4b08 ldr r3, [pc, #32] @ (801c204 <tcp_update_rcv_ann_wnd+0xa4>)
801c1e4: f240 32b6 movw r2, #950 @ 0x3b6
801c1e8: 4909 ldr r1, [pc, #36] @ (801c210 <tcp_update_rcv_ann_wnd+0xb0>)
801c1ea: 4808 ldr r0, [pc, #32] @ (801c20c <tcp_update_rcv_ann_wnd+0xac>)
801c1ec: f00e fc1e bl 802aa2c <iprintf>
#endif
pcb->rcv_ann_wnd = (tcpwnd_size_t)new_rcv_ann_wnd;
801c1f0: 68bb ldr r3, [r7, #8]
801c1f2: b29a uxth r2, r3
801c1f4: 687b ldr r3, [r7, #4]
801c1f6: 855a strh r2, [r3, #42] @ 0x2a
}
return 0;
801c1f8: 2300 movs r3, #0
}
}
801c1fa: 4618 mov r0, r3
801c1fc: 3710 adds r7, #16
801c1fe: 46bd mov sp, r7
801c200: bd80 pop {r7, pc}
801c202: bf00 nop
801c204: 0802f7f0 .word 0x0802f7f0
801c208: 0802fa4c .word 0x0802fa4c
801c20c: 0802f834 .word 0x0802f834
801c210: 0802fa70 .word 0x0802fa70
0801c214 <tcp_recved>:
* @param pcb the tcp_pcb for which data is read
* @param len the amount of bytes that have been read by the application
*/
void
tcp_recved(struct tcp_pcb *pcb, u16_t len)
{
801c214: b580 push {r7, lr}
801c216: b084 sub sp, #16
801c218: af00 add r7, sp, #0
801c21a: 6078 str r0, [r7, #4]
801c21c: 460b mov r3, r1
801c21e: 807b strh r3, [r7, #2]
u32_t wnd_inflation;
tcpwnd_size_t rcv_wnd;
LWIP_ASSERT_CORE_LOCKED();
801c220: f7f4 ffd8 bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("tcp_recved: invalid pcb", pcb != NULL, return);
801c224: 687b ldr r3, [r7, #4]
801c226: 2b00 cmp r3, #0
801c228: d107 bne.n 801c23a <tcp_recved+0x26>
801c22a: 4b20 ldr r3, [pc, #128] @ (801c2ac <tcp_recved+0x98>)
801c22c: f240 32cf movw r2, #975 @ 0x3cf
801c230: 491f ldr r1, [pc, #124] @ (801c2b0 <tcp_recved+0x9c>)
801c232: 4820 ldr r0, [pc, #128] @ (801c2b4 <tcp_recved+0xa0>)
801c234: f00e fbfa bl 802aa2c <iprintf>
801c238: e034 b.n 801c2a4 <tcp_recved+0x90>
/* pcb->state LISTEN not allowed here */
LWIP_ASSERT("don't call tcp_recved for listen-pcbs",
801c23a: 687b ldr r3, [r7, #4]
801c23c: 7d1b ldrb r3, [r3, #20]
801c23e: 2b01 cmp r3, #1
801c240: d106 bne.n 801c250 <tcp_recved+0x3c>
801c242: 4b1a ldr r3, [pc, #104] @ (801c2ac <tcp_recved+0x98>)
801c244: f240 32d2 movw r2, #978 @ 0x3d2
801c248: 491b ldr r1, [pc, #108] @ (801c2b8 <tcp_recved+0xa4>)
801c24a: 481a ldr r0, [pc, #104] @ (801c2b4 <tcp_recved+0xa0>)
801c24c: f00e fbee bl 802aa2c <iprintf>
pcb->state != LISTEN);
rcv_wnd = (tcpwnd_size_t)(pcb->rcv_wnd + len);
801c250: 687b ldr r3, [r7, #4]
801c252: 8d1a ldrh r2, [r3, #40] @ 0x28
801c254: 887b ldrh r3, [r7, #2]
801c256: 4413 add r3, r2
801c258: 81fb strh r3, [r7, #14]
if ((rcv_wnd > TCP_WND_MAX(pcb)) || (rcv_wnd < pcb->rcv_wnd)) {
801c25a: 89fb ldrh r3, [r7, #14]
801c25c: f241 62d0 movw r2, #5840 @ 0x16d0
801c260: 4293 cmp r3, r2
801c262: d804 bhi.n 801c26e <tcp_recved+0x5a>
801c264: 687b ldr r3, [r7, #4]
801c266: 8d1b ldrh r3, [r3, #40] @ 0x28
801c268: 89fa ldrh r2, [r7, #14]
801c26a: 429a cmp r2, r3
801c26c: d204 bcs.n 801c278 <tcp_recved+0x64>
/* window got too big or tcpwnd_size_t overflow */
LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: window got too big or tcpwnd_size_t overflow\n"));
pcb->rcv_wnd = TCP_WND_MAX(pcb);
801c26e: 687b ldr r3, [r7, #4]
801c270: f241 62d0 movw r2, #5840 @ 0x16d0
801c274: 851a strh r2, [r3, #40] @ 0x28
801c276: e002 b.n 801c27e <tcp_recved+0x6a>
} else {
pcb->rcv_wnd = rcv_wnd;
801c278: 687b ldr r3, [r7, #4]
801c27a: 89fa ldrh r2, [r7, #14]
801c27c: 851a strh r2, [r3, #40] @ 0x28
}
wnd_inflation = tcp_update_rcv_ann_wnd(pcb);
801c27e: 6878 ldr r0, [r7, #4]
801c280: f7ff ff6e bl 801c160 <tcp_update_rcv_ann_wnd>
801c284: 60b8 str r0, [r7, #8]
/* If the change in the right edge of window is significant (default
* watermark is TCP_WND/4), then send an explicit update now.
* Otherwise wait for a packet to be sent in the normal course of
* events (or more window to be available later) */
if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) {
801c286: 68bb ldr r3, [r7, #8]
801c288: f240 52b3 movw r2, #1459 @ 0x5b3
801c28c: 4293 cmp r3, r2
801c28e: d909 bls.n 801c2a4 <tcp_recved+0x90>
tcp_ack_now(pcb);
801c290: 687b ldr r3, [r7, #4]
801c292: 8b5b ldrh r3, [r3, #26]
801c294: f043 0302 orr.w r3, r3, #2
801c298: b29a uxth r2, r3
801c29a: 687b ldr r3, [r7, #4]
801c29c: 835a strh r2, [r3, #26]
tcp_output(pcb);
801c29e: 6878 ldr r0, [r7, #4]
801c2a0: f004 fd38 bl 8020d14 <tcp_output>
}
LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: received %"U16_F" bytes, wnd %"TCPWNDSIZE_F" (%"TCPWNDSIZE_F").\n",
len, pcb->rcv_wnd, (u16_t)(TCP_WND_MAX(pcb) - pcb->rcv_wnd)));
}
801c2a4: 3710 adds r7, #16
801c2a6: 46bd mov sp, r7
801c2a8: bd80 pop {r7, pc}
801c2aa: bf00 nop
801c2ac: 0802f7f0 .word 0x0802f7f0
801c2b0: 0802fa8c .word 0x0802fa8c
801c2b4: 0802f834 .word 0x0802f834
801c2b8: 0802faa4 .word 0x0802faa4
0801c2bc <tcp_new_port>:
*
* @return a new (free) local TCP port number
*/
static u16_t
tcp_new_port(void)
{
801c2bc: b480 push {r7}
801c2be: b083 sub sp, #12
801c2c0: af00 add r7, sp, #0
u8_t i;
u16_t n = 0;
801c2c2: 2300 movs r3, #0
801c2c4: 80bb strh r3, [r7, #4]
struct tcp_pcb *pcb;
again:
tcp_port++;
801c2c6: 4b1e ldr r3, [pc, #120] @ (801c340 <tcp_new_port+0x84>)
801c2c8: 881b ldrh r3, [r3, #0]
801c2ca: 3301 adds r3, #1
801c2cc: b29a uxth r2, r3
801c2ce: 4b1c ldr r3, [pc, #112] @ (801c340 <tcp_new_port+0x84>)
801c2d0: 801a strh r2, [r3, #0]
if (tcp_port == TCP_LOCAL_PORT_RANGE_END) {
801c2d2: 4b1b ldr r3, [pc, #108] @ (801c340 <tcp_new_port+0x84>)
801c2d4: 881b ldrh r3, [r3, #0]
801c2d6: f64f 72ff movw r2, #65535 @ 0xffff
801c2da: 4293 cmp r3, r2
801c2dc: d103 bne.n 801c2e6 <tcp_new_port+0x2a>
tcp_port = TCP_LOCAL_PORT_RANGE_START;
801c2de: 4b18 ldr r3, [pc, #96] @ (801c340 <tcp_new_port+0x84>)
801c2e0: f44f 4240 mov.w r2, #49152 @ 0xc000
801c2e4: 801a strh r2, [r3, #0]
}
/* Check all PCB lists. */
for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
801c2e6: 2300 movs r3, #0
801c2e8: 71fb strb r3, [r7, #7]
801c2ea: e01e b.n 801c32a <tcp_new_port+0x6e>
for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
801c2ec: 79fb ldrb r3, [r7, #7]
801c2ee: 4a15 ldr r2, [pc, #84] @ (801c344 <tcp_new_port+0x88>)
801c2f0: f852 3023 ldr.w r3, [r2, r3, lsl #2]
801c2f4: 681b ldr r3, [r3, #0]
801c2f6: 603b str r3, [r7, #0]
801c2f8: e011 b.n 801c31e <tcp_new_port+0x62>
if (pcb->local_port == tcp_port) {
801c2fa: 683b ldr r3, [r7, #0]
801c2fc: 8ada ldrh r2, [r3, #22]
801c2fe: 4b10 ldr r3, [pc, #64] @ (801c340 <tcp_new_port+0x84>)
801c300: 881b ldrh r3, [r3, #0]
801c302: 429a cmp r2, r3
801c304: d108 bne.n 801c318 <tcp_new_port+0x5c>
n++;
801c306: 88bb ldrh r3, [r7, #4]
801c308: 3301 adds r3, #1
801c30a: 80bb strh r3, [r7, #4]
if (n > (TCP_LOCAL_PORT_RANGE_END - TCP_LOCAL_PORT_RANGE_START)) {
801c30c: 88bb ldrh r3, [r7, #4]
801c30e: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
801c312: d3d8 bcc.n 801c2c6 <tcp_new_port+0xa>
return 0;
801c314: 2300 movs r3, #0
801c316: e00d b.n 801c334 <tcp_new_port+0x78>
for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
801c318: 683b ldr r3, [r7, #0]
801c31a: 68db ldr r3, [r3, #12]
801c31c: 603b str r3, [r7, #0]
801c31e: 683b ldr r3, [r7, #0]
801c320: 2b00 cmp r3, #0
801c322: d1ea bne.n 801c2fa <tcp_new_port+0x3e>
for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
801c324: 79fb ldrb r3, [r7, #7]
801c326: 3301 adds r3, #1
801c328: 71fb strb r3, [r7, #7]
801c32a: 79fb ldrb r3, [r7, #7]
801c32c: 2b03 cmp r3, #3
801c32e: d9dd bls.n 801c2ec <tcp_new_port+0x30>
}
goto again;
}
}
}
return tcp_port;
801c330: 4b03 ldr r3, [pc, #12] @ (801c340 <tcp_new_port+0x84>)
801c332: 881b ldrh r3, [r3, #0]
}
801c334: 4618 mov r0, r3
801c336: 370c adds r7, #12
801c338: 46bd mov sp, r7
801c33a: f85d 7b04 ldr.w r7, [sp], #4
801c33e: 4770 bx lr
801c340: 2400004c .word 0x2400004c
801c344: 08031e90 .word 0x08031e90
0801c348 <tcp_connect>:
* other err_t values if connect request couldn't be sent
*/
err_t
tcp_connect(struct tcp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port,
tcp_connected_fn connected)
{
801c348: b580 push {r7, lr}
801c34a: b08a sub sp, #40 @ 0x28
801c34c: af00 add r7, sp, #0
801c34e: 60f8 str r0, [r7, #12]
801c350: 60b9 str r1, [r7, #8]
801c352: 603b str r3, [r7, #0]
801c354: 4613 mov r3, r2
801c356: 80fb strh r3, [r7, #6]
struct netif *netif = NULL;
801c358: 2300 movs r3, #0
801c35a: 627b str r3, [r7, #36] @ 0x24
err_t ret;
u32_t iss;
u16_t old_local_port;
LWIP_ASSERT_CORE_LOCKED();
801c35c: f7f4 ff3a bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("tcp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
801c360: 68fb ldr r3, [r7, #12]
801c362: 2b00 cmp r3, #0
801c364: d109 bne.n 801c37a <tcp_connect+0x32>
801c366: 4b7d ldr r3, [pc, #500] @ (801c55c <tcp_connect+0x214>)
801c368: f240 4235 movw r2, #1077 @ 0x435
801c36c: 497c ldr r1, [pc, #496] @ (801c560 <tcp_connect+0x218>)
801c36e: 487d ldr r0, [pc, #500] @ (801c564 <tcp_connect+0x21c>)
801c370: f00e fb5c bl 802aa2c <iprintf>
801c374: f06f 030f mvn.w r3, #15
801c378: e0ec b.n 801c554 <tcp_connect+0x20c>
LWIP_ERROR("tcp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
801c37a: 68bb ldr r3, [r7, #8]
801c37c: 2b00 cmp r3, #0
801c37e: d109 bne.n 801c394 <tcp_connect+0x4c>
801c380: 4b76 ldr r3, [pc, #472] @ (801c55c <tcp_connect+0x214>)
801c382: f240 4236 movw r2, #1078 @ 0x436
801c386: 4978 ldr r1, [pc, #480] @ (801c568 <tcp_connect+0x220>)
801c388: 4876 ldr r0, [pc, #472] @ (801c564 <tcp_connect+0x21c>)
801c38a: f00e fb4f bl 802aa2c <iprintf>
801c38e: f06f 030f mvn.w r3, #15
801c392: e0df b.n 801c554 <tcp_connect+0x20c>
LWIP_ERROR("tcp_connect: can only connect from state CLOSED", pcb->state == CLOSED, return ERR_ISCONN);
801c394: 68fb ldr r3, [r7, #12]
801c396: 7d1b ldrb r3, [r3, #20]
801c398: 2b00 cmp r3, #0
801c39a: d009 beq.n 801c3b0 <tcp_connect+0x68>
801c39c: 4b6f ldr r3, [pc, #444] @ (801c55c <tcp_connect+0x214>)
801c39e: f44f 6287 mov.w r2, #1080 @ 0x438
801c3a2: 4972 ldr r1, [pc, #456] @ (801c56c <tcp_connect+0x224>)
801c3a4: 486f ldr r0, [pc, #444] @ (801c564 <tcp_connect+0x21c>)
801c3a6: f00e fb41 bl 802aa2c <iprintf>
801c3aa: f06f 0309 mvn.w r3, #9
801c3ae: e0d1 b.n 801c554 <tcp_connect+0x20c>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port));
ip_addr_set(&pcb->remote_ip, ipaddr);
801c3b0: 68bb ldr r3, [r7, #8]
801c3b2: 2b00 cmp r3, #0
801c3b4: d002 beq.n 801c3bc <tcp_connect+0x74>
801c3b6: 68bb ldr r3, [r7, #8]
801c3b8: 681b ldr r3, [r3, #0]
801c3ba: e000 b.n 801c3be <tcp_connect+0x76>
801c3bc: 2300 movs r3, #0
801c3be: 68fa ldr r2, [r7, #12]
801c3c0: 6053 str r3, [r2, #4]
pcb->remote_port = port;
801c3c2: 68fb ldr r3, [r7, #12]
801c3c4: 88fa ldrh r2, [r7, #6]
801c3c6: 831a strh r2, [r3, #24]
if (pcb->netif_idx != NETIF_NO_INDEX) {
801c3c8: 68fb ldr r3, [r7, #12]
801c3ca: 7a1b ldrb r3, [r3, #8]
801c3cc: 2b00 cmp r3, #0
801c3ce: d006 beq.n 801c3de <tcp_connect+0x96>
netif = netif_get_by_index(pcb->netif_idx);
801c3d0: 68fb ldr r3, [r7, #12]
801c3d2: 7a1b ldrb r3, [r3, #8]
801c3d4: 4618 mov r0, r3
801c3d6: f7fe fcf1 bl 801adbc <netif_get_by_index>
801c3da: 6278 str r0, [r7, #36] @ 0x24
801c3dc: e005 b.n 801c3ea <tcp_connect+0xa2>
} else {
/* check if we have a route to the remote host */
netif = ip_route(&pcb->local_ip, &pcb->remote_ip);
801c3de: 68fb ldr r3, [r7, #12]
801c3e0: 3304 adds r3, #4
801c3e2: 4618 mov r0, r3
801c3e4: f009 fb14 bl 8025a10 <ip4_route>
801c3e8: 6278 str r0, [r7, #36] @ 0x24
}
if (netif == NULL) {
801c3ea: 6a7b ldr r3, [r7, #36] @ 0x24
801c3ec: 2b00 cmp r3, #0
801c3ee: d102 bne.n 801c3f6 <tcp_connect+0xae>
/* Don't even try to send a SYN packet if we have no route since that will fail. */
return ERR_RTE;
801c3f0: f06f 0303 mvn.w r3, #3
801c3f4: e0ae b.n 801c554 <tcp_connect+0x20c>
}
/* check if local IP has been assigned to pcb, if not, get one */
if (ip_addr_isany(&pcb->local_ip)) {
801c3f6: 68fb ldr r3, [r7, #12]
801c3f8: 2b00 cmp r3, #0
801c3fa: d003 beq.n 801c404 <tcp_connect+0xbc>
801c3fc: 68fb ldr r3, [r7, #12]
801c3fe: 681b ldr r3, [r3, #0]
801c400: 2b00 cmp r3, #0
801c402: d111 bne.n 801c428 <tcp_connect+0xe0>
const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, ipaddr);
801c404: 6a7b ldr r3, [r7, #36] @ 0x24
801c406: 2b00 cmp r3, #0
801c408: d002 beq.n 801c410 <tcp_connect+0xc8>
801c40a: 6a7b ldr r3, [r7, #36] @ 0x24
801c40c: 3304 adds r3, #4
801c40e: e000 b.n 801c412 <tcp_connect+0xca>
801c410: 2300 movs r3, #0
801c412: 61fb str r3, [r7, #28]
if (local_ip == NULL) {
801c414: 69fb ldr r3, [r7, #28]
801c416: 2b00 cmp r3, #0
801c418: d102 bne.n 801c420 <tcp_connect+0xd8>
return ERR_RTE;
801c41a: f06f 0303 mvn.w r3, #3
801c41e: e099 b.n 801c554 <tcp_connect+0x20c>
}
ip_addr_copy(pcb->local_ip, *local_ip);
801c420: 69fb ldr r3, [r7, #28]
801c422: 681a ldr r2, [r3, #0]
801c424: 68fb ldr r3, [r7, #12]
801c426: 601a str r2, [r3, #0]
ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST)) {
ip6_addr_assign_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST, netif);
}
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */
old_local_port = pcb->local_port;
801c428: 68fb ldr r3, [r7, #12]
801c42a: 8adb ldrh r3, [r3, #22]
801c42c: 837b strh r3, [r7, #26]
if (pcb->local_port == 0) {
801c42e: 68fb ldr r3, [r7, #12]
801c430: 8adb ldrh r3, [r3, #22]
801c432: 2b00 cmp r3, #0
801c434: d10c bne.n 801c450 <tcp_connect+0x108>
pcb->local_port = tcp_new_port();
801c436: f7ff ff41 bl 801c2bc <tcp_new_port>
801c43a: 4603 mov r3, r0
801c43c: 461a mov r2, r3
801c43e: 68fb ldr r3, [r7, #12]
801c440: 82da strh r2, [r3, #22]
if (pcb->local_port == 0) {
801c442: 68fb ldr r3, [r7, #12]
801c444: 8adb ldrh r3, [r3, #22]
801c446: 2b00 cmp r3, #0
801c448: d102 bne.n 801c450 <tcp_connect+0x108>
return ERR_BUF;
801c44a: f06f 0301 mvn.w r3, #1
801c44e: e081 b.n 801c554 <tcp_connect+0x20c>
}
}
#endif /* SO_REUSE */
}
iss = tcp_next_iss(pcb);
801c450: 68f8 ldr r0, [r7, #12]
801c452: f001 f875 bl 801d540 <tcp_next_iss>
801c456: 6178 str r0, [r7, #20]
pcb->rcv_nxt = 0;
801c458: 68fb ldr r3, [r7, #12]
801c45a: 2200 movs r2, #0
801c45c: 625a str r2, [r3, #36] @ 0x24
pcb->snd_nxt = iss;
801c45e: 68fb ldr r3, [r7, #12]
801c460: 697a ldr r2, [r7, #20]
801c462: 651a str r2, [r3, #80] @ 0x50
pcb->lastack = iss - 1;
801c464: 697b ldr r3, [r7, #20]
801c466: 1e5a subs r2, r3, #1
801c468: 68fb ldr r3, [r7, #12]
801c46a: 645a str r2, [r3, #68] @ 0x44
pcb->snd_wl2 = iss - 1;
801c46c: 697b ldr r3, [r7, #20]
801c46e: 1e5a subs r2, r3, #1
801c470: 68fb ldr r3, [r7, #12]
801c472: 659a str r2, [r3, #88] @ 0x58
pcb->snd_lbb = iss - 1;
801c474: 697b ldr r3, [r7, #20]
801c476: 1e5a subs r2, r3, #1
801c478: 68fb ldr r3, [r7, #12]
801c47a: 65da str r2, [r3, #92] @ 0x5c
/* Start with a window that does not need scaling. When window scaling is
enabled and used, the window is enlarged when both sides agree on scaling. */
pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
801c47c: 68fb ldr r3, [r7, #12]
801c47e: f241 62d0 movw r2, #5840 @ 0x16d0
801c482: 855a strh r2, [r3, #42] @ 0x2a
801c484: 68fb ldr r3, [r7, #12]
801c486: 8d5a ldrh r2, [r3, #42] @ 0x2a
801c488: 68fb ldr r3, [r7, #12]
801c48a: 851a strh r2, [r3, #40] @ 0x28
pcb->rcv_ann_right_edge = pcb->rcv_nxt;
801c48c: 68fb ldr r3, [r7, #12]
801c48e: 6a5a ldr r2, [r3, #36] @ 0x24
801c490: 68fb ldr r3, [r7, #12]
801c492: 62da str r2, [r3, #44] @ 0x2c
pcb->snd_wnd = TCP_WND;
801c494: 68fb ldr r3, [r7, #12]
801c496: f241 62d0 movw r2, #5840 @ 0x16d0
801c49a: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
/* As initial send MSS, we use TCP_MSS but limit it to 536.
The send MSS is updated when an MSS option is received. */
pcb->mss = INITIAL_MSS;
801c49e: 68fb ldr r3, [r7, #12]
801c4a0: f44f 7206 mov.w r2, #536 @ 0x218
801c4a4: 865a strh r2, [r3, #50] @ 0x32
#if TCP_CALCULATE_EFF_SEND_MSS
pcb->mss = tcp_eff_send_mss_netif(pcb->mss, netif, &pcb->remote_ip);
801c4a6: 68fb ldr r3, [r7, #12]
801c4a8: 8e58 ldrh r0, [r3, #50] @ 0x32
801c4aa: 68fb ldr r3, [r7, #12]
801c4ac: 3304 adds r3, #4
801c4ae: 461a mov r2, r3
801c4b0: 6a79 ldr r1, [r7, #36] @ 0x24
801c4b2: f001 f86b bl 801d58c <tcp_eff_send_mss_netif>
801c4b6: 4603 mov r3, r0
801c4b8: 461a mov r2, r3
801c4ba: 68fb ldr r3, [r7, #12]
801c4bc: 865a strh r2, [r3, #50] @ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
pcb->cwnd = 1;
801c4be: 68fb ldr r3, [r7, #12]
801c4c0: 2201 movs r2, #1
801c4c2: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
#if LWIP_CALLBACK_API
pcb->connected = connected;
801c4c6: 68fb ldr r3, [r7, #12]
801c4c8: 683a ldr r2, [r7, #0]
801c4ca: f8c3 2088 str.w r2, [r3, #136] @ 0x88
#else /* LWIP_CALLBACK_API */
LWIP_UNUSED_ARG(connected);
#endif /* LWIP_CALLBACK_API */
/* Send a SYN together with the MSS option. */
ret = tcp_enqueue_flags(pcb, TCP_SYN);
801c4ce: 2102 movs r1, #2
801c4d0: 68f8 ldr r0, [r7, #12]
801c4d2: f004 fb31 bl 8020b38 <tcp_enqueue_flags>
801c4d6: 4603 mov r3, r0
801c4d8: 74fb strb r3, [r7, #19]
if (ret == ERR_OK) {
801c4da: f997 3013 ldrsb.w r3, [r7, #19]
801c4de: 2b00 cmp r3, #0
801c4e0: d136 bne.n 801c550 <tcp_connect+0x208>
/* SYN segment was enqueued, changed the pcbs state now */
pcb->state = SYN_SENT;
801c4e2: 68fb ldr r3, [r7, #12]
801c4e4: 2202 movs r2, #2
801c4e6: 751a strb r2, [r3, #20]
if (old_local_port != 0) {
801c4e8: 8b7b ldrh r3, [r7, #26]
801c4ea: 2b00 cmp r3, #0
801c4ec: d021 beq.n 801c532 <tcp_connect+0x1ea>
TCP_RMV(&tcp_bound_pcbs, pcb);
801c4ee: 4b20 ldr r3, [pc, #128] @ (801c570 <tcp_connect+0x228>)
801c4f0: 681b ldr r3, [r3, #0]
801c4f2: 68fa ldr r2, [r7, #12]
801c4f4: 429a cmp r2, r3
801c4f6: d105 bne.n 801c504 <tcp_connect+0x1bc>
801c4f8: 4b1d ldr r3, [pc, #116] @ (801c570 <tcp_connect+0x228>)
801c4fa: 681b ldr r3, [r3, #0]
801c4fc: 68db ldr r3, [r3, #12]
801c4fe: 4a1c ldr r2, [pc, #112] @ (801c570 <tcp_connect+0x228>)
801c500: 6013 str r3, [r2, #0]
801c502: e013 b.n 801c52c <tcp_connect+0x1e4>
801c504: 4b1a ldr r3, [pc, #104] @ (801c570 <tcp_connect+0x228>)
801c506: 681b ldr r3, [r3, #0]
801c508: 623b str r3, [r7, #32]
801c50a: e00c b.n 801c526 <tcp_connect+0x1de>
801c50c: 6a3b ldr r3, [r7, #32]
801c50e: 68db ldr r3, [r3, #12]
801c510: 68fa ldr r2, [r7, #12]
801c512: 429a cmp r2, r3
801c514: d104 bne.n 801c520 <tcp_connect+0x1d8>
801c516: 68fb ldr r3, [r7, #12]
801c518: 68da ldr r2, [r3, #12]
801c51a: 6a3b ldr r3, [r7, #32]
801c51c: 60da str r2, [r3, #12]
801c51e: e005 b.n 801c52c <tcp_connect+0x1e4>
801c520: 6a3b ldr r3, [r7, #32]
801c522: 68db ldr r3, [r3, #12]
801c524: 623b str r3, [r7, #32]
801c526: 6a3b ldr r3, [r7, #32]
801c528: 2b00 cmp r3, #0
801c52a: d1ef bne.n 801c50c <tcp_connect+0x1c4>
801c52c: 68fb ldr r3, [r7, #12]
801c52e: 2200 movs r2, #0
801c530: 60da str r2, [r3, #12]
}
TCP_REG_ACTIVE(pcb);
801c532: 4b10 ldr r3, [pc, #64] @ (801c574 <tcp_connect+0x22c>)
801c534: 681a ldr r2, [r3, #0]
801c536: 68fb ldr r3, [r7, #12]
801c538: 60da str r2, [r3, #12]
801c53a: 4a0e ldr r2, [pc, #56] @ (801c574 <tcp_connect+0x22c>)
801c53c: 68fb ldr r3, [r7, #12]
801c53e: 6013 str r3, [r2, #0]
801c540: f005 fb6c bl 8021c1c <tcp_timer_needed>
801c544: 4b0c ldr r3, [pc, #48] @ (801c578 <tcp_connect+0x230>)
801c546: 2201 movs r2, #1
801c548: 701a strb r2, [r3, #0]
MIB2_STATS_INC(mib2.tcpactiveopens);
tcp_output(pcb);
801c54a: 68f8 ldr r0, [r7, #12]
801c54c: f004 fbe2 bl 8020d14 <tcp_output>
}
return ret;
801c550: f997 3013 ldrsb.w r3, [r7, #19]
}
801c554: 4618 mov r0, r3
801c556: 3728 adds r7, #40 @ 0x28
801c558: 46bd mov sp, r7
801c55a: bd80 pop {r7, pc}
801c55c: 0802f7f0 .word 0x0802f7f0
801c560: 0802facc .word 0x0802facc
801c564: 0802f834 .word 0x0802f834
801c568: 0802fae8 .word 0x0802fae8
801c56c: 0802fb04 .word 0x0802fb04
801c570: 2402afac .word 0x2402afac
801c574: 2402afb4 .word 0x2402afb4
801c578: 2402afbc .word 0x2402afbc
0801c57c <tcp_slowtmr>:
*
* Automatically called from tcp_tmr().
*/
void
tcp_slowtmr(void)
{
801c57c: b5b0 push {r4, r5, r7, lr}
801c57e: b090 sub sp, #64 @ 0x40
801c580: af04 add r7, sp, #16
tcpwnd_size_t eff_wnd;
u8_t pcb_remove; /* flag if a PCB should be removed */
u8_t pcb_reset; /* flag if a RST should be sent when removing */
err_t err;
err = ERR_OK;
801c582: 2300 movs r3, #0
801c584: f887 3025 strb.w r3, [r7, #37] @ 0x25
++tcp_ticks;
801c588: 4b95 ldr r3, [pc, #596] @ (801c7e0 <tcp_slowtmr+0x264>)
801c58a: 681b ldr r3, [r3, #0]
801c58c: 3301 adds r3, #1
801c58e: 4a94 ldr r2, [pc, #592] @ (801c7e0 <tcp_slowtmr+0x264>)
801c590: 6013 str r3, [r2, #0]
++tcp_timer_ctr;
801c592: 4b94 ldr r3, [pc, #592] @ (801c7e4 <tcp_slowtmr+0x268>)
801c594: 781b ldrb r3, [r3, #0]
801c596: 3301 adds r3, #1
801c598: b2da uxtb r2, r3
801c59a: 4b92 ldr r3, [pc, #584] @ (801c7e4 <tcp_slowtmr+0x268>)
801c59c: 701a strb r2, [r3, #0]
801c59e: e000 b.n 801c5a2 <tcp_slowtmr+0x26>
prev->polltmr = 0;
LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n"));
tcp_active_pcbs_changed = 0;
TCP_EVENT_POLL(prev, err);
if (tcp_active_pcbs_changed) {
goto tcp_slowtmr_start;
801c5a0: bf00 nop
prev = NULL;
801c5a2: 2300 movs r3, #0
801c5a4: 62bb str r3, [r7, #40] @ 0x28
pcb = tcp_active_pcbs;
801c5a6: 4b90 ldr r3, [pc, #576] @ (801c7e8 <tcp_slowtmr+0x26c>)
801c5a8: 681b ldr r3, [r3, #0]
801c5aa: 62fb str r3, [r7, #44] @ 0x2c
while (pcb != NULL) {
801c5ac: e29d b.n 801caea <tcp_slowtmr+0x56e>
LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED);
801c5ae: 6afb ldr r3, [r7, #44] @ 0x2c
801c5b0: 7d1b ldrb r3, [r3, #20]
801c5b2: 2b00 cmp r3, #0
801c5b4: d106 bne.n 801c5c4 <tcp_slowtmr+0x48>
801c5b6: 4b8d ldr r3, [pc, #564] @ (801c7ec <tcp_slowtmr+0x270>)
801c5b8: f240 42be movw r2, #1214 @ 0x4be
801c5bc: 498c ldr r1, [pc, #560] @ (801c7f0 <tcp_slowtmr+0x274>)
801c5be: 488d ldr r0, [pc, #564] @ (801c7f4 <tcp_slowtmr+0x278>)
801c5c0: f00e fa34 bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN);
801c5c4: 6afb ldr r3, [r7, #44] @ 0x2c
801c5c6: 7d1b ldrb r3, [r3, #20]
801c5c8: 2b01 cmp r3, #1
801c5ca: d106 bne.n 801c5da <tcp_slowtmr+0x5e>
801c5cc: 4b87 ldr r3, [pc, #540] @ (801c7ec <tcp_slowtmr+0x270>)
801c5ce: f240 42bf movw r2, #1215 @ 0x4bf
801c5d2: 4989 ldr r1, [pc, #548] @ (801c7f8 <tcp_slowtmr+0x27c>)
801c5d4: 4887 ldr r0, [pc, #540] @ (801c7f4 <tcp_slowtmr+0x278>)
801c5d6: f00e fa29 bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT);
801c5da: 6afb ldr r3, [r7, #44] @ 0x2c
801c5dc: 7d1b ldrb r3, [r3, #20]
801c5de: 2b0a cmp r3, #10
801c5e0: d106 bne.n 801c5f0 <tcp_slowtmr+0x74>
801c5e2: 4b82 ldr r3, [pc, #520] @ (801c7ec <tcp_slowtmr+0x270>)
801c5e4: f44f 6298 mov.w r2, #1216 @ 0x4c0
801c5e8: 4984 ldr r1, [pc, #528] @ (801c7fc <tcp_slowtmr+0x280>)
801c5ea: 4882 ldr r0, [pc, #520] @ (801c7f4 <tcp_slowtmr+0x278>)
801c5ec: f00e fa1e bl 802aa2c <iprintf>
if (pcb->last_timer == tcp_timer_ctr) {
801c5f0: 6afb ldr r3, [r7, #44] @ 0x2c
801c5f2: 7f9a ldrb r2, [r3, #30]
801c5f4: 4b7b ldr r3, [pc, #492] @ (801c7e4 <tcp_slowtmr+0x268>)
801c5f6: 781b ldrb r3, [r3, #0]
801c5f8: 429a cmp r2, r3
801c5fa: d105 bne.n 801c608 <tcp_slowtmr+0x8c>
prev = pcb;
801c5fc: 6afb ldr r3, [r7, #44] @ 0x2c
801c5fe: 62bb str r3, [r7, #40] @ 0x28
pcb = pcb->next;
801c600: 6afb ldr r3, [r7, #44] @ 0x2c
801c602: 68db ldr r3, [r3, #12]
801c604: 62fb str r3, [r7, #44] @ 0x2c
continue;
801c606: e270 b.n 801caea <tcp_slowtmr+0x56e>
pcb->last_timer = tcp_timer_ctr;
801c608: 4b76 ldr r3, [pc, #472] @ (801c7e4 <tcp_slowtmr+0x268>)
801c60a: 781a ldrb r2, [r3, #0]
801c60c: 6afb ldr r3, [r7, #44] @ 0x2c
801c60e: 779a strb r2, [r3, #30]
pcb_remove = 0;
801c610: 2300 movs r3, #0
801c612: f887 3027 strb.w r3, [r7, #39] @ 0x27
pcb_reset = 0;
801c616: 2300 movs r3, #0
801c618: f887 3026 strb.w r3, [r7, #38] @ 0x26
if (pcb->state == SYN_SENT && pcb->nrtx >= TCP_SYNMAXRTX) {
801c61c: 6afb ldr r3, [r7, #44] @ 0x2c
801c61e: 7d1b ldrb r3, [r3, #20]
801c620: 2b02 cmp r3, #2
801c622: d10a bne.n 801c63a <tcp_slowtmr+0xbe>
801c624: 6afb ldr r3, [r7, #44] @ 0x2c
801c626: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
801c62a: 2b05 cmp r3, #5
801c62c: d905 bls.n 801c63a <tcp_slowtmr+0xbe>
++pcb_remove;
801c62e: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801c632: 3301 adds r3, #1
801c634: f887 3027 strb.w r3, [r7, #39] @ 0x27
LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n"));
801c638: e11e b.n 801c878 <tcp_slowtmr+0x2fc>
} else if (pcb->nrtx >= TCP_MAXRTX) {
801c63a: 6afb ldr r3, [r7, #44] @ 0x2c
801c63c: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
801c640: 2b0b cmp r3, #11
801c642: d905 bls.n 801c650 <tcp_slowtmr+0xd4>
++pcb_remove;
801c644: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801c648: 3301 adds r3, #1
801c64a: f887 3027 strb.w r3, [r7, #39] @ 0x27
801c64e: e113 b.n 801c878 <tcp_slowtmr+0x2fc>
if (pcb->persist_backoff > 0) {
801c650: 6afb ldr r3, [r7, #44] @ 0x2c
801c652: f893 3099 ldrb.w r3, [r3, #153] @ 0x99
801c656: 2b00 cmp r3, #0
801c658: d075 beq.n 801c746 <tcp_slowtmr+0x1ca>
LWIP_ASSERT("tcp_slowtimr: persist ticking with in-flight data", pcb->unacked == NULL);
801c65a: 6afb ldr r3, [r7, #44] @ 0x2c
801c65c: 6f1b ldr r3, [r3, #112] @ 0x70
801c65e: 2b00 cmp r3, #0
801c660: d006 beq.n 801c670 <tcp_slowtmr+0xf4>
801c662: 4b62 ldr r3, [pc, #392] @ (801c7ec <tcp_slowtmr+0x270>)
801c664: f240 42d4 movw r2, #1236 @ 0x4d4
801c668: 4965 ldr r1, [pc, #404] @ (801c800 <tcp_slowtmr+0x284>)
801c66a: 4862 ldr r0, [pc, #392] @ (801c7f4 <tcp_slowtmr+0x278>)
801c66c: f00e f9de bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_slowtimr: persist ticking with empty send buffer", pcb->unsent != NULL);
801c670: 6afb ldr r3, [r7, #44] @ 0x2c
801c672: 6edb ldr r3, [r3, #108] @ 0x6c
801c674: 2b00 cmp r3, #0
801c676: d106 bne.n 801c686 <tcp_slowtmr+0x10a>
801c678: 4b5c ldr r3, [pc, #368] @ (801c7ec <tcp_slowtmr+0x270>)
801c67a: f240 42d5 movw r2, #1237 @ 0x4d5
801c67e: 4961 ldr r1, [pc, #388] @ (801c804 <tcp_slowtmr+0x288>)
801c680: 485c ldr r0, [pc, #368] @ (801c7f4 <tcp_slowtmr+0x278>)
801c682: f00e f9d3 bl 802aa2c <iprintf>
if (pcb->persist_probe >= TCP_MAXRTX) {
801c686: 6afb ldr r3, [r7, #44] @ 0x2c
801c688: f893 309a ldrb.w r3, [r3, #154] @ 0x9a
801c68c: 2b0b cmp r3, #11
801c68e: d905 bls.n 801c69c <tcp_slowtmr+0x120>
++pcb_remove; /* max probes reached */
801c690: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801c694: 3301 adds r3, #1
801c696: f887 3027 strb.w r3, [r7, #39] @ 0x27
801c69a: e0ed b.n 801c878 <tcp_slowtmr+0x2fc>
u8_t backoff_cnt = tcp_persist_backoff[pcb->persist_backoff - 1];
801c69c: 6afb ldr r3, [r7, #44] @ 0x2c
801c69e: f893 3099 ldrb.w r3, [r3, #153] @ 0x99
801c6a2: 3b01 subs r3, #1
801c6a4: 4a58 ldr r2, [pc, #352] @ (801c808 <tcp_slowtmr+0x28c>)
801c6a6: 5cd3 ldrb r3, [r2, r3]
801c6a8: 747b strb r3, [r7, #17]
if (pcb->persist_cnt < backoff_cnt) {
801c6aa: 6afb ldr r3, [r7, #44] @ 0x2c
801c6ac: f893 3098 ldrb.w r3, [r3, #152] @ 0x98
801c6b0: 7c7a ldrb r2, [r7, #17]
801c6b2: 429a cmp r2, r3
801c6b4: d907 bls.n 801c6c6 <tcp_slowtmr+0x14a>
pcb->persist_cnt++;
801c6b6: 6afb ldr r3, [r7, #44] @ 0x2c
801c6b8: f893 3098 ldrb.w r3, [r3, #152] @ 0x98
801c6bc: 3301 adds r3, #1
801c6be: b2da uxtb r2, r3
801c6c0: 6afb ldr r3, [r7, #44] @ 0x2c
801c6c2: f883 2098 strb.w r2, [r3, #152] @ 0x98
if (pcb->persist_cnt >= backoff_cnt) {
801c6c6: 6afb ldr r3, [r7, #44] @ 0x2c
801c6c8: f893 3098 ldrb.w r3, [r3, #152] @ 0x98
801c6cc: 7c7a ldrb r2, [r7, #17]
801c6ce: 429a cmp r2, r3
801c6d0: f200 80d2 bhi.w 801c878 <tcp_slowtmr+0x2fc>
int next_slot = 1; /* increment timer to next slot */
801c6d4: 2301 movs r3, #1
801c6d6: 623b str r3, [r7, #32]
if (pcb->snd_wnd == 0) {
801c6d8: 6afb ldr r3, [r7, #44] @ 0x2c
801c6da: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
801c6de: 2b00 cmp r3, #0
801c6e0: d108 bne.n 801c6f4 <tcp_slowtmr+0x178>
if (tcp_zero_window_probe(pcb) != ERR_OK) {
801c6e2: 6af8 ldr r0, [r7, #44] @ 0x2c
801c6e4: f005 f9cc bl 8021a80 <tcp_zero_window_probe>
801c6e8: 4603 mov r3, r0
801c6ea: 2b00 cmp r3, #0
801c6ec: d014 beq.n 801c718 <tcp_slowtmr+0x19c>
next_slot = 0; /* try probe again with current slot */
801c6ee: 2300 movs r3, #0
801c6f0: 623b str r3, [r7, #32]
801c6f2: e011 b.n 801c718 <tcp_slowtmr+0x19c>
if (tcp_split_unsent_seg(pcb, (u16_t)pcb->snd_wnd) == ERR_OK) {
801c6f4: 6afb ldr r3, [r7, #44] @ 0x2c
801c6f6: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
801c6fa: 4619 mov r1, r3
801c6fc: 6af8 ldr r0, [r7, #44] @ 0x2c
801c6fe: f004 f87f bl 8020800 <tcp_split_unsent_seg>
801c702: 4603 mov r3, r0
801c704: 2b00 cmp r3, #0
801c706: d107 bne.n 801c718 <tcp_slowtmr+0x19c>
if (tcp_output(pcb) == ERR_OK) {
801c708: 6af8 ldr r0, [r7, #44] @ 0x2c
801c70a: f004 fb03 bl 8020d14 <tcp_output>
801c70e: 4603 mov r3, r0
801c710: 2b00 cmp r3, #0
801c712: d101 bne.n 801c718 <tcp_slowtmr+0x19c>
next_slot = 0;
801c714: 2300 movs r3, #0
801c716: 623b str r3, [r7, #32]
if (next_slot) {
801c718: 6a3b ldr r3, [r7, #32]
801c71a: 2b00 cmp r3, #0
801c71c: f000 80ac beq.w 801c878 <tcp_slowtmr+0x2fc>
pcb->persist_cnt = 0;
801c720: 6afb ldr r3, [r7, #44] @ 0x2c
801c722: 2200 movs r2, #0
801c724: f883 2098 strb.w r2, [r3, #152] @ 0x98
if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) {
801c728: 6afb ldr r3, [r7, #44] @ 0x2c
801c72a: f893 3099 ldrb.w r3, [r3, #153] @ 0x99
801c72e: 2b06 cmp r3, #6
801c730: f200 80a2 bhi.w 801c878 <tcp_slowtmr+0x2fc>
pcb->persist_backoff++;
801c734: 6afb ldr r3, [r7, #44] @ 0x2c
801c736: f893 3099 ldrb.w r3, [r3, #153] @ 0x99
801c73a: 3301 adds r3, #1
801c73c: b2da uxtb r2, r3
801c73e: 6afb ldr r3, [r7, #44] @ 0x2c
801c740: f883 2099 strb.w r2, [r3, #153] @ 0x99
801c744: e098 b.n 801c878 <tcp_slowtmr+0x2fc>
if ((pcb->rtime >= 0) && (pcb->rtime < 0x7FFF)) {
801c746: 6afb ldr r3, [r7, #44] @ 0x2c
801c748: f9b3 3030 ldrsh.w r3, [r3, #48] @ 0x30
801c74c: 2b00 cmp r3, #0
801c74e: db0f blt.n 801c770 <tcp_slowtmr+0x1f4>
801c750: 6afb ldr r3, [r7, #44] @ 0x2c
801c752: f9b3 3030 ldrsh.w r3, [r3, #48] @ 0x30
801c756: f647 72ff movw r2, #32767 @ 0x7fff
801c75a: 4293 cmp r3, r2
801c75c: d008 beq.n 801c770 <tcp_slowtmr+0x1f4>
++pcb->rtime;
801c75e: 6afb ldr r3, [r7, #44] @ 0x2c
801c760: f9b3 3030 ldrsh.w r3, [r3, #48] @ 0x30
801c764: b29b uxth r3, r3
801c766: 3301 adds r3, #1
801c768: b29b uxth r3, r3
801c76a: b21a sxth r2, r3
801c76c: 6afb ldr r3, [r7, #44] @ 0x2c
801c76e: 861a strh r2, [r3, #48] @ 0x30
if (pcb->rtime >= pcb->rto) {
801c770: 6afb ldr r3, [r7, #44] @ 0x2c
801c772: f9b3 2030 ldrsh.w r2, [r3, #48] @ 0x30
801c776: 6afb ldr r3, [r7, #44] @ 0x2c
801c778: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40
801c77c: 429a cmp r2, r3
801c77e: db7b blt.n 801c878 <tcp_slowtmr+0x2fc>
if ((tcp_rexmit_rto_prepare(pcb) == ERR_OK) || ((pcb->unacked == NULL) && (pcb->unsent != NULL))) {
801c780: 6af8 ldr r0, [r7, #44] @ 0x2c
801c782: f004 fdbf bl 8021304 <tcp_rexmit_rto_prepare>
801c786: 4603 mov r3, r0
801c788: 2b00 cmp r3, #0
801c78a: d007 beq.n 801c79c <tcp_slowtmr+0x220>
801c78c: 6afb ldr r3, [r7, #44] @ 0x2c
801c78e: 6f1b ldr r3, [r3, #112] @ 0x70
801c790: 2b00 cmp r3, #0
801c792: d171 bne.n 801c878 <tcp_slowtmr+0x2fc>
801c794: 6afb ldr r3, [r7, #44] @ 0x2c
801c796: 6edb ldr r3, [r3, #108] @ 0x6c
801c798: 2b00 cmp r3, #0
801c79a: d06d beq.n 801c878 <tcp_slowtmr+0x2fc>
if (pcb->state != SYN_SENT) {
801c79c: 6afb ldr r3, [r7, #44] @ 0x2c
801c79e: 7d1b ldrb r3, [r3, #20]
801c7a0: 2b02 cmp r3, #2
801c7a2: d03a beq.n 801c81a <tcp_slowtmr+0x29e>
u8_t backoff_idx = LWIP_MIN(pcb->nrtx, sizeof(tcp_backoff) - 1);
801c7a4: 6afb ldr r3, [r7, #44] @ 0x2c
801c7a6: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
801c7aa: 2b0c cmp r3, #12
801c7ac: bf28 it cs
801c7ae: 230c movcs r3, #12
801c7b0: 76fb strb r3, [r7, #27]
int calc_rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[backoff_idx];
801c7b2: 6afb ldr r3, [r7, #44] @ 0x2c
801c7b4: f9b3 303c ldrsh.w r3, [r3, #60] @ 0x3c
801c7b8: 10db asrs r3, r3, #3
801c7ba: b21b sxth r3, r3
801c7bc: 461a mov r2, r3
801c7be: 6afb ldr r3, [r7, #44] @ 0x2c
801c7c0: f9b3 303e ldrsh.w r3, [r3, #62] @ 0x3e
801c7c4: 4413 add r3, r2
801c7c6: 7efa ldrb r2, [r7, #27]
801c7c8: 4910 ldr r1, [pc, #64] @ (801c80c <tcp_slowtmr+0x290>)
801c7ca: 5c8a ldrb r2, [r1, r2]
801c7cc: 4093 lsls r3, r2
801c7ce: 617b str r3, [r7, #20]
pcb->rto = (s16_t)LWIP_MIN(calc_rto, 0x7FFF);
801c7d0: 697b ldr r3, [r7, #20]
801c7d2: f647 72fe movw r2, #32766 @ 0x7ffe
801c7d6: 4293 cmp r3, r2
801c7d8: dc1a bgt.n 801c810 <tcp_slowtmr+0x294>
801c7da: 697b ldr r3, [r7, #20]
801c7dc: b21a sxth r2, r3
801c7de: e019 b.n 801c814 <tcp_slowtmr+0x298>
801c7e0: 2402afa8 .word 0x2402afa8
801c7e4: 2402afbe .word 0x2402afbe
801c7e8: 2402afb4 .word 0x2402afb4
801c7ec: 0802f7f0 .word 0x0802f7f0
801c7f0: 0802fb34 .word 0x0802fb34
801c7f4: 0802f834 .word 0x0802f834
801c7f8: 0802fb60 .word 0x0802fb60
801c7fc: 0802fb8c .word 0x0802fb8c
801c800: 0802fbbc .word 0x0802fbbc
801c804: 0802fbf0 .word 0x0802fbf0
801c808: 08031e88 .word 0x08031e88
801c80c: 08031e78 .word 0x08031e78
801c810: f647 72ff movw r2, #32767 @ 0x7fff
801c814: 6afb ldr r3, [r7, #44] @ 0x2c
801c816: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
pcb->rtime = 0;
801c81a: 6afb ldr r3, [r7, #44] @ 0x2c
801c81c: 2200 movs r2, #0
801c81e: 861a strh r2, [r3, #48] @ 0x30
eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd);
801c820: 6afb ldr r3, [r7, #44] @ 0x2c
801c822: f8b3 2060 ldrh.w r2, [r3, #96] @ 0x60
801c826: 6afb ldr r3, [r7, #44] @ 0x2c
801c828: f8b3 3048 ldrh.w r3, [r3, #72] @ 0x48
801c82c: 4293 cmp r3, r2
801c82e: bf28 it cs
801c830: 4613 movcs r3, r2
801c832: 827b strh r3, [r7, #18]
pcb->ssthresh = eff_wnd >> 1;
801c834: 8a7b ldrh r3, [r7, #18]
801c836: 085b lsrs r3, r3, #1
801c838: b29a uxth r2, r3
801c83a: 6afb ldr r3, [r7, #44] @ 0x2c
801c83c: f8a3 204a strh.w r2, [r3, #74] @ 0x4a
if (pcb->ssthresh < (tcpwnd_size_t)(pcb->mss << 1)) {
801c840: 6afb ldr r3, [r7, #44] @ 0x2c
801c842: f8b3 204a ldrh.w r2, [r3, #74] @ 0x4a
801c846: 6afb ldr r3, [r7, #44] @ 0x2c
801c848: 8e5b ldrh r3, [r3, #50] @ 0x32
801c84a: 005b lsls r3, r3, #1
801c84c: b29b uxth r3, r3
801c84e: 429a cmp r2, r3
801c850: d206 bcs.n 801c860 <tcp_slowtmr+0x2e4>
pcb->ssthresh = (tcpwnd_size_t)(pcb->mss << 1);
801c852: 6afb ldr r3, [r7, #44] @ 0x2c
801c854: 8e5b ldrh r3, [r3, #50] @ 0x32
801c856: 005b lsls r3, r3, #1
801c858: b29a uxth r2, r3
801c85a: 6afb ldr r3, [r7, #44] @ 0x2c
801c85c: f8a3 204a strh.w r2, [r3, #74] @ 0x4a
pcb->cwnd = pcb->mss;
801c860: 6afb ldr r3, [r7, #44] @ 0x2c
801c862: 8e5a ldrh r2, [r3, #50] @ 0x32
801c864: 6afb ldr r3, [r7, #44] @ 0x2c
801c866: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
pcb->bytes_acked = 0;
801c86a: 6afb ldr r3, [r7, #44] @ 0x2c
801c86c: 2200 movs r2, #0
801c86e: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
tcp_rexmit_rto_commit(pcb);
801c872: 6af8 ldr r0, [r7, #44] @ 0x2c
801c874: f004 fdc0 bl 80213f8 <tcp_rexmit_rto_commit>
if (pcb->state == FIN_WAIT_2) {
801c878: 6afb ldr r3, [r7, #44] @ 0x2c
801c87a: 7d1b ldrb r3, [r3, #20]
801c87c: 2b06 cmp r3, #6
801c87e: d111 bne.n 801c8a4 <tcp_slowtmr+0x328>
if (pcb->flags & TF_RXCLOSED) {
801c880: 6afb ldr r3, [r7, #44] @ 0x2c
801c882: 8b5b ldrh r3, [r3, #26]
801c884: f003 0310 and.w r3, r3, #16
801c888: 2b00 cmp r3, #0
801c88a: d00b beq.n 801c8a4 <tcp_slowtmr+0x328>
if ((u32_t)(tcp_ticks - pcb->tmr) >
801c88c: 4b9c ldr r3, [pc, #624] @ (801cb00 <tcp_slowtmr+0x584>)
801c88e: 681a ldr r2, [r3, #0]
801c890: 6afb ldr r3, [r7, #44] @ 0x2c
801c892: 6a1b ldr r3, [r3, #32]
801c894: 1ad3 subs r3, r2, r3
801c896: 2b28 cmp r3, #40 @ 0x28
801c898: d904 bls.n 801c8a4 <tcp_slowtmr+0x328>
++pcb_remove;
801c89a: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801c89e: 3301 adds r3, #1
801c8a0: f887 3027 strb.w r3, [r7, #39] @ 0x27
if (ip_get_option(pcb, SOF_KEEPALIVE) &&
801c8a4: 6afb ldr r3, [r7, #44] @ 0x2c
801c8a6: 7a5b ldrb r3, [r3, #9]
801c8a8: f003 0308 and.w r3, r3, #8
801c8ac: 2b00 cmp r3, #0
801c8ae: d04a beq.n 801c946 <tcp_slowtmr+0x3ca>
((pcb->state == ESTABLISHED) ||
801c8b0: 6afb ldr r3, [r7, #44] @ 0x2c
801c8b2: 7d1b ldrb r3, [r3, #20]
if (ip_get_option(pcb, SOF_KEEPALIVE) &&
801c8b4: 2b04 cmp r3, #4
801c8b6: d003 beq.n 801c8c0 <tcp_slowtmr+0x344>
(pcb->state == CLOSE_WAIT))) {
801c8b8: 6afb ldr r3, [r7, #44] @ 0x2c
801c8ba: 7d1b ldrb r3, [r3, #20]
((pcb->state == ESTABLISHED) ||
801c8bc: 2b07 cmp r3, #7
801c8be: d142 bne.n 801c946 <tcp_slowtmr+0x3ca>
if ((u32_t)(tcp_ticks - pcb->tmr) >
801c8c0: 4b8f ldr r3, [pc, #572] @ (801cb00 <tcp_slowtmr+0x584>)
801c8c2: 681a ldr r2, [r3, #0]
801c8c4: 6afb ldr r3, [r7, #44] @ 0x2c
801c8c6: 6a1b ldr r3, [r3, #32]
801c8c8: 1ad2 subs r2, r2, r3
(pcb->keep_idle + TCP_KEEP_DUR(pcb)) / TCP_SLOW_INTERVAL) {
801c8ca: 6afb ldr r3, [r7, #44] @ 0x2c
801c8cc: f8d3 1094 ldr.w r1, [r3, #148] @ 0x94
801c8d0: 4b8c ldr r3, [pc, #560] @ (801cb04 <tcp_slowtmr+0x588>)
801c8d2: 440b add r3, r1
801c8d4: 498c ldr r1, [pc, #560] @ (801cb08 <tcp_slowtmr+0x58c>)
801c8d6: fba1 1303 umull r1, r3, r1, r3
801c8da: 095b lsrs r3, r3, #5
if ((u32_t)(tcp_ticks - pcb->tmr) >
801c8dc: 429a cmp r2, r3
801c8de: d90a bls.n 801c8f6 <tcp_slowtmr+0x37a>
++pcb_remove;
801c8e0: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801c8e4: 3301 adds r3, #1
801c8e6: f887 3027 strb.w r3, [r7, #39] @ 0x27
++pcb_reset;
801c8ea: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
801c8ee: 3301 adds r3, #1
801c8f0: f887 3026 strb.w r3, [r7, #38] @ 0x26
801c8f4: e027 b.n 801c946 <tcp_slowtmr+0x3ca>
} else if ((u32_t)(tcp_ticks - pcb->tmr) >
801c8f6: 4b82 ldr r3, [pc, #520] @ (801cb00 <tcp_slowtmr+0x584>)
801c8f8: 681a ldr r2, [r3, #0]
801c8fa: 6afb ldr r3, [r7, #44] @ 0x2c
801c8fc: 6a1b ldr r3, [r3, #32]
801c8fe: 1ad2 subs r2, r2, r3
(pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEP_INTVL(pcb))
801c900: 6afb ldr r3, [r7, #44] @ 0x2c
801c902: f8d3 1094 ldr.w r1, [r3, #148] @ 0x94
801c906: 6afb ldr r3, [r7, #44] @ 0x2c
801c908: f893 309b ldrb.w r3, [r3, #155] @ 0x9b
801c90c: 4618 mov r0, r3
801c90e: 4b7f ldr r3, [pc, #508] @ (801cb0c <tcp_slowtmr+0x590>)
801c910: fb00 f303 mul.w r3, r0, r3
801c914: 440b add r3, r1
/ TCP_SLOW_INTERVAL) {
801c916: 497c ldr r1, [pc, #496] @ (801cb08 <tcp_slowtmr+0x58c>)
801c918: fba1 1303 umull r1, r3, r1, r3
801c91c: 095b lsrs r3, r3, #5
} else if ((u32_t)(tcp_ticks - pcb->tmr) >
801c91e: 429a cmp r2, r3
801c920: d911 bls.n 801c946 <tcp_slowtmr+0x3ca>
err = tcp_keepalive(pcb);
801c922: 6af8 ldr r0, [r7, #44] @ 0x2c
801c924: f005 f86c bl 8021a00 <tcp_keepalive>
801c928: 4603 mov r3, r0
801c92a: f887 3025 strb.w r3, [r7, #37] @ 0x25
if (err == ERR_OK) {
801c92e: f997 3025 ldrsb.w r3, [r7, #37] @ 0x25
801c932: 2b00 cmp r3, #0
801c934: d107 bne.n 801c946 <tcp_slowtmr+0x3ca>
pcb->keep_cnt_sent++;
801c936: 6afb ldr r3, [r7, #44] @ 0x2c
801c938: f893 309b ldrb.w r3, [r3, #155] @ 0x9b
801c93c: 3301 adds r3, #1
801c93e: b2da uxtb r2, r3
801c940: 6afb ldr r3, [r7, #44] @ 0x2c
801c942: f883 209b strb.w r2, [r3, #155] @ 0x9b
if (pcb->ooseq != NULL &&
801c946: 6afb ldr r3, [r7, #44] @ 0x2c
801c948: 6f5b ldr r3, [r3, #116] @ 0x74
801c94a: 2b00 cmp r3, #0
801c94c: d011 beq.n 801c972 <tcp_slowtmr+0x3f6>
(tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) {
801c94e: 4b6c ldr r3, [pc, #432] @ (801cb00 <tcp_slowtmr+0x584>)
801c950: 681a ldr r2, [r3, #0]
801c952: 6afb ldr r3, [r7, #44] @ 0x2c
801c954: 6a1b ldr r3, [r3, #32]
801c956: 1ad2 subs r2, r2, r3
801c958: 6afb ldr r3, [r7, #44] @ 0x2c
801c95a: f9b3 3040 ldrsh.w r3, [r3, #64] @ 0x40
801c95e: 4619 mov r1, r3
801c960: 460b mov r3, r1
801c962: 005b lsls r3, r3, #1
801c964: 440b add r3, r1
801c966: 005b lsls r3, r3, #1
if (pcb->ooseq != NULL &&
801c968: 429a cmp r2, r3
801c96a: d302 bcc.n 801c972 <tcp_slowtmr+0x3f6>
tcp_free_ooseq(pcb);
801c96c: 6af8 ldr r0, [r7, #44] @ 0x2c
801c96e: f000 feb7 bl 801d6e0 <tcp_free_ooseq>
if (pcb->state == SYN_RCVD) {
801c972: 6afb ldr r3, [r7, #44] @ 0x2c
801c974: 7d1b ldrb r3, [r3, #20]
801c976: 2b03 cmp r3, #3
801c978: d10b bne.n 801c992 <tcp_slowtmr+0x416>
if ((u32_t)(tcp_ticks - pcb->tmr) >
801c97a: 4b61 ldr r3, [pc, #388] @ (801cb00 <tcp_slowtmr+0x584>)
801c97c: 681a ldr r2, [r3, #0]
801c97e: 6afb ldr r3, [r7, #44] @ 0x2c
801c980: 6a1b ldr r3, [r3, #32]
801c982: 1ad3 subs r3, r2, r3
801c984: 2b28 cmp r3, #40 @ 0x28
801c986: d904 bls.n 801c992 <tcp_slowtmr+0x416>
++pcb_remove;
801c988: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801c98c: 3301 adds r3, #1
801c98e: f887 3027 strb.w r3, [r7, #39] @ 0x27
if (pcb->state == LAST_ACK) {
801c992: 6afb ldr r3, [r7, #44] @ 0x2c
801c994: 7d1b ldrb r3, [r3, #20]
801c996: 2b09 cmp r3, #9
801c998: d10b bne.n 801c9b2 <tcp_slowtmr+0x436>
if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
801c99a: 4b59 ldr r3, [pc, #356] @ (801cb00 <tcp_slowtmr+0x584>)
801c99c: 681a ldr r2, [r3, #0]
801c99e: 6afb ldr r3, [r7, #44] @ 0x2c
801c9a0: 6a1b ldr r3, [r3, #32]
801c9a2: 1ad3 subs r3, r2, r3
801c9a4: 2bf0 cmp r3, #240 @ 0xf0
801c9a6: d904 bls.n 801c9b2 <tcp_slowtmr+0x436>
++pcb_remove;
801c9a8: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801c9ac: 3301 adds r3, #1
801c9ae: f887 3027 strb.w r3, [r7, #39] @ 0x27
if (pcb_remove) {
801c9b2: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801c9b6: 2b00 cmp r3, #0
801c9b8: d060 beq.n 801ca7c <tcp_slowtmr+0x500>
tcp_err_fn err_fn = pcb->errf;
801c9ba: 6afb ldr r3, [r7, #44] @ 0x2c
801c9bc: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
801c9c0: 60fb str r3, [r7, #12]
tcp_pcb_purge(pcb);
801c9c2: 6af8 ldr r0, [r7, #44] @ 0x2c
801c9c4: f000 fcd8 bl 801d378 <tcp_pcb_purge>
if (prev != NULL) {
801c9c8: 6abb ldr r3, [r7, #40] @ 0x28
801c9ca: 2b00 cmp r3, #0
801c9cc: d010 beq.n 801c9f0 <tcp_slowtmr+0x474>
LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs);
801c9ce: 4b50 ldr r3, [pc, #320] @ (801cb10 <tcp_slowtmr+0x594>)
801c9d0: 681b ldr r3, [r3, #0]
801c9d2: 6afa ldr r2, [r7, #44] @ 0x2c
801c9d4: 429a cmp r2, r3
801c9d6: d106 bne.n 801c9e6 <tcp_slowtmr+0x46a>
801c9d8: 4b4e ldr r3, [pc, #312] @ (801cb14 <tcp_slowtmr+0x598>)
801c9da: f240 526d movw r2, #1389 @ 0x56d
801c9de: 494e ldr r1, [pc, #312] @ (801cb18 <tcp_slowtmr+0x59c>)
801c9e0: 484e ldr r0, [pc, #312] @ (801cb1c <tcp_slowtmr+0x5a0>)
801c9e2: f00e f823 bl 802aa2c <iprintf>
prev->next = pcb->next;
801c9e6: 6afb ldr r3, [r7, #44] @ 0x2c
801c9e8: 68da ldr r2, [r3, #12]
801c9ea: 6abb ldr r3, [r7, #40] @ 0x28
801c9ec: 60da str r2, [r3, #12]
801c9ee: e00f b.n 801ca10 <tcp_slowtmr+0x494>
LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb);
801c9f0: 4b47 ldr r3, [pc, #284] @ (801cb10 <tcp_slowtmr+0x594>)
801c9f2: 681b ldr r3, [r3, #0]
801c9f4: 6afa ldr r2, [r7, #44] @ 0x2c
801c9f6: 429a cmp r2, r3
801c9f8: d006 beq.n 801ca08 <tcp_slowtmr+0x48c>
801c9fa: 4b46 ldr r3, [pc, #280] @ (801cb14 <tcp_slowtmr+0x598>)
801c9fc: f240 5271 movw r2, #1393 @ 0x571
801ca00: 4947 ldr r1, [pc, #284] @ (801cb20 <tcp_slowtmr+0x5a4>)
801ca02: 4846 ldr r0, [pc, #280] @ (801cb1c <tcp_slowtmr+0x5a0>)
801ca04: f00e f812 bl 802aa2c <iprintf>
tcp_active_pcbs = pcb->next;
801ca08: 6afb ldr r3, [r7, #44] @ 0x2c
801ca0a: 68db ldr r3, [r3, #12]
801ca0c: 4a40 ldr r2, [pc, #256] @ (801cb10 <tcp_slowtmr+0x594>)
801ca0e: 6013 str r3, [r2, #0]
if (pcb_reset) {
801ca10: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
801ca14: 2b00 cmp r3, #0
801ca16: d013 beq.n 801ca40 <tcp_slowtmr+0x4c4>
tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
801ca18: 6afb ldr r3, [r7, #44] @ 0x2c
801ca1a: 6d18 ldr r0, [r3, #80] @ 0x50
801ca1c: 6afb ldr r3, [r7, #44] @ 0x2c
801ca1e: 6a5c ldr r4, [r3, #36] @ 0x24
801ca20: 6afd ldr r5, [r7, #44] @ 0x2c
801ca22: 6afb ldr r3, [r7, #44] @ 0x2c
801ca24: 3304 adds r3, #4
801ca26: 6afa ldr r2, [r7, #44] @ 0x2c
801ca28: 8ad2 ldrh r2, [r2, #22]
801ca2a: 6af9 ldr r1, [r7, #44] @ 0x2c
801ca2c: 8b09 ldrh r1, [r1, #24]
801ca2e: 9102 str r1, [sp, #8]
801ca30: 9201 str r2, [sp, #4]
801ca32: 9300 str r3, [sp, #0]
801ca34: 462b mov r3, r5
801ca36: 4622 mov r2, r4
801ca38: 4601 mov r1, r0
801ca3a: 6af8 ldr r0, [r7, #44] @ 0x2c
801ca3c: f004 ff2c bl 8021898 <tcp_rst>
err_arg = pcb->callback_arg;
801ca40: 6afb ldr r3, [r7, #44] @ 0x2c
801ca42: 691b ldr r3, [r3, #16]
801ca44: 60bb str r3, [r7, #8]
last_state = pcb->state;
801ca46: 6afb ldr r3, [r7, #44] @ 0x2c
801ca48: 7d1b ldrb r3, [r3, #20]
801ca4a: 71fb strb r3, [r7, #7]
pcb2 = pcb;
801ca4c: 6afb ldr r3, [r7, #44] @ 0x2c
801ca4e: 603b str r3, [r7, #0]
pcb = pcb->next;
801ca50: 6afb ldr r3, [r7, #44] @ 0x2c
801ca52: 68db ldr r3, [r3, #12]
801ca54: 62fb str r3, [r7, #44] @ 0x2c
tcp_free(pcb2);
801ca56: 6838 ldr r0, [r7, #0]
801ca58: f7ff f82c bl 801bab4 <tcp_free>
tcp_active_pcbs_changed = 0;
801ca5c: 4b31 ldr r3, [pc, #196] @ (801cb24 <tcp_slowtmr+0x5a8>)
801ca5e: 2200 movs r2, #0
801ca60: 701a strb r2, [r3, #0]
TCP_EVENT_ERR(last_state, err_fn, err_arg, ERR_ABRT);
801ca62: 68fb ldr r3, [r7, #12]
801ca64: 2b00 cmp r3, #0
801ca66: d004 beq.n 801ca72 <tcp_slowtmr+0x4f6>
801ca68: 68fb ldr r3, [r7, #12]
801ca6a: f06f 010c mvn.w r1, #12
801ca6e: 68b8 ldr r0, [r7, #8]
801ca70: 4798 blx r3
if (tcp_active_pcbs_changed) {
801ca72: 4b2c ldr r3, [pc, #176] @ (801cb24 <tcp_slowtmr+0x5a8>)
801ca74: 781b ldrb r3, [r3, #0]
801ca76: 2b00 cmp r3, #0
801ca78: d037 beq.n 801caea <tcp_slowtmr+0x56e>
goto tcp_slowtmr_start;
801ca7a: e592 b.n 801c5a2 <tcp_slowtmr+0x26>
prev = pcb;
801ca7c: 6afb ldr r3, [r7, #44] @ 0x2c
801ca7e: 62bb str r3, [r7, #40] @ 0x28
pcb = pcb->next;
801ca80: 6afb ldr r3, [r7, #44] @ 0x2c
801ca82: 68db ldr r3, [r3, #12]
801ca84: 62fb str r3, [r7, #44] @ 0x2c
++prev->polltmr;
801ca86: 6abb ldr r3, [r7, #40] @ 0x28
801ca88: 7f1b ldrb r3, [r3, #28]
801ca8a: 3301 adds r3, #1
801ca8c: b2da uxtb r2, r3
801ca8e: 6abb ldr r3, [r7, #40] @ 0x28
801ca90: 771a strb r2, [r3, #28]
if (prev->polltmr >= prev->pollinterval) {
801ca92: 6abb ldr r3, [r7, #40] @ 0x28
801ca94: 7f1a ldrb r2, [r3, #28]
801ca96: 6abb ldr r3, [r7, #40] @ 0x28
801ca98: 7f5b ldrb r3, [r3, #29]
801ca9a: 429a cmp r2, r3
801ca9c: d325 bcc.n 801caea <tcp_slowtmr+0x56e>
prev->polltmr = 0;
801ca9e: 6abb ldr r3, [r7, #40] @ 0x28
801caa0: 2200 movs r2, #0
801caa2: 771a strb r2, [r3, #28]
tcp_active_pcbs_changed = 0;
801caa4: 4b1f ldr r3, [pc, #124] @ (801cb24 <tcp_slowtmr+0x5a8>)
801caa6: 2200 movs r2, #0
801caa8: 701a strb r2, [r3, #0]
TCP_EVENT_POLL(prev, err);
801caaa: 6abb ldr r3, [r7, #40] @ 0x28
801caac: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
801cab0: 2b00 cmp r3, #0
801cab2: d00b beq.n 801cacc <tcp_slowtmr+0x550>
801cab4: 6abb ldr r3, [r7, #40] @ 0x28
801cab6: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
801caba: 6aba ldr r2, [r7, #40] @ 0x28
801cabc: 6912 ldr r2, [r2, #16]
801cabe: 6ab9 ldr r1, [r7, #40] @ 0x28
801cac0: 4610 mov r0, r2
801cac2: 4798 blx r3
801cac4: 4603 mov r3, r0
801cac6: f887 3025 strb.w r3, [r7, #37] @ 0x25
801caca: e002 b.n 801cad2 <tcp_slowtmr+0x556>
801cacc: 2300 movs r3, #0
801cace: f887 3025 strb.w r3, [r7, #37] @ 0x25
if (tcp_active_pcbs_changed) {
801cad2: 4b14 ldr r3, [pc, #80] @ (801cb24 <tcp_slowtmr+0x5a8>)
801cad4: 781b ldrb r3, [r3, #0]
801cad6: 2b00 cmp r3, #0
801cad8: f47f ad62 bne.w 801c5a0 <tcp_slowtmr+0x24>
}
/* if err == ERR_ABRT, 'prev' is already deallocated */
if (err == ERR_OK) {
801cadc: f997 3025 ldrsb.w r3, [r7, #37] @ 0x25
801cae0: 2b00 cmp r3, #0
801cae2: d102 bne.n 801caea <tcp_slowtmr+0x56e>
tcp_output(prev);
801cae4: 6ab8 ldr r0, [r7, #40] @ 0x28
801cae6: f004 f915 bl 8020d14 <tcp_output>
while (pcb != NULL) {
801caea: 6afb ldr r3, [r7, #44] @ 0x2c
801caec: 2b00 cmp r3, #0
801caee: f47f ad5e bne.w 801c5ae <tcp_slowtmr+0x32>
}
}
/* Steps through all of the TIME-WAIT PCBs. */
prev = NULL;
801caf2: 2300 movs r3, #0
801caf4: 62bb str r3, [r7, #40] @ 0x28
pcb = tcp_tw_pcbs;
801caf6: 4b0c ldr r3, [pc, #48] @ (801cb28 <tcp_slowtmr+0x5ac>)
801caf8: 681b ldr r3, [r3, #0]
801cafa: 62fb str r3, [r7, #44] @ 0x2c
while (pcb != NULL) {
801cafc: e069 b.n 801cbd2 <tcp_slowtmr+0x656>
801cafe: bf00 nop
801cb00: 2402afa8 .word 0x2402afa8
801cb04: 000a4cb8 .word 0x000a4cb8
801cb08: 10624dd3 .word 0x10624dd3
801cb0c: 000124f8 .word 0x000124f8
801cb10: 2402afb4 .word 0x2402afb4
801cb14: 0802f7f0 .word 0x0802f7f0
801cb18: 0802fc28 .word 0x0802fc28
801cb1c: 0802f834 .word 0x0802f834
801cb20: 0802fc54 .word 0x0802fc54
801cb24: 2402afbc .word 0x2402afbc
801cb28: 2402afb8 .word 0x2402afb8
LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
801cb2c: 6afb ldr r3, [r7, #44] @ 0x2c
801cb2e: 7d1b ldrb r3, [r3, #20]
801cb30: 2b0a cmp r3, #10
801cb32: d006 beq.n 801cb42 <tcp_slowtmr+0x5c6>
801cb34: 4b2b ldr r3, [pc, #172] @ (801cbe4 <tcp_slowtmr+0x668>)
801cb36: f240 52a1 movw r2, #1441 @ 0x5a1
801cb3a: 492b ldr r1, [pc, #172] @ (801cbe8 <tcp_slowtmr+0x66c>)
801cb3c: 482b ldr r0, [pc, #172] @ (801cbec <tcp_slowtmr+0x670>)
801cb3e: f00d ff75 bl 802aa2c <iprintf>
pcb_remove = 0;
801cb42: 2300 movs r3, #0
801cb44: f887 3027 strb.w r3, [r7, #39] @ 0x27
/* Check if this PCB has stayed long enough in TIME-WAIT */
if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
801cb48: 4b29 ldr r3, [pc, #164] @ (801cbf0 <tcp_slowtmr+0x674>)
801cb4a: 681a ldr r2, [r3, #0]
801cb4c: 6afb ldr r3, [r7, #44] @ 0x2c
801cb4e: 6a1b ldr r3, [r3, #32]
801cb50: 1ad3 subs r3, r2, r3
801cb52: 2bf0 cmp r3, #240 @ 0xf0
801cb54: d904 bls.n 801cb60 <tcp_slowtmr+0x5e4>
++pcb_remove;
801cb56: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801cb5a: 3301 adds r3, #1
801cb5c: f887 3027 strb.w r3, [r7, #39] @ 0x27
}
/* If the PCB should be removed, do it. */
if (pcb_remove) {
801cb60: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
801cb64: 2b00 cmp r3, #0
801cb66: d02f beq.n 801cbc8 <tcp_slowtmr+0x64c>
struct tcp_pcb *pcb2;
tcp_pcb_purge(pcb);
801cb68: 6af8 ldr r0, [r7, #44] @ 0x2c
801cb6a: f000 fc05 bl 801d378 <tcp_pcb_purge>
/* Remove PCB from tcp_tw_pcbs list. */
if (prev != NULL) {
801cb6e: 6abb ldr r3, [r7, #40] @ 0x28
801cb70: 2b00 cmp r3, #0
801cb72: d010 beq.n 801cb96 <tcp_slowtmr+0x61a>
LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs);
801cb74: 4b1f ldr r3, [pc, #124] @ (801cbf4 <tcp_slowtmr+0x678>)
801cb76: 681b ldr r3, [r3, #0]
801cb78: 6afa ldr r2, [r7, #44] @ 0x2c
801cb7a: 429a cmp r2, r3
801cb7c: d106 bne.n 801cb8c <tcp_slowtmr+0x610>
801cb7e: 4b19 ldr r3, [pc, #100] @ (801cbe4 <tcp_slowtmr+0x668>)
801cb80: f240 52af movw r2, #1455 @ 0x5af
801cb84: 491c ldr r1, [pc, #112] @ (801cbf8 <tcp_slowtmr+0x67c>)
801cb86: 4819 ldr r0, [pc, #100] @ (801cbec <tcp_slowtmr+0x670>)
801cb88: f00d ff50 bl 802aa2c <iprintf>
prev->next = pcb->next;
801cb8c: 6afb ldr r3, [r7, #44] @ 0x2c
801cb8e: 68da ldr r2, [r3, #12]
801cb90: 6abb ldr r3, [r7, #40] @ 0x28
801cb92: 60da str r2, [r3, #12]
801cb94: e00f b.n 801cbb6 <tcp_slowtmr+0x63a>
} else {
/* This PCB was the first. */
LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb);
801cb96: 4b17 ldr r3, [pc, #92] @ (801cbf4 <tcp_slowtmr+0x678>)
801cb98: 681b ldr r3, [r3, #0]
801cb9a: 6afa ldr r2, [r7, #44] @ 0x2c
801cb9c: 429a cmp r2, r3
801cb9e: d006 beq.n 801cbae <tcp_slowtmr+0x632>
801cba0: 4b10 ldr r3, [pc, #64] @ (801cbe4 <tcp_slowtmr+0x668>)
801cba2: f240 52b3 movw r2, #1459 @ 0x5b3
801cba6: 4915 ldr r1, [pc, #84] @ (801cbfc <tcp_slowtmr+0x680>)
801cba8: 4810 ldr r0, [pc, #64] @ (801cbec <tcp_slowtmr+0x670>)
801cbaa: f00d ff3f bl 802aa2c <iprintf>
tcp_tw_pcbs = pcb->next;
801cbae: 6afb ldr r3, [r7, #44] @ 0x2c
801cbb0: 68db ldr r3, [r3, #12]
801cbb2: 4a10 ldr r2, [pc, #64] @ (801cbf4 <tcp_slowtmr+0x678>)
801cbb4: 6013 str r3, [r2, #0]
}
pcb2 = pcb;
801cbb6: 6afb ldr r3, [r7, #44] @ 0x2c
801cbb8: 61fb str r3, [r7, #28]
pcb = pcb->next;
801cbba: 6afb ldr r3, [r7, #44] @ 0x2c
801cbbc: 68db ldr r3, [r3, #12]
801cbbe: 62fb str r3, [r7, #44] @ 0x2c
tcp_free(pcb2);
801cbc0: 69f8 ldr r0, [r7, #28]
801cbc2: f7fe ff77 bl 801bab4 <tcp_free>
801cbc6: e004 b.n 801cbd2 <tcp_slowtmr+0x656>
} else {
prev = pcb;
801cbc8: 6afb ldr r3, [r7, #44] @ 0x2c
801cbca: 62bb str r3, [r7, #40] @ 0x28
pcb = pcb->next;
801cbcc: 6afb ldr r3, [r7, #44] @ 0x2c
801cbce: 68db ldr r3, [r3, #12]
801cbd0: 62fb str r3, [r7, #44] @ 0x2c
while (pcb != NULL) {
801cbd2: 6afb ldr r3, [r7, #44] @ 0x2c
801cbd4: 2b00 cmp r3, #0
801cbd6: d1a9 bne.n 801cb2c <tcp_slowtmr+0x5b0>
}
}
}
801cbd8: bf00 nop
801cbda: bf00 nop
801cbdc: 3730 adds r7, #48 @ 0x30
801cbde: 46bd mov sp, r7
801cbe0: bdb0 pop {r4, r5, r7, pc}
801cbe2: bf00 nop
801cbe4: 0802f7f0 .word 0x0802f7f0
801cbe8: 0802fc80 .word 0x0802fc80
801cbec: 0802f834 .word 0x0802f834
801cbf0: 2402afa8 .word 0x2402afa8
801cbf4: 2402afb8 .word 0x2402afb8
801cbf8: 0802fcb0 .word 0x0802fcb0
801cbfc: 0802fcd8 .word 0x0802fcd8
0801cc00 <tcp_fasttmr>:
*
* Automatically called from tcp_tmr().
*/
void
tcp_fasttmr(void)
{
801cc00: b580 push {r7, lr}
801cc02: b082 sub sp, #8
801cc04: af00 add r7, sp, #0
struct tcp_pcb *pcb;
++tcp_timer_ctr;
801cc06: 4b2d ldr r3, [pc, #180] @ (801ccbc <tcp_fasttmr+0xbc>)
801cc08: 781b ldrb r3, [r3, #0]
801cc0a: 3301 adds r3, #1
801cc0c: b2da uxtb r2, r3
801cc0e: 4b2b ldr r3, [pc, #172] @ (801ccbc <tcp_fasttmr+0xbc>)
801cc10: 701a strb r2, [r3, #0]
tcp_fasttmr_start:
pcb = tcp_active_pcbs;
801cc12: 4b2b ldr r3, [pc, #172] @ (801ccc0 <tcp_fasttmr+0xc0>)
801cc14: 681b ldr r3, [r3, #0]
801cc16: 607b str r3, [r7, #4]
while (pcb != NULL) {
801cc18: e048 b.n 801ccac <tcp_fasttmr+0xac>
if (pcb->last_timer != tcp_timer_ctr) {
801cc1a: 687b ldr r3, [r7, #4]
801cc1c: 7f9a ldrb r2, [r3, #30]
801cc1e: 4b27 ldr r3, [pc, #156] @ (801ccbc <tcp_fasttmr+0xbc>)
801cc20: 781b ldrb r3, [r3, #0]
801cc22: 429a cmp r2, r3
801cc24: d03f beq.n 801cca6 <tcp_fasttmr+0xa6>
struct tcp_pcb *next;
pcb->last_timer = tcp_timer_ctr;
801cc26: 4b25 ldr r3, [pc, #148] @ (801ccbc <tcp_fasttmr+0xbc>)
801cc28: 781a ldrb r2, [r3, #0]
801cc2a: 687b ldr r3, [r7, #4]
801cc2c: 779a strb r2, [r3, #30]
/* send delayed ACKs */
if (pcb->flags & TF_ACK_DELAY) {
801cc2e: 687b ldr r3, [r7, #4]
801cc30: 8b5b ldrh r3, [r3, #26]
801cc32: f003 0301 and.w r3, r3, #1
801cc36: 2b00 cmp r3, #0
801cc38: d010 beq.n 801cc5c <tcp_fasttmr+0x5c>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n"));
tcp_ack_now(pcb);
801cc3a: 687b ldr r3, [r7, #4]
801cc3c: 8b5b ldrh r3, [r3, #26]
801cc3e: f043 0302 orr.w r3, r3, #2
801cc42: b29a uxth r2, r3
801cc44: 687b ldr r3, [r7, #4]
801cc46: 835a strh r2, [r3, #26]
tcp_output(pcb);
801cc48: 6878 ldr r0, [r7, #4]
801cc4a: f004 f863 bl 8020d14 <tcp_output>
tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
801cc4e: 687b ldr r3, [r7, #4]
801cc50: 8b5b ldrh r3, [r3, #26]
801cc52: f023 0303 bic.w r3, r3, #3
801cc56: b29a uxth r2, r3
801cc58: 687b ldr r3, [r7, #4]
801cc5a: 835a strh r2, [r3, #26]
}
/* send pending FIN */
if (pcb->flags & TF_CLOSEPEND) {
801cc5c: 687b ldr r3, [r7, #4]
801cc5e: 8b5b ldrh r3, [r3, #26]
801cc60: f003 0308 and.w r3, r3, #8
801cc64: 2b00 cmp r3, #0
801cc66: d009 beq.n 801cc7c <tcp_fasttmr+0x7c>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: pending FIN\n"));
tcp_clear_flags(pcb, TF_CLOSEPEND);
801cc68: 687b ldr r3, [r7, #4]
801cc6a: 8b5b ldrh r3, [r3, #26]
801cc6c: f023 0308 bic.w r3, r3, #8
801cc70: b29a uxth r2, r3
801cc72: 687b ldr r3, [r7, #4]
801cc74: 835a strh r2, [r3, #26]
tcp_close_shutdown_fin(pcb);
801cc76: 6878 ldr r0, [r7, #4]
801cc78: f7ff f8b0 bl 801bddc <tcp_close_shutdown_fin>
}
next = pcb->next;
801cc7c: 687b ldr r3, [r7, #4]
801cc7e: 68db ldr r3, [r3, #12]
801cc80: 603b str r3, [r7, #0]
/* If there is data which was previously "refused" by upper layer */
if (pcb->refused_data != NULL) {
801cc82: 687b ldr r3, [r7, #4]
801cc84: 6f9b ldr r3, [r3, #120] @ 0x78
801cc86: 2b00 cmp r3, #0
801cc88: d00a beq.n 801cca0 <tcp_fasttmr+0xa0>
tcp_active_pcbs_changed = 0;
801cc8a: 4b0e ldr r3, [pc, #56] @ (801ccc4 <tcp_fasttmr+0xc4>)
801cc8c: 2200 movs r2, #0
801cc8e: 701a strb r2, [r3, #0]
tcp_process_refused_data(pcb);
801cc90: 6878 ldr r0, [r7, #4]
801cc92: f000 f819 bl 801ccc8 <tcp_process_refused_data>
if (tcp_active_pcbs_changed) {
801cc96: 4b0b ldr r3, [pc, #44] @ (801ccc4 <tcp_fasttmr+0xc4>)
801cc98: 781b ldrb r3, [r3, #0]
801cc9a: 2b00 cmp r3, #0
801cc9c: d000 beq.n 801cca0 <tcp_fasttmr+0xa0>
/* application callback has changed the pcb list: restart the loop */
goto tcp_fasttmr_start;
801cc9e: e7b8 b.n 801cc12 <tcp_fasttmr+0x12>
}
}
pcb = next;
801cca0: 683b ldr r3, [r7, #0]
801cca2: 607b str r3, [r7, #4]
801cca4: e002 b.n 801ccac <tcp_fasttmr+0xac>
} else {
pcb = pcb->next;
801cca6: 687b ldr r3, [r7, #4]
801cca8: 68db ldr r3, [r3, #12]
801ccaa: 607b str r3, [r7, #4]
while (pcb != NULL) {
801ccac: 687b ldr r3, [r7, #4]
801ccae: 2b00 cmp r3, #0
801ccb0: d1b3 bne.n 801cc1a <tcp_fasttmr+0x1a>
}
}
}
801ccb2: bf00 nop
801ccb4: bf00 nop
801ccb6: 3708 adds r7, #8
801ccb8: 46bd mov sp, r7
801ccba: bd80 pop {r7, pc}
801ccbc: 2402afbe .word 0x2402afbe
801ccc0: 2402afb4 .word 0x2402afb4
801ccc4: 2402afbc .word 0x2402afbc
0801ccc8 <tcp_process_refused_data>:
}
/** Pass pcb->refused_data to the recv callback */
err_t
tcp_process_refused_data(struct tcp_pcb *pcb)
{
801ccc8: b590 push {r4, r7, lr}
801ccca: b085 sub sp, #20
801cccc: af00 add r7, sp, #0
801ccce: 6078 str r0, [r7, #4]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
struct pbuf *rest;
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
LWIP_ERROR("tcp_process_refused_data: invalid pcb", pcb != NULL, return ERR_ARG);
801ccd0: 687b ldr r3, [r7, #4]
801ccd2: 2b00 cmp r3, #0
801ccd4: d109 bne.n 801ccea <tcp_process_refused_data+0x22>
801ccd6: 4b38 ldr r3, [pc, #224] @ (801cdb8 <tcp_process_refused_data+0xf0>)
801ccd8: f240 6209 movw r2, #1545 @ 0x609
801ccdc: 4937 ldr r1, [pc, #220] @ (801cdbc <tcp_process_refused_data+0xf4>)
801ccde: 4838 ldr r0, [pc, #224] @ (801cdc0 <tcp_process_refused_data+0xf8>)
801cce0: f00d fea4 bl 802aa2c <iprintf>
801cce4: f06f 030f mvn.w r3, #15
801cce8: e061 b.n 801cdae <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
while (pcb->refused_data != NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
{
err_t err;
u8_t refused_flags = pcb->refused_data->flags;
801ccea: 687b ldr r3, [r7, #4]
801ccec: 6f9b ldr r3, [r3, #120] @ 0x78
801ccee: 7b5b ldrb r3, [r3, #13]
801ccf0: 73bb strb r3, [r7, #14]
/* set pcb->refused_data to NULL in case the callback frees it and then
closes the pcb */
struct pbuf *refused_data = pcb->refused_data;
801ccf2: 687b ldr r3, [r7, #4]
801ccf4: 6f9b ldr r3, [r3, #120] @ 0x78
801ccf6: 60bb str r3, [r7, #8]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
pbuf_split_64k(refused_data, &rest);
pcb->refused_data = rest;
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
pcb->refused_data = NULL;
801ccf8: 687b ldr r3, [r7, #4]
801ccfa: 2200 movs r2, #0
801ccfc: 679a str r2, [r3, #120] @ 0x78
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
/* Notify again application with data previously received. */
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n"));
TCP_EVENT_RECV(pcb, refused_data, ERR_OK, err);
801ccfe: 687b ldr r3, [r7, #4]
801cd00: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
801cd04: 2b00 cmp r3, #0
801cd06: d00b beq.n 801cd20 <tcp_process_refused_data+0x58>
801cd08: 687b ldr r3, [r7, #4]
801cd0a: f8d3 4084 ldr.w r4, [r3, #132] @ 0x84
801cd0e: 687b ldr r3, [r7, #4]
801cd10: 6918 ldr r0, [r3, #16]
801cd12: 2300 movs r3, #0
801cd14: 68ba ldr r2, [r7, #8]
801cd16: 6879 ldr r1, [r7, #4]
801cd18: 47a0 blx r4
801cd1a: 4603 mov r3, r0
801cd1c: 73fb strb r3, [r7, #15]
801cd1e: e007 b.n 801cd30 <tcp_process_refused_data+0x68>
801cd20: 2300 movs r3, #0
801cd22: 68ba ldr r2, [r7, #8]
801cd24: 6879 ldr r1, [r7, #4]
801cd26: 2000 movs r0, #0
801cd28: f000 f8a6 bl 801ce78 <tcp_recv_null>
801cd2c: 4603 mov r3, r0
801cd2e: 73fb strb r3, [r7, #15]
if (err == ERR_OK) {
801cd30: f997 300f ldrsb.w r3, [r7, #15]
801cd34: 2b00 cmp r3, #0
801cd36: d12b bne.n 801cd90 <tcp_process_refused_data+0xc8>
/* did refused_data include a FIN? */
if ((refused_flags & PBUF_FLAG_TCP_FIN)
801cd38: 7bbb ldrb r3, [r7, #14]
801cd3a: f003 0320 and.w r3, r3, #32
801cd3e: 2b00 cmp r3, #0
801cd40: d034 beq.n 801cdac <tcp_process_refused_data+0xe4>
&& (rest == NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
) {
/* correct rcv_wnd as the application won't call tcp_recved()
for the FIN's seqno */
if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
801cd42: 687b ldr r3, [r7, #4]
801cd44: 8d1b ldrh r3, [r3, #40] @ 0x28
801cd46: f241 62d0 movw r2, #5840 @ 0x16d0
801cd4a: 4293 cmp r3, r2
801cd4c: d005 beq.n 801cd5a <tcp_process_refused_data+0x92>
pcb->rcv_wnd++;
801cd4e: 687b ldr r3, [r7, #4]
801cd50: 8d1b ldrh r3, [r3, #40] @ 0x28
801cd52: 3301 adds r3, #1
801cd54: b29a uxth r2, r3
801cd56: 687b ldr r3, [r7, #4]
801cd58: 851a strh r2, [r3, #40] @ 0x28
}
TCP_EVENT_CLOSED(pcb, err);
801cd5a: 687b ldr r3, [r7, #4]
801cd5c: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
801cd60: 2b00 cmp r3, #0
801cd62: d00b beq.n 801cd7c <tcp_process_refused_data+0xb4>
801cd64: 687b ldr r3, [r7, #4]
801cd66: f8d3 4084 ldr.w r4, [r3, #132] @ 0x84
801cd6a: 687b ldr r3, [r7, #4]
801cd6c: 6918 ldr r0, [r3, #16]
801cd6e: 2300 movs r3, #0
801cd70: 2200 movs r2, #0
801cd72: 6879 ldr r1, [r7, #4]
801cd74: 47a0 blx r4
801cd76: 4603 mov r3, r0
801cd78: 73fb strb r3, [r7, #15]
801cd7a: e001 b.n 801cd80 <tcp_process_refused_data+0xb8>
801cd7c: 2300 movs r3, #0
801cd7e: 73fb strb r3, [r7, #15]
if (err == ERR_ABRT) {
801cd80: f997 300f ldrsb.w r3, [r7, #15]
801cd84: f113 0f0d cmn.w r3, #13
801cd88: d110 bne.n 801cdac <tcp_process_refused_data+0xe4>
return ERR_ABRT;
801cd8a: f06f 030c mvn.w r3, #12
801cd8e: e00e b.n 801cdae <tcp_process_refused_data+0xe6>
}
}
} else if (err == ERR_ABRT) {
801cd90: f997 300f ldrsb.w r3, [r7, #15]
801cd94: f113 0f0d cmn.w r3, #13
801cd98: d102 bne.n 801cda0 <tcp_process_refused_data+0xd8>
/* if err == ERR_ABRT, 'pcb' is already deallocated */
/* Drop incoming packets because pcb is "full" (only if the incoming
segment contains data). */
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n"));
return ERR_ABRT;
801cd9a: f06f 030c mvn.w r3, #12
801cd9e: e006 b.n 801cdae <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
if (rest != NULL) {
pbuf_cat(refused_data, rest);
}
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
pcb->refused_data = refused_data;
801cda0: 687b ldr r3, [r7, #4]
801cda2: 68ba ldr r2, [r7, #8]
801cda4: 679a str r2, [r3, #120] @ 0x78
return ERR_INPROGRESS;
801cda6: f06f 0304 mvn.w r3, #4
801cdaa: e000 b.n 801cdae <tcp_process_refused_data+0xe6>
}
}
return ERR_OK;
801cdac: 2300 movs r3, #0
}
801cdae: 4618 mov r0, r3
801cdb0: 3714 adds r7, #20
801cdb2: 46bd mov sp, r7
801cdb4: bd90 pop {r4, r7, pc}
801cdb6: bf00 nop
801cdb8: 0802f7f0 .word 0x0802f7f0
801cdbc: 0802fd00 .word 0x0802fd00
801cdc0: 0802f834 .word 0x0802f834
0801cdc4 <tcp_segs_free>:
*
* @param seg tcp_seg list of TCP segments to free
*/
void
tcp_segs_free(struct tcp_seg *seg)
{
801cdc4: b580 push {r7, lr}
801cdc6: b084 sub sp, #16
801cdc8: af00 add r7, sp, #0
801cdca: 6078 str r0, [r7, #4]
while (seg != NULL) {
801cdcc: e007 b.n 801cdde <tcp_segs_free+0x1a>
struct tcp_seg *next = seg->next;
801cdce: 687b ldr r3, [r7, #4]
801cdd0: 681b ldr r3, [r3, #0]
801cdd2: 60fb str r3, [r7, #12]
tcp_seg_free(seg);
801cdd4: 6878 ldr r0, [r7, #4]
801cdd6: f000 f80a bl 801cdee <tcp_seg_free>
seg = next;
801cdda: 68fb ldr r3, [r7, #12]
801cddc: 607b str r3, [r7, #4]
while (seg != NULL) {
801cdde: 687b ldr r3, [r7, #4]
801cde0: 2b00 cmp r3, #0
801cde2: d1f4 bne.n 801cdce <tcp_segs_free+0xa>
}
}
801cde4: bf00 nop
801cde6: bf00 nop
801cde8: 3710 adds r7, #16
801cdea: 46bd mov sp, r7
801cdec: bd80 pop {r7, pc}
0801cdee <tcp_seg_free>:
*
* @param seg single tcp_seg to free
*/
void
tcp_seg_free(struct tcp_seg *seg)
{
801cdee: b580 push {r7, lr}
801cdf0: b082 sub sp, #8
801cdf2: af00 add r7, sp, #0
801cdf4: 6078 str r0, [r7, #4]
if (seg != NULL) {
801cdf6: 687b ldr r3, [r7, #4]
801cdf8: 2b00 cmp r3, #0
801cdfa: d00c beq.n 801ce16 <tcp_seg_free+0x28>
if (seg->p != NULL) {
801cdfc: 687b ldr r3, [r7, #4]
801cdfe: 685b ldr r3, [r3, #4]
801ce00: 2b00 cmp r3, #0
801ce02: d004 beq.n 801ce0e <tcp_seg_free+0x20>
pbuf_free(seg->p);
801ce04: 687b ldr r3, [r7, #4]
801ce06: 685b ldr r3, [r3, #4]
801ce08: 4618 mov r0, r3
801ce0a: f7fe fb97 bl 801b53c <pbuf_free>
#if TCP_DEBUG
seg->p = NULL;
#endif /* TCP_DEBUG */
}
memp_free(MEMP_TCP_SEG, seg);
801ce0e: 6879 ldr r1, [r7, #4]
801ce10: 2003 movs r0, #3
801ce12: f7fd fca5 bl 801a760 <memp_free>
}
}
801ce16: bf00 nop
801ce18: 3708 adds r7, #8
801ce1a: 46bd mov sp, r7
801ce1c: bd80 pop {r7, pc}
...
0801ce20 <tcp_seg_copy>:
* @param seg the old tcp_seg
* @return a copy of seg
*/
struct tcp_seg *
tcp_seg_copy(struct tcp_seg *seg)
{
801ce20: b580 push {r7, lr}
801ce22: b084 sub sp, #16
801ce24: af00 add r7, sp, #0
801ce26: 6078 str r0, [r7, #4]
struct tcp_seg *cseg;
LWIP_ASSERT("tcp_seg_copy: invalid seg", seg != NULL);
801ce28: 687b ldr r3, [r7, #4]
801ce2a: 2b00 cmp r3, #0
801ce2c: d106 bne.n 801ce3c <tcp_seg_copy+0x1c>
801ce2e: 4b0f ldr r3, [pc, #60] @ (801ce6c <tcp_seg_copy+0x4c>)
801ce30: f240 6282 movw r2, #1666 @ 0x682
801ce34: 490e ldr r1, [pc, #56] @ (801ce70 <tcp_seg_copy+0x50>)
801ce36: 480f ldr r0, [pc, #60] @ (801ce74 <tcp_seg_copy+0x54>)
801ce38: f00d fdf8 bl 802aa2c <iprintf>
cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG);
801ce3c: 2003 movs r0, #3
801ce3e: f7fd fc19 bl 801a674 <memp_malloc>
801ce42: 60f8 str r0, [r7, #12]
if (cseg == NULL) {
801ce44: 68fb ldr r3, [r7, #12]
801ce46: 2b00 cmp r3, #0
801ce48: d101 bne.n 801ce4e <tcp_seg_copy+0x2e>
return NULL;
801ce4a: 2300 movs r3, #0
801ce4c: e00a b.n 801ce64 <tcp_seg_copy+0x44>
}
SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg));
801ce4e: 2214 movs r2, #20
801ce50: 6879 ldr r1, [r7, #4]
801ce52: 68f8 ldr r0, [r7, #12]
801ce54: f00e f873 bl 802af3e <memcpy>
pbuf_ref(cseg->p);
801ce58: 68fb ldr r3, [r7, #12]
801ce5a: 685b ldr r3, [r3, #4]
801ce5c: 4618 mov r0, r3
801ce5e: f7fe fc13 bl 801b688 <pbuf_ref>
return cseg;
801ce62: 68fb ldr r3, [r7, #12]
}
801ce64: 4618 mov r0, r3
801ce66: 3710 adds r7, #16
801ce68: 46bd mov sp, r7
801ce6a: bd80 pop {r7, pc}
801ce6c: 0802f7f0 .word 0x0802f7f0
801ce70: 0802fd44 .word 0x0802fd44
801ce74: 0802f834 .word 0x0802f834
0801ce78 <tcp_recv_null>:
* Default receive callback that is called if the user didn't register
* a recv callback for the pcb.
*/
err_t
tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
801ce78: b580 push {r7, lr}
801ce7a: b084 sub sp, #16
801ce7c: af00 add r7, sp, #0
801ce7e: 60f8 str r0, [r7, #12]
801ce80: 60b9 str r1, [r7, #8]
801ce82: 607a str r2, [r7, #4]
801ce84: 70fb strb r3, [r7, #3]
LWIP_UNUSED_ARG(arg);
LWIP_ERROR("tcp_recv_null: invalid pcb", pcb != NULL, return ERR_ARG);
801ce86: 68bb ldr r3, [r7, #8]
801ce88: 2b00 cmp r3, #0
801ce8a: d109 bne.n 801cea0 <tcp_recv_null+0x28>
801ce8c: 4b12 ldr r3, [pc, #72] @ (801ced8 <tcp_recv_null+0x60>)
801ce8e: f44f 62d3 mov.w r2, #1688 @ 0x698
801ce92: 4912 ldr r1, [pc, #72] @ (801cedc <tcp_recv_null+0x64>)
801ce94: 4812 ldr r0, [pc, #72] @ (801cee0 <tcp_recv_null+0x68>)
801ce96: f00d fdc9 bl 802aa2c <iprintf>
801ce9a: f06f 030f mvn.w r3, #15
801ce9e: e016 b.n 801cece <tcp_recv_null+0x56>
if (p != NULL) {
801cea0: 687b ldr r3, [r7, #4]
801cea2: 2b00 cmp r3, #0
801cea4: d009 beq.n 801ceba <tcp_recv_null+0x42>
tcp_recved(pcb, p->tot_len);
801cea6: 687b ldr r3, [r7, #4]
801cea8: 891b ldrh r3, [r3, #8]
801ceaa: 4619 mov r1, r3
801ceac: 68b8 ldr r0, [r7, #8]
801ceae: f7ff f9b1 bl 801c214 <tcp_recved>
pbuf_free(p);
801ceb2: 6878 ldr r0, [r7, #4]
801ceb4: f7fe fb42 bl 801b53c <pbuf_free>
801ceb8: e008 b.n 801cecc <tcp_recv_null+0x54>
} else if (err == ERR_OK) {
801ceba: f997 3003 ldrsb.w r3, [r7, #3]
801cebe: 2b00 cmp r3, #0
801cec0: d104 bne.n 801cecc <tcp_recv_null+0x54>
return tcp_close(pcb);
801cec2: 68b8 ldr r0, [r7, #8]
801cec4: f7fe fff4 bl 801beb0 <tcp_close>
801cec8: 4603 mov r3, r0
801ceca: e000 b.n 801cece <tcp_recv_null+0x56>
}
return ERR_OK;
801cecc: 2300 movs r3, #0
}
801cece: 4618 mov r0, r3
801ced0: 3710 adds r7, #16
801ced2: 46bd mov sp, r7
801ced4: bd80 pop {r7, pc}
801ced6: bf00 nop
801ced8: 0802f7f0 .word 0x0802f7f0
801cedc: 0802fd60 .word 0x0802fd60
801cee0: 0802f834 .word 0x0802f834
0801cee4 <tcp_kill_prio>:
*
* @param prio minimum priority
*/
static void
tcp_kill_prio(u8_t prio)
{
801cee4: b580 push {r7, lr}
801cee6: b086 sub sp, #24
801cee8: af00 add r7, sp, #0
801ceea: 4603 mov r3, r0
801ceec: 71fb strb r3, [r7, #7]
struct tcp_pcb *pcb, *inactive;
u32_t inactivity;
u8_t mprio;
mprio = LWIP_MIN(TCP_PRIO_MAX, prio);
801ceee: f997 3007 ldrsb.w r3, [r7, #7]
801cef2: 2b00 cmp r3, #0
801cef4: db01 blt.n 801cefa <tcp_kill_prio+0x16>
801cef6: 79fb ldrb r3, [r7, #7]
801cef8: e000 b.n 801cefc <tcp_kill_prio+0x18>
801cefa: 237f movs r3, #127 @ 0x7f
801cefc: 72fb strb r3, [r7, #11]
/* We want to kill connections with a lower prio, so bail out if
* supplied prio is 0 - there can never be a lower prio
*/
if (mprio == 0) {
801cefe: 7afb ldrb r3, [r7, #11]
801cf00: 2b00 cmp r3, #0
801cf02: d034 beq.n 801cf6e <tcp_kill_prio+0x8a>
/* We only want kill connections with a lower prio, so decrement prio by one
* and start searching for oldest connection with same or lower priority than mprio.
* We want to find the connections with the lowest possible prio, and among
* these the one with the longest inactivity time.
*/
mprio--;
801cf04: 7afb ldrb r3, [r7, #11]
801cf06: 3b01 subs r3, #1
801cf08: 72fb strb r3, [r7, #11]
inactivity = 0;
801cf0a: 2300 movs r3, #0
801cf0c: 60fb str r3, [r7, #12]
inactive = NULL;
801cf0e: 2300 movs r3, #0
801cf10: 613b str r3, [r7, #16]
for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
801cf12: 4b19 ldr r3, [pc, #100] @ (801cf78 <tcp_kill_prio+0x94>)
801cf14: 681b ldr r3, [r3, #0]
801cf16: 617b str r3, [r7, #20]
801cf18: e01f b.n 801cf5a <tcp_kill_prio+0x76>
/* lower prio is always a kill candidate */
if ((pcb->prio < mprio) ||
801cf1a: 697b ldr r3, [r7, #20]
801cf1c: 7d5b ldrb r3, [r3, #21]
801cf1e: 7afa ldrb r2, [r7, #11]
801cf20: 429a cmp r2, r3
801cf22: d80c bhi.n 801cf3e <tcp_kill_prio+0x5a>
/* longer inactivity is also a kill candidate */
((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
801cf24: 697b ldr r3, [r7, #20]
801cf26: 7d5b ldrb r3, [r3, #21]
if ((pcb->prio < mprio) ||
801cf28: 7afa ldrb r2, [r7, #11]
801cf2a: 429a cmp r2, r3
801cf2c: d112 bne.n 801cf54 <tcp_kill_prio+0x70>
((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
801cf2e: 4b13 ldr r3, [pc, #76] @ (801cf7c <tcp_kill_prio+0x98>)
801cf30: 681a ldr r2, [r3, #0]
801cf32: 697b ldr r3, [r7, #20]
801cf34: 6a1b ldr r3, [r3, #32]
801cf36: 1ad3 subs r3, r2, r3
801cf38: 68fa ldr r2, [r7, #12]
801cf3a: 429a cmp r2, r3
801cf3c: d80a bhi.n 801cf54 <tcp_kill_prio+0x70>
inactivity = tcp_ticks - pcb->tmr;
801cf3e: 4b0f ldr r3, [pc, #60] @ (801cf7c <tcp_kill_prio+0x98>)
801cf40: 681a ldr r2, [r3, #0]
801cf42: 697b ldr r3, [r7, #20]
801cf44: 6a1b ldr r3, [r3, #32]
801cf46: 1ad3 subs r3, r2, r3
801cf48: 60fb str r3, [r7, #12]
inactive = pcb;
801cf4a: 697b ldr r3, [r7, #20]
801cf4c: 613b str r3, [r7, #16]
mprio = pcb->prio;
801cf4e: 697b ldr r3, [r7, #20]
801cf50: 7d5b ldrb r3, [r3, #21]
801cf52: 72fb strb r3, [r7, #11]
for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
801cf54: 697b ldr r3, [r7, #20]
801cf56: 68db ldr r3, [r3, #12]
801cf58: 617b str r3, [r7, #20]
801cf5a: 697b ldr r3, [r7, #20]
801cf5c: 2b00 cmp r3, #0
801cf5e: d1dc bne.n 801cf1a <tcp_kill_prio+0x36>
}
}
if (inactive != NULL) {
801cf60: 693b ldr r3, [r7, #16]
801cf62: 2b00 cmp r3, #0
801cf64: d004 beq.n 801cf70 <tcp_kill_prio+0x8c>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n",
(void *)inactive, inactivity));
tcp_abort(inactive);
801cf66: 6938 ldr r0, [r7, #16]
801cf68: f7ff f8ee bl 801c148 <tcp_abort>
801cf6c: e000 b.n 801cf70 <tcp_kill_prio+0x8c>
return;
801cf6e: bf00 nop
}
}
801cf70: 3718 adds r7, #24
801cf72: 46bd mov sp, r7
801cf74: bd80 pop {r7, pc}
801cf76: bf00 nop
801cf78: 2402afb4 .word 0x2402afb4
801cf7c: 2402afa8 .word 0x2402afa8
0801cf80 <tcp_kill_state>:
* Kills the oldest connection that is in specific state.
* Called from tcp_alloc() for LAST_ACK and CLOSING if no more connections are available.
*/
static void
tcp_kill_state(enum tcp_state state)
{
801cf80: b580 push {r7, lr}
801cf82: b086 sub sp, #24
801cf84: af00 add r7, sp, #0
801cf86: 4603 mov r3, r0
801cf88: 71fb strb r3, [r7, #7]
struct tcp_pcb *pcb, *inactive;
u32_t inactivity;
LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK));
801cf8a: 79fb ldrb r3, [r7, #7]
801cf8c: 2b08 cmp r3, #8
801cf8e: d009 beq.n 801cfa4 <tcp_kill_state+0x24>
801cf90: 79fb ldrb r3, [r7, #7]
801cf92: 2b09 cmp r3, #9
801cf94: d006 beq.n 801cfa4 <tcp_kill_state+0x24>
801cf96: 4b1a ldr r3, [pc, #104] @ (801d000 <tcp_kill_state+0x80>)
801cf98: f240 62dd movw r2, #1757 @ 0x6dd
801cf9c: 4919 ldr r1, [pc, #100] @ (801d004 <tcp_kill_state+0x84>)
801cf9e: 481a ldr r0, [pc, #104] @ (801d008 <tcp_kill_state+0x88>)
801cfa0: f00d fd44 bl 802aa2c <iprintf>
inactivity = 0;
801cfa4: 2300 movs r3, #0
801cfa6: 60fb str r3, [r7, #12]
inactive = NULL;
801cfa8: 2300 movs r3, #0
801cfaa: 613b str r3, [r7, #16]
/* Go through the list of active pcbs and get the oldest pcb that is in state
CLOSING/LAST_ACK. */
for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
801cfac: 4b17 ldr r3, [pc, #92] @ (801d00c <tcp_kill_state+0x8c>)
801cfae: 681b ldr r3, [r3, #0]
801cfb0: 617b str r3, [r7, #20]
801cfb2: e017 b.n 801cfe4 <tcp_kill_state+0x64>
if (pcb->state == state) {
801cfb4: 697b ldr r3, [r7, #20]
801cfb6: 7d1b ldrb r3, [r3, #20]
801cfb8: 79fa ldrb r2, [r7, #7]
801cfba: 429a cmp r2, r3
801cfbc: d10f bne.n 801cfde <tcp_kill_state+0x5e>
if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
801cfbe: 4b14 ldr r3, [pc, #80] @ (801d010 <tcp_kill_state+0x90>)
801cfc0: 681a ldr r2, [r3, #0]
801cfc2: 697b ldr r3, [r7, #20]
801cfc4: 6a1b ldr r3, [r3, #32]
801cfc6: 1ad3 subs r3, r2, r3
801cfc8: 68fa ldr r2, [r7, #12]
801cfca: 429a cmp r2, r3
801cfcc: d807 bhi.n 801cfde <tcp_kill_state+0x5e>
inactivity = tcp_ticks - pcb->tmr;
801cfce: 4b10 ldr r3, [pc, #64] @ (801d010 <tcp_kill_state+0x90>)
801cfd0: 681a ldr r2, [r3, #0]
801cfd2: 697b ldr r3, [r7, #20]
801cfd4: 6a1b ldr r3, [r3, #32]
801cfd6: 1ad3 subs r3, r2, r3
801cfd8: 60fb str r3, [r7, #12]
inactive = pcb;
801cfda: 697b ldr r3, [r7, #20]
801cfdc: 613b str r3, [r7, #16]
for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
801cfde: 697b ldr r3, [r7, #20]
801cfe0: 68db ldr r3, [r3, #12]
801cfe2: 617b str r3, [r7, #20]
801cfe4: 697b ldr r3, [r7, #20]
801cfe6: 2b00 cmp r3, #0
801cfe8: d1e4 bne.n 801cfb4 <tcp_kill_state+0x34>
}
}
}
if (inactive != NULL) {
801cfea: 693b ldr r3, [r7, #16]
801cfec: 2b00 cmp r3, #0
801cfee: d003 beq.n 801cff8 <tcp_kill_state+0x78>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_closing: killing oldest %s PCB %p (%"S32_F")\n",
tcp_state_str[state], (void *)inactive, inactivity));
/* Don't send a RST, since no data is lost. */
tcp_abandon(inactive, 0);
801cff0: 2100 movs r1, #0
801cff2: 6938 ldr r0, [r7, #16]
801cff4: f7fe ffe8 bl 801bfc8 <tcp_abandon>
}
}
801cff8: bf00 nop
801cffa: 3718 adds r7, #24
801cffc: 46bd mov sp, r7
801cffe: bd80 pop {r7, pc}
801d000: 0802f7f0 .word 0x0802f7f0
801d004: 0802fd7c .word 0x0802fd7c
801d008: 0802f834 .word 0x0802f834
801d00c: 2402afb4 .word 0x2402afb4
801d010: 2402afa8 .word 0x2402afa8
0801d014 <tcp_kill_timewait>:
* Kills the oldest connection that is in TIME_WAIT state.
* Called from tcp_alloc() if no more connections are available.
*/
static void
tcp_kill_timewait(void)
{
801d014: b580 push {r7, lr}
801d016: b084 sub sp, #16
801d018: af00 add r7, sp, #0
struct tcp_pcb *pcb, *inactive;
u32_t inactivity;
inactivity = 0;
801d01a: 2300 movs r3, #0
801d01c: 607b str r3, [r7, #4]
inactive = NULL;
801d01e: 2300 movs r3, #0
801d020: 60bb str r3, [r7, #8]
/* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */
for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
801d022: 4b12 ldr r3, [pc, #72] @ (801d06c <tcp_kill_timewait+0x58>)
801d024: 681b ldr r3, [r3, #0]
801d026: 60fb str r3, [r7, #12]
801d028: e012 b.n 801d050 <tcp_kill_timewait+0x3c>
if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
801d02a: 4b11 ldr r3, [pc, #68] @ (801d070 <tcp_kill_timewait+0x5c>)
801d02c: 681a ldr r2, [r3, #0]
801d02e: 68fb ldr r3, [r7, #12]
801d030: 6a1b ldr r3, [r3, #32]
801d032: 1ad3 subs r3, r2, r3
801d034: 687a ldr r2, [r7, #4]
801d036: 429a cmp r2, r3
801d038: d807 bhi.n 801d04a <tcp_kill_timewait+0x36>
inactivity = tcp_ticks - pcb->tmr;
801d03a: 4b0d ldr r3, [pc, #52] @ (801d070 <tcp_kill_timewait+0x5c>)
801d03c: 681a ldr r2, [r3, #0]
801d03e: 68fb ldr r3, [r7, #12]
801d040: 6a1b ldr r3, [r3, #32]
801d042: 1ad3 subs r3, r2, r3
801d044: 607b str r3, [r7, #4]
inactive = pcb;
801d046: 68fb ldr r3, [r7, #12]
801d048: 60bb str r3, [r7, #8]
for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
801d04a: 68fb ldr r3, [r7, #12]
801d04c: 68db ldr r3, [r3, #12]
801d04e: 60fb str r3, [r7, #12]
801d050: 68fb ldr r3, [r7, #12]
801d052: 2b00 cmp r3, #0
801d054: d1e9 bne.n 801d02a <tcp_kill_timewait+0x16>
}
}
if (inactive != NULL) {
801d056: 68bb ldr r3, [r7, #8]
801d058: 2b00 cmp r3, #0
801d05a: d002 beq.n 801d062 <tcp_kill_timewait+0x4e>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n",
(void *)inactive, inactivity));
tcp_abort(inactive);
801d05c: 68b8 ldr r0, [r7, #8]
801d05e: f7ff f873 bl 801c148 <tcp_abort>
}
}
801d062: bf00 nop
801d064: 3710 adds r7, #16
801d066: 46bd mov sp, r7
801d068: bd80 pop {r7, pc}
801d06a: bf00 nop
801d06c: 2402afb8 .word 0x2402afb8
801d070: 2402afa8 .word 0x2402afa8
0801d074 <tcp_handle_closepend>:
* now send the FIN (which failed before), the pcb might be in a state that is
* OK for us to now free it.
*/
static void
tcp_handle_closepend(void)
{
801d074: b580 push {r7, lr}
801d076: b082 sub sp, #8
801d078: af00 add r7, sp, #0
struct tcp_pcb *pcb = tcp_active_pcbs;
801d07a: 4b10 ldr r3, [pc, #64] @ (801d0bc <tcp_handle_closepend+0x48>)
801d07c: 681b ldr r3, [r3, #0]
801d07e: 607b str r3, [r7, #4]
while (pcb != NULL) {
801d080: e014 b.n 801d0ac <tcp_handle_closepend+0x38>
struct tcp_pcb *next = pcb->next;
801d082: 687b ldr r3, [r7, #4]
801d084: 68db ldr r3, [r3, #12]
801d086: 603b str r3, [r7, #0]
/* send pending FIN */
if (pcb->flags & TF_CLOSEPEND) {
801d088: 687b ldr r3, [r7, #4]
801d08a: 8b5b ldrh r3, [r3, #26]
801d08c: f003 0308 and.w r3, r3, #8
801d090: 2b00 cmp r3, #0
801d092: d009 beq.n 801d0a8 <tcp_handle_closepend+0x34>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_handle_closepend: pending FIN\n"));
tcp_clear_flags(pcb, TF_CLOSEPEND);
801d094: 687b ldr r3, [r7, #4]
801d096: 8b5b ldrh r3, [r3, #26]
801d098: f023 0308 bic.w r3, r3, #8
801d09c: b29a uxth r2, r3
801d09e: 687b ldr r3, [r7, #4]
801d0a0: 835a strh r2, [r3, #26]
tcp_close_shutdown_fin(pcb);
801d0a2: 6878 ldr r0, [r7, #4]
801d0a4: f7fe fe9a bl 801bddc <tcp_close_shutdown_fin>
}
pcb = next;
801d0a8: 683b ldr r3, [r7, #0]
801d0aa: 607b str r3, [r7, #4]
while (pcb != NULL) {
801d0ac: 687b ldr r3, [r7, #4]
801d0ae: 2b00 cmp r3, #0
801d0b0: d1e7 bne.n 801d082 <tcp_handle_closepend+0xe>
}
}
801d0b2: bf00 nop
801d0b4: bf00 nop
801d0b6: 3708 adds r7, #8
801d0b8: 46bd mov sp, r7
801d0ba: bd80 pop {r7, pc}
801d0bc: 2402afb4 .word 0x2402afb4
0801d0c0 <tcp_alloc>:
* @param prio priority for the new pcb
* @return a new tcp_pcb that initially is in state CLOSED
*/
struct tcp_pcb *
tcp_alloc(u8_t prio)
{
801d0c0: b580 push {r7, lr}
801d0c2: b084 sub sp, #16
801d0c4: af00 add r7, sp, #0
801d0c6: 4603 mov r3, r0
801d0c8: 71fb strb r3, [r7, #7]
struct tcp_pcb *pcb;
LWIP_ASSERT_CORE_LOCKED();
801d0ca: f7f4 f883 bl 80111d4 <sys_check_core_locking>
pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
801d0ce: 2001 movs r0, #1
801d0d0: f7fd fad0 bl 801a674 <memp_malloc>
801d0d4: 60f8 str r0, [r7, #12]
if (pcb == NULL) {
801d0d6: 68fb ldr r3, [r7, #12]
801d0d8: 2b00 cmp r3, #0
801d0da: d126 bne.n 801d12a <tcp_alloc+0x6a>
/* Try to send FIN for all pcbs stuck in TF_CLOSEPEND first */
tcp_handle_closepend();
801d0dc: f7ff ffca bl 801d074 <tcp_handle_closepend>
/* Try killing oldest connection in TIME-WAIT. */
LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n"));
tcp_kill_timewait();
801d0e0: f7ff ff98 bl 801d014 <tcp_kill_timewait>
/* Try to allocate a tcp_pcb again. */
pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
801d0e4: 2001 movs r0, #1
801d0e6: f7fd fac5 bl 801a674 <memp_malloc>
801d0ea: 60f8 str r0, [r7, #12]
if (pcb == NULL) {
801d0ec: 68fb ldr r3, [r7, #12]
801d0ee: 2b00 cmp r3, #0
801d0f0: d11b bne.n 801d12a <tcp_alloc+0x6a>
/* Try killing oldest connection in LAST-ACK (these wouldn't go to TIME-WAIT). */
LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest LAST-ACK connection\n"));
tcp_kill_state(LAST_ACK);
801d0f2: 2009 movs r0, #9
801d0f4: f7ff ff44 bl 801cf80 <tcp_kill_state>
/* Try to allocate a tcp_pcb again. */
pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
801d0f8: 2001 movs r0, #1
801d0fa: f7fd fabb bl 801a674 <memp_malloc>
801d0fe: 60f8 str r0, [r7, #12]
if (pcb == NULL) {
801d100: 68fb ldr r3, [r7, #12]
801d102: 2b00 cmp r3, #0
801d104: d111 bne.n 801d12a <tcp_alloc+0x6a>
/* Try killing oldest connection in CLOSING. */
LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest CLOSING connection\n"));
tcp_kill_state(CLOSING);
801d106: 2008 movs r0, #8
801d108: f7ff ff3a bl 801cf80 <tcp_kill_state>
/* Try to allocate a tcp_pcb again. */
pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
801d10c: 2001 movs r0, #1
801d10e: f7fd fab1 bl 801a674 <memp_malloc>
801d112: 60f8 str r0, [r7, #12]
if (pcb == NULL) {
801d114: 68fb ldr r3, [r7, #12]
801d116: 2b00 cmp r3, #0
801d118: d107 bne.n 801d12a <tcp_alloc+0x6a>
/* Try killing oldest active connection with lower priority than the new one. */
LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio));
tcp_kill_prio(prio);
801d11a: 79fb ldrb r3, [r7, #7]
801d11c: 4618 mov r0, r3
801d11e: f7ff fee1 bl 801cee4 <tcp_kill_prio>
/* Try to allocate a tcp_pcb again. */
pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
801d122: 2001 movs r0, #1
801d124: f7fd faa6 bl 801a674 <memp_malloc>
801d128: 60f8 str r0, [r7, #12]
if (pcb != NULL) {
/* adjust err stats: memp_malloc failed above */
MEMP_STATS_DEC(err, MEMP_TCP_PCB);
}
}
if (pcb != NULL) {
801d12a: 68fb ldr r3, [r7, #12]
801d12c: 2b00 cmp r3, #0
801d12e: d03f beq.n 801d1b0 <tcp_alloc+0xf0>
/* zero out the whole pcb, so there is no need to initialize members to zero */
memset(pcb, 0, sizeof(struct tcp_pcb));
801d130: 229c movs r2, #156 @ 0x9c
801d132: 2100 movs r1, #0
801d134: 68f8 ldr r0, [r7, #12]
801d136: f00d fe0b bl 802ad50 <memset>
pcb->prio = prio;
801d13a: 68fb ldr r3, [r7, #12]
801d13c: 79fa ldrb r2, [r7, #7]
801d13e: 755a strb r2, [r3, #21]
pcb->snd_buf = TCP_SND_BUF;
801d140: 68fb ldr r3, [r7, #12]
801d142: f241 62d0 movw r2, #5840 @ 0x16d0
801d146: f8a3 2064 strh.w r2, [r3, #100] @ 0x64
/* Start with a window that does not need scaling. When window scaling is
enabled and used, the window is enlarged when both sides agree on scaling. */
pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
801d14a: 68fb ldr r3, [r7, #12]
801d14c: f241 62d0 movw r2, #5840 @ 0x16d0
801d150: 855a strh r2, [r3, #42] @ 0x2a
801d152: 68fb ldr r3, [r7, #12]
801d154: 8d5a ldrh r2, [r3, #42] @ 0x2a
801d156: 68fb ldr r3, [r7, #12]
801d158: 851a strh r2, [r3, #40] @ 0x28
pcb->ttl = TCP_TTL;
801d15a: 68fb ldr r3, [r7, #12]
801d15c: 22ff movs r2, #255 @ 0xff
801d15e: 72da strb r2, [r3, #11]
/* As initial send MSS, we use TCP_MSS but limit it to 536.
The send MSS is updated when an MSS option is received. */
pcb->mss = INITIAL_MSS;
801d160: 68fb ldr r3, [r7, #12]
801d162: f44f 7206 mov.w r2, #536 @ 0x218
801d166: 865a strh r2, [r3, #50] @ 0x32
pcb->rto = 3000 / TCP_SLOW_INTERVAL;
801d168: 68fb ldr r3, [r7, #12]
801d16a: 2206 movs r2, #6
801d16c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
pcb->sv = 3000 / TCP_SLOW_INTERVAL;
801d170: 68fb ldr r3, [r7, #12]
801d172: 2206 movs r2, #6
801d174: 87da strh r2, [r3, #62] @ 0x3e
pcb->rtime = -1;
801d176: 68fb ldr r3, [r7, #12]
801d178: f64f 72ff movw r2, #65535 @ 0xffff
801d17c: 861a strh r2, [r3, #48] @ 0x30
pcb->cwnd = 1;
801d17e: 68fb ldr r3, [r7, #12]
801d180: 2201 movs r2, #1
801d182: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
pcb->tmr = tcp_ticks;
801d186: 4b0d ldr r3, [pc, #52] @ (801d1bc <tcp_alloc+0xfc>)
801d188: 681a ldr r2, [r3, #0]
801d18a: 68fb ldr r3, [r7, #12]
801d18c: 621a str r2, [r3, #32]
pcb->last_timer = tcp_timer_ctr;
801d18e: 4b0c ldr r3, [pc, #48] @ (801d1c0 <tcp_alloc+0x100>)
801d190: 781a ldrb r2, [r3, #0]
801d192: 68fb ldr r3, [r7, #12]
801d194: 779a strb r2, [r3, #30]
of using the largest advertised receive window. We've seen complications with
receiving TCPs that use window scaling and/or window auto-tuning where the
initial advertised window is very small and then grows rapidly once the
connection is established. To avoid these complications, we set ssthresh to the
largest effective cwnd (amount of in-flight data) that the sender can have. */
pcb->ssthresh = TCP_SND_BUF;
801d196: 68fb ldr r3, [r7, #12]
801d198: f241 62d0 movw r2, #5840 @ 0x16d0
801d19c: f8a3 204a strh.w r2, [r3, #74] @ 0x4a
#if LWIP_CALLBACK_API
pcb->recv = tcp_recv_null;
801d1a0: 68fb ldr r3, [r7, #12]
801d1a2: 4a08 ldr r2, [pc, #32] @ (801d1c4 <tcp_alloc+0x104>)
801d1a4: f8c3 2084 str.w r2, [r3, #132] @ 0x84
#endif /* LWIP_CALLBACK_API */
/* Init KEEPALIVE timer */
pcb->keep_idle = TCP_KEEPIDLE_DEFAULT;
801d1a8: 68fb ldr r3, [r7, #12]
801d1aa: 4a07 ldr r2, [pc, #28] @ (801d1c8 <tcp_alloc+0x108>)
801d1ac: f8c3 2094 str.w r2, [r3, #148] @ 0x94
#if LWIP_TCP_KEEPALIVE
pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT;
pcb->keep_cnt = TCP_KEEPCNT_DEFAULT;
#endif /* LWIP_TCP_KEEPALIVE */
}
return pcb;
801d1b0: 68fb ldr r3, [r7, #12]
}
801d1b2: 4618 mov r0, r3
801d1b4: 3710 adds r7, #16
801d1b6: 46bd mov sp, r7
801d1b8: bd80 pop {r7, pc}
801d1ba: bf00 nop
801d1bc: 2402afa8 .word 0x2402afa8
801d1c0: 2402afbe .word 0x2402afbe
801d1c4: 0801ce79 .word 0x0801ce79
801d1c8: 006ddd00 .word 0x006ddd00
0801d1cc <tcp_new_ip_type>:
* supply @ref IPADDR_TYPE_ANY as argument and bind to @ref IP_ANY_TYPE.
* @return a new tcp_pcb that initially is in state CLOSED
*/
struct tcp_pcb *
tcp_new_ip_type(u8_t type)
{
801d1cc: b580 push {r7, lr}
801d1ce: b084 sub sp, #16
801d1d0: af00 add r7, sp, #0
801d1d2: 4603 mov r3, r0
801d1d4: 71fb strb r3, [r7, #7]
struct tcp_pcb *pcb;
pcb = tcp_alloc(TCP_PRIO_NORMAL);
801d1d6: 2040 movs r0, #64 @ 0x40
801d1d8: f7ff ff72 bl 801d0c0 <tcp_alloc>
801d1dc: 60f8 str r0, [r7, #12]
IP_SET_TYPE_VAL(pcb->remote_ip, type);
}
#else
LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
return pcb;
801d1de: 68fb ldr r3, [r7, #12]
}
801d1e0: 4618 mov r0, r3
801d1e2: 3710 adds r7, #16
801d1e4: 46bd mov sp, r7
801d1e6: bd80 pop {r7, pc}
0801d1e8 <tcp_arg>:
* @param pcb tcp_pcb to set the callback argument
* @param arg void pointer argument to pass to callback functions
*/
void
tcp_arg(struct tcp_pcb *pcb, void *arg)
{
801d1e8: b580 push {r7, lr}
801d1ea: b082 sub sp, #8
801d1ec: af00 add r7, sp, #0
801d1ee: 6078 str r0, [r7, #4]
801d1f0: 6039 str r1, [r7, #0]
LWIP_ASSERT_CORE_LOCKED();
801d1f2: f7f3 ffef bl 80111d4 <sys_check_core_locking>
/* This function is allowed to be called for both listen pcbs and
connection pcbs. */
if (pcb != NULL) {
801d1f6: 687b ldr r3, [r7, #4]
801d1f8: 2b00 cmp r3, #0
801d1fa: d002 beq.n 801d202 <tcp_arg+0x1a>
pcb->callback_arg = arg;
801d1fc: 687b ldr r3, [r7, #4]
801d1fe: 683a ldr r2, [r7, #0]
801d200: 611a str r2, [r3, #16]
}
}
801d202: bf00 nop
801d204: 3708 adds r7, #8
801d206: 46bd mov sp, r7
801d208: bd80 pop {r7, pc}
...
0801d20c <tcp_recv>:
* @param pcb tcp_pcb to set the recv callback
* @param recv callback function to call for this pcb when data is received
*/
void
tcp_recv(struct tcp_pcb *pcb, tcp_recv_fn recv)
{
801d20c: b580 push {r7, lr}
801d20e: b082 sub sp, #8
801d210: af00 add r7, sp, #0
801d212: 6078 str r0, [r7, #4]
801d214: 6039 str r1, [r7, #0]
LWIP_ASSERT_CORE_LOCKED();
801d216: f7f3 ffdd bl 80111d4 <sys_check_core_locking>
if (pcb != NULL) {
801d21a: 687b ldr r3, [r7, #4]
801d21c: 2b00 cmp r3, #0
801d21e: d00e beq.n 801d23e <tcp_recv+0x32>
LWIP_ASSERT("invalid socket state for recv callback", pcb->state != LISTEN);
801d220: 687b ldr r3, [r7, #4]
801d222: 7d1b ldrb r3, [r3, #20]
801d224: 2b01 cmp r3, #1
801d226: d106 bne.n 801d236 <tcp_recv+0x2a>
801d228: 4b07 ldr r3, [pc, #28] @ (801d248 <tcp_recv+0x3c>)
801d22a: f240 72df movw r2, #2015 @ 0x7df
801d22e: 4907 ldr r1, [pc, #28] @ (801d24c <tcp_recv+0x40>)
801d230: 4807 ldr r0, [pc, #28] @ (801d250 <tcp_recv+0x44>)
801d232: f00d fbfb bl 802aa2c <iprintf>
pcb->recv = recv;
801d236: 687b ldr r3, [r7, #4]
801d238: 683a ldr r2, [r7, #0]
801d23a: f8c3 2084 str.w r2, [r3, #132] @ 0x84
}
}
801d23e: bf00 nop
801d240: 3708 adds r7, #8
801d242: 46bd mov sp, r7
801d244: bd80 pop {r7, pc}
801d246: bf00 nop
801d248: 0802f7f0 .word 0x0802f7f0
801d24c: 0802fd8c .word 0x0802fd8c
801d250: 0802f834 .word 0x0802f834
0801d254 <tcp_sent>:
* @param pcb tcp_pcb to set the sent callback
* @param sent callback function to call for this pcb when data is successfully sent
*/
void
tcp_sent(struct tcp_pcb *pcb, tcp_sent_fn sent)
{
801d254: b580 push {r7, lr}
801d256: b082 sub sp, #8
801d258: af00 add r7, sp, #0
801d25a: 6078 str r0, [r7, #4]
801d25c: 6039 str r1, [r7, #0]
LWIP_ASSERT_CORE_LOCKED();
801d25e: f7f3 ffb9 bl 80111d4 <sys_check_core_locking>
if (pcb != NULL) {
801d262: 687b ldr r3, [r7, #4]
801d264: 2b00 cmp r3, #0
801d266: d00e beq.n 801d286 <tcp_sent+0x32>
LWIP_ASSERT("invalid socket state for sent callback", pcb->state != LISTEN);
801d268: 687b ldr r3, [r7, #4]
801d26a: 7d1b ldrb r3, [r3, #20]
801d26c: 2b01 cmp r3, #1
801d26e: d106 bne.n 801d27e <tcp_sent+0x2a>
801d270: 4b07 ldr r3, [pc, #28] @ (801d290 <tcp_sent+0x3c>)
801d272: f240 72f3 movw r2, #2035 @ 0x7f3
801d276: 4907 ldr r1, [pc, #28] @ (801d294 <tcp_sent+0x40>)
801d278: 4807 ldr r0, [pc, #28] @ (801d298 <tcp_sent+0x44>)
801d27a: f00d fbd7 bl 802aa2c <iprintf>
pcb->sent = sent;
801d27e: 687b ldr r3, [r7, #4]
801d280: 683a ldr r2, [r7, #0]
801d282: f8c3 2080 str.w r2, [r3, #128] @ 0x80
}
}
801d286: bf00 nop
801d288: 3708 adds r7, #8
801d28a: 46bd mov sp, r7
801d28c: bd80 pop {r7, pc}
801d28e: bf00 nop
801d290: 0802f7f0 .word 0x0802f7f0
801d294: 0802fdb4 .word 0x0802fdb4
801d298: 0802f834 .word 0x0802f834
0801d29c <tcp_err>:
* @param err callback function to call for this pcb when a fatal error
* has occurred on the connection
*/
void
tcp_err(struct tcp_pcb *pcb, tcp_err_fn err)
{
801d29c: b580 push {r7, lr}
801d29e: b082 sub sp, #8
801d2a0: af00 add r7, sp, #0
801d2a2: 6078 str r0, [r7, #4]
801d2a4: 6039 str r1, [r7, #0]
LWIP_ASSERT_CORE_LOCKED();
801d2a6: f7f3 ff95 bl 80111d4 <sys_check_core_locking>
if (pcb != NULL) {
801d2aa: 687b ldr r3, [r7, #4]
801d2ac: 2b00 cmp r3, #0
801d2ae: d00e beq.n 801d2ce <tcp_err+0x32>
LWIP_ASSERT("invalid socket state for err callback", pcb->state != LISTEN);
801d2b0: 687b ldr r3, [r7, #4]
801d2b2: 7d1b ldrb r3, [r3, #20]
801d2b4: 2b01 cmp r3, #1
801d2b6: d106 bne.n 801d2c6 <tcp_err+0x2a>
801d2b8: 4b07 ldr r3, [pc, #28] @ (801d2d8 <tcp_err+0x3c>)
801d2ba: f640 020d movw r2, #2061 @ 0x80d
801d2be: 4907 ldr r1, [pc, #28] @ (801d2dc <tcp_err+0x40>)
801d2c0: 4807 ldr r0, [pc, #28] @ (801d2e0 <tcp_err+0x44>)
801d2c2: f00d fbb3 bl 802aa2c <iprintf>
pcb->errf = err;
801d2c6: 687b ldr r3, [r7, #4]
801d2c8: 683a ldr r2, [r7, #0]
801d2ca: f8c3 2090 str.w r2, [r3, #144] @ 0x90
}
}
801d2ce: bf00 nop
801d2d0: 3708 adds r7, #8
801d2d2: 46bd mov sp, r7
801d2d4: bd80 pop {r7, pc}
801d2d6: bf00 nop
801d2d8: 0802f7f0 .word 0x0802f7f0
801d2dc: 0802fddc .word 0x0802fddc
801d2e0: 0802f834 .word 0x0802f834
0801d2e4 <tcp_accept>:
* @param accept callback function to call for this pcb when LISTENing
* connection has been connected to another host
*/
void
tcp_accept(struct tcp_pcb *pcb, tcp_accept_fn accept)
{
801d2e4: b580 push {r7, lr}
801d2e6: b084 sub sp, #16
801d2e8: af00 add r7, sp, #0
801d2ea: 6078 str r0, [r7, #4]
801d2ec: 6039 str r1, [r7, #0]
LWIP_ASSERT_CORE_LOCKED();
801d2ee: f7f3 ff71 bl 80111d4 <sys_check_core_locking>
if ((pcb != NULL) && (pcb->state == LISTEN)) {
801d2f2: 687b ldr r3, [r7, #4]
801d2f4: 2b00 cmp r3, #0
801d2f6: d008 beq.n 801d30a <tcp_accept+0x26>
801d2f8: 687b ldr r3, [r7, #4]
801d2fa: 7d1b ldrb r3, [r3, #20]
801d2fc: 2b01 cmp r3, #1
801d2fe: d104 bne.n 801d30a <tcp_accept+0x26>
struct tcp_pcb_listen *lpcb = (struct tcp_pcb_listen *)pcb;
801d300: 687b ldr r3, [r7, #4]
801d302: 60fb str r3, [r7, #12]
lpcb->accept = accept;
801d304: 68fb ldr r3, [r7, #12]
801d306: 683a ldr r2, [r7, #0]
801d308: 619a str r2, [r3, #24]
}
}
801d30a: bf00 nop
801d30c: 3710 adds r7, #16
801d30e: 46bd mov sp, r7
801d310: bd80 pop {r7, pc}
...
0801d314 <tcp_poll>:
* the application may use the polling functionality to call tcp_write()
* again when the connection has been idle for a while.
*/
void
tcp_poll(struct tcp_pcb *pcb, tcp_poll_fn poll, u8_t interval)
{
801d314: b580 push {r7, lr}
801d316: b084 sub sp, #16
801d318: af00 add r7, sp, #0
801d31a: 60f8 str r0, [r7, #12]
801d31c: 60b9 str r1, [r7, #8]
801d31e: 4613 mov r3, r2
801d320: 71fb strb r3, [r7, #7]
LWIP_ASSERT_CORE_LOCKED();
801d322: f7f3 ff57 bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("tcp_poll: invalid pcb", pcb != NULL, return);
801d326: 68fb ldr r3, [r7, #12]
801d328: 2b00 cmp r3, #0
801d32a: d107 bne.n 801d33c <tcp_poll+0x28>
801d32c: 4b0e ldr r3, [pc, #56] @ (801d368 <tcp_poll+0x54>)
801d32e: f640 023d movw r2, #2109 @ 0x83d
801d332: 490e ldr r1, [pc, #56] @ (801d36c <tcp_poll+0x58>)
801d334: 480e ldr r0, [pc, #56] @ (801d370 <tcp_poll+0x5c>)
801d336: f00d fb79 bl 802aa2c <iprintf>
801d33a: e011 b.n 801d360 <tcp_poll+0x4c>
LWIP_ASSERT("invalid socket state for poll", pcb->state != LISTEN);
801d33c: 68fb ldr r3, [r7, #12]
801d33e: 7d1b ldrb r3, [r3, #20]
801d340: 2b01 cmp r3, #1
801d342: d106 bne.n 801d352 <tcp_poll+0x3e>
801d344: 4b08 ldr r3, [pc, #32] @ (801d368 <tcp_poll+0x54>)
801d346: f640 023e movw r2, #2110 @ 0x83e
801d34a: 490a ldr r1, [pc, #40] @ (801d374 <tcp_poll+0x60>)
801d34c: 4808 ldr r0, [pc, #32] @ (801d370 <tcp_poll+0x5c>)
801d34e: f00d fb6d bl 802aa2c <iprintf>
#if LWIP_CALLBACK_API
pcb->poll = poll;
801d352: 68fb ldr r3, [r7, #12]
801d354: 68ba ldr r2, [r7, #8]
801d356: f8c3 208c str.w r2, [r3, #140] @ 0x8c
#else /* LWIP_CALLBACK_API */
LWIP_UNUSED_ARG(poll);
#endif /* LWIP_CALLBACK_API */
pcb->pollinterval = interval;
801d35a: 68fb ldr r3, [r7, #12]
801d35c: 79fa ldrb r2, [r7, #7]
801d35e: 775a strb r2, [r3, #29]
}
801d360: 3710 adds r7, #16
801d362: 46bd mov sp, r7
801d364: bd80 pop {r7, pc}
801d366: bf00 nop
801d368: 0802f7f0 .word 0x0802f7f0
801d36c: 0802fe04 .word 0x0802fe04
801d370: 0802f834 .word 0x0802f834
801d374: 0802fe1c .word 0x0802fe1c
0801d378 <tcp_pcb_purge>:
*
* @param pcb tcp_pcb to purge. The pcb itself is not deallocated!
*/
void
tcp_pcb_purge(struct tcp_pcb *pcb)
{
801d378: b580 push {r7, lr}
801d37a: b082 sub sp, #8
801d37c: af00 add r7, sp, #0
801d37e: 6078 str r0, [r7, #4]
LWIP_ERROR("tcp_pcb_purge: invalid pcb", pcb != NULL, return);
801d380: 687b ldr r3, [r7, #4]
801d382: 2b00 cmp r3, #0
801d384: d107 bne.n 801d396 <tcp_pcb_purge+0x1e>
801d386: 4b21 ldr r3, [pc, #132] @ (801d40c <tcp_pcb_purge+0x94>)
801d388: f640 0251 movw r2, #2129 @ 0x851
801d38c: 4920 ldr r1, [pc, #128] @ (801d410 <tcp_pcb_purge+0x98>)
801d38e: 4821 ldr r0, [pc, #132] @ (801d414 <tcp_pcb_purge+0x9c>)
801d390: f00d fb4c bl 802aa2c <iprintf>
801d394: e037 b.n 801d406 <tcp_pcb_purge+0x8e>
if (pcb->state != CLOSED &&
801d396: 687b ldr r3, [r7, #4]
801d398: 7d1b ldrb r3, [r3, #20]
801d39a: 2b00 cmp r3, #0
801d39c: d033 beq.n 801d406 <tcp_pcb_purge+0x8e>
pcb->state != TIME_WAIT &&
801d39e: 687b ldr r3, [r7, #4]
801d3a0: 7d1b ldrb r3, [r3, #20]
if (pcb->state != CLOSED &&
801d3a2: 2b0a cmp r3, #10
801d3a4: d02f beq.n 801d406 <tcp_pcb_purge+0x8e>
pcb->state != LISTEN) {
801d3a6: 687b ldr r3, [r7, #4]
801d3a8: 7d1b ldrb r3, [r3, #20]
pcb->state != TIME_WAIT &&
801d3aa: 2b01 cmp r3, #1
801d3ac: d02b beq.n 801d406 <tcp_pcb_purge+0x8e>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n"));
tcp_backlog_accepted(pcb);
if (pcb->refused_data != NULL) {
801d3ae: 687b ldr r3, [r7, #4]
801d3b0: 6f9b ldr r3, [r3, #120] @ 0x78
801d3b2: 2b00 cmp r3, #0
801d3b4: d007 beq.n 801d3c6 <tcp_pcb_purge+0x4e>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n"));
pbuf_free(pcb->refused_data);
801d3b6: 687b ldr r3, [r7, #4]
801d3b8: 6f9b ldr r3, [r3, #120] @ 0x78
801d3ba: 4618 mov r0, r3
801d3bc: f7fe f8be bl 801b53c <pbuf_free>
pcb->refused_data = NULL;
801d3c0: 687b ldr r3, [r7, #4]
801d3c2: 2200 movs r2, #0
801d3c4: 679a str r2, [r3, #120] @ 0x78
}
if (pcb->unacked != NULL) {
LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n"));
}
#if TCP_QUEUE_OOSEQ
if (pcb->ooseq != NULL) {
801d3c6: 687b ldr r3, [r7, #4]
801d3c8: 6f5b ldr r3, [r3, #116] @ 0x74
801d3ca: 2b00 cmp r3, #0
801d3cc: d002 beq.n 801d3d4 <tcp_pcb_purge+0x5c>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n"));
tcp_free_ooseq(pcb);
801d3ce: 6878 ldr r0, [r7, #4]
801d3d0: f000 f986 bl 801d6e0 <tcp_free_ooseq>
}
#endif /* TCP_QUEUE_OOSEQ */
/* Stop the retransmission timer as it will expect data on unacked
queue if it fires */
pcb->rtime = -1;
801d3d4: 687b ldr r3, [r7, #4]
801d3d6: f64f 72ff movw r2, #65535 @ 0xffff
801d3da: 861a strh r2, [r3, #48] @ 0x30
tcp_segs_free(pcb->unsent);
801d3dc: 687b ldr r3, [r7, #4]
801d3de: 6edb ldr r3, [r3, #108] @ 0x6c
801d3e0: 4618 mov r0, r3
801d3e2: f7ff fcef bl 801cdc4 <tcp_segs_free>
tcp_segs_free(pcb->unacked);
801d3e6: 687b ldr r3, [r7, #4]
801d3e8: 6f1b ldr r3, [r3, #112] @ 0x70
801d3ea: 4618 mov r0, r3
801d3ec: f7ff fcea bl 801cdc4 <tcp_segs_free>
pcb->unacked = pcb->unsent = NULL;
801d3f0: 687b ldr r3, [r7, #4]
801d3f2: 2200 movs r2, #0
801d3f4: 66da str r2, [r3, #108] @ 0x6c
801d3f6: 687b ldr r3, [r7, #4]
801d3f8: 6eda ldr r2, [r3, #108] @ 0x6c
801d3fa: 687b ldr r3, [r7, #4]
801d3fc: 671a str r2, [r3, #112] @ 0x70
#if TCP_OVERSIZE
pcb->unsent_oversize = 0;
801d3fe: 687b ldr r3, [r7, #4]
801d400: 2200 movs r2, #0
801d402: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
#endif /* TCP_OVERSIZE */
}
}
801d406: 3708 adds r7, #8
801d408: 46bd mov sp, r7
801d40a: bd80 pop {r7, pc}
801d40c: 0802f7f0 .word 0x0802f7f0
801d410: 0802fe3c .word 0x0802fe3c
801d414: 0802f834 .word 0x0802f834
0801d418 <tcp_pcb_remove>:
* @param pcblist PCB list to purge.
* @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated!
*/
void
tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb)
{
801d418: b580 push {r7, lr}
801d41a: b084 sub sp, #16
801d41c: af00 add r7, sp, #0
801d41e: 6078 str r0, [r7, #4]
801d420: 6039 str r1, [r7, #0]
LWIP_ASSERT("tcp_pcb_remove: invalid pcb", pcb != NULL);
801d422: 683b ldr r3, [r7, #0]
801d424: 2b00 cmp r3, #0
801d426: d106 bne.n 801d436 <tcp_pcb_remove+0x1e>
801d428: 4b3e ldr r3, [pc, #248] @ (801d524 <tcp_pcb_remove+0x10c>)
801d42a: f640 0283 movw r2, #2179 @ 0x883
801d42e: 493e ldr r1, [pc, #248] @ (801d528 <tcp_pcb_remove+0x110>)
801d430: 483e ldr r0, [pc, #248] @ (801d52c <tcp_pcb_remove+0x114>)
801d432: f00d fafb bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_pcb_remove: invalid pcblist", pcblist != NULL);
801d436: 687b ldr r3, [r7, #4]
801d438: 2b00 cmp r3, #0
801d43a: d106 bne.n 801d44a <tcp_pcb_remove+0x32>
801d43c: 4b39 ldr r3, [pc, #228] @ (801d524 <tcp_pcb_remove+0x10c>)
801d43e: f640 0284 movw r2, #2180 @ 0x884
801d442: 493b ldr r1, [pc, #236] @ (801d530 <tcp_pcb_remove+0x118>)
801d444: 4839 ldr r0, [pc, #228] @ (801d52c <tcp_pcb_remove+0x114>)
801d446: f00d faf1 bl 802aa2c <iprintf>
TCP_RMV(pcblist, pcb);
801d44a: 687b ldr r3, [r7, #4]
801d44c: 681b ldr r3, [r3, #0]
801d44e: 683a ldr r2, [r7, #0]
801d450: 429a cmp r2, r3
801d452: d105 bne.n 801d460 <tcp_pcb_remove+0x48>
801d454: 687b ldr r3, [r7, #4]
801d456: 681b ldr r3, [r3, #0]
801d458: 68da ldr r2, [r3, #12]
801d45a: 687b ldr r3, [r7, #4]
801d45c: 601a str r2, [r3, #0]
801d45e: e013 b.n 801d488 <tcp_pcb_remove+0x70>
801d460: 687b ldr r3, [r7, #4]
801d462: 681b ldr r3, [r3, #0]
801d464: 60fb str r3, [r7, #12]
801d466: e00c b.n 801d482 <tcp_pcb_remove+0x6a>
801d468: 68fb ldr r3, [r7, #12]
801d46a: 68db ldr r3, [r3, #12]
801d46c: 683a ldr r2, [r7, #0]
801d46e: 429a cmp r2, r3
801d470: d104 bne.n 801d47c <tcp_pcb_remove+0x64>
801d472: 683b ldr r3, [r7, #0]
801d474: 68da ldr r2, [r3, #12]
801d476: 68fb ldr r3, [r7, #12]
801d478: 60da str r2, [r3, #12]
801d47a: e005 b.n 801d488 <tcp_pcb_remove+0x70>
801d47c: 68fb ldr r3, [r7, #12]
801d47e: 68db ldr r3, [r3, #12]
801d480: 60fb str r3, [r7, #12]
801d482: 68fb ldr r3, [r7, #12]
801d484: 2b00 cmp r3, #0
801d486: d1ef bne.n 801d468 <tcp_pcb_remove+0x50>
801d488: 683b ldr r3, [r7, #0]
801d48a: 2200 movs r2, #0
801d48c: 60da str r2, [r3, #12]
tcp_pcb_purge(pcb);
801d48e: 6838 ldr r0, [r7, #0]
801d490: f7ff ff72 bl 801d378 <tcp_pcb_purge>
/* if there is an outstanding delayed ACKs, send it */
if ((pcb->state != TIME_WAIT) &&
801d494: 683b ldr r3, [r7, #0]
801d496: 7d1b ldrb r3, [r3, #20]
801d498: 2b0a cmp r3, #10
801d49a: d013 beq.n 801d4c4 <tcp_pcb_remove+0xac>
(pcb->state != LISTEN) &&
801d49c: 683b ldr r3, [r7, #0]
801d49e: 7d1b ldrb r3, [r3, #20]
if ((pcb->state != TIME_WAIT) &&
801d4a0: 2b01 cmp r3, #1
801d4a2: d00f beq.n 801d4c4 <tcp_pcb_remove+0xac>
(pcb->flags & TF_ACK_DELAY)) {
801d4a4: 683b ldr r3, [r7, #0]
801d4a6: 8b5b ldrh r3, [r3, #26]
801d4a8: f003 0301 and.w r3, r3, #1
(pcb->state != LISTEN) &&
801d4ac: 2b00 cmp r3, #0
801d4ae: d009 beq.n 801d4c4 <tcp_pcb_remove+0xac>
tcp_ack_now(pcb);
801d4b0: 683b ldr r3, [r7, #0]
801d4b2: 8b5b ldrh r3, [r3, #26]
801d4b4: f043 0302 orr.w r3, r3, #2
801d4b8: b29a uxth r2, r3
801d4ba: 683b ldr r3, [r7, #0]
801d4bc: 835a strh r2, [r3, #26]
tcp_output(pcb);
801d4be: 6838 ldr r0, [r7, #0]
801d4c0: f003 fc28 bl 8020d14 <tcp_output>
}
if (pcb->state != LISTEN) {
801d4c4: 683b ldr r3, [r7, #0]
801d4c6: 7d1b ldrb r3, [r3, #20]
801d4c8: 2b01 cmp r3, #1
801d4ca: d020 beq.n 801d50e <tcp_pcb_remove+0xf6>
LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL);
801d4cc: 683b ldr r3, [r7, #0]
801d4ce: 6edb ldr r3, [r3, #108] @ 0x6c
801d4d0: 2b00 cmp r3, #0
801d4d2: d006 beq.n 801d4e2 <tcp_pcb_remove+0xca>
801d4d4: 4b13 ldr r3, [pc, #76] @ (801d524 <tcp_pcb_remove+0x10c>)
801d4d6: f640 0293 movw r2, #2195 @ 0x893
801d4da: 4916 ldr r1, [pc, #88] @ (801d534 <tcp_pcb_remove+0x11c>)
801d4dc: 4813 ldr r0, [pc, #76] @ (801d52c <tcp_pcb_remove+0x114>)
801d4de: f00d faa5 bl 802aa2c <iprintf>
LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL);
801d4e2: 683b ldr r3, [r7, #0]
801d4e4: 6f1b ldr r3, [r3, #112] @ 0x70
801d4e6: 2b00 cmp r3, #0
801d4e8: d006 beq.n 801d4f8 <tcp_pcb_remove+0xe0>
801d4ea: 4b0e ldr r3, [pc, #56] @ (801d524 <tcp_pcb_remove+0x10c>)
801d4ec: f640 0294 movw r2, #2196 @ 0x894
801d4f0: 4911 ldr r1, [pc, #68] @ (801d538 <tcp_pcb_remove+0x120>)
801d4f2: 480e ldr r0, [pc, #56] @ (801d52c <tcp_pcb_remove+0x114>)
801d4f4: f00d fa9a bl 802aa2c <iprintf>
#if TCP_QUEUE_OOSEQ
LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL);
801d4f8: 683b ldr r3, [r7, #0]
801d4fa: 6f5b ldr r3, [r3, #116] @ 0x74
801d4fc: 2b00 cmp r3, #0
801d4fe: d006 beq.n 801d50e <tcp_pcb_remove+0xf6>
801d500: 4b08 ldr r3, [pc, #32] @ (801d524 <tcp_pcb_remove+0x10c>)
801d502: f640 0296 movw r2, #2198 @ 0x896
801d506: 490d ldr r1, [pc, #52] @ (801d53c <tcp_pcb_remove+0x124>)
801d508: 4808 ldr r0, [pc, #32] @ (801d52c <tcp_pcb_remove+0x114>)
801d50a: f00d fa8f bl 802aa2c <iprintf>
#endif /* TCP_QUEUE_OOSEQ */
}
pcb->state = CLOSED;
801d50e: 683b ldr r3, [r7, #0]
801d510: 2200 movs r2, #0
801d512: 751a strb r2, [r3, #20]
/* reset the local port to prevent the pcb from being 'bound' */
pcb->local_port = 0;
801d514: 683b ldr r3, [r7, #0]
801d516: 2200 movs r2, #0
801d518: 82da strh r2, [r3, #22]
LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane());
}
801d51a: bf00 nop
801d51c: 3710 adds r7, #16
801d51e: 46bd mov sp, r7
801d520: bd80 pop {r7, pc}
801d522: bf00 nop
801d524: 0802f7f0 .word 0x0802f7f0
801d528: 0802fe58 .word 0x0802fe58
801d52c: 0802f834 .word 0x0802f834
801d530: 0802fe74 .word 0x0802fe74
801d534: 0802fe94 .word 0x0802fe94
801d538: 0802feac .word 0x0802feac
801d53c: 0802fec8 .word 0x0802fec8
0801d540 <tcp_next_iss>:
*
* @return u32_t pseudo random sequence number
*/
u32_t
tcp_next_iss(struct tcp_pcb *pcb)
{
801d540: b580 push {r7, lr}
801d542: b082 sub sp, #8
801d544: af00 add r7, sp, #0
801d546: 6078 str r0, [r7, #4]
LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
return LWIP_HOOK_TCP_ISN(&pcb->local_ip, pcb->local_port, &pcb->remote_ip, pcb->remote_port);
#else /* LWIP_HOOK_TCP_ISN */
static u32_t iss = 6510;
LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
801d548: 687b ldr r3, [r7, #4]
801d54a: 2b00 cmp r3, #0
801d54c: d106 bne.n 801d55c <tcp_next_iss+0x1c>
801d54e: 4b0a ldr r3, [pc, #40] @ (801d578 <tcp_next_iss+0x38>)
801d550: f640 02af movw r2, #2223 @ 0x8af
801d554: 4909 ldr r1, [pc, #36] @ (801d57c <tcp_next_iss+0x3c>)
801d556: 480a ldr r0, [pc, #40] @ (801d580 <tcp_next_iss+0x40>)
801d558: f00d fa68 bl 802aa2c <iprintf>
LWIP_UNUSED_ARG(pcb);
iss += tcp_ticks; /* XXX */
801d55c: 4b09 ldr r3, [pc, #36] @ (801d584 <tcp_next_iss+0x44>)
801d55e: 681a ldr r2, [r3, #0]
801d560: 4b09 ldr r3, [pc, #36] @ (801d588 <tcp_next_iss+0x48>)
801d562: 681b ldr r3, [r3, #0]
801d564: 4413 add r3, r2
801d566: 4a07 ldr r2, [pc, #28] @ (801d584 <tcp_next_iss+0x44>)
801d568: 6013 str r3, [r2, #0]
return iss;
801d56a: 4b06 ldr r3, [pc, #24] @ (801d584 <tcp_next_iss+0x44>)
801d56c: 681b ldr r3, [r3, #0]
#endif /* LWIP_HOOK_TCP_ISN */
}
801d56e: 4618 mov r0, r3
801d570: 3708 adds r7, #8
801d572: 46bd mov sp, r7
801d574: bd80 pop {r7, pc}
801d576: bf00 nop
801d578: 0802f7f0 .word 0x0802f7f0
801d57c: 0802fee0 .word 0x0802fee0
801d580: 0802f834 .word 0x0802f834
801d584: 24000050 .word 0x24000050
801d588: 2402afa8 .word 0x2402afa8
0801d58c <tcp_eff_send_mss_netif>:
* by calculating the minimum of TCP_MSS and the mtu (if set) of the target
* netif (if not NULL).
*/
u16_t
tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif, const ip_addr_t *dest)
{
801d58c: b580 push {r7, lr}
801d58e: b086 sub sp, #24
801d590: af00 add r7, sp, #0
801d592: 4603 mov r3, r0
801d594: 60b9 str r1, [r7, #8]
801d596: 607a str r2, [r7, #4]
801d598: 81fb strh r3, [r7, #14]
u16_t mss_s;
u16_t mtu;
LWIP_UNUSED_ARG(dest); /* in case IPv6 is disabled */
LWIP_ASSERT("tcp_eff_send_mss_netif: invalid dst_ip", dest != NULL);
801d59a: 687b ldr r3, [r7, #4]
801d59c: 2b00 cmp r3, #0
801d59e: d106 bne.n 801d5ae <tcp_eff_send_mss_netif+0x22>
801d5a0: 4b14 ldr r3, [pc, #80] @ (801d5f4 <tcp_eff_send_mss_netif+0x68>)
801d5a2: f640 02c5 movw r2, #2245 @ 0x8c5
801d5a6: 4914 ldr r1, [pc, #80] @ (801d5f8 <tcp_eff_send_mss_netif+0x6c>)
801d5a8: 4814 ldr r0, [pc, #80] @ (801d5fc <tcp_eff_send_mss_netif+0x70>)
801d5aa: f00d fa3f bl 802aa2c <iprintf>
else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
{
if (outif == NULL) {
801d5ae: 68bb ldr r3, [r7, #8]
801d5b0: 2b00 cmp r3, #0
801d5b2: d101 bne.n 801d5b8 <tcp_eff_send_mss_netif+0x2c>
return sendmss;
801d5b4: 89fb ldrh r3, [r7, #14]
801d5b6: e019 b.n 801d5ec <tcp_eff_send_mss_netif+0x60>
}
mtu = outif->mtu;
801d5b8: 68bb ldr r3, [r7, #8]
801d5ba: 8d1b ldrh r3, [r3, #40] @ 0x28
801d5bc: 82fb strh r3, [r7, #22]
}
#endif /* LWIP_IPV4 */
if (mtu != 0) {
801d5be: 8afb ldrh r3, [r7, #22]
801d5c0: 2b00 cmp r3, #0
801d5c2: d012 beq.n 801d5ea <tcp_eff_send_mss_netif+0x5e>
else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
{
offset = IP_HLEN + TCP_HLEN;
801d5c4: 2328 movs r3, #40 @ 0x28
801d5c6: 82bb strh r3, [r7, #20]
}
#endif /* LWIP_IPV4 */
mss_s = (mtu > offset) ? (u16_t)(mtu - offset) : 0;
801d5c8: 8afa ldrh r2, [r7, #22]
801d5ca: 8abb ldrh r3, [r7, #20]
801d5cc: 429a cmp r2, r3
801d5ce: d904 bls.n 801d5da <tcp_eff_send_mss_netif+0x4e>
801d5d0: 8afa ldrh r2, [r7, #22]
801d5d2: 8abb ldrh r3, [r7, #20]
801d5d4: 1ad3 subs r3, r2, r3
801d5d6: b29b uxth r3, r3
801d5d8: e000 b.n 801d5dc <tcp_eff_send_mss_netif+0x50>
801d5da: 2300 movs r3, #0
801d5dc: 827b strh r3, [r7, #18]
/* RFC 1122, chap 4.2.2.6:
* Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize
* We correct for TCP options in tcp_write(), and don't support IP options.
*/
sendmss = LWIP_MIN(sendmss, mss_s);
801d5de: 8a7a ldrh r2, [r7, #18]
801d5e0: 89fb ldrh r3, [r7, #14]
801d5e2: 4293 cmp r3, r2
801d5e4: bf28 it cs
801d5e6: 4613 movcs r3, r2
801d5e8: 81fb strh r3, [r7, #14]
}
return sendmss;
801d5ea: 89fb ldrh r3, [r7, #14]
}
801d5ec: 4618 mov r0, r3
801d5ee: 3718 adds r7, #24
801d5f0: 46bd mov sp, r7
801d5f2: bd80 pop {r7, pc}
801d5f4: 0802f7f0 .word 0x0802f7f0
801d5f8: 0802fefc .word 0x0802fefc
801d5fc: 0802f834 .word 0x0802f834
0801d600 <tcp_netif_ip_addr_changed_pcblist>:
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
/** Helper function for tcp_netif_ip_addr_changed() that iterates a pcb list */
static void
tcp_netif_ip_addr_changed_pcblist(const ip_addr_t *old_addr, struct tcp_pcb *pcb_list)
{
801d600: b580 push {r7, lr}
801d602: b084 sub sp, #16
801d604: af00 add r7, sp, #0
801d606: 6078 str r0, [r7, #4]
801d608: 6039 str r1, [r7, #0]
struct tcp_pcb *pcb;
pcb = pcb_list;
801d60a: 683b ldr r3, [r7, #0]
801d60c: 60fb str r3, [r7, #12]
LWIP_ASSERT("tcp_netif_ip_addr_changed_pcblist: invalid old_addr", old_addr != NULL);
801d60e: 687b ldr r3, [r7, #4]
801d610: 2b00 cmp r3, #0
801d612: d119 bne.n 801d648 <tcp_netif_ip_addr_changed_pcblist+0x48>
801d614: 4b10 ldr r3, [pc, #64] @ (801d658 <tcp_netif_ip_addr_changed_pcblist+0x58>)
801d616: f44f 6210 mov.w r2, #2304 @ 0x900
801d61a: 4910 ldr r1, [pc, #64] @ (801d65c <tcp_netif_ip_addr_changed_pcblist+0x5c>)
801d61c: 4810 ldr r0, [pc, #64] @ (801d660 <tcp_netif_ip_addr_changed_pcblist+0x60>)
801d61e: f00d fa05 bl 802aa2c <iprintf>
while (pcb != NULL) {
801d622: e011 b.n 801d648 <tcp_netif_ip_addr_changed_pcblist+0x48>
/* PCB bound to current local interface address? */
if (ip_addr_cmp(&pcb->local_ip, old_addr)
801d624: 68fb ldr r3, [r7, #12]
801d626: 681a ldr r2, [r3, #0]
801d628: 687b ldr r3, [r7, #4]
801d62a: 681b ldr r3, [r3, #0]
801d62c: 429a cmp r2, r3
801d62e: d108 bne.n 801d642 <tcp_netif_ip_addr_changed_pcblist+0x42>
/* connections to link-local addresses must persist (RFC3927 ch. 1.9) */
&& (!IP_IS_V4_VAL(pcb->local_ip) || !ip4_addr_islinklocal(ip_2_ip4(&pcb->local_ip)))
#endif /* LWIP_AUTOIP */
) {
/* this connection must be aborted */
struct tcp_pcb *next = pcb->next;
801d630: 68fb ldr r3, [r7, #12]
801d632: 68db ldr r3, [r3, #12]
801d634: 60bb str r3, [r7, #8]
LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb));
tcp_abort(pcb);
801d636: 68f8 ldr r0, [r7, #12]
801d638: f7fe fd86 bl 801c148 <tcp_abort>
pcb = next;
801d63c: 68bb ldr r3, [r7, #8]
801d63e: 60fb str r3, [r7, #12]
801d640: e002 b.n 801d648 <tcp_netif_ip_addr_changed_pcblist+0x48>
} else {
pcb = pcb->next;
801d642: 68fb ldr r3, [r7, #12]
801d644: 68db ldr r3, [r3, #12]
801d646: 60fb str r3, [r7, #12]
while (pcb != NULL) {
801d648: 68fb ldr r3, [r7, #12]
801d64a: 2b00 cmp r3, #0
801d64c: d1ea bne.n 801d624 <tcp_netif_ip_addr_changed_pcblist+0x24>
}
}
}
801d64e: bf00 nop
801d650: bf00 nop
801d652: 3710 adds r7, #16
801d654: 46bd mov sp, r7
801d656: bd80 pop {r7, pc}
801d658: 0802f7f0 .word 0x0802f7f0
801d65c: 0802ff24 .word 0x0802ff24
801d660: 0802f834 .word 0x0802f834
0801d664 <tcp_netif_ip_addr_changed>:
* @param old_addr IP address of the netif before change
* @param new_addr IP address of the netif after change or NULL if netif has been removed
*/
void
tcp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
801d664: b580 push {r7, lr}
801d666: b084 sub sp, #16
801d668: af00 add r7, sp, #0
801d66a: 6078 str r0, [r7, #4]
801d66c: 6039 str r1, [r7, #0]
struct tcp_pcb_listen *lpcb;
if (!ip_addr_isany(old_addr)) {
801d66e: 687b ldr r3, [r7, #4]
801d670: 2b00 cmp r3, #0
801d672: d02a beq.n 801d6ca <tcp_netif_ip_addr_changed+0x66>
801d674: 687b ldr r3, [r7, #4]
801d676: 681b ldr r3, [r3, #0]
801d678: 2b00 cmp r3, #0
801d67a: d026 beq.n 801d6ca <tcp_netif_ip_addr_changed+0x66>
tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_active_pcbs);
801d67c: 4b15 ldr r3, [pc, #84] @ (801d6d4 <tcp_netif_ip_addr_changed+0x70>)
801d67e: 681b ldr r3, [r3, #0]
801d680: 4619 mov r1, r3
801d682: 6878 ldr r0, [r7, #4]
801d684: f7ff ffbc bl 801d600 <tcp_netif_ip_addr_changed_pcblist>
tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_bound_pcbs);
801d688: 4b13 ldr r3, [pc, #76] @ (801d6d8 <tcp_netif_ip_addr_changed+0x74>)
801d68a: 681b ldr r3, [r3, #0]
801d68c: 4619 mov r1, r3
801d68e: 6878 ldr r0, [r7, #4]
801d690: f7ff ffb6 bl 801d600 <tcp_netif_ip_addr_changed_pcblist>
if (!ip_addr_isany(new_addr)) {
801d694: 683b ldr r3, [r7, #0]
801d696: 2b00 cmp r3, #0
801d698: d017 beq.n 801d6ca <tcp_netif_ip_addr_changed+0x66>
801d69a: 683b ldr r3, [r7, #0]
801d69c: 681b ldr r3, [r3, #0]
801d69e: 2b00 cmp r3, #0
801d6a0: d013 beq.n 801d6ca <tcp_netif_ip_addr_changed+0x66>
/* PCB bound to current local interface address? */
for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
801d6a2: 4b0e ldr r3, [pc, #56] @ (801d6dc <tcp_netif_ip_addr_changed+0x78>)
801d6a4: 681b ldr r3, [r3, #0]
801d6a6: 60fb str r3, [r7, #12]
801d6a8: e00c b.n 801d6c4 <tcp_netif_ip_addr_changed+0x60>
/* PCB bound to current local interface address? */
if (ip_addr_cmp(&lpcb->local_ip, old_addr)) {
801d6aa: 68fb ldr r3, [r7, #12]
801d6ac: 681a ldr r2, [r3, #0]
801d6ae: 687b ldr r3, [r7, #4]
801d6b0: 681b ldr r3, [r3, #0]
801d6b2: 429a cmp r2, r3
801d6b4: d103 bne.n 801d6be <tcp_netif_ip_addr_changed+0x5a>
/* The PCB is listening to the old ipaddr and
* is set to listen to the new one instead */
ip_addr_copy(lpcb->local_ip, *new_addr);
801d6b6: 683b ldr r3, [r7, #0]
801d6b8: 681a ldr r2, [r3, #0]
801d6ba: 68fb ldr r3, [r7, #12]
801d6bc: 601a str r2, [r3, #0]
for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
801d6be: 68fb ldr r3, [r7, #12]
801d6c0: 68db ldr r3, [r3, #12]
801d6c2: 60fb str r3, [r7, #12]
801d6c4: 68fb ldr r3, [r7, #12]
801d6c6: 2b00 cmp r3, #0
801d6c8: d1ef bne.n 801d6aa <tcp_netif_ip_addr_changed+0x46>
}
}
}
}
}
801d6ca: bf00 nop
801d6cc: 3710 adds r7, #16
801d6ce: 46bd mov sp, r7
801d6d0: bd80 pop {r7, pc}
801d6d2: bf00 nop
801d6d4: 2402afb4 .word 0x2402afb4
801d6d8: 2402afac .word 0x2402afac
801d6dc: 2402afb0 .word 0x2402afb0
0801d6e0 <tcp_free_ooseq>:
#if TCP_QUEUE_OOSEQ
/* Free all ooseq pbufs (and possibly reset SACK state) */
void
tcp_free_ooseq(struct tcp_pcb *pcb)
{
801d6e0: b580 push {r7, lr}
801d6e2: b082 sub sp, #8
801d6e4: af00 add r7, sp, #0
801d6e6: 6078 str r0, [r7, #4]
if (pcb->ooseq) {
801d6e8: 687b ldr r3, [r7, #4]
801d6ea: 6f5b ldr r3, [r3, #116] @ 0x74
801d6ec: 2b00 cmp r3, #0
801d6ee: d007 beq.n 801d700 <tcp_free_ooseq+0x20>
tcp_segs_free(pcb->ooseq);
801d6f0: 687b ldr r3, [r7, #4]
801d6f2: 6f5b ldr r3, [r3, #116] @ 0x74
801d6f4: 4618 mov r0, r3
801d6f6: f7ff fb65 bl 801cdc4 <tcp_segs_free>
pcb->ooseq = NULL;
801d6fa: 687b ldr r3, [r7, #4]
801d6fc: 2200 movs r2, #0
801d6fe: 675a str r2, [r3, #116] @ 0x74
#if LWIP_TCP_SACK_OUT
memset(pcb->rcv_sacks, 0, sizeof(pcb->rcv_sacks));
#endif /* LWIP_TCP_SACK_OUT */
}
}
801d700: bf00 nop
801d702: 3708 adds r7, #8
801d704: 46bd mov sp, r7
801d706: bd80 pop {r7, pc}
0801d708 <tcp_input>:
* @param p received TCP segment to process (p->payload pointing to the TCP header)
* @param inp network interface on which this segment was received
*/
void
tcp_input(struct pbuf *p, struct netif *inp)
{
801d708: b590 push {r4, r7, lr}
801d70a: b08d sub sp, #52 @ 0x34
801d70c: af04 add r7, sp, #16
801d70e: 6078 str r0, [r7, #4]
801d710: 6039 str r1, [r7, #0]
#endif /* SO_REUSE */
u8_t hdrlen_bytes;
err_t err;
LWIP_UNUSED_ARG(inp);
LWIP_ASSERT_CORE_LOCKED();
801d712: f7f3 fd5f bl 80111d4 <sys_check_core_locking>
LWIP_ASSERT("tcp_input: invalid pbuf", p != NULL);
801d716: 687b ldr r3, [r7, #4]
801d718: 2b00 cmp r3, #0
801d71a: d105 bne.n 801d728 <tcp_input+0x20>
801d71c: 4b9b ldr r3, [pc, #620] @ (801d98c <tcp_input+0x284>)
801d71e: 2283 movs r2, #131 @ 0x83
801d720: 499b ldr r1, [pc, #620] @ (801d990 <tcp_input+0x288>)
801d722: 489c ldr r0, [pc, #624] @ (801d994 <tcp_input+0x28c>)
801d724: f00d f982 bl 802aa2c <iprintf>
PERF_START;
TCP_STATS_INC(tcp.recv);
MIB2_STATS_INC(mib2.tcpinsegs);
tcphdr = (struct tcp_hdr *)p->payload;
801d728: 687b ldr r3, [r7, #4]
801d72a: 685b ldr r3, [r3, #4]
801d72c: 4a9a ldr r2, [pc, #616] @ (801d998 <tcp_input+0x290>)
801d72e: 6013 str r3, [r2, #0]
#if TCP_INPUT_DEBUG
tcp_debug_print(tcphdr);
#endif
/* Check that TCP header fits in payload */
if (p->len < TCP_HLEN) {
801d730: 687b ldr r3, [r7, #4]
801d732: 895b ldrh r3, [r3, #10]
801d734: 2b13 cmp r3, #19
801d736: f240 83d1 bls.w 801dedc <tcp_input+0x7d4>
TCP_STATS_INC(tcp.lenerr);
goto dropped;
}
/* Don't even process incoming broadcasts/multicasts. */
if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
801d73a: 4b98 ldr r3, [pc, #608] @ (801d99c <tcp_input+0x294>)
801d73c: 695b ldr r3, [r3, #20]
801d73e: 4a97 ldr r2, [pc, #604] @ (801d99c <tcp_input+0x294>)
801d740: 6812 ldr r2, [r2, #0]
801d742: 4611 mov r1, r2
801d744: 4618 mov r0, r3
801d746: f008 fc1b bl 8025f80 <ip4_addr_isbroadcast_u32>
801d74a: 4603 mov r3, r0
801d74c: 2b00 cmp r3, #0
801d74e: f040 83c7 bne.w 801dee0 <tcp_input+0x7d8>
ip_addr_ismulticast(ip_current_dest_addr())) {
801d752: 4b92 ldr r3, [pc, #584] @ (801d99c <tcp_input+0x294>)
801d754: 695b ldr r3, [r3, #20]
801d756: f003 03f0 and.w r3, r3, #240 @ 0xf0
if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
801d75a: 2be0 cmp r3, #224 @ 0xe0
801d75c: f000 83c0 beq.w 801dee0 <tcp_input+0x7d8>
}
}
#endif /* CHECKSUM_CHECK_TCP */
/* sanity-check header length */
hdrlen_bytes = TCPH_HDRLEN_BYTES(tcphdr);
801d760: 4b8d ldr r3, [pc, #564] @ (801d998 <tcp_input+0x290>)
801d762: 681b ldr r3, [r3, #0]
801d764: 899b ldrh r3, [r3, #12]
801d766: b29b uxth r3, r3
801d768: 4618 mov r0, r3
801d76a: f7fc fa05 bl 8019b78 <lwip_htons>
801d76e: 4603 mov r3, r0
801d770: 0b1b lsrs r3, r3, #12
801d772: b29b uxth r3, r3
801d774: b2db uxtb r3, r3
801d776: 009b lsls r3, r3, #2
801d778: 74bb strb r3, [r7, #18]
if ((hdrlen_bytes < TCP_HLEN) || (hdrlen_bytes > p->tot_len)) {
801d77a: 7cbb ldrb r3, [r7, #18]
801d77c: 2b13 cmp r3, #19
801d77e: f240 83b1 bls.w 801dee4 <tcp_input+0x7dc>
801d782: 7cbb ldrb r3, [r7, #18]
801d784: b29a uxth r2, r3
801d786: 687b ldr r3, [r7, #4]
801d788: 891b ldrh r3, [r3, #8]
801d78a: 429a cmp r2, r3
801d78c: f200 83aa bhi.w 801dee4 <tcp_input+0x7dc>
goto dropped;
}
/* Move the payload pointer in the pbuf so that it points to the
TCP data instead of the TCP header. */
tcphdr_optlen = (u16_t)(hdrlen_bytes - TCP_HLEN);
801d790: 7cbb ldrb r3, [r7, #18]
801d792: b29b uxth r3, r3
801d794: 3b14 subs r3, #20
801d796: b29a uxth r2, r3
801d798: 4b81 ldr r3, [pc, #516] @ (801d9a0 <tcp_input+0x298>)
801d79a: 801a strh r2, [r3, #0]
tcphdr_opt2 = NULL;
801d79c: 4b81 ldr r3, [pc, #516] @ (801d9a4 <tcp_input+0x29c>)
801d79e: 2200 movs r2, #0
801d7a0: 601a str r2, [r3, #0]
if (p->len >= hdrlen_bytes) {
801d7a2: 687b ldr r3, [r7, #4]
801d7a4: 895a ldrh r2, [r3, #10]
801d7a6: 7cbb ldrb r3, [r7, #18]
801d7a8: b29b uxth r3, r3
801d7aa: 429a cmp r2, r3
801d7ac: d309 bcc.n 801d7c2 <tcp_input+0xba>
/* all options are in the first pbuf */
tcphdr_opt1len = tcphdr_optlen;
801d7ae: 4b7c ldr r3, [pc, #496] @ (801d9a0 <tcp_input+0x298>)
801d7b0: 881a ldrh r2, [r3, #0]
801d7b2: 4b7d ldr r3, [pc, #500] @ (801d9a8 <tcp_input+0x2a0>)
801d7b4: 801a strh r2, [r3, #0]
pbuf_remove_header(p, hdrlen_bytes); /* cannot fail */
801d7b6: 7cbb ldrb r3, [r7, #18]
801d7b8: 4619 mov r1, r3
801d7ba: 6878 ldr r0, [r7, #4]
801d7bc: f7fd fe06 bl 801b3cc <pbuf_remove_header>
801d7c0: e04e b.n 801d860 <tcp_input+0x158>
} else {
u16_t opt2len;
/* TCP header fits into first pbuf, options don't - data is in the next pbuf */
/* there must be a next pbuf, due to hdrlen_bytes sanity check above */
LWIP_ASSERT("p->next != NULL", p->next != NULL);
801d7c2: 687b ldr r3, [r7, #4]
801d7c4: 681b ldr r3, [r3, #0]
801d7c6: 2b00 cmp r3, #0
801d7c8: d105 bne.n 801d7d6 <tcp_input+0xce>
801d7ca: 4b70 ldr r3, [pc, #448] @ (801d98c <tcp_input+0x284>)
801d7cc: 22c2 movs r2, #194 @ 0xc2
801d7ce: 4977 ldr r1, [pc, #476] @ (801d9ac <tcp_input+0x2a4>)
801d7d0: 4870 ldr r0, [pc, #448] @ (801d994 <tcp_input+0x28c>)
801d7d2: f00d f92b bl 802aa2c <iprintf>
/* advance over the TCP header (cannot fail) */
pbuf_remove_header(p, TCP_HLEN);
801d7d6: 2114 movs r1, #20
801d7d8: 6878 ldr r0, [r7, #4]
801d7da: f7fd fdf7 bl 801b3cc <pbuf_remove_header>
/* determine how long the first and second parts of the options are */
tcphdr_opt1len = p->len;
801d7de: 687b ldr r3, [r7, #4]
801d7e0: 895a ldrh r2, [r3, #10]
801d7e2: 4b71 ldr r3, [pc, #452] @ (801d9a8 <tcp_input+0x2a0>)
801d7e4: 801a strh r2, [r3, #0]
opt2len = (u16_t)(tcphdr_optlen - tcphdr_opt1len);
801d7e6: 4b6e ldr r3, [pc, #440] @ (801d9a0 <tcp_input+0x298>)
801d7e8: 881a ldrh r2, [r3, #0]
801d7ea: 4b6f ldr r3, [pc, #444] @ (801d9a8 <tcp_input+0x2a0>)
801d7ec: 881b ldrh r3, [r3, #0]
801d7ee: 1ad3 subs r3, r2, r3
801d7f0: 823b strh r3, [r7, #16]
/* options continue in the next pbuf: set p to zero length and hide the
options in the next pbuf (adjusting p->tot_len) */
pbuf_remove_header(p, tcphdr_opt1len);
801d7f2: 4b6d ldr r3, [pc, #436] @ (801d9a8 <tcp_input+0x2a0>)
801d7f4: 881b ldrh r3, [r3, #0]
801d7f6: 4619 mov r1, r3
801d7f8: 6878 ldr r0, [r7, #4]
801d7fa: f7fd fde7 bl 801b3cc <pbuf_remove_header>
/* check that the options fit in the second pbuf */
if (opt2len > p->next->len) {
801d7fe: 687b ldr r3, [r7, #4]
801d800: 681b ldr r3, [r3, #0]
801d802: 895b ldrh r3, [r3, #10]
801d804: 8a3a ldrh r2, [r7, #16]
801d806: 429a cmp r2, r3
801d808: f200 836e bhi.w 801dee8 <tcp_input+0x7e0>
TCP_STATS_INC(tcp.lenerr);
goto dropped;
}
/* remember the pointer to the second part of the options */
tcphdr_opt2 = (u8_t *)p->next->payload;
801d80c: 687b ldr r3, [r7, #4]
801d80e: 681b ldr r3, [r3, #0]
801d810: 685b ldr r3, [r3, #4]
801d812: 4a64 ldr r2, [pc, #400] @ (801d9a4 <tcp_input+0x29c>)
801d814: 6013 str r3, [r2, #0]
/* advance p->next to point after the options, and manually
adjust p->tot_len to keep it consistent with the changed p->next */
pbuf_remove_header(p->next, opt2len);
801d816: 687b ldr r3, [r7, #4]
801d818: 681b ldr r3, [r3, #0]
801d81a: 8a3a ldrh r2, [r7, #16]
801d81c: 4611 mov r1, r2
801d81e: 4618 mov r0, r3
801d820: f7fd fdd4 bl 801b3cc <pbuf_remove_header>
p->tot_len = (u16_t)(p->tot_len - opt2len);
801d824: 687b ldr r3, [r7, #4]
801d826: 891a ldrh r2, [r3, #8]
801d828: 8a3b ldrh r3, [r7, #16]
801d82a: 1ad3 subs r3, r2, r3
801d82c: b29a uxth r2, r3
801d82e: 687b ldr r3, [r7, #4]
801d830: 811a strh r2, [r3, #8]
LWIP_ASSERT("p->len == 0", p->len == 0);
801d832: 687b ldr r3, [r7, #4]
801d834: 895b ldrh r3, [r3, #10]
801d836: 2b00 cmp r3, #0
801d838: d005 beq.n 801d846 <tcp_input+0x13e>
801d83a: 4b54 ldr r3, [pc, #336] @ (801d98c <tcp_input+0x284>)
801d83c: 22df movs r2, #223 @ 0xdf
801d83e: 495c ldr r1, [pc, #368] @ (801d9b0 <tcp_input+0x2a8>)
801d840: 4854 ldr r0, [pc, #336] @ (801d994 <tcp_input+0x28c>)
801d842: f00d f8f3 bl 802aa2c <iprintf>
LWIP_ASSERT("p->tot_len == p->next->tot_len", p->tot_len == p->next->tot_len);
801d846: 687b ldr r3, [r7, #4]
801d848: 891a ldrh r2, [r3, #8]
801d84a: 687b ldr r3, [r7, #4]
801d84c: 681b ldr r3, [r3, #0]
801d84e: 891b ldrh r3, [r3, #8]
801d850: 429a cmp r2, r3
801d852: d005 beq.n 801d860 <tcp_input+0x158>
801d854: 4b4d ldr r3, [pc, #308] @ (801d98c <tcp_input+0x284>)
801d856: 22e0 movs r2, #224 @ 0xe0
801d858: 4956 ldr r1, [pc, #344] @ (801d9b4 <tcp_input+0x2ac>)
801d85a: 484e ldr r0, [pc, #312] @ (801d994 <tcp_input+0x28c>)
801d85c: f00d f8e6 bl 802aa2c <iprintf>
}
/* Convert fields in TCP header to host byte order. */
tcphdr->src = lwip_ntohs(tcphdr->src);
801d860: 4b4d ldr r3, [pc, #308] @ (801d998 <tcp_input+0x290>)
801d862: 681b ldr r3, [r3, #0]
801d864: 881b ldrh r3, [r3, #0]
801d866: b29b uxth r3, r3
801d868: 4a4b ldr r2, [pc, #300] @ (801d998 <tcp_input+0x290>)
801d86a: 6814 ldr r4, [r2, #0]
801d86c: 4618 mov r0, r3
801d86e: f7fc f983 bl 8019b78 <lwip_htons>
801d872: 4603 mov r3, r0
801d874: 8023 strh r3, [r4, #0]
tcphdr->dest = lwip_ntohs(tcphdr->dest);
801d876: 4b48 ldr r3, [pc, #288] @ (801d998 <tcp_input+0x290>)
801d878: 681b ldr r3, [r3, #0]
801d87a: 885b ldrh r3, [r3, #2]
801d87c: b29b uxth r3, r3
801d87e: 4a46 ldr r2, [pc, #280] @ (801d998 <tcp_input+0x290>)
801d880: 6814 ldr r4, [r2, #0]
801d882: 4618 mov r0, r3
801d884: f7fc f978 bl 8019b78 <lwip_htons>
801d888: 4603 mov r3, r0
801d88a: 8063 strh r3, [r4, #2]
seqno = tcphdr->seqno = lwip_ntohl(tcphdr->seqno);
801d88c: 4b42 ldr r3, [pc, #264] @ (801d998 <tcp_input+0x290>)
801d88e: 681b ldr r3, [r3, #0]
801d890: 685b ldr r3, [r3, #4]
801d892: 4a41 ldr r2, [pc, #260] @ (801d998 <tcp_input+0x290>)
801d894: 6814 ldr r4, [r2, #0]
801d896: 4618 mov r0, r3
801d898: f7fc f983 bl 8019ba2 <lwip_htonl>
801d89c: 4603 mov r3, r0
801d89e: 6063 str r3, [r4, #4]
801d8a0: 6863 ldr r3, [r4, #4]
801d8a2: 4a45 ldr r2, [pc, #276] @ (801d9b8 <tcp_input+0x2b0>)
801d8a4: 6013 str r3, [r2, #0]
ackno = tcphdr->ackno = lwip_ntohl(tcphdr->ackno);
801d8a6: 4b3c ldr r3, [pc, #240] @ (801d998 <tcp_input+0x290>)
801d8a8: 681b ldr r3, [r3, #0]
801d8aa: 689b ldr r3, [r3, #8]
801d8ac: 4a3a ldr r2, [pc, #232] @ (801d998 <tcp_input+0x290>)
801d8ae: 6814 ldr r4, [r2, #0]
801d8b0: 4618 mov r0, r3
801d8b2: f7fc f976 bl 8019ba2 <lwip_htonl>
801d8b6: 4603 mov r3, r0
801d8b8: 60a3 str r3, [r4, #8]
801d8ba: 68a3 ldr r3, [r4, #8]
801d8bc: 4a3f ldr r2, [pc, #252] @ (801d9bc <tcp_input+0x2b4>)
801d8be: 6013 str r3, [r2, #0]
tcphdr->wnd = lwip_ntohs(tcphdr->wnd);
801d8c0: 4b35 ldr r3, [pc, #212] @ (801d998 <tcp_input+0x290>)
801d8c2: 681b ldr r3, [r3, #0]
801d8c4: 89db ldrh r3, [r3, #14]
801d8c6: b29b uxth r3, r3
801d8c8: 4a33 ldr r2, [pc, #204] @ (801d998 <tcp_input+0x290>)
801d8ca: 6814 ldr r4, [r2, #0]
801d8cc: 4618 mov r0, r3
801d8ce: f7fc f953 bl 8019b78 <lwip_htons>
801d8d2: 4603 mov r3, r0
801d8d4: 81e3 strh r3, [r4, #14]
flags = TCPH_FLAGS(tcphdr);
801d8d6: 4b30 ldr r3, [pc, #192] @ (801d998 <tcp_input+0x290>)
801d8d8: 681b ldr r3, [r3, #0]
801d8da: 899b ldrh r3, [r3, #12]
801d8dc: b29b uxth r3, r3
801d8de: 4618 mov r0, r3
801d8e0: f7fc f94a bl 8019b78 <lwip_htons>
801d8e4: 4603 mov r3, r0
801d8e6: b2db uxtb r3, r3
801d8e8: f003 033f and.w r3, r3, #63 @ 0x3f
801d8ec: b2da uxtb r2, r3
801d8ee: 4b34 ldr r3, [pc, #208] @ (801d9c0 <tcp_input+0x2b8>)
801d8f0: 701a strb r2, [r3, #0]
tcplen = p->tot_len;
801d8f2: 687b ldr r3, [r7, #4]
801d8f4: 891a ldrh r2, [r3, #8]
801d8f6: 4b33 ldr r3, [pc, #204] @ (801d9c4 <tcp_input+0x2bc>)
801d8f8: 801a strh r2, [r3, #0]
if (flags & (TCP_FIN | TCP_SYN)) {
801d8fa: 4b31 ldr r3, [pc, #196] @ (801d9c0 <tcp_input+0x2b8>)
801d8fc: 781b ldrb r3, [r3, #0]
801d8fe: f003 0303 and.w r3, r3, #3
801d902: 2b00 cmp r3, #0
801d904: d00c beq.n 801d920 <tcp_input+0x218>
tcplen++;
801d906: 4b2f ldr r3, [pc, #188] @ (801d9c4 <tcp_input+0x2bc>)
801d908: 881b ldrh r3, [r3, #0]
801d90a: 3301 adds r3, #1
801d90c: b29a uxth r2, r3
801d90e: 4b2d ldr r3, [pc, #180] @ (801d9c4 <tcp_input+0x2bc>)
801d910: 801a strh r2, [r3, #0]
if (tcplen < p->tot_len) {
801d912: 687b ldr r3, [r7, #4]
801d914: 891a ldrh r2, [r3, #8]
801d916: 4b2b ldr r3, [pc, #172] @ (801d9c4 <tcp_input+0x2bc>)
801d918: 881b ldrh r3, [r3, #0]
801d91a: 429a cmp r2, r3
801d91c: f200 82e6 bhi.w 801deec <tcp_input+0x7e4>
}
}
/* Demultiplex an incoming segment. First, we check if it is destined
for an active connection. */
prev = NULL;
801d920: 2300 movs r3, #0
801d922: 61fb str r3, [r7, #28]
for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
801d924: 4b28 ldr r3, [pc, #160] @ (801d9c8 <tcp_input+0x2c0>)
801d926: 681b ldr r3, [r3, #0]
801d928: 61bb str r3, [r7, #24]
801d92a: e09d b.n 801da68 <tcp_input+0x360>
LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED);
801d92c: 69bb ldr r3, [r7, #24]
801d92e: 7d1b ldrb r3, [r3, #20]
801d930: 2b00 cmp r3, #0
801d932: d105 bne.n 801d940 <tcp_input+0x238>
801d934: 4b15 ldr r3, [pc, #84] @ (801d98c <tcp_input+0x284>)
801d936: 22fb movs r2, #251 @ 0xfb
801d938: 4924 ldr r1, [pc, #144] @ (801d9cc <tcp_input+0x2c4>)
801d93a: 4816 ldr r0, [pc, #88] @ (801d994 <tcp_input+0x28c>)
801d93c: f00d f876 bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT);
801d940: 69bb ldr r3, [r7, #24]
801d942: 7d1b ldrb r3, [r3, #20]
801d944: 2b0a cmp r3, #10
801d946: d105 bne.n 801d954 <tcp_input+0x24c>
801d948: 4b10 ldr r3, [pc, #64] @ (801d98c <tcp_input+0x284>)
801d94a: 22fc movs r2, #252 @ 0xfc
801d94c: 4920 ldr r1, [pc, #128] @ (801d9d0 <tcp_input+0x2c8>)
801d94e: 4811 ldr r0, [pc, #68] @ (801d994 <tcp_input+0x28c>)
801d950: f00d f86c bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN);
801d954: 69bb ldr r3, [r7, #24]
801d956: 7d1b ldrb r3, [r3, #20]
801d958: 2b01 cmp r3, #1
801d95a: d105 bne.n 801d968 <tcp_input+0x260>
801d95c: 4b0b ldr r3, [pc, #44] @ (801d98c <tcp_input+0x284>)
801d95e: 22fd movs r2, #253 @ 0xfd
801d960: 491c ldr r1, [pc, #112] @ (801d9d4 <tcp_input+0x2cc>)
801d962: 480c ldr r0, [pc, #48] @ (801d994 <tcp_input+0x28c>)
801d964: f00d f862 bl 802aa2c <iprintf>
/* check if PCB is bound to specific netif */
if ((pcb->netif_idx != NETIF_NO_INDEX) &&
801d968: 69bb ldr r3, [r7, #24]
801d96a: 7a1b ldrb r3, [r3, #8]
801d96c: 2b00 cmp r3, #0
801d96e: d033 beq.n 801d9d8 <tcp_input+0x2d0>
(pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
801d970: 69bb ldr r3, [r7, #24]
801d972: 7a1a ldrb r2, [r3, #8]
801d974: 4b09 ldr r3, [pc, #36] @ (801d99c <tcp_input+0x294>)
801d976: 685b ldr r3, [r3, #4]
801d978: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
801d97c: 3301 adds r3, #1
801d97e: b2db uxtb r3, r3
if ((pcb->netif_idx != NETIF_NO_INDEX) &&
801d980: 429a cmp r2, r3
801d982: d029 beq.n 801d9d8 <tcp_input+0x2d0>
prev = pcb;
801d984: 69bb ldr r3, [r7, #24]
801d986: 61fb str r3, [r7, #28]
continue;
801d988: e06b b.n 801da62 <tcp_input+0x35a>
801d98a: bf00 nop
801d98c: 0802ff58 .word 0x0802ff58
801d990: 0802ff8c .word 0x0802ff8c
801d994: 0802ffa4 .word 0x0802ffa4
801d998: 2402afd4 .word 0x2402afd4
801d99c: 24024458 .word 0x24024458
801d9a0: 2402afd8 .word 0x2402afd8
801d9a4: 2402afdc .word 0x2402afdc
801d9a8: 2402afda .word 0x2402afda
801d9ac: 0802ffcc .word 0x0802ffcc
801d9b0: 0802ffdc .word 0x0802ffdc
801d9b4: 0802ffe8 .word 0x0802ffe8
801d9b8: 2402afe4 .word 0x2402afe4
801d9bc: 2402afe8 .word 0x2402afe8
801d9c0: 2402aff0 .word 0x2402aff0
801d9c4: 2402afee .word 0x2402afee
801d9c8: 2402afb4 .word 0x2402afb4
801d9cc: 08030008 .word 0x08030008
801d9d0: 08030030 .word 0x08030030
801d9d4: 0803005c .word 0x0803005c
}
if (pcb->remote_port == tcphdr->src &&
801d9d8: 69bb ldr r3, [r7, #24]
801d9da: 8b1a ldrh r2, [r3, #24]
801d9dc: 4b72 ldr r3, [pc, #456] @ (801dba8 <tcp_input+0x4a0>)
801d9de: 681b ldr r3, [r3, #0]
801d9e0: 881b ldrh r3, [r3, #0]
801d9e2: b29b uxth r3, r3
801d9e4: 429a cmp r2, r3
801d9e6: d13a bne.n 801da5e <tcp_input+0x356>
pcb->local_port == tcphdr->dest &&
801d9e8: 69bb ldr r3, [r7, #24]
801d9ea: 8ada ldrh r2, [r3, #22]
801d9ec: 4b6e ldr r3, [pc, #440] @ (801dba8 <tcp_input+0x4a0>)
801d9ee: 681b ldr r3, [r3, #0]
801d9f0: 885b ldrh r3, [r3, #2]
801d9f2: b29b uxth r3, r3
if (pcb->remote_port == tcphdr->src &&
801d9f4: 429a cmp r2, r3
801d9f6: d132 bne.n 801da5e <tcp_input+0x356>
ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
801d9f8: 69bb ldr r3, [r7, #24]
801d9fa: 685a ldr r2, [r3, #4]
801d9fc: 4b6b ldr r3, [pc, #428] @ (801dbac <tcp_input+0x4a4>)
801d9fe: 691b ldr r3, [r3, #16]
pcb->local_port == tcphdr->dest &&
801da00: 429a cmp r2, r3
801da02: d12c bne.n 801da5e <tcp_input+0x356>
ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
801da04: 69bb ldr r3, [r7, #24]
801da06: 681a ldr r2, [r3, #0]
801da08: 4b68 ldr r3, [pc, #416] @ (801dbac <tcp_input+0x4a4>)
801da0a: 695b ldr r3, [r3, #20]
ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
801da0c: 429a cmp r2, r3
801da0e: d126 bne.n 801da5e <tcp_input+0x356>
/* Move this PCB to the front of the list so that subsequent
lookups will be faster (we exploit locality in TCP segment
arrivals). */
LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb);
801da10: 69bb ldr r3, [r7, #24]
801da12: 68db ldr r3, [r3, #12]
801da14: 69ba ldr r2, [r7, #24]
801da16: 429a cmp r2, r3
801da18: d106 bne.n 801da28 <tcp_input+0x320>
801da1a: 4b65 ldr r3, [pc, #404] @ (801dbb0 <tcp_input+0x4a8>)
801da1c: f240 120d movw r2, #269 @ 0x10d
801da20: 4964 ldr r1, [pc, #400] @ (801dbb4 <tcp_input+0x4ac>)
801da22: 4865 ldr r0, [pc, #404] @ (801dbb8 <tcp_input+0x4b0>)
801da24: f00d f802 bl 802aa2c <iprintf>
if (prev != NULL) {
801da28: 69fb ldr r3, [r7, #28]
801da2a: 2b00 cmp r3, #0
801da2c: d00a beq.n 801da44 <tcp_input+0x33c>
prev->next = pcb->next;
801da2e: 69bb ldr r3, [r7, #24]
801da30: 68da ldr r2, [r3, #12]
801da32: 69fb ldr r3, [r7, #28]
801da34: 60da str r2, [r3, #12]
pcb->next = tcp_active_pcbs;
801da36: 4b61 ldr r3, [pc, #388] @ (801dbbc <tcp_input+0x4b4>)
801da38: 681a ldr r2, [r3, #0]
801da3a: 69bb ldr r3, [r7, #24]
801da3c: 60da str r2, [r3, #12]
tcp_active_pcbs = pcb;
801da3e: 4a5f ldr r2, [pc, #380] @ (801dbbc <tcp_input+0x4b4>)
801da40: 69bb ldr r3, [r7, #24]
801da42: 6013 str r3, [r2, #0]
} else {
TCP_STATS_INC(tcp.cachehit);
}
LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb);
801da44: 69bb ldr r3, [r7, #24]
801da46: 68db ldr r3, [r3, #12]
801da48: 69ba ldr r2, [r7, #24]
801da4a: 429a cmp r2, r3
801da4c: d111 bne.n 801da72 <tcp_input+0x36a>
801da4e: 4b58 ldr r3, [pc, #352] @ (801dbb0 <tcp_input+0x4a8>)
801da50: f240 1215 movw r2, #277 @ 0x115
801da54: 495a ldr r1, [pc, #360] @ (801dbc0 <tcp_input+0x4b8>)
801da56: 4858 ldr r0, [pc, #352] @ (801dbb8 <tcp_input+0x4b0>)
801da58: f00c ffe8 bl 802aa2c <iprintf>
break;
801da5c: e009 b.n 801da72 <tcp_input+0x36a>
}
prev = pcb;
801da5e: 69bb ldr r3, [r7, #24]
801da60: 61fb str r3, [r7, #28]
for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
801da62: 69bb ldr r3, [r7, #24]
801da64: 68db ldr r3, [r3, #12]
801da66: 61bb str r3, [r7, #24]
801da68: 69bb ldr r3, [r7, #24]
801da6a: 2b00 cmp r3, #0
801da6c: f47f af5e bne.w 801d92c <tcp_input+0x224>
801da70: e000 b.n 801da74 <tcp_input+0x36c>
break;
801da72: bf00 nop
}
if (pcb == NULL) {
801da74: 69bb ldr r3, [r7, #24]
801da76: 2b00 cmp r3, #0
801da78: f040 80aa bne.w 801dbd0 <tcp_input+0x4c8>
/* If it did not go to an active connection, we check the connections
in the TIME-WAIT state. */
for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
801da7c: 4b51 ldr r3, [pc, #324] @ (801dbc4 <tcp_input+0x4bc>)
801da7e: 681b ldr r3, [r3, #0]
801da80: 61bb str r3, [r7, #24]
801da82: e03f b.n 801db04 <tcp_input+0x3fc>
LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
801da84: 69bb ldr r3, [r7, #24]
801da86: 7d1b ldrb r3, [r3, #20]
801da88: 2b0a cmp r3, #10
801da8a: d006 beq.n 801da9a <tcp_input+0x392>
801da8c: 4b48 ldr r3, [pc, #288] @ (801dbb0 <tcp_input+0x4a8>)
801da8e: f240 121f movw r2, #287 @ 0x11f
801da92: 494d ldr r1, [pc, #308] @ (801dbc8 <tcp_input+0x4c0>)
801da94: 4848 ldr r0, [pc, #288] @ (801dbb8 <tcp_input+0x4b0>)
801da96: f00c ffc9 bl 802aa2c <iprintf>
/* check if PCB is bound to specific netif */
if ((pcb->netif_idx != NETIF_NO_INDEX) &&
801da9a: 69bb ldr r3, [r7, #24]
801da9c: 7a1b ldrb r3, [r3, #8]
801da9e: 2b00 cmp r3, #0
801daa0: d009 beq.n 801dab6 <tcp_input+0x3ae>
(pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
801daa2: 69bb ldr r3, [r7, #24]
801daa4: 7a1a ldrb r2, [r3, #8]
801daa6: 4b41 ldr r3, [pc, #260] @ (801dbac <tcp_input+0x4a4>)
801daa8: 685b ldr r3, [r3, #4]
801daaa: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
801daae: 3301 adds r3, #1
801dab0: b2db uxtb r3, r3
if ((pcb->netif_idx != NETIF_NO_INDEX) &&
801dab2: 429a cmp r2, r3
801dab4: d122 bne.n 801dafc <tcp_input+0x3f4>
continue;
}
if (pcb->remote_port == tcphdr->src &&
801dab6: 69bb ldr r3, [r7, #24]
801dab8: 8b1a ldrh r2, [r3, #24]
801daba: 4b3b ldr r3, [pc, #236] @ (801dba8 <tcp_input+0x4a0>)
801dabc: 681b ldr r3, [r3, #0]
801dabe: 881b ldrh r3, [r3, #0]
801dac0: b29b uxth r3, r3
801dac2: 429a cmp r2, r3
801dac4: d11b bne.n 801dafe <tcp_input+0x3f6>
pcb->local_port == tcphdr->dest &&
801dac6: 69bb ldr r3, [r7, #24]
801dac8: 8ada ldrh r2, [r3, #22]
801daca: 4b37 ldr r3, [pc, #220] @ (801dba8 <tcp_input+0x4a0>)
801dacc: 681b ldr r3, [r3, #0]
801dace: 885b ldrh r3, [r3, #2]
801dad0: b29b uxth r3, r3
if (pcb->remote_port == tcphdr->src &&
801dad2: 429a cmp r2, r3
801dad4: d113 bne.n 801dafe <tcp_input+0x3f6>
ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
801dad6: 69bb ldr r3, [r7, #24]
801dad8: 685a ldr r2, [r3, #4]
801dada: 4b34 ldr r3, [pc, #208] @ (801dbac <tcp_input+0x4a4>)
801dadc: 691b ldr r3, [r3, #16]
pcb->local_port == tcphdr->dest &&
801dade: 429a cmp r2, r3
801dae0: d10d bne.n 801dafe <tcp_input+0x3f6>
ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
801dae2: 69bb ldr r3, [r7, #24]
801dae4: 681a ldr r2, [r3, #0]
801dae6: 4b31 ldr r3, [pc, #196] @ (801dbac <tcp_input+0x4a4>)
801dae8: 695b ldr r3, [r3, #20]
ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
801daea: 429a cmp r2, r3
801daec: d107 bne.n 801dafe <tcp_input+0x3f6>
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
if (LWIP_HOOK_TCP_INPACKET_PCB(pcb, tcphdr, tcphdr_optlen, tcphdr_opt1len,
tcphdr_opt2, p) == ERR_OK)
#endif
{
tcp_timewait_input(pcb);
801daee: 69b8 ldr r0, [r7, #24]
801daf0: f000 fb56 bl 801e1a0 <tcp_timewait_input>
}
pbuf_free(p);
801daf4: 6878 ldr r0, [r7, #4]
801daf6: f7fd fd21 bl 801b53c <pbuf_free>
return;
801dafa: e1fd b.n 801def8 <tcp_input+0x7f0>
continue;
801dafc: bf00 nop
for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
801dafe: 69bb ldr r3, [r7, #24]
801db00: 68db ldr r3, [r3, #12]
801db02: 61bb str r3, [r7, #24]
801db04: 69bb ldr r3, [r7, #24]
801db06: 2b00 cmp r3, #0
801db08: d1bc bne.n 801da84 <tcp_input+0x37c>
}
}
/* Finally, if we still did not get a match, we check all PCBs that
are LISTENing for incoming connections. */
prev = NULL;
801db0a: 2300 movs r3, #0
801db0c: 61fb str r3, [r7, #28]
for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
801db0e: 4b2f ldr r3, [pc, #188] @ (801dbcc <tcp_input+0x4c4>)
801db10: 681b ldr r3, [r3, #0]
801db12: 617b str r3, [r7, #20]
801db14: e02a b.n 801db6c <tcp_input+0x464>
/* check if PCB is bound to specific netif */
if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
801db16: 697b ldr r3, [r7, #20]
801db18: 7a1b ldrb r3, [r3, #8]
801db1a: 2b00 cmp r3, #0
801db1c: d00c beq.n 801db38 <tcp_input+0x430>
(lpcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
801db1e: 697b ldr r3, [r7, #20]
801db20: 7a1a ldrb r2, [r3, #8]
801db22: 4b22 ldr r3, [pc, #136] @ (801dbac <tcp_input+0x4a4>)
801db24: 685b ldr r3, [r3, #4]
801db26: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
801db2a: 3301 adds r3, #1
801db2c: b2db uxtb r3, r3
if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
801db2e: 429a cmp r2, r3
801db30: d002 beq.n 801db38 <tcp_input+0x430>
prev = (struct tcp_pcb *)lpcb;
801db32: 697b ldr r3, [r7, #20]
801db34: 61fb str r3, [r7, #28]
continue;
801db36: e016 b.n 801db66 <tcp_input+0x45e>
}
if (lpcb->local_port == tcphdr->dest) {
801db38: 697b ldr r3, [r7, #20]
801db3a: 8ada ldrh r2, [r3, #22]
801db3c: 4b1a ldr r3, [pc, #104] @ (801dba8 <tcp_input+0x4a0>)
801db3e: 681b ldr r3, [r3, #0]
801db40: 885b ldrh r3, [r3, #2]
801db42: b29b uxth r3, r3
801db44: 429a cmp r2, r3
801db46: d10c bne.n 801db62 <tcp_input+0x45a>
lpcb_prev = prev;
#else /* SO_REUSE */
break;
#endif /* SO_REUSE */
} else if (IP_ADDR_PCB_VERSION_MATCH_EXACT(lpcb, ip_current_dest_addr())) {
if (ip_addr_cmp(&lpcb->local_ip, ip_current_dest_addr())) {
801db48: 697b ldr r3, [r7, #20]
801db4a: 681a ldr r2, [r3, #0]
801db4c: 4b17 ldr r3, [pc, #92] @ (801dbac <tcp_input+0x4a4>)
801db4e: 695b ldr r3, [r3, #20]
801db50: 429a cmp r2, r3
801db52: d00f beq.n 801db74 <tcp_input+0x46c>
/* found an exact match */
break;
} else if (ip_addr_isany(&lpcb->local_ip)) {
801db54: 697b ldr r3, [r7, #20]
801db56: 2b00 cmp r3, #0
801db58: d00d beq.n 801db76 <tcp_input+0x46e>
801db5a: 697b ldr r3, [r7, #20]
801db5c: 681b ldr r3, [r3, #0]
801db5e: 2b00 cmp r3, #0
801db60: d009 beq.n 801db76 <tcp_input+0x46e>
break;
#endif /* SO_REUSE */
}
}
}
prev = (struct tcp_pcb *)lpcb;
801db62: 697b ldr r3, [r7, #20]
801db64: 61fb str r3, [r7, #28]
for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
801db66: 697b ldr r3, [r7, #20]
801db68: 68db ldr r3, [r3, #12]
801db6a: 617b str r3, [r7, #20]
801db6c: 697b ldr r3, [r7, #20]
801db6e: 2b00 cmp r3, #0
801db70: d1d1 bne.n 801db16 <tcp_input+0x40e>
801db72: e000 b.n 801db76 <tcp_input+0x46e>
break;
801db74: bf00 nop
/* only pass to ANY if no specific local IP has been found */
lpcb = lpcb_any;
prev = lpcb_prev;
}
#endif /* SO_REUSE */
if (lpcb != NULL) {
801db76: 697b ldr r3, [r7, #20]
801db78: 2b00 cmp r3, #0
801db7a: d029 beq.n 801dbd0 <tcp_input+0x4c8>
/* Move this PCB to the front of the list so that subsequent
lookups will be faster (we exploit locality in TCP segment
arrivals). */
if (prev != NULL) {
801db7c: 69fb ldr r3, [r7, #28]
801db7e: 2b00 cmp r3, #0
801db80: d00a beq.n 801db98 <tcp_input+0x490>
((struct tcp_pcb_listen *)prev)->next = lpcb->next;
801db82: 697b ldr r3, [r7, #20]
801db84: 68da ldr r2, [r3, #12]
801db86: 69fb ldr r3, [r7, #28]
801db88: 60da str r2, [r3, #12]
/* our successor is the remainder of the listening list */
lpcb->next = tcp_listen_pcbs.listen_pcbs;
801db8a: 4b10 ldr r3, [pc, #64] @ (801dbcc <tcp_input+0x4c4>)
801db8c: 681a ldr r2, [r3, #0]
801db8e: 697b ldr r3, [r7, #20]
801db90: 60da str r2, [r3, #12]
/* put this listening pcb at the head of the listening list */
tcp_listen_pcbs.listen_pcbs = lpcb;
801db92: 4a0e ldr r2, [pc, #56] @ (801dbcc <tcp_input+0x4c4>)
801db94: 697b ldr r3, [r7, #20]
801db96: 6013 str r3, [r2, #0]
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
if (LWIP_HOOK_TCP_INPACKET_PCB((struct tcp_pcb *)lpcb, tcphdr, tcphdr_optlen,
tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK)
#endif
{
tcp_listen_input(lpcb);
801db98: 6978 ldr r0, [r7, #20]
801db9a: f000 fa03 bl 801dfa4 <tcp_listen_input>
}
pbuf_free(p);
801db9e: 6878 ldr r0, [r7, #4]
801dba0: f7fd fccc bl 801b53c <pbuf_free>
return;
801dba4: e1a8 b.n 801def8 <tcp_input+0x7f0>
801dba6: bf00 nop
801dba8: 2402afd4 .word 0x2402afd4
801dbac: 24024458 .word 0x24024458
801dbb0: 0802ff58 .word 0x0802ff58
801dbb4: 08030084 .word 0x08030084
801dbb8: 0802ffa4 .word 0x0802ffa4
801dbbc: 2402afb4 .word 0x2402afb4
801dbc0: 080300b0 .word 0x080300b0
801dbc4: 2402afb8 .word 0x2402afb8
801dbc8: 080300dc .word 0x080300dc
801dbcc: 2402afb0 .word 0x2402afb0
tcphdr_opt1len, tcphdr_opt2, p) != ERR_OK) {
pbuf_free(p);
return;
}
#endif
if (pcb != NULL) {
801dbd0: 69bb ldr r3, [r7, #24]
801dbd2: 2b00 cmp r3, #0
801dbd4: f000 8158 beq.w 801de88 <tcp_input+0x780>
#if TCP_INPUT_DEBUG
tcp_debug_print_state(pcb->state);
#endif /* TCP_INPUT_DEBUG */
/* Set up a tcp_seg structure. */
inseg.next = NULL;
801dbd8: 4b95 ldr r3, [pc, #596] @ (801de30 <tcp_input+0x728>)
801dbda: 2200 movs r2, #0
801dbdc: 601a str r2, [r3, #0]
inseg.len = p->tot_len;
801dbde: 687b ldr r3, [r7, #4]
801dbe0: 891a ldrh r2, [r3, #8]
801dbe2: 4b93 ldr r3, [pc, #588] @ (801de30 <tcp_input+0x728>)
801dbe4: 811a strh r2, [r3, #8]
inseg.p = p;
801dbe6: 4a92 ldr r2, [pc, #584] @ (801de30 <tcp_input+0x728>)
801dbe8: 687b ldr r3, [r7, #4]
801dbea: 6053 str r3, [r2, #4]
inseg.tcphdr = tcphdr;
801dbec: 4b91 ldr r3, [pc, #580] @ (801de34 <tcp_input+0x72c>)
801dbee: 681b ldr r3, [r3, #0]
801dbf0: 4a8f ldr r2, [pc, #572] @ (801de30 <tcp_input+0x728>)
801dbf2: 6113 str r3, [r2, #16]
recv_data = NULL;
801dbf4: 4b90 ldr r3, [pc, #576] @ (801de38 <tcp_input+0x730>)
801dbf6: 2200 movs r2, #0
801dbf8: 601a str r2, [r3, #0]
recv_flags = 0;
801dbfa: 4b90 ldr r3, [pc, #576] @ (801de3c <tcp_input+0x734>)
801dbfc: 2200 movs r2, #0
801dbfe: 701a strb r2, [r3, #0]
recv_acked = 0;
801dc00: 4b8f ldr r3, [pc, #572] @ (801de40 <tcp_input+0x738>)
801dc02: 2200 movs r2, #0
801dc04: 801a strh r2, [r3, #0]
if (flags & TCP_PSH) {
801dc06: 4b8f ldr r3, [pc, #572] @ (801de44 <tcp_input+0x73c>)
801dc08: 781b ldrb r3, [r3, #0]
801dc0a: f003 0308 and.w r3, r3, #8
801dc0e: 2b00 cmp r3, #0
801dc10: d006 beq.n 801dc20 <tcp_input+0x518>
p->flags |= PBUF_FLAG_PUSH;
801dc12: 687b ldr r3, [r7, #4]
801dc14: 7b5b ldrb r3, [r3, #13]
801dc16: f043 0301 orr.w r3, r3, #1
801dc1a: b2da uxtb r2, r3
801dc1c: 687b ldr r3, [r7, #4]
801dc1e: 735a strb r2, [r3, #13]
}
/* If there is data which was previously "refused" by upper layer */
if (pcb->refused_data != NULL) {
801dc20: 69bb ldr r3, [r7, #24]
801dc22: 6f9b ldr r3, [r3, #120] @ 0x78
801dc24: 2b00 cmp r3, #0
801dc26: d017 beq.n 801dc58 <tcp_input+0x550>
if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
801dc28: 69b8 ldr r0, [r7, #24]
801dc2a: f7ff f84d bl 801ccc8 <tcp_process_refused_data>
801dc2e: 4603 mov r3, r0
801dc30: f113 0f0d cmn.w r3, #13
801dc34: d007 beq.n 801dc46 <tcp_input+0x53e>
((pcb->refused_data != NULL) && (tcplen > 0))) {
801dc36: 69bb ldr r3, [r7, #24]
801dc38: 6f9b ldr r3, [r3, #120] @ 0x78
if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
801dc3a: 2b00 cmp r3, #0
801dc3c: d00c beq.n 801dc58 <tcp_input+0x550>
((pcb->refused_data != NULL) && (tcplen > 0))) {
801dc3e: 4b82 ldr r3, [pc, #520] @ (801de48 <tcp_input+0x740>)
801dc40: 881b ldrh r3, [r3, #0]
801dc42: 2b00 cmp r3, #0
801dc44: d008 beq.n 801dc58 <tcp_input+0x550>
/* pcb has been aborted or refused data is still refused and the new
segment contains data */
if (pcb->rcv_ann_wnd == 0) {
801dc46: 69bb ldr r3, [r7, #24]
801dc48: 8d5b ldrh r3, [r3, #42] @ 0x2a
801dc4a: 2b00 cmp r3, #0
801dc4c: f040 80e4 bne.w 801de18 <tcp_input+0x710>
/* this is a zero-window probe, we respond to it with current RCV.NXT
and drop the data segment */
tcp_send_empty_ack(pcb);
801dc50: 69b8 ldr r0, [r7, #24]
801dc52: f003 fe73 bl 802193c <tcp_send_empty_ack>
}
TCP_STATS_INC(tcp.drop);
MIB2_STATS_INC(mib2.tcpinerrs);
goto aborted;
801dc56: e0df b.n 801de18 <tcp_input+0x710>
}
}
tcp_input_pcb = pcb;
801dc58: 4a7c ldr r2, [pc, #496] @ (801de4c <tcp_input+0x744>)
801dc5a: 69bb ldr r3, [r7, #24]
801dc5c: 6013 str r3, [r2, #0]
err = tcp_process(pcb);
801dc5e: 69b8 ldr r0, [r7, #24]
801dc60: f000 fb18 bl 801e294 <tcp_process>
801dc64: 4603 mov r3, r0
801dc66: 74fb strb r3, [r7, #19]
/* A return value of ERR_ABRT means that tcp_abort() was called
and that the pcb has been freed. If so, we don't do anything. */
if (err != ERR_ABRT) {
801dc68: f997 3013 ldrsb.w r3, [r7, #19]
801dc6c: f113 0f0d cmn.w r3, #13
801dc70: f000 80d4 beq.w 801de1c <tcp_input+0x714>
if (recv_flags & TF_RESET) {
801dc74: 4b71 ldr r3, [pc, #452] @ (801de3c <tcp_input+0x734>)
801dc76: 781b ldrb r3, [r3, #0]
801dc78: f003 0308 and.w r3, r3, #8
801dc7c: 2b00 cmp r3, #0
801dc7e: d015 beq.n 801dcac <tcp_input+0x5a4>
/* TF_RESET means that the connection was reset by the other
end. We then call the error callback to inform the
application that the connection is dead before we
deallocate the PCB. */
TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_RST);
801dc80: 69bb ldr r3, [r7, #24]
801dc82: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
801dc86: 2b00 cmp r3, #0
801dc88: d008 beq.n 801dc9c <tcp_input+0x594>
801dc8a: 69bb ldr r3, [r7, #24]
801dc8c: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
801dc90: 69ba ldr r2, [r7, #24]
801dc92: 6912 ldr r2, [r2, #16]
801dc94: f06f 010d mvn.w r1, #13
801dc98: 4610 mov r0, r2
801dc9a: 4798 blx r3
tcp_pcb_remove(&tcp_active_pcbs, pcb);
801dc9c: 69b9 ldr r1, [r7, #24]
801dc9e: 486c ldr r0, [pc, #432] @ (801de50 <tcp_input+0x748>)
801dca0: f7ff fbba bl 801d418 <tcp_pcb_remove>
tcp_free(pcb);
801dca4: 69b8 ldr r0, [r7, #24]
801dca6: f7fd ff05 bl 801bab4 <tcp_free>
801dcaa: e0da b.n 801de62 <tcp_input+0x75a>
} else {
err = ERR_OK;
801dcac: 2300 movs r3, #0
801dcae: 74fb strb r3, [r7, #19]
/* If the application has registered a "sent" function to be
called when new send buffer space is available, we call it
now. */
if (recv_acked > 0) {
801dcb0: 4b63 ldr r3, [pc, #396] @ (801de40 <tcp_input+0x738>)
801dcb2: 881b ldrh r3, [r3, #0]
801dcb4: 2b00 cmp r3, #0
801dcb6: d01d beq.n 801dcf4 <tcp_input+0x5ec>
while (acked > 0) {
acked16 = (u16_t)LWIP_MIN(acked, 0xffffu);
acked -= acked16;
#else
{
acked16 = recv_acked;
801dcb8: 4b61 ldr r3, [pc, #388] @ (801de40 <tcp_input+0x738>)
801dcba: 881b ldrh r3, [r3, #0]
801dcbc: 81fb strh r3, [r7, #14]
#endif
TCP_EVENT_SENT(pcb, (u16_t)acked16, err);
801dcbe: 69bb ldr r3, [r7, #24]
801dcc0: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
801dcc4: 2b00 cmp r3, #0
801dcc6: d00a beq.n 801dcde <tcp_input+0x5d6>
801dcc8: 69bb ldr r3, [r7, #24]
801dcca: f8d3 3080 ldr.w r3, [r3, #128] @ 0x80
801dcce: 69ba ldr r2, [r7, #24]
801dcd0: 6910 ldr r0, [r2, #16]
801dcd2: 89fa ldrh r2, [r7, #14]
801dcd4: 69b9 ldr r1, [r7, #24]
801dcd6: 4798 blx r3
801dcd8: 4603 mov r3, r0
801dcda: 74fb strb r3, [r7, #19]
801dcdc: e001 b.n 801dce2 <tcp_input+0x5da>
801dcde: 2300 movs r3, #0
801dce0: 74fb strb r3, [r7, #19]
if (err == ERR_ABRT) {
801dce2: f997 3013 ldrsb.w r3, [r7, #19]
801dce6: f113 0f0d cmn.w r3, #13
801dcea: f000 8099 beq.w 801de20 <tcp_input+0x718>
goto aborted;
}
}
recv_acked = 0;
801dcee: 4b54 ldr r3, [pc, #336] @ (801de40 <tcp_input+0x738>)
801dcf0: 2200 movs r2, #0
801dcf2: 801a strh r2, [r3, #0]
}
if (tcp_input_delayed_close(pcb)) {
801dcf4: 69b8 ldr r0, [r7, #24]
801dcf6: f000 f915 bl 801df24 <tcp_input_delayed_close>
801dcfa: 4603 mov r3, r0
801dcfc: 2b00 cmp r3, #0
801dcfe: f040 8091 bne.w 801de24 <tcp_input+0x71c>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
while (recv_data != NULL) {
struct pbuf *rest = NULL;
pbuf_split_64k(recv_data, &rest);
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
if (recv_data != NULL) {
801dd02: 4b4d ldr r3, [pc, #308] @ (801de38 <tcp_input+0x730>)
801dd04: 681b ldr r3, [r3, #0]
801dd06: 2b00 cmp r3, #0
801dd08: d041 beq.n 801dd8e <tcp_input+0x686>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL);
801dd0a: 69bb ldr r3, [r7, #24]
801dd0c: 6f9b ldr r3, [r3, #120] @ 0x78
801dd0e: 2b00 cmp r3, #0
801dd10: d006 beq.n 801dd20 <tcp_input+0x618>
801dd12: 4b50 ldr r3, [pc, #320] @ (801de54 <tcp_input+0x74c>)
801dd14: f44f 72f3 mov.w r2, #486 @ 0x1e6
801dd18: 494f ldr r1, [pc, #316] @ (801de58 <tcp_input+0x750>)
801dd1a: 4850 ldr r0, [pc, #320] @ (801de5c <tcp_input+0x754>)
801dd1c: f00c fe86 bl 802aa2c <iprintf>
if (pcb->flags & TF_RXCLOSED) {
801dd20: 69bb ldr r3, [r7, #24]
801dd22: 8b5b ldrh r3, [r3, #26]
801dd24: f003 0310 and.w r3, r3, #16
801dd28: 2b00 cmp r3, #0
801dd2a: d008 beq.n 801dd3e <tcp_input+0x636>
/* received data although already closed -> abort (send RST) to
notify the remote host that not all data has been processed */
pbuf_free(recv_data);
801dd2c: 4b42 ldr r3, [pc, #264] @ (801de38 <tcp_input+0x730>)
801dd2e: 681b ldr r3, [r3, #0]
801dd30: 4618 mov r0, r3
801dd32: f7fd fc03 bl 801b53c <pbuf_free>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
if (rest != NULL) {
pbuf_free(rest);
}
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
tcp_abort(pcb);
801dd36: 69b8 ldr r0, [r7, #24]
801dd38: f7fe fa06 bl 801c148 <tcp_abort>
goto aborted;
801dd3c: e091 b.n 801de62 <tcp_input+0x75a>
}
/* Notify application that data has been received. */
TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err);
801dd3e: 69bb ldr r3, [r7, #24]
801dd40: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
801dd44: 2b00 cmp r3, #0
801dd46: d00c beq.n 801dd62 <tcp_input+0x65a>
801dd48: 69bb ldr r3, [r7, #24]
801dd4a: f8d3 4084 ldr.w r4, [r3, #132] @ 0x84
801dd4e: 69bb ldr r3, [r7, #24]
801dd50: 6918 ldr r0, [r3, #16]
801dd52: 4b39 ldr r3, [pc, #228] @ (801de38 <tcp_input+0x730>)
801dd54: 681a ldr r2, [r3, #0]
801dd56: 2300 movs r3, #0
801dd58: 69b9 ldr r1, [r7, #24]
801dd5a: 47a0 blx r4
801dd5c: 4603 mov r3, r0
801dd5e: 74fb strb r3, [r7, #19]
801dd60: e008 b.n 801dd74 <tcp_input+0x66c>
801dd62: 4b35 ldr r3, [pc, #212] @ (801de38 <tcp_input+0x730>)
801dd64: 681a ldr r2, [r3, #0]
801dd66: 2300 movs r3, #0
801dd68: 69b9 ldr r1, [r7, #24]
801dd6a: 2000 movs r0, #0
801dd6c: f7ff f884 bl 801ce78 <tcp_recv_null>
801dd70: 4603 mov r3, r0
801dd72: 74fb strb r3, [r7, #19]
if (err == ERR_ABRT) {
801dd74: f997 3013 ldrsb.w r3, [r7, #19]
801dd78: f113 0f0d cmn.w r3, #13
801dd7c: d054 beq.n 801de28 <tcp_input+0x720>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
goto aborted;
}
/* If the upper layer can't receive this data, store it */
if (err != ERR_OK) {
801dd7e: f997 3013 ldrsb.w r3, [r7, #19]
801dd82: 2b00 cmp r3, #0
801dd84: d003 beq.n 801dd8e <tcp_input+0x686>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
if (rest != NULL) {
pbuf_cat(recv_data, rest);
}
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
pcb->refused_data = recv_data;
801dd86: 4b2c ldr r3, [pc, #176] @ (801de38 <tcp_input+0x730>)
801dd88: 681a ldr r2, [r3, #0]
801dd8a: 69bb ldr r3, [r7, #24]
801dd8c: 679a str r2, [r3, #120] @ 0x78
}
}
/* If a FIN segment was received, we call the callback
function with a NULL buffer to indicate EOF. */
if (recv_flags & TF_GOT_FIN) {
801dd8e: 4b2b ldr r3, [pc, #172] @ (801de3c <tcp_input+0x734>)
801dd90: 781b ldrb r3, [r3, #0]
801dd92: f003 0320 and.w r3, r3, #32
801dd96: 2b00 cmp r3, #0
801dd98: d031 beq.n 801ddfe <tcp_input+0x6f6>
if (pcb->refused_data != NULL) {
801dd9a: 69bb ldr r3, [r7, #24]
801dd9c: 6f9b ldr r3, [r3, #120] @ 0x78
801dd9e: 2b00 cmp r3, #0
801dda0: d009 beq.n 801ddb6 <tcp_input+0x6ae>
/* Delay this if we have refused data. */
pcb->refused_data->flags |= PBUF_FLAG_TCP_FIN;
801dda2: 69bb ldr r3, [r7, #24]
801dda4: 6f9b ldr r3, [r3, #120] @ 0x78
801dda6: 7b5a ldrb r2, [r3, #13]
801dda8: 69bb ldr r3, [r7, #24]
801ddaa: 6f9b ldr r3, [r3, #120] @ 0x78
801ddac: f042 0220 orr.w r2, r2, #32
801ddb0: b2d2 uxtb r2, r2
801ddb2: 735a strb r2, [r3, #13]
801ddb4: e023 b.n 801ddfe <tcp_input+0x6f6>
} else {
/* correct rcv_wnd as the application won't call tcp_recved()
for the FIN's seqno */
if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
801ddb6: 69bb ldr r3, [r7, #24]
801ddb8: 8d1b ldrh r3, [r3, #40] @ 0x28
801ddba: f241 62d0 movw r2, #5840 @ 0x16d0
801ddbe: 4293 cmp r3, r2
801ddc0: d005 beq.n 801ddce <tcp_input+0x6c6>
pcb->rcv_wnd++;
801ddc2: 69bb ldr r3, [r7, #24]
801ddc4: 8d1b ldrh r3, [r3, #40] @ 0x28
801ddc6: 3301 adds r3, #1
801ddc8: b29a uxth r2, r3
801ddca: 69bb ldr r3, [r7, #24]
801ddcc: 851a strh r2, [r3, #40] @ 0x28
}
TCP_EVENT_CLOSED(pcb, err);
801ddce: 69bb ldr r3, [r7, #24]
801ddd0: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
801ddd4: 2b00 cmp r3, #0
801ddd6: d00b beq.n 801ddf0 <tcp_input+0x6e8>
801ddd8: 69bb ldr r3, [r7, #24]
801ddda: f8d3 4084 ldr.w r4, [r3, #132] @ 0x84
801ddde: 69bb ldr r3, [r7, #24]
801dde0: 6918 ldr r0, [r3, #16]
801dde2: 2300 movs r3, #0
801dde4: 2200 movs r2, #0
801dde6: 69b9 ldr r1, [r7, #24]
801dde8: 47a0 blx r4
801ddea: 4603 mov r3, r0
801ddec: 74fb strb r3, [r7, #19]
801ddee: e001 b.n 801ddf4 <tcp_input+0x6ec>
801ddf0: 2300 movs r3, #0
801ddf2: 74fb strb r3, [r7, #19]
if (err == ERR_ABRT) {
801ddf4: f997 3013 ldrsb.w r3, [r7, #19]
801ddf8: f113 0f0d cmn.w r3, #13
801ddfc: d016 beq.n 801de2c <tcp_input+0x724>
goto aborted;
}
}
}
tcp_input_pcb = NULL;
801ddfe: 4b13 ldr r3, [pc, #76] @ (801de4c <tcp_input+0x744>)
801de00: 2200 movs r2, #0
801de02: 601a str r2, [r3, #0]
if (tcp_input_delayed_close(pcb)) {
801de04: 69b8 ldr r0, [r7, #24]
801de06: f000 f88d bl 801df24 <tcp_input_delayed_close>
801de0a: 4603 mov r3, r0
801de0c: 2b00 cmp r3, #0
801de0e: d127 bne.n 801de60 <tcp_input+0x758>
goto aborted;
}
/* Try to send something out. */
tcp_output(pcb);
801de10: 69b8 ldr r0, [r7, #24]
801de12: f002 ff7f bl 8020d14 <tcp_output>
801de16: e024 b.n 801de62 <tcp_input+0x75a>
goto aborted;
801de18: bf00 nop
801de1a: e022 b.n 801de62 <tcp_input+0x75a>
#endif /* TCP_INPUT_DEBUG */
}
}
/* Jump target if pcb has been aborted in a callback (by calling tcp_abort()).
Below this line, 'pcb' may not be dereferenced! */
aborted:
801de1c: bf00 nop
801de1e: e020 b.n 801de62 <tcp_input+0x75a>
goto aborted;
801de20: bf00 nop
801de22: e01e b.n 801de62 <tcp_input+0x75a>
goto aborted;
801de24: bf00 nop
801de26: e01c b.n 801de62 <tcp_input+0x75a>
goto aborted;
801de28: bf00 nop
801de2a: e01a b.n 801de62 <tcp_input+0x75a>
goto aborted;
801de2c: bf00 nop
801de2e: e018 b.n 801de62 <tcp_input+0x75a>
801de30: 2402afc0 .word 0x2402afc0
801de34: 2402afd4 .word 0x2402afd4
801de38: 2402aff4 .word 0x2402aff4
801de3c: 2402aff1 .word 0x2402aff1
801de40: 2402afec .word 0x2402afec
801de44: 2402aff0 .word 0x2402aff0
801de48: 2402afee .word 0x2402afee
801de4c: 2402aff8 .word 0x2402aff8
801de50: 2402afb4 .word 0x2402afb4
801de54: 0802ff58 .word 0x0802ff58
801de58: 0803010c .word 0x0803010c
801de5c: 0802ffa4 .word 0x0802ffa4
goto aborted;
801de60: bf00 nop
tcp_input_pcb = NULL;
801de62: 4b27 ldr r3, [pc, #156] @ (801df00 <tcp_input+0x7f8>)
801de64: 2200 movs r2, #0
801de66: 601a str r2, [r3, #0]
recv_data = NULL;
801de68: 4b26 ldr r3, [pc, #152] @ (801df04 <tcp_input+0x7fc>)
801de6a: 2200 movs r2, #0
801de6c: 601a str r2, [r3, #0]
/* give up our reference to inseg.p */
if (inseg.p != NULL) {
801de6e: 4b26 ldr r3, [pc, #152] @ (801df08 <tcp_input+0x800>)
801de70: 685b ldr r3, [r3, #4]
801de72: 2b00 cmp r3, #0
801de74: d03f beq.n 801def6 <tcp_input+0x7ee>
pbuf_free(inseg.p);
801de76: 4b24 ldr r3, [pc, #144] @ (801df08 <tcp_input+0x800>)
801de78: 685b ldr r3, [r3, #4]
801de7a: 4618 mov r0, r3
801de7c: f7fd fb5e bl 801b53c <pbuf_free>
inseg.p = NULL;
801de80: 4b21 ldr r3, [pc, #132] @ (801df08 <tcp_input+0x800>)
801de82: 2200 movs r2, #0
801de84: 605a str r2, [r3, #4]
pbuf_free(p);
}
LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane());
PERF_STOP("tcp_input");
return;
801de86: e036 b.n 801def6 <tcp_input+0x7ee>
if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) {
801de88: 4b20 ldr r3, [pc, #128] @ (801df0c <tcp_input+0x804>)
801de8a: 681b ldr r3, [r3, #0]
801de8c: 899b ldrh r3, [r3, #12]
801de8e: b29b uxth r3, r3
801de90: 4618 mov r0, r3
801de92: f7fb fe71 bl 8019b78 <lwip_htons>
801de96: 4603 mov r3, r0
801de98: b2db uxtb r3, r3
801de9a: f003 0304 and.w r3, r3, #4
801de9e: 2b00 cmp r3, #0
801dea0: d118 bne.n 801ded4 <tcp_input+0x7cc>
tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
801dea2: 4b1b ldr r3, [pc, #108] @ (801df10 <tcp_input+0x808>)
801dea4: 6819 ldr r1, [r3, #0]
801dea6: 4b1b ldr r3, [pc, #108] @ (801df14 <tcp_input+0x80c>)
801dea8: 881b ldrh r3, [r3, #0]
801deaa: 461a mov r2, r3
801deac: 4b1a ldr r3, [pc, #104] @ (801df18 <tcp_input+0x810>)
801deae: 681b ldr r3, [r3, #0]
801deb0: 18d0 adds r0, r2, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801deb2: 4b16 ldr r3, [pc, #88] @ (801df0c <tcp_input+0x804>)
801deb4: 681b ldr r3, [r3, #0]
tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
801deb6: 885b ldrh r3, [r3, #2]
801deb8: b29b uxth r3, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801deba: 4a14 ldr r2, [pc, #80] @ (801df0c <tcp_input+0x804>)
801debc: 6812 ldr r2, [r2, #0]
tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
801debe: 8812 ldrh r2, [r2, #0]
801dec0: b292 uxth r2, r2
801dec2: 9202 str r2, [sp, #8]
801dec4: 9301 str r3, [sp, #4]
801dec6: 4b15 ldr r3, [pc, #84] @ (801df1c <tcp_input+0x814>)
801dec8: 9300 str r3, [sp, #0]
801deca: 4b15 ldr r3, [pc, #84] @ (801df20 <tcp_input+0x818>)
801decc: 4602 mov r2, r0
801dece: 2000 movs r0, #0
801ded0: f003 fce2 bl 8021898 <tcp_rst>
pbuf_free(p);
801ded4: 6878 ldr r0, [r7, #4]
801ded6: f7fd fb31 bl 801b53c <pbuf_free>
return;
801deda: e00c b.n 801def6 <tcp_input+0x7ee>
goto dropped;
801dedc: bf00 nop
801dede: e006 b.n 801deee <tcp_input+0x7e6>
goto dropped;
801dee0: bf00 nop
801dee2: e004 b.n 801deee <tcp_input+0x7e6>
goto dropped;
801dee4: bf00 nop
801dee6: e002 b.n 801deee <tcp_input+0x7e6>
goto dropped;
801dee8: bf00 nop
801deea: e000 b.n 801deee <tcp_input+0x7e6>
goto dropped;
801deec: bf00 nop
dropped:
TCP_STATS_INC(tcp.drop);
MIB2_STATS_INC(mib2.tcpinerrs);
pbuf_free(p);
801deee: 6878 ldr r0, [r7, #4]
801def0: f7fd fb24 bl 801b53c <pbuf_free>
801def4: e000 b.n 801def8 <tcp_input+0x7f0>
return;
801def6: bf00 nop
}
801def8: 3724 adds r7, #36 @ 0x24
801defa: 46bd mov sp, r7
801defc: bd90 pop {r4, r7, pc}
801defe: bf00 nop
801df00: 2402aff8 .word 0x2402aff8
801df04: 2402aff4 .word 0x2402aff4
801df08: 2402afc0 .word 0x2402afc0
801df0c: 2402afd4 .word 0x2402afd4
801df10: 2402afe8 .word 0x2402afe8
801df14: 2402afee .word 0x2402afee
801df18: 2402afe4 .word 0x2402afe4
801df1c: 24024468 .word 0x24024468
801df20: 2402446c .word 0x2402446c
0801df24 <tcp_input_delayed_close>:
* any more.
* @returns 1 if the pcb has been closed and deallocated, 0 otherwise
*/
static int
tcp_input_delayed_close(struct tcp_pcb *pcb)
{
801df24: b580 push {r7, lr}
801df26: b082 sub sp, #8
801df28: af00 add r7, sp, #0
801df2a: 6078 str r0, [r7, #4]
LWIP_ASSERT("tcp_input_delayed_close: invalid pcb", pcb != NULL);
801df2c: 687b ldr r3, [r7, #4]
801df2e: 2b00 cmp r3, #0
801df30: d106 bne.n 801df40 <tcp_input_delayed_close+0x1c>
801df32: 4b17 ldr r3, [pc, #92] @ (801df90 <tcp_input_delayed_close+0x6c>)
801df34: f240 225a movw r2, #602 @ 0x25a
801df38: 4916 ldr r1, [pc, #88] @ (801df94 <tcp_input_delayed_close+0x70>)
801df3a: 4817 ldr r0, [pc, #92] @ (801df98 <tcp_input_delayed_close+0x74>)
801df3c: f00c fd76 bl 802aa2c <iprintf>
if (recv_flags & TF_CLOSED) {
801df40: 4b16 ldr r3, [pc, #88] @ (801df9c <tcp_input_delayed_close+0x78>)
801df42: 781b ldrb r3, [r3, #0]
801df44: f003 0310 and.w r3, r3, #16
801df48: 2b00 cmp r3, #0
801df4a: d01c beq.n 801df86 <tcp_input_delayed_close+0x62>
/* The connection has been closed and we will deallocate the
PCB. */
if (!(pcb->flags & TF_RXCLOSED)) {
801df4c: 687b ldr r3, [r7, #4]
801df4e: 8b5b ldrh r3, [r3, #26]
801df50: f003 0310 and.w r3, r3, #16
801df54: 2b00 cmp r3, #0
801df56: d10d bne.n 801df74 <tcp_input_delayed_close+0x50>
/* Connection closed although the application has only shut down the
tx side: call the PCB's err callback and indicate the closure to
ensure the application doesn't continue using the PCB. */
TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_CLSD);
801df58: 687b ldr r3, [r7, #4]
801df5a: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
801df5e: 2b00 cmp r3, #0
801df60: d008 beq.n 801df74 <tcp_input_delayed_close+0x50>
801df62: 687b ldr r3, [r7, #4]
801df64: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90
801df68: 687a ldr r2, [r7, #4]
801df6a: 6912 ldr r2, [r2, #16]
801df6c: f06f 010e mvn.w r1, #14
801df70: 4610 mov r0, r2
801df72: 4798 blx r3
}
tcp_pcb_remove(&tcp_active_pcbs, pcb);
801df74: 6879 ldr r1, [r7, #4]
801df76: 480a ldr r0, [pc, #40] @ (801dfa0 <tcp_input_delayed_close+0x7c>)
801df78: f7ff fa4e bl 801d418 <tcp_pcb_remove>
tcp_free(pcb);
801df7c: 6878 ldr r0, [r7, #4]
801df7e: f7fd fd99 bl 801bab4 <tcp_free>
return 1;
801df82: 2301 movs r3, #1
801df84: e000 b.n 801df88 <tcp_input_delayed_close+0x64>
}
return 0;
801df86: 2300 movs r3, #0
}
801df88: 4618 mov r0, r3
801df8a: 3708 adds r7, #8
801df8c: 46bd mov sp, r7
801df8e: bd80 pop {r7, pc}
801df90: 0802ff58 .word 0x0802ff58
801df94: 08030128 .word 0x08030128
801df98: 0802ffa4 .word 0x0802ffa4
801df9c: 2402aff1 .word 0x2402aff1
801dfa0: 2402afb4 .word 0x2402afb4
0801dfa4 <tcp_listen_input>:
* @note the segment which arrived is saved in global variables, therefore only the pcb
* involved is passed as a parameter to this function
*/
static void
tcp_listen_input(struct tcp_pcb_listen *pcb)
{
801dfa4: b590 push {r4, r7, lr}
801dfa6: b08b sub sp, #44 @ 0x2c
801dfa8: af04 add r7, sp, #16
801dfaa: 6078 str r0, [r7, #4]
struct tcp_pcb *npcb;
u32_t iss;
err_t rc;
if (flags & TCP_RST) {
801dfac: 4b6f ldr r3, [pc, #444] @ (801e16c <tcp_listen_input+0x1c8>)
801dfae: 781b ldrb r3, [r3, #0]
801dfb0: f003 0304 and.w r3, r3, #4
801dfb4: 2b00 cmp r3, #0
801dfb6: f040 80d2 bne.w 801e15e <tcp_listen_input+0x1ba>
/* An incoming RST should be ignored. Return. */
return;
}
LWIP_ASSERT("tcp_listen_input: invalid pcb", pcb != NULL);
801dfba: 687b ldr r3, [r7, #4]
801dfbc: 2b00 cmp r3, #0
801dfbe: d106 bne.n 801dfce <tcp_listen_input+0x2a>
801dfc0: 4b6b ldr r3, [pc, #428] @ (801e170 <tcp_listen_input+0x1cc>)
801dfc2: f240 2281 movw r2, #641 @ 0x281
801dfc6: 496b ldr r1, [pc, #428] @ (801e174 <tcp_listen_input+0x1d0>)
801dfc8: 486b ldr r0, [pc, #428] @ (801e178 <tcp_listen_input+0x1d4>)
801dfca: f00c fd2f bl 802aa2c <iprintf>
/* In the LISTEN state, we check for incoming SYN segments,
creates a new PCB, and responds with a SYN|ACK. */
if (flags & TCP_ACK) {
801dfce: 4b67 ldr r3, [pc, #412] @ (801e16c <tcp_listen_input+0x1c8>)
801dfd0: 781b ldrb r3, [r3, #0]
801dfd2: f003 0310 and.w r3, r3, #16
801dfd6: 2b00 cmp r3, #0
801dfd8: d019 beq.n 801e00e <tcp_listen_input+0x6a>
/* For incoming segments with the ACK flag set, respond with a
RST. */
LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n"));
tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801dfda: 4b68 ldr r3, [pc, #416] @ (801e17c <tcp_listen_input+0x1d8>)
801dfdc: 6819 ldr r1, [r3, #0]
801dfde: 4b68 ldr r3, [pc, #416] @ (801e180 <tcp_listen_input+0x1dc>)
801dfe0: 881b ldrh r3, [r3, #0]
801dfe2: 461a mov r2, r3
801dfe4: 4b67 ldr r3, [pc, #412] @ (801e184 <tcp_listen_input+0x1e0>)
801dfe6: 681b ldr r3, [r3, #0]
801dfe8: 18d0 adds r0, r2, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801dfea: 4b67 ldr r3, [pc, #412] @ (801e188 <tcp_listen_input+0x1e4>)
801dfec: 681b ldr r3, [r3, #0]
tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801dfee: 885b ldrh r3, [r3, #2]
801dff0: b29b uxth r3, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801dff2: 4a65 ldr r2, [pc, #404] @ (801e188 <tcp_listen_input+0x1e4>)
801dff4: 6812 ldr r2, [r2, #0]
tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801dff6: 8812 ldrh r2, [r2, #0]
801dff8: b292 uxth r2, r2
801dffa: 9202 str r2, [sp, #8]
801dffc: 9301 str r3, [sp, #4]
801dffe: 4b63 ldr r3, [pc, #396] @ (801e18c <tcp_listen_input+0x1e8>)
801e000: 9300 str r3, [sp, #0]
801e002: 4b63 ldr r3, [pc, #396] @ (801e190 <tcp_listen_input+0x1ec>)
801e004: 4602 mov r2, r0
801e006: 6878 ldr r0, [r7, #4]
801e008: f003 fc46 bl 8021898 <tcp_rst>
tcp_abandon(npcb, 0);
return;
}
tcp_output(npcb);
}
return;
801e00c: e0a9 b.n 801e162 <tcp_listen_input+0x1be>
} else if (flags & TCP_SYN) {
801e00e: 4b57 ldr r3, [pc, #348] @ (801e16c <tcp_listen_input+0x1c8>)
801e010: 781b ldrb r3, [r3, #0]
801e012: f003 0302 and.w r3, r3, #2
801e016: 2b00 cmp r3, #0
801e018: f000 80a3 beq.w 801e162 <tcp_listen_input+0x1be>
npcb = tcp_alloc(pcb->prio);
801e01c: 687b ldr r3, [r7, #4]
801e01e: 7d5b ldrb r3, [r3, #21]
801e020: 4618 mov r0, r3
801e022: f7ff f84d bl 801d0c0 <tcp_alloc>
801e026: 6178 str r0, [r7, #20]
if (npcb == NULL) {
801e028: 697b ldr r3, [r7, #20]
801e02a: 2b00 cmp r3, #0
801e02c: d111 bne.n 801e052 <tcp_listen_input+0xae>
TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
801e02e: 687b ldr r3, [r7, #4]
801e030: 699b ldr r3, [r3, #24]
801e032: 2b00 cmp r3, #0
801e034: d00a beq.n 801e04c <tcp_listen_input+0xa8>
801e036: 687b ldr r3, [r7, #4]
801e038: 699b ldr r3, [r3, #24]
801e03a: 687a ldr r2, [r7, #4]
801e03c: 6910 ldr r0, [r2, #16]
801e03e: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
801e042: 2100 movs r1, #0
801e044: 4798 blx r3
801e046: 4603 mov r3, r0
801e048: 73bb strb r3, [r7, #14]
return;
801e04a: e08b b.n 801e164 <tcp_listen_input+0x1c0>
TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
801e04c: 23f0 movs r3, #240 @ 0xf0
801e04e: 73bb strb r3, [r7, #14]
return;
801e050: e088 b.n 801e164 <tcp_listen_input+0x1c0>
ip_addr_copy(npcb->local_ip, *ip_current_dest_addr());
801e052: 4b50 ldr r3, [pc, #320] @ (801e194 <tcp_listen_input+0x1f0>)
801e054: 695a ldr r2, [r3, #20]
801e056: 697b ldr r3, [r7, #20]
801e058: 601a str r2, [r3, #0]
ip_addr_copy(npcb->remote_ip, *ip_current_src_addr());
801e05a: 4b4e ldr r3, [pc, #312] @ (801e194 <tcp_listen_input+0x1f0>)
801e05c: 691a ldr r2, [r3, #16]
801e05e: 697b ldr r3, [r7, #20]
801e060: 605a str r2, [r3, #4]
npcb->local_port = pcb->local_port;
801e062: 687b ldr r3, [r7, #4]
801e064: 8ada ldrh r2, [r3, #22]
801e066: 697b ldr r3, [r7, #20]
801e068: 82da strh r2, [r3, #22]
npcb->remote_port = tcphdr->src;
801e06a: 4b47 ldr r3, [pc, #284] @ (801e188 <tcp_listen_input+0x1e4>)
801e06c: 681b ldr r3, [r3, #0]
801e06e: 881b ldrh r3, [r3, #0]
801e070: b29a uxth r2, r3
801e072: 697b ldr r3, [r7, #20]
801e074: 831a strh r2, [r3, #24]
npcb->state = SYN_RCVD;
801e076: 697b ldr r3, [r7, #20]
801e078: 2203 movs r2, #3
801e07a: 751a strb r2, [r3, #20]
npcb->rcv_nxt = seqno + 1;
801e07c: 4b41 ldr r3, [pc, #260] @ (801e184 <tcp_listen_input+0x1e0>)
801e07e: 681b ldr r3, [r3, #0]
801e080: 1c5a adds r2, r3, #1
801e082: 697b ldr r3, [r7, #20]
801e084: 625a str r2, [r3, #36] @ 0x24
npcb->rcv_ann_right_edge = npcb->rcv_nxt;
801e086: 697b ldr r3, [r7, #20]
801e088: 6a5a ldr r2, [r3, #36] @ 0x24
801e08a: 697b ldr r3, [r7, #20]
801e08c: 62da str r2, [r3, #44] @ 0x2c
iss = tcp_next_iss(npcb);
801e08e: 6978 ldr r0, [r7, #20]
801e090: f7ff fa56 bl 801d540 <tcp_next_iss>
801e094: 6138 str r0, [r7, #16]
npcb->snd_wl2 = iss;
801e096: 697b ldr r3, [r7, #20]
801e098: 693a ldr r2, [r7, #16]
801e09a: 659a str r2, [r3, #88] @ 0x58
npcb->snd_nxt = iss;
801e09c: 697b ldr r3, [r7, #20]
801e09e: 693a ldr r2, [r7, #16]
801e0a0: 651a str r2, [r3, #80] @ 0x50
npcb->lastack = iss;
801e0a2: 697b ldr r3, [r7, #20]
801e0a4: 693a ldr r2, [r7, #16]
801e0a6: 645a str r2, [r3, #68] @ 0x44
npcb->snd_lbb = iss;
801e0a8: 697b ldr r3, [r7, #20]
801e0aa: 693a ldr r2, [r7, #16]
801e0ac: 65da str r2, [r3, #92] @ 0x5c
npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */
801e0ae: 4b35 ldr r3, [pc, #212] @ (801e184 <tcp_listen_input+0x1e0>)
801e0b0: 681b ldr r3, [r3, #0]
801e0b2: 1e5a subs r2, r3, #1
801e0b4: 697b ldr r3, [r7, #20]
801e0b6: 655a str r2, [r3, #84] @ 0x54
npcb->callback_arg = pcb->callback_arg;
801e0b8: 687b ldr r3, [r7, #4]
801e0ba: 691a ldr r2, [r3, #16]
801e0bc: 697b ldr r3, [r7, #20]
801e0be: 611a str r2, [r3, #16]
npcb->listener = pcb;
801e0c0: 697b ldr r3, [r7, #20]
801e0c2: 687a ldr r2, [r7, #4]
801e0c4: 67da str r2, [r3, #124] @ 0x7c
npcb->so_options = pcb->so_options & SOF_INHERITED;
801e0c6: 687b ldr r3, [r7, #4]
801e0c8: 7a5b ldrb r3, [r3, #9]
801e0ca: f003 030c and.w r3, r3, #12
801e0ce: b2da uxtb r2, r3
801e0d0: 697b ldr r3, [r7, #20]
801e0d2: 725a strb r2, [r3, #9]
npcb->netif_idx = pcb->netif_idx;
801e0d4: 687b ldr r3, [r7, #4]
801e0d6: 7a1a ldrb r2, [r3, #8]
801e0d8: 697b ldr r3, [r7, #20]
801e0da: 721a strb r2, [r3, #8]
TCP_REG_ACTIVE(npcb);
801e0dc: 4b2e ldr r3, [pc, #184] @ (801e198 <tcp_listen_input+0x1f4>)
801e0de: 681a ldr r2, [r3, #0]
801e0e0: 697b ldr r3, [r7, #20]
801e0e2: 60da str r2, [r3, #12]
801e0e4: 4a2c ldr r2, [pc, #176] @ (801e198 <tcp_listen_input+0x1f4>)
801e0e6: 697b ldr r3, [r7, #20]
801e0e8: 6013 str r3, [r2, #0]
801e0ea: f003 fd97 bl 8021c1c <tcp_timer_needed>
801e0ee: 4b2b ldr r3, [pc, #172] @ (801e19c <tcp_listen_input+0x1f8>)
801e0f0: 2201 movs r2, #1
801e0f2: 701a strb r2, [r3, #0]
tcp_parseopt(npcb);
801e0f4: 6978 ldr r0, [r7, #20]
801e0f6: f001 fd8b bl 801fc10 <tcp_parseopt>
npcb->snd_wnd = tcphdr->wnd;
801e0fa: 4b23 ldr r3, [pc, #140] @ (801e188 <tcp_listen_input+0x1e4>)
801e0fc: 681b ldr r3, [r3, #0]
801e0fe: 89db ldrh r3, [r3, #14]
801e100: b29a uxth r2, r3
801e102: 697b ldr r3, [r7, #20]
801e104: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
npcb->snd_wnd_max = npcb->snd_wnd;
801e108: 697b ldr r3, [r7, #20]
801e10a: f8b3 2060 ldrh.w r2, [r3, #96] @ 0x60
801e10e: 697b ldr r3, [r7, #20]
801e110: f8a3 2062 strh.w r2, [r3, #98] @ 0x62
npcb->mss = tcp_eff_send_mss(npcb->mss, &npcb->local_ip, &npcb->remote_ip);
801e114: 697b ldr r3, [r7, #20]
801e116: 8e5c ldrh r4, [r3, #50] @ 0x32
801e118: 697b ldr r3, [r7, #20]
801e11a: 3304 adds r3, #4
801e11c: 4618 mov r0, r3
801e11e: f007 fc77 bl 8025a10 <ip4_route>
801e122: 4601 mov r1, r0
801e124: 697b ldr r3, [r7, #20]
801e126: 3304 adds r3, #4
801e128: 461a mov r2, r3
801e12a: 4620 mov r0, r4
801e12c: f7ff fa2e bl 801d58c <tcp_eff_send_mss_netif>
801e130: 4603 mov r3, r0
801e132: 461a mov r2, r3
801e134: 697b ldr r3, [r7, #20]
801e136: 865a strh r2, [r3, #50] @ 0x32
rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK);
801e138: 2112 movs r1, #18
801e13a: 6978 ldr r0, [r7, #20]
801e13c: f002 fcfc bl 8020b38 <tcp_enqueue_flags>
801e140: 4603 mov r3, r0
801e142: 73fb strb r3, [r7, #15]
if (rc != ERR_OK) {
801e144: f997 300f ldrsb.w r3, [r7, #15]
801e148: 2b00 cmp r3, #0
801e14a: d004 beq.n 801e156 <tcp_listen_input+0x1b2>
tcp_abandon(npcb, 0);
801e14c: 2100 movs r1, #0
801e14e: 6978 ldr r0, [r7, #20]
801e150: f7fd ff3a bl 801bfc8 <tcp_abandon>
return;
801e154: e006 b.n 801e164 <tcp_listen_input+0x1c0>
tcp_output(npcb);
801e156: 6978 ldr r0, [r7, #20]
801e158: f002 fddc bl 8020d14 <tcp_output>
return;
801e15c: e001 b.n 801e162 <tcp_listen_input+0x1be>
return;
801e15e: bf00 nop
801e160: e000 b.n 801e164 <tcp_listen_input+0x1c0>
return;
801e162: bf00 nop
}
801e164: 371c adds r7, #28
801e166: 46bd mov sp, r7
801e168: bd90 pop {r4, r7, pc}
801e16a: bf00 nop
801e16c: 2402aff0 .word 0x2402aff0
801e170: 0802ff58 .word 0x0802ff58
801e174: 08030150 .word 0x08030150
801e178: 0802ffa4 .word 0x0802ffa4
801e17c: 2402afe8 .word 0x2402afe8
801e180: 2402afee .word 0x2402afee
801e184: 2402afe4 .word 0x2402afe4
801e188: 2402afd4 .word 0x2402afd4
801e18c: 24024468 .word 0x24024468
801e190: 2402446c .word 0x2402446c
801e194: 24024458 .word 0x24024458
801e198: 2402afb4 .word 0x2402afb4
801e19c: 2402afbc .word 0x2402afbc
0801e1a0 <tcp_timewait_input>:
* @note the segment which arrived is saved in global variables, therefore only the pcb
* involved is passed as a parameter to this function
*/
static void
tcp_timewait_input(struct tcp_pcb *pcb)
{
801e1a0: b580 push {r7, lr}
801e1a2: b086 sub sp, #24
801e1a4: af04 add r7, sp, #16
801e1a6: 6078 str r0, [r7, #4]
/* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */
/* RFC 793 3.9 Event Processing - Segment Arrives:
* - first check sequence number - we skip that one in TIME_WAIT (always
* acceptable since we only send ACKs)
* - second check the RST bit (... return) */
if (flags & TCP_RST) {
801e1a8: 4b2f ldr r3, [pc, #188] @ (801e268 <tcp_timewait_input+0xc8>)
801e1aa: 781b ldrb r3, [r3, #0]
801e1ac: f003 0304 and.w r3, r3, #4
801e1b0: 2b00 cmp r3, #0
801e1b2: d153 bne.n 801e25c <tcp_timewait_input+0xbc>
return;
}
LWIP_ASSERT("tcp_timewait_input: invalid pcb", pcb != NULL);
801e1b4: 687b ldr r3, [r7, #4]
801e1b6: 2b00 cmp r3, #0
801e1b8: d106 bne.n 801e1c8 <tcp_timewait_input+0x28>
801e1ba: 4b2c ldr r3, [pc, #176] @ (801e26c <tcp_timewait_input+0xcc>)
801e1bc: f240 22ee movw r2, #750 @ 0x2ee
801e1c0: 492b ldr r1, [pc, #172] @ (801e270 <tcp_timewait_input+0xd0>)
801e1c2: 482c ldr r0, [pc, #176] @ (801e274 <tcp_timewait_input+0xd4>)
801e1c4: f00c fc32 bl 802aa2c <iprintf>
/* - fourth, check the SYN bit, */
if (flags & TCP_SYN) {
801e1c8: 4b27 ldr r3, [pc, #156] @ (801e268 <tcp_timewait_input+0xc8>)
801e1ca: 781b ldrb r3, [r3, #0]
801e1cc: f003 0302 and.w r3, r3, #2
801e1d0: 2b00 cmp r3, #0
801e1d2: d02a beq.n 801e22a <tcp_timewait_input+0x8a>
/* If an incoming segment is not acceptable, an acknowledgment
should be sent in reply */
if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd)) {
801e1d4: 4b28 ldr r3, [pc, #160] @ (801e278 <tcp_timewait_input+0xd8>)
801e1d6: 681a ldr r2, [r3, #0]
801e1d8: 687b ldr r3, [r7, #4]
801e1da: 6a5b ldr r3, [r3, #36] @ 0x24
801e1dc: 1ad3 subs r3, r2, r3
801e1de: 2b00 cmp r3, #0
801e1e0: db2d blt.n 801e23e <tcp_timewait_input+0x9e>
801e1e2: 4b25 ldr r3, [pc, #148] @ (801e278 <tcp_timewait_input+0xd8>)
801e1e4: 681a ldr r2, [r3, #0]
801e1e6: 687b ldr r3, [r7, #4]
801e1e8: 6a5b ldr r3, [r3, #36] @ 0x24
801e1ea: 6879 ldr r1, [r7, #4]
801e1ec: 8d09 ldrh r1, [r1, #40] @ 0x28
801e1ee: 440b add r3, r1
801e1f0: 1ad3 subs r3, r2, r3
801e1f2: 2b00 cmp r3, #0
801e1f4: dc23 bgt.n 801e23e <tcp_timewait_input+0x9e>
/* If the SYN is in the window it is an error, send a reset */
tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801e1f6: 4b21 ldr r3, [pc, #132] @ (801e27c <tcp_timewait_input+0xdc>)
801e1f8: 6819 ldr r1, [r3, #0]
801e1fa: 4b21 ldr r3, [pc, #132] @ (801e280 <tcp_timewait_input+0xe0>)
801e1fc: 881b ldrh r3, [r3, #0]
801e1fe: 461a mov r2, r3
801e200: 4b1d ldr r3, [pc, #116] @ (801e278 <tcp_timewait_input+0xd8>)
801e202: 681b ldr r3, [r3, #0]
801e204: 18d0 adds r0, r2, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801e206: 4b1f ldr r3, [pc, #124] @ (801e284 <tcp_timewait_input+0xe4>)
801e208: 681b ldr r3, [r3, #0]
tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801e20a: 885b ldrh r3, [r3, #2]
801e20c: b29b uxth r3, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801e20e: 4a1d ldr r2, [pc, #116] @ (801e284 <tcp_timewait_input+0xe4>)
801e210: 6812 ldr r2, [r2, #0]
tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801e212: 8812 ldrh r2, [r2, #0]
801e214: b292 uxth r2, r2
801e216: 9202 str r2, [sp, #8]
801e218: 9301 str r3, [sp, #4]
801e21a: 4b1b ldr r3, [pc, #108] @ (801e288 <tcp_timewait_input+0xe8>)
801e21c: 9300 str r3, [sp, #0]
801e21e: 4b1b ldr r3, [pc, #108] @ (801e28c <tcp_timewait_input+0xec>)
801e220: 4602 mov r2, r0
801e222: 6878 ldr r0, [r7, #4]
801e224: f003 fb38 bl 8021898 <tcp_rst>
return;
801e228: e01b b.n 801e262 <tcp_timewait_input+0xc2>
}
} else if (flags & TCP_FIN) {
801e22a: 4b0f ldr r3, [pc, #60] @ (801e268 <tcp_timewait_input+0xc8>)
801e22c: 781b ldrb r3, [r3, #0]
801e22e: f003 0301 and.w r3, r3, #1
801e232: 2b00 cmp r3, #0
801e234: d003 beq.n 801e23e <tcp_timewait_input+0x9e>
/* - eighth, check the FIN bit: Remain in the TIME-WAIT state.
Restart the 2 MSL time-wait timeout.*/
pcb->tmr = tcp_ticks;
801e236: 4b16 ldr r3, [pc, #88] @ (801e290 <tcp_timewait_input+0xf0>)
801e238: 681a ldr r2, [r3, #0]
801e23a: 687b ldr r3, [r7, #4]
801e23c: 621a str r2, [r3, #32]
}
if ((tcplen > 0)) {
801e23e: 4b10 ldr r3, [pc, #64] @ (801e280 <tcp_timewait_input+0xe0>)
801e240: 881b ldrh r3, [r3, #0]
801e242: 2b00 cmp r3, #0
801e244: d00c beq.n 801e260 <tcp_timewait_input+0xc0>
/* Acknowledge data, FIN or out-of-window SYN */
tcp_ack_now(pcb);
801e246: 687b ldr r3, [r7, #4]
801e248: 8b5b ldrh r3, [r3, #26]
801e24a: f043 0302 orr.w r3, r3, #2
801e24e: b29a uxth r2, r3
801e250: 687b ldr r3, [r7, #4]
801e252: 835a strh r2, [r3, #26]
tcp_output(pcb);
801e254: 6878 ldr r0, [r7, #4]
801e256: f002 fd5d bl 8020d14 <tcp_output>
}
return;
801e25a: e001 b.n 801e260 <tcp_timewait_input+0xc0>
return;
801e25c: bf00 nop
801e25e: e000 b.n 801e262 <tcp_timewait_input+0xc2>
return;
801e260: bf00 nop
}
801e262: 3708 adds r7, #8
801e264: 46bd mov sp, r7
801e266: bd80 pop {r7, pc}
801e268: 2402aff0 .word 0x2402aff0
801e26c: 0802ff58 .word 0x0802ff58
801e270: 08030170 .word 0x08030170
801e274: 0802ffa4 .word 0x0802ffa4
801e278: 2402afe4 .word 0x2402afe4
801e27c: 2402afe8 .word 0x2402afe8
801e280: 2402afee .word 0x2402afee
801e284: 2402afd4 .word 0x2402afd4
801e288: 24024468 .word 0x24024468
801e28c: 2402446c .word 0x2402446c
801e290: 2402afa8 .word 0x2402afa8
0801e294 <tcp_process>:
* @note the segment which arrived is saved in global variables, therefore only the pcb
* involved is passed as a parameter to this function
*/
static err_t
tcp_process(struct tcp_pcb *pcb)
{
801e294: b590 push {r4, r7, lr}
801e296: b08d sub sp, #52 @ 0x34
801e298: af04 add r7, sp, #16
801e29a: 6078 str r0, [r7, #4]
struct tcp_seg *rseg;
u8_t acceptable = 0;
801e29c: 2300 movs r3, #0
801e29e: 77fb strb r3, [r7, #31]
err_t err;
err = ERR_OK;
801e2a0: 2300 movs r3, #0
801e2a2: 77bb strb r3, [r7, #30]
LWIP_ASSERT("tcp_process: invalid pcb", pcb != NULL);
801e2a4: 687b ldr r3, [r7, #4]
801e2a6: 2b00 cmp r3, #0
801e2a8: d106 bne.n 801e2b8 <tcp_process+0x24>
801e2aa: 4b9d ldr r3, [pc, #628] @ (801e520 <tcp_process+0x28c>)
801e2ac: f44f 7247 mov.w r2, #796 @ 0x31c
801e2b0: 499c ldr r1, [pc, #624] @ (801e524 <tcp_process+0x290>)
801e2b2: 489d ldr r0, [pc, #628] @ (801e528 <tcp_process+0x294>)
801e2b4: f00c fbba bl 802aa2c <iprintf>
/* Process incoming RST segments. */
if (flags & TCP_RST) {
801e2b8: 4b9c ldr r3, [pc, #624] @ (801e52c <tcp_process+0x298>)
801e2ba: 781b ldrb r3, [r3, #0]
801e2bc: f003 0304 and.w r3, r3, #4
801e2c0: 2b00 cmp r3, #0
801e2c2: d04e beq.n 801e362 <tcp_process+0xce>
/* First, determine if the reset is acceptable. */
if (pcb->state == SYN_SENT) {
801e2c4: 687b ldr r3, [r7, #4]
801e2c6: 7d1b ldrb r3, [r3, #20]
801e2c8: 2b02 cmp r3, #2
801e2ca: d108 bne.n 801e2de <tcp_process+0x4a>
/* "In the SYN-SENT state (a RST received in response to an initial SYN),
the RST is acceptable if the ACK field acknowledges the SYN." */
if (ackno == pcb->snd_nxt) {
801e2cc: 687b ldr r3, [r7, #4]
801e2ce: 6d1a ldr r2, [r3, #80] @ 0x50
801e2d0: 4b97 ldr r3, [pc, #604] @ (801e530 <tcp_process+0x29c>)
801e2d2: 681b ldr r3, [r3, #0]
801e2d4: 429a cmp r2, r3
801e2d6: d123 bne.n 801e320 <tcp_process+0x8c>
acceptable = 1;
801e2d8: 2301 movs r3, #1
801e2da: 77fb strb r3, [r7, #31]
801e2dc: e020 b.n 801e320 <tcp_process+0x8c>
}
} else {
/* "In all states except SYN-SENT, all reset (RST) segments are validated
by checking their SEQ-fields." */
if (seqno == pcb->rcv_nxt) {
801e2de: 687b ldr r3, [r7, #4]
801e2e0: 6a5a ldr r2, [r3, #36] @ 0x24
801e2e2: 4b94 ldr r3, [pc, #592] @ (801e534 <tcp_process+0x2a0>)
801e2e4: 681b ldr r3, [r3, #0]
801e2e6: 429a cmp r2, r3
801e2e8: d102 bne.n 801e2f0 <tcp_process+0x5c>
acceptable = 1;
801e2ea: 2301 movs r3, #1
801e2ec: 77fb strb r3, [r7, #31]
801e2ee: e017 b.n 801e320 <tcp_process+0x8c>
} else if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
801e2f0: 4b90 ldr r3, [pc, #576] @ (801e534 <tcp_process+0x2a0>)
801e2f2: 681a ldr r2, [r3, #0]
801e2f4: 687b ldr r3, [r7, #4]
801e2f6: 6a5b ldr r3, [r3, #36] @ 0x24
801e2f8: 1ad3 subs r3, r2, r3
801e2fa: 2b00 cmp r3, #0
801e2fc: db10 blt.n 801e320 <tcp_process+0x8c>
801e2fe: 4b8d ldr r3, [pc, #564] @ (801e534 <tcp_process+0x2a0>)
801e300: 681a ldr r2, [r3, #0]
801e302: 687b ldr r3, [r7, #4]
801e304: 6a5b ldr r3, [r3, #36] @ 0x24
801e306: 6879 ldr r1, [r7, #4]
801e308: 8d09 ldrh r1, [r1, #40] @ 0x28
801e30a: 440b add r3, r1
801e30c: 1ad3 subs r3, r2, r3
801e30e: 2b00 cmp r3, #0
801e310: dc06 bgt.n 801e320 <tcp_process+0x8c>
pcb->rcv_nxt + pcb->rcv_wnd)) {
/* If the sequence number is inside the window, we send a challenge ACK
and wait for a re-send with matching sequence number.
This follows RFC 5961 section 3.2 and addresses CVE-2004-0230
(RST spoofing attack), which is present in RFC 793 RST handling. */
tcp_ack_now(pcb);
801e312: 687b ldr r3, [r7, #4]
801e314: 8b5b ldrh r3, [r3, #26]
801e316: f043 0302 orr.w r3, r3, #2
801e31a: b29a uxth r2, r3
801e31c: 687b ldr r3, [r7, #4]
801e31e: 835a strh r2, [r3, #26]
}
}
if (acceptable) {
801e320: 7ffb ldrb r3, [r7, #31]
801e322: 2b00 cmp r3, #0
801e324: d01b beq.n 801e35e <tcp_process+0xca>
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n"));
LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED);
801e326: 687b ldr r3, [r7, #4]
801e328: 7d1b ldrb r3, [r3, #20]
801e32a: 2b00 cmp r3, #0
801e32c: d106 bne.n 801e33c <tcp_process+0xa8>
801e32e: 4b7c ldr r3, [pc, #496] @ (801e520 <tcp_process+0x28c>)
801e330: f44f 724e mov.w r2, #824 @ 0x338
801e334: 4980 ldr r1, [pc, #512] @ (801e538 <tcp_process+0x2a4>)
801e336: 487c ldr r0, [pc, #496] @ (801e528 <tcp_process+0x294>)
801e338: f00c fb78 bl 802aa2c <iprintf>
recv_flags |= TF_RESET;
801e33c: 4b7f ldr r3, [pc, #508] @ (801e53c <tcp_process+0x2a8>)
801e33e: 781b ldrb r3, [r3, #0]
801e340: f043 0308 orr.w r3, r3, #8
801e344: b2da uxtb r2, r3
801e346: 4b7d ldr r3, [pc, #500] @ (801e53c <tcp_process+0x2a8>)
801e348: 701a strb r2, [r3, #0]
tcp_clear_flags(pcb, TF_ACK_DELAY);
801e34a: 687b ldr r3, [r7, #4]
801e34c: 8b5b ldrh r3, [r3, #26]
801e34e: f023 0301 bic.w r3, r3, #1
801e352: b29a uxth r2, r3
801e354: 687b ldr r3, [r7, #4]
801e356: 835a strh r2, [r3, #26]
return ERR_RST;
801e358: f06f 030d mvn.w r3, #13
801e35c: e37a b.n 801ea54 <tcp_process+0x7c0>
} else {
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
seqno, pcb->rcv_nxt));
LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
seqno, pcb->rcv_nxt));
return ERR_OK;
801e35e: 2300 movs r3, #0
801e360: e378 b.n 801ea54 <tcp_process+0x7c0>
}
}
if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) {
801e362: 4b72 ldr r3, [pc, #456] @ (801e52c <tcp_process+0x298>)
801e364: 781b ldrb r3, [r3, #0]
801e366: f003 0302 and.w r3, r3, #2
801e36a: 2b00 cmp r3, #0
801e36c: d010 beq.n 801e390 <tcp_process+0xfc>
801e36e: 687b ldr r3, [r7, #4]
801e370: 7d1b ldrb r3, [r3, #20]
801e372: 2b02 cmp r3, #2
801e374: d00c beq.n 801e390 <tcp_process+0xfc>
801e376: 687b ldr r3, [r7, #4]
801e378: 7d1b ldrb r3, [r3, #20]
801e37a: 2b03 cmp r3, #3
801e37c: d008 beq.n 801e390 <tcp_process+0xfc>
/* Cope with new connection attempt after remote end crashed */
tcp_ack_now(pcb);
801e37e: 687b ldr r3, [r7, #4]
801e380: 8b5b ldrh r3, [r3, #26]
801e382: f043 0302 orr.w r3, r3, #2
801e386: b29a uxth r2, r3
801e388: 687b ldr r3, [r7, #4]
801e38a: 835a strh r2, [r3, #26]
return ERR_OK;
801e38c: 2300 movs r3, #0
801e38e: e361 b.n 801ea54 <tcp_process+0x7c0>
}
if ((pcb->flags & TF_RXCLOSED) == 0) {
801e390: 687b ldr r3, [r7, #4]
801e392: 8b5b ldrh r3, [r3, #26]
801e394: f003 0310 and.w r3, r3, #16
801e398: 2b00 cmp r3, #0
801e39a: d103 bne.n 801e3a4 <tcp_process+0x110>
/* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */
pcb->tmr = tcp_ticks;
801e39c: 4b68 ldr r3, [pc, #416] @ (801e540 <tcp_process+0x2ac>)
801e39e: 681a ldr r2, [r3, #0]
801e3a0: 687b ldr r3, [r7, #4]
801e3a2: 621a str r2, [r3, #32]
}
pcb->keep_cnt_sent = 0;
801e3a4: 687b ldr r3, [r7, #4]
801e3a6: 2200 movs r2, #0
801e3a8: f883 209b strb.w r2, [r3, #155] @ 0x9b
pcb->persist_probe = 0;
801e3ac: 687b ldr r3, [r7, #4]
801e3ae: 2200 movs r2, #0
801e3b0: f883 209a strb.w r2, [r3, #154] @ 0x9a
tcp_parseopt(pcb);
801e3b4: 6878 ldr r0, [r7, #4]
801e3b6: f001 fc2b bl 801fc10 <tcp_parseopt>
/* Do different things depending on the TCP state. */
switch (pcb->state) {
801e3ba: 687b ldr r3, [r7, #4]
801e3bc: 7d1b ldrb r3, [r3, #20]
801e3be: 3b02 subs r3, #2
801e3c0: 2b07 cmp r3, #7
801e3c2: f200 8337 bhi.w 801ea34 <tcp_process+0x7a0>
801e3c6: a201 add r2, pc, #4 @ (adr r2, 801e3cc <tcp_process+0x138>)
801e3c8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
801e3cc: 0801e3ed .word 0x0801e3ed
801e3d0: 0801e61d .word 0x0801e61d
801e3d4: 0801e795 .word 0x0801e795
801e3d8: 0801e7bf .word 0x0801e7bf
801e3dc: 0801e8e3 .word 0x0801e8e3
801e3e0: 0801e795 .word 0x0801e795
801e3e4: 0801e96f .word 0x0801e96f
801e3e8: 0801e9ff .word 0x0801e9ff
case SYN_SENT:
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno,
pcb->snd_nxt, lwip_ntohl(pcb->unacked->tcphdr->seqno)));
/* received SYN ACK with expected sequence number? */
if ((flags & TCP_ACK) && (flags & TCP_SYN)
801e3ec: 4b4f ldr r3, [pc, #316] @ (801e52c <tcp_process+0x298>)
801e3ee: 781b ldrb r3, [r3, #0]
801e3f0: f003 0310 and.w r3, r3, #16
801e3f4: 2b00 cmp r3, #0
801e3f6: f000 80e4 beq.w 801e5c2 <tcp_process+0x32e>
801e3fa: 4b4c ldr r3, [pc, #304] @ (801e52c <tcp_process+0x298>)
801e3fc: 781b ldrb r3, [r3, #0]
801e3fe: f003 0302 and.w r3, r3, #2
801e402: 2b00 cmp r3, #0
801e404: f000 80dd beq.w 801e5c2 <tcp_process+0x32e>
&& (ackno == pcb->lastack + 1)) {
801e408: 687b ldr r3, [r7, #4]
801e40a: 6c5b ldr r3, [r3, #68] @ 0x44
801e40c: 1c5a adds r2, r3, #1
801e40e: 4b48 ldr r3, [pc, #288] @ (801e530 <tcp_process+0x29c>)
801e410: 681b ldr r3, [r3, #0]
801e412: 429a cmp r2, r3
801e414: f040 80d5 bne.w 801e5c2 <tcp_process+0x32e>
pcb->rcv_nxt = seqno + 1;
801e418: 4b46 ldr r3, [pc, #280] @ (801e534 <tcp_process+0x2a0>)
801e41a: 681b ldr r3, [r3, #0]
801e41c: 1c5a adds r2, r3, #1
801e41e: 687b ldr r3, [r7, #4]
801e420: 625a str r2, [r3, #36] @ 0x24
pcb->rcv_ann_right_edge = pcb->rcv_nxt;
801e422: 687b ldr r3, [r7, #4]
801e424: 6a5a ldr r2, [r3, #36] @ 0x24
801e426: 687b ldr r3, [r7, #4]
801e428: 62da str r2, [r3, #44] @ 0x2c
pcb->lastack = ackno;
801e42a: 4b41 ldr r3, [pc, #260] @ (801e530 <tcp_process+0x29c>)
801e42c: 681a ldr r2, [r3, #0]
801e42e: 687b ldr r3, [r7, #4]
801e430: 645a str r2, [r3, #68] @ 0x44
pcb->snd_wnd = tcphdr->wnd;
801e432: 4b44 ldr r3, [pc, #272] @ (801e544 <tcp_process+0x2b0>)
801e434: 681b ldr r3, [r3, #0]
801e436: 89db ldrh r3, [r3, #14]
801e438: b29a uxth r2, r3
801e43a: 687b ldr r3, [r7, #4]
801e43c: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
pcb->snd_wnd_max = pcb->snd_wnd;
801e440: 687b ldr r3, [r7, #4]
801e442: f8b3 2060 ldrh.w r2, [r3, #96] @ 0x60
801e446: 687b ldr r3, [r7, #4]
801e448: f8a3 2062 strh.w r2, [r3, #98] @ 0x62
pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */
801e44c: 4b39 ldr r3, [pc, #228] @ (801e534 <tcp_process+0x2a0>)
801e44e: 681b ldr r3, [r3, #0]
801e450: 1e5a subs r2, r3, #1
801e452: 687b ldr r3, [r7, #4]
801e454: 655a str r2, [r3, #84] @ 0x54
pcb->state = ESTABLISHED;
801e456: 687b ldr r3, [r7, #4]
801e458: 2204 movs r2, #4
801e45a: 751a strb r2, [r3, #20]
#if TCP_CALCULATE_EFF_SEND_MSS
pcb->mss = tcp_eff_send_mss(pcb->mss, &pcb->local_ip, &pcb->remote_ip);
801e45c: 687b ldr r3, [r7, #4]
801e45e: 8e5c ldrh r4, [r3, #50] @ 0x32
801e460: 687b ldr r3, [r7, #4]
801e462: 3304 adds r3, #4
801e464: 4618 mov r0, r3
801e466: f007 fad3 bl 8025a10 <ip4_route>
801e46a: 4601 mov r1, r0
801e46c: 687b ldr r3, [r7, #4]
801e46e: 3304 adds r3, #4
801e470: 461a mov r2, r3
801e472: 4620 mov r0, r4
801e474: f7ff f88a bl 801d58c <tcp_eff_send_mss_netif>
801e478: 4603 mov r3, r0
801e47a: 461a mov r2, r3
801e47c: 687b ldr r3, [r7, #4]
801e47e: 865a strh r2, [r3, #50] @ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
801e480: 687b ldr r3, [r7, #4]
801e482: 8e5b ldrh r3, [r3, #50] @ 0x32
801e484: 009a lsls r2, r3, #2
801e486: 687b ldr r3, [r7, #4]
801e488: 8e5b ldrh r3, [r3, #50] @ 0x32
801e48a: 005b lsls r3, r3, #1
801e48c: f241 111c movw r1, #4380 @ 0x111c
801e490: 428b cmp r3, r1
801e492: bf38 it cc
801e494: 460b movcc r3, r1
801e496: 429a cmp r2, r3
801e498: d204 bcs.n 801e4a4 <tcp_process+0x210>
801e49a: 687b ldr r3, [r7, #4]
801e49c: 8e5b ldrh r3, [r3, #50] @ 0x32
801e49e: 009b lsls r3, r3, #2
801e4a0: b29b uxth r3, r3
801e4a2: e00d b.n 801e4c0 <tcp_process+0x22c>
801e4a4: 687b ldr r3, [r7, #4]
801e4a6: 8e5b ldrh r3, [r3, #50] @ 0x32
801e4a8: 005b lsls r3, r3, #1
801e4aa: f241 121c movw r2, #4380 @ 0x111c
801e4ae: 4293 cmp r3, r2
801e4b0: d904 bls.n 801e4bc <tcp_process+0x228>
801e4b2: 687b ldr r3, [r7, #4]
801e4b4: 8e5b ldrh r3, [r3, #50] @ 0x32
801e4b6: 005b lsls r3, r3, #1
801e4b8: b29b uxth r3, r3
801e4ba: e001 b.n 801e4c0 <tcp_process+0x22c>
801e4bc: f241 131c movw r3, #4380 @ 0x111c
801e4c0: 687a ldr r2, [r7, #4]
801e4c2: f8a2 3048 strh.w r3, [r2, #72] @ 0x48
LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SENT): cwnd %"TCPWNDSIZE_F
" ssthresh %"TCPWNDSIZE_F"\n",
pcb->cwnd, pcb->ssthresh));
LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0));
801e4c6: 687b ldr r3, [r7, #4]
801e4c8: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
801e4cc: 2b00 cmp r3, #0
801e4ce: d106 bne.n 801e4de <tcp_process+0x24a>
801e4d0: 4b13 ldr r3, [pc, #76] @ (801e520 <tcp_process+0x28c>)
801e4d2: f44f 725b mov.w r2, #876 @ 0x36c
801e4d6: 491c ldr r1, [pc, #112] @ (801e548 <tcp_process+0x2b4>)
801e4d8: 4813 ldr r0, [pc, #76] @ (801e528 <tcp_process+0x294>)
801e4da: f00c faa7 bl 802aa2c <iprintf>
--pcb->snd_queuelen;
801e4de: 687b ldr r3, [r7, #4]
801e4e0: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
801e4e4: 3b01 subs r3, #1
801e4e6: b29a uxth r2, r3
801e4e8: 687b ldr r3, [r7, #4]
801e4ea: f8a3 2066 strh.w r2, [r3, #102] @ 0x66
LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));
rseg = pcb->unacked;
801e4ee: 687b ldr r3, [r7, #4]
801e4f0: 6f1b ldr r3, [r3, #112] @ 0x70
801e4f2: 617b str r3, [r7, #20]
if (rseg == NULL) {
801e4f4: 697b ldr r3, [r7, #20]
801e4f6: 2b00 cmp r3, #0
801e4f8: d12a bne.n 801e550 <tcp_process+0x2bc>
/* might happen if tcp_output fails in tcp_rexmit_rto()
in which case the segment is on the unsent list */
rseg = pcb->unsent;
801e4fa: 687b ldr r3, [r7, #4]
801e4fc: 6edb ldr r3, [r3, #108] @ 0x6c
801e4fe: 617b str r3, [r7, #20]
LWIP_ASSERT("no segment to free", rseg != NULL);
801e500: 697b ldr r3, [r7, #20]
801e502: 2b00 cmp r3, #0
801e504: d106 bne.n 801e514 <tcp_process+0x280>
801e506: 4b06 ldr r3, [pc, #24] @ (801e520 <tcp_process+0x28c>)
801e508: f44f 725d mov.w r2, #884 @ 0x374
801e50c: 490f ldr r1, [pc, #60] @ (801e54c <tcp_process+0x2b8>)
801e50e: 4806 ldr r0, [pc, #24] @ (801e528 <tcp_process+0x294>)
801e510: f00c fa8c bl 802aa2c <iprintf>
pcb->unsent = rseg->next;
801e514: 697b ldr r3, [r7, #20]
801e516: 681a ldr r2, [r3, #0]
801e518: 687b ldr r3, [r7, #4]
801e51a: 66da str r2, [r3, #108] @ 0x6c
801e51c: e01c b.n 801e558 <tcp_process+0x2c4>
801e51e: bf00 nop
801e520: 0802ff58 .word 0x0802ff58
801e524: 08030190 .word 0x08030190
801e528: 0802ffa4 .word 0x0802ffa4
801e52c: 2402aff0 .word 0x2402aff0
801e530: 2402afe8 .word 0x2402afe8
801e534: 2402afe4 .word 0x2402afe4
801e538: 080301ac .word 0x080301ac
801e53c: 2402aff1 .word 0x2402aff1
801e540: 2402afa8 .word 0x2402afa8
801e544: 2402afd4 .word 0x2402afd4
801e548: 080301cc .word 0x080301cc
801e54c: 080301e4 .word 0x080301e4
} else {
pcb->unacked = rseg->next;
801e550: 697b ldr r3, [r7, #20]
801e552: 681a ldr r2, [r3, #0]
801e554: 687b ldr r3, [r7, #4]
801e556: 671a str r2, [r3, #112] @ 0x70
}
tcp_seg_free(rseg);
801e558: 6978 ldr r0, [r7, #20]
801e55a: f7fe fc48 bl 801cdee <tcp_seg_free>
/* If there's nothing left to acknowledge, stop the retransmit
timer, otherwise reset it to start again */
if (pcb->unacked == NULL) {
801e55e: 687b ldr r3, [r7, #4]
801e560: 6f1b ldr r3, [r3, #112] @ 0x70
801e562: 2b00 cmp r3, #0
801e564: d104 bne.n 801e570 <tcp_process+0x2dc>
pcb->rtime = -1;
801e566: 687b ldr r3, [r7, #4]
801e568: f64f 72ff movw r2, #65535 @ 0xffff
801e56c: 861a strh r2, [r3, #48] @ 0x30
801e56e: e006 b.n 801e57e <tcp_process+0x2ea>
} else {
pcb->rtime = 0;
801e570: 687b ldr r3, [r7, #4]
801e572: 2200 movs r2, #0
801e574: 861a strh r2, [r3, #48] @ 0x30
pcb->nrtx = 0;
801e576: 687b ldr r3, [r7, #4]
801e578: 2200 movs r2, #0
801e57a: f883 2042 strb.w r2, [r3, #66] @ 0x42
}
/* Call the user specified function to call when successfully
* connected. */
TCP_EVENT_CONNECTED(pcb, ERR_OK, err);
801e57e: 687b ldr r3, [r7, #4]
801e580: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
801e584: 2b00 cmp r3, #0
801e586: d00a beq.n 801e59e <tcp_process+0x30a>
801e588: 687b ldr r3, [r7, #4]
801e58a: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
801e58e: 687a ldr r2, [r7, #4]
801e590: 6910 ldr r0, [r2, #16]
801e592: 2200 movs r2, #0
801e594: 6879 ldr r1, [r7, #4]
801e596: 4798 blx r3
801e598: 4603 mov r3, r0
801e59a: 77bb strb r3, [r7, #30]
801e59c: e001 b.n 801e5a2 <tcp_process+0x30e>
801e59e: 2300 movs r3, #0
801e5a0: 77bb strb r3, [r7, #30]
if (err == ERR_ABRT) {
801e5a2: f997 301e ldrsb.w r3, [r7, #30]
801e5a6: f113 0f0d cmn.w r3, #13
801e5aa: d102 bne.n 801e5b2 <tcp_process+0x31e>
return ERR_ABRT;
801e5ac: f06f 030c mvn.w r3, #12
801e5b0: e250 b.n 801ea54 <tcp_process+0x7c0>
}
tcp_ack_now(pcb);
801e5b2: 687b ldr r3, [r7, #4]
801e5b4: 8b5b ldrh r3, [r3, #26]
801e5b6: f043 0302 orr.w r3, r3, #2
801e5ba: b29a uxth r2, r3
801e5bc: 687b ldr r3, [r7, #4]
801e5be: 835a strh r2, [r3, #26]
if (pcb->nrtx < TCP_SYNMAXRTX) {
pcb->rtime = 0;
tcp_rexmit_rto(pcb);
}
}
break;
801e5c0: e23a b.n 801ea38 <tcp_process+0x7a4>
else if (flags & TCP_ACK) {
801e5c2: 4b98 ldr r3, [pc, #608] @ (801e824 <tcp_process+0x590>)
801e5c4: 781b ldrb r3, [r3, #0]
801e5c6: f003 0310 and.w r3, r3, #16
801e5ca: 2b00 cmp r3, #0
801e5cc: f000 8234 beq.w 801ea38 <tcp_process+0x7a4>
tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801e5d0: 4b95 ldr r3, [pc, #596] @ (801e828 <tcp_process+0x594>)
801e5d2: 6819 ldr r1, [r3, #0]
801e5d4: 4b95 ldr r3, [pc, #596] @ (801e82c <tcp_process+0x598>)
801e5d6: 881b ldrh r3, [r3, #0]
801e5d8: 461a mov r2, r3
801e5da: 4b95 ldr r3, [pc, #596] @ (801e830 <tcp_process+0x59c>)
801e5dc: 681b ldr r3, [r3, #0]
801e5de: 18d0 adds r0, r2, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801e5e0: 4b94 ldr r3, [pc, #592] @ (801e834 <tcp_process+0x5a0>)
801e5e2: 681b ldr r3, [r3, #0]
tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801e5e4: 885b ldrh r3, [r3, #2]
801e5e6: b29b uxth r3, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801e5e8: 4a92 ldr r2, [pc, #584] @ (801e834 <tcp_process+0x5a0>)
801e5ea: 6812 ldr r2, [r2, #0]
tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801e5ec: 8812 ldrh r2, [r2, #0]
801e5ee: b292 uxth r2, r2
801e5f0: 9202 str r2, [sp, #8]
801e5f2: 9301 str r3, [sp, #4]
801e5f4: 4b90 ldr r3, [pc, #576] @ (801e838 <tcp_process+0x5a4>)
801e5f6: 9300 str r3, [sp, #0]
801e5f8: 4b90 ldr r3, [pc, #576] @ (801e83c <tcp_process+0x5a8>)
801e5fa: 4602 mov r2, r0
801e5fc: 6878 ldr r0, [r7, #4]
801e5fe: f003 f94b bl 8021898 <tcp_rst>
if (pcb->nrtx < TCP_SYNMAXRTX) {
801e602: 687b ldr r3, [r7, #4]
801e604: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
801e608: 2b05 cmp r3, #5
801e60a: f200 8215 bhi.w 801ea38 <tcp_process+0x7a4>
pcb->rtime = 0;
801e60e: 687b ldr r3, [r7, #4]
801e610: 2200 movs r2, #0
801e612: 861a strh r2, [r3, #48] @ 0x30
tcp_rexmit_rto(pcb);
801e614: 6878 ldr r0, [r7, #4]
801e616: f002 ff17 bl 8021448 <tcp_rexmit_rto>
break;
801e61a: e20d b.n 801ea38 <tcp_process+0x7a4>
case SYN_RCVD:
if (flags & TCP_ACK) {
801e61c: 4b81 ldr r3, [pc, #516] @ (801e824 <tcp_process+0x590>)
801e61e: 781b ldrb r3, [r3, #0]
801e620: f003 0310 and.w r3, r3, #16
801e624: 2b00 cmp r3, #0
801e626: f000 80a1 beq.w 801e76c <tcp_process+0x4d8>
/* expected ACK number? */
if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
801e62a: 4b7f ldr r3, [pc, #508] @ (801e828 <tcp_process+0x594>)
801e62c: 681a ldr r2, [r3, #0]
801e62e: 687b ldr r3, [r7, #4]
801e630: 6c5b ldr r3, [r3, #68] @ 0x44
801e632: 1ad3 subs r3, r2, r3
801e634: 3b01 subs r3, #1
801e636: 2b00 cmp r3, #0
801e638: db7e blt.n 801e738 <tcp_process+0x4a4>
801e63a: 4b7b ldr r3, [pc, #492] @ (801e828 <tcp_process+0x594>)
801e63c: 681a ldr r2, [r3, #0]
801e63e: 687b ldr r3, [r7, #4]
801e640: 6d1b ldr r3, [r3, #80] @ 0x50
801e642: 1ad3 subs r3, r2, r3
801e644: 2b00 cmp r3, #0
801e646: dc77 bgt.n 801e738 <tcp_process+0x4a4>
pcb->state = ESTABLISHED;
801e648: 687b ldr r3, [r7, #4]
801e64a: 2204 movs r2, #4
801e64c: 751a strb r2, [r3, #20]
LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
if (pcb->listener == NULL) {
801e64e: 687b ldr r3, [r7, #4]
801e650: 6fdb ldr r3, [r3, #124] @ 0x7c
801e652: 2b00 cmp r3, #0
801e654: d102 bne.n 801e65c <tcp_process+0x3c8>
/* listen pcb might be closed by now */
err = ERR_VAL;
801e656: 23fa movs r3, #250 @ 0xfa
801e658: 77bb strb r3, [r7, #30]
801e65a: e01d b.n 801e698 <tcp_process+0x404>
} else
#endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */
{
#if LWIP_CALLBACK_API
LWIP_ASSERT("pcb->listener->accept != NULL", pcb->listener->accept != NULL);
801e65c: 687b ldr r3, [r7, #4]
801e65e: 6fdb ldr r3, [r3, #124] @ 0x7c
801e660: 699b ldr r3, [r3, #24]
801e662: 2b00 cmp r3, #0
801e664: d106 bne.n 801e674 <tcp_process+0x3e0>
801e666: 4b76 ldr r3, [pc, #472] @ (801e840 <tcp_process+0x5ac>)
801e668: f44f 726a mov.w r2, #936 @ 0x3a8
801e66c: 4975 ldr r1, [pc, #468] @ (801e844 <tcp_process+0x5b0>)
801e66e: 4876 ldr r0, [pc, #472] @ (801e848 <tcp_process+0x5b4>)
801e670: f00c f9dc bl 802aa2c <iprintf>
#endif
tcp_backlog_accepted(pcb);
/* Call the accept function. */
TCP_EVENT_ACCEPT(pcb->listener, pcb, pcb->callback_arg, ERR_OK, err);
801e674: 687b ldr r3, [r7, #4]
801e676: 6fdb ldr r3, [r3, #124] @ 0x7c
801e678: 699b ldr r3, [r3, #24]
801e67a: 2b00 cmp r3, #0
801e67c: d00a beq.n 801e694 <tcp_process+0x400>
801e67e: 687b ldr r3, [r7, #4]
801e680: 6fdb ldr r3, [r3, #124] @ 0x7c
801e682: 699b ldr r3, [r3, #24]
801e684: 687a ldr r2, [r7, #4]
801e686: 6910 ldr r0, [r2, #16]
801e688: 2200 movs r2, #0
801e68a: 6879 ldr r1, [r7, #4]
801e68c: 4798 blx r3
801e68e: 4603 mov r3, r0
801e690: 77bb strb r3, [r7, #30]
801e692: e001 b.n 801e698 <tcp_process+0x404>
801e694: 23f0 movs r3, #240 @ 0xf0
801e696: 77bb strb r3, [r7, #30]
}
if (err != ERR_OK) {
801e698: f997 301e ldrsb.w r3, [r7, #30]
801e69c: 2b00 cmp r3, #0
801e69e: d00a beq.n 801e6b6 <tcp_process+0x422>
/* If the accept function returns with an error, we abort
* the connection. */
/* Already aborted? */
if (err != ERR_ABRT) {
801e6a0: f997 301e ldrsb.w r3, [r7, #30]
801e6a4: f113 0f0d cmn.w r3, #13
801e6a8: d002 beq.n 801e6b0 <tcp_process+0x41c>
tcp_abort(pcb);
801e6aa: 6878 ldr r0, [r7, #4]
801e6ac: f7fd fd4c bl 801c148 <tcp_abort>
}
return ERR_ABRT;
801e6b0: f06f 030c mvn.w r3, #12
801e6b4: e1ce b.n 801ea54 <tcp_process+0x7c0>
}
/* If there was any data contained within this ACK,
* we'd better pass it on to the application as well. */
tcp_receive(pcb);
801e6b6: 6878 ldr r0, [r7, #4]
801e6b8: f000 fae0 bl 801ec7c <tcp_receive>
/* Prevent ACK for SYN to generate a sent event */
if (recv_acked != 0) {
801e6bc: 4b63 ldr r3, [pc, #396] @ (801e84c <tcp_process+0x5b8>)
801e6be: 881b ldrh r3, [r3, #0]
801e6c0: 2b00 cmp r3, #0
801e6c2: d005 beq.n 801e6d0 <tcp_process+0x43c>
recv_acked--;
801e6c4: 4b61 ldr r3, [pc, #388] @ (801e84c <tcp_process+0x5b8>)
801e6c6: 881b ldrh r3, [r3, #0]
801e6c8: 3b01 subs r3, #1
801e6ca: b29a uxth r2, r3
801e6cc: 4b5f ldr r3, [pc, #380] @ (801e84c <tcp_process+0x5b8>)
801e6ce: 801a strh r2, [r3, #0]
}
pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
801e6d0: 687b ldr r3, [r7, #4]
801e6d2: 8e5b ldrh r3, [r3, #50] @ 0x32
801e6d4: 009a lsls r2, r3, #2
801e6d6: 687b ldr r3, [r7, #4]
801e6d8: 8e5b ldrh r3, [r3, #50] @ 0x32
801e6da: 005b lsls r3, r3, #1
801e6dc: f241 111c movw r1, #4380 @ 0x111c
801e6e0: 428b cmp r3, r1
801e6e2: bf38 it cc
801e6e4: 460b movcc r3, r1
801e6e6: 429a cmp r2, r3
801e6e8: d204 bcs.n 801e6f4 <tcp_process+0x460>
801e6ea: 687b ldr r3, [r7, #4]
801e6ec: 8e5b ldrh r3, [r3, #50] @ 0x32
801e6ee: 009b lsls r3, r3, #2
801e6f0: b29b uxth r3, r3
801e6f2: e00d b.n 801e710 <tcp_process+0x47c>
801e6f4: 687b ldr r3, [r7, #4]
801e6f6: 8e5b ldrh r3, [r3, #50] @ 0x32
801e6f8: 005b lsls r3, r3, #1
801e6fa: f241 121c movw r2, #4380 @ 0x111c
801e6fe: 4293 cmp r3, r2
801e700: d904 bls.n 801e70c <tcp_process+0x478>
801e702: 687b ldr r3, [r7, #4]
801e704: 8e5b ldrh r3, [r3, #50] @ 0x32
801e706: 005b lsls r3, r3, #1
801e708: b29b uxth r3, r3
801e70a: e001 b.n 801e710 <tcp_process+0x47c>
801e70c: f241 131c movw r3, #4380 @ 0x111c
801e710: 687a ldr r2, [r7, #4]
801e712: f8a2 3048 strh.w r3, [r2, #72] @ 0x48
LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SYN_RCVD): cwnd %"TCPWNDSIZE_F
" ssthresh %"TCPWNDSIZE_F"\n",
pcb->cwnd, pcb->ssthresh));
if (recv_flags & TF_GOT_FIN) {
801e716: 4b4e ldr r3, [pc, #312] @ (801e850 <tcp_process+0x5bc>)
801e718: 781b ldrb r3, [r3, #0]
801e71a: f003 0320 and.w r3, r3, #32
801e71e: 2b00 cmp r3, #0
801e720: d037 beq.n 801e792 <tcp_process+0x4fe>
tcp_ack_now(pcb);
801e722: 687b ldr r3, [r7, #4]
801e724: 8b5b ldrh r3, [r3, #26]
801e726: f043 0302 orr.w r3, r3, #2
801e72a: b29a uxth r2, r3
801e72c: 687b ldr r3, [r7, #4]
801e72e: 835a strh r2, [r3, #26]
pcb->state = CLOSE_WAIT;
801e730: 687b ldr r3, [r7, #4]
801e732: 2207 movs r2, #7
801e734: 751a strb r2, [r3, #20]
if (recv_flags & TF_GOT_FIN) {
801e736: e02c b.n 801e792 <tcp_process+0x4fe>
}
} else {
/* incorrect ACK number, send RST */
tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801e738: 4b3b ldr r3, [pc, #236] @ (801e828 <tcp_process+0x594>)
801e73a: 6819 ldr r1, [r3, #0]
801e73c: 4b3b ldr r3, [pc, #236] @ (801e82c <tcp_process+0x598>)
801e73e: 881b ldrh r3, [r3, #0]
801e740: 461a mov r2, r3
801e742: 4b3b ldr r3, [pc, #236] @ (801e830 <tcp_process+0x59c>)
801e744: 681b ldr r3, [r3, #0]
801e746: 18d0 adds r0, r2, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801e748: 4b3a ldr r3, [pc, #232] @ (801e834 <tcp_process+0x5a0>)
801e74a: 681b ldr r3, [r3, #0]
tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801e74c: 885b ldrh r3, [r3, #2]
801e74e: b29b uxth r3, r3
ip_current_src_addr(), tcphdr->dest, tcphdr->src);
801e750: 4a38 ldr r2, [pc, #224] @ (801e834 <tcp_process+0x5a0>)
801e752: 6812 ldr r2, [r2, #0]
tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
801e754: 8812 ldrh r2, [r2, #0]
801e756: b292 uxth r2, r2
801e758: 9202 str r2, [sp, #8]
801e75a: 9301 str r3, [sp, #4]
801e75c: 4b36 ldr r3, [pc, #216] @ (801e838 <tcp_process+0x5a4>)
801e75e: 9300 str r3, [sp, #0]
801e760: 4b36 ldr r3, [pc, #216] @ (801e83c <tcp_process+0x5a8>)
801e762: 4602 mov r2, r0
801e764: 6878 ldr r0, [r7, #4]
801e766: f003 f897 bl 8021898 <tcp_rst>
}
} else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
/* Looks like another copy of the SYN - retransmit our SYN-ACK */
tcp_rexmit(pcb);
}
break;
801e76a: e167 b.n 801ea3c <tcp_process+0x7a8>
} else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
801e76c: 4b2d ldr r3, [pc, #180] @ (801e824 <tcp_process+0x590>)
801e76e: 781b ldrb r3, [r3, #0]
801e770: f003 0302 and.w r3, r3, #2
801e774: 2b00 cmp r3, #0
801e776: f000 8161 beq.w 801ea3c <tcp_process+0x7a8>
801e77a: 687b ldr r3, [r7, #4]
801e77c: 6a5b ldr r3, [r3, #36] @ 0x24
801e77e: 1e5a subs r2, r3, #1
801e780: 4b2b ldr r3, [pc, #172] @ (801e830 <tcp_process+0x59c>)
801e782: 681b ldr r3, [r3, #0]
801e784: 429a cmp r2, r3
801e786: f040 8159 bne.w 801ea3c <tcp_process+0x7a8>
tcp_rexmit(pcb);
801e78a: 6878 ldr r0, [r7, #4]
801e78c: f002 fe7e bl 802148c <tcp_rexmit>
break;
801e790: e154 b.n 801ea3c <tcp_process+0x7a8>
801e792: e153 b.n 801ea3c <tcp_process+0x7a8>
case CLOSE_WAIT:
/* FALLTHROUGH */
case ESTABLISHED:
tcp_receive(pcb);
801e794: 6878 ldr r0, [r7, #4]
801e796: f000 fa71 bl 801ec7c <tcp_receive>
if (recv_flags & TF_GOT_FIN) { /* passive close */
801e79a: 4b2d ldr r3, [pc, #180] @ (801e850 <tcp_process+0x5bc>)
801e79c: 781b ldrb r3, [r3, #0]
801e79e: f003 0320 and.w r3, r3, #32
801e7a2: 2b00 cmp r3, #0
801e7a4: f000 814c beq.w 801ea40 <tcp_process+0x7ac>
tcp_ack_now(pcb);
801e7a8: 687b ldr r3, [r7, #4]
801e7aa: 8b5b ldrh r3, [r3, #26]
801e7ac: f043 0302 orr.w r3, r3, #2
801e7b0: b29a uxth r2, r3
801e7b2: 687b ldr r3, [r7, #4]
801e7b4: 835a strh r2, [r3, #26]
pcb->state = CLOSE_WAIT;
801e7b6: 687b ldr r3, [r7, #4]
801e7b8: 2207 movs r2, #7
801e7ba: 751a strb r2, [r3, #20]
}
break;
801e7bc: e140 b.n 801ea40 <tcp_process+0x7ac>
case FIN_WAIT_1:
tcp_receive(pcb);
801e7be: 6878 ldr r0, [r7, #4]
801e7c0: f000 fa5c bl 801ec7c <tcp_receive>
if (recv_flags & TF_GOT_FIN) {
801e7c4: 4b22 ldr r3, [pc, #136] @ (801e850 <tcp_process+0x5bc>)
801e7c6: 781b ldrb r3, [r3, #0]
801e7c8: f003 0320 and.w r3, r3, #32
801e7cc: 2b00 cmp r3, #0
801e7ce: d071 beq.n 801e8b4 <tcp_process+0x620>
if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
801e7d0: 4b14 ldr r3, [pc, #80] @ (801e824 <tcp_process+0x590>)
801e7d2: 781b ldrb r3, [r3, #0]
801e7d4: f003 0310 and.w r3, r3, #16
801e7d8: 2b00 cmp r3, #0
801e7da: d060 beq.n 801e89e <tcp_process+0x60a>
801e7dc: 687b ldr r3, [r7, #4]
801e7de: 6d1a ldr r2, [r3, #80] @ 0x50
801e7e0: 4b11 ldr r3, [pc, #68] @ (801e828 <tcp_process+0x594>)
801e7e2: 681b ldr r3, [r3, #0]
801e7e4: 429a cmp r2, r3
801e7e6: d15a bne.n 801e89e <tcp_process+0x60a>
pcb->unsent == NULL) {
801e7e8: 687b ldr r3, [r7, #4]
801e7ea: 6edb ldr r3, [r3, #108] @ 0x6c
if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
801e7ec: 2b00 cmp r3, #0
801e7ee: d156 bne.n 801e89e <tcp_process+0x60a>
LWIP_DEBUGF(TCP_DEBUG,
("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
tcp_ack_now(pcb);
801e7f0: 687b ldr r3, [r7, #4]
801e7f2: 8b5b ldrh r3, [r3, #26]
801e7f4: f043 0302 orr.w r3, r3, #2
801e7f8: b29a uxth r2, r3
801e7fa: 687b ldr r3, [r7, #4]
801e7fc: 835a strh r2, [r3, #26]
tcp_pcb_purge(pcb);
801e7fe: 6878 ldr r0, [r7, #4]
801e800: f7fe fdba bl 801d378 <tcp_pcb_purge>
TCP_RMV_ACTIVE(pcb);
801e804: 4b13 ldr r3, [pc, #76] @ (801e854 <tcp_process+0x5c0>)
801e806: 681b ldr r3, [r3, #0]
801e808: 687a ldr r2, [r7, #4]
801e80a: 429a cmp r2, r3
801e80c: d105 bne.n 801e81a <tcp_process+0x586>
801e80e: 4b11 ldr r3, [pc, #68] @ (801e854 <tcp_process+0x5c0>)
801e810: 681b ldr r3, [r3, #0]
801e812: 68db ldr r3, [r3, #12]
801e814: 4a0f ldr r2, [pc, #60] @ (801e854 <tcp_process+0x5c0>)
801e816: 6013 str r3, [r2, #0]
801e818: e02e b.n 801e878 <tcp_process+0x5e4>
801e81a: 4b0e ldr r3, [pc, #56] @ (801e854 <tcp_process+0x5c0>)
801e81c: 681b ldr r3, [r3, #0]
801e81e: 613b str r3, [r7, #16]
801e820: e027 b.n 801e872 <tcp_process+0x5de>
801e822: bf00 nop
801e824: 2402aff0 .word 0x2402aff0
801e828: 2402afe8 .word 0x2402afe8
801e82c: 2402afee .word 0x2402afee
801e830: 2402afe4 .word 0x2402afe4
801e834: 2402afd4 .word 0x2402afd4
801e838: 24024468 .word 0x24024468
801e83c: 2402446c .word 0x2402446c
801e840: 0802ff58 .word 0x0802ff58
801e844: 080301f8 .word 0x080301f8
801e848: 0802ffa4 .word 0x0802ffa4
801e84c: 2402afec .word 0x2402afec
801e850: 2402aff1 .word 0x2402aff1
801e854: 2402afb4 .word 0x2402afb4
801e858: 693b ldr r3, [r7, #16]
801e85a: 68db ldr r3, [r3, #12]
801e85c: 687a ldr r2, [r7, #4]
801e85e: 429a cmp r2, r3
801e860: d104 bne.n 801e86c <tcp_process+0x5d8>
801e862: 687b ldr r3, [r7, #4]
801e864: 68da ldr r2, [r3, #12]
801e866: 693b ldr r3, [r7, #16]
801e868: 60da str r2, [r3, #12]
801e86a: e005 b.n 801e878 <tcp_process+0x5e4>
801e86c: 693b ldr r3, [r7, #16]
801e86e: 68db ldr r3, [r3, #12]
801e870: 613b str r3, [r7, #16]
801e872: 693b ldr r3, [r7, #16]
801e874: 2b00 cmp r3, #0
801e876: d1ef bne.n 801e858 <tcp_process+0x5c4>
801e878: 687b ldr r3, [r7, #4]
801e87a: 2200 movs r2, #0
801e87c: 60da str r2, [r3, #12]
801e87e: 4b77 ldr r3, [pc, #476] @ (801ea5c <tcp_process+0x7c8>)
801e880: 2201 movs r2, #1
801e882: 701a strb r2, [r3, #0]
pcb->state = TIME_WAIT;
801e884: 687b ldr r3, [r7, #4]
801e886: 220a movs r2, #10
801e888: 751a strb r2, [r3, #20]
TCP_REG(&tcp_tw_pcbs, pcb);
801e88a: 4b75 ldr r3, [pc, #468] @ (801ea60 <tcp_process+0x7cc>)
801e88c: 681a ldr r2, [r3, #0]
801e88e: 687b ldr r3, [r7, #4]
801e890: 60da str r2, [r3, #12]
801e892: 4a73 ldr r2, [pc, #460] @ (801ea60 <tcp_process+0x7cc>)
801e894: 687b ldr r3, [r7, #4]
801e896: 6013 str r3, [r2, #0]
801e898: f003 f9c0 bl 8021c1c <tcp_timer_needed>
}
} else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
pcb->unsent == NULL) {
pcb->state = FIN_WAIT_2;
}
break;
801e89c: e0d2 b.n 801ea44 <tcp_process+0x7b0>
tcp_ack_now(pcb);
801e89e: 687b ldr r3, [r7, #4]
801e8a0: 8b5b ldrh r3, [r3, #26]
801e8a2: f043 0302 orr.w r3, r3, #2
801e8a6: b29a uxth r2, r3
801e8a8: 687b ldr r3, [r7, #4]
801e8aa: 835a strh r2, [r3, #26]
pcb->state = CLOSING;
801e8ac: 687b ldr r3, [r7, #4]
801e8ae: 2208 movs r2, #8
801e8b0: 751a strb r2, [r3, #20]
break;
801e8b2: e0c7 b.n 801ea44 <tcp_process+0x7b0>
} else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
801e8b4: 4b6b ldr r3, [pc, #428] @ (801ea64 <tcp_process+0x7d0>)
801e8b6: 781b ldrb r3, [r3, #0]
801e8b8: f003 0310 and.w r3, r3, #16
801e8bc: 2b00 cmp r3, #0
801e8be: f000 80c1 beq.w 801ea44 <tcp_process+0x7b0>
801e8c2: 687b ldr r3, [r7, #4]
801e8c4: 6d1a ldr r2, [r3, #80] @ 0x50
801e8c6: 4b68 ldr r3, [pc, #416] @ (801ea68 <tcp_process+0x7d4>)
801e8c8: 681b ldr r3, [r3, #0]
801e8ca: 429a cmp r2, r3
801e8cc: f040 80ba bne.w 801ea44 <tcp_process+0x7b0>
pcb->unsent == NULL) {
801e8d0: 687b ldr r3, [r7, #4]
801e8d2: 6edb ldr r3, [r3, #108] @ 0x6c
} else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
801e8d4: 2b00 cmp r3, #0
801e8d6: f040 80b5 bne.w 801ea44 <tcp_process+0x7b0>
pcb->state = FIN_WAIT_2;
801e8da: 687b ldr r3, [r7, #4]
801e8dc: 2206 movs r2, #6
801e8de: 751a strb r2, [r3, #20]
break;
801e8e0: e0b0 b.n 801ea44 <tcp_process+0x7b0>
case FIN_WAIT_2:
tcp_receive(pcb);
801e8e2: 6878 ldr r0, [r7, #4]
801e8e4: f000 f9ca bl 801ec7c <tcp_receive>
if (recv_flags & TF_GOT_FIN) {
801e8e8: 4b60 ldr r3, [pc, #384] @ (801ea6c <tcp_process+0x7d8>)
801e8ea: 781b ldrb r3, [r3, #0]
801e8ec: f003 0320 and.w r3, r3, #32
801e8f0: 2b00 cmp r3, #0
801e8f2: f000 80a9 beq.w 801ea48 <tcp_process+0x7b4>
LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
tcp_ack_now(pcb);
801e8f6: 687b ldr r3, [r7, #4]
801e8f8: 8b5b ldrh r3, [r3, #26]
801e8fa: f043 0302 orr.w r3, r3, #2
801e8fe: b29a uxth r2, r3
801e900: 687b ldr r3, [r7, #4]
801e902: 835a strh r2, [r3, #26]
tcp_pcb_purge(pcb);
801e904: 6878 ldr r0, [r7, #4]
801e906: f7fe fd37 bl 801d378 <tcp_pcb_purge>
TCP_RMV_ACTIVE(pcb);
801e90a: 4b59 ldr r3, [pc, #356] @ (801ea70 <tcp_process+0x7dc>)
801e90c: 681b ldr r3, [r3, #0]
801e90e: 687a ldr r2, [r7, #4]
801e910: 429a cmp r2, r3
801e912: d105 bne.n 801e920 <tcp_process+0x68c>
801e914: 4b56 ldr r3, [pc, #344] @ (801ea70 <tcp_process+0x7dc>)
801e916: 681b ldr r3, [r3, #0]
801e918: 68db ldr r3, [r3, #12]
801e91a: 4a55 ldr r2, [pc, #340] @ (801ea70 <tcp_process+0x7dc>)
801e91c: 6013 str r3, [r2, #0]
801e91e: e013 b.n 801e948 <tcp_process+0x6b4>
801e920: 4b53 ldr r3, [pc, #332] @ (801ea70 <tcp_process+0x7dc>)
801e922: 681b ldr r3, [r3, #0]
801e924: 60fb str r3, [r7, #12]
801e926: e00c b.n 801e942 <tcp_process+0x6ae>
801e928: 68fb ldr r3, [r7, #12]
801e92a: 68db ldr r3, [r3, #12]
801e92c: 687a ldr r2, [r7, #4]
801e92e: 429a cmp r2, r3
801e930: d104 bne.n 801e93c <tcp_process+0x6a8>
801e932: 687b ldr r3, [r7, #4]
801e934: 68da ldr r2, [r3, #12]
801e936: 68fb ldr r3, [r7, #12]
801e938: 60da str r2, [r3, #12]
801e93a: e005 b.n 801e948 <tcp_process+0x6b4>
801e93c: 68fb ldr r3, [r7, #12]
801e93e: 68db ldr r3, [r3, #12]
801e940: 60fb str r3, [r7, #12]
801e942: 68fb ldr r3, [r7, #12]
801e944: 2b00 cmp r3, #0
801e946: d1ef bne.n 801e928 <tcp_process+0x694>
801e948: 687b ldr r3, [r7, #4]
801e94a: 2200 movs r2, #0
801e94c: 60da str r2, [r3, #12]
801e94e: 4b43 ldr r3, [pc, #268] @ (801ea5c <tcp_process+0x7c8>)
801e950: 2201 movs r2, #1
801e952: 701a strb r2, [r3, #0]
pcb->state = TIME_WAIT;
801e954: 687b ldr r3, [r7, #4]
801e956: 220a movs r2, #10
801e958: 751a strb r2, [r3, #20]
TCP_REG(&tcp_tw_pcbs, pcb);
801e95a: 4b41 ldr r3, [pc, #260] @ (801ea60 <tcp_process+0x7cc>)
801e95c: 681a ldr r2, [r3, #0]
801e95e: 687b ldr r3, [r7, #4]
801e960: 60da str r2, [r3, #12]
801e962: 4a3f ldr r2, [pc, #252] @ (801ea60 <tcp_process+0x7cc>)
801e964: 687b ldr r3, [r7, #4]
801e966: 6013 str r3, [r2, #0]
801e968: f003 f958 bl 8021c1c <tcp_timer_needed>
}
break;
801e96c: e06c b.n 801ea48 <tcp_process+0x7b4>
case CLOSING:
tcp_receive(pcb);
801e96e: 6878 ldr r0, [r7, #4]
801e970: f000 f984 bl 801ec7c <tcp_receive>
if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
801e974: 4b3b ldr r3, [pc, #236] @ (801ea64 <tcp_process+0x7d0>)
801e976: 781b ldrb r3, [r3, #0]
801e978: f003 0310 and.w r3, r3, #16
801e97c: 2b00 cmp r3, #0
801e97e: d065 beq.n 801ea4c <tcp_process+0x7b8>
801e980: 687b ldr r3, [r7, #4]
801e982: 6d1a ldr r2, [r3, #80] @ 0x50
801e984: 4b38 ldr r3, [pc, #224] @ (801ea68 <tcp_process+0x7d4>)
801e986: 681b ldr r3, [r3, #0]
801e988: 429a cmp r2, r3
801e98a: d15f bne.n 801ea4c <tcp_process+0x7b8>
801e98c: 687b ldr r3, [r7, #4]
801e98e: 6edb ldr r3, [r3, #108] @ 0x6c
801e990: 2b00 cmp r3, #0
801e992: d15b bne.n 801ea4c <tcp_process+0x7b8>
LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
tcp_pcb_purge(pcb);
801e994: 6878 ldr r0, [r7, #4]
801e996: f7fe fcef bl 801d378 <tcp_pcb_purge>
TCP_RMV_ACTIVE(pcb);
801e99a: 4b35 ldr r3, [pc, #212] @ (801ea70 <tcp_process+0x7dc>)
801e99c: 681b ldr r3, [r3, #0]
801e99e: 687a ldr r2, [r7, #4]
801e9a0: 429a cmp r2, r3
801e9a2: d105 bne.n 801e9b0 <tcp_process+0x71c>
801e9a4: 4b32 ldr r3, [pc, #200] @ (801ea70 <tcp_process+0x7dc>)
801e9a6: 681b ldr r3, [r3, #0]
801e9a8: 68db ldr r3, [r3, #12]
801e9aa: 4a31 ldr r2, [pc, #196] @ (801ea70 <tcp_process+0x7dc>)
801e9ac: 6013 str r3, [r2, #0]
801e9ae: e013 b.n 801e9d8 <tcp_process+0x744>
801e9b0: 4b2f ldr r3, [pc, #188] @ (801ea70 <tcp_process+0x7dc>)
801e9b2: 681b ldr r3, [r3, #0]
801e9b4: 61bb str r3, [r7, #24]
801e9b6: e00c b.n 801e9d2 <tcp_process+0x73e>
801e9b8: 69bb ldr r3, [r7, #24]
801e9ba: 68db ldr r3, [r3, #12]
801e9bc: 687a ldr r2, [r7, #4]
801e9be: 429a cmp r2, r3
801e9c0: d104 bne.n 801e9cc <tcp_process+0x738>
801e9c2: 687b ldr r3, [r7, #4]
801e9c4: 68da ldr r2, [r3, #12]
801e9c6: 69bb ldr r3, [r7, #24]
801e9c8: 60da str r2, [r3, #12]
801e9ca: e005 b.n 801e9d8 <tcp_process+0x744>
801e9cc: 69bb ldr r3, [r7, #24]
801e9ce: 68db ldr r3, [r3, #12]
801e9d0: 61bb str r3, [r7, #24]
801e9d2: 69bb ldr r3, [r7, #24]
801e9d4: 2b00 cmp r3, #0
801e9d6: d1ef bne.n 801e9b8 <tcp_process+0x724>
801e9d8: 687b ldr r3, [r7, #4]
801e9da: 2200 movs r2, #0
801e9dc: 60da str r2, [r3, #12]
801e9de: 4b1f ldr r3, [pc, #124] @ (801ea5c <tcp_process+0x7c8>)
801e9e0: 2201 movs r2, #1
801e9e2: 701a strb r2, [r3, #0]
pcb->state = TIME_WAIT;
801e9e4: 687b ldr r3, [r7, #4]
801e9e6: 220a movs r2, #10
801e9e8: 751a strb r2, [r3, #20]
TCP_REG(&tcp_tw_pcbs, pcb);
801e9ea: 4b1d ldr r3, [pc, #116] @ (801ea60 <tcp_process+0x7cc>)
801e9ec: 681a ldr r2, [r3, #0]
801e9ee: 687b ldr r3, [r7, #4]
801e9f0: 60da str r2, [r3, #12]
801e9f2: 4a1b ldr r2, [pc, #108] @ (801ea60 <tcp_process+0x7cc>)
801e9f4: 687b ldr r3, [r7, #4]
801e9f6: 6013 str r3, [r2, #0]
801e9f8: f003 f910 bl 8021c1c <tcp_timer_needed>
}
break;
801e9fc: e026 b.n 801ea4c <tcp_process+0x7b8>
case LAST_ACK:
tcp_receive(pcb);
801e9fe: 6878 ldr r0, [r7, #4]
801ea00: f000 f93c bl 801ec7c <tcp_receive>
if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
801ea04: 4b17 ldr r3, [pc, #92] @ (801ea64 <tcp_process+0x7d0>)
801ea06: 781b ldrb r3, [r3, #0]
801ea08: f003 0310 and.w r3, r3, #16
801ea0c: 2b00 cmp r3, #0
801ea0e: d01f beq.n 801ea50 <tcp_process+0x7bc>
801ea10: 687b ldr r3, [r7, #4]
801ea12: 6d1a ldr r2, [r3, #80] @ 0x50
801ea14: 4b14 ldr r3, [pc, #80] @ (801ea68 <tcp_process+0x7d4>)
801ea16: 681b ldr r3, [r3, #0]
801ea18: 429a cmp r2, r3
801ea1a: d119 bne.n 801ea50 <tcp_process+0x7bc>
801ea1c: 687b ldr r3, [r7, #4]
801ea1e: 6edb ldr r3, [r3, #108] @ 0x6c
801ea20: 2b00 cmp r3, #0
801ea22: d115 bne.n 801ea50 <tcp_process+0x7bc>
LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
/* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */
recv_flags |= TF_CLOSED;
801ea24: 4b11 ldr r3, [pc, #68] @ (801ea6c <tcp_process+0x7d8>)
801ea26: 781b ldrb r3, [r3, #0]
801ea28: f043 0310 orr.w r3, r3, #16
801ea2c: b2da uxtb r2, r3
801ea2e: 4b0f ldr r3, [pc, #60] @ (801ea6c <tcp_process+0x7d8>)
801ea30: 701a strb r2, [r3, #0]
}
break;
801ea32: e00d b.n 801ea50 <tcp_process+0x7bc>
default:
break;
801ea34: bf00 nop
801ea36: e00c b.n 801ea52 <tcp_process+0x7be>
break;
801ea38: bf00 nop
801ea3a: e00a b.n 801ea52 <tcp_process+0x7be>
break;
801ea3c: bf00 nop
801ea3e: e008 b.n 801ea52 <tcp_process+0x7be>
break;
801ea40: bf00 nop
801ea42: e006 b.n 801ea52 <tcp_process+0x7be>
break;
801ea44: bf00 nop
801ea46: e004 b.n 801ea52 <tcp_process+0x7be>
break;
801ea48: bf00 nop
801ea4a: e002 b.n 801ea52 <tcp_process+0x7be>
break;
801ea4c: bf00 nop
801ea4e: e000 b.n 801ea52 <tcp_process+0x7be>
break;
801ea50: bf00 nop
}
return ERR_OK;
801ea52: 2300 movs r3, #0
}
801ea54: 4618 mov r0, r3
801ea56: 3724 adds r7, #36 @ 0x24
801ea58: 46bd mov sp, r7
801ea5a: bd90 pop {r4, r7, pc}
801ea5c: 2402afbc .word 0x2402afbc
801ea60: 2402afb8 .word 0x2402afb8
801ea64: 2402aff0 .word 0x2402aff0
801ea68: 2402afe8 .word 0x2402afe8
801ea6c: 2402aff1 .word 0x2402aff1
801ea70: 2402afb4 .word 0x2402afb4
0801ea74 <tcp_oos_insert_segment>:
*
* Called from tcp_receive()
*/
static void
tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next)
{
801ea74: b590 push {r4, r7, lr}
801ea76: b085 sub sp, #20
801ea78: af00 add r7, sp, #0
801ea7a: 6078 str r0, [r7, #4]
801ea7c: 6039 str r1, [r7, #0]
struct tcp_seg *old_seg;
LWIP_ASSERT("tcp_oos_insert_segment: invalid cseg", cseg != NULL);
801ea7e: 687b ldr r3, [r7, #4]
801ea80: 2b00 cmp r3, #0
801ea82: d106 bne.n 801ea92 <tcp_oos_insert_segment+0x1e>
801ea84: 4b3b ldr r3, [pc, #236] @ (801eb74 <tcp_oos_insert_segment+0x100>)
801ea86: f240 421f movw r2, #1055 @ 0x41f
801ea8a: 493b ldr r1, [pc, #236] @ (801eb78 <tcp_oos_insert_segment+0x104>)
801ea8c: 483b ldr r0, [pc, #236] @ (801eb7c <tcp_oos_insert_segment+0x108>)
801ea8e: f00b ffcd bl 802aa2c <iprintf>
if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
801ea92: 687b ldr r3, [r7, #4]
801ea94: 691b ldr r3, [r3, #16]
801ea96: 899b ldrh r3, [r3, #12]
801ea98: b29b uxth r3, r3
801ea9a: 4618 mov r0, r3
801ea9c: f7fb f86c bl 8019b78 <lwip_htons>
801eaa0: 4603 mov r3, r0
801eaa2: b2db uxtb r3, r3
801eaa4: f003 0301 and.w r3, r3, #1
801eaa8: 2b00 cmp r3, #0
801eaaa: d028 beq.n 801eafe <tcp_oos_insert_segment+0x8a>
/* received segment overlaps all following segments */
tcp_segs_free(next);
801eaac: 6838 ldr r0, [r7, #0]
801eaae: f7fe f989 bl 801cdc4 <tcp_segs_free>
next = NULL;
801eab2: 2300 movs r3, #0
801eab4: 603b str r3, [r7, #0]
801eab6: e056 b.n 801eb66 <tcp_oos_insert_segment+0xf2>
oos queue may have segments with FIN flag */
while (next &&
TCP_SEQ_GEQ((seqno + cseg->len),
(next->tcphdr->seqno + next->len))) {
/* cseg with FIN already processed */
if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
801eab8: 683b ldr r3, [r7, #0]
801eaba: 691b ldr r3, [r3, #16]
801eabc: 899b ldrh r3, [r3, #12]
801eabe: b29b uxth r3, r3
801eac0: 4618 mov r0, r3
801eac2: f7fb f859 bl 8019b78 <lwip_htons>
801eac6: 4603 mov r3, r0
801eac8: b2db uxtb r3, r3
801eaca: f003 0301 and.w r3, r3, #1
801eace: 2b00 cmp r3, #0
801ead0: d00d beq.n 801eaee <tcp_oos_insert_segment+0x7a>
TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN);
801ead2: 687b ldr r3, [r7, #4]
801ead4: 691b ldr r3, [r3, #16]
801ead6: 899b ldrh r3, [r3, #12]
801ead8: b29c uxth r4, r3
801eada: 2001 movs r0, #1
801eadc: f7fb f84c bl 8019b78 <lwip_htons>
801eae0: 4603 mov r3, r0
801eae2: 461a mov r2, r3
801eae4: 687b ldr r3, [r7, #4]
801eae6: 691b ldr r3, [r3, #16]
801eae8: 4322 orrs r2, r4
801eaea: b292 uxth r2, r2
801eaec: 819a strh r2, [r3, #12]
}
old_seg = next;
801eaee: 683b ldr r3, [r7, #0]
801eaf0: 60fb str r3, [r7, #12]
next = next->next;
801eaf2: 683b ldr r3, [r7, #0]
801eaf4: 681b ldr r3, [r3, #0]
801eaf6: 603b str r3, [r7, #0]
tcp_seg_free(old_seg);
801eaf8: 68f8 ldr r0, [r7, #12]
801eafa: f7fe f978 bl 801cdee <tcp_seg_free>
while (next &&
801eafe: 683b ldr r3, [r7, #0]
801eb00: 2b00 cmp r3, #0
801eb02: d00e beq.n 801eb22 <tcp_oos_insert_segment+0xae>
TCP_SEQ_GEQ((seqno + cseg->len),
801eb04: 687b ldr r3, [r7, #4]
801eb06: 891b ldrh r3, [r3, #8]
801eb08: 461a mov r2, r3
801eb0a: 4b1d ldr r3, [pc, #116] @ (801eb80 <tcp_oos_insert_segment+0x10c>)
801eb0c: 681b ldr r3, [r3, #0]
801eb0e: 441a add r2, r3
801eb10: 683b ldr r3, [r7, #0]
801eb12: 691b ldr r3, [r3, #16]
801eb14: 685b ldr r3, [r3, #4]
801eb16: 6839 ldr r1, [r7, #0]
801eb18: 8909 ldrh r1, [r1, #8]
801eb1a: 440b add r3, r1
801eb1c: 1ad3 subs r3, r2, r3
while (next &&
801eb1e: 2b00 cmp r3, #0
801eb20: daca bge.n 801eab8 <tcp_oos_insert_segment+0x44>
}
if (next &&
801eb22: 683b ldr r3, [r7, #0]
801eb24: 2b00 cmp r3, #0
801eb26: d01e beq.n 801eb66 <tcp_oos_insert_segment+0xf2>
TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) {
801eb28: 687b ldr r3, [r7, #4]
801eb2a: 891b ldrh r3, [r3, #8]
801eb2c: 461a mov r2, r3
801eb2e: 4b14 ldr r3, [pc, #80] @ (801eb80 <tcp_oos_insert_segment+0x10c>)
801eb30: 681b ldr r3, [r3, #0]
801eb32: 441a add r2, r3
801eb34: 683b ldr r3, [r7, #0]
801eb36: 691b ldr r3, [r3, #16]
801eb38: 685b ldr r3, [r3, #4]
801eb3a: 1ad3 subs r3, r2, r3
if (next &&
801eb3c: 2b00 cmp r3, #0
801eb3e: dd12 ble.n 801eb66 <tcp_oos_insert_segment+0xf2>
/* We need to trim the incoming segment. */
cseg->len = (u16_t)(next->tcphdr->seqno - seqno);
801eb40: 683b ldr r3, [r7, #0]
801eb42: 691b ldr r3, [r3, #16]
801eb44: 685b ldr r3, [r3, #4]
801eb46: b29a uxth r2, r3
801eb48: 4b0d ldr r3, [pc, #52] @ (801eb80 <tcp_oos_insert_segment+0x10c>)
801eb4a: 681b ldr r3, [r3, #0]
801eb4c: b29b uxth r3, r3
801eb4e: 1ad3 subs r3, r2, r3
801eb50: b29a uxth r2, r3
801eb52: 687b ldr r3, [r7, #4]
801eb54: 811a strh r2, [r3, #8]
pbuf_realloc(cseg->p, cseg->len);
801eb56: 687b ldr r3, [r7, #4]
801eb58: 685a ldr r2, [r3, #4]
801eb5a: 687b ldr r3, [r7, #4]
801eb5c: 891b ldrh r3, [r3, #8]
801eb5e: 4619 mov r1, r3
801eb60: 4610 mov r0, r2
801eb62: f7fc fb35 bl 801b1d0 <pbuf_realloc>
}
}
cseg->next = next;
801eb66: 687b ldr r3, [r7, #4]
801eb68: 683a ldr r2, [r7, #0]
801eb6a: 601a str r2, [r3, #0]
}
801eb6c: bf00 nop
801eb6e: 3714 adds r7, #20
801eb70: 46bd mov sp, r7
801eb72: bd90 pop {r4, r7, pc}
801eb74: 0802ff58 .word 0x0802ff58
801eb78: 08030218 .word 0x08030218
801eb7c: 0802ffa4 .word 0x0802ffa4
801eb80: 2402afe4 .word 0x2402afe4
0801eb84 <tcp_free_acked_segments>:
/** Remove segments from a list if the incoming ACK acknowledges them */
static struct tcp_seg *
tcp_free_acked_segments(struct tcp_pcb *pcb, struct tcp_seg *seg_list, const char *dbg_list_name,
struct tcp_seg *dbg_other_seg_list)
{
801eb84: b5b0 push {r4, r5, r7, lr}
801eb86: b086 sub sp, #24
801eb88: af00 add r7, sp, #0
801eb8a: 60f8 str r0, [r7, #12]
801eb8c: 60b9 str r1, [r7, #8]
801eb8e: 607a str r2, [r7, #4]
801eb90: 603b str r3, [r7, #0]
u16_t clen;
LWIP_UNUSED_ARG(dbg_list_name);
LWIP_UNUSED_ARG(dbg_other_seg_list);
while (seg_list != NULL &&
801eb92: e03e b.n 801ec12 <tcp_free_acked_segments+0x8e>
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->%s\n",
lwip_ntohl(seg_list->tcphdr->seqno),
lwip_ntohl(seg_list->tcphdr->seqno) + TCP_TCPLEN(seg_list),
dbg_list_name));
next = seg_list;
801eb94: 68bb ldr r3, [r7, #8]
801eb96: 617b str r3, [r7, #20]
seg_list = seg_list->next;
801eb98: 68bb ldr r3, [r7, #8]
801eb9a: 681b ldr r3, [r3, #0]
801eb9c: 60bb str r3, [r7, #8]
clen = pbuf_clen(next->p);
801eb9e: 697b ldr r3, [r7, #20]
801eba0: 685b ldr r3, [r3, #4]
801eba2: 4618 mov r0, r3
801eba4: f7fc fd58 bl 801b658 <pbuf_clen>
801eba8: 4603 mov r3, r0
801ebaa: 827b strh r3, [r7, #18]
LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"TCPWNDSIZE_F" ... ",
(tcpwnd_size_t)pcb->snd_queuelen));
LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= clen));
801ebac: 68fb ldr r3, [r7, #12]
801ebae: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
801ebb2: 8a7a ldrh r2, [r7, #18]
801ebb4: 429a cmp r2, r3
801ebb6: d906 bls.n 801ebc6 <tcp_free_acked_segments+0x42>
801ebb8: 4b2a ldr r3, [pc, #168] @ (801ec64 <tcp_free_acked_segments+0xe0>)
801ebba: f240 4257 movw r2, #1111 @ 0x457
801ebbe: 492a ldr r1, [pc, #168] @ (801ec68 <tcp_free_acked_segments+0xe4>)
801ebc0: 482a ldr r0, [pc, #168] @ (801ec6c <tcp_free_acked_segments+0xe8>)
801ebc2: f00b ff33 bl 802aa2c <iprintf>
pcb->snd_queuelen = (u16_t)(pcb->snd_queuelen - clen);
801ebc6: 68fb ldr r3, [r7, #12]
801ebc8: f8b3 2066 ldrh.w r2, [r3, #102] @ 0x66
801ebcc: 8a7b ldrh r3, [r7, #18]
801ebce: 1ad3 subs r3, r2, r3
801ebd0: b29a uxth r2, r3
801ebd2: 68fb ldr r3, [r7, #12]
801ebd4: f8a3 2066 strh.w r2, [r3, #102] @ 0x66
recv_acked = (tcpwnd_size_t)(recv_acked + next->len);
801ebd8: 697b ldr r3, [r7, #20]
801ebda: 891a ldrh r2, [r3, #8]
801ebdc: 4b24 ldr r3, [pc, #144] @ (801ec70 <tcp_free_acked_segments+0xec>)
801ebde: 881b ldrh r3, [r3, #0]
801ebe0: 4413 add r3, r2
801ebe2: b29a uxth r2, r3
801ebe4: 4b22 ldr r3, [pc, #136] @ (801ec70 <tcp_free_acked_segments+0xec>)
801ebe6: 801a strh r2, [r3, #0]
tcp_seg_free(next);
801ebe8: 6978 ldr r0, [r7, #20]
801ebea: f7fe f900 bl 801cdee <tcp_seg_free>
LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"TCPWNDSIZE_F" (after freeing %s)\n",
(tcpwnd_size_t)pcb->snd_queuelen,
dbg_list_name));
if (pcb->snd_queuelen != 0) {
801ebee: 68fb ldr r3, [r7, #12]
801ebf0: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
801ebf4: 2b00 cmp r3, #0
801ebf6: d00c beq.n 801ec12 <tcp_free_acked_segments+0x8e>
LWIP_ASSERT("tcp_receive: valid queue length",
801ebf8: 68bb ldr r3, [r7, #8]
801ebfa: 2b00 cmp r3, #0
801ebfc: d109 bne.n 801ec12 <tcp_free_acked_segments+0x8e>
801ebfe: 683b ldr r3, [r7, #0]
801ec00: 2b00 cmp r3, #0
801ec02: d106 bne.n 801ec12 <tcp_free_acked_segments+0x8e>
801ec04: 4b17 ldr r3, [pc, #92] @ (801ec64 <tcp_free_acked_segments+0xe0>)
801ec06: f240 4261 movw r2, #1121 @ 0x461
801ec0a: 491a ldr r1, [pc, #104] @ (801ec74 <tcp_free_acked_segments+0xf0>)
801ec0c: 4817 ldr r0, [pc, #92] @ (801ec6c <tcp_free_acked_segments+0xe8>)
801ec0e: f00b ff0d bl 802aa2c <iprintf>
while (seg_list != NULL &&
801ec12: 68bb ldr r3, [r7, #8]
801ec14: 2b00 cmp r3, #0
801ec16: d020 beq.n 801ec5a <tcp_free_acked_segments+0xd6>
TCP_SEQ_LEQ(lwip_ntohl(seg_list->tcphdr->seqno) +
801ec18: 68bb ldr r3, [r7, #8]
801ec1a: 691b ldr r3, [r3, #16]
801ec1c: 685b ldr r3, [r3, #4]
801ec1e: 4618 mov r0, r3
801ec20: f7fa ffbf bl 8019ba2 <lwip_htonl>
801ec24: 4604 mov r4, r0
801ec26: 68bb ldr r3, [r7, #8]
801ec28: 891b ldrh r3, [r3, #8]
801ec2a: 461d mov r5, r3
801ec2c: 68bb ldr r3, [r7, #8]
801ec2e: 691b ldr r3, [r3, #16]
801ec30: 899b ldrh r3, [r3, #12]
801ec32: b29b uxth r3, r3
801ec34: 4618 mov r0, r3
801ec36: f7fa ff9f bl 8019b78 <lwip_htons>
801ec3a: 4603 mov r3, r0
801ec3c: b2db uxtb r3, r3
801ec3e: f003 0303 and.w r3, r3, #3
801ec42: 2b00 cmp r3, #0
801ec44: d001 beq.n 801ec4a <tcp_free_acked_segments+0xc6>
801ec46: 2301 movs r3, #1
801ec48: e000 b.n 801ec4c <tcp_free_acked_segments+0xc8>
801ec4a: 2300 movs r3, #0
801ec4c: 442b add r3, r5
801ec4e: 18e2 adds r2, r4, r3
801ec50: 4b09 ldr r3, [pc, #36] @ (801ec78 <tcp_free_acked_segments+0xf4>)
801ec52: 681b ldr r3, [r3, #0]
801ec54: 1ad3 subs r3, r2, r3
while (seg_list != NULL &&
801ec56: 2b00 cmp r3, #0
801ec58: dd9c ble.n 801eb94 <tcp_free_acked_segments+0x10>
seg_list != NULL || dbg_other_seg_list != NULL);
}
}
return seg_list;
801ec5a: 68bb ldr r3, [r7, #8]
}
801ec5c: 4618 mov r0, r3
801ec5e: 3718 adds r7, #24
801ec60: 46bd mov sp, r7
801ec62: bdb0 pop {r4, r5, r7, pc}
801ec64: 0802ff58 .word 0x0802ff58
801ec68: 08030240 .word 0x08030240
801ec6c: 0802ffa4 .word 0x0802ffa4
801ec70: 2402afec .word 0x2402afec
801ec74: 08030268 .word 0x08030268
801ec78: 2402afe8 .word 0x2402afe8
0801ec7c <tcp_receive>:
*
* Called from tcp_process().
*/
static void
tcp_receive(struct tcp_pcb *pcb)
{
801ec7c: b5b0 push {r4, r5, r7, lr}
801ec7e: b094 sub sp, #80 @ 0x50
801ec80: af00 add r7, sp, #0
801ec82: 6078 str r0, [r7, #4]
s16_t m;
u32_t right_wnd_edge;
int found_dupack = 0;
801ec84: 2300 movs r3, #0
801ec86: 64bb str r3, [r7, #72] @ 0x48
LWIP_ASSERT("tcp_receive: invalid pcb", pcb != NULL);
801ec88: 687b ldr r3, [r7, #4]
801ec8a: 2b00 cmp r3, #0
801ec8c: d106 bne.n 801ec9c <tcp_receive+0x20>
801ec8e: 4b91 ldr r3, [pc, #580] @ (801eed4 <tcp_receive+0x258>)
801ec90: f240 427b movw r2, #1147 @ 0x47b
801ec94: 4990 ldr r1, [pc, #576] @ (801eed8 <tcp_receive+0x25c>)
801ec96: 4891 ldr r0, [pc, #580] @ (801eedc <tcp_receive+0x260>)
801ec98: f00b fec8 bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_receive: wrong state", pcb->state >= ESTABLISHED);
801ec9c: 687b ldr r3, [r7, #4]
801ec9e: 7d1b ldrb r3, [r3, #20]
801eca0: 2b03 cmp r3, #3
801eca2: d806 bhi.n 801ecb2 <tcp_receive+0x36>
801eca4: 4b8b ldr r3, [pc, #556] @ (801eed4 <tcp_receive+0x258>)
801eca6: f240 427c movw r2, #1148 @ 0x47c
801ecaa: 498d ldr r1, [pc, #564] @ (801eee0 <tcp_receive+0x264>)
801ecac: 488b ldr r0, [pc, #556] @ (801eedc <tcp_receive+0x260>)
801ecae: f00b febd bl 802aa2c <iprintf>
if (flags & TCP_ACK) {
801ecb2: 4b8c ldr r3, [pc, #560] @ (801eee4 <tcp_receive+0x268>)
801ecb4: 781b ldrb r3, [r3, #0]
801ecb6: f003 0310 and.w r3, r3, #16
801ecba: 2b00 cmp r3, #0
801ecbc: f000 8264 beq.w 801f188 <tcp_receive+0x50c>
right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2;
801ecc0: 687b ldr r3, [r7, #4]
801ecc2: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
801ecc6: 461a mov r2, r3
801ecc8: 687b ldr r3, [r7, #4]
801ecca: 6d9b ldr r3, [r3, #88] @ 0x58
801eccc: 4413 add r3, r2
801ecce: 633b str r3, [r7, #48] @ 0x30
/* Update window. */
if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
801ecd0: 687b ldr r3, [r7, #4]
801ecd2: 6d5a ldr r2, [r3, #84] @ 0x54
801ecd4: 4b84 ldr r3, [pc, #528] @ (801eee8 <tcp_receive+0x26c>)
801ecd6: 681b ldr r3, [r3, #0]
801ecd8: 1ad3 subs r3, r2, r3
801ecda: 2b00 cmp r3, #0
801ecdc: db1b blt.n 801ed16 <tcp_receive+0x9a>
(pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
801ecde: 687b ldr r3, [r7, #4]
801ece0: 6d5a ldr r2, [r3, #84] @ 0x54
801ece2: 4b81 ldr r3, [pc, #516] @ (801eee8 <tcp_receive+0x26c>)
801ece4: 681b ldr r3, [r3, #0]
if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
801ece6: 429a cmp r2, r3
801ece8: d106 bne.n 801ecf8 <tcp_receive+0x7c>
(pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
801ecea: 687b ldr r3, [r7, #4]
801ecec: 6d9a ldr r2, [r3, #88] @ 0x58
801ecee: 4b7f ldr r3, [pc, #508] @ (801eeec <tcp_receive+0x270>)
801ecf0: 681b ldr r3, [r3, #0]
801ecf2: 1ad3 subs r3, r2, r3
801ecf4: 2b00 cmp r3, #0
801ecf6: db0e blt.n 801ed16 <tcp_receive+0x9a>
(pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
801ecf8: 687b ldr r3, [r7, #4]
801ecfa: 6d9a ldr r2, [r3, #88] @ 0x58
801ecfc: 4b7b ldr r3, [pc, #492] @ (801eeec <tcp_receive+0x270>)
801ecfe: 681b ldr r3, [r3, #0]
(pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
801ed00: 429a cmp r2, r3
801ed02: d125 bne.n 801ed50 <tcp_receive+0xd4>
(pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
801ed04: 4b7a ldr r3, [pc, #488] @ (801eef0 <tcp_receive+0x274>)
801ed06: 681b ldr r3, [r3, #0]
801ed08: 89db ldrh r3, [r3, #14]
801ed0a: b29a uxth r2, r3
801ed0c: 687b ldr r3, [r7, #4]
801ed0e: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
801ed12: 429a cmp r2, r3
801ed14: d91c bls.n 801ed50 <tcp_receive+0xd4>
pcb->snd_wnd = SND_WND_SCALE(pcb, tcphdr->wnd);
801ed16: 4b76 ldr r3, [pc, #472] @ (801eef0 <tcp_receive+0x274>)
801ed18: 681b ldr r3, [r3, #0]
801ed1a: 89db ldrh r3, [r3, #14]
801ed1c: b29a uxth r2, r3
801ed1e: 687b ldr r3, [r7, #4]
801ed20: f8a3 2060 strh.w r2, [r3, #96] @ 0x60
/* keep track of the biggest window announced by the remote host to calculate
the maximum segment size */
if (pcb->snd_wnd_max < pcb->snd_wnd) {
801ed24: 687b ldr r3, [r7, #4]
801ed26: f8b3 2062 ldrh.w r2, [r3, #98] @ 0x62
801ed2a: 687b ldr r3, [r7, #4]
801ed2c: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
801ed30: 429a cmp r2, r3
801ed32: d205 bcs.n 801ed40 <tcp_receive+0xc4>
pcb->snd_wnd_max = pcb->snd_wnd;
801ed34: 687b ldr r3, [r7, #4]
801ed36: f8b3 2060 ldrh.w r2, [r3, #96] @ 0x60
801ed3a: 687b ldr r3, [r7, #4]
801ed3c: f8a3 2062 strh.w r2, [r3, #98] @ 0x62
}
pcb->snd_wl1 = seqno;
801ed40: 4b69 ldr r3, [pc, #420] @ (801eee8 <tcp_receive+0x26c>)
801ed42: 681a ldr r2, [r3, #0]
801ed44: 687b ldr r3, [r7, #4]
801ed46: 655a str r2, [r3, #84] @ 0x54
pcb->snd_wl2 = ackno;
801ed48: 4b68 ldr r3, [pc, #416] @ (801eeec <tcp_receive+0x270>)
801ed4a: 681a ldr r2, [r3, #0]
801ed4c: 687b ldr r3, [r7, #4]
801ed4e: 659a str r2, [r3, #88] @ 0x58
* If it only passes 1, should reset dupack counter
*
*/
/* Clause 1 */
if (TCP_SEQ_LEQ(ackno, pcb->lastack)) {
801ed50: 4b66 ldr r3, [pc, #408] @ (801eeec <tcp_receive+0x270>)
801ed52: 681a ldr r2, [r3, #0]
801ed54: 687b ldr r3, [r7, #4]
801ed56: 6c5b ldr r3, [r3, #68] @ 0x44
801ed58: 1ad3 subs r3, r2, r3
801ed5a: 2b00 cmp r3, #0
801ed5c: dc58 bgt.n 801ee10 <tcp_receive+0x194>
/* Clause 2 */
if (tcplen == 0) {
801ed5e: 4b65 ldr r3, [pc, #404] @ (801eef4 <tcp_receive+0x278>)
801ed60: 881b ldrh r3, [r3, #0]
801ed62: 2b00 cmp r3, #0
801ed64: d14b bne.n 801edfe <tcp_receive+0x182>
/* Clause 3 */
if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge) {
801ed66: 687b ldr r3, [r7, #4]
801ed68: 6d9b ldr r3, [r3, #88] @ 0x58
801ed6a: 687a ldr r2, [r7, #4]
801ed6c: f8b2 2060 ldrh.w r2, [r2, #96] @ 0x60
801ed70: 4413 add r3, r2
801ed72: 6b3a ldr r2, [r7, #48] @ 0x30
801ed74: 429a cmp r2, r3
801ed76: d142 bne.n 801edfe <tcp_receive+0x182>
/* Clause 4 */
if (pcb->rtime >= 0) {
801ed78: 687b ldr r3, [r7, #4]
801ed7a: f9b3 3030 ldrsh.w r3, [r3, #48] @ 0x30
801ed7e: 2b00 cmp r3, #0
801ed80: db3d blt.n 801edfe <tcp_receive+0x182>
/* Clause 5 */
if (pcb->lastack == ackno) {
801ed82: 687b ldr r3, [r7, #4]
801ed84: 6c5a ldr r2, [r3, #68] @ 0x44
801ed86: 4b59 ldr r3, [pc, #356] @ (801eeec <tcp_receive+0x270>)
801ed88: 681b ldr r3, [r3, #0]
801ed8a: 429a cmp r2, r3
801ed8c: d137 bne.n 801edfe <tcp_receive+0x182>
found_dupack = 1;
801ed8e: 2301 movs r3, #1
801ed90: 64bb str r3, [r7, #72] @ 0x48
if ((u8_t)(pcb->dupacks + 1) > pcb->dupacks) {
801ed92: 687b ldr r3, [r7, #4]
801ed94: f893 3043 ldrb.w r3, [r3, #67] @ 0x43
801ed98: 2bff cmp r3, #255 @ 0xff
801ed9a: d007 beq.n 801edac <tcp_receive+0x130>
++pcb->dupacks;
801ed9c: 687b ldr r3, [r7, #4]
801ed9e: f893 3043 ldrb.w r3, [r3, #67] @ 0x43
801eda2: 3301 adds r3, #1
801eda4: b2da uxtb r2, r3
801eda6: 687b ldr r3, [r7, #4]
801eda8: f883 2043 strb.w r2, [r3, #67] @ 0x43
}
if (pcb->dupacks > 3) {
801edac: 687b ldr r3, [r7, #4]
801edae: f893 3043 ldrb.w r3, [r3, #67] @ 0x43
801edb2: 2b03 cmp r3, #3
801edb4: d91b bls.n 801edee <tcp_receive+0x172>
/* Inflate the congestion window */
TCP_WND_INC(pcb->cwnd, pcb->mss);
801edb6: 687b ldr r3, [r7, #4]
801edb8: f8b3 2048 ldrh.w r2, [r3, #72] @ 0x48
801edbc: 687b ldr r3, [r7, #4]
801edbe: 8e5b ldrh r3, [r3, #50] @ 0x32
801edc0: 4413 add r3, r2
801edc2: b29a uxth r2, r3
801edc4: 687b ldr r3, [r7, #4]
801edc6: f8b3 3048 ldrh.w r3, [r3, #72] @ 0x48
801edca: 429a cmp r2, r3
801edcc: d30a bcc.n 801ede4 <tcp_receive+0x168>
801edce: 687b ldr r3, [r7, #4]
801edd0: f8b3 2048 ldrh.w r2, [r3, #72] @ 0x48
801edd4: 687b ldr r3, [r7, #4]
801edd6: 8e5b ldrh r3, [r3, #50] @ 0x32
801edd8: 4413 add r3, r2
801edda: b29a uxth r2, r3
801eddc: 687b ldr r3, [r7, #4]
801edde: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
801ede2: e004 b.n 801edee <tcp_receive+0x172>
801ede4: 687b ldr r3, [r7, #4]
801ede6: f64f 72ff movw r2, #65535 @ 0xffff
801edea: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
}
if (pcb->dupacks >= 3) {
801edee: 687b ldr r3, [r7, #4]
801edf0: f893 3043 ldrb.w r3, [r3, #67] @ 0x43
801edf4: 2b02 cmp r3, #2
801edf6: d902 bls.n 801edfe <tcp_receive+0x182>
/* Do fast retransmit (checked via TF_INFR, not via dupacks count) */
tcp_rexmit_fast(pcb);
801edf8: 6878 ldr r0, [r7, #4]
801edfa: f002 fbb3 bl 8021564 <tcp_rexmit_fast>
}
}
}
/* If Clause (1) or more is true, but not a duplicate ack, reset
* count of consecutive duplicate acks */
if (!found_dupack) {
801edfe: 6cbb ldr r3, [r7, #72] @ 0x48
801ee00: 2b00 cmp r3, #0
801ee02: f040 8161 bne.w 801f0c8 <tcp_receive+0x44c>
pcb->dupacks = 0;
801ee06: 687b ldr r3, [r7, #4]
801ee08: 2200 movs r2, #0
801ee0a: f883 2043 strb.w r2, [r3, #67] @ 0x43
801ee0e: e15b b.n 801f0c8 <tcp_receive+0x44c>
}
} else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
801ee10: 4b36 ldr r3, [pc, #216] @ (801eeec <tcp_receive+0x270>)
801ee12: 681a ldr r2, [r3, #0]
801ee14: 687b ldr r3, [r7, #4]
801ee16: 6c5b ldr r3, [r3, #68] @ 0x44
801ee18: 1ad3 subs r3, r2, r3
801ee1a: 3b01 subs r3, #1
801ee1c: 2b00 cmp r3, #0
801ee1e: f2c0 814e blt.w 801f0be <tcp_receive+0x442>
801ee22: 4b32 ldr r3, [pc, #200] @ (801eeec <tcp_receive+0x270>)
801ee24: 681a ldr r2, [r3, #0]
801ee26: 687b ldr r3, [r7, #4]
801ee28: 6d1b ldr r3, [r3, #80] @ 0x50
801ee2a: 1ad3 subs r3, r2, r3
801ee2c: 2b00 cmp r3, #0
801ee2e: f300 8146 bgt.w 801f0be <tcp_receive+0x442>
tcpwnd_size_t acked;
/* Reset the "IN Fast Retransmit" flag, since we are no longer
in fast retransmit. Also reset the congestion window to the
slow start threshold. */
if (pcb->flags & TF_INFR) {
801ee32: 687b ldr r3, [r7, #4]
801ee34: 8b5b ldrh r3, [r3, #26]
801ee36: f003 0304 and.w r3, r3, #4
801ee3a: 2b00 cmp r3, #0
801ee3c: d010 beq.n 801ee60 <tcp_receive+0x1e4>
tcp_clear_flags(pcb, TF_INFR);
801ee3e: 687b ldr r3, [r7, #4]
801ee40: 8b5b ldrh r3, [r3, #26]
801ee42: f023 0304 bic.w r3, r3, #4
801ee46: b29a uxth r2, r3
801ee48: 687b ldr r3, [r7, #4]
801ee4a: 835a strh r2, [r3, #26]
pcb->cwnd = pcb->ssthresh;
801ee4c: 687b ldr r3, [r7, #4]
801ee4e: f8b3 204a ldrh.w r2, [r3, #74] @ 0x4a
801ee52: 687b ldr r3, [r7, #4]
801ee54: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
pcb->bytes_acked = 0;
801ee58: 687b ldr r3, [r7, #4]
801ee5a: 2200 movs r2, #0
801ee5c: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
}
/* Reset the number of retransmissions. */
pcb->nrtx = 0;
801ee60: 687b ldr r3, [r7, #4]
801ee62: 2200 movs r2, #0
801ee64: f883 2042 strb.w r2, [r3, #66] @ 0x42
/* Reset the retransmission time-out. */
pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
801ee68: 687b ldr r3, [r7, #4]
801ee6a: f9b3 303c ldrsh.w r3, [r3, #60] @ 0x3c
801ee6e: 10db asrs r3, r3, #3
801ee70: b21b sxth r3, r3
801ee72: b29a uxth r2, r3
801ee74: 687b ldr r3, [r7, #4]
801ee76: f9b3 303e ldrsh.w r3, [r3, #62] @ 0x3e
801ee7a: b29b uxth r3, r3
801ee7c: 4413 add r3, r2
801ee7e: b29b uxth r3, r3
801ee80: b21a sxth r2, r3
801ee82: 687b ldr r3, [r7, #4]
801ee84: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Record how much data this ACK acks */
acked = (tcpwnd_size_t)(ackno - pcb->lastack);
801ee88: 4b18 ldr r3, [pc, #96] @ (801eeec <tcp_receive+0x270>)
801ee8a: 681b ldr r3, [r3, #0]
801ee8c: b29a uxth r2, r3
801ee8e: 687b ldr r3, [r7, #4]
801ee90: 6c5b ldr r3, [r3, #68] @ 0x44
801ee92: b29b uxth r3, r3
801ee94: 1ad3 subs r3, r2, r3
801ee96: 85fb strh r3, [r7, #46] @ 0x2e
/* Reset the fast retransmit variables. */
pcb->dupacks = 0;
801ee98: 687b ldr r3, [r7, #4]
801ee9a: 2200 movs r2, #0
801ee9c: f883 2043 strb.w r2, [r3, #67] @ 0x43
pcb->lastack = ackno;
801eea0: 4b12 ldr r3, [pc, #72] @ (801eeec <tcp_receive+0x270>)
801eea2: 681a ldr r2, [r3, #0]
801eea4: 687b ldr r3, [r7, #4]
801eea6: 645a str r2, [r3, #68] @ 0x44
/* Update the congestion control variables (cwnd and
ssthresh). */
if (pcb->state >= ESTABLISHED) {
801eea8: 687b ldr r3, [r7, #4]
801eeaa: 7d1b ldrb r3, [r3, #20]
801eeac: 2b03 cmp r3, #3
801eeae: f240 8097 bls.w 801efe0 <tcp_receive+0x364>
if (pcb->cwnd < pcb->ssthresh) {
801eeb2: 687b ldr r3, [r7, #4]
801eeb4: f8b3 2048 ldrh.w r2, [r3, #72] @ 0x48
801eeb8: 687b ldr r3, [r7, #4]
801eeba: f8b3 304a ldrh.w r3, [r3, #74] @ 0x4a
801eebe: 429a cmp r2, r3
801eec0: d245 bcs.n 801ef4e <tcp_receive+0x2d2>
tcpwnd_size_t increase;
/* limit to 1 SMSS segment during period following RTO */
u8_t num_seg = (pcb->flags & TF_RTO) ? 1 : 2;
801eec2: 687b ldr r3, [r7, #4]
801eec4: 8b5b ldrh r3, [r3, #26]
801eec6: f403 6300 and.w r3, r3, #2048 @ 0x800
801eeca: 2b00 cmp r3, #0
801eecc: d014 beq.n 801eef8 <tcp_receive+0x27c>
801eece: 2301 movs r3, #1
801eed0: e013 b.n 801eefa <tcp_receive+0x27e>
801eed2: bf00 nop
801eed4: 0802ff58 .word 0x0802ff58
801eed8: 08030288 .word 0x08030288
801eedc: 0802ffa4 .word 0x0802ffa4
801eee0: 080302a4 .word 0x080302a4
801eee4: 2402aff0 .word 0x2402aff0
801eee8: 2402afe4 .word 0x2402afe4
801eeec: 2402afe8 .word 0x2402afe8
801eef0: 2402afd4 .word 0x2402afd4
801eef4: 2402afee .word 0x2402afee
801eef8: 2302 movs r3, #2
801eefa: f887 302d strb.w r3, [r7, #45] @ 0x2d
/* RFC 3465, section 2.2 Slow Start */
increase = LWIP_MIN(acked, (tcpwnd_size_t)(num_seg * pcb->mss));
801eefe: f897 302d ldrb.w r3, [r7, #45] @ 0x2d
801ef02: b29a uxth r2, r3
801ef04: 687b ldr r3, [r7, #4]
801ef06: 8e5b ldrh r3, [r3, #50] @ 0x32
801ef08: fb12 f303 smulbb r3, r2, r3
801ef0c: b29b uxth r3, r3
801ef0e: 8dfa ldrh r2, [r7, #46] @ 0x2e
801ef10: 4293 cmp r3, r2
801ef12: bf28 it cs
801ef14: 4613 movcs r3, r2
801ef16: 857b strh r3, [r7, #42] @ 0x2a
TCP_WND_INC(pcb->cwnd, increase);
801ef18: 687b ldr r3, [r7, #4]
801ef1a: f8b3 2048 ldrh.w r2, [r3, #72] @ 0x48
801ef1e: 8d7b ldrh r3, [r7, #42] @ 0x2a
801ef20: 4413 add r3, r2
801ef22: b29a uxth r2, r3
801ef24: 687b ldr r3, [r7, #4]
801ef26: f8b3 3048 ldrh.w r3, [r3, #72] @ 0x48
801ef2a: 429a cmp r2, r3
801ef2c: d309 bcc.n 801ef42 <tcp_receive+0x2c6>
801ef2e: 687b ldr r3, [r7, #4]
801ef30: f8b3 2048 ldrh.w r2, [r3, #72] @ 0x48
801ef34: 8d7b ldrh r3, [r7, #42] @ 0x2a
801ef36: 4413 add r3, r2
801ef38: b29a uxth r2, r3
801ef3a: 687b ldr r3, [r7, #4]
801ef3c: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
801ef40: e04e b.n 801efe0 <tcp_receive+0x364>
801ef42: 687b ldr r3, [r7, #4]
801ef44: f64f 72ff movw r2, #65535 @ 0xffff
801ef48: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
801ef4c: e048 b.n 801efe0 <tcp_receive+0x364>
LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"TCPWNDSIZE_F"\n", pcb->cwnd));
} else {
/* RFC 3465, section 2.1 Congestion Avoidance */
TCP_WND_INC(pcb->bytes_acked, acked);
801ef4e: 687b ldr r3, [r7, #4]
801ef50: f8b3 206a ldrh.w r2, [r3, #106] @ 0x6a
801ef54: 8dfb ldrh r3, [r7, #46] @ 0x2e
801ef56: 4413 add r3, r2
801ef58: b29a uxth r2, r3
801ef5a: 687b ldr r3, [r7, #4]
801ef5c: f8b3 306a ldrh.w r3, [r3, #106] @ 0x6a
801ef60: 429a cmp r2, r3
801ef62: d309 bcc.n 801ef78 <tcp_receive+0x2fc>
801ef64: 687b ldr r3, [r7, #4]
801ef66: f8b3 206a ldrh.w r2, [r3, #106] @ 0x6a
801ef6a: 8dfb ldrh r3, [r7, #46] @ 0x2e
801ef6c: 4413 add r3, r2
801ef6e: b29a uxth r2, r3
801ef70: 687b ldr r3, [r7, #4]
801ef72: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
801ef76: e004 b.n 801ef82 <tcp_receive+0x306>
801ef78: 687b ldr r3, [r7, #4]
801ef7a: f64f 72ff movw r2, #65535 @ 0xffff
801ef7e: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
if (pcb->bytes_acked >= pcb->cwnd) {
801ef82: 687b ldr r3, [r7, #4]
801ef84: f8b3 206a ldrh.w r2, [r3, #106] @ 0x6a
801ef88: 687b ldr r3, [r7, #4]
801ef8a: f8b3 3048 ldrh.w r3, [r3, #72] @ 0x48
801ef8e: 429a cmp r2, r3
801ef90: d326 bcc.n 801efe0 <tcp_receive+0x364>
pcb->bytes_acked = (tcpwnd_size_t)(pcb->bytes_acked - pcb->cwnd);
801ef92: 687b ldr r3, [r7, #4]
801ef94: f8b3 206a ldrh.w r2, [r3, #106] @ 0x6a
801ef98: 687b ldr r3, [r7, #4]
801ef9a: f8b3 3048 ldrh.w r3, [r3, #72] @ 0x48
801ef9e: 1ad3 subs r3, r2, r3
801efa0: b29a uxth r2, r3
801efa2: 687b ldr r3, [r7, #4]
801efa4: f8a3 206a strh.w r2, [r3, #106] @ 0x6a
TCP_WND_INC(pcb->cwnd, pcb->mss);
801efa8: 687b ldr r3, [r7, #4]
801efaa: f8b3 2048 ldrh.w r2, [r3, #72] @ 0x48
801efae: 687b ldr r3, [r7, #4]
801efb0: 8e5b ldrh r3, [r3, #50] @ 0x32
801efb2: 4413 add r3, r2
801efb4: b29a uxth r2, r3
801efb6: 687b ldr r3, [r7, #4]
801efb8: f8b3 3048 ldrh.w r3, [r3, #72] @ 0x48
801efbc: 429a cmp r2, r3
801efbe: d30a bcc.n 801efd6 <tcp_receive+0x35a>
801efc0: 687b ldr r3, [r7, #4]
801efc2: f8b3 2048 ldrh.w r2, [r3, #72] @ 0x48
801efc6: 687b ldr r3, [r7, #4]
801efc8: 8e5b ldrh r3, [r3, #50] @ 0x32
801efca: 4413 add r3, r2
801efcc: b29a uxth r2, r3
801efce: 687b ldr r3, [r7, #4]
801efd0: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
801efd4: e004 b.n 801efe0 <tcp_receive+0x364>
801efd6: 687b ldr r3, [r7, #4]
801efd8: f64f 72ff movw r2, #65535 @ 0xffff
801efdc: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
pcb->unacked != NULL ?
lwip_ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked) : 0));
/* Remove segment from the unacknowledged list if the incoming
ACK acknowledges them. */
pcb->unacked = tcp_free_acked_segments(pcb, pcb->unacked, "unacked", pcb->unsent);
801efe0: 687b ldr r3, [r7, #4]
801efe2: 6f19 ldr r1, [r3, #112] @ 0x70
801efe4: 687b ldr r3, [r7, #4]
801efe6: 6edb ldr r3, [r3, #108] @ 0x6c
801efe8: 4a98 ldr r2, [pc, #608] @ (801f24c <tcp_receive+0x5d0>)
801efea: 6878 ldr r0, [r7, #4]
801efec: f7ff fdca bl 801eb84 <tcp_free_acked_segments>
801eff0: 4602 mov r2, r0
801eff2: 687b ldr r3, [r7, #4]
801eff4: 671a str r2, [r3, #112] @ 0x70
on the list are acknowledged by the ACK. This may seem
strange since an "unsent" segment shouldn't be acked. The
rationale is that lwIP puts all outstanding segments on the
->unsent list after a retransmission, so these segments may
in fact have been sent once. */
pcb->unsent = tcp_free_acked_segments(pcb, pcb->unsent, "unsent", pcb->unacked);
801eff6: 687b ldr r3, [r7, #4]
801eff8: 6ed9 ldr r1, [r3, #108] @ 0x6c
801effa: 687b ldr r3, [r7, #4]
801effc: 6f1b ldr r3, [r3, #112] @ 0x70
801effe: 4a94 ldr r2, [pc, #592] @ (801f250 <tcp_receive+0x5d4>)
801f000: 6878 ldr r0, [r7, #4]
801f002: f7ff fdbf bl 801eb84 <tcp_free_acked_segments>
801f006: 4602 mov r2, r0
801f008: 687b ldr r3, [r7, #4]
801f00a: 66da str r2, [r3, #108] @ 0x6c
/* If there's nothing left to acknowledge, stop the retransmit
timer, otherwise reset it to start again */
if (pcb->unacked == NULL) {
801f00c: 687b ldr r3, [r7, #4]
801f00e: 6f1b ldr r3, [r3, #112] @ 0x70
801f010: 2b00 cmp r3, #0
801f012: d104 bne.n 801f01e <tcp_receive+0x3a2>
pcb->rtime = -1;
801f014: 687b ldr r3, [r7, #4]
801f016: f64f 72ff movw r2, #65535 @ 0xffff
801f01a: 861a strh r2, [r3, #48] @ 0x30
801f01c: e002 b.n 801f024 <tcp_receive+0x3a8>
} else {
pcb->rtime = 0;
801f01e: 687b ldr r3, [r7, #4]
801f020: 2200 movs r2, #0
801f022: 861a strh r2, [r3, #48] @ 0x30
}
pcb->polltmr = 0;
801f024: 687b ldr r3, [r7, #4]
801f026: 2200 movs r2, #0
801f028: 771a strb r2, [r3, #28]
#if TCP_OVERSIZE
if (pcb->unsent == NULL) {
801f02a: 687b ldr r3, [r7, #4]
801f02c: 6edb ldr r3, [r3, #108] @ 0x6c
801f02e: 2b00 cmp r3, #0
801f030: d103 bne.n 801f03a <tcp_receive+0x3be>
pcb->unsent_oversize = 0;
801f032: 687b ldr r3, [r7, #4]
801f034: 2200 movs r2, #0
801f036: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
/* Inform neighbor reachability of forward progress. */
nd6_reachability_hint(ip6_current_src_addr());
}
#endif /* LWIP_IPV6 && LWIP_ND6_TCP_REACHABILITY_HINTS*/
pcb->snd_buf = (tcpwnd_size_t)(pcb->snd_buf + recv_acked);
801f03a: 687b ldr r3, [r7, #4]
801f03c: f8b3 2064 ldrh.w r2, [r3, #100] @ 0x64
801f040: 4b84 ldr r3, [pc, #528] @ (801f254 <tcp_receive+0x5d8>)
801f042: 881b ldrh r3, [r3, #0]
801f044: 4413 add r3, r2
801f046: b29a uxth r2, r3
801f048: 687b ldr r3, [r7, #4]
801f04a: f8a3 2064 strh.w r2, [r3, #100] @ 0x64
/* check if this ACK ends our retransmission of in-flight data */
if (pcb->flags & TF_RTO) {
801f04e: 687b ldr r3, [r7, #4]
801f050: 8b5b ldrh r3, [r3, #26]
801f052: f403 6300 and.w r3, r3, #2048 @ 0x800
801f056: 2b00 cmp r3, #0
801f058: d035 beq.n 801f0c6 <tcp_receive+0x44a>
/* RTO is done if
1) both queues are empty or
2) unacked is empty and unsent head contains data not part of RTO or
3) unacked head contains data not part of RTO */
if (pcb->unacked == NULL) {
801f05a: 687b ldr r3, [r7, #4]
801f05c: 6f1b ldr r3, [r3, #112] @ 0x70
801f05e: 2b00 cmp r3, #0
801f060: d118 bne.n 801f094 <tcp_receive+0x418>
if ((pcb->unsent == NULL) ||
801f062: 687b ldr r3, [r7, #4]
801f064: 6edb ldr r3, [r3, #108] @ 0x6c
801f066: 2b00 cmp r3, #0
801f068: d00c beq.n 801f084 <tcp_receive+0x408>
(TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unsent->tcphdr->seqno)))) {
801f06a: 687b ldr r3, [r7, #4]
801f06c: 6cdc ldr r4, [r3, #76] @ 0x4c
801f06e: 687b ldr r3, [r7, #4]
801f070: 6edb ldr r3, [r3, #108] @ 0x6c
801f072: 691b ldr r3, [r3, #16]
801f074: 685b ldr r3, [r3, #4]
801f076: 4618 mov r0, r3
801f078: f7fa fd93 bl 8019ba2 <lwip_htonl>
801f07c: 4603 mov r3, r0
801f07e: 1ae3 subs r3, r4, r3
if ((pcb->unsent == NULL) ||
801f080: 2b00 cmp r3, #0
801f082: dc20 bgt.n 801f0c6 <tcp_receive+0x44a>
tcp_clear_flags(pcb, TF_RTO);
801f084: 687b ldr r3, [r7, #4]
801f086: 8b5b ldrh r3, [r3, #26]
801f088: f423 6300 bic.w r3, r3, #2048 @ 0x800
801f08c: b29a uxth r2, r3
801f08e: 687b ldr r3, [r7, #4]
801f090: 835a strh r2, [r3, #26]
} else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
801f092: e018 b.n 801f0c6 <tcp_receive+0x44a>
}
} else if (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unacked->tcphdr->seqno))) {
801f094: 687b ldr r3, [r7, #4]
801f096: 6cdc ldr r4, [r3, #76] @ 0x4c
801f098: 687b ldr r3, [r7, #4]
801f09a: 6f1b ldr r3, [r3, #112] @ 0x70
801f09c: 691b ldr r3, [r3, #16]
801f09e: 685b ldr r3, [r3, #4]
801f0a0: 4618 mov r0, r3
801f0a2: f7fa fd7e bl 8019ba2 <lwip_htonl>
801f0a6: 4603 mov r3, r0
801f0a8: 1ae3 subs r3, r4, r3
801f0aa: 2b00 cmp r3, #0
801f0ac: dc0b bgt.n 801f0c6 <tcp_receive+0x44a>
tcp_clear_flags(pcb, TF_RTO);
801f0ae: 687b ldr r3, [r7, #4]
801f0b0: 8b5b ldrh r3, [r3, #26]
801f0b2: f423 6300 bic.w r3, r3, #2048 @ 0x800
801f0b6: b29a uxth r2, r3
801f0b8: 687b ldr r3, [r7, #4]
801f0ba: 835a strh r2, [r3, #26]
} else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
801f0bc: e003 b.n 801f0c6 <tcp_receive+0x44a>
}
}
/* End of ACK for new data processing. */
} else {
/* Out of sequence ACK, didn't really ack anything */
tcp_send_empty_ack(pcb);
801f0be: 6878 ldr r0, [r7, #4]
801f0c0: f002 fc3c bl 802193c <tcp_send_empty_ack>
801f0c4: e000 b.n 801f0c8 <tcp_receive+0x44c>
} else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
801f0c6: bf00 nop
pcb->rttest, pcb->rtseq, ackno));
/* RTT estimation calculations. This is done by checking if the
incoming segment acknowledges the segment we use to take a
round-trip time measurement. */
if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) {
801f0c8: 687b ldr r3, [r7, #4]
801f0ca: 6b5b ldr r3, [r3, #52] @ 0x34
801f0cc: 2b00 cmp r3, #0
801f0ce: d05b beq.n 801f188 <tcp_receive+0x50c>
801f0d0: 687b ldr r3, [r7, #4]
801f0d2: 6b9a ldr r2, [r3, #56] @ 0x38
801f0d4: 4b60 ldr r3, [pc, #384] @ (801f258 <tcp_receive+0x5dc>)
801f0d6: 681b ldr r3, [r3, #0]
801f0d8: 1ad3 subs r3, r2, r3
801f0da: 2b00 cmp r3, #0
801f0dc: da54 bge.n 801f188 <tcp_receive+0x50c>
/* diff between this shouldn't exceed 32K since this are tcp timer ticks
and a round-trip shouldn't be that long... */
m = (s16_t)(tcp_ticks - pcb->rttest);
801f0de: 4b5f ldr r3, [pc, #380] @ (801f25c <tcp_receive+0x5e0>)
801f0e0: 681b ldr r3, [r3, #0]
801f0e2: b29a uxth r2, r3
801f0e4: 687b ldr r3, [r7, #4]
801f0e6: 6b5b ldr r3, [r3, #52] @ 0x34
801f0e8: b29b uxth r3, r3
801f0ea: 1ad3 subs r3, r2, r3
801f0ec: b29b uxth r3, r3
801f0ee: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n",
m, (u16_t)(m * TCP_SLOW_INTERVAL)));
/* This is taken directly from VJs original code in his paper */
m = (s16_t)(m - (pcb->sa >> 3));
801f0f2: f8b7 204e ldrh.w r2, [r7, #78] @ 0x4e
801f0f6: 687b ldr r3, [r7, #4]
801f0f8: f9b3 303c ldrsh.w r3, [r3, #60] @ 0x3c
801f0fc: 10db asrs r3, r3, #3
801f0fe: b21b sxth r3, r3
801f100: b29b uxth r3, r3
801f102: 1ad3 subs r3, r2, r3
801f104: b29b uxth r3, r3
801f106: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
pcb->sa = (s16_t)(pcb->sa + m);
801f10a: 687b ldr r3, [r7, #4]
801f10c: f9b3 303c ldrsh.w r3, [r3, #60] @ 0x3c
801f110: b29a uxth r2, r3
801f112: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
801f116: 4413 add r3, r2
801f118: b29b uxth r3, r3
801f11a: b21a sxth r2, r3
801f11c: 687b ldr r3, [r7, #4]
801f11e: 879a strh r2, [r3, #60] @ 0x3c
if (m < 0) {
801f120: f9b7 304e ldrsh.w r3, [r7, #78] @ 0x4e
801f124: 2b00 cmp r3, #0
801f126: da05 bge.n 801f134 <tcp_receive+0x4b8>
m = (s16_t) - m;
801f128: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
801f12c: 425b negs r3, r3
801f12e: b29b uxth r3, r3
801f130: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
}
m = (s16_t)(m - (pcb->sv >> 2));
801f134: f8b7 204e ldrh.w r2, [r7, #78] @ 0x4e
801f138: 687b ldr r3, [r7, #4]
801f13a: f9b3 303e ldrsh.w r3, [r3, #62] @ 0x3e
801f13e: 109b asrs r3, r3, #2
801f140: b21b sxth r3, r3
801f142: b29b uxth r3, r3
801f144: 1ad3 subs r3, r2, r3
801f146: b29b uxth r3, r3
801f148: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
pcb->sv = (s16_t)(pcb->sv + m);
801f14c: 687b ldr r3, [r7, #4]
801f14e: f9b3 303e ldrsh.w r3, [r3, #62] @ 0x3e
801f152: b29a uxth r2, r3
801f154: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
801f158: 4413 add r3, r2
801f15a: b29b uxth r3, r3
801f15c: b21a sxth r2, r3
801f15e: 687b ldr r3, [r7, #4]
801f160: 87da strh r2, [r3, #62] @ 0x3e
pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
801f162: 687b ldr r3, [r7, #4]
801f164: f9b3 303c ldrsh.w r3, [r3, #60] @ 0x3c
801f168: 10db asrs r3, r3, #3
801f16a: b21b sxth r3, r3
801f16c: b29a uxth r2, r3
801f16e: 687b ldr r3, [r7, #4]
801f170: f9b3 303e ldrsh.w r3, [r3, #62] @ 0x3e
801f174: b29b uxth r3, r3
801f176: 4413 add r3, r2
801f178: b29b uxth r3, r3
801f17a: b21a sxth r2, r3
801f17c: 687b ldr r3, [r7, #4]
801f17e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n",
pcb->rto, (u16_t)(pcb->rto * TCP_SLOW_INTERVAL)));
pcb->rttest = 0;
801f182: 687b ldr r3, [r7, #4]
801f184: 2200 movs r2, #0
801f186: 635a str r2, [r3, #52] @ 0x34
/* If the incoming segment contains data, we must process it
further unless the pcb already received a FIN.
(RFC 793, chapter 3.9, "SEGMENT ARRIVES" in states CLOSE-WAIT, CLOSING,
LAST-ACK and TIME-WAIT: "Ignore the segment text.") */
if ((tcplen > 0) && (pcb->state < CLOSE_WAIT)) {
801f188: 4b35 ldr r3, [pc, #212] @ (801f260 <tcp_receive+0x5e4>)
801f18a: 881b ldrh r3, [r3, #0]
801f18c: 2b00 cmp r3, #0
801f18e: f000 84df beq.w 801fb50 <tcp_receive+0xed4>
801f192: 687b ldr r3, [r7, #4]
801f194: 7d1b ldrb r3, [r3, #20]
801f196: 2b06 cmp r3, #6
801f198: f200 84da bhi.w 801fb50 <tcp_receive+0xed4>
this if the sequence number of the incoming segment is less
than rcv_nxt, and the sequence number plus the length of the
segment is larger than rcv_nxt. */
/* if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/
if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
801f19c: 687b ldr r3, [r7, #4]
801f19e: 6a5a ldr r2, [r3, #36] @ 0x24
801f1a0: 4b30 ldr r3, [pc, #192] @ (801f264 <tcp_receive+0x5e8>)
801f1a2: 681b ldr r3, [r3, #0]
801f1a4: 1ad3 subs r3, r2, r3
801f1a6: 3b01 subs r3, #1
801f1a8: 2b00 cmp r3, #0
801f1aa: f2c0 808f blt.w 801f2cc <tcp_receive+0x650>
801f1ae: 687b ldr r3, [r7, #4]
801f1b0: 6a5a ldr r2, [r3, #36] @ 0x24
801f1b2: 4b2b ldr r3, [pc, #172] @ (801f260 <tcp_receive+0x5e4>)
801f1b4: 881b ldrh r3, [r3, #0]
801f1b6: 4619 mov r1, r3
801f1b8: 4b2a ldr r3, [pc, #168] @ (801f264 <tcp_receive+0x5e8>)
801f1ba: 681b ldr r3, [r3, #0]
801f1bc: 440b add r3, r1
801f1be: 1ad3 subs r3, r2, r3
801f1c0: 3301 adds r3, #1
801f1c2: 2b00 cmp r3, #0
801f1c4: f300 8082 bgt.w 801f2cc <tcp_receive+0x650>
After we are done with adjusting the pbuf pointers we must
adjust the ->data pointer in the seg and the segment
length.*/
struct pbuf *p = inseg.p;
801f1c8: 4b27 ldr r3, [pc, #156] @ (801f268 <tcp_receive+0x5ec>)
801f1ca: 685b ldr r3, [r3, #4]
801f1cc: 647b str r3, [r7, #68] @ 0x44
u32_t off32 = pcb->rcv_nxt - seqno;
801f1ce: 687b ldr r3, [r7, #4]
801f1d0: 6a5a ldr r2, [r3, #36] @ 0x24
801f1d2: 4b24 ldr r3, [pc, #144] @ (801f264 <tcp_receive+0x5e8>)
801f1d4: 681b ldr r3, [r3, #0]
801f1d6: 1ad3 subs r3, r2, r3
801f1d8: 627b str r3, [r7, #36] @ 0x24
u16_t new_tot_len, off;
LWIP_ASSERT("inseg.p != NULL", inseg.p);
801f1da: 4b23 ldr r3, [pc, #140] @ (801f268 <tcp_receive+0x5ec>)
801f1dc: 685b ldr r3, [r3, #4]
801f1de: 2b00 cmp r3, #0
801f1e0: d106 bne.n 801f1f0 <tcp_receive+0x574>
801f1e2: 4b22 ldr r3, [pc, #136] @ (801f26c <tcp_receive+0x5f0>)
801f1e4: f240 5294 movw r2, #1428 @ 0x594
801f1e8: 4921 ldr r1, [pc, #132] @ (801f270 <tcp_receive+0x5f4>)
801f1ea: 4822 ldr r0, [pc, #136] @ (801f274 <tcp_receive+0x5f8>)
801f1ec: f00b fc1e bl 802aa2c <iprintf>
LWIP_ASSERT("insane offset!", (off32 < 0xffff));
801f1f0: 6a7b ldr r3, [r7, #36] @ 0x24
801f1f2: f64f 72fe movw r2, #65534 @ 0xfffe
801f1f6: 4293 cmp r3, r2
801f1f8: d906 bls.n 801f208 <tcp_receive+0x58c>
801f1fa: 4b1c ldr r3, [pc, #112] @ (801f26c <tcp_receive+0x5f0>)
801f1fc: f240 5295 movw r2, #1429 @ 0x595
801f200: 491d ldr r1, [pc, #116] @ (801f278 <tcp_receive+0x5fc>)
801f202: 481c ldr r0, [pc, #112] @ (801f274 <tcp_receive+0x5f8>)
801f204: f00b fc12 bl 802aa2c <iprintf>
off = (u16_t)off32;
801f208: 6a7b ldr r3, [r7, #36] @ 0x24
801f20a: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off));
801f20e: 4b16 ldr r3, [pc, #88] @ (801f268 <tcp_receive+0x5ec>)
801f210: 685b ldr r3, [r3, #4]
801f212: 891b ldrh r3, [r3, #8]
801f214: f8b7 2042 ldrh.w r2, [r7, #66] @ 0x42
801f218: 429a cmp r2, r3
801f21a: d906 bls.n 801f22a <tcp_receive+0x5ae>
801f21c: 4b13 ldr r3, [pc, #76] @ (801f26c <tcp_receive+0x5f0>)
801f21e: f240 5297 movw r2, #1431 @ 0x597
801f222: 4916 ldr r1, [pc, #88] @ (801f27c <tcp_receive+0x600>)
801f224: 4813 ldr r0, [pc, #76] @ (801f274 <tcp_receive+0x5f8>)
801f226: f00b fc01 bl 802aa2c <iprintf>
inseg.len -= off;
801f22a: 4b0f ldr r3, [pc, #60] @ (801f268 <tcp_receive+0x5ec>)
801f22c: 891a ldrh r2, [r3, #8]
801f22e: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
801f232: 1ad3 subs r3, r2, r3
801f234: b29a uxth r2, r3
801f236: 4b0c ldr r3, [pc, #48] @ (801f268 <tcp_receive+0x5ec>)
801f238: 811a strh r2, [r3, #8]
new_tot_len = (u16_t)(inseg.p->tot_len - off);
801f23a: 4b0b ldr r3, [pc, #44] @ (801f268 <tcp_receive+0x5ec>)
801f23c: 685b ldr r3, [r3, #4]
801f23e: 891a ldrh r2, [r3, #8]
801f240: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
801f244: 1ad3 subs r3, r2, r3
801f246: 847b strh r3, [r7, #34] @ 0x22
while (p->len < off) {
801f248: e02a b.n 801f2a0 <tcp_receive+0x624>
801f24a: bf00 nop
801f24c: 080302c0 .word 0x080302c0
801f250: 080302c8 .word 0x080302c8
801f254: 2402afec .word 0x2402afec
801f258: 2402afe8 .word 0x2402afe8
801f25c: 2402afa8 .word 0x2402afa8
801f260: 2402afee .word 0x2402afee
801f264: 2402afe4 .word 0x2402afe4
801f268: 2402afc0 .word 0x2402afc0
801f26c: 0802ff58 .word 0x0802ff58
801f270: 080302d0 .word 0x080302d0
801f274: 0802ffa4 .word 0x0802ffa4
801f278: 080302e0 .word 0x080302e0
801f27c: 080302f0 .word 0x080302f0
off -= p->len;
801f280: 6c7b ldr r3, [r7, #68] @ 0x44
801f282: 895b ldrh r3, [r3, #10]
801f284: f8b7 2042 ldrh.w r2, [r7, #66] @ 0x42
801f288: 1ad3 subs r3, r2, r3
801f28a: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
/* all pbufs up to and including this one have len==0, so tot_len is equal */
p->tot_len = new_tot_len;
801f28e: 6c7b ldr r3, [r7, #68] @ 0x44
801f290: 8c7a ldrh r2, [r7, #34] @ 0x22
801f292: 811a strh r2, [r3, #8]
p->len = 0;
801f294: 6c7b ldr r3, [r7, #68] @ 0x44
801f296: 2200 movs r2, #0
801f298: 815a strh r2, [r3, #10]
p = p->next;
801f29a: 6c7b ldr r3, [r7, #68] @ 0x44
801f29c: 681b ldr r3, [r3, #0]
801f29e: 647b str r3, [r7, #68] @ 0x44
while (p->len < off) {
801f2a0: 6c7b ldr r3, [r7, #68] @ 0x44
801f2a2: 895b ldrh r3, [r3, #10]
801f2a4: f8b7 2042 ldrh.w r2, [r7, #66] @ 0x42
801f2a8: 429a cmp r2, r3
801f2aa: d8e9 bhi.n 801f280 <tcp_receive+0x604>
}
/* cannot fail... */
pbuf_remove_header(p, off);
801f2ac: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
801f2b0: 4619 mov r1, r3
801f2b2: 6c78 ldr r0, [r7, #68] @ 0x44
801f2b4: f7fc f88a bl 801b3cc <pbuf_remove_header>
inseg.tcphdr->seqno = seqno = pcb->rcv_nxt;
801f2b8: 687b ldr r3, [r7, #4]
801f2ba: 6a5b ldr r3, [r3, #36] @ 0x24
801f2bc: 4a90 ldr r2, [pc, #576] @ (801f500 <tcp_receive+0x884>)
801f2be: 6013 str r3, [r2, #0]
801f2c0: 4b90 ldr r3, [pc, #576] @ (801f504 <tcp_receive+0x888>)
801f2c2: 691b ldr r3, [r3, #16]
801f2c4: 4a8e ldr r2, [pc, #568] @ (801f500 <tcp_receive+0x884>)
801f2c6: 6812 ldr r2, [r2, #0]
801f2c8: 605a str r2, [r3, #4]
if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
801f2ca: e00d b.n 801f2e8 <tcp_receive+0x66c>
} else {
if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
801f2cc: 4b8c ldr r3, [pc, #560] @ (801f500 <tcp_receive+0x884>)
801f2ce: 681a ldr r2, [r3, #0]
801f2d0: 687b ldr r3, [r7, #4]
801f2d2: 6a5b ldr r3, [r3, #36] @ 0x24
801f2d4: 1ad3 subs r3, r2, r3
801f2d6: 2b00 cmp r3, #0
801f2d8: da06 bge.n 801f2e8 <tcp_receive+0x66c>
/* the whole segment is < rcv_nxt */
/* must be a duplicate of a packet that has already been correctly handled */
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno));
tcp_ack_now(pcb);
801f2da: 687b ldr r3, [r7, #4]
801f2dc: 8b5b ldrh r3, [r3, #26]
801f2de: f043 0302 orr.w r3, r3, #2
801f2e2: b29a uxth r2, r3
801f2e4: 687b ldr r3, [r7, #4]
801f2e6: 835a strh r2, [r3, #26]
}
/* The sequence number must be within the window (above rcv_nxt
and below rcv_nxt + rcv_wnd) in order to be further
processed. */
if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
801f2e8: 4b85 ldr r3, [pc, #532] @ (801f500 <tcp_receive+0x884>)
801f2ea: 681a ldr r2, [r3, #0]
801f2ec: 687b ldr r3, [r7, #4]
801f2ee: 6a5b ldr r3, [r3, #36] @ 0x24
801f2f0: 1ad3 subs r3, r2, r3
801f2f2: 2b00 cmp r3, #0
801f2f4: f2c0 8427 blt.w 801fb46 <tcp_receive+0xeca>
801f2f8: 4b81 ldr r3, [pc, #516] @ (801f500 <tcp_receive+0x884>)
801f2fa: 681a ldr r2, [r3, #0]
801f2fc: 687b ldr r3, [r7, #4]
801f2fe: 6a5b ldr r3, [r3, #36] @ 0x24
801f300: 6879 ldr r1, [r7, #4]
801f302: 8d09 ldrh r1, [r1, #40] @ 0x28
801f304: 440b add r3, r1
801f306: 1ad3 subs r3, r2, r3
801f308: 3301 adds r3, #1
801f30a: 2b00 cmp r3, #0
801f30c: f300 841b bgt.w 801fb46 <tcp_receive+0xeca>
pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
if (pcb->rcv_nxt == seqno) {
801f310: 687b ldr r3, [r7, #4]
801f312: 6a5a ldr r2, [r3, #36] @ 0x24
801f314: 4b7a ldr r3, [pc, #488] @ (801f500 <tcp_receive+0x884>)
801f316: 681b ldr r3, [r3, #0]
801f318: 429a cmp r2, r3
801f31a: f040 8298 bne.w 801f84e <tcp_receive+0xbd2>
/* The incoming segment is the next in sequence. We check if
we have to trim the end of the segment and update rcv_nxt
and pass the data to the application. */
tcplen = TCP_TCPLEN(&inseg);
801f31e: 4b79 ldr r3, [pc, #484] @ (801f504 <tcp_receive+0x888>)
801f320: 891c ldrh r4, [r3, #8]
801f322: 4b78 ldr r3, [pc, #480] @ (801f504 <tcp_receive+0x888>)
801f324: 691b ldr r3, [r3, #16]
801f326: 899b ldrh r3, [r3, #12]
801f328: b29b uxth r3, r3
801f32a: 4618 mov r0, r3
801f32c: f7fa fc24 bl 8019b78 <lwip_htons>
801f330: 4603 mov r3, r0
801f332: b2db uxtb r3, r3
801f334: f003 0303 and.w r3, r3, #3
801f338: 2b00 cmp r3, #0
801f33a: d001 beq.n 801f340 <tcp_receive+0x6c4>
801f33c: 2301 movs r3, #1
801f33e: e000 b.n 801f342 <tcp_receive+0x6c6>
801f340: 2300 movs r3, #0
801f342: 4423 add r3, r4
801f344: b29a uxth r2, r3
801f346: 4b70 ldr r3, [pc, #448] @ (801f508 <tcp_receive+0x88c>)
801f348: 801a strh r2, [r3, #0]
if (tcplen > pcb->rcv_wnd) {
801f34a: 687b ldr r3, [r7, #4]
801f34c: 8d1a ldrh r2, [r3, #40] @ 0x28
801f34e: 4b6e ldr r3, [pc, #440] @ (801f508 <tcp_receive+0x88c>)
801f350: 881b ldrh r3, [r3, #0]
801f352: 429a cmp r2, r3
801f354: d274 bcs.n 801f440 <tcp_receive+0x7c4>
LWIP_DEBUGF(TCP_INPUT_DEBUG,
("tcp_receive: other end overran receive window"
"seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
801f356: 4b6b ldr r3, [pc, #428] @ (801f504 <tcp_receive+0x888>)
801f358: 691b ldr r3, [r3, #16]
801f35a: 899b ldrh r3, [r3, #12]
801f35c: b29b uxth r3, r3
801f35e: 4618 mov r0, r3
801f360: f7fa fc0a bl 8019b78 <lwip_htons>
801f364: 4603 mov r3, r0
801f366: b2db uxtb r3, r3
801f368: f003 0301 and.w r3, r3, #1
801f36c: 2b00 cmp r3, #0
801f36e: d01e beq.n 801f3ae <tcp_receive+0x732>
/* Must remove the FIN from the header as we're trimming
* that byte of sequence-space from the packet */
TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) & ~(unsigned int)TCP_FIN);
801f370: 4b64 ldr r3, [pc, #400] @ (801f504 <tcp_receive+0x888>)
801f372: 691b ldr r3, [r3, #16]
801f374: 899b ldrh r3, [r3, #12]
801f376: b29b uxth r3, r3
801f378: b21b sxth r3, r3
801f37a: f423 537c bic.w r3, r3, #16128 @ 0x3f00
801f37e: b21c sxth r4, r3
801f380: 4b60 ldr r3, [pc, #384] @ (801f504 <tcp_receive+0x888>)
801f382: 691b ldr r3, [r3, #16]
801f384: 899b ldrh r3, [r3, #12]
801f386: b29b uxth r3, r3
801f388: 4618 mov r0, r3
801f38a: f7fa fbf5 bl 8019b78 <lwip_htons>
801f38e: 4603 mov r3, r0
801f390: b2db uxtb r3, r3
801f392: f003 033e and.w r3, r3, #62 @ 0x3e
801f396: b29b uxth r3, r3
801f398: 4618 mov r0, r3
801f39a: f7fa fbed bl 8019b78 <lwip_htons>
801f39e: 4603 mov r3, r0
801f3a0: b21b sxth r3, r3
801f3a2: 4323 orrs r3, r4
801f3a4: b21a sxth r2, r3
801f3a6: 4b57 ldr r3, [pc, #348] @ (801f504 <tcp_receive+0x888>)
801f3a8: 691b ldr r3, [r3, #16]
801f3aa: b292 uxth r2, r2
801f3ac: 819a strh r2, [r3, #12]
}
/* Adjust length of segment to fit in the window. */
TCPWND_CHECK16(pcb->rcv_wnd);
inseg.len = (u16_t)pcb->rcv_wnd;
801f3ae: 687b ldr r3, [r7, #4]
801f3b0: 8d1a ldrh r2, [r3, #40] @ 0x28
801f3b2: 4b54 ldr r3, [pc, #336] @ (801f504 <tcp_receive+0x888>)
801f3b4: 811a strh r2, [r3, #8]
if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
801f3b6: 4b53 ldr r3, [pc, #332] @ (801f504 <tcp_receive+0x888>)
801f3b8: 691b ldr r3, [r3, #16]
801f3ba: 899b ldrh r3, [r3, #12]
801f3bc: b29b uxth r3, r3
801f3be: 4618 mov r0, r3
801f3c0: f7fa fbda bl 8019b78 <lwip_htons>
801f3c4: 4603 mov r3, r0
801f3c6: b2db uxtb r3, r3
801f3c8: f003 0302 and.w r3, r3, #2
801f3cc: 2b00 cmp r3, #0
801f3ce: d005 beq.n 801f3dc <tcp_receive+0x760>
inseg.len -= 1;
801f3d0: 4b4c ldr r3, [pc, #304] @ (801f504 <tcp_receive+0x888>)
801f3d2: 891b ldrh r3, [r3, #8]
801f3d4: 3b01 subs r3, #1
801f3d6: b29a uxth r2, r3
801f3d8: 4b4a ldr r3, [pc, #296] @ (801f504 <tcp_receive+0x888>)
801f3da: 811a strh r2, [r3, #8]
}
pbuf_realloc(inseg.p, inseg.len);
801f3dc: 4b49 ldr r3, [pc, #292] @ (801f504 <tcp_receive+0x888>)
801f3de: 685b ldr r3, [r3, #4]
801f3e0: 4a48 ldr r2, [pc, #288] @ (801f504 <tcp_receive+0x888>)
801f3e2: 8912 ldrh r2, [r2, #8]
801f3e4: 4611 mov r1, r2
801f3e6: 4618 mov r0, r3
801f3e8: f7fb fef2 bl 801b1d0 <pbuf_realloc>
tcplen = TCP_TCPLEN(&inseg);
801f3ec: 4b45 ldr r3, [pc, #276] @ (801f504 <tcp_receive+0x888>)
801f3ee: 891c ldrh r4, [r3, #8]
801f3f0: 4b44 ldr r3, [pc, #272] @ (801f504 <tcp_receive+0x888>)
801f3f2: 691b ldr r3, [r3, #16]
801f3f4: 899b ldrh r3, [r3, #12]
801f3f6: b29b uxth r3, r3
801f3f8: 4618 mov r0, r3
801f3fa: f7fa fbbd bl 8019b78 <lwip_htons>
801f3fe: 4603 mov r3, r0
801f400: b2db uxtb r3, r3
801f402: f003 0303 and.w r3, r3, #3
801f406: 2b00 cmp r3, #0
801f408: d001 beq.n 801f40e <tcp_receive+0x792>
801f40a: 2301 movs r3, #1
801f40c: e000 b.n 801f410 <tcp_receive+0x794>
801f40e: 2300 movs r3, #0
801f410: 4423 add r3, r4
801f412: b29a uxth r2, r3
801f414: 4b3c ldr r3, [pc, #240] @ (801f508 <tcp_receive+0x88c>)
801f416: 801a strh r2, [r3, #0]
LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
801f418: 4b3b ldr r3, [pc, #236] @ (801f508 <tcp_receive+0x88c>)
801f41a: 881b ldrh r3, [r3, #0]
801f41c: 461a mov r2, r3
801f41e: 4b38 ldr r3, [pc, #224] @ (801f500 <tcp_receive+0x884>)
801f420: 681b ldr r3, [r3, #0]
801f422: 441a add r2, r3
801f424: 687b ldr r3, [r7, #4]
801f426: 6a5b ldr r3, [r3, #36] @ 0x24
801f428: 6879 ldr r1, [r7, #4]
801f42a: 8d09 ldrh r1, [r1, #40] @ 0x28
801f42c: 440b add r3, r1
801f42e: 429a cmp r2, r3
801f430: d006 beq.n 801f440 <tcp_receive+0x7c4>
801f432: 4b36 ldr r3, [pc, #216] @ (801f50c <tcp_receive+0x890>)
801f434: f240 52cb movw r2, #1483 @ 0x5cb
801f438: 4935 ldr r1, [pc, #212] @ (801f510 <tcp_receive+0x894>)
801f43a: 4836 ldr r0, [pc, #216] @ (801f514 <tcp_receive+0x898>)
801f43c: f00b faf6 bl 802aa2c <iprintf>
}
#if TCP_QUEUE_OOSEQ
/* Received in-sequence data, adjust ooseq data if:
- FIN has been received or
- inseq overlaps with ooseq */
if (pcb->ooseq != NULL) {
801f440: 687b ldr r3, [r7, #4]
801f442: 6f5b ldr r3, [r3, #116] @ 0x74
801f444: 2b00 cmp r3, #0
801f446: f000 80e6 beq.w 801f616 <tcp_receive+0x99a>
if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
801f44a: 4b2e ldr r3, [pc, #184] @ (801f504 <tcp_receive+0x888>)
801f44c: 691b ldr r3, [r3, #16]
801f44e: 899b ldrh r3, [r3, #12]
801f450: b29b uxth r3, r3
801f452: 4618 mov r0, r3
801f454: f7fa fb90 bl 8019b78 <lwip_htons>
801f458: 4603 mov r3, r0
801f45a: b2db uxtb r3, r3
801f45c: f003 0301 and.w r3, r3, #1
801f460: 2b00 cmp r3, #0
801f462: d010 beq.n 801f486 <tcp_receive+0x80a>
LWIP_DEBUGF(TCP_INPUT_DEBUG,
("tcp_receive: received in-order FIN, binning ooseq queue\n"));
/* Received in-order FIN means anything that was received
* out of order must now have been received in-order, so
* bin the ooseq queue */
while (pcb->ooseq != NULL) {
801f464: e00a b.n 801f47c <tcp_receive+0x800>
struct tcp_seg *old_ooseq = pcb->ooseq;
801f466: 687b ldr r3, [r7, #4]
801f468: 6f5b ldr r3, [r3, #116] @ 0x74
801f46a: 60fb str r3, [r7, #12]
pcb->ooseq = pcb->ooseq->next;
801f46c: 687b ldr r3, [r7, #4]
801f46e: 6f5b ldr r3, [r3, #116] @ 0x74
801f470: 681a ldr r2, [r3, #0]
801f472: 687b ldr r3, [r7, #4]
801f474: 675a str r2, [r3, #116] @ 0x74
tcp_seg_free(old_ooseq);
801f476: 68f8 ldr r0, [r7, #12]
801f478: f7fd fcb9 bl 801cdee <tcp_seg_free>
while (pcb->ooseq != NULL) {
801f47c: 687b ldr r3, [r7, #4]
801f47e: 6f5b ldr r3, [r3, #116] @ 0x74
801f480: 2b00 cmp r3, #0
801f482: d1f0 bne.n 801f466 <tcp_receive+0x7ea>
801f484: e0c7 b.n 801f616 <tcp_receive+0x99a>
}
} else {
struct tcp_seg *next = pcb->ooseq;
801f486: 687b ldr r3, [r7, #4]
801f488: 6f5b ldr r3, [r3, #116] @ 0x74
801f48a: 63fb str r3, [r7, #60] @ 0x3c
/* Remove all segments on ooseq that are covered by inseg already.
* FIN is copied from ooseq to inseg if present. */
while (next &&
801f48c: e051 b.n 801f532 <tcp_receive+0x8b6>
TCP_SEQ_GEQ(seqno + tcplen,
next->tcphdr->seqno + next->len)) {
struct tcp_seg *tmp;
/* inseg cannot have FIN here (already processed above) */
if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
801f48e: 6bfb ldr r3, [r7, #60] @ 0x3c
801f490: 691b ldr r3, [r3, #16]
801f492: 899b ldrh r3, [r3, #12]
801f494: b29b uxth r3, r3
801f496: 4618 mov r0, r3
801f498: f7fa fb6e bl 8019b78 <lwip_htons>
801f49c: 4603 mov r3, r0
801f49e: b2db uxtb r3, r3
801f4a0: f003 0301 and.w r3, r3, #1
801f4a4: 2b00 cmp r3, #0
801f4a6: d03c beq.n 801f522 <tcp_receive+0x8a6>
(TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) {
801f4a8: 4b16 ldr r3, [pc, #88] @ (801f504 <tcp_receive+0x888>)
801f4aa: 691b ldr r3, [r3, #16]
801f4ac: 899b ldrh r3, [r3, #12]
801f4ae: b29b uxth r3, r3
801f4b0: 4618 mov r0, r3
801f4b2: f7fa fb61 bl 8019b78 <lwip_htons>
801f4b6: 4603 mov r3, r0
801f4b8: b2db uxtb r3, r3
801f4ba: f003 0302 and.w r3, r3, #2
if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
801f4be: 2b00 cmp r3, #0
801f4c0: d12f bne.n 801f522 <tcp_receive+0x8a6>
TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN);
801f4c2: 4b10 ldr r3, [pc, #64] @ (801f504 <tcp_receive+0x888>)
801f4c4: 691b ldr r3, [r3, #16]
801f4c6: 899b ldrh r3, [r3, #12]
801f4c8: b29c uxth r4, r3
801f4ca: 2001 movs r0, #1
801f4cc: f7fa fb54 bl 8019b78 <lwip_htons>
801f4d0: 4603 mov r3, r0
801f4d2: 461a mov r2, r3
801f4d4: 4b0b ldr r3, [pc, #44] @ (801f504 <tcp_receive+0x888>)
801f4d6: 691b ldr r3, [r3, #16]
801f4d8: 4322 orrs r2, r4
801f4da: b292 uxth r2, r2
801f4dc: 819a strh r2, [r3, #12]
tcplen = TCP_TCPLEN(&inseg);
801f4de: 4b09 ldr r3, [pc, #36] @ (801f504 <tcp_receive+0x888>)
801f4e0: 891c ldrh r4, [r3, #8]
801f4e2: 4b08 ldr r3, [pc, #32] @ (801f504 <tcp_receive+0x888>)
801f4e4: 691b ldr r3, [r3, #16]
801f4e6: 899b ldrh r3, [r3, #12]
801f4e8: b29b uxth r3, r3
801f4ea: 4618 mov r0, r3
801f4ec: f7fa fb44 bl 8019b78 <lwip_htons>
801f4f0: 4603 mov r3, r0
801f4f2: b2db uxtb r3, r3
801f4f4: f003 0303 and.w r3, r3, #3
801f4f8: 2b00 cmp r3, #0
801f4fa: d00d beq.n 801f518 <tcp_receive+0x89c>
801f4fc: 2301 movs r3, #1
801f4fe: e00c b.n 801f51a <tcp_receive+0x89e>
801f500: 2402afe4 .word 0x2402afe4
801f504: 2402afc0 .word 0x2402afc0
801f508: 2402afee .word 0x2402afee
801f50c: 0802ff58 .word 0x0802ff58
801f510: 08030300 .word 0x08030300
801f514: 0802ffa4 .word 0x0802ffa4
801f518: 2300 movs r3, #0
801f51a: 4423 add r3, r4
801f51c: b29a uxth r2, r3
801f51e: 4b98 ldr r3, [pc, #608] @ (801f780 <tcp_receive+0xb04>)
801f520: 801a strh r2, [r3, #0]
}
tmp = next;
801f522: 6bfb ldr r3, [r7, #60] @ 0x3c
801f524: 613b str r3, [r7, #16]
next = next->next;
801f526: 6bfb ldr r3, [r7, #60] @ 0x3c
801f528: 681b ldr r3, [r3, #0]
801f52a: 63fb str r3, [r7, #60] @ 0x3c
tcp_seg_free(tmp);
801f52c: 6938 ldr r0, [r7, #16]
801f52e: f7fd fc5e bl 801cdee <tcp_seg_free>
while (next &&
801f532: 6bfb ldr r3, [r7, #60] @ 0x3c
801f534: 2b00 cmp r3, #0
801f536: d00e beq.n 801f556 <tcp_receive+0x8da>
TCP_SEQ_GEQ(seqno + tcplen,
801f538: 4b91 ldr r3, [pc, #580] @ (801f780 <tcp_receive+0xb04>)
801f53a: 881b ldrh r3, [r3, #0]
801f53c: 461a mov r2, r3
801f53e: 4b91 ldr r3, [pc, #580] @ (801f784 <tcp_receive+0xb08>)
801f540: 681b ldr r3, [r3, #0]
801f542: 441a add r2, r3
801f544: 6bfb ldr r3, [r7, #60] @ 0x3c
801f546: 691b ldr r3, [r3, #16]
801f548: 685b ldr r3, [r3, #4]
801f54a: 6bf9 ldr r1, [r7, #60] @ 0x3c
801f54c: 8909 ldrh r1, [r1, #8]
801f54e: 440b add r3, r1
801f550: 1ad3 subs r3, r2, r3
while (next &&
801f552: 2b00 cmp r3, #0
801f554: da9b bge.n 801f48e <tcp_receive+0x812>
}
/* Now trim right side of inseg if it overlaps with the first
* segment on ooseq */
if (next &&
801f556: 6bfb ldr r3, [r7, #60] @ 0x3c
801f558: 2b00 cmp r3, #0
801f55a: d059 beq.n 801f610 <tcp_receive+0x994>
TCP_SEQ_GT(seqno + tcplen,
801f55c: 4b88 ldr r3, [pc, #544] @ (801f780 <tcp_receive+0xb04>)
801f55e: 881b ldrh r3, [r3, #0]
801f560: 461a mov r2, r3
801f562: 4b88 ldr r3, [pc, #544] @ (801f784 <tcp_receive+0xb08>)
801f564: 681b ldr r3, [r3, #0]
801f566: 441a add r2, r3
801f568: 6bfb ldr r3, [r7, #60] @ 0x3c
801f56a: 691b ldr r3, [r3, #16]
801f56c: 685b ldr r3, [r3, #4]
801f56e: 1ad3 subs r3, r2, r3
if (next &&
801f570: 2b00 cmp r3, #0
801f572: dd4d ble.n 801f610 <tcp_receive+0x994>
next->tcphdr->seqno)) {
/* inseg cannot have FIN here (already processed above) */
inseg.len = (u16_t)(next->tcphdr->seqno - seqno);
801f574: 6bfb ldr r3, [r7, #60] @ 0x3c
801f576: 691b ldr r3, [r3, #16]
801f578: 685b ldr r3, [r3, #4]
801f57a: b29a uxth r2, r3
801f57c: 4b81 ldr r3, [pc, #516] @ (801f784 <tcp_receive+0xb08>)
801f57e: 681b ldr r3, [r3, #0]
801f580: b29b uxth r3, r3
801f582: 1ad3 subs r3, r2, r3
801f584: b29a uxth r2, r3
801f586: 4b80 ldr r3, [pc, #512] @ (801f788 <tcp_receive+0xb0c>)
801f588: 811a strh r2, [r3, #8]
if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
801f58a: 4b7f ldr r3, [pc, #508] @ (801f788 <tcp_receive+0xb0c>)
801f58c: 691b ldr r3, [r3, #16]
801f58e: 899b ldrh r3, [r3, #12]
801f590: b29b uxth r3, r3
801f592: 4618 mov r0, r3
801f594: f7fa faf0 bl 8019b78 <lwip_htons>
801f598: 4603 mov r3, r0
801f59a: b2db uxtb r3, r3
801f59c: f003 0302 and.w r3, r3, #2
801f5a0: 2b00 cmp r3, #0
801f5a2: d005 beq.n 801f5b0 <tcp_receive+0x934>
inseg.len -= 1;
801f5a4: 4b78 ldr r3, [pc, #480] @ (801f788 <tcp_receive+0xb0c>)
801f5a6: 891b ldrh r3, [r3, #8]
801f5a8: 3b01 subs r3, #1
801f5aa: b29a uxth r2, r3
801f5ac: 4b76 ldr r3, [pc, #472] @ (801f788 <tcp_receive+0xb0c>)
801f5ae: 811a strh r2, [r3, #8]
}
pbuf_realloc(inseg.p, inseg.len);
801f5b0: 4b75 ldr r3, [pc, #468] @ (801f788 <tcp_receive+0xb0c>)
801f5b2: 685b ldr r3, [r3, #4]
801f5b4: 4a74 ldr r2, [pc, #464] @ (801f788 <tcp_receive+0xb0c>)
801f5b6: 8912 ldrh r2, [r2, #8]
801f5b8: 4611 mov r1, r2
801f5ba: 4618 mov r0, r3
801f5bc: f7fb fe08 bl 801b1d0 <pbuf_realloc>
tcplen = TCP_TCPLEN(&inseg);
801f5c0: 4b71 ldr r3, [pc, #452] @ (801f788 <tcp_receive+0xb0c>)
801f5c2: 891c ldrh r4, [r3, #8]
801f5c4: 4b70 ldr r3, [pc, #448] @ (801f788 <tcp_receive+0xb0c>)
801f5c6: 691b ldr r3, [r3, #16]
801f5c8: 899b ldrh r3, [r3, #12]
801f5ca: b29b uxth r3, r3
801f5cc: 4618 mov r0, r3
801f5ce: f7fa fad3 bl 8019b78 <lwip_htons>
801f5d2: 4603 mov r3, r0
801f5d4: b2db uxtb r3, r3
801f5d6: f003 0303 and.w r3, r3, #3
801f5da: 2b00 cmp r3, #0
801f5dc: d001 beq.n 801f5e2 <tcp_receive+0x966>
801f5de: 2301 movs r3, #1
801f5e0: e000 b.n 801f5e4 <tcp_receive+0x968>
801f5e2: 2300 movs r3, #0
801f5e4: 4423 add r3, r4
801f5e6: b29a uxth r2, r3
801f5e8: 4b65 ldr r3, [pc, #404] @ (801f780 <tcp_receive+0xb04>)
801f5ea: 801a strh r2, [r3, #0]
LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n",
801f5ec: 4b64 ldr r3, [pc, #400] @ (801f780 <tcp_receive+0xb04>)
801f5ee: 881b ldrh r3, [r3, #0]
801f5f0: 461a mov r2, r3
801f5f2: 4b64 ldr r3, [pc, #400] @ (801f784 <tcp_receive+0xb08>)
801f5f4: 681b ldr r3, [r3, #0]
801f5f6: 441a add r2, r3
801f5f8: 6bfb ldr r3, [r7, #60] @ 0x3c
801f5fa: 691b ldr r3, [r3, #16]
801f5fc: 685b ldr r3, [r3, #4]
801f5fe: 429a cmp r2, r3
801f600: d006 beq.n 801f610 <tcp_receive+0x994>
801f602: 4b62 ldr r3, [pc, #392] @ (801f78c <tcp_receive+0xb10>)
801f604: f240 52fc movw r2, #1532 @ 0x5fc
801f608: 4961 ldr r1, [pc, #388] @ (801f790 <tcp_receive+0xb14>)
801f60a: 4862 ldr r0, [pc, #392] @ (801f794 <tcp_receive+0xb18>)
801f60c: f00b fa0e bl 802aa2c <iprintf>
(seqno + tcplen) == next->tcphdr->seqno);
}
pcb->ooseq = next;
801f610: 687b ldr r3, [r7, #4]
801f612: 6bfa ldr r2, [r7, #60] @ 0x3c
801f614: 675a str r2, [r3, #116] @ 0x74
}
}
#endif /* TCP_QUEUE_OOSEQ */
pcb->rcv_nxt = seqno + tcplen;
801f616: 4b5a ldr r3, [pc, #360] @ (801f780 <tcp_receive+0xb04>)
801f618: 881b ldrh r3, [r3, #0]
801f61a: 461a mov r2, r3
801f61c: 4b59 ldr r3, [pc, #356] @ (801f784 <tcp_receive+0xb08>)
801f61e: 681b ldr r3, [r3, #0]
801f620: 441a add r2, r3
801f622: 687b ldr r3, [r7, #4]
801f624: 625a str r2, [r3, #36] @ 0x24
/* Update the receiver's (our) window. */
LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen);
801f626: 687b ldr r3, [r7, #4]
801f628: 8d1a ldrh r2, [r3, #40] @ 0x28
801f62a: 4b55 ldr r3, [pc, #340] @ (801f780 <tcp_receive+0xb04>)
801f62c: 881b ldrh r3, [r3, #0]
801f62e: 429a cmp r2, r3
801f630: d206 bcs.n 801f640 <tcp_receive+0x9c4>
801f632: 4b56 ldr r3, [pc, #344] @ (801f78c <tcp_receive+0xb10>)
801f634: f240 6207 movw r2, #1543 @ 0x607
801f638: 4957 ldr r1, [pc, #348] @ (801f798 <tcp_receive+0xb1c>)
801f63a: 4856 ldr r0, [pc, #344] @ (801f794 <tcp_receive+0xb18>)
801f63c: f00b f9f6 bl 802aa2c <iprintf>
pcb->rcv_wnd -= tcplen;
801f640: 687b ldr r3, [r7, #4]
801f642: 8d1a ldrh r2, [r3, #40] @ 0x28
801f644: 4b4e ldr r3, [pc, #312] @ (801f780 <tcp_receive+0xb04>)
801f646: 881b ldrh r3, [r3, #0]
801f648: 1ad3 subs r3, r2, r3
801f64a: b29a uxth r2, r3
801f64c: 687b ldr r3, [r7, #4]
801f64e: 851a strh r2, [r3, #40] @ 0x28
tcp_update_rcv_ann_wnd(pcb);
801f650: 6878 ldr r0, [r7, #4]
801f652: f7fc fd85 bl 801c160 <tcp_update_rcv_ann_wnd>
chains its data on this pbuf as well.
If the segment was a FIN, we set the TF_GOT_FIN flag that will
be used to indicate to the application that the remote side has
closed its end of the connection. */
if (inseg.p->tot_len > 0) {
801f656: 4b4c ldr r3, [pc, #304] @ (801f788 <tcp_receive+0xb0c>)
801f658: 685b ldr r3, [r3, #4]
801f65a: 891b ldrh r3, [r3, #8]
801f65c: 2b00 cmp r3, #0
801f65e: d006 beq.n 801f66e <tcp_receive+0x9f2>
recv_data = inseg.p;
801f660: 4b49 ldr r3, [pc, #292] @ (801f788 <tcp_receive+0xb0c>)
801f662: 685b ldr r3, [r3, #4]
801f664: 4a4d ldr r2, [pc, #308] @ (801f79c <tcp_receive+0xb20>)
801f666: 6013 str r3, [r2, #0]
/* Since this pbuf now is the responsibility of the
application, we delete our reference to it so that we won't
(mistakingly) deallocate it. */
inseg.p = NULL;
801f668: 4b47 ldr r3, [pc, #284] @ (801f788 <tcp_receive+0xb0c>)
801f66a: 2200 movs r2, #0
801f66c: 605a str r2, [r3, #4]
}
if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
801f66e: 4b46 ldr r3, [pc, #280] @ (801f788 <tcp_receive+0xb0c>)
801f670: 691b ldr r3, [r3, #16]
801f672: 899b ldrh r3, [r3, #12]
801f674: b29b uxth r3, r3
801f676: 4618 mov r0, r3
801f678: f7fa fa7e bl 8019b78 <lwip_htons>
801f67c: 4603 mov r3, r0
801f67e: b2db uxtb r3, r3
801f680: f003 0301 and.w r3, r3, #1
801f684: 2b00 cmp r3, #0
801f686: f000 80b8 beq.w 801f7fa <tcp_receive+0xb7e>
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n"));
recv_flags |= TF_GOT_FIN;
801f68a: 4b45 ldr r3, [pc, #276] @ (801f7a0 <tcp_receive+0xb24>)
801f68c: 781b ldrb r3, [r3, #0]
801f68e: f043 0320 orr.w r3, r3, #32
801f692: b2da uxtb r2, r3
801f694: 4b42 ldr r3, [pc, #264] @ (801f7a0 <tcp_receive+0xb24>)
801f696: 701a strb r2, [r3, #0]
}
#if TCP_QUEUE_OOSEQ
/* We now check if we have segments on the ->ooseq queue that
are now in sequence. */
while (pcb->ooseq != NULL &&
801f698: e0af b.n 801f7fa <tcp_receive+0xb7e>
pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {
struct tcp_seg *cseg = pcb->ooseq;
801f69a: 687b ldr r3, [r7, #4]
801f69c: 6f5b ldr r3, [r3, #116] @ 0x74
801f69e: 60bb str r3, [r7, #8]
seqno = pcb->ooseq->tcphdr->seqno;
801f6a0: 687b ldr r3, [r7, #4]
801f6a2: 6f5b ldr r3, [r3, #116] @ 0x74
801f6a4: 691b ldr r3, [r3, #16]
801f6a6: 685b ldr r3, [r3, #4]
801f6a8: 4a36 ldr r2, [pc, #216] @ (801f784 <tcp_receive+0xb08>)
801f6aa: 6013 str r3, [r2, #0]
pcb->rcv_nxt += TCP_TCPLEN(cseg);
801f6ac: 68bb ldr r3, [r7, #8]
801f6ae: 891b ldrh r3, [r3, #8]
801f6b0: 461c mov r4, r3
801f6b2: 68bb ldr r3, [r7, #8]
801f6b4: 691b ldr r3, [r3, #16]
801f6b6: 899b ldrh r3, [r3, #12]
801f6b8: b29b uxth r3, r3
801f6ba: 4618 mov r0, r3
801f6bc: f7fa fa5c bl 8019b78 <lwip_htons>
801f6c0: 4603 mov r3, r0
801f6c2: b2db uxtb r3, r3
801f6c4: f003 0303 and.w r3, r3, #3
801f6c8: 2b00 cmp r3, #0
801f6ca: d001 beq.n 801f6d0 <tcp_receive+0xa54>
801f6cc: 2301 movs r3, #1
801f6ce: e000 b.n 801f6d2 <tcp_receive+0xa56>
801f6d0: 2300 movs r3, #0
801f6d2: 191a adds r2, r3, r4
801f6d4: 687b ldr r3, [r7, #4]
801f6d6: 6a5b ldr r3, [r3, #36] @ 0x24
801f6d8: 441a add r2, r3
801f6da: 687b ldr r3, [r7, #4]
801f6dc: 625a str r2, [r3, #36] @ 0x24
LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n",
801f6de: 687b ldr r3, [r7, #4]
801f6e0: 8d1b ldrh r3, [r3, #40] @ 0x28
801f6e2: 461c mov r4, r3
801f6e4: 68bb ldr r3, [r7, #8]
801f6e6: 891b ldrh r3, [r3, #8]
801f6e8: 461d mov r5, r3
801f6ea: 68bb ldr r3, [r7, #8]
801f6ec: 691b ldr r3, [r3, #16]
801f6ee: 899b ldrh r3, [r3, #12]
801f6f0: b29b uxth r3, r3
801f6f2: 4618 mov r0, r3
801f6f4: f7fa fa40 bl 8019b78 <lwip_htons>
801f6f8: 4603 mov r3, r0
801f6fa: b2db uxtb r3, r3
801f6fc: f003 0303 and.w r3, r3, #3
801f700: 2b00 cmp r3, #0
801f702: d001 beq.n 801f708 <tcp_receive+0xa8c>
801f704: 2301 movs r3, #1
801f706: e000 b.n 801f70a <tcp_receive+0xa8e>
801f708: 2300 movs r3, #0
801f70a: 442b add r3, r5
801f70c: 429c cmp r4, r3
801f70e: d206 bcs.n 801f71e <tcp_receive+0xaa2>
801f710: 4b1e ldr r3, [pc, #120] @ (801f78c <tcp_receive+0xb10>)
801f712: f240 622b movw r2, #1579 @ 0x62b
801f716: 4923 ldr r1, [pc, #140] @ (801f7a4 <tcp_receive+0xb28>)
801f718: 481e ldr r0, [pc, #120] @ (801f794 <tcp_receive+0xb18>)
801f71a: f00b f987 bl 802aa2c <iprintf>
pcb->rcv_wnd >= TCP_TCPLEN(cseg));
pcb->rcv_wnd -= TCP_TCPLEN(cseg);
801f71e: 68bb ldr r3, [r7, #8]
801f720: 891b ldrh r3, [r3, #8]
801f722: 461c mov r4, r3
801f724: 68bb ldr r3, [r7, #8]
801f726: 691b ldr r3, [r3, #16]
801f728: 899b ldrh r3, [r3, #12]
801f72a: b29b uxth r3, r3
801f72c: 4618 mov r0, r3
801f72e: f7fa fa23 bl 8019b78 <lwip_htons>
801f732: 4603 mov r3, r0
801f734: b2db uxtb r3, r3
801f736: f003 0303 and.w r3, r3, #3
801f73a: 2b00 cmp r3, #0
801f73c: d001 beq.n 801f742 <tcp_receive+0xac6>
801f73e: 2301 movs r3, #1
801f740: e000 b.n 801f744 <tcp_receive+0xac8>
801f742: 2300 movs r3, #0
801f744: 1919 adds r1, r3, r4
801f746: 687b ldr r3, [r7, #4]
801f748: 8d1a ldrh r2, [r3, #40] @ 0x28
801f74a: b28b uxth r3, r1
801f74c: 1ad3 subs r3, r2, r3
801f74e: b29a uxth r2, r3
801f750: 687b ldr r3, [r7, #4]
801f752: 851a strh r2, [r3, #40] @ 0x28
tcp_update_rcv_ann_wnd(pcb);
801f754: 6878 ldr r0, [r7, #4]
801f756: f7fc fd03 bl 801c160 <tcp_update_rcv_ann_wnd>
if (cseg->p->tot_len > 0) {
801f75a: 68bb ldr r3, [r7, #8]
801f75c: 685b ldr r3, [r3, #4]
801f75e: 891b ldrh r3, [r3, #8]
801f760: 2b00 cmp r3, #0
801f762: d028 beq.n 801f7b6 <tcp_receive+0xb3a>
/* Chain this pbuf onto the pbuf that we will pass to
the application. */
/* With window scaling, this can overflow recv_data->tot_len, but
that's not a problem since we explicitly fix that before passing
recv_data to the application. */
if (recv_data) {
801f764: 4b0d ldr r3, [pc, #52] @ (801f79c <tcp_receive+0xb20>)
801f766: 681b ldr r3, [r3, #0]
801f768: 2b00 cmp r3, #0
801f76a: d01d beq.n 801f7a8 <tcp_receive+0xb2c>
pbuf_cat(recv_data, cseg->p);
801f76c: 4b0b ldr r3, [pc, #44] @ (801f79c <tcp_receive+0xb20>)
801f76e: 681a ldr r2, [r3, #0]
801f770: 68bb ldr r3, [r7, #8]
801f772: 685b ldr r3, [r3, #4]
801f774: 4619 mov r1, r3
801f776: 4610 mov r0, r2
801f778: f7fb ffae bl 801b6d8 <pbuf_cat>
801f77c: e018 b.n 801f7b0 <tcp_receive+0xb34>
801f77e: bf00 nop
801f780: 2402afee .word 0x2402afee
801f784: 2402afe4 .word 0x2402afe4
801f788: 2402afc0 .word 0x2402afc0
801f78c: 0802ff58 .word 0x0802ff58
801f790: 08030338 .word 0x08030338
801f794: 0802ffa4 .word 0x0802ffa4
801f798: 08030374 .word 0x08030374
801f79c: 2402aff4 .word 0x2402aff4
801f7a0: 2402aff1 .word 0x2402aff1
801f7a4: 08030394 .word 0x08030394
} else {
recv_data = cseg->p;
801f7a8: 68bb ldr r3, [r7, #8]
801f7aa: 685b ldr r3, [r3, #4]
801f7ac: 4a70 ldr r2, [pc, #448] @ (801f970 <tcp_receive+0xcf4>)
801f7ae: 6013 str r3, [r2, #0]
}
cseg->p = NULL;
801f7b0: 68bb ldr r3, [r7, #8]
801f7b2: 2200 movs r2, #0
801f7b4: 605a str r2, [r3, #4]
}
if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
801f7b6: 68bb ldr r3, [r7, #8]
801f7b8: 691b ldr r3, [r3, #16]
801f7ba: 899b ldrh r3, [r3, #12]
801f7bc: b29b uxth r3, r3
801f7be: 4618 mov r0, r3
801f7c0: f7fa f9da bl 8019b78 <lwip_htons>
801f7c4: 4603 mov r3, r0
801f7c6: b2db uxtb r3, r3
801f7c8: f003 0301 and.w r3, r3, #1
801f7cc: 2b00 cmp r3, #0
801f7ce: d00d beq.n 801f7ec <tcp_receive+0xb70>
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n"));
recv_flags |= TF_GOT_FIN;
801f7d0: 4b68 ldr r3, [pc, #416] @ (801f974 <tcp_receive+0xcf8>)
801f7d2: 781b ldrb r3, [r3, #0]
801f7d4: f043 0320 orr.w r3, r3, #32
801f7d8: b2da uxtb r2, r3
801f7da: 4b66 ldr r3, [pc, #408] @ (801f974 <tcp_receive+0xcf8>)
801f7dc: 701a strb r2, [r3, #0]
if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */
801f7de: 687b ldr r3, [r7, #4]
801f7e0: 7d1b ldrb r3, [r3, #20]
801f7e2: 2b04 cmp r3, #4
801f7e4: d102 bne.n 801f7ec <tcp_receive+0xb70>
pcb->state = CLOSE_WAIT;
801f7e6: 687b ldr r3, [r7, #4]
801f7e8: 2207 movs r2, #7
801f7ea: 751a strb r2, [r3, #20]
}
}
pcb->ooseq = cseg->next;
801f7ec: 68bb ldr r3, [r7, #8]
801f7ee: 681a ldr r2, [r3, #0]
801f7f0: 687b ldr r3, [r7, #4]
801f7f2: 675a str r2, [r3, #116] @ 0x74
tcp_seg_free(cseg);
801f7f4: 68b8 ldr r0, [r7, #8]
801f7f6: f7fd fafa bl 801cdee <tcp_seg_free>
while (pcb->ooseq != NULL &&
801f7fa: 687b ldr r3, [r7, #4]
801f7fc: 6f5b ldr r3, [r3, #116] @ 0x74
801f7fe: 2b00 cmp r3, #0
801f800: d008 beq.n 801f814 <tcp_receive+0xb98>
pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {
801f802: 687b ldr r3, [r7, #4]
801f804: 6f5b ldr r3, [r3, #116] @ 0x74
801f806: 691b ldr r3, [r3, #16]
801f808: 685a ldr r2, [r3, #4]
801f80a: 687b ldr r3, [r7, #4]
801f80c: 6a5b ldr r3, [r3, #36] @ 0x24
while (pcb->ooseq != NULL &&
801f80e: 429a cmp r2, r3
801f810: f43f af43 beq.w 801f69a <tcp_receive+0xa1e>
#endif /* LWIP_TCP_SACK_OUT */
#endif /* TCP_QUEUE_OOSEQ */
/* Acknowledge the segment(s). */
tcp_ack(pcb);
801f814: 687b ldr r3, [r7, #4]
801f816: 8b5b ldrh r3, [r3, #26]
801f818: f003 0301 and.w r3, r3, #1
801f81c: 2b00 cmp r3, #0
801f81e: d00e beq.n 801f83e <tcp_receive+0xbc2>
801f820: 687b ldr r3, [r7, #4]
801f822: 8b5b ldrh r3, [r3, #26]
801f824: f023 0301 bic.w r3, r3, #1
801f828: b29a uxth r2, r3
801f82a: 687b ldr r3, [r7, #4]
801f82c: 835a strh r2, [r3, #26]
801f82e: 687b ldr r3, [r7, #4]
801f830: 8b5b ldrh r3, [r3, #26]
801f832: f043 0302 orr.w r3, r3, #2
801f836: b29a uxth r2, r3
801f838: 687b ldr r3, [r7, #4]
801f83a: 835a strh r2, [r3, #26]
if (pcb->rcv_nxt == seqno) {
801f83c: e187 b.n 801fb4e <tcp_receive+0xed2>
tcp_ack(pcb);
801f83e: 687b ldr r3, [r7, #4]
801f840: 8b5b ldrh r3, [r3, #26]
801f842: f043 0301 orr.w r3, r3, #1
801f846: b29a uxth r2, r3
801f848: 687b ldr r3, [r7, #4]
801f84a: 835a strh r2, [r3, #26]
if (pcb->rcv_nxt == seqno) {
801f84c: e17f b.n 801fb4e <tcp_receive+0xed2>
} else {
/* We get here if the incoming segment is out-of-sequence. */
#if TCP_QUEUE_OOSEQ
/* We queue the segment on the ->ooseq queue. */
if (pcb->ooseq == NULL) {
801f84e: 687b ldr r3, [r7, #4]
801f850: 6f5b ldr r3, [r3, #116] @ 0x74
801f852: 2b00 cmp r3, #0
801f854: d106 bne.n 801f864 <tcp_receive+0xbe8>
pcb->ooseq = tcp_seg_copy(&inseg);
801f856: 4848 ldr r0, [pc, #288] @ (801f978 <tcp_receive+0xcfc>)
801f858: f7fd fae2 bl 801ce20 <tcp_seg_copy>
801f85c: 4602 mov r2, r0
801f85e: 687b ldr r3, [r7, #4]
801f860: 675a str r2, [r3, #116] @ 0x74
801f862: e16c b.n 801fb3e <tcp_receive+0xec2>
#if LWIP_TCP_SACK_OUT
/* This is the left edge of the lowest possible SACK range.
It may start before the newly received segment (possibly adjusted below). */
u32_t sackbeg = TCP_SEQ_LT(seqno, pcb->ooseq->tcphdr->seqno) ? seqno : pcb->ooseq->tcphdr->seqno;
#endif /* LWIP_TCP_SACK_OUT */
struct tcp_seg *next, *prev = NULL;
801f864: 2300 movs r3, #0
801f866: 637b str r3, [r7, #52] @ 0x34
for (next = pcb->ooseq; next != NULL; next = next->next) {
801f868: 687b ldr r3, [r7, #4]
801f86a: 6f5b ldr r3, [r3, #116] @ 0x74
801f86c: 63bb str r3, [r7, #56] @ 0x38
801f86e: e156 b.n 801fb1e <tcp_receive+0xea2>
if (seqno == next->tcphdr->seqno) {
801f870: 6bbb ldr r3, [r7, #56] @ 0x38
801f872: 691b ldr r3, [r3, #16]
801f874: 685a ldr r2, [r3, #4]
801f876: 4b41 ldr r3, [pc, #260] @ (801f97c <tcp_receive+0xd00>)
801f878: 681b ldr r3, [r3, #0]
801f87a: 429a cmp r2, r3
801f87c: d11d bne.n 801f8ba <tcp_receive+0xc3e>
/* The sequence number of the incoming segment is the
same as the sequence number of the segment on
->ooseq. We check the lengths to see which one to
discard. */
if (inseg.len > next->len) {
801f87e: 4b3e ldr r3, [pc, #248] @ (801f978 <tcp_receive+0xcfc>)
801f880: 891a ldrh r2, [r3, #8]
801f882: 6bbb ldr r3, [r7, #56] @ 0x38
801f884: 891b ldrh r3, [r3, #8]
801f886: 429a cmp r2, r3
801f888: f240 814e bls.w 801fb28 <tcp_receive+0xeac>
/* The incoming segment is larger than the old
segment. We replace some segments with the new
one. */
struct tcp_seg *cseg = tcp_seg_copy(&inseg);
801f88c: 483a ldr r0, [pc, #232] @ (801f978 <tcp_receive+0xcfc>)
801f88e: f7fd fac7 bl 801ce20 <tcp_seg_copy>
801f892: 6178 str r0, [r7, #20]
if (cseg != NULL) {
801f894: 697b ldr r3, [r7, #20]
801f896: 2b00 cmp r3, #0
801f898: f000 8148 beq.w 801fb2c <tcp_receive+0xeb0>
if (prev != NULL) {
801f89c: 6b7b ldr r3, [r7, #52] @ 0x34
801f89e: 2b00 cmp r3, #0
801f8a0: d003 beq.n 801f8aa <tcp_receive+0xc2e>
prev->next = cseg;
801f8a2: 6b7b ldr r3, [r7, #52] @ 0x34
801f8a4: 697a ldr r2, [r7, #20]
801f8a6: 601a str r2, [r3, #0]
801f8a8: e002 b.n 801f8b0 <tcp_receive+0xc34>
} else {
pcb->ooseq = cseg;
801f8aa: 687b ldr r3, [r7, #4]
801f8ac: 697a ldr r2, [r7, #20]
801f8ae: 675a str r2, [r3, #116] @ 0x74
}
tcp_oos_insert_segment(cseg, next);
801f8b0: 6bb9 ldr r1, [r7, #56] @ 0x38
801f8b2: 6978 ldr r0, [r7, #20]
801f8b4: f7ff f8de bl 801ea74 <tcp_oos_insert_segment>
}
break;
801f8b8: e138 b.n 801fb2c <tcp_receive+0xeb0>
segment was smaller than the old one; in either
case, we ditch the incoming segment. */
break;
}
} else {
if (prev == NULL) {
801f8ba: 6b7b ldr r3, [r7, #52] @ 0x34
801f8bc: 2b00 cmp r3, #0
801f8be: d117 bne.n 801f8f0 <tcp_receive+0xc74>
if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {
801f8c0: 4b2e ldr r3, [pc, #184] @ (801f97c <tcp_receive+0xd00>)
801f8c2: 681a ldr r2, [r3, #0]
801f8c4: 6bbb ldr r3, [r7, #56] @ 0x38
801f8c6: 691b ldr r3, [r3, #16]
801f8c8: 685b ldr r3, [r3, #4]
801f8ca: 1ad3 subs r3, r2, r3
801f8cc: 2b00 cmp r3, #0
801f8ce: da57 bge.n 801f980 <tcp_receive+0xd04>
/* The sequence number of the incoming segment is lower
than the sequence number of the first segment on the
queue. We put the incoming segment first on the
queue. */
struct tcp_seg *cseg = tcp_seg_copy(&inseg);
801f8d0: 4829 ldr r0, [pc, #164] @ (801f978 <tcp_receive+0xcfc>)
801f8d2: f7fd faa5 bl 801ce20 <tcp_seg_copy>
801f8d6: 61b8 str r0, [r7, #24]
if (cseg != NULL) {
801f8d8: 69bb ldr r3, [r7, #24]
801f8da: 2b00 cmp r3, #0
801f8dc: f000 8128 beq.w 801fb30 <tcp_receive+0xeb4>
pcb->ooseq = cseg;
801f8e0: 687b ldr r3, [r7, #4]
801f8e2: 69ba ldr r2, [r7, #24]
801f8e4: 675a str r2, [r3, #116] @ 0x74
tcp_oos_insert_segment(cseg, next);
801f8e6: 6bb9 ldr r1, [r7, #56] @ 0x38
801f8e8: 69b8 ldr r0, [r7, #24]
801f8ea: f7ff f8c3 bl 801ea74 <tcp_oos_insert_segment>
}
break;
801f8ee: e11f b.n 801fb30 <tcp_receive+0xeb4>
}
} else {
/*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) &&
TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/
if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno + 1, next->tcphdr->seqno - 1)) {
801f8f0: 4b22 ldr r3, [pc, #136] @ (801f97c <tcp_receive+0xd00>)
801f8f2: 681a ldr r2, [r3, #0]
801f8f4: 6b7b ldr r3, [r7, #52] @ 0x34
801f8f6: 691b ldr r3, [r3, #16]
801f8f8: 685b ldr r3, [r3, #4]
801f8fa: 1ad3 subs r3, r2, r3
801f8fc: 3b01 subs r3, #1
801f8fe: 2b00 cmp r3, #0
801f900: db3e blt.n 801f980 <tcp_receive+0xd04>
801f902: 4b1e ldr r3, [pc, #120] @ (801f97c <tcp_receive+0xd00>)
801f904: 681a ldr r2, [r3, #0]
801f906: 6bbb ldr r3, [r7, #56] @ 0x38
801f908: 691b ldr r3, [r3, #16]
801f90a: 685b ldr r3, [r3, #4]
801f90c: 1ad3 subs r3, r2, r3
801f90e: 3301 adds r3, #1
801f910: 2b00 cmp r3, #0
801f912: dc35 bgt.n 801f980 <tcp_receive+0xd04>
/* The sequence number of the incoming segment is in
between the sequence numbers of the previous and
the next segment on ->ooseq. We trim trim the previous
segment, delete next segments that included in received segment
and trim received, if needed. */
struct tcp_seg *cseg = tcp_seg_copy(&inseg);
801f914: 4818 ldr r0, [pc, #96] @ (801f978 <tcp_receive+0xcfc>)
801f916: f7fd fa83 bl 801ce20 <tcp_seg_copy>
801f91a: 61f8 str r0, [r7, #28]
if (cseg != NULL) {
801f91c: 69fb ldr r3, [r7, #28]
801f91e: 2b00 cmp r3, #0
801f920: f000 8108 beq.w 801fb34 <tcp_receive+0xeb8>
if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) {
801f924: 6b7b ldr r3, [r7, #52] @ 0x34
801f926: 691b ldr r3, [r3, #16]
801f928: 685b ldr r3, [r3, #4]
801f92a: 6b7a ldr r2, [r7, #52] @ 0x34
801f92c: 8912 ldrh r2, [r2, #8]
801f92e: 441a add r2, r3
801f930: 4b12 ldr r3, [pc, #72] @ (801f97c <tcp_receive+0xd00>)
801f932: 681b ldr r3, [r3, #0]
801f934: 1ad3 subs r3, r2, r3
801f936: 2b00 cmp r3, #0
801f938: dd12 ble.n 801f960 <tcp_receive+0xce4>
/* We need to trim the prev segment. */
prev->len = (u16_t)(seqno - prev->tcphdr->seqno);
801f93a: 4b10 ldr r3, [pc, #64] @ (801f97c <tcp_receive+0xd00>)
801f93c: 681b ldr r3, [r3, #0]
801f93e: b29a uxth r2, r3
801f940: 6b7b ldr r3, [r7, #52] @ 0x34
801f942: 691b ldr r3, [r3, #16]
801f944: 685b ldr r3, [r3, #4]
801f946: b29b uxth r3, r3
801f948: 1ad3 subs r3, r2, r3
801f94a: b29a uxth r2, r3
801f94c: 6b7b ldr r3, [r7, #52] @ 0x34
801f94e: 811a strh r2, [r3, #8]
pbuf_realloc(prev->p, prev->len);
801f950: 6b7b ldr r3, [r7, #52] @ 0x34
801f952: 685a ldr r2, [r3, #4]
801f954: 6b7b ldr r3, [r7, #52] @ 0x34
801f956: 891b ldrh r3, [r3, #8]
801f958: 4619 mov r1, r3
801f95a: 4610 mov r0, r2
801f95c: f7fb fc38 bl 801b1d0 <pbuf_realloc>
}
prev->next = cseg;
801f960: 6b7b ldr r3, [r7, #52] @ 0x34
801f962: 69fa ldr r2, [r7, #28]
801f964: 601a str r2, [r3, #0]
tcp_oos_insert_segment(cseg, next);
801f966: 6bb9 ldr r1, [r7, #56] @ 0x38
801f968: 69f8 ldr r0, [r7, #28]
801f96a: f7ff f883 bl 801ea74 <tcp_oos_insert_segment>
}
break;
801f96e: e0e1 b.n 801fb34 <tcp_receive+0xeb8>
801f970: 2402aff4 .word 0x2402aff4
801f974: 2402aff1 .word 0x2402aff1
801f978: 2402afc0 .word 0x2402afc0
801f97c: 2402afe4 .word 0x2402afe4
#endif /* LWIP_TCP_SACK_OUT */
/* We don't use 'prev' below, so let's set it to current 'next'.
This way even if we break the loop below, 'prev' will be pointing
at the segment right in front of the newly added one. */
prev = next;
801f980: 6bbb ldr r3, [r7, #56] @ 0x38
801f982: 637b str r3, [r7, #52] @ 0x34
/* If the "next" segment is the last segment on the
ooseq queue, we add the incoming segment to the end
of the list. */
if (next->next == NULL &&
801f984: 6bbb ldr r3, [r7, #56] @ 0x38
801f986: 681b ldr r3, [r3, #0]
801f988: 2b00 cmp r3, #0
801f98a: f040 80c5 bne.w 801fb18 <tcp_receive+0xe9c>
TCP_SEQ_GT(seqno, next->tcphdr->seqno)) {
801f98e: 4b7f ldr r3, [pc, #508] @ (801fb8c <tcp_receive+0xf10>)
801f990: 681a ldr r2, [r3, #0]
801f992: 6bbb ldr r3, [r7, #56] @ 0x38
801f994: 691b ldr r3, [r3, #16]
801f996: 685b ldr r3, [r3, #4]
801f998: 1ad3 subs r3, r2, r3
if (next->next == NULL &&
801f99a: 2b00 cmp r3, #0
801f99c: f340 80bc ble.w 801fb18 <tcp_receive+0xe9c>
if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
801f9a0: 6bbb ldr r3, [r7, #56] @ 0x38
801f9a2: 691b ldr r3, [r3, #16]
801f9a4: 899b ldrh r3, [r3, #12]
801f9a6: b29b uxth r3, r3
801f9a8: 4618 mov r0, r3
801f9aa: f7fa f8e5 bl 8019b78 <lwip_htons>
801f9ae: 4603 mov r3, r0
801f9b0: b2db uxtb r3, r3
801f9b2: f003 0301 and.w r3, r3, #1
801f9b6: 2b00 cmp r3, #0
801f9b8: f040 80be bne.w 801fb38 <tcp_receive+0xebc>
/* segment "next" already contains all data */
break;
}
next->next = tcp_seg_copy(&inseg);
801f9bc: 4874 ldr r0, [pc, #464] @ (801fb90 <tcp_receive+0xf14>)
801f9be: f7fd fa2f bl 801ce20 <tcp_seg_copy>
801f9c2: 4602 mov r2, r0
801f9c4: 6bbb ldr r3, [r7, #56] @ 0x38
801f9c6: 601a str r2, [r3, #0]
if (next->next != NULL) {
801f9c8: 6bbb ldr r3, [r7, #56] @ 0x38
801f9ca: 681b ldr r3, [r3, #0]
801f9cc: 2b00 cmp r3, #0
801f9ce: f000 80b5 beq.w 801fb3c <tcp_receive+0xec0>
if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) {
801f9d2: 6bbb ldr r3, [r7, #56] @ 0x38
801f9d4: 691b ldr r3, [r3, #16]
801f9d6: 685b ldr r3, [r3, #4]
801f9d8: 6bba ldr r2, [r7, #56] @ 0x38
801f9da: 8912 ldrh r2, [r2, #8]
801f9dc: 441a add r2, r3
801f9de: 4b6b ldr r3, [pc, #428] @ (801fb8c <tcp_receive+0xf10>)
801f9e0: 681b ldr r3, [r3, #0]
801f9e2: 1ad3 subs r3, r2, r3
801f9e4: 2b00 cmp r3, #0
801f9e6: dd12 ble.n 801fa0e <tcp_receive+0xd92>
/* We need to trim the last segment. */
next->len = (u16_t)(seqno - next->tcphdr->seqno);
801f9e8: 4b68 ldr r3, [pc, #416] @ (801fb8c <tcp_receive+0xf10>)
801f9ea: 681b ldr r3, [r3, #0]
801f9ec: b29a uxth r2, r3
801f9ee: 6bbb ldr r3, [r7, #56] @ 0x38
801f9f0: 691b ldr r3, [r3, #16]
801f9f2: 685b ldr r3, [r3, #4]
801f9f4: b29b uxth r3, r3
801f9f6: 1ad3 subs r3, r2, r3
801f9f8: b29a uxth r2, r3
801f9fa: 6bbb ldr r3, [r7, #56] @ 0x38
801f9fc: 811a strh r2, [r3, #8]
pbuf_realloc(next->p, next->len);
801f9fe: 6bbb ldr r3, [r7, #56] @ 0x38
801fa00: 685a ldr r2, [r3, #4]
801fa02: 6bbb ldr r3, [r7, #56] @ 0x38
801fa04: 891b ldrh r3, [r3, #8]
801fa06: 4619 mov r1, r3
801fa08: 4610 mov r0, r2
801fa0a: f7fb fbe1 bl 801b1d0 <pbuf_realloc>
}
/* check if the remote side overruns our receive window */
if (TCP_SEQ_GT((u32_t)tcplen + seqno, pcb->rcv_nxt + (u32_t)pcb->rcv_wnd)) {
801fa0e: 4b61 ldr r3, [pc, #388] @ (801fb94 <tcp_receive+0xf18>)
801fa10: 881b ldrh r3, [r3, #0]
801fa12: 461a mov r2, r3
801fa14: 4b5d ldr r3, [pc, #372] @ (801fb8c <tcp_receive+0xf10>)
801fa16: 681b ldr r3, [r3, #0]
801fa18: 441a add r2, r3
801fa1a: 687b ldr r3, [r7, #4]
801fa1c: 6a5b ldr r3, [r3, #36] @ 0x24
801fa1e: 6879 ldr r1, [r7, #4]
801fa20: 8d09 ldrh r1, [r1, #40] @ 0x28
801fa22: 440b add r3, r1
801fa24: 1ad3 subs r3, r2, r3
801fa26: 2b00 cmp r3, #0
801fa28: f340 8088 ble.w 801fb3c <tcp_receive+0xec0>
LWIP_DEBUGF(TCP_INPUT_DEBUG,
("tcp_receive: other end overran receive window"
"seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) {
801fa2c: 6bbb ldr r3, [r7, #56] @ 0x38
801fa2e: 681b ldr r3, [r3, #0]
801fa30: 691b ldr r3, [r3, #16]
801fa32: 899b ldrh r3, [r3, #12]
801fa34: b29b uxth r3, r3
801fa36: 4618 mov r0, r3
801fa38: f7fa f89e bl 8019b78 <lwip_htons>
801fa3c: 4603 mov r3, r0
801fa3e: b2db uxtb r3, r3
801fa40: f003 0301 and.w r3, r3, #1
801fa44: 2b00 cmp r3, #0
801fa46: d021 beq.n 801fa8c <tcp_receive+0xe10>
/* Must remove the FIN from the header as we're trimming
* that byte of sequence-space from the packet */
TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) & ~TCP_FIN);
801fa48: 6bbb ldr r3, [r7, #56] @ 0x38
801fa4a: 681b ldr r3, [r3, #0]
801fa4c: 691b ldr r3, [r3, #16]
801fa4e: 899b ldrh r3, [r3, #12]
801fa50: b29b uxth r3, r3
801fa52: b21b sxth r3, r3
801fa54: f423 537c bic.w r3, r3, #16128 @ 0x3f00
801fa58: b21c sxth r4, r3
801fa5a: 6bbb ldr r3, [r7, #56] @ 0x38
801fa5c: 681b ldr r3, [r3, #0]
801fa5e: 691b ldr r3, [r3, #16]
801fa60: 899b ldrh r3, [r3, #12]
801fa62: b29b uxth r3, r3
801fa64: 4618 mov r0, r3
801fa66: f7fa f887 bl 8019b78 <lwip_htons>
801fa6a: 4603 mov r3, r0
801fa6c: b2db uxtb r3, r3
801fa6e: f003 033e and.w r3, r3, #62 @ 0x3e
801fa72: b29b uxth r3, r3
801fa74: 4618 mov r0, r3
801fa76: f7fa f87f bl 8019b78 <lwip_htons>
801fa7a: 4603 mov r3, r0
801fa7c: b21b sxth r3, r3
801fa7e: 4323 orrs r3, r4
801fa80: b21a sxth r2, r3
801fa82: 6bbb ldr r3, [r7, #56] @ 0x38
801fa84: 681b ldr r3, [r3, #0]
801fa86: 691b ldr r3, [r3, #16]
801fa88: b292 uxth r2, r2
801fa8a: 819a strh r2, [r3, #12]
}
/* Adjust length of segment to fit in the window. */
next->next->len = (u16_t)(pcb->rcv_nxt + pcb->rcv_wnd - seqno);
801fa8c: 687b ldr r3, [r7, #4]
801fa8e: 6a5b ldr r3, [r3, #36] @ 0x24
801fa90: b29a uxth r2, r3
801fa92: 687b ldr r3, [r7, #4]
801fa94: 8d1b ldrh r3, [r3, #40] @ 0x28
801fa96: 4413 add r3, r2
801fa98: b299 uxth r1, r3
801fa9a: 4b3c ldr r3, [pc, #240] @ (801fb8c <tcp_receive+0xf10>)
801fa9c: 681b ldr r3, [r3, #0]
801fa9e: b29a uxth r2, r3
801faa0: 6bbb ldr r3, [r7, #56] @ 0x38
801faa2: 681b ldr r3, [r3, #0]
801faa4: 1a8a subs r2, r1, r2
801faa6: b292 uxth r2, r2
801faa8: 811a strh r2, [r3, #8]
pbuf_realloc(next->next->p, next->next->len);
801faaa: 6bbb ldr r3, [r7, #56] @ 0x38
801faac: 681b ldr r3, [r3, #0]
801faae: 685a ldr r2, [r3, #4]
801fab0: 6bbb ldr r3, [r7, #56] @ 0x38
801fab2: 681b ldr r3, [r3, #0]
801fab4: 891b ldrh r3, [r3, #8]
801fab6: 4619 mov r1, r3
801fab8: 4610 mov r0, r2
801faba: f7fb fb89 bl 801b1d0 <pbuf_realloc>
tcplen = TCP_TCPLEN(next->next);
801fabe: 6bbb ldr r3, [r7, #56] @ 0x38
801fac0: 681b ldr r3, [r3, #0]
801fac2: 891c ldrh r4, [r3, #8]
801fac4: 6bbb ldr r3, [r7, #56] @ 0x38
801fac6: 681b ldr r3, [r3, #0]
801fac8: 691b ldr r3, [r3, #16]
801faca: 899b ldrh r3, [r3, #12]
801facc: b29b uxth r3, r3
801face: 4618 mov r0, r3
801fad0: f7fa f852 bl 8019b78 <lwip_htons>
801fad4: 4603 mov r3, r0
801fad6: b2db uxtb r3, r3
801fad8: f003 0303 and.w r3, r3, #3
801fadc: 2b00 cmp r3, #0
801fade: d001 beq.n 801fae4 <tcp_receive+0xe68>
801fae0: 2301 movs r3, #1
801fae2: e000 b.n 801fae6 <tcp_receive+0xe6a>
801fae4: 2300 movs r3, #0
801fae6: 4423 add r3, r4
801fae8: b29a uxth r2, r3
801faea: 4b2a ldr r3, [pc, #168] @ (801fb94 <tcp_receive+0xf18>)
801faec: 801a strh r2, [r3, #0]
LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
801faee: 4b29 ldr r3, [pc, #164] @ (801fb94 <tcp_receive+0xf18>)
801faf0: 881b ldrh r3, [r3, #0]
801faf2: 461a mov r2, r3
801faf4: 4b25 ldr r3, [pc, #148] @ (801fb8c <tcp_receive+0xf10>)
801faf6: 681b ldr r3, [r3, #0]
801faf8: 441a add r2, r3
801fafa: 687b ldr r3, [r7, #4]
801fafc: 6a5b ldr r3, [r3, #36] @ 0x24
801fafe: 6879 ldr r1, [r7, #4]
801fb00: 8d09 ldrh r1, [r1, #40] @ 0x28
801fb02: 440b add r3, r1
801fb04: 429a cmp r2, r3
801fb06: d019 beq.n 801fb3c <tcp_receive+0xec0>
801fb08: 4b23 ldr r3, [pc, #140] @ (801fb98 <tcp_receive+0xf1c>)
801fb0a: f44f 62df mov.w r2, #1784 @ 0x6f8
801fb0e: 4923 ldr r1, [pc, #140] @ (801fb9c <tcp_receive+0xf20>)
801fb10: 4823 ldr r0, [pc, #140] @ (801fba0 <tcp_receive+0xf24>)
801fb12: f00a ff8b bl 802aa2c <iprintf>
(seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd));
}
}
break;
801fb16: e011 b.n 801fb3c <tcp_receive+0xec0>
for (next = pcb->ooseq; next != NULL; next = next->next) {
801fb18: 6bbb ldr r3, [r7, #56] @ 0x38
801fb1a: 681b ldr r3, [r3, #0]
801fb1c: 63bb str r3, [r7, #56] @ 0x38
801fb1e: 6bbb ldr r3, [r7, #56] @ 0x38
801fb20: 2b00 cmp r3, #0
801fb22: f47f aea5 bne.w 801f870 <tcp_receive+0xbf4>
801fb26: e00a b.n 801fb3e <tcp_receive+0xec2>
break;
801fb28: bf00 nop
801fb2a: e008 b.n 801fb3e <tcp_receive+0xec2>
break;
801fb2c: bf00 nop
801fb2e: e006 b.n 801fb3e <tcp_receive+0xec2>
break;
801fb30: bf00 nop
801fb32: e004 b.n 801fb3e <tcp_receive+0xec2>
break;
801fb34: bf00 nop
801fb36: e002 b.n 801fb3e <tcp_receive+0xec2>
break;
801fb38: bf00 nop
801fb3a: e000 b.n 801fb3e <tcp_receive+0xec2>
break;
801fb3c: bf00 nop
#endif /* TCP_OOSEQ_BYTES_LIMIT || TCP_OOSEQ_PBUFS_LIMIT */
#endif /* TCP_QUEUE_OOSEQ */
/* We send the ACK packet after we've (potentially) dealt with SACKs,
so they can be included in the acknowledgment. */
tcp_send_empty_ack(pcb);
801fb3e: 6878 ldr r0, [r7, #4]
801fb40: f001 fefc bl 802193c <tcp_send_empty_ack>
if (pcb->rcv_nxt == seqno) {
801fb44: e003 b.n 801fb4e <tcp_receive+0xed2>
}
} else {
/* The incoming segment is not within the window. */
tcp_send_empty_ack(pcb);
801fb46: 6878 ldr r0, [r7, #4]
801fb48: f001 fef8 bl 802193c <tcp_send_empty_ack>
if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
801fb4c: e01a b.n 801fb84 <tcp_receive+0xf08>
801fb4e: e019 b.n 801fb84 <tcp_receive+0xf08>
}
} else {
/* Segments with length 0 is taken care of here. Segments that
fall out of the window are ACKed. */
if (!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
801fb50: 4b0e ldr r3, [pc, #56] @ (801fb8c <tcp_receive+0xf10>)
801fb52: 681a ldr r2, [r3, #0]
801fb54: 687b ldr r3, [r7, #4]
801fb56: 6a5b ldr r3, [r3, #36] @ 0x24
801fb58: 1ad3 subs r3, r2, r3
801fb5a: 2b00 cmp r3, #0
801fb5c: db0a blt.n 801fb74 <tcp_receive+0xef8>
801fb5e: 4b0b ldr r3, [pc, #44] @ (801fb8c <tcp_receive+0xf10>)
801fb60: 681a ldr r2, [r3, #0]
801fb62: 687b ldr r3, [r7, #4]
801fb64: 6a5b ldr r3, [r3, #36] @ 0x24
801fb66: 6879 ldr r1, [r7, #4]
801fb68: 8d09 ldrh r1, [r1, #40] @ 0x28
801fb6a: 440b add r3, r1
801fb6c: 1ad3 subs r3, r2, r3
801fb6e: 3301 adds r3, #1
801fb70: 2b00 cmp r3, #0
801fb72: dd07 ble.n 801fb84 <tcp_receive+0xf08>
tcp_ack_now(pcb);
801fb74: 687b ldr r3, [r7, #4]
801fb76: 8b5b ldrh r3, [r3, #26]
801fb78: f043 0302 orr.w r3, r3, #2
801fb7c: b29a uxth r2, r3
801fb7e: 687b ldr r3, [r7, #4]
801fb80: 835a strh r2, [r3, #26]
}
}
}
801fb82: e7ff b.n 801fb84 <tcp_receive+0xf08>
801fb84: bf00 nop
801fb86: 3750 adds r7, #80 @ 0x50
801fb88: 46bd mov sp, r7
801fb8a: bdb0 pop {r4, r5, r7, pc}
801fb8c: 2402afe4 .word 0x2402afe4
801fb90: 2402afc0 .word 0x2402afc0
801fb94: 2402afee .word 0x2402afee
801fb98: 0802ff58 .word 0x0802ff58
801fb9c: 08030300 .word 0x08030300
801fba0: 0802ffa4 .word 0x0802ffa4
0801fba4 <tcp_get_next_optbyte>:
static u8_t
tcp_get_next_optbyte(void)
{
801fba4: b480 push {r7}
801fba6: b083 sub sp, #12
801fba8: af00 add r7, sp, #0
u16_t optidx = tcp_optidx++;
801fbaa: 4b15 ldr r3, [pc, #84] @ (801fc00 <tcp_get_next_optbyte+0x5c>)
801fbac: 881b ldrh r3, [r3, #0]
801fbae: 1c5a adds r2, r3, #1
801fbb0: b291 uxth r1, r2
801fbb2: 4a13 ldr r2, [pc, #76] @ (801fc00 <tcp_get_next_optbyte+0x5c>)
801fbb4: 8011 strh r1, [r2, #0]
801fbb6: 80fb strh r3, [r7, #6]
if ((tcphdr_opt2 == NULL) || (optidx < tcphdr_opt1len)) {
801fbb8: 4b12 ldr r3, [pc, #72] @ (801fc04 <tcp_get_next_optbyte+0x60>)
801fbba: 681b ldr r3, [r3, #0]
801fbbc: 2b00 cmp r3, #0
801fbbe: d004 beq.n 801fbca <tcp_get_next_optbyte+0x26>
801fbc0: 4b11 ldr r3, [pc, #68] @ (801fc08 <tcp_get_next_optbyte+0x64>)
801fbc2: 881b ldrh r3, [r3, #0]
801fbc4: 88fa ldrh r2, [r7, #6]
801fbc6: 429a cmp r2, r3
801fbc8: d208 bcs.n 801fbdc <tcp_get_next_optbyte+0x38>
u8_t *opts = (u8_t *)tcphdr + TCP_HLEN;
801fbca: 4b10 ldr r3, [pc, #64] @ (801fc0c <tcp_get_next_optbyte+0x68>)
801fbcc: 681b ldr r3, [r3, #0]
801fbce: 3314 adds r3, #20
801fbd0: 603b str r3, [r7, #0]
return opts[optidx];
801fbd2: 88fb ldrh r3, [r7, #6]
801fbd4: 683a ldr r2, [r7, #0]
801fbd6: 4413 add r3, r2
801fbd8: 781b ldrb r3, [r3, #0]
801fbda: e00b b.n 801fbf4 <tcp_get_next_optbyte+0x50>
} else {
u8_t idx = (u8_t)(optidx - tcphdr_opt1len);
801fbdc: 88fb ldrh r3, [r7, #6]
801fbde: b2da uxtb r2, r3
801fbe0: 4b09 ldr r3, [pc, #36] @ (801fc08 <tcp_get_next_optbyte+0x64>)
801fbe2: 881b ldrh r3, [r3, #0]
801fbe4: b2db uxtb r3, r3
801fbe6: 1ad3 subs r3, r2, r3
801fbe8: 717b strb r3, [r7, #5]
return tcphdr_opt2[idx];
801fbea: 4b06 ldr r3, [pc, #24] @ (801fc04 <tcp_get_next_optbyte+0x60>)
801fbec: 681a ldr r2, [r3, #0]
801fbee: 797b ldrb r3, [r7, #5]
801fbf0: 4413 add r3, r2
801fbf2: 781b ldrb r3, [r3, #0]
}
}
801fbf4: 4618 mov r0, r3
801fbf6: 370c adds r7, #12
801fbf8: 46bd mov sp, r7
801fbfa: f85d 7b04 ldr.w r7, [sp], #4
801fbfe: 4770 bx lr
801fc00: 2402afe0 .word 0x2402afe0
801fc04: 2402afdc .word 0x2402afdc
801fc08: 2402afda .word 0x2402afda
801fc0c: 2402afd4 .word 0x2402afd4
0801fc10 <tcp_parseopt>:
*
* @param pcb the tcp_pcb for which a segment arrived
*/
static void
tcp_parseopt(struct tcp_pcb *pcb)
{
801fc10: b580 push {r7, lr}
801fc12: b084 sub sp, #16
801fc14: af00 add r7, sp, #0
801fc16: 6078 str r0, [r7, #4]
u16_t mss;
#if LWIP_TCP_TIMESTAMPS
u32_t tsval;
#endif
LWIP_ASSERT("tcp_parseopt: invalid pcb", pcb != NULL);
801fc18: 687b ldr r3, [r7, #4]
801fc1a: 2b00 cmp r3, #0
801fc1c: d106 bne.n 801fc2c <tcp_parseopt+0x1c>
801fc1e: 4b33 ldr r3, [pc, #204] @ (801fcec <tcp_parseopt+0xdc>)
801fc20: f240 727d movw r2, #1917 @ 0x77d
801fc24: 4932 ldr r1, [pc, #200] @ (801fcf0 <tcp_parseopt+0xe0>)
801fc26: 4833 ldr r0, [pc, #204] @ (801fcf4 <tcp_parseopt+0xe4>)
801fc28: f00a ff00 bl 802aa2c <iprintf>
/* Parse the TCP MSS option, if present. */
if (tcphdr_optlen != 0) {
801fc2c: 4b32 ldr r3, [pc, #200] @ (801fcf8 <tcp_parseopt+0xe8>)
801fc2e: 881b ldrh r3, [r3, #0]
801fc30: 2b00 cmp r3, #0
801fc32: d057 beq.n 801fce4 <tcp_parseopt+0xd4>
for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
801fc34: 4b31 ldr r3, [pc, #196] @ (801fcfc <tcp_parseopt+0xec>)
801fc36: 2200 movs r2, #0
801fc38: 801a strh r2, [r3, #0]
801fc3a: e047 b.n 801fccc <tcp_parseopt+0xbc>
u8_t opt = tcp_get_next_optbyte();
801fc3c: f7ff ffb2 bl 801fba4 <tcp_get_next_optbyte>
801fc40: 4603 mov r3, r0
801fc42: 73fb strb r3, [r7, #15]
switch (opt) {
801fc44: 7bfb ldrb r3, [r7, #15]
801fc46: 2b02 cmp r3, #2
801fc48: d006 beq.n 801fc58 <tcp_parseopt+0x48>
801fc4a: 2b02 cmp r3, #2
801fc4c: dc2b bgt.n 801fca6 <tcp_parseopt+0x96>
801fc4e: 2b00 cmp r3, #0
801fc50: d043 beq.n 801fcda <tcp_parseopt+0xca>
801fc52: 2b01 cmp r3, #1
801fc54: d039 beq.n 801fcca <tcp_parseopt+0xba>
801fc56: e026 b.n 801fca6 <tcp_parseopt+0x96>
/* NOP option. */
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n"));
break;
case LWIP_TCP_OPT_MSS:
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n"));
if (tcp_get_next_optbyte() != LWIP_TCP_OPT_LEN_MSS || (tcp_optidx - 2 + LWIP_TCP_OPT_LEN_MSS) > tcphdr_optlen) {
801fc58: f7ff ffa4 bl 801fba4 <tcp_get_next_optbyte>
801fc5c: 4603 mov r3, r0
801fc5e: 2b04 cmp r3, #4
801fc60: d13d bne.n 801fcde <tcp_parseopt+0xce>
801fc62: 4b26 ldr r3, [pc, #152] @ (801fcfc <tcp_parseopt+0xec>)
801fc64: 881b ldrh r3, [r3, #0]
801fc66: 3301 adds r3, #1
801fc68: 4a23 ldr r2, [pc, #140] @ (801fcf8 <tcp_parseopt+0xe8>)
801fc6a: 8812 ldrh r2, [r2, #0]
801fc6c: 4293 cmp r3, r2
801fc6e: da36 bge.n 801fcde <tcp_parseopt+0xce>
/* Bad length */
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n"));
return;
}
/* An MSS option with the right option length. */
mss = (u16_t)(tcp_get_next_optbyte() << 8);
801fc70: f7ff ff98 bl 801fba4 <tcp_get_next_optbyte>
801fc74: 4603 mov r3, r0
801fc76: 021b lsls r3, r3, #8
801fc78: 81bb strh r3, [r7, #12]
mss |= tcp_get_next_optbyte();
801fc7a: f7ff ff93 bl 801fba4 <tcp_get_next_optbyte>
801fc7e: 4603 mov r3, r0
801fc80: 461a mov r2, r3
801fc82: 89bb ldrh r3, [r7, #12]
801fc84: 4313 orrs r3, r2
801fc86: 81bb strh r3, [r7, #12]
/* Limit the mss to the configured TCP_MSS and prevent division by zero */
pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss;
801fc88: 89bb ldrh r3, [r7, #12]
801fc8a: f240 52b4 movw r2, #1460 @ 0x5b4
801fc8e: 4293 cmp r3, r2
801fc90: d804 bhi.n 801fc9c <tcp_parseopt+0x8c>
801fc92: 89bb ldrh r3, [r7, #12]
801fc94: 2b00 cmp r3, #0
801fc96: d001 beq.n 801fc9c <tcp_parseopt+0x8c>
801fc98: 89ba ldrh r2, [r7, #12]
801fc9a: e001 b.n 801fca0 <tcp_parseopt+0x90>
801fc9c: f240 52b4 movw r2, #1460 @ 0x5b4
801fca0: 687b ldr r3, [r7, #4]
801fca2: 865a strh r2, [r3, #50] @ 0x32
break;
801fca4: e012 b.n 801fccc <tcp_parseopt+0xbc>
}
break;
#endif /* LWIP_TCP_SACK_OUT */
default:
LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n"));
data = tcp_get_next_optbyte();
801fca6: f7ff ff7d bl 801fba4 <tcp_get_next_optbyte>
801fcaa: 4603 mov r3, r0
801fcac: 72fb strb r3, [r7, #11]
if (data < 2) {
801fcae: 7afb ldrb r3, [r7, #11]
801fcb0: 2b01 cmp r3, #1
801fcb2: d916 bls.n 801fce2 <tcp_parseopt+0xd2>
and we don't process them further. */
return;
}
/* All other options have a length field, so that we easily
can skip past them. */
tcp_optidx += data - 2;
801fcb4: 7afb ldrb r3, [r7, #11]
801fcb6: b29a uxth r2, r3
801fcb8: 4b10 ldr r3, [pc, #64] @ (801fcfc <tcp_parseopt+0xec>)
801fcba: 881b ldrh r3, [r3, #0]
801fcbc: 4413 add r3, r2
801fcbe: b29b uxth r3, r3
801fcc0: 3b02 subs r3, #2
801fcc2: b29a uxth r2, r3
801fcc4: 4b0d ldr r3, [pc, #52] @ (801fcfc <tcp_parseopt+0xec>)
801fcc6: 801a strh r2, [r3, #0]
801fcc8: e000 b.n 801fccc <tcp_parseopt+0xbc>
break;
801fcca: bf00 nop
for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
801fccc: 4b0b ldr r3, [pc, #44] @ (801fcfc <tcp_parseopt+0xec>)
801fcce: 881a ldrh r2, [r3, #0]
801fcd0: 4b09 ldr r3, [pc, #36] @ (801fcf8 <tcp_parseopt+0xe8>)
801fcd2: 881b ldrh r3, [r3, #0]
801fcd4: 429a cmp r2, r3
801fcd6: d3b1 bcc.n 801fc3c <tcp_parseopt+0x2c>
801fcd8: e004 b.n 801fce4 <tcp_parseopt+0xd4>
return;
801fcda: bf00 nop
801fcdc: e002 b.n 801fce4 <tcp_parseopt+0xd4>
return;
801fcde: bf00 nop
801fce0: e000 b.n 801fce4 <tcp_parseopt+0xd4>
return;
801fce2: bf00 nop
}
}
}
}
801fce4: 3710 adds r7, #16
801fce6: 46bd mov sp, r7
801fce8: bd80 pop {r7, pc}
801fcea: bf00 nop
801fcec: 0802ff58 .word 0x0802ff58
801fcf0: 080303bc .word 0x080303bc
801fcf4: 0802ffa4 .word 0x0802ffa4
801fcf8: 2402afd8 .word 0x2402afd8
801fcfc: 2402afe0 .word 0x2402afe0
0801fd00 <tcp_trigger_input_pcb_close>:
void
tcp_trigger_input_pcb_close(void)
{
801fd00: b480 push {r7}
801fd02: af00 add r7, sp, #0
recv_flags |= TF_CLOSED;
801fd04: 4b05 ldr r3, [pc, #20] @ (801fd1c <tcp_trigger_input_pcb_close+0x1c>)
801fd06: 781b ldrb r3, [r3, #0]
801fd08: f043 0310 orr.w r3, r3, #16
801fd0c: b2da uxtb r2, r3
801fd0e: 4b03 ldr r3, [pc, #12] @ (801fd1c <tcp_trigger_input_pcb_close+0x1c>)
801fd10: 701a strb r2, [r3, #0]
}
801fd12: bf00 nop
801fd14: 46bd mov sp, r7
801fd16: f85d 7b04 ldr.w r7, [sp], #4
801fd1a: 4770 bx lr
801fd1c: 2402aff1 .word 0x2402aff1
0801fd20 <tcp_route>:
static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif);
/* tcp_route: common code that returns a fixed bound netif or calls ip_route */
static struct netif *
tcp_route(const struct tcp_pcb *pcb, const ip_addr_t *src, const ip_addr_t *dst)
{
801fd20: b580 push {r7, lr}
801fd22: b084 sub sp, #16
801fd24: af00 add r7, sp, #0
801fd26: 60f8 str r0, [r7, #12]
801fd28: 60b9 str r1, [r7, #8]
801fd2a: 607a str r2, [r7, #4]
LWIP_UNUSED_ARG(src); /* in case IPv4-only and source-based routing is disabled */
if ((pcb != NULL) && (pcb->netif_idx != NETIF_NO_INDEX)) {
801fd2c: 68fb ldr r3, [r7, #12]
801fd2e: 2b00 cmp r3, #0
801fd30: d00a beq.n 801fd48 <tcp_route+0x28>
801fd32: 68fb ldr r3, [r7, #12]
801fd34: 7a1b ldrb r3, [r3, #8]
801fd36: 2b00 cmp r3, #0
801fd38: d006 beq.n 801fd48 <tcp_route+0x28>
return netif_get_by_index(pcb->netif_idx);
801fd3a: 68fb ldr r3, [r7, #12]
801fd3c: 7a1b ldrb r3, [r3, #8]
801fd3e: 4618 mov r0, r3
801fd40: f7fb f83c bl 801adbc <netif_get_by_index>
801fd44: 4603 mov r3, r0
801fd46: e003 b.n 801fd50 <tcp_route+0x30>
} else {
return ip_route(src, dst);
801fd48: 6878 ldr r0, [r7, #4]
801fd4a: f005 fe61 bl 8025a10 <ip4_route>
801fd4e: 4603 mov r3, r0
}
}
801fd50: 4618 mov r0, r3
801fd52: 3710 adds r7, #16
801fd54: 46bd mov sp, r7
801fd56: bd80 pop {r7, pc}
0801fd58 <tcp_create_segment>:
* The TCP header is filled in except ackno and wnd.
* p is freed on failure.
*/
static struct tcp_seg *
tcp_create_segment(const struct tcp_pcb *pcb, struct pbuf *p, u8_t hdrflags, u32_t seqno, u8_t optflags)
{
801fd58: b590 push {r4, r7, lr}
801fd5a: b087 sub sp, #28
801fd5c: af00 add r7, sp, #0
801fd5e: 60f8 str r0, [r7, #12]
801fd60: 60b9 str r1, [r7, #8]
801fd62: 603b str r3, [r7, #0]
801fd64: 4613 mov r3, r2
801fd66: 71fb strb r3, [r7, #7]
struct tcp_seg *seg;
u8_t optlen;
LWIP_ASSERT("tcp_create_segment: invalid pcb", pcb != NULL);
801fd68: 68fb ldr r3, [r7, #12]
801fd6a: 2b00 cmp r3, #0
801fd6c: d105 bne.n 801fd7a <tcp_create_segment+0x22>
801fd6e: 4b45 ldr r3, [pc, #276] @ (801fe84 <tcp_create_segment+0x12c>)
801fd70: 22a3 movs r2, #163 @ 0xa3
801fd72: 4945 ldr r1, [pc, #276] @ (801fe88 <tcp_create_segment+0x130>)
801fd74: 4845 ldr r0, [pc, #276] @ (801fe8c <tcp_create_segment+0x134>)
801fd76: f00a fe59 bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_create_segment: invalid pbuf", p != NULL);
801fd7a: 68bb ldr r3, [r7, #8]
801fd7c: 2b00 cmp r3, #0
801fd7e: d105 bne.n 801fd8c <tcp_create_segment+0x34>
801fd80: 4b40 ldr r3, [pc, #256] @ (801fe84 <tcp_create_segment+0x12c>)
801fd82: 22a4 movs r2, #164 @ 0xa4
801fd84: 4942 ldr r1, [pc, #264] @ (801fe90 <tcp_create_segment+0x138>)
801fd86: 4841 ldr r0, [pc, #260] @ (801fe8c <tcp_create_segment+0x134>)
801fd88: f00a fe50 bl 802aa2c <iprintf>
optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
801fd8c: f897 3028 ldrb.w r3, [r7, #40] @ 0x28
801fd90: 009b lsls r3, r3, #2
801fd92: b2db uxtb r3, r3
801fd94: f003 0304 and.w r3, r3, #4
801fd98: 75fb strb r3, [r7, #23]
if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) {
801fd9a: 2003 movs r0, #3
801fd9c: f7fa fc6a bl 801a674 <memp_malloc>
801fda0: 6138 str r0, [r7, #16]
801fda2: 693b ldr r3, [r7, #16]
801fda4: 2b00 cmp r3, #0
801fda6: d104 bne.n 801fdb2 <tcp_create_segment+0x5a>
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no memory.\n"));
pbuf_free(p);
801fda8: 68b8 ldr r0, [r7, #8]
801fdaa: f7fb fbc7 bl 801b53c <pbuf_free>
return NULL;
801fdae: 2300 movs r3, #0
801fdb0: e063 b.n 801fe7a <tcp_create_segment+0x122>
}
seg->flags = optflags;
801fdb2: 693b ldr r3, [r7, #16]
801fdb4: f897 2028 ldrb.w r2, [r7, #40] @ 0x28
801fdb8: 731a strb r2, [r3, #12]
seg->next = NULL;
801fdba: 693b ldr r3, [r7, #16]
801fdbc: 2200 movs r2, #0
801fdbe: 601a str r2, [r3, #0]
seg->p = p;
801fdc0: 693b ldr r3, [r7, #16]
801fdc2: 68ba ldr r2, [r7, #8]
801fdc4: 605a str r2, [r3, #4]
LWIP_ASSERT("p->tot_len >= optlen", p->tot_len >= optlen);
801fdc6: 68bb ldr r3, [r7, #8]
801fdc8: 891a ldrh r2, [r3, #8]
801fdca: 7dfb ldrb r3, [r7, #23]
801fdcc: b29b uxth r3, r3
801fdce: 429a cmp r2, r3
801fdd0: d205 bcs.n 801fdde <tcp_create_segment+0x86>
801fdd2: 4b2c ldr r3, [pc, #176] @ (801fe84 <tcp_create_segment+0x12c>)
801fdd4: 22b0 movs r2, #176 @ 0xb0
801fdd6: 492f ldr r1, [pc, #188] @ (801fe94 <tcp_create_segment+0x13c>)
801fdd8: 482c ldr r0, [pc, #176] @ (801fe8c <tcp_create_segment+0x134>)
801fdda: f00a fe27 bl 802aa2c <iprintf>
seg->len = p->tot_len - optlen;
801fdde: 68bb ldr r3, [r7, #8]
801fde0: 891a ldrh r2, [r3, #8]
801fde2: 7dfb ldrb r3, [r7, #23]
801fde4: b29b uxth r3, r3
801fde6: 1ad3 subs r3, r2, r3
801fde8: b29a uxth r2, r3
801fdea: 693b ldr r3, [r7, #16]
801fdec: 811a strh r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
seg->oversize_left = 0;
801fdee: 693b ldr r3, [r7, #16]
801fdf0: 2200 movs r2, #0
801fdf2: 815a strh r2, [r3, #10]
LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED",
(optflags & TF_SEG_DATA_CHECKSUMMED) == 0);
#endif /* TCP_CHECKSUM_ON_COPY */
/* build TCP header */
if (pbuf_add_header(p, TCP_HLEN)) {
801fdf4: 2114 movs r1, #20
801fdf6: 68b8 ldr r0, [r7, #8]
801fdf8: f7fb fad8 bl 801b3ac <pbuf_add_header>
801fdfc: 4603 mov r3, r0
801fdfe: 2b00 cmp r3, #0
801fe00: d004 beq.n 801fe0c <tcp_create_segment+0xb4>
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no room for TCP header in pbuf.\n"));
TCP_STATS_INC(tcp.err);
tcp_seg_free(seg);
801fe02: 6938 ldr r0, [r7, #16]
801fe04: f7fc fff3 bl 801cdee <tcp_seg_free>
return NULL;
801fe08: 2300 movs r3, #0
801fe0a: e036 b.n 801fe7a <tcp_create_segment+0x122>
}
seg->tcphdr = (struct tcp_hdr *)seg->p->payload;
801fe0c: 693b ldr r3, [r7, #16]
801fe0e: 685b ldr r3, [r3, #4]
801fe10: 685a ldr r2, [r3, #4]
801fe12: 693b ldr r3, [r7, #16]
801fe14: 611a str r2, [r3, #16]
seg->tcphdr->src = lwip_htons(pcb->local_port);
801fe16: 68fb ldr r3, [r7, #12]
801fe18: 8ada ldrh r2, [r3, #22]
801fe1a: 693b ldr r3, [r7, #16]
801fe1c: 691c ldr r4, [r3, #16]
801fe1e: 4610 mov r0, r2
801fe20: f7f9 feaa bl 8019b78 <lwip_htons>
801fe24: 4603 mov r3, r0
801fe26: 8023 strh r3, [r4, #0]
seg->tcphdr->dest = lwip_htons(pcb->remote_port);
801fe28: 68fb ldr r3, [r7, #12]
801fe2a: 8b1a ldrh r2, [r3, #24]
801fe2c: 693b ldr r3, [r7, #16]
801fe2e: 691c ldr r4, [r3, #16]
801fe30: 4610 mov r0, r2
801fe32: f7f9 fea1 bl 8019b78 <lwip_htons>
801fe36: 4603 mov r3, r0
801fe38: 8063 strh r3, [r4, #2]
seg->tcphdr->seqno = lwip_htonl(seqno);
801fe3a: 693b ldr r3, [r7, #16]
801fe3c: 691c ldr r4, [r3, #16]
801fe3e: 6838 ldr r0, [r7, #0]
801fe40: f7f9 feaf bl 8019ba2 <lwip_htonl>
801fe44: 4603 mov r3, r0
801fe46: 6063 str r3, [r4, #4]
/* ackno is set in tcp_output */
TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), hdrflags);
801fe48: 7dfb ldrb r3, [r7, #23]
801fe4a: 089b lsrs r3, r3, #2
801fe4c: b2db uxtb r3, r3
801fe4e: 3305 adds r3, #5
801fe50: b29b uxth r3, r3
801fe52: 031b lsls r3, r3, #12
801fe54: b29a uxth r2, r3
801fe56: 79fb ldrb r3, [r7, #7]
801fe58: b29b uxth r3, r3
801fe5a: 4313 orrs r3, r2
801fe5c: b29a uxth r2, r3
801fe5e: 693b ldr r3, [r7, #16]
801fe60: 691c ldr r4, [r3, #16]
801fe62: 4610 mov r0, r2
801fe64: f7f9 fe88 bl 8019b78 <lwip_htons>
801fe68: 4603 mov r3, r0
801fe6a: 81a3 strh r3, [r4, #12]
/* wnd and chksum are set in tcp_output */
seg->tcphdr->urgp = 0;
801fe6c: 693b ldr r3, [r7, #16]
801fe6e: 691b ldr r3, [r3, #16]
801fe70: 2200 movs r2, #0
801fe72: 749a strb r2, [r3, #18]
801fe74: 2200 movs r2, #0
801fe76: 74da strb r2, [r3, #19]
return seg;
801fe78: 693b ldr r3, [r7, #16]
}
801fe7a: 4618 mov r0, r3
801fe7c: 371c adds r7, #28
801fe7e: 46bd mov sp, r7
801fe80: bd90 pop {r4, r7, pc}
801fe82: bf00 nop
801fe84: 080303d8 .word 0x080303d8
801fe88: 0803040c .word 0x0803040c
801fe8c: 0803042c .word 0x0803042c
801fe90: 08030454 .word 0x08030454
801fe94: 08030478 .word 0x08030478
0801fe98 <tcp_pbuf_prealloc>:
#if TCP_OVERSIZE
static struct pbuf *
tcp_pbuf_prealloc(pbuf_layer layer, u16_t length, u16_t max_length,
u16_t *oversize, const struct tcp_pcb *pcb, u8_t apiflags,
u8_t first_seg)
{
801fe98: b580 push {r7, lr}
801fe9a: b086 sub sp, #24
801fe9c: af00 add r7, sp, #0
801fe9e: 607b str r3, [r7, #4]
801fea0: 4603 mov r3, r0
801fea2: 73fb strb r3, [r7, #15]
801fea4: 460b mov r3, r1
801fea6: 81bb strh r3, [r7, #12]
801fea8: 4613 mov r3, r2
801feaa: 817b strh r3, [r7, #10]
struct pbuf *p;
u16_t alloc = length;
801feac: 89bb ldrh r3, [r7, #12]
801feae: 82fb strh r3, [r7, #22]
LWIP_ASSERT("tcp_pbuf_prealloc: invalid oversize", oversize != NULL);
801feb0: 687b ldr r3, [r7, #4]
801feb2: 2b00 cmp r3, #0
801feb4: d105 bne.n 801fec2 <tcp_pbuf_prealloc+0x2a>
801feb6: 4b30 ldr r3, [pc, #192] @ (801ff78 <tcp_pbuf_prealloc+0xe0>)
801feb8: 22e8 movs r2, #232 @ 0xe8
801feba: 4930 ldr r1, [pc, #192] @ (801ff7c <tcp_pbuf_prealloc+0xe4>)
801febc: 4830 ldr r0, [pc, #192] @ (801ff80 <tcp_pbuf_prealloc+0xe8>)
801febe: f00a fdb5 bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_pbuf_prealloc: invalid pcb", pcb != NULL);
801fec2: 6a3b ldr r3, [r7, #32]
801fec4: 2b00 cmp r3, #0
801fec6: d105 bne.n 801fed4 <tcp_pbuf_prealloc+0x3c>
801fec8: 4b2b ldr r3, [pc, #172] @ (801ff78 <tcp_pbuf_prealloc+0xe0>)
801feca: 22e9 movs r2, #233 @ 0xe9
801fecc: 492d ldr r1, [pc, #180] @ (801ff84 <tcp_pbuf_prealloc+0xec>)
801fece: 482c ldr r0, [pc, #176] @ (801ff80 <tcp_pbuf_prealloc+0xe8>)
801fed0: f00a fdac bl 802aa2c <iprintf>
LWIP_UNUSED_ARG(pcb);
LWIP_UNUSED_ARG(apiflags);
LWIP_UNUSED_ARG(first_seg);
alloc = max_length;
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
if (length < max_length) {
801fed4: 89ba ldrh r2, [r7, #12]
801fed6: 897b ldrh r3, [r7, #10]
801fed8: 429a cmp r2, r3
801feda: d221 bcs.n 801ff20 <tcp_pbuf_prealloc+0x88>
*
* Did the user set TCP_WRITE_FLAG_MORE?
*
* Will the Nagle algorithm defer transmission of this segment?
*/
if ((apiflags & TCP_WRITE_FLAG_MORE) ||
801fedc: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
801fee0: f003 0302 and.w r3, r3, #2
801fee4: 2b00 cmp r3, #0
801fee6: d111 bne.n 801ff0c <tcp_pbuf_prealloc+0x74>
(!(pcb->flags & TF_NODELAY) &&
801fee8: 6a3b ldr r3, [r7, #32]
801feea: 8b5b ldrh r3, [r3, #26]
801feec: f003 0340 and.w r3, r3, #64 @ 0x40
if ((apiflags & TCP_WRITE_FLAG_MORE) ||
801fef0: 2b00 cmp r3, #0
801fef2: d115 bne.n 801ff20 <tcp_pbuf_prealloc+0x88>
(!(pcb->flags & TF_NODELAY) &&
801fef4: f897 3028 ldrb.w r3, [r7, #40] @ 0x28
801fef8: 2b00 cmp r3, #0
801fefa: d007 beq.n 801ff0c <tcp_pbuf_prealloc+0x74>
(!first_seg ||
pcb->unsent != NULL ||
801fefc: 6a3b ldr r3, [r7, #32]
801fefe: 6edb ldr r3, [r3, #108] @ 0x6c
(!first_seg ||
801ff00: 2b00 cmp r3, #0
801ff02: d103 bne.n 801ff0c <tcp_pbuf_prealloc+0x74>
pcb->unacked != NULL))) {
801ff04: 6a3b ldr r3, [r7, #32]
801ff06: 6f1b ldr r3, [r3, #112] @ 0x70
pcb->unsent != NULL ||
801ff08: 2b00 cmp r3, #0
801ff0a: d009 beq.n 801ff20 <tcp_pbuf_prealloc+0x88>
alloc = LWIP_MIN(max_length, LWIP_MEM_ALIGN_SIZE(TCP_OVERSIZE_CALC_LENGTH(length)));
801ff0c: 89bb ldrh r3, [r7, #12]
801ff0e: f203 53b7 addw r3, r3, #1463 @ 0x5b7
801ff12: f023 0203 bic.w r2, r3, #3
801ff16: 897b ldrh r3, [r7, #10]
801ff18: 4293 cmp r3, r2
801ff1a: bf28 it cs
801ff1c: 4613 movcs r3, r2
801ff1e: 82fb strh r3, [r7, #22]
}
}
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
p = pbuf_alloc(layer, alloc, PBUF_RAM);
801ff20: 8af9 ldrh r1, [r7, #22]
801ff22: 7bfb ldrb r3, [r7, #15]
801ff24: f44f 7220 mov.w r2, #640 @ 0x280
801ff28: 4618 mov r0, r3
801ff2a: f7fa fff1 bl 801af10 <pbuf_alloc>
801ff2e: 6138 str r0, [r7, #16]
if (p == NULL) {
801ff30: 693b ldr r3, [r7, #16]
801ff32: 2b00 cmp r3, #0
801ff34: d101 bne.n 801ff3a <tcp_pbuf_prealloc+0xa2>
return NULL;
801ff36: 2300 movs r3, #0
801ff38: e019 b.n 801ff6e <tcp_pbuf_prealloc+0xd6>
}
LWIP_ASSERT("need unchained pbuf", p->next == NULL);
801ff3a: 693b ldr r3, [r7, #16]
801ff3c: 681b ldr r3, [r3, #0]
801ff3e: 2b00 cmp r3, #0
801ff40: d006 beq.n 801ff50 <tcp_pbuf_prealloc+0xb8>
801ff42: 4b0d ldr r3, [pc, #52] @ (801ff78 <tcp_pbuf_prealloc+0xe0>)
801ff44: f240 120b movw r2, #267 @ 0x10b
801ff48: 490f ldr r1, [pc, #60] @ (801ff88 <tcp_pbuf_prealloc+0xf0>)
801ff4a: 480d ldr r0, [pc, #52] @ (801ff80 <tcp_pbuf_prealloc+0xe8>)
801ff4c: f00a fd6e bl 802aa2c <iprintf>
*oversize = p->len - length;
801ff50: 693b ldr r3, [r7, #16]
801ff52: 895a ldrh r2, [r3, #10]
801ff54: 89bb ldrh r3, [r7, #12]
801ff56: 1ad3 subs r3, r2, r3
801ff58: b29a uxth r2, r3
801ff5a: 687b ldr r3, [r7, #4]
801ff5c: 801a strh r2, [r3, #0]
/* trim p->len to the currently used size */
p->len = p->tot_len = length;
801ff5e: 693b ldr r3, [r7, #16]
801ff60: 89ba ldrh r2, [r7, #12]
801ff62: 811a strh r2, [r3, #8]
801ff64: 693b ldr r3, [r7, #16]
801ff66: 891a ldrh r2, [r3, #8]
801ff68: 693b ldr r3, [r7, #16]
801ff6a: 815a strh r2, [r3, #10]
return p;
801ff6c: 693b ldr r3, [r7, #16]
}
801ff6e: 4618 mov r0, r3
801ff70: 3718 adds r7, #24
801ff72: 46bd mov sp, r7
801ff74: bd80 pop {r7, pc}
801ff76: bf00 nop
801ff78: 080303d8 .word 0x080303d8
801ff7c: 08030490 .word 0x08030490
801ff80: 0803042c .word 0x0803042c
801ff84: 080304b4 .word 0x080304b4
801ff88: 080304d4 .word 0x080304d4
0801ff8c <tcp_write_checks>:
* @param len length of data to send (checked agains snd_buf)
* @return ERR_OK if tcp_write is allowed to proceed, another err_t otherwise
*/
static err_t
tcp_write_checks(struct tcp_pcb *pcb, u16_t len)
{
801ff8c: b580 push {r7, lr}
801ff8e: b082 sub sp, #8
801ff90: af00 add r7, sp, #0
801ff92: 6078 str r0, [r7, #4]
801ff94: 460b mov r3, r1
801ff96: 807b strh r3, [r7, #2]
LWIP_ASSERT("tcp_write_checks: invalid pcb", pcb != NULL);
801ff98: 687b ldr r3, [r7, #4]
801ff9a: 2b00 cmp r3, #0
801ff9c: d106 bne.n 801ffac <tcp_write_checks+0x20>
801ff9e: 4b33 ldr r3, [pc, #204] @ (802006c <tcp_write_checks+0xe0>)
801ffa0: f240 1233 movw r2, #307 @ 0x133
801ffa4: 4932 ldr r1, [pc, #200] @ (8020070 <tcp_write_checks+0xe4>)
801ffa6: 4833 ldr r0, [pc, #204] @ (8020074 <tcp_write_checks+0xe8>)
801ffa8: f00a fd40 bl 802aa2c <iprintf>
/* connection is in invalid state for data transmission? */
if ((pcb->state != ESTABLISHED) &&
801ffac: 687b ldr r3, [r7, #4]
801ffae: 7d1b ldrb r3, [r3, #20]
801ffb0: 2b04 cmp r3, #4
801ffb2: d00e beq.n 801ffd2 <tcp_write_checks+0x46>
(pcb->state != CLOSE_WAIT) &&
801ffb4: 687b ldr r3, [r7, #4]
801ffb6: 7d1b ldrb r3, [r3, #20]
if ((pcb->state != ESTABLISHED) &&
801ffb8: 2b07 cmp r3, #7
801ffba: d00a beq.n 801ffd2 <tcp_write_checks+0x46>
(pcb->state != SYN_SENT) &&
801ffbc: 687b ldr r3, [r7, #4]
801ffbe: 7d1b ldrb r3, [r3, #20]
(pcb->state != CLOSE_WAIT) &&
801ffc0: 2b02 cmp r3, #2
801ffc2: d006 beq.n 801ffd2 <tcp_write_checks+0x46>
(pcb->state != SYN_RCVD)) {
801ffc4: 687b ldr r3, [r7, #4]
801ffc6: 7d1b ldrb r3, [r3, #20]
(pcb->state != SYN_SENT) &&
801ffc8: 2b03 cmp r3, #3
801ffca: d002 beq.n 801ffd2 <tcp_write_checks+0x46>
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n"));
return ERR_CONN;
801ffcc: f06f 030a mvn.w r3, #10
801ffd0: e048 b.n 8020064 <tcp_write_checks+0xd8>
} else if (len == 0) {
801ffd2: 887b ldrh r3, [r7, #2]
801ffd4: 2b00 cmp r3, #0
801ffd6: d101 bne.n 801ffdc <tcp_write_checks+0x50>
return ERR_OK;
801ffd8: 2300 movs r3, #0
801ffda: e043 b.n 8020064 <tcp_write_checks+0xd8>
}
/* fail on too much data */
if (len > pcb->snd_buf) {
801ffdc: 687b ldr r3, [r7, #4]
801ffde: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
801ffe2: 887a ldrh r2, [r7, #2]
801ffe4: 429a cmp r2, r3
801ffe6: d909 bls.n 801fffc <tcp_write_checks+0x70>
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too much data (len=%"U16_F" > snd_buf=%"TCPWNDSIZE_F")\n",
len, pcb->snd_buf));
tcp_set_flags(pcb, TF_NAGLEMEMERR);
801ffe8: 687b ldr r3, [r7, #4]
801ffea: 8b5b ldrh r3, [r3, #26]
801ffec: f043 0380 orr.w r3, r3, #128 @ 0x80
801fff0: b29a uxth r2, r3
801fff2: 687b ldr r3, [r7, #4]
801fff4: 835a strh r2, [r3, #26]
return ERR_MEM;
801fff6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
801fffa: e033 b.n 8020064 <tcp_write_checks+0xd8>
LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: queuelen: %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));
/* If total number of pbufs on the unsent/unacked queues exceeds the
* configured maximum, return an error */
/* check for configured max queuelen and possible overflow */
if (pcb->snd_queuelen >= LWIP_MIN(TCP_SND_QUEUELEN, (TCP_SNDQUEUELEN_OVERFLOW + 1))) {
801fffc: 687b ldr r3, [r7, #4]
801fffe: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
8020002: 2b0f cmp r3, #15
8020004: d909 bls.n 802001a <tcp_write_checks+0x8e>
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too long queue %"U16_F" (max %"U16_F")\n",
pcb->snd_queuelen, (u16_t)TCP_SND_QUEUELEN));
TCP_STATS_INC(tcp.memerr);
tcp_set_flags(pcb, TF_NAGLEMEMERR);
8020006: 687b ldr r3, [r7, #4]
8020008: 8b5b ldrh r3, [r3, #26]
802000a: f043 0380 orr.w r3, r3, #128 @ 0x80
802000e: b29a uxth r2, r3
8020010: 687b ldr r3, [r7, #4]
8020012: 835a strh r2, [r3, #26]
return ERR_MEM;
8020014: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8020018: e024 b.n 8020064 <tcp_write_checks+0xd8>
}
if (pcb->snd_queuelen != 0) {
802001a: 687b ldr r3, [r7, #4]
802001c: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
8020020: 2b00 cmp r3, #0
8020022: d00f beq.n 8020044 <tcp_write_checks+0xb8>
LWIP_ASSERT("tcp_write: pbufs on queue => at least one queue non-empty",
8020024: 687b ldr r3, [r7, #4]
8020026: 6f1b ldr r3, [r3, #112] @ 0x70
8020028: 2b00 cmp r3, #0
802002a: d11a bne.n 8020062 <tcp_write_checks+0xd6>
802002c: 687b ldr r3, [r7, #4]
802002e: 6edb ldr r3, [r3, #108] @ 0x6c
8020030: 2b00 cmp r3, #0
8020032: d116 bne.n 8020062 <tcp_write_checks+0xd6>
8020034: 4b0d ldr r3, [pc, #52] @ (802006c <tcp_write_checks+0xe0>)
8020036: f240 1255 movw r2, #341 @ 0x155
802003a: 490f ldr r1, [pc, #60] @ (8020078 <tcp_write_checks+0xec>)
802003c: 480d ldr r0, [pc, #52] @ (8020074 <tcp_write_checks+0xe8>)
802003e: f00a fcf5 bl 802aa2c <iprintf>
8020042: e00e b.n 8020062 <tcp_write_checks+0xd6>
pcb->unacked != NULL || pcb->unsent != NULL);
} else {
LWIP_ASSERT("tcp_write: no pbufs on queue => both queues empty",
8020044: 687b ldr r3, [r7, #4]
8020046: 6f1b ldr r3, [r3, #112] @ 0x70
8020048: 2b00 cmp r3, #0
802004a: d103 bne.n 8020054 <tcp_write_checks+0xc8>
802004c: 687b ldr r3, [r7, #4]
802004e: 6edb ldr r3, [r3, #108] @ 0x6c
8020050: 2b00 cmp r3, #0
8020052: d006 beq.n 8020062 <tcp_write_checks+0xd6>
8020054: 4b05 ldr r3, [pc, #20] @ (802006c <tcp_write_checks+0xe0>)
8020056: f44f 72ac mov.w r2, #344 @ 0x158
802005a: 4908 ldr r1, [pc, #32] @ (802007c <tcp_write_checks+0xf0>)
802005c: 4805 ldr r0, [pc, #20] @ (8020074 <tcp_write_checks+0xe8>)
802005e: f00a fce5 bl 802aa2c <iprintf>
pcb->unacked == NULL && pcb->unsent == NULL);
}
return ERR_OK;
8020062: 2300 movs r3, #0
}
8020064: 4618 mov r0, r3
8020066: 3708 adds r7, #8
8020068: 46bd mov sp, r7
802006a: bd80 pop {r7, pc}
802006c: 080303d8 .word 0x080303d8
8020070: 080304e8 .word 0x080304e8
8020074: 0803042c .word 0x0803042c
8020078: 08030508 .word 0x08030508
802007c: 08030544 .word 0x08030544
08020080 <tcp_write>:
* - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will not be set on last segment sent,
* @return ERR_OK if enqueued, another err_t on error
*/
err_t
tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags)
{
8020080: b590 push {r4, r7, lr}
8020082: b09d sub sp, #116 @ 0x74
8020084: af04 add r7, sp, #16
8020086: 60f8 str r0, [r7, #12]
8020088: 60b9 str r1, [r7, #8]
802008a: 4611 mov r1, r2
802008c: 461a mov r2, r3
802008e: 460b mov r3, r1
8020090: 80fb strh r3, [r7, #6]
8020092: 4613 mov r3, r2
8020094: 717b strb r3, [r7, #5]
struct pbuf *concat_p = NULL;
8020096: 2300 movs r3, #0
8020098: 63fb str r3, [r7, #60] @ 0x3c
struct tcp_seg *last_unsent = NULL, *seg = NULL, *prev_seg = NULL, *queue = NULL;
802009a: 2300 movs r3, #0
802009c: 643b str r3, [r7, #64] @ 0x40
802009e: 2300 movs r3, #0
80200a0: 657b str r3, [r7, #84] @ 0x54
80200a2: 2300 movs r3, #0
80200a4: 653b str r3, [r7, #80] @ 0x50
80200a6: 2300 movs r3, #0
80200a8: 64fb str r3, [r7, #76] @ 0x4c
u16_t pos = 0; /* position in 'arg' data */
80200aa: 2300 movs r3, #0
80200ac: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
u16_t queuelen;
u8_t optlen;
u8_t optflags = 0;
80200b0: 2300 movs r3, #0
80200b2: f887 302b strb.w r3, [r7, #43] @ 0x2b
#if TCP_OVERSIZE
u16_t oversize = 0;
80200b6: 2300 movs r3, #0
80200b8: 82fb strh r3, [r7, #22]
u16_t oversize_used = 0;
80200ba: 2300 movs r3, #0
80200bc: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
#if TCP_OVERSIZE_DBGCHECK
u16_t oversize_add = 0;
80200c0: 2300 movs r3, #0
80200c2: f8a7 305a strh.w r3, [r7, #90] @ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK*/
#endif /* TCP_OVERSIZE */
u16_t extendlen = 0;
80200c6: 2300 movs r3, #0
80200c8: f8a7 305e strh.w r3, [r7, #94] @ 0x5e
u16_t concat_chksummed = 0;
#endif /* TCP_CHECKSUM_ON_COPY */
err_t err;
u16_t mss_local;
LWIP_ERROR("tcp_write: invalid pcb", pcb != NULL, return ERR_ARG);
80200cc: 68fb ldr r3, [r7, #12]
80200ce: 2b00 cmp r3, #0
80200d0: d109 bne.n 80200e6 <tcp_write+0x66>
80200d2: 4b9d ldr r3, [pc, #628] @ (8020348 <tcp_write+0x2c8>)
80200d4: f44f 72cf mov.w r2, #414 @ 0x19e
80200d8: 499c ldr r1, [pc, #624] @ (802034c <tcp_write+0x2cc>)
80200da: 489d ldr r0, [pc, #628] @ (8020350 <tcp_write+0x2d0>)
80200dc: f00a fca6 bl 802aa2c <iprintf>
80200e0: f06f 030f mvn.w r3, #15
80200e4: e37b b.n 80207de <tcp_write+0x75e>
/* don't allocate segments bigger than half the maximum window we ever received */
mss_local = LWIP_MIN(pcb->mss, TCPWND_MIN16(pcb->snd_wnd_max / 2));
80200e6: 68fb ldr r3, [r7, #12]
80200e8: f8b3 3062 ldrh.w r3, [r3, #98] @ 0x62
80200ec: 085b lsrs r3, r3, #1
80200ee: b29a uxth r2, r3
80200f0: 68fb ldr r3, [r7, #12]
80200f2: 8e5b ldrh r3, [r3, #50] @ 0x32
80200f4: 4293 cmp r3, r2
80200f6: bf28 it cs
80200f8: 4613 movcs r3, r2
80200fa: 853b strh r3, [r7, #40] @ 0x28
mss_local = mss_local ? mss_local : pcb->mss;
80200fc: 8d3b ldrh r3, [r7, #40] @ 0x28
80200fe: 2b00 cmp r3, #0
8020100: d102 bne.n 8020108 <tcp_write+0x88>
8020102: 68fb ldr r3, [r7, #12]
8020104: 8e5b ldrh r3, [r3, #50] @ 0x32
8020106: e000 b.n 802010a <tcp_write+0x8a>
8020108: 8d3b ldrh r3, [r7, #40] @ 0x28
802010a: 853b strh r3, [r7, #40] @ 0x28
LWIP_ASSERT_CORE_LOCKED();
802010c: f7f1 f862 bl 80111d4 <sys_check_core_locking>
apiflags |= TCP_WRITE_FLAG_COPY;
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n",
(void *)pcb, arg, len, (u16_t)apiflags));
LWIP_ERROR("tcp_write: arg == NULL (programmer violates API)",
8020110: 68bb ldr r3, [r7, #8]
8020112: 2b00 cmp r3, #0
8020114: d109 bne.n 802012a <tcp_write+0xaa>
8020116: 4b8c ldr r3, [pc, #560] @ (8020348 <tcp_write+0x2c8>)
8020118: f240 12ad movw r2, #429 @ 0x1ad
802011c: 498d ldr r1, [pc, #564] @ (8020354 <tcp_write+0x2d4>)
802011e: 488c ldr r0, [pc, #560] @ (8020350 <tcp_write+0x2d0>)
8020120: f00a fc84 bl 802aa2c <iprintf>
8020124: f06f 030f mvn.w r3, #15
8020128: e359 b.n 80207de <tcp_write+0x75e>
arg != NULL, return ERR_ARG;);
err = tcp_write_checks(pcb, len);
802012a: 88fb ldrh r3, [r7, #6]
802012c: 4619 mov r1, r3
802012e: 68f8 ldr r0, [r7, #12]
8020130: f7ff ff2c bl 801ff8c <tcp_write_checks>
8020134: 4603 mov r3, r0
8020136: f887 3027 strb.w r3, [r7, #39] @ 0x27
if (err != ERR_OK) {
802013a: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
802013e: 2b00 cmp r3, #0
8020140: d002 beq.n 8020148 <tcp_write+0xc8>
return err;
8020142: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
8020146: e34a b.n 80207de <tcp_write+0x75e>
}
queuelen = pcb->snd_queuelen;
8020148: 68fb ldr r3, [r7, #12]
802014a: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
802014e: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
/* ensure that segments can hold at least one data byte... */
mss_local = LWIP_MAX(mss_local, LWIP_TCP_OPT_LEN_TS + 1);
} else
#endif /* LWIP_TCP_TIMESTAMPS */
{
optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
8020152: 2300 movs r3, #0
8020154: f887 3026 strb.w r3, [r7, #38] @ 0x26
*
* pos records progress as data is segmented.
*/
/* Find the tail of the unsent queue. */
if (pcb->unsent != NULL) {
8020158: 68fb ldr r3, [r7, #12]
802015a: 6edb ldr r3, [r3, #108] @ 0x6c
802015c: 2b00 cmp r3, #0
802015e: f000 8127 beq.w 80203b0 <tcp_write+0x330>
u16_t space;
u16_t unsent_optlen;
/* @todo: this could be sped up by keeping last_unsent in the pcb */
for (last_unsent = pcb->unsent; last_unsent->next != NULL;
8020162: 68fb ldr r3, [r7, #12]
8020164: 6edb ldr r3, [r3, #108] @ 0x6c
8020166: 643b str r3, [r7, #64] @ 0x40
8020168: e002 b.n 8020170 <tcp_write+0xf0>
last_unsent = last_unsent->next);
802016a: 6c3b ldr r3, [r7, #64] @ 0x40
802016c: 681b ldr r3, [r3, #0]
802016e: 643b str r3, [r7, #64] @ 0x40
for (last_unsent = pcb->unsent; last_unsent->next != NULL;
8020170: 6c3b ldr r3, [r7, #64] @ 0x40
8020172: 681b ldr r3, [r3, #0]
8020174: 2b00 cmp r3, #0
8020176: d1f8 bne.n 802016a <tcp_write+0xea>
/* Usable space at the end of the last unsent segment */
unsent_optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(last_unsent->flags, pcb);
8020178: 6c3b ldr r3, [r7, #64] @ 0x40
802017a: 7b1b ldrb r3, [r3, #12]
802017c: 009b lsls r3, r3, #2
802017e: b29b uxth r3, r3
8020180: f003 0304 and.w r3, r3, #4
8020184: 84bb strh r3, [r7, #36] @ 0x24
LWIP_ASSERT("mss_local is too small", mss_local >= last_unsent->len + unsent_optlen);
8020186: 8d3a ldrh r2, [r7, #40] @ 0x28
8020188: 6c3b ldr r3, [r7, #64] @ 0x40
802018a: 891b ldrh r3, [r3, #8]
802018c: 4619 mov r1, r3
802018e: 8cbb ldrh r3, [r7, #36] @ 0x24
8020190: 440b add r3, r1
8020192: 429a cmp r2, r3
8020194: da06 bge.n 80201a4 <tcp_write+0x124>
8020196: 4b6c ldr r3, [pc, #432] @ (8020348 <tcp_write+0x2c8>)
8020198: f44f 72f3 mov.w r2, #486 @ 0x1e6
802019c: 496e ldr r1, [pc, #440] @ (8020358 <tcp_write+0x2d8>)
802019e: 486c ldr r0, [pc, #432] @ (8020350 <tcp_write+0x2d0>)
80201a0: f00a fc44 bl 802aa2c <iprintf>
space = mss_local - (last_unsent->len + unsent_optlen);
80201a4: 6c3b ldr r3, [r7, #64] @ 0x40
80201a6: 891a ldrh r2, [r3, #8]
80201a8: 8cbb ldrh r3, [r7, #36] @ 0x24
80201aa: 4413 add r3, r2
80201ac: b29b uxth r3, r3
80201ae: 8d3a ldrh r2, [r7, #40] @ 0x28
80201b0: 1ad3 subs r3, r2, r3
80201b2: f8a7 305c strh.w r3, [r7, #92] @ 0x5c
* function.
*/
#if TCP_OVERSIZE
#if TCP_OVERSIZE_DBGCHECK
/* check that pcb->unsent_oversize matches last_unsent->oversize_left */
LWIP_ASSERT("unsent_oversize mismatch (pcb vs. last_unsent)",
80201b6: 68fb ldr r3, [r7, #12]
80201b8: f8b3 2068 ldrh.w r2, [r3, #104] @ 0x68
80201bc: 6c3b ldr r3, [r7, #64] @ 0x40
80201be: 895b ldrh r3, [r3, #10]
80201c0: 429a cmp r2, r3
80201c2: d006 beq.n 80201d2 <tcp_write+0x152>
80201c4: 4b60 ldr r3, [pc, #384] @ (8020348 <tcp_write+0x2c8>)
80201c6: f240 12f3 movw r2, #499 @ 0x1f3
80201ca: 4964 ldr r1, [pc, #400] @ (802035c <tcp_write+0x2dc>)
80201cc: 4860 ldr r0, [pc, #384] @ (8020350 <tcp_write+0x2d0>)
80201ce: f00a fc2d bl 802aa2c <iprintf>
pcb->unsent_oversize == last_unsent->oversize_left);
#endif /* TCP_OVERSIZE_DBGCHECK */
oversize = pcb->unsent_oversize;
80201d2: 68fb ldr r3, [r7, #12]
80201d4: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
80201d8: 82fb strh r3, [r7, #22]
if (oversize > 0) {
80201da: 8afb ldrh r3, [r7, #22]
80201dc: 2b00 cmp r3, #0
80201de: d02e beq.n 802023e <tcp_write+0x1be>
LWIP_ASSERT("inconsistent oversize vs. space", oversize <= space);
80201e0: 8afb ldrh r3, [r7, #22]
80201e2: f8b7 205c ldrh.w r2, [r7, #92] @ 0x5c
80201e6: 429a cmp r2, r3
80201e8: d206 bcs.n 80201f8 <tcp_write+0x178>
80201ea: 4b57 ldr r3, [pc, #348] @ (8020348 <tcp_write+0x2c8>)
80201ec: f44f 72fc mov.w r2, #504 @ 0x1f8
80201f0: 495b ldr r1, [pc, #364] @ (8020360 <tcp_write+0x2e0>)
80201f2: 4857 ldr r0, [pc, #348] @ (8020350 <tcp_write+0x2d0>)
80201f4: f00a fc1a bl 802aa2c <iprintf>
seg = last_unsent;
80201f8: 6c3b ldr r3, [r7, #64] @ 0x40
80201fa: 657b str r3, [r7, #84] @ 0x54
oversize_used = LWIP_MIN(space, LWIP_MIN(oversize, len));
80201fc: 8afb ldrh r3, [r7, #22]
80201fe: 88fa ldrh r2, [r7, #6]
8020200: 4293 cmp r3, r2
8020202: bf28 it cs
8020204: 4613 movcs r3, r2
8020206: b29b uxth r3, r3
8020208: f8b7 205c ldrh.w r2, [r7, #92] @ 0x5c
802020c: 4293 cmp r3, r2
802020e: bf28 it cs
8020210: 4613 movcs r3, r2
8020212: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
pos += oversize_used;
8020216: f8b7 204a ldrh.w r2, [r7, #74] @ 0x4a
802021a: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
802021e: 4413 add r3, r2
8020220: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
oversize -= oversize_used;
8020224: 8afa ldrh r2, [r7, #22]
8020226: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
802022a: 1ad3 subs r3, r2, r3
802022c: b29b uxth r3, r3
802022e: 82fb strh r3, [r7, #22]
space -= oversize_used;
8020230: f8b7 205c ldrh.w r2, [r7, #92] @ 0x5c
8020234: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8020238: 1ad3 subs r3, r2, r3
802023a: f8a7 305c strh.w r3, [r7, #92] @ 0x5c
}
/* now we are either finished or oversize is zero */
LWIP_ASSERT("inconsistent oversize vs. len", (oversize == 0) || (pos == len));
802023e: 8afb ldrh r3, [r7, #22]
8020240: 2b00 cmp r3, #0
8020242: d00b beq.n 802025c <tcp_write+0x1dc>
8020244: f8b7 204a ldrh.w r2, [r7, #74] @ 0x4a
8020248: 88fb ldrh r3, [r7, #6]
802024a: 429a cmp r2, r3
802024c: d006 beq.n 802025c <tcp_write+0x1dc>
802024e: 4b3e ldr r3, [pc, #248] @ (8020348 <tcp_write+0x2c8>)
8020250: f44f 7200 mov.w r2, #512 @ 0x200
8020254: 4943 ldr r1, [pc, #268] @ (8020364 <tcp_write+0x2e4>)
8020256: 483e ldr r0, [pc, #248] @ (8020350 <tcp_write+0x2d0>)
8020258: f00a fbe8 bl 802aa2c <iprintf>
*
* This phase is skipped for LWIP_NETIF_TX_SINGLE_PBUF as we could only execute
* it after rexmit puts a segment from unacked to unsent and at this point,
* oversize info is lost.
*/
if ((pos < len) && (space > 0) && (last_unsent->len > 0)) {
802025c: f8b7 204a ldrh.w r2, [r7, #74] @ 0x4a
8020260: 88fb ldrh r3, [r7, #6]
8020262: 429a cmp r2, r3
8020264: f080 8172 bcs.w 802054c <tcp_write+0x4cc>
8020268: f8b7 305c ldrh.w r3, [r7, #92] @ 0x5c
802026c: 2b00 cmp r3, #0
802026e: f000 816d beq.w 802054c <tcp_write+0x4cc>
8020272: 6c3b ldr r3, [r7, #64] @ 0x40
8020274: 891b ldrh r3, [r3, #8]
8020276: 2b00 cmp r3, #0
8020278: f000 8168 beq.w 802054c <tcp_write+0x4cc>
u16_t seglen = LWIP_MIN(space, len - pos);
802027c: 88fa ldrh r2, [r7, #6]
802027e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8020282: 1ad2 subs r2, r2, r3
8020284: f8b7 305c ldrh.w r3, [r7, #92] @ 0x5c
8020288: 4293 cmp r3, r2
802028a: bfa8 it ge
802028c: 4613 movge r3, r2
802028e: 847b strh r3, [r7, #34] @ 0x22
seg = last_unsent;
8020290: 6c3b ldr r3, [r7, #64] @ 0x40
8020292: 657b str r3, [r7, #84] @ 0x54
/* Create a pbuf with a copy or reference to seglen bytes. We
* can use PBUF_RAW here since the data appears in the middle of
* a segment. A header will never be prepended. */
if (apiflags & TCP_WRITE_FLAG_COPY) {
8020294: 797b ldrb r3, [r7, #5]
8020296: f003 0301 and.w r3, r3, #1
802029a: 2b00 cmp r3, #0
802029c: d02b beq.n 80202f6 <tcp_write+0x276>
/* Data is copied */
if ((concat_p = tcp_pbuf_prealloc(PBUF_RAW, seglen, space, &oversize, pcb, apiflags, 1)) == NULL) {
802029e: f107 0016 add.w r0, r7, #22
80202a2: f8b7 205c ldrh.w r2, [r7, #92] @ 0x5c
80202a6: 8c79 ldrh r1, [r7, #34] @ 0x22
80202a8: 2301 movs r3, #1
80202aa: 9302 str r3, [sp, #8]
80202ac: 797b ldrb r3, [r7, #5]
80202ae: 9301 str r3, [sp, #4]
80202b0: 68fb ldr r3, [r7, #12]
80202b2: 9300 str r3, [sp, #0]
80202b4: 4603 mov r3, r0
80202b6: 2000 movs r0, #0
80202b8: f7ff fdee bl 801fe98 <tcp_pbuf_prealloc>
80202bc: 63f8 str r0, [r7, #60] @ 0x3c
80202be: 6bfb ldr r3, [r7, #60] @ 0x3c
80202c0: 2b00 cmp r3, #0
80202c2: f000 825a beq.w 802077a <tcp_write+0x6fa>
("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n",
seglen));
goto memerr;
}
#if TCP_OVERSIZE_DBGCHECK
oversize_add = oversize;
80202c6: 8afb ldrh r3, [r7, #22]
80202c8: f8a7 305a strh.w r3, [r7, #90] @ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK */
TCP_DATA_COPY2(concat_p->payload, (const u8_t *)arg + pos, seglen, &concat_chksum, &concat_chksum_swapped);
80202cc: 6bfb ldr r3, [r7, #60] @ 0x3c
80202ce: 6858 ldr r0, [r3, #4]
80202d0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80202d4: 68ba ldr r2, [r7, #8]
80202d6: 4413 add r3, r2
80202d8: 8c7a ldrh r2, [r7, #34] @ 0x22
80202da: 4619 mov r1, r3
80202dc: f00a fe2f bl 802af3e <memcpy>
#if TCP_CHECKSUM_ON_COPY
concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
queuelen += pbuf_clen(concat_p);
80202e0: 6bf8 ldr r0, [r7, #60] @ 0x3c
80202e2: f7fb f9b9 bl 801b658 <pbuf_clen>
80202e6: 4603 mov r3, r0
80202e8: 461a mov r2, r3
80202ea: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
80202ee: 4413 add r3, r2
80202f0: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80202f4: e055 b.n 80203a2 <tcp_write+0x322>
} else {
/* Data is not copied */
/* If the last unsent pbuf is of type PBUF_ROM, try to extend it. */
struct pbuf *p;
for (p = last_unsent->p; p->next != NULL; p = p->next);
80202f6: 6c3b ldr r3, [r7, #64] @ 0x40
80202f8: 685b ldr r3, [r3, #4]
80202fa: 63bb str r3, [r7, #56] @ 0x38
80202fc: e002 b.n 8020304 <tcp_write+0x284>
80202fe: 6bbb ldr r3, [r7, #56] @ 0x38
8020300: 681b ldr r3, [r3, #0]
8020302: 63bb str r3, [r7, #56] @ 0x38
8020304: 6bbb ldr r3, [r7, #56] @ 0x38
8020306: 681b ldr r3, [r3, #0]
8020308: 2b00 cmp r3, #0
802030a: d1f8 bne.n 80202fe <tcp_write+0x27e>
if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
802030c: 6bbb ldr r3, [r7, #56] @ 0x38
802030e: 7b1b ldrb r3, [r3, #12]
8020310: f003 03c0 and.w r3, r3, #192 @ 0xc0
8020314: 2b00 cmp r3, #0
8020316: d129 bne.n 802036c <tcp_write+0x2ec>
(const u8_t *)p->payload + p->len == (const u8_t *)arg) {
8020318: 6bbb ldr r3, [r7, #56] @ 0x38
802031a: 685b ldr r3, [r3, #4]
802031c: 6bba ldr r2, [r7, #56] @ 0x38
802031e: 8952 ldrh r2, [r2, #10]
8020320: 4413 add r3, r2
if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
8020322: 68ba ldr r2, [r7, #8]
8020324: 429a cmp r2, r3
8020326: d121 bne.n 802036c <tcp_write+0x2ec>
LWIP_ASSERT("tcp_write: ROM pbufs cannot be oversized", pos == 0);
8020328: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
802032c: 2b00 cmp r3, #0
802032e: d006 beq.n 802033e <tcp_write+0x2be>
8020330: 4b05 ldr r3, [pc, #20] @ (8020348 <tcp_write+0x2c8>)
8020332: f240 2231 movw r2, #561 @ 0x231
8020336: 490c ldr r1, [pc, #48] @ (8020368 <tcp_write+0x2e8>)
8020338: 4805 ldr r0, [pc, #20] @ (8020350 <tcp_write+0x2d0>)
802033a: f00a fb77 bl 802aa2c <iprintf>
extendlen = seglen;
802033e: 8c7b ldrh r3, [r7, #34] @ 0x22
8020340: f8a7 305e strh.w r3, [r7, #94] @ 0x5e
8020344: e02d b.n 80203a2 <tcp_write+0x322>
8020346: bf00 nop
8020348: 080303d8 .word 0x080303d8
802034c: 08030578 .word 0x08030578
8020350: 0803042c .word 0x0803042c
8020354: 08030590 .word 0x08030590
8020358: 080305c4 .word 0x080305c4
802035c: 080305dc .word 0x080305dc
8020360: 0803060c .word 0x0803060c
8020364: 0803062c .word 0x0803062c
8020368: 0803064c .word 0x0803064c
} else {
if ((concat_p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) {
802036c: 8c7b ldrh r3, [r7, #34] @ 0x22
802036e: 2201 movs r2, #1
8020370: 4619 mov r1, r3
8020372: 2000 movs r0, #0
8020374: f7fa fdcc bl 801af10 <pbuf_alloc>
8020378: 63f8 str r0, [r7, #60] @ 0x3c
802037a: 6bfb ldr r3, [r7, #60] @ 0x3c
802037c: 2b00 cmp r3, #0
802037e: f000 81fe beq.w 802077e <tcp_write+0x6fe>
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("tcp_write: could not allocate memory for zero-copy pbuf\n"));
goto memerr;
}
/* reference the non-volatile payload data */
((struct pbuf_rom *)concat_p)->payload = (const u8_t *)arg + pos;
8020382: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8020386: 68ba ldr r2, [r7, #8]
8020388: 441a add r2, r3
802038a: 6bfb ldr r3, [r7, #60] @ 0x3c
802038c: 605a str r2, [r3, #4]
queuelen += pbuf_clen(concat_p);
802038e: 6bf8 ldr r0, [r7, #60] @ 0x3c
8020390: f7fb f962 bl 801b658 <pbuf_clen>
8020394: 4603 mov r3, r0
8020396: 461a mov r2, r3
8020398: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
802039c: 4413 add r3, r2
802039e: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
&concat_chksum, &concat_chksum_swapped);
concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
}
pos += seglen;
80203a2: f8b7 204a ldrh.w r2, [r7, #74] @ 0x4a
80203a6: 8c7b ldrh r3, [r7, #34] @ 0x22
80203a8: 4413 add r3, r2
80203aa: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
80203ae: e0cd b.n 802054c <tcp_write+0x4cc>
}
#endif /* !LWIP_NETIF_TX_SINGLE_PBUF */
} else {
#if TCP_OVERSIZE
LWIP_ASSERT("unsent_oversize mismatch (pcb->unsent is NULL)",
80203b0: 68fb ldr r3, [r7, #12]
80203b2: f8b3 3068 ldrh.w r3, [r3, #104] @ 0x68
80203b6: 2b00 cmp r3, #0
80203b8: f000 80c8 beq.w 802054c <tcp_write+0x4cc>
80203bc: 4b72 ldr r3, [pc, #456] @ (8020588 <tcp_write+0x508>)
80203be: f240 224a movw r2, #586 @ 0x24a
80203c2: 4972 ldr r1, [pc, #456] @ (802058c <tcp_write+0x50c>)
80203c4: 4872 ldr r0, [pc, #456] @ (8020590 <tcp_write+0x510>)
80203c6: f00a fb31 bl 802aa2c <iprintf>
* Phase 3: Create new segments.
*
* The new segments are chained together in the local 'queue'
* variable, ready to be appended to pcb->unsent.
*/
while (pos < len) {
80203ca: e0bf b.n 802054c <tcp_write+0x4cc>
struct pbuf *p;
u16_t left = len - pos;
80203cc: 88fa ldrh r2, [r7, #6]
80203ce: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80203d2: 1ad3 subs r3, r2, r3
80203d4: 843b strh r3, [r7, #32]
u16_t max_len = mss_local - optlen;
80203d6: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
80203da: b29b uxth r3, r3
80203dc: 8d3a ldrh r2, [r7, #40] @ 0x28
80203de: 1ad3 subs r3, r2, r3
80203e0: 83fb strh r3, [r7, #30]
u16_t seglen = LWIP_MIN(left, max_len);
80203e2: 8bfa ldrh r2, [r7, #30]
80203e4: 8c3b ldrh r3, [r7, #32]
80203e6: 4293 cmp r3, r2
80203e8: bf28 it cs
80203ea: 4613 movcs r3, r2
80203ec: 83bb strh r3, [r7, #28]
#if TCP_CHECKSUM_ON_COPY
u16_t chksum = 0;
u8_t chksum_swapped = 0;
#endif /* TCP_CHECKSUM_ON_COPY */
if (apiflags & TCP_WRITE_FLAG_COPY) {
80203ee: 797b ldrb r3, [r7, #5]
80203f0: f003 0301 and.w r3, r3, #1
80203f4: 2b00 cmp r3, #0
80203f6: d036 beq.n 8020466 <tcp_write+0x3e6>
/* If copy is set, memory should be allocated and data copied
* into pbuf */
if ((p = tcp_pbuf_prealloc(PBUF_TRANSPORT, seglen + optlen, mss_local, &oversize, pcb, apiflags, queue == NULL)) == NULL) {
80203f8: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
80203fc: b29a uxth r2, r3
80203fe: 8bbb ldrh r3, [r7, #28]
8020400: 4413 add r3, r2
8020402: b299 uxth r1, r3
8020404: 6cfb ldr r3, [r7, #76] @ 0x4c
8020406: 2b00 cmp r3, #0
8020408: bf0c ite eq
802040a: 2301 moveq r3, #1
802040c: 2300 movne r3, #0
802040e: b2db uxtb r3, r3
8020410: f107 0016 add.w r0, r7, #22
8020414: 8d3a ldrh r2, [r7, #40] @ 0x28
8020416: 9302 str r3, [sp, #8]
8020418: 797b ldrb r3, [r7, #5]
802041a: 9301 str r3, [sp, #4]
802041c: 68fb ldr r3, [r7, #12]
802041e: 9300 str r3, [sp, #0]
8020420: 4603 mov r3, r0
8020422: 2036 movs r0, #54 @ 0x36
8020424: f7ff fd38 bl 801fe98 <tcp_pbuf_prealloc>
8020428: 6378 str r0, [r7, #52] @ 0x34
802042a: 6b7b ldr r3, [r7, #52] @ 0x34
802042c: 2b00 cmp r3, #0
802042e: f000 81a8 beq.w 8020782 <tcp_write+0x702>
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", seglen));
goto memerr;
}
LWIP_ASSERT("tcp_write: check that first pbuf can hold the complete seglen",
8020432: 6b7b ldr r3, [r7, #52] @ 0x34
8020434: 895b ldrh r3, [r3, #10]
8020436: 8bba ldrh r2, [r7, #28]
8020438: 429a cmp r2, r3
802043a: d906 bls.n 802044a <tcp_write+0x3ca>
802043c: 4b52 ldr r3, [pc, #328] @ (8020588 <tcp_write+0x508>)
802043e: f240 2266 movw r2, #614 @ 0x266
8020442: 4954 ldr r1, [pc, #336] @ (8020594 <tcp_write+0x514>)
8020444: 4852 ldr r0, [pc, #328] @ (8020590 <tcp_write+0x510>)
8020446: f00a faf1 bl 802aa2c <iprintf>
(p->len >= seglen));
TCP_DATA_COPY2((char *)p->payload + optlen, (const u8_t *)arg + pos, seglen, &chksum, &chksum_swapped);
802044a: 6b7b ldr r3, [r7, #52] @ 0x34
802044c: 685a ldr r2, [r3, #4]
802044e: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
8020452: 18d0 adds r0, r2, r3
8020454: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8020458: 68ba ldr r2, [r7, #8]
802045a: 4413 add r3, r2
802045c: 8bba ldrh r2, [r7, #28]
802045e: 4619 mov r1, r3
8020460: f00a fd6d bl 802af3e <memcpy>
8020464: e02f b.n 80204c6 <tcp_write+0x446>
* sent out on the link (as it has to be ACKed by the remote
* party) we can safely use PBUF_ROM instead of PBUF_REF here.
*/
struct pbuf *p2;
#if TCP_OVERSIZE
LWIP_ASSERT("oversize == 0", oversize == 0);
8020466: 8afb ldrh r3, [r7, #22]
8020468: 2b00 cmp r3, #0
802046a: d006 beq.n 802047a <tcp_write+0x3fa>
802046c: 4b46 ldr r3, [pc, #280] @ (8020588 <tcp_write+0x508>)
802046e: f240 2271 movw r2, #625 @ 0x271
8020472: 4949 ldr r1, [pc, #292] @ (8020598 <tcp_write+0x518>)
8020474: 4846 ldr r0, [pc, #280] @ (8020590 <tcp_write+0x510>)
8020476: f00a fad9 bl 802aa2c <iprintf>
#endif /* TCP_OVERSIZE */
if ((p2 = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) {
802047a: 8bbb ldrh r3, [r7, #28]
802047c: 2201 movs r2, #1
802047e: 4619 mov r1, r3
8020480: 2036 movs r0, #54 @ 0x36
8020482: f7fa fd45 bl 801af10 <pbuf_alloc>
8020486: 61b8 str r0, [r7, #24]
8020488: 69bb ldr r3, [r7, #24]
802048a: 2b00 cmp r3, #0
802048c: f000 817b beq.w 8020786 <tcp_write+0x706>
chksum_swapped = 1;
chksum = SWAP_BYTES_IN_WORD(chksum);
}
#endif /* TCP_CHECKSUM_ON_COPY */
/* reference the non-volatile payload data */
((struct pbuf_rom *)p2)->payload = (const u8_t *)arg + pos;
8020490: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8020494: 68ba ldr r2, [r7, #8]
8020496: 441a add r2, r3
8020498: 69bb ldr r3, [r7, #24]
802049a: 605a str r2, [r3, #4]
/* Second, allocate a pbuf for the headers. */
if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
802049c: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
80204a0: b29b uxth r3, r3
80204a2: f44f 7220 mov.w r2, #640 @ 0x280
80204a6: 4619 mov r1, r3
80204a8: 2036 movs r0, #54 @ 0x36
80204aa: f7fa fd31 bl 801af10 <pbuf_alloc>
80204ae: 6378 str r0, [r7, #52] @ 0x34
80204b0: 6b7b ldr r3, [r7, #52] @ 0x34
80204b2: 2b00 cmp r3, #0
80204b4: d103 bne.n 80204be <tcp_write+0x43e>
/* If allocation fails, we have to deallocate the data pbuf as
* well. */
pbuf_free(p2);
80204b6: 69b8 ldr r0, [r7, #24]
80204b8: f7fb f840 bl 801b53c <pbuf_free>
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for header pbuf\n"));
goto memerr;
80204bc: e166 b.n 802078c <tcp_write+0x70c>
}
/* Concatenate the headers and data pbufs together. */
pbuf_cat(p/*header*/, p2/*data*/);
80204be: 69b9 ldr r1, [r7, #24]
80204c0: 6b78 ldr r0, [r7, #52] @ 0x34
80204c2: f7fb f909 bl 801b6d8 <pbuf_cat>
}
queuelen += pbuf_clen(p);
80204c6: 6b78 ldr r0, [r7, #52] @ 0x34
80204c8: f7fb f8c6 bl 801b658 <pbuf_clen>
80204cc: 4603 mov r3, r0
80204ce: 461a mov r2, r3
80204d0: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
80204d4: 4413 add r3, r2
80204d6: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
/* Now that there are more segments queued, we check again if the
* length of the queue exceeds the configured maximum or
* overflows. */
if (queuelen > LWIP_MIN(TCP_SND_QUEUELEN, TCP_SNDQUEUELEN_OVERFLOW)) {
80204da: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
80204de: 2b10 cmp r3, #16
80204e0: d903 bls.n 80204ea <tcp_write+0x46a>
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: queue too long %"U16_F" (%d)\n",
queuelen, (int)TCP_SND_QUEUELEN));
pbuf_free(p);
80204e2: 6b78 ldr r0, [r7, #52] @ 0x34
80204e4: f7fb f82a bl 801b53c <pbuf_free>
goto memerr;
80204e8: e150 b.n 802078c <tcp_write+0x70c>
}
if ((seg = tcp_create_segment(pcb, p, 0, pcb->snd_lbb + pos, optflags)) == NULL) {
80204ea: 68fb ldr r3, [r7, #12]
80204ec: 6dda ldr r2, [r3, #92] @ 0x5c
80204ee: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80204f2: 441a add r2, r3
80204f4: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
80204f8: 9300 str r3, [sp, #0]
80204fa: 4613 mov r3, r2
80204fc: 2200 movs r2, #0
80204fe: 6b79 ldr r1, [r7, #52] @ 0x34
8020500: 68f8 ldr r0, [r7, #12]
8020502: f7ff fc29 bl 801fd58 <tcp_create_segment>
8020506: 6578 str r0, [r7, #84] @ 0x54
8020508: 6d7b ldr r3, [r7, #84] @ 0x54
802050a: 2b00 cmp r3, #0
802050c: f000 813d beq.w 802078a <tcp_write+0x70a>
goto memerr;
}
#if TCP_OVERSIZE_DBGCHECK
seg->oversize_left = oversize;
8020510: 8afa ldrh r2, [r7, #22]
8020512: 6d7b ldr r3, [r7, #84] @ 0x54
8020514: 815a strh r2, [r3, #10]
seg->chksum_swapped = chksum_swapped;
seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */
/* first segment of to-be-queued data? */
if (queue == NULL) {
8020516: 6cfb ldr r3, [r7, #76] @ 0x4c
8020518: 2b00 cmp r3, #0
802051a: d102 bne.n 8020522 <tcp_write+0x4a2>
queue = seg;
802051c: 6d7b ldr r3, [r7, #84] @ 0x54
802051e: 64fb str r3, [r7, #76] @ 0x4c
8020520: e00c b.n 802053c <tcp_write+0x4bc>
} else {
/* Attach the segment to the end of the queued segments */
LWIP_ASSERT("prev_seg != NULL", prev_seg != NULL);
8020522: 6d3b ldr r3, [r7, #80] @ 0x50
8020524: 2b00 cmp r3, #0
8020526: d106 bne.n 8020536 <tcp_write+0x4b6>
8020528: 4b17 ldr r3, [pc, #92] @ (8020588 <tcp_write+0x508>)
802052a: f240 22ab movw r2, #683 @ 0x2ab
802052e: 491b ldr r1, [pc, #108] @ (802059c <tcp_write+0x51c>)
8020530: 4817 ldr r0, [pc, #92] @ (8020590 <tcp_write+0x510>)
8020532: f00a fa7b bl 802aa2c <iprintf>
prev_seg->next = seg;
8020536: 6d3b ldr r3, [r7, #80] @ 0x50
8020538: 6d7a ldr r2, [r7, #84] @ 0x54
802053a: 601a str r2, [r3, #0]
}
/* remember last segment of to-be-queued data for next iteration */
prev_seg = seg;
802053c: 6d7b ldr r3, [r7, #84] @ 0x54
802053e: 653b str r3, [r7, #80] @ 0x50
LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_write: queueing %"U32_F":%"U32_F"\n",
lwip_ntohl(seg->tcphdr->seqno),
lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg)));
pos += seglen;
8020540: f8b7 204a ldrh.w r2, [r7, #74] @ 0x4a
8020544: 8bbb ldrh r3, [r7, #28]
8020546: 4413 add r3, r2
8020548: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
while (pos < len) {
802054c: f8b7 204a ldrh.w r2, [r7, #74] @ 0x4a
8020550: 88fb ldrh r3, [r7, #6]
8020552: 429a cmp r2, r3
8020554: f4ff af3a bcc.w 80203cc <tcp_write+0x34c>
/*
* All three segmentation phases were successful. We can commit the
* transaction.
*/
#if TCP_OVERSIZE_DBGCHECK
if ((last_unsent != NULL) && (oversize_add != 0)) {
8020558: 6c3b ldr r3, [r7, #64] @ 0x40
802055a: 2b00 cmp r3, #0
802055c: d00b beq.n 8020576 <tcp_write+0x4f6>
802055e: f8b7 305a ldrh.w r3, [r7, #90] @ 0x5a
8020562: 2b00 cmp r3, #0
8020564: d007 beq.n 8020576 <tcp_write+0x4f6>
last_unsent->oversize_left += oversize_add;
8020566: 6c3b ldr r3, [r7, #64] @ 0x40
8020568: 895a ldrh r2, [r3, #10]
802056a: f8b7 305a ldrh.w r3, [r7, #90] @ 0x5a
802056e: 4413 add r3, r2
8020570: b29a uxth r2, r3
8020572: 6c3b ldr r3, [r7, #64] @ 0x40
8020574: 815a strh r2, [r3, #10]
/*
* Phase 1: If data has been added to the preallocated tail of
* last_unsent, we update the length fields of the pbuf chain.
*/
#if TCP_OVERSIZE
if (oversize_used > 0) {
8020576: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
802057a: 2b00 cmp r3, #0
802057c: d052 beq.n 8020624 <tcp_write+0x5a4>
struct pbuf *p;
/* Bump tot_len of whole chain, len of tail */
for (p = last_unsent->p; p; p = p->next) {
802057e: 6c3b ldr r3, [r7, #64] @ 0x40
8020580: 685b ldr r3, [r3, #4]
8020582: 633b str r3, [r7, #48] @ 0x30
8020584: e02e b.n 80205e4 <tcp_write+0x564>
8020586: bf00 nop
8020588: 080303d8 .word 0x080303d8
802058c: 08030678 .word 0x08030678
8020590: 0803042c .word 0x0803042c
8020594: 080306a8 .word 0x080306a8
8020598: 080306e8 .word 0x080306e8
802059c: 080306f8 .word 0x080306f8
p->tot_len += oversize_used;
80205a0: 6b3b ldr r3, [r7, #48] @ 0x30
80205a2: 891a ldrh r2, [r3, #8]
80205a4: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
80205a8: 4413 add r3, r2
80205aa: b29a uxth r2, r3
80205ac: 6b3b ldr r3, [r7, #48] @ 0x30
80205ae: 811a strh r2, [r3, #8]
if (p->next == NULL) {
80205b0: 6b3b ldr r3, [r7, #48] @ 0x30
80205b2: 681b ldr r3, [r3, #0]
80205b4: 2b00 cmp r3, #0
80205b6: d112 bne.n 80205de <tcp_write+0x55e>
TCP_DATA_COPY((char *)p->payload + p->len, arg, oversize_used, last_unsent);
80205b8: 6b3b ldr r3, [r7, #48] @ 0x30
80205ba: 685b ldr r3, [r3, #4]
80205bc: 6b3a ldr r2, [r7, #48] @ 0x30
80205be: 8952 ldrh r2, [r2, #10]
80205c0: 4413 add r3, r2
80205c2: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
80205c6: 68b9 ldr r1, [r7, #8]
80205c8: 4618 mov r0, r3
80205ca: f00a fcb8 bl 802af3e <memcpy>
p->len += oversize_used;
80205ce: 6b3b ldr r3, [r7, #48] @ 0x30
80205d0: 895a ldrh r2, [r3, #10]
80205d2: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
80205d6: 4413 add r3, r2
80205d8: b29a uxth r2, r3
80205da: 6b3b ldr r3, [r7, #48] @ 0x30
80205dc: 815a strh r2, [r3, #10]
for (p = last_unsent->p; p; p = p->next) {
80205de: 6b3b ldr r3, [r7, #48] @ 0x30
80205e0: 681b ldr r3, [r3, #0]
80205e2: 633b str r3, [r7, #48] @ 0x30
80205e4: 6b3b ldr r3, [r7, #48] @ 0x30
80205e6: 2b00 cmp r3, #0
80205e8: d1da bne.n 80205a0 <tcp_write+0x520>
}
}
last_unsent->len += oversize_used;
80205ea: 6c3b ldr r3, [r7, #64] @ 0x40
80205ec: 891a ldrh r2, [r3, #8]
80205ee: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
80205f2: 4413 add r3, r2
80205f4: b29a uxth r2, r3
80205f6: 6c3b ldr r3, [r7, #64] @ 0x40
80205f8: 811a strh r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
LWIP_ASSERT("last_unsent->oversize_left >= oversize_used",
80205fa: 6c3b ldr r3, [r7, #64] @ 0x40
80205fc: 895b ldrh r3, [r3, #10]
80205fe: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
8020602: 429a cmp r2, r3
8020604: d906 bls.n 8020614 <tcp_write+0x594>
8020606: 4b78 ldr r3, [pc, #480] @ (80207e8 <tcp_write+0x768>)
8020608: f240 22d3 movw r2, #723 @ 0x2d3
802060c: 4977 ldr r1, [pc, #476] @ (80207ec <tcp_write+0x76c>)
802060e: 4878 ldr r0, [pc, #480] @ (80207f0 <tcp_write+0x770>)
8020610: f00a fa0c bl 802aa2c <iprintf>
last_unsent->oversize_left >= oversize_used);
last_unsent->oversize_left -= oversize_used;
8020614: 6c3b ldr r3, [r7, #64] @ 0x40
8020616: 895a ldrh r2, [r3, #10]
8020618: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
802061c: 1ad3 subs r3, r2, r3
802061e: b29a uxth r2, r3
8020620: 6c3b ldr r3, [r7, #64] @ 0x40
8020622: 815a strh r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
}
pcb->unsent_oversize = oversize;
8020624: 8afa ldrh r2, [r7, #22]
8020626: 68fb ldr r3, [r7, #12]
8020628: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
/*
* Phase 2: concat_p can be concatenated onto last_unsent->p, unless we
* determined that the last ROM pbuf can be extended to include the new data.
*/
if (concat_p != NULL) {
802062c: 6bfb ldr r3, [r7, #60] @ 0x3c
802062e: 2b00 cmp r3, #0
8020630: d018 beq.n 8020664 <tcp_write+0x5e4>
LWIP_ASSERT("tcp_write: cannot concatenate when pcb->unsent is empty",
8020632: 6c3b ldr r3, [r7, #64] @ 0x40
8020634: 2b00 cmp r3, #0
8020636: d106 bne.n 8020646 <tcp_write+0x5c6>
8020638: 4b6b ldr r3, [pc, #428] @ (80207e8 <tcp_write+0x768>)
802063a: f44f 7238 mov.w r2, #736 @ 0x2e0
802063e: 496d ldr r1, [pc, #436] @ (80207f4 <tcp_write+0x774>)
8020640: 486b ldr r0, [pc, #428] @ (80207f0 <tcp_write+0x770>)
8020642: f00a f9f3 bl 802aa2c <iprintf>
(last_unsent != NULL));
pbuf_cat(last_unsent->p, concat_p);
8020646: 6c3b ldr r3, [r7, #64] @ 0x40
8020648: 685b ldr r3, [r3, #4]
802064a: 6bf9 ldr r1, [r7, #60] @ 0x3c
802064c: 4618 mov r0, r3
802064e: f7fb f843 bl 801b6d8 <pbuf_cat>
last_unsent->len += concat_p->tot_len;
8020652: 6c3b ldr r3, [r7, #64] @ 0x40
8020654: 891a ldrh r2, [r3, #8]
8020656: 6bfb ldr r3, [r7, #60] @ 0x3c
8020658: 891b ldrh r3, [r3, #8]
802065a: 4413 add r3, r2
802065c: b29a uxth r2, r3
802065e: 6c3b ldr r3, [r7, #64] @ 0x40
8020660: 811a strh r2, [r3, #8]
8020662: e03c b.n 80206de <tcp_write+0x65e>
} else if (extendlen > 0) {
8020664: f8b7 305e ldrh.w r3, [r7, #94] @ 0x5e
8020668: 2b00 cmp r3, #0
802066a: d038 beq.n 80206de <tcp_write+0x65e>
struct pbuf *p;
LWIP_ASSERT("tcp_write: extension of reference requires reference",
802066c: 6c3b ldr r3, [r7, #64] @ 0x40
802066e: 2b00 cmp r3, #0
8020670: d003 beq.n 802067a <tcp_write+0x5fa>
8020672: 6c3b ldr r3, [r7, #64] @ 0x40
8020674: 685b ldr r3, [r3, #4]
8020676: 2b00 cmp r3, #0
8020678: d106 bne.n 8020688 <tcp_write+0x608>
802067a: 4b5b ldr r3, [pc, #364] @ (80207e8 <tcp_write+0x768>)
802067c: f240 22e6 movw r2, #742 @ 0x2e6
8020680: 495d ldr r1, [pc, #372] @ (80207f8 <tcp_write+0x778>)
8020682: 485b ldr r0, [pc, #364] @ (80207f0 <tcp_write+0x770>)
8020684: f00a f9d2 bl 802aa2c <iprintf>
last_unsent != NULL && last_unsent->p != NULL);
for (p = last_unsent->p; p->next != NULL; p = p->next) {
8020688: 6c3b ldr r3, [r7, #64] @ 0x40
802068a: 685b ldr r3, [r3, #4]
802068c: 62fb str r3, [r7, #44] @ 0x2c
802068e: e00a b.n 80206a6 <tcp_write+0x626>
p->tot_len += extendlen;
8020690: 6afb ldr r3, [r7, #44] @ 0x2c
8020692: 891a ldrh r2, [r3, #8]
8020694: f8b7 305e ldrh.w r3, [r7, #94] @ 0x5e
8020698: 4413 add r3, r2
802069a: b29a uxth r2, r3
802069c: 6afb ldr r3, [r7, #44] @ 0x2c
802069e: 811a strh r2, [r3, #8]
for (p = last_unsent->p; p->next != NULL; p = p->next) {
80206a0: 6afb ldr r3, [r7, #44] @ 0x2c
80206a2: 681b ldr r3, [r3, #0]
80206a4: 62fb str r3, [r7, #44] @ 0x2c
80206a6: 6afb ldr r3, [r7, #44] @ 0x2c
80206a8: 681b ldr r3, [r3, #0]
80206aa: 2b00 cmp r3, #0
80206ac: d1f0 bne.n 8020690 <tcp_write+0x610>
}
p->tot_len += extendlen;
80206ae: 6afb ldr r3, [r7, #44] @ 0x2c
80206b0: 891a ldrh r2, [r3, #8]
80206b2: f8b7 305e ldrh.w r3, [r7, #94] @ 0x5e
80206b6: 4413 add r3, r2
80206b8: b29a uxth r2, r3
80206ba: 6afb ldr r3, [r7, #44] @ 0x2c
80206bc: 811a strh r2, [r3, #8]
p->len += extendlen;
80206be: 6afb ldr r3, [r7, #44] @ 0x2c
80206c0: 895a ldrh r2, [r3, #10]
80206c2: f8b7 305e ldrh.w r3, [r7, #94] @ 0x5e
80206c6: 4413 add r3, r2
80206c8: b29a uxth r2, r3
80206ca: 6afb ldr r3, [r7, #44] @ 0x2c
80206cc: 815a strh r2, [r3, #10]
last_unsent->len += extendlen;
80206ce: 6c3b ldr r3, [r7, #64] @ 0x40
80206d0: 891a ldrh r2, [r3, #8]
80206d2: f8b7 305e ldrh.w r3, [r7, #94] @ 0x5e
80206d6: 4413 add r3, r2
80206d8: b29a uxth r2, r3
80206da: 6c3b ldr r3, [r7, #64] @ 0x40
80206dc: 811a strh r2, [r3, #8]
/*
* Phase 3: Append queue to pcb->unsent. Queue may be NULL, but that
* is harmless
*/
if (last_unsent == NULL) {
80206de: 6c3b ldr r3, [r7, #64] @ 0x40
80206e0: 2b00 cmp r3, #0
80206e2: d103 bne.n 80206ec <tcp_write+0x66c>
pcb->unsent = queue;
80206e4: 68fb ldr r3, [r7, #12]
80206e6: 6cfa ldr r2, [r7, #76] @ 0x4c
80206e8: 66da str r2, [r3, #108] @ 0x6c
80206ea: e002 b.n 80206f2 <tcp_write+0x672>
} else {
last_unsent->next = queue;
80206ec: 6c3b ldr r3, [r7, #64] @ 0x40
80206ee: 6cfa ldr r2, [r7, #76] @ 0x4c
80206f0: 601a str r2, [r3, #0]
}
/*
* Finally update the pcb state.
*/
pcb->snd_lbb += len;
80206f2: 68fb ldr r3, [r7, #12]
80206f4: 6dda ldr r2, [r3, #92] @ 0x5c
80206f6: 88fb ldrh r3, [r7, #6]
80206f8: 441a add r2, r3
80206fa: 68fb ldr r3, [r7, #12]
80206fc: 65da str r2, [r3, #92] @ 0x5c
pcb->snd_buf -= len;
80206fe: 68fb ldr r3, [r7, #12]
8020700: f8b3 2064 ldrh.w r2, [r3, #100] @ 0x64
8020704: 88fb ldrh r3, [r7, #6]
8020706: 1ad3 subs r3, r2, r3
8020708: b29a uxth r2, r3
802070a: 68fb ldr r3, [r7, #12]
802070c: f8a3 2064 strh.w r2, [r3, #100] @ 0x64
pcb->snd_queuelen = queuelen;
8020710: 68fb ldr r3, [r7, #12]
8020712: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
8020716: f8a3 2066 strh.w r2, [r3, #102] @ 0x66
LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: %"S16_F" (after enqueued)\n",
pcb->snd_queuelen));
if (pcb->snd_queuelen != 0) {
802071a: 68fb ldr r3, [r7, #12]
802071c: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
8020720: 2b00 cmp r3, #0
8020722: d00e beq.n 8020742 <tcp_write+0x6c2>
LWIP_ASSERT("tcp_write: valid queue length",
8020724: 68fb ldr r3, [r7, #12]
8020726: 6f1b ldr r3, [r3, #112] @ 0x70
8020728: 2b00 cmp r3, #0
802072a: d10a bne.n 8020742 <tcp_write+0x6c2>
802072c: 68fb ldr r3, [r7, #12]
802072e: 6edb ldr r3, [r3, #108] @ 0x6c
8020730: 2b00 cmp r3, #0
8020732: d106 bne.n 8020742 <tcp_write+0x6c2>
8020734: 4b2c ldr r3, [pc, #176] @ (80207e8 <tcp_write+0x768>)
8020736: f240 3212 movw r2, #786 @ 0x312
802073a: 4930 ldr r1, [pc, #192] @ (80207fc <tcp_write+0x77c>)
802073c: 482c ldr r0, [pc, #176] @ (80207f0 <tcp_write+0x770>)
802073e: f00a f975 bl 802aa2c <iprintf>
pcb->unacked != NULL || pcb->unsent != NULL);
}
/* Set the PSH flag in the last segment that we enqueued. */
if (seg != NULL && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE) == 0)) {
8020742: 6d7b ldr r3, [r7, #84] @ 0x54
8020744: 2b00 cmp r3, #0
8020746: d016 beq.n 8020776 <tcp_write+0x6f6>
8020748: 6d7b ldr r3, [r7, #84] @ 0x54
802074a: 691b ldr r3, [r3, #16]
802074c: 2b00 cmp r3, #0
802074e: d012 beq.n 8020776 <tcp_write+0x6f6>
8020750: 797b ldrb r3, [r7, #5]
8020752: f003 0302 and.w r3, r3, #2
8020756: 2b00 cmp r3, #0
8020758: d10d bne.n 8020776 <tcp_write+0x6f6>
TCPH_SET_FLAG(seg->tcphdr, TCP_PSH);
802075a: 6d7b ldr r3, [r7, #84] @ 0x54
802075c: 691b ldr r3, [r3, #16]
802075e: 899b ldrh r3, [r3, #12]
8020760: b29c uxth r4, r3
8020762: 2008 movs r0, #8
8020764: f7f9 fa08 bl 8019b78 <lwip_htons>
8020768: 4603 mov r3, r0
802076a: 461a mov r2, r3
802076c: 6d7b ldr r3, [r7, #84] @ 0x54
802076e: 691b ldr r3, [r3, #16]
8020770: 4322 orrs r2, r4
8020772: b292 uxth r2, r2
8020774: 819a strh r2, [r3, #12]
}
return ERR_OK;
8020776: 2300 movs r3, #0
8020778: e031 b.n 80207de <tcp_write+0x75e>
goto memerr;
802077a: bf00 nop
802077c: e006 b.n 802078c <tcp_write+0x70c>
goto memerr;
802077e: bf00 nop
8020780: e004 b.n 802078c <tcp_write+0x70c>
goto memerr;
8020782: bf00 nop
8020784: e002 b.n 802078c <tcp_write+0x70c>
goto memerr;
8020786: bf00 nop
8020788: e000 b.n 802078c <tcp_write+0x70c>
goto memerr;
802078a: bf00 nop
memerr:
tcp_set_flags(pcb, TF_NAGLEMEMERR);
802078c: 68fb ldr r3, [r7, #12]
802078e: 8b5b ldrh r3, [r3, #26]
8020790: f043 0380 orr.w r3, r3, #128 @ 0x80
8020794: b29a uxth r2, r3
8020796: 68fb ldr r3, [r7, #12]
8020798: 835a strh r2, [r3, #26]
TCP_STATS_INC(tcp.memerr);
if (concat_p != NULL) {
802079a: 6bfb ldr r3, [r7, #60] @ 0x3c
802079c: 2b00 cmp r3, #0
802079e: d002 beq.n 80207a6 <tcp_write+0x726>
pbuf_free(concat_p);
80207a0: 6bf8 ldr r0, [r7, #60] @ 0x3c
80207a2: f7fa fecb bl 801b53c <pbuf_free>
}
if (queue != NULL) {
80207a6: 6cfb ldr r3, [r7, #76] @ 0x4c
80207a8: 2b00 cmp r3, #0
80207aa: d002 beq.n 80207b2 <tcp_write+0x732>
tcp_segs_free(queue);
80207ac: 6cf8 ldr r0, [r7, #76] @ 0x4c
80207ae: f7fc fb09 bl 801cdc4 <tcp_segs_free>
}
if (pcb->snd_queuelen != 0) {
80207b2: 68fb ldr r3, [r7, #12]
80207b4: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
80207b8: 2b00 cmp r3, #0
80207ba: d00e beq.n 80207da <tcp_write+0x75a>
LWIP_ASSERT("tcp_write: valid queue length", pcb->unacked != NULL ||
80207bc: 68fb ldr r3, [r7, #12]
80207be: 6f1b ldr r3, [r3, #112] @ 0x70
80207c0: 2b00 cmp r3, #0
80207c2: d10a bne.n 80207da <tcp_write+0x75a>
80207c4: 68fb ldr r3, [r7, #12]
80207c6: 6edb ldr r3, [r3, #108] @ 0x6c
80207c8: 2b00 cmp r3, #0
80207ca: d106 bne.n 80207da <tcp_write+0x75a>
80207cc: 4b06 ldr r3, [pc, #24] @ (80207e8 <tcp_write+0x768>)
80207ce: f240 3227 movw r2, #807 @ 0x327
80207d2: 490a ldr r1, [pc, #40] @ (80207fc <tcp_write+0x77c>)
80207d4: 4806 ldr r0, [pc, #24] @ (80207f0 <tcp_write+0x770>)
80207d6: f00a f929 bl 802aa2c <iprintf>
pcb->unsent != NULL);
}
LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_write: %"S16_F" (with mem err)\n", pcb->snd_queuelen));
return ERR_MEM;
80207da: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
80207de: 4618 mov r0, r3
80207e0: 3764 adds r7, #100 @ 0x64
80207e2: 46bd mov sp, r7
80207e4: bd90 pop {r4, r7, pc}
80207e6: bf00 nop
80207e8: 080303d8 .word 0x080303d8
80207ec: 0803070c .word 0x0803070c
80207f0: 0803042c .word 0x0803042c
80207f4: 08030738 .word 0x08030738
80207f8: 08030770 .word 0x08030770
80207fc: 080307a8 .word 0x080307a8
08020800 <tcp_split_unsent_seg>:
* @param pcb the tcp_pcb for which to split the unsent head
* @param split the amount of payload to remain in the head
*/
err_t
tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split)
{
8020800: b590 push {r4, r7, lr}
8020802: b08b sub sp, #44 @ 0x2c
8020804: af02 add r7, sp, #8
8020806: 6078 str r0, [r7, #4]
8020808: 460b mov r3, r1
802080a: 807b strh r3, [r7, #2]
struct tcp_seg *seg = NULL, *useg = NULL;
802080c: 2300 movs r3, #0
802080e: 61bb str r3, [r7, #24]
8020810: 2300 movs r3, #0
8020812: 617b str r3, [r7, #20]
struct pbuf *p = NULL;
8020814: 2300 movs r3, #0
8020816: 613b str r3, [r7, #16]
u16_t chksum = 0;
u8_t chksum_swapped = 0;
struct pbuf *q;
#endif /* TCP_CHECKSUM_ON_COPY */
LWIP_ASSERT("tcp_split_unsent_seg: invalid pcb", pcb != NULL);
8020818: 687b ldr r3, [r7, #4]
802081a: 2b00 cmp r3, #0
802081c: d106 bne.n 802082c <tcp_split_unsent_seg+0x2c>
802081e: 4b97 ldr r3, [pc, #604] @ (8020a7c <tcp_split_unsent_seg+0x27c>)
8020820: f240 324b movw r2, #843 @ 0x34b
8020824: 4996 ldr r1, [pc, #600] @ (8020a80 <tcp_split_unsent_seg+0x280>)
8020826: 4897 ldr r0, [pc, #604] @ (8020a84 <tcp_split_unsent_seg+0x284>)
8020828: f00a f900 bl 802aa2c <iprintf>
useg = pcb->unsent;
802082c: 687b ldr r3, [r7, #4]
802082e: 6edb ldr r3, [r3, #108] @ 0x6c
8020830: 617b str r3, [r7, #20]
if (useg == NULL) {
8020832: 697b ldr r3, [r7, #20]
8020834: 2b00 cmp r3, #0
8020836: d102 bne.n 802083e <tcp_split_unsent_seg+0x3e>
return ERR_MEM;
8020838: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802083c: e119 b.n 8020a72 <tcp_split_unsent_seg+0x272>
}
if (split == 0) {
802083e: 887b ldrh r3, [r7, #2]
8020840: 2b00 cmp r3, #0
8020842: d109 bne.n 8020858 <tcp_split_unsent_seg+0x58>
LWIP_ASSERT("Can't split segment into length 0", 0);
8020844: 4b8d ldr r3, [pc, #564] @ (8020a7c <tcp_split_unsent_seg+0x27c>)
8020846: f240 3253 movw r2, #851 @ 0x353
802084a: 498f ldr r1, [pc, #572] @ (8020a88 <tcp_split_unsent_seg+0x288>)
802084c: 488d ldr r0, [pc, #564] @ (8020a84 <tcp_split_unsent_seg+0x284>)
802084e: f00a f8ed bl 802aa2c <iprintf>
return ERR_VAL;
8020852: f06f 0305 mvn.w r3, #5
8020856: e10c b.n 8020a72 <tcp_split_unsent_seg+0x272>
}
if (useg->len <= split) {
8020858: 697b ldr r3, [r7, #20]
802085a: 891b ldrh r3, [r3, #8]
802085c: 887a ldrh r2, [r7, #2]
802085e: 429a cmp r2, r3
8020860: d301 bcc.n 8020866 <tcp_split_unsent_seg+0x66>
return ERR_OK;
8020862: 2300 movs r3, #0
8020864: e105 b.n 8020a72 <tcp_split_unsent_seg+0x272>
}
LWIP_ASSERT("split <= mss", split <= pcb->mss);
8020866: 687b ldr r3, [r7, #4]
8020868: 8e5b ldrh r3, [r3, #50] @ 0x32
802086a: 887a ldrh r2, [r7, #2]
802086c: 429a cmp r2, r3
802086e: d906 bls.n 802087e <tcp_split_unsent_seg+0x7e>
8020870: 4b82 ldr r3, [pc, #520] @ (8020a7c <tcp_split_unsent_seg+0x27c>)
8020872: f240 325b movw r2, #859 @ 0x35b
8020876: 4985 ldr r1, [pc, #532] @ (8020a8c <tcp_split_unsent_seg+0x28c>)
8020878: 4882 ldr r0, [pc, #520] @ (8020a84 <tcp_split_unsent_seg+0x284>)
802087a: f00a f8d7 bl 802aa2c <iprintf>
LWIP_ASSERT("useg->len > 0", useg->len > 0);
802087e: 697b ldr r3, [r7, #20]
8020880: 891b ldrh r3, [r3, #8]
8020882: 2b00 cmp r3, #0
8020884: d106 bne.n 8020894 <tcp_split_unsent_seg+0x94>
8020886: 4b7d ldr r3, [pc, #500] @ (8020a7c <tcp_split_unsent_seg+0x27c>)
8020888: f44f 7257 mov.w r2, #860 @ 0x35c
802088c: 4980 ldr r1, [pc, #512] @ (8020a90 <tcp_split_unsent_seg+0x290>)
802088e: 487d ldr r0, [pc, #500] @ (8020a84 <tcp_split_unsent_seg+0x284>)
8020890: f00a f8cc bl 802aa2c <iprintf>
* to split this packet so we may actually exceed the max value by
* one!
*/
LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: split_unsent_seg: %u\n", (unsigned int)pcb->snd_queuelen));
optflags = useg->flags;
8020894: 697b ldr r3, [r7, #20]
8020896: 7b1b ldrb r3, [r3, #12]
8020898: 73fb strb r3, [r7, #15]
#if TCP_CHECKSUM_ON_COPY
/* Remove since checksum is not stored until after tcp_create_segment() */
optflags &= ~TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */
optlen = LWIP_TCP_OPT_LENGTH(optflags);
802089a: 7bfb ldrb r3, [r7, #15]
802089c: 009b lsls r3, r3, #2
802089e: b2db uxtb r3, r3
80208a0: f003 0304 and.w r3, r3, #4
80208a4: 73bb strb r3, [r7, #14]
remainder = useg->len - split;
80208a6: 697b ldr r3, [r7, #20]
80208a8: 891a ldrh r2, [r3, #8]
80208aa: 887b ldrh r3, [r7, #2]
80208ac: 1ad3 subs r3, r2, r3
80208ae: 81bb strh r3, [r7, #12]
/* Create new pbuf for the remainder of the split */
p = pbuf_alloc(PBUF_TRANSPORT, remainder + optlen, PBUF_RAM);
80208b0: 7bbb ldrb r3, [r7, #14]
80208b2: b29a uxth r2, r3
80208b4: 89bb ldrh r3, [r7, #12]
80208b6: 4413 add r3, r2
80208b8: b29b uxth r3, r3
80208ba: f44f 7220 mov.w r2, #640 @ 0x280
80208be: 4619 mov r1, r3
80208c0: 2036 movs r0, #54 @ 0x36
80208c2: f7fa fb25 bl 801af10 <pbuf_alloc>
80208c6: 6138 str r0, [r7, #16]
if (p == NULL) {
80208c8: 693b ldr r3, [r7, #16]
80208ca: 2b00 cmp r3, #0
80208cc: f000 80ba beq.w 8020a44 <tcp_split_unsent_seg+0x244>
("tcp_split_unsent_seg: could not allocate memory for pbuf remainder %u\n", remainder));
goto memerr;
}
/* Offset into the original pbuf is past TCP/IP headers, options, and split amount */
offset = useg->p->tot_len - useg->len + split;
80208d0: 697b ldr r3, [r7, #20]
80208d2: 685b ldr r3, [r3, #4]
80208d4: 891a ldrh r2, [r3, #8]
80208d6: 697b ldr r3, [r7, #20]
80208d8: 891b ldrh r3, [r3, #8]
80208da: 1ad3 subs r3, r2, r3
80208dc: b29a uxth r2, r3
80208de: 887b ldrh r3, [r7, #2]
80208e0: 4413 add r3, r2
80208e2: 817b strh r3, [r7, #10]
/* Copy remainder into new pbuf, headers and options will not be filled out */
if (pbuf_copy_partial(useg->p, (u8_t *)p->payload + optlen, remainder, offset ) != remainder) {
80208e4: 697b ldr r3, [r7, #20]
80208e6: 6858 ldr r0, [r3, #4]
80208e8: 693b ldr r3, [r7, #16]
80208ea: 685a ldr r2, [r3, #4]
80208ec: 7bbb ldrb r3, [r7, #14]
80208ee: 18d1 adds r1, r2, r3
80208f0: 897b ldrh r3, [r7, #10]
80208f2: 89ba ldrh r2, [r7, #12]
80208f4: f7fb f828 bl 801b948 <pbuf_copy_partial>
80208f8: 4603 mov r3, r0
80208fa: 461a mov r2, r3
80208fc: 89bb ldrh r3, [r7, #12]
80208fe: 4293 cmp r3, r2
8020900: f040 80a2 bne.w 8020a48 <tcp_split_unsent_seg+0x248>
#endif /* TCP_CHECKSUM_ON_COPY */
/* Options are created when calling tcp_output() */
/* Migrate flags from original segment */
split_flags = TCPH_FLAGS(useg->tcphdr);
8020904: 697b ldr r3, [r7, #20]
8020906: 691b ldr r3, [r3, #16]
8020908: 899b ldrh r3, [r3, #12]
802090a: b29b uxth r3, r3
802090c: 4618 mov r0, r3
802090e: f7f9 f933 bl 8019b78 <lwip_htons>
8020912: 4603 mov r3, r0
8020914: b2db uxtb r3, r3
8020916: f003 033f and.w r3, r3, #63 @ 0x3f
802091a: 77fb strb r3, [r7, #31]
remainder_flags = 0; /* ACK added in tcp_output() */
802091c: 2300 movs r3, #0
802091e: 77bb strb r3, [r7, #30]
if (split_flags & TCP_PSH) {
8020920: 7ffb ldrb r3, [r7, #31]
8020922: f003 0308 and.w r3, r3, #8
8020926: 2b00 cmp r3, #0
8020928: d007 beq.n 802093a <tcp_split_unsent_seg+0x13a>
split_flags &= ~TCP_PSH;
802092a: 7ffb ldrb r3, [r7, #31]
802092c: f023 0308 bic.w r3, r3, #8
8020930: 77fb strb r3, [r7, #31]
remainder_flags |= TCP_PSH;
8020932: 7fbb ldrb r3, [r7, #30]
8020934: f043 0308 orr.w r3, r3, #8
8020938: 77bb strb r3, [r7, #30]
}
if (split_flags & TCP_FIN) {
802093a: 7ffb ldrb r3, [r7, #31]
802093c: f003 0301 and.w r3, r3, #1
8020940: 2b00 cmp r3, #0
8020942: d007 beq.n 8020954 <tcp_split_unsent_seg+0x154>
split_flags &= ~TCP_FIN;
8020944: 7ffb ldrb r3, [r7, #31]
8020946: f023 0301 bic.w r3, r3, #1
802094a: 77fb strb r3, [r7, #31]
remainder_flags |= TCP_FIN;
802094c: 7fbb ldrb r3, [r7, #30]
802094e: f043 0301 orr.w r3, r3, #1
8020952: 77bb strb r3, [r7, #30]
}
/* SYN should be left on split, RST should not be present with data */
seg = tcp_create_segment(pcb, p, remainder_flags, lwip_ntohl(useg->tcphdr->seqno) + split, optflags);
8020954: 697b ldr r3, [r7, #20]
8020956: 691b ldr r3, [r3, #16]
8020958: 685b ldr r3, [r3, #4]
802095a: 4618 mov r0, r3
802095c: f7f9 f921 bl 8019ba2 <lwip_htonl>
8020960: 4602 mov r2, r0
8020962: 887b ldrh r3, [r7, #2]
8020964: 18d1 adds r1, r2, r3
8020966: 7fba ldrb r2, [r7, #30]
8020968: 7bfb ldrb r3, [r7, #15]
802096a: 9300 str r3, [sp, #0]
802096c: 460b mov r3, r1
802096e: 6939 ldr r1, [r7, #16]
8020970: 6878 ldr r0, [r7, #4]
8020972: f7ff f9f1 bl 801fd58 <tcp_create_segment>
8020976: 61b8 str r0, [r7, #24]
if (seg == NULL) {
8020978: 69bb ldr r3, [r7, #24]
802097a: 2b00 cmp r3, #0
802097c: d066 beq.n 8020a4c <tcp_split_unsent_seg+0x24c>
seg->chksum_swapped = chksum_swapped;
seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */
/* Remove this segment from the queue since trimming it may free pbufs */
pcb->snd_queuelen -= pbuf_clen(useg->p);
802097e: 697b ldr r3, [r7, #20]
8020980: 685b ldr r3, [r3, #4]
8020982: 4618 mov r0, r3
8020984: f7fa fe68 bl 801b658 <pbuf_clen>
8020988: 4603 mov r3, r0
802098a: 461a mov r2, r3
802098c: 687b ldr r3, [r7, #4]
802098e: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
8020992: 1a9b subs r3, r3, r2
8020994: b29a uxth r2, r3
8020996: 687b ldr r3, [r7, #4]
8020998: f8a3 2066 strh.w r2, [r3, #102] @ 0x66
/* Trim the original pbuf into our split size. At this point our remainder segment must be setup
successfully because we are modifying the original segment */
pbuf_realloc(useg->p, useg->p->tot_len - remainder);
802099c: 697b ldr r3, [r7, #20]
802099e: 6858 ldr r0, [r3, #4]
80209a0: 697b ldr r3, [r7, #20]
80209a2: 685b ldr r3, [r3, #4]
80209a4: 891a ldrh r2, [r3, #8]
80209a6: 89bb ldrh r3, [r7, #12]
80209a8: 1ad3 subs r3, r2, r3
80209aa: b29b uxth r3, r3
80209ac: 4619 mov r1, r3
80209ae: f7fa fc0f bl 801b1d0 <pbuf_realloc>
useg->len -= remainder;
80209b2: 697b ldr r3, [r7, #20]
80209b4: 891a ldrh r2, [r3, #8]
80209b6: 89bb ldrh r3, [r7, #12]
80209b8: 1ad3 subs r3, r2, r3
80209ba: b29a uxth r2, r3
80209bc: 697b ldr r3, [r7, #20]
80209be: 811a strh r2, [r3, #8]
TCPH_SET_FLAG(useg->tcphdr, split_flags);
80209c0: 697b ldr r3, [r7, #20]
80209c2: 691b ldr r3, [r3, #16]
80209c4: 899b ldrh r3, [r3, #12]
80209c6: b29c uxth r4, r3
80209c8: 7ffb ldrb r3, [r7, #31]
80209ca: b29b uxth r3, r3
80209cc: 4618 mov r0, r3
80209ce: f7f9 f8d3 bl 8019b78 <lwip_htons>
80209d2: 4603 mov r3, r0
80209d4: 461a mov r2, r3
80209d6: 697b ldr r3, [r7, #20]
80209d8: 691b ldr r3, [r3, #16]
80209da: 4322 orrs r2, r4
80209dc: b292 uxth r2, r2
80209de: 819a strh r2, [r3, #12]
#if TCP_OVERSIZE_DBGCHECK
/* By trimming, realloc may have actually shrunk the pbuf, so clear oversize_left */
useg->oversize_left = 0;
80209e0: 697b ldr r3, [r7, #20]
80209e2: 2200 movs r2, #0
80209e4: 815a strh r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
/* Add back to the queue with new trimmed pbuf */
pcb->snd_queuelen += pbuf_clen(useg->p);
80209e6: 697b ldr r3, [r7, #20]
80209e8: 685b ldr r3, [r3, #4]
80209ea: 4618 mov r0, r3
80209ec: f7fa fe34 bl 801b658 <pbuf_clen>
80209f0: 4603 mov r3, r0
80209f2: 461a mov r2, r3
80209f4: 687b ldr r3, [r7, #4]
80209f6: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
80209fa: 4413 add r3, r2
80209fc: b29a uxth r2, r3
80209fe: 687b ldr r3, [r7, #4]
8020a00: f8a3 2066 strh.w r2, [r3, #102] @ 0x66
#endif /* TCP_CHECKSUM_ON_COPY */
/* Update number of segments on the queues. Note that length now may
* exceed TCP_SND_QUEUELEN! We don't have to touch pcb->snd_buf
* because the total amount of data is constant when packet is split */
pcb->snd_queuelen += pbuf_clen(seg->p);
8020a04: 69bb ldr r3, [r7, #24]
8020a06: 685b ldr r3, [r3, #4]
8020a08: 4618 mov r0, r3
8020a0a: f7fa fe25 bl 801b658 <pbuf_clen>
8020a0e: 4603 mov r3, r0
8020a10: 461a mov r2, r3
8020a12: 687b ldr r3, [r7, #4]
8020a14: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
8020a18: 4413 add r3, r2
8020a1a: b29a uxth r2, r3
8020a1c: 687b ldr r3, [r7, #4]
8020a1e: f8a3 2066 strh.w r2, [r3, #102] @ 0x66
/* Finally insert remainder into queue after split (which stays head) */
seg->next = useg->next;
8020a22: 697b ldr r3, [r7, #20]
8020a24: 681a ldr r2, [r3, #0]
8020a26: 69bb ldr r3, [r7, #24]
8020a28: 601a str r2, [r3, #0]
useg->next = seg;
8020a2a: 697b ldr r3, [r7, #20]
8020a2c: 69ba ldr r2, [r7, #24]
8020a2e: 601a str r2, [r3, #0]
#if TCP_OVERSIZE
/* If remainder is last segment on the unsent, ensure we clear the oversize amount
* because the remainder is always sized to the exact remaining amount */
if (seg->next == NULL) {
8020a30: 69bb ldr r3, [r7, #24]
8020a32: 681b ldr r3, [r3, #0]
8020a34: 2b00 cmp r3, #0
8020a36: d103 bne.n 8020a40 <tcp_split_unsent_seg+0x240>
pcb->unsent_oversize = 0;
8020a38: 687b ldr r3, [r7, #4]
8020a3a: 2200 movs r2, #0
8020a3c: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
}
#endif /* TCP_OVERSIZE */
return ERR_OK;
8020a40: 2300 movs r3, #0
8020a42: e016 b.n 8020a72 <tcp_split_unsent_seg+0x272>
goto memerr;
8020a44: bf00 nop
8020a46: e002 b.n 8020a4e <tcp_split_unsent_seg+0x24e>
goto memerr;
8020a48: bf00 nop
8020a4a: e000 b.n 8020a4e <tcp_split_unsent_seg+0x24e>
goto memerr;
8020a4c: bf00 nop
memerr:
TCP_STATS_INC(tcp.memerr);
LWIP_ASSERT("seg == NULL", seg == NULL);
8020a4e: 69bb ldr r3, [r7, #24]
8020a50: 2b00 cmp r3, #0
8020a52: d006 beq.n 8020a62 <tcp_split_unsent_seg+0x262>
8020a54: 4b09 ldr r3, [pc, #36] @ (8020a7c <tcp_split_unsent_seg+0x27c>)
8020a56: f44f 7276 mov.w r2, #984 @ 0x3d8
8020a5a: 490e ldr r1, [pc, #56] @ (8020a94 <tcp_split_unsent_seg+0x294>)
8020a5c: 4809 ldr r0, [pc, #36] @ (8020a84 <tcp_split_unsent_seg+0x284>)
8020a5e: f009 ffe5 bl 802aa2c <iprintf>
if (p != NULL) {
8020a62: 693b ldr r3, [r7, #16]
8020a64: 2b00 cmp r3, #0
8020a66: d002 beq.n 8020a6e <tcp_split_unsent_seg+0x26e>
pbuf_free(p);
8020a68: 6938 ldr r0, [r7, #16]
8020a6a: f7fa fd67 bl 801b53c <pbuf_free>
}
return ERR_MEM;
8020a6e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
8020a72: 4618 mov r0, r3
8020a74: 3724 adds r7, #36 @ 0x24
8020a76: 46bd mov sp, r7
8020a78: bd90 pop {r4, r7, pc}
8020a7a: bf00 nop
8020a7c: 080303d8 .word 0x080303d8
8020a80: 080307c8 .word 0x080307c8
8020a84: 0803042c .word 0x0803042c
8020a88: 080307ec .word 0x080307ec
8020a8c: 08030810 .word 0x08030810
8020a90: 08030820 .word 0x08030820
8020a94: 08030830 .word 0x08030830
08020a98 <tcp_send_fin>:
* @param pcb the tcp_pcb over which to send a segment
* @return ERR_OK if sent, another err_t otherwise
*/
err_t
tcp_send_fin(struct tcp_pcb *pcb)
{
8020a98: b590 push {r4, r7, lr}
8020a9a: b085 sub sp, #20
8020a9c: af00 add r7, sp, #0
8020a9e: 6078 str r0, [r7, #4]
LWIP_ASSERT("tcp_send_fin: invalid pcb", pcb != NULL);
8020aa0: 687b ldr r3, [r7, #4]
8020aa2: 2b00 cmp r3, #0
8020aa4: d106 bne.n 8020ab4 <tcp_send_fin+0x1c>
8020aa6: 4b21 ldr r3, [pc, #132] @ (8020b2c <tcp_send_fin+0x94>)
8020aa8: f240 32eb movw r2, #1003 @ 0x3eb
8020aac: 4920 ldr r1, [pc, #128] @ (8020b30 <tcp_send_fin+0x98>)
8020aae: 4821 ldr r0, [pc, #132] @ (8020b34 <tcp_send_fin+0x9c>)
8020ab0: f009 ffbc bl 802aa2c <iprintf>
/* first, try to add the fin to the last unsent segment */
if (pcb->unsent != NULL) {
8020ab4: 687b ldr r3, [r7, #4]
8020ab6: 6edb ldr r3, [r3, #108] @ 0x6c
8020ab8: 2b00 cmp r3, #0
8020aba: d02e beq.n 8020b1a <tcp_send_fin+0x82>
struct tcp_seg *last_unsent;
for (last_unsent = pcb->unsent; last_unsent->next != NULL;
8020abc: 687b ldr r3, [r7, #4]
8020abe: 6edb ldr r3, [r3, #108] @ 0x6c
8020ac0: 60fb str r3, [r7, #12]
8020ac2: e002 b.n 8020aca <tcp_send_fin+0x32>
last_unsent = last_unsent->next);
8020ac4: 68fb ldr r3, [r7, #12]
8020ac6: 681b ldr r3, [r3, #0]
8020ac8: 60fb str r3, [r7, #12]
for (last_unsent = pcb->unsent; last_unsent->next != NULL;
8020aca: 68fb ldr r3, [r7, #12]
8020acc: 681b ldr r3, [r3, #0]
8020ace: 2b00 cmp r3, #0
8020ad0: d1f8 bne.n 8020ac4 <tcp_send_fin+0x2c>
if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) {
8020ad2: 68fb ldr r3, [r7, #12]
8020ad4: 691b ldr r3, [r3, #16]
8020ad6: 899b ldrh r3, [r3, #12]
8020ad8: b29b uxth r3, r3
8020ada: 4618 mov r0, r3
8020adc: f7f9 f84c bl 8019b78 <lwip_htons>
8020ae0: 4603 mov r3, r0
8020ae2: b2db uxtb r3, r3
8020ae4: f003 0307 and.w r3, r3, #7
8020ae8: 2b00 cmp r3, #0
8020aea: d116 bne.n 8020b1a <tcp_send_fin+0x82>
/* no SYN/FIN/RST flag in the header, we can add the FIN flag */
TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN);
8020aec: 68fb ldr r3, [r7, #12]
8020aee: 691b ldr r3, [r3, #16]
8020af0: 899b ldrh r3, [r3, #12]
8020af2: b29c uxth r4, r3
8020af4: 2001 movs r0, #1
8020af6: f7f9 f83f bl 8019b78 <lwip_htons>
8020afa: 4603 mov r3, r0
8020afc: 461a mov r2, r3
8020afe: 68fb ldr r3, [r7, #12]
8020b00: 691b ldr r3, [r3, #16]
8020b02: 4322 orrs r2, r4
8020b04: b292 uxth r2, r2
8020b06: 819a strh r2, [r3, #12]
tcp_set_flags(pcb, TF_FIN);
8020b08: 687b ldr r3, [r7, #4]
8020b0a: 8b5b ldrh r3, [r3, #26]
8020b0c: f043 0320 orr.w r3, r3, #32
8020b10: b29a uxth r2, r3
8020b12: 687b ldr r3, [r7, #4]
8020b14: 835a strh r2, [r3, #26]
return ERR_OK;
8020b16: 2300 movs r3, #0
8020b18: e004 b.n 8020b24 <tcp_send_fin+0x8c>
}
}
/* no data, no length, flags, copy=1, no optdata */
return tcp_enqueue_flags(pcb, TCP_FIN);
8020b1a: 2101 movs r1, #1
8020b1c: 6878 ldr r0, [r7, #4]
8020b1e: f000 f80b bl 8020b38 <tcp_enqueue_flags>
8020b22: 4603 mov r3, r0
}
8020b24: 4618 mov r0, r3
8020b26: 3714 adds r7, #20
8020b28: 46bd mov sp, r7
8020b2a: bd90 pop {r4, r7, pc}
8020b2c: 080303d8 .word 0x080303d8
8020b30: 0803083c .word 0x0803083c
8020b34: 0803042c .word 0x0803042c
08020b38 <tcp_enqueue_flags>:
* @param pcb Protocol control block for the TCP connection.
* @param flags TCP header flags to set in the outgoing segment.
*/
err_t
tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags)
{
8020b38: b580 push {r7, lr}
8020b3a: b088 sub sp, #32
8020b3c: af02 add r7, sp, #8
8020b3e: 6078 str r0, [r7, #4]
8020b40: 460b mov r3, r1
8020b42: 70fb strb r3, [r7, #3]
struct pbuf *p;
struct tcp_seg *seg;
u8_t optflags = 0;
8020b44: 2300 movs r3, #0
8020b46: 75fb strb r3, [r7, #23]
u8_t optlen = 0;
8020b48: 2300 movs r3, #0
8020b4a: 75bb strb r3, [r7, #22]
LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen));
LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)",
8020b4c: 78fb ldrb r3, [r7, #3]
8020b4e: f003 0303 and.w r3, r3, #3
8020b52: 2b00 cmp r3, #0
8020b54: d106 bne.n 8020b64 <tcp_enqueue_flags+0x2c>
8020b56: 4b67 ldr r3, [pc, #412] @ (8020cf4 <tcp_enqueue_flags+0x1bc>)
8020b58: f240 4211 movw r2, #1041 @ 0x411
8020b5c: 4966 ldr r1, [pc, #408] @ (8020cf8 <tcp_enqueue_flags+0x1c0>)
8020b5e: 4867 ldr r0, [pc, #412] @ (8020cfc <tcp_enqueue_flags+0x1c4>)
8020b60: f009 ff64 bl 802aa2c <iprintf>
(flags & (TCP_SYN | TCP_FIN)) != 0);
LWIP_ASSERT("tcp_enqueue_flags: invalid pcb", pcb != NULL);
8020b64: 687b ldr r3, [r7, #4]
8020b66: 2b00 cmp r3, #0
8020b68: d106 bne.n 8020b78 <tcp_enqueue_flags+0x40>
8020b6a: 4b62 ldr r3, [pc, #392] @ (8020cf4 <tcp_enqueue_flags+0x1bc>)
8020b6c: f240 4213 movw r2, #1043 @ 0x413
8020b70: 4963 ldr r1, [pc, #396] @ (8020d00 <tcp_enqueue_flags+0x1c8>)
8020b72: 4862 ldr r0, [pc, #392] @ (8020cfc <tcp_enqueue_flags+0x1c4>)
8020b74: f009 ff5a bl 802aa2c <iprintf>
/* No need to check pcb->snd_queuelen if only SYN or FIN are allowed! */
/* Get options for this segment. This is a special case since this is the
only place where a SYN can be sent. */
if (flags & TCP_SYN) {
8020b78: 78fb ldrb r3, [r7, #3]
8020b7a: f003 0302 and.w r3, r3, #2
8020b7e: 2b00 cmp r3, #0
8020b80: d001 beq.n 8020b86 <tcp_enqueue_flags+0x4e>
optflags = TF_SEG_OPTS_MSS;
8020b82: 2301 movs r3, #1
8020b84: 75fb strb r3, [r7, #23]
/* Make sure the timestamp option is only included in data segments if we
agreed about it with the remote host (and in active open SYN segments). */
optflags |= TF_SEG_OPTS_TS;
}
#endif /* LWIP_TCP_TIMESTAMPS */
optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
8020b86: 7dfb ldrb r3, [r7, #23]
8020b88: 009b lsls r3, r3, #2
8020b8a: b2db uxtb r3, r3
8020b8c: f003 0304 and.w r3, r3, #4
8020b90: 75bb strb r3, [r7, #22]
/* Allocate pbuf with room for TCP header + options */
if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
8020b92: 7dbb ldrb r3, [r7, #22]
8020b94: b29b uxth r3, r3
8020b96: f44f 7220 mov.w r2, #640 @ 0x280
8020b9a: 4619 mov r1, r3
8020b9c: 2036 movs r0, #54 @ 0x36
8020b9e: f7fa f9b7 bl 801af10 <pbuf_alloc>
8020ba2: 60f8 str r0, [r7, #12]
8020ba4: 68fb ldr r3, [r7, #12]
8020ba6: 2b00 cmp r3, #0
8020ba8: d109 bne.n 8020bbe <tcp_enqueue_flags+0x86>
tcp_set_flags(pcb, TF_NAGLEMEMERR);
8020baa: 687b ldr r3, [r7, #4]
8020bac: 8b5b ldrh r3, [r3, #26]
8020bae: f043 0380 orr.w r3, r3, #128 @ 0x80
8020bb2: b29a uxth r2, r3
8020bb4: 687b ldr r3, [r7, #4]
8020bb6: 835a strh r2, [r3, #26]
TCP_STATS_INC(tcp.memerr);
return ERR_MEM;
8020bb8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8020bbc: e095 b.n 8020cea <tcp_enqueue_flags+0x1b2>
}
LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen",
8020bbe: 68fb ldr r3, [r7, #12]
8020bc0: 895a ldrh r2, [r3, #10]
8020bc2: 7dbb ldrb r3, [r7, #22]
8020bc4: b29b uxth r3, r3
8020bc6: 429a cmp r2, r3
8020bc8: d206 bcs.n 8020bd8 <tcp_enqueue_flags+0xa0>
8020bca: 4b4a ldr r3, [pc, #296] @ (8020cf4 <tcp_enqueue_flags+0x1bc>)
8020bcc: f240 4239 movw r2, #1081 @ 0x439
8020bd0: 494c ldr r1, [pc, #304] @ (8020d04 <tcp_enqueue_flags+0x1cc>)
8020bd2: 484a ldr r0, [pc, #296] @ (8020cfc <tcp_enqueue_flags+0x1c4>)
8020bd4: f009 ff2a bl 802aa2c <iprintf>
(p->len >= optlen));
/* Allocate memory for tcp_seg, and fill in fields. */
if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) {
8020bd8: 687b ldr r3, [r7, #4]
8020bda: 6dd9 ldr r1, [r3, #92] @ 0x5c
8020bdc: 78fa ldrb r2, [r7, #3]
8020bde: 7dfb ldrb r3, [r7, #23]
8020be0: 9300 str r3, [sp, #0]
8020be2: 460b mov r3, r1
8020be4: 68f9 ldr r1, [r7, #12]
8020be6: 6878 ldr r0, [r7, #4]
8020be8: f7ff f8b6 bl 801fd58 <tcp_create_segment>
8020bec: 60b8 str r0, [r7, #8]
8020bee: 68bb ldr r3, [r7, #8]
8020bf0: 2b00 cmp r3, #0
8020bf2: d109 bne.n 8020c08 <tcp_enqueue_flags+0xd0>
tcp_set_flags(pcb, TF_NAGLEMEMERR);
8020bf4: 687b ldr r3, [r7, #4]
8020bf6: 8b5b ldrh r3, [r3, #26]
8020bf8: f043 0380 orr.w r3, r3, #128 @ 0x80
8020bfc: b29a uxth r2, r3
8020bfe: 687b ldr r3, [r7, #4]
8020c00: 835a strh r2, [r3, #26]
TCP_STATS_INC(tcp.memerr);
return ERR_MEM;
8020c02: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8020c06: e070 b.n 8020cea <tcp_enqueue_flags+0x1b2>
}
LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % LWIP_MIN(MEM_ALIGNMENT, 4)) == 0);
8020c08: 68bb ldr r3, [r7, #8]
8020c0a: 691b ldr r3, [r3, #16]
8020c0c: f003 0303 and.w r3, r3, #3
8020c10: 2b00 cmp r3, #0
8020c12: d006 beq.n 8020c22 <tcp_enqueue_flags+0xea>
8020c14: 4b37 ldr r3, [pc, #220] @ (8020cf4 <tcp_enqueue_flags+0x1bc>)
8020c16: f240 4242 movw r2, #1090 @ 0x442
8020c1a: 493b ldr r1, [pc, #236] @ (8020d08 <tcp_enqueue_flags+0x1d0>)
8020c1c: 4837 ldr r0, [pc, #220] @ (8020cfc <tcp_enqueue_flags+0x1c4>)
8020c1e: f009 ff05 bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0);
8020c22: 68bb ldr r3, [r7, #8]
8020c24: 891b ldrh r3, [r3, #8]
8020c26: 2b00 cmp r3, #0
8020c28: d006 beq.n 8020c38 <tcp_enqueue_flags+0x100>
8020c2a: 4b32 ldr r3, [pc, #200] @ (8020cf4 <tcp_enqueue_flags+0x1bc>)
8020c2c: f240 4243 movw r2, #1091 @ 0x443
8020c30: 4936 ldr r1, [pc, #216] @ (8020d0c <tcp_enqueue_flags+0x1d4>)
8020c32: 4832 ldr r0, [pc, #200] @ (8020cfc <tcp_enqueue_flags+0x1c4>)
8020c34: f009 fefa bl 802aa2c <iprintf>
lwip_ntohl(seg->tcphdr->seqno),
lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg),
(u16_t)flags));
/* Now append seg to pcb->unsent queue */
if (pcb->unsent == NULL) {
8020c38: 687b ldr r3, [r7, #4]
8020c3a: 6edb ldr r3, [r3, #108] @ 0x6c
8020c3c: 2b00 cmp r3, #0
8020c3e: d103 bne.n 8020c48 <tcp_enqueue_flags+0x110>
pcb->unsent = seg;
8020c40: 687b ldr r3, [r7, #4]
8020c42: 68ba ldr r2, [r7, #8]
8020c44: 66da str r2, [r3, #108] @ 0x6c
8020c46: e00d b.n 8020c64 <tcp_enqueue_flags+0x12c>
} else {
struct tcp_seg *useg;
for (useg = pcb->unsent; useg->next != NULL; useg = useg->next);
8020c48: 687b ldr r3, [r7, #4]
8020c4a: 6edb ldr r3, [r3, #108] @ 0x6c
8020c4c: 613b str r3, [r7, #16]
8020c4e: e002 b.n 8020c56 <tcp_enqueue_flags+0x11e>
8020c50: 693b ldr r3, [r7, #16]
8020c52: 681b ldr r3, [r3, #0]
8020c54: 613b str r3, [r7, #16]
8020c56: 693b ldr r3, [r7, #16]
8020c58: 681b ldr r3, [r3, #0]
8020c5a: 2b00 cmp r3, #0
8020c5c: d1f8 bne.n 8020c50 <tcp_enqueue_flags+0x118>
useg->next = seg;
8020c5e: 693b ldr r3, [r7, #16]
8020c60: 68ba ldr r2, [r7, #8]
8020c62: 601a str r2, [r3, #0]
}
#if TCP_OVERSIZE
/* The new unsent tail has no space */
pcb->unsent_oversize = 0;
8020c64: 687b ldr r3, [r7, #4]
8020c66: 2200 movs r2, #0
8020c68: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
#endif /* TCP_OVERSIZE */
/* SYN and FIN bump the sequence number */
if ((flags & TCP_SYN) || (flags & TCP_FIN)) {
8020c6c: 78fb ldrb r3, [r7, #3]
8020c6e: f003 0302 and.w r3, r3, #2
8020c72: 2b00 cmp r3, #0
8020c74: d104 bne.n 8020c80 <tcp_enqueue_flags+0x148>
8020c76: 78fb ldrb r3, [r7, #3]
8020c78: f003 0301 and.w r3, r3, #1
8020c7c: 2b00 cmp r3, #0
8020c7e: d004 beq.n 8020c8a <tcp_enqueue_flags+0x152>
pcb->snd_lbb++;
8020c80: 687b ldr r3, [r7, #4]
8020c82: 6ddb ldr r3, [r3, #92] @ 0x5c
8020c84: 1c5a adds r2, r3, #1
8020c86: 687b ldr r3, [r7, #4]
8020c88: 65da str r2, [r3, #92] @ 0x5c
/* optlen does not influence snd_buf */
}
if (flags & TCP_FIN) {
8020c8a: 78fb ldrb r3, [r7, #3]
8020c8c: f003 0301 and.w r3, r3, #1
8020c90: 2b00 cmp r3, #0
8020c92: d006 beq.n 8020ca2 <tcp_enqueue_flags+0x16a>
tcp_set_flags(pcb, TF_FIN);
8020c94: 687b ldr r3, [r7, #4]
8020c96: 8b5b ldrh r3, [r3, #26]
8020c98: f043 0320 orr.w r3, r3, #32
8020c9c: b29a uxth r2, r3
8020c9e: 687b ldr r3, [r7, #4]
8020ca0: 835a strh r2, [r3, #26]
}
/* update number of segments on the queues */
pcb->snd_queuelen += pbuf_clen(seg->p);
8020ca2: 68bb ldr r3, [r7, #8]
8020ca4: 685b ldr r3, [r3, #4]
8020ca6: 4618 mov r0, r3
8020ca8: f7fa fcd6 bl 801b658 <pbuf_clen>
8020cac: 4603 mov r3, r0
8020cae: 461a mov r2, r3
8020cb0: 687b ldr r3, [r7, #4]
8020cb2: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
8020cb6: 4413 add r3, r2
8020cb8: b29a uxth r2, r3
8020cba: 687b ldr r3, [r7, #4]
8020cbc: f8a3 2066 strh.w r2, [r3, #102] @ 0x66
LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen));
if (pcb->snd_queuelen != 0) {
8020cc0: 687b ldr r3, [r7, #4]
8020cc2: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
8020cc6: 2b00 cmp r3, #0
8020cc8: d00e beq.n 8020ce8 <tcp_enqueue_flags+0x1b0>
LWIP_ASSERT("tcp_enqueue_flags: invalid queue length",
8020cca: 687b ldr r3, [r7, #4]
8020ccc: 6f1b ldr r3, [r3, #112] @ 0x70
8020cce: 2b00 cmp r3, #0
8020cd0: d10a bne.n 8020ce8 <tcp_enqueue_flags+0x1b0>
8020cd2: 687b ldr r3, [r7, #4]
8020cd4: 6edb ldr r3, [r3, #108] @ 0x6c
8020cd6: 2b00 cmp r3, #0
8020cd8: d106 bne.n 8020ce8 <tcp_enqueue_flags+0x1b0>
8020cda: 4b06 ldr r3, [pc, #24] @ (8020cf4 <tcp_enqueue_flags+0x1bc>)
8020cdc: f240 4265 movw r2, #1125 @ 0x465
8020ce0: 490b ldr r1, [pc, #44] @ (8020d10 <tcp_enqueue_flags+0x1d8>)
8020ce2: 4806 ldr r0, [pc, #24] @ (8020cfc <tcp_enqueue_flags+0x1c4>)
8020ce4: f009 fea2 bl 802aa2c <iprintf>
pcb->unacked != NULL || pcb->unsent != NULL);
}
return ERR_OK;
8020ce8: 2300 movs r3, #0
}
8020cea: 4618 mov r0, r3
8020cec: 3718 adds r7, #24
8020cee: 46bd mov sp, r7
8020cf0: bd80 pop {r7, pc}
8020cf2: bf00 nop
8020cf4: 080303d8 .word 0x080303d8
8020cf8: 08030858 .word 0x08030858
8020cfc: 0803042c .word 0x0803042c
8020d00: 080308b0 .word 0x080308b0
8020d04: 080308d0 .word 0x080308d0
8020d08: 0803090c .word 0x0803090c
8020d0c: 08030924 .word 0x08030924
8020d10: 08030950 .word 0x08030950
08020d14 <tcp_output>:
* @return ERR_OK if data has been sent or nothing to send
* another err_t on error
*/
err_t
tcp_output(struct tcp_pcb *pcb)
{
8020d14: b5b0 push {r4, r5, r7, lr}
8020d16: b08a sub sp, #40 @ 0x28
8020d18: af00 add r7, sp, #0
8020d1a: 6078 str r0, [r7, #4]
struct netif *netif;
#if TCP_CWND_DEBUG
s16_t i = 0;
#endif /* TCP_CWND_DEBUG */
LWIP_ASSERT_CORE_LOCKED();
8020d1c: f7f0 fa5a bl 80111d4 <sys_check_core_locking>
LWIP_ASSERT("tcp_output: invalid pcb", pcb != NULL);
8020d20: 687b ldr r3, [r7, #4]
8020d22: 2b00 cmp r3, #0
8020d24: d106 bne.n 8020d34 <tcp_output+0x20>
8020d26: 4b8a ldr r3, [pc, #552] @ (8020f50 <tcp_output+0x23c>)
8020d28: f240 42e1 movw r2, #1249 @ 0x4e1
8020d2c: 4989 ldr r1, [pc, #548] @ (8020f54 <tcp_output+0x240>)
8020d2e: 488a ldr r0, [pc, #552] @ (8020f58 <tcp_output+0x244>)
8020d30: f009 fe7c bl 802aa2c <iprintf>
/* pcb->state LISTEN not allowed here */
LWIP_ASSERT("don't call tcp_output for listen-pcbs",
8020d34: 687b ldr r3, [r7, #4]
8020d36: 7d1b ldrb r3, [r3, #20]
8020d38: 2b01 cmp r3, #1
8020d3a: d106 bne.n 8020d4a <tcp_output+0x36>
8020d3c: 4b84 ldr r3, [pc, #528] @ (8020f50 <tcp_output+0x23c>)
8020d3e: f240 42e3 movw r2, #1251 @ 0x4e3
8020d42: 4986 ldr r1, [pc, #536] @ (8020f5c <tcp_output+0x248>)
8020d44: 4884 ldr r0, [pc, #528] @ (8020f58 <tcp_output+0x244>)
8020d46: f009 fe71 bl 802aa2c <iprintf>
/* First, check if we are invoked by the TCP input processing
code. If so, we do not output anything. Instead, we rely on the
input processing code to call us when input processing is done
with. */
if (tcp_input_pcb == pcb) {
8020d4a: 4b85 ldr r3, [pc, #532] @ (8020f60 <tcp_output+0x24c>)
8020d4c: 681b ldr r3, [r3, #0]
8020d4e: 687a ldr r2, [r7, #4]
8020d50: 429a cmp r2, r3
8020d52: d101 bne.n 8020d58 <tcp_output+0x44>
return ERR_OK;
8020d54: 2300 movs r3, #0
8020d56: e1d1 b.n 80210fc <tcp_output+0x3e8>
}
wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd);
8020d58: 687b ldr r3, [r7, #4]
8020d5a: f8b3 2048 ldrh.w r2, [r3, #72] @ 0x48
8020d5e: 687b ldr r3, [r7, #4]
8020d60: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
8020d64: 4293 cmp r3, r2
8020d66: bf28 it cs
8020d68: 4613 movcs r3, r2
8020d6a: b29b uxth r3, r3
8020d6c: 61bb str r3, [r7, #24]
seg = pcb->unsent;
8020d6e: 687b ldr r3, [r7, #4]
8020d70: 6edb ldr r3, [r3, #108] @ 0x6c
8020d72: 627b str r3, [r7, #36] @ 0x24
if (seg == NULL) {
8020d74: 6a7b ldr r3, [r7, #36] @ 0x24
8020d76: 2b00 cmp r3, #0
8020d78: d10b bne.n 8020d92 <tcp_output+0x7e>
", seg == NULL, ack %"U32_F"\n",
pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack));
/* If the TF_ACK_NOW flag is set and the ->unsent queue is empty, construct
* an empty ACK segment and send it. */
if (pcb->flags & TF_ACK_NOW) {
8020d7a: 687b ldr r3, [r7, #4]
8020d7c: 8b5b ldrh r3, [r3, #26]
8020d7e: f003 0302 and.w r3, r3, #2
8020d82: 2b00 cmp r3, #0
8020d84: f000 81ad beq.w 80210e2 <tcp_output+0x3ce>
return tcp_send_empty_ack(pcb);
8020d88: 6878 ldr r0, [r7, #4]
8020d8a: f000 fdd7 bl 802193c <tcp_send_empty_ack>
8020d8e: 4603 mov r3, r0
8020d90: e1b4 b.n 80210fc <tcp_output+0x3e8>
pcb->snd_wnd, pcb->cwnd, wnd,
lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len,
lwip_ntohl(seg->tcphdr->seqno), pcb->lastack));
}
netif = tcp_route(pcb, &pcb->local_ip, &pcb->remote_ip);
8020d92: 6879 ldr r1, [r7, #4]
8020d94: 687b ldr r3, [r7, #4]
8020d96: 3304 adds r3, #4
8020d98: 461a mov r2, r3
8020d9a: 6878 ldr r0, [r7, #4]
8020d9c: f7fe ffc0 bl 801fd20 <tcp_route>
8020da0: 6178 str r0, [r7, #20]
if (netif == NULL) {
8020da2: 697b ldr r3, [r7, #20]
8020da4: 2b00 cmp r3, #0
8020da6: d102 bne.n 8020dae <tcp_output+0x9a>
return ERR_RTE;
8020da8: f06f 0303 mvn.w r3, #3
8020dac: e1a6 b.n 80210fc <tcp_output+0x3e8>
}
/* If we don't have a local IP address, we get one from netif */
if (ip_addr_isany(&pcb->local_ip)) {
8020dae: 687b ldr r3, [r7, #4]
8020db0: 2b00 cmp r3, #0
8020db2: d003 beq.n 8020dbc <tcp_output+0xa8>
8020db4: 687b ldr r3, [r7, #4]
8020db6: 681b ldr r3, [r3, #0]
8020db8: 2b00 cmp r3, #0
8020dba: d111 bne.n 8020de0 <tcp_output+0xcc>
const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, &pcb->remote_ip);
8020dbc: 697b ldr r3, [r7, #20]
8020dbe: 2b00 cmp r3, #0
8020dc0: d002 beq.n 8020dc8 <tcp_output+0xb4>
8020dc2: 697b ldr r3, [r7, #20]
8020dc4: 3304 adds r3, #4
8020dc6: e000 b.n 8020dca <tcp_output+0xb6>
8020dc8: 2300 movs r3, #0
8020dca: 613b str r3, [r7, #16]
if (local_ip == NULL) {
8020dcc: 693b ldr r3, [r7, #16]
8020dce: 2b00 cmp r3, #0
8020dd0: d102 bne.n 8020dd8 <tcp_output+0xc4>
return ERR_RTE;
8020dd2: f06f 0303 mvn.w r3, #3
8020dd6: e191 b.n 80210fc <tcp_output+0x3e8>
}
ip_addr_copy(pcb->local_ip, *local_ip);
8020dd8: 693b ldr r3, [r7, #16]
8020dda: 681a ldr r2, [r3, #0]
8020ddc: 687b ldr r3, [r7, #4]
8020dde: 601a str r2, [r3, #0]
}
/* Handle the current segment not fitting within the window */
if (lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd) {
8020de0: 6a7b ldr r3, [r7, #36] @ 0x24
8020de2: 691b ldr r3, [r3, #16]
8020de4: 685b ldr r3, [r3, #4]
8020de6: 4618 mov r0, r3
8020de8: f7f8 fedb bl 8019ba2 <lwip_htonl>
8020dec: 4602 mov r2, r0
8020dee: 687b ldr r3, [r7, #4]
8020df0: 6c5b ldr r3, [r3, #68] @ 0x44
8020df2: 1ad3 subs r3, r2, r3
8020df4: 6a7a ldr r2, [r7, #36] @ 0x24
8020df6: 8912 ldrh r2, [r2, #8]
8020df8: 4413 add r3, r2
8020dfa: 69ba ldr r2, [r7, #24]
8020dfc: 429a cmp r2, r3
8020dfe: d227 bcs.n 8020e50 <tcp_output+0x13c>
* within the remaining (could be 0) send window and RTO timer is not running (we
* have no in-flight data). If window is still too small after persist timer fires,
* then we split the segment. We don't consider the congestion window since a cwnd
* smaller than 1 SMSS implies in-flight data
*/
if (wnd == pcb->snd_wnd && pcb->unacked == NULL && pcb->persist_backoff == 0) {
8020e00: 687b ldr r3, [r7, #4]
8020e02: f8b3 3060 ldrh.w r3, [r3, #96] @ 0x60
8020e06: 461a mov r2, r3
8020e08: 69bb ldr r3, [r7, #24]
8020e0a: 4293 cmp r3, r2
8020e0c: d114 bne.n 8020e38 <tcp_output+0x124>
8020e0e: 687b ldr r3, [r7, #4]
8020e10: 6f1b ldr r3, [r3, #112] @ 0x70
8020e12: 2b00 cmp r3, #0
8020e14: d110 bne.n 8020e38 <tcp_output+0x124>
8020e16: 687b ldr r3, [r7, #4]
8020e18: f893 3099 ldrb.w r3, [r3, #153] @ 0x99
8020e1c: 2b00 cmp r3, #0
8020e1e: d10b bne.n 8020e38 <tcp_output+0x124>
pcb->persist_cnt = 0;
8020e20: 687b ldr r3, [r7, #4]
8020e22: 2200 movs r2, #0
8020e24: f883 2098 strb.w r2, [r3, #152] @ 0x98
pcb->persist_backoff = 1;
8020e28: 687b ldr r3, [r7, #4]
8020e2a: 2201 movs r2, #1
8020e2c: f883 2099 strb.w r2, [r3, #153] @ 0x99
pcb->persist_probe = 0;
8020e30: 687b ldr r3, [r7, #4]
8020e32: 2200 movs r2, #0
8020e34: f883 209a strb.w r2, [r3, #154] @ 0x9a
}
/* We need an ACK, but can't send data now, so send an empty ACK */
if (pcb->flags & TF_ACK_NOW) {
8020e38: 687b ldr r3, [r7, #4]
8020e3a: 8b5b ldrh r3, [r3, #26]
8020e3c: f003 0302 and.w r3, r3, #2
8020e40: 2b00 cmp r3, #0
8020e42: f000 8150 beq.w 80210e6 <tcp_output+0x3d2>
return tcp_send_empty_ack(pcb);
8020e46: 6878 ldr r0, [r7, #4]
8020e48: f000 fd78 bl 802193c <tcp_send_empty_ack>
8020e4c: 4603 mov r3, r0
8020e4e: e155 b.n 80210fc <tcp_output+0x3e8>
}
goto output_done;
}
/* Stop persist timer, above conditions are not active */
pcb->persist_backoff = 0;
8020e50: 687b ldr r3, [r7, #4]
8020e52: 2200 movs r2, #0
8020e54: f883 2099 strb.w r2, [r3, #153] @ 0x99
/* useg should point to last segment on unacked queue */
useg = pcb->unacked;
8020e58: 687b ldr r3, [r7, #4]
8020e5a: 6f1b ldr r3, [r3, #112] @ 0x70
8020e5c: 623b str r3, [r7, #32]
if (useg != NULL) {
8020e5e: 6a3b ldr r3, [r7, #32]
8020e60: 2b00 cmp r3, #0
8020e62: f000 811f beq.w 80210a4 <tcp_output+0x390>
for (; useg->next != NULL; useg = useg->next);
8020e66: e002 b.n 8020e6e <tcp_output+0x15a>
8020e68: 6a3b ldr r3, [r7, #32]
8020e6a: 681b ldr r3, [r3, #0]
8020e6c: 623b str r3, [r7, #32]
8020e6e: 6a3b ldr r3, [r7, #32]
8020e70: 681b ldr r3, [r3, #0]
8020e72: 2b00 cmp r3, #0
8020e74: d1f8 bne.n 8020e68 <tcp_output+0x154>
}
/* data available and window allows it to be sent? */
while (seg != NULL &&
8020e76: e115 b.n 80210a4 <tcp_output+0x390>
lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
LWIP_ASSERT("RST not expected here!",
8020e78: 6a7b ldr r3, [r7, #36] @ 0x24
8020e7a: 691b ldr r3, [r3, #16]
8020e7c: 899b ldrh r3, [r3, #12]
8020e7e: b29b uxth r3, r3
8020e80: 4618 mov r0, r3
8020e82: f7f8 fe79 bl 8019b78 <lwip_htons>
8020e86: 4603 mov r3, r0
8020e88: b2db uxtb r3, r3
8020e8a: f003 0304 and.w r3, r3, #4
8020e8e: 2b00 cmp r3, #0
8020e90: d006 beq.n 8020ea0 <tcp_output+0x18c>
8020e92: 4b2f ldr r3, [pc, #188] @ (8020f50 <tcp_output+0x23c>)
8020e94: f240 5236 movw r2, #1334 @ 0x536
8020e98: 4932 ldr r1, [pc, #200] @ (8020f64 <tcp_output+0x250>)
8020e9a: 482f ldr r0, [pc, #188] @ (8020f58 <tcp_output+0x244>)
8020e9c: f009 fdc6 bl 802aa2c <iprintf>
* - if tcp_write had a memory error before (prevent delayed ACK timeout) or
* - if FIN was already enqueued for this PCB (SYN is always alone in a segment -
* either seg->next != NULL or pcb->unacked == NULL;
* RST is no sent using tcp_write/tcp_output.
*/
if ((tcp_do_output_nagle(pcb) == 0) &&
8020ea0: 687b ldr r3, [r7, #4]
8020ea2: 6f1b ldr r3, [r3, #112] @ 0x70
8020ea4: 2b00 cmp r3, #0
8020ea6: d01f beq.n 8020ee8 <tcp_output+0x1d4>
8020ea8: 687b ldr r3, [r7, #4]
8020eaa: 8b5b ldrh r3, [r3, #26]
8020eac: f003 0344 and.w r3, r3, #68 @ 0x44
8020eb0: 2b00 cmp r3, #0
8020eb2: d119 bne.n 8020ee8 <tcp_output+0x1d4>
8020eb4: 687b ldr r3, [r7, #4]
8020eb6: 6edb ldr r3, [r3, #108] @ 0x6c
8020eb8: 2b00 cmp r3, #0
8020eba: d00b beq.n 8020ed4 <tcp_output+0x1c0>
8020ebc: 687b ldr r3, [r7, #4]
8020ebe: 6edb ldr r3, [r3, #108] @ 0x6c
8020ec0: 681b ldr r3, [r3, #0]
8020ec2: 2b00 cmp r3, #0
8020ec4: d110 bne.n 8020ee8 <tcp_output+0x1d4>
8020ec6: 687b ldr r3, [r7, #4]
8020ec8: 6edb ldr r3, [r3, #108] @ 0x6c
8020eca: 891a ldrh r2, [r3, #8]
8020ecc: 687b ldr r3, [r7, #4]
8020ece: 8e5b ldrh r3, [r3, #50] @ 0x32
8020ed0: 429a cmp r2, r3
8020ed2: d209 bcs.n 8020ee8 <tcp_output+0x1d4>
8020ed4: 687b ldr r3, [r7, #4]
8020ed6: f8b3 3064 ldrh.w r3, [r3, #100] @ 0x64
8020eda: 2b00 cmp r3, #0
8020edc: d004 beq.n 8020ee8 <tcp_output+0x1d4>
8020ede: 687b ldr r3, [r7, #4]
8020ee0: f8b3 3066 ldrh.w r3, [r3, #102] @ 0x66
8020ee4: 2b0f cmp r3, #15
8020ee6: d901 bls.n 8020eec <tcp_output+0x1d8>
8020ee8: 2301 movs r3, #1
8020eea: e000 b.n 8020eee <tcp_output+0x1da>
8020eec: 2300 movs r3, #0
8020eee: 2b00 cmp r3, #0
8020ef0: d106 bne.n 8020f00 <tcp_output+0x1ec>
((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)) {
8020ef2: 687b ldr r3, [r7, #4]
8020ef4: 8b5b ldrh r3, [r3, #26]
8020ef6: f003 03a0 and.w r3, r3, #160 @ 0xa0
if ((tcp_do_output_nagle(pcb) == 0) &&
8020efa: 2b00 cmp r3, #0
8020efc: f000 80e7 beq.w 80210ce <tcp_output+0x3ba>
pcb->lastack,
lwip_ntohl(seg->tcphdr->seqno), pcb->lastack, i));
++i;
#endif /* TCP_CWND_DEBUG */
if (pcb->state != SYN_SENT) {
8020f00: 687b ldr r3, [r7, #4]
8020f02: 7d1b ldrb r3, [r3, #20]
8020f04: 2b02 cmp r3, #2
8020f06: d00d beq.n 8020f24 <tcp_output+0x210>
TCPH_SET_FLAG(seg->tcphdr, TCP_ACK);
8020f08: 6a7b ldr r3, [r7, #36] @ 0x24
8020f0a: 691b ldr r3, [r3, #16]
8020f0c: 899b ldrh r3, [r3, #12]
8020f0e: b29c uxth r4, r3
8020f10: 2010 movs r0, #16
8020f12: f7f8 fe31 bl 8019b78 <lwip_htons>
8020f16: 4603 mov r3, r0
8020f18: 461a mov r2, r3
8020f1a: 6a7b ldr r3, [r7, #36] @ 0x24
8020f1c: 691b ldr r3, [r3, #16]
8020f1e: 4322 orrs r2, r4
8020f20: b292 uxth r2, r2
8020f22: 819a strh r2, [r3, #12]
}
err = tcp_output_segment(seg, pcb, netif);
8020f24: 697a ldr r2, [r7, #20]
8020f26: 6879 ldr r1, [r7, #4]
8020f28: 6a78 ldr r0, [r7, #36] @ 0x24
8020f2a: f000 f90b bl 8021144 <tcp_output_segment>
8020f2e: 4603 mov r3, r0
8020f30: 73fb strb r3, [r7, #15]
if (err != ERR_OK) {
8020f32: f997 300f ldrsb.w r3, [r7, #15]
8020f36: 2b00 cmp r3, #0
8020f38: d016 beq.n 8020f68 <tcp_output+0x254>
/* segment could not be sent, for whatever reason */
tcp_set_flags(pcb, TF_NAGLEMEMERR);
8020f3a: 687b ldr r3, [r7, #4]
8020f3c: 8b5b ldrh r3, [r3, #26]
8020f3e: f043 0380 orr.w r3, r3, #128 @ 0x80
8020f42: b29a uxth r2, r3
8020f44: 687b ldr r3, [r7, #4]
8020f46: 835a strh r2, [r3, #26]
return err;
8020f48: f997 300f ldrsb.w r3, [r7, #15]
8020f4c: e0d6 b.n 80210fc <tcp_output+0x3e8>
8020f4e: bf00 nop
8020f50: 080303d8 .word 0x080303d8
8020f54: 08030978 .word 0x08030978
8020f58: 0803042c .word 0x0803042c
8020f5c: 08030990 .word 0x08030990
8020f60: 2402aff8 .word 0x2402aff8
8020f64: 080309b8 .word 0x080309b8
}
#if TCP_OVERSIZE_DBGCHECK
seg->oversize_left = 0;
8020f68: 6a7b ldr r3, [r7, #36] @ 0x24
8020f6a: 2200 movs r2, #0
8020f6c: 815a strh r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
pcb->unsent = seg->next;
8020f6e: 6a7b ldr r3, [r7, #36] @ 0x24
8020f70: 681a ldr r2, [r3, #0]
8020f72: 687b ldr r3, [r7, #4]
8020f74: 66da str r2, [r3, #108] @ 0x6c
if (pcb->state != SYN_SENT) {
8020f76: 687b ldr r3, [r7, #4]
8020f78: 7d1b ldrb r3, [r3, #20]
8020f7a: 2b02 cmp r3, #2
8020f7c: d006 beq.n 8020f8c <tcp_output+0x278>
tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
8020f7e: 687b ldr r3, [r7, #4]
8020f80: 8b5b ldrh r3, [r3, #26]
8020f82: f023 0303 bic.w r3, r3, #3
8020f86: b29a uxth r2, r3
8020f88: 687b ldr r3, [r7, #4]
8020f8a: 835a strh r2, [r3, #26]
}
snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
8020f8c: 6a7b ldr r3, [r7, #36] @ 0x24
8020f8e: 691b ldr r3, [r3, #16]
8020f90: 685b ldr r3, [r3, #4]
8020f92: 4618 mov r0, r3
8020f94: f7f8 fe05 bl 8019ba2 <lwip_htonl>
8020f98: 4604 mov r4, r0
8020f9a: 6a7b ldr r3, [r7, #36] @ 0x24
8020f9c: 891b ldrh r3, [r3, #8]
8020f9e: 461d mov r5, r3
8020fa0: 6a7b ldr r3, [r7, #36] @ 0x24
8020fa2: 691b ldr r3, [r3, #16]
8020fa4: 899b ldrh r3, [r3, #12]
8020fa6: b29b uxth r3, r3
8020fa8: 4618 mov r0, r3
8020faa: f7f8 fde5 bl 8019b78 <lwip_htons>
8020fae: 4603 mov r3, r0
8020fb0: b2db uxtb r3, r3
8020fb2: f003 0303 and.w r3, r3, #3
8020fb6: 2b00 cmp r3, #0
8020fb8: d001 beq.n 8020fbe <tcp_output+0x2aa>
8020fba: 2301 movs r3, #1
8020fbc: e000 b.n 8020fc0 <tcp_output+0x2ac>
8020fbe: 2300 movs r3, #0
8020fc0: 442b add r3, r5
8020fc2: 4423 add r3, r4
8020fc4: 60bb str r3, [r7, #8]
if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
8020fc6: 687b ldr r3, [r7, #4]
8020fc8: 6d1a ldr r2, [r3, #80] @ 0x50
8020fca: 68bb ldr r3, [r7, #8]
8020fcc: 1ad3 subs r3, r2, r3
8020fce: 2b00 cmp r3, #0
8020fd0: da02 bge.n 8020fd8 <tcp_output+0x2c4>
pcb->snd_nxt = snd_nxt;
8020fd2: 687b ldr r3, [r7, #4]
8020fd4: 68ba ldr r2, [r7, #8]
8020fd6: 651a str r2, [r3, #80] @ 0x50
}
/* put segment on unacknowledged list if length > 0 */
if (TCP_TCPLEN(seg) > 0) {
8020fd8: 6a7b ldr r3, [r7, #36] @ 0x24
8020fda: 891b ldrh r3, [r3, #8]
8020fdc: 461c mov r4, r3
8020fde: 6a7b ldr r3, [r7, #36] @ 0x24
8020fe0: 691b ldr r3, [r3, #16]
8020fe2: 899b ldrh r3, [r3, #12]
8020fe4: b29b uxth r3, r3
8020fe6: 4618 mov r0, r3
8020fe8: f7f8 fdc6 bl 8019b78 <lwip_htons>
8020fec: 4603 mov r3, r0
8020fee: b2db uxtb r3, r3
8020ff0: f003 0303 and.w r3, r3, #3
8020ff4: 2b00 cmp r3, #0
8020ff6: d001 beq.n 8020ffc <tcp_output+0x2e8>
8020ff8: 2301 movs r3, #1
8020ffa: e000 b.n 8020ffe <tcp_output+0x2ea>
8020ffc: 2300 movs r3, #0
8020ffe: 4423 add r3, r4
8021000: 2b00 cmp r3, #0
8021002: d049 beq.n 8021098 <tcp_output+0x384>
seg->next = NULL;
8021004: 6a7b ldr r3, [r7, #36] @ 0x24
8021006: 2200 movs r2, #0
8021008: 601a str r2, [r3, #0]
/* unacked list is empty? */
if (pcb->unacked == NULL) {
802100a: 687b ldr r3, [r7, #4]
802100c: 6f1b ldr r3, [r3, #112] @ 0x70
802100e: 2b00 cmp r3, #0
8021010: d105 bne.n 802101e <tcp_output+0x30a>
pcb->unacked = seg;
8021012: 687b ldr r3, [r7, #4]
8021014: 6a7a ldr r2, [r7, #36] @ 0x24
8021016: 671a str r2, [r3, #112] @ 0x70
useg = seg;
8021018: 6a7b ldr r3, [r7, #36] @ 0x24
802101a: 623b str r3, [r7, #32]
802101c: e03f b.n 802109e <tcp_output+0x38a>
/* unacked list is not empty? */
} else {
/* In the case of fast retransmit, the packet should not go to the tail
* of the unacked queue, but rather somewhere before it. We need to check for
* this case. -STJ Jul 27, 2004 */
if (TCP_SEQ_LT(lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(useg->tcphdr->seqno))) {
802101e: 6a7b ldr r3, [r7, #36] @ 0x24
8021020: 691b ldr r3, [r3, #16]
8021022: 685b ldr r3, [r3, #4]
8021024: 4618 mov r0, r3
8021026: f7f8 fdbc bl 8019ba2 <lwip_htonl>
802102a: 4604 mov r4, r0
802102c: 6a3b ldr r3, [r7, #32]
802102e: 691b ldr r3, [r3, #16]
8021030: 685b ldr r3, [r3, #4]
8021032: 4618 mov r0, r3
8021034: f7f8 fdb5 bl 8019ba2 <lwip_htonl>
8021038: 4603 mov r3, r0
802103a: 1ae3 subs r3, r4, r3
802103c: 2b00 cmp r3, #0
802103e: da24 bge.n 802108a <tcp_output+0x376>
/* add segment to before tail of unacked list, keeping the list sorted */
struct tcp_seg **cur_seg = &(pcb->unacked);
8021040: 687b ldr r3, [r7, #4]
8021042: 3370 adds r3, #112 @ 0x70
8021044: 61fb str r3, [r7, #28]
while (*cur_seg &&
8021046: e002 b.n 802104e <tcp_output+0x33a>
TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
cur_seg = &((*cur_seg)->next );
8021048: 69fb ldr r3, [r7, #28]
802104a: 681b ldr r3, [r3, #0]
802104c: 61fb str r3, [r7, #28]
while (*cur_seg &&
802104e: 69fb ldr r3, [r7, #28]
8021050: 681b ldr r3, [r3, #0]
8021052: 2b00 cmp r3, #0
8021054: d011 beq.n 802107a <tcp_output+0x366>
TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
8021056: 69fb ldr r3, [r7, #28]
8021058: 681b ldr r3, [r3, #0]
802105a: 691b ldr r3, [r3, #16]
802105c: 685b ldr r3, [r3, #4]
802105e: 4618 mov r0, r3
8021060: f7f8 fd9f bl 8019ba2 <lwip_htonl>
8021064: 4604 mov r4, r0
8021066: 6a7b ldr r3, [r7, #36] @ 0x24
8021068: 691b ldr r3, [r3, #16]
802106a: 685b ldr r3, [r3, #4]
802106c: 4618 mov r0, r3
802106e: f7f8 fd98 bl 8019ba2 <lwip_htonl>
8021072: 4603 mov r3, r0
8021074: 1ae3 subs r3, r4, r3
while (*cur_seg &&
8021076: 2b00 cmp r3, #0
8021078: dbe6 blt.n 8021048 <tcp_output+0x334>
}
seg->next = (*cur_seg);
802107a: 69fb ldr r3, [r7, #28]
802107c: 681a ldr r2, [r3, #0]
802107e: 6a7b ldr r3, [r7, #36] @ 0x24
8021080: 601a str r2, [r3, #0]
(*cur_seg) = seg;
8021082: 69fb ldr r3, [r7, #28]
8021084: 6a7a ldr r2, [r7, #36] @ 0x24
8021086: 601a str r2, [r3, #0]
8021088: e009 b.n 802109e <tcp_output+0x38a>
} else {
/* add segment to tail of unacked list */
useg->next = seg;
802108a: 6a3b ldr r3, [r7, #32]
802108c: 6a7a ldr r2, [r7, #36] @ 0x24
802108e: 601a str r2, [r3, #0]
useg = useg->next;
8021090: 6a3b ldr r3, [r7, #32]
8021092: 681b ldr r3, [r3, #0]
8021094: 623b str r3, [r7, #32]
8021096: e002 b.n 802109e <tcp_output+0x38a>
}
}
/* do not queue empty segments on the unacked list */
} else {
tcp_seg_free(seg);
8021098: 6a78 ldr r0, [r7, #36] @ 0x24
802109a: f7fb fea8 bl 801cdee <tcp_seg_free>
}
seg = pcb->unsent;
802109e: 687b ldr r3, [r7, #4]
80210a0: 6edb ldr r3, [r3, #108] @ 0x6c
80210a2: 627b str r3, [r7, #36] @ 0x24
while (seg != NULL &&
80210a4: 6a7b ldr r3, [r7, #36] @ 0x24
80210a6: 2b00 cmp r3, #0
80210a8: d012 beq.n 80210d0 <tcp_output+0x3bc>
lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
80210aa: 6a7b ldr r3, [r7, #36] @ 0x24
80210ac: 691b ldr r3, [r3, #16]
80210ae: 685b ldr r3, [r3, #4]
80210b0: 4618 mov r0, r3
80210b2: f7f8 fd76 bl 8019ba2 <lwip_htonl>
80210b6: 4602 mov r2, r0
80210b8: 687b ldr r3, [r7, #4]
80210ba: 6c5b ldr r3, [r3, #68] @ 0x44
80210bc: 1ad3 subs r3, r2, r3
80210be: 6a7a ldr r2, [r7, #36] @ 0x24
80210c0: 8912 ldrh r2, [r2, #8]
80210c2: 4413 add r3, r2
while (seg != NULL &&
80210c4: 69ba ldr r2, [r7, #24]
80210c6: 429a cmp r2, r3
80210c8: f4bf aed6 bcs.w 8020e78 <tcp_output+0x164>
80210cc: e000 b.n 80210d0 <tcp_output+0x3bc>
break;
80210ce: bf00 nop
}
#if TCP_OVERSIZE
if (pcb->unsent == NULL) {
80210d0: 687b ldr r3, [r7, #4]
80210d2: 6edb ldr r3, [r3, #108] @ 0x6c
80210d4: 2b00 cmp r3, #0
80210d6: d108 bne.n 80210ea <tcp_output+0x3d6>
/* last unsent has been removed, reset unsent_oversize */
pcb->unsent_oversize = 0;
80210d8: 687b ldr r3, [r7, #4]
80210da: 2200 movs r2, #0
80210dc: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
80210e0: e004 b.n 80210ec <tcp_output+0x3d8>
goto output_done;
80210e2: bf00 nop
80210e4: e002 b.n 80210ec <tcp_output+0x3d8>
goto output_done;
80210e6: bf00 nop
80210e8: e000 b.n 80210ec <tcp_output+0x3d8>
}
#endif /* TCP_OVERSIZE */
output_done:
80210ea: bf00 nop
tcp_clear_flags(pcb, TF_NAGLEMEMERR);
80210ec: 687b ldr r3, [r7, #4]
80210ee: 8b5b ldrh r3, [r3, #26]
80210f0: f023 0380 bic.w r3, r3, #128 @ 0x80
80210f4: b29a uxth r2, r3
80210f6: 687b ldr r3, [r7, #4]
80210f8: 835a strh r2, [r3, #26]
return ERR_OK;
80210fa: 2300 movs r3, #0
}
80210fc: 4618 mov r0, r3
80210fe: 3728 adds r7, #40 @ 0x28
8021100: 46bd mov sp, r7
8021102: bdb0 pop {r4, r5, r7, pc}
08021104 <tcp_output_segment_busy>:
* @arg seg the tcp segment to check
* @return 1 if ref != 1, 0 if ref == 1
*/
static int
tcp_output_segment_busy(const struct tcp_seg *seg)
{
8021104: b580 push {r7, lr}
8021106: b082 sub sp, #8
8021108: af00 add r7, sp, #0
802110a: 6078 str r0, [r7, #4]
LWIP_ASSERT("tcp_output_segment_busy: invalid seg", seg != NULL);
802110c: 687b ldr r3, [r7, #4]
802110e: 2b00 cmp r3, #0
8021110: d106 bne.n 8021120 <tcp_output_segment_busy+0x1c>
8021112: 4b09 ldr r3, [pc, #36] @ (8021138 <tcp_output_segment_busy+0x34>)
8021114: f240 529a movw r2, #1434 @ 0x59a
8021118: 4908 ldr r1, [pc, #32] @ (802113c <tcp_output_segment_busy+0x38>)
802111a: 4809 ldr r0, [pc, #36] @ (8021140 <tcp_output_segment_busy+0x3c>)
802111c: f009 fc86 bl 802aa2c <iprintf>
/* We only need to check the first pbuf here:
If a pbuf is queued for transmission, a driver calls pbuf_ref(),
which only changes the ref count of the first pbuf */
if (seg->p->ref != 1) {
8021120: 687b ldr r3, [r7, #4]
8021122: 685b ldr r3, [r3, #4]
8021124: 7b9b ldrb r3, [r3, #14]
8021126: 2b01 cmp r3, #1
8021128: d001 beq.n 802112e <tcp_output_segment_busy+0x2a>
/* other reference found */
return 1;
802112a: 2301 movs r3, #1
802112c: e000 b.n 8021130 <tcp_output_segment_busy+0x2c>
}
/* no other references found */
return 0;
802112e: 2300 movs r3, #0
}
8021130: 4618 mov r0, r3
8021132: 3708 adds r7, #8
8021134: 46bd mov sp, r7
8021136: bd80 pop {r7, pc}
8021138: 080303d8 .word 0x080303d8
802113c: 080309d0 .word 0x080309d0
8021140: 0803042c .word 0x0803042c
08021144 <tcp_output_segment>:
* @param pcb the tcp_pcb for the TCP connection used to send the segment
* @param netif the netif used to send the segment
*/
static err_t
tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif)
{
8021144: b5b0 push {r4, r5, r7, lr}
8021146: b08c sub sp, #48 @ 0x30
8021148: af04 add r7, sp, #16
802114a: 60f8 str r0, [r7, #12]
802114c: 60b9 str r1, [r7, #8]
802114e: 607a str r2, [r7, #4]
u32_t *opts;
#if TCP_CHECKSUM_ON_COPY
int seg_chksum_was_swapped = 0;
#endif
LWIP_ASSERT("tcp_output_segment: invalid seg", seg != NULL);
8021150: 68fb ldr r3, [r7, #12]
8021152: 2b00 cmp r3, #0
8021154: d106 bne.n 8021164 <tcp_output_segment+0x20>
8021156: 4b64 ldr r3, [pc, #400] @ (80212e8 <tcp_output_segment+0x1a4>)
8021158: f44f 62b7 mov.w r2, #1464 @ 0x5b8
802115c: 4963 ldr r1, [pc, #396] @ (80212ec <tcp_output_segment+0x1a8>)
802115e: 4864 ldr r0, [pc, #400] @ (80212f0 <tcp_output_segment+0x1ac>)
8021160: f009 fc64 bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_output_segment: invalid pcb", pcb != NULL);
8021164: 68bb ldr r3, [r7, #8]
8021166: 2b00 cmp r3, #0
8021168: d106 bne.n 8021178 <tcp_output_segment+0x34>
802116a: 4b5f ldr r3, [pc, #380] @ (80212e8 <tcp_output_segment+0x1a4>)
802116c: f240 52b9 movw r2, #1465 @ 0x5b9
8021170: 4960 ldr r1, [pc, #384] @ (80212f4 <tcp_output_segment+0x1b0>)
8021172: 485f ldr r0, [pc, #380] @ (80212f0 <tcp_output_segment+0x1ac>)
8021174: f009 fc5a bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_output_segment: invalid netif", netif != NULL);
8021178: 687b ldr r3, [r7, #4]
802117a: 2b00 cmp r3, #0
802117c: d106 bne.n 802118c <tcp_output_segment+0x48>
802117e: 4b5a ldr r3, [pc, #360] @ (80212e8 <tcp_output_segment+0x1a4>)
8021180: f240 52ba movw r2, #1466 @ 0x5ba
8021184: 495c ldr r1, [pc, #368] @ (80212f8 <tcp_output_segment+0x1b4>)
8021186: 485a ldr r0, [pc, #360] @ (80212f0 <tcp_output_segment+0x1ac>)
8021188: f009 fc50 bl 802aa2c <iprintf>
if (tcp_output_segment_busy(seg)) {
802118c: 68f8 ldr r0, [r7, #12]
802118e: f7ff ffb9 bl 8021104 <tcp_output_segment_busy>
8021192: 4603 mov r3, r0
8021194: 2b00 cmp r3, #0
8021196: d001 beq.n 802119c <tcp_output_segment+0x58>
/* This should not happen: rexmit functions should have checked this.
However, since this function modifies p->len, we must not continue in this case. */
LWIP_DEBUGF(TCP_RTO_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_output_segment: segment busy\n"));
return ERR_OK;
8021198: 2300 movs r3, #0
802119a: e0a1 b.n 80212e0 <tcp_output_segment+0x19c>
}
/* The TCP header has already been constructed, but the ackno and
wnd fields remain. */
seg->tcphdr->ackno = lwip_htonl(pcb->rcv_nxt);
802119c: 68bb ldr r3, [r7, #8]
802119e: 6a5a ldr r2, [r3, #36] @ 0x24
80211a0: 68fb ldr r3, [r7, #12]
80211a2: 691c ldr r4, [r3, #16]
80211a4: 4610 mov r0, r2
80211a6: f7f8 fcfc bl 8019ba2 <lwip_htonl>
80211aa: 4603 mov r3, r0
80211ac: 60a3 str r3, [r4, #8]
the window scale option) is never scaled. */
seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(pcb->rcv_ann_wnd));
} else
#endif /* LWIP_WND_SCALE */
{
seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
80211ae: 68bb ldr r3, [r7, #8]
80211b0: 8d5a ldrh r2, [r3, #42] @ 0x2a
80211b2: 68fb ldr r3, [r7, #12]
80211b4: 691c ldr r4, [r3, #16]
80211b6: 4610 mov r0, r2
80211b8: f7f8 fcde bl 8019b78 <lwip_htons>
80211bc: 4603 mov r3, r0
80211be: 81e3 strh r3, [r4, #14]
}
pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
80211c0: 68bb ldr r3, [r7, #8]
80211c2: 6a5b ldr r3, [r3, #36] @ 0x24
80211c4: 68ba ldr r2, [r7, #8]
80211c6: 8d52 ldrh r2, [r2, #42] @ 0x2a
80211c8: 441a add r2, r3
80211ca: 68bb ldr r3, [r7, #8]
80211cc: 62da str r2, [r3, #44] @ 0x2c
/* Add any requested options. NB MSS option is only set on SYN
packets, so ignore it here */
/* cast through void* to get rid of alignment warnings */
opts = (u32_t *)(void *)(seg->tcphdr + 1);
80211ce: 68fb ldr r3, [r7, #12]
80211d0: 691b ldr r3, [r3, #16]
80211d2: 3314 adds r3, #20
80211d4: 61fb str r3, [r7, #28]
if (seg->flags & TF_SEG_OPTS_MSS) {
80211d6: 68fb ldr r3, [r7, #12]
80211d8: 7b1b ldrb r3, [r3, #12]
80211da: f003 0301 and.w r3, r3, #1
80211de: 2b00 cmp r3, #0
80211e0: d015 beq.n 802120e <tcp_output_segment+0xca>
u16_t mss;
#if TCP_CALCULATE_EFF_SEND_MSS
mss = tcp_eff_send_mss_netif(TCP_MSS, netif, &pcb->remote_ip);
80211e2: 68bb ldr r3, [r7, #8]
80211e4: 3304 adds r3, #4
80211e6: 461a mov r2, r3
80211e8: 6879 ldr r1, [r7, #4]
80211ea: f240 50b4 movw r0, #1460 @ 0x5b4
80211ee: f7fc f9cd bl 801d58c <tcp_eff_send_mss_netif>
80211f2: 4603 mov r3, r0
80211f4: 837b strh r3, [r7, #26]
#else /* TCP_CALCULATE_EFF_SEND_MSS */
mss = TCP_MSS;
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
*opts = TCP_BUILD_MSS_OPTION(mss);
80211f6: 8b7b ldrh r3, [r7, #26]
80211f8: f043 7301 orr.w r3, r3, #33816576 @ 0x2040000
80211fc: 4618 mov r0, r3
80211fe: f7f8 fcd0 bl 8019ba2 <lwip_htonl>
8021202: 4602 mov r2, r0
8021204: 69fb ldr r3, [r7, #28]
8021206: 601a str r2, [r3, #0]
opts += 1;
8021208: 69fb ldr r3, [r7, #28]
802120a: 3304 adds r3, #4
802120c: 61fb str r3, [r7, #28]
}
#endif
/* Set retransmission timer running if it is not currently enabled
This must be set before checking the route. */
if (pcb->rtime < 0) {
802120e: 68bb ldr r3, [r7, #8]
8021210: f9b3 3030 ldrsh.w r3, [r3, #48] @ 0x30
8021214: 2b00 cmp r3, #0
8021216: da02 bge.n 802121e <tcp_output_segment+0xda>
pcb->rtime = 0;
8021218: 68bb ldr r3, [r7, #8]
802121a: 2200 movs r2, #0
802121c: 861a strh r2, [r3, #48] @ 0x30
}
if (pcb->rttest == 0) {
802121e: 68bb ldr r3, [r7, #8]
8021220: 6b5b ldr r3, [r3, #52] @ 0x34
8021222: 2b00 cmp r3, #0
8021224: d10c bne.n 8021240 <tcp_output_segment+0xfc>
pcb->rttest = tcp_ticks;
8021226: 4b35 ldr r3, [pc, #212] @ (80212fc <tcp_output_segment+0x1b8>)
8021228: 681a ldr r2, [r3, #0]
802122a: 68bb ldr r3, [r7, #8]
802122c: 635a str r2, [r3, #52] @ 0x34
pcb->rtseq = lwip_ntohl(seg->tcphdr->seqno);
802122e: 68fb ldr r3, [r7, #12]
8021230: 691b ldr r3, [r3, #16]
8021232: 685b ldr r3, [r3, #4]
8021234: 4618 mov r0, r3
8021236: f7f8 fcb4 bl 8019ba2 <lwip_htonl>
802123a: 4602 mov r2, r0
802123c: 68bb ldr r3, [r7, #8]
802123e: 639a str r2, [r3, #56] @ 0x38
}
LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n",
lwip_htonl(seg->tcphdr->seqno), lwip_htonl(seg->tcphdr->seqno) +
seg->len));
len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload);
8021240: 68fb ldr r3, [r7, #12]
8021242: 691a ldr r2, [r3, #16]
8021244: 68fb ldr r3, [r7, #12]
8021246: 685b ldr r3, [r3, #4]
8021248: 685b ldr r3, [r3, #4]
802124a: 1ad3 subs r3, r2, r3
802124c: 833b strh r3, [r7, #24]
if (len == 0) {
/** Exclude retransmitted segments from this count. */
MIB2_STATS_INC(mib2.tcpoutsegs);
}
seg->p->len -= len;
802124e: 68fb ldr r3, [r7, #12]
8021250: 685b ldr r3, [r3, #4]
8021252: 8959 ldrh r1, [r3, #10]
8021254: 68fb ldr r3, [r7, #12]
8021256: 685b ldr r3, [r3, #4]
8021258: 8b3a ldrh r2, [r7, #24]
802125a: 1a8a subs r2, r1, r2
802125c: b292 uxth r2, r2
802125e: 815a strh r2, [r3, #10]
seg->p->tot_len -= len;
8021260: 68fb ldr r3, [r7, #12]
8021262: 685b ldr r3, [r3, #4]
8021264: 8919 ldrh r1, [r3, #8]
8021266: 68fb ldr r3, [r7, #12]
8021268: 685b ldr r3, [r3, #4]
802126a: 8b3a ldrh r2, [r7, #24]
802126c: 1a8a subs r2, r1, r2
802126e: b292 uxth r2, r2
8021270: 811a strh r2, [r3, #8]
seg->p->payload = seg->tcphdr;
8021272: 68fb ldr r3, [r7, #12]
8021274: 685b ldr r3, [r3, #4]
8021276: 68fa ldr r2, [r7, #12]
8021278: 6912 ldr r2, [r2, #16]
802127a: 605a str r2, [r3, #4]
seg->tcphdr->chksum = 0;
802127c: 68fb ldr r3, [r7, #12]
802127e: 691b ldr r3, [r3, #16]
8021280: 2200 movs r2, #0
8021282: 741a strb r2, [r3, #16]
8021284: 2200 movs r2, #0
8021286: 745a strb r2, [r3, #17]
#ifdef LWIP_HOOK_TCP_OUT_ADD_TCPOPTS
opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(seg->p, seg->tcphdr, pcb, opts);
#endif
LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(seg->tcphdr + 1)) + LWIP_TCP_OPT_LENGTH_SEGMENT(seg->flags, pcb));
8021288: 68fb ldr r3, [r7, #12]
802128a: 691a ldr r2, [r3, #16]
802128c: 68fb ldr r3, [r7, #12]
802128e: 7b1b ldrb r3, [r3, #12]
8021290: f003 0301 and.w r3, r3, #1
8021294: 2b00 cmp r3, #0
8021296: d001 beq.n 802129c <tcp_output_segment+0x158>
8021298: 2318 movs r3, #24
802129a: e000 b.n 802129e <tcp_output_segment+0x15a>
802129c: 2314 movs r3, #20
802129e: 4413 add r3, r2
80212a0: 69fa ldr r2, [r7, #28]
80212a2: 429a cmp r2, r3
80212a4: d006 beq.n 80212b4 <tcp_output_segment+0x170>
80212a6: 4b10 ldr r3, [pc, #64] @ (80212e8 <tcp_output_segment+0x1a4>)
80212a8: f240 621c movw r2, #1564 @ 0x61c
80212ac: 4914 ldr r1, [pc, #80] @ (8021300 <tcp_output_segment+0x1bc>)
80212ae: 4810 ldr r0, [pc, #64] @ (80212f0 <tcp_output_segment+0x1ac>)
80212b0: f009 fbbc bl 802aa2c <iprintf>
}
#endif /* CHECKSUM_GEN_TCP */
TCP_STATS_INC(tcp.xmit);
NETIF_SET_HINTS(netif, &(pcb->netif_hints));
err = ip_output_if(seg->p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl,
80212b4: 68fb ldr r3, [r7, #12]
80212b6: 6858 ldr r0, [r3, #4]
80212b8: 68b9 ldr r1, [r7, #8]
80212ba: 68bb ldr r3, [r7, #8]
80212bc: 1d1c adds r4, r3, #4
80212be: 68bb ldr r3, [r7, #8]
80212c0: 7add ldrb r5, [r3, #11]
80212c2: 68bb ldr r3, [r7, #8]
80212c4: 7a9b ldrb r3, [r3, #10]
80212c6: 687a ldr r2, [r7, #4]
80212c8: 9202 str r2, [sp, #8]
80212ca: 2206 movs r2, #6
80212cc: 9201 str r2, [sp, #4]
80212ce: 9300 str r3, [sp, #0]
80212d0: 462b mov r3, r5
80212d2: 4622 mov r2, r4
80212d4: f004 fd7a bl 8025dcc <ip4_output_if>
80212d8: 4603 mov r3, r0
80212da: 75fb strb r3, [r7, #23]
seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum);
seg->chksum_swapped = 1;
}
#endif
return err;
80212dc: f997 3017 ldrsb.w r3, [r7, #23]
}
80212e0: 4618 mov r0, r3
80212e2: 3720 adds r7, #32
80212e4: 46bd mov sp, r7
80212e6: bdb0 pop {r4, r5, r7, pc}
80212e8: 080303d8 .word 0x080303d8
80212ec: 080309f8 .word 0x080309f8
80212f0: 0803042c .word 0x0803042c
80212f4: 08030a18 .word 0x08030a18
80212f8: 08030a38 .word 0x08030a38
80212fc: 2402afa8 .word 0x2402afa8
8021300: 08030a5c .word 0x08030a5c
08021304 <tcp_rexmit_rto_prepare>:
*
* @param pcb the tcp_pcb for which to re-enqueue all unacked segments
*/
err_t
tcp_rexmit_rto_prepare(struct tcp_pcb *pcb)
{
8021304: b5b0 push {r4, r5, r7, lr}
8021306: b084 sub sp, #16
8021308: af00 add r7, sp, #0
802130a: 6078 str r0, [r7, #4]
struct tcp_seg *seg;
LWIP_ASSERT("tcp_rexmit_rto_prepare: invalid pcb", pcb != NULL);
802130c: 687b ldr r3, [r7, #4]
802130e: 2b00 cmp r3, #0
8021310: d106 bne.n 8021320 <tcp_rexmit_rto_prepare+0x1c>
8021312: 4b36 ldr r3, [pc, #216] @ (80213ec <tcp_rexmit_rto_prepare+0xe8>)
8021314: f240 6263 movw r2, #1635 @ 0x663
8021318: 4935 ldr r1, [pc, #212] @ (80213f0 <tcp_rexmit_rto_prepare+0xec>)
802131a: 4836 ldr r0, [pc, #216] @ (80213f4 <tcp_rexmit_rto_prepare+0xf0>)
802131c: f009 fb86 bl 802aa2c <iprintf>
if (pcb->unacked == NULL) {
8021320: 687b ldr r3, [r7, #4]
8021322: 6f1b ldr r3, [r3, #112] @ 0x70
8021324: 2b00 cmp r3, #0
8021326: d102 bne.n 802132e <tcp_rexmit_rto_prepare+0x2a>
return ERR_VAL;
8021328: f06f 0305 mvn.w r3, #5
802132c: e059 b.n 80213e2 <tcp_rexmit_rto_prepare+0xde>
/* Move all unacked segments to the head of the unsent queue.
However, give up if any of the unsent pbufs are still referenced by the
netif driver due to deferred transmission. No point loading the link further
if it is struggling to flush its buffered writes. */
for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
802132e: 687b ldr r3, [r7, #4]
8021330: 6f1b ldr r3, [r3, #112] @ 0x70
8021332: 60fb str r3, [r7, #12]
8021334: e00b b.n 802134e <tcp_rexmit_rto_prepare+0x4a>
if (tcp_output_segment_busy(seg)) {
8021336: 68f8 ldr r0, [r7, #12]
8021338: f7ff fee4 bl 8021104 <tcp_output_segment_busy>
802133c: 4603 mov r3, r0
802133e: 2b00 cmp r3, #0
8021340: d002 beq.n 8021348 <tcp_rexmit_rto_prepare+0x44>
LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
return ERR_VAL;
8021342: f06f 0305 mvn.w r3, #5
8021346: e04c b.n 80213e2 <tcp_rexmit_rto_prepare+0xde>
for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
8021348: 68fb ldr r3, [r7, #12]
802134a: 681b ldr r3, [r3, #0]
802134c: 60fb str r3, [r7, #12]
802134e: 68fb ldr r3, [r7, #12]
8021350: 681b ldr r3, [r3, #0]
8021352: 2b00 cmp r3, #0
8021354: d1ef bne.n 8021336 <tcp_rexmit_rto_prepare+0x32>
}
}
if (tcp_output_segment_busy(seg)) {
8021356: 68f8 ldr r0, [r7, #12]
8021358: f7ff fed4 bl 8021104 <tcp_output_segment_busy>
802135c: 4603 mov r3, r0
802135e: 2b00 cmp r3, #0
8021360: d002 beq.n 8021368 <tcp_rexmit_rto_prepare+0x64>
LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
return ERR_VAL;
8021362: f06f 0305 mvn.w r3, #5
8021366: e03c b.n 80213e2 <tcp_rexmit_rto_prepare+0xde>
}
/* concatenate unsent queue after unacked queue */
seg->next = pcb->unsent;
8021368: 687b ldr r3, [r7, #4]
802136a: 6eda ldr r2, [r3, #108] @ 0x6c
802136c: 68fb ldr r3, [r7, #12]
802136e: 601a str r2, [r3, #0]
#if TCP_OVERSIZE_DBGCHECK
/* if last unsent changed, we need to update unsent_oversize */
if (pcb->unsent == NULL) {
8021370: 687b ldr r3, [r7, #4]
8021372: 6edb ldr r3, [r3, #108] @ 0x6c
8021374: 2b00 cmp r3, #0
8021376: d104 bne.n 8021382 <tcp_rexmit_rto_prepare+0x7e>
pcb->unsent_oversize = seg->oversize_left;
8021378: 68fb ldr r3, [r7, #12]
802137a: 895a ldrh r2, [r3, #10]
802137c: 687b ldr r3, [r7, #4]
802137e: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
}
#endif /* TCP_OVERSIZE_DBGCHECK */
/* unsent queue is the concatenated queue (of unacked, unsent) */
pcb->unsent = pcb->unacked;
8021382: 687b ldr r3, [r7, #4]
8021384: 6f1a ldr r2, [r3, #112] @ 0x70
8021386: 687b ldr r3, [r7, #4]
8021388: 66da str r2, [r3, #108] @ 0x6c
/* unacked queue is now empty */
pcb->unacked = NULL;
802138a: 687b ldr r3, [r7, #4]
802138c: 2200 movs r2, #0
802138e: 671a str r2, [r3, #112] @ 0x70
/* Mark RTO in-progress */
tcp_set_flags(pcb, TF_RTO);
8021390: 687b ldr r3, [r7, #4]
8021392: 8b5b ldrh r3, [r3, #26]
8021394: f443 6300 orr.w r3, r3, #2048 @ 0x800
8021398: b29a uxth r2, r3
802139a: 687b ldr r3, [r7, #4]
802139c: 835a strh r2, [r3, #26]
/* Record the next byte following retransmit */
pcb->rto_end = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
802139e: 68fb ldr r3, [r7, #12]
80213a0: 691b ldr r3, [r3, #16]
80213a2: 685b ldr r3, [r3, #4]
80213a4: 4618 mov r0, r3
80213a6: f7f8 fbfc bl 8019ba2 <lwip_htonl>
80213aa: 4604 mov r4, r0
80213ac: 68fb ldr r3, [r7, #12]
80213ae: 891b ldrh r3, [r3, #8]
80213b0: 461d mov r5, r3
80213b2: 68fb ldr r3, [r7, #12]
80213b4: 691b ldr r3, [r3, #16]
80213b6: 899b ldrh r3, [r3, #12]
80213b8: b29b uxth r3, r3
80213ba: 4618 mov r0, r3
80213bc: f7f8 fbdc bl 8019b78 <lwip_htons>
80213c0: 4603 mov r3, r0
80213c2: b2db uxtb r3, r3
80213c4: f003 0303 and.w r3, r3, #3
80213c8: 2b00 cmp r3, #0
80213ca: d001 beq.n 80213d0 <tcp_rexmit_rto_prepare+0xcc>
80213cc: 2301 movs r3, #1
80213ce: e000 b.n 80213d2 <tcp_rexmit_rto_prepare+0xce>
80213d0: 2300 movs r3, #0
80213d2: 442b add r3, r5
80213d4: 18e2 adds r2, r4, r3
80213d6: 687b ldr r3, [r7, #4]
80213d8: 64da str r2, [r3, #76] @ 0x4c
/* Don't take any RTT measurements after retransmitting. */
pcb->rttest = 0;
80213da: 687b ldr r3, [r7, #4]
80213dc: 2200 movs r2, #0
80213de: 635a str r2, [r3, #52] @ 0x34
return ERR_OK;
80213e0: 2300 movs r3, #0
}
80213e2: 4618 mov r0, r3
80213e4: 3710 adds r7, #16
80213e6: 46bd mov sp, r7
80213e8: bdb0 pop {r4, r5, r7, pc}
80213ea: bf00 nop
80213ec: 080303d8 .word 0x080303d8
80213f0: 08030a70 .word 0x08030a70
80213f4: 0803042c .word 0x0803042c
080213f8 <tcp_rexmit_rto_commit>:
*
* @param pcb the tcp_pcb for which to re-enqueue all unacked segments
*/
void
tcp_rexmit_rto_commit(struct tcp_pcb *pcb)
{
80213f8: b580 push {r7, lr}
80213fa: b082 sub sp, #8
80213fc: af00 add r7, sp, #0
80213fe: 6078 str r0, [r7, #4]
LWIP_ASSERT("tcp_rexmit_rto_commit: invalid pcb", pcb != NULL);
8021400: 687b ldr r3, [r7, #4]
8021402: 2b00 cmp r3, #0
8021404: d106 bne.n 8021414 <tcp_rexmit_rto_commit+0x1c>
8021406: 4b0d ldr r3, [pc, #52] @ (802143c <tcp_rexmit_rto_commit+0x44>)
8021408: f44f 62d3 mov.w r2, #1688 @ 0x698
802140c: 490c ldr r1, [pc, #48] @ (8021440 <tcp_rexmit_rto_commit+0x48>)
802140e: 480d ldr r0, [pc, #52] @ (8021444 <tcp_rexmit_rto_commit+0x4c>)
8021410: f009 fb0c bl 802aa2c <iprintf>
/* increment number of retransmissions */
if (pcb->nrtx < 0xFF) {
8021414: 687b ldr r3, [r7, #4]
8021416: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
802141a: 2bff cmp r3, #255 @ 0xff
802141c: d007 beq.n 802142e <tcp_rexmit_rto_commit+0x36>
++pcb->nrtx;
802141e: 687b ldr r3, [r7, #4]
8021420: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
8021424: 3301 adds r3, #1
8021426: b2da uxtb r2, r3
8021428: 687b ldr r3, [r7, #4]
802142a: f883 2042 strb.w r2, [r3, #66] @ 0x42
}
/* Do the actual retransmission */
tcp_output(pcb);
802142e: 6878 ldr r0, [r7, #4]
8021430: f7ff fc70 bl 8020d14 <tcp_output>
}
8021434: bf00 nop
8021436: 3708 adds r7, #8
8021438: 46bd mov sp, r7
802143a: bd80 pop {r7, pc}
802143c: 080303d8 .word 0x080303d8
8021440: 08030a94 .word 0x08030a94
8021444: 0803042c .word 0x0803042c
08021448 <tcp_rexmit_rto>:
*
* @param pcb the tcp_pcb for which to re-enqueue all unacked segments
*/
void
tcp_rexmit_rto(struct tcp_pcb *pcb)
{
8021448: b580 push {r7, lr}
802144a: b082 sub sp, #8
802144c: af00 add r7, sp, #0
802144e: 6078 str r0, [r7, #4]
LWIP_ASSERT("tcp_rexmit_rto: invalid pcb", pcb != NULL);
8021450: 687b ldr r3, [r7, #4]
8021452: 2b00 cmp r3, #0
8021454: d106 bne.n 8021464 <tcp_rexmit_rto+0x1c>
8021456: 4b0a ldr r3, [pc, #40] @ (8021480 <tcp_rexmit_rto+0x38>)
8021458: f240 62ad movw r2, #1709 @ 0x6ad
802145c: 4909 ldr r1, [pc, #36] @ (8021484 <tcp_rexmit_rto+0x3c>)
802145e: 480a ldr r0, [pc, #40] @ (8021488 <tcp_rexmit_rto+0x40>)
8021460: f009 fae4 bl 802aa2c <iprintf>
if (tcp_rexmit_rto_prepare(pcb) == ERR_OK) {
8021464: 6878 ldr r0, [r7, #4]
8021466: f7ff ff4d bl 8021304 <tcp_rexmit_rto_prepare>
802146a: 4603 mov r3, r0
802146c: 2b00 cmp r3, #0
802146e: d102 bne.n 8021476 <tcp_rexmit_rto+0x2e>
tcp_rexmit_rto_commit(pcb);
8021470: 6878 ldr r0, [r7, #4]
8021472: f7ff ffc1 bl 80213f8 <tcp_rexmit_rto_commit>
}
}
8021476: bf00 nop
8021478: 3708 adds r7, #8
802147a: 46bd mov sp, r7
802147c: bd80 pop {r7, pc}
802147e: bf00 nop
8021480: 080303d8 .word 0x080303d8
8021484: 08030ab8 .word 0x08030ab8
8021488: 0803042c .word 0x0803042c
0802148c <tcp_rexmit>:
*
* @param pcb the tcp_pcb for which to retransmit the first unacked segment
*/
err_t
tcp_rexmit(struct tcp_pcb *pcb)
{
802148c: b590 push {r4, r7, lr}
802148e: b085 sub sp, #20
8021490: af00 add r7, sp, #0
8021492: 6078 str r0, [r7, #4]
struct tcp_seg *seg;
struct tcp_seg **cur_seg;
LWIP_ASSERT("tcp_rexmit: invalid pcb", pcb != NULL);
8021494: 687b ldr r3, [r7, #4]
8021496: 2b00 cmp r3, #0
8021498: d106 bne.n 80214a8 <tcp_rexmit+0x1c>
802149a: 4b2f ldr r3, [pc, #188] @ (8021558 <tcp_rexmit+0xcc>)
802149c: f240 62c1 movw r2, #1729 @ 0x6c1
80214a0: 492e ldr r1, [pc, #184] @ (802155c <tcp_rexmit+0xd0>)
80214a2: 482f ldr r0, [pc, #188] @ (8021560 <tcp_rexmit+0xd4>)
80214a4: f009 fac2 bl 802aa2c <iprintf>
if (pcb->unacked == NULL) {
80214a8: 687b ldr r3, [r7, #4]
80214aa: 6f1b ldr r3, [r3, #112] @ 0x70
80214ac: 2b00 cmp r3, #0
80214ae: d102 bne.n 80214b6 <tcp_rexmit+0x2a>
return ERR_VAL;
80214b0: f06f 0305 mvn.w r3, #5
80214b4: e04c b.n 8021550 <tcp_rexmit+0xc4>
}
seg = pcb->unacked;
80214b6: 687b ldr r3, [r7, #4]
80214b8: 6f1b ldr r3, [r3, #112] @ 0x70
80214ba: 60bb str r3, [r7, #8]
/* Give up if the segment is still referenced by the netif driver
due to deferred transmission. */
if (tcp_output_segment_busy(seg)) {
80214bc: 68b8 ldr r0, [r7, #8]
80214be: f7ff fe21 bl 8021104 <tcp_output_segment_busy>
80214c2: 4603 mov r3, r0
80214c4: 2b00 cmp r3, #0
80214c6: d002 beq.n 80214ce <tcp_rexmit+0x42>
LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit busy\n"));
return ERR_VAL;
80214c8: f06f 0305 mvn.w r3, #5
80214cc: e040 b.n 8021550 <tcp_rexmit+0xc4>
}
/* Move the first unacked segment to the unsent queue */
/* Keep the unsent queue sorted. */
pcb->unacked = seg->next;
80214ce: 68bb ldr r3, [r7, #8]
80214d0: 681a ldr r2, [r3, #0]
80214d2: 687b ldr r3, [r7, #4]
80214d4: 671a str r2, [r3, #112] @ 0x70
cur_seg = &(pcb->unsent);
80214d6: 687b ldr r3, [r7, #4]
80214d8: 336c adds r3, #108 @ 0x6c
80214da: 60fb str r3, [r7, #12]
while (*cur_seg &&
80214dc: e002 b.n 80214e4 <tcp_rexmit+0x58>
TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
cur_seg = &((*cur_seg)->next );
80214de: 68fb ldr r3, [r7, #12]
80214e0: 681b ldr r3, [r3, #0]
80214e2: 60fb str r3, [r7, #12]
while (*cur_seg &&
80214e4: 68fb ldr r3, [r7, #12]
80214e6: 681b ldr r3, [r3, #0]
80214e8: 2b00 cmp r3, #0
80214ea: d011 beq.n 8021510 <tcp_rexmit+0x84>
TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
80214ec: 68fb ldr r3, [r7, #12]
80214ee: 681b ldr r3, [r3, #0]
80214f0: 691b ldr r3, [r3, #16]
80214f2: 685b ldr r3, [r3, #4]
80214f4: 4618 mov r0, r3
80214f6: f7f8 fb54 bl 8019ba2 <lwip_htonl>
80214fa: 4604 mov r4, r0
80214fc: 68bb ldr r3, [r7, #8]
80214fe: 691b ldr r3, [r3, #16]
8021500: 685b ldr r3, [r3, #4]
8021502: 4618 mov r0, r3
8021504: f7f8 fb4d bl 8019ba2 <lwip_htonl>
8021508: 4603 mov r3, r0
802150a: 1ae3 subs r3, r4, r3
while (*cur_seg &&
802150c: 2b00 cmp r3, #0
802150e: dbe6 blt.n 80214de <tcp_rexmit+0x52>
}
seg->next = *cur_seg;
8021510: 68fb ldr r3, [r7, #12]
8021512: 681a ldr r2, [r3, #0]
8021514: 68bb ldr r3, [r7, #8]
8021516: 601a str r2, [r3, #0]
*cur_seg = seg;
8021518: 68fb ldr r3, [r7, #12]
802151a: 68ba ldr r2, [r7, #8]
802151c: 601a str r2, [r3, #0]
#if TCP_OVERSIZE
if (seg->next == NULL) {
802151e: 68bb ldr r3, [r7, #8]
8021520: 681b ldr r3, [r3, #0]
8021522: 2b00 cmp r3, #0
8021524: d103 bne.n 802152e <tcp_rexmit+0xa2>
/* the retransmitted segment is last in unsent, so reset unsent_oversize */
pcb->unsent_oversize = 0;
8021526: 687b ldr r3, [r7, #4]
8021528: 2200 movs r2, #0
802152a: f8a3 2068 strh.w r2, [r3, #104] @ 0x68
}
#endif /* TCP_OVERSIZE */
if (pcb->nrtx < 0xFF) {
802152e: 687b ldr r3, [r7, #4]
8021530: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
8021534: 2bff cmp r3, #255 @ 0xff
8021536: d007 beq.n 8021548 <tcp_rexmit+0xbc>
++pcb->nrtx;
8021538: 687b ldr r3, [r7, #4]
802153a: f893 3042 ldrb.w r3, [r3, #66] @ 0x42
802153e: 3301 adds r3, #1
8021540: b2da uxtb r2, r3
8021542: 687b ldr r3, [r7, #4]
8021544: f883 2042 strb.w r2, [r3, #66] @ 0x42
}
/* Don't take any rtt measurements after retransmitting. */
pcb->rttest = 0;
8021548: 687b ldr r3, [r7, #4]
802154a: 2200 movs r2, #0
802154c: 635a str r2, [r3, #52] @ 0x34
/* Do the actual retransmission. */
MIB2_STATS_INC(mib2.tcpretranssegs);
/* No need to call tcp_output: we are always called from tcp_input()
and thus tcp_output directly returns. */
return ERR_OK;
802154e: 2300 movs r3, #0
}
8021550: 4618 mov r0, r3
8021552: 3714 adds r7, #20
8021554: 46bd mov sp, r7
8021556: bd90 pop {r4, r7, pc}
8021558: 080303d8 .word 0x080303d8
802155c: 08030ad4 .word 0x08030ad4
8021560: 0803042c .word 0x0803042c
08021564 <tcp_rexmit_fast>:
*
* @param pcb the tcp_pcb for which to retransmit the first unacked segment
*/
void
tcp_rexmit_fast(struct tcp_pcb *pcb)
{
8021564: b580 push {r7, lr}
8021566: b082 sub sp, #8
8021568: af00 add r7, sp, #0
802156a: 6078 str r0, [r7, #4]
LWIP_ASSERT("tcp_rexmit_fast: invalid pcb", pcb != NULL);
802156c: 687b ldr r3, [r7, #4]
802156e: 2b00 cmp r3, #0
8021570: d106 bne.n 8021580 <tcp_rexmit_fast+0x1c>
8021572: 4b2a ldr r3, [pc, #168] @ (802161c <tcp_rexmit_fast+0xb8>)
8021574: f240 62f9 movw r2, #1785 @ 0x6f9
8021578: 4929 ldr r1, [pc, #164] @ (8021620 <tcp_rexmit_fast+0xbc>)
802157a: 482a ldr r0, [pc, #168] @ (8021624 <tcp_rexmit_fast+0xc0>)
802157c: f009 fa56 bl 802aa2c <iprintf>
if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) {
8021580: 687b ldr r3, [r7, #4]
8021582: 6f1b ldr r3, [r3, #112] @ 0x70
8021584: 2b00 cmp r3, #0
8021586: d045 beq.n 8021614 <tcp_rexmit_fast+0xb0>
8021588: 687b ldr r3, [r7, #4]
802158a: 8b5b ldrh r3, [r3, #26]
802158c: f003 0304 and.w r3, r3, #4
8021590: 2b00 cmp r3, #0
8021592: d13f bne.n 8021614 <tcp_rexmit_fast+0xb0>
LWIP_DEBUGF(TCP_FR_DEBUG,
("tcp_receive: dupacks %"U16_F" (%"U32_F
"), fast retransmit %"U32_F"\n",
(u16_t)pcb->dupacks, pcb->lastack,
lwip_ntohl(pcb->unacked->tcphdr->seqno)));
if (tcp_rexmit(pcb) == ERR_OK) {
8021594: 6878 ldr r0, [r7, #4]
8021596: f7ff ff79 bl 802148c <tcp_rexmit>
802159a: 4603 mov r3, r0
802159c: 2b00 cmp r3, #0
802159e: d139 bne.n 8021614 <tcp_rexmit_fast+0xb0>
/* Set ssthresh to half of the minimum of the current
* cwnd and the advertised window */
pcb->ssthresh = LWIP_MIN(pcb->cwnd, pcb->snd_wnd) / 2;
80215a0: 687b ldr r3, [r7, #4]
80215a2: f8b3 2060 ldrh.w r2, [r3, #96] @ 0x60
80215a6: 687b ldr r3, [r7, #4]
80215a8: f8b3 3048 ldrh.w r3, [r3, #72] @ 0x48
80215ac: 4293 cmp r3, r2
80215ae: bf28 it cs
80215b0: 4613 movcs r3, r2
80215b2: b29b uxth r3, r3
80215b4: 2b00 cmp r3, #0
80215b6: da00 bge.n 80215ba <tcp_rexmit_fast+0x56>
80215b8: 3301 adds r3, #1
80215ba: 105b asrs r3, r3, #1
80215bc: b29a uxth r2, r3
80215be: 687b ldr r3, [r7, #4]
80215c0: f8a3 204a strh.w r2, [r3, #74] @ 0x4a
/* The minimum value for ssthresh should be 2 MSS */
if (pcb->ssthresh < (2U * pcb->mss)) {
80215c4: 687b ldr r3, [r7, #4]
80215c6: f8b3 304a ldrh.w r3, [r3, #74] @ 0x4a
80215ca: 461a mov r2, r3
80215cc: 687b ldr r3, [r7, #4]
80215ce: 8e5b ldrh r3, [r3, #50] @ 0x32
80215d0: 005b lsls r3, r3, #1
80215d2: 429a cmp r2, r3
80215d4: d206 bcs.n 80215e4 <tcp_rexmit_fast+0x80>
LWIP_DEBUGF(TCP_FR_DEBUG,
("tcp_receive: The minimum value for ssthresh %"TCPWNDSIZE_F
" should be min 2 mss %"U16_F"...\n",
pcb->ssthresh, (u16_t)(2 * pcb->mss)));
pcb->ssthresh = 2 * pcb->mss;
80215d6: 687b ldr r3, [r7, #4]
80215d8: 8e5b ldrh r3, [r3, #50] @ 0x32
80215da: 005b lsls r3, r3, #1
80215dc: b29a uxth r2, r3
80215de: 687b ldr r3, [r7, #4]
80215e0: f8a3 204a strh.w r2, [r3, #74] @ 0x4a
}
pcb->cwnd = pcb->ssthresh + 3 * pcb->mss;
80215e4: 687b ldr r3, [r7, #4]
80215e6: f8b3 204a ldrh.w r2, [r3, #74] @ 0x4a
80215ea: 687b ldr r3, [r7, #4]
80215ec: 8e5b ldrh r3, [r3, #50] @ 0x32
80215ee: 4619 mov r1, r3
80215f0: 0049 lsls r1, r1, #1
80215f2: 440b add r3, r1
80215f4: b29b uxth r3, r3
80215f6: 4413 add r3, r2
80215f8: b29a uxth r2, r3
80215fa: 687b ldr r3, [r7, #4]
80215fc: f8a3 2048 strh.w r2, [r3, #72] @ 0x48
tcp_set_flags(pcb, TF_INFR);
8021600: 687b ldr r3, [r7, #4]
8021602: 8b5b ldrh r3, [r3, #26]
8021604: f043 0304 orr.w r3, r3, #4
8021608: b29a uxth r2, r3
802160a: 687b ldr r3, [r7, #4]
802160c: 835a strh r2, [r3, #26]
/* Reset the retransmission timer to prevent immediate rto retransmissions */
pcb->rtime = 0;
802160e: 687b ldr r3, [r7, #4]
8021610: 2200 movs r2, #0
8021612: 861a strh r2, [r3, #48] @ 0x30
}
}
}
8021614: bf00 nop
8021616: 3708 adds r7, #8
8021618: 46bd mov sp, r7
802161a: bd80 pop {r7, pc}
802161c: 080303d8 .word 0x080303d8
8021620: 08030aec .word 0x08030aec
8021624: 0803042c .word 0x0803042c
08021628 <tcp_output_alloc_header_common>:
static struct pbuf *
tcp_output_alloc_header_common(u32_t ackno, u16_t optlen, u16_t datalen,
u32_t seqno_be /* already in network byte order */,
u16_t src_port, u16_t dst_port, u8_t flags, u16_t wnd)
{
8021628: b580 push {r7, lr}
802162a: b086 sub sp, #24
802162c: af00 add r7, sp, #0
802162e: 60f8 str r0, [r7, #12]
8021630: 607b str r3, [r7, #4]
8021632: 460b mov r3, r1
8021634: 817b strh r3, [r7, #10]
8021636: 4613 mov r3, r2
8021638: 813b strh r3, [r7, #8]
struct tcp_hdr *tcphdr;
struct pbuf *p;
p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM);
802163a: 897a ldrh r2, [r7, #10]
802163c: 893b ldrh r3, [r7, #8]
802163e: 4413 add r3, r2
8021640: b29b uxth r3, r3
8021642: 3314 adds r3, #20
8021644: b29b uxth r3, r3
8021646: f44f 7220 mov.w r2, #640 @ 0x280
802164a: 4619 mov r1, r3
802164c: 2022 movs r0, #34 @ 0x22
802164e: f7f9 fc5f bl 801af10 <pbuf_alloc>
8021652: 6178 str r0, [r7, #20]
if (p != NULL) {
8021654: 697b ldr r3, [r7, #20]
8021656: 2b00 cmp r3, #0
8021658: d04d beq.n 80216f6 <tcp_output_alloc_header_common+0xce>
LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr",
802165a: 897b ldrh r3, [r7, #10]
802165c: 3313 adds r3, #19
802165e: 697a ldr r2, [r7, #20]
8021660: 8952 ldrh r2, [r2, #10]
8021662: 4293 cmp r3, r2
8021664: db06 blt.n 8021674 <tcp_output_alloc_header_common+0x4c>
8021666: 4b26 ldr r3, [pc, #152] @ (8021700 <tcp_output_alloc_header_common+0xd8>)
8021668: f240 7223 movw r2, #1827 @ 0x723
802166c: 4925 ldr r1, [pc, #148] @ (8021704 <tcp_output_alloc_header_common+0xdc>)
802166e: 4826 ldr r0, [pc, #152] @ (8021708 <tcp_output_alloc_header_common+0xe0>)
8021670: f009 f9dc bl 802aa2c <iprintf>
(p->len >= TCP_HLEN + optlen));
tcphdr = (struct tcp_hdr *)p->payload;
8021674: 697b ldr r3, [r7, #20]
8021676: 685b ldr r3, [r3, #4]
8021678: 613b str r3, [r7, #16]
tcphdr->src = lwip_htons(src_port);
802167a: 8c3b ldrh r3, [r7, #32]
802167c: 4618 mov r0, r3
802167e: f7f8 fa7b bl 8019b78 <lwip_htons>
8021682: 4603 mov r3, r0
8021684: 461a mov r2, r3
8021686: 693b ldr r3, [r7, #16]
8021688: 801a strh r2, [r3, #0]
tcphdr->dest = lwip_htons(dst_port);
802168a: 8cbb ldrh r3, [r7, #36] @ 0x24
802168c: 4618 mov r0, r3
802168e: f7f8 fa73 bl 8019b78 <lwip_htons>
8021692: 4603 mov r3, r0
8021694: 461a mov r2, r3
8021696: 693b ldr r3, [r7, #16]
8021698: 805a strh r2, [r3, #2]
tcphdr->seqno = seqno_be;
802169a: 693b ldr r3, [r7, #16]
802169c: 687a ldr r2, [r7, #4]
802169e: 605a str r2, [r3, #4]
tcphdr->ackno = lwip_htonl(ackno);
80216a0: 68f8 ldr r0, [r7, #12]
80216a2: f7f8 fa7e bl 8019ba2 <lwip_htonl>
80216a6: 4602 mov r2, r0
80216a8: 693b ldr r3, [r7, #16]
80216aa: 609a str r2, [r3, #8]
TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), flags);
80216ac: 897b ldrh r3, [r7, #10]
80216ae: 089b lsrs r3, r3, #2
80216b0: b29b uxth r3, r3
80216b2: 3305 adds r3, #5
80216b4: b29b uxth r3, r3
80216b6: 031b lsls r3, r3, #12
80216b8: b29a uxth r2, r3
80216ba: f897 3028 ldrb.w r3, [r7, #40] @ 0x28
80216be: b29b uxth r3, r3
80216c0: 4313 orrs r3, r2
80216c2: b29b uxth r3, r3
80216c4: 4618 mov r0, r3
80216c6: f7f8 fa57 bl 8019b78 <lwip_htons>
80216ca: 4603 mov r3, r0
80216cc: 461a mov r2, r3
80216ce: 693b ldr r3, [r7, #16]
80216d0: 819a strh r2, [r3, #12]
tcphdr->wnd = lwip_htons(wnd);
80216d2: 8dbb ldrh r3, [r7, #44] @ 0x2c
80216d4: 4618 mov r0, r3
80216d6: f7f8 fa4f bl 8019b78 <lwip_htons>
80216da: 4603 mov r3, r0
80216dc: 461a mov r2, r3
80216de: 693b ldr r3, [r7, #16]
80216e0: 81da strh r2, [r3, #14]
tcphdr->chksum = 0;
80216e2: 693b ldr r3, [r7, #16]
80216e4: 2200 movs r2, #0
80216e6: 741a strb r2, [r3, #16]
80216e8: 2200 movs r2, #0
80216ea: 745a strb r2, [r3, #17]
tcphdr->urgp = 0;
80216ec: 693b ldr r3, [r7, #16]
80216ee: 2200 movs r2, #0
80216f0: 749a strb r2, [r3, #18]
80216f2: 2200 movs r2, #0
80216f4: 74da strb r2, [r3, #19]
}
return p;
80216f6: 697b ldr r3, [r7, #20]
}
80216f8: 4618 mov r0, r3
80216fa: 3718 adds r7, #24
80216fc: 46bd mov sp, r7
80216fe: bd80 pop {r7, pc}
8021700: 080303d8 .word 0x080303d8
8021704: 08030b0c .word 0x08030b0c
8021708: 0803042c .word 0x0803042c
0802170c <tcp_output_alloc_header>:
* @return pbuf with p->payload being the tcp_hdr
*/
static struct pbuf *
tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen,
u32_t seqno_be /* already in network byte order */)
{
802170c: b5b0 push {r4, r5, r7, lr}
802170e: b08a sub sp, #40 @ 0x28
8021710: af04 add r7, sp, #16
8021712: 60f8 str r0, [r7, #12]
8021714: 607b str r3, [r7, #4]
8021716: 460b mov r3, r1
8021718: 817b strh r3, [r7, #10]
802171a: 4613 mov r3, r2
802171c: 813b strh r3, [r7, #8]
struct pbuf *p;
LWIP_ASSERT("tcp_output_alloc_header: invalid pcb", pcb != NULL);
802171e: 68fb ldr r3, [r7, #12]
8021720: 2b00 cmp r3, #0
8021722: d106 bne.n 8021732 <tcp_output_alloc_header+0x26>
8021724: 4b15 ldr r3, [pc, #84] @ (802177c <tcp_output_alloc_header+0x70>)
8021726: f240 7242 movw r2, #1858 @ 0x742
802172a: 4915 ldr r1, [pc, #84] @ (8021780 <tcp_output_alloc_header+0x74>)
802172c: 4815 ldr r0, [pc, #84] @ (8021784 <tcp_output_alloc_header+0x78>)
802172e: f009 f97d bl 802aa2c <iprintf>
p = tcp_output_alloc_header_common(pcb->rcv_nxt, optlen, datalen,
8021732: 68fb ldr r3, [r7, #12]
8021734: 6a58 ldr r0, [r3, #36] @ 0x24
8021736: 68fb ldr r3, [r7, #12]
8021738: 8adb ldrh r3, [r3, #22]
802173a: 68fa ldr r2, [r7, #12]
802173c: 8b12 ldrh r2, [r2, #24]
802173e: 68f9 ldr r1, [r7, #12]
8021740: 8d49 ldrh r1, [r1, #42] @ 0x2a
8021742: 893d ldrh r5, [r7, #8]
8021744: 897c ldrh r4, [r7, #10]
8021746: 9103 str r1, [sp, #12]
8021748: 2110 movs r1, #16
802174a: 9102 str r1, [sp, #8]
802174c: 9201 str r2, [sp, #4]
802174e: 9300 str r3, [sp, #0]
8021750: 687b ldr r3, [r7, #4]
8021752: 462a mov r2, r5
8021754: 4621 mov r1, r4
8021756: f7ff ff67 bl 8021628 <tcp_output_alloc_header_common>
802175a: 6178 str r0, [r7, #20]
seqno_be, pcb->local_port, pcb->remote_port, TCP_ACK,
TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
if (p != NULL) {
802175c: 697b ldr r3, [r7, #20]
802175e: 2b00 cmp r3, #0
8021760: d006 beq.n 8021770 <tcp_output_alloc_header+0x64>
/* If we're sending a packet, update the announced right window edge */
pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
8021762: 68fb ldr r3, [r7, #12]
8021764: 6a5b ldr r3, [r3, #36] @ 0x24
8021766: 68fa ldr r2, [r7, #12]
8021768: 8d52 ldrh r2, [r2, #42] @ 0x2a
802176a: 441a add r2, r3
802176c: 68fb ldr r3, [r7, #12]
802176e: 62da str r2, [r3, #44] @ 0x2c
}
return p;
8021770: 697b ldr r3, [r7, #20]
}
8021772: 4618 mov r0, r3
8021774: 3718 adds r7, #24
8021776: 46bd mov sp, r7
8021778: bdb0 pop {r4, r5, r7, pc}
802177a: bf00 nop
802177c: 080303d8 .word 0x080303d8
8021780: 08030b3c .word 0x08030b3c
8021784: 0803042c .word 0x0803042c
08021788 <tcp_output_fill_options>:
/* Fill in options for control segments */
static void
tcp_output_fill_options(const struct tcp_pcb *pcb, struct pbuf *p, u8_t optflags, u8_t num_sacks)
{
8021788: b580 push {r7, lr}
802178a: b088 sub sp, #32
802178c: af00 add r7, sp, #0
802178e: 60f8 str r0, [r7, #12]
8021790: 60b9 str r1, [r7, #8]
8021792: 4611 mov r1, r2
8021794: 461a mov r2, r3
8021796: 460b mov r3, r1
8021798: 71fb strb r3, [r7, #7]
802179a: 4613 mov r3, r2
802179c: 71bb strb r3, [r7, #6]
struct tcp_hdr *tcphdr;
u32_t *opts;
u16_t sacks_len = 0;
802179e: 2300 movs r3, #0
80217a0: 83fb strh r3, [r7, #30]
LWIP_ASSERT("tcp_output_fill_options: invalid pbuf", p != NULL);
80217a2: 68bb ldr r3, [r7, #8]
80217a4: 2b00 cmp r3, #0
80217a6: d106 bne.n 80217b6 <tcp_output_fill_options+0x2e>
80217a8: 4b12 ldr r3, [pc, #72] @ (80217f4 <tcp_output_fill_options+0x6c>)
80217aa: f240 7256 movw r2, #1878 @ 0x756
80217ae: 4912 ldr r1, [pc, #72] @ (80217f8 <tcp_output_fill_options+0x70>)
80217b0: 4812 ldr r0, [pc, #72] @ (80217fc <tcp_output_fill_options+0x74>)
80217b2: f009 f93b bl 802aa2c <iprintf>
tcphdr = (struct tcp_hdr *)p->payload;
80217b6: 68bb ldr r3, [r7, #8]
80217b8: 685b ldr r3, [r3, #4]
80217ba: 61bb str r3, [r7, #24]
opts = (u32_t *)(void *)(tcphdr + 1);
80217bc: 69bb ldr r3, [r7, #24]
80217be: 3314 adds r3, #20
80217c0: 617b str r3, [r7, #20]
opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, tcphdr, pcb, opts);
#endif
LWIP_UNUSED_ARG(pcb);
LWIP_UNUSED_ARG(sacks_len);
LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(tcphdr + 1)) + sacks_len * 4 + LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb));
80217c2: 8bfb ldrh r3, [r7, #30]
80217c4: 009b lsls r3, r3, #2
80217c6: 461a mov r2, r3
80217c8: 79fb ldrb r3, [r7, #7]
80217ca: 009b lsls r3, r3, #2
80217cc: f003 0304 and.w r3, r3, #4
80217d0: 4413 add r3, r2
80217d2: 3314 adds r3, #20
80217d4: 69ba ldr r2, [r7, #24]
80217d6: 4413 add r3, r2
80217d8: 697a ldr r2, [r7, #20]
80217da: 429a cmp r2, r3
80217dc: d006 beq.n 80217ec <tcp_output_fill_options+0x64>
80217de: 4b05 ldr r3, [pc, #20] @ (80217f4 <tcp_output_fill_options+0x6c>)
80217e0: f240 7275 movw r2, #1909 @ 0x775
80217e4: 4906 ldr r1, [pc, #24] @ (8021800 <tcp_output_fill_options+0x78>)
80217e6: 4805 ldr r0, [pc, #20] @ (80217fc <tcp_output_fill_options+0x74>)
80217e8: f009 f920 bl 802aa2c <iprintf>
LWIP_UNUSED_ARG(optflags); /* for LWIP_NOASSERT */
LWIP_UNUSED_ARG(opts); /* for LWIP_NOASSERT */
}
80217ec: bf00 nop
80217ee: 3720 adds r7, #32
80217f0: 46bd mov sp, r7
80217f2: bd80 pop {r7, pc}
80217f4: 080303d8 .word 0x080303d8
80217f8: 08030b64 .word 0x08030b64
80217fc: 0803042c .word 0x0803042c
8021800: 08030a5c .word 0x08030a5c
08021804 <tcp_output_control_segment>:
* header checksum and calling ip_output_if while handling netif hints and stats.
*/
static err_t
tcp_output_control_segment(const struct tcp_pcb *pcb, struct pbuf *p,
const ip_addr_t *src, const ip_addr_t *dst)
{
8021804: b580 push {r7, lr}
8021806: b08a sub sp, #40 @ 0x28
8021808: af04 add r7, sp, #16
802180a: 60f8 str r0, [r7, #12]
802180c: 60b9 str r1, [r7, #8]
802180e: 607a str r2, [r7, #4]
8021810: 603b str r3, [r7, #0]
err_t err;
struct netif *netif;
LWIP_ASSERT("tcp_output_control_segment: invalid pbuf", p != NULL);
8021812: 68bb ldr r3, [r7, #8]
8021814: 2b00 cmp r3, #0
8021816: d106 bne.n 8021826 <tcp_output_control_segment+0x22>
8021818: 4b1c ldr r3, [pc, #112] @ (802188c <tcp_output_control_segment+0x88>)
802181a: f240 7287 movw r2, #1927 @ 0x787
802181e: 491c ldr r1, [pc, #112] @ (8021890 <tcp_output_control_segment+0x8c>)
8021820: 481c ldr r0, [pc, #112] @ (8021894 <tcp_output_control_segment+0x90>)
8021822: f009 f903 bl 802aa2c <iprintf>
netif = tcp_route(pcb, src, dst);
8021826: 683a ldr r2, [r7, #0]
8021828: 6879 ldr r1, [r7, #4]
802182a: 68f8 ldr r0, [r7, #12]
802182c: f7fe fa78 bl 801fd20 <tcp_route>
8021830: 6138 str r0, [r7, #16]
if (netif == NULL) {
8021832: 693b ldr r3, [r7, #16]
8021834: 2b00 cmp r3, #0
8021836: d102 bne.n 802183e <tcp_output_control_segment+0x3a>
err = ERR_RTE;
8021838: 23fc movs r3, #252 @ 0xfc
802183a: 75fb strb r3, [r7, #23]
802183c: e01c b.n 8021878 <tcp_output_control_segment+0x74>
struct tcp_hdr *tcphdr = (struct tcp_hdr *)p->payload;
tcphdr->chksum = ip_chksum_pseudo(p, IP_PROTO_TCP, p->tot_len,
src, dst);
}
#endif
if (pcb != NULL) {
802183e: 68fb ldr r3, [r7, #12]
8021840: 2b00 cmp r3, #0
8021842: d006 beq.n 8021852 <tcp_output_control_segment+0x4e>
NETIF_SET_HINTS(netif, LWIP_CONST_CAST(struct netif_hint*, &(pcb->netif_hints)));
ttl = pcb->ttl;
8021844: 68fb ldr r3, [r7, #12]
8021846: 7adb ldrb r3, [r3, #11]
8021848: 75bb strb r3, [r7, #22]
tos = pcb->tos;
802184a: 68fb ldr r3, [r7, #12]
802184c: 7a9b ldrb r3, [r3, #10]
802184e: 757b strb r3, [r7, #21]
8021850: e003 b.n 802185a <tcp_output_control_segment+0x56>
} else {
/* Send output with hardcoded TTL/HL since we have no access to the pcb */
ttl = TCP_TTL;
8021852: 23ff movs r3, #255 @ 0xff
8021854: 75bb strb r3, [r7, #22]
tos = 0;
8021856: 2300 movs r3, #0
8021858: 757b strb r3, [r7, #21]
}
TCP_STATS_INC(tcp.xmit);
err = ip_output_if(p, src, dst, ttl, tos, IP_PROTO_TCP, netif);
802185a: 7dba ldrb r2, [r7, #22]
802185c: 693b ldr r3, [r7, #16]
802185e: 9302 str r3, [sp, #8]
8021860: 2306 movs r3, #6
8021862: 9301 str r3, [sp, #4]
8021864: 7d7b ldrb r3, [r7, #21]
8021866: 9300 str r3, [sp, #0]
8021868: 4613 mov r3, r2
802186a: 683a ldr r2, [r7, #0]
802186c: 6879 ldr r1, [r7, #4]
802186e: 68b8 ldr r0, [r7, #8]
8021870: f004 faac bl 8025dcc <ip4_output_if>
8021874: 4603 mov r3, r0
8021876: 75fb strb r3, [r7, #23]
NETIF_RESET_HINTS(netif);
}
pbuf_free(p);
8021878: 68b8 ldr r0, [r7, #8]
802187a: f7f9 fe5f bl 801b53c <pbuf_free>
return err;
802187e: f997 3017 ldrsb.w r3, [r7, #23]
}
8021882: 4618 mov r0, r3
8021884: 3718 adds r7, #24
8021886: 46bd mov sp, r7
8021888: bd80 pop {r7, pc}
802188a: bf00 nop
802188c: 080303d8 .word 0x080303d8
8021890: 08030b8c .word 0x08030b8c
8021894: 0803042c .word 0x0803042c
08021898 <tcp_rst>:
*/
void
tcp_rst(const struct tcp_pcb *pcb, u32_t seqno, u32_t ackno,
const ip_addr_t *local_ip, const ip_addr_t *remote_ip,
u16_t local_port, u16_t remote_port)
{
8021898: b590 push {r4, r7, lr}
802189a: b08b sub sp, #44 @ 0x2c
802189c: af04 add r7, sp, #16
802189e: 60f8 str r0, [r7, #12]
80218a0: 60b9 str r1, [r7, #8]
80218a2: 607a str r2, [r7, #4]
80218a4: 603b str r3, [r7, #0]
struct pbuf *p;
u16_t wnd;
u8_t optlen;
LWIP_ASSERT("tcp_rst: invalid local_ip", local_ip != NULL);
80218a6: 683b ldr r3, [r7, #0]
80218a8: 2b00 cmp r3, #0
80218aa: d106 bne.n 80218ba <tcp_rst+0x22>
80218ac: 4b1f ldr r3, [pc, #124] @ (802192c <tcp_rst+0x94>)
80218ae: f240 72c4 movw r2, #1988 @ 0x7c4
80218b2: 491f ldr r1, [pc, #124] @ (8021930 <tcp_rst+0x98>)
80218b4: 481f ldr r0, [pc, #124] @ (8021934 <tcp_rst+0x9c>)
80218b6: f009 f8b9 bl 802aa2c <iprintf>
LWIP_ASSERT("tcp_rst: invalid remote_ip", remote_ip != NULL);
80218ba: 6abb ldr r3, [r7, #40] @ 0x28
80218bc: 2b00 cmp r3, #0
80218be: d106 bne.n 80218ce <tcp_rst+0x36>
80218c0: 4b1a ldr r3, [pc, #104] @ (802192c <tcp_rst+0x94>)
80218c2: f240 72c5 movw r2, #1989 @ 0x7c5
80218c6: 491c ldr r1, [pc, #112] @ (8021938 <tcp_rst+0xa0>)
80218c8: 481a ldr r0, [pc, #104] @ (8021934 <tcp_rst+0x9c>)
80218ca: f009 f8af bl 802aa2c <iprintf>
optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
80218ce: 2300 movs r3, #0
80218d0: 75fb strb r3, [r7, #23]
#if LWIP_WND_SCALE
wnd = PP_HTONS(((TCP_WND >> TCP_RCV_SCALE) & 0xFFFF));
#else
wnd = PP_HTONS(TCP_WND);
80218d2: f24d 0316 movw r3, #53270 @ 0xd016
80218d6: 82bb strh r3, [r7, #20]
#endif
p = tcp_output_alloc_header_common(ackno, optlen, 0, lwip_htonl(seqno), local_port,
80218d8: 7dfb ldrb r3, [r7, #23]
80218da: b29c uxth r4, r3
80218dc: 68b8 ldr r0, [r7, #8]
80218de: f7f8 f960 bl 8019ba2 <lwip_htonl>
80218e2: 4602 mov r2, r0
80218e4: 8abb ldrh r3, [r7, #20]
80218e6: 9303 str r3, [sp, #12]
80218e8: 2314 movs r3, #20
80218ea: 9302 str r3, [sp, #8]
80218ec: 8e3b ldrh r3, [r7, #48] @ 0x30
80218ee: 9301 str r3, [sp, #4]
80218f0: 8dbb ldrh r3, [r7, #44] @ 0x2c
80218f2: 9300 str r3, [sp, #0]
80218f4: 4613 mov r3, r2
80218f6: 2200 movs r2, #0
80218f8: 4621 mov r1, r4
80218fa: 6878 ldr r0, [r7, #4]
80218fc: f7ff fe94 bl 8021628 <tcp_output_alloc_header_common>
8021900: 6138 str r0, [r7, #16]
remote_port, TCP_RST | TCP_ACK, wnd);
if (p == NULL) {
8021902: 693b ldr r3, [r7, #16]
8021904: 2b00 cmp r3, #0
8021906: d00c beq.n 8021922 <tcp_rst+0x8a>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n"));
return;
}
tcp_output_fill_options(pcb, p, 0, optlen);
8021908: 7dfb ldrb r3, [r7, #23]
802190a: 2200 movs r2, #0
802190c: 6939 ldr r1, [r7, #16]
802190e: 68f8 ldr r0, [r7, #12]
8021910: f7ff ff3a bl 8021788 <tcp_output_fill_options>
MIB2_STATS_INC(mib2.tcpoutrsts);
tcp_output_control_segment(pcb, p, local_ip, remote_ip);
8021914: 6abb ldr r3, [r7, #40] @ 0x28
8021916: 683a ldr r2, [r7, #0]
8021918: 6939 ldr r1, [r7, #16]
802191a: 68f8 ldr r0, [r7, #12]
802191c: f7ff ff72 bl 8021804 <tcp_output_control_segment>
8021920: e000 b.n 8021924 <tcp_rst+0x8c>
return;
8021922: bf00 nop
LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno));
}
8021924: 371c adds r7, #28
8021926: 46bd mov sp, r7
8021928: bd90 pop {r4, r7, pc}
802192a: bf00 nop
802192c: 080303d8 .word 0x080303d8
8021930: 08030bb8 .word 0x08030bb8
8021934: 0803042c .word 0x0803042c
8021938: 08030bd4 .word 0x08030bd4
0802193c <tcp_send_empty_ack>:
*
* @param pcb Protocol control block for the TCP connection to send the ACK
*/
err_t
tcp_send_empty_ack(struct tcp_pcb *pcb)
{
802193c: b590 push {r4, r7, lr}
802193e: b087 sub sp, #28
8021940: af00 add r7, sp, #0
8021942: 6078 str r0, [r7, #4]
err_t err;
struct pbuf *p;
u8_t optlen, optflags = 0;
8021944: 2300 movs r3, #0
8021946: 75fb strb r3, [r7, #23]
u8_t num_sacks = 0;
8021948: 2300 movs r3, #0
802194a: 75bb strb r3, [r7, #22]
LWIP_ASSERT("tcp_send_empty_ack: invalid pcb", pcb != NULL);
802194c: 687b ldr r3, [r7, #4]
802194e: 2b00 cmp r3, #0
8021950: d106 bne.n 8021960 <tcp_send_empty_ack+0x24>
8021952: 4b28 ldr r3, [pc, #160] @ (80219f4 <tcp_send_empty_ack+0xb8>)
8021954: f240 72ea movw r2, #2026 @ 0x7ea
8021958: 4927 ldr r1, [pc, #156] @ (80219f8 <tcp_send_empty_ack+0xbc>)
802195a: 4828 ldr r0, [pc, #160] @ (80219fc <tcp_send_empty_ack+0xc0>)
802195c: f009 f866 bl 802aa2c <iprintf>
#if LWIP_TCP_TIMESTAMPS
if (pcb->flags & TF_TIMESTAMP) {
optflags = TF_SEG_OPTS_TS;
}
#endif
optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
8021960: 7dfb ldrb r3, [r7, #23]
8021962: 009b lsls r3, r3, #2
8021964: b2db uxtb r3, r3
8021966: f003 0304 and.w r3, r3, #4
802196a: 757b strb r3, [r7, #21]
if ((num_sacks = tcp_get_num_sacks(pcb, optlen)) > 0) {
optlen += 4 + num_sacks * 8; /* 4 bytes for header (including 2*NOP), plus 8B for each SACK */
}
#endif
p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt));
802196c: 7d7b ldrb r3, [r7, #21]
802196e: b29c uxth r4, r3
8021970: 687b ldr r3, [r7, #4]
8021972: 6d1b ldr r3, [r3, #80] @ 0x50
8021974: 4618 mov r0, r3
8021976: f7f8 f914 bl 8019ba2 <lwip_htonl>
802197a: 4603 mov r3, r0
802197c: 2200 movs r2, #0
802197e: 4621 mov r1, r4
8021980: 6878 ldr r0, [r7, #4]
8021982: f7ff fec3 bl 802170c <tcp_output_alloc_header>
8021986: 6138 str r0, [r7, #16]
if (p == NULL) {
8021988: 693b ldr r3, [r7, #16]
802198a: 2b00 cmp r3, #0
802198c: d109 bne.n 80219a2 <tcp_send_empty_ack+0x66>
/* let tcp_fasttmr retry sending this ACK */
tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
802198e: 687b ldr r3, [r7, #4]
8021990: 8b5b ldrh r3, [r3, #26]
8021992: f043 0303 orr.w r3, r3, #3
8021996: b29a uxth r2, r3
8021998: 687b ldr r3, [r7, #4]
802199a: 835a strh r2, [r3, #26]
LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n"));
return ERR_BUF;
802199c: f06f 0301 mvn.w r3, #1
80219a0: e023 b.n 80219ea <tcp_send_empty_ack+0xae>
}
tcp_output_fill_options(pcb, p, optflags, num_sacks);
80219a2: 7dbb ldrb r3, [r7, #22]
80219a4: 7dfa ldrb r2, [r7, #23]
80219a6: 6939 ldr r1, [r7, #16]
80219a8: 6878 ldr r0, [r7, #4]
80219aa: f7ff feed bl 8021788 <tcp_output_fill_options>
pcb->ts_lastacksent = pcb->rcv_nxt;
#endif
LWIP_DEBUGF(TCP_OUTPUT_DEBUG,
("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt));
err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
80219ae: 687a ldr r2, [r7, #4]
80219b0: 687b ldr r3, [r7, #4]
80219b2: 3304 adds r3, #4
80219b4: 6939 ldr r1, [r7, #16]
80219b6: 6878 ldr r0, [r7, #4]
80219b8: f7ff ff24 bl 8021804 <tcp_output_control_segment>
80219bc: 4603 mov r3, r0
80219be: 73fb strb r3, [r7, #15]
if (err != ERR_OK) {
80219c0: f997 300f ldrsb.w r3, [r7, #15]
80219c4: 2b00 cmp r3, #0
80219c6: d007 beq.n 80219d8 <tcp_send_empty_ack+0x9c>
/* let tcp_fasttmr retry sending this ACK */
tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
80219c8: 687b ldr r3, [r7, #4]
80219ca: 8b5b ldrh r3, [r3, #26]
80219cc: f043 0303 orr.w r3, r3, #3
80219d0: b29a uxth r2, r3
80219d2: 687b ldr r3, [r7, #4]
80219d4: 835a strh r2, [r3, #26]
80219d6: e006 b.n 80219e6 <tcp_send_empty_ack+0xaa>
} else {
/* remove ACK flags from the PCB, as we sent an empty ACK now */
tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
80219d8: 687b ldr r3, [r7, #4]
80219da: 8b5b ldrh r3, [r3, #26]
80219dc: f023 0303 bic.w r3, r3, #3
80219e0: b29a uxth r2, r3
80219e2: 687b ldr r3, [r7, #4]
80219e4: 835a strh r2, [r3, #26]
}
return err;
80219e6: f997 300f ldrsb.w r3, [r7, #15]
}
80219ea: 4618 mov r0, r3
80219ec: 371c adds r7, #28
80219ee: 46bd mov sp, r7
80219f0: bd90 pop {r4, r7, pc}
80219f2: bf00 nop
80219f4: 080303d8 .word 0x080303d8
80219f8: 08030bf0 .word 0x08030bf0
80219fc: 0803042c .word 0x0803042c
08021a00 <tcp_keepalive>:
*
* @param pcb the tcp_pcb for which to send a keepalive packet
*/
err_t
tcp_keepalive(struct tcp_pcb *pcb)
{
8021a00: b590 push {r4, r7, lr}
8021a02: b085 sub sp, #20
8021a04: af00 add r7, sp, #0
8021a06: 6078 str r0, [r7, #4]
err_t err;
struct pbuf *p;
u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
8021a08: 2300 movs r3, #0
8021a0a: 72bb strb r3, [r7, #10]
LWIP_ASSERT("tcp_keepalive: invalid pcb", pcb != NULL);
8021a0c: 687b ldr r3, [r7, #4]
8021a0e: 2b00 cmp r3, #0
8021a10: d106 bne.n 8021a20 <tcp_keepalive+0x20>
8021a12: 4b18 ldr r3, [pc, #96] @ (8021a74 <tcp_keepalive+0x74>)
8021a14: f640 0224 movw r2, #2084 @ 0x824
8021a18: 4917 ldr r1, [pc, #92] @ (8021a78 <tcp_keepalive+0x78>)
8021a1a: 4818 ldr r0, [pc, #96] @ (8021a7c <tcp_keepalive+0x7c>)
8021a1c: f009 f806 bl 802aa2c <iprintf>
LWIP_DEBUGF(TCP_DEBUG, ("\n"));
LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F" pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));
p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt - 1));
8021a20: 7abb ldrb r3, [r7, #10]
8021a22: b29c uxth r4, r3
8021a24: 687b ldr r3, [r7, #4]
8021a26: 6d1b ldr r3, [r3, #80] @ 0x50
8021a28: 3b01 subs r3, #1
8021a2a: 4618 mov r0, r3
8021a2c: f7f8 f8b9 bl 8019ba2 <lwip_htonl>
8021a30: 4603 mov r3, r0
8021a32: 2200 movs r2, #0
8021a34: 4621 mov r1, r4
8021a36: 6878 ldr r0, [r7, #4]
8021a38: f7ff fe68 bl 802170c <tcp_output_alloc_header>
8021a3c: 60f8 str r0, [r7, #12]
if (p == NULL) {
8021a3e: 68fb ldr r3, [r7, #12]
8021a40: 2b00 cmp r3, #0
8021a42: d102 bne.n 8021a4a <tcp_keepalive+0x4a>
LWIP_DEBUGF(TCP_DEBUG,
("tcp_keepalive: could not allocate memory for pbuf\n"));
return ERR_MEM;
8021a44: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8021a48: e010 b.n 8021a6c <tcp_keepalive+0x6c>
}
tcp_output_fill_options(pcb, p, 0, optlen);
8021a4a: 7abb ldrb r3, [r7, #10]
8021a4c: 2200 movs r2, #0
8021a4e: 68f9 ldr r1, [r7, #12]
8021a50: 6878 ldr r0, [r7, #4]
8021a52: f7ff fe99 bl 8021788 <tcp_output_fill_options>
err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
8021a56: 687a ldr r2, [r7, #4]
8021a58: 687b ldr r3, [r7, #4]
8021a5a: 3304 adds r3, #4
8021a5c: 68f9 ldr r1, [r7, #12]
8021a5e: 6878 ldr r0, [r7, #4]
8021a60: f7ff fed0 bl 8021804 <tcp_output_control_segment>
8021a64: 4603 mov r3, r0
8021a66: 72fb strb r3, [r7, #11]
LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F" err %d.\n",
pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
return err;
8021a68: f997 300b ldrsb.w r3, [r7, #11]
}
8021a6c: 4618 mov r0, r3
8021a6e: 3714 adds r7, #20
8021a70: 46bd mov sp, r7
8021a72: bd90 pop {r4, r7, pc}
8021a74: 080303d8 .word 0x080303d8
8021a78: 08030c10 .word 0x08030c10
8021a7c: 0803042c .word 0x0803042c
08021a80 <tcp_zero_window_probe>:
*
* @param pcb the tcp_pcb for which to send a zero-window probe packet
*/
err_t
tcp_zero_window_probe(struct tcp_pcb *pcb)
{
8021a80: b590 push {r4, r7, lr}
8021a82: b08b sub sp, #44 @ 0x2c
8021a84: af00 add r7, sp, #0
8021a86: 6078 str r0, [r7, #4]
struct tcp_hdr *tcphdr;
struct tcp_seg *seg;
u16_t len;
u8_t is_fin;
u32_t snd_nxt;
u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
8021a88: 2300 movs r3, #0
8021a8a: 74fb strb r3, [r7, #19]
LWIP_ASSERT("tcp_zero_window_probe: invalid pcb", pcb != NULL);
8021a8c: 687b ldr r3, [r7, #4]
8021a8e: 2b00 cmp r3, #0
8021a90: d106 bne.n 8021aa0 <tcp_zero_window_probe+0x20>
8021a92: 4b4d ldr r3, [pc, #308] @ (8021bc8 <tcp_zero_window_probe+0x148>)
8021a94: f640 024f movw r2, #2127 @ 0x84f
8021a98: 494c ldr r1, [pc, #304] @ (8021bcc <tcp_zero_window_probe+0x14c>)
8021a9a: 484d ldr r0, [pc, #308] @ (8021bd0 <tcp_zero_window_probe+0x150>)
8021a9c: f008 ffc6 bl 802aa2c <iprintf>
("tcp_zero_window_probe: tcp_ticks %"U32_F
" pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));
/* Only consider unsent, persist timer should be off when there is data in-flight */
seg = pcb->unsent;
8021aa0: 687b ldr r3, [r7, #4]
8021aa2: 6edb ldr r3, [r3, #108] @ 0x6c
8021aa4: 627b str r3, [r7, #36] @ 0x24
if (seg == NULL) {
8021aa6: 6a7b ldr r3, [r7, #36] @ 0x24
8021aa8: 2b00 cmp r3, #0
8021aaa: d101 bne.n 8021ab0 <tcp_zero_window_probe+0x30>
/* Not expected, persist timer should be off when the send buffer is empty */
return ERR_OK;
8021aac: 2300 movs r3, #0
8021aae: e087 b.n 8021bc0 <tcp_zero_window_probe+0x140>
/* increment probe count. NOTE: we record probe even if it fails
to actually transmit due to an error. This ensures memory exhaustion/
routing problem doesn't leave a zero-window pcb as an indefinite zombie.
RTO mechanism has similar behavior, see pcb->nrtx */
if (pcb->persist_probe < 0xFF) {
8021ab0: 687b ldr r3, [r7, #4]
8021ab2: f893 309a ldrb.w r3, [r3, #154] @ 0x9a
8021ab6: 2bff cmp r3, #255 @ 0xff
8021ab8: d007 beq.n 8021aca <tcp_zero_window_probe+0x4a>
++pcb->persist_probe;
8021aba: 687b ldr r3, [r7, #4]
8021abc: f893 309a ldrb.w r3, [r3, #154] @ 0x9a
8021ac0: 3301 adds r3, #1
8021ac2: b2da uxtb r2, r3
8021ac4: 687b ldr r3, [r7, #4]
8021ac6: f883 209a strb.w r2, [r3, #154] @ 0x9a
}
is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0);
8021aca: 6a7b ldr r3, [r7, #36] @ 0x24
8021acc: 691b ldr r3, [r3, #16]
8021ace: 899b ldrh r3, [r3, #12]
8021ad0: b29b uxth r3, r3
8021ad2: 4618 mov r0, r3
8021ad4: f7f8 f850 bl 8019b78 <lwip_htons>
8021ad8: 4603 mov r3, r0
8021ada: b2db uxtb r3, r3
8021adc: f003 0301 and.w r3, r3, #1
8021ae0: 2b00 cmp r3, #0
8021ae2: d005 beq.n 8021af0 <tcp_zero_window_probe+0x70>
8021ae4: 6a7b ldr r3, [r7, #36] @ 0x24
8021ae6: 891b ldrh r3, [r3, #8]
8021ae8: 2b00 cmp r3, #0
8021aea: d101 bne.n 8021af0 <tcp_zero_window_probe+0x70>
8021aec: 2301 movs r3, #1
8021aee: e000 b.n 8021af2 <tcp_zero_window_probe+0x72>
8021af0: 2300 movs r3, #0
8021af2: f887 3023 strb.w r3, [r7, #35] @ 0x23
/* we want to send one seqno: either FIN or data (no options) */
len = is_fin ? 0 : 1;
8021af6: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
8021afa: 2b00 cmp r3, #0
8021afc: bf0c ite eq
8021afe: 2301 moveq r3, #1
8021b00: 2300 movne r3, #0
8021b02: b2db uxtb r3, r3
8021b04: 843b strh r3, [r7, #32]
p = tcp_output_alloc_header(pcb, optlen, len, seg->tcphdr->seqno);
8021b06: 7cfb ldrb r3, [r7, #19]
8021b08: b299 uxth r1, r3
8021b0a: 6a7b ldr r3, [r7, #36] @ 0x24
8021b0c: 691b ldr r3, [r3, #16]
8021b0e: 685b ldr r3, [r3, #4]
8021b10: 8c3a ldrh r2, [r7, #32]
8021b12: 6878 ldr r0, [r7, #4]
8021b14: f7ff fdfa bl 802170c <tcp_output_alloc_header>
8021b18: 61f8 str r0, [r7, #28]
if (p == NULL) {
8021b1a: 69fb ldr r3, [r7, #28]
8021b1c: 2b00 cmp r3, #0
8021b1e: d102 bne.n 8021b26 <tcp_zero_window_probe+0xa6>
LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n"));
return ERR_MEM;
8021b20: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8021b24: e04c b.n 8021bc0 <tcp_zero_window_probe+0x140>
}
tcphdr = (struct tcp_hdr *)p->payload;
8021b26: 69fb ldr r3, [r7, #28]
8021b28: 685b ldr r3, [r3, #4]
8021b2a: 61bb str r3, [r7, #24]
if (is_fin) {
8021b2c: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
8021b30: 2b00 cmp r3, #0
8021b32: d011 beq.n 8021b58 <tcp_zero_window_probe+0xd8>
/* FIN segment, no data */
TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN);
8021b34: 69bb ldr r3, [r7, #24]
8021b36: 899b ldrh r3, [r3, #12]
8021b38: b29b uxth r3, r3
8021b3a: b21b sxth r3, r3
8021b3c: f423 537c bic.w r3, r3, #16128 @ 0x3f00
8021b40: b21c sxth r4, r3
8021b42: 2011 movs r0, #17
8021b44: f7f8 f818 bl 8019b78 <lwip_htons>
8021b48: 4603 mov r3, r0
8021b4a: b21b sxth r3, r3
8021b4c: 4323 orrs r3, r4
8021b4e: b21b sxth r3, r3
8021b50: b29a uxth r2, r3
8021b52: 69bb ldr r3, [r7, #24]
8021b54: 819a strh r2, [r3, #12]
8021b56: e010 b.n 8021b7a <tcp_zero_window_probe+0xfa>
} else {
/* Data segment, copy in one byte from the head of the unacked queue */
char *d = ((char *)p->payload + TCP_HLEN);
8021b58: 69fb ldr r3, [r7, #28]
8021b5a: 685b ldr r3, [r3, #4]
8021b5c: 3314 adds r3, #20
8021b5e: 617b str r3, [r7, #20]
/* Depending on whether the segment has already been sent (unacked) or not
(unsent), seg->p->payload points to the IP header or TCP header.
Ensure we copy the first TCP data byte: */
pbuf_copy_partial(seg->p, d, 1, seg->p->tot_len - seg->len);
8021b60: 6a7b ldr r3, [r7, #36] @ 0x24
8021b62: 6858 ldr r0, [r3, #4]
8021b64: 6a7b ldr r3, [r7, #36] @ 0x24
8021b66: 685b ldr r3, [r3, #4]
8021b68: 891a ldrh r2, [r3, #8]
8021b6a: 6a7b ldr r3, [r7, #36] @ 0x24
8021b6c: 891b ldrh r3, [r3, #8]
8021b6e: 1ad3 subs r3, r2, r3
8021b70: b29b uxth r3, r3
8021b72: 2201 movs r2, #1
8021b74: 6979 ldr r1, [r7, #20]
8021b76: f7f9 fee7 bl 801b948 <pbuf_copy_partial>
}
/* The byte may be acknowledged without the window being opened. */
snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + 1;
8021b7a: 6a7b ldr r3, [r7, #36] @ 0x24
8021b7c: 691b ldr r3, [r3, #16]
8021b7e: 685b ldr r3, [r3, #4]
8021b80: 4618 mov r0, r3
8021b82: f7f8 f80e bl 8019ba2 <lwip_htonl>
8021b86: 4603 mov r3, r0
8021b88: 3301 adds r3, #1
8021b8a: 60fb str r3, [r7, #12]
if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
8021b8c: 687b ldr r3, [r7, #4]
8021b8e: 6d1a ldr r2, [r3, #80] @ 0x50
8021b90: 68fb ldr r3, [r7, #12]
8021b92: 1ad3 subs r3, r2, r3
8021b94: 2b00 cmp r3, #0
8021b96: da02 bge.n 8021b9e <tcp_zero_window_probe+0x11e>
pcb->snd_nxt = snd_nxt;
8021b98: 687b ldr r3, [r7, #4]
8021b9a: 68fa ldr r2, [r7, #12]
8021b9c: 651a str r2, [r3, #80] @ 0x50
}
tcp_output_fill_options(pcb, p, 0, optlen);
8021b9e: 7cfb ldrb r3, [r7, #19]
8021ba0: 2200 movs r2, #0
8021ba2: 69f9 ldr r1, [r7, #28]
8021ba4: 6878 ldr r0, [r7, #4]
8021ba6: f7ff fdef bl 8021788 <tcp_output_fill_options>
err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
8021baa: 687a ldr r2, [r7, #4]
8021bac: 687b ldr r3, [r7, #4]
8021bae: 3304 adds r3, #4
8021bb0: 69f9 ldr r1, [r7, #28]
8021bb2: 6878 ldr r0, [r7, #4]
8021bb4: f7ff fe26 bl 8021804 <tcp_output_control_segment>
8021bb8: 4603 mov r3, r0
8021bba: 72fb strb r3, [r7, #11]
LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F
" ackno %"U32_F" err %d.\n",
pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
return err;
8021bbc: f997 300b ldrsb.w r3, [r7, #11]
}
8021bc0: 4618 mov r0, r3
8021bc2: 372c adds r7, #44 @ 0x2c
8021bc4: 46bd mov sp, r7
8021bc6: bd90 pop {r4, r7, pc}
8021bc8: 080303d8 .word 0x080303d8
8021bcc: 08030c2c .word 0x08030c2c
8021bd0: 0803042c .word 0x0803042c
08021bd4 <tcpip_tcp_timer>:
*
* @param arg unused argument
*/
static void
tcpip_tcp_timer(void *arg)
{
8021bd4: b580 push {r7, lr}
8021bd6: b082 sub sp, #8
8021bd8: af00 add r7, sp, #0
8021bda: 6078 str r0, [r7, #4]
LWIP_UNUSED_ARG(arg);
/* call TCP timer handler */
tcp_tmr();
8021bdc: f7f9 ffa2 bl 801bb24 <tcp_tmr>
/* timer still needed? */
if (tcp_active_pcbs || tcp_tw_pcbs) {
8021be0: 4b0a ldr r3, [pc, #40] @ (8021c0c <tcpip_tcp_timer+0x38>)
8021be2: 681b ldr r3, [r3, #0]
8021be4: 2b00 cmp r3, #0
8021be6: d103 bne.n 8021bf0 <tcpip_tcp_timer+0x1c>
8021be8: 4b09 ldr r3, [pc, #36] @ (8021c10 <tcpip_tcp_timer+0x3c>)
8021bea: 681b ldr r3, [r3, #0]
8021bec: 2b00 cmp r3, #0
8021bee: d005 beq.n 8021bfc <tcpip_tcp_timer+0x28>
/* restart timer */
sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
8021bf0: 2200 movs r2, #0
8021bf2: 4908 ldr r1, [pc, #32] @ (8021c14 <tcpip_tcp_timer+0x40>)
8021bf4: 20fa movs r0, #250 @ 0xfa
8021bf6: f000 f8f5 bl 8021de4 <sys_timeout>
8021bfa: e003 b.n 8021c04 <tcpip_tcp_timer+0x30>
} else {
/* disable timer */
tcpip_tcp_timer_active = 0;
8021bfc: 4b06 ldr r3, [pc, #24] @ (8021c18 <tcpip_tcp_timer+0x44>)
8021bfe: 2200 movs r2, #0
8021c00: 601a str r2, [r3, #0]
}
}
8021c02: bf00 nop
8021c04: bf00 nop
8021c06: 3708 adds r7, #8
8021c08: 46bd mov sp, r7
8021c0a: bd80 pop {r7, pc}
8021c0c: 2402afb4 .word 0x2402afb4
8021c10: 2402afb8 .word 0x2402afb8
8021c14: 08021bd5 .word 0x08021bd5
8021c18: 2402b004 .word 0x2402b004
08021c1c <tcp_timer_needed>:
* the reason is to have the TCP timer only running when
* there are active (or time-wait) PCBs.
*/
void
tcp_timer_needed(void)
{
8021c1c: b580 push {r7, lr}
8021c1e: af00 add r7, sp, #0
LWIP_ASSERT_CORE_LOCKED();
8021c20: f7ef fad8 bl 80111d4 <sys_check_core_locking>
/* timer is off but needed again? */
if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) {
8021c24: 4b0a ldr r3, [pc, #40] @ (8021c50 <tcp_timer_needed+0x34>)
8021c26: 681b ldr r3, [r3, #0]
8021c28: 2b00 cmp r3, #0
8021c2a: d10f bne.n 8021c4c <tcp_timer_needed+0x30>
8021c2c: 4b09 ldr r3, [pc, #36] @ (8021c54 <tcp_timer_needed+0x38>)
8021c2e: 681b ldr r3, [r3, #0]
8021c30: 2b00 cmp r3, #0
8021c32: d103 bne.n 8021c3c <tcp_timer_needed+0x20>
8021c34: 4b08 ldr r3, [pc, #32] @ (8021c58 <tcp_timer_needed+0x3c>)
8021c36: 681b ldr r3, [r3, #0]
8021c38: 2b00 cmp r3, #0
8021c3a: d007 beq.n 8021c4c <tcp_timer_needed+0x30>
/* enable and start timer */
tcpip_tcp_timer_active = 1;
8021c3c: 4b04 ldr r3, [pc, #16] @ (8021c50 <tcp_timer_needed+0x34>)
8021c3e: 2201 movs r2, #1
8021c40: 601a str r2, [r3, #0]
sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
8021c42: 2200 movs r2, #0
8021c44: 4905 ldr r1, [pc, #20] @ (8021c5c <tcp_timer_needed+0x40>)
8021c46: 20fa movs r0, #250 @ 0xfa
8021c48: f000 f8cc bl 8021de4 <sys_timeout>
}
}
8021c4c: bf00 nop
8021c4e: bd80 pop {r7, pc}
8021c50: 2402b004 .word 0x2402b004
8021c54: 2402afb4 .word 0x2402afb4
8021c58: 2402afb8 .word 0x2402afb8
8021c5c: 08021bd5 .word 0x08021bd5
08021c60 <sys_timeout_abs>:
#if LWIP_DEBUG_TIMERNAMES
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg)
#endif
{
8021c60: b580 push {r7, lr}
8021c62: b086 sub sp, #24
8021c64: af00 add r7, sp, #0
8021c66: 60f8 str r0, [r7, #12]
8021c68: 60b9 str r1, [r7, #8]
8021c6a: 607a str r2, [r7, #4]
struct sys_timeo *timeout, *t;
timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT);
8021c6c: 200a movs r0, #10
8021c6e: f7f8 fd01 bl 801a674 <memp_malloc>
8021c72: 6138 str r0, [r7, #16]
if (timeout == NULL) {
8021c74: 693b ldr r3, [r7, #16]
8021c76: 2b00 cmp r3, #0
8021c78: d109 bne.n 8021c8e <sys_timeout_abs+0x2e>
LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL);
8021c7a: 693b ldr r3, [r7, #16]
8021c7c: 2b00 cmp r3, #0
8021c7e: d151 bne.n 8021d24 <sys_timeout_abs+0xc4>
8021c80: 4b2a ldr r3, [pc, #168] @ (8021d2c <sys_timeout_abs+0xcc>)
8021c82: 22be movs r2, #190 @ 0xbe
8021c84: 492a ldr r1, [pc, #168] @ (8021d30 <sys_timeout_abs+0xd0>)
8021c86: 482b ldr r0, [pc, #172] @ (8021d34 <sys_timeout_abs+0xd4>)
8021c88: f008 fed0 bl 802aa2c <iprintf>
return;
8021c8c: e04a b.n 8021d24 <sys_timeout_abs+0xc4>
}
timeout->next = NULL;
8021c8e: 693b ldr r3, [r7, #16]
8021c90: 2200 movs r2, #0
8021c92: 601a str r2, [r3, #0]
timeout->h = handler;
8021c94: 693b ldr r3, [r7, #16]
8021c96: 68ba ldr r2, [r7, #8]
8021c98: 609a str r2, [r3, #8]
timeout->arg = arg;
8021c9a: 693b ldr r3, [r7, #16]
8021c9c: 687a ldr r2, [r7, #4]
8021c9e: 60da str r2, [r3, #12]
timeout->time = abs_time;
8021ca0: 693b ldr r3, [r7, #16]
8021ca2: 68fa ldr r2, [r7, #12]
8021ca4: 605a str r2, [r3, #4]
timeout->handler_name = handler_name;
LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p abs_time=%"U32_F" handler=%s arg=%p\n",
(void *)timeout, abs_time, handler_name, (void *)arg));
#endif /* LWIP_DEBUG_TIMERNAMES */
if (next_timeout == NULL) {
8021ca6: 4b24 ldr r3, [pc, #144] @ (8021d38 <sys_timeout_abs+0xd8>)
8021ca8: 681b ldr r3, [r3, #0]
8021caa: 2b00 cmp r3, #0
8021cac: d103 bne.n 8021cb6 <sys_timeout_abs+0x56>
next_timeout = timeout;
8021cae: 4a22 ldr r2, [pc, #136] @ (8021d38 <sys_timeout_abs+0xd8>)
8021cb0: 693b ldr r3, [r7, #16]
8021cb2: 6013 str r3, [r2, #0]
return;
8021cb4: e037 b.n 8021d26 <sys_timeout_abs+0xc6>
}
if (TIME_LESS_THAN(timeout->time, next_timeout->time)) {
8021cb6: 693b ldr r3, [r7, #16]
8021cb8: 685a ldr r2, [r3, #4]
8021cba: 4b1f ldr r3, [pc, #124] @ (8021d38 <sys_timeout_abs+0xd8>)
8021cbc: 681b ldr r3, [r3, #0]
8021cbe: 685b ldr r3, [r3, #4]
8021cc0: 1ad3 subs r3, r2, r3
8021cc2: 0fdb lsrs r3, r3, #31
8021cc4: f003 0301 and.w r3, r3, #1
8021cc8: b2db uxtb r3, r3
8021cca: 2b00 cmp r3, #0
8021ccc: d007 beq.n 8021cde <sys_timeout_abs+0x7e>
timeout->next = next_timeout;
8021cce: 4b1a ldr r3, [pc, #104] @ (8021d38 <sys_timeout_abs+0xd8>)
8021cd0: 681a ldr r2, [r3, #0]
8021cd2: 693b ldr r3, [r7, #16]
8021cd4: 601a str r2, [r3, #0]
next_timeout = timeout;
8021cd6: 4a18 ldr r2, [pc, #96] @ (8021d38 <sys_timeout_abs+0xd8>)
8021cd8: 693b ldr r3, [r7, #16]
8021cda: 6013 str r3, [r2, #0]
8021cdc: e023 b.n 8021d26 <sys_timeout_abs+0xc6>
} else {
for (t = next_timeout; t != NULL; t = t->next) {
8021cde: 4b16 ldr r3, [pc, #88] @ (8021d38 <sys_timeout_abs+0xd8>)
8021ce0: 681b ldr r3, [r3, #0]
8021ce2: 617b str r3, [r7, #20]
8021ce4: e01a b.n 8021d1c <sys_timeout_abs+0xbc>
if ((t->next == NULL) || TIME_LESS_THAN(timeout->time, t->next->time)) {
8021ce6: 697b ldr r3, [r7, #20]
8021ce8: 681b ldr r3, [r3, #0]
8021cea: 2b00 cmp r3, #0
8021cec: d00b beq.n 8021d06 <sys_timeout_abs+0xa6>
8021cee: 693b ldr r3, [r7, #16]
8021cf0: 685a ldr r2, [r3, #4]
8021cf2: 697b ldr r3, [r7, #20]
8021cf4: 681b ldr r3, [r3, #0]
8021cf6: 685b ldr r3, [r3, #4]
8021cf8: 1ad3 subs r3, r2, r3
8021cfa: 0fdb lsrs r3, r3, #31
8021cfc: f003 0301 and.w r3, r3, #1
8021d00: b2db uxtb r3, r3
8021d02: 2b00 cmp r3, #0
8021d04: d007 beq.n 8021d16 <sys_timeout_abs+0xb6>
timeout->next = t->next;
8021d06: 697b ldr r3, [r7, #20]
8021d08: 681a ldr r2, [r3, #0]
8021d0a: 693b ldr r3, [r7, #16]
8021d0c: 601a str r2, [r3, #0]
t->next = timeout;
8021d0e: 697b ldr r3, [r7, #20]
8021d10: 693a ldr r2, [r7, #16]
8021d12: 601a str r2, [r3, #0]
break;
8021d14: e007 b.n 8021d26 <sys_timeout_abs+0xc6>
for (t = next_timeout; t != NULL; t = t->next) {
8021d16: 697b ldr r3, [r7, #20]
8021d18: 681b ldr r3, [r3, #0]
8021d1a: 617b str r3, [r7, #20]
8021d1c: 697b ldr r3, [r7, #20]
8021d1e: 2b00 cmp r3, #0
8021d20: d1e1 bne.n 8021ce6 <sys_timeout_abs+0x86>
8021d22: e000 b.n 8021d26 <sys_timeout_abs+0xc6>
return;
8021d24: bf00 nop
}
}
}
}
8021d26: 3718 adds r7, #24
8021d28: 46bd mov sp, r7
8021d2a: bd80 pop {r7, pc}
8021d2c: 08030c50 .word 0x08030c50
8021d30: 08030c84 .word 0x08030c84
8021d34: 08030cc4 .word 0x08030cc4
8021d38: 2402affc .word 0x2402affc
08021d3c <lwip_cyclic_timer>:
#if !LWIP_TESTMODE
static
#endif
void
lwip_cyclic_timer(void *arg)
{
8021d3c: b580 push {r7, lr}
8021d3e: b086 sub sp, #24
8021d40: af00 add r7, sp, #0
8021d42: 6078 str r0, [r7, #4]
u32_t now;
u32_t next_timeout_time;
const struct lwip_cyclic_timer *cyclic = (const struct lwip_cyclic_timer *)arg;
8021d44: 687b ldr r3, [r7, #4]
8021d46: 617b str r3, [r7, #20]
#if LWIP_DEBUG_TIMERNAMES
LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: %s()\n", cyclic->handler_name));
#endif
cyclic->handler();
8021d48: 697b ldr r3, [r7, #20]
8021d4a: 685b ldr r3, [r3, #4]
8021d4c: 4798 blx r3
now = sys_now();
8021d4e: f7ee ffa5 bl 8010c9c <sys_now>
8021d52: 6138 str r0, [r7, #16]
next_timeout_time = (u32_t)(current_timeout_due_time + cyclic->interval_ms); /* overflow handled by TIME_LESS_THAN macro */
8021d54: 697b ldr r3, [r7, #20]
8021d56: 681a ldr r2, [r3, #0]
8021d58: 4b0f ldr r3, [pc, #60] @ (8021d98 <lwip_cyclic_timer+0x5c>)
8021d5a: 681b ldr r3, [r3, #0]
8021d5c: 4413 add r3, r2
8021d5e: 60fb str r3, [r7, #12]
if (TIME_LESS_THAN(next_timeout_time, now)) {
8021d60: 68fa ldr r2, [r7, #12]
8021d62: 693b ldr r3, [r7, #16]
8021d64: 1ad3 subs r3, r2, r3
8021d66: 0fdb lsrs r3, r3, #31
8021d68: f003 0301 and.w r3, r3, #1
8021d6c: b2db uxtb r3, r3
8021d6e: 2b00 cmp r3, #0
8021d70: d009 beq.n 8021d86 <lwip_cyclic_timer+0x4a>
/* timer would immediately expire again -> "overload" -> restart without any correction */
#if LWIP_DEBUG_TIMERNAMES
sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg, cyclic->handler_name);
#else
sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg);
8021d72: 697b ldr r3, [r7, #20]
8021d74: 681a ldr r2, [r3, #0]
8021d76: 693b ldr r3, [r7, #16]
8021d78: 4413 add r3, r2
8021d7a: 687a ldr r2, [r7, #4]
8021d7c: 4907 ldr r1, [pc, #28] @ (8021d9c <lwip_cyclic_timer+0x60>)
8021d7e: 4618 mov r0, r3
8021d80: f7ff ff6e bl 8021c60 <sys_timeout_abs>
sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg, cyclic->handler_name);
#else
sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
#endif
}
}
8021d84: e004 b.n 8021d90 <lwip_cyclic_timer+0x54>
sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
8021d86: 687a ldr r2, [r7, #4]
8021d88: 4904 ldr r1, [pc, #16] @ (8021d9c <lwip_cyclic_timer+0x60>)
8021d8a: 68f8 ldr r0, [r7, #12]
8021d8c: f7ff ff68 bl 8021c60 <sys_timeout_abs>
}
8021d90: bf00 nop
8021d92: 3718 adds r7, #24
8021d94: 46bd mov sp, r7
8021d96: bd80 pop {r7, pc}
8021d98: 2402b000 .word 0x2402b000
8021d9c: 08021d3d .word 0x08021d3d
08021da0 <sys_timeouts_init>:
/** Initialize this module */
void sys_timeouts_init(void)
{
8021da0: b580 push {r7, lr}
8021da2: b082 sub sp, #8
8021da4: af00 add r7, sp, #0
size_t i;
/* tcp_tmr() at index 0 is started on demand */
for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
8021da6: 2301 movs r3, #1
8021da8: 607b str r3, [r7, #4]
8021daa: e00e b.n 8021dca <sys_timeouts_init+0x2a>
/* we have to cast via size_t to get rid of const warning
(this is OK as cyclic_timer() casts back to const* */
sys_timeout(lwip_cyclic_timers[i].interval_ms, lwip_cyclic_timer, LWIP_CONST_CAST(void *, &lwip_cyclic_timers[i]));
8021dac: 4a0b ldr r2, [pc, #44] @ (8021ddc <sys_timeouts_init+0x3c>)
8021dae: 687b ldr r3, [r7, #4]
8021db0: f852 0033 ldr.w r0, [r2, r3, lsl #3]
8021db4: 687b ldr r3, [r7, #4]
8021db6: 00db lsls r3, r3, #3
8021db8: 4a08 ldr r2, [pc, #32] @ (8021ddc <sys_timeouts_init+0x3c>)
8021dba: 4413 add r3, r2
8021dbc: 461a mov r2, r3
8021dbe: 4908 ldr r1, [pc, #32] @ (8021de0 <sys_timeouts_init+0x40>)
8021dc0: f000 f810 bl 8021de4 <sys_timeout>
for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
8021dc4: 687b ldr r3, [r7, #4]
8021dc6: 3301 adds r3, #1
8021dc8: 607b str r3, [r7, #4]
8021dca: 687b ldr r3, [r7, #4]
8021dcc: 2b04 cmp r3, #4
8021dce: d9ed bls.n 8021dac <sys_timeouts_init+0xc>
}
}
8021dd0: bf00 nop
8021dd2: bf00 nop
8021dd4: 3708 adds r7, #8
8021dd6: 46bd mov sp, r7
8021dd8: bd80 pop {r7, pc}
8021dda: bf00 nop
8021ddc: 08031ea0 .word 0x08031ea0
8021de0: 08021d3d .word 0x08021d3d
08021de4 <sys_timeout>:
sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
void
sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg)
#endif /* LWIP_DEBUG_TIMERNAMES */
{
8021de4: b580 push {r7, lr}
8021de6: b086 sub sp, #24
8021de8: af00 add r7, sp, #0
8021dea: 60f8 str r0, [r7, #12]
8021dec: 60b9 str r1, [r7, #8]
8021dee: 607a str r2, [r7, #4]
u32_t next_timeout_time;
LWIP_ASSERT_CORE_LOCKED();
8021df0: f7ef f9f0 bl 80111d4 <sys_check_core_locking>
LWIP_ASSERT("Timeout time too long, max is LWIP_UINT32_MAX/4 msecs", msecs <= (LWIP_UINT32_MAX / 4));
8021df4: 68fb ldr r3, [r7, #12]
8021df6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8021dfa: d306 bcc.n 8021e0a <sys_timeout+0x26>
8021dfc: 4b0a ldr r3, [pc, #40] @ (8021e28 <sys_timeout+0x44>)
8021dfe: f240 1229 movw r2, #297 @ 0x129
8021e02: 490a ldr r1, [pc, #40] @ (8021e2c <sys_timeout+0x48>)
8021e04: 480a ldr r0, [pc, #40] @ (8021e30 <sys_timeout+0x4c>)
8021e06: f008 fe11 bl 802aa2c <iprintf>
next_timeout_time = (u32_t)(sys_now() + msecs); /* overflow handled by TIME_LESS_THAN macro */
8021e0a: f7ee ff47 bl 8010c9c <sys_now>
8021e0e: 4602 mov r2, r0
8021e10: 68fb ldr r3, [r7, #12]
8021e12: 4413 add r3, r2
8021e14: 617b str r3, [r7, #20]
#if LWIP_DEBUG_TIMERNAMES
sys_timeout_abs(next_timeout_time, handler, arg, handler_name);
#else
sys_timeout_abs(next_timeout_time, handler, arg);
8021e16: 687a ldr r2, [r7, #4]
8021e18: 68b9 ldr r1, [r7, #8]
8021e1a: 6978 ldr r0, [r7, #20]
8021e1c: f7ff ff20 bl 8021c60 <sys_timeout_abs>
#endif
}
8021e20: bf00 nop
8021e22: 3718 adds r7, #24
8021e24: 46bd mov sp, r7
8021e26: bd80 pop {r7, pc}
8021e28: 08030c50 .word 0x08030c50
8021e2c: 08030cec .word 0x08030cec
8021e30: 08030cc4 .word 0x08030cc4
08021e34 <sys_check_timeouts>:
*
* Must be called periodically from your main loop.
*/
void
sys_check_timeouts(void)
{
8021e34: b580 push {r7, lr}
8021e36: b084 sub sp, #16
8021e38: af00 add r7, sp, #0
u32_t now;
LWIP_ASSERT_CORE_LOCKED();
8021e3a: f7ef f9cb bl 80111d4 <sys_check_core_locking>
/* Process only timers expired at the start of the function. */
now = sys_now();
8021e3e: f7ee ff2d bl 8010c9c <sys_now>
8021e42: 60f8 str r0, [r7, #12]
sys_timeout_handler handler;
void *arg;
PBUF_CHECK_FREE_OOSEQ();
tmptimeout = next_timeout;
8021e44: 4b17 ldr r3, [pc, #92] @ (8021ea4 <sys_check_timeouts+0x70>)
8021e46: 681b ldr r3, [r3, #0]
8021e48: 60bb str r3, [r7, #8]
if (tmptimeout == NULL) {
8021e4a: 68bb ldr r3, [r7, #8]
8021e4c: 2b00 cmp r3, #0
8021e4e: d022 beq.n 8021e96 <sys_check_timeouts+0x62>
return;
}
if (TIME_LESS_THAN(now, tmptimeout->time)) {
8021e50: 68bb ldr r3, [r7, #8]
8021e52: 685b ldr r3, [r3, #4]
8021e54: 68fa ldr r2, [r7, #12]
8021e56: 1ad3 subs r3, r2, r3
8021e58: 0fdb lsrs r3, r3, #31
8021e5a: f003 0301 and.w r3, r3, #1
8021e5e: b2db uxtb r3, r3
8021e60: 2b00 cmp r3, #0
8021e62: d11a bne.n 8021e9a <sys_check_timeouts+0x66>
return;
}
/* Timeout has expired */
next_timeout = tmptimeout->next;
8021e64: 68bb ldr r3, [r7, #8]
8021e66: 681b ldr r3, [r3, #0]
8021e68: 4a0e ldr r2, [pc, #56] @ (8021ea4 <sys_check_timeouts+0x70>)
8021e6a: 6013 str r3, [r2, #0]
handler = tmptimeout->h;
8021e6c: 68bb ldr r3, [r7, #8]
8021e6e: 689b ldr r3, [r3, #8]
8021e70: 607b str r3, [r7, #4]
arg = tmptimeout->arg;
8021e72: 68bb ldr r3, [r7, #8]
8021e74: 68db ldr r3, [r3, #12]
8021e76: 603b str r3, [r7, #0]
current_timeout_due_time = tmptimeout->time;
8021e78: 68bb ldr r3, [r7, #8]
8021e7a: 685b ldr r3, [r3, #4]
8021e7c: 4a0a ldr r2, [pc, #40] @ (8021ea8 <sys_check_timeouts+0x74>)
8021e7e: 6013 str r3, [r2, #0]
if (handler != NULL) {
LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s t=%"U32_F" arg=%p\n",
tmptimeout->handler_name, sys_now() - tmptimeout->time, arg));
}
#endif /* LWIP_DEBUG_TIMERNAMES */
memp_free(MEMP_SYS_TIMEOUT, tmptimeout);
8021e80: 68b9 ldr r1, [r7, #8]
8021e82: 200a movs r0, #10
8021e84: f7f8 fc6c bl 801a760 <memp_free>
if (handler != NULL) {
8021e88: 687b ldr r3, [r7, #4]
8021e8a: 2b00 cmp r3, #0
8021e8c: d0da beq.n 8021e44 <sys_check_timeouts+0x10>
handler(arg);
8021e8e: 687b ldr r3, [r7, #4]
8021e90: 6838 ldr r0, [r7, #0]
8021e92: 4798 blx r3
do {
8021e94: e7d6 b.n 8021e44 <sys_check_timeouts+0x10>
return;
8021e96: bf00 nop
8021e98: e000 b.n 8021e9c <sys_check_timeouts+0x68>
return;
8021e9a: bf00 nop
}
LWIP_TCPIP_THREAD_ALIVE();
/* Repeat until all expired timers have been called */
} while (1);
}
8021e9c: 3710 adds r7, #16
8021e9e: 46bd mov sp, r7
8021ea0: bd80 pop {r7, pc}
8021ea2: bf00 nop
8021ea4: 2402affc .word 0x2402affc
8021ea8: 2402b000 .word 0x2402b000
08021eac <sys_timeouts_sleeptime>:
/** Return the time left before the next timeout is due. If no timeouts are
* enqueued, returns 0xffffffff
*/
u32_t
sys_timeouts_sleeptime(void)
{
8021eac: b580 push {r7, lr}
8021eae: b082 sub sp, #8
8021eb0: af00 add r7, sp, #0
u32_t now;
LWIP_ASSERT_CORE_LOCKED();
8021eb2: f7ef f98f bl 80111d4 <sys_check_core_locking>
if (next_timeout == NULL) {
8021eb6: 4b16 ldr r3, [pc, #88] @ (8021f10 <sys_timeouts_sleeptime+0x64>)
8021eb8: 681b ldr r3, [r3, #0]
8021eba: 2b00 cmp r3, #0
8021ebc: d102 bne.n 8021ec4 <sys_timeouts_sleeptime+0x18>
return SYS_TIMEOUTS_SLEEPTIME_INFINITE;
8021ebe: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8021ec2: e020 b.n 8021f06 <sys_timeouts_sleeptime+0x5a>
}
now = sys_now();
8021ec4: f7ee feea bl 8010c9c <sys_now>
8021ec8: 6078 str r0, [r7, #4]
if (TIME_LESS_THAN(next_timeout->time, now)) {
8021eca: 4b11 ldr r3, [pc, #68] @ (8021f10 <sys_timeouts_sleeptime+0x64>)
8021ecc: 681b ldr r3, [r3, #0]
8021ece: 685a ldr r2, [r3, #4]
8021ed0: 687b ldr r3, [r7, #4]
8021ed2: 1ad3 subs r3, r2, r3
8021ed4: 0fdb lsrs r3, r3, #31
8021ed6: f003 0301 and.w r3, r3, #1
8021eda: b2db uxtb r3, r3
8021edc: 2b00 cmp r3, #0
8021ede: d001 beq.n 8021ee4 <sys_timeouts_sleeptime+0x38>
return 0;
8021ee0: 2300 movs r3, #0
8021ee2: e010 b.n 8021f06 <sys_timeouts_sleeptime+0x5a>
} else {
u32_t ret = (u32_t)(next_timeout->time - now);
8021ee4: 4b0a ldr r3, [pc, #40] @ (8021f10 <sys_timeouts_sleeptime+0x64>)
8021ee6: 681b ldr r3, [r3, #0]
8021ee8: 685a ldr r2, [r3, #4]
8021eea: 687b ldr r3, [r7, #4]
8021eec: 1ad3 subs r3, r2, r3
8021eee: 603b str r3, [r7, #0]
LWIP_ASSERT("invalid sleeptime", ret <= LWIP_MAX_TIMEOUT);
8021ef0: 683b ldr r3, [r7, #0]
8021ef2: 2b00 cmp r3, #0
8021ef4: da06 bge.n 8021f04 <sys_timeouts_sleeptime+0x58>
8021ef6: 4b07 ldr r3, [pc, #28] @ (8021f14 <sys_timeouts_sleeptime+0x68>)
8021ef8: f44f 72dc mov.w r2, #440 @ 0x1b8
8021efc: 4906 ldr r1, [pc, #24] @ (8021f18 <sys_timeouts_sleeptime+0x6c>)
8021efe: 4807 ldr r0, [pc, #28] @ (8021f1c <sys_timeouts_sleeptime+0x70>)
8021f00: f008 fd94 bl 802aa2c <iprintf>
return ret;
8021f04: 683b ldr r3, [r7, #0]
}
}
8021f06: 4618 mov r0, r3
8021f08: 3708 adds r7, #8
8021f0a: 46bd mov sp, r7
8021f0c: bd80 pop {r7, pc}
8021f0e: bf00 nop
8021f10: 2402affc .word 0x2402affc
8021f14: 08030c50 .word 0x08030c50
8021f18: 08030d24 .word 0x08030d24
8021f1c: 08030cc4 .word 0x08030cc4
08021f20 <udp_init>:
/**
* Initialize this module.
*/
void
udp_init(void)
{
8021f20: b580 push {r7, lr}
8021f22: af00 add r7, sp, #0
#ifdef LWIP_RAND
udp_port = UDP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
8021f24: f007 fa58 bl 80293d8 <rand>
8021f28: 4603 mov r3, r0
8021f2a: b29b uxth r3, r3
8021f2c: f3c3 030d ubfx r3, r3, #0, #14
8021f30: b29b uxth r3, r3
8021f32: f5a3 4380 sub.w r3, r3, #16384 @ 0x4000
8021f36: b29a uxth r2, r3
8021f38: 4b01 ldr r3, [pc, #4] @ (8021f40 <udp_init+0x20>)
8021f3a: 801a strh r2, [r3, #0]
#endif /* LWIP_RAND */
}
8021f3c: bf00 nop
8021f3e: bd80 pop {r7, pc}
8021f40: 24000054 .word 0x24000054
08021f44 <udp_new_port>:
*
* @return a new (free) local UDP port number
*/
static u16_t
udp_new_port(void)
{
8021f44: b480 push {r7}
8021f46: b083 sub sp, #12
8021f48: af00 add r7, sp, #0
u16_t n = 0;
8021f4a: 2300 movs r3, #0
8021f4c: 80fb strh r3, [r7, #6]
struct udp_pcb *pcb;
again:
if (udp_port++ == UDP_LOCAL_PORT_RANGE_END) {
8021f4e: 4b17 ldr r3, [pc, #92] @ (8021fac <udp_new_port+0x68>)
8021f50: 881b ldrh r3, [r3, #0]
8021f52: 1c5a adds r2, r3, #1
8021f54: b291 uxth r1, r2
8021f56: 4a15 ldr r2, [pc, #84] @ (8021fac <udp_new_port+0x68>)
8021f58: 8011 strh r1, [r2, #0]
8021f5a: f64f 72ff movw r2, #65535 @ 0xffff
8021f5e: 4293 cmp r3, r2
8021f60: d103 bne.n 8021f6a <udp_new_port+0x26>
udp_port = UDP_LOCAL_PORT_RANGE_START;
8021f62: 4b12 ldr r3, [pc, #72] @ (8021fac <udp_new_port+0x68>)
8021f64: f44f 4240 mov.w r2, #49152 @ 0xc000
8021f68: 801a strh r2, [r3, #0]
}
/* Check all PCBs. */
for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
8021f6a: 4b11 ldr r3, [pc, #68] @ (8021fb0 <udp_new_port+0x6c>)
8021f6c: 681b ldr r3, [r3, #0]
8021f6e: 603b str r3, [r7, #0]
8021f70: e011 b.n 8021f96 <udp_new_port+0x52>
if (pcb->local_port == udp_port) {
8021f72: 683b ldr r3, [r7, #0]
8021f74: 8a5a ldrh r2, [r3, #18]
8021f76: 4b0d ldr r3, [pc, #52] @ (8021fac <udp_new_port+0x68>)
8021f78: 881b ldrh r3, [r3, #0]
8021f7a: 429a cmp r2, r3
8021f7c: d108 bne.n 8021f90 <udp_new_port+0x4c>
if (++n > (UDP_LOCAL_PORT_RANGE_END - UDP_LOCAL_PORT_RANGE_START)) {
8021f7e: 88fb ldrh r3, [r7, #6]
8021f80: 3301 adds r3, #1
8021f82: 80fb strh r3, [r7, #6]
8021f84: 88fb ldrh r3, [r7, #6]
8021f86: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
8021f8a: d3e0 bcc.n 8021f4e <udp_new_port+0xa>
return 0;
8021f8c: 2300 movs r3, #0
8021f8e: e007 b.n 8021fa0 <udp_new_port+0x5c>
for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
8021f90: 683b ldr r3, [r7, #0]
8021f92: 68db ldr r3, [r3, #12]
8021f94: 603b str r3, [r7, #0]
8021f96: 683b ldr r3, [r7, #0]
8021f98: 2b00 cmp r3, #0
8021f9a: d1ea bne.n 8021f72 <udp_new_port+0x2e>
}
goto again;
}
}
return udp_port;
8021f9c: 4b03 ldr r3, [pc, #12] @ (8021fac <udp_new_port+0x68>)
8021f9e: 881b ldrh r3, [r3, #0]
}
8021fa0: 4618 mov r0, r3
8021fa2: 370c adds r7, #12
8021fa4: 46bd mov sp, r7
8021fa6: f85d 7b04 ldr.w r7, [sp], #4
8021faa: 4770 bx lr
8021fac: 24000054 .word 0x24000054
8021fb0: 2402b008 .word 0x2402b008
08021fb4 <udp_input_local_match>:
* @param broadcast 1 if his is an IPv4 broadcast (global or subnet-only), 0 otherwise (only used for IPv4)
* @return 1 on match, 0 otherwise
*/
static u8_t
udp_input_local_match(struct udp_pcb *pcb, struct netif *inp, u8_t broadcast)
{
8021fb4: b580 push {r7, lr}
8021fb6: b084 sub sp, #16
8021fb8: af00 add r7, sp, #0
8021fba: 60f8 str r0, [r7, #12]
8021fbc: 60b9 str r1, [r7, #8]
8021fbe: 4613 mov r3, r2
8021fc0: 71fb strb r3, [r7, #7]
LWIP_UNUSED_ARG(inp); /* in IPv6 only case */
LWIP_UNUSED_ARG(broadcast); /* in IPv6 only case */
LWIP_ASSERT("udp_input_local_match: invalid pcb", pcb != NULL);
8021fc2: 68fb ldr r3, [r7, #12]
8021fc4: 2b00 cmp r3, #0
8021fc6: d105 bne.n 8021fd4 <udp_input_local_match+0x20>
8021fc8: 4b27 ldr r3, [pc, #156] @ (8022068 <udp_input_local_match+0xb4>)
8021fca: 2287 movs r2, #135 @ 0x87
8021fcc: 4927 ldr r1, [pc, #156] @ (802206c <udp_input_local_match+0xb8>)
8021fce: 4828 ldr r0, [pc, #160] @ (8022070 <udp_input_local_match+0xbc>)
8021fd0: f008 fd2c bl 802aa2c <iprintf>
LWIP_ASSERT("udp_input_local_match: invalid netif", inp != NULL);
8021fd4: 68bb ldr r3, [r7, #8]
8021fd6: 2b00 cmp r3, #0
8021fd8: d105 bne.n 8021fe6 <udp_input_local_match+0x32>
8021fda: 4b23 ldr r3, [pc, #140] @ (8022068 <udp_input_local_match+0xb4>)
8021fdc: 2288 movs r2, #136 @ 0x88
8021fde: 4925 ldr r1, [pc, #148] @ (8022074 <udp_input_local_match+0xc0>)
8021fe0: 4823 ldr r0, [pc, #140] @ (8022070 <udp_input_local_match+0xbc>)
8021fe2: f008 fd23 bl 802aa2c <iprintf>
/* check if PCB is bound to specific netif */
if ((pcb->netif_idx != NETIF_NO_INDEX) &&
8021fe6: 68fb ldr r3, [r7, #12]
8021fe8: 7a1b ldrb r3, [r3, #8]
8021fea: 2b00 cmp r3, #0
8021fec: d00b beq.n 8022006 <udp_input_local_match+0x52>
(pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
8021fee: 68fb ldr r3, [r7, #12]
8021ff0: 7a1a ldrb r2, [r3, #8]
8021ff2: 4b21 ldr r3, [pc, #132] @ (8022078 <udp_input_local_match+0xc4>)
8021ff4: 685b ldr r3, [r3, #4]
8021ff6: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8021ffa: 3301 adds r3, #1
8021ffc: b2db uxtb r3, r3
if ((pcb->netif_idx != NETIF_NO_INDEX) &&
8021ffe: 429a cmp r2, r3
8022000: d001 beq.n 8022006 <udp_input_local_match+0x52>
return 0;
8022002: 2300 movs r3, #0
8022004: e02b b.n 802205e <udp_input_local_match+0xaa>
/* Only need to check PCB if incoming IP version matches PCB IP version */
if (IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ip_current_dest_addr())) {
#if LWIP_IPV4
/* Special case: IPv4 broadcast: all or broadcasts in my subnet
* Note: broadcast variable can only be 1 if it is an IPv4 broadcast */
if (broadcast != 0) {
8022006: 79fb ldrb r3, [r7, #7]
8022008: 2b00 cmp r3, #0
802200a: d018 beq.n 802203e <udp_input_local_match+0x8a>
#if IP_SOF_BROADCAST_RECV
if (ip_get_option(pcb, SOF_BROADCAST))
#endif /* IP_SOF_BROADCAST_RECV */
{
if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
802200c: 68fb ldr r3, [r7, #12]
802200e: 2b00 cmp r3, #0
8022010: d013 beq.n 802203a <udp_input_local_match+0x86>
8022012: 68fb ldr r3, [r7, #12]
8022014: 681b ldr r3, [r3, #0]
8022016: 2b00 cmp r3, #0
8022018: d00f beq.n 802203a <udp_input_local_match+0x86>
((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
802201a: 4b17 ldr r3, [pc, #92] @ (8022078 <udp_input_local_match+0xc4>)
802201c: 695b ldr r3, [r3, #20]
if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
802201e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8022022: d00a beq.n 802203a <udp_input_local_match+0x86>
ip4_addr_netcmp(ip_2_ip4(&pcb->local_ip), ip4_current_dest_addr(), netif_ip4_netmask(inp))) {
8022024: 68fb ldr r3, [r7, #12]
8022026: 681a ldr r2, [r3, #0]
8022028: 4b13 ldr r3, [pc, #76] @ (8022078 <udp_input_local_match+0xc4>)
802202a: 695b ldr r3, [r3, #20]
802202c: 405a eors r2, r3
802202e: 68bb ldr r3, [r7, #8]
8022030: 3308 adds r3, #8
8022032: 681b ldr r3, [r3, #0]
8022034: 4013 ands r3, r2
((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
8022036: 2b00 cmp r3, #0
8022038: d110 bne.n 802205c <udp_input_local_match+0xa8>
return 1;
802203a: 2301 movs r3, #1
802203c: e00f b.n 802205e <udp_input_local_match+0xaa>
}
}
} else
#endif /* LWIP_IPV4 */
/* Handle IPv4 and IPv6: all or exact match */
if (ip_addr_isany(&pcb->local_ip) || ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
802203e: 68fb ldr r3, [r7, #12]
8022040: 2b00 cmp r3, #0
8022042: d009 beq.n 8022058 <udp_input_local_match+0xa4>
8022044: 68fb ldr r3, [r7, #12]
8022046: 681b ldr r3, [r3, #0]
8022048: 2b00 cmp r3, #0
802204a: d005 beq.n 8022058 <udp_input_local_match+0xa4>
802204c: 68fb ldr r3, [r7, #12]
802204e: 681a ldr r2, [r3, #0]
8022050: 4b09 ldr r3, [pc, #36] @ (8022078 <udp_input_local_match+0xc4>)
8022052: 695b ldr r3, [r3, #20]
8022054: 429a cmp r2, r3
8022056: d101 bne.n 802205c <udp_input_local_match+0xa8>
return 1;
8022058: 2301 movs r3, #1
802205a: e000 b.n 802205e <udp_input_local_match+0xaa>
}
}
return 0;
802205c: 2300 movs r3, #0
}
802205e: 4618 mov r0, r3
8022060: 3710 adds r7, #16
8022062: 46bd mov sp, r7
8022064: bd80 pop {r7, pc}
8022066: bf00 nop
8022068: 08030d38 .word 0x08030d38
802206c: 08030d68 .word 0x08030d68
8022070: 08030d8c .word 0x08030d8c
8022074: 08030db4 .word 0x08030db4
8022078: 24024458 .word 0x24024458
0802207c <udp_input>:
* @param inp network interface on which the datagram was received.
*
*/
void
udp_input(struct pbuf *p, struct netif *inp)
{
802207c: b590 push {r4, r7, lr}
802207e: b08d sub sp, #52 @ 0x34
8022080: af02 add r7, sp, #8
8022082: 6078 str r0, [r7, #4]
8022084: 6039 str r1, [r7, #0]
struct udp_hdr *udphdr;
struct udp_pcb *pcb, *prev;
struct udp_pcb *uncon_pcb;
u16_t src, dest;
u8_t broadcast;
u8_t for_us = 0;
8022086: 2300 movs r3, #0
8022088: 77fb strb r3, [r7, #31]
LWIP_UNUSED_ARG(inp);
LWIP_ASSERT_CORE_LOCKED();
802208a: f7ef f8a3 bl 80111d4 <sys_check_core_locking>
LWIP_ASSERT("udp_input: invalid pbuf", p != NULL);
802208e: 687b ldr r3, [r7, #4]
8022090: 2b00 cmp r3, #0
8022092: d105 bne.n 80220a0 <udp_input+0x24>
8022094: 4b7c ldr r3, [pc, #496] @ (8022288 <udp_input+0x20c>)
8022096: 22cf movs r2, #207 @ 0xcf
8022098: 497c ldr r1, [pc, #496] @ (802228c <udp_input+0x210>)
802209a: 487d ldr r0, [pc, #500] @ (8022290 <udp_input+0x214>)
802209c: f008 fcc6 bl 802aa2c <iprintf>
LWIP_ASSERT("udp_input: invalid netif", inp != NULL);
80220a0: 683b ldr r3, [r7, #0]
80220a2: 2b00 cmp r3, #0
80220a4: d105 bne.n 80220b2 <udp_input+0x36>
80220a6: 4b78 ldr r3, [pc, #480] @ (8022288 <udp_input+0x20c>)
80220a8: 22d0 movs r2, #208 @ 0xd0
80220aa: 497a ldr r1, [pc, #488] @ (8022294 <udp_input+0x218>)
80220ac: 4878 ldr r0, [pc, #480] @ (8022290 <udp_input+0x214>)
80220ae: f008 fcbd bl 802aa2c <iprintf>
PERF_START;
UDP_STATS_INC(udp.recv);
/* Check minimum length (UDP header) */
if (p->len < UDP_HLEN) {
80220b2: 687b ldr r3, [r7, #4]
80220b4: 895b ldrh r3, [r3, #10]
80220b6: 2b07 cmp r3, #7
80220b8: d803 bhi.n 80220c2 <udp_input+0x46>
LWIP_DEBUGF(UDP_DEBUG,
("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len));
UDP_STATS_INC(udp.lenerr);
UDP_STATS_INC(udp.drop);
MIB2_STATS_INC(mib2.udpinerrors);
pbuf_free(p);
80220ba: 6878 ldr r0, [r7, #4]
80220bc: f7f9 fa3e bl 801b53c <pbuf_free>
goto end;
80220c0: e0de b.n 8022280 <udp_input+0x204>
}
udphdr = (struct udp_hdr *)p->payload;
80220c2: 687b ldr r3, [r7, #4]
80220c4: 685b ldr r3, [r3, #4]
80220c6: 617b str r3, [r7, #20]
/* is broadcast packet ? */
broadcast = ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif());
80220c8: 4b73 ldr r3, [pc, #460] @ (8022298 <udp_input+0x21c>)
80220ca: 695b ldr r3, [r3, #20]
80220cc: 4a72 ldr r2, [pc, #456] @ (8022298 <udp_input+0x21c>)
80220ce: 6812 ldr r2, [r2, #0]
80220d0: 4611 mov r1, r2
80220d2: 4618 mov r0, r3
80220d4: f003 ff54 bl 8025f80 <ip4_addr_isbroadcast_u32>
80220d8: 4603 mov r3, r0
80220da: 74fb strb r3, [r7, #19]
LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len));
/* convert src and dest ports to host byte order */
src = lwip_ntohs(udphdr->src);
80220dc: 697b ldr r3, [r7, #20]
80220de: 881b ldrh r3, [r3, #0]
80220e0: b29b uxth r3, r3
80220e2: 4618 mov r0, r3
80220e4: f7f7 fd48 bl 8019b78 <lwip_htons>
80220e8: 4603 mov r3, r0
80220ea: 823b strh r3, [r7, #16]
dest = lwip_ntohs(udphdr->dest);
80220ec: 697b ldr r3, [r7, #20]
80220ee: 885b ldrh r3, [r3, #2]
80220f0: b29b uxth r3, r3
80220f2: 4618 mov r0, r3
80220f4: f7f7 fd40 bl 8019b78 <lwip_htons>
80220f8: 4603 mov r3, r0
80220fa: 81fb strh r3, [r7, #14]
ip_addr_debug_print_val(UDP_DEBUG, *ip_current_dest_addr());
LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", lwip_ntohs(udphdr->dest)));
ip_addr_debug_print_val(UDP_DEBUG, *ip_current_src_addr());
LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", lwip_ntohs(udphdr->src)));
pcb = NULL;
80220fc: 2300 movs r3, #0
80220fe: 623b str r3, [r7, #32]
prev = NULL;
8022100: 2300 movs r3, #0
8022102: 627b str r3, [r7, #36] @ 0x24
uncon_pcb = NULL;
8022104: 2300 movs r3, #0
8022106: 61bb str r3, [r7, #24]
/* Iterate through the UDP pcb list for a matching pcb.
* 'Perfect match' pcbs (connected to the remote port & ip address) are
* preferred. If no perfect match is found, the first unconnected pcb that
* matches the local port and ip address gets the datagram. */
for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
8022108: 4b64 ldr r3, [pc, #400] @ (802229c <udp_input+0x220>)
802210a: 681b ldr r3, [r3, #0]
802210c: 623b str r3, [r7, #32]
802210e: e054 b.n 80221ba <udp_input+0x13e>
LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", pcb->local_port));
ip_addr_debug_print_val(UDP_DEBUG, pcb->remote_ip);
LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", pcb->remote_port));
/* compare PCB local addr+port to UDP destination addr+port */
if ((pcb->local_port == dest) &&
8022110: 6a3b ldr r3, [r7, #32]
8022112: 8a5b ldrh r3, [r3, #18]
8022114: 89fa ldrh r2, [r7, #14]
8022116: 429a cmp r2, r3
8022118: d14a bne.n 80221b0 <udp_input+0x134>
(udp_input_local_match(pcb, inp, broadcast) != 0)) {
802211a: 7cfb ldrb r3, [r7, #19]
802211c: 461a mov r2, r3
802211e: 6839 ldr r1, [r7, #0]
8022120: 6a38 ldr r0, [r7, #32]
8022122: f7ff ff47 bl 8021fb4 <udp_input_local_match>
8022126: 4603 mov r3, r0
if ((pcb->local_port == dest) &&
8022128: 2b00 cmp r3, #0
802212a: d041 beq.n 80221b0 <udp_input+0x134>
if ((pcb->flags & UDP_FLAGS_CONNECTED) == 0) {
802212c: 6a3b ldr r3, [r7, #32]
802212e: 7c1b ldrb r3, [r3, #16]
8022130: f003 0304 and.w r3, r3, #4
8022134: 2b00 cmp r3, #0
8022136: d11d bne.n 8022174 <udp_input+0xf8>
if (uncon_pcb == NULL) {
8022138: 69bb ldr r3, [r7, #24]
802213a: 2b00 cmp r3, #0
802213c: d102 bne.n 8022144 <udp_input+0xc8>
/* the first unconnected matching PCB */
uncon_pcb = pcb;
802213e: 6a3b ldr r3, [r7, #32]
8022140: 61bb str r3, [r7, #24]
8022142: e017 b.n 8022174 <udp_input+0xf8>
#if LWIP_IPV4
} else if (broadcast && ip4_current_dest_addr()->addr == IPADDR_BROADCAST) {
8022144: 7cfb ldrb r3, [r7, #19]
8022146: 2b00 cmp r3, #0
8022148: d014 beq.n 8022174 <udp_input+0xf8>
802214a: 4b53 ldr r3, [pc, #332] @ (8022298 <udp_input+0x21c>)
802214c: 695b ldr r3, [r3, #20]
802214e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8022152: d10f bne.n 8022174 <udp_input+0xf8>
/* global broadcast address (only valid for IPv4; match was checked before) */
if (!IP_IS_V4_VAL(uncon_pcb->local_ip) || !ip4_addr_cmp(ip_2_ip4(&uncon_pcb->local_ip), netif_ip4_addr(inp))) {
8022154: 69bb ldr r3, [r7, #24]
8022156: 681a ldr r2, [r3, #0]
8022158: 683b ldr r3, [r7, #0]
802215a: 3304 adds r3, #4
802215c: 681b ldr r3, [r3, #0]
802215e: 429a cmp r2, r3
8022160: d008 beq.n 8022174 <udp_input+0xf8>
/* uncon_pcb does not match the input netif, check this pcb */
if (IP_IS_V4_VAL(pcb->local_ip) && ip4_addr_cmp(ip_2_ip4(&pcb->local_ip), netif_ip4_addr(inp))) {
8022162: 6a3b ldr r3, [r7, #32]
8022164: 681a ldr r2, [r3, #0]
8022166: 683b ldr r3, [r7, #0]
8022168: 3304 adds r3, #4
802216a: 681b ldr r3, [r3, #0]
802216c: 429a cmp r2, r3
802216e: d101 bne.n 8022174 <udp_input+0xf8>
/* better match */
uncon_pcb = pcb;
8022170: 6a3b ldr r3, [r7, #32]
8022172: 61bb str r3, [r7, #24]
}
#endif /* SO_REUSE */
}
/* compare PCB remote addr+port to UDP source addr+port */
if ((pcb->remote_port == src) &&
8022174: 6a3b ldr r3, [r7, #32]
8022176: 8a9b ldrh r3, [r3, #20]
8022178: 8a3a ldrh r2, [r7, #16]
802217a: 429a cmp r2, r3
802217c: d118 bne.n 80221b0 <udp_input+0x134>
(ip_addr_isany_val(pcb->remote_ip) ||
802217e: 6a3b ldr r3, [r7, #32]
8022180: 685b ldr r3, [r3, #4]
if ((pcb->remote_port == src) &&
8022182: 2b00 cmp r3, #0
8022184: d005 beq.n 8022192 <udp_input+0x116>
ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()))) {
8022186: 6a3b ldr r3, [r7, #32]
8022188: 685a ldr r2, [r3, #4]
802218a: 4b43 ldr r3, [pc, #268] @ (8022298 <udp_input+0x21c>)
802218c: 691b ldr r3, [r3, #16]
(ip_addr_isany_val(pcb->remote_ip) ||
802218e: 429a cmp r2, r3
8022190: d10e bne.n 80221b0 <udp_input+0x134>
/* the first fully matching PCB */
if (prev != NULL) {
8022192: 6a7b ldr r3, [r7, #36] @ 0x24
8022194: 2b00 cmp r3, #0
8022196: d014 beq.n 80221c2 <udp_input+0x146>
/* move the pcb to the front of udp_pcbs so that is
found faster next time */
prev->next = pcb->next;
8022198: 6a3b ldr r3, [r7, #32]
802219a: 68da ldr r2, [r3, #12]
802219c: 6a7b ldr r3, [r7, #36] @ 0x24
802219e: 60da str r2, [r3, #12]
pcb->next = udp_pcbs;
80221a0: 4b3e ldr r3, [pc, #248] @ (802229c <udp_input+0x220>)
80221a2: 681a ldr r2, [r3, #0]
80221a4: 6a3b ldr r3, [r7, #32]
80221a6: 60da str r2, [r3, #12]
udp_pcbs = pcb;
80221a8: 4a3c ldr r2, [pc, #240] @ (802229c <udp_input+0x220>)
80221aa: 6a3b ldr r3, [r7, #32]
80221ac: 6013 str r3, [r2, #0]
} else {
UDP_STATS_INC(udp.cachehit);
}
break;
80221ae: e008 b.n 80221c2 <udp_input+0x146>
}
}
prev = pcb;
80221b0: 6a3b ldr r3, [r7, #32]
80221b2: 627b str r3, [r7, #36] @ 0x24
for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
80221b4: 6a3b ldr r3, [r7, #32]
80221b6: 68db ldr r3, [r3, #12]
80221b8: 623b str r3, [r7, #32]
80221ba: 6a3b ldr r3, [r7, #32]
80221bc: 2b00 cmp r3, #0
80221be: d1a7 bne.n 8022110 <udp_input+0x94>
80221c0: e000 b.n 80221c4 <udp_input+0x148>
break;
80221c2: bf00 nop
}
/* no fully matching pcb found? then look for an unconnected pcb */
if (pcb == NULL) {
80221c4: 6a3b ldr r3, [r7, #32]
80221c6: 2b00 cmp r3, #0
80221c8: d101 bne.n 80221ce <udp_input+0x152>
pcb = uncon_pcb;
80221ca: 69bb ldr r3, [r7, #24]
80221cc: 623b str r3, [r7, #32]
}
/* Check checksum if this is a match or if it was directed at us. */
if (pcb != NULL) {
80221ce: 6a3b ldr r3, [r7, #32]
80221d0: 2b00 cmp r3, #0
80221d2: d002 beq.n 80221da <udp_input+0x15e>
for_us = 1;
80221d4: 2301 movs r3, #1
80221d6: 77fb strb r3, [r7, #31]
80221d8: e00a b.n 80221f0 <udp_input+0x174>
for_us = netif_get_ip6_addr_match(inp, ip6_current_dest_addr()) >= 0;
}
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
if (!ip_current_is_v6()) {
for_us = ip4_addr_cmp(netif_ip4_addr(inp), ip4_current_dest_addr());
80221da: 683b ldr r3, [r7, #0]
80221dc: 3304 adds r3, #4
80221de: 681a ldr r2, [r3, #0]
80221e0: 4b2d ldr r3, [pc, #180] @ (8022298 <udp_input+0x21c>)
80221e2: 695b ldr r3, [r3, #20]
80221e4: 429a cmp r2, r3
80221e6: bf0c ite eq
80221e8: 2301 moveq r3, #1
80221ea: 2300 movne r3, #0
80221ec: b2db uxtb r3, r3
80221ee: 77fb strb r3, [r7, #31]
}
#endif /* LWIP_IPV4 */
}
if (for_us) {
80221f0: 7ffb ldrb r3, [r7, #31]
80221f2: 2b00 cmp r3, #0
80221f4: d041 beq.n 802227a <udp_input+0x1fe>
}
}
}
}
#endif /* CHECKSUM_CHECK_UDP */
if (pbuf_remove_header(p, UDP_HLEN)) {
80221f6: 2108 movs r1, #8
80221f8: 6878 ldr r0, [r7, #4]
80221fa: f7f9 f8e7 bl 801b3cc <pbuf_remove_header>
80221fe: 4603 mov r3, r0
8022200: 2b00 cmp r3, #0
8022202: d00a beq.n 802221a <udp_input+0x19e>
/* Can we cope with this failing? Just assert for now */
LWIP_ASSERT("pbuf_remove_header failed\n", 0);
8022204: 4b20 ldr r3, [pc, #128] @ (8022288 <udp_input+0x20c>)
8022206: f44f 72b8 mov.w r2, #368 @ 0x170
802220a: 4925 ldr r1, [pc, #148] @ (80222a0 <udp_input+0x224>)
802220c: 4820 ldr r0, [pc, #128] @ (8022290 <udp_input+0x214>)
802220e: f008 fc0d bl 802aa2c <iprintf>
UDP_STATS_INC(udp.drop);
MIB2_STATS_INC(mib2.udpinerrors);
pbuf_free(p);
8022212: 6878 ldr r0, [r7, #4]
8022214: f7f9 f992 bl 801b53c <pbuf_free>
goto end;
8022218: e032 b.n 8022280 <udp_input+0x204>
}
if (pcb != NULL) {
802221a: 6a3b ldr r3, [r7, #32]
802221c: 2b00 cmp r3, #0
802221e: d012 beq.n 8022246 <udp_input+0x1ca>
}
}
}
#endif /* SO_REUSE && SO_REUSE_RXTOALL */
/* callback */
if (pcb->recv != NULL) {
8022220: 6a3b ldr r3, [r7, #32]
8022222: 699b ldr r3, [r3, #24]
8022224: 2b00 cmp r3, #0
8022226: d00a beq.n 802223e <udp_input+0x1c2>
/* now the recv function is responsible for freeing p */
pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src);
8022228: 6a3b ldr r3, [r7, #32]
802222a: 699c ldr r4, [r3, #24]
802222c: 6a3b ldr r3, [r7, #32]
802222e: 69d8 ldr r0, [r3, #28]
8022230: 8a3b ldrh r3, [r7, #16]
8022232: 9300 str r3, [sp, #0]
8022234: 4b1b ldr r3, [pc, #108] @ (80222a4 <udp_input+0x228>)
8022236: 687a ldr r2, [r7, #4]
8022238: 6a39 ldr r1, [r7, #32]
802223a: 47a0 blx r4
} else {
pbuf_free(p);
}
end:
PERF_STOP("udp_input");
return;
802223c: e021 b.n 8022282 <udp_input+0x206>
pbuf_free(p);
802223e: 6878 ldr r0, [r7, #4]
8022240: f7f9 f97c bl 801b53c <pbuf_free>
goto end;
8022244: e01c b.n 8022280 <udp_input+0x204>
if (!broadcast && !ip_addr_ismulticast(ip_current_dest_addr())) {
8022246: 7cfb ldrb r3, [r7, #19]
8022248: 2b00 cmp r3, #0
802224a: d112 bne.n 8022272 <udp_input+0x1f6>
802224c: 4b12 ldr r3, [pc, #72] @ (8022298 <udp_input+0x21c>)
802224e: 695b ldr r3, [r3, #20]
8022250: f003 03f0 and.w r3, r3, #240 @ 0xf0
8022254: 2be0 cmp r3, #224 @ 0xe0
8022256: d00c beq.n 8022272 <udp_input+0x1f6>
pbuf_header_force(p, (s16_t)(ip_current_header_tot_len() + UDP_HLEN));
8022258: 4b0f ldr r3, [pc, #60] @ (8022298 <udp_input+0x21c>)
802225a: 899b ldrh r3, [r3, #12]
802225c: 3308 adds r3, #8
802225e: b29b uxth r3, r3
8022260: b21b sxth r3, r3
8022262: 4619 mov r1, r3
8022264: 6878 ldr r0, [r7, #4]
8022266: f7f9 f924 bl 801b4b2 <pbuf_header_force>
icmp_port_unreach(ip_current_is_v6(), p);
802226a: 2103 movs r1, #3
802226c: 6878 ldr r0, [r7, #4]
802226e: f003 fb3b bl 80258e8 <icmp_dest_unreach>
pbuf_free(p);
8022272: 6878 ldr r0, [r7, #4]
8022274: f7f9 f962 bl 801b53c <pbuf_free>
return;
8022278: e003 b.n 8022282 <udp_input+0x206>
pbuf_free(p);
802227a: 6878 ldr r0, [r7, #4]
802227c: f7f9 f95e bl 801b53c <pbuf_free>
return;
8022280: bf00 nop
UDP_STATS_INC(udp.drop);
MIB2_STATS_INC(mib2.udpinerrors);
pbuf_free(p);
PERF_STOP("udp_input");
#endif /* CHECKSUM_CHECK_UDP */
}
8022282: 372c adds r7, #44 @ 0x2c
8022284: 46bd mov sp, r7
8022286: bd90 pop {r4, r7, pc}
8022288: 08030d38 .word 0x08030d38
802228c: 08030ddc .word 0x08030ddc
8022290: 08030d8c .word 0x08030d8c
8022294: 08030df4 .word 0x08030df4
8022298: 24024458 .word 0x24024458
802229c: 2402b008 .word 0x2402b008
80222a0: 08030e10 .word 0x08030e10
80222a4: 24024468 .word 0x24024468
080222a8 <udp_send>:
*
* @see udp_disconnect() udp_sendto()
*/
err_t
udp_send(struct udp_pcb *pcb, struct pbuf *p)
{
80222a8: b580 push {r7, lr}
80222aa: b082 sub sp, #8
80222ac: af00 add r7, sp, #0
80222ae: 6078 str r0, [r7, #4]
80222b0: 6039 str r1, [r7, #0]
LWIP_ERROR("udp_send: invalid pcb", pcb != NULL, return ERR_ARG);
80222b2: 687b ldr r3, [r7, #4]
80222b4: 2b00 cmp r3, #0
80222b6: d109 bne.n 80222cc <udp_send+0x24>
80222b8: 4b11 ldr r3, [pc, #68] @ (8022300 <udp_send+0x58>)
80222ba: f240 12d5 movw r2, #469 @ 0x1d5
80222be: 4911 ldr r1, [pc, #68] @ (8022304 <udp_send+0x5c>)
80222c0: 4811 ldr r0, [pc, #68] @ (8022308 <udp_send+0x60>)
80222c2: f008 fbb3 bl 802aa2c <iprintf>
80222c6: f06f 030f mvn.w r3, #15
80222ca: e015 b.n 80222f8 <udp_send+0x50>
LWIP_ERROR("udp_send: invalid pbuf", p != NULL, return ERR_ARG);
80222cc: 683b ldr r3, [r7, #0]
80222ce: 2b00 cmp r3, #0
80222d0: d109 bne.n 80222e6 <udp_send+0x3e>
80222d2: 4b0b ldr r3, [pc, #44] @ (8022300 <udp_send+0x58>)
80222d4: f44f 72eb mov.w r2, #470 @ 0x1d6
80222d8: 490c ldr r1, [pc, #48] @ (802230c <udp_send+0x64>)
80222da: 480b ldr r0, [pc, #44] @ (8022308 <udp_send+0x60>)
80222dc: f008 fba6 bl 802aa2c <iprintf>
80222e0: f06f 030f mvn.w r3, #15
80222e4: e008 b.n 80222f8 <udp_send+0x50>
if (IP_IS_ANY_TYPE_VAL(pcb->remote_ip)) {
return ERR_VAL;
}
/* send to the packet using remote ip and port stored in the pcb */
return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port);
80222e6: 687b ldr r3, [r7, #4]
80222e8: 1d1a adds r2, r3, #4
80222ea: 687b ldr r3, [r7, #4]
80222ec: 8a9b ldrh r3, [r3, #20]
80222ee: 6839 ldr r1, [r7, #0]
80222f0: 6878 ldr r0, [r7, #4]
80222f2: f000 f80d bl 8022310 <udp_sendto>
80222f6: 4603 mov r3, r0
}
80222f8: 4618 mov r0, r3
80222fa: 3708 adds r7, #8
80222fc: 46bd mov sp, r7
80222fe: bd80 pop {r7, pc}
8022300: 08030d38 .word 0x08030d38
8022304: 08030e2c .word 0x08030e2c
8022308: 08030d8c .word 0x08030d8c
802230c: 08030e44 .word 0x08030e44
08022310 <udp_sendto>:
* @see udp_disconnect() udp_send()
*/
err_t
udp_sendto(struct udp_pcb *pcb, struct pbuf *p,
const ip_addr_t *dst_ip, u16_t dst_port)
{
8022310: b580 push {r7, lr}
8022312: b088 sub sp, #32
8022314: af02 add r7, sp, #8
8022316: 60f8 str r0, [r7, #12]
8022318: 60b9 str r1, [r7, #8]
802231a: 607a str r2, [r7, #4]
802231c: 807b strh r3, [r7, #2]
u16_t dst_port, u8_t have_chksum, u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
struct netif *netif;
LWIP_ERROR("udp_sendto: invalid pcb", pcb != NULL, return ERR_ARG);
802231e: 68fb ldr r3, [r7, #12]
8022320: 2b00 cmp r3, #0
8022322: d109 bne.n 8022338 <udp_sendto+0x28>
8022324: 4b23 ldr r3, [pc, #140] @ (80223b4 <udp_sendto+0xa4>)
8022326: f44f 7206 mov.w r2, #536 @ 0x218
802232a: 4923 ldr r1, [pc, #140] @ (80223b8 <udp_sendto+0xa8>)
802232c: 4823 ldr r0, [pc, #140] @ (80223bc <udp_sendto+0xac>)
802232e: f008 fb7d bl 802aa2c <iprintf>
8022332: f06f 030f mvn.w r3, #15
8022336: e038 b.n 80223aa <udp_sendto+0x9a>
LWIP_ERROR("udp_sendto: invalid pbuf", p != NULL, return ERR_ARG);
8022338: 68bb ldr r3, [r7, #8]
802233a: 2b00 cmp r3, #0
802233c: d109 bne.n 8022352 <udp_sendto+0x42>
802233e: 4b1d ldr r3, [pc, #116] @ (80223b4 <udp_sendto+0xa4>)
8022340: f240 2219 movw r2, #537 @ 0x219
8022344: 491e ldr r1, [pc, #120] @ (80223c0 <udp_sendto+0xb0>)
8022346: 481d ldr r0, [pc, #116] @ (80223bc <udp_sendto+0xac>)
8022348: f008 fb70 bl 802aa2c <iprintf>
802234c: f06f 030f mvn.w r3, #15
8022350: e02b b.n 80223aa <udp_sendto+0x9a>
LWIP_ERROR("udp_sendto: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
8022352: 687b ldr r3, [r7, #4]
8022354: 2b00 cmp r3, #0
8022356: d109 bne.n 802236c <udp_sendto+0x5c>
8022358: 4b16 ldr r3, [pc, #88] @ (80223b4 <udp_sendto+0xa4>)
802235a: f240 221a movw r2, #538 @ 0x21a
802235e: 4919 ldr r1, [pc, #100] @ (80223c4 <udp_sendto+0xb4>)
8022360: 4816 ldr r0, [pc, #88] @ (80223bc <udp_sendto+0xac>)
8022362: f008 fb63 bl 802aa2c <iprintf>
8022366: f06f 030f mvn.w r3, #15
802236a: e01e b.n 80223aa <udp_sendto+0x9a>
return ERR_VAL;
}
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n"));
if (pcb->netif_idx != NETIF_NO_INDEX) {
802236c: 68fb ldr r3, [r7, #12]
802236e: 7a1b ldrb r3, [r3, #8]
8022370: 2b00 cmp r3, #0
8022372: d006 beq.n 8022382 <udp_sendto+0x72>
netif = netif_get_by_index(pcb->netif_idx);
8022374: 68fb ldr r3, [r7, #12]
8022376: 7a1b ldrb r3, [r3, #8]
8022378: 4618 mov r0, r3
802237a: f7f8 fd1f bl 801adbc <netif_get_by_index>
802237e: 6178 str r0, [r7, #20]
8022380: e003 b.n 802238a <udp_sendto+0x7a>
if (netif == NULL)
#endif /* LWIP_MULTICAST_TX_OPTIONS */
{
/* find the outgoing network interface for this packet */
netif = ip_route(&pcb->local_ip, dst_ip);
8022382: 6878 ldr r0, [r7, #4]
8022384: f003 fb44 bl 8025a10 <ip4_route>
8022388: 6178 str r0, [r7, #20]
}
}
/* no outgoing network interface could be found? */
if (netif == NULL) {
802238a: 697b ldr r3, [r7, #20]
802238c: 2b00 cmp r3, #0
802238e: d102 bne.n 8022396 <udp_sendto+0x86>
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to "));
ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, dst_ip);
LWIP_DEBUGF(UDP_DEBUG, ("\n"));
UDP_STATS_INC(udp.rterr);
return ERR_RTE;
8022390: f06f 0303 mvn.w r3, #3
8022394: e009 b.n 80223aa <udp_sendto+0x9a>
}
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
return udp_sendto_if_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
return udp_sendto_if(pcb, p, dst_ip, dst_port, netif);
8022396: 887a ldrh r2, [r7, #2]
8022398: 697b ldr r3, [r7, #20]
802239a: 9300 str r3, [sp, #0]
802239c: 4613 mov r3, r2
802239e: 687a ldr r2, [r7, #4]
80223a0: 68b9 ldr r1, [r7, #8]
80223a2: 68f8 ldr r0, [r7, #12]
80223a4: f000 f810 bl 80223c8 <udp_sendto_if>
80223a8: 4603 mov r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
80223aa: 4618 mov r0, r3
80223ac: 3718 adds r7, #24
80223ae: 46bd mov sp, r7
80223b0: bd80 pop {r7, pc}
80223b2: bf00 nop
80223b4: 08030d38 .word 0x08030d38
80223b8: 08030e5c .word 0x08030e5c
80223bc: 08030d8c .word 0x08030d8c
80223c0: 08030e74 .word 0x08030e74
80223c4: 08030e90 .word 0x08030e90
080223c8 <udp_sendto_if>:
* @see udp_disconnect() udp_send()
*/
err_t
udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p,
const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif)
{
80223c8: b580 push {r7, lr}
80223ca: b088 sub sp, #32
80223cc: af02 add r7, sp, #8
80223ce: 60f8 str r0, [r7, #12]
80223d0: 60b9 str r1, [r7, #8]
80223d2: 607a str r2, [r7, #4]
80223d4: 807b strh r3, [r7, #2]
u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
const ip_addr_t *src_ip;
LWIP_ERROR("udp_sendto_if: invalid pcb", pcb != NULL, return ERR_ARG);
80223d6: 68fb ldr r3, [r7, #12]
80223d8: 2b00 cmp r3, #0
80223da: d109 bne.n 80223f0 <udp_sendto_if+0x28>
80223dc: 4b2e ldr r3, [pc, #184] @ (8022498 <udp_sendto_if+0xd0>)
80223de: f44f 7220 mov.w r2, #640 @ 0x280
80223e2: 492e ldr r1, [pc, #184] @ (802249c <udp_sendto_if+0xd4>)
80223e4: 482e ldr r0, [pc, #184] @ (80224a0 <udp_sendto_if+0xd8>)
80223e6: f008 fb21 bl 802aa2c <iprintf>
80223ea: f06f 030f mvn.w r3, #15
80223ee: e04f b.n 8022490 <udp_sendto_if+0xc8>
LWIP_ERROR("udp_sendto_if: invalid pbuf", p != NULL, return ERR_ARG);
80223f0: 68bb ldr r3, [r7, #8]
80223f2: 2b00 cmp r3, #0
80223f4: d109 bne.n 802240a <udp_sendto_if+0x42>
80223f6: 4b28 ldr r3, [pc, #160] @ (8022498 <udp_sendto_if+0xd0>)
80223f8: f240 2281 movw r2, #641 @ 0x281
80223fc: 4929 ldr r1, [pc, #164] @ (80224a4 <udp_sendto_if+0xdc>)
80223fe: 4828 ldr r0, [pc, #160] @ (80224a0 <udp_sendto_if+0xd8>)
8022400: f008 fb14 bl 802aa2c <iprintf>
8022404: f06f 030f mvn.w r3, #15
8022408: e042 b.n 8022490 <udp_sendto_if+0xc8>
LWIP_ERROR("udp_sendto_if: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
802240a: 687b ldr r3, [r7, #4]
802240c: 2b00 cmp r3, #0
802240e: d109 bne.n 8022424 <udp_sendto_if+0x5c>
8022410: 4b21 ldr r3, [pc, #132] @ (8022498 <udp_sendto_if+0xd0>)
8022412: f240 2282 movw r2, #642 @ 0x282
8022416: 4924 ldr r1, [pc, #144] @ (80224a8 <udp_sendto_if+0xe0>)
8022418: 4821 ldr r0, [pc, #132] @ (80224a0 <udp_sendto_if+0xd8>)
802241a: f008 fb07 bl 802aa2c <iprintf>
802241e: f06f 030f mvn.w r3, #15
8022422: e035 b.n 8022490 <udp_sendto_if+0xc8>
LWIP_ERROR("udp_sendto_if: invalid netif", netif != NULL, return ERR_ARG);
8022424: 6a3b ldr r3, [r7, #32]
8022426: 2b00 cmp r3, #0
8022428: d109 bne.n 802243e <udp_sendto_if+0x76>
802242a: 4b1b ldr r3, [pc, #108] @ (8022498 <udp_sendto_if+0xd0>)
802242c: f240 2283 movw r2, #643 @ 0x283
8022430: 491e ldr r1, [pc, #120] @ (80224ac <udp_sendto_if+0xe4>)
8022432: 481b ldr r0, [pc, #108] @ (80224a0 <udp_sendto_if+0xd8>)
8022434: f008 fafa bl 802aa2c <iprintf>
8022438: f06f 030f mvn.w r3, #15
802243c: e028 b.n 8022490 <udp_sendto_if+0xc8>
#endif /* LWIP_IPV6 */
#if LWIP_IPV4 && LWIP_IPV6
else
#endif /* LWIP_IPV4 && LWIP_IPV6 */
#if LWIP_IPV4
if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
802243e: 68fb ldr r3, [r7, #12]
8022440: 2b00 cmp r3, #0
8022442: d009 beq.n 8022458 <udp_sendto_if+0x90>
8022444: 68fb ldr r3, [r7, #12]
8022446: 681b ldr r3, [r3, #0]
8022448: 2b00 cmp r3, #0
802244a: d005 beq.n 8022458 <udp_sendto_if+0x90>
ip4_addr_ismulticast(ip_2_ip4(&pcb->local_ip))) {
802244c: 68fb ldr r3, [r7, #12]
802244e: 681b ldr r3, [r3, #0]
8022450: f003 03f0 and.w r3, r3, #240 @ 0xf0
if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
8022454: 2be0 cmp r3, #224 @ 0xe0
8022456: d103 bne.n 8022460 <udp_sendto_if+0x98>
/* if the local_ip is any or multicast
* use the outgoing network interface IP address as source address */
src_ip = netif_ip_addr4(netif);
8022458: 6a3b ldr r3, [r7, #32]
802245a: 3304 adds r3, #4
802245c: 617b str r3, [r7, #20]
802245e: e00b b.n 8022478 <udp_sendto_if+0xb0>
} else {
/* check if UDP PCB local IP address is correct
* this could be an old address if netif->ip_addr has changed */
if (!ip4_addr_cmp(ip_2_ip4(&(pcb->local_ip)), netif_ip4_addr(netif))) {
8022460: 68fb ldr r3, [r7, #12]
8022462: 681a ldr r2, [r3, #0]
8022464: 6a3b ldr r3, [r7, #32]
8022466: 3304 adds r3, #4
8022468: 681b ldr r3, [r3, #0]
802246a: 429a cmp r2, r3
802246c: d002 beq.n 8022474 <udp_sendto_if+0xac>
/* local_ip doesn't match, drop the packet */
return ERR_RTE;
802246e: f06f 0303 mvn.w r3, #3
8022472: e00d b.n 8022490 <udp_sendto_if+0xc8>
}
/* use UDP PCB local IP address as source address */
src_ip = &pcb->local_ip;
8022474: 68fb ldr r3, [r7, #12]
8022476: 617b str r3, [r7, #20]
}
#endif /* LWIP_IPV4 */
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
return udp_sendto_if_src_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum, src_ip);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
return udp_sendto_if_src(pcb, p, dst_ip, dst_port, netif, src_ip);
8022478: 887a ldrh r2, [r7, #2]
802247a: 697b ldr r3, [r7, #20]
802247c: 9301 str r3, [sp, #4]
802247e: 6a3b ldr r3, [r7, #32]
8022480: 9300 str r3, [sp, #0]
8022482: 4613 mov r3, r2
8022484: 687a ldr r2, [r7, #4]
8022486: 68b9 ldr r1, [r7, #8]
8022488: 68f8 ldr r0, [r7, #12]
802248a: f000 f811 bl 80224b0 <udp_sendto_if_src>
802248e: 4603 mov r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
8022490: 4618 mov r0, r3
8022492: 3718 adds r7, #24
8022494: 46bd mov sp, r7
8022496: bd80 pop {r7, pc}
8022498: 08030d38 .word 0x08030d38
802249c: 08030eac .word 0x08030eac
80224a0: 08030d8c .word 0x08030d8c
80224a4: 08030ec8 .word 0x08030ec8
80224a8: 08030ee4 .word 0x08030ee4
80224ac: 08030f04 .word 0x08030f04
080224b0 <udp_sendto_if_src>:
/** @ingroup udp_raw
* Same as @ref udp_sendto_if, but with source address */
err_t
udp_sendto_if_src(struct udp_pcb *pcb, struct pbuf *p,
const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif, const ip_addr_t *src_ip)
{
80224b0: b580 push {r7, lr}
80224b2: b08c sub sp, #48 @ 0x30
80224b4: af04 add r7, sp, #16
80224b6: 60f8 str r0, [r7, #12]
80224b8: 60b9 str r1, [r7, #8]
80224ba: 607a str r2, [r7, #4]
80224bc: 807b strh r3, [r7, #2]
err_t err;
struct pbuf *q; /* q will be sent down the stack */
u8_t ip_proto;
u8_t ttl;
LWIP_ASSERT_CORE_LOCKED();
80224be: f7ee fe89 bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("udp_sendto_if_src: invalid pcb", pcb != NULL, return ERR_ARG);
80224c2: 68fb ldr r3, [r7, #12]
80224c4: 2b00 cmp r3, #0
80224c6: d109 bne.n 80224dc <udp_sendto_if_src+0x2c>
80224c8: 4b65 ldr r3, [pc, #404] @ (8022660 <udp_sendto_if_src+0x1b0>)
80224ca: f240 22d1 movw r2, #721 @ 0x2d1
80224ce: 4965 ldr r1, [pc, #404] @ (8022664 <udp_sendto_if_src+0x1b4>)
80224d0: 4865 ldr r0, [pc, #404] @ (8022668 <udp_sendto_if_src+0x1b8>)
80224d2: f008 faab bl 802aa2c <iprintf>
80224d6: f06f 030f mvn.w r3, #15
80224da: e0bc b.n 8022656 <udp_sendto_if_src+0x1a6>
LWIP_ERROR("udp_sendto_if_src: invalid pbuf", p != NULL, return ERR_ARG);
80224dc: 68bb ldr r3, [r7, #8]
80224de: 2b00 cmp r3, #0
80224e0: d109 bne.n 80224f6 <udp_sendto_if_src+0x46>
80224e2: 4b5f ldr r3, [pc, #380] @ (8022660 <udp_sendto_if_src+0x1b0>)
80224e4: f240 22d2 movw r2, #722 @ 0x2d2
80224e8: 4960 ldr r1, [pc, #384] @ (802266c <udp_sendto_if_src+0x1bc>)
80224ea: 485f ldr r0, [pc, #380] @ (8022668 <udp_sendto_if_src+0x1b8>)
80224ec: f008 fa9e bl 802aa2c <iprintf>
80224f0: f06f 030f mvn.w r3, #15
80224f4: e0af b.n 8022656 <udp_sendto_if_src+0x1a6>
LWIP_ERROR("udp_sendto_if_src: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
80224f6: 687b ldr r3, [r7, #4]
80224f8: 2b00 cmp r3, #0
80224fa: d109 bne.n 8022510 <udp_sendto_if_src+0x60>
80224fc: 4b58 ldr r3, [pc, #352] @ (8022660 <udp_sendto_if_src+0x1b0>)
80224fe: f240 22d3 movw r2, #723 @ 0x2d3
8022502: 495b ldr r1, [pc, #364] @ (8022670 <udp_sendto_if_src+0x1c0>)
8022504: 4858 ldr r0, [pc, #352] @ (8022668 <udp_sendto_if_src+0x1b8>)
8022506: f008 fa91 bl 802aa2c <iprintf>
802250a: f06f 030f mvn.w r3, #15
802250e: e0a2 b.n 8022656 <udp_sendto_if_src+0x1a6>
LWIP_ERROR("udp_sendto_if_src: invalid src_ip", src_ip != NULL, return ERR_ARG);
8022510: 6afb ldr r3, [r7, #44] @ 0x2c
8022512: 2b00 cmp r3, #0
8022514: d109 bne.n 802252a <udp_sendto_if_src+0x7a>
8022516: 4b52 ldr r3, [pc, #328] @ (8022660 <udp_sendto_if_src+0x1b0>)
8022518: f44f 7235 mov.w r2, #724 @ 0x2d4
802251c: 4955 ldr r1, [pc, #340] @ (8022674 <udp_sendto_if_src+0x1c4>)
802251e: 4852 ldr r0, [pc, #328] @ (8022668 <udp_sendto_if_src+0x1b8>)
8022520: f008 fa84 bl 802aa2c <iprintf>
8022524: f06f 030f mvn.w r3, #15
8022528: e095 b.n 8022656 <udp_sendto_if_src+0x1a6>
LWIP_ERROR("udp_sendto_if_src: invalid netif", netif != NULL, return ERR_ARG);
802252a: 6abb ldr r3, [r7, #40] @ 0x28
802252c: 2b00 cmp r3, #0
802252e: d109 bne.n 8022544 <udp_sendto_if_src+0x94>
8022530: 4b4b ldr r3, [pc, #300] @ (8022660 <udp_sendto_if_src+0x1b0>)
8022532: f240 22d5 movw r2, #725 @ 0x2d5
8022536: 4950 ldr r1, [pc, #320] @ (8022678 <udp_sendto_if_src+0x1c8>)
8022538: 484b ldr r0, [pc, #300] @ (8022668 <udp_sendto_if_src+0x1b8>)
802253a: f008 fa77 bl 802aa2c <iprintf>
802253e: f06f 030f mvn.w r3, #15
8022542: e088 b.n 8022656 <udp_sendto_if_src+0x1a6>
return ERR_VAL;
}
#endif /* LWIP_IPV4 && IP_SOF_BROADCAST */
/* if the PCB is not yet bound to a port, bind it here */
if (pcb->local_port == 0) {
8022544: 68fb ldr r3, [r7, #12]
8022546: 8a5b ldrh r3, [r3, #18]
8022548: 2b00 cmp r3, #0
802254a: d10f bne.n 802256c <udp_sendto_if_src+0xbc>
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n"));
err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
802254c: 68f9 ldr r1, [r7, #12]
802254e: 68fb ldr r3, [r7, #12]
8022550: 8a5b ldrh r3, [r3, #18]
8022552: 461a mov r2, r3
8022554: 68f8 ldr r0, [r7, #12]
8022556: f000 f893 bl 8022680 <udp_bind>
802255a: 4603 mov r3, r0
802255c: 76fb strb r3, [r7, #27]
if (err != ERR_OK) {
802255e: f997 301b ldrsb.w r3, [r7, #27]
8022562: 2b00 cmp r3, #0
8022564: d002 beq.n 802256c <udp_sendto_if_src+0xbc>
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n"));
return err;
8022566: f997 301b ldrsb.w r3, [r7, #27]
802256a: e074 b.n 8022656 <udp_sendto_if_src+0x1a6>
}
}
/* packet too large to add a UDP header without causing an overflow? */
if ((u16_t)(p->tot_len + UDP_HLEN) < p->tot_len) {
802256c: 68bb ldr r3, [r7, #8]
802256e: 891b ldrh r3, [r3, #8]
8022570: f64f 72f7 movw r2, #65527 @ 0xfff7
8022574: 4293 cmp r3, r2
8022576: d902 bls.n 802257e <udp_sendto_if_src+0xce>
return ERR_MEM;
8022578: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802257c: e06b b.n 8022656 <udp_sendto_if_src+0x1a6>
}
/* not enough space to add an UDP header to first pbuf in given p chain? */
if (pbuf_add_header(p, UDP_HLEN)) {
802257e: 2108 movs r1, #8
8022580: 68b8 ldr r0, [r7, #8]
8022582: f7f8 ff13 bl 801b3ac <pbuf_add_header>
8022586: 4603 mov r3, r0
8022588: 2b00 cmp r3, #0
802258a: d015 beq.n 80225b8 <udp_sendto_if_src+0x108>
/* allocate header in a separate new pbuf */
q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM);
802258c: f44f 7220 mov.w r2, #640 @ 0x280
8022590: 2108 movs r1, #8
8022592: 2022 movs r0, #34 @ 0x22
8022594: f7f8 fcbc bl 801af10 <pbuf_alloc>
8022598: 61f8 str r0, [r7, #28]
/* new header pbuf could not be allocated? */
if (q == NULL) {
802259a: 69fb ldr r3, [r7, #28]
802259c: 2b00 cmp r3, #0
802259e: d102 bne.n 80225a6 <udp_sendto_if_src+0xf6>
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n"));
return ERR_MEM;
80225a0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80225a4: e057 b.n 8022656 <udp_sendto_if_src+0x1a6>
}
if (p->tot_len != 0) {
80225a6: 68bb ldr r3, [r7, #8]
80225a8: 891b ldrh r3, [r3, #8]
80225aa: 2b00 cmp r3, #0
80225ac: d006 beq.n 80225bc <udp_sendto_if_src+0x10c>
/* chain header q in front of given pbuf p (only if p contains data) */
pbuf_chain(q, p);
80225ae: 68b9 ldr r1, [r7, #8]
80225b0: 69f8 ldr r0, [r7, #28]
80225b2: f7f9 f8e7 bl 801b784 <pbuf_chain>
80225b6: e001 b.n 80225bc <udp_sendto_if_src+0x10c>
LWIP_DEBUGF(UDP_DEBUG,
("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p));
} else {
/* adding space for header within p succeeded */
/* first pbuf q equals given pbuf */
q = p;
80225b8: 68bb ldr r3, [r7, #8]
80225ba: 61fb str r3, [r7, #28]
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p));
}
LWIP_ASSERT("check that first pbuf can hold struct udp_hdr",
80225bc: 69fb ldr r3, [r7, #28]
80225be: 895b ldrh r3, [r3, #10]
80225c0: 2b07 cmp r3, #7
80225c2: d806 bhi.n 80225d2 <udp_sendto_if_src+0x122>
80225c4: 4b26 ldr r3, [pc, #152] @ (8022660 <udp_sendto_if_src+0x1b0>)
80225c6: f240 320d movw r2, #781 @ 0x30d
80225ca: 492c ldr r1, [pc, #176] @ (802267c <udp_sendto_if_src+0x1cc>)
80225cc: 4826 ldr r0, [pc, #152] @ (8022668 <udp_sendto_if_src+0x1b8>)
80225ce: f008 fa2d bl 802aa2c <iprintf>
(q->len >= sizeof(struct udp_hdr)));
/* q now represents the packet to be sent */
udphdr = (struct udp_hdr *)q->payload;
80225d2: 69fb ldr r3, [r7, #28]
80225d4: 685b ldr r3, [r3, #4]
80225d6: 617b str r3, [r7, #20]
udphdr->src = lwip_htons(pcb->local_port);
80225d8: 68fb ldr r3, [r7, #12]
80225da: 8a5b ldrh r3, [r3, #18]
80225dc: 4618 mov r0, r3
80225de: f7f7 facb bl 8019b78 <lwip_htons>
80225e2: 4603 mov r3, r0
80225e4: 461a mov r2, r3
80225e6: 697b ldr r3, [r7, #20]
80225e8: 801a strh r2, [r3, #0]
udphdr->dest = lwip_htons(dst_port);
80225ea: 887b ldrh r3, [r7, #2]
80225ec: 4618 mov r0, r3
80225ee: f7f7 fac3 bl 8019b78 <lwip_htons>
80225f2: 4603 mov r3, r0
80225f4: 461a mov r2, r3
80225f6: 697b ldr r3, [r7, #20]
80225f8: 805a strh r2, [r3, #2]
/* in UDP, 0 checksum means 'no checksum' */
udphdr->chksum = 0x0000;
80225fa: 697b ldr r3, [r7, #20]
80225fc: 2200 movs r2, #0
80225fe: 719a strb r2, [r3, #6]
8022600: 2200 movs r2, #0
8022602: 71da strb r2, [r3, #7]
ip_proto = IP_PROTO_UDPLITE;
} else
#endif /* LWIP_UDPLITE */
{ /* UDP */
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len));
udphdr->len = lwip_htons(q->tot_len);
8022604: 69fb ldr r3, [r7, #28]
8022606: 891b ldrh r3, [r3, #8]
8022608: 4618 mov r0, r3
802260a: f7f7 fab5 bl 8019b78 <lwip_htons>
802260e: 4603 mov r3, r0
8022610: 461a mov r2, r3
8022612: 697b ldr r3, [r7, #20]
8022614: 809a strh r2, [r3, #4]
}
udphdr->chksum = udpchksum;
}
}
#endif /* CHECKSUM_GEN_UDP */
ip_proto = IP_PROTO_UDP;
8022616: 2311 movs r3, #17
8022618: 74fb strb r3, [r7, #19]
/* Determine TTL to use */
#if LWIP_MULTICAST_TX_OPTIONS
ttl = (ip_addr_ismulticast(dst_ip) ? udp_get_multicast_ttl(pcb) : pcb->ttl);
#else /* LWIP_MULTICAST_TX_OPTIONS */
ttl = pcb->ttl;
802261a: 68fb ldr r3, [r7, #12]
802261c: 7adb ldrb r3, [r3, #11]
802261e: 74bb strb r3, [r7, #18]
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum));
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,0x%02"X16_F",)\n", (u16_t)ip_proto));
/* output to IP */
NETIF_SET_HINTS(netif, &(pcb->netif_hints));
err = ip_output_if_src(q, src_ip, dst_ip, ttl, pcb->tos, ip_proto, netif);
8022620: 68fb ldr r3, [r7, #12]
8022622: 7a9b ldrb r3, [r3, #10]
8022624: 7cb9 ldrb r1, [r7, #18]
8022626: 6aba ldr r2, [r7, #40] @ 0x28
8022628: 9202 str r2, [sp, #8]
802262a: 7cfa ldrb r2, [r7, #19]
802262c: 9201 str r2, [sp, #4]
802262e: 9300 str r3, [sp, #0]
8022630: 460b mov r3, r1
8022632: 687a ldr r2, [r7, #4]
8022634: 6af9 ldr r1, [r7, #44] @ 0x2c
8022636: 69f8 ldr r0, [r7, #28]
8022638: f003 fbf2 bl 8025e20 <ip4_output_if_src>
802263c: 4603 mov r3, r0
802263e: 76fb strb r3, [r7, #27]
/* @todo: must this be increased even if error occurred? */
MIB2_STATS_INC(mib2.udpoutdatagrams);
/* did we chain a separate header pbuf earlier? */
if (q != p) {
8022640: 69fa ldr r2, [r7, #28]
8022642: 68bb ldr r3, [r7, #8]
8022644: 429a cmp r2, r3
8022646: d004 beq.n 8022652 <udp_sendto_if_src+0x1a2>
/* free the header pbuf */
pbuf_free(q);
8022648: 69f8 ldr r0, [r7, #28]
802264a: f7f8 ff77 bl 801b53c <pbuf_free>
q = NULL;
802264e: 2300 movs r3, #0
8022650: 61fb str r3, [r7, #28]
/* p is still referenced by the caller, and will live on */
}
UDP_STATS_INC(udp.xmit);
return err;
8022652: f997 301b ldrsb.w r3, [r7, #27]
}
8022656: 4618 mov r0, r3
8022658: 3720 adds r7, #32
802265a: 46bd mov sp, r7
802265c: bd80 pop {r7, pc}
802265e: bf00 nop
8022660: 08030d38 .word 0x08030d38
8022664: 08030f24 .word 0x08030f24
8022668: 08030d8c .word 0x08030d8c
802266c: 08030f44 .word 0x08030f44
8022670: 08030f64 .word 0x08030f64
8022674: 08030f88 .word 0x08030f88
8022678: 08030fac .word 0x08030fac
802267c: 08030fd0 .word 0x08030fd0
08022680 <udp_bind>:
*
* @see udp_disconnect()
*/
err_t
udp_bind(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
8022680: b580 push {r7, lr}
8022682: b086 sub sp, #24
8022684: af00 add r7, sp, #0
8022686: 60f8 str r0, [r7, #12]
8022688: 60b9 str r1, [r7, #8]
802268a: 4613 mov r3, r2
802268c: 80fb strh r3, [r7, #6]
u8_t rebind;
#if LWIP_IPV6 && LWIP_IPV6_SCOPES
ip_addr_t zoned_ipaddr;
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */
LWIP_ASSERT_CORE_LOCKED();
802268e: f7ee fda1 bl 80111d4 <sys_check_core_locking>
#if LWIP_IPV4
/* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
if (ipaddr == NULL) {
8022692: 68bb ldr r3, [r7, #8]
8022694: 2b00 cmp r3, #0
8022696: d101 bne.n 802269c <udp_bind+0x1c>
ipaddr = IP4_ADDR_ANY;
8022698: 4b39 ldr r3, [pc, #228] @ (8022780 <udp_bind+0x100>)
802269a: 60bb str r3, [r7, #8]
}
#else /* LWIP_IPV4 */
LWIP_ERROR("udp_bind: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
#endif /* LWIP_IPV4 */
LWIP_ERROR("udp_bind: invalid pcb", pcb != NULL, return ERR_ARG);
802269c: 68fb ldr r3, [r7, #12]
802269e: 2b00 cmp r3, #0
80226a0: d109 bne.n 80226b6 <udp_bind+0x36>
80226a2: 4b38 ldr r3, [pc, #224] @ (8022784 <udp_bind+0x104>)
80226a4: f240 32b7 movw r2, #951 @ 0x3b7
80226a8: 4937 ldr r1, [pc, #220] @ (8022788 <udp_bind+0x108>)
80226aa: 4838 ldr r0, [pc, #224] @ (802278c <udp_bind+0x10c>)
80226ac: f008 f9be bl 802aa2c <iprintf>
80226b0: f06f 030f mvn.w r3, #15
80226b4: e060 b.n 8022778 <udp_bind+0xf8>
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = "));
ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_TRACE, ipaddr);
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port));
rebind = 0;
80226b6: 2300 movs r3, #0
80226b8: 74fb strb r3, [r7, #19]
/* Check for double bind and rebind of the same pcb */
for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
80226ba: 4b35 ldr r3, [pc, #212] @ (8022790 <udp_bind+0x110>)
80226bc: 681b ldr r3, [r3, #0]
80226be: 617b str r3, [r7, #20]
80226c0: e009 b.n 80226d6 <udp_bind+0x56>
/* is this UDP PCB already on active list? */
if (pcb == ipcb) {
80226c2: 68fa ldr r2, [r7, #12]
80226c4: 697b ldr r3, [r7, #20]
80226c6: 429a cmp r2, r3
80226c8: d102 bne.n 80226d0 <udp_bind+0x50>
rebind = 1;
80226ca: 2301 movs r3, #1
80226cc: 74fb strb r3, [r7, #19]
break;
80226ce: e005 b.n 80226dc <udp_bind+0x5c>
for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
80226d0: 697b ldr r3, [r7, #20]
80226d2: 68db ldr r3, [r3, #12]
80226d4: 617b str r3, [r7, #20]
80226d6: 697b ldr r3, [r7, #20]
80226d8: 2b00 cmp r3, #0
80226da: d1f2 bne.n 80226c2 <udp_bind+0x42>
ipaddr = &zoned_ipaddr;
}
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */
/* no port specified? */
if (port == 0) {
80226dc: 88fb ldrh r3, [r7, #6]
80226de: 2b00 cmp r3, #0
80226e0: d109 bne.n 80226f6 <udp_bind+0x76>
port = udp_new_port();
80226e2: f7ff fc2f bl 8021f44 <udp_new_port>
80226e6: 4603 mov r3, r0
80226e8: 80fb strh r3, [r7, #6]
if (port == 0) {
80226ea: 88fb ldrh r3, [r7, #6]
80226ec: 2b00 cmp r3, #0
80226ee: d12c bne.n 802274a <udp_bind+0xca>
/* no more ports available in local range */
LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n"));
return ERR_USE;
80226f0: f06f 0307 mvn.w r3, #7
80226f4: e040 b.n 8022778 <udp_bind+0xf8>
}
} else {
for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
80226f6: 4b26 ldr r3, [pc, #152] @ (8022790 <udp_bind+0x110>)
80226f8: 681b ldr r3, [r3, #0]
80226fa: 617b str r3, [r7, #20]
80226fc: e022 b.n 8022744 <udp_bind+0xc4>
if (pcb != ipcb) {
80226fe: 68fa ldr r2, [r7, #12]
8022700: 697b ldr r3, [r7, #20]
8022702: 429a cmp r2, r3
8022704: d01b beq.n 802273e <udp_bind+0xbe>
if (!ip_get_option(pcb, SOF_REUSEADDR) ||
!ip_get_option(ipcb, SOF_REUSEADDR))
#endif /* SO_REUSE */
{
/* port matches that of PCB in list and REUSEADDR not set -> reject */
if ((ipcb->local_port == port) &&
8022706: 697b ldr r3, [r7, #20]
8022708: 8a5b ldrh r3, [r3, #18]
802270a: 88fa ldrh r2, [r7, #6]
802270c: 429a cmp r2, r3
802270e: d116 bne.n 802273e <udp_bind+0xbe>
/* IP address matches or any IP used? */
(ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
8022710: 697b ldr r3, [r7, #20]
8022712: 681a ldr r2, [r3, #0]
8022714: 68bb ldr r3, [r7, #8]
8022716: 681b ldr r3, [r3, #0]
if ((ipcb->local_port == port) &&
8022718: 429a cmp r2, r3
802271a: d00d beq.n 8022738 <udp_bind+0xb8>
(ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
802271c: 68bb ldr r3, [r7, #8]
802271e: 2b00 cmp r3, #0
8022720: d00a beq.n 8022738 <udp_bind+0xb8>
8022722: 68bb ldr r3, [r7, #8]
8022724: 681b ldr r3, [r3, #0]
8022726: 2b00 cmp r3, #0
8022728: d006 beq.n 8022738 <udp_bind+0xb8>
ip_addr_isany(&ipcb->local_ip))) {
802272a: 697b ldr r3, [r7, #20]
(ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
802272c: 2b00 cmp r3, #0
802272e: d003 beq.n 8022738 <udp_bind+0xb8>
ip_addr_isany(&ipcb->local_ip))) {
8022730: 697b ldr r3, [r7, #20]
8022732: 681b ldr r3, [r3, #0]
8022734: 2b00 cmp r3, #0
8022736: d102 bne.n 802273e <udp_bind+0xbe>
/* other PCB already binds to this local IP and port */
LWIP_DEBUGF(UDP_DEBUG,
("udp_bind: local port %"U16_F" already bound by another pcb\n", port));
return ERR_USE;
8022738: f06f 0307 mvn.w r3, #7
802273c: e01c b.n 8022778 <udp_bind+0xf8>
for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
802273e: 697b ldr r3, [r7, #20]
8022740: 68db ldr r3, [r3, #12]
8022742: 617b str r3, [r7, #20]
8022744: 697b ldr r3, [r7, #20]
8022746: 2b00 cmp r3, #0
8022748: d1d9 bne.n 80226fe <udp_bind+0x7e>
}
}
}
}
ip_addr_set_ipaddr(&pcb->local_ip, ipaddr);
802274a: 68bb ldr r3, [r7, #8]
802274c: 2b00 cmp r3, #0
802274e: d002 beq.n 8022756 <udp_bind+0xd6>
8022750: 68bb ldr r3, [r7, #8]
8022752: 681b ldr r3, [r3, #0]
8022754: e000 b.n 8022758 <udp_bind+0xd8>
8022756: 2300 movs r3, #0
8022758: 68fa ldr r2, [r7, #12]
802275a: 6013 str r3, [r2, #0]
pcb->local_port = port;
802275c: 68fb ldr r3, [r7, #12]
802275e: 88fa ldrh r2, [r7, #6]
8022760: 825a strh r2, [r3, #18]
mib2_udp_bind(pcb);
/* pcb not active yet? */
if (rebind == 0) {
8022762: 7cfb ldrb r3, [r7, #19]
8022764: 2b00 cmp r3, #0
8022766: d106 bne.n 8022776 <udp_bind+0xf6>
/* place the PCB on the active list if not already there */
pcb->next = udp_pcbs;
8022768: 4b09 ldr r3, [pc, #36] @ (8022790 <udp_bind+0x110>)
802276a: 681a ldr r2, [r3, #0]
802276c: 68fb ldr r3, [r7, #12]
802276e: 60da str r2, [r3, #12]
udp_pcbs = pcb;
8022770: 4a07 ldr r2, [pc, #28] @ (8022790 <udp_bind+0x110>)
8022772: 68fb ldr r3, [r7, #12]
8022774: 6013 str r3, [r2, #0]
}
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("udp_bind: bound to "));
ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, pcb->local_ip);
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->local_port));
return ERR_OK;
8022776: 2300 movs r3, #0
}
8022778: 4618 mov r0, r3
802277a: 3718 adds r7, #24
802277c: 46bd mov sp, r7
802277e: bd80 pop {r7, pc}
8022780: 08031ec8 .word 0x08031ec8
8022784: 08030d38 .word 0x08030d38
8022788: 08031000 .word 0x08031000
802278c: 08030d8c .word 0x08030d8c
8022790: 2402b008 .word 0x2402b008
08022794 <udp_connect>:
*
* @see udp_disconnect()
*/
err_t
udp_connect(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
8022794: b580 push {r7, lr}
8022796: b086 sub sp, #24
8022798: af00 add r7, sp, #0
802279a: 60f8 str r0, [r7, #12]
802279c: 60b9 str r1, [r7, #8]
802279e: 4613 mov r3, r2
80227a0: 80fb strh r3, [r7, #6]
struct udp_pcb *ipcb;
LWIP_ASSERT_CORE_LOCKED();
80227a2: f7ee fd17 bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("udp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
80227a6: 68fb ldr r3, [r7, #12]
80227a8: 2b00 cmp r3, #0
80227aa: d109 bne.n 80227c0 <udp_connect+0x2c>
80227ac: 4b2c ldr r3, [pc, #176] @ (8022860 <udp_connect+0xcc>)
80227ae: f240 4235 movw r2, #1077 @ 0x435
80227b2: 492c ldr r1, [pc, #176] @ (8022864 <udp_connect+0xd0>)
80227b4: 482c ldr r0, [pc, #176] @ (8022868 <udp_connect+0xd4>)
80227b6: f008 f939 bl 802aa2c <iprintf>
80227ba: f06f 030f mvn.w r3, #15
80227be: e04b b.n 8022858 <udp_connect+0xc4>
LWIP_ERROR("udp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
80227c0: 68bb ldr r3, [r7, #8]
80227c2: 2b00 cmp r3, #0
80227c4: d109 bne.n 80227da <udp_connect+0x46>
80227c6: 4b26 ldr r3, [pc, #152] @ (8022860 <udp_connect+0xcc>)
80227c8: f240 4236 movw r2, #1078 @ 0x436
80227cc: 4927 ldr r1, [pc, #156] @ (802286c <udp_connect+0xd8>)
80227ce: 4826 ldr r0, [pc, #152] @ (8022868 <udp_connect+0xd4>)
80227d0: f008 f92c bl 802aa2c <iprintf>
80227d4: f06f 030f mvn.w r3, #15
80227d8: e03e b.n 8022858 <udp_connect+0xc4>
if (pcb->local_port == 0) {
80227da: 68fb ldr r3, [r7, #12]
80227dc: 8a5b ldrh r3, [r3, #18]
80227de: 2b00 cmp r3, #0
80227e0: d10f bne.n 8022802 <udp_connect+0x6e>
err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
80227e2: 68f9 ldr r1, [r7, #12]
80227e4: 68fb ldr r3, [r7, #12]
80227e6: 8a5b ldrh r3, [r3, #18]
80227e8: 461a mov r2, r3
80227ea: 68f8 ldr r0, [r7, #12]
80227ec: f7ff ff48 bl 8022680 <udp_bind>
80227f0: 4603 mov r3, r0
80227f2: 75fb strb r3, [r7, #23]
if (err != ERR_OK) {
80227f4: f997 3017 ldrsb.w r3, [r7, #23]
80227f8: 2b00 cmp r3, #0
80227fa: d002 beq.n 8022802 <udp_connect+0x6e>
return err;
80227fc: f997 3017 ldrsb.w r3, [r7, #23]
8022800: e02a b.n 8022858 <udp_connect+0xc4>
}
}
ip_addr_set_ipaddr(&pcb->remote_ip, ipaddr);
8022802: 68bb ldr r3, [r7, #8]
8022804: 2b00 cmp r3, #0
8022806: d002 beq.n 802280e <udp_connect+0x7a>
8022808: 68bb ldr r3, [r7, #8]
802280a: 681b ldr r3, [r3, #0]
802280c: e000 b.n 8022810 <udp_connect+0x7c>
802280e: 2300 movs r3, #0
8022810: 68fa ldr r2, [r7, #12]
8022812: 6053 str r3, [r2, #4]
ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNKNOWN)) {
ip6_addr_select_zone(ip_2_ip6(&pcb->remote_ip), ip_2_ip6(&pcb->local_ip));
}
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */
pcb->remote_port = port;
8022814: 68fb ldr r3, [r7, #12]
8022816: 88fa ldrh r2, [r7, #6]
8022818: 829a strh r2, [r3, #20]
pcb->flags |= UDP_FLAGS_CONNECTED;
802281a: 68fb ldr r3, [r7, #12]
802281c: 7c1b ldrb r3, [r3, #16]
802281e: f043 0304 orr.w r3, r3, #4
8022822: b2da uxtb r2, r3
8022824: 68fb ldr r3, [r7, #12]
8022826: 741a strb r2, [r3, #16]
ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
pcb->remote_ip);
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->remote_port));
/* Insert UDP PCB into the list of active UDP PCBs. */
for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
8022828: 4b11 ldr r3, [pc, #68] @ (8022870 <udp_connect+0xdc>)
802282a: 681b ldr r3, [r3, #0]
802282c: 613b str r3, [r7, #16]
802282e: e008 b.n 8022842 <udp_connect+0xae>
if (pcb == ipcb) {
8022830: 68fa ldr r2, [r7, #12]
8022832: 693b ldr r3, [r7, #16]
8022834: 429a cmp r2, r3
8022836: d101 bne.n 802283c <udp_connect+0xa8>
/* already on the list, just return */
return ERR_OK;
8022838: 2300 movs r3, #0
802283a: e00d b.n 8022858 <udp_connect+0xc4>
for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
802283c: 693b ldr r3, [r7, #16]
802283e: 68db ldr r3, [r3, #12]
8022840: 613b str r3, [r7, #16]
8022842: 693b ldr r3, [r7, #16]
8022844: 2b00 cmp r3, #0
8022846: d1f3 bne.n 8022830 <udp_connect+0x9c>
}
}
/* PCB not yet on the list, add PCB now */
pcb->next = udp_pcbs;
8022848: 4b09 ldr r3, [pc, #36] @ (8022870 <udp_connect+0xdc>)
802284a: 681a ldr r2, [r3, #0]
802284c: 68fb ldr r3, [r7, #12]
802284e: 60da str r2, [r3, #12]
udp_pcbs = pcb;
8022850: 4a07 ldr r2, [pc, #28] @ (8022870 <udp_connect+0xdc>)
8022852: 68fb ldr r3, [r7, #12]
8022854: 6013 str r3, [r2, #0]
return ERR_OK;
8022856: 2300 movs r3, #0
}
8022858: 4618 mov r0, r3
802285a: 3718 adds r7, #24
802285c: 46bd mov sp, r7
802285e: bd80 pop {r7, pc}
8022860: 08030d38 .word 0x08030d38
8022864: 08031018 .word 0x08031018
8022868: 08030d8c .word 0x08030d8c
802286c: 08031034 .word 0x08031034
8022870: 2402b008 .word 0x2402b008
08022874 <udp_disconnect>:
*
* @param pcb the udp pcb to disconnect.
*/
void
udp_disconnect(struct udp_pcb *pcb)
{
8022874: b580 push {r7, lr}
8022876: b082 sub sp, #8
8022878: af00 add r7, sp, #0
802287a: 6078 str r0, [r7, #4]
LWIP_ASSERT_CORE_LOCKED();
802287c: f7ee fcaa bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("udp_disconnect: invalid pcb", pcb != NULL, return);
8022880: 687b ldr r3, [r7, #4]
8022882: 2b00 cmp r3, #0
8022884: d107 bne.n 8022896 <udp_disconnect+0x22>
8022886: 4b0d ldr r3, [pc, #52] @ (80228bc <udp_disconnect+0x48>)
8022888: f240 426a movw r2, #1130 @ 0x46a
802288c: 490c ldr r1, [pc, #48] @ (80228c0 <udp_disconnect+0x4c>)
802288e: 480d ldr r0, [pc, #52] @ (80228c4 <udp_disconnect+0x50>)
8022890: f008 f8cc bl 802aa2c <iprintf>
8022894: e00f b.n 80228b6 <udp_disconnect+0x42>
#if LWIP_IPV4 && LWIP_IPV6
if (IP_IS_ANY_TYPE_VAL(pcb->local_ip)) {
ip_addr_copy(pcb->remote_ip, *IP_ANY_TYPE);
} else {
#endif
ip_addr_set_any(IP_IS_V6_VAL(pcb->remote_ip), &pcb->remote_ip);
8022896: 687b ldr r3, [r7, #4]
8022898: 2200 movs r2, #0
802289a: 605a str r2, [r3, #4]
#if LWIP_IPV4 && LWIP_IPV6
}
#endif
pcb->remote_port = 0;
802289c: 687b ldr r3, [r7, #4]
802289e: 2200 movs r2, #0
80228a0: 829a strh r2, [r3, #20]
pcb->netif_idx = NETIF_NO_INDEX;
80228a2: 687b ldr r3, [r7, #4]
80228a4: 2200 movs r2, #0
80228a6: 721a strb r2, [r3, #8]
/* mark PCB as unconnected */
udp_clear_flags(pcb, UDP_FLAGS_CONNECTED);
80228a8: 687b ldr r3, [r7, #4]
80228aa: 7c1b ldrb r3, [r3, #16]
80228ac: f023 0304 bic.w r3, r3, #4
80228b0: b2da uxtb r2, r3
80228b2: 687b ldr r3, [r7, #4]
80228b4: 741a strb r2, [r3, #16]
}
80228b6: 3708 adds r7, #8
80228b8: 46bd mov sp, r7
80228ba: bd80 pop {r7, pc}
80228bc: 08030d38 .word 0x08030d38
80228c0: 08031050 .word 0x08031050
80228c4: 08030d8c .word 0x08030d8c
080228c8 <udp_recv>:
* @param recv function pointer of the callback function
* @param recv_arg additional argument to pass to the callback function
*/
void
udp_recv(struct udp_pcb *pcb, udp_recv_fn recv, void *recv_arg)
{
80228c8: b580 push {r7, lr}
80228ca: b084 sub sp, #16
80228cc: af00 add r7, sp, #0
80228ce: 60f8 str r0, [r7, #12]
80228d0: 60b9 str r1, [r7, #8]
80228d2: 607a str r2, [r7, #4]
LWIP_ASSERT_CORE_LOCKED();
80228d4: f7ee fc7e bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("udp_recv: invalid pcb", pcb != NULL, return);
80228d8: 68fb ldr r3, [r7, #12]
80228da: 2b00 cmp r3, #0
80228dc: d107 bne.n 80228ee <udp_recv+0x26>
80228de: 4b08 ldr r3, [pc, #32] @ (8022900 <udp_recv+0x38>)
80228e0: f240 428a movw r2, #1162 @ 0x48a
80228e4: 4907 ldr r1, [pc, #28] @ (8022904 <udp_recv+0x3c>)
80228e6: 4808 ldr r0, [pc, #32] @ (8022908 <udp_recv+0x40>)
80228e8: f008 f8a0 bl 802aa2c <iprintf>
80228ec: e005 b.n 80228fa <udp_recv+0x32>
/* remember recv() callback and user data */
pcb->recv = recv;
80228ee: 68fb ldr r3, [r7, #12]
80228f0: 68ba ldr r2, [r7, #8]
80228f2: 619a str r2, [r3, #24]
pcb->recv_arg = recv_arg;
80228f4: 68fb ldr r3, [r7, #12]
80228f6: 687a ldr r2, [r7, #4]
80228f8: 61da str r2, [r3, #28]
}
80228fa: 3710 adds r7, #16
80228fc: 46bd mov sp, r7
80228fe: bd80 pop {r7, pc}
8022900: 08030d38 .word 0x08030d38
8022904: 0803106c .word 0x0803106c
8022908: 08030d8c .word 0x08030d8c
0802290c <udp_remove>:
*
* @see udp_new()
*/
void
udp_remove(struct udp_pcb *pcb)
{
802290c: b580 push {r7, lr}
802290e: b084 sub sp, #16
8022910: af00 add r7, sp, #0
8022912: 6078 str r0, [r7, #4]
struct udp_pcb *pcb2;
LWIP_ASSERT_CORE_LOCKED();
8022914: f7ee fc5e bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("udp_remove: invalid pcb", pcb != NULL, return);
8022918: 687b ldr r3, [r7, #4]
802291a: 2b00 cmp r3, #0
802291c: d107 bne.n 802292e <udp_remove+0x22>
802291e: 4b19 ldr r3, [pc, #100] @ (8022984 <udp_remove+0x78>)
8022920: f240 42a1 movw r2, #1185 @ 0x4a1
8022924: 4918 ldr r1, [pc, #96] @ (8022988 <udp_remove+0x7c>)
8022926: 4819 ldr r0, [pc, #100] @ (802298c <udp_remove+0x80>)
8022928: f008 f880 bl 802aa2c <iprintf>
802292c: e026 b.n 802297c <udp_remove+0x70>
mib2_udp_unbind(pcb);
/* pcb to be removed is first in list? */
if (udp_pcbs == pcb) {
802292e: 4b18 ldr r3, [pc, #96] @ (8022990 <udp_remove+0x84>)
8022930: 681b ldr r3, [r3, #0]
8022932: 687a ldr r2, [r7, #4]
8022934: 429a cmp r2, r3
8022936: d105 bne.n 8022944 <udp_remove+0x38>
/* make list start at 2nd pcb */
udp_pcbs = udp_pcbs->next;
8022938: 4b15 ldr r3, [pc, #84] @ (8022990 <udp_remove+0x84>)
802293a: 681b ldr r3, [r3, #0]
802293c: 68db ldr r3, [r3, #12]
802293e: 4a14 ldr r2, [pc, #80] @ (8022990 <udp_remove+0x84>)
8022940: 6013 str r3, [r2, #0]
8022942: e017 b.n 8022974 <udp_remove+0x68>
/* pcb not 1st in list */
} else {
for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
8022944: 4b12 ldr r3, [pc, #72] @ (8022990 <udp_remove+0x84>)
8022946: 681b ldr r3, [r3, #0]
8022948: 60fb str r3, [r7, #12]
802294a: e010 b.n 802296e <udp_remove+0x62>
/* find pcb in udp_pcbs list */
if (pcb2->next != NULL && pcb2->next == pcb) {
802294c: 68fb ldr r3, [r7, #12]
802294e: 68db ldr r3, [r3, #12]
8022950: 2b00 cmp r3, #0
8022952: d009 beq.n 8022968 <udp_remove+0x5c>
8022954: 68fb ldr r3, [r7, #12]
8022956: 68db ldr r3, [r3, #12]
8022958: 687a ldr r2, [r7, #4]
802295a: 429a cmp r2, r3
802295c: d104 bne.n 8022968 <udp_remove+0x5c>
/* remove pcb from list */
pcb2->next = pcb->next;
802295e: 687b ldr r3, [r7, #4]
8022960: 68da ldr r2, [r3, #12]
8022962: 68fb ldr r3, [r7, #12]
8022964: 60da str r2, [r3, #12]
break;
8022966: e005 b.n 8022974 <udp_remove+0x68>
for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
8022968: 68fb ldr r3, [r7, #12]
802296a: 68db ldr r3, [r3, #12]
802296c: 60fb str r3, [r7, #12]
802296e: 68fb ldr r3, [r7, #12]
8022970: 2b00 cmp r3, #0
8022972: d1eb bne.n 802294c <udp_remove+0x40>
}
}
}
memp_free(MEMP_UDP_PCB, pcb);
8022974: 6879 ldr r1, [r7, #4]
8022976: 2000 movs r0, #0
8022978: f7f7 fef2 bl 801a760 <memp_free>
}
802297c: 3710 adds r7, #16
802297e: 46bd mov sp, r7
8022980: bd80 pop {r7, pc}
8022982: bf00 nop
8022984: 08030d38 .word 0x08030d38
8022988: 08031084 .word 0x08031084
802298c: 08030d8c .word 0x08030d8c
8022990: 2402b008 .word 0x2402b008
08022994 <udp_new>:
*
* @see udp_remove()
*/
struct udp_pcb *
udp_new(void)
{
8022994: b580 push {r7, lr}
8022996: b082 sub sp, #8
8022998: af00 add r7, sp, #0
struct udp_pcb *pcb;
LWIP_ASSERT_CORE_LOCKED();
802299a: f7ee fc1b bl 80111d4 <sys_check_core_locking>
pcb = (struct udp_pcb *)memp_malloc(MEMP_UDP_PCB);
802299e: 2000 movs r0, #0
80229a0: f7f7 fe68 bl 801a674 <memp_malloc>
80229a4: 6078 str r0, [r7, #4]
/* could allocate UDP PCB? */
if (pcb != NULL) {
80229a6: 687b ldr r3, [r7, #4]
80229a8: 2b00 cmp r3, #0
80229aa: d007 beq.n 80229bc <udp_new+0x28>
/* UDP Lite: by initializing to all zeroes, chksum_len is set to 0
* which means checksum is generated over the whole datagram per default
* (recommended as default by RFC 3828). */
/* initialize PCB to all zeroes */
memset(pcb, 0, sizeof(struct udp_pcb));
80229ac: 2220 movs r2, #32
80229ae: 2100 movs r1, #0
80229b0: 6878 ldr r0, [r7, #4]
80229b2: f008 f9cd bl 802ad50 <memset>
pcb->ttl = UDP_TTL;
80229b6: 687b ldr r3, [r7, #4]
80229b8: 22ff movs r2, #255 @ 0xff
80229ba: 72da strb r2, [r3, #11]
#if LWIP_MULTICAST_TX_OPTIONS
udp_set_multicast_ttl(pcb, UDP_TTL);
#endif /* LWIP_MULTICAST_TX_OPTIONS */
}
return pcb;
80229bc: 687b ldr r3, [r7, #4]
}
80229be: 4618 mov r0, r3
80229c0: 3708 adds r7, #8
80229c2: 46bd mov sp, r7
80229c4: bd80 pop {r7, pc}
080229c6 <udp_new_ip_type>:
*
* @see udp_remove()
*/
struct udp_pcb *
udp_new_ip_type(u8_t type)
{
80229c6: b580 push {r7, lr}
80229c8: b084 sub sp, #16
80229ca: af00 add r7, sp, #0
80229cc: 4603 mov r3, r0
80229ce: 71fb strb r3, [r7, #7]
struct udp_pcb *pcb;
LWIP_ASSERT_CORE_LOCKED();
80229d0: f7ee fc00 bl 80111d4 <sys_check_core_locking>
pcb = udp_new();
80229d4: f7ff ffde bl 8022994 <udp_new>
80229d8: 60f8 str r0, [r7, #12]
IP_SET_TYPE_VAL(pcb->remote_ip, type);
}
#else
LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
return pcb;
80229da: 68fb ldr r3, [r7, #12]
}
80229dc: 4618 mov r0, r3
80229de: 3710 adds r7, #16
80229e0: 46bd mov sp, r7
80229e2: bd80 pop {r7, pc}
080229e4 <udp_netif_ip_addr_changed>:
*
* @param old_addr IP address of the netif before change
* @param new_addr IP address of the netif after change
*/
void udp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
80229e4: b480 push {r7}
80229e6: b085 sub sp, #20
80229e8: af00 add r7, sp, #0
80229ea: 6078 str r0, [r7, #4]
80229ec: 6039 str r1, [r7, #0]
struct udp_pcb *upcb;
if (!ip_addr_isany(old_addr) && !ip_addr_isany(new_addr)) {
80229ee: 687b ldr r3, [r7, #4]
80229f0: 2b00 cmp r3, #0
80229f2: d01e beq.n 8022a32 <udp_netif_ip_addr_changed+0x4e>
80229f4: 687b ldr r3, [r7, #4]
80229f6: 681b ldr r3, [r3, #0]
80229f8: 2b00 cmp r3, #0
80229fa: d01a beq.n 8022a32 <udp_netif_ip_addr_changed+0x4e>
80229fc: 683b ldr r3, [r7, #0]
80229fe: 2b00 cmp r3, #0
8022a00: d017 beq.n 8022a32 <udp_netif_ip_addr_changed+0x4e>
8022a02: 683b ldr r3, [r7, #0]
8022a04: 681b ldr r3, [r3, #0]
8022a06: 2b00 cmp r3, #0
8022a08: d013 beq.n 8022a32 <udp_netif_ip_addr_changed+0x4e>
for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
8022a0a: 4b0d ldr r3, [pc, #52] @ (8022a40 <udp_netif_ip_addr_changed+0x5c>)
8022a0c: 681b ldr r3, [r3, #0]
8022a0e: 60fb str r3, [r7, #12]
8022a10: e00c b.n 8022a2c <udp_netif_ip_addr_changed+0x48>
/* PCB bound to current local interface address? */
if (ip_addr_cmp(&upcb->local_ip, old_addr)) {
8022a12: 68fb ldr r3, [r7, #12]
8022a14: 681a ldr r2, [r3, #0]
8022a16: 687b ldr r3, [r7, #4]
8022a18: 681b ldr r3, [r3, #0]
8022a1a: 429a cmp r2, r3
8022a1c: d103 bne.n 8022a26 <udp_netif_ip_addr_changed+0x42>
/* The PCB is bound to the old ipaddr and
* is set to bound to the new one instead */
ip_addr_copy(upcb->local_ip, *new_addr);
8022a1e: 683b ldr r3, [r7, #0]
8022a20: 681a ldr r2, [r3, #0]
8022a22: 68fb ldr r3, [r7, #12]
8022a24: 601a str r2, [r3, #0]
for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
8022a26: 68fb ldr r3, [r7, #12]
8022a28: 68db ldr r3, [r3, #12]
8022a2a: 60fb str r3, [r7, #12]
8022a2c: 68fb ldr r3, [r7, #12]
8022a2e: 2b00 cmp r3, #0
8022a30: d1ef bne.n 8022a12 <udp_netif_ip_addr_changed+0x2e>
}
}
}
}
8022a32: bf00 nop
8022a34: 3714 adds r7, #20
8022a36: 46bd mov sp, r7
8022a38: f85d 7b04 ldr.w r7, [sp], #4
8022a3c: 4770 bx lr
8022a3e: bf00 nop
8022a40: 2402b008 .word 0x2402b008
08022a44 <dhcp_inc_pcb_refcount>:
static void dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out);
/** Ensure DHCP PCB is allocated and bound */
static err_t
dhcp_inc_pcb_refcount(void)
{
8022a44: b580 push {r7, lr}
8022a46: af00 add r7, sp, #0
if (dhcp_pcb_refcount == 0) {
8022a48: 4b20 ldr r3, [pc, #128] @ (8022acc <dhcp_inc_pcb_refcount+0x88>)
8022a4a: 781b ldrb r3, [r3, #0]
8022a4c: 2b00 cmp r3, #0
8022a4e: d133 bne.n 8022ab8 <dhcp_inc_pcb_refcount+0x74>
LWIP_ASSERT("dhcp_inc_pcb_refcount(): memory leak", dhcp_pcb == NULL);
8022a50: 4b1f ldr r3, [pc, #124] @ (8022ad0 <dhcp_inc_pcb_refcount+0x8c>)
8022a52: 681b ldr r3, [r3, #0]
8022a54: 2b00 cmp r3, #0
8022a56: d005 beq.n 8022a64 <dhcp_inc_pcb_refcount+0x20>
8022a58: 4b1e ldr r3, [pc, #120] @ (8022ad4 <dhcp_inc_pcb_refcount+0x90>)
8022a5a: 22e5 movs r2, #229 @ 0xe5
8022a5c: 491e ldr r1, [pc, #120] @ (8022ad8 <dhcp_inc_pcb_refcount+0x94>)
8022a5e: 481f ldr r0, [pc, #124] @ (8022adc <dhcp_inc_pcb_refcount+0x98>)
8022a60: f007 ffe4 bl 802aa2c <iprintf>
/* allocate UDP PCB */
dhcp_pcb = udp_new();
8022a64: f7ff ff96 bl 8022994 <udp_new>
8022a68: 4603 mov r3, r0
8022a6a: 4a19 ldr r2, [pc, #100] @ (8022ad0 <dhcp_inc_pcb_refcount+0x8c>)
8022a6c: 6013 str r3, [r2, #0]
if (dhcp_pcb == NULL) {
8022a6e: 4b18 ldr r3, [pc, #96] @ (8022ad0 <dhcp_inc_pcb_refcount+0x8c>)
8022a70: 681b ldr r3, [r3, #0]
8022a72: 2b00 cmp r3, #0
8022a74: d102 bne.n 8022a7c <dhcp_inc_pcb_refcount+0x38>
return ERR_MEM;
8022a76: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8022a7a: e024 b.n 8022ac6 <dhcp_inc_pcb_refcount+0x82>
}
ip_set_option(dhcp_pcb, SOF_BROADCAST);
8022a7c: 4b14 ldr r3, [pc, #80] @ (8022ad0 <dhcp_inc_pcb_refcount+0x8c>)
8022a7e: 681b ldr r3, [r3, #0]
8022a80: 7a5a ldrb r2, [r3, #9]
8022a82: 4b13 ldr r3, [pc, #76] @ (8022ad0 <dhcp_inc_pcb_refcount+0x8c>)
8022a84: 681b ldr r3, [r3, #0]
8022a86: f042 0220 orr.w r2, r2, #32
8022a8a: b2d2 uxtb r2, r2
8022a8c: 725a strb r2, [r3, #9]
/* set up local and remote port for the pcb -> listen on all interfaces on all src/dest IPs */
udp_bind(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_CLIENT);
8022a8e: 4b10 ldr r3, [pc, #64] @ (8022ad0 <dhcp_inc_pcb_refcount+0x8c>)
8022a90: 681b ldr r3, [r3, #0]
8022a92: 2244 movs r2, #68 @ 0x44
8022a94: 4912 ldr r1, [pc, #72] @ (8022ae0 <dhcp_inc_pcb_refcount+0x9c>)
8022a96: 4618 mov r0, r3
8022a98: f7ff fdf2 bl 8022680 <udp_bind>
udp_connect(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_SERVER);
8022a9c: 4b0c ldr r3, [pc, #48] @ (8022ad0 <dhcp_inc_pcb_refcount+0x8c>)
8022a9e: 681b ldr r3, [r3, #0]
8022aa0: 2243 movs r2, #67 @ 0x43
8022aa2: 490f ldr r1, [pc, #60] @ (8022ae0 <dhcp_inc_pcb_refcount+0x9c>)
8022aa4: 4618 mov r0, r3
8022aa6: f7ff fe75 bl 8022794 <udp_connect>
udp_recv(dhcp_pcb, dhcp_recv, NULL);
8022aaa: 4b09 ldr r3, [pc, #36] @ (8022ad0 <dhcp_inc_pcb_refcount+0x8c>)
8022aac: 681b ldr r3, [r3, #0]
8022aae: 2200 movs r2, #0
8022ab0: 490c ldr r1, [pc, #48] @ (8022ae4 <dhcp_inc_pcb_refcount+0xa0>)
8022ab2: 4618 mov r0, r3
8022ab4: f7ff ff08 bl 80228c8 <udp_recv>
}
dhcp_pcb_refcount++;
8022ab8: 4b04 ldr r3, [pc, #16] @ (8022acc <dhcp_inc_pcb_refcount+0x88>)
8022aba: 781b ldrb r3, [r3, #0]
8022abc: 3301 adds r3, #1
8022abe: b2da uxtb r2, r3
8022ac0: 4b02 ldr r3, [pc, #8] @ (8022acc <dhcp_inc_pcb_refcount+0x88>)
8022ac2: 701a strb r2, [r3, #0]
return ERR_OK;
8022ac4: 2300 movs r3, #0
}
8022ac6: 4618 mov r0, r3
8022ac8: bd80 pop {r7, pc}
8022aca: bf00 nop
8022acc: 2402b038 .word 0x2402b038
8022ad0: 2402b034 .word 0x2402b034
8022ad4: 0803109c .word 0x0803109c
8022ad8: 080310d4 .word 0x080310d4
8022adc: 080310fc .word 0x080310fc
8022ae0: 08031ec8 .word 0x08031ec8
8022ae4: 080243b5 .word 0x080243b5
08022ae8 <dhcp_dec_pcb_refcount>:
/** Free DHCP PCB if the last netif stops using it */
static void
dhcp_dec_pcb_refcount(void)
{
8022ae8: b580 push {r7, lr}
8022aea: af00 add r7, sp, #0
LWIP_ASSERT("dhcp_pcb_refcount(): refcount error", (dhcp_pcb_refcount > 0));
8022aec: 4b0e ldr r3, [pc, #56] @ (8022b28 <dhcp_dec_pcb_refcount+0x40>)
8022aee: 781b ldrb r3, [r3, #0]
8022af0: 2b00 cmp r3, #0
8022af2: d105 bne.n 8022b00 <dhcp_dec_pcb_refcount+0x18>
8022af4: 4b0d ldr r3, [pc, #52] @ (8022b2c <dhcp_dec_pcb_refcount+0x44>)
8022af6: 22ff movs r2, #255 @ 0xff
8022af8: 490d ldr r1, [pc, #52] @ (8022b30 <dhcp_dec_pcb_refcount+0x48>)
8022afa: 480e ldr r0, [pc, #56] @ (8022b34 <dhcp_dec_pcb_refcount+0x4c>)
8022afc: f007 ff96 bl 802aa2c <iprintf>
dhcp_pcb_refcount--;
8022b00: 4b09 ldr r3, [pc, #36] @ (8022b28 <dhcp_dec_pcb_refcount+0x40>)
8022b02: 781b ldrb r3, [r3, #0]
8022b04: 3b01 subs r3, #1
8022b06: b2da uxtb r2, r3
8022b08: 4b07 ldr r3, [pc, #28] @ (8022b28 <dhcp_dec_pcb_refcount+0x40>)
8022b0a: 701a strb r2, [r3, #0]
if (dhcp_pcb_refcount == 0) {
8022b0c: 4b06 ldr r3, [pc, #24] @ (8022b28 <dhcp_dec_pcb_refcount+0x40>)
8022b0e: 781b ldrb r3, [r3, #0]
8022b10: 2b00 cmp r3, #0
8022b12: d107 bne.n 8022b24 <dhcp_dec_pcb_refcount+0x3c>
udp_remove(dhcp_pcb);
8022b14: 4b08 ldr r3, [pc, #32] @ (8022b38 <dhcp_dec_pcb_refcount+0x50>)
8022b16: 681b ldr r3, [r3, #0]
8022b18: 4618 mov r0, r3
8022b1a: f7ff fef7 bl 802290c <udp_remove>
dhcp_pcb = NULL;
8022b1e: 4b06 ldr r3, [pc, #24] @ (8022b38 <dhcp_dec_pcb_refcount+0x50>)
8022b20: 2200 movs r2, #0
8022b22: 601a str r2, [r3, #0]
}
}
8022b24: bf00 nop
8022b26: bd80 pop {r7, pc}
8022b28: 2402b038 .word 0x2402b038
8022b2c: 0803109c .word 0x0803109c
8022b30: 08031124 .word 0x08031124
8022b34: 080310fc .word 0x080310fc
8022b38: 2402b034 .word 0x2402b034
08022b3c <dhcp_handle_nak>:
*
* @param netif the netif under DHCP control
*/
static void
dhcp_handle_nak(struct netif *netif)
{
8022b3c: b580 push {r7, lr}
8022b3e: b084 sub sp, #16
8022b40: af00 add r7, sp, #0
8022b42: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8022b44: 687b ldr r3, [r7, #4]
8022b46: 6a5b ldr r3, [r3, #36] @ 0x24
8022b48: 60fb str r3, [r7, #12]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n",
(void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
/* Change to a defined state - set this before assigning the address
to ensure the callback can use dhcp_supplied_address() */
dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
8022b4a: 210c movs r1, #12
8022b4c: 68f8 ldr r0, [r7, #12]
8022b4e: f001 f862 bl 8023c16 <dhcp_set_state>
/* remove IP address from interface (must no longer be used, as per RFC2131) */
netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
8022b52: 4b06 ldr r3, [pc, #24] @ (8022b6c <dhcp_handle_nak+0x30>)
8022b54: 4a05 ldr r2, [pc, #20] @ (8022b6c <dhcp_handle_nak+0x30>)
8022b56: 4905 ldr r1, [pc, #20] @ (8022b6c <dhcp_handle_nak+0x30>)
8022b58: 6878 ldr r0, [r7, #4]
8022b5a: f7f7 ffa5 bl 801aaa8 <netif_set_addr>
/* We can immediately restart discovery */
dhcp_discover(netif);
8022b5e: 6878 ldr r0, [r7, #4]
8022b60: f000 fc4c bl 80233fc <dhcp_discover>
}
8022b64: bf00 nop
8022b66: 3710 adds r7, #16
8022b68: 46bd mov sp, r7
8022b6a: bd80 pop {r7, pc}
8022b6c: 08031ec8 .word 0x08031ec8
08022b70 <dhcp_check>:
*
* @param netif the netif under DHCP control
*/
static void
dhcp_check(struct netif *netif)
{
8022b70: b580 push {r7, lr}
8022b72: b084 sub sp, #16
8022b74: af00 add r7, sp, #0
8022b76: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8022b78: 687b ldr r3, [r7, #4]
8022b7a: 6a5b ldr r3, [r3, #36] @ 0x24
8022b7c: 60fb str r3, [r7, #12]
err_t result;
u16_t msecs;
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0],
(s16_t)netif->name[1]));
dhcp_set_state(dhcp, DHCP_STATE_CHECKING);
8022b7e: 2108 movs r1, #8
8022b80: 68f8 ldr r0, [r7, #12]
8022b82: f001 f848 bl 8023c16 <dhcp_set_state>
/* create an ARP query for the offered IP address, expecting that no host
responds, as the IP address should not be in use. */
result = etharp_query(netif, &dhcp->offered_ip_addr, NULL);
8022b86: 68fb ldr r3, [r7, #12]
8022b88: 331c adds r3, #28
8022b8a: 2200 movs r2, #0
8022b8c: 4619 mov r1, r3
8022b8e: 6878 ldr r0, [r7, #4]
8022b90: f002 fb88 bl 80252a4 <etharp_query>
8022b94: 4603 mov r3, r0
8022b96: 72fb strb r3, [r7, #11]
if (result != ERR_OK) {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n"));
}
if (dhcp->tries < 255) {
8022b98: 68fb ldr r3, [r7, #12]
8022b9a: 799b ldrb r3, [r3, #6]
8022b9c: 2bff cmp r3, #255 @ 0xff
8022b9e: d005 beq.n 8022bac <dhcp_check+0x3c>
dhcp->tries++;
8022ba0: 68fb ldr r3, [r7, #12]
8022ba2: 799b ldrb r3, [r3, #6]
8022ba4: 3301 adds r3, #1
8022ba6: b2da uxtb r2, r3
8022ba8: 68fb ldr r3, [r7, #12]
8022baa: 719a strb r2, [r3, #6]
}
msecs = 500;
8022bac: f44f 73fa mov.w r3, #500 @ 0x1f4
8022bb0: 813b strh r3, [r7, #8]
dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
8022bb2: 893b ldrh r3, [r7, #8]
8022bb4: f203 13f3 addw r3, r3, #499 @ 0x1f3
8022bb8: 4a06 ldr r2, [pc, #24] @ (8022bd4 <dhcp_check+0x64>)
8022bba: fb82 1203 smull r1, r2, r2, r3
8022bbe: 1152 asrs r2, r2, #5
8022bc0: 17db asrs r3, r3, #31
8022bc2: 1ad3 subs r3, r2, r3
8022bc4: b29a uxth r2, r3
8022bc6: 68fb ldr r3, [r7, #12]
8022bc8: 811a strh r2, [r3, #8]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs));
}
8022bca: bf00 nop
8022bcc: 3710 adds r7, #16
8022bce: 46bd mov sp, r7
8022bd0: bd80 pop {r7, pc}
8022bd2: bf00 nop
8022bd4: 10624dd3 .word 0x10624dd3
08022bd8 <dhcp_handle_offer>:
*
* @param netif the netif under DHCP control
*/
static void
dhcp_handle_offer(struct netif *netif, struct dhcp_msg *msg_in)
{
8022bd8: b580 push {r7, lr}
8022bda: b084 sub sp, #16
8022bdc: af00 add r7, sp, #0
8022bde: 6078 str r0, [r7, #4]
8022be0: 6039 str r1, [r7, #0]
struct dhcp *dhcp = netif_dhcp_data(netif);
8022be2: 687b ldr r3, [r7, #4]
8022be4: 6a5b ldr r3, [r3, #36] @ 0x24
8022be6: 60fb str r3, [r7, #12]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n",
(void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
/* obtain the server address */
if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SERVER_ID)) {
8022be8: 4b0c ldr r3, [pc, #48] @ (8022c1c <dhcp_handle_offer+0x44>)
8022bea: 789b ldrb r3, [r3, #2]
8022bec: 2b00 cmp r3, #0
8022bee: d011 beq.n 8022c14 <dhcp_handle_offer+0x3c>
dhcp->request_timeout = 0; /* stop timer */
8022bf0: 68fb ldr r3, [r7, #12]
8022bf2: 2200 movs r2, #0
8022bf4: 811a strh r2, [r3, #8]
ip_addr_set_ip4_u32(&dhcp->server_ip_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SERVER_ID)));
8022bf6: 4b0a ldr r3, [pc, #40] @ (8022c20 <dhcp_handle_offer+0x48>)
8022bf8: 689b ldr r3, [r3, #8]
8022bfa: 4618 mov r0, r3
8022bfc: f7f6 ffd1 bl 8019ba2 <lwip_htonl>
8022c00: 4602 mov r2, r0
8022c02: 68fb ldr r3, [r7, #12]
8022c04: 619a str r2, [r3, #24]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n",
ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
/* remember offered address */
ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
8022c06: 683b ldr r3, [r7, #0]
8022c08: 691a ldr r2, [r3, #16]
8022c0a: 68fb ldr r3, [r7, #12]
8022c0c: 61da str r2, [r3, #28]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n",
ip4_addr_get_u32(&dhcp->offered_ip_addr)));
dhcp_select(netif);
8022c0e: 6878 ldr r0, [r7, #4]
8022c10: f000 f808 bl 8022c24 <dhcp_select>
} else {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
("dhcp_handle_offer(netif=%p) did not get server ID!\n", (void *)netif));
}
}
8022c14: bf00 nop
8022c16: 3710 adds r7, #16
8022c18: 46bd mov sp, r7
8022c1a: bd80 pop {r7, pc}
8022c1c: 2402b02c .word 0x2402b02c
8022c20: 2402b00c .word 0x2402b00c
08022c24 <dhcp_select>:
* @param netif the netif under DHCP control
* @return lwIP specific error (see error.h)
*/
static err_t
dhcp_select(struct netif *netif)
{
8022c24: b5b0 push {r4, r5, r7, lr}
8022c26: b08a sub sp, #40 @ 0x28
8022c28: af02 add r7, sp, #8
8022c2a: 6078 str r0, [r7, #4]
u16_t msecs;
u8_t i;
struct pbuf *p_out;
u16_t options_out_len;
LWIP_ERROR("dhcp_select: netif != NULL", (netif != NULL), return ERR_ARG;);
8022c2c: 687b ldr r3, [r7, #4]
8022c2e: 2b00 cmp r3, #0
8022c30: d109 bne.n 8022c46 <dhcp_select+0x22>
8022c32: 4b71 ldr r3, [pc, #452] @ (8022df8 <dhcp_select+0x1d4>)
8022c34: f240 1277 movw r2, #375 @ 0x177
8022c38: 4970 ldr r1, [pc, #448] @ (8022dfc <dhcp_select+0x1d8>)
8022c3a: 4871 ldr r0, [pc, #452] @ (8022e00 <dhcp_select+0x1dc>)
8022c3c: f007 fef6 bl 802aa2c <iprintf>
8022c40: f06f 030f mvn.w r3, #15
8022c44: e0d3 b.n 8022dee <dhcp_select+0x1ca>
dhcp = netif_dhcp_data(netif);
8022c46: 687b ldr r3, [r7, #4]
8022c48: 6a5b ldr r3, [r3, #36] @ 0x24
8022c4a: 61bb str r3, [r7, #24]
LWIP_ERROR("dhcp_select: dhcp != NULL", (dhcp != NULL), return ERR_VAL;);
8022c4c: 69bb ldr r3, [r7, #24]
8022c4e: 2b00 cmp r3, #0
8022c50: d109 bne.n 8022c66 <dhcp_select+0x42>
8022c52: 4b69 ldr r3, [pc, #420] @ (8022df8 <dhcp_select+0x1d4>)
8022c54: f240 1279 movw r2, #377 @ 0x179
8022c58: 496a ldr r1, [pc, #424] @ (8022e04 <dhcp_select+0x1e0>)
8022c5a: 4869 ldr r0, [pc, #420] @ (8022e00 <dhcp_select+0x1dc>)
8022c5c: f007 fee6 bl 802aa2c <iprintf>
8022c60: f06f 0305 mvn.w r3, #5
8022c64: e0c3 b.n 8022dee <dhcp_select+0x1ca>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
dhcp_set_state(dhcp, DHCP_STATE_REQUESTING);
8022c66: 2101 movs r1, #1
8022c68: 69b8 ldr r0, [r7, #24]
8022c6a: f000 ffd4 bl 8023c16 <dhcp_set_state>
/* create and initialize the DHCP message header */
p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
8022c6e: f107 030c add.w r3, r7, #12
8022c72: 2203 movs r2, #3
8022c74: 69b9 ldr r1, [r7, #24]
8022c76: 6878 ldr r0, [r7, #4]
8022c78: f001 fc66 bl 8024548 <dhcp_create_msg>
8022c7c: 6178 str r0, [r7, #20]
if (p_out != NULL) {
8022c7e: 697b ldr r3, [r7, #20]
8022c80: 2b00 cmp r3, #0
8022c82: f000 8085 beq.w 8022d90 <dhcp_select+0x16c>
struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
8022c86: 697b ldr r3, [r7, #20]
8022c88: 685b ldr r3, [r3, #4]
8022c8a: 613b str r3, [r7, #16]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
8022c8c: 89b8 ldrh r0, [r7, #12]
8022c8e: 693b ldr r3, [r7, #16]
8022c90: f103 01f0 add.w r1, r3, #240 @ 0xf0
8022c94: 2302 movs r3, #2
8022c96: 2239 movs r2, #57 @ 0x39
8022c98: f000 ffd8 bl 8023c4c <dhcp_option>
8022c9c: 4603 mov r3, r0
8022c9e: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
8022ca0: 89b8 ldrh r0, [r7, #12]
8022ca2: 693b ldr r3, [r7, #16]
8022ca4: f103 01f0 add.w r1, r3, #240 @ 0xf0
8022ca8: 687b ldr r3, [r7, #4]
8022caa: 8d1b ldrh r3, [r3, #40] @ 0x28
8022cac: 461a mov r2, r3
8022cae: f001 f827 bl 8023d00 <dhcp_option_short>
8022cb2: 4603 mov r3, r0
8022cb4: 81bb strh r3, [r7, #12]
/* MUST request the offered IP address */
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
8022cb6: 89b8 ldrh r0, [r7, #12]
8022cb8: 693b ldr r3, [r7, #16]
8022cba: f103 01f0 add.w r1, r3, #240 @ 0xf0
8022cbe: 2304 movs r3, #4
8022cc0: 2232 movs r2, #50 @ 0x32
8022cc2: f000 ffc3 bl 8023c4c <dhcp_option>
8022cc6: 4603 mov r3, r0
8022cc8: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
8022cca: 89bc ldrh r4, [r7, #12]
8022ccc: 693b ldr r3, [r7, #16]
8022cce: f103 05f0 add.w r5, r3, #240 @ 0xf0
8022cd2: 69bb ldr r3, [r7, #24]
8022cd4: 69db ldr r3, [r3, #28]
8022cd6: 4618 mov r0, r3
8022cd8: f7f6 ff63 bl 8019ba2 <lwip_htonl>
8022cdc: 4603 mov r3, r0
8022cde: 461a mov r2, r3
8022ce0: 4629 mov r1, r5
8022ce2: 4620 mov r0, r4
8022ce4: f001 f83e bl 8023d64 <dhcp_option_long>
8022ce8: 4603 mov r3, r0
8022cea: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
8022cec: 89b8 ldrh r0, [r7, #12]
8022cee: 693b ldr r3, [r7, #16]
8022cf0: f103 01f0 add.w r1, r3, #240 @ 0xf0
8022cf4: 2304 movs r3, #4
8022cf6: 2236 movs r2, #54 @ 0x36
8022cf8: f000 ffa8 bl 8023c4c <dhcp_option>
8022cfc: 4603 mov r3, r0
8022cfe: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
8022d00: 89bc ldrh r4, [r7, #12]
8022d02: 693b ldr r3, [r7, #16]
8022d04: f103 05f0 add.w r5, r3, #240 @ 0xf0
8022d08: 69bb ldr r3, [r7, #24]
8022d0a: 699b ldr r3, [r3, #24]
8022d0c: 4618 mov r0, r3
8022d0e: f7f6 ff48 bl 8019ba2 <lwip_htonl>
8022d12: 4603 mov r3, r0
8022d14: 461a mov r2, r3
8022d16: 4629 mov r1, r5
8022d18: 4620 mov r0, r4
8022d1a: f001 f823 bl 8023d64 <dhcp_option_long>
8022d1e: 4603 mov r3, r0
8022d20: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
8022d22: 89b8 ldrh r0, [r7, #12]
8022d24: 693b ldr r3, [r7, #16]
8022d26: f103 01f0 add.w r1, r3, #240 @ 0xf0
8022d2a: 2303 movs r3, #3
8022d2c: 2237 movs r2, #55 @ 0x37
8022d2e: f000 ff8d bl 8023c4c <dhcp_option>
8022d32: 4603 mov r3, r0
8022d34: 81bb strh r3, [r7, #12]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
8022d36: 2300 movs r3, #0
8022d38: 77fb strb r3, [r7, #31]
8022d3a: e00e b.n 8022d5a <dhcp_select+0x136>
options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
8022d3c: 89b8 ldrh r0, [r7, #12]
8022d3e: 693b ldr r3, [r7, #16]
8022d40: f103 01f0 add.w r1, r3, #240 @ 0xf0
8022d44: 7ffb ldrb r3, [r7, #31]
8022d46: 4a30 ldr r2, [pc, #192] @ (8022e08 <dhcp_select+0x1e4>)
8022d48: 5cd3 ldrb r3, [r2, r3]
8022d4a: 461a mov r2, r3
8022d4c: f000 ffb2 bl 8023cb4 <dhcp_option_byte>
8022d50: 4603 mov r3, r0
8022d52: 81bb strh r3, [r7, #12]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
8022d54: 7ffb ldrb r3, [r7, #31]
8022d56: 3301 adds r3, #1
8022d58: 77fb strb r3, [r7, #31]
8022d5a: 7ffb ldrb r3, [r7, #31]
8022d5c: 2b02 cmp r3, #2
8022d5e: d9ed bls.n 8022d3c <dhcp_select+0x118>
#if LWIP_NETIF_HOSTNAME
options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */
LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REQUESTING, msg_out, DHCP_REQUEST, &options_out_len);
dhcp_option_trailer(options_out_len, msg_out->options, p_out);
8022d60: 89b8 ldrh r0, [r7, #12]
8022d62: 693b ldr r3, [r7, #16]
8022d64: 33f0 adds r3, #240 @ 0xf0
8022d66: 697a ldr r2, [r7, #20]
8022d68: 4619 mov r1, r3
8022d6a: f001 fcc3 bl 80246f4 <dhcp_option_trailer>
/* send broadcast to any DHCP server */
result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
8022d6e: 4b27 ldr r3, [pc, #156] @ (8022e0c <dhcp_select+0x1e8>)
8022d70: 6818 ldr r0, [r3, #0]
8022d72: 4b27 ldr r3, [pc, #156] @ (8022e10 <dhcp_select+0x1ec>)
8022d74: 9301 str r3, [sp, #4]
8022d76: 687b ldr r3, [r7, #4]
8022d78: 9300 str r3, [sp, #0]
8022d7a: 2343 movs r3, #67 @ 0x43
8022d7c: 4a25 ldr r2, [pc, #148] @ (8022e14 <dhcp_select+0x1f0>)
8022d7e: 6979 ldr r1, [r7, #20]
8022d80: f7ff fb96 bl 80224b0 <udp_sendto_if_src>
8022d84: 4603 mov r3, r0
8022d86: 77bb strb r3, [r7, #30]
pbuf_free(p_out);
8022d88: 6978 ldr r0, [r7, #20]
8022d8a: f7f8 fbd7 bl 801b53c <pbuf_free>
8022d8e: e001 b.n 8022d94 <dhcp_select+0x170>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n"));
} else {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n"));
result = ERR_MEM;
8022d90: 23ff movs r3, #255 @ 0xff
8022d92: 77bb strb r3, [r7, #30]
}
if (dhcp->tries < 255) {
8022d94: 69bb ldr r3, [r7, #24]
8022d96: 799b ldrb r3, [r3, #6]
8022d98: 2bff cmp r3, #255 @ 0xff
8022d9a: d005 beq.n 8022da8 <dhcp_select+0x184>
dhcp->tries++;
8022d9c: 69bb ldr r3, [r7, #24]
8022d9e: 799b ldrb r3, [r3, #6]
8022da0: 3301 adds r3, #1
8022da2: b2da uxtb r2, r3
8022da4: 69bb ldr r3, [r7, #24]
8022da6: 719a strb r2, [r3, #6]
}
msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
8022da8: 69bb ldr r3, [r7, #24]
8022daa: 799b ldrb r3, [r3, #6]
8022dac: 2b05 cmp r3, #5
8022dae: d80d bhi.n 8022dcc <dhcp_select+0x1a8>
8022db0: 69bb ldr r3, [r7, #24]
8022db2: 799b ldrb r3, [r3, #6]
8022db4: 461a mov r2, r3
8022db6: 2301 movs r3, #1
8022db8: 4093 lsls r3, r2
8022dba: b29b uxth r3, r3
8022dbc: 461a mov r2, r3
8022dbe: 0152 lsls r2, r2, #5
8022dc0: 1ad2 subs r2, r2, r3
8022dc2: 0092 lsls r2, r2, #2
8022dc4: 4413 add r3, r2
8022dc6: 00db lsls r3, r3, #3
8022dc8: b29b uxth r3, r3
8022dca: e001 b.n 8022dd0 <dhcp_select+0x1ac>
8022dcc: f64e 2360 movw r3, #60000 @ 0xea60
8022dd0: 81fb strh r3, [r7, #14]
dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
8022dd2: 89fb ldrh r3, [r7, #14]
8022dd4: f203 13f3 addw r3, r3, #499 @ 0x1f3
8022dd8: 4a0f ldr r2, [pc, #60] @ (8022e18 <dhcp_select+0x1f4>)
8022dda: fb82 1203 smull r1, r2, r2, r3
8022dde: 1152 asrs r2, r2, #5
8022de0: 17db asrs r3, r3, #31
8022de2: 1ad3 subs r3, r2, r3
8022de4: b29a uxth r2, r3
8022de6: 69bb ldr r3, [r7, #24]
8022de8: 811a strh r2, [r3, #8]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs));
return result;
8022dea: f997 301e ldrsb.w r3, [r7, #30]
}
8022dee: 4618 mov r0, r3
8022df0: 3720 adds r7, #32
8022df2: 46bd mov sp, r7
8022df4: bdb0 pop {r4, r5, r7, pc}
8022df6: bf00 nop
8022df8: 0803109c .word 0x0803109c
8022dfc: 08031148 .word 0x08031148
8022e00: 080310fc .word 0x080310fc
8022e04: 08031164 .word 0x08031164
8022e08: 24000058 .word 0x24000058
8022e0c: 2402b034 .word 0x2402b034
8022e10: 08031ec8 .word 0x08031ec8
8022e14: 08031ecc .word 0x08031ecc
8022e18: 10624dd3 .word 0x10624dd3
08022e1c <dhcp_coarse_tmr>:
* The DHCP timer that checks for lease renewal/rebind timeouts.
* Must be called once a minute (see @ref DHCP_COARSE_TIMER_SECS).
*/
void
dhcp_coarse_tmr(void)
{
8022e1c: b580 push {r7, lr}
8022e1e: b082 sub sp, #8
8022e20: af00 add r7, sp, #0
struct netif *netif;
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n"));
/* iterate through all network interfaces */
NETIF_FOREACH(netif) {
8022e22: 4b27 ldr r3, [pc, #156] @ (8022ec0 <dhcp_coarse_tmr+0xa4>)
8022e24: 681b ldr r3, [r3, #0]
8022e26: 607b str r3, [r7, #4]
8022e28: e042 b.n 8022eb0 <dhcp_coarse_tmr+0x94>
/* only act on DHCP configured interfaces */
struct dhcp *dhcp = netif_dhcp_data(netif);
8022e2a: 687b ldr r3, [r7, #4]
8022e2c: 6a5b ldr r3, [r3, #36] @ 0x24
8022e2e: 603b str r3, [r7, #0]
if ((dhcp != NULL) && (dhcp->state != DHCP_STATE_OFF)) {
8022e30: 683b ldr r3, [r7, #0]
8022e32: 2b00 cmp r3, #0
8022e34: d039 beq.n 8022eaa <dhcp_coarse_tmr+0x8e>
8022e36: 683b ldr r3, [r7, #0]
8022e38: 795b ldrb r3, [r3, #5]
8022e3a: 2b00 cmp r3, #0
8022e3c: d035 beq.n 8022eaa <dhcp_coarse_tmr+0x8e>
/* compare lease time to expire timeout */
if (dhcp->t0_timeout && (++dhcp->lease_used == dhcp->t0_timeout)) {
8022e3e: 683b ldr r3, [r7, #0]
8022e40: 8a9b ldrh r3, [r3, #20]
8022e42: 2b00 cmp r3, #0
8022e44: d012 beq.n 8022e6c <dhcp_coarse_tmr+0x50>
8022e46: 683b ldr r3, [r7, #0]
8022e48: 8a5b ldrh r3, [r3, #18]
8022e4a: 3301 adds r3, #1
8022e4c: b29a uxth r2, r3
8022e4e: 683b ldr r3, [r7, #0]
8022e50: 825a strh r2, [r3, #18]
8022e52: 683b ldr r3, [r7, #0]
8022e54: 8a5a ldrh r2, [r3, #18]
8022e56: 683b ldr r3, [r7, #0]
8022e58: 8a9b ldrh r3, [r3, #20]
8022e5a: 429a cmp r2, r3
8022e5c: d106 bne.n 8022e6c <dhcp_coarse_tmr+0x50>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t0 timeout\n"));
/* this clients' lease time has expired */
dhcp_release_and_stop(netif);
8022e5e: 6878 ldr r0, [r7, #4]
8022e60: f000 fe32 bl 8023ac8 <dhcp_release_and_stop>
dhcp_start(netif);
8022e64: 6878 ldr r0, [r7, #4]
8022e66: f000 f96b bl 8023140 <dhcp_start>
8022e6a: e01e b.n 8022eaa <dhcp_coarse_tmr+0x8e>
/* timer is active (non zero), and triggers (zeroes) now? */
} else if (dhcp->t2_rebind_time && (dhcp->t2_rebind_time-- == 1)) {
8022e6c: 683b ldr r3, [r7, #0]
8022e6e: 8a1b ldrh r3, [r3, #16]
8022e70: 2b00 cmp r3, #0
8022e72: d00b beq.n 8022e8c <dhcp_coarse_tmr+0x70>
8022e74: 683b ldr r3, [r7, #0]
8022e76: 8a1b ldrh r3, [r3, #16]
8022e78: 1e5a subs r2, r3, #1
8022e7a: b291 uxth r1, r2
8022e7c: 683a ldr r2, [r7, #0]
8022e7e: 8211 strh r1, [r2, #16]
8022e80: 2b01 cmp r3, #1
8022e82: d103 bne.n 8022e8c <dhcp_coarse_tmr+0x70>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n"));
/* this clients' rebind timeout triggered */
dhcp_t2_timeout(netif);
8022e84: 6878 ldr r0, [r7, #4]
8022e86: f000 f8c7 bl 8023018 <dhcp_t2_timeout>
8022e8a: e00e b.n 8022eaa <dhcp_coarse_tmr+0x8e>
/* timer is active (non zero), and triggers (zeroes) now */
} else if (dhcp->t1_renew_time && (dhcp->t1_renew_time-- == 1)) {
8022e8c: 683b ldr r3, [r7, #0]
8022e8e: 89db ldrh r3, [r3, #14]
8022e90: 2b00 cmp r3, #0
8022e92: d00a beq.n 8022eaa <dhcp_coarse_tmr+0x8e>
8022e94: 683b ldr r3, [r7, #0]
8022e96: 89db ldrh r3, [r3, #14]
8022e98: 1e5a subs r2, r3, #1
8022e9a: b291 uxth r1, r2
8022e9c: 683a ldr r2, [r7, #0]
8022e9e: 81d1 strh r1, [r2, #14]
8022ea0: 2b01 cmp r3, #1
8022ea2: d102 bne.n 8022eaa <dhcp_coarse_tmr+0x8e>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n"));
/* this clients' renewal timeout triggered */
dhcp_t1_timeout(netif);
8022ea4: 6878 ldr r0, [r7, #4]
8022ea6: f000 f888 bl 8022fba <dhcp_t1_timeout>
NETIF_FOREACH(netif) {
8022eaa: 687b ldr r3, [r7, #4]
8022eac: 681b ldr r3, [r3, #0]
8022eae: 607b str r3, [r7, #4]
8022eb0: 687b ldr r3, [r7, #4]
8022eb2: 2b00 cmp r3, #0
8022eb4: d1b9 bne.n 8022e2a <dhcp_coarse_tmr+0xe>
}
}
}
}
8022eb6: bf00 nop
8022eb8: bf00 nop
8022eba: 3708 adds r7, #8
8022ebc: 46bd mov sp, r7
8022ebe: bd80 pop {r7, pc}
8022ec0: 2402af9c .word 0x2402af9c
08022ec4 <dhcp_fine_tmr>:
* A DHCP server is expected to respond within a short period of time.
* This timer checks whether an outstanding DHCP request is timed out.
*/
void
dhcp_fine_tmr(void)
{
8022ec4: b580 push {r7, lr}
8022ec6: b082 sub sp, #8
8022ec8: af00 add r7, sp, #0
struct netif *netif;
/* loop through netif's */
NETIF_FOREACH(netif) {
8022eca: 4b16 ldr r3, [pc, #88] @ (8022f24 <dhcp_fine_tmr+0x60>)
8022ecc: 681b ldr r3, [r3, #0]
8022ece: 607b str r3, [r7, #4]
8022ed0: e020 b.n 8022f14 <dhcp_fine_tmr+0x50>
struct dhcp *dhcp = netif_dhcp_data(netif);
8022ed2: 687b ldr r3, [r7, #4]
8022ed4: 6a5b ldr r3, [r3, #36] @ 0x24
8022ed6: 603b str r3, [r7, #0]
/* only act on DHCP configured interfaces */
if (dhcp != NULL) {
8022ed8: 683b ldr r3, [r7, #0]
8022eda: 2b00 cmp r3, #0
8022edc: d017 beq.n 8022f0e <dhcp_fine_tmr+0x4a>
/* timer is active (non zero), and is about to trigger now */
if (dhcp->request_timeout > 1) {
8022ede: 683b ldr r3, [r7, #0]
8022ee0: 891b ldrh r3, [r3, #8]
8022ee2: 2b01 cmp r3, #1
8022ee4: d906 bls.n 8022ef4 <dhcp_fine_tmr+0x30>
dhcp->request_timeout--;
8022ee6: 683b ldr r3, [r7, #0]
8022ee8: 891b ldrh r3, [r3, #8]
8022eea: 3b01 subs r3, #1
8022eec: b29a uxth r2, r3
8022eee: 683b ldr r3, [r7, #0]
8022ef0: 811a strh r2, [r3, #8]
8022ef2: e00c b.n 8022f0e <dhcp_fine_tmr+0x4a>
} else if (dhcp->request_timeout == 1) {
8022ef4: 683b ldr r3, [r7, #0]
8022ef6: 891b ldrh r3, [r3, #8]
8022ef8: 2b01 cmp r3, #1
8022efa: d108 bne.n 8022f0e <dhcp_fine_tmr+0x4a>
dhcp->request_timeout--;
8022efc: 683b ldr r3, [r7, #0]
8022efe: 891b ldrh r3, [r3, #8]
8022f00: 3b01 subs r3, #1
8022f02: b29a uxth r2, r3
8022f04: 683b ldr r3, [r7, #0]
8022f06: 811a strh r2, [r3, #8]
/* { dhcp->request_timeout == 0 } */
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n"));
/* this client's request timeout triggered */
dhcp_timeout(netif);
8022f08: 6878 ldr r0, [r7, #4]
8022f0a: f000 f80d bl 8022f28 <dhcp_timeout>
NETIF_FOREACH(netif) {
8022f0e: 687b ldr r3, [r7, #4]
8022f10: 681b ldr r3, [r3, #0]
8022f12: 607b str r3, [r7, #4]
8022f14: 687b ldr r3, [r7, #4]
8022f16: 2b00 cmp r3, #0
8022f18: d1db bne.n 8022ed2 <dhcp_fine_tmr+0xe>
}
}
}
}
8022f1a: bf00 nop
8022f1c: bf00 nop
8022f1e: 3708 adds r7, #8
8022f20: 46bd mov sp, r7
8022f22: bd80 pop {r7, pc}
8022f24: 2402af9c .word 0x2402af9c
08022f28 <dhcp_timeout>:
*
* @param netif the netif under DHCP control
*/
static void
dhcp_timeout(struct netif *netif)
{
8022f28: b580 push {r7, lr}
8022f2a: b084 sub sp, #16
8022f2c: af00 add r7, sp, #0
8022f2e: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8022f30: 687b ldr r3, [r7, #4]
8022f32: 6a5b ldr r3, [r3, #36] @ 0x24
8022f34: 60fb str r3, [r7, #12]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n"));
/* back-off period has passed, or server selection timed out */
if ((dhcp->state == DHCP_STATE_BACKING_OFF) || (dhcp->state == DHCP_STATE_SELECTING)) {
8022f36: 68fb ldr r3, [r7, #12]
8022f38: 795b ldrb r3, [r3, #5]
8022f3a: 2b0c cmp r3, #12
8022f3c: d003 beq.n 8022f46 <dhcp_timeout+0x1e>
8022f3e: 68fb ldr r3, [r7, #12]
8022f40: 795b ldrb r3, [r3, #5]
8022f42: 2b06 cmp r3, #6
8022f44: d103 bne.n 8022f4e <dhcp_timeout+0x26>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n"));
dhcp_discover(netif);
8022f46: 6878 ldr r0, [r7, #4]
8022f48: f000 fa58 bl 80233fc <dhcp_discover>
dhcp_reboot(netif);
} else {
dhcp_discover(netif);
}
}
}
8022f4c: e031 b.n 8022fb2 <dhcp_timeout+0x8a>
} else if (dhcp->state == DHCP_STATE_REQUESTING) {
8022f4e: 68fb ldr r3, [r7, #12]
8022f50: 795b ldrb r3, [r3, #5]
8022f52: 2b01 cmp r3, #1
8022f54: d10e bne.n 8022f74 <dhcp_timeout+0x4c>
if (dhcp->tries <= 5) {
8022f56: 68fb ldr r3, [r7, #12]
8022f58: 799b ldrb r3, [r3, #6]
8022f5a: 2b05 cmp r3, #5
8022f5c: d803 bhi.n 8022f66 <dhcp_timeout+0x3e>
dhcp_select(netif);
8022f5e: 6878 ldr r0, [r7, #4]
8022f60: f7ff fe60 bl 8022c24 <dhcp_select>
}
8022f64: e025 b.n 8022fb2 <dhcp_timeout+0x8a>
dhcp_release_and_stop(netif);
8022f66: 6878 ldr r0, [r7, #4]
8022f68: f000 fdae bl 8023ac8 <dhcp_release_and_stop>
dhcp_start(netif);
8022f6c: 6878 ldr r0, [r7, #4]
8022f6e: f000 f8e7 bl 8023140 <dhcp_start>
}
8022f72: e01e b.n 8022fb2 <dhcp_timeout+0x8a>
} else if (dhcp->state == DHCP_STATE_CHECKING) {
8022f74: 68fb ldr r3, [r7, #12]
8022f76: 795b ldrb r3, [r3, #5]
8022f78: 2b08 cmp r3, #8
8022f7a: d10b bne.n 8022f94 <dhcp_timeout+0x6c>
if (dhcp->tries <= 1) {
8022f7c: 68fb ldr r3, [r7, #12]
8022f7e: 799b ldrb r3, [r3, #6]
8022f80: 2b01 cmp r3, #1
8022f82: d803 bhi.n 8022f8c <dhcp_timeout+0x64>
dhcp_check(netif);
8022f84: 6878 ldr r0, [r7, #4]
8022f86: f7ff fdf3 bl 8022b70 <dhcp_check>
}
8022f8a: e012 b.n 8022fb2 <dhcp_timeout+0x8a>
dhcp_bind(netif);
8022f8c: 6878 ldr r0, [r7, #4]
8022f8e: f000 fad7 bl 8023540 <dhcp_bind>
}
8022f92: e00e b.n 8022fb2 <dhcp_timeout+0x8a>
} else if (dhcp->state == DHCP_STATE_REBOOTING) {
8022f94: 68fb ldr r3, [r7, #12]
8022f96: 795b ldrb r3, [r3, #5]
8022f98: 2b03 cmp r3, #3
8022f9a: d10a bne.n 8022fb2 <dhcp_timeout+0x8a>
if (dhcp->tries < REBOOT_TRIES) {
8022f9c: 68fb ldr r3, [r7, #12]
8022f9e: 799b ldrb r3, [r3, #6]
8022fa0: 2b01 cmp r3, #1
8022fa2: d803 bhi.n 8022fac <dhcp_timeout+0x84>
dhcp_reboot(netif);
8022fa4: 6878 ldr r0, [r7, #4]
8022fa6: f000 fcdb bl 8023960 <dhcp_reboot>
}
8022faa: e002 b.n 8022fb2 <dhcp_timeout+0x8a>
dhcp_discover(netif);
8022fac: 6878 ldr r0, [r7, #4]
8022fae: f000 fa25 bl 80233fc <dhcp_discover>
}
8022fb2: bf00 nop
8022fb4: 3710 adds r7, #16
8022fb6: 46bd mov sp, r7
8022fb8: bd80 pop {r7, pc}
08022fba <dhcp_t1_timeout>:
*
* @param netif the netif under DHCP control
*/
static void
dhcp_t1_timeout(struct netif *netif)
{
8022fba: b580 push {r7, lr}
8022fbc: b084 sub sp, #16
8022fbe: af00 add r7, sp, #0
8022fc0: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8022fc2: 687b ldr r3, [r7, #4]
8022fc4: 6a5b ldr r3, [r3, #36] @ 0x24
8022fc6: 60fb str r3, [r7, #12]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n"));
if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
8022fc8: 68fb ldr r3, [r7, #12]
8022fca: 795b ldrb r3, [r3, #5]
8022fcc: 2b01 cmp r3, #1
8022fce: d007 beq.n 8022fe0 <dhcp_t1_timeout+0x26>
8022fd0: 68fb ldr r3, [r7, #12]
8022fd2: 795b ldrb r3, [r3, #5]
8022fd4: 2b0a cmp r3, #10
8022fd6: d003 beq.n 8022fe0 <dhcp_t1_timeout+0x26>
(dhcp->state == DHCP_STATE_RENEWING)) {
8022fd8: 68fb ldr r3, [r7, #12]
8022fda: 795b ldrb r3, [r3, #5]
if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
8022fdc: 2b05 cmp r3, #5
8022fde: d117 bne.n 8023010 <dhcp_t1_timeout+0x56>
* eventually time-out if renew tries fail. */
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
("dhcp_t1_timeout(): must renew\n"));
/* This slightly different to RFC2131: DHCPREQUEST will be sent from state
DHCP_STATE_RENEWING, not DHCP_STATE_BOUND */
dhcp_renew(netif);
8022fe0: 6878 ldr r0, [r7, #4]
8022fe2: f000 fb87 bl 80236f4 <dhcp_renew>
/* Calculate next timeout */
if (((dhcp->t2_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
8022fe6: 68fb ldr r3, [r7, #12]
8022fe8: 899b ldrh r3, [r3, #12]
8022fea: 461a mov r2, r3
8022fec: 68fb ldr r3, [r7, #12]
8022fee: 8a5b ldrh r3, [r3, #18]
8022ff0: 1ad3 subs r3, r2, r3
8022ff2: 2b01 cmp r3, #1
8022ff4: dd0c ble.n 8023010 <dhcp_t1_timeout+0x56>
dhcp->t1_renew_time = (u16_t)((dhcp->t2_timeout - dhcp->lease_used) / 2);
8022ff6: 68fb ldr r3, [r7, #12]
8022ff8: 899b ldrh r3, [r3, #12]
8022ffa: 461a mov r2, r3
8022ffc: 68fb ldr r3, [r7, #12]
8022ffe: 8a5b ldrh r3, [r3, #18]
8023000: 1ad3 subs r3, r2, r3
8023002: 2b00 cmp r3, #0
8023004: da00 bge.n 8023008 <dhcp_t1_timeout+0x4e>
8023006: 3301 adds r3, #1
8023008: 105b asrs r3, r3, #1
802300a: b29a uxth r2, r3
802300c: 68fb ldr r3, [r7, #12]
802300e: 81da strh r2, [r3, #14]
}
}
}
8023010: bf00 nop
8023012: 3710 adds r7, #16
8023014: 46bd mov sp, r7
8023016: bd80 pop {r7, pc}
08023018 <dhcp_t2_timeout>:
*
* @param netif the netif under DHCP control
*/
static void
dhcp_t2_timeout(struct netif *netif)
{
8023018: b580 push {r7, lr}
802301a: b084 sub sp, #16
802301c: af00 add r7, sp, #0
802301e: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8023020: 687b ldr r3, [r7, #4]
8023022: 6a5b ldr r3, [r3, #36] @ 0x24
8023024: 60fb str r3, [r7, #12]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n"));
if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
8023026: 68fb ldr r3, [r7, #12]
8023028: 795b ldrb r3, [r3, #5]
802302a: 2b01 cmp r3, #1
802302c: d00b beq.n 8023046 <dhcp_t2_timeout+0x2e>
802302e: 68fb ldr r3, [r7, #12]
8023030: 795b ldrb r3, [r3, #5]
8023032: 2b0a cmp r3, #10
8023034: d007 beq.n 8023046 <dhcp_t2_timeout+0x2e>
(dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
8023036: 68fb ldr r3, [r7, #12]
8023038: 795b ldrb r3, [r3, #5]
if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
802303a: 2b05 cmp r3, #5
802303c: d003 beq.n 8023046 <dhcp_t2_timeout+0x2e>
(dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
802303e: 68fb ldr r3, [r7, #12]
8023040: 795b ldrb r3, [r3, #5]
8023042: 2b04 cmp r3, #4
8023044: d117 bne.n 8023076 <dhcp_t2_timeout+0x5e>
/* just retry to rebind */
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
("dhcp_t2_timeout(): must rebind\n"));
/* This slightly different to RFC2131: DHCPREQUEST will be sent from state
DHCP_STATE_REBINDING, not DHCP_STATE_BOUND */
dhcp_rebind(netif);
8023046: 6878 ldr r0, [r7, #4]
8023048: f000 fbf0 bl 802382c <dhcp_rebind>
/* Calculate next timeout */
if (((dhcp->t0_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
802304c: 68fb ldr r3, [r7, #12]
802304e: 8a9b ldrh r3, [r3, #20]
8023050: 461a mov r2, r3
8023052: 68fb ldr r3, [r7, #12]
8023054: 8a5b ldrh r3, [r3, #18]
8023056: 1ad3 subs r3, r2, r3
8023058: 2b01 cmp r3, #1
802305a: dd0c ble.n 8023076 <dhcp_t2_timeout+0x5e>
dhcp->t2_rebind_time = (u16_t)((dhcp->t0_timeout - dhcp->lease_used) / 2);
802305c: 68fb ldr r3, [r7, #12]
802305e: 8a9b ldrh r3, [r3, #20]
8023060: 461a mov r2, r3
8023062: 68fb ldr r3, [r7, #12]
8023064: 8a5b ldrh r3, [r3, #18]
8023066: 1ad3 subs r3, r2, r3
8023068: 2b00 cmp r3, #0
802306a: da00 bge.n 802306e <dhcp_t2_timeout+0x56>
802306c: 3301 adds r3, #1
802306e: 105b asrs r3, r3, #1
8023070: b29a uxth r2, r3
8023072: 68fb ldr r3, [r7, #12]
8023074: 821a strh r2, [r3, #16]
}
}
}
8023076: bf00 nop
8023078: 3710 adds r7, #16
802307a: 46bd mov sp, r7
802307c: bd80 pop {r7, pc}
...
08023080 <dhcp_handle_ack>:
*
* @param netif the netif under DHCP control
*/
static void
dhcp_handle_ack(struct netif *netif, struct dhcp_msg *msg_in)
{
8023080: b580 push {r7, lr}
8023082: b084 sub sp, #16
8023084: af00 add r7, sp, #0
8023086: 6078 str r0, [r7, #4]
8023088: 6039 str r1, [r7, #0]
struct dhcp *dhcp = netif_dhcp_data(netif);
802308a: 687b ldr r3, [r7, #4]
802308c: 6a5b ldr r3, [r3, #36] @ 0x24
802308e: 60fb str r3, [r7, #12]
#if LWIP_DHCP_GET_NTP_SRV
ip4_addr_t ntp_server_addrs[LWIP_DHCP_MAX_NTP_SERVERS];
#endif
/* clear options we might not get from the ACK */
ip4_addr_set_zero(&dhcp->offered_sn_mask);
8023090: 68fb ldr r3, [r7, #12]
8023092: 2200 movs r2, #0
8023094: 621a str r2, [r3, #32]
ip4_addr_set_zero(&dhcp->offered_gw_addr);
8023096: 68fb ldr r3, [r7, #12]
8023098: 2200 movs r2, #0
802309a: 625a str r2, [r3, #36] @ 0x24
#if LWIP_DHCP_BOOTP_FILE
ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */
/* lease time given? */
if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_LEASE_TIME)) {
802309c: 4b26 ldr r3, [pc, #152] @ (8023138 <dhcp_handle_ack+0xb8>)
802309e: 78db ldrb r3, [r3, #3]
80230a0: 2b00 cmp r3, #0
80230a2: d003 beq.n 80230ac <dhcp_handle_ack+0x2c>
/* remember offered lease time */
dhcp->offered_t0_lease = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_LEASE_TIME);
80230a4: 4b25 ldr r3, [pc, #148] @ (802313c <dhcp_handle_ack+0xbc>)
80230a6: 68da ldr r2, [r3, #12]
80230a8: 68fb ldr r3, [r7, #12]
80230aa: 629a str r2, [r3, #40] @ 0x28
}
/* renewal period given? */
if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T1)) {
80230ac: 4b22 ldr r3, [pc, #136] @ (8023138 <dhcp_handle_ack+0xb8>)
80230ae: 791b ldrb r3, [r3, #4]
80230b0: 2b00 cmp r3, #0
80230b2: d004 beq.n 80230be <dhcp_handle_ack+0x3e>
/* remember given renewal period */
dhcp->offered_t1_renew = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T1);
80230b4: 4b21 ldr r3, [pc, #132] @ (802313c <dhcp_handle_ack+0xbc>)
80230b6: 691a ldr r2, [r3, #16]
80230b8: 68fb ldr r3, [r7, #12]
80230ba: 62da str r2, [r3, #44] @ 0x2c
80230bc: e004 b.n 80230c8 <dhcp_handle_ack+0x48>
} else {
/* calculate safe periods for renewal */
dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2;
80230be: 68fb ldr r3, [r7, #12]
80230c0: 6a9b ldr r3, [r3, #40] @ 0x28
80230c2: 085a lsrs r2, r3, #1
80230c4: 68fb ldr r3, [r7, #12]
80230c6: 62da str r2, [r3, #44] @ 0x2c
}
/* renewal period given? */
if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T2)) {
80230c8: 4b1b ldr r3, [pc, #108] @ (8023138 <dhcp_handle_ack+0xb8>)
80230ca: 795b ldrb r3, [r3, #5]
80230cc: 2b00 cmp r3, #0
80230ce: d004 beq.n 80230da <dhcp_handle_ack+0x5a>
/* remember given rebind period */
dhcp->offered_t2_rebind = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T2);
80230d0: 4b1a ldr r3, [pc, #104] @ (802313c <dhcp_handle_ack+0xbc>)
80230d2: 695a ldr r2, [r3, #20]
80230d4: 68fb ldr r3, [r7, #12]
80230d6: 631a str r2, [r3, #48] @ 0x30
80230d8: e007 b.n 80230ea <dhcp_handle_ack+0x6a>
} else {
/* calculate safe periods for rebinding (offered_t0_lease * 0.875 -> 87.5%)*/
dhcp->offered_t2_rebind = (dhcp->offered_t0_lease * 7U) / 8U;
80230da: 68fb ldr r3, [r7, #12]
80230dc: 6a9a ldr r2, [r3, #40] @ 0x28
80230de: 4613 mov r3, r2
80230e0: 00db lsls r3, r3, #3
80230e2: 1a9b subs r3, r3, r2
80230e4: 08da lsrs r2, r3, #3
80230e6: 68fb ldr r3, [r7, #12]
80230e8: 631a str r2, [r3, #48] @ 0x30
}
/* (y)our internet address */
ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
80230ea: 683b ldr r3, [r7, #0]
80230ec: 691a ldr r2, [r3, #16]
80230ee: 68fb ldr r3, [r7, #12]
80230f0: 61da str r2, [r3, #28]
boot file name copied in dhcp_parse_reply if not overloaded */
ip4_addr_copy(dhcp->offered_si_addr, msg_in->siaddr);
#endif /* LWIP_DHCP_BOOTP_FILE */
/* subnet mask given? */
if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)) {
80230f2: 4b11 ldr r3, [pc, #68] @ (8023138 <dhcp_handle_ack+0xb8>)
80230f4: 799b ldrb r3, [r3, #6]
80230f6: 2b00 cmp r3, #0
80230f8: d00b beq.n 8023112 <dhcp_handle_ack+0x92>
/* remember given subnet mask */
ip4_addr_set_u32(&dhcp->offered_sn_mask, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)));
80230fa: 4b10 ldr r3, [pc, #64] @ (802313c <dhcp_handle_ack+0xbc>)
80230fc: 699b ldr r3, [r3, #24]
80230fe: 4618 mov r0, r3
8023100: f7f6 fd4f bl 8019ba2 <lwip_htonl>
8023104: 4602 mov r2, r0
8023106: 68fb ldr r3, [r7, #12]
8023108: 621a str r2, [r3, #32]
dhcp->subnet_mask_given = 1;
802310a: 68fb ldr r3, [r7, #12]
802310c: 2201 movs r2, #1
802310e: 71da strb r2, [r3, #7]
8023110: e002 b.n 8023118 <dhcp_handle_ack+0x98>
} else {
dhcp->subnet_mask_given = 0;
8023112: 68fb ldr r3, [r7, #12]
8023114: 2200 movs r2, #0
8023116: 71da strb r2, [r3, #7]
}
/* gateway router */
if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_ROUTER)) {
8023118: 4b07 ldr r3, [pc, #28] @ (8023138 <dhcp_handle_ack+0xb8>)
802311a: 79db ldrb r3, [r3, #7]
802311c: 2b00 cmp r3, #0
802311e: d007 beq.n 8023130 <dhcp_handle_ack+0xb0>
ip4_addr_set_u32(&dhcp->offered_gw_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_ROUTER)));
8023120: 4b06 ldr r3, [pc, #24] @ (802313c <dhcp_handle_ack+0xbc>)
8023122: 69db ldr r3, [r3, #28]
8023124: 4618 mov r0, r3
8023126: f7f6 fd3c bl 8019ba2 <lwip_htonl>
802312a: 4602 mov r2, r0
802312c: 68fb ldr r3, [r7, #12]
802312e: 625a str r2, [r3, #36] @ 0x24
ip_addr_t dns_addr;
ip_addr_set_ip4_u32_val(dns_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_DNS_SERVER + n)));
dns_setserver(n, &dns_addr);
}
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
}
8023130: bf00 nop
8023132: 3710 adds r7, #16
8023134: 46bd mov sp, r7
8023136: bd80 pop {r7, pc}
8023138: 2402b02c .word 0x2402b02c
802313c: 2402b00c .word 0x2402b00c
08023140 <dhcp_start>:
* - ERR_OK - No error
* - ERR_MEM - Out of memory
*/
err_t
dhcp_start(struct netif *netif)
{
8023140: b580 push {r7, lr}
8023142: b084 sub sp, #16
8023144: af00 add r7, sp, #0
8023146: 6078 str r0, [r7, #4]
struct dhcp *dhcp;
err_t result;
LWIP_ASSERT_CORE_LOCKED();
8023148: f7ee f844 bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;);
802314c: 687b ldr r3, [r7, #4]
802314e: 2b00 cmp r3, #0
8023150: d109 bne.n 8023166 <dhcp_start+0x26>
8023152: 4b37 ldr r3, [pc, #220] @ (8023230 <dhcp_start+0xf0>)
8023154: f240 22e7 movw r2, #743 @ 0x2e7
8023158: 4936 ldr r1, [pc, #216] @ (8023234 <dhcp_start+0xf4>)
802315a: 4837 ldr r0, [pc, #220] @ (8023238 <dhcp_start+0xf8>)
802315c: f007 fc66 bl 802aa2c <iprintf>
8023160: f06f 030f mvn.w r3, #15
8023164: e060 b.n 8023228 <dhcp_start+0xe8>
LWIP_ERROR("netif is not up, old style port?", netif_is_up(netif), return ERR_ARG;);
8023166: 687b ldr r3, [r7, #4]
8023168: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
802316c: f003 0301 and.w r3, r3, #1
8023170: 2b00 cmp r3, #0
8023172: d109 bne.n 8023188 <dhcp_start+0x48>
8023174: 4b2e ldr r3, [pc, #184] @ (8023230 <dhcp_start+0xf0>)
8023176: f44f 723a mov.w r2, #744 @ 0x2e8
802317a: 4930 ldr r1, [pc, #192] @ (802323c <dhcp_start+0xfc>)
802317c: 482e ldr r0, [pc, #184] @ (8023238 <dhcp_start+0xf8>)
802317e: f007 fc55 bl 802aa2c <iprintf>
8023182: f06f 030f mvn.w r3, #15
8023186: e04f b.n 8023228 <dhcp_start+0xe8>
dhcp = netif_dhcp_data(netif);
8023188: 687b ldr r3, [r7, #4]
802318a: 6a5b ldr r3, [r3, #36] @ 0x24
802318c: 60fb str r3, [r7, #12]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
/* check MTU of the netif */
if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) {
802318e: 687b ldr r3, [r7, #4]
8023190: 8d1b ldrh r3, [r3, #40] @ 0x28
8023192: f5b3 7f10 cmp.w r3, #576 @ 0x240
8023196: d202 bcs.n 802319e <dhcp_start+0x5e>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n"));
return ERR_MEM;
8023198: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802319c: e044 b.n 8023228 <dhcp_start+0xe8>
}
/* no DHCP client attached yet? */
if (dhcp == NULL) {
802319e: 68fb ldr r3, [r7, #12]
80231a0: 2b00 cmp r3, #0
80231a2: d10d bne.n 80231c0 <dhcp_start+0x80>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): mallocing new DHCP client\n"));
dhcp = (struct dhcp *)mem_malloc(sizeof(struct dhcp));
80231a4: 2034 movs r0, #52 @ 0x34
80231a6: f7f7 f8c9 bl 801a33c <mem_malloc>
80231aa: 60f8 str r0, [r7, #12]
if (dhcp == NULL) {
80231ac: 68fb ldr r3, [r7, #12]
80231ae: 2b00 cmp r3, #0
80231b0: d102 bne.n 80231b8 <dhcp_start+0x78>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n"));
return ERR_MEM;
80231b2: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80231b6: e037 b.n 8023228 <dhcp_start+0xe8>
}
/* store this dhcp client in the netif */
netif_set_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP, dhcp);
80231b8: 687b ldr r3, [r7, #4]
80231ba: 68fa ldr r2, [r7, #12]
80231bc: 625a str r2, [r3, #36] @ 0x24
80231be: e005 b.n 80231cc <dhcp_start+0x8c>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp"));
/* already has DHCP client attached */
} else {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n"));
if (dhcp->pcb_allocated != 0) {
80231c0: 68fb ldr r3, [r7, #12]
80231c2: 791b ldrb r3, [r3, #4]
80231c4: 2b00 cmp r3, #0
80231c6: d001 beq.n 80231cc <dhcp_start+0x8c>
dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
80231c8: f7ff fc8e bl 8022ae8 <dhcp_dec_pcb_refcount>
}
/* dhcp is cleared below, no need to reset flag*/
}
/* clear data structure */
memset(dhcp, 0, sizeof(struct dhcp));
80231cc: 2234 movs r2, #52 @ 0x34
80231ce: 2100 movs r1, #0
80231d0: 68f8 ldr r0, [r7, #12]
80231d2: f007 fdbd bl 802ad50 <memset>
/* dhcp_set_state(&dhcp, DHCP_STATE_OFF); */
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n"));
if (dhcp_inc_pcb_refcount() != ERR_OK) { /* ensure DHCP PCB is allocated */
80231d6: f7ff fc35 bl 8022a44 <dhcp_inc_pcb_refcount>
80231da: 4603 mov r3, r0
80231dc: 2b00 cmp r3, #0
80231de: d002 beq.n 80231e6 <dhcp_start+0xa6>
return ERR_MEM;
80231e0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80231e4: e020 b.n 8023228 <dhcp_start+0xe8>
}
dhcp->pcb_allocated = 1;
80231e6: 68fb ldr r3, [r7, #12]
80231e8: 2201 movs r2, #1
80231ea: 711a strb r2, [r3, #4]
if (!netif_is_link_up(netif)) {
80231ec: 687b ldr r3, [r7, #4]
80231ee: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
80231f2: f003 0304 and.w r3, r3, #4
80231f6: 2b00 cmp r3, #0
80231f8: d105 bne.n 8023206 <dhcp_start+0xc6>
/* set state INIT and wait for dhcp_network_changed() to call dhcp_discover() */
dhcp_set_state(dhcp, DHCP_STATE_INIT);
80231fa: 2102 movs r1, #2
80231fc: 68f8 ldr r0, [r7, #12]
80231fe: f000 fd0a bl 8023c16 <dhcp_set_state>
return ERR_OK;
8023202: 2300 movs r3, #0
8023204: e010 b.n 8023228 <dhcp_start+0xe8>
}
/* (re)start the DHCP negotiation */
result = dhcp_discover(netif);
8023206: 6878 ldr r0, [r7, #4]
8023208: f000 f8f8 bl 80233fc <dhcp_discover>
802320c: 4603 mov r3, r0
802320e: 72fb strb r3, [r7, #11]
if (result != ERR_OK) {
8023210: f997 300b ldrsb.w r3, [r7, #11]
8023214: 2b00 cmp r3, #0
8023216: d005 beq.n 8023224 <dhcp_start+0xe4>
/* free resources allocated above */
dhcp_release_and_stop(netif);
8023218: 6878 ldr r0, [r7, #4]
802321a: f000 fc55 bl 8023ac8 <dhcp_release_and_stop>
return ERR_MEM;
802321e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8023222: e001 b.n 8023228 <dhcp_start+0xe8>
}
return result;
8023224: f997 300b ldrsb.w r3, [r7, #11]
}
8023228: 4618 mov r0, r3
802322a: 3710 adds r7, #16
802322c: 46bd mov sp, r7
802322e: bd80 pop {r7, pc}
8023230: 0803109c .word 0x0803109c
8023234: 08031180 .word 0x08031180
8023238: 080310fc .word 0x080310fc
802323c: 080311c4 .word 0x080311c4
08023240 <dhcp_network_changed>:
* This enters the REBOOTING state to verify that the currently bound
* address is still valid.
*/
void
dhcp_network_changed(struct netif *netif)
{
8023240: b580 push {r7, lr}
8023242: b084 sub sp, #16
8023244: af00 add r7, sp, #0
8023246: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8023248: 687b ldr r3, [r7, #4]
802324a: 6a5b ldr r3, [r3, #36] @ 0x24
802324c: 60fb str r3, [r7, #12]
if (!dhcp) {
802324e: 68fb ldr r3, [r7, #12]
8023250: 2b00 cmp r3, #0
8023252: d025 beq.n 80232a0 <dhcp_network_changed+0x60>
return;
}
switch (dhcp->state) {
8023254: 68fb ldr r3, [r7, #12]
8023256: 795b ldrb r3, [r3, #5]
8023258: 2b0a cmp r3, #10
802325a: d008 beq.n 802326e <dhcp_network_changed+0x2e>
802325c: 2b0a cmp r3, #10
802325e: dc0d bgt.n 802327c <dhcp_network_changed+0x3c>
8023260: 2b00 cmp r3, #0
8023262: d01f beq.n 80232a4 <dhcp_network_changed+0x64>
8023264: 2b00 cmp r3, #0
8023266: db09 blt.n 802327c <dhcp_network_changed+0x3c>
8023268: 3b03 subs r3, #3
802326a: 2b02 cmp r3, #2
802326c: d806 bhi.n 802327c <dhcp_network_changed+0x3c>
case DHCP_STATE_REBINDING:
case DHCP_STATE_RENEWING:
case DHCP_STATE_BOUND:
case DHCP_STATE_REBOOTING:
dhcp->tries = 0;
802326e: 68fb ldr r3, [r7, #12]
8023270: 2200 movs r2, #0
8023272: 719a strb r2, [r3, #6]
dhcp_reboot(netif);
8023274: 6878 ldr r0, [r7, #4]
8023276: f000 fb73 bl 8023960 <dhcp_reboot>
break;
802327a: e014 b.n 80232a6 <dhcp_network_changed+0x66>
case DHCP_STATE_OFF:
/* stay off */
break;
default:
LWIP_ASSERT("invalid dhcp->state", dhcp->state <= DHCP_STATE_BACKING_OFF);
802327c: 68fb ldr r3, [r7, #12]
802327e: 795b ldrb r3, [r3, #5]
8023280: 2b0c cmp r3, #12
8023282: d906 bls.n 8023292 <dhcp_network_changed+0x52>
8023284: 4b09 ldr r3, [pc, #36] @ (80232ac <dhcp_network_changed+0x6c>)
8023286: f240 326d movw r2, #877 @ 0x36d
802328a: 4909 ldr r1, [pc, #36] @ (80232b0 <dhcp_network_changed+0x70>)
802328c: 4809 ldr r0, [pc, #36] @ (80232b4 <dhcp_network_changed+0x74>)
802328e: f007 fbcd bl 802aa2c <iprintf>
autoip_stop(netif);
dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
}
#endif /* LWIP_DHCP_AUTOIP_COOP */
/* ensure we start with short timeouts, even if already discovering */
dhcp->tries = 0;
8023292: 68fb ldr r3, [r7, #12]
8023294: 2200 movs r2, #0
8023296: 719a strb r2, [r3, #6]
dhcp_discover(netif);
8023298: 6878 ldr r0, [r7, #4]
802329a: f000 f8af bl 80233fc <dhcp_discover>
break;
802329e: e002 b.n 80232a6 <dhcp_network_changed+0x66>
return;
80232a0: bf00 nop
80232a2: e000 b.n 80232a6 <dhcp_network_changed+0x66>
break;
80232a4: bf00 nop
}
}
80232a6: 3710 adds r7, #16
80232a8: 46bd mov sp, r7
80232aa: bd80 pop {r7, pc}
80232ac: 0803109c .word 0x0803109c
80232b0: 080311e8 .word 0x080311e8
80232b4: 080310fc .word 0x080310fc
080232b8 <dhcp_arp_reply>:
* @param netif the network interface on which the reply was received
* @param addr The IP address we received a reply from
*/
void
dhcp_arp_reply(struct netif *netif, const ip4_addr_t *addr)
{
80232b8: b580 push {r7, lr}
80232ba: b084 sub sp, #16
80232bc: af00 add r7, sp, #0
80232be: 6078 str r0, [r7, #4]
80232c0: 6039 str r1, [r7, #0]
struct dhcp *dhcp;
LWIP_ERROR("netif != NULL", (netif != NULL), return;);
80232c2: 687b ldr r3, [r7, #4]
80232c4: 2b00 cmp r3, #0
80232c6: d107 bne.n 80232d8 <dhcp_arp_reply+0x20>
80232c8: 4b0e ldr r3, [pc, #56] @ (8023304 <dhcp_arp_reply+0x4c>)
80232ca: f240 328b movw r2, #907 @ 0x38b
80232ce: 490e ldr r1, [pc, #56] @ (8023308 <dhcp_arp_reply+0x50>)
80232d0: 480e ldr r0, [pc, #56] @ (802330c <dhcp_arp_reply+0x54>)
80232d2: f007 fbab bl 802aa2c <iprintf>
80232d6: e012 b.n 80232fe <dhcp_arp_reply+0x46>
dhcp = netif_dhcp_data(netif);
80232d8: 687b ldr r3, [r7, #4]
80232da: 6a5b ldr r3, [r3, #36] @ 0x24
80232dc: 60fb str r3, [r7, #12]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n"));
/* is a DHCP client doing an ARP check? */
if ((dhcp != NULL) && (dhcp->state == DHCP_STATE_CHECKING)) {
80232de: 68fb ldr r3, [r7, #12]
80232e0: 2b00 cmp r3, #0
80232e2: d00c beq.n 80232fe <dhcp_arp_reply+0x46>
80232e4: 68fb ldr r3, [r7, #12]
80232e6: 795b ldrb r3, [r3, #5]
80232e8: 2b08 cmp r3, #8
80232ea: d108 bne.n 80232fe <dhcp_arp_reply+0x46>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n",
ip4_addr_get_u32(addr)));
/* did a host respond with the address we
were offered by the DHCP server? */
if (ip4_addr_cmp(addr, &dhcp->offered_ip_addr)) {
80232ec: 683b ldr r3, [r7, #0]
80232ee: 681a ldr r2, [r3, #0]
80232f0: 68fb ldr r3, [r7, #12]
80232f2: 69db ldr r3, [r3, #28]
80232f4: 429a cmp r2, r3
80232f6: d102 bne.n 80232fe <dhcp_arp_reply+0x46>
/* we will not accept the offered address */
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING,
("dhcp_arp_reply(): arp reply matched with offered address, declining\n"));
dhcp_decline(netif);
80232f8: 6878 ldr r0, [r7, #4]
80232fa: f000 f809 bl 8023310 <dhcp_decline>
}
}
}
80232fe: 3710 adds r7, #16
8023300: 46bd mov sp, r7
8023302: bd80 pop {r7, pc}
8023304: 0803109c .word 0x0803109c
8023308: 08031180 .word 0x08031180
802330c: 080310fc .word 0x080310fc
08023310 <dhcp_decline>:
*
* @param netif the netif under DHCP control
*/
static err_t
dhcp_decline(struct netif *netif)
{
8023310: b5b0 push {r4, r5, r7, lr}
8023312: b08a sub sp, #40 @ 0x28
8023314: af02 add r7, sp, #8
8023316: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8023318: 687b ldr r3, [r7, #4]
802331a: 6a5b ldr r3, [r3, #36] @ 0x24
802331c: 61bb str r3, [r7, #24]
u16_t msecs;
struct pbuf *p_out;
u16_t options_out_len;
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n"));
dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
802331e: 210c movs r1, #12
8023320: 69b8 ldr r0, [r7, #24]
8023322: f000 fc78 bl 8023c16 <dhcp_set_state>
/* create and initialize the DHCP message header */
p_out = dhcp_create_msg(netif, dhcp, DHCP_DECLINE, &options_out_len);
8023326: f107 030c add.w r3, r7, #12
802332a: 2204 movs r2, #4
802332c: 69b9 ldr r1, [r7, #24]
802332e: 6878 ldr r0, [r7, #4]
8023330: f001 f90a bl 8024548 <dhcp_create_msg>
8023334: 6178 str r0, [r7, #20]
if (p_out != NULL) {
8023336: 697b ldr r3, [r7, #20]
8023338: 2b00 cmp r3, #0
802333a: d035 beq.n 80233a8 <dhcp_decline+0x98>
struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
802333c: 697b ldr r3, [r7, #20]
802333e: 685b ldr r3, [r3, #4]
8023340: 613b str r3, [r7, #16]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
8023342: 89b8 ldrh r0, [r7, #12]
8023344: 693b ldr r3, [r7, #16]
8023346: f103 01f0 add.w r1, r3, #240 @ 0xf0
802334a: 2304 movs r3, #4
802334c: 2232 movs r2, #50 @ 0x32
802334e: f000 fc7d bl 8023c4c <dhcp_option>
8023352: 4603 mov r3, r0
8023354: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
8023356: 89bc ldrh r4, [r7, #12]
8023358: 693b ldr r3, [r7, #16]
802335a: f103 05f0 add.w r5, r3, #240 @ 0xf0
802335e: 69bb ldr r3, [r7, #24]
8023360: 69db ldr r3, [r3, #28]
8023362: 4618 mov r0, r3
8023364: f7f6 fc1d bl 8019ba2 <lwip_htonl>
8023368: 4603 mov r3, r0
802336a: 461a mov r2, r3
802336c: 4629 mov r1, r5
802336e: 4620 mov r0, r4
8023370: f000 fcf8 bl 8023d64 <dhcp_option_long>
8023374: 4603 mov r3, r0
8023376: 81bb strh r3, [r7, #12]
LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_BACKING_OFF, msg_out, DHCP_DECLINE, &options_out_len);
dhcp_option_trailer(options_out_len, msg_out->options, p_out);
8023378: 89b8 ldrh r0, [r7, #12]
802337a: 693b ldr r3, [r7, #16]
802337c: 33f0 adds r3, #240 @ 0xf0
802337e: 697a ldr r2, [r7, #20]
8023380: 4619 mov r1, r3
8023382: f001 f9b7 bl 80246f4 <dhcp_option_trailer>
/* per section 4.4.4, broadcast DECLINE messages */
result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
8023386: 4b19 ldr r3, [pc, #100] @ (80233ec <dhcp_decline+0xdc>)
8023388: 6818 ldr r0, [r3, #0]
802338a: 4b19 ldr r3, [pc, #100] @ (80233f0 <dhcp_decline+0xe0>)
802338c: 9301 str r3, [sp, #4]
802338e: 687b ldr r3, [r7, #4]
8023390: 9300 str r3, [sp, #0]
8023392: 2343 movs r3, #67 @ 0x43
8023394: 4a17 ldr r2, [pc, #92] @ (80233f4 <dhcp_decline+0xe4>)
8023396: 6979 ldr r1, [r7, #20]
8023398: f7ff f88a bl 80224b0 <udp_sendto_if_src>
802339c: 4603 mov r3, r0
802339e: 77fb strb r3, [r7, #31]
pbuf_free(p_out);
80233a0: 6978 ldr r0, [r7, #20]
80233a2: f7f8 f8cb bl 801b53c <pbuf_free>
80233a6: e001 b.n 80233ac <dhcp_decline+0x9c>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n"));
} else {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
("dhcp_decline: could not allocate DHCP request\n"));
result = ERR_MEM;
80233a8: 23ff movs r3, #255 @ 0xff
80233aa: 77fb strb r3, [r7, #31]
}
if (dhcp->tries < 255) {
80233ac: 69bb ldr r3, [r7, #24]
80233ae: 799b ldrb r3, [r3, #6]
80233b0: 2bff cmp r3, #255 @ 0xff
80233b2: d005 beq.n 80233c0 <dhcp_decline+0xb0>
dhcp->tries++;
80233b4: 69bb ldr r3, [r7, #24]
80233b6: 799b ldrb r3, [r3, #6]
80233b8: 3301 adds r3, #1
80233ba: b2da uxtb r2, r3
80233bc: 69bb ldr r3, [r7, #24]
80233be: 719a strb r2, [r3, #6]
}
msecs = 10 * 1000;
80233c0: f242 7310 movw r3, #10000 @ 0x2710
80233c4: 81fb strh r3, [r7, #14]
dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
80233c6: 89fb ldrh r3, [r7, #14]
80233c8: f203 13f3 addw r3, r3, #499 @ 0x1f3
80233cc: 4a0a ldr r2, [pc, #40] @ (80233f8 <dhcp_decline+0xe8>)
80233ce: fb82 1203 smull r1, r2, r2, r3
80233d2: 1152 asrs r2, r2, #5
80233d4: 17db asrs r3, r3, #31
80233d6: 1ad3 subs r3, r2, r3
80233d8: b29a uxth r2, r3
80233da: 69bb ldr r3, [r7, #24]
80233dc: 811a strh r2, [r3, #8]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs));
return result;
80233de: f997 301f ldrsb.w r3, [r7, #31]
}
80233e2: 4618 mov r0, r3
80233e4: 3720 adds r7, #32
80233e6: 46bd mov sp, r7
80233e8: bdb0 pop {r4, r5, r7, pc}
80233ea: bf00 nop
80233ec: 2402b034 .word 0x2402b034
80233f0: 08031ec8 .word 0x08031ec8
80233f4: 08031ecc .word 0x08031ecc
80233f8: 10624dd3 .word 0x10624dd3
080233fc <dhcp_discover>:
*
* @param netif the netif under DHCP control
*/
static err_t
dhcp_discover(struct netif *netif)
{
80233fc: b580 push {r7, lr}
80233fe: b08a sub sp, #40 @ 0x28
8023400: af02 add r7, sp, #8
8023402: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8023404: 687b ldr r3, [r7, #4]
8023406: 6a5b ldr r3, [r3, #36] @ 0x24
8023408: 61bb str r3, [r7, #24]
err_t result = ERR_OK;
802340a: 2300 movs r3, #0
802340c: 75fb strb r3, [r7, #23]
struct pbuf *p_out;
u16_t options_out_len;
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n"));
ip4_addr_set_any(&dhcp->offered_ip_addr);
802340e: 69bb ldr r3, [r7, #24]
8023410: 2200 movs r2, #0
8023412: 61da str r2, [r3, #28]
dhcp_set_state(dhcp, DHCP_STATE_SELECTING);
8023414: 2106 movs r1, #6
8023416: 69b8 ldr r0, [r7, #24]
8023418: f000 fbfd bl 8023c16 <dhcp_set_state>
/* create and initialize the DHCP message header */
p_out = dhcp_create_msg(netif, dhcp, DHCP_DISCOVER, &options_out_len);
802341c: f107 0308 add.w r3, r7, #8
8023420: 2201 movs r2, #1
8023422: 69b9 ldr r1, [r7, #24]
8023424: 6878 ldr r0, [r7, #4]
8023426: f001 f88f bl 8024548 <dhcp_create_msg>
802342a: 6138 str r0, [r7, #16]
if (p_out != NULL) {
802342c: 693b ldr r3, [r7, #16]
802342e: 2b00 cmp r3, #0
8023430: d04b beq.n 80234ca <dhcp_discover+0xce>
struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
8023432: 693b ldr r3, [r7, #16]
8023434: 685b ldr r3, [r3, #4]
8023436: 60fb str r3, [r7, #12]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n"));
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
8023438: 8938 ldrh r0, [r7, #8]
802343a: 68fb ldr r3, [r7, #12]
802343c: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023440: 2302 movs r3, #2
8023442: 2239 movs r2, #57 @ 0x39
8023444: f000 fc02 bl 8023c4c <dhcp_option>
8023448: 4603 mov r3, r0
802344a: 813b strh r3, [r7, #8]
options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
802344c: 8938 ldrh r0, [r7, #8]
802344e: 68fb ldr r3, [r7, #12]
8023450: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023454: 687b ldr r3, [r7, #4]
8023456: 8d1b ldrh r3, [r3, #40] @ 0x28
8023458: 461a mov r2, r3
802345a: f000 fc51 bl 8023d00 <dhcp_option_short>
802345e: 4603 mov r3, r0
8023460: 813b strh r3, [r7, #8]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
8023462: 8938 ldrh r0, [r7, #8]
8023464: 68fb ldr r3, [r7, #12]
8023466: f103 01f0 add.w r1, r3, #240 @ 0xf0
802346a: 2303 movs r3, #3
802346c: 2237 movs r2, #55 @ 0x37
802346e: f000 fbed bl 8023c4c <dhcp_option>
8023472: 4603 mov r3, r0
8023474: 813b strh r3, [r7, #8]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
8023476: 2300 movs r3, #0
8023478: 77fb strb r3, [r7, #31]
802347a: e00e b.n 802349a <dhcp_discover+0x9e>
options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
802347c: 8938 ldrh r0, [r7, #8]
802347e: 68fb ldr r3, [r7, #12]
8023480: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023484: 7ffb ldrb r3, [r7, #31]
8023486: 4a29 ldr r2, [pc, #164] @ (802352c <dhcp_discover+0x130>)
8023488: 5cd3 ldrb r3, [r2, r3]
802348a: 461a mov r2, r3
802348c: f000 fc12 bl 8023cb4 <dhcp_option_byte>
8023490: 4603 mov r3, r0
8023492: 813b strh r3, [r7, #8]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
8023494: 7ffb ldrb r3, [r7, #31]
8023496: 3301 adds r3, #1
8023498: 77fb strb r3, [r7, #31]
802349a: 7ffb ldrb r3, [r7, #31]
802349c: 2b02 cmp r3, #2
802349e: d9ed bls.n 802347c <dhcp_discover+0x80>
}
LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_SELECTING, msg_out, DHCP_DISCOVER, &options_out_len);
dhcp_option_trailer(options_out_len, msg_out->options, p_out);
80234a0: 8938 ldrh r0, [r7, #8]
80234a2: 68fb ldr r3, [r7, #12]
80234a4: 33f0 adds r3, #240 @ 0xf0
80234a6: 693a ldr r2, [r7, #16]
80234a8: 4619 mov r1, r3
80234aa: f001 f923 bl 80246f4 <dhcp_option_trailer>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER)\n"));
udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
80234ae: 4b20 ldr r3, [pc, #128] @ (8023530 <dhcp_discover+0x134>)
80234b0: 6818 ldr r0, [r3, #0]
80234b2: 4b20 ldr r3, [pc, #128] @ (8023534 <dhcp_discover+0x138>)
80234b4: 9301 str r3, [sp, #4]
80234b6: 687b ldr r3, [r7, #4]
80234b8: 9300 str r3, [sp, #0]
80234ba: 2343 movs r3, #67 @ 0x43
80234bc: 4a1e ldr r2, [pc, #120] @ (8023538 <dhcp_discover+0x13c>)
80234be: 6939 ldr r1, [r7, #16]
80234c0: f7fe fff6 bl 80224b0 <udp_sendto_if_src>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n"));
pbuf_free(p_out);
80234c4: 6938 ldr r0, [r7, #16]
80234c6: f7f8 f839 bl 801b53c <pbuf_free>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n"));
} else {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n"));
}
if (dhcp->tries < 255) {
80234ca: 69bb ldr r3, [r7, #24]
80234cc: 799b ldrb r3, [r3, #6]
80234ce: 2bff cmp r3, #255 @ 0xff
80234d0: d005 beq.n 80234de <dhcp_discover+0xe2>
dhcp->tries++;
80234d2: 69bb ldr r3, [r7, #24]
80234d4: 799b ldrb r3, [r3, #6]
80234d6: 3301 adds r3, #1
80234d8: b2da uxtb r2, r3
80234da: 69bb ldr r3, [r7, #24]
80234dc: 719a strb r2, [r3, #6]
if (dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) {
dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON;
autoip_start(netif);
}
#endif /* LWIP_DHCP_AUTOIP_COOP */
msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
80234de: 69bb ldr r3, [r7, #24]
80234e0: 799b ldrb r3, [r3, #6]
80234e2: 2b05 cmp r3, #5
80234e4: d80d bhi.n 8023502 <dhcp_discover+0x106>
80234e6: 69bb ldr r3, [r7, #24]
80234e8: 799b ldrb r3, [r3, #6]
80234ea: 461a mov r2, r3
80234ec: 2301 movs r3, #1
80234ee: 4093 lsls r3, r2
80234f0: b29b uxth r3, r3
80234f2: 461a mov r2, r3
80234f4: 0152 lsls r2, r2, #5
80234f6: 1ad2 subs r2, r2, r3
80234f8: 0092 lsls r2, r2, #2
80234fa: 4413 add r3, r2
80234fc: 00db lsls r3, r3, #3
80234fe: b29b uxth r3, r3
8023500: e001 b.n 8023506 <dhcp_discover+0x10a>
8023502: f64e 2360 movw r3, #60000 @ 0xea60
8023506: 817b strh r3, [r7, #10]
dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
8023508: 897b ldrh r3, [r7, #10]
802350a: f203 13f3 addw r3, r3, #499 @ 0x1f3
802350e: 4a0b ldr r2, [pc, #44] @ (802353c <dhcp_discover+0x140>)
8023510: fb82 1203 smull r1, r2, r2, r3
8023514: 1152 asrs r2, r2, #5
8023516: 17db asrs r3, r3, #31
8023518: 1ad3 subs r3, r2, r3
802351a: b29a uxth r2, r3
802351c: 69bb ldr r3, [r7, #24]
802351e: 811a strh r2, [r3, #8]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs));
return result;
8023520: f997 3017 ldrsb.w r3, [r7, #23]
}
8023524: 4618 mov r0, r3
8023526: 3720 adds r7, #32
8023528: 46bd mov sp, r7
802352a: bd80 pop {r7, pc}
802352c: 24000058 .word 0x24000058
8023530: 2402b034 .word 0x2402b034
8023534: 08031ec8 .word 0x08031ec8
8023538: 08031ecc .word 0x08031ecc
802353c: 10624dd3 .word 0x10624dd3
08023540 <dhcp_bind>:
*
* @param netif network interface to bind to the offered address
*/
static void
dhcp_bind(struct netif *netif)
{
8023540: b580 push {r7, lr}
8023542: b088 sub sp, #32
8023544: af00 add r7, sp, #0
8023546: 6078 str r0, [r7, #4]
u32_t timeout;
struct dhcp *dhcp;
ip4_addr_t sn_mask, gw_addr;
LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;);
8023548: 687b ldr r3, [r7, #4]
802354a: 2b00 cmp r3, #0
802354c: d107 bne.n 802355e <dhcp_bind+0x1e>
802354e: 4b64 ldr r3, [pc, #400] @ (80236e0 <dhcp_bind+0x1a0>)
8023550: f240 4215 movw r2, #1045 @ 0x415
8023554: 4963 ldr r1, [pc, #396] @ (80236e4 <dhcp_bind+0x1a4>)
8023556: 4864 ldr r0, [pc, #400] @ (80236e8 <dhcp_bind+0x1a8>)
8023558: f007 fa68 bl 802aa2c <iprintf>
802355c: e0bc b.n 80236d8 <dhcp_bind+0x198>
dhcp = netif_dhcp_data(netif);
802355e: 687b ldr r3, [r7, #4]
8023560: 6a5b ldr r3, [r3, #36] @ 0x24
8023562: 61fb str r3, [r7, #28]
LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;);
8023564: 69fb ldr r3, [r7, #28]
8023566: 2b00 cmp r3, #0
8023568: d107 bne.n 802357a <dhcp_bind+0x3a>
802356a: 4b5d ldr r3, [pc, #372] @ (80236e0 <dhcp_bind+0x1a0>)
802356c: f240 4217 movw r2, #1047 @ 0x417
8023570: 495e ldr r1, [pc, #376] @ (80236ec <dhcp_bind+0x1ac>)
8023572: 485d ldr r0, [pc, #372] @ (80236e8 <dhcp_bind+0x1a8>)
8023574: f007 fa5a bl 802aa2c <iprintf>
8023578: e0ae b.n 80236d8 <dhcp_bind+0x198>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
/* reset time used of lease */
dhcp->lease_used = 0;
802357a: 69fb ldr r3, [r7, #28]
802357c: 2200 movs r2, #0
802357e: 825a strh r2, [r3, #18]
if (dhcp->offered_t0_lease != 0xffffffffUL) {
8023580: 69fb ldr r3, [r7, #28]
8023582: 6a9b ldr r3, [r3, #40] @ 0x28
8023584: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8023588: d019 beq.n 80235be <dhcp_bind+0x7e>
/* set renewal period timer */
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t0 renewal timer %"U32_F" secs\n", dhcp->offered_t0_lease));
timeout = (dhcp->offered_t0_lease + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
802358a: 69fb ldr r3, [r7, #28]
802358c: 6a9b ldr r3, [r3, #40] @ 0x28
802358e: 331e adds r3, #30
8023590: 4a57 ldr r2, [pc, #348] @ (80236f0 <dhcp_bind+0x1b0>)
8023592: fba2 2303 umull r2, r3, r2, r3
8023596: 095b lsrs r3, r3, #5
8023598: 61bb str r3, [r7, #24]
if (timeout > 0xffff) {
802359a: 69bb ldr r3, [r7, #24]
802359c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80235a0: d302 bcc.n 80235a8 <dhcp_bind+0x68>
timeout = 0xffff;
80235a2: f64f 73ff movw r3, #65535 @ 0xffff
80235a6: 61bb str r3, [r7, #24]
}
dhcp->t0_timeout = (u16_t)timeout;
80235a8: 69bb ldr r3, [r7, #24]
80235aa: b29a uxth r2, r3
80235ac: 69fb ldr r3, [r7, #28]
80235ae: 829a strh r2, [r3, #20]
if (dhcp->t0_timeout == 0) {
80235b0: 69fb ldr r3, [r7, #28]
80235b2: 8a9b ldrh r3, [r3, #20]
80235b4: 2b00 cmp r3, #0
80235b6: d102 bne.n 80235be <dhcp_bind+0x7e>
dhcp->t0_timeout = 1;
80235b8: 69fb ldr r3, [r7, #28]
80235ba: 2201 movs r2, #1
80235bc: 829a strh r2, [r3, #20]
}
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t0_lease * 1000));
}
/* temporary DHCP lease? */
if (dhcp->offered_t1_renew != 0xffffffffUL) {
80235be: 69fb ldr r3, [r7, #28]
80235c0: 6adb ldr r3, [r3, #44] @ 0x2c
80235c2: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80235c6: d01d beq.n 8023604 <dhcp_bind+0xc4>
/* set renewal period timer */
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew));
timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
80235c8: 69fb ldr r3, [r7, #28]
80235ca: 6adb ldr r3, [r3, #44] @ 0x2c
80235cc: 331e adds r3, #30
80235ce: 4a48 ldr r2, [pc, #288] @ (80236f0 <dhcp_bind+0x1b0>)
80235d0: fba2 2303 umull r2, r3, r2, r3
80235d4: 095b lsrs r3, r3, #5
80235d6: 61bb str r3, [r7, #24]
if (timeout > 0xffff) {
80235d8: 69bb ldr r3, [r7, #24]
80235da: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80235de: d302 bcc.n 80235e6 <dhcp_bind+0xa6>
timeout = 0xffff;
80235e0: f64f 73ff movw r3, #65535 @ 0xffff
80235e4: 61bb str r3, [r7, #24]
}
dhcp->t1_timeout = (u16_t)timeout;
80235e6: 69bb ldr r3, [r7, #24]
80235e8: b29a uxth r2, r3
80235ea: 69fb ldr r3, [r7, #28]
80235ec: 815a strh r2, [r3, #10]
if (dhcp->t1_timeout == 0) {
80235ee: 69fb ldr r3, [r7, #28]
80235f0: 895b ldrh r3, [r3, #10]
80235f2: 2b00 cmp r3, #0
80235f4: d102 bne.n 80235fc <dhcp_bind+0xbc>
dhcp->t1_timeout = 1;
80235f6: 69fb ldr r3, [r7, #28]
80235f8: 2201 movs r2, #1
80235fa: 815a strh r2, [r3, #10]
}
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew * 1000));
dhcp->t1_renew_time = dhcp->t1_timeout;
80235fc: 69fb ldr r3, [r7, #28]
80235fe: 895a ldrh r2, [r3, #10]
8023600: 69fb ldr r3, [r7, #28]
8023602: 81da strh r2, [r3, #14]
}
/* set renewal period timer */
if (dhcp->offered_t2_rebind != 0xffffffffUL) {
8023604: 69fb ldr r3, [r7, #28]
8023606: 6b1b ldr r3, [r3, #48] @ 0x30
8023608: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
802360c: d01d beq.n 802364a <dhcp_bind+0x10a>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind));
timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
802360e: 69fb ldr r3, [r7, #28]
8023610: 6b1b ldr r3, [r3, #48] @ 0x30
8023612: 331e adds r3, #30
8023614: 4a36 ldr r2, [pc, #216] @ (80236f0 <dhcp_bind+0x1b0>)
8023616: fba2 2303 umull r2, r3, r2, r3
802361a: 095b lsrs r3, r3, #5
802361c: 61bb str r3, [r7, #24]
if (timeout > 0xffff) {
802361e: 69bb ldr r3, [r7, #24]
8023620: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8023624: d302 bcc.n 802362c <dhcp_bind+0xec>
timeout = 0xffff;
8023626: f64f 73ff movw r3, #65535 @ 0xffff
802362a: 61bb str r3, [r7, #24]
}
dhcp->t2_timeout = (u16_t)timeout;
802362c: 69bb ldr r3, [r7, #24]
802362e: b29a uxth r2, r3
8023630: 69fb ldr r3, [r7, #28]
8023632: 819a strh r2, [r3, #12]
if (dhcp->t2_timeout == 0) {
8023634: 69fb ldr r3, [r7, #28]
8023636: 899b ldrh r3, [r3, #12]
8023638: 2b00 cmp r3, #0
802363a: d102 bne.n 8023642 <dhcp_bind+0x102>
dhcp->t2_timeout = 1;
802363c: 69fb ldr r3, [r7, #28]
802363e: 2201 movs r2, #1
8023640: 819a strh r2, [r3, #12]
}
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind * 1000));
dhcp->t2_rebind_time = dhcp->t2_timeout;
8023642: 69fb ldr r3, [r7, #28]
8023644: 899a ldrh r2, [r3, #12]
8023646: 69fb ldr r3, [r7, #28]
8023648: 821a strh r2, [r3, #16]
}
/* If we have sub 1 minute lease, t2 and t1 will kick in at the same time. */
if ((dhcp->t1_timeout >= dhcp->t2_timeout) && (dhcp->t2_timeout > 0)) {
802364a: 69fb ldr r3, [r7, #28]
802364c: 895a ldrh r2, [r3, #10]
802364e: 69fb ldr r3, [r7, #28]
8023650: 899b ldrh r3, [r3, #12]
8023652: 429a cmp r2, r3
8023654: d306 bcc.n 8023664 <dhcp_bind+0x124>
8023656: 69fb ldr r3, [r7, #28]
8023658: 899b ldrh r3, [r3, #12]
802365a: 2b00 cmp r3, #0
802365c: d002 beq.n 8023664 <dhcp_bind+0x124>
dhcp->t1_timeout = 0;
802365e: 69fb ldr r3, [r7, #28]
8023660: 2200 movs r2, #0
8023662: 815a strh r2, [r3, #10]
}
if (dhcp->subnet_mask_given) {
8023664: 69fb ldr r3, [r7, #28]
8023666: 79db ldrb r3, [r3, #7]
8023668: 2b00 cmp r3, #0
802366a: d003 beq.n 8023674 <dhcp_bind+0x134>
/* copy offered network mask */
ip4_addr_copy(sn_mask, dhcp->offered_sn_mask);
802366c: 69fb ldr r3, [r7, #28]
802366e: 6a1b ldr r3, [r3, #32]
8023670: 613b str r3, [r7, #16]
8023672: e014 b.n 802369e <dhcp_bind+0x15e>
} else {
/* subnet mask not given, choose a safe subnet mask given the network class */
u8_t first_octet = ip4_addr1(&dhcp->offered_ip_addr);
8023674: 69fb ldr r3, [r7, #28]
8023676: 331c adds r3, #28
8023678: 781b ldrb r3, [r3, #0]
802367a: 75fb strb r3, [r7, #23]
if (first_octet <= 127) {
802367c: f997 3017 ldrsb.w r3, [r7, #23]
8023680: 2b00 cmp r3, #0
8023682: db02 blt.n 802368a <dhcp_bind+0x14a>
ip4_addr_set_u32(&sn_mask, PP_HTONL(0xff000000UL));
8023684: 23ff movs r3, #255 @ 0xff
8023686: 613b str r3, [r7, #16]
8023688: e009 b.n 802369e <dhcp_bind+0x15e>
} else if (first_octet >= 192) {
802368a: 7dfb ldrb r3, [r7, #23]
802368c: 2bbf cmp r3, #191 @ 0xbf
802368e: d903 bls.n 8023698 <dhcp_bind+0x158>
ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffffff00UL));
8023690: f06f 437f mvn.w r3, #4278190080 @ 0xff000000
8023694: 613b str r3, [r7, #16]
8023696: e002 b.n 802369e <dhcp_bind+0x15e>
} else {
ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffff0000UL));
8023698: f64f 73ff movw r3, #65535 @ 0xffff
802369c: 613b str r3, [r7, #16]
}
}
ip4_addr_copy(gw_addr, dhcp->offered_gw_addr);
802369e: 69fb ldr r3, [r7, #28]
80236a0: 6a5b ldr r3, [r3, #36] @ 0x24
80236a2: 60fb str r3, [r7, #12]
/* gateway address not given? */
if (ip4_addr_isany_val(gw_addr)) {
80236a4: 68fb ldr r3, [r7, #12]
80236a6: 2b00 cmp r3, #0
80236a8: d108 bne.n 80236bc <dhcp_bind+0x17c>
/* copy network address */
ip4_addr_get_network(&gw_addr, &dhcp->offered_ip_addr, &sn_mask);
80236aa: 69fb ldr r3, [r7, #28]
80236ac: 69da ldr r2, [r3, #28]
80236ae: 693b ldr r3, [r7, #16]
80236b0: 4013 ands r3, r2
80236b2: 60fb str r3, [r7, #12]
/* use first host address on network as gateway */
ip4_addr_set_u32(&gw_addr, ip4_addr_get_u32(&gw_addr) | PP_HTONL(0x00000001UL));
80236b4: 68fb ldr r3, [r7, #12]
80236b6: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000
80236ba: 60fb str r3, [r7, #12]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F" SN: 0x%08"X32_F" GW: 0x%08"X32_F"\n",
ip4_addr_get_u32(&dhcp->offered_ip_addr), ip4_addr_get_u32(&sn_mask), ip4_addr_get_u32(&gw_addr)));
/* netif is now bound to DHCP leased address - set this before assigning the address
to ensure the callback can use dhcp_supplied_address() */
dhcp_set_state(dhcp, DHCP_STATE_BOUND);
80236bc: 210a movs r1, #10
80236be: 69f8 ldr r0, [r7, #28]
80236c0: f000 faa9 bl 8023c16 <dhcp_set_state>
netif_set_addr(netif, &dhcp->offered_ip_addr, &sn_mask, &gw_addr);
80236c4: 69fb ldr r3, [r7, #28]
80236c6: f103 011c add.w r1, r3, #28
80236ca: f107 030c add.w r3, r7, #12
80236ce: f107 0210 add.w r2, r7, #16
80236d2: 6878 ldr r0, [r7, #4]
80236d4: f7f7 f9e8 bl 801aaa8 <netif_set_addr>
/* interface is used by routing now that an address is set */
}
80236d8: 3720 adds r7, #32
80236da: 46bd mov sp, r7
80236dc: bd80 pop {r7, pc}
80236de: bf00 nop
80236e0: 0803109c .word 0x0803109c
80236e4: 080311fc .word 0x080311fc
80236e8: 080310fc .word 0x080310fc
80236ec: 08031218 .word 0x08031218
80236f0: 88888889 .word 0x88888889
080236f4 <dhcp_renew>:
*
* @param netif network interface which must renew its lease
*/
err_t
dhcp_renew(struct netif *netif)
{
80236f4: b580 push {r7, lr}
80236f6: b08a sub sp, #40 @ 0x28
80236f8: af02 add r7, sp, #8
80236fa: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
80236fc: 687b ldr r3, [r7, #4]
80236fe: 6a5b ldr r3, [r3, #36] @ 0x24
8023700: 61bb str r3, [r7, #24]
u16_t msecs;
u8_t i;
struct pbuf *p_out;
u16_t options_out_len;
LWIP_ASSERT_CORE_LOCKED();
8023702: f7ed fd67 bl 80111d4 <sys_check_core_locking>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n"));
dhcp_set_state(dhcp, DHCP_STATE_RENEWING);
8023706: 2105 movs r1, #5
8023708: 69b8 ldr r0, [r7, #24]
802370a: f000 fa84 bl 8023c16 <dhcp_set_state>
/* create and initialize the DHCP message header */
p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
802370e: f107 030c add.w r3, r7, #12
8023712: 2203 movs r2, #3
8023714: 69b9 ldr r1, [r7, #24]
8023716: 6878 ldr r0, [r7, #4]
8023718: f000 ff16 bl 8024548 <dhcp_create_msg>
802371c: 6178 str r0, [r7, #20]
if (p_out != NULL) {
802371e: 697b ldr r3, [r7, #20]
8023720: 2b00 cmp r3, #0
8023722: d04e beq.n 80237c2 <dhcp_renew+0xce>
struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
8023724: 697b ldr r3, [r7, #20]
8023726: 685b ldr r3, [r3, #4]
8023728: 613b str r3, [r7, #16]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
802372a: 89b8 ldrh r0, [r7, #12]
802372c: 693b ldr r3, [r7, #16]
802372e: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023732: 2302 movs r3, #2
8023734: 2239 movs r2, #57 @ 0x39
8023736: f000 fa89 bl 8023c4c <dhcp_option>
802373a: 4603 mov r3, r0
802373c: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
802373e: 89b8 ldrh r0, [r7, #12]
8023740: 693b ldr r3, [r7, #16]
8023742: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023746: 687b ldr r3, [r7, #4]
8023748: 8d1b ldrh r3, [r3, #40] @ 0x28
802374a: 461a mov r2, r3
802374c: f000 fad8 bl 8023d00 <dhcp_option_short>
8023750: 4603 mov r3, r0
8023752: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
8023754: 89b8 ldrh r0, [r7, #12]
8023756: 693b ldr r3, [r7, #16]
8023758: f103 01f0 add.w r1, r3, #240 @ 0xf0
802375c: 2303 movs r3, #3
802375e: 2237 movs r2, #55 @ 0x37
8023760: f000 fa74 bl 8023c4c <dhcp_option>
8023764: 4603 mov r3, r0
8023766: 81bb strh r3, [r7, #12]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
8023768: 2300 movs r3, #0
802376a: 77bb strb r3, [r7, #30]
802376c: e00e b.n 802378c <dhcp_renew+0x98>
options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
802376e: 89b8 ldrh r0, [r7, #12]
8023770: 693b ldr r3, [r7, #16]
8023772: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023776: 7fbb ldrb r3, [r7, #30]
8023778: 4a29 ldr r2, [pc, #164] @ (8023820 <dhcp_renew+0x12c>)
802377a: 5cd3 ldrb r3, [r2, r3]
802377c: 461a mov r2, r3
802377e: f000 fa99 bl 8023cb4 <dhcp_option_byte>
8023782: 4603 mov r3, r0
8023784: 81bb strh r3, [r7, #12]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
8023786: 7fbb ldrb r3, [r7, #30]
8023788: 3301 adds r3, #1
802378a: 77bb strb r3, [r7, #30]
802378c: 7fbb ldrb r3, [r7, #30]
802378e: 2b02 cmp r3, #2
8023790: d9ed bls.n 802376e <dhcp_renew+0x7a>
#if LWIP_NETIF_HOSTNAME
options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */
LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_RENEWING, msg_out, DHCP_REQUEST, &options_out_len);
dhcp_option_trailer(options_out_len, msg_out->options, p_out);
8023792: 89b8 ldrh r0, [r7, #12]
8023794: 693b ldr r3, [r7, #16]
8023796: 33f0 adds r3, #240 @ 0xf0
8023798: 697a ldr r2, [r7, #20]
802379a: 4619 mov r1, r3
802379c: f000 ffaa bl 80246f4 <dhcp_option_trailer>
result = udp_sendto_if(dhcp_pcb, p_out, &dhcp->server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
80237a0: 4b20 ldr r3, [pc, #128] @ (8023824 <dhcp_renew+0x130>)
80237a2: 6818 ldr r0, [r3, #0]
80237a4: 69bb ldr r3, [r7, #24]
80237a6: f103 0218 add.w r2, r3, #24
80237aa: 687b ldr r3, [r7, #4]
80237ac: 9300 str r3, [sp, #0]
80237ae: 2343 movs r3, #67 @ 0x43
80237b0: 6979 ldr r1, [r7, #20]
80237b2: f7fe fe09 bl 80223c8 <udp_sendto_if>
80237b6: 4603 mov r3, r0
80237b8: 77fb strb r3, [r7, #31]
pbuf_free(p_out);
80237ba: 6978 ldr r0, [r7, #20]
80237bc: f7f7 febe bl 801b53c <pbuf_free>
80237c0: e001 b.n 80237c6 <dhcp_renew+0xd2>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n"));
} else {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n"));
result = ERR_MEM;
80237c2: 23ff movs r3, #255 @ 0xff
80237c4: 77fb strb r3, [r7, #31]
}
if (dhcp->tries < 255) {
80237c6: 69bb ldr r3, [r7, #24]
80237c8: 799b ldrb r3, [r3, #6]
80237ca: 2bff cmp r3, #255 @ 0xff
80237cc: d005 beq.n 80237da <dhcp_renew+0xe6>
dhcp->tries++;
80237ce: 69bb ldr r3, [r7, #24]
80237d0: 799b ldrb r3, [r3, #6]
80237d2: 3301 adds r3, #1
80237d4: b2da uxtb r2, r3
80237d6: 69bb ldr r3, [r7, #24]
80237d8: 719a strb r2, [r3, #6]
}
/* back-off on retries, but to a maximum of 20 seconds */
msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000);
80237da: 69bb ldr r3, [r7, #24]
80237dc: 799b ldrb r3, [r3, #6]
80237de: 2b09 cmp r3, #9
80237e0: d809 bhi.n 80237f6 <dhcp_renew+0x102>
80237e2: 69bb ldr r3, [r7, #24]
80237e4: 799b ldrb r3, [r3, #6]
80237e6: 461a mov r2, r3
80237e8: 0152 lsls r2, r2, #5
80237ea: 1ad2 subs r2, r2, r3
80237ec: 0092 lsls r2, r2, #2
80237ee: 4413 add r3, r2
80237f0: 011b lsls r3, r3, #4
80237f2: b29b uxth r3, r3
80237f4: e001 b.n 80237fa <dhcp_renew+0x106>
80237f6: f644 6320 movw r3, #20000 @ 0x4e20
80237fa: 81fb strh r3, [r7, #14]
dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
80237fc: 89fb ldrh r3, [r7, #14]
80237fe: f203 13f3 addw r3, r3, #499 @ 0x1f3
8023802: 4a09 ldr r2, [pc, #36] @ (8023828 <dhcp_renew+0x134>)
8023804: fb82 1203 smull r1, r2, r2, r3
8023808: 1152 asrs r2, r2, #5
802380a: 17db asrs r3, r3, #31
802380c: 1ad3 subs r3, r2, r3
802380e: b29a uxth r2, r3
8023810: 69bb ldr r3, [r7, #24]
8023812: 811a strh r2, [r3, #8]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs));
return result;
8023814: f997 301f ldrsb.w r3, [r7, #31]
}
8023818: 4618 mov r0, r3
802381a: 3720 adds r7, #32
802381c: 46bd mov sp, r7
802381e: bd80 pop {r7, pc}
8023820: 24000058 .word 0x24000058
8023824: 2402b034 .word 0x2402b034
8023828: 10624dd3 .word 0x10624dd3
0802382c <dhcp_rebind>:
*
* @param netif network interface which must rebind with a DHCP server
*/
static err_t
dhcp_rebind(struct netif *netif)
{
802382c: b580 push {r7, lr}
802382e: b08a sub sp, #40 @ 0x28
8023830: af02 add r7, sp, #8
8023832: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8023834: 687b ldr r3, [r7, #4]
8023836: 6a5b ldr r3, [r3, #36] @ 0x24
8023838: 61bb str r3, [r7, #24]
u8_t i;
struct pbuf *p_out;
u16_t options_out_len;
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n"));
dhcp_set_state(dhcp, DHCP_STATE_REBINDING);
802383a: 2104 movs r1, #4
802383c: 69b8 ldr r0, [r7, #24]
802383e: f000 f9ea bl 8023c16 <dhcp_set_state>
/* create and initialize the DHCP message header */
p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
8023842: f107 030c add.w r3, r7, #12
8023846: 2203 movs r2, #3
8023848: 69b9 ldr r1, [r7, #24]
802384a: 6878 ldr r0, [r7, #4]
802384c: f000 fe7c bl 8024548 <dhcp_create_msg>
8023850: 6178 str r0, [r7, #20]
if (p_out != NULL) {
8023852: 697b ldr r3, [r7, #20]
8023854: 2b00 cmp r3, #0
8023856: d04c beq.n 80238f2 <dhcp_rebind+0xc6>
struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
8023858: 697b ldr r3, [r7, #20]
802385a: 685b ldr r3, [r3, #4]
802385c: 613b str r3, [r7, #16]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
802385e: 89b8 ldrh r0, [r7, #12]
8023860: 693b ldr r3, [r7, #16]
8023862: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023866: 2302 movs r3, #2
8023868: 2239 movs r2, #57 @ 0x39
802386a: f000 f9ef bl 8023c4c <dhcp_option>
802386e: 4603 mov r3, r0
8023870: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
8023872: 89b8 ldrh r0, [r7, #12]
8023874: 693b ldr r3, [r7, #16]
8023876: f103 01f0 add.w r1, r3, #240 @ 0xf0
802387a: 687b ldr r3, [r7, #4]
802387c: 8d1b ldrh r3, [r3, #40] @ 0x28
802387e: 461a mov r2, r3
8023880: f000 fa3e bl 8023d00 <dhcp_option_short>
8023884: 4603 mov r3, r0
8023886: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
8023888: 89b8 ldrh r0, [r7, #12]
802388a: 693b ldr r3, [r7, #16]
802388c: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023890: 2303 movs r3, #3
8023892: 2237 movs r2, #55 @ 0x37
8023894: f000 f9da bl 8023c4c <dhcp_option>
8023898: 4603 mov r3, r0
802389a: 81bb strh r3, [r7, #12]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
802389c: 2300 movs r3, #0
802389e: 77bb strb r3, [r7, #30]
80238a0: e00e b.n 80238c0 <dhcp_rebind+0x94>
options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
80238a2: 89b8 ldrh r0, [r7, #12]
80238a4: 693b ldr r3, [r7, #16]
80238a6: f103 01f0 add.w r1, r3, #240 @ 0xf0
80238aa: 7fbb ldrb r3, [r7, #30]
80238ac: 4a28 ldr r2, [pc, #160] @ (8023950 <dhcp_rebind+0x124>)
80238ae: 5cd3 ldrb r3, [r2, r3]
80238b0: 461a mov r2, r3
80238b2: f000 f9ff bl 8023cb4 <dhcp_option_byte>
80238b6: 4603 mov r3, r0
80238b8: 81bb strh r3, [r7, #12]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
80238ba: 7fbb ldrb r3, [r7, #30]
80238bc: 3301 adds r3, #1
80238be: 77bb strb r3, [r7, #30]
80238c0: 7fbb ldrb r3, [r7, #30]
80238c2: 2b02 cmp r3, #2
80238c4: d9ed bls.n 80238a2 <dhcp_rebind+0x76>
#if LWIP_NETIF_HOSTNAME
options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */
LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBINDING, msg_out, DHCP_DISCOVER, &options_out_len);
dhcp_option_trailer(options_out_len, msg_out->options, p_out);
80238c6: 89b8 ldrh r0, [r7, #12]
80238c8: 693b ldr r3, [r7, #16]
80238ca: 33f0 adds r3, #240 @ 0xf0
80238cc: 697a ldr r2, [r7, #20]
80238ce: 4619 mov r1, r3
80238d0: f000 ff10 bl 80246f4 <dhcp_option_trailer>
/* broadcast to server */
result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
80238d4: 4b1f ldr r3, [pc, #124] @ (8023954 <dhcp_rebind+0x128>)
80238d6: 6818 ldr r0, [r3, #0]
80238d8: 687b ldr r3, [r7, #4]
80238da: 9300 str r3, [sp, #0]
80238dc: 2343 movs r3, #67 @ 0x43
80238de: 4a1e ldr r2, [pc, #120] @ (8023958 <dhcp_rebind+0x12c>)
80238e0: 6979 ldr r1, [r7, #20]
80238e2: f7fe fd71 bl 80223c8 <udp_sendto_if>
80238e6: 4603 mov r3, r0
80238e8: 77fb strb r3, [r7, #31]
pbuf_free(p_out);
80238ea: 6978 ldr r0, [r7, #20]
80238ec: f7f7 fe26 bl 801b53c <pbuf_free>
80238f0: e001 b.n 80238f6 <dhcp_rebind+0xca>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n"));
} else {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n"));
result = ERR_MEM;
80238f2: 23ff movs r3, #255 @ 0xff
80238f4: 77fb strb r3, [r7, #31]
}
if (dhcp->tries < 255) {
80238f6: 69bb ldr r3, [r7, #24]
80238f8: 799b ldrb r3, [r3, #6]
80238fa: 2bff cmp r3, #255 @ 0xff
80238fc: d005 beq.n 802390a <dhcp_rebind+0xde>
dhcp->tries++;
80238fe: 69bb ldr r3, [r7, #24]
8023900: 799b ldrb r3, [r3, #6]
8023902: 3301 adds r3, #1
8023904: b2da uxtb r2, r3
8023906: 69bb ldr r3, [r7, #24]
8023908: 719a strb r2, [r3, #6]
}
msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
802390a: 69bb ldr r3, [r7, #24]
802390c: 799b ldrb r3, [r3, #6]
802390e: 2b09 cmp r3, #9
8023910: d809 bhi.n 8023926 <dhcp_rebind+0xfa>
8023912: 69bb ldr r3, [r7, #24]
8023914: 799b ldrb r3, [r3, #6]
8023916: 461a mov r2, r3
8023918: 0152 lsls r2, r2, #5
802391a: 1ad2 subs r2, r2, r3
802391c: 0092 lsls r2, r2, #2
802391e: 4413 add r3, r2
8023920: 00db lsls r3, r3, #3
8023922: b29b uxth r3, r3
8023924: e001 b.n 802392a <dhcp_rebind+0xfe>
8023926: f242 7310 movw r3, #10000 @ 0x2710
802392a: 81fb strh r3, [r7, #14]
dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
802392c: 89fb ldrh r3, [r7, #14]
802392e: f203 13f3 addw r3, r3, #499 @ 0x1f3
8023932: 4a0a ldr r2, [pc, #40] @ (802395c <dhcp_rebind+0x130>)
8023934: fb82 1203 smull r1, r2, r2, r3
8023938: 1152 asrs r2, r2, #5
802393a: 17db asrs r3, r3, #31
802393c: 1ad3 subs r3, r2, r3
802393e: b29a uxth r2, r3
8023940: 69bb ldr r3, [r7, #24]
8023942: 811a strh r2, [r3, #8]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs));
return result;
8023944: f997 301f ldrsb.w r3, [r7, #31]
}
8023948: 4618 mov r0, r3
802394a: 3720 adds r7, #32
802394c: 46bd mov sp, r7
802394e: bd80 pop {r7, pc}
8023950: 24000058 .word 0x24000058
8023954: 2402b034 .word 0x2402b034
8023958: 08031ecc .word 0x08031ecc
802395c: 10624dd3 .word 0x10624dd3
08023960 <dhcp_reboot>:
*
* @param netif network interface which must reboot
*/
static err_t
dhcp_reboot(struct netif *netif)
{
8023960: b5b0 push {r4, r5, r7, lr}
8023962: b08a sub sp, #40 @ 0x28
8023964: af02 add r7, sp, #8
8023966: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8023968: 687b ldr r3, [r7, #4]
802396a: 6a5b ldr r3, [r3, #36] @ 0x24
802396c: 61bb str r3, [r7, #24]
u8_t i;
struct pbuf *p_out;
u16_t options_out_len;
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n"));
dhcp_set_state(dhcp, DHCP_STATE_REBOOTING);
802396e: 2103 movs r1, #3
8023970: 69b8 ldr r0, [r7, #24]
8023972: f000 f950 bl 8023c16 <dhcp_set_state>
/* create and initialize the DHCP message header */
p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
8023976: f107 030c add.w r3, r7, #12
802397a: 2203 movs r2, #3
802397c: 69b9 ldr r1, [r7, #24]
802397e: 6878 ldr r0, [r7, #4]
8023980: f000 fde2 bl 8024548 <dhcp_create_msg>
8023984: 6178 str r0, [r7, #20]
if (p_out != NULL) {
8023986: 697b ldr r3, [r7, #20]
8023988: 2b00 cmp r3, #0
802398a: d066 beq.n 8023a5a <dhcp_reboot+0xfa>
struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
802398c: 697b ldr r3, [r7, #20]
802398e: 685b ldr r3, [r3, #4]
8023990: 613b str r3, [r7, #16]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
8023992: 89b8 ldrh r0, [r7, #12]
8023994: 693b ldr r3, [r7, #16]
8023996: f103 01f0 add.w r1, r3, #240 @ 0xf0
802399a: 2302 movs r3, #2
802399c: 2239 movs r2, #57 @ 0x39
802399e: f000 f955 bl 8023c4c <dhcp_option>
80239a2: 4603 mov r3, r0
80239a4: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN_MIN_REQUIRED);
80239a6: 89b8 ldrh r0, [r7, #12]
80239a8: 693b ldr r3, [r7, #16]
80239aa: 33f0 adds r3, #240 @ 0xf0
80239ac: f44f 7210 mov.w r2, #576 @ 0x240
80239b0: 4619 mov r1, r3
80239b2: f000 f9a5 bl 8023d00 <dhcp_option_short>
80239b6: 4603 mov r3, r0
80239b8: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
80239ba: 89b8 ldrh r0, [r7, #12]
80239bc: 693b ldr r3, [r7, #16]
80239be: f103 01f0 add.w r1, r3, #240 @ 0xf0
80239c2: 2304 movs r3, #4
80239c4: 2232 movs r2, #50 @ 0x32
80239c6: f000 f941 bl 8023c4c <dhcp_option>
80239ca: 4603 mov r3, r0
80239cc: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
80239ce: 89bc ldrh r4, [r7, #12]
80239d0: 693b ldr r3, [r7, #16]
80239d2: f103 05f0 add.w r5, r3, #240 @ 0xf0
80239d6: 69bb ldr r3, [r7, #24]
80239d8: 69db ldr r3, [r3, #28]
80239da: 4618 mov r0, r3
80239dc: f7f6 f8e1 bl 8019ba2 <lwip_htonl>
80239e0: 4603 mov r3, r0
80239e2: 461a mov r2, r3
80239e4: 4629 mov r1, r5
80239e6: 4620 mov r0, r4
80239e8: f000 f9bc bl 8023d64 <dhcp_option_long>
80239ec: 4603 mov r3, r0
80239ee: 81bb strh r3, [r7, #12]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
80239f0: 89b8 ldrh r0, [r7, #12]
80239f2: 693b ldr r3, [r7, #16]
80239f4: f103 01f0 add.w r1, r3, #240 @ 0xf0
80239f8: 2303 movs r3, #3
80239fa: 2237 movs r2, #55 @ 0x37
80239fc: f000 f926 bl 8023c4c <dhcp_option>
8023a00: 4603 mov r3, r0
8023a02: 81bb strh r3, [r7, #12]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
8023a04: 2300 movs r3, #0
8023a06: 77bb strb r3, [r7, #30]
8023a08: e00e b.n 8023a28 <dhcp_reboot+0xc8>
options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
8023a0a: 89b8 ldrh r0, [r7, #12]
8023a0c: 693b ldr r3, [r7, #16]
8023a0e: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023a12: 7fbb ldrb r3, [r7, #30]
8023a14: 4a28 ldr r2, [pc, #160] @ (8023ab8 <dhcp_reboot+0x158>)
8023a16: 5cd3 ldrb r3, [r2, r3]
8023a18: 461a mov r2, r3
8023a1a: f000 f94b bl 8023cb4 <dhcp_option_byte>
8023a1e: 4603 mov r3, r0
8023a20: 81bb strh r3, [r7, #12]
for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
8023a22: 7fbb ldrb r3, [r7, #30]
8023a24: 3301 adds r3, #1
8023a26: 77bb strb r3, [r7, #30]
8023a28: 7fbb ldrb r3, [r7, #30]
8023a2a: 2b02 cmp r3, #2
8023a2c: d9ed bls.n 8023a0a <dhcp_reboot+0xaa>
#if LWIP_NETIF_HOSTNAME
options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */
LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBOOTING, msg_out, DHCP_REQUEST, &options_out_len);
dhcp_option_trailer(options_out_len, msg_out->options, p_out);
8023a2e: 89b8 ldrh r0, [r7, #12]
8023a30: 693b ldr r3, [r7, #16]
8023a32: 33f0 adds r3, #240 @ 0xf0
8023a34: 697a ldr r2, [r7, #20]
8023a36: 4619 mov r1, r3
8023a38: f000 fe5c bl 80246f4 <dhcp_option_trailer>
/* broadcast to server */
result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
8023a3c: 4b1f ldr r3, [pc, #124] @ (8023abc <dhcp_reboot+0x15c>)
8023a3e: 6818 ldr r0, [r3, #0]
8023a40: 687b ldr r3, [r7, #4]
8023a42: 9300 str r3, [sp, #0]
8023a44: 2343 movs r3, #67 @ 0x43
8023a46: 4a1e ldr r2, [pc, #120] @ (8023ac0 <dhcp_reboot+0x160>)
8023a48: 6979 ldr r1, [r7, #20]
8023a4a: f7fe fcbd bl 80223c8 <udp_sendto_if>
8023a4e: 4603 mov r3, r0
8023a50: 77fb strb r3, [r7, #31]
pbuf_free(p_out);
8023a52: 6978 ldr r0, [r7, #20]
8023a54: f7f7 fd72 bl 801b53c <pbuf_free>
8023a58: e001 b.n 8023a5e <dhcp_reboot+0xfe>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n"));
} else {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n"));
result = ERR_MEM;
8023a5a: 23ff movs r3, #255 @ 0xff
8023a5c: 77fb strb r3, [r7, #31]
}
if (dhcp->tries < 255) {
8023a5e: 69bb ldr r3, [r7, #24]
8023a60: 799b ldrb r3, [r3, #6]
8023a62: 2bff cmp r3, #255 @ 0xff
8023a64: d005 beq.n 8023a72 <dhcp_reboot+0x112>
dhcp->tries++;
8023a66: 69bb ldr r3, [r7, #24]
8023a68: 799b ldrb r3, [r3, #6]
8023a6a: 3301 adds r3, #1
8023a6c: b2da uxtb r2, r3
8023a6e: 69bb ldr r3, [r7, #24]
8023a70: 719a strb r2, [r3, #6]
}
msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
8023a72: 69bb ldr r3, [r7, #24]
8023a74: 799b ldrb r3, [r3, #6]
8023a76: 2b09 cmp r3, #9
8023a78: d809 bhi.n 8023a8e <dhcp_reboot+0x12e>
8023a7a: 69bb ldr r3, [r7, #24]
8023a7c: 799b ldrb r3, [r3, #6]
8023a7e: 461a mov r2, r3
8023a80: 0152 lsls r2, r2, #5
8023a82: 1ad2 subs r2, r2, r3
8023a84: 0092 lsls r2, r2, #2
8023a86: 4413 add r3, r2
8023a88: 00db lsls r3, r3, #3
8023a8a: b29b uxth r3, r3
8023a8c: e001 b.n 8023a92 <dhcp_reboot+0x132>
8023a8e: f242 7310 movw r3, #10000 @ 0x2710
8023a92: 81fb strh r3, [r7, #14]
dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
8023a94: 89fb ldrh r3, [r7, #14]
8023a96: f203 13f3 addw r3, r3, #499 @ 0x1f3
8023a9a: 4a0a ldr r2, [pc, #40] @ (8023ac4 <dhcp_reboot+0x164>)
8023a9c: fb82 1203 smull r1, r2, r2, r3
8023aa0: 1152 asrs r2, r2, #5
8023aa2: 17db asrs r3, r3, #31
8023aa4: 1ad3 subs r3, r2, r3
8023aa6: b29a uxth r2, r3
8023aa8: 69bb ldr r3, [r7, #24]
8023aaa: 811a strh r2, [r3, #8]
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs));
return result;
8023aac: f997 301f ldrsb.w r3, [r7, #31]
}
8023ab0: 4618 mov r0, r3
8023ab2: 3720 adds r7, #32
8023ab4: 46bd mov sp, r7
8023ab6: bdb0 pop {r4, r5, r7, pc}
8023ab8: 24000058 .word 0x24000058
8023abc: 2402b034 .word 0x2402b034
8023ac0: 08031ecc .word 0x08031ecc
8023ac4: 10624dd3 .word 0x10624dd3
08023ac8 <dhcp_release_and_stop>:
*
* @param netif network interface
*/
void
dhcp_release_and_stop(struct netif *netif)
{
8023ac8: b5b0 push {r4, r5, r7, lr}
8023aca: b08a sub sp, #40 @ 0x28
8023acc: af02 add r7, sp, #8
8023ace: 6078 str r0, [r7, #4]
struct dhcp *dhcp = netif_dhcp_data(netif);
8023ad0: 687b ldr r3, [r7, #4]
8023ad2: 6a5b ldr r3, [r3, #36] @ 0x24
8023ad4: 61fb str r3, [r7, #28]
ip_addr_t server_ip_addr;
LWIP_ASSERT_CORE_LOCKED();
8023ad6: f7ed fb7d bl 80111d4 <sys_check_core_locking>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release_and_stop()\n"));
if (dhcp == NULL) {
8023ada: 69fb ldr r3, [r7, #28]
8023adc: 2b00 cmp r3, #0
8023ade: f000 8084 beq.w 8023bea <dhcp_release_and_stop+0x122>
return;
}
/* already off? -> nothing to do */
if (dhcp->state == DHCP_STATE_OFF) {
8023ae2: 69fb ldr r3, [r7, #28]
8023ae4: 795b ldrb r3, [r3, #5]
8023ae6: 2b00 cmp r3, #0
8023ae8: f000 8081 beq.w 8023bee <dhcp_release_and_stop+0x126>
return;
}
ip_addr_copy(server_ip_addr, dhcp->server_ip_addr);
8023aec: 69fb ldr r3, [r7, #28]
8023aee: 699b ldr r3, [r3, #24]
8023af0: 613b str r3, [r7, #16]
/* clean old DHCP offer */
ip_addr_set_zero_ip4(&dhcp->server_ip_addr);
8023af2: 69fb ldr r3, [r7, #28]
8023af4: 2200 movs r2, #0
8023af6: 619a str r2, [r3, #24]
ip4_addr_set_zero(&dhcp->offered_ip_addr);
8023af8: 69fb ldr r3, [r7, #28]
8023afa: 2200 movs r2, #0
8023afc: 61da str r2, [r3, #28]
ip4_addr_set_zero(&dhcp->offered_sn_mask);
8023afe: 69fb ldr r3, [r7, #28]
8023b00: 2200 movs r2, #0
8023b02: 621a str r2, [r3, #32]
ip4_addr_set_zero(&dhcp->offered_gw_addr);
8023b04: 69fb ldr r3, [r7, #28]
8023b06: 2200 movs r2, #0
8023b08: 625a str r2, [r3, #36] @ 0x24
#if LWIP_DHCP_BOOTP_FILE
ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */
dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0;
8023b0a: 69fb ldr r3, [r7, #28]
8023b0c: 2200 movs r2, #0
8023b0e: 631a str r2, [r3, #48] @ 0x30
8023b10: 69fb ldr r3, [r7, #28]
8023b12: 6b1a ldr r2, [r3, #48] @ 0x30
8023b14: 69fb ldr r3, [r7, #28]
8023b16: 62da str r2, [r3, #44] @ 0x2c
8023b18: 69fb ldr r3, [r7, #28]
8023b1a: 6ada ldr r2, [r3, #44] @ 0x2c
8023b1c: 69fb ldr r3, [r7, #28]
8023b1e: 629a str r2, [r3, #40] @ 0x28
dhcp->t1_renew_time = dhcp->t2_rebind_time = dhcp->lease_used = dhcp->t0_timeout = 0;
8023b20: 69fb ldr r3, [r7, #28]
8023b22: 2200 movs r2, #0
8023b24: 829a strh r2, [r3, #20]
8023b26: 69fb ldr r3, [r7, #28]
8023b28: 8a9a ldrh r2, [r3, #20]
8023b2a: 69fb ldr r3, [r7, #28]
8023b2c: 825a strh r2, [r3, #18]
8023b2e: 69fb ldr r3, [r7, #28]
8023b30: 8a5a ldrh r2, [r3, #18]
8023b32: 69fb ldr r3, [r7, #28]
8023b34: 821a strh r2, [r3, #16]
8023b36: 69fb ldr r3, [r7, #28]
8023b38: 8a1a ldrh r2, [r3, #16]
8023b3a: 69fb ldr r3, [r7, #28]
8023b3c: 81da strh r2, [r3, #14]
/* send release message when current IP was assigned via DHCP */
if (dhcp_supplied_address(netif)) {
8023b3e: 6878 ldr r0, [r7, #4]
8023b40: f000 fe06 bl 8024750 <dhcp_supplied_address>
8023b44: 4603 mov r3, r0
8023b46: 2b00 cmp r3, #0
8023b48: d03b beq.n 8023bc2 <dhcp_release_and_stop+0xfa>
/* create and initialize the DHCP message header */
struct pbuf *p_out;
u16_t options_out_len;
p_out = dhcp_create_msg(netif, dhcp, DHCP_RELEASE, &options_out_len);
8023b4a: f107 030e add.w r3, r7, #14
8023b4e: 2207 movs r2, #7
8023b50: 69f9 ldr r1, [r7, #28]
8023b52: 6878 ldr r0, [r7, #4]
8023b54: f000 fcf8 bl 8024548 <dhcp_create_msg>
8023b58: 61b8 str r0, [r7, #24]
if (p_out != NULL) {
8023b5a: 69bb ldr r3, [r7, #24]
8023b5c: 2b00 cmp r3, #0
8023b5e: d030 beq.n 8023bc2 <dhcp_release_and_stop+0xfa>
struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
8023b60: 69bb ldr r3, [r7, #24]
8023b62: 685b ldr r3, [r3, #4]
8023b64: 617b str r3, [r7, #20]
options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
8023b66: 89f8 ldrh r0, [r7, #14]
8023b68: 697b ldr r3, [r7, #20]
8023b6a: f103 01f0 add.w r1, r3, #240 @ 0xf0
8023b6e: 2304 movs r3, #4
8023b70: 2236 movs r2, #54 @ 0x36
8023b72: f000 f86b bl 8023c4c <dhcp_option>
8023b76: 4603 mov r3, r0
8023b78: 81fb strh r3, [r7, #14]
options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&server_ip_addr))));
8023b7a: 89fc ldrh r4, [r7, #14]
8023b7c: 697b ldr r3, [r7, #20]
8023b7e: f103 05f0 add.w r5, r3, #240 @ 0xf0
8023b82: 693b ldr r3, [r7, #16]
8023b84: 4618 mov r0, r3
8023b86: f7f6 f80c bl 8019ba2 <lwip_htonl>
8023b8a: 4603 mov r3, r0
8023b8c: 461a mov r2, r3
8023b8e: 4629 mov r1, r5
8023b90: 4620 mov r0, r4
8023b92: f000 f8e7 bl 8023d64 <dhcp_option_long>
8023b96: 4603 mov r3, r0
8023b98: 81fb strh r3, [r7, #14]
LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, dhcp->state, msg_out, DHCP_RELEASE, &options_out_len);
dhcp_option_trailer(options_out_len, msg_out->options, p_out);
8023b9a: 89f8 ldrh r0, [r7, #14]
8023b9c: 697b ldr r3, [r7, #20]
8023b9e: 33f0 adds r3, #240 @ 0xf0
8023ba0: 69ba ldr r2, [r7, #24]
8023ba2: 4619 mov r1, r3
8023ba4: f000 fda6 bl 80246f4 <dhcp_option_trailer>
udp_sendto_if(dhcp_pcb, p_out, &server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
8023ba8: 4b13 ldr r3, [pc, #76] @ (8023bf8 <dhcp_release_and_stop+0x130>)
8023baa: 6818 ldr r0, [r3, #0]
8023bac: f107 0210 add.w r2, r7, #16
8023bb0: 687b ldr r3, [r7, #4]
8023bb2: 9300 str r3, [sp, #0]
8023bb4: 2343 movs r3, #67 @ 0x43
8023bb6: 69b9 ldr r1, [r7, #24]
8023bb8: f7fe fc06 bl 80223c8 <udp_sendto_if>
pbuf_free(p_out);
8023bbc: 69b8 ldr r0, [r7, #24]
8023bbe: f7f7 fcbd bl 801b53c <pbuf_free>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n"));
}
}
/* remove IP address from interface (prevents routing from selecting this interface) */
netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
8023bc2: 4b0e ldr r3, [pc, #56] @ (8023bfc <dhcp_release_and_stop+0x134>)
8023bc4: 4a0d ldr r2, [pc, #52] @ (8023bfc <dhcp_release_and_stop+0x134>)
8023bc6: 490d ldr r1, [pc, #52] @ (8023bfc <dhcp_release_and_stop+0x134>)
8023bc8: 6878 ldr r0, [r7, #4]
8023bca: f7f6 ff6d bl 801aaa8 <netif_set_addr>
autoip_stop(netif);
dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
}
#endif /* LWIP_DHCP_AUTOIP_COOP */
dhcp_set_state(dhcp, DHCP_STATE_OFF);
8023bce: 2100 movs r1, #0
8023bd0: 69f8 ldr r0, [r7, #28]
8023bd2: f000 f820 bl 8023c16 <dhcp_set_state>
if (dhcp->pcb_allocated != 0) {
8023bd6: 69fb ldr r3, [r7, #28]
8023bd8: 791b ldrb r3, [r3, #4]
8023bda: 2b00 cmp r3, #0
8023bdc: d008 beq.n 8023bf0 <dhcp_release_and_stop+0x128>
dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
8023bde: f7fe ff83 bl 8022ae8 <dhcp_dec_pcb_refcount>
dhcp->pcb_allocated = 0;
8023be2: 69fb ldr r3, [r7, #28]
8023be4: 2200 movs r2, #0
8023be6: 711a strb r2, [r3, #4]
8023be8: e002 b.n 8023bf0 <dhcp_release_and_stop+0x128>
return;
8023bea: bf00 nop
8023bec: e000 b.n 8023bf0 <dhcp_release_and_stop+0x128>
return;
8023bee: bf00 nop
}
}
8023bf0: 3720 adds r7, #32
8023bf2: 46bd mov sp, r7
8023bf4: bdb0 pop {r4, r5, r7, pc}
8023bf6: bf00 nop
8023bf8: 2402b034 .word 0x2402b034
8023bfc: 08031ec8 .word 0x08031ec8
08023c00 <dhcp_stop>:
* This function calls dhcp_release_and_stop() internally.
* @deprecated Use dhcp_release_and_stop() instead.
*/
void
dhcp_stop(struct netif *netif)
{
8023c00: b580 push {r7, lr}
8023c02: b082 sub sp, #8
8023c04: af00 add r7, sp, #0
8023c06: 6078 str r0, [r7, #4]
dhcp_release_and_stop(netif);
8023c08: 6878 ldr r0, [r7, #4]
8023c0a: f7ff ff5d bl 8023ac8 <dhcp_release_and_stop>
}
8023c0e: bf00 nop
8023c10: 3708 adds r7, #8
8023c12: 46bd mov sp, r7
8023c14: bd80 pop {r7, pc}
08023c16 <dhcp_set_state>:
*
* If the state changed, reset the number of tries.
*/
static void
dhcp_set_state(struct dhcp *dhcp, u8_t new_state)
{
8023c16: b480 push {r7}
8023c18: b083 sub sp, #12
8023c1a: af00 add r7, sp, #0
8023c1c: 6078 str r0, [r7, #4]
8023c1e: 460b mov r3, r1
8023c20: 70fb strb r3, [r7, #3]
if (new_state != dhcp->state) {
8023c22: 687b ldr r3, [r7, #4]
8023c24: 795b ldrb r3, [r3, #5]
8023c26: 78fa ldrb r2, [r7, #3]
8023c28: 429a cmp r2, r3
8023c2a: d008 beq.n 8023c3e <dhcp_set_state+0x28>
dhcp->state = new_state;
8023c2c: 687b ldr r3, [r7, #4]
8023c2e: 78fa ldrb r2, [r7, #3]
8023c30: 715a strb r2, [r3, #5]
dhcp->tries = 0;
8023c32: 687b ldr r3, [r7, #4]
8023c34: 2200 movs r2, #0
8023c36: 719a strb r2, [r3, #6]
dhcp->request_timeout = 0;
8023c38: 687b ldr r3, [r7, #4]
8023c3a: 2200 movs r2, #0
8023c3c: 811a strh r2, [r3, #8]
}
}
8023c3e: bf00 nop
8023c40: 370c adds r7, #12
8023c42: 46bd mov sp, r7
8023c44: f85d 7b04 ldr.w r7, [sp], #4
8023c48: 4770 bx lr
...
08023c4c <dhcp_option>:
* DHCP message.
*
*/
static u16_t
dhcp_option(u16_t options_out_len, u8_t *options, u8_t option_type, u8_t option_len)
{
8023c4c: b580 push {r7, lr}
8023c4e: b082 sub sp, #8
8023c50: af00 add r7, sp, #0
8023c52: 6039 str r1, [r7, #0]
8023c54: 4611 mov r1, r2
8023c56: 461a mov r2, r3
8023c58: 4603 mov r3, r0
8023c5a: 80fb strh r3, [r7, #6]
8023c5c: 460b mov r3, r1
8023c5e: 717b strb r3, [r7, #5]
8023c60: 4613 mov r3, r2
8023c62: 713b strb r3, [r7, #4]
LWIP_ASSERT("dhcp_option: options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN);
8023c64: 88fa ldrh r2, [r7, #6]
8023c66: 793b ldrb r3, [r7, #4]
8023c68: 4413 add r3, r2
8023c6a: 3302 adds r3, #2
8023c6c: 2b44 cmp r3, #68 @ 0x44
8023c6e: d906 bls.n 8023c7e <dhcp_option+0x32>
8023c70: 4b0d ldr r3, [pc, #52] @ (8023ca8 <dhcp_option+0x5c>)
8023c72: f240 529a movw r2, #1434 @ 0x59a
8023c76: 490d ldr r1, [pc, #52] @ (8023cac <dhcp_option+0x60>)
8023c78: 480d ldr r0, [pc, #52] @ (8023cb0 <dhcp_option+0x64>)
8023c7a: f006 fed7 bl 802aa2c <iprintf>
options[options_out_len++] = option_type;
8023c7e: 88fb ldrh r3, [r7, #6]
8023c80: 1c5a adds r2, r3, #1
8023c82: 80fa strh r2, [r7, #6]
8023c84: 461a mov r2, r3
8023c86: 683b ldr r3, [r7, #0]
8023c88: 4413 add r3, r2
8023c8a: 797a ldrb r2, [r7, #5]
8023c8c: 701a strb r2, [r3, #0]
options[options_out_len++] = option_len;
8023c8e: 88fb ldrh r3, [r7, #6]
8023c90: 1c5a adds r2, r3, #1
8023c92: 80fa strh r2, [r7, #6]
8023c94: 461a mov r2, r3
8023c96: 683b ldr r3, [r7, #0]
8023c98: 4413 add r3, r2
8023c9a: 793a ldrb r2, [r7, #4]
8023c9c: 701a strb r2, [r3, #0]
return options_out_len;
8023c9e: 88fb ldrh r3, [r7, #6]
}
8023ca0: 4618 mov r0, r3
8023ca2: 3708 adds r7, #8
8023ca4: 46bd mov sp, r7
8023ca6: bd80 pop {r7, pc}
8023ca8: 0803109c .word 0x0803109c
8023cac: 08031230 .word 0x08031230
8023cb0: 080310fc .word 0x080310fc
08023cb4 <dhcp_option_byte>:
* Concatenate a single byte to the outgoing DHCP message.
*
*/
static u16_t
dhcp_option_byte(u16_t options_out_len, u8_t *options, u8_t value)
{
8023cb4: b580 push {r7, lr}
8023cb6: b082 sub sp, #8
8023cb8: af00 add r7, sp, #0
8023cba: 4603 mov r3, r0
8023cbc: 6039 str r1, [r7, #0]
8023cbe: 80fb strh r3, [r7, #6]
8023cc0: 4613 mov r3, r2
8023cc2: 717b strb r3, [r7, #5]
LWIP_ASSERT("dhcp_option_byte: options_out_len < DHCP_OPTIONS_LEN", options_out_len < DHCP_OPTIONS_LEN);
8023cc4: 88fb ldrh r3, [r7, #6]
8023cc6: 2b43 cmp r3, #67 @ 0x43
8023cc8: d906 bls.n 8023cd8 <dhcp_option_byte+0x24>
8023cca: 4b0a ldr r3, [pc, #40] @ (8023cf4 <dhcp_option_byte+0x40>)
8023ccc: f240 52a6 movw r2, #1446 @ 0x5a6
8023cd0: 4909 ldr r1, [pc, #36] @ (8023cf8 <dhcp_option_byte+0x44>)
8023cd2: 480a ldr r0, [pc, #40] @ (8023cfc <dhcp_option_byte+0x48>)
8023cd4: f006 feaa bl 802aa2c <iprintf>
options[options_out_len++] = value;
8023cd8: 88fb ldrh r3, [r7, #6]
8023cda: 1c5a adds r2, r3, #1
8023cdc: 80fa strh r2, [r7, #6]
8023cde: 461a mov r2, r3
8023ce0: 683b ldr r3, [r7, #0]
8023ce2: 4413 add r3, r2
8023ce4: 797a ldrb r2, [r7, #5]
8023ce6: 701a strb r2, [r3, #0]
return options_out_len;
8023ce8: 88fb ldrh r3, [r7, #6]
}
8023cea: 4618 mov r0, r3
8023cec: 3708 adds r7, #8
8023cee: 46bd mov sp, r7
8023cf0: bd80 pop {r7, pc}
8023cf2: bf00 nop
8023cf4: 0803109c .word 0x0803109c
8023cf8: 08031274 .word 0x08031274
8023cfc: 080310fc .word 0x080310fc
08023d00 <dhcp_option_short>:
static u16_t
dhcp_option_short(u16_t options_out_len, u8_t *options, u16_t value)
{
8023d00: b580 push {r7, lr}
8023d02: b082 sub sp, #8
8023d04: af00 add r7, sp, #0
8023d06: 4603 mov r3, r0
8023d08: 6039 str r1, [r7, #0]
8023d0a: 80fb strh r3, [r7, #6]
8023d0c: 4613 mov r3, r2
8023d0e: 80bb strh r3, [r7, #4]
LWIP_ASSERT("dhcp_option_short: options_out_len + 2 <= DHCP_OPTIONS_LEN", options_out_len + 2U <= DHCP_OPTIONS_LEN);
8023d10: 88fb ldrh r3, [r7, #6]
8023d12: 3302 adds r3, #2
8023d14: 2b44 cmp r3, #68 @ 0x44
8023d16: d906 bls.n 8023d26 <dhcp_option_short+0x26>
8023d18: 4b0f ldr r3, [pc, #60] @ (8023d58 <dhcp_option_short+0x58>)
8023d1a: f240 52ae movw r2, #1454 @ 0x5ae
8023d1e: 490f ldr r1, [pc, #60] @ (8023d5c <dhcp_option_short+0x5c>)
8023d20: 480f ldr r0, [pc, #60] @ (8023d60 <dhcp_option_short+0x60>)
8023d22: f006 fe83 bl 802aa2c <iprintf>
options[options_out_len++] = (u8_t)((value & 0xff00U) >> 8);
8023d26: 88bb ldrh r3, [r7, #4]
8023d28: 0a1b lsrs r3, r3, #8
8023d2a: b29a uxth r2, r3
8023d2c: 88fb ldrh r3, [r7, #6]
8023d2e: 1c59 adds r1, r3, #1
8023d30: 80f9 strh r1, [r7, #6]
8023d32: 4619 mov r1, r3
8023d34: 683b ldr r3, [r7, #0]
8023d36: 440b add r3, r1
8023d38: b2d2 uxtb r2, r2
8023d3a: 701a strb r2, [r3, #0]
options[options_out_len++] = (u8_t) (value & 0x00ffU);
8023d3c: 88fb ldrh r3, [r7, #6]
8023d3e: 1c5a adds r2, r3, #1
8023d40: 80fa strh r2, [r7, #6]
8023d42: 461a mov r2, r3
8023d44: 683b ldr r3, [r7, #0]
8023d46: 4413 add r3, r2
8023d48: 88ba ldrh r2, [r7, #4]
8023d4a: b2d2 uxtb r2, r2
8023d4c: 701a strb r2, [r3, #0]
return options_out_len;
8023d4e: 88fb ldrh r3, [r7, #6]
}
8023d50: 4618 mov r0, r3
8023d52: 3708 adds r7, #8
8023d54: 46bd mov sp, r7
8023d56: bd80 pop {r7, pc}
8023d58: 0803109c .word 0x0803109c
8023d5c: 080312ac .word 0x080312ac
8023d60: 080310fc .word 0x080310fc
08023d64 <dhcp_option_long>:
static u16_t
dhcp_option_long(u16_t options_out_len, u8_t *options, u32_t value)
{
8023d64: b580 push {r7, lr}
8023d66: b084 sub sp, #16
8023d68: af00 add r7, sp, #0
8023d6a: 4603 mov r3, r0
8023d6c: 60b9 str r1, [r7, #8]
8023d6e: 607a str r2, [r7, #4]
8023d70: 81fb strh r3, [r7, #14]
LWIP_ASSERT("dhcp_option_long: options_out_len + 4 <= DHCP_OPTIONS_LEN", options_out_len + 4U <= DHCP_OPTIONS_LEN);
8023d72: 89fb ldrh r3, [r7, #14]
8023d74: 3304 adds r3, #4
8023d76: 2b44 cmp r3, #68 @ 0x44
8023d78: d906 bls.n 8023d88 <dhcp_option_long+0x24>
8023d7a: 4b19 ldr r3, [pc, #100] @ (8023de0 <dhcp_option_long+0x7c>)
8023d7c: f240 52b7 movw r2, #1463 @ 0x5b7
8023d80: 4918 ldr r1, [pc, #96] @ (8023de4 <dhcp_option_long+0x80>)
8023d82: 4819 ldr r0, [pc, #100] @ (8023de8 <dhcp_option_long+0x84>)
8023d84: f006 fe52 bl 802aa2c <iprintf>
options[options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24);
8023d88: 687b ldr r3, [r7, #4]
8023d8a: 0e1a lsrs r2, r3, #24
8023d8c: 89fb ldrh r3, [r7, #14]
8023d8e: 1c59 adds r1, r3, #1
8023d90: 81f9 strh r1, [r7, #14]
8023d92: 4619 mov r1, r3
8023d94: 68bb ldr r3, [r7, #8]
8023d96: 440b add r3, r1
8023d98: b2d2 uxtb r2, r2
8023d9a: 701a strb r2, [r3, #0]
options[options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16);
8023d9c: 687b ldr r3, [r7, #4]
8023d9e: 0c1a lsrs r2, r3, #16
8023da0: 89fb ldrh r3, [r7, #14]
8023da2: 1c59 adds r1, r3, #1
8023da4: 81f9 strh r1, [r7, #14]
8023da6: 4619 mov r1, r3
8023da8: 68bb ldr r3, [r7, #8]
8023daa: 440b add r3, r1
8023dac: b2d2 uxtb r2, r2
8023dae: 701a strb r2, [r3, #0]
options[options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8);
8023db0: 687b ldr r3, [r7, #4]
8023db2: 0a1a lsrs r2, r3, #8
8023db4: 89fb ldrh r3, [r7, #14]
8023db6: 1c59 adds r1, r3, #1
8023db8: 81f9 strh r1, [r7, #14]
8023dba: 4619 mov r1, r3
8023dbc: 68bb ldr r3, [r7, #8]
8023dbe: 440b add r3, r1
8023dc0: b2d2 uxtb r2, r2
8023dc2: 701a strb r2, [r3, #0]
options[options_out_len++] = (u8_t)((value & 0x000000ffUL));
8023dc4: 89fb ldrh r3, [r7, #14]
8023dc6: 1c5a adds r2, r3, #1
8023dc8: 81fa strh r2, [r7, #14]
8023dca: 461a mov r2, r3
8023dcc: 68bb ldr r3, [r7, #8]
8023dce: 4413 add r3, r2
8023dd0: 687a ldr r2, [r7, #4]
8023dd2: b2d2 uxtb r2, r2
8023dd4: 701a strb r2, [r3, #0]
return options_out_len;
8023dd6: 89fb ldrh r3, [r7, #14]
}
8023dd8: 4618 mov r0, r3
8023dda: 3710 adds r7, #16
8023ddc: 46bd mov sp, r7
8023dde: bd80 pop {r7, pc}
8023de0: 0803109c .word 0x0803109c
8023de4: 080312e8 .word 0x080312e8
8023de8: 080310fc .word 0x080310fc
08023dec <dhcp_parse_reply>:
* use that further on.
*
*/
static err_t
dhcp_parse_reply(struct pbuf *p, struct dhcp *dhcp)
{
8023dec: b580 push {r7, lr}
8023dee: b092 sub sp, #72 @ 0x48
8023df0: af00 add r7, sp, #0
8023df2: 6078 str r0, [r7, #4]
8023df4: 6039 str r1, [r7, #0]
u16_t offset;
u16_t offset_max;
u16_t options_idx;
u16_t options_idx_max;
struct pbuf *q;
int parse_file_as_options = 0;
8023df6: 2300 movs r3, #0
8023df8: 633b str r3, [r7, #48] @ 0x30
int parse_sname_as_options = 0;
8023dfa: 2300 movs r3, #0
8023dfc: 62fb str r3, [r7, #44] @ 0x2c
#endif
LWIP_UNUSED_ARG(dhcp);
/* clear received options */
dhcp_clear_all_options(dhcp);
8023dfe: 2208 movs r2, #8
8023e00: 2100 movs r1, #0
8023e02: 48b8 ldr r0, [pc, #736] @ (80240e4 <dhcp_parse_reply+0x2f8>)
8023e04: f006 ffa4 bl 802ad50 <memset>
/* check that beginning of dhcp_msg (up to and including chaddr) is in first pbuf */
if (p->len < DHCP_SNAME_OFS) {
8023e08: 687b ldr r3, [r7, #4]
8023e0a: 895b ldrh r3, [r3, #10]
8023e0c: 2b2b cmp r3, #43 @ 0x2b
8023e0e: d802 bhi.n 8023e16 <dhcp_parse_reply+0x2a>
return ERR_BUF;
8023e10: f06f 0301 mvn.w r3, #1
8023e14: e2b8 b.n 8024388 <dhcp_parse_reply+0x59c>
}
msg_in = (struct dhcp_msg *)p->payload;
8023e16: 687b ldr r3, [r7, #4]
8023e18: 685b ldr r3, [r3, #4]
8023e1a: 61fb str r3, [r7, #28]
#endif /* LWIP_DHCP_BOOTP_FILE */
/* parse options */
/* start with options field */
options_idx = DHCP_OPTIONS_OFS;
8023e1c: 23f0 movs r3, #240 @ 0xf0
8023e1e: 87bb strh r3, [r7, #60] @ 0x3c
/* parse options to the end of the received packet */
options_idx_max = p->tot_len;
8023e20: 687b ldr r3, [r7, #4]
8023e22: 891b ldrh r3, [r3, #8]
8023e24: 877b strh r3, [r7, #58] @ 0x3a
again:
q = p;
8023e26: 687b ldr r3, [r7, #4]
8023e28: 637b str r3, [r7, #52] @ 0x34
while ((q != NULL) && (options_idx >= q->len)) {
8023e2a: e00c b.n 8023e46 <dhcp_parse_reply+0x5a>
options_idx = (u16_t)(options_idx - q->len);
8023e2c: 6b7b ldr r3, [r7, #52] @ 0x34
8023e2e: 895b ldrh r3, [r3, #10]
8023e30: 8fba ldrh r2, [r7, #60] @ 0x3c
8023e32: 1ad3 subs r3, r2, r3
8023e34: 87bb strh r3, [r7, #60] @ 0x3c
options_idx_max = (u16_t)(options_idx_max - q->len);
8023e36: 6b7b ldr r3, [r7, #52] @ 0x34
8023e38: 895b ldrh r3, [r3, #10]
8023e3a: 8f7a ldrh r2, [r7, #58] @ 0x3a
8023e3c: 1ad3 subs r3, r2, r3
8023e3e: 877b strh r3, [r7, #58] @ 0x3a
q = q->next;
8023e40: 6b7b ldr r3, [r7, #52] @ 0x34
8023e42: 681b ldr r3, [r3, #0]
8023e44: 637b str r3, [r7, #52] @ 0x34
while ((q != NULL) && (options_idx >= q->len)) {
8023e46: 6b7b ldr r3, [r7, #52] @ 0x34
8023e48: 2b00 cmp r3, #0
8023e4a: d004 beq.n 8023e56 <dhcp_parse_reply+0x6a>
8023e4c: 6b7b ldr r3, [r7, #52] @ 0x34
8023e4e: 895b ldrh r3, [r3, #10]
8023e50: 8fba ldrh r2, [r7, #60] @ 0x3c
8023e52: 429a cmp r2, r3
8023e54: d2ea bcs.n 8023e2c <dhcp_parse_reply+0x40>
}
if (q == NULL) {
8023e56: 6b7b ldr r3, [r7, #52] @ 0x34
8023e58: 2b00 cmp r3, #0
8023e5a: d102 bne.n 8023e62 <dhcp_parse_reply+0x76>
return ERR_BUF;
8023e5c: f06f 0301 mvn.w r3, #1
8023e60: e292 b.n 8024388 <dhcp_parse_reply+0x59c>
}
offset = options_idx;
8023e62: 8fbb ldrh r3, [r7, #60] @ 0x3c
8023e64: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
offset_max = options_idx_max;
8023e68: 8f7b ldrh r3, [r7, #58] @ 0x3a
8023e6a: 87fb strh r3, [r7, #62] @ 0x3e
options = (u8_t *)q->payload;
8023e6c: 6b7b ldr r3, [r7, #52] @ 0x34
8023e6e: 685b ldr r3, [r3, #4]
8023e70: 643b str r3, [r7, #64] @ 0x40
/* at least 1 byte to read and no end marker, then at least 3 bytes to read? */
while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
8023e72: e247 b.n 8024304 <dhcp_parse_reply+0x518>
u8_t op = options[offset];
8023e74: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8023e78: 6c3a ldr r2, [r7, #64] @ 0x40
8023e7a: 4413 add r3, r2
8023e7c: 781b ldrb r3, [r3, #0]
8023e7e: 76fb strb r3, [r7, #27]
u8_t len;
u8_t decode_len = 0;
8023e80: 2300 movs r3, #0
8023e82: f887 302a strb.w r3, [r7, #42] @ 0x2a
int decode_idx = -1;
8023e86: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8023e8a: 627b str r3, [r7, #36] @ 0x24
u16_t val_offset = (u16_t)(offset + 2);
8023e8c: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8023e90: 3302 adds r3, #2
8023e92: 847b strh r3, [r7, #34] @ 0x22
if (val_offset < offset) {
8023e94: 8c7a ldrh r2, [r7, #34] @ 0x22
8023e96: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8023e9a: 429a cmp r2, r3
8023e9c: d202 bcs.n 8023ea4 <dhcp_parse_reply+0xb8>
/* overflow */
return ERR_BUF;
8023e9e: f06f 0301 mvn.w r3, #1
8023ea2: e271 b.n 8024388 <dhcp_parse_reply+0x59c>
}
/* len byte might be in the next pbuf */
if ((offset + 1) < q->len) {
8023ea4: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8023ea8: 3301 adds r3, #1
8023eaa: 6b7a ldr r2, [r7, #52] @ 0x34
8023eac: 8952 ldrh r2, [r2, #10]
8023eae: 4293 cmp r3, r2
8023eb0: da08 bge.n 8023ec4 <dhcp_parse_reply+0xd8>
len = options[offset + 1];
8023eb2: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8023eb6: 3301 adds r3, #1
8023eb8: 6c3a ldr r2, [r7, #64] @ 0x40
8023eba: 4413 add r3, r2
8023ebc: 781b ldrb r3, [r3, #0]
8023ebe: f887 302b strb.w r3, [r7, #43] @ 0x2b
8023ec2: e00b b.n 8023edc <dhcp_parse_reply+0xf0>
} else {
len = (q->next != NULL ? ((u8_t *)q->next->payload)[0] : 0);
8023ec4: 6b7b ldr r3, [r7, #52] @ 0x34
8023ec6: 681b ldr r3, [r3, #0]
8023ec8: 2b00 cmp r3, #0
8023eca: d004 beq.n 8023ed6 <dhcp_parse_reply+0xea>
8023ecc: 6b7b ldr r3, [r7, #52] @ 0x34
8023ece: 681b ldr r3, [r3, #0]
8023ed0: 685b ldr r3, [r3, #4]
8023ed2: 781b ldrb r3, [r3, #0]
8023ed4: e000 b.n 8023ed8 <dhcp_parse_reply+0xec>
8023ed6: 2300 movs r3, #0
8023ed8: f887 302b strb.w r3, [r7, #43] @ 0x2b
}
/* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */
decode_len = len;
8023edc: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8023ee0: f887 302a strb.w r3, [r7, #42] @ 0x2a
switch (op) {
8023ee4: 7efb ldrb r3, [r7, #27]
8023ee6: 2b3b cmp r3, #59 @ 0x3b
8023ee8: f200 812c bhi.w 8024144 <dhcp_parse_reply+0x358>
8023eec: a201 add r2, pc, #4 @ (adr r2, 8023ef4 <dhcp_parse_reply+0x108>)
8023eee: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8023ef2: bf00 nop
8023ef4: 08023fe5 .word 0x08023fe5
8023ef8: 08023ff5 .word 0x08023ff5
8023efc: 08024145 .word 0x08024145
8023f00: 08024017 .word 0x08024017
8023f04: 08024145 .word 0x08024145
8023f08: 08024145 .word 0x08024145
8023f0c: 08024145 .word 0x08024145
8023f10: 08024145 .word 0x08024145
8023f14: 08024145 .word 0x08024145
8023f18: 08024145 .word 0x08024145
8023f1c: 08024145 .word 0x08024145
8023f20: 08024145 .word 0x08024145
8023f24: 08024145 .word 0x08024145
8023f28: 08024145 .word 0x08024145
8023f2c: 08024145 .word 0x08024145
8023f30: 08024145 .word 0x08024145
8023f34: 08024145 .word 0x08024145
8023f38: 08024145 .word 0x08024145
8023f3c: 08024145 .word 0x08024145
8023f40: 08024145 .word 0x08024145
8023f44: 08024145 .word 0x08024145
8023f48: 08024145 .word 0x08024145
8023f4c: 08024145 .word 0x08024145
8023f50: 08024145 .word 0x08024145
8023f54: 08024145 .word 0x08024145
8023f58: 08024145 .word 0x08024145
8023f5c: 08024145 .word 0x08024145
8023f60: 08024145 .word 0x08024145
8023f64: 08024145 .word 0x08024145
8023f68: 08024145 .word 0x08024145
8023f6c: 08024145 .word 0x08024145
8023f70: 08024145 .word 0x08024145
8023f74: 08024145 .word 0x08024145
8023f78: 08024145 .word 0x08024145
8023f7c: 08024145 .word 0x08024145
8023f80: 08024145 .word 0x08024145
8023f84: 08024145 .word 0x08024145
8023f88: 08024145 .word 0x08024145
8023f8c: 08024145 .word 0x08024145
8023f90: 08024145 .word 0x08024145
8023f94: 08024145 .word 0x08024145
8023f98: 08024145 .word 0x08024145
8023f9c: 08024145 .word 0x08024145
8023fa0: 08024145 .word 0x08024145
8023fa4: 08024145 .word 0x08024145
8023fa8: 08024145 .word 0x08024145
8023fac: 08024145 .word 0x08024145
8023fb0: 08024145 .word 0x08024145
8023fb4: 08024145 .word 0x08024145
8023fb8: 08024145 .word 0x08024145
8023fbc: 08024145 .word 0x08024145
8023fc0: 08024043 .word 0x08024043
8023fc4: 08024065 .word 0x08024065
8023fc8: 080240a1 .word 0x080240a1
8023fcc: 080240c3 .word 0x080240c3
8023fd0: 08024145 .word 0x08024145
8023fd4: 08024145 .word 0x08024145
8023fd8: 08024145 .word 0x08024145
8023fdc: 08024101 .word 0x08024101
8023fe0: 08024123 .word 0x08024123
/* case(DHCP_OPTION_END): handled above */
case (DHCP_OPTION_PAD):
/* special option: no len encoded */
decode_len = len = 0;
8023fe4: 2300 movs r3, #0
8023fe6: f887 302b strb.w r3, [r7, #43] @ 0x2b
8023fea: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8023fee: f887 302a strb.w r3, [r7, #42] @ 0x2a
/* will be increased below */
break;
8023ff2: e0ab b.n 802414c <dhcp_parse_reply+0x360>
case (DHCP_OPTION_SUBNET_MASK):
LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
8023ff4: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8023ff8: 2b04 cmp r3, #4
8023ffa: d009 beq.n 8024010 <dhcp_parse_reply+0x224>
8023ffc: 4b3a ldr r3, [pc, #232] @ (80240e8 <dhcp_parse_reply+0x2fc>)
8023ffe: f240 622e movw r2, #1582 @ 0x62e
8024002: 493a ldr r1, [pc, #232] @ (80240ec <dhcp_parse_reply+0x300>)
8024004: 483a ldr r0, [pc, #232] @ (80240f0 <dhcp_parse_reply+0x304>)
8024006: f006 fd11 bl 802aa2c <iprintf>
802400a: f06f 0305 mvn.w r3, #5
802400e: e1bb b.n 8024388 <dhcp_parse_reply+0x59c>
decode_idx = DHCP_OPTION_IDX_SUBNET_MASK;
8024010: 2306 movs r3, #6
8024012: 627b str r3, [r7, #36] @ 0x24
break;
8024014: e09a b.n 802414c <dhcp_parse_reply+0x360>
case (DHCP_OPTION_ROUTER):
decode_len = 4; /* only copy the first given router */
8024016: 2304 movs r3, #4
8024018: f887 302a strb.w r3, [r7, #42] @ 0x2a
LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
802401c: f897 202b ldrb.w r2, [r7, #43] @ 0x2b
8024020: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
8024024: 429a cmp r2, r3
8024026: d209 bcs.n 802403c <dhcp_parse_reply+0x250>
8024028: 4b2f ldr r3, [pc, #188] @ (80240e8 <dhcp_parse_reply+0x2fc>)
802402a: f240 6233 movw r2, #1587 @ 0x633
802402e: 4931 ldr r1, [pc, #196] @ (80240f4 <dhcp_parse_reply+0x308>)
8024030: 482f ldr r0, [pc, #188] @ (80240f0 <dhcp_parse_reply+0x304>)
8024032: f006 fcfb bl 802aa2c <iprintf>
8024036: f06f 0305 mvn.w r3, #5
802403a: e1a5 b.n 8024388 <dhcp_parse_reply+0x59c>
decode_idx = DHCP_OPTION_IDX_ROUTER;
802403c: 2307 movs r3, #7
802403e: 627b str r3, [r7, #36] @ 0x24
break;
8024040: e084 b.n 802414c <dhcp_parse_reply+0x360>
LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
decode_idx = DHCP_OPTION_IDX_DNS_SERVER;
break;
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
case (DHCP_OPTION_LEASE_TIME):
LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
8024042: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8024046: 2b04 cmp r3, #4
8024048: d009 beq.n 802405e <dhcp_parse_reply+0x272>
802404a: 4b27 ldr r3, [pc, #156] @ (80240e8 <dhcp_parse_reply+0x2fc>)
802404c: f240 6241 movw r2, #1601 @ 0x641
8024050: 4926 ldr r1, [pc, #152] @ (80240ec <dhcp_parse_reply+0x300>)
8024052: 4827 ldr r0, [pc, #156] @ (80240f0 <dhcp_parse_reply+0x304>)
8024054: f006 fcea bl 802aa2c <iprintf>
8024058: f06f 0305 mvn.w r3, #5
802405c: e194 b.n 8024388 <dhcp_parse_reply+0x59c>
decode_idx = DHCP_OPTION_IDX_LEASE_TIME;
802405e: 2303 movs r3, #3
8024060: 627b str r3, [r7, #36] @ 0x24
break;
8024062: e073 b.n 802414c <dhcp_parse_reply+0x360>
LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
decode_idx = DHCP_OPTION_IDX_NTP_SERVER;
break;
#endif /* LWIP_DHCP_GET_NTP_SRV*/
case (DHCP_OPTION_OVERLOAD):
LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
8024064: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8024068: 2b01 cmp r3, #1
802406a: d009 beq.n 8024080 <dhcp_parse_reply+0x294>
802406c: 4b1e ldr r3, [pc, #120] @ (80240e8 <dhcp_parse_reply+0x2fc>)
802406e: f240 624f movw r2, #1615 @ 0x64f
8024072: 4921 ldr r1, [pc, #132] @ (80240f8 <dhcp_parse_reply+0x30c>)
8024074: 481e ldr r0, [pc, #120] @ (80240f0 <dhcp_parse_reply+0x304>)
8024076: f006 fcd9 bl 802aa2c <iprintf>
802407a: f06f 0305 mvn.w r3, #5
802407e: e183 b.n 8024388 <dhcp_parse_reply+0x59c>
/* decode overload only in options, not in file/sname: invalid packet */
LWIP_ERROR("overload in file/sname", options_idx == DHCP_OPTIONS_OFS, return ERR_VAL;);
8024080: 8fbb ldrh r3, [r7, #60] @ 0x3c
8024082: 2bf0 cmp r3, #240 @ 0xf0
8024084: d009 beq.n 802409a <dhcp_parse_reply+0x2ae>
8024086: 4b18 ldr r3, [pc, #96] @ (80240e8 <dhcp_parse_reply+0x2fc>)
8024088: f240 6251 movw r2, #1617 @ 0x651
802408c: 491b ldr r1, [pc, #108] @ (80240fc <dhcp_parse_reply+0x310>)
802408e: 4818 ldr r0, [pc, #96] @ (80240f0 <dhcp_parse_reply+0x304>)
8024090: f006 fccc bl 802aa2c <iprintf>
8024094: f06f 0305 mvn.w r3, #5
8024098: e176 b.n 8024388 <dhcp_parse_reply+0x59c>
decode_idx = DHCP_OPTION_IDX_OVERLOAD;
802409a: 2300 movs r3, #0
802409c: 627b str r3, [r7, #36] @ 0x24
break;
802409e: e055 b.n 802414c <dhcp_parse_reply+0x360>
case (DHCP_OPTION_MESSAGE_TYPE):
LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
80240a0: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
80240a4: 2b01 cmp r3, #1
80240a6: d009 beq.n 80240bc <dhcp_parse_reply+0x2d0>
80240a8: 4b0f ldr r3, [pc, #60] @ (80240e8 <dhcp_parse_reply+0x2fc>)
80240aa: f240 6255 movw r2, #1621 @ 0x655
80240ae: 4912 ldr r1, [pc, #72] @ (80240f8 <dhcp_parse_reply+0x30c>)
80240b0: 480f ldr r0, [pc, #60] @ (80240f0 <dhcp_parse_reply+0x304>)
80240b2: f006 fcbb bl 802aa2c <iprintf>
80240b6: f06f 0305 mvn.w r3, #5
80240ba: e165 b.n 8024388 <dhcp_parse_reply+0x59c>
decode_idx = DHCP_OPTION_IDX_MSG_TYPE;
80240bc: 2301 movs r3, #1
80240be: 627b str r3, [r7, #36] @ 0x24
break;
80240c0: e044 b.n 802414c <dhcp_parse_reply+0x360>
case (DHCP_OPTION_SERVER_ID):
LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
80240c2: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
80240c6: 2b04 cmp r3, #4
80240c8: d009 beq.n 80240de <dhcp_parse_reply+0x2f2>
80240ca: 4b07 ldr r3, [pc, #28] @ (80240e8 <dhcp_parse_reply+0x2fc>)
80240cc: f240 6259 movw r2, #1625 @ 0x659
80240d0: 4906 ldr r1, [pc, #24] @ (80240ec <dhcp_parse_reply+0x300>)
80240d2: 4807 ldr r0, [pc, #28] @ (80240f0 <dhcp_parse_reply+0x304>)
80240d4: f006 fcaa bl 802aa2c <iprintf>
80240d8: f06f 0305 mvn.w r3, #5
80240dc: e154 b.n 8024388 <dhcp_parse_reply+0x59c>
decode_idx = DHCP_OPTION_IDX_SERVER_ID;
80240de: 2302 movs r3, #2
80240e0: 627b str r3, [r7, #36] @ 0x24
break;
80240e2: e033 b.n 802414c <dhcp_parse_reply+0x360>
80240e4: 2402b02c .word 0x2402b02c
80240e8: 0803109c .word 0x0803109c
80240ec: 08031324 .word 0x08031324
80240f0: 080310fc .word 0x080310fc
80240f4: 08031330 .word 0x08031330
80240f8: 08031344 .word 0x08031344
80240fc: 08031350 .word 0x08031350
case (DHCP_OPTION_T1):
LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
8024100: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8024104: 2b04 cmp r3, #4
8024106: d009 beq.n 802411c <dhcp_parse_reply+0x330>
8024108: 4ba1 ldr r3, [pc, #644] @ (8024390 <dhcp_parse_reply+0x5a4>)
802410a: f240 625d movw r2, #1629 @ 0x65d
802410e: 49a1 ldr r1, [pc, #644] @ (8024394 <dhcp_parse_reply+0x5a8>)
8024110: 48a1 ldr r0, [pc, #644] @ (8024398 <dhcp_parse_reply+0x5ac>)
8024112: f006 fc8b bl 802aa2c <iprintf>
8024116: f06f 0305 mvn.w r3, #5
802411a: e135 b.n 8024388 <dhcp_parse_reply+0x59c>
decode_idx = DHCP_OPTION_IDX_T1;
802411c: 2304 movs r3, #4
802411e: 627b str r3, [r7, #36] @ 0x24
break;
8024120: e014 b.n 802414c <dhcp_parse_reply+0x360>
case (DHCP_OPTION_T2):
LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
8024122: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8024126: 2b04 cmp r3, #4
8024128: d009 beq.n 802413e <dhcp_parse_reply+0x352>
802412a: 4b99 ldr r3, [pc, #612] @ (8024390 <dhcp_parse_reply+0x5a4>)
802412c: f240 6261 movw r2, #1633 @ 0x661
8024130: 4998 ldr r1, [pc, #608] @ (8024394 <dhcp_parse_reply+0x5a8>)
8024132: 4899 ldr r0, [pc, #612] @ (8024398 <dhcp_parse_reply+0x5ac>)
8024134: f006 fc7a bl 802aa2c <iprintf>
8024138: f06f 0305 mvn.w r3, #5
802413c: e124 b.n 8024388 <dhcp_parse_reply+0x59c>
decode_idx = DHCP_OPTION_IDX_T2;
802413e: 2305 movs r3, #5
8024140: 627b str r3, [r7, #36] @ 0x24
break;
8024142: e003 b.n 802414c <dhcp_parse_reply+0x360>
default:
decode_len = 0;
8024144: 2300 movs r3, #0
8024146: f887 302a strb.w r3, [r7, #42] @ 0x2a
LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", (u16_t)op));
LWIP_HOOK_DHCP_PARSE_OPTION(ip_current_netif(), dhcp, dhcp->state, msg_in,
dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE) ? (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE) : 0,
op, len, q, val_offset);
break;
802414a: bf00 nop
}
if (op == DHCP_OPTION_PAD) {
802414c: 7efb ldrb r3, [r7, #27]
802414e: 2b00 cmp r3, #0
8024150: d105 bne.n 802415e <dhcp_parse_reply+0x372>
offset++;
8024152: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8024156: 3301 adds r3, #1
8024158: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
802415c: e0a4 b.n 80242a8 <dhcp_parse_reply+0x4bc>
} else {
if (offset + len + 2 > 0xFFFF) {
802415e: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
8024162: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
8024166: 4413 add r3, r2
8024168: f64f 72fd movw r2, #65533 @ 0xfffd
802416c: 4293 cmp r3, r2
802416e: dd02 ble.n 8024176 <dhcp_parse_reply+0x38a>
/* overflow */
return ERR_BUF;
8024170: f06f 0301 mvn.w r3, #1
8024174: e108 b.n 8024388 <dhcp_parse_reply+0x59c>
}
offset = (u16_t)(offset + len + 2);
8024176: f897 302b ldrb.w r3, [r7, #43] @ 0x2b
802417a: b29a uxth r2, r3
802417c: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8024180: 4413 add r3, r2
8024182: b29b uxth r3, r3
8024184: 3302 adds r3, #2
8024186: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
if (decode_len > 0) {
802418a: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
802418e: 2b00 cmp r3, #0
8024190: f000 808a beq.w 80242a8 <dhcp_parse_reply+0x4bc>
u32_t value = 0;
8024194: 2300 movs r3, #0
8024196: 60fb str r3, [r7, #12]
u16_t copy_len;
decode_next:
LWIP_ASSERT("check decode_idx", decode_idx >= 0 && decode_idx < DHCP_OPTION_IDX_MAX);
8024198: 6a7b ldr r3, [r7, #36] @ 0x24
802419a: 2b00 cmp r3, #0
802419c: db02 blt.n 80241a4 <dhcp_parse_reply+0x3b8>
802419e: 6a7b ldr r3, [r7, #36] @ 0x24
80241a0: 2b07 cmp r3, #7
80241a2: dd06 ble.n 80241b2 <dhcp_parse_reply+0x3c6>
80241a4: 4b7a ldr r3, [pc, #488] @ (8024390 <dhcp_parse_reply+0x5a4>)
80241a6: f44f 62cf mov.w r2, #1656 @ 0x678
80241aa: 497c ldr r1, [pc, #496] @ (802439c <dhcp_parse_reply+0x5b0>)
80241ac: 487a ldr r0, [pc, #488] @ (8024398 <dhcp_parse_reply+0x5ac>)
80241ae: f006 fc3d bl 802aa2c <iprintf>
if (!dhcp_option_given(dhcp, decode_idx)) {
80241b2: 4a7b ldr r2, [pc, #492] @ (80243a0 <dhcp_parse_reply+0x5b4>)
80241b4: 6a7b ldr r3, [r7, #36] @ 0x24
80241b6: 4413 add r3, r2
80241b8: 781b ldrb r3, [r3, #0]
80241ba: 2b00 cmp r3, #0
80241bc: d174 bne.n 80242a8 <dhcp_parse_reply+0x4bc>
copy_len = LWIP_MIN(decode_len, 4);
80241be: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
80241c2: 2b04 cmp r3, #4
80241c4: bf28 it cs
80241c6: 2304 movcs r3, #4
80241c8: b2db uxtb r3, r3
80241ca: 833b strh r3, [r7, #24]
if (pbuf_copy_partial(q, &value, copy_len, val_offset) != copy_len) {
80241cc: 8c7b ldrh r3, [r7, #34] @ 0x22
80241ce: 8b3a ldrh r2, [r7, #24]
80241d0: f107 010c add.w r1, r7, #12
80241d4: 6b78 ldr r0, [r7, #52] @ 0x34
80241d6: f7f7 fbb7 bl 801b948 <pbuf_copy_partial>
80241da: 4603 mov r3, r0
80241dc: 461a mov r2, r3
80241de: 8b3b ldrh r3, [r7, #24]
80241e0: 4293 cmp r3, r2
80241e2: d002 beq.n 80241ea <dhcp_parse_reply+0x3fe>
return ERR_BUF;
80241e4: f06f 0301 mvn.w r3, #1
80241e8: e0ce b.n 8024388 <dhcp_parse_reply+0x59c>
}
if (decode_len > 4) {
80241ea: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
80241ee: 2b04 cmp r3, #4
80241f0: d933 bls.n 802425a <dhcp_parse_reply+0x46e>
/* decode more than one u32_t */
u16_t next_val_offset;
LWIP_ERROR("decode_len %% 4 == 0", decode_len % 4 == 0, return ERR_VAL;);
80241f2: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
80241f6: f003 0303 and.w r3, r3, #3
80241fa: b2db uxtb r3, r3
80241fc: 2b00 cmp r3, #0
80241fe: d009 beq.n 8024214 <dhcp_parse_reply+0x428>
8024200: 4b63 ldr r3, [pc, #396] @ (8024390 <dhcp_parse_reply+0x5a4>)
8024202: f240 6281 movw r2, #1665 @ 0x681
8024206: 4967 ldr r1, [pc, #412] @ (80243a4 <dhcp_parse_reply+0x5b8>)
8024208: 4863 ldr r0, [pc, #396] @ (8024398 <dhcp_parse_reply+0x5ac>)
802420a: f006 fc0f bl 802aa2c <iprintf>
802420e: f06f 0305 mvn.w r3, #5
8024212: e0b9 b.n 8024388 <dhcp_parse_reply+0x59c>
dhcp_got_option(dhcp, decode_idx);
8024214: 4a62 ldr r2, [pc, #392] @ (80243a0 <dhcp_parse_reply+0x5b4>)
8024216: 6a7b ldr r3, [r7, #36] @ 0x24
8024218: 4413 add r3, r2
802421a: 2201 movs r2, #1
802421c: 701a strb r2, [r3, #0]
dhcp_set_option_value(dhcp, decode_idx, lwip_htonl(value));
802421e: 68fb ldr r3, [r7, #12]
8024220: 4618 mov r0, r3
8024222: f7f5 fcbe bl 8019ba2 <lwip_htonl>
8024226: 4602 mov r2, r0
8024228: 495f ldr r1, [pc, #380] @ (80243a8 <dhcp_parse_reply+0x5bc>)
802422a: 6a7b ldr r3, [r7, #36] @ 0x24
802422c: f841 2023 str.w r2, [r1, r3, lsl #2]
decode_len = (u8_t)(decode_len - 4);
8024230: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
8024234: 3b04 subs r3, #4
8024236: f887 302a strb.w r3, [r7, #42] @ 0x2a
next_val_offset = (u16_t)(val_offset + 4);
802423a: 8c7b ldrh r3, [r7, #34] @ 0x22
802423c: 3304 adds r3, #4
802423e: 82fb strh r3, [r7, #22]
if (next_val_offset < val_offset) {
8024240: 8afa ldrh r2, [r7, #22]
8024242: 8c7b ldrh r3, [r7, #34] @ 0x22
8024244: 429a cmp r2, r3
8024246: d202 bcs.n 802424e <dhcp_parse_reply+0x462>
/* overflow */
return ERR_BUF;
8024248: f06f 0301 mvn.w r3, #1
802424c: e09c b.n 8024388 <dhcp_parse_reply+0x59c>
}
val_offset = next_val_offset;
802424e: 8afb ldrh r3, [r7, #22]
8024250: 847b strh r3, [r7, #34] @ 0x22
decode_idx++;
8024252: 6a7b ldr r3, [r7, #36] @ 0x24
8024254: 3301 adds r3, #1
8024256: 627b str r3, [r7, #36] @ 0x24
goto decode_next;
8024258: e79e b.n 8024198 <dhcp_parse_reply+0x3ac>
} else if (decode_len == 4) {
802425a: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
802425e: 2b04 cmp r3, #4
8024260: d106 bne.n 8024270 <dhcp_parse_reply+0x484>
value = lwip_ntohl(value);
8024262: 68fb ldr r3, [r7, #12]
8024264: 4618 mov r0, r3
8024266: f7f5 fc9c bl 8019ba2 <lwip_htonl>
802426a: 4603 mov r3, r0
802426c: 60fb str r3, [r7, #12]
802426e: e011 b.n 8024294 <dhcp_parse_reply+0x4a8>
} else {
LWIP_ERROR("invalid decode_len", decode_len == 1, return ERR_VAL;);
8024270: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
8024274: 2b01 cmp r3, #1
8024276: d009 beq.n 802428c <dhcp_parse_reply+0x4a0>
8024278: 4b45 ldr r3, [pc, #276] @ (8024390 <dhcp_parse_reply+0x5a4>)
802427a: f44f 62d2 mov.w r2, #1680 @ 0x690
802427e: 494b ldr r1, [pc, #300] @ (80243ac <dhcp_parse_reply+0x5c0>)
8024280: 4845 ldr r0, [pc, #276] @ (8024398 <dhcp_parse_reply+0x5ac>)
8024282: f006 fbd3 bl 802aa2c <iprintf>
8024286: f06f 0305 mvn.w r3, #5
802428a: e07d b.n 8024388 <dhcp_parse_reply+0x59c>
value = ((u8_t *)&value)[0];
802428c: f107 030c add.w r3, r7, #12
8024290: 781b ldrb r3, [r3, #0]
8024292: 60fb str r3, [r7, #12]
}
dhcp_got_option(dhcp, decode_idx);
8024294: 4a42 ldr r2, [pc, #264] @ (80243a0 <dhcp_parse_reply+0x5b4>)
8024296: 6a7b ldr r3, [r7, #36] @ 0x24
8024298: 4413 add r3, r2
802429a: 2201 movs r2, #1
802429c: 701a strb r2, [r3, #0]
dhcp_set_option_value(dhcp, decode_idx, value);
802429e: 68fa ldr r2, [r7, #12]
80242a0: 4941 ldr r1, [pc, #260] @ (80243a8 <dhcp_parse_reply+0x5bc>)
80242a2: 6a7b ldr r3, [r7, #36] @ 0x24
80242a4: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
}
if (offset >= q->len) {
80242a8: 6b7b ldr r3, [r7, #52] @ 0x34
80242aa: 895b ldrh r3, [r3, #10]
80242ac: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
80242b0: 429a cmp r2, r3
80242b2: d327 bcc.n 8024304 <dhcp_parse_reply+0x518>
offset = (u16_t)(offset - q->len);
80242b4: 6b7b ldr r3, [r7, #52] @ 0x34
80242b6: 895b ldrh r3, [r3, #10]
80242b8: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
80242bc: 1ad3 subs r3, r2, r3
80242be: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
offset_max = (u16_t)(offset_max - q->len);
80242c2: 6b7b ldr r3, [r7, #52] @ 0x34
80242c4: 895b ldrh r3, [r3, #10]
80242c6: 8ffa ldrh r2, [r7, #62] @ 0x3e
80242c8: 1ad3 subs r3, r2, r3
80242ca: 87fb strh r3, [r7, #62] @ 0x3e
if (offset < offset_max) {
80242cc: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
80242d0: 8ffb ldrh r3, [r7, #62] @ 0x3e
80242d2: 429a cmp r2, r3
80242d4: d213 bcs.n 80242fe <dhcp_parse_reply+0x512>
q = q->next;
80242d6: 6b7b ldr r3, [r7, #52] @ 0x34
80242d8: 681b ldr r3, [r3, #0]
80242da: 637b str r3, [r7, #52] @ 0x34
LWIP_ERROR("next pbuf was null", q != NULL, return ERR_VAL;);
80242dc: 6b7b ldr r3, [r7, #52] @ 0x34
80242de: 2b00 cmp r3, #0
80242e0: d109 bne.n 80242f6 <dhcp_parse_reply+0x50a>
80242e2: 4b2b ldr r3, [pc, #172] @ (8024390 <dhcp_parse_reply+0x5a4>)
80242e4: f240 629d movw r2, #1693 @ 0x69d
80242e8: 4931 ldr r1, [pc, #196] @ (80243b0 <dhcp_parse_reply+0x5c4>)
80242ea: 482b ldr r0, [pc, #172] @ (8024398 <dhcp_parse_reply+0x5ac>)
80242ec: f006 fb9e bl 802aa2c <iprintf>
80242f0: f06f 0305 mvn.w r3, #5
80242f4: e048 b.n 8024388 <dhcp_parse_reply+0x59c>
options = (u8_t *)q->payload;
80242f6: 6b7b ldr r3, [r7, #52] @ 0x34
80242f8: 685b ldr r3, [r3, #4]
80242fa: 643b str r3, [r7, #64] @ 0x40
80242fc: e002 b.n 8024304 <dhcp_parse_reply+0x518>
} else {
/* We've run out of bytes, probably no end marker. Don't proceed. */
return ERR_BUF;
80242fe: f06f 0301 mvn.w r3, #1
8024302: e041 b.n 8024388 <dhcp_parse_reply+0x59c>
while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
8024304: 6b7b ldr r3, [r7, #52] @ 0x34
8024306: 2b00 cmp r3, #0
8024308: d00c beq.n 8024324 <dhcp_parse_reply+0x538>
802430a: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
802430e: 8ffb ldrh r3, [r7, #62] @ 0x3e
8024310: 429a cmp r2, r3
8024312: d207 bcs.n 8024324 <dhcp_parse_reply+0x538>
8024314: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8024318: 6c3a ldr r2, [r7, #64] @ 0x40
802431a: 4413 add r3, r2
802431c: 781b ldrb r3, [r3, #0]
802431e: 2bff cmp r3, #255 @ 0xff
8024320: f47f ada8 bne.w 8023e74 <dhcp_parse_reply+0x88>
}
}
}
/* is this an overloaded message? */
if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_OVERLOAD)) {
8024324: 4b1e ldr r3, [pc, #120] @ (80243a0 <dhcp_parse_reply+0x5b4>)
8024326: 781b ldrb r3, [r3, #0]
8024328: 2b00 cmp r3, #0
802432a: d018 beq.n 802435e <dhcp_parse_reply+0x572>
u32_t overload = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_OVERLOAD);
802432c: 4b1e ldr r3, [pc, #120] @ (80243a8 <dhcp_parse_reply+0x5bc>)
802432e: 681b ldr r3, [r3, #0]
8024330: 613b str r3, [r7, #16]
dhcp_clear_option(dhcp, DHCP_OPTION_IDX_OVERLOAD);
8024332: 4b1b ldr r3, [pc, #108] @ (80243a0 <dhcp_parse_reply+0x5b4>)
8024334: 2200 movs r2, #0
8024336: 701a strb r2, [r3, #0]
if (overload == DHCP_OVERLOAD_FILE) {
8024338: 693b ldr r3, [r7, #16]
802433a: 2b01 cmp r3, #1
802433c: d102 bne.n 8024344 <dhcp_parse_reply+0x558>
parse_file_as_options = 1;
802433e: 2301 movs r3, #1
8024340: 633b str r3, [r7, #48] @ 0x30
8024342: e00c b.n 802435e <dhcp_parse_reply+0x572>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n"));
} else if (overload == DHCP_OVERLOAD_SNAME) {
8024344: 693b ldr r3, [r7, #16]
8024346: 2b02 cmp r3, #2
8024348: d102 bne.n 8024350 <dhcp_parse_reply+0x564>
parse_sname_as_options = 1;
802434a: 2301 movs r3, #1
802434c: 62fb str r3, [r7, #44] @ 0x2c
802434e: e006 b.n 802435e <dhcp_parse_reply+0x572>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n"));
} else if (overload == DHCP_OVERLOAD_SNAME_FILE) {
8024350: 693b ldr r3, [r7, #16]
8024352: 2b03 cmp r3, #3
8024354: d103 bne.n 802435e <dhcp_parse_reply+0x572>
parse_sname_as_options = 1;
8024356: 2301 movs r3, #1
8024358: 62fb str r3, [r7, #44] @ 0x2c
parse_file_as_options = 1;
802435a: 2301 movs r3, #1
802435c: 633b str r3, [r7, #48] @ 0x30
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n"));
} else {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("invalid overload option: %d\n", (int)overload));
}
}
if (parse_file_as_options) {
802435e: 6b3b ldr r3, [r7, #48] @ 0x30
8024360: 2b00 cmp r3, #0
8024362: d006 beq.n 8024372 <dhcp_parse_reply+0x586>
/* if both are overloaded, parse file first and then sname (RFC 2131 ch. 4.1) */
parse_file_as_options = 0;
8024364: 2300 movs r3, #0
8024366: 633b str r3, [r7, #48] @ 0x30
options_idx = DHCP_FILE_OFS;
8024368: 236c movs r3, #108 @ 0x6c
802436a: 87bb strh r3, [r7, #60] @ 0x3c
options_idx_max = DHCP_FILE_OFS + DHCP_FILE_LEN;
802436c: 23ec movs r3, #236 @ 0xec
802436e: 877b strh r3, [r7, #58] @ 0x3a
#if LWIP_DHCP_BOOTP_FILE
file_overloaded = 1;
#endif
goto again;
8024370: e559 b.n 8023e26 <dhcp_parse_reply+0x3a>
} else if (parse_sname_as_options) {
8024372: 6afb ldr r3, [r7, #44] @ 0x2c
8024374: 2b00 cmp r3, #0
8024376: d006 beq.n 8024386 <dhcp_parse_reply+0x59a>
parse_sname_as_options = 0;
8024378: 2300 movs r3, #0
802437a: 62fb str r3, [r7, #44] @ 0x2c
options_idx = DHCP_SNAME_OFS;
802437c: 232c movs r3, #44 @ 0x2c
802437e: 87bb strh r3, [r7, #60] @ 0x3c
options_idx_max = DHCP_SNAME_OFS + DHCP_SNAME_LEN;
8024380: 236c movs r3, #108 @ 0x6c
8024382: 877b strh r3, [r7, #58] @ 0x3a
goto again;
8024384: e54f b.n 8023e26 <dhcp_parse_reply+0x3a>
}
/* make sure the string is really NULL-terminated */
dhcp->boot_file_name[DHCP_FILE_LEN-1] = 0;
}
#endif /* LWIP_DHCP_BOOTP_FILE */
return ERR_OK;
8024386: 2300 movs r3, #0
}
8024388: 4618 mov r0, r3
802438a: 3748 adds r7, #72 @ 0x48
802438c: 46bd mov sp, r7
802438e: bd80 pop {r7, pc}
8024390: 0803109c .word 0x0803109c
8024394: 08031324 .word 0x08031324
8024398: 080310fc .word 0x080310fc
802439c: 08031368 .word 0x08031368
80243a0: 2402b02c .word 0x2402b02c
80243a4: 0803137c .word 0x0803137c
80243a8: 2402b00c .word 0x2402b00c
80243ac: 08031394 .word 0x08031394
80243b0: 080313a8 .word 0x080313a8
080243b4 <dhcp_recv>:
/**
* If an incoming DHCP message is in response to us, then trigger the state machine
*/
static void
dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port)
{
80243b4: b580 push {r7, lr}
80243b6: b08a sub sp, #40 @ 0x28
80243b8: af00 add r7, sp, #0
80243ba: 60f8 str r0, [r7, #12]
80243bc: 60b9 str r1, [r7, #8]
80243be: 607a str r2, [r7, #4]
80243c0: 603b str r3, [r7, #0]
struct netif *netif = ip_current_input_netif();
80243c2: 4b5e ldr r3, [pc, #376] @ (802453c <dhcp_recv+0x188>)
80243c4: 685b ldr r3, [r3, #4]
80243c6: 61fb str r3, [r7, #28]
struct dhcp *dhcp = netif_dhcp_data(netif);
80243c8: 69fb ldr r3, [r7, #28]
80243ca: 6a5b ldr r3, [r3, #36] @ 0x24
80243cc: 61bb str r3, [r7, #24]
struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload;
80243ce: 687b ldr r3, [r7, #4]
80243d0: 685b ldr r3, [r3, #4]
80243d2: 617b str r3, [r7, #20]
struct dhcp_msg *msg_in;
LWIP_UNUSED_ARG(arg);
/* Caught DHCP message from netif that does not have DHCP enabled? -> not interested */
if ((dhcp == NULL) || (dhcp->pcb_allocated == 0)) {
80243d4: 69bb ldr r3, [r7, #24]
80243d6: 2b00 cmp r3, #0
80243d8: f000 809a beq.w 8024510 <dhcp_recv+0x15c>
80243dc: 69bb ldr r3, [r7, #24]
80243de: 791b ldrb r3, [r3, #4]
80243e0: 2b00 cmp r3, #0
80243e2: f000 8095 beq.w 8024510 <dhcp_recv+0x15c>
/* prevent warnings about unused arguments */
LWIP_UNUSED_ARG(pcb);
LWIP_UNUSED_ARG(addr);
LWIP_UNUSED_ARG(port);
if (p->len < DHCP_MIN_REPLY_LEN) {
80243e6: 687b ldr r3, [r7, #4]
80243e8: 895b ldrh r3, [r3, #10]
80243ea: 2b2b cmp r3, #43 @ 0x2b
80243ec: f240 8092 bls.w 8024514 <dhcp_recv+0x160>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message or pbuf too short\n"));
goto free_pbuf_and_return;
}
if (reply_msg->op != DHCP_BOOTREPLY) {
80243f0: 697b ldr r3, [r7, #20]
80243f2: 781b ldrb r3, [r3, #0]
80243f4: 2b02 cmp r3, #2
80243f6: f040 808f bne.w 8024518 <dhcp_recv+0x164>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op));
goto free_pbuf_and_return;
}
/* iterate through hardware address and match against DHCP message */
for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
80243fa: 2300 movs r3, #0
80243fc: 74fb strb r3, [r7, #19]
80243fe: e00e b.n 802441e <dhcp_recv+0x6a>
if (netif->hwaddr[i] != reply_msg->chaddr[i]) {
8024400: 7cfb ldrb r3, [r7, #19]
8024402: 69fa ldr r2, [r7, #28]
8024404: 4413 add r3, r2
8024406: f893 202a ldrb.w r2, [r3, #42] @ 0x2a
802440a: 7cfb ldrb r3, [r7, #19]
802440c: 6979 ldr r1, [r7, #20]
802440e: 440b add r3, r1
8024410: 7f1b ldrb r3, [r3, #28]
8024412: 429a cmp r2, r3
8024414: f040 8082 bne.w 802451c <dhcp_recv+0x168>
for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
8024418: 7cfb ldrb r3, [r7, #19]
802441a: 3301 adds r3, #1
802441c: 74fb strb r3, [r7, #19]
802441e: 69fb ldr r3, [r7, #28]
8024420: f893 3030 ldrb.w r3, [r3, #48] @ 0x30
8024424: 7cfa ldrb r2, [r7, #19]
8024426: 429a cmp r2, r3
8024428: d202 bcs.n 8024430 <dhcp_recv+0x7c>
802442a: 7cfb ldrb r3, [r7, #19]
802442c: 2b05 cmp r3, #5
802442e: d9e7 bls.n 8024400 <dhcp_recv+0x4c>
(u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i]));
goto free_pbuf_and_return;
}
}
/* match transaction ID against what we expected */
if (lwip_ntohl(reply_msg->xid) != dhcp->xid) {
8024430: 697b ldr r3, [r7, #20]
8024432: 685b ldr r3, [r3, #4]
8024434: 4618 mov r0, r3
8024436: f7f5 fbb4 bl 8019ba2 <lwip_htonl>
802443a: 4602 mov r2, r0
802443c: 69bb ldr r3, [r7, #24]
802443e: 681b ldr r3, [r3, #0]
8024440: 429a cmp r2, r3
8024442: d16d bne.n 8024520 <dhcp_recv+0x16c>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n", lwip_ntohl(reply_msg->xid), dhcp->xid));
goto free_pbuf_and_return;
}
/* option fields could be unfold? */
if (dhcp_parse_reply(p, dhcp) != ERR_OK) {
8024444: 69b9 ldr r1, [r7, #24]
8024446: 6878 ldr r0, [r7, #4]
8024448: f7ff fcd0 bl 8023dec <dhcp_parse_reply>
802444c: 4603 mov r3, r0
802444e: 2b00 cmp r3, #0
8024450: d168 bne.n 8024524 <dhcp_recv+0x170>
goto free_pbuf_and_return;
}
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n"));
/* obtain pointer to DHCP message type */
if (!dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE)) {
8024452: 4b3b ldr r3, [pc, #236] @ (8024540 <dhcp_recv+0x18c>)
8024454: 785b ldrb r3, [r3, #1]
8024456: 2b00 cmp r3, #0
8024458: d066 beq.n 8024528 <dhcp_recv+0x174>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n"));
goto free_pbuf_and_return;
}
msg_in = (struct dhcp_msg *)p->payload;
802445a: 687b ldr r3, [r7, #4]
802445c: 685b ldr r3, [r3, #4]
802445e: 627b str r3, [r7, #36] @ 0x24
/* read DHCP message type */
msg_type = (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE);
8024460: 4b38 ldr r3, [pc, #224] @ (8024544 <dhcp_recv+0x190>)
8024462: 685b ldr r3, [r3, #4]
8024464: f887 3023 strb.w r3, [r7, #35] @ 0x23
/* message type is DHCP ACK? */
if (msg_type == DHCP_ACK) {
8024468: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
802446c: 2b05 cmp r3, #5
802446e: d12a bne.n 80244c6 <dhcp_recv+0x112>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n"));
/* in requesting state? */
if (dhcp->state == DHCP_STATE_REQUESTING) {
8024470: 69bb ldr r3, [r7, #24]
8024472: 795b ldrb r3, [r3, #5]
8024474: 2b01 cmp r3, #1
8024476: d112 bne.n 802449e <dhcp_recv+0xea>
dhcp_handle_ack(netif, msg_in);
8024478: 6a79 ldr r1, [r7, #36] @ 0x24
802447a: 69f8 ldr r0, [r7, #28]
802447c: f7fe fe00 bl 8023080 <dhcp_handle_ack>
#if DHCP_DOES_ARP_CHECK
if ((netif->flags & NETIF_FLAG_ETHARP) != 0) {
8024480: 69fb ldr r3, [r7, #28]
8024482: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8024486: f003 0308 and.w r3, r3, #8
802448a: 2b00 cmp r3, #0
802448c: d003 beq.n 8024496 <dhcp_recv+0xe2>
/* check if the acknowledged lease address is already in use */
dhcp_check(netif);
802448e: 69f8 ldr r0, [r7, #28]
8024490: f7fe fb6e bl 8022b70 <dhcp_check>
8024494: e04b b.n 802452e <dhcp_recv+0x17a>
} else {
/* bind interface to the acknowledged lease address */
dhcp_bind(netif);
8024496: 69f8 ldr r0, [r7, #28]
8024498: f7ff f852 bl 8023540 <dhcp_bind>
802449c: e047 b.n 802452e <dhcp_recv+0x17a>
/* bind interface to the acknowledged lease address */
dhcp_bind(netif);
#endif
}
/* already bound to the given lease address? */
else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
802449e: 69bb ldr r3, [r7, #24]
80244a0: 795b ldrb r3, [r3, #5]
80244a2: 2b03 cmp r3, #3
80244a4: d007 beq.n 80244b6 <dhcp_recv+0x102>
80244a6: 69bb ldr r3, [r7, #24]
80244a8: 795b ldrb r3, [r3, #5]
80244aa: 2b04 cmp r3, #4
80244ac: d003 beq.n 80244b6 <dhcp_recv+0x102>
(dhcp->state == DHCP_STATE_RENEWING)) {
80244ae: 69bb ldr r3, [r7, #24]
80244b0: 795b ldrb r3, [r3, #5]
else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
80244b2: 2b05 cmp r3, #5
80244b4: d13b bne.n 802452e <dhcp_recv+0x17a>
dhcp_handle_ack(netif, msg_in);
80244b6: 6a79 ldr r1, [r7, #36] @ 0x24
80244b8: 69f8 ldr r0, [r7, #28]
80244ba: f7fe fde1 bl 8023080 <dhcp_handle_ack>
dhcp_bind(netif);
80244be: 69f8 ldr r0, [r7, #28]
80244c0: f7ff f83e bl 8023540 <dhcp_bind>
80244c4: e033 b.n 802452e <dhcp_recv+0x17a>
}
}
/* received a DHCP_NAK in appropriate state? */
else if ((msg_type == DHCP_NAK) &&
80244c6: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
80244ca: 2b06 cmp r3, #6
80244cc: d113 bne.n 80244f6 <dhcp_recv+0x142>
((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
80244ce: 69bb ldr r3, [r7, #24]
80244d0: 795b ldrb r3, [r3, #5]
else if ((msg_type == DHCP_NAK) &&
80244d2: 2b03 cmp r3, #3
80244d4: d00b beq.n 80244ee <dhcp_recv+0x13a>
((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
80244d6: 69bb ldr r3, [r7, #24]
80244d8: 795b ldrb r3, [r3, #5]
80244da: 2b01 cmp r3, #1
80244dc: d007 beq.n 80244ee <dhcp_recv+0x13a>
(dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING ))) {
80244de: 69bb ldr r3, [r7, #24]
80244e0: 795b ldrb r3, [r3, #5]
((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
80244e2: 2b04 cmp r3, #4
80244e4: d003 beq.n 80244ee <dhcp_recv+0x13a>
(dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING ))) {
80244e6: 69bb ldr r3, [r7, #24]
80244e8: 795b ldrb r3, [r3, #5]
80244ea: 2b05 cmp r3, #5
80244ec: d103 bne.n 80244f6 <dhcp_recv+0x142>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n"));
dhcp_handle_nak(netif);
80244ee: 69f8 ldr r0, [r7, #28]
80244f0: f7fe fb24 bl 8022b3c <dhcp_handle_nak>
80244f4: e01b b.n 802452e <dhcp_recv+0x17a>
}
/* received a DHCP_OFFER in DHCP_STATE_SELECTING state? */
else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_STATE_SELECTING)) {
80244f6: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
80244fa: 2b02 cmp r3, #2
80244fc: d116 bne.n 802452c <dhcp_recv+0x178>
80244fe: 69bb ldr r3, [r7, #24]
8024500: 795b ldrb r3, [r3, #5]
8024502: 2b06 cmp r3, #6
8024504: d112 bne.n 802452c <dhcp_recv+0x178>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_STATE_SELECTING state\n"));
/* remember offered lease */
dhcp_handle_offer(netif, msg_in);
8024506: 6a79 ldr r1, [r7, #36] @ 0x24
8024508: 69f8 ldr r0, [r7, #28]
802450a: f7fe fb65 bl 8022bd8 <dhcp_handle_offer>
802450e: e00e b.n 802452e <dhcp_recv+0x17a>
goto free_pbuf_and_return;
8024510: bf00 nop
8024512: e00c b.n 802452e <dhcp_recv+0x17a>
goto free_pbuf_and_return;
8024514: bf00 nop
8024516: e00a b.n 802452e <dhcp_recv+0x17a>
goto free_pbuf_and_return;
8024518: bf00 nop
802451a: e008 b.n 802452e <dhcp_recv+0x17a>
goto free_pbuf_and_return;
802451c: bf00 nop
802451e: e006 b.n 802452e <dhcp_recv+0x17a>
goto free_pbuf_and_return;
8024520: bf00 nop
8024522: e004 b.n 802452e <dhcp_recv+0x17a>
goto free_pbuf_and_return;
8024524: bf00 nop
8024526: e002 b.n 802452e <dhcp_recv+0x17a>
goto free_pbuf_and_return;
8024528: bf00 nop
802452a: e000 b.n 802452e <dhcp_recv+0x17a>
}
free_pbuf_and_return:
802452c: bf00 nop
pbuf_free(p);
802452e: 6878 ldr r0, [r7, #4]
8024530: f7f7 f804 bl 801b53c <pbuf_free>
}
8024534: bf00 nop
8024536: 3728 adds r7, #40 @ 0x28
8024538: 46bd mov sp, r7
802453a: bd80 pop {r7, pc}
802453c: 24024458 .word 0x24024458
8024540: 2402b02c .word 0x2402b02c
8024544: 2402b00c .word 0x2402b00c
08024548 <dhcp_create_msg>:
* @param dhcp dhcp control struct
* @param message_type message type of the request
*/
static struct pbuf *
dhcp_create_msg(struct netif *netif, struct dhcp *dhcp, u8_t message_type, u16_t *options_out_len)
{
8024548: b580 push {r7, lr}
802454a: b088 sub sp, #32
802454c: af00 add r7, sp, #0
802454e: 60f8 str r0, [r7, #12]
8024550: 60b9 str r1, [r7, #8]
8024552: 603b str r3, [r7, #0]
8024554: 4613 mov r3, r2
8024556: 71fb strb r3, [r7, #7]
if (!xid_initialised) {
xid = DHCP_GLOBAL_XID;
xid_initialised = !xid_initialised;
}
#endif
LWIP_ERROR("dhcp_create_msg: netif != NULL", (netif != NULL), return NULL;);
8024558: 68fb ldr r3, [r7, #12]
802455a: 2b00 cmp r3, #0
802455c: d108 bne.n 8024570 <dhcp_create_msg+0x28>
802455e: 4b5f ldr r3, [pc, #380] @ (80246dc <dhcp_create_msg+0x194>)
8024560: f240 7269 movw r2, #1897 @ 0x769
8024564: 495e ldr r1, [pc, #376] @ (80246e0 <dhcp_create_msg+0x198>)
8024566: 485f ldr r0, [pc, #380] @ (80246e4 <dhcp_create_msg+0x19c>)
8024568: f006 fa60 bl 802aa2c <iprintf>
802456c: 2300 movs r3, #0
802456e: e0b1 b.n 80246d4 <dhcp_create_msg+0x18c>
LWIP_ERROR("dhcp_create_msg: dhcp != NULL", (dhcp != NULL), return NULL;);
8024570: 68bb ldr r3, [r7, #8]
8024572: 2b00 cmp r3, #0
8024574: d108 bne.n 8024588 <dhcp_create_msg+0x40>
8024576: 4b59 ldr r3, [pc, #356] @ (80246dc <dhcp_create_msg+0x194>)
8024578: f240 726a movw r2, #1898 @ 0x76a
802457c: 495a ldr r1, [pc, #360] @ (80246e8 <dhcp_create_msg+0x1a0>)
802457e: 4859 ldr r0, [pc, #356] @ (80246e4 <dhcp_create_msg+0x19c>)
8024580: f006 fa54 bl 802aa2c <iprintf>
8024584: 2300 movs r3, #0
8024586: e0a5 b.n 80246d4 <dhcp_create_msg+0x18c>
p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM);
8024588: f44f 7220 mov.w r2, #640 @ 0x280
802458c: f44f 719a mov.w r1, #308 @ 0x134
8024590: 2036 movs r0, #54 @ 0x36
8024592: f7f6 fcbd bl 801af10 <pbuf_alloc>
8024596: 61b8 str r0, [r7, #24]
if (p_out == NULL) {
8024598: 69bb ldr r3, [r7, #24]
802459a: 2b00 cmp r3, #0
802459c: d101 bne.n 80245a2 <dhcp_create_msg+0x5a>
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
("dhcp_create_msg(): could not allocate pbuf\n"));
return NULL;
802459e: 2300 movs r3, #0
80245a0: e098 b.n 80246d4 <dhcp_create_msg+0x18c>
}
LWIP_ASSERT("dhcp_create_msg: check that first pbuf can hold struct dhcp_msg",
80245a2: 69bb ldr r3, [r7, #24]
80245a4: 895b ldrh r3, [r3, #10]
80245a6: f5b3 7f9a cmp.w r3, #308 @ 0x134
80245aa: d206 bcs.n 80245ba <dhcp_create_msg+0x72>
80245ac: 4b4b ldr r3, [pc, #300] @ (80246dc <dhcp_create_msg+0x194>)
80245ae: f240 7271 movw r2, #1905 @ 0x771
80245b2: 494e ldr r1, [pc, #312] @ (80246ec <dhcp_create_msg+0x1a4>)
80245b4: 484b ldr r0, [pc, #300] @ (80246e4 <dhcp_create_msg+0x19c>)
80245b6: f006 fa39 bl 802aa2c <iprintf>
(p_out->len >= sizeof(struct dhcp_msg)));
/* DHCP_REQUEST should reuse 'xid' from DHCPOFFER */
if ((message_type != DHCP_REQUEST) || (dhcp->state == DHCP_STATE_REBOOTING)) {
80245ba: 79fb ldrb r3, [r7, #7]
80245bc: 2b03 cmp r3, #3
80245be: d103 bne.n 80245c8 <dhcp_create_msg+0x80>
80245c0: 68bb ldr r3, [r7, #8]
80245c2: 795b ldrb r3, [r3, #5]
80245c4: 2b03 cmp r3, #3
80245c6: d10d bne.n 80245e4 <dhcp_create_msg+0x9c>
/* reuse transaction identifier in retransmissions */
if (dhcp->tries == 0) {
80245c8: 68bb ldr r3, [r7, #8]
80245ca: 799b ldrb r3, [r3, #6]
80245cc: 2b00 cmp r3, #0
80245ce: d105 bne.n 80245dc <dhcp_create_msg+0x94>
#if DHCP_CREATE_RAND_XID && defined(LWIP_RAND)
xid = LWIP_RAND();
80245d0: f004 ff02 bl 80293d8 <rand>
80245d4: 4603 mov r3, r0
80245d6: 461a mov r2, r3
80245d8: 4b45 ldr r3, [pc, #276] @ (80246f0 <dhcp_create_msg+0x1a8>)
80245da: 601a str r2, [r3, #0]
#else /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
xid++;
#endif /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
}
dhcp->xid = xid;
80245dc: 4b44 ldr r3, [pc, #272] @ (80246f0 <dhcp_create_msg+0x1a8>)
80245de: 681a ldr r2, [r3, #0]
80245e0: 68bb ldr r3, [r7, #8]
80245e2: 601a str r2, [r3, #0]
}
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE,
("transaction id xid(%"X32_F")\n", xid));
msg_out = (struct dhcp_msg *)p_out->payload;
80245e4: 69bb ldr r3, [r7, #24]
80245e6: 685b ldr r3, [r3, #4]
80245e8: 617b str r3, [r7, #20]
memset(msg_out, 0, sizeof(struct dhcp_msg));
80245ea: f44f 729a mov.w r2, #308 @ 0x134
80245ee: 2100 movs r1, #0
80245f0: 6978 ldr r0, [r7, #20]
80245f2: f006 fbad bl 802ad50 <memset>
msg_out->op = DHCP_BOOTREQUEST;
80245f6: 697b ldr r3, [r7, #20]
80245f8: 2201 movs r2, #1
80245fa: 701a strb r2, [r3, #0]
/* @todo: make link layer independent */
msg_out->htype = LWIP_IANA_HWTYPE_ETHERNET;
80245fc: 697b ldr r3, [r7, #20]
80245fe: 2201 movs r2, #1
8024600: 705a strb r2, [r3, #1]
msg_out->hlen = netif->hwaddr_len;
8024602: 68fb ldr r3, [r7, #12]
8024604: f893 2030 ldrb.w r2, [r3, #48] @ 0x30
8024608: 697b ldr r3, [r7, #20]
802460a: 709a strb r2, [r3, #2]
msg_out->xid = lwip_htonl(dhcp->xid);
802460c: 68bb ldr r3, [r7, #8]
802460e: 681b ldr r3, [r3, #0]
8024610: 4618 mov r0, r3
8024612: f7f5 fac6 bl 8019ba2 <lwip_htonl>
8024616: 4602 mov r2, r0
8024618: 697b ldr r3, [r7, #20]
802461a: 605a str r2, [r3, #4]
/* we don't need the broadcast flag since we can receive unicast traffic
before being fully configured! */
/* set ciaddr to netif->ip_addr based on message_type and state */
if ((message_type == DHCP_INFORM) || (message_type == DHCP_DECLINE) || (message_type == DHCP_RELEASE) ||
802461c: 79fb ldrb r3, [r7, #7]
802461e: 2b08 cmp r3, #8
8024620: d010 beq.n 8024644 <dhcp_create_msg+0xfc>
8024622: 79fb ldrb r3, [r7, #7]
8024624: 2b04 cmp r3, #4
8024626: d00d beq.n 8024644 <dhcp_create_msg+0xfc>
8024628: 79fb ldrb r3, [r7, #7]
802462a: 2b07 cmp r3, #7
802462c: d00a beq.n 8024644 <dhcp_create_msg+0xfc>
802462e: 79fb ldrb r3, [r7, #7]
8024630: 2b03 cmp r3, #3
8024632: d10c bne.n 802464e <dhcp_create_msg+0x106>
((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
8024634: 68bb ldr r3, [r7, #8]
8024636: 795b ldrb r3, [r3, #5]
((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
8024638: 2b05 cmp r3, #5
802463a: d003 beq.n 8024644 <dhcp_create_msg+0xfc>
((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
802463c: 68bb ldr r3, [r7, #8]
802463e: 795b ldrb r3, [r3, #5]
8024640: 2b04 cmp r3, #4
8024642: d104 bne.n 802464e <dhcp_create_msg+0x106>
ip4_addr_copy(msg_out->ciaddr, *netif_ip4_addr(netif));
8024644: 68fb ldr r3, [r7, #12]
8024646: 3304 adds r3, #4
8024648: 681a ldr r2, [r3, #0]
802464a: 697b ldr r3, [r7, #20]
802464c: 60da str r2, [r3, #12]
}
for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
802464e: 2300 movs r3, #0
8024650: 83fb strh r3, [r7, #30]
8024652: e00c b.n 802466e <dhcp_create_msg+0x126>
/* copy netif hardware address (padded with zeroes through memset already) */
msg_out->chaddr[i] = netif->hwaddr[i];
8024654: 8bfa ldrh r2, [r7, #30]
8024656: 8bfb ldrh r3, [r7, #30]
8024658: 68f9 ldr r1, [r7, #12]
802465a: 440a add r2, r1
802465c: f892 102a ldrb.w r1, [r2, #42] @ 0x2a
8024660: 697a ldr r2, [r7, #20]
8024662: 4413 add r3, r2
8024664: 460a mov r2, r1
8024666: 771a strb r2, [r3, #28]
for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
8024668: 8bfb ldrh r3, [r7, #30]
802466a: 3301 adds r3, #1
802466c: 83fb strh r3, [r7, #30]
802466e: 8bfb ldrh r3, [r7, #30]
8024670: 2b05 cmp r3, #5
8024672: d9ef bls.n 8024654 <dhcp_create_msg+0x10c>
}
msg_out->cookie = PP_HTONL(DHCP_MAGIC_COOKIE);
8024674: 697b ldr r3, [r7, #20]
8024676: 2200 movs r2, #0
8024678: f042 0263 orr.w r2, r2, #99 @ 0x63
802467c: f883 20ec strb.w r2, [r3, #236] @ 0xec
8024680: 2200 movs r2, #0
8024682: f062 027d orn r2, r2, #125 @ 0x7d
8024686: f883 20ed strb.w r2, [r3, #237] @ 0xed
802468a: 2200 movs r2, #0
802468c: f042 0253 orr.w r2, r2, #83 @ 0x53
8024690: f883 20ee strb.w r2, [r3, #238] @ 0xee
8024694: 2200 movs r2, #0
8024696: f042 0263 orr.w r2, r2, #99 @ 0x63
802469a: f883 20ef strb.w r2, [r3, #239] @ 0xef
/* Add option MESSAGE_TYPE */
options_out_len_loc = dhcp_option(0, msg_out->options, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN);
802469e: 697b ldr r3, [r7, #20]
80246a0: f103 01f0 add.w r1, r3, #240 @ 0xf0
80246a4: 2301 movs r3, #1
80246a6: 2235 movs r2, #53 @ 0x35
80246a8: 2000 movs r0, #0
80246aa: f7ff facf bl 8023c4c <dhcp_option>
80246ae: 4603 mov r3, r0
80246b0: 827b strh r3, [r7, #18]
options_out_len_loc = dhcp_option_byte(options_out_len_loc, msg_out->options, message_type);
80246b2: 697b ldr r3, [r7, #20]
80246b4: f103 01f0 add.w r1, r3, #240 @ 0xf0
80246b8: 79fa ldrb r2, [r7, #7]
80246ba: 8a7b ldrh r3, [r7, #18]
80246bc: 4618 mov r0, r3
80246be: f7ff faf9 bl 8023cb4 <dhcp_option_byte>
80246c2: 4603 mov r3, r0
80246c4: 827b strh r3, [r7, #18]
if (options_out_len) {
80246c6: 683b ldr r3, [r7, #0]
80246c8: 2b00 cmp r3, #0
80246ca: d002 beq.n 80246d2 <dhcp_create_msg+0x18a>
*options_out_len = options_out_len_loc;
80246cc: 683b ldr r3, [r7, #0]
80246ce: 8a7a ldrh r2, [r7, #18]
80246d0: 801a strh r2, [r3, #0]
}
return p_out;
80246d2: 69bb ldr r3, [r7, #24]
}
80246d4: 4618 mov r0, r3
80246d6: 3720 adds r7, #32
80246d8: 46bd mov sp, r7
80246da: bd80 pop {r7, pc}
80246dc: 0803109c .word 0x0803109c
80246e0: 080313bc .word 0x080313bc
80246e4: 080310fc .word 0x080310fc
80246e8: 080313dc .word 0x080313dc
80246ec: 080313fc .word 0x080313fc
80246f0: 2402b03c .word 0x2402b03c
080246f4 <dhcp_option_trailer>:
* Adds the END option to the DHCP message, and if
* necessary, up to three padding bytes.
*/
static void
dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out)
{
80246f4: b580 push {r7, lr}
80246f6: b084 sub sp, #16
80246f8: af00 add r7, sp, #0
80246fa: 4603 mov r3, r0
80246fc: 60b9 str r1, [r7, #8]
80246fe: 607a str r2, [r7, #4]
8024700: 81fb strh r3, [r7, #14]
options[options_out_len++] = DHCP_OPTION_END;
8024702: 89fb ldrh r3, [r7, #14]
8024704: 1c5a adds r2, r3, #1
8024706: 81fa strh r2, [r7, #14]
8024708: 461a mov r2, r3
802470a: 68bb ldr r3, [r7, #8]
802470c: 4413 add r3, r2
802470e: 22ff movs r2, #255 @ 0xff
8024710: 701a strb r2, [r3, #0]
/* packet is too small, or not 4 byte aligned? */
while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
8024712: e007 b.n 8024724 <dhcp_option_trailer+0x30>
(options_out_len < DHCP_OPTIONS_LEN)) {
/* add a fill/padding byte */
options[options_out_len++] = 0;
8024714: 89fb ldrh r3, [r7, #14]
8024716: 1c5a adds r2, r3, #1
8024718: 81fa strh r2, [r7, #14]
802471a: 461a mov r2, r3
802471c: 68bb ldr r3, [r7, #8]
802471e: 4413 add r3, r2
8024720: 2200 movs r2, #0
8024722: 701a strb r2, [r3, #0]
while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
8024724: 89fb ldrh r3, [r7, #14]
8024726: 2b43 cmp r3, #67 @ 0x43
8024728: d904 bls.n 8024734 <dhcp_option_trailer+0x40>
802472a: 89fb ldrh r3, [r7, #14]
802472c: f003 0303 and.w r3, r3, #3
8024730: 2b00 cmp r3, #0
8024732: d002 beq.n 802473a <dhcp_option_trailer+0x46>
8024734: 89fb ldrh r3, [r7, #14]
8024736: 2b43 cmp r3, #67 @ 0x43
8024738: d9ec bls.n 8024714 <dhcp_option_trailer+0x20>
}
/* shrink the pbuf to the actual content length */
pbuf_realloc(p_out, (u16_t)(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + options_out_len));
802473a: 89fb ldrh r3, [r7, #14]
802473c: 33f0 adds r3, #240 @ 0xf0
802473e: b29b uxth r3, r3
8024740: 4619 mov r1, r3
8024742: 6878 ldr r0, [r7, #4]
8024744: f7f6 fd44 bl 801b1d0 <pbuf_realloc>
}
8024748: bf00 nop
802474a: 3710 adds r7, #16
802474c: 46bd mov sp, r7
802474e: bd80 pop {r7, pc}
08024750 <dhcp_supplied_address>:
* @return 1 if DHCP supplied netif->ip_addr (states BOUND or RENEWING),
* 0 otherwise
*/
u8_t
dhcp_supplied_address(const struct netif *netif)
{
8024750: b480 push {r7}
8024752: b085 sub sp, #20
8024754: af00 add r7, sp, #0
8024756: 6078 str r0, [r7, #4]
if ((netif != NULL) && (netif_dhcp_data(netif) != NULL)) {
8024758: 687b ldr r3, [r7, #4]
802475a: 2b00 cmp r3, #0
802475c: d017 beq.n 802478e <dhcp_supplied_address+0x3e>
802475e: 687b ldr r3, [r7, #4]
8024760: 6a5b ldr r3, [r3, #36] @ 0x24
8024762: 2b00 cmp r3, #0
8024764: d013 beq.n 802478e <dhcp_supplied_address+0x3e>
struct dhcp *dhcp = netif_dhcp_data(netif);
8024766: 687b ldr r3, [r7, #4]
8024768: 6a5b ldr r3, [r3, #36] @ 0x24
802476a: 60fb str r3, [r7, #12]
return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
802476c: 68fb ldr r3, [r7, #12]
802476e: 795b ldrb r3, [r3, #5]
8024770: 2b0a cmp r3, #10
8024772: d007 beq.n 8024784 <dhcp_supplied_address+0x34>
8024774: 68fb ldr r3, [r7, #12]
8024776: 795b ldrb r3, [r3, #5]
8024778: 2b05 cmp r3, #5
802477a: d003 beq.n 8024784 <dhcp_supplied_address+0x34>
(dhcp->state == DHCP_STATE_REBINDING);
802477c: 68fb ldr r3, [r7, #12]
802477e: 795b ldrb r3, [r3, #5]
return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
8024780: 2b04 cmp r3, #4
8024782: d101 bne.n 8024788 <dhcp_supplied_address+0x38>
8024784: 2301 movs r3, #1
8024786: e000 b.n 802478a <dhcp_supplied_address+0x3a>
8024788: 2300 movs r3, #0
802478a: b2db uxtb r3, r3
802478c: e000 b.n 8024790 <dhcp_supplied_address+0x40>
}
return 0;
802478e: 2300 movs r3, #0
}
8024790: 4618 mov r0, r3
8024792: 3714 adds r7, #20
8024794: 46bd mov sp, r7
8024796: f85d 7b04 ldr.w r7, [sp], #4
802479a: 4770 bx lr
0802479c <etharp_free_entry>:
#endif /* ARP_QUEUEING */
/** Clean up ARP table entries */
static void
etharp_free_entry(int i)
{
802479c: b580 push {r7, lr}
802479e: b082 sub sp, #8
80247a0: af00 add r7, sp, #0
80247a2: 6078 str r0, [r7, #4]
/* remove from SNMP ARP index tree */
mib2_remove_arp_entry(arp_table[i].netif, &arp_table[i].ipaddr);
/* and empty packet queue */
if (arp_table[i].q != NULL) {
80247a4: 492b ldr r1, [pc, #172] @ (8024854 <etharp_free_entry+0xb8>)
80247a6: 687a ldr r2, [r7, #4]
80247a8: 4613 mov r3, r2
80247aa: 005b lsls r3, r3, #1
80247ac: 4413 add r3, r2
80247ae: 00db lsls r3, r3, #3
80247b0: 440b add r3, r1
80247b2: 681b ldr r3, [r3, #0]
80247b4: 2b00 cmp r3, #0
80247b6: d013 beq.n 80247e0 <etharp_free_entry+0x44>
/* remove all queued packets */
LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_free_entry: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q)));
free_etharp_q(arp_table[i].q);
80247b8: 4926 ldr r1, [pc, #152] @ (8024854 <etharp_free_entry+0xb8>)
80247ba: 687a ldr r2, [r7, #4]
80247bc: 4613 mov r3, r2
80247be: 005b lsls r3, r3, #1
80247c0: 4413 add r3, r2
80247c2: 00db lsls r3, r3, #3
80247c4: 440b add r3, r1
80247c6: 681b ldr r3, [r3, #0]
80247c8: 4618 mov r0, r3
80247ca: f7f6 feb7 bl 801b53c <pbuf_free>
arp_table[i].q = NULL;
80247ce: 4921 ldr r1, [pc, #132] @ (8024854 <etharp_free_entry+0xb8>)
80247d0: 687a ldr r2, [r7, #4]
80247d2: 4613 mov r3, r2
80247d4: 005b lsls r3, r3, #1
80247d6: 4413 add r3, r2
80247d8: 00db lsls r3, r3, #3
80247da: 440b add r3, r1
80247dc: 2200 movs r2, #0
80247de: 601a str r2, [r3, #0]
}
/* recycle entry for re-use */
arp_table[i].state = ETHARP_STATE_EMPTY;
80247e0: 491c ldr r1, [pc, #112] @ (8024854 <etharp_free_entry+0xb8>)
80247e2: 687a ldr r2, [r7, #4]
80247e4: 4613 mov r3, r2
80247e6: 005b lsls r3, r3, #1
80247e8: 4413 add r3, r2
80247ea: 00db lsls r3, r3, #3
80247ec: 440b add r3, r1
80247ee: 3314 adds r3, #20
80247f0: 2200 movs r2, #0
80247f2: 701a strb r2, [r3, #0]
#ifdef LWIP_DEBUG
/* for debugging, clean out the complete entry */
arp_table[i].ctime = 0;
80247f4: 4917 ldr r1, [pc, #92] @ (8024854 <etharp_free_entry+0xb8>)
80247f6: 687a ldr r2, [r7, #4]
80247f8: 4613 mov r3, r2
80247fa: 005b lsls r3, r3, #1
80247fc: 4413 add r3, r2
80247fe: 00db lsls r3, r3, #3
8024800: 440b add r3, r1
8024802: 3312 adds r3, #18
8024804: 2200 movs r2, #0
8024806: 801a strh r2, [r3, #0]
arp_table[i].netif = NULL;
8024808: 4912 ldr r1, [pc, #72] @ (8024854 <etharp_free_entry+0xb8>)
802480a: 687a ldr r2, [r7, #4]
802480c: 4613 mov r3, r2
802480e: 005b lsls r3, r3, #1
8024810: 4413 add r3, r2
8024812: 00db lsls r3, r3, #3
8024814: 440b add r3, r1
8024816: 3308 adds r3, #8
8024818: 2200 movs r2, #0
802481a: 601a str r2, [r3, #0]
ip4_addr_set_zero(&arp_table[i].ipaddr);
802481c: 490d ldr r1, [pc, #52] @ (8024854 <etharp_free_entry+0xb8>)
802481e: 687a ldr r2, [r7, #4]
8024820: 4613 mov r3, r2
8024822: 005b lsls r3, r3, #1
8024824: 4413 add r3, r2
8024826: 00db lsls r3, r3, #3
8024828: 440b add r3, r1
802482a: 3304 adds r3, #4
802482c: 2200 movs r2, #0
802482e: 601a str r2, [r3, #0]
arp_table[i].ethaddr = ethzero;
8024830: 4908 ldr r1, [pc, #32] @ (8024854 <etharp_free_entry+0xb8>)
8024832: 687a ldr r2, [r7, #4]
8024834: 4613 mov r3, r2
8024836: 005b lsls r3, r3, #1
8024838: 4413 add r3, r2
802483a: 00db lsls r3, r3, #3
802483c: 440b add r3, r1
802483e: 3308 adds r3, #8
8024840: 4a05 ldr r2, [pc, #20] @ (8024858 <etharp_free_entry+0xbc>)
8024842: 3304 adds r3, #4
8024844: 6810 ldr r0, [r2, #0]
8024846: 6018 str r0, [r3, #0]
8024848: 8892 ldrh r2, [r2, #4]
802484a: 809a strh r2, [r3, #4]
#endif /* LWIP_DEBUG */
}
802484c: bf00 nop
802484e: 3708 adds r7, #8
8024850: 46bd mov sp, r7
8024852: bd80 pop {r7, pc}
8024854: 2402b040 .word 0x2402b040
8024858: 08031ed8 .word 0x08031ed8
0802485c <etharp_tmr>:
* This function should be called every ARP_TMR_INTERVAL milliseconds (1 second),
* in order to expire entries in the ARP table.
*/
void
etharp_tmr(void)
{
802485c: b580 push {r7, lr}
802485e: b082 sub sp, #8
8024860: af00 add r7, sp, #0
int i;
LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n"));
/* remove expired entries from the ARP table */
for (i = 0; i < ARP_TABLE_SIZE; ++i) {
8024862: 2300 movs r3, #0
8024864: 607b str r3, [r7, #4]
8024866: e096 b.n 8024996 <etharp_tmr+0x13a>
u8_t state = arp_table[i].state;
8024868: 494f ldr r1, [pc, #316] @ (80249a8 <etharp_tmr+0x14c>)
802486a: 687a ldr r2, [r7, #4]
802486c: 4613 mov r3, r2
802486e: 005b lsls r3, r3, #1
8024870: 4413 add r3, r2
8024872: 00db lsls r3, r3, #3
8024874: 440b add r3, r1
8024876: 3314 adds r3, #20
8024878: 781b ldrb r3, [r3, #0]
802487a: 70fb strb r3, [r7, #3]
if (state != ETHARP_STATE_EMPTY
802487c: 78fb ldrb r3, [r7, #3]
802487e: 2b00 cmp r3, #0
8024880: f000 8086 beq.w 8024990 <etharp_tmr+0x134>
#if ETHARP_SUPPORT_STATIC_ENTRIES
&& (state != ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
) {
arp_table[i].ctime++;
8024884: 4948 ldr r1, [pc, #288] @ (80249a8 <etharp_tmr+0x14c>)
8024886: 687a ldr r2, [r7, #4]
8024888: 4613 mov r3, r2
802488a: 005b lsls r3, r3, #1
802488c: 4413 add r3, r2
802488e: 00db lsls r3, r3, #3
8024890: 440b add r3, r1
8024892: 3312 adds r3, #18
8024894: 881b ldrh r3, [r3, #0]
8024896: 3301 adds r3, #1
8024898: b298 uxth r0, r3
802489a: 4943 ldr r1, [pc, #268] @ (80249a8 <etharp_tmr+0x14c>)
802489c: 687a ldr r2, [r7, #4]
802489e: 4613 mov r3, r2
80248a0: 005b lsls r3, r3, #1
80248a2: 4413 add r3, r2
80248a4: 00db lsls r3, r3, #3
80248a6: 440b add r3, r1
80248a8: 3312 adds r3, #18
80248aa: 4602 mov r2, r0
80248ac: 801a strh r2, [r3, #0]
if ((arp_table[i].ctime >= ARP_MAXAGE) ||
80248ae: 493e ldr r1, [pc, #248] @ (80249a8 <etharp_tmr+0x14c>)
80248b0: 687a ldr r2, [r7, #4]
80248b2: 4613 mov r3, r2
80248b4: 005b lsls r3, r3, #1
80248b6: 4413 add r3, r2
80248b8: 00db lsls r3, r3, #3
80248ba: 440b add r3, r1
80248bc: 3312 adds r3, #18
80248be: 881b ldrh r3, [r3, #0]
80248c0: f5b3 7f96 cmp.w r3, #300 @ 0x12c
80248c4: d215 bcs.n 80248f2 <etharp_tmr+0x96>
((arp_table[i].state == ETHARP_STATE_PENDING) &&
80248c6: 4938 ldr r1, [pc, #224] @ (80249a8 <etharp_tmr+0x14c>)
80248c8: 687a ldr r2, [r7, #4]
80248ca: 4613 mov r3, r2
80248cc: 005b lsls r3, r3, #1
80248ce: 4413 add r3, r2
80248d0: 00db lsls r3, r3, #3
80248d2: 440b add r3, r1
80248d4: 3314 adds r3, #20
80248d6: 781b ldrb r3, [r3, #0]
if ((arp_table[i].ctime >= ARP_MAXAGE) ||
80248d8: 2b01 cmp r3, #1
80248da: d10e bne.n 80248fa <etharp_tmr+0x9e>
(arp_table[i].ctime >= ARP_MAXPENDING))) {
80248dc: 4932 ldr r1, [pc, #200] @ (80249a8 <etharp_tmr+0x14c>)
80248de: 687a ldr r2, [r7, #4]
80248e0: 4613 mov r3, r2
80248e2: 005b lsls r3, r3, #1
80248e4: 4413 add r3, r2
80248e6: 00db lsls r3, r3, #3
80248e8: 440b add r3, r1
80248ea: 3312 adds r3, #18
80248ec: 881b ldrh r3, [r3, #0]
((arp_table[i].state == ETHARP_STATE_PENDING) &&
80248ee: 2b04 cmp r3, #4
80248f0: d903 bls.n 80248fa <etharp_tmr+0x9e>
/* pending or stable entry has become old! */
LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %d.\n",
arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", i));
/* clean up entries that have just been expired */
etharp_free_entry(i);
80248f2: 6878 ldr r0, [r7, #4]
80248f4: f7ff ff52 bl 802479c <etharp_free_entry>
80248f8: e04a b.n 8024990 <etharp_tmr+0x134>
} else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_1) {
80248fa: 492b ldr r1, [pc, #172] @ (80249a8 <etharp_tmr+0x14c>)
80248fc: 687a ldr r2, [r7, #4]
80248fe: 4613 mov r3, r2
8024900: 005b lsls r3, r3, #1
8024902: 4413 add r3, r2
8024904: 00db lsls r3, r3, #3
8024906: 440b add r3, r1
8024908: 3314 adds r3, #20
802490a: 781b ldrb r3, [r3, #0]
802490c: 2b03 cmp r3, #3
802490e: d10a bne.n 8024926 <etharp_tmr+0xca>
/* Don't send more than one request every 2 seconds. */
arp_table[i].state = ETHARP_STATE_STABLE_REREQUESTING_2;
8024910: 4925 ldr r1, [pc, #148] @ (80249a8 <etharp_tmr+0x14c>)
8024912: 687a ldr r2, [r7, #4]
8024914: 4613 mov r3, r2
8024916: 005b lsls r3, r3, #1
8024918: 4413 add r3, r2
802491a: 00db lsls r3, r3, #3
802491c: 440b add r3, r1
802491e: 3314 adds r3, #20
8024920: 2204 movs r2, #4
8024922: 701a strb r2, [r3, #0]
8024924: e034 b.n 8024990 <etharp_tmr+0x134>
} else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_2) {
8024926: 4920 ldr r1, [pc, #128] @ (80249a8 <etharp_tmr+0x14c>)
8024928: 687a ldr r2, [r7, #4]
802492a: 4613 mov r3, r2
802492c: 005b lsls r3, r3, #1
802492e: 4413 add r3, r2
8024930: 00db lsls r3, r3, #3
8024932: 440b add r3, r1
8024934: 3314 adds r3, #20
8024936: 781b ldrb r3, [r3, #0]
8024938: 2b04 cmp r3, #4
802493a: d10a bne.n 8024952 <etharp_tmr+0xf6>
/* Reset state to stable, so that the next transmitted packet will
re-send an ARP request. */
arp_table[i].state = ETHARP_STATE_STABLE;
802493c: 491a ldr r1, [pc, #104] @ (80249a8 <etharp_tmr+0x14c>)
802493e: 687a ldr r2, [r7, #4]
8024940: 4613 mov r3, r2
8024942: 005b lsls r3, r3, #1
8024944: 4413 add r3, r2
8024946: 00db lsls r3, r3, #3
8024948: 440b add r3, r1
802494a: 3314 adds r3, #20
802494c: 2202 movs r2, #2
802494e: 701a strb r2, [r3, #0]
8024950: e01e b.n 8024990 <etharp_tmr+0x134>
} else if (arp_table[i].state == ETHARP_STATE_PENDING) {
8024952: 4915 ldr r1, [pc, #84] @ (80249a8 <etharp_tmr+0x14c>)
8024954: 687a ldr r2, [r7, #4]
8024956: 4613 mov r3, r2
8024958: 005b lsls r3, r3, #1
802495a: 4413 add r3, r2
802495c: 00db lsls r3, r3, #3
802495e: 440b add r3, r1
8024960: 3314 adds r3, #20
8024962: 781b ldrb r3, [r3, #0]
8024964: 2b01 cmp r3, #1
8024966: d113 bne.n 8024990 <etharp_tmr+0x134>
/* still pending, resend an ARP query */
etharp_request(arp_table[i].netif, &arp_table[i].ipaddr);
8024968: 490f ldr r1, [pc, #60] @ (80249a8 <etharp_tmr+0x14c>)
802496a: 687a ldr r2, [r7, #4]
802496c: 4613 mov r3, r2
802496e: 005b lsls r3, r3, #1
8024970: 4413 add r3, r2
8024972: 00db lsls r3, r3, #3
8024974: 440b add r3, r1
8024976: 3308 adds r3, #8
8024978: 6818 ldr r0, [r3, #0]
802497a: 687a ldr r2, [r7, #4]
802497c: 4613 mov r3, r2
802497e: 005b lsls r3, r3, #1
8024980: 4413 add r3, r2
8024982: 00db lsls r3, r3, #3
8024984: 4a08 ldr r2, [pc, #32] @ (80249a8 <etharp_tmr+0x14c>)
8024986: 4413 add r3, r2
8024988: 3304 adds r3, #4
802498a: 4619 mov r1, r3
802498c: f000 fe76 bl 802567c <etharp_request>
for (i = 0; i < ARP_TABLE_SIZE; ++i) {
8024990: 687b ldr r3, [r7, #4]
8024992: 3301 adds r3, #1
8024994: 607b str r3, [r7, #4]
8024996: 687b ldr r3, [r7, #4]
8024998: 2b09 cmp r3, #9
802499a: f77f af65 ble.w 8024868 <etharp_tmr+0xc>
}
}
}
}
802499e: bf00 nop
80249a0: bf00 nop
80249a2: 3708 adds r7, #8
80249a4: 46bd mov sp, r7
80249a6: bd80 pop {r7, pc}
80249a8: 2402b040 .word 0x2402b040
080249ac <etharp_find_entry>:
* @return The ARP entry index that matched or is created, ERR_MEM if no
* entry is found or could be recycled.
*/
static s16_t
etharp_find_entry(const ip4_addr_t *ipaddr, u8_t flags, struct netif *netif)
{
80249ac: b580 push {r7, lr}
80249ae: b08a sub sp, #40 @ 0x28
80249b0: af00 add r7, sp, #0
80249b2: 60f8 str r0, [r7, #12]
80249b4: 460b mov r3, r1
80249b6: 607a str r2, [r7, #4]
80249b8: 72fb strb r3, [r7, #11]
s16_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE;
80249ba: 230a movs r3, #10
80249bc: 843b strh r3, [r7, #32]
80249be: 230a movs r3, #10
80249c0: 847b strh r3, [r7, #34] @ 0x22
s16_t empty = ARP_TABLE_SIZE;
80249c2: 230a movs r3, #10
80249c4: 84bb strh r3, [r7, #36] @ 0x24
s16_t i = 0;
80249c6: 2300 movs r3, #0
80249c8: 84fb strh r3, [r7, #38] @ 0x26
/* oldest entry with packets on queue */
s16_t old_queue = ARP_TABLE_SIZE;
80249ca: 230a movs r3, #10
80249cc: 83fb strh r3, [r7, #30]
/* its age */
u16_t age_queue = 0, age_pending = 0, age_stable = 0;
80249ce: 2300 movs r3, #0
80249d0: 83bb strh r3, [r7, #28]
80249d2: 2300 movs r3, #0
80249d4: 837b strh r3, [r7, #26]
80249d6: 2300 movs r3, #0
80249d8: 833b strh r3, [r7, #24]
* 4) remember the oldest pending entry with queued packets (if any)
* 5) search for a matching IP entry, either pending or stable
* until 5 matches, or all entries are searched for.
*/
for (i = 0; i < ARP_TABLE_SIZE; ++i) {
80249da: 2300 movs r3, #0
80249dc: 84fb strh r3, [r7, #38] @ 0x26
80249de: e0ae b.n 8024b3e <etharp_find_entry+0x192>
u8_t state = arp_table[i].state;
80249e0: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
80249e4: 49a6 ldr r1, [pc, #664] @ (8024c80 <etharp_find_entry+0x2d4>)
80249e6: 4613 mov r3, r2
80249e8: 005b lsls r3, r3, #1
80249ea: 4413 add r3, r2
80249ec: 00db lsls r3, r3, #3
80249ee: 440b add r3, r1
80249f0: 3314 adds r3, #20
80249f2: 781b ldrb r3, [r3, #0]
80249f4: 75fb strb r3, [r7, #23]
/* no empty entry found yet and now we do find one? */
if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) {
80249f6: f9b7 3024 ldrsh.w r3, [r7, #36] @ 0x24
80249fa: 2b0a cmp r3, #10
80249fc: d105 bne.n 8024a0a <etharp_find_entry+0x5e>
80249fe: 7dfb ldrb r3, [r7, #23]
8024a00: 2b00 cmp r3, #0
8024a02: d102 bne.n 8024a0a <etharp_find_entry+0x5e>
LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_find_entry: found empty entry %d\n", (int)i));
/* remember first empty entry */
empty = i;
8024a04: 8cfb ldrh r3, [r7, #38] @ 0x26
8024a06: 84bb strh r3, [r7, #36] @ 0x24
8024a08: e095 b.n 8024b36 <etharp_find_entry+0x18a>
} else if (state != ETHARP_STATE_EMPTY) {
8024a0a: 7dfb ldrb r3, [r7, #23]
8024a0c: 2b00 cmp r3, #0
8024a0e: f000 8092 beq.w 8024b36 <etharp_find_entry+0x18a>
LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE",
8024a12: 7dfb ldrb r3, [r7, #23]
8024a14: 2b01 cmp r3, #1
8024a16: d009 beq.n 8024a2c <etharp_find_entry+0x80>
8024a18: 7dfb ldrb r3, [r7, #23]
8024a1a: 2b01 cmp r3, #1
8024a1c: d806 bhi.n 8024a2c <etharp_find_entry+0x80>
8024a1e: 4b99 ldr r3, [pc, #612] @ (8024c84 <etharp_find_entry+0x2d8>)
8024a20: f240 1223 movw r2, #291 @ 0x123
8024a24: 4998 ldr r1, [pc, #608] @ (8024c88 <etharp_find_entry+0x2dc>)
8024a26: 4899 ldr r0, [pc, #612] @ (8024c8c <etharp_find_entry+0x2e0>)
8024a28: f006 f800 bl 802aa2c <iprintf>
state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE);
/* if given, does IP address match IP address in ARP entry? */
if (ipaddr && ip4_addr_cmp(ipaddr, &arp_table[i].ipaddr)
8024a2c: 68fb ldr r3, [r7, #12]
8024a2e: 2b00 cmp r3, #0
8024a30: d020 beq.n 8024a74 <etharp_find_entry+0xc8>
8024a32: 68fb ldr r3, [r7, #12]
8024a34: 6819 ldr r1, [r3, #0]
8024a36: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024a3a: 4891 ldr r0, [pc, #580] @ (8024c80 <etharp_find_entry+0x2d4>)
8024a3c: 4613 mov r3, r2
8024a3e: 005b lsls r3, r3, #1
8024a40: 4413 add r3, r2
8024a42: 00db lsls r3, r3, #3
8024a44: 4403 add r3, r0
8024a46: 3304 adds r3, #4
8024a48: 681b ldr r3, [r3, #0]
8024a4a: 4299 cmp r1, r3
8024a4c: d112 bne.n 8024a74 <etharp_find_entry+0xc8>
#if ETHARP_TABLE_MATCH_NETIF
&& ((netif == NULL) || (netif == arp_table[i].netif))
8024a4e: 687b ldr r3, [r7, #4]
8024a50: 2b00 cmp r3, #0
8024a52: d00c beq.n 8024a6e <etharp_find_entry+0xc2>
8024a54: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024a58: 4989 ldr r1, [pc, #548] @ (8024c80 <etharp_find_entry+0x2d4>)
8024a5a: 4613 mov r3, r2
8024a5c: 005b lsls r3, r3, #1
8024a5e: 4413 add r3, r2
8024a60: 00db lsls r3, r3, #3
8024a62: 440b add r3, r1
8024a64: 3308 adds r3, #8
8024a66: 681b ldr r3, [r3, #0]
8024a68: 687a ldr r2, [r7, #4]
8024a6a: 429a cmp r2, r3
8024a6c: d102 bne.n 8024a74 <etharp_find_entry+0xc8>
#endif /* ETHARP_TABLE_MATCH_NETIF */
) {
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: found matching entry %d\n", (int)i));
/* found exact IP address match, simply bail out */
return i;
8024a6e: f9b7 3026 ldrsh.w r3, [r7, #38] @ 0x26
8024a72: e100 b.n 8024c76 <etharp_find_entry+0x2ca>
}
/* pending entry? */
if (state == ETHARP_STATE_PENDING) {
8024a74: 7dfb ldrb r3, [r7, #23]
8024a76: 2b01 cmp r3, #1
8024a78: d140 bne.n 8024afc <etharp_find_entry+0x150>
/* pending with queued packets? */
if (arp_table[i].q != NULL) {
8024a7a: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024a7e: 4980 ldr r1, [pc, #512] @ (8024c80 <etharp_find_entry+0x2d4>)
8024a80: 4613 mov r3, r2
8024a82: 005b lsls r3, r3, #1
8024a84: 4413 add r3, r2
8024a86: 00db lsls r3, r3, #3
8024a88: 440b add r3, r1
8024a8a: 681b ldr r3, [r3, #0]
8024a8c: 2b00 cmp r3, #0
8024a8e: d01a beq.n 8024ac6 <etharp_find_entry+0x11a>
if (arp_table[i].ctime >= age_queue) {
8024a90: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024a94: 497a ldr r1, [pc, #488] @ (8024c80 <etharp_find_entry+0x2d4>)
8024a96: 4613 mov r3, r2
8024a98: 005b lsls r3, r3, #1
8024a9a: 4413 add r3, r2
8024a9c: 00db lsls r3, r3, #3
8024a9e: 440b add r3, r1
8024aa0: 3312 adds r3, #18
8024aa2: 881b ldrh r3, [r3, #0]
8024aa4: 8bba ldrh r2, [r7, #28]
8024aa6: 429a cmp r2, r3
8024aa8: d845 bhi.n 8024b36 <etharp_find_entry+0x18a>
old_queue = i;
8024aaa: 8cfb ldrh r3, [r7, #38] @ 0x26
8024aac: 83fb strh r3, [r7, #30]
age_queue = arp_table[i].ctime;
8024aae: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024ab2: 4973 ldr r1, [pc, #460] @ (8024c80 <etharp_find_entry+0x2d4>)
8024ab4: 4613 mov r3, r2
8024ab6: 005b lsls r3, r3, #1
8024ab8: 4413 add r3, r2
8024aba: 00db lsls r3, r3, #3
8024abc: 440b add r3, r1
8024abe: 3312 adds r3, #18
8024ac0: 881b ldrh r3, [r3, #0]
8024ac2: 83bb strh r3, [r7, #28]
8024ac4: e037 b.n 8024b36 <etharp_find_entry+0x18a>
}
} else
/* pending without queued packets? */
{
if (arp_table[i].ctime >= age_pending) {
8024ac6: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024aca: 496d ldr r1, [pc, #436] @ (8024c80 <etharp_find_entry+0x2d4>)
8024acc: 4613 mov r3, r2
8024ace: 005b lsls r3, r3, #1
8024ad0: 4413 add r3, r2
8024ad2: 00db lsls r3, r3, #3
8024ad4: 440b add r3, r1
8024ad6: 3312 adds r3, #18
8024ad8: 881b ldrh r3, [r3, #0]
8024ada: 8b7a ldrh r2, [r7, #26]
8024adc: 429a cmp r2, r3
8024ade: d82a bhi.n 8024b36 <etharp_find_entry+0x18a>
old_pending = i;
8024ae0: 8cfb ldrh r3, [r7, #38] @ 0x26
8024ae2: 843b strh r3, [r7, #32]
age_pending = arp_table[i].ctime;
8024ae4: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024ae8: 4965 ldr r1, [pc, #404] @ (8024c80 <etharp_find_entry+0x2d4>)
8024aea: 4613 mov r3, r2
8024aec: 005b lsls r3, r3, #1
8024aee: 4413 add r3, r2
8024af0: 00db lsls r3, r3, #3
8024af2: 440b add r3, r1
8024af4: 3312 adds r3, #18
8024af6: 881b ldrh r3, [r3, #0]
8024af8: 837b strh r3, [r7, #26]
8024afa: e01c b.n 8024b36 <etharp_find_entry+0x18a>
}
}
/* stable entry? */
} else if (state >= ETHARP_STATE_STABLE) {
8024afc: 7dfb ldrb r3, [r7, #23]
8024afe: 2b01 cmp r3, #1
8024b00: d919 bls.n 8024b36 <etharp_find_entry+0x18a>
/* don't record old_stable for static entries since they never expire */
if (state < ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
{
/* remember entry with oldest stable entry in oldest, its age in maxtime */
if (arp_table[i].ctime >= age_stable) {
8024b02: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024b06: 495e ldr r1, [pc, #376] @ (8024c80 <etharp_find_entry+0x2d4>)
8024b08: 4613 mov r3, r2
8024b0a: 005b lsls r3, r3, #1
8024b0c: 4413 add r3, r2
8024b0e: 00db lsls r3, r3, #3
8024b10: 440b add r3, r1
8024b12: 3312 adds r3, #18
8024b14: 881b ldrh r3, [r3, #0]
8024b16: 8b3a ldrh r2, [r7, #24]
8024b18: 429a cmp r2, r3
8024b1a: d80c bhi.n 8024b36 <etharp_find_entry+0x18a>
old_stable = i;
8024b1c: 8cfb ldrh r3, [r7, #38] @ 0x26
8024b1e: 847b strh r3, [r7, #34] @ 0x22
age_stable = arp_table[i].ctime;
8024b20: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024b24: 4956 ldr r1, [pc, #344] @ (8024c80 <etharp_find_entry+0x2d4>)
8024b26: 4613 mov r3, r2
8024b28: 005b lsls r3, r3, #1
8024b2a: 4413 add r3, r2
8024b2c: 00db lsls r3, r3, #3
8024b2e: 440b add r3, r1
8024b30: 3312 adds r3, #18
8024b32: 881b ldrh r3, [r3, #0]
8024b34: 833b strh r3, [r7, #24]
for (i = 0; i < ARP_TABLE_SIZE; ++i) {
8024b36: 8cfb ldrh r3, [r7, #38] @ 0x26
8024b38: 3301 adds r3, #1
8024b3a: b29b uxth r3, r3
8024b3c: 84fb strh r3, [r7, #38] @ 0x26
8024b3e: f9b7 3026 ldrsh.w r3, [r7, #38] @ 0x26
8024b42: 2b09 cmp r3, #9
8024b44: f77f af4c ble.w 80249e0 <etharp_find_entry+0x34>
}
}
/* { we have no match } => try to create a new entry */
/* don't create new entry, only search? */
if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) ||
8024b48: 7afb ldrb r3, [r7, #11]
8024b4a: f003 0302 and.w r3, r3, #2
8024b4e: 2b00 cmp r3, #0
8024b50: d108 bne.n 8024b64 <etharp_find_entry+0x1b8>
8024b52: f9b7 3024 ldrsh.w r3, [r7, #36] @ 0x24
8024b56: 2b0a cmp r3, #10
8024b58: d107 bne.n 8024b6a <etharp_find_entry+0x1be>
/* or no empty entry found and not allowed to recycle? */
((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) {
8024b5a: 7afb ldrb r3, [r7, #11]
8024b5c: f003 0301 and.w r3, r3, #1
8024b60: 2b00 cmp r3, #0
8024b62: d102 bne.n 8024b6a <etharp_find_entry+0x1be>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty entry found and not allowed to recycle\n"));
return (s16_t)ERR_MEM;
8024b64: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8024b68: e085 b.n 8024c76 <etharp_find_entry+0x2ca>
*
* { ETHARP_FLAG_TRY_HARD is set at this point }
*/
/* 1) empty entry available? */
if (empty < ARP_TABLE_SIZE) {
8024b6a: f9b7 3024 ldrsh.w r3, [r7, #36] @ 0x24
8024b6e: 2b09 cmp r3, #9
8024b70: dc02 bgt.n 8024b78 <etharp_find_entry+0x1cc>
i = empty;
8024b72: 8cbb ldrh r3, [r7, #36] @ 0x24
8024b74: 84fb strh r3, [r7, #38] @ 0x26
8024b76: e039 b.n 8024bec <etharp_find_entry+0x240>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting empty entry %d\n", (int)i));
} else {
/* 2) found recyclable stable entry? */
if (old_stable < ARP_TABLE_SIZE) {
8024b78: f9b7 3022 ldrsh.w r3, [r7, #34] @ 0x22
8024b7c: 2b09 cmp r3, #9
8024b7e: dc14 bgt.n 8024baa <etharp_find_entry+0x1fe>
/* recycle oldest stable*/
i = old_stable;
8024b80: 8c7b ldrh r3, [r7, #34] @ 0x22
8024b82: 84fb strh r3, [r7, #38] @ 0x26
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest stable entry %d\n", (int)i));
/* no queued packets should exist on stable entries */
LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL);
8024b84: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024b88: 493d ldr r1, [pc, #244] @ (8024c80 <etharp_find_entry+0x2d4>)
8024b8a: 4613 mov r3, r2
8024b8c: 005b lsls r3, r3, #1
8024b8e: 4413 add r3, r2
8024b90: 00db lsls r3, r3, #3
8024b92: 440b add r3, r1
8024b94: 681b ldr r3, [r3, #0]
8024b96: 2b00 cmp r3, #0
8024b98: d018 beq.n 8024bcc <etharp_find_entry+0x220>
8024b9a: 4b3a ldr r3, [pc, #232] @ (8024c84 <etharp_find_entry+0x2d8>)
8024b9c: f240 126d movw r2, #365 @ 0x16d
8024ba0: 493b ldr r1, [pc, #236] @ (8024c90 <etharp_find_entry+0x2e4>)
8024ba2: 483a ldr r0, [pc, #232] @ (8024c8c <etharp_find_entry+0x2e0>)
8024ba4: f005 ff42 bl 802aa2c <iprintf>
8024ba8: e010 b.n 8024bcc <etharp_find_entry+0x220>
/* 3) found recyclable pending entry without queued packets? */
} else if (old_pending < ARP_TABLE_SIZE) {
8024baa: f9b7 3020 ldrsh.w r3, [r7, #32]
8024bae: 2b09 cmp r3, #9
8024bb0: dc02 bgt.n 8024bb8 <etharp_find_entry+0x20c>
/* recycle oldest pending */
i = old_pending;
8024bb2: 8c3b ldrh r3, [r7, #32]
8024bb4: 84fb strh r3, [r7, #38] @ 0x26
8024bb6: e009 b.n 8024bcc <etharp_find_entry+0x220>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d (without queue)\n", (int)i));
/* 4) found recyclable pending entry with queued packets? */
} else if (old_queue < ARP_TABLE_SIZE) {
8024bb8: f9b7 301e ldrsh.w r3, [r7, #30]
8024bbc: 2b09 cmp r3, #9
8024bbe: dc02 bgt.n 8024bc6 <etharp_find_entry+0x21a>
/* recycle oldest pending (queued packets are free in etharp_free_entry) */
i = old_queue;
8024bc0: 8bfb ldrh r3, [r7, #30]
8024bc2: 84fb strh r3, [r7, #38] @ 0x26
8024bc4: e002 b.n 8024bcc <etharp_find_entry+0x220>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d, freeing packet queue %p\n", (int)i, (void *)(arp_table[i].q)));
/* no empty or recyclable entries found */
} else {
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty or recyclable entries found\n"));
return (s16_t)ERR_MEM;
8024bc6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8024bca: e054 b.n 8024c76 <etharp_find_entry+0x2ca>
}
/* { empty or recyclable entry found } */
LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
8024bcc: f9b7 3026 ldrsh.w r3, [r7, #38] @ 0x26
8024bd0: 2b09 cmp r3, #9
8024bd2: dd06 ble.n 8024be2 <etharp_find_entry+0x236>
8024bd4: 4b2b ldr r3, [pc, #172] @ (8024c84 <etharp_find_entry+0x2d8>)
8024bd6: f240 127f movw r2, #383 @ 0x17f
8024bda: 492e ldr r1, [pc, #184] @ (8024c94 <etharp_find_entry+0x2e8>)
8024bdc: 482b ldr r0, [pc, #172] @ (8024c8c <etharp_find_entry+0x2e0>)
8024bde: f005 ff25 bl 802aa2c <iprintf>
etharp_free_entry(i);
8024be2: f9b7 3026 ldrsh.w r3, [r7, #38] @ 0x26
8024be6: 4618 mov r0, r3
8024be8: f7ff fdd8 bl 802479c <etharp_free_entry>
}
LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
8024bec: f9b7 3026 ldrsh.w r3, [r7, #38] @ 0x26
8024bf0: 2b09 cmp r3, #9
8024bf2: dd06 ble.n 8024c02 <etharp_find_entry+0x256>
8024bf4: 4b23 ldr r3, [pc, #140] @ (8024c84 <etharp_find_entry+0x2d8>)
8024bf6: f240 1283 movw r2, #387 @ 0x183
8024bfa: 4926 ldr r1, [pc, #152] @ (8024c94 <etharp_find_entry+0x2e8>)
8024bfc: 4823 ldr r0, [pc, #140] @ (8024c8c <etharp_find_entry+0x2e0>)
8024bfe: f005 ff15 bl 802aa2c <iprintf>
LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY",
8024c02: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024c06: 491e ldr r1, [pc, #120] @ (8024c80 <etharp_find_entry+0x2d4>)
8024c08: 4613 mov r3, r2
8024c0a: 005b lsls r3, r3, #1
8024c0c: 4413 add r3, r2
8024c0e: 00db lsls r3, r3, #3
8024c10: 440b add r3, r1
8024c12: 3314 adds r3, #20
8024c14: 781b ldrb r3, [r3, #0]
8024c16: 2b00 cmp r3, #0
8024c18: d006 beq.n 8024c28 <etharp_find_entry+0x27c>
8024c1a: 4b1a ldr r3, [pc, #104] @ (8024c84 <etharp_find_entry+0x2d8>)
8024c1c: f44f 72c2 mov.w r2, #388 @ 0x184
8024c20: 491d ldr r1, [pc, #116] @ (8024c98 <etharp_find_entry+0x2ec>)
8024c22: 481a ldr r0, [pc, #104] @ (8024c8c <etharp_find_entry+0x2e0>)
8024c24: f005 ff02 bl 802aa2c <iprintf>
arp_table[i].state == ETHARP_STATE_EMPTY);
/* IP address given? */
if (ipaddr != NULL) {
8024c28: 68fb ldr r3, [r7, #12]
8024c2a: 2b00 cmp r3, #0
8024c2c: d00b beq.n 8024c46 <etharp_find_entry+0x29a>
/* set IP address */
ip4_addr_copy(arp_table[i].ipaddr, *ipaddr);
8024c2e: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024c32: 68fb ldr r3, [r7, #12]
8024c34: 6819 ldr r1, [r3, #0]
8024c36: 4812 ldr r0, [pc, #72] @ (8024c80 <etharp_find_entry+0x2d4>)
8024c38: 4613 mov r3, r2
8024c3a: 005b lsls r3, r3, #1
8024c3c: 4413 add r3, r2
8024c3e: 00db lsls r3, r3, #3
8024c40: 4403 add r3, r0
8024c42: 3304 adds r3, #4
8024c44: 6019 str r1, [r3, #0]
}
arp_table[i].ctime = 0;
8024c46: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024c4a: 490d ldr r1, [pc, #52] @ (8024c80 <etharp_find_entry+0x2d4>)
8024c4c: 4613 mov r3, r2
8024c4e: 005b lsls r3, r3, #1
8024c50: 4413 add r3, r2
8024c52: 00db lsls r3, r3, #3
8024c54: 440b add r3, r1
8024c56: 3312 adds r3, #18
8024c58: 2200 movs r2, #0
8024c5a: 801a strh r2, [r3, #0]
#if ETHARP_TABLE_MATCH_NETIF
arp_table[i].netif = netif;
8024c5c: f9b7 2026 ldrsh.w r2, [r7, #38] @ 0x26
8024c60: 4907 ldr r1, [pc, #28] @ (8024c80 <etharp_find_entry+0x2d4>)
8024c62: 4613 mov r3, r2
8024c64: 005b lsls r3, r3, #1
8024c66: 4413 add r3, r2
8024c68: 00db lsls r3, r3, #3
8024c6a: 440b add r3, r1
8024c6c: 3308 adds r3, #8
8024c6e: 687a ldr r2, [r7, #4]
8024c70: 601a str r2, [r3, #0]
#endif /* ETHARP_TABLE_MATCH_NETIF */
return (s16_t)i;
8024c72: f9b7 3026 ldrsh.w r3, [r7, #38] @ 0x26
}
8024c76: 4618 mov r0, r3
8024c78: 3728 adds r7, #40 @ 0x28
8024c7a: 46bd mov sp, r7
8024c7c: bd80 pop {r7, pc}
8024c7e: bf00 nop
8024c80: 2402b040 .word 0x2402b040
8024c84: 0803143c .word 0x0803143c
8024c88: 08031474 .word 0x08031474
8024c8c: 080314b4 .word 0x080314b4
8024c90: 080314dc .word 0x080314dc
8024c94: 080314f4 .word 0x080314f4
8024c98: 08031508 .word 0x08031508
08024c9c <etharp_update_arp_entry>:
*
* @see pbuf_free()
*/
static err_t
etharp_update_arp_entry(struct netif *netif, const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags)
{
8024c9c: b580 push {r7, lr}
8024c9e: b088 sub sp, #32
8024ca0: af02 add r7, sp, #8
8024ca2: 60f8 str r0, [r7, #12]
8024ca4: 60b9 str r1, [r7, #8]
8024ca6: 607a str r2, [r7, #4]
8024ca8: 70fb strb r3, [r7, #3]
s16_t i;
LWIP_ASSERT("netif->hwaddr_len == ETH_HWADDR_LEN", netif->hwaddr_len == ETH_HWADDR_LEN);
8024caa: 68fb ldr r3, [r7, #12]
8024cac: f893 3030 ldrb.w r3, [r3, #48] @ 0x30
8024cb0: 2b06 cmp r3, #6
8024cb2: d006 beq.n 8024cc2 <etharp_update_arp_entry+0x26>
8024cb4: 4b48 ldr r3, [pc, #288] @ (8024dd8 <etharp_update_arp_entry+0x13c>)
8024cb6: f240 12a9 movw r2, #425 @ 0x1a9
8024cba: 4948 ldr r1, [pc, #288] @ (8024ddc <etharp_update_arp_entry+0x140>)
8024cbc: 4848 ldr r0, [pc, #288] @ (8024de0 <etharp_update_arp_entry+0x144>)
8024cbe: f005 feb5 bl 802aa2c <iprintf>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n",
ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr),
(u16_t)ethaddr->addr[0], (u16_t)ethaddr->addr[1], (u16_t)ethaddr->addr[2],
(u16_t)ethaddr->addr[3], (u16_t)ethaddr->addr[4], (u16_t)ethaddr->addr[5]));
/* non-unicast address? */
if (ip4_addr_isany(ipaddr) ||
8024cc2: 68bb ldr r3, [r7, #8]
8024cc4: 2b00 cmp r3, #0
8024cc6: d012 beq.n 8024cee <etharp_update_arp_entry+0x52>
8024cc8: 68bb ldr r3, [r7, #8]
8024cca: 681b ldr r3, [r3, #0]
8024ccc: 2b00 cmp r3, #0
8024cce: d00e beq.n 8024cee <etharp_update_arp_entry+0x52>
ip4_addr_isbroadcast(ipaddr, netif) ||
8024cd0: 68bb ldr r3, [r7, #8]
8024cd2: 681b ldr r3, [r3, #0]
8024cd4: 68f9 ldr r1, [r7, #12]
8024cd6: 4618 mov r0, r3
8024cd8: f001 f952 bl 8025f80 <ip4_addr_isbroadcast_u32>
8024cdc: 4603 mov r3, r0
if (ip4_addr_isany(ipaddr) ||
8024cde: 2b00 cmp r3, #0
8024ce0: d105 bne.n 8024cee <etharp_update_arp_entry+0x52>
ip4_addr_ismulticast(ipaddr)) {
8024ce2: 68bb ldr r3, [r7, #8]
8024ce4: 681b ldr r3, [r3, #0]
8024ce6: f003 03f0 and.w r3, r3, #240 @ 0xf0
ip4_addr_isbroadcast(ipaddr, netif) ||
8024cea: 2be0 cmp r3, #224 @ 0xe0
8024cec: d102 bne.n 8024cf4 <etharp_update_arp_entry+0x58>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: will not add non-unicast IP address to ARP cache\n"));
return ERR_ARG;
8024cee: f06f 030f mvn.w r3, #15
8024cf2: e06c b.n 8024dce <etharp_update_arp_entry+0x132>
}
/* find or create ARP entry */
i = etharp_find_entry(ipaddr, flags, netif);
8024cf4: 78fb ldrb r3, [r7, #3]
8024cf6: 68fa ldr r2, [r7, #12]
8024cf8: 4619 mov r1, r3
8024cfa: 68b8 ldr r0, [r7, #8]
8024cfc: f7ff fe56 bl 80249ac <etharp_find_entry>
8024d00: 4603 mov r3, r0
8024d02: 82fb strh r3, [r7, #22]
/* bail out if no entry could be found */
if (i < 0) {
8024d04: f9b7 3016 ldrsh.w r3, [r7, #22]
8024d08: 2b00 cmp r3, #0
8024d0a: da02 bge.n 8024d12 <etharp_update_arp_entry+0x76>
return (err_t)i;
8024d0c: 8afb ldrh r3, [r7, #22]
8024d0e: b25b sxtb r3, r3
8024d10: e05d b.n 8024dce <etharp_update_arp_entry+0x132>
return ERR_VAL;
} else
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
{
/* mark it stable */
arp_table[i].state = ETHARP_STATE_STABLE;
8024d12: f9b7 2016 ldrsh.w r2, [r7, #22]
8024d16: 4933 ldr r1, [pc, #204] @ (8024de4 <etharp_update_arp_entry+0x148>)
8024d18: 4613 mov r3, r2
8024d1a: 005b lsls r3, r3, #1
8024d1c: 4413 add r3, r2
8024d1e: 00db lsls r3, r3, #3
8024d20: 440b add r3, r1
8024d22: 3314 adds r3, #20
8024d24: 2202 movs r2, #2
8024d26: 701a strb r2, [r3, #0]
}
/* record network interface */
arp_table[i].netif = netif;
8024d28: f9b7 2016 ldrsh.w r2, [r7, #22]
8024d2c: 492d ldr r1, [pc, #180] @ (8024de4 <etharp_update_arp_entry+0x148>)
8024d2e: 4613 mov r3, r2
8024d30: 005b lsls r3, r3, #1
8024d32: 4413 add r3, r2
8024d34: 00db lsls r3, r3, #3
8024d36: 440b add r3, r1
8024d38: 3308 adds r3, #8
8024d3a: 68fa ldr r2, [r7, #12]
8024d3c: 601a str r2, [r3, #0]
/* insert in SNMP ARP index tree */
mib2_add_arp_entry(netif, &arp_table[i].ipaddr);
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: updating stable entry %"S16_F"\n", i));
/* update address */
SMEMCPY(&arp_table[i].ethaddr, ethaddr, ETH_HWADDR_LEN);
8024d3e: f9b7 2016 ldrsh.w r2, [r7, #22]
8024d42: 4613 mov r3, r2
8024d44: 005b lsls r3, r3, #1
8024d46: 4413 add r3, r2
8024d48: 00db lsls r3, r3, #3
8024d4a: 3308 adds r3, #8
8024d4c: 4a25 ldr r2, [pc, #148] @ (8024de4 <etharp_update_arp_entry+0x148>)
8024d4e: 4413 add r3, r2
8024d50: 3304 adds r3, #4
8024d52: 2206 movs r2, #6
8024d54: 6879 ldr r1, [r7, #4]
8024d56: 4618 mov r0, r3
8024d58: f006 f8f1 bl 802af3e <memcpy>
/* reset time stamp */
arp_table[i].ctime = 0;
8024d5c: f9b7 2016 ldrsh.w r2, [r7, #22]
8024d60: 4920 ldr r1, [pc, #128] @ (8024de4 <etharp_update_arp_entry+0x148>)
8024d62: 4613 mov r3, r2
8024d64: 005b lsls r3, r3, #1
8024d66: 4413 add r3, r2
8024d68: 00db lsls r3, r3, #3
8024d6a: 440b add r3, r1
8024d6c: 3312 adds r3, #18
8024d6e: 2200 movs r2, #0
8024d70: 801a strh r2, [r3, #0]
/* get the packet pointer */
p = q->p;
/* now queue entry can be freed */
memp_free(MEMP_ARP_QUEUE, q);
#else /* ARP_QUEUEING */
if (arp_table[i].q != NULL) {
8024d72: f9b7 2016 ldrsh.w r2, [r7, #22]
8024d76: 491b ldr r1, [pc, #108] @ (8024de4 <etharp_update_arp_entry+0x148>)
8024d78: 4613 mov r3, r2
8024d7a: 005b lsls r3, r3, #1
8024d7c: 4413 add r3, r2
8024d7e: 00db lsls r3, r3, #3
8024d80: 440b add r3, r1
8024d82: 681b ldr r3, [r3, #0]
8024d84: 2b00 cmp r3, #0
8024d86: d021 beq.n 8024dcc <etharp_update_arp_entry+0x130>
struct pbuf *p = arp_table[i].q;
8024d88: f9b7 2016 ldrsh.w r2, [r7, #22]
8024d8c: 4915 ldr r1, [pc, #84] @ (8024de4 <etharp_update_arp_entry+0x148>)
8024d8e: 4613 mov r3, r2
8024d90: 005b lsls r3, r3, #1
8024d92: 4413 add r3, r2
8024d94: 00db lsls r3, r3, #3
8024d96: 440b add r3, r1
8024d98: 681b ldr r3, [r3, #0]
8024d9a: 613b str r3, [r7, #16]
arp_table[i].q = NULL;
8024d9c: f9b7 2016 ldrsh.w r2, [r7, #22]
8024da0: 4910 ldr r1, [pc, #64] @ (8024de4 <etharp_update_arp_entry+0x148>)
8024da2: 4613 mov r3, r2
8024da4: 005b lsls r3, r3, #1
8024da6: 4413 add r3, r2
8024da8: 00db lsls r3, r3, #3
8024daa: 440b add r3, r1
8024dac: 2200 movs r2, #0
8024dae: 601a str r2, [r3, #0]
#endif /* ARP_QUEUEING */
/* send the queued IP packet */
ethernet_output(netif, p, (struct eth_addr *)(netif->hwaddr), ethaddr, ETHTYPE_IP);
8024db0: 68fb ldr r3, [r7, #12]
8024db2: f103 022a add.w r2, r3, #42 @ 0x2a
8024db6: f44f 6300 mov.w r3, #2048 @ 0x800
8024dba: 9300 str r3, [sp, #0]
8024dbc: 687b ldr r3, [r7, #4]
8024dbe: 6939 ldr r1, [r7, #16]
8024dc0: 68f8 ldr r0, [r7, #12]
8024dc2: f002 f9bb bl 802713c <ethernet_output>
/* free the queued IP packet */
pbuf_free(p);
8024dc6: 6938 ldr r0, [r7, #16]
8024dc8: f7f6 fbb8 bl 801b53c <pbuf_free>
}
return ERR_OK;
8024dcc: 2300 movs r3, #0
}
8024dce: 4618 mov r0, r3
8024dd0: 3718 adds r7, #24
8024dd2: 46bd mov sp, r7
8024dd4: bd80 pop {r7, pc}
8024dd6: bf00 nop
8024dd8: 0803143c .word 0x0803143c
8024ddc: 08031534 .word 0x08031534
8024de0: 080314b4 .word 0x080314b4
8024de4: 2402b040 .word 0x2402b040
08024de8 <etharp_cleanup_netif>:
*
* @param netif points to a network interface
*/
void
etharp_cleanup_netif(struct netif *netif)
{
8024de8: b580 push {r7, lr}
8024dea: b084 sub sp, #16
8024dec: af00 add r7, sp, #0
8024dee: 6078 str r0, [r7, #4]
int i;
for (i = 0; i < ARP_TABLE_SIZE; ++i) {
8024df0: 2300 movs r3, #0
8024df2: 60fb str r3, [r7, #12]
8024df4: e01e b.n 8024e34 <etharp_cleanup_netif+0x4c>
u8_t state = arp_table[i].state;
8024df6: 4913 ldr r1, [pc, #76] @ (8024e44 <etharp_cleanup_netif+0x5c>)
8024df8: 68fa ldr r2, [r7, #12]
8024dfa: 4613 mov r3, r2
8024dfc: 005b lsls r3, r3, #1
8024dfe: 4413 add r3, r2
8024e00: 00db lsls r3, r3, #3
8024e02: 440b add r3, r1
8024e04: 3314 adds r3, #20
8024e06: 781b ldrb r3, [r3, #0]
8024e08: 72fb strb r3, [r7, #11]
if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) {
8024e0a: 7afb ldrb r3, [r7, #11]
8024e0c: 2b00 cmp r3, #0
8024e0e: d00e beq.n 8024e2e <etharp_cleanup_netif+0x46>
8024e10: 490c ldr r1, [pc, #48] @ (8024e44 <etharp_cleanup_netif+0x5c>)
8024e12: 68fa ldr r2, [r7, #12]
8024e14: 4613 mov r3, r2
8024e16: 005b lsls r3, r3, #1
8024e18: 4413 add r3, r2
8024e1a: 00db lsls r3, r3, #3
8024e1c: 440b add r3, r1
8024e1e: 3308 adds r3, #8
8024e20: 681b ldr r3, [r3, #0]
8024e22: 687a ldr r2, [r7, #4]
8024e24: 429a cmp r2, r3
8024e26: d102 bne.n 8024e2e <etharp_cleanup_netif+0x46>
etharp_free_entry(i);
8024e28: 68f8 ldr r0, [r7, #12]
8024e2a: f7ff fcb7 bl 802479c <etharp_free_entry>
for (i = 0; i < ARP_TABLE_SIZE; ++i) {
8024e2e: 68fb ldr r3, [r7, #12]
8024e30: 3301 adds r3, #1
8024e32: 60fb str r3, [r7, #12]
8024e34: 68fb ldr r3, [r7, #12]
8024e36: 2b09 cmp r3, #9
8024e38: dddd ble.n 8024df6 <etharp_cleanup_netif+0xe>
}
}
}
8024e3a: bf00 nop
8024e3c: bf00 nop
8024e3e: 3710 adds r7, #16
8024e40: 46bd mov sp, r7
8024e42: bd80 pop {r7, pc}
8024e44: 2402b040 .word 0x2402b040
08024e48 <etharp_input>:
*
* @see pbuf_free()
*/
void
etharp_input(struct pbuf *p, struct netif *netif)
{
8024e48: b5b0 push {r4, r5, r7, lr}
8024e4a: b08a sub sp, #40 @ 0x28
8024e4c: af04 add r7, sp, #16
8024e4e: 6078 str r0, [r7, #4]
8024e50: 6039 str r1, [r7, #0]
struct etharp_hdr *hdr;
/* these are aligned properly, whereas the ARP header fields might not be */
ip4_addr_t sipaddr, dipaddr;
u8_t for_us;
LWIP_ASSERT_CORE_LOCKED();
8024e52: f7ec f9bf bl 80111d4 <sys_check_core_locking>
LWIP_ERROR("netif != NULL", (netif != NULL), return;);
8024e56: 683b ldr r3, [r7, #0]
8024e58: 2b00 cmp r3, #0
8024e5a: d107 bne.n 8024e6c <etharp_input+0x24>
8024e5c: 4b3f ldr r3, [pc, #252] @ (8024f5c <etharp_input+0x114>)
8024e5e: f240 228a movw r2, #650 @ 0x28a
8024e62: 493f ldr r1, [pc, #252] @ (8024f60 <etharp_input+0x118>)
8024e64: 483f ldr r0, [pc, #252] @ (8024f64 <etharp_input+0x11c>)
8024e66: f005 fde1 bl 802aa2c <iprintf>
8024e6a: e074 b.n 8024f56 <etharp_input+0x10e>
hdr = (struct etharp_hdr *)p->payload;
8024e6c: 687b ldr r3, [r7, #4]
8024e6e: 685b ldr r3, [r3, #4]
8024e70: 617b str r3, [r7, #20]
/* RFC 826 "Packet Reception": */
if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
8024e72: 697b ldr r3, [r7, #20]
8024e74: 881b ldrh r3, [r3, #0]
8024e76: b29b uxth r3, r3
8024e78: f5b3 7f80 cmp.w r3, #256 @ 0x100
8024e7c: d10c bne.n 8024e98 <etharp_input+0x50>
(hdr->hwlen != ETH_HWADDR_LEN) ||
8024e7e: 697b ldr r3, [r7, #20]
8024e80: 791b ldrb r3, [r3, #4]
if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
8024e82: 2b06 cmp r3, #6
8024e84: d108 bne.n 8024e98 <etharp_input+0x50>
(hdr->protolen != sizeof(ip4_addr_t)) ||
8024e86: 697b ldr r3, [r7, #20]
8024e88: 795b ldrb r3, [r3, #5]
(hdr->hwlen != ETH_HWADDR_LEN) ||
8024e8a: 2b04 cmp r3, #4
8024e8c: d104 bne.n 8024e98 <etharp_input+0x50>
(hdr->proto != PP_HTONS(ETHTYPE_IP))) {
8024e8e: 697b ldr r3, [r7, #20]
8024e90: 885b ldrh r3, [r3, #2]
8024e92: b29b uxth r3, r3
(hdr->protolen != sizeof(ip4_addr_t)) ||
8024e94: 2b08 cmp r3, #8
8024e96: d003 beq.n 8024ea0 <etharp_input+0x58>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
("etharp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n",
hdr->hwtype, (u16_t)hdr->hwlen, hdr->proto, (u16_t)hdr->protolen));
ETHARP_STATS_INC(etharp.proterr);
ETHARP_STATS_INC(etharp.drop);
pbuf_free(p);
8024e98: 6878 ldr r0, [r7, #4]
8024e9a: f7f6 fb4f bl 801b53c <pbuf_free>
return;
8024e9e: e05a b.n 8024f56 <etharp_input+0x10e>
autoip_arp_reply(netif, hdr);
#endif /* LWIP_AUTOIP */
/* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
* structure packing (not using structure copy which breaks strict-aliasing rules). */
IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&sipaddr, &hdr->sipaddr);
8024ea0: 697b ldr r3, [r7, #20]
8024ea2: 330e adds r3, #14
8024ea4: 681b ldr r3, [r3, #0]
8024ea6: 60fb str r3, [r7, #12]
IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&dipaddr, &hdr->dipaddr);
8024ea8: 697b ldr r3, [r7, #20]
8024eaa: 3318 adds r3, #24
8024eac: 681b ldr r3, [r3, #0]
8024eae: 60bb str r3, [r7, #8]
/* this interface is not configured? */
if (ip4_addr_isany_val(*netif_ip4_addr(netif))) {
8024eb0: 683b ldr r3, [r7, #0]
8024eb2: 3304 adds r3, #4
8024eb4: 681b ldr r3, [r3, #0]
8024eb6: 2b00 cmp r3, #0
8024eb8: d102 bne.n 8024ec0 <etharp_input+0x78>
for_us = 0;
8024eba: 2300 movs r3, #0
8024ebc: 74fb strb r3, [r7, #19]
8024ebe: e009 b.n 8024ed4 <etharp_input+0x8c>
} else {
/* ARP packet directed to us? */
for_us = (u8_t)ip4_addr_cmp(&dipaddr, netif_ip4_addr(netif));
8024ec0: 68ba ldr r2, [r7, #8]
8024ec2: 683b ldr r3, [r7, #0]
8024ec4: 3304 adds r3, #4
8024ec6: 681b ldr r3, [r3, #0]
8024ec8: 429a cmp r2, r3
8024eca: bf0c ite eq
8024ecc: 2301 moveq r3, #1
8024ece: 2300 movne r3, #0
8024ed0: b2db uxtb r3, r3
8024ed2: 74fb strb r3, [r7, #19]
/* ARP message directed to us?
-> add IP address in ARP cache; assume requester wants to talk to us,
can result in directly sending the queued packets for this host.
ARP message not directed to us?
-> update the source IP address in the cache, if present */
etharp_update_arp_entry(netif, &sipaddr, &(hdr->shwaddr),
8024ed4: 697b ldr r3, [r7, #20]
8024ed6: f103 0208 add.w r2, r3, #8
8024eda: 7cfb ldrb r3, [r7, #19]
8024edc: 2b00 cmp r3, #0
8024ede: d001 beq.n 8024ee4 <etharp_input+0x9c>
8024ee0: 2301 movs r3, #1
8024ee2: e000 b.n 8024ee6 <etharp_input+0x9e>
8024ee4: 2302 movs r3, #2
8024ee6: f107 010c add.w r1, r7, #12
8024eea: 6838 ldr r0, [r7, #0]
8024eec: f7ff fed6 bl 8024c9c <etharp_update_arp_entry>
for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY);
/* now act on the message itself */
switch (hdr->opcode) {
8024ef0: 697b ldr r3, [r7, #20]
8024ef2: 88db ldrh r3, [r3, #6]
8024ef4: b29b uxth r3, r3
8024ef6: f5b3 7f80 cmp.w r3, #256 @ 0x100
8024efa: d003 beq.n 8024f04 <etharp_input+0xbc>
8024efc: f5b3 7f00 cmp.w r3, #512 @ 0x200
8024f00: d01e beq.n 8024f40 <etharp_input+0xf8>
#endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */
break;
default:
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_input: ARP unknown opcode type %"S16_F"\n", lwip_htons(hdr->opcode)));
ETHARP_STATS_INC(etharp.err);
break;
8024f02: e025 b.n 8024f50 <etharp_input+0x108>
if (for_us) {
8024f04: 7cfb ldrb r3, [r7, #19]
8024f06: 2b00 cmp r3, #0
8024f08: d021 beq.n 8024f4e <etharp_input+0x106>
(struct eth_addr *)netif->hwaddr, &hdr->shwaddr,
8024f0a: 683b ldr r3, [r7, #0]
8024f0c: f103 002a add.w r0, r3, #42 @ 0x2a
8024f10: 697b ldr r3, [r7, #20]
8024f12: f103 0408 add.w r4, r3, #8
(struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif),
8024f16: 683b ldr r3, [r7, #0]
8024f18: f103 052a add.w r5, r3, #42 @ 0x2a
8024f1c: 683b ldr r3, [r7, #0]
8024f1e: 3304 adds r3, #4
&hdr->shwaddr, &sipaddr,
8024f20: 697a ldr r2, [r7, #20]
8024f22: 3208 adds r2, #8
etharp_raw(netif,
8024f24: 2102 movs r1, #2
8024f26: 9103 str r1, [sp, #12]
8024f28: f107 010c add.w r1, r7, #12
8024f2c: 9102 str r1, [sp, #8]
8024f2e: 9201 str r2, [sp, #4]
8024f30: 9300 str r3, [sp, #0]
8024f32: 462b mov r3, r5
8024f34: 4622 mov r2, r4
8024f36: 4601 mov r1, r0
8024f38: 6838 ldr r0, [r7, #0]
8024f3a: f000 faf1 bl 8025520 <etharp_raw>
break;
8024f3e: e006 b.n 8024f4e <etharp_input+0x106>
dhcp_arp_reply(netif, &sipaddr);
8024f40: f107 030c add.w r3, r7, #12
8024f44: 4619 mov r1, r3
8024f46: 6838 ldr r0, [r7, #0]
8024f48: f7fe f9b6 bl 80232b8 <dhcp_arp_reply>
break;
8024f4c: e000 b.n 8024f50 <etharp_input+0x108>
break;
8024f4e: bf00 nop
}
/* free ARP packet */
pbuf_free(p);
8024f50: 6878 ldr r0, [r7, #4]
8024f52: f7f6 faf3 bl 801b53c <pbuf_free>
}
8024f56: 3718 adds r7, #24
8024f58: 46bd mov sp, r7
8024f5a: bdb0 pop {r4, r5, r7, pc}
8024f5c: 0803143c .word 0x0803143c
8024f60: 0803158c .word 0x0803158c
8024f64: 080314b4 .word 0x080314b4
08024f68 <etharp_output_to_arp_index>:
/** Just a small helper function that sends a pbuf to an ethernet address
* in the arp_table specified by the index 'arp_idx'.
*/
static err_t
etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, netif_addr_idx_t arp_idx)
{
8024f68: b580 push {r7, lr}
8024f6a: b086 sub sp, #24
8024f6c: af02 add r7, sp, #8
8024f6e: 60f8 str r0, [r7, #12]
8024f70: 60b9 str r1, [r7, #8]
8024f72: 4613 mov r3, r2
8024f74: 71fb strb r3, [r7, #7]
LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE",
8024f76: 79fa ldrb r2, [r7, #7]
8024f78: 4944 ldr r1, [pc, #272] @ (802508c <etharp_output_to_arp_index+0x124>)
8024f7a: 4613 mov r3, r2
8024f7c: 005b lsls r3, r3, #1
8024f7e: 4413 add r3, r2
8024f80: 00db lsls r3, r3, #3
8024f82: 440b add r3, r1
8024f84: 3314 adds r3, #20
8024f86: 781b ldrb r3, [r3, #0]
8024f88: 2b01 cmp r3, #1
8024f8a: d806 bhi.n 8024f9a <etharp_output_to_arp_index+0x32>
8024f8c: 4b40 ldr r3, [pc, #256] @ (8025090 <etharp_output_to_arp_index+0x128>)
8024f8e: f240 22ee movw r2, #750 @ 0x2ee
8024f92: 4940 ldr r1, [pc, #256] @ (8025094 <etharp_output_to_arp_index+0x12c>)
8024f94: 4840 ldr r0, [pc, #256] @ (8025098 <etharp_output_to_arp_index+0x130>)
8024f96: f005 fd49 bl 802aa2c <iprintf>
arp_table[arp_idx].state >= ETHARP_STATE_STABLE);
/* if arp table entry is about to expire: re-request it,
but only if its state is ETHARP_STATE_STABLE to prevent flooding the
network with ARP requests if this address is used frequently. */
if (arp_table[arp_idx].state == ETHARP_STATE_STABLE) {
8024f9a: 79fa ldrb r2, [r7, #7]
8024f9c: 493b ldr r1, [pc, #236] @ (802508c <etharp_output_to_arp_index+0x124>)
8024f9e: 4613 mov r3, r2
8024fa0: 005b lsls r3, r3, #1
8024fa2: 4413 add r3, r2
8024fa4: 00db lsls r3, r3, #3
8024fa6: 440b add r3, r1
8024fa8: 3314 adds r3, #20
8024faa: 781b ldrb r3, [r3, #0]
8024fac: 2b02 cmp r3, #2
8024fae: d153 bne.n 8025058 <etharp_output_to_arp_index+0xf0>
if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_BROADCAST) {
8024fb0: 79fa ldrb r2, [r7, #7]
8024fb2: 4936 ldr r1, [pc, #216] @ (802508c <etharp_output_to_arp_index+0x124>)
8024fb4: 4613 mov r3, r2
8024fb6: 005b lsls r3, r3, #1
8024fb8: 4413 add r3, r2
8024fba: 00db lsls r3, r3, #3
8024fbc: 440b add r3, r1
8024fbe: 3312 adds r3, #18
8024fc0: 881b ldrh r3, [r3, #0]
8024fc2: f5b3 7f8e cmp.w r3, #284 @ 0x11c
8024fc6: d919 bls.n 8024ffc <etharp_output_to_arp_index+0x94>
/* issue a standard request using broadcast */
if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) {
8024fc8: 79fa ldrb r2, [r7, #7]
8024fca: 4613 mov r3, r2
8024fcc: 005b lsls r3, r3, #1
8024fce: 4413 add r3, r2
8024fd0: 00db lsls r3, r3, #3
8024fd2: 4a2e ldr r2, [pc, #184] @ (802508c <etharp_output_to_arp_index+0x124>)
8024fd4: 4413 add r3, r2
8024fd6: 3304 adds r3, #4
8024fd8: 4619 mov r1, r3
8024fda: 68f8 ldr r0, [r7, #12]
8024fdc: f000 fb4e bl 802567c <etharp_request>
8024fe0: 4603 mov r3, r0
8024fe2: 2b00 cmp r3, #0
8024fe4: d138 bne.n 8025058 <etharp_output_to_arp_index+0xf0>
arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
8024fe6: 79fa ldrb r2, [r7, #7]
8024fe8: 4928 ldr r1, [pc, #160] @ (802508c <etharp_output_to_arp_index+0x124>)
8024fea: 4613 mov r3, r2
8024fec: 005b lsls r3, r3, #1
8024fee: 4413 add r3, r2
8024ff0: 00db lsls r3, r3, #3
8024ff2: 440b add r3, r1
8024ff4: 3314 adds r3, #20
8024ff6: 2203 movs r2, #3
8024ff8: 701a strb r2, [r3, #0]
8024ffa: e02d b.n 8025058 <etharp_output_to_arp_index+0xf0>
}
} else if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_UNICAST) {
8024ffc: 79fa ldrb r2, [r7, #7]
8024ffe: 4923 ldr r1, [pc, #140] @ (802508c <etharp_output_to_arp_index+0x124>)
8025000: 4613 mov r3, r2
8025002: 005b lsls r3, r3, #1
8025004: 4413 add r3, r2
8025006: 00db lsls r3, r3, #3
8025008: 440b add r3, r1
802500a: 3312 adds r3, #18
802500c: 881b ldrh r3, [r3, #0]
802500e: f5b3 7f87 cmp.w r3, #270 @ 0x10e
8025012: d321 bcc.n 8025058 <etharp_output_to_arp_index+0xf0>
/* issue a unicast request (for 15 seconds) to prevent unnecessary broadcast */
if (etharp_request_dst(netif, &arp_table[arp_idx].ipaddr, &arp_table[arp_idx].ethaddr) == ERR_OK) {
8025014: 79fa ldrb r2, [r7, #7]
8025016: 4613 mov r3, r2
8025018: 005b lsls r3, r3, #1
802501a: 4413 add r3, r2
802501c: 00db lsls r3, r3, #3
802501e: 4a1b ldr r2, [pc, #108] @ (802508c <etharp_output_to_arp_index+0x124>)
8025020: 4413 add r3, r2
8025022: 1d19 adds r1, r3, #4
8025024: 79fa ldrb r2, [r7, #7]
8025026: 4613 mov r3, r2
8025028: 005b lsls r3, r3, #1
802502a: 4413 add r3, r2
802502c: 00db lsls r3, r3, #3
802502e: 3308 adds r3, #8
8025030: 4a16 ldr r2, [pc, #88] @ (802508c <etharp_output_to_arp_index+0x124>)
8025032: 4413 add r3, r2
8025034: 3304 adds r3, #4
8025036: 461a mov r2, r3
8025038: 68f8 ldr r0, [r7, #12]
802503a: f000 fafd bl 8025638 <etharp_request_dst>
802503e: 4603 mov r3, r0
8025040: 2b00 cmp r3, #0
8025042: d109 bne.n 8025058 <etharp_output_to_arp_index+0xf0>
arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
8025044: 79fa ldrb r2, [r7, #7]
8025046: 4911 ldr r1, [pc, #68] @ (802508c <etharp_output_to_arp_index+0x124>)
8025048: 4613 mov r3, r2
802504a: 005b lsls r3, r3, #1
802504c: 4413 add r3, r2
802504e: 00db lsls r3, r3, #3
8025050: 440b add r3, r1
8025052: 3314 adds r3, #20
8025054: 2203 movs r2, #3
8025056: 701a strb r2, [r3, #0]
}
}
}
return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), &arp_table[arp_idx].ethaddr, ETHTYPE_IP);
8025058: 68fb ldr r3, [r7, #12]
802505a: f103 012a add.w r1, r3, #42 @ 0x2a
802505e: 79fa ldrb r2, [r7, #7]
8025060: 4613 mov r3, r2
8025062: 005b lsls r3, r3, #1
8025064: 4413 add r3, r2
8025066: 00db lsls r3, r3, #3
8025068: 3308 adds r3, #8
802506a: 4a08 ldr r2, [pc, #32] @ (802508c <etharp_output_to_arp_index+0x124>)
802506c: 4413 add r3, r2
802506e: 3304 adds r3, #4
8025070: f44f 6200 mov.w r2, #2048 @ 0x800
8025074: 9200 str r2, [sp, #0]
8025076: 460a mov r2, r1
8025078: 68b9 ldr r1, [r7, #8]
802507a: 68f8 ldr r0, [r7, #12]
802507c: f002 f85e bl 802713c <ethernet_output>
8025080: 4603 mov r3, r0
}
8025082: 4618 mov r0, r3
8025084: 3710 adds r7, #16
8025086: 46bd mov sp, r7
8025088: bd80 pop {r7, pc}
802508a: bf00 nop
802508c: 2402b040 .word 0x2402b040
8025090: 0803143c .word 0x0803143c
8025094: 080315ac .word 0x080315ac
8025098: 080314b4 .word 0x080314b4
0802509c <etharp_output>:
* - ERR_RTE No route to destination (no gateway to external networks),
* or the return type of either etharp_query() or ethernet_output().
*/
err_t
etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr)
{
802509c: b580 push {r7, lr}
802509e: b08a sub sp, #40 @ 0x28
80250a0: af02 add r7, sp, #8
80250a2: 60f8 str r0, [r7, #12]
80250a4: 60b9 str r1, [r7, #8]
80250a6: 607a str r2, [r7, #4]
const struct eth_addr *dest;
struct eth_addr mcastaddr;
const ip4_addr_t *dst_addr = ipaddr;
80250a8: 687b ldr r3, [r7, #4]
80250aa: 61bb str r3, [r7, #24]
LWIP_ASSERT_CORE_LOCKED();
80250ac: f7ec f892 bl 80111d4 <sys_check_core_locking>
LWIP_ASSERT("netif != NULL", netif != NULL);
80250b0: 68fb ldr r3, [r7, #12]
80250b2: 2b00 cmp r3, #0
80250b4: d106 bne.n 80250c4 <etharp_output+0x28>
80250b6: 4b73 ldr r3, [pc, #460] @ (8025284 <etharp_output+0x1e8>)
80250b8: f240 321e movw r2, #798 @ 0x31e
80250bc: 4972 ldr r1, [pc, #456] @ (8025288 <etharp_output+0x1ec>)
80250be: 4873 ldr r0, [pc, #460] @ (802528c <etharp_output+0x1f0>)
80250c0: f005 fcb4 bl 802aa2c <iprintf>
LWIP_ASSERT("q != NULL", q != NULL);
80250c4: 68bb ldr r3, [r7, #8]
80250c6: 2b00 cmp r3, #0
80250c8: d106 bne.n 80250d8 <etharp_output+0x3c>
80250ca: 4b6e ldr r3, [pc, #440] @ (8025284 <etharp_output+0x1e8>)
80250cc: f240 321f movw r2, #799 @ 0x31f
80250d0: 496f ldr r1, [pc, #444] @ (8025290 <etharp_output+0x1f4>)
80250d2: 486e ldr r0, [pc, #440] @ (802528c <etharp_output+0x1f0>)
80250d4: f005 fcaa bl 802aa2c <iprintf>
LWIP_ASSERT("ipaddr != NULL", ipaddr != NULL);
80250d8: 687b ldr r3, [r7, #4]
80250da: 2b00 cmp r3, #0
80250dc: d106 bne.n 80250ec <etharp_output+0x50>
80250de: 4b69 ldr r3, [pc, #420] @ (8025284 <etharp_output+0x1e8>)
80250e0: f44f 7248 mov.w r2, #800 @ 0x320
80250e4: 496b ldr r1, [pc, #428] @ (8025294 <etharp_output+0x1f8>)
80250e6: 4869 ldr r0, [pc, #420] @ (802528c <etharp_output+0x1f0>)
80250e8: f005 fca0 bl 802aa2c <iprintf>
/* Determine on destination hardware address. Broadcasts and multicasts
* are special, other IP addresses are looked up in the ARP table. */
/* broadcast destination IP address? */
if (ip4_addr_isbroadcast(ipaddr, netif)) {
80250ec: 687b ldr r3, [r7, #4]
80250ee: 681b ldr r3, [r3, #0]
80250f0: 68f9 ldr r1, [r7, #12]
80250f2: 4618 mov r0, r3
80250f4: f000 ff44 bl 8025f80 <ip4_addr_isbroadcast_u32>
80250f8: 4603 mov r3, r0
80250fa: 2b00 cmp r3, #0
80250fc: d002 beq.n 8025104 <etharp_output+0x68>
/* broadcast on Ethernet also */
dest = (const struct eth_addr *)ðbroadcast;
80250fe: 4b66 ldr r3, [pc, #408] @ (8025298 <etharp_output+0x1fc>)
8025100: 61fb str r3, [r7, #28]
8025102: e0af b.n 8025264 <etharp_output+0x1c8>
/* multicast destination IP address? */
} else if (ip4_addr_ismulticast(ipaddr)) {
8025104: 687b ldr r3, [r7, #4]
8025106: 681b ldr r3, [r3, #0]
8025108: f003 03f0 and.w r3, r3, #240 @ 0xf0
802510c: 2be0 cmp r3, #224 @ 0xe0
802510e: d118 bne.n 8025142 <etharp_output+0xa6>
/* Hash IP multicast address to MAC address.*/
mcastaddr.addr[0] = LL_IP4_MULTICAST_ADDR_0;
8025110: 2301 movs r3, #1
8025112: 743b strb r3, [r7, #16]
mcastaddr.addr[1] = LL_IP4_MULTICAST_ADDR_1;
8025114: 2300 movs r3, #0
8025116: 747b strb r3, [r7, #17]
mcastaddr.addr[2] = LL_IP4_MULTICAST_ADDR_2;
8025118: 235e movs r3, #94 @ 0x5e
802511a: 74bb strb r3, [r7, #18]
mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f;
802511c: 687b ldr r3, [r7, #4]
802511e: 3301 adds r3, #1
8025120: 781b ldrb r3, [r3, #0]
8025122: f003 037f and.w r3, r3, #127 @ 0x7f
8025126: b2db uxtb r3, r3
8025128: 74fb strb r3, [r7, #19]
mcastaddr.addr[4] = ip4_addr3(ipaddr);
802512a: 687b ldr r3, [r7, #4]
802512c: 3302 adds r3, #2
802512e: 781b ldrb r3, [r3, #0]
8025130: 753b strb r3, [r7, #20]
mcastaddr.addr[5] = ip4_addr4(ipaddr);
8025132: 687b ldr r3, [r7, #4]
8025134: 3303 adds r3, #3
8025136: 781b ldrb r3, [r3, #0]
8025138: 757b strb r3, [r7, #21]
/* destination Ethernet address is multicast */
dest = &mcastaddr;
802513a: f107 0310 add.w r3, r7, #16
802513e: 61fb str r3, [r7, #28]
8025140: e090 b.n 8025264 <etharp_output+0x1c8>
/* unicast destination IP address? */
} else {
netif_addr_idx_t i;
/* outside local network? if so, this can neither be a global broadcast nor
a subnet broadcast. */
if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
8025142: 687b ldr r3, [r7, #4]
8025144: 681a ldr r2, [r3, #0]
8025146: 68fb ldr r3, [r7, #12]
8025148: 3304 adds r3, #4
802514a: 681b ldr r3, [r3, #0]
802514c: 405a eors r2, r3
802514e: 68fb ldr r3, [r7, #12]
8025150: 3308 adds r3, #8
8025152: 681b ldr r3, [r3, #0]
8025154: 4013 ands r3, r2
8025156: 2b00 cmp r3, #0
8025158: d012 beq.n 8025180 <etharp_output+0xe4>
!ip4_addr_islinklocal(ipaddr)) {
802515a: 687b ldr r3, [r7, #4]
802515c: 681b ldr r3, [r3, #0]
802515e: b29b uxth r3, r3
if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
8025160: f64f 62a9 movw r2, #65193 @ 0xfea9
8025164: 4293 cmp r3, r2
8025166: d00b beq.n 8025180 <etharp_output+0xe4>
dst_addr = LWIP_HOOK_ETHARP_GET_GW(netif, ipaddr);
if (dst_addr == NULL)
#endif /* LWIP_HOOK_ETHARP_GET_GW */
{
/* interface has default gateway? */
if (!ip4_addr_isany_val(*netif_ip4_gw(netif))) {
8025168: 68fb ldr r3, [r7, #12]
802516a: 330c adds r3, #12
802516c: 681b ldr r3, [r3, #0]
802516e: 2b00 cmp r3, #0
8025170: d003 beq.n 802517a <etharp_output+0xde>
/* send to hardware address of default gateway IP address */
dst_addr = netif_ip4_gw(netif);
8025172: 68fb ldr r3, [r7, #12]
8025174: 330c adds r3, #12
8025176: 61bb str r3, [r7, #24]
8025178: e002 b.n 8025180 <etharp_output+0xe4>
/* no default gateway available */
} else {
/* no route to destination error (default gateway missing) */
return ERR_RTE;
802517a: f06f 0303 mvn.w r3, #3
802517e: e07d b.n 802527c <etharp_output+0x1e0>
if (netif->hints != NULL) {
/* per-pcb cached entry was given */
netif_addr_idx_t etharp_cached_entry = netif->hints->addr_hint;
if (etharp_cached_entry < ARP_TABLE_SIZE) {
#endif /* LWIP_NETIF_HWADDRHINT */
if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
8025180: 4b46 ldr r3, [pc, #280] @ (802529c <etharp_output+0x200>)
8025182: 781b ldrb r3, [r3, #0]
8025184: 4619 mov r1, r3
8025186: 4a46 ldr r2, [pc, #280] @ (80252a0 <etharp_output+0x204>)
8025188: 460b mov r3, r1
802518a: 005b lsls r3, r3, #1
802518c: 440b add r3, r1
802518e: 00db lsls r3, r3, #3
8025190: 4413 add r3, r2
8025192: 3314 adds r3, #20
8025194: 781b ldrb r3, [r3, #0]
8025196: 2b01 cmp r3, #1
8025198: d925 bls.n 80251e6 <etharp_output+0x14a>
#if ETHARP_TABLE_MATCH_NETIF
(arp_table[etharp_cached_entry].netif == netif) &&
802519a: 4b40 ldr r3, [pc, #256] @ (802529c <etharp_output+0x200>)
802519c: 781b ldrb r3, [r3, #0]
802519e: 4619 mov r1, r3
80251a0: 4a3f ldr r2, [pc, #252] @ (80252a0 <etharp_output+0x204>)
80251a2: 460b mov r3, r1
80251a4: 005b lsls r3, r3, #1
80251a6: 440b add r3, r1
80251a8: 00db lsls r3, r3, #3
80251aa: 4413 add r3, r2
80251ac: 3308 adds r3, #8
80251ae: 681b ldr r3, [r3, #0]
if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
80251b0: 68fa ldr r2, [r7, #12]
80251b2: 429a cmp r2, r3
80251b4: d117 bne.n 80251e6 <etharp_output+0x14a>
#endif
(ip4_addr_cmp(dst_addr, &arp_table[etharp_cached_entry].ipaddr))) {
80251b6: 69bb ldr r3, [r7, #24]
80251b8: 681a ldr r2, [r3, #0]
80251ba: 4b38 ldr r3, [pc, #224] @ (802529c <etharp_output+0x200>)
80251bc: 781b ldrb r3, [r3, #0]
80251be: 4618 mov r0, r3
80251c0: 4937 ldr r1, [pc, #220] @ (80252a0 <etharp_output+0x204>)
80251c2: 4603 mov r3, r0
80251c4: 005b lsls r3, r3, #1
80251c6: 4403 add r3, r0
80251c8: 00db lsls r3, r3, #3
80251ca: 440b add r3, r1
80251cc: 3304 adds r3, #4
80251ce: 681b ldr r3, [r3, #0]
(arp_table[etharp_cached_entry].netif == netif) &&
80251d0: 429a cmp r2, r3
80251d2: d108 bne.n 80251e6 <etharp_output+0x14a>
/* the per-pcb-cached entry is stable and the right one! */
ETHARP_STATS_INC(etharp.cachehit);
return etharp_output_to_arp_index(netif, q, etharp_cached_entry);
80251d4: 4b31 ldr r3, [pc, #196] @ (802529c <etharp_output+0x200>)
80251d6: 781b ldrb r3, [r3, #0]
80251d8: 461a mov r2, r3
80251da: 68b9 ldr r1, [r7, #8]
80251dc: 68f8 ldr r0, [r7, #12]
80251de: f7ff fec3 bl 8024f68 <etharp_output_to_arp_index>
80251e2: 4603 mov r3, r0
80251e4: e04a b.n 802527c <etharp_output+0x1e0>
}
#endif /* LWIP_NETIF_HWADDRHINT */
/* find stable entry: do this here since this is a critical path for
throughput and etharp_find_entry() is kind of slow */
for (i = 0; i < ARP_TABLE_SIZE; i++) {
80251e6: 2300 movs r3, #0
80251e8: 75fb strb r3, [r7, #23]
80251ea: e031 b.n 8025250 <etharp_output+0x1b4>
if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
80251ec: 7dfa ldrb r2, [r7, #23]
80251ee: 492c ldr r1, [pc, #176] @ (80252a0 <etharp_output+0x204>)
80251f0: 4613 mov r3, r2
80251f2: 005b lsls r3, r3, #1
80251f4: 4413 add r3, r2
80251f6: 00db lsls r3, r3, #3
80251f8: 440b add r3, r1
80251fa: 3314 adds r3, #20
80251fc: 781b ldrb r3, [r3, #0]
80251fe: 2b01 cmp r3, #1
8025200: d923 bls.n 802524a <etharp_output+0x1ae>
#if ETHARP_TABLE_MATCH_NETIF
(arp_table[i].netif == netif) &&
8025202: 7dfa ldrb r2, [r7, #23]
8025204: 4926 ldr r1, [pc, #152] @ (80252a0 <etharp_output+0x204>)
8025206: 4613 mov r3, r2
8025208: 005b lsls r3, r3, #1
802520a: 4413 add r3, r2
802520c: 00db lsls r3, r3, #3
802520e: 440b add r3, r1
8025210: 3308 adds r3, #8
8025212: 681b ldr r3, [r3, #0]
if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
8025214: 68fa ldr r2, [r7, #12]
8025216: 429a cmp r2, r3
8025218: d117 bne.n 802524a <etharp_output+0x1ae>
#endif
(ip4_addr_cmp(dst_addr, &arp_table[i].ipaddr))) {
802521a: 69bb ldr r3, [r7, #24]
802521c: 6819 ldr r1, [r3, #0]
802521e: 7dfa ldrb r2, [r7, #23]
8025220: 481f ldr r0, [pc, #124] @ (80252a0 <etharp_output+0x204>)
8025222: 4613 mov r3, r2
8025224: 005b lsls r3, r3, #1
8025226: 4413 add r3, r2
8025228: 00db lsls r3, r3, #3
802522a: 4403 add r3, r0
802522c: 3304 adds r3, #4
802522e: 681b ldr r3, [r3, #0]
(arp_table[i].netif == netif) &&
8025230: 4299 cmp r1, r3
8025232: d10a bne.n 802524a <etharp_output+0x1ae>
/* found an existing, stable entry */
ETHARP_SET_ADDRHINT(netif, i);
8025234: 4a19 ldr r2, [pc, #100] @ (802529c <etharp_output+0x200>)
8025236: 7dfb ldrb r3, [r7, #23]
8025238: 7013 strb r3, [r2, #0]
return etharp_output_to_arp_index(netif, q, i);
802523a: 7dfb ldrb r3, [r7, #23]
802523c: 461a mov r2, r3
802523e: 68b9 ldr r1, [r7, #8]
8025240: 68f8 ldr r0, [r7, #12]
8025242: f7ff fe91 bl 8024f68 <etharp_output_to_arp_index>
8025246: 4603 mov r3, r0
8025248: e018 b.n 802527c <etharp_output+0x1e0>
for (i = 0; i < ARP_TABLE_SIZE; i++) {
802524a: 7dfb ldrb r3, [r7, #23]
802524c: 3301 adds r3, #1
802524e: 75fb strb r3, [r7, #23]
8025250: 7dfb ldrb r3, [r7, #23]
8025252: 2b09 cmp r3, #9
8025254: d9ca bls.n 80251ec <etharp_output+0x150>
}
}
/* no stable entry found, use the (slower) query function:
queue on destination Ethernet address belonging to ipaddr */
return etharp_query(netif, dst_addr, q);
8025256: 68ba ldr r2, [r7, #8]
8025258: 69b9 ldr r1, [r7, #24]
802525a: 68f8 ldr r0, [r7, #12]
802525c: f000 f822 bl 80252a4 <etharp_query>
8025260: 4603 mov r3, r0
8025262: e00b b.n 802527c <etharp_output+0x1e0>
}
/* continuation for multicast/broadcast destinations */
/* obtain source Ethernet address of the given interface */
/* send packet directly on the link */
return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), dest, ETHTYPE_IP);
8025264: 68fb ldr r3, [r7, #12]
8025266: f103 022a add.w r2, r3, #42 @ 0x2a
802526a: f44f 6300 mov.w r3, #2048 @ 0x800
802526e: 9300 str r3, [sp, #0]
8025270: 69fb ldr r3, [r7, #28]
8025272: 68b9 ldr r1, [r7, #8]
8025274: 68f8 ldr r0, [r7, #12]
8025276: f001 ff61 bl 802713c <ethernet_output>
802527a: 4603 mov r3, r0
}
802527c: 4618 mov r0, r3
802527e: 3720 adds r7, #32
8025280: 46bd mov sp, r7
8025282: bd80 pop {r7, pc}
8025284: 0803143c .word 0x0803143c
8025288: 0803158c .word 0x0803158c
802528c: 080314b4 .word 0x080314b4
8025290: 080315dc .word 0x080315dc
8025294: 0803157c .word 0x0803157c
8025298: 08031ed0 .word 0x08031ed0
802529c: 2402b130 .word 0x2402b130
80252a0: 2402b040 .word 0x2402b040
080252a4 <etharp_query>:
* - ERR_ARG Non-unicast address given, those will not appear in ARP cache.
*
*/
err_t
etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q)
{
80252a4: b580 push {r7, lr}
80252a6: b08c sub sp, #48 @ 0x30
80252a8: af02 add r7, sp, #8
80252aa: 60f8 str r0, [r7, #12]
80252ac: 60b9 str r1, [r7, #8]
80252ae: 607a str r2, [r7, #4]
struct eth_addr *srcaddr = (struct eth_addr *)netif->hwaddr;
80252b0: 68fb ldr r3, [r7, #12]
80252b2: 332a adds r3, #42 @ 0x2a
80252b4: 617b str r3, [r7, #20]
err_t result = ERR_MEM;
80252b6: 23ff movs r3, #255 @ 0xff
80252b8: f887 3027 strb.w r3, [r7, #39] @ 0x27
int is_new_entry = 0;
80252bc: 2300 movs r3, #0
80252be: 623b str r3, [r7, #32]
s16_t i_err;
netif_addr_idx_t i;
/* non-unicast address? */
if (ip4_addr_isbroadcast(ipaddr, netif) ||
80252c0: 68bb ldr r3, [r7, #8]
80252c2: 681b ldr r3, [r3, #0]
80252c4: 68f9 ldr r1, [r7, #12]
80252c6: 4618 mov r0, r3
80252c8: f000 fe5a bl 8025f80 <ip4_addr_isbroadcast_u32>
80252cc: 4603 mov r3, r0
80252ce: 2b00 cmp r3, #0
80252d0: d10c bne.n 80252ec <etharp_query+0x48>
ip4_addr_ismulticast(ipaddr) ||
80252d2: 68bb ldr r3, [r7, #8]
80252d4: 681b ldr r3, [r3, #0]
80252d6: f003 03f0 and.w r3, r3, #240 @ 0xf0
if (ip4_addr_isbroadcast(ipaddr, netif) ||
80252da: 2be0 cmp r3, #224 @ 0xe0
80252dc: d006 beq.n 80252ec <etharp_query+0x48>
ip4_addr_ismulticast(ipaddr) ||
80252de: 68bb ldr r3, [r7, #8]
80252e0: 2b00 cmp r3, #0
80252e2: d003 beq.n 80252ec <etharp_query+0x48>
ip4_addr_isany(ipaddr)) {
80252e4: 68bb ldr r3, [r7, #8]
80252e6: 681b ldr r3, [r3, #0]
80252e8: 2b00 cmp r3, #0
80252ea: d102 bne.n 80252f2 <etharp_query+0x4e>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n"));
return ERR_ARG;
80252ec: f06f 030f mvn.w r3, #15
80252f0: e101 b.n 80254f6 <etharp_query+0x252>
}
/* find entry in ARP cache, ask to create entry if queueing packet */
i_err = etharp_find_entry(ipaddr, ETHARP_FLAG_TRY_HARD, netif);
80252f2: 68fa ldr r2, [r7, #12]
80252f4: 2101 movs r1, #1
80252f6: 68b8 ldr r0, [r7, #8]
80252f8: f7ff fb58 bl 80249ac <etharp_find_entry>
80252fc: 4603 mov r3, r0
80252fe: 827b strh r3, [r7, #18]
/* could not find or create entry? */
if (i_err < 0) {
8025300: f9b7 3012 ldrsh.w r3, [r7, #18]
8025304: 2b00 cmp r3, #0
8025306: da02 bge.n 802530e <etharp_query+0x6a>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n"));
if (q) {
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n"));
ETHARP_STATS_INC(etharp.memerr);
}
return (err_t)i_err;
8025308: 8a7b ldrh r3, [r7, #18]
802530a: b25b sxtb r3, r3
802530c: e0f3 b.n 80254f6 <etharp_query+0x252>
}
LWIP_ASSERT("type overflow", (size_t)i_err < NETIF_ADDR_IDX_MAX);
802530e: 8a7b ldrh r3, [r7, #18]
8025310: 2b7e cmp r3, #126 @ 0x7e
8025312: d906 bls.n 8025322 <etharp_query+0x7e>
8025314: 4b7a ldr r3, [pc, #488] @ (8025500 <etharp_query+0x25c>)
8025316: f240 32c1 movw r2, #961 @ 0x3c1
802531a: 497a ldr r1, [pc, #488] @ (8025504 <etharp_query+0x260>)
802531c: 487a ldr r0, [pc, #488] @ (8025508 <etharp_query+0x264>)
802531e: f005 fb85 bl 802aa2c <iprintf>
i = (netif_addr_idx_t)i_err;
8025322: 8a7b ldrh r3, [r7, #18]
8025324: 747b strb r3, [r7, #17]
/* mark a fresh entry as pending (we just sent a request) */
if (arp_table[i].state == ETHARP_STATE_EMPTY) {
8025326: 7c7a ldrb r2, [r7, #17]
8025328: 4978 ldr r1, [pc, #480] @ (802550c <etharp_query+0x268>)
802532a: 4613 mov r3, r2
802532c: 005b lsls r3, r3, #1
802532e: 4413 add r3, r2
8025330: 00db lsls r3, r3, #3
8025332: 440b add r3, r1
8025334: 3314 adds r3, #20
8025336: 781b ldrb r3, [r3, #0]
8025338: 2b00 cmp r3, #0
802533a: d115 bne.n 8025368 <etharp_query+0xc4>
is_new_entry = 1;
802533c: 2301 movs r3, #1
802533e: 623b str r3, [r7, #32]
arp_table[i].state = ETHARP_STATE_PENDING;
8025340: 7c7a ldrb r2, [r7, #17]
8025342: 4972 ldr r1, [pc, #456] @ (802550c <etharp_query+0x268>)
8025344: 4613 mov r3, r2
8025346: 005b lsls r3, r3, #1
8025348: 4413 add r3, r2
802534a: 00db lsls r3, r3, #3
802534c: 440b add r3, r1
802534e: 3314 adds r3, #20
8025350: 2201 movs r2, #1
8025352: 701a strb r2, [r3, #0]
/* record network interface for re-sending arp request in etharp_tmr */
arp_table[i].netif = netif;
8025354: 7c7a ldrb r2, [r7, #17]
8025356: 496d ldr r1, [pc, #436] @ (802550c <etharp_query+0x268>)
8025358: 4613 mov r3, r2
802535a: 005b lsls r3, r3, #1
802535c: 4413 add r3, r2
802535e: 00db lsls r3, r3, #3
8025360: 440b add r3, r1
8025362: 3308 adds r3, #8
8025364: 68fa ldr r2, [r7, #12]
8025366: 601a str r2, [r3, #0]
}
/* { i is either a STABLE or (new or existing) PENDING entry } */
LWIP_ASSERT("arp_table[i].state == PENDING or STABLE",
8025368: 7c7a ldrb r2, [r7, #17]
802536a: 4968 ldr r1, [pc, #416] @ (802550c <etharp_query+0x268>)
802536c: 4613 mov r3, r2
802536e: 005b lsls r3, r3, #1
8025370: 4413 add r3, r2
8025372: 00db lsls r3, r3, #3
8025374: 440b add r3, r1
8025376: 3314 adds r3, #20
8025378: 781b ldrb r3, [r3, #0]
802537a: 2b01 cmp r3, #1
802537c: d011 beq.n 80253a2 <etharp_query+0xfe>
802537e: 7c7a ldrb r2, [r7, #17]
8025380: 4962 ldr r1, [pc, #392] @ (802550c <etharp_query+0x268>)
8025382: 4613 mov r3, r2
8025384: 005b lsls r3, r3, #1
8025386: 4413 add r3, r2
8025388: 00db lsls r3, r3, #3
802538a: 440b add r3, r1
802538c: 3314 adds r3, #20
802538e: 781b ldrb r3, [r3, #0]
8025390: 2b01 cmp r3, #1
8025392: d806 bhi.n 80253a2 <etharp_query+0xfe>
8025394: 4b5a ldr r3, [pc, #360] @ (8025500 <etharp_query+0x25c>)
8025396: f240 32cd movw r2, #973 @ 0x3cd
802539a: 495d ldr r1, [pc, #372] @ (8025510 <etharp_query+0x26c>)
802539c: 485a ldr r0, [pc, #360] @ (8025508 <etharp_query+0x264>)
802539e: f005 fb45 bl 802aa2c <iprintf>
((arp_table[i].state == ETHARP_STATE_PENDING) ||
(arp_table[i].state >= ETHARP_STATE_STABLE)));
/* do we have a new entry? or an implicit query request? */
if (is_new_entry || (q == NULL)) {
80253a2: 6a3b ldr r3, [r7, #32]
80253a4: 2b00 cmp r3, #0
80253a6: d102 bne.n 80253ae <etharp_query+0x10a>
80253a8: 687b ldr r3, [r7, #4]
80253aa: 2b00 cmp r3, #0
80253ac: d10c bne.n 80253c8 <etharp_query+0x124>
/* try to resolve it; send out ARP request */
result = etharp_request(netif, ipaddr);
80253ae: 68b9 ldr r1, [r7, #8]
80253b0: 68f8 ldr r0, [r7, #12]
80253b2: f000 f963 bl 802567c <etharp_request>
80253b6: 4603 mov r3, r0
80253b8: f887 3027 strb.w r3, [r7, #39] @ 0x27
/* ARP request couldn't be sent */
/* We don't re-send arp request in etharp_tmr, but we still queue packets,
since this failure could be temporary, and the next packet calling
etharp_query again could lead to sending the queued packets. */
}
if (q == NULL) {
80253bc: 687b ldr r3, [r7, #4]
80253be: 2b00 cmp r3, #0
80253c0: d102 bne.n 80253c8 <etharp_query+0x124>
return result;
80253c2: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
80253c6: e096 b.n 80254f6 <etharp_query+0x252>
}
}
/* packet given? */
LWIP_ASSERT("q != NULL", q != NULL);
80253c8: 687b ldr r3, [r7, #4]
80253ca: 2b00 cmp r3, #0
80253cc: d106 bne.n 80253dc <etharp_query+0x138>
80253ce: 4b4c ldr r3, [pc, #304] @ (8025500 <etharp_query+0x25c>)
80253d0: f240 32e1 movw r2, #993 @ 0x3e1
80253d4: 494f ldr r1, [pc, #316] @ (8025514 <etharp_query+0x270>)
80253d6: 484c ldr r0, [pc, #304] @ (8025508 <etharp_query+0x264>)
80253d8: f005 fb28 bl 802aa2c <iprintf>
/* stable entry? */
if (arp_table[i].state >= ETHARP_STATE_STABLE) {
80253dc: 7c7a ldrb r2, [r7, #17]
80253de: 494b ldr r1, [pc, #300] @ (802550c <etharp_query+0x268>)
80253e0: 4613 mov r3, r2
80253e2: 005b lsls r3, r3, #1
80253e4: 4413 add r3, r2
80253e6: 00db lsls r3, r3, #3
80253e8: 440b add r3, r1
80253ea: 3314 adds r3, #20
80253ec: 781b ldrb r3, [r3, #0]
80253ee: 2b01 cmp r3, #1
80253f0: d917 bls.n 8025422 <etharp_query+0x17e>
/* we have a valid IP->Ethernet address mapping */
ETHARP_SET_ADDRHINT(netif, i);
80253f2: 4a49 ldr r2, [pc, #292] @ (8025518 <etharp_query+0x274>)
80253f4: 7c7b ldrb r3, [r7, #17]
80253f6: 7013 strb r3, [r2, #0]
/* send the packet */
result = ethernet_output(netif, q, srcaddr, &(arp_table[i].ethaddr), ETHTYPE_IP);
80253f8: 7c7a ldrb r2, [r7, #17]
80253fa: 4613 mov r3, r2
80253fc: 005b lsls r3, r3, #1
80253fe: 4413 add r3, r2
8025400: 00db lsls r3, r3, #3
8025402: 3308 adds r3, #8
8025404: 4a41 ldr r2, [pc, #260] @ (802550c <etharp_query+0x268>)
8025406: 4413 add r3, r2
8025408: 3304 adds r3, #4
802540a: f44f 6200 mov.w r2, #2048 @ 0x800
802540e: 9200 str r2, [sp, #0]
8025410: 697a ldr r2, [r7, #20]
8025412: 6879 ldr r1, [r7, #4]
8025414: 68f8 ldr r0, [r7, #12]
8025416: f001 fe91 bl 802713c <ethernet_output>
802541a: 4603 mov r3, r0
802541c: f887 3027 strb.w r3, [r7, #39] @ 0x27
8025420: e067 b.n 80254f2 <etharp_query+0x24e>
/* pending entry? (either just created or already pending */
} else if (arp_table[i].state == ETHARP_STATE_PENDING) {
8025422: 7c7a ldrb r2, [r7, #17]
8025424: 4939 ldr r1, [pc, #228] @ (802550c <etharp_query+0x268>)
8025426: 4613 mov r3, r2
8025428: 005b lsls r3, r3, #1
802542a: 4413 add r3, r2
802542c: 00db lsls r3, r3, #3
802542e: 440b add r3, r1
8025430: 3314 adds r3, #20
8025432: 781b ldrb r3, [r3, #0]
8025434: 2b01 cmp r3, #1
8025436: d15c bne.n 80254f2 <etharp_query+0x24e>
/* entry is still pending, queue the given packet 'q' */
struct pbuf *p;
int copy_needed = 0;
8025438: 2300 movs r3, #0
802543a: 61bb str r3, [r7, #24]
/* IF q includes a pbuf that must be copied, copy the whole chain into a
* new PBUF_RAM. See the definition of PBUF_NEEDS_COPY for details. */
p = q;
802543c: 687b ldr r3, [r7, #4]
802543e: 61fb str r3, [r7, #28]
while (p) {
8025440: e01c b.n 802547c <etharp_query+0x1d8>
LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0));
8025442: 69fb ldr r3, [r7, #28]
8025444: 895a ldrh r2, [r3, #10]
8025446: 69fb ldr r3, [r7, #28]
8025448: 891b ldrh r3, [r3, #8]
802544a: 429a cmp r2, r3
802544c: d10a bne.n 8025464 <etharp_query+0x1c0>
802544e: 69fb ldr r3, [r7, #28]
8025450: 681b ldr r3, [r3, #0]
8025452: 2b00 cmp r3, #0
8025454: d006 beq.n 8025464 <etharp_query+0x1c0>
8025456: 4b2a ldr r3, [pc, #168] @ (8025500 <etharp_query+0x25c>)
8025458: f240 32f1 movw r2, #1009 @ 0x3f1
802545c: 492f ldr r1, [pc, #188] @ (802551c <etharp_query+0x278>)
802545e: 482a ldr r0, [pc, #168] @ (8025508 <etharp_query+0x264>)
8025460: f005 fae4 bl 802aa2c <iprintf>
if (PBUF_NEEDS_COPY(p)) {
8025464: 69fb ldr r3, [r7, #28]
8025466: 7b1b ldrb r3, [r3, #12]
8025468: f003 0340 and.w r3, r3, #64 @ 0x40
802546c: 2b00 cmp r3, #0
802546e: d002 beq.n 8025476 <etharp_query+0x1d2>
copy_needed = 1;
8025470: 2301 movs r3, #1
8025472: 61bb str r3, [r7, #24]
break;
8025474: e005 b.n 8025482 <etharp_query+0x1de>
}
p = p->next;
8025476: 69fb ldr r3, [r7, #28]
8025478: 681b ldr r3, [r3, #0]
802547a: 61fb str r3, [r7, #28]
while (p) {
802547c: 69fb ldr r3, [r7, #28]
802547e: 2b00 cmp r3, #0
8025480: d1df bne.n 8025442 <etharp_query+0x19e>
}
if (copy_needed) {
8025482: 69bb ldr r3, [r7, #24]
8025484: 2b00 cmp r3, #0
8025486: d007 beq.n 8025498 <etharp_query+0x1f4>
/* copy the whole packet into new pbufs */
p = pbuf_clone(PBUF_LINK, PBUF_RAM, q);
8025488: 687a ldr r2, [r7, #4]
802548a: f44f 7120 mov.w r1, #640 @ 0x280
802548e: 200e movs r0, #14
8025490: f7f6 facc bl 801ba2c <pbuf_clone>
8025494: 61f8 str r0, [r7, #28]
8025496: e004 b.n 80254a2 <etharp_query+0x1fe>
} else {
/* referencing the old pbuf is enough */
p = q;
8025498: 687b ldr r3, [r7, #4]
802549a: 61fb str r3, [r7, #28]
pbuf_ref(p);
802549c: 69f8 ldr r0, [r7, #28]
802549e: f7f6 f8f3 bl 801b688 <pbuf_ref>
}
/* packet could be taken over? */
if (p != NULL) {
80254a2: 69fb ldr r3, [r7, #28]
80254a4: 2b00 cmp r3, #0
80254a6: d021 beq.n 80254ec <etharp_query+0x248>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
result = ERR_MEM;
}
#else /* ARP_QUEUEING */
/* always queue one packet per ARP request only, freeing a previously queued packet */
if (arp_table[i].q != NULL) {
80254a8: 7c7a ldrb r2, [r7, #17]
80254aa: 4918 ldr r1, [pc, #96] @ (802550c <etharp_query+0x268>)
80254ac: 4613 mov r3, r2
80254ae: 005b lsls r3, r3, #1
80254b0: 4413 add r3, r2
80254b2: 00db lsls r3, r3, #3
80254b4: 440b add r3, r1
80254b6: 681b ldr r3, [r3, #0]
80254b8: 2b00 cmp r3, #0
80254ba: d00a beq.n 80254d2 <etharp_query+0x22e>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
pbuf_free(arp_table[i].q);
80254bc: 7c7a ldrb r2, [r7, #17]
80254be: 4913 ldr r1, [pc, #76] @ (802550c <etharp_query+0x268>)
80254c0: 4613 mov r3, r2
80254c2: 005b lsls r3, r3, #1
80254c4: 4413 add r3, r2
80254c6: 00db lsls r3, r3, #3
80254c8: 440b add r3, r1
80254ca: 681b ldr r3, [r3, #0]
80254cc: 4618 mov r0, r3
80254ce: f7f6 f835 bl 801b53c <pbuf_free>
}
arp_table[i].q = p;
80254d2: 7c7a ldrb r2, [r7, #17]
80254d4: 490d ldr r1, [pc, #52] @ (802550c <etharp_query+0x268>)
80254d6: 4613 mov r3, r2
80254d8: 005b lsls r3, r3, #1
80254da: 4413 add r3, r2
80254dc: 00db lsls r3, r3, #3
80254de: 440b add r3, r1
80254e0: 69fa ldr r2, [r7, #28]
80254e2: 601a str r2, [r3, #0]
result = ERR_OK;
80254e4: 2300 movs r3, #0
80254e6: f887 3027 strb.w r3, [r7, #39] @ 0x27
80254ea: e002 b.n 80254f2 <etharp_query+0x24e>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
#endif /* ARP_QUEUEING */
} else {
ETHARP_STATS_INC(etharp.memerr);
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
result = ERR_MEM;
80254ec: 23ff movs r3, #255 @ 0xff
80254ee: f887 3027 strb.w r3, [r7, #39] @ 0x27
}
}
return result;
80254f2: f997 3027 ldrsb.w r3, [r7, #39] @ 0x27
}
80254f6: 4618 mov r0, r3
80254f8: 3728 adds r7, #40 @ 0x28
80254fa: 46bd mov sp, r7
80254fc: bd80 pop {r7, pc}
80254fe: bf00 nop
8025500: 0803143c .word 0x0803143c
8025504: 080315e8 .word 0x080315e8
8025508: 080314b4 .word 0x080314b4
802550c: 2402b040 .word 0x2402b040
8025510: 080315f8 .word 0x080315f8
8025514: 080315dc .word 0x080315dc
8025518: 2402b130 .word 0x2402b130
802551c: 08031620 .word 0x08031620
08025520 <etharp_raw>:
etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr,
const struct eth_addr *ethdst_addr,
const struct eth_addr *hwsrc_addr, const ip4_addr_t *ipsrc_addr,
const struct eth_addr *hwdst_addr, const ip4_addr_t *ipdst_addr,
const u16_t opcode)
{
8025520: b580 push {r7, lr}
8025522: b08a sub sp, #40 @ 0x28
8025524: af02 add r7, sp, #8
8025526: 60f8 str r0, [r7, #12]
8025528: 60b9 str r1, [r7, #8]
802552a: 607a str r2, [r7, #4]
802552c: 603b str r3, [r7, #0]
struct pbuf *p;
err_t result = ERR_OK;
802552e: 2300 movs r3, #0
8025530: 77fb strb r3, [r7, #31]
struct etharp_hdr *hdr;
LWIP_ASSERT("netif != NULL", netif != NULL);
8025532: 68fb ldr r3, [r7, #12]
8025534: 2b00 cmp r3, #0
8025536: d106 bne.n 8025546 <etharp_raw+0x26>
8025538: 4b3a ldr r3, [pc, #232] @ (8025624 <etharp_raw+0x104>)
802553a: f240 4257 movw r2, #1111 @ 0x457
802553e: 493a ldr r1, [pc, #232] @ (8025628 <etharp_raw+0x108>)
8025540: 483a ldr r0, [pc, #232] @ (802562c <etharp_raw+0x10c>)
8025542: f005 fa73 bl 802aa2c <iprintf>
/* allocate a pbuf for the outgoing ARP request packet */
p = pbuf_alloc(PBUF_LINK, SIZEOF_ETHARP_HDR, PBUF_RAM);
8025546: f44f 7220 mov.w r2, #640 @ 0x280
802554a: 211c movs r1, #28
802554c: 200e movs r0, #14
802554e: f7f5 fcdf bl 801af10 <pbuf_alloc>
8025552: 61b8 str r0, [r7, #24]
/* could allocate a pbuf for an ARP request? */
if (p == NULL) {
8025554: 69bb ldr r3, [r7, #24]
8025556: 2b00 cmp r3, #0
8025558: d102 bne.n 8025560 <etharp_raw+0x40>
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
("etharp_raw: could not allocate pbuf for ARP request.\n"));
ETHARP_STATS_INC(etharp.memerr);
return ERR_MEM;
802555a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802555e: e05d b.n 802561c <etharp_raw+0xfc>
}
LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr",
8025560: 69bb ldr r3, [r7, #24]
8025562: 895b ldrh r3, [r3, #10]
8025564: 2b1b cmp r3, #27
8025566: d806 bhi.n 8025576 <etharp_raw+0x56>
8025568: 4b2e ldr r3, [pc, #184] @ (8025624 <etharp_raw+0x104>)
802556a: f240 4262 movw r2, #1122 @ 0x462
802556e: 4930 ldr r1, [pc, #192] @ (8025630 <etharp_raw+0x110>)
8025570: 482e ldr r0, [pc, #184] @ (802562c <etharp_raw+0x10c>)
8025572: f005 fa5b bl 802aa2c <iprintf>
(p->len >= SIZEOF_ETHARP_HDR));
hdr = (struct etharp_hdr *)p->payload;
8025576: 69bb ldr r3, [r7, #24]
8025578: 685b ldr r3, [r3, #4]
802557a: 617b str r3, [r7, #20]
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n"));
hdr->opcode = lwip_htons(opcode);
802557c: 8ebb ldrh r3, [r7, #52] @ 0x34
802557e: 4618 mov r0, r3
8025580: f7f4 fafa bl 8019b78 <lwip_htons>
8025584: 4603 mov r3, r0
8025586: 461a mov r2, r3
8025588: 697b ldr r3, [r7, #20]
802558a: 80da strh r2, [r3, #6]
LWIP_ASSERT("netif->hwaddr_len must be the same as ETH_HWADDR_LEN for etharp!",
802558c: 68fb ldr r3, [r7, #12]
802558e: f893 3030 ldrb.w r3, [r3, #48] @ 0x30
8025592: 2b06 cmp r3, #6
8025594: d006 beq.n 80255a4 <etharp_raw+0x84>
8025596: 4b23 ldr r3, [pc, #140] @ (8025624 <etharp_raw+0x104>)
8025598: f240 4269 movw r2, #1129 @ 0x469
802559c: 4925 ldr r1, [pc, #148] @ (8025634 <etharp_raw+0x114>)
802559e: 4823 ldr r0, [pc, #140] @ (802562c <etharp_raw+0x10c>)
80255a0: f005 fa44 bl 802aa2c <iprintf>
(netif->hwaddr_len == ETH_HWADDR_LEN));
/* Write the ARP MAC-Addresses */
SMEMCPY(&hdr->shwaddr, hwsrc_addr, ETH_HWADDR_LEN);
80255a4: 697b ldr r3, [r7, #20]
80255a6: 3308 adds r3, #8
80255a8: 2206 movs r2, #6
80255aa: 6839 ldr r1, [r7, #0]
80255ac: 4618 mov r0, r3
80255ae: f005 fcc6 bl 802af3e <memcpy>
SMEMCPY(&hdr->dhwaddr, hwdst_addr, ETH_HWADDR_LEN);
80255b2: 697b ldr r3, [r7, #20]
80255b4: 3312 adds r3, #18
80255b6: 2206 movs r2, #6
80255b8: 6af9 ldr r1, [r7, #44] @ 0x2c
80255ba: 4618 mov r0, r3
80255bc: f005 fcbf bl 802af3e <memcpy>
/* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
* structure packing. */
IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->sipaddr, ipsrc_addr);
80255c0: 697b ldr r3, [r7, #20]
80255c2: 330e adds r3, #14
80255c4: 6aba ldr r2, [r7, #40] @ 0x28
80255c6: 6812 ldr r2, [r2, #0]
80255c8: 601a str r2, [r3, #0]
IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->dipaddr, ipdst_addr);
80255ca: 697b ldr r3, [r7, #20]
80255cc: 3318 adds r3, #24
80255ce: 6b3a ldr r2, [r7, #48] @ 0x30
80255d0: 6812 ldr r2, [r2, #0]
80255d2: 601a str r2, [r3, #0]
hdr->hwtype = PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET);
80255d4: 697b ldr r3, [r7, #20]
80255d6: 2200 movs r2, #0
80255d8: 701a strb r2, [r3, #0]
80255da: 2200 movs r2, #0
80255dc: f042 0201 orr.w r2, r2, #1
80255e0: 705a strb r2, [r3, #1]
hdr->proto = PP_HTONS(ETHTYPE_IP);
80255e2: 697b ldr r3, [r7, #20]
80255e4: 2200 movs r2, #0
80255e6: f042 0208 orr.w r2, r2, #8
80255ea: 709a strb r2, [r3, #2]
80255ec: 2200 movs r2, #0
80255ee: 70da strb r2, [r3, #3]
/* set hwlen and protolen */
hdr->hwlen = ETH_HWADDR_LEN;
80255f0: 697b ldr r3, [r7, #20]
80255f2: 2206 movs r2, #6
80255f4: 711a strb r2, [r3, #4]
hdr->protolen = sizeof(ip4_addr_t);
80255f6: 697b ldr r3, [r7, #20]
80255f8: 2204 movs r2, #4
80255fa: 715a strb r2, [r3, #5]
if (ip4_addr_islinklocal(ipsrc_addr)) {
ethernet_output(netif, p, ethsrc_addr, ðbroadcast, ETHTYPE_ARP);
} else
#endif /* LWIP_AUTOIP */
{
ethernet_output(netif, p, ethsrc_addr, ethdst_addr, ETHTYPE_ARP);
80255fc: f640 0306 movw r3, #2054 @ 0x806
8025600: 9300 str r3, [sp, #0]
8025602: 687b ldr r3, [r7, #4]
8025604: 68ba ldr r2, [r7, #8]
8025606: 69b9 ldr r1, [r7, #24]
8025608: 68f8 ldr r0, [r7, #12]
802560a: f001 fd97 bl 802713c <ethernet_output>
}
ETHARP_STATS_INC(etharp.xmit);
/* free ARP query packet */
pbuf_free(p);
802560e: 69b8 ldr r0, [r7, #24]
8025610: f7f5 ff94 bl 801b53c <pbuf_free>
p = NULL;
8025614: 2300 movs r3, #0
8025616: 61bb str r3, [r7, #24]
/* could not allocate pbuf for ARP request */
return result;
8025618: f997 301f ldrsb.w r3, [r7, #31]
}
802561c: 4618 mov r0, r3
802561e: 3720 adds r7, #32
8025620: 46bd mov sp, r7
8025622: bd80 pop {r7, pc}
8025624: 0803143c .word 0x0803143c
8025628: 0803158c .word 0x0803158c
802562c: 080314b4 .word 0x080314b4
8025630: 0803163c .word 0x0803163c
8025634: 08031670 .word 0x08031670
08025638 <etharp_request_dst>:
* ERR_MEM if the ARP packet couldn't be allocated
* any other err_t on failure
*/
static err_t
etharp_request_dst(struct netif *netif, const ip4_addr_t *ipaddr, const struct eth_addr *hw_dst_addr)
{
8025638: b580 push {r7, lr}
802563a: b088 sub sp, #32
802563c: af04 add r7, sp, #16
802563e: 60f8 str r0, [r7, #12]
8025640: 60b9 str r1, [r7, #8]
8025642: 607a str r2, [r7, #4]
return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
8025644: 68fb ldr r3, [r7, #12]
8025646: f103 012a add.w r1, r3, #42 @ 0x2a
(struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), ðzero,
802564a: 68fb ldr r3, [r7, #12]
802564c: f103 002a add.w r0, r3, #42 @ 0x2a
8025650: 68fb ldr r3, [r7, #12]
8025652: 3304 adds r3, #4
return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
8025654: 2201 movs r2, #1
8025656: 9203 str r2, [sp, #12]
8025658: 68ba ldr r2, [r7, #8]
802565a: 9202 str r2, [sp, #8]
802565c: 4a06 ldr r2, [pc, #24] @ (8025678 <etharp_request_dst+0x40>)
802565e: 9201 str r2, [sp, #4]
8025660: 9300 str r3, [sp, #0]
8025662: 4603 mov r3, r0
8025664: 687a ldr r2, [r7, #4]
8025666: 68f8 ldr r0, [r7, #12]
8025668: f7ff ff5a bl 8025520 <etharp_raw>
802566c: 4603 mov r3, r0
ipaddr, ARP_REQUEST);
}
802566e: 4618 mov r0, r3
8025670: 3710 adds r7, #16
8025672: 46bd mov sp, r7
8025674: bd80 pop {r7, pc}
8025676: bf00 nop
8025678: 08031ed8 .word 0x08031ed8
0802567c <etharp_request>:
* ERR_MEM if the ARP packet couldn't be allocated
* any other err_t on failure
*/
err_t
etharp_request(struct netif *netif, const ip4_addr_t *ipaddr)
{
802567c: b580 push {r7, lr}
802567e: b082 sub sp, #8
8025680: af00 add r7, sp, #0
8025682: 6078 str r0, [r7, #4]
8025684: 6039 str r1, [r7, #0]
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n"));
return etharp_request_dst(netif, ipaddr, ðbroadcast);
8025686: 4a05 ldr r2, [pc, #20] @ (802569c <etharp_request+0x20>)
8025688: 6839 ldr r1, [r7, #0]
802568a: 6878 ldr r0, [r7, #4]
802568c: f7ff ffd4 bl 8025638 <etharp_request_dst>
8025690: 4603 mov r3, r0
}
8025692: 4618 mov r0, r3
8025694: 3708 adds r7, #8
8025696: 46bd mov sp, r7
8025698: bd80 pop {r7, pc}
802569a: bf00 nop
802569c: 08031ed0 .word 0x08031ed0
080256a0 <icmp_input>:
* @param p the icmp echo request packet, p->payload pointing to the icmp header
* @param inp the netif on which this packet was received
*/
void
icmp_input(struct pbuf *p, struct netif *inp)
{
80256a0: b580 push {r7, lr}
80256a2: b08e sub sp, #56 @ 0x38
80256a4: af04 add r7, sp, #16
80256a6: 6078 str r0, [r7, #4]
80256a8: 6039 str r1, [r7, #0]
const ip4_addr_t *src;
ICMP_STATS_INC(icmp.recv);
MIB2_STATS_INC(mib2.icmpinmsgs);
iphdr_in = ip4_current_header();
80256aa: 4b89 ldr r3, [pc, #548] @ (80258d0 <icmp_input+0x230>)
80256ac: 689b ldr r3, [r3, #8]
80256ae: 627b str r3, [r7, #36] @ 0x24
hlen = IPH_HL_BYTES(iphdr_in);
80256b0: 6a7b ldr r3, [r7, #36] @ 0x24
80256b2: 781b ldrb r3, [r3, #0]
80256b4: f003 030f and.w r3, r3, #15
80256b8: b2db uxtb r3, r3
80256ba: 009b lsls r3, r3, #2
80256bc: b2db uxtb r3, r3
80256be: 847b strh r3, [r7, #34] @ 0x22
if (hlen < IP_HLEN) {
80256c0: 8c7b ldrh r3, [r7, #34] @ 0x22
80256c2: 2b13 cmp r3, #19
80256c4: f240 80ed bls.w 80258a2 <icmp_input+0x202>
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short IP header (%"S16_F" bytes) received\n", hlen));
goto lenerr;
}
if (p->len < sizeof(u16_t) * 2) {
80256c8: 687b ldr r3, [r7, #4]
80256ca: 895b ldrh r3, [r3, #10]
80256cc: 2b03 cmp r3, #3
80256ce: f240 80ea bls.w 80258a6 <icmp_input+0x206>
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len));
goto lenerr;
}
type = *((u8_t *)p->payload);
80256d2: 687b ldr r3, [r7, #4]
80256d4: 685b ldr r3, [r3, #4]
80256d6: 781b ldrb r3, [r3, #0]
80256d8: f887 3021 strb.w r3, [r7, #33] @ 0x21
#ifdef LWIP_DEBUG
code = *(((u8_t *)p->payload) + 1);
80256dc: 687b ldr r3, [r7, #4]
80256de: 685b ldr r3, [r3, #4]
80256e0: 785b ldrb r3, [r3, #1]
80256e2: f887 3020 strb.w r3, [r7, #32]
/* if debug is enabled but debug statement below is somehow disabled: */
LWIP_UNUSED_ARG(code);
#endif /* LWIP_DEBUG */
switch (type) {
80256e6: f897 3021 ldrb.w r3, [r7, #33] @ 0x21
80256ea: 2b00 cmp r3, #0
80256ec: f000 80d2 beq.w 8025894 <icmp_input+0x1f4>
80256f0: 2b08 cmp r3, #8
80256f2: f040 80d2 bne.w 802589a <icmp_input+0x1fa>
(as obviously, an echo request has been sent, too). */
MIB2_STATS_INC(mib2.icmpinechoreps);
break;
case ICMP_ECHO:
MIB2_STATS_INC(mib2.icmpinechos);
src = ip4_current_dest_addr();
80256f6: 4b77 ldr r3, [pc, #476] @ (80258d4 <icmp_input+0x234>)
80256f8: 61fb str r3, [r7, #28]
/* multicast destination address? */
if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
80256fa: 4b75 ldr r3, [pc, #468] @ (80258d0 <icmp_input+0x230>)
80256fc: 695b ldr r3, [r3, #20]
80256fe: f003 03f0 and.w r3, r3, #240 @ 0xf0
8025702: 2be0 cmp r3, #224 @ 0xe0
8025704: f000 80d6 beq.w 80258b4 <icmp_input+0x214>
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast pings\n"));
goto icmperr;
#endif /* LWIP_MULTICAST_PING */
}
/* broadcast destination address? */
if (ip4_addr_isbroadcast(ip4_current_dest_addr(), ip_current_netif())) {
8025708: 4b71 ldr r3, [pc, #452] @ (80258d0 <icmp_input+0x230>)
802570a: 695b ldr r3, [r3, #20]
802570c: 4a70 ldr r2, [pc, #448] @ (80258d0 <icmp_input+0x230>)
802570e: 6812 ldr r2, [r2, #0]
8025710: 4611 mov r1, r2
8025712: 4618 mov r0, r3
8025714: f000 fc34 bl 8025f80 <ip4_addr_isbroadcast_u32>
8025718: 4603 mov r3, r0
802571a: 2b00 cmp r3, #0
802571c: f040 80cc bne.w 80258b8 <icmp_input+0x218>
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to broadcast pings\n"));
goto icmperr;
#endif /* LWIP_BROADCAST_PING */
}
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n"));
if (p->tot_len < sizeof(struct icmp_echo_hdr)) {
8025720: 687b ldr r3, [r7, #4]
8025722: 891b ldrh r3, [r3, #8]
8025724: 2b07 cmp r3, #7
8025726: f240 80c0 bls.w 80258aa <icmp_input+0x20a>
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n"));
goto lenerr;
}
#if CHECKSUM_CHECK_ICMP
IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_CHECK_ICMP) {
if (inet_chksum_pbuf(p) != 0) {
802572a: 6878 ldr r0, [r7, #4]
802572c: f7f4 fac1 bl 8019cb2 <inet_chksum_pbuf>
8025730: 4603 mov r3, r0
8025732: 2b00 cmp r3, #0
8025734: d003 beq.n 802573e <icmp_input+0x9e>
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n"));
pbuf_free(p);
8025736: 6878 ldr r0, [r7, #4]
8025738: f7f5 ff00 bl 801b53c <pbuf_free>
ICMP_STATS_INC(icmp.chkerr);
MIB2_STATS_INC(mib2.icmpinerrors);
return;
802573c: e0c5 b.n 80258ca <icmp_input+0x22a>
}
}
#endif
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
if (pbuf_add_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
802573e: 8c7b ldrh r3, [r7, #34] @ 0x22
8025740: 330e adds r3, #14
8025742: 4619 mov r1, r3
8025744: 6878 ldr r0, [r7, #4]
8025746: f7f5 fe31 bl 801b3ac <pbuf_add_header>
802574a: 4603 mov r3, r0
802574c: 2b00 cmp r3, #0
802574e: d04b beq.n 80257e8 <icmp_input+0x148>
/* p is not big enough to contain link headers
* allocate a new one and copy p into it
*/
struct pbuf *r;
u16_t alloc_len = (u16_t)(p->tot_len + hlen);
8025750: 687b ldr r3, [r7, #4]
8025752: 891a ldrh r2, [r3, #8]
8025754: 8c7b ldrh r3, [r7, #34] @ 0x22
8025756: 4413 add r3, r2
8025758: 837b strh r3, [r7, #26]
if (alloc_len < p->tot_len) {
802575a: 687b ldr r3, [r7, #4]
802575c: 891b ldrh r3, [r3, #8]
802575e: 8b7a ldrh r2, [r7, #26]
8025760: 429a cmp r2, r3
8025762: f0c0 80ab bcc.w 80258bc <icmp_input+0x21c>
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed (tot_len overflow)\n"));
goto icmperr;
}
/* allocate new packet buffer with space for link headers */
r = pbuf_alloc(PBUF_LINK, alloc_len, PBUF_RAM);
8025766: 8b7b ldrh r3, [r7, #26]
8025768: f44f 7220 mov.w r2, #640 @ 0x280
802576c: 4619 mov r1, r3
802576e: 200e movs r0, #14
8025770: f7f5 fbce bl 801af10 <pbuf_alloc>
8025774: 6178 str r0, [r7, #20]
if (r == NULL) {
8025776: 697b ldr r3, [r7, #20]
8025778: 2b00 cmp r3, #0
802577a: f000 80a1 beq.w 80258c0 <icmp_input+0x220>
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n"));
goto icmperr;
}
if (r->len < hlen + sizeof(struct icmp_echo_hdr)) {
802577e: 697b ldr r3, [r7, #20]
8025780: 895b ldrh r3, [r3, #10]
8025782: 461a mov r2, r3
8025784: 8c7b ldrh r3, [r7, #34] @ 0x22
8025786: 3308 adds r3, #8
8025788: 429a cmp r2, r3
802578a: d203 bcs.n 8025794 <icmp_input+0xf4>
LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("first pbuf cannot hold the ICMP header"));
pbuf_free(r);
802578c: 6978 ldr r0, [r7, #20]
802578e: f7f5 fed5 bl 801b53c <pbuf_free>
goto icmperr;
8025792: e096 b.n 80258c2 <icmp_input+0x222>
}
/* copy the ip header */
MEMCPY(r->payload, iphdr_in, hlen);
8025794: 697b ldr r3, [r7, #20]
8025796: 685b ldr r3, [r3, #4]
8025798: 8c7a ldrh r2, [r7, #34] @ 0x22
802579a: 6a79 ldr r1, [r7, #36] @ 0x24
802579c: 4618 mov r0, r3
802579e: f005 fbce bl 802af3e <memcpy>
/* switch r->payload back to icmp header (cannot fail) */
if (pbuf_remove_header(r, hlen)) {
80257a2: 8c7b ldrh r3, [r7, #34] @ 0x22
80257a4: 4619 mov r1, r3
80257a6: 6978 ldr r0, [r7, #20]
80257a8: f7f5 fe10 bl 801b3cc <pbuf_remove_header>
80257ac: 4603 mov r3, r0
80257ae: 2b00 cmp r3, #0
80257b0: d009 beq.n 80257c6 <icmp_input+0x126>
LWIP_ASSERT("icmp_input: moving r->payload to icmp header failed\n", 0);
80257b2: 4b49 ldr r3, [pc, #292] @ (80258d8 <icmp_input+0x238>)
80257b4: 22b6 movs r2, #182 @ 0xb6
80257b6: 4949 ldr r1, [pc, #292] @ (80258dc <icmp_input+0x23c>)
80257b8: 4849 ldr r0, [pc, #292] @ (80258e0 <icmp_input+0x240>)
80257ba: f005 f937 bl 802aa2c <iprintf>
pbuf_free(r);
80257be: 6978 ldr r0, [r7, #20]
80257c0: f7f5 febc bl 801b53c <pbuf_free>
goto icmperr;
80257c4: e07d b.n 80258c2 <icmp_input+0x222>
}
/* copy the rest of the packet without ip header */
if (pbuf_copy(r, p) != ERR_OK) {
80257c6: 6879 ldr r1, [r7, #4]
80257c8: 6978 ldr r0, [r7, #20]
80257ca: f7f5 ffeb bl 801b7a4 <pbuf_copy>
80257ce: 4603 mov r3, r0
80257d0: 2b00 cmp r3, #0
80257d2: d003 beq.n 80257dc <icmp_input+0x13c>
LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("icmp_input: copying to new pbuf failed"));
pbuf_free(r);
80257d4: 6978 ldr r0, [r7, #20]
80257d6: f7f5 feb1 bl 801b53c <pbuf_free>
goto icmperr;
80257da: e072 b.n 80258c2 <icmp_input+0x222>
}
/* free the original p */
pbuf_free(p);
80257dc: 6878 ldr r0, [r7, #4]
80257de: f7f5 fead bl 801b53c <pbuf_free>
/* we now have an identical copy of p that has room for link headers */
p = r;
80257e2: 697b ldr r3, [r7, #20]
80257e4: 607b str r3, [r7, #4]
80257e6: e00f b.n 8025808 <icmp_input+0x168>
} else {
/* restore p->payload to point to icmp header (cannot fail) */
if (pbuf_remove_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
80257e8: 8c7b ldrh r3, [r7, #34] @ 0x22
80257ea: 330e adds r3, #14
80257ec: 4619 mov r1, r3
80257ee: 6878 ldr r0, [r7, #4]
80257f0: f7f5 fdec bl 801b3cc <pbuf_remove_header>
80257f4: 4603 mov r3, r0
80257f6: 2b00 cmp r3, #0
80257f8: d006 beq.n 8025808 <icmp_input+0x168>
LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0);
80257fa: 4b37 ldr r3, [pc, #220] @ (80258d8 <icmp_input+0x238>)
80257fc: 22c7 movs r2, #199 @ 0xc7
80257fe: 4939 ldr r1, [pc, #228] @ (80258e4 <icmp_input+0x244>)
8025800: 4837 ldr r0, [pc, #220] @ (80258e0 <icmp_input+0x240>)
8025802: f005 f913 bl 802aa2c <iprintf>
goto icmperr;
8025806: e05c b.n 80258c2 <icmp_input+0x222>
}
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
/* At this point, all checks are OK. */
/* We generate an answer by switching the dest and src ip addresses,
* setting the icmp type to ECHO_RESPONSE and updating the checksum. */
iecho = (struct icmp_echo_hdr *)p->payload;
8025808: 687b ldr r3, [r7, #4]
802580a: 685b ldr r3, [r3, #4]
802580c: 613b str r3, [r7, #16]
if (pbuf_add_header(p, hlen)) {
802580e: 8c7b ldrh r3, [r7, #34] @ 0x22
8025810: 4619 mov r1, r3
8025812: 6878 ldr r0, [r7, #4]
8025814: f7f5 fdca bl 801b3ac <pbuf_add_header>
8025818: 4603 mov r3, r0
802581a: 2b00 cmp r3, #0
802581c: d13c bne.n 8025898 <icmp_input+0x1f8>
LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Can't move over header in packet"));
} else {
err_t ret;
struct ip_hdr *iphdr = (struct ip_hdr *)p->payload;
802581e: 687b ldr r3, [r7, #4]
8025820: 685b ldr r3, [r3, #4]
8025822: 60fb str r3, [r7, #12]
ip4_addr_copy(iphdr->src, *src);
8025824: 69fb ldr r3, [r7, #28]
8025826: 681a ldr r2, [r3, #0]
8025828: 68fb ldr r3, [r7, #12]
802582a: 60da str r2, [r3, #12]
ip4_addr_copy(iphdr->dest, *ip4_current_src_addr());
802582c: 4b28 ldr r3, [pc, #160] @ (80258d0 <icmp_input+0x230>)
802582e: 691a ldr r2, [r3, #16]
8025830: 68fb ldr r3, [r7, #12]
8025832: 611a str r2, [r3, #16]
ICMPH_TYPE_SET(iecho, ICMP_ER);
8025834: 693b ldr r3, [r7, #16]
8025836: 2200 movs r2, #0
8025838: 701a strb r2, [r3, #0]
#if CHECKSUM_GEN_ICMP
IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_GEN_ICMP) {
/* adjust the checksum */
if (iecho->chksum > PP_HTONS(0xffffU - (ICMP_ECHO << 8))) {
802583a: 693b ldr r3, [r7, #16]
802583c: 885b ldrh r3, [r3, #2]
802583e: b29b uxth r3, r3
8025840: f64f 72f7 movw r2, #65527 @ 0xfff7
8025844: 4293 cmp r3, r2
8025846: d907 bls.n 8025858 <icmp_input+0x1b8>
iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS((u16_t)(ICMP_ECHO << 8)) + 1);
8025848: 693b ldr r3, [r7, #16]
802584a: 885b ldrh r3, [r3, #2]
802584c: b29b uxth r3, r3
802584e: 3309 adds r3, #9
8025850: b29a uxth r2, r3
8025852: 693b ldr r3, [r7, #16]
8025854: 805a strh r2, [r3, #2]
8025856: e006 b.n 8025866 <icmp_input+0x1c6>
} else {
iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS(ICMP_ECHO << 8));
8025858: 693b ldr r3, [r7, #16]
802585a: 885b ldrh r3, [r3, #2]
802585c: b29b uxth r3, r3
802585e: 3308 adds r3, #8
8025860: b29a uxth r2, r3
8025862: 693b ldr r3, [r7, #16]
8025864: 805a strh r2, [r3, #2]
#else /* CHECKSUM_GEN_ICMP */
iecho->chksum = 0;
#endif /* CHECKSUM_GEN_ICMP */
/* Set the correct TTL and recalculate the header checksum. */
IPH_TTL_SET(iphdr, ICMP_TTL);
8025866: 68fb ldr r3, [r7, #12]
8025868: 22ff movs r2, #255 @ 0xff
802586a: 721a strb r2, [r3, #8]
IPH_CHKSUM_SET(iphdr, 0);
802586c: 68fb ldr r3, [r7, #12]
802586e: 2200 movs r2, #0
8025870: 729a strb r2, [r3, #10]
8025872: 2200 movs r2, #0
8025874: 72da strb r2, [r3, #11]
MIB2_STATS_INC(mib2.icmpoutmsgs);
/* increase number of echo replies attempted to send */
MIB2_STATS_INC(mib2.icmpoutechoreps);
/* send an ICMP packet */
ret = ip4_output_if(p, src, LWIP_IP_HDRINCL,
8025876: 683b ldr r3, [r7, #0]
8025878: 9302 str r3, [sp, #8]
802587a: 2301 movs r3, #1
802587c: 9301 str r3, [sp, #4]
802587e: 2300 movs r3, #0
8025880: 9300 str r3, [sp, #0]
8025882: 23ff movs r3, #255 @ 0xff
8025884: 2200 movs r2, #0
8025886: 69f9 ldr r1, [r7, #28]
8025888: 6878 ldr r0, [r7, #4]
802588a: f000 fa9f bl 8025dcc <ip4_output_if>
802588e: 4603 mov r3, r0
8025890: 72fb strb r3, [r7, #11]
ICMP_TTL, 0, IP_PROTO_ICMP, inp);
if (ret != ERR_OK) {
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %s\n", lwip_strerr(ret)));
}
}
break;
8025892: e001 b.n 8025898 <icmp_input+0x1f8>
break;
8025894: bf00 nop
8025896: e000 b.n 802589a <icmp_input+0x1fa>
break;
8025898: bf00 nop
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n",
(s16_t)type, (s16_t)code));
ICMP_STATS_INC(icmp.proterr);
ICMP_STATS_INC(icmp.drop);
}
pbuf_free(p);
802589a: 6878 ldr r0, [r7, #4]
802589c: f7f5 fe4e bl 801b53c <pbuf_free>
return;
80258a0: e013 b.n 80258ca <icmp_input+0x22a>
goto lenerr;
80258a2: bf00 nop
80258a4: e002 b.n 80258ac <icmp_input+0x20c>
goto lenerr;
80258a6: bf00 nop
80258a8: e000 b.n 80258ac <icmp_input+0x20c>
goto lenerr;
80258aa: bf00 nop
lenerr:
pbuf_free(p);
80258ac: 6878 ldr r0, [r7, #4]
80258ae: f7f5 fe45 bl 801b53c <pbuf_free>
ICMP_STATS_INC(icmp.lenerr);
MIB2_STATS_INC(mib2.icmpinerrors);
return;
80258b2: e00a b.n 80258ca <icmp_input+0x22a>
goto icmperr;
80258b4: bf00 nop
80258b6: e004 b.n 80258c2 <icmp_input+0x222>
goto icmperr;
80258b8: bf00 nop
80258ba: e002 b.n 80258c2 <icmp_input+0x222>
goto icmperr;
80258bc: bf00 nop
80258be: e000 b.n 80258c2 <icmp_input+0x222>
goto icmperr;
80258c0: bf00 nop
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING
icmperr:
pbuf_free(p);
80258c2: 6878 ldr r0, [r7, #4]
80258c4: f7f5 fe3a bl 801b53c <pbuf_free>
ICMP_STATS_INC(icmp.err);
MIB2_STATS_INC(mib2.icmpinerrors);
return;
80258c8: bf00 nop
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */
}
80258ca: 3728 adds r7, #40 @ 0x28
80258cc: 46bd mov sp, r7
80258ce: bd80 pop {r7, pc}
80258d0: 24024458 .word 0x24024458
80258d4: 2402446c .word 0x2402446c
80258d8: 080316b4 .word 0x080316b4
80258dc: 080316ec .word 0x080316ec
80258e0: 08031724 .word 0x08031724
80258e4: 0803174c .word 0x0803174c
080258e8 <icmp_dest_unreach>:
* p->payload pointing to the IP header
* @param t type of the 'unreachable' packet
*/
void
icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t)
{
80258e8: b580 push {r7, lr}
80258ea: b082 sub sp, #8
80258ec: af00 add r7, sp, #0
80258ee: 6078 str r0, [r7, #4]
80258f0: 460b mov r3, r1
80258f2: 70fb strb r3, [r7, #3]
MIB2_STATS_INC(mib2.icmpoutdestunreachs);
icmp_send_response(p, ICMP_DUR, t);
80258f4: 78fb ldrb r3, [r7, #3]
80258f6: 461a mov r2, r3
80258f8: 2103 movs r1, #3
80258fa: 6878 ldr r0, [r7, #4]
80258fc: f000 f814 bl 8025928 <icmp_send_response>
}
8025900: bf00 nop
8025902: 3708 adds r7, #8
8025904: 46bd mov sp, r7
8025906: bd80 pop {r7, pc}
08025908 <icmp_time_exceeded>:
* p->payload pointing to the IP header
* @param t type of the 'time exceeded' packet
*/
void
icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t)
{
8025908: b580 push {r7, lr}
802590a: b082 sub sp, #8
802590c: af00 add r7, sp, #0
802590e: 6078 str r0, [r7, #4]
8025910: 460b mov r3, r1
8025912: 70fb strb r3, [r7, #3]
MIB2_STATS_INC(mib2.icmpouttimeexcds);
icmp_send_response(p, ICMP_TE, t);
8025914: 78fb ldrb r3, [r7, #3]
8025916: 461a mov r2, r3
8025918: 210b movs r1, #11
802591a: 6878 ldr r0, [r7, #4]
802591c: f000 f804 bl 8025928 <icmp_send_response>
}
8025920: bf00 nop
8025922: 3708 adds r7, #8
8025924: 46bd mov sp, r7
8025926: bd80 pop {r7, pc}
08025928 <icmp_send_response>:
* @param type Type of the ICMP header
* @param code Code of the ICMP header
*/
static void
icmp_send_response(struct pbuf *p, u8_t type, u8_t code)
{
8025928: b580 push {r7, lr}
802592a: b08c sub sp, #48 @ 0x30
802592c: af04 add r7, sp, #16
802592e: 6078 str r0, [r7, #4]
8025930: 460b mov r3, r1
8025932: 70fb strb r3, [r7, #3]
8025934: 4613 mov r3, r2
8025936: 70bb strb r3, [r7, #2]
/* increase number of messages attempted to send */
MIB2_STATS_INC(mib2.icmpoutmsgs);
/* ICMP header + IP header + 8 bytes of data */
q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE,
8025938: f44f 7220 mov.w r2, #640 @ 0x280
802593c: 2124 movs r1, #36 @ 0x24
802593e: 2022 movs r0, #34 @ 0x22
8025940: f7f5 fae6 bl 801af10 <pbuf_alloc>
8025944: 61b8 str r0, [r7, #24]
PBUF_RAM);
if (q == NULL) {
8025946: 69bb ldr r3, [r7, #24]
8025948: 2b00 cmp r3, #0
802594a: d056 beq.n 80259fa <icmp_send_response+0xd2>
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n"));
MIB2_STATS_INC(mib2.icmpouterrors);
return;
}
LWIP_ASSERT("check that first pbuf can hold icmp message",
802594c: 69bb ldr r3, [r7, #24]
802594e: 895b ldrh r3, [r3, #10]
8025950: 2b23 cmp r3, #35 @ 0x23
8025952: d806 bhi.n 8025962 <icmp_send_response+0x3a>
8025954: 4b2b ldr r3, [pc, #172] @ (8025a04 <icmp_send_response+0xdc>)
8025956: f44f 72b4 mov.w r2, #360 @ 0x168
802595a: 492b ldr r1, [pc, #172] @ (8025a08 <icmp_send_response+0xe0>)
802595c: 482b ldr r0, [pc, #172] @ (8025a0c <icmp_send_response+0xe4>)
802595e: f005 f865 bl 802aa2c <iprintf>
(q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE)));
iphdr = (struct ip_hdr *)p->payload;
8025962: 687b ldr r3, [r7, #4]
8025964: 685b ldr r3, [r3, #4]
8025966: 617b str r3, [r7, #20]
ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->src);
LWIP_DEBUGF(ICMP_DEBUG, (" to "));
ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->dest);
LWIP_DEBUGF(ICMP_DEBUG, ("\n"));
icmphdr = (struct icmp_echo_hdr *)q->payload;
8025968: 69bb ldr r3, [r7, #24]
802596a: 685b ldr r3, [r3, #4]
802596c: 613b str r3, [r7, #16]
icmphdr->type = type;
802596e: 693b ldr r3, [r7, #16]
8025970: 78fa ldrb r2, [r7, #3]
8025972: 701a strb r2, [r3, #0]
icmphdr->code = code;
8025974: 693b ldr r3, [r7, #16]
8025976: 78ba ldrb r2, [r7, #2]
8025978: 705a strb r2, [r3, #1]
icmphdr->id = 0;
802597a: 693b ldr r3, [r7, #16]
802597c: 2200 movs r2, #0
802597e: 711a strb r2, [r3, #4]
8025980: 2200 movs r2, #0
8025982: 715a strb r2, [r3, #5]
icmphdr->seqno = 0;
8025984: 693b ldr r3, [r7, #16]
8025986: 2200 movs r2, #0
8025988: 719a strb r2, [r3, #6]
802598a: 2200 movs r2, #0
802598c: 71da strb r2, [r3, #7]
/* copy fields from original packet */
SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload,
802598e: 69bb ldr r3, [r7, #24]
8025990: 685b ldr r3, [r3, #4]
8025992: f103 0008 add.w r0, r3, #8
8025996: 687b ldr r3, [r7, #4]
8025998: 685b ldr r3, [r3, #4]
802599a: 221c movs r2, #28
802599c: 4619 mov r1, r3
802599e: f005 face bl 802af3e <memcpy>
IP_HLEN + ICMP_DEST_UNREACH_DATASIZE);
ip4_addr_copy(iphdr_src, iphdr->src);
80259a2: 697b ldr r3, [r7, #20]
80259a4: 68db ldr r3, [r3, #12]
80259a6: 60fb str r3, [r7, #12]
ip4_addr_t iphdr_dst;
ip4_addr_copy(iphdr_dst, iphdr->dest);
netif = ip4_route_src(&iphdr_dst, &iphdr_src);
}
#else
netif = ip4_route(&iphdr_src);
80259a8: f107 030c add.w r3, r7, #12
80259ac: 4618 mov r0, r3
80259ae: f000 f82f bl 8025a10 <ip4_route>
80259b2: 61f8 str r0, [r7, #28]
#endif
if (netif != NULL) {
80259b4: 69fb ldr r3, [r7, #28]
80259b6: 2b00 cmp r3, #0
80259b8: d01b beq.n 80259f2 <icmp_send_response+0xca>
/* calculate checksum */
icmphdr->chksum = 0;
80259ba: 693b ldr r3, [r7, #16]
80259bc: 2200 movs r2, #0
80259be: 709a strb r2, [r3, #2]
80259c0: 2200 movs r2, #0
80259c2: 70da strb r2, [r3, #3]
#if CHECKSUM_GEN_ICMP
IF__NETIF_CHECKSUM_ENABLED(netif, NETIF_CHECKSUM_GEN_ICMP) {
icmphdr->chksum = inet_chksum(icmphdr, q->len);
80259c4: 69bb ldr r3, [r7, #24]
80259c6: 895b ldrh r3, [r3, #10]
80259c8: 4619 mov r1, r3
80259ca: 6938 ldr r0, [r7, #16]
80259cc: f7f4 f95f bl 8019c8e <inet_chksum>
80259d0: 4603 mov r3, r0
80259d2: 461a mov r2, r3
80259d4: 693b ldr r3, [r7, #16]
80259d6: 805a strh r2, [r3, #2]
}
#endif
ICMP_STATS_INC(icmp.xmit);
ip4_output_if(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP, netif);
80259d8: f107 020c add.w r2, r7, #12
80259dc: 69fb ldr r3, [r7, #28]
80259de: 9302 str r3, [sp, #8]
80259e0: 2301 movs r3, #1
80259e2: 9301 str r3, [sp, #4]
80259e4: 2300 movs r3, #0
80259e6: 9300 str r3, [sp, #0]
80259e8: 23ff movs r3, #255 @ 0xff
80259ea: 2100 movs r1, #0
80259ec: 69b8 ldr r0, [r7, #24]
80259ee: f000 f9ed bl 8025dcc <ip4_output_if>
}
pbuf_free(q);
80259f2: 69b8 ldr r0, [r7, #24]
80259f4: f7f5 fda2 bl 801b53c <pbuf_free>
80259f8: e000 b.n 80259fc <icmp_send_response+0xd4>
return;
80259fa: bf00 nop
}
80259fc: 3720 adds r7, #32
80259fe: 46bd mov sp, r7
8025a00: bd80 pop {r7, pc}
8025a02: bf00 nop
8025a04: 080316b4 .word 0x080316b4
8025a08: 08031780 .word 0x08031780
8025a0c: 08031724 .word 0x08031724
08025a10 <ip4_route>:
* @param dest the destination IP address for which to find the route
* @return the netif on which to send to reach dest
*/
struct netif *
ip4_route(const ip4_addr_t *dest)
{
8025a10: b580 push {r7, lr}
8025a12: b084 sub sp, #16
8025a14: af00 add r7, sp, #0
8025a16: 6078 str r0, [r7, #4]
#if !LWIP_SINGLE_NETIF
struct netif *netif;
LWIP_ASSERT_CORE_LOCKED();
8025a18: f7eb fbdc bl 80111d4 <sys_check_core_locking>
/* bug #54569: in case LWIP_SINGLE_NETIF=1 and LWIP_DEBUGF() disabled, the following loop is optimized away */
LWIP_UNUSED_ARG(dest);
/* iterate through netifs */
NETIF_FOREACH(netif) {
8025a1c: 4b32 ldr r3, [pc, #200] @ (8025ae8 <ip4_route+0xd8>)
8025a1e: 681b ldr r3, [r3, #0]
8025a20: 60fb str r3, [r7, #12]
8025a22: e036 b.n 8025a92 <ip4_route+0x82>
/* is the netif up, does it have a link and a valid address? */
if (netif_is_up(netif) && netif_is_link_up(netif) && !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
8025a24: 68fb ldr r3, [r7, #12]
8025a26: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8025a2a: f003 0301 and.w r3, r3, #1
8025a2e: b2db uxtb r3, r3
8025a30: 2b00 cmp r3, #0
8025a32: d02b beq.n 8025a8c <ip4_route+0x7c>
8025a34: 68fb ldr r3, [r7, #12]
8025a36: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8025a3a: 089b lsrs r3, r3, #2
8025a3c: f003 0301 and.w r3, r3, #1
8025a40: b2db uxtb r3, r3
8025a42: 2b00 cmp r3, #0
8025a44: d022 beq.n 8025a8c <ip4_route+0x7c>
8025a46: 68fb ldr r3, [r7, #12]
8025a48: 3304 adds r3, #4
8025a4a: 681b ldr r3, [r3, #0]
8025a4c: 2b00 cmp r3, #0
8025a4e: d01d beq.n 8025a8c <ip4_route+0x7c>
/* network mask matches? */
if (ip4_addr_netcmp(dest, netif_ip4_addr(netif), netif_ip4_netmask(netif))) {
8025a50: 687b ldr r3, [r7, #4]
8025a52: 681a ldr r2, [r3, #0]
8025a54: 68fb ldr r3, [r7, #12]
8025a56: 3304 adds r3, #4
8025a58: 681b ldr r3, [r3, #0]
8025a5a: 405a eors r2, r3
8025a5c: 68fb ldr r3, [r7, #12]
8025a5e: 3308 adds r3, #8
8025a60: 681b ldr r3, [r3, #0]
8025a62: 4013 ands r3, r2
8025a64: 2b00 cmp r3, #0
8025a66: d101 bne.n 8025a6c <ip4_route+0x5c>
/* return netif on which to forward IP packet */
return netif;
8025a68: 68fb ldr r3, [r7, #12]
8025a6a: e038 b.n 8025ade <ip4_route+0xce>
}
/* gateway matches on a non broadcast interface? (i.e. peer in a point to point interface) */
if (((netif->flags & NETIF_FLAG_BROADCAST) == 0) && ip4_addr_cmp(dest, netif_ip4_gw(netif))) {
8025a6c: 68fb ldr r3, [r7, #12]
8025a6e: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8025a72: f003 0302 and.w r3, r3, #2
8025a76: 2b00 cmp r3, #0
8025a78: d108 bne.n 8025a8c <ip4_route+0x7c>
8025a7a: 687b ldr r3, [r7, #4]
8025a7c: 681a ldr r2, [r3, #0]
8025a7e: 68fb ldr r3, [r7, #12]
8025a80: 330c adds r3, #12
8025a82: 681b ldr r3, [r3, #0]
8025a84: 429a cmp r2, r3
8025a86: d101 bne.n 8025a8c <ip4_route+0x7c>
/* return netif on which to forward IP packet */
return netif;
8025a88: 68fb ldr r3, [r7, #12]
8025a8a: e028 b.n 8025ade <ip4_route+0xce>
NETIF_FOREACH(netif) {
8025a8c: 68fb ldr r3, [r7, #12]
8025a8e: 681b ldr r3, [r3, #0]
8025a90: 60fb str r3, [r7, #12]
8025a92: 68fb ldr r3, [r7, #12]
8025a94: 2b00 cmp r3, #0
8025a96: d1c5 bne.n 8025a24 <ip4_route+0x14>
return netif;
}
#endif
#endif /* !LWIP_SINGLE_NETIF */
if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
8025a98: 4b14 ldr r3, [pc, #80] @ (8025aec <ip4_route+0xdc>)
8025a9a: 681b ldr r3, [r3, #0]
8025a9c: 2b00 cmp r3, #0
8025a9e: d01a beq.n 8025ad6 <ip4_route+0xc6>
8025aa0: 4b12 ldr r3, [pc, #72] @ (8025aec <ip4_route+0xdc>)
8025aa2: 681b ldr r3, [r3, #0]
8025aa4: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8025aa8: f003 0301 and.w r3, r3, #1
8025aac: 2b00 cmp r3, #0
8025aae: d012 beq.n 8025ad6 <ip4_route+0xc6>
8025ab0: 4b0e ldr r3, [pc, #56] @ (8025aec <ip4_route+0xdc>)
8025ab2: 681b ldr r3, [r3, #0]
8025ab4: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8025ab8: f003 0304 and.w r3, r3, #4
8025abc: 2b00 cmp r3, #0
8025abe: d00a beq.n 8025ad6 <ip4_route+0xc6>
ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
8025ac0: 4b0a ldr r3, [pc, #40] @ (8025aec <ip4_route+0xdc>)
8025ac2: 681b ldr r3, [r3, #0]
8025ac4: 3304 adds r3, #4
8025ac6: 681b ldr r3, [r3, #0]
if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
8025ac8: 2b00 cmp r3, #0
8025aca: d004 beq.n 8025ad6 <ip4_route+0xc6>
ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
8025acc: 687b ldr r3, [r7, #4]
8025ace: 681b ldr r3, [r3, #0]
8025ad0: b2db uxtb r3, r3
8025ad2: 2b7f cmp r3, #127 @ 0x7f
8025ad4: d101 bne.n 8025ada <ip4_route+0xca>
If this is not good enough for you, use LWIP_HOOK_IP4_ROUTE() */
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest)));
IP_STATS_INC(ip.rterr);
MIB2_STATS_INC(mib2.ipoutnoroutes);
return NULL;
8025ad6: 2300 movs r3, #0
8025ad8: e001 b.n 8025ade <ip4_route+0xce>
}
return netif_default;
8025ada: 4b04 ldr r3, [pc, #16] @ (8025aec <ip4_route+0xdc>)
8025adc: 681b ldr r3, [r3, #0]
}
8025ade: 4618 mov r0, r3
8025ae0: 3710 adds r7, #16
8025ae2: 46bd mov sp, r7
8025ae4: bd80 pop {r7, pc}
8025ae6: bf00 nop
8025ae8: 2402af9c .word 0x2402af9c
8025aec: 2402afa0 .word 0x2402afa0
08025af0 <ip4_input_accept>:
#endif /* IP_FORWARD */
/** Return true if the current input packet should be accepted on this netif */
static int
ip4_input_accept(struct netif *netif)
{
8025af0: b580 push {r7, lr}
8025af2: b082 sub sp, #8
8025af4: af00 add r7, sp, #0
8025af6: 6078 str r0, [r7, #4]
ip4_addr_get_u32(ip4_current_dest_addr()) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
ip4_addr_get_u32(netif_ip4_addr(netif)) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
ip4_addr_get_u32(ip4_current_dest_addr()) & ~ip4_addr_get_u32(netif_ip4_netmask(netif))));
/* interface is up and configured? */
if ((netif_is_up(netif)) && (!ip4_addr_isany_val(*netif_ip4_addr(netif)))) {
8025af8: 687b ldr r3, [r7, #4]
8025afa: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8025afe: f003 0301 and.w r3, r3, #1
8025b02: b2db uxtb r3, r3
8025b04: 2b00 cmp r3, #0
8025b06: d016 beq.n 8025b36 <ip4_input_accept+0x46>
8025b08: 687b ldr r3, [r7, #4]
8025b0a: 3304 adds r3, #4
8025b0c: 681b ldr r3, [r3, #0]
8025b0e: 2b00 cmp r3, #0
8025b10: d011 beq.n 8025b36 <ip4_input_accept+0x46>
/* unicast to this interface address? */
if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
8025b12: 4b0b ldr r3, [pc, #44] @ (8025b40 <ip4_input_accept+0x50>)
8025b14: 695a ldr r2, [r3, #20]
8025b16: 687b ldr r3, [r7, #4]
8025b18: 3304 adds r3, #4
8025b1a: 681b ldr r3, [r3, #0]
8025b1c: 429a cmp r2, r3
8025b1e: d008 beq.n 8025b32 <ip4_input_accept+0x42>
/* or broadcast on this interface network address? */
ip4_addr_isbroadcast(ip4_current_dest_addr(), netif)
8025b20: 4b07 ldr r3, [pc, #28] @ (8025b40 <ip4_input_accept+0x50>)
8025b22: 695b ldr r3, [r3, #20]
8025b24: 6879 ldr r1, [r7, #4]
8025b26: 4618 mov r0, r3
8025b28: f000 fa2a bl 8025f80 <ip4_addr_isbroadcast_u32>
8025b2c: 4603 mov r3, r0
if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
8025b2e: 2b00 cmp r3, #0
8025b30: d001 beq.n 8025b36 <ip4_input_accept+0x46>
#endif /* LWIP_NETIF_LOOPBACK && !LWIP_HAVE_LOOPIF */
) {
LWIP_DEBUGF(IP_DEBUG, ("ip4_input: packet accepted on interface %c%c\n",
netif->name[0], netif->name[1]));
/* accept on this netif */
return 1;
8025b32: 2301 movs r3, #1
8025b34: e000 b.n 8025b38 <ip4_input_accept+0x48>
/* accept on this netif */
return 1;
}
#endif /* LWIP_AUTOIP */
}
return 0;
8025b36: 2300 movs r3, #0
}
8025b38: 4618 mov r0, r3
8025b3a: 3708 adds r7, #8
8025b3c: 46bd mov sp, r7
8025b3e: bd80 pop {r7, pc}
8025b40: 24024458 .word 0x24024458
08025b44 <ip4_input>:
* @return ERR_OK if the packet was processed (could return ERR_* if it wasn't
* processed, but currently always returns ERR_OK)
*/
err_t
ip4_input(struct pbuf *p, struct netif *inp)
{
8025b44: b580 push {r7, lr}
8025b46: b088 sub sp, #32
8025b48: af00 add r7, sp, #0
8025b4a: 6078 str r0, [r7, #4]
8025b4c: 6039 str r1, [r7, #0]
const struct ip_hdr *iphdr;
struct netif *netif;
u16_t iphdr_hlen;
u16_t iphdr_len;
#if IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP
int check_ip_src = 1;
8025b4e: 2301 movs r3, #1
8025b50: 617b str r3, [r7, #20]
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP */
#if LWIP_RAW
raw_input_state_t raw_status;
#endif /* LWIP_RAW */
LWIP_ASSERT_CORE_LOCKED();
8025b52: f7eb fb3f bl 80111d4 <sys_check_core_locking>
IP_STATS_INC(ip.recv);
MIB2_STATS_INC(mib2.ipinreceives);
/* identify the IP header */
iphdr = (struct ip_hdr *)p->payload;
8025b56: 687b ldr r3, [r7, #4]
8025b58: 685b ldr r3, [r3, #4]
8025b5a: 613b str r3, [r7, #16]
if (IPH_V(iphdr) != 4) {
8025b5c: 693b ldr r3, [r7, #16]
8025b5e: 781b ldrb r3, [r3, #0]
8025b60: 091b lsrs r3, r3, #4
8025b62: b2db uxtb r3, r3
8025b64: 2b04 cmp r3, #4
8025b66: d004 beq.n 8025b72 <ip4_input+0x2e>
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", (u16_t)IPH_V(iphdr)));
ip4_debug_print(p);
pbuf_free(p);
8025b68: 6878 ldr r0, [r7, #4]
8025b6a: f7f5 fce7 bl 801b53c <pbuf_free>
IP_STATS_INC(ip.err);
IP_STATS_INC(ip.drop);
MIB2_STATS_INC(mib2.ipinhdrerrors);
return ERR_OK;
8025b6e: 2300 movs r3, #0
8025b70: e123 b.n 8025dba <ip4_input+0x276>
return ERR_OK;
}
#endif
/* obtain IP header length in bytes */
iphdr_hlen = IPH_HL_BYTES(iphdr);
8025b72: 693b ldr r3, [r7, #16]
8025b74: 781b ldrb r3, [r3, #0]
8025b76: f003 030f and.w r3, r3, #15
8025b7a: b2db uxtb r3, r3
8025b7c: 009b lsls r3, r3, #2
8025b7e: b2db uxtb r3, r3
8025b80: 81fb strh r3, [r7, #14]
/* obtain ip length in bytes */
iphdr_len = lwip_ntohs(IPH_LEN(iphdr));
8025b82: 693b ldr r3, [r7, #16]
8025b84: 885b ldrh r3, [r3, #2]
8025b86: b29b uxth r3, r3
8025b88: 4618 mov r0, r3
8025b8a: f7f3 fff5 bl 8019b78 <lwip_htons>
8025b8e: 4603 mov r3, r0
8025b90: 837b strh r3, [r7, #26]
/* Trim pbuf. This is especially required for packets < 60 bytes. */
if (iphdr_len < p->tot_len) {
8025b92: 687b ldr r3, [r7, #4]
8025b94: 891b ldrh r3, [r3, #8]
8025b96: 8b7a ldrh r2, [r7, #26]
8025b98: 429a cmp r2, r3
8025b9a: d204 bcs.n 8025ba6 <ip4_input+0x62>
pbuf_realloc(p, iphdr_len);
8025b9c: 8b7b ldrh r3, [r7, #26]
8025b9e: 4619 mov r1, r3
8025ba0: 6878 ldr r0, [r7, #4]
8025ba2: f7f5 fb15 bl 801b1d0 <pbuf_realloc>
}
/* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */
if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len) || (iphdr_hlen < IP_HLEN)) {
8025ba6: 687b ldr r3, [r7, #4]
8025ba8: 895b ldrh r3, [r3, #10]
8025baa: 89fa ldrh r2, [r7, #14]
8025bac: 429a cmp r2, r3
8025bae: d807 bhi.n 8025bc0 <ip4_input+0x7c>
8025bb0: 687b ldr r3, [r7, #4]
8025bb2: 891b ldrh r3, [r3, #8]
8025bb4: 8b7a ldrh r2, [r7, #26]
8025bb6: 429a cmp r2, r3
8025bb8: d802 bhi.n 8025bc0 <ip4_input+0x7c>
8025bba: 89fb ldrh r3, [r7, #14]
8025bbc: 2b13 cmp r3, #19
8025bbe: d804 bhi.n 8025bca <ip4_input+0x86>
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n",
iphdr_len, p->tot_len));
}
/* free (drop) packet pbufs */
pbuf_free(p);
8025bc0: 6878 ldr r0, [r7, #4]
8025bc2: f7f5 fcbb bl 801b53c <pbuf_free>
IP_STATS_INC(ip.lenerr);
IP_STATS_INC(ip.drop);
MIB2_STATS_INC(mib2.ipindiscards);
return ERR_OK;
8025bc6: 2300 movs r3, #0
8025bc8: e0f7 b.n 8025dba <ip4_input+0x276>
}
}
#endif
/* copy IP addresses to aligned ip_addr_t */
ip_addr_copy_from_ip4(ip_data.current_iphdr_dest, iphdr->dest);
8025bca: 693b ldr r3, [r7, #16]
8025bcc: 691b ldr r3, [r3, #16]
8025bce: 4a7d ldr r2, [pc, #500] @ (8025dc4 <ip4_input+0x280>)
8025bd0: 6153 str r3, [r2, #20]
ip_addr_copy_from_ip4(ip_data.current_iphdr_src, iphdr->src);
8025bd2: 693b ldr r3, [r7, #16]
8025bd4: 68db ldr r3, [r3, #12]
8025bd6: 4a7b ldr r2, [pc, #492] @ (8025dc4 <ip4_input+0x280>)
8025bd8: 6113 str r3, [r2, #16]
/* match packet against an interface, i.e. is this packet for us? */
if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
8025bda: 4b7a ldr r3, [pc, #488] @ (8025dc4 <ip4_input+0x280>)
8025bdc: 695b ldr r3, [r3, #20]
8025bde: f003 03f0 and.w r3, r3, #240 @ 0xf0
8025be2: 2be0 cmp r3, #224 @ 0xe0
8025be4: d112 bne.n 8025c0c <ip4_input+0xc8>
netif = inp;
} else {
netif = NULL;
}
#else /* LWIP_IGMP */
if ((netif_is_up(inp)) && (!ip4_addr_isany_val(*netif_ip4_addr(inp)))) {
8025be6: 683b ldr r3, [r7, #0]
8025be8: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8025bec: f003 0301 and.w r3, r3, #1
8025bf0: b2db uxtb r3, r3
8025bf2: 2b00 cmp r3, #0
8025bf4: d007 beq.n 8025c06 <ip4_input+0xc2>
8025bf6: 683b ldr r3, [r7, #0]
8025bf8: 3304 adds r3, #4
8025bfa: 681b ldr r3, [r3, #0]
8025bfc: 2b00 cmp r3, #0
8025bfe: d002 beq.n 8025c06 <ip4_input+0xc2>
netif = inp;
8025c00: 683b ldr r3, [r7, #0]
8025c02: 61fb str r3, [r7, #28]
8025c04: e02a b.n 8025c5c <ip4_input+0x118>
} else {
netif = NULL;
8025c06: 2300 movs r3, #0
8025c08: 61fb str r3, [r7, #28]
8025c0a: e027 b.n 8025c5c <ip4_input+0x118>
}
#endif /* LWIP_IGMP */
} else {
/* start trying with inp. if that's not acceptable, start walking the
list of configured netifs. */
if (ip4_input_accept(inp)) {
8025c0c: 6838 ldr r0, [r7, #0]
8025c0e: f7ff ff6f bl 8025af0 <ip4_input_accept>
8025c12: 4603 mov r3, r0
8025c14: 2b00 cmp r3, #0
8025c16: d002 beq.n 8025c1e <ip4_input+0xda>
netif = inp;
8025c18: 683b ldr r3, [r7, #0]
8025c1a: 61fb str r3, [r7, #28]
8025c1c: e01e b.n 8025c5c <ip4_input+0x118>
} else {
netif = NULL;
8025c1e: 2300 movs r3, #0
8025c20: 61fb str r3, [r7, #28]
#if !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF
/* Packets sent to the loopback address must not be accepted on an
* interface that does not have the loopback address assigned to it,
* unless a non-loopback interface is used for loopback traffic. */
if (!ip4_addr_isloopback(ip4_current_dest_addr()))
8025c22: 4b68 ldr r3, [pc, #416] @ (8025dc4 <ip4_input+0x280>)
8025c24: 695b ldr r3, [r3, #20]
8025c26: b2db uxtb r3, r3
8025c28: 2b7f cmp r3, #127 @ 0x7f
8025c2a: d017 beq.n 8025c5c <ip4_input+0x118>
#endif /* !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF */
{
#if !LWIP_SINGLE_NETIF
NETIF_FOREACH(netif) {
8025c2c: 4b66 ldr r3, [pc, #408] @ (8025dc8 <ip4_input+0x284>)
8025c2e: 681b ldr r3, [r3, #0]
8025c30: 61fb str r3, [r7, #28]
8025c32: e00e b.n 8025c52 <ip4_input+0x10e>
if (netif == inp) {
8025c34: 69fa ldr r2, [r7, #28]
8025c36: 683b ldr r3, [r7, #0]
8025c38: 429a cmp r2, r3
8025c3a: d006 beq.n 8025c4a <ip4_input+0x106>
/* we checked that before already */
continue;
}
if (ip4_input_accept(netif)) {
8025c3c: 69f8 ldr r0, [r7, #28]
8025c3e: f7ff ff57 bl 8025af0 <ip4_input_accept>
8025c42: 4603 mov r3, r0
8025c44: 2b00 cmp r3, #0
8025c46: d108 bne.n 8025c5a <ip4_input+0x116>
8025c48: e000 b.n 8025c4c <ip4_input+0x108>
continue;
8025c4a: bf00 nop
NETIF_FOREACH(netif) {
8025c4c: 69fb ldr r3, [r7, #28]
8025c4e: 681b ldr r3, [r3, #0]
8025c50: 61fb str r3, [r7, #28]
8025c52: 69fb ldr r3, [r7, #28]
8025c54: 2b00 cmp r3, #0
8025c56: d1ed bne.n 8025c34 <ip4_input+0xf0>
8025c58: e000 b.n 8025c5c <ip4_input+0x118>
break;
8025c5a: bf00 nop
* If you want to accept private broadcast communication while a netif is down,
* define LWIP_IP_ACCEPT_UDP_PORT(dst_port), e.g.:
*
* #define LWIP_IP_ACCEPT_UDP_PORT(dst_port) ((dst_port) == PP_NTOHS(12345))
*/
if (netif == NULL) {
8025c5c: 69fb ldr r3, [r7, #28]
8025c5e: 2b00 cmp r3, #0
8025c60: d111 bne.n 8025c86 <ip4_input+0x142>
/* remote port is DHCP server? */
if (IPH_PROTO(iphdr) == IP_PROTO_UDP) {
8025c62: 693b ldr r3, [r7, #16]
8025c64: 7a5b ldrb r3, [r3, #9]
8025c66: 2b11 cmp r3, #17
8025c68: d10d bne.n 8025c86 <ip4_input+0x142>
const struct udp_hdr *udphdr = (const struct udp_hdr *)((const u8_t *)iphdr + iphdr_hlen);
8025c6a: 89fb ldrh r3, [r7, #14]
8025c6c: 693a ldr r2, [r7, #16]
8025c6e: 4413 add r3, r2
8025c70: 60bb str r3, [r7, #8]
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: UDP packet to DHCP client port %"U16_F"\n",
lwip_ntohs(udphdr->dest)));
if (IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(udphdr->dest)) {
8025c72: 68bb ldr r3, [r7, #8]
8025c74: 885b ldrh r3, [r3, #2]
8025c76: b29b uxth r3, r3
8025c78: f5b3 4f88 cmp.w r3, #17408 @ 0x4400
8025c7c: d103 bne.n 8025c86 <ip4_input+0x142>
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: DHCP packet accepted.\n"));
netif = inp;
8025c7e: 683b ldr r3, [r7, #0]
8025c80: 61fb str r3, [r7, #28]
check_ip_src = 0;
8025c82: 2300 movs r3, #0
8025c84: 617b str r3, [r7, #20]
}
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
/* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */
#if LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING
if (check_ip_src
8025c86: 697b ldr r3, [r7, #20]
8025c88: 2b00 cmp r3, #0
8025c8a: d017 beq.n 8025cbc <ip4_input+0x178>
#if IP_ACCEPT_LINK_LAYER_ADDRESSING
/* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */
&& !ip4_addr_isany_val(*ip4_current_src_addr())
8025c8c: 4b4d ldr r3, [pc, #308] @ (8025dc4 <ip4_input+0x280>)
8025c8e: 691b ldr r3, [r3, #16]
8025c90: 2b00 cmp r3, #0
8025c92: d013 beq.n 8025cbc <ip4_input+0x178>
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
)
#endif /* LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING */
{
if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
8025c94: 4b4b ldr r3, [pc, #300] @ (8025dc4 <ip4_input+0x280>)
8025c96: 691b ldr r3, [r3, #16]
8025c98: 6839 ldr r1, [r7, #0]
8025c9a: 4618 mov r0, r3
8025c9c: f000 f970 bl 8025f80 <ip4_addr_isbroadcast_u32>
8025ca0: 4603 mov r3, r0
8025ca2: 2b00 cmp r3, #0
8025ca4: d105 bne.n 8025cb2 <ip4_input+0x16e>
(ip4_addr_ismulticast(ip4_current_src_addr()))) {
8025ca6: 4b47 ldr r3, [pc, #284] @ (8025dc4 <ip4_input+0x280>)
8025ca8: 691b ldr r3, [r3, #16]
8025caa: f003 03f0 and.w r3, r3, #240 @ 0xf0
if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
8025cae: 2be0 cmp r3, #224 @ 0xe0
8025cb0: d104 bne.n 8025cbc <ip4_input+0x178>
/* packet source is not valid */
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip4_input: packet source is not valid.\n"));
/* free (drop) packet pbufs */
pbuf_free(p);
8025cb2: 6878 ldr r0, [r7, #4]
8025cb4: f7f5 fc42 bl 801b53c <pbuf_free>
IP_STATS_INC(ip.drop);
MIB2_STATS_INC(mib2.ipinaddrerrors);
MIB2_STATS_INC(mib2.ipindiscards);
return ERR_OK;
8025cb8: 2300 movs r3, #0
8025cba: e07e b.n 8025dba <ip4_input+0x276>
}
}
/* packet not for us? */
if (netif == NULL) {
8025cbc: 69fb ldr r3, [r7, #28]
8025cbe: 2b00 cmp r3, #0
8025cc0: d104 bne.n 8025ccc <ip4_input+0x188>
{
IP_STATS_INC(ip.drop);
MIB2_STATS_INC(mib2.ipinaddrerrors);
MIB2_STATS_INC(mib2.ipindiscards);
}
pbuf_free(p);
8025cc2: 6878 ldr r0, [r7, #4]
8025cc4: f7f5 fc3a bl 801b53c <pbuf_free>
return ERR_OK;
8025cc8: 2300 movs r3, #0
8025cca: e076 b.n 8025dba <ip4_input+0x276>
}
/* packet consists of multiple fragments? */
if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) {
8025ccc: 693b ldr r3, [r7, #16]
8025cce: 88db ldrh r3, [r3, #6]
8025cd0: b29b uxth r3, r3
8025cd2: 461a mov r2, r3
8025cd4: f64f 733f movw r3, #65343 @ 0xff3f
8025cd8: 4013 ands r3, r2
8025cda: 2b00 cmp r3, #0
8025cdc: d00b beq.n 8025cf6 <ip4_input+0x1b2>
#if IP_REASSEMBLY /* packet fragment reassembly code present? */
LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip4_reass()\n",
lwip_ntohs(IPH_ID(iphdr)), p->tot_len, lwip_ntohs(IPH_LEN(iphdr)), (u16_t)!!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (u16_t)((lwip_ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK) * 8)));
/* reassemble the packet*/
p = ip4_reass(p);
8025cde: 6878 ldr r0, [r7, #4]
8025ce0: f000 fe62 bl 80269a8 <ip4_reass>
8025ce4: 6078 str r0, [r7, #4]
/* packet not fully reassembled yet? */
if (p == NULL) {
8025ce6: 687b ldr r3, [r7, #4]
8025ce8: 2b00 cmp r3, #0
8025cea: d101 bne.n 8025cf0 <ip4_input+0x1ac>
return ERR_OK;
8025cec: 2300 movs r3, #0
8025cee: e064 b.n 8025dba <ip4_input+0x276>
}
iphdr = (const struct ip_hdr *)p->payload;
8025cf0: 687b ldr r3, [r7, #4]
8025cf2: 685b ldr r3, [r3, #4]
8025cf4: 613b str r3, [r7, #16]
/* send to upper layers */
LWIP_DEBUGF(IP_DEBUG, ("ip4_input: \n"));
ip4_debug_print(p);
LWIP_DEBUGF(IP_DEBUG, ("ip4_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len));
ip_data.current_netif = netif;
8025cf6: 4a33 ldr r2, [pc, #204] @ (8025dc4 <ip4_input+0x280>)
8025cf8: 69fb ldr r3, [r7, #28]
8025cfa: 6013 str r3, [r2, #0]
ip_data.current_input_netif = inp;
8025cfc: 4a31 ldr r2, [pc, #196] @ (8025dc4 <ip4_input+0x280>)
8025cfe: 683b ldr r3, [r7, #0]
8025d00: 6053 str r3, [r2, #4]
ip_data.current_ip4_header = iphdr;
8025d02: 4a30 ldr r2, [pc, #192] @ (8025dc4 <ip4_input+0x280>)
8025d04: 693b ldr r3, [r7, #16]
8025d06: 6093 str r3, [r2, #8]
ip_data.current_ip_header_tot_len = IPH_HL_BYTES(iphdr);
8025d08: 693b ldr r3, [r7, #16]
8025d0a: 781b ldrb r3, [r3, #0]
8025d0c: f003 030f and.w r3, r3, #15
8025d10: b2db uxtb r3, r3
8025d12: 009b lsls r3, r3, #2
8025d14: b2db uxtb r3, r3
8025d16: 461a mov r2, r3
8025d18: 4b2a ldr r3, [pc, #168] @ (8025dc4 <ip4_input+0x280>)
8025d1a: 819a strh r2, [r3, #12]
/* raw input did not eat the packet? */
raw_status = raw_input(p, inp);
if (raw_status != RAW_INPUT_EATEN)
#endif /* LWIP_RAW */
{
pbuf_remove_header(p, iphdr_hlen); /* Move to payload, no check necessary. */
8025d1c: 89fb ldrh r3, [r7, #14]
8025d1e: 4619 mov r1, r3
8025d20: 6878 ldr r0, [r7, #4]
8025d22: f7f5 fb53 bl 801b3cc <pbuf_remove_header>
switch (IPH_PROTO(iphdr)) {
8025d26: 693b ldr r3, [r7, #16]
8025d28: 7a5b ldrb r3, [r3, #9]
8025d2a: 2b11 cmp r3, #17
8025d2c: d006 beq.n 8025d3c <ip4_input+0x1f8>
8025d2e: 2b11 cmp r3, #17
8025d30: dc13 bgt.n 8025d5a <ip4_input+0x216>
8025d32: 2b01 cmp r3, #1
8025d34: d00c beq.n 8025d50 <ip4_input+0x20c>
8025d36: 2b06 cmp r3, #6
8025d38: d005 beq.n 8025d46 <ip4_input+0x202>
8025d3a: e00e b.n 8025d5a <ip4_input+0x216>
case IP_PROTO_UDP:
#if LWIP_UDPLITE
case IP_PROTO_UDPLITE:
#endif /* LWIP_UDPLITE */
MIB2_STATS_INC(mib2.ipindelivers);
udp_input(p, inp);
8025d3c: 6839 ldr r1, [r7, #0]
8025d3e: 6878 ldr r0, [r7, #4]
8025d40: f7fc f99c bl 802207c <udp_input>
break;
8025d44: e026 b.n 8025d94 <ip4_input+0x250>
#endif /* LWIP_UDP */
#if LWIP_TCP
case IP_PROTO_TCP:
MIB2_STATS_INC(mib2.ipindelivers);
tcp_input(p, inp);
8025d46: 6839 ldr r1, [r7, #0]
8025d48: 6878 ldr r0, [r7, #4]
8025d4a: f7f7 fcdd bl 801d708 <tcp_input>
break;
8025d4e: e021 b.n 8025d94 <ip4_input+0x250>
#endif /* LWIP_TCP */
#if LWIP_ICMP
case IP_PROTO_ICMP:
MIB2_STATS_INC(mib2.ipindelivers);
icmp_input(p, inp);
8025d50: 6839 ldr r1, [r7, #0]
8025d52: 6878 ldr r0, [r7, #4]
8025d54: f7ff fca4 bl 80256a0 <icmp_input>
break;
8025d58: e01c b.n 8025d94 <ip4_input+0x250>
} else
#endif /* LWIP_RAW */
{
#if LWIP_ICMP
/* send ICMP destination protocol unreachable unless is was a broadcast */
if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
8025d5a: 4b1a ldr r3, [pc, #104] @ (8025dc4 <ip4_input+0x280>)
8025d5c: 695b ldr r3, [r3, #20]
8025d5e: 69f9 ldr r1, [r7, #28]
8025d60: 4618 mov r0, r3
8025d62: f000 f90d bl 8025f80 <ip4_addr_isbroadcast_u32>
8025d66: 4603 mov r3, r0
8025d68: 2b00 cmp r3, #0
8025d6a: d10f bne.n 8025d8c <ip4_input+0x248>
!ip4_addr_ismulticast(ip4_current_dest_addr())) {
8025d6c: 4b15 ldr r3, [pc, #84] @ (8025dc4 <ip4_input+0x280>)
8025d6e: 695b ldr r3, [r3, #20]
8025d70: f003 03f0 and.w r3, r3, #240 @ 0xf0
if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
8025d74: 2be0 cmp r3, #224 @ 0xe0
8025d76: d009 beq.n 8025d8c <ip4_input+0x248>
pbuf_header_force(p, (s16_t)iphdr_hlen); /* Move to ip header, no check necessary. */
8025d78: f9b7 300e ldrsh.w r3, [r7, #14]
8025d7c: 4619 mov r1, r3
8025d7e: 6878 ldr r0, [r7, #4]
8025d80: f7f5 fb97 bl 801b4b2 <pbuf_header_force>
icmp_dest_unreach(p, ICMP_DUR_PROTO);
8025d84: 2102 movs r1, #2
8025d86: 6878 ldr r0, [r7, #4]
8025d88: f7ff fdae bl 80258e8 <icmp_dest_unreach>
IP_STATS_INC(ip.proterr);
IP_STATS_INC(ip.drop);
MIB2_STATS_INC(mib2.ipinunknownprotos);
}
pbuf_free(p);
8025d8c: 6878 ldr r0, [r7, #4]
8025d8e: f7f5 fbd5 bl 801b53c <pbuf_free>
break;
8025d92: bf00 nop
}
}
/* @todo: this is not really necessary... */
ip_data.current_netif = NULL;
8025d94: 4b0b ldr r3, [pc, #44] @ (8025dc4 <ip4_input+0x280>)
8025d96: 2200 movs r2, #0
8025d98: 601a str r2, [r3, #0]
ip_data.current_input_netif = NULL;
8025d9a: 4b0a ldr r3, [pc, #40] @ (8025dc4 <ip4_input+0x280>)
8025d9c: 2200 movs r2, #0
8025d9e: 605a str r2, [r3, #4]
ip_data.current_ip4_header = NULL;
8025da0: 4b08 ldr r3, [pc, #32] @ (8025dc4 <ip4_input+0x280>)
8025da2: 2200 movs r2, #0
8025da4: 609a str r2, [r3, #8]
ip_data.current_ip_header_tot_len = 0;
8025da6: 4b07 ldr r3, [pc, #28] @ (8025dc4 <ip4_input+0x280>)
8025da8: 2200 movs r2, #0
8025daa: 819a strh r2, [r3, #12]
ip4_addr_set_any(ip4_current_src_addr());
8025dac: 4b05 ldr r3, [pc, #20] @ (8025dc4 <ip4_input+0x280>)
8025dae: 2200 movs r2, #0
8025db0: 611a str r2, [r3, #16]
ip4_addr_set_any(ip4_current_dest_addr());
8025db2: 4b04 ldr r3, [pc, #16] @ (8025dc4 <ip4_input+0x280>)
8025db4: 2200 movs r2, #0
8025db6: 615a str r2, [r3, #20]
return ERR_OK;
8025db8: 2300 movs r3, #0
}
8025dba: 4618 mov r0, r3
8025dbc: 3720 adds r7, #32
8025dbe: 46bd mov sp, r7
8025dc0: bd80 pop {r7, pc}
8025dc2: bf00 nop
8025dc4: 24024458 .word 0x24024458
8025dc8: 2402af9c .word 0x2402af9c
08025dcc <ip4_output_if>:
*/
err_t
ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
u8_t ttl, u8_t tos,
u8_t proto, struct netif *netif)
{
8025dcc: b580 push {r7, lr}
8025dce: b08a sub sp, #40 @ 0x28
8025dd0: af04 add r7, sp, #16
8025dd2: 60f8 str r0, [r7, #12]
8025dd4: 60b9 str r1, [r7, #8]
8025dd6: 607a str r2, [r7, #4]
8025dd8: 70fb strb r3, [r7, #3]
ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
u16_t optlen)
{
#endif /* IP_OPTIONS_SEND */
const ip4_addr_t *src_used = src;
8025dda: 68bb ldr r3, [r7, #8]
8025ddc: 617b str r3, [r7, #20]
if (dest != LWIP_IP_HDRINCL) {
8025dde: 687b ldr r3, [r7, #4]
8025de0: 2b00 cmp r3, #0
8025de2: d009 beq.n 8025df8 <ip4_output_if+0x2c>
if (ip4_addr_isany(src)) {
8025de4: 68bb ldr r3, [r7, #8]
8025de6: 2b00 cmp r3, #0
8025de8: d003 beq.n 8025df2 <ip4_output_if+0x26>
8025dea: 68bb ldr r3, [r7, #8]
8025dec: 681b ldr r3, [r3, #0]
8025dee: 2b00 cmp r3, #0
8025df0: d102 bne.n 8025df8 <ip4_output_if+0x2c>
src_used = netif_ip4_addr(netif);
8025df2: 6abb ldr r3, [r7, #40] @ 0x28
8025df4: 3304 adds r3, #4
8025df6: 617b str r3, [r7, #20]
#if IP_OPTIONS_SEND
return ip4_output_if_opt_src(p, src_used, dest, ttl, tos, proto, netif,
ip_options, optlen);
#else /* IP_OPTIONS_SEND */
return ip4_output_if_src(p, src_used, dest, ttl, tos, proto, netif);
8025df8: 78fa ldrb r2, [r7, #3]
8025dfa: 6abb ldr r3, [r7, #40] @ 0x28
8025dfc: 9302 str r3, [sp, #8]
8025dfe: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
8025e02: 9301 str r3, [sp, #4]
8025e04: f897 3020 ldrb.w r3, [r7, #32]
8025e08: 9300 str r3, [sp, #0]
8025e0a: 4613 mov r3, r2
8025e0c: 687a ldr r2, [r7, #4]
8025e0e: 6979 ldr r1, [r7, #20]
8025e10: 68f8 ldr r0, [r7, #12]
8025e12: f000 f805 bl 8025e20 <ip4_output_if_src>
8025e16: 4603 mov r3, r0
#endif /* IP_OPTIONS_SEND */
}
8025e18: 4618 mov r0, r3
8025e1a: 3718 adds r7, #24
8025e1c: 46bd mov sp, r7
8025e1e: bd80 pop {r7, pc}
08025e20 <ip4_output_if_src>:
*/
err_t
ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
u8_t ttl, u8_t tos,
u8_t proto, struct netif *netif)
{
8025e20: b580 push {r7, lr}
8025e22: b088 sub sp, #32
8025e24: af00 add r7, sp, #0
8025e26: 60f8 str r0, [r7, #12]
8025e28: 60b9 str r1, [r7, #8]
8025e2a: 607a str r2, [r7, #4]
8025e2c: 70fb strb r3, [r7, #3]
ip4_addr_t dest_addr;
#if CHECKSUM_GEN_IP_INLINE
u32_t chk_sum = 0;
#endif /* CHECKSUM_GEN_IP_INLINE */
LWIP_ASSERT_CORE_LOCKED();
8025e2e: f7eb f9d1 bl 80111d4 <sys_check_core_locking>
LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p);
8025e32: 68fb ldr r3, [r7, #12]
8025e34: 7b9b ldrb r3, [r3, #14]
8025e36: 2b01 cmp r3, #1
8025e38: d006 beq.n 8025e48 <ip4_output_if_src+0x28>
8025e3a: 4b4b ldr r3, [pc, #300] @ (8025f68 <ip4_output_if_src+0x148>)
8025e3c: f44f 7255 mov.w r2, #852 @ 0x354
8025e40: 494a ldr r1, [pc, #296] @ (8025f6c <ip4_output_if_src+0x14c>)
8025e42: 484b ldr r0, [pc, #300] @ (8025f70 <ip4_output_if_src+0x150>)
8025e44: f004 fdf2 bl 802aa2c <iprintf>
MIB2_STATS_INC(mib2.ipoutrequests);
/* Should the IP header be generated or is it already included in p? */
if (dest != LWIP_IP_HDRINCL) {
8025e48: 687b ldr r3, [r7, #4]
8025e4a: 2b00 cmp r3, #0
8025e4c: d060 beq.n 8025f10 <ip4_output_if_src+0xf0>
u16_t ip_hlen = IP_HLEN;
8025e4e: 2314 movs r3, #20
8025e50: 837b strh r3, [r7, #26]
}
#endif /* CHECKSUM_GEN_IP_INLINE */
}
#endif /* IP_OPTIONS_SEND */
/* generate IP header */
if (pbuf_add_header(p, IP_HLEN)) {
8025e52: 2114 movs r1, #20
8025e54: 68f8 ldr r0, [r7, #12]
8025e56: f7f5 faa9 bl 801b3ac <pbuf_add_header>
8025e5a: 4603 mov r3, r0
8025e5c: 2b00 cmp r3, #0
8025e5e: d002 beq.n 8025e66 <ip4_output_if_src+0x46>
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: not enough room for IP header in pbuf\n"));
IP_STATS_INC(ip.err);
MIB2_STATS_INC(mib2.ipoutdiscards);
return ERR_BUF;
8025e60: f06f 0301 mvn.w r3, #1
8025e64: e07c b.n 8025f60 <ip4_output_if_src+0x140>
}
iphdr = (struct ip_hdr *)p->payload;
8025e66: 68fb ldr r3, [r7, #12]
8025e68: 685b ldr r3, [r3, #4]
8025e6a: 61fb str r3, [r7, #28]
LWIP_ASSERT("check that first pbuf can hold struct ip_hdr",
8025e6c: 68fb ldr r3, [r7, #12]
8025e6e: 895b ldrh r3, [r3, #10]
8025e70: 2b13 cmp r3, #19
8025e72: d806 bhi.n 8025e82 <ip4_output_if_src+0x62>
8025e74: 4b3c ldr r3, [pc, #240] @ (8025f68 <ip4_output_if_src+0x148>)
8025e76: f44f 7262 mov.w r2, #904 @ 0x388
8025e7a: 493e ldr r1, [pc, #248] @ (8025f74 <ip4_output_if_src+0x154>)
8025e7c: 483c ldr r0, [pc, #240] @ (8025f70 <ip4_output_if_src+0x150>)
8025e7e: f004 fdd5 bl 802aa2c <iprintf>
(p->len >= sizeof(struct ip_hdr)));
IPH_TTL_SET(iphdr, ttl);
8025e82: 69fb ldr r3, [r7, #28]
8025e84: 78fa ldrb r2, [r7, #3]
8025e86: 721a strb r2, [r3, #8]
IPH_PROTO_SET(iphdr, proto);
8025e88: 69fb ldr r3, [r7, #28]
8025e8a: f897 202c ldrb.w r2, [r7, #44] @ 0x2c
8025e8e: 725a strb r2, [r3, #9]
#if CHECKSUM_GEN_IP_INLINE
chk_sum += PP_NTOHS(proto | (ttl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */
/* dest cannot be NULL here */
ip4_addr_copy(iphdr->dest, *dest);
8025e90: 687b ldr r3, [r7, #4]
8025e92: 681a ldr r2, [r3, #0]
8025e94: 69fb ldr r3, [r7, #28]
8025e96: 611a str r2, [r3, #16]
#if CHECKSUM_GEN_IP_INLINE
chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF;
chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16;
#endif /* CHECKSUM_GEN_IP_INLINE */
IPH_VHL_SET(iphdr, 4, ip_hlen / 4);
8025e98: 8b7b ldrh r3, [r7, #26]
8025e9a: 089b lsrs r3, r3, #2
8025e9c: b29b uxth r3, r3
8025e9e: b2db uxtb r3, r3
8025ea0: f043 0340 orr.w r3, r3, #64 @ 0x40
8025ea4: b2da uxtb r2, r3
8025ea6: 69fb ldr r3, [r7, #28]
8025ea8: 701a strb r2, [r3, #0]
IPH_TOS_SET(iphdr, tos);
8025eaa: 69fb ldr r3, [r7, #28]
8025eac: f897 2028 ldrb.w r2, [r7, #40] @ 0x28
8025eb0: 705a strb r2, [r3, #1]
#if CHECKSUM_GEN_IP_INLINE
chk_sum += PP_NTOHS(tos | (iphdr->_v_hl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */
IPH_LEN_SET(iphdr, lwip_htons(p->tot_len));
8025eb2: 68fb ldr r3, [r7, #12]
8025eb4: 891b ldrh r3, [r3, #8]
8025eb6: 4618 mov r0, r3
8025eb8: f7f3 fe5e bl 8019b78 <lwip_htons>
8025ebc: 4603 mov r3, r0
8025ebe: 461a mov r2, r3
8025ec0: 69fb ldr r3, [r7, #28]
8025ec2: 805a strh r2, [r3, #2]
#if CHECKSUM_GEN_IP_INLINE
chk_sum += iphdr->_len;
#endif /* CHECKSUM_GEN_IP_INLINE */
IPH_OFFSET_SET(iphdr, 0);
8025ec4: 69fb ldr r3, [r7, #28]
8025ec6: 2200 movs r2, #0
8025ec8: 719a strb r2, [r3, #6]
8025eca: 2200 movs r2, #0
8025ecc: 71da strb r2, [r3, #7]
IPH_ID_SET(iphdr, lwip_htons(ip_id));
8025ece: 4b2a ldr r3, [pc, #168] @ (8025f78 <ip4_output_if_src+0x158>)
8025ed0: 881b ldrh r3, [r3, #0]
8025ed2: 4618 mov r0, r3
8025ed4: f7f3 fe50 bl 8019b78 <lwip_htons>
8025ed8: 4603 mov r3, r0
8025eda: 461a mov r2, r3
8025edc: 69fb ldr r3, [r7, #28]
8025ede: 809a strh r2, [r3, #4]
#if CHECKSUM_GEN_IP_INLINE
chk_sum += iphdr->_id;
#endif /* CHECKSUM_GEN_IP_INLINE */
++ip_id;
8025ee0: 4b25 ldr r3, [pc, #148] @ (8025f78 <ip4_output_if_src+0x158>)
8025ee2: 881b ldrh r3, [r3, #0]
8025ee4: 3301 adds r3, #1
8025ee6: b29a uxth r2, r3
8025ee8: 4b23 ldr r3, [pc, #140] @ (8025f78 <ip4_output_if_src+0x158>)
8025eea: 801a strh r2, [r3, #0]
if (src == NULL) {
8025eec: 68bb ldr r3, [r7, #8]
8025eee: 2b00 cmp r3, #0
8025ef0: d104 bne.n 8025efc <ip4_output_if_src+0xdc>
ip4_addr_copy(iphdr->src, *IP4_ADDR_ANY4);
8025ef2: 4b22 ldr r3, [pc, #136] @ (8025f7c <ip4_output_if_src+0x15c>)
8025ef4: 681a ldr r2, [r3, #0]
8025ef6: 69fb ldr r3, [r7, #28]
8025ef8: 60da str r2, [r3, #12]
8025efa: e003 b.n 8025f04 <ip4_output_if_src+0xe4>
} else {
/* src cannot be NULL here */
ip4_addr_copy(iphdr->src, *src);
8025efc: 68bb ldr r3, [r7, #8]
8025efe: 681a ldr r2, [r3, #0]
8025f00: 69fb ldr r3, [r7, #28]
8025f02: 60da str r2, [r3, #12]
else {
IPH_CHKSUM_SET(iphdr, 0);
}
#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/
#else /* CHECKSUM_GEN_IP_INLINE */
IPH_CHKSUM_SET(iphdr, 0);
8025f04: 69fb ldr r3, [r7, #28]
8025f06: 2200 movs r2, #0
8025f08: 729a strb r2, [r3, #10]
8025f0a: 2200 movs r2, #0
8025f0c: 72da strb r2, [r3, #11]
8025f0e: e00f b.n 8025f30 <ip4_output_if_src+0x110>
}
#endif /* CHECKSUM_GEN_IP */
#endif /* CHECKSUM_GEN_IP_INLINE */
} else {
/* IP header already included in p */
if (p->len < IP_HLEN) {
8025f10: 68fb ldr r3, [r7, #12]
8025f12: 895b ldrh r3, [r3, #10]
8025f14: 2b13 cmp r3, #19
8025f16: d802 bhi.n 8025f1e <ip4_output_if_src+0xfe>
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: LWIP_IP_HDRINCL but pbuf is too short\n"));
IP_STATS_INC(ip.err);
MIB2_STATS_INC(mib2.ipoutdiscards);
return ERR_BUF;
8025f18: f06f 0301 mvn.w r3, #1
8025f1c: e020 b.n 8025f60 <ip4_output_if_src+0x140>
}
iphdr = (struct ip_hdr *)p->payload;
8025f1e: 68fb ldr r3, [r7, #12]
8025f20: 685b ldr r3, [r3, #4]
8025f22: 61fb str r3, [r7, #28]
ip4_addr_copy(dest_addr, iphdr->dest);
8025f24: 69fb ldr r3, [r7, #28]
8025f26: 691b ldr r3, [r3, #16]
8025f28: 617b str r3, [r7, #20]
dest = &dest_addr;
8025f2a: f107 0314 add.w r3, r7, #20
8025f2e: 607b str r3, [r7, #4]
}
#endif /* LWIP_MULTICAST_TX_OPTIONS */
#endif /* ENABLE_LOOPBACK */
#if IP_FRAG
/* don't fragment if interface has mtu set to 0 [loopif] */
if (netif->mtu && (p->tot_len > netif->mtu)) {
8025f30: 6b3b ldr r3, [r7, #48] @ 0x30
8025f32: 8d1b ldrh r3, [r3, #40] @ 0x28
8025f34: 2b00 cmp r3, #0
8025f36: d00c beq.n 8025f52 <ip4_output_if_src+0x132>
8025f38: 68fb ldr r3, [r7, #12]
8025f3a: 891a ldrh r2, [r3, #8]
8025f3c: 6b3b ldr r3, [r7, #48] @ 0x30
8025f3e: 8d1b ldrh r3, [r3, #40] @ 0x28
8025f40: 429a cmp r2, r3
8025f42: d906 bls.n 8025f52 <ip4_output_if_src+0x132>
return ip4_frag(p, netif, dest);
8025f44: 687a ldr r2, [r7, #4]
8025f46: 6b39 ldr r1, [r7, #48] @ 0x30
8025f48: 68f8 ldr r0, [r7, #12]
8025f4a: f000 ff21 bl 8026d90 <ip4_frag>
8025f4e: 4603 mov r3, r0
8025f50: e006 b.n 8025f60 <ip4_output_if_src+0x140>
}
#endif /* IP_FRAG */
LWIP_DEBUGF(IP_DEBUG, ("ip4_output_if: call netif->output()\n"));
return netif->output(netif, p, dest);
8025f52: 6b3b ldr r3, [r7, #48] @ 0x30
8025f54: 695b ldr r3, [r3, #20]
8025f56: 687a ldr r2, [r7, #4]
8025f58: 68f9 ldr r1, [r7, #12]
8025f5a: 6b38 ldr r0, [r7, #48] @ 0x30
8025f5c: 4798 blx r3
8025f5e: 4603 mov r3, r0
}
8025f60: 4618 mov r0, r3
8025f62: 3720 adds r7, #32
8025f64: 46bd mov sp, r7
8025f66: bd80 pop {r7, pc}
8025f68: 080317ac .word 0x080317ac
8025f6c: 080317e0 .word 0x080317e0
8025f70: 080317ec .word 0x080317ec
8025f74: 08031814 .word 0x08031814
8025f78: 2402b132 .word 0x2402b132
8025f7c: 08031ec8 .word 0x08031ec8
08025f80 <ip4_addr_isbroadcast_u32>:
* @param netif the network interface against which the address is checked
* @return returns non-zero if the address is a broadcast address
*/
u8_t
ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif)
{
8025f80: b480 push {r7}
8025f82: b085 sub sp, #20
8025f84: af00 add r7, sp, #0
8025f86: 6078 str r0, [r7, #4]
8025f88: 6039 str r1, [r7, #0]
ip4_addr_t ipaddr;
ip4_addr_set_u32(&ipaddr, addr);
8025f8a: 687b ldr r3, [r7, #4]
8025f8c: 60fb str r3, [r7, #12]
/* all ones (broadcast) or all zeroes (old skool broadcast) */
if ((~addr == IPADDR_ANY) ||
8025f8e: 687b ldr r3, [r7, #4]
8025f90: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8025f94: d002 beq.n 8025f9c <ip4_addr_isbroadcast_u32+0x1c>
8025f96: 687b ldr r3, [r7, #4]
8025f98: 2b00 cmp r3, #0
8025f9a: d101 bne.n 8025fa0 <ip4_addr_isbroadcast_u32+0x20>
(addr == IPADDR_ANY)) {
return 1;
8025f9c: 2301 movs r3, #1
8025f9e: e02a b.n 8025ff6 <ip4_addr_isbroadcast_u32+0x76>
/* no broadcast support on this network interface? */
} else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) {
8025fa0: 683b ldr r3, [r7, #0]
8025fa2: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
8025fa6: f003 0302 and.w r3, r3, #2
8025faa: 2b00 cmp r3, #0
8025fac: d101 bne.n 8025fb2 <ip4_addr_isbroadcast_u32+0x32>
/* the given address cannot be a broadcast address
* nor can we check against any broadcast addresses */
return 0;
8025fae: 2300 movs r3, #0
8025fb0: e021 b.n 8025ff6 <ip4_addr_isbroadcast_u32+0x76>
/* address matches network interface address exactly? => no broadcast */
} else if (addr == ip4_addr_get_u32(netif_ip4_addr(netif))) {
8025fb2: 683b ldr r3, [r7, #0]
8025fb4: 3304 adds r3, #4
8025fb6: 681b ldr r3, [r3, #0]
8025fb8: 687a ldr r2, [r7, #4]
8025fba: 429a cmp r2, r3
8025fbc: d101 bne.n 8025fc2 <ip4_addr_isbroadcast_u32+0x42>
return 0;
8025fbe: 2300 movs r3, #0
8025fc0: e019 b.n 8025ff6 <ip4_addr_isbroadcast_u32+0x76>
/* on the same (sub) network... */
} else if (ip4_addr_netcmp(&ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif))
8025fc2: 68fa ldr r2, [r7, #12]
8025fc4: 683b ldr r3, [r7, #0]
8025fc6: 3304 adds r3, #4
8025fc8: 681b ldr r3, [r3, #0]
8025fca: 405a eors r2, r3
8025fcc: 683b ldr r3, [r7, #0]
8025fce: 3308 adds r3, #8
8025fd0: 681b ldr r3, [r3, #0]
8025fd2: 4013 ands r3, r2
8025fd4: 2b00 cmp r3, #0
8025fd6: d10d bne.n 8025ff4 <ip4_addr_isbroadcast_u32+0x74>
/* ...and host identifier bits are all ones? =>... */
&& ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
8025fd8: 683b ldr r3, [r7, #0]
8025fda: 3308 adds r3, #8
8025fdc: 681b ldr r3, [r3, #0]
8025fde: 43da mvns r2, r3
8025fe0: 687b ldr r3, [r7, #4]
8025fe2: 401a ands r2, r3
(IPADDR_BROADCAST & ~ip4_addr_get_u32(netif_ip4_netmask(netif))))) {
8025fe4: 683b ldr r3, [r7, #0]
8025fe6: 3308 adds r3, #8
8025fe8: 681b ldr r3, [r3, #0]
8025fea: 43db mvns r3, r3
&& ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
8025fec: 429a cmp r2, r3
8025fee: d101 bne.n 8025ff4 <ip4_addr_isbroadcast_u32+0x74>
/* => network broadcast address */
return 1;
8025ff0: 2301 movs r3, #1
8025ff2: e000 b.n 8025ff6 <ip4_addr_isbroadcast_u32+0x76>
} else {
return 0;
8025ff4: 2300 movs r3, #0
}
}
8025ff6: 4618 mov r0, r3
8025ff8: 3714 adds r7, #20
8025ffa: 46bd mov sp, r7
8025ffc: f85d 7b04 ldr.w r7, [sp], #4
8026000: 4770 bx lr
08026002 <ipaddr_addr>:
* @param cp IP address in ascii representation (e.g. "127.0.0.1")
* @return ip address in network order
*/
u32_t
ipaddr_addr(const char *cp)
{
8026002: b580 push {r7, lr}
8026004: b084 sub sp, #16
8026006: af00 add r7, sp, #0
8026008: 6078 str r0, [r7, #4]
ip4_addr_t val;
if (ip4addr_aton(cp, &val)) {
802600a: f107 030c add.w r3, r7, #12
802600e: 4619 mov r1, r3
8026010: 6878 ldr r0, [r7, #4]
8026012: f000 f80b bl 802602c <ip4addr_aton>
8026016: 4603 mov r3, r0
8026018: 2b00 cmp r3, #0
802601a: d001 beq.n 8026020 <ipaddr_addr+0x1e>
return ip4_addr_get_u32(&val);
802601c: 68fb ldr r3, [r7, #12]
802601e: e001 b.n 8026024 <ipaddr_addr+0x22>
}
return (IPADDR_NONE);
8026020: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
8026024: 4618 mov r0, r3
8026026: 3710 adds r7, #16
8026028: 46bd mov sp, r7
802602a: bd80 pop {r7, pc}
0802602c <ip4addr_aton>:
* @param addr pointer to which to save the ip address in network order
* @return 1 if cp could be converted to addr, 0 on failure
*/
int
ip4addr_aton(const char *cp, ip4_addr_t *addr)
{
802602c: b580 push {r7, lr}
802602e: b08a sub sp, #40 @ 0x28
8026030: af00 add r7, sp, #0
8026032: 6078 str r0, [r7, #4]
8026034: 6039 str r1, [r7, #0]
u32_t val;
u8_t base;
char c;
u32_t parts[4];
u32_t *pp = parts;
8026036: f107 030c add.w r3, r7, #12
802603a: 61fb str r3, [r7, #28]
c = *cp;
802603c: 687b ldr r3, [r7, #4]
802603e: 781b ldrb r3, [r3, #0]
8026040: f887 3022 strb.w r3, [r7, #34] @ 0x22
/*
* Collect number up to ``.''.
* Values are specified as for C:
* 0x=hex, 0=octal, 1-9=decimal.
*/
if (!lwip_isdigit(c)) {
8026044: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
8026048: 3301 adds r3, #1
802604a: 4a89 ldr r2, [pc, #548] @ (8026270 <ip4addr_aton+0x244>)
802604c: 4413 add r3, r2
802604e: 781b ldrb r3, [r3, #0]
8026050: f003 0304 and.w r3, r3, #4
8026054: 2b00 cmp r3, #0
8026056: d101 bne.n 802605c <ip4addr_aton+0x30>
return 0;
8026058: 2300 movs r3, #0
802605a: e105 b.n 8026268 <ip4addr_aton+0x23c>
}
val = 0;
802605c: 2300 movs r3, #0
802605e: 627b str r3, [r7, #36] @ 0x24
base = 10;
8026060: 230a movs r3, #10
8026062: f887 3023 strb.w r3, [r7, #35] @ 0x23
if (c == '0') {
8026066: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
802606a: 2b30 cmp r3, #48 @ 0x30
802606c: d11c bne.n 80260a8 <ip4addr_aton+0x7c>
c = *++cp;
802606e: 687b ldr r3, [r7, #4]
8026070: 3301 adds r3, #1
8026072: 607b str r3, [r7, #4]
8026074: 687b ldr r3, [r7, #4]
8026076: 781b ldrb r3, [r3, #0]
8026078: f887 3022 strb.w r3, [r7, #34] @ 0x22
if (c == 'x' || c == 'X') {
802607c: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
8026080: 2b78 cmp r3, #120 @ 0x78
8026082: d003 beq.n 802608c <ip4addr_aton+0x60>
8026084: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
8026088: 2b58 cmp r3, #88 @ 0x58
802608a: d10a bne.n 80260a2 <ip4addr_aton+0x76>
base = 16;
802608c: 2310 movs r3, #16
802608e: f887 3023 strb.w r3, [r7, #35] @ 0x23
c = *++cp;
8026092: 687b ldr r3, [r7, #4]
8026094: 3301 adds r3, #1
8026096: 607b str r3, [r7, #4]
8026098: 687b ldr r3, [r7, #4]
802609a: 781b ldrb r3, [r3, #0]
802609c: f887 3022 strb.w r3, [r7, #34] @ 0x22
80260a0: e002 b.n 80260a8 <ip4addr_aton+0x7c>
} else {
base = 8;
80260a2: 2308 movs r3, #8
80260a4: f887 3023 strb.w r3, [r7, #35] @ 0x23
}
}
for (;;) {
if (lwip_isdigit(c)) {
80260a8: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
80260ac: 3301 adds r3, #1
80260ae: 4a70 ldr r2, [pc, #448] @ (8026270 <ip4addr_aton+0x244>)
80260b0: 4413 add r3, r2
80260b2: 781b ldrb r3, [r3, #0]
80260b4: f003 0304 and.w r3, r3, #4
80260b8: 2b00 cmp r3, #0
80260ba: d011 beq.n 80260e0 <ip4addr_aton+0xb4>
val = (val * base) + (u32_t)(c - '0');
80260bc: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
80260c0: 6a7a ldr r2, [r7, #36] @ 0x24
80260c2: fb03 f202 mul.w r2, r3, r2
80260c6: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
80260ca: 4413 add r3, r2
80260cc: 3b30 subs r3, #48 @ 0x30
80260ce: 627b str r3, [r7, #36] @ 0x24
c = *++cp;
80260d0: 687b ldr r3, [r7, #4]
80260d2: 3301 adds r3, #1
80260d4: 607b str r3, [r7, #4]
80260d6: 687b ldr r3, [r7, #4]
80260d8: 781b ldrb r3, [r3, #0]
80260da: f887 3022 strb.w r3, [r7, #34] @ 0x22
80260de: e7e3 b.n 80260a8 <ip4addr_aton+0x7c>
} else if (base == 16 && lwip_isxdigit(c)) {
80260e0: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
80260e4: 2b10 cmp r3, #16
80260e6: d127 bne.n 8026138 <ip4addr_aton+0x10c>
80260e8: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
80260ec: 3301 adds r3, #1
80260ee: 4a60 ldr r2, [pc, #384] @ (8026270 <ip4addr_aton+0x244>)
80260f0: 4413 add r3, r2
80260f2: 781b ldrb r3, [r3, #0]
80260f4: f003 0344 and.w r3, r3, #68 @ 0x44
80260f8: 2b00 cmp r3, #0
80260fa: d01d beq.n 8026138 <ip4addr_aton+0x10c>
val = (val << 4) | (u32_t)(c + 10 - (lwip_islower(c) ? 'a' : 'A'));
80260fc: 6a7b ldr r3, [r7, #36] @ 0x24
80260fe: 011b lsls r3, r3, #4
8026100: f897 2022 ldrb.w r2, [r7, #34] @ 0x22
8026104: f102 010a add.w r1, r2, #10
8026108: f897 2022 ldrb.w r2, [r7, #34] @ 0x22
802610c: 3201 adds r2, #1
802610e: 4858 ldr r0, [pc, #352] @ (8026270 <ip4addr_aton+0x244>)
8026110: 4402 add r2, r0
8026112: 7812 ldrb r2, [r2, #0]
8026114: f002 0203 and.w r2, r2, #3
8026118: 2a02 cmp r2, #2
802611a: d101 bne.n 8026120 <ip4addr_aton+0xf4>
802611c: 2261 movs r2, #97 @ 0x61
802611e: e000 b.n 8026122 <ip4addr_aton+0xf6>
8026120: 2241 movs r2, #65 @ 0x41
8026122: 1a8a subs r2, r1, r2
8026124: 4313 orrs r3, r2
8026126: 627b str r3, [r7, #36] @ 0x24
c = *++cp;
8026128: 687b ldr r3, [r7, #4]
802612a: 3301 adds r3, #1
802612c: 607b str r3, [r7, #4]
802612e: 687b ldr r3, [r7, #4]
8026130: 781b ldrb r3, [r3, #0]
8026132: f887 3022 strb.w r3, [r7, #34] @ 0x22
if (lwip_isdigit(c)) {
8026136: e7b7 b.n 80260a8 <ip4addr_aton+0x7c>
} else {
break;
}
}
if (c == '.') {
8026138: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
802613c: 2b2e cmp r3, #46 @ 0x2e
802613e: d114 bne.n 802616a <ip4addr_aton+0x13e>
* Internet format:
* a.b.c.d
* a.b.c (with c treated as 16 bits)
* a.b (with b treated as 24 bits)
*/
if (pp >= parts + 3) {
8026140: f107 030c add.w r3, r7, #12
8026144: 330c adds r3, #12
8026146: 69fa ldr r2, [r7, #28]
8026148: 429a cmp r2, r3
802614a: d301 bcc.n 8026150 <ip4addr_aton+0x124>
return 0;
802614c: 2300 movs r3, #0
802614e: e08b b.n 8026268 <ip4addr_aton+0x23c>
}
*pp++ = val;
8026150: 69fb ldr r3, [r7, #28]
8026152: 1d1a adds r2, r3, #4
8026154: 61fa str r2, [r7, #28]
8026156: 6a7a ldr r2, [r7, #36] @ 0x24
8026158: 601a str r2, [r3, #0]
c = *++cp;
802615a: 687b ldr r3, [r7, #4]
802615c: 3301 adds r3, #1
802615e: 607b str r3, [r7, #4]
8026160: 687b ldr r3, [r7, #4]
8026162: 781b ldrb r3, [r3, #0]
8026164: f887 3022 strb.w r3, [r7, #34] @ 0x22
if (!lwip_isdigit(c)) {
8026168: e76c b.n 8026044 <ip4addr_aton+0x18>
} else {
break;
802616a: bf00 nop
}
}
/*
* Check for trailing characters.
*/
if (c != '\0' && !lwip_isspace(c)) {
802616c: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
8026170: 2b00 cmp r3, #0
8026172: d00b beq.n 802618c <ip4addr_aton+0x160>
8026174: f897 3022 ldrb.w r3, [r7, #34] @ 0x22
8026178: 3301 adds r3, #1
802617a: 4a3d ldr r2, [pc, #244] @ (8026270 <ip4addr_aton+0x244>)
802617c: 4413 add r3, r2
802617e: 781b ldrb r3, [r3, #0]
8026180: f003 0308 and.w r3, r3, #8
8026184: 2b00 cmp r3, #0
8026186: d101 bne.n 802618c <ip4addr_aton+0x160>
return 0;
8026188: 2300 movs r3, #0
802618a: e06d b.n 8026268 <ip4addr_aton+0x23c>
}
/*
* Concoct the address according to
* the number of parts specified.
*/
switch (pp - parts + 1) {
802618c: f107 030c add.w r3, r7, #12
8026190: 69fa ldr r2, [r7, #28]
8026192: 1ad3 subs r3, r2, r3
8026194: 109b asrs r3, r3, #2
8026196: 3301 adds r3, #1
8026198: 2b04 cmp r3, #4
802619a: d853 bhi.n 8026244 <ip4addr_aton+0x218>
802619c: a201 add r2, pc, #4 @ (adr r2, 80261a4 <ip4addr_aton+0x178>)
802619e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80261a2: bf00 nop
80261a4: 080261b9 .word 0x080261b9
80261a8: 08026253 .word 0x08026253
80261ac: 080261bd .word 0x080261bd
80261b0: 080261df .word 0x080261df
80261b4: 0802620d .word 0x0802620d
case 0:
return 0; /* initial nondigit */
80261b8: 2300 movs r3, #0
80261ba: e055 b.n 8026268 <ip4addr_aton+0x23c>
case 1: /* a -- 32 bits */
break;
case 2: /* a.b -- 8.24 bits */
if (val > 0xffffffUL) {
80261bc: 6a7b ldr r3, [r7, #36] @ 0x24
80261be: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
80261c2: d301 bcc.n 80261c8 <ip4addr_aton+0x19c>
return 0;
80261c4: 2300 movs r3, #0
80261c6: e04f b.n 8026268 <ip4addr_aton+0x23c>
}
if (parts[0] > 0xff) {
80261c8: 68fb ldr r3, [r7, #12]
80261ca: 2bff cmp r3, #255 @ 0xff
80261cc: d901 bls.n 80261d2 <ip4addr_aton+0x1a6>
return 0;
80261ce: 2300 movs r3, #0
80261d0: e04a b.n 8026268 <ip4addr_aton+0x23c>
}
val |= parts[0] << 24;
80261d2: 68fb ldr r3, [r7, #12]
80261d4: 061b lsls r3, r3, #24
80261d6: 6a7a ldr r2, [r7, #36] @ 0x24
80261d8: 4313 orrs r3, r2
80261da: 627b str r3, [r7, #36] @ 0x24
break;
80261dc: e03a b.n 8026254 <ip4addr_aton+0x228>
case 3: /* a.b.c -- 8.8.16 bits */
if (val > 0xffff) {
80261de: 6a7b ldr r3, [r7, #36] @ 0x24
80261e0: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80261e4: d301 bcc.n 80261ea <ip4addr_aton+0x1be>
return 0;
80261e6: 2300 movs r3, #0
80261e8: e03e b.n 8026268 <ip4addr_aton+0x23c>
}
if ((parts[0] > 0xff) || (parts[1] > 0xff)) {
80261ea: 68fb ldr r3, [r7, #12]
80261ec: 2bff cmp r3, #255 @ 0xff
80261ee: d802 bhi.n 80261f6 <ip4addr_aton+0x1ca>
80261f0: 693b ldr r3, [r7, #16]
80261f2: 2bff cmp r3, #255 @ 0xff
80261f4: d901 bls.n 80261fa <ip4addr_aton+0x1ce>
return 0;
80261f6: 2300 movs r3, #0
80261f8: e036 b.n 8026268 <ip4addr_aton+0x23c>
}
val |= (parts[0] << 24) | (parts[1] << 16);
80261fa: 68fb ldr r3, [r7, #12]
80261fc: 061a lsls r2, r3, #24
80261fe: 693b ldr r3, [r7, #16]
8026200: 041b lsls r3, r3, #16
8026202: 4313 orrs r3, r2
8026204: 6a7a ldr r2, [r7, #36] @ 0x24
8026206: 4313 orrs r3, r2
8026208: 627b str r3, [r7, #36] @ 0x24
break;
802620a: e023 b.n 8026254 <ip4addr_aton+0x228>
case 4: /* a.b.c.d -- 8.8.8.8 bits */
if (val > 0xff) {
802620c: 6a7b ldr r3, [r7, #36] @ 0x24
802620e: 2bff cmp r3, #255 @ 0xff
8026210: d901 bls.n 8026216 <ip4addr_aton+0x1ea>
return 0;
8026212: 2300 movs r3, #0
8026214: e028 b.n 8026268 <ip4addr_aton+0x23c>
}
if ((parts[0] > 0xff) || (parts[1] > 0xff) || (parts[2] > 0xff)) {
8026216: 68fb ldr r3, [r7, #12]
8026218: 2bff cmp r3, #255 @ 0xff
802621a: d805 bhi.n 8026228 <ip4addr_aton+0x1fc>
802621c: 693b ldr r3, [r7, #16]
802621e: 2bff cmp r3, #255 @ 0xff
8026220: d802 bhi.n 8026228 <ip4addr_aton+0x1fc>
8026222: 697b ldr r3, [r7, #20]
8026224: 2bff cmp r3, #255 @ 0xff
8026226: d901 bls.n 802622c <ip4addr_aton+0x200>
return 0;
8026228: 2300 movs r3, #0
802622a: e01d b.n 8026268 <ip4addr_aton+0x23c>
}
val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
802622c: 68fb ldr r3, [r7, #12]
802622e: 061a lsls r2, r3, #24
8026230: 693b ldr r3, [r7, #16]
8026232: 041b lsls r3, r3, #16
8026234: 431a orrs r2, r3
8026236: 697b ldr r3, [r7, #20]
8026238: 021b lsls r3, r3, #8
802623a: 4313 orrs r3, r2
802623c: 6a7a ldr r2, [r7, #36] @ 0x24
802623e: 4313 orrs r3, r2
8026240: 627b str r3, [r7, #36] @ 0x24
break;
8026242: e007 b.n 8026254 <ip4addr_aton+0x228>
default:
LWIP_ASSERT("unhandled", 0);
8026244: 4b0b ldr r3, [pc, #44] @ (8026274 <ip4addr_aton+0x248>)
8026246: 22f9 movs r2, #249 @ 0xf9
8026248: 490b ldr r1, [pc, #44] @ (8026278 <ip4addr_aton+0x24c>)
802624a: 480c ldr r0, [pc, #48] @ (802627c <ip4addr_aton+0x250>)
802624c: f004 fbee bl 802aa2c <iprintf>
break;
8026250: e000 b.n 8026254 <ip4addr_aton+0x228>
break;
8026252: bf00 nop
}
if (addr) {
8026254: 683b ldr r3, [r7, #0]
8026256: 2b00 cmp r3, #0
8026258: d005 beq.n 8026266 <ip4addr_aton+0x23a>
ip4_addr_set_u32(addr, lwip_htonl(val));
802625a: 6a78 ldr r0, [r7, #36] @ 0x24
802625c: f7f3 fca1 bl 8019ba2 <lwip_htonl>
8026260: 4602 mov r2, r0
8026262: 683b ldr r3, [r7, #0]
8026264: 601a str r2, [r3, #0]
}
return 1;
8026266: 2301 movs r3, #1
}
8026268: 4618 mov r0, r3
802626a: 3728 adds r7, #40 @ 0x28
802626c: 46bd mov sp, r7
802626e: bd80 pop {r7, pc}
8026270: 08031fa0 .word 0x08031fa0
8026274: 08031844 .word 0x08031844
8026278: 08031880 .word 0x08031880
802627c: 0803188c .word 0x0803188c
08026280 <ip4addr_ntoa>:
* @return pointer to a global static (!) buffer that holds the ASCII
* representation of addr
*/
char *
ip4addr_ntoa(const ip4_addr_t *addr)
{
8026280: b580 push {r7, lr}
8026282: b082 sub sp, #8
8026284: af00 add r7, sp, #0
8026286: 6078 str r0, [r7, #4]
static char str[IP4ADDR_STRLEN_MAX];
return ip4addr_ntoa_r(addr, str, IP4ADDR_STRLEN_MAX);
8026288: 2210 movs r2, #16
802628a: 4904 ldr r1, [pc, #16] @ (802629c <ip4addr_ntoa+0x1c>)
802628c: 6878 ldr r0, [r7, #4]
802628e: f000 f807 bl 80262a0 <ip4addr_ntoa_r>
8026292: 4603 mov r3, r0
}
8026294: 4618 mov r0, r3
8026296: 3708 adds r7, #8
8026298: 46bd mov sp, r7
802629a: bd80 pop {r7, pc}
802629c: 2402b134 .word 0x2402b134
080262a0 <ip4addr_ntoa_r>:
* @return either pointer to buf which now holds the ASCII
* representation of addr or NULL if buf was too small
*/
char *
ip4addr_ntoa_r(const ip4_addr_t *addr, char *buf, int buflen)
{
80262a0: b480 push {r7}
80262a2: b08d sub sp, #52 @ 0x34
80262a4: af00 add r7, sp, #0
80262a6: 60f8 str r0, [r7, #12]
80262a8: 60b9 str r1, [r7, #8]
80262aa: 607a str r2, [r7, #4]
char *rp;
u8_t *ap;
u8_t rem;
u8_t n;
u8_t i;
int len = 0;
80262ac: 2300 movs r3, #0
80262ae: 623b str r3, [r7, #32]
s_addr = ip4_addr_get_u32(addr);
80262b0: 68fb ldr r3, [r7, #12]
80262b2: 681b ldr r3, [r3, #0]
80262b4: 61bb str r3, [r7, #24]
rp = buf;
80262b6: 68bb ldr r3, [r7, #8]
80262b8: 62fb str r3, [r7, #44] @ 0x2c
ap = (u8_t *)&s_addr;
80262ba: f107 0318 add.w r3, r7, #24
80262be: 62bb str r3, [r7, #40] @ 0x28
for (n = 0; n < 4; n++) {
80262c0: 2300 movs r3, #0
80262c2: f887 3027 strb.w r3, [r7, #39] @ 0x27
80262c6: e058 b.n 802637a <ip4addr_ntoa_r+0xda>
i = 0;
80262c8: 2300 movs r3, #0
80262ca: f887 3026 strb.w r3, [r7, #38] @ 0x26
do {
rem = *ap % (u8_t)10;
80262ce: 6abb ldr r3, [r7, #40] @ 0x28
80262d0: 781a ldrb r2, [r3, #0]
80262d2: 4b32 ldr r3, [pc, #200] @ (802639c <ip4addr_ntoa_r+0xfc>)
80262d4: fba3 1302 umull r1, r3, r3, r2
80262d8: 08d9 lsrs r1, r3, #3
80262da: 460b mov r3, r1
80262dc: 009b lsls r3, r3, #2
80262de: 440b add r3, r1
80262e0: 005b lsls r3, r3, #1
80262e2: 1ad3 subs r3, r2, r3
80262e4: 77fb strb r3, [r7, #31]
*ap /= (u8_t)10;
80262e6: 6abb ldr r3, [r7, #40] @ 0x28
80262e8: 781b ldrb r3, [r3, #0]
80262ea: 4a2c ldr r2, [pc, #176] @ (802639c <ip4addr_ntoa_r+0xfc>)
80262ec: fba2 2303 umull r2, r3, r2, r3
80262f0: 08db lsrs r3, r3, #3
80262f2: b2da uxtb r2, r3
80262f4: 6abb ldr r3, [r7, #40] @ 0x28
80262f6: 701a strb r2, [r3, #0]
inv[i++] = (char)('0' + rem);
80262f8: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
80262fc: 1c5a adds r2, r3, #1
80262fe: f887 2026 strb.w r2, [r7, #38] @ 0x26
8026302: 4619 mov r1, r3
8026304: 7ffb ldrb r3, [r7, #31]
8026306: 3330 adds r3, #48 @ 0x30
8026308: b2da uxtb r2, r3
802630a: f101 0330 add.w r3, r1, #48 @ 0x30
802630e: 443b add r3, r7
8026310: f803 2c1c strb.w r2, [r3, #-28]
} while (*ap);
8026314: 6abb ldr r3, [r7, #40] @ 0x28
8026316: 781b ldrb r3, [r3, #0]
8026318: 2b00 cmp r3, #0
802631a: d1d8 bne.n 80262ce <ip4addr_ntoa_r+0x2e>
while (i--) {
802631c: e011 b.n 8026342 <ip4addr_ntoa_r+0xa2>
if (len++ >= buflen) {
802631e: 6a3b ldr r3, [r7, #32]
8026320: 1c5a adds r2, r3, #1
8026322: 623a str r2, [r7, #32]
8026324: 687a ldr r2, [r7, #4]
8026326: 429a cmp r2, r3
8026328: dc01 bgt.n 802632e <ip4addr_ntoa_r+0x8e>
return NULL;
802632a: 2300 movs r3, #0
802632c: e030 b.n 8026390 <ip4addr_ntoa_r+0xf0>
}
*rp++ = inv[i];
802632e: f897 2026 ldrb.w r2, [r7, #38] @ 0x26
8026332: 6afb ldr r3, [r7, #44] @ 0x2c
8026334: 1c59 adds r1, r3, #1
8026336: 62f9 str r1, [r7, #44] @ 0x2c
8026338: 3230 adds r2, #48 @ 0x30
802633a: 443a add r2, r7
802633c: f812 2c1c ldrb.w r2, [r2, #-28]
8026340: 701a strb r2, [r3, #0]
while (i--) {
8026342: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
8026346: 1e5a subs r2, r3, #1
8026348: f887 2026 strb.w r2, [r7, #38] @ 0x26
802634c: 2b00 cmp r3, #0
802634e: d1e6 bne.n 802631e <ip4addr_ntoa_r+0x7e>
}
if (len++ >= buflen) {
8026350: 6a3b ldr r3, [r7, #32]
8026352: 1c5a adds r2, r3, #1
8026354: 623a str r2, [r7, #32]
8026356: 687a ldr r2, [r7, #4]
8026358: 429a cmp r2, r3
802635a: dc01 bgt.n 8026360 <ip4addr_ntoa_r+0xc0>
return NULL;
802635c: 2300 movs r3, #0
802635e: e017 b.n 8026390 <ip4addr_ntoa_r+0xf0>
}
*rp++ = '.';
8026360: 6afb ldr r3, [r7, #44] @ 0x2c
8026362: 1c5a adds r2, r3, #1
8026364: 62fa str r2, [r7, #44] @ 0x2c
8026366: 222e movs r2, #46 @ 0x2e
8026368: 701a strb r2, [r3, #0]
ap++;
802636a: 6abb ldr r3, [r7, #40] @ 0x28
802636c: 3301 adds r3, #1
802636e: 62bb str r3, [r7, #40] @ 0x28
for (n = 0; n < 4; n++) {
8026370: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
8026374: 3301 adds r3, #1
8026376: f887 3027 strb.w r3, [r7, #39] @ 0x27
802637a: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
802637e: 2b03 cmp r3, #3
8026380: d9a2 bls.n 80262c8 <ip4addr_ntoa_r+0x28>
}
*--rp = 0;
8026382: 6afb ldr r3, [r7, #44] @ 0x2c
8026384: 3b01 subs r3, #1
8026386: 62fb str r3, [r7, #44] @ 0x2c
8026388: 6afb ldr r3, [r7, #44] @ 0x2c
802638a: 2200 movs r2, #0
802638c: 701a strb r2, [r3, #0]
return buf;
802638e: 68bb ldr r3, [r7, #8]
}
8026390: 4618 mov r0, r3
8026392: 3734 adds r7, #52 @ 0x34
8026394: 46bd mov sp, r7
8026396: f85d 7b04 ldr.w r7, [sp], #4
802639a: 4770 bx lr
802639c: cccccccd .word 0xcccccccd
080263a0 <ip_reass_tmr>:
*
* Should be called every 1000 msec (defined by IP_TMR_INTERVAL).
*/
void
ip_reass_tmr(void)
{
80263a0: b580 push {r7, lr}
80263a2: b084 sub sp, #16
80263a4: af00 add r7, sp, #0
struct ip_reassdata *r, *prev = NULL;
80263a6: 2300 movs r3, #0
80263a8: 60bb str r3, [r7, #8]
r = reassdatagrams;
80263aa: 4b12 ldr r3, [pc, #72] @ (80263f4 <ip_reass_tmr+0x54>)
80263ac: 681b ldr r3, [r3, #0]
80263ae: 60fb str r3, [r7, #12]
while (r != NULL) {
80263b0: e018 b.n 80263e4 <ip_reass_tmr+0x44>
/* Decrement the timer. Once it reaches 0,
* clean up the incomplete fragment assembly */
if (r->timer > 0) {
80263b2: 68fb ldr r3, [r7, #12]
80263b4: 7fdb ldrb r3, [r3, #31]
80263b6: 2b00 cmp r3, #0
80263b8: d00b beq.n 80263d2 <ip_reass_tmr+0x32>
r->timer--;
80263ba: 68fb ldr r3, [r7, #12]
80263bc: 7fdb ldrb r3, [r3, #31]
80263be: 3b01 subs r3, #1
80263c0: b2da uxtb r2, r3
80263c2: 68fb ldr r3, [r7, #12]
80263c4: 77da strb r2, [r3, #31]
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n", (u16_t)r->timer));
prev = r;
80263c6: 68fb ldr r3, [r7, #12]
80263c8: 60bb str r3, [r7, #8]
r = r->next;
80263ca: 68fb ldr r3, [r7, #12]
80263cc: 681b ldr r3, [r3, #0]
80263ce: 60fb str r3, [r7, #12]
80263d0: e008 b.n 80263e4 <ip_reass_tmr+0x44>
} else {
/* reassembly timed out */
struct ip_reassdata *tmp;
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n"));
tmp = r;
80263d2: 68fb ldr r3, [r7, #12]
80263d4: 607b str r3, [r7, #4]
/* get the next pointer before freeing */
r = r->next;
80263d6: 68fb ldr r3, [r7, #12]
80263d8: 681b ldr r3, [r3, #0]
80263da: 60fb str r3, [r7, #12]
/* free the helper struct and all enqueued pbufs */
ip_reass_free_complete_datagram(tmp, prev);
80263dc: 68b9 ldr r1, [r7, #8]
80263de: 6878 ldr r0, [r7, #4]
80263e0: f000 f80a bl 80263f8 <ip_reass_free_complete_datagram>
while (r != NULL) {
80263e4: 68fb ldr r3, [r7, #12]
80263e6: 2b00 cmp r3, #0
80263e8: d1e3 bne.n 80263b2 <ip_reass_tmr+0x12>
}
}
}
80263ea: bf00 nop
80263ec: bf00 nop
80263ee: 3710 adds r7, #16
80263f0: 46bd mov sp, r7
80263f2: bd80 pop {r7, pc}
80263f4: 2402b144 .word 0x2402b144
080263f8 <ip_reass_free_complete_datagram>:
* @param prev the previous datagram in the linked list
* @return the number of pbufs freed
*/
static int
ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
80263f8: b580 push {r7, lr}
80263fa: b088 sub sp, #32
80263fc: af00 add r7, sp, #0
80263fe: 6078 str r0, [r7, #4]
8026400: 6039 str r1, [r7, #0]
u16_t pbufs_freed = 0;
8026402: 2300 movs r3, #0
8026404: 83fb strh r3, [r7, #30]
u16_t clen;
struct pbuf *p;
struct ip_reass_helper *iprh;
LWIP_ASSERT("prev != ipr", prev != ipr);
8026406: 683a ldr r2, [r7, #0]
8026408: 687b ldr r3, [r7, #4]
802640a: 429a cmp r2, r3
802640c: d105 bne.n 802641a <ip_reass_free_complete_datagram+0x22>
802640e: 4b45 ldr r3, [pc, #276] @ (8026524 <ip_reass_free_complete_datagram+0x12c>)
8026410: 22ab movs r2, #171 @ 0xab
8026412: 4945 ldr r1, [pc, #276] @ (8026528 <ip_reass_free_complete_datagram+0x130>)
8026414: 4845 ldr r0, [pc, #276] @ (802652c <ip_reass_free_complete_datagram+0x134>)
8026416: f004 fb09 bl 802aa2c <iprintf>
if (prev != NULL) {
802641a: 683b ldr r3, [r7, #0]
802641c: 2b00 cmp r3, #0
802641e: d00a beq.n 8026436 <ip_reass_free_complete_datagram+0x3e>
LWIP_ASSERT("prev->next == ipr", prev->next == ipr);
8026420: 683b ldr r3, [r7, #0]
8026422: 681b ldr r3, [r3, #0]
8026424: 687a ldr r2, [r7, #4]
8026426: 429a cmp r2, r3
8026428: d005 beq.n 8026436 <ip_reass_free_complete_datagram+0x3e>
802642a: 4b3e ldr r3, [pc, #248] @ (8026524 <ip_reass_free_complete_datagram+0x12c>)
802642c: 22ad movs r2, #173 @ 0xad
802642e: 4940 ldr r1, [pc, #256] @ (8026530 <ip_reass_free_complete_datagram+0x138>)
8026430: 483e ldr r0, [pc, #248] @ (802652c <ip_reass_free_complete_datagram+0x134>)
8026432: f004 fafb bl 802aa2c <iprintf>
}
MIB2_STATS_INC(mib2.ipreasmfails);
#if LWIP_ICMP
iprh = (struct ip_reass_helper *)ipr->p->payload;
8026436: 687b ldr r3, [r7, #4]
8026438: 685b ldr r3, [r3, #4]
802643a: 685b ldr r3, [r3, #4]
802643c: 617b str r3, [r7, #20]
if (iprh->start == 0) {
802643e: 697b ldr r3, [r7, #20]
8026440: 889b ldrh r3, [r3, #4]
8026442: b29b uxth r3, r3
8026444: 2b00 cmp r3, #0
8026446: d12a bne.n 802649e <ip_reass_free_complete_datagram+0xa6>
/* The first fragment was received, send ICMP time exceeded. */
/* First, de-queue the first pbuf from r->p. */
p = ipr->p;
8026448: 687b ldr r3, [r7, #4]
802644a: 685b ldr r3, [r3, #4]
802644c: 61bb str r3, [r7, #24]
ipr->p = iprh->next_pbuf;
802644e: 697b ldr r3, [r7, #20]
8026450: 681a ldr r2, [r3, #0]
8026452: 687b ldr r3, [r7, #4]
8026454: 605a str r2, [r3, #4]
/* Then, copy the original header into it. */
SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN);
8026456: 69bb ldr r3, [r7, #24]
8026458: 6858 ldr r0, [r3, #4]
802645a: 687b ldr r3, [r7, #4]
802645c: 3308 adds r3, #8
802645e: 2214 movs r2, #20
8026460: 4619 mov r1, r3
8026462: f004 fd6c bl 802af3e <memcpy>
icmp_time_exceeded(p, ICMP_TE_FRAG);
8026466: 2101 movs r1, #1
8026468: 69b8 ldr r0, [r7, #24]
802646a: f7ff fa4d bl 8025908 <icmp_time_exceeded>
clen = pbuf_clen(p);
802646e: 69b8 ldr r0, [r7, #24]
8026470: f7f5 f8f2 bl 801b658 <pbuf_clen>
8026474: 4603 mov r3, r0
8026476: 827b strh r3, [r7, #18]
LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
8026478: 8bfa ldrh r2, [r7, #30]
802647a: 8a7b ldrh r3, [r7, #18]
802647c: 4413 add r3, r2
802647e: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8026482: db05 blt.n 8026490 <ip_reass_free_complete_datagram+0x98>
8026484: 4b27 ldr r3, [pc, #156] @ (8026524 <ip_reass_free_complete_datagram+0x12c>)
8026486: 22bc movs r2, #188 @ 0xbc
8026488: 492a ldr r1, [pc, #168] @ (8026534 <ip_reass_free_complete_datagram+0x13c>)
802648a: 4828 ldr r0, [pc, #160] @ (802652c <ip_reass_free_complete_datagram+0x134>)
802648c: f004 face bl 802aa2c <iprintf>
pbufs_freed = (u16_t)(pbufs_freed + clen);
8026490: 8bfa ldrh r2, [r7, #30]
8026492: 8a7b ldrh r3, [r7, #18]
8026494: 4413 add r3, r2
8026496: 83fb strh r3, [r7, #30]
pbuf_free(p);
8026498: 69b8 ldr r0, [r7, #24]
802649a: f7f5 f84f bl 801b53c <pbuf_free>
}
#endif /* LWIP_ICMP */
/* First, free all received pbufs. The individual pbufs need to be released
separately as they have not yet been chained */
p = ipr->p;
802649e: 687b ldr r3, [r7, #4]
80264a0: 685b ldr r3, [r3, #4]
80264a2: 61bb str r3, [r7, #24]
while (p != NULL) {
80264a4: e01f b.n 80264e6 <ip_reass_free_complete_datagram+0xee>
struct pbuf *pcur;
iprh = (struct ip_reass_helper *)p->payload;
80264a6: 69bb ldr r3, [r7, #24]
80264a8: 685b ldr r3, [r3, #4]
80264aa: 617b str r3, [r7, #20]
pcur = p;
80264ac: 69bb ldr r3, [r7, #24]
80264ae: 60fb str r3, [r7, #12]
/* get the next pointer before freeing */
p = iprh->next_pbuf;
80264b0: 697b ldr r3, [r7, #20]
80264b2: 681b ldr r3, [r3, #0]
80264b4: 61bb str r3, [r7, #24]
clen = pbuf_clen(pcur);
80264b6: 68f8 ldr r0, [r7, #12]
80264b8: f7f5 f8ce bl 801b658 <pbuf_clen>
80264bc: 4603 mov r3, r0
80264be: 827b strh r3, [r7, #18]
LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
80264c0: 8bfa ldrh r2, [r7, #30]
80264c2: 8a7b ldrh r3, [r7, #18]
80264c4: 4413 add r3, r2
80264c6: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80264ca: db05 blt.n 80264d8 <ip_reass_free_complete_datagram+0xe0>
80264cc: 4b15 ldr r3, [pc, #84] @ (8026524 <ip_reass_free_complete_datagram+0x12c>)
80264ce: 22cc movs r2, #204 @ 0xcc
80264d0: 4918 ldr r1, [pc, #96] @ (8026534 <ip_reass_free_complete_datagram+0x13c>)
80264d2: 4816 ldr r0, [pc, #88] @ (802652c <ip_reass_free_complete_datagram+0x134>)
80264d4: f004 faaa bl 802aa2c <iprintf>
pbufs_freed = (u16_t)(pbufs_freed + clen);
80264d8: 8bfa ldrh r2, [r7, #30]
80264da: 8a7b ldrh r3, [r7, #18]
80264dc: 4413 add r3, r2
80264de: 83fb strh r3, [r7, #30]
pbuf_free(pcur);
80264e0: 68f8 ldr r0, [r7, #12]
80264e2: f7f5 f82b bl 801b53c <pbuf_free>
while (p != NULL) {
80264e6: 69bb ldr r3, [r7, #24]
80264e8: 2b00 cmp r3, #0
80264ea: d1dc bne.n 80264a6 <ip_reass_free_complete_datagram+0xae>
}
/* Then, unchain the struct ip_reassdata from the list and free it. */
ip_reass_dequeue_datagram(ipr, prev);
80264ec: 6839 ldr r1, [r7, #0]
80264ee: 6878 ldr r0, [r7, #4]
80264f0: f000 f8c2 bl 8026678 <ip_reass_dequeue_datagram>
LWIP_ASSERT("ip_reass_pbufcount >= pbufs_freed", ip_reass_pbufcount >= pbufs_freed);
80264f4: 4b10 ldr r3, [pc, #64] @ (8026538 <ip_reass_free_complete_datagram+0x140>)
80264f6: 881b ldrh r3, [r3, #0]
80264f8: 8bfa ldrh r2, [r7, #30]
80264fa: 429a cmp r2, r3
80264fc: d905 bls.n 802650a <ip_reass_free_complete_datagram+0x112>
80264fe: 4b09 ldr r3, [pc, #36] @ (8026524 <ip_reass_free_complete_datagram+0x12c>)
8026500: 22d2 movs r2, #210 @ 0xd2
8026502: 490e ldr r1, [pc, #56] @ (802653c <ip_reass_free_complete_datagram+0x144>)
8026504: 4809 ldr r0, [pc, #36] @ (802652c <ip_reass_free_complete_datagram+0x134>)
8026506: f004 fa91 bl 802aa2c <iprintf>
ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - pbufs_freed);
802650a: 4b0b ldr r3, [pc, #44] @ (8026538 <ip_reass_free_complete_datagram+0x140>)
802650c: 881a ldrh r2, [r3, #0]
802650e: 8bfb ldrh r3, [r7, #30]
8026510: 1ad3 subs r3, r2, r3
8026512: b29a uxth r2, r3
8026514: 4b08 ldr r3, [pc, #32] @ (8026538 <ip_reass_free_complete_datagram+0x140>)
8026516: 801a strh r2, [r3, #0]
return pbufs_freed;
8026518: 8bfb ldrh r3, [r7, #30]
}
802651a: 4618 mov r0, r3
802651c: 3720 adds r7, #32
802651e: 46bd mov sp, r7
8026520: bd80 pop {r7, pc}
8026522: bf00 nop
8026524: 080318b4 .word 0x080318b4
8026528: 080318f0 .word 0x080318f0
802652c: 080318fc .word 0x080318fc
8026530: 08031924 .word 0x08031924
8026534: 08031938 .word 0x08031938
8026538: 2402b148 .word 0x2402b148
802653c: 08031958 .word 0x08031958
08026540 <ip_reass_remove_oldest_datagram>:
* (used for freeing other datagrams if not enough space)
* @return the number of pbufs freed
*/
static int
ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed)
{
8026540: b580 push {r7, lr}
8026542: b08a sub sp, #40 @ 0x28
8026544: af00 add r7, sp, #0
8026546: 6078 str r0, [r7, #4]
8026548: 6039 str r1, [r7, #0]
/* @todo Can't we simply remove the last datagram in the
* linked list behind reassdatagrams?
*/
struct ip_reassdata *r, *oldest, *prev, *oldest_prev;
int pbufs_freed = 0, pbufs_freed_current;
802654a: 2300 movs r3, #0
802654c: 617b str r3, [r7, #20]
int other_datagrams;
/* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs,
* but don't free the datagram that 'fraghdr' belongs to! */
do {
oldest = NULL;
802654e: 2300 movs r3, #0
8026550: 623b str r3, [r7, #32]
prev = NULL;
8026552: 2300 movs r3, #0
8026554: 61fb str r3, [r7, #28]
oldest_prev = NULL;
8026556: 2300 movs r3, #0
8026558: 61bb str r3, [r7, #24]
other_datagrams = 0;
802655a: 2300 movs r3, #0
802655c: 613b str r3, [r7, #16]
r = reassdatagrams;
802655e: 4b28 ldr r3, [pc, #160] @ (8026600 <ip_reass_remove_oldest_datagram+0xc0>)
8026560: 681b ldr r3, [r3, #0]
8026562: 627b str r3, [r7, #36] @ 0x24
while (r != NULL) {
8026564: e030 b.n 80265c8 <ip_reass_remove_oldest_datagram+0x88>
if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) {
8026566: 6a7b ldr r3, [r7, #36] @ 0x24
8026568: 695a ldr r2, [r3, #20]
802656a: 687b ldr r3, [r7, #4]
802656c: 68db ldr r3, [r3, #12]
802656e: 429a cmp r2, r3
8026570: d10c bne.n 802658c <ip_reass_remove_oldest_datagram+0x4c>
8026572: 6a7b ldr r3, [r7, #36] @ 0x24
8026574: 699a ldr r2, [r3, #24]
8026576: 687b ldr r3, [r7, #4]
8026578: 691b ldr r3, [r3, #16]
802657a: 429a cmp r2, r3
802657c: d106 bne.n 802658c <ip_reass_remove_oldest_datagram+0x4c>
802657e: 6a7b ldr r3, [r7, #36] @ 0x24
8026580: 899a ldrh r2, [r3, #12]
8026582: 687b ldr r3, [r7, #4]
8026584: 889b ldrh r3, [r3, #4]
8026586: b29b uxth r3, r3
8026588: 429a cmp r2, r3
802658a: d014 beq.n 80265b6 <ip_reass_remove_oldest_datagram+0x76>
/* Not the same datagram as fraghdr */
other_datagrams++;
802658c: 693b ldr r3, [r7, #16]
802658e: 3301 adds r3, #1
8026590: 613b str r3, [r7, #16]
if (oldest == NULL) {
8026592: 6a3b ldr r3, [r7, #32]
8026594: 2b00 cmp r3, #0
8026596: d104 bne.n 80265a2 <ip_reass_remove_oldest_datagram+0x62>
oldest = r;
8026598: 6a7b ldr r3, [r7, #36] @ 0x24
802659a: 623b str r3, [r7, #32]
oldest_prev = prev;
802659c: 69fb ldr r3, [r7, #28]
802659e: 61bb str r3, [r7, #24]
80265a0: e009 b.n 80265b6 <ip_reass_remove_oldest_datagram+0x76>
} else if (r->timer <= oldest->timer) {
80265a2: 6a7b ldr r3, [r7, #36] @ 0x24
80265a4: 7fda ldrb r2, [r3, #31]
80265a6: 6a3b ldr r3, [r7, #32]
80265a8: 7fdb ldrb r3, [r3, #31]
80265aa: 429a cmp r2, r3
80265ac: d803 bhi.n 80265b6 <ip_reass_remove_oldest_datagram+0x76>
/* older than the previous oldest */
oldest = r;
80265ae: 6a7b ldr r3, [r7, #36] @ 0x24
80265b0: 623b str r3, [r7, #32]
oldest_prev = prev;
80265b2: 69fb ldr r3, [r7, #28]
80265b4: 61bb str r3, [r7, #24]
}
}
if (r->next != NULL) {
80265b6: 6a7b ldr r3, [r7, #36] @ 0x24
80265b8: 681b ldr r3, [r3, #0]
80265ba: 2b00 cmp r3, #0
80265bc: d001 beq.n 80265c2 <ip_reass_remove_oldest_datagram+0x82>
prev = r;
80265be: 6a7b ldr r3, [r7, #36] @ 0x24
80265c0: 61fb str r3, [r7, #28]
}
r = r->next;
80265c2: 6a7b ldr r3, [r7, #36] @ 0x24
80265c4: 681b ldr r3, [r3, #0]
80265c6: 627b str r3, [r7, #36] @ 0x24
while (r != NULL) {
80265c8: 6a7b ldr r3, [r7, #36] @ 0x24
80265ca: 2b00 cmp r3, #0
80265cc: d1cb bne.n 8026566 <ip_reass_remove_oldest_datagram+0x26>
}
if (oldest != NULL) {
80265ce: 6a3b ldr r3, [r7, #32]
80265d0: 2b00 cmp r3, #0
80265d2: d008 beq.n 80265e6 <ip_reass_remove_oldest_datagram+0xa6>
pbufs_freed_current = ip_reass_free_complete_datagram(oldest, oldest_prev);
80265d4: 69b9 ldr r1, [r7, #24]
80265d6: 6a38 ldr r0, [r7, #32]
80265d8: f7ff ff0e bl 80263f8 <ip_reass_free_complete_datagram>
80265dc: 60f8 str r0, [r7, #12]
pbufs_freed += pbufs_freed_current;
80265de: 697a ldr r2, [r7, #20]
80265e0: 68fb ldr r3, [r7, #12]
80265e2: 4413 add r3, r2
80265e4: 617b str r3, [r7, #20]
}
} while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1));
80265e6: 697a ldr r2, [r7, #20]
80265e8: 683b ldr r3, [r7, #0]
80265ea: 429a cmp r2, r3
80265ec: da02 bge.n 80265f4 <ip_reass_remove_oldest_datagram+0xb4>
80265ee: 693b ldr r3, [r7, #16]
80265f0: 2b01 cmp r3, #1
80265f2: dcac bgt.n 802654e <ip_reass_remove_oldest_datagram+0xe>
return pbufs_freed;
80265f4: 697b ldr r3, [r7, #20]
}
80265f6: 4618 mov r0, r3
80265f8: 3728 adds r7, #40 @ 0x28
80265fa: 46bd mov sp, r7
80265fc: bd80 pop {r7, pc}
80265fe: bf00 nop
8026600: 2402b144 .word 0x2402b144
08026604 <ip_reass_enqueue_new_datagram>:
* @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space)
* @return A pointer to the queue location into which the fragment was enqueued
*/
static struct ip_reassdata *
ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen)
{
8026604: b580 push {r7, lr}
8026606: b084 sub sp, #16
8026608: af00 add r7, sp, #0
802660a: 6078 str r0, [r7, #4]
802660c: 6039 str r1, [r7, #0]
#if ! IP_REASS_FREE_OLDEST
LWIP_UNUSED_ARG(clen);
#endif
/* No matching previous fragment found, allocate a new reassdata struct */
ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
802660e: 2004 movs r0, #4
8026610: f7f4 f830 bl 801a674 <memp_malloc>
8026614: 60f8 str r0, [r7, #12]
if (ipr == NULL) {
8026616: 68fb ldr r3, [r7, #12]
8026618: 2b00 cmp r3, #0
802661a: d110 bne.n 802663e <ip_reass_enqueue_new_datagram+0x3a>
#if IP_REASS_FREE_OLDEST
if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) {
802661c: 6839 ldr r1, [r7, #0]
802661e: 6878 ldr r0, [r7, #4]
8026620: f7ff ff8e bl 8026540 <ip_reass_remove_oldest_datagram>
8026624: 4602 mov r2, r0
8026626: 683b ldr r3, [r7, #0]
8026628: 4293 cmp r3, r2
802662a: dc03 bgt.n 8026634 <ip_reass_enqueue_new_datagram+0x30>
ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
802662c: 2004 movs r0, #4
802662e: f7f4 f821 bl 801a674 <memp_malloc>
8026632: 60f8 str r0, [r7, #12]
}
if (ipr == NULL)
8026634: 68fb ldr r3, [r7, #12]
8026636: 2b00 cmp r3, #0
8026638: d101 bne.n 802663e <ip_reass_enqueue_new_datagram+0x3a>
#endif /* IP_REASS_FREE_OLDEST */
{
IPFRAG_STATS_INC(ip_frag.memerr);
LWIP_DEBUGF(IP_REASS_DEBUG, ("Failed to alloc reassdata struct\n"));
return NULL;
802663a: 2300 movs r3, #0
802663c: e016 b.n 802666c <ip_reass_enqueue_new_datagram+0x68>
}
}
memset(ipr, 0, sizeof(struct ip_reassdata));
802663e: 2220 movs r2, #32
8026640: 2100 movs r1, #0
8026642: 68f8 ldr r0, [r7, #12]
8026644: f004 fb84 bl 802ad50 <memset>
ipr->timer = IP_REASS_MAXAGE;
8026648: 68fb ldr r3, [r7, #12]
802664a: 220f movs r2, #15
802664c: 77da strb r2, [r3, #31]
/* enqueue the new structure to the front of the list */
ipr->next = reassdatagrams;
802664e: 4b09 ldr r3, [pc, #36] @ (8026674 <ip_reass_enqueue_new_datagram+0x70>)
8026650: 681a ldr r2, [r3, #0]
8026652: 68fb ldr r3, [r7, #12]
8026654: 601a str r2, [r3, #0]
reassdatagrams = ipr;
8026656: 4a07 ldr r2, [pc, #28] @ (8026674 <ip_reass_enqueue_new_datagram+0x70>)
8026658: 68fb ldr r3, [r7, #12]
802665a: 6013 str r3, [r2, #0]
/* copy the ip header for later tests and input */
/* @todo: no ip options supported? */
SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN);
802665c: 68fb ldr r3, [r7, #12]
802665e: 3308 adds r3, #8
8026660: 2214 movs r2, #20
8026662: 6879 ldr r1, [r7, #4]
8026664: 4618 mov r0, r3
8026666: f004 fc6a bl 802af3e <memcpy>
return ipr;
802666a: 68fb ldr r3, [r7, #12]
}
802666c: 4618 mov r0, r3
802666e: 3710 adds r7, #16
8026670: 46bd mov sp, r7
8026672: bd80 pop {r7, pc}
8026674: 2402b144 .word 0x2402b144
08026678 <ip_reass_dequeue_datagram>:
* Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs.
* @param ipr points to the queue entry to dequeue
*/
static void
ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
8026678: b580 push {r7, lr}
802667a: b082 sub sp, #8
802667c: af00 add r7, sp, #0
802667e: 6078 str r0, [r7, #4]
8026680: 6039 str r1, [r7, #0]
/* dequeue the reass struct */
if (reassdatagrams == ipr) {
8026682: 4b10 ldr r3, [pc, #64] @ (80266c4 <ip_reass_dequeue_datagram+0x4c>)
8026684: 681b ldr r3, [r3, #0]
8026686: 687a ldr r2, [r7, #4]
8026688: 429a cmp r2, r3
802668a: d104 bne.n 8026696 <ip_reass_dequeue_datagram+0x1e>
/* it was the first in the list */
reassdatagrams = ipr->next;
802668c: 687b ldr r3, [r7, #4]
802668e: 681b ldr r3, [r3, #0]
8026690: 4a0c ldr r2, [pc, #48] @ (80266c4 <ip_reass_dequeue_datagram+0x4c>)
8026692: 6013 str r3, [r2, #0]
8026694: e00d b.n 80266b2 <ip_reass_dequeue_datagram+0x3a>
} else {
/* it wasn't the first, so it must have a valid 'prev' */
LWIP_ASSERT("sanity check linked list", prev != NULL);
8026696: 683b ldr r3, [r7, #0]
8026698: 2b00 cmp r3, #0
802669a: d106 bne.n 80266aa <ip_reass_dequeue_datagram+0x32>
802669c: 4b0a ldr r3, [pc, #40] @ (80266c8 <ip_reass_dequeue_datagram+0x50>)
802669e: f240 1245 movw r2, #325 @ 0x145
80266a2: 490a ldr r1, [pc, #40] @ (80266cc <ip_reass_dequeue_datagram+0x54>)
80266a4: 480a ldr r0, [pc, #40] @ (80266d0 <ip_reass_dequeue_datagram+0x58>)
80266a6: f004 f9c1 bl 802aa2c <iprintf>
prev->next = ipr->next;
80266aa: 687b ldr r3, [r7, #4]
80266ac: 681a ldr r2, [r3, #0]
80266ae: 683b ldr r3, [r7, #0]
80266b0: 601a str r2, [r3, #0]
}
/* now we can free the ip_reassdata struct */
memp_free(MEMP_REASSDATA, ipr);
80266b2: 6879 ldr r1, [r7, #4]
80266b4: 2004 movs r0, #4
80266b6: f7f4 f853 bl 801a760 <memp_free>
}
80266ba: bf00 nop
80266bc: 3708 adds r7, #8
80266be: 46bd mov sp, r7
80266c0: bd80 pop {r7, pc}
80266c2: bf00 nop
80266c4: 2402b144 .word 0x2402b144
80266c8: 080318b4 .word 0x080318b4
80266cc: 0803197c .word 0x0803197c
80266d0: 080318fc .word 0x080318fc
080266d4 <ip_reass_chain_frag_into_datagram_and_validate>:
* @param is_last is 1 if this pbuf has MF==0 (ipr->flags not updated yet)
* @return see IP_REASS_VALIDATE_* defines
*/
static int
ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p, int is_last)
{
80266d4: b580 push {r7, lr}
80266d6: b08c sub sp, #48 @ 0x30
80266d8: af00 add r7, sp, #0
80266da: 60f8 str r0, [r7, #12]
80266dc: 60b9 str r1, [r7, #8]
80266de: 607a str r2, [r7, #4]
struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev = NULL;
80266e0: 2300 movs r3, #0
80266e2: 62bb str r3, [r7, #40] @ 0x28
struct pbuf *q;
u16_t offset, len;
u8_t hlen;
struct ip_hdr *fraghdr;
int valid = 1;
80266e4: 2301 movs r3, #1
80266e6: 623b str r3, [r7, #32]
/* Extract length and fragment offset from current fragment */
fraghdr = (struct ip_hdr *)new_p->payload;
80266e8: 68bb ldr r3, [r7, #8]
80266ea: 685b ldr r3, [r3, #4]
80266ec: 61fb str r3, [r7, #28]
len = lwip_ntohs(IPH_LEN(fraghdr));
80266ee: 69fb ldr r3, [r7, #28]
80266f0: 885b ldrh r3, [r3, #2]
80266f2: b29b uxth r3, r3
80266f4: 4618 mov r0, r3
80266f6: f7f3 fa3f bl 8019b78 <lwip_htons>
80266fa: 4603 mov r3, r0
80266fc: 837b strh r3, [r7, #26]
hlen = IPH_HL_BYTES(fraghdr);
80266fe: 69fb ldr r3, [r7, #28]
8026700: 781b ldrb r3, [r3, #0]
8026702: f003 030f and.w r3, r3, #15
8026706: b2db uxtb r3, r3
8026708: 009b lsls r3, r3, #2
802670a: 767b strb r3, [r7, #25]
if (hlen > len) {
802670c: 7e7b ldrb r3, [r7, #25]
802670e: b29b uxth r3, r3
8026710: 8b7a ldrh r2, [r7, #26]
8026712: 429a cmp r2, r3
8026714: d202 bcs.n 802671c <ip_reass_chain_frag_into_datagram_and_validate+0x48>
/* invalid datagram */
return IP_REASS_VALIDATE_PBUF_DROPPED;
8026716: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802671a: e135 b.n 8026988 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
}
len = (u16_t)(len - hlen);
802671c: 7e7b ldrb r3, [r7, #25]
802671e: b29b uxth r3, r3
8026720: 8b7a ldrh r2, [r7, #26]
8026722: 1ad3 subs r3, r2, r3
8026724: 837b strh r3, [r7, #26]
offset = IPH_OFFSET_BYTES(fraghdr);
8026726: 69fb ldr r3, [r7, #28]
8026728: 88db ldrh r3, [r3, #6]
802672a: b29b uxth r3, r3
802672c: 4618 mov r0, r3
802672e: f7f3 fa23 bl 8019b78 <lwip_htons>
8026732: 4603 mov r3, r0
8026734: f3c3 030c ubfx r3, r3, #0, #13
8026738: b29b uxth r3, r3
802673a: 00db lsls r3, r3, #3
802673c: 82fb strh r3, [r7, #22]
/* overwrite the fragment's ip header from the pbuf with our helper struct,
* and setup the embedded helper structure. */
/* make sure the struct ip_reass_helper fits into the IP header */
LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN",
sizeof(struct ip_reass_helper) <= IP_HLEN);
iprh = (struct ip_reass_helper *)new_p->payload;
802673e: 68bb ldr r3, [r7, #8]
8026740: 685b ldr r3, [r3, #4]
8026742: 62fb str r3, [r7, #44] @ 0x2c
iprh->next_pbuf = NULL;
8026744: 6afb ldr r3, [r7, #44] @ 0x2c
8026746: 2200 movs r2, #0
8026748: 701a strb r2, [r3, #0]
802674a: 2200 movs r2, #0
802674c: 705a strb r2, [r3, #1]
802674e: 2200 movs r2, #0
8026750: 709a strb r2, [r3, #2]
8026752: 2200 movs r2, #0
8026754: 70da strb r2, [r3, #3]
iprh->start = offset;
8026756: 6afb ldr r3, [r7, #44] @ 0x2c
8026758: 8afa ldrh r2, [r7, #22]
802675a: 809a strh r2, [r3, #4]
iprh->end = (u16_t)(offset + len);
802675c: 8afa ldrh r2, [r7, #22]
802675e: 8b7b ldrh r3, [r7, #26]
8026760: 4413 add r3, r2
8026762: b29a uxth r2, r3
8026764: 6afb ldr r3, [r7, #44] @ 0x2c
8026766: 80da strh r2, [r3, #6]
if (iprh->end < offset) {
8026768: 6afb ldr r3, [r7, #44] @ 0x2c
802676a: 88db ldrh r3, [r3, #6]
802676c: b29b uxth r3, r3
802676e: 8afa ldrh r2, [r7, #22]
8026770: 429a cmp r2, r3
8026772: d902 bls.n 802677a <ip_reass_chain_frag_into_datagram_and_validate+0xa6>
/* u16_t overflow, cannot handle this */
return IP_REASS_VALIDATE_PBUF_DROPPED;
8026774: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8026778: e106 b.n 8026988 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
}
/* Iterate through until we either get to the end of the list (append),
* or we find one with a larger offset (insert). */
for (q = ipr->p; q != NULL;) {
802677a: 68fb ldr r3, [r7, #12]
802677c: 685b ldr r3, [r3, #4]
802677e: 627b str r3, [r7, #36] @ 0x24
8026780: e068 b.n 8026854 <ip_reass_chain_frag_into_datagram_and_validate+0x180>
iprh_tmp = (struct ip_reass_helper *)q->payload;
8026782: 6a7b ldr r3, [r7, #36] @ 0x24
8026784: 685b ldr r3, [r3, #4]
8026786: 613b str r3, [r7, #16]
if (iprh->start < iprh_tmp->start) {
8026788: 6afb ldr r3, [r7, #44] @ 0x2c
802678a: 889b ldrh r3, [r3, #4]
802678c: b29a uxth r2, r3
802678e: 693b ldr r3, [r7, #16]
8026790: 889b ldrh r3, [r3, #4]
8026792: b29b uxth r3, r3
8026794: 429a cmp r2, r3
8026796: d235 bcs.n 8026804 <ip_reass_chain_frag_into_datagram_and_validate+0x130>
/* the new pbuf should be inserted before this */
iprh->next_pbuf = q;
8026798: 6afb ldr r3, [r7, #44] @ 0x2c
802679a: 6a7a ldr r2, [r7, #36] @ 0x24
802679c: 601a str r2, [r3, #0]
if (iprh_prev != NULL) {
802679e: 6abb ldr r3, [r7, #40] @ 0x28
80267a0: 2b00 cmp r3, #0
80267a2: d020 beq.n 80267e6 <ip_reass_chain_frag_into_datagram_and_validate+0x112>
/* not the fragment with the lowest offset */
#if IP_REASS_CHECK_OVERLAP
if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) {
80267a4: 6afb ldr r3, [r7, #44] @ 0x2c
80267a6: 889b ldrh r3, [r3, #4]
80267a8: b29a uxth r2, r3
80267aa: 6abb ldr r3, [r7, #40] @ 0x28
80267ac: 88db ldrh r3, [r3, #6]
80267ae: b29b uxth r3, r3
80267b0: 429a cmp r2, r3
80267b2: d307 bcc.n 80267c4 <ip_reass_chain_frag_into_datagram_and_validate+0xf0>
80267b4: 6afb ldr r3, [r7, #44] @ 0x2c
80267b6: 88db ldrh r3, [r3, #6]
80267b8: b29a uxth r2, r3
80267ba: 693b ldr r3, [r7, #16]
80267bc: 889b ldrh r3, [r3, #4]
80267be: b29b uxth r3, r3
80267c0: 429a cmp r2, r3
80267c2: d902 bls.n 80267ca <ip_reass_chain_frag_into_datagram_and_validate+0xf6>
/* fragment overlaps with previous or following, throw away */
return IP_REASS_VALIDATE_PBUF_DROPPED;
80267c4: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80267c8: e0de b.n 8026988 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
}
#endif /* IP_REASS_CHECK_OVERLAP */
iprh_prev->next_pbuf = new_p;
80267ca: 6abb ldr r3, [r7, #40] @ 0x28
80267cc: 68ba ldr r2, [r7, #8]
80267ce: 601a str r2, [r3, #0]
if (iprh_prev->end != iprh->start) {
80267d0: 6abb ldr r3, [r7, #40] @ 0x28
80267d2: 88db ldrh r3, [r3, #6]
80267d4: b29a uxth r2, r3
80267d6: 6afb ldr r3, [r7, #44] @ 0x2c
80267d8: 889b ldrh r3, [r3, #4]
80267da: b29b uxth r3, r3
80267dc: 429a cmp r2, r3
80267de: d03d beq.n 802685c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
/* There is a fragment missing between the current
* and the previous fragment */
valid = 0;
80267e0: 2300 movs r3, #0
80267e2: 623b str r3, [r7, #32]
}
#endif /* IP_REASS_CHECK_OVERLAP */
/* fragment with the lowest offset */
ipr->p = new_p;
}
break;
80267e4: e03a b.n 802685c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
if (iprh->end > iprh_tmp->start) {
80267e6: 6afb ldr r3, [r7, #44] @ 0x2c
80267e8: 88db ldrh r3, [r3, #6]
80267ea: b29a uxth r2, r3
80267ec: 693b ldr r3, [r7, #16]
80267ee: 889b ldrh r3, [r3, #4]
80267f0: b29b uxth r3, r3
80267f2: 429a cmp r2, r3
80267f4: d902 bls.n 80267fc <ip_reass_chain_frag_into_datagram_and_validate+0x128>
return IP_REASS_VALIDATE_PBUF_DROPPED;
80267f6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80267fa: e0c5 b.n 8026988 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
ipr->p = new_p;
80267fc: 68fb ldr r3, [r7, #12]
80267fe: 68ba ldr r2, [r7, #8]
8026800: 605a str r2, [r3, #4]
break;
8026802: e02b b.n 802685c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
} else if (iprh->start == iprh_tmp->start) {
8026804: 6afb ldr r3, [r7, #44] @ 0x2c
8026806: 889b ldrh r3, [r3, #4]
8026808: b29a uxth r2, r3
802680a: 693b ldr r3, [r7, #16]
802680c: 889b ldrh r3, [r3, #4]
802680e: b29b uxth r3, r3
8026810: 429a cmp r2, r3
8026812: d102 bne.n 802681a <ip_reass_chain_frag_into_datagram_and_validate+0x146>
/* received the same datagram twice: no need to keep the datagram */
return IP_REASS_VALIDATE_PBUF_DROPPED;
8026814: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8026818: e0b6 b.n 8026988 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#if IP_REASS_CHECK_OVERLAP
} else if (iprh->start < iprh_tmp->end) {
802681a: 6afb ldr r3, [r7, #44] @ 0x2c
802681c: 889b ldrh r3, [r3, #4]
802681e: b29a uxth r2, r3
8026820: 693b ldr r3, [r7, #16]
8026822: 88db ldrh r3, [r3, #6]
8026824: b29b uxth r3, r3
8026826: 429a cmp r2, r3
8026828: d202 bcs.n 8026830 <ip_reass_chain_frag_into_datagram_and_validate+0x15c>
/* overlap: no need to keep the new datagram */
return IP_REASS_VALIDATE_PBUF_DROPPED;
802682a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802682e: e0ab b.n 8026988 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#endif /* IP_REASS_CHECK_OVERLAP */
} else {
/* Check if the fragments received so far have no holes. */
if (iprh_prev != NULL) {
8026830: 6abb ldr r3, [r7, #40] @ 0x28
8026832: 2b00 cmp r3, #0
8026834: d009 beq.n 802684a <ip_reass_chain_frag_into_datagram_and_validate+0x176>
if (iprh_prev->end != iprh_tmp->start) {
8026836: 6abb ldr r3, [r7, #40] @ 0x28
8026838: 88db ldrh r3, [r3, #6]
802683a: b29a uxth r2, r3
802683c: 693b ldr r3, [r7, #16]
802683e: 889b ldrh r3, [r3, #4]
8026840: b29b uxth r3, r3
8026842: 429a cmp r2, r3
8026844: d001 beq.n 802684a <ip_reass_chain_frag_into_datagram_and_validate+0x176>
/* There is a fragment missing between the current
* and the previous fragment */
valid = 0;
8026846: 2300 movs r3, #0
8026848: 623b str r3, [r7, #32]
}
}
}
q = iprh_tmp->next_pbuf;
802684a: 693b ldr r3, [r7, #16]
802684c: 681b ldr r3, [r3, #0]
802684e: 627b str r3, [r7, #36] @ 0x24
iprh_prev = iprh_tmp;
8026850: 693b ldr r3, [r7, #16]
8026852: 62bb str r3, [r7, #40] @ 0x28
for (q = ipr->p; q != NULL;) {
8026854: 6a7b ldr r3, [r7, #36] @ 0x24
8026856: 2b00 cmp r3, #0
8026858: d193 bne.n 8026782 <ip_reass_chain_frag_into_datagram_and_validate+0xae>
802685a: e000 b.n 802685e <ip_reass_chain_frag_into_datagram_and_validate+0x18a>
break;
802685c: bf00 nop
}
/* If q is NULL, then we made it to the end of the list. Determine what to do now */
if (q == NULL) {
802685e: 6a7b ldr r3, [r7, #36] @ 0x24
8026860: 2b00 cmp r3, #0
8026862: d12d bne.n 80268c0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
if (iprh_prev != NULL) {
8026864: 6abb ldr r3, [r7, #40] @ 0x28
8026866: 2b00 cmp r3, #0
8026868: d01c beq.n 80268a4 <ip_reass_chain_frag_into_datagram_and_validate+0x1d0>
/* this is (for now), the fragment with the highest offset:
* chain it to the last fragment */
#if IP_REASS_CHECK_OVERLAP
LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start);
802686a: 6abb ldr r3, [r7, #40] @ 0x28
802686c: 88db ldrh r3, [r3, #6]
802686e: b29a uxth r2, r3
8026870: 6afb ldr r3, [r7, #44] @ 0x2c
8026872: 889b ldrh r3, [r3, #4]
8026874: b29b uxth r3, r3
8026876: 429a cmp r2, r3
8026878: d906 bls.n 8026888 <ip_reass_chain_frag_into_datagram_and_validate+0x1b4>
802687a: 4b45 ldr r3, [pc, #276] @ (8026990 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
802687c: f44f 72db mov.w r2, #438 @ 0x1b6
8026880: 4944 ldr r1, [pc, #272] @ (8026994 <ip_reass_chain_frag_into_datagram_and_validate+0x2c0>)
8026882: 4845 ldr r0, [pc, #276] @ (8026998 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
8026884: f004 f8d2 bl 802aa2c <iprintf>
#endif /* IP_REASS_CHECK_OVERLAP */
iprh_prev->next_pbuf = new_p;
8026888: 6abb ldr r3, [r7, #40] @ 0x28
802688a: 68ba ldr r2, [r7, #8]
802688c: 601a str r2, [r3, #0]
if (iprh_prev->end != iprh->start) {
802688e: 6abb ldr r3, [r7, #40] @ 0x28
8026890: 88db ldrh r3, [r3, #6]
8026892: b29a uxth r2, r3
8026894: 6afb ldr r3, [r7, #44] @ 0x2c
8026896: 889b ldrh r3, [r3, #4]
8026898: b29b uxth r3, r3
802689a: 429a cmp r2, r3
802689c: d010 beq.n 80268c0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
valid = 0;
802689e: 2300 movs r3, #0
80268a0: 623b str r3, [r7, #32]
80268a2: e00d b.n 80268c0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
}
} else {
#if IP_REASS_CHECK_OVERLAP
LWIP_ASSERT("no previous fragment, this must be the first fragment!",
80268a4: 68fb ldr r3, [r7, #12]
80268a6: 685b ldr r3, [r3, #4]
80268a8: 2b00 cmp r3, #0
80268aa: d006 beq.n 80268ba <ip_reass_chain_frag_into_datagram_and_validate+0x1e6>
80268ac: 4b38 ldr r3, [pc, #224] @ (8026990 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
80268ae: f44f 72df mov.w r2, #446 @ 0x1be
80268b2: 493a ldr r1, [pc, #232] @ (802699c <ip_reass_chain_frag_into_datagram_and_validate+0x2c8>)
80268b4: 4838 ldr r0, [pc, #224] @ (8026998 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
80268b6: f004 f8b9 bl 802aa2c <iprintf>
ipr->p == NULL);
#endif /* IP_REASS_CHECK_OVERLAP */
/* this is the first fragment we ever received for this ip datagram */
ipr->p = new_p;
80268ba: 68fb ldr r3, [r7, #12]
80268bc: 68ba ldr r2, [r7, #8]
80268be: 605a str r2, [r3, #4]
}
}
/* At this point, the validation part begins: */
/* If we already received the last fragment */
if (is_last || ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0)) {
80268c0: 687b ldr r3, [r7, #4]
80268c2: 2b00 cmp r3, #0
80268c4: d105 bne.n 80268d2 <ip_reass_chain_frag_into_datagram_and_validate+0x1fe>
80268c6: 68fb ldr r3, [r7, #12]
80268c8: 7f9b ldrb r3, [r3, #30]
80268ca: f003 0301 and.w r3, r3, #1
80268ce: 2b00 cmp r3, #0
80268d0: d059 beq.n 8026986 <ip_reass_chain_frag_into_datagram_and_validate+0x2b2>
/* and had no holes so far */
if (valid) {
80268d2: 6a3b ldr r3, [r7, #32]
80268d4: 2b00 cmp r3, #0
80268d6: d04f beq.n 8026978 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
/* then check if the rest of the fragments is here */
/* Check if the queue starts with the first datagram */
if ((ipr->p == NULL) || (((struct ip_reass_helper *)ipr->p->payload)->start != 0)) {
80268d8: 68fb ldr r3, [r7, #12]
80268da: 685b ldr r3, [r3, #4]
80268dc: 2b00 cmp r3, #0
80268de: d006 beq.n 80268ee <ip_reass_chain_frag_into_datagram_and_validate+0x21a>
80268e0: 68fb ldr r3, [r7, #12]
80268e2: 685b ldr r3, [r3, #4]
80268e4: 685b ldr r3, [r3, #4]
80268e6: 889b ldrh r3, [r3, #4]
80268e8: b29b uxth r3, r3
80268ea: 2b00 cmp r3, #0
80268ec: d002 beq.n 80268f4 <ip_reass_chain_frag_into_datagram_and_validate+0x220>
valid = 0;
80268ee: 2300 movs r3, #0
80268f0: 623b str r3, [r7, #32]
80268f2: e041 b.n 8026978 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
} else {
/* and check that there are no holes after this datagram */
iprh_prev = iprh;
80268f4: 6afb ldr r3, [r7, #44] @ 0x2c
80268f6: 62bb str r3, [r7, #40] @ 0x28
q = iprh->next_pbuf;
80268f8: 6afb ldr r3, [r7, #44] @ 0x2c
80268fa: 681b ldr r3, [r3, #0]
80268fc: 627b str r3, [r7, #36] @ 0x24
while (q != NULL) {
80268fe: e012 b.n 8026926 <ip_reass_chain_frag_into_datagram_and_validate+0x252>
iprh = (struct ip_reass_helper *)q->payload;
8026900: 6a7b ldr r3, [r7, #36] @ 0x24
8026902: 685b ldr r3, [r3, #4]
8026904: 62fb str r3, [r7, #44] @ 0x2c
if (iprh_prev->end != iprh->start) {
8026906: 6abb ldr r3, [r7, #40] @ 0x28
8026908: 88db ldrh r3, [r3, #6]
802690a: b29a uxth r2, r3
802690c: 6afb ldr r3, [r7, #44] @ 0x2c
802690e: 889b ldrh r3, [r3, #4]
8026910: b29b uxth r3, r3
8026912: 429a cmp r2, r3
8026914: d002 beq.n 802691c <ip_reass_chain_frag_into_datagram_and_validate+0x248>
valid = 0;
8026916: 2300 movs r3, #0
8026918: 623b str r3, [r7, #32]
break;
802691a: e007 b.n 802692c <ip_reass_chain_frag_into_datagram_and_validate+0x258>
}
iprh_prev = iprh;
802691c: 6afb ldr r3, [r7, #44] @ 0x2c
802691e: 62bb str r3, [r7, #40] @ 0x28
q = iprh->next_pbuf;
8026920: 6afb ldr r3, [r7, #44] @ 0x2c
8026922: 681b ldr r3, [r3, #0]
8026924: 627b str r3, [r7, #36] @ 0x24
while (q != NULL) {
8026926: 6a7b ldr r3, [r7, #36] @ 0x24
8026928: 2b00 cmp r3, #0
802692a: d1e9 bne.n 8026900 <ip_reass_chain_frag_into_datagram_and_validate+0x22c>
}
/* if still valid, all fragments are received
* (because to the MF==0 already arrived */
if (valid) {
802692c: 6a3b ldr r3, [r7, #32]
802692e: 2b00 cmp r3, #0
8026930: d022 beq.n 8026978 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
LWIP_ASSERT("sanity check", ipr->p != NULL);
8026932: 68fb ldr r3, [r7, #12]
8026934: 685b ldr r3, [r3, #4]
8026936: 2b00 cmp r3, #0
8026938: d106 bne.n 8026948 <ip_reass_chain_frag_into_datagram_and_validate+0x274>
802693a: 4b15 ldr r3, [pc, #84] @ (8026990 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
802693c: f240 12df movw r2, #479 @ 0x1df
8026940: 4917 ldr r1, [pc, #92] @ (80269a0 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
8026942: 4815 ldr r0, [pc, #84] @ (8026998 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
8026944: f004 f872 bl 802aa2c <iprintf>
LWIP_ASSERT("sanity check",
8026948: 68fb ldr r3, [r7, #12]
802694a: 685b ldr r3, [r3, #4]
802694c: 685b ldr r3, [r3, #4]
802694e: 6afa ldr r2, [r7, #44] @ 0x2c
8026950: 429a cmp r2, r3
8026952: d106 bne.n 8026962 <ip_reass_chain_frag_into_datagram_and_validate+0x28e>
8026954: 4b0e ldr r3, [pc, #56] @ (8026990 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
8026956: f44f 72f0 mov.w r2, #480 @ 0x1e0
802695a: 4911 ldr r1, [pc, #68] @ (80269a0 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
802695c: 480e ldr r0, [pc, #56] @ (8026998 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
802695e: f004 f865 bl 802aa2c <iprintf>
((struct ip_reass_helper *)ipr->p->payload) != iprh);
LWIP_ASSERT("validate_datagram:next_pbuf!=NULL",
8026962: 6afb ldr r3, [r7, #44] @ 0x2c
8026964: 681b ldr r3, [r3, #0]
8026966: 2b00 cmp r3, #0
8026968: d006 beq.n 8026978 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
802696a: 4b09 ldr r3, [pc, #36] @ (8026990 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
802696c: f44f 72f1 mov.w r2, #482 @ 0x1e2
8026970: 490c ldr r1, [pc, #48] @ (80269a4 <ip_reass_chain_frag_into_datagram_and_validate+0x2d0>)
8026972: 4809 ldr r0, [pc, #36] @ (8026998 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
8026974: f004 f85a bl 802aa2c <iprintf>
}
}
/* If valid is 0 here, there are some fragments missing in the middle
* (since MF == 0 has already arrived). Such datagrams simply time out if
* no more fragments are received... */
return valid ? IP_REASS_VALIDATE_TELEGRAM_FINISHED : IP_REASS_VALIDATE_PBUF_QUEUED;
8026978: 6a3b ldr r3, [r7, #32]
802697a: 2b00 cmp r3, #0
802697c: bf14 ite ne
802697e: 2301 movne r3, #1
8026980: 2300 moveq r3, #0
8026982: b2db uxtb r3, r3
8026984: e000 b.n 8026988 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
}
/* If we come here, not all fragments were received, yet! */
return IP_REASS_VALIDATE_PBUF_QUEUED; /* not yet valid! */
8026986: 2300 movs r3, #0
}
8026988: 4618 mov r0, r3
802698a: 3730 adds r7, #48 @ 0x30
802698c: 46bd mov sp, r7
802698e: bd80 pop {r7, pc}
8026990: 080318b4 .word 0x080318b4
8026994: 08031998 .word 0x08031998
8026998: 080318fc .word 0x080318fc
802699c: 080319b8 .word 0x080319b8
80269a0: 080319f0 .word 0x080319f0
80269a4: 08031a00 .word 0x08031a00
080269a8 <ip4_reass>:
* @param p points to a pbuf chain of the fragment
* @return NULL if reassembly is incomplete, ? otherwise
*/
struct pbuf *
ip4_reass(struct pbuf *p)
{
80269a8: b580 push {r7, lr}
80269aa: b08e sub sp, #56 @ 0x38
80269ac: af00 add r7, sp, #0
80269ae: 6078 str r0, [r7, #4]
int is_last;
IPFRAG_STATS_INC(ip_frag.recv);
MIB2_STATS_INC(mib2.ipreasmreqds);
fraghdr = (struct ip_hdr *)p->payload;
80269b0: 687b ldr r3, [r7, #4]
80269b2: 685b ldr r3, [r3, #4]
80269b4: 62bb str r3, [r7, #40] @ 0x28
if (IPH_HL_BYTES(fraghdr) != IP_HLEN) {
80269b6: 6abb ldr r3, [r7, #40] @ 0x28
80269b8: 781b ldrb r3, [r3, #0]
80269ba: f003 030f and.w r3, r3, #15
80269be: b2db uxtb r3, r3
80269c0: 009b lsls r3, r3, #2
80269c2: b2db uxtb r3, r3
80269c4: 2b14 cmp r3, #20
80269c6: f040 8171 bne.w 8026cac <ip4_reass+0x304>
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: IP options currently not supported!\n"));
IPFRAG_STATS_INC(ip_frag.err);
goto nullreturn;
}
offset = IPH_OFFSET_BYTES(fraghdr);
80269ca: 6abb ldr r3, [r7, #40] @ 0x28
80269cc: 88db ldrh r3, [r3, #6]
80269ce: b29b uxth r3, r3
80269d0: 4618 mov r0, r3
80269d2: f7f3 f8d1 bl 8019b78 <lwip_htons>
80269d6: 4603 mov r3, r0
80269d8: f3c3 030c ubfx r3, r3, #0, #13
80269dc: b29b uxth r3, r3
80269de: 00db lsls r3, r3, #3
80269e0: 84fb strh r3, [r7, #38] @ 0x26
len = lwip_ntohs(IPH_LEN(fraghdr));
80269e2: 6abb ldr r3, [r7, #40] @ 0x28
80269e4: 885b ldrh r3, [r3, #2]
80269e6: b29b uxth r3, r3
80269e8: 4618 mov r0, r3
80269ea: f7f3 f8c5 bl 8019b78 <lwip_htons>
80269ee: 4603 mov r3, r0
80269f0: 84bb strh r3, [r7, #36] @ 0x24
hlen = IPH_HL_BYTES(fraghdr);
80269f2: 6abb ldr r3, [r7, #40] @ 0x28
80269f4: 781b ldrb r3, [r3, #0]
80269f6: f003 030f and.w r3, r3, #15
80269fa: b2db uxtb r3, r3
80269fc: 009b lsls r3, r3, #2
80269fe: f887 3023 strb.w r3, [r7, #35] @ 0x23
if (hlen > len) {
8026a02: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
8026a06: b29b uxth r3, r3
8026a08: 8cba ldrh r2, [r7, #36] @ 0x24
8026a0a: 429a cmp r2, r3
8026a0c: f0c0 8150 bcc.w 8026cb0 <ip4_reass+0x308>
/* invalid datagram */
goto nullreturn;
}
len = (u16_t)(len - hlen);
8026a10: f897 3023 ldrb.w r3, [r7, #35] @ 0x23
8026a14: b29b uxth r3, r3
8026a16: 8cba ldrh r2, [r7, #36] @ 0x24
8026a18: 1ad3 subs r3, r2, r3
8026a1a: 84bb strh r3, [r7, #36] @ 0x24
/* Check if we are allowed to enqueue more datagrams. */
clen = pbuf_clen(p);
8026a1c: 6878 ldr r0, [r7, #4]
8026a1e: f7f4 fe1b bl 801b658 <pbuf_clen>
8026a22: 4603 mov r3, r0
8026a24: 843b strh r3, [r7, #32]
if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) {
8026a26: 4b8c ldr r3, [pc, #560] @ (8026c58 <ip4_reass+0x2b0>)
8026a28: 881b ldrh r3, [r3, #0]
8026a2a: 461a mov r2, r3
8026a2c: 8c3b ldrh r3, [r7, #32]
8026a2e: 4413 add r3, r2
8026a30: 2b0a cmp r3, #10
8026a32: dd10 ble.n 8026a56 <ip4_reass+0xae>
#if IP_REASS_FREE_OLDEST
if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
8026a34: 8c3b ldrh r3, [r7, #32]
8026a36: 4619 mov r1, r3
8026a38: 6ab8 ldr r0, [r7, #40] @ 0x28
8026a3a: f7ff fd81 bl 8026540 <ip_reass_remove_oldest_datagram>
8026a3e: 4603 mov r3, r0
8026a40: 2b00 cmp r3, #0
8026a42: f000 8137 beq.w 8026cb4 <ip4_reass+0x30c>
((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS))
8026a46: 4b84 ldr r3, [pc, #528] @ (8026c58 <ip4_reass+0x2b0>)
8026a48: 881b ldrh r3, [r3, #0]
8026a4a: 461a mov r2, r3
8026a4c: 8c3b ldrh r3, [r7, #32]
8026a4e: 4413 add r3, r2
if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
8026a50: 2b0a cmp r3, #10
8026a52: f300 812f bgt.w 8026cb4 <ip4_reass+0x30c>
}
}
/* Look for the datagram the fragment belongs to in the current datagram queue,
* remembering the previous in the queue for later dequeueing. */
for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
8026a56: 4b81 ldr r3, [pc, #516] @ (8026c5c <ip4_reass+0x2b4>)
8026a58: 681b ldr r3, [r3, #0]
8026a5a: 633b str r3, [r7, #48] @ 0x30
8026a5c: e015 b.n 8026a8a <ip4_reass+0xe2>
/* Check if the incoming fragment matches the one currently present
in the reassembly buffer. If so, we proceed with copying the
fragment into the buffer. */
if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) {
8026a5e: 6b3b ldr r3, [r7, #48] @ 0x30
8026a60: 695a ldr r2, [r3, #20]
8026a62: 6abb ldr r3, [r7, #40] @ 0x28
8026a64: 68db ldr r3, [r3, #12]
8026a66: 429a cmp r2, r3
8026a68: d10c bne.n 8026a84 <ip4_reass+0xdc>
8026a6a: 6b3b ldr r3, [r7, #48] @ 0x30
8026a6c: 699a ldr r2, [r3, #24]
8026a6e: 6abb ldr r3, [r7, #40] @ 0x28
8026a70: 691b ldr r3, [r3, #16]
8026a72: 429a cmp r2, r3
8026a74: d106 bne.n 8026a84 <ip4_reass+0xdc>
8026a76: 6b3b ldr r3, [r7, #48] @ 0x30
8026a78: 899a ldrh r2, [r3, #12]
8026a7a: 6abb ldr r3, [r7, #40] @ 0x28
8026a7c: 889b ldrh r3, [r3, #4]
8026a7e: b29b uxth r3, r3
8026a80: 429a cmp r2, r3
8026a82: d006 beq.n 8026a92 <ip4_reass+0xea>
for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
8026a84: 6b3b ldr r3, [r7, #48] @ 0x30
8026a86: 681b ldr r3, [r3, #0]
8026a88: 633b str r3, [r7, #48] @ 0x30
8026a8a: 6b3b ldr r3, [r7, #48] @ 0x30
8026a8c: 2b00 cmp r3, #0
8026a8e: d1e6 bne.n 8026a5e <ip4_reass+0xb6>
8026a90: e000 b.n 8026a94 <ip4_reass+0xec>
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: matching previous fragment ID=%"X16_F"\n",
lwip_ntohs(IPH_ID(fraghdr))));
IPFRAG_STATS_INC(ip_frag.cachehit);
break;
8026a92: bf00 nop
}
}
if (ipr == NULL) {
8026a94: 6b3b ldr r3, [r7, #48] @ 0x30
8026a96: 2b00 cmp r3, #0
8026a98: d109 bne.n 8026aae <ip4_reass+0x106>
/* Enqueue a new datagram into the datagram queue */
ipr = ip_reass_enqueue_new_datagram(fraghdr, clen);
8026a9a: 8c3b ldrh r3, [r7, #32]
8026a9c: 4619 mov r1, r3
8026a9e: 6ab8 ldr r0, [r7, #40] @ 0x28
8026aa0: f7ff fdb0 bl 8026604 <ip_reass_enqueue_new_datagram>
8026aa4: 6338 str r0, [r7, #48] @ 0x30
/* Bail if unable to enqueue */
if (ipr == NULL) {
8026aa6: 6b3b ldr r3, [r7, #48] @ 0x30
8026aa8: 2b00 cmp r3, #0
8026aaa: d11c bne.n 8026ae6 <ip4_reass+0x13e>
goto nullreturn;
8026aac: e105 b.n 8026cba <ip4_reass+0x312>
}
} else {
if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
8026aae: 6abb ldr r3, [r7, #40] @ 0x28
8026ab0: 88db ldrh r3, [r3, #6]
8026ab2: b29b uxth r3, r3
8026ab4: 4618 mov r0, r3
8026ab6: f7f3 f85f bl 8019b78 <lwip_htons>
8026aba: 4603 mov r3, r0
8026abc: f3c3 030c ubfx r3, r3, #0, #13
8026ac0: 2b00 cmp r3, #0
8026ac2: d110 bne.n 8026ae6 <ip4_reass+0x13e>
((lwip_ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) {
8026ac4: 6b3b ldr r3, [r7, #48] @ 0x30
8026ac6: 89db ldrh r3, [r3, #14]
8026ac8: 4618 mov r0, r3
8026aca: f7f3 f855 bl 8019b78 <lwip_htons>
8026ace: 4603 mov r3, r0
8026ad0: f3c3 030c ubfx r3, r3, #0, #13
if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
8026ad4: 2b00 cmp r3, #0
8026ad6: d006 beq.n 8026ae6 <ip4_reass+0x13e>
/* ipr->iphdr is not the header from the first fragment, but fraghdr is
* -> copy fraghdr into ipr->iphdr since we want to have the header
* of the first fragment (for ICMP time exceeded and later, for copying
* all options, if supported)*/
SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN);
8026ad8: 6b3b ldr r3, [r7, #48] @ 0x30
8026ada: 3308 adds r3, #8
8026adc: 2214 movs r2, #20
8026ade: 6ab9 ldr r1, [r7, #40] @ 0x28
8026ae0: 4618 mov r0, r3
8026ae2: f004 fa2c bl 802af3e <memcpy>
/* At this point, we have either created a new entry or pointing
* to an existing one */
/* check for 'no more fragments', and update queue entry*/
is_last = (IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0;
8026ae6: 6abb ldr r3, [r7, #40] @ 0x28
8026ae8: 88db ldrh r3, [r3, #6]
8026aea: b29b uxth r3, r3
8026aec: f003 0320 and.w r3, r3, #32
8026af0: 2b00 cmp r3, #0
8026af2: bf0c ite eq
8026af4: 2301 moveq r3, #1
8026af6: 2300 movne r3, #0
8026af8: b2db uxtb r3, r3
8026afa: 61fb str r3, [r7, #28]
if (is_last) {
8026afc: 69fb ldr r3, [r7, #28]
8026afe: 2b00 cmp r3, #0
8026b00: d00e beq.n 8026b20 <ip4_reass+0x178>
u16_t datagram_len = (u16_t)(offset + len);
8026b02: 8cfa ldrh r2, [r7, #38] @ 0x26
8026b04: 8cbb ldrh r3, [r7, #36] @ 0x24
8026b06: 4413 add r3, r2
8026b08: 837b strh r3, [r7, #26]
if ((datagram_len < offset) || (datagram_len > (0xFFFF - IP_HLEN))) {
8026b0a: 8b7a ldrh r2, [r7, #26]
8026b0c: 8cfb ldrh r3, [r7, #38] @ 0x26
8026b0e: 429a cmp r2, r3
8026b10: f0c0 80a0 bcc.w 8026c54 <ip4_reass+0x2ac>
8026b14: 8b7b ldrh r3, [r7, #26]
8026b16: f64f 72eb movw r2, #65515 @ 0xffeb
8026b1a: 4293 cmp r3, r2
8026b1c: f200 809a bhi.w 8026c54 <ip4_reass+0x2ac>
goto nullreturn_ipr;
}
}
/* find the right place to insert this pbuf */
/* @todo: trim pbufs if fragments are overlapping */
valid = ip_reass_chain_frag_into_datagram_and_validate(ipr, p, is_last);
8026b20: 69fa ldr r2, [r7, #28]
8026b22: 6879 ldr r1, [r7, #4]
8026b24: 6b38 ldr r0, [r7, #48] @ 0x30
8026b26: f7ff fdd5 bl 80266d4 <ip_reass_chain_frag_into_datagram_and_validate>
8026b2a: 6178 str r0, [r7, #20]
if (valid == IP_REASS_VALIDATE_PBUF_DROPPED) {
8026b2c: 697b ldr r3, [r7, #20]
8026b2e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8026b32: f000 809b beq.w 8026c6c <ip4_reass+0x2c4>
/* if we come here, the pbuf has been enqueued */
/* Track the current number of pbufs current 'in-flight', in order to limit
the number of fragments that may be enqueued at any one time
(overflow checked by testing against IP_REASS_MAX_PBUFS) */
ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount + clen);
8026b36: 4b48 ldr r3, [pc, #288] @ (8026c58 <ip4_reass+0x2b0>)
8026b38: 881a ldrh r2, [r3, #0]
8026b3a: 8c3b ldrh r3, [r7, #32]
8026b3c: 4413 add r3, r2
8026b3e: b29a uxth r2, r3
8026b40: 4b45 ldr r3, [pc, #276] @ (8026c58 <ip4_reass+0x2b0>)
8026b42: 801a strh r2, [r3, #0]
if (is_last) {
8026b44: 69fb ldr r3, [r7, #28]
8026b46: 2b00 cmp r3, #0
8026b48: d00d beq.n 8026b66 <ip4_reass+0x1be>
u16_t datagram_len = (u16_t)(offset + len);
8026b4a: 8cfa ldrh r2, [r7, #38] @ 0x26
8026b4c: 8cbb ldrh r3, [r7, #36] @ 0x24
8026b4e: 4413 add r3, r2
8026b50: 827b strh r3, [r7, #18]
ipr->datagram_len = datagram_len;
8026b52: 6b3b ldr r3, [r7, #48] @ 0x30
8026b54: 8a7a ldrh r2, [r7, #18]
8026b56: 839a strh r2, [r3, #28]
ipr->flags |= IP_REASS_FLAG_LASTFRAG;
8026b58: 6b3b ldr r3, [r7, #48] @ 0x30
8026b5a: 7f9b ldrb r3, [r3, #30]
8026b5c: f043 0301 orr.w r3, r3, #1
8026b60: b2da uxtb r2, r3
8026b62: 6b3b ldr r3, [r7, #48] @ 0x30
8026b64: 779a strb r2, [r3, #30]
LWIP_DEBUGF(IP_REASS_DEBUG,
("ip4_reass: last fragment seen, total len %"S16_F"\n",
ipr->datagram_len));
}
if (valid == IP_REASS_VALIDATE_TELEGRAM_FINISHED) {
8026b66: 697b ldr r3, [r7, #20]
8026b68: 2b01 cmp r3, #1
8026b6a: d171 bne.n 8026c50 <ip4_reass+0x2a8>
struct ip_reassdata *ipr_prev;
/* the totally last fragment (flag more fragments = 0) was received at least
* once AND all fragments are received */
u16_t datagram_len = (u16_t)(ipr->datagram_len + IP_HLEN);
8026b6c: 6b3b ldr r3, [r7, #48] @ 0x30
8026b6e: 8b9b ldrh r3, [r3, #28]
8026b70: 3314 adds r3, #20
8026b72: 823b strh r3, [r7, #16]
/* save the second pbuf before copying the header over the pointer */
r = ((struct ip_reass_helper *)ipr->p->payload)->next_pbuf;
8026b74: 6b3b ldr r3, [r7, #48] @ 0x30
8026b76: 685b ldr r3, [r3, #4]
8026b78: 685b ldr r3, [r3, #4]
8026b7a: 681b ldr r3, [r3, #0]
8026b7c: 62fb str r3, [r7, #44] @ 0x2c
/* copy the original ip header back to the first pbuf */
fraghdr = (struct ip_hdr *)(ipr->p->payload);
8026b7e: 6b3b ldr r3, [r7, #48] @ 0x30
8026b80: 685b ldr r3, [r3, #4]
8026b82: 685b ldr r3, [r3, #4]
8026b84: 62bb str r3, [r7, #40] @ 0x28
SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN);
8026b86: 6b3b ldr r3, [r7, #48] @ 0x30
8026b88: 3308 adds r3, #8
8026b8a: 2214 movs r2, #20
8026b8c: 4619 mov r1, r3
8026b8e: 6ab8 ldr r0, [r7, #40] @ 0x28
8026b90: f004 f9d5 bl 802af3e <memcpy>
IPH_LEN_SET(fraghdr, lwip_htons(datagram_len));
8026b94: 8a3b ldrh r3, [r7, #16]
8026b96: 4618 mov r0, r3
8026b98: f7f2 ffee bl 8019b78 <lwip_htons>
8026b9c: 4603 mov r3, r0
8026b9e: 461a mov r2, r3
8026ba0: 6abb ldr r3, [r7, #40] @ 0x28
8026ba2: 805a strh r2, [r3, #2]
IPH_OFFSET_SET(fraghdr, 0);
8026ba4: 6abb ldr r3, [r7, #40] @ 0x28
8026ba6: 2200 movs r2, #0
8026ba8: 719a strb r2, [r3, #6]
8026baa: 2200 movs r2, #0
8026bac: 71da strb r2, [r3, #7]
IPH_CHKSUM_SET(fraghdr, 0);
8026bae: 6abb ldr r3, [r7, #40] @ 0x28
8026bb0: 2200 movs r2, #0
8026bb2: 729a strb r2, [r3, #10]
8026bb4: 2200 movs r2, #0
8026bb6: 72da strb r2, [r3, #11]
IF__NETIF_CHECKSUM_ENABLED(ip_current_input_netif(), NETIF_CHECKSUM_GEN_IP) {
IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN));
}
#endif /* CHECKSUM_GEN_IP */
p = ipr->p;
8026bb8: 6b3b ldr r3, [r7, #48] @ 0x30
8026bba: 685b ldr r3, [r3, #4]
8026bbc: 607b str r3, [r7, #4]
/* chain together the pbufs contained within the reass_data list. */
while (r != NULL) {
8026bbe: e00d b.n 8026bdc <ip4_reass+0x234>
iprh = (struct ip_reass_helper *)r->payload;
8026bc0: 6afb ldr r3, [r7, #44] @ 0x2c
8026bc2: 685b ldr r3, [r3, #4]
8026bc4: 60fb str r3, [r7, #12]
/* hide the ip header for every succeeding fragment */
pbuf_remove_header(r, IP_HLEN);
8026bc6: 2114 movs r1, #20
8026bc8: 6af8 ldr r0, [r7, #44] @ 0x2c
8026bca: f7f4 fbff bl 801b3cc <pbuf_remove_header>
pbuf_cat(p, r);
8026bce: 6af9 ldr r1, [r7, #44] @ 0x2c
8026bd0: 6878 ldr r0, [r7, #4]
8026bd2: f7f4 fd81 bl 801b6d8 <pbuf_cat>
r = iprh->next_pbuf;
8026bd6: 68fb ldr r3, [r7, #12]
8026bd8: 681b ldr r3, [r3, #0]
8026bda: 62fb str r3, [r7, #44] @ 0x2c
while (r != NULL) {
8026bdc: 6afb ldr r3, [r7, #44] @ 0x2c
8026bde: 2b00 cmp r3, #0
8026be0: d1ee bne.n 8026bc0 <ip4_reass+0x218>
}
/* find the previous entry in the linked list */
if (ipr == reassdatagrams) {
8026be2: 4b1e ldr r3, [pc, #120] @ (8026c5c <ip4_reass+0x2b4>)
8026be4: 681b ldr r3, [r3, #0]
8026be6: 6b3a ldr r2, [r7, #48] @ 0x30
8026be8: 429a cmp r2, r3
8026bea: d102 bne.n 8026bf2 <ip4_reass+0x24a>
ipr_prev = NULL;
8026bec: 2300 movs r3, #0
8026bee: 637b str r3, [r7, #52] @ 0x34
8026bf0: e010 b.n 8026c14 <ip4_reass+0x26c>
} else {
for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
8026bf2: 4b1a ldr r3, [pc, #104] @ (8026c5c <ip4_reass+0x2b4>)
8026bf4: 681b ldr r3, [r3, #0]
8026bf6: 637b str r3, [r7, #52] @ 0x34
8026bf8: e007 b.n 8026c0a <ip4_reass+0x262>
if (ipr_prev->next == ipr) {
8026bfa: 6b7b ldr r3, [r7, #52] @ 0x34
8026bfc: 681b ldr r3, [r3, #0]
8026bfe: 6b3a ldr r2, [r7, #48] @ 0x30
8026c00: 429a cmp r2, r3
8026c02: d006 beq.n 8026c12 <ip4_reass+0x26a>
for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
8026c04: 6b7b ldr r3, [r7, #52] @ 0x34
8026c06: 681b ldr r3, [r3, #0]
8026c08: 637b str r3, [r7, #52] @ 0x34
8026c0a: 6b7b ldr r3, [r7, #52] @ 0x34
8026c0c: 2b00 cmp r3, #0
8026c0e: d1f4 bne.n 8026bfa <ip4_reass+0x252>
8026c10: e000 b.n 8026c14 <ip4_reass+0x26c>
break;
8026c12: bf00 nop
}
}
}
/* release the sources allocate for the fragment queue entry */
ip_reass_dequeue_datagram(ipr, ipr_prev);
8026c14: 6b79 ldr r1, [r7, #52] @ 0x34
8026c16: 6b38 ldr r0, [r7, #48] @ 0x30
8026c18: f7ff fd2e bl 8026678 <ip_reass_dequeue_datagram>
/* and adjust the number of pbufs currently queued for reassembly. */
clen = pbuf_clen(p);
8026c1c: 6878 ldr r0, [r7, #4]
8026c1e: f7f4 fd1b bl 801b658 <pbuf_clen>
8026c22: 4603 mov r3, r0
8026c24: 843b strh r3, [r7, #32]
LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= clen);
8026c26: 4b0c ldr r3, [pc, #48] @ (8026c58 <ip4_reass+0x2b0>)
8026c28: 881b ldrh r3, [r3, #0]
8026c2a: 8c3a ldrh r2, [r7, #32]
8026c2c: 429a cmp r2, r3
8026c2e: d906 bls.n 8026c3e <ip4_reass+0x296>
8026c30: 4b0b ldr r3, [pc, #44] @ (8026c60 <ip4_reass+0x2b8>)
8026c32: f240 229b movw r2, #667 @ 0x29b
8026c36: 490b ldr r1, [pc, #44] @ (8026c64 <ip4_reass+0x2bc>)
8026c38: 480b ldr r0, [pc, #44] @ (8026c68 <ip4_reass+0x2c0>)
8026c3a: f003 fef7 bl 802aa2c <iprintf>
ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - clen);
8026c3e: 4b06 ldr r3, [pc, #24] @ (8026c58 <ip4_reass+0x2b0>)
8026c40: 881a ldrh r2, [r3, #0]
8026c42: 8c3b ldrh r3, [r7, #32]
8026c44: 1ad3 subs r3, r2, r3
8026c46: b29a uxth r2, r3
8026c48: 4b03 ldr r3, [pc, #12] @ (8026c58 <ip4_reass+0x2b0>)
8026c4a: 801a strh r2, [r3, #0]
MIB2_STATS_INC(mib2.ipreasmoks);
/* Return the pbuf chain */
return p;
8026c4c: 687b ldr r3, [r7, #4]
8026c4e: e038 b.n 8026cc2 <ip4_reass+0x31a>
}
/* the datagram is not (yet?) reassembled completely */
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount));
return NULL;
8026c50: 2300 movs r3, #0
8026c52: e036 b.n 8026cc2 <ip4_reass+0x31a>
goto nullreturn_ipr;
8026c54: bf00 nop
8026c56: e00a b.n 8026c6e <ip4_reass+0x2c6>
8026c58: 2402b148 .word 0x2402b148
8026c5c: 2402b144 .word 0x2402b144
8026c60: 080318b4 .word 0x080318b4
8026c64: 08031a24 .word 0x08031a24
8026c68: 080318fc .word 0x080318fc
goto nullreturn_ipr;
8026c6c: bf00 nop
nullreturn_ipr:
LWIP_ASSERT("ipr != NULL", ipr != NULL);
8026c6e: 6b3b ldr r3, [r7, #48] @ 0x30
8026c70: 2b00 cmp r3, #0
8026c72: d106 bne.n 8026c82 <ip4_reass+0x2da>
8026c74: 4b15 ldr r3, [pc, #84] @ (8026ccc <ip4_reass+0x324>)
8026c76: f44f 722a mov.w r2, #680 @ 0x2a8
8026c7a: 4915 ldr r1, [pc, #84] @ (8026cd0 <ip4_reass+0x328>)
8026c7c: 4815 ldr r0, [pc, #84] @ (8026cd4 <ip4_reass+0x32c>)
8026c7e: f003 fed5 bl 802aa2c <iprintf>
if (ipr->p == NULL) {
8026c82: 6b3b ldr r3, [r7, #48] @ 0x30
8026c84: 685b ldr r3, [r3, #4]
8026c86: 2b00 cmp r3, #0
8026c88: d116 bne.n 8026cb8 <ip4_reass+0x310>
/* dropped pbuf after creating a new datagram entry: remove the entry, too */
LWIP_ASSERT("not firstalthough just enqueued", ipr == reassdatagrams);
8026c8a: 4b13 ldr r3, [pc, #76] @ (8026cd8 <ip4_reass+0x330>)
8026c8c: 681b ldr r3, [r3, #0]
8026c8e: 6b3a ldr r2, [r7, #48] @ 0x30
8026c90: 429a cmp r2, r3
8026c92: d006 beq.n 8026ca2 <ip4_reass+0x2fa>
8026c94: 4b0d ldr r3, [pc, #52] @ (8026ccc <ip4_reass+0x324>)
8026c96: f240 22ab movw r2, #683 @ 0x2ab
8026c9a: 4910 ldr r1, [pc, #64] @ (8026cdc <ip4_reass+0x334>)
8026c9c: 480d ldr r0, [pc, #52] @ (8026cd4 <ip4_reass+0x32c>)
8026c9e: f003 fec5 bl 802aa2c <iprintf>
ip_reass_dequeue_datagram(ipr, NULL);
8026ca2: 2100 movs r1, #0
8026ca4: 6b38 ldr r0, [r7, #48] @ 0x30
8026ca6: f7ff fce7 bl 8026678 <ip_reass_dequeue_datagram>
8026caa: e006 b.n 8026cba <ip4_reass+0x312>
goto nullreturn;
8026cac: bf00 nop
8026cae: e004 b.n 8026cba <ip4_reass+0x312>
goto nullreturn;
8026cb0: bf00 nop
8026cb2: e002 b.n 8026cba <ip4_reass+0x312>
goto nullreturn;
8026cb4: bf00 nop
8026cb6: e000 b.n 8026cba <ip4_reass+0x312>
}
nullreturn:
8026cb8: bf00 nop
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: nullreturn\n"));
IPFRAG_STATS_INC(ip_frag.drop);
pbuf_free(p);
8026cba: 6878 ldr r0, [r7, #4]
8026cbc: f7f4 fc3e bl 801b53c <pbuf_free>
return NULL;
8026cc0: 2300 movs r3, #0
}
8026cc2: 4618 mov r0, r3
8026cc4: 3738 adds r7, #56 @ 0x38
8026cc6: 46bd mov sp, r7
8026cc8: bd80 pop {r7, pc}
8026cca: bf00 nop
8026ccc: 080318b4 .word 0x080318b4
8026cd0: 08031a40 .word 0x08031a40
8026cd4: 080318fc .word 0x080318fc
8026cd8: 2402b144 .word 0x2402b144
8026cdc: 08031a4c .word 0x08031a4c
08026ce0 <ip_frag_alloc_pbuf_custom_ref>:
#if IP_FRAG
#if !LWIP_NETIF_TX_SINGLE_PBUF
/** Allocate a new struct pbuf_custom_ref */
static struct pbuf_custom_ref *
ip_frag_alloc_pbuf_custom_ref(void)
{
8026ce0: b580 push {r7, lr}
8026ce2: af00 add r7, sp, #0
return (struct pbuf_custom_ref *)memp_malloc(MEMP_FRAG_PBUF);
8026ce4: 2005 movs r0, #5
8026ce6: f7f3 fcc5 bl 801a674 <memp_malloc>
8026cea: 4603 mov r3, r0
}
8026cec: 4618 mov r0, r3
8026cee: bd80 pop {r7, pc}
08026cf0 <ip_frag_free_pbuf_custom_ref>:
/** Free a struct pbuf_custom_ref */
static void
ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref *p)
{
8026cf0: b580 push {r7, lr}
8026cf2: b082 sub sp, #8
8026cf4: af00 add r7, sp, #0
8026cf6: 6078 str r0, [r7, #4]
LWIP_ASSERT("p != NULL", p != NULL);
8026cf8: 687b ldr r3, [r7, #4]
8026cfa: 2b00 cmp r3, #0
8026cfc: d106 bne.n 8026d0c <ip_frag_free_pbuf_custom_ref+0x1c>
8026cfe: 4b07 ldr r3, [pc, #28] @ (8026d1c <ip_frag_free_pbuf_custom_ref+0x2c>)
8026d00: f44f 7231 mov.w r2, #708 @ 0x2c4
8026d04: 4906 ldr r1, [pc, #24] @ (8026d20 <ip_frag_free_pbuf_custom_ref+0x30>)
8026d06: 4807 ldr r0, [pc, #28] @ (8026d24 <ip_frag_free_pbuf_custom_ref+0x34>)
8026d08: f003 fe90 bl 802aa2c <iprintf>
memp_free(MEMP_FRAG_PBUF, p);
8026d0c: 6879 ldr r1, [r7, #4]
8026d0e: 2005 movs r0, #5
8026d10: f7f3 fd26 bl 801a760 <memp_free>
}
8026d14: bf00 nop
8026d16: 3708 adds r7, #8
8026d18: 46bd mov sp, r7
8026d1a: bd80 pop {r7, pc}
8026d1c: 080318b4 .word 0x080318b4
8026d20: 08031a6c .word 0x08031a6c
8026d24: 080318fc .word 0x080318fc
08026d28 <ipfrag_free_pbuf_custom>:
/** Free-callback function to free a 'struct pbuf_custom_ref', called by
* pbuf_free. */
static void
ipfrag_free_pbuf_custom(struct pbuf *p)
{
8026d28: b580 push {r7, lr}
8026d2a: b084 sub sp, #16
8026d2c: af00 add r7, sp, #0
8026d2e: 6078 str r0, [r7, #4]
struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref *)p;
8026d30: 687b ldr r3, [r7, #4]
8026d32: 60fb str r3, [r7, #12]
LWIP_ASSERT("pcr != NULL", pcr != NULL);
8026d34: 68fb ldr r3, [r7, #12]
8026d36: 2b00 cmp r3, #0
8026d38: d106 bne.n 8026d48 <ipfrag_free_pbuf_custom+0x20>
8026d3a: 4b11 ldr r3, [pc, #68] @ (8026d80 <ipfrag_free_pbuf_custom+0x58>)
8026d3c: f240 22ce movw r2, #718 @ 0x2ce
8026d40: 4910 ldr r1, [pc, #64] @ (8026d84 <ipfrag_free_pbuf_custom+0x5c>)
8026d42: 4811 ldr r0, [pc, #68] @ (8026d88 <ipfrag_free_pbuf_custom+0x60>)
8026d44: f003 fe72 bl 802aa2c <iprintf>
LWIP_ASSERT("pcr == p", (void *)pcr == (void *)p);
8026d48: 68fa ldr r2, [r7, #12]
8026d4a: 687b ldr r3, [r7, #4]
8026d4c: 429a cmp r2, r3
8026d4e: d006 beq.n 8026d5e <ipfrag_free_pbuf_custom+0x36>
8026d50: 4b0b ldr r3, [pc, #44] @ (8026d80 <ipfrag_free_pbuf_custom+0x58>)
8026d52: f240 22cf movw r2, #719 @ 0x2cf
8026d56: 490d ldr r1, [pc, #52] @ (8026d8c <ipfrag_free_pbuf_custom+0x64>)
8026d58: 480b ldr r0, [pc, #44] @ (8026d88 <ipfrag_free_pbuf_custom+0x60>)
8026d5a: f003 fe67 bl 802aa2c <iprintf>
if (pcr->original != NULL) {
8026d5e: 68fb ldr r3, [r7, #12]
8026d60: 695b ldr r3, [r3, #20]
8026d62: 2b00 cmp r3, #0
8026d64: d004 beq.n 8026d70 <ipfrag_free_pbuf_custom+0x48>
pbuf_free(pcr->original);
8026d66: 68fb ldr r3, [r7, #12]
8026d68: 695b ldr r3, [r3, #20]
8026d6a: 4618 mov r0, r3
8026d6c: f7f4 fbe6 bl 801b53c <pbuf_free>
}
ip_frag_free_pbuf_custom_ref(pcr);
8026d70: 68f8 ldr r0, [r7, #12]
8026d72: f7ff ffbd bl 8026cf0 <ip_frag_free_pbuf_custom_ref>
}
8026d76: bf00 nop
8026d78: 3710 adds r7, #16
8026d7a: 46bd mov sp, r7
8026d7c: bd80 pop {r7, pc}
8026d7e: bf00 nop
8026d80: 080318b4 .word 0x080318b4
8026d84: 08031a78 .word 0x08031a78
8026d88: 080318fc .word 0x080318fc
8026d8c: 08031a84 .word 0x08031a84
08026d90 <ip4_frag>:
*
* @return ERR_OK if sent successfully, err_t otherwise
*/
err_t
ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest)
{
8026d90: b580 push {r7, lr}
8026d92: b094 sub sp, #80 @ 0x50
8026d94: af02 add r7, sp, #8
8026d96: 60f8 str r0, [r7, #12]
8026d98: 60b9 str r1, [r7, #8]
8026d9a: 607a str r2, [r7, #4]
struct pbuf *rambuf;
#if !LWIP_NETIF_TX_SINGLE_PBUF
struct pbuf *newpbuf;
u16_t newpbuflen = 0;
8026d9c: 2300 movs r3, #0
8026d9e: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
u16_t left_to_copy;
#endif
struct ip_hdr *original_iphdr;
struct ip_hdr *iphdr;
const u16_t nfb = (u16_t)((netif->mtu - IP_HLEN) / 8);
8026da2: 68bb ldr r3, [r7, #8]
8026da4: 8d1b ldrh r3, [r3, #40] @ 0x28
8026da6: 3b14 subs r3, #20
8026da8: 2b00 cmp r3, #0
8026daa: da00 bge.n 8026dae <ip4_frag+0x1e>
8026dac: 3307 adds r3, #7
8026dae: 10db asrs r3, r3, #3
8026db0: 877b strh r3, [r7, #58] @ 0x3a
u16_t left, fragsize;
u16_t ofo;
int last;
u16_t poff = IP_HLEN;
8026db2: 2314 movs r3, #20
8026db4: 87fb strh r3, [r7, #62] @ 0x3e
u16_t tmp;
int mf_set;
original_iphdr = (struct ip_hdr *)p->payload;
8026db6: 68fb ldr r3, [r7, #12]
8026db8: 685b ldr r3, [r3, #4]
8026dba: 637b str r3, [r7, #52] @ 0x34
iphdr = original_iphdr;
8026dbc: 6b7b ldr r3, [r7, #52] @ 0x34
8026dbe: 633b str r3, [r7, #48] @ 0x30
if (IPH_HL_BYTES(iphdr) != IP_HLEN) {
8026dc0: 6b3b ldr r3, [r7, #48] @ 0x30
8026dc2: 781b ldrb r3, [r3, #0]
8026dc4: f003 030f and.w r3, r3, #15
8026dc8: b2db uxtb r3, r3
8026dca: 009b lsls r3, r3, #2
8026dcc: b2db uxtb r3, r3
8026dce: 2b14 cmp r3, #20
8026dd0: d002 beq.n 8026dd8 <ip4_frag+0x48>
/* ip4_frag() does not support IP options */
return ERR_VAL;
8026dd2: f06f 0305 mvn.w r3, #5
8026dd6: e110 b.n 8026ffa <ip4_frag+0x26a>
}
LWIP_ERROR("ip4_frag(): pbuf too short", p->len >= IP_HLEN, return ERR_VAL);
8026dd8: 68fb ldr r3, [r7, #12]
8026dda: 895b ldrh r3, [r3, #10]
8026ddc: 2b13 cmp r3, #19
8026dde: d809 bhi.n 8026df4 <ip4_frag+0x64>
8026de0: 4b88 ldr r3, [pc, #544] @ (8027004 <ip4_frag+0x274>)
8026de2: f44f 723f mov.w r2, #764 @ 0x2fc
8026de6: 4988 ldr r1, [pc, #544] @ (8027008 <ip4_frag+0x278>)
8026de8: 4888 ldr r0, [pc, #544] @ (802700c <ip4_frag+0x27c>)
8026dea: f003 fe1f bl 802aa2c <iprintf>
8026dee: f06f 0305 mvn.w r3, #5
8026df2: e102 b.n 8026ffa <ip4_frag+0x26a>
/* Save original offset */
tmp = lwip_ntohs(IPH_OFFSET(iphdr));
8026df4: 6b3b ldr r3, [r7, #48] @ 0x30
8026df6: 88db ldrh r3, [r3, #6]
8026df8: b29b uxth r3, r3
8026dfa: 4618 mov r0, r3
8026dfc: f7f2 febc bl 8019b78 <lwip_htons>
8026e00: 4603 mov r3, r0
8026e02: 87bb strh r3, [r7, #60] @ 0x3c
ofo = tmp & IP_OFFMASK;
8026e04: 8fbb ldrh r3, [r7, #60] @ 0x3c
8026e06: f3c3 030c ubfx r3, r3, #0, #13
8026e0a: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
/* already fragmented? if so, the last fragment we create must have MF, too */
mf_set = tmp & IP_MF;
8026e0e: 8fbb ldrh r3, [r7, #60] @ 0x3c
8026e10: f403 5300 and.w r3, r3, #8192 @ 0x2000
8026e14: 62fb str r3, [r7, #44] @ 0x2c
left = (u16_t)(p->tot_len - IP_HLEN);
8026e16: 68fb ldr r3, [r7, #12]
8026e18: 891b ldrh r3, [r3, #8]
8026e1a: 3b14 subs r3, #20
8026e1c: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
while (left) {
8026e20: e0e1 b.n 8026fe6 <ip4_frag+0x256>
/* Fill this fragment */
fragsize = LWIP_MIN(left, (u16_t)(nfb * 8));
8026e22: 8f7b ldrh r3, [r7, #58] @ 0x3a
8026e24: 00db lsls r3, r3, #3
8026e26: b29b uxth r3, r3
8026e28: f8b7 2042 ldrh.w r2, [r7, #66] @ 0x42
8026e2c: 4293 cmp r3, r2
8026e2e: bf28 it cs
8026e30: 4613 movcs r3, r2
8026e32: 857b strh r3, [r7, #42] @ 0x2a
/* When not using a static buffer, create a chain of pbufs.
* The first will be a PBUF_RAM holding the link and IP header.
* The rest will be PBUF_REFs mirroring the pbuf chain to be fragged,
* but limited to the size of an mtu.
*/
rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM);
8026e34: f44f 7220 mov.w r2, #640 @ 0x280
8026e38: 2114 movs r1, #20
8026e3a: 200e movs r0, #14
8026e3c: f7f4 f868 bl 801af10 <pbuf_alloc>
8026e40: 6278 str r0, [r7, #36] @ 0x24
if (rambuf == NULL) {
8026e42: 6a7b ldr r3, [r7, #36] @ 0x24
8026e44: 2b00 cmp r3, #0
8026e46: f000 80d5 beq.w 8026ff4 <ip4_frag+0x264>
goto memerr;
}
LWIP_ASSERT("this needs a pbuf in one piece!",
8026e4a: 6a7b ldr r3, [r7, #36] @ 0x24
8026e4c: 895b ldrh r3, [r3, #10]
8026e4e: 2b13 cmp r3, #19
8026e50: d806 bhi.n 8026e60 <ip4_frag+0xd0>
8026e52: 4b6c ldr r3, [pc, #432] @ (8027004 <ip4_frag+0x274>)
8026e54: f44f 7249 mov.w r2, #804 @ 0x324
8026e58: 496d ldr r1, [pc, #436] @ (8027010 <ip4_frag+0x280>)
8026e5a: 486c ldr r0, [pc, #432] @ (802700c <ip4_frag+0x27c>)
8026e5c: f003 fde6 bl 802aa2c <iprintf>
(rambuf->len >= (IP_HLEN)));
SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN);
8026e60: 6a7b ldr r3, [r7, #36] @ 0x24
8026e62: 685b ldr r3, [r3, #4]
8026e64: 2214 movs r2, #20
8026e66: 6b79 ldr r1, [r7, #52] @ 0x34
8026e68: 4618 mov r0, r3
8026e6a: f004 f868 bl 802af3e <memcpy>
iphdr = (struct ip_hdr *)rambuf->payload;
8026e6e: 6a7b ldr r3, [r7, #36] @ 0x24
8026e70: 685b ldr r3, [r3, #4]
8026e72: 633b str r3, [r7, #48] @ 0x30
left_to_copy = fragsize;
8026e74: 8d7b ldrh r3, [r7, #42] @ 0x2a
8026e76: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
while (left_to_copy) {
8026e7a: e064 b.n 8026f46 <ip4_frag+0x1b6>
struct pbuf_custom_ref *pcr;
u16_t plen = (u16_t)(p->len - poff);
8026e7c: 68fb ldr r3, [r7, #12]
8026e7e: 895a ldrh r2, [r3, #10]
8026e80: 8ffb ldrh r3, [r7, #62] @ 0x3e
8026e82: 1ad3 subs r3, r2, r3
8026e84: 83fb strh r3, [r7, #30]
LWIP_ASSERT("p->len >= poff", p->len >= poff);
8026e86: 68fb ldr r3, [r7, #12]
8026e88: 895b ldrh r3, [r3, #10]
8026e8a: 8ffa ldrh r2, [r7, #62] @ 0x3e
8026e8c: 429a cmp r2, r3
8026e8e: d906 bls.n 8026e9e <ip4_frag+0x10e>
8026e90: 4b5c ldr r3, [pc, #368] @ (8027004 <ip4_frag+0x274>)
8026e92: f240 322d movw r2, #813 @ 0x32d
8026e96: 495f ldr r1, [pc, #380] @ (8027014 <ip4_frag+0x284>)
8026e98: 485c ldr r0, [pc, #368] @ (802700c <ip4_frag+0x27c>)
8026e9a: f003 fdc7 bl 802aa2c <iprintf>
newpbuflen = LWIP_MIN(left_to_copy, plen);
8026e9e: 8bfa ldrh r2, [r7, #30]
8026ea0: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8026ea4: 4293 cmp r3, r2
8026ea6: bf28 it cs
8026ea8: 4613 movcs r3, r2
8026eaa: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
/* Is this pbuf already empty? */
if (!newpbuflen) {
8026eae: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8026eb2: 2b00 cmp r3, #0
8026eb4: d105 bne.n 8026ec2 <ip4_frag+0x132>
poff = 0;
8026eb6: 2300 movs r3, #0
8026eb8: 87fb strh r3, [r7, #62] @ 0x3e
p = p->next;
8026eba: 68fb ldr r3, [r7, #12]
8026ebc: 681b ldr r3, [r3, #0]
8026ebe: 60fb str r3, [r7, #12]
continue;
8026ec0: e041 b.n 8026f46 <ip4_frag+0x1b6>
}
pcr = ip_frag_alloc_pbuf_custom_ref();
8026ec2: f7ff ff0d bl 8026ce0 <ip_frag_alloc_pbuf_custom_ref>
8026ec6: 61b8 str r0, [r7, #24]
if (pcr == NULL) {
8026ec8: 69bb ldr r3, [r7, #24]
8026eca: 2b00 cmp r3, #0
8026ecc: d103 bne.n 8026ed6 <ip4_frag+0x146>
pbuf_free(rambuf);
8026ece: 6a78 ldr r0, [r7, #36] @ 0x24
8026ed0: f7f4 fb34 bl 801b53c <pbuf_free>
goto memerr;
8026ed4: e08f b.n 8026ff6 <ip4_frag+0x266>
}
/* Mirror this pbuf, although we might not need all of it. */
newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
8026ed6: 69b8 ldr r0, [r7, #24]
(u8_t *)p->payload + poff, newpbuflen);
8026ed8: 68fb ldr r3, [r7, #12]
8026eda: 685a ldr r2, [r3, #4]
newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
8026edc: 8ffb ldrh r3, [r7, #62] @ 0x3e
8026ede: 4413 add r3, r2
8026ee0: f8b7 1046 ldrh.w r1, [r7, #70] @ 0x46
8026ee4: f8b7 2046 ldrh.w r2, [r7, #70] @ 0x46
8026ee8: 9201 str r2, [sp, #4]
8026eea: 9300 str r3, [sp, #0]
8026eec: 4603 mov r3, r0
8026eee: 2241 movs r2, #65 @ 0x41
8026ef0: 2000 movs r0, #0
8026ef2: f7f4 f939 bl 801b168 <pbuf_alloced_custom>
8026ef6: 6178 str r0, [r7, #20]
if (newpbuf == NULL) {
8026ef8: 697b ldr r3, [r7, #20]
8026efa: 2b00 cmp r3, #0
8026efc: d106 bne.n 8026f0c <ip4_frag+0x17c>
ip_frag_free_pbuf_custom_ref(pcr);
8026efe: 69b8 ldr r0, [r7, #24]
8026f00: f7ff fef6 bl 8026cf0 <ip_frag_free_pbuf_custom_ref>
pbuf_free(rambuf);
8026f04: 6a78 ldr r0, [r7, #36] @ 0x24
8026f06: f7f4 fb19 bl 801b53c <pbuf_free>
goto memerr;
8026f0a: e074 b.n 8026ff6 <ip4_frag+0x266>
}
pbuf_ref(p);
8026f0c: 68f8 ldr r0, [r7, #12]
8026f0e: f7f4 fbbb bl 801b688 <pbuf_ref>
pcr->original = p;
8026f12: 69bb ldr r3, [r7, #24]
8026f14: 68fa ldr r2, [r7, #12]
8026f16: 615a str r2, [r3, #20]
pcr->pc.custom_free_function = ipfrag_free_pbuf_custom;
8026f18: 69bb ldr r3, [r7, #24]
8026f1a: 4a3f ldr r2, [pc, #252] @ (8027018 <ip4_frag+0x288>)
8026f1c: 611a str r2, [r3, #16]
/* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain
* so that it is removed when pbuf_dechain is later called on rambuf.
*/
pbuf_cat(rambuf, newpbuf);
8026f1e: 6979 ldr r1, [r7, #20]
8026f20: 6a78 ldr r0, [r7, #36] @ 0x24
8026f22: f7f4 fbd9 bl 801b6d8 <pbuf_cat>
left_to_copy = (u16_t)(left_to_copy - newpbuflen);
8026f26: f8b7 2044 ldrh.w r2, [r7, #68] @ 0x44
8026f2a: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8026f2e: 1ad3 subs r3, r2, r3
8026f30: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
if (left_to_copy) {
8026f34: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8026f38: 2b00 cmp r3, #0
8026f3a: d004 beq.n 8026f46 <ip4_frag+0x1b6>
poff = 0;
8026f3c: 2300 movs r3, #0
8026f3e: 87fb strh r3, [r7, #62] @ 0x3e
p = p->next;
8026f40: 68fb ldr r3, [r7, #12]
8026f42: 681b ldr r3, [r3, #0]
8026f44: 60fb str r3, [r7, #12]
while (left_to_copy) {
8026f46: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8026f4a: 2b00 cmp r3, #0
8026f4c: d196 bne.n 8026e7c <ip4_frag+0xec>
}
}
poff = (u16_t)(poff + newpbuflen);
8026f4e: 8ffa ldrh r2, [r7, #62] @ 0x3e
8026f50: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8026f54: 4413 add r3, r2
8026f56: 87fb strh r3, [r7, #62] @ 0x3e
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
/* Correct header */
last = (left <= netif->mtu - IP_HLEN);
8026f58: 68bb ldr r3, [r7, #8]
8026f5a: 8d1b ldrh r3, [r3, #40] @ 0x28
8026f5c: f1a3 0213 sub.w r2, r3, #19
8026f60: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8026f64: 429a cmp r2, r3
8026f66: bfcc ite gt
8026f68: 2301 movgt r3, #1
8026f6a: 2300 movle r3, #0
8026f6c: b2db uxtb r3, r3
8026f6e: 623b str r3, [r7, #32]
/* Set new offset and MF flag */
tmp = (IP_OFFMASK & (ofo));
8026f70: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8026f74: f3c3 030c ubfx r3, r3, #0, #13
8026f78: 87bb strh r3, [r7, #60] @ 0x3c
if (!last || mf_set) {
8026f7a: 6a3b ldr r3, [r7, #32]
8026f7c: 2b00 cmp r3, #0
8026f7e: d002 beq.n 8026f86 <ip4_frag+0x1f6>
8026f80: 6afb ldr r3, [r7, #44] @ 0x2c
8026f82: 2b00 cmp r3, #0
8026f84: d003 beq.n 8026f8e <ip4_frag+0x1fe>
/* the last fragment has MF set if the input frame had it */
tmp = tmp | IP_MF;
8026f86: 8fbb ldrh r3, [r7, #60] @ 0x3c
8026f88: f443 5300 orr.w r3, r3, #8192 @ 0x2000
8026f8c: 87bb strh r3, [r7, #60] @ 0x3c
}
IPH_OFFSET_SET(iphdr, lwip_htons(tmp));
8026f8e: 8fbb ldrh r3, [r7, #60] @ 0x3c
8026f90: 4618 mov r0, r3
8026f92: f7f2 fdf1 bl 8019b78 <lwip_htons>
8026f96: 4603 mov r3, r0
8026f98: 461a mov r2, r3
8026f9a: 6b3b ldr r3, [r7, #48] @ 0x30
8026f9c: 80da strh r2, [r3, #6]
IPH_LEN_SET(iphdr, lwip_htons((u16_t)(fragsize + IP_HLEN)));
8026f9e: 8d7b ldrh r3, [r7, #42] @ 0x2a
8026fa0: 3314 adds r3, #20
8026fa2: b29b uxth r3, r3
8026fa4: 4618 mov r0, r3
8026fa6: f7f2 fde7 bl 8019b78 <lwip_htons>
8026faa: 4603 mov r3, r0
8026fac: 461a mov r2, r3
8026fae: 6b3b ldr r3, [r7, #48] @ 0x30
8026fb0: 805a strh r2, [r3, #2]
IPH_CHKSUM_SET(iphdr, 0);
8026fb2: 6b3b ldr r3, [r7, #48] @ 0x30
8026fb4: 2200 movs r2, #0
8026fb6: 729a strb r2, [r3, #10]
8026fb8: 2200 movs r2, #0
8026fba: 72da strb r2, [r3, #11]
#endif /* CHECKSUM_GEN_IP */
/* No need for separate header pbuf - we allowed room for it in rambuf
* when allocated.
*/
netif->output(netif, rambuf, dest);
8026fbc: 68bb ldr r3, [r7, #8]
8026fbe: 695b ldr r3, [r3, #20]
8026fc0: 687a ldr r2, [r7, #4]
8026fc2: 6a79 ldr r1, [r7, #36] @ 0x24
8026fc4: 68b8 ldr r0, [r7, #8]
8026fc6: 4798 blx r3
* recreate it next time round the loop. If we're lucky the hardware
* will have already sent the packet, the free will really free, and
* there will be zero memory penalty.
*/
pbuf_free(rambuf);
8026fc8: 6a78 ldr r0, [r7, #36] @ 0x24
8026fca: f7f4 fab7 bl 801b53c <pbuf_free>
left = (u16_t)(left - fragsize);
8026fce: f8b7 2042 ldrh.w r2, [r7, #66] @ 0x42
8026fd2: 8d7b ldrh r3, [r7, #42] @ 0x2a
8026fd4: 1ad3 subs r3, r2, r3
8026fd6: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
ofo = (u16_t)(ofo + nfb);
8026fda: f8b7 2040 ldrh.w r2, [r7, #64] @ 0x40
8026fde: 8f7b ldrh r3, [r7, #58] @ 0x3a
8026fe0: 4413 add r3, r2
8026fe2: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
while (left) {
8026fe6: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8026fea: 2b00 cmp r3, #0
8026fec: f47f af19 bne.w 8026e22 <ip4_frag+0x92>
}
MIB2_STATS_INC(mib2.ipfragoks);
return ERR_OK;
8026ff0: 2300 movs r3, #0
8026ff2: e002 b.n 8026ffa <ip4_frag+0x26a>
goto memerr;
8026ff4: bf00 nop
memerr:
MIB2_STATS_INC(mib2.ipfragfails);
return ERR_MEM;
8026ff6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
8026ffa: 4618 mov r0, r3
8026ffc: 3748 adds r7, #72 @ 0x48
8026ffe: 46bd mov sp, r7
8027000: bd80 pop {r7, pc}
8027002: bf00 nop
8027004: 080318b4 .word 0x080318b4
8027008: 08031a90 .word 0x08031a90
802700c: 080318fc .word 0x080318fc
8027010: 08031aac .word 0x08031aac
8027014: 08031acc .word 0x08031acc
8027018: 08026d29 .word 0x08026d29
0802701c <ethernet_input>:
* @see ETHARP_SUPPORT_VLAN
* @see LWIP_HOOK_VLAN_CHECK
*/
err_t
ethernet_input(struct pbuf *p, struct netif *netif)
{
802701c: b580 push {r7, lr}
802701e: b086 sub sp, #24
8027020: af00 add r7, sp, #0
8027022: 6078 str r0, [r7, #4]
8027024: 6039 str r1, [r7, #0]
struct eth_hdr *ethhdr;
u16_t type;
#if LWIP_ARP || ETHARP_SUPPORT_VLAN || LWIP_IPV6
u16_t next_hdr_offset = SIZEOF_ETH_HDR;
8027026: 230e movs r3, #14
8027028: 82fb strh r3, [r7, #22]
#endif /* LWIP_ARP || ETHARP_SUPPORT_VLAN */
LWIP_ASSERT_CORE_LOCKED();
802702a: f7ea f8d3 bl 80111d4 <sys_check_core_locking>
if (p->len <= SIZEOF_ETH_HDR) {
802702e: 687b ldr r3, [r7, #4]
8027030: 895b ldrh r3, [r3, #10]
8027032: 2b0e cmp r3, #14
8027034: d96e bls.n 8027114 <ethernet_input+0xf8>
ETHARP_STATS_INC(etharp.drop);
MIB2_STATS_NETIF_INC(netif, ifinerrors);
goto free_and_return;
}
if (p->if_idx == NETIF_NO_INDEX) {
8027036: 687b ldr r3, [r7, #4]
8027038: 7bdb ldrb r3, [r3, #15]
802703a: 2b00 cmp r3, #0
802703c: d106 bne.n 802704c <ethernet_input+0x30>
p->if_idx = netif_get_index(netif);
802703e: 683b ldr r3, [r7, #0]
8027040: f893 3034 ldrb.w r3, [r3, #52] @ 0x34
8027044: 3301 adds r3, #1
8027046: b2da uxtb r2, r3
8027048: 687b ldr r3, [r7, #4]
802704a: 73da strb r2, [r3, #15]
}
/* points to packet payload, which starts with an Ethernet header */
ethhdr = (struct eth_hdr *)p->payload;
802704c: 687b ldr r3, [r7, #4]
802704e: 685b ldr r3, [r3, #4]
8027050: 613b str r3, [r7, #16]
(unsigned char)ethhdr->dest.addr[3], (unsigned char)ethhdr->dest.addr[4], (unsigned char)ethhdr->dest.addr[5],
(unsigned char)ethhdr->src.addr[0], (unsigned char)ethhdr->src.addr[1], (unsigned char)ethhdr->src.addr[2],
(unsigned char)ethhdr->src.addr[3], (unsigned char)ethhdr->src.addr[4], (unsigned char)ethhdr->src.addr[5],
lwip_htons(ethhdr->type)));
type = ethhdr->type;
8027052: 693b ldr r3, [r7, #16]
8027054: 7b1a ldrb r2, [r3, #12]
8027056: 7b5b ldrb r3, [r3, #13]
8027058: 021b lsls r3, r3, #8
802705a: 4313 orrs r3, r2
802705c: 81fb strh r3, [r7, #14]
#if LWIP_ARP_FILTER_NETIF
netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, lwip_htons(type));
#endif /* LWIP_ARP_FILTER_NETIF*/
if (ethhdr->dest.addr[0] & 1) {
802705e: 693b ldr r3, [r7, #16]
8027060: 781b ldrb r3, [r3, #0]
8027062: f003 0301 and.w r3, r3, #1
8027066: 2b00 cmp r3, #0
8027068: d023 beq.n 80270b2 <ethernet_input+0x96>
/* this might be a multicast or broadcast packet */
if (ethhdr->dest.addr[0] == LL_IP4_MULTICAST_ADDR_0) {
802706a: 693b ldr r3, [r7, #16]
802706c: 781b ldrb r3, [r3, #0]
802706e: 2b01 cmp r3, #1
8027070: d10f bne.n 8027092 <ethernet_input+0x76>
#if LWIP_IPV4
if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
8027072: 693b ldr r3, [r7, #16]
8027074: 785b ldrb r3, [r3, #1]
8027076: 2b00 cmp r3, #0
8027078: d11b bne.n 80270b2 <ethernet_input+0x96>
(ethhdr->dest.addr[2] == LL_IP4_MULTICAST_ADDR_2)) {
802707a: 693b ldr r3, [r7, #16]
802707c: 789b ldrb r3, [r3, #2]
if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
802707e: 2b5e cmp r3, #94 @ 0x5e
8027080: d117 bne.n 80270b2 <ethernet_input+0x96>
/* mark the pbuf as link-layer multicast */
p->flags |= PBUF_FLAG_LLMCAST;
8027082: 687b ldr r3, [r7, #4]
8027084: 7b5b ldrb r3, [r3, #13]
8027086: f043 0310 orr.w r3, r3, #16
802708a: b2da uxtb r2, r3
802708c: 687b ldr r3, [r7, #4]
802708e: 735a strb r2, [r3, #13]
8027090: e00f b.n 80270b2 <ethernet_input+0x96>
(ethhdr->dest.addr[1] == LL_IP6_MULTICAST_ADDR_1)) {
/* mark the pbuf as link-layer multicast */
p->flags |= PBUF_FLAG_LLMCAST;
}
#endif /* LWIP_IPV6 */
else if (eth_addr_cmp(ðhdr->dest, ðbroadcast)) {
8027092: 693b ldr r3, [r7, #16]
8027094: 2206 movs r2, #6
8027096: 4928 ldr r1, [pc, #160] @ (8027138 <ethernet_input+0x11c>)
8027098: 4618 mov r0, r3
802709a: f003 fe2f bl 802acfc <memcmp>
802709e: 4603 mov r3, r0
80270a0: 2b00 cmp r3, #0
80270a2: d106 bne.n 80270b2 <ethernet_input+0x96>
/* mark the pbuf as link-layer broadcast */
p->flags |= PBUF_FLAG_LLBCAST;
80270a4: 687b ldr r3, [r7, #4]
80270a6: 7b5b ldrb r3, [r3, #13]
80270a8: f043 0308 orr.w r3, r3, #8
80270ac: b2da uxtb r2, r3
80270ae: 687b ldr r3, [r7, #4]
80270b0: 735a strb r2, [r3, #13]
}
}
switch (type) {
80270b2: 89fb ldrh r3, [r7, #14]
80270b4: 2b08 cmp r3, #8
80270b6: d003 beq.n 80270c0 <ethernet_input+0xa4>
80270b8: f5b3 6fc1 cmp.w r3, #1544 @ 0x608
80270bc: d014 beq.n 80270e8 <ethernet_input+0xcc>
}
#endif
ETHARP_STATS_INC(etharp.proterr);
ETHARP_STATS_INC(etharp.drop);
MIB2_STATS_NETIF_INC(netif, ifinunknownprotos);
goto free_and_return;
80270be: e032 b.n 8027126 <ethernet_input+0x10a>
if (!(netif->flags & NETIF_FLAG_ETHARP)) {
80270c0: 683b ldr r3, [r7, #0]
80270c2: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
80270c6: f003 0308 and.w r3, r3, #8
80270ca: 2b00 cmp r3, #0
80270cc: d024 beq.n 8027118 <ethernet_input+0xfc>
if (pbuf_remove_header(p, next_hdr_offset)) {
80270ce: 8afb ldrh r3, [r7, #22]
80270d0: 4619 mov r1, r3
80270d2: 6878 ldr r0, [r7, #4]
80270d4: f7f4 f97a bl 801b3cc <pbuf_remove_header>
80270d8: 4603 mov r3, r0
80270da: 2b00 cmp r3, #0
80270dc: d11e bne.n 802711c <ethernet_input+0x100>
ip4_input(p, netif);
80270de: 6839 ldr r1, [r7, #0]
80270e0: 6878 ldr r0, [r7, #4]
80270e2: f7fe fd2f bl 8025b44 <ip4_input>
break;
80270e6: e013 b.n 8027110 <ethernet_input+0xf4>
if (!(netif->flags & NETIF_FLAG_ETHARP)) {
80270e8: 683b ldr r3, [r7, #0]
80270ea: f893 3031 ldrb.w r3, [r3, #49] @ 0x31
80270ee: f003 0308 and.w r3, r3, #8
80270f2: 2b00 cmp r3, #0
80270f4: d014 beq.n 8027120 <ethernet_input+0x104>
if (pbuf_remove_header(p, next_hdr_offset)) {
80270f6: 8afb ldrh r3, [r7, #22]
80270f8: 4619 mov r1, r3
80270fa: 6878 ldr r0, [r7, #4]
80270fc: f7f4 f966 bl 801b3cc <pbuf_remove_header>
8027100: 4603 mov r3, r0
8027102: 2b00 cmp r3, #0
8027104: d10e bne.n 8027124 <ethernet_input+0x108>
etharp_input(p, netif);
8027106: 6839 ldr r1, [r7, #0]
8027108: 6878 ldr r0, [r7, #4]
802710a: f7fd fe9d bl 8024e48 <etharp_input>
break;
802710e: bf00 nop
}
/* This means the pbuf is freed or consumed,
so the caller doesn't have to free it again */
return ERR_OK;
8027110: 2300 movs r3, #0
8027112: e00c b.n 802712e <ethernet_input+0x112>
goto free_and_return;
8027114: bf00 nop
8027116: e006 b.n 8027126 <ethernet_input+0x10a>
goto free_and_return;
8027118: bf00 nop
802711a: e004 b.n 8027126 <ethernet_input+0x10a>
goto free_and_return;
802711c: bf00 nop
802711e: e002 b.n 8027126 <ethernet_input+0x10a>
goto free_and_return;
8027120: bf00 nop
8027122: e000 b.n 8027126 <ethernet_input+0x10a>
goto free_and_return;
8027124: bf00 nop
free_and_return:
pbuf_free(p);
8027126: 6878 ldr r0, [r7, #4]
8027128: f7f4 fa08 bl 801b53c <pbuf_free>
return ERR_OK;
802712c: 2300 movs r3, #0
}
802712e: 4618 mov r0, r3
8027130: 3718 adds r7, #24
8027132: 46bd mov sp, r7
8027134: bd80 pop {r7, pc}
8027136: bf00 nop
8027138: 08031ed0 .word 0x08031ed0
0802713c <ethernet_output>:
* @return ERR_OK if the packet was sent, any other err_t on failure
*/
err_t
ethernet_output(struct netif * netif, struct pbuf * p,
const struct eth_addr * src, const struct eth_addr * dst,
u16_t eth_type) {
802713c: b580 push {r7, lr}
802713e: b086 sub sp, #24
8027140: af00 add r7, sp, #0
8027142: 60f8 str r0, [r7, #12]
8027144: 60b9 str r1, [r7, #8]
8027146: 607a str r2, [r7, #4]
8027148: 603b str r3, [r7, #0]
struct eth_hdr *ethhdr;
u16_t eth_type_be = lwip_htons(eth_type);
802714a: 8c3b ldrh r3, [r7, #32]
802714c: 4618 mov r0, r3
802714e: f7f2 fd13 bl 8019b78 <lwip_htons>
8027152: 4603 mov r3, r0
8027154: 82fb strh r3, [r7, #22]
eth_type_be = PP_HTONS(ETHTYPE_VLAN);
} else
#endif /* ETHARP_SUPPORT_VLAN && defined(LWIP_HOOK_VLAN_SET) */
{
if (pbuf_add_header(p, SIZEOF_ETH_HDR) != 0) {
8027156: 210e movs r1, #14
8027158: 68b8 ldr r0, [r7, #8]
802715a: f7f4 f927 bl 801b3ac <pbuf_add_header>
802715e: 4603 mov r3, r0
8027160: 2b00 cmp r3, #0
8027162: d127 bne.n 80271b4 <ethernet_output+0x78>
goto pbuf_header_failed;
}
}
LWIP_ASSERT_CORE_LOCKED();
8027164: f7ea f836 bl 80111d4 <sys_check_core_locking>
ethhdr = (struct eth_hdr *)p->payload;
8027168: 68bb ldr r3, [r7, #8]
802716a: 685b ldr r3, [r3, #4]
802716c: 613b str r3, [r7, #16]
ethhdr->type = eth_type_be;
802716e: 693b ldr r3, [r7, #16]
8027170: 8afa ldrh r2, [r7, #22]
8027172: 819a strh r2, [r3, #12]
SMEMCPY(ðhdr->dest, dst, ETH_HWADDR_LEN);
8027174: 693b ldr r3, [r7, #16]
8027176: 2206 movs r2, #6
8027178: 6839 ldr r1, [r7, #0]
802717a: 4618 mov r0, r3
802717c: f003 fedf bl 802af3e <memcpy>
SMEMCPY(ðhdr->src, src, ETH_HWADDR_LEN);
8027180: 693b ldr r3, [r7, #16]
8027182: 3306 adds r3, #6
8027184: 2206 movs r2, #6
8027186: 6879 ldr r1, [r7, #4]
8027188: 4618 mov r0, r3
802718a: f003 fed8 bl 802af3e <memcpy>
LWIP_ASSERT("netif->hwaddr_len must be 6 for ethernet_output!",
802718e: 68fb ldr r3, [r7, #12]
8027190: f893 3030 ldrb.w r3, [r3, #48] @ 0x30
8027194: 2b06 cmp r3, #6
8027196: d006 beq.n 80271a6 <ethernet_output+0x6a>
8027198: 4b0a ldr r3, [pc, #40] @ (80271c4 <ethernet_output+0x88>)
802719a: f44f 7299 mov.w r2, #306 @ 0x132
802719e: 490a ldr r1, [pc, #40] @ (80271c8 <ethernet_output+0x8c>)
80271a0: 480a ldr r0, [pc, #40] @ (80271cc <ethernet_output+0x90>)
80271a2: f003 fc43 bl 802aa2c <iprintf>
(netif->hwaddr_len == ETH_HWADDR_LEN));
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE,
("ethernet_output: sending packet %p\n", (void *)p));
/* send the packet */
return netif->linkoutput(netif, p);
80271a6: 68fb ldr r3, [r7, #12]
80271a8: 699b ldr r3, [r3, #24]
80271aa: 68b9 ldr r1, [r7, #8]
80271ac: 68f8 ldr r0, [r7, #12]
80271ae: 4798 blx r3
80271b0: 4603 mov r3, r0
80271b2: e002 b.n 80271ba <ethernet_output+0x7e>
goto pbuf_header_failed;
80271b4: bf00 nop
pbuf_header_failed:
LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
("ethernet_output: could not allocate room for header.\n"));
LINK_STATS_INC(link.lenerr);
return ERR_BUF;
80271b6: f06f 0301 mvn.w r3, #1
}
80271ba: 4618 mov r0, r3
80271bc: 3718 adds r7, #24
80271be: 46bd mov sp, r7
80271c0: bd80 pop {r7, pc}
80271c2: bf00 nop
80271c4: 08031adc .word 0x08031adc
80271c8: 08031b14 .word 0x08031b14
80271cc: 08031b48 .word 0x08031b48
080271d0 <sys_mbox_new>:
#endif
/*-----------------------------------------------------------------------------------*/
// Creates an empty mailbox.
err_t sys_mbox_new(sys_mbox_t *mbox, int size)
{
80271d0: b580 push {r7, lr}
80271d2: b082 sub sp, #8
80271d4: af00 add r7, sp, #0
80271d6: 6078 str r0, [r7, #4]
80271d8: 6039 str r1, [r7, #0]
#if (osCMSIS < 0x20000U)
osMessageQDef(QUEUE, size, void *);
*mbox = osMessageCreate(osMessageQ(QUEUE), NULL);
#else
*mbox = osMessageQueueNew(size, sizeof(void *), NULL);
80271da: 683b ldr r3, [r7, #0]
80271dc: 2200 movs r2, #0
80271de: 2104 movs r1, #4
80271e0: 4618 mov r0, r3
80271e2: f7ea fd83 bl 8011cec <osMessageQueueNew>
80271e6: 4602 mov r2, r0
80271e8: 687b ldr r3, [r7, #4]
80271ea: 601a str r2, [r3, #0]
if(lwip_stats.sys.mbox.max < lwip_stats.sys.mbox.used)
{
lwip_stats.sys.mbox.max = lwip_stats.sys.mbox.used;
}
#endif /* SYS_STATS */
if(*mbox == NULL)
80271ec: 687b ldr r3, [r7, #4]
80271ee: 681b ldr r3, [r3, #0]
80271f0: 2b00 cmp r3, #0
80271f2: d102 bne.n 80271fa <sys_mbox_new+0x2a>
return ERR_MEM;
80271f4: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80271f8: e000 b.n 80271fc <sys_mbox_new+0x2c>
return ERR_OK;
80271fa: 2300 movs r3, #0
}
80271fc: 4618 mov r0, r3
80271fe: 3708 adds r7, #8
8027200: 46bd mov sp, r7
8027202: bd80 pop {r7, pc}
08027204 <sys_mbox_free>:
Deallocates a mailbox. If there are messages still present in the
mailbox when the mailbox is deallocated, it is an indication of a
programming error in lwIP and the developer should be notified.
*/
void sys_mbox_free(sys_mbox_t *mbox)
{
8027204: b580 push {r7, lr}
8027206: b082 sub sp, #8
8027208: af00 add r7, sp, #0
802720a: 6078 str r0, [r7, #4]
#if (osCMSIS < 0x20000U)
if(osMessageWaiting(*mbox))
#else
if(osMessageQueueGetCount(*mbox))
802720c: 687b ldr r3, [r7, #4]
802720e: 681b ldr r3, [r3, #0]
8027210: 4618 mov r0, r3
8027212: f7ea fe9d bl 8011f50 <osMessageQueueGetCount>
}
#if (osCMSIS < 0x20000U)
osMessageDelete(*mbox);
#else
osMessageQueueDelete(*mbox);
8027216: 687b ldr r3, [r7, #4]
8027218: 681b ldr r3, [r3, #0]
802721a: 4618 mov r0, r3
802721c: f7ea feb8 bl 8011f90 <osMessageQueueDelete>
#endif
#if SYS_STATS
--lwip_stats.sys.mbox.used;
#endif /* SYS_STATS */
}
8027220: bf00 nop
8027222: 3708 adds r7, #8
8027224: 46bd mov sp, r7
8027226: bd80 pop {r7, pc}
08027228 <sys_mbox_trypost>:
/*-----------------------------------------------------------------------------------*/
// Try to post the "msg" to the mailbox.
err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg)
{
8027228: b580 push {r7, lr}
802722a: b084 sub sp, #16
802722c: af00 add r7, sp, #0
802722e: 6078 str r0, [r7, #4]
8027230: 6039 str r1, [r7, #0]
err_t result;
#if (osCMSIS < 0x20000U)
if(osMessagePut(*mbox, (uint32_t)msg, 0) == osOK)
#else
if(osMessageQueuePut(*mbox, &msg, 0, 0) == osOK)
8027232: 687b ldr r3, [r7, #4]
8027234: 6818 ldr r0, [r3, #0]
8027236: 4639 mov r1, r7
8027238: 2300 movs r3, #0
802723a: 2200 movs r2, #0
802723c: f7ea fdca bl 8011dd4 <osMessageQueuePut>
8027240: 4603 mov r3, r0
8027242: 2b00 cmp r3, #0
8027244: d102 bne.n 802724c <sys_mbox_trypost+0x24>
#endif
{
result = ERR_OK;
8027246: 2300 movs r3, #0
8027248: 73fb strb r3, [r7, #15]
802724a: e001 b.n 8027250 <sys_mbox_trypost+0x28>
}
else
{
// could not post, queue must be full
result = ERR_MEM;
802724c: 23ff movs r3, #255 @ 0xff
802724e: 73fb strb r3, [r7, #15]
#if SYS_STATS
lwip_stats.sys.mbox.err++;
#endif /* SYS_STATS */
}
return result;
8027250: f997 300f ldrsb.w r3, [r7, #15]
}
8027254: 4618 mov r0, r3
8027256: 3710 adds r7, #16
8027258: 46bd mov sp, r7
802725a: bd80 pop {r7, pc}
0802725c <sys_arch_mbox_fetch>:
Note that a function with a similar name, sys_mbox_fetch(), is
implemented by lwIP.
*/
u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout)
{
802725c: b580 push {r7, lr}
802725e: b086 sub sp, #24
8027260: af00 add r7, sp, #0
8027262: 60f8 str r0, [r7, #12]
8027264: 60b9 str r1, [r7, #8]
8027266: 607a str r2, [r7, #4]
#if (osCMSIS < 0x20000U)
osEvent event;
uint32_t starttime = osKernelSysTick();
#else
osStatus_t status;
uint32_t starttime = osKernelGetTickCount();
8027268: f7ea f92a bl 80114c0 <osKernelGetTickCount>
802726c: 6178 str r0, [r7, #20]
#endif
if(timeout != 0)
802726e: 687b ldr r3, [r7, #4]
8027270: 2b00 cmp r3, #0
8027272: d013 beq.n 802729c <sys_arch_mbox_fetch+0x40>
{
*msg = (void *)event.value.v;
return (osKernelSysTick() - starttime);
}
#else
status = osMessageQueueGet(*mbox, msg, 0, timeout);
8027274: 68fb ldr r3, [r7, #12]
8027276: 6818 ldr r0, [r3, #0]
8027278: 687b ldr r3, [r7, #4]
802727a: 2200 movs r2, #0
802727c: 68b9 ldr r1, [r7, #8]
802727e: f7ea fe09 bl 8011e94 <osMessageQueueGet>
8027282: 6138 str r0, [r7, #16]
if (status == osOK)
8027284: 693b ldr r3, [r7, #16]
8027286: 2b00 cmp r3, #0
8027288: d105 bne.n 8027296 <sys_arch_mbox_fetch+0x3a>
{
return (osKernelGetTickCount() - starttime);
802728a: f7ea f919 bl 80114c0 <osKernelGetTickCount>
802728e: 4602 mov r2, r0
8027290: 697b ldr r3, [r7, #20]
8027292: 1ad3 subs r3, r2, r3
8027294: e00f b.n 80272b6 <sys_arch_mbox_fetch+0x5a>
}
#endif
else
{
return SYS_ARCH_TIMEOUT;
8027296: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802729a: e00c b.n 80272b6 <sys_arch_mbox_fetch+0x5a>
#if (osCMSIS < 0x20000U)
event = osMessageGet (*mbox, osWaitForever);
*msg = (void *)event.value.v;
return (osKernelSysTick() - starttime);
#else
osMessageQueueGet(*mbox, msg, 0, osWaitForever );
802729c: 68fb ldr r3, [r7, #12]
802729e: 6818 ldr r0, [r3, #0]
80272a0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80272a4: 2200 movs r2, #0
80272a6: 68b9 ldr r1, [r7, #8]
80272a8: f7ea fdf4 bl 8011e94 <osMessageQueueGet>
return (osKernelGetTickCount() - starttime);
80272ac: f7ea f908 bl 80114c0 <osKernelGetTickCount>
80272b0: 4602 mov r2, r0
80272b2: 697b ldr r3, [r7, #20]
80272b4: 1ad3 subs r3, r2, r3
#endif
}
}
80272b6: 4618 mov r0, r3
80272b8: 3718 adds r7, #24
80272ba: 46bd mov sp, r7
80272bc: bd80 pop {r7, pc}
080272be <sys_arch_mbox_tryfetch>:
/*
Similar to sys_arch_mbox_fetch, but if message is not ready immediately, we'll
return with SYS_MBOX_EMPTY. On success, 0 is returned.
*/
u32_t sys_arch_mbox_tryfetch(sys_mbox_t *mbox, void **msg)
{
80272be: b580 push {r7, lr}
80272c0: b082 sub sp, #8
80272c2: af00 add r7, sp, #0
80272c4: 6078 str r0, [r7, #4]
80272c6: 6039 str r1, [r7, #0]
if(event.status == osEventMessage)
{
*msg = (void *)event.value.v;
#else
if (osMessageQueueGet(*mbox, msg, 0, 0) == osOK)
80272c8: 687b ldr r3, [r7, #4]
80272ca: 6818 ldr r0, [r3, #0]
80272cc: 2300 movs r3, #0
80272ce: 2200 movs r2, #0
80272d0: 6839 ldr r1, [r7, #0]
80272d2: f7ea fddf bl 8011e94 <osMessageQueueGet>
80272d6: 4603 mov r3, r0
80272d8: 2b00 cmp r3, #0
80272da: d101 bne.n 80272e0 <sys_arch_mbox_tryfetch+0x22>
{
#endif
return ERR_OK;
80272dc: 2300 movs r3, #0
80272de: e001 b.n 80272e4 <sys_arch_mbox_tryfetch+0x26>
}
else
{
return SYS_MBOX_EMPTY;
80272e0: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
}
}
80272e4: 4618 mov r0, r3
80272e6: 3708 adds r7, #8
80272e8: 46bd mov sp, r7
80272ea: bd80 pop {r7, pc}
080272ec <sys_mbox_valid>:
/*----------------------------------------------------------------------------------*/
int sys_mbox_valid(sys_mbox_t *mbox)
{
80272ec: b480 push {r7}
80272ee: b083 sub sp, #12
80272f0: af00 add r7, sp, #0
80272f2: 6078 str r0, [r7, #4]
if (*mbox == SYS_MBOX_NULL)
80272f4: 687b ldr r3, [r7, #4]
80272f6: 681b ldr r3, [r3, #0]
80272f8: 2b00 cmp r3, #0
80272fa: d101 bne.n 8027300 <sys_mbox_valid+0x14>
return 0;
80272fc: 2300 movs r3, #0
80272fe: e000 b.n 8027302 <sys_mbox_valid+0x16>
else
return 1;
8027300: 2301 movs r3, #1
}
8027302: 4618 mov r0, r3
8027304: 370c adds r7, #12
8027306: 46bd mov sp, r7
8027308: f85d 7b04 ldr.w r7, [sp], #4
802730c: 4770 bx lr
0802730e <sys_mbox_set_invalid>:
/*-----------------------------------------------------------------------------------*/
void sys_mbox_set_invalid(sys_mbox_t *mbox)
{
802730e: b480 push {r7}
8027310: b083 sub sp, #12
8027312: af00 add r7, sp, #0
8027314: 6078 str r0, [r7, #4]
*mbox = SYS_MBOX_NULL;
8027316: 687b ldr r3, [r7, #4]
8027318: 2200 movs r2, #0
802731a: 601a str r2, [r3, #0]
}
802731c: bf00 nop
802731e: 370c adds r7, #12
8027320: 46bd mov sp, r7
8027322: f85d 7b04 ldr.w r7, [sp], #4
8027326: 4770 bx lr
08027328 <sys_sem_new>:
/*-----------------------------------------------------------------------------------*/
// Creates a new semaphore. The "count" argument specifies
// the initial state of the semaphore.
err_t sys_sem_new(sys_sem_t *sem, u8_t count)
{
8027328: b580 push {r7, lr}
802732a: b082 sub sp, #8
802732c: af00 add r7, sp, #0
802732e: 6078 str r0, [r7, #4]
8027330: 460b mov r3, r1
8027332: 70fb strb r3, [r7, #3]
#if (osCMSIS < 0x20000U)
osSemaphoreDef(SEM);
*sem = osSemaphoreCreate (osSemaphore(SEM), 1);
#else
*sem = osSemaphoreNew(UINT16_MAX, count, NULL);
8027334: 78fb ldrb r3, [r7, #3]
8027336: 2200 movs r2, #0
8027338: 4619 mov r1, r3
802733a: f64f 70ff movw r0, #65535 @ 0xffff
802733e: f7ea fb92 bl 8011a66 <osSemaphoreNew>
8027342: 4602 mov r2, r0
8027344: 687b ldr r3, [r7, #4]
8027346: 601a str r2, [r3, #0]
#endif
if(*sem == NULL)
8027348: 687b ldr r3, [r7, #4]
802734a: 681b ldr r3, [r3, #0]
802734c: 2b00 cmp r3, #0
802734e: d102 bne.n 8027356 <sys_sem_new+0x2e>
{
#if SYS_STATS
++lwip_stats.sys.sem.err;
#endif /* SYS_STATS */
return ERR_MEM;
8027350: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027354: e009 b.n 802736a <sys_sem_new+0x42>
}
if(count == 0) // Means it can't be taken
8027356: 78fb ldrb r3, [r7, #3]
8027358: 2b00 cmp r3, #0
802735a: d105 bne.n 8027368 <sys_sem_new+0x40>
{
#if (osCMSIS < 0x20000U)
osSemaphoreWait(*sem, 0);
#else
osSemaphoreAcquire(*sem, 0);
802735c: 687b ldr r3, [r7, #4]
802735e: 681b ldr r3, [r3, #0]
8027360: 2100 movs r1, #0
8027362: 4618 mov r0, r3
8027364: f7ea fc08 bl 8011b78 <osSemaphoreAcquire>
if (lwip_stats.sys.sem.max < lwip_stats.sys.sem.used) {
lwip_stats.sys.sem.max = lwip_stats.sys.sem.used;
}
#endif /* SYS_STATS */
return ERR_OK;
8027368: 2300 movs r3, #0
}
802736a: 4618 mov r0, r3
802736c: 3708 adds r7, #8
802736e: 46bd mov sp, r7
8027370: bd80 pop {r7, pc}
08027372 <sys_arch_sem_wait>:
Notice that lwIP implements a function with a similar name,
sys_sem_wait(), that uses the sys_arch_sem_wait() function.
*/
u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout)
{
8027372: b580 push {r7, lr}
8027374: b084 sub sp, #16
8027376: af00 add r7, sp, #0
8027378: 6078 str r0, [r7, #4]
802737a: 6039 str r1, [r7, #0]
#if (osCMSIS < 0x20000U)
uint32_t starttime = osKernelSysTick();
#else
uint32_t starttime = osKernelGetTickCount();
802737c: f7ea f8a0 bl 80114c0 <osKernelGetTickCount>
8027380: 60f8 str r0, [r7, #12]
#endif
if(timeout != 0)
8027382: 683b ldr r3, [r7, #0]
8027384: 2b00 cmp r3, #0
8027386: d011 beq.n 80273ac <sys_arch_sem_wait+0x3a>
#if (osCMSIS < 0x20000U)
if(osSemaphoreWait (*sem, timeout) == osOK)
{
return (osKernelSysTick() - starttime);
#else
if(osSemaphoreAcquire(*sem, timeout) == osOK)
8027388: 687b ldr r3, [r7, #4]
802738a: 681b ldr r3, [r3, #0]
802738c: 6839 ldr r1, [r7, #0]
802738e: 4618 mov r0, r3
8027390: f7ea fbf2 bl 8011b78 <osSemaphoreAcquire>
8027394: 4603 mov r3, r0
8027396: 2b00 cmp r3, #0
8027398: d105 bne.n 80273a6 <sys_arch_sem_wait+0x34>
{
return (osKernelGetTickCount() - starttime);
802739a: f7ea f891 bl 80114c0 <osKernelGetTickCount>
802739e: 4602 mov r2, r0
80273a0: 68fb ldr r3, [r7, #12]
80273a2: 1ad3 subs r3, r2, r3
80273a4: e012 b.n 80273cc <sys_arch_sem_wait+0x5a>
#endif
}
else
{
return SYS_ARCH_TIMEOUT;
80273a6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80273aa: e00f b.n 80273cc <sys_arch_sem_wait+0x5a>
{
#if (osCMSIS < 0x20000U)
while(osSemaphoreWait (*sem, osWaitForever) != osOK);
return (osKernelSysTick() - starttime);
#else
while(osSemaphoreAcquire(*sem, osWaitForever) != osOK);
80273ac: bf00 nop
80273ae: 687b ldr r3, [r7, #4]
80273b0: 681b ldr r3, [r3, #0]
80273b2: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
80273b6: 4618 mov r0, r3
80273b8: f7ea fbde bl 8011b78 <osSemaphoreAcquire>
80273bc: 4603 mov r3, r0
80273be: 2b00 cmp r3, #0
80273c0: d1f5 bne.n 80273ae <sys_arch_sem_wait+0x3c>
return (osKernelGetTickCount() - starttime);
80273c2: f7ea f87d bl 80114c0 <osKernelGetTickCount>
80273c6: 4602 mov r2, r0
80273c8: 68fb ldr r3, [r7, #12]
80273ca: 1ad3 subs r3, r2, r3
#endif
}
}
80273cc: 4618 mov r0, r3
80273ce: 3710 adds r7, #16
80273d0: 46bd mov sp, r7
80273d2: bd80 pop {r7, pc}
080273d4 <sys_sem_signal>:
/*-----------------------------------------------------------------------------------*/
// Signals a semaphore
void sys_sem_signal(sys_sem_t *sem)
{
80273d4: b580 push {r7, lr}
80273d6: b082 sub sp, #8
80273d8: af00 add r7, sp, #0
80273da: 6078 str r0, [r7, #4]
osSemaphoreRelease(*sem);
80273dc: 687b ldr r3, [r7, #4]
80273de: 681b ldr r3, [r3, #0]
80273e0: 4618 mov r0, r3
80273e2: f7ea fc1b bl 8011c1c <osSemaphoreRelease>
}
80273e6: bf00 nop
80273e8: 3708 adds r7, #8
80273ea: 46bd mov sp, r7
80273ec: bd80 pop {r7, pc}
080273ee <sys_sem_free>:
/*-----------------------------------------------------------------------------------*/
// Deallocates a semaphore
void sys_sem_free(sys_sem_t *sem)
{
80273ee: b580 push {r7, lr}
80273f0: b082 sub sp, #8
80273f2: af00 add r7, sp, #0
80273f4: 6078 str r0, [r7, #4]
#if SYS_STATS
--lwip_stats.sys.sem.used;
#endif /* SYS_STATS */
osSemaphoreDelete(*sem);
80273f6: 687b ldr r3, [r7, #4]
80273f8: 681b ldr r3, [r3, #0]
80273fa: 4618 mov r0, r3
80273fc: f7ea fc52 bl 8011ca4 <osSemaphoreDelete>
}
8027400: bf00 nop
8027402: 3708 adds r7, #8
8027404: 46bd mov sp, r7
8027406: bd80 pop {r7, pc}
08027408 <sys_sem_valid>:
/*-----------------------------------------------------------------------------------*/
int sys_sem_valid(sys_sem_t *sem)
{
8027408: b480 push {r7}
802740a: b083 sub sp, #12
802740c: af00 add r7, sp, #0
802740e: 6078 str r0, [r7, #4]
if (*sem == SYS_SEM_NULL)
8027410: 687b ldr r3, [r7, #4]
8027412: 681b ldr r3, [r3, #0]
8027414: 2b00 cmp r3, #0
8027416: d101 bne.n 802741c <sys_sem_valid+0x14>
return 0;
8027418: 2300 movs r3, #0
802741a: e000 b.n 802741e <sys_sem_valid+0x16>
else
return 1;
802741c: 2301 movs r3, #1
}
802741e: 4618 mov r0, r3
8027420: 370c adds r7, #12
8027422: 46bd mov sp, r7
8027424: f85d 7b04 ldr.w r7, [sp], #4
8027428: 4770 bx lr
0802742a <sys_sem_set_invalid>:
/*-----------------------------------------------------------------------------------*/
void sys_sem_set_invalid(sys_sem_t *sem)
{
802742a: b480 push {r7}
802742c: b083 sub sp, #12
802742e: af00 add r7, sp, #0
8027430: 6078 str r0, [r7, #4]
*sem = SYS_SEM_NULL;
8027432: 687b ldr r3, [r7, #4]
8027434: 2200 movs r2, #0
8027436: 601a str r2, [r3, #0]
}
8027438: bf00 nop
802743a: 370c adds r7, #12
802743c: 46bd mov sp, r7
802743e: f85d 7b04 ldr.w r7, [sp], #4
8027442: 4770 bx lr
08027444 <sys_init>:
#else
osMutexId_t lwip_sys_mutex;
#endif
// Initialize sys arch
void sys_init(void)
{
8027444: b580 push {r7, lr}
8027446: af00 add r7, sp, #0
#if (osCMSIS < 0x20000U)
lwip_sys_mutex = osMutexCreate(osMutex(lwip_sys_mutex));
#else
lwip_sys_mutex = osMutexNew(NULL);
8027448: 2000 movs r0, #0
802744a: f7ea f9fe bl 801184a <osMutexNew>
802744e: 4603 mov r3, r0
8027450: 4a01 ldr r2, [pc, #4] @ (8027458 <sys_init+0x14>)
8027452: 6013 str r3, [r2, #0]
#endif
}
8027454: bf00 nop
8027456: bd80 pop {r7, pc}
8027458: 2402b14c .word 0x2402b14c
0802745c <sys_mutex_new>:
/* Mutexes*/
/*-----------------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------*/
#if LWIP_COMPAT_MUTEX == 0
/* Create a new mutex*/
err_t sys_mutex_new(sys_mutex_t *mutex) {
802745c: b580 push {r7, lr}
802745e: b082 sub sp, #8
8027460: af00 add r7, sp, #0
8027462: 6078 str r0, [r7, #4]
#if (osCMSIS < 0x20000U)
osMutexDef(MUTEX);
*mutex = osMutexCreate(osMutex(MUTEX));
#else
*mutex = osMutexNew(NULL);
8027464: 2000 movs r0, #0
8027466: f7ea f9f0 bl 801184a <osMutexNew>
802746a: 4602 mov r2, r0
802746c: 687b ldr r3, [r7, #4]
802746e: 601a str r2, [r3, #0]
#endif
if(*mutex == NULL)
8027470: 687b ldr r3, [r7, #4]
8027472: 681b ldr r3, [r3, #0]
8027474: 2b00 cmp r3, #0
8027476: d102 bne.n 802747e <sys_mutex_new+0x22>
{
#if SYS_STATS
++lwip_stats.sys.mutex.err;
#endif /* SYS_STATS */
return ERR_MEM;
8027478: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802747c: e000 b.n 8027480 <sys_mutex_new+0x24>
++lwip_stats.sys.mutex.used;
if (lwip_stats.sys.mutex.max < lwip_stats.sys.mutex.used) {
lwip_stats.sys.mutex.max = lwip_stats.sys.mutex.used;
}
#endif /* SYS_STATS */
return ERR_OK;
802747e: 2300 movs r3, #0
}
8027480: 4618 mov r0, r3
8027482: 3708 adds r7, #8
8027484: 46bd mov sp, r7
8027486: bd80 pop {r7, pc}
08027488 <sys_mutex_lock>:
osMutexDelete(*mutex);
}
/*-----------------------------------------------------------------------------------*/
/* Lock a mutex*/
void sys_mutex_lock(sys_mutex_t *mutex)
{
8027488: b580 push {r7, lr}
802748a: b082 sub sp, #8
802748c: af00 add r7, sp, #0
802748e: 6078 str r0, [r7, #4]
#if (osCMSIS < 0x20000U)
osMutexWait(*mutex, osWaitForever);
#else
osMutexAcquire(*mutex, osWaitForever);
8027490: 687b ldr r3, [r7, #4]
8027492: 681b ldr r3, [r3, #0]
8027494: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8027498: 4618 mov r0, r3
802749a: f7ea fa5c bl 8011956 <osMutexAcquire>
#endif
}
802749e: bf00 nop
80274a0: 3708 adds r7, #8
80274a2: 46bd mov sp, r7
80274a4: bd80 pop {r7, pc}
080274a6 <sys_mutex_unlock>:
/*-----------------------------------------------------------------------------------*/
/* Unlock a mutex*/
void sys_mutex_unlock(sys_mutex_t *mutex)
{
80274a6: b580 push {r7, lr}
80274a8: b082 sub sp, #8
80274aa: af00 add r7, sp, #0
80274ac: 6078 str r0, [r7, #4]
osMutexRelease(*mutex);
80274ae: 687b ldr r3, [r7, #4]
80274b0: 681b ldr r3, [r3, #0]
80274b2: 4618 mov r0, r3
80274b4: f7ea fa9a bl 80119ec <osMutexRelease>
}
80274b8: bf00 nop
80274ba: 3708 adds r7, #8
80274bc: 46bd mov sp, r7
80274be: bd80 pop {r7, pc}
080274c0 <sys_thread_new>:
function "thread()". The "arg" argument will be passed as an argument to the
thread() function. The id of the new thread is returned. Both the id and
the priority are system dependent.
*/
sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread , void *arg, int stacksize, int prio)
{
80274c0: b580 push {r7, lr}
80274c2: b08e sub sp, #56 @ 0x38
80274c4: af00 add r7, sp, #0
80274c6: 60f8 str r0, [r7, #12]
80274c8: 60b9 str r1, [r7, #8]
80274ca: 607a str r2, [r7, #4]
80274cc: 603b str r3, [r7, #0]
#if (osCMSIS < 0x20000U)
const osThreadDef_t os_thread_def = { (char *)name, (os_pthread)thread, (osPriority)prio, 0, stacksize};
return osThreadCreate(&os_thread_def, arg);
#else
const osThreadAttr_t attributes = {
80274ce: f107 0314 add.w r3, r7, #20
80274d2: 2224 movs r2, #36 @ 0x24
80274d4: 2100 movs r1, #0
80274d6: 4618 mov r0, r3
80274d8: f003 fc3a bl 802ad50 <memset>
80274dc: 68fb ldr r3, [r7, #12]
80274de: 617b str r3, [r7, #20]
80274e0: 683b ldr r3, [r7, #0]
80274e2: 62bb str r3, [r7, #40] @ 0x28
80274e4: 6c3b ldr r3, [r7, #64] @ 0x40
80274e6: 62fb str r3, [r7, #44] @ 0x2c
.name = name,
.stack_size = stacksize,
.priority = (osPriority_t)prio,
};
return osThreadNew(thread, arg, &attributes);
80274e8: f107 0314 add.w r3, r7, #20
80274ec: 461a mov r2, r3
80274ee: 6879 ldr r1, [r7, #4]
80274f0: 68b8 ldr r0, [r7, #8]
80274f2: f7e9 fffa bl 80114ea <osThreadNew>
80274f6: 4603 mov r3, r0
#endif
}
80274f8: 4618 mov r0, r3
80274fa: 3738 adds r7, #56 @ 0x38
80274fc: 46bd mov sp, r7
80274fe: bd80 pop {r7, pc}
08027500 <sys_arch_protect>:
Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
API is available
*/
sys_prot_t sys_arch_protect(void)
{
8027500: b580 push {r7, lr}
8027502: af00 add r7, sp, #0
#if (osCMSIS < 0x20000U)
osMutexWait(lwip_sys_mutex, osWaitForever);
#else
osMutexAcquire(lwip_sys_mutex, osWaitForever);
8027504: 4b04 ldr r3, [pc, #16] @ (8027518 <sys_arch_protect+0x18>)
8027506: 681b ldr r3, [r3, #0]
8027508: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
802750c: 4618 mov r0, r3
802750e: f7ea fa22 bl 8011956 <osMutexAcquire>
#endif
return (sys_prot_t)1;
8027512: 2301 movs r3, #1
}
8027514: 4618 mov r0, r3
8027516: bd80 pop {r7, pc}
8027518: 2402b14c .word 0x2402b14c
0802751c <sys_arch_unprotect>:
Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
API is available
*/
void sys_arch_unprotect(sys_prot_t pval)
{
802751c: b580 push {r7, lr}
802751e: b082 sub sp, #8
8027520: af00 add r7, sp, #0
8027522: 6078 str r0, [r7, #4]
( void ) pval;
osMutexRelease(lwip_sys_mutex);
8027524: 4b04 ldr r3, [pc, #16] @ (8027538 <sys_arch_unprotect+0x1c>)
8027526: 681b ldr r3, [r3, #0]
8027528: 4618 mov r0, r3
802752a: f7ea fa5f bl 80119ec <osMutexRelease>
}
802752e: bf00 nop
8027530: 3708 adds r7, #8
8027532: 46bd mov sp, r7
8027534: bd80 pop {r7, pc}
8027536: bf00 nop
8027538: 2402b14c .word 0x2402b14c
0802753c <NewMessageData>:
#include <string.h>
//#include "cmsis_os.h"
osMutexId_t mqttMutex;
static void NewMessageData(MessageData* md, MQTTString* aTopicName, MQTTMessage* aMessage) {
802753c: b480 push {r7}
802753e: b085 sub sp, #20
8027540: af00 add r7, sp, #0
8027542: 60f8 str r0, [r7, #12]
8027544: 60b9 str r1, [r7, #8]
8027546: 607a str r2, [r7, #4]
md->topicName = aTopicName;
8027548: 68fb ldr r3, [r7, #12]
802754a: 68ba ldr r2, [r7, #8]
802754c: 605a str r2, [r3, #4]
md->message = aMessage;
802754e: 68fb ldr r3, [r7, #12]
8027550: 687a ldr r2, [r7, #4]
8027552: 601a str r2, [r3, #0]
}
8027554: bf00 nop
8027556: 3714 adds r7, #20
8027558: 46bd mov sp, r7
802755a: f85d 7b04 ldr.w r7, [sp], #4
802755e: 4770 bx lr
08027560 <getNextPacketId>:
static int getNextPacketId(MQTTClient *c) {
8027560: b480 push {r7}
8027562: b083 sub sp, #12
8027564: af00 add r7, sp, #0
8027566: 6078 str r0, [r7, #4]
return c->next_packetid = (c->next_packetid == MAX_PACKET_ID) ? 1 : c->next_packetid + 1;
8027568: 687b ldr r3, [r7, #4]
802756a: 681b ldr r3, [r3, #0]
802756c: f64f 72ff movw r2, #65535 @ 0xffff
8027570: 4293 cmp r3, r2
8027572: d003 beq.n 802757c <getNextPacketId+0x1c>
8027574: 687b ldr r3, [r7, #4]
8027576: 681b ldr r3, [r3, #0]
8027578: 3301 adds r3, #1
802757a: e000 b.n 802757e <getNextPacketId+0x1e>
802757c: 2301 movs r3, #1
802757e: 687a ldr r2, [r7, #4]
8027580: 6013 str r3, [r2, #0]
8027582: 687b ldr r3, [r7, #4]
8027584: 681b ldr r3, [r3, #0]
}
8027586: 4618 mov r0, r3
8027588: 370c adds r7, #12
802758a: 46bd mov sp, r7
802758c: f85d 7b04 ldr.w r7, [sp], #4
8027590: 4770 bx lr
08027592 <sendPacket>:
static int sendPacket(MQTTClient* c, int length, Timer* timer)
{
8027592: b5f0 push {r4, r5, r6, r7, lr}
8027594: b087 sub sp, #28
8027596: af00 add r7, sp, #0
8027598: 60f8 str r0, [r7, #12]
802759a: 60b9 str r1, [r7, #8]
802759c: 607a str r2, [r7, #4]
int rc = FAILURE,
802759e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80275a2: 617b str r3, [r7, #20]
sent = 0;
80275a4: 2300 movs r3, #0
80275a6: 613b str r3, [r7, #16]
while (sent < length && !TimerIsExpired(timer))
80275a8: e018 b.n 80275dc <sendPacket+0x4a>
{
rc = c->ipstack->mqttwrite(c->ipstack, &c->buf[sent], length, TimerLeftMS(timer));
80275aa: 68fb ldr r3, [r7, #12]
80275ac: 6d5b ldr r3, [r3, #84] @ 0x54
80275ae: 689c ldr r4, [r3, #8]
80275b0: 68fb ldr r3, [r7, #12]
80275b2: 6d5d ldr r5, [r3, #84] @ 0x54
80275b4: 68fb ldr r3, [r7, #12]
80275b6: 691a ldr r2, [r3, #16]
80275b8: 693b ldr r3, [r7, #16]
80275ba: 18d6 adds r6, r2, r3
80275bc: 6878 ldr r0, [r7, #4]
80275be: f000 fed3 bl 8028368 <TimerLeftMS>
80275c2: 4603 mov r3, r0
80275c4: 68ba ldr r2, [r7, #8]
80275c6: 4631 mov r1, r6
80275c8: 4628 mov r0, r5
80275ca: 47a0 blx r4
80275cc: 6178 str r0, [r7, #20]
if (rc < 0) // there was an error writing the data
80275ce: 697b ldr r3, [r7, #20]
80275d0: 2b00 cmp r3, #0
80275d2: db0e blt.n 80275f2 <sendPacket+0x60>
break;
sent += rc;
80275d4: 693a ldr r2, [r7, #16]
80275d6: 697b ldr r3, [r7, #20]
80275d8: 4413 add r3, r2
80275da: 613b str r3, [r7, #16]
while (sent < length && !TimerIsExpired(timer))
80275dc: 693a ldr r2, [r7, #16]
80275de: 68bb ldr r3, [r7, #8]
80275e0: 429a cmp r2, r3
80275e2: da07 bge.n 80275f4 <sendPacket+0x62>
80275e4: 6878 ldr r0, [r7, #4]
80275e6: f000 fe7d bl 80282e4 <TimerIsExpired>
80275ea: 4603 mov r3, r0
80275ec: 2b00 cmp r3, #0
80275ee: d0dc beq.n 80275aa <sendPacket+0x18>
80275f0: e000 b.n 80275f4 <sendPacket+0x62>
break;
80275f2: bf00 nop
}
if (sent == length)
80275f4: 693a ldr r2, [r7, #16]
80275f6: 68bb ldr r3, [r7, #8]
80275f8: 429a cmp r2, r3
80275fa: d10b bne.n 8027614 <sendPacket+0x82>
{
TimerCountdown(&c->last_sent, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully sent the packet
80275fc: 68fb ldr r3, [r7, #12]
80275fe: f103 0258 add.w r2, r3, #88 @ 0x58
8027602: 68fb ldr r3, [r7, #12]
8027604: 699b ldr r3, [r3, #24]
8027606: 4619 mov r1, r3
8027608: 4610 mov r0, r2
802760a: f000 fe95 bl 8028338 <TimerCountdown>
rc = MQTT_SUCCESS;
802760e: 2300 movs r3, #0
8027610: 617b str r3, [r7, #20]
8027612: e002 b.n 802761a <sendPacket+0x88>
}
else
rc = FAILURE;
8027614: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027618: 617b str r3, [r7, #20]
return rc;
802761a: 697b ldr r3, [r7, #20]
}
802761c: 4618 mov r0, r3
802761e: 371c adds r7, #28
8027620: 46bd mov sp, r7
8027622: bdf0 pop {r4, r5, r6, r7, pc}
08027624 <MQTTClientInit>:
void MQTTClientInit(MQTTClient* c, Network* network, unsigned int command_timeout_ms,
unsigned char* sendbuf, size_t sendbuf_size, unsigned char* readbuf, size_t readbuf_size)
{
8027624: b580 push {r7, lr}
8027626: b086 sub sp, #24
8027628: af00 add r7, sp, #0
802762a: 60f8 str r0, [r7, #12]
802762c: 60b9 str r1, [r7, #8]
802762e: 607a str r2, [r7, #4]
8027630: 603b str r3, [r7, #0]
int i;
c->ipstack = network;
8027632: 68fb ldr r3, [r7, #12]
8027634: 68ba ldr r2, [r7, #8]
8027636: 655a str r2, [r3, #84] @ 0x54
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
8027638: 2300 movs r3, #0
802763a: 617b str r3, [r7, #20]
802763c: e008 b.n 8027650 <MQTTClientInit+0x2c>
c->messageHandlers[i].topicFilter = 0;
802763e: 68fb ldr r3, [r7, #12]
8027640: 697a ldr r2, [r7, #20]
8027642: 3205 adds r2, #5
8027644: 2100 movs r1, #0
8027646: f843 1032 str.w r1, [r3, r2, lsl #3]
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
802764a: 697b ldr r3, [r7, #20]
802764c: 3301 adds r3, #1
802764e: 617b str r3, [r7, #20]
8027650: 697b ldr r3, [r7, #20]
8027652: 2b04 cmp r3, #4
8027654: ddf3 ble.n 802763e <MQTTClientInit+0x1a>
c->command_timeout_ms = command_timeout_ms;
8027656: 68fb ldr r3, [r7, #12]
8027658: 687a ldr r2, [r7, #4]
802765a: 605a str r2, [r3, #4]
c->buf = sendbuf;
802765c: 68fb ldr r3, [r7, #12]
802765e: 683a ldr r2, [r7, #0]
8027660: 611a str r2, [r3, #16]
c->buf_size = sendbuf_size;
8027662: 68fb ldr r3, [r7, #12]
8027664: 6a3a ldr r2, [r7, #32]
8027666: 609a str r2, [r3, #8]
c->readbuf = readbuf;
8027668: 68fb ldr r3, [r7, #12]
802766a: 6a7a ldr r2, [r7, #36] @ 0x24
802766c: 615a str r2, [r3, #20]
c->readbuf_size = readbuf_size;
802766e: 68fb ldr r3, [r7, #12]
8027670: 6aba ldr r2, [r7, #40] @ 0x28
8027672: 60da str r2, [r3, #12]
c->isconnected = 0;
8027674: 68fb ldr r3, [r7, #12]
8027676: 2200 movs r2, #0
8027678: 621a str r2, [r3, #32]
c->cleansession = 0;
802767a: 68fb ldr r3, [r7, #12]
802767c: 2200 movs r2, #0
802767e: 625a str r2, [r3, #36] @ 0x24
c->ping_outstanding = 0;
8027680: 68fb ldr r3, [r7, #12]
8027682: 2200 movs r2, #0
8027684: 771a strb r2, [r3, #28]
c->defaultMessageHandler = NULL;
8027686: 68fb ldr r3, [r7, #12]
8027688: 2200 movs r2, #0
802768a: 651a str r2, [r3, #80] @ 0x50
c->next_packetid = 1;
802768c: 68fb ldr r3, [r7, #12]
802768e: 2201 movs r2, #1
8027690: 601a str r2, [r3, #0]
TimerInit(&c->last_sent);
8027692: 68fb ldr r3, [r7, #12]
8027694: 3358 adds r3, #88 @ 0x58
8027696: 4618 mov r0, r3
8027698: f000 fe7c bl 8028394 <TimerInit>
TimerInit(&c->last_received);
802769c: 68fb ldr r3, [r7, #12]
802769e: 3360 adds r3, #96 @ 0x60
80276a0: 4618 mov r0, r3
80276a2: f000 fe77 bl 8028394 <TimerInit>
#if defined(MQTT_TASK)
MutexInit(&c->mutex);
#endif
if(mqttMutex == NULL)
80276a6: 4b07 ldr r3, [pc, #28] @ (80276c4 <MQTTClientInit+0xa0>)
80276a8: 681b ldr r3, [r3, #0]
80276aa: 2b00 cmp r3, #0
80276ac: d105 bne.n 80276ba <MQTTClientInit+0x96>
{
// osMutexDef(mqttMutex);
// mqttMutex = osMutexNew(NULL);
c->mutex = osMutexNew(NULL);
80276ae: 2000 movs r0, #0
80276b0: f7ea f8cb bl 801184a <osMutexNew>
80276b4: 4602 mov r2, r0
80276b6: 68fb ldr r3, [r7, #12]
80276b8: 669a str r2, [r3, #104] @ 0x68
}
}
80276ba: bf00 nop
80276bc: 3718 adds r7, #24
80276be: 46bd mov sp, r7
80276c0: bd80 pop {r7, pc}
80276c2: bf00 nop
80276c4: 2402b150 .word 0x2402b150
080276c8 <decodePacket>:
static int decodePacket(MQTTClient* c, int* value, int timeout)
{
80276c8: b590 push {r4, r7, lr}
80276ca: b08b sub sp, #44 @ 0x2c
80276cc: af00 add r7, sp, #0
80276ce: 60f8 str r0, [r7, #12]
80276d0: 60b9 str r1, [r7, #8]
80276d2: 607a str r2, [r7, #4]
unsigned char i;
int multiplier = 1;
80276d4: 2301 movs r3, #1
80276d6: 627b str r3, [r7, #36] @ 0x24
int len = 0;
80276d8: 2300 movs r3, #0
80276da: 623b str r3, [r7, #32]
const int MAX_NO_OF_REMAINING_LENGTH_BYTES = 4;
80276dc: 2304 movs r3, #4
80276de: 61fb str r3, [r7, #28]
*value = 0;
80276e0: 68bb ldr r3, [r7, #8]
80276e2: 2200 movs r2, #0
80276e4: 601a str r2, [r3, #0]
do
{
int rc = MQTTPACKET_READ_ERROR;
80276e6: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80276ea: 61bb str r3, [r7, #24]
if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
80276ec: 6a3b ldr r3, [r7, #32]
80276ee: 3301 adds r3, #1
80276f0: 623b str r3, [r7, #32]
80276f2: 6a3a ldr r2, [r7, #32]
80276f4: 69fb ldr r3, [r7, #28]
80276f6: 429a cmp r2, r3
80276f8: dd03 ble.n 8027702 <decodePacket+0x3a>
{
rc = MQTTPACKET_READ_ERROR; /* bad data */
80276fa: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80276fe: 61bb str r3, [r7, #24]
goto exit;
8027700: e021 b.n 8027746 <decodePacket+0x7e>
}
rc = c->ipstack->mqttread(c->ipstack, &i, 1, timeout);
8027702: 68fb ldr r3, [r7, #12]
8027704: 6d5b ldr r3, [r3, #84] @ 0x54
8027706: 685c ldr r4, [r3, #4]
8027708: 68fb ldr r3, [r7, #12]
802770a: 6d58 ldr r0, [r3, #84] @ 0x54
802770c: f107 0117 add.w r1, r7, #23
8027710: 687b ldr r3, [r7, #4]
8027712: 2201 movs r2, #1
8027714: 47a0 blx r4
8027716: 61b8 str r0, [r7, #24]
if (rc != 1)
8027718: 69bb ldr r3, [r7, #24]
802771a: 2b01 cmp r3, #1
802771c: d112 bne.n 8027744 <decodePacket+0x7c>
goto exit;
*value += (i & 127) * multiplier;
802771e: 68bb ldr r3, [r7, #8]
8027720: 681a ldr r2, [r3, #0]
8027722: 7dfb ldrb r3, [r7, #23]
8027724: f003 037f and.w r3, r3, #127 @ 0x7f
8027728: 6a79 ldr r1, [r7, #36] @ 0x24
802772a: fb01 f303 mul.w r3, r1, r3
802772e: 441a add r2, r3
8027730: 68bb ldr r3, [r7, #8]
8027732: 601a str r2, [r3, #0]
multiplier *= 128;
8027734: 6a7b ldr r3, [r7, #36] @ 0x24
8027736: 01db lsls r3, r3, #7
8027738: 627b str r3, [r7, #36] @ 0x24
} while ((i & 128) != 0);
802773a: 7dfb ldrb r3, [r7, #23]
802773c: b25b sxtb r3, r3
802773e: 2b00 cmp r3, #0
8027740: dbd1 blt.n 80276e6 <decodePacket+0x1e>
exit:
8027742: e000 b.n 8027746 <decodePacket+0x7e>
goto exit;
8027744: bf00 nop
return len;
8027746: 6a3b ldr r3, [r7, #32]
}
8027748: 4618 mov r0, r3
802774a: 372c adds r7, #44 @ 0x2c
802774c: 46bd mov sp, r7
802774e: bd90 pop {r4, r7, pc}
08027750 <readPacket>:
static int readPacket(MQTTClient* c, Timer* timer)
{
8027750: b5f0 push {r4, r5, r6, r7, lr}
8027752: b089 sub sp, #36 @ 0x24
8027754: af00 add r7, sp, #0
8027756: 60f8 str r0, [r7, #12]
8027758: 60b9 str r1, [r7, #8]
MQTTHeader header = {0};
802775a: 2300 movs r3, #0
802775c: 617b str r3, [r7, #20]
int len = 0;
802775e: 2300 movs r3, #0
8027760: 61bb str r3, [r7, #24]
int rem_len = 0;
8027762: 2300 movs r3, #0
8027764: 613b str r3, [r7, #16]
/* 1. read the header byte. This has the packet type in it */
int rc = c->ipstack->mqttread(c->ipstack, c->readbuf, 1, TimerLeftMS(timer));
8027766: 68fb ldr r3, [r7, #12]
8027768: 6d5b ldr r3, [r3, #84] @ 0x54
802776a: 685c ldr r4, [r3, #4]
802776c: 68fb ldr r3, [r7, #12]
802776e: 6d5d ldr r5, [r3, #84] @ 0x54
8027770: 68fb ldr r3, [r7, #12]
8027772: 695e ldr r6, [r3, #20]
8027774: 68b8 ldr r0, [r7, #8]
8027776: f000 fdf7 bl 8028368 <TimerLeftMS>
802777a: 4603 mov r3, r0
802777c: 2201 movs r2, #1
802777e: 4631 mov r1, r6
8027780: 4628 mov r0, r5
8027782: 47a0 blx r4
8027784: 61f8 str r0, [r7, #28]
if (rc != 1)
8027786: 69fb ldr r3, [r7, #28]
8027788: 2b01 cmp r3, #1
802778a: d15d bne.n 8027848 <readPacket+0xf8>
goto exit;
len = 1;
802778c: 2301 movs r3, #1
802778e: 61bb str r3, [r7, #24]
/* 2. read the remaining length. This is variable in itself */
decodePacket(c, &rem_len, TimerLeftMS(timer));
8027790: 68b8 ldr r0, [r7, #8]
8027792: f000 fde9 bl 8028368 <TimerLeftMS>
8027796: 4602 mov r2, r0
8027798: f107 0310 add.w r3, r7, #16
802779c: 4619 mov r1, r3
802779e: 68f8 ldr r0, [r7, #12]
80277a0: f7ff ff92 bl 80276c8 <decodePacket>
len += MQTTPacket_encode(c->readbuf + 1, rem_len); /* put the original remaining length back into the buffer */
80277a4: 68fb ldr r3, [r7, #12]
80277a6: 695b ldr r3, [r3, #20]
80277a8: 3301 adds r3, #1
80277aa: 693a ldr r2, [r7, #16]
80277ac: 4611 mov r1, r2
80277ae: 4618 mov r0, r3
80277b0: f001 f959 bl 8028a66 <MQTTPacket_encode>
80277b4: 4602 mov r2, r0
80277b6: 69bb ldr r3, [r7, #24]
80277b8: 4413 add r3, r2
80277ba: 61bb str r3, [r7, #24]
if (rem_len > (c->readbuf_size - len))
80277bc: 68fb ldr r3, [r7, #12]
80277be: 68da ldr r2, [r3, #12]
80277c0: 69bb ldr r3, [r7, #24]
80277c2: 1ad3 subs r3, r2, r3
80277c4: 693a ldr r2, [r7, #16]
80277c6: 4293 cmp r3, r2
80277c8: d203 bcs.n 80277d2 <readPacket+0x82>
{
rc = BUFFER_OVERFLOW;
80277ca: f06f 0301 mvn.w r3, #1
80277ce: 61fb str r3, [r7, #28]
goto exit;
80277d0: e03d b.n 802784e <readPacket+0xfe>
}
/* 3. read the rest of the buffer using a callback to supply the rest of the data */
if (rem_len > 0 && (rc = c->ipstack->mqttread(c->ipstack, c->readbuf + len, rem_len, TimerLeftMS(timer)) != rem_len)) {
80277d2: 693b ldr r3, [r7, #16]
80277d4: 2b00 cmp r3, #0
80277d6: dd20 ble.n 802781a <readPacket+0xca>
80277d8: 68fb ldr r3, [r7, #12]
80277da: 6d5b ldr r3, [r3, #84] @ 0x54
80277dc: 685c ldr r4, [r3, #4]
80277de: 68fb ldr r3, [r7, #12]
80277e0: 6d5d ldr r5, [r3, #84] @ 0x54
80277e2: 68fb ldr r3, [r7, #12]
80277e4: 695a ldr r2, [r3, #20]
80277e6: 69bb ldr r3, [r7, #24]
80277e8: 18d6 adds r6, r2, r3
80277ea: 693b ldr r3, [r7, #16]
80277ec: 607b str r3, [r7, #4]
80277ee: 68b8 ldr r0, [r7, #8]
80277f0: f000 fdba bl 8028368 <TimerLeftMS>
80277f4: 4603 mov r3, r0
80277f6: 687a ldr r2, [r7, #4]
80277f8: 4631 mov r1, r6
80277fa: 4628 mov r0, r5
80277fc: 47a0 blx r4
80277fe: 4602 mov r2, r0
8027800: 693b ldr r3, [r7, #16]
8027802: 429a cmp r2, r3
8027804: bf14 ite ne
8027806: 2301 movne r3, #1
8027808: 2300 moveq r3, #0
802780a: b2db uxtb r3, r3
802780c: 61fb str r3, [r7, #28]
802780e: 69fb ldr r3, [r7, #28]
8027810: 2b00 cmp r3, #0
8027812: d002 beq.n 802781a <readPacket+0xca>
rc = 0;
8027814: 2300 movs r3, #0
8027816: 61fb str r3, [r7, #28]
goto exit;
8027818: e019 b.n 802784e <readPacket+0xfe>
}
header.byte = c->readbuf[0];
802781a: 68fb ldr r3, [r7, #12]
802781c: 695b ldr r3, [r3, #20]
802781e: 781b ldrb r3, [r3, #0]
8027820: 753b strb r3, [r7, #20]
rc = header.bits.type;
8027822: 7d3b ldrb r3, [r7, #20]
8027824: f3c3 1303 ubfx r3, r3, #4, #4
8027828: b2db uxtb r3, r3
802782a: 61fb str r3, [r7, #28]
if (c->keepAliveInterval > 0)
802782c: 68fb ldr r3, [r7, #12]
802782e: 699b ldr r3, [r3, #24]
8027830: 2b00 cmp r3, #0
8027832: d00b beq.n 802784c <readPacket+0xfc>
TimerCountdown(&c->last_received, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully received a packet
8027834: 68fb ldr r3, [r7, #12]
8027836: f103 0260 add.w r2, r3, #96 @ 0x60
802783a: 68fb ldr r3, [r7, #12]
802783c: 699b ldr r3, [r3, #24]
802783e: 4619 mov r1, r3
8027840: 4610 mov r0, r2
8027842: f000 fd79 bl 8028338 <TimerCountdown>
8027846: e002 b.n 802784e <readPacket+0xfe>
goto exit;
8027848: bf00 nop
802784a: e000 b.n 802784e <readPacket+0xfe>
exit:
802784c: bf00 nop
return rc;
802784e: 69fb ldr r3, [r7, #28]
}
8027850: 4618 mov r0, r3
8027852: 3724 adds r7, #36 @ 0x24
8027854: 46bd mov sp, r7
8027856: bdf0 pop {r4, r5, r6, r7, pc}
08027858 <isTopicMatched>:
// assume topic filter and name is in correct format
// # can only be at end
// + and # can only be next to separator
static char isTopicMatched(char* topicFilter, MQTTString* topicName)
{
8027858: b480 push {r7}
802785a: b087 sub sp, #28
802785c: af00 add r7, sp, #0
802785e: 6078 str r0, [r7, #4]
8027860: 6039 str r1, [r7, #0]
char* curf = topicFilter;
8027862: 687b ldr r3, [r7, #4]
8027864: 617b str r3, [r7, #20]
char* curn = topicName->lenstring.data;
8027866: 683b ldr r3, [r7, #0]
8027868: 689b ldr r3, [r3, #8]
802786a: 613b str r3, [r7, #16]
char* curn_end = curn + topicName->lenstring.len;
802786c: 683b ldr r3, [r7, #0]
802786e: 685b ldr r3, [r3, #4]
8027870: 461a mov r2, r3
8027872: 693b ldr r3, [r7, #16]
8027874: 4413 add r3, r2
8027876: 60bb str r3, [r7, #8]
while (*curf && curn < curn_end)
8027878: e039 b.n 80278ee <isTopicMatched+0x96>
{
if (*curn == '/' && *curf != '/')
802787a: 693b ldr r3, [r7, #16]
802787c: 781b ldrb r3, [r3, #0]
802787e: 2b2f cmp r3, #47 @ 0x2f
8027880: d103 bne.n 802788a <isTopicMatched+0x32>
8027882: 697b ldr r3, [r7, #20]
8027884: 781b ldrb r3, [r3, #0]
8027886: 2b2f cmp r3, #47 @ 0x2f
8027888: d13a bne.n 8027900 <isTopicMatched+0xa8>
break;
if (*curf != '+' && *curf != '#' && *curf != *curn)
802788a: 697b ldr r3, [r7, #20]
802788c: 781b ldrb r3, [r3, #0]
802788e: 2b2b cmp r3, #43 @ 0x2b
8027890: d009 beq.n 80278a6 <isTopicMatched+0x4e>
8027892: 697b ldr r3, [r7, #20]
8027894: 781b ldrb r3, [r3, #0]
8027896: 2b23 cmp r3, #35 @ 0x23
8027898: d005 beq.n 80278a6 <isTopicMatched+0x4e>
802789a: 697b ldr r3, [r7, #20]
802789c: 781a ldrb r2, [r3, #0]
802789e: 693b ldr r3, [r7, #16]
80278a0: 781b ldrb r3, [r3, #0]
80278a2: 429a cmp r2, r3
80278a4: d12e bne.n 8027904 <isTopicMatched+0xac>
break;
if (*curf == '+')
80278a6: 697b ldr r3, [r7, #20]
80278a8: 781b ldrb r3, [r3, #0]
80278aa: 2b2b cmp r3, #43 @ 0x2b
80278ac: d112 bne.n 80278d4 <isTopicMatched+0x7c>
{ // skip until we meet the next separator, or end of string
char* nextpos = curn + 1;
80278ae: 693b ldr r3, [r7, #16]
80278b0: 3301 adds r3, #1
80278b2: 60fb str r3, [r7, #12]
while (nextpos < curn_end && *nextpos != '/')
80278b4: e005 b.n 80278c2 <isTopicMatched+0x6a>
nextpos = ++curn + 1;
80278b6: 693b ldr r3, [r7, #16]
80278b8: 3301 adds r3, #1
80278ba: 613b str r3, [r7, #16]
80278bc: 693b ldr r3, [r7, #16]
80278be: 3301 adds r3, #1
80278c0: 60fb str r3, [r7, #12]
while (nextpos < curn_end && *nextpos != '/')
80278c2: 68fa ldr r2, [r7, #12]
80278c4: 68bb ldr r3, [r7, #8]
80278c6: 429a cmp r2, r3
80278c8: d20b bcs.n 80278e2 <isTopicMatched+0x8a>
80278ca: 68fb ldr r3, [r7, #12]
80278cc: 781b ldrb r3, [r3, #0]
80278ce: 2b2f cmp r3, #47 @ 0x2f
80278d0: d1f1 bne.n 80278b6 <isTopicMatched+0x5e>
80278d2: e006 b.n 80278e2 <isTopicMatched+0x8a>
}
else if (*curf == '#')
80278d4: 697b ldr r3, [r7, #20]
80278d6: 781b ldrb r3, [r3, #0]
80278d8: 2b23 cmp r3, #35 @ 0x23
80278da: d102 bne.n 80278e2 <isTopicMatched+0x8a>
curn = curn_end - 1; // skip until end of string
80278dc: 68bb ldr r3, [r7, #8]
80278de: 3b01 subs r3, #1
80278e0: 613b str r3, [r7, #16]
curf++;
80278e2: 697b ldr r3, [r7, #20]
80278e4: 3301 adds r3, #1
80278e6: 617b str r3, [r7, #20]
curn++;
80278e8: 693b ldr r3, [r7, #16]
80278ea: 3301 adds r3, #1
80278ec: 613b str r3, [r7, #16]
while (*curf && curn < curn_end)
80278ee: 697b ldr r3, [r7, #20]
80278f0: 781b ldrb r3, [r3, #0]
80278f2: 2b00 cmp r3, #0
80278f4: d007 beq.n 8027906 <isTopicMatched+0xae>
80278f6: 693a ldr r2, [r7, #16]
80278f8: 68bb ldr r3, [r7, #8]
80278fa: 429a cmp r2, r3
80278fc: d3bd bcc.n 802787a <isTopicMatched+0x22>
80278fe: e002 b.n 8027906 <isTopicMatched+0xae>
break;
8027900: bf00 nop
8027902: e000 b.n 8027906 <isTopicMatched+0xae>
break;
8027904: bf00 nop
};
return (curn == curn_end) && (*curf == '\0');
8027906: 693a ldr r2, [r7, #16]
8027908: 68bb ldr r3, [r7, #8]
802790a: 429a cmp r2, r3
802790c: d105 bne.n 802791a <isTopicMatched+0xc2>
802790e: 697b ldr r3, [r7, #20]
8027910: 781b ldrb r3, [r3, #0]
8027912: 2b00 cmp r3, #0
8027914: d101 bne.n 802791a <isTopicMatched+0xc2>
8027916: 2301 movs r3, #1
8027918: e000 b.n 802791c <isTopicMatched+0xc4>
802791a: 2300 movs r3, #0
802791c: b2db uxtb r3, r3
}
802791e: 4618 mov r0, r3
8027920: 371c adds r7, #28
8027922: 46bd mov sp, r7
8027924: f85d 7b04 ldr.w r7, [sp], #4
8027928: 4770 bx lr
0802792a <deliverMessage>:
int deliverMessage(MQTTClient* c, MQTTString* topicName, MQTTMessage* message)
{
802792a: b580 push {r7, lr}
802792c: b08a sub sp, #40 @ 0x28
802792e: af00 add r7, sp, #0
8027930: 60f8 str r0, [r7, #12]
8027932: 60b9 str r1, [r7, #8]
8027934: 607a str r2, [r7, #4]
int i;
int rc = FAILURE;
8027936: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802793a: 623b str r3, [r7, #32]
// we have to find the right message handler - indexed by topic
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
802793c: 2300 movs r3, #0
802793e: 627b str r3, [r7, #36] @ 0x24
8027940: e03c b.n 80279bc <deliverMessage+0x92>
{
if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
8027942: 68fb ldr r3, [r7, #12]
8027944: 6a7a ldr r2, [r7, #36] @ 0x24
8027946: 3205 adds r2, #5
8027948: f853 3032 ldr.w r3, [r3, r2, lsl #3]
802794c: 2b00 cmp r3, #0
802794e: d032 beq.n 80279b6 <deliverMessage+0x8c>
8027950: 68fb ldr r3, [r7, #12]
8027952: 6a7a ldr r2, [r7, #36] @ 0x24
8027954: 3205 adds r2, #5
8027956: f853 3032 ldr.w r3, [r3, r2, lsl #3]
802795a: 4619 mov r1, r3
802795c: 68b8 ldr r0, [r7, #8]
802795e: f001 fa51 bl 8028e04 <MQTTPacket_equals>
8027962: 4603 mov r3, r0
8027964: 2b00 cmp r3, #0
8027966: d10b bne.n 8027980 <deliverMessage+0x56>
isTopicMatched((char*)c->messageHandlers[i].topicFilter, topicName)))
8027968: 68fb ldr r3, [r7, #12]
802796a: 6a7a ldr r2, [r7, #36] @ 0x24
802796c: 3205 adds r2, #5
802796e: f853 3032 ldr.w r3, [r3, r2, lsl #3]
8027972: 68b9 ldr r1, [r7, #8]
8027974: 4618 mov r0, r3
8027976: f7ff ff6f bl 8027858 <isTopicMatched>
802797a: 4603 mov r3, r0
if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
802797c: 2b00 cmp r3, #0
802797e: d01a beq.n 80279b6 <deliverMessage+0x8c>
{
if (c->messageHandlers[i].fp != NULL)
8027980: 68fa ldr r2, [r7, #12]
8027982: 6a7b ldr r3, [r7, #36] @ 0x24
8027984: 3305 adds r3, #5
8027986: 00db lsls r3, r3, #3
8027988: 4413 add r3, r2
802798a: 685b ldr r3, [r3, #4]
802798c: 2b00 cmp r3, #0
802798e: d012 beq.n 80279b6 <deliverMessage+0x8c>
{
MessageData md;
NewMessageData(&md, topicName, message);
8027990: f107 0318 add.w r3, r7, #24
8027994: 687a ldr r2, [r7, #4]
8027996: 68b9 ldr r1, [r7, #8]
8027998: 4618 mov r0, r3
802799a: f7ff fdcf bl 802753c <NewMessageData>
c->messageHandlers[i].fp(&md);
802799e: 68fa ldr r2, [r7, #12]
80279a0: 6a7b ldr r3, [r7, #36] @ 0x24
80279a2: 3305 adds r3, #5
80279a4: 00db lsls r3, r3, #3
80279a6: 4413 add r3, r2
80279a8: 685b ldr r3, [r3, #4]
80279aa: f107 0218 add.w r2, r7, #24
80279ae: 4610 mov r0, r2
80279b0: 4798 blx r3
rc = MQTT_SUCCESS;
80279b2: 2300 movs r3, #0
80279b4: 623b str r3, [r7, #32]
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
80279b6: 6a7b ldr r3, [r7, #36] @ 0x24
80279b8: 3301 adds r3, #1
80279ba: 627b str r3, [r7, #36] @ 0x24
80279bc: 6a7b ldr r3, [r7, #36] @ 0x24
80279be: 2b04 cmp r3, #4
80279c0: ddbf ble.n 8027942 <deliverMessage+0x18>
}
}
}
if (rc == FAILURE && c->defaultMessageHandler != NULL)
80279c2: 6a3b ldr r3, [r7, #32]
80279c4: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80279c8: d112 bne.n 80279f0 <deliverMessage+0xc6>
80279ca: 68fb ldr r3, [r7, #12]
80279cc: 6d1b ldr r3, [r3, #80] @ 0x50
80279ce: 2b00 cmp r3, #0
80279d0: d00e beq.n 80279f0 <deliverMessage+0xc6>
{
MessageData md;
NewMessageData(&md, topicName, message);
80279d2: f107 0310 add.w r3, r7, #16
80279d6: 687a ldr r2, [r7, #4]
80279d8: 68b9 ldr r1, [r7, #8]
80279da: 4618 mov r0, r3
80279dc: f7ff fdae bl 802753c <NewMessageData>
c->defaultMessageHandler(&md);
80279e0: 68fb ldr r3, [r7, #12]
80279e2: 6d1b ldr r3, [r3, #80] @ 0x50
80279e4: f107 0210 add.w r2, r7, #16
80279e8: 4610 mov r0, r2
80279ea: 4798 blx r3
rc = MQTT_SUCCESS;
80279ec: 2300 movs r3, #0
80279ee: 623b str r3, [r7, #32]
}
return rc;
80279f0: 6a3b ldr r3, [r7, #32]
}
80279f2: 4618 mov r0, r3
80279f4: 3728 adds r7, #40 @ 0x28
80279f6: 46bd mov sp, r7
80279f8: bd80 pop {r7, pc}
080279fa <keepalive>:
int keepalive(MQTTClient* c)
{
80279fa: b580 push {r7, lr}
80279fc: b086 sub sp, #24
80279fe: af00 add r7, sp, #0
8027a00: 6078 str r0, [r7, #4]
int rc = MQTT_SUCCESS;
8027a02: 2300 movs r3, #0
8027a04: 617b str r3, [r7, #20]
if (c->keepAliveInterval == 0)
8027a06: 687b ldr r3, [r7, #4]
8027a08: 699b ldr r3, [r3, #24]
8027a0a: 2b00 cmp r3, #0
8027a0c: d03e beq.n 8027a8c <keepalive+0x92>
goto exit;
if (TimerIsExpired(&c->last_sent) || TimerIsExpired(&c->last_received))
8027a0e: 687b ldr r3, [r7, #4]
8027a10: 3358 adds r3, #88 @ 0x58
8027a12: 4618 mov r0, r3
8027a14: f000 fc66 bl 80282e4 <TimerIsExpired>
8027a18: 4603 mov r3, r0
8027a1a: 2b00 cmp r3, #0
8027a1c: d107 bne.n 8027a2e <keepalive+0x34>
8027a1e: 687b ldr r3, [r7, #4]
8027a20: 3360 adds r3, #96 @ 0x60
8027a22: 4618 mov r0, r3
8027a24: f000 fc5e bl 80282e4 <TimerIsExpired>
8027a28: 4603 mov r3, r0
8027a2a: 2b00 cmp r3, #0
8027a2c: d030 beq.n 8027a90 <keepalive+0x96>
{
if (c->ping_outstanding)
8027a2e: 687b ldr r3, [r7, #4]
8027a30: 7f1b ldrb r3, [r3, #28]
8027a32: 2b00 cmp r3, #0
8027a34: d003 beq.n 8027a3e <keepalive+0x44>
rc = FAILURE; /* PINGRESP not received in keepalive interval */
8027a36: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027a3a: 617b str r3, [r7, #20]
8027a3c: e029 b.n 8027a92 <keepalive+0x98>
else
{
Timer timer;
TimerInit(&timer);
8027a3e: f107 0308 add.w r3, r7, #8
8027a42: 4618 mov r0, r3
8027a44: f000 fca6 bl 8028394 <TimerInit>
TimerCountdownMS(&timer, 1000);
8027a48: f107 0308 add.w r3, r7, #8
8027a4c: f44f 717a mov.w r1, #1000 @ 0x3e8
8027a50: 4618 mov r0, r3
8027a52: f000 fc5d bl 8028310 <TimerCountdownMS>
int len = MQTTSerialize_pingreq(c->buf, c->buf_size);
8027a56: 687b ldr r3, [r7, #4]
8027a58: 691a ldr r2, [r3, #16]
8027a5a: 687b ldr r3, [r7, #4]
8027a5c: 689b ldr r3, [r3, #8]
8027a5e: 4619 mov r1, r3
8027a60: 4610 mov r0, r2
8027a62: f000 ff34 bl 80288ce <MQTTSerialize_pingreq>
8027a66: 6138 str r0, [r7, #16]
if (len > 0 && (rc = sendPacket(c, len, &timer)) == MQTT_SUCCESS) // send the ping packet
8027a68: 693b ldr r3, [r7, #16]
8027a6a: 2b00 cmp r3, #0
8027a6c: dd11 ble.n 8027a92 <keepalive+0x98>
8027a6e: f107 0308 add.w r3, r7, #8
8027a72: 461a mov r2, r3
8027a74: 6939 ldr r1, [r7, #16]
8027a76: 6878 ldr r0, [r7, #4]
8027a78: f7ff fd8b bl 8027592 <sendPacket>
8027a7c: 6178 str r0, [r7, #20]
8027a7e: 697b ldr r3, [r7, #20]
8027a80: 2b00 cmp r3, #0
8027a82: d106 bne.n 8027a92 <keepalive+0x98>
c->ping_outstanding = 1;
8027a84: 687b ldr r3, [r7, #4]
8027a86: 2201 movs r2, #1
8027a88: 771a strb r2, [r3, #28]
8027a8a: e002 b.n 8027a92 <keepalive+0x98>
goto exit;
8027a8c: bf00 nop
8027a8e: e000 b.n 8027a92 <keepalive+0x98>
}
}
exit:
8027a90: bf00 nop
return rc;
8027a92: 697b ldr r3, [r7, #20]
}
8027a94: 4618 mov r0, r3
8027a96: 3718 adds r7, #24
8027a98: 46bd mov sp, r7
8027a9a: bd80 pop {r7, pc}
08027a9c <MQTTCleanSession>:
void MQTTCleanSession(MQTTClient* c)
{
8027a9c: b480 push {r7}
8027a9e: b085 sub sp, #20
8027aa0: af00 add r7, sp, #0
8027aa2: 6078 str r0, [r7, #4]
int i = 0;
8027aa4: 2300 movs r3, #0
8027aa6: 60fb str r3, [r7, #12]
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
8027aa8: 2300 movs r3, #0
8027aaa: 60fb str r3, [r7, #12]
8027aac: e008 b.n 8027ac0 <MQTTCleanSession+0x24>
c->messageHandlers[i].topicFilter = NULL;
8027aae: 687b ldr r3, [r7, #4]
8027ab0: 68fa ldr r2, [r7, #12]
8027ab2: 3205 adds r2, #5
8027ab4: 2100 movs r1, #0
8027ab6: f843 1032 str.w r1, [r3, r2, lsl #3]
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
8027aba: 68fb ldr r3, [r7, #12]
8027abc: 3301 adds r3, #1
8027abe: 60fb str r3, [r7, #12]
8027ac0: 68fb ldr r3, [r7, #12]
8027ac2: 2b04 cmp r3, #4
8027ac4: ddf3 ble.n 8027aae <MQTTCleanSession+0x12>
}
8027ac6: bf00 nop
8027ac8: bf00 nop
8027aca: 3714 adds r7, #20
8027acc: 46bd mov sp, r7
8027ace: f85d 7b04 ldr.w r7, [sp], #4
8027ad2: 4770 bx lr
08027ad4 <MQTTCloseSession>:
void MQTTCloseSession(MQTTClient* c)
{
8027ad4: b580 push {r7, lr}
8027ad6: b082 sub sp, #8
8027ad8: af00 add r7, sp, #0
8027ada: 6078 str r0, [r7, #4]
c->ping_outstanding = 0;
8027adc: 687b ldr r3, [r7, #4]
8027ade: 2200 movs r2, #0
8027ae0: 771a strb r2, [r3, #28]
c->isconnected = 0;
8027ae2: 687b ldr r3, [r7, #4]
8027ae4: 2200 movs r2, #0
8027ae6: 621a str r2, [r3, #32]
if (c->cleansession)
8027ae8: 687b ldr r3, [r7, #4]
8027aea: 6a5b ldr r3, [r3, #36] @ 0x24
8027aec: 2b00 cmp r3, #0
8027aee: d002 beq.n 8027af6 <MQTTCloseSession+0x22>
MQTTCleanSession(c);
8027af0: 6878 ldr r0, [r7, #4]
8027af2: f7ff ffd3 bl 8027a9c <MQTTCleanSession>
}
8027af6: bf00 nop
8027af8: 3708 adds r7, #8
8027afa: 46bd mov sp, r7
8027afc: bd80 pop {r7, pc}
...
08027b00 <cycle>:
int cycle(MQTTClient* c, Timer* timer)
{
8027b00: b5f0 push {r4, r5, r6, r7, lr}
8027b02: b095 sub sp, #84 @ 0x54
8027b04: af06 add r7, sp, #24
8027b06: 6078 str r0, [r7, #4]
8027b08: 6039 str r1, [r7, #0]
int len = 0,
8027b0a: 2300 movs r3, #0
8027b0c: 637b str r3, [r7, #52] @ 0x34
rc = MQTT_SUCCESS;
8027b0e: 2300 movs r3, #0
8027b10: 633b str r3, [r7, #48] @ 0x30
int packet_type = readPacket(c, timer); /* read the socket, see what work is due */
8027b12: 6839 ldr r1, [r7, #0]
8027b14: 6878 ldr r0, [r7, #4]
8027b16: f7ff fe1b bl 8027750 <readPacket>
8027b1a: 62f8 str r0, [r7, #44] @ 0x2c
switch (packet_type)
8027b1c: 6afb ldr r3, [r7, #44] @ 0x2c
8027b1e: 2b0d cmp r3, #13
8027b20: d81e bhi.n 8027b60 <cycle+0x60>
8027b22: a201 add r2, pc, #4 @ (adr r2, 8027b28 <cycle+0x28>)
8027b24: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8027b28: 08027cb7 .word 0x08027cb7
8027b2c: 08027b61 .word 0x08027b61
8027b30: 08027cb7 .word 0x08027cb7
8027b34: 08027b67 .word 0x08027b67
8027b38: 08027cb7 .word 0x08027cb7
8027b3c: 08027c33 .word 0x08027c33
8027b40: 08027c33 .word 0x08027c33
8027b44: 08027cb7 .word 0x08027cb7
8027b48: 08027b61 .word 0x08027b61
8027b4c: 08027cb7 .word 0x08027cb7
8027b50: 08027b61 .word 0x08027b61
8027b54: 08027cb7 .word 0x08027cb7
8027b58: 08027b61 .word 0x08027b61
8027b5c: 08027caf .word 0x08027caf
{
default:
/* no more data to read, unrecoverable. Or read packet fails due to unexpected network error */
rc = packet_type;
8027b60: 6afb ldr r3, [r7, #44] @ 0x2c
8027b62: 633b str r3, [r7, #48] @ 0x30
goto exit;
8027b64: e0b9 b.n 8027cda <cycle+0x1da>
case PUBLISH:
{
MQTTString topicName;
MQTTMessage msg;
int intQoS;
msg.payloadlen = 0; /* this is a size_t, but deserialize publish sets this as int */
8027b66: 2300 movs r3, #0
8027b68: 61fb str r3, [r7, #28]
if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
8027b6a: 687b ldr r3, [r7, #4]
8027b6c: 695b ldr r3, [r3, #20]
(unsigned char**)&msg.payload, (int*)&msg.payloadlen, c->readbuf, c->readbuf_size) != 1)
8027b6e: 687a ldr r2, [r7, #4]
8027b70: 68d2 ldr r2, [r2, #12]
if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
8027b72: 4616 mov r6, r2
8027b74: f107 0210 add.w r2, r7, #16
8027b78: 1d15 adds r5, r2, #4
8027b7a: f107 0210 add.w r2, r7, #16
8027b7e: 1c54 adds r4, r2, #1
8027b80: f107 010c add.w r1, r7, #12
8027b84: f107 0210 add.w r2, r7, #16
8027b88: 1c90 adds r0, r2, #2
8027b8a: 9604 str r6, [sp, #16]
8027b8c: 9303 str r3, [sp, #12]
8027b8e: f107 0310 add.w r3, r7, #16
8027b92: 330c adds r3, #12
8027b94: 9302 str r3, [sp, #8]
8027b96: f107 0310 add.w r3, r7, #16
8027b9a: 3308 adds r3, #8
8027b9c: 9301 str r3, [sp, #4]
8027b9e: f107 0320 add.w r3, r7, #32
8027ba2: 9300 str r3, [sp, #0]
8027ba4: 462b mov r3, r5
8027ba6: 4622 mov r2, r4
8027ba8: f000 fea0 bl 80288ec <MQTTDeserialize_publish>
8027bac: 4603 mov r3, r0
8027bae: 2b01 cmp r3, #1
8027bb0: f040 8090 bne.w 8027cd4 <cycle+0x1d4>
goto exit;
msg.qos = (enum QoS)intQoS;
8027bb4: 68fb ldr r3, [r7, #12]
8027bb6: b2db uxtb r3, r3
8027bb8: 743b strb r3, [r7, #16]
deliverMessage(c, &topicName, &msg);
8027bba: f107 0210 add.w r2, r7, #16
8027bbe: f107 0320 add.w r3, r7, #32
8027bc2: 4619 mov r1, r3
8027bc4: 6878 ldr r0, [r7, #4]
8027bc6: f7ff feb0 bl 802792a <deliverMessage>
if (msg.qos != QOS0)
8027bca: 7c3b ldrb r3, [r7, #16]
8027bcc: 2b00 cmp r3, #0
8027bce: d074 beq.n 8027cba <cycle+0x1ba>
{
if (msg.qos == QOS1)
8027bd0: 7c3b ldrb r3, [r7, #16]
8027bd2: 2b01 cmp r3, #1
8027bd4: d10c bne.n 8027bf0 <cycle+0xf0>
len = MQTTSerialize_ack(c->buf, c->buf_size, PUBACK, 0, msg.id);
8027bd6: 687b ldr r3, [r7, #4]
8027bd8: 6918 ldr r0, [r3, #16]
8027bda: 687b ldr r3, [r7, #4]
8027bdc: 689b ldr r3, [r3, #8]
8027bde: 4619 mov r1, r3
8027be0: 8abb ldrh r3, [r7, #20]
8027be2: 9300 str r3, [sp, #0]
8027be4: 2300 movs r3, #0
8027be6: 2204 movs r2, #4
8027be8: f001 f9d9 bl 8028f9e <MQTTSerialize_ack>
8027bec: 6378 str r0, [r7, #52] @ 0x34
8027bee: e00e b.n 8027c0e <cycle+0x10e>
else if (msg.qos == QOS2)
8027bf0: 7c3b ldrb r3, [r7, #16]
8027bf2: 2b02 cmp r3, #2
8027bf4: d10b bne.n 8027c0e <cycle+0x10e>
len = MQTTSerialize_ack(c->buf, c->buf_size, PUBREC, 0, msg.id);
8027bf6: 687b ldr r3, [r7, #4]
8027bf8: 6918 ldr r0, [r3, #16]
8027bfa: 687b ldr r3, [r7, #4]
8027bfc: 689b ldr r3, [r3, #8]
8027bfe: 4619 mov r1, r3
8027c00: 8abb ldrh r3, [r7, #20]
8027c02: 9300 str r3, [sp, #0]
8027c04: 2300 movs r3, #0
8027c06: 2205 movs r2, #5
8027c08: f001 f9c9 bl 8028f9e <MQTTSerialize_ack>
8027c0c: 6378 str r0, [r7, #52] @ 0x34
if (len <= 0)
8027c0e: 6b7b ldr r3, [r7, #52] @ 0x34
8027c10: 2b00 cmp r3, #0
8027c12: dc03 bgt.n 8027c1c <cycle+0x11c>
rc = FAILURE;
8027c14: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027c18: 633b str r3, [r7, #48] @ 0x30
8027c1a: e005 b.n 8027c28 <cycle+0x128>
else
rc = sendPacket(c, len, timer);
8027c1c: 683a ldr r2, [r7, #0]
8027c1e: 6b79 ldr r1, [r7, #52] @ 0x34
8027c20: 6878 ldr r0, [r7, #4]
8027c22: f7ff fcb6 bl 8027592 <sendPacket>
8027c26: 6338 str r0, [r7, #48] @ 0x30
if (rc == FAILURE)
8027c28: 6b3b ldr r3, [r7, #48] @ 0x30
8027c2a: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8027c2e: d144 bne.n 8027cba <cycle+0x1ba>
goto exit; // there was a problem
8027c30: e053 b.n 8027cda <cycle+0x1da>
case PUBREC:
case PUBREL:
{
unsigned short mypacketid;
unsigned char dup, type;
if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
8027c32: 687b ldr r3, [r7, #4]
8027c34: 695c ldr r4, [r3, #20]
8027c36: 687b ldr r3, [r7, #4]
8027c38: 68db ldr r3, [r3, #12]
8027c3a: f107 020a add.w r2, r7, #10
8027c3e: f107 0109 add.w r1, r7, #9
8027c42: f107 0008 add.w r0, r7, #8
8027c46: 9300 str r3, [sp, #0]
8027c48: 4623 mov r3, r4
8027c4a: f000 fec1 bl 80289d0 <MQTTDeserialize_ack>
8027c4e: 4603 mov r3, r0
8027c50: 2b01 cmp r3, #1
8027c52: d003 beq.n 8027c5c <cycle+0x15c>
rc = FAILURE;
8027c54: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027c58: 633b str r3, [r7, #48] @ 0x30
8027c5a: e023 b.n 8027ca4 <cycle+0x1a4>
else if ((len = MQTTSerialize_ack(c->buf, c->buf_size,
8027c5c: 687b ldr r3, [r7, #4]
8027c5e: 6918 ldr r0, [r3, #16]
8027c60: 687b ldr r3, [r7, #4]
8027c62: 689b ldr r3, [r3, #8]
8027c64: 4619 mov r1, r3
8027c66: 6afb ldr r3, [r7, #44] @ 0x2c
8027c68: 2b05 cmp r3, #5
8027c6a: d101 bne.n 8027c70 <cycle+0x170>
8027c6c: 2206 movs r2, #6
8027c6e: e000 b.n 8027c72 <cycle+0x172>
8027c70: 2207 movs r2, #7
8027c72: 897b ldrh r3, [r7, #10]
8027c74: 9300 str r3, [sp, #0]
8027c76: 2300 movs r3, #0
8027c78: f001 f991 bl 8028f9e <MQTTSerialize_ack>
8027c7c: 6378 str r0, [r7, #52] @ 0x34
8027c7e: 6b7b ldr r3, [r7, #52] @ 0x34
8027c80: 2b00 cmp r3, #0
8027c82: dc03 bgt.n 8027c8c <cycle+0x18c>
(packet_type == PUBREC) ? PUBREL : PUBCOMP, 0, mypacketid)) <= 0)
rc = FAILURE;
8027c84: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027c88: 633b str r3, [r7, #48] @ 0x30
8027c8a: e00b b.n 8027ca4 <cycle+0x1a4>
else if ((rc = sendPacket(c, len, timer)) != MQTT_SUCCESS) // send the PUBREL packet
8027c8c: 683a ldr r2, [r7, #0]
8027c8e: 6b79 ldr r1, [r7, #52] @ 0x34
8027c90: 6878 ldr r0, [r7, #4]
8027c92: f7ff fc7e bl 8027592 <sendPacket>
8027c96: 6338 str r0, [r7, #48] @ 0x30
8027c98: 6b3b ldr r3, [r7, #48] @ 0x30
8027c9a: 2b00 cmp r3, #0
8027c9c: d002 beq.n 8027ca4 <cycle+0x1a4>
rc = FAILURE; // there was a problem
8027c9e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027ca2: 633b str r3, [r7, #48] @ 0x30
if (rc == FAILURE)
8027ca4: 6b3b ldr r3, [r7, #48] @ 0x30
8027ca6: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8027caa: d108 bne.n 8027cbe <cycle+0x1be>
goto exit; // there was a problem
8027cac: e015 b.n 8027cda <cycle+0x1da>
}
case PUBCOMP:
break;
case PINGRESP:
c->ping_outstanding = 0;
8027cae: 687b ldr r3, [r7, #4]
8027cb0: 2200 movs r2, #0
8027cb2: 771a strb r2, [r3, #28]
break;
8027cb4: e004 b.n 8027cc0 <cycle+0x1c0>
break;
8027cb6: bf00 nop
8027cb8: e002 b.n 8027cc0 <cycle+0x1c0>
break;
8027cba: bf00 nop
8027cbc: e000 b.n 8027cc0 <cycle+0x1c0>
break;
8027cbe: bf00 nop
}
if (keepalive(c) != MQTT_SUCCESS) {
8027cc0: 6878 ldr r0, [r7, #4]
8027cc2: f7ff fe9a bl 80279fa <keepalive>
8027cc6: 4603 mov r3, r0
8027cc8: 2b00 cmp r3, #0
8027cca: d005 beq.n 8027cd8 <cycle+0x1d8>
//check only keepalive FAILURE status so that previous FAILURE status can be considered as FAULT
rc = FAILURE;
8027ccc: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027cd0: 633b str r3, [r7, #48] @ 0x30
8027cd2: e002 b.n 8027cda <cycle+0x1da>
goto exit;
8027cd4: bf00 nop
8027cd6: e000 b.n 8027cda <cycle+0x1da>
}
exit:
8027cd8: bf00 nop
if (rc == MQTT_SUCCESS)
8027cda: 6b3b ldr r3, [r7, #48] @ 0x30
8027cdc: 2b00 cmp r3, #0
8027cde: d102 bne.n 8027ce6 <cycle+0x1e6>
rc = packet_type;
8027ce0: 6afb ldr r3, [r7, #44] @ 0x2c
8027ce2: 633b str r3, [r7, #48] @ 0x30
8027ce4: e006 b.n 8027cf4 <cycle+0x1f4>
else if (c->isconnected)
8027ce6: 687b ldr r3, [r7, #4]
8027ce8: 6a1b ldr r3, [r3, #32]
8027cea: 2b00 cmp r3, #0
8027cec: d002 beq.n 8027cf4 <cycle+0x1f4>
MQTTCloseSession(c);
8027cee: 6878 ldr r0, [r7, #4]
8027cf0: f7ff fef0 bl 8027ad4 <MQTTCloseSession>
return rc;
8027cf4: 6b3b ldr r3, [r7, #48] @ 0x30
}
8027cf6: 4618 mov r0, r3
8027cf8: 373c adds r7, #60 @ 0x3c
8027cfa: 46bd mov sp, r7
8027cfc: bdf0 pop {r4, r5, r6, r7, pc}
8027cfe: bf00 nop
08027d00 <MQTTYield>:
int MQTTYield(MQTTClient* c, int timeout_ms)
{
8027d00: b580 push {r7, lr}
8027d02: b086 sub sp, #24
8027d04: af00 add r7, sp, #0
8027d06: 6078 str r0, [r7, #4]
8027d08: 6039 str r1, [r7, #0]
int rc = MQTT_SUCCESS;
8027d0a: 2300 movs r3, #0
8027d0c: 617b str r3, [r7, #20]
Timer timer;
TimerInit(&timer);
8027d0e: f107 030c add.w r3, r7, #12
8027d12: 4618 mov r0, r3
8027d14: f000 fb3e bl 8028394 <TimerInit>
TimerCountdownMS(&timer, timeout_ms);
8027d18: 683a ldr r2, [r7, #0]
8027d1a: f107 030c add.w r3, r7, #12
8027d1e: 4611 mov r1, r2
8027d20: 4618 mov r0, r3
8027d22: f000 faf5 bl 8028310 <TimerCountdownMS>
do
{
if (cycle(c, &timer) < 0)
8027d26: f107 030c add.w r3, r7, #12
8027d2a: 4619 mov r1, r3
8027d2c: 6878 ldr r0, [r7, #4]
8027d2e: f7ff fee7 bl 8027b00 <cycle>
8027d32: 4603 mov r3, r0
8027d34: 2b00 cmp r3, #0
8027d36: da03 bge.n 8027d40 <MQTTYield+0x40>
{
rc = FAILURE;
8027d38: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027d3c: 617b str r3, [r7, #20]
break;
8027d3e: e007 b.n 8027d50 <MQTTYield+0x50>
}
} while (!TimerIsExpired(&timer));
8027d40: f107 030c add.w r3, r7, #12
8027d44: 4618 mov r0, r3
8027d46: f000 facd bl 80282e4 <TimerIsExpired>
8027d4a: 4603 mov r3, r0
8027d4c: 2b00 cmp r3, #0
8027d4e: d0ea beq.n 8027d26 <MQTTYield+0x26>
return rc;
8027d50: 697b ldr r3, [r7, #20]
}
8027d52: 4618 mov r0, r3
8027d54: 3718 adds r7, #24
8027d56: 46bd mov sp, r7
8027d58: bd80 pop {r7, pc}
08027d5a <waitfor>:
}
#endif
int waitfor(MQTTClient* c, int packet_type, Timer* timer)
{
8027d5a: b580 push {r7, lr}
8027d5c: b086 sub sp, #24
8027d5e: af00 add r7, sp, #0
8027d60: 60f8 str r0, [r7, #12]
8027d62: 60b9 str r1, [r7, #8]
8027d64: 607a str r2, [r7, #4]
int rc = FAILURE;
8027d66: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027d6a: 617b str r3, [r7, #20]
do
{
if (TimerIsExpired(timer))
8027d6c: 6878 ldr r0, [r7, #4]
8027d6e: f000 fab9 bl 80282e4 <TimerIsExpired>
8027d72: 4603 mov r3, r0
8027d74: 2b00 cmp r3, #0
8027d76: d10c bne.n 8027d92 <waitfor+0x38>
break; // we timed out
rc = cycle(c, timer);
8027d78: 6879 ldr r1, [r7, #4]
8027d7a: 68f8 ldr r0, [r7, #12]
8027d7c: f7ff fec0 bl 8027b00 <cycle>
8027d80: 6178 str r0, [r7, #20]
}
while (rc != packet_type && rc >= 0);
8027d82: 697a ldr r2, [r7, #20]
8027d84: 68bb ldr r3, [r7, #8]
8027d86: 429a cmp r2, r3
8027d88: d004 beq.n 8027d94 <waitfor+0x3a>
8027d8a: 697b ldr r3, [r7, #20]
8027d8c: 2b00 cmp r3, #0
8027d8e: daed bge.n 8027d6c <waitfor+0x12>
8027d90: e000 b.n 8027d94 <waitfor+0x3a>
break; // we timed out
8027d92: bf00 nop
return rc;
8027d94: 697b ldr r3, [r7, #20]
}
8027d96: 4618 mov r0, r3
8027d98: 3718 adds r7, #24
8027d9a: 46bd mov sp, r7
8027d9c: bd80 pop {r7, pc}
...
08027da0 <MQTTConnectWithResults>:
int MQTTConnectWithResults(MQTTClient* c, MQTTPacket_connectData* options, MQTTConnackData* data)
{
8027da0: b580 push {r7, lr}
8027da2: b09e sub sp, #120 @ 0x78
8027da4: af00 add r7, sp, #0
8027da6: 60f8 str r0, [r7, #12]
8027da8: 60b9 str r1, [r7, #8]
8027daa: 607a str r2, [r7, #4]
Timer connect_timer;
int rc = FAILURE;
8027dac: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027db0: 677b str r3, [r7, #116] @ 0x74
MQTTPacket_connectData default_options = MQTTPacket_connectData_initializer;
8027db2: 4a49 ldr r2, [pc, #292] @ (8027ed8 <MQTTConnectWithResults+0x138>)
8027db4: f107 0310 add.w r3, r7, #16
8027db8: 4611 mov r1, r2
8027dba: 2258 movs r2, #88 @ 0x58
8027dbc: 4618 mov r0, r3
8027dbe: f003 f8be bl 802af3e <memcpy>
int len = 0;
8027dc2: 2300 movs r3, #0
8027dc4: 673b str r3, [r7, #112] @ 0x70
#if defined(MQTT_TASK)
MutexLock(&c->mutex);
#endif
// osMutexAcquire(mqttMutex, osWaitForever);
osMutexAcquire(c->mutex, osWaitForever);
8027dc6: 68fb ldr r3, [r7, #12]
8027dc8: 6e9b ldr r3, [r3, #104] @ 0x68
8027dca: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8027dce: 4618 mov r0, r3
8027dd0: f7e9 fdc1 bl 8011956 <osMutexAcquire>
if (c->isconnected) /* don't send connect packet again if we are already connected */
8027dd4: 68fb ldr r3, [r7, #12]
8027dd6: 6a1b ldr r3, [r3, #32]
8027dd8: 2b00 cmp r3, #0
8027dda: d164 bne.n 8027ea6 <MQTTConnectWithResults+0x106>
goto exit;
TimerInit(&connect_timer);
8027ddc: f107 0368 add.w r3, r7, #104 @ 0x68
8027de0: 4618 mov r0, r3
8027de2: f000 fad7 bl 8028394 <TimerInit>
TimerCountdownMS(&connect_timer, c->command_timeout_ms);
8027de6: 68fb ldr r3, [r7, #12]
8027de8: 685a ldr r2, [r3, #4]
8027dea: f107 0368 add.w r3, r7, #104 @ 0x68
8027dee: 4611 mov r1, r2
8027df0: 4618 mov r0, r3
8027df2: f000 fa8d bl 8028310 <TimerCountdownMS>
if (options == 0)
8027df6: 68bb ldr r3, [r7, #8]
8027df8: 2b00 cmp r3, #0
8027dfa: d102 bne.n 8027e02 <MQTTConnectWithResults+0x62>
options = &default_options; /* set default options if none were supplied */
8027dfc: f107 0310 add.w r3, r7, #16
8027e00: 60bb str r3, [r7, #8]
c->keepAliveInterval = options->keepAliveInterval;
8027e02: 68bb ldr r3, [r7, #8]
8027e04: 8b1b ldrh r3, [r3, #24]
8027e06: 461a mov r2, r3
8027e08: 68fb ldr r3, [r7, #12]
8027e0a: 619a str r2, [r3, #24]
c->cleansession = options->cleansession;
8027e0c: 68bb ldr r3, [r7, #8]
8027e0e: 7e9b ldrb r3, [r3, #26]
8027e10: 461a mov r2, r3
8027e12: 68fb ldr r3, [r7, #12]
8027e14: 625a str r2, [r3, #36] @ 0x24
TimerCountdown(&c->last_received, c->keepAliveInterval);
8027e16: 68fb ldr r3, [r7, #12]
8027e18: f103 0260 add.w r2, r3, #96 @ 0x60
8027e1c: 68fb ldr r3, [r7, #12]
8027e1e: 699b ldr r3, [r3, #24]
8027e20: 4619 mov r1, r3
8027e22: 4610 mov r0, r2
8027e24: f000 fa88 bl 8028338 <TimerCountdown>
if ((len = MQTTSerialize_connect(c->buf, c->buf_size, options)) <= 0)
8027e28: 68fb ldr r3, [r7, #12]
8027e2a: 6918 ldr r0, [r3, #16]
8027e2c: 68fb ldr r3, [r7, #12]
8027e2e: 689b ldr r3, [r3, #8]
8027e30: 68ba ldr r2, [r7, #8]
8027e32: 4619 mov r1, r3
8027e34: f000 fbd2 bl 80285dc <MQTTSerialize_connect>
8027e38: 6738 str r0, [r7, #112] @ 0x70
8027e3a: 6f3b ldr r3, [r7, #112] @ 0x70
8027e3c: 2b00 cmp r3, #0
8027e3e: dd34 ble.n 8027eaa <MQTTConnectWithResults+0x10a>
goto exit;
if ((rc = sendPacket(c, len, &connect_timer)) != MQTT_SUCCESS) // send the connect packet
8027e40: f107 0368 add.w r3, r7, #104 @ 0x68
8027e44: 461a mov r2, r3
8027e46: 6f39 ldr r1, [r7, #112] @ 0x70
8027e48: 68f8 ldr r0, [r7, #12]
8027e4a: f7ff fba2 bl 8027592 <sendPacket>
8027e4e: 6778 str r0, [r7, #116] @ 0x74
8027e50: 6f7b ldr r3, [r7, #116] @ 0x74
8027e52: 2b00 cmp r3, #0
8027e54: d12b bne.n 8027eae <MQTTConnectWithResults+0x10e>
goto exit; // there was a problem
// this will be a blocking call, wait for the connack
if (waitfor(c, CONNACK, &connect_timer) == CONNACK)
8027e56: f107 0368 add.w r3, r7, #104 @ 0x68
8027e5a: 461a mov r2, r3
8027e5c: 2102 movs r1, #2
8027e5e: 68f8 ldr r0, [r7, #12]
8027e60: f7ff ff7b bl 8027d5a <waitfor>
8027e64: 4603 mov r3, r0
8027e66: 2b02 cmp r3, #2
8027e68: d119 bne.n 8027e9e <MQTTConnectWithResults+0xfe>
{
data->rc = 0;
8027e6a: 687b ldr r3, [r7, #4]
8027e6c: 2200 movs r2, #0
8027e6e: 701a strb r2, [r3, #0]
data->sessionPresent = 0;
8027e70: 687b ldr r3, [r7, #4]
8027e72: 2200 movs r2, #0
8027e74: 705a strb r2, [r3, #1]
if (MQTTDeserialize_connack(&data->sessionPresent, &data->rc, c->readbuf, c->readbuf_size) == 1)
8027e76: 687b ldr r3, [r7, #4]
8027e78: 1c58 adds r0, r3, #1
8027e7a: 6879 ldr r1, [r7, #4]
8027e7c: 68fb ldr r3, [r7, #12]
8027e7e: 695a ldr r2, [r3, #20]
8027e80: 68fb ldr r3, [r7, #12]
8027e82: 68db ldr r3, [r3, #12]
8027e84: f000 fc96 bl 80287b4 <MQTTDeserialize_connack>
8027e88: 4603 mov r3, r0
8027e8a: 2b01 cmp r3, #1
8027e8c: d103 bne.n 8027e96 <MQTTConnectWithResults+0xf6>
rc = data->rc;
8027e8e: 687b ldr r3, [r7, #4]
8027e90: 781b ldrb r3, [r3, #0]
8027e92: 677b str r3, [r7, #116] @ 0x74
8027e94: e00c b.n 8027eb0 <MQTTConnectWithResults+0x110>
// rc = MQTT_SUCCESS;
else
rc = FAILURE;
8027e96: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027e9a: 677b str r3, [r7, #116] @ 0x74
8027e9c: e008 b.n 8027eb0 <MQTTConnectWithResults+0x110>
}
else
rc = FAILURE;
8027e9e: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027ea2: 677b str r3, [r7, #116] @ 0x74
8027ea4: e004 b.n 8027eb0 <MQTTConnectWithResults+0x110>
goto exit;
8027ea6: bf00 nop
8027ea8: e002 b.n 8027eb0 <MQTTConnectWithResults+0x110>
goto exit;
8027eaa: bf00 nop
8027eac: e000 b.n 8027eb0 <MQTTConnectWithResults+0x110>
goto exit; // there was a problem
8027eae: bf00 nop
exit:
if (rc == MQTT_SUCCESS)
8027eb0: 6f7b ldr r3, [r7, #116] @ 0x74
8027eb2: 2b00 cmp r3, #0
8027eb4: d105 bne.n 8027ec2 <MQTTConnectWithResults+0x122>
{
c->isconnected = 1;
8027eb6: 68fb ldr r3, [r7, #12]
8027eb8: 2201 movs r2, #1
8027eba: 621a str r2, [r3, #32]
c->ping_outstanding = 0;
8027ebc: 68fb ldr r3, [r7, #12]
8027ebe: 2200 movs r2, #0
8027ec0: 771a strb r2, [r3, #28]
#if defined(MQTT_TASK)
MutexUnlock(&c->mutex);
#endif
// osMutexRelease(mqttMutex);
osMutexRelease(c->mutex);
8027ec2: 68fb ldr r3, [r7, #12]
8027ec4: 6e9b ldr r3, [r3, #104] @ 0x68
8027ec6: 4618 mov r0, r3
8027ec8: f7e9 fd90 bl 80119ec <osMutexRelease>
return rc;
8027ecc: 6f7b ldr r3, [r7, #116] @ 0x74
}
8027ece: 4618 mov r0, r3
8027ed0: 3778 adds r7, #120 @ 0x78
8027ed2: 46bd mov sp, r7
8027ed4: bd80 pop {r7, pc}
8027ed6: bf00 nop
8027ed8: 08031b70 .word 0x08031b70
08027edc <MQTTConnect>:
int MQTTConnect(MQTTClient* c, MQTTPacket_connectData* options)
{
8027edc: b580 push {r7, lr}
8027ede: b084 sub sp, #16
8027ee0: af00 add r7, sp, #0
8027ee2: 6078 str r0, [r7, #4]
8027ee4: 6039 str r1, [r7, #0]
MQTTConnackData data;
return MQTTConnectWithResults(c, options, &data);
8027ee6: f107 030c add.w r3, r7, #12
8027eea: 461a mov r2, r3
8027eec: 6839 ldr r1, [r7, #0]
8027eee: 6878 ldr r0, [r7, #4]
8027ef0: f7ff ff56 bl 8027da0 <MQTTConnectWithResults>
8027ef4: 4603 mov r3, r0
}
8027ef6: 4618 mov r0, r3
8027ef8: 3710 adds r7, #16
8027efa: 46bd mov sp, r7
8027efc: bd80 pop {r7, pc}
08027efe <MQTTSetMessageHandler>:
int MQTTSetMessageHandler(MQTTClient* c, const char* topicFilter, messageHandler messageHandler)
{
8027efe: b580 push {r7, lr}
8027f00: b086 sub sp, #24
8027f02: af00 add r7, sp, #0
8027f04: 60f8 str r0, [r7, #12]
8027f06: 60b9 str r1, [r7, #8]
8027f08: 607a str r2, [r7, #4]
int rc = FAILURE;
8027f0a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027f0e: 617b str r3, [r7, #20]
int i = -1;
8027f10: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027f14: 613b str r3, [r7, #16]
/* first check for an existing matching slot */
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
8027f16: 2300 movs r3, #0
8027f18: 613b str r3, [r7, #16]
8027f1a: e028 b.n 8027f6e <MQTTSetMessageHandler+0x70>
{
if (c->messageHandlers[i].topicFilter != NULL && strcmp(c->messageHandlers[i].topicFilter, topicFilter) == 0)
8027f1c: 68fb ldr r3, [r7, #12]
8027f1e: 693a ldr r2, [r7, #16]
8027f20: 3205 adds r2, #5
8027f22: f853 3032 ldr.w r3, [r3, r2, lsl #3]
8027f26: 2b00 cmp r3, #0
8027f28: d01e beq.n 8027f68 <MQTTSetMessageHandler+0x6a>
8027f2a: 68fb ldr r3, [r7, #12]
8027f2c: 693a ldr r2, [r7, #16]
8027f2e: 3205 adds r2, #5
8027f30: f853 3032 ldr.w r3, [r3, r2, lsl #3]
8027f34: 68b9 ldr r1, [r7, #8]
8027f36: 4618 mov r0, r3
8027f38: f7d8 f9d2 bl 80002e0 <strcmp>
8027f3c: 4603 mov r3, r0
8027f3e: 2b00 cmp r3, #0
8027f40: d112 bne.n 8027f68 <MQTTSetMessageHandler+0x6a>
{
if (messageHandler == NULL) /* remove existing */
8027f42: 687b ldr r3, [r7, #4]
8027f44: 2b00 cmp r3, #0
8027f46: d10c bne.n 8027f62 <MQTTSetMessageHandler+0x64>
{
c->messageHandlers[i].topicFilter = NULL;
8027f48: 68fb ldr r3, [r7, #12]
8027f4a: 693a ldr r2, [r7, #16]
8027f4c: 3205 adds r2, #5
8027f4e: 2100 movs r1, #0
8027f50: f843 1032 str.w r1, [r3, r2, lsl #3]
c->messageHandlers[i].fp = NULL;
8027f54: 68fa ldr r2, [r7, #12]
8027f56: 693b ldr r3, [r7, #16]
8027f58: 3305 adds r3, #5
8027f5a: 00db lsls r3, r3, #3
8027f5c: 4413 add r3, r2
8027f5e: 2200 movs r2, #0
8027f60: 605a str r2, [r3, #4]
}
rc = MQTT_SUCCESS; /* return i when adding new subscription */
8027f62: 2300 movs r3, #0
8027f64: 617b str r3, [r7, #20]
break;
8027f66: e005 b.n 8027f74 <MQTTSetMessageHandler+0x76>
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
8027f68: 693b ldr r3, [r7, #16]
8027f6a: 3301 adds r3, #1
8027f6c: 613b str r3, [r7, #16]
8027f6e: 693b ldr r3, [r7, #16]
8027f70: 2b04 cmp r3, #4
8027f72: ddd3 ble.n 8027f1c <MQTTSetMessageHandler+0x1e>
}
}
/* if no existing, look for empty slot (unless we are removing) */
if (messageHandler != NULL) {
8027f74: 687b ldr r3, [r7, #4]
8027f76: 2b00 cmp r3, #0
8027f78: d026 beq.n 8027fc8 <MQTTSetMessageHandler+0xca>
if (rc == FAILURE)
8027f7a: 697b ldr r3, [r7, #20]
8027f7c: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
8027f80: d112 bne.n 8027fa8 <MQTTSetMessageHandler+0xaa>
{
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
8027f82: 2300 movs r3, #0
8027f84: 613b str r3, [r7, #16]
8027f86: e00c b.n 8027fa2 <MQTTSetMessageHandler+0xa4>
{
if (c->messageHandlers[i].topicFilter == NULL)
8027f88: 68fb ldr r3, [r7, #12]
8027f8a: 693a ldr r2, [r7, #16]
8027f8c: 3205 adds r2, #5
8027f8e: f853 3032 ldr.w r3, [r3, r2, lsl #3]
8027f92: 2b00 cmp r3, #0
8027f94: d102 bne.n 8027f9c <MQTTSetMessageHandler+0x9e>
{
rc = MQTT_SUCCESS;
8027f96: 2300 movs r3, #0
8027f98: 617b str r3, [r7, #20]
break;
8027f9a: e005 b.n 8027fa8 <MQTTSetMessageHandler+0xaa>
for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
8027f9c: 693b ldr r3, [r7, #16]
8027f9e: 3301 adds r3, #1
8027fa0: 613b str r3, [r7, #16]
8027fa2: 693b ldr r3, [r7, #16]
8027fa4: 2b04 cmp r3, #4
8027fa6: ddef ble.n 8027f88 <MQTTSetMessageHandler+0x8a>
}
}
}
if (i < MAX_MESSAGE_HANDLERS)
8027fa8: 693b ldr r3, [r7, #16]
8027faa: 2b04 cmp r3, #4
8027fac: dc0c bgt.n 8027fc8 <MQTTSetMessageHandler+0xca>
{
c->messageHandlers[i].topicFilter = topicFilter;
8027fae: 68fb ldr r3, [r7, #12]
8027fb0: 693a ldr r2, [r7, #16]
8027fb2: 3205 adds r2, #5
8027fb4: 68b9 ldr r1, [r7, #8]
8027fb6: f843 1032 str.w r1, [r3, r2, lsl #3]
c->messageHandlers[i].fp = messageHandler;
8027fba: 68fa ldr r2, [r7, #12]
8027fbc: 693b ldr r3, [r7, #16]
8027fbe: 3305 adds r3, #5
8027fc0: 00db lsls r3, r3, #3
8027fc2: 4413 add r3, r2
8027fc4: 687a ldr r2, [r7, #4]
8027fc6: 605a str r2, [r3, #4]
}
}
return rc;
8027fc8: 697b ldr r3, [r7, #20]
}
8027fca: 4618 mov r0, r3
8027fcc: 3718 adds r7, #24
8027fce: 46bd mov sp, r7
8027fd0: bd80 pop {r7, pc}
08027fd2 <MQTTSubscribeWithResults>:
int MQTTSubscribeWithResults(MQTTClient* c, const char* topicFilter, enum QoS qos,
messageHandler messageHandler, MQTTSubackData* data)
{
8027fd2: b5b0 push {r4, r5, r7, lr}
8027fd4: b094 sub sp, #80 @ 0x50
8027fd6: af04 add r7, sp, #16
8027fd8: 60f8 str r0, [r7, #12]
8027fda: 60b9 str r1, [r7, #8]
8027fdc: 603b str r3, [r7, #0]
8027fde: 4613 mov r3, r2
8027fe0: 71fb strb r3, [r7, #7]
int rc = FAILURE;
8027fe2: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8027fe6: 63fb str r3, [r7, #60] @ 0x3c
Timer timer;
int len = 0;
8027fe8: 2300 movs r3, #0
8027fea: 63bb str r3, [r7, #56] @ 0x38
MQTTString topic = MQTTString_initializer;
8027fec: 2300 movs r3, #0
8027fee: 627b str r3, [r7, #36] @ 0x24
8027ff0: 2300 movs r3, #0
8027ff2: 62bb str r3, [r7, #40] @ 0x28
8027ff4: 2300 movs r3, #0
8027ff6: 62fb str r3, [r7, #44] @ 0x2c
topic.cstring = (char *)topicFilter;
8027ff8: 68bb ldr r3, [r7, #8]
8027ffa: 627b str r3, [r7, #36] @ 0x24
#if defined(MQTT_TASK)
MutexLock(&c->mutex);
#endif
// osMutexAcquire(mqttMutex, osWaitForever);
osMutexAcquire(c->mutex, osWaitForever);
8027ffc: 68fb ldr r3, [r7, #12]
8027ffe: 6e9b ldr r3, [r3, #104] @ 0x68
8028000: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8028004: 4618 mov r0, r3
8028006: f7e9 fca6 bl 8011956 <osMutexAcquire>
if (!c->isconnected)
802800a: 68fb ldr r3, [r7, #12]
802800c: 6a1b ldr r3, [r3, #32]
802800e: 2b00 cmp r3, #0
8028010: d069 beq.n 80280e6 <MQTTSubscribeWithResults+0x114>
goto exit;
TimerInit(&timer);
8028012: f107 0330 add.w r3, r7, #48 @ 0x30
8028016: 4618 mov r0, r3
8028018: f000 f9bc bl 8028394 <TimerInit>
TimerCountdownMS(&timer, c->command_timeout_ms);
802801c: 68fb ldr r3, [r7, #12]
802801e: 685a ldr r2, [r3, #4]
8028020: f107 0330 add.w r3, r7, #48 @ 0x30
8028024: 4611 mov r1, r2
8028026: 4618 mov r0, r3
8028028: f000 f972 bl 8028310 <TimerCountdownMS>
int _qos[1] = {(int)qos};
802802c: 79fb ldrb r3, [r7, #7]
802802e: 623b str r3, [r7, #32]
len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, _qos);
8028030: 68fb ldr r3, [r7, #12]
8028032: 691c ldr r4, [r3, #16]
8028034: 68fb ldr r3, [r7, #12]
8028036: 689b ldr r3, [r3, #8]
8028038: 461d mov r5, r3
802803a: 68f8 ldr r0, [r7, #12]
802803c: f7ff fa90 bl 8027560 <getNextPacketId>
8028040: 4603 mov r3, r0
8028042: b29a uxth r2, r3
8028044: f107 0320 add.w r3, r7, #32
8028048: 9302 str r3, [sp, #8]
802804a: f107 0324 add.w r3, r7, #36 @ 0x24
802804e: 9301 str r3, [sp, #4]
8028050: 2301 movs r3, #1
8028052: 9300 str r3, [sp, #0]
8028054: 4613 mov r3, r2
8028056: 2200 movs r2, #0
8028058: 4629 mov r1, r5
802805a: 4620 mov r0, r4
802805c: f001 f81b bl 8029096 <MQTTSerialize_subscribe>
8028060: 63b8 str r0, [r7, #56] @ 0x38
// len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, (int*)&qos);
if (len <= 0)
8028062: 6bbb ldr r3, [r7, #56] @ 0x38
8028064: 2b00 cmp r3, #0
8028066: dd40 ble.n 80280ea <MQTTSubscribeWithResults+0x118>
goto exit;
if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
8028068: f107 0330 add.w r3, r7, #48 @ 0x30
802806c: 461a mov r2, r3
802806e: 6bb9 ldr r1, [r7, #56] @ 0x38
8028070: 68f8 ldr r0, [r7, #12]
8028072: f7ff fa8e bl 8027592 <sendPacket>
8028076: 63f8 str r0, [r7, #60] @ 0x3c
8028078: 6bfb ldr r3, [r7, #60] @ 0x3c
802807a: 2b00 cmp r3, #0
802807c: d137 bne.n 80280ee <MQTTSubscribeWithResults+0x11c>
goto exit; // there was a problem
if (waitfor(c, SUBACK, &timer) == SUBACK) // wait for suback
802807e: f107 0330 add.w r3, r7, #48 @ 0x30
8028082: 461a mov r2, r3
8028084: 2109 movs r1, #9
8028086: 68f8 ldr r0, [r7, #12]
8028088: f7ff fe67 bl 8027d5a <waitfor>
802808c: 4603 mov r3, r0
802808e: 2b09 cmp r3, #9
8028090: d125 bne.n 80280de <MQTTSubscribeWithResults+0x10c>
{
int count = 0;
8028092: 2300 movs r3, #0
8028094: 61fb str r3, [r7, #28]
unsigned short mypacketid;
data->grantedQoS = QOS0;
8028096: 6d3b ldr r3, [r7, #80] @ 0x50
8028098: 2200 movs r2, #0
802809a: 701a strb r2, [r3, #0]
int _grantedQoS[1] = {(int)&data->grantedQoS};
802809c: 6d3b ldr r3, [r7, #80] @ 0x50
802809e: 617b str r3, [r7, #20]
// if (MQTTDeserialize_suback(&mypacketid, 1, &count, (int*)&data->grantedQoS, c->readbuf, c->readbuf_size) == 1)
if (MQTTDeserialize_suback(&mypacketid, 1, &count, _grantedQoS, c->readbuf, c->readbuf_size) == 1)
80280a0: 68fb ldr r3, [r7, #12]
80280a2: 695b ldr r3, [r3, #20]
80280a4: 68fa ldr r2, [r7, #12]
80280a6: 68d2 ldr r2, [r2, #12]
80280a8: 4614 mov r4, r2
80280aa: f107 0114 add.w r1, r7, #20
80280ae: f107 021c add.w r2, r7, #28
80280b2: f107 001a add.w r0, r7, #26
80280b6: 9401 str r4, [sp, #4]
80280b8: 9300 str r3, [sp, #0]
80280ba: 460b mov r3, r1
80280bc: 2101 movs r1, #1
80280be: f001 f866 bl 802918e <MQTTDeserialize_suback>
80280c2: 4603 mov r3, r0
80280c4: 2b01 cmp r3, #1
80280c6: d113 bne.n 80280f0 <MQTTSubscribeWithResults+0x11e>
{
if (data->grantedQoS != 0x80)
80280c8: 6d3b ldr r3, [r7, #80] @ 0x50
80280ca: 781b ldrb r3, [r3, #0]
80280cc: 2b80 cmp r3, #128 @ 0x80
80280ce: d00f beq.n 80280f0 <MQTTSubscribeWithResults+0x11e>
rc = MQTTSetMessageHandler(c, topicFilter, messageHandler);
80280d0: 683a ldr r2, [r7, #0]
80280d2: 68b9 ldr r1, [r7, #8]
80280d4: 68f8 ldr r0, [r7, #12]
80280d6: f7ff ff12 bl 8027efe <MQTTSetMessageHandler>
80280da: 63f8 str r0, [r7, #60] @ 0x3c
80280dc: e008 b.n 80280f0 <MQTTSubscribeWithResults+0x11e>
}
}
else
rc = FAILURE;
80280de: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80280e2: 63fb str r3, [r7, #60] @ 0x3c
80280e4: e004 b.n 80280f0 <MQTTSubscribeWithResults+0x11e>
goto exit;
80280e6: bf00 nop
80280e8: e002 b.n 80280f0 <MQTTSubscribeWithResults+0x11e>
goto exit;
80280ea: bf00 nop
80280ec: e000 b.n 80280f0 <MQTTSubscribeWithResults+0x11e>
goto exit; // there was a problem
80280ee: bf00 nop
exit:
if (rc == FAILURE)
80280f0: 6bfb ldr r3, [r7, #60] @ 0x3c
80280f2: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80280f6: d102 bne.n 80280fe <MQTTSubscribeWithResults+0x12c>
MQTTCloseSession(c);
80280f8: 68f8 ldr r0, [r7, #12]
80280fa: f7ff fceb bl 8027ad4 <MQTTCloseSession>
#if defined(MQTT_TASK)
MutexUnlock(&c->mutex);
#endif
// osMutexRelease(mqttMutex);
osMutexRelease(c->mutex);
80280fe: 68fb ldr r3, [r7, #12]
8028100: 6e9b ldr r3, [r3, #104] @ 0x68
8028102: 4618 mov r0, r3
8028104: f7e9 fc72 bl 80119ec <osMutexRelease>
return rc;
8028108: 6bfb ldr r3, [r7, #60] @ 0x3c
}
802810a: 4618 mov r0, r3
802810c: 3740 adds r7, #64 @ 0x40
802810e: 46bd mov sp, r7
8028110: bdb0 pop {r4, r5, r7, pc}
08028112 <MQTTSubscribe>:
int MQTTSubscribe(MQTTClient* c, const char* topicFilter, enum QoS qos,
messageHandler messageHandler)
{
8028112: b580 push {r7, lr}
8028114: b088 sub sp, #32
8028116: af02 add r7, sp, #8
8028118: 60f8 str r0, [r7, #12]
802811a: 60b9 str r1, [r7, #8]
802811c: 603b str r3, [r7, #0]
802811e: 4613 mov r3, r2
8028120: 71fb strb r3, [r7, #7]
MQTTSubackData data;
return MQTTSubscribeWithResults(c, topicFilter, qos, messageHandler, &data);
8028122: 79fa ldrb r2, [r7, #7]
8028124: f107 0314 add.w r3, r7, #20
8028128: 9300 str r3, [sp, #0]
802812a: 683b ldr r3, [r7, #0]
802812c: 68b9 ldr r1, [r7, #8]
802812e: 68f8 ldr r0, [r7, #12]
8028130: f7ff ff4f bl 8027fd2 <MQTTSubscribeWithResults>
8028134: 4603 mov r3, r0
}
8028136: 4618 mov r0, r3
8028138: 3718 adds r7, #24
802813a: 46bd mov sp, r7
802813c: bd80 pop {r7, pc}
0802813e <MQTTPublish>:
return rc;
}
int MQTTPublish(MQTTClient* c, const char* topicName, MQTTMessage* message)
{
802813e: b5f0 push {r4, r5, r6, r7, lr}
8028140: b097 sub sp, #92 @ 0x5c
8028142: af08 add r7, sp, #32
8028144: 60f8 str r0, [r7, #12]
8028146: 60b9 str r1, [r7, #8]
8028148: 607a str r2, [r7, #4]
int rc = FAILURE;
802814a: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
802814e: 637b str r3, [r7, #52] @ 0x34
Timer timer;
MQTTString topic = MQTTString_initializer;
8028150: 2300 movs r3, #0
8028152: 61fb str r3, [r7, #28]
8028154: 2300 movs r3, #0
8028156: 623b str r3, [r7, #32]
8028158: 2300 movs r3, #0
802815a: 627b str r3, [r7, #36] @ 0x24
topic.cstring = (char *)topicName;
802815c: 68bb ldr r3, [r7, #8]
802815e: 61fb str r3, [r7, #28]
int len = 0;
8028160: 2300 movs r3, #0
8028162: 633b str r3, [r7, #48] @ 0x30
#if defined(MQTT_TASK)
MutexLock(&c->mutex);
#endif
// osMutexAcquire(mqttMutex, osWaitForever);
osMutexAcquire(c->mutex, osWaitForever);
8028164: 68fb ldr r3, [r7, #12]
8028166: 6e9b ldr r3, [r3, #104] @ 0x68
8028168: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
802816c: 4618 mov r0, r3
802816e: f7e9 fbf2 bl 8011956 <osMutexAcquire>
if (!c->isconnected)
8028172: 68fb ldr r3, [r7, #12]
8028174: 6a1b ldr r3, [r3, #32]
8028176: 2b00 cmp r3, #0
8028178: f000 809b beq.w 80282b2 <MQTTPublish+0x174>
goto exit;
TimerInit(&timer);
802817c: f107 0328 add.w r3, r7, #40 @ 0x28
8028180: 4618 mov r0, r3
8028182: f000 f907 bl 8028394 <TimerInit>
TimerCountdownMS(&timer, c->command_timeout_ms);
8028186: 68fb ldr r3, [r7, #12]
8028188: 685a ldr r2, [r3, #4]
802818a: f107 0328 add.w r3, r7, #40 @ 0x28
802818e: 4611 mov r1, r2
8028190: 4618 mov r0, r3
8028192: f000 f8bd bl 8028310 <TimerCountdownMS>
if (message->qos == QOS1 || message->qos == QOS2)
8028196: 687b ldr r3, [r7, #4]
8028198: 781b ldrb r3, [r3, #0]
802819a: 2b01 cmp r3, #1
802819c: d003 beq.n 80281a6 <MQTTPublish+0x68>
802819e: 687b ldr r3, [r7, #4]
80281a0: 781b ldrb r3, [r3, #0]
80281a2: 2b02 cmp r3, #2
80281a4: d106 bne.n 80281b4 <MQTTPublish+0x76>
message->id = getNextPacketId(c);
80281a6: 68f8 ldr r0, [r7, #12]
80281a8: f7ff f9da bl 8027560 <getNextPacketId>
80281ac: 4603 mov r3, r0
80281ae: b29a uxth r2, r3
80281b0: 687b ldr r3, [r7, #4]
80281b2: 809a strh r2, [r3, #4]
len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
80281b4: 68fb ldr r3, [r7, #12]
80281b6: 691b ldr r3, [r3, #16]
80281b8: 603b str r3, [r7, #0]
80281ba: 68fb ldr r3, [r7, #12]
80281bc: 689b ldr r3, [r3, #8]
80281be: 469c mov ip, r3
80281c0: 687b ldr r3, [r7, #4]
80281c2: 781b ldrb r3, [r3, #0]
80281c4: 469e mov lr, r3
80281c6: 687b ldr r3, [r7, #4]
80281c8: 785d ldrb r5, [r3, #1]
80281ca: 687b ldr r3, [r7, #4]
80281cc: 889e ldrh r6, [r3, #4]
topic, (unsigned char*)message->payload, message->payloadlen);
80281ce: 687b ldr r3, [r7, #4]
80281d0: 689b ldr r3, [r3, #8]
80281d2: 687a ldr r2, [r7, #4]
80281d4: 68d2 ldr r2, [r2, #12]
len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
80281d6: 9206 str r2, [sp, #24]
80281d8: 9305 str r3, [sp, #20]
80281da: ac02 add r4, sp, #8
80281dc: f107 031c add.w r3, r7, #28
80281e0: e893 0007 ldmia.w r3, {r0, r1, r2}
80281e4: e884 0007 stmia.w r4, {r0, r1, r2}
80281e8: 9601 str r6, [sp, #4]
80281ea: 9500 str r5, [sp, #0]
80281ec: 4673 mov r3, lr
80281ee: 2200 movs r2, #0
80281f0: 4661 mov r1, ip
80281f2: 6838 ldr r0, [r7, #0]
80281f4: f000 fe5d bl 8028eb2 <MQTTSerialize_publish>
80281f8: 6338 str r0, [r7, #48] @ 0x30
if (len <= 0)
80281fa: 6b3b ldr r3, [r7, #48] @ 0x30
80281fc: 2b00 cmp r3, #0
80281fe: dd5a ble.n 80282b6 <MQTTPublish+0x178>
goto exit;
if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
8028200: f107 0328 add.w r3, r7, #40 @ 0x28
8028204: 461a mov r2, r3
8028206: 6b39 ldr r1, [r7, #48] @ 0x30
8028208: 68f8 ldr r0, [r7, #12]
802820a: f7ff f9c2 bl 8027592 <sendPacket>
802820e: 6378 str r0, [r7, #52] @ 0x34
8028210: 6b7b ldr r3, [r7, #52] @ 0x34
8028212: 2b00 cmp r3, #0
8028214: d151 bne.n 80282ba <MQTTPublish+0x17c>
goto exit; // there was a problem
if (message->qos == QOS1)
8028216: 687b ldr r3, [r7, #4]
8028218: 781b ldrb r3, [r3, #0]
802821a: 2b01 cmp r3, #1
802821c: d122 bne.n 8028264 <MQTTPublish+0x126>
{
if (waitfor(c, PUBACK, &timer) == PUBACK)
802821e: f107 0328 add.w r3, r7, #40 @ 0x28
8028222: 461a mov r2, r3
8028224: 2104 movs r1, #4
8028226: 68f8 ldr r0, [r7, #12]
8028228: f7ff fd97 bl 8027d5a <waitfor>
802822c: 4603 mov r3, r0
802822e: 2b04 cmp r3, #4
8028230: d114 bne.n 802825c <MQTTPublish+0x11e>
{
unsigned short mypacketid;
unsigned char dup, type;
if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
8028232: 68fb ldr r3, [r7, #12]
8028234: 695c ldr r4, [r3, #20]
8028236: 68fb ldr r3, [r7, #12]
8028238: 68db ldr r3, [r3, #12]
802823a: f107 021a add.w r2, r7, #26
802823e: f107 0119 add.w r1, r7, #25
8028242: f107 0018 add.w r0, r7, #24
8028246: 9300 str r3, [sp, #0]
8028248: 4623 mov r3, r4
802824a: f000 fbc1 bl 80289d0 <MQTTDeserialize_ack>
802824e: 4603 mov r3, r0
8028250: 2b01 cmp r3, #1
8028252: d035 beq.n 80282c0 <MQTTPublish+0x182>
rc = FAILURE;
8028254: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8028258: 637b str r3, [r7, #52] @ 0x34
802825a: e031 b.n 80282c0 <MQTTPublish+0x182>
}
else
rc = FAILURE;
802825c: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8028260: 637b str r3, [r7, #52] @ 0x34
8028262: e02d b.n 80282c0 <MQTTPublish+0x182>
}
else if (message->qos == QOS2)
8028264: 687b ldr r3, [r7, #4]
8028266: 781b ldrb r3, [r3, #0]
8028268: 2b02 cmp r3, #2
802826a: d128 bne.n 80282be <MQTTPublish+0x180>
{
if (waitfor(c, PUBCOMP, &timer) == PUBCOMP)
802826c: f107 0328 add.w r3, r7, #40 @ 0x28
8028270: 461a mov r2, r3
8028272: 2107 movs r1, #7
8028274: 68f8 ldr r0, [r7, #12]
8028276: f7ff fd70 bl 8027d5a <waitfor>
802827a: 4603 mov r3, r0
802827c: 2b07 cmp r3, #7
802827e: d114 bne.n 80282aa <MQTTPublish+0x16c>
{
unsigned short mypacketid;
unsigned char dup, type;
if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
8028280: 68fb ldr r3, [r7, #12]
8028282: 695c ldr r4, [r3, #20]
8028284: 68fb ldr r3, [r7, #12]
8028286: 68db ldr r3, [r3, #12]
8028288: f107 0216 add.w r2, r7, #22
802828c: f107 0115 add.w r1, r7, #21
8028290: f107 0014 add.w r0, r7, #20
8028294: 9300 str r3, [sp, #0]
8028296: 4623 mov r3, r4
8028298: f000 fb9a bl 80289d0 <MQTTDeserialize_ack>
802829c: 4603 mov r3, r0
802829e: 2b01 cmp r3, #1
80282a0: d00e beq.n 80282c0 <MQTTPublish+0x182>
rc = FAILURE;
80282a2: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80282a6: 637b str r3, [r7, #52] @ 0x34
80282a8: e00a b.n 80282c0 <MQTTPublish+0x182>
}
else
rc = FAILURE;
80282aa: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80282ae: 637b str r3, [r7, #52] @ 0x34
80282b0: e006 b.n 80282c0 <MQTTPublish+0x182>
goto exit;
80282b2: bf00 nop
80282b4: e004 b.n 80282c0 <MQTTPublish+0x182>
goto exit;
80282b6: bf00 nop
80282b8: e002 b.n 80282c0 <MQTTPublish+0x182>
goto exit; // there was a problem
80282ba: bf00 nop
80282bc: e000 b.n 80282c0 <MQTTPublish+0x182>
}
exit:
80282be: bf00 nop
if (rc == FAILURE)
80282c0: 6b7b ldr r3, [r7, #52] @ 0x34
80282c2: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80282c6: d102 bne.n 80282ce <MQTTPublish+0x190>
MQTTCloseSession(c);
80282c8: 68f8 ldr r0, [r7, #12]
80282ca: f7ff fc03 bl 8027ad4 <MQTTCloseSession>
#if defined(MQTT_TASK)
MutexUnlock(&c->mutex);
#endif
// osMutexRelease(mqttMutex);
osMutexRelease(c->mutex);
80282ce: 68fb ldr r3, [r7, #12]
80282d0: 6e9b ldr r3, [r3, #104] @ 0x68
80282d2: 4618 mov r0, r3
80282d4: f7e9 fb8a bl 80119ec <osMutexRelease>
return rc;
80282d8: 6b7b ldr r3, [r7, #52] @ 0x34
}
80282da: 4618 mov r0, r3
80282dc: 373c adds r7, #60 @ 0x3c
80282de: 46bd mov sp, r7
80282e0: bdf0 pop {r4, r5, r6, r7, pc}
...
080282e4 <TimerIsExpired>:
#define SERVER_IP4 34
uint32_t MilliTimer;
//Timer functions
char TimerIsExpired(Timer *timer) {
80282e4: b480 push {r7}
80282e6: b085 sub sp, #20
80282e8: af00 add r7, sp, #0
80282ea: 6078 str r0, [r7, #4]
long left = timer->end_time - MilliTimer;
80282ec: 687b ldr r3, [r7, #4]
80282ee: 685a ldr r2, [r3, #4]
80282f0: 4b06 ldr r3, [pc, #24] @ (802830c <TimerIsExpired+0x28>)
80282f2: 681b ldr r3, [r3, #0]
80282f4: 1ad3 subs r3, r2, r3
80282f6: 60fb str r3, [r7, #12]
return (left < 0);
80282f8: 68fb ldr r3, [r7, #12]
80282fa: 0fdb lsrs r3, r3, #31
80282fc: b2db uxtb r3, r3
}
80282fe: 4618 mov r0, r3
8028300: 3714 adds r7, #20
8028302: 46bd mov sp, r7
8028304: f85d 7b04 ldr.w r7, [sp], #4
8028308: 4770 bx lr
802830a: bf00 nop
802830c: 2402b154 .word 0x2402b154
08028310 <TimerCountdownMS>:
void TimerCountdownMS(Timer *timer, unsigned int timeout) {
8028310: b480 push {r7}
8028312: b083 sub sp, #12
8028314: af00 add r7, sp, #0
8028316: 6078 str r0, [r7, #4]
8028318: 6039 str r1, [r7, #0]
timer->end_time = MilliTimer + timeout;
802831a: 4b06 ldr r3, [pc, #24] @ (8028334 <TimerCountdownMS+0x24>)
802831c: 681a ldr r2, [r3, #0]
802831e: 683b ldr r3, [r7, #0]
8028320: 441a add r2, r3
8028322: 687b ldr r3, [r7, #4]
8028324: 605a str r2, [r3, #4]
}
8028326: bf00 nop
8028328: 370c adds r7, #12
802832a: 46bd mov sp, r7
802832c: f85d 7b04 ldr.w r7, [sp], #4
8028330: 4770 bx lr
8028332: bf00 nop
8028334: 2402b154 .word 0x2402b154
08028338 <TimerCountdown>:
void TimerCountdown(Timer *timer, unsigned int timeout) {
8028338: b480 push {r7}
802833a: b083 sub sp, #12
802833c: af00 add r7, sp, #0
802833e: 6078 str r0, [r7, #4]
8028340: 6039 str r1, [r7, #0]
timer->end_time = MilliTimer + (timeout * 1000);
8028342: 683b ldr r3, [r7, #0]
8028344: f44f 727a mov.w r2, #1000 @ 0x3e8
8028348: fb03 f202 mul.w r2, r3, r2
802834c: 4b05 ldr r3, [pc, #20] @ (8028364 <TimerCountdown+0x2c>)
802834e: 681b ldr r3, [r3, #0]
8028350: 441a add r2, r3
8028352: 687b ldr r3, [r7, #4]
8028354: 605a str r2, [r3, #4]
}
8028356: bf00 nop
8028358: 370c adds r7, #12
802835a: 46bd mov sp, r7
802835c: f85d 7b04 ldr.w r7, [sp], #4
8028360: 4770 bx lr
8028362: bf00 nop
8028364: 2402b154 .word 0x2402b154
08028368 <TimerLeftMS>:
int TimerLeftMS(Timer *timer) {
8028368: b480 push {r7}
802836a: b085 sub sp, #20
802836c: af00 add r7, sp, #0
802836e: 6078 str r0, [r7, #4]
long left = timer->end_time - MilliTimer;
8028370: 687b ldr r3, [r7, #4]
8028372: 685a ldr r2, [r3, #4]
8028374: 4b06 ldr r3, [pc, #24] @ (8028390 <TimerLeftMS+0x28>)
8028376: 681b ldr r3, [r3, #0]
8028378: 1ad3 subs r3, r2, r3
802837a: 60fb str r3, [r7, #12]
return (left < 0) ? 0 : left;
802837c: 68fb ldr r3, [r7, #12]
802837e: ea23 73e3 bic.w r3, r3, r3, asr #31
}
8028382: 4618 mov r0, r3
8028384: 3714 adds r7, #20
8028386: 46bd mov sp, r7
8028388: f85d 7b04 ldr.w r7, [sp], #4
802838c: 4770 bx lr
802838e: bf00 nop
8028390: 2402b154 .word 0x2402b154
08028394 <TimerInit>:
void TimerInit(Timer *timer) {
8028394: b480 push {r7}
8028396: b083 sub sp, #12
8028398: af00 add r7, sp, #0
802839a: 6078 str r0, [r7, #4]
timer->end_time = 0;
802839c: 687b ldr r3, [r7, #4]
802839e: 2200 movs r2, #0
80283a0: 605a str r2, [r3, #4]
}
80283a2: bf00 nop
80283a4: 370c adds r7, #12
80283a6: 46bd mov sp, r7
80283a8: f85d 7b04 ldr.w r7, [sp], #4
80283ac: 4770 bx lr
...
080283b0 <NewNetwork>:
#ifdef MQTT_LWIP_SOCKET
void NewNetwork(Network *n) {
80283b0: b480 push {r7}
80283b2: b083 sub sp, #12
80283b4: af00 add r7, sp, #0
80283b6: 6078 str r0, [r7, #4]
n->socket = 0; //clear
80283b8: 687b ldr r3, [r7, #4]
80283ba: 2200 movs r2, #0
80283bc: 601a str r2, [r3, #0]
n->mqttread = net_read; //receive function
80283be: 687b ldr r3, [r7, #4]
80283c0: 4a06 ldr r2, [pc, #24] @ (80283dc <NewNetwork+0x2c>)
80283c2: 605a str r2, [r3, #4]
n->mqttwrite = net_write; //send function
80283c4: 687b ldr r3, [r7, #4]
80283c6: 4a06 ldr r2, [pc, #24] @ (80283e0 <NewNetwork+0x30>)
80283c8: 609a str r2, [r3, #8]
n->disconnect = net_disconnect; //disconnection function
80283ca: 687b ldr r3, [r7, #4]
80283cc: 4a05 ldr r2, [pc, #20] @ (80283e4 <NewNetwork+0x34>)
80283ce: 60da str r2, [r3, #12]
}
80283d0: bf00 nop
80283d2: 370c adds r7, #12
80283d4: 46bd mov sp, r7
80283d6: f85d 7b04 ldr.w r7, [sp], #4
80283da: 4770 bx lr
80283dc: 08028485 .word 0x08028485
80283e0: 080284d5 .word 0x080284d5
80283e4: 080284fb .word 0x080284fb
080283e8 <ConnectNetwork>:
int ConnectNetwork(Network *n, char *ip, int port) {
80283e8: b580 push {r7, lr}
80283ea: b088 sub sp, #32
80283ec: af00 add r7, sp, #0
80283ee: 60f8 str r0, [r7, #12]
80283f0: 60b9 str r1, [r7, #8]
80283f2: 607a str r2, [r7, #4]
struct sockaddr_in server_addr;
if(n->socket)
80283f4: 68fb ldr r3, [r7, #12]
80283f6: 681b ldr r3, [r3, #0]
80283f8: 2b00 cmp r3, #0
80283fa: d004 beq.n 8028406 <ConnectNetwork+0x1e>
{
close(n->socket);
80283fc: 68fb ldr r3, [r7, #12]
80283fe: 681b ldr r3, [r3, #0]
8028400: 4618 mov r0, r3
8028402: f7f0 fa65 bl 80188d0 <lwip_close>
}
n->socket = socket(PF_INET, SOCK_STREAM, 0); //create socket
8028406: 2200 movs r2, #0
8028408: 2101 movs r1, #1
802840a: 2002 movs r0, #2
802840c: f7f0 ff72 bl 80192f4 <lwip_socket>
8028410: 4602 mov r2, r0
8028412: 68fb ldr r3, [r7, #12]
8028414: 601a str r2, [r3, #0]
if(n->socket < 0)
8028416: 68fb ldr r3, [r7, #12]
8028418: 681b ldr r3, [r3, #0]
802841a: 2b00 cmp r3, #0
802841c: da05 bge.n 802842a <ConnectNetwork+0x42>
{
n->socket = 0;
802841e: 68fb ldr r3, [r7, #12]
8028420: 2200 movs r2, #0
8028422: 601a str r2, [r3, #0]
return -1;
8028424: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8028428: e028 b.n 802847c <ConnectNetwork+0x94>
}
memset(&server_addr, 0, sizeof(struct sockaddr_in)); //broker address info
802842a: f107 0310 add.w r3, r7, #16
802842e: 2210 movs r2, #16
8028430: 2100 movs r1, #0
8028432: 4618 mov r0, r3
8028434: f002 fc8c bl 802ad50 <memset>
server_addr.sin_family = AF_INET;
8028438: 2302 movs r3, #2
802843a: 747b strb r3, [r7, #17]
server_addr.sin_addr.s_addr = inet_addr(ip);
802843c: 68b8 ldr r0, [r7, #8]
802843e: f7fd fde0 bl 8026002 <ipaddr_addr>
8028442: 4603 mov r3, r0
8028444: 617b str r3, [r7, #20]
server_addr.sin_port = htons(port);
8028446: 687b ldr r3, [r7, #4]
8028448: b29b uxth r3, r3
802844a: 4618 mov r0, r3
802844c: f7f1 fb94 bl 8019b78 <lwip_htons>
8028450: 4603 mov r3, r0
8028452: 827b strh r3, [r7, #18]
if(connect(n->socket, (struct sockaddr*)&server_addr, sizeof(struct sockaddr_in)) < 0) //connect to the broker
8028454: 68fb ldr r3, [r7, #12]
8028456: 681b ldr r3, [r3, #0]
8028458: f107 0110 add.w r1, r7, #16
802845c: 2210 movs r2, #16
802845e: 4618 mov r0, r3
8028460: f7f0 fa8c bl 801897c <lwip_connect>
8028464: 4603 mov r3, r0
8028466: 2b00 cmp r3, #0
8028468: da07 bge.n 802847a <ConnectNetwork+0x92>
{
close(n->socket);
802846a: 68fb ldr r3, [r7, #12]
802846c: 681b ldr r3, [r3, #0]
802846e: 4618 mov r0, r3
8028470: f7f0 fa2e bl 80188d0 <lwip_close>
return -1;
8028474: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8028478: e000 b.n 802847c <ConnectNetwork+0x94>
}
return 0;
802847a: 2300 movs r3, #0
}
802847c: 4618 mov r0, r3
802847e: 3720 adds r7, #32
8028480: 46bd mov sp, r7
8028482: bd80 pop {r7, pc}
08028484 <net_read>:
int net_read(Network *n, unsigned char *buffer, int len, int timeout_ms) {
8028484: b580 push {r7, lr}
8028486: b086 sub sp, #24
8028488: af00 add r7, sp, #0
802848a: 60f8 str r0, [r7, #12]
802848c: 60b9 str r1, [r7, #8]
802848e: 607a str r2, [r7, #4]
8028490: 603b str r3, [r7, #0]
int available;
/* !!! LWIP_SO_RCVBUF must be enabled !!! */
if(ioctl(n->socket, FIONREAD, &available) < 0) return -1; //check receive buffer
8028492: 68fb ldr r3, [r7, #12]
8028494: 681b ldr r3, [r3, #0]
8028496: f107 0214 add.w r2, r7, #20
802849a: 490d ldr r1, [pc, #52] @ (80284d0 <net_read+0x4c>)
802849c: 4618 mov r0, r3
802849e: f7f1 f917 bl 80196d0 <lwip_ioctl>
80284a2: 4603 mov r3, r0
80284a4: 2b00 cmp r3, #0
80284a6: da02 bge.n 80284ae <net_read+0x2a>
80284a8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80284ac: e00c b.n 80284c8 <net_read+0x44>
if(available > 0)
80284ae: 697b ldr r3, [r7, #20]
80284b0: 2b00 cmp r3, #0
80284b2: dd08 ble.n 80284c6 <net_read+0x42>
{
return recv(n->socket, buffer, len, 0);
80284b4: 68fb ldr r3, [r7, #12]
80284b6: 6818 ldr r0, [r3, #0]
80284b8: 687a ldr r2, [r7, #4]
80284ba: 2300 movs r3, #0
80284bc: 68b9 ldr r1, [r7, #8]
80284be: f7f0 fdf3 bl 80190a8 <lwip_recv>
80284c2: 4603 mov r3, r0
80284c4: e000 b.n 80284c8 <net_read+0x44>
}
return 0;
80284c6: 2300 movs r3, #0
}
80284c8: 4618 mov r0, r3
80284ca: 3718 adds r7, #24
80284cc: 46bd mov sp, r7
80284ce: bd80 pop {r7, pc}
80284d0: 4004667f .word 0x4004667f
080284d4 <net_write>:
int net_write(Network *n, unsigned char *buffer, int len, int timeout_ms) {
80284d4: b580 push {r7, lr}
80284d6: b084 sub sp, #16
80284d8: af00 add r7, sp, #0
80284da: 60f8 str r0, [r7, #12]
80284dc: 60b9 str r1, [r7, #8]
80284de: 607a str r2, [r7, #4]
80284e0: 603b str r3, [r7, #0]
return send(n->socket, buffer, len, 0);
80284e2: 68fb ldr r3, [r7, #12]
80284e4: 6818 ldr r0, [r3, #0]
80284e6: 687a ldr r2, [r7, #4]
80284e8: 2300 movs r3, #0
80284ea: 68b9 ldr r1, [r7, #8]
80284ec: f7f0 fdf2 bl 80190d4 <lwip_send>
80284f0: 4603 mov r3, r0
}
80284f2: 4618 mov r0, r3
80284f4: 3710 adds r7, #16
80284f6: 46bd mov sp, r7
80284f8: bd80 pop {r7, pc}
080284fa <net_disconnect>:
void net_disconnect(Network *n) {
80284fa: b580 push {r7, lr}
80284fc: b082 sub sp, #8
80284fe: af00 add r7, sp, #0
8028500: 6078 str r0, [r7, #4]
close(n->socket);
8028502: 687b ldr r3, [r7, #4]
8028504: 681b ldr r3, [r3, #0]
8028506: 4618 mov r0, r3
8028508: f7f0 f9e2 bl 80188d0 <lwip_close>
n->socket = 0;
802850c: 687b ldr r3, [r7, #4]
802850e: 2200 movs r2, #0
8028510: 601a str r2, [r3, #0]
}
8028512: bf00 nop
8028514: 3708 adds r7, #8
8028516: 46bd mov sp, r7
8028518: bd80 pop {r7, pc}
0802851a <MQTTSerialize_connectLength>:
* Determines the length of the MQTT connect packet that would be produced using the supplied connect options.
* @param options the options to be used to build the connect packet
* @return the length of buffer needed to contain the serialized version of the packet
*/
int MQTTSerialize_connectLength(MQTTPacket_connectData* options)
{
802851a: b590 push {r4, r7, lr}
802851c: b085 sub sp, #20
802851e: af00 add r7, sp, #0
8028520: 6078 str r0, [r7, #4]
int len = 0;
8028522: 2300 movs r3, #0
8028524: 60fb str r3, [r7, #12]
FUNC_ENTRY;
if (options->MQTTVersion == 3)
8028526: 687b ldr r3, [r7, #4]
8028528: 7a1b ldrb r3, [r3, #8]
802852a: 2b03 cmp r3, #3
802852c: d102 bne.n 8028534 <MQTTSerialize_connectLength+0x1a>
len = 12; /* variable depending on MQTT or MQIsdp */
802852e: 230c movs r3, #12
8028530: 60fb str r3, [r7, #12]
8028532: e005 b.n 8028540 <MQTTSerialize_connectLength+0x26>
else if (options->MQTTVersion == 4)
8028534: 687b ldr r3, [r7, #4]
8028536: 7a1b ldrb r3, [r3, #8]
8028538: 2b04 cmp r3, #4
802853a: d101 bne.n 8028540 <MQTTSerialize_connectLength+0x26>
len = 10;
802853c: 230a movs r3, #10
802853e: 60fb str r3, [r7, #12]
len += MQTTstrlen(options->clientID)+2;
8028540: 687b ldr r3, [r7, #4]
8028542: 330c adds r3, #12
8028544: e893 0007 ldmia.w r3, {r0, r1, r2}
8028548: f000 fc43 bl 8028dd2 <MQTTstrlen>
802854c: 4603 mov r3, r0
802854e: 3302 adds r3, #2
8028550: 68fa ldr r2, [r7, #12]
8028552: 4413 add r3, r2
8028554: 60fb str r3, [r7, #12]
if (options->willFlag)
8028556: 687b ldr r3, [r7, #4]
8028558: 7edb ldrb r3, [r3, #27]
802855a: 2b00 cmp r3, #0
802855c: d013 beq.n 8028586 <MQTTSerialize_connectLength+0x6c>
len += MQTTstrlen(options->will.topicName)+2 + MQTTstrlen(options->will.message)+2;
802855e: 687b ldr r3, [r7, #4]
8028560: 3324 adds r3, #36 @ 0x24
8028562: e893 0007 ldmia.w r3, {r0, r1, r2}
8028566: f000 fc34 bl 8028dd2 <MQTTstrlen>
802856a: 4603 mov r3, r0
802856c: 1c9c adds r4, r3, #2
802856e: 687b ldr r3, [r7, #4]
8028570: 3330 adds r3, #48 @ 0x30
8028572: e893 0007 ldmia.w r3, {r0, r1, r2}
8028576: f000 fc2c bl 8028dd2 <MQTTstrlen>
802857a: 4603 mov r3, r0
802857c: 4423 add r3, r4
802857e: 3302 adds r3, #2
8028580: 68fa ldr r2, [r7, #12]
8028582: 4413 add r3, r2
8028584: 60fb str r3, [r7, #12]
if (options->username.cstring || options->username.lenstring.data)
8028586: 687b ldr r3, [r7, #4]
8028588: 6c1b ldr r3, [r3, #64] @ 0x40
802858a: 2b00 cmp r3, #0
802858c: d103 bne.n 8028596 <MQTTSerialize_connectLength+0x7c>
802858e: 687b ldr r3, [r7, #4]
8028590: 6c9b ldr r3, [r3, #72] @ 0x48
8028592: 2b00 cmp r3, #0
8028594: d00a beq.n 80285ac <MQTTSerialize_connectLength+0x92>
len += MQTTstrlen(options->username)+2;
8028596: 687b ldr r3, [r7, #4]
8028598: 3340 adds r3, #64 @ 0x40
802859a: e893 0007 ldmia.w r3, {r0, r1, r2}
802859e: f000 fc18 bl 8028dd2 <MQTTstrlen>
80285a2: 4603 mov r3, r0
80285a4: 3302 adds r3, #2
80285a6: 68fa ldr r2, [r7, #12]
80285a8: 4413 add r3, r2
80285aa: 60fb str r3, [r7, #12]
if (options->password.cstring || options->password.lenstring.data)
80285ac: 687b ldr r3, [r7, #4]
80285ae: 6cdb ldr r3, [r3, #76] @ 0x4c
80285b0: 2b00 cmp r3, #0
80285b2: d103 bne.n 80285bc <MQTTSerialize_connectLength+0xa2>
80285b4: 687b ldr r3, [r7, #4]
80285b6: 6d5b ldr r3, [r3, #84] @ 0x54
80285b8: 2b00 cmp r3, #0
80285ba: d00a beq.n 80285d2 <MQTTSerialize_connectLength+0xb8>
len += MQTTstrlen(options->password)+2;
80285bc: 687b ldr r3, [r7, #4]
80285be: 334c adds r3, #76 @ 0x4c
80285c0: e893 0007 ldmia.w r3, {r0, r1, r2}
80285c4: f000 fc05 bl 8028dd2 <MQTTstrlen>
80285c8: 4603 mov r3, r0
80285ca: 3302 adds r3, #2
80285cc: 68fa ldr r2, [r7, #12]
80285ce: 4413 add r3, r2
80285d0: 60fb str r3, [r7, #12]
FUNC_EXIT_RC(len);
return len;
80285d2: 68fb ldr r3, [r7, #12]
}
80285d4: 4618 mov r0, r3
80285d6: 3714 adds r7, #20
80285d8: 46bd mov sp, r7
80285da: bd90 pop {r4, r7, pc}
080285dc <MQTTSerialize_connect>:
* @param len the length in bytes of the supplied buffer
* @param options the options to be used to build the connect packet
* @return serialized length, or error if 0
*/
int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options)
{
80285dc: b580 push {r7, lr}
80285de: b08a sub sp, #40 @ 0x28
80285e0: af00 add r7, sp, #0
80285e2: 60f8 str r0, [r7, #12]
80285e4: 60b9 str r1, [r7, #8]
80285e6: 607a str r2, [r7, #4]
unsigned char *ptr = buf;
80285e8: 68fb ldr r3, [r7, #12]
80285ea: 61fb str r3, [r7, #28]
MQTTHeader header = {0};
80285ec: 2300 movs r3, #0
80285ee: 61bb str r3, [r7, #24]
MQTTConnectFlags flags = {0};
80285f0: 2300 movs r3, #0
80285f2: 617b str r3, [r7, #20]
int len = 0;
80285f4: 2300 movs r3, #0
80285f6: 623b str r3, [r7, #32]
int rc = -1;
80285f8: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
80285fc: 627b str r3, [r7, #36] @ 0x24
FUNC_ENTRY;
if (MQTTPacket_len(len = MQTTSerialize_connectLength(options)) > buflen)
80285fe: 6878 ldr r0, [r7, #4]
8028600: f7ff ff8b bl 802851a <MQTTSerialize_connectLength>
8028604: 6238 str r0, [r7, #32]
8028606: 6a38 ldr r0, [r7, #32]
8028608: f000 fa98 bl 8028b3c <MQTTPacket_len>
802860c: 4602 mov r2, r0
802860e: 68bb ldr r3, [r7, #8]
8028610: 4293 cmp r3, r2
8028612: da03 bge.n 802861c <MQTTSerialize_connect+0x40>
{
rc = MQTTPACKET_BUFFER_TOO_SHORT;
8028614: f06f 0301 mvn.w r3, #1
8028618: 627b str r3, [r7, #36] @ 0x24
goto exit;
802861a: e0c2 b.n 80287a2 <MQTTSerialize_connect+0x1c6>
}
header.byte = 0;
802861c: 2300 movs r3, #0
802861e: 763b strb r3, [r7, #24]
header.bits.type = CONNECT;
8028620: 7e3b ldrb r3, [r7, #24]
8028622: 2201 movs r2, #1
8028624: f362 1307 bfi r3, r2, #4, #4
8028628: 763b strb r3, [r7, #24]
writeChar(&ptr, header.byte); /* write header */
802862a: 7e3a ldrb r2, [r7, #24]
802862c: f107 031c add.w r3, r7, #28
8028630: 4611 mov r1, r2
8028632: 4618 mov r0, r3
8028634: f000 fb11 bl 8028c5a <writeChar>
ptr += MQTTPacket_encode(ptr, len); /* write remaining length */
8028638: 69fb ldr r3, [r7, #28]
802863a: 6a39 ldr r1, [r7, #32]
802863c: 4618 mov r0, r3
802863e: f000 fa12 bl 8028a66 <MQTTPacket_encode>
8028642: 4602 mov r2, r0
8028644: 69fb ldr r3, [r7, #28]
8028646: 4413 add r3, r2
8028648: 61fb str r3, [r7, #28]
if (options->MQTTVersion == 4)
802864a: 687b ldr r3, [r7, #4]
802864c: 7a1b ldrb r3, [r3, #8]
802864e: 2b04 cmp r3, #4
8028650: d10c bne.n 802866c <MQTTSerialize_connect+0x90>
{
writeCString(&ptr, "MQTT");
8028652: f107 031c add.w r3, r7, #28
8028656: 4955 ldr r1, [pc, #340] @ (80287ac <MQTTSerialize_connect+0x1d0>)
8028658: 4618 mov r0, r3
802865a: f000 fb3c bl 8028cd6 <writeCString>
writeChar(&ptr, (char) 4);
802865e: f107 031c add.w r3, r7, #28
8028662: 2104 movs r1, #4
8028664: 4618 mov r0, r3
8028666: f000 faf8 bl 8028c5a <writeChar>
802866a: e00b b.n 8028684 <MQTTSerialize_connect+0xa8>
}
else
{
writeCString(&ptr, "MQIsdp");
802866c: f107 031c add.w r3, r7, #28
8028670: 494f ldr r1, [pc, #316] @ (80287b0 <MQTTSerialize_connect+0x1d4>)
8028672: 4618 mov r0, r3
8028674: f000 fb2f bl 8028cd6 <writeCString>
writeChar(&ptr, (char) 3);
8028678: f107 031c add.w r3, r7, #28
802867c: 2103 movs r1, #3
802867e: 4618 mov r0, r3
8028680: f000 faeb bl 8028c5a <writeChar>
}
flags.all = 0;
8028684: 2300 movs r3, #0
8028686: 753b strb r3, [r7, #20]
flags.bits.cleansession = options->cleansession;
8028688: 687b ldr r3, [r7, #4]
802868a: 7e9b ldrb r3, [r3, #26]
802868c: f003 0301 and.w r3, r3, #1
8028690: b2da uxtb r2, r3
8028692: 7d3b ldrb r3, [r7, #20]
8028694: f362 0341 bfi r3, r2, #1, #1
8028698: 753b strb r3, [r7, #20]
flags.bits.will = (options->willFlag) ? 1 : 0;
802869a: 687b ldr r3, [r7, #4]
802869c: 7edb ldrb r3, [r3, #27]
802869e: 2b00 cmp r3, #0
80286a0: bf14 ite ne
80286a2: 2301 movne r3, #1
80286a4: 2300 moveq r3, #0
80286a6: b2da uxtb r2, r3
80286a8: 7d3b ldrb r3, [r7, #20]
80286aa: f362 0382 bfi r3, r2, #2, #1
80286ae: 753b strb r3, [r7, #20]
if (flags.bits.will)
80286b0: 7d3b ldrb r3, [r7, #20]
80286b2: f003 0304 and.w r3, r3, #4
80286b6: b2db uxtb r3, r3
80286b8: 2b00 cmp r3, #0
80286ba: d013 beq.n 80286e4 <MQTTSerialize_connect+0x108>
{
flags.bits.willQoS = options->will.qos;
80286bc: 687b ldr r3, [r7, #4]
80286be: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
80286c2: f003 0303 and.w r3, r3, #3
80286c6: b2da uxtb r2, r3
80286c8: 7d3b ldrb r3, [r7, #20]
80286ca: f362 03c4 bfi r3, r2, #3, #2
80286ce: 753b strb r3, [r7, #20]
flags.bits.willRetain = options->will.retained;
80286d0: 687b ldr r3, [r7, #4]
80286d2: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
80286d6: f003 0301 and.w r3, r3, #1
80286da: b2da uxtb r2, r3
80286dc: 7d3b ldrb r3, [r7, #20]
80286de: f362 1345 bfi r3, r2, #5, #1
80286e2: 753b strb r3, [r7, #20]
}
if (options->username.cstring || options->username.lenstring.data)
80286e4: 687b ldr r3, [r7, #4]
80286e6: 6c1b ldr r3, [r3, #64] @ 0x40
80286e8: 2b00 cmp r3, #0
80286ea: d103 bne.n 80286f4 <MQTTSerialize_connect+0x118>
80286ec: 687b ldr r3, [r7, #4]
80286ee: 6c9b ldr r3, [r3, #72] @ 0x48
80286f0: 2b00 cmp r3, #0
80286f2: d003 beq.n 80286fc <MQTTSerialize_connect+0x120>
flags.bits.username = 1;
80286f4: 7d3b ldrb r3, [r7, #20]
80286f6: f043 0380 orr.w r3, r3, #128 @ 0x80
80286fa: 753b strb r3, [r7, #20]
if (options->password.cstring || options->password.lenstring.data)
80286fc: 687b ldr r3, [r7, #4]
80286fe: 6cdb ldr r3, [r3, #76] @ 0x4c
8028700: 2b00 cmp r3, #0
8028702: d103 bne.n 802870c <MQTTSerialize_connect+0x130>
8028704: 687b ldr r3, [r7, #4]
8028706: 6d5b ldr r3, [r3, #84] @ 0x54
8028708: 2b00 cmp r3, #0
802870a: d003 beq.n 8028714 <MQTTSerialize_connect+0x138>
flags.bits.password = 1;
802870c: 7d3b ldrb r3, [r7, #20]
802870e: f043 0340 orr.w r3, r3, #64 @ 0x40
8028712: 753b strb r3, [r7, #20]
writeChar(&ptr, flags.all);
8028714: 7d3a ldrb r2, [r7, #20]
8028716: f107 031c add.w r3, r7, #28
802871a: 4611 mov r1, r2
802871c: 4618 mov r0, r3
802871e: f000 fa9c bl 8028c5a <writeChar>
writeInt(&ptr, options->keepAliveInterval);
8028722: 687b ldr r3, [r7, #4]
8028724: 8b1b ldrh r3, [r3, #24]
8028726: 461a mov r2, r3
8028728: f107 031c add.w r3, r7, #28
802872c: 4611 mov r1, r2
802872e: 4618 mov r0, r3
8028730: f000 faa8 bl 8028c84 <writeInt>
writeMQTTString(&ptr, options->clientID);
8028734: 687b ldr r3, [r7, #4]
8028736: f107 001c add.w r0, r7, #28
802873a: 330c adds r3, #12
802873c: cb0e ldmia r3, {r1, r2, r3}
802873e: f000 fae9 bl 8028d14 <writeMQTTString>
if (options->willFlag)
8028742: 687b ldr r3, [r7, #4]
8028744: 7edb ldrb r3, [r3, #27]
8028746: 2b00 cmp r3, #0
8028748: d00d beq.n 8028766 <MQTTSerialize_connect+0x18a>
{
writeMQTTString(&ptr, options->will.topicName);
802874a: 687b ldr r3, [r7, #4]
802874c: f107 001c add.w r0, r7, #28
8028750: 3324 adds r3, #36 @ 0x24
8028752: cb0e ldmia r3, {r1, r2, r3}
8028754: f000 fade bl 8028d14 <writeMQTTString>
writeMQTTString(&ptr, options->will.message);
8028758: 687b ldr r3, [r7, #4]
802875a: f107 001c add.w r0, r7, #28
802875e: 3330 adds r3, #48 @ 0x30
8028760: cb0e ldmia r3, {r1, r2, r3}
8028762: f000 fad7 bl 8028d14 <writeMQTTString>
}
if (flags.bits.username)
8028766: 7d3b ldrb r3, [r7, #20]
8028768: f023 037f bic.w r3, r3, #127 @ 0x7f
802876c: b2db uxtb r3, r3
802876e: 2b00 cmp r3, #0
8028770: d006 beq.n 8028780 <MQTTSerialize_connect+0x1a4>
writeMQTTString(&ptr, options->username);
8028772: 687b ldr r3, [r7, #4]
8028774: f107 001c add.w r0, r7, #28
8028778: 3340 adds r3, #64 @ 0x40
802877a: cb0e ldmia r3, {r1, r2, r3}
802877c: f000 faca bl 8028d14 <writeMQTTString>
if (flags.bits.password)
8028780: 7d3b ldrb r3, [r7, #20]
8028782: f003 0340 and.w r3, r3, #64 @ 0x40
8028786: b2db uxtb r3, r3
8028788: 2b00 cmp r3, #0
802878a: d006 beq.n 802879a <MQTTSerialize_connect+0x1be>
writeMQTTString(&ptr, options->password);
802878c: 687b ldr r3, [r7, #4]
802878e: f107 001c add.w r0, r7, #28
8028792: 334c adds r3, #76 @ 0x4c
8028794: cb0e ldmia r3, {r1, r2, r3}
8028796: f000 fabd bl 8028d14 <writeMQTTString>
rc = ptr - buf;
802879a: 69fa ldr r2, [r7, #28]
802879c: 68fb ldr r3, [r7, #12]
802879e: 1ad3 subs r3, r2, r3
80287a0: 627b str r3, [r7, #36] @ 0x24
exit: FUNC_EXIT_RC(rc);
return rc;
80287a2: 6a7b ldr r3, [r7, #36] @ 0x24
}
80287a4: 4618 mov r0, r3
80287a6: 3728 adds r7, #40 @ 0x28
80287a8: 46bd mov sp, r7
80287aa: bd80 pop {r7, pc}
80287ac: 08031bc8 .word 0x08031bc8
80287b0: 08031bd0 .word 0x08031bd0
080287b4 <MQTTDeserialize_connack>:
* @param buf the raw buffer data, of the correct length determined by the remaining length field
* @param len the length in bytes of the data in the supplied buffer
* @return error code. 1 is success, 0 is failure
*/
int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen)
{
80287b4: b580 push {r7, lr}
80287b6: b08a sub sp, #40 @ 0x28
80287b8: af00 add r7, sp, #0
80287ba: 60f8 str r0, [r7, #12]
80287bc: 60b9 str r1, [r7, #8]
80287be: 607a str r2, [r7, #4]
80287c0: 603b str r3, [r7, #0]
MQTTHeader header = {0};
80287c2: 2300 movs r3, #0
80287c4: 61fb str r3, [r7, #28]
unsigned char* curdata = buf;
80287c6: 687b ldr r3, [r7, #4]
80287c8: 61bb str r3, [r7, #24]
unsigned char* enddata = NULL;
80287ca: 2300 movs r3, #0
80287cc: 623b str r3, [r7, #32]
int rc = 0;
80287ce: 2300 movs r3, #0
80287d0: 627b str r3, [r7, #36] @ 0x24
int mylen;
MQTTConnackFlags flags = {0};
80287d2: 2300 movs r3, #0
80287d4: 613b str r3, [r7, #16]
FUNC_ENTRY;
header.byte = readChar(&curdata);
80287d6: f107 0318 add.w r3, r7, #24
80287da: 4618 mov r0, r3
80287dc: f000 fa29 bl 8028c32 <readChar>
80287e0: 4603 mov r3, r0
80287e2: 773b strb r3, [r7, #28]
if (header.bits.type != CONNACK)
80287e4: 7f3b ldrb r3, [r7, #28]
80287e6: f023 030f bic.w r3, r3, #15
80287ea: b2db uxtb r3, r3
80287ec: 2b20 cmp r3, #32
80287ee: d12e bne.n 802884e <MQTTDeserialize_connack+0x9a>
goto exit;
curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
80287f0: 69bb ldr r3, [r7, #24]
80287f2: f107 0214 add.w r2, r7, #20
80287f6: 4611 mov r1, r2
80287f8: 4618 mov r0, r3
80287fa: f000 f9e9 bl 8028bd0 <MQTTPacket_decodeBuf>
80287fe: 6278 str r0, [r7, #36] @ 0x24
8028800: 6a7a ldr r2, [r7, #36] @ 0x24
8028802: 69bb ldr r3, [r7, #24]
8028804: 4413 add r3, r2
8028806: 61bb str r3, [r7, #24]
enddata = curdata + mylen;
8028808: 69bb ldr r3, [r7, #24]
802880a: 697a ldr r2, [r7, #20]
802880c: 4413 add r3, r2
802880e: 623b str r3, [r7, #32]
if (enddata - curdata < 2)
8028810: 69bb ldr r3, [r7, #24]
8028812: 6a3a ldr r2, [r7, #32]
8028814: 1ad3 subs r3, r2, r3
8028816: 2b01 cmp r3, #1
8028818: dd1b ble.n 8028852 <MQTTDeserialize_connack+0x9e>
goto exit;
flags.all = readChar(&curdata);
802881a: f107 0318 add.w r3, r7, #24
802881e: 4618 mov r0, r3
8028820: f000 fa07 bl 8028c32 <readChar>
8028824: 4603 mov r3, r0
8028826: 743b strb r3, [r7, #16]
*sessionPresent = flags.bits.sessionpresent;
8028828: 7c3b ldrb r3, [r7, #16]
802882a: f3c3 0300 ubfx r3, r3, #0, #1
802882e: b2db uxtb r3, r3
8028830: 461a mov r2, r3
8028832: 68fb ldr r3, [r7, #12]
8028834: 701a strb r2, [r3, #0]
*connack_rc = readChar(&curdata);
8028836: f107 0318 add.w r3, r7, #24
802883a: 4618 mov r0, r3
802883c: f000 f9f9 bl 8028c32 <readChar>
8028840: 4603 mov r3, r0
8028842: 461a mov r2, r3
8028844: 68bb ldr r3, [r7, #8]
8028846: 701a strb r2, [r3, #0]
rc = 1;
8028848: 2301 movs r3, #1
802884a: 627b str r3, [r7, #36] @ 0x24
802884c: e002 b.n 8028854 <MQTTDeserialize_connack+0xa0>
goto exit;
802884e: bf00 nop
8028850: e000 b.n 8028854 <MQTTDeserialize_connack+0xa0>
goto exit;
8028852: bf00 nop
exit:
FUNC_EXIT_RC(rc);
return rc;
8028854: 6a7b ldr r3, [r7, #36] @ 0x24
}
8028856: 4618 mov r0, r3
8028858: 3728 adds r7, #40 @ 0x28
802885a: 46bd mov sp, r7
802885c: bd80 pop {r7, pc}
0802885e <MQTTSerialize_zero>:
* @param buflen the length in bytes of the supplied buffer, to avoid overruns
* @param packettype the message type
* @return serialized length, or error if 0
*/
int MQTTSerialize_zero(unsigned char* buf, int buflen, unsigned char packettype)
{
802885e: b580 push {r7, lr}
8028860: b088 sub sp, #32
8028862: af00 add r7, sp, #0
8028864: 60f8 str r0, [r7, #12]
8028866: 60b9 str r1, [r7, #8]
8028868: 4613 mov r3, r2
802886a: 71fb strb r3, [r7, #7]
MQTTHeader header = {0};
802886c: 2300 movs r3, #0
802886e: 61bb str r3, [r7, #24]
int rc = -1;
8028870: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8028874: 61fb str r3, [r7, #28]
unsigned char *ptr = buf;
8028876: 68fb ldr r3, [r7, #12]
8028878: 617b str r3, [r7, #20]
FUNC_ENTRY;
if (buflen < 2)
802887a: 68bb ldr r3, [r7, #8]
802887c: 2b01 cmp r3, #1
802887e: dc03 bgt.n 8028888 <MQTTSerialize_zero+0x2a>
{
rc = MQTTPACKET_BUFFER_TOO_SHORT;
8028880: f06f 0301 mvn.w r3, #1
8028884: 61fb str r3, [r7, #28]
goto exit;
8028886: e01d b.n 80288c4 <MQTTSerialize_zero+0x66>
}
header.byte = 0;
8028888: 2300 movs r3, #0
802888a: 763b strb r3, [r7, #24]
header.bits.type = packettype;
802888c: 79fb ldrb r3, [r7, #7]
802888e: f003 030f and.w r3, r3, #15
8028892: b2da uxtb r2, r3
8028894: 7e3b ldrb r3, [r7, #24]
8028896: f362 1307 bfi r3, r2, #4, #4
802889a: 763b strb r3, [r7, #24]
writeChar(&ptr, header.byte); /* write header */
802889c: 7e3a ldrb r2, [r7, #24]
802889e: f107 0314 add.w r3, r7, #20
80288a2: 4611 mov r1, r2
80288a4: 4618 mov r0, r3
80288a6: f000 f9d8 bl 8028c5a <writeChar>
ptr += MQTTPacket_encode(ptr, 0); /* write remaining length */
80288aa: 697b ldr r3, [r7, #20]
80288ac: 2100 movs r1, #0
80288ae: 4618 mov r0, r3
80288b0: f000 f8d9 bl 8028a66 <MQTTPacket_encode>
80288b4: 4602 mov r2, r0
80288b6: 697b ldr r3, [r7, #20]
80288b8: 4413 add r3, r2
80288ba: 617b str r3, [r7, #20]
rc = ptr - buf;
80288bc: 697a ldr r2, [r7, #20]
80288be: 68fb ldr r3, [r7, #12]
80288c0: 1ad3 subs r3, r2, r3
80288c2: 61fb str r3, [r7, #28]
exit:
FUNC_EXIT_RC(rc);
return rc;
80288c4: 69fb ldr r3, [r7, #28]
}
80288c6: 4618 mov r0, r3
80288c8: 3720 adds r7, #32
80288ca: 46bd mov sp, r7
80288cc: bd80 pop {r7, pc}
080288ce <MQTTSerialize_pingreq>:
* @param buf the buffer into which the packet will be serialized
* @param buflen the length in bytes of the supplied buffer, to avoid overruns
* @return serialized length, or error if 0
*/
int MQTTSerialize_pingreq(unsigned char* buf, int buflen)
{
80288ce: b580 push {r7, lr}
80288d0: b082 sub sp, #8
80288d2: af00 add r7, sp, #0
80288d4: 6078 str r0, [r7, #4]
80288d6: 6039 str r1, [r7, #0]
return MQTTSerialize_zero(buf, buflen, PINGREQ);
80288d8: 220c movs r2, #12
80288da: 6839 ldr r1, [r7, #0]
80288dc: 6878 ldr r0, [r7, #4]
80288de: f7ff ffbe bl 802885e <MQTTSerialize_zero>
80288e2: 4603 mov r3, r0
}
80288e4: 4618 mov r0, r3
80288e6: 3708 adds r7, #8
80288e8: 46bd mov sp, r7
80288ea: bd80 pop {r7, pc}
080288ec <MQTTDeserialize_publish>:
* @param buflen the length in bytes of the data in the supplied buffer
* @return error code. 1 is success
*/
int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName,
unsigned char** payload, int* payloadlen, unsigned char* buf, int buflen)
{
80288ec: b580 push {r7, lr}
80288ee: b08a sub sp, #40 @ 0x28
80288f0: af00 add r7, sp, #0
80288f2: 60f8 str r0, [r7, #12]
80288f4: 60b9 str r1, [r7, #8]
80288f6: 607a str r2, [r7, #4]
80288f8: 603b str r3, [r7, #0]
MQTTHeader header = {0};
80288fa: 2300 movs r3, #0
80288fc: 61fb str r3, [r7, #28]
unsigned char* curdata = buf;
80288fe: 6bfb ldr r3, [r7, #60] @ 0x3c
8028900: 61bb str r3, [r7, #24]
unsigned char* enddata = NULL;
8028902: 2300 movs r3, #0
8028904: 623b str r3, [r7, #32]
int rc = 0;
8028906: 2300 movs r3, #0
8028908: 627b str r3, [r7, #36] @ 0x24
int mylen = 0;
802890a: 2300 movs r3, #0
802890c: 617b str r3, [r7, #20]
FUNC_ENTRY;
header.byte = readChar(&curdata);
802890e: f107 0318 add.w r3, r7, #24
8028912: 4618 mov r0, r3
8028914: f000 f98d bl 8028c32 <readChar>
8028918: 4603 mov r3, r0
802891a: 773b strb r3, [r7, #28]
if (header.bits.type != PUBLISH)
802891c: 7f3b ldrb r3, [r7, #28]
802891e: f023 030f bic.w r3, r3, #15
8028922: b2db uxtb r3, r3
8028924: 2b30 cmp r3, #48 @ 0x30
8028926: d14b bne.n 80289c0 <MQTTDeserialize_publish+0xd4>
goto exit;
*dup = header.bits.dup;
8028928: 7f3b ldrb r3, [r7, #28]
802892a: f3c3 03c0 ubfx r3, r3, #3, #1
802892e: b2db uxtb r3, r3
8028930: 461a mov r2, r3
8028932: 68fb ldr r3, [r7, #12]
8028934: 701a strb r2, [r3, #0]
*qos = header.bits.qos;
8028936: 7f3b ldrb r3, [r7, #28]
8028938: f3c3 0341 ubfx r3, r3, #1, #2
802893c: b2db uxtb r3, r3
802893e: 461a mov r2, r3
8028940: 68bb ldr r3, [r7, #8]
8028942: 601a str r2, [r3, #0]
*retained = header.bits.retain;
8028944: 7f3b ldrb r3, [r7, #28]
8028946: f3c3 0300 ubfx r3, r3, #0, #1
802894a: b2db uxtb r3, r3
802894c: 461a mov r2, r3
802894e: 687b ldr r3, [r7, #4]
8028950: 701a strb r2, [r3, #0]
curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
8028952: 69bb ldr r3, [r7, #24]
8028954: f107 0214 add.w r2, r7, #20
8028958: 4611 mov r1, r2
802895a: 4618 mov r0, r3
802895c: f000 f938 bl 8028bd0 <MQTTPacket_decodeBuf>
8028960: 6278 str r0, [r7, #36] @ 0x24
8028962: 6a7a ldr r2, [r7, #36] @ 0x24
8028964: 69bb ldr r3, [r7, #24]
8028966: 4413 add r3, r2
8028968: 61bb str r3, [r7, #24]
enddata = curdata + mylen;
802896a: 69bb ldr r3, [r7, #24]
802896c: 697a ldr r2, [r7, #20]
802896e: 4413 add r3, r2
8028970: 623b str r3, [r7, #32]
if (!readMQTTLenString(topicName, &curdata, enddata) ||
8028972: f107 0318 add.w r3, r7, #24
8028976: 6a3a ldr r2, [r7, #32]
8028978: 4619 mov r1, r3
802897a: 6b38 ldr r0, [r7, #48] @ 0x30
802897c: f000 f9f8 bl 8028d70 <readMQTTLenString>
8028980: 4603 mov r3, r0
8028982: 2b00 cmp r3, #0
8028984: d01e beq.n 80289c4 <MQTTDeserialize_publish+0xd8>
enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */
8028986: 69bb ldr r3, [r7, #24]
8028988: 6a3a ldr r2, [r7, #32]
802898a: 1ad3 subs r3, r2, r3
if (!readMQTTLenString(topicName, &curdata, enddata) ||
802898c: 2b00 cmp r3, #0
802898e: db19 blt.n 80289c4 <MQTTDeserialize_publish+0xd8>
goto exit;
if (*qos > 0)
8028990: 68bb ldr r3, [r7, #8]
8028992: 681b ldr r3, [r3, #0]
8028994: 2b00 cmp r3, #0
8028996: dd08 ble.n 80289aa <MQTTDeserialize_publish+0xbe>
*packetid = readInt(&curdata);
8028998: f107 0318 add.w r3, r7, #24
802899c: 4618 mov r0, r3
802899e: f000 f92d bl 8028bfc <readInt>
80289a2: 4603 mov r3, r0
80289a4: b29a uxth r2, r3
80289a6: 683b ldr r3, [r7, #0]
80289a8: 801a strh r2, [r3, #0]
*payloadlen = enddata - curdata;
80289aa: 69bb ldr r3, [r7, #24]
80289ac: 6a3a ldr r2, [r7, #32]
80289ae: 1ad2 subs r2, r2, r3
80289b0: 6bbb ldr r3, [r7, #56] @ 0x38
80289b2: 601a str r2, [r3, #0]
*payload = curdata;
80289b4: 69ba ldr r2, [r7, #24]
80289b6: 6b7b ldr r3, [r7, #52] @ 0x34
80289b8: 601a str r2, [r3, #0]
rc = 1;
80289ba: 2301 movs r3, #1
80289bc: 627b str r3, [r7, #36] @ 0x24
80289be: e002 b.n 80289c6 <MQTTDeserialize_publish+0xda>
goto exit;
80289c0: bf00 nop
80289c2: e000 b.n 80289c6 <MQTTDeserialize_publish+0xda>
goto exit;
80289c4: bf00 nop
exit:
FUNC_EXIT_RC(rc);
return rc;
80289c6: 6a7b ldr r3, [r7, #36] @ 0x24
}
80289c8: 4618 mov r0, r3
80289ca: 3728 adds r7, #40 @ 0x28
80289cc: 46bd mov sp, r7
80289ce: bd80 pop {r7, pc}
080289d0 <MQTTDeserialize_ack>:
* @param buf the raw buffer data, of the correct length determined by the remaining length field
* @param buflen the length in bytes of the data in the supplied buffer
* @return error code. 1 is success, 0 is failure
*/
int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen)
{
80289d0: b580 push {r7, lr}
80289d2: b08a sub sp, #40 @ 0x28
80289d4: af00 add r7, sp, #0
80289d6: 60f8 str r0, [r7, #12]
80289d8: 60b9 str r1, [r7, #8]
80289da: 607a str r2, [r7, #4]
80289dc: 603b str r3, [r7, #0]
MQTTHeader header = {0};
80289de: 2300 movs r3, #0
80289e0: 61fb str r3, [r7, #28]
unsigned char* curdata = buf;
80289e2: 683b ldr r3, [r7, #0]
80289e4: 61bb str r3, [r7, #24]
unsigned char* enddata = NULL;
80289e6: 2300 movs r3, #0
80289e8: 623b str r3, [r7, #32]
int rc = 0;
80289ea: 2300 movs r3, #0
80289ec: 627b str r3, [r7, #36] @ 0x24
int mylen;
FUNC_ENTRY;
header.byte = readChar(&curdata);
80289ee: f107 0318 add.w r3, r7, #24
80289f2: 4618 mov r0, r3
80289f4: f000 f91d bl 8028c32 <readChar>
80289f8: 4603 mov r3, r0
80289fa: 773b strb r3, [r7, #28]
*dup = header.bits.dup;
80289fc: 7f3b ldrb r3, [r7, #28]
80289fe: f3c3 03c0 ubfx r3, r3, #3, #1
8028a02: b2db uxtb r3, r3
8028a04: 461a mov r2, r3
8028a06: 68bb ldr r3, [r7, #8]
8028a08: 701a strb r2, [r3, #0]
*packettype = header.bits.type;
8028a0a: 7f3b ldrb r3, [r7, #28]
8028a0c: f3c3 1303 ubfx r3, r3, #4, #4
8028a10: b2db uxtb r3, r3
8028a12: 461a mov r2, r3
8028a14: 68fb ldr r3, [r7, #12]
8028a16: 701a strb r2, [r3, #0]
curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
8028a18: 69bb ldr r3, [r7, #24]
8028a1a: f107 0214 add.w r2, r7, #20
8028a1e: 4611 mov r1, r2
8028a20: 4618 mov r0, r3
8028a22: f000 f8d5 bl 8028bd0 <MQTTPacket_decodeBuf>
8028a26: 6278 str r0, [r7, #36] @ 0x24
8028a28: 6a7a ldr r2, [r7, #36] @ 0x24
8028a2a: 69bb ldr r3, [r7, #24]
8028a2c: 4413 add r3, r2
8028a2e: 61bb str r3, [r7, #24]
enddata = curdata + mylen;
8028a30: 69bb ldr r3, [r7, #24]
8028a32: 697a ldr r2, [r7, #20]
8028a34: 4413 add r3, r2
8028a36: 623b str r3, [r7, #32]
if (enddata - curdata < 2)
8028a38: 69bb ldr r3, [r7, #24]
8028a3a: 6a3a ldr r2, [r7, #32]
8028a3c: 1ad3 subs r3, r2, r3
8028a3e: 2b01 cmp r3, #1
8028a40: dd0b ble.n 8028a5a <MQTTDeserialize_ack+0x8a>
goto exit;
*packetid = readInt(&curdata);
8028a42: f107 0318 add.w r3, r7, #24
8028a46: 4618 mov r0, r3
8028a48: f000 f8d8 bl 8028bfc <readInt>
8028a4c: 4603 mov r3, r0
8028a4e: b29a uxth r2, r3
8028a50: 687b ldr r3, [r7, #4]
8028a52: 801a strh r2, [r3, #0]
rc = 1;
8028a54: 2301 movs r3, #1
8028a56: 627b str r3, [r7, #36] @ 0x24
8028a58: e000 b.n 8028a5c <MQTTDeserialize_ack+0x8c>
goto exit;
8028a5a: bf00 nop
exit:
FUNC_EXIT_RC(rc);
return rc;
8028a5c: 6a7b ldr r3, [r7, #36] @ 0x24
}
8028a5e: 4618 mov r0, r3
8028a60: 3728 adds r7, #40 @ 0x28
8028a62: 46bd mov sp, r7
8028a64: bd80 pop {r7, pc}
08028a66 <MQTTPacket_encode>:
* @param buf the buffer into which the encoded data is written
* @param length the length to be encoded
* @return the number of bytes written to buffer
*/
int MQTTPacket_encode(unsigned char* buf, int length)
{
8028a66: b480 push {r7}
8028a68: b085 sub sp, #20
8028a6a: af00 add r7, sp, #0
8028a6c: 6078 str r0, [r7, #4]
8028a6e: 6039 str r1, [r7, #0]
int rc = 0;
8028a70: 2300 movs r3, #0
8028a72: 60fb str r3, [r7, #12]
FUNC_ENTRY;
do
{
char d = length % 128;
8028a74: 683b ldr r3, [r7, #0]
8028a76: 425a negs r2, r3
8028a78: f003 037f and.w r3, r3, #127 @ 0x7f
8028a7c: f002 027f and.w r2, r2, #127 @ 0x7f
8028a80: bf58 it pl
8028a82: 4253 negpl r3, r2
8028a84: 72fb strb r3, [r7, #11]
length /= 128;
8028a86: 683b ldr r3, [r7, #0]
8028a88: 2b00 cmp r3, #0
8028a8a: da00 bge.n 8028a8e <MQTTPacket_encode+0x28>
8028a8c: 337f adds r3, #127 @ 0x7f
8028a8e: 11db asrs r3, r3, #7
8028a90: 603b str r3, [r7, #0]
/* if there are more digits to encode, set the top bit of this digit */
if (length > 0)
8028a92: 683b ldr r3, [r7, #0]
8028a94: 2b00 cmp r3, #0
8028a96: dd03 ble.n 8028aa0 <MQTTPacket_encode+0x3a>
d |= 0x80;
8028a98: 7afb ldrb r3, [r7, #11]
8028a9a: f063 037f orn r3, r3, #127 @ 0x7f
8028a9e: 72fb strb r3, [r7, #11]
buf[rc++] = d;
8028aa0: 68fb ldr r3, [r7, #12]
8028aa2: 1c5a adds r2, r3, #1
8028aa4: 60fa str r2, [r7, #12]
8028aa6: 461a mov r2, r3
8028aa8: 687b ldr r3, [r7, #4]
8028aaa: 4413 add r3, r2
8028aac: 7afa ldrb r2, [r7, #11]
8028aae: 701a strb r2, [r3, #0]
} while (length > 0);
8028ab0: 683b ldr r3, [r7, #0]
8028ab2: 2b00 cmp r3, #0
8028ab4: dcde bgt.n 8028a74 <MQTTPacket_encode+0xe>
FUNC_EXIT_RC(rc);
return rc;
8028ab6: 68fb ldr r3, [r7, #12]
}
8028ab8: 4618 mov r0, r3
8028aba: 3714 adds r7, #20
8028abc: 46bd mov sp, r7
8028abe: f85d 7b04 ldr.w r7, [sp], #4
8028ac2: 4770 bx lr
08028ac4 <MQTTPacket_decode>:
* @param getcharfn pointer to function to read the next character from the data source
* @param value the decoded length returned
* @return the number of bytes read from the socket
*/
int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value)
{
8028ac4: b580 push {r7, lr}
8028ac6: b086 sub sp, #24
8028ac8: af00 add r7, sp, #0
8028aca: 6078 str r0, [r7, #4]
8028acc: 6039 str r1, [r7, #0]
unsigned char c;
int multiplier = 1;
8028ace: 2301 movs r3, #1
8028ad0: 617b str r3, [r7, #20]
int len = 0;
8028ad2: 2300 movs r3, #0
8028ad4: 613b str r3, [r7, #16]
#define MAX_NO_OF_REMAINING_LENGTH_BYTES 4
FUNC_ENTRY;
*value = 0;
8028ad6: 683b ldr r3, [r7, #0]
8028ad8: 2200 movs r2, #0
8028ada: 601a str r2, [r3, #0]
do
{
int rc = MQTTPACKET_READ_ERROR;
8028adc: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8028ae0: 60fb str r3, [r7, #12]
if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
8028ae2: 693b ldr r3, [r7, #16]
8028ae4: 3301 adds r3, #1
8028ae6: 613b str r3, [r7, #16]
8028ae8: 693b ldr r3, [r7, #16]
8028aea: 2b04 cmp r3, #4
8028aec: dd03 ble.n 8028af6 <MQTTPacket_decode+0x32>
{
rc = MQTTPACKET_READ_ERROR; /* bad data */
8028aee: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8028af2: 60fb str r3, [r7, #12]
goto exit;
8028af4: e01d b.n 8028b32 <MQTTPacket_decode+0x6e>
}
rc = (*getcharfn)(&c, 1);
8028af6: f107 020b add.w r2, r7, #11
8028afa: 687b ldr r3, [r7, #4]
8028afc: 2101 movs r1, #1
8028afe: 4610 mov r0, r2
8028b00: 4798 blx r3
8028b02: 60f8 str r0, [r7, #12]
if (rc != 1)
8028b04: 68fb ldr r3, [r7, #12]
8028b06: 2b01 cmp r3, #1
8028b08: d112 bne.n 8028b30 <MQTTPacket_decode+0x6c>
goto exit;
*value += (c & 127) * multiplier;
8028b0a: 683b ldr r3, [r7, #0]
8028b0c: 681a ldr r2, [r3, #0]
8028b0e: 7afb ldrb r3, [r7, #11]
8028b10: f003 037f and.w r3, r3, #127 @ 0x7f
8028b14: 6979 ldr r1, [r7, #20]
8028b16: fb01 f303 mul.w r3, r1, r3
8028b1a: 441a add r2, r3
8028b1c: 683b ldr r3, [r7, #0]
8028b1e: 601a str r2, [r3, #0]
multiplier *= 128;
8028b20: 697b ldr r3, [r7, #20]
8028b22: 01db lsls r3, r3, #7
8028b24: 617b str r3, [r7, #20]
} while ((c & 128) != 0);
8028b26: 7afb ldrb r3, [r7, #11]
8028b28: b25b sxtb r3, r3
8028b2a: 2b00 cmp r3, #0
8028b2c: dbd6 blt.n 8028adc <MQTTPacket_decode+0x18>
exit:
8028b2e: e000 b.n 8028b32 <MQTTPacket_decode+0x6e>
goto exit;
8028b30: bf00 nop
FUNC_EXIT_RC(len);
return len;
8028b32: 693b ldr r3, [r7, #16]
}
8028b34: 4618 mov r0, r3
8028b36: 3718 adds r7, #24
8028b38: 46bd mov sp, r7
8028b3a: bd80 pop {r7, pc}
08028b3c <MQTTPacket_len>:
int MQTTPacket_len(int rem_len)
{
8028b3c: b480 push {r7}
8028b3e: b083 sub sp, #12
8028b40: af00 add r7, sp, #0
8028b42: 6078 str r0, [r7, #4]
rem_len += 1; /* header byte */
8028b44: 687b ldr r3, [r7, #4]
8028b46: 3301 adds r3, #1
8028b48: 607b str r3, [r7, #4]
/* now remaining_length field */
if (rem_len < 128)
8028b4a: 687b ldr r3, [r7, #4]
8028b4c: 2b7f cmp r3, #127 @ 0x7f
8028b4e: dc03 bgt.n 8028b58 <MQTTPacket_len+0x1c>
rem_len += 1;
8028b50: 687b ldr r3, [r7, #4]
8028b52: 3301 adds r3, #1
8028b54: 607b str r3, [r7, #4]
8028b56: e012 b.n 8028b7e <MQTTPacket_len+0x42>
else if (rem_len < 16384)
8028b58: 687b ldr r3, [r7, #4]
8028b5a: f5b3 4f80 cmp.w r3, #16384 @ 0x4000
8028b5e: da03 bge.n 8028b68 <MQTTPacket_len+0x2c>
rem_len += 2;
8028b60: 687b ldr r3, [r7, #4]
8028b62: 3302 adds r3, #2
8028b64: 607b str r3, [r7, #4]
8028b66: e00a b.n 8028b7e <MQTTPacket_len+0x42>
else if (rem_len < 2097151)
8028b68: 687b ldr r3, [r7, #4]
8028b6a: 4a08 ldr r2, [pc, #32] @ (8028b8c <MQTTPacket_len+0x50>)
8028b6c: 4293 cmp r3, r2
8028b6e: dc03 bgt.n 8028b78 <MQTTPacket_len+0x3c>
rem_len += 3;
8028b70: 687b ldr r3, [r7, #4]
8028b72: 3303 adds r3, #3
8028b74: 607b str r3, [r7, #4]
8028b76: e002 b.n 8028b7e <MQTTPacket_len+0x42>
else
rem_len += 4;
8028b78: 687b ldr r3, [r7, #4]
8028b7a: 3304 adds r3, #4
8028b7c: 607b str r3, [r7, #4]
return rem_len;
8028b7e: 687b ldr r3, [r7, #4]
}
8028b80: 4618 mov r0, r3
8028b82: 370c adds r7, #12
8028b84: 46bd mov sp, r7
8028b86: f85d 7b04 ldr.w r7, [sp], #4
8028b8a: 4770 bx lr
8028b8c: 001ffffe .word 0x001ffffe
08028b90 <bufchar>:
static unsigned char* bufptr;
int bufchar(unsigned char* c, int count)
{
8028b90: b480 push {r7}
8028b92: b085 sub sp, #20
8028b94: af00 add r7, sp, #0
8028b96: 6078 str r0, [r7, #4]
8028b98: 6039 str r1, [r7, #0]
int i;
for (i = 0; i < count; ++i)
8028b9a: 2300 movs r3, #0
8028b9c: 60fb str r3, [r7, #12]
8028b9e: e00a b.n 8028bb6 <bufchar+0x26>
*c = *bufptr++;
8028ba0: 4b0a ldr r3, [pc, #40] @ (8028bcc <bufchar+0x3c>)
8028ba2: 681b ldr r3, [r3, #0]
8028ba4: 1c5a adds r2, r3, #1
8028ba6: 4909 ldr r1, [pc, #36] @ (8028bcc <bufchar+0x3c>)
8028ba8: 600a str r2, [r1, #0]
8028baa: 781a ldrb r2, [r3, #0]
8028bac: 687b ldr r3, [r7, #4]
8028bae: 701a strb r2, [r3, #0]
for (i = 0; i < count; ++i)
8028bb0: 68fb ldr r3, [r7, #12]
8028bb2: 3301 adds r3, #1
8028bb4: 60fb str r3, [r7, #12]
8028bb6: 68fa ldr r2, [r7, #12]
8028bb8: 683b ldr r3, [r7, #0]
8028bba: 429a cmp r2, r3
8028bbc: dbf0 blt.n 8028ba0 <bufchar+0x10>
return count;
8028bbe: 683b ldr r3, [r7, #0]
}
8028bc0: 4618 mov r0, r3
8028bc2: 3714 adds r7, #20
8028bc4: 46bd mov sp, r7
8028bc6: f85d 7b04 ldr.w r7, [sp], #4
8028bca: 4770 bx lr
8028bcc: 2402b158 .word 0x2402b158
08028bd0 <MQTTPacket_decodeBuf>:
int MQTTPacket_decodeBuf(unsigned char* buf, int* value)
{
8028bd0: b580 push {r7, lr}
8028bd2: b082 sub sp, #8
8028bd4: af00 add r7, sp, #0
8028bd6: 6078 str r0, [r7, #4]
8028bd8: 6039 str r1, [r7, #0]
bufptr = buf;
8028bda: 4a06 ldr r2, [pc, #24] @ (8028bf4 <MQTTPacket_decodeBuf+0x24>)
8028bdc: 687b ldr r3, [r7, #4]
8028bde: 6013 str r3, [r2, #0]
return MQTTPacket_decode(bufchar, value);
8028be0: 6839 ldr r1, [r7, #0]
8028be2: 4805 ldr r0, [pc, #20] @ (8028bf8 <MQTTPacket_decodeBuf+0x28>)
8028be4: f7ff ff6e bl 8028ac4 <MQTTPacket_decode>
8028be8: 4603 mov r3, r0
}
8028bea: 4618 mov r0, r3
8028bec: 3708 adds r7, #8
8028bee: 46bd mov sp, r7
8028bf0: bd80 pop {r7, pc}
8028bf2: bf00 nop
8028bf4: 2402b158 .word 0x2402b158
8028bf8: 08028b91 .word 0x08028b91
08028bfc <readInt>:
* Calculates an integer from two bytes read from the input buffer
* @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
* @return the integer value calculated
*/
int readInt(unsigned char** pptr)
{
8028bfc: b480 push {r7}
8028bfe: b085 sub sp, #20
8028c00: af00 add r7, sp, #0
8028c02: 6078 str r0, [r7, #4]
unsigned char* ptr = *pptr;
8028c04: 687b ldr r3, [r7, #4]
8028c06: 681b ldr r3, [r3, #0]
8028c08: 60fb str r3, [r7, #12]
int len = 256*(*ptr) + (*(ptr+1));
8028c0a: 68fb ldr r3, [r7, #12]
8028c0c: 781b ldrb r3, [r3, #0]
8028c0e: 021b lsls r3, r3, #8
8028c10: 68fa ldr r2, [r7, #12]
8028c12: 3201 adds r2, #1
8028c14: 7812 ldrb r2, [r2, #0]
8028c16: 4413 add r3, r2
8028c18: 60bb str r3, [r7, #8]
*pptr += 2;
8028c1a: 687b ldr r3, [r7, #4]
8028c1c: 681b ldr r3, [r3, #0]
8028c1e: 1c9a adds r2, r3, #2
8028c20: 687b ldr r3, [r7, #4]
8028c22: 601a str r2, [r3, #0]
return len;
8028c24: 68bb ldr r3, [r7, #8]
}
8028c26: 4618 mov r0, r3
8028c28: 3714 adds r7, #20
8028c2a: 46bd mov sp, r7
8028c2c: f85d 7b04 ldr.w r7, [sp], #4
8028c30: 4770 bx lr
08028c32 <readChar>:
* Reads one character from the input buffer.
* @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
* @return the character read
*/
char readChar(unsigned char** pptr)
{
8028c32: b480 push {r7}
8028c34: b085 sub sp, #20
8028c36: af00 add r7, sp, #0
8028c38: 6078 str r0, [r7, #4]
char c = **pptr;
8028c3a: 687b ldr r3, [r7, #4]
8028c3c: 681b ldr r3, [r3, #0]
8028c3e: 781b ldrb r3, [r3, #0]
8028c40: 73fb strb r3, [r7, #15]
(*pptr)++;
8028c42: 687b ldr r3, [r7, #4]
8028c44: 681b ldr r3, [r3, #0]
8028c46: 1c5a adds r2, r3, #1
8028c48: 687b ldr r3, [r7, #4]
8028c4a: 601a str r2, [r3, #0]
return c;
8028c4c: 7bfb ldrb r3, [r7, #15]
}
8028c4e: 4618 mov r0, r3
8028c50: 3714 adds r7, #20
8028c52: 46bd mov sp, r7
8028c54: f85d 7b04 ldr.w r7, [sp], #4
8028c58: 4770 bx lr
08028c5a <writeChar>:
* Writes one character to an output buffer.
* @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
* @param c the character to write
*/
void writeChar(unsigned char** pptr, char c)
{
8028c5a: b480 push {r7}
8028c5c: b083 sub sp, #12
8028c5e: af00 add r7, sp, #0
8028c60: 6078 str r0, [r7, #4]
8028c62: 460b mov r3, r1
8028c64: 70fb strb r3, [r7, #3]
**pptr = c;
8028c66: 687b ldr r3, [r7, #4]
8028c68: 681b ldr r3, [r3, #0]
8028c6a: 78fa ldrb r2, [r7, #3]
8028c6c: 701a strb r2, [r3, #0]
(*pptr)++;
8028c6e: 687b ldr r3, [r7, #4]
8028c70: 681b ldr r3, [r3, #0]
8028c72: 1c5a adds r2, r3, #1
8028c74: 687b ldr r3, [r7, #4]
8028c76: 601a str r2, [r3, #0]
}
8028c78: bf00 nop
8028c7a: 370c adds r7, #12
8028c7c: 46bd mov sp, r7
8028c7e: f85d 7b04 ldr.w r7, [sp], #4
8028c82: 4770 bx lr
08028c84 <writeInt>:
* Writes an integer as 2 bytes to an output buffer.
* @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
* @param anInt the integer to write
*/
void writeInt(unsigned char** pptr, int anInt)
{
8028c84: b480 push {r7}
8028c86: b083 sub sp, #12
8028c88: af00 add r7, sp, #0
8028c8a: 6078 str r0, [r7, #4]
8028c8c: 6039 str r1, [r7, #0]
**pptr = (unsigned char)(anInt / 256);
8028c8e: 683b ldr r3, [r7, #0]
8028c90: 2b00 cmp r3, #0
8028c92: da00 bge.n 8028c96 <writeInt+0x12>
8028c94: 33ff adds r3, #255 @ 0xff
8028c96: 121b asrs r3, r3, #8
8028c98: 461a mov r2, r3
8028c9a: 687b ldr r3, [r7, #4]
8028c9c: 681b ldr r3, [r3, #0]
8028c9e: b2d2 uxtb r2, r2
8028ca0: 701a strb r2, [r3, #0]
(*pptr)++;
8028ca2: 687b ldr r3, [r7, #4]
8028ca4: 681b ldr r3, [r3, #0]
8028ca6: 1c5a adds r2, r3, #1
8028ca8: 687b ldr r3, [r7, #4]
8028caa: 601a str r2, [r3, #0]
**pptr = (unsigned char)(anInt % 256);
8028cac: 683b ldr r3, [r7, #0]
8028cae: 425a negs r2, r3
8028cb0: b2db uxtb r3, r3
8028cb2: b2d2 uxtb r2, r2
8028cb4: bf58 it pl
8028cb6: 4253 negpl r3, r2
8028cb8: 687a ldr r2, [r7, #4]
8028cba: 6812 ldr r2, [r2, #0]
8028cbc: b2db uxtb r3, r3
8028cbe: 7013 strb r3, [r2, #0]
(*pptr)++;
8028cc0: 687b ldr r3, [r7, #4]
8028cc2: 681b ldr r3, [r3, #0]
8028cc4: 1c5a adds r2, r3, #1
8028cc6: 687b ldr r3, [r7, #4]
8028cc8: 601a str r2, [r3, #0]
}
8028cca: bf00 nop
8028ccc: 370c adds r7, #12
8028cce: 46bd mov sp, r7
8028cd0: f85d 7b04 ldr.w r7, [sp], #4
8028cd4: 4770 bx lr
08028cd6 <writeCString>:
* Writes a "UTF" string to an output buffer. Converts C string to length-delimited.
* @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
* @param string the C string to write
*/
void writeCString(unsigned char** pptr, const char* string)
{
8028cd6: b580 push {r7, lr}
8028cd8: b084 sub sp, #16
8028cda: af00 add r7, sp, #0
8028cdc: 6078 str r0, [r7, #4]
8028cde: 6039 str r1, [r7, #0]
int len = strlen(string);
8028ce0: 6838 ldr r0, [r7, #0]
8028ce2: f7d7 fb5d bl 80003a0 <strlen>
8028ce6: 4603 mov r3, r0
8028ce8: 60fb str r3, [r7, #12]
writeInt(pptr, len);
8028cea: 68f9 ldr r1, [r7, #12]
8028cec: 6878 ldr r0, [r7, #4]
8028cee: f7ff ffc9 bl 8028c84 <writeInt>
memcpy(*pptr, string, len);
8028cf2: 687b ldr r3, [r7, #4]
8028cf4: 681b ldr r3, [r3, #0]
8028cf6: 68fa ldr r2, [r7, #12]
8028cf8: 6839 ldr r1, [r7, #0]
8028cfa: 4618 mov r0, r3
8028cfc: f002 f91f bl 802af3e <memcpy>
*pptr += len;
8028d00: 687b ldr r3, [r7, #4]
8028d02: 681a ldr r2, [r3, #0]
8028d04: 68fb ldr r3, [r7, #12]
8028d06: 441a add r2, r3
8028d08: 687b ldr r3, [r7, #4]
8028d0a: 601a str r2, [r3, #0]
}
8028d0c: bf00 nop
8028d0e: 3710 adds r7, #16
8028d10: 46bd mov sp, r7
8028d12: bd80 pop {r7, pc}
08028d14 <writeMQTTString>:
return len;
}
void writeMQTTString(unsigned char** pptr, MQTTString mqttstring)
{
8028d14: b580 push {r7, lr}
8028d16: b084 sub sp, #16
8028d18: af00 add r7, sp, #0
8028d1a: 60f8 str r0, [r7, #12]
8028d1c: 4638 mov r0, r7
8028d1e: e880 000e stmia.w r0, {r1, r2, r3}
if (mqttstring.lenstring.len > 0)
8028d22: 687b ldr r3, [r7, #4]
8028d24: 2b00 cmp r3, #0
8028d26: dd12 ble.n 8028d4e <writeMQTTString+0x3a>
{
writeInt(pptr, mqttstring.lenstring.len);
8028d28: 687b ldr r3, [r7, #4]
8028d2a: 4619 mov r1, r3
8028d2c: 68f8 ldr r0, [r7, #12]
8028d2e: f7ff ffa9 bl 8028c84 <writeInt>
memcpy(*pptr, mqttstring.lenstring.data, mqttstring.lenstring.len);
8028d32: 68fb ldr r3, [r7, #12]
8028d34: 681b ldr r3, [r3, #0]
8028d36: 68b9 ldr r1, [r7, #8]
8028d38: 687a ldr r2, [r7, #4]
8028d3a: 4618 mov r0, r3
8028d3c: f002 f8ff bl 802af3e <memcpy>
*pptr += mqttstring.lenstring.len;
8028d40: 68fb ldr r3, [r7, #12]
8028d42: 681b ldr r3, [r3, #0]
8028d44: 687a ldr r2, [r7, #4]
8028d46: 441a add r2, r3
8028d48: 68fb ldr r3, [r7, #12]
8028d4a: 601a str r2, [r3, #0]
}
else if (mqttstring.cstring)
writeCString(pptr, mqttstring.cstring);
else
writeInt(pptr, 0);
}
8028d4c: e00c b.n 8028d68 <writeMQTTString+0x54>
else if (mqttstring.cstring)
8028d4e: 683b ldr r3, [r7, #0]
8028d50: 2b00 cmp r3, #0
8028d52: d005 beq.n 8028d60 <writeMQTTString+0x4c>
writeCString(pptr, mqttstring.cstring);
8028d54: 683b ldr r3, [r7, #0]
8028d56: 4619 mov r1, r3
8028d58: 68f8 ldr r0, [r7, #12]
8028d5a: f7ff ffbc bl 8028cd6 <writeCString>
}
8028d5e: e003 b.n 8028d68 <writeMQTTString+0x54>
writeInt(pptr, 0);
8028d60: 2100 movs r1, #0
8028d62: 68f8 ldr r0, [r7, #12]
8028d64: f7ff ff8e bl 8028c84 <writeInt>
}
8028d68: bf00 nop
8028d6a: 3710 adds r7, #16
8028d6c: 46bd mov sp, r7
8028d6e: bd80 pop {r7, pc}
08028d70 <readMQTTLenString>:
* @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
* @param enddata pointer to the end of the data: do not read beyond
* @return 1 if successful, 0 if not
*/
int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata)
{
8028d70: b580 push {r7, lr}
8028d72: b086 sub sp, #24
8028d74: af00 add r7, sp, #0
8028d76: 60f8 str r0, [r7, #12]
8028d78: 60b9 str r1, [r7, #8]
8028d7a: 607a str r2, [r7, #4]
int rc = 0;
8028d7c: 2300 movs r3, #0
8028d7e: 617b str r3, [r7, #20]
FUNC_ENTRY;
/* the first two bytes are the length of the string */
if (enddata - (*pptr) > 1) /* enough length to read the integer? */
8028d80: 68bb ldr r3, [r7, #8]
8028d82: 681b ldr r3, [r3, #0]
8028d84: 687a ldr r2, [r7, #4]
8028d86: 1ad3 subs r3, r2, r3
8028d88: 2b01 cmp r3, #1
8028d8a: dd1a ble.n 8028dc2 <readMQTTLenString+0x52>
{
mqttstring->lenstring.len = readInt(pptr); /* increments pptr to point past length */
8028d8c: 68b8 ldr r0, [r7, #8]
8028d8e: f7ff ff35 bl 8028bfc <readInt>
8028d92: 4602 mov r2, r0
8028d94: 68fb ldr r3, [r7, #12]
8028d96: 605a str r2, [r3, #4]
if (&(*pptr)[mqttstring->lenstring.len] <= enddata)
8028d98: 68bb ldr r3, [r7, #8]
8028d9a: 681b ldr r3, [r3, #0]
8028d9c: 68fa ldr r2, [r7, #12]
8028d9e: 6852 ldr r2, [r2, #4]
8028da0: 4413 add r3, r2
8028da2: 687a ldr r2, [r7, #4]
8028da4: 429a cmp r2, r3
8028da6: d30c bcc.n 8028dc2 <readMQTTLenString+0x52>
{
mqttstring->lenstring.data = (char*)*pptr;
8028da8: 68bb ldr r3, [r7, #8]
8028daa: 681a ldr r2, [r3, #0]
8028dac: 68fb ldr r3, [r7, #12]
8028dae: 609a str r2, [r3, #8]
*pptr += mqttstring->lenstring.len;
8028db0: 68bb ldr r3, [r7, #8]
8028db2: 681b ldr r3, [r3, #0]
8028db4: 68fa ldr r2, [r7, #12]
8028db6: 6852 ldr r2, [r2, #4]
8028db8: 441a add r2, r3
8028dba: 68bb ldr r3, [r7, #8]
8028dbc: 601a str r2, [r3, #0]
rc = 1;
8028dbe: 2301 movs r3, #1
8028dc0: 617b str r3, [r7, #20]
}
}
mqttstring->cstring = NULL;
8028dc2: 68fb ldr r3, [r7, #12]
8028dc4: 2200 movs r2, #0
8028dc6: 601a str r2, [r3, #0]
FUNC_EXIT_RC(rc);
return rc;
8028dc8: 697b ldr r3, [r7, #20]
}
8028dca: 4618 mov r0, r3
8028dcc: 3718 adds r7, #24
8028dce: 46bd mov sp, r7
8028dd0: bd80 pop {r7, pc}
08028dd2 <MQTTstrlen>:
* Return the length of the MQTTstring - C string if there is one, otherwise the length delimited string
* @param mqttstring the string to return the length of
* @return the length of the string
*/
int MQTTstrlen(MQTTString mqttstring)
{
8028dd2: b580 push {r7, lr}
8028dd4: b086 sub sp, #24
8028dd6: af00 add r7, sp, #0
8028dd8: 1d3b adds r3, r7, #4
8028dda: e883 0007 stmia.w r3, {r0, r1, r2}
int rc = 0;
8028dde: 2300 movs r3, #0
8028de0: 617b str r3, [r7, #20]
if (mqttstring.cstring)
8028de2: 687b ldr r3, [r7, #4]
8028de4: 2b00 cmp r3, #0
8028de6: d006 beq.n 8028df6 <MQTTstrlen+0x24>
rc = strlen(mqttstring.cstring);
8028de8: 687b ldr r3, [r7, #4]
8028dea: 4618 mov r0, r3
8028dec: f7d7 fad8 bl 80003a0 <strlen>
8028df0: 4603 mov r3, r0
8028df2: 617b str r3, [r7, #20]
8028df4: e001 b.n 8028dfa <MQTTstrlen+0x28>
else
rc = mqttstring.lenstring.len;
8028df6: 68bb ldr r3, [r7, #8]
8028df8: 617b str r3, [r7, #20]
return rc;
8028dfa: 697b ldr r3, [r7, #20]
}
8028dfc: 4618 mov r0, r3
8028dfe: 3718 adds r7, #24
8028e00: 46bd mov sp, r7
8028e02: bd80 pop {r7, pc}
08028e04 <MQTTPacket_equals>:
* @param a the MQTTString to compare
* @param bptr the C string to compare
* @return boolean - equal or not
*/
int MQTTPacket_equals(MQTTString* a, char* bptr)
{
8028e04: b580 push {r7, lr}
8028e06: b086 sub sp, #24
8028e08: af00 add r7, sp, #0
8028e0a: 6078 str r0, [r7, #4]
8028e0c: 6039 str r1, [r7, #0]
int alen = 0,
8028e0e: 2300 movs r3, #0
8028e10: 617b str r3, [r7, #20]
blen = 0;
8028e12: 2300 movs r3, #0
8028e14: 60fb str r3, [r7, #12]
char *aptr;
if (a->cstring)
8028e16: 687b ldr r3, [r7, #4]
8028e18: 681b ldr r3, [r3, #0]
8028e1a: 2b00 cmp r3, #0
8028e1c: d00a beq.n 8028e34 <MQTTPacket_equals+0x30>
{
aptr = a->cstring;
8028e1e: 687b ldr r3, [r7, #4]
8028e20: 681b ldr r3, [r3, #0]
8028e22: 613b str r3, [r7, #16]
alen = strlen(a->cstring);
8028e24: 687b ldr r3, [r7, #4]
8028e26: 681b ldr r3, [r3, #0]
8028e28: 4618 mov r0, r3
8028e2a: f7d7 fab9 bl 80003a0 <strlen>
8028e2e: 4603 mov r3, r0
8028e30: 617b str r3, [r7, #20]
8028e32: e005 b.n 8028e40 <MQTTPacket_equals+0x3c>
}
else
{
aptr = a->lenstring.data;
8028e34: 687b ldr r3, [r7, #4]
8028e36: 689b ldr r3, [r3, #8]
8028e38: 613b str r3, [r7, #16]
alen = a->lenstring.len;
8028e3a: 687b ldr r3, [r7, #4]
8028e3c: 685b ldr r3, [r3, #4]
8028e3e: 617b str r3, [r7, #20]
}
blen = strlen(bptr);
8028e40: 6838 ldr r0, [r7, #0]
8028e42: f7d7 faad bl 80003a0 <strlen>
8028e46: 4603 mov r3, r0
8028e48: 60fb str r3, [r7, #12]
return (alen == blen) && (strncmp(aptr, bptr, alen) == 0);
8028e4a: 697a ldr r2, [r7, #20]
8028e4c: 68fb ldr r3, [r7, #12]
8028e4e: 429a cmp r2, r3
8028e50: d10a bne.n 8028e68 <MQTTPacket_equals+0x64>
8028e52: 697b ldr r3, [r7, #20]
8028e54: 461a mov r2, r3
8028e56: 6839 ldr r1, [r7, #0]
8028e58: 6938 ldr r0, [r7, #16]
8028e5a: f001 ff81 bl 802ad60 <strncmp>
8028e5e: 4603 mov r3, r0
8028e60: 2b00 cmp r3, #0
8028e62: d101 bne.n 8028e68 <MQTTPacket_equals+0x64>
8028e64: 2301 movs r3, #1
8028e66: e000 b.n 8028e6a <MQTTPacket_equals+0x66>
8028e68: 2300 movs r3, #0
}
8028e6a: 4618 mov r0, r3
8028e6c: 3718 adds r7, #24
8028e6e: 46bd mov sp, r7
8028e70: bd80 pop {r7, pc}
08028e72 <MQTTSerialize_publishLength>:
* @param topicName the topic name to be used in the publish
* @param payloadlen the length of the payload to be sent
* @return the length of buffer needed to contain the serialized version of the packet
*/
int MQTTSerialize_publishLength(int qos, MQTTString topicName, int payloadlen)
{
8028e72: b580 push {r7, lr}
8028e74: b086 sub sp, #24
8028e76: af00 add r7, sp, #0
8028e78: 60f8 str r0, [r7, #12]
8028e7a: 4638 mov r0, r7
8028e7c: e880 000e stmia.w r0, {r1, r2, r3}
int len = 0;
8028e80: 2300 movs r3, #0
8028e82: 617b str r3, [r7, #20]
len += 2 + MQTTstrlen(topicName) + payloadlen;
8028e84: 463b mov r3, r7
8028e86: e893 0007 ldmia.w r3, {r0, r1, r2}
8028e8a: f7ff ffa2 bl 8028dd2 <MQTTstrlen>
8028e8e: 4603 mov r3, r0
8028e90: 1c9a adds r2, r3, #2
8028e92: 6a3b ldr r3, [r7, #32]
8028e94: 4413 add r3, r2
8028e96: 697a ldr r2, [r7, #20]
8028e98: 4413 add r3, r2
8028e9a: 617b str r3, [r7, #20]
if (qos > 0)
8028e9c: 68fb ldr r3, [r7, #12]
8028e9e: 2b00 cmp r3, #0
8028ea0: dd02 ble.n 8028ea8 <MQTTSerialize_publishLength+0x36>
len += 2; /* packetid */
8028ea2: 697b ldr r3, [r7, #20]
8028ea4: 3302 adds r3, #2
8028ea6: 617b str r3, [r7, #20]
return len;
8028ea8: 697b ldr r3, [r7, #20]
}
8028eaa: 4618 mov r0, r3
8028eac: 3718 adds r7, #24
8028eae: 46bd mov sp, r7
8028eb0: bd80 pop {r7, pc}
08028eb2 <MQTTSerialize_publish>:
* @param payloadlen integer - the length of the MQTT payload
* @return the length of the serialized data. <= 0 indicates error
*/
int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid,
MQTTString topicName, unsigned char* payload, int payloadlen)
{
8028eb2: b580 push {r7, lr}
8028eb4: b08a sub sp, #40 @ 0x28
8028eb6: af02 add r7, sp, #8
8028eb8: 60f8 str r0, [r7, #12]
8028eba: 60b9 str r1, [r7, #8]
8028ebc: 603b str r3, [r7, #0]
8028ebe: 4613 mov r3, r2
8028ec0: 71fb strb r3, [r7, #7]
unsigned char *ptr = buf;
8028ec2: 68fb ldr r3, [r7, #12]
8028ec4: 617b str r3, [r7, #20]
MQTTHeader header = {0};
8028ec6: 2300 movs r3, #0
8028ec8: 613b str r3, [r7, #16]
int rem_len = 0;
8028eca: 2300 movs r3, #0
8028ecc: 61bb str r3, [r7, #24]
int rc = 0;
8028ece: 2300 movs r3, #0
8028ed0: 61fb str r3, [r7, #28]
FUNC_ENTRY;
if (MQTTPacket_len(rem_len = MQTTSerialize_publishLength(qos, topicName, payloadlen)) > buflen)
8028ed2: 6c3b ldr r3, [r7, #64] @ 0x40
8028ed4: 9300 str r3, [sp, #0]
8028ed6: f107 0330 add.w r3, r7, #48 @ 0x30
8028eda: cb0e ldmia r3, {r1, r2, r3}
8028edc: 6838 ldr r0, [r7, #0]
8028ede: f7ff ffc8 bl 8028e72 <MQTTSerialize_publishLength>
8028ee2: 61b8 str r0, [r7, #24]
8028ee4: 69b8 ldr r0, [r7, #24]
8028ee6: f7ff fe29 bl 8028b3c <MQTTPacket_len>
8028eea: 4602 mov r2, r0
8028eec: 68bb ldr r3, [r7, #8]
8028eee: 4293 cmp r3, r2
8028ef0: da03 bge.n 8028efa <MQTTSerialize_publish+0x48>
{
rc = MQTTPACKET_BUFFER_TOO_SHORT;
8028ef2: f06f 0301 mvn.w r3, #1
8028ef6: 61fb str r3, [r7, #28]
goto exit;
8028ef8: e04c b.n 8028f94 <MQTTSerialize_publish+0xe2>
}
header.bits.type = PUBLISH;
8028efa: 7c3b ldrb r3, [r7, #16]
8028efc: 2203 movs r2, #3
8028efe: f362 1307 bfi r3, r2, #4, #4
8028f02: 743b strb r3, [r7, #16]
header.bits.dup = dup;
8028f04: 79fb ldrb r3, [r7, #7]
8028f06: f003 0301 and.w r3, r3, #1
8028f0a: b2da uxtb r2, r3
8028f0c: 7c3b ldrb r3, [r7, #16]
8028f0e: f362 03c3 bfi r3, r2, #3, #1
8028f12: 743b strb r3, [r7, #16]
header.bits.qos = qos;
8028f14: 683b ldr r3, [r7, #0]
8028f16: f003 0303 and.w r3, r3, #3
8028f1a: b2da uxtb r2, r3
8028f1c: 7c3b ldrb r3, [r7, #16]
8028f1e: f362 0342 bfi r3, r2, #1, #2
8028f22: 743b strb r3, [r7, #16]
header.bits.retain = retained;
8028f24: f897 3028 ldrb.w r3, [r7, #40] @ 0x28
8028f28: f003 0301 and.w r3, r3, #1
8028f2c: b2da uxtb r2, r3
8028f2e: 7c3b ldrb r3, [r7, #16]
8028f30: f362 0300 bfi r3, r2, #0, #1
8028f34: 743b strb r3, [r7, #16]
writeChar(&ptr, header.byte); /* write header */
8028f36: 7c3a ldrb r2, [r7, #16]
8028f38: f107 0314 add.w r3, r7, #20
8028f3c: 4611 mov r1, r2
8028f3e: 4618 mov r0, r3
8028f40: f7ff fe8b bl 8028c5a <writeChar>
ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
8028f44: 697b ldr r3, [r7, #20]
8028f46: 69b9 ldr r1, [r7, #24]
8028f48: 4618 mov r0, r3
8028f4a: f7ff fd8c bl 8028a66 <MQTTPacket_encode>
8028f4e: 4602 mov r2, r0
8028f50: 697b ldr r3, [r7, #20]
8028f52: 4413 add r3, r2
8028f54: 617b str r3, [r7, #20]
writeMQTTString(&ptr, topicName);
8028f56: f107 0014 add.w r0, r7, #20
8028f5a: f107 0330 add.w r3, r7, #48 @ 0x30
8028f5e: cb0e ldmia r3, {r1, r2, r3}
8028f60: f7ff fed8 bl 8028d14 <writeMQTTString>
if (qos > 0)
8028f64: 683b ldr r3, [r7, #0]
8028f66: 2b00 cmp r3, #0
8028f68: dd06 ble.n 8028f78 <MQTTSerialize_publish+0xc6>
writeInt(&ptr, packetid);
8028f6a: 8dba ldrh r2, [r7, #44] @ 0x2c
8028f6c: f107 0314 add.w r3, r7, #20
8028f70: 4611 mov r1, r2
8028f72: 4618 mov r0, r3
8028f74: f7ff fe86 bl 8028c84 <writeInt>
memcpy(ptr, payload, payloadlen);
8028f78: 697b ldr r3, [r7, #20]
8028f7a: 6c3a ldr r2, [r7, #64] @ 0x40
8028f7c: 6bf9 ldr r1, [r7, #60] @ 0x3c
8028f7e: 4618 mov r0, r3
8028f80: f001 ffdd bl 802af3e <memcpy>
ptr += payloadlen;
8028f84: 697a ldr r2, [r7, #20]
8028f86: 6c3b ldr r3, [r7, #64] @ 0x40
8028f88: 4413 add r3, r2
8028f8a: 617b str r3, [r7, #20]
rc = ptr - buf;
8028f8c: 697a ldr r2, [r7, #20]
8028f8e: 68fb ldr r3, [r7, #12]
8028f90: 1ad3 subs r3, r2, r3
8028f92: 61fb str r3, [r7, #28]
exit:
FUNC_EXIT_RC(rc);
return rc;
8028f94: 69fb ldr r3, [r7, #28]
}
8028f96: 4618 mov r0, r3
8028f98: 3720 adds r7, #32
8028f9a: 46bd mov sp, r7
8028f9c: bd80 pop {r7, pc}
08028f9e <MQTTSerialize_ack>:
* @param dup the MQTT dup flag
* @param packetid the MQTT packet identifier
* @return serialized length, or error if 0
*/
int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char packettype, unsigned char dup, unsigned short packetid)
{
8028f9e: b580 push {r7, lr}
8028fa0: b088 sub sp, #32
8028fa2: af00 add r7, sp, #0
8028fa4: 60f8 str r0, [r7, #12]
8028fa6: 60b9 str r1, [r7, #8]
8028fa8: 4611 mov r1, r2
8028faa: 461a mov r2, r3
8028fac: 460b mov r3, r1
8028fae: 71fb strb r3, [r7, #7]
8028fb0: 4613 mov r3, r2
8028fb2: 71bb strb r3, [r7, #6]
MQTTHeader header = {0};
8028fb4: 2300 movs r3, #0
8028fb6: 61bb str r3, [r7, #24]
int rc = 0;
8028fb8: 2300 movs r3, #0
8028fba: 61fb str r3, [r7, #28]
unsigned char *ptr = buf;
8028fbc: 68fb ldr r3, [r7, #12]
8028fbe: 617b str r3, [r7, #20]
FUNC_ENTRY;
if (buflen < 4)
8028fc0: 68bb ldr r3, [r7, #8]
8028fc2: 2b03 cmp r3, #3
8028fc4: dc03 bgt.n 8028fce <MQTTSerialize_ack+0x30>
{
rc = MQTTPACKET_BUFFER_TOO_SHORT;
8028fc6: f06f 0301 mvn.w r3, #1
8028fca: 61fb str r3, [r7, #28]
goto exit;
8028fcc: e037 b.n 802903e <MQTTSerialize_ack+0xa0>
}
header.bits.type = packettype;
8028fce: 79fb ldrb r3, [r7, #7]
8028fd0: f003 030f and.w r3, r3, #15
8028fd4: b2da uxtb r2, r3
8028fd6: 7e3b ldrb r3, [r7, #24]
8028fd8: f362 1307 bfi r3, r2, #4, #4
8028fdc: 763b strb r3, [r7, #24]
header.bits.dup = dup;
8028fde: 79bb ldrb r3, [r7, #6]
8028fe0: f003 0301 and.w r3, r3, #1
8028fe4: b2da uxtb r2, r3
8028fe6: 7e3b ldrb r3, [r7, #24]
8028fe8: f362 03c3 bfi r3, r2, #3, #1
8028fec: 763b strb r3, [r7, #24]
header.bits.qos = (packettype == PUBREL) ? 1 : 0;
8028fee: 79fb ldrb r3, [r7, #7]
8028ff0: 2b06 cmp r3, #6
8028ff2: bf0c ite eq
8028ff4: 2301 moveq r3, #1
8028ff6: 2300 movne r3, #0
8028ff8: b2db uxtb r3, r3
8028ffa: f003 0303 and.w r3, r3, #3
8028ffe: b2da uxtb r2, r3
8029000: 7e3b ldrb r3, [r7, #24]
8029002: f362 0342 bfi r3, r2, #1, #2
8029006: 763b strb r3, [r7, #24]
writeChar(&ptr, header.byte); /* write header */
8029008: 7e3a ldrb r2, [r7, #24]
802900a: f107 0314 add.w r3, r7, #20
802900e: 4611 mov r1, r2
8029010: 4618 mov r0, r3
8029012: f7ff fe22 bl 8028c5a <writeChar>
ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */
8029016: 697b ldr r3, [r7, #20]
8029018: 2102 movs r1, #2
802901a: 4618 mov r0, r3
802901c: f7ff fd23 bl 8028a66 <MQTTPacket_encode>
8029020: 4602 mov r2, r0
8029022: 697b ldr r3, [r7, #20]
8029024: 4413 add r3, r2
8029026: 617b str r3, [r7, #20]
writeInt(&ptr, packetid);
8029028: 8d3a ldrh r2, [r7, #40] @ 0x28
802902a: f107 0314 add.w r3, r7, #20
802902e: 4611 mov r1, r2
8029030: 4618 mov r0, r3
8029032: f7ff fe27 bl 8028c84 <writeInt>
rc = ptr - buf;
8029036: 697a ldr r2, [r7, #20]
8029038: 68fb ldr r3, [r7, #12]
802903a: 1ad3 subs r3, r2, r3
802903c: 61fb str r3, [r7, #28]
exit:
FUNC_EXIT_RC(rc);
return rc;
802903e: 69fb ldr r3, [r7, #28]
}
8029040: 4618 mov r0, r3
8029042: 3720 adds r7, #32
8029044: 46bd mov sp, r7
8029046: bd80 pop {r7, pc}
08029048 <MQTTSerialize_subscribeLength>:
* @param count the number of topic filter strings in topicFilters
* @param topicFilters the array of topic filter strings to be used in the publish
* @return the length of buffer needed to contain the serialized version of the packet
*/
int MQTTSerialize_subscribeLength(int count, MQTTString topicFilters[])
{
8029048: b580 push {r7, lr}
802904a: b084 sub sp, #16
802904c: af00 add r7, sp, #0
802904e: 6078 str r0, [r7, #4]
8029050: 6039 str r1, [r7, #0]
int i;
int len = 2; /* packetid */
8029052: 2302 movs r3, #2
8029054: 60bb str r3, [r7, #8]
for (i = 0; i < count; ++i)
8029056: 2300 movs r3, #0
8029058: 60fb str r3, [r7, #12]
802905a: e013 b.n 8029084 <MQTTSerialize_subscribeLength+0x3c>
len += 2 + MQTTstrlen(topicFilters[i]) + 1; /* length + topic + req_qos */
802905c: 68fa ldr r2, [r7, #12]
802905e: 4613 mov r3, r2
8029060: 005b lsls r3, r3, #1
8029062: 4413 add r3, r2
8029064: 009b lsls r3, r3, #2
8029066: 461a mov r2, r3
8029068: 683b ldr r3, [r7, #0]
802906a: 4413 add r3, r2
802906c: e893 0007 ldmia.w r3, {r0, r1, r2}
8029070: f7ff feaf bl 8028dd2 <MQTTstrlen>
8029074: 4603 mov r3, r0
8029076: 3303 adds r3, #3
8029078: 68ba ldr r2, [r7, #8]
802907a: 4413 add r3, r2
802907c: 60bb str r3, [r7, #8]
for (i = 0; i < count; ++i)
802907e: 68fb ldr r3, [r7, #12]
8029080: 3301 adds r3, #1
8029082: 60fb str r3, [r7, #12]
8029084: 68fa ldr r2, [r7, #12]
8029086: 687b ldr r3, [r7, #4]
8029088: 429a cmp r2, r3
802908a: dbe7 blt.n 802905c <MQTTSerialize_subscribeLength+0x14>
return len;
802908c: 68bb ldr r3, [r7, #8]
}
802908e: 4618 mov r0, r3
8029090: 3710 adds r7, #16
8029092: 46bd mov sp, r7
8029094: bd80 pop {r7, pc}
08029096 <MQTTSerialize_subscribe>:
* @param requestedQoSs - array of requested QoS
* @return the length of the serialized data. <= 0 indicates error
*/
int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, int count,
MQTTString topicFilters[], int requestedQoSs[])
{
8029096: b580 push {r7, lr}
8029098: b08a sub sp, #40 @ 0x28
802909a: af00 add r7, sp, #0
802909c: 60f8 str r0, [r7, #12]
802909e: 60b9 str r1, [r7, #8]
80290a0: 4611 mov r1, r2
80290a2: 461a mov r2, r3
80290a4: 460b mov r3, r1
80290a6: 71fb strb r3, [r7, #7]
80290a8: 4613 mov r3, r2
80290aa: 80bb strh r3, [r7, #4]
unsigned char *ptr = buf;
80290ac: 68fb ldr r3, [r7, #12]
80290ae: 61bb str r3, [r7, #24]
MQTTHeader header = {0};
80290b0: 2300 movs r3, #0
80290b2: 617b str r3, [r7, #20]
int rem_len = 0;
80290b4: 2300 movs r3, #0
80290b6: 61fb str r3, [r7, #28]
int rc = 0;
80290b8: 2300 movs r3, #0
80290ba: 627b str r3, [r7, #36] @ 0x24
int i = 0;
80290bc: 2300 movs r3, #0
80290be: 623b str r3, [r7, #32]
FUNC_ENTRY;
if (MQTTPacket_len(rem_len = MQTTSerialize_subscribeLength(count, topicFilters)) > buflen)
80290c0: 6b79 ldr r1, [r7, #52] @ 0x34
80290c2: 6b38 ldr r0, [r7, #48] @ 0x30
80290c4: f7ff ffc0 bl 8029048 <MQTTSerialize_subscribeLength>
80290c8: 61f8 str r0, [r7, #28]
80290ca: 69f8 ldr r0, [r7, #28]
80290cc: f7ff fd36 bl 8028b3c <MQTTPacket_len>
80290d0: 4602 mov r2, r0
80290d2: 68bb ldr r3, [r7, #8]
80290d4: 4293 cmp r3, r2
80290d6: da03 bge.n 80290e0 <MQTTSerialize_subscribe+0x4a>
{
rc = MQTTPACKET_BUFFER_TOO_SHORT;
80290d8: f06f 0301 mvn.w r3, #1
80290dc: 627b str r3, [r7, #36] @ 0x24
goto exit;
80290de: e051 b.n 8029184 <MQTTSerialize_subscribe+0xee>
}
header.byte = 0;
80290e0: 2300 movs r3, #0
80290e2: 753b strb r3, [r7, #20]
header.bits.type = SUBSCRIBE;
80290e4: 7d3b ldrb r3, [r7, #20]
80290e6: 2208 movs r2, #8
80290e8: f362 1307 bfi r3, r2, #4, #4
80290ec: 753b strb r3, [r7, #20]
header.bits.dup = dup;
80290ee: 79fb ldrb r3, [r7, #7]
80290f0: f003 0301 and.w r3, r3, #1
80290f4: b2da uxtb r2, r3
80290f6: 7d3b ldrb r3, [r7, #20]
80290f8: f362 03c3 bfi r3, r2, #3, #1
80290fc: 753b strb r3, [r7, #20]
header.bits.qos = 1;
80290fe: 7d3b ldrb r3, [r7, #20]
8029100: 2201 movs r2, #1
8029102: f362 0342 bfi r3, r2, #1, #2
8029106: 753b strb r3, [r7, #20]
writeChar(&ptr, header.byte); /* write header */
8029108: 7d3a ldrb r2, [r7, #20]
802910a: f107 0318 add.w r3, r7, #24
802910e: 4611 mov r1, r2
8029110: 4618 mov r0, r3
8029112: f7ff fda2 bl 8028c5a <writeChar>
ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
8029116: 69bb ldr r3, [r7, #24]
8029118: 69f9 ldr r1, [r7, #28]
802911a: 4618 mov r0, r3
802911c: f7ff fca3 bl 8028a66 <MQTTPacket_encode>
8029120: 4602 mov r2, r0
8029122: 69bb ldr r3, [r7, #24]
8029124: 4413 add r3, r2
8029126: 61bb str r3, [r7, #24]
writeInt(&ptr, packetid);
8029128: 88ba ldrh r2, [r7, #4]
802912a: f107 0318 add.w r3, r7, #24
802912e: 4611 mov r1, r2
8029130: 4618 mov r0, r3
8029132: f7ff fda7 bl 8028c84 <writeInt>
for (i = 0; i < count; ++i)
8029136: 2300 movs r3, #0
8029138: 623b str r3, [r7, #32]
802913a: e01b b.n 8029174 <MQTTSerialize_subscribe+0xde>
{
writeMQTTString(&ptr, topicFilters[i]);
802913c: 6a3a ldr r2, [r7, #32]
802913e: 4613 mov r3, r2
8029140: 005b lsls r3, r3, #1
8029142: 4413 add r3, r2
8029144: 009b lsls r3, r3, #2
8029146: 461a mov r2, r3
8029148: 6b7b ldr r3, [r7, #52] @ 0x34
802914a: 4413 add r3, r2
802914c: f107 0018 add.w r0, r7, #24
8029150: cb0e ldmia r3, {r1, r2, r3}
8029152: f7ff fddf bl 8028d14 <writeMQTTString>
writeChar(&ptr, requestedQoSs[i]);
8029156: 6a3b ldr r3, [r7, #32]
8029158: 009b lsls r3, r3, #2
802915a: 6bba ldr r2, [r7, #56] @ 0x38
802915c: 4413 add r3, r2
802915e: 681b ldr r3, [r3, #0]
8029160: b2da uxtb r2, r3
8029162: f107 0318 add.w r3, r7, #24
8029166: 4611 mov r1, r2
8029168: 4618 mov r0, r3
802916a: f7ff fd76 bl 8028c5a <writeChar>
for (i = 0; i < count; ++i)
802916e: 6a3b ldr r3, [r7, #32]
8029170: 3301 adds r3, #1
8029172: 623b str r3, [r7, #32]
8029174: 6a3a ldr r2, [r7, #32]
8029176: 6b3b ldr r3, [r7, #48] @ 0x30
8029178: 429a cmp r2, r3
802917a: dbdf blt.n 802913c <MQTTSerialize_subscribe+0xa6>
}
rc = ptr - buf;
802917c: 69ba ldr r2, [r7, #24]
802917e: 68fb ldr r3, [r7, #12]
8029180: 1ad3 subs r3, r2, r3
8029182: 627b str r3, [r7, #36] @ 0x24
exit:
FUNC_EXIT_RC(rc);
return rc;
8029184: 6a7b ldr r3, [r7, #36] @ 0x24
}
8029186: 4618 mov r0, r3
8029188: 3728 adds r7, #40 @ 0x28
802918a: 46bd mov sp, r7
802918c: bd80 pop {r7, pc}
0802918e <MQTTDeserialize_suback>:
* @param buf the raw buffer data, of the correct length determined by the remaining length field
* @param buflen the length in bytes of the data in the supplied buffer
* @return error code. 1 is success, 0 is failure
*/
int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int buflen)
{
802918e: b580 push {r7, lr}
8029190: b08a sub sp, #40 @ 0x28
8029192: af00 add r7, sp, #0
8029194: 60f8 str r0, [r7, #12]
8029196: 60b9 str r1, [r7, #8]
8029198: 607a str r2, [r7, #4]
802919a: 603b str r3, [r7, #0]
MQTTHeader header = {0};
802919c: 2300 movs r3, #0
802919e: 61fb str r3, [r7, #28]
unsigned char* curdata = buf;
80291a0: 6b3b ldr r3, [r7, #48] @ 0x30
80291a2: 61bb str r3, [r7, #24]
unsigned char* enddata = NULL;
80291a4: 2300 movs r3, #0
80291a6: 623b str r3, [r7, #32]
int rc = 0;
80291a8: 2300 movs r3, #0
80291aa: 627b str r3, [r7, #36] @ 0x24
int mylen;
FUNC_ENTRY;
header.byte = readChar(&curdata);
80291ac: f107 0318 add.w r3, r7, #24
80291b0: 4618 mov r0, r3
80291b2: f7ff fd3e bl 8028c32 <readChar>
80291b6: 4603 mov r3, r0
80291b8: 773b strb r3, [r7, #28]
if (header.bits.type != SUBACK)
80291ba: 7f3b ldrb r3, [r7, #28]
80291bc: f023 030f bic.w r3, r3, #15
80291c0: b2db uxtb r3, r3
80291c2: 2b90 cmp r3, #144 @ 0x90
80291c4: d142 bne.n 802924c <MQTTDeserialize_suback+0xbe>
goto exit;
curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
80291c6: 69bb ldr r3, [r7, #24]
80291c8: f107 0214 add.w r2, r7, #20
80291cc: 4611 mov r1, r2
80291ce: 4618 mov r0, r3
80291d0: f7ff fcfe bl 8028bd0 <MQTTPacket_decodeBuf>
80291d4: 6278 str r0, [r7, #36] @ 0x24
80291d6: 6a7a ldr r2, [r7, #36] @ 0x24
80291d8: 69bb ldr r3, [r7, #24]
80291da: 4413 add r3, r2
80291dc: 61bb str r3, [r7, #24]
enddata = curdata + mylen;
80291de: 69bb ldr r3, [r7, #24]
80291e0: 697a ldr r2, [r7, #20]
80291e2: 4413 add r3, r2
80291e4: 623b str r3, [r7, #32]
if (enddata - curdata < 2)
80291e6: 69bb ldr r3, [r7, #24]
80291e8: 6a3a ldr r2, [r7, #32]
80291ea: 1ad3 subs r3, r2, r3
80291ec: 2b01 cmp r3, #1
80291ee: dd2f ble.n 8029250 <MQTTDeserialize_suback+0xc2>
goto exit;
*packetid = readInt(&curdata);
80291f0: f107 0318 add.w r3, r7, #24
80291f4: 4618 mov r0, r3
80291f6: f7ff fd01 bl 8028bfc <readInt>
80291fa: 4603 mov r3, r0
80291fc: b29a uxth r2, r3
80291fe: 68fb ldr r3, [r7, #12]
8029200: 801a strh r2, [r3, #0]
*count = 0;
8029202: 687b ldr r3, [r7, #4]
8029204: 2200 movs r2, #0
8029206: 601a str r2, [r3, #0]
while (curdata < enddata)
8029208: e019 b.n 802923e <MQTTDeserialize_suback+0xb0>
{
if (*count > maxcount)
802920a: 687b ldr r3, [r7, #4]
802920c: 681b ldr r3, [r3, #0]
802920e: 68ba ldr r2, [r7, #8]
8029210: 429a cmp r2, r3
8029212: da03 bge.n 802921c <MQTTDeserialize_suback+0x8e>
{
rc = -1;
8029214: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8029218: 627b str r3, [r7, #36] @ 0x24
goto exit;
802921a: e01a b.n 8029252 <MQTTDeserialize_suback+0xc4>
}
grantedQoSs[(*count)++] = readChar(&curdata);
802921c: f107 0318 add.w r3, r7, #24
8029220: 4618 mov r0, r3
8029222: f7ff fd06 bl 8028c32 <readChar>
8029226: 4603 mov r3, r0
8029228: 4618 mov r0, r3
802922a: 687b ldr r3, [r7, #4]
802922c: 681b ldr r3, [r3, #0]
802922e: 1c59 adds r1, r3, #1
8029230: 687a ldr r2, [r7, #4]
8029232: 6011 str r1, [r2, #0]
8029234: 009b lsls r3, r3, #2
8029236: 683a ldr r2, [r7, #0]
8029238: 4413 add r3, r2
802923a: 4602 mov r2, r0
802923c: 601a str r2, [r3, #0]
while (curdata < enddata)
802923e: 69bb ldr r3, [r7, #24]
8029240: 6a3a ldr r2, [r7, #32]
8029242: 429a cmp r2, r3
8029244: d8e1 bhi.n 802920a <MQTTDeserialize_suback+0x7c>
}
rc = 1;
8029246: 2301 movs r3, #1
8029248: 627b str r3, [r7, #36] @ 0x24
802924a: e002 b.n 8029252 <MQTTDeserialize_suback+0xc4>
goto exit;
802924c: bf00 nop
802924e: e000 b.n 8029252 <MQTTDeserialize_suback+0xc4>
goto exit;
8029250: bf00 nop
exit:
FUNC_EXIT_RC(rc);
return rc;
8029252: 6a7b ldr r3, [r7, #36] @ 0x24
}
8029254: 4618 mov r0, r3
8029256: 3728 adds r7, #40 @ 0x28
8029258: 46bd mov sp, r7
802925a: bd80 pop {r7, pc}
0802925c <malloc>:
802925c: 4b02 ldr r3, [pc, #8] @ (8029268 <malloc+0xc>)
802925e: 4601 mov r1, r0
8029260: 6818 ldr r0, [r3, #0]
8029262: f000 b82d b.w 80292c0 <_malloc_r>
8029266: bf00 nop
8029268: 240001d4 .word 0x240001d4
0802926c <free>:
802926c: 4b02 ldr r3, [pc, #8] @ (8029278 <free+0xc>)
802926e: 4601 mov r1, r0
8029270: 6818 ldr r0, [r3, #0]
8029272: f002 bc7b b.w 802bb6c <_free_r>
8029276: bf00 nop
8029278: 240001d4 .word 0x240001d4
0802927c <sbrk_aligned>:
802927c: b570 push {r4, r5, r6, lr}
802927e: 4e0f ldr r6, [pc, #60] @ (80292bc <sbrk_aligned+0x40>)
8029280: 460c mov r4, r1
8029282: 6831 ldr r1, [r6, #0]
8029284: 4605 mov r5, r0
8029286: b911 cbnz r1, 802928e <sbrk_aligned+0x12>
8029288: f001 fe0a bl 802aea0 <_sbrk_r>
802928c: 6030 str r0, [r6, #0]
802928e: 4621 mov r1, r4
8029290: 4628 mov r0, r5
8029292: f001 fe05 bl 802aea0 <_sbrk_r>
8029296: 1c43 adds r3, r0, #1
8029298: d103 bne.n 80292a2 <sbrk_aligned+0x26>
802929a: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff
802929e: 4620 mov r0, r4
80292a0: bd70 pop {r4, r5, r6, pc}
80292a2: 1cc4 adds r4, r0, #3
80292a4: f024 0403 bic.w r4, r4, #3
80292a8: 42a0 cmp r0, r4
80292aa: d0f8 beq.n 802929e <sbrk_aligned+0x22>
80292ac: 1a21 subs r1, r4, r0
80292ae: 4628 mov r0, r5
80292b0: f001 fdf6 bl 802aea0 <_sbrk_r>
80292b4: 3001 adds r0, #1
80292b6: d1f2 bne.n 802929e <sbrk_aligned+0x22>
80292b8: e7ef b.n 802929a <sbrk_aligned+0x1e>
80292ba: bf00 nop
80292bc: 2402b15c .word 0x2402b15c
080292c0 <_malloc_r>:
80292c0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
80292c4: 1ccd adds r5, r1, #3
80292c6: f025 0503 bic.w r5, r5, #3
80292ca: 3508 adds r5, #8
80292cc: 2d0c cmp r5, #12
80292ce: bf38 it cc
80292d0: 250c movcc r5, #12
80292d2: 2d00 cmp r5, #0
80292d4: 4606 mov r6, r0
80292d6: db01 blt.n 80292dc <_malloc_r+0x1c>
80292d8: 42a9 cmp r1, r5
80292da: d904 bls.n 80292e6 <_malloc_r+0x26>
80292dc: 230c movs r3, #12
80292de: 6033 str r3, [r6, #0]
80292e0: 2000 movs r0, #0
80292e2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
80292e6: f8df 80d4 ldr.w r8, [pc, #212] @ 80293bc <_malloc_r+0xfc>
80292ea: f000 f869 bl 80293c0 <__malloc_lock>
80292ee: f8d8 3000 ldr.w r3, [r8]
80292f2: 461c mov r4, r3
80292f4: bb44 cbnz r4, 8029348 <_malloc_r+0x88>
80292f6: 4629 mov r1, r5
80292f8: 4630 mov r0, r6
80292fa: f7ff ffbf bl 802927c <sbrk_aligned>
80292fe: 1c43 adds r3, r0, #1
8029300: 4604 mov r4, r0
8029302: d158 bne.n 80293b6 <_malloc_r+0xf6>
8029304: f8d8 4000 ldr.w r4, [r8]
8029308: 4627 mov r7, r4
802930a: 2f00 cmp r7, #0
802930c: d143 bne.n 8029396 <_malloc_r+0xd6>
802930e: 2c00 cmp r4, #0
8029310: d04b beq.n 80293aa <_malloc_r+0xea>
8029312: 6823 ldr r3, [r4, #0]
8029314: 4639 mov r1, r7
8029316: 4630 mov r0, r6
8029318: eb04 0903 add.w r9, r4, r3
802931c: f001 fdc0 bl 802aea0 <_sbrk_r>
8029320: 4581 cmp r9, r0
8029322: d142 bne.n 80293aa <_malloc_r+0xea>
8029324: 6821 ldr r1, [r4, #0]
8029326: 1a6d subs r5, r5, r1
8029328: 4629 mov r1, r5
802932a: 4630 mov r0, r6
802932c: f7ff ffa6 bl 802927c <sbrk_aligned>
8029330: 3001 adds r0, #1
8029332: d03a beq.n 80293aa <_malloc_r+0xea>
8029334: 6823 ldr r3, [r4, #0]
8029336: 442b add r3, r5
8029338: 6023 str r3, [r4, #0]
802933a: f8d8 3000 ldr.w r3, [r8]
802933e: 685a ldr r2, [r3, #4]
8029340: bb62 cbnz r2, 802939c <_malloc_r+0xdc>
8029342: f8c8 7000 str.w r7, [r8]
8029346: e00f b.n 8029368 <_malloc_r+0xa8>
8029348: 6822 ldr r2, [r4, #0]
802934a: 1b52 subs r2, r2, r5
802934c: d420 bmi.n 8029390 <_malloc_r+0xd0>
802934e: 2a0b cmp r2, #11
8029350: d917 bls.n 8029382 <_malloc_r+0xc2>
8029352: 1961 adds r1, r4, r5
8029354: 42a3 cmp r3, r4
8029356: 6025 str r5, [r4, #0]
8029358: bf18 it ne
802935a: 6059 strne r1, [r3, #4]
802935c: 6863 ldr r3, [r4, #4]
802935e: bf08 it eq
8029360: f8c8 1000 streq.w r1, [r8]
8029364: 5162 str r2, [r4, r5]
8029366: 604b str r3, [r1, #4]
8029368: 4630 mov r0, r6
802936a: f000 f82f bl 80293cc <__malloc_unlock>
802936e: f104 000b add.w r0, r4, #11
8029372: 1d23 adds r3, r4, #4
8029374: f020 0007 bic.w r0, r0, #7
8029378: 1ac2 subs r2, r0, r3
802937a: bf1c itt ne
802937c: 1a1b subne r3, r3, r0
802937e: 50a3 strne r3, [r4, r2]
8029380: e7af b.n 80292e2 <_malloc_r+0x22>
8029382: 6862 ldr r2, [r4, #4]
8029384: 42a3 cmp r3, r4
8029386: bf0c ite eq
8029388: f8c8 2000 streq.w r2, [r8]
802938c: 605a strne r2, [r3, #4]
802938e: e7eb b.n 8029368 <_malloc_r+0xa8>
8029390: 4623 mov r3, r4
8029392: 6864 ldr r4, [r4, #4]
8029394: e7ae b.n 80292f4 <_malloc_r+0x34>
8029396: 463c mov r4, r7
8029398: 687f ldr r7, [r7, #4]
802939a: e7b6 b.n 802930a <_malloc_r+0x4a>
802939c: 461a mov r2, r3
802939e: 685b ldr r3, [r3, #4]
80293a0: 42a3 cmp r3, r4
80293a2: d1fb bne.n 802939c <_malloc_r+0xdc>
80293a4: 2300 movs r3, #0
80293a6: 6053 str r3, [r2, #4]
80293a8: e7de b.n 8029368 <_malloc_r+0xa8>
80293aa: 230c movs r3, #12
80293ac: 6033 str r3, [r6, #0]
80293ae: 4630 mov r0, r6
80293b0: f000 f80c bl 80293cc <__malloc_unlock>
80293b4: e794 b.n 80292e0 <_malloc_r+0x20>
80293b6: 6005 str r5, [r0, #0]
80293b8: e7d6 b.n 8029368 <_malloc_r+0xa8>
80293ba: bf00 nop
80293bc: 2402b160 .word 0x2402b160
080293c0 <__malloc_lock>:
80293c0: 4801 ldr r0, [pc, #4] @ (80293c8 <__malloc_lock+0x8>)
80293c2: f001 bdba b.w 802af3a <__retarget_lock_acquire_recursive>
80293c6: bf00 nop
80293c8: 2402b2a4 .word 0x2402b2a4
080293cc <__malloc_unlock>:
80293cc: 4801 ldr r0, [pc, #4] @ (80293d4 <__malloc_unlock+0x8>)
80293ce: f001 bdb5 b.w 802af3c <__retarget_lock_release_recursive>
80293d2: bf00 nop
80293d4: 2402b2a4 .word 0x2402b2a4
080293d8 <rand>:
80293d8: 4b16 ldr r3, [pc, #88] @ (8029434 <rand+0x5c>)
80293da: b510 push {r4, lr}
80293dc: 681c ldr r4, [r3, #0]
80293de: 6b23 ldr r3, [r4, #48] @ 0x30
80293e0: b9b3 cbnz r3, 8029410 <rand+0x38>
80293e2: 2018 movs r0, #24
80293e4: f7ff ff3a bl 802925c <malloc>
80293e8: 4602 mov r2, r0
80293ea: 6320 str r0, [r4, #48] @ 0x30
80293ec: b920 cbnz r0, 80293f8 <rand+0x20>
80293ee: 4b12 ldr r3, [pc, #72] @ (8029438 <rand+0x60>)
80293f0: 4812 ldr r0, [pc, #72] @ (802943c <rand+0x64>)
80293f2: 2152 movs r1, #82 @ 0x52
80293f4: f001 fdbc bl 802af70 <__assert_func>
80293f8: 4911 ldr r1, [pc, #68] @ (8029440 <rand+0x68>)
80293fa: 4b12 ldr r3, [pc, #72] @ (8029444 <rand+0x6c>)
80293fc: e9c0 1300 strd r1, r3, [r0]
8029400: 4b11 ldr r3, [pc, #68] @ (8029448 <rand+0x70>)
8029402: 6083 str r3, [r0, #8]
8029404: 230b movs r3, #11
8029406: 8183 strh r3, [r0, #12]
8029408: 2100 movs r1, #0
802940a: 2001 movs r0, #1
802940c: e9c2 0104 strd r0, r1, [r2, #16]
8029410: 6b21 ldr r1, [r4, #48] @ 0x30
8029412: 480e ldr r0, [pc, #56] @ (802944c <rand+0x74>)
8029414: 690b ldr r3, [r1, #16]
8029416: 694c ldr r4, [r1, #20]
8029418: 4a0d ldr r2, [pc, #52] @ (8029450 <rand+0x78>)
802941a: 4358 muls r0, r3
802941c: fb02 0004 mla r0, r2, r4, r0
8029420: fba3 3202 umull r3, r2, r3, r2
8029424: 3301 adds r3, #1
8029426: eb40 0002 adc.w r0, r0, r2
802942a: e9c1 3004 strd r3, r0, [r1, #16]
802942e: f020 4000 bic.w r0, r0, #2147483648 @ 0x80000000
8029432: bd10 pop {r4, pc}
8029434: 240001d4 .word 0x240001d4
8029438: 08031ede .word 0x08031ede
802943c: 08031ef5 .word 0x08031ef5
8029440: abcd330e .word 0xabcd330e
8029444: e66d1234 .word 0xe66d1234
8029448: 0005deec .word 0x0005deec
802944c: 5851f42d .word 0x5851f42d
8029450: 4c957f2d .word 0x4c957f2d
08029454 <realloc>:
8029454: 4b02 ldr r3, [pc, #8] @ (8029460 <realloc+0xc>)
8029456: 460a mov r2, r1
8029458: 4601 mov r1, r0
802945a: 6818 ldr r0, [r3, #0]
802945c: f000 b802 b.w 8029464 <_realloc_r>
8029460: 240001d4 .word 0x240001d4
08029464 <_realloc_r>:
8029464: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
8029468: 4680 mov r8, r0
802946a: 4615 mov r5, r2
802946c: 460c mov r4, r1
802946e: b921 cbnz r1, 802947a <_realloc_r+0x16>
8029470: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
8029474: 4611 mov r1, r2
8029476: f7ff bf23 b.w 80292c0 <_malloc_r>
802947a: b92a cbnz r2, 8029488 <_realloc_r+0x24>
802947c: f002 fb76 bl 802bb6c <_free_r>
8029480: 2400 movs r4, #0
8029482: 4620 mov r0, r4
8029484: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
8029488: f003 fbb5 bl 802cbf6 <_malloc_usable_size_r>
802948c: 4285 cmp r5, r0
802948e: 4606 mov r6, r0
8029490: d802 bhi.n 8029498 <_realloc_r+0x34>
8029492: ebb5 0f50 cmp.w r5, r0, lsr #1
8029496: d8f4 bhi.n 8029482 <_realloc_r+0x1e>
8029498: 4629 mov r1, r5
802949a: 4640 mov r0, r8
802949c: f7ff ff10 bl 80292c0 <_malloc_r>
80294a0: 4607 mov r7, r0
80294a2: 2800 cmp r0, #0
80294a4: d0ec beq.n 8029480 <_realloc_r+0x1c>
80294a6: 42b5 cmp r5, r6
80294a8: 462a mov r2, r5
80294aa: 4621 mov r1, r4
80294ac: bf28 it cs
80294ae: 4632 movcs r2, r6
80294b0: f001 fd45 bl 802af3e <memcpy>
80294b4: 4621 mov r1, r4
80294b6: 4640 mov r0, r8
80294b8: f002 fb58 bl 802bb6c <_free_r>
80294bc: 463c mov r4, r7
80294be: e7e0 b.n 8029482 <_realloc_r+0x1e>
080294c0 <sulp>:
80294c0: b570 push {r4, r5, r6, lr}
80294c2: 4604 mov r4, r0
80294c4: 460d mov r5, r1
80294c6: 4616 mov r6, r2
80294c8: ec45 4b10 vmov d0, r4, r5
80294cc: f003 fa58 bl 802c980 <__ulp>
80294d0: b17e cbz r6, 80294f2 <sulp+0x32>
80294d2: f3c5 530a ubfx r3, r5, #20, #11
80294d6: f1c3 036b rsb r3, r3, #107 @ 0x6b
80294da: 2b00 cmp r3, #0
80294dc: dd09 ble.n 80294f2 <sulp+0x32>
80294de: 051b lsls r3, r3, #20
80294e0: f103 517f add.w r1, r3, #1069547520 @ 0x3fc00000
80294e4: 2000 movs r0, #0
80294e6: f501 1140 add.w r1, r1, #3145728 @ 0x300000
80294ea: ec41 0b17 vmov d7, r0, r1
80294ee: ee20 0b07 vmul.f64 d0, d0, d7
80294f2: bd70 pop {r4, r5, r6, pc}
80294f4: 0000 movs r0, r0
...
080294f8 <_strtod_l>:
80294f8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
80294fc: ed2d 8b0a vpush {d8-d12}
8029500: b097 sub sp, #92 @ 0x5c
8029502: 4688 mov r8, r1
8029504: 920e str r2, [sp, #56] @ 0x38
8029506: 2200 movs r2, #0
8029508: 9212 str r2, [sp, #72] @ 0x48
802950a: 9005 str r0, [sp, #20]
802950c: f04f 0a00 mov.w sl, #0
8029510: f04f 0b00 mov.w fp, #0
8029514: 460a mov r2, r1
8029516: 9211 str r2, [sp, #68] @ 0x44
8029518: 7811 ldrb r1, [r2, #0]
802951a: 292b cmp r1, #43 @ 0x2b
802951c: d04c beq.n 80295b8 <_strtod_l+0xc0>
802951e: d839 bhi.n 8029594 <_strtod_l+0x9c>
8029520: 290d cmp r1, #13
8029522: d833 bhi.n 802958c <_strtod_l+0x94>
8029524: 2908 cmp r1, #8
8029526: d833 bhi.n 8029590 <_strtod_l+0x98>
8029528: 2900 cmp r1, #0
802952a: d03c beq.n 80295a6 <_strtod_l+0xae>
802952c: 2200 movs r2, #0
802952e: 9208 str r2, [sp, #32]
8029530: 9d11 ldr r5, [sp, #68] @ 0x44
8029532: 782a ldrb r2, [r5, #0]
8029534: 2a30 cmp r2, #48 @ 0x30
8029536: f040 80b5 bne.w 80296a4 <_strtod_l+0x1ac>
802953a: 786a ldrb r2, [r5, #1]
802953c: f002 02df and.w r2, r2, #223 @ 0xdf
8029540: 2a58 cmp r2, #88 @ 0x58
8029542: d170 bne.n 8029626 <_strtod_l+0x12e>
8029544: 9302 str r3, [sp, #8]
8029546: 9b08 ldr r3, [sp, #32]
8029548: 9301 str r3, [sp, #4]
802954a: ab12 add r3, sp, #72 @ 0x48
802954c: 9300 str r3, [sp, #0]
802954e: 4a8b ldr r2, [pc, #556] @ (802977c <_strtod_l+0x284>)
8029550: 9805 ldr r0, [sp, #20]
8029552: ab13 add r3, sp, #76 @ 0x4c
8029554: a911 add r1, sp, #68 @ 0x44
8029556: f002 fbbb bl 802bcd0 <__gethex>
802955a: f010 060f ands.w r6, r0, #15
802955e: 4604 mov r4, r0
8029560: d005 beq.n 802956e <_strtod_l+0x76>
8029562: 2e06 cmp r6, #6
8029564: d12a bne.n 80295bc <_strtod_l+0xc4>
8029566: 3501 adds r5, #1
8029568: 2300 movs r3, #0
802956a: 9511 str r5, [sp, #68] @ 0x44
802956c: 9308 str r3, [sp, #32]
802956e: 9b0e ldr r3, [sp, #56] @ 0x38
8029570: 2b00 cmp r3, #0
8029572: f040 852f bne.w 8029fd4 <_strtod_l+0xadc>
8029576: 9b08 ldr r3, [sp, #32]
8029578: ec4b ab10 vmov d0, sl, fp
802957c: b1cb cbz r3, 80295b2 <_strtod_l+0xba>
802957e: eeb1 0b40 vneg.f64 d0, d0
8029582: b017 add sp, #92 @ 0x5c
8029584: ecbd 8b0a vpop {d8-d12}
8029588: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802958c: 2920 cmp r1, #32
802958e: d1cd bne.n 802952c <_strtod_l+0x34>
8029590: 3201 adds r2, #1
8029592: e7c0 b.n 8029516 <_strtod_l+0x1e>
8029594: 292d cmp r1, #45 @ 0x2d
8029596: d1c9 bne.n 802952c <_strtod_l+0x34>
8029598: 2101 movs r1, #1
802959a: 9108 str r1, [sp, #32]
802959c: 1c51 adds r1, r2, #1
802959e: 9111 str r1, [sp, #68] @ 0x44
80295a0: 7852 ldrb r2, [r2, #1]
80295a2: 2a00 cmp r2, #0
80295a4: d1c4 bne.n 8029530 <_strtod_l+0x38>
80295a6: 9b0e ldr r3, [sp, #56] @ 0x38
80295a8: f8cd 8044 str.w r8, [sp, #68] @ 0x44
80295ac: 2b00 cmp r3, #0
80295ae: f040 850f bne.w 8029fd0 <_strtod_l+0xad8>
80295b2: ec4b ab10 vmov d0, sl, fp
80295b6: e7e4 b.n 8029582 <_strtod_l+0x8a>
80295b8: 2100 movs r1, #0
80295ba: e7ee b.n 802959a <_strtod_l+0xa2>
80295bc: 9a12 ldr r2, [sp, #72] @ 0x48
80295be: b13a cbz r2, 80295d0 <_strtod_l+0xd8>
80295c0: 2135 movs r1, #53 @ 0x35
80295c2: a814 add r0, sp, #80 @ 0x50
80295c4: f003 fad3 bl 802cb6e <__copybits>
80295c8: 9912 ldr r1, [sp, #72] @ 0x48
80295ca: 9805 ldr r0, [sp, #20]
80295cc: f002 fea4 bl 802c318 <_Bfree>
80295d0: 1e73 subs r3, r6, #1
80295d2: 9a13 ldr r2, [sp, #76] @ 0x4c
80295d4: 2b04 cmp r3, #4
80295d6: d806 bhi.n 80295e6 <_strtod_l+0xee>
80295d8: e8df f003 tbb [pc, r3]
80295dc: 201d0314 .word 0x201d0314
80295e0: 14 .byte 0x14
80295e1: 00 .byte 0x00
80295e2: e9dd ab14 ldrd sl, fp, [sp, #80] @ 0x50
80295e6: 05e3 lsls r3, r4, #23
80295e8: bf48 it mi
80295ea: f04b 4b00 orrmi.w fp, fp, #2147483648 @ 0x80000000
80295ee: f02b 4300 bic.w r3, fp, #2147483648 @ 0x80000000
80295f2: 0d1b lsrs r3, r3, #20
80295f4: 051b lsls r3, r3, #20
80295f6: 2b00 cmp r3, #0
80295f8: d1b9 bne.n 802956e <_strtod_l+0x76>
80295fa: f001 fc73 bl 802aee4 <__errno>
80295fe: 2322 movs r3, #34 @ 0x22
8029600: 6003 str r3, [r0, #0]
8029602: e7b4 b.n 802956e <_strtod_l+0x76>
8029604: e9dd a314 ldrd sl, r3, [sp, #80] @ 0x50
8029608: f202 4233 addw r2, r2, #1075 @ 0x433
802960c: f423 1380 bic.w r3, r3, #1048576 @ 0x100000
8029610: ea43 5b02 orr.w fp, r3, r2, lsl #20
8029614: e7e7 b.n 80295e6 <_strtod_l+0xee>
8029616: f8df b16c ldr.w fp, [pc, #364] @ 8029784 <_strtod_l+0x28c>
802961a: e7e4 b.n 80295e6 <_strtod_l+0xee>
802961c: f06f 4b00 mvn.w fp, #2147483648 @ 0x80000000
8029620: f04f 3aff mov.w sl, #4294967295 @ 0xffffffff
8029624: e7df b.n 80295e6 <_strtod_l+0xee>
8029626: 9b11 ldr r3, [sp, #68] @ 0x44
8029628: 1c5a adds r2, r3, #1
802962a: 9211 str r2, [sp, #68] @ 0x44
802962c: 785b ldrb r3, [r3, #1]
802962e: 2b30 cmp r3, #48 @ 0x30
8029630: d0f9 beq.n 8029626 <_strtod_l+0x12e>
8029632: 2b00 cmp r3, #0
8029634: d09b beq.n 802956e <_strtod_l+0x76>
8029636: 2301 movs r3, #1
8029638: 2600 movs r6, #0
802963a: 9307 str r3, [sp, #28]
802963c: 9b11 ldr r3, [sp, #68] @ 0x44
802963e: 930a str r3, [sp, #40] @ 0x28
8029640: 46b1 mov r9, r6
8029642: 4635 mov r5, r6
8029644: 220a movs r2, #10
8029646: 9811 ldr r0, [sp, #68] @ 0x44
8029648: 7804 ldrb r4, [r0, #0]
802964a: f1a4 0330 sub.w r3, r4, #48 @ 0x30
802964e: b2d9 uxtb r1, r3
8029650: 2909 cmp r1, #9
8029652: d929 bls.n 80296a8 <_strtod_l+0x1b0>
8029654: 494a ldr r1, [pc, #296] @ (8029780 <_strtod_l+0x288>)
8029656: 2201 movs r2, #1
8029658: f001 fb82 bl 802ad60 <strncmp>
802965c: b378 cbz r0, 80296be <_strtod_l+0x1c6>
802965e: 2000 movs r0, #0
8029660: 4622 mov r2, r4
8029662: 462b mov r3, r5
8029664: 4607 mov r7, r0
8029666: 9006 str r0, [sp, #24]
8029668: 2a65 cmp r2, #101 @ 0x65
802966a: d001 beq.n 8029670 <_strtod_l+0x178>
802966c: 2a45 cmp r2, #69 @ 0x45
802966e: d117 bne.n 80296a0 <_strtod_l+0x1a8>
8029670: b91b cbnz r3, 802967a <_strtod_l+0x182>
8029672: 9b07 ldr r3, [sp, #28]
8029674: 4303 orrs r3, r0
8029676: d096 beq.n 80295a6 <_strtod_l+0xae>
8029678: 2300 movs r3, #0
802967a: f8dd 8044 ldr.w r8, [sp, #68] @ 0x44
802967e: f108 0201 add.w r2, r8, #1
8029682: 9211 str r2, [sp, #68] @ 0x44
8029684: f898 2001 ldrb.w r2, [r8, #1]
8029688: 2a2b cmp r2, #43 @ 0x2b
802968a: d06b beq.n 8029764 <_strtod_l+0x26c>
802968c: 2a2d cmp r2, #45 @ 0x2d
802968e: d071 beq.n 8029774 <_strtod_l+0x27c>
8029690: f04f 0e00 mov.w lr, #0
8029694: f1a2 0430 sub.w r4, r2, #48 @ 0x30
8029698: 2c09 cmp r4, #9
802969a: d979 bls.n 8029790 <_strtod_l+0x298>
802969c: f8cd 8044 str.w r8, [sp, #68] @ 0x44
80296a0: 2400 movs r4, #0
80296a2: e094 b.n 80297ce <_strtod_l+0x2d6>
80296a4: 2300 movs r3, #0
80296a6: e7c7 b.n 8029638 <_strtod_l+0x140>
80296a8: 2d08 cmp r5, #8
80296aa: f100 0001 add.w r0, r0, #1
80296ae: bfd4 ite le
80296b0: fb02 3909 mlale r9, r2, r9, r3
80296b4: fb02 3606 mlagt r6, r2, r6, r3
80296b8: 3501 adds r5, #1
80296ba: 9011 str r0, [sp, #68] @ 0x44
80296bc: e7c3 b.n 8029646 <_strtod_l+0x14e>
80296be: 9b11 ldr r3, [sp, #68] @ 0x44
80296c0: 1c5a adds r2, r3, #1
80296c2: 9211 str r2, [sp, #68] @ 0x44
80296c4: 785a ldrb r2, [r3, #1]
80296c6: b375 cbz r5, 8029726 <_strtod_l+0x22e>
80296c8: 4607 mov r7, r0
80296ca: 462b mov r3, r5
80296cc: f1a2 0130 sub.w r1, r2, #48 @ 0x30
80296d0: 2909 cmp r1, #9
80296d2: d913 bls.n 80296fc <_strtod_l+0x204>
80296d4: 2101 movs r1, #1
80296d6: 9106 str r1, [sp, #24]
80296d8: e7c6 b.n 8029668 <_strtod_l+0x170>
80296da: 9b11 ldr r3, [sp, #68] @ 0x44
80296dc: 1c5a adds r2, r3, #1
80296de: 9211 str r2, [sp, #68] @ 0x44
80296e0: 785a ldrb r2, [r3, #1]
80296e2: 3001 adds r0, #1
80296e4: 2a30 cmp r2, #48 @ 0x30
80296e6: d0f8 beq.n 80296da <_strtod_l+0x1e2>
80296e8: f1a2 0331 sub.w r3, r2, #49 @ 0x31
80296ec: 2b08 cmp r3, #8
80296ee: f200 8476 bhi.w 8029fde <_strtod_l+0xae6>
80296f2: 9b11 ldr r3, [sp, #68] @ 0x44
80296f4: 930a str r3, [sp, #40] @ 0x28
80296f6: 4607 mov r7, r0
80296f8: 2000 movs r0, #0
80296fa: 4603 mov r3, r0
80296fc: 3a30 subs r2, #48 @ 0x30
80296fe: f100 0101 add.w r1, r0, #1
8029702: d023 beq.n 802974c <_strtod_l+0x254>
8029704: 440f add r7, r1
8029706: eb00 0c03 add.w ip, r0, r3
802970a: 4619 mov r1, r3
802970c: 240a movs r4, #10
802970e: 4561 cmp r1, ip
8029710: d10b bne.n 802972a <_strtod_l+0x232>
8029712: 1c5c adds r4, r3, #1
8029714: 4403 add r3, r0
8029716: 2b08 cmp r3, #8
8029718: 4404 add r4, r0
802971a: dc11 bgt.n 8029740 <_strtod_l+0x248>
802971c: 230a movs r3, #10
802971e: fb03 2909 mla r9, r3, r9, r2
8029722: 2100 movs r1, #0
8029724: e013 b.n 802974e <_strtod_l+0x256>
8029726: 4628 mov r0, r5
8029728: e7dc b.n 80296e4 <_strtod_l+0x1ec>
802972a: 2908 cmp r1, #8
802972c: f101 0101 add.w r1, r1, #1
8029730: dc02 bgt.n 8029738 <_strtod_l+0x240>
8029732: fb04 f909 mul.w r9, r4, r9
8029736: e7ea b.n 802970e <_strtod_l+0x216>
8029738: 2910 cmp r1, #16
802973a: bfd8 it le
802973c: 4366 mulle r6, r4
802973e: e7e6 b.n 802970e <_strtod_l+0x216>
8029740: 2b0f cmp r3, #15
8029742: dcee bgt.n 8029722 <_strtod_l+0x22a>
8029744: 230a movs r3, #10
8029746: fb03 2606 mla r6, r3, r6, r2
802974a: e7ea b.n 8029722 <_strtod_l+0x22a>
802974c: 461c mov r4, r3
802974e: 9b11 ldr r3, [sp, #68] @ 0x44
8029750: 1c5a adds r2, r3, #1
8029752: 9211 str r2, [sp, #68] @ 0x44
8029754: 785a ldrb r2, [r3, #1]
8029756: 4608 mov r0, r1
8029758: 4623 mov r3, r4
802975a: e7b7 b.n 80296cc <_strtod_l+0x1d4>
802975c: 2301 movs r3, #1
802975e: 2700 movs r7, #0
8029760: 9306 str r3, [sp, #24]
8029762: e786 b.n 8029672 <_strtod_l+0x17a>
8029764: f04f 0e00 mov.w lr, #0
8029768: f108 0202 add.w r2, r8, #2
802976c: 9211 str r2, [sp, #68] @ 0x44
802976e: f898 2002 ldrb.w r2, [r8, #2]
8029772: e78f b.n 8029694 <_strtod_l+0x19c>
8029774: f04f 0e01 mov.w lr, #1
8029778: e7f6 b.n 8029768 <_strtod_l+0x270>
802977a: bf00 nop
802977c: 08031f64 .word 0x08031f64
8029780: 08031f4d .word 0x08031f4d
8029784: 7ff00000 .word 0x7ff00000
8029788: 9a11 ldr r2, [sp, #68] @ 0x44
802978a: 1c54 adds r4, r2, #1
802978c: 9411 str r4, [sp, #68] @ 0x44
802978e: 7852 ldrb r2, [r2, #1]
8029790: 2a30 cmp r2, #48 @ 0x30
8029792: d0f9 beq.n 8029788 <_strtod_l+0x290>
8029794: f1a2 0431 sub.w r4, r2, #49 @ 0x31
8029798: 2c08 cmp r4, #8
802979a: d881 bhi.n 80296a0 <_strtod_l+0x1a8>
802979c: f1a2 0c30 sub.w ip, r2, #48 @ 0x30
80297a0: 9a11 ldr r2, [sp, #68] @ 0x44
80297a2: 9209 str r2, [sp, #36] @ 0x24
80297a4: 9a11 ldr r2, [sp, #68] @ 0x44
80297a6: 1c51 adds r1, r2, #1
80297a8: 9111 str r1, [sp, #68] @ 0x44
80297aa: 7852 ldrb r2, [r2, #1]
80297ac: f1a2 0430 sub.w r4, r2, #48 @ 0x30
80297b0: 2c09 cmp r4, #9
80297b2: d938 bls.n 8029826 <_strtod_l+0x32e>
80297b4: 9c09 ldr r4, [sp, #36] @ 0x24
80297b6: 1b0c subs r4, r1, r4
80297b8: 2c08 cmp r4, #8
80297ba: f644 641f movw r4, #19999 @ 0x4e1f
80297be: dc02 bgt.n 80297c6 <_strtod_l+0x2ce>
80297c0: 4564 cmp r4, ip
80297c2: bfa8 it ge
80297c4: 4664 movge r4, ip
80297c6: f1be 0f00 cmp.w lr, #0
80297ca: d000 beq.n 80297ce <_strtod_l+0x2d6>
80297cc: 4264 negs r4, r4
80297ce: 2b00 cmp r3, #0
80297d0: d14e bne.n 8029870 <_strtod_l+0x378>
80297d2: 9b07 ldr r3, [sp, #28]
80297d4: 4318 orrs r0, r3
80297d6: f47f aeca bne.w 802956e <_strtod_l+0x76>
80297da: 9b06 ldr r3, [sp, #24]
80297dc: 2b00 cmp r3, #0
80297de: f47f aee2 bne.w 80295a6 <_strtod_l+0xae>
80297e2: 2a69 cmp r2, #105 @ 0x69
80297e4: d027 beq.n 8029836 <_strtod_l+0x33e>
80297e6: dc24 bgt.n 8029832 <_strtod_l+0x33a>
80297e8: 2a49 cmp r2, #73 @ 0x49
80297ea: d024 beq.n 8029836 <_strtod_l+0x33e>
80297ec: 2a4e cmp r2, #78 @ 0x4e
80297ee: f47f aeda bne.w 80295a6 <_strtod_l+0xae>
80297f2: 4997 ldr r1, [pc, #604] @ (8029a50 <_strtod_l+0x558>)
80297f4: a811 add r0, sp, #68 @ 0x44
80297f6: f002 fc8d bl 802c114 <__match>
80297fa: 2800 cmp r0, #0
80297fc: f43f aed3 beq.w 80295a6 <_strtod_l+0xae>
8029800: 9b11 ldr r3, [sp, #68] @ 0x44
8029802: 781b ldrb r3, [r3, #0]
8029804: 2b28 cmp r3, #40 @ 0x28
8029806: d12d bne.n 8029864 <_strtod_l+0x36c>
8029808: 4992 ldr r1, [pc, #584] @ (8029a54 <_strtod_l+0x55c>)
802980a: aa14 add r2, sp, #80 @ 0x50
802980c: a811 add r0, sp, #68 @ 0x44
802980e: f002 fc95 bl 802c13c <__hexnan>
8029812: 2805 cmp r0, #5
8029814: d126 bne.n 8029864 <_strtod_l+0x36c>
8029816: 9b15 ldr r3, [sp, #84] @ 0x54
8029818: f8dd a050 ldr.w sl, [sp, #80] @ 0x50
802981c: f043 4bff orr.w fp, r3, #2139095040 @ 0x7f800000
8029820: f44b 0be0 orr.w fp, fp, #7340032 @ 0x700000
8029824: e6a3 b.n 802956e <_strtod_l+0x76>
8029826: 240a movs r4, #10
8029828: fb04 2c0c mla ip, r4, ip, r2
802982c: f1ac 0c30 sub.w ip, ip, #48 @ 0x30
8029830: e7b8 b.n 80297a4 <_strtod_l+0x2ac>
8029832: 2a6e cmp r2, #110 @ 0x6e
8029834: e7db b.n 80297ee <_strtod_l+0x2f6>
8029836: 4988 ldr r1, [pc, #544] @ (8029a58 <_strtod_l+0x560>)
8029838: a811 add r0, sp, #68 @ 0x44
802983a: f002 fc6b bl 802c114 <__match>
802983e: 2800 cmp r0, #0
8029840: f43f aeb1 beq.w 80295a6 <_strtod_l+0xae>
8029844: 9b11 ldr r3, [sp, #68] @ 0x44
8029846: 4985 ldr r1, [pc, #532] @ (8029a5c <_strtod_l+0x564>)
8029848: 3b01 subs r3, #1
802984a: a811 add r0, sp, #68 @ 0x44
802984c: 9311 str r3, [sp, #68] @ 0x44
802984e: f002 fc61 bl 802c114 <__match>
8029852: b910 cbnz r0, 802985a <_strtod_l+0x362>
8029854: 9b11 ldr r3, [sp, #68] @ 0x44
8029856: 3301 adds r3, #1
8029858: 9311 str r3, [sp, #68] @ 0x44
802985a: f8df b214 ldr.w fp, [pc, #532] @ 8029a70 <_strtod_l+0x578>
802985e: f04f 0a00 mov.w sl, #0
8029862: e684 b.n 802956e <_strtod_l+0x76>
8029864: 487e ldr r0, [pc, #504] @ (8029a60 <_strtod_l+0x568>)
8029866: f001 fb7b bl 802af60 <nan>
802986a: ec5b ab10 vmov sl, fp, d0
802986e: e67e b.n 802956e <_strtod_l+0x76>
8029870: ee07 9a90 vmov s15, r9
8029874: 1be2 subs r2, r4, r7
8029876: eeb8 7b67 vcvt.f64.u32 d7, s15
802987a: 2d00 cmp r5, #0
802987c: bf08 it eq
802987e: 461d moveq r5, r3
8029880: 2b10 cmp r3, #16
8029882: 9209 str r2, [sp, #36] @ 0x24
8029884: 461a mov r2, r3
8029886: bfa8 it ge
8029888: 2210 movge r2, #16
802988a: 2b09 cmp r3, #9
802988c: ec5b ab17 vmov sl, fp, d7
8029890: dc15 bgt.n 80298be <_strtod_l+0x3c6>
8029892: 1be1 subs r1, r4, r7
8029894: 2900 cmp r1, #0
8029896: f43f ae6a beq.w 802956e <_strtod_l+0x76>
802989a: eba4 0107 sub.w r1, r4, r7
802989e: dd72 ble.n 8029986 <_strtod_l+0x48e>
80298a0: 2916 cmp r1, #22
80298a2: dc59 bgt.n 8029958 <_strtod_l+0x460>
80298a4: 4b6f ldr r3, [pc, #444] @ (8029a64 <_strtod_l+0x56c>)
80298a6: 9a09 ldr r2, [sp, #36] @ 0x24
80298a8: eb03 03c2 add.w r3, r3, r2, lsl #3
80298ac: ed93 7b00 vldr d7, [r3]
80298b0: ec4b ab16 vmov d6, sl, fp
80298b4: ee27 7b06 vmul.f64 d7, d7, d6
80298b8: ec5b ab17 vmov sl, fp, d7
80298bc: e657 b.n 802956e <_strtod_l+0x76>
80298be: 4969 ldr r1, [pc, #420] @ (8029a64 <_strtod_l+0x56c>)
80298c0: eb01 01c2 add.w r1, r1, r2, lsl #3
80298c4: ed11 5b12 vldr d5, [r1, #-72] @ 0xffffffb8
80298c8: ee06 6a90 vmov s13, r6
80298cc: 2b0f cmp r3, #15
80298ce: eeb8 6b66 vcvt.f64.u32 d6, s13
80298d2: eea7 6b05 vfma.f64 d6, d7, d5
80298d6: ec5b ab16 vmov sl, fp, d6
80298da: ddda ble.n 8029892 <_strtod_l+0x39a>
80298dc: 1a9a subs r2, r3, r2
80298de: 1be1 subs r1, r4, r7
80298e0: 440a add r2, r1
80298e2: 2a00 cmp r2, #0
80298e4: f340 8094 ble.w 8029a10 <_strtod_l+0x518>
80298e8: f012 000f ands.w r0, r2, #15
80298ec: d00a beq.n 8029904 <_strtod_l+0x40c>
80298ee: 495d ldr r1, [pc, #372] @ (8029a64 <_strtod_l+0x56c>)
80298f0: eb01 01c0 add.w r1, r1, r0, lsl #3
80298f4: ed91 7b00 vldr d7, [r1]
80298f8: ec4b ab16 vmov d6, sl, fp
80298fc: ee27 7b06 vmul.f64 d7, d7, d6
8029900: ec5b ab17 vmov sl, fp, d7
8029904: f032 020f bics.w r2, r2, #15
8029908: d073 beq.n 80299f2 <_strtod_l+0x4fa>
802990a: f5b2 7f9a cmp.w r2, #308 @ 0x134
802990e: dd47 ble.n 80299a0 <_strtod_l+0x4a8>
8029910: 2400 movs r4, #0
8029912: 4625 mov r5, r4
8029914: 9407 str r4, [sp, #28]
8029916: 4626 mov r6, r4
8029918: 9a05 ldr r2, [sp, #20]
802991a: f8df b154 ldr.w fp, [pc, #340] @ 8029a70 <_strtod_l+0x578>
802991e: 2322 movs r3, #34 @ 0x22
8029920: 6013 str r3, [r2, #0]
8029922: f04f 0a00 mov.w sl, #0
8029926: 9b07 ldr r3, [sp, #28]
8029928: 2b00 cmp r3, #0
802992a: f43f ae20 beq.w 802956e <_strtod_l+0x76>
802992e: 9912 ldr r1, [sp, #72] @ 0x48
8029930: 9805 ldr r0, [sp, #20]
8029932: f002 fcf1 bl 802c318 <_Bfree>
8029936: 9805 ldr r0, [sp, #20]
8029938: 4631 mov r1, r6
802993a: f002 fced bl 802c318 <_Bfree>
802993e: 9805 ldr r0, [sp, #20]
8029940: 4629 mov r1, r5
8029942: f002 fce9 bl 802c318 <_Bfree>
8029946: 9907 ldr r1, [sp, #28]
8029948: 9805 ldr r0, [sp, #20]
802994a: f002 fce5 bl 802c318 <_Bfree>
802994e: 9805 ldr r0, [sp, #20]
8029950: 4621 mov r1, r4
8029952: f002 fce1 bl 802c318 <_Bfree>
8029956: e60a b.n 802956e <_strtod_l+0x76>
8029958: f1c3 0125 rsb r1, r3, #37 @ 0x25
802995c: 1be0 subs r0, r4, r7
802995e: 4281 cmp r1, r0
8029960: dbbc blt.n 80298dc <_strtod_l+0x3e4>
8029962: 4a40 ldr r2, [pc, #256] @ (8029a64 <_strtod_l+0x56c>)
8029964: f1c3 030f rsb r3, r3, #15
8029968: eb02 01c3 add.w r1, r2, r3, lsl #3
802996c: ed91 7b00 vldr d7, [r1]
8029970: 9909 ldr r1, [sp, #36] @ 0x24
8029972: ec4b ab16 vmov d6, sl, fp
8029976: 1acb subs r3, r1, r3
8029978: eb02 02c3 add.w r2, r2, r3, lsl #3
802997c: ee27 7b06 vmul.f64 d7, d7, d6
8029980: ed92 6b00 vldr d6, [r2]
8029984: e796 b.n 80298b4 <_strtod_l+0x3bc>
8029986: 3116 adds r1, #22
8029988: dba8 blt.n 80298dc <_strtod_l+0x3e4>
802998a: 4b36 ldr r3, [pc, #216] @ (8029a64 <_strtod_l+0x56c>)
802998c: 1b3c subs r4, r7, r4
802998e: eb03 04c4 add.w r4, r3, r4, lsl #3
8029992: ed94 7b00 vldr d7, [r4]
8029996: ec4b ab16 vmov d6, sl, fp
802999a: ee86 7b07 vdiv.f64 d7, d6, d7
802999e: e78b b.n 80298b8 <_strtod_l+0x3c0>
80299a0: 2000 movs r0, #0
80299a2: ec4b ab17 vmov d7, sl, fp
80299a6: 4e30 ldr r6, [pc, #192] @ (8029a68 <_strtod_l+0x570>)
80299a8: 1112 asrs r2, r2, #4
80299aa: 4601 mov r1, r0
80299ac: 2a01 cmp r2, #1
80299ae: dc23 bgt.n 80299f8 <_strtod_l+0x500>
80299b0: b108 cbz r0, 80299b6 <_strtod_l+0x4be>
80299b2: ec5b ab17 vmov sl, fp, d7
80299b6: 4a2c ldr r2, [pc, #176] @ (8029a68 <_strtod_l+0x570>)
80299b8: 482c ldr r0, [pc, #176] @ (8029a6c <_strtod_l+0x574>)
80299ba: eb02 02c1 add.w r2, r2, r1, lsl #3
80299be: ed92 7b00 vldr d7, [r2]
80299c2: f1ab 7b54 sub.w fp, fp, #55574528 @ 0x3500000
80299c6: ec4b ab16 vmov d6, sl, fp
80299ca: 4a29 ldr r2, [pc, #164] @ (8029a70 <_strtod_l+0x578>)
80299cc: ee27 7b06 vmul.f64 d7, d7, d6
80299d0: ee17 1a90 vmov r1, s15
80299d4: 400a ands r2, r1
80299d6: 4282 cmp r2, r0
80299d8: ec5b ab17 vmov sl, fp, d7
80299dc: d898 bhi.n 8029910 <_strtod_l+0x418>
80299de: f5a0 1080 sub.w r0, r0, #1048576 @ 0x100000
80299e2: 4282 cmp r2, r0
80299e4: bf86 itte hi
80299e6: f8df b08c ldrhi.w fp, [pc, #140] @ 8029a74 <_strtod_l+0x57c>
80299ea: f04f 3aff movhi.w sl, #4294967295 @ 0xffffffff
80299ee: f101 7b54 addls.w fp, r1, #55574528 @ 0x3500000
80299f2: 2200 movs r2, #0
80299f4: 9206 str r2, [sp, #24]
80299f6: e076 b.n 8029ae6 <_strtod_l+0x5ee>
80299f8: f012 0f01 tst.w r2, #1
80299fc: d004 beq.n 8029a08 <_strtod_l+0x510>
80299fe: ed96 6b00 vldr d6, [r6]
8029a02: 2001 movs r0, #1
8029a04: ee27 7b06 vmul.f64 d7, d7, d6
8029a08: 3101 adds r1, #1
8029a0a: 1052 asrs r2, r2, #1
8029a0c: 3608 adds r6, #8
8029a0e: e7cd b.n 80299ac <_strtod_l+0x4b4>
8029a10: d0ef beq.n 80299f2 <_strtod_l+0x4fa>
8029a12: 4252 negs r2, r2
8029a14: f012 000f ands.w r0, r2, #15
8029a18: d00a beq.n 8029a30 <_strtod_l+0x538>
8029a1a: 4912 ldr r1, [pc, #72] @ (8029a64 <_strtod_l+0x56c>)
8029a1c: eb01 01c0 add.w r1, r1, r0, lsl #3
8029a20: ed91 7b00 vldr d7, [r1]
8029a24: ec4b ab16 vmov d6, sl, fp
8029a28: ee86 7b07 vdiv.f64 d7, d6, d7
8029a2c: ec5b ab17 vmov sl, fp, d7
8029a30: 1112 asrs r2, r2, #4
8029a32: d0de beq.n 80299f2 <_strtod_l+0x4fa>
8029a34: 2a1f cmp r2, #31
8029a36: dd1f ble.n 8029a78 <_strtod_l+0x580>
8029a38: 2400 movs r4, #0
8029a3a: 4625 mov r5, r4
8029a3c: 9407 str r4, [sp, #28]
8029a3e: 4626 mov r6, r4
8029a40: 9a05 ldr r2, [sp, #20]
8029a42: 2322 movs r3, #34 @ 0x22
8029a44: f04f 0a00 mov.w sl, #0
8029a48: f04f 0b00 mov.w fp, #0
8029a4c: 6013 str r3, [r2, #0]
8029a4e: e76a b.n 8029926 <_strtod_l+0x42e>
8029a50: 080320ae .word 0x080320ae
8029a54: 08031f50 .word 0x08031f50
8029a58: 080320a6 .word 0x080320a6
8029a5c: 0803211c .word 0x0803211c
8029a60: 08032118 .word 0x08032118
8029a64: 08032280 .word 0x08032280
8029a68: 08032258 .word 0x08032258
8029a6c: 7ca00000 .word 0x7ca00000
8029a70: 7ff00000 .word 0x7ff00000
8029a74: 7fefffff .word 0x7fefffff
8029a78: f012 0110 ands.w r1, r2, #16
8029a7c: bf18 it ne
8029a7e: 216a movne r1, #106 @ 0x6a
8029a80: 9106 str r1, [sp, #24]
8029a82: ec4b ab17 vmov d7, sl, fp
8029a86: 49b0 ldr r1, [pc, #704] @ (8029d48 <_strtod_l+0x850>)
8029a88: 2000 movs r0, #0
8029a8a: 07d6 lsls r6, r2, #31
8029a8c: d504 bpl.n 8029a98 <_strtod_l+0x5a0>
8029a8e: ed91 6b00 vldr d6, [r1]
8029a92: 2001 movs r0, #1
8029a94: ee27 7b06 vmul.f64 d7, d7, d6
8029a98: 1052 asrs r2, r2, #1
8029a9a: f101 0108 add.w r1, r1, #8
8029a9e: d1f4 bne.n 8029a8a <_strtod_l+0x592>
8029aa0: b108 cbz r0, 8029aa6 <_strtod_l+0x5ae>
8029aa2: ec5b ab17 vmov sl, fp, d7
8029aa6: 9a06 ldr r2, [sp, #24]
8029aa8: b1b2 cbz r2, 8029ad8 <_strtod_l+0x5e0>
8029aaa: f3cb 510a ubfx r1, fp, #20, #11
8029aae: f1c1 026b rsb r2, r1, #107 @ 0x6b
8029ab2: 2a00 cmp r2, #0
8029ab4: 4658 mov r0, fp
8029ab6: dd0f ble.n 8029ad8 <_strtod_l+0x5e0>
8029ab8: 2a1f cmp r2, #31
8029aba: dd55 ble.n 8029b68 <_strtod_l+0x670>
8029abc: 2a34 cmp r2, #52 @ 0x34
8029abe: bfde ittt le
8029ac0: f04f 32ff movle.w r2, #4294967295 @ 0xffffffff
8029ac4: f1c1 014b rsble r1, r1, #75 @ 0x4b
8029ac8: 408a lslle r2, r1
8029aca: f04f 0a00 mov.w sl, #0
8029ace: bfcc ite gt
8029ad0: f04f 7b5c movgt.w fp, #57671680 @ 0x3700000
8029ad4: ea02 0b00 andle.w fp, r2, r0
8029ad8: ec4b ab17 vmov d7, sl, fp
8029adc: eeb5 7b40 vcmp.f64 d7, #0.0
8029ae0: eef1 fa10 vmrs APSR_nzcv, fpscr
8029ae4: d0a8 beq.n 8029a38 <_strtod_l+0x540>
8029ae6: 990a ldr r1, [sp, #40] @ 0x28
8029ae8: 9805 ldr r0, [sp, #20]
8029aea: f8cd 9000 str.w r9, [sp]
8029aee: 462a mov r2, r5
8029af0: f002 fc7a bl 802c3e8 <__s2b>
8029af4: 9007 str r0, [sp, #28]
8029af6: 2800 cmp r0, #0
8029af8: f43f af0a beq.w 8029910 <_strtod_l+0x418>
8029afc: 9b09 ldr r3, [sp, #36] @ 0x24
8029afe: 1b3f subs r7, r7, r4
8029b00: 2b00 cmp r3, #0
8029b02: bfb4 ite lt
8029b04: 463b movlt r3, r7
8029b06: 2300 movge r3, #0
8029b08: 930a str r3, [sp, #40] @ 0x28
8029b0a: 9b09 ldr r3, [sp, #36] @ 0x24
8029b0c: ed9f bb8a vldr d11, [pc, #552] @ 8029d38 <_strtod_l+0x840>
8029b10: ea23 73e3 bic.w r3, r3, r3, asr #31
8029b14: 2400 movs r4, #0
8029b16: 930d str r3, [sp, #52] @ 0x34
8029b18: 4625 mov r5, r4
8029b1a: 9b07 ldr r3, [sp, #28]
8029b1c: 9805 ldr r0, [sp, #20]
8029b1e: 6859 ldr r1, [r3, #4]
8029b20: f002 fbba bl 802c298 <_Balloc>
8029b24: 4606 mov r6, r0
8029b26: 2800 cmp r0, #0
8029b28: f43f aef6 beq.w 8029918 <_strtod_l+0x420>
8029b2c: 9b07 ldr r3, [sp, #28]
8029b2e: 691a ldr r2, [r3, #16]
8029b30: ec4b ab19 vmov d9, sl, fp
8029b34: 3202 adds r2, #2
8029b36: f103 010c add.w r1, r3, #12
8029b3a: 0092 lsls r2, r2, #2
8029b3c: 300c adds r0, #12
8029b3e: f001 f9fe bl 802af3e <memcpy>
8029b42: eeb0 0b49 vmov.f64 d0, d9
8029b46: 9805 ldr r0, [sp, #20]
8029b48: aa14 add r2, sp, #80 @ 0x50
8029b4a: a913 add r1, sp, #76 @ 0x4c
8029b4c: f002 ff88 bl 802ca60 <__d2b>
8029b50: 9012 str r0, [sp, #72] @ 0x48
8029b52: 2800 cmp r0, #0
8029b54: f43f aee0 beq.w 8029918 <_strtod_l+0x420>
8029b58: 9805 ldr r0, [sp, #20]
8029b5a: 2101 movs r1, #1
8029b5c: f002 fcda bl 802c514 <__i2b>
8029b60: 4605 mov r5, r0
8029b62: b940 cbnz r0, 8029b76 <_strtod_l+0x67e>
8029b64: 2500 movs r5, #0
8029b66: e6d7 b.n 8029918 <_strtod_l+0x420>
8029b68: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8029b6c: fa01 f202 lsl.w r2, r1, r2
8029b70: ea02 0a0a and.w sl, r2, sl
8029b74: e7b0 b.n 8029ad8 <_strtod_l+0x5e0>
8029b76: 9f13 ldr r7, [sp, #76] @ 0x4c
8029b78: 9a14 ldr r2, [sp, #80] @ 0x50
8029b7a: 2f00 cmp r7, #0
8029b7c: bfab itete ge
8029b7e: 9b0a ldrge r3, [sp, #40] @ 0x28
8029b80: 9b0d ldrlt r3, [sp, #52] @ 0x34
8029b82: f8dd 8034 ldrge.w r8, [sp, #52] @ 0x34
8029b86: f8dd 9028 ldrlt.w r9, [sp, #40] @ 0x28
8029b8a: bfac ite ge
8029b8c: eb07 0903 addge.w r9, r7, r3
8029b90: eba3 0807 sublt.w r8, r3, r7
8029b94: 9b06 ldr r3, [sp, #24]
8029b96: 1aff subs r7, r7, r3
8029b98: 4417 add r7, r2
8029b9a: f1c2 0336 rsb r3, r2, #54 @ 0x36
8029b9e: 4a6b ldr r2, [pc, #428] @ (8029d4c <_strtod_l+0x854>)
8029ba0: 3f01 subs r7, #1
8029ba2: 4297 cmp r7, r2
8029ba4: da51 bge.n 8029c4a <_strtod_l+0x752>
8029ba6: 1bd1 subs r1, r2, r7
8029ba8: 291f cmp r1, #31
8029baa: eba3 0301 sub.w r3, r3, r1
8029bae: f04f 0201 mov.w r2, #1
8029bb2: dc3e bgt.n 8029c32 <_strtod_l+0x73a>
8029bb4: 408a lsls r2, r1
8029bb6: 920c str r2, [sp, #48] @ 0x30
8029bb8: 2200 movs r2, #0
8029bba: 920b str r2, [sp, #44] @ 0x2c
8029bbc: eb09 0703 add.w r7, r9, r3
8029bc0: 4498 add r8, r3
8029bc2: 9b06 ldr r3, [sp, #24]
8029bc4: 45b9 cmp r9, r7
8029bc6: 4498 add r8, r3
8029bc8: 464b mov r3, r9
8029bca: bfa8 it ge
8029bcc: 463b movge r3, r7
8029bce: 4543 cmp r3, r8
8029bd0: bfa8 it ge
8029bd2: 4643 movge r3, r8
8029bd4: 2b00 cmp r3, #0
8029bd6: bfc2 ittt gt
8029bd8: 1aff subgt r7, r7, r3
8029bda: eba8 0803 subgt.w r8, r8, r3
8029bde: eba9 0903 subgt.w r9, r9, r3
8029be2: 9b0a ldr r3, [sp, #40] @ 0x28
8029be4: 2b00 cmp r3, #0
8029be6: dd16 ble.n 8029c16 <_strtod_l+0x71e>
8029be8: 4629 mov r1, r5
8029bea: 9805 ldr r0, [sp, #20]
8029bec: 461a mov r2, r3
8029bee: f002 fd51 bl 802c694 <__pow5mult>
8029bf2: 4605 mov r5, r0
8029bf4: 2800 cmp r0, #0
8029bf6: d0b5 beq.n 8029b64 <_strtod_l+0x66c>
8029bf8: 4601 mov r1, r0
8029bfa: 9a12 ldr r2, [sp, #72] @ 0x48
8029bfc: 9805 ldr r0, [sp, #20]
8029bfe: f002 fc9f bl 802c540 <__multiply>
8029c02: 900f str r0, [sp, #60] @ 0x3c
8029c04: 2800 cmp r0, #0
8029c06: f43f ae87 beq.w 8029918 <_strtod_l+0x420>
8029c0a: 9912 ldr r1, [sp, #72] @ 0x48
8029c0c: 9805 ldr r0, [sp, #20]
8029c0e: f002 fb83 bl 802c318 <_Bfree>
8029c12: 9b0f ldr r3, [sp, #60] @ 0x3c
8029c14: 9312 str r3, [sp, #72] @ 0x48
8029c16: 2f00 cmp r7, #0
8029c18: dc1b bgt.n 8029c52 <_strtod_l+0x75a>
8029c1a: 9b09 ldr r3, [sp, #36] @ 0x24
8029c1c: 2b00 cmp r3, #0
8029c1e: dd21 ble.n 8029c64 <_strtod_l+0x76c>
8029c20: 4631 mov r1, r6
8029c22: 9a0d ldr r2, [sp, #52] @ 0x34
8029c24: 9805 ldr r0, [sp, #20]
8029c26: f002 fd35 bl 802c694 <__pow5mult>
8029c2a: 4606 mov r6, r0
8029c2c: b9d0 cbnz r0, 8029c64 <_strtod_l+0x76c>
8029c2e: 2600 movs r6, #0
8029c30: e672 b.n 8029918 <_strtod_l+0x420>
8029c32: f1c7 477f rsb r7, r7, #4278190080 @ 0xff000000
8029c36: f507 077f add.w r7, r7, #16711680 @ 0xff0000
8029c3a: f507 477b add.w r7, r7, #64256 @ 0xfb00
8029c3e: 37e2 adds r7, #226 @ 0xe2
8029c40: fa02 f107 lsl.w r1, r2, r7
8029c44: 910b str r1, [sp, #44] @ 0x2c
8029c46: 920c str r2, [sp, #48] @ 0x30
8029c48: e7b8 b.n 8029bbc <_strtod_l+0x6c4>
8029c4a: 2200 movs r2, #0
8029c4c: 920b str r2, [sp, #44] @ 0x2c
8029c4e: 2201 movs r2, #1
8029c50: e7f9 b.n 8029c46 <_strtod_l+0x74e>
8029c52: 9912 ldr r1, [sp, #72] @ 0x48
8029c54: 9805 ldr r0, [sp, #20]
8029c56: 463a mov r2, r7
8029c58: f002 fd76 bl 802c748 <__lshift>
8029c5c: 9012 str r0, [sp, #72] @ 0x48
8029c5e: 2800 cmp r0, #0
8029c60: d1db bne.n 8029c1a <_strtod_l+0x722>
8029c62: e659 b.n 8029918 <_strtod_l+0x420>
8029c64: f1b8 0f00 cmp.w r8, #0
8029c68: dd07 ble.n 8029c7a <_strtod_l+0x782>
8029c6a: 4631 mov r1, r6
8029c6c: 9805 ldr r0, [sp, #20]
8029c6e: 4642 mov r2, r8
8029c70: f002 fd6a bl 802c748 <__lshift>
8029c74: 4606 mov r6, r0
8029c76: 2800 cmp r0, #0
8029c78: d0d9 beq.n 8029c2e <_strtod_l+0x736>
8029c7a: f1b9 0f00 cmp.w r9, #0
8029c7e: dd08 ble.n 8029c92 <_strtod_l+0x79a>
8029c80: 4629 mov r1, r5
8029c82: 9805 ldr r0, [sp, #20]
8029c84: 464a mov r2, r9
8029c86: f002 fd5f bl 802c748 <__lshift>
8029c8a: 4605 mov r5, r0
8029c8c: 2800 cmp r0, #0
8029c8e: f43f ae43 beq.w 8029918 <_strtod_l+0x420>
8029c92: 9912 ldr r1, [sp, #72] @ 0x48
8029c94: 9805 ldr r0, [sp, #20]
8029c96: 4632 mov r2, r6
8029c98: f002 fdde bl 802c858 <__mdiff>
8029c9c: 4604 mov r4, r0
8029c9e: 2800 cmp r0, #0
8029ca0: f43f ae3a beq.w 8029918 <_strtod_l+0x420>
8029ca4: 2300 movs r3, #0
8029ca6: f8d0 800c ldr.w r8, [r0, #12]
8029caa: 60c3 str r3, [r0, #12]
8029cac: 4629 mov r1, r5
8029cae: f002 fdb7 bl 802c820 <__mcmp>
8029cb2: 2800 cmp r0, #0
8029cb4: da4e bge.n 8029d54 <_strtod_l+0x85c>
8029cb6: ea58 080a orrs.w r8, r8, sl
8029cba: d174 bne.n 8029da6 <_strtod_l+0x8ae>
8029cbc: f3cb 0313 ubfx r3, fp, #0, #20
8029cc0: 2b00 cmp r3, #0
8029cc2: d170 bne.n 8029da6 <_strtod_l+0x8ae>
8029cc4: f02b 4300 bic.w r3, fp, #2147483648 @ 0x80000000
8029cc8: 0d1b lsrs r3, r3, #20
8029cca: 051b lsls r3, r3, #20
8029ccc: f1b3 6fd6 cmp.w r3, #112197632 @ 0x6b00000
8029cd0: d969 bls.n 8029da6 <_strtod_l+0x8ae>
8029cd2: 6963 ldr r3, [r4, #20]
8029cd4: b913 cbnz r3, 8029cdc <_strtod_l+0x7e4>
8029cd6: 6923 ldr r3, [r4, #16]
8029cd8: 2b01 cmp r3, #1
8029cda: dd64 ble.n 8029da6 <_strtod_l+0x8ae>
8029cdc: 4621 mov r1, r4
8029cde: 2201 movs r2, #1
8029ce0: 9805 ldr r0, [sp, #20]
8029ce2: f002 fd31 bl 802c748 <__lshift>
8029ce6: 4629 mov r1, r5
8029ce8: 4604 mov r4, r0
8029cea: f002 fd99 bl 802c820 <__mcmp>
8029cee: 2800 cmp r0, #0
8029cf0: dd59 ble.n 8029da6 <_strtod_l+0x8ae>
8029cf2: f02b 4300 bic.w r3, fp, #2147483648 @ 0x80000000
8029cf6: 9a06 ldr r2, [sp, #24]
8029cf8: 0d1b lsrs r3, r3, #20
8029cfa: 051b lsls r3, r3, #20
8029cfc: 2a00 cmp r2, #0
8029cfe: d070 beq.n 8029de2 <_strtod_l+0x8ea>
8029d00: f1b3 6fd6 cmp.w r3, #112197632 @ 0x6b00000
8029d04: d86d bhi.n 8029de2 <_strtod_l+0x8ea>
8029d06: f1b3 7f5c cmp.w r3, #57671680 @ 0x3700000
8029d0a: f67f ae99 bls.w 8029a40 <_strtod_l+0x548>
8029d0e: ed9f 7b0c vldr d7, [pc, #48] @ 8029d40 <_strtod_l+0x848>
8029d12: ec4b ab16 vmov d6, sl, fp
8029d16: 4b0e ldr r3, [pc, #56] @ (8029d50 <_strtod_l+0x858>)
8029d18: ee26 7b07 vmul.f64 d7, d6, d7
8029d1c: ee17 2a90 vmov r2, s15
8029d20: 4013 ands r3, r2
8029d22: ec5b ab17 vmov sl, fp, d7
8029d26: 2b00 cmp r3, #0
8029d28: f47f ae01 bne.w 802992e <_strtod_l+0x436>
8029d2c: 9a05 ldr r2, [sp, #20]
8029d2e: 2322 movs r3, #34 @ 0x22
8029d30: 6013 str r3, [r2, #0]
8029d32: e5fc b.n 802992e <_strtod_l+0x436>
8029d34: f3af 8000 nop.w
8029d38: ffc00000 .word 0xffc00000
8029d3c: 41dfffff .word 0x41dfffff
8029d40: 00000000 .word 0x00000000
8029d44: 39500000 .word 0x39500000
8029d48: 08031f78 .word 0x08031f78
8029d4c: fffffc02 .word 0xfffffc02
8029d50: 7ff00000 .word 0x7ff00000
8029d54: 46d9 mov r9, fp
8029d56: d15d bne.n 8029e14 <_strtod_l+0x91c>
8029d58: f3cb 0313 ubfx r3, fp, #0, #20
8029d5c: f1b8 0f00 cmp.w r8, #0
8029d60: d02a beq.n 8029db8 <_strtod_l+0x8c0>
8029d62: 4aab ldr r2, [pc, #684] @ (802a010 <_strtod_l+0xb18>)
8029d64: 4293 cmp r3, r2
8029d66: d12a bne.n 8029dbe <_strtod_l+0x8c6>
8029d68: 9b06 ldr r3, [sp, #24]
8029d6a: 4652 mov r2, sl
8029d6c: b1fb cbz r3, 8029dae <_strtod_l+0x8b6>
8029d6e: 4ba9 ldr r3, [pc, #676] @ (802a014 <_strtod_l+0xb1c>)
8029d70: ea0b 0303 and.w r3, fp, r3
8029d74: f1b3 6fd4 cmp.w r3, #111149056 @ 0x6a00000
8029d78: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8029d7c: d81a bhi.n 8029db4 <_strtod_l+0x8bc>
8029d7e: 0d1b lsrs r3, r3, #20
8029d80: f1c3 036b rsb r3, r3, #107 @ 0x6b
8029d84: fa01 f303 lsl.w r3, r1, r3
8029d88: 429a cmp r2, r3
8029d8a: d118 bne.n 8029dbe <_strtod_l+0x8c6>
8029d8c: 4ba2 ldr r3, [pc, #648] @ (802a018 <_strtod_l+0xb20>)
8029d8e: 4599 cmp r9, r3
8029d90: d102 bne.n 8029d98 <_strtod_l+0x8a0>
8029d92: 3201 adds r2, #1
8029d94: f43f adc0 beq.w 8029918 <_strtod_l+0x420>
8029d98: 4b9e ldr r3, [pc, #632] @ (802a014 <_strtod_l+0xb1c>)
8029d9a: ea09 0303 and.w r3, r9, r3
8029d9e: f503 1b80 add.w fp, r3, #1048576 @ 0x100000
8029da2: f04f 0a00 mov.w sl, #0
8029da6: 9b06 ldr r3, [sp, #24]
8029da8: 2b00 cmp r3, #0
8029daa: d1b0 bne.n 8029d0e <_strtod_l+0x816>
8029dac: e5bf b.n 802992e <_strtod_l+0x436>
8029dae: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff
8029db2: e7e9 b.n 8029d88 <_strtod_l+0x890>
8029db4: 460b mov r3, r1
8029db6: e7e7 b.n 8029d88 <_strtod_l+0x890>
8029db8: ea53 030a orrs.w r3, r3, sl
8029dbc: d099 beq.n 8029cf2 <_strtod_l+0x7fa>
8029dbe: 9b0b ldr r3, [sp, #44] @ 0x2c
8029dc0: b1c3 cbz r3, 8029df4 <_strtod_l+0x8fc>
8029dc2: ea13 0f09 tst.w r3, r9
8029dc6: d0ee beq.n 8029da6 <_strtod_l+0x8ae>
8029dc8: 9a06 ldr r2, [sp, #24]
8029dca: 4650 mov r0, sl
8029dcc: 4659 mov r1, fp
8029dce: f1b8 0f00 cmp.w r8, #0
8029dd2: d013 beq.n 8029dfc <_strtod_l+0x904>
8029dd4: f7ff fb74 bl 80294c0 <sulp>
8029dd8: ee39 7b00 vadd.f64 d7, d9, d0
8029ddc: ec5b ab17 vmov sl, fp, d7
8029de0: e7e1 b.n 8029da6 <_strtod_l+0x8ae>
8029de2: f5a3 1380 sub.w r3, r3, #1048576 @ 0x100000
8029de6: ea6f 5b13 mvn.w fp, r3, lsr #20
8029dea: ea6f 5b0b mvn.w fp, fp, lsl #20
8029dee: f04f 3aff mov.w sl, #4294967295 @ 0xffffffff
8029df2: e7d8 b.n 8029da6 <_strtod_l+0x8ae>
8029df4: 9b0c ldr r3, [sp, #48] @ 0x30
8029df6: ea13 0f0a tst.w r3, sl
8029dfa: e7e4 b.n 8029dc6 <_strtod_l+0x8ce>
8029dfc: f7ff fb60 bl 80294c0 <sulp>
8029e00: ee39 0b40 vsub.f64 d0, d9, d0
8029e04: eeb5 0b40 vcmp.f64 d0, #0.0
8029e08: eef1 fa10 vmrs APSR_nzcv, fpscr
8029e0c: ec5b ab10 vmov sl, fp, d0
8029e10: d1c9 bne.n 8029da6 <_strtod_l+0x8ae>
8029e12: e615 b.n 8029a40 <_strtod_l+0x548>
8029e14: 4629 mov r1, r5
8029e16: 4620 mov r0, r4
8029e18: f002 fe7a bl 802cb10 <__ratio>
8029e1c: eeb0 7b00 vmov.f64 d7, #0 @ 0x40000000 2.0
8029e20: eeb4 0bc7 vcmpe.f64 d0, d7
8029e24: eef1 fa10 vmrs APSR_nzcv, fpscr
8029e28: d85d bhi.n 8029ee6 <_strtod_l+0x9ee>
8029e2a: f1b8 0f00 cmp.w r8, #0
8029e2e: d164 bne.n 8029efa <_strtod_l+0xa02>
8029e30: f1ba 0f00 cmp.w sl, #0
8029e34: d14b bne.n 8029ece <_strtod_l+0x9d6>
8029e36: f3cb 0313 ubfx r3, fp, #0, #20
8029e3a: eeb7 8b00 vmov.f64 d8, #112 @ 0x3f800000 1.0
8029e3e: 2b00 cmp r3, #0
8029e40: d160 bne.n 8029f04 <_strtod_l+0xa0c>
8029e42: eeb4 0bc8 vcmpe.f64 d0, d8
8029e46: eeb6 8b00 vmov.f64 d8, #96 @ 0x3f000000 0.5
8029e4a: eef1 fa10 vmrs APSR_nzcv, fpscr
8029e4e: d401 bmi.n 8029e54 <_strtod_l+0x95c>
8029e50: ee20 8b08 vmul.f64 d8, d0, d8
8029e54: eeb1 ab48 vneg.f64 d10, d8
8029e58: 486e ldr r0, [pc, #440] @ (802a014 <_strtod_l+0xb1c>)
8029e5a: 4970 ldr r1, [pc, #448] @ (802a01c <_strtod_l+0xb24>)
8029e5c: ea09 0700 and.w r7, r9, r0
8029e60: 428f cmp r7, r1
8029e62: ec53 2b1a vmov r2, r3, d10
8029e66: d17d bne.n 8029f64 <_strtod_l+0xa6c>
8029e68: f1a9 7b54 sub.w fp, r9, #55574528 @ 0x3500000
8029e6c: ec4b ab1c vmov d12, sl, fp
8029e70: eeb0 0b4c vmov.f64 d0, d12
8029e74: f002 fd84 bl 802c980 <__ulp>
8029e78: 4866 ldr r0, [pc, #408] @ (802a014 <_strtod_l+0xb1c>)
8029e7a: eea0 cb0a vfma.f64 d12, d0, d10
8029e7e: ee1c 3a90 vmov r3, s25
8029e82: 4a67 ldr r2, [pc, #412] @ (802a020 <_strtod_l+0xb28>)
8029e84: ea03 0100 and.w r1, r3, r0
8029e88: 4291 cmp r1, r2
8029e8a: ec5b ab1c vmov sl, fp, d12
8029e8e: d93c bls.n 8029f0a <_strtod_l+0xa12>
8029e90: ee19 2a90 vmov r2, s19
8029e94: 4b60 ldr r3, [pc, #384] @ (802a018 <_strtod_l+0xb20>)
8029e96: 429a cmp r2, r3
8029e98: d104 bne.n 8029ea4 <_strtod_l+0x9ac>
8029e9a: ee19 3a10 vmov r3, s18
8029e9e: 3301 adds r3, #1
8029ea0: f43f ad3a beq.w 8029918 <_strtod_l+0x420>
8029ea4: f8df b170 ldr.w fp, [pc, #368] @ 802a018 <_strtod_l+0xb20>
8029ea8: f04f 3aff mov.w sl, #4294967295 @ 0xffffffff
8029eac: 9912 ldr r1, [sp, #72] @ 0x48
8029eae: 9805 ldr r0, [sp, #20]
8029eb0: f002 fa32 bl 802c318 <_Bfree>
8029eb4: 9805 ldr r0, [sp, #20]
8029eb6: 4631 mov r1, r6
8029eb8: f002 fa2e bl 802c318 <_Bfree>
8029ebc: 9805 ldr r0, [sp, #20]
8029ebe: 4629 mov r1, r5
8029ec0: f002 fa2a bl 802c318 <_Bfree>
8029ec4: 9805 ldr r0, [sp, #20]
8029ec6: 4621 mov r1, r4
8029ec8: f002 fa26 bl 802c318 <_Bfree>
8029ecc: e625 b.n 8029b1a <_strtod_l+0x622>
8029ece: f1ba 0f01 cmp.w sl, #1
8029ed2: d103 bne.n 8029edc <_strtod_l+0x9e4>
8029ed4: f1bb 0f00 cmp.w fp, #0
8029ed8: f43f adb2 beq.w 8029a40 <_strtod_l+0x548>
8029edc: eebf ab00 vmov.f64 d10, #240 @ 0xbf800000 -1.0
8029ee0: eeb7 8b00 vmov.f64 d8, #112 @ 0x3f800000 1.0
8029ee4: e7b8 b.n 8029e58 <_strtod_l+0x960>
8029ee6: eeb6 8b00 vmov.f64 d8, #96 @ 0x3f000000 0.5
8029eea: ee20 8b08 vmul.f64 d8, d0, d8
8029eee: f1b8 0f00 cmp.w r8, #0
8029ef2: d0af beq.n 8029e54 <_strtod_l+0x95c>
8029ef4: eeb0 ab48 vmov.f64 d10, d8
8029ef8: e7ae b.n 8029e58 <_strtod_l+0x960>
8029efa: eeb7 ab00 vmov.f64 d10, #112 @ 0x3f800000 1.0
8029efe: eeb0 8b4a vmov.f64 d8, d10
8029f02: e7a9 b.n 8029e58 <_strtod_l+0x960>
8029f04: eebf ab00 vmov.f64 d10, #240 @ 0xbf800000 -1.0
8029f08: e7a6 b.n 8029e58 <_strtod_l+0x960>
8029f0a: f103 7b54 add.w fp, r3, #55574528 @ 0x3500000
8029f0e: 9b06 ldr r3, [sp, #24]
8029f10: 46d9 mov r9, fp
8029f12: 2b00 cmp r3, #0
8029f14: d1ca bne.n 8029eac <_strtod_l+0x9b4>
8029f16: f02b 4300 bic.w r3, fp, #2147483648 @ 0x80000000
8029f1a: 0d1b lsrs r3, r3, #20
8029f1c: 051b lsls r3, r3, #20
8029f1e: 429f cmp r7, r3
8029f20: d1c4 bne.n 8029eac <_strtod_l+0x9b4>
8029f22: ec51 0b18 vmov r0, r1, d8
8029f26: f7d6 fc17 bl 8000758 <__aeabi_d2lz>
8029f2a: f7d6 fbcf bl 80006cc <__aeabi_l2d>
8029f2e: f3cb 0913 ubfx r9, fp, #0, #20
8029f32: ec41 0b17 vmov d7, r0, r1
8029f36: ea49 090a orr.w r9, r9, sl
8029f3a: ea59 0908 orrs.w r9, r9, r8
8029f3e: ee38 8b47 vsub.f64 d8, d8, d7
8029f42: d03c beq.n 8029fbe <_strtod_l+0xac6>
8029f44: ed9f 7b2c vldr d7, [pc, #176] @ 8029ff8 <_strtod_l+0xb00>
8029f48: eeb4 8bc7 vcmpe.f64 d8, d7
8029f4c: eef1 fa10 vmrs APSR_nzcv, fpscr
8029f50: f53f aced bmi.w 802992e <_strtod_l+0x436>
8029f54: ed9f 7b2a vldr d7, [pc, #168] @ 802a000 <_strtod_l+0xb08>
8029f58: eeb4 8bc7 vcmpe.f64 d8, d7
8029f5c: eef1 fa10 vmrs APSR_nzcv, fpscr
8029f60: dda4 ble.n 8029eac <_strtod_l+0x9b4>
8029f62: e4e4 b.n 802992e <_strtod_l+0x436>
8029f64: 9906 ldr r1, [sp, #24]
8029f66: b1e1 cbz r1, 8029fa2 <_strtod_l+0xaaa>
8029f68: f1b7 6fd4 cmp.w r7, #111149056 @ 0x6a00000
8029f6c: d819 bhi.n 8029fa2 <_strtod_l+0xaaa>
8029f6e: eeb4 8bcb vcmpe.f64 d8, d11
8029f72: eef1 fa10 vmrs APSR_nzcv, fpscr
8029f76: d811 bhi.n 8029f9c <_strtod_l+0xaa4>
8029f78: eebc 8bc8 vcvt.u32.f64 s16, d8
8029f7c: ee18 3a10 vmov r3, s16
8029f80: 2b01 cmp r3, #1
8029f82: bf38 it cc
8029f84: 2301 movcc r3, #1
8029f86: ee08 3a10 vmov s16, r3
8029f8a: eeb8 8b48 vcvt.f64.u32 d8, s16
8029f8e: f1b8 0f00 cmp.w r8, #0
8029f92: d111 bne.n 8029fb8 <_strtod_l+0xac0>
8029f94: eeb1 7b48 vneg.f64 d7, d8
8029f98: ec53 2b17 vmov r2, r3, d7
8029f9c: f103 61d6 add.w r1, r3, #112197632 @ 0x6b00000
8029fa0: 1bcb subs r3, r1, r7
8029fa2: eeb0 0b49 vmov.f64 d0, d9
8029fa6: ec43 2b1a vmov d10, r2, r3
8029faa: f002 fce9 bl 802c980 <__ulp>
8029fae: eeaa 9b00 vfma.f64 d9, d10, d0
8029fb2: ec5b ab19 vmov sl, fp, d9
8029fb6: e7aa b.n 8029f0e <_strtod_l+0xa16>
8029fb8: eeb0 7b48 vmov.f64 d7, d8
8029fbc: e7ec b.n 8029f98 <_strtod_l+0xaa0>
8029fbe: ed9f 7b12 vldr d7, [pc, #72] @ 802a008 <_strtod_l+0xb10>
8029fc2: eeb4 8bc7 vcmpe.f64 d8, d7
8029fc6: eef1 fa10 vmrs APSR_nzcv, fpscr
8029fca: f57f af6f bpl.w 8029eac <_strtod_l+0x9b4>
8029fce: e4ae b.n 802992e <_strtod_l+0x436>
8029fd0: 2300 movs r3, #0
8029fd2: 9308 str r3, [sp, #32]
8029fd4: 9a0e ldr r2, [sp, #56] @ 0x38
8029fd6: 9b11 ldr r3, [sp, #68] @ 0x44
8029fd8: 6013 str r3, [r2, #0]
8029fda: f7ff bacc b.w 8029576 <_strtod_l+0x7e>
8029fde: 2a65 cmp r2, #101 @ 0x65
8029fe0: f43f abbc beq.w 802975c <_strtod_l+0x264>
8029fe4: 2a45 cmp r2, #69 @ 0x45
8029fe6: f43f abb9 beq.w 802975c <_strtod_l+0x264>
8029fea: 2301 movs r3, #1
8029fec: 9306 str r3, [sp, #24]
8029fee: f7ff bbf0 b.w 80297d2 <_strtod_l+0x2da>
8029ff2: bf00 nop
8029ff4: f3af 8000 nop.w
8029ff8: 94a03595 .word 0x94a03595
8029ffc: 3fdfffff .word 0x3fdfffff
802a000: 35afe535 .word 0x35afe535
802a004: 3fe00000 .word 0x3fe00000
802a008: 94a03595 .word 0x94a03595
802a00c: 3fcfffff .word 0x3fcfffff
802a010: 000fffff .word 0x000fffff
802a014: 7ff00000 .word 0x7ff00000
802a018: 7fefffff .word 0x7fefffff
802a01c: 7fe00000 .word 0x7fe00000
802a020: 7c9fffff .word 0x7c9fffff
0802a024 <strtod>:
802a024: 460a mov r2, r1
802a026: 4601 mov r1, r0
802a028: 4802 ldr r0, [pc, #8] @ (802a034 <strtod+0x10>)
802a02a: 4b03 ldr r3, [pc, #12] @ (802a038 <strtod+0x14>)
802a02c: 6800 ldr r0, [r0, #0]
802a02e: f7ff ba63 b.w 80294f8 <_strtod_l>
802a032: bf00 nop
802a034: 240001d4 .word 0x240001d4
802a038: 24000068 .word 0x24000068
0802a03c <__cvt>:
802a03c: b5f0 push {r4, r5, r6, r7, lr}
802a03e: ed2d 8b02 vpush {d8}
802a042: eeb0 8b40 vmov.f64 d8, d0
802a046: b085 sub sp, #20
802a048: 4617 mov r7, r2
802a04a: 9d0d ldr r5, [sp, #52] @ 0x34
802a04c: 9e0c ldr r6, [sp, #48] @ 0x30
802a04e: ee18 2a90 vmov r2, s17
802a052: f025 0520 bic.w r5, r5, #32
802a056: 2a00 cmp r2, #0
802a058: bfb6 itet lt
802a05a: 222d movlt r2, #45 @ 0x2d
802a05c: 2200 movge r2, #0
802a05e: eeb1 8b40 vneglt.f64 d8, d0
802a062: 2d46 cmp r5, #70 @ 0x46
802a064: 460c mov r4, r1
802a066: 701a strb r2, [r3, #0]
802a068: d004 beq.n 802a074 <__cvt+0x38>
802a06a: 2d45 cmp r5, #69 @ 0x45
802a06c: d100 bne.n 802a070 <__cvt+0x34>
802a06e: 3401 adds r4, #1
802a070: 2102 movs r1, #2
802a072: e000 b.n 802a076 <__cvt+0x3a>
802a074: 2103 movs r1, #3
802a076: ab03 add r3, sp, #12
802a078: 9301 str r3, [sp, #4]
802a07a: ab02 add r3, sp, #8
802a07c: 9300 str r3, [sp, #0]
802a07e: 4622 mov r2, r4
802a080: 4633 mov r3, r6
802a082: eeb0 0b48 vmov.f64 d0, d8
802a086: f001 f81b bl 802b0c0 <_dtoa_r>
802a08a: 2d47 cmp r5, #71 @ 0x47
802a08c: d114 bne.n 802a0b8 <__cvt+0x7c>
802a08e: 07fb lsls r3, r7, #31
802a090: d50a bpl.n 802a0a8 <__cvt+0x6c>
802a092: 1902 adds r2, r0, r4
802a094: eeb5 8b40 vcmp.f64 d8, #0.0
802a098: eef1 fa10 vmrs APSR_nzcv, fpscr
802a09c: bf08 it eq
802a09e: 9203 streq r2, [sp, #12]
802a0a0: 2130 movs r1, #48 @ 0x30
802a0a2: 9b03 ldr r3, [sp, #12]
802a0a4: 4293 cmp r3, r2
802a0a6: d319 bcc.n 802a0dc <__cvt+0xa0>
802a0a8: 9b03 ldr r3, [sp, #12]
802a0aa: 9a0e ldr r2, [sp, #56] @ 0x38
802a0ac: 1a1b subs r3, r3, r0
802a0ae: 6013 str r3, [r2, #0]
802a0b0: b005 add sp, #20
802a0b2: ecbd 8b02 vpop {d8}
802a0b6: bdf0 pop {r4, r5, r6, r7, pc}
802a0b8: 2d46 cmp r5, #70 @ 0x46
802a0ba: eb00 0204 add.w r2, r0, r4
802a0be: d1e9 bne.n 802a094 <__cvt+0x58>
802a0c0: 7803 ldrb r3, [r0, #0]
802a0c2: 2b30 cmp r3, #48 @ 0x30
802a0c4: d107 bne.n 802a0d6 <__cvt+0x9a>
802a0c6: eeb5 8b40 vcmp.f64 d8, #0.0
802a0ca: eef1 fa10 vmrs APSR_nzcv, fpscr
802a0ce: bf1c itt ne
802a0d0: f1c4 0401 rsbne r4, r4, #1
802a0d4: 6034 strne r4, [r6, #0]
802a0d6: 6833 ldr r3, [r6, #0]
802a0d8: 441a add r2, r3
802a0da: e7db b.n 802a094 <__cvt+0x58>
802a0dc: 1c5c adds r4, r3, #1
802a0de: 9403 str r4, [sp, #12]
802a0e0: 7019 strb r1, [r3, #0]
802a0e2: e7de b.n 802a0a2 <__cvt+0x66>
0802a0e4 <__exponent>:
802a0e4: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
802a0e6: 2900 cmp r1, #0
802a0e8: bfba itte lt
802a0ea: 4249 neglt r1, r1
802a0ec: 232d movlt r3, #45 @ 0x2d
802a0ee: 232b movge r3, #43 @ 0x2b
802a0f0: 2909 cmp r1, #9
802a0f2: 7002 strb r2, [r0, #0]
802a0f4: 7043 strb r3, [r0, #1]
802a0f6: dd29 ble.n 802a14c <__exponent+0x68>
802a0f8: f10d 0307 add.w r3, sp, #7
802a0fc: 461d mov r5, r3
802a0fe: 270a movs r7, #10
802a100: 461a mov r2, r3
802a102: fbb1 f6f7 udiv r6, r1, r7
802a106: fb07 1416 mls r4, r7, r6, r1
802a10a: 3430 adds r4, #48 @ 0x30
802a10c: f802 4c01 strb.w r4, [r2, #-1]
802a110: 460c mov r4, r1
802a112: 2c63 cmp r4, #99 @ 0x63
802a114: f103 33ff add.w r3, r3, #4294967295 @ 0xffffffff
802a118: 4631 mov r1, r6
802a11a: dcf1 bgt.n 802a100 <__exponent+0x1c>
802a11c: 3130 adds r1, #48 @ 0x30
802a11e: 1e94 subs r4, r2, #2
802a120: f803 1c01 strb.w r1, [r3, #-1]
802a124: 1c41 adds r1, r0, #1
802a126: 4623 mov r3, r4
802a128: 42ab cmp r3, r5
802a12a: d30a bcc.n 802a142 <__exponent+0x5e>
802a12c: f10d 0309 add.w r3, sp, #9
802a130: 1a9b subs r3, r3, r2
802a132: 42ac cmp r4, r5
802a134: bf88 it hi
802a136: 2300 movhi r3, #0
802a138: 3302 adds r3, #2
802a13a: 4403 add r3, r0
802a13c: 1a18 subs r0, r3, r0
802a13e: b003 add sp, #12
802a140: bdf0 pop {r4, r5, r6, r7, pc}
802a142: f813 6b01 ldrb.w r6, [r3], #1
802a146: f801 6f01 strb.w r6, [r1, #1]!
802a14a: e7ed b.n 802a128 <__exponent+0x44>
802a14c: 2330 movs r3, #48 @ 0x30
802a14e: 3130 adds r1, #48 @ 0x30
802a150: 7083 strb r3, [r0, #2]
802a152: 70c1 strb r1, [r0, #3]
802a154: 1d03 adds r3, r0, #4
802a156: e7f1 b.n 802a13c <__exponent+0x58>
0802a158 <_printf_float>:
802a158: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
802a15c: b08d sub sp, #52 @ 0x34
802a15e: 460c mov r4, r1
802a160: f8dd 8058 ldr.w r8, [sp, #88] @ 0x58
802a164: 4616 mov r6, r2
802a166: 461f mov r7, r3
802a168: 4605 mov r5, r0
802a16a: f000 fe0b bl 802ad84 <_localeconv_r>
802a16e: f8d0 b000 ldr.w fp, [r0]
802a172: 4658 mov r0, fp
802a174: f7d6 f914 bl 80003a0 <strlen>
802a178: 2300 movs r3, #0
802a17a: 930a str r3, [sp, #40] @ 0x28
802a17c: f8d8 3000 ldr.w r3, [r8]
802a180: f894 9018 ldrb.w r9, [r4, #24]
802a184: 6822 ldr r2, [r4, #0]
802a186: 9005 str r0, [sp, #20]
802a188: 3307 adds r3, #7
802a18a: f023 0307 bic.w r3, r3, #7
802a18e: f103 0108 add.w r1, r3, #8
802a192: f8c8 1000 str.w r1, [r8]
802a196: ed93 0b00 vldr d0, [r3]
802a19a: ed9f 6b97 vldr d6, [pc, #604] @ 802a3f8 <_printf_float+0x2a0>
802a19e: eeb0 7bc0 vabs.f64 d7, d0
802a1a2: eeb4 7b46 vcmp.f64 d7, d6
802a1a6: eef1 fa10 vmrs APSR_nzcv, fpscr
802a1aa: ed84 0b12 vstr d0, [r4, #72] @ 0x48
802a1ae: dd24 ble.n 802a1fa <_printf_float+0xa2>
802a1b0: eeb5 0bc0 vcmpe.f64 d0, #0.0
802a1b4: eef1 fa10 vmrs APSR_nzcv, fpscr
802a1b8: d502 bpl.n 802a1c0 <_printf_float+0x68>
802a1ba: 232d movs r3, #45 @ 0x2d
802a1bc: f884 3043 strb.w r3, [r4, #67] @ 0x43
802a1c0: 498f ldr r1, [pc, #572] @ (802a400 <_printf_float+0x2a8>)
802a1c2: 4b90 ldr r3, [pc, #576] @ (802a404 <_printf_float+0x2ac>)
802a1c4: f1b9 0f47 cmp.w r9, #71 @ 0x47
802a1c8: bf94 ite ls
802a1ca: 4688 movls r8, r1
802a1cc: 4698 movhi r8, r3
802a1ce: f022 0204 bic.w r2, r2, #4
802a1d2: 2303 movs r3, #3
802a1d4: 6123 str r3, [r4, #16]
802a1d6: 6022 str r2, [r4, #0]
802a1d8: f04f 0a00 mov.w sl, #0
802a1dc: 9700 str r7, [sp, #0]
802a1de: 4633 mov r3, r6
802a1e0: aa0b add r2, sp, #44 @ 0x2c
802a1e2: 4621 mov r1, r4
802a1e4: 4628 mov r0, r5
802a1e6: f000 f9d1 bl 802a58c <_printf_common>
802a1ea: 3001 adds r0, #1
802a1ec: f040 8089 bne.w 802a302 <_printf_float+0x1aa>
802a1f0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802a1f4: b00d add sp, #52 @ 0x34
802a1f6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802a1fa: eeb4 0b40 vcmp.f64 d0, d0
802a1fe: eef1 fa10 vmrs APSR_nzcv, fpscr
802a202: d709 bvc.n 802a218 <_printf_float+0xc0>
802a204: ee10 3a90 vmov r3, s1
802a208: 2b00 cmp r3, #0
802a20a: bfbc itt lt
802a20c: 232d movlt r3, #45 @ 0x2d
802a20e: f884 3043 strblt.w r3, [r4, #67] @ 0x43
802a212: 497d ldr r1, [pc, #500] @ (802a408 <_printf_float+0x2b0>)
802a214: 4b7d ldr r3, [pc, #500] @ (802a40c <_printf_float+0x2b4>)
802a216: e7d5 b.n 802a1c4 <_printf_float+0x6c>
802a218: 6863 ldr r3, [r4, #4]
802a21a: 1c59 adds r1, r3, #1
802a21c: f009 0adf and.w sl, r9, #223 @ 0xdf
802a220: d139 bne.n 802a296 <_printf_float+0x13e>
802a222: 2306 movs r3, #6
802a224: 6063 str r3, [r4, #4]
802a226: f442 6280 orr.w r2, r2, #1024 @ 0x400
802a22a: 2300 movs r3, #0
802a22c: 6022 str r2, [r4, #0]
802a22e: 9303 str r3, [sp, #12]
802a230: ab0a add r3, sp, #40 @ 0x28
802a232: e9cd 9301 strd r9, r3, [sp, #4]
802a236: ab09 add r3, sp, #36 @ 0x24
802a238: 9300 str r3, [sp, #0]
802a23a: 6861 ldr r1, [r4, #4]
802a23c: f10d 0323 add.w r3, sp, #35 @ 0x23
802a240: 4628 mov r0, r5
802a242: f7ff fefb bl 802a03c <__cvt>
802a246: f1ba 0f47 cmp.w sl, #71 @ 0x47
802a24a: 9909 ldr r1, [sp, #36] @ 0x24
802a24c: 4680 mov r8, r0
802a24e: d129 bne.n 802a2a4 <_printf_float+0x14c>
802a250: 1cc8 adds r0, r1, #3
802a252: db02 blt.n 802a25a <_printf_float+0x102>
802a254: 6863 ldr r3, [r4, #4]
802a256: 4299 cmp r1, r3
802a258: dd41 ble.n 802a2de <_printf_float+0x186>
802a25a: f1a9 0902 sub.w r9, r9, #2
802a25e: fa5f f989 uxtb.w r9, r9
802a262: 3901 subs r1, #1
802a264: 464a mov r2, r9
802a266: f104 0050 add.w r0, r4, #80 @ 0x50
802a26a: 9109 str r1, [sp, #36] @ 0x24
802a26c: f7ff ff3a bl 802a0e4 <__exponent>
802a270: 9a0a ldr r2, [sp, #40] @ 0x28
802a272: 1813 adds r3, r2, r0
802a274: 2a01 cmp r2, #1
802a276: 4682 mov sl, r0
802a278: 6123 str r3, [r4, #16]
802a27a: dc02 bgt.n 802a282 <_printf_float+0x12a>
802a27c: 6822 ldr r2, [r4, #0]
802a27e: 07d2 lsls r2, r2, #31
802a280: d501 bpl.n 802a286 <_printf_float+0x12e>
802a282: 3301 adds r3, #1
802a284: 6123 str r3, [r4, #16]
802a286: f89d 3023 ldrb.w r3, [sp, #35] @ 0x23
802a28a: 2b00 cmp r3, #0
802a28c: d0a6 beq.n 802a1dc <_printf_float+0x84>
802a28e: 232d movs r3, #45 @ 0x2d
802a290: f884 3043 strb.w r3, [r4, #67] @ 0x43
802a294: e7a2 b.n 802a1dc <_printf_float+0x84>
802a296: f1ba 0f47 cmp.w sl, #71 @ 0x47
802a29a: d1c4 bne.n 802a226 <_printf_float+0xce>
802a29c: 2b00 cmp r3, #0
802a29e: d1c2 bne.n 802a226 <_printf_float+0xce>
802a2a0: 2301 movs r3, #1
802a2a2: e7bf b.n 802a224 <_printf_float+0xcc>
802a2a4: f1b9 0f65 cmp.w r9, #101 @ 0x65
802a2a8: d9db bls.n 802a262 <_printf_float+0x10a>
802a2aa: f1b9 0f66 cmp.w r9, #102 @ 0x66
802a2ae: d118 bne.n 802a2e2 <_printf_float+0x18a>
802a2b0: 2900 cmp r1, #0
802a2b2: 6863 ldr r3, [r4, #4]
802a2b4: dd0b ble.n 802a2ce <_printf_float+0x176>
802a2b6: 6121 str r1, [r4, #16]
802a2b8: b913 cbnz r3, 802a2c0 <_printf_float+0x168>
802a2ba: 6822 ldr r2, [r4, #0]
802a2bc: 07d0 lsls r0, r2, #31
802a2be: d502 bpl.n 802a2c6 <_printf_float+0x16e>
802a2c0: 3301 adds r3, #1
802a2c2: 440b add r3, r1
802a2c4: 6123 str r3, [r4, #16]
802a2c6: 65a1 str r1, [r4, #88] @ 0x58
802a2c8: f04f 0a00 mov.w sl, #0
802a2cc: e7db b.n 802a286 <_printf_float+0x12e>
802a2ce: b913 cbnz r3, 802a2d6 <_printf_float+0x17e>
802a2d0: 6822 ldr r2, [r4, #0]
802a2d2: 07d2 lsls r2, r2, #31
802a2d4: d501 bpl.n 802a2da <_printf_float+0x182>
802a2d6: 3302 adds r3, #2
802a2d8: e7f4 b.n 802a2c4 <_printf_float+0x16c>
802a2da: 2301 movs r3, #1
802a2dc: e7f2 b.n 802a2c4 <_printf_float+0x16c>
802a2de: f04f 0967 mov.w r9, #103 @ 0x67
802a2e2: 9b0a ldr r3, [sp, #40] @ 0x28
802a2e4: 4299 cmp r1, r3
802a2e6: db05 blt.n 802a2f4 <_printf_float+0x19c>
802a2e8: 6823 ldr r3, [r4, #0]
802a2ea: 6121 str r1, [r4, #16]
802a2ec: 07d8 lsls r0, r3, #31
802a2ee: d5ea bpl.n 802a2c6 <_printf_float+0x16e>
802a2f0: 1c4b adds r3, r1, #1
802a2f2: e7e7 b.n 802a2c4 <_printf_float+0x16c>
802a2f4: 2900 cmp r1, #0
802a2f6: bfd4 ite le
802a2f8: f1c1 0202 rsble r2, r1, #2
802a2fc: 2201 movgt r2, #1
802a2fe: 4413 add r3, r2
802a300: e7e0 b.n 802a2c4 <_printf_float+0x16c>
802a302: 6823 ldr r3, [r4, #0]
802a304: 055a lsls r2, r3, #21
802a306: d407 bmi.n 802a318 <_printf_float+0x1c0>
802a308: 6923 ldr r3, [r4, #16]
802a30a: 4642 mov r2, r8
802a30c: 4631 mov r1, r6
802a30e: 4628 mov r0, r5
802a310: 47b8 blx r7
802a312: 3001 adds r0, #1
802a314: d12a bne.n 802a36c <_printf_float+0x214>
802a316: e76b b.n 802a1f0 <_printf_float+0x98>
802a318: f1b9 0f65 cmp.w r9, #101 @ 0x65
802a31c: f240 80e0 bls.w 802a4e0 <_printf_float+0x388>
802a320: ed94 7b12 vldr d7, [r4, #72] @ 0x48
802a324: eeb5 7b40 vcmp.f64 d7, #0.0
802a328: eef1 fa10 vmrs APSR_nzcv, fpscr
802a32c: d133 bne.n 802a396 <_printf_float+0x23e>
802a32e: 4a38 ldr r2, [pc, #224] @ (802a410 <_printf_float+0x2b8>)
802a330: 2301 movs r3, #1
802a332: 4631 mov r1, r6
802a334: 4628 mov r0, r5
802a336: 47b8 blx r7
802a338: 3001 adds r0, #1
802a33a: f43f af59 beq.w 802a1f0 <_printf_float+0x98>
802a33e: e9dd 3809 ldrd r3, r8, [sp, #36] @ 0x24
802a342: 4543 cmp r3, r8
802a344: db02 blt.n 802a34c <_printf_float+0x1f4>
802a346: 6823 ldr r3, [r4, #0]
802a348: 07d8 lsls r0, r3, #31
802a34a: d50f bpl.n 802a36c <_printf_float+0x214>
802a34c: 9b05 ldr r3, [sp, #20]
802a34e: 465a mov r2, fp
802a350: 4631 mov r1, r6
802a352: 4628 mov r0, r5
802a354: 47b8 blx r7
802a356: 3001 adds r0, #1
802a358: f43f af4a beq.w 802a1f0 <_printf_float+0x98>
802a35c: f04f 0900 mov.w r9, #0
802a360: f108 38ff add.w r8, r8, #4294967295 @ 0xffffffff
802a364: f104 0a1a add.w sl, r4, #26
802a368: 45c8 cmp r8, r9
802a36a: dc09 bgt.n 802a380 <_printf_float+0x228>
802a36c: 6823 ldr r3, [r4, #0]
802a36e: 079b lsls r3, r3, #30
802a370: f100 8107 bmi.w 802a582 <_printf_float+0x42a>
802a374: 68e0 ldr r0, [r4, #12]
802a376: 9b0b ldr r3, [sp, #44] @ 0x2c
802a378: 4298 cmp r0, r3
802a37a: bfb8 it lt
802a37c: 4618 movlt r0, r3
802a37e: e739 b.n 802a1f4 <_printf_float+0x9c>
802a380: 2301 movs r3, #1
802a382: 4652 mov r2, sl
802a384: 4631 mov r1, r6
802a386: 4628 mov r0, r5
802a388: 47b8 blx r7
802a38a: 3001 adds r0, #1
802a38c: f43f af30 beq.w 802a1f0 <_printf_float+0x98>
802a390: f109 0901 add.w r9, r9, #1
802a394: e7e8 b.n 802a368 <_printf_float+0x210>
802a396: 9b09 ldr r3, [sp, #36] @ 0x24
802a398: 2b00 cmp r3, #0
802a39a: dc3b bgt.n 802a414 <_printf_float+0x2bc>
802a39c: 4a1c ldr r2, [pc, #112] @ (802a410 <_printf_float+0x2b8>)
802a39e: 2301 movs r3, #1
802a3a0: 4631 mov r1, r6
802a3a2: 4628 mov r0, r5
802a3a4: 47b8 blx r7
802a3a6: 3001 adds r0, #1
802a3a8: f43f af22 beq.w 802a1f0 <_printf_float+0x98>
802a3ac: e9dd 3909 ldrd r3, r9, [sp, #36] @ 0x24
802a3b0: ea59 0303 orrs.w r3, r9, r3
802a3b4: d102 bne.n 802a3bc <_printf_float+0x264>
802a3b6: 6823 ldr r3, [r4, #0]
802a3b8: 07d9 lsls r1, r3, #31
802a3ba: d5d7 bpl.n 802a36c <_printf_float+0x214>
802a3bc: 9b05 ldr r3, [sp, #20]
802a3be: 465a mov r2, fp
802a3c0: 4631 mov r1, r6
802a3c2: 4628 mov r0, r5
802a3c4: 47b8 blx r7
802a3c6: 3001 adds r0, #1
802a3c8: f43f af12 beq.w 802a1f0 <_printf_float+0x98>
802a3cc: f04f 0a00 mov.w sl, #0
802a3d0: f104 0b1a add.w fp, r4, #26
802a3d4: 9b09 ldr r3, [sp, #36] @ 0x24
802a3d6: 425b negs r3, r3
802a3d8: 4553 cmp r3, sl
802a3da: dc01 bgt.n 802a3e0 <_printf_float+0x288>
802a3dc: 464b mov r3, r9
802a3de: e794 b.n 802a30a <_printf_float+0x1b2>
802a3e0: 2301 movs r3, #1
802a3e2: 465a mov r2, fp
802a3e4: 4631 mov r1, r6
802a3e6: 4628 mov r0, r5
802a3e8: 47b8 blx r7
802a3ea: 3001 adds r0, #1
802a3ec: f43f af00 beq.w 802a1f0 <_printf_float+0x98>
802a3f0: f10a 0a01 add.w sl, sl, #1
802a3f4: e7ee b.n 802a3d4 <_printf_float+0x27c>
802a3f6: bf00 nop
802a3f8: ffffffff .word 0xffffffff
802a3fc: 7fefffff .word 0x7fefffff
802a400: 080320a1 .word 0x080320a1
802a404: 080320a5 .word 0x080320a5
802a408: 080320a9 .word 0x080320a9
802a40c: 080320ad .word 0x080320ad
802a410: 080320b1 .word 0x080320b1
802a414: 6da3 ldr r3, [r4, #88] @ 0x58
802a416: f8dd a028 ldr.w sl, [sp, #40] @ 0x28
802a41a: 4553 cmp r3, sl
802a41c: bfa8 it ge
802a41e: 4653 movge r3, sl
802a420: 2b00 cmp r3, #0
802a422: 4699 mov r9, r3
802a424: dc37 bgt.n 802a496 <_printf_float+0x33e>
802a426: 2300 movs r3, #0
802a428: 9307 str r3, [sp, #28]
802a42a: ea29 79e9 bic.w r9, r9, r9, asr #31
802a42e: f104 021a add.w r2, r4, #26
802a432: 6da3 ldr r3, [r4, #88] @ 0x58
802a434: 9907 ldr r1, [sp, #28]
802a436: 9306 str r3, [sp, #24]
802a438: eba3 0309 sub.w r3, r3, r9
802a43c: 428b cmp r3, r1
802a43e: dc31 bgt.n 802a4a4 <_printf_float+0x34c>
802a440: 9b09 ldr r3, [sp, #36] @ 0x24
802a442: 459a cmp sl, r3
802a444: dc3b bgt.n 802a4be <_printf_float+0x366>
802a446: 6823 ldr r3, [r4, #0]
802a448: 07da lsls r2, r3, #31
802a44a: d438 bmi.n 802a4be <_printf_float+0x366>
802a44c: 9b09 ldr r3, [sp, #36] @ 0x24
802a44e: ebaa 0903 sub.w r9, sl, r3
802a452: 9b06 ldr r3, [sp, #24]
802a454: ebaa 0303 sub.w r3, sl, r3
802a458: 4599 cmp r9, r3
802a45a: bfa8 it ge
802a45c: 4699 movge r9, r3
802a45e: f1b9 0f00 cmp.w r9, #0
802a462: dc34 bgt.n 802a4ce <_printf_float+0x376>
802a464: f04f 0800 mov.w r8, #0
802a468: ea29 79e9 bic.w r9, r9, r9, asr #31
802a46c: f104 0b1a add.w fp, r4, #26
802a470: 9b09 ldr r3, [sp, #36] @ 0x24
802a472: ebaa 0303 sub.w r3, sl, r3
802a476: eba3 0309 sub.w r3, r3, r9
802a47a: 4543 cmp r3, r8
802a47c: f77f af76 ble.w 802a36c <_printf_float+0x214>
802a480: 2301 movs r3, #1
802a482: 465a mov r2, fp
802a484: 4631 mov r1, r6
802a486: 4628 mov r0, r5
802a488: 47b8 blx r7
802a48a: 3001 adds r0, #1
802a48c: f43f aeb0 beq.w 802a1f0 <_printf_float+0x98>
802a490: f108 0801 add.w r8, r8, #1
802a494: e7ec b.n 802a470 <_printf_float+0x318>
802a496: 4642 mov r2, r8
802a498: 4631 mov r1, r6
802a49a: 4628 mov r0, r5
802a49c: 47b8 blx r7
802a49e: 3001 adds r0, #1
802a4a0: d1c1 bne.n 802a426 <_printf_float+0x2ce>
802a4a2: e6a5 b.n 802a1f0 <_printf_float+0x98>
802a4a4: 2301 movs r3, #1
802a4a6: 4631 mov r1, r6
802a4a8: 4628 mov r0, r5
802a4aa: 9206 str r2, [sp, #24]
802a4ac: 47b8 blx r7
802a4ae: 3001 adds r0, #1
802a4b0: f43f ae9e beq.w 802a1f0 <_printf_float+0x98>
802a4b4: 9b07 ldr r3, [sp, #28]
802a4b6: 9a06 ldr r2, [sp, #24]
802a4b8: 3301 adds r3, #1
802a4ba: 9307 str r3, [sp, #28]
802a4bc: e7b9 b.n 802a432 <_printf_float+0x2da>
802a4be: 9b05 ldr r3, [sp, #20]
802a4c0: 465a mov r2, fp
802a4c2: 4631 mov r1, r6
802a4c4: 4628 mov r0, r5
802a4c6: 47b8 blx r7
802a4c8: 3001 adds r0, #1
802a4ca: d1bf bne.n 802a44c <_printf_float+0x2f4>
802a4cc: e690 b.n 802a1f0 <_printf_float+0x98>
802a4ce: 9a06 ldr r2, [sp, #24]
802a4d0: 464b mov r3, r9
802a4d2: 4442 add r2, r8
802a4d4: 4631 mov r1, r6
802a4d6: 4628 mov r0, r5
802a4d8: 47b8 blx r7
802a4da: 3001 adds r0, #1
802a4dc: d1c2 bne.n 802a464 <_printf_float+0x30c>
802a4de: e687 b.n 802a1f0 <_printf_float+0x98>
802a4e0: f8dd 9028 ldr.w r9, [sp, #40] @ 0x28
802a4e4: f1b9 0f01 cmp.w r9, #1
802a4e8: dc01 bgt.n 802a4ee <_printf_float+0x396>
802a4ea: 07db lsls r3, r3, #31
802a4ec: d536 bpl.n 802a55c <_printf_float+0x404>
802a4ee: 2301 movs r3, #1
802a4f0: 4642 mov r2, r8
802a4f2: 4631 mov r1, r6
802a4f4: 4628 mov r0, r5
802a4f6: 47b8 blx r7
802a4f8: 3001 adds r0, #1
802a4fa: f43f ae79 beq.w 802a1f0 <_printf_float+0x98>
802a4fe: 9b05 ldr r3, [sp, #20]
802a500: 465a mov r2, fp
802a502: 4631 mov r1, r6
802a504: 4628 mov r0, r5
802a506: 47b8 blx r7
802a508: 3001 adds r0, #1
802a50a: f43f ae71 beq.w 802a1f0 <_printf_float+0x98>
802a50e: ed94 7b12 vldr d7, [r4, #72] @ 0x48
802a512: eeb5 7b40 vcmp.f64 d7, #0.0
802a516: eef1 fa10 vmrs APSR_nzcv, fpscr
802a51a: f109 39ff add.w r9, r9, #4294967295 @ 0xffffffff
802a51e: d018 beq.n 802a552 <_printf_float+0x3fa>
802a520: 464b mov r3, r9
802a522: f108 0201 add.w r2, r8, #1
802a526: 4631 mov r1, r6
802a528: 4628 mov r0, r5
802a52a: 47b8 blx r7
802a52c: 3001 adds r0, #1
802a52e: d10c bne.n 802a54a <_printf_float+0x3f2>
802a530: e65e b.n 802a1f0 <_printf_float+0x98>
802a532: 2301 movs r3, #1
802a534: 465a mov r2, fp
802a536: 4631 mov r1, r6
802a538: 4628 mov r0, r5
802a53a: 47b8 blx r7
802a53c: 3001 adds r0, #1
802a53e: f43f ae57 beq.w 802a1f0 <_printf_float+0x98>
802a542: f108 0801 add.w r8, r8, #1
802a546: 45c8 cmp r8, r9
802a548: dbf3 blt.n 802a532 <_printf_float+0x3da>
802a54a: 4653 mov r3, sl
802a54c: f104 0250 add.w r2, r4, #80 @ 0x50
802a550: e6dc b.n 802a30c <_printf_float+0x1b4>
802a552: f04f 0800 mov.w r8, #0
802a556: f104 0b1a add.w fp, r4, #26
802a55a: e7f4 b.n 802a546 <_printf_float+0x3ee>
802a55c: 2301 movs r3, #1
802a55e: 4642 mov r2, r8
802a560: e7e1 b.n 802a526 <_printf_float+0x3ce>
802a562: 2301 movs r3, #1
802a564: 464a mov r2, r9
802a566: 4631 mov r1, r6
802a568: 4628 mov r0, r5
802a56a: 47b8 blx r7
802a56c: 3001 adds r0, #1
802a56e: f43f ae3f beq.w 802a1f0 <_printf_float+0x98>
802a572: f108 0801 add.w r8, r8, #1
802a576: 68e3 ldr r3, [r4, #12]
802a578: 990b ldr r1, [sp, #44] @ 0x2c
802a57a: 1a5b subs r3, r3, r1
802a57c: 4543 cmp r3, r8
802a57e: dcf0 bgt.n 802a562 <_printf_float+0x40a>
802a580: e6f8 b.n 802a374 <_printf_float+0x21c>
802a582: f04f 0800 mov.w r8, #0
802a586: f104 0919 add.w r9, r4, #25
802a58a: e7f4 b.n 802a576 <_printf_float+0x41e>
0802a58c <_printf_common>:
802a58c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
802a590: 4616 mov r6, r2
802a592: 4698 mov r8, r3
802a594: 688a ldr r2, [r1, #8]
802a596: 690b ldr r3, [r1, #16]
802a598: f8dd 9020 ldr.w r9, [sp, #32]
802a59c: 4293 cmp r3, r2
802a59e: bfb8 it lt
802a5a0: 4613 movlt r3, r2
802a5a2: 6033 str r3, [r6, #0]
802a5a4: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
802a5a8: 4607 mov r7, r0
802a5aa: 460c mov r4, r1
802a5ac: b10a cbz r2, 802a5b2 <_printf_common+0x26>
802a5ae: 3301 adds r3, #1
802a5b0: 6033 str r3, [r6, #0]
802a5b2: 6823 ldr r3, [r4, #0]
802a5b4: 0699 lsls r1, r3, #26
802a5b6: bf42 ittt mi
802a5b8: 6833 ldrmi r3, [r6, #0]
802a5ba: 3302 addmi r3, #2
802a5bc: 6033 strmi r3, [r6, #0]
802a5be: 6825 ldr r5, [r4, #0]
802a5c0: f015 0506 ands.w r5, r5, #6
802a5c4: d106 bne.n 802a5d4 <_printf_common+0x48>
802a5c6: f104 0a19 add.w sl, r4, #25
802a5ca: 68e3 ldr r3, [r4, #12]
802a5cc: 6832 ldr r2, [r6, #0]
802a5ce: 1a9b subs r3, r3, r2
802a5d0: 42ab cmp r3, r5
802a5d2: dc26 bgt.n 802a622 <_printf_common+0x96>
802a5d4: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
802a5d8: 6822 ldr r2, [r4, #0]
802a5da: 3b00 subs r3, #0
802a5dc: bf18 it ne
802a5de: 2301 movne r3, #1
802a5e0: 0692 lsls r2, r2, #26
802a5e2: d42b bmi.n 802a63c <_printf_common+0xb0>
802a5e4: f104 0243 add.w r2, r4, #67 @ 0x43
802a5e8: 4641 mov r1, r8
802a5ea: 4638 mov r0, r7
802a5ec: 47c8 blx r9
802a5ee: 3001 adds r0, #1
802a5f0: d01e beq.n 802a630 <_printf_common+0xa4>
802a5f2: 6823 ldr r3, [r4, #0]
802a5f4: 6922 ldr r2, [r4, #16]
802a5f6: f003 0306 and.w r3, r3, #6
802a5fa: 2b04 cmp r3, #4
802a5fc: bf02 ittt eq
802a5fe: 68e5 ldreq r5, [r4, #12]
802a600: 6833 ldreq r3, [r6, #0]
802a602: 1aed subeq r5, r5, r3
802a604: 68a3 ldr r3, [r4, #8]
802a606: bf0c ite eq
802a608: ea25 75e5 biceq.w r5, r5, r5, asr #31
802a60c: 2500 movne r5, #0
802a60e: 4293 cmp r3, r2
802a610: bfc4 itt gt
802a612: 1a9b subgt r3, r3, r2
802a614: 18ed addgt r5, r5, r3
802a616: 2600 movs r6, #0
802a618: 341a adds r4, #26
802a61a: 42b5 cmp r5, r6
802a61c: d11a bne.n 802a654 <_printf_common+0xc8>
802a61e: 2000 movs r0, #0
802a620: e008 b.n 802a634 <_printf_common+0xa8>
802a622: 2301 movs r3, #1
802a624: 4652 mov r2, sl
802a626: 4641 mov r1, r8
802a628: 4638 mov r0, r7
802a62a: 47c8 blx r9
802a62c: 3001 adds r0, #1
802a62e: d103 bne.n 802a638 <_printf_common+0xac>
802a630: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802a634: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
802a638: 3501 adds r5, #1
802a63a: e7c6 b.n 802a5ca <_printf_common+0x3e>
802a63c: 18e1 adds r1, r4, r3
802a63e: 1c5a adds r2, r3, #1
802a640: 2030 movs r0, #48 @ 0x30
802a642: f881 0043 strb.w r0, [r1, #67] @ 0x43
802a646: 4422 add r2, r4
802a648: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
802a64c: f882 1043 strb.w r1, [r2, #67] @ 0x43
802a650: 3302 adds r3, #2
802a652: e7c7 b.n 802a5e4 <_printf_common+0x58>
802a654: 2301 movs r3, #1
802a656: 4622 mov r2, r4
802a658: 4641 mov r1, r8
802a65a: 4638 mov r0, r7
802a65c: 47c8 blx r9
802a65e: 3001 adds r0, #1
802a660: d0e6 beq.n 802a630 <_printf_common+0xa4>
802a662: 3601 adds r6, #1
802a664: e7d9 b.n 802a61a <_printf_common+0x8e>
...
0802a668 <_printf_i>:
802a668: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
802a66c: 7e0f ldrb r7, [r1, #24]
802a66e: 9e0c ldr r6, [sp, #48] @ 0x30
802a670: 2f78 cmp r7, #120 @ 0x78
802a672: 4691 mov r9, r2
802a674: 4680 mov r8, r0
802a676: 460c mov r4, r1
802a678: 469a mov sl, r3
802a67a: f101 0243 add.w r2, r1, #67 @ 0x43
802a67e: d807 bhi.n 802a690 <_printf_i+0x28>
802a680: 2f62 cmp r7, #98 @ 0x62
802a682: d80a bhi.n 802a69a <_printf_i+0x32>
802a684: 2f00 cmp r7, #0
802a686: f000 80d2 beq.w 802a82e <_printf_i+0x1c6>
802a68a: 2f58 cmp r7, #88 @ 0x58
802a68c: f000 80b9 beq.w 802a802 <_printf_i+0x19a>
802a690: f104 0642 add.w r6, r4, #66 @ 0x42
802a694: f884 7042 strb.w r7, [r4, #66] @ 0x42
802a698: e03a b.n 802a710 <_printf_i+0xa8>
802a69a: f1a7 0363 sub.w r3, r7, #99 @ 0x63
802a69e: 2b15 cmp r3, #21
802a6a0: d8f6 bhi.n 802a690 <_printf_i+0x28>
802a6a2: a101 add r1, pc, #4 @ (adr r1, 802a6a8 <_printf_i+0x40>)
802a6a4: f851 f023 ldr.w pc, [r1, r3, lsl #2]
802a6a8: 0802a701 .word 0x0802a701
802a6ac: 0802a715 .word 0x0802a715
802a6b0: 0802a691 .word 0x0802a691
802a6b4: 0802a691 .word 0x0802a691
802a6b8: 0802a691 .word 0x0802a691
802a6bc: 0802a691 .word 0x0802a691
802a6c0: 0802a715 .word 0x0802a715
802a6c4: 0802a691 .word 0x0802a691
802a6c8: 0802a691 .word 0x0802a691
802a6cc: 0802a691 .word 0x0802a691
802a6d0: 0802a691 .word 0x0802a691
802a6d4: 0802a815 .word 0x0802a815
802a6d8: 0802a73f .word 0x0802a73f
802a6dc: 0802a7cf .word 0x0802a7cf
802a6e0: 0802a691 .word 0x0802a691
802a6e4: 0802a691 .word 0x0802a691
802a6e8: 0802a837 .word 0x0802a837
802a6ec: 0802a691 .word 0x0802a691
802a6f0: 0802a73f .word 0x0802a73f
802a6f4: 0802a691 .word 0x0802a691
802a6f8: 0802a691 .word 0x0802a691
802a6fc: 0802a7d7 .word 0x0802a7d7
802a700: 6833 ldr r3, [r6, #0]
802a702: 1d1a adds r2, r3, #4
802a704: 681b ldr r3, [r3, #0]
802a706: 6032 str r2, [r6, #0]
802a708: f104 0642 add.w r6, r4, #66 @ 0x42
802a70c: f884 3042 strb.w r3, [r4, #66] @ 0x42
802a710: 2301 movs r3, #1
802a712: e09d b.n 802a850 <_printf_i+0x1e8>
802a714: 6833 ldr r3, [r6, #0]
802a716: 6820 ldr r0, [r4, #0]
802a718: 1d19 adds r1, r3, #4
802a71a: 6031 str r1, [r6, #0]
802a71c: 0606 lsls r6, r0, #24
802a71e: d501 bpl.n 802a724 <_printf_i+0xbc>
802a720: 681d ldr r5, [r3, #0]
802a722: e003 b.n 802a72c <_printf_i+0xc4>
802a724: 0645 lsls r5, r0, #25
802a726: d5fb bpl.n 802a720 <_printf_i+0xb8>
802a728: f9b3 5000 ldrsh.w r5, [r3]
802a72c: 2d00 cmp r5, #0
802a72e: da03 bge.n 802a738 <_printf_i+0xd0>
802a730: 232d movs r3, #45 @ 0x2d
802a732: 426d negs r5, r5
802a734: f884 3043 strb.w r3, [r4, #67] @ 0x43
802a738: 4859 ldr r0, [pc, #356] @ (802a8a0 <_printf_i+0x238>)
802a73a: 230a movs r3, #10
802a73c: e011 b.n 802a762 <_printf_i+0xfa>
802a73e: 6821 ldr r1, [r4, #0]
802a740: 6833 ldr r3, [r6, #0]
802a742: 0608 lsls r0, r1, #24
802a744: f853 5b04 ldr.w r5, [r3], #4
802a748: d402 bmi.n 802a750 <_printf_i+0xe8>
802a74a: 0649 lsls r1, r1, #25
802a74c: bf48 it mi
802a74e: b2ad uxthmi r5, r5
802a750: 2f6f cmp r7, #111 @ 0x6f
802a752: 4853 ldr r0, [pc, #332] @ (802a8a0 <_printf_i+0x238>)
802a754: 6033 str r3, [r6, #0]
802a756: bf14 ite ne
802a758: 230a movne r3, #10
802a75a: 2308 moveq r3, #8
802a75c: 2100 movs r1, #0
802a75e: f884 1043 strb.w r1, [r4, #67] @ 0x43
802a762: 6866 ldr r6, [r4, #4]
802a764: 60a6 str r6, [r4, #8]
802a766: 2e00 cmp r6, #0
802a768: bfa2 ittt ge
802a76a: 6821 ldrge r1, [r4, #0]
802a76c: f021 0104 bicge.w r1, r1, #4
802a770: 6021 strge r1, [r4, #0]
802a772: b90d cbnz r5, 802a778 <_printf_i+0x110>
802a774: 2e00 cmp r6, #0
802a776: d04b beq.n 802a810 <_printf_i+0x1a8>
802a778: 4616 mov r6, r2
802a77a: fbb5 f1f3 udiv r1, r5, r3
802a77e: fb03 5711 mls r7, r3, r1, r5
802a782: 5dc7 ldrb r7, [r0, r7]
802a784: f806 7d01 strb.w r7, [r6, #-1]!
802a788: 462f mov r7, r5
802a78a: 42bb cmp r3, r7
802a78c: 460d mov r5, r1
802a78e: d9f4 bls.n 802a77a <_printf_i+0x112>
802a790: 2b08 cmp r3, #8
802a792: d10b bne.n 802a7ac <_printf_i+0x144>
802a794: 6823 ldr r3, [r4, #0]
802a796: 07df lsls r7, r3, #31
802a798: d508 bpl.n 802a7ac <_printf_i+0x144>
802a79a: 6923 ldr r3, [r4, #16]
802a79c: 6861 ldr r1, [r4, #4]
802a79e: 4299 cmp r1, r3
802a7a0: bfde ittt le
802a7a2: 2330 movle r3, #48 @ 0x30
802a7a4: f806 3c01 strble.w r3, [r6, #-1]
802a7a8: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff
802a7ac: 1b92 subs r2, r2, r6
802a7ae: 6122 str r2, [r4, #16]
802a7b0: f8cd a000 str.w sl, [sp]
802a7b4: 464b mov r3, r9
802a7b6: aa03 add r2, sp, #12
802a7b8: 4621 mov r1, r4
802a7ba: 4640 mov r0, r8
802a7bc: f7ff fee6 bl 802a58c <_printf_common>
802a7c0: 3001 adds r0, #1
802a7c2: d14a bne.n 802a85a <_printf_i+0x1f2>
802a7c4: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802a7c8: b004 add sp, #16
802a7ca: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
802a7ce: 6823 ldr r3, [r4, #0]
802a7d0: f043 0320 orr.w r3, r3, #32
802a7d4: 6023 str r3, [r4, #0]
802a7d6: 4833 ldr r0, [pc, #204] @ (802a8a4 <_printf_i+0x23c>)
802a7d8: 2778 movs r7, #120 @ 0x78
802a7da: f884 7045 strb.w r7, [r4, #69] @ 0x45
802a7de: 6823 ldr r3, [r4, #0]
802a7e0: 6831 ldr r1, [r6, #0]
802a7e2: 061f lsls r7, r3, #24
802a7e4: f851 5b04 ldr.w r5, [r1], #4
802a7e8: d402 bmi.n 802a7f0 <_printf_i+0x188>
802a7ea: 065f lsls r7, r3, #25
802a7ec: bf48 it mi
802a7ee: b2ad uxthmi r5, r5
802a7f0: 6031 str r1, [r6, #0]
802a7f2: 07d9 lsls r1, r3, #31
802a7f4: bf44 itt mi
802a7f6: f043 0320 orrmi.w r3, r3, #32
802a7fa: 6023 strmi r3, [r4, #0]
802a7fc: b11d cbz r5, 802a806 <_printf_i+0x19e>
802a7fe: 2310 movs r3, #16
802a800: e7ac b.n 802a75c <_printf_i+0xf4>
802a802: 4827 ldr r0, [pc, #156] @ (802a8a0 <_printf_i+0x238>)
802a804: e7e9 b.n 802a7da <_printf_i+0x172>
802a806: 6823 ldr r3, [r4, #0]
802a808: f023 0320 bic.w r3, r3, #32
802a80c: 6023 str r3, [r4, #0]
802a80e: e7f6 b.n 802a7fe <_printf_i+0x196>
802a810: 4616 mov r6, r2
802a812: e7bd b.n 802a790 <_printf_i+0x128>
802a814: 6833 ldr r3, [r6, #0]
802a816: 6825 ldr r5, [r4, #0]
802a818: 6961 ldr r1, [r4, #20]
802a81a: 1d18 adds r0, r3, #4
802a81c: 6030 str r0, [r6, #0]
802a81e: 062e lsls r6, r5, #24
802a820: 681b ldr r3, [r3, #0]
802a822: d501 bpl.n 802a828 <_printf_i+0x1c0>
802a824: 6019 str r1, [r3, #0]
802a826: e002 b.n 802a82e <_printf_i+0x1c6>
802a828: 0668 lsls r0, r5, #25
802a82a: d5fb bpl.n 802a824 <_printf_i+0x1bc>
802a82c: 8019 strh r1, [r3, #0]
802a82e: 2300 movs r3, #0
802a830: 6123 str r3, [r4, #16]
802a832: 4616 mov r6, r2
802a834: e7bc b.n 802a7b0 <_printf_i+0x148>
802a836: 6833 ldr r3, [r6, #0]
802a838: 1d1a adds r2, r3, #4
802a83a: 6032 str r2, [r6, #0]
802a83c: 681e ldr r6, [r3, #0]
802a83e: 6862 ldr r2, [r4, #4]
802a840: 2100 movs r1, #0
802a842: 4630 mov r0, r6
802a844: f7d5 fd5c bl 8000300 <memchr>
802a848: b108 cbz r0, 802a84e <_printf_i+0x1e6>
802a84a: 1b80 subs r0, r0, r6
802a84c: 6060 str r0, [r4, #4]
802a84e: 6863 ldr r3, [r4, #4]
802a850: 6123 str r3, [r4, #16]
802a852: 2300 movs r3, #0
802a854: f884 3043 strb.w r3, [r4, #67] @ 0x43
802a858: e7aa b.n 802a7b0 <_printf_i+0x148>
802a85a: 6923 ldr r3, [r4, #16]
802a85c: 4632 mov r2, r6
802a85e: 4649 mov r1, r9
802a860: 4640 mov r0, r8
802a862: 47d0 blx sl
802a864: 3001 adds r0, #1
802a866: d0ad beq.n 802a7c4 <_printf_i+0x15c>
802a868: 6823 ldr r3, [r4, #0]
802a86a: 079b lsls r3, r3, #30
802a86c: d413 bmi.n 802a896 <_printf_i+0x22e>
802a86e: 68e0 ldr r0, [r4, #12]
802a870: 9b03 ldr r3, [sp, #12]
802a872: 4298 cmp r0, r3
802a874: bfb8 it lt
802a876: 4618 movlt r0, r3
802a878: e7a6 b.n 802a7c8 <_printf_i+0x160>
802a87a: 2301 movs r3, #1
802a87c: 4632 mov r2, r6
802a87e: 4649 mov r1, r9
802a880: 4640 mov r0, r8
802a882: 47d0 blx sl
802a884: 3001 adds r0, #1
802a886: d09d beq.n 802a7c4 <_printf_i+0x15c>
802a888: 3501 adds r5, #1
802a88a: 68e3 ldr r3, [r4, #12]
802a88c: 9903 ldr r1, [sp, #12]
802a88e: 1a5b subs r3, r3, r1
802a890: 42ab cmp r3, r5
802a892: dcf2 bgt.n 802a87a <_printf_i+0x212>
802a894: e7eb b.n 802a86e <_printf_i+0x206>
802a896: 2500 movs r5, #0
802a898: f104 0619 add.w r6, r4, #25
802a89c: e7f5 b.n 802a88a <_printf_i+0x222>
802a89e: bf00 nop
802a8a0: 080320b3 .word 0x080320b3
802a8a4: 080320c4 .word 0x080320c4
0802a8a8 <std>:
802a8a8: 2300 movs r3, #0
802a8aa: b510 push {r4, lr}
802a8ac: 4604 mov r4, r0
802a8ae: e9c0 3300 strd r3, r3, [r0]
802a8b2: e9c0 3304 strd r3, r3, [r0, #16]
802a8b6: 6083 str r3, [r0, #8]
802a8b8: 8181 strh r1, [r0, #12]
802a8ba: 6643 str r3, [r0, #100] @ 0x64
802a8bc: 81c2 strh r2, [r0, #14]
802a8be: 6183 str r3, [r0, #24]
802a8c0: 4619 mov r1, r3
802a8c2: 2208 movs r2, #8
802a8c4: 305c adds r0, #92 @ 0x5c
802a8c6: f000 fa43 bl 802ad50 <memset>
802a8ca: 4b0d ldr r3, [pc, #52] @ (802a900 <std+0x58>)
802a8cc: 6263 str r3, [r4, #36] @ 0x24
802a8ce: 4b0d ldr r3, [pc, #52] @ (802a904 <std+0x5c>)
802a8d0: 62a3 str r3, [r4, #40] @ 0x28
802a8d2: 4b0d ldr r3, [pc, #52] @ (802a908 <std+0x60>)
802a8d4: 62e3 str r3, [r4, #44] @ 0x2c
802a8d6: 4b0d ldr r3, [pc, #52] @ (802a90c <std+0x64>)
802a8d8: 6323 str r3, [r4, #48] @ 0x30
802a8da: 4b0d ldr r3, [pc, #52] @ (802a910 <std+0x68>)
802a8dc: 6224 str r4, [r4, #32]
802a8de: 429c cmp r4, r3
802a8e0: d006 beq.n 802a8f0 <std+0x48>
802a8e2: f103 0268 add.w r2, r3, #104 @ 0x68
802a8e6: 4294 cmp r4, r2
802a8e8: d002 beq.n 802a8f0 <std+0x48>
802a8ea: 33d0 adds r3, #208 @ 0xd0
802a8ec: 429c cmp r4, r3
802a8ee: d105 bne.n 802a8fc <std+0x54>
802a8f0: f104 0058 add.w r0, r4, #88 @ 0x58
802a8f4: e8bd 4010 ldmia.w sp!, {r4, lr}
802a8f8: f000 bb1e b.w 802af38 <__retarget_lock_init_recursive>
802a8fc: bd10 pop {r4, pc}
802a8fe: bf00 nop
802a900: 0802ab4d .word 0x0802ab4d
802a904: 0802ab6f .word 0x0802ab6f
802a908: 0802aba7 .word 0x0802aba7
802a90c: 0802abcb .word 0x0802abcb
802a910: 2402b164 .word 0x2402b164
0802a914 <stdio_exit_handler>:
802a914: 4a02 ldr r2, [pc, #8] @ (802a920 <stdio_exit_handler+0xc>)
802a916: 4903 ldr r1, [pc, #12] @ (802a924 <stdio_exit_handler+0x10>)
802a918: 4803 ldr r0, [pc, #12] @ (802a928 <stdio_exit_handler+0x14>)
802a91a: f000 b869 b.w 802a9f0 <_fwalk_sglue>
802a91e: bf00 nop
802a920: 2400005c .word 0x2400005c
802a924: 0802d25d .word 0x0802d25d
802a928: 240001d8 .word 0x240001d8
0802a92c <cleanup_stdio>:
802a92c: 6841 ldr r1, [r0, #4]
802a92e: 4b0c ldr r3, [pc, #48] @ (802a960 <cleanup_stdio+0x34>)
802a930: 4299 cmp r1, r3
802a932: b510 push {r4, lr}
802a934: 4604 mov r4, r0
802a936: d001 beq.n 802a93c <cleanup_stdio+0x10>
802a938: f002 fc90 bl 802d25c <_fflush_r>
802a93c: 68a1 ldr r1, [r4, #8]
802a93e: 4b09 ldr r3, [pc, #36] @ (802a964 <cleanup_stdio+0x38>)
802a940: 4299 cmp r1, r3
802a942: d002 beq.n 802a94a <cleanup_stdio+0x1e>
802a944: 4620 mov r0, r4
802a946: f002 fc89 bl 802d25c <_fflush_r>
802a94a: 68e1 ldr r1, [r4, #12]
802a94c: 4b06 ldr r3, [pc, #24] @ (802a968 <cleanup_stdio+0x3c>)
802a94e: 4299 cmp r1, r3
802a950: d004 beq.n 802a95c <cleanup_stdio+0x30>
802a952: 4620 mov r0, r4
802a954: e8bd 4010 ldmia.w sp!, {r4, lr}
802a958: f002 bc80 b.w 802d25c <_fflush_r>
802a95c: bd10 pop {r4, pc}
802a95e: bf00 nop
802a960: 2402b164 .word 0x2402b164
802a964: 2402b1cc .word 0x2402b1cc
802a968: 2402b234 .word 0x2402b234
0802a96c <global_stdio_init.part.0>:
802a96c: b510 push {r4, lr}
802a96e: 4b0b ldr r3, [pc, #44] @ (802a99c <global_stdio_init.part.0+0x30>)
802a970: 4c0b ldr r4, [pc, #44] @ (802a9a0 <global_stdio_init.part.0+0x34>)
802a972: 4a0c ldr r2, [pc, #48] @ (802a9a4 <global_stdio_init.part.0+0x38>)
802a974: 601a str r2, [r3, #0]
802a976: 4620 mov r0, r4
802a978: 2200 movs r2, #0
802a97a: 2104 movs r1, #4
802a97c: f7ff ff94 bl 802a8a8 <std>
802a980: f104 0068 add.w r0, r4, #104 @ 0x68
802a984: 2201 movs r2, #1
802a986: 2109 movs r1, #9
802a988: f7ff ff8e bl 802a8a8 <std>
802a98c: f104 00d0 add.w r0, r4, #208 @ 0xd0
802a990: 2202 movs r2, #2
802a992: e8bd 4010 ldmia.w sp!, {r4, lr}
802a996: 2112 movs r1, #18
802a998: f7ff bf86 b.w 802a8a8 <std>
802a99c: 2402b29c .word 0x2402b29c
802a9a0: 2402b164 .word 0x2402b164
802a9a4: 0802a915 .word 0x0802a915
0802a9a8 <__sfp_lock_acquire>:
802a9a8: 4801 ldr r0, [pc, #4] @ (802a9b0 <__sfp_lock_acquire+0x8>)
802a9aa: f000 bac6 b.w 802af3a <__retarget_lock_acquire_recursive>
802a9ae: bf00 nop
802a9b0: 2402b2a5 .word 0x2402b2a5
0802a9b4 <__sfp_lock_release>:
802a9b4: 4801 ldr r0, [pc, #4] @ (802a9bc <__sfp_lock_release+0x8>)
802a9b6: f000 bac1 b.w 802af3c <__retarget_lock_release_recursive>
802a9ba: bf00 nop
802a9bc: 2402b2a5 .word 0x2402b2a5
0802a9c0 <__sinit>:
802a9c0: b510 push {r4, lr}
802a9c2: 4604 mov r4, r0
802a9c4: f7ff fff0 bl 802a9a8 <__sfp_lock_acquire>
802a9c8: 6a23 ldr r3, [r4, #32]
802a9ca: b11b cbz r3, 802a9d4 <__sinit+0x14>
802a9cc: e8bd 4010 ldmia.w sp!, {r4, lr}
802a9d0: f7ff bff0 b.w 802a9b4 <__sfp_lock_release>
802a9d4: 4b04 ldr r3, [pc, #16] @ (802a9e8 <__sinit+0x28>)
802a9d6: 6223 str r3, [r4, #32]
802a9d8: 4b04 ldr r3, [pc, #16] @ (802a9ec <__sinit+0x2c>)
802a9da: 681b ldr r3, [r3, #0]
802a9dc: 2b00 cmp r3, #0
802a9de: d1f5 bne.n 802a9cc <__sinit+0xc>
802a9e0: f7ff ffc4 bl 802a96c <global_stdio_init.part.0>
802a9e4: e7f2 b.n 802a9cc <__sinit+0xc>
802a9e6: bf00 nop
802a9e8: 0802a92d .word 0x0802a92d
802a9ec: 2402b29c .word 0x2402b29c
0802a9f0 <_fwalk_sglue>:
802a9f0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
802a9f4: 4607 mov r7, r0
802a9f6: 4688 mov r8, r1
802a9f8: 4614 mov r4, r2
802a9fa: 2600 movs r6, #0
802a9fc: e9d4 9501 ldrd r9, r5, [r4, #4]
802aa00: f1b9 0901 subs.w r9, r9, #1
802aa04: d505 bpl.n 802aa12 <_fwalk_sglue+0x22>
802aa06: 6824 ldr r4, [r4, #0]
802aa08: 2c00 cmp r4, #0
802aa0a: d1f7 bne.n 802a9fc <_fwalk_sglue+0xc>
802aa0c: 4630 mov r0, r6
802aa0e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
802aa12: 89ab ldrh r3, [r5, #12]
802aa14: 2b01 cmp r3, #1
802aa16: d907 bls.n 802aa28 <_fwalk_sglue+0x38>
802aa18: f9b5 300e ldrsh.w r3, [r5, #14]
802aa1c: 3301 adds r3, #1
802aa1e: d003 beq.n 802aa28 <_fwalk_sglue+0x38>
802aa20: 4629 mov r1, r5
802aa22: 4638 mov r0, r7
802aa24: 47c0 blx r8
802aa26: 4306 orrs r6, r0
802aa28: 3568 adds r5, #104 @ 0x68
802aa2a: e7e9 b.n 802aa00 <_fwalk_sglue+0x10>
0802aa2c <iprintf>:
802aa2c: b40f push {r0, r1, r2, r3}
802aa2e: b507 push {r0, r1, r2, lr}
802aa30: 4906 ldr r1, [pc, #24] @ (802aa4c <iprintf+0x20>)
802aa32: ab04 add r3, sp, #16
802aa34: 6808 ldr r0, [r1, #0]
802aa36: f853 2b04 ldr.w r2, [r3], #4
802aa3a: 6881 ldr r1, [r0, #8]
802aa3c: 9301 str r3, [sp, #4]
802aa3e: f002 fa71 bl 802cf24 <_vfiprintf_r>
802aa42: b003 add sp, #12
802aa44: f85d eb04 ldr.w lr, [sp], #4
802aa48: b004 add sp, #16
802aa4a: 4770 bx lr
802aa4c: 240001d4 .word 0x240001d4
0802aa50 <_puts_r>:
802aa50: 6a03 ldr r3, [r0, #32]
802aa52: b570 push {r4, r5, r6, lr}
802aa54: 6884 ldr r4, [r0, #8]
802aa56: 4605 mov r5, r0
802aa58: 460e mov r6, r1
802aa5a: b90b cbnz r3, 802aa60 <_puts_r+0x10>
802aa5c: f7ff ffb0 bl 802a9c0 <__sinit>
802aa60: 6e63 ldr r3, [r4, #100] @ 0x64
802aa62: 07db lsls r3, r3, #31
802aa64: d405 bmi.n 802aa72 <_puts_r+0x22>
802aa66: 89a3 ldrh r3, [r4, #12]
802aa68: 0598 lsls r0, r3, #22
802aa6a: d402 bmi.n 802aa72 <_puts_r+0x22>
802aa6c: 6da0 ldr r0, [r4, #88] @ 0x58
802aa6e: f000 fa64 bl 802af3a <__retarget_lock_acquire_recursive>
802aa72: 89a3 ldrh r3, [r4, #12]
802aa74: 0719 lsls r1, r3, #28
802aa76: d502 bpl.n 802aa7e <_puts_r+0x2e>
802aa78: 6923 ldr r3, [r4, #16]
802aa7a: 2b00 cmp r3, #0
802aa7c: d135 bne.n 802aaea <_puts_r+0x9a>
802aa7e: 4621 mov r1, r4
802aa80: 4628 mov r0, r5
802aa82: f000 f8e5 bl 802ac50 <__swsetup_r>
802aa86: b380 cbz r0, 802aaea <_puts_r+0x9a>
802aa88: f04f 35ff mov.w r5, #4294967295 @ 0xffffffff
802aa8c: 6e63 ldr r3, [r4, #100] @ 0x64
802aa8e: 07da lsls r2, r3, #31
802aa90: d405 bmi.n 802aa9e <_puts_r+0x4e>
802aa92: 89a3 ldrh r3, [r4, #12]
802aa94: 059b lsls r3, r3, #22
802aa96: d402 bmi.n 802aa9e <_puts_r+0x4e>
802aa98: 6da0 ldr r0, [r4, #88] @ 0x58
802aa9a: f000 fa4f bl 802af3c <__retarget_lock_release_recursive>
802aa9e: 4628 mov r0, r5
802aaa0: bd70 pop {r4, r5, r6, pc}
802aaa2: 2b00 cmp r3, #0
802aaa4: da04 bge.n 802aab0 <_puts_r+0x60>
802aaa6: 69a2 ldr r2, [r4, #24]
802aaa8: 429a cmp r2, r3
802aaaa: dc17 bgt.n 802aadc <_puts_r+0x8c>
802aaac: 290a cmp r1, #10
802aaae: d015 beq.n 802aadc <_puts_r+0x8c>
802aab0: 6823 ldr r3, [r4, #0]
802aab2: 1c5a adds r2, r3, #1
802aab4: 6022 str r2, [r4, #0]
802aab6: 7019 strb r1, [r3, #0]
802aab8: 68a3 ldr r3, [r4, #8]
802aaba: f816 1f01 ldrb.w r1, [r6, #1]!
802aabe: 3b01 subs r3, #1
802aac0: 60a3 str r3, [r4, #8]
802aac2: 2900 cmp r1, #0
802aac4: d1ed bne.n 802aaa2 <_puts_r+0x52>
802aac6: 2b00 cmp r3, #0
802aac8: da11 bge.n 802aaee <_puts_r+0x9e>
802aaca: 4622 mov r2, r4
802aacc: 210a movs r1, #10
802aace: 4628 mov r0, r5
802aad0: f000 f87f bl 802abd2 <__swbuf_r>
802aad4: 3001 adds r0, #1
802aad6: d0d7 beq.n 802aa88 <_puts_r+0x38>
802aad8: 250a movs r5, #10
802aada: e7d7 b.n 802aa8c <_puts_r+0x3c>
802aadc: 4622 mov r2, r4
802aade: 4628 mov r0, r5
802aae0: f000 f877 bl 802abd2 <__swbuf_r>
802aae4: 3001 adds r0, #1
802aae6: d1e7 bne.n 802aab8 <_puts_r+0x68>
802aae8: e7ce b.n 802aa88 <_puts_r+0x38>
802aaea: 3e01 subs r6, #1
802aaec: e7e4 b.n 802aab8 <_puts_r+0x68>
802aaee: 6823 ldr r3, [r4, #0]
802aaf0: 1c5a adds r2, r3, #1
802aaf2: 6022 str r2, [r4, #0]
802aaf4: 220a movs r2, #10
802aaf6: 701a strb r2, [r3, #0]
802aaf8: e7ee b.n 802aad8 <_puts_r+0x88>
...
0802aafc <puts>:
802aafc: 4b02 ldr r3, [pc, #8] @ (802ab08 <puts+0xc>)
802aafe: 4601 mov r1, r0
802ab00: 6818 ldr r0, [r3, #0]
802ab02: f7ff bfa5 b.w 802aa50 <_puts_r>
802ab06: bf00 nop
802ab08: 240001d4 .word 0x240001d4
0802ab0c <siprintf>:
802ab0c: b40e push {r1, r2, r3}
802ab0e: b500 push {lr}
802ab10: b09c sub sp, #112 @ 0x70
802ab12: ab1d add r3, sp, #116 @ 0x74
802ab14: 9002 str r0, [sp, #8]
802ab16: 9006 str r0, [sp, #24]
802ab18: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
802ab1c: 4809 ldr r0, [pc, #36] @ (802ab44 <siprintf+0x38>)
802ab1e: 9107 str r1, [sp, #28]
802ab20: 9104 str r1, [sp, #16]
802ab22: 4909 ldr r1, [pc, #36] @ (802ab48 <siprintf+0x3c>)
802ab24: f853 2b04 ldr.w r2, [r3], #4
802ab28: 9105 str r1, [sp, #20]
802ab2a: 6800 ldr r0, [r0, #0]
802ab2c: 9301 str r3, [sp, #4]
802ab2e: a902 add r1, sp, #8
802ab30: f002 f8d2 bl 802ccd8 <_svfiprintf_r>
802ab34: 9b02 ldr r3, [sp, #8]
802ab36: 2200 movs r2, #0
802ab38: 701a strb r2, [r3, #0]
802ab3a: b01c add sp, #112 @ 0x70
802ab3c: f85d eb04 ldr.w lr, [sp], #4
802ab40: b003 add sp, #12
802ab42: 4770 bx lr
802ab44: 240001d4 .word 0x240001d4
802ab48: ffff0208 .word 0xffff0208
0802ab4c <__sread>:
802ab4c: b510 push {r4, lr}
802ab4e: 460c mov r4, r1
802ab50: f9b1 100e ldrsh.w r1, [r1, #14]
802ab54: f000 f992 bl 802ae7c <_read_r>
802ab58: 2800 cmp r0, #0
802ab5a: bfab itete ge
802ab5c: 6d63 ldrge r3, [r4, #84] @ 0x54
802ab5e: 89a3 ldrhlt r3, [r4, #12]
802ab60: 181b addge r3, r3, r0
802ab62: f423 5380 biclt.w r3, r3, #4096 @ 0x1000
802ab66: bfac ite ge
802ab68: 6563 strge r3, [r4, #84] @ 0x54
802ab6a: 81a3 strhlt r3, [r4, #12]
802ab6c: bd10 pop {r4, pc}
0802ab6e <__swrite>:
802ab6e: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
802ab72: 461f mov r7, r3
802ab74: 898b ldrh r3, [r1, #12]
802ab76: 05db lsls r3, r3, #23
802ab78: 4605 mov r5, r0
802ab7a: 460c mov r4, r1
802ab7c: 4616 mov r6, r2
802ab7e: d505 bpl.n 802ab8c <__swrite+0x1e>
802ab80: f9b1 100e ldrsh.w r1, [r1, #14]
802ab84: 2302 movs r3, #2
802ab86: 2200 movs r2, #0
802ab88: f000 f966 bl 802ae58 <_lseek_r>
802ab8c: 89a3 ldrh r3, [r4, #12]
802ab8e: f9b4 100e ldrsh.w r1, [r4, #14]
802ab92: f423 5380 bic.w r3, r3, #4096 @ 0x1000
802ab96: 81a3 strh r3, [r4, #12]
802ab98: 4632 mov r2, r6
802ab9a: 463b mov r3, r7
802ab9c: 4628 mov r0, r5
802ab9e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
802aba2: f000 b98d b.w 802aec0 <_write_r>
0802aba6 <__sseek>:
802aba6: b510 push {r4, lr}
802aba8: 460c mov r4, r1
802abaa: f9b1 100e ldrsh.w r1, [r1, #14]
802abae: f000 f953 bl 802ae58 <_lseek_r>
802abb2: 1c43 adds r3, r0, #1
802abb4: 89a3 ldrh r3, [r4, #12]
802abb6: bf15 itete ne
802abb8: 6560 strne r0, [r4, #84] @ 0x54
802abba: f423 5380 biceq.w r3, r3, #4096 @ 0x1000
802abbe: f443 5380 orrne.w r3, r3, #4096 @ 0x1000
802abc2: 81a3 strheq r3, [r4, #12]
802abc4: bf18 it ne
802abc6: 81a3 strhne r3, [r4, #12]
802abc8: bd10 pop {r4, pc}
0802abca <__sclose>:
802abca: f9b1 100e ldrsh.w r1, [r1, #14]
802abce: f000 b8dd b.w 802ad8c <_close_r>
0802abd2 <__swbuf_r>:
802abd2: b5f8 push {r3, r4, r5, r6, r7, lr}
802abd4: 460e mov r6, r1
802abd6: 4614 mov r4, r2
802abd8: 4605 mov r5, r0
802abda: b118 cbz r0, 802abe4 <__swbuf_r+0x12>
802abdc: 6a03 ldr r3, [r0, #32]
802abde: b90b cbnz r3, 802abe4 <__swbuf_r+0x12>
802abe0: f7ff feee bl 802a9c0 <__sinit>
802abe4: 69a3 ldr r3, [r4, #24]
802abe6: 60a3 str r3, [r4, #8]
802abe8: 89a3 ldrh r3, [r4, #12]
802abea: 071a lsls r2, r3, #28
802abec: d501 bpl.n 802abf2 <__swbuf_r+0x20>
802abee: 6923 ldr r3, [r4, #16]
802abf0: b943 cbnz r3, 802ac04 <__swbuf_r+0x32>
802abf2: 4621 mov r1, r4
802abf4: 4628 mov r0, r5
802abf6: f000 f82b bl 802ac50 <__swsetup_r>
802abfa: b118 cbz r0, 802ac04 <__swbuf_r+0x32>
802abfc: f04f 37ff mov.w r7, #4294967295 @ 0xffffffff
802ac00: 4638 mov r0, r7
802ac02: bdf8 pop {r3, r4, r5, r6, r7, pc}
802ac04: 6823 ldr r3, [r4, #0]
802ac06: 6922 ldr r2, [r4, #16]
802ac08: 1a98 subs r0, r3, r2
802ac0a: 6963 ldr r3, [r4, #20]
802ac0c: b2f6 uxtb r6, r6
802ac0e: 4283 cmp r3, r0
802ac10: 4637 mov r7, r6
802ac12: dc05 bgt.n 802ac20 <__swbuf_r+0x4e>
802ac14: 4621 mov r1, r4
802ac16: 4628 mov r0, r5
802ac18: f002 fb20 bl 802d25c <_fflush_r>
802ac1c: 2800 cmp r0, #0
802ac1e: d1ed bne.n 802abfc <__swbuf_r+0x2a>
802ac20: 68a3 ldr r3, [r4, #8]
802ac22: 3b01 subs r3, #1
802ac24: 60a3 str r3, [r4, #8]
802ac26: 6823 ldr r3, [r4, #0]
802ac28: 1c5a adds r2, r3, #1
802ac2a: 6022 str r2, [r4, #0]
802ac2c: 701e strb r6, [r3, #0]
802ac2e: 6962 ldr r2, [r4, #20]
802ac30: 1c43 adds r3, r0, #1
802ac32: 429a cmp r2, r3
802ac34: d004 beq.n 802ac40 <__swbuf_r+0x6e>
802ac36: 89a3 ldrh r3, [r4, #12]
802ac38: 07db lsls r3, r3, #31
802ac3a: d5e1 bpl.n 802ac00 <__swbuf_r+0x2e>
802ac3c: 2e0a cmp r6, #10
802ac3e: d1df bne.n 802ac00 <__swbuf_r+0x2e>
802ac40: 4621 mov r1, r4
802ac42: 4628 mov r0, r5
802ac44: f002 fb0a bl 802d25c <_fflush_r>
802ac48: 2800 cmp r0, #0
802ac4a: d0d9 beq.n 802ac00 <__swbuf_r+0x2e>
802ac4c: e7d6 b.n 802abfc <__swbuf_r+0x2a>
...
0802ac50 <__swsetup_r>:
802ac50: b538 push {r3, r4, r5, lr}
802ac52: 4b29 ldr r3, [pc, #164] @ (802acf8 <__swsetup_r+0xa8>)
802ac54: 4605 mov r5, r0
802ac56: 6818 ldr r0, [r3, #0]
802ac58: 460c mov r4, r1
802ac5a: b118 cbz r0, 802ac64 <__swsetup_r+0x14>
802ac5c: 6a03 ldr r3, [r0, #32]
802ac5e: b90b cbnz r3, 802ac64 <__swsetup_r+0x14>
802ac60: f7ff feae bl 802a9c0 <__sinit>
802ac64: f9b4 300c ldrsh.w r3, [r4, #12]
802ac68: 0719 lsls r1, r3, #28
802ac6a: d422 bmi.n 802acb2 <__swsetup_r+0x62>
802ac6c: 06da lsls r2, r3, #27
802ac6e: d407 bmi.n 802ac80 <__swsetup_r+0x30>
802ac70: 2209 movs r2, #9
802ac72: 602a str r2, [r5, #0]
802ac74: f043 0340 orr.w r3, r3, #64 @ 0x40
802ac78: 81a3 strh r3, [r4, #12]
802ac7a: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802ac7e: e033 b.n 802ace8 <__swsetup_r+0x98>
802ac80: 0758 lsls r0, r3, #29
802ac82: d512 bpl.n 802acaa <__swsetup_r+0x5a>
802ac84: 6b61 ldr r1, [r4, #52] @ 0x34
802ac86: b141 cbz r1, 802ac9a <__swsetup_r+0x4a>
802ac88: f104 0344 add.w r3, r4, #68 @ 0x44
802ac8c: 4299 cmp r1, r3
802ac8e: d002 beq.n 802ac96 <__swsetup_r+0x46>
802ac90: 4628 mov r0, r5
802ac92: f000 ff6b bl 802bb6c <_free_r>
802ac96: 2300 movs r3, #0
802ac98: 6363 str r3, [r4, #52] @ 0x34
802ac9a: 89a3 ldrh r3, [r4, #12]
802ac9c: f023 0324 bic.w r3, r3, #36 @ 0x24
802aca0: 81a3 strh r3, [r4, #12]
802aca2: 2300 movs r3, #0
802aca4: 6063 str r3, [r4, #4]
802aca6: 6923 ldr r3, [r4, #16]
802aca8: 6023 str r3, [r4, #0]
802acaa: 89a3 ldrh r3, [r4, #12]
802acac: f043 0308 orr.w r3, r3, #8
802acb0: 81a3 strh r3, [r4, #12]
802acb2: 6923 ldr r3, [r4, #16]
802acb4: b94b cbnz r3, 802acca <__swsetup_r+0x7a>
802acb6: 89a3 ldrh r3, [r4, #12]
802acb8: f403 7320 and.w r3, r3, #640 @ 0x280
802acbc: f5b3 7f00 cmp.w r3, #512 @ 0x200
802acc0: d003 beq.n 802acca <__swsetup_r+0x7a>
802acc2: 4621 mov r1, r4
802acc4: 4628 mov r0, r5
802acc6: f002 fb29 bl 802d31c <__smakebuf_r>
802acca: f9b4 300c ldrsh.w r3, [r4, #12]
802acce: f013 0201 ands.w r2, r3, #1
802acd2: d00a beq.n 802acea <__swsetup_r+0x9a>
802acd4: 2200 movs r2, #0
802acd6: 60a2 str r2, [r4, #8]
802acd8: 6962 ldr r2, [r4, #20]
802acda: 4252 negs r2, r2
802acdc: 61a2 str r2, [r4, #24]
802acde: 6922 ldr r2, [r4, #16]
802ace0: b942 cbnz r2, 802acf4 <__swsetup_r+0xa4>
802ace2: f013 0080 ands.w r0, r3, #128 @ 0x80
802ace6: d1c5 bne.n 802ac74 <__swsetup_r+0x24>
802ace8: bd38 pop {r3, r4, r5, pc}
802acea: 0799 lsls r1, r3, #30
802acec: bf58 it pl
802acee: 6962 ldrpl r2, [r4, #20]
802acf0: 60a2 str r2, [r4, #8]
802acf2: e7f4 b.n 802acde <__swsetup_r+0x8e>
802acf4: 2000 movs r0, #0
802acf6: e7f7 b.n 802ace8 <__swsetup_r+0x98>
802acf8: 240001d4 .word 0x240001d4
0802acfc <memcmp>:
802acfc: b510 push {r4, lr}
802acfe: 3901 subs r1, #1
802ad00: 4402 add r2, r0
802ad02: 4290 cmp r0, r2
802ad04: d101 bne.n 802ad0a <memcmp+0xe>
802ad06: 2000 movs r0, #0
802ad08: e005 b.n 802ad16 <memcmp+0x1a>
802ad0a: 7803 ldrb r3, [r0, #0]
802ad0c: f811 4f01 ldrb.w r4, [r1, #1]!
802ad10: 42a3 cmp r3, r4
802ad12: d001 beq.n 802ad18 <memcmp+0x1c>
802ad14: 1b18 subs r0, r3, r4
802ad16: bd10 pop {r4, pc}
802ad18: 3001 adds r0, #1
802ad1a: e7f2 b.n 802ad02 <memcmp+0x6>
0802ad1c <memmove>:
802ad1c: 4288 cmp r0, r1
802ad1e: b510 push {r4, lr}
802ad20: eb01 0402 add.w r4, r1, r2
802ad24: d902 bls.n 802ad2c <memmove+0x10>
802ad26: 4284 cmp r4, r0
802ad28: 4623 mov r3, r4
802ad2a: d807 bhi.n 802ad3c <memmove+0x20>
802ad2c: 1e43 subs r3, r0, #1
802ad2e: 42a1 cmp r1, r4
802ad30: d008 beq.n 802ad44 <memmove+0x28>
802ad32: f811 2b01 ldrb.w r2, [r1], #1
802ad36: f803 2f01 strb.w r2, [r3, #1]!
802ad3a: e7f8 b.n 802ad2e <memmove+0x12>
802ad3c: 4402 add r2, r0
802ad3e: 4601 mov r1, r0
802ad40: 428a cmp r2, r1
802ad42: d100 bne.n 802ad46 <memmove+0x2a>
802ad44: bd10 pop {r4, pc}
802ad46: f813 4d01 ldrb.w r4, [r3, #-1]!
802ad4a: f802 4d01 strb.w r4, [r2, #-1]!
802ad4e: e7f7 b.n 802ad40 <memmove+0x24>
0802ad50 <memset>:
802ad50: 4402 add r2, r0
802ad52: 4603 mov r3, r0
802ad54: 4293 cmp r3, r2
802ad56: d100 bne.n 802ad5a <memset+0xa>
802ad58: 4770 bx lr
802ad5a: f803 1b01 strb.w r1, [r3], #1
802ad5e: e7f9 b.n 802ad54 <memset+0x4>
0802ad60 <strncmp>:
802ad60: b510 push {r4, lr}
802ad62: b16a cbz r2, 802ad80 <strncmp+0x20>
802ad64: 3901 subs r1, #1
802ad66: 1884 adds r4, r0, r2
802ad68: f810 2b01 ldrb.w r2, [r0], #1
802ad6c: f811 3f01 ldrb.w r3, [r1, #1]!
802ad70: 429a cmp r2, r3
802ad72: d103 bne.n 802ad7c <strncmp+0x1c>
802ad74: 42a0 cmp r0, r4
802ad76: d001 beq.n 802ad7c <strncmp+0x1c>
802ad78: 2a00 cmp r2, #0
802ad7a: d1f5 bne.n 802ad68 <strncmp+0x8>
802ad7c: 1ad0 subs r0, r2, r3
802ad7e: bd10 pop {r4, pc}
802ad80: 4610 mov r0, r2
802ad82: e7fc b.n 802ad7e <strncmp+0x1e>
0802ad84 <_localeconv_r>:
802ad84: 4800 ldr r0, [pc, #0] @ (802ad88 <_localeconv_r+0x4>)
802ad86: 4770 bx lr
802ad88: 24000158 .word 0x24000158
0802ad8c <_close_r>:
802ad8c: b538 push {r3, r4, r5, lr}
802ad8e: 4d06 ldr r5, [pc, #24] @ (802ada8 <_close_r+0x1c>)
802ad90: 2300 movs r3, #0
802ad92: 4604 mov r4, r0
802ad94: 4608 mov r0, r1
802ad96: 602b str r3, [r5, #0]
802ad98: f7d9 fb26 bl 80043e8 <_close>
802ad9c: 1c43 adds r3, r0, #1
802ad9e: d102 bne.n 802ada6 <_close_r+0x1a>
802ada0: 682b ldr r3, [r5, #0]
802ada2: b103 cbz r3, 802ada6 <_close_r+0x1a>
802ada4: 6023 str r3, [r4, #0]
802ada6: bd38 pop {r3, r4, r5, pc}
802ada8: 2402b2a0 .word 0x2402b2a0
0802adac <_reclaim_reent>:
802adac: 4b29 ldr r3, [pc, #164] @ (802ae54 <_reclaim_reent+0xa8>)
802adae: 681b ldr r3, [r3, #0]
802adb0: 4283 cmp r3, r0
802adb2: b570 push {r4, r5, r6, lr}
802adb4: 4604 mov r4, r0
802adb6: d04b beq.n 802ae50 <_reclaim_reent+0xa4>
802adb8: 69c3 ldr r3, [r0, #28]
802adba: b1ab cbz r3, 802ade8 <_reclaim_reent+0x3c>
802adbc: 68db ldr r3, [r3, #12]
802adbe: b16b cbz r3, 802addc <_reclaim_reent+0x30>
802adc0: 2500 movs r5, #0
802adc2: 69e3 ldr r3, [r4, #28]
802adc4: 68db ldr r3, [r3, #12]
802adc6: 5959 ldr r1, [r3, r5]
802adc8: 2900 cmp r1, #0
802adca: d13b bne.n 802ae44 <_reclaim_reent+0x98>
802adcc: 3504 adds r5, #4
802adce: 2d80 cmp r5, #128 @ 0x80
802add0: d1f7 bne.n 802adc2 <_reclaim_reent+0x16>
802add2: 69e3 ldr r3, [r4, #28]
802add4: 4620 mov r0, r4
802add6: 68d9 ldr r1, [r3, #12]
802add8: f000 fec8 bl 802bb6c <_free_r>
802addc: 69e3 ldr r3, [r4, #28]
802adde: 6819 ldr r1, [r3, #0]
802ade0: b111 cbz r1, 802ade8 <_reclaim_reent+0x3c>
802ade2: 4620 mov r0, r4
802ade4: f000 fec2 bl 802bb6c <_free_r>
802ade8: 6961 ldr r1, [r4, #20]
802adea: b111 cbz r1, 802adf2 <_reclaim_reent+0x46>
802adec: 4620 mov r0, r4
802adee: f000 febd bl 802bb6c <_free_r>
802adf2: 69e1 ldr r1, [r4, #28]
802adf4: b111 cbz r1, 802adfc <_reclaim_reent+0x50>
802adf6: 4620 mov r0, r4
802adf8: f000 feb8 bl 802bb6c <_free_r>
802adfc: 6b21 ldr r1, [r4, #48] @ 0x30
802adfe: b111 cbz r1, 802ae06 <_reclaim_reent+0x5a>
802ae00: 4620 mov r0, r4
802ae02: f000 feb3 bl 802bb6c <_free_r>
802ae06: 6b61 ldr r1, [r4, #52] @ 0x34
802ae08: b111 cbz r1, 802ae10 <_reclaim_reent+0x64>
802ae0a: 4620 mov r0, r4
802ae0c: f000 feae bl 802bb6c <_free_r>
802ae10: 6ba1 ldr r1, [r4, #56] @ 0x38
802ae12: b111 cbz r1, 802ae1a <_reclaim_reent+0x6e>
802ae14: 4620 mov r0, r4
802ae16: f000 fea9 bl 802bb6c <_free_r>
802ae1a: 6ca1 ldr r1, [r4, #72] @ 0x48
802ae1c: b111 cbz r1, 802ae24 <_reclaim_reent+0x78>
802ae1e: 4620 mov r0, r4
802ae20: f000 fea4 bl 802bb6c <_free_r>
802ae24: 6c61 ldr r1, [r4, #68] @ 0x44
802ae26: b111 cbz r1, 802ae2e <_reclaim_reent+0x82>
802ae28: 4620 mov r0, r4
802ae2a: f000 fe9f bl 802bb6c <_free_r>
802ae2e: 6ae1 ldr r1, [r4, #44] @ 0x2c
802ae30: b111 cbz r1, 802ae38 <_reclaim_reent+0x8c>
802ae32: 4620 mov r0, r4
802ae34: f000 fe9a bl 802bb6c <_free_r>
802ae38: 6a23 ldr r3, [r4, #32]
802ae3a: b14b cbz r3, 802ae50 <_reclaim_reent+0xa4>
802ae3c: 4620 mov r0, r4
802ae3e: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
802ae42: 4718 bx r3
802ae44: 680e ldr r6, [r1, #0]
802ae46: 4620 mov r0, r4
802ae48: f000 fe90 bl 802bb6c <_free_r>
802ae4c: 4631 mov r1, r6
802ae4e: e7bb b.n 802adc8 <_reclaim_reent+0x1c>
802ae50: bd70 pop {r4, r5, r6, pc}
802ae52: bf00 nop
802ae54: 240001d4 .word 0x240001d4
0802ae58 <_lseek_r>:
802ae58: b538 push {r3, r4, r5, lr}
802ae5a: 4d07 ldr r5, [pc, #28] @ (802ae78 <_lseek_r+0x20>)
802ae5c: 4604 mov r4, r0
802ae5e: 4608 mov r0, r1
802ae60: 4611 mov r1, r2
802ae62: 2200 movs r2, #0
802ae64: 602a str r2, [r5, #0]
802ae66: 461a mov r2, r3
802ae68: f7d9 fae5 bl 8004436 <_lseek>
802ae6c: 1c43 adds r3, r0, #1
802ae6e: d102 bne.n 802ae76 <_lseek_r+0x1e>
802ae70: 682b ldr r3, [r5, #0]
802ae72: b103 cbz r3, 802ae76 <_lseek_r+0x1e>
802ae74: 6023 str r3, [r4, #0]
802ae76: bd38 pop {r3, r4, r5, pc}
802ae78: 2402b2a0 .word 0x2402b2a0
0802ae7c <_read_r>:
802ae7c: b538 push {r3, r4, r5, lr}
802ae7e: 4d07 ldr r5, [pc, #28] @ (802ae9c <_read_r+0x20>)
802ae80: 4604 mov r4, r0
802ae82: 4608 mov r0, r1
802ae84: 4611 mov r1, r2
802ae86: 2200 movs r2, #0
802ae88: 602a str r2, [r5, #0]
802ae8a: 461a mov r2, r3
802ae8c: f7d9 fa73 bl 8004376 <_read>
802ae90: 1c43 adds r3, r0, #1
802ae92: d102 bne.n 802ae9a <_read_r+0x1e>
802ae94: 682b ldr r3, [r5, #0]
802ae96: b103 cbz r3, 802ae9a <_read_r+0x1e>
802ae98: 6023 str r3, [r4, #0]
802ae9a: bd38 pop {r3, r4, r5, pc}
802ae9c: 2402b2a0 .word 0x2402b2a0
0802aea0 <_sbrk_r>:
802aea0: b538 push {r3, r4, r5, lr}
802aea2: 4d06 ldr r5, [pc, #24] @ (802aebc <_sbrk_r+0x1c>)
802aea4: 2300 movs r3, #0
802aea6: 4604 mov r4, r0
802aea8: 4608 mov r0, r1
802aeaa: 602b str r3, [r5, #0]
802aeac: f7d9 fad0 bl 8004450 <_sbrk>
802aeb0: 1c43 adds r3, r0, #1
802aeb2: d102 bne.n 802aeba <_sbrk_r+0x1a>
802aeb4: 682b ldr r3, [r5, #0]
802aeb6: b103 cbz r3, 802aeba <_sbrk_r+0x1a>
802aeb8: 6023 str r3, [r4, #0]
802aeba: bd38 pop {r3, r4, r5, pc}
802aebc: 2402b2a0 .word 0x2402b2a0
0802aec0 <_write_r>:
802aec0: b538 push {r3, r4, r5, lr}
802aec2: 4d07 ldr r5, [pc, #28] @ (802aee0 <_write_r+0x20>)
802aec4: 4604 mov r4, r0
802aec6: 4608 mov r0, r1
802aec8: 4611 mov r1, r2
802aeca: 2200 movs r2, #0
802aecc: 602a str r2, [r5, #0]
802aece: 461a mov r2, r3
802aed0: f7d9 fa6e bl 80043b0 <_write>
802aed4: 1c43 adds r3, r0, #1
802aed6: d102 bne.n 802aede <_write_r+0x1e>
802aed8: 682b ldr r3, [r5, #0]
802aeda: b103 cbz r3, 802aede <_write_r+0x1e>
802aedc: 6023 str r3, [r4, #0]
802aede: bd38 pop {r3, r4, r5, pc}
802aee0: 2402b2a0 .word 0x2402b2a0
0802aee4 <__errno>:
802aee4: 4b01 ldr r3, [pc, #4] @ (802aeec <__errno+0x8>)
802aee6: 6818 ldr r0, [r3, #0]
802aee8: 4770 bx lr
802aeea: bf00 nop
802aeec: 240001d4 .word 0x240001d4
0802aef0 <__libc_init_array>:
802aef0: b570 push {r4, r5, r6, lr}
802aef2: 4d0d ldr r5, [pc, #52] @ (802af28 <__libc_init_array+0x38>)
802aef4: 4c0d ldr r4, [pc, #52] @ (802af2c <__libc_init_array+0x3c>)
802aef6: 1b64 subs r4, r4, r5
802aef8: 10a4 asrs r4, r4, #2
802aefa: 2600 movs r6, #0
802aefc: 42a6 cmp r6, r4
802aefe: d109 bne.n 802af14 <__libc_init_array+0x24>
802af00: 4d0b ldr r5, [pc, #44] @ (802af30 <__libc_init_array+0x40>)
802af02: 4c0c ldr r4, [pc, #48] @ (802af34 <__libc_init_array+0x44>)
802af04: f002 fac8 bl 802d498 <_init>
802af08: 1b64 subs r4, r4, r5
802af0a: 10a4 asrs r4, r4, #2
802af0c: 2600 movs r6, #0
802af0e: 42a6 cmp r6, r4
802af10: d105 bne.n 802af1e <__libc_init_array+0x2e>
802af12: bd70 pop {r4, r5, r6, pc}
802af14: f855 3b04 ldr.w r3, [r5], #4
802af18: 4798 blx r3
802af1a: 3601 adds r6, #1
802af1c: e7ee b.n 802aefc <__libc_init_array+0xc>
802af1e: f855 3b04 ldr.w r3, [r5], #4
802af22: 4798 blx r3
802af24: 3601 adds r6, #1
802af26: e7f2 b.n 802af0e <__libc_init_array+0x1e>
802af28: 08032364 .word 0x08032364
802af2c: 08032364 .word 0x08032364
802af30: 08032364 .word 0x08032364
802af34: 08032368 .word 0x08032368
0802af38 <__retarget_lock_init_recursive>:
802af38: 4770 bx lr
0802af3a <__retarget_lock_acquire_recursive>:
802af3a: 4770 bx lr
0802af3c <__retarget_lock_release_recursive>:
802af3c: 4770 bx lr
0802af3e <memcpy>:
802af3e: 440a add r2, r1
802af40: 4291 cmp r1, r2
802af42: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff
802af46: d100 bne.n 802af4a <memcpy+0xc>
802af48: 4770 bx lr
802af4a: b510 push {r4, lr}
802af4c: f811 4b01 ldrb.w r4, [r1], #1
802af50: f803 4f01 strb.w r4, [r3, #1]!
802af54: 4291 cmp r1, r2
802af56: d1f9 bne.n 802af4c <memcpy+0xe>
802af58: bd10 pop {r4, pc}
802af5a: 0000 movs r0, r0
802af5c: 0000 movs r0, r0
...
0802af60 <nan>:
802af60: ed9f 0b01 vldr d0, [pc, #4] @ 802af68 <nan+0x8>
802af64: 4770 bx lr
802af66: bf00 nop
802af68: 00000000 .word 0x00000000
802af6c: 7ff80000 .word 0x7ff80000
0802af70 <__assert_func>:
802af70: b51f push {r0, r1, r2, r3, r4, lr}
802af72: 4614 mov r4, r2
802af74: 461a mov r2, r3
802af76: 4b09 ldr r3, [pc, #36] @ (802af9c <__assert_func+0x2c>)
802af78: 681b ldr r3, [r3, #0]
802af7a: 4605 mov r5, r0
802af7c: 68d8 ldr r0, [r3, #12]
802af7e: b954 cbnz r4, 802af96 <__assert_func+0x26>
802af80: 4b07 ldr r3, [pc, #28] @ (802afa0 <__assert_func+0x30>)
802af82: 461c mov r4, r3
802af84: e9cd 3401 strd r3, r4, [sp, #4]
802af88: 9100 str r1, [sp, #0]
802af8a: 462b mov r3, r5
802af8c: 4905 ldr r1, [pc, #20] @ (802afa4 <__assert_func+0x34>)
802af8e: f002 f98d bl 802d2ac <fiprintf>
802af92: f002 fa21 bl 802d3d8 <abort>
802af96: 4b04 ldr r3, [pc, #16] @ (802afa8 <__assert_func+0x38>)
802af98: e7f4 b.n 802af84 <__assert_func+0x14>
802af9a: bf00 nop
802af9c: 240001d4 .word 0x240001d4
802afa0: 08032118 .word 0x08032118
802afa4: 080320ea .word 0x080320ea
802afa8: 080320dd .word 0x080320dd
0802afac <quorem>:
802afac: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
802afb0: 6903 ldr r3, [r0, #16]
802afb2: 690c ldr r4, [r1, #16]
802afb4: 42a3 cmp r3, r4
802afb6: 4607 mov r7, r0
802afb8: db7e blt.n 802b0b8 <quorem+0x10c>
802afba: 3c01 subs r4, #1
802afbc: f101 0814 add.w r8, r1, #20
802afc0: 00a3 lsls r3, r4, #2
802afc2: f100 0514 add.w r5, r0, #20
802afc6: 9300 str r3, [sp, #0]
802afc8: eb05 0384 add.w r3, r5, r4, lsl #2
802afcc: 9301 str r3, [sp, #4]
802afce: f858 3024 ldr.w r3, [r8, r4, lsl #2]
802afd2: f855 2024 ldr.w r2, [r5, r4, lsl #2]
802afd6: 3301 adds r3, #1
802afd8: 429a cmp r2, r3
802afda: eb08 0984 add.w r9, r8, r4, lsl #2
802afde: fbb2 f6f3 udiv r6, r2, r3
802afe2: d32e bcc.n 802b042 <quorem+0x96>
802afe4: f04f 0a00 mov.w sl, #0
802afe8: 46c4 mov ip, r8
802afea: 46ae mov lr, r5
802afec: 46d3 mov fp, sl
802afee: f85c 3b04 ldr.w r3, [ip], #4
802aff2: b298 uxth r0, r3
802aff4: fb06 a000 mla r0, r6, r0, sl
802aff8: 0c02 lsrs r2, r0, #16
802affa: 0c1b lsrs r3, r3, #16
802affc: fb06 2303 mla r3, r6, r3, r2
802b000: f8de 2000 ldr.w r2, [lr]
802b004: b280 uxth r0, r0
802b006: b292 uxth r2, r2
802b008: 1a12 subs r2, r2, r0
802b00a: 445a add r2, fp
802b00c: f8de 0000 ldr.w r0, [lr]
802b010: ea4f 4a13 mov.w sl, r3, lsr #16
802b014: b29b uxth r3, r3
802b016: ebc3 4322 rsb r3, r3, r2, asr #16
802b01a: eb03 4310 add.w r3, r3, r0, lsr #16
802b01e: b292 uxth r2, r2
802b020: ea42 4203 orr.w r2, r2, r3, lsl #16
802b024: 45e1 cmp r9, ip
802b026: f84e 2b04 str.w r2, [lr], #4
802b02a: ea4f 4b23 mov.w fp, r3, asr #16
802b02e: d2de bcs.n 802afee <quorem+0x42>
802b030: 9b00 ldr r3, [sp, #0]
802b032: 58eb ldr r3, [r5, r3]
802b034: b92b cbnz r3, 802b042 <quorem+0x96>
802b036: 9b01 ldr r3, [sp, #4]
802b038: 3b04 subs r3, #4
802b03a: 429d cmp r5, r3
802b03c: 461a mov r2, r3
802b03e: d32f bcc.n 802b0a0 <quorem+0xf4>
802b040: 613c str r4, [r7, #16]
802b042: 4638 mov r0, r7
802b044: f001 fbec bl 802c820 <__mcmp>
802b048: 2800 cmp r0, #0
802b04a: db25 blt.n 802b098 <quorem+0xec>
802b04c: 4629 mov r1, r5
802b04e: 2000 movs r0, #0
802b050: f858 2b04 ldr.w r2, [r8], #4
802b054: f8d1 c000 ldr.w ip, [r1]
802b058: fa1f fe82 uxth.w lr, r2
802b05c: fa1f f38c uxth.w r3, ip
802b060: eba3 030e sub.w r3, r3, lr
802b064: 4403 add r3, r0
802b066: 0c12 lsrs r2, r2, #16
802b068: ebc2 4223 rsb r2, r2, r3, asr #16
802b06c: eb02 421c add.w r2, r2, ip, lsr #16
802b070: b29b uxth r3, r3
802b072: ea43 4302 orr.w r3, r3, r2, lsl #16
802b076: 45c1 cmp r9, r8
802b078: f841 3b04 str.w r3, [r1], #4
802b07c: ea4f 4022 mov.w r0, r2, asr #16
802b080: d2e6 bcs.n 802b050 <quorem+0xa4>
802b082: f855 2024 ldr.w r2, [r5, r4, lsl #2]
802b086: eb05 0384 add.w r3, r5, r4, lsl #2
802b08a: b922 cbnz r2, 802b096 <quorem+0xea>
802b08c: 3b04 subs r3, #4
802b08e: 429d cmp r5, r3
802b090: 461a mov r2, r3
802b092: d30b bcc.n 802b0ac <quorem+0x100>
802b094: 613c str r4, [r7, #16]
802b096: 3601 adds r6, #1
802b098: 4630 mov r0, r6
802b09a: b003 add sp, #12
802b09c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802b0a0: 6812 ldr r2, [r2, #0]
802b0a2: 3b04 subs r3, #4
802b0a4: 2a00 cmp r2, #0
802b0a6: d1cb bne.n 802b040 <quorem+0x94>
802b0a8: 3c01 subs r4, #1
802b0aa: e7c6 b.n 802b03a <quorem+0x8e>
802b0ac: 6812 ldr r2, [r2, #0]
802b0ae: 3b04 subs r3, #4
802b0b0: 2a00 cmp r2, #0
802b0b2: d1ef bne.n 802b094 <quorem+0xe8>
802b0b4: 3c01 subs r4, #1
802b0b6: e7ea b.n 802b08e <quorem+0xe2>
802b0b8: 2000 movs r0, #0
802b0ba: e7ee b.n 802b09a <quorem+0xee>
802b0bc: 0000 movs r0, r0
...
0802b0c0 <_dtoa_r>:
802b0c0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
802b0c4: ed2d 8b02 vpush {d8}
802b0c8: 69c7 ldr r7, [r0, #28]
802b0ca: b091 sub sp, #68 @ 0x44
802b0cc: ed8d 0b02 vstr d0, [sp, #8]
802b0d0: ec55 4b10 vmov r4, r5, d0
802b0d4: 9e1c ldr r6, [sp, #112] @ 0x70
802b0d6: 9107 str r1, [sp, #28]
802b0d8: 4681 mov r9, r0
802b0da: 9209 str r2, [sp, #36] @ 0x24
802b0dc: 930d str r3, [sp, #52] @ 0x34
802b0de: b97f cbnz r7, 802b100 <_dtoa_r+0x40>
802b0e0: 2010 movs r0, #16
802b0e2: f7fe f8bb bl 802925c <malloc>
802b0e6: 4602 mov r2, r0
802b0e8: f8c9 001c str.w r0, [r9, #28]
802b0ec: b920 cbnz r0, 802b0f8 <_dtoa_r+0x38>
802b0ee: 4ba0 ldr r3, [pc, #640] @ (802b370 <_dtoa_r+0x2b0>)
802b0f0: 21ef movs r1, #239 @ 0xef
802b0f2: 48a0 ldr r0, [pc, #640] @ (802b374 <_dtoa_r+0x2b4>)
802b0f4: f7ff ff3c bl 802af70 <__assert_func>
802b0f8: e9c0 7701 strd r7, r7, [r0, #4]
802b0fc: 6007 str r7, [r0, #0]
802b0fe: 60c7 str r7, [r0, #12]
802b100: f8d9 301c ldr.w r3, [r9, #28]
802b104: 6819 ldr r1, [r3, #0]
802b106: b159 cbz r1, 802b120 <_dtoa_r+0x60>
802b108: 685a ldr r2, [r3, #4]
802b10a: 604a str r2, [r1, #4]
802b10c: 2301 movs r3, #1
802b10e: 4093 lsls r3, r2
802b110: 608b str r3, [r1, #8]
802b112: 4648 mov r0, r9
802b114: f001 f900 bl 802c318 <_Bfree>
802b118: f8d9 301c ldr.w r3, [r9, #28]
802b11c: 2200 movs r2, #0
802b11e: 601a str r2, [r3, #0]
802b120: 1e2b subs r3, r5, #0
802b122: bfbb ittet lt
802b124: f023 4300 biclt.w r3, r3, #2147483648 @ 0x80000000
802b128: 9303 strlt r3, [sp, #12]
802b12a: 2300 movge r3, #0
802b12c: 2201 movlt r2, #1
802b12e: bfac ite ge
802b130: 6033 strge r3, [r6, #0]
802b132: 6032 strlt r2, [r6, #0]
802b134: 4b90 ldr r3, [pc, #576] @ (802b378 <_dtoa_r+0x2b8>)
802b136: 9e03 ldr r6, [sp, #12]
802b138: 43b3 bics r3, r6
802b13a: d110 bne.n 802b15e <_dtoa_r+0x9e>
802b13c: 9a0d ldr r2, [sp, #52] @ 0x34
802b13e: f242 730f movw r3, #9999 @ 0x270f
802b142: 6013 str r3, [r2, #0]
802b144: f3c6 0313 ubfx r3, r6, #0, #20
802b148: 4323 orrs r3, r4
802b14a: f000 84de beq.w 802bb0a <_dtoa_r+0xa4a>
802b14e: 9b1d ldr r3, [sp, #116] @ 0x74
802b150: 4f8a ldr r7, [pc, #552] @ (802b37c <_dtoa_r+0x2bc>)
802b152: 2b00 cmp r3, #0
802b154: f000 84e0 beq.w 802bb18 <_dtoa_r+0xa58>
802b158: 1cfb adds r3, r7, #3
802b15a: f000 bcdb b.w 802bb14 <_dtoa_r+0xa54>
802b15e: ed9d 8b02 vldr d8, [sp, #8]
802b162: eeb5 8b40 vcmp.f64 d8, #0.0
802b166: eef1 fa10 vmrs APSR_nzcv, fpscr
802b16a: d10a bne.n 802b182 <_dtoa_r+0xc2>
802b16c: 9a0d ldr r2, [sp, #52] @ 0x34
802b16e: 2301 movs r3, #1
802b170: 6013 str r3, [r2, #0]
802b172: 9b1d ldr r3, [sp, #116] @ 0x74
802b174: b113 cbz r3, 802b17c <_dtoa_r+0xbc>
802b176: 9a1d ldr r2, [sp, #116] @ 0x74
802b178: 4b81 ldr r3, [pc, #516] @ (802b380 <_dtoa_r+0x2c0>)
802b17a: 6013 str r3, [r2, #0]
802b17c: 4f81 ldr r7, [pc, #516] @ (802b384 <_dtoa_r+0x2c4>)
802b17e: f000 bccb b.w 802bb18 <_dtoa_r+0xa58>
802b182: aa0e add r2, sp, #56 @ 0x38
802b184: a90f add r1, sp, #60 @ 0x3c
802b186: 4648 mov r0, r9
802b188: eeb0 0b48 vmov.f64 d0, d8
802b18c: f001 fc68 bl 802ca60 <__d2b>
802b190: f3c6 530a ubfx r3, r6, #20, #11
802b194: 9a0e ldr r2, [sp, #56] @ 0x38
802b196: 9001 str r0, [sp, #4]
802b198: 2b00 cmp r3, #0
802b19a: d045 beq.n 802b228 <_dtoa_r+0x168>
802b19c: eeb0 7b48 vmov.f64 d7, d8
802b1a0: ee18 1a90 vmov r1, s17
802b1a4: f3c1 0113 ubfx r1, r1, #0, #20
802b1a8: f041 517f orr.w r1, r1, #1069547520 @ 0x3fc00000
802b1ac: f441 1140 orr.w r1, r1, #3145728 @ 0x300000
802b1b0: f2a3 33ff subw r3, r3, #1023 @ 0x3ff
802b1b4: 2500 movs r5, #0
802b1b6: ee07 1a90 vmov s15, r1
802b1ba: eeb7 6b08 vmov.f64 d6, #120 @ 0x3fc00000 1.5
802b1be: ed9f 5b66 vldr d5, [pc, #408] @ 802b358 <_dtoa_r+0x298>
802b1c2: ee37 7b46 vsub.f64 d7, d7, d6
802b1c6: ed9f 6b66 vldr d6, [pc, #408] @ 802b360 <_dtoa_r+0x2a0>
802b1ca: eea7 6b05 vfma.f64 d6, d7, d5
802b1ce: ed9f 5b66 vldr d5, [pc, #408] @ 802b368 <_dtoa_r+0x2a8>
802b1d2: ee07 3a90 vmov s15, r3
802b1d6: eeb8 4be7 vcvt.f64.s32 d4, s15
802b1da: eeb0 7b46 vmov.f64 d7, d6
802b1de: eea4 7b05 vfma.f64 d7, d4, d5
802b1e2: eefd 6bc7 vcvt.s32.f64 s13, d7
802b1e6: eeb5 7bc0 vcmpe.f64 d7, #0.0
802b1ea: eef1 fa10 vmrs APSR_nzcv, fpscr
802b1ee: ee16 8a90 vmov r8, s13
802b1f2: d508 bpl.n 802b206 <_dtoa_r+0x146>
802b1f4: eeb8 6be6 vcvt.f64.s32 d6, s13
802b1f8: eeb4 6b47 vcmp.f64 d6, d7
802b1fc: eef1 fa10 vmrs APSR_nzcv, fpscr
802b200: bf18 it ne
802b202: f108 38ff addne.w r8, r8, #4294967295 @ 0xffffffff
802b206: f1b8 0f16 cmp.w r8, #22
802b20a: d82b bhi.n 802b264 <_dtoa_r+0x1a4>
802b20c: 495e ldr r1, [pc, #376] @ (802b388 <_dtoa_r+0x2c8>)
802b20e: eb01 01c8 add.w r1, r1, r8, lsl #3
802b212: ed91 7b00 vldr d7, [r1]
802b216: eeb4 8bc7 vcmpe.f64 d8, d7
802b21a: eef1 fa10 vmrs APSR_nzcv, fpscr
802b21e: d501 bpl.n 802b224 <_dtoa_r+0x164>
802b220: f108 38ff add.w r8, r8, #4294967295 @ 0xffffffff
802b224: 2100 movs r1, #0
802b226: e01e b.n 802b266 <_dtoa_r+0x1a6>
802b228: 9b0f ldr r3, [sp, #60] @ 0x3c
802b22a: 4413 add r3, r2
802b22c: f203 4132 addw r1, r3, #1074 @ 0x432
802b230: 2920 cmp r1, #32
802b232: bfc1 itttt gt
802b234: f1c1 0140 rsbgt r1, r1, #64 @ 0x40
802b238: 408e lslgt r6, r1
802b23a: f203 4112 addwgt r1, r3, #1042 @ 0x412
802b23e: fa24 f101 lsrgt.w r1, r4, r1
802b242: bfd6 itet le
802b244: f1c1 0120 rsble r1, r1, #32
802b248: 4331 orrgt r1, r6
802b24a: fa04 f101 lslle.w r1, r4, r1
802b24e: ee07 1a90 vmov s15, r1
802b252: eeb8 7b67 vcvt.f64.u32 d7, s15
802b256: 3b01 subs r3, #1
802b258: ee17 1a90 vmov r1, s15
802b25c: 2501 movs r5, #1
802b25e: f1a1 71f8 sub.w r1, r1, #32505856 @ 0x1f00000
802b262: e7a8 b.n 802b1b6 <_dtoa_r+0xf6>
802b264: 2101 movs r1, #1
802b266: 1ad2 subs r2, r2, r3
802b268: 1e53 subs r3, r2, #1
802b26a: 9306 str r3, [sp, #24]
802b26c: bf45 ittet mi
802b26e: f1c2 0301 rsbmi r3, r2, #1
802b272: 9305 strmi r3, [sp, #20]
802b274: 2300 movpl r3, #0
802b276: 2300 movmi r3, #0
802b278: bf4c ite mi
802b27a: 9306 strmi r3, [sp, #24]
802b27c: 9305 strpl r3, [sp, #20]
802b27e: f1b8 0f00 cmp.w r8, #0
802b282: 910c str r1, [sp, #48] @ 0x30
802b284: db18 blt.n 802b2b8 <_dtoa_r+0x1f8>
802b286: 9b06 ldr r3, [sp, #24]
802b288: f8cd 8028 str.w r8, [sp, #40] @ 0x28
802b28c: 4443 add r3, r8
802b28e: 9306 str r3, [sp, #24]
802b290: 2300 movs r3, #0
802b292: 9a07 ldr r2, [sp, #28]
802b294: 2a09 cmp r2, #9
802b296: d849 bhi.n 802b32c <_dtoa_r+0x26c>
802b298: 2a05 cmp r2, #5
802b29a: bfc4 itt gt
802b29c: 3a04 subgt r2, #4
802b29e: 9207 strgt r2, [sp, #28]
802b2a0: 9a07 ldr r2, [sp, #28]
802b2a2: f1a2 0202 sub.w r2, r2, #2
802b2a6: bfcc ite gt
802b2a8: 2400 movgt r4, #0
802b2aa: 2401 movle r4, #1
802b2ac: 2a03 cmp r2, #3
802b2ae: d848 bhi.n 802b342 <_dtoa_r+0x282>
802b2b0: e8df f002 tbb [pc, r2]
802b2b4: 3a2c2e0b .word 0x3a2c2e0b
802b2b8: 9b05 ldr r3, [sp, #20]
802b2ba: 2200 movs r2, #0
802b2bc: eba3 0308 sub.w r3, r3, r8
802b2c0: 9305 str r3, [sp, #20]
802b2c2: 920a str r2, [sp, #40] @ 0x28
802b2c4: f1c8 0300 rsb r3, r8, #0
802b2c8: e7e3 b.n 802b292 <_dtoa_r+0x1d2>
802b2ca: 2200 movs r2, #0
802b2cc: 9208 str r2, [sp, #32]
802b2ce: 9a09 ldr r2, [sp, #36] @ 0x24
802b2d0: 2a00 cmp r2, #0
802b2d2: dc39 bgt.n 802b348 <_dtoa_r+0x288>
802b2d4: f04f 0b01 mov.w fp, #1
802b2d8: 46da mov sl, fp
802b2da: 465a mov r2, fp
802b2dc: f8cd b024 str.w fp, [sp, #36] @ 0x24
802b2e0: f8d9 701c ldr.w r7, [r9, #28]
802b2e4: 2100 movs r1, #0
802b2e6: 2004 movs r0, #4
802b2e8: f100 0614 add.w r6, r0, #20
802b2ec: 4296 cmp r6, r2
802b2ee: d930 bls.n 802b352 <_dtoa_r+0x292>
802b2f0: 6079 str r1, [r7, #4]
802b2f2: 4648 mov r0, r9
802b2f4: 9304 str r3, [sp, #16]
802b2f6: f000 ffcf bl 802c298 <_Balloc>
802b2fa: 9b04 ldr r3, [sp, #16]
802b2fc: 4607 mov r7, r0
802b2fe: 2800 cmp r0, #0
802b300: d146 bne.n 802b390 <_dtoa_r+0x2d0>
802b302: 4b22 ldr r3, [pc, #136] @ (802b38c <_dtoa_r+0x2cc>)
802b304: 4602 mov r2, r0
802b306: f240 11af movw r1, #431 @ 0x1af
802b30a: e6f2 b.n 802b0f2 <_dtoa_r+0x32>
802b30c: 2201 movs r2, #1
802b30e: e7dd b.n 802b2cc <_dtoa_r+0x20c>
802b310: 2200 movs r2, #0
802b312: 9208 str r2, [sp, #32]
802b314: 9a09 ldr r2, [sp, #36] @ 0x24
802b316: eb08 0b02 add.w fp, r8, r2
802b31a: f10b 0a01 add.w sl, fp, #1
802b31e: 4652 mov r2, sl
802b320: 2a01 cmp r2, #1
802b322: bfb8 it lt
802b324: 2201 movlt r2, #1
802b326: e7db b.n 802b2e0 <_dtoa_r+0x220>
802b328: 2201 movs r2, #1
802b32a: e7f2 b.n 802b312 <_dtoa_r+0x252>
802b32c: 2401 movs r4, #1
802b32e: 2200 movs r2, #0
802b330: e9cd 2407 strd r2, r4, [sp, #28]
802b334: f04f 3bff mov.w fp, #4294967295 @ 0xffffffff
802b338: 2100 movs r1, #0
802b33a: 46da mov sl, fp
802b33c: 2212 movs r2, #18
802b33e: 9109 str r1, [sp, #36] @ 0x24
802b340: e7ce b.n 802b2e0 <_dtoa_r+0x220>
802b342: 2201 movs r2, #1
802b344: 9208 str r2, [sp, #32]
802b346: e7f5 b.n 802b334 <_dtoa_r+0x274>
802b348: f8dd b024 ldr.w fp, [sp, #36] @ 0x24
802b34c: 46da mov sl, fp
802b34e: 465a mov r2, fp
802b350: e7c6 b.n 802b2e0 <_dtoa_r+0x220>
802b352: 3101 adds r1, #1
802b354: 0040 lsls r0, r0, #1
802b356: e7c7 b.n 802b2e8 <_dtoa_r+0x228>
802b358: 636f4361 .word 0x636f4361
802b35c: 3fd287a7 .word 0x3fd287a7
802b360: 8b60c8b3 .word 0x8b60c8b3
802b364: 3fc68a28 .word 0x3fc68a28
802b368: 509f79fb .word 0x509f79fb
802b36c: 3fd34413 .word 0x3fd34413
802b370: 08031ede .word 0x08031ede
802b374: 08032126 .word 0x08032126
802b378: 7ff00000 .word 0x7ff00000
802b37c: 08032122 .word 0x08032122
802b380: 080320b2 .word 0x080320b2
802b384: 080320b1 .word 0x080320b1
802b388: 08032280 .word 0x08032280
802b38c: 0803217e .word 0x0803217e
802b390: f8d9 201c ldr.w r2, [r9, #28]
802b394: f1ba 0f0e cmp.w sl, #14
802b398: 6010 str r0, [r2, #0]
802b39a: d86f bhi.n 802b47c <_dtoa_r+0x3bc>
802b39c: 2c00 cmp r4, #0
802b39e: d06d beq.n 802b47c <_dtoa_r+0x3bc>
802b3a0: f1b8 0f00 cmp.w r8, #0
802b3a4: f340 80c2 ble.w 802b52c <_dtoa_r+0x46c>
802b3a8: 4aca ldr r2, [pc, #808] @ (802b6d4 <_dtoa_r+0x614>)
802b3aa: f008 010f and.w r1, r8, #15
802b3ae: eb02 02c1 add.w r2, r2, r1, lsl #3
802b3b2: f418 7f80 tst.w r8, #256 @ 0x100
802b3b6: ed92 7b00 vldr d7, [r2]
802b3ba: ea4f 1128 mov.w r1, r8, asr #4
802b3be: f000 80a9 beq.w 802b514 <_dtoa_r+0x454>
802b3c2: 4ac5 ldr r2, [pc, #788] @ (802b6d8 <_dtoa_r+0x618>)
802b3c4: ed92 6b08 vldr d6, [r2, #32]
802b3c8: ee88 6b06 vdiv.f64 d6, d8, d6
802b3cc: ed8d 6b02 vstr d6, [sp, #8]
802b3d0: f001 010f and.w r1, r1, #15
802b3d4: 2203 movs r2, #3
802b3d6: 48c0 ldr r0, [pc, #768] @ (802b6d8 <_dtoa_r+0x618>)
802b3d8: 2900 cmp r1, #0
802b3da: f040 809d bne.w 802b518 <_dtoa_r+0x458>
802b3de: ed9d 6b02 vldr d6, [sp, #8]
802b3e2: ee86 7b07 vdiv.f64 d7, d6, d7
802b3e6: ed8d 7b02 vstr d7, [sp, #8]
802b3ea: 990c ldr r1, [sp, #48] @ 0x30
802b3ec: ed9d 7b02 vldr d7, [sp, #8]
802b3f0: 2900 cmp r1, #0
802b3f2: f000 80c1 beq.w 802b578 <_dtoa_r+0x4b8>
802b3f6: eeb7 6b00 vmov.f64 d6, #112 @ 0x3f800000 1.0
802b3fa: eeb4 7bc6 vcmpe.f64 d7, d6
802b3fe: eef1 fa10 vmrs APSR_nzcv, fpscr
802b402: f140 80b9 bpl.w 802b578 <_dtoa_r+0x4b8>
802b406: f1ba 0f00 cmp.w sl, #0
802b40a: f000 80b5 beq.w 802b578 <_dtoa_r+0x4b8>
802b40e: f1bb 0f00 cmp.w fp, #0
802b412: dd31 ble.n 802b478 <_dtoa_r+0x3b8>
802b414: eeb2 6b04 vmov.f64 d6, #36 @ 0x41200000 10.0
802b418: ee27 7b06 vmul.f64 d7, d7, d6
802b41c: ed8d 7b02 vstr d7, [sp, #8]
802b420: f108 31ff add.w r1, r8, #4294967295 @ 0xffffffff
802b424: 9104 str r1, [sp, #16]
802b426: 3201 adds r2, #1
802b428: 465c mov r4, fp
802b42a: ed9d 6b02 vldr d6, [sp, #8]
802b42e: eeb1 5b0c vmov.f64 d5, #28 @ 0x40e00000 7.0
802b432: ee07 2a90 vmov s15, r2
802b436: eeb8 7be7 vcvt.f64.s32 d7, s15
802b43a: eea7 5b06 vfma.f64 d5, d7, d6
802b43e: ee15 2a90 vmov r2, s11
802b442: ec51 0b15 vmov r0, r1, d5
802b446: f1a2 7150 sub.w r1, r2, #54525952 @ 0x3400000
802b44a: 2c00 cmp r4, #0
802b44c: f040 8098 bne.w 802b580 <_dtoa_r+0x4c0>
802b450: eeb1 7b04 vmov.f64 d7, #20 @ 0x40a00000 5.0
802b454: ee36 6b47 vsub.f64 d6, d6, d7
802b458: ec41 0b17 vmov d7, r0, r1
802b45c: eeb4 6bc7 vcmpe.f64 d6, d7
802b460: eef1 fa10 vmrs APSR_nzcv, fpscr
802b464: f300 8261 bgt.w 802b92a <_dtoa_r+0x86a>
802b468: eeb1 7b47 vneg.f64 d7, d7
802b46c: eeb4 6bc7 vcmpe.f64 d6, d7
802b470: eef1 fa10 vmrs APSR_nzcv, fpscr
802b474: f100 80f5 bmi.w 802b662 <_dtoa_r+0x5a2>
802b478: ed8d 8b02 vstr d8, [sp, #8]
802b47c: 9a0f ldr r2, [sp, #60] @ 0x3c
802b47e: 2a00 cmp r2, #0
802b480: f2c0 812c blt.w 802b6dc <_dtoa_r+0x61c>
802b484: f1b8 0f0e cmp.w r8, #14
802b488: f300 8128 bgt.w 802b6dc <_dtoa_r+0x61c>
802b48c: 4b91 ldr r3, [pc, #580] @ (802b6d4 <_dtoa_r+0x614>)
802b48e: eb03 03c8 add.w r3, r3, r8, lsl #3
802b492: ed93 6b00 vldr d6, [r3]
802b496: 9b09 ldr r3, [sp, #36] @ 0x24
802b498: 2b00 cmp r3, #0
802b49a: da03 bge.n 802b4a4 <_dtoa_r+0x3e4>
802b49c: f1ba 0f00 cmp.w sl, #0
802b4a0: f340 80d2 ble.w 802b648 <_dtoa_r+0x588>
802b4a4: eeb2 4b04 vmov.f64 d4, #36 @ 0x41200000 10.0
802b4a8: ed9d 7b02 vldr d7, [sp, #8]
802b4ac: 463e mov r6, r7
802b4ae: ee87 5b06 vdiv.f64 d5, d7, d6
802b4b2: eebd 5bc5 vcvt.s32.f64 s10, d5
802b4b6: ee15 3a10 vmov r3, s10
802b4ba: 3330 adds r3, #48 @ 0x30
802b4bc: f806 3b01 strb.w r3, [r6], #1
802b4c0: 1bf3 subs r3, r6, r7
802b4c2: 459a cmp sl, r3
802b4c4: eeb8 3bc5 vcvt.f64.s32 d3, s10
802b4c8: eea3 7b46 vfms.f64 d7, d3, d6
802b4cc: f040 80f8 bne.w 802b6c0 <_dtoa_r+0x600>
802b4d0: ee37 7b07 vadd.f64 d7, d7, d7
802b4d4: eeb4 7bc6 vcmpe.f64 d7, d6
802b4d8: eef1 fa10 vmrs APSR_nzcv, fpscr
802b4dc: f300 80dd bgt.w 802b69a <_dtoa_r+0x5da>
802b4e0: eeb4 7b46 vcmp.f64 d7, d6
802b4e4: eef1 fa10 vmrs APSR_nzcv, fpscr
802b4e8: d104 bne.n 802b4f4 <_dtoa_r+0x434>
802b4ea: ee15 3a10 vmov r3, s10
802b4ee: 07db lsls r3, r3, #31
802b4f0: f100 80d3 bmi.w 802b69a <_dtoa_r+0x5da>
802b4f4: 9901 ldr r1, [sp, #4]
802b4f6: 4648 mov r0, r9
802b4f8: f000 ff0e bl 802c318 <_Bfree>
802b4fc: 2300 movs r3, #0
802b4fe: 9a0d ldr r2, [sp, #52] @ 0x34
802b500: 7033 strb r3, [r6, #0]
802b502: f108 0301 add.w r3, r8, #1
802b506: 6013 str r3, [r2, #0]
802b508: 9b1d ldr r3, [sp, #116] @ 0x74
802b50a: 2b00 cmp r3, #0
802b50c: f000 8304 beq.w 802bb18 <_dtoa_r+0xa58>
802b510: 601e str r6, [r3, #0]
802b512: e301 b.n 802bb18 <_dtoa_r+0xa58>
802b514: 2202 movs r2, #2
802b516: e75e b.n 802b3d6 <_dtoa_r+0x316>
802b518: 07cc lsls r4, r1, #31
802b51a: d504 bpl.n 802b526 <_dtoa_r+0x466>
802b51c: ed90 6b00 vldr d6, [r0]
802b520: 3201 adds r2, #1
802b522: ee27 7b06 vmul.f64 d7, d7, d6
802b526: 1049 asrs r1, r1, #1
802b528: 3008 adds r0, #8
802b52a: e755 b.n 802b3d8 <_dtoa_r+0x318>
802b52c: d022 beq.n 802b574 <_dtoa_r+0x4b4>
802b52e: f1c8 0100 rsb r1, r8, #0
802b532: 4a68 ldr r2, [pc, #416] @ (802b6d4 <_dtoa_r+0x614>)
802b534: f001 000f and.w r0, r1, #15
802b538: eb02 02c0 add.w r2, r2, r0, lsl #3
802b53c: ed92 7b00 vldr d7, [r2]
802b540: ee28 7b07 vmul.f64 d7, d8, d7
802b544: ed8d 7b02 vstr d7, [sp, #8]
802b548: 4863 ldr r0, [pc, #396] @ (802b6d8 <_dtoa_r+0x618>)
802b54a: 1109 asrs r1, r1, #4
802b54c: 2400 movs r4, #0
802b54e: 2202 movs r2, #2
802b550: b929 cbnz r1, 802b55e <_dtoa_r+0x49e>
802b552: 2c00 cmp r4, #0
802b554: f43f af49 beq.w 802b3ea <_dtoa_r+0x32a>
802b558: ed8d 7b02 vstr d7, [sp, #8]
802b55c: e745 b.n 802b3ea <_dtoa_r+0x32a>
802b55e: 07ce lsls r6, r1, #31
802b560: d505 bpl.n 802b56e <_dtoa_r+0x4ae>
802b562: ed90 6b00 vldr d6, [r0]
802b566: 3201 adds r2, #1
802b568: 2401 movs r4, #1
802b56a: ee27 7b06 vmul.f64 d7, d7, d6
802b56e: 1049 asrs r1, r1, #1
802b570: 3008 adds r0, #8
802b572: e7ed b.n 802b550 <_dtoa_r+0x490>
802b574: 2202 movs r2, #2
802b576: e738 b.n 802b3ea <_dtoa_r+0x32a>
802b578: f8cd 8010 str.w r8, [sp, #16]
802b57c: 4654 mov r4, sl
802b57e: e754 b.n 802b42a <_dtoa_r+0x36a>
802b580: 4a54 ldr r2, [pc, #336] @ (802b6d4 <_dtoa_r+0x614>)
802b582: eb02 02c4 add.w r2, r2, r4, lsl #3
802b586: ed12 4b02 vldr d4, [r2, #-8]
802b58a: 9a08 ldr r2, [sp, #32]
802b58c: ec41 0b17 vmov d7, r0, r1
802b590: 443c add r4, r7
802b592: b34a cbz r2, 802b5e8 <_dtoa_r+0x528>
802b594: eeb6 3b00 vmov.f64 d3, #96 @ 0x3f000000 0.5
802b598: eeb7 2b00 vmov.f64 d2, #112 @ 0x3f800000 1.0
802b59c: 463e mov r6, r7
802b59e: ee83 5b04 vdiv.f64 d5, d3, d4
802b5a2: eeb2 3b04 vmov.f64 d3, #36 @ 0x41200000 10.0
802b5a6: ee35 7b47 vsub.f64 d7, d5, d7
802b5aa: eefd 4bc6 vcvt.s32.f64 s9, d6
802b5ae: ee14 2a90 vmov r2, s9
802b5b2: eeb8 5be4 vcvt.f64.s32 d5, s9
802b5b6: 3230 adds r2, #48 @ 0x30
802b5b8: ee36 6b45 vsub.f64 d6, d6, d5
802b5bc: eeb4 6bc7 vcmpe.f64 d6, d7
802b5c0: eef1 fa10 vmrs APSR_nzcv, fpscr
802b5c4: f806 2b01 strb.w r2, [r6], #1
802b5c8: d438 bmi.n 802b63c <_dtoa_r+0x57c>
802b5ca: ee32 5b46 vsub.f64 d5, d2, d6
802b5ce: eeb4 5bc7 vcmpe.f64 d5, d7
802b5d2: eef1 fa10 vmrs APSR_nzcv, fpscr
802b5d6: d462 bmi.n 802b69e <_dtoa_r+0x5de>
802b5d8: 42a6 cmp r6, r4
802b5da: f43f af4d beq.w 802b478 <_dtoa_r+0x3b8>
802b5de: ee27 7b03 vmul.f64 d7, d7, d3
802b5e2: ee26 6b03 vmul.f64 d6, d6, d3
802b5e6: e7e0 b.n 802b5aa <_dtoa_r+0x4ea>
802b5e8: 4621 mov r1, r4
802b5ea: 463e mov r6, r7
802b5ec: ee27 7b04 vmul.f64 d7, d7, d4
802b5f0: eeb2 3b04 vmov.f64 d3, #36 @ 0x41200000 10.0
802b5f4: eefd 4bc6 vcvt.s32.f64 s9, d6
802b5f8: ee14 2a90 vmov r2, s9
802b5fc: 3230 adds r2, #48 @ 0x30
802b5fe: f806 2b01 strb.w r2, [r6], #1
802b602: 42a6 cmp r6, r4
802b604: eeb8 5be4 vcvt.f64.s32 d5, s9
802b608: ee36 6b45 vsub.f64 d6, d6, d5
802b60c: d119 bne.n 802b642 <_dtoa_r+0x582>
802b60e: eeb6 5b00 vmov.f64 d5, #96 @ 0x3f000000 0.5
802b612: ee37 4b05 vadd.f64 d4, d7, d5
802b616: eeb4 6bc4 vcmpe.f64 d6, d4
802b61a: eef1 fa10 vmrs APSR_nzcv, fpscr
802b61e: dc3e bgt.n 802b69e <_dtoa_r+0x5de>
802b620: ee35 5b47 vsub.f64 d5, d5, d7
802b624: eeb4 6bc5 vcmpe.f64 d6, d5
802b628: eef1 fa10 vmrs APSR_nzcv, fpscr
802b62c: f57f af24 bpl.w 802b478 <_dtoa_r+0x3b8>
802b630: 460e mov r6, r1
802b632: 3901 subs r1, #1
802b634: f816 3c01 ldrb.w r3, [r6, #-1]
802b638: 2b30 cmp r3, #48 @ 0x30
802b63a: d0f9 beq.n 802b630 <_dtoa_r+0x570>
802b63c: f8dd 8010 ldr.w r8, [sp, #16]
802b640: e758 b.n 802b4f4 <_dtoa_r+0x434>
802b642: ee26 6b03 vmul.f64 d6, d6, d3
802b646: e7d5 b.n 802b5f4 <_dtoa_r+0x534>
802b648: d10b bne.n 802b662 <_dtoa_r+0x5a2>
802b64a: eeb1 7b04 vmov.f64 d7, #20 @ 0x40a00000 5.0
802b64e: ee26 6b07 vmul.f64 d6, d6, d7
802b652: ed9d 7b02 vldr d7, [sp, #8]
802b656: eeb4 6bc7 vcmpe.f64 d6, d7
802b65a: eef1 fa10 vmrs APSR_nzcv, fpscr
802b65e: f2c0 8161 blt.w 802b924 <_dtoa_r+0x864>
802b662: 2400 movs r4, #0
802b664: 4625 mov r5, r4
802b666: 9b09 ldr r3, [sp, #36] @ 0x24
802b668: 43db mvns r3, r3
802b66a: 9304 str r3, [sp, #16]
802b66c: 463e mov r6, r7
802b66e: f04f 0800 mov.w r8, #0
802b672: 4621 mov r1, r4
802b674: 4648 mov r0, r9
802b676: f000 fe4f bl 802c318 <_Bfree>
802b67a: 2d00 cmp r5, #0
802b67c: d0de beq.n 802b63c <_dtoa_r+0x57c>
802b67e: f1b8 0f00 cmp.w r8, #0
802b682: d005 beq.n 802b690 <_dtoa_r+0x5d0>
802b684: 45a8 cmp r8, r5
802b686: d003 beq.n 802b690 <_dtoa_r+0x5d0>
802b688: 4641 mov r1, r8
802b68a: 4648 mov r0, r9
802b68c: f000 fe44 bl 802c318 <_Bfree>
802b690: 4629 mov r1, r5
802b692: 4648 mov r0, r9
802b694: f000 fe40 bl 802c318 <_Bfree>
802b698: e7d0 b.n 802b63c <_dtoa_r+0x57c>
802b69a: f8cd 8010 str.w r8, [sp, #16]
802b69e: 4633 mov r3, r6
802b6a0: 461e mov r6, r3
802b6a2: f813 2d01 ldrb.w r2, [r3, #-1]!
802b6a6: 2a39 cmp r2, #57 @ 0x39
802b6a8: d106 bne.n 802b6b8 <_dtoa_r+0x5f8>
802b6aa: 429f cmp r7, r3
802b6ac: d1f8 bne.n 802b6a0 <_dtoa_r+0x5e0>
802b6ae: 9a04 ldr r2, [sp, #16]
802b6b0: 3201 adds r2, #1
802b6b2: 9204 str r2, [sp, #16]
802b6b4: 2230 movs r2, #48 @ 0x30
802b6b6: 703a strb r2, [r7, #0]
802b6b8: 781a ldrb r2, [r3, #0]
802b6ba: 3201 adds r2, #1
802b6bc: 701a strb r2, [r3, #0]
802b6be: e7bd b.n 802b63c <_dtoa_r+0x57c>
802b6c0: ee27 7b04 vmul.f64 d7, d7, d4
802b6c4: eeb5 7b40 vcmp.f64 d7, #0.0
802b6c8: eef1 fa10 vmrs APSR_nzcv, fpscr
802b6cc: f47f aeef bne.w 802b4ae <_dtoa_r+0x3ee>
802b6d0: e710 b.n 802b4f4 <_dtoa_r+0x434>
802b6d2: bf00 nop
802b6d4: 08032280 .word 0x08032280
802b6d8: 08032258 .word 0x08032258
802b6dc: 9908 ldr r1, [sp, #32]
802b6de: 2900 cmp r1, #0
802b6e0: f000 80e3 beq.w 802b8aa <_dtoa_r+0x7ea>
802b6e4: 9907 ldr r1, [sp, #28]
802b6e6: 2901 cmp r1, #1
802b6e8: f300 80c8 bgt.w 802b87c <_dtoa_r+0x7bc>
802b6ec: 2d00 cmp r5, #0
802b6ee: f000 80c1 beq.w 802b874 <_dtoa_r+0x7b4>
802b6f2: f202 4233 addw r2, r2, #1075 @ 0x433
802b6f6: 9e05 ldr r6, [sp, #20]
802b6f8: 461c mov r4, r3
802b6fa: 9304 str r3, [sp, #16]
802b6fc: 9b05 ldr r3, [sp, #20]
802b6fe: 4413 add r3, r2
802b700: 9305 str r3, [sp, #20]
802b702: 9b06 ldr r3, [sp, #24]
802b704: 2101 movs r1, #1
802b706: 4413 add r3, r2
802b708: 4648 mov r0, r9
802b70a: 9306 str r3, [sp, #24]
802b70c: f000 ff02 bl 802c514 <__i2b>
802b710: 9b04 ldr r3, [sp, #16]
802b712: 4605 mov r5, r0
802b714: b166 cbz r6, 802b730 <_dtoa_r+0x670>
802b716: 9a06 ldr r2, [sp, #24]
802b718: 2a00 cmp r2, #0
802b71a: dd09 ble.n 802b730 <_dtoa_r+0x670>
802b71c: 42b2 cmp r2, r6
802b71e: 9905 ldr r1, [sp, #20]
802b720: bfa8 it ge
802b722: 4632 movge r2, r6
802b724: 1a89 subs r1, r1, r2
802b726: 9105 str r1, [sp, #20]
802b728: 9906 ldr r1, [sp, #24]
802b72a: 1ab6 subs r6, r6, r2
802b72c: 1a8a subs r2, r1, r2
802b72e: 9206 str r2, [sp, #24]
802b730: b1fb cbz r3, 802b772 <_dtoa_r+0x6b2>
802b732: 9a08 ldr r2, [sp, #32]
802b734: 2a00 cmp r2, #0
802b736: f000 80bc beq.w 802b8b2 <_dtoa_r+0x7f2>
802b73a: b19c cbz r4, 802b764 <_dtoa_r+0x6a4>
802b73c: 4629 mov r1, r5
802b73e: 4622 mov r2, r4
802b740: 4648 mov r0, r9
802b742: 930b str r3, [sp, #44] @ 0x2c
802b744: f000 ffa6 bl 802c694 <__pow5mult>
802b748: 9a01 ldr r2, [sp, #4]
802b74a: 4601 mov r1, r0
802b74c: 4605 mov r5, r0
802b74e: 4648 mov r0, r9
802b750: f000 fef6 bl 802c540 <__multiply>
802b754: 9901 ldr r1, [sp, #4]
802b756: 9004 str r0, [sp, #16]
802b758: 4648 mov r0, r9
802b75a: f000 fddd bl 802c318 <_Bfree>
802b75e: 9a04 ldr r2, [sp, #16]
802b760: 9b0b ldr r3, [sp, #44] @ 0x2c
802b762: 9201 str r2, [sp, #4]
802b764: 1b1a subs r2, r3, r4
802b766: d004 beq.n 802b772 <_dtoa_r+0x6b2>
802b768: 9901 ldr r1, [sp, #4]
802b76a: 4648 mov r0, r9
802b76c: f000 ff92 bl 802c694 <__pow5mult>
802b770: 9001 str r0, [sp, #4]
802b772: 2101 movs r1, #1
802b774: 4648 mov r0, r9
802b776: f000 fecd bl 802c514 <__i2b>
802b77a: 9b0a ldr r3, [sp, #40] @ 0x28
802b77c: 4604 mov r4, r0
802b77e: 2b00 cmp r3, #0
802b780: f000 81d0 beq.w 802bb24 <_dtoa_r+0xa64>
802b784: 461a mov r2, r3
802b786: 4601 mov r1, r0
802b788: 4648 mov r0, r9
802b78a: f000 ff83 bl 802c694 <__pow5mult>
802b78e: 9b07 ldr r3, [sp, #28]
802b790: 2b01 cmp r3, #1
802b792: 4604 mov r4, r0
802b794: f300 8095 bgt.w 802b8c2 <_dtoa_r+0x802>
802b798: 9b02 ldr r3, [sp, #8]
802b79a: 2b00 cmp r3, #0
802b79c: f040 808b bne.w 802b8b6 <_dtoa_r+0x7f6>
802b7a0: 9b03 ldr r3, [sp, #12]
802b7a2: f3c3 0213 ubfx r2, r3, #0, #20
802b7a6: 2a00 cmp r2, #0
802b7a8: f040 8087 bne.w 802b8ba <_dtoa_r+0x7fa>
802b7ac: f023 4200 bic.w r2, r3, #2147483648 @ 0x80000000
802b7b0: 0d12 lsrs r2, r2, #20
802b7b2: 0512 lsls r2, r2, #20
802b7b4: 2a00 cmp r2, #0
802b7b6: f000 8082 beq.w 802b8be <_dtoa_r+0x7fe>
802b7ba: 9b05 ldr r3, [sp, #20]
802b7bc: 3301 adds r3, #1
802b7be: 9305 str r3, [sp, #20]
802b7c0: 9b06 ldr r3, [sp, #24]
802b7c2: 3301 adds r3, #1
802b7c4: 9306 str r3, [sp, #24]
802b7c6: 2301 movs r3, #1
802b7c8: 930b str r3, [sp, #44] @ 0x2c
802b7ca: 9b0a ldr r3, [sp, #40] @ 0x28
802b7cc: 2b00 cmp r3, #0
802b7ce: f000 81af beq.w 802bb30 <_dtoa_r+0xa70>
802b7d2: 6922 ldr r2, [r4, #16]
802b7d4: eb04 0282 add.w r2, r4, r2, lsl #2
802b7d8: 6910 ldr r0, [r2, #16]
802b7da: f000 fe4f bl 802c47c <__hi0bits>
802b7de: f1c0 0020 rsb r0, r0, #32
802b7e2: 9b06 ldr r3, [sp, #24]
802b7e4: 4418 add r0, r3
802b7e6: f010 001f ands.w r0, r0, #31
802b7ea: d076 beq.n 802b8da <_dtoa_r+0x81a>
802b7ec: f1c0 0220 rsb r2, r0, #32
802b7f0: 2a04 cmp r2, #4
802b7f2: dd69 ble.n 802b8c8 <_dtoa_r+0x808>
802b7f4: 9b05 ldr r3, [sp, #20]
802b7f6: f1c0 001c rsb r0, r0, #28
802b7fa: 4403 add r3, r0
802b7fc: 9305 str r3, [sp, #20]
802b7fe: 9b06 ldr r3, [sp, #24]
802b800: 4406 add r6, r0
802b802: 4403 add r3, r0
802b804: 9306 str r3, [sp, #24]
802b806: 9b05 ldr r3, [sp, #20]
802b808: 2b00 cmp r3, #0
802b80a: dd05 ble.n 802b818 <_dtoa_r+0x758>
802b80c: 9901 ldr r1, [sp, #4]
802b80e: 461a mov r2, r3
802b810: 4648 mov r0, r9
802b812: f000 ff99 bl 802c748 <__lshift>
802b816: 9001 str r0, [sp, #4]
802b818: 9b06 ldr r3, [sp, #24]
802b81a: 2b00 cmp r3, #0
802b81c: dd05 ble.n 802b82a <_dtoa_r+0x76a>
802b81e: 4621 mov r1, r4
802b820: 461a mov r2, r3
802b822: 4648 mov r0, r9
802b824: f000 ff90 bl 802c748 <__lshift>
802b828: 4604 mov r4, r0
802b82a: 9b0c ldr r3, [sp, #48] @ 0x30
802b82c: 2b00 cmp r3, #0
802b82e: d056 beq.n 802b8de <_dtoa_r+0x81e>
802b830: 9801 ldr r0, [sp, #4]
802b832: 4621 mov r1, r4
802b834: f000 fff4 bl 802c820 <__mcmp>
802b838: 2800 cmp r0, #0
802b83a: da50 bge.n 802b8de <_dtoa_r+0x81e>
802b83c: f108 33ff add.w r3, r8, #4294967295 @ 0xffffffff
802b840: 9304 str r3, [sp, #16]
802b842: 9901 ldr r1, [sp, #4]
802b844: 2300 movs r3, #0
802b846: 220a movs r2, #10
802b848: 4648 mov r0, r9
802b84a: f000 fd87 bl 802c35c <__multadd>
802b84e: 9b08 ldr r3, [sp, #32]
802b850: 9001 str r0, [sp, #4]
802b852: 2b00 cmp r3, #0
802b854: f000 816e beq.w 802bb34 <_dtoa_r+0xa74>
802b858: 4629 mov r1, r5
802b85a: 2300 movs r3, #0
802b85c: 220a movs r2, #10
802b85e: 4648 mov r0, r9
802b860: f000 fd7c bl 802c35c <__multadd>
802b864: f1bb 0f00 cmp.w fp, #0
802b868: 4605 mov r5, r0
802b86a: dc64 bgt.n 802b936 <_dtoa_r+0x876>
802b86c: 9b07 ldr r3, [sp, #28]
802b86e: 2b02 cmp r3, #2
802b870: dc3e bgt.n 802b8f0 <_dtoa_r+0x830>
802b872: e060 b.n 802b936 <_dtoa_r+0x876>
802b874: 9a0e ldr r2, [sp, #56] @ 0x38
802b876: f1c2 0236 rsb r2, r2, #54 @ 0x36
802b87a: e73c b.n 802b6f6 <_dtoa_r+0x636>
802b87c: f10a 34ff add.w r4, sl, #4294967295 @ 0xffffffff
802b880: 42a3 cmp r3, r4
802b882: bfbf itttt lt
802b884: 1ae2 sublt r2, r4, r3
802b886: 9b0a ldrlt r3, [sp, #40] @ 0x28
802b888: 189b addlt r3, r3, r2
802b88a: 930a strlt r3, [sp, #40] @ 0x28
802b88c: bfae itee ge
802b88e: 1b1c subge r4, r3, r4
802b890: 4623 movlt r3, r4
802b892: 2400 movlt r4, #0
802b894: f1ba 0f00 cmp.w sl, #0
802b898: bfb5 itete lt
802b89a: 9a05 ldrlt r2, [sp, #20]
802b89c: 9e05 ldrge r6, [sp, #20]
802b89e: eba2 060a sublt.w r6, r2, sl
802b8a2: 4652 movge r2, sl
802b8a4: bfb8 it lt
802b8a6: 2200 movlt r2, #0
802b8a8: e727 b.n 802b6fa <_dtoa_r+0x63a>
802b8aa: 9e05 ldr r6, [sp, #20]
802b8ac: 9d08 ldr r5, [sp, #32]
802b8ae: 461c mov r4, r3
802b8b0: e730 b.n 802b714 <_dtoa_r+0x654>
802b8b2: 461a mov r2, r3
802b8b4: e758 b.n 802b768 <_dtoa_r+0x6a8>
802b8b6: 2300 movs r3, #0
802b8b8: e786 b.n 802b7c8 <_dtoa_r+0x708>
802b8ba: 9b02 ldr r3, [sp, #8]
802b8bc: e784 b.n 802b7c8 <_dtoa_r+0x708>
802b8be: 920b str r2, [sp, #44] @ 0x2c
802b8c0: e783 b.n 802b7ca <_dtoa_r+0x70a>
802b8c2: 2300 movs r3, #0
802b8c4: 930b str r3, [sp, #44] @ 0x2c
802b8c6: e784 b.n 802b7d2 <_dtoa_r+0x712>
802b8c8: d09d beq.n 802b806 <_dtoa_r+0x746>
802b8ca: 9b05 ldr r3, [sp, #20]
802b8cc: 321c adds r2, #28
802b8ce: 4413 add r3, r2
802b8d0: 9305 str r3, [sp, #20]
802b8d2: 9b06 ldr r3, [sp, #24]
802b8d4: 4416 add r6, r2
802b8d6: 4413 add r3, r2
802b8d8: e794 b.n 802b804 <_dtoa_r+0x744>
802b8da: 4602 mov r2, r0
802b8dc: e7f5 b.n 802b8ca <_dtoa_r+0x80a>
802b8de: f1ba 0f00 cmp.w sl, #0
802b8e2: f8cd 8010 str.w r8, [sp, #16]
802b8e6: 46d3 mov fp, sl
802b8e8: dc21 bgt.n 802b92e <_dtoa_r+0x86e>
802b8ea: 9b07 ldr r3, [sp, #28]
802b8ec: 2b02 cmp r3, #2
802b8ee: dd1e ble.n 802b92e <_dtoa_r+0x86e>
802b8f0: f1bb 0f00 cmp.w fp, #0
802b8f4: f47f aeb7 bne.w 802b666 <_dtoa_r+0x5a6>
802b8f8: 4621 mov r1, r4
802b8fa: 465b mov r3, fp
802b8fc: 2205 movs r2, #5
802b8fe: 4648 mov r0, r9
802b900: f000 fd2c bl 802c35c <__multadd>
802b904: 4601 mov r1, r0
802b906: 4604 mov r4, r0
802b908: 9801 ldr r0, [sp, #4]
802b90a: f000 ff89 bl 802c820 <__mcmp>
802b90e: 2800 cmp r0, #0
802b910: f77f aea9 ble.w 802b666 <_dtoa_r+0x5a6>
802b914: 463e mov r6, r7
802b916: 2331 movs r3, #49 @ 0x31
802b918: f806 3b01 strb.w r3, [r6], #1
802b91c: 9b04 ldr r3, [sp, #16]
802b91e: 3301 adds r3, #1
802b920: 9304 str r3, [sp, #16]
802b922: e6a4 b.n 802b66e <_dtoa_r+0x5ae>
802b924: f8cd 8010 str.w r8, [sp, #16]
802b928: 4654 mov r4, sl
802b92a: 4625 mov r5, r4
802b92c: e7f2 b.n 802b914 <_dtoa_r+0x854>
802b92e: 9b08 ldr r3, [sp, #32]
802b930: 2b00 cmp r3, #0
802b932: f000 8103 beq.w 802bb3c <_dtoa_r+0xa7c>
802b936: 2e00 cmp r6, #0
802b938: dd05 ble.n 802b946 <_dtoa_r+0x886>
802b93a: 4629 mov r1, r5
802b93c: 4632 mov r2, r6
802b93e: 4648 mov r0, r9
802b940: f000 ff02 bl 802c748 <__lshift>
802b944: 4605 mov r5, r0
802b946: 9b0b ldr r3, [sp, #44] @ 0x2c
802b948: 2b00 cmp r3, #0
802b94a: d058 beq.n 802b9fe <_dtoa_r+0x93e>
802b94c: 6869 ldr r1, [r5, #4]
802b94e: 4648 mov r0, r9
802b950: f000 fca2 bl 802c298 <_Balloc>
802b954: 4606 mov r6, r0
802b956: b928 cbnz r0, 802b964 <_dtoa_r+0x8a4>
802b958: 4b82 ldr r3, [pc, #520] @ (802bb64 <_dtoa_r+0xaa4>)
802b95a: 4602 mov r2, r0
802b95c: f240 21ef movw r1, #751 @ 0x2ef
802b960: f7ff bbc7 b.w 802b0f2 <_dtoa_r+0x32>
802b964: 692a ldr r2, [r5, #16]
802b966: 3202 adds r2, #2
802b968: 0092 lsls r2, r2, #2
802b96a: f105 010c add.w r1, r5, #12
802b96e: 300c adds r0, #12
802b970: f7ff fae5 bl 802af3e <memcpy>
802b974: 2201 movs r2, #1
802b976: 4631 mov r1, r6
802b978: 4648 mov r0, r9
802b97a: f000 fee5 bl 802c748 <__lshift>
802b97e: 1c7b adds r3, r7, #1
802b980: 9305 str r3, [sp, #20]
802b982: eb07 030b add.w r3, r7, fp
802b986: 9309 str r3, [sp, #36] @ 0x24
802b988: 9b02 ldr r3, [sp, #8]
802b98a: f003 0301 and.w r3, r3, #1
802b98e: 46a8 mov r8, r5
802b990: 9308 str r3, [sp, #32]
802b992: 4605 mov r5, r0
802b994: 9b05 ldr r3, [sp, #20]
802b996: 9801 ldr r0, [sp, #4]
802b998: 4621 mov r1, r4
802b99a: f103 3bff add.w fp, r3, #4294967295 @ 0xffffffff
802b99e: f7ff fb05 bl 802afac <quorem>
802b9a2: 4641 mov r1, r8
802b9a4: 9002 str r0, [sp, #8]
802b9a6: f100 0a30 add.w sl, r0, #48 @ 0x30
802b9aa: 9801 ldr r0, [sp, #4]
802b9ac: f000 ff38 bl 802c820 <__mcmp>
802b9b0: 462a mov r2, r5
802b9b2: 9006 str r0, [sp, #24]
802b9b4: 4621 mov r1, r4
802b9b6: 4648 mov r0, r9
802b9b8: f000 ff4e bl 802c858 <__mdiff>
802b9bc: 68c2 ldr r2, [r0, #12]
802b9be: 4606 mov r6, r0
802b9c0: b9fa cbnz r2, 802ba02 <_dtoa_r+0x942>
802b9c2: 4601 mov r1, r0
802b9c4: 9801 ldr r0, [sp, #4]
802b9c6: f000 ff2b bl 802c820 <__mcmp>
802b9ca: 4602 mov r2, r0
802b9cc: 4631 mov r1, r6
802b9ce: 4648 mov r0, r9
802b9d0: 920a str r2, [sp, #40] @ 0x28
802b9d2: f000 fca1 bl 802c318 <_Bfree>
802b9d6: 9b07 ldr r3, [sp, #28]
802b9d8: 9a0a ldr r2, [sp, #40] @ 0x28
802b9da: 9e05 ldr r6, [sp, #20]
802b9dc: ea43 0102 orr.w r1, r3, r2
802b9e0: 9b08 ldr r3, [sp, #32]
802b9e2: 4319 orrs r1, r3
802b9e4: d10f bne.n 802ba06 <_dtoa_r+0x946>
802b9e6: f1ba 0f39 cmp.w sl, #57 @ 0x39
802b9ea: d028 beq.n 802ba3e <_dtoa_r+0x97e>
802b9ec: 9b06 ldr r3, [sp, #24]
802b9ee: 2b00 cmp r3, #0
802b9f0: dd02 ble.n 802b9f8 <_dtoa_r+0x938>
802b9f2: 9b02 ldr r3, [sp, #8]
802b9f4: f103 0a31 add.w sl, r3, #49 @ 0x31
802b9f8: f88b a000 strb.w sl, [fp]
802b9fc: e639 b.n 802b672 <_dtoa_r+0x5b2>
802b9fe: 4628 mov r0, r5
802ba00: e7bd b.n 802b97e <_dtoa_r+0x8be>
802ba02: 2201 movs r2, #1
802ba04: e7e2 b.n 802b9cc <_dtoa_r+0x90c>
802ba06: 9b06 ldr r3, [sp, #24]
802ba08: 2b00 cmp r3, #0
802ba0a: db04 blt.n 802ba16 <_dtoa_r+0x956>
802ba0c: 9907 ldr r1, [sp, #28]
802ba0e: 430b orrs r3, r1
802ba10: 9908 ldr r1, [sp, #32]
802ba12: 430b orrs r3, r1
802ba14: d120 bne.n 802ba58 <_dtoa_r+0x998>
802ba16: 2a00 cmp r2, #0
802ba18: ddee ble.n 802b9f8 <_dtoa_r+0x938>
802ba1a: 9901 ldr r1, [sp, #4]
802ba1c: 2201 movs r2, #1
802ba1e: 4648 mov r0, r9
802ba20: f000 fe92 bl 802c748 <__lshift>
802ba24: 4621 mov r1, r4
802ba26: 9001 str r0, [sp, #4]
802ba28: f000 fefa bl 802c820 <__mcmp>
802ba2c: 2800 cmp r0, #0
802ba2e: dc03 bgt.n 802ba38 <_dtoa_r+0x978>
802ba30: d1e2 bne.n 802b9f8 <_dtoa_r+0x938>
802ba32: f01a 0f01 tst.w sl, #1
802ba36: d0df beq.n 802b9f8 <_dtoa_r+0x938>
802ba38: f1ba 0f39 cmp.w sl, #57 @ 0x39
802ba3c: d1d9 bne.n 802b9f2 <_dtoa_r+0x932>
802ba3e: 2339 movs r3, #57 @ 0x39
802ba40: f88b 3000 strb.w r3, [fp]
802ba44: 4633 mov r3, r6
802ba46: 461e mov r6, r3
802ba48: 3b01 subs r3, #1
802ba4a: f816 2c01 ldrb.w r2, [r6, #-1]
802ba4e: 2a39 cmp r2, #57 @ 0x39
802ba50: d053 beq.n 802bafa <_dtoa_r+0xa3a>
802ba52: 3201 adds r2, #1
802ba54: 701a strb r2, [r3, #0]
802ba56: e60c b.n 802b672 <_dtoa_r+0x5b2>
802ba58: 2a00 cmp r2, #0
802ba5a: dd07 ble.n 802ba6c <_dtoa_r+0x9ac>
802ba5c: f1ba 0f39 cmp.w sl, #57 @ 0x39
802ba60: d0ed beq.n 802ba3e <_dtoa_r+0x97e>
802ba62: f10a 0301 add.w r3, sl, #1
802ba66: f88b 3000 strb.w r3, [fp]
802ba6a: e602 b.n 802b672 <_dtoa_r+0x5b2>
802ba6c: 9b05 ldr r3, [sp, #20]
802ba6e: 9a05 ldr r2, [sp, #20]
802ba70: f803 ac01 strb.w sl, [r3, #-1]
802ba74: 9b09 ldr r3, [sp, #36] @ 0x24
802ba76: 4293 cmp r3, r2
802ba78: d029 beq.n 802bace <_dtoa_r+0xa0e>
802ba7a: 9901 ldr r1, [sp, #4]
802ba7c: 2300 movs r3, #0
802ba7e: 220a movs r2, #10
802ba80: 4648 mov r0, r9
802ba82: f000 fc6b bl 802c35c <__multadd>
802ba86: 45a8 cmp r8, r5
802ba88: 9001 str r0, [sp, #4]
802ba8a: f04f 0300 mov.w r3, #0
802ba8e: f04f 020a mov.w r2, #10
802ba92: 4641 mov r1, r8
802ba94: 4648 mov r0, r9
802ba96: d107 bne.n 802baa8 <_dtoa_r+0x9e8>
802ba98: f000 fc60 bl 802c35c <__multadd>
802ba9c: 4680 mov r8, r0
802ba9e: 4605 mov r5, r0
802baa0: 9b05 ldr r3, [sp, #20]
802baa2: 3301 adds r3, #1
802baa4: 9305 str r3, [sp, #20]
802baa6: e775 b.n 802b994 <_dtoa_r+0x8d4>
802baa8: f000 fc58 bl 802c35c <__multadd>
802baac: 4629 mov r1, r5
802baae: 4680 mov r8, r0
802bab0: 2300 movs r3, #0
802bab2: 220a movs r2, #10
802bab4: 4648 mov r0, r9
802bab6: f000 fc51 bl 802c35c <__multadd>
802baba: 4605 mov r5, r0
802babc: e7f0 b.n 802baa0 <_dtoa_r+0x9e0>
802babe: f1bb 0f00 cmp.w fp, #0
802bac2: bfcc ite gt
802bac4: 465e movgt r6, fp
802bac6: 2601 movle r6, #1
802bac8: 443e add r6, r7
802baca: f04f 0800 mov.w r8, #0
802bace: 9901 ldr r1, [sp, #4]
802bad0: 2201 movs r2, #1
802bad2: 4648 mov r0, r9
802bad4: f000 fe38 bl 802c748 <__lshift>
802bad8: 4621 mov r1, r4
802bada: 9001 str r0, [sp, #4]
802badc: f000 fea0 bl 802c820 <__mcmp>
802bae0: 2800 cmp r0, #0
802bae2: dcaf bgt.n 802ba44 <_dtoa_r+0x984>
802bae4: d102 bne.n 802baec <_dtoa_r+0xa2c>
802bae6: f01a 0f01 tst.w sl, #1
802baea: d1ab bne.n 802ba44 <_dtoa_r+0x984>
802baec: 4633 mov r3, r6
802baee: 461e mov r6, r3
802baf0: f813 2d01 ldrb.w r2, [r3, #-1]!
802baf4: 2a30 cmp r2, #48 @ 0x30
802baf6: d0fa beq.n 802baee <_dtoa_r+0xa2e>
802baf8: e5bb b.n 802b672 <_dtoa_r+0x5b2>
802bafa: 429f cmp r7, r3
802bafc: d1a3 bne.n 802ba46 <_dtoa_r+0x986>
802bafe: 9b04 ldr r3, [sp, #16]
802bb00: 3301 adds r3, #1
802bb02: 9304 str r3, [sp, #16]
802bb04: 2331 movs r3, #49 @ 0x31
802bb06: 703b strb r3, [r7, #0]
802bb08: e5b3 b.n 802b672 <_dtoa_r+0x5b2>
802bb0a: 9b1d ldr r3, [sp, #116] @ 0x74
802bb0c: 4f16 ldr r7, [pc, #88] @ (802bb68 <_dtoa_r+0xaa8>)
802bb0e: b11b cbz r3, 802bb18 <_dtoa_r+0xa58>
802bb10: f107 0308 add.w r3, r7, #8
802bb14: 9a1d ldr r2, [sp, #116] @ 0x74
802bb16: 6013 str r3, [r2, #0]
802bb18: 4638 mov r0, r7
802bb1a: b011 add sp, #68 @ 0x44
802bb1c: ecbd 8b02 vpop {d8}
802bb20: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802bb24: 9b07 ldr r3, [sp, #28]
802bb26: 2b01 cmp r3, #1
802bb28: f77f ae36 ble.w 802b798 <_dtoa_r+0x6d8>
802bb2c: 9b0a ldr r3, [sp, #40] @ 0x28
802bb2e: 930b str r3, [sp, #44] @ 0x2c
802bb30: 2001 movs r0, #1
802bb32: e656 b.n 802b7e2 <_dtoa_r+0x722>
802bb34: f1bb 0f00 cmp.w fp, #0
802bb38: f77f aed7 ble.w 802b8ea <_dtoa_r+0x82a>
802bb3c: 463e mov r6, r7
802bb3e: 9801 ldr r0, [sp, #4]
802bb40: 4621 mov r1, r4
802bb42: f7ff fa33 bl 802afac <quorem>
802bb46: f100 0a30 add.w sl, r0, #48 @ 0x30
802bb4a: f806 ab01 strb.w sl, [r6], #1
802bb4e: 1bf2 subs r2, r6, r7
802bb50: 4593 cmp fp, r2
802bb52: ddb4 ble.n 802babe <_dtoa_r+0x9fe>
802bb54: 9901 ldr r1, [sp, #4]
802bb56: 2300 movs r3, #0
802bb58: 220a movs r2, #10
802bb5a: 4648 mov r0, r9
802bb5c: f000 fbfe bl 802c35c <__multadd>
802bb60: 9001 str r0, [sp, #4]
802bb62: e7ec b.n 802bb3e <_dtoa_r+0xa7e>
802bb64: 0803217e .word 0x0803217e
802bb68: 08032119 .word 0x08032119
0802bb6c <_free_r>:
802bb6c: b538 push {r3, r4, r5, lr}
802bb6e: 4605 mov r5, r0
802bb70: 2900 cmp r1, #0
802bb72: d041 beq.n 802bbf8 <_free_r+0x8c>
802bb74: f851 3c04 ldr.w r3, [r1, #-4]
802bb78: 1f0c subs r4, r1, #4
802bb7a: 2b00 cmp r3, #0
802bb7c: bfb8 it lt
802bb7e: 18e4 addlt r4, r4, r3
802bb80: f7fd fc1e bl 80293c0 <__malloc_lock>
802bb84: 4a1d ldr r2, [pc, #116] @ (802bbfc <_free_r+0x90>)
802bb86: 6813 ldr r3, [r2, #0]
802bb88: b933 cbnz r3, 802bb98 <_free_r+0x2c>
802bb8a: 6063 str r3, [r4, #4]
802bb8c: 6014 str r4, [r2, #0]
802bb8e: 4628 mov r0, r5
802bb90: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
802bb94: f7fd bc1a b.w 80293cc <__malloc_unlock>
802bb98: 42a3 cmp r3, r4
802bb9a: d908 bls.n 802bbae <_free_r+0x42>
802bb9c: 6820 ldr r0, [r4, #0]
802bb9e: 1821 adds r1, r4, r0
802bba0: 428b cmp r3, r1
802bba2: bf01 itttt eq
802bba4: 6819 ldreq r1, [r3, #0]
802bba6: 685b ldreq r3, [r3, #4]
802bba8: 1809 addeq r1, r1, r0
802bbaa: 6021 streq r1, [r4, #0]
802bbac: e7ed b.n 802bb8a <_free_r+0x1e>
802bbae: 461a mov r2, r3
802bbb0: 685b ldr r3, [r3, #4]
802bbb2: b10b cbz r3, 802bbb8 <_free_r+0x4c>
802bbb4: 42a3 cmp r3, r4
802bbb6: d9fa bls.n 802bbae <_free_r+0x42>
802bbb8: 6811 ldr r1, [r2, #0]
802bbba: 1850 adds r0, r2, r1
802bbbc: 42a0 cmp r0, r4
802bbbe: d10b bne.n 802bbd8 <_free_r+0x6c>
802bbc0: 6820 ldr r0, [r4, #0]
802bbc2: 4401 add r1, r0
802bbc4: 1850 adds r0, r2, r1
802bbc6: 4283 cmp r3, r0
802bbc8: 6011 str r1, [r2, #0]
802bbca: d1e0 bne.n 802bb8e <_free_r+0x22>
802bbcc: 6818 ldr r0, [r3, #0]
802bbce: 685b ldr r3, [r3, #4]
802bbd0: 6053 str r3, [r2, #4]
802bbd2: 4408 add r0, r1
802bbd4: 6010 str r0, [r2, #0]
802bbd6: e7da b.n 802bb8e <_free_r+0x22>
802bbd8: d902 bls.n 802bbe0 <_free_r+0x74>
802bbda: 230c movs r3, #12
802bbdc: 602b str r3, [r5, #0]
802bbde: e7d6 b.n 802bb8e <_free_r+0x22>
802bbe0: 6820 ldr r0, [r4, #0]
802bbe2: 1821 adds r1, r4, r0
802bbe4: 428b cmp r3, r1
802bbe6: bf04 itt eq
802bbe8: 6819 ldreq r1, [r3, #0]
802bbea: 685b ldreq r3, [r3, #4]
802bbec: 6063 str r3, [r4, #4]
802bbee: bf04 itt eq
802bbf0: 1809 addeq r1, r1, r0
802bbf2: 6021 streq r1, [r4, #0]
802bbf4: 6054 str r4, [r2, #4]
802bbf6: e7ca b.n 802bb8e <_free_r+0x22>
802bbf8: bd38 pop {r3, r4, r5, pc}
802bbfa: bf00 nop
802bbfc: 2402b160 .word 0x2402b160
0802bc00 <rshift>:
802bc00: 6903 ldr r3, [r0, #16]
802bc02: ebb3 1f61 cmp.w r3, r1, asr #5
802bc06: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
802bc0a: ea4f 1261 mov.w r2, r1, asr #5
802bc0e: f100 0414 add.w r4, r0, #20
802bc12: dd45 ble.n 802bca0 <rshift+0xa0>
802bc14: f011 011f ands.w r1, r1, #31
802bc18: eb04 0683 add.w r6, r4, r3, lsl #2
802bc1c: eb04 0582 add.w r5, r4, r2, lsl #2
802bc20: d10c bne.n 802bc3c <rshift+0x3c>
802bc22: f100 0710 add.w r7, r0, #16
802bc26: 4629 mov r1, r5
802bc28: 42b1 cmp r1, r6
802bc2a: d334 bcc.n 802bc96 <rshift+0x96>
802bc2c: 1a9b subs r3, r3, r2
802bc2e: 009b lsls r3, r3, #2
802bc30: 1eea subs r2, r5, #3
802bc32: 4296 cmp r6, r2
802bc34: bf38 it cc
802bc36: 2300 movcc r3, #0
802bc38: 4423 add r3, r4
802bc3a: e015 b.n 802bc68 <rshift+0x68>
802bc3c: f854 7022 ldr.w r7, [r4, r2, lsl #2]
802bc40: f1c1 0820 rsb r8, r1, #32
802bc44: 40cf lsrs r7, r1
802bc46: f105 0e04 add.w lr, r5, #4
802bc4a: 46a1 mov r9, r4
802bc4c: 4576 cmp r6, lr
802bc4e: 46f4 mov ip, lr
802bc50: d815 bhi.n 802bc7e <rshift+0x7e>
802bc52: 1a9a subs r2, r3, r2
802bc54: 0092 lsls r2, r2, #2
802bc56: 3a04 subs r2, #4
802bc58: 3501 adds r5, #1
802bc5a: 42ae cmp r6, r5
802bc5c: bf38 it cc
802bc5e: 2200 movcc r2, #0
802bc60: 18a3 adds r3, r4, r2
802bc62: 50a7 str r7, [r4, r2]
802bc64: b107 cbz r7, 802bc68 <rshift+0x68>
802bc66: 3304 adds r3, #4
802bc68: 1b1a subs r2, r3, r4
802bc6a: 42a3 cmp r3, r4
802bc6c: ea4f 02a2 mov.w r2, r2, asr #2
802bc70: bf08 it eq
802bc72: 2300 moveq r3, #0
802bc74: 6102 str r2, [r0, #16]
802bc76: bf08 it eq
802bc78: 6143 streq r3, [r0, #20]
802bc7a: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
802bc7e: f8dc c000 ldr.w ip, [ip]
802bc82: fa0c fc08 lsl.w ip, ip, r8
802bc86: ea4c 0707 orr.w r7, ip, r7
802bc8a: f849 7b04 str.w r7, [r9], #4
802bc8e: f85e 7b04 ldr.w r7, [lr], #4
802bc92: 40cf lsrs r7, r1
802bc94: e7da b.n 802bc4c <rshift+0x4c>
802bc96: f851 cb04 ldr.w ip, [r1], #4
802bc9a: f847 cf04 str.w ip, [r7, #4]!
802bc9e: e7c3 b.n 802bc28 <rshift+0x28>
802bca0: 4623 mov r3, r4
802bca2: e7e1 b.n 802bc68 <rshift+0x68>
0802bca4 <__hexdig_fun>:
802bca4: f1a0 0330 sub.w r3, r0, #48 @ 0x30
802bca8: 2b09 cmp r3, #9
802bcaa: d802 bhi.n 802bcb2 <__hexdig_fun+0xe>
802bcac: 3820 subs r0, #32
802bcae: b2c0 uxtb r0, r0
802bcb0: 4770 bx lr
802bcb2: f1a0 0361 sub.w r3, r0, #97 @ 0x61
802bcb6: 2b05 cmp r3, #5
802bcb8: d801 bhi.n 802bcbe <__hexdig_fun+0x1a>
802bcba: 3847 subs r0, #71 @ 0x47
802bcbc: e7f7 b.n 802bcae <__hexdig_fun+0xa>
802bcbe: f1a0 0341 sub.w r3, r0, #65 @ 0x41
802bcc2: 2b05 cmp r3, #5
802bcc4: d801 bhi.n 802bcca <__hexdig_fun+0x26>
802bcc6: 3827 subs r0, #39 @ 0x27
802bcc8: e7f1 b.n 802bcae <__hexdig_fun+0xa>
802bcca: 2000 movs r0, #0
802bccc: 4770 bx lr
...
0802bcd0 <__gethex>:
802bcd0: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
802bcd4: b085 sub sp, #20
802bcd6: 468a mov sl, r1
802bcd8: 9302 str r3, [sp, #8]
802bcda: 680b ldr r3, [r1, #0]
802bcdc: 9001 str r0, [sp, #4]
802bcde: 4690 mov r8, r2
802bce0: 1c9c adds r4, r3, #2
802bce2: 46a1 mov r9, r4
802bce4: f814 0b01 ldrb.w r0, [r4], #1
802bce8: 2830 cmp r0, #48 @ 0x30
802bcea: d0fa beq.n 802bce2 <__gethex+0x12>
802bcec: eba9 0303 sub.w r3, r9, r3
802bcf0: f1a3 0b02 sub.w fp, r3, #2
802bcf4: f7ff ffd6 bl 802bca4 <__hexdig_fun>
802bcf8: 4605 mov r5, r0
802bcfa: 2800 cmp r0, #0
802bcfc: d168 bne.n 802bdd0 <__gethex+0x100>
802bcfe: 49a0 ldr r1, [pc, #640] @ (802bf80 <__gethex+0x2b0>)
802bd00: 2201 movs r2, #1
802bd02: 4648 mov r0, r9
802bd04: f7ff f82c bl 802ad60 <strncmp>
802bd08: 4607 mov r7, r0
802bd0a: 2800 cmp r0, #0
802bd0c: d167 bne.n 802bdde <__gethex+0x10e>
802bd0e: f899 0001 ldrb.w r0, [r9, #1]
802bd12: 4626 mov r6, r4
802bd14: f7ff ffc6 bl 802bca4 <__hexdig_fun>
802bd18: 2800 cmp r0, #0
802bd1a: d062 beq.n 802bde2 <__gethex+0x112>
802bd1c: 4623 mov r3, r4
802bd1e: 7818 ldrb r0, [r3, #0]
802bd20: 2830 cmp r0, #48 @ 0x30
802bd22: 4699 mov r9, r3
802bd24: f103 0301 add.w r3, r3, #1
802bd28: d0f9 beq.n 802bd1e <__gethex+0x4e>
802bd2a: f7ff ffbb bl 802bca4 <__hexdig_fun>
802bd2e: fab0 f580 clz r5, r0
802bd32: 096d lsrs r5, r5, #5
802bd34: f04f 0b01 mov.w fp, #1
802bd38: 464a mov r2, r9
802bd3a: 4616 mov r6, r2
802bd3c: 3201 adds r2, #1
802bd3e: 7830 ldrb r0, [r6, #0]
802bd40: f7ff ffb0 bl 802bca4 <__hexdig_fun>
802bd44: 2800 cmp r0, #0
802bd46: d1f8 bne.n 802bd3a <__gethex+0x6a>
802bd48: 498d ldr r1, [pc, #564] @ (802bf80 <__gethex+0x2b0>)
802bd4a: 2201 movs r2, #1
802bd4c: 4630 mov r0, r6
802bd4e: f7ff f807 bl 802ad60 <strncmp>
802bd52: 2800 cmp r0, #0
802bd54: d13f bne.n 802bdd6 <__gethex+0x106>
802bd56: b944 cbnz r4, 802bd6a <__gethex+0x9a>
802bd58: 1c74 adds r4, r6, #1
802bd5a: 4622 mov r2, r4
802bd5c: 4616 mov r6, r2
802bd5e: 3201 adds r2, #1
802bd60: 7830 ldrb r0, [r6, #0]
802bd62: f7ff ff9f bl 802bca4 <__hexdig_fun>
802bd66: 2800 cmp r0, #0
802bd68: d1f8 bne.n 802bd5c <__gethex+0x8c>
802bd6a: 1ba4 subs r4, r4, r6
802bd6c: 00a7 lsls r7, r4, #2
802bd6e: 7833 ldrb r3, [r6, #0]
802bd70: f003 03df and.w r3, r3, #223 @ 0xdf
802bd74: 2b50 cmp r3, #80 @ 0x50
802bd76: d13e bne.n 802bdf6 <__gethex+0x126>
802bd78: 7873 ldrb r3, [r6, #1]
802bd7a: 2b2b cmp r3, #43 @ 0x2b
802bd7c: d033 beq.n 802bde6 <__gethex+0x116>
802bd7e: 2b2d cmp r3, #45 @ 0x2d
802bd80: d034 beq.n 802bdec <__gethex+0x11c>
802bd82: 1c71 adds r1, r6, #1
802bd84: 2400 movs r4, #0
802bd86: 7808 ldrb r0, [r1, #0]
802bd88: f7ff ff8c bl 802bca4 <__hexdig_fun>
802bd8c: 1e43 subs r3, r0, #1
802bd8e: b2db uxtb r3, r3
802bd90: 2b18 cmp r3, #24
802bd92: d830 bhi.n 802bdf6 <__gethex+0x126>
802bd94: f1a0 0210 sub.w r2, r0, #16
802bd98: f811 0f01 ldrb.w r0, [r1, #1]!
802bd9c: f7ff ff82 bl 802bca4 <__hexdig_fun>
802bda0: f100 3cff add.w ip, r0, #4294967295 @ 0xffffffff
802bda4: fa5f fc8c uxtb.w ip, ip
802bda8: f1bc 0f18 cmp.w ip, #24
802bdac: f04f 030a mov.w r3, #10
802bdb0: d91e bls.n 802bdf0 <__gethex+0x120>
802bdb2: b104 cbz r4, 802bdb6 <__gethex+0xe6>
802bdb4: 4252 negs r2, r2
802bdb6: 4417 add r7, r2
802bdb8: f8ca 1000 str.w r1, [sl]
802bdbc: b1ed cbz r5, 802bdfa <__gethex+0x12a>
802bdbe: f1bb 0f00 cmp.w fp, #0
802bdc2: bf0c ite eq
802bdc4: 2506 moveq r5, #6
802bdc6: 2500 movne r5, #0
802bdc8: 4628 mov r0, r5
802bdca: b005 add sp, #20
802bdcc: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802bdd0: 2500 movs r5, #0
802bdd2: 462c mov r4, r5
802bdd4: e7b0 b.n 802bd38 <__gethex+0x68>
802bdd6: 2c00 cmp r4, #0
802bdd8: d1c7 bne.n 802bd6a <__gethex+0x9a>
802bdda: 4627 mov r7, r4
802bddc: e7c7 b.n 802bd6e <__gethex+0x9e>
802bdde: 464e mov r6, r9
802bde0: 462f mov r7, r5
802bde2: 2501 movs r5, #1
802bde4: e7c3 b.n 802bd6e <__gethex+0x9e>
802bde6: 2400 movs r4, #0
802bde8: 1cb1 adds r1, r6, #2
802bdea: e7cc b.n 802bd86 <__gethex+0xb6>
802bdec: 2401 movs r4, #1
802bdee: e7fb b.n 802bde8 <__gethex+0x118>
802bdf0: fb03 0002 mla r0, r3, r2, r0
802bdf4: e7ce b.n 802bd94 <__gethex+0xc4>
802bdf6: 4631 mov r1, r6
802bdf8: e7de b.n 802bdb8 <__gethex+0xe8>
802bdfa: eba6 0309 sub.w r3, r6, r9
802bdfe: 3b01 subs r3, #1
802be00: 4629 mov r1, r5
802be02: 2b07 cmp r3, #7
802be04: dc0a bgt.n 802be1c <__gethex+0x14c>
802be06: 9801 ldr r0, [sp, #4]
802be08: f000 fa46 bl 802c298 <_Balloc>
802be0c: 4604 mov r4, r0
802be0e: b940 cbnz r0, 802be22 <__gethex+0x152>
802be10: 4b5c ldr r3, [pc, #368] @ (802bf84 <__gethex+0x2b4>)
802be12: 4602 mov r2, r0
802be14: 21e4 movs r1, #228 @ 0xe4
802be16: 485c ldr r0, [pc, #368] @ (802bf88 <__gethex+0x2b8>)
802be18: f7ff f8aa bl 802af70 <__assert_func>
802be1c: 3101 adds r1, #1
802be1e: 105b asrs r3, r3, #1
802be20: e7ef b.n 802be02 <__gethex+0x132>
802be22: f100 0a14 add.w sl, r0, #20
802be26: 2300 movs r3, #0
802be28: 4655 mov r5, sl
802be2a: 469b mov fp, r3
802be2c: 45b1 cmp r9, r6
802be2e: d337 bcc.n 802bea0 <__gethex+0x1d0>
802be30: f845 bb04 str.w fp, [r5], #4
802be34: eba5 050a sub.w r5, r5, sl
802be38: 10ad asrs r5, r5, #2
802be3a: 6125 str r5, [r4, #16]
802be3c: 4658 mov r0, fp
802be3e: f000 fb1d bl 802c47c <__hi0bits>
802be42: 016d lsls r5, r5, #5
802be44: f8d8 6000 ldr.w r6, [r8]
802be48: 1a2d subs r5, r5, r0
802be4a: 42b5 cmp r5, r6
802be4c: dd54 ble.n 802bef8 <__gethex+0x228>
802be4e: 1bad subs r5, r5, r6
802be50: 4629 mov r1, r5
802be52: 4620 mov r0, r4
802be54: f000 feae bl 802cbb4 <__any_on>
802be58: 4681 mov r9, r0
802be5a: b178 cbz r0, 802be7c <__gethex+0x1ac>
802be5c: 1e6b subs r3, r5, #1
802be5e: 1159 asrs r1, r3, #5
802be60: f003 021f and.w r2, r3, #31
802be64: f85a 1021 ldr.w r1, [sl, r1, lsl #2]
802be68: f04f 0901 mov.w r9, #1
802be6c: fa09 f202 lsl.w r2, r9, r2
802be70: 420a tst r2, r1
802be72: d003 beq.n 802be7c <__gethex+0x1ac>
802be74: 454b cmp r3, r9
802be76: dc36 bgt.n 802bee6 <__gethex+0x216>
802be78: f04f 0902 mov.w r9, #2
802be7c: 4629 mov r1, r5
802be7e: 4620 mov r0, r4
802be80: f7ff febe bl 802bc00 <rshift>
802be84: 442f add r7, r5
802be86: f8d8 3008 ldr.w r3, [r8, #8]
802be8a: 42bb cmp r3, r7
802be8c: da42 bge.n 802bf14 <__gethex+0x244>
802be8e: 9801 ldr r0, [sp, #4]
802be90: 4621 mov r1, r4
802be92: f000 fa41 bl 802c318 <_Bfree>
802be96: 9a0e ldr r2, [sp, #56] @ 0x38
802be98: 2300 movs r3, #0
802be9a: 6013 str r3, [r2, #0]
802be9c: 25a3 movs r5, #163 @ 0xa3
802be9e: e793 b.n 802bdc8 <__gethex+0xf8>
802bea0: f816 2d01 ldrb.w r2, [r6, #-1]!
802bea4: 2a2e cmp r2, #46 @ 0x2e
802bea6: d012 beq.n 802bece <__gethex+0x1fe>
802bea8: 2b20 cmp r3, #32
802beaa: d104 bne.n 802beb6 <__gethex+0x1e6>
802beac: f845 bb04 str.w fp, [r5], #4
802beb0: f04f 0b00 mov.w fp, #0
802beb4: 465b mov r3, fp
802beb6: 7830 ldrb r0, [r6, #0]
802beb8: 9303 str r3, [sp, #12]
802beba: f7ff fef3 bl 802bca4 <__hexdig_fun>
802bebe: 9b03 ldr r3, [sp, #12]
802bec0: f000 000f and.w r0, r0, #15
802bec4: 4098 lsls r0, r3
802bec6: ea4b 0b00 orr.w fp, fp, r0
802beca: 3304 adds r3, #4
802becc: e7ae b.n 802be2c <__gethex+0x15c>
802bece: 45b1 cmp r9, r6
802bed0: d8ea bhi.n 802bea8 <__gethex+0x1d8>
802bed2: 492b ldr r1, [pc, #172] @ (802bf80 <__gethex+0x2b0>)
802bed4: 9303 str r3, [sp, #12]
802bed6: 2201 movs r2, #1
802bed8: 4630 mov r0, r6
802beda: f7fe ff41 bl 802ad60 <strncmp>
802bede: 9b03 ldr r3, [sp, #12]
802bee0: 2800 cmp r0, #0
802bee2: d1e1 bne.n 802bea8 <__gethex+0x1d8>
802bee4: e7a2 b.n 802be2c <__gethex+0x15c>
802bee6: 1ea9 subs r1, r5, #2
802bee8: 4620 mov r0, r4
802beea: f000 fe63 bl 802cbb4 <__any_on>
802beee: 2800 cmp r0, #0
802bef0: d0c2 beq.n 802be78 <__gethex+0x1a8>
802bef2: f04f 0903 mov.w r9, #3
802bef6: e7c1 b.n 802be7c <__gethex+0x1ac>
802bef8: da09 bge.n 802bf0e <__gethex+0x23e>
802befa: 1b75 subs r5, r6, r5
802befc: 4621 mov r1, r4
802befe: 9801 ldr r0, [sp, #4]
802bf00: 462a mov r2, r5
802bf02: f000 fc21 bl 802c748 <__lshift>
802bf06: 1b7f subs r7, r7, r5
802bf08: 4604 mov r4, r0
802bf0a: f100 0a14 add.w sl, r0, #20
802bf0e: f04f 0900 mov.w r9, #0
802bf12: e7b8 b.n 802be86 <__gethex+0x1b6>
802bf14: f8d8 5004 ldr.w r5, [r8, #4]
802bf18: 42bd cmp r5, r7
802bf1a: dd6f ble.n 802bffc <__gethex+0x32c>
802bf1c: 1bed subs r5, r5, r7
802bf1e: 42ae cmp r6, r5
802bf20: dc34 bgt.n 802bf8c <__gethex+0x2bc>
802bf22: f8d8 300c ldr.w r3, [r8, #12]
802bf26: 2b02 cmp r3, #2
802bf28: d022 beq.n 802bf70 <__gethex+0x2a0>
802bf2a: 2b03 cmp r3, #3
802bf2c: d024 beq.n 802bf78 <__gethex+0x2a8>
802bf2e: 2b01 cmp r3, #1
802bf30: d115 bne.n 802bf5e <__gethex+0x28e>
802bf32: 42ae cmp r6, r5
802bf34: d113 bne.n 802bf5e <__gethex+0x28e>
802bf36: 2e01 cmp r6, #1
802bf38: d10b bne.n 802bf52 <__gethex+0x282>
802bf3a: 9a02 ldr r2, [sp, #8]
802bf3c: f8d8 3004 ldr.w r3, [r8, #4]
802bf40: 6013 str r3, [r2, #0]
802bf42: 2301 movs r3, #1
802bf44: 6123 str r3, [r4, #16]
802bf46: f8ca 3000 str.w r3, [sl]
802bf4a: 9b0e ldr r3, [sp, #56] @ 0x38
802bf4c: 2562 movs r5, #98 @ 0x62
802bf4e: 601c str r4, [r3, #0]
802bf50: e73a b.n 802bdc8 <__gethex+0xf8>
802bf52: 1e71 subs r1, r6, #1
802bf54: 4620 mov r0, r4
802bf56: f000 fe2d bl 802cbb4 <__any_on>
802bf5a: 2800 cmp r0, #0
802bf5c: d1ed bne.n 802bf3a <__gethex+0x26a>
802bf5e: 9801 ldr r0, [sp, #4]
802bf60: 4621 mov r1, r4
802bf62: f000 f9d9 bl 802c318 <_Bfree>
802bf66: 9a0e ldr r2, [sp, #56] @ 0x38
802bf68: 2300 movs r3, #0
802bf6a: 6013 str r3, [r2, #0]
802bf6c: 2550 movs r5, #80 @ 0x50
802bf6e: e72b b.n 802bdc8 <__gethex+0xf8>
802bf70: 9b0f ldr r3, [sp, #60] @ 0x3c
802bf72: 2b00 cmp r3, #0
802bf74: d1f3 bne.n 802bf5e <__gethex+0x28e>
802bf76: e7e0 b.n 802bf3a <__gethex+0x26a>
802bf78: 9b0f ldr r3, [sp, #60] @ 0x3c
802bf7a: 2b00 cmp r3, #0
802bf7c: d1dd bne.n 802bf3a <__gethex+0x26a>
802bf7e: e7ee b.n 802bf5e <__gethex+0x28e>
802bf80: 08031f4d .word 0x08031f4d
802bf84: 0803217e .word 0x0803217e
802bf88: 0803218f .word 0x0803218f
802bf8c: 1e6f subs r7, r5, #1
802bf8e: f1b9 0f00 cmp.w r9, #0
802bf92: d130 bne.n 802bff6 <__gethex+0x326>
802bf94: b127 cbz r7, 802bfa0 <__gethex+0x2d0>
802bf96: 4639 mov r1, r7
802bf98: 4620 mov r0, r4
802bf9a: f000 fe0b bl 802cbb4 <__any_on>
802bf9e: 4681 mov r9, r0
802bfa0: 117a asrs r2, r7, #5
802bfa2: 2301 movs r3, #1
802bfa4: f85a 2022 ldr.w r2, [sl, r2, lsl #2]
802bfa8: f007 071f and.w r7, r7, #31
802bfac: 40bb lsls r3, r7
802bfae: 4213 tst r3, r2
802bfb0: 4629 mov r1, r5
802bfb2: 4620 mov r0, r4
802bfb4: bf18 it ne
802bfb6: f049 0902 orrne.w r9, r9, #2
802bfba: f7ff fe21 bl 802bc00 <rshift>
802bfbe: f8d8 7004 ldr.w r7, [r8, #4]
802bfc2: 1b76 subs r6, r6, r5
802bfc4: 2502 movs r5, #2
802bfc6: f1b9 0f00 cmp.w r9, #0
802bfca: d047 beq.n 802c05c <__gethex+0x38c>
802bfcc: f8d8 300c ldr.w r3, [r8, #12]
802bfd0: 2b02 cmp r3, #2
802bfd2: d015 beq.n 802c000 <__gethex+0x330>
802bfd4: 2b03 cmp r3, #3
802bfd6: d017 beq.n 802c008 <__gethex+0x338>
802bfd8: 2b01 cmp r3, #1
802bfda: d109 bne.n 802bff0 <__gethex+0x320>
802bfdc: f019 0f02 tst.w r9, #2
802bfe0: d006 beq.n 802bff0 <__gethex+0x320>
802bfe2: f8da 3000 ldr.w r3, [sl]
802bfe6: ea49 0903 orr.w r9, r9, r3
802bfea: f019 0f01 tst.w r9, #1
802bfee: d10e bne.n 802c00e <__gethex+0x33e>
802bff0: f045 0510 orr.w r5, r5, #16
802bff4: e032 b.n 802c05c <__gethex+0x38c>
802bff6: f04f 0901 mov.w r9, #1
802bffa: e7d1 b.n 802bfa0 <__gethex+0x2d0>
802bffc: 2501 movs r5, #1
802bffe: e7e2 b.n 802bfc6 <__gethex+0x2f6>
802c000: 9b0f ldr r3, [sp, #60] @ 0x3c
802c002: f1c3 0301 rsb r3, r3, #1
802c006: 930f str r3, [sp, #60] @ 0x3c
802c008: 9b0f ldr r3, [sp, #60] @ 0x3c
802c00a: 2b00 cmp r3, #0
802c00c: d0f0 beq.n 802bff0 <__gethex+0x320>
802c00e: f8d4 b010 ldr.w fp, [r4, #16]
802c012: f104 0314 add.w r3, r4, #20
802c016: ea4f 0a8b mov.w sl, fp, lsl #2
802c01a: eb03 018b add.w r1, r3, fp, lsl #2
802c01e: f04f 0c00 mov.w ip, #0
802c022: 4618 mov r0, r3
802c024: f853 2b04 ldr.w r2, [r3], #4
802c028: f1b2 3fff cmp.w r2, #4294967295 @ 0xffffffff
802c02c: d01b beq.n 802c066 <__gethex+0x396>
802c02e: 3201 adds r2, #1
802c030: 6002 str r2, [r0, #0]
802c032: 2d02 cmp r5, #2
802c034: f104 0314 add.w r3, r4, #20
802c038: d13c bne.n 802c0b4 <__gethex+0x3e4>
802c03a: f8d8 2000 ldr.w r2, [r8]
802c03e: 3a01 subs r2, #1
802c040: 42b2 cmp r2, r6
802c042: d109 bne.n 802c058 <__gethex+0x388>
802c044: 1171 asrs r1, r6, #5
802c046: 2201 movs r2, #1
802c048: f853 3021 ldr.w r3, [r3, r1, lsl #2]
802c04c: f006 061f and.w r6, r6, #31
802c050: fa02 f606 lsl.w r6, r2, r6
802c054: 421e tst r6, r3
802c056: d13a bne.n 802c0ce <__gethex+0x3fe>
802c058: f045 0520 orr.w r5, r5, #32
802c05c: 9b0e ldr r3, [sp, #56] @ 0x38
802c05e: 601c str r4, [r3, #0]
802c060: 9b02 ldr r3, [sp, #8]
802c062: 601f str r7, [r3, #0]
802c064: e6b0 b.n 802bdc8 <__gethex+0xf8>
802c066: 4299 cmp r1, r3
802c068: f843 cc04 str.w ip, [r3, #-4]
802c06c: d8d9 bhi.n 802c022 <__gethex+0x352>
802c06e: 68a3 ldr r3, [r4, #8]
802c070: 459b cmp fp, r3
802c072: db17 blt.n 802c0a4 <__gethex+0x3d4>
802c074: 6861 ldr r1, [r4, #4]
802c076: 9801 ldr r0, [sp, #4]
802c078: 3101 adds r1, #1
802c07a: f000 f90d bl 802c298 <_Balloc>
802c07e: 4681 mov r9, r0
802c080: b918 cbnz r0, 802c08a <__gethex+0x3ba>
802c082: 4b1a ldr r3, [pc, #104] @ (802c0ec <__gethex+0x41c>)
802c084: 4602 mov r2, r0
802c086: 2184 movs r1, #132 @ 0x84
802c088: e6c5 b.n 802be16 <__gethex+0x146>
802c08a: 6922 ldr r2, [r4, #16]
802c08c: 3202 adds r2, #2
802c08e: f104 010c add.w r1, r4, #12
802c092: 0092 lsls r2, r2, #2
802c094: 300c adds r0, #12
802c096: f7fe ff52 bl 802af3e <memcpy>
802c09a: 4621 mov r1, r4
802c09c: 9801 ldr r0, [sp, #4]
802c09e: f000 f93b bl 802c318 <_Bfree>
802c0a2: 464c mov r4, r9
802c0a4: 6923 ldr r3, [r4, #16]
802c0a6: 1c5a adds r2, r3, #1
802c0a8: eb04 0383 add.w r3, r4, r3, lsl #2
802c0ac: 6122 str r2, [r4, #16]
802c0ae: 2201 movs r2, #1
802c0b0: 615a str r2, [r3, #20]
802c0b2: e7be b.n 802c032 <__gethex+0x362>
802c0b4: 6922 ldr r2, [r4, #16]
802c0b6: 455a cmp r2, fp
802c0b8: dd0b ble.n 802c0d2 <__gethex+0x402>
802c0ba: 2101 movs r1, #1
802c0bc: 4620 mov r0, r4
802c0be: f7ff fd9f bl 802bc00 <rshift>
802c0c2: f8d8 3008 ldr.w r3, [r8, #8]
802c0c6: 3701 adds r7, #1
802c0c8: 42bb cmp r3, r7
802c0ca: f6ff aee0 blt.w 802be8e <__gethex+0x1be>
802c0ce: 2501 movs r5, #1
802c0d0: e7c2 b.n 802c058 <__gethex+0x388>
802c0d2: f016 061f ands.w r6, r6, #31
802c0d6: d0fa beq.n 802c0ce <__gethex+0x3fe>
802c0d8: 4453 add r3, sl
802c0da: f1c6 0620 rsb r6, r6, #32
802c0de: f853 0c04 ldr.w r0, [r3, #-4]
802c0e2: f000 f9cb bl 802c47c <__hi0bits>
802c0e6: 42b0 cmp r0, r6
802c0e8: dbe7 blt.n 802c0ba <__gethex+0x3ea>
802c0ea: e7f0 b.n 802c0ce <__gethex+0x3fe>
802c0ec: 0803217e .word 0x0803217e
0802c0f0 <L_shift>:
802c0f0: f1c2 0208 rsb r2, r2, #8
802c0f4: 0092 lsls r2, r2, #2
802c0f6: b570 push {r4, r5, r6, lr}
802c0f8: f1c2 0620 rsb r6, r2, #32
802c0fc: 6843 ldr r3, [r0, #4]
802c0fe: 6804 ldr r4, [r0, #0]
802c100: fa03 f506 lsl.w r5, r3, r6
802c104: 432c orrs r4, r5
802c106: 40d3 lsrs r3, r2
802c108: 6004 str r4, [r0, #0]
802c10a: f840 3f04 str.w r3, [r0, #4]!
802c10e: 4288 cmp r0, r1
802c110: d3f4 bcc.n 802c0fc <L_shift+0xc>
802c112: bd70 pop {r4, r5, r6, pc}
0802c114 <__match>:
802c114: b530 push {r4, r5, lr}
802c116: 6803 ldr r3, [r0, #0]
802c118: 3301 adds r3, #1
802c11a: f811 4b01 ldrb.w r4, [r1], #1
802c11e: b914 cbnz r4, 802c126 <__match+0x12>
802c120: 6003 str r3, [r0, #0]
802c122: 2001 movs r0, #1
802c124: bd30 pop {r4, r5, pc}
802c126: f813 2b01 ldrb.w r2, [r3], #1
802c12a: f1a2 0541 sub.w r5, r2, #65 @ 0x41
802c12e: 2d19 cmp r5, #25
802c130: bf98 it ls
802c132: 3220 addls r2, #32
802c134: 42a2 cmp r2, r4
802c136: d0f0 beq.n 802c11a <__match+0x6>
802c138: 2000 movs r0, #0
802c13a: e7f3 b.n 802c124 <__match+0x10>
0802c13c <__hexnan>:
802c13c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
802c140: 680b ldr r3, [r1, #0]
802c142: 6801 ldr r1, [r0, #0]
802c144: 115e asrs r6, r3, #5
802c146: eb02 0686 add.w r6, r2, r6, lsl #2
802c14a: f013 031f ands.w r3, r3, #31
802c14e: b087 sub sp, #28
802c150: bf18 it ne
802c152: 3604 addne r6, #4
802c154: 2500 movs r5, #0
802c156: 1f37 subs r7, r6, #4
802c158: 4682 mov sl, r0
802c15a: 4690 mov r8, r2
802c15c: 9301 str r3, [sp, #4]
802c15e: f846 5c04 str.w r5, [r6, #-4]
802c162: 46b9 mov r9, r7
802c164: 463c mov r4, r7
802c166: 9502 str r5, [sp, #8]
802c168: 46ab mov fp, r5
802c16a: 784a ldrb r2, [r1, #1]
802c16c: 1c4b adds r3, r1, #1
802c16e: 9303 str r3, [sp, #12]
802c170: b342 cbz r2, 802c1c4 <__hexnan+0x88>
802c172: 4610 mov r0, r2
802c174: 9105 str r1, [sp, #20]
802c176: 9204 str r2, [sp, #16]
802c178: f7ff fd94 bl 802bca4 <__hexdig_fun>
802c17c: 2800 cmp r0, #0
802c17e: d151 bne.n 802c224 <__hexnan+0xe8>
802c180: 9a04 ldr r2, [sp, #16]
802c182: 9905 ldr r1, [sp, #20]
802c184: 2a20 cmp r2, #32
802c186: d818 bhi.n 802c1ba <__hexnan+0x7e>
802c188: 9b02 ldr r3, [sp, #8]
802c18a: 459b cmp fp, r3
802c18c: dd13 ble.n 802c1b6 <__hexnan+0x7a>
802c18e: 454c cmp r4, r9
802c190: d206 bcs.n 802c1a0 <__hexnan+0x64>
802c192: 2d07 cmp r5, #7
802c194: dc04 bgt.n 802c1a0 <__hexnan+0x64>
802c196: 462a mov r2, r5
802c198: 4649 mov r1, r9
802c19a: 4620 mov r0, r4
802c19c: f7ff ffa8 bl 802c0f0 <L_shift>
802c1a0: 4544 cmp r4, r8
802c1a2: d952 bls.n 802c24a <__hexnan+0x10e>
802c1a4: 2300 movs r3, #0
802c1a6: f1a4 0904 sub.w r9, r4, #4
802c1aa: f844 3c04 str.w r3, [r4, #-4]
802c1ae: f8cd b008 str.w fp, [sp, #8]
802c1b2: 464c mov r4, r9
802c1b4: 461d mov r5, r3
802c1b6: 9903 ldr r1, [sp, #12]
802c1b8: e7d7 b.n 802c16a <__hexnan+0x2e>
802c1ba: 2a29 cmp r2, #41 @ 0x29
802c1bc: d157 bne.n 802c26e <__hexnan+0x132>
802c1be: 3102 adds r1, #2
802c1c0: f8ca 1000 str.w r1, [sl]
802c1c4: f1bb 0f00 cmp.w fp, #0
802c1c8: d051 beq.n 802c26e <__hexnan+0x132>
802c1ca: 454c cmp r4, r9
802c1cc: d206 bcs.n 802c1dc <__hexnan+0xa0>
802c1ce: 2d07 cmp r5, #7
802c1d0: dc04 bgt.n 802c1dc <__hexnan+0xa0>
802c1d2: 462a mov r2, r5
802c1d4: 4649 mov r1, r9
802c1d6: 4620 mov r0, r4
802c1d8: f7ff ff8a bl 802c0f0 <L_shift>
802c1dc: 4544 cmp r4, r8
802c1de: d936 bls.n 802c24e <__hexnan+0x112>
802c1e0: f1a8 0204 sub.w r2, r8, #4
802c1e4: 4623 mov r3, r4
802c1e6: f853 1b04 ldr.w r1, [r3], #4
802c1ea: f842 1f04 str.w r1, [r2, #4]!
802c1ee: 429f cmp r7, r3
802c1f0: d2f9 bcs.n 802c1e6 <__hexnan+0xaa>
802c1f2: 1b3b subs r3, r7, r4
802c1f4: f023 0303 bic.w r3, r3, #3
802c1f8: 3304 adds r3, #4
802c1fa: 3401 adds r4, #1
802c1fc: 3e03 subs r6, #3
802c1fe: 42b4 cmp r4, r6
802c200: bf88 it hi
802c202: 2304 movhi r3, #4
802c204: 4443 add r3, r8
802c206: 2200 movs r2, #0
802c208: f843 2b04 str.w r2, [r3], #4
802c20c: 429f cmp r7, r3
802c20e: d2fb bcs.n 802c208 <__hexnan+0xcc>
802c210: 683b ldr r3, [r7, #0]
802c212: b91b cbnz r3, 802c21c <__hexnan+0xe0>
802c214: 4547 cmp r7, r8
802c216: d128 bne.n 802c26a <__hexnan+0x12e>
802c218: 2301 movs r3, #1
802c21a: 603b str r3, [r7, #0]
802c21c: 2005 movs r0, #5
802c21e: b007 add sp, #28
802c220: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802c224: 3501 adds r5, #1
802c226: 2d08 cmp r5, #8
802c228: f10b 0b01 add.w fp, fp, #1
802c22c: dd06 ble.n 802c23c <__hexnan+0x100>
802c22e: 4544 cmp r4, r8
802c230: d9c1 bls.n 802c1b6 <__hexnan+0x7a>
802c232: 2300 movs r3, #0
802c234: f844 3c04 str.w r3, [r4, #-4]
802c238: 2501 movs r5, #1
802c23a: 3c04 subs r4, #4
802c23c: 6822 ldr r2, [r4, #0]
802c23e: f000 000f and.w r0, r0, #15
802c242: ea40 1002 orr.w r0, r0, r2, lsl #4
802c246: 6020 str r0, [r4, #0]
802c248: e7b5 b.n 802c1b6 <__hexnan+0x7a>
802c24a: 2508 movs r5, #8
802c24c: e7b3 b.n 802c1b6 <__hexnan+0x7a>
802c24e: 9b01 ldr r3, [sp, #4]
802c250: 2b00 cmp r3, #0
802c252: d0dd beq.n 802c210 <__hexnan+0xd4>
802c254: f1c3 0320 rsb r3, r3, #32
802c258: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
802c25c: 40da lsrs r2, r3
802c25e: f856 3c04 ldr.w r3, [r6, #-4]
802c262: 4013 ands r3, r2
802c264: f846 3c04 str.w r3, [r6, #-4]
802c268: e7d2 b.n 802c210 <__hexnan+0xd4>
802c26a: 3f04 subs r7, #4
802c26c: e7d0 b.n 802c210 <__hexnan+0xd4>
802c26e: 2004 movs r0, #4
802c270: e7d5 b.n 802c21e <__hexnan+0xe2>
0802c272 <__ascii_mbtowc>:
802c272: b082 sub sp, #8
802c274: b901 cbnz r1, 802c278 <__ascii_mbtowc+0x6>
802c276: a901 add r1, sp, #4
802c278: b142 cbz r2, 802c28c <__ascii_mbtowc+0x1a>
802c27a: b14b cbz r3, 802c290 <__ascii_mbtowc+0x1e>
802c27c: 7813 ldrb r3, [r2, #0]
802c27e: 600b str r3, [r1, #0]
802c280: 7812 ldrb r2, [r2, #0]
802c282: 1e10 subs r0, r2, #0
802c284: bf18 it ne
802c286: 2001 movne r0, #1
802c288: b002 add sp, #8
802c28a: 4770 bx lr
802c28c: 4610 mov r0, r2
802c28e: e7fb b.n 802c288 <__ascii_mbtowc+0x16>
802c290: f06f 0001 mvn.w r0, #1
802c294: e7f8 b.n 802c288 <__ascii_mbtowc+0x16>
...
0802c298 <_Balloc>:
802c298: b570 push {r4, r5, r6, lr}
802c29a: 69c6 ldr r6, [r0, #28]
802c29c: 4604 mov r4, r0
802c29e: 460d mov r5, r1
802c2a0: b976 cbnz r6, 802c2c0 <_Balloc+0x28>
802c2a2: 2010 movs r0, #16
802c2a4: f7fc ffda bl 802925c <malloc>
802c2a8: 4602 mov r2, r0
802c2aa: 61e0 str r0, [r4, #28]
802c2ac: b920 cbnz r0, 802c2b8 <_Balloc+0x20>
802c2ae: 4b18 ldr r3, [pc, #96] @ (802c310 <_Balloc+0x78>)
802c2b0: 4818 ldr r0, [pc, #96] @ (802c314 <_Balloc+0x7c>)
802c2b2: 216b movs r1, #107 @ 0x6b
802c2b4: f7fe fe5c bl 802af70 <__assert_func>
802c2b8: e9c0 6601 strd r6, r6, [r0, #4]
802c2bc: 6006 str r6, [r0, #0]
802c2be: 60c6 str r6, [r0, #12]
802c2c0: 69e6 ldr r6, [r4, #28]
802c2c2: 68f3 ldr r3, [r6, #12]
802c2c4: b183 cbz r3, 802c2e8 <_Balloc+0x50>
802c2c6: 69e3 ldr r3, [r4, #28]
802c2c8: 68db ldr r3, [r3, #12]
802c2ca: f853 0025 ldr.w r0, [r3, r5, lsl #2]
802c2ce: b9b8 cbnz r0, 802c300 <_Balloc+0x68>
802c2d0: 2101 movs r1, #1
802c2d2: fa01 f605 lsl.w r6, r1, r5
802c2d6: 1d72 adds r2, r6, #5
802c2d8: 0092 lsls r2, r2, #2
802c2da: 4620 mov r0, r4
802c2dc: f001 f883 bl 802d3e6 <_calloc_r>
802c2e0: b160 cbz r0, 802c2fc <_Balloc+0x64>
802c2e2: e9c0 5601 strd r5, r6, [r0, #4]
802c2e6: e00e b.n 802c306 <_Balloc+0x6e>
802c2e8: 2221 movs r2, #33 @ 0x21
802c2ea: 2104 movs r1, #4
802c2ec: 4620 mov r0, r4
802c2ee: f001 f87a bl 802d3e6 <_calloc_r>
802c2f2: 69e3 ldr r3, [r4, #28]
802c2f4: 60f0 str r0, [r6, #12]
802c2f6: 68db ldr r3, [r3, #12]
802c2f8: 2b00 cmp r3, #0
802c2fa: d1e4 bne.n 802c2c6 <_Balloc+0x2e>
802c2fc: 2000 movs r0, #0
802c2fe: bd70 pop {r4, r5, r6, pc}
802c300: 6802 ldr r2, [r0, #0]
802c302: f843 2025 str.w r2, [r3, r5, lsl #2]
802c306: 2300 movs r3, #0
802c308: e9c0 3303 strd r3, r3, [r0, #12]
802c30c: e7f7 b.n 802c2fe <_Balloc+0x66>
802c30e: bf00 nop
802c310: 08031ede .word 0x08031ede
802c314: 080321ef .word 0x080321ef
0802c318 <_Bfree>:
802c318: b570 push {r4, r5, r6, lr}
802c31a: 69c6 ldr r6, [r0, #28]
802c31c: 4605 mov r5, r0
802c31e: 460c mov r4, r1
802c320: b976 cbnz r6, 802c340 <_Bfree+0x28>
802c322: 2010 movs r0, #16
802c324: f7fc ff9a bl 802925c <malloc>
802c328: 4602 mov r2, r0
802c32a: 61e8 str r0, [r5, #28]
802c32c: b920 cbnz r0, 802c338 <_Bfree+0x20>
802c32e: 4b09 ldr r3, [pc, #36] @ (802c354 <_Bfree+0x3c>)
802c330: 4809 ldr r0, [pc, #36] @ (802c358 <_Bfree+0x40>)
802c332: 218f movs r1, #143 @ 0x8f
802c334: f7fe fe1c bl 802af70 <__assert_func>
802c338: e9c0 6601 strd r6, r6, [r0, #4]
802c33c: 6006 str r6, [r0, #0]
802c33e: 60c6 str r6, [r0, #12]
802c340: b13c cbz r4, 802c352 <_Bfree+0x3a>
802c342: 69eb ldr r3, [r5, #28]
802c344: 6862 ldr r2, [r4, #4]
802c346: 68db ldr r3, [r3, #12]
802c348: f853 1022 ldr.w r1, [r3, r2, lsl #2]
802c34c: 6021 str r1, [r4, #0]
802c34e: f843 4022 str.w r4, [r3, r2, lsl #2]
802c352: bd70 pop {r4, r5, r6, pc}
802c354: 08031ede .word 0x08031ede
802c358: 080321ef .word 0x080321ef
0802c35c <__multadd>:
802c35c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
802c360: 690d ldr r5, [r1, #16]
802c362: 4607 mov r7, r0
802c364: 460c mov r4, r1
802c366: 461e mov r6, r3
802c368: f101 0c14 add.w ip, r1, #20
802c36c: 2000 movs r0, #0
802c36e: f8dc 3000 ldr.w r3, [ip]
802c372: b299 uxth r1, r3
802c374: fb02 6101 mla r1, r2, r1, r6
802c378: 0c1e lsrs r6, r3, #16
802c37a: 0c0b lsrs r3, r1, #16
802c37c: fb02 3306 mla r3, r2, r6, r3
802c380: b289 uxth r1, r1
802c382: 3001 adds r0, #1
802c384: eb01 4103 add.w r1, r1, r3, lsl #16
802c388: 4285 cmp r5, r0
802c38a: f84c 1b04 str.w r1, [ip], #4
802c38e: ea4f 4613 mov.w r6, r3, lsr #16
802c392: dcec bgt.n 802c36e <__multadd+0x12>
802c394: b30e cbz r6, 802c3da <__multadd+0x7e>
802c396: 68a3 ldr r3, [r4, #8]
802c398: 42ab cmp r3, r5
802c39a: dc19 bgt.n 802c3d0 <__multadd+0x74>
802c39c: 6861 ldr r1, [r4, #4]
802c39e: 4638 mov r0, r7
802c3a0: 3101 adds r1, #1
802c3a2: f7ff ff79 bl 802c298 <_Balloc>
802c3a6: 4680 mov r8, r0
802c3a8: b928 cbnz r0, 802c3b6 <__multadd+0x5a>
802c3aa: 4602 mov r2, r0
802c3ac: 4b0c ldr r3, [pc, #48] @ (802c3e0 <__multadd+0x84>)
802c3ae: 480d ldr r0, [pc, #52] @ (802c3e4 <__multadd+0x88>)
802c3b0: 21ba movs r1, #186 @ 0xba
802c3b2: f7fe fddd bl 802af70 <__assert_func>
802c3b6: 6922 ldr r2, [r4, #16]
802c3b8: 3202 adds r2, #2
802c3ba: f104 010c add.w r1, r4, #12
802c3be: 0092 lsls r2, r2, #2
802c3c0: 300c adds r0, #12
802c3c2: f7fe fdbc bl 802af3e <memcpy>
802c3c6: 4621 mov r1, r4
802c3c8: 4638 mov r0, r7
802c3ca: f7ff ffa5 bl 802c318 <_Bfree>
802c3ce: 4644 mov r4, r8
802c3d0: eb04 0385 add.w r3, r4, r5, lsl #2
802c3d4: 3501 adds r5, #1
802c3d6: 615e str r6, [r3, #20]
802c3d8: 6125 str r5, [r4, #16]
802c3da: 4620 mov r0, r4
802c3dc: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
802c3e0: 0803217e .word 0x0803217e
802c3e4: 080321ef .word 0x080321ef
0802c3e8 <__s2b>:
802c3e8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
802c3ec: 460c mov r4, r1
802c3ee: 4615 mov r5, r2
802c3f0: 461f mov r7, r3
802c3f2: 2209 movs r2, #9
802c3f4: 3308 adds r3, #8
802c3f6: 4606 mov r6, r0
802c3f8: fb93 f3f2 sdiv r3, r3, r2
802c3fc: 2100 movs r1, #0
802c3fe: 2201 movs r2, #1
802c400: 429a cmp r2, r3
802c402: db09 blt.n 802c418 <__s2b+0x30>
802c404: 4630 mov r0, r6
802c406: f7ff ff47 bl 802c298 <_Balloc>
802c40a: b940 cbnz r0, 802c41e <__s2b+0x36>
802c40c: 4602 mov r2, r0
802c40e: 4b19 ldr r3, [pc, #100] @ (802c474 <__s2b+0x8c>)
802c410: 4819 ldr r0, [pc, #100] @ (802c478 <__s2b+0x90>)
802c412: 21d3 movs r1, #211 @ 0xd3
802c414: f7fe fdac bl 802af70 <__assert_func>
802c418: 0052 lsls r2, r2, #1
802c41a: 3101 adds r1, #1
802c41c: e7f0 b.n 802c400 <__s2b+0x18>
802c41e: 9b08 ldr r3, [sp, #32]
802c420: 6143 str r3, [r0, #20]
802c422: 2d09 cmp r5, #9
802c424: f04f 0301 mov.w r3, #1
802c428: 6103 str r3, [r0, #16]
802c42a: dd16 ble.n 802c45a <__s2b+0x72>
802c42c: f104 0909 add.w r9, r4, #9
802c430: 46c8 mov r8, r9
802c432: 442c add r4, r5
802c434: f818 3b01 ldrb.w r3, [r8], #1
802c438: 4601 mov r1, r0
802c43a: 3b30 subs r3, #48 @ 0x30
802c43c: 220a movs r2, #10
802c43e: 4630 mov r0, r6
802c440: f7ff ff8c bl 802c35c <__multadd>
802c444: 45a0 cmp r8, r4
802c446: d1f5 bne.n 802c434 <__s2b+0x4c>
802c448: f1a5 0408 sub.w r4, r5, #8
802c44c: 444c add r4, r9
802c44e: 1b2d subs r5, r5, r4
802c450: 1963 adds r3, r4, r5
802c452: 42bb cmp r3, r7
802c454: db04 blt.n 802c460 <__s2b+0x78>
802c456: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
802c45a: 340a adds r4, #10
802c45c: 2509 movs r5, #9
802c45e: e7f6 b.n 802c44e <__s2b+0x66>
802c460: f814 3b01 ldrb.w r3, [r4], #1
802c464: 4601 mov r1, r0
802c466: 3b30 subs r3, #48 @ 0x30
802c468: 220a movs r2, #10
802c46a: 4630 mov r0, r6
802c46c: f7ff ff76 bl 802c35c <__multadd>
802c470: e7ee b.n 802c450 <__s2b+0x68>
802c472: bf00 nop
802c474: 0803217e .word 0x0803217e
802c478: 080321ef .word 0x080321ef
0802c47c <__hi0bits>:
802c47c: f5b0 3f80 cmp.w r0, #65536 @ 0x10000
802c480: 4603 mov r3, r0
802c482: bf36 itet cc
802c484: 0403 lslcc r3, r0, #16
802c486: 2000 movcs r0, #0
802c488: 2010 movcc r0, #16
802c48a: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
802c48e: bf3c itt cc
802c490: 021b lslcc r3, r3, #8
802c492: 3008 addcc r0, #8
802c494: f1b3 5f80 cmp.w r3, #268435456 @ 0x10000000
802c498: bf3c itt cc
802c49a: 011b lslcc r3, r3, #4
802c49c: 3004 addcc r0, #4
802c49e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
802c4a2: bf3c itt cc
802c4a4: 009b lslcc r3, r3, #2
802c4a6: 3002 addcc r0, #2
802c4a8: 2b00 cmp r3, #0
802c4aa: db05 blt.n 802c4b8 <__hi0bits+0x3c>
802c4ac: f013 4f80 tst.w r3, #1073741824 @ 0x40000000
802c4b0: f100 0001 add.w r0, r0, #1
802c4b4: bf08 it eq
802c4b6: 2020 moveq r0, #32
802c4b8: 4770 bx lr
0802c4ba <__lo0bits>:
802c4ba: 6803 ldr r3, [r0, #0]
802c4bc: 4602 mov r2, r0
802c4be: f013 0007 ands.w r0, r3, #7
802c4c2: d00b beq.n 802c4dc <__lo0bits+0x22>
802c4c4: 07d9 lsls r1, r3, #31
802c4c6: d421 bmi.n 802c50c <__lo0bits+0x52>
802c4c8: 0798 lsls r0, r3, #30
802c4ca: bf49 itett mi
802c4cc: 085b lsrmi r3, r3, #1
802c4ce: 089b lsrpl r3, r3, #2
802c4d0: 2001 movmi r0, #1
802c4d2: 6013 strmi r3, [r2, #0]
802c4d4: bf5c itt pl
802c4d6: 6013 strpl r3, [r2, #0]
802c4d8: 2002 movpl r0, #2
802c4da: 4770 bx lr
802c4dc: b299 uxth r1, r3
802c4de: b909 cbnz r1, 802c4e4 <__lo0bits+0x2a>
802c4e0: 0c1b lsrs r3, r3, #16
802c4e2: 2010 movs r0, #16
802c4e4: b2d9 uxtb r1, r3
802c4e6: b909 cbnz r1, 802c4ec <__lo0bits+0x32>
802c4e8: 3008 adds r0, #8
802c4ea: 0a1b lsrs r3, r3, #8
802c4ec: 0719 lsls r1, r3, #28
802c4ee: bf04 itt eq
802c4f0: 091b lsreq r3, r3, #4
802c4f2: 3004 addeq r0, #4
802c4f4: 0799 lsls r1, r3, #30
802c4f6: bf04 itt eq
802c4f8: 089b lsreq r3, r3, #2
802c4fa: 3002 addeq r0, #2
802c4fc: 07d9 lsls r1, r3, #31
802c4fe: d403 bmi.n 802c508 <__lo0bits+0x4e>
802c500: 085b lsrs r3, r3, #1
802c502: f100 0001 add.w r0, r0, #1
802c506: d003 beq.n 802c510 <__lo0bits+0x56>
802c508: 6013 str r3, [r2, #0]
802c50a: 4770 bx lr
802c50c: 2000 movs r0, #0
802c50e: 4770 bx lr
802c510: 2020 movs r0, #32
802c512: 4770 bx lr
0802c514 <__i2b>:
802c514: b510 push {r4, lr}
802c516: 460c mov r4, r1
802c518: 2101 movs r1, #1
802c51a: f7ff febd bl 802c298 <_Balloc>
802c51e: 4602 mov r2, r0
802c520: b928 cbnz r0, 802c52e <__i2b+0x1a>
802c522: 4b05 ldr r3, [pc, #20] @ (802c538 <__i2b+0x24>)
802c524: 4805 ldr r0, [pc, #20] @ (802c53c <__i2b+0x28>)
802c526: f240 1145 movw r1, #325 @ 0x145
802c52a: f7fe fd21 bl 802af70 <__assert_func>
802c52e: 2301 movs r3, #1
802c530: 6144 str r4, [r0, #20]
802c532: 6103 str r3, [r0, #16]
802c534: bd10 pop {r4, pc}
802c536: bf00 nop
802c538: 0803217e .word 0x0803217e
802c53c: 080321ef .word 0x080321ef
0802c540 <__multiply>:
802c540: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
802c544: 4614 mov r4, r2
802c546: 690a ldr r2, [r1, #16]
802c548: 6923 ldr r3, [r4, #16]
802c54a: 429a cmp r2, r3
802c54c: bfa8 it ge
802c54e: 4623 movge r3, r4
802c550: 460f mov r7, r1
802c552: bfa4 itt ge
802c554: 460c movge r4, r1
802c556: 461f movge r7, r3
802c558: f8d4 a010 ldr.w sl, [r4, #16]
802c55c: f8d7 9010 ldr.w r9, [r7, #16]
802c560: 68a3 ldr r3, [r4, #8]
802c562: 6861 ldr r1, [r4, #4]
802c564: eb0a 0609 add.w r6, sl, r9
802c568: 42b3 cmp r3, r6
802c56a: b085 sub sp, #20
802c56c: bfb8 it lt
802c56e: 3101 addlt r1, #1
802c570: f7ff fe92 bl 802c298 <_Balloc>
802c574: b930 cbnz r0, 802c584 <__multiply+0x44>
802c576: 4602 mov r2, r0
802c578: 4b44 ldr r3, [pc, #272] @ (802c68c <__multiply+0x14c>)
802c57a: 4845 ldr r0, [pc, #276] @ (802c690 <__multiply+0x150>)
802c57c: f44f 71b1 mov.w r1, #354 @ 0x162
802c580: f7fe fcf6 bl 802af70 <__assert_func>
802c584: f100 0514 add.w r5, r0, #20
802c588: eb05 0886 add.w r8, r5, r6, lsl #2
802c58c: 462b mov r3, r5
802c58e: 2200 movs r2, #0
802c590: 4543 cmp r3, r8
802c592: d321 bcc.n 802c5d8 <__multiply+0x98>
802c594: f107 0114 add.w r1, r7, #20
802c598: f104 0214 add.w r2, r4, #20
802c59c: eb02 028a add.w r2, r2, sl, lsl #2
802c5a0: eb01 0389 add.w r3, r1, r9, lsl #2
802c5a4: 9302 str r3, [sp, #8]
802c5a6: 1b13 subs r3, r2, r4
802c5a8: 3b15 subs r3, #21
802c5aa: f023 0303 bic.w r3, r3, #3
802c5ae: 3304 adds r3, #4
802c5b0: f104 0715 add.w r7, r4, #21
802c5b4: 42ba cmp r2, r7
802c5b6: bf38 it cc
802c5b8: 2304 movcc r3, #4
802c5ba: 9301 str r3, [sp, #4]
802c5bc: 9b02 ldr r3, [sp, #8]
802c5be: 9103 str r1, [sp, #12]
802c5c0: 428b cmp r3, r1
802c5c2: d80c bhi.n 802c5de <__multiply+0x9e>
802c5c4: 2e00 cmp r6, #0
802c5c6: dd03 ble.n 802c5d0 <__multiply+0x90>
802c5c8: f858 3d04 ldr.w r3, [r8, #-4]!
802c5cc: 2b00 cmp r3, #0
802c5ce: d05b beq.n 802c688 <__multiply+0x148>
802c5d0: 6106 str r6, [r0, #16]
802c5d2: b005 add sp, #20
802c5d4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802c5d8: f843 2b04 str.w r2, [r3], #4
802c5dc: e7d8 b.n 802c590 <__multiply+0x50>
802c5de: f8b1 a000 ldrh.w sl, [r1]
802c5e2: f1ba 0f00 cmp.w sl, #0
802c5e6: d024 beq.n 802c632 <__multiply+0xf2>
802c5e8: f104 0e14 add.w lr, r4, #20
802c5ec: 46a9 mov r9, r5
802c5ee: f04f 0c00 mov.w ip, #0
802c5f2: f85e 7b04 ldr.w r7, [lr], #4
802c5f6: f8d9 3000 ldr.w r3, [r9]
802c5fa: fa1f fb87 uxth.w fp, r7
802c5fe: b29b uxth r3, r3
802c600: fb0a 330b mla r3, sl, fp, r3
802c604: ea4f 4b17 mov.w fp, r7, lsr #16
802c608: f8d9 7000 ldr.w r7, [r9]
802c60c: 4463 add r3, ip
802c60e: ea4f 4c17 mov.w ip, r7, lsr #16
802c612: fb0a c70b mla r7, sl, fp, ip
802c616: eb07 4713 add.w r7, r7, r3, lsr #16
802c61a: b29b uxth r3, r3
802c61c: ea43 4307 orr.w r3, r3, r7, lsl #16
802c620: 4572 cmp r2, lr
802c622: f849 3b04 str.w r3, [r9], #4
802c626: ea4f 4c17 mov.w ip, r7, lsr #16
802c62a: d8e2 bhi.n 802c5f2 <__multiply+0xb2>
802c62c: 9b01 ldr r3, [sp, #4]
802c62e: f845 c003 str.w ip, [r5, r3]
802c632: 9b03 ldr r3, [sp, #12]
802c634: f8b3 9002 ldrh.w r9, [r3, #2]
802c638: 3104 adds r1, #4
802c63a: f1b9 0f00 cmp.w r9, #0
802c63e: d021 beq.n 802c684 <__multiply+0x144>
802c640: 682b ldr r3, [r5, #0]
802c642: f104 0c14 add.w ip, r4, #20
802c646: 46ae mov lr, r5
802c648: f04f 0a00 mov.w sl, #0
802c64c: f8bc b000 ldrh.w fp, [ip]
802c650: f8be 7002 ldrh.w r7, [lr, #2]
802c654: fb09 770b mla r7, r9, fp, r7
802c658: 4457 add r7, sl
802c65a: b29b uxth r3, r3
802c65c: ea43 4307 orr.w r3, r3, r7, lsl #16
802c660: f84e 3b04 str.w r3, [lr], #4
802c664: f85c 3b04 ldr.w r3, [ip], #4
802c668: ea4f 4a13 mov.w sl, r3, lsr #16
802c66c: f8be 3000 ldrh.w r3, [lr]
802c670: fb09 330a mla r3, r9, sl, r3
802c674: eb03 4317 add.w r3, r3, r7, lsr #16
802c678: 4562 cmp r2, ip
802c67a: ea4f 4a13 mov.w sl, r3, lsr #16
802c67e: d8e5 bhi.n 802c64c <__multiply+0x10c>
802c680: 9f01 ldr r7, [sp, #4]
802c682: 51eb str r3, [r5, r7]
802c684: 3504 adds r5, #4
802c686: e799 b.n 802c5bc <__multiply+0x7c>
802c688: 3e01 subs r6, #1
802c68a: e79b b.n 802c5c4 <__multiply+0x84>
802c68c: 0803217e .word 0x0803217e
802c690: 080321ef .word 0x080321ef
0802c694 <__pow5mult>:
802c694: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
802c698: 4615 mov r5, r2
802c69a: f012 0203 ands.w r2, r2, #3
802c69e: 4607 mov r7, r0
802c6a0: 460e mov r6, r1
802c6a2: d007 beq.n 802c6b4 <__pow5mult+0x20>
802c6a4: 4c25 ldr r4, [pc, #148] @ (802c73c <__pow5mult+0xa8>)
802c6a6: 3a01 subs r2, #1
802c6a8: 2300 movs r3, #0
802c6aa: f854 2022 ldr.w r2, [r4, r2, lsl #2]
802c6ae: f7ff fe55 bl 802c35c <__multadd>
802c6b2: 4606 mov r6, r0
802c6b4: 10ad asrs r5, r5, #2
802c6b6: d03d beq.n 802c734 <__pow5mult+0xa0>
802c6b8: 69fc ldr r4, [r7, #28]
802c6ba: b97c cbnz r4, 802c6dc <__pow5mult+0x48>
802c6bc: 2010 movs r0, #16
802c6be: f7fc fdcd bl 802925c <malloc>
802c6c2: 4602 mov r2, r0
802c6c4: 61f8 str r0, [r7, #28]
802c6c6: b928 cbnz r0, 802c6d4 <__pow5mult+0x40>
802c6c8: 4b1d ldr r3, [pc, #116] @ (802c740 <__pow5mult+0xac>)
802c6ca: 481e ldr r0, [pc, #120] @ (802c744 <__pow5mult+0xb0>)
802c6cc: f240 11b3 movw r1, #435 @ 0x1b3
802c6d0: f7fe fc4e bl 802af70 <__assert_func>
802c6d4: e9c0 4401 strd r4, r4, [r0, #4]
802c6d8: 6004 str r4, [r0, #0]
802c6da: 60c4 str r4, [r0, #12]
802c6dc: f8d7 801c ldr.w r8, [r7, #28]
802c6e0: f8d8 4008 ldr.w r4, [r8, #8]
802c6e4: b94c cbnz r4, 802c6fa <__pow5mult+0x66>
802c6e6: f240 2171 movw r1, #625 @ 0x271
802c6ea: 4638 mov r0, r7
802c6ec: f7ff ff12 bl 802c514 <__i2b>
802c6f0: 2300 movs r3, #0
802c6f2: f8c8 0008 str.w r0, [r8, #8]
802c6f6: 4604 mov r4, r0
802c6f8: 6003 str r3, [r0, #0]
802c6fa: f04f 0900 mov.w r9, #0
802c6fe: 07eb lsls r3, r5, #31
802c700: d50a bpl.n 802c718 <__pow5mult+0x84>
802c702: 4631 mov r1, r6
802c704: 4622 mov r2, r4
802c706: 4638 mov r0, r7
802c708: f7ff ff1a bl 802c540 <__multiply>
802c70c: 4631 mov r1, r6
802c70e: 4680 mov r8, r0
802c710: 4638 mov r0, r7
802c712: f7ff fe01 bl 802c318 <_Bfree>
802c716: 4646 mov r6, r8
802c718: 106d asrs r5, r5, #1
802c71a: d00b beq.n 802c734 <__pow5mult+0xa0>
802c71c: 6820 ldr r0, [r4, #0]
802c71e: b938 cbnz r0, 802c730 <__pow5mult+0x9c>
802c720: 4622 mov r2, r4
802c722: 4621 mov r1, r4
802c724: 4638 mov r0, r7
802c726: f7ff ff0b bl 802c540 <__multiply>
802c72a: 6020 str r0, [r4, #0]
802c72c: f8c0 9000 str.w r9, [r0]
802c730: 4604 mov r4, r0
802c732: e7e4 b.n 802c6fe <__pow5mult+0x6a>
802c734: 4630 mov r0, r6
802c736: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
802c73a: bf00 nop
802c73c: 08032248 .word 0x08032248
802c740: 08031ede .word 0x08031ede
802c744: 080321ef .word 0x080321ef
0802c748 <__lshift>:
802c748: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
802c74c: 460c mov r4, r1
802c74e: 6849 ldr r1, [r1, #4]
802c750: 6923 ldr r3, [r4, #16]
802c752: eb03 1862 add.w r8, r3, r2, asr #5
802c756: 68a3 ldr r3, [r4, #8]
802c758: 4607 mov r7, r0
802c75a: 4691 mov r9, r2
802c75c: ea4f 1a62 mov.w sl, r2, asr #5
802c760: f108 0601 add.w r6, r8, #1
802c764: 42b3 cmp r3, r6
802c766: db0b blt.n 802c780 <__lshift+0x38>
802c768: 4638 mov r0, r7
802c76a: f7ff fd95 bl 802c298 <_Balloc>
802c76e: 4605 mov r5, r0
802c770: b948 cbnz r0, 802c786 <__lshift+0x3e>
802c772: 4602 mov r2, r0
802c774: 4b28 ldr r3, [pc, #160] @ (802c818 <__lshift+0xd0>)
802c776: 4829 ldr r0, [pc, #164] @ (802c81c <__lshift+0xd4>)
802c778: f44f 71ef mov.w r1, #478 @ 0x1de
802c77c: f7fe fbf8 bl 802af70 <__assert_func>
802c780: 3101 adds r1, #1
802c782: 005b lsls r3, r3, #1
802c784: e7ee b.n 802c764 <__lshift+0x1c>
802c786: 2300 movs r3, #0
802c788: f100 0114 add.w r1, r0, #20
802c78c: f100 0210 add.w r2, r0, #16
802c790: 4618 mov r0, r3
802c792: 4553 cmp r3, sl
802c794: db33 blt.n 802c7fe <__lshift+0xb6>
802c796: 6920 ldr r0, [r4, #16]
802c798: ea2a 7aea bic.w sl, sl, sl, asr #31
802c79c: f104 0314 add.w r3, r4, #20
802c7a0: f019 091f ands.w r9, r9, #31
802c7a4: eb01 018a add.w r1, r1, sl, lsl #2
802c7a8: eb03 0c80 add.w ip, r3, r0, lsl #2
802c7ac: d02b beq.n 802c806 <__lshift+0xbe>
802c7ae: f1c9 0e20 rsb lr, r9, #32
802c7b2: 468a mov sl, r1
802c7b4: 2200 movs r2, #0
802c7b6: 6818 ldr r0, [r3, #0]
802c7b8: fa00 f009 lsl.w r0, r0, r9
802c7bc: 4310 orrs r0, r2
802c7be: f84a 0b04 str.w r0, [sl], #4
802c7c2: f853 2b04 ldr.w r2, [r3], #4
802c7c6: 459c cmp ip, r3
802c7c8: fa22 f20e lsr.w r2, r2, lr
802c7cc: d8f3 bhi.n 802c7b6 <__lshift+0x6e>
802c7ce: ebac 0304 sub.w r3, ip, r4
802c7d2: 3b15 subs r3, #21
802c7d4: f023 0303 bic.w r3, r3, #3
802c7d8: 3304 adds r3, #4
802c7da: f104 0015 add.w r0, r4, #21
802c7de: 4584 cmp ip, r0
802c7e0: bf38 it cc
802c7e2: 2304 movcc r3, #4
802c7e4: 50ca str r2, [r1, r3]
802c7e6: b10a cbz r2, 802c7ec <__lshift+0xa4>
802c7e8: f108 0602 add.w r6, r8, #2
802c7ec: 3e01 subs r6, #1
802c7ee: 4638 mov r0, r7
802c7f0: 612e str r6, [r5, #16]
802c7f2: 4621 mov r1, r4
802c7f4: f7ff fd90 bl 802c318 <_Bfree>
802c7f8: 4628 mov r0, r5
802c7fa: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
802c7fe: f842 0f04 str.w r0, [r2, #4]!
802c802: 3301 adds r3, #1
802c804: e7c5 b.n 802c792 <__lshift+0x4a>
802c806: 3904 subs r1, #4
802c808: f853 2b04 ldr.w r2, [r3], #4
802c80c: f841 2f04 str.w r2, [r1, #4]!
802c810: 459c cmp ip, r3
802c812: d8f9 bhi.n 802c808 <__lshift+0xc0>
802c814: e7ea b.n 802c7ec <__lshift+0xa4>
802c816: bf00 nop
802c818: 0803217e .word 0x0803217e
802c81c: 080321ef .word 0x080321ef
0802c820 <__mcmp>:
802c820: 690a ldr r2, [r1, #16]
802c822: 4603 mov r3, r0
802c824: 6900 ldr r0, [r0, #16]
802c826: 1a80 subs r0, r0, r2
802c828: b530 push {r4, r5, lr}
802c82a: d10e bne.n 802c84a <__mcmp+0x2a>
802c82c: 3314 adds r3, #20
802c82e: 3114 adds r1, #20
802c830: eb03 0482 add.w r4, r3, r2, lsl #2
802c834: eb01 0182 add.w r1, r1, r2, lsl #2
802c838: f854 5d04 ldr.w r5, [r4, #-4]!
802c83c: f851 2d04 ldr.w r2, [r1, #-4]!
802c840: 4295 cmp r5, r2
802c842: d003 beq.n 802c84c <__mcmp+0x2c>
802c844: d205 bcs.n 802c852 <__mcmp+0x32>
802c846: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802c84a: bd30 pop {r4, r5, pc}
802c84c: 42a3 cmp r3, r4
802c84e: d3f3 bcc.n 802c838 <__mcmp+0x18>
802c850: e7fb b.n 802c84a <__mcmp+0x2a>
802c852: 2001 movs r0, #1
802c854: e7f9 b.n 802c84a <__mcmp+0x2a>
...
0802c858 <__mdiff>:
802c858: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
802c85c: 4689 mov r9, r1
802c85e: 4606 mov r6, r0
802c860: 4611 mov r1, r2
802c862: 4648 mov r0, r9
802c864: 4614 mov r4, r2
802c866: f7ff ffdb bl 802c820 <__mcmp>
802c86a: 1e05 subs r5, r0, #0
802c86c: d112 bne.n 802c894 <__mdiff+0x3c>
802c86e: 4629 mov r1, r5
802c870: 4630 mov r0, r6
802c872: f7ff fd11 bl 802c298 <_Balloc>
802c876: 4602 mov r2, r0
802c878: b928 cbnz r0, 802c886 <__mdiff+0x2e>
802c87a: 4b3f ldr r3, [pc, #252] @ (802c978 <__mdiff+0x120>)
802c87c: f240 2137 movw r1, #567 @ 0x237
802c880: 483e ldr r0, [pc, #248] @ (802c97c <__mdiff+0x124>)
802c882: f7fe fb75 bl 802af70 <__assert_func>
802c886: 2301 movs r3, #1
802c888: e9c0 3504 strd r3, r5, [r0, #16]
802c88c: 4610 mov r0, r2
802c88e: b003 add sp, #12
802c890: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802c894: bfbc itt lt
802c896: 464b movlt r3, r9
802c898: 46a1 movlt r9, r4
802c89a: 4630 mov r0, r6
802c89c: f8d9 1004 ldr.w r1, [r9, #4]
802c8a0: bfba itte lt
802c8a2: 461c movlt r4, r3
802c8a4: 2501 movlt r5, #1
802c8a6: 2500 movge r5, #0
802c8a8: f7ff fcf6 bl 802c298 <_Balloc>
802c8ac: 4602 mov r2, r0
802c8ae: b918 cbnz r0, 802c8b8 <__mdiff+0x60>
802c8b0: 4b31 ldr r3, [pc, #196] @ (802c978 <__mdiff+0x120>)
802c8b2: f240 2145 movw r1, #581 @ 0x245
802c8b6: e7e3 b.n 802c880 <__mdiff+0x28>
802c8b8: f8d9 7010 ldr.w r7, [r9, #16]
802c8bc: 6926 ldr r6, [r4, #16]
802c8be: 60c5 str r5, [r0, #12]
802c8c0: f109 0310 add.w r3, r9, #16
802c8c4: f109 0514 add.w r5, r9, #20
802c8c8: f104 0e14 add.w lr, r4, #20
802c8cc: f100 0b14 add.w fp, r0, #20
802c8d0: eb05 0887 add.w r8, r5, r7, lsl #2
802c8d4: eb0e 0686 add.w r6, lr, r6, lsl #2
802c8d8: 9301 str r3, [sp, #4]
802c8da: 46d9 mov r9, fp
802c8dc: f04f 0c00 mov.w ip, #0
802c8e0: 9b01 ldr r3, [sp, #4]
802c8e2: f85e 0b04 ldr.w r0, [lr], #4
802c8e6: f853 af04 ldr.w sl, [r3, #4]!
802c8ea: 9301 str r3, [sp, #4]
802c8ec: fa1f f38a uxth.w r3, sl
802c8f0: 4619 mov r1, r3
802c8f2: b283 uxth r3, r0
802c8f4: 1acb subs r3, r1, r3
802c8f6: 0c00 lsrs r0, r0, #16
802c8f8: 4463 add r3, ip
802c8fa: ebc0 401a rsb r0, r0, sl, lsr #16
802c8fe: eb00 4023 add.w r0, r0, r3, asr #16
802c902: b29b uxth r3, r3
802c904: ea43 4300 orr.w r3, r3, r0, lsl #16
802c908: 4576 cmp r6, lr
802c90a: f849 3b04 str.w r3, [r9], #4
802c90e: ea4f 4c20 mov.w ip, r0, asr #16
802c912: d8e5 bhi.n 802c8e0 <__mdiff+0x88>
802c914: 1b33 subs r3, r6, r4
802c916: 3b15 subs r3, #21
802c918: f023 0303 bic.w r3, r3, #3
802c91c: 3415 adds r4, #21
802c91e: 3304 adds r3, #4
802c920: 42a6 cmp r6, r4
802c922: bf38 it cc
802c924: 2304 movcc r3, #4
802c926: 441d add r5, r3
802c928: 445b add r3, fp
802c92a: 461e mov r6, r3
802c92c: 462c mov r4, r5
802c92e: 4544 cmp r4, r8
802c930: d30e bcc.n 802c950 <__mdiff+0xf8>
802c932: f108 0103 add.w r1, r8, #3
802c936: 1b49 subs r1, r1, r5
802c938: f021 0103 bic.w r1, r1, #3
802c93c: 3d03 subs r5, #3
802c93e: 45a8 cmp r8, r5
802c940: bf38 it cc
802c942: 2100 movcc r1, #0
802c944: 440b add r3, r1
802c946: f853 1d04 ldr.w r1, [r3, #-4]!
802c94a: b191 cbz r1, 802c972 <__mdiff+0x11a>
802c94c: 6117 str r7, [r2, #16]
802c94e: e79d b.n 802c88c <__mdiff+0x34>
802c950: f854 1b04 ldr.w r1, [r4], #4
802c954: 46e6 mov lr, ip
802c956: 0c08 lsrs r0, r1, #16
802c958: fa1c fc81 uxtah ip, ip, r1
802c95c: 4471 add r1, lr
802c95e: eb00 402c add.w r0, r0, ip, asr #16
802c962: b289 uxth r1, r1
802c964: ea41 4100 orr.w r1, r1, r0, lsl #16
802c968: f846 1b04 str.w r1, [r6], #4
802c96c: ea4f 4c20 mov.w ip, r0, asr #16
802c970: e7dd b.n 802c92e <__mdiff+0xd6>
802c972: 3f01 subs r7, #1
802c974: e7e7 b.n 802c946 <__mdiff+0xee>
802c976: bf00 nop
802c978: 0803217e .word 0x0803217e
802c97c: 080321ef .word 0x080321ef
0802c980 <__ulp>:
802c980: b082 sub sp, #8
802c982: ed8d 0b00 vstr d0, [sp]
802c986: 9a01 ldr r2, [sp, #4]
802c988: 4b0f ldr r3, [pc, #60] @ (802c9c8 <__ulp+0x48>)
802c98a: 4013 ands r3, r2
802c98c: f1a3 7350 sub.w r3, r3, #54525952 @ 0x3400000
802c990: 2b00 cmp r3, #0
802c992: dc08 bgt.n 802c9a6 <__ulp+0x26>
802c994: 425b negs r3, r3
802c996: f1b3 7fa0 cmp.w r3, #20971520 @ 0x1400000
802c99a: ea4f 5223 mov.w r2, r3, asr #20
802c99e: da04 bge.n 802c9aa <__ulp+0x2a>
802c9a0: f44f 2300 mov.w r3, #524288 @ 0x80000
802c9a4: 4113 asrs r3, r2
802c9a6: 2200 movs r2, #0
802c9a8: e008 b.n 802c9bc <__ulp+0x3c>
802c9aa: f1a2 0314 sub.w r3, r2, #20
802c9ae: 2b1e cmp r3, #30
802c9b0: bfda itte le
802c9b2: f04f 4200 movle.w r2, #2147483648 @ 0x80000000
802c9b6: 40da lsrle r2, r3
802c9b8: 2201 movgt r2, #1
802c9ba: 2300 movs r3, #0
802c9bc: 4619 mov r1, r3
802c9be: 4610 mov r0, r2
802c9c0: ec41 0b10 vmov d0, r0, r1
802c9c4: b002 add sp, #8
802c9c6: 4770 bx lr
802c9c8: 7ff00000 .word 0x7ff00000
0802c9cc <__b2d>:
802c9cc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
802c9d0: 6906 ldr r6, [r0, #16]
802c9d2: f100 0814 add.w r8, r0, #20
802c9d6: eb08 0686 add.w r6, r8, r6, lsl #2
802c9da: 1f37 subs r7, r6, #4
802c9dc: f856 2c04 ldr.w r2, [r6, #-4]
802c9e0: 4610 mov r0, r2
802c9e2: f7ff fd4b bl 802c47c <__hi0bits>
802c9e6: f1c0 0320 rsb r3, r0, #32
802c9ea: 280a cmp r0, #10
802c9ec: 600b str r3, [r1, #0]
802c9ee: 491b ldr r1, [pc, #108] @ (802ca5c <__b2d+0x90>)
802c9f0: dc15 bgt.n 802ca1e <__b2d+0x52>
802c9f2: f1c0 0c0b rsb ip, r0, #11
802c9f6: fa22 f30c lsr.w r3, r2, ip
802c9fa: 45b8 cmp r8, r7
802c9fc: ea43 0501 orr.w r5, r3, r1
802ca00: bf34 ite cc
802ca02: f856 3c08 ldrcc.w r3, [r6, #-8]
802ca06: 2300 movcs r3, #0
802ca08: 3015 adds r0, #21
802ca0a: fa02 f000 lsl.w r0, r2, r0
802ca0e: fa23 f30c lsr.w r3, r3, ip
802ca12: 4303 orrs r3, r0
802ca14: 461c mov r4, r3
802ca16: ec45 4b10 vmov d0, r4, r5
802ca1a: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
802ca1e: 45b8 cmp r8, r7
802ca20: bf3a itte cc
802ca22: f856 3c08 ldrcc.w r3, [r6, #-8]
802ca26: f1a6 0708 subcc.w r7, r6, #8
802ca2a: 2300 movcs r3, #0
802ca2c: 380b subs r0, #11
802ca2e: d012 beq.n 802ca56 <__b2d+0x8a>
802ca30: f1c0 0120 rsb r1, r0, #32
802ca34: fa23 f401 lsr.w r4, r3, r1
802ca38: 4082 lsls r2, r0
802ca3a: 4322 orrs r2, r4
802ca3c: 4547 cmp r7, r8
802ca3e: f042 557f orr.w r5, r2, #1069547520 @ 0x3fc00000
802ca42: bf8c ite hi
802ca44: f857 2c04 ldrhi.w r2, [r7, #-4]
802ca48: 2200 movls r2, #0
802ca4a: 4083 lsls r3, r0
802ca4c: 40ca lsrs r2, r1
802ca4e: f445 1540 orr.w r5, r5, #3145728 @ 0x300000
802ca52: 4313 orrs r3, r2
802ca54: e7de b.n 802ca14 <__b2d+0x48>
802ca56: ea42 0501 orr.w r5, r2, r1
802ca5a: e7db b.n 802ca14 <__b2d+0x48>
802ca5c: 3ff00000 .word 0x3ff00000
0802ca60 <__d2b>:
802ca60: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
802ca64: 460f mov r7, r1
802ca66: 2101 movs r1, #1
802ca68: ec59 8b10 vmov r8, r9, d0
802ca6c: 4616 mov r6, r2
802ca6e: f7ff fc13 bl 802c298 <_Balloc>
802ca72: 4604 mov r4, r0
802ca74: b930 cbnz r0, 802ca84 <__d2b+0x24>
802ca76: 4602 mov r2, r0
802ca78: 4b23 ldr r3, [pc, #140] @ (802cb08 <__d2b+0xa8>)
802ca7a: 4824 ldr r0, [pc, #144] @ (802cb0c <__d2b+0xac>)
802ca7c: f240 310f movw r1, #783 @ 0x30f
802ca80: f7fe fa76 bl 802af70 <__assert_func>
802ca84: f3c9 550a ubfx r5, r9, #20, #11
802ca88: f3c9 0313 ubfx r3, r9, #0, #20
802ca8c: b10d cbz r5, 802ca92 <__d2b+0x32>
802ca8e: f443 1380 orr.w r3, r3, #1048576 @ 0x100000
802ca92: 9301 str r3, [sp, #4]
802ca94: f1b8 0300 subs.w r3, r8, #0
802ca98: d023 beq.n 802cae2 <__d2b+0x82>
802ca9a: 4668 mov r0, sp
802ca9c: 9300 str r3, [sp, #0]
802ca9e: f7ff fd0c bl 802c4ba <__lo0bits>
802caa2: e9dd 1200 ldrd r1, r2, [sp]
802caa6: b1d0 cbz r0, 802cade <__d2b+0x7e>
802caa8: f1c0 0320 rsb r3, r0, #32
802caac: fa02 f303 lsl.w r3, r2, r3
802cab0: 430b orrs r3, r1
802cab2: 40c2 lsrs r2, r0
802cab4: 6163 str r3, [r4, #20]
802cab6: 9201 str r2, [sp, #4]
802cab8: 9b01 ldr r3, [sp, #4]
802caba: 61a3 str r3, [r4, #24]
802cabc: 2b00 cmp r3, #0
802cabe: bf0c ite eq
802cac0: 2201 moveq r2, #1
802cac2: 2202 movne r2, #2
802cac4: 6122 str r2, [r4, #16]
802cac6: b1a5 cbz r5, 802caf2 <__d2b+0x92>
802cac8: f2a5 4533 subw r5, r5, #1075 @ 0x433
802cacc: 4405 add r5, r0
802cace: 603d str r5, [r7, #0]
802cad0: f1c0 0035 rsb r0, r0, #53 @ 0x35
802cad4: 6030 str r0, [r6, #0]
802cad6: 4620 mov r0, r4
802cad8: b003 add sp, #12
802cada: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
802cade: 6161 str r1, [r4, #20]
802cae0: e7ea b.n 802cab8 <__d2b+0x58>
802cae2: a801 add r0, sp, #4
802cae4: f7ff fce9 bl 802c4ba <__lo0bits>
802cae8: 9b01 ldr r3, [sp, #4]
802caea: 6163 str r3, [r4, #20]
802caec: 3020 adds r0, #32
802caee: 2201 movs r2, #1
802caf0: e7e8 b.n 802cac4 <__d2b+0x64>
802caf2: eb04 0382 add.w r3, r4, r2, lsl #2
802caf6: f2a0 4032 subw r0, r0, #1074 @ 0x432
802cafa: 6038 str r0, [r7, #0]
802cafc: 6918 ldr r0, [r3, #16]
802cafe: f7ff fcbd bl 802c47c <__hi0bits>
802cb02: ebc0 1042 rsb r0, r0, r2, lsl #5
802cb06: e7e5 b.n 802cad4 <__d2b+0x74>
802cb08: 0803217e .word 0x0803217e
802cb0c: 080321ef .word 0x080321ef
0802cb10 <__ratio>:
802cb10: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
802cb14: 4688 mov r8, r1
802cb16: 4669 mov r1, sp
802cb18: 4681 mov r9, r0
802cb1a: f7ff ff57 bl 802c9cc <__b2d>
802cb1e: a901 add r1, sp, #4
802cb20: 4640 mov r0, r8
802cb22: ec55 4b10 vmov r4, r5, d0
802cb26: f7ff ff51 bl 802c9cc <__b2d>
802cb2a: f8d8 3010 ldr.w r3, [r8, #16]
802cb2e: f8d9 2010 ldr.w r2, [r9, #16]
802cb32: 1ad2 subs r2, r2, r3
802cb34: e9dd 3100 ldrd r3, r1, [sp]
802cb38: 1a5b subs r3, r3, r1
802cb3a: eb03 1342 add.w r3, r3, r2, lsl #5
802cb3e: ec57 6b10 vmov r6, r7, d0
802cb42: 2b00 cmp r3, #0
802cb44: bfd6 itet le
802cb46: ebc3 3303 rsble r3, r3, r3, lsl #12
802cb4a: 462a movgt r2, r5
802cb4c: 463a movle r2, r7
802cb4e: 46ab mov fp, r5
802cb50: 46a2 mov sl, r4
802cb52: bfce itee gt
802cb54: eb02 5b03 addgt.w fp, r2, r3, lsl #20
802cb58: eb02 5303 addle.w r3, r2, r3, lsl #20
802cb5c: ee00 3a90 vmovle s1, r3
802cb60: ec4b ab17 vmov d7, sl, fp
802cb64: ee87 0b00 vdiv.f64 d0, d7, d0
802cb68: b003 add sp, #12
802cb6a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
0802cb6e <__copybits>:
802cb6e: 3901 subs r1, #1
802cb70: b570 push {r4, r5, r6, lr}
802cb72: 1149 asrs r1, r1, #5
802cb74: 6914 ldr r4, [r2, #16]
802cb76: 3101 adds r1, #1
802cb78: f102 0314 add.w r3, r2, #20
802cb7c: eb00 0181 add.w r1, r0, r1, lsl #2
802cb80: eb03 0484 add.w r4, r3, r4, lsl #2
802cb84: 1f05 subs r5, r0, #4
802cb86: 42a3 cmp r3, r4
802cb88: d30c bcc.n 802cba4 <__copybits+0x36>
802cb8a: 1aa3 subs r3, r4, r2
802cb8c: 3b11 subs r3, #17
802cb8e: f023 0303 bic.w r3, r3, #3
802cb92: 3211 adds r2, #17
802cb94: 42a2 cmp r2, r4
802cb96: bf88 it hi
802cb98: 2300 movhi r3, #0
802cb9a: 4418 add r0, r3
802cb9c: 2300 movs r3, #0
802cb9e: 4288 cmp r0, r1
802cba0: d305 bcc.n 802cbae <__copybits+0x40>
802cba2: bd70 pop {r4, r5, r6, pc}
802cba4: f853 6b04 ldr.w r6, [r3], #4
802cba8: f845 6f04 str.w r6, [r5, #4]!
802cbac: e7eb b.n 802cb86 <__copybits+0x18>
802cbae: f840 3b04 str.w r3, [r0], #4
802cbb2: e7f4 b.n 802cb9e <__copybits+0x30>
0802cbb4 <__any_on>:
802cbb4: f100 0214 add.w r2, r0, #20
802cbb8: 6900 ldr r0, [r0, #16]
802cbba: 114b asrs r3, r1, #5
802cbbc: 4298 cmp r0, r3
802cbbe: b510 push {r4, lr}
802cbc0: db11 blt.n 802cbe6 <__any_on+0x32>
802cbc2: dd0a ble.n 802cbda <__any_on+0x26>
802cbc4: f011 011f ands.w r1, r1, #31
802cbc8: d007 beq.n 802cbda <__any_on+0x26>
802cbca: f852 4023 ldr.w r4, [r2, r3, lsl #2]
802cbce: fa24 f001 lsr.w r0, r4, r1
802cbd2: fa00 f101 lsl.w r1, r0, r1
802cbd6: 428c cmp r4, r1
802cbd8: d10b bne.n 802cbf2 <__any_on+0x3e>
802cbda: eb02 0383 add.w r3, r2, r3, lsl #2
802cbde: 4293 cmp r3, r2
802cbe0: d803 bhi.n 802cbea <__any_on+0x36>
802cbe2: 2000 movs r0, #0
802cbe4: bd10 pop {r4, pc}
802cbe6: 4603 mov r3, r0
802cbe8: e7f7 b.n 802cbda <__any_on+0x26>
802cbea: f853 1d04 ldr.w r1, [r3, #-4]!
802cbee: 2900 cmp r1, #0
802cbf0: d0f5 beq.n 802cbde <__any_on+0x2a>
802cbf2: 2001 movs r0, #1
802cbf4: e7f6 b.n 802cbe4 <__any_on+0x30>
0802cbf6 <_malloc_usable_size_r>:
802cbf6: f851 3c04 ldr.w r3, [r1, #-4]
802cbfa: 1f18 subs r0, r3, #4
802cbfc: 2b00 cmp r3, #0
802cbfe: bfbc itt lt
802cc00: 580b ldrlt r3, [r1, r0]
802cc02: 18c0 addlt r0, r0, r3
802cc04: 4770 bx lr
0802cc06 <__ascii_wctomb>:
802cc06: 4603 mov r3, r0
802cc08: 4608 mov r0, r1
802cc0a: b141 cbz r1, 802cc1e <__ascii_wctomb+0x18>
802cc0c: 2aff cmp r2, #255 @ 0xff
802cc0e: d904 bls.n 802cc1a <__ascii_wctomb+0x14>
802cc10: 228a movs r2, #138 @ 0x8a
802cc12: 601a str r2, [r3, #0]
802cc14: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802cc18: 4770 bx lr
802cc1a: 700a strb r2, [r1, #0]
802cc1c: 2001 movs r0, #1
802cc1e: 4770 bx lr
0802cc20 <__ssputs_r>:
802cc20: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
802cc24: 688e ldr r6, [r1, #8]
802cc26: 461f mov r7, r3
802cc28: 42be cmp r6, r7
802cc2a: 680b ldr r3, [r1, #0]
802cc2c: 4682 mov sl, r0
802cc2e: 460c mov r4, r1
802cc30: 4690 mov r8, r2
802cc32: d82d bhi.n 802cc90 <__ssputs_r+0x70>
802cc34: f9b1 200c ldrsh.w r2, [r1, #12]
802cc38: f412 6f90 tst.w r2, #1152 @ 0x480
802cc3c: d026 beq.n 802cc8c <__ssputs_r+0x6c>
802cc3e: 6965 ldr r5, [r4, #20]
802cc40: 6909 ldr r1, [r1, #16]
802cc42: eb05 0545 add.w r5, r5, r5, lsl #1
802cc46: eba3 0901 sub.w r9, r3, r1
802cc4a: eb05 75d5 add.w r5, r5, r5, lsr #31
802cc4e: 1c7b adds r3, r7, #1
802cc50: 444b add r3, r9
802cc52: 106d asrs r5, r5, #1
802cc54: 429d cmp r5, r3
802cc56: bf38 it cc
802cc58: 461d movcc r5, r3
802cc5a: 0553 lsls r3, r2, #21
802cc5c: d527 bpl.n 802ccae <__ssputs_r+0x8e>
802cc5e: 4629 mov r1, r5
802cc60: f7fc fb2e bl 80292c0 <_malloc_r>
802cc64: 4606 mov r6, r0
802cc66: b360 cbz r0, 802ccc2 <__ssputs_r+0xa2>
802cc68: 6921 ldr r1, [r4, #16]
802cc6a: 464a mov r2, r9
802cc6c: f7fe f967 bl 802af3e <memcpy>
802cc70: 89a3 ldrh r3, [r4, #12]
802cc72: f423 6390 bic.w r3, r3, #1152 @ 0x480
802cc76: f043 0380 orr.w r3, r3, #128 @ 0x80
802cc7a: 81a3 strh r3, [r4, #12]
802cc7c: 6126 str r6, [r4, #16]
802cc7e: 6165 str r5, [r4, #20]
802cc80: 444e add r6, r9
802cc82: eba5 0509 sub.w r5, r5, r9
802cc86: 6026 str r6, [r4, #0]
802cc88: 60a5 str r5, [r4, #8]
802cc8a: 463e mov r6, r7
802cc8c: 42be cmp r6, r7
802cc8e: d900 bls.n 802cc92 <__ssputs_r+0x72>
802cc90: 463e mov r6, r7
802cc92: 6820 ldr r0, [r4, #0]
802cc94: 4632 mov r2, r6
802cc96: 4641 mov r1, r8
802cc98: f7fe f840 bl 802ad1c <memmove>
802cc9c: 68a3 ldr r3, [r4, #8]
802cc9e: 1b9b subs r3, r3, r6
802cca0: 60a3 str r3, [r4, #8]
802cca2: 6823 ldr r3, [r4, #0]
802cca4: 4433 add r3, r6
802cca6: 6023 str r3, [r4, #0]
802cca8: 2000 movs r0, #0
802ccaa: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
802ccae: 462a mov r2, r5
802ccb0: f7fc fbd8 bl 8029464 <_realloc_r>
802ccb4: 4606 mov r6, r0
802ccb6: 2800 cmp r0, #0
802ccb8: d1e0 bne.n 802cc7c <__ssputs_r+0x5c>
802ccba: 6921 ldr r1, [r4, #16]
802ccbc: 4650 mov r0, sl
802ccbe: f7fe ff55 bl 802bb6c <_free_r>
802ccc2: 230c movs r3, #12
802ccc4: f8ca 3000 str.w r3, [sl]
802ccc8: 89a3 ldrh r3, [r4, #12]
802ccca: f043 0340 orr.w r3, r3, #64 @ 0x40
802ccce: 81a3 strh r3, [r4, #12]
802ccd0: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802ccd4: e7e9 b.n 802ccaa <__ssputs_r+0x8a>
...
0802ccd8 <_svfiprintf_r>:
802ccd8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
802ccdc: 4698 mov r8, r3
802ccde: 898b ldrh r3, [r1, #12]
802cce0: 061b lsls r3, r3, #24
802cce2: b09d sub sp, #116 @ 0x74
802cce4: 4607 mov r7, r0
802cce6: 460d mov r5, r1
802cce8: 4614 mov r4, r2
802ccea: d510 bpl.n 802cd0e <_svfiprintf_r+0x36>
802ccec: 690b ldr r3, [r1, #16]
802ccee: b973 cbnz r3, 802cd0e <_svfiprintf_r+0x36>
802ccf0: 2140 movs r1, #64 @ 0x40
802ccf2: f7fc fae5 bl 80292c0 <_malloc_r>
802ccf6: 6028 str r0, [r5, #0]
802ccf8: 6128 str r0, [r5, #16]
802ccfa: b930 cbnz r0, 802cd0a <_svfiprintf_r+0x32>
802ccfc: 230c movs r3, #12
802ccfe: 603b str r3, [r7, #0]
802cd00: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802cd04: b01d add sp, #116 @ 0x74
802cd06: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802cd0a: 2340 movs r3, #64 @ 0x40
802cd0c: 616b str r3, [r5, #20]
802cd0e: 2300 movs r3, #0
802cd10: 9309 str r3, [sp, #36] @ 0x24
802cd12: 2320 movs r3, #32
802cd14: f88d 3029 strb.w r3, [sp, #41] @ 0x29
802cd18: f8cd 800c str.w r8, [sp, #12]
802cd1c: 2330 movs r3, #48 @ 0x30
802cd1e: f8df 819c ldr.w r8, [pc, #412] @ 802cebc <_svfiprintf_r+0x1e4>
802cd22: f88d 302a strb.w r3, [sp, #42] @ 0x2a
802cd26: f04f 0901 mov.w r9, #1
802cd2a: 4623 mov r3, r4
802cd2c: 469a mov sl, r3
802cd2e: f813 2b01 ldrb.w r2, [r3], #1
802cd32: b10a cbz r2, 802cd38 <_svfiprintf_r+0x60>
802cd34: 2a25 cmp r2, #37 @ 0x25
802cd36: d1f9 bne.n 802cd2c <_svfiprintf_r+0x54>
802cd38: ebba 0b04 subs.w fp, sl, r4
802cd3c: d00b beq.n 802cd56 <_svfiprintf_r+0x7e>
802cd3e: 465b mov r3, fp
802cd40: 4622 mov r2, r4
802cd42: 4629 mov r1, r5
802cd44: 4638 mov r0, r7
802cd46: f7ff ff6b bl 802cc20 <__ssputs_r>
802cd4a: 3001 adds r0, #1
802cd4c: f000 80a7 beq.w 802ce9e <_svfiprintf_r+0x1c6>
802cd50: 9a09 ldr r2, [sp, #36] @ 0x24
802cd52: 445a add r2, fp
802cd54: 9209 str r2, [sp, #36] @ 0x24
802cd56: f89a 3000 ldrb.w r3, [sl]
802cd5a: 2b00 cmp r3, #0
802cd5c: f000 809f beq.w 802ce9e <_svfiprintf_r+0x1c6>
802cd60: 2300 movs r3, #0
802cd62: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
802cd66: e9cd 2305 strd r2, r3, [sp, #20]
802cd6a: f10a 0a01 add.w sl, sl, #1
802cd6e: 9304 str r3, [sp, #16]
802cd70: 9307 str r3, [sp, #28]
802cd72: f88d 3053 strb.w r3, [sp, #83] @ 0x53
802cd76: 931a str r3, [sp, #104] @ 0x68
802cd78: 4654 mov r4, sl
802cd7a: 2205 movs r2, #5
802cd7c: f814 1b01 ldrb.w r1, [r4], #1
802cd80: 484e ldr r0, [pc, #312] @ (802cebc <_svfiprintf_r+0x1e4>)
802cd82: f7d3 fabd bl 8000300 <memchr>
802cd86: 9a04 ldr r2, [sp, #16]
802cd88: b9d8 cbnz r0, 802cdc2 <_svfiprintf_r+0xea>
802cd8a: 06d0 lsls r0, r2, #27
802cd8c: bf44 itt mi
802cd8e: 2320 movmi r3, #32
802cd90: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
802cd94: 0711 lsls r1, r2, #28
802cd96: bf44 itt mi
802cd98: 232b movmi r3, #43 @ 0x2b
802cd9a: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
802cd9e: f89a 3000 ldrb.w r3, [sl]
802cda2: 2b2a cmp r3, #42 @ 0x2a
802cda4: d015 beq.n 802cdd2 <_svfiprintf_r+0xfa>
802cda6: 9a07 ldr r2, [sp, #28]
802cda8: 4654 mov r4, sl
802cdaa: 2000 movs r0, #0
802cdac: f04f 0c0a mov.w ip, #10
802cdb0: 4621 mov r1, r4
802cdb2: f811 3b01 ldrb.w r3, [r1], #1
802cdb6: 3b30 subs r3, #48 @ 0x30
802cdb8: 2b09 cmp r3, #9
802cdba: d94b bls.n 802ce54 <_svfiprintf_r+0x17c>
802cdbc: b1b0 cbz r0, 802cdec <_svfiprintf_r+0x114>
802cdbe: 9207 str r2, [sp, #28]
802cdc0: e014 b.n 802cdec <_svfiprintf_r+0x114>
802cdc2: eba0 0308 sub.w r3, r0, r8
802cdc6: fa09 f303 lsl.w r3, r9, r3
802cdca: 4313 orrs r3, r2
802cdcc: 9304 str r3, [sp, #16]
802cdce: 46a2 mov sl, r4
802cdd0: e7d2 b.n 802cd78 <_svfiprintf_r+0xa0>
802cdd2: 9b03 ldr r3, [sp, #12]
802cdd4: 1d19 adds r1, r3, #4
802cdd6: 681b ldr r3, [r3, #0]
802cdd8: 9103 str r1, [sp, #12]
802cdda: 2b00 cmp r3, #0
802cddc: bfbb ittet lt
802cdde: 425b neglt r3, r3
802cde0: f042 0202 orrlt.w r2, r2, #2
802cde4: 9307 strge r3, [sp, #28]
802cde6: 9307 strlt r3, [sp, #28]
802cde8: bfb8 it lt
802cdea: 9204 strlt r2, [sp, #16]
802cdec: 7823 ldrb r3, [r4, #0]
802cdee: 2b2e cmp r3, #46 @ 0x2e
802cdf0: d10a bne.n 802ce08 <_svfiprintf_r+0x130>
802cdf2: 7863 ldrb r3, [r4, #1]
802cdf4: 2b2a cmp r3, #42 @ 0x2a
802cdf6: d132 bne.n 802ce5e <_svfiprintf_r+0x186>
802cdf8: 9b03 ldr r3, [sp, #12]
802cdfa: 1d1a adds r2, r3, #4
802cdfc: 681b ldr r3, [r3, #0]
802cdfe: 9203 str r2, [sp, #12]
802ce00: ea43 73e3 orr.w r3, r3, r3, asr #31
802ce04: 3402 adds r4, #2
802ce06: 9305 str r3, [sp, #20]
802ce08: f8df a0c0 ldr.w sl, [pc, #192] @ 802cecc <_svfiprintf_r+0x1f4>
802ce0c: 7821 ldrb r1, [r4, #0]
802ce0e: 2203 movs r2, #3
802ce10: 4650 mov r0, sl
802ce12: f7d3 fa75 bl 8000300 <memchr>
802ce16: b138 cbz r0, 802ce28 <_svfiprintf_r+0x150>
802ce18: 9b04 ldr r3, [sp, #16]
802ce1a: eba0 000a sub.w r0, r0, sl
802ce1e: 2240 movs r2, #64 @ 0x40
802ce20: 4082 lsls r2, r0
802ce22: 4313 orrs r3, r2
802ce24: 3401 adds r4, #1
802ce26: 9304 str r3, [sp, #16]
802ce28: f814 1b01 ldrb.w r1, [r4], #1
802ce2c: 4824 ldr r0, [pc, #144] @ (802cec0 <_svfiprintf_r+0x1e8>)
802ce2e: f88d 1028 strb.w r1, [sp, #40] @ 0x28
802ce32: 2206 movs r2, #6
802ce34: f7d3 fa64 bl 8000300 <memchr>
802ce38: 2800 cmp r0, #0
802ce3a: d036 beq.n 802ceaa <_svfiprintf_r+0x1d2>
802ce3c: 4b21 ldr r3, [pc, #132] @ (802cec4 <_svfiprintf_r+0x1ec>)
802ce3e: bb1b cbnz r3, 802ce88 <_svfiprintf_r+0x1b0>
802ce40: 9b03 ldr r3, [sp, #12]
802ce42: 3307 adds r3, #7
802ce44: f023 0307 bic.w r3, r3, #7
802ce48: 3308 adds r3, #8
802ce4a: 9303 str r3, [sp, #12]
802ce4c: 9b09 ldr r3, [sp, #36] @ 0x24
802ce4e: 4433 add r3, r6
802ce50: 9309 str r3, [sp, #36] @ 0x24
802ce52: e76a b.n 802cd2a <_svfiprintf_r+0x52>
802ce54: fb0c 3202 mla r2, ip, r2, r3
802ce58: 460c mov r4, r1
802ce5a: 2001 movs r0, #1
802ce5c: e7a8 b.n 802cdb0 <_svfiprintf_r+0xd8>
802ce5e: 2300 movs r3, #0
802ce60: 3401 adds r4, #1
802ce62: 9305 str r3, [sp, #20]
802ce64: 4619 mov r1, r3
802ce66: f04f 0c0a mov.w ip, #10
802ce6a: 4620 mov r0, r4
802ce6c: f810 2b01 ldrb.w r2, [r0], #1
802ce70: 3a30 subs r2, #48 @ 0x30
802ce72: 2a09 cmp r2, #9
802ce74: d903 bls.n 802ce7e <_svfiprintf_r+0x1a6>
802ce76: 2b00 cmp r3, #0
802ce78: d0c6 beq.n 802ce08 <_svfiprintf_r+0x130>
802ce7a: 9105 str r1, [sp, #20]
802ce7c: e7c4 b.n 802ce08 <_svfiprintf_r+0x130>
802ce7e: fb0c 2101 mla r1, ip, r1, r2
802ce82: 4604 mov r4, r0
802ce84: 2301 movs r3, #1
802ce86: e7f0 b.n 802ce6a <_svfiprintf_r+0x192>
802ce88: ab03 add r3, sp, #12
802ce8a: 9300 str r3, [sp, #0]
802ce8c: 462a mov r2, r5
802ce8e: 4b0e ldr r3, [pc, #56] @ (802cec8 <_svfiprintf_r+0x1f0>)
802ce90: a904 add r1, sp, #16
802ce92: 4638 mov r0, r7
802ce94: f7fd f960 bl 802a158 <_printf_float>
802ce98: 1c42 adds r2, r0, #1
802ce9a: 4606 mov r6, r0
802ce9c: d1d6 bne.n 802ce4c <_svfiprintf_r+0x174>
802ce9e: 89ab ldrh r3, [r5, #12]
802cea0: 065b lsls r3, r3, #25
802cea2: f53f af2d bmi.w 802cd00 <_svfiprintf_r+0x28>
802cea6: 9809 ldr r0, [sp, #36] @ 0x24
802cea8: e72c b.n 802cd04 <_svfiprintf_r+0x2c>
802ceaa: ab03 add r3, sp, #12
802ceac: 9300 str r3, [sp, #0]
802ceae: 462a mov r2, r5
802ceb0: 4b05 ldr r3, [pc, #20] @ (802cec8 <_svfiprintf_r+0x1f0>)
802ceb2: a904 add r1, sp, #16
802ceb4: 4638 mov r0, r7
802ceb6: f7fd fbd7 bl 802a668 <_printf_i>
802ceba: e7ed b.n 802ce98 <_svfiprintf_r+0x1c0>
802cebc: 08032348 .word 0x08032348
802cec0: 08032352 .word 0x08032352
802cec4: 0802a159 .word 0x0802a159
802cec8: 0802cc21 .word 0x0802cc21
802cecc: 0803234e .word 0x0803234e
0802ced0 <__sfputc_r>:
802ced0: 6893 ldr r3, [r2, #8]
802ced2: 3b01 subs r3, #1
802ced4: 2b00 cmp r3, #0
802ced6: b410 push {r4}
802ced8: 6093 str r3, [r2, #8]
802ceda: da08 bge.n 802ceee <__sfputc_r+0x1e>
802cedc: 6994 ldr r4, [r2, #24]
802cede: 42a3 cmp r3, r4
802cee0: db01 blt.n 802cee6 <__sfputc_r+0x16>
802cee2: 290a cmp r1, #10
802cee4: d103 bne.n 802ceee <__sfputc_r+0x1e>
802cee6: f85d 4b04 ldr.w r4, [sp], #4
802ceea: f7fd be72 b.w 802abd2 <__swbuf_r>
802ceee: 6813 ldr r3, [r2, #0]
802cef0: 1c58 adds r0, r3, #1
802cef2: 6010 str r0, [r2, #0]
802cef4: 7019 strb r1, [r3, #0]
802cef6: 4608 mov r0, r1
802cef8: f85d 4b04 ldr.w r4, [sp], #4
802cefc: 4770 bx lr
0802cefe <__sfputs_r>:
802cefe: b5f8 push {r3, r4, r5, r6, r7, lr}
802cf00: 4606 mov r6, r0
802cf02: 460f mov r7, r1
802cf04: 4614 mov r4, r2
802cf06: 18d5 adds r5, r2, r3
802cf08: 42ac cmp r4, r5
802cf0a: d101 bne.n 802cf10 <__sfputs_r+0x12>
802cf0c: 2000 movs r0, #0
802cf0e: e007 b.n 802cf20 <__sfputs_r+0x22>
802cf10: f814 1b01 ldrb.w r1, [r4], #1
802cf14: 463a mov r2, r7
802cf16: 4630 mov r0, r6
802cf18: f7ff ffda bl 802ced0 <__sfputc_r>
802cf1c: 1c43 adds r3, r0, #1
802cf1e: d1f3 bne.n 802cf08 <__sfputs_r+0xa>
802cf20: bdf8 pop {r3, r4, r5, r6, r7, pc}
...
0802cf24 <_vfiprintf_r>:
802cf24: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
802cf28: 460d mov r5, r1
802cf2a: b09d sub sp, #116 @ 0x74
802cf2c: 4614 mov r4, r2
802cf2e: 4698 mov r8, r3
802cf30: 4606 mov r6, r0
802cf32: b118 cbz r0, 802cf3c <_vfiprintf_r+0x18>
802cf34: 6a03 ldr r3, [r0, #32]
802cf36: b90b cbnz r3, 802cf3c <_vfiprintf_r+0x18>
802cf38: f7fd fd42 bl 802a9c0 <__sinit>
802cf3c: 6e6b ldr r3, [r5, #100] @ 0x64
802cf3e: 07d9 lsls r1, r3, #31
802cf40: d405 bmi.n 802cf4e <_vfiprintf_r+0x2a>
802cf42: 89ab ldrh r3, [r5, #12]
802cf44: 059a lsls r2, r3, #22
802cf46: d402 bmi.n 802cf4e <_vfiprintf_r+0x2a>
802cf48: 6da8 ldr r0, [r5, #88] @ 0x58
802cf4a: f7fd fff6 bl 802af3a <__retarget_lock_acquire_recursive>
802cf4e: 89ab ldrh r3, [r5, #12]
802cf50: 071b lsls r3, r3, #28
802cf52: d501 bpl.n 802cf58 <_vfiprintf_r+0x34>
802cf54: 692b ldr r3, [r5, #16]
802cf56: b99b cbnz r3, 802cf80 <_vfiprintf_r+0x5c>
802cf58: 4629 mov r1, r5
802cf5a: 4630 mov r0, r6
802cf5c: f7fd fe78 bl 802ac50 <__swsetup_r>
802cf60: b170 cbz r0, 802cf80 <_vfiprintf_r+0x5c>
802cf62: 6e6b ldr r3, [r5, #100] @ 0x64
802cf64: 07dc lsls r4, r3, #31
802cf66: d504 bpl.n 802cf72 <_vfiprintf_r+0x4e>
802cf68: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802cf6c: b01d add sp, #116 @ 0x74
802cf6e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
802cf72: 89ab ldrh r3, [r5, #12]
802cf74: 0598 lsls r0, r3, #22
802cf76: d4f7 bmi.n 802cf68 <_vfiprintf_r+0x44>
802cf78: 6da8 ldr r0, [r5, #88] @ 0x58
802cf7a: f7fd ffdf bl 802af3c <__retarget_lock_release_recursive>
802cf7e: e7f3 b.n 802cf68 <_vfiprintf_r+0x44>
802cf80: 2300 movs r3, #0
802cf82: 9309 str r3, [sp, #36] @ 0x24
802cf84: 2320 movs r3, #32
802cf86: f88d 3029 strb.w r3, [sp, #41] @ 0x29
802cf8a: f8cd 800c str.w r8, [sp, #12]
802cf8e: 2330 movs r3, #48 @ 0x30
802cf90: f8df 81ac ldr.w r8, [pc, #428] @ 802d140 <_vfiprintf_r+0x21c>
802cf94: f88d 302a strb.w r3, [sp, #42] @ 0x2a
802cf98: f04f 0901 mov.w r9, #1
802cf9c: 4623 mov r3, r4
802cf9e: 469a mov sl, r3
802cfa0: f813 2b01 ldrb.w r2, [r3], #1
802cfa4: b10a cbz r2, 802cfaa <_vfiprintf_r+0x86>
802cfa6: 2a25 cmp r2, #37 @ 0x25
802cfa8: d1f9 bne.n 802cf9e <_vfiprintf_r+0x7a>
802cfaa: ebba 0b04 subs.w fp, sl, r4
802cfae: d00b beq.n 802cfc8 <_vfiprintf_r+0xa4>
802cfb0: 465b mov r3, fp
802cfb2: 4622 mov r2, r4
802cfb4: 4629 mov r1, r5
802cfb6: 4630 mov r0, r6
802cfb8: f7ff ffa1 bl 802cefe <__sfputs_r>
802cfbc: 3001 adds r0, #1
802cfbe: f000 80a7 beq.w 802d110 <_vfiprintf_r+0x1ec>
802cfc2: 9a09 ldr r2, [sp, #36] @ 0x24
802cfc4: 445a add r2, fp
802cfc6: 9209 str r2, [sp, #36] @ 0x24
802cfc8: f89a 3000 ldrb.w r3, [sl]
802cfcc: 2b00 cmp r3, #0
802cfce: f000 809f beq.w 802d110 <_vfiprintf_r+0x1ec>
802cfd2: 2300 movs r3, #0
802cfd4: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
802cfd8: e9cd 2305 strd r2, r3, [sp, #20]
802cfdc: f10a 0a01 add.w sl, sl, #1
802cfe0: 9304 str r3, [sp, #16]
802cfe2: 9307 str r3, [sp, #28]
802cfe4: f88d 3053 strb.w r3, [sp, #83] @ 0x53
802cfe8: 931a str r3, [sp, #104] @ 0x68
802cfea: 4654 mov r4, sl
802cfec: 2205 movs r2, #5
802cfee: f814 1b01 ldrb.w r1, [r4], #1
802cff2: 4853 ldr r0, [pc, #332] @ (802d140 <_vfiprintf_r+0x21c>)
802cff4: f7d3 f984 bl 8000300 <memchr>
802cff8: 9a04 ldr r2, [sp, #16]
802cffa: b9d8 cbnz r0, 802d034 <_vfiprintf_r+0x110>
802cffc: 06d1 lsls r1, r2, #27
802cffe: bf44 itt mi
802d000: 2320 movmi r3, #32
802d002: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
802d006: 0713 lsls r3, r2, #28
802d008: bf44 itt mi
802d00a: 232b movmi r3, #43 @ 0x2b
802d00c: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
802d010: f89a 3000 ldrb.w r3, [sl]
802d014: 2b2a cmp r3, #42 @ 0x2a
802d016: d015 beq.n 802d044 <_vfiprintf_r+0x120>
802d018: 9a07 ldr r2, [sp, #28]
802d01a: 4654 mov r4, sl
802d01c: 2000 movs r0, #0
802d01e: f04f 0c0a mov.w ip, #10
802d022: 4621 mov r1, r4
802d024: f811 3b01 ldrb.w r3, [r1], #1
802d028: 3b30 subs r3, #48 @ 0x30
802d02a: 2b09 cmp r3, #9
802d02c: d94b bls.n 802d0c6 <_vfiprintf_r+0x1a2>
802d02e: b1b0 cbz r0, 802d05e <_vfiprintf_r+0x13a>
802d030: 9207 str r2, [sp, #28]
802d032: e014 b.n 802d05e <_vfiprintf_r+0x13a>
802d034: eba0 0308 sub.w r3, r0, r8
802d038: fa09 f303 lsl.w r3, r9, r3
802d03c: 4313 orrs r3, r2
802d03e: 9304 str r3, [sp, #16]
802d040: 46a2 mov sl, r4
802d042: e7d2 b.n 802cfea <_vfiprintf_r+0xc6>
802d044: 9b03 ldr r3, [sp, #12]
802d046: 1d19 adds r1, r3, #4
802d048: 681b ldr r3, [r3, #0]
802d04a: 9103 str r1, [sp, #12]
802d04c: 2b00 cmp r3, #0
802d04e: bfbb ittet lt
802d050: 425b neglt r3, r3
802d052: f042 0202 orrlt.w r2, r2, #2
802d056: 9307 strge r3, [sp, #28]
802d058: 9307 strlt r3, [sp, #28]
802d05a: bfb8 it lt
802d05c: 9204 strlt r2, [sp, #16]
802d05e: 7823 ldrb r3, [r4, #0]
802d060: 2b2e cmp r3, #46 @ 0x2e
802d062: d10a bne.n 802d07a <_vfiprintf_r+0x156>
802d064: 7863 ldrb r3, [r4, #1]
802d066: 2b2a cmp r3, #42 @ 0x2a
802d068: d132 bne.n 802d0d0 <_vfiprintf_r+0x1ac>
802d06a: 9b03 ldr r3, [sp, #12]
802d06c: 1d1a adds r2, r3, #4
802d06e: 681b ldr r3, [r3, #0]
802d070: 9203 str r2, [sp, #12]
802d072: ea43 73e3 orr.w r3, r3, r3, asr #31
802d076: 3402 adds r4, #2
802d078: 9305 str r3, [sp, #20]
802d07a: f8df a0d4 ldr.w sl, [pc, #212] @ 802d150 <_vfiprintf_r+0x22c>
802d07e: 7821 ldrb r1, [r4, #0]
802d080: 2203 movs r2, #3
802d082: 4650 mov r0, sl
802d084: f7d3 f93c bl 8000300 <memchr>
802d088: b138 cbz r0, 802d09a <_vfiprintf_r+0x176>
802d08a: 9b04 ldr r3, [sp, #16]
802d08c: eba0 000a sub.w r0, r0, sl
802d090: 2240 movs r2, #64 @ 0x40
802d092: 4082 lsls r2, r0
802d094: 4313 orrs r3, r2
802d096: 3401 adds r4, #1
802d098: 9304 str r3, [sp, #16]
802d09a: f814 1b01 ldrb.w r1, [r4], #1
802d09e: 4829 ldr r0, [pc, #164] @ (802d144 <_vfiprintf_r+0x220>)
802d0a0: f88d 1028 strb.w r1, [sp, #40] @ 0x28
802d0a4: 2206 movs r2, #6
802d0a6: f7d3 f92b bl 8000300 <memchr>
802d0aa: 2800 cmp r0, #0
802d0ac: d03f beq.n 802d12e <_vfiprintf_r+0x20a>
802d0ae: 4b26 ldr r3, [pc, #152] @ (802d148 <_vfiprintf_r+0x224>)
802d0b0: bb1b cbnz r3, 802d0fa <_vfiprintf_r+0x1d6>
802d0b2: 9b03 ldr r3, [sp, #12]
802d0b4: 3307 adds r3, #7
802d0b6: f023 0307 bic.w r3, r3, #7
802d0ba: 3308 adds r3, #8
802d0bc: 9303 str r3, [sp, #12]
802d0be: 9b09 ldr r3, [sp, #36] @ 0x24
802d0c0: 443b add r3, r7
802d0c2: 9309 str r3, [sp, #36] @ 0x24
802d0c4: e76a b.n 802cf9c <_vfiprintf_r+0x78>
802d0c6: fb0c 3202 mla r2, ip, r2, r3
802d0ca: 460c mov r4, r1
802d0cc: 2001 movs r0, #1
802d0ce: e7a8 b.n 802d022 <_vfiprintf_r+0xfe>
802d0d0: 2300 movs r3, #0
802d0d2: 3401 adds r4, #1
802d0d4: 9305 str r3, [sp, #20]
802d0d6: 4619 mov r1, r3
802d0d8: f04f 0c0a mov.w ip, #10
802d0dc: 4620 mov r0, r4
802d0de: f810 2b01 ldrb.w r2, [r0], #1
802d0e2: 3a30 subs r2, #48 @ 0x30
802d0e4: 2a09 cmp r2, #9
802d0e6: d903 bls.n 802d0f0 <_vfiprintf_r+0x1cc>
802d0e8: 2b00 cmp r3, #0
802d0ea: d0c6 beq.n 802d07a <_vfiprintf_r+0x156>
802d0ec: 9105 str r1, [sp, #20]
802d0ee: e7c4 b.n 802d07a <_vfiprintf_r+0x156>
802d0f0: fb0c 2101 mla r1, ip, r1, r2
802d0f4: 4604 mov r4, r0
802d0f6: 2301 movs r3, #1
802d0f8: e7f0 b.n 802d0dc <_vfiprintf_r+0x1b8>
802d0fa: ab03 add r3, sp, #12
802d0fc: 9300 str r3, [sp, #0]
802d0fe: 462a mov r2, r5
802d100: 4b12 ldr r3, [pc, #72] @ (802d14c <_vfiprintf_r+0x228>)
802d102: a904 add r1, sp, #16
802d104: 4630 mov r0, r6
802d106: f7fd f827 bl 802a158 <_printf_float>
802d10a: 4607 mov r7, r0
802d10c: 1c78 adds r0, r7, #1
802d10e: d1d6 bne.n 802d0be <_vfiprintf_r+0x19a>
802d110: 6e6b ldr r3, [r5, #100] @ 0x64
802d112: 07d9 lsls r1, r3, #31
802d114: d405 bmi.n 802d122 <_vfiprintf_r+0x1fe>
802d116: 89ab ldrh r3, [r5, #12]
802d118: 059a lsls r2, r3, #22
802d11a: d402 bmi.n 802d122 <_vfiprintf_r+0x1fe>
802d11c: 6da8 ldr r0, [r5, #88] @ 0x58
802d11e: f7fd ff0d bl 802af3c <__retarget_lock_release_recursive>
802d122: 89ab ldrh r3, [r5, #12]
802d124: 065b lsls r3, r3, #25
802d126: f53f af1f bmi.w 802cf68 <_vfiprintf_r+0x44>
802d12a: 9809 ldr r0, [sp, #36] @ 0x24
802d12c: e71e b.n 802cf6c <_vfiprintf_r+0x48>
802d12e: ab03 add r3, sp, #12
802d130: 9300 str r3, [sp, #0]
802d132: 462a mov r2, r5
802d134: 4b05 ldr r3, [pc, #20] @ (802d14c <_vfiprintf_r+0x228>)
802d136: a904 add r1, sp, #16
802d138: 4630 mov r0, r6
802d13a: f7fd fa95 bl 802a668 <_printf_i>
802d13e: e7e4 b.n 802d10a <_vfiprintf_r+0x1e6>
802d140: 08032348 .word 0x08032348
802d144: 08032352 .word 0x08032352
802d148: 0802a159 .word 0x0802a159
802d14c: 0802ceff .word 0x0802ceff
802d150: 0803234e .word 0x0803234e
0802d154 <__sflush_r>:
802d154: f9b1 200c ldrsh.w r2, [r1, #12]
802d158: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
802d15c: 0716 lsls r6, r2, #28
802d15e: 4605 mov r5, r0
802d160: 460c mov r4, r1
802d162: d454 bmi.n 802d20e <__sflush_r+0xba>
802d164: 684b ldr r3, [r1, #4]
802d166: 2b00 cmp r3, #0
802d168: dc02 bgt.n 802d170 <__sflush_r+0x1c>
802d16a: 6c0b ldr r3, [r1, #64] @ 0x40
802d16c: 2b00 cmp r3, #0
802d16e: dd48 ble.n 802d202 <__sflush_r+0xae>
802d170: 6ae6 ldr r6, [r4, #44] @ 0x2c
802d172: 2e00 cmp r6, #0
802d174: d045 beq.n 802d202 <__sflush_r+0xae>
802d176: 2300 movs r3, #0
802d178: f412 5280 ands.w r2, r2, #4096 @ 0x1000
802d17c: 682f ldr r7, [r5, #0]
802d17e: 6a21 ldr r1, [r4, #32]
802d180: 602b str r3, [r5, #0]
802d182: d030 beq.n 802d1e6 <__sflush_r+0x92>
802d184: 6d62 ldr r2, [r4, #84] @ 0x54
802d186: 89a3 ldrh r3, [r4, #12]
802d188: 0759 lsls r1, r3, #29
802d18a: d505 bpl.n 802d198 <__sflush_r+0x44>
802d18c: 6863 ldr r3, [r4, #4]
802d18e: 1ad2 subs r2, r2, r3
802d190: 6b63 ldr r3, [r4, #52] @ 0x34
802d192: b10b cbz r3, 802d198 <__sflush_r+0x44>
802d194: 6c23 ldr r3, [r4, #64] @ 0x40
802d196: 1ad2 subs r2, r2, r3
802d198: 2300 movs r3, #0
802d19a: 6ae6 ldr r6, [r4, #44] @ 0x2c
802d19c: 6a21 ldr r1, [r4, #32]
802d19e: 4628 mov r0, r5
802d1a0: 47b0 blx r6
802d1a2: 1c43 adds r3, r0, #1
802d1a4: 89a3 ldrh r3, [r4, #12]
802d1a6: d106 bne.n 802d1b6 <__sflush_r+0x62>
802d1a8: 6829 ldr r1, [r5, #0]
802d1aa: 291d cmp r1, #29
802d1ac: d82b bhi.n 802d206 <__sflush_r+0xb2>
802d1ae: 4a2a ldr r2, [pc, #168] @ (802d258 <__sflush_r+0x104>)
802d1b0: 410a asrs r2, r1
802d1b2: 07d6 lsls r6, r2, #31
802d1b4: d427 bmi.n 802d206 <__sflush_r+0xb2>
802d1b6: 2200 movs r2, #0
802d1b8: 6062 str r2, [r4, #4]
802d1ba: 04d9 lsls r1, r3, #19
802d1bc: 6922 ldr r2, [r4, #16]
802d1be: 6022 str r2, [r4, #0]
802d1c0: d504 bpl.n 802d1cc <__sflush_r+0x78>
802d1c2: 1c42 adds r2, r0, #1
802d1c4: d101 bne.n 802d1ca <__sflush_r+0x76>
802d1c6: 682b ldr r3, [r5, #0]
802d1c8: b903 cbnz r3, 802d1cc <__sflush_r+0x78>
802d1ca: 6560 str r0, [r4, #84] @ 0x54
802d1cc: 6b61 ldr r1, [r4, #52] @ 0x34
802d1ce: 602f str r7, [r5, #0]
802d1d0: b1b9 cbz r1, 802d202 <__sflush_r+0xae>
802d1d2: f104 0344 add.w r3, r4, #68 @ 0x44
802d1d6: 4299 cmp r1, r3
802d1d8: d002 beq.n 802d1e0 <__sflush_r+0x8c>
802d1da: 4628 mov r0, r5
802d1dc: f7fe fcc6 bl 802bb6c <_free_r>
802d1e0: 2300 movs r3, #0
802d1e2: 6363 str r3, [r4, #52] @ 0x34
802d1e4: e00d b.n 802d202 <__sflush_r+0xae>
802d1e6: 2301 movs r3, #1
802d1e8: 4628 mov r0, r5
802d1ea: 47b0 blx r6
802d1ec: 4602 mov r2, r0
802d1ee: 1c50 adds r0, r2, #1
802d1f0: d1c9 bne.n 802d186 <__sflush_r+0x32>
802d1f2: 682b ldr r3, [r5, #0]
802d1f4: 2b00 cmp r3, #0
802d1f6: d0c6 beq.n 802d186 <__sflush_r+0x32>
802d1f8: 2b1d cmp r3, #29
802d1fa: d001 beq.n 802d200 <__sflush_r+0xac>
802d1fc: 2b16 cmp r3, #22
802d1fe: d11e bne.n 802d23e <__sflush_r+0xea>
802d200: 602f str r7, [r5, #0]
802d202: 2000 movs r0, #0
802d204: e022 b.n 802d24c <__sflush_r+0xf8>
802d206: f043 0340 orr.w r3, r3, #64 @ 0x40
802d20a: b21b sxth r3, r3
802d20c: e01b b.n 802d246 <__sflush_r+0xf2>
802d20e: 690f ldr r7, [r1, #16]
802d210: 2f00 cmp r7, #0
802d212: d0f6 beq.n 802d202 <__sflush_r+0xae>
802d214: 0793 lsls r3, r2, #30
802d216: 680e ldr r6, [r1, #0]
802d218: bf08 it eq
802d21a: 694b ldreq r3, [r1, #20]
802d21c: 600f str r7, [r1, #0]
802d21e: bf18 it ne
802d220: 2300 movne r3, #0
802d222: eba6 0807 sub.w r8, r6, r7
802d226: 608b str r3, [r1, #8]
802d228: f1b8 0f00 cmp.w r8, #0
802d22c: dde9 ble.n 802d202 <__sflush_r+0xae>
802d22e: 6a21 ldr r1, [r4, #32]
802d230: 6aa6 ldr r6, [r4, #40] @ 0x28
802d232: 4643 mov r3, r8
802d234: 463a mov r2, r7
802d236: 4628 mov r0, r5
802d238: 47b0 blx r6
802d23a: 2800 cmp r0, #0
802d23c: dc08 bgt.n 802d250 <__sflush_r+0xfc>
802d23e: f9b4 300c ldrsh.w r3, [r4, #12]
802d242: f043 0340 orr.w r3, r3, #64 @ 0x40
802d246: 81a3 strh r3, [r4, #12]
802d248: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802d24c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
802d250: 4407 add r7, r0
802d252: eba8 0800 sub.w r8, r8, r0
802d256: e7e7 b.n 802d228 <__sflush_r+0xd4>
802d258: dfbffffe .word 0xdfbffffe
0802d25c <_fflush_r>:
802d25c: b538 push {r3, r4, r5, lr}
802d25e: 690b ldr r3, [r1, #16]
802d260: 4605 mov r5, r0
802d262: 460c mov r4, r1
802d264: b913 cbnz r3, 802d26c <_fflush_r+0x10>
802d266: 2500 movs r5, #0
802d268: 4628 mov r0, r5
802d26a: bd38 pop {r3, r4, r5, pc}
802d26c: b118 cbz r0, 802d276 <_fflush_r+0x1a>
802d26e: 6a03 ldr r3, [r0, #32]
802d270: b90b cbnz r3, 802d276 <_fflush_r+0x1a>
802d272: f7fd fba5 bl 802a9c0 <__sinit>
802d276: f9b4 300c ldrsh.w r3, [r4, #12]
802d27a: 2b00 cmp r3, #0
802d27c: d0f3 beq.n 802d266 <_fflush_r+0xa>
802d27e: 6e62 ldr r2, [r4, #100] @ 0x64
802d280: 07d0 lsls r0, r2, #31
802d282: d404 bmi.n 802d28e <_fflush_r+0x32>
802d284: 0599 lsls r1, r3, #22
802d286: d402 bmi.n 802d28e <_fflush_r+0x32>
802d288: 6da0 ldr r0, [r4, #88] @ 0x58
802d28a: f7fd fe56 bl 802af3a <__retarget_lock_acquire_recursive>
802d28e: 4628 mov r0, r5
802d290: 4621 mov r1, r4
802d292: f7ff ff5f bl 802d154 <__sflush_r>
802d296: 6e63 ldr r3, [r4, #100] @ 0x64
802d298: 07da lsls r2, r3, #31
802d29a: 4605 mov r5, r0
802d29c: d4e4 bmi.n 802d268 <_fflush_r+0xc>
802d29e: 89a3 ldrh r3, [r4, #12]
802d2a0: 059b lsls r3, r3, #22
802d2a2: d4e1 bmi.n 802d268 <_fflush_r+0xc>
802d2a4: 6da0 ldr r0, [r4, #88] @ 0x58
802d2a6: f7fd fe49 bl 802af3c <__retarget_lock_release_recursive>
802d2aa: e7dd b.n 802d268 <_fflush_r+0xc>
0802d2ac <fiprintf>:
802d2ac: b40e push {r1, r2, r3}
802d2ae: b503 push {r0, r1, lr}
802d2b0: 4601 mov r1, r0
802d2b2: ab03 add r3, sp, #12
802d2b4: 4805 ldr r0, [pc, #20] @ (802d2cc <fiprintf+0x20>)
802d2b6: f853 2b04 ldr.w r2, [r3], #4
802d2ba: 6800 ldr r0, [r0, #0]
802d2bc: 9301 str r3, [sp, #4]
802d2be: f7ff fe31 bl 802cf24 <_vfiprintf_r>
802d2c2: b002 add sp, #8
802d2c4: f85d eb04 ldr.w lr, [sp], #4
802d2c8: b003 add sp, #12
802d2ca: 4770 bx lr
802d2cc: 240001d4 .word 0x240001d4
0802d2d0 <__swhatbuf_r>:
802d2d0: b570 push {r4, r5, r6, lr}
802d2d2: 460c mov r4, r1
802d2d4: f9b1 100e ldrsh.w r1, [r1, #14]
802d2d8: 2900 cmp r1, #0
802d2da: b096 sub sp, #88 @ 0x58
802d2dc: 4615 mov r5, r2
802d2de: 461e mov r6, r3
802d2e0: da0d bge.n 802d2fe <__swhatbuf_r+0x2e>
802d2e2: 89a3 ldrh r3, [r4, #12]
802d2e4: f013 0f80 tst.w r3, #128 @ 0x80
802d2e8: f04f 0100 mov.w r1, #0
802d2ec: bf14 ite ne
802d2ee: 2340 movne r3, #64 @ 0x40
802d2f0: f44f 6380 moveq.w r3, #1024 @ 0x400
802d2f4: 2000 movs r0, #0
802d2f6: 6031 str r1, [r6, #0]
802d2f8: 602b str r3, [r5, #0]
802d2fa: b016 add sp, #88 @ 0x58
802d2fc: bd70 pop {r4, r5, r6, pc}
802d2fe: 466a mov r2, sp
802d300: f000 f848 bl 802d394 <_fstat_r>
802d304: 2800 cmp r0, #0
802d306: dbec blt.n 802d2e2 <__swhatbuf_r+0x12>
802d308: 9901 ldr r1, [sp, #4]
802d30a: f401 4170 and.w r1, r1, #61440 @ 0xf000
802d30e: f5a1 5300 sub.w r3, r1, #8192 @ 0x2000
802d312: 4259 negs r1, r3
802d314: 4159 adcs r1, r3
802d316: f44f 6380 mov.w r3, #1024 @ 0x400
802d31a: e7eb b.n 802d2f4 <__swhatbuf_r+0x24>
0802d31c <__smakebuf_r>:
802d31c: 898b ldrh r3, [r1, #12]
802d31e: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
802d320: 079d lsls r5, r3, #30
802d322: 4606 mov r6, r0
802d324: 460c mov r4, r1
802d326: d507 bpl.n 802d338 <__smakebuf_r+0x1c>
802d328: f104 0347 add.w r3, r4, #71 @ 0x47
802d32c: 6023 str r3, [r4, #0]
802d32e: 6123 str r3, [r4, #16]
802d330: 2301 movs r3, #1
802d332: 6163 str r3, [r4, #20]
802d334: b003 add sp, #12
802d336: bdf0 pop {r4, r5, r6, r7, pc}
802d338: ab01 add r3, sp, #4
802d33a: 466a mov r2, sp
802d33c: f7ff ffc8 bl 802d2d0 <__swhatbuf_r>
802d340: 9f00 ldr r7, [sp, #0]
802d342: 4605 mov r5, r0
802d344: 4639 mov r1, r7
802d346: 4630 mov r0, r6
802d348: f7fb ffba bl 80292c0 <_malloc_r>
802d34c: b948 cbnz r0, 802d362 <__smakebuf_r+0x46>
802d34e: f9b4 300c ldrsh.w r3, [r4, #12]
802d352: 059a lsls r2, r3, #22
802d354: d4ee bmi.n 802d334 <__smakebuf_r+0x18>
802d356: f023 0303 bic.w r3, r3, #3
802d35a: f043 0302 orr.w r3, r3, #2
802d35e: 81a3 strh r3, [r4, #12]
802d360: e7e2 b.n 802d328 <__smakebuf_r+0xc>
802d362: 89a3 ldrh r3, [r4, #12]
802d364: 6020 str r0, [r4, #0]
802d366: f043 0380 orr.w r3, r3, #128 @ 0x80
802d36a: 81a3 strh r3, [r4, #12]
802d36c: 9b01 ldr r3, [sp, #4]
802d36e: e9c4 0704 strd r0, r7, [r4, #16]
802d372: b15b cbz r3, 802d38c <__smakebuf_r+0x70>
802d374: f9b4 100e ldrsh.w r1, [r4, #14]
802d378: 4630 mov r0, r6
802d37a: f000 f81d bl 802d3b8 <_isatty_r>
802d37e: b128 cbz r0, 802d38c <__smakebuf_r+0x70>
802d380: 89a3 ldrh r3, [r4, #12]
802d382: f023 0303 bic.w r3, r3, #3
802d386: f043 0301 orr.w r3, r3, #1
802d38a: 81a3 strh r3, [r4, #12]
802d38c: 89a3 ldrh r3, [r4, #12]
802d38e: 431d orrs r5, r3
802d390: 81a5 strh r5, [r4, #12]
802d392: e7cf b.n 802d334 <__smakebuf_r+0x18>
0802d394 <_fstat_r>:
802d394: b538 push {r3, r4, r5, lr}
802d396: 4d07 ldr r5, [pc, #28] @ (802d3b4 <_fstat_r+0x20>)
802d398: 2300 movs r3, #0
802d39a: 4604 mov r4, r0
802d39c: 4608 mov r0, r1
802d39e: 4611 mov r1, r2
802d3a0: 602b str r3, [r5, #0]
802d3a2: f7d7 f82d bl 8004400 <_fstat>
802d3a6: 1c43 adds r3, r0, #1
802d3a8: d102 bne.n 802d3b0 <_fstat_r+0x1c>
802d3aa: 682b ldr r3, [r5, #0]
802d3ac: b103 cbz r3, 802d3b0 <_fstat_r+0x1c>
802d3ae: 6023 str r3, [r4, #0]
802d3b0: bd38 pop {r3, r4, r5, pc}
802d3b2: bf00 nop
802d3b4: 2402b2a0 .word 0x2402b2a0
0802d3b8 <_isatty_r>:
802d3b8: b538 push {r3, r4, r5, lr}
802d3ba: 4d06 ldr r5, [pc, #24] @ (802d3d4 <_isatty_r+0x1c>)
802d3bc: 2300 movs r3, #0
802d3be: 4604 mov r4, r0
802d3c0: 4608 mov r0, r1
802d3c2: 602b str r3, [r5, #0]
802d3c4: f7d7 f82c bl 8004420 <_isatty>
802d3c8: 1c43 adds r3, r0, #1
802d3ca: d102 bne.n 802d3d2 <_isatty_r+0x1a>
802d3cc: 682b ldr r3, [r5, #0]
802d3ce: b103 cbz r3, 802d3d2 <_isatty_r+0x1a>
802d3d0: 6023 str r3, [r4, #0]
802d3d2: bd38 pop {r3, r4, r5, pc}
802d3d4: 2402b2a0 .word 0x2402b2a0
0802d3d8 <abort>:
802d3d8: b508 push {r3, lr}
802d3da: 2006 movs r0, #6
802d3dc: f000 f840 bl 802d460 <raise>
802d3e0: 2001 movs r0, #1
802d3e2: f7d6 ffbd bl 8004360 <_exit>
0802d3e6 <_calloc_r>:
802d3e6: b570 push {r4, r5, r6, lr}
802d3e8: fba1 5402 umull r5, r4, r1, r2
802d3ec: b93c cbnz r4, 802d3fe <_calloc_r+0x18>
802d3ee: 4629 mov r1, r5
802d3f0: f7fb ff66 bl 80292c0 <_malloc_r>
802d3f4: 4606 mov r6, r0
802d3f6: b928 cbnz r0, 802d404 <_calloc_r+0x1e>
802d3f8: 2600 movs r6, #0
802d3fa: 4630 mov r0, r6
802d3fc: bd70 pop {r4, r5, r6, pc}
802d3fe: 220c movs r2, #12
802d400: 6002 str r2, [r0, #0]
802d402: e7f9 b.n 802d3f8 <_calloc_r+0x12>
802d404: 462a mov r2, r5
802d406: 4621 mov r1, r4
802d408: f7fd fca2 bl 802ad50 <memset>
802d40c: e7f5 b.n 802d3fa <_calloc_r+0x14>
0802d40e <_raise_r>:
802d40e: 291f cmp r1, #31
802d410: b538 push {r3, r4, r5, lr}
802d412: 4605 mov r5, r0
802d414: 460c mov r4, r1
802d416: d904 bls.n 802d422 <_raise_r+0x14>
802d418: 2316 movs r3, #22
802d41a: 6003 str r3, [r0, #0]
802d41c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
802d420: bd38 pop {r3, r4, r5, pc}
802d422: 6bc2 ldr r2, [r0, #60] @ 0x3c
802d424: b112 cbz r2, 802d42c <_raise_r+0x1e>
802d426: f852 3021 ldr.w r3, [r2, r1, lsl #2]
802d42a: b94b cbnz r3, 802d440 <_raise_r+0x32>
802d42c: 4628 mov r0, r5
802d42e: f000 f831 bl 802d494 <_getpid_r>
802d432: 4622 mov r2, r4
802d434: 4601 mov r1, r0
802d436: 4628 mov r0, r5
802d438: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
802d43c: f000 b818 b.w 802d470 <_kill_r>
802d440: 2b01 cmp r3, #1
802d442: d00a beq.n 802d45a <_raise_r+0x4c>
802d444: 1c59 adds r1, r3, #1
802d446: d103 bne.n 802d450 <_raise_r+0x42>
802d448: 2316 movs r3, #22
802d44a: 6003 str r3, [r0, #0]
802d44c: 2001 movs r0, #1
802d44e: e7e7 b.n 802d420 <_raise_r+0x12>
802d450: 2100 movs r1, #0
802d452: f842 1024 str.w r1, [r2, r4, lsl #2]
802d456: 4620 mov r0, r4
802d458: 4798 blx r3
802d45a: 2000 movs r0, #0
802d45c: e7e0 b.n 802d420 <_raise_r+0x12>
...
0802d460 <raise>:
802d460: 4b02 ldr r3, [pc, #8] @ (802d46c <raise+0xc>)
802d462: 4601 mov r1, r0
802d464: 6818 ldr r0, [r3, #0]
802d466: f7ff bfd2 b.w 802d40e <_raise_r>
802d46a: bf00 nop
802d46c: 240001d4 .word 0x240001d4
0802d470 <_kill_r>:
802d470: b538 push {r3, r4, r5, lr}
802d472: 4d07 ldr r5, [pc, #28] @ (802d490 <_kill_r+0x20>)
802d474: 2300 movs r3, #0
802d476: 4604 mov r4, r0
802d478: 4608 mov r0, r1
802d47a: 4611 mov r1, r2
802d47c: 602b str r3, [r5, #0]
802d47e: f7d6 ff5d bl 800433c <_kill>
802d482: 1c43 adds r3, r0, #1
802d484: d102 bne.n 802d48c <_kill_r+0x1c>
802d486: 682b ldr r3, [r5, #0]
802d488: b103 cbz r3, 802d48c <_kill_r+0x1c>
802d48a: 6023 str r3, [r4, #0]
802d48c: bd38 pop {r3, r4, r5, pc}
802d48e: bf00 nop
802d490: 2402b2a0 .word 0x2402b2a0
0802d494 <_getpid_r>:
802d494: f7d6 bf4a b.w 800432c <_getpid>
0802d498 <_init>:
802d498: b5f8 push {r3, r4, r5, r6, r7, lr}
802d49a: bf00 nop
802d49c: bcf8 pop {r3, r4, r5, r6, r7}
802d49e: bc08 pop {r3}
802d4a0: 469e mov lr, r3
802d4a2: 4770 bx lr
0802d4a4 <_fini>:
802d4a4: b5f8 push {r3, r4, r5, r6, r7, lr}
802d4a6: bf00 nop
802d4a8: bcf8 pop {r3, r4, r5, r6, r7}
802d4aa: bc08 pop {r3}
802d4ac: 469e mov lr, r3
802d4ae: 4770 bx lr