node-red-STM32/OZE_Main/Debug/OZE_Main.list

OZE_Main.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   00000298  08000000  08000000  00001000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         0002d240  080002a0  080002a0  000012a0  2**4
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       00004eac  0802d4e0  0802d4e0  0002e4e0  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM          00000008  0803238c  0803238c  0003338c  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  4 .init_array   00000004  08032394  08032394  00033394  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  5 .fini_array   00000004  08032398  08032398  00033398  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  6 .data         00000224  24000000  0803239c  00034000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .bss          0002b084  24000224  080325c0  00034224  2**2
                  ALLOC
  8 ._user_heap_stack 00000600  2402b2a8  080325c0  000342a8  2**0
                  ALLOC
  9 .lwip_sec     000192db  2402b8a8  080325c0  000348a8  2**2
                  ALLOC
 10 .ARM.attributes 0000002e  00000000  00000000  00034224  2**0
                  CONTENTS, READONLY
 11 .debug_info   00052754  00000000  00000000  00034252  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 12 .debug_abbrev 0000b941  00000000  00000000  000869a6  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 13 .debug_aranges 00003890  00000000  00000000  000922e8  2**3
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 14 .debug_rnglists 00002d2c  00000000  00000000  00095b78  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 15 .debug_macro  0004f91c  00000000  00000000  000988a4  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 16 .debug_line   00058d8d  00000000  00000000  000e81c0  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 17 .debug_str    0018f297  00000000  00000000  00140f4d  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 18 .comment      00000043  00000000  00000000  002d01e4  2**0
                  CONTENTS, READONLY
 19 .debug_frame  0000fd04  00000000  00000000  002d0228  2**2
                  CONTENTS, READONLY, DEBUGGING, OCTETS
 20 .debug_line_str 00000064  00000000  00000000  002dff2c  2**0
                  CONTENTS, READONLY, DEBUGGING, OCTETS

Disassembly of section .text:

080002a0 <__do_global_dtors_aux>:
 80002a0:	b510      	push	{r4, lr}
 80002a2:	4c05      	ldr	r4, [pc, #20]	@ (80002b8 <__do_global_dtors_aux+0x18>)
 80002a4:	7823      	ldrb	r3, [r4, #0]
 80002a6:	b933      	cbnz	r3, 80002b6 <__do_global_dtors_aux+0x16>
 80002a8:	4b04      	ldr	r3, [pc, #16]	@ (80002bc <__do_global_dtors_aux+0x1c>)
 80002aa:	b113      	cbz	r3, 80002b2 <__do_global_dtors_aux+0x12>
 80002ac:	4804      	ldr	r0, [pc, #16]	@ (80002c0 <__do_global_dtors_aux+0x20>)
 80002ae:	f3af 8000 	nop.w
 80002b2:	2301      	movs	r3, #1
 80002b4:	7023      	strb	r3, [r4, #0]
 80002b6:	bd10      	pop	{r4, pc}
 80002b8:	24000224 	.word	0x24000224
 80002bc:	00000000 	.word	0x00000000
 80002c0:	0802d4c8 	.word	0x0802d4c8

080002c4 <frame_dummy>:
 80002c4:	b508      	push	{r3, lr}
 80002c6:	4b03      	ldr	r3, [pc, #12]	@ (80002d4 <frame_dummy+0x10>)
 80002c8:	b11b      	cbz	r3, 80002d2 <frame_dummy+0xe>
 80002ca:	4903      	ldr	r1, [pc, #12]	@ (80002d8 <frame_dummy+0x14>)
 80002cc:	4803      	ldr	r0, [pc, #12]	@ (80002dc <frame_dummy+0x18>)
 80002ce:	f3af 8000 	nop.w
 80002d2:	bd08      	pop	{r3, pc}
 80002d4:	00000000 	.word	0x00000000
 80002d8:	24000228 	.word	0x24000228
 80002dc:	0802d4c8 	.word	0x0802d4c8

080002e0 <strcmp>:
 80002e0:	f810 2b01 	ldrb.w	r2, [r0], #1
 80002e4:	f811 3b01 	ldrb.w	r3, [r1], #1
 80002e8:	2a01      	cmp	r2, #1
 80002ea:	bf28      	it	cs
 80002ec:	429a      	cmpcs	r2, r3
 80002ee:	d0f7      	beq.n	80002e0 <strcmp>
 80002f0:	1ad0      	subs	r0, r2, r3
 80002f2:	4770      	bx	lr
	...

08000300 <memchr>:
 8000300:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 8000304:	2a10      	cmp	r2, #16
 8000306:	db2b      	blt.n	8000360 <memchr+0x60>
 8000308:	f010 0f07 	tst.w	r0, #7
 800030c:	d008      	beq.n	8000320 <memchr+0x20>
 800030e:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000312:	3a01      	subs	r2, #1
 8000314:	428b      	cmp	r3, r1
 8000316:	d02d      	beq.n	8000374 <memchr+0x74>
 8000318:	f010 0f07 	tst.w	r0, #7
 800031c:	b342      	cbz	r2, 8000370 <memchr+0x70>
 800031e:	d1f6      	bne.n	800030e <memchr+0xe>
 8000320:	b4f0      	push	{r4, r5, r6, r7}
 8000322:	ea41 2101 	orr.w	r1, r1, r1, lsl #8
 8000326:	ea41 4101 	orr.w	r1, r1, r1, lsl #16
 800032a:	f022 0407 	bic.w	r4, r2, #7
 800032e:	f07f 0700 	mvns.w	r7, #0
 8000332:	2300      	movs	r3, #0
 8000334:	e8f0 5602 	ldrd	r5, r6, [r0], #8
 8000338:	3c08      	subs	r4, #8
 800033a:	ea85 0501 	eor.w	r5, r5, r1
 800033e:	ea86 0601 	eor.w	r6, r6, r1
 8000342:	fa85 f547 	uadd8	r5, r5, r7
 8000346:	faa3 f587 	sel	r5, r3, r7
 800034a:	fa86 f647 	uadd8	r6, r6, r7
 800034e:	faa5 f687 	sel	r6, r5, r7
 8000352:	b98e      	cbnz	r6, 8000378 <memchr+0x78>
 8000354:	d1ee      	bne.n	8000334 <memchr+0x34>
 8000356:	bcf0      	pop	{r4, r5, r6, r7}
 8000358:	f001 01ff 	and.w	r1, r1, #255	@ 0xff
 800035c:	f002 0207 	and.w	r2, r2, #7
 8000360:	b132      	cbz	r2, 8000370 <memchr+0x70>
 8000362:	f810 3b01 	ldrb.w	r3, [r0], #1
 8000366:	3a01      	subs	r2, #1
 8000368:	ea83 0301 	eor.w	r3, r3, r1
 800036c:	b113      	cbz	r3, 8000374 <memchr+0x74>
 800036e:	d1f8      	bne.n	8000362 <memchr+0x62>
 8000370:	2000      	movs	r0, #0
 8000372:	4770      	bx	lr
 8000374:	3801      	subs	r0, #1
 8000376:	4770      	bx	lr
 8000378:	2d00      	cmp	r5, #0
 800037a:	bf06      	itte	eq
 800037c:	4635      	moveq	r5, r6
 800037e:	3803      	subeq	r0, #3
 8000380:	3807      	subne	r0, #7
 8000382:	f015 0f01 	tst.w	r5, #1
 8000386:	d107      	bne.n	8000398 <memchr+0x98>
 8000388:	3001      	adds	r0, #1
 800038a:	f415 7f80 	tst.w	r5, #256	@ 0x100
 800038e:	bf02      	ittt	eq
 8000390:	3001      	addeq	r0, #1
 8000392:	f415 3fc0 	tsteq.w	r5, #98304	@ 0x18000
 8000396:	3001      	addeq	r0, #1
 8000398:	bcf0      	pop	{r4, r5, r6, r7}
 800039a:	3801      	subs	r0, #1
 800039c:	4770      	bx	lr
 800039e:	bf00      	nop

080003a0 <strlen>:
 80003a0:	4603      	mov	r3, r0
 80003a2:	f813 2b01 	ldrb.w	r2, [r3], #1
 80003a6:	2a00      	cmp	r2, #0
 80003a8:	d1fb      	bne.n	80003a2 <strlen+0x2>
 80003aa:	1a18      	subs	r0, r3, r0
 80003ac:	3801      	subs	r0, #1
 80003ae:	4770      	bx	lr

080003b0 <__aeabi_drsub>:
 80003b0:	f081 4100 	eor.w	r1, r1, #2147483648	@ 0x80000000
 80003b4:	e002      	b.n	80003bc <__adddf3>
 80003b6:	bf00      	nop

080003b8 <__aeabi_dsub>:
 80003b8:	f083 4300 	eor.w	r3, r3, #2147483648	@ 0x80000000

080003bc <__adddf3>:
 80003bc:	b530      	push	{r4, r5, lr}
 80003be:	ea4f 0441 	mov.w	r4, r1, lsl #1
 80003c2:	ea4f 0543 	mov.w	r5, r3, lsl #1
 80003c6:	ea94 0f05 	teq	r4, r5
 80003ca:	bf08      	it	eq
 80003cc:	ea90 0f02 	teqeq	r0, r2
 80003d0:	bf1f      	itttt	ne
 80003d2:	ea54 0c00 	orrsne.w	ip, r4, r0
 80003d6:	ea55 0c02 	orrsne.w	ip, r5, r2
 80003da:	ea7f 5c64 	mvnsne.w	ip, r4, asr #21
 80003de:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80003e2:	f000 80e2 	beq.w	80005aa <__adddf3+0x1ee>
 80003e6:	ea4f 5454 	mov.w	r4, r4, lsr #21
 80003ea:	ebd4 5555 	rsbs	r5, r4, r5, lsr #21
 80003ee:	bfb8      	it	lt
 80003f0:	426d      	neglt	r5, r5
 80003f2:	dd0c      	ble.n	800040e <__adddf3+0x52>
 80003f4:	442c      	add	r4, r5
 80003f6:	ea80 0202 	eor.w	r2, r0, r2
 80003fa:	ea81 0303 	eor.w	r3, r1, r3
 80003fe:	ea82 0000 	eor.w	r0, r2, r0
 8000402:	ea83 0101 	eor.w	r1, r3, r1
 8000406:	ea80 0202 	eor.w	r2, r0, r2
 800040a:	ea81 0303 	eor.w	r3, r1, r3
 800040e:	2d36      	cmp	r5, #54	@ 0x36
 8000410:	bf88      	it	hi
 8000412:	bd30      	pophi	{r4, r5, pc}
 8000414:	f011 4f00 	tst.w	r1, #2147483648	@ 0x80000000
 8000418:	ea4f 3101 	mov.w	r1, r1, lsl #12
 800041c:	f44f 1c80 	mov.w	ip, #1048576	@ 0x100000
 8000420:	ea4c 3111 	orr.w	r1, ip, r1, lsr #12
 8000424:	d002      	beq.n	800042c <__adddf3+0x70>
 8000426:	4240      	negs	r0, r0
 8000428:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 800042c:	f013 4f00 	tst.w	r3, #2147483648	@ 0x80000000
 8000430:	ea4f 3303 	mov.w	r3, r3, lsl #12
 8000434:	ea4c 3313 	orr.w	r3, ip, r3, lsr #12
 8000438:	d002      	beq.n	8000440 <__adddf3+0x84>
 800043a:	4252      	negs	r2, r2
 800043c:	eb63 0343 	sbc.w	r3, r3, r3, lsl #1
 8000440:	ea94 0f05 	teq	r4, r5
 8000444:	f000 80a7 	beq.w	8000596 <__adddf3+0x1da>
 8000448:	f1a4 0401 	sub.w	r4, r4, #1
 800044c:	f1d5 0e20 	rsbs	lr, r5, #32
 8000450:	db0d      	blt.n	800046e <__adddf3+0xb2>
 8000452:	fa02 fc0e 	lsl.w	ip, r2, lr
 8000456:	fa22 f205 	lsr.w	r2, r2, r5
 800045a:	1880      	adds	r0, r0, r2
 800045c:	f141 0100 	adc.w	r1, r1, #0
 8000460:	fa03 f20e 	lsl.w	r2, r3, lr
 8000464:	1880      	adds	r0, r0, r2
 8000466:	fa43 f305 	asr.w	r3, r3, r5
 800046a:	4159      	adcs	r1, r3
 800046c:	e00e      	b.n	800048c <__adddf3+0xd0>
 800046e:	f1a5 0520 	sub.w	r5, r5, #32
 8000472:	f10e 0e20 	add.w	lr, lr, #32
 8000476:	2a01      	cmp	r2, #1
 8000478:	fa03 fc0e 	lsl.w	ip, r3, lr
 800047c:	bf28      	it	cs
 800047e:	f04c 0c02 	orrcs.w	ip, ip, #2
 8000482:	fa43 f305 	asr.w	r3, r3, r5
 8000486:	18c0      	adds	r0, r0, r3
 8000488:	eb51 71e3 	adcs.w	r1, r1, r3, asr #31
 800048c:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 8000490:	d507      	bpl.n	80004a2 <__adddf3+0xe6>
 8000492:	f04f 0e00 	mov.w	lr, #0
 8000496:	f1dc 0c00 	rsbs	ip, ip, #0
 800049a:	eb7e 0000 	sbcs.w	r0, lr, r0
 800049e:	eb6e 0101 	sbc.w	r1, lr, r1
 80004a2:	f5b1 1f80 	cmp.w	r1, #1048576	@ 0x100000
 80004a6:	d31b      	bcc.n	80004e0 <__adddf3+0x124>
 80004a8:	f5b1 1f00 	cmp.w	r1, #2097152	@ 0x200000
 80004ac:	d30c      	bcc.n	80004c8 <__adddf3+0x10c>
 80004ae:	0849      	lsrs	r1, r1, #1
 80004b0:	ea5f 0030 	movs.w	r0, r0, rrx
 80004b4:	ea4f 0c3c 	mov.w	ip, ip, rrx
 80004b8:	f104 0401 	add.w	r4, r4, #1
 80004bc:	ea4f 5244 	mov.w	r2, r4, lsl #21
 80004c0:	f512 0f80 	cmn.w	r2, #4194304	@ 0x400000
 80004c4:	f080 809a 	bcs.w	80005fc <__adddf3+0x240>
 80004c8:	f1bc 4f00 	cmp.w	ip, #2147483648	@ 0x80000000
 80004cc:	bf08      	it	eq
 80004ce:	ea5f 0c50 	movseq.w	ip, r0, lsr #1
 80004d2:	f150 0000 	adcs.w	r0, r0, #0
 80004d6:	eb41 5104 	adc.w	r1, r1, r4, lsl #20
 80004da:	ea41 0105 	orr.w	r1, r1, r5
 80004de:	bd30      	pop	{r4, r5, pc}
 80004e0:	ea5f 0c4c 	movs.w	ip, ip, lsl #1
 80004e4:	4140      	adcs	r0, r0
 80004e6:	eb41 0101 	adc.w	r1, r1, r1
 80004ea:	3c01      	subs	r4, #1
 80004ec:	bf28      	it	cs
 80004ee:	f5b1 1f80 	cmpcs.w	r1, #1048576	@ 0x100000
 80004f2:	d2e9      	bcs.n	80004c8 <__adddf3+0x10c>
 80004f4:	f091 0f00 	teq	r1, #0
 80004f8:	bf04      	itt	eq
 80004fa:	4601      	moveq	r1, r0
 80004fc:	2000      	moveq	r0, #0
 80004fe:	fab1 f381 	clz	r3, r1
 8000502:	bf08      	it	eq
 8000504:	3320      	addeq	r3, #32
 8000506:	f1a3 030b 	sub.w	r3, r3, #11
 800050a:	f1b3 0220 	subs.w	r2, r3, #32
 800050e:	da0c      	bge.n	800052a <__adddf3+0x16e>
 8000510:	320c      	adds	r2, #12
 8000512:	dd08      	ble.n	8000526 <__adddf3+0x16a>
 8000514:	f102 0c14 	add.w	ip, r2, #20
 8000518:	f1c2 020c 	rsb	r2, r2, #12
 800051c:	fa01 f00c 	lsl.w	r0, r1, ip
 8000520:	fa21 f102 	lsr.w	r1, r1, r2
 8000524:	e00c      	b.n	8000540 <__adddf3+0x184>
 8000526:	f102 0214 	add.w	r2, r2, #20
 800052a:	bfd8      	it	le
 800052c:	f1c2 0c20 	rsble	ip, r2, #32
 8000530:	fa01 f102 	lsl.w	r1, r1, r2
 8000534:	fa20 fc0c 	lsr.w	ip, r0, ip
 8000538:	bfdc      	itt	le
 800053a:	ea41 010c 	orrle.w	r1, r1, ip
 800053e:	4090      	lslle	r0, r2
 8000540:	1ae4      	subs	r4, r4, r3
 8000542:	bfa2      	ittt	ge
 8000544:	eb01 5104 	addge.w	r1, r1, r4, lsl #20
 8000548:	4329      	orrge	r1, r5
 800054a:	bd30      	popge	{r4, r5, pc}
 800054c:	ea6f 0404 	mvn.w	r4, r4
 8000550:	3c1f      	subs	r4, #31
 8000552:	da1c      	bge.n	800058e <__adddf3+0x1d2>
 8000554:	340c      	adds	r4, #12
 8000556:	dc0e      	bgt.n	8000576 <__adddf3+0x1ba>
 8000558:	f104 0414 	add.w	r4, r4, #20
 800055c:	f1c4 0220 	rsb	r2, r4, #32
 8000560:	fa20 f004 	lsr.w	r0, r0, r4
 8000564:	fa01 f302 	lsl.w	r3, r1, r2
 8000568:	ea40 0003 	orr.w	r0, r0, r3
 800056c:	fa21 f304 	lsr.w	r3, r1, r4
 8000570:	ea45 0103 	orr.w	r1, r5, r3
 8000574:	bd30      	pop	{r4, r5, pc}
 8000576:	f1c4 040c 	rsb	r4, r4, #12
 800057a:	f1c4 0220 	rsb	r2, r4, #32
 800057e:	fa20 f002 	lsr.w	r0, r0, r2
 8000582:	fa01 f304 	lsl.w	r3, r1, r4
 8000586:	ea40 0003 	orr.w	r0, r0, r3
 800058a:	4629      	mov	r1, r5
 800058c:	bd30      	pop	{r4, r5, pc}
 800058e:	fa21 f004 	lsr.w	r0, r1, r4
 8000592:	4629      	mov	r1, r5
 8000594:	bd30      	pop	{r4, r5, pc}
 8000596:	f094 0f00 	teq	r4, #0
 800059a:	f483 1380 	eor.w	r3, r3, #1048576	@ 0x100000
 800059e:	bf06      	itte	eq
 80005a0:	f481 1180 	eoreq.w	r1, r1, #1048576	@ 0x100000
 80005a4:	3401      	addeq	r4, #1
 80005a6:	3d01      	subne	r5, #1
 80005a8:	e74e      	b.n	8000448 <__adddf3+0x8c>
 80005aa:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 80005ae:	bf18      	it	ne
 80005b0:	ea7f 5c65 	mvnsne.w	ip, r5, asr #21
 80005b4:	d029      	beq.n	800060a <__adddf3+0x24e>
 80005b6:	ea94 0f05 	teq	r4, r5
 80005ba:	bf08      	it	eq
 80005bc:	ea90 0f02 	teqeq	r0, r2
 80005c0:	d005      	beq.n	80005ce <__adddf3+0x212>
 80005c2:	ea54 0c00 	orrs.w	ip, r4, r0
 80005c6:	bf04      	itt	eq
 80005c8:	4619      	moveq	r1, r3
 80005ca:	4610      	moveq	r0, r2
 80005cc:	bd30      	pop	{r4, r5, pc}
 80005ce:	ea91 0f03 	teq	r1, r3
 80005d2:	bf1e      	ittt	ne
 80005d4:	2100      	movne	r1, #0
 80005d6:	2000      	movne	r0, #0
 80005d8:	bd30      	popne	{r4, r5, pc}
 80005da:	ea5f 5c54 	movs.w	ip, r4, lsr #21
 80005de:	d105      	bne.n	80005ec <__adddf3+0x230>
 80005e0:	0040      	lsls	r0, r0, #1
 80005e2:	4149      	adcs	r1, r1
 80005e4:	bf28      	it	cs
 80005e6:	f041 4100 	orrcs.w	r1, r1, #2147483648	@ 0x80000000
 80005ea:	bd30      	pop	{r4, r5, pc}
 80005ec:	f514 0480 	adds.w	r4, r4, #4194304	@ 0x400000
 80005f0:	bf3c      	itt	cc
 80005f2:	f501 1180 	addcc.w	r1, r1, #1048576	@ 0x100000
 80005f6:	bd30      	popcc	{r4, r5, pc}
 80005f8:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80005fc:	f045 41fe 	orr.w	r1, r5, #2130706432	@ 0x7f000000
 8000600:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 8000604:	f04f 0000 	mov.w	r0, #0
 8000608:	bd30      	pop	{r4, r5, pc}
 800060a:	ea7f 5c64 	mvns.w	ip, r4, asr #21
 800060e:	bf1a      	itte	ne
 8000610:	4619      	movne	r1, r3
 8000612:	4610      	movne	r0, r2
 8000614:	ea7f 5c65 	mvnseq.w	ip, r5, asr #21
 8000618:	bf1c      	itt	ne
 800061a:	460b      	movne	r3, r1
 800061c:	4602      	movne	r2, r0
 800061e:	ea50 3401 	orrs.w	r4, r0, r1, lsl #12
 8000622:	bf06      	itte	eq
 8000624:	ea52 3503 	orrseq.w	r5, r2, r3, lsl #12
 8000628:	ea91 0f03 	teqeq	r1, r3
 800062c:	f441 2100 	orrne.w	r1, r1, #524288	@ 0x80000
 8000630:	bd30      	pop	{r4, r5, pc}
 8000632:	bf00      	nop

08000634 <__aeabi_ui2d>:
 8000634:	f090 0f00 	teq	r0, #0
 8000638:	bf04      	itt	eq
 800063a:	2100      	moveq	r1, #0
 800063c:	4770      	bxeq	lr
 800063e:	b530      	push	{r4, r5, lr}
 8000640:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000644:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000648:	f04f 0500 	mov.w	r5, #0
 800064c:	f04f 0100 	mov.w	r1, #0
 8000650:	e750      	b.n	80004f4 <__adddf3+0x138>
 8000652:	bf00      	nop

08000654 <__aeabi_i2d>:
 8000654:	f090 0f00 	teq	r0, #0
 8000658:	bf04      	itt	eq
 800065a:	2100      	moveq	r1, #0
 800065c:	4770      	bxeq	lr
 800065e:	b530      	push	{r4, r5, lr}
 8000660:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 8000664:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 8000668:	f010 4500 	ands.w	r5, r0, #2147483648	@ 0x80000000
 800066c:	bf48      	it	mi
 800066e:	4240      	negmi	r0, r0
 8000670:	f04f 0100 	mov.w	r1, #0
 8000674:	e73e      	b.n	80004f4 <__adddf3+0x138>
 8000676:	bf00      	nop

08000678 <__aeabi_f2d>:
 8000678:	0042      	lsls	r2, r0, #1
 800067a:	ea4f 01e2 	mov.w	r1, r2, asr #3
 800067e:	ea4f 0131 	mov.w	r1, r1, rrx
 8000682:	ea4f 7002 	mov.w	r0, r2, lsl #28
 8000686:	bf1f      	itttt	ne
 8000688:	f012 437f 	andsne.w	r3, r2, #4278190080	@ 0xff000000
 800068c:	f093 4f7f 	teqne	r3, #4278190080	@ 0xff000000
 8000690:	f081 5160 	eorne.w	r1, r1, #939524096	@ 0x38000000
 8000694:	4770      	bxne	lr
 8000696:	f032 427f 	bics.w	r2, r2, #4278190080	@ 0xff000000
 800069a:	bf08      	it	eq
 800069c:	4770      	bxeq	lr
 800069e:	f093 4f7f 	teq	r3, #4278190080	@ 0xff000000
 80006a2:	bf04      	itt	eq
 80006a4:	f441 2100 	orreq.w	r1, r1, #524288	@ 0x80000
 80006a8:	4770      	bxeq	lr
 80006aa:	b530      	push	{r4, r5, lr}
 80006ac:	f44f 7460 	mov.w	r4, #896	@ 0x380
 80006b0:	f001 4500 	and.w	r5, r1, #2147483648	@ 0x80000000
 80006b4:	f021 4100 	bic.w	r1, r1, #2147483648	@ 0x80000000
 80006b8:	e71c      	b.n	80004f4 <__adddf3+0x138>
 80006ba:	bf00      	nop

080006bc <__aeabi_ul2d>:
 80006bc:	ea50 0201 	orrs.w	r2, r0, r1
 80006c0:	bf08      	it	eq
 80006c2:	4770      	bxeq	lr
 80006c4:	b530      	push	{r4, r5, lr}
 80006c6:	f04f 0500 	mov.w	r5, #0
 80006ca:	e00a      	b.n	80006e2 <__aeabi_l2d+0x16>

080006cc <__aeabi_l2d>:
 80006cc:	ea50 0201 	orrs.w	r2, r0, r1
 80006d0:	bf08      	it	eq
 80006d2:	4770      	bxeq	lr
 80006d4:	b530      	push	{r4, r5, lr}
 80006d6:	f011 4500 	ands.w	r5, r1, #2147483648	@ 0x80000000
 80006da:	d502      	bpl.n	80006e2 <__aeabi_l2d+0x16>
 80006dc:	4240      	negs	r0, r0
 80006de:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 80006e2:	f44f 6480 	mov.w	r4, #1024	@ 0x400
 80006e6:	f104 0432 	add.w	r4, r4, #50	@ 0x32
 80006ea:	ea5f 5c91 	movs.w	ip, r1, lsr #22
 80006ee:	f43f aed8 	beq.w	80004a2 <__adddf3+0xe6>
 80006f2:	f04f 0203 	mov.w	r2, #3
 80006f6:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 80006fa:	bf18      	it	ne
 80006fc:	3203      	addne	r2, #3
 80006fe:	ea5f 0cdc 	movs.w	ip, ip, lsr #3
 8000702:	bf18      	it	ne
 8000704:	3203      	addne	r2, #3
 8000706:	eb02 02dc 	add.w	r2, r2, ip, lsr #3
 800070a:	f1c2 0320 	rsb	r3, r2, #32
 800070e:	fa00 fc03 	lsl.w	ip, r0, r3
 8000712:	fa20 f002 	lsr.w	r0, r0, r2
 8000716:	fa01 fe03 	lsl.w	lr, r1, r3
 800071a:	ea40 000e 	orr.w	r0, r0, lr
 800071e:	fa21 f102 	lsr.w	r1, r1, r2
 8000722:	4414      	add	r4, r2
 8000724:	e6bd      	b.n	80004a2 <__adddf3+0xe6>
 8000726:	bf00      	nop

08000728 <__aeabi_uldivmod>:
 8000728:	b953      	cbnz	r3, 8000740 <__aeabi_uldivmod+0x18>
 800072a:	b94a      	cbnz	r2, 8000740 <__aeabi_uldivmod+0x18>
 800072c:	2900      	cmp	r1, #0
 800072e:	bf08      	it	eq
 8000730:	2800      	cmpeq	r0, #0
 8000732:	bf1c      	itt	ne
 8000734:	f04f 31ff 	movne.w	r1, #4294967295	@ 0xffffffff
 8000738:	f04f 30ff 	movne.w	r0, #4294967295	@ 0xffffffff
 800073c:	f000 b9a2 	b.w	8000a84 <__aeabi_idiv0>
 8000740:	f1ad 0c08 	sub.w	ip, sp, #8
 8000744:	e96d ce04 	strd	ip, lr, [sp, #-16]!
 8000748:	f000 f83e 	bl	80007c8 <__udivmoddi4>
 800074c:	f8dd e004 	ldr.w	lr, [sp, #4]
 8000750:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8000754:	b004      	add	sp, #16
 8000756:	4770      	bx	lr

08000758 <__aeabi_d2lz>:
 8000758:	b508      	push	{r3, lr}
 800075a:	4602      	mov	r2, r0
 800075c:	460b      	mov	r3, r1
 800075e:	ec43 2b17 	vmov	d7, r2, r3
 8000762:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 8000766:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 800076a:	d403      	bmi.n	8000774 <__aeabi_d2lz+0x1c>
 800076c:	e8bd 4008 	ldmia.w	sp!, {r3, lr}
 8000770:	f000 b80a 	b.w	8000788 <__aeabi_d2ulz>
 8000774:	eeb1 7b47 	vneg.f64	d7, d7
 8000778:	ec51 0b17 	vmov	r0, r1, d7
 800077c:	f000 f804 	bl	8000788 <__aeabi_d2ulz>
 8000780:	4240      	negs	r0, r0
 8000782:	eb61 0141 	sbc.w	r1, r1, r1, lsl #1
 8000786:	bd08      	pop	{r3, pc}

08000788 <__aeabi_d2ulz>:
 8000788:	ed9f 6b0b 	vldr	d6, [pc, #44]	@ 80007b8 <__aeabi_d2ulz+0x30>
 800078c:	ec41 0b17 	vmov	d7, r0, r1
 8000790:	ed9f 5b0b 	vldr	d5, [pc, #44]	@ 80007c0 <__aeabi_d2ulz+0x38>
 8000794:	ee27 6b06 	vmul.f64	d6, d7, d6
 8000798:	eebc 6bc6 	vcvt.u32.f64	s12, d6
 800079c:	eeb8 4b46 	vcvt.f64.u32	d4, s12
 80007a0:	eea4 7b45 	vfms.f64	d7, d4, d5
 80007a4:	eefc 7bc7 	vcvt.u32.f64	s15, d7
 80007a8:	ee16 1a10 	vmov	r1, s12
 80007ac:	ee17 0a90 	vmov	r0, s15
 80007b0:	4770      	bx	lr
 80007b2:	bf00      	nop
 80007b4:	f3af 8000 	nop.w
 80007b8:	00000000 	.word	0x00000000
 80007bc:	3df00000 	.word	0x3df00000
 80007c0:	00000000 	.word	0x00000000
 80007c4:	41f00000 	.word	0x41f00000

080007c8 <__udivmoddi4>:
 80007c8:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 80007cc:	9d08      	ldr	r5, [sp, #32]
 80007ce:	460c      	mov	r4, r1
 80007d0:	2b00      	cmp	r3, #0
 80007d2:	d14e      	bne.n	8000872 <__udivmoddi4+0xaa>
 80007d4:	4694      	mov	ip, r2
 80007d6:	458c      	cmp	ip, r1
 80007d8:	4686      	mov	lr, r0
 80007da:	fab2 f282 	clz	r2, r2
 80007de:	d962      	bls.n	80008a6 <__udivmoddi4+0xde>
 80007e0:	b14a      	cbz	r2, 80007f6 <__udivmoddi4+0x2e>
 80007e2:	f1c2 0320 	rsb	r3, r2, #32
 80007e6:	4091      	lsls	r1, r2
 80007e8:	fa20 f303 	lsr.w	r3, r0, r3
 80007ec:	fa0c fc02 	lsl.w	ip, ip, r2
 80007f0:	4319      	orrs	r1, r3
 80007f2:	fa00 fe02 	lsl.w	lr, r0, r2
 80007f6:	ea4f 471c 	mov.w	r7, ip, lsr #16
 80007fa:	fa1f f68c 	uxth.w	r6, ip
 80007fe:	fbb1 f4f7 	udiv	r4, r1, r7
 8000802:	ea4f 431e 	mov.w	r3, lr, lsr #16
 8000806:	fb07 1114 	mls	r1, r7, r4, r1
 800080a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800080e:	fb04 f106 	mul.w	r1, r4, r6
 8000812:	4299      	cmp	r1, r3
 8000814:	d90a      	bls.n	800082c <__udivmoddi4+0x64>
 8000816:	eb1c 0303 	adds.w	r3, ip, r3
 800081a:	f104 30ff 	add.w	r0, r4, #4294967295	@ 0xffffffff
 800081e:	f080 8112 	bcs.w	8000a46 <__udivmoddi4+0x27e>
 8000822:	4299      	cmp	r1, r3
 8000824:	f240 810f 	bls.w	8000a46 <__udivmoddi4+0x27e>
 8000828:	3c02      	subs	r4, #2
 800082a:	4463      	add	r3, ip
 800082c:	1a59      	subs	r1, r3, r1
 800082e:	fa1f f38e 	uxth.w	r3, lr
 8000832:	fbb1 f0f7 	udiv	r0, r1, r7
 8000836:	fb07 1110 	mls	r1, r7, r0, r1
 800083a:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 800083e:	fb00 f606 	mul.w	r6, r0, r6
 8000842:	429e      	cmp	r6, r3
 8000844:	d90a      	bls.n	800085c <__udivmoddi4+0x94>
 8000846:	eb1c 0303 	adds.w	r3, ip, r3
 800084a:	f100 31ff 	add.w	r1, r0, #4294967295	@ 0xffffffff
 800084e:	f080 80fc 	bcs.w	8000a4a <__udivmoddi4+0x282>
 8000852:	429e      	cmp	r6, r3
 8000854:	f240 80f9 	bls.w	8000a4a <__udivmoddi4+0x282>
 8000858:	4463      	add	r3, ip
 800085a:	3802      	subs	r0, #2
 800085c:	1b9b      	subs	r3, r3, r6
 800085e:	ea40 4004 	orr.w	r0, r0, r4, lsl #16
 8000862:	2100      	movs	r1, #0
 8000864:	b11d      	cbz	r5, 800086e <__udivmoddi4+0xa6>
 8000866:	40d3      	lsrs	r3, r2
 8000868:	2200      	movs	r2, #0
 800086a:	e9c5 3200 	strd	r3, r2, [r5]
 800086e:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 8000872:	428b      	cmp	r3, r1
 8000874:	d905      	bls.n	8000882 <__udivmoddi4+0xba>
 8000876:	b10d      	cbz	r5, 800087c <__udivmoddi4+0xb4>
 8000878:	e9c5 0100 	strd	r0, r1, [r5]
 800087c:	2100      	movs	r1, #0
 800087e:	4608      	mov	r0, r1
 8000880:	e7f5      	b.n	800086e <__udivmoddi4+0xa6>
 8000882:	fab3 f183 	clz	r1, r3
 8000886:	2900      	cmp	r1, #0
 8000888:	d146      	bne.n	8000918 <__udivmoddi4+0x150>
 800088a:	42a3      	cmp	r3, r4
 800088c:	d302      	bcc.n	8000894 <__udivmoddi4+0xcc>
 800088e:	4290      	cmp	r0, r2
 8000890:	f0c0 80f0 	bcc.w	8000a74 <__udivmoddi4+0x2ac>
 8000894:	1a86      	subs	r6, r0, r2
 8000896:	eb64 0303 	sbc.w	r3, r4, r3
 800089a:	2001      	movs	r0, #1
 800089c:	2d00      	cmp	r5, #0
 800089e:	d0e6      	beq.n	800086e <__udivmoddi4+0xa6>
 80008a0:	e9c5 6300 	strd	r6, r3, [r5]
 80008a4:	e7e3      	b.n	800086e <__udivmoddi4+0xa6>
 80008a6:	2a00      	cmp	r2, #0
 80008a8:	f040 8090 	bne.w	80009cc <__udivmoddi4+0x204>
 80008ac:	eba1 040c 	sub.w	r4, r1, ip
 80008b0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80008b4:	fa1f f78c 	uxth.w	r7, ip
 80008b8:	2101      	movs	r1, #1
 80008ba:	fbb4 f6f8 	udiv	r6, r4, r8
 80008be:	ea4f 431e 	mov.w	r3, lr, lsr #16
 80008c2:	fb08 4416 	mls	r4, r8, r6, r4
 80008c6:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008ca:	fb07 f006 	mul.w	r0, r7, r6
 80008ce:	4298      	cmp	r0, r3
 80008d0:	d908      	bls.n	80008e4 <__udivmoddi4+0x11c>
 80008d2:	eb1c 0303 	adds.w	r3, ip, r3
 80008d6:	f106 34ff 	add.w	r4, r6, #4294967295	@ 0xffffffff
 80008da:	d202      	bcs.n	80008e2 <__udivmoddi4+0x11a>
 80008dc:	4298      	cmp	r0, r3
 80008de:	f200 80cd 	bhi.w	8000a7c <__udivmoddi4+0x2b4>
 80008e2:	4626      	mov	r6, r4
 80008e4:	1a1c      	subs	r4, r3, r0
 80008e6:	fa1f f38e 	uxth.w	r3, lr
 80008ea:	fbb4 f0f8 	udiv	r0, r4, r8
 80008ee:	fb08 4410 	mls	r4, r8, r0, r4
 80008f2:	ea43 4304 	orr.w	r3, r3, r4, lsl #16
 80008f6:	fb00 f707 	mul.w	r7, r0, r7
 80008fa:	429f      	cmp	r7, r3
 80008fc:	d908      	bls.n	8000910 <__udivmoddi4+0x148>
 80008fe:	eb1c 0303 	adds.w	r3, ip, r3
 8000902:	f100 34ff 	add.w	r4, r0, #4294967295	@ 0xffffffff
 8000906:	d202      	bcs.n	800090e <__udivmoddi4+0x146>
 8000908:	429f      	cmp	r7, r3
 800090a:	f200 80b0 	bhi.w	8000a6e <__udivmoddi4+0x2a6>
 800090e:	4620      	mov	r0, r4
 8000910:	1bdb      	subs	r3, r3, r7
 8000912:	ea40 4006 	orr.w	r0, r0, r6, lsl #16
 8000916:	e7a5      	b.n	8000864 <__udivmoddi4+0x9c>
 8000918:	f1c1 0620 	rsb	r6, r1, #32
 800091c:	408b      	lsls	r3, r1
 800091e:	fa22 f706 	lsr.w	r7, r2, r6
 8000922:	431f      	orrs	r7, r3
 8000924:	fa20 fc06 	lsr.w	ip, r0, r6
 8000928:	fa04 f301 	lsl.w	r3, r4, r1
 800092c:	ea43 030c 	orr.w	r3, r3, ip
 8000930:	40f4      	lsrs	r4, r6
 8000932:	fa00 f801 	lsl.w	r8, r0, r1
 8000936:	0c38      	lsrs	r0, r7, #16
 8000938:	ea4f 4913 	mov.w	r9, r3, lsr #16
 800093c:	fbb4 fef0 	udiv	lr, r4, r0
 8000940:	fa1f fc87 	uxth.w	ip, r7
 8000944:	fb00 441e 	mls	r4, r0, lr, r4
 8000948:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 800094c:	fb0e f90c 	mul.w	r9, lr, ip
 8000950:	45a1      	cmp	r9, r4
 8000952:	fa02 f201 	lsl.w	r2, r2, r1
 8000956:	d90a      	bls.n	800096e <__udivmoddi4+0x1a6>
 8000958:	193c      	adds	r4, r7, r4
 800095a:	f10e 3aff 	add.w	sl, lr, #4294967295	@ 0xffffffff
 800095e:	f080 8084 	bcs.w	8000a6a <__udivmoddi4+0x2a2>
 8000962:	45a1      	cmp	r9, r4
 8000964:	f240 8081 	bls.w	8000a6a <__udivmoddi4+0x2a2>
 8000968:	f1ae 0e02 	sub.w	lr, lr, #2
 800096c:	443c      	add	r4, r7
 800096e:	eba4 0409 	sub.w	r4, r4, r9
 8000972:	fa1f f983 	uxth.w	r9, r3
 8000976:	fbb4 f3f0 	udiv	r3, r4, r0
 800097a:	fb00 4413 	mls	r4, r0, r3, r4
 800097e:	ea49 4404 	orr.w	r4, r9, r4, lsl #16
 8000982:	fb03 fc0c 	mul.w	ip, r3, ip
 8000986:	45a4      	cmp	ip, r4
 8000988:	d907      	bls.n	800099a <__udivmoddi4+0x1d2>
 800098a:	193c      	adds	r4, r7, r4
 800098c:	f103 30ff 	add.w	r0, r3, #4294967295	@ 0xffffffff
 8000990:	d267      	bcs.n	8000a62 <__udivmoddi4+0x29a>
 8000992:	45a4      	cmp	ip, r4
 8000994:	d965      	bls.n	8000a62 <__udivmoddi4+0x29a>
 8000996:	3b02      	subs	r3, #2
 8000998:	443c      	add	r4, r7
 800099a:	ea43 400e 	orr.w	r0, r3, lr, lsl #16
 800099e:	fba0 9302 	umull	r9, r3, r0, r2
 80009a2:	eba4 040c 	sub.w	r4, r4, ip
 80009a6:	429c      	cmp	r4, r3
 80009a8:	46ce      	mov	lr, r9
 80009aa:	469c      	mov	ip, r3
 80009ac:	d351      	bcc.n	8000a52 <__udivmoddi4+0x28a>
 80009ae:	d04e      	beq.n	8000a4e <__udivmoddi4+0x286>
 80009b0:	b155      	cbz	r5, 80009c8 <__udivmoddi4+0x200>
 80009b2:	ebb8 030e 	subs.w	r3, r8, lr
 80009b6:	eb64 040c 	sbc.w	r4, r4, ip
 80009ba:	fa04 f606 	lsl.w	r6, r4, r6
 80009be:	40cb      	lsrs	r3, r1
 80009c0:	431e      	orrs	r6, r3
 80009c2:	40cc      	lsrs	r4, r1
 80009c4:	e9c5 6400 	strd	r6, r4, [r5]
 80009c8:	2100      	movs	r1, #0
 80009ca:	e750      	b.n	800086e <__udivmoddi4+0xa6>
 80009cc:	f1c2 0320 	rsb	r3, r2, #32
 80009d0:	fa20 f103 	lsr.w	r1, r0, r3
 80009d4:	fa0c fc02 	lsl.w	ip, ip, r2
 80009d8:	fa24 f303 	lsr.w	r3, r4, r3
 80009dc:	4094      	lsls	r4, r2
 80009de:	430c      	orrs	r4, r1
 80009e0:	ea4f 481c 	mov.w	r8, ip, lsr #16
 80009e4:	fa00 fe02 	lsl.w	lr, r0, r2
 80009e8:	fa1f f78c 	uxth.w	r7, ip
 80009ec:	fbb3 f0f8 	udiv	r0, r3, r8
 80009f0:	fb08 3110 	mls	r1, r8, r0, r3
 80009f4:	0c23      	lsrs	r3, r4, #16
 80009f6:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 80009fa:	fb00 f107 	mul.w	r1, r0, r7
 80009fe:	4299      	cmp	r1, r3
 8000a00:	d908      	bls.n	8000a14 <__udivmoddi4+0x24c>
 8000a02:	eb1c 0303 	adds.w	r3, ip, r3
 8000a06:	f100 36ff 	add.w	r6, r0, #4294967295	@ 0xffffffff
 8000a0a:	d22c      	bcs.n	8000a66 <__udivmoddi4+0x29e>
 8000a0c:	4299      	cmp	r1, r3
 8000a0e:	d92a      	bls.n	8000a66 <__udivmoddi4+0x29e>
 8000a10:	3802      	subs	r0, #2
 8000a12:	4463      	add	r3, ip
 8000a14:	1a5b      	subs	r3, r3, r1
 8000a16:	b2a4      	uxth	r4, r4
 8000a18:	fbb3 f1f8 	udiv	r1, r3, r8
 8000a1c:	fb08 3311 	mls	r3, r8, r1, r3
 8000a20:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
 8000a24:	fb01 f307 	mul.w	r3, r1, r7
 8000a28:	42a3      	cmp	r3, r4
 8000a2a:	d908      	bls.n	8000a3e <__udivmoddi4+0x276>
 8000a2c:	eb1c 0404 	adds.w	r4, ip, r4
 8000a30:	f101 36ff 	add.w	r6, r1, #4294967295	@ 0xffffffff
 8000a34:	d213      	bcs.n	8000a5e <__udivmoddi4+0x296>
 8000a36:	42a3      	cmp	r3, r4
 8000a38:	d911      	bls.n	8000a5e <__udivmoddi4+0x296>
 8000a3a:	3902      	subs	r1, #2
 8000a3c:	4464      	add	r4, ip
 8000a3e:	1ae4      	subs	r4, r4, r3
 8000a40:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 8000a44:	e739      	b.n	80008ba <__udivmoddi4+0xf2>
 8000a46:	4604      	mov	r4, r0
 8000a48:	e6f0      	b.n	800082c <__udivmoddi4+0x64>
 8000a4a:	4608      	mov	r0, r1
 8000a4c:	e706      	b.n	800085c <__udivmoddi4+0x94>
 8000a4e:	45c8      	cmp	r8, r9
 8000a50:	d2ae      	bcs.n	80009b0 <__udivmoddi4+0x1e8>
 8000a52:	ebb9 0e02 	subs.w	lr, r9, r2
 8000a56:	eb63 0c07 	sbc.w	ip, r3, r7
 8000a5a:	3801      	subs	r0, #1
 8000a5c:	e7a8      	b.n	80009b0 <__udivmoddi4+0x1e8>
 8000a5e:	4631      	mov	r1, r6
 8000a60:	e7ed      	b.n	8000a3e <__udivmoddi4+0x276>
 8000a62:	4603      	mov	r3, r0
 8000a64:	e799      	b.n	800099a <__udivmoddi4+0x1d2>
 8000a66:	4630      	mov	r0, r6
 8000a68:	e7d4      	b.n	8000a14 <__udivmoddi4+0x24c>
 8000a6a:	46d6      	mov	lr, sl
 8000a6c:	e77f      	b.n	800096e <__udivmoddi4+0x1a6>
 8000a6e:	4463      	add	r3, ip
 8000a70:	3802      	subs	r0, #2
 8000a72:	e74d      	b.n	8000910 <__udivmoddi4+0x148>
 8000a74:	4606      	mov	r6, r0
 8000a76:	4623      	mov	r3, r4
 8000a78:	4608      	mov	r0, r1
 8000a7a:	e70f      	b.n	800089c <__udivmoddi4+0xd4>
 8000a7c:	3e02      	subs	r6, #2
 8000a7e:	4463      	add	r3, ip
 8000a80:	e730      	b.n	80008e4 <__udivmoddi4+0x11c>
 8000a82:	bf00      	nop

08000a84 <__aeabi_idiv0>:
 8000a84:	4770      	bx	lr
 8000a86:	bf00      	nop

08000a88 <case_insensitive_strcmp>:
    return version;
}

/* Case insensitive string comparison, doesn't consider two NULL pointers equal though */
static int case_insensitive_strcmp(const unsigned char *string1, const unsigned char *string2)
{
 8000a88:	b480      	push	{r7}
 8000a8a:	b085      	sub	sp, #20
 8000a8c:	af00      	add	r7, sp, #0
 8000a8e:	6078      	str	r0, [r7, #4]
 8000a90:	6039      	str	r1, [r7, #0]
    if ((string1 == NULL) || (string2 == NULL))
 8000a92:	687b      	ldr	r3, [r7, #4]
 8000a94:	2b00      	cmp	r3, #0
 8000a96:	d002      	beq.n	8000a9e <case_insensitive_strcmp+0x16>
 8000a98:	683b      	ldr	r3, [r7, #0]
 8000a9a:	2b00      	cmp	r3, #0
 8000a9c:	d101      	bne.n	8000aa2 <case_insensitive_strcmp+0x1a>
    {
        return 1;
 8000a9e:	2301      	movs	r3, #1
 8000aa0:	e056      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    if (string1 == string2)
 8000aa2:	687a      	ldr	r2, [r7, #4]
 8000aa4:	683b      	ldr	r3, [r7, #0]
 8000aa6:	429a      	cmp	r2, r3
 8000aa8:	d10d      	bne.n	8000ac6 <case_insensitive_strcmp+0x3e>
    {
        return 0;
 8000aaa:	2300      	movs	r3, #0
 8000aac:	e050      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    }

    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
    {
        if (*string1 == '\0')
 8000aae:	687b      	ldr	r3, [r7, #4]
 8000ab0:	781b      	ldrb	r3, [r3, #0]
 8000ab2:	2b00      	cmp	r3, #0
 8000ab4:	d101      	bne.n	8000aba <case_insensitive_strcmp+0x32>
        {
            return 0;
 8000ab6:	2300      	movs	r3, #0
 8000ab8:	e04a      	b.n	8000b50 <case_insensitive_strcmp+0xc8>
    for(; tolower(*string1) == tolower(*string2); (void)string1++, string2++)
 8000aba:	687b      	ldr	r3, [r7, #4]
 8000abc:	3301      	adds	r3, #1
 8000abe:	607b      	str	r3, [r7, #4]
 8000ac0:	683b      	ldr	r3, [r7, #0]
 8000ac2:	3301      	adds	r3, #1
 8000ac4:	603b      	str	r3, [r7, #0]
 8000ac6:	687b      	ldr	r3, [r7, #4]
 8000ac8:	781b      	ldrb	r3, [r3, #0]
 8000aca:	73fb      	strb	r3, [r7, #15]
 8000acc:	7bfb      	ldrb	r3, [r7, #15]
 8000ace:	3301      	adds	r3, #1
 8000ad0:	4a22      	ldr	r2, [pc, #136]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000ad2:	4413      	add	r3, r2
 8000ad4:	781b      	ldrb	r3, [r3, #0]
 8000ad6:	f003 0303 	and.w	r3, r3, #3
 8000ada:	2b01      	cmp	r3, #1
 8000adc:	d103      	bne.n	8000ae6 <case_insensitive_strcmp+0x5e>
 8000ade:	7bfb      	ldrb	r3, [r7, #15]
 8000ae0:	f103 0220 	add.w	r2, r3, #32
 8000ae4:	e000      	b.n	8000ae8 <case_insensitive_strcmp+0x60>
 8000ae6:	7bfa      	ldrb	r2, [r7, #15]
 8000ae8:	683b      	ldr	r3, [r7, #0]
 8000aea:	781b      	ldrb	r3, [r3, #0]
 8000aec:	73bb      	strb	r3, [r7, #14]
 8000aee:	7bbb      	ldrb	r3, [r7, #14]
 8000af0:	3301      	adds	r3, #1
 8000af2:	491a      	ldr	r1, [pc, #104]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000af4:	440b      	add	r3, r1
 8000af6:	781b      	ldrb	r3, [r3, #0]
 8000af8:	f003 0303 	and.w	r3, r3, #3
 8000afc:	2b01      	cmp	r3, #1
 8000afe:	d102      	bne.n	8000b06 <case_insensitive_strcmp+0x7e>
 8000b00:	7bbb      	ldrb	r3, [r7, #14]
 8000b02:	3320      	adds	r3, #32
 8000b04:	e000      	b.n	8000b08 <case_insensitive_strcmp+0x80>
 8000b06:	7bbb      	ldrb	r3, [r7, #14]
 8000b08:	429a      	cmp	r2, r3
 8000b0a:	d0d0      	beq.n	8000aae <case_insensitive_strcmp+0x26>
        }
    }

    return tolower(*string1) - tolower(*string2);
 8000b0c:	687b      	ldr	r3, [r7, #4]
 8000b0e:	781b      	ldrb	r3, [r3, #0]
 8000b10:	737b      	strb	r3, [r7, #13]
 8000b12:	7b7b      	ldrb	r3, [r7, #13]
 8000b14:	3301      	adds	r3, #1
 8000b16:	4a11      	ldr	r2, [pc, #68]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b18:	4413      	add	r3, r2
 8000b1a:	781b      	ldrb	r3, [r3, #0]
 8000b1c:	f003 0303 	and.w	r3, r3, #3
 8000b20:	2b01      	cmp	r3, #1
 8000b22:	d103      	bne.n	8000b2c <case_insensitive_strcmp+0xa4>
 8000b24:	7b7b      	ldrb	r3, [r7, #13]
 8000b26:	f103 0220 	add.w	r2, r3, #32
 8000b2a:	e000      	b.n	8000b2e <case_insensitive_strcmp+0xa6>
 8000b2c:	7b7a      	ldrb	r2, [r7, #13]
 8000b2e:	683b      	ldr	r3, [r7, #0]
 8000b30:	781b      	ldrb	r3, [r3, #0]
 8000b32:	733b      	strb	r3, [r7, #12]
 8000b34:	7b3b      	ldrb	r3, [r7, #12]
 8000b36:	3301      	adds	r3, #1
 8000b38:	4908      	ldr	r1, [pc, #32]	@ (8000b5c <case_insensitive_strcmp+0xd4>)
 8000b3a:	440b      	add	r3, r1
 8000b3c:	781b      	ldrb	r3, [r3, #0]
 8000b3e:	f003 0303 	and.w	r3, r3, #3
 8000b42:	2b01      	cmp	r3, #1
 8000b44:	d102      	bne.n	8000b4c <case_insensitive_strcmp+0xc4>
 8000b46:	7b3b      	ldrb	r3, [r7, #12]
 8000b48:	3320      	adds	r3, #32
 8000b4a:	e000      	b.n	8000b4e <case_insensitive_strcmp+0xc6>
 8000b4c:	7b3b      	ldrb	r3, [r7, #12]
 8000b4e:	1ad3      	subs	r3, r2, r3
}
 8000b50:	4618      	mov	r0, r3
 8000b52:	3714      	adds	r7, #20
 8000b54:	46bd      	mov	sp, r7
 8000b56:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000b5a:	4770      	bx	lr
 8000b5c:	08031fd0 	.word	0x08031fd0

08000b60 <cJSON_New_Item>:
    }
}

/* Internal constructor. */
static cJSON *cJSON_New_Item(const internal_hooks * const hooks)
{
 8000b60:	b580      	push	{r7, lr}
 8000b62:	b084      	sub	sp, #16
 8000b64:	af00      	add	r7, sp, #0
 8000b66:	6078      	str	r0, [r7, #4]
    cJSON* node = (cJSON*)hooks->allocate(sizeof(cJSON));
 8000b68:	687b      	ldr	r3, [r7, #4]
 8000b6a:	681b      	ldr	r3, [r3, #0]
 8000b6c:	2028      	movs	r0, #40	@ 0x28
 8000b6e:	4798      	blx	r3
 8000b70:	60f8      	str	r0, [r7, #12]
    if (node)
 8000b72:	68fb      	ldr	r3, [r7, #12]
 8000b74:	2b00      	cmp	r3, #0
 8000b76:	d004      	beq.n	8000b82 <cJSON_New_Item+0x22>
    {
        memset(node, '\0', sizeof(cJSON));
 8000b78:	2228      	movs	r2, #40	@ 0x28
 8000b7a:	2100      	movs	r1, #0
 8000b7c:	68f8      	ldr	r0, [r7, #12]
 8000b7e:	f02a f8ff 	bl	802ad80 <memset>
    }

    return node;
 8000b82:	68fb      	ldr	r3, [r7, #12]
}
 8000b84:	4618      	mov	r0, r3
 8000b86:	3710      	adds	r7, #16
 8000b88:	46bd      	mov	sp, r7
 8000b8a:	bd80      	pop	{r7, pc}

08000b8c <cJSON_Delete>:

/* Delete a cJSON structure. */
CJSON_PUBLIC(void) cJSON_Delete(cJSON *item)
{
 8000b8c:	b580      	push	{r7, lr}
 8000b8e:	b084      	sub	sp, #16
 8000b90:	af00      	add	r7, sp, #0
 8000b92:	6078      	str	r0, [r7, #4]
    cJSON *next = NULL;
 8000b94:	2300      	movs	r3, #0
 8000b96:	60fb      	str	r3, [r7, #12]
    while (item != NULL)
 8000b98:	e03d      	b.n	8000c16 <cJSON_Delete+0x8a>
    {
        next = item->next;
 8000b9a:	687b      	ldr	r3, [r7, #4]
 8000b9c:	681b      	ldr	r3, [r3, #0]
 8000b9e:	60fb      	str	r3, [r7, #12]
        if (!(item->type & cJSON_IsReference) && (item->child != NULL))
 8000ba0:	687b      	ldr	r3, [r7, #4]
 8000ba2:	68db      	ldr	r3, [r3, #12]
 8000ba4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000ba8:	2b00      	cmp	r3, #0
 8000baa:	d108      	bne.n	8000bbe <cJSON_Delete+0x32>
 8000bac:	687b      	ldr	r3, [r7, #4]
 8000bae:	689b      	ldr	r3, [r3, #8]
 8000bb0:	2b00      	cmp	r3, #0
 8000bb2:	d004      	beq.n	8000bbe <cJSON_Delete+0x32>
        {
            cJSON_Delete(item->child);
 8000bb4:	687b      	ldr	r3, [r7, #4]
 8000bb6:	689b      	ldr	r3, [r3, #8]
 8000bb8:	4618      	mov	r0, r3
 8000bba:	f7ff ffe7 	bl	8000b8c <cJSON_Delete>
        }
        if (!(item->type & cJSON_IsReference) && (item->valuestring != NULL))
 8000bbe:	687b      	ldr	r3, [r7, #4]
 8000bc0:	68db      	ldr	r3, [r3, #12]
 8000bc2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8000bc6:	2b00      	cmp	r3, #0
 8000bc8:	d10c      	bne.n	8000be4 <cJSON_Delete+0x58>
 8000bca:	687b      	ldr	r3, [r7, #4]
 8000bcc:	691b      	ldr	r3, [r3, #16]
 8000bce:	2b00      	cmp	r3, #0
 8000bd0:	d008      	beq.n	8000be4 <cJSON_Delete+0x58>
        {
            global_hooks.deallocate(item->valuestring);
 8000bd2:	4b15      	ldr	r3, [pc, #84]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bd4:	685b      	ldr	r3, [r3, #4]
 8000bd6:	687a      	ldr	r2, [r7, #4]
 8000bd8:	6912      	ldr	r2, [r2, #16]
 8000bda:	4610      	mov	r0, r2
 8000bdc:	4798      	blx	r3
            item->valuestring = NULL;
 8000bde:	687b      	ldr	r3, [r7, #4]
 8000be0:	2200      	movs	r2, #0
 8000be2:	611a      	str	r2, [r3, #16]
        }
        if (!(item->type & cJSON_StringIsConst) && (item->string != NULL))
 8000be4:	687b      	ldr	r3, [r7, #4]
 8000be6:	68db      	ldr	r3, [r3, #12]
 8000be8:	f403 7300 	and.w	r3, r3, #512	@ 0x200
 8000bec:	2b00      	cmp	r3, #0
 8000bee:	d10c      	bne.n	8000c0a <cJSON_Delete+0x7e>
 8000bf0:	687b      	ldr	r3, [r7, #4]
 8000bf2:	6a1b      	ldr	r3, [r3, #32]
 8000bf4:	2b00      	cmp	r3, #0
 8000bf6:	d008      	beq.n	8000c0a <cJSON_Delete+0x7e>
        {
            global_hooks.deallocate(item->string);
 8000bf8:	4b0b      	ldr	r3, [pc, #44]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000bfa:	685b      	ldr	r3, [r3, #4]
 8000bfc:	687a      	ldr	r2, [r7, #4]
 8000bfe:	6a12      	ldr	r2, [r2, #32]
 8000c00:	4610      	mov	r0, r2
 8000c02:	4798      	blx	r3
            item->string = NULL;
 8000c04:	687b      	ldr	r3, [r7, #4]
 8000c06:	2200      	movs	r2, #0
 8000c08:	621a      	str	r2, [r3, #32]
        }
        global_hooks.deallocate(item);
 8000c0a:	4b07      	ldr	r3, [pc, #28]	@ (8000c28 <cJSON_Delete+0x9c>)
 8000c0c:	685b      	ldr	r3, [r3, #4]
 8000c0e:	6878      	ldr	r0, [r7, #4]
 8000c10:	4798      	blx	r3
        item = next;
 8000c12:	68fb      	ldr	r3, [r7, #12]
 8000c14:	607b      	str	r3, [r7, #4]
    while (item != NULL)
 8000c16:	687b      	ldr	r3, [r7, #4]
 8000c18:	2b00      	cmp	r3, #0
 8000c1a:	d1be      	bne.n	8000b9a <cJSON_Delete+0xe>
    }
}
 8000c1c:	bf00      	nop
 8000c1e:	bf00      	nop
 8000c20:	3710      	adds	r7, #16
 8000c22:	46bd      	mov	sp, r7
 8000c24:	bd80      	pop	{r7, pc}
 8000c26:	bf00      	nop
 8000c28:	24000000 	.word	0x24000000

08000c2c <get_decimal_point>:

/* get the decimal point character of the current locale */
static unsigned char get_decimal_point(void)
{
 8000c2c:	b480      	push	{r7}
 8000c2e:	af00      	add	r7, sp, #0
#ifdef ENABLE_LOCALES
    struct lconv *lconv = localeconv();
    return (unsigned char) lconv->decimal_point[0];
#else
    return '.';
 8000c30:	232e      	movs	r3, #46	@ 0x2e
#endif
}
 8000c32:	4618      	mov	r0, r3
 8000c34:	46bd      	mov	sp, r7
 8000c36:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000c3a:	4770      	bx	lr
 8000c3c:	0000      	movs	r0, r0
	...

08000c40 <parse_number>:
/* get a pointer to the buffer at the position */
#define buffer_at_offset(buffer) ((buffer)->content + (buffer)->offset)

/* Parse the input text to generate a number, and populate the result into item. */
static cJSON_bool parse_number(cJSON * const item, parse_buffer * const input_buffer)
{
 8000c40:	b580      	push	{r7, lr}
 8000c42:	b098      	sub	sp, #96	@ 0x60
 8000c44:	af00      	add	r7, sp, #0
 8000c46:	6078      	str	r0, [r7, #4]
 8000c48:	6039      	str	r1, [r7, #0]
    double number = 0;
 8000c4a:	f04f 0200 	mov.w	r2, #0
 8000c4e:	f04f 0300 	mov.w	r3, #0
 8000c52:	e9c7 2314 	strd	r2, r3, [r7, #80]	@ 0x50
    unsigned char *after_end = NULL;
 8000c56:	2300      	movs	r3, #0
 8000c58:	64bb      	str	r3, [r7, #72]	@ 0x48
    unsigned char number_c_string[64];
    unsigned char decimal_point = get_decimal_point();
 8000c5a:	f7ff ffe7 	bl	8000c2c <get_decimal_point>
 8000c5e:	4603      	mov	r3, r0
 8000c60:	f887 304f 	strb.w	r3, [r7, #79]	@ 0x4f
    size_t i = 0;
 8000c64:	2300      	movs	r3, #0
 8000c66:	65fb      	str	r3, [r7, #92]	@ 0x5c

    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 8000c68:	683b      	ldr	r3, [r7, #0]
 8000c6a:	2b00      	cmp	r3, #0
 8000c6c:	d003      	beq.n	8000c76 <parse_number+0x36>
 8000c6e:	683b      	ldr	r3, [r7, #0]
 8000c70:	681b      	ldr	r3, [r3, #0]
 8000c72:	2b00      	cmp	r3, #0
 8000c74:	d101      	bne.n	8000c7a <parse_number+0x3a>
    {
        return false;
 8000c76:	2300      	movs	r3, #0
 8000c78:	e09f      	b.n	8000dba <parse_number+0x17a>
    }

    /* copy the number into a temporary buffer and replace '.' with the decimal point
     * of the current locale (for strtod)
     * This also takes care of '\0' not necessarily being available for marking the end of the input */
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000c7a:	2300      	movs	r3, #0
 8000c7c:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000c7e:	e03d      	b.n	8000cfc <parse_number+0xbc>
    {
        switch (buffer_at_offset(input_buffer)[i])
 8000c80:	683b      	ldr	r3, [r7, #0]
 8000c82:	681a      	ldr	r2, [r3, #0]
 8000c84:	683b      	ldr	r3, [r7, #0]
 8000c86:	6899      	ldr	r1, [r3, #8]
 8000c88:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000c8a:	440b      	add	r3, r1
 8000c8c:	4413      	add	r3, r2
 8000c8e:	781b      	ldrb	r3, [r3, #0]
 8000c90:	2b45      	cmp	r3, #69	@ 0x45
 8000c92:	dc17      	bgt.n	8000cc4 <parse_number+0x84>
 8000c94:	2b2b      	cmp	r3, #43	@ 0x2b
 8000c96:	db40      	blt.n	8000d1a <parse_number+0xda>
 8000c98:	3b2b      	subs	r3, #43	@ 0x2b
 8000c9a:	2201      	movs	r2, #1
 8000c9c:	409a      	lsls	r2, r3
 8000c9e:	4b4e      	ldr	r3, [pc, #312]	@ (8000dd8 <parse_number+0x198>)
 8000ca0:	4013      	ands	r3, r2
 8000ca2:	2b00      	cmp	r3, #0
 8000ca4:	bf14      	ite	ne
 8000ca6:	2301      	movne	r3, #1
 8000ca8:	2300      	moveq	r3, #0
 8000caa:	b2db      	uxtb	r3, r3
 8000cac:	2b00      	cmp	r3, #0
 8000cae:	d10b      	bne.n	8000cc8 <parse_number+0x88>
 8000cb0:	f002 0308 	and.w	r3, r2, #8
 8000cb4:	2b00      	cmp	r3, #0
 8000cb6:	bf14      	ite	ne
 8000cb8:	2301      	movne	r3, #1
 8000cba:	2300      	moveq	r3, #0
 8000cbc:	b2db      	uxtb	r3, r3
 8000cbe:	2b00      	cmp	r3, #0
 8000cc0:	d111      	bne.n	8000ce6 <parse_number+0xa6>
            case '.':
                number_c_string[i] = decimal_point;
                break;

            default:
                goto loop_end;
 8000cc2:	e02a      	b.n	8000d1a <parse_number+0xda>
        switch (buffer_at_offset(input_buffer)[i])
 8000cc4:	2b65      	cmp	r3, #101	@ 0x65
 8000cc6:	d128      	bne.n	8000d1a <parse_number+0xda>
                number_c_string[i] = buffer_at_offset(input_buffer)[i];
 8000cc8:	683b      	ldr	r3, [r7, #0]
 8000cca:	681a      	ldr	r2, [r3, #0]
 8000ccc:	683b      	ldr	r3, [r7, #0]
 8000cce:	6899      	ldr	r1, [r3, #8]
 8000cd0:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cd2:	440b      	add	r3, r1
 8000cd4:	4413      	add	r3, r2
 8000cd6:	7819      	ldrb	r1, [r3, #0]
 8000cd8:	f107 0208 	add.w	r2, r7, #8
 8000cdc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cde:	4413      	add	r3, r2
 8000ce0:	460a      	mov	r2, r1
 8000ce2:	701a      	strb	r2, [r3, #0]
                break;
 8000ce4:	e007      	b.n	8000cf6 <parse_number+0xb6>
                number_c_string[i] = decimal_point;
 8000ce6:	f107 0208 	add.w	r2, r7, #8
 8000cea:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cec:	4413      	add	r3, r2
 8000cee:	f897 204f 	ldrb.w	r2, [r7, #79]	@ 0x4f
 8000cf2:	701a      	strb	r2, [r3, #0]
                break;
 8000cf4:	bf00      	nop
    for (i = 0; (i < (sizeof(number_c_string) - 1)) && can_access_at_index(input_buffer, i); i++)
 8000cf6:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cf8:	3301      	adds	r3, #1
 8000cfa:	65fb      	str	r3, [r7, #92]	@ 0x5c
 8000cfc:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000cfe:	2b3e      	cmp	r3, #62	@ 0x3e
 8000d00:	d80d      	bhi.n	8000d1e <parse_number+0xde>
 8000d02:	683b      	ldr	r3, [r7, #0]
 8000d04:	2b00      	cmp	r3, #0
 8000d06:	d00a      	beq.n	8000d1e <parse_number+0xde>
 8000d08:	683b      	ldr	r3, [r7, #0]
 8000d0a:	689a      	ldr	r2, [r3, #8]
 8000d0c:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d0e:	441a      	add	r2, r3
 8000d10:	683b      	ldr	r3, [r7, #0]
 8000d12:	685b      	ldr	r3, [r3, #4]
 8000d14:	429a      	cmp	r2, r3
 8000d16:	d3b3      	bcc.n	8000c80 <parse_number+0x40>
        }
    }
loop_end:
 8000d18:	e001      	b.n	8000d1e <parse_number+0xde>
                goto loop_end;
 8000d1a:	bf00      	nop
 8000d1c:	e000      	b.n	8000d20 <parse_number+0xe0>
loop_end:
 8000d1e:	bf00      	nop
    number_c_string[i] = '\0';
 8000d20:	f107 0208 	add.w	r2, r7, #8
 8000d24:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8000d26:	4413      	add	r3, r2
 8000d28:	2200      	movs	r2, #0
 8000d2a:	701a      	strb	r2, [r3, #0]

    number = strtod((const char*)number_c_string, (char**)&after_end);
 8000d2c:	f107 0248 	add.w	r2, r7, #72	@ 0x48
 8000d30:	f107 0308 	add.w	r3, r7, #8
 8000d34:	4611      	mov	r1, r2
 8000d36:	4618      	mov	r0, r3
 8000d38:	f029 f98c 	bl	802a054 <strtod>
 8000d3c:	ed87 0b14 	vstr	d0, [r7, #80]	@ 0x50
    if (number_c_string == after_end)
 8000d40:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 8000d42:	f107 0308 	add.w	r3, r7, #8
 8000d46:	429a      	cmp	r2, r3
 8000d48:	d101      	bne.n	8000d4e <parse_number+0x10e>
    {
        return false; /* parse_error */
 8000d4a:	2300      	movs	r3, #0
 8000d4c:	e035      	b.n	8000dba <parse_number+0x17a>
    }

    item->valuedouble = number;
 8000d4e:	6879      	ldr	r1, [r7, #4]
 8000d50:	e9d7 2314 	ldrd	r2, r3, [r7, #80]	@ 0x50
 8000d54:	e9c1 2306 	strd	r2, r3, [r1, #24]

    /* use saturation in case of overflow */
    if (number >= INT_MAX)
 8000d58:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d5c:	ed9f 6b1a 	vldr	d6, [pc, #104]	@ 8000dc8 <parse_number+0x188>
 8000d60:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d64:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d68:	db04      	blt.n	8000d74 <parse_number+0x134>
    {
        item->valueint = INT_MAX;
 8000d6a:	687b      	ldr	r3, [r7, #4]
 8000d6c:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 8000d70:	615a      	str	r2, [r3, #20]
 8000d72:	e015      	b.n	8000da0 <parse_number+0x160>
    }
    else if (number <= (double)INT_MIN)
 8000d74:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d78:	ed9f 6b15 	vldr	d6, [pc, #84]	@ 8000dd0 <parse_number+0x190>
 8000d7c:	eeb4 7bc6 	vcmpe.f64	d7, d6
 8000d80:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8000d84:	d804      	bhi.n	8000d90 <parse_number+0x150>
    {
        item->valueint = INT_MIN;
 8000d86:	687b      	ldr	r3, [r7, #4]
 8000d88:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 8000d8c:	615a      	str	r2, [r3, #20]
 8000d8e:	e007      	b.n	8000da0 <parse_number+0x160>
    }
    else
    {
        item->valueint = (int)number;
 8000d90:	ed97 7b14 	vldr	d7, [r7, #80]	@ 0x50
 8000d94:	eefd 7bc7 	vcvt.s32.f64	s15, d7
 8000d98:	ee17 2a90 	vmov	r2, s15
 8000d9c:	687b      	ldr	r3, [r7, #4]
 8000d9e:	615a      	str	r2, [r3, #20]
    }

    item->type = cJSON_Number;
 8000da0:	687b      	ldr	r3, [r7, #4]
 8000da2:	2208      	movs	r2, #8
 8000da4:	60da      	str	r2, [r3, #12]

    input_buffer->offset += (size_t)(after_end - number_c_string);
 8000da6:	683b      	ldr	r3, [r7, #0]
 8000da8:	689b      	ldr	r3, [r3, #8]
 8000daa:	6cb9      	ldr	r1, [r7, #72]	@ 0x48
 8000dac:	f107 0208 	add.w	r2, r7, #8
 8000db0:	1a8a      	subs	r2, r1, r2
 8000db2:	441a      	add	r2, r3
 8000db4:	683b      	ldr	r3, [r7, #0]
 8000db6:	609a      	str	r2, [r3, #8]
    return true;
 8000db8:	2301      	movs	r3, #1
}
 8000dba:	4618      	mov	r0, r3
 8000dbc:	3760      	adds	r7, #96	@ 0x60
 8000dbe:	46bd      	mov	sp, r7
 8000dc0:	bd80      	pop	{r7, pc}
 8000dc2:	bf00      	nop
 8000dc4:	f3af 8000 	nop.w
 8000dc8:	ffc00000 	.word	0xffc00000
 8000dcc:	41dfffff 	.word	0x41dfffff
 8000dd0:	00000000 	.word	0x00000000
 8000dd4:	c1e00000 	.word	0xc1e00000
 8000dd8:	04007fe5 	.word	0x04007fe5

08000ddc <parse_hex4>:
    return true;
}

/* parse 4 digit hexadecimal number */
static unsigned parse_hex4(const unsigned char * const input)
{
 8000ddc:	b480      	push	{r7}
 8000dde:	b085      	sub	sp, #20
 8000de0:	af00      	add	r7, sp, #0
 8000de2:	6078      	str	r0, [r7, #4]
    unsigned int h = 0;
 8000de4:	2300      	movs	r3, #0
 8000de6:	60fb      	str	r3, [r7, #12]
    size_t i = 0;
 8000de8:	2300      	movs	r3, #0
 8000dea:	60bb      	str	r3, [r7, #8]

    for (i = 0; i < 4; i++)
 8000dec:	2300      	movs	r3, #0
 8000dee:	60bb      	str	r3, [r7, #8]
 8000df0:	e04c      	b.n	8000e8c <parse_hex4+0xb0>
    {
        /* parse digit */
        if ((input[i] >= '0') && (input[i] <= '9'))
 8000df2:	687a      	ldr	r2, [r7, #4]
 8000df4:	68bb      	ldr	r3, [r7, #8]
 8000df6:	4413      	add	r3, r2
 8000df8:	781b      	ldrb	r3, [r3, #0]
 8000dfa:	2b2f      	cmp	r3, #47	@ 0x2f
 8000dfc:	d90f      	bls.n	8000e1e <parse_hex4+0x42>
 8000dfe:	687a      	ldr	r2, [r7, #4]
 8000e00:	68bb      	ldr	r3, [r7, #8]
 8000e02:	4413      	add	r3, r2
 8000e04:	781b      	ldrb	r3, [r3, #0]
 8000e06:	2b39      	cmp	r3, #57	@ 0x39
 8000e08:	d809      	bhi.n	8000e1e <parse_hex4+0x42>
        {
            h += (unsigned int) input[i] - '0';
 8000e0a:	687a      	ldr	r2, [r7, #4]
 8000e0c:	68bb      	ldr	r3, [r7, #8]
 8000e0e:	4413      	add	r3, r2
 8000e10:	781b      	ldrb	r3, [r3, #0]
 8000e12:	461a      	mov	r2, r3
 8000e14:	68fb      	ldr	r3, [r7, #12]
 8000e16:	4413      	add	r3, r2
 8000e18:	3b30      	subs	r3, #48	@ 0x30
 8000e1a:	60fb      	str	r3, [r7, #12]
 8000e1c:	e02d      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'A') && (input[i] <= 'F'))
 8000e1e:	687a      	ldr	r2, [r7, #4]
 8000e20:	68bb      	ldr	r3, [r7, #8]
 8000e22:	4413      	add	r3, r2
 8000e24:	781b      	ldrb	r3, [r3, #0]
 8000e26:	2b40      	cmp	r3, #64	@ 0x40
 8000e28:	d90f      	bls.n	8000e4a <parse_hex4+0x6e>
 8000e2a:	687a      	ldr	r2, [r7, #4]
 8000e2c:	68bb      	ldr	r3, [r7, #8]
 8000e2e:	4413      	add	r3, r2
 8000e30:	781b      	ldrb	r3, [r3, #0]
 8000e32:	2b46      	cmp	r3, #70	@ 0x46
 8000e34:	d809      	bhi.n	8000e4a <parse_hex4+0x6e>
        {
            h += (unsigned int) 10 + input[i] - 'A';
 8000e36:	687a      	ldr	r2, [r7, #4]
 8000e38:	68bb      	ldr	r3, [r7, #8]
 8000e3a:	4413      	add	r3, r2
 8000e3c:	781b      	ldrb	r3, [r3, #0]
 8000e3e:	461a      	mov	r2, r3
 8000e40:	68fb      	ldr	r3, [r7, #12]
 8000e42:	4413      	add	r3, r2
 8000e44:	3b37      	subs	r3, #55	@ 0x37
 8000e46:	60fb      	str	r3, [r7, #12]
 8000e48:	e017      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else if ((input[i] >= 'a') && (input[i] <= 'f'))
 8000e4a:	687a      	ldr	r2, [r7, #4]
 8000e4c:	68bb      	ldr	r3, [r7, #8]
 8000e4e:	4413      	add	r3, r2
 8000e50:	781b      	ldrb	r3, [r3, #0]
 8000e52:	2b60      	cmp	r3, #96	@ 0x60
 8000e54:	d90f      	bls.n	8000e76 <parse_hex4+0x9a>
 8000e56:	687a      	ldr	r2, [r7, #4]
 8000e58:	68bb      	ldr	r3, [r7, #8]
 8000e5a:	4413      	add	r3, r2
 8000e5c:	781b      	ldrb	r3, [r3, #0]
 8000e5e:	2b66      	cmp	r3, #102	@ 0x66
 8000e60:	d809      	bhi.n	8000e76 <parse_hex4+0x9a>
        {
            h += (unsigned int) 10 + input[i] - 'a';
 8000e62:	687a      	ldr	r2, [r7, #4]
 8000e64:	68bb      	ldr	r3, [r7, #8]
 8000e66:	4413      	add	r3, r2
 8000e68:	781b      	ldrb	r3, [r3, #0]
 8000e6a:	461a      	mov	r2, r3
 8000e6c:	68fb      	ldr	r3, [r7, #12]
 8000e6e:	4413      	add	r3, r2
 8000e70:	3b57      	subs	r3, #87	@ 0x57
 8000e72:	60fb      	str	r3, [r7, #12]
 8000e74:	e001      	b.n	8000e7a <parse_hex4+0x9e>
        }
        else /* invalid */
        {
            return 0;
 8000e76:	2300      	movs	r3, #0
 8000e78:	e00c      	b.n	8000e94 <parse_hex4+0xb8>
        }

        if (i < 3)
 8000e7a:	68bb      	ldr	r3, [r7, #8]
 8000e7c:	2b02      	cmp	r3, #2
 8000e7e:	d802      	bhi.n	8000e86 <parse_hex4+0xaa>
        {
            /* shift left to make place for the next nibble */
            h = h << 4;
 8000e80:	68fb      	ldr	r3, [r7, #12]
 8000e82:	011b      	lsls	r3, r3, #4
 8000e84:	60fb      	str	r3, [r7, #12]
    for (i = 0; i < 4; i++)
 8000e86:	68bb      	ldr	r3, [r7, #8]
 8000e88:	3301      	adds	r3, #1
 8000e8a:	60bb      	str	r3, [r7, #8]
 8000e8c:	68bb      	ldr	r3, [r7, #8]
 8000e8e:	2b03      	cmp	r3, #3
 8000e90:	d9af      	bls.n	8000df2 <parse_hex4+0x16>
        }
    }

    return h;
 8000e92:	68fb      	ldr	r3, [r7, #12]
}
 8000e94:	4618      	mov	r0, r3
 8000e96:	3714      	adds	r7, #20
 8000e98:	46bd      	mov	sp, r7
 8000e9a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000e9e:	4770      	bx	lr

08000ea0 <utf16_literal_to_utf8>:

/* converts a UTF-16 literal to UTF-8
 * A literal can be one or two sequences of the form \uXXXX */
static unsigned char utf16_literal_to_utf8(const unsigned char * const input_pointer, const unsigned char * const input_end, unsigned char **output_pointer)
{
 8000ea0:	b580      	push	{r7, lr}
 8000ea2:	b08a      	sub	sp, #40	@ 0x28
 8000ea4:	af00      	add	r7, sp, #0
 8000ea6:	60f8      	str	r0, [r7, #12]
 8000ea8:	60b9      	str	r1, [r7, #8]
 8000eaa:	607a      	str	r2, [r7, #4]
    long unsigned int codepoint = 0;
 8000eac:	2300      	movs	r3, #0
 8000eae:	627b      	str	r3, [r7, #36]	@ 0x24
    unsigned int first_code = 0;
 8000eb0:	2300      	movs	r3, #0
 8000eb2:	61fb      	str	r3, [r7, #28]
    const unsigned char *first_sequence = input_pointer;
 8000eb4:	68fb      	ldr	r3, [r7, #12]
 8000eb6:	61bb      	str	r3, [r7, #24]
    unsigned char utf8_length = 0;
 8000eb8:	2300      	movs	r3, #0
 8000eba:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    unsigned char utf8_position = 0;
 8000ebe:	2300      	movs	r3, #0
 8000ec0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    unsigned char sequence_length = 0;
 8000ec4:	2300      	movs	r3, #0
 8000ec6:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
    unsigned char first_byte_mark = 0;
 8000eca:	2300      	movs	r3, #0
 8000ecc:	f887 3020 	strb.w	r3, [r7, #32]

    if ((input_end - first_sequence) < 6)
 8000ed0:	68ba      	ldr	r2, [r7, #8]
 8000ed2:	69bb      	ldr	r3, [r7, #24]
 8000ed4:	1ad3      	subs	r3, r2, r3
 8000ed6:	2b05      	cmp	r3, #5
 8000ed8:	f340 80b7 	ble.w	800104a <utf16_literal_to_utf8+0x1aa>
        /* input ends unexpectedly */
        goto fail;
    }

    /* get the first utf16 sequence */
    first_code = parse_hex4(first_sequence + 2);
 8000edc:	69bb      	ldr	r3, [r7, #24]
 8000ede:	3302      	adds	r3, #2
 8000ee0:	4618      	mov	r0, r3
 8000ee2:	f7ff ff7b 	bl	8000ddc <parse_hex4>
 8000ee6:	61f8      	str	r0, [r7, #28]

    /* check that the code is valid */
    if (((first_code >= 0xDC00) && (first_code <= 0xDFFF)))
 8000ee8:	69fb      	ldr	r3, [r7, #28]
 8000eea:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000eee:	d304      	bcc.n	8000efa <utf16_literal_to_utf8+0x5a>
 8000ef0:	69fb      	ldr	r3, [r7, #28]
 8000ef2:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000ef6:	f0c0 80aa 	bcc.w	800104e <utf16_literal_to_utf8+0x1ae>
    {
        goto fail;
    }

    /* UTF16 surrogate pair */
    if ((first_code >= 0xD800) && (first_code <= 0xDBFF))
 8000efa:	69fb      	ldr	r3, [r7, #28]
 8000efc:	f5b3 4f58 	cmp.w	r3, #55296	@ 0xd800
 8000f00:	d337      	bcc.n	8000f72 <utf16_literal_to_utf8+0xd2>
 8000f02:	69fb      	ldr	r3, [r7, #28]
 8000f04:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f08:	d233      	bcs.n	8000f72 <utf16_literal_to_utf8+0xd2>
    {
        const unsigned char *second_sequence = first_sequence + 6;
 8000f0a:	69bb      	ldr	r3, [r7, #24]
 8000f0c:	3306      	adds	r3, #6
 8000f0e:	617b      	str	r3, [r7, #20]
        unsigned int second_code = 0;
 8000f10:	2300      	movs	r3, #0
 8000f12:	613b      	str	r3, [r7, #16]
        sequence_length = 12; /* \uXXXX\uXXXX */
 8000f14:	230c      	movs	r3, #12
 8000f16:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21

        if ((input_end - second_sequence) < 6)
 8000f1a:	68ba      	ldr	r2, [r7, #8]
 8000f1c:	697b      	ldr	r3, [r7, #20]
 8000f1e:	1ad3      	subs	r3, r2, r3
 8000f20:	2b05      	cmp	r3, #5
 8000f22:	f340 8096 	ble.w	8001052 <utf16_literal_to_utf8+0x1b2>
        {
            /* input ends unexpectedly */
            goto fail;
        }

        if ((second_sequence[0] != '\\') || (second_sequence[1] != 'u'))
 8000f26:	697b      	ldr	r3, [r7, #20]
 8000f28:	781b      	ldrb	r3, [r3, #0]
 8000f2a:	2b5c      	cmp	r3, #92	@ 0x5c
 8000f2c:	f040 8093 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
 8000f30:	697b      	ldr	r3, [r7, #20]
 8000f32:	3301      	adds	r3, #1
 8000f34:	781b      	ldrb	r3, [r3, #0]
 8000f36:	2b75      	cmp	r3, #117	@ 0x75
 8000f38:	f040 808d 	bne.w	8001056 <utf16_literal_to_utf8+0x1b6>
            /* missing second half of the surrogate pair */
            goto fail;
        }

        /* get the second utf16 sequence */
        second_code = parse_hex4(second_sequence + 2);
 8000f3c:	697b      	ldr	r3, [r7, #20]
 8000f3e:	3302      	adds	r3, #2
 8000f40:	4618      	mov	r0, r3
 8000f42:	f7ff ff4b 	bl	8000ddc <parse_hex4>
 8000f46:	6138      	str	r0, [r7, #16]
        /* check that the code is valid */
        if ((second_code < 0xDC00) || (second_code > 0xDFFF))
 8000f48:	693b      	ldr	r3, [r7, #16]
 8000f4a:	f5b3 4f5c 	cmp.w	r3, #56320	@ 0xdc00
 8000f4e:	f0c0 8084 	bcc.w	800105a <utf16_literal_to_utf8+0x1ba>
 8000f52:	693b      	ldr	r3, [r7, #16]
 8000f54:	f5b3 4f60 	cmp.w	r3, #57344	@ 0xe000
 8000f58:	d27f      	bcs.n	800105a <utf16_literal_to_utf8+0x1ba>
            goto fail;
        }


        /* calculate the unicode codepoint from the surrogate pair */
        codepoint = 0x10000 + (((first_code & 0x3FF) << 10) | (second_code & 0x3FF));
 8000f5a:	69fb      	ldr	r3, [r7, #28]
 8000f5c:	029a      	lsls	r2, r3, #10
 8000f5e:	4b43      	ldr	r3, [pc, #268]	@ (800106c <utf16_literal_to_utf8+0x1cc>)
 8000f60:	4013      	ands	r3, r2
 8000f62:	693a      	ldr	r2, [r7, #16]
 8000f64:	f3c2 0209 	ubfx	r2, r2, #0, #10
 8000f68:	4313      	orrs	r3, r2
 8000f6a:	f503 3380 	add.w	r3, r3, #65536	@ 0x10000
 8000f6e:	627b      	str	r3, [r7, #36]	@ 0x24
    {
 8000f70:	e004      	b.n	8000f7c <utf16_literal_to_utf8+0xdc>
    }
    else
    {
        sequence_length = 6; /* \uXXXX */
 8000f72:	2306      	movs	r3, #6
 8000f74:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
        codepoint = first_code;
 8000f78:	69fb      	ldr	r3, [r7, #28]
 8000f7a:	627b      	str	r3, [r7, #36]	@ 0x24
    }

    /* encode as UTF-8
     * takes at maximum 4 bytes to encode:
     * 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx */
    if (codepoint < 0x80)
 8000f7c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f7e:	2b7f      	cmp	r3, #127	@ 0x7f
 8000f80:	d803      	bhi.n	8000f8a <utf16_literal_to_utf8+0xea>
    {
        /* normal ascii, encoding 0xxxxxxx */
        utf8_length = 1;
 8000f82:	2301      	movs	r3, #1
 8000f84:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
 8000f88:	e01f      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x800)
 8000f8a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000f8c:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 8000f90:	d206      	bcs.n	8000fa0 <utf16_literal_to_utf8+0x100>
    {
        /* two bytes, encoding 110xxxxx 10xxxxxx */
        utf8_length = 2;
 8000f92:	2302      	movs	r3, #2
 8000f94:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xC0; /* 11000000 */
 8000f98:	23c0      	movs	r3, #192	@ 0xc0
 8000f9a:	f887 3020 	strb.w	r3, [r7, #32]
 8000f9e:	e014      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint < 0x10000)
 8000fa0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fa2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8000fa6:	d206      	bcs.n	8000fb6 <utf16_literal_to_utf8+0x116>
    {
        /* three bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx */
        utf8_length = 3;
 8000fa8:	2303      	movs	r3, #3
 8000faa:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xE0; /* 11100000 */
 8000fae:	23e0      	movs	r3, #224	@ 0xe0
 8000fb0:	f887 3020 	strb.w	r3, [r7, #32]
 8000fb4:	e009      	b.n	8000fca <utf16_literal_to_utf8+0x12a>
    }
    else if (codepoint <= 0x10FFFF)
 8000fb6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fb8:	f5b3 1f88 	cmp.w	r3, #1114112	@ 0x110000
 8000fbc:	d24f      	bcs.n	800105e <utf16_literal_to_utf8+0x1be>
    {
        /* four bytes, encoding 1110xxxx 10xxxxxx 10xxxxxx 10xxxxxx */
        utf8_length = 4;
 8000fbe:	2304      	movs	r3, #4
 8000fc0:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        first_byte_mark = 0xF0; /* 11110000 */
 8000fc4:	23f0      	movs	r3, #240	@ 0xf0
 8000fc6:	f887 3020 	strb.w	r3, [r7, #32]
        /* invalid unicode codepoint */
        goto fail;
    }

    /* encode as utf8 */
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000fca:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8000fce:	3b01      	subs	r3, #1
 8000fd0:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8000fd4:	e015      	b.n	8001002 <utf16_literal_to_utf8+0x162>
    {
        /* 10xxxxxx */
        (*output_pointer)[utf8_position] = (unsigned char)((codepoint | 0x80) & 0xBF);
 8000fd6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000fd8:	b2db      	uxtb	r3, r3
 8000fda:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 8000fde:	b2da      	uxtb	r2, r3
 8000fe0:	687b      	ldr	r3, [r7, #4]
 8000fe2:	6819      	ldr	r1, [r3, #0]
 8000fe4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000fe8:	440b      	add	r3, r1
 8000fea:	f062 027f 	orn	r2, r2, #127	@ 0x7f
 8000fee:	b2d2      	uxtb	r2, r2
 8000ff0:	701a      	strb	r2, [r3, #0]
        codepoint >>= 6;
 8000ff2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8000ff4:	099b      	lsrs	r3, r3, #6
 8000ff6:	627b      	str	r3, [r7, #36]	@ 0x24
    for (utf8_position = (unsigned char)(utf8_length - 1); utf8_position > 0; utf8_position--)
 8000ff8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8000ffc:	3b01      	subs	r3, #1
 8000ffe:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 8001002:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8001006:	2b00      	cmp	r3, #0
 8001008:	d1e5      	bne.n	8000fd6 <utf16_literal_to_utf8+0x136>
    }
    /* encode first byte */
    if (utf8_length > 1)
 800100a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800100e:	2b01      	cmp	r3, #1
 8001010:	d909      	bls.n	8001026 <utf16_literal_to_utf8+0x186>
    {
        (*output_pointer)[0] = (unsigned char)((codepoint | first_byte_mark) & 0xFF);
 8001012:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001014:	b2d9      	uxtb	r1, r3
 8001016:	687b      	ldr	r3, [r7, #4]
 8001018:	681b      	ldr	r3, [r3, #0]
 800101a:	f897 2020 	ldrb.w	r2, [r7, #32]
 800101e:	430a      	orrs	r2, r1
 8001020:	b2d2      	uxtb	r2, r2
 8001022:	701a      	strb	r2, [r3, #0]
 8001024:	e007      	b.n	8001036 <utf16_literal_to_utf8+0x196>
    }
    else
    {
        (*output_pointer)[0] = (unsigned char)(codepoint & 0x7F);
 8001026:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001028:	b2da      	uxtb	r2, r3
 800102a:	687b      	ldr	r3, [r7, #4]
 800102c:	681b      	ldr	r3, [r3, #0]
 800102e:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 8001032:	b2d2      	uxtb	r2, r2
 8001034:	701a      	strb	r2, [r3, #0]
    }

    *output_pointer += utf8_length;
 8001036:	687b      	ldr	r3, [r7, #4]
 8001038:	681a      	ldr	r2, [r3, #0]
 800103a:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800103e:	441a      	add	r2, r3
 8001040:	687b      	ldr	r3, [r7, #4]
 8001042:	601a      	str	r2, [r3, #0]

    return sequence_length;
 8001044:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 8001048:	e00b      	b.n	8001062 <utf16_literal_to_utf8+0x1c2>
        goto fail;
 800104a:	bf00      	nop
 800104c:	e008      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800104e:	bf00      	nop
 8001050:	e006      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001052:	bf00      	nop
 8001054:	e004      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 8001056:	bf00      	nop
 8001058:	e002      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
            goto fail;
 800105a:	bf00      	nop
 800105c:	e000      	b.n	8001060 <utf16_literal_to_utf8+0x1c0>
        goto fail;
 800105e:	bf00      	nop

fail:
    return 0;
 8001060:	2300      	movs	r3, #0
}
 8001062:	4618      	mov	r0, r3
 8001064:	3728      	adds	r7, #40	@ 0x28
 8001066:	46bd      	mov	sp, r7
 8001068:	bd80      	pop	{r7, pc}
 800106a:	bf00      	nop
 800106c:	000ffc00 	.word	0x000ffc00

08001070 <parse_string>:

/* Parse the input text into an unescaped cinput, and populate item. */
static cJSON_bool parse_string(cJSON * const item, parse_buffer * const input_buffer)
{
 8001070:	b580      	push	{r7, lr}
 8001072:	b08a      	sub	sp, #40	@ 0x28
 8001074:	af00      	add	r7, sp, #0
 8001076:	6078      	str	r0, [r7, #4]
 8001078:	6039      	str	r1, [r7, #0]
    const unsigned char *input_pointer = buffer_at_offset(input_buffer) + 1;
 800107a:	683b      	ldr	r3, [r7, #0]
 800107c:	681a      	ldr	r2, [r3, #0]
 800107e:	683b      	ldr	r3, [r7, #0]
 8001080:	689b      	ldr	r3, [r3, #8]
 8001082:	3301      	adds	r3, #1
 8001084:	4413      	add	r3, r2
 8001086:	627b      	str	r3, [r7, #36]	@ 0x24
    const unsigned char *input_end = buffer_at_offset(input_buffer) + 1;
 8001088:	683b      	ldr	r3, [r7, #0]
 800108a:	681a      	ldr	r2, [r3, #0]
 800108c:	683b      	ldr	r3, [r7, #0]
 800108e:	689b      	ldr	r3, [r3, #8]
 8001090:	3301      	adds	r3, #1
 8001092:	4413      	add	r3, r2
 8001094:	623b      	str	r3, [r7, #32]
    unsigned char *output_pointer = NULL;
 8001096:	2300      	movs	r3, #0
 8001098:	60fb      	str	r3, [r7, #12]
    unsigned char *output = NULL;
 800109a:	2300      	movs	r3, #0
 800109c:	61fb      	str	r3, [r7, #28]

    /* not a string */
    if (buffer_at_offset(input_buffer)[0] != '\"')
 800109e:	683b      	ldr	r3, [r7, #0]
 80010a0:	681a      	ldr	r2, [r3, #0]
 80010a2:	683b      	ldr	r3, [r7, #0]
 80010a4:	689b      	ldr	r3, [r3, #8]
 80010a6:	4413      	add	r3, r2
 80010a8:	781b      	ldrb	r3, [r3, #0]
 80010aa:	2b22      	cmp	r3, #34	@ 0x22
 80010ac:	f040 8103 	bne.w	80012b6 <parse_string+0x246>
        goto fail;
    }

    {
        /* calculate approximate size of the output (overestimate) */
        size_t allocation_length = 0;
 80010b0:	2300      	movs	r3, #0
 80010b2:	613b      	str	r3, [r7, #16]
        size_t skipped_bytes = 0;
 80010b4:	2300      	movs	r3, #0
 80010b6:	61bb      	str	r3, [r7, #24]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010b8:	e017      	b.n	80010ea <parse_string+0x7a>
        {
            /* is escape sequence */
            if (input_end[0] == '\\')
 80010ba:	6a3b      	ldr	r3, [r7, #32]
 80010bc:	781b      	ldrb	r3, [r3, #0]
 80010be:	2b5c      	cmp	r3, #92	@ 0x5c
 80010c0:	d110      	bne.n	80010e4 <parse_string+0x74>
            {
                if ((size_t)(input_end + 1 - input_buffer->content) >= input_buffer->length)
 80010c2:	6a3b      	ldr	r3, [r7, #32]
 80010c4:	1c5a      	adds	r2, r3, #1
 80010c6:	683b      	ldr	r3, [r7, #0]
 80010c8:	681b      	ldr	r3, [r3, #0]
 80010ca:	1ad3      	subs	r3, r2, r3
 80010cc:	461a      	mov	r2, r3
 80010ce:	683b      	ldr	r3, [r7, #0]
 80010d0:	685b      	ldr	r3, [r3, #4]
 80010d2:	429a      	cmp	r2, r3
 80010d4:	f080 80f1 	bcs.w	80012ba <parse_string+0x24a>
                {
                    /* prevent buffer overflow when last input character is a backslash */
                    goto fail;
                }
                skipped_bytes++;
 80010d8:	69bb      	ldr	r3, [r7, #24]
 80010da:	3301      	adds	r3, #1
 80010dc:	61bb      	str	r3, [r7, #24]
                input_end++;
 80010de:	6a3b      	ldr	r3, [r7, #32]
 80010e0:	3301      	adds	r3, #1
 80010e2:	623b      	str	r3, [r7, #32]
            }
            input_end++;
 80010e4:	6a3b      	ldr	r3, [r7, #32]
 80010e6:	3301      	adds	r3, #1
 80010e8:	623b      	str	r3, [r7, #32]
        while (((size_t)(input_end - input_buffer->content) < input_buffer->length) && (*input_end != '\"'))
 80010ea:	683b      	ldr	r3, [r7, #0]
 80010ec:	681b      	ldr	r3, [r3, #0]
 80010ee:	6a3a      	ldr	r2, [r7, #32]
 80010f0:	1ad3      	subs	r3, r2, r3
 80010f2:	461a      	mov	r2, r3
 80010f4:	683b      	ldr	r3, [r7, #0]
 80010f6:	685b      	ldr	r3, [r3, #4]
 80010f8:	429a      	cmp	r2, r3
 80010fa:	d203      	bcs.n	8001104 <parse_string+0x94>
 80010fc:	6a3b      	ldr	r3, [r7, #32]
 80010fe:	781b      	ldrb	r3, [r3, #0]
 8001100:	2b22      	cmp	r3, #34	@ 0x22
 8001102:	d1da      	bne.n	80010ba <parse_string+0x4a>
        }
        if (((size_t)(input_end - input_buffer->content) >= input_buffer->length) || (*input_end != '\"'))
 8001104:	683b      	ldr	r3, [r7, #0]
 8001106:	681b      	ldr	r3, [r3, #0]
 8001108:	6a3a      	ldr	r2, [r7, #32]
 800110a:	1ad3      	subs	r3, r2, r3
 800110c:	461a      	mov	r2, r3
 800110e:	683b      	ldr	r3, [r7, #0]
 8001110:	685b      	ldr	r3, [r3, #4]
 8001112:	429a      	cmp	r2, r3
 8001114:	f080 80d3 	bcs.w	80012be <parse_string+0x24e>
 8001118:	6a3b      	ldr	r3, [r7, #32]
 800111a:	781b      	ldrb	r3, [r3, #0]
 800111c:	2b22      	cmp	r3, #34	@ 0x22
 800111e:	f040 80ce 	bne.w	80012be <parse_string+0x24e>
        {
            goto fail; /* string ended unexpectedly */
        }

        /* This is at most how much we need for the output */
        allocation_length = (size_t) (input_end - buffer_at_offset(input_buffer)) - skipped_bytes;
 8001122:	683b      	ldr	r3, [r7, #0]
 8001124:	681a      	ldr	r2, [r3, #0]
 8001126:	683b      	ldr	r3, [r7, #0]
 8001128:	689b      	ldr	r3, [r3, #8]
 800112a:	4413      	add	r3, r2
 800112c:	6a3a      	ldr	r2, [r7, #32]
 800112e:	1ad3      	subs	r3, r2, r3
 8001130:	461a      	mov	r2, r3
 8001132:	69bb      	ldr	r3, [r7, #24]
 8001134:	1ad3      	subs	r3, r2, r3
 8001136:	613b      	str	r3, [r7, #16]
        output = (unsigned char*)input_buffer->hooks.allocate(allocation_length + sizeof(""));
 8001138:	683b      	ldr	r3, [r7, #0]
 800113a:	691b      	ldr	r3, [r3, #16]
 800113c:	693a      	ldr	r2, [r7, #16]
 800113e:	3201      	adds	r2, #1
 8001140:	4610      	mov	r0, r2
 8001142:	4798      	blx	r3
 8001144:	61f8      	str	r0, [r7, #28]
        if (output == NULL)
 8001146:	69fb      	ldr	r3, [r7, #28]
 8001148:	2b00      	cmp	r3, #0
 800114a:	f000 80ba 	beq.w	80012c2 <parse_string+0x252>
        {
            goto fail; /* allocation failure */
        }
    }

    output_pointer = output;
 800114e:	69fb      	ldr	r3, [r7, #28]
 8001150:	60fb      	str	r3, [r7, #12]
    /* loop through the string literal */
    while (input_pointer < input_end)
 8001152:	e094      	b.n	800127e <parse_string+0x20e>
    {
        if (*input_pointer != '\\')
 8001154:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001156:	781b      	ldrb	r3, [r3, #0]
 8001158:	2b5c      	cmp	r3, #92	@ 0x5c
 800115a:	d008      	beq.n	800116e <parse_string+0xfe>
        {
            *output_pointer++ = *input_pointer++;
 800115c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800115e:	1c53      	adds	r3, r2, #1
 8001160:	627b      	str	r3, [r7, #36]	@ 0x24
 8001162:	68fb      	ldr	r3, [r7, #12]
 8001164:	1c59      	adds	r1, r3, #1
 8001166:	60f9      	str	r1, [r7, #12]
 8001168:	7812      	ldrb	r2, [r2, #0]
 800116a:	701a      	strb	r2, [r3, #0]
 800116c:	e087      	b.n	800127e <parse_string+0x20e>
        }
        /* escape sequence */
        else
        {
            unsigned char sequence_length = 2;
 800116e:	2302      	movs	r3, #2
 8001170:	75fb      	strb	r3, [r7, #23]
            if ((input_end - input_pointer) < 1)
 8001172:	6a3a      	ldr	r2, [r7, #32]
 8001174:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001176:	1ad3      	subs	r3, r2, r3
 8001178:	2b00      	cmp	r3, #0
 800117a:	f340 80a4 	ble.w	80012c6 <parse_string+0x256>
            {
                goto fail;
            }

            switch (input_pointer[1])
 800117e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8001180:	3301      	adds	r3, #1
 8001182:	781b      	ldrb	r3, [r3, #0]
 8001184:	2b75      	cmp	r3, #117	@ 0x75
 8001186:	f300 80a0 	bgt.w	80012ca <parse_string+0x25a>
 800118a:	2b5c      	cmp	r3, #92	@ 0x5c
 800118c:	da04      	bge.n	8001198 <parse_string+0x128>
 800118e:	2b22      	cmp	r3, #34	@ 0x22
 8001190:	d05c      	beq.n	800124c <parse_string+0x1dc>
 8001192:	2b2f      	cmp	r3, #47	@ 0x2f
 8001194:	d05a      	beq.n	800124c <parse_string+0x1dc>
                        goto fail;
                    }
                    break;

                default:
                    goto fail;
 8001196:	e098      	b.n	80012ca <parse_string+0x25a>
            switch (input_pointer[1])
 8001198:	3b5c      	subs	r3, #92	@ 0x5c
 800119a:	2b19      	cmp	r3, #25
 800119c:	f200 8095 	bhi.w	80012ca <parse_string+0x25a>
 80011a0:	a201      	add	r2, pc, #4	@ (adr r2, 80011a8 <parse_string+0x138>)
 80011a2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80011a6:	bf00      	nop
 80011a8:	0800124d 	.word	0x0800124d
 80011ac:	080012cb 	.word	0x080012cb
 80011b0:	080012cb 	.word	0x080012cb
 80011b4:	080012cb 	.word	0x080012cb
 80011b8:	080012cb 	.word	0x080012cb
 80011bc:	080012cb 	.word	0x080012cb
 80011c0:	08001211 	.word	0x08001211
 80011c4:	080012cb 	.word	0x080012cb
 80011c8:	080012cb 	.word	0x080012cb
 80011cc:	080012cb 	.word	0x080012cb
 80011d0:	0800121d 	.word	0x0800121d
 80011d4:	080012cb 	.word	0x080012cb
 80011d8:	080012cb 	.word	0x080012cb
 80011dc:	080012cb 	.word	0x080012cb
 80011e0:	080012cb 	.word	0x080012cb
 80011e4:	080012cb 	.word	0x080012cb
 80011e8:	080012cb 	.word	0x080012cb
 80011ec:	080012cb 	.word	0x080012cb
 80011f0:	08001229 	.word	0x08001229
 80011f4:	080012cb 	.word	0x080012cb
 80011f8:	080012cb 	.word	0x080012cb
 80011fc:	080012cb 	.word	0x080012cb
 8001200:	08001235 	.word	0x08001235
 8001204:	080012cb 	.word	0x080012cb
 8001208:	08001241 	.word	0x08001241
 800120c:	0800125d 	.word	0x0800125d
                    *output_pointer++ = '\b';
 8001210:	68fb      	ldr	r3, [r7, #12]
 8001212:	1c5a      	adds	r2, r3, #1
 8001214:	60fa      	str	r2, [r7, #12]
 8001216:	2208      	movs	r2, #8
 8001218:	701a      	strb	r2, [r3, #0]
                    break;
 800121a:	e02c      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\f';
 800121c:	68fb      	ldr	r3, [r7, #12]
 800121e:	1c5a      	adds	r2, r3, #1
 8001220:	60fa      	str	r2, [r7, #12]
 8001222:	220c      	movs	r2, #12
 8001224:	701a      	strb	r2, [r3, #0]
                    break;
 8001226:	e026      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\n';
 8001228:	68fb      	ldr	r3, [r7, #12]
 800122a:	1c5a      	adds	r2, r3, #1
 800122c:	60fa      	str	r2, [r7, #12]
 800122e:	220a      	movs	r2, #10
 8001230:	701a      	strb	r2, [r3, #0]
                    break;
 8001232:	e020      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\r';
 8001234:	68fb      	ldr	r3, [r7, #12]
 8001236:	1c5a      	adds	r2, r3, #1
 8001238:	60fa      	str	r2, [r7, #12]
 800123a:	220d      	movs	r2, #13
 800123c:	701a      	strb	r2, [r3, #0]
                    break;
 800123e:	e01a      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = '\t';
 8001240:	68fb      	ldr	r3, [r7, #12]
 8001242:	1c5a      	adds	r2, r3, #1
 8001244:	60fa      	str	r2, [r7, #12]
 8001246:	2209      	movs	r2, #9
 8001248:	701a      	strb	r2, [r3, #0]
                    break;
 800124a:	e014      	b.n	8001276 <parse_string+0x206>
                    *output_pointer++ = input_pointer[1];
 800124c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800124e:	1c5a      	adds	r2, r3, #1
 8001250:	68fb      	ldr	r3, [r7, #12]
 8001252:	1c59      	adds	r1, r3, #1
 8001254:	60f9      	str	r1, [r7, #12]
 8001256:	7812      	ldrb	r2, [r2, #0]
 8001258:	701a      	strb	r2, [r3, #0]
                    break;
 800125a:	e00c      	b.n	8001276 <parse_string+0x206>
                    sequence_length = utf16_literal_to_utf8(input_pointer, input_end, &output_pointer);
 800125c:	f107 030c 	add.w	r3, r7, #12
 8001260:	461a      	mov	r2, r3
 8001262:	6a39      	ldr	r1, [r7, #32]
 8001264:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8001266:	f7ff fe1b 	bl	8000ea0 <utf16_literal_to_utf8>
 800126a:	4603      	mov	r3, r0
 800126c:	75fb      	strb	r3, [r7, #23]
                    if (sequence_length == 0)
 800126e:	7dfb      	ldrb	r3, [r7, #23]
 8001270:	2b00      	cmp	r3, #0
 8001272:	d02c      	beq.n	80012ce <parse_string+0x25e>
                    break;
 8001274:	bf00      	nop
            }
            input_pointer += sequence_length;
 8001276:	7dfb      	ldrb	r3, [r7, #23]
 8001278:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 800127a:	4413      	add	r3, r2
 800127c:	627b      	str	r3, [r7, #36]	@ 0x24
    while (input_pointer < input_end)
 800127e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8001280:	6a3b      	ldr	r3, [r7, #32]
 8001282:	429a      	cmp	r2, r3
 8001284:	f4ff af66 	bcc.w	8001154 <parse_string+0xe4>
        }
    }

    /* zero terminate the output */
    *output_pointer = '\0';
 8001288:	68fb      	ldr	r3, [r7, #12]
 800128a:	2200      	movs	r2, #0
 800128c:	701a      	strb	r2, [r3, #0]

    item->type = cJSON_String;
 800128e:	687b      	ldr	r3, [r7, #4]
 8001290:	2210      	movs	r2, #16
 8001292:	60da      	str	r2, [r3, #12]
    item->valuestring = (char*)output;
 8001294:	687b      	ldr	r3, [r7, #4]
 8001296:	69fa      	ldr	r2, [r7, #28]
 8001298:	611a      	str	r2, [r3, #16]

    input_buffer->offset = (size_t) (input_end - input_buffer->content);
 800129a:	683b      	ldr	r3, [r7, #0]
 800129c:	681b      	ldr	r3, [r3, #0]
 800129e:	6a3a      	ldr	r2, [r7, #32]
 80012a0:	1ad3      	subs	r3, r2, r3
 80012a2:	461a      	mov	r2, r3
 80012a4:	683b      	ldr	r3, [r7, #0]
 80012a6:	609a      	str	r2, [r3, #8]
    input_buffer->offset++;
 80012a8:	683b      	ldr	r3, [r7, #0]
 80012aa:	689b      	ldr	r3, [r3, #8]
 80012ac:	1c5a      	adds	r2, r3, #1
 80012ae:	683b      	ldr	r3, [r7, #0]
 80012b0:	609a      	str	r2, [r3, #8]

    return true;
 80012b2:	2301      	movs	r3, #1
 80012b4:	e020      	b.n	80012f8 <parse_string+0x288>
        goto fail;
 80012b6:	bf00      	nop
 80012b8:	e00a      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ba:	bf00      	nop
 80012bc:	e008      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* string ended unexpectedly */
 80012be:	bf00      	nop
 80012c0:	e006      	b.n	80012d0 <parse_string+0x260>
            goto fail; /* allocation failure */
 80012c2:	bf00      	nop
 80012c4:	e004      	b.n	80012d0 <parse_string+0x260>
                goto fail;
 80012c6:	bf00      	nop
 80012c8:	e002      	b.n	80012d0 <parse_string+0x260>
                    goto fail;
 80012ca:	bf00      	nop
 80012cc:	e000      	b.n	80012d0 <parse_string+0x260>
                        goto fail;
 80012ce:	bf00      	nop

fail:
    if (output != NULL)
 80012d0:	69fb      	ldr	r3, [r7, #28]
 80012d2:	2b00      	cmp	r3, #0
 80012d4:	d005      	beq.n	80012e2 <parse_string+0x272>
    {
        input_buffer->hooks.deallocate(output);
 80012d6:	683b      	ldr	r3, [r7, #0]
 80012d8:	695b      	ldr	r3, [r3, #20]
 80012da:	69f8      	ldr	r0, [r7, #28]
 80012dc:	4798      	blx	r3
        output = NULL;
 80012de:	2300      	movs	r3, #0
 80012e0:	61fb      	str	r3, [r7, #28]
    }

    if (input_pointer != NULL)
 80012e2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80012e4:	2b00      	cmp	r3, #0
 80012e6:	d006      	beq.n	80012f6 <parse_string+0x286>
    {
        input_buffer->offset = (size_t)(input_pointer - input_buffer->content);
 80012e8:	683b      	ldr	r3, [r7, #0]
 80012ea:	681b      	ldr	r3, [r3, #0]
 80012ec:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80012ee:	1ad3      	subs	r3, r2, r3
 80012f0:	461a      	mov	r2, r3
 80012f2:	683b      	ldr	r3, [r7, #0]
 80012f4:	609a      	str	r2, [r3, #8]
    }

    return false;
 80012f6:	2300      	movs	r3, #0
}
 80012f8:	4618      	mov	r0, r3
 80012fa:	3728      	adds	r7, #40	@ 0x28
 80012fc:	46bd      	mov	sp, r7
 80012fe:	bd80      	pop	{r7, pc}

08001300 <buffer_skip_whitespace>:
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer);
static cJSON_bool print_object(const cJSON * const item, printbuffer * const output_buffer);

/* Utility to jump whitespace and cr/lf */
static parse_buffer *buffer_skip_whitespace(parse_buffer * const buffer)
{
 8001300:	b480      	push	{r7}
 8001302:	b083      	sub	sp, #12
 8001304:	af00      	add	r7, sp, #0
 8001306:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL))
 8001308:	687b      	ldr	r3, [r7, #4]
 800130a:	2b00      	cmp	r3, #0
 800130c:	d003      	beq.n	8001316 <buffer_skip_whitespace+0x16>
 800130e:	687b      	ldr	r3, [r7, #4]
 8001310:	681b      	ldr	r3, [r3, #0]
 8001312:	2b00      	cmp	r3, #0
 8001314:	d101      	bne.n	800131a <buffer_skip_whitespace+0x1a>
    {
        return NULL;
 8001316:	2300      	movs	r3, #0
 8001318:	e02c      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    if (cannot_access_at_index(buffer, 0))
 800131a:	687b      	ldr	r3, [r7, #4]
 800131c:	2b00      	cmp	r3, #0
 800131e:	d005      	beq.n	800132c <buffer_skip_whitespace+0x2c>
 8001320:	687b      	ldr	r3, [r7, #4]
 8001322:	689a      	ldr	r2, [r3, #8]
 8001324:	687b      	ldr	r3, [r7, #4]
 8001326:	685b      	ldr	r3, [r3, #4]
 8001328:	429a      	cmp	r2, r3
 800132a:	d306      	bcc.n	800133a <buffer_skip_whitespace+0x3a>
    {
        return buffer;
 800132c:	687b      	ldr	r3, [r7, #4]
 800132e:	e021      	b.n	8001374 <buffer_skip_whitespace+0x74>
    }

    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
    {
       buffer->offset++;
 8001330:	687b      	ldr	r3, [r7, #4]
 8001332:	689b      	ldr	r3, [r3, #8]
 8001334:	1c5a      	adds	r2, r3, #1
 8001336:	687b      	ldr	r3, [r7, #4]
 8001338:	609a      	str	r2, [r3, #8]
    while (can_access_at_index(buffer, 0) && (buffer_at_offset(buffer)[0] <= 32))
 800133a:	687b      	ldr	r3, [r7, #4]
 800133c:	2b00      	cmp	r3, #0
 800133e:	d00d      	beq.n	800135c <buffer_skip_whitespace+0x5c>
 8001340:	687b      	ldr	r3, [r7, #4]
 8001342:	689a      	ldr	r2, [r3, #8]
 8001344:	687b      	ldr	r3, [r7, #4]
 8001346:	685b      	ldr	r3, [r3, #4]
 8001348:	429a      	cmp	r2, r3
 800134a:	d207      	bcs.n	800135c <buffer_skip_whitespace+0x5c>
 800134c:	687b      	ldr	r3, [r7, #4]
 800134e:	681a      	ldr	r2, [r3, #0]
 8001350:	687b      	ldr	r3, [r7, #4]
 8001352:	689b      	ldr	r3, [r3, #8]
 8001354:	4413      	add	r3, r2
 8001356:	781b      	ldrb	r3, [r3, #0]
 8001358:	2b20      	cmp	r3, #32
 800135a:	d9e9      	bls.n	8001330 <buffer_skip_whitespace+0x30>
    }

    if (buffer->offset == buffer->length)
 800135c:	687b      	ldr	r3, [r7, #4]
 800135e:	689a      	ldr	r2, [r3, #8]
 8001360:	687b      	ldr	r3, [r7, #4]
 8001362:	685b      	ldr	r3, [r3, #4]
 8001364:	429a      	cmp	r2, r3
 8001366:	d104      	bne.n	8001372 <buffer_skip_whitespace+0x72>
    {
        buffer->offset--;
 8001368:	687b      	ldr	r3, [r7, #4]
 800136a:	689b      	ldr	r3, [r3, #8]
 800136c:	1e5a      	subs	r2, r3, #1
 800136e:	687b      	ldr	r3, [r7, #4]
 8001370:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 8001372:	687b      	ldr	r3, [r7, #4]
}
 8001374:	4618      	mov	r0, r3
 8001376:	370c      	adds	r7, #12
 8001378:	46bd      	mov	sp, r7
 800137a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800137e:	4770      	bx	lr

08001380 <skip_utf8_bom>:

/* skip the UTF-8 BOM (byte order mark) if it is at the beginning of a buffer */
static parse_buffer *skip_utf8_bom(parse_buffer * const buffer)
{
 8001380:	b580      	push	{r7, lr}
 8001382:	b082      	sub	sp, #8
 8001384:	af00      	add	r7, sp, #0
 8001386:	6078      	str	r0, [r7, #4]
    if ((buffer == NULL) || (buffer->content == NULL) || (buffer->offset != 0))
 8001388:	687b      	ldr	r3, [r7, #4]
 800138a:	2b00      	cmp	r3, #0
 800138c:	d007      	beq.n	800139e <skip_utf8_bom+0x1e>
 800138e:	687b      	ldr	r3, [r7, #4]
 8001390:	681b      	ldr	r3, [r3, #0]
 8001392:	2b00      	cmp	r3, #0
 8001394:	d003      	beq.n	800139e <skip_utf8_bom+0x1e>
 8001396:	687b      	ldr	r3, [r7, #4]
 8001398:	689b      	ldr	r3, [r3, #8]
 800139a:	2b00      	cmp	r3, #0
 800139c:	d001      	beq.n	80013a2 <skip_utf8_bom+0x22>
    {
        return NULL;
 800139e:	2300      	movs	r3, #0
 80013a0:	e01c      	b.n	80013dc <skip_utf8_bom+0x5c>
    }

    if (can_access_at_index(buffer, 4) && (strncmp((const char*)buffer_at_offset(buffer), "\xEF\xBB\xBF", 3) == 0))
 80013a2:	687b      	ldr	r3, [r7, #4]
 80013a4:	2b00      	cmp	r3, #0
 80013a6:	d018      	beq.n	80013da <skip_utf8_bom+0x5a>
 80013a8:	687b      	ldr	r3, [r7, #4]
 80013aa:	689b      	ldr	r3, [r3, #8]
 80013ac:	1d1a      	adds	r2, r3, #4
 80013ae:	687b      	ldr	r3, [r7, #4]
 80013b0:	685b      	ldr	r3, [r3, #4]
 80013b2:	429a      	cmp	r2, r3
 80013b4:	d211      	bcs.n	80013da <skip_utf8_bom+0x5a>
 80013b6:	687b      	ldr	r3, [r7, #4]
 80013b8:	681a      	ldr	r2, [r3, #0]
 80013ba:	687b      	ldr	r3, [r7, #4]
 80013bc:	689b      	ldr	r3, [r3, #8]
 80013be:	4413      	add	r3, r2
 80013c0:	2203      	movs	r2, #3
 80013c2:	4908      	ldr	r1, [pc, #32]	@ (80013e4 <skip_utf8_bom+0x64>)
 80013c4:	4618      	mov	r0, r3
 80013c6:	f029 fce3 	bl	802ad90 <strncmp>
 80013ca:	4603      	mov	r3, r0
 80013cc:	2b00      	cmp	r3, #0
 80013ce:	d104      	bne.n	80013da <skip_utf8_bom+0x5a>
    {
        buffer->offset += 3;
 80013d0:	687b      	ldr	r3, [r7, #4]
 80013d2:	689b      	ldr	r3, [r3, #8]
 80013d4:	1cda      	adds	r2, r3, #3
 80013d6:	687b      	ldr	r3, [r7, #4]
 80013d8:	609a      	str	r2, [r3, #8]
    }

    return buffer;
 80013da:	687b      	ldr	r3, [r7, #4]
}
 80013dc:	4618      	mov	r0, r3
 80013de:	3708      	adds	r7, #8
 80013e0:	46bd      	mov	sp, r7
 80013e2:	bd80      	pop	{r7, pc}
 80013e4:	0802d518 	.word	0x0802d518

080013e8 <cJSON_ParseWithOpts>:

CJSON_PUBLIC(cJSON *) cJSON_ParseWithOpts(const char *value, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 80013e8:	b580      	push	{r7, lr}
 80013ea:	b086      	sub	sp, #24
 80013ec:	af00      	add	r7, sp, #0
 80013ee:	60f8      	str	r0, [r7, #12]
 80013f0:	60b9      	str	r1, [r7, #8]
 80013f2:	607a      	str	r2, [r7, #4]
    size_t buffer_length;

    if (NULL == value)
 80013f4:	68fb      	ldr	r3, [r7, #12]
 80013f6:	2b00      	cmp	r3, #0
 80013f8:	d101      	bne.n	80013fe <cJSON_ParseWithOpts+0x16>
    {
        return NULL;
 80013fa:	2300      	movs	r3, #0
 80013fc:	e00c      	b.n	8001418 <cJSON_ParseWithOpts+0x30>
    }

    /* Adding null character size due to require_null_terminated. */
    buffer_length = strlen(value) + sizeof("");
 80013fe:	68f8      	ldr	r0, [r7, #12]
 8001400:	f7fe ffce 	bl	80003a0 <strlen>
 8001404:	4603      	mov	r3, r0
 8001406:	3301      	adds	r3, #1
 8001408:	617b      	str	r3, [r7, #20]

    return cJSON_ParseWithLengthOpts(value, buffer_length, return_parse_end, require_null_terminated);
 800140a:	687b      	ldr	r3, [r7, #4]
 800140c:	68ba      	ldr	r2, [r7, #8]
 800140e:	6979      	ldr	r1, [r7, #20]
 8001410:	68f8      	ldr	r0, [r7, #12]
 8001412:	f000 f805 	bl	8001420 <cJSON_ParseWithLengthOpts>
 8001416:	4603      	mov	r3, r0
}
 8001418:	4618      	mov	r0, r3
 800141a:	3718      	adds	r7, #24
 800141c:	46bd      	mov	sp, r7
 800141e:	bd80      	pop	{r7, pc}

08001420 <cJSON_ParseWithLengthOpts>:

/* Parse an object - create a new root, and populate. */
CJSON_PUBLIC(cJSON *) cJSON_ParseWithLengthOpts(const char *value, size_t buffer_length, const char **return_parse_end, cJSON_bool require_null_terminated)
{
 8001420:	b580      	push	{r7, lr}
 8001422:	b08e      	sub	sp, #56	@ 0x38
 8001424:	af00      	add	r7, sp, #0
 8001426:	60f8      	str	r0, [r7, #12]
 8001428:	60b9      	str	r1, [r7, #8]
 800142a:	607a      	str	r2, [r7, #4]
 800142c:	603b      	str	r3, [r7, #0]
    parse_buffer buffer = { 0, 0, 0, 0, { 0, 0, 0 } };
 800142e:	f107 0318 	add.w	r3, r7, #24
 8001432:	2200      	movs	r2, #0
 8001434:	601a      	str	r2, [r3, #0]
 8001436:	605a      	str	r2, [r3, #4]
 8001438:	609a      	str	r2, [r3, #8]
 800143a:	60da      	str	r2, [r3, #12]
 800143c:	611a      	str	r2, [r3, #16]
 800143e:	615a      	str	r2, [r3, #20]
 8001440:	619a      	str	r2, [r3, #24]
    cJSON *item = NULL;
 8001442:	2300      	movs	r3, #0
 8001444:	637b      	str	r3, [r7, #52]	@ 0x34

    /* reset error position */
    global_error.json = NULL;
 8001446:	4b41      	ldr	r3, [pc, #260]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001448:	2200      	movs	r2, #0
 800144a:	601a      	str	r2, [r3, #0]
    global_error.position = 0;
 800144c:	4b3f      	ldr	r3, [pc, #252]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 800144e:	2200      	movs	r2, #0
 8001450:	605a      	str	r2, [r3, #4]

    if (value == NULL || 0 == buffer_length)
 8001452:	68fb      	ldr	r3, [r7, #12]
 8001454:	2b00      	cmp	r3, #0
 8001456:	d042      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
 8001458:	68bb      	ldr	r3, [r7, #8]
 800145a:	2b00      	cmp	r3, #0
 800145c:	d03f      	beq.n	80014de <cJSON_ParseWithLengthOpts+0xbe>
    {
        goto fail;
    }

    buffer.content = (const unsigned char*)value;
 800145e:	68fb      	ldr	r3, [r7, #12]
 8001460:	61bb      	str	r3, [r7, #24]
    buffer.length = buffer_length;
 8001462:	68bb      	ldr	r3, [r7, #8]
 8001464:	61fb      	str	r3, [r7, #28]
    buffer.offset = 0;
 8001466:	2300      	movs	r3, #0
 8001468:	623b      	str	r3, [r7, #32]
    buffer.hooks = global_hooks;
 800146a:	4a39      	ldr	r2, [pc, #228]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 800146c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8001470:	ca07      	ldmia	r2, {r0, r1, r2}
 8001472:	e883 0007 	stmia.w	r3, {r0, r1, r2}

    item = cJSON_New_Item(&global_hooks);
 8001476:	4836      	ldr	r0, [pc, #216]	@ (8001550 <cJSON_ParseWithLengthOpts+0x130>)
 8001478:	f7ff fb72 	bl	8000b60 <cJSON_New_Item>
 800147c:	6378      	str	r0, [r7, #52]	@ 0x34
    if (item == NULL) /* memory fail */
 800147e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8001480:	2b00      	cmp	r3, #0
 8001482:	d02e      	beq.n	80014e2 <cJSON_ParseWithLengthOpts+0xc2>
    {
        goto fail;
    }

    if (!parse_value(item, buffer_skip_whitespace(skip_utf8_bom(&buffer))))
 8001484:	f107 0318 	add.w	r3, r7, #24
 8001488:	4618      	mov	r0, r3
 800148a:	f7ff ff79 	bl	8001380 <skip_utf8_bom>
 800148e:	4603      	mov	r3, r0
 8001490:	4618      	mov	r0, r3
 8001492:	f7ff ff35 	bl	8001300 <buffer_skip_whitespace>
 8001496:	4603      	mov	r3, r0
 8001498:	4619      	mov	r1, r3
 800149a:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 800149c:	f000 f868 	bl	8001570 <parse_value>
 80014a0:	4603      	mov	r3, r0
 80014a2:	2b00      	cmp	r3, #0
 80014a4:	d01f      	beq.n	80014e6 <cJSON_ParseWithLengthOpts+0xc6>
        /* parse failure. ep is set. */
        goto fail;
    }

    /* if we require null-terminated JSON without appended garbage, skip and then check for a null terminator */
    if (require_null_terminated)
 80014a6:	683b      	ldr	r3, [r7, #0]
 80014a8:	2b00      	cmp	r3, #0
 80014aa:	d00e      	beq.n	80014ca <cJSON_ParseWithLengthOpts+0xaa>
    {
        buffer_skip_whitespace(&buffer);
 80014ac:	f107 0318 	add.w	r3, r7, #24
 80014b0:	4618      	mov	r0, r3
 80014b2:	f7ff ff25 	bl	8001300 <buffer_skip_whitespace>
        if ((buffer.offset >= buffer.length) || buffer_at_offset(&buffer)[0] != '\0')
 80014b6:	6a3a      	ldr	r2, [r7, #32]
 80014b8:	69fb      	ldr	r3, [r7, #28]
 80014ba:	429a      	cmp	r2, r3
 80014bc:	d215      	bcs.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
 80014be:	69ba      	ldr	r2, [r7, #24]
 80014c0:	6a3b      	ldr	r3, [r7, #32]
 80014c2:	4413      	add	r3, r2
 80014c4:	781b      	ldrb	r3, [r3, #0]
 80014c6:	2b00      	cmp	r3, #0
 80014c8:	d10f      	bne.n	80014ea <cJSON_ParseWithLengthOpts+0xca>
        {
            goto fail;
        }
    }
    if (return_parse_end)
 80014ca:	687b      	ldr	r3, [r7, #4]
 80014cc:	2b00      	cmp	r3, #0
 80014ce:	d004      	beq.n	80014da <cJSON_ParseWithLengthOpts+0xba>
    {
        *return_parse_end = (const char*)buffer_at_offset(&buffer);
 80014d0:	69ba      	ldr	r2, [r7, #24]
 80014d2:	6a3b      	ldr	r3, [r7, #32]
 80014d4:	441a      	add	r2, r3
 80014d6:	687b      	ldr	r3, [r7, #4]
 80014d8:	601a      	str	r2, [r3, #0]
    }

    return item;
 80014da:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014dc:	e031      	b.n	8001542 <cJSON_ParseWithLengthOpts+0x122>
        goto fail;
 80014de:	bf00      	nop
 80014e0:	e004      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e2:	bf00      	nop
 80014e4:	e002      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
        goto fail;
 80014e6:	bf00      	nop
 80014e8:	e000      	b.n	80014ec <cJSON_ParseWithLengthOpts+0xcc>
            goto fail;
 80014ea:	bf00      	nop

fail:
    if (item != NULL)
 80014ec:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80014ee:	2b00      	cmp	r3, #0
 80014f0:	d002      	beq.n	80014f8 <cJSON_ParseWithLengthOpts+0xd8>
    {
        cJSON_Delete(item);
 80014f2:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 80014f4:	f7ff fb4a 	bl	8000b8c <cJSON_Delete>
    }

    if (value != NULL)
 80014f8:	68fb      	ldr	r3, [r7, #12]
 80014fa:	2b00      	cmp	r3, #0
 80014fc:	d020      	beq.n	8001540 <cJSON_ParseWithLengthOpts+0x120>
    {
        error local_error;
        local_error.json = (const unsigned char*)value;
 80014fe:	68fb      	ldr	r3, [r7, #12]
 8001500:	613b      	str	r3, [r7, #16]
        local_error.position = 0;
 8001502:	2300      	movs	r3, #0
 8001504:	617b      	str	r3, [r7, #20]

        if (buffer.offset < buffer.length)
 8001506:	6a3a      	ldr	r2, [r7, #32]
 8001508:	69fb      	ldr	r3, [r7, #28]
 800150a:	429a      	cmp	r2, r3
 800150c:	d202      	bcs.n	8001514 <cJSON_ParseWithLengthOpts+0xf4>
        {
            local_error.position = buffer.offset;
 800150e:	6a3b      	ldr	r3, [r7, #32]
 8001510:	617b      	str	r3, [r7, #20]
 8001512:	e005      	b.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        }
        else if (buffer.length > 0)
 8001514:	69fb      	ldr	r3, [r7, #28]
 8001516:	2b00      	cmp	r3, #0
 8001518:	d002      	beq.n	8001520 <cJSON_ParseWithLengthOpts+0x100>
        {
            local_error.position = buffer.length - 1;
 800151a:	69fb      	ldr	r3, [r7, #28]
 800151c:	3b01      	subs	r3, #1
 800151e:	617b      	str	r3, [r7, #20]
        }

        if (return_parse_end != NULL)
 8001520:	687b      	ldr	r3, [r7, #4]
 8001522:	2b00      	cmp	r3, #0
 8001524:	d004      	beq.n	8001530 <cJSON_ParseWithLengthOpts+0x110>
        {
            *return_parse_end = (const char*)local_error.json + local_error.position;
 8001526:	693a      	ldr	r2, [r7, #16]
 8001528:	697b      	ldr	r3, [r7, #20]
 800152a:	441a      	add	r2, r3
 800152c:	687b      	ldr	r3, [r7, #4]
 800152e:	601a      	str	r2, [r3, #0]
        }

        global_error = local_error;
 8001530:	4b06      	ldr	r3, [pc, #24]	@ (800154c <cJSON_ParseWithLengthOpts+0x12c>)
 8001532:	461a      	mov	r2, r3
 8001534:	f107 0310 	add.w	r3, r7, #16
 8001538:	e893 0003 	ldmia.w	r3, {r0, r1}
 800153c:	e882 0003 	stmia.w	r2, {r0, r1}
    }

    return NULL;
 8001540:	2300      	movs	r3, #0
}
 8001542:	4618      	mov	r0, r3
 8001544:	3738      	adds	r7, #56	@ 0x38
 8001546:	46bd      	mov	sp, r7
 8001548:	bd80      	pop	{r7, pc}
 800154a:	bf00      	nop
 800154c:	24000240 	.word	0x24000240
 8001550:	24000000 	.word	0x24000000

08001554 <cJSON_Parse>:

/* Default options for cJSON_Parse */
CJSON_PUBLIC(cJSON *) cJSON_Parse(const char *value)
{
 8001554:	b580      	push	{r7, lr}
 8001556:	b082      	sub	sp, #8
 8001558:	af00      	add	r7, sp, #0
 800155a:	6078      	str	r0, [r7, #4]
    return cJSON_ParseWithOpts(value, 0, 0);
 800155c:	2200      	movs	r2, #0
 800155e:	2100      	movs	r1, #0
 8001560:	6878      	ldr	r0, [r7, #4]
 8001562:	f7ff ff41 	bl	80013e8 <cJSON_ParseWithOpts>
 8001566:	4603      	mov	r3, r0
}
 8001568:	4618      	mov	r0, r3
 800156a:	3708      	adds	r7, #8
 800156c:	46bd      	mov	sp, r7
 800156e:	bd80      	pop	{r7, pc}

08001570 <parse_value>:
    return print_value(item, &p);
}

/* Parser core - when encountering text, process appropriately. */
static cJSON_bool parse_value(cJSON * const item, parse_buffer * const input_buffer)
{
 8001570:	b580      	push	{r7, lr}
 8001572:	b082      	sub	sp, #8
 8001574:	af00      	add	r7, sp, #0
 8001576:	6078      	str	r0, [r7, #4]
 8001578:	6039      	str	r1, [r7, #0]
    if ((input_buffer == NULL) || (input_buffer->content == NULL))
 800157a:	683b      	ldr	r3, [r7, #0]
 800157c:	2b00      	cmp	r3, #0
 800157e:	d003      	beq.n	8001588 <parse_value+0x18>
 8001580:	683b      	ldr	r3, [r7, #0]
 8001582:	681b      	ldr	r3, [r3, #0]
 8001584:	2b00      	cmp	r3, #0
 8001586:	d101      	bne.n	800158c <parse_value+0x1c>
    {
        return false; /* no input */
 8001588:	2300      	movs	r3, #0
 800158a:	e0d2      	b.n	8001732 <parse_value+0x1c2>
    }

    /* parse the different types of values */
    /* null */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "null", 4) == 0))
 800158c:	683b      	ldr	r3, [r7, #0]
 800158e:	2b00      	cmp	r3, #0
 8001590:	d01d      	beq.n	80015ce <parse_value+0x5e>
 8001592:	683b      	ldr	r3, [r7, #0]
 8001594:	689b      	ldr	r3, [r3, #8]
 8001596:	1d1a      	adds	r2, r3, #4
 8001598:	683b      	ldr	r3, [r7, #0]
 800159a:	685b      	ldr	r3, [r3, #4]
 800159c:	429a      	cmp	r2, r3
 800159e:	d816      	bhi.n	80015ce <parse_value+0x5e>
 80015a0:	683b      	ldr	r3, [r7, #0]
 80015a2:	681a      	ldr	r2, [r3, #0]
 80015a4:	683b      	ldr	r3, [r7, #0]
 80015a6:	689b      	ldr	r3, [r3, #8]
 80015a8:	4413      	add	r3, r2
 80015aa:	2204      	movs	r2, #4
 80015ac:	4963      	ldr	r1, [pc, #396]	@ (800173c <parse_value+0x1cc>)
 80015ae:	4618      	mov	r0, r3
 80015b0:	f029 fbee 	bl	802ad90 <strncmp>
 80015b4:	4603      	mov	r3, r0
 80015b6:	2b00      	cmp	r3, #0
 80015b8:	d109      	bne.n	80015ce <parse_value+0x5e>
    {
        item->type = cJSON_NULL;
 80015ba:	687b      	ldr	r3, [r7, #4]
 80015bc:	2204      	movs	r2, #4
 80015be:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 4;
 80015c0:	683b      	ldr	r3, [r7, #0]
 80015c2:	689b      	ldr	r3, [r3, #8]
 80015c4:	1d1a      	adds	r2, r3, #4
 80015c6:	683b      	ldr	r3, [r7, #0]
 80015c8:	609a      	str	r2, [r3, #8]
        return true;
 80015ca:	2301      	movs	r3, #1
 80015cc:	e0b1      	b.n	8001732 <parse_value+0x1c2>
    }
    /* false */
    if (can_read(input_buffer, 5) && (strncmp((const char*)buffer_at_offset(input_buffer), "false", 5) == 0))
 80015ce:	683b      	ldr	r3, [r7, #0]
 80015d0:	2b00      	cmp	r3, #0
 80015d2:	d01d      	beq.n	8001610 <parse_value+0xa0>
 80015d4:	683b      	ldr	r3, [r7, #0]
 80015d6:	689b      	ldr	r3, [r3, #8]
 80015d8:	1d5a      	adds	r2, r3, #5
 80015da:	683b      	ldr	r3, [r7, #0]
 80015dc:	685b      	ldr	r3, [r3, #4]
 80015de:	429a      	cmp	r2, r3
 80015e0:	d816      	bhi.n	8001610 <parse_value+0xa0>
 80015e2:	683b      	ldr	r3, [r7, #0]
 80015e4:	681a      	ldr	r2, [r3, #0]
 80015e6:	683b      	ldr	r3, [r7, #0]
 80015e8:	689b      	ldr	r3, [r3, #8]
 80015ea:	4413      	add	r3, r2
 80015ec:	2205      	movs	r2, #5
 80015ee:	4954      	ldr	r1, [pc, #336]	@ (8001740 <parse_value+0x1d0>)
 80015f0:	4618      	mov	r0, r3
 80015f2:	f029 fbcd 	bl	802ad90 <strncmp>
 80015f6:	4603      	mov	r3, r0
 80015f8:	2b00      	cmp	r3, #0
 80015fa:	d109      	bne.n	8001610 <parse_value+0xa0>
    {
        item->type = cJSON_False;
 80015fc:	687b      	ldr	r3, [r7, #4]
 80015fe:	2201      	movs	r2, #1
 8001600:	60da      	str	r2, [r3, #12]
        input_buffer->offset += 5;
 8001602:	683b      	ldr	r3, [r7, #0]
 8001604:	689b      	ldr	r3, [r3, #8]
 8001606:	1d5a      	adds	r2, r3, #5
 8001608:	683b      	ldr	r3, [r7, #0]
 800160a:	609a      	str	r2, [r3, #8]
        return true;
 800160c:	2301      	movs	r3, #1
 800160e:	e090      	b.n	8001732 <parse_value+0x1c2>
    }
    /* true */
    if (can_read(input_buffer, 4) && (strncmp((const char*)buffer_at_offset(input_buffer), "true", 4) == 0))
 8001610:	683b      	ldr	r3, [r7, #0]
 8001612:	2b00      	cmp	r3, #0
 8001614:	d020      	beq.n	8001658 <parse_value+0xe8>
 8001616:	683b      	ldr	r3, [r7, #0]
 8001618:	689b      	ldr	r3, [r3, #8]
 800161a:	1d1a      	adds	r2, r3, #4
 800161c:	683b      	ldr	r3, [r7, #0]
 800161e:	685b      	ldr	r3, [r3, #4]
 8001620:	429a      	cmp	r2, r3
 8001622:	d819      	bhi.n	8001658 <parse_value+0xe8>
 8001624:	683b      	ldr	r3, [r7, #0]
 8001626:	681a      	ldr	r2, [r3, #0]
 8001628:	683b      	ldr	r3, [r7, #0]
 800162a:	689b      	ldr	r3, [r3, #8]
 800162c:	4413      	add	r3, r2
 800162e:	2204      	movs	r2, #4
 8001630:	4944      	ldr	r1, [pc, #272]	@ (8001744 <parse_value+0x1d4>)
 8001632:	4618      	mov	r0, r3
 8001634:	f029 fbac 	bl	802ad90 <strncmp>
 8001638:	4603      	mov	r3, r0
 800163a:	2b00      	cmp	r3, #0
 800163c:	d10c      	bne.n	8001658 <parse_value+0xe8>
    {
        item->type = cJSON_True;
 800163e:	687b      	ldr	r3, [r7, #4]
 8001640:	2202      	movs	r2, #2
 8001642:	60da      	str	r2, [r3, #12]
        item->valueint = 1;
 8001644:	687b      	ldr	r3, [r7, #4]
 8001646:	2201      	movs	r2, #1
 8001648:	615a      	str	r2, [r3, #20]
        input_buffer->offset += 4;
 800164a:	683b      	ldr	r3, [r7, #0]
 800164c:	689b      	ldr	r3, [r3, #8]
 800164e:	1d1a      	adds	r2, r3, #4
 8001650:	683b      	ldr	r3, [r7, #0]
 8001652:	609a      	str	r2, [r3, #8]
        return true;
 8001654:	2301      	movs	r3, #1
 8001656:	e06c      	b.n	8001732 <parse_value+0x1c2>
    }
    /* string */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '\"'))
 8001658:	683b      	ldr	r3, [r7, #0]
 800165a:	2b00      	cmp	r3, #0
 800165c:	d013      	beq.n	8001686 <parse_value+0x116>
 800165e:	683b      	ldr	r3, [r7, #0]
 8001660:	689a      	ldr	r2, [r3, #8]
 8001662:	683b      	ldr	r3, [r7, #0]
 8001664:	685b      	ldr	r3, [r3, #4]
 8001666:	429a      	cmp	r2, r3
 8001668:	d20d      	bcs.n	8001686 <parse_value+0x116>
 800166a:	683b      	ldr	r3, [r7, #0]
 800166c:	681a      	ldr	r2, [r3, #0]
 800166e:	683b      	ldr	r3, [r7, #0]
 8001670:	689b      	ldr	r3, [r3, #8]
 8001672:	4413      	add	r3, r2
 8001674:	781b      	ldrb	r3, [r3, #0]
 8001676:	2b22      	cmp	r3, #34	@ 0x22
 8001678:	d105      	bne.n	8001686 <parse_value+0x116>
    {
        return parse_string(item, input_buffer);
 800167a:	6839      	ldr	r1, [r7, #0]
 800167c:	6878      	ldr	r0, [r7, #4]
 800167e:	f7ff fcf7 	bl	8001070 <parse_string>
 8001682:	4603      	mov	r3, r0
 8001684:	e055      	b.n	8001732 <parse_value+0x1c2>
    }
    /* number */
    if (can_access_at_index(input_buffer, 0) && ((buffer_at_offset(input_buffer)[0] == '-') || ((buffer_at_offset(input_buffer)[0] >= '0') && (buffer_at_offset(input_buffer)[0] <= '9'))))
 8001686:	683b      	ldr	r3, [r7, #0]
 8001688:	2b00      	cmp	r3, #0
 800168a:	d023      	beq.n	80016d4 <parse_value+0x164>
 800168c:	683b      	ldr	r3, [r7, #0]
 800168e:	689a      	ldr	r2, [r3, #8]
 8001690:	683b      	ldr	r3, [r7, #0]
 8001692:	685b      	ldr	r3, [r3, #4]
 8001694:	429a      	cmp	r2, r3
 8001696:	d21d      	bcs.n	80016d4 <parse_value+0x164>
 8001698:	683b      	ldr	r3, [r7, #0]
 800169a:	681a      	ldr	r2, [r3, #0]
 800169c:	683b      	ldr	r3, [r7, #0]
 800169e:	689b      	ldr	r3, [r3, #8]
 80016a0:	4413      	add	r3, r2
 80016a2:	781b      	ldrb	r3, [r3, #0]
 80016a4:	2b2d      	cmp	r3, #45	@ 0x2d
 80016a6:	d00f      	beq.n	80016c8 <parse_value+0x158>
 80016a8:	683b      	ldr	r3, [r7, #0]
 80016aa:	681a      	ldr	r2, [r3, #0]
 80016ac:	683b      	ldr	r3, [r7, #0]
 80016ae:	689b      	ldr	r3, [r3, #8]
 80016b0:	4413      	add	r3, r2
 80016b2:	781b      	ldrb	r3, [r3, #0]
 80016b4:	2b2f      	cmp	r3, #47	@ 0x2f
 80016b6:	d90d      	bls.n	80016d4 <parse_value+0x164>
 80016b8:	683b      	ldr	r3, [r7, #0]
 80016ba:	681a      	ldr	r2, [r3, #0]
 80016bc:	683b      	ldr	r3, [r7, #0]
 80016be:	689b      	ldr	r3, [r3, #8]
 80016c0:	4413      	add	r3, r2
 80016c2:	781b      	ldrb	r3, [r3, #0]
 80016c4:	2b39      	cmp	r3, #57	@ 0x39
 80016c6:	d805      	bhi.n	80016d4 <parse_value+0x164>
    {
        return parse_number(item, input_buffer);
 80016c8:	6839      	ldr	r1, [r7, #0]
 80016ca:	6878      	ldr	r0, [r7, #4]
 80016cc:	f7ff fab8 	bl	8000c40 <parse_number>
 80016d0:	4603      	mov	r3, r0
 80016d2:	e02e      	b.n	8001732 <parse_value+0x1c2>
    }
    /* array */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '['))
 80016d4:	683b      	ldr	r3, [r7, #0]
 80016d6:	2b00      	cmp	r3, #0
 80016d8:	d013      	beq.n	8001702 <parse_value+0x192>
 80016da:	683b      	ldr	r3, [r7, #0]
 80016dc:	689a      	ldr	r2, [r3, #8]
 80016de:	683b      	ldr	r3, [r7, #0]
 80016e0:	685b      	ldr	r3, [r3, #4]
 80016e2:	429a      	cmp	r2, r3
 80016e4:	d20d      	bcs.n	8001702 <parse_value+0x192>
 80016e6:	683b      	ldr	r3, [r7, #0]
 80016e8:	681a      	ldr	r2, [r3, #0]
 80016ea:	683b      	ldr	r3, [r7, #0]
 80016ec:	689b      	ldr	r3, [r3, #8]
 80016ee:	4413      	add	r3, r2
 80016f0:	781b      	ldrb	r3, [r3, #0]
 80016f2:	2b5b      	cmp	r3, #91	@ 0x5b
 80016f4:	d105      	bne.n	8001702 <parse_value+0x192>
    {
        return parse_array(item, input_buffer);
 80016f6:	6839      	ldr	r1, [r7, #0]
 80016f8:	6878      	ldr	r0, [r7, #4]
 80016fa:	f000 f825 	bl	8001748 <parse_array>
 80016fe:	4603      	mov	r3, r0
 8001700:	e017      	b.n	8001732 <parse_value+0x1c2>
    }
    /* object */
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '{'))
 8001702:	683b      	ldr	r3, [r7, #0]
 8001704:	2b00      	cmp	r3, #0
 8001706:	d013      	beq.n	8001730 <parse_value+0x1c0>
 8001708:	683b      	ldr	r3, [r7, #0]
 800170a:	689a      	ldr	r2, [r3, #8]
 800170c:	683b      	ldr	r3, [r7, #0]
 800170e:	685b      	ldr	r3, [r3, #4]
 8001710:	429a      	cmp	r2, r3
 8001712:	d20d      	bcs.n	8001730 <parse_value+0x1c0>
 8001714:	683b      	ldr	r3, [r7, #0]
 8001716:	681a      	ldr	r2, [r3, #0]
 8001718:	683b      	ldr	r3, [r7, #0]
 800171a:	689b      	ldr	r3, [r3, #8]
 800171c:	4413      	add	r3, r2
 800171e:	781b      	ldrb	r3, [r3, #0]
 8001720:	2b7b      	cmp	r3, #123	@ 0x7b
 8001722:	d105      	bne.n	8001730 <parse_value+0x1c0>
    {
        return parse_object(item, input_buffer);
 8001724:	6839      	ldr	r1, [r7, #0]
 8001726:	6878      	ldr	r0, [r7, #4]
 8001728:	f000 f8d2 	bl	80018d0 <parse_object>
 800172c:	4603      	mov	r3, r0
 800172e:	e000      	b.n	8001732 <parse_value+0x1c2>
    }

    return false;
 8001730:	2300      	movs	r3, #0
}
 8001732:	4618      	mov	r0, r3
 8001734:	3708      	adds	r7, #8
 8001736:	46bd      	mov	sp, r7
 8001738:	bd80      	pop	{r7, pc}
 800173a:	bf00      	nop
 800173c:	0802d4ec 	.word	0x0802d4ec
 8001740:	0802d51c 	.word	0x0802d51c
 8001744:	0802d524 	.word	0x0802d524

08001748 <parse_array>:
    }
}

/* Build an array from input text. */
static cJSON_bool parse_array(cJSON * const item, parse_buffer * const input_buffer)
{
 8001748:	b580      	push	{r7, lr}
 800174a:	b086      	sub	sp, #24
 800174c:	af00      	add	r7, sp, #0
 800174e:	6078      	str	r0, [r7, #4]
 8001750:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* head of the linked list */
 8001752:	2300      	movs	r3, #0
 8001754:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 8001756:	2300      	movs	r3, #0
 8001758:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 800175a:	683b      	ldr	r3, [r7, #0]
 800175c:	68db      	ldr	r3, [r3, #12]
 800175e:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8001762:	d301      	bcc.n	8001768 <parse_array+0x20>
    {
        return false; /* to deeply nested */
 8001764:	2300      	movs	r3, #0
 8001766:	e0af      	b.n	80018c8 <parse_array+0x180>
    }
    input_buffer->depth++;
 8001768:	683b      	ldr	r3, [r7, #0]
 800176a:	68db      	ldr	r3, [r3, #12]
 800176c:	1c5a      	adds	r2, r3, #1
 800176e:	683b      	ldr	r3, [r7, #0]
 8001770:	60da      	str	r2, [r3, #12]

    if (buffer_at_offset(input_buffer)[0] != '[')
 8001772:	683b      	ldr	r3, [r7, #0]
 8001774:	681a      	ldr	r2, [r3, #0]
 8001776:	683b      	ldr	r3, [r7, #0]
 8001778:	689b      	ldr	r3, [r3, #8]
 800177a:	4413      	add	r3, r2
 800177c:	781b      	ldrb	r3, [r3, #0]
 800177e:	2b5b      	cmp	r3, #91	@ 0x5b
 8001780:	f040 8094 	bne.w	80018ac <parse_array+0x164>
    {
        /* not an array */
        goto fail;
    }

    input_buffer->offset++;
 8001784:	683b      	ldr	r3, [r7, #0]
 8001786:	689b      	ldr	r3, [r3, #8]
 8001788:	1c5a      	adds	r2, r3, #1
 800178a:	683b      	ldr	r3, [r7, #0]
 800178c:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800178e:	6838      	ldr	r0, [r7, #0]
 8001790:	f7ff fdb6 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ']'))
 8001794:	683b      	ldr	r3, [r7, #0]
 8001796:	2b00      	cmp	r3, #0
 8001798:	d00d      	beq.n	80017b6 <parse_array+0x6e>
 800179a:	683b      	ldr	r3, [r7, #0]
 800179c:	689a      	ldr	r2, [r3, #8]
 800179e:	683b      	ldr	r3, [r7, #0]
 80017a0:	685b      	ldr	r3, [r3, #4]
 80017a2:	429a      	cmp	r2, r3
 80017a4:	d207      	bcs.n	80017b6 <parse_array+0x6e>
 80017a6:	683b      	ldr	r3, [r7, #0]
 80017a8:	681a      	ldr	r2, [r3, #0]
 80017aa:	683b      	ldr	r3, [r7, #0]
 80017ac:	689b      	ldr	r3, [r3, #8]
 80017ae:	4413      	add	r3, r2
 80017b0:	781b      	ldrb	r3, [r3, #0]
 80017b2:	2b5d      	cmp	r3, #93	@ 0x5d
 80017b4:	d061      	beq.n	800187a <parse_array+0x132>
        /* empty array */
        goto success;
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 80017b6:	683b      	ldr	r3, [r7, #0]
 80017b8:	2b00      	cmp	r3, #0
 80017ba:	d005      	beq.n	80017c8 <parse_array+0x80>
 80017bc:	683b      	ldr	r3, [r7, #0]
 80017be:	689a      	ldr	r2, [r3, #8]
 80017c0:	683b      	ldr	r3, [r7, #0]
 80017c2:	685b      	ldr	r3, [r3, #4]
 80017c4:	429a      	cmp	r2, r3
 80017c6:	d305      	bcc.n	80017d4 <parse_array+0x8c>
    {
        input_buffer->offset--;
 80017c8:	683b      	ldr	r3, [r7, #0]
 80017ca:	689b      	ldr	r3, [r3, #8]
 80017cc:	1e5a      	subs	r2, r3, #1
 80017ce:	683b      	ldr	r3, [r7, #0]
 80017d0:	609a      	str	r2, [r3, #8]
        goto fail;
 80017d2:	e072      	b.n	80018ba <parse_array+0x172>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 80017d4:	683b      	ldr	r3, [r7, #0]
 80017d6:	689b      	ldr	r3, [r3, #8]
 80017d8:	1e5a      	subs	r2, r3, #1
 80017da:	683b      	ldr	r3, [r7, #0]
 80017dc:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 80017de:	683b      	ldr	r3, [r7, #0]
 80017e0:	3310      	adds	r3, #16
 80017e2:	4618      	mov	r0, r3
 80017e4:	f7ff f9bc 	bl	8000b60 <cJSON_New_Item>
 80017e8:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 80017ea:	68fb      	ldr	r3, [r7, #12]
 80017ec:	2b00      	cmp	r3, #0
 80017ee:	d05f      	beq.n	80018b0 <parse_array+0x168>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 80017f0:	697b      	ldr	r3, [r7, #20]
 80017f2:	2b00      	cmp	r3, #0
 80017f4:	d104      	bne.n	8001800 <parse_array+0xb8>
        {
            /* start the linked list */
            current_item = head = new_item;
 80017f6:	68fb      	ldr	r3, [r7, #12]
 80017f8:	617b      	str	r3, [r7, #20]
 80017fa:	697b      	ldr	r3, [r7, #20]
 80017fc:	613b      	str	r3, [r7, #16]
 80017fe:	e007      	b.n	8001810 <parse_array+0xc8>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 8001800:	693b      	ldr	r3, [r7, #16]
 8001802:	68fa      	ldr	r2, [r7, #12]
 8001804:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 8001806:	68fb      	ldr	r3, [r7, #12]
 8001808:	693a      	ldr	r2, [r7, #16]
 800180a:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 800180c:	68fb      	ldr	r3, [r7, #12]
 800180e:	613b      	str	r3, [r7, #16]
        }

        /* parse next value */
        input_buffer->offset++;
 8001810:	683b      	ldr	r3, [r7, #0]
 8001812:	689b      	ldr	r3, [r3, #8]
 8001814:	1c5a      	adds	r2, r3, #1
 8001816:	683b      	ldr	r3, [r7, #0]
 8001818:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 800181a:	6838      	ldr	r0, [r7, #0]
 800181c:	f7ff fd70 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001820:	6839      	ldr	r1, [r7, #0]
 8001822:	6938      	ldr	r0, [r7, #16]
 8001824:	f7ff fea4 	bl	8001570 <parse_value>
 8001828:	4603      	mov	r3, r0
 800182a:	2b00      	cmp	r3, #0
 800182c:	d042      	beq.n	80018b4 <parse_array+0x16c>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 800182e:	6838      	ldr	r0, [r7, #0]
 8001830:	f7ff fd66 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001834:	683b      	ldr	r3, [r7, #0]
 8001836:	2b00      	cmp	r3, #0
 8001838:	d00d      	beq.n	8001856 <parse_array+0x10e>
 800183a:	683b      	ldr	r3, [r7, #0]
 800183c:	689a      	ldr	r2, [r3, #8]
 800183e:	683b      	ldr	r3, [r7, #0]
 8001840:	685b      	ldr	r3, [r3, #4]
 8001842:	429a      	cmp	r2, r3
 8001844:	d207      	bcs.n	8001856 <parse_array+0x10e>
 8001846:	683b      	ldr	r3, [r7, #0]
 8001848:	681a      	ldr	r2, [r3, #0]
 800184a:	683b      	ldr	r3, [r7, #0]
 800184c:	689b      	ldr	r3, [r3, #8]
 800184e:	4413      	add	r3, r2
 8001850:	781b      	ldrb	r3, [r3, #0]
 8001852:	2b2c      	cmp	r3, #44	@ 0x2c
 8001854:	d0c3      	beq.n	80017de <parse_array+0x96>

    if (cannot_access_at_index(input_buffer, 0) || buffer_at_offset(input_buffer)[0] != ']')
 8001856:	683b      	ldr	r3, [r7, #0]
 8001858:	2b00      	cmp	r3, #0
 800185a:	d02d      	beq.n	80018b8 <parse_array+0x170>
 800185c:	683b      	ldr	r3, [r7, #0]
 800185e:	689a      	ldr	r2, [r3, #8]
 8001860:	683b      	ldr	r3, [r7, #0]
 8001862:	685b      	ldr	r3, [r3, #4]
 8001864:	429a      	cmp	r2, r3
 8001866:	d227      	bcs.n	80018b8 <parse_array+0x170>
 8001868:	683b      	ldr	r3, [r7, #0]
 800186a:	681a      	ldr	r2, [r3, #0]
 800186c:	683b      	ldr	r3, [r7, #0]
 800186e:	689b      	ldr	r3, [r3, #8]
 8001870:	4413      	add	r3, r2
 8001872:	781b      	ldrb	r3, [r3, #0]
 8001874:	2b5d      	cmp	r3, #93	@ 0x5d
 8001876:	d11f      	bne.n	80018b8 <parse_array+0x170>
    {
        goto fail; /* expected end of array */
    }

success:
 8001878:	e000      	b.n	800187c <parse_array+0x134>
        goto success;
 800187a:	bf00      	nop
    input_buffer->depth--;
 800187c:	683b      	ldr	r3, [r7, #0]
 800187e:	68db      	ldr	r3, [r3, #12]
 8001880:	1e5a      	subs	r2, r3, #1
 8001882:	683b      	ldr	r3, [r7, #0]
 8001884:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001886:	697b      	ldr	r3, [r7, #20]
 8001888:	2b00      	cmp	r3, #0
 800188a:	d002      	beq.n	8001892 <parse_array+0x14a>
        head->prev = current_item;
 800188c:	697b      	ldr	r3, [r7, #20]
 800188e:	693a      	ldr	r2, [r7, #16]
 8001890:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Array;
 8001892:	687b      	ldr	r3, [r7, #4]
 8001894:	2220      	movs	r2, #32
 8001896:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001898:	687b      	ldr	r3, [r7, #4]
 800189a:	697a      	ldr	r2, [r7, #20]
 800189c:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 800189e:	683b      	ldr	r3, [r7, #0]
 80018a0:	689b      	ldr	r3, [r3, #8]
 80018a2:	1c5a      	adds	r2, r3, #1
 80018a4:	683b      	ldr	r3, [r7, #0]
 80018a6:	609a      	str	r2, [r3, #8]

    return true;
 80018a8:	2301      	movs	r3, #1
 80018aa:	e00d      	b.n	80018c8 <parse_array+0x180>
        goto fail;
 80018ac:	bf00      	nop
 80018ae:	e004      	b.n	80018ba <parse_array+0x172>
            goto fail; /* allocation failure */
 80018b0:	bf00      	nop
 80018b2:	e002      	b.n	80018ba <parse_array+0x172>
            goto fail; /* failed to parse value */
 80018b4:	bf00      	nop
 80018b6:	e000      	b.n	80018ba <parse_array+0x172>
        goto fail; /* expected end of array */
 80018b8:	bf00      	nop

fail:
    if (head != NULL)
 80018ba:	697b      	ldr	r3, [r7, #20]
 80018bc:	2b00      	cmp	r3, #0
 80018be:	d002      	beq.n	80018c6 <parse_array+0x17e>
    {
        cJSON_Delete(head);
 80018c0:	6978      	ldr	r0, [r7, #20]
 80018c2:	f7ff f963 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 80018c6:	2300      	movs	r3, #0
}
 80018c8:	4618      	mov	r0, r3
 80018ca:	3718      	adds	r7, #24
 80018cc:	46bd      	mov	sp, r7
 80018ce:	bd80      	pop	{r7, pc}

080018d0 <parse_object>:
    return true;
}

/* Build an object from the text. */
static cJSON_bool parse_object(cJSON * const item, parse_buffer * const input_buffer)
{
 80018d0:	b580      	push	{r7, lr}
 80018d2:	b086      	sub	sp, #24
 80018d4:	af00      	add	r7, sp, #0
 80018d6:	6078      	str	r0, [r7, #4]
 80018d8:	6039      	str	r1, [r7, #0]
    cJSON *head = NULL; /* linked list head */
 80018da:	2300      	movs	r3, #0
 80018dc:	617b      	str	r3, [r7, #20]
    cJSON *current_item = NULL;
 80018de:	2300      	movs	r3, #0
 80018e0:	613b      	str	r3, [r7, #16]

    if (input_buffer->depth >= CJSON_NESTING_LIMIT)
 80018e2:	683b      	ldr	r3, [r7, #0]
 80018e4:	68db      	ldr	r3, [r3, #12]
 80018e6:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 80018ea:	d301      	bcc.n	80018f0 <parse_object+0x20>
    {
        return false; /* to deeply nested */
 80018ec:	2300      	movs	r3, #0
 80018ee:	e0f7      	b.n	8001ae0 <parse_object+0x210>
    }
    input_buffer->depth++;
 80018f0:	683b      	ldr	r3, [r7, #0]
 80018f2:	68db      	ldr	r3, [r3, #12]
 80018f4:	1c5a      	adds	r2, r3, #1
 80018f6:	683b      	ldr	r3, [r7, #0]
 80018f8:	60da      	str	r2, [r3, #12]

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '{'))
 80018fa:	683b      	ldr	r3, [r7, #0]
 80018fc:	2b00      	cmp	r3, #0
 80018fe:	f000 80db 	beq.w	8001ab8 <parse_object+0x1e8>
 8001902:	683b      	ldr	r3, [r7, #0]
 8001904:	689a      	ldr	r2, [r3, #8]
 8001906:	683b      	ldr	r3, [r7, #0]
 8001908:	685b      	ldr	r3, [r3, #4]
 800190a:	429a      	cmp	r2, r3
 800190c:	f080 80d4 	bcs.w	8001ab8 <parse_object+0x1e8>
 8001910:	683b      	ldr	r3, [r7, #0]
 8001912:	681a      	ldr	r2, [r3, #0]
 8001914:	683b      	ldr	r3, [r7, #0]
 8001916:	689b      	ldr	r3, [r3, #8]
 8001918:	4413      	add	r3, r2
 800191a:	781b      	ldrb	r3, [r3, #0]
 800191c:	2b7b      	cmp	r3, #123	@ 0x7b
 800191e:	f040 80cb 	bne.w	8001ab8 <parse_object+0x1e8>
    {
        goto fail; /* not an object */
    }

    input_buffer->offset++;
 8001922:	683b      	ldr	r3, [r7, #0]
 8001924:	689b      	ldr	r3, [r3, #8]
 8001926:	1c5a      	adds	r2, r3, #1
 8001928:	683b      	ldr	r3, [r7, #0]
 800192a:	609a      	str	r2, [r3, #8]
    buffer_skip_whitespace(input_buffer);
 800192c:	6838      	ldr	r0, [r7, #0]
 800192e:	f7ff fce7 	bl	8001300 <buffer_skip_whitespace>
    if (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == '}'))
 8001932:	683b      	ldr	r3, [r7, #0]
 8001934:	2b00      	cmp	r3, #0
 8001936:	d00e      	beq.n	8001956 <parse_object+0x86>
 8001938:	683b      	ldr	r3, [r7, #0]
 800193a:	689a      	ldr	r2, [r3, #8]
 800193c:	683b      	ldr	r3, [r7, #0]
 800193e:	685b      	ldr	r3, [r3, #4]
 8001940:	429a      	cmp	r2, r3
 8001942:	d208      	bcs.n	8001956 <parse_object+0x86>
 8001944:	683b      	ldr	r3, [r7, #0]
 8001946:	681a      	ldr	r2, [r3, #0]
 8001948:	683b      	ldr	r3, [r7, #0]
 800194a:	689b      	ldr	r3, [r3, #8]
 800194c:	4413      	add	r3, r2
 800194e:	781b      	ldrb	r3, [r3, #0]
 8001950:	2b7d      	cmp	r3, #125	@ 0x7d
 8001952:	f000 8098 	beq.w	8001a86 <parse_object+0x1b6>
    {
        goto success; /* empty object */
    }

    /* check if we skipped to the end of the buffer */
    if (cannot_access_at_index(input_buffer, 0))
 8001956:	683b      	ldr	r3, [r7, #0]
 8001958:	2b00      	cmp	r3, #0
 800195a:	d005      	beq.n	8001968 <parse_object+0x98>
 800195c:	683b      	ldr	r3, [r7, #0]
 800195e:	689a      	ldr	r2, [r3, #8]
 8001960:	683b      	ldr	r3, [r7, #0]
 8001962:	685b      	ldr	r3, [r3, #4]
 8001964:	429a      	cmp	r2, r3
 8001966:	d305      	bcc.n	8001974 <parse_object+0xa4>
    {
        input_buffer->offset--;
 8001968:	683b      	ldr	r3, [r7, #0]
 800196a:	689b      	ldr	r3, [r3, #8]
 800196c:	1e5a      	subs	r2, r3, #1
 800196e:	683b      	ldr	r3, [r7, #0]
 8001970:	609a      	str	r2, [r3, #8]
        goto fail;
 8001972:	e0ae      	b.n	8001ad2 <parse_object+0x202>
    }

    /* step back to character in front of the first element */
    input_buffer->offset--;
 8001974:	683b      	ldr	r3, [r7, #0]
 8001976:	689b      	ldr	r3, [r3, #8]
 8001978:	1e5a      	subs	r2, r3, #1
 800197a:	683b      	ldr	r3, [r7, #0]
 800197c:	609a      	str	r2, [r3, #8]
    /* loop through the comma separated array elements */
    do
    {
        /* allocate next item */
        cJSON *new_item = cJSON_New_Item(&(input_buffer->hooks));
 800197e:	683b      	ldr	r3, [r7, #0]
 8001980:	3310      	adds	r3, #16
 8001982:	4618      	mov	r0, r3
 8001984:	f7ff f8ec 	bl	8000b60 <cJSON_New_Item>
 8001988:	60f8      	str	r0, [r7, #12]
        if (new_item == NULL)
 800198a:	68fb      	ldr	r3, [r7, #12]
 800198c:	2b00      	cmp	r3, #0
 800198e:	f000 8095 	beq.w	8001abc <parse_object+0x1ec>
        {
            goto fail; /* allocation failure */
        }

        /* attach next item to list */
        if (head == NULL)
 8001992:	697b      	ldr	r3, [r7, #20]
 8001994:	2b00      	cmp	r3, #0
 8001996:	d104      	bne.n	80019a2 <parse_object+0xd2>
        {
            /* start the linked list */
            current_item = head = new_item;
 8001998:	68fb      	ldr	r3, [r7, #12]
 800199a:	617b      	str	r3, [r7, #20]
 800199c:	697b      	ldr	r3, [r7, #20]
 800199e:	613b      	str	r3, [r7, #16]
 80019a0:	e007      	b.n	80019b2 <parse_object+0xe2>
        }
        else
        {
            /* add to the end and advance */
            current_item->next = new_item;
 80019a2:	693b      	ldr	r3, [r7, #16]
 80019a4:	68fa      	ldr	r2, [r7, #12]
 80019a6:	601a      	str	r2, [r3, #0]
            new_item->prev = current_item;
 80019a8:	68fb      	ldr	r3, [r7, #12]
 80019aa:	693a      	ldr	r2, [r7, #16]
 80019ac:	605a      	str	r2, [r3, #4]
            current_item = new_item;
 80019ae:	68fb      	ldr	r3, [r7, #12]
 80019b0:	613b      	str	r3, [r7, #16]
        }

        if (cannot_access_at_index(input_buffer, 1))
 80019b2:	683b      	ldr	r3, [r7, #0]
 80019b4:	2b00      	cmp	r3, #0
 80019b6:	f000 8083 	beq.w	8001ac0 <parse_object+0x1f0>
 80019ba:	683b      	ldr	r3, [r7, #0]
 80019bc:	689b      	ldr	r3, [r3, #8]
 80019be:	1c5a      	adds	r2, r3, #1
 80019c0:	683b      	ldr	r3, [r7, #0]
 80019c2:	685b      	ldr	r3, [r3, #4]
 80019c4:	429a      	cmp	r2, r3
 80019c6:	d27b      	bcs.n	8001ac0 <parse_object+0x1f0>
        {
            goto fail; /* nothing comes after the comma */
        }

        /* parse the name of the child */
        input_buffer->offset++;
 80019c8:	683b      	ldr	r3, [r7, #0]
 80019ca:	689b      	ldr	r3, [r3, #8]
 80019cc:	1c5a      	adds	r2, r3, #1
 80019ce:	683b      	ldr	r3, [r7, #0]
 80019d0:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 80019d2:	6838      	ldr	r0, [r7, #0]
 80019d4:	f7ff fc94 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_string(current_item, input_buffer))
 80019d8:	6839      	ldr	r1, [r7, #0]
 80019da:	6938      	ldr	r0, [r7, #16]
 80019dc:	f7ff fb48 	bl	8001070 <parse_string>
 80019e0:	4603      	mov	r3, r0
 80019e2:	2b00      	cmp	r3, #0
 80019e4:	d06e      	beq.n	8001ac4 <parse_object+0x1f4>
        {
            goto fail; /* failed to parse name */
        }
        buffer_skip_whitespace(input_buffer);
 80019e6:	6838      	ldr	r0, [r7, #0]
 80019e8:	f7ff fc8a 	bl	8001300 <buffer_skip_whitespace>

        /* swap valuestring and string, because we parsed the name */
        current_item->string = current_item->valuestring;
 80019ec:	693b      	ldr	r3, [r7, #16]
 80019ee:	691a      	ldr	r2, [r3, #16]
 80019f0:	693b      	ldr	r3, [r7, #16]
 80019f2:	621a      	str	r2, [r3, #32]
        current_item->valuestring = NULL;
 80019f4:	693b      	ldr	r3, [r7, #16]
 80019f6:	2200      	movs	r2, #0
 80019f8:	611a      	str	r2, [r3, #16]

        if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != ':'))
 80019fa:	683b      	ldr	r3, [r7, #0]
 80019fc:	2b00      	cmp	r3, #0
 80019fe:	d063      	beq.n	8001ac8 <parse_object+0x1f8>
 8001a00:	683b      	ldr	r3, [r7, #0]
 8001a02:	689a      	ldr	r2, [r3, #8]
 8001a04:	683b      	ldr	r3, [r7, #0]
 8001a06:	685b      	ldr	r3, [r3, #4]
 8001a08:	429a      	cmp	r2, r3
 8001a0a:	d25d      	bcs.n	8001ac8 <parse_object+0x1f8>
 8001a0c:	683b      	ldr	r3, [r7, #0]
 8001a0e:	681a      	ldr	r2, [r3, #0]
 8001a10:	683b      	ldr	r3, [r7, #0]
 8001a12:	689b      	ldr	r3, [r3, #8]
 8001a14:	4413      	add	r3, r2
 8001a16:	781b      	ldrb	r3, [r3, #0]
 8001a18:	2b3a      	cmp	r3, #58	@ 0x3a
 8001a1a:	d155      	bne.n	8001ac8 <parse_object+0x1f8>
        {
            goto fail; /* invalid object */
        }

        /* parse the value */
        input_buffer->offset++;
 8001a1c:	683b      	ldr	r3, [r7, #0]
 8001a1e:	689b      	ldr	r3, [r3, #8]
 8001a20:	1c5a      	adds	r2, r3, #1
 8001a22:	683b      	ldr	r3, [r7, #0]
 8001a24:	609a      	str	r2, [r3, #8]
        buffer_skip_whitespace(input_buffer);
 8001a26:	6838      	ldr	r0, [r7, #0]
 8001a28:	f7ff fc6a 	bl	8001300 <buffer_skip_whitespace>
        if (!parse_value(current_item, input_buffer))
 8001a2c:	6839      	ldr	r1, [r7, #0]
 8001a2e:	6938      	ldr	r0, [r7, #16]
 8001a30:	f7ff fd9e 	bl	8001570 <parse_value>
 8001a34:	4603      	mov	r3, r0
 8001a36:	2b00      	cmp	r3, #0
 8001a38:	d048      	beq.n	8001acc <parse_object+0x1fc>
        {
            goto fail; /* failed to parse value */
        }
        buffer_skip_whitespace(input_buffer);
 8001a3a:	6838      	ldr	r0, [r7, #0]
 8001a3c:	f7ff fc60 	bl	8001300 <buffer_skip_whitespace>
    }
    while (can_access_at_index(input_buffer, 0) && (buffer_at_offset(input_buffer)[0] == ','));
 8001a40:	683b      	ldr	r3, [r7, #0]
 8001a42:	2b00      	cmp	r3, #0
 8001a44:	d00d      	beq.n	8001a62 <parse_object+0x192>
 8001a46:	683b      	ldr	r3, [r7, #0]
 8001a48:	689a      	ldr	r2, [r3, #8]
 8001a4a:	683b      	ldr	r3, [r7, #0]
 8001a4c:	685b      	ldr	r3, [r3, #4]
 8001a4e:	429a      	cmp	r2, r3
 8001a50:	d207      	bcs.n	8001a62 <parse_object+0x192>
 8001a52:	683b      	ldr	r3, [r7, #0]
 8001a54:	681a      	ldr	r2, [r3, #0]
 8001a56:	683b      	ldr	r3, [r7, #0]
 8001a58:	689b      	ldr	r3, [r3, #8]
 8001a5a:	4413      	add	r3, r2
 8001a5c:	781b      	ldrb	r3, [r3, #0]
 8001a5e:	2b2c      	cmp	r3, #44	@ 0x2c
 8001a60:	d08d      	beq.n	800197e <parse_object+0xae>

    if (cannot_access_at_index(input_buffer, 0) || (buffer_at_offset(input_buffer)[0] != '}'))
 8001a62:	683b      	ldr	r3, [r7, #0]
 8001a64:	2b00      	cmp	r3, #0
 8001a66:	d033      	beq.n	8001ad0 <parse_object+0x200>
 8001a68:	683b      	ldr	r3, [r7, #0]
 8001a6a:	689a      	ldr	r2, [r3, #8]
 8001a6c:	683b      	ldr	r3, [r7, #0]
 8001a6e:	685b      	ldr	r3, [r3, #4]
 8001a70:	429a      	cmp	r2, r3
 8001a72:	d22d      	bcs.n	8001ad0 <parse_object+0x200>
 8001a74:	683b      	ldr	r3, [r7, #0]
 8001a76:	681a      	ldr	r2, [r3, #0]
 8001a78:	683b      	ldr	r3, [r7, #0]
 8001a7a:	689b      	ldr	r3, [r3, #8]
 8001a7c:	4413      	add	r3, r2
 8001a7e:	781b      	ldrb	r3, [r3, #0]
 8001a80:	2b7d      	cmp	r3, #125	@ 0x7d
 8001a82:	d125      	bne.n	8001ad0 <parse_object+0x200>
    {
        goto fail; /* expected end of object */
    }

success:
 8001a84:	e000      	b.n	8001a88 <parse_object+0x1b8>
        goto success; /* empty object */
 8001a86:	bf00      	nop
    input_buffer->depth--;
 8001a88:	683b      	ldr	r3, [r7, #0]
 8001a8a:	68db      	ldr	r3, [r3, #12]
 8001a8c:	1e5a      	subs	r2, r3, #1
 8001a8e:	683b      	ldr	r3, [r7, #0]
 8001a90:	60da      	str	r2, [r3, #12]

    if (head != NULL) {
 8001a92:	697b      	ldr	r3, [r7, #20]
 8001a94:	2b00      	cmp	r3, #0
 8001a96:	d002      	beq.n	8001a9e <parse_object+0x1ce>
        head->prev = current_item;
 8001a98:	697b      	ldr	r3, [r7, #20]
 8001a9a:	693a      	ldr	r2, [r7, #16]
 8001a9c:	605a      	str	r2, [r3, #4]
    }

    item->type = cJSON_Object;
 8001a9e:	687b      	ldr	r3, [r7, #4]
 8001aa0:	2240      	movs	r2, #64	@ 0x40
 8001aa2:	60da      	str	r2, [r3, #12]
    item->child = head;
 8001aa4:	687b      	ldr	r3, [r7, #4]
 8001aa6:	697a      	ldr	r2, [r7, #20]
 8001aa8:	609a      	str	r2, [r3, #8]

    input_buffer->offset++;
 8001aaa:	683b      	ldr	r3, [r7, #0]
 8001aac:	689b      	ldr	r3, [r3, #8]
 8001aae:	1c5a      	adds	r2, r3, #1
 8001ab0:	683b      	ldr	r3, [r7, #0]
 8001ab2:	609a      	str	r2, [r3, #8]
    return true;
 8001ab4:	2301      	movs	r3, #1
 8001ab6:	e013      	b.n	8001ae0 <parse_object+0x210>
        goto fail; /* not an object */
 8001ab8:	bf00      	nop
 8001aba:	e00a      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* allocation failure */
 8001abc:	bf00      	nop
 8001abe:	e008      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* nothing comes after the comma */
 8001ac0:	bf00      	nop
 8001ac2:	e006      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse name */
 8001ac4:	bf00      	nop
 8001ac6:	e004      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* invalid object */
 8001ac8:	bf00      	nop
 8001aca:	e002      	b.n	8001ad2 <parse_object+0x202>
            goto fail; /* failed to parse value */
 8001acc:	bf00      	nop
 8001ace:	e000      	b.n	8001ad2 <parse_object+0x202>
        goto fail; /* expected end of object */
 8001ad0:	bf00      	nop

fail:
    if (head != NULL)
 8001ad2:	697b      	ldr	r3, [r7, #20]
 8001ad4:	2b00      	cmp	r3, #0
 8001ad6:	d002      	beq.n	8001ade <parse_object+0x20e>
    {
        cJSON_Delete(head);
 8001ad8:	6978      	ldr	r0, [r7, #20]
 8001ada:	f7ff f857 	bl	8000b8c <cJSON_Delete>
    }

    return false;
 8001ade:	2300      	movs	r3, #0
}
 8001ae0:	4618      	mov	r0, r3
 8001ae2:	3718      	adds	r7, #24
 8001ae4:	46bd      	mov	sp, r7
 8001ae6:	bd80      	pop	{r7, pc}

08001ae8 <cJSON_GetArraySize>:
    return true;
}

/* Get Array size/item / object item. */
CJSON_PUBLIC(int) cJSON_GetArraySize(const cJSON *array)
{
 8001ae8:	b480      	push	{r7}
 8001aea:	b085      	sub	sp, #20
 8001aec:	af00      	add	r7, sp, #0
 8001aee:	6078      	str	r0, [r7, #4]
    cJSON *child = NULL;
 8001af0:	2300      	movs	r3, #0
 8001af2:	60fb      	str	r3, [r7, #12]
    size_t size = 0;
 8001af4:	2300      	movs	r3, #0
 8001af6:	60bb      	str	r3, [r7, #8]

    if (array == NULL)
 8001af8:	687b      	ldr	r3, [r7, #4]
 8001afa:	2b00      	cmp	r3, #0
 8001afc:	d101      	bne.n	8001b02 <cJSON_GetArraySize+0x1a>
    {
        return 0;
 8001afe:	2300      	movs	r3, #0
 8001b00:	e00d      	b.n	8001b1e <cJSON_GetArraySize+0x36>
    }

    child = array->child;
 8001b02:	687b      	ldr	r3, [r7, #4]
 8001b04:	689b      	ldr	r3, [r3, #8]
 8001b06:	60fb      	str	r3, [r7, #12]

    while(child != NULL)
 8001b08:	e005      	b.n	8001b16 <cJSON_GetArraySize+0x2e>
    {
        size++;
 8001b0a:	68bb      	ldr	r3, [r7, #8]
 8001b0c:	3301      	adds	r3, #1
 8001b0e:	60bb      	str	r3, [r7, #8]
        child = child->next;
 8001b10:	68fb      	ldr	r3, [r7, #12]
 8001b12:	681b      	ldr	r3, [r3, #0]
 8001b14:	60fb      	str	r3, [r7, #12]
    while(child != NULL)
 8001b16:	68fb      	ldr	r3, [r7, #12]
 8001b18:	2b00      	cmp	r3, #0
 8001b1a:	d1f6      	bne.n	8001b0a <cJSON_GetArraySize+0x22>
    }

    /* FIXME: Can overflow here. Cannot be fixed without breaking the API */

    return (int)size;
 8001b1c:	68bb      	ldr	r3, [r7, #8]
}
 8001b1e:	4618      	mov	r0, r3
 8001b20:	3714      	adds	r7, #20
 8001b22:	46bd      	mov	sp, r7
 8001b24:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b28:	4770      	bx	lr

08001b2a <get_array_item>:

static cJSON* get_array_item(const cJSON *array, size_t index)
{
 8001b2a:	b480      	push	{r7}
 8001b2c:	b085      	sub	sp, #20
 8001b2e:	af00      	add	r7, sp, #0
 8001b30:	6078      	str	r0, [r7, #4]
 8001b32:	6039      	str	r1, [r7, #0]
    cJSON *current_child = NULL;
 8001b34:	2300      	movs	r3, #0
 8001b36:	60fb      	str	r3, [r7, #12]

    if (array == NULL)
 8001b38:	687b      	ldr	r3, [r7, #4]
 8001b3a:	2b00      	cmp	r3, #0
 8001b3c:	d101      	bne.n	8001b42 <get_array_item+0x18>
    {
        return NULL;
 8001b3e:	2300      	movs	r3, #0
 8001b40:	e010      	b.n	8001b64 <get_array_item+0x3a>
    }

    current_child = array->child;
 8001b42:	687b      	ldr	r3, [r7, #4]
 8001b44:	689b      	ldr	r3, [r3, #8]
 8001b46:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b48:	e005      	b.n	8001b56 <get_array_item+0x2c>
    {
        index--;
 8001b4a:	683b      	ldr	r3, [r7, #0]
 8001b4c:	3b01      	subs	r3, #1
 8001b4e:	603b      	str	r3, [r7, #0]
        current_child = current_child->next;
 8001b50:	68fb      	ldr	r3, [r7, #12]
 8001b52:	681b      	ldr	r3, [r3, #0]
 8001b54:	60fb      	str	r3, [r7, #12]
    while ((current_child != NULL) && (index > 0))
 8001b56:	68fb      	ldr	r3, [r7, #12]
 8001b58:	2b00      	cmp	r3, #0
 8001b5a:	d002      	beq.n	8001b62 <get_array_item+0x38>
 8001b5c:	683b      	ldr	r3, [r7, #0]
 8001b5e:	2b00      	cmp	r3, #0
 8001b60:	d1f3      	bne.n	8001b4a <get_array_item+0x20>
    }

    return current_child;
 8001b62:	68fb      	ldr	r3, [r7, #12]
}
 8001b64:	4618      	mov	r0, r3
 8001b66:	3714      	adds	r7, #20
 8001b68:	46bd      	mov	sp, r7
 8001b6a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001b6e:	4770      	bx	lr

08001b70 <cJSON_GetArrayItem>:

CJSON_PUBLIC(cJSON *) cJSON_GetArrayItem(const cJSON *array, int index)
{
 8001b70:	b580      	push	{r7, lr}
 8001b72:	b082      	sub	sp, #8
 8001b74:	af00      	add	r7, sp, #0
 8001b76:	6078      	str	r0, [r7, #4]
 8001b78:	6039      	str	r1, [r7, #0]
    if (index < 0)
 8001b7a:	683b      	ldr	r3, [r7, #0]
 8001b7c:	2b00      	cmp	r3, #0
 8001b7e:	da01      	bge.n	8001b84 <cJSON_GetArrayItem+0x14>
    {
        return NULL;
 8001b80:	2300      	movs	r3, #0
 8001b82:	e005      	b.n	8001b90 <cJSON_GetArrayItem+0x20>
    }

    return get_array_item(array, (size_t)index);
 8001b84:	683b      	ldr	r3, [r7, #0]
 8001b86:	4619      	mov	r1, r3
 8001b88:	6878      	ldr	r0, [r7, #4]
 8001b8a:	f7ff ffce 	bl	8001b2a <get_array_item>
 8001b8e:	4603      	mov	r3, r0
}
 8001b90:	4618      	mov	r0, r3
 8001b92:	3708      	adds	r7, #8
 8001b94:	46bd      	mov	sp, r7
 8001b96:	bd80      	pop	{r7, pc}

08001b98 <get_object_item>:

static cJSON *get_object_item(const cJSON * const object, const char * const name, const cJSON_bool case_sensitive)
{
 8001b98:	b580      	push	{r7, lr}
 8001b9a:	b086      	sub	sp, #24
 8001b9c:	af00      	add	r7, sp, #0
 8001b9e:	60f8      	str	r0, [r7, #12]
 8001ba0:	60b9      	str	r1, [r7, #8]
 8001ba2:	607a      	str	r2, [r7, #4]
    cJSON *current_element = NULL;
 8001ba4:	2300      	movs	r3, #0
 8001ba6:	617b      	str	r3, [r7, #20]

    if ((object == NULL) || (name == NULL))
 8001ba8:	68fb      	ldr	r3, [r7, #12]
 8001baa:	2b00      	cmp	r3, #0
 8001bac:	d002      	beq.n	8001bb4 <get_object_item+0x1c>
 8001bae:	68bb      	ldr	r3, [r7, #8]
 8001bb0:	2b00      	cmp	r3, #0
 8001bb2:	d101      	bne.n	8001bb8 <get_object_item+0x20>
    {
        return NULL;
 8001bb4:	2300      	movs	r3, #0
 8001bb6:	e033      	b.n	8001c20 <get_object_item+0x88>
    }

    current_element = object->child;
 8001bb8:	68fb      	ldr	r3, [r7, #12]
 8001bba:	689b      	ldr	r3, [r3, #8]
 8001bbc:	617b      	str	r3, [r7, #20]
    if (case_sensitive)
 8001bbe:	687b      	ldr	r3, [r7, #4]
 8001bc0:	2b00      	cmp	r3, #0
 8001bc2:	d017      	beq.n	8001bf4 <get_object_item+0x5c>
    {
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bc4:	e002      	b.n	8001bcc <get_object_item+0x34>
        {
            current_element = current_element->next;
 8001bc6:	697b      	ldr	r3, [r7, #20]
 8001bc8:	681b      	ldr	r3, [r3, #0]
 8001bca:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (current_element->string != NULL) && (strcmp(name, current_element->string) != 0))
 8001bcc:	697b      	ldr	r3, [r7, #20]
 8001bce:	2b00      	cmp	r3, #0
 8001bd0:	d01c      	beq.n	8001c0c <get_object_item+0x74>
 8001bd2:	697b      	ldr	r3, [r7, #20]
 8001bd4:	6a1b      	ldr	r3, [r3, #32]
 8001bd6:	2b00      	cmp	r3, #0
 8001bd8:	d018      	beq.n	8001c0c <get_object_item+0x74>
 8001bda:	697b      	ldr	r3, [r7, #20]
 8001bdc:	6a1b      	ldr	r3, [r3, #32]
 8001bde:	4619      	mov	r1, r3
 8001be0:	68b8      	ldr	r0, [r7, #8]
 8001be2:	f7fe fb7d 	bl	80002e0 <strcmp>
 8001be6:	4603      	mov	r3, r0
 8001be8:	2b00      	cmp	r3, #0
 8001bea:	d1ec      	bne.n	8001bc6 <get_object_item+0x2e>
 8001bec:	e00e      	b.n	8001c0c <get_object_item+0x74>
    }
    else
    {
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
        {
            current_element = current_element->next;
 8001bee:	697b      	ldr	r3, [r7, #20]
 8001bf0:	681b      	ldr	r3, [r3, #0]
 8001bf2:	617b      	str	r3, [r7, #20]
        while ((current_element != NULL) && (case_insensitive_strcmp((const unsigned char*)name, (const unsigned char*)(current_element->string)) != 0))
 8001bf4:	697b      	ldr	r3, [r7, #20]
 8001bf6:	2b00      	cmp	r3, #0
 8001bf8:	d008      	beq.n	8001c0c <get_object_item+0x74>
 8001bfa:	697b      	ldr	r3, [r7, #20]
 8001bfc:	6a1b      	ldr	r3, [r3, #32]
 8001bfe:	4619      	mov	r1, r3
 8001c00:	68b8      	ldr	r0, [r7, #8]
 8001c02:	f7fe ff41 	bl	8000a88 <case_insensitive_strcmp>
 8001c06:	4603      	mov	r3, r0
 8001c08:	2b00      	cmp	r3, #0
 8001c0a:	d1f0      	bne.n	8001bee <get_object_item+0x56>
        }
    }

    if ((current_element == NULL) || (current_element->string == NULL)) {
 8001c0c:	697b      	ldr	r3, [r7, #20]
 8001c0e:	2b00      	cmp	r3, #0
 8001c10:	d003      	beq.n	8001c1a <get_object_item+0x82>
 8001c12:	697b      	ldr	r3, [r7, #20]
 8001c14:	6a1b      	ldr	r3, [r3, #32]
 8001c16:	2b00      	cmp	r3, #0
 8001c18:	d101      	bne.n	8001c1e <get_object_item+0x86>
        return NULL;
 8001c1a:	2300      	movs	r3, #0
 8001c1c:	e000      	b.n	8001c20 <get_object_item+0x88>
    }

    return current_element;
 8001c1e:	697b      	ldr	r3, [r7, #20]
}
 8001c20:	4618      	mov	r0, r3
 8001c22:	3718      	adds	r7, #24
 8001c24:	46bd      	mov	sp, r7
 8001c26:	bd80      	pop	{r7, pc}

08001c28 <cJSON_GetObjectItemCaseSensitive>:
{
    return get_object_item(object, string, false);
}

CJSON_PUBLIC(cJSON *) cJSON_GetObjectItemCaseSensitive(const cJSON * const object, const char * const string)
{
 8001c28:	b580      	push	{r7, lr}
 8001c2a:	b082      	sub	sp, #8
 8001c2c:	af00      	add	r7, sp, #0
 8001c2e:	6078      	str	r0, [r7, #4]
 8001c30:	6039      	str	r1, [r7, #0]
    return get_object_item(object, string, true);
 8001c32:	2201      	movs	r2, #1
 8001c34:	6839      	ldr	r1, [r7, #0]
 8001c36:	6878      	ldr	r0, [r7, #4]
 8001c38:	f7ff ffae 	bl	8001b98 <get_object_item>
 8001c3c:	4603      	mov	r3, r0
}
 8001c3e:	4618      	mov	r0, r3
 8001c40:	3708      	adds	r7, #8
 8001c42:	46bd      	mov	sp, r7
 8001c44:	bd80      	pop	{r7, pc}

08001c46 <cJSON_IsNumber>:

    return (item->type & 0xFF) == cJSON_NULL;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsNumber(const cJSON * const item)
{
 8001c46:	b480      	push	{r7}
 8001c48:	b083      	sub	sp, #12
 8001c4a:	af00      	add	r7, sp, #0
 8001c4c:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c4e:	687b      	ldr	r3, [r7, #4]
 8001c50:	2b00      	cmp	r3, #0
 8001c52:	d101      	bne.n	8001c58 <cJSON_IsNumber+0x12>
    {
        return false;
 8001c54:	2300      	movs	r3, #0
 8001c56:	e007      	b.n	8001c68 <cJSON_IsNumber+0x22>
    }

    return (item->type & 0xFF) == cJSON_Number;
 8001c58:	687b      	ldr	r3, [r7, #4]
 8001c5a:	68db      	ldr	r3, [r3, #12]
 8001c5c:	b2db      	uxtb	r3, r3
 8001c5e:	2b08      	cmp	r3, #8
 8001c60:	bf0c      	ite	eq
 8001c62:	2301      	moveq	r3, #1
 8001c64:	2300      	movne	r3, #0
 8001c66:	b2db      	uxtb	r3, r3
}
 8001c68:	4618      	mov	r0, r3
 8001c6a:	370c      	adds	r7, #12
 8001c6c:	46bd      	mov	sp, r7
 8001c6e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001c72:	4770      	bx	lr

08001c74 <cJSON_IsArray>:

    return (item->type & 0xFF) == cJSON_String;
}

CJSON_PUBLIC(cJSON_bool) cJSON_IsArray(const cJSON * const item)
{
 8001c74:	b480      	push	{r7}
 8001c76:	b083      	sub	sp, #12
 8001c78:	af00      	add	r7, sp, #0
 8001c7a:	6078      	str	r0, [r7, #4]
    if (item == NULL)
 8001c7c:	687b      	ldr	r3, [r7, #4]
 8001c7e:	2b00      	cmp	r3, #0
 8001c80:	d101      	bne.n	8001c86 <cJSON_IsArray+0x12>
    {
        return false;
 8001c82:	2300      	movs	r3, #0
 8001c84:	e007      	b.n	8001c96 <cJSON_IsArray+0x22>
    }

    return (item->type & 0xFF) == cJSON_Array;
 8001c86:	687b      	ldr	r3, [r7, #4]
 8001c88:	68db      	ldr	r3, [r3, #12]
 8001c8a:	b2db      	uxtb	r3, r3
 8001c8c:	2b20      	cmp	r3, #32
 8001c8e:	bf0c      	ite	eq
 8001c90:	2301      	moveq	r3, #1
 8001c92:	2300      	movne	r3, #0
 8001c94:	b2db      	uxtb	r3, r3
}
 8001c96:	4618      	mov	r0, r3
 8001c98:	370c      	adds	r7, #12
 8001c9a:	46bd      	mov	sp, r7
 8001c9c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001ca0:	4770      	bx	lr

08001ca2 <vApplicationStackOverflowHook>:
/* Hook prototypes */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName);

/* USER CODE BEGIN 4 */
void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName)
{
 8001ca2:	b480      	push	{r7}
 8001ca4:	b083      	sub	sp, #12
 8001ca6:	af00      	add	r7, sp, #0
 8001ca8:	6078      	str	r0, [r7, #4]
 8001caa:	6039      	str	r1, [r7, #0]
   /* Run time stack overflow checking is performed if
   configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is
   called if a stack overflow is detected. */
}
 8001cac:	bf00      	nop
 8001cae:	370c      	adds	r7, #12
 8001cb0:	46bd      	mov	sp, r7
 8001cb2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001cb6:	4770      	bx	lr

08001cb8 <__NVIC_SystemReset>:
/**
  \brief   System Reset
  \details Initiates a system reset request to reset the MCU.
 */
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
 8001cb8:	b480      	push	{r7}
 8001cba:	af00      	add	r7, sp, #0
  \details Acts as a special kind of Data Memory Barrier.
           It completes when all explicit memory accesses before this instruction complete.
 */
__STATIC_FORCEINLINE void __DSB(void)
{
  __ASM volatile ("dsb 0xF":::"memory");
 8001cbc:	f3bf 8f4f 	dsb	sy
}
 8001cc0:	bf00      	nop
  __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                       buffered write are completed before reset */
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 8001cc2:	4b06      	ldr	r3, [pc, #24]	@ (8001cdc <__NVIC_SystemReset+0x24>)
 8001cc4:	68db      	ldr	r3, [r3, #12]
 8001cc6:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 8001cca:	4904      	ldr	r1, [pc, #16]	@ (8001cdc <__NVIC_SystemReset+0x24>)
 8001ccc:	4b04      	ldr	r3, [pc, #16]	@ (8001ce0 <__NVIC_SystemReset+0x28>)
 8001cce:	4313      	orrs	r3, r2
 8001cd0:	60cb      	str	r3, [r1, #12]
  __ASM volatile ("dsb 0xF":::"memory");
 8001cd2:	f3bf 8f4f 	dsb	sy
}
 8001cd6:	bf00      	nop
                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
  __DSB();                                                          /* Ensure completion of memory access */

  for(;;)                                                           /* wait until reset */
  {
    __NOP();
 8001cd8:	bf00      	nop
 8001cda:	e7fd      	b.n	8001cd8 <__NVIC_SystemReset+0x20>
 8001cdc:	e000ed00 	.word	0xe000ed00
 8001ce0:	05fa0004 	.word	0x05fa0004

08001ce4 <ITM_SendChar>:
           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
  \param [in]     ch  Character to transmit.
  \returns            Character to transmit.
 */
__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
{
 8001ce4:	b480      	push	{r7}
 8001ce6:	b083      	sub	sp, #12
 8001ce8:	af00      	add	r7, sp, #0
 8001cea:	6078      	str	r0, [r7, #4]
  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
 8001cec:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8001cf0:	f8d3 3e80 	ldr.w	r3, [r3, #3712]	@ 0xe80
 8001cf4:	f003 0301 	and.w	r3, r3, #1
 8001cf8:	2b00      	cmp	r3, #0
 8001cfa:	d013      	beq.n	8001d24 <ITM_SendChar+0x40>
      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
 8001cfc:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8001d00:	f8d3 3e00 	ldr.w	r3, [r3, #3584]	@ 0xe00
 8001d04:	f003 0301 	and.w	r3, r3, #1
  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
 8001d08:	2b00      	cmp	r3, #0
 8001d0a:	d00b      	beq.n	8001d24 <ITM_SendChar+0x40>
  {
    while (ITM->PORT[0U].u32 == 0UL)
 8001d0c:	e000      	b.n	8001d10 <ITM_SendChar+0x2c>
    {
      __NOP();
 8001d0e:	bf00      	nop
    while (ITM->PORT[0U].u32 == 0UL)
 8001d10:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8001d14:	681b      	ldr	r3, [r3, #0]
 8001d16:	2b00      	cmp	r3, #0
 8001d18:	d0f9      	beq.n	8001d0e <ITM_SendChar+0x2a>
    }
    ITM->PORT[0U].u8 = (uint8_t)ch;
 8001d1a:	f04f 4360 	mov.w	r3, #3758096384	@ 0xe0000000
 8001d1e:	687a      	ldr	r2, [r7, #4]
 8001d20:	b2d2      	uxtb	r2, r2
 8001d22:	701a      	strb	r2, [r3, #0]
  }
  return (ch);
 8001d24:	687b      	ldr	r3, [r7, #4]
}
 8001d26:	4618      	mov	r0, r3
 8001d28:	370c      	adds	r7, #12
 8001d2a:	46bd      	mov	sp, r7
 8001d2c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001d30:	4770      	bx	lr

08001d32 <__io_putchar>:
//{
//	printf("DMA callback\n");
//}

int __io_putchar(int ch)
{
 8001d32:	b580      	push	{r7, lr}
 8001d34:	b082      	sub	sp, #8
 8001d36:	af00      	add	r7, sp, #0
 8001d38:	6078      	str	r0, [r7, #4]
#ifdef UART_TASK_LOGS
//  HAL_UART_Transmit(&huart8, (uint8_t *)&ch, 1, 0xFFFF); // Use UART8 as debug interface
  ITM_SendChar(ch);	// Use SWV as debug interface
 8001d3a:	687b      	ldr	r3, [r7, #4]
 8001d3c:	4618      	mov	r0, r3
 8001d3e:	f7ff ffd1 	bl	8001ce4 <ITM_SendChar>
#endif
  return ch;
 8001d42:	687b      	ldr	r3, [r7, #4]
}
 8001d44:	4618      	mov	r0, r3
 8001d46:	3708      	adds	r7, #8
 8001d48:	46bd      	mov	sp, r7
 8001d4a:	bd80      	pop	{r7, pc}

08001d4c <main>:
/**
  * @brief  The application entry point.
  * @retval int
  */
int main(void)
{
 8001d4c:	b580      	push	{r7, lr}
 8001d4e:	b084      	sub	sp, #16
 8001d50:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN 1 */

  /* USER CODE END 1 */

  /* MPU Configuration--------------------------------------------------------*/
  MPU_Config();
 8001d52:	f000 fc8d 	bl	8002670 <MPU_Config>
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001d56:	4b5f      	ldr	r3, [pc, #380]	@ (8001ed4 <main+0x188>)
 8001d58:	695b      	ldr	r3, [r3, #20]
 8001d5a:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8001d5e:	2b00      	cmp	r3, #0
 8001d60:	d11b      	bne.n	8001d9a <main+0x4e>
  __ASM volatile ("dsb 0xF":::"memory");
 8001d62:	f3bf 8f4f 	dsb	sy
}
 8001d66:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d68:	f3bf 8f6f 	isb	sy
}
 8001d6c:	bf00      	nop
    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
 8001d6e:	4b59      	ldr	r3, [pc, #356]	@ (8001ed4 <main+0x188>)
 8001d70:	2200      	movs	r2, #0
 8001d72:	f8c3 2250 	str.w	r2, [r3, #592]	@ 0x250
  __ASM volatile ("dsb 0xF":::"memory");
 8001d76:	f3bf 8f4f 	dsb	sy
}
 8001d7a:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d7c:	f3bf 8f6f 	isb	sy
}
 8001d80:	bf00      	nop
    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
 8001d82:	4b54      	ldr	r3, [pc, #336]	@ (8001ed4 <main+0x188>)
 8001d84:	695b      	ldr	r3, [r3, #20]
 8001d86:	4a53      	ldr	r2, [pc, #332]	@ (8001ed4 <main+0x188>)
 8001d88:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8001d8c:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001d8e:	f3bf 8f4f 	dsb	sy
}
 8001d92:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001d94:	f3bf 8f6f 	isb	sy
}
 8001d98:	e000      	b.n	8001d9c <main+0x50>
    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
 8001d9a:	bf00      	nop
    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001d9c:	4b4d      	ldr	r3, [pc, #308]	@ (8001ed4 <main+0x188>)
 8001d9e:	695b      	ldr	r3, [r3, #20]
 8001da0:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8001da4:	2b00      	cmp	r3, #0
 8001da6:	d138      	bne.n	8001e1a <main+0xce>
    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
 8001da8:	4b4a      	ldr	r3, [pc, #296]	@ (8001ed4 <main+0x188>)
 8001daa:	2200      	movs	r2, #0
 8001dac:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  __ASM volatile ("dsb 0xF":::"memory");
 8001db0:	f3bf 8f4f 	dsb	sy
}
 8001db4:	bf00      	nop
    ccsidr = SCB->CCSIDR;
 8001db6:	4b47      	ldr	r3, [pc, #284]	@ (8001ed4 <main+0x188>)
 8001db8:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 8001dbc:	60fb      	str	r3, [r7, #12]
    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
 8001dbe:	68fb      	ldr	r3, [r7, #12]
 8001dc0:	0b5b      	lsrs	r3, r3, #13
 8001dc2:	f3c3 030e 	ubfx	r3, r3, #0, #15
 8001dc6:	60bb      	str	r3, [r7, #8]
      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
 8001dc8:	68fb      	ldr	r3, [r7, #12]
 8001dca:	08db      	lsrs	r3, r3, #3
 8001dcc:	f3c3 0309 	ubfx	r3, r3, #0, #10
 8001dd0:	607b      	str	r3, [r7, #4]
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001dd2:	68bb      	ldr	r3, [r7, #8]
 8001dd4:	015a      	lsls	r2, r3, #5
 8001dd6:	f643 73e0 	movw	r3, #16352	@ 0x3fe0
 8001dda:	4013      	ands	r3, r2
                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
 8001ddc:	687a      	ldr	r2, [r7, #4]
 8001dde:	0792      	lsls	r2, r2, #30
        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
 8001de0:	493c      	ldr	r1, [pc, #240]	@ (8001ed4 <main+0x188>)
 8001de2:	4313      	orrs	r3, r2
 8001de4:	f8c1 3260 	str.w	r3, [r1, #608]	@ 0x260
      } while (ways-- != 0U);
 8001de8:	687b      	ldr	r3, [r7, #4]
 8001dea:	1e5a      	subs	r2, r3, #1
 8001dec:	607a      	str	r2, [r7, #4]
 8001dee:	2b00      	cmp	r3, #0
 8001df0:	d1ef      	bne.n	8001dd2 <main+0x86>
    } while(sets-- != 0U);
 8001df2:	68bb      	ldr	r3, [r7, #8]
 8001df4:	1e5a      	subs	r2, r3, #1
 8001df6:	60ba      	str	r2, [r7, #8]
 8001df8:	2b00      	cmp	r3, #0
 8001dfa:	d1e5      	bne.n	8001dc8 <main+0x7c>
  __ASM volatile ("dsb 0xF":::"memory");
 8001dfc:	f3bf 8f4f 	dsb	sy
}
 8001e00:	bf00      	nop
    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
 8001e02:	4b34      	ldr	r3, [pc, #208]	@ (8001ed4 <main+0x188>)
 8001e04:	695b      	ldr	r3, [r3, #20]
 8001e06:	4a33      	ldr	r2, [pc, #204]	@ (8001ed4 <main+0x188>)
 8001e08:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8001e0c:	6153      	str	r3, [r2, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8001e0e:	f3bf 8f4f 	dsb	sy
}
 8001e12:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8001e14:	f3bf 8f6f 	isb	sy
}
 8001e18:	e000      	b.n	8001e1c <main+0xd0>
    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 8001e1a:	bf00      	nop
  SCB_EnableDCache();

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();
 8001e1c:	f003 fd9c 	bl	8005958 <HAL_Init>
  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();
 8001e20:	f000 f87c 	bl	8001f1c <SystemClock_Config>
  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
 8001e24:	f000 fb08 	bl	8002438 <MX_GPIO_Init>
  MX_DMA_Init();
 8001e28:	f000 fade 	bl	80023e8 <MX_DMA_Init>
  MX_UART8_Init();
 8001e2c:	f000 f950 	bl	80020d0 <MX_UART8_Init>
  MX_CRC_Init();
 8001e30:	f000 f8f2 	bl	8002018 <MX_CRC_Init>
  MX_RNG_Init();
 8001e34:	f000 f936 	bl	80020a4 <MX_RNG_Init>
  MX_USART1_UART_Init();
 8001e38:	f000 f996 	bl	8002168 <MX_USART1_UART_Init>
  MX_USART2_UART_Init();
 8001e3c:	f000 f9e4 	bl	8002208 <MX_USART2_UART_Init>
  MX_USART3_UART_Init();
 8001e40:	f000 fa32 	bl	80022a8 <MX_USART3_UART_Init>
  MX_USART6_UART_Init();
 8001e44:	f000 fa80 	bl	8002348 <MX_USART6_UART_Init>
  MX_IWDG1_Init();
 8001e48:	f000 f910 	bl	800206c <MX_IWDG1_Init>

//  HAL_DMA_RegisterCallback(&hdma_uart8_rx, HAL_DMA_XFER_CPLT_CB_ID, dmaCallback);
  /* USER CODE END 2 */

  /* Init scheduler */
  osKernelInitialize();
 8001e4c:	f00f fb06 	bl	801145c <osKernelInitialize>

  /* USER CODE BEGIN RTOS_MUTEX */
  /* add mutexes, ... */
  resMeasurementsMutex = osMutexNew (NULL);
 8001e50:	2000      	movs	r0, #0
 8001e52:	f00f fd12 	bl	801187a <osMutexNew>
 8001e56:	4603      	mov	r3, r0
 8001e58:	4a1f      	ldr	r2, [pc, #124]	@ (8001ed8 <main+0x18c>)
 8001e5a:	6013      	str	r3, [r2, #0]
  sensorsInfoMutex     = osMutexNew (NULL);
 8001e5c:	2000      	movs	r0, #0
 8001e5e:	f00f fd0c 	bl	801187a <osMutexNew>
 8001e62:	4603      	mov	r3, r0
 8001e64:	4a1d      	ldr	r2, [pc, #116]	@ (8001edc <main+0x190>)
 8001e66:	6013      	str	r3, [r2, #0]
  /* add semaphores, ... */
  /* USER CODE END RTOS_SEMAPHORES */

  /* Create the timer(s) */
  /* creation of relay1Timer */
  relay1TimerHandle = osTimerNew(relay1TimerCallback, osTimerOnce, NULL, &relay1Timer_attributes);
 8001e68:	4b1d      	ldr	r3, [pc, #116]	@ (8001ee0 <main+0x194>)
 8001e6a:	2200      	movs	r2, #0
 8001e6c:	2100      	movs	r1, #0
 8001e6e:	481d      	ldr	r0, [pc, #116]	@ (8001ee4 <main+0x198>)
 8001e70:	f00f fc22 	bl	80116b8 <osTimerNew>
 8001e74:	4603      	mov	r3, r0
 8001e76:	4a1c      	ldr	r2, [pc, #112]	@ (8001ee8 <main+0x19c>)
 8001e78:	6013      	str	r3, [r2, #0]

  /* creation of relay2Timer */
  relay2TimerHandle = osTimerNew(relay2TimerCallback, osTimerOnce, NULL, &relay2Timer_attributes);
 8001e7a:	4b1c      	ldr	r3, [pc, #112]	@ (8001eec <main+0x1a0>)
 8001e7c:	2200      	movs	r2, #0
 8001e7e:	2100      	movs	r1, #0
 8001e80:	481b      	ldr	r0, [pc, #108]	@ (8001ef0 <main+0x1a4>)
 8001e82:	f00f fc19 	bl	80116b8 <osTimerNew>
 8001e86:	4603      	mov	r3, r0
 8001e88:	4a1a      	ldr	r2, [pc, #104]	@ (8001ef4 <main+0x1a8>)
 8001e8a:	6013      	str	r3, [r2, #0]

  /* creation of relay3Timer */
  relay3TimerHandle = osTimerNew(relay3TimerCallback, osTimerOnce, NULL, &relay3Timer_attributes);
 8001e8c:	4b1a      	ldr	r3, [pc, #104]	@ (8001ef8 <main+0x1ac>)
 8001e8e:	2200      	movs	r2, #0
 8001e90:	2100      	movs	r1, #0
 8001e92:	481a      	ldr	r0, [pc, #104]	@ (8001efc <main+0x1b0>)
 8001e94:	f00f fc10 	bl	80116b8 <osTimerNew>
 8001e98:	4603      	mov	r3, r0
 8001e9a:	4a19      	ldr	r2, [pc, #100]	@ (8001f00 <main+0x1b4>)
 8001e9c:	6013      	str	r3, [r2, #0]

  /* creation of relay4Timer */
  relay4TimerHandle = osTimerNew(relay4TimerCallback, osTimerOnce, NULL, &relay4Timer_attributes);
 8001e9e:	4b19      	ldr	r3, [pc, #100]	@ (8001f04 <main+0x1b8>)
 8001ea0:	2200      	movs	r2, #0
 8001ea2:	2100      	movs	r1, #0
 8001ea4:	4818      	ldr	r0, [pc, #96]	@ (8001f08 <main+0x1bc>)
 8001ea6:	f00f fc07 	bl	80116b8 <osTimerNew>
 8001eaa:	4603      	mov	r3, r0
 8001eac:	4a17      	ldr	r2, [pc, #92]	@ (8001f0c <main+0x1c0>)
 8001eae:	6013      	str	r3, [r2, #0]
  /* add queues, ... */
  /* USER CODE END RTOS_QUEUES */

  /* Create the thread(s) */
  /* creation of defaultTask */
  defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
 8001eb0:	4a17      	ldr	r2, [pc, #92]	@ (8001f10 <main+0x1c4>)
 8001eb2:	2100      	movs	r1, #0
 8001eb4:	4817      	ldr	r0, [pc, #92]	@ (8001f14 <main+0x1c8>)
 8001eb6:	f00f fb30 	bl	801151a <osThreadNew>
 8001eba:	4603      	mov	r3, r0
 8001ebc:	4a16      	ldr	r2, [pc, #88]	@ (8001f18 <main+0x1cc>)
 8001ebe:	6013      	str	r3, [r2, #0]

  /* USER CODE BEGIN RTOS_THREADS */
  /* add threads, ... */
  mqtt_cli_init();
 8001ec0:	f001 fc6a 	bl	8003798 <mqtt_cli_init>
//  Uart8TasksInit();
  UartTasksInit();
 8001ec4:	f002 fb90 	bl	80045e8 <UartTasksInit>
#ifdef USER_MOCKS
  MockMeasurmetsTaskInit();
#else
  MeasurmentsReqSchedulerTaskInit();
 8001ec8:	f003 fb8c 	bl	80055e4 <MeasurmentsReqSchedulerTaskInit>
  /* USER CODE BEGIN RTOS_EVENTS */
  /* add events, ... */
  /* USER CODE END RTOS_EVENTS */

  /* Start scheduler */
  osKernelStart();
 8001ecc:	f00f faea 	bl	80114a4 <osKernelStart>

  /* We should never get here as control is now taken by the scheduler */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
 8001ed0:	bf00      	nop
 8001ed2:	e7fd      	b.n	8001ed0 <main+0x184>
 8001ed4:	e000ed00 	.word	0xe000ed00
 8001ed8:	24002288 	.word	0x24002288
 8001edc:	2400228c 	.word	0x2400228c
 8001ee0:	08031c2c 	.word	0x08031c2c
 8001ee4:	080025f1 	.word	0x080025f1
 8001ee8:	24000668 	.word	0x24000668
 8001eec:	08031c3c 	.word	0x08031c3c
 8001ef0:	08002611 	.word	0x08002611
 8001ef4:	24000698 	.word	0x24000698
 8001ef8:	08031c4c 	.word	0x08031c4c
 8001efc:	08002631 	.word	0x08002631
 8001f00:	240006c8 	.word	0x240006c8
 8001f04:	08031c5c 	.word	0x08031c5c
 8001f08:	08002651 	.word	0x08002651
 8001f0c:	240006f8 	.word	0x240006f8
 8001f10:	08031c08 	.word	0x08031c08
 8001f14:	080025d1 	.word	0x080025d1
 8001f18:	24000664 	.word	0x24000664

08001f1c <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8001f1c:	b580      	push	{r7, lr}
 8001f1e:	b09c      	sub	sp, #112	@ 0x70
 8001f20:	af00      	add	r7, sp, #0
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8001f22:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001f26:	224c      	movs	r2, #76	@ 0x4c
 8001f28:	2100      	movs	r1, #0
 8001f2a:	4618      	mov	r0, r3
 8001f2c:	f028 ff28 	bl	802ad80 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8001f30:	1d3b      	adds	r3, r7, #4
 8001f32:	2220      	movs	r2, #32
 8001f34:	2100      	movs	r1, #0
 8001f36:	4618      	mov	r0, r3
 8001f38:	f028 ff22 	bl	802ad80 <memset>

  /** Supply configuration update enable
  */
  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
 8001f3c:	2002      	movs	r0, #2
 8001f3e:	f008 fb55 	bl	800a5ec <HAL_PWREx_ConfigSupply>

  /** Configure the main internal regulator output voltage
  */
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 8001f42:	2300      	movs	r3, #0
 8001f44:	603b      	str	r3, [r7, #0]
 8001f46:	4b32      	ldr	r3, [pc, #200]	@ (8002010 <SystemClock_Config+0xf4>)
 8001f48:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001f4a:	4a31      	ldr	r2, [pc, #196]	@ (8002010 <SystemClock_Config+0xf4>)
 8001f4c:	f023 0301 	bic.w	r3, r3, #1
 8001f50:	62d3      	str	r3, [r2, #44]	@ 0x2c
 8001f52:	4b2f      	ldr	r3, [pc, #188]	@ (8002010 <SystemClock_Config+0xf4>)
 8001f54:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8001f56:	f003 0301 	and.w	r3, r3, #1
 8001f5a:	603b      	str	r3, [r7, #0]
 8001f5c:	4b2d      	ldr	r3, [pc, #180]	@ (8002014 <SystemClock_Config+0xf8>)
 8001f5e:	699b      	ldr	r3, [r3, #24]
 8001f60:	4a2c      	ldr	r2, [pc, #176]	@ (8002014 <SystemClock_Config+0xf8>)
 8001f62:	f443 4340 	orr.w	r3, r3, #49152	@ 0xc000
 8001f66:	6193      	str	r3, [r2, #24]
 8001f68:	4b2a      	ldr	r3, [pc, #168]	@ (8002014 <SystemClock_Config+0xf8>)
 8001f6a:	699b      	ldr	r3, [r3, #24]
 8001f6c:	f403 4340 	and.w	r3, r3, #49152	@ 0xc000
 8001f70:	603b      	str	r3, [r7, #0]
 8001f72:	683b      	ldr	r3, [r7, #0]

  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
 8001f74:	bf00      	nop
 8001f76:	4b27      	ldr	r3, [pc, #156]	@ (8002014 <SystemClock_Config+0xf8>)
 8001f78:	699b      	ldr	r3, [r3, #24]
 8001f7a:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8001f7e:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 8001f82:	d1f8      	bne.n	8001f76 <SystemClock_Config+0x5a>

  /** Initializes the RCC Oscillators according to the specified parameters
  * in the RCC_OscInitTypeDef structure.
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_LSI
 8001f84:	2329      	movs	r3, #41	@ 0x29
 8001f86:	627b      	str	r3, [r7, #36]	@ 0x24
                              |RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 8001f88:	f44f 3380 	mov.w	r3, #65536	@ 0x10000
 8001f8c:	62bb      	str	r3, [r7, #40]	@ 0x28
  RCC_OscInitStruct.LSIState = RCC_LSI_ON;
 8001f8e:	2301      	movs	r3, #1
 8001f90:	63bb      	str	r3, [r7, #56]	@ 0x38
  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
 8001f92:	2301      	movs	r3, #1
 8001f94:	63fb      	str	r3, [r7, #60]	@ 0x3c
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8001f96:	2302      	movs	r3, #2
 8001f98:	64bb      	str	r3, [r7, #72]	@ 0x48
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 8001f9a:	2302      	movs	r3, #2
 8001f9c:	64fb      	str	r3, [r7, #76]	@ 0x4c
  RCC_OscInitStruct.PLL.PLLM = 5;
 8001f9e:	2305      	movs	r3, #5
 8001fa0:	653b      	str	r3, [r7, #80]	@ 0x50
  RCC_OscInitStruct.PLL.PLLN = 160;
 8001fa2:	23a0      	movs	r3, #160	@ 0xa0
 8001fa4:	657b      	str	r3, [r7, #84]	@ 0x54
  RCC_OscInitStruct.PLL.PLLP = 2;
 8001fa6:	2302      	movs	r3, #2
 8001fa8:	65bb      	str	r3, [r7, #88]	@ 0x58
  RCC_OscInitStruct.PLL.PLLQ = 2;
 8001faa:	2302      	movs	r3, #2
 8001fac:	65fb      	str	r3, [r7, #92]	@ 0x5c
  RCC_OscInitStruct.PLL.PLLR = 2;
 8001fae:	2302      	movs	r3, #2
 8001fb0:	663b      	str	r3, [r7, #96]	@ 0x60
  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
 8001fb2:	2308      	movs	r3, #8
 8001fb4:	667b      	str	r3, [r7, #100]	@ 0x64
  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
 8001fb6:	2300      	movs	r3, #0
 8001fb8:	66bb      	str	r3, [r7, #104]	@ 0x68
  RCC_OscInitStruct.PLL.PLLFRACN = 0;
 8001fba:	2300      	movs	r3, #0
 8001fbc:	66fb      	str	r3, [r7, #108]	@ 0x6c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8001fbe:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8001fc2:	4618      	mov	r0, r3
 8001fc4:	f008 fbd2 	bl	800a76c <HAL_RCC_OscConfig>
 8001fc8:	4603      	mov	r3, r0
 8001fca:	2b00      	cmp	r3, #0
 8001fcc:	d001      	beq.n	8001fd2 <SystemClock_Config+0xb6>
  {
    Error_Handler();
 8001fce:	f000 fbbf 	bl	8002750 <Error_Handler>
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8001fd2:	233f      	movs	r3, #63	@ 0x3f
 8001fd4:	607b      	str	r3, [r7, #4]
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8001fd6:	2303      	movs	r3, #3
 8001fd8:	60bb      	str	r3, [r7, #8]
  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
 8001fda:	2300      	movs	r3, #0
 8001fdc:	60fb      	str	r3, [r7, #12]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
 8001fde:	2308      	movs	r3, #8
 8001fe0:	613b      	str	r3, [r7, #16]
  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
 8001fe2:	2340      	movs	r3, #64	@ 0x40
 8001fe4:	617b      	str	r3, [r7, #20]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
 8001fe6:	2340      	movs	r3, #64	@ 0x40
 8001fe8:	61bb      	str	r3, [r7, #24]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
 8001fea:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8001fee:	61fb      	str	r3, [r7, #28]
  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
 8001ff0:	2340      	movs	r3, #64	@ 0x40
 8001ff2:	623b      	str	r3, [r7, #32]

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8001ff4:	1d3b      	adds	r3, r7, #4
 8001ff6:	2102      	movs	r1, #2
 8001ff8:	4618      	mov	r0, r3
 8001ffa:	f009 f811 	bl	800b020 <HAL_RCC_ClockConfig>
 8001ffe:	4603      	mov	r3, r0
 8002000:	2b00      	cmp	r3, #0
 8002002:	d001      	beq.n	8002008 <SystemClock_Config+0xec>
  {
    Error_Handler();
 8002004:	f000 fba4 	bl	8002750 <Error_Handler>
  }
}
 8002008:	bf00      	nop
 800200a:	3770      	adds	r7, #112	@ 0x70
 800200c:	46bd      	mov	sp, r7
 800200e:	bd80      	pop	{r7, pc}
 8002010:	58000400 	.word	0x58000400
 8002014:	58024800 	.word	0x58024800

08002018 <MX_CRC_Init>:
  * @brief CRC Initialization Function
  * @param None
  * @retval None
  */
static void MX_CRC_Init(void)
{
 8002018:	b580      	push	{r7, lr}
 800201a:	af00      	add	r7, sp, #0
  /* USER CODE END CRC_Init 0 */

  /* USER CODE BEGIN CRC_Init 1 */

  /* USER CODE END CRC_Init 1 */
  hcrc.Instance = CRC;
 800201c:	4b11      	ldr	r3, [pc, #68]	@ (8002064 <MX_CRC_Init+0x4c>)
 800201e:	4a12      	ldr	r2, [pc, #72]	@ (8002068 <MX_CRC_Init+0x50>)
 8002020:	601a      	str	r2, [r3, #0]
  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE;
 8002022:	4b10      	ldr	r3, [pc, #64]	@ (8002064 <MX_CRC_Init+0x4c>)
 8002024:	2201      	movs	r2, #1
 8002026:	711a      	strb	r2, [r3, #4]
  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
 8002028:	4b0e      	ldr	r3, [pc, #56]	@ (8002064 <MX_CRC_Init+0x4c>)
 800202a:	2200      	movs	r2, #0
 800202c:	715a      	strb	r2, [r3, #5]
  hcrc.Init.GeneratingPolynomial = 4129;
 800202e:	4b0d      	ldr	r3, [pc, #52]	@ (8002064 <MX_CRC_Init+0x4c>)
 8002030:	f241 0221 	movw	r2, #4129	@ 0x1021
 8002034:	609a      	str	r2, [r3, #8]
  hcrc.Init.CRCLength = CRC_POLYLENGTH_16B;
 8002036:	4b0b      	ldr	r3, [pc, #44]	@ (8002064 <MX_CRC_Init+0x4c>)
 8002038:	2208      	movs	r2, #8
 800203a:	60da      	str	r2, [r3, #12]
  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
 800203c:	4b09      	ldr	r3, [pc, #36]	@ (8002064 <MX_CRC_Init+0x4c>)
 800203e:	2200      	movs	r2, #0
 8002040:	615a      	str	r2, [r3, #20]
  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
 8002042:	4b08      	ldr	r3, [pc, #32]	@ (8002064 <MX_CRC_Init+0x4c>)
 8002044:	2200      	movs	r2, #0
 8002046:	619a      	str	r2, [r3, #24]
  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
 8002048:	4b06      	ldr	r3, [pc, #24]	@ (8002064 <MX_CRC_Init+0x4c>)
 800204a:	2201      	movs	r2, #1
 800204c:	621a      	str	r2, [r3, #32]
  if (HAL_CRC_Init(&hcrc) != HAL_OK)
 800204e:	4805      	ldr	r0, [pc, #20]	@ (8002064 <MX_CRC_Init+0x4c>)
 8002050:	f003 fe7a 	bl	8005d48 <HAL_CRC_Init>
 8002054:	4603      	mov	r3, r0
 8002056:	2b00      	cmp	r3, #0
 8002058:	d001      	beq.n	800205e <MX_CRC_Init+0x46>
  {
    Error_Handler();
 800205a:	f000 fb79 	bl	8002750 <Error_Handler>
  }
  /* USER CODE BEGIN CRC_Init 2 */

  /* USER CODE END CRC_Init 2 */

}
 800205e:	bf00      	nop
 8002060:	bd80      	pop	{r7, pc}
 8002062:	bf00      	nop
 8002064:	24000248 	.word	0x24000248
 8002068:	58024c00 	.word	0x58024c00

0800206c <MX_IWDG1_Init>:
  * @brief IWDG1 Initialization Function
  * @param None
  * @retval None
  */
static void MX_IWDG1_Init(void)
{
 800206c:	b580      	push	{r7, lr}
 800206e:	af00      	add	r7, sp, #0
  /* USER CODE END IWDG1_Init 0 */

  /* USER CODE BEGIN IWDG1_Init 1 */

  /* USER CODE END IWDG1_Init 1 */
  hiwdg1.Instance = IWDG1;
 8002070:	4b0a      	ldr	r3, [pc, #40]	@ (800209c <MX_IWDG1_Init+0x30>)
 8002072:	4a0b      	ldr	r2, [pc, #44]	@ (80020a0 <MX_IWDG1_Init+0x34>)
 8002074:	601a      	str	r2, [r3, #0]
  hiwdg1.Init.Prescaler = IWDG_PRESCALER_64;
 8002076:	4b09      	ldr	r3, [pc, #36]	@ (800209c <MX_IWDG1_Init+0x30>)
 8002078:	2204      	movs	r2, #4
 800207a:	605a      	str	r2, [r3, #4]
  hiwdg1.Init.Window = 249;
 800207c:	4b07      	ldr	r3, [pc, #28]	@ (800209c <MX_IWDG1_Init+0x30>)
 800207e:	22f9      	movs	r2, #249	@ 0xf9
 8002080:	60da      	str	r2, [r3, #12]
  hiwdg1.Init.Reload = 249;
 8002082:	4b06      	ldr	r3, [pc, #24]	@ (800209c <MX_IWDG1_Init+0x30>)
 8002084:	22f9      	movs	r2, #249	@ 0xf9
 8002086:	609a      	str	r2, [r3, #8]
  if (HAL_IWDG_Init(&hiwdg1) != HAL_OK)
 8002088:	4804      	ldr	r0, [pc, #16]	@ (800209c <MX_IWDG1_Init+0x30>)
 800208a:	f008 f9c6 	bl	800a41a <HAL_IWDG_Init>
 800208e:	4603      	mov	r3, r0
 8002090:	2b00      	cmp	r3, #0
 8002092:	d001      	beq.n	8002098 <MX_IWDG1_Init+0x2c>
  {
    Error_Handler();
 8002094:	f000 fb5c 	bl	8002750 <Error_Handler>
  }
  /* USER CODE BEGIN IWDG1_Init 2 */

  /* USER CODE END IWDG1_Init 2 */

}
 8002098:	bf00      	nop
 800209a:	bd80      	pop	{r7, pc}
 800209c:	2400026c 	.word	0x2400026c
 80020a0:	58004800 	.word	0x58004800

080020a4 <MX_RNG_Init>:
  * @brief RNG Initialization Function
  * @param None
  * @retval None
  */
static void MX_RNG_Init(void)
{
 80020a4:	b580      	push	{r7, lr}
 80020a6:	af00      	add	r7, sp, #0
  /* USER CODE END RNG_Init 0 */

  /* USER CODE BEGIN RNG_Init 1 */

  /* USER CODE END RNG_Init 1 */
  hrng.Instance = RNG;
 80020a8:	4b07      	ldr	r3, [pc, #28]	@ (80020c8 <MX_RNG_Init+0x24>)
 80020aa:	4a08      	ldr	r2, [pc, #32]	@ (80020cc <MX_RNG_Init+0x28>)
 80020ac:	601a      	str	r2, [r3, #0]
  hrng.Init.ClockErrorDetection = RNG_CED_ENABLE;
 80020ae:	4b06      	ldr	r3, [pc, #24]	@ (80020c8 <MX_RNG_Init+0x24>)
 80020b0:	2200      	movs	r2, #0
 80020b2:	605a      	str	r2, [r3, #4]
  if (HAL_RNG_Init(&hrng) != HAL_OK)
 80020b4:	4804      	ldr	r0, [pc, #16]	@ (80020c8 <MX_RNG_Init+0x24>)
 80020b6:	f00b f991 	bl	800d3dc <HAL_RNG_Init>
 80020ba:	4603      	mov	r3, r0
 80020bc:	2b00      	cmp	r3, #0
 80020be:	d001      	beq.n	80020c4 <MX_RNG_Init+0x20>
  {
    Error_Handler();
 80020c0:	f000 fb46 	bl	8002750 <Error_Handler>
  }
  /* USER CODE BEGIN RNG_Init 2 */

  /* USER CODE END RNG_Init 2 */

}
 80020c4:	bf00      	nop
 80020c6:	bd80      	pop	{r7, pc}
 80020c8:	2400027c 	.word	0x2400027c
 80020cc:	48021800 	.word	0x48021800

080020d0 <MX_UART8_Init>:
  * @brief UART8 Initialization Function
  * @param None
  * @retval None
  */
static void MX_UART8_Init(void)
{
 80020d0:	b580      	push	{r7, lr}
 80020d2:	af00      	add	r7, sp, #0
  /* USER CODE END UART8_Init 0 */

  /* USER CODE BEGIN UART8_Init 1 */

  /* USER CODE END UART8_Init 1 */
  huart8.Instance = UART8;
 80020d4:	4b22      	ldr	r3, [pc, #136]	@ (8002160 <MX_UART8_Init+0x90>)
 80020d6:	4a23      	ldr	r2, [pc, #140]	@ (8002164 <MX_UART8_Init+0x94>)
 80020d8:	601a      	str	r2, [r3, #0]
  huart8.Init.BaudRate = 115200;
 80020da:	4b21      	ldr	r3, [pc, #132]	@ (8002160 <MX_UART8_Init+0x90>)
 80020dc:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 80020e0:	605a      	str	r2, [r3, #4]
  huart8.Init.WordLength = UART_WORDLENGTH_8B;
 80020e2:	4b1f      	ldr	r3, [pc, #124]	@ (8002160 <MX_UART8_Init+0x90>)
 80020e4:	2200      	movs	r2, #0
 80020e6:	609a      	str	r2, [r3, #8]
  huart8.Init.StopBits = UART_STOPBITS_1;
 80020e8:	4b1d      	ldr	r3, [pc, #116]	@ (8002160 <MX_UART8_Init+0x90>)
 80020ea:	2200      	movs	r2, #0
 80020ec:	60da      	str	r2, [r3, #12]
  huart8.Init.Parity = UART_PARITY_NONE;
 80020ee:	4b1c      	ldr	r3, [pc, #112]	@ (8002160 <MX_UART8_Init+0x90>)
 80020f0:	2200      	movs	r2, #0
 80020f2:	611a      	str	r2, [r3, #16]
  huart8.Init.Mode = UART_MODE_TX_RX;
 80020f4:	4b1a      	ldr	r3, [pc, #104]	@ (8002160 <MX_UART8_Init+0x90>)
 80020f6:	220c      	movs	r2, #12
 80020f8:	615a      	str	r2, [r3, #20]
  huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80020fa:	4b19      	ldr	r3, [pc, #100]	@ (8002160 <MX_UART8_Init+0x90>)
 80020fc:	2200      	movs	r2, #0
 80020fe:	619a      	str	r2, [r3, #24]
  huart8.Init.OverSampling = UART_OVERSAMPLING_16;
 8002100:	4b17      	ldr	r3, [pc, #92]	@ (8002160 <MX_UART8_Init+0x90>)
 8002102:	2200      	movs	r2, #0
 8002104:	61da      	str	r2, [r3, #28]
  huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 8002106:	4b16      	ldr	r3, [pc, #88]	@ (8002160 <MX_UART8_Init+0x90>)
 8002108:	2200      	movs	r2, #0
 800210a:	621a      	str	r2, [r3, #32]
  huart8.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 800210c:	4b14      	ldr	r3, [pc, #80]	@ (8002160 <MX_UART8_Init+0x90>)
 800210e:	2200      	movs	r2, #0
 8002110:	625a      	str	r2, [r3, #36]	@ 0x24
  huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 8002112:	4b13      	ldr	r3, [pc, #76]	@ (8002160 <MX_UART8_Init+0x90>)
 8002114:	2200      	movs	r2, #0
 8002116:	629a      	str	r2, [r3, #40]	@ 0x28
  if (HAL_UART_Init(&huart8) != HAL_OK)
 8002118:	4811      	ldr	r0, [pc, #68]	@ (8002160 <MX_UART8_Init+0x90>)
 800211a:	f00b fce5 	bl	800dae8 <HAL_UART_Init>
 800211e:	4603      	mov	r3, r0
 8002120:	2b00      	cmp	r3, #0
 8002122:	d001      	beq.n	8002128 <MX_UART8_Init+0x58>
  {
    Error_Handler();
 8002124:	f000 fb14 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart8, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002128:	2100      	movs	r1, #0
 800212a:	480d      	ldr	r0, [pc, #52]	@ (8002160 <MX_UART8_Init+0x90>)
 800212c:	f00e f985 	bl	801043a <HAL_UARTEx_SetTxFifoThreshold>
 8002130:	4603      	mov	r3, r0
 8002132:	2b00      	cmp	r3, #0
 8002134:	d001      	beq.n	800213a <MX_UART8_Init+0x6a>
  {
    Error_Handler();
 8002136:	f000 fb0b 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart8, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800213a:	2100      	movs	r1, #0
 800213c:	4808      	ldr	r0, [pc, #32]	@ (8002160 <MX_UART8_Init+0x90>)
 800213e:	f00e f9ba 	bl	80104b6 <HAL_UARTEx_SetRxFifoThreshold>
 8002142:	4603      	mov	r3, r0
 8002144:	2b00      	cmp	r3, #0
 8002146:	d001      	beq.n	800214c <MX_UART8_Init+0x7c>
  {
    Error_Handler();
 8002148:	f000 fb02 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart8) != HAL_OK)
 800214c:	4804      	ldr	r0, [pc, #16]	@ (8002160 <MX_UART8_Init+0x90>)
 800214e:	f00e f93b 	bl	80103c8 <HAL_UARTEx_DisableFifoMode>
 8002152:	4603      	mov	r3, r0
 8002154:	2b00      	cmp	r3, #0
 8002156:	d001      	beq.n	800215c <MX_UART8_Init+0x8c>
  {
    Error_Handler();
 8002158:	f000 fafa 	bl	8002750 <Error_Handler>
  }
  /* USER CODE BEGIN UART8_Init 2 */

  /* USER CODE END UART8_Init 2 */

}
 800215c:	bf00      	nop
 800215e:	bd80      	pop	{r7, pc}
 8002160:	24000290 	.word	0x24000290
 8002164:	40007c00 	.word	0x40007c00

08002168 <MX_USART1_UART_Init>:
  * @brief USART1 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART1_UART_Init(void)
{
 8002168:	b580      	push	{r7, lr}
 800216a:	af00      	add	r7, sp, #0
  /* USER CODE END USART1_Init 0 */

  /* USER CODE BEGIN USART1_Init 1 */

  /* USER CODE END USART1_Init 1 */
  huart1.Instance = USART1;
 800216c:	4b24      	ldr	r3, [pc, #144]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 800216e:	4a25      	ldr	r2, [pc, #148]	@ (8002204 <MX_USART1_UART_Init+0x9c>)
 8002170:	601a      	str	r2, [r3, #0]
  huart1.Init.BaudRate = 115200;
 8002172:	4b23      	ldr	r3, [pc, #140]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 8002174:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8002178:	605a      	str	r2, [r3, #4]
  huart1.Init.WordLength = UART_WORDLENGTH_8B;
 800217a:	4b21      	ldr	r3, [pc, #132]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 800217c:	2200      	movs	r2, #0
 800217e:	609a      	str	r2, [r3, #8]
  huart1.Init.StopBits = UART_STOPBITS_1;
 8002180:	4b1f      	ldr	r3, [pc, #124]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 8002182:	2200      	movs	r2, #0
 8002184:	60da      	str	r2, [r3, #12]
  huart1.Init.Parity = UART_PARITY_NONE;
 8002186:	4b1e      	ldr	r3, [pc, #120]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 8002188:	2200      	movs	r2, #0
 800218a:	611a      	str	r2, [r3, #16]
  huart1.Init.Mode = UART_MODE_TX_RX;
 800218c:	4b1c      	ldr	r3, [pc, #112]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 800218e:	220c      	movs	r2, #12
 8002190:	615a      	str	r2, [r3, #20]
  huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8002192:	4b1b      	ldr	r3, [pc, #108]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 8002194:	2200      	movs	r2, #0
 8002196:	619a      	str	r2, [r3, #24]
  huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 8002198:	4b19      	ldr	r3, [pc, #100]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 800219a:	2200      	movs	r2, #0
 800219c:	61da      	str	r2, [r3, #28]
  huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 800219e:	4b18      	ldr	r3, [pc, #96]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 80021a0:	2200      	movs	r2, #0
 80021a2:	621a      	str	r2, [r3, #32]
  huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 80021a4:	4b16      	ldr	r3, [pc, #88]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 80021a6:	2200      	movs	r2, #0
 80021a8:	625a      	str	r2, [r3, #36]	@ 0x24
  huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 80021aa:	4b15      	ldr	r3, [pc, #84]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 80021ac:	2201      	movs	r2, #1
 80021ae:	629a      	str	r2, [r3, #40]	@ 0x28
  huart1.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 80021b0:	4b13      	ldr	r3, [pc, #76]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 80021b2:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 80021b6:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart1) != HAL_OK)
 80021b8:	4811      	ldr	r0, [pc, #68]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 80021ba:	f00b fc95 	bl	800dae8 <HAL_UART_Init>
 80021be:	4603      	mov	r3, r0
 80021c0:	2b00      	cmp	r3, #0
 80021c2:	d001      	beq.n	80021c8 <MX_USART1_UART_Init+0x60>
  {
    Error_Handler();
 80021c4:	f000 fac4 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 80021c8:	2100      	movs	r1, #0
 80021ca:	480d      	ldr	r0, [pc, #52]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 80021cc:	f00e f935 	bl	801043a <HAL_UARTEx_SetTxFifoThreshold>
 80021d0:	4603      	mov	r3, r0
 80021d2:	2b00      	cmp	r3, #0
 80021d4:	d001      	beq.n	80021da <MX_USART1_UART_Init+0x72>
  {
    Error_Handler();
 80021d6:	f000 fabb 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 80021da:	2100      	movs	r1, #0
 80021dc:	4808      	ldr	r0, [pc, #32]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 80021de:	f00e f96a 	bl	80104b6 <HAL_UARTEx_SetRxFifoThreshold>
 80021e2:	4603      	mov	r3, r0
 80021e4:	2b00      	cmp	r3, #0
 80021e6:	d001      	beq.n	80021ec <MX_USART1_UART_Init+0x84>
  {
    Error_Handler();
 80021e8:	f000 fab2 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
 80021ec:	4804      	ldr	r0, [pc, #16]	@ (8002200 <MX_USART1_UART_Init+0x98>)
 80021ee:	f00e f8eb 	bl	80103c8 <HAL_UARTEx_DisableFifoMode>
 80021f2:	4603      	mov	r3, r0
 80021f4:	2b00      	cmp	r3, #0
 80021f6:	d001      	beq.n	80021fc <MX_USART1_UART_Init+0x94>
  {
    Error_Handler();
 80021f8:	f000 faaa 	bl	8002750 <Error_Handler>
  }
  /* USER CODE BEGIN USART1_Init 2 */

  /* USER CODE END USART1_Init 2 */

}
 80021fc:	bf00      	nop
 80021fe:	bd80      	pop	{r7, pc}
 8002200:	24000324 	.word	0x24000324
 8002204:	40011000 	.word	0x40011000

08002208 <MX_USART2_UART_Init>:
  * @brief USART2 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART2_UART_Init(void)
{
 8002208:	b580      	push	{r7, lr}
 800220a:	af00      	add	r7, sp, #0
  /* USER CODE END USART2_Init 0 */

  /* USER CODE BEGIN USART2_Init 1 */

  /* USER CODE END USART2_Init 1 */
  huart2.Instance = USART2;
 800220c:	4b24      	ldr	r3, [pc, #144]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 800220e:	4a25      	ldr	r2, [pc, #148]	@ (80022a4 <MX_USART2_UART_Init+0x9c>)
 8002210:	601a      	str	r2, [r3, #0]
  huart2.Init.BaudRate = 115200;
 8002212:	4b23      	ldr	r3, [pc, #140]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 8002214:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8002218:	605a      	str	r2, [r3, #4]
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
 800221a:	4b21      	ldr	r3, [pc, #132]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 800221c:	2200      	movs	r2, #0
 800221e:	609a      	str	r2, [r3, #8]
  huart2.Init.StopBits = UART_STOPBITS_1;
 8002220:	4b1f      	ldr	r3, [pc, #124]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 8002222:	2200      	movs	r2, #0
 8002224:	60da      	str	r2, [r3, #12]
  huart2.Init.Parity = UART_PARITY_NONE;
 8002226:	4b1e      	ldr	r3, [pc, #120]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 8002228:	2200      	movs	r2, #0
 800222a:	611a      	str	r2, [r3, #16]
  huart2.Init.Mode = UART_MODE_TX_RX;
 800222c:	4b1c      	ldr	r3, [pc, #112]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 800222e:	220c      	movs	r2, #12
 8002230:	615a      	str	r2, [r3, #20]
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8002232:	4b1b      	ldr	r3, [pc, #108]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 8002234:	2200      	movs	r2, #0
 8002236:	619a      	str	r2, [r3, #24]
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
 8002238:	4b19      	ldr	r3, [pc, #100]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 800223a:	2200      	movs	r2, #0
 800223c:	61da      	str	r2, [r3, #28]
  huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 800223e:	4b18      	ldr	r3, [pc, #96]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 8002240:	2200      	movs	r2, #0
 8002242:	621a      	str	r2, [r3, #32]
  huart2.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002244:	4b16      	ldr	r3, [pc, #88]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 8002246:	2200      	movs	r2, #0
 8002248:	625a      	str	r2, [r3, #36]	@ 0x24
  huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 800224a:	4b15      	ldr	r3, [pc, #84]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 800224c:	2201      	movs	r2, #1
 800224e:	629a      	str	r2, [r3, #40]	@ 0x28
  huart2.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 8002250:	4b13      	ldr	r3, [pc, #76]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 8002252:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8002256:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart2) != HAL_OK)
 8002258:	4811      	ldr	r0, [pc, #68]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 800225a:	f00b fc45 	bl	800dae8 <HAL_UART_Init>
 800225e:	4603      	mov	r3, r0
 8002260:	2b00      	cmp	r3, #0
 8002262:	d001      	beq.n	8002268 <MX_USART2_UART_Init+0x60>
  {
    Error_Handler();
 8002264:	f000 fa74 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart2, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002268:	2100      	movs	r1, #0
 800226a:	480d      	ldr	r0, [pc, #52]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 800226c:	f00e f8e5 	bl	801043a <HAL_UARTEx_SetTxFifoThreshold>
 8002270:	4603      	mov	r3, r0
 8002272:	2b00      	cmp	r3, #0
 8002274:	d001      	beq.n	800227a <MX_USART2_UART_Init+0x72>
  {
    Error_Handler();
 8002276:	f000 fa6b 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart2, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800227a:	2100      	movs	r1, #0
 800227c:	4808      	ldr	r0, [pc, #32]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 800227e:	f00e f91a 	bl	80104b6 <HAL_UARTEx_SetRxFifoThreshold>
 8002282:	4603      	mov	r3, r0
 8002284:	2b00      	cmp	r3, #0
 8002286:	d001      	beq.n	800228c <MX_USART2_UART_Init+0x84>
  {
    Error_Handler();
 8002288:	f000 fa62 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart2) != HAL_OK)
 800228c:	4804      	ldr	r0, [pc, #16]	@ (80022a0 <MX_USART2_UART_Init+0x98>)
 800228e:	f00e f89b 	bl	80103c8 <HAL_UARTEx_DisableFifoMode>
 8002292:	4603      	mov	r3, r0
 8002294:	2b00      	cmp	r3, #0
 8002296:	d001      	beq.n	800229c <MX_USART2_UART_Init+0x94>
  {
    Error_Handler();
 8002298:	f000 fa5a 	bl	8002750 <Error_Handler>
  }
  /* USER CODE BEGIN USART2_Init 2 */

  /* USER CODE END USART2_Init 2 */

}
 800229c:	bf00      	nop
 800229e:	bd80      	pop	{r7, pc}
 80022a0:	240003b8 	.word	0x240003b8
 80022a4:	40004400 	.word	0x40004400

080022a8 <MX_USART3_UART_Init>:
  * @brief USART3 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART3_UART_Init(void)
{
 80022a8:	b580      	push	{r7, lr}
 80022aa:	af00      	add	r7, sp, #0
  /* USER CODE END USART3_Init 0 */

  /* USER CODE BEGIN USART3_Init 1 */

  /* USER CODE END USART3_Init 1 */
  huart3.Instance = USART3;
 80022ac:	4b24      	ldr	r3, [pc, #144]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022ae:	4a25      	ldr	r2, [pc, #148]	@ (8002344 <MX_USART3_UART_Init+0x9c>)
 80022b0:	601a      	str	r2, [r3, #0]
  huart3.Init.BaudRate = 115200;
 80022b2:	4b23      	ldr	r3, [pc, #140]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022b4:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 80022b8:	605a      	str	r2, [r3, #4]
  huart3.Init.WordLength = UART_WORDLENGTH_8B;
 80022ba:	4b21      	ldr	r3, [pc, #132]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022bc:	2200      	movs	r2, #0
 80022be:	609a      	str	r2, [r3, #8]
  huart3.Init.StopBits = UART_STOPBITS_1;
 80022c0:	4b1f      	ldr	r3, [pc, #124]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022c2:	2200      	movs	r2, #0
 80022c4:	60da      	str	r2, [r3, #12]
  huart3.Init.Parity = UART_PARITY_NONE;
 80022c6:	4b1e      	ldr	r3, [pc, #120]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022c8:	2200      	movs	r2, #0
 80022ca:	611a      	str	r2, [r3, #16]
  huart3.Init.Mode = UART_MODE_TX_RX;
 80022cc:	4b1c      	ldr	r3, [pc, #112]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022ce:	220c      	movs	r2, #12
 80022d0:	615a      	str	r2, [r3, #20]
  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 80022d2:	4b1b      	ldr	r3, [pc, #108]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022d4:	2200      	movs	r2, #0
 80022d6:	619a      	str	r2, [r3, #24]
  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
 80022d8:	4b19      	ldr	r3, [pc, #100]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022da:	2200      	movs	r2, #0
 80022dc:	61da      	str	r2, [r3, #28]
  huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 80022de:	4b18      	ldr	r3, [pc, #96]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022e0:	2200      	movs	r2, #0
 80022e2:	621a      	str	r2, [r3, #32]
  huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 80022e4:	4b16      	ldr	r3, [pc, #88]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022e6:	2200      	movs	r2, #0
 80022e8:	625a      	str	r2, [r3, #36]	@ 0x24
  huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 80022ea:	4b15      	ldr	r3, [pc, #84]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022ec:	2201      	movs	r2, #1
 80022ee:	629a      	str	r2, [r3, #40]	@ 0x28
  huart3.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 80022f0:	4b13      	ldr	r3, [pc, #76]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022f2:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 80022f6:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart3) != HAL_OK)
 80022f8:	4811      	ldr	r0, [pc, #68]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 80022fa:	f00b fbf5 	bl	800dae8 <HAL_UART_Init>
 80022fe:	4603      	mov	r3, r0
 8002300:	2b00      	cmp	r3, #0
 8002302:	d001      	beq.n	8002308 <MX_USART3_UART_Init+0x60>
  {
    Error_Handler();
 8002304:	f000 fa24 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 8002308:	2100      	movs	r1, #0
 800230a:	480d      	ldr	r0, [pc, #52]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 800230c:	f00e f895 	bl	801043a <HAL_UARTEx_SetTxFifoThreshold>
 8002310:	4603      	mov	r3, r0
 8002312:	2b00      	cmp	r3, #0
 8002314:	d001      	beq.n	800231a <MX_USART3_UART_Init+0x72>
  {
    Error_Handler();
 8002316:	f000 fa1b 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 800231a:	2100      	movs	r1, #0
 800231c:	4808      	ldr	r0, [pc, #32]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 800231e:	f00e f8ca 	bl	80104b6 <HAL_UARTEx_SetRxFifoThreshold>
 8002322:	4603      	mov	r3, r0
 8002324:	2b00      	cmp	r3, #0
 8002326:	d001      	beq.n	800232c <MX_USART3_UART_Init+0x84>
  {
    Error_Handler();
 8002328:	f000 fa12 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
 800232c:	4804      	ldr	r0, [pc, #16]	@ (8002340 <MX_USART3_UART_Init+0x98>)
 800232e:	f00e f84b 	bl	80103c8 <HAL_UARTEx_DisableFifoMode>
 8002332:	4603      	mov	r3, r0
 8002334:	2b00      	cmp	r3, #0
 8002336:	d001      	beq.n	800233c <MX_USART3_UART_Init+0x94>
  {
    Error_Handler();
 8002338:	f000 fa0a 	bl	8002750 <Error_Handler>
  }
  /* USER CODE BEGIN USART3_Init 2 */

  /* USER CODE END USART3_Init 2 */

}
 800233c:	bf00      	nop
 800233e:	bd80      	pop	{r7, pc}
 8002340:	2400044c 	.word	0x2400044c
 8002344:	40004800 	.word	0x40004800

08002348 <MX_USART6_UART_Init>:
  * @brief USART6 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART6_UART_Init(void)
{
 8002348:	b580      	push	{r7, lr}
 800234a:	af00      	add	r7, sp, #0
  /* USER CODE END USART6_Init 0 */

  /* USER CODE BEGIN USART6_Init 1 */

  /* USER CODE END USART6_Init 1 */
  huart6.Instance = USART6;
 800234c:	4b24      	ldr	r3, [pc, #144]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 800234e:	4a25      	ldr	r2, [pc, #148]	@ (80023e4 <MX_USART6_UART_Init+0x9c>)
 8002350:	601a      	str	r2, [r3, #0]
  huart6.Init.BaudRate = 115200;
 8002352:	4b23      	ldr	r3, [pc, #140]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 8002354:	f44f 32e1 	mov.w	r2, #115200	@ 0x1c200
 8002358:	605a      	str	r2, [r3, #4]
  huart6.Init.WordLength = UART_WORDLENGTH_8B;
 800235a:	4b21      	ldr	r3, [pc, #132]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 800235c:	2200      	movs	r2, #0
 800235e:	609a      	str	r2, [r3, #8]
  huart6.Init.StopBits = UART_STOPBITS_1;
 8002360:	4b1f      	ldr	r3, [pc, #124]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 8002362:	2200      	movs	r2, #0
 8002364:	60da      	str	r2, [r3, #12]
  huart6.Init.Parity = UART_PARITY_NONE;
 8002366:	4b1e      	ldr	r3, [pc, #120]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 8002368:	2200      	movs	r2, #0
 800236a:	611a      	str	r2, [r3, #16]
  huart6.Init.Mode = UART_MODE_TX_RX;
 800236c:	4b1c      	ldr	r3, [pc, #112]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 800236e:	220c      	movs	r2, #12
 8002370:	615a      	str	r2, [r3, #20]
  huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 8002372:	4b1b      	ldr	r3, [pc, #108]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 8002374:	2200      	movs	r2, #0
 8002376:	619a      	str	r2, [r3, #24]
  huart6.Init.OverSampling = UART_OVERSAMPLING_16;
 8002378:	4b19      	ldr	r3, [pc, #100]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 800237a:	2200      	movs	r2, #0
 800237c:	61da      	str	r2, [r3, #28]
  huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
 800237e:	4b18      	ldr	r3, [pc, #96]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 8002380:	2200      	movs	r2, #0
 8002382:	621a      	str	r2, [r3, #32]
  huart6.Init.ClockPrescaler = UART_PRESCALER_DIV1;
 8002384:	4b16      	ldr	r3, [pc, #88]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 8002386:	2200      	movs	r2, #0
 8002388:	625a      	str	r2, [r3, #36]	@ 0x24
  huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_TXINVERT_INIT;
 800238a:	4b15      	ldr	r3, [pc, #84]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 800238c:	2201      	movs	r2, #1
 800238e:	629a      	str	r2, [r3, #40]	@ 0x28
  huart6.AdvancedInit.TxPinLevelInvert = UART_ADVFEATURE_TXINV_ENABLE;
 8002390:	4b13      	ldr	r3, [pc, #76]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 8002392:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8002396:	62da      	str	r2, [r3, #44]	@ 0x2c
  if (HAL_UART_Init(&huart6) != HAL_OK)
 8002398:	4811      	ldr	r0, [pc, #68]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 800239a:	f00b fba5 	bl	800dae8 <HAL_UART_Init>
 800239e:	4603      	mov	r3, r0
 80023a0:	2b00      	cmp	r3, #0
 80023a2:	d001      	beq.n	80023a8 <MX_USART6_UART_Init+0x60>
  {
    Error_Handler();
 80023a4:	f000 f9d4 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetTxFifoThreshold(&huart6, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
 80023a8:	2100      	movs	r1, #0
 80023aa:	480d      	ldr	r0, [pc, #52]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 80023ac:	f00e f845 	bl	801043a <HAL_UARTEx_SetTxFifoThreshold>
 80023b0:	4603      	mov	r3, r0
 80023b2:	2b00      	cmp	r3, #0
 80023b4:	d001      	beq.n	80023ba <MX_USART6_UART_Init+0x72>
  {
    Error_Handler();
 80023b6:	f000 f9cb 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_SetRxFifoThreshold(&huart6, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
 80023ba:	2100      	movs	r1, #0
 80023bc:	4808      	ldr	r0, [pc, #32]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 80023be:	f00e f87a 	bl	80104b6 <HAL_UARTEx_SetRxFifoThreshold>
 80023c2:	4603      	mov	r3, r0
 80023c4:	2b00      	cmp	r3, #0
 80023c6:	d001      	beq.n	80023cc <MX_USART6_UART_Init+0x84>
  {
    Error_Handler();
 80023c8:	f000 f9c2 	bl	8002750 <Error_Handler>
  }
  if (HAL_UARTEx_DisableFifoMode(&huart6) != HAL_OK)
 80023cc:	4804      	ldr	r0, [pc, #16]	@ (80023e0 <MX_USART6_UART_Init+0x98>)
 80023ce:	f00d fffb 	bl	80103c8 <HAL_UARTEx_DisableFifoMode>
 80023d2:	4603      	mov	r3, r0
 80023d4:	2b00      	cmp	r3, #0
 80023d6:	d001      	beq.n	80023dc <MX_USART6_UART_Init+0x94>
  {
    Error_Handler();
 80023d8:	f000 f9ba 	bl	8002750 <Error_Handler>
  }
  /* USER CODE BEGIN USART6_Init 2 */

  /* USER CODE END USART6_Init 2 */

}
 80023dc:	bf00      	nop
 80023de:	bd80      	pop	{r7, pc}
 80023e0:	240004e0 	.word	0x240004e0
 80023e4:	40011400 	.word	0x40011400

080023e8 <MX_DMA_Init>:

/**
  * Enable DMA controller clock
  */
static void MX_DMA_Init(void)
{
 80023e8:	b580      	push	{r7, lr}
 80023ea:	b082      	sub	sp, #8
 80023ec:	af00      	add	r7, sp, #0

  /* DMA controller clock enable */
  __HAL_RCC_DMA2_CLK_ENABLE();
 80023ee:	4b11      	ldr	r3, [pc, #68]	@ (8002434 <MX_DMA_Init+0x4c>)
 80023f0:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 80023f4:	4a0f      	ldr	r2, [pc, #60]	@ (8002434 <MX_DMA_Init+0x4c>)
 80023f6:	f043 0302 	orr.w	r3, r3, #2
 80023fa:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 80023fe:	4b0d      	ldr	r3, [pc, #52]	@ (8002434 <MX_DMA_Init+0x4c>)
 8002400:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8002404:	f003 0302 	and.w	r3, r3, #2
 8002408:	607b      	str	r3, [r7, #4]
 800240a:	687b      	ldr	r3, [r7, #4]

  /* DMA interrupt init */
  /* DMA2_Stream6_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
 800240c:	2200      	movs	r2, #0
 800240e:	2105      	movs	r1, #5
 8002410:	2045      	movs	r0, #69	@ 0x45
 8002412:	f003 fbf9 	bl	8005c08 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
 8002416:	2045      	movs	r0, #69	@ 0x45
 8002418:	f003 fc10 	bl	8005c3c <HAL_NVIC_EnableIRQ>
  /* DMA2_Stream7_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 5, 0);
 800241c:	2200      	movs	r2, #0
 800241e:	2105      	movs	r1, #5
 8002420:	2046      	movs	r0, #70	@ 0x46
 8002422:	f003 fbf1 	bl	8005c08 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
 8002426:	2046      	movs	r0, #70	@ 0x46
 8002428:	f003 fc08 	bl	8005c3c <HAL_NVIC_EnableIRQ>

}
 800242c:	bf00      	nop
 800242e:	3708      	adds	r7, #8
 8002430:	46bd      	mov	sp, r7
 8002432:	bd80      	pop	{r7, pc}
 8002434:	58024400 	.word	0x58024400

08002438 <MX_GPIO_Init>:
  * @brief GPIO Initialization Function
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
 8002438:	b580      	push	{r7, lr}
 800243a:	b08c      	sub	sp, #48	@ 0x30
 800243c:	af00      	add	r7, sp, #0
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 800243e:	f107 031c 	add.w	r3, r7, #28
 8002442:	2200      	movs	r2, #0
 8002444:	601a      	str	r2, [r3, #0]
 8002446:	605a      	str	r2, [r3, #4]
 8002448:	609a      	str	r2, [r3, #8]
 800244a:	60da      	str	r2, [r3, #12]
 800244c:	611a      	str	r2, [r3, #16]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOE_CLK_ENABLE();
 800244e:	4b5d      	ldr	r3, [pc, #372]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 8002450:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002454:	4a5b      	ldr	r2, [pc, #364]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 8002456:	f043 0310 	orr.w	r3, r3, #16
 800245a:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800245e:	4b59      	ldr	r3, [pc, #356]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 8002460:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002464:	f003 0310 	and.w	r3, r3, #16
 8002468:	61bb      	str	r3, [r7, #24]
 800246a:	69bb      	ldr	r3, [r7, #24]
  __HAL_RCC_GPIOH_CLK_ENABLE();
 800246c:	4b55      	ldr	r3, [pc, #340]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 800246e:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002472:	4a54      	ldr	r2, [pc, #336]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 8002474:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 8002478:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800247c:	4b51      	ldr	r3, [pc, #324]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 800247e:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002482:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8002486:	617b      	str	r3, [r7, #20]
 8002488:	697b      	ldr	r3, [r7, #20]
  __HAL_RCC_GPIOC_CLK_ENABLE();
 800248a:	4b4e      	ldr	r3, [pc, #312]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 800248c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8002490:	4a4c      	ldr	r2, [pc, #304]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 8002492:	f043 0304 	orr.w	r3, r3, #4
 8002496:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800249a:	4b4a      	ldr	r3, [pc, #296]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 800249c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80024a0:	f003 0304 	and.w	r3, r3, #4
 80024a4:	613b      	str	r3, [r7, #16]
 80024a6:	693b      	ldr	r3, [r7, #16]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80024a8:	4b46      	ldr	r3, [pc, #280]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 80024aa:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80024ae:	4a45      	ldr	r2, [pc, #276]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 80024b0:	f043 0301 	orr.w	r3, r3, #1
 80024b4:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80024b8:	4b42      	ldr	r3, [pc, #264]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 80024ba:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80024be:	f003 0301 	and.w	r3, r3, #1
 80024c2:	60fb      	str	r3, [r7, #12]
 80024c4:	68fb      	ldr	r3, [r7, #12]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80024c6:	4b3f      	ldr	r3, [pc, #252]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 80024c8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80024cc:	4a3d      	ldr	r2, [pc, #244]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 80024ce:	f043 0302 	orr.w	r3, r3, #2
 80024d2:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80024d6:	4b3b      	ldr	r3, [pc, #236]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 80024d8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80024dc:	f003 0302 	and.w	r3, r3, #2
 80024e0:	60bb      	str	r3, [r7, #8]
 80024e2:	68bb      	ldr	r3, [r7, #8]
  __HAL_RCC_GPIOD_CLK_ENABLE();
 80024e4:	4b37      	ldr	r3, [pc, #220]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 80024e6:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80024ea:	4a36      	ldr	r2, [pc, #216]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 80024ec:	f043 0308 	orr.w	r3, r3, #8
 80024f0:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80024f4:	4b33      	ldr	r3, [pc, #204]	@ (80025c4 <MX_GPIO_Init+0x18c>)
 80024f6:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80024fa:	f003 0308 	and.w	r3, r3, #8
 80024fe:	607b      	str	r3, [r7, #4]
 8002500:	687b      	ldr	r3, [r7, #4]

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
 8002502:	2200      	movs	r2, #0
 8002504:	213c      	movs	r1, #60	@ 0x3c
 8002506:	4830      	ldr	r0, [pc, #192]	@ (80025c8 <MX_GPIO_Init+0x190>)
 8002508:	f007 ff6e 	bl	800a3e8 <HAL_GPIO_WritePin>

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14, GPIO_PIN_RESET);
 800250c:	2200      	movs	r2, #0
 800250e:	f44f 41f0 	mov.w	r1, #30720	@ 0x7800
 8002512:	482e      	ldr	r0, [pc, #184]	@ (80025cc <MX_GPIO_Init+0x194>)
 8002514:	f007 ff68 	bl	800a3e8 <HAL_GPIO_WritePin>

  /*Configure GPIO pins : PE2 PE3 PE4 PE5 */
  GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5;
 8002518:	233c      	movs	r3, #60	@ 0x3c
 800251a:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800251c:	2301      	movs	r3, #1
 800251e:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8002520:	2300      	movs	r3, #0
 8002522:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8002524:	2300      	movs	r3, #0
 8002526:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8002528:	f107 031c 	add.w	r3, r7, #28
 800252c:	4619      	mov	r1, r3
 800252e:	4826      	ldr	r0, [pc, #152]	@ (80025c8 <MX_GPIO_Init+0x190>)
 8002530:	f007 fd92 	bl	800a058 <HAL_GPIO_Init>

  /*Configure GPIO pins : PD11 PD12 PD13 PD14 */
  GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14;
 8002534:	f44f 43f0 	mov.w	r3, #30720	@ 0x7800
 8002538:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800253a:	2301      	movs	r3, #1
 800253c:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800253e:	2300      	movs	r3, #0
 8002540:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8002542:	2300      	movs	r3, #0
 8002544:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8002546:	f107 031c 	add.w	r3, r7, #28
 800254a:	4619      	mov	r1, r3
 800254c:	481f      	ldr	r0, [pc, #124]	@ (80025cc <MX_GPIO_Init+0x194>)
 800254e:	f007 fd83 	bl	800a058 <HAL_GPIO_Init>

  /*Configure GPIO pins : PD1 PD2 PD4 */
  GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4;
 8002552:	2316      	movs	r3, #22
 8002554:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
 8002556:	2300      	movs	r3, #0
 8002558:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800255a:	2300      	movs	r3, #0
 800255c:	627b      	str	r3, [r7, #36]	@ 0x24
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 800255e:	f107 031c 	add.w	r3, r7, #28
 8002562:	4619      	mov	r1, r3
 8002564:	4819      	ldr	r0, [pc, #100]	@ (80025cc <MX_GPIO_Init+0x194>)
 8002566:	f007 fd77 	bl	800a058 <HAL_GPIO_Init>

/* USER CODE BEGIN MX_GPIO_Init_2 */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5, GPIO_PIN_RESET);
 800256a:	2200      	movs	r2, #0
 800256c:	213c      	movs	r1, #60	@ 0x3c
 800256e:	4816      	ldr	r0, [pc, #88]	@ (80025c8 <MX_GPIO_Init+0x190>)
 8002570:	f007 ff3a 	bl	800a3e8 <HAL_GPIO_WritePin>
  GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
 8002574:	f44f 4340 	mov.w	r3, #49152	@ 0xc000
 8002578:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 800257a:	2301      	movs	r3, #1
 800257c:	623b      	str	r3, [r7, #32]
  GPIO_InitStruct.Pull = GPIO_PULLUP;
 800257e:	2301      	movs	r3, #1
 8002580:	627b      	str	r3, [r7, #36]	@ 0x24
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8002582:	2300      	movs	r3, #0
 8002584:	62bb      	str	r3, [r7, #40]	@ 0x28
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8002586:	f107 031c 	add.w	r3, r7, #28
 800258a:	4619      	mov	r1, r3
 800258c:	480e      	ldr	r0, [pc, #56]	@ (80025c8 <MX_GPIO_Init+0x190>)
 800258e:	f007 fd63 	bl	800a058 <HAL_GPIO_Init>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_RESET);
 8002592:	2200      	movs	r2, #0
 8002594:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 8002598:	480b      	ldr	r0, [pc, #44]	@ (80025c8 <MX_GPIO_Init+0x190>)
 800259a:	f007 ff25 	bl	800a3e8 <HAL_GPIO_WritePin>
  HAL_Delay(100);
 800259e:	2064      	movs	r0, #100	@ 0x64
 80025a0:	f003 fa36 	bl	8005a10 <HAL_Delay>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_14, GPIO_PIN_SET);
 80025a4:	2201      	movs	r2, #1
 80025a6:	f44f 4180 	mov.w	r1, #16384	@ 0x4000
 80025aa:	4807      	ldr	r0, [pc, #28]	@ (80025c8 <MX_GPIO_Init+0x190>)
 80025ac:	f007 ff1c 	bl	800a3e8 <HAL_GPIO_WritePin>
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_15, GPIO_PIN_SET);
 80025b0:	2201      	movs	r2, #1
 80025b2:	f44f 4100 	mov.w	r1, #32768	@ 0x8000
 80025b6:	4804      	ldr	r0, [pc, #16]	@ (80025c8 <MX_GPIO_Init+0x190>)
 80025b8:	f007 ff16 	bl	800a3e8 <HAL_GPIO_WritePin>
/* USER CODE END MX_GPIO_Init_2 */
}
 80025bc:	bf00      	nop
 80025be:	3730      	adds	r7, #48	@ 0x30
 80025c0:	46bd      	mov	sp, r7
 80025c2:	bd80      	pop	{r7, pc}
 80025c4:	58024400 	.word	0x58024400
 80025c8:	58021000 	.word	0x58021000
 80025cc:	58020c00 	.word	0x58020c00

080025d0 <StartDefaultTask>:
  * @param  argument: Not used
  * @retval None
  */
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void *argument)
{
 80025d0:	b580      	push	{r7, lr}
 80025d2:	b082      	sub	sp, #8
 80025d4:	af00      	add	r7, sp, #0
 80025d6:	6078      	str	r0, [r7, #4]
  /* init code for LWIP */
  MX_LWIP_Init();
 80025d8:	f00e f86a 	bl	80106b0 <MX_LWIP_Init>
  /* USER CODE BEGIN 5 */
  /* Infinite loop */
  for(;;)
  {
	HAL_IWDG_Refresh(&hiwdg1);
 80025dc:	4803      	ldr	r0, [pc, #12]	@ (80025ec <StartDefaultTask+0x1c>)
 80025de:	f007 ff6b 	bl	800a4b8 <HAL_IWDG_Refresh>
    osDelay(pdMS_TO_TICKS(100));
 80025e2:	2064      	movs	r0, #100	@ 0x64
 80025e4:	f00f f837 	bl	8011656 <osDelay>
	HAL_IWDG_Refresh(&hiwdg1);
 80025e8:	bf00      	nop
 80025ea:	e7f7      	b.n	80025dc <StartDefaultTask+0xc>
 80025ec:	2400026c 	.word	0x2400026c

080025f0 <relay1TimerCallback>:
  /* USER CODE END 5 */
}

/* relay1TimerCallback function */
void relay1TimerCallback(void *argument)
{
 80025f0:	b580      	push	{r7, lr}
 80025f2:	b082      	sub	sp, #8
 80025f4:	af00      	add	r7, sp, #0
 80025f6:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay1TimerCallback */
	HAL_GPIO_WritePin(GPIOE, GPIO_PIN_5, GPIO_PIN_RESET);
 80025f8:	2200      	movs	r2, #0
 80025fa:	2120      	movs	r1, #32
 80025fc:	4803      	ldr	r0, [pc, #12]	@ (800260c <relay1TimerCallback+0x1c>)
 80025fe:	f007 fef3 	bl	800a3e8 <HAL_GPIO_WritePin>
  /* USER CODE END relay1TimerCallback */
}
 8002602:	bf00      	nop
 8002604:	3708      	adds	r7, #8
 8002606:	46bd      	mov	sp, r7
 8002608:	bd80      	pop	{r7, pc}
 800260a:	bf00      	nop
 800260c:	58021000 	.word	0x58021000

08002610 <relay2TimerCallback>:

/* relay2TimerCallback function */
void relay2TimerCallback(void *argument)
{
 8002610:	b580      	push	{r7, lr}
 8002612:	b082      	sub	sp, #8
 8002614:	af00      	add	r7, sp, #0
 8002616:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay2TimerCallback */
	HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
 8002618:	2200      	movs	r2, #0
 800261a:	2108      	movs	r1, #8
 800261c:	4803      	ldr	r0, [pc, #12]	@ (800262c <relay2TimerCallback+0x1c>)
 800261e:	f007 fee3 	bl	800a3e8 <HAL_GPIO_WritePin>
  /* USER CODE END relay2TimerCallback */
}
 8002622:	bf00      	nop
 8002624:	3708      	adds	r7, #8
 8002626:	46bd      	mov	sp, r7
 8002628:	bd80      	pop	{r7, pc}
 800262a:	bf00      	nop
 800262c:	58021000 	.word	0x58021000

08002630 <relay3TimerCallback>:

/* relay3TimerCallback function */
void relay3TimerCallback(void *argument)
{
 8002630:	b580      	push	{r7, lr}
 8002632:	b082      	sub	sp, #8
 8002634:	af00      	add	r7, sp, #0
 8002636:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay3TimerCallback */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_4, GPIO_PIN_RESET);
 8002638:	2200      	movs	r2, #0
 800263a:	2110      	movs	r1, #16
 800263c:	4803      	ldr	r0, [pc, #12]	@ (800264c <relay3TimerCallback+0x1c>)
 800263e:	f007 fed3 	bl	800a3e8 <HAL_GPIO_WritePin>
  /* USER CODE END relay3TimerCallback */
}
 8002642:	bf00      	nop
 8002644:	3708      	adds	r7, #8
 8002646:	46bd      	mov	sp, r7
 8002648:	bd80      	pop	{r7, pc}
 800264a:	bf00      	nop
 800264c:	58021000 	.word	0x58021000

08002650 <relay4TimerCallback>:

/* relay4TimerCallback function */
void relay4TimerCallback(void *argument)
{
 8002650:	b580      	push	{r7, lr}
 8002652:	b082      	sub	sp, #8
 8002654:	af00      	add	r7, sp, #0
 8002656:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN relay4TimerCallback */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
 8002658:	2200      	movs	r2, #0
 800265a:	2104      	movs	r1, #4
 800265c:	4803      	ldr	r0, [pc, #12]	@ (800266c <relay4TimerCallback+0x1c>)
 800265e:	f007 fec3 	bl	800a3e8 <HAL_GPIO_WritePin>
  /* USER CODE END relay4TimerCallback */
}
 8002662:	bf00      	nop
 8002664:	3708      	adds	r7, #8
 8002666:	46bd      	mov	sp, r7
 8002668:	bd80      	pop	{r7, pc}
 800266a:	bf00      	nop
 800266c:	58021000 	.word	0x58021000

08002670 <MPU_Config>:

 /* MPU Configuration */

void MPU_Config(void)
{
 8002670:	b580      	push	{r7, lr}
 8002672:	b084      	sub	sp, #16
 8002674:	af00      	add	r7, sp, #0
  MPU_Region_InitTypeDef MPU_InitStruct = {0};
 8002676:	463b      	mov	r3, r7
 8002678:	2200      	movs	r2, #0
 800267a:	601a      	str	r2, [r3, #0]
 800267c:	605a      	str	r2, [r3, #4]
 800267e:	609a      	str	r2, [r3, #8]
 8002680:	60da      	str	r2, [r3, #12]

  /* Disables the MPU */
  HAL_MPU_Disable();
 8002682:	f003 fae9 	bl	8005c58 <HAL_MPU_Disable>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
 8002686:	2301      	movs	r3, #1
 8002688:	703b      	strb	r3, [r7, #0]
  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
 800268a:	2300      	movs	r3, #0
 800268c:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x0;
 800268e:	2300      	movs	r3, #0
 8002690:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
 8002692:	231f      	movs	r3, #31
 8002694:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x87;
 8002696:	2387      	movs	r3, #135	@ 0x87
 8002698:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 800269a:	2300      	movs	r3, #0
 800269c:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
 800269e:	2300      	movs	r3, #0
 80026a0:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
 80026a2:	2301      	movs	r3, #1
 80026a4:	733b      	strb	r3, [r7, #12]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 80026a6:	2301      	movs	r3, #1
 80026a8:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
 80026aa:	2300      	movs	r3, #0
 80026ac:	73bb      	strb	r3, [r7, #14]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
 80026ae:	2300      	movs	r3, #0
 80026b0:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80026b2:	463b      	mov	r3, r7
 80026b4:	4618      	mov	r0, r3
 80026b6:	f003 fb07 	bl	8005cc8 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER1;
 80026ba:	2301      	movs	r3, #1
 80026bc:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24020000;
 80026be:	4b13      	ldr	r3, [pc, #76]	@ (800270c <MPU_Config+0x9c>)
 80026c0:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
 80026c2:	2310      	movs	r3, #16
 80026c4:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.SubRegionDisable = 0x0;
 80026c6:	2300      	movs	r3, #0
 80026c8:	727b      	strb	r3, [r7, #9]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
 80026ca:	2301      	movs	r3, #1
 80026cc:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
 80026ce:	2303      	movs	r3, #3
 80026d0:	72fb      	strb	r3, [r7, #11]
  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
 80026d2:	2300      	movs	r3, #0
 80026d4:	737b      	strb	r3, [r7, #13]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80026d6:	463b      	mov	r3, r7
 80026d8:	4618      	mov	r0, r3
 80026da:	f003 faf5 	bl	8005cc8 <HAL_MPU_ConfigRegion>

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Number = MPU_REGION_NUMBER2;
 80026de:	2302      	movs	r3, #2
 80026e0:	707b      	strb	r3, [r7, #1]
  MPU_InitStruct.BaseAddress = 0x24040000;
 80026e2:	4b0b      	ldr	r3, [pc, #44]	@ (8002710 <MPU_Config+0xa0>)
 80026e4:	607b      	str	r3, [r7, #4]
  MPU_InitStruct.Size = MPU_REGION_SIZE_512B;
 80026e6:	2308      	movs	r3, #8
 80026e8:	723b      	strb	r3, [r7, #8]
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
 80026ea:	2300      	movs	r3, #0
 80026ec:	72bb      	strb	r3, [r7, #10]
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
 80026ee:	2301      	movs	r3, #1
 80026f0:	737b      	strb	r3, [r7, #13]
  MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
 80026f2:	2301      	movs	r3, #1
 80026f4:	73fb      	strb	r3, [r7, #15]

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
 80026f6:	463b      	mov	r3, r7
 80026f8:	4618      	mov	r0, r3
 80026fa:	f003 fae5 	bl	8005cc8 <HAL_MPU_ConfigRegion>
  /* Enables the MPU */
  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
 80026fe:	2004      	movs	r0, #4
 8002700:	f003 fac2 	bl	8005c88 <HAL_MPU_Enable>

}
 8002704:	bf00      	nop
 8002706:	3710      	adds	r7, #16
 8002708:	46bd      	mov	sp, r7
 800270a:	bd80      	pop	{r7, pc}
 800270c:	24020000 	.word	0x24020000
 8002710:	24040000 	.word	0x24040000

08002714 <HAL_TIM_PeriodElapsedCallback>:
  * a global variable "uwTick" used as application time base.
  * @param  htim : TIM handle
  * @retval None
  */
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
 8002714:	b580      	push	{r7, lr}
 8002716:	b082      	sub	sp, #8
 8002718:	af00      	add	r7, sp, #0
 800271a:	6078      	str	r0, [r7, #4]
  /* USER CODE BEGIN Callback 0 */

  /* USER CODE END Callback 0 */
  if (htim->Instance == TIM6) {
 800271c:	687b      	ldr	r3, [r7, #4]
 800271e:	681b      	ldr	r3, [r3, #0]
 8002720:	4a09      	ldr	r2, [pc, #36]	@ (8002748 <HAL_TIM_PeriodElapsedCallback+0x34>)
 8002722:	4293      	cmp	r3, r2
 8002724:	d101      	bne.n	800272a <HAL_TIM_PeriodElapsedCallback+0x16>
    HAL_IncTick();
 8002726:	f003 f953 	bl	80059d0 <HAL_IncTick>
  }
  /* USER CODE BEGIN Callback 1 */
  if (htim->Instance == TIM6) {
 800272a:	687b      	ldr	r3, [r7, #4]
 800272c:	681b      	ldr	r3, [r3, #0]
 800272e:	4a06      	ldr	r2, [pc, #24]	@ (8002748 <HAL_TIM_PeriodElapsedCallback+0x34>)
 8002730:	4293      	cmp	r3, r2
 8002732:	d104      	bne.n	800273e <HAL_TIM_PeriodElapsedCallback+0x2a>
    MilliTimer++;
 8002734:	4b05      	ldr	r3, [pc, #20]	@ (800274c <HAL_TIM_PeriodElapsedCallback+0x38>)
 8002736:	681b      	ldr	r3, [r3, #0]
 8002738:	3301      	adds	r3, #1
 800273a:	4a04      	ldr	r2, [pc, #16]	@ (800274c <HAL_TIM_PeriodElapsedCallback+0x38>)
 800273c:	6013      	str	r3, [r2, #0]
  }
  /* USER CODE END Callback 1 */
}
 800273e:	bf00      	nop
 8002740:	3708      	adds	r7, #8
 8002742:	46bd      	mov	sp, r7
 8002744:	bd80      	pop	{r7, pc}
 8002746:	bf00      	nop
 8002748:	40001000 	.word	0x40001000
 800274c:	2402b154 	.word	0x2402b154

08002750 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8002750:	b580      	push	{r7, lr}
 8002752:	af00      	add	r7, sp, #0
  __ASM volatile ("cpsid i" : : : "memory");
 8002754:	b672      	cpsid	i
}
 8002756:	bf00      	nop
  /* USER CODE BEGIN Error_Handler_Debug */
  /* User can add his own implementation to report the HAL error return state */
  __disable_irq();
  NVIC_SystemReset();
 8002758:	f7ff faae 	bl	8001cb8 <__NVIC_SystemReset>

0800275c <__NVIC_SystemReset>:
{
 800275c:	b480      	push	{r7}
 800275e:	af00      	add	r7, sp, #0
  __ASM volatile ("dsb 0xF":::"memory");
 8002760:	f3bf 8f4f 	dsb	sy
}
 8002764:	bf00      	nop
                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
 8002766:	4b06      	ldr	r3, [pc, #24]	@ (8002780 <__NVIC_SystemReset+0x24>)
 8002768:	68db      	ldr	r3, [r3, #12]
 800276a:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
 800276e:	4904      	ldr	r1, [pc, #16]	@ (8002780 <__NVIC_SystemReset+0x24>)
 8002770:	4b04      	ldr	r3, [pc, #16]	@ (8002784 <__NVIC_SystemReset+0x28>)
 8002772:	4313      	orrs	r3, r2
 8002774:	60cb      	str	r3, [r1, #12]
  __ASM volatile ("dsb 0xF":::"memory");
 8002776:	f3bf 8f4f 	dsb	sy
}
 800277a:	bf00      	nop
    __NOP();
 800277c:	bf00      	nop
 800277e:	e7fd      	b.n	800277c <__NVIC_SystemReset+0x20>
 8002780:	e000ed00 	.word	0xe000ed00
 8002784:	05fa0004 	.word	0x05fa0004

08002788 <MqttClientSubTask>:
void MqttClientSubTask (void* argument);    // mqtt client subscribe task function
void MqttClientPubTask (void* argument);    // mqtt client publish task function
uint32_t MqttConnectBroker (void);          // mqtt broker connect function
void MqttMessageArrived (MessageData* msg); // mqtt message callback function

void MqttClientSubTask (void* argument) {
 8002788:	b580      	push	{r7, lr}
 800278a:	b084      	sub	sp, #16
 800278c:	af00      	add	r7, sp, #0
 800278e:	6078      	str	r0, [r7, #4]
	uint8_t connectionTryCounter = 0;
 8002790:	2300      	movs	r3, #0
 8002792:	73fb      	strb	r3, [r7, #15]
    while (1) {
        // waiting for valid ip address
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 8002794:	4b1b      	ldr	r3, [pc, #108]	@ (8002804 <MqttClientSubTask+0x7c>)
 8002796:	685b      	ldr	r3, [r3, #4]
 8002798:	2b00      	cmp	r3, #0
 800279a:	d007      	beq.n	80027ac <MqttClientSubTask+0x24>
 800279c:	4b19      	ldr	r3, [pc, #100]	@ (8002804 <MqttClientSubTask+0x7c>)
 800279e:	689b      	ldr	r3, [r3, #8]
 80027a0:	2b00      	cmp	r3, #0
 80027a2:	d003      	beq.n	80027ac <MqttClientSubTask+0x24>
 80027a4:	4b17      	ldr	r3, [pc, #92]	@ (8002804 <MqttClientSubTask+0x7c>)
 80027a6:	68db      	ldr	r3, [r3, #12]
 80027a8:	2b00      	cmp	r3, #0
 80027aa:	d104      	bne.n	80027b6 <MqttClientSubTask+0x2e>
        {
            osDelay (pdMS_TO_TICKS (1000));
 80027ac:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 80027b0:	f00e ff51 	bl	8011656 <osDelay>
            continue;
 80027b4:	e003      	b.n	80027be <MqttClientSubTask+0x36>
        } else {
            printf ("DHCP/Static IP O.K.\n");
 80027b6:	4814      	ldr	r0, [pc, #80]	@ (8002808 <MqttClientSubTask+0x80>)
 80027b8:	f028 f9b8 	bl	802ab2c <puts>
            break;
 80027bc:	e000      	b.n	80027c0 <MqttClientSubTask+0x38>
        if (gnetif.ip_addr.addr == 0 || gnetif.netmask.addr == 0 || gnetif.gw.addr == 0) // system has no valid ip address
 80027be:	e7e9      	b.n	8002794 <MqttClientSubTask+0xc>
        }
    }

    while (1) {
        if (!mqttClient.isconnected) {
 80027c0:	4b12      	ldr	r3, [pc, #72]	@ (800280c <MqttClientSubTask+0x84>)
 80027c2:	6a1b      	ldr	r3, [r3, #32]
 80027c4:	2b00      	cmp	r3, #0
 80027c6:	d112      	bne.n	80027ee <MqttClientSubTask+0x66>
            // try to connect to the broker
            if (MqttConnectBroker () != MQTT_SUCCESS) {
 80027c8:	f000 fbfc 	bl	8002fc4 <MqttConnectBroker>
 80027cc:	4603      	mov	r3, r0
 80027ce:	2b00      	cmp	r3, #0
 80027d0:	d0f6      	beq.n	80027c0 <MqttClientSubTask+0x38>
                osDelay (pdMS_TO_TICKS (1000));
 80027d2:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 80027d6:	f00e ff3e 	bl	8011656 <osDelay>
                connectionTryCounter++;
 80027da:	7bfb      	ldrb	r3, [r7, #15]
 80027dc:	3301      	adds	r3, #1
 80027de:	73fb      	strb	r3, [r7, #15]
                if (connectionTryCounter > 10)
 80027e0:	7bfb      	ldrb	r3, [r7, #15]
 80027e2:	2b0a      	cmp	r3, #10
 80027e4:	d9ec      	bls.n	80027c0 <MqttClientSubTask+0x38>
  __ASM volatile ("cpsid i" : : : "memory");
 80027e6:	b672      	cpsid	i
}
 80027e8:	bf00      	nop
				{
                	__disable_irq();
                	NVIC_SystemReset();
 80027ea:	f7ff ffb7 	bl	800275c <__NVIC_SystemReset>
				}
            }
        } else {
        	connectionTryCounter = 0;
 80027ee:	2300      	movs	r3, #0
 80027f0:	73fb      	strb	r3, [r7, #15]
            MQTTYield (&mqttClient, 500); // handle timer
 80027f2:	f44f 71fa 	mov.w	r1, #500	@ 0x1f4
 80027f6:	4805      	ldr	r0, [pc, #20]	@ (800280c <MqttClientSubTask+0x84>)
 80027f8:	f025 fa9a 	bl	8027d30 <MQTTYield>
            osDelay (pdMS_TO_TICKS (100));
 80027fc:	2064      	movs	r0, #100	@ 0x64
 80027fe:	f00e ff2a 	bl	8011656 <osDelay>
        if (!mqttClient.isconnected) {
 8002802:	e7dd      	b.n	80027c0 <MqttClientSubTask+0x38>
 8002804:	24002294 	.word	0x24002294
 8002808:	0802d6e8 	.word	0x0802d6e8
 800280c:	24000740 	.word	0x24000740

08002810 <MqttClientPubTask>:
        }
    }
}

void MqttClientPubTask (void* argument) {
 8002810:	b590      	push	{r4, r7, lr}
 8002812:	f5ad 7d19 	sub.w	sp, sp, #612	@ 0x264
 8002816:	af04      	add	r7, sp, #16
 8002818:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 800281c:	f5a3 7313 	sub.w	r3, r3, #588	@ 0x24c
 8002820:	6018      	str	r0, [r3, #0]
    char messageBuffer[512]  = { 0x00 };
 8002822:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002826:	f5a3 7305 	sub.w	r3, r3, #532	@ 0x214
 800282a:	2200      	movs	r2, #0
 800282c:	601a      	str	r2, [r3, #0]
 800282e:	3304      	adds	r3, #4
 8002830:	f44f 72fe 	mov.w	r2, #508	@ 0x1fc
 8002834:	2100      	movs	r1, #0
 8002836:	4618      	mov	r0, r3
 8002838:	f028 faa2 	bl	802ad80 <memset>
    char topicTextBuffer[32] = { 0x00 };
 800283c:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002840:	f5a3 730d 	sub.w	r3, r3, #564	@ 0x234
 8002844:	2200      	movs	r2, #0
 8002846:	601a      	str	r2, [r3, #0]
 8002848:	3304      	adds	r3, #4
 800284a:	2200      	movs	r2, #0
 800284c:	601a      	str	r2, [r3, #0]
 800284e:	605a      	str	r2, [r3, #4]
 8002850:	609a      	str	r2, [r3, #8]
 8002852:	60da      	str	r2, [r3, #12]
 8002854:	611a      	str	r2, [r3, #16]
 8002856:	615a      	str	r2, [r3, #20]
 8002858:	619a      	str	r2, [r3, #24]
    uint32_t bytesInBuffer   = 0;
 800285a:	2300      	movs	r3, #0
 800285c:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
    uint8_t boardNumber      = 0;
 8002860:	2300      	movs	r3, #0
 8002862:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
    MQTTMessage message;

    while (1) {
        if (mqttClient.isconnected) {
 8002866:	4b93      	ldr	r3, [pc, #588]	@ (8002ab4 <MqttClientPubTask+0x2a4>)
 8002868:	6a1b      	ldr	r3, [r3, #32]
 800286a:	2b00      	cmp	r3, #0
 800286c:	f000 839c 	beq.w	8002fa8 <MqttClientPubTask+0x798>
            if (is_link_up ()) {
 8002870:	f00d ff0e 	bl	8010690 <is_link_up>
 8002874:	4603      	mov	r3, r0
 8002876:	2b00      	cmp	r3, #0
 8002878:	f000 8396 	beq.w	8002fa8 <MqttClientPubTask+0x798>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 800287c:	2300      	movs	r3, #0
 800287e:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
 8002882:	e10e      	b.n	8002aa2 <MqttClientPubTask+0x292>
                    osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8002884:	4b8c      	ldr	r3, [pc, #560]	@ (8002ab8 <MqttClientPubTask+0x2a8>)
 8002886:	681b      	ldr	r3, [r3, #0]
 8002888:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 800288c:	4618      	mov	r0, r3
 800288e:	f00f f87a 	bl	8011986 <osMutexAcquire>
                    RESMeasurements* resMeas = &resMeasurements[boardNumber];
 8002892:	f897 224f 	ldrb.w	r2, [r7, #591]	@ 0x24f
 8002896:	4613      	mov	r3, r2
 8002898:	011b      	lsls	r3, r3, #4
 800289a:	1a9b      	subs	r3, r3, r2
 800289c:	009b      	lsls	r3, r3, #2
 800289e:	4a87      	ldr	r2, [pc, #540]	@ (8002abc <MqttClientPubTask+0x2ac>)
 80028a0:	4413      	add	r3, r2
 80028a2:	f8c7 323c 	str.w	r3, [r7, #572]	@ 0x23c
                    sprintf (topicTextBuffer, "RESmeasurments/%d", boardNumber + 1);
 80028a6:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 80028aa:	1c5a      	adds	r2, r3, #1
 80028ac:	f107 031c 	add.w	r3, r7, #28
 80028b0:	4983      	ldr	r1, [pc, #524]	@ (8002ac0 <MqttClientPubTask+0x2b0>)
 80028b2:	4618      	mov	r0, r3
 80028b4:	f028 f942 	bl	802ab3c <siprintf>
                    bytesInBuffer = sprintf (messageBuffer, "{\"voltageRMS\":[%.2f, %.2f, %.2f], ", resMeas->voltageRMS[0], resMeas->voltageRMS[1], resMeas->voltageRMS[2]);
 80028b8:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80028bc:	edd3 7a00 	vldr	s15, [r3]
 80028c0:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 80028c4:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80028c8:	edd3 7a01 	vldr	s15, [r3, #4]
 80028cc:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80028d0:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80028d4:	edd3 6a02 	vldr	s13, [r3, #8]
 80028d8:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 80028dc:	f107 003c 	add.w	r0, r7, #60	@ 0x3c
 80028e0:	ed8d 6b02 	vstr	d6, [sp, #8]
 80028e4:	ed8d 7b00 	vstr	d7, [sp]
 80028e8:	ec53 2b15 	vmov	r2, r3, d5
 80028ec:	4975      	ldr	r1, [pc, #468]	@ (8002ac4 <MqttClientPubTask+0x2b4>)
 80028ee:	f028 f925 	bl	802ab3c <siprintf>
 80028f2:	4603      	mov	r3, r0
 80028f4:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"voltagePeak\":[%.2f, %.2f, %.2f], ", resMeas->voltagePeak[0], resMeas->voltagePeak[1], resMeas->voltagePeak[2]);
 80028f8:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 80028fc:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002900:	18d0      	adds	r0, r2, r3
 8002902:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002906:	edd3 7a03 	vldr	s15, [r3, #12]
 800290a:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 800290e:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002912:	edd3 7a04 	vldr	s15, [r3, #16]
 8002916:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 800291a:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 800291e:	edd3 6a05 	vldr	s13, [r3, #20]
 8002922:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002926:	ed8d 6b02 	vstr	d6, [sp, #8]
 800292a:	ed8d 7b00 	vstr	d7, [sp]
 800292e:	ec53 2b15 	vmov	r2, r3, d5
 8002932:	4965      	ldr	r1, [pc, #404]	@ (8002ac8 <MqttClientPubTask+0x2b8>)
 8002934:	f028 f902 	bl	802ab3c <siprintf>
 8002938:	4603      	mov	r3, r0
 800293a:	461a      	mov	r2, r3
 800293c:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002940:	4413      	add	r3, r2
 8002942:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentRMS\":[%.3f, %.3f, %.3f], ", resMeas->currentRMS[0], resMeas->currentRMS[1], resMeas->currentRMS[2]);
 8002946:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 800294a:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 800294e:	18d0      	adds	r0, r2, r3
 8002950:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002954:	edd3 7a06 	vldr	s15, [r3, #24]
 8002958:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 800295c:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002960:	edd3 7a07 	vldr	s15, [r3, #28]
 8002964:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002968:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 800296c:	edd3 6a08 	vldr	s13, [r3, #32]
 8002970:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002974:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002978:	ed8d 7b00 	vstr	d7, [sp]
 800297c:	ec53 2b15 	vmov	r2, r3, d5
 8002980:	4952      	ldr	r1, [pc, #328]	@ (8002acc <MqttClientPubTask+0x2bc>)
 8002982:	f028 f8db 	bl	802ab3c <siprintf>
 8002986:	4603      	mov	r3, r0
 8002988:	461a      	mov	r2, r3
 800298a:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 800298e:	4413      	add	r3, r2
 8002990:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentPeak\":[%.3f, %.3f, %.3f], ", resMeas->currentPeak[0], resMeas->currentPeak[1], resMeas->currentPeak[2]);
 8002994:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002998:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 800299c:	18d0      	adds	r0, r2, r3
 800299e:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80029a2:	edd3 7a09 	vldr	s15, [r3, #36]	@ 0x24
 80029a6:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 80029aa:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80029ae:	edd3 7a0a 	vldr	s15, [r3, #40]	@ 0x28
 80029b2:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 80029b6:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80029ba:	edd3 6a0b 	vldr	s13, [r3, #44]	@ 0x2c
 80029be:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 80029c2:	ed8d 6b02 	vstr	d6, [sp, #8]
 80029c6:	ed8d 7b00 	vstr	d7, [sp]
 80029ca:	ec53 2b15 	vmov	r2, r3, d5
 80029ce:	4940      	ldr	r1, [pc, #256]	@ (8002ad0 <MqttClientPubTask+0x2c0>)
 80029d0:	f028 f8b4 	bl	802ab3c <siprintf>
 80029d4:	4603      	mov	r3, r0
 80029d6:	461a      	mov	r2, r3
 80029d8:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 80029dc:	4413      	add	r3, r2
 80029de:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"power\":[%.2f, %.2f, %.2f], ", resMeas->power[0], resMeas->power[1], resMeas->power[2]);
 80029e2:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 80029e6:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 80029ea:	18d0      	adds	r0, r2, r3
 80029ec:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80029f0:	edd3 7a0c 	vldr	s15, [r3, #48]	@ 0x30
 80029f4:	eeb7 5ae7 	vcvt.f64.f32	d5, s15
 80029f8:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 80029fc:	edd3 7a0d 	vldr	s15, [r3, #52]	@ 0x34
 8002a00:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002a04:	f8d7 323c 	ldr.w	r3, [r7, #572]	@ 0x23c
 8002a08:	edd3 6a0e 	vldr	s13, [r3, #56]	@ 0x38
 8002a0c:	eeb7 6ae6 	vcvt.f64.f32	d6, s13
 8002a10:	ed8d 6b02 	vstr	d6, [sp, #8]
 8002a14:	ed8d 7b00 	vstr	d7, [sp]
 8002a18:	ec53 2b15 	vmov	r2, r3, d5
 8002a1c:	492d      	ldr	r1, [pc, #180]	@ (8002ad4 <MqttClientPubTask+0x2c4>)
 8002a1e:	f028 f88d 	bl	802ab3c <siprintf>
 8002a22:	4603      	mov	r3, r0
 8002a24:	461a      	mov	r2, r3
 8002a26:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002a2a:	4413      	add	r3, r2
 8002a2c:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"lastSeen\": %ld}", slaveLastSeen[boardNumber]);
 8002a30:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002a34:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002a38:	18d0      	adds	r0, r2, r3
 8002a3a:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002a3e:	4a26      	ldr	r2, [pc, #152]	@ (8002ad8 <MqttClientPubTask+0x2c8>)
 8002a40:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8002a44:	461a      	mov	r2, r3
 8002a46:	4925      	ldr	r1, [pc, #148]	@ (8002adc <MqttClientPubTask+0x2cc>)
 8002a48:	f028 f878 	bl	802ab3c <siprintf>
 8002a4c:	4603      	mov	r3, r0
 8002a4e:	461a      	mov	r2, r3
 8002a50:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002a54:	4413      	add	r3, r2
 8002a56:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    osMutexRelease (resMeasurementsMutex);
 8002a5a:	4b17      	ldr	r3, [pc, #92]	@ (8002ab8 <MqttClientPubTask+0x2a8>)
 8002a5c:	681b      	ldr	r3, [r3, #0]
 8002a5e:	4618      	mov	r0, r3
 8002a60:	f00e ffdc 	bl	8011a1c <osMutexRelease>
                    message.payload    = (void*)messageBuffer;
 8002a64:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002a68:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 8002a6c:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002a70:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 8002a72:	f107 033c 	add.w	r3, r7, #60	@ 0x3c
 8002a76:	4618      	mov	r0, r3
 8002a78:	f7fd fc92 	bl	80003a0 <strlen>
 8002a7c:	4602      	mov	r2, r0
 8002a7e:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002a82:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 8002a86:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 8002a88:	f107 020c 	add.w	r2, r7, #12
 8002a8c:	f107 031c 	add.w	r3, r7, #28
 8002a90:	4619      	mov	r1, r3
 8002a92:	4808      	ldr	r0, [pc, #32]	@ (8002ab4 <MqttClientPubTask+0x2a4>)
 8002a94:	f025 fb6b 	bl	802816e <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8002a98:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002a9c:	3301      	adds	r3, #1
 8002a9e:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
 8002aa2:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002aa6:	2b03      	cmp	r3, #3
 8002aa8:	f67f aeec 	bls.w	8002884 <MqttClientPubTask+0x74>
                }

                for (boardNumber = 0; boardNumber < SLAVES_COUNT + 1; boardNumber++) {
 8002aac:	2300      	movs	r3, #0
 8002aae:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
 8002ab2:	e274      	b.n	8002f9e <MqttClientPubTask+0x78e>
 8002ab4:	24000740 	.word	0x24000740
 8002ab8:	24002288 	.word	0x24002288
 8002abc:	24002098 	.word	0x24002098
 8002ac0:	0802d6fc 	.word	0x0802d6fc
 8002ac4:	0802d710 	.word	0x0802d710
 8002ac8:	0802d734 	.word	0x0802d734
 8002acc:	0802d758 	.word	0x0802d758
 8002ad0:	0802d77c 	.word	0x0802d77c
 8002ad4:	0802d7a0 	.word	0x0802d7a0
 8002ad8:	24002278 	.word	0x24002278
 8002adc:	0802d7c0 	.word	0x0802d7c0
                    if (boardNumber > 0) {
 8002ae0:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002ae4:	2b00      	cmp	r3, #0
 8002ae6:	f000 8212 	beq.w	8002f0e <MqttClientPubTask+0x6fe>
                        osMutexAcquire (sensorsInfoMutex, osWaitForever);
 8002aea:	4bef      	ldr	r3, [pc, #956]	@ (8002ea8 <MqttClientPubTask+0x698>)
 8002aec:	681b      	ldr	r3, [r3, #0]
 8002aee:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8002af2:	4618      	mov	r0, r3
 8002af4:	f00e ff47 	bl	8011986 <osMutexAcquire>
                        SesnorsInfo* sensors = &sensorsInfo[boardNumber - 1];
 8002af8:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002afc:	1e5a      	subs	r2, r3, #1
 8002afe:	4613      	mov	r3, r2
 8002b00:	011b      	lsls	r3, r3, #4
 8002b02:	1a9b      	subs	r3, r3, r2
 8002b04:	009b      	lsls	r3, r3, #2
 8002b06:	4ae9      	ldr	r2, [pc, #932]	@ (8002eac <MqttClientPubTask+0x69c>)
 8002b08:	4413      	add	r3, r2
 8002b0a:	f8c7 3240 	str.w	r3, [r7, #576]	@ 0x240
                        sprintf (topicTextBuffer, "Sensors/%d", boardNumber);
 8002b0e:	f897 224f 	ldrb.w	r2, [r7, #591]	@ 0x24f
 8002b12:	f107 031c 	add.w	r3, r7, #28
 8002b16:	49e6      	ldr	r1, [pc, #920]	@ (8002eb0 <MqttClientPubTask+0x6a0>)
 8002b18:	4618      	mov	r0, r3
 8002b1a:	f028 f80f 	bl	802ab3c <siprintf>
                        bytesInBuffer = sprintf (messageBuffer, "{\"pvTemperature\":[%.1f, %.1f], ", sensors->pvTemperature[0], sensors->pvTemperature[1]);
 8002b1e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b22:	edd3 7a00 	vldr	s15, [r3]
 8002b26:	eeb7 6ae7 	vcvt.f64.f32	d6, s15
 8002b2a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b2e:	edd3 7a01 	vldr	s15, [r3, #4]
 8002b32:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b36:	f107 003c 	add.w	r0, r7, #60	@ 0x3c
 8002b3a:	ed8d 7b00 	vstr	d7, [sp]
 8002b3e:	ec53 2b16 	vmov	r2, r3, d6
 8002b42:	49dc      	ldr	r1, [pc, #880]	@ (8002eb4 <MqttClientPubTask+0x6a4>)
 8002b44:	f027 fffa 	bl	802ab3c <siprintf>
 8002b48:	4603      	mov	r3, r0
 8002b4a:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"fanVoltage\":%.2f, ", sensors->fanVoltage);
 8002b4e:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002b52:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b56:	18d0      	adds	r0, r2, r3
 8002b58:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b5c:	edd3 7a02 	vldr	s15, [r3, #8]
 8002b60:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b64:	ec53 2b17 	vmov	r2, r3, d7
 8002b68:	49d3      	ldr	r1, [pc, #844]	@ (8002eb8 <MqttClientPubTask+0x6a8>)
 8002b6a:	f027 ffe7 	bl	802ab3c <siprintf>
 8002b6e:	4603      	mov	r3, r0
 8002b70:	461a      	mov	r2, r3
 8002b72:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b76:	4413      	add	r3, r2
 8002b78:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"pvEncoderX\":%.2f, ", sensors->pvEncoderX);
 8002b7c:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002b80:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002b84:	18d0      	adds	r0, r2, r3
 8002b86:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002b8a:	edd3 7a03 	vldr	s15, [r3, #12]
 8002b8e:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002b92:	ec53 2b17 	vmov	r2, r3, d7
 8002b96:	49c9      	ldr	r1, [pc, #804]	@ (8002ebc <MqttClientPubTask+0x6ac>)
 8002b98:	f027 ffd0 	bl	802ab3c <siprintf>
 8002b9c:	4603      	mov	r3, r0
 8002b9e:	461a      	mov	r2, r3
 8002ba0:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002ba4:	4413      	add	r3, r2
 8002ba6:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"pvEncoderY\":%.2f, ", sensors->pvEncoderY);
 8002baa:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002bae:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002bb2:	18d0      	adds	r0, r2, r3
 8002bb4:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002bb8:	edd3 7a04 	vldr	s15, [r3, #16]
 8002bbc:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002bc0:	ec53 2b17 	vmov	r2, r3, d7
 8002bc4:	49be      	ldr	r1, [pc, #760]	@ (8002ec0 <MqttClientPubTask+0x6b0>)
 8002bc6:	f027 ffb9 	bl	802ab3c <siprintf>
 8002bca:	4603      	mov	r3, r0
 8002bcc:	461a      	mov	r2, r3
 8002bce:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002bd2:	4413      	add	r3, r2
 8002bd4:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXStatus\":%d, ", sensors->motorXStatus);
 8002bd8:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002bdc:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002be0:	18d0      	adds	r0, r2, r3
 8002be2:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002be6:	7d1b      	ldrb	r3, [r3, #20]
 8002be8:	461a      	mov	r2, r3
 8002bea:	49b6      	ldr	r1, [pc, #728]	@ (8002ec4 <MqttClientPubTask+0x6b4>)
 8002bec:	f027 ffa6 	bl	802ab3c <siprintf>
 8002bf0:	4603      	mov	r3, r0
 8002bf2:	461a      	mov	r2, r3
 8002bf4:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002bf8:	4413      	add	r3, r2
 8002bfa:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYStatus\":%d, ", sensors->motorYStatus);
 8002bfe:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002c02:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c06:	18d0      	adds	r0, r2, r3
 8002c08:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c0c:	7d5b      	ldrb	r3, [r3, #21]
 8002c0e:	461a      	mov	r2, r3
 8002c10:	49ad      	ldr	r1, [pc, #692]	@ (8002ec8 <MqttClientPubTask+0x6b8>)
 8002c12:	f027 ff93 	bl	802ab3c <siprintf>
 8002c16:	4603      	mov	r3, r0
 8002c18:	461a      	mov	r2, r3
 8002c1a:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c1e:	4413      	add	r3, r2
 8002c20:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXAveCurrent\":%.3f, ", sensors->motorXAveCurrent);
 8002c24:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002c28:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c2c:	18d0      	adds	r0, r2, r3
 8002c2e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c32:	edd3 7a06 	vldr	s15, [r3, #24]
 8002c36:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002c3a:	ec53 2b17 	vmov	r2, r3, d7
 8002c3e:	49a3      	ldr	r1, [pc, #652]	@ (8002ecc <MqttClientPubTask+0x6bc>)
 8002c40:	f027 ff7c 	bl	802ab3c <siprintf>
 8002c44:	4603      	mov	r3, r0
 8002c46:	461a      	mov	r2, r3
 8002c48:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c4c:	4413      	add	r3, r2
 8002c4e:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYAveCurrent\":%.3f, ", sensors->motorYAveCurrent);
 8002c52:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002c56:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c5a:	18d0      	adds	r0, r2, r3
 8002c5c:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c60:	edd3 7a07 	vldr	s15, [r3, #28]
 8002c64:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002c68:	ec53 2b17 	vmov	r2, r3, d7
 8002c6c:	4998      	ldr	r1, [pc, #608]	@ (8002ed0 <MqttClientPubTask+0x6c0>)
 8002c6e:	f027 ff65 	bl	802ab3c <siprintf>
 8002c72:	4603      	mov	r3, r0
 8002c74:	461a      	mov	r2, r3
 8002c76:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c7a:	4413      	add	r3, r2
 8002c7c:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorXPeakCurrent\":%.3f, ", sensors->motorXPeakCurrent);
 8002c80:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002c84:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002c88:	18d0      	adds	r0, r2, r3
 8002c8a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002c8e:	edd3 7a08 	vldr	s15, [r3, #32]
 8002c92:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002c96:	ec53 2b17 	vmov	r2, r3, d7
 8002c9a:	498e      	ldr	r1, [pc, #568]	@ (8002ed4 <MqttClientPubTask+0x6c4>)
 8002c9c:	f027 ff4e 	bl	802ab3c <siprintf>
 8002ca0:	4603      	mov	r3, r0
 8002ca2:	461a      	mov	r2, r3
 8002ca4:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002ca8:	4413      	add	r3, r2
 8002caa:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"motorYPeakCurrent\":%.3f, ", sensors->motorYPeakCurrent);
 8002cae:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002cb2:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002cb6:	18d0      	adds	r0, r2, r3
 8002cb8:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002cbc:	edd3 7a09 	vldr	s15, [r3, #36]	@ 0x24
 8002cc0:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002cc4:	ec53 2b17 	vmov	r2, r3, d7
 8002cc8:	4983      	ldr	r1, [pc, #524]	@ (8002ed8 <MqttClientPubTask+0x6c8>)
 8002cca:	f027 ff37 	bl	802ab3c <siprintf>
 8002cce:	4603      	mov	r3, r0
 8002cd0:	461a      	mov	r2, r3
 8002cd2:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002cd6:	4413      	add	r3, r2
 8002cd8:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchUp\":%d, ", sensors->limitXSwitchUp);
 8002cdc:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002ce0:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002ce4:	18d0      	adds	r0, r2, r3
 8002ce6:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002cea:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8002cee:	461a      	mov	r2, r3
 8002cf0:	497a      	ldr	r1, [pc, #488]	@ (8002edc <MqttClientPubTask+0x6cc>)
 8002cf2:	f027 ff23 	bl	802ab3c <siprintf>
 8002cf6:	4603      	mov	r3, r0
 8002cf8:	461a      	mov	r2, r3
 8002cfa:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002cfe:	4413      	add	r3, r2
 8002d00:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchDown\":%d, ", sensors->limitXSwitchDown);
 8002d04:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002d08:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002d0c:	18d0      	adds	r0, r2, r3
 8002d0e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d12:	f893 3029 	ldrb.w	r3, [r3, #41]	@ 0x29
 8002d16:	461a      	mov	r2, r3
 8002d18:	4971      	ldr	r1, [pc, #452]	@ (8002ee0 <MqttClientPubTask+0x6d0>)
 8002d1a:	f027 ff0f 	bl	802ab3c <siprintf>
 8002d1e:	4603      	mov	r3, r0
 8002d20:	461a      	mov	r2, r3
 8002d22:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002d26:	4413      	add	r3, r2
 8002d28:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitXSwitchCenter\":%d, ", sensors->limitXSwitchCenter);
 8002d2c:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002d30:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002d34:	18d0      	adds	r0, r2, r3
 8002d36:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d3a:	f893 302a 	ldrb.w	r3, [r3, #42]	@ 0x2a
 8002d3e:	461a      	mov	r2, r3
 8002d40:	4968      	ldr	r1, [pc, #416]	@ (8002ee4 <MqttClientPubTask+0x6d4>)
 8002d42:	f027 fefb 	bl	802ab3c <siprintf>
 8002d46:	4603      	mov	r3, r0
 8002d48:	461a      	mov	r2, r3
 8002d4a:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002d4e:	4413      	add	r3, r2
 8002d50:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchUp\":%d, ", sensors->limitYSwitchUp);
 8002d54:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002d58:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002d5c:	18d0      	adds	r0, r2, r3
 8002d5e:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d62:	f893 302b 	ldrb.w	r3, [r3, #43]	@ 0x2b
 8002d66:	461a      	mov	r2, r3
 8002d68:	495f      	ldr	r1, [pc, #380]	@ (8002ee8 <MqttClientPubTask+0x6d8>)
 8002d6a:	f027 fee7 	bl	802ab3c <siprintf>
 8002d6e:	4603      	mov	r3, r0
 8002d70:	461a      	mov	r2, r3
 8002d72:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002d76:	4413      	add	r3, r2
 8002d78:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchDown\":%d, ", sensors->limitYSwitchDown);
 8002d7c:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002d80:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002d84:	18d0      	adds	r0, r2, r3
 8002d86:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002d8a:	f893 302c 	ldrb.w	r3, [r3, #44]	@ 0x2c
 8002d8e:	461a      	mov	r2, r3
 8002d90:	4956      	ldr	r1, [pc, #344]	@ (8002eec <MqttClientPubTask+0x6dc>)
 8002d92:	f027 fed3 	bl	802ab3c <siprintf>
 8002d96:	4603      	mov	r3, r0
 8002d98:	461a      	mov	r2, r3
 8002d9a:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002d9e:	4413      	add	r3, r2
 8002da0:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"limitYSwitchCenter\":%d, ", sensors->limitYSwitchCenter);
 8002da4:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002da8:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002dac:	18d0      	adds	r0, r2, r3
 8002dae:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002db2:	f893 302d 	ldrb.w	r3, [r3, #45]	@ 0x2d
 8002db6:	461a      	mov	r2, r3
 8002db8:	494d      	ldr	r1, [pc, #308]	@ (8002ef0 <MqttClientPubTask+0x6e0>)
 8002dba:	f027 febf 	bl	802ab3c <siprintf>
 8002dbe:	4603      	mov	r3, r0
 8002dc0:	461a      	mov	r2, r3
 8002dc2:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002dc6:	4413      	add	r3, r2
 8002dc8:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentXPosition\":%.2f, ", sensors->currentXPosition);
 8002dcc:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002dd0:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002dd4:	18d0      	adds	r0, r2, r3
 8002dd6:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002dda:	edd3 7a0c 	vldr	s15, [r3, #48]	@ 0x30
 8002dde:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002de2:	ec53 2b17 	vmov	r2, r3, d7
 8002de6:	4943      	ldr	r1, [pc, #268]	@ (8002ef4 <MqttClientPubTask+0x6e4>)
 8002de8:	f027 fea8 	bl	802ab3c <siprintf>
 8002dec:	4603      	mov	r3, r0
 8002dee:	461a      	mov	r2, r3
 8002df0:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002df4:	4413      	add	r3, r2
 8002df6:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"currentYPosition\":%.2f, ", sensors->currentYPosition);
 8002dfa:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002dfe:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002e02:	18d0      	adds	r0, r2, r3
 8002e04:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e08:	edd3 7a0d 	vldr	s15, [r3, #52]	@ 0x34
 8002e0c:	eeb7 7ae7 	vcvt.f64.f32	d7, s15
 8002e10:	ec53 2b17 	vmov	r2, r3, d7
 8002e14:	4938      	ldr	r1, [pc, #224]	@ (8002ef8 <MqttClientPubTask+0x6e8>)
 8002e16:	f027 fe91 	bl	802ab3c <siprintf>
 8002e1a:	4603      	mov	r3, r0
 8002e1c:	461a      	mov	r2, r3
 8002e1e:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002e22:	4413      	add	r3, r2
 8002e24:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"positionXWeak\":%d, ", sensors->positionXWeak);
 8002e28:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002e2c:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002e30:	18d0      	adds	r0, r2, r3
 8002e32:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e36:	f893 3038 	ldrb.w	r3, [r3, #56]	@ 0x38
 8002e3a:	461a      	mov	r2, r3
 8002e3c:	492f      	ldr	r1, [pc, #188]	@ (8002efc <MqttClientPubTask+0x6ec>)
 8002e3e:	f027 fe7d 	bl	802ab3c <siprintf>
 8002e42:	4603      	mov	r3, r0
 8002e44:	461a      	mov	r2, r3
 8002e46:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002e4a:	4413      	add	r3, r2
 8002e4c:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"positionYWeak\":%d, ", sensors->positionYWeak);
 8002e50:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002e54:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002e58:	18d0      	adds	r0, r2, r3
 8002e5a:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e5e:	f893 3039 	ldrb.w	r3, [r3, #57]	@ 0x39
 8002e62:	461a      	mov	r2, r3
 8002e64:	4926      	ldr	r1, [pc, #152]	@ (8002f00 <MqttClientPubTask+0x6f0>)
 8002e66:	f027 fe69 	bl	802ab3c <siprintf>
 8002e6a:	4603      	mov	r3, r0
 8002e6c:	461a      	mov	r2, r3
 8002e6e:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002e72:	4413      	add	r3, r2
 8002e74:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        bytesInBuffer += sprintf (&messageBuffer[bytesInBuffer], "\"powerSupplyFailMask\":%d}", sensors->powerSupplyFailMask);
 8002e78:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002e7c:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002e80:	18d0      	adds	r0, r2, r3
 8002e82:	f8d7 3240 	ldr.w	r3, [r7, #576]	@ 0x240
 8002e86:	f893 302e 	ldrb.w	r3, [r3, #46]	@ 0x2e
 8002e8a:	461a      	mov	r2, r3
 8002e8c:	491d      	ldr	r1, [pc, #116]	@ (8002f04 <MqttClientPubTask+0x6f4>)
 8002e8e:	f027 fe55 	bl	802ab3c <siprintf>
 8002e92:	4603      	mov	r3, r0
 8002e94:	461a      	mov	r2, r3
 8002e96:	f8d7 3248 	ldr.w	r3, [r7, #584]	@ 0x248
 8002e9a:	4413      	add	r3, r2
 8002e9c:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                        osMutexRelease (sensorsInfoMutex);
 8002ea0:	4b01      	ldr	r3, [pc, #4]	@ (8002ea8 <MqttClientPubTask+0x698>)
 8002ea2:	681b      	ldr	r3, [r3, #0]
 8002ea4:	4618      	mov	r0, r3
 8002ea6:	e02f      	b.n	8002f08 <MqttClientPubTask+0x6f8>
 8002ea8:	2400228c 	.word	0x2400228c
 8002eac:	24002188 	.word	0x24002188
 8002eb0:	0802d7d4 	.word	0x0802d7d4
 8002eb4:	0802d7e0 	.word	0x0802d7e0
 8002eb8:	0802d800 	.word	0x0802d800
 8002ebc:	0802d814 	.word	0x0802d814
 8002ec0:	0802d828 	.word	0x0802d828
 8002ec4:	0802d83c 	.word	0x0802d83c
 8002ec8:	0802d850 	.word	0x0802d850
 8002ecc:	0802d864 	.word	0x0802d864
 8002ed0:	0802d880 	.word	0x0802d880
 8002ed4:	0802d89c 	.word	0x0802d89c
 8002ed8:	0802d8b8 	.word	0x0802d8b8
 8002edc:	0802d8d4 	.word	0x0802d8d4
 8002ee0:	0802d8ec 	.word	0x0802d8ec
 8002ee4:	0802d904 	.word	0x0802d904
 8002ee8:	0802d920 	.word	0x0802d920
 8002eec:	0802d938 	.word	0x0802d938
 8002ef0:	0802d950 	.word	0x0802d950
 8002ef4:	0802d96c 	.word	0x0802d96c
 8002ef8:	0802d988 	.word	0x0802d988
 8002efc:	0802d9a4 	.word	0x0802d9a4
 8002f00:	0802d9bc 	.word	0x0802d9bc
 8002f04:	0802d9d4 	.word	0x0802d9d4
 8002f08:	f00e fd88 	bl	8011a1c <osMutexRelease>
 8002f0c:	e028      	b.n	8002f60 <MqttClientPubTask+0x750>
                    } else {
                        sprintf (topicTextBuffer, "Sensors/%d", boardNumber);
 8002f0e:	f897 224f 	ldrb.w	r2, [r7, #591]	@ 0x24f
 8002f12:	f107 031c 	add.w	r3, r7, #28
 8002f16:	4927      	ldr	r1, [pc, #156]	@ (8002fb4 <MqttClientPubTask+0x7a4>)
 8002f18:	4618      	mov	r0, r3
 8002f1a:	f027 fe0f 	bl	802ab3c <siprintf>
                        uint8_t mainBoardPowerSupplyFailMask = ~((HAL_GPIO_ReadPin (GPIOD, GPIO_PIN_4) << 1) | HAL_GPIO_ReadPin (GPIOD, GPIO_PIN_2)) & 0x3;
 8002f1e:	2110      	movs	r1, #16
 8002f20:	4825      	ldr	r0, [pc, #148]	@ (8002fb8 <MqttClientPubTask+0x7a8>)
 8002f22:	f007 fa49 	bl	800a3b8 <HAL_GPIO_ReadPin>
 8002f26:	4603      	mov	r3, r0
 8002f28:	005b      	lsls	r3, r3, #1
 8002f2a:	b25c      	sxtb	r4, r3
 8002f2c:	2104      	movs	r1, #4
 8002f2e:	4822      	ldr	r0, [pc, #136]	@ (8002fb8 <MqttClientPubTask+0x7a8>)
 8002f30:	f007 fa42 	bl	800a3b8 <HAL_GPIO_ReadPin>
 8002f34:	4603      	mov	r3, r0
 8002f36:	b25b      	sxtb	r3, r3
 8002f38:	4323      	orrs	r3, r4
 8002f3a:	b25b      	sxtb	r3, r3
 8002f3c:	43db      	mvns	r3, r3
 8002f3e:	b25b      	sxtb	r3, r3
 8002f40:	b2db      	uxtb	r3, r3
 8002f42:	f003 0303 	and.w	r3, r3, #3
 8002f46:	f887 3247 	strb.w	r3, [r7, #583]	@ 0x247
                        bytesInBuffer = sprintf (messageBuffer, "{\"powerSupplyFailMask\":%d}", mainBoardPowerSupplyFailMask);
 8002f4a:	f897 2247 	ldrb.w	r2, [r7, #583]	@ 0x247
 8002f4e:	f107 033c 	add.w	r3, r7, #60	@ 0x3c
 8002f52:	491a      	ldr	r1, [pc, #104]	@ (8002fbc <MqttClientPubTask+0x7ac>)
 8002f54:	4618      	mov	r0, r3
 8002f56:	f027 fdf1 	bl	802ab3c <siprintf>
 8002f5a:	4603      	mov	r3, r0
 8002f5c:	f8c7 3248 	str.w	r3, [r7, #584]	@ 0x248
                    }
                    message.payload    = (void*)messageBuffer;
 8002f60:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002f64:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 8002f68:	f107 023c 	add.w	r2, r7, #60	@ 0x3c
 8002f6c:	609a      	str	r2, [r3, #8]
                    message.payloadlen = strlen (messageBuffer);
 8002f6e:	f107 033c 	add.w	r3, r7, #60	@ 0x3c
 8002f72:	4618      	mov	r0, r3
 8002f74:	f7fd fa14 	bl	80003a0 <strlen>
 8002f78:	4602      	mov	r2, r0
 8002f7a:	f507 7314 	add.w	r3, r7, #592	@ 0x250
 8002f7e:	f5a3 7311 	sub.w	r3, r3, #580	@ 0x244
 8002f82:	60da      	str	r2, [r3, #12]
                    MQTTPublish (&mqttClient, topicTextBuffer, &message); // publish a message
 8002f84:	f107 020c 	add.w	r2, r7, #12
 8002f88:	f107 031c 	add.w	r3, r7, #28
 8002f8c:	4619      	mov	r1, r3
 8002f8e:	480c      	ldr	r0, [pc, #48]	@ (8002fc0 <MqttClientPubTask+0x7b0>)
 8002f90:	f025 f8ed 	bl	802816e <MQTTPublish>
                for (boardNumber = 0; boardNumber < SLAVES_COUNT + 1; boardNumber++) {
 8002f94:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002f98:	3301      	adds	r3, #1
 8002f9a:	f887 324f 	strb.w	r3, [r7, #591]	@ 0x24f
 8002f9e:	f897 324f 	ldrb.w	r3, [r7, #591]	@ 0x24f
 8002fa2:	2b04      	cmp	r3, #4
 8002fa4:	f67f ad9c 	bls.w	8002ae0 <MqttClientPubTask+0x2d0>
                }
            }
        }

        osDelay (pdMS_TO_TICKS (1000));
 8002fa8:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 8002fac:	f00e fb53 	bl	8011656 <osDelay>
        if (mqttClient.isconnected) {
 8002fb0:	e459      	b.n	8002866 <MqttClientPubTask+0x56>
 8002fb2:	bf00      	nop
 8002fb4:	0802d7d4 	.word	0x0802d7d4
 8002fb8:	58020c00 	.word	0x58020c00
 8002fbc:	0802d9f0 	.word	0x0802d9f0
 8002fc0:	24000740 	.word	0x24000740

08002fc4 <MqttConnectBroker>:
    }
}

uint32_t MqttConnectBroker () {
 8002fc4:	b580      	push	{r7, lr}
 8002fc6:	b09c      	sub	sp, #112	@ 0x70
 8002fc8:	af04      	add	r7, sp, #16
    uint8_t boardNumber = 0;
 8002fca:	2300      	movs	r3, #0
 8002fcc:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
    int ret;

    NewNetwork (&net);
 8002fd0:	4839      	ldr	r0, [pc, #228]	@ (80030b8 <MqttConnectBroker+0xf4>)
 8002fd2:	f025 fa05 	bl	80283e0 <NewNetwork>
    ret = ConnectNetwork (&net, BROKER_IP, MQTT_PORT);
 8002fd6:	f240 725b 	movw	r2, #1883	@ 0x75b
 8002fda:	4938      	ldr	r1, [pc, #224]	@ (80030bc <MqttConnectBroker+0xf8>)
 8002fdc:	4836      	ldr	r0, [pc, #216]	@ (80030b8 <MqttConnectBroker+0xf4>)
 8002fde:	f025 fa1b 	bl	8028418 <ConnectNetwork>
 8002fe2:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 8002fe4:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8002fe6:	2b00      	cmp	r3, #0
 8002fe8:	d005      	beq.n	8002ff6 <MqttConnectBroker+0x32>
        printf ("ConnectNetwork failed.\n");
 8002fea:	4835      	ldr	r0, [pc, #212]	@ (80030c0 <MqttConnectBroker+0xfc>)
 8002fec:	f027 fd9e 	bl	802ab2c <puts>
        return -1;
 8002ff0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8002ff4:	e05c      	b.n	80030b0 <MqttConnectBroker+0xec>
    }

    MQTTClientInit (&mqttClient, &net, 1000, sndBuffer, sizeof (sndBuffer), rcvBuffer, sizeof (rcvBuffer));
 8002ff6:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8002ffa:	9302      	str	r3, [sp, #8]
 8002ffc:	4b31      	ldr	r3, [pc, #196]	@ (80030c4 <MqttConnectBroker+0x100>)
 8002ffe:	9301      	str	r3, [sp, #4]
 8003000:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8003004:	9300      	str	r3, [sp, #0]
 8003006:	4b30      	ldr	r3, [pc, #192]	@ (80030c8 <MqttConnectBroker+0x104>)
 8003008:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 800300c:	492a      	ldr	r1, [pc, #168]	@ (80030b8 <MqttConnectBroker+0xf4>)
 800300e:	482f      	ldr	r0, [pc, #188]	@ (80030cc <MqttConnectBroker+0x108>)
 8003010:	f024 fb20 	bl	8027654 <MQTTClientInit>

    MQTTPacket_connectData data = MQTTPacket_connectData_initializer;
 8003014:	4a2e      	ldr	r2, [pc, #184]	@ (80030d0 <MqttConnectBroker+0x10c>)
 8003016:	463b      	mov	r3, r7
 8003018:	4611      	mov	r1, r2
 800301a:	2258      	movs	r2, #88	@ 0x58
 800301c:	4618      	mov	r0, r3
 800301e:	f027 ffa6 	bl	802af6e <memcpy>
    data.willFlag               = 0;
 8003022:	2300      	movs	r3, #0
 8003024:	76fb      	strb	r3, [r7, #27]
    data.MQTTVersion            = 3;
 8003026:	2303      	movs	r3, #3
 8003028:	723b      	strb	r3, [r7, #8]
    data.clientID.cstring       = "test_user1";
 800302a:	4b2a      	ldr	r3, [pc, #168]	@ (80030d4 <MqttConnectBroker+0x110>)
 800302c:	60fb      	str	r3, [r7, #12]
    data.username.cstring       = "test_user1";
 800302e:	4b29      	ldr	r3, [pc, #164]	@ (80030d4 <MqttConnectBroker+0x110>)
 8003030:	643b      	str	r3, [r7, #64]	@ 0x40
    data.password.cstring       = "1234";
 8003032:	4b29      	ldr	r3, [pc, #164]	@ (80030d8 <MqttConnectBroker+0x114>)
 8003034:	64fb      	str	r3, [r7, #76]	@ 0x4c
    data.keepAliveInterval      = 100;
 8003036:	2364      	movs	r3, #100	@ 0x64
 8003038:	833b      	strh	r3, [r7, #24]
    data.cleansession           = 1;
 800303a:	2301      	movs	r3, #1
 800303c:	76bb      	strb	r3, [r7, #26]

    ret = MQTTConnect (&mqttClient, &data);
 800303e:	463b      	mov	r3, r7
 8003040:	4619      	mov	r1, r3
 8003042:	4822      	ldr	r0, [pc, #136]	@ (80030cc <MqttConnectBroker+0x108>)
 8003044:	f024 ff62 	bl	8027f0c <MQTTConnect>
 8003048:	65b8      	str	r0, [r7, #88]	@ 0x58
    if (ret != MQTT_SUCCESS) {
 800304a:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 800304c:	2b00      	cmp	r3, #0
 800304e:	d008      	beq.n	8003062 <MqttConnectBroker+0x9e>
        net_disconnect (&net);
 8003050:	4819      	ldr	r0, [pc, #100]	@ (80030b8 <MqttConnectBroker+0xf4>)
 8003052:	f025 fa6a 	bl	802852a <net_disconnect>
        printf ("MQTTConnect failed. Code %d\n", ret);
 8003056:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8003058:	4820      	ldr	r0, [pc, #128]	@ (80030dc <MqttConnectBroker+0x118>)
 800305a:	f027 fcff 	bl	802aa5c <iprintf>
        return ret;
 800305e:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8003060:	e026      	b.n	80030b0 <MqttConnectBroker+0xec>
    }

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8003062:	2300      	movs	r3, #0
 8003064:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 8003068:	e01a      	b.n	80030a0 <MqttConnectBroker+0xdc>
        ret = MQTTSubscribe (&mqttClient, subscribeTopicNames[boardNumber], QOS0, MqttMessageArrived);
 800306a:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 800306e:	4a1c      	ldr	r2, [pc, #112]	@ (80030e0 <MqttConnectBroker+0x11c>)
 8003070:	f852 1023 	ldr.w	r1, [r2, r3, lsl #2]
 8003074:	4b1b      	ldr	r3, [pc, #108]	@ (80030e4 <MqttConnectBroker+0x120>)
 8003076:	2200      	movs	r2, #0
 8003078:	4814      	ldr	r0, [pc, #80]	@ (80030cc <MqttConnectBroker+0x108>)
 800307a:	f025 f862 	bl	8028142 <MQTTSubscribe>
 800307e:	65b8      	str	r0, [r7, #88]	@ 0x58
        if (ret != MQTT_SUCCESS) {
 8003080:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8003082:	2b00      	cmp	r3, #0
 8003084:	d007      	beq.n	8003096 <MqttConnectBroker+0xd2>
            net_disconnect (&net);
 8003086:	480c      	ldr	r0, [pc, #48]	@ (80030b8 <MqttConnectBroker+0xf4>)
 8003088:	f025 fa4f 	bl	802852a <net_disconnect>
            printf ("MQTTSubscribe failed.\n");
 800308c:	4816      	ldr	r0, [pc, #88]	@ (80030e8 <MqttConnectBroker+0x124>)
 800308e:	f027 fd4d 	bl	802ab2c <puts>
            return ret;
 8003092:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 8003094:	e00c      	b.n	80030b0 <MqttConnectBroker+0xec>
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 8003096:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 800309a:	3301      	adds	r3, #1
 800309c:	f887 305f 	strb.w	r3, [r7, #95]	@ 0x5f
 80030a0:	f897 305f 	ldrb.w	r3, [r7, #95]	@ 0x5f
 80030a4:	2b03      	cmp	r3, #3
 80030a6:	d9e0      	bls.n	800306a <MqttConnectBroker+0xa6>
        }
    }
    printf ("MQTT_ConnectBroker O.K.\n");
 80030a8:	4810      	ldr	r0, [pc, #64]	@ (80030ec <MqttConnectBroker+0x128>)
 80030aa:	f027 fd3f 	bl	802ab2c <puts>

    return MQTT_SUCCESS;
 80030ae:	2300      	movs	r3, #0
}
 80030b0:	4618      	mov	r0, r3
 80030b2:	3760      	adds	r7, #96	@ 0x60
 80030b4:	46bd      	mov	sp, r7
 80030b6:	bd80      	pop	{r7, pc}
 80030b8:	24000730 	.word	0x24000730
 80030bc:	0802da0c 	.word	0x0802da0c
 80030c0:	0802da1c 	.word	0x0802da1c
 80030c4:	24000bac 	.word	0x24000bac
 80030c8:	240007ac 	.word	0x240007ac
 80030cc:	24000740 	.word	0x24000740
 80030d0:	0802da98 	.word	0x0802da98
 80030d4:	0802da34 	.word	0x0802da34
 80030d8:	0802da40 	.word	0x0802da40
 80030dc:	0802da48 	.word	0x0802da48
 80030e0:	08031c6c 	.word	0x08031c6c
 80030e4:	08003255 	.word	0x08003255
 80030e8:	0802da68 	.word	0x0802da68
 80030ec:	0802da80 	.word	0x0802da80

080030f0 <RelayCtrl>:

void RelayCtrl (int32_t relayNumber, int32_t relayTimeOn) {
 80030f0:	b580      	push	{r7, lr}
 80030f2:	b082      	sub	sp, #8
 80030f4:	af00      	add	r7, sp, #0
 80030f6:	6078      	str	r0, [r7, #4]
 80030f8:	6039      	str	r1, [r7, #0]
    switch (relayNumber) {
 80030fa:	687b      	ldr	r3, [r7, #4]
 80030fc:	3b01      	subs	r3, #1
 80030fe:	2b03      	cmp	r3, #3
 8003100:	f200 8098 	bhi.w	8003234 <RelayCtrl+0x144>
 8003104:	a201      	add	r2, pc, #4	@ (adr r2, 800310c <RelayCtrl+0x1c>)
 8003106:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800310a:	bf00      	nop
 800310c:	0800311d 	.word	0x0800311d
 8003110:	08003163 	.word	0x08003163
 8003114:	080031a9 	.word	0x080031a9
 8003118:	080031ef 	.word	0x080031ef
    case 1:
        if (relayTimeOn > 0) {
 800311c:	683b      	ldr	r3, [r7, #0]
 800311e:	2b00      	cmp	r3, #0
 8003120:	dd0b      	ble.n	800313a <RelayCtrl+0x4a>
            osTimerStart (relay1TimerHandle, relayTimeOn * 1000);
 8003122:	4b47      	ldr	r3, [pc, #284]	@ (8003240 <RelayCtrl+0x150>)
 8003124:	681a      	ldr	r2, [r3, #0]
 8003126:	683b      	ldr	r3, [r7, #0]
 8003128:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 800312c:	fb01 f303 	mul.w	r3, r1, r3
 8003130:	4619      	mov	r1, r3
 8003132:	4610      	mov	r0, r2
 8003134:	f00e fb3c 	bl	80117b0 <osTimerStart>
 8003138:	e004      	b.n	8003144 <RelayCtrl+0x54>
        } else {
            osTimerStop (relay1TimerHandle);
 800313a:	4b41      	ldr	r3, [pc, #260]	@ (8003240 <RelayCtrl+0x150>)
 800313c:	681b      	ldr	r3, [r3, #0]
 800313e:	4618      	mov	r0, r3
 8003140:	f00e fb64 	bl	801180c <osTimerStop>
        }
        if (relayTimeOn != 0) {
 8003144:	683b      	ldr	r3, [r7, #0]
 8003146:	2b00      	cmp	r3, #0
 8003148:	d005      	beq.n	8003156 <RelayCtrl+0x66>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_5, GPIO_PIN_SET);
 800314a:	2201      	movs	r2, #1
 800314c:	2120      	movs	r1, #32
 800314e:	483d      	ldr	r0, [pc, #244]	@ (8003244 <RelayCtrl+0x154>)
 8003150:	f007 f94a 	bl	800a3e8 <HAL_GPIO_WritePin>
        } else {
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_5, GPIO_PIN_RESET);
        }
        break;
 8003154:	e06f      	b.n	8003236 <RelayCtrl+0x146>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_5, GPIO_PIN_RESET);
 8003156:	2200      	movs	r2, #0
 8003158:	2120      	movs	r1, #32
 800315a:	483a      	ldr	r0, [pc, #232]	@ (8003244 <RelayCtrl+0x154>)
 800315c:	f007 f944 	bl	800a3e8 <HAL_GPIO_WritePin>
        break;
 8003160:	e069      	b.n	8003236 <RelayCtrl+0x146>
    case 2:
        if (relayTimeOn > 0) {
 8003162:	683b      	ldr	r3, [r7, #0]
 8003164:	2b00      	cmp	r3, #0
 8003166:	dd0b      	ble.n	8003180 <RelayCtrl+0x90>
            osTimerStart (relay2TimerHandle, relayTimeOn * 1000);
 8003168:	4b37      	ldr	r3, [pc, #220]	@ (8003248 <RelayCtrl+0x158>)
 800316a:	681a      	ldr	r2, [r3, #0]
 800316c:	683b      	ldr	r3, [r7, #0]
 800316e:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 8003172:	fb01 f303 	mul.w	r3, r1, r3
 8003176:	4619      	mov	r1, r3
 8003178:	4610      	mov	r0, r2
 800317a:	f00e fb19 	bl	80117b0 <osTimerStart>
 800317e:	e004      	b.n	800318a <RelayCtrl+0x9a>
        } else {
            osTimerStop (relay2TimerHandle);
 8003180:	4b31      	ldr	r3, [pc, #196]	@ (8003248 <RelayCtrl+0x158>)
 8003182:	681b      	ldr	r3, [r3, #0]
 8003184:	4618      	mov	r0, r3
 8003186:	f00e fb41 	bl	801180c <osTimerStop>
        }
        if (relayTimeOn != 0) {
 800318a:	683b      	ldr	r3, [r7, #0]
 800318c:	2b00      	cmp	r3, #0
 800318e:	d005      	beq.n	800319c <RelayCtrl+0xac>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_3, GPIO_PIN_SET);
 8003190:	2201      	movs	r2, #1
 8003192:	2108      	movs	r1, #8
 8003194:	482b      	ldr	r0, [pc, #172]	@ (8003244 <RelayCtrl+0x154>)
 8003196:	f007 f927 	bl	800a3e8 <HAL_GPIO_WritePin>
        } else {
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
        }
        break;
 800319a:	e04c      	b.n	8003236 <RelayCtrl+0x146>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_3, GPIO_PIN_RESET);
 800319c:	2200      	movs	r2, #0
 800319e:	2108      	movs	r1, #8
 80031a0:	4828      	ldr	r0, [pc, #160]	@ (8003244 <RelayCtrl+0x154>)
 80031a2:	f007 f921 	bl	800a3e8 <HAL_GPIO_WritePin>
        break;
 80031a6:	e046      	b.n	8003236 <RelayCtrl+0x146>
    case 3:
        if (relayTimeOn > 0) {
 80031a8:	683b      	ldr	r3, [r7, #0]
 80031aa:	2b00      	cmp	r3, #0
 80031ac:	dd0b      	ble.n	80031c6 <RelayCtrl+0xd6>
            osTimerStart (relay3TimerHandle, relayTimeOn * 1000);
 80031ae:	4b27      	ldr	r3, [pc, #156]	@ (800324c <RelayCtrl+0x15c>)
 80031b0:	681a      	ldr	r2, [r3, #0]
 80031b2:	683b      	ldr	r3, [r7, #0]
 80031b4:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 80031b8:	fb01 f303 	mul.w	r3, r1, r3
 80031bc:	4619      	mov	r1, r3
 80031be:	4610      	mov	r0, r2
 80031c0:	f00e faf6 	bl	80117b0 <osTimerStart>
 80031c4:	e004      	b.n	80031d0 <RelayCtrl+0xe0>
        } else {
            osTimerStop (relay3TimerHandle);
 80031c6:	4b21      	ldr	r3, [pc, #132]	@ (800324c <RelayCtrl+0x15c>)
 80031c8:	681b      	ldr	r3, [r3, #0]
 80031ca:	4618      	mov	r0, r3
 80031cc:	f00e fb1e 	bl	801180c <osTimerStop>
        }
        if (relayTimeOn != 0) {
 80031d0:	683b      	ldr	r3, [r7, #0]
 80031d2:	2b00      	cmp	r3, #0
 80031d4:	d005      	beq.n	80031e2 <RelayCtrl+0xf2>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_4, GPIO_PIN_SET);
 80031d6:	2201      	movs	r2, #1
 80031d8:	2110      	movs	r1, #16
 80031da:	481a      	ldr	r0, [pc, #104]	@ (8003244 <RelayCtrl+0x154>)
 80031dc:	f007 f904 	bl	800a3e8 <HAL_GPIO_WritePin>
        } else {
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_4, GPIO_PIN_RESET);
        }
        break;
 80031e0:	e029      	b.n	8003236 <RelayCtrl+0x146>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_4, GPIO_PIN_RESET);
 80031e2:	2200      	movs	r2, #0
 80031e4:	2110      	movs	r1, #16
 80031e6:	4817      	ldr	r0, [pc, #92]	@ (8003244 <RelayCtrl+0x154>)
 80031e8:	f007 f8fe 	bl	800a3e8 <HAL_GPIO_WritePin>
        break;
 80031ec:	e023      	b.n	8003236 <RelayCtrl+0x146>
    case 4:
        if (relayTimeOn > 0) {
 80031ee:	683b      	ldr	r3, [r7, #0]
 80031f0:	2b00      	cmp	r3, #0
 80031f2:	dd0b      	ble.n	800320c <RelayCtrl+0x11c>
            osTimerStart (relay4TimerHandle, relayTimeOn * 1000);
 80031f4:	4b16      	ldr	r3, [pc, #88]	@ (8003250 <RelayCtrl+0x160>)
 80031f6:	681a      	ldr	r2, [r3, #0]
 80031f8:	683b      	ldr	r3, [r7, #0]
 80031fa:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 80031fe:	fb01 f303 	mul.w	r3, r1, r3
 8003202:	4619      	mov	r1, r3
 8003204:	4610      	mov	r0, r2
 8003206:	f00e fad3 	bl	80117b0 <osTimerStart>
 800320a:	e004      	b.n	8003216 <RelayCtrl+0x126>
        } else {
            osTimerStop (relay4TimerHandle);
 800320c:	4b10      	ldr	r3, [pc, #64]	@ (8003250 <RelayCtrl+0x160>)
 800320e:	681b      	ldr	r3, [r3, #0]
 8003210:	4618      	mov	r0, r3
 8003212:	f00e fafb 	bl	801180c <osTimerStop>
        }
        if (relayTimeOn != 0) {
 8003216:	683b      	ldr	r3, [r7, #0]
 8003218:	2b00      	cmp	r3, #0
 800321a:	d005      	beq.n	8003228 <RelayCtrl+0x138>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_2, GPIO_PIN_SET);
 800321c:	2201      	movs	r2, #1
 800321e:	2104      	movs	r1, #4
 8003220:	4808      	ldr	r0, [pc, #32]	@ (8003244 <RelayCtrl+0x154>)
 8003222:	f007 f8e1 	bl	800a3e8 <HAL_GPIO_WritePin>
        } else {
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
        }
        break;
 8003226:	e006      	b.n	8003236 <RelayCtrl+0x146>
            HAL_GPIO_WritePin (GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
 8003228:	2200      	movs	r2, #0
 800322a:	2104      	movs	r1, #4
 800322c:	4805      	ldr	r0, [pc, #20]	@ (8003244 <RelayCtrl+0x154>)
 800322e:	f007 f8db 	bl	800a3e8 <HAL_GPIO_WritePin>
        break;
 8003232:	e000      	b.n	8003236 <RelayCtrl+0x146>
    default: break;
 8003234:	bf00      	nop
    }
}
 8003236:	bf00      	nop
 8003238:	3708      	adds	r7, #8
 800323a:	46bd      	mov	sp, r7
 800323c:	bd80      	pop	{r7, pc}
 800323e:	bf00      	nop
 8003240:	24000668 	.word	0x24000668
 8003244:	58021000 	.word	0x58021000
 8003248:	24000698 	.word	0x24000698
 800324c:	240006c8 	.word	0x240006c8
 8003250:	240006f8 	.word	0x240006f8

08003254 <MqttMessageArrived>:

void MqttMessageArrived (MessageData* msg) {
 8003254:	b580      	push	{r7, lr}
 8003256:	b09c      	sub	sp, #112	@ 0x70
 8003258:	af00      	add	r7, sp, #0
 800325a:	6078      	str	r0, [r7, #4]
    SerialProtocolCommands spCommand = spUnknown;
 800325c:	2312      	movs	r3, #18
 800325e:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
    BoardNoOverTopic topicForBoard   = unknownBoard;
 8003262:	2305      	movs	r3, #5
 8003264:	f887 306e 	strb.w	r3, [r7, #110]	@ 0x6e
    uint8_t boardNumber              = 0;
 8003268:	2300      	movs	r3, #0
 800326a:	f887 306d 	strb.w	r3, [r7, #109]	@ 0x6d
    MQTTMessage* message             = msg->message;
 800326e:	687b      	ldr	r3, [r7, #4]
 8003270:	681b      	ldr	r3, [r3, #0]
 8003272:	653b      	str	r3, [r7, #80]	@ 0x50
    char topicName[32]               = { 0 };
 8003274:	2300      	movs	r3, #0
 8003276:	61bb      	str	r3, [r7, #24]
 8003278:	f107 031c 	add.w	r3, r7, #28
 800327c:	2200      	movs	r2, #0
 800327e:	601a      	str	r2, [r3, #0]
 8003280:	605a      	str	r2, [r3, #4]
 8003282:	609a      	str	r2, [r3, #8]
 8003284:	60da      	str	r2, [r3, #12]
 8003286:	611a      	str	r2, [r3, #16]
 8003288:	615a      	str	r2, [r3, #20]
 800328a:	619a      	str	r2, [r3, #24]
    memcpy (topicName, msg->topicName->lenstring.data, msg->topicName->lenstring.len);
 800328c:	687b      	ldr	r3, [r7, #4]
 800328e:	685b      	ldr	r3, [r3, #4]
 8003290:	6899      	ldr	r1, [r3, #8]
 8003292:	687b      	ldr	r3, [r7, #4]
 8003294:	685b      	ldr	r3, [r3, #4]
 8003296:	685b      	ldr	r3, [r3, #4]
 8003298:	461a      	mov	r2, r3
 800329a:	f107 0318 	add.w	r3, r7, #24
 800329e:	4618      	mov	r0, r3
 80032a0:	f027 fe65 	bl	802af6e <memcpy>

    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 80032a4:	2300      	movs	r3, #0
 80032a6:	f887 306d 	strb.w	r3, [r7, #109]	@ 0x6d
 80032aa:	e017      	b.n	80032dc <MqttMessageArrived+0x88>
        if (strcmp (topicName, subscribeTopicNames[boardNumber]) == 0) {
 80032ac:	f897 306d 	ldrb.w	r3, [r7, #109]	@ 0x6d
 80032b0:	4ab7      	ldr	r2, [pc, #732]	@ (8003590 <MqttMessageArrived+0x33c>)
 80032b2:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 80032b6:	f107 0318 	add.w	r3, r7, #24
 80032ba:	4611      	mov	r1, r2
 80032bc:	4618      	mov	r0, r3
 80032be:	f7fd f80f 	bl	80002e0 <strcmp>
 80032c2:	4603      	mov	r3, r0
 80032c4:	2b00      	cmp	r3, #0
 80032c6:	d104      	bne.n	80032d2 <MqttMessageArrived+0x7e>
            topicForBoard = (BoardNoOverTopic)(boardNumber);
 80032c8:	f897 306d 	ldrb.w	r3, [r7, #109]	@ 0x6d
 80032cc:	f887 306e 	strb.w	r3, [r7, #110]	@ 0x6e
            break;
 80032d0:	e008      	b.n	80032e4 <MqttMessageArrived+0x90>
    for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 80032d2:	f897 306d 	ldrb.w	r3, [r7, #109]	@ 0x6d
 80032d6:	3301      	adds	r3, #1
 80032d8:	f887 306d 	strb.w	r3, [r7, #109]	@ 0x6d
 80032dc:	f897 306d 	ldrb.w	r3, [r7, #109]	@ 0x6d
 80032e0:	2b03      	cmp	r3, #3
 80032e2:	d9e3      	bls.n	80032ac <MqttMessageArrived+0x58>
        }
    }
    if (topicForBoard == unknownBoard) {
 80032e4:	f897 306e 	ldrb.w	r3, [r7, #110]	@ 0x6e
 80032e8:	2b05      	cmp	r3, #5
 80032ea:	f000 823c 	beq.w	8003766 <MqttMessageArrived+0x512>
        return;
    }

    cJSON* json             = cJSON_Parse (message->payload);
 80032ee:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80032f0:	689b      	ldr	r3, [r3, #8]
 80032f2:	4618      	mov	r0, r3
 80032f4:	f7fe f92e 	bl	8001554 <cJSON_Parse>
 80032f8:	64f8      	str	r0, [r7, #76]	@ 0x4c
    const cJSON* objectItem = NULL;
 80032fa:	2300      	movs	r3, #0
 80032fc:	64bb      	str	r3, [r7, #72]	@ 0x48
    InterProcessData data   = { 0 };
 80032fe:	f107 0308 	add.w	r3, r7, #8
 8003302:	2200      	movs	r2, #0
 8003304:	601a      	str	r2, [r3, #0]
 8003306:	605a      	str	r2, [r3, #4]
 8003308:	609a      	str	r2, [r3, #8]
 800330a:	60da      	str	r2, [r3, #12]
    uint32_t arraySize      = 0;
 800330c:	2300      	movs	r3, #0
 800330e:	647b      	str	r3, [r7, #68]	@ 0x44
    if (topicForBoard != main_board) {
 8003310:	f897 306e 	ldrb.w	r3, [r7, #110]	@ 0x6e
 8003314:	2b00      	cmp	r3, #0
 8003316:	f000 81aa 	beq.w	800366e <MqttMessageArrived+0x41a>
        for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 800331a:	2300      	movs	r3, #0
 800331c:	66bb      	str	r3, [r7, #104]	@ 0x68
 800331e:	e1a1      	b.n	8003664 <MqttMessageArrived+0x410>
            spCommand  = spUnknown;
 8003320:	2312      	movs	r3, #18
 8003322:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
            objectItem = cJSON_GetObjectItemCaseSensitive (json, topicCommands[topicCmdNumber]);
 8003326:	4a9b      	ldr	r2, [pc, #620]	@ (8003594 <MqttMessageArrived+0x340>)
 8003328:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800332a:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 800332e:	4619      	mov	r1, r3
 8003330:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8003332:	f7fe fc79 	bl	8001c28 <cJSON_GetObjectItemCaseSensitive>
 8003336:	64b8      	str	r0, [r7, #72]	@ 0x48
            if (objectItem != NULL) {
 8003338:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800333a:	2b00      	cmp	r3, #0
 800333c:	f000 818f 	beq.w	800365e <MqttMessageArrived+0x40a>
                switch (topicCmdNumber) {
 8003340:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 8003342:	2b10      	cmp	r3, #16
 8003344:	f200 8174 	bhi.w	8003630 <MqttMessageArrived+0x3dc>
 8003348:	a201      	add	r2, pc, #4	@ (adr r2, 8003350 <MqttMessageArrived+0xfc>)
 800334a:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800334e:	bf00      	nop
 8003350:	08003395 	.word	0x08003395
 8003354:	0800339b 	.word	0x0800339b
 8003358:	080033a9 	.word	0x080033a9
 800335c:	08003419 	.word	0x08003419
 8003360:	08003433 	.word	0x08003433
 8003364:	08003439 	.word	0x08003439
 8003368:	0800346b 	.word	0x0800346b
 800336c:	08003489 	.word	0x08003489
 8003370:	080034f5 	.word	0x080034f5
 8003374:	08003517 	.word	0x08003517
 8003378:	08003539 	.word	0x08003539
 800337c:	0800353f 	.word	0x0800353f
 8003380:	0800354d 	.word	0x0800354d
 8003384:	0800355b 	.word	0x0800355b
 8003388:	080035d7 	.word	0x080035d7
 800338c:	080035f1 	.word	0x080035f1
 8003390:	08003611 	.word	0x08003611
                case fanSpeedTopic: spCommand = spSetFanSpeed;
 8003394:	2302      	movs	r3, #2
 8003396:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                case motorXonTopic:
                    if (spCommand == spUnknown) {
 800339a:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 800339e:	2b12      	cmp	r3, #18
 80033a0:	d102      	bne.n	80033a8 <MqttMessageArrived+0x154>
                        spCommand = spSetMotorXOn;
 80033a2:	2303      	movs	r3, #3
 80033a4:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                    }
                case motorYonTopic:
                    if (spCommand == spUnknown) {
 80033a8:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 80033ac:	2b12      	cmp	r3, #18
 80033ae:	d102      	bne.n	80033b6 <MqttMessageArrived+0x162>
                        spCommand = spSetMotorYOn;
 80033b0:	2304      	movs	r3, #4
 80033b2:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                    }
                    if (cJSON_IsArray (objectItem)) {
 80033b6:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 80033b8:	f7fe fc5c 	bl	8001c74 <cJSON_IsArray>
 80033bc:	4603      	mov	r3, r0
 80033be:	2b00      	cmp	r3, #0
 80033c0:	f000 8138 	beq.w	8003634 <MqttMessageArrived+0x3e0>
                        data.spCommand = spCommand;
 80033c4:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 80033c8:	723b      	strb	r3, [r7, #8]
                        arraySize      = cJSON_GetArraySize (objectItem);
 80033ca:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 80033cc:	f7fe fb8c 	bl	8001ae8 <cJSON_GetArraySize>
 80033d0:	4603      	mov	r3, r0
 80033d2:	647b      	str	r3, [r7, #68]	@ 0x44
                        if (arraySize == 2) {
 80033d4:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80033d6:	2b02      	cmp	r3, #2
 80033d8:	f040 812c 	bne.w	8003634 <MqttMessageArrived+0x3e0>
                            for (int i = 0; i < arraySize; i++) {
 80033dc:	2300      	movs	r3, #0
 80033de:	667b      	str	r3, [r7, #100]	@ 0x64
 80033e0:	e015      	b.n	800340e <MqttMessageArrived+0x1ba>
                                cJSON* item = cJSON_GetArrayItem (objectItem, i);
 80033e2:	6e79      	ldr	r1, [r7, #100]	@ 0x64
 80033e4:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 80033e6:	f7fe fbc3 	bl	8001b70 <cJSON_GetArrayItem>
 80033ea:	63b8      	str	r0, [r7, #56]	@ 0x38
                                if (cJSON_IsNumber (item)) {
 80033ec:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
 80033ee:	f7fe fc2a 	bl	8001c46 <cJSON_IsNumber>
 80033f2:	4603      	mov	r3, r0
 80033f4:	2b00      	cmp	r3, #0
 80033f6:	d007      	beq.n	8003408 <MqttMessageArrived+0x1b4>
                                    data.values.integerValues.value[i] = item->valueint;
 80033f8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80033fa:	695a      	ldr	r2, [r3, #20]
 80033fc:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 80033fe:	009b      	lsls	r3, r3, #2
 8003400:	3370      	adds	r3, #112	@ 0x70
 8003402:	443b      	add	r3, r7
 8003404:	f843 2c64 	str.w	r2, [r3, #-100]
                            for (int i = 0; i < arraySize; i++) {
 8003408:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800340a:	3301      	adds	r3, #1
 800340c:	667b      	str	r3, [r7, #100]	@ 0x64
 800340e:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 8003410:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8003412:	429a      	cmp	r2, r3
 8003414:	d8e5      	bhi.n	80033e2 <MqttMessageArrived+0x18e>
                                }
                            }
                        }
                    }
                    break;
 8003416:	e10d      	b.n	8003634 <MqttMessageArrived+0x3e0>
                case diodeTopic:
                    if (cJSON_IsNumber (objectItem)) {
 8003418:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 800341a:	f7fe fc14 	bl	8001c46 <cJSON_IsNumber>
 800341e:	4603      	mov	r3, r0
 8003420:	2b00      	cmp	r3, #0
 8003422:	f000 8109 	beq.w	8003638 <MqttMessageArrived+0x3e4>
                        data.spCommand                     = spSetDiodeOn;
 8003426:	2307      	movs	r3, #7
 8003428:	723b      	strb	r3, [r7, #8]
                        data.values.integerValues.value[0] = objectItem->valueint;
 800342a:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800342c:	695b      	ldr	r3, [r3, #20]
 800342e:	60fb      	str	r3, [r7, #12]
                    }
                    break;
 8003430:	e102      	b.n	8003638 <MqttMessageArrived+0x3e4>
                case motorXMaxCurrentTopic: spCommand = spSetmotorXMaxCurrent;
 8003432:	2305      	movs	r3, #5
 8003434:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                case motorYMaxCurrentTopic:
                    if (cJSON_IsNumber (objectItem)) {
 8003438:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 800343a:	f7fe fc04 	bl	8001c46 <cJSON_IsNumber>
 800343e:	4603      	mov	r3, r0
 8003440:	2b00      	cmp	r3, #0
 8003442:	f000 80fb 	beq.w	800363c <MqttMessageArrived+0x3e8>
                        if (spCommand == spUnknown) {
 8003446:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 800344a:	2b12      	cmp	r3, #18
 800344c:	d102      	bne.n	8003454 <MqttMessageArrived+0x200>
                            spCommand = spSetmotorYMaxCurrent;
 800344e:	2306      	movs	r3, #6
 8003450:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                        }
                        data.spCommand                   = spCommand;
 8003454:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 8003458:	723b      	strb	r3, [r7, #8]
                        data.values.flaotValues.value[0] = objectItem->valuedouble;
 800345a:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800345c:	ed93 7b06 	vldr	d7, [r3, #24]
 8003460:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8003464:	edc7 7a03 	vstr	s15, [r7, #12]
                    }
                    break;
 8003468:	e0e8      	b.n	800363c <MqttMessageArrived+0x3e8>
                case clearPeakElectricalMeasurementsTopic:
                    if (cJSON_IsNumber (objectItem)) {
 800346a:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 800346c:	f7fe fbeb 	bl	8001c46 <cJSON_IsNumber>
 8003470:	4603      	mov	r3, r0
 8003472:	2b00      	cmp	r3, #0
 8003474:	f000 80e4 	beq.w	8003640 <MqttMessageArrived+0x3ec>
                        if (objectItem->valueint == 1) {
 8003478:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800347a:	695b      	ldr	r3, [r3, #20]
 800347c:	2b01      	cmp	r3, #1
 800347e:	f040 80df 	bne.w	8003640 <MqttMessageArrived+0x3ec>
                            data.spCommand = spClearPeakMeasurments;
 8003482:	2308      	movs	r3, #8
 8003484:	723b      	strb	r3, [r7, #8]
                        }
                    }
                    break;
 8003486:	e0db      	b.n	8003640 <MqttMessageArrived+0x3ec>
                case mainBoardRelayTopic:
                    if (cJSON_IsArray (objectItem)) {
 8003488:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 800348a:	f7fe fbf3 	bl	8001c74 <cJSON_IsArray>
 800348e:	4603      	mov	r3, r0
 8003490:	2b00      	cmp	r3, #0
 8003492:	f000 80d7 	beq.w	8003644 <MqttMessageArrived+0x3f0>
                        arraySize = cJSON_GetArraySize (objectItem);
 8003496:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 8003498:	f7fe fb26 	bl	8001ae8 <cJSON_GetArraySize>
 800349c:	4603      	mov	r3, r0
 800349e:	647b      	str	r3, [r7, #68]	@ 0x44
                        if (arraySize == 2) {
 80034a0:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 80034a2:	2b02      	cmp	r3, #2
 80034a4:	f040 80ce 	bne.w	8003644 <MqttMessageArrived+0x3f0>
                            int32_t relayNumber = -1;
 80034a8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80034ac:	663b      	str	r3, [r7, #96]	@ 0x60
                            cJSON* item         = cJSON_GetArrayItem (objectItem, 0);
 80034ae:	2100      	movs	r1, #0
 80034b0:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 80034b2:	f7fe fb5d 	bl	8001b70 <cJSON_GetArrayItem>
 80034b6:	63f8      	str	r0, [r7, #60]	@ 0x3c
                            if (cJSON_IsNumber (item)) {
 80034b8:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 80034ba:	f7fe fbc4 	bl	8001c46 <cJSON_IsNumber>
 80034be:	4603      	mov	r3, r0
 80034c0:	2b00      	cmp	r3, #0
 80034c2:	d002      	beq.n	80034ca <MqttMessageArrived+0x276>
                                relayNumber = item->valueint;
 80034c4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80034c6:	695b      	ldr	r3, [r3, #20]
 80034c8:	663b      	str	r3, [r7, #96]	@ 0x60
                            }
                            int32_t relayTimeOn = 0;
 80034ca:	2300      	movs	r3, #0
 80034cc:	65fb      	str	r3, [r7, #92]	@ 0x5c
                            item                = cJSON_GetArrayItem (objectItem, 1);
 80034ce:	2101      	movs	r1, #1
 80034d0:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 80034d2:	f7fe fb4d 	bl	8001b70 <cJSON_GetArrayItem>
 80034d6:	63f8      	str	r0, [r7, #60]	@ 0x3c
                            if (cJSON_IsNumber (item)) {
 80034d8:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 80034da:	f7fe fbb4 	bl	8001c46 <cJSON_IsNumber>
 80034de:	4603      	mov	r3, r0
 80034e0:	2b00      	cmp	r3, #0
 80034e2:	d002      	beq.n	80034ea <MqttMessageArrived+0x296>
                                relayTimeOn = item->valueint;
 80034e4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80034e6:	695b      	ldr	r3, [r3, #20]
 80034e8:	65fb      	str	r3, [r7, #92]	@ 0x5c
                            }
                            RelayCtrl (relayNumber, relayTimeOn);
 80034ea:	6df9      	ldr	r1, [r7, #92]	@ 0x5c
 80034ec:	6e38      	ldr	r0, [r7, #96]	@ 0x60
 80034ee:	f7ff fdff 	bl	80030f0 <RelayCtrl>
                        }
                    }
                    break;
 80034f2:	e0a7      	b.n	8003644 <MqttMessageArrived+0x3f0>
                case setEncoderXValue:
                    if (cJSON_IsNumber (objectItem)) {
 80034f4:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 80034f6:	f7fe fba6 	bl	8001c46 <cJSON_IsNumber>
 80034fa:	4603      	mov	r3, r0
 80034fc:	2b00      	cmp	r3, #0
 80034fe:	f000 80a3 	beq.w	8003648 <MqttMessageArrived+0x3f4>
                        data.spCommand                   = spSetEncoderXValue;
 8003502:	2309      	movs	r3, #9
 8003504:	723b      	strb	r3, [r7, #8]
                        data.values.flaotValues.value[0] = objectItem->valuedouble;
 8003506:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8003508:	ed93 7b06 	vldr	d7, [r3, #24]
 800350c:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8003510:	edc7 7a03 	vstr	s15, [r7, #12]
                    }
                    break;
 8003514:	e098      	b.n	8003648 <MqttMessageArrived+0x3f4>
                case setEncoderYValue:
                    if (cJSON_IsNumber (objectItem)) {
 8003516:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 8003518:	f7fe fb95 	bl	8001c46 <cJSON_IsNumber>
 800351c:	4603      	mov	r3, r0
 800351e:	2b00      	cmp	r3, #0
 8003520:	f000 8094 	beq.w	800364c <MqttMessageArrived+0x3f8>
                        data.spCommand                   = spSetEncoderYValue;
 8003524:	230a      	movs	r3, #10
 8003526:	723b      	strb	r3, [r7, #8]
                        data.values.flaotValues.value[0] = objectItem->valuedouble;
 8003528:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800352a:	ed93 7b06 	vldr	d7, [r3, #24]
 800352e:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 8003532:	edc7 7a03 	vstr	s15, [r7, #12]
                    }
                    break;
 8003536:	e089      	b.n	800364c <MqttMessageArrived+0x3f8>
                case setVoltageMeasGains: spCommand = spSetVoltageMeasGains;
 8003538:	230b      	movs	r3, #11
 800353a:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                case setVoltageMeasOffsets:
                    if (spCommand == spUnknown) {
 800353e:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 8003542:	2b12      	cmp	r3, #18
 8003544:	d102      	bne.n	800354c <MqttMessageArrived+0x2f8>
                        spCommand = spSetVoltageMeasOffsets;
 8003546:	230c      	movs	r3, #12
 8003548:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                    }
                case setCurrentMeasGains:
                    if (spCommand == spUnknown) {
 800354c:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 8003550:	2b12      	cmp	r3, #18
 8003552:	d102      	bne.n	800355a <MqttMessageArrived+0x306>
                        spCommand = spSetCurrentMeasGains;
 8003554:	230d      	movs	r3, #13
 8003556:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                    }
                case setCurrentMeasOffsets:
                    if (spCommand == spUnknown) {
 800355a:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 800355e:	2b12      	cmp	r3, #18
 8003560:	d102      	bne.n	8003568 <MqttMessageArrived+0x314>
                        spCommand = spSetCurrentMeasOffsets;
 8003562:	230e      	movs	r3, #14
 8003564:	f887 306f 	strb.w	r3, [r7, #111]	@ 0x6f
                    }
                    if (cJSON_IsArray (objectItem)) {
 8003568:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 800356a:	f7fe fb83 	bl	8001c74 <cJSON_IsArray>
 800356e:	4603      	mov	r3, r0
 8003570:	2b00      	cmp	r3, #0
 8003572:	d06d      	beq.n	8003650 <MqttMessageArrived+0x3fc>
                        data.spCommand = spCommand;
 8003574:	f897 306f 	ldrb.w	r3, [r7, #111]	@ 0x6f
 8003578:	723b      	strb	r3, [r7, #8]
                        arraySize      = cJSON_GetArraySize (objectItem);
 800357a:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 800357c:	f7fe fab4 	bl	8001ae8 <cJSON_GetArraySize>
 8003580:	4603      	mov	r3, r0
 8003582:	647b      	str	r3, [r7, #68]	@ 0x44
                        if (arraySize == 3) {
 8003584:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8003586:	2b03      	cmp	r3, #3
 8003588:	d162      	bne.n	8003650 <MqttMessageArrived+0x3fc>
                            for (int i = 0; i < arraySize; i++) {
 800358a:	2300      	movs	r3, #0
 800358c:	65bb      	str	r3, [r7, #88]	@ 0x58
 800358e:	e01d      	b.n	80035cc <MqttMessageArrived+0x378>
 8003590:	08031c6c 	.word	0x08031c6c
 8003594:	08031c80 	.word	0x08031c80
                                cJSON* item = cJSON_GetArrayItem (objectItem, i);
 8003598:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 800359a:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 800359c:	f7fe fae8 	bl	8001b70 <cJSON_GetArrayItem>
 80035a0:	6438      	str	r0, [r7, #64]	@ 0x40
                                if (cJSON_IsNumber (item)) {
 80035a2:	6c38      	ldr	r0, [r7, #64]	@ 0x40
 80035a4:	f7fe fb4f 	bl	8001c46 <cJSON_IsNumber>
 80035a8:	4603      	mov	r3, r0
 80035aa:	2b00      	cmp	r3, #0
 80035ac:	d00b      	beq.n	80035c6 <MqttMessageArrived+0x372>
                                    data.values.flaotValues.value[i] = item->valuedouble;
 80035ae:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80035b0:	ed93 7b06 	vldr	d7, [r3, #24]
 80035b4:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 80035b8:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 80035ba:	009b      	lsls	r3, r3, #2
 80035bc:	3370      	adds	r3, #112	@ 0x70
 80035be:	443b      	add	r3, r7
 80035c0:	3b64      	subs	r3, #100	@ 0x64
 80035c2:	edc3 7a00 	vstr	s15, [r3]
                            for (int i = 0; i < arraySize; i++) {
 80035c6:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 80035c8:	3301      	adds	r3, #1
 80035ca:	65bb      	str	r3, [r7, #88]	@ 0x58
 80035cc:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 80035ce:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 80035d0:	429a      	cmp	r2, r3
 80035d2:	d8e1      	bhi.n	8003598 <MqttMessageArrived+0x344>
                                }
                            }
                        }
                    }
                    break;
 80035d4:	e03c      	b.n	8003650 <MqttMessageArrived+0x3fc>
                case resetSystem:
                    if (cJSON_IsNumber (objectItem)) {
 80035d6:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 80035d8:	f7fe fb35 	bl	8001c46 <cJSON_IsNumber>
 80035dc:	4603      	mov	r3, r0
 80035de:	2b00      	cmp	r3, #0
 80035e0:	d038      	beq.n	8003654 <MqttMessageArrived+0x400>
                        if (objectItem->valueint == 1) {
 80035e2:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 80035e4:	695b      	ldr	r3, [r3, #20]
 80035e6:	2b01      	cmp	r3, #1
 80035e8:	d134      	bne.n	8003654 <MqttMessageArrived+0x400>
                            data.spCommand = spResetSystem;
 80035ea:	230f      	movs	r3, #15
 80035ec:	723b      	strb	r3, [r7, #8]
                            break;
 80035ee:	e036      	b.n	800365e <MqttMessageArrived+0x40a>
                        }
                    }
                    break;
                case setPositionX:
                    if (cJSON_IsNumber (objectItem)) {
 80035f0:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 80035f2:	f7fe fb28 	bl	8001c46 <cJSON_IsNumber>
 80035f6:	4603      	mov	r3, r0
 80035f8:	2b00      	cmp	r3, #0
 80035fa:	d02d      	beq.n	8003658 <MqttMessageArrived+0x404>
                        data.spCommand                   = spSetPositonX;
 80035fc:	2310      	movs	r3, #16
 80035fe:	723b      	strb	r3, [r7, #8]
                        data.values.flaotValues.value[0] = objectItem->valuedouble;
 8003600:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8003602:	ed93 7b06 	vldr	d7, [r3, #24]
 8003606:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 800360a:	edc7 7a03 	vstr	s15, [r7, #12]
                    }
                	break;
 800360e:	e023      	b.n	8003658 <MqttMessageArrived+0x404>
                case setPositionY:
                    if (cJSON_IsNumber (objectItem)) {
 8003610:	6cb8      	ldr	r0, [r7, #72]	@ 0x48
 8003612:	f7fe fb18 	bl	8001c46 <cJSON_IsNumber>
 8003616:	4603      	mov	r3, r0
 8003618:	2b00      	cmp	r3, #0
 800361a:	d01f      	beq.n	800365c <MqttMessageArrived+0x408>
                        data.spCommand                   = spSetPositonY;
 800361c:	2311      	movs	r3, #17
 800361e:	723b      	strb	r3, [r7, #8]
                        data.values.flaotValues.value[0] = objectItem->valuedouble;
 8003620:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8003622:	ed93 7b06 	vldr	d7, [r3, #24]
 8003626:	eef7 7bc7 	vcvt.f32.f64	s15, d7
 800362a:	edc7 7a03 	vstr	s15, [r7, #12]
                    }
                	break;
 800362e:	e015      	b.n	800365c <MqttMessageArrived+0x408>
                default: break;
 8003630:	bf00      	nop
 8003632:	e014      	b.n	800365e <MqttMessageArrived+0x40a>
                    break;
 8003634:	bf00      	nop
 8003636:	e012      	b.n	800365e <MqttMessageArrived+0x40a>
                    break;
 8003638:	bf00      	nop
 800363a:	e010      	b.n	800365e <MqttMessageArrived+0x40a>
                    break;
 800363c:	bf00      	nop
 800363e:	e00e      	b.n	800365e <MqttMessageArrived+0x40a>
                    break;
 8003640:	bf00      	nop
 8003642:	e00c      	b.n	800365e <MqttMessageArrived+0x40a>
                    break;
 8003644:	bf00      	nop
 8003646:	e00a      	b.n	800365e <MqttMessageArrived+0x40a>
                    break;
 8003648:	bf00      	nop
 800364a:	e008      	b.n	800365e <MqttMessageArrived+0x40a>
                    break;
 800364c:	bf00      	nop
 800364e:	e006      	b.n	800365e <MqttMessageArrived+0x40a>
                    break;
 8003650:	bf00      	nop
 8003652:	e004      	b.n	800365e <MqttMessageArrived+0x40a>
                    break;
 8003654:	bf00      	nop
 8003656:	e002      	b.n	800365e <MqttMessageArrived+0x40a>
                	break;
 8003658:	bf00      	nop
 800365a:	e000      	b.n	800365e <MqttMessageArrived+0x40a>
                	break;
 800365c:	bf00      	nop
        for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 800365e:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 8003660:	3301      	adds	r3, #1
 8003662:	66bb      	str	r3, [r7, #104]	@ 0x68
 8003664:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 8003666:	2b10      	cmp	r3, #16
 8003668:	f77f ae5a 	ble.w	8003320 <MqttMessageArrived+0xcc>
 800366c:	e01b      	b.n	80036a6 <MqttMessageArrived+0x452>
                }
            }
        }
    } else {
        for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 800366e:	2300      	movs	r3, #0
 8003670:	657b      	str	r3, [r7, #84]	@ 0x54
 8003672:	e015      	b.n	80036a0 <MqttMessageArrived+0x44c>
            objectItem = cJSON_GetObjectItemCaseSensitive (json, topicCommands[topicCmdNumber]);
 8003674:	4a3e      	ldr	r2, [pc, #248]	@ (8003770 <MqttMessageArrived+0x51c>)
 8003676:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 8003678:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 800367c:	4619      	mov	r1, r3
 800367e:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8003680:	f7fe fad2 	bl	8001c28 <cJSON_GetObjectItemCaseSensitive>
 8003684:	64b8      	str	r0, [r7, #72]	@ 0x48
            if (objectItem != NULL) {
 8003686:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8003688:	2b00      	cmp	r3, #0
 800368a:	d006      	beq.n	800369a <MqttMessageArrived+0x446>
                if (topicCmdNumber == resetSystem) {
 800368c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800368e:	2b0e      	cmp	r3, #14
 8003690:	d103      	bne.n	800369a <MqttMessageArrived+0x446>
  __ASM volatile ("cpsid i" : : : "memory");
 8003692:	b672      	cpsid	i
}
 8003694:	bf00      	nop
                    __disable_irq ();
                    NVIC_SystemReset ();
 8003696:	f7ff f861 	bl	800275c <__NVIC_SystemReset>
        for (int topicCmdNumber = 0; topicCmdNumber < MAX_COMMANDS_IN_MQTT_PAYLOAD; topicCmdNumber++) {
 800369a:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800369c:	3301      	adds	r3, #1
 800369e:	657b      	str	r3, [r7, #84]	@ 0x54
 80036a0:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 80036a2:	2b10      	cmp	r3, #16
 80036a4:	dde6      	ble.n	8003674 <MqttMessageArrived+0x420>
                }
            }
        }
    }

    switch (topicForBoard) {
 80036a6:	f897 306e 	ldrb.w	r3, [r7, #110]	@ 0x6e
 80036aa:	2b04      	cmp	r3, #4
 80036ac:	d84c      	bhi.n	8003748 <MqttMessageArrived+0x4f4>
 80036ae:	a201      	add	r2, pc, #4	@ (adr r2, 80036b4 <MqttMessageArrived+0x460>)
 80036b0:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80036b4:	08003749 	.word	0x08003749
 80036b8:	080036c9 	.word	0x080036c9
 80036bc:	080036e9 	.word	0x080036e9
 80036c0:	08003709 	.word	0x08003709
 80036c4:	08003729 	.word	0x08003729
    case main_board: break;
    case board_1:
#ifdef USE_UART8_INSTEAD_UART1
        if (uart8TaskData.sendCmdToSlaveQueue != NULL) {
 80036c8:	4b2a      	ldr	r3, [pc, #168]	@ (8003774 <MqttMessageArrived+0x520>)
 80036ca:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80036cc:	2b00      	cmp	r3, #0
 80036ce:	d007      	beq.n	80036e0 <MqttMessageArrived+0x48c>
            osMessageQueuePut (uart8TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 80036d0:	4b28      	ldr	r3, [pc, #160]	@ (8003774 <MqttMessageArrived+0x520>)
 80036d2:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 80036d4:	f107 0108 	add.w	r1, r7, #8
 80036d8:	2364      	movs	r3, #100	@ 0x64
 80036da:	2200      	movs	r2, #0
 80036dc:	f00e fb92 	bl	8011e04 <osMessageQueuePut>
#else
        if (uart1TaskData.sendCmdToSlaveQueue != NULL) {
            osMessageQueuePut (uart1TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
        }
#endif
        printf ("Send cmd to board 1\n");
 80036e0:	4825      	ldr	r0, [pc, #148]	@ (8003778 <MqttMessageArrived+0x524>)
 80036e2:	f027 fa23 	bl	802ab2c <puts>
        break;
 80036e6:	e030      	b.n	800374a <MqttMessageArrived+0x4f6>
    case board_2:
        if (uart3TaskData.sendCmdToSlaveQueue != NULL) {
 80036e8:	4b24      	ldr	r3, [pc, #144]	@ (800377c <MqttMessageArrived+0x528>)
 80036ea:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80036ec:	2b00      	cmp	r3, #0
 80036ee:	d007      	beq.n	8003700 <MqttMessageArrived+0x4ac>
            osMessageQueuePut (uart3TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 80036f0:	4b22      	ldr	r3, [pc, #136]	@ (800377c <MqttMessageArrived+0x528>)
 80036f2:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 80036f4:	f107 0108 	add.w	r1, r7, #8
 80036f8:	2364      	movs	r3, #100	@ 0x64
 80036fa:	2200      	movs	r2, #0
 80036fc:	f00e fb82 	bl	8011e04 <osMessageQueuePut>
        }
        printf ("Send cmd to board 2\n");
 8003700:	481f      	ldr	r0, [pc, #124]	@ (8003780 <MqttMessageArrived+0x52c>)
 8003702:	f027 fa13 	bl	802ab2c <puts>
        break;
 8003706:	e020      	b.n	800374a <MqttMessageArrived+0x4f6>
    case board_3:
        if (uart6TaskData.sendCmdToSlaveQueue != NULL) {
 8003708:	4b1e      	ldr	r3, [pc, #120]	@ (8003784 <MqttMessageArrived+0x530>)
 800370a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800370c:	2b00      	cmp	r3, #0
 800370e:	d007      	beq.n	8003720 <MqttMessageArrived+0x4cc>
            osMessageQueuePut (uart6TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8003710:	4b1c      	ldr	r3, [pc, #112]	@ (8003784 <MqttMessageArrived+0x530>)
 8003712:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8003714:	f107 0108 	add.w	r1, r7, #8
 8003718:	2364      	movs	r3, #100	@ 0x64
 800371a:	2200      	movs	r2, #0
 800371c:	f00e fb72 	bl	8011e04 <osMessageQueuePut>
        }
        printf ("Send cmd to board 3\n");
 8003720:	4819      	ldr	r0, [pc, #100]	@ (8003788 <MqttMessageArrived+0x534>)
 8003722:	f027 fa03 	bl	802ab2c <puts>
        break;
 8003726:	e010      	b.n	800374a <MqttMessageArrived+0x4f6>
    case board_4:
        if (uart2TaskData.sendCmdToSlaveQueue != NULL) {
 8003728:	4b18      	ldr	r3, [pc, #96]	@ (800378c <MqttMessageArrived+0x538>)
 800372a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800372c:	2b00      	cmp	r3, #0
 800372e:	d007      	beq.n	8003740 <MqttMessageArrived+0x4ec>
            osMessageQueuePut (uart2TaskData.sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8003730:	4b16      	ldr	r3, [pc, #88]	@ (800378c <MqttMessageArrived+0x538>)
 8003732:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8003734:	f107 0108 	add.w	r1, r7, #8
 8003738:	2364      	movs	r3, #100	@ 0x64
 800373a:	2200      	movs	r2, #0
 800373c:	f00e fb62 	bl	8011e04 <osMessageQueuePut>
        }
        printf ("Send cmd to board 4\n");
 8003740:	4813      	ldr	r0, [pc, #76]	@ (8003790 <MqttMessageArrived+0x53c>)
 8003742:	f027 f9f3 	bl	802ab2c <puts>
        break;
 8003746:	e000      	b.n	800374a <MqttMessageArrived+0x4f6>
    default: break;
 8003748:	bf00      	nop
    }

    cJSON_Delete (json);
 800374a:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 800374c:	f7fd fa1e 	bl	8000b8c <cJSON_Delete>
    printf ("MQTT Topic:%s, MSG[%d]:%s\n", topicName, (int)message->payloadlen, (char*)message->payload);
 8003750:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8003752:	68db      	ldr	r3, [r3, #12]
 8003754:	461a      	mov	r2, r3
 8003756:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8003758:	689b      	ldr	r3, [r3, #8]
 800375a:	f107 0118 	add.w	r1, r7, #24
 800375e:	480d      	ldr	r0, [pc, #52]	@ (8003794 <MqttMessageArrived+0x540>)
 8003760:	f027 f97c 	bl	802aa5c <iprintf>
 8003764:	e000      	b.n	8003768 <MqttMessageArrived+0x514>
        return;
 8003766:	bf00      	nop
}
 8003768:	3770      	adds	r7, #112	@ 0x70
 800376a:	46bd      	mov	sp, r7
 800376c:	bd80      	pop	{r7, pc}
 800376e:	bf00      	nop
 8003770:	08031c80 	.word	0x08031c80
 8003774:	24001fdc 	.word	0x24001fdc
 8003778:	0802daf0 	.word	0x0802daf0
 800377c:	24001f34 	.word	0x24001f34
 8003780:	0802db04 	.word	0x0802db04
 8003784:	24001f6c 	.word	0x24001f6c
 8003788:	0802db18 	.word	0x0802db18
 800378c:	24001fa4 	.word	0x24001fa4
 8003790:	0802db2c 	.word	0x0802db2c
 8003794:	0802db40 	.word	0x0802db40

08003798 <mqtt_cli_init>:

void mqtt_cli_init (void) {
 8003798:	b580      	push	{r7, lr}
 800379a:	af00      	add	r7, sp, #0
    mqttClientSubTaskHandle = osThreadNew (MqttClientSubTask, NULL, &mqttClientSubTaskAttr); // subscribe task
 800379c:	4a08      	ldr	r2, [pc, #32]	@ (80037c0 <mqtt_cli_init+0x28>)
 800379e:	2100      	movs	r1, #0
 80037a0:	4808      	ldr	r0, [pc, #32]	@ (80037c4 <mqtt_cli_init+0x2c>)
 80037a2:	f00d feba 	bl	801151a <osThreadNew>
 80037a6:	4603      	mov	r3, r0
 80037a8:	4a07      	ldr	r2, [pc, #28]	@ (80037c8 <mqtt_cli_init+0x30>)
 80037aa:	6013      	str	r3, [r2, #0]
    mqttClientPubTaskHandle = osThreadNew (MqttClientPubTask, NULL, &mqttClientPubTaskAttr); // publish task
 80037ac:	4a07      	ldr	r2, [pc, #28]	@ (80037cc <mqtt_cli_init+0x34>)
 80037ae:	2100      	movs	r1, #0
 80037b0:	4807      	ldr	r0, [pc, #28]	@ (80037d0 <mqtt_cli_init+0x38>)
 80037b2:	f00d feb2 	bl	801151a <osThreadNew>
 80037b6:	4603      	mov	r3, r0
 80037b8:	4a06      	ldr	r2, [pc, #24]	@ (80037d4 <mqtt_cli_init+0x3c>)
 80037ba:	6013      	str	r3, [r2, #0]
}
 80037bc:	bf00      	nop
 80037be:	bd80      	pop	{r7, pc}
 80037c0:	08031cc4 	.word	0x08031cc4
 80037c4:	08002789 	.word	0x08002789
 80037c8:	24000728 	.word	0x24000728
 80037cc:	08031ce8 	.word	0x08031ce8
 80037d0:	08002811 	.word	0x08002811
 80037d4:	2400072c 	.word	0x2400072c

080037d8 <WriteDataToBuffer>:
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
    }
    *buffPos = newBuffPos;
}

void WriteDataToBuffer (uint8_t* buff, uint16_t* buffPos, void* data, uint8_t dataSize) {
 80037d8:	b480      	push	{r7}
 80037da:	b089      	sub	sp, #36	@ 0x24
 80037dc:	af00      	add	r7, sp, #0
 80037de:	60f8      	str	r0, [r7, #12]
 80037e0:	60b9      	str	r1, [r7, #8]
 80037e2:	607a      	str	r2, [r7, #4]
 80037e4:	70fb      	strb	r3, [r7, #3]
    uint32_t* uDataPtr = data;
 80037e6:	687b      	ldr	r3, [r7, #4]
 80037e8:	61bb      	str	r3, [r7, #24]
    uint32_t uData     = *uDataPtr;
 80037ea:	69bb      	ldr	r3, [r7, #24]
 80037ec:	681b      	ldr	r3, [r3, #0]
 80037ee:	617b      	str	r3, [r7, #20]
    uint8_t i          = 0;
 80037f0:	2300      	movs	r3, #0
 80037f2:	77fb      	strb	r3, [r7, #31]
    uint8_t newBuffPos = *buffPos;
 80037f4:	68bb      	ldr	r3, [r7, #8]
 80037f6:	881b      	ldrh	r3, [r3, #0]
 80037f8:	77bb      	strb	r3, [r7, #30]
    for (i = 0; i < dataSize; i++) {
 80037fa:	2300      	movs	r3, #0
 80037fc:	77fb      	strb	r3, [r7, #31]
 80037fe:	e00e      	b.n	800381e <WriteDataToBuffer+0x46>
        buff[newBuffPos++] = (uint8_t)((uData >> (i * 8)) & 0xFF);
 8003800:	7ffb      	ldrb	r3, [r7, #31]
 8003802:	00db      	lsls	r3, r3, #3
 8003804:	697a      	ldr	r2, [r7, #20]
 8003806:	40da      	lsrs	r2, r3
 8003808:	7fbb      	ldrb	r3, [r7, #30]
 800380a:	1c59      	adds	r1, r3, #1
 800380c:	77b9      	strb	r1, [r7, #30]
 800380e:	4619      	mov	r1, r3
 8003810:	68fb      	ldr	r3, [r7, #12]
 8003812:	440b      	add	r3, r1
 8003814:	b2d2      	uxtb	r2, r2
 8003816:	701a      	strb	r2, [r3, #0]
    for (i = 0; i < dataSize; i++) {
 8003818:	7ffb      	ldrb	r3, [r7, #31]
 800381a:	3301      	adds	r3, #1
 800381c:	77fb      	strb	r3, [r7, #31]
 800381e:	7ffa      	ldrb	r2, [r7, #31]
 8003820:	78fb      	ldrb	r3, [r7, #3]
 8003822:	429a      	cmp	r2, r3
 8003824:	d3ec      	bcc.n	8003800 <WriteDataToBuffer+0x28>
    }
    *buffPos = newBuffPos;
 8003826:	7fbb      	ldrb	r3, [r7, #30]
 8003828:	b29a      	uxth	r2, r3
 800382a:	68bb      	ldr	r3, [r7, #8]
 800382c:	801a      	strh	r2, [r3, #0]
}
 800382e:	bf00      	nop
 8003830:	3724      	adds	r7, #36	@ 0x24
 8003832:	46bd      	mov	sp, r7
 8003834:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003838:	4770      	bx	lr

0800383a <ReadFloatFromBuffer>:

void ReadFloatFromBuffer(uint8_t* buff, uint16_t* buffPos, float* data)
{
 800383a:	b480      	push	{r7}
 800383c:	b087      	sub	sp, #28
 800383e:	af00      	add	r7, sp, #0
 8003840:	60f8      	str	r0, [r7, #12]
 8003842:	60b9      	str	r1, [r7, #8]
 8003844:	607a      	str	r2, [r7, #4]
	uint32_t* word =  (uint32_t *)data;
 8003846:	687b      	ldr	r3, [r7, #4]
 8003848:	617b      	str	r3, [r7, #20]
	*word = CONVERT_BYTES_TO_WORD(&buff[*buffPos]);
 800384a:	68bb      	ldr	r3, [r7, #8]
 800384c:	881b      	ldrh	r3, [r3, #0]
 800384e:	3303      	adds	r3, #3
 8003850:	68fa      	ldr	r2, [r7, #12]
 8003852:	4413      	add	r3, r2
 8003854:	781b      	ldrb	r3, [r3, #0]
 8003856:	061a      	lsls	r2, r3, #24
 8003858:	68bb      	ldr	r3, [r7, #8]
 800385a:	881b      	ldrh	r3, [r3, #0]
 800385c:	3302      	adds	r3, #2
 800385e:	68f9      	ldr	r1, [r7, #12]
 8003860:	440b      	add	r3, r1
 8003862:	781b      	ldrb	r3, [r3, #0]
 8003864:	041b      	lsls	r3, r3, #16
 8003866:	431a      	orrs	r2, r3
 8003868:	68bb      	ldr	r3, [r7, #8]
 800386a:	881b      	ldrh	r3, [r3, #0]
 800386c:	3301      	adds	r3, #1
 800386e:	68f9      	ldr	r1, [r7, #12]
 8003870:	440b      	add	r3, r1
 8003872:	781b      	ldrb	r3, [r3, #0]
 8003874:	021b      	lsls	r3, r3, #8
 8003876:	4313      	orrs	r3, r2
 8003878:	68ba      	ldr	r2, [r7, #8]
 800387a:	8812      	ldrh	r2, [r2, #0]
 800387c:	4611      	mov	r1, r2
 800387e:	68fa      	ldr	r2, [r7, #12]
 8003880:	440a      	add	r2, r1
 8003882:	7812      	ldrb	r2, [r2, #0]
 8003884:	4313      	orrs	r3, r2
 8003886:	461a      	mov	r2, r3
 8003888:	697b      	ldr	r3, [r7, #20]
 800388a:	601a      	str	r2, [r3, #0]
	*buffPos += sizeof(float);
 800388c:	68bb      	ldr	r3, [r7, #8]
 800388e:	881b      	ldrh	r3, [r3, #0]
 8003890:	3304      	adds	r3, #4
 8003892:	b29a      	uxth	r2, r3
 8003894:	68bb      	ldr	r3, [r7, #8]
 8003896:	801a      	strh	r2, [r3, #0]
}
 8003898:	bf00      	nop
 800389a:	371c      	adds	r7, #28
 800389c:	46bd      	mov	sp, r7
 800389e:	f85d 7b04 	ldr.w	r7, [sp], #4
 80038a2:	4770      	bx	lr

080038a4 <ReadByteFromBufer>:
	*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
	*buffPos += sizeof(uint32_t);
}

void ReadByteFromBufer(uint8_t* buff, uint16_t* buffPos, uint8_t* data)
{
 80038a4:	b480      	push	{r7}
 80038a6:	b085      	sub	sp, #20
 80038a8:	af00      	add	r7, sp, #0
 80038aa:	60f8      	str	r0, [r7, #12]
 80038ac:	60b9      	str	r1, [r7, #8]
 80038ae:	607a      	str	r2, [r7, #4]
	*data = CONVERT_BYTES_TO_SHORT_WORD(&buff[*buffPos]);
 80038b0:	68bb      	ldr	r3, [r7, #8]
 80038b2:	881b      	ldrh	r3, [r3, #0]
 80038b4:	3301      	adds	r3, #1
 80038b6:	68fa      	ldr	r2, [r7, #12]
 80038b8:	4413      	add	r3, r2
 80038ba:	781b      	ldrb	r3, [r3, #0]
 80038bc:	021b      	lsls	r3, r3, #8
 80038be:	b25a      	sxtb	r2, r3
 80038c0:	68bb      	ldr	r3, [r7, #8]
 80038c2:	881b      	ldrh	r3, [r3, #0]
 80038c4:	4619      	mov	r1, r3
 80038c6:	68fb      	ldr	r3, [r7, #12]
 80038c8:	440b      	add	r3, r1
 80038ca:	781b      	ldrb	r3, [r3, #0]
 80038cc:	b25b      	sxtb	r3, r3
 80038ce:	4313      	orrs	r3, r2
 80038d0:	b25b      	sxtb	r3, r3
 80038d2:	b2da      	uxtb	r2, r3
 80038d4:	687b      	ldr	r3, [r7, #4]
 80038d6:	701a      	strb	r2, [r3, #0]
	*buffPos += sizeof(uint8_t);
 80038d8:	68bb      	ldr	r3, [r7, #8]
 80038da:	881b      	ldrh	r3, [r3, #0]
 80038dc:	3301      	adds	r3, #1
 80038de:	b29a      	uxth	r2, r3
 80038e0:	68bb      	ldr	r3, [r7, #8]
 80038e2:	801a      	strh	r2, [r3, #0]
}
 80038e4:	bf00      	nop
 80038e6:	3714      	adds	r7, #20
 80038e8:	46bd      	mov	sp, r7
 80038ea:	f85d 7b04 	ldr.w	r7, [sp], #4
 80038ee:	4770      	bx	lr

080038f0 <PrepareReqFrame>:

uint16_t PrepareReqFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, uint8_t* dataBuffer, uint16_t dataLength) {
 80038f0:	b580      	push	{r7, lr}
 80038f2:	b086      	sub	sp, #24
 80038f4:	af00      	add	r7, sp, #0
 80038f6:	60f8      	str	r0, [r7, #12]
 80038f8:	607b      	str	r3, [r7, #4]
 80038fa:	460b      	mov	r3, r1
 80038fc:	817b      	strh	r3, [r7, #10]
 80038fe:	4613      	mov	r3, r2
 8003900:	727b      	strb	r3, [r7, #9]
    uint16_t crc         = 0;
 8003902:	2300      	movs	r3, #0
 8003904:	82bb      	strh	r3, [r7, #20]
    uint16_t txBufferPos = 0;
 8003906:	2300      	movs	r3, #0
 8003908:	82fb      	strh	r3, [r7, #22]
    uint16_t frameCmd    = ((uint16_t)frameCommand);
 800390a:	7a7b      	ldrb	r3, [r7, #9]
 800390c:	827b      	strh	r3, [r7, #18]

    memset (txBuffer, 0x00, dataLength);
 800390e:	8c3b      	ldrh	r3, [r7, #32]
 8003910:	461a      	mov	r2, r3
 8003912:	2100      	movs	r1, #0
 8003914:	68f8      	ldr	r0, [r7, #12]
 8003916:	f027 fa33 	bl	802ad80 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 800391a:	8afb      	ldrh	r3, [r7, #22]
 800391c:	1c5a      	adds	r2, r3, #1
 800391e:	82fa      	strh	r2, [r7, #22]
 8003920:	461a      	mov	r2, r3
 8003922:	68fb      	ldr	r3, [r7, #12]
 8003924:	4413      	add	r3, r2
 8003926:	22aa      	movs	r2, #170	@ 0xaa
 8003928:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 800392a:	8afb      	ldrh	r3, [r7, #22]
 800392c:	1c5a      	adds	r2, r3, #1
 800392e:	82fa      	strh	r2, [r7, #22]
 8003930:	461a      	mov	r2, r3
 8003932:	68fb      	ldr	r3, [r7, #12]
 8003934:	4413      	add	r3, r2
 8003936:	897a      	ldrh	r2, [r7, #10]
 8003938:	b2d2      	uxtb	r2, r2
 800393a:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 800393c:	897b      	ldrh	r3, [r7, #10]
 800393e:	0a1b      	lsrs	r3, r3, #8
 8003940:	b29a      	uxth	r2, r3
 8003942:	8afb      	ldrh	r3, [r7, #22]
 8003944:	1c59      	adds	r1, r3, #1
 8003946:	82f9      	strh	r1, [r7, #22]
 8003948:	4619      	mov	r1, r3
 800394a:	68fb      	ldr	r3, [r7, #12]
 800394c:	440b      	add	r3, r1
 800394e:	b2d2      	uxtb	r2, r2
 8003950:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 8003952:	8afb      	ldrh	r3, [r7, #22]
 8003954:	1c5a      	adds	r2, r3, #1
 8003956:	82fa      	strh	r2, [r7, #22]
 8003958:	461a      	mov	r2, r3
 800395a:	68fb      	ldr	r3, [r7, #12]
 800395c:	4413      	add	r3, r2
 800395e:	8a7a      	ldrh	r2, [r7, #18]
 8003960:	b2d2      	uxtb	r2, r2
 8003962:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 8003964:	8a7b      	ldrh	r3, [r7, #18]
 8003966:	0a1b      	lsrs	r3, r3, #8
 8003968:	b29a      	uxth	r2, r3
 800396a:	8afb      	ldrh	r3, [r7, #22]
 800396c:	1c59      	adds	r1, r3, #1
 800396e:	82f9      	strh	r1, [r7, #22]
 8003970:	4619      	mov	r1, r3
 8003972:	68fb      	ldr	r3, [r7, #12]
 8003974:	440b      	add	r3, r1
 8003976:	b2d2      	uxtb	r2, r2
 8003978:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 800397a:	8afb      	ldrh	r3, [r7, #22]
 800397c:	1c5a      	adds	r2, r3, #1
 800397e:	82fa      	strh	r2, [r7, #22]
 8003980:	461a      	mov	r2, r3
 8003982:	68fb      	ldr	r3, [r7, #12]
 8003984:	4413      	add	r3, r2
 8003986:	8c3a      	ldrh	r2, [r7, #32]
 8003988:	b2d2      	uxtb	r2, r2
 800398a:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 800398c:	8c3b      	ldrh	r3, [r7, #32]
 800398e:	0a1b      	lsrs	r3, r3, #8
 8003990:	b29a      	uxth	r2, r3
 8003992:	8afb      	ldrh	r3, [r7, #22]
 8003994:	1c59      	adds	r1, r3, #1
 8003996:	82f9      	strh	r1, [r7, #22]
 8003998:	4619      	mov	r1, r3
 800399a:	68fb      	ldr	r3, [r7, #12]
 800399c:	440b      	add	r3, r1
 800399e:	b2d2      	uxtb	r2, r2
 80039a0:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = 0x00;
 80039a2:	8afb      	ldrh	r3, [r7, #22]
 80039a4:	1c5a      	adds	r2, r3, #1
 80039a6:	82fa      	strh	r2, [r7, #22]
 80039a8:	461a      	mov	r2, r3
 80039aa:	68fb      	ldr	r3, [r7, #12]
 80039ac:	4413      	add	r3, r2
 80039ae:	2200      	movs	r2, #0
 80039b0:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 80039b2:	8c3b      	ldrh	r3, [r7, #32]
 80039b4:	2b00      	cmp	r3, #0
 80039b6:	d00b      	beq.n	80039d0 <PrepareReqFrame+0xe0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 80039b8:	8afb      	ldrh	r3, [r7, #22]
 80039ba:	68fa      	ldr	r2, [r7, #12]
 80039bc:	4413      	add	r3, r2
 80039be:	8c3a      	ldrh	r2, [r7, #32]
 80039c0:	6879      	ldr	r1, [r7, #4]
 80039c2:	4618      	mov	r0, r3
 80039c4:	f027 fad3 	bl	802af6e <memcpy>
        txBufferPos += dataLength;
 80039c8:	8afa      	ldrh	r2, [r7, #22]
 80039ca:	8c3b      	ldrh	r3, [r7, #32]
 80039cc:	4413      	add	r3, r2
 80039ce:	82fb      	strh	r3, [r7, #22]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 80039d0:	8afb      	ldrh	r3, [r7, #22]
 80039d2:	461a      	mov	r2, r3
 80039d4:	68f9      	ldr	r1, [r7, #12]
 80039d6:	480f      	ldr	r0, [pc, #60]	@ (8003a14 <PrepareReqFrame+0x124>)
 80039d8:	f002 fa1a 	bl	8005e10 <HAL_CRC_Calculate>
 80039dc:	4603      	mov	r3, r0
 80039de:	82bb      	strh	r3, [r7, #20]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 80039e0:	8afb      	ldrh	r3, [r7, #22]
 80039e2:	1c5a      	adds	r2, r3, #1
 80039e4:	82fa      	strh	r2, [r7, #22]
 80039e6:	461a      	mov	r2, r3
 80039e8:	68fb      	ldr	r3, [r7, #12]
 80039ea:	4413      	add	r3, r2
 80039ec:	8aba      	ldrh	r2, [r7, #20]
 80039ee:	b2d2      	uxtb	r2, r2
 80039f0:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 80039f2:	8abb      	ldrh	r3, [r7, #20]
 80039f4:	0a1b      	lsrs	r3, r3, #8
 80039f6:	b29a      	uxth	r2, r3
 80039f8:	8afb      	ldrh	r3, [r7, #22]
 80039fa:	1c59      	adds	r1, r3, #1
 80039fc:	82f9      	strh	r1, [r7, #22]
 80039fe:	4619      	mov	r1, r3
 8003a00:	68fb      	ldr	r3, [r7, #12]
 8003a02:	440b      	add	r3, r1
 8003a04:	b2d2      	uxtb	r2, r2
 8003a06:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 8003a08:	8afb      	ldrh	r3, [r7, #22]
}
 8003a0a:	4618      	mov	r0, r3
 8003a0c:	3718      	adds	r7, #24
 8003a0e:	46bd      	mov	sp, r7
 8003a10:	bd80      	pop	{r7, pc}
 8003a12:	bf00      	nop
 8003a14:	24000248 	.word	0x24000248

08003a18 <PrepareRespFrame>:

uint16_t PrepareRespFrame (uint8_t* txBuffer, uint16_t frameId, SerialProtocolCommands frameCommand, SerialProtocolRespStatus respStatus, uint8_t* dataBuffer, uint16_t dataLength) {
 8003a18:	b580      	push	{r7, lr}
 8003a1a:	b084      	sub	sp, #16
 8003a1c:	af00      	add	r7, sp, #0
 8003a1e:	6078      	str	r0, [r7, #4]
 8003a20:	4608      	mov	r0, r1
 8003a22:	4611      	mov	r1, r2
 8003a24:	461a      	mov	r2, r3
 8003a26:	4603      	mov	r3, r0
 8003a28:	807b      	strh	r3, [r7, #2]
 8003a2a:	460b      	mov	r3, r1
 8003a2c:	707b      	strb	r3, [r7, #1]
 8003a2e:	4613      	mov	r3, r2
 8003a30:	703b      	strb	r3, [r7, #0]
    uint16_t crc         = 0;
 8003a32:	2300      	movs	r3, #0
 8003a34:	81bb      	strh	r3, [r7, #12]
    uint16_t txBufferPos = 0;
 8003a36:	2300      	movs	r3, #0
 8003a38:	81fb      	strh	r3, [r7, #14]
    uint16_t frameCmd = ((uint16_t)frameCommand) | 0x8000; // MSB set means response
 8003a3a:	787b      	ldrb	r3, [r7, #1]
 8003a3c:	b21a      	sxth	r2, r3
 8003a3e:	4b43      	ldr	r3, [pc, #268]	@ (8003b4c <PrepareRespFrame+0x134>)
 8003a40:	4313      	orrs	r3, r2
 8003a42:	b21b      	sxth	r3, r3
 8003a44:	817b      	strh	r3, [r7, #10]

    memset (txBuffer, 0x00, dataLength);
 8003a46:	8bbb      	ldrh	r3, [r7, #28]
 8003a48:	461a      	mov	r2, r3
 8003a4a:	2100      	movs	r1, #0
 8003a4c:	6878      	ldr	r0, [r7, #4]
 8003a4e:	f027 f997 	bl	802ad80 <memset>
    txBuffer[txBufferPos++] = FRAME_INDICATOR;
 8003a52:	89fb      	ldrh	r3, [r7, #14]
 8003a54:	1c5a      	adds	r2, r3, #1
 8003a56:	81fa      	strh	r2, [r7, #14]
 8003a58:	461a      	mov	r2, r3
 8003a5a:	687b      	ldr	r3, [r7, #4]
 8003a5c:	4413      	add	r3, r2
 8003a5e:	22aa      	movs	r2, #170	@ 0xaa
 8003a60:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameId);
 8003a62:	89fb      	ldrh	r3, [r7, #14]
 8003a64:	1c5a      	adds	r2, r3, #1
 8003a66:	81fa      	strh	r2, [r7, #14]
 8003a68:	461a      	mov	r2, r3
 8003a6a:	687b      	ldr	r3, [r7, #4]
 8003a6c:	4413      	add	r3, r2
 8003a6e:	887a      	ldrh	r2, [r7, #2]
 8003a70:	b2d2      	uxtb	r2, r2
 8003a72:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameId);
 8003a74:	887b      	ldrh	r3, [r7, #2]
 8003a76:	0a1b      	lsrs	r3, r3, #8
 8003a78:	b29a      	uxth	r2, r3
 8003a7a:	89fb      	ldrh	r3, [r7, #14]
 8003a7c:	1c59      	adds	r1, r3, #1
 8003a7e:	81f9      	strh	r1, [r7, #14]
 8003a80:	4619      	mov	r1, r3
 8003a82:	687b      	ldr	r3, [r7, #4]
 8003a84:	440b      	add	r3, r1
 8003a86:	b2d2      	uxtb	r2, r2
 8003a88:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (frameCmd);
 8003a8a:	89fb      	ldrh	r3, [r7, #14]
 8003a8c:	1c5a      	adds	r2, r3, #1
 8003a8e:	81fa      	strh	r2, [r7, #14]
 8003a90:	461a      	mov	r2, r3
 8003a92:	687b      	ldr	r3, [r7, #4]
 8003a94:	4413      	add	r3, r2
 8003a96:	897a      	ldrh	r2, [r7, #10]
 8003a98:	b2d2      	uxtb	r2, r2
 8003a9a:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (frameCmd);
 8003a9c:	897b      	ldrh	r3, [r7, #10]
 8003a9e:	0a1b      	lsrs	r3, r3, #8
 8003aa0:	b29a      	uxth	r2, r3
 8003aa2:	89fb      	ldrh	r3, [r7, #14]
 8003aa4:	1c59      	adds	r1, r3, #1
 8003aa6:	81f9      	strh	r1, [r7, #14]
 8003aa8:	4619      	mov	r1, r3
 8003aaa:	687b      	ldr	r3, [r7, #4]
 8003aac:	440b      	add	r3, r1
 8003aae:	b2d2      	uxtb	r2, r2
 8003ab0:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (dataLength);
 8003ab2:	89fb      	ldrh	r3, [r7, #14]
 8003ab4:	1c5a      	adds	r2, r3, #1
 8003ab6:	81fa      	strh	r2, [r7, #14]
 8003ab8:	461a      	mov	r2, r3
 8003aba:	687b      	ldr	r3, [r7, #4]
 8003abc:	4413      	add	r3, r2
 8003abe:	8bba      	ldrh	r2, [r7, #28]
 8003ac0:	b2d2      	uxtb	r2, r2
 8003ac2:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (dataLength);
 8003ac4:	8bbb      	ldrh	r3, [r7, #28]
 8003ac6:	0a1b      	lsrs	r3, r3, #8
 8003ac8:	b29a      	uxth	r2, r3
 8003aca:	89fb      	ldrh	r3, [r7, #14]
 8003acc:	1c59      	adds	r1, r3, #1
 8003ace:	81f9      	strh	r1, [r7, #14]
 8003ad0:	4619      	mov	r1, r3
 8003ad2:	687b      	ldr	r3, [r7, #4]
 8003ad4:	440b      	add	r3, r1
 8003ad6:	b2d2      	uxtb	r2, r2
 8003ad8:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = (uint8_t)respStatus;
 8003ada:	89fb      	ldrh	r3, [r7, #14]
 8003adc:	1c5a      	adds	r2, r3, #1
 8003ade:	81fa      	strh	r2, [r7, #14]
 8003ae0:	461a      	mov	r2, r3
 8003ae2:	687b      	ldr	r3, [r7, #4]
 8003ae4:	4413      	add	r3, r2
 8003ae6:	783a      	ldrb	r2, [r7, #0]
 8003ae8:	701a      	strb	r2, [r3, #0]
    if (dataLength > 0) {
 8003aea:	8bbb      	ldrh	r3, [r7, #28]
 8003aec:	2b00      	cmp	r3, #0
 8003aee:	d00b      	beq.n	8003b08 <PrepareRespFrame+0xf0>
        memcpy (&txBuffer[txBufferPos], dataBuffer, dataLength);
 8003af0:	89fb      	ldrh	r3, [r7, #14]
 8003af2:	687a      	ldr	r2, [r7, #4]
 8003af4:	4413      	add	r3, r2
 8003af6:	8bba      	ldrh	r2, [r7, #28]
 8003af8:	69b9      	ldr	r1, [r7, #24]
 8003afa:	4618      	mov	r0, r3
 8003afc:	f027 fa37 	bl	802af6e <memcpy>
        txBufferPos += dataLength;
 8003b00:	89fa      	ldrh	r2, [r7, #14]
 8003b02:	8bbb      	ldrh	r3, [r7, #28]
 8003b04:	4413      	add	r3, r2
 8003b06:	81fb      	strh	r3, [r7, #14]
    }
    crc = HAL_CRC_Calculate (&hcrc, (uint32_t*)txBuffer, txBufferPos);
 8003b08:	89fb      	ldrh	r3, [r7, #14]
 8003b0a:	461a      	mov	r2, r3
 8003b0c:	6879      	ldr	r1, [r7, #4]
 8003b0e:	4810      	ldr	r0, [pc, #64]	@ (8003b50 <PrepareRespFrame+0x138>)
 8003b10:	f002 f97e 	bl	8005e10 <HAL_CRC_Calculate>
 8003b14:	4603      	mov	r3, r0
 8003b16:	81bb      	strh	r3, [r7, #12]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_FIRST_BYTE (crc);
 8003b18:	89fb      	ldrh	r3, [r7, #14]
 8003b1a:	1c5a      	adds	r2, r3, #1
 8003b1c:	81fa      	strh	r2, [r7, #14]
 8003b1e:	461a      	mov	r2, r3
 8003b20:	687b      	ldr	r3, [r7, #4]
 8003b22:	4413      	add	r3, r2
 8003b24:	89ba      	ldrh	r2, [r7, #12]
 8003b26:	b2d2      	uxtb	r2, r2
 8003b28:	701a      	strb	r2, [r3, #0]
    txBuffer[txBufferPos++] = GET_SHORT_WORD_SECOND_BYTE (crc);
 8003b2a:	89bb      	ldrh	r3, [r7, #12]
 8003b2c:	0a1b      	lsrs	r3, r3, #8
 8003b2e:	b29a      	uxth	r2, r3
 8003b30:	89fb      	ldrh	r3, [r7, #14]
 8003b32:	1c59      	adds	r1, r3, #1
 8003b34:	81f9      	strh	r1, [r7, #14]
 8003b36:	4619      	mov	r1, r3
 8003b38:	687b      	ldr	r3, [r7, #4]
 8003b3a:	440b      	add	r3, r1
 8003b3c:	b2d2      	uxtb	r2, r2
 8003b3e:	701a      	strb	r2, [r3, #0]

    return txBufferPos;
 8003b40:	89fb      	ldrh	r3, [r7, #14]
}
 8003b42:	4618      	mov	r0, r3
 8003b44:	3710      	adds	r7, #16
 8003b46:	46bd      	mov	sp, r7
 8003b48:	bd80      	pop	{r7, pc}
 8003b4a:	bf00      	nop
 8003b4c:	ffff8000 	.word	0xffff8000
 8003b50:	24000248 	.word	0x24000248

08003b54 <HAL_MspInit>:
/* USER CODE END 0 */
/**
  * Initializes the Global MSP.
  */
void HAL_MspInit(void)
{
 8003b54:	b580      	push	{r7, lr}
 8003b56:	b086      	sub	sp, #24
 8003b58:	af00      	add	r7, sp, #0

  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */
  PWREx_AVDTypeDef sConfigAVD = {0};
 8003b5a:	f107 0310 	add.w	r3, r7, #16
 8003b5e:	2200      	movs	r2, #0
 8003b60:	601a      	str	r2, [r3, #0]
 8003b62:	605a      	str	r2, [r3, #4]
  PWR_PVDTypeDef sConfigPVD = {0};
 8003b64:	f107 0308 	add.w	r3, r7, #8
 8003b68:	2200      	movs	r2, #0
 8003b6a:	601a      	str	r2, [r3, #0]
 8003b6c:	605a      	str	r2, [r3, #4]

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 8003b6e:	4b1c      	ldr	r3, [pc, #112]	@ (8003be0 <HAL_MspInit+0x8c>)
 8003b70:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8003b74:	4a1a      	ldr	r2, [pc, #104]	@ (8003be0 <HAL_MspInit+0x8c>)
 8003b76:	f043 0302 	orr.w	r3, r3, #2
 8003b7a:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 8003b7e:	4b18      	ldr	r3, [pc, #96]	@ (8003be0 <HAL_MspInit+0x8c>)
 8003b80:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 8003b84:	f003 0302 	and.w	r3, r3, #2
 8003b88:	607b      	str	r3, [r7, #4]
 8003b8a:	687b      	ldr	r3, [r7, #4]

  /* System interrupt init*/
  /* PendSV_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 8003b8c:	2200      	movs	r2, #0
 8003b8e:	210f      	movs	r1, #15
 8003b90:	f06f 0001 	mvn.w	r0, #1
 8003b94:	f002 f838 	bl	8005c08 <HAL_NVIC_SetPriority>

  /* Peripheral interrupt init */
  /* RCC_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
 8003b98:	2200      	movs	r2, #0
 8003b9a:	2105      	movs	r1, #5
 8003b9c:	2005      	movs	r0, #5
 8003b9e:	f002 f833 	bl	8005c08 <HAL_NVIC_SetPriority>
  HAL_NVIC_EnableIRQ(RCC_IRQn);
 8003ba2:	2005      	movs	r0, #5
 8003ba4:	f002 f84a 	bl	8005c3c <HAL_NVIC_EnableIRQ>

  /** AVD Configuration
  */
  sConfigAVD.AVDLevel = PWR_AVDLEVEL_3;
 8003ba8:	f44f 23c0 	mov.w	r3, #393216	@ 0x60000
 8003bac:	613b      	str	r3, [r7, #16]
  sConfigAVD.Mode = PWR_AVD_MODE_NORMAL;
 8003bae:	2300      	movs	r3, #0
 8003bb0:	617b      	str	r3, [r7, #20]
  HAL_PWREx_ConfigAVD(&sConfigAVD);
 8003bb2:	f107 0310 	add.w	r3, r7, #16
 8003bb6:	4618      	mov	r0, r3
 8003bb8:	f006 fd52 	bl	800a660 <HAL_PWREx_ConfigAVD>

  /** Enable the AVD Output
  */
  HAL_PWREx_EnableAVD();
 8003bbc:	f006 fdc6 	bl	800a74c <HAL_PWREx_EnableAVD>

  /** PVD Configuration
  */
  sConfigPVD.PVDLevel = PWR_PVDLEVEL_6;
 8003bc0:	23c0      	movs	r3, #192	@ 0xc0
 8003bc2:	60bb      	str	r3, [r7, #8]
  sConfigPVD.Mode = PWR_PVD_MODE_NORMAL;
 8003bc4:	2300      	movs	r3, #0
 8003bc6:	60fb      	str	r3, [r7, #12]
  HAL_PWR_ConfigPVD(&sConfigPVD);
 8003bc8:	f107 0308 	add.w	r3, r7, #8
 8003bcc:	4618      	mov	r0, r3
 8003bce:	f006 fc83 	bl	800a4d8 <HAL_PWR_ConfigPVD>

  /** Enable the PVD Output
  */
  HAL_PWR_EnablePVD();
 8003bd2:	f006 fcfb 	bl	800a5cc <HAL_PWR_EnablePVD>

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 8003bd6:	bf00      	nop
 8003bd8:	3718      	adds	r7, #24
 8003bda:	46bd      	mov	sp, r7
 8003bdc:	bd80      	pop	{r7, pc}
 8003bde:	bf00      	nop
 8003be0:	58024400 	.word	0x58024400

08003be4 <HAL_CRC_MspInit>:
* This function configures the hardware resources used in this example
* @param hcrc: CRC handle pointer
* @retval None
*/
void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
{
 8003be4:	b480      	push	{r7}
 8003be6:	b085      	sub	sp, #20
 8003be8:	af00      	add	r7, sp, #0
 8003bea:	6078      	str	r0, [r7, #4]
  if(hcrc->Instance==CRC)
 8003bec:	687b      	ldr	r3, [r7, #4]
 8003bee:	681b      	ldr	r3, [r3, #0]
 8003bf0:	4a0b      	ldr	r2, [pc, #44]	@ (8003c20 <HAL_CRC_MspInit+0x3c>)
 8003bf2:	4293      	cmp	r3, r2
 8003bf4:	d10e      	bne.n	8003c14 <HAL_CRC_MspInit+0x30>
  {
  /* USER CODE BEGIN CRC_MspInit 0 */

  /* USER CODE END CRC_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_CRC_CLK_ENABLE();
 8003bf6:	4b0b      	ldr	r3, [pc, #44]	@ (8003c24 <HAL_CRC_MspInit+0x40>)
 8003bf8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003bfc:	4a09      	ldr	r2, [pc, #36]	@ (8003c24 <HAL_CRC_MspInit+0x40>)
 8003bfe:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 8003c02:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003c06:	4b07      	ldr	r3, [pc, #28]	@ (8003c24 <HAL_CRC_MspInit+0x40>)
 8003c08:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003c0c:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8003c10:	60fb      	str	r3, [r7, #12]
 8003c12:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN CRC_MspInit 1 */

  /* USER CODE END CRC_MspInit 1 */
  }

}
 8003c14:	bf00      	nop
 8003c16:	3714      	adds	r7, #20
 8003c18:	46bd      	mov	sp, r7
 8003c1a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003c1e:	4770      	bx	lr
 8003c20:	58024c00 	.word	0x58024c00
 8003c24:	58024400 	.word	0x58024400

08003c28 <HAL_RNG_MspInit>:
* This function configures the hardware resources used in this example
* @param hrng: RNG handle pointer
* @retval None
*/
void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
{
 8003c28:	b580      	push	{r7, lr}
 8003c2a:	b0b4      	sub	sp, #208	@ 0xd0
 8003c2c:	af00      	add	r7, sp, #0
 8003c2e:	6078      	str	r0, [r7, #4]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 8003c30:	f107 0310 	add.w	r3, r7, #16
 8003c34:	22c0      	movs	r2, #192	@ 0xc0
 8003c36:	2100      	movs	r1, #0
 8003c38:	4618      	mov	r0, r3
 8003c3a:	f027 f8a1 	bl	802ad80 <memset>
  if(hrng->Instance==RNG)
 8003c3e:	687b      	ldr	r3, [r7, #4]
 8003c40:	681b      	ldr	r3, [r3, #0]
 8003c42:	4a14      	ldr	r2, [pc, #80]	@ (8003c94 <HAL_RNG_MspInit+0x6c>)
 8003c44:	4293      	cmp	r3, r2
 8003c46:	d121      	bne.n	8003c8c <HAL_RNG_MspInit+0x64>

  /* USER CODE END RNG_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
 8003c48:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 8003c4c:	f04f 0300 	mov.w	r3, #0
 8003c50:	e9c7 2304 	strd	r2, r3, [r7, #16]
    PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
 8003c54:	2300      	movs	r3, #0
 8003c56:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003c5a:	f107 0310 	add.w	r3, r7, #16
 8003c5e:	4618      	mov	r0, r3
 8003c60:	f007 fdac 	bl	800b7bc <HAL_RCCEx_PeriphCLKConfig>
 8003c64:	4603      	mov	r3, r0
 8003c66:	2b00      	cmp	r3, #0
 8003c68:	d001      	beq.n	8003c6e <HAL_RNG_MspInit+0x46>
    {
      Error_Handler();
 8003c6a:	f7fe fd71 	bl	8002750 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_RNG_CLK_ENABLE();
 8003c6e:	4b0a      	ldr	r3, [pc, #40]	@ (8003c98 <HAL_RNG_MspInit+0x70>)
 8003c70:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 8003c74:	4a08      	ldr	r2, [pc, #32]	@ (8003c98 <HAL_RNG_MspInit+0x70>)
 8003c76:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8003c7a:	f8c2 30dc 	str.w	r3, [r2, #220]	@ 0xdc
 8003c7e:	4b06      	ldr	r3, [pc, #24]	@ (8003c98 <HAL_RNG_MspInit+0x70>)
 8003c80:	f8d3 30dc 	ldr.w	r3, [r3, #220]	@ 0xdc
 8003c84:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8003c88:	60fb      	str	r3, [r7, #12]
 8003c8a:	68fb      	ldr	r3, [r7, #12]
  /* USER CODE BEGIN RNG_MspInit 1 */

  /* USER CODE END RNG_MspInit 1 */
  }

}
 8003c8c:	bf00      	nop
 8003c8e:	37d0      	adds	r7, #208	@ 0xd0
 8003c90:	46bd      	mov	sp, r7
 8003c92:	bd80      	pop	{r7, pc}
 8003c94:	48021800 	.word	0x48021800
 8003c98:	58024400 	.word	0x58024400

08003c9c <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8003c9c:	b580      	push	{r7, lr}
 8003c9e:	b0c2      	sub	sp, #264	@ 0x108
 8003ca0:	af00      	add	r7, sp, #0
 8003ca2:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003ca6:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003caa:	6018      	str	r0, [r3, #0]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8003cac:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003cb0:	2200      	movs	r2, #0
 8003cb2:	601a      	str	r2, [r3, #0]
 8003cb4:	605a      	str	r2, [r3, #4]
 8003cb6:	609a      	str	r2, [r3, #8]
 8003cb8:	60da      	str	r2, [r3, #12]
 8003cba:	611a      	str	r2, [r3, #16]
  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 8003cbc:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003cc0:	22c0      	movs	r2, #192	@ 0xc0
 8003cc2:	2100      	movs	r1, #0
 8003cc4:	4618      	mov	r0, r3
 8003cc6:	f027 f85b 	bl	802ad80 <memset>
  if(huart->Instance==UART8)
 8003cca:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003cce:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003cd2:	681b      	ldr	r3, [r3, #0]
 8003cd4:	681b      	ldr	r3, [r3, #0]
 8003cd6:	4ab8      	ldr	r2, [pc, #736]	@ (8003fb8 <HAL_UART_MspInit+0x31c>)
 8003cd8:	4293      	cmp	r3, r2
 8003cda:	f040 80bc 	bne.w	8003e56 <HAL_UART_MspInit+0x1ba>

  /* USER CODE END UART8_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_UART8;
 8003cde:	f04f 0202 	mov.w	r2, #2
 8003ce2:	f04f 0300 	mov.w	r3, #0
 8003ce6:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 8003cea:	2300      	movs	r3, #0
 8003cec:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003cf0:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003cf4:	4618      	mov	r0, r3
 8003cf6:	f007 fd61 	bl	800b7bc <HAL_RCCEx_PeriphCLKConfig>
 8003cfa:	4603      	mov	r3, r0
 8003cfc:	2b00      	cmp	r3, #0
 8003cfe:	d001      	beq.n	8003d04 <HAL_UART_MspInit+0x68>
    {
      Error_Handler();
 8003d00:	f7fe fd26 	bl	8002750 <Error_Handler>
    }

    /* Peripheral clock enable */
    __HAL_RCC_UART8_CLK_ENABLE();
 8003d04:	4bad      	ldr	r3, [pc, #692]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003d06:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003d0a:	4aac      	ldr	r2, [pc, #688]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003d0c:	f043 4300 	orr.w	r3, r3, #2147483648	@ 0x80000000
 8003d10:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003d14:	4ba9      	ldr	r3, [pc, #676]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003d16:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003d1a:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8003d1e:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8003d20:	6afb      	ldr	r3, [r7, #44]	@ 0x2c

    __HAL_RCC_GPIOE_CLK_ENABLE();
 8003d22:	4ba6      	ldr	r3, [pc, #664]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003d24:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003d28:	4aa4      	ldr	r2, [pc, #656]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003d2a:	f043 0310 	orr.w	r3, r3, #16
 8003d2e:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003d32:	4ba2      	ldr	r3, [pc, #648]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003d34:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003d38:	f003 0310 	and.w	r3, r3, #16
 8003d3c:	62bb      	str	r3, [r7, #40]	@ 0x28
 8003d3e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
    /**UART8 GPIO Configuration
    PE0     ------> UART8_RX
    PE1     ------> UART8_TX
    */
    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
 8003d40:	2303      	movs	r3, #3
 8003d42:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003d46:	2302      	movs	r3, #2
 8003d48:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003d4c:	2300      	movs	r3, #0
 8003d4e:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 8003d52:	2300      	movs	r3, #0
 8003d54:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
 8003d58:	2308      	movs	r3, #8
 8003d5a:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 8003d5e:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003d62:	4619      	mov	r1, r3
 8003d64:	4896      	ldr	r0, [pc, #600]	@ (8003fc0 <HAL_UART_MspInit+0x324>)
 8003d66:	f006 f977 	bl	800a058 <HAL_GPIO_Init>

    /* UART8 DMA Init */
    /* UART8_RX Init */
    hdma_uart8_rx.Instance = DMA2_Stream7;
 8003d6a:	4b96      	ldr	r3, [pc, #600]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003d6c:	4a96      	ldr	r2, [pc, #600]	@ (8003fc8 <HAL_UART_MspInit+0x32c>)
 8003d6e:	601a      	str	r2, [r3, #0]
    hdma_uart8_rx.Init.Request = DMA_REQUEST_UART8_RX;
 8003d70:	4b94      	ldr	r3, [pc, #592]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003d72:	2251      	movs	r2, #81	@ 0x51
 8003d74:	605a      	str	r2, [r3, #4]
    hdma_uart8_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
 8003d76:	4b93      	ldr	r3, [pc, #588]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003d78:	2200      	movs	r2, #0
 8003d7a:	609a      	str	r2, [r3, #8]
    hdma_uart8_rx.Init.PeriphInc = DMA_PINC_DISABLE;
 8003d7c:	4b91      	ldr	r3, [pc, #580]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003d7e:	2200      	movs	r2, #0
 8003d80:	60da      	str	r2, [r3, #12]
    hdma_uart8_rx.Init.MemInc = DMA_MINC_ENABLE;
 8003d82:	4b90      	ldr	r3, [pc, #576]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003d84:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8003d88:	611a      	str	r2, [r3, #16]
    hdma_uart8_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8003d8a:	4b8e      	ldr	r3, [pc, #568]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003d8c:	2200      	movs	r2, #0
 8003d8e:	615a      	str	r2, [r3, #20]
    hdma_uart8_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8003d90:	4b8c      	ldr	r3, [pc, #560]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003d92:	2200      	movs	r2, #0
 8003d94:	619a      	str	r2, [r3, #24]
    hdma_uart8_rx.Init.Mode = DMA_NORMAL;
 8003d96:	4b8b      	ldr	r3, [pc, #556]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003d98:	2200      	movs	r2, #0
 8003d9a:	61da      	str	r2, [r3, #28]
    hdma_uart8_rx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 8003d9c:	4b89      	ldr	r3, [pc, #548]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003d9e:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 8003da2:	621a      	str	r2, [r3, #32]
    hdma_uart8_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 8003da4:	4b87      	ldr	r3, [pc, #540]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003da6:	2200      	movs	r2, #0
 8003da8:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_rx) != HAL_OK)
 8003daa:	4886      	ldr	r0, [pc, #536]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003dac:	f002 f9d2 	bl	8006154 <HAL_DMA_Init>
 8003db0:	4603      	mov	r3, r0
 8003db2:	2b00      	cmp	r3, #0
 8003db4:	d001      	beq.n	8003dba <HAL_UART_MspInit+0x11e>
    {
      Error_Handler();
 8003db6:	f7fe fccb 	bl	8002750 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmarx,hdma_uart8_rx);
 8003dba:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003dbe:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003dc2:	681b      	ldr	r3, [r3, #0]
 8003dc4:	4a7f      	ldr	r2, [pc, #508]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003dc6:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
 8003dca:	4a7e      	ldr	r2, [pc, #504]	@ (8003fc4 <HAL_UART_MspInit+0x328>)
 8003dcc:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003dd0:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003dd4:	681b      	ldr	r3, [r3, #0]
 8003dd6:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8_TX Init */
    hdma_uart8_tx.Instance = DMA2_Stream6;
 8003dd8:	4b7c      	ldr	r3, [pc, #496]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003dda:	4a7d      	ldr	r2, [pc, #500]	@ (8003fd0 <HAL_UART_MspInit+0x334>)
 8003ddc:	601a      	str	r2, [r3, #0]
    hdma_uart8_tx.Init.Request = DMA_REQUEST_UART8_TX;
 8003dde:	4b7b      	ldr	r3, [pc, #492]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003de0:	2252      	movs	r2, #82	@ 0x52
 8003de2:	605a      	str	r2, [r3, #4]
    hdma_uart8_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 8003de4:	4b79      	ldr	r3, [pc, #484]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003de6:	2240      	movs	r2, #64	@ 0x40
 8003de8:	609a      	str	r2, [r3, #8]
    hdma_uart8_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 8003dea:	4b78      	ldr	r3, [pc, #480]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003dec:	2200      	movs	r2, #0
 8003dee:	60da      	str	r2, [r3, #12]
    hdma_uart8_tx.Init.MemInc = DMA_MINC_ENABLE;
 8003df0:	4b76      	ldr	r3, [pc, #472]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003df2:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 8003df6:	611a      	str	r2, [r3, #16]
    hdma_uart8_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 8003df8:	4b74      	ldr	r3, [pc, #464]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003dfa:	2200      	movs	r2, #0
 8003dfc:	615a      	str	r2, [r3, #20]
    hdma_uart8_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 8003dfe:	4b73      	ldr	r3, [pc, #460]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003e00:	2200      	movs	r2, #0
 8003e02:	619a      	str	r2, [r3, #24]
    hdma_uart8_tx.Init.Mode = DMA_NORMAL;
 8003e04:	4b71      	ldr	r3, [pc, #452]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003e06:	2200      	movs	r2, #0
 8003e08:	61da      	str	r2, [r3, #28]
    hdma_uart8_tx.Init.Priority = DMA_PRIORITY_VERY_HIGH;
 8003e0a:	4b70      	ldr	r3, [pc, #448]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003e0c:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 8003e10:	621a      	str	r2, [r3, #32]
    hdma_uart8_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 8003e12:	4b6e      	ldr	r3, [pc, #440]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003e14:	2200      	movs	r2, #0
 8003e16:	625a      	str	r2, [r3, #36]	@ 0x24
    if (HAL_DMA_Init(&hdma_uart8_tx) != HAL_OK)
 8003e18:	486c      	ldr	r0, [pc, #432]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003e1a:	f002 f99b 	bl	8006154 <HAL_DMA_Init>
 8003e1e:	4603      	mov	r3, r0
 8003e20:	2b00      	cmp	r3, #0
 8003e22:	d001      	beq.n	8003e28 <HAL_UART_MspInit+0x18c>
    {
      Error_Handler();
 8003e24:	f7fe fc94 	bl	8002750 <Error_Handler>
    }

    __HAL_LINKDMA(huart,hdmatx,hdma_uart8_tx);
 8003e28:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003e2c:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003e30:	681b      	ldr	r3, [r3, #0]
 8003e32:	4a66      	ldr	r2, [pc, #408]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003e34:	67da      	str	r2, [r3, #124]	@ 0x7c
 8003e36:	4a65      	ldr	r2, [pc, #404]	@ (8003fcc <HAL_UART_MspInit+0x330>)
 8003e38:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003e3c:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003e40:	681b      	ldr	r3, [r3, #0]
 8003e42:	6393      	str	r3, [r2, #56]	@ 0x38

    /* UART8 interrupt Init */
    HAL_NVIC_SetPriority(UART8_IRQn, 5, 0);
 8003e44:	2200      	movs	r2, #0
 8003e46:	2105      	movs	r1, #5
 8003e48:	2053      	movs	r0, #83	@ 0x53
 8003e4a:	f001 fedd 	bl	8005c08 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(UART8_IRQn);
 8003e4e:	2053      	movs	r0, #83	@ 0x53
 8003e50:	f001 fef4 	bl	8005c3c <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN USART6_MspInit 1 */

  /* USER CODE END USART6_MspInit 1 */
  }

}
 8003e54:	e17e      	b.n	8004154 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART1)
 8003e56:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003e5a:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003e5e:	681b      	ldr	r3, [r3, #0]
 8003e60:	681b      	ldr	r3, [r3, #0]
 8003e62:	4a5c      	ldr	r2, [pc, #368]	@ (8003fd4 <HAL_UART_MspInit+0x338>)
 8003e64:	4293      	cmp	r3, r2
 8003e66:	d14f      	bne.n	8003f08 <HAL_UART_MspInit+0x26c>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
 8003e68:	f04f 0201 	mov.w	r2, #1
 8003e6c:	f04f 0300 	mov.w	r3, #0
 8003e70:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
 8003e74:	2300      	movs	r3, #0
 8003e76:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003e7a:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003e7e:	4618      	mov	r0, r3
 8003e80:	f007 fc9c 	bl	800b7bc <HAL_RCCEx_PeriphCLKConfig>
 8003e84:	4603      	mov	r3, r0
 8003e86:	2b00      	cmp	r3, #0
 8003e88:	d001      	beq.n	8003e8e <HAL_UART_MspInit+0x1f2>
      Error_Handler();
 8003e8a:	f7fe fc61 	bl	8002750 <Error_Handler>
    __HAL_RCC_USART1_CLK_ENABLE();
 8003e8e:	4b4b      	ldr	r3, [pc, #300]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003e90:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003e94:	4a49      	ldr	r2, [pc, #292]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003e96:	f043 0310 	orr.w	r3, r3, #16
 8003e9a:	f8c2 30f0 	str.w	r3, [r2, #240]	@ 0xf0
 8003e9e:	4b47      	ldr	r3, [pc, #284]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003ea0:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 8003ea4:	f003 0310 	and.w	r3, r3, #16
 8003ea8:	627b      	str	r3, [r7, #36]	@ 0x24
 8003eaa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8003eac:	4b43      	ldr	r3, [pc, #268]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003eae:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003eb2:	4a42      	ldr	r2, [pc, #264]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003eb4:	f043 0302 	orr.w	r3, r3, #2
 8003eb8:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003ebc:	4b3f      	ldr	r3, [pc, #252]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003ebe:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003ec2:	f003 0302 	and.w	r3, r3, #2
 8003ec6:	623b      	str	r3, [r7, #32]
 8003ec8:	6a3b      	ldr	r3, [r7, #32]
    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
 8003eca:	f44f 4340 	mov.w	r3, #49152	@ 0xc000
 8003ece:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003ed2:	2302      	movs	r3, #2
 8003ed4:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003ed8:	2300      	movs	r3, #0
 8003eda:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8003ede:	2302      	movs	r3, #2
 8003ee0:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
 8003ee4:	2304      	movs	r3, #4
 8003ee6:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8003eea:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003eee:	4619      	mov	r1, r3
 8003ef0:	4839      	ldr	r0, [pc, #228]	@ (8003fd8 <HAL_UART_MspInit+0x33c>)
 8003ef2:	f006 f8b1 	bl	800a058 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART1_IRQn, 5, 0);
 8003ef6:	2200      	movs	r2, #0
 8003ef8:	2105      	movs	r1, #5
 8003efa:	2025      	movs	r0, #37	@ 0x25
 8003efc:	f001 fe84 	bl	8005c08 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART1_IRQn);
 8003f00:	2025      	movs	r0, #37	@ 0x25
 8003f02:	f001 fe9b 	bl	8005c3c <HAL_NVIC_EnableIRQ>
}
 8003f06:	e125      	b.n	8004154 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART2)
 8003f08:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003f0c:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003f10:	681b      	ldr	r3, [r3, #0]
 8003f12:	681b      	ldr	r3, [r3, #0]
 8003f14:	4a31      	ldr	r2, [pc, #196]	@ (8003fdc <HAL_UART_MspInit+0x340>)
 8003f16:	4293      	cmp	r3, r2
 8003f18:	d164      	bne.n	8003fe4 <HAL_UART_MspInit+0x348>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART2;
 8003f1a:	f04f 0202 	mov.w	r2, #2
 8003f1e:	f04f 0300 	mov.w	r3, #0
 8003f22:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 8003f26:	2300      	movs	r3, #0
 8003f28:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8003f2c:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8003f30:	4618      	mov	r0, r3
 8003f32:	f007 fc43 	bl	800b7bc <HAL_RCCEx_PeriphCLKConfig>
 8003f36:	4603      	mov	r3, r0
 8003f38:	2b00      	cmp	r3, #0
 8003f3a:	d001      	beq.n	8003f40 <HAL_UART_MspInit+0x2a4>
      Error_Handler();
 8003f3c:	f7fe fc08 	bl	8002750 <Error_Handler>
    __HAL_RCC_USART2_CLK_ENABLE();
 8003f40:	4b1e      	ldr	r3, [pc, #120]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003f42:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003f46:	4a1d      	ldr	r2, [pc, #116]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003f48:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8003f4c:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 8003f50:	4b1a      	ldr	r3, [pc, #104]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003f52:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8003f56:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8003f5a:	61fb      	str	r3, [r7, #28]
 8003f5c:	69fb      	ldr	r3, [r7, #28]
    __HAL_RCC_GPIOD_CLK_ENABLE();
 8003f5e:	4b17      	ldr	r3, [pc, #92]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003f60:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003f64:	4a15      	ldr	r2, [pc, #84]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003f66:	f043 0308 	orr.w	r3, r3, #8
 8003f6a:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8003f6e:	4b13      	ldr	r3, [pc, #76]	@ (8003fbc <HAL_UART_MspInit+0x320>)
 8003f70:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8003f74:	f003 0308 	and.w	r3, r3, #8
 8003f78:	61bb      	str	r3, [r7, #24]
 8003f7a:	69bb      	ldr	r3, [r7, #24]
    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6;
 8003f7c:	2360      	movs	r3, #96	@ 0x60
 8003f7e:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8003f82:	2302      	movs	r3, #2
 8003f84:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8003f88:	2300      	movs	r3, #0
 8003f8a:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 8003f8e:	2302      	movs	r3, #2
 8003f90:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
 8003f94:	2307      	movs	r3, #7
 8003f96:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8003f9a:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 8003f9e:	4619      	mov	r1, r3
 8003fa0:	480f      	ldr	r0, [pc, #60]	@ (8003fe0 <HAL_UART_MspInit+0x344>)
 8003fa2:	f006 f859 	bl	800a058 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART2_IRQn, 5, 0);
 8003fa6:	2200      	movs	r2, #0
 8003fa8:	2105      	movs	r1, #5
 8003faa:	2026      	movs	r0, #38	@ 0x26
 8003fac:	f001 fe2c 	bl	8005c08 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART2_IRQn);
 8003fb0:	2026      	movs	r0, #38	@ 0x26
 8003fb2:	f001 fe43 	bl	8005c3c <HAL_NVIC_EnableIRQ>
}
 8003fb6:	e0cd      	b.n	8004154 <HAL_UART_MspInit+0x4b8>
 8003fb8:	40007c00 	.word	0x40007c00
 8003fbc:	58024400 	.word	0x58024400
 8003fc0:	58021000 	.word	0x58021000
 8003fc4:	24000574 	.word	0x24000574
 8003fc8:	400204b8 	.word	0x400204b8
 8003fcc:	240005ec 	.word	0x240005ec
 8003fd0:	400204a0 	.word	0x400204a0
 8003fd4:	40011000 	.word	0x40011000
 8003fd8:	58020400 	.word	0x58020400
 8003fdc:	40004400 	.word	0x40004400
 8003fe0:	58020c00 	.word	0x58020c00
  else if(huart->Instance==USART3)
 8003fe4:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8003fe8:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 8003fec:	681b      	ldr	r3, [r3, #0]
 8003fee:	681b      	ldr	r3, [r3, #0]
 8003ff0:	4a5b      	ldr	r2, [pc, #364]	@ (8004160 <HAL_UART_MspInit+0x4c4>)
 8003ff2:	4293      	cmp	r3, r2
 8003ff4:	d14f      	bne.n	8004096 <HAL_UART_MspInit+0x3fa>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3;
 8003ff6:	f04f 0202 	mov.w	r2, #2
 8003ffa:	f04f 0300 	mov.w	r3, #0
 8003ffe:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
 8004002:	2300      	movs	r3, #0
 8004004:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 8004008:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 800400c:	4618      	mov	r0, r3
 800400e:	f007 fbd5 	bl	800b7bc <HAL_RCCEx_PeriphCLKConfig>
 8004012:	4603      	mov	r3, r0
 8004014:	2b00      	cmp	r3, #0
 8004016:	d001      	beq.n	800401c <HAL_UART_MspInit+0x380>
      Error_Handler();
 8004018:	f7fe fb9a 	bl	8002750 <Error_Handler>
    __HAL_RCC_USART3_CLK_ENABLE();
 800401c:	4b51      	ldr	r3, [pc, #324]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 800401e:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8004022:	4a50      	ldr	r2, [pc, #320]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 8004024:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 8004028:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 800402c:	4b4d      	ldr	r3, [pc, #308]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 800402e:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 8004032:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 8004036:	617b      	str	r3, [r7, #20]
 8004038:	697b      	ldr	r3, [r7, #20]
    __HAL_RCC_GPIOD_CLK_ENABLE();
 800403a:	4b4a      	ldr	r3, [pc, #296]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 800403c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8004040:	4a48      	ldr	r2, [pc, #288]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 8004042:	f043 0308 	orr.w	r3, r3, #8
 8004046:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 800404a:	4b46      	ldr	r3, [pc, #280]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 800404c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8004050:	f003 0308 	and.w	r3, r3, #8
 8004054:	613b      	str	r3, [r7, #16]
 8004056:	693b      	ldr	r3, [r7, #16]
    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
 8004058:	f44f 7340 	mov.w	r3, #768	@ 0x300
 800405c:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8004060:	2302      	movs	r3, #2
 8004062:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8004066:	2300      	movs	r3, #0
 8004068:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 800406c:	2302      	movs	r3, #2
 800406e:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
 8004072:	2307      	movs	r3, #7
 8004074:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
 8004078:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 800407c:	4619      	mov	r1, r3
 800407e:	483a      	ldr	r0, [pc, #232]	@ (8004168 <HAL_UART_MspInit+0x4cc>)
 8004080:	f005 ffea 	bl	800a058 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
 8004084:	2200      	movs	r2, #0
 8004086:	2105      	movs	r1, #5
 8004088:	2027      	movs	r0, #39	@ 0x27
 800408a:	f001 fdbd 	bl	8005c08 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART3_IRQn);
 800408e:	2027      	movs	r0, #39	@ 0x27
 8004090:	f001 fdd4 	bl	8005c3c <HAL_NVIC_EnableIRQ>
}
 8004094:	e05e      	b.n	8004154 <HAL_UART_MspInit+0x4b8>
  else if(huart->Instance==USART6)
 8004096:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 800409a:	f5a3 7382 	sub.w	r3, r3, #260	@ 0x104
 800409e:	681b      	ldr	r3, [r3, #0]
 80040a0:	681b      	ldr	r3, [r3, #0]
 80040a2:	4a32      	ldr	r2, [pc, #200]	@ (800416c <HAL_UART_MspInit+0x4d0>)
 80040a4:	4293      	cmp	r3, r2
 80040a6:	d155      	bne.n	8004154 <HAL_UART_MspInit+0x4b8>
    PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6;
 80040a8:	f04f 0201 	mov.w	r2, #1
 80040ac:	f04f 0300 	mov.w	r3, #0
 80040b0:	e9c7 230c 	strd	r2, r3, [r7, #48]	@ 0x30
    PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
 80040b4:	2300      	movs	r3, #0
 80040b6:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
 80040ba:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80040be:	4618      	mov	r0, r3
 80040c0:	f007 fb7c 	bl	800b7bc <HAL_RCCEx_PeriphCLKConfig>
 80040c4:	4603      	mov	r3, r0
 80040c6:	2b00      	cmp	r3, #0
 80040c8:	d001      	beq.n	80040ce <HAL_UART_MspInit+0x432>
      Error_Handler();
 80040ca:	f7fe fb41 	bl	8002750 <Error_Handler>
    __HAL_RCC_USART6_CLK_ENABLE();
 80040ce:	4b25      	ldr	r3, [pc, #148]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 80040d0:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 80040d4:	4a23      	ldr	r2, [pc, #140]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 80040d6:	f043 0320 	orr.w	r3, r3, #32
 80040da:	f8c2 30f0 	str.w	r3, [r2, #240]	@ 0xf0
 80040de:	4b21      	ldr	r3, [pc, #132]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 80040e0:	f8d3 30f0 	ldr.w	r3, [r3, #240]	@ 0xf0
 80040e4:	f003 0320 	and.w	r3, r3, #32
 80040e8:	60fb      	str	r3, [r7, #12]
 80040ea:	68fb      	ldr	r3, [r7, #12]
    __HAL_RCC_GPIOC_CLK_ENABLE();
 80040ec:	4b1d      	ldr	r3, [pc, #116]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 80040ee:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 80040f2:	4a1c      	ldr	r2, [pc, #112]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 80040f4:	f043 0304 	orr.w	r3, r3, #4
 80040f8:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 80040fc:	4b19      	ldr	r3, [pc, #100]	@ (8004164 <HAL_UART_MspInit+0x4c8>)
 80040fe:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8004102:	f003 0204 	and.w	r2, r3, #4
 8004106:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 800410a:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
 800410e:	601a      	str	r2, [r3, #0]
 8004110:	f507 7384 	add.w	r3, r7, #264	@ 0x108
 8004114:	f5a3 7380 	sub.w	r3, r3, #256	@ 0x100
 8004118:	681b      	ldr	r3, [r3, #0]
    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
 800411a:	23c0      	movs	r3, #192	@ 0xc0
 800411c:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8004120:	2302      	movs	r3, #2
 8004122:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8004126:	2300      	movs	r3, #0
 8004128:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
 800412c:	2302      	movs	r3, #2
 800412e:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
    GPIO_InitStruct.Alternate = GPIO_AF7_USART6;
 8004132:	2307      	movs	r3, #7
 8004134:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8004138:	f107 03f4 	add.w	r3, r7, #244	@ 0xf4
 800413c:	4619      	mov	r1, r3
 800413e:	480c      	ldr	r0, [pc, #48]	@ (8004170 <HAL_UART_MspInit+0x4d4>)
 8004140:	f005 ff8a 	bl	800a058 <HAL_GPIO_Init>
    HAL_NVIC_SetPriority(USART6_IRQn, 5, 0);
 8004144:	2200      	movs	r2, #0
 8004146:	2105      	movs	r1, #5
 8004148:	2047      	movs	r0, #71	@ 0x47
 800414a:	f001 fd5d 	bl	8005c08 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(USART6_IRQn);
 800414e:	2047      	movs	r0, #71	@ 0x47
 8004150:	f001 fd74 	bl	8005c3c <HAL_NVIC_EnableIRQ>
}
 8004154:	bf00      	nop
 8004156:	f507 7784 	add.w	r7, r7, #264	@ 0x108
 800415a:	46bd      	mov	sp, r7
 800415c:	bd80      	pop	{r7, pc}
 800415e:	bf00      	nop
 8004160:	40004800 	.word	0x40004800
 8004164:	58024400 	.word	0x58024400
 8004168:	58020c00 	.word	0x58020c00
 800416c:	40011400 	.word	0x40011400
 8004170:	58020800 	.word	0x58020800

08004174 <HAL_InitTick>:
  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
  * @param  TickPriority: Tick interrupt priority.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 8004174:	b580      	push	{r7, lr}
 8004176:	b090      	sub	sp, #64	@ 0x40
 8004178:	af00      	add	r7, sp, #0
 800417a:	6078      	str	r0, [r7, #4]
  uint32_t              uwTimclock, uwAPB1Prescaler;

  uint32_t              uwPrescalerValue;
  uint32_t              pFLatency;
/*Configure the TIM6 IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 800417c:	687b      	ldr	r3, [r7, #4]
 800417e:	2b0f      	cmp	r3, #15
 8004180:	d827      	bhi.n	80041d2 <HAL_InitTick+0x5e>
  {
  HAL_NVIC_SetPriority(TIM6_DAC_IRQn, TickPriority ,0U);
 8004182:	2200      	movs	r2, #0
 8004184:	6879      	ldr	r1, [r7, #4]
 8004186:	2036      	movs	r0, #54	@ 0x36
 8004188:	f001 fd3e 	bl	8005c08 <HAL_NVIC_SetPriority>

  /* Enable the TIM6 global Interrupt */
  HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
 800418c:	2036      	movs	r0, #54	@ 0x36
 800418e:	f001 fd55 	bl	8005c3c <HAL_NVIC_EnableIRQ>
    uwTickPrio = TickPriority;
 8004192:	4a29      	ldr	r2, [pc, #164]	@ (8004238 <HAL_InitTick+0xc4>)
 8004194:	687b      	ldr	r3, [r7, #4]
 8004196:	6013      	str	r3, [r2, #0]
  {
    return HAL_ERROR;
  }

  /* Enable TIM6 clock */
  __HAL_RCC_TIM6_CLK_ENABLE();
 8004198:	4b28      	ldr	r3, [pc, #160]	@ (800423c <HAL_InitTick+0xc8>)
 800419a:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 800419e:	4a27      	ldr	r2, [pc, #156]	@ (800423c <HAL_InitTick+0xc8>)
 80041a0:	f043 0310 	orr.w	r3, r3, #16
 80041a4:	f8c2 30e8 	str.w	r3, [r2, #232]	@ 0xe8
 80041a8:	4b24      	ldr	r3, [pc, #144]	@ (800423c <HAL_InitTick+0xc8>)
 80041aa:	f8d3 30e8 	ldr.w	r3, [r3, #232]	@ 0xe8
 80041ae:	f003 0310 	and.w	r3, r3, #16
 80041b2:	60fb      	str	r3, [r7, #12]
 80041b4:	68fb      	ldr	r3, [r7, #12]

  /* Get clock configuration */
  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
 80041b6:	f107 0210 	add.w	r2, r7, #16
 80041ba:	f107 0314 	add.w	r3, r7, #20
 80041be:	4611      	mov	r1, r2
 80041c0:	4618      	mov	r0, r3
 80041c2:	f007 fab9 	bl	800b738 <HAL_RCC_GetClockConfig>

  /* Get APB1 prescaler */
  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
 80041c6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80041c8:	63bb      	str	r3, [r7, #56]	@ 0x38
  /* Compute TIM6 clock */
  if (uwAPB1Prescaler == RCC_HCLK_DIV1)
 80041ca:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80041cc:	2b00      	cmp	r3, #0
 80041ce:	d106      	bne.n	80041de <HAL_InitTick+0x6a>
 80041d0:	e001      	b.n	80041d6 <HAL_InitTick+0x62>
    return HAL_ERROR;
 80041d2:	2301      	movs	r3, #1
 80041d4:	e02b      	b.n	800422e <HAL_InitTick+0xba>
  {
    uwTimclock = HAL_RCC_GetPCLK1Freq();
 80041d6:	f007 fa83 	bl	800b6e0 <HAL_RCC_GetPCLK1Freq>
 80041da:	63f8      	str	r0, [r7, #60]	@ 0x3c
 80041dc:	e004      	b.n	80041e8 <HAL_InitTick+0x74>
  }
  else
  {
    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
 80041de:	f007 fa7f 	bl	800b6e0 <HAL_RCC_GetPCLK1Freq>
 80041e2:	4603      	mov	r3, r0
 80041e4:	005b      	lsls	r3, r3, #1
 80041e6:	63fb      	str	r3, [r7, #60]	@ 0x3c
  }

  /* Compute the prescaler value to have TIM6 counter clock equal to 1MHz */
  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
 80041e8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80041ea:	4a15      	ldr	r2, [pc, #84]	@ (8004240 <HAL_InitTick+0xcc>)
 80041ec:	fba2 2303 	umull	r2, r3, r2, r3
 80041f0:	0c9b      	lsrs	r3, r3, #18
 80041f2:	3b01      	subs	r3, #1
 80041f4:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Initialize TIM6 */
  htim6.Instance = TIM6;
 80041f6:	4b13      	ldr	r3, [pc, #76]	@ (8004244 <HAL_InitTick+0xd0>)
 80041f8:	4a13      	ldr	r2, [pc, #76]	@ (8004248 <HAL_InitTick+0xd4>)
 80041fa:	601a      	str	r2, [r3, #0]
  + Period = [(TIM6CLK/1000) - 1]. to have a (1/1000) s time base.
  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
  + ClockDivision = 0
  + Counter direction = Up
  */
  htim6.Init.Period = (1000000U / 1000U) - 1U;
 80041fc:	4b11      	ldr	r3, [pc, #68]	@ (8004244 <HAL_InitTick+0xd0>)
 80041fe:	f240 32e7 	movw	r2, #999	@ 0x3e7
 8004202:	60da      	str	r2, [r3, #12]
  htim6.Init.Prescaler = uwPrescalerValue;
 8004204:	4a0f      	ldr	r2, [pc, #60]	@ (8004244 <HAL_InitTick+0xd0>)
 8004206:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8004208:	6053      	str	r3, [r2, #4]
  htim6.Init.ClockDivision = 0;
 800420a:	4b0e      	ldr	r3, [pc, #56]	@ (8004244 <HAL_InitTick+0xd0>)
 800420c:	2200      	movs	r2, #0
 800420e:	611a      	str	r2, [r3, #16]
  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
 8004210:	4b0c      	ldr	r3, [pc, #48]	@ (8004244 <HAL_InitTick+0xd0>)
 8004212:	2200      	movs	r2, #0
 8004214:	609a      	str	r2, [r3, #8]

  if(HAL_TIM_Base_Init(&htim6) == HAL_OK)
 8004216:	480b      	ldr	r0, [pc, #44]	@ (8004244 <HAL_InitTick+0xd0>)
 8004218:	f009 f998 	bl	800d54c <HAL_TIM_Base_Init>
 800421c:	4603      	mov	r3, r0
 800421e:	2b00      	cmp	r3, #0
 8004220:	d104      	bne.n	800422c <HAL_InitTick+0xb8>
  {
    /* Start the TIM time Base generation in interrupt mode */
    return HAL_TIM_Base_Start_IT(&htim6);
 8004222:	4808      	ldr	r0, [pc, #32]	@ (8004244 <HAL_InitTick+0xd0>)
 8004224:	f009 f9f4 	bl	800d610 <HAL_TIM_Base_Start_IT>
 8004228:	4603      	mov	r3, r0
 800422a:	e000      	b.n	800422e <HAL_InitTick+0xba>
  }

  /* Return function status */
  return HAL_ERROR;
 800422c:	2301      	movs	r3, #1
}
 800422e:	4618      	mov	r0, r3
 8004230:	3740      	adds	r7, #64	@ 0x40
 8004232:	46bd      	mov	sp, r7
 8004234:	bd80      	pop	{r7, pc}
 8004236:	bf00      	nop
 8004238:	2400002c 	.word	0x2400002c
 800423c:	58024400 	.word	0x58024400
 8004240:	431bde83 	.word	0x431bde83
 8004244:	24000fac 	.word	0x24000fac
 8004248:	40001000 	.word	0x40001000

0800424c <NMI_Handler>:
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
 800424c:	b480      	push	{r7}
 800424e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
   while (1)
 8004250:	bf00      	nop
 8004252:	e7fd      	b.n	8004250 <NMI_Handler+0x4>

08004254 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8004254:	b480      	push	{r7}
 8004256:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
 8004258:	bf00      	nop
 800425a:	e7fd      	b.n	8004258 <HardFault_Handler+0x4>

0800425c <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 800425c:	b480      	push	{r7}
 800425e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
 8004260:	bf00      	nop
 8004262:	e7fd      	b.n	8004260 <MemManage_Handler+0x4>

08004264 <BusFault_Handler>:

/**
  * @brief This function handles Pre-fetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8004264:	b480      	push	{r7}
 8004266:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
 8004268:	bf00      	nop
 800426a:	e7fd      	b.n	8004268 <BusFault_Handler+0x4>

0800426c <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 800426c:	b480      	push	{r7}
 800426e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
 8004270:	bf00      	nop
 8004272:	e7fd      	b.n	8004270 <UsageFault_Handler+0x4>

08004274 <DebugMon_Handler>:

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
 8004274:	b480      	push	{r7}
 8004276:	af00      	add	r7, sp, #0

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}
 8004278:	bf00      	nop
 800427a:	46bd      	mov	sp, r7
 800427c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004280:	4770      	bx	lr

08004282 <RCC_IRQHandler>:

/**
  * @brief This function handles RCC global interrupt.
  */
void RCC_IRQHandler(void)
{
 8004282:	b480      	push	{r7}
 8004284:	af00      	add	r7, sp, #0

  /* USER CODE END RCC_IRQn 0 */
  /* USER CODE BEGIN RCC_IRQn 1 */

  /* USER CODE END RCC_IRQn 1 */
}
 8004286:	bf00      	nop
 8004288:	46bd      	mov	sp, r7
 800428a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800428e:	4770      	bx	lr

08004290 <USART1_IRQHandler>:

/**
  * @brief This function handles USART1 global interrupt.
  */
void USART1_IRQHandler(void)
{
 8004290:	b580      	push	{r7, lr}
 8004292:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART1_IRQn 0 */

  /* USER CODE END USART1_IRQn 0 */
  HAL_UART_IRQHandler(&huart1);
 8004294:	4802      	ldr	r0, [pc, #8]	@ (80042a0 <USART1_IRQHandler+0x10>)
 8004296:	f009 fd0b 	bl	800dcb0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART1_IRQn 1 */

  /* USER CODE END USART1_IRQn 1 */
}
 800429a:	bf00      	nop
 800429c:	bd80      	pop	{r7, pc}
 800429e:	bf00      	nop
 80042a0:	24000324 	.word	0x24000324

080042a4 <USART2_IRQHandler>:

/**
  * @brief This function handles USART2 global interrupt.
  */
void USART2_IRQHandler(void)
{
 80042a4:	b580      	push	{r7, lr}
 80042a6:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART2_IRQn 0 */

  /* USER CODE END USART2_IRQn 0 */
  HAL_UART_IRQHandler(&huart2);
 80042a8:	4802      	ldr	r0, [pc, #8]	@ (80042b4 <USART2_IRQHandler+0x10>)
 80042aa:	f009 fd01 	bl	800dcb0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART2_IRQn 1 */

  /* USER CODE END USART2_IRQn 1 */
}
 80042ae:	bf00      	nop
 80042b0:	bd80      	pop	{r7, pc}
 80042b2:	bf00      	nop
 80042b4:	240003b8 	.word	0x240003b8

080042b8 <USART3_IRQHandler>:

/**
  * @brief This function handles USART3 global interrupt.
  */
void USART3_IRQHandler(void)
{
 80042b8:	b580      	push	{r7, lr}
 80042ba:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART3_IRQn 0 */

  /* USER CODE END USART3_IRQn 0 */
  HAL_UART_IRQHandler(&huart3);
 80042bc:	4802      	ldr	r0, [pc, #8]	@ (80042c8 <USART3_IRQHandler+0x10>)
 80042be:	f009 fcf7 	bl	800dcb0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART3_IRQn 1 */

  /* USER CODE END USART3_IRQn 1 */
}
 80042c2:	bf00      	nop
 80042c4:	bd80      	pop	{r7, pc}
 80042c6:	bf00      	nop
 80042c8:	2400044c 	.word	0x2400044c

080042cc <TIM6_DAC_IRQHandler>:

/**
  * @brief This function handles TIM6 global interrupt, DAC1_CH1 and DAC1_CH2 underrun error interrupts.
  */
void TIM6_DAC_IRQHandler(void)
{
 80042cc:	b580      	push	{r7, lr}
 80042ce:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN TIM6_DAC_IRQn 0 */

  /* USER CODE END TIM6_DAC_IRQn 0 */
  HAL_TIM_IRQHandler(&htim6);
 80042d0:	4802      	ldr	r0, [pc, #8]	@ (80042dc <TIM6_DAC_IRQHandler+0x10>)
 80042d2:	f009 fa15 	bl	800d700 <HAL_TIM_IRQHandler>
  /* USER CODE BEGIN TIM6_DAC_IRQn 1 */

  /* USER CODE END TIM6_DAC_IRQn 1 */
}
 80042d6:	bf00      	nop
 80042d8:	bd80      	pop	{r7, pc}
 80042da:	bf00      	nop
 80042dc:	24000fac 	.word	0x24000fac

080042e0 <ETH_IRQHandler>:

/**
  * @brief This function handles Ethernet global interrupt.
  */
void ETH_IRQHandler(void)
{
 80042e0:	b580      	push	{r7, lr}
 80042e2:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN ETH_IRQn 0 */

  /* USER CODE END ETH_IRQn 0 */
  HAL_ETH_IRQHandler(&heth);
 80042e4:	4802      	ldr	r0, [pc, #8]	@ (80042f0 <ETH_IRQHandler+0x10>)
 80042e6:	f004 fd2f 	bl	8008d48 <HAL_ETH_IRQHandler>
  /* USER CODE BEGIN ETH_IRQn 1 */

  /* USER CODE END ETH_IRQn 1 */
}
 80042ea:	bf00      	nop
 80042ec:	bd80      	pop	{r7, pc}
 80042ee:	bf00      	nop
 80042f0:	2400230c 	.word	0x2400230c

080042f4 <DMA2_Stream6_IRQHandler>:

/**
  * @brief This function handles DMA2 stream6 global interrupt.
  */
void DMA2_Stream6_IRQHandler(void)
{
 80042f4:	b580      	push	{r7, lr}
 80042f6:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream6_IRQn 0 */

  /* USER CODE END DMA2_Stream6_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_tx);
 80042f8:	4802      	ldr	r0, [pc, #8]	@ (8004304 <DMA2_Stream6_IRQHandler+0x10>)
 80042fa:	f002 ffeb 	bl	80072d4 <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream6_IRQn 1 */

  /* USER CODE END DMA2_Stream6_IRQn 1 */
}
 80042fe:	bf00      	nop
 8004300:	bd80      	pop	{r7, pc}
 8004302:	bf00      	nop
 8004304:	240005ec 	.word	0x240005ec

08004308 <DMA2_Stream7_IRQHandler>:

/**
  * @brief This function handles DMA2 stream7 global interrupt.
  */
void DMA2_Stream7_IRQHandler(void)
{
 8004308:	b580      	push	{r7, lr}
 800430a:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */

  /* USER CODE END DMA2_Stream7_IRQn 0 */
  HAL_DMA_IRQHandler(&hdma_uart8_rx);
 800430c:	4802      	ldr	r0, [pc, #8]	@ (8004318 <DMA2_Stream7_IRQHandler+0x10>)
 800430e:	f002 ffe1 	bl	80072d4 <HAL_DMA_IRQHandler>
  /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */

  /* USER CODE END DMA2_Stream7_IRQn 1 */
}
 8004312:	bf00      	nop
 8004314:	bd80      	pop	{r7, pc}
 8004316:	bf00      	nop
 8004318:	24000574 	.word	0x24000574

0800431c <USART6_IRQHandler>:

/**
  * @brief This function handles USART6 global interrupt.
  */
void USART6_IRQHandler(void)
{
 800431c:	b580      	push	{r7, lr}
 800431e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN USART6_IRQn 0 */

  /* USER CODE END USART6_IRQn 0 */
  HAL_UART_IRQHandler(&huart6);
 8004320:	4802      	ldr	r0, [pc, #8]	@ (800432c <USART6_IRQHandler+0x10>)
 8004322:	f009 fcc5 	bl	800dcb0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN USART6_IRQn 1 */

  /* USER CODE END USART6_IRQn 1 */
}
 8004326:	bf00      	nop
 8004328:	bd80      	pop	{r7, pc}
 800432a:	bf00      	nop
 800432c:	240004e0 	.word	0x240004e0

08004330 <UART8_IRQHandler>:

/**
  * @brief This function handles UART8 global interrupt.
  */
void UART8_IRQHandler(void)
{
 8004330:	b580      	push	{r7, lr}
 8004332:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UART8_IRQn 0 */

  /* USER CODE END UART8_IRQn 0 */
  HAL_UART_IRQHandler(&huart8);
 8004334:	4802      	ldr	r0, [pc, #8]	@ (8004340 <UART8_IRQHandler+0x10>)
 8004336:	f009 fcbb 	bl	800dcb0 <HAL_UART_IRQHandler>
  /* USER CODE BEGIN UART8_IRQn 1 */

  /* USER CODE END UART8_IRQn 1 */
}
 800433a:	bf00      	nop
 800433c:	bd80      	pop	{r7, pc}
 800433e:	bf00      	nop
 8004340:	24000290 	.word	0x24000290

08004344 <_getpid>:
void initialise_monitor_handles()
{
}

int _getpid(void)
{
 8004344:	b480      	push	{r7}
 8004346:	af00      	add	r7, sp, #0
  return 1;
 8004348:	2301      	movs	r3, #1
}
 800434a:	4618      	mov	r0, r3
 800434c:	46bd      	mov	sp, r7
 800434e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004352:	4770      	bx	lr

08004354 <_kill>:

int _kill(int pid, int sig)
{
 8004354:	b480      	push	{r7}
 8004356:	b083      	sub	sp, #12
 8004358:	af00      	add	r7, sp, #0
 800435a:	6078      	str	r0, [r7, #4]
 800435c:	6039      	str	r1, [r7, #0]
  (void)pid;
  (void)sig;
  errno = EINVAL;
 800435e:	4b05      	ldr	r3, [pc, #20]	@ (8004374 <_kill+0x20>)
 8004360:	2216      	movs	r2, #22
 8004362:	601a      	str	r2, [r3, #0]
  return -1;
 8004364:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8004368:	4618      	mov	r0, r3
 800436a:	370c      	adds	r7, #12
 800436c:	46bd      	mov	sp, r7
 800436e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004372:	4770      	bx	lr
 8004374:	2402b2a0 	.word	0x2402b2a0

08004378 <_exit>:

void _exit (int status)
{
 8004378:	b580      	push	{r7, lr}
 800437a:	b082      	sub	sp, #8
 800437c:	af00      	add	r7, sp, #0
 800437e:	6078      	str	r0, [r7, #4]
  _kill(status, -1);
 8004380:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004384:	6878      	ldr	r0, [r7, #4]
 8004386:	f7ff ffe5 	bl	8004354 <_kill>
  while (1) {}    /* Make sure we hang here */
 800438a:	bf00      	nop
 800438c:	e7fd      	b.n	800438a <_exit+0x12>

0800438e <_read>:
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
 800438e:	b580      	push	{r7, lr}
 8004390:	b086      	sub	sp, #24
 8004392:	af00      	add	r7, sp, #0
 8004394:	60f8      	str	r0, [r7, #12]
 8004396:	60b9      	str	r1, [r7, #8]
 8004398:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 800439a:	2300      	movs	r3, #0
 800439c:	617b      	str	r3, [r7, #20]
 800439e:	e00a      	b.n	80043b6 <_read+0x28>
  {
    *ptr++ = __io_getchar();
 80043a0:	f3af 8000 	nop.w
 80043a4:	4601      	mov	r1, r0
 80043a6:	68bb      	ldr	r3, [r7, #8]
 80043a8:	1c5a      	adds	r2, r3, #1
 80043aa:	60ba      	str	r2, [r7, #8]
 80043ac:	b2ca      	uxtb	r2, r1
 80043ae:	701a      	strb	r2, [r3, #0]
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 80043b0:	697b      	ldr	r3, [r7, #20]
 80043b2:	3301      	adds	r3, #1
 80043b4:	617b      	str	r3, [r7, #20]
 80043b6:	697a      	ldr	r2, [r7, #20]
 80043b8:	687b      	ldr	r3, [r7, #4]
 80043ba:	429a      	cmp	r2, r3
 80043bc:	dbf0      	blt.n	80043a0 <_read+0x12>
  }

  return len;
 80043be:	687b      	ldr	r3, [r7, #4]
}
 80043c0:	4618      	mov	r0, r3
 80043c2:	3718      	adds	r7, #24
 80043c4:	46bd      	mov	sp, r7
 80043c6:	bd80      	pop	{r7, pc}

080043c8 <_write>:

__attribute__((weak)) int _write(int file, char *ptr, int len)
{
 80043c8:	b580      	push	{r7, lr}
 80043ca:	b086      	sub	sp, #24
 80043cc:	af00      	add	r7, sp, #0
 80043ce:	60f8      	str	r0, [r7, #12]
 80043d0:	60b9      	str	r1, [r7, #8]
 80043d2:	607a      	str	r2, [r7, #4]
  (void)file;
  int DataIdx;

  for (DataIdx = 0; DataIdx < len; DataIdx++)
 80043d4:	2300      	movs	r3, #0
 80043d6:	617b      	str	r3, [r7, #20]
 80043d8:	e009      	b.n	80043ee <_write+0x26>
  {
    __io_putchar(*ptr++);
 80043da:	68bb      	ldr	r3, [r7, #8]
 80043dc:	1c5a      	adds	r2, r3, #1
 80043de:	60ba      	str	r2, [r7, #8]
 80043e0:	781b      	ldrb	r3, [r3, #0]
 80043e2:	4618      	mov	r0, r3
 80043e4:	f7fd fca5 	bl	8001d32 <__io_putchar>
  for (DataIdx = 0; DataIdx < len; DataIdx++)
 80043e8:	697b      	ldr	r3, [r7, #20]
 80043ea:	3301      	adds	r3, #1
 80043ec:	617b      	str	r3, [r7, #20]
 80043ee:	697a      	ldr	r2, [r7, #20]
 80043f0:	687b      	ldr	r3, [r7, #4]
 80043f2:	429a      	cmp	r2, r3
 80043f4:	dbf1      	blt.n	80043da <_write+0x12>
//	  ITM_SendChar(*ptr++);
  }
  return len;
 80043f6:	687b      	ldr	r3, [r7, #4]
}
 80043f8:	4618      	mov	r0, r3
 80043fa:	3718      	adds	r7, #24
 80043fc:	46bd      	mov	sp, r7
 80043fe:	bd80      	pop	{r7, pc}

08004400 <_close>:

int _close(int file)
{
 8004400:	b480      	push	{r7}
 8004402:	b083      	sub	sp, #12
 8004404:	af00      	add	r7, sp, #0
 8004406:	6078      	str	r0, [r7, #4]
  (void)file;
  return -1;
 8004408:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 800440c:	4618      	mov	r0, r3
 800440e:	370c      	adds	r7, #12
 8004410:	46bd      	mov	sp, r7
 8004412:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004416:	4770      	bx	lr

08004418 <_fstat>:


int _fstat(int file, struct stat *st)
{
 8004418:	b480      	push	{r7}
 800441a:	b083      	sub	sp, #12
 800441c:	af00      	add	r7, sp, #0
 800441e:	6078      	str	r0, [r7, #4]
 8004420:	6039      	str	r1, [r7, #0]
  (void)file;
  st->st_mode = S_IFCHR;
 8004422:	683b      	ldr	r3, [r7, #0]
 8004424:	f44f 5200 	mov.w	r2, #8192	@ 0x2000
 8004428:	605a      	str	r2, [r3, #4]
  return 0;
 800442a:	2300      	movs	r3, #0
}
 800442c:	4618      	mov	r0, r3
 800442e:	370c      	adds	r7, #12
 8004430:	46bd      	mov	sp, r7
 8004432:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004436:	4770      	bx	lr

08004438 <_isatty>:

int _isatty(int file)
{
 8004438:	b480      	push	{r7}
 800443a:	b083      	sub	sp, #12
 800443c:	af00      	add	r7, sp, #0
 800443e:	6078      	str	r0, [r7, #4]
  (void)file;
  return 1;
 8004440:	2301      	movs	r3, #1
}
 8004442:	4618      	mov	r0, r3
 8004444:	370c      	adds	r7, #12
 8004446:	46bd      	mov	sp, r7
 8004448:	f85d 7b04 	ldr.w	r7, [sp], #4
 800444c:	4770      	bx	lr

0800444e <_lseek>:

int _lseek(int file, int ptr, int dir)
{
 800444e:	b480      	push	{r7}
 8004450:	b085      	sub	sp, #20
 8004452:	af00      	add	r7, sp, #0
 8004454:	60f8      	str	r0, [r7, #12]
 8004456:	60b9      	str	r1, [r7, #8]
 8004458:	607a      	str	r2, [r7, #4]
  (void)file;
  (void)ptr;
  (void)dir;
  return 0;
 800445a:	2300      	movs	r3, #0
}
 800445c:	4618      	mov	r0, r3
 800445e:	3714      	adds	r7, #20
 8004460:	46bd      	mov	sp, r7
 8004462:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004466:	4770      	bx	lr

08004468 <_sbrk>:
 *
 * @param incr Memory size
 * @return Pointer to allocated memory
 */
void *_sbrk(ptrdiff_t incr)
{
 8004468:	b480      	push	{r7}
 800446a:	b087      	sub	sp, #28
 800446c:	af00      	add	r7, sp, #0
 800446e:	6078      	str	r0, [r7, #4]
  extern uint8_t _end; /* Symbol defined in the linker script */
  extern uint8_t _estack; /* Symbol defined in the linker script */
  extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
  const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
 8004470:	4a14      	ldr	r2, [pc, #80]	@ (80044c4 <_sbrk+0x5c>)
 8004472:	4b15      	ldr	r3, [pc, #84]	@ (80044c8 <_sbrk+0x60>)
 8004474:	1ad3      	subs	r3, r2, r3
 8004476:	617b      	str	r3, [r7, #20]
  const uint8_t *max_heap = (uint8_t *)stack_limit;
 8004478:	697b      	ldr	r3, [r7, #20]
 800447a:	613b      	str	r3, [r7, #16]
  uint8_t *prev_heap_end;

  /* Initialize heap end at first call */
  if (NULL == __sbrk_heap_end)
 800447c:	4b13      	ldr	r3, [pc, #76]	@ (80044cc <_sbrk+0x64>)
 800447e:	681b      	ldr	r3, [r3, #0]
 8004480:	2b00      	cmp	r3, #0
 8004482:	d102      	bne.n	800448a <_sbrk+0x22>
  {
    __sbrk_heap_end = &_end;
 8004484:	4b11      	ldr	r3, [pc, #68]	@ (80044cc <_sbrk+0x64>)
 8004486:	4a12      	ldr	r2, [pc, #72]	@ (80044d0 <_sbrk+0x68>)
 8004488:	601a      	str	r2, [r3, #0]
  }

  /* Protect heap from growing into the reserved MSP stack */
  if (__sbrk_heap_end + incr > max_heap)
 800448a:	4b10      	ldr	r3, [pc, #64]	@ (80044cc <_sbrk+0x64>)
 800448c:	681a      	ldr	r2, [r3, #0]
 800448e:	687b      	ldr	r3, [r7, #4]
 8004490:	4413      	add	r3, r2
 8004492:	693a      	ldr	r2, [r7, #16]
 8004494:	429a      	cmp	r2, r3
 8004496:	d205      	bcs.n	80044a4 <_sbrk+0x3c>
  {
    errno = ENOMEM;
 8004498:	4b0e      	ldr	r3, [pc, #56]	@ (80044d4 <_sbrk+0x6c>)
 800449a:	220c      	movs	r2, #12
 800449c:	601a      	str	r2, [r3, #0]
    return (void *)-1;
 800449e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80044a2:	e009      	b.n	80044b8 <_sbrk+0x50>
  }

  prev_heap_end = __sbrk_heap_end;
 80044a4:	4b09      	ldr	r3, [pc, #36]	@ (80044cc <_sbrk+0x64>)
 80044a6:	681b      	ldr	r3, [r3, #0]
 80044a8:	60fb      	str	r3, [r7, #12]
  __sbrk_heap_end += incr;
 80044aa:	4b08      	ldr	r3, [pc, #32]	@ (80044cc <_sbrk+0x64>)
 80044ac:	681a      	ldr	r2, [r3, #0]
 80044ae:	687b      	ldr	r3, [r7, #4]
 80044b0:	4413      	add	r3, r2
 80044b2:	4a06      	ldr	r2, [pc, #24]	@ (80044cc <_sbrk+0x64>)
 80044b4:	6013      	str	r3, [r2, #0]

  return (void *)prev_heap_end;
 80044b6:	68fb      	ldr	r3, [r7, #12]
}
 80044b8:	4618      	mov	r0, r3
 80044ba:	371c      	adds	r7, #28
 80044bc:	46bd      	mov	sp, r7
 80044be:	f85d 7b04 	ldr.w	r7, [sp], #4
 80044c2:	4770      	bx	lr
 80044c4:	24060000 	.word	0x24060000
 80044c8:	00000400 	.word	0x00000400
 80044cc:	24000ff8 	.word	0x24000ff8
 80044d0:	2402b2a8 	.word	0x2402b2a8
 80044d4:	2402b2a0 	.word	0x2402b2a0

080044d8 <SystemInit>:
  *         configuration.
  * @param  None
  * @retval None
  */
void SystemInit (void)
{
 80044d8:	b480      	push	{r7}
 80044da:	af00      	add	r7, sp, #0
 __IO uint32_t tmpreg;
#endif /* DATA_IN_D2_SRAM */

  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2)));  /* set CP10 and CP11 Full Access */
 80044dc:	4b37      	ldr	r3, [pc, #220]	@ (80045bc <SystemInit+0xe4>)
 80044de:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 80044e2:	4a36      	ldr	r2, [pc, #216]	@ (80045bc <SystemInit+0xe4>)
 80044e4:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 80044e8:	f8c2 3088 	str.w	r3, [r2, #136]	@ 0x88
  #endif
  /* Reset the RCC clock configuration to the default reset state ------------*/

   /* Increasing the CPU frequency */
  if(FLASH_LATENCY_DEFAULT  > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 80044ec:	4b34      	ldr	r3, [pc, #208]	@ (80045c0 <SystemInit+0xe8>)
 80044ee:	681b      	ldr	r3, [r3, #0]
 80044f0:	f003 030f 	and.w	r3, r3, #15
 80044f4:	2b06      	cmp	r3, #6
 80044f6:	d807      	bhi.n	8004508 <SystemInit+0x30>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 80044f8:	4b31      	ldr	r3, [pc, #196]	@ (80045c0 <SystemInit+0xe8>)
 80044fa:	681b      	ldr	r3, [r3, #0]
 80044fc:	f023 030f 	bic.w	r3, r3, #15
 8004500:	4a2f      	ldr	r2, [pc, #188]	@ (80045c0 <SystemInit+0xe8>)
 8004502:	f043 0307 	orr.w	r3, r3, #7
 8004506:	6013      	str	r3, [r2, #0]
  }

  /* Set HSION bit */
  RCC->CR |= RCC_CR_HSION;
 8004508:	4b2e      	ldr	r3, [pc, #184]	@ (80045c4 <SystemInit+0xec>)
 800450a:	681b      	ldr	r3, [r3, #0]
 800450c:	4a2d      	ldr	r2, [pc, #180]	@ (80045c4 <SystemInit+0xec>)
 800450e:	f043 0301 	orr.w	r3, r3, #1
 8004512:	6013      	str	r3, [r2, #0]

  /* Reset CFGR register */
  RCC->CFGR = 0x00000000;
 8004514:	4b2b      	ldr	r3, [pc, #172]	@ (80045c4 <SystemInit+0xec>)
 8004516:	2200      	movs	r2, #0
 8004518:	611a      	str	r2, [r3, #16]

  /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */
  RCC->CR &= 0xEAF6ED7FU;
 800451a:	4b2a      	ldr	r3, [pc, #168]	@ (80045c4 <SystemInit+0xec>)
 800451c:	681a      	ldr	r2, [r3, #0]
 800451e:	4929      	ldr	r1, [pc, #164]	@ (80045c4 <SystemInit+0xec>)
 8004520:	4b29      	ldr	r3, [pc, #164]	@ (80045c8 <SystemInit+0xf0>)
 8004522:	4013      	ands	r3, r2
 8004524:	600b      	str	r3, [r1, #0]

   /* Decreasing the number of wait states because of lower CPU frequency */
  if(FLASH_LATENCY_DEFAULT  < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)))
 8004526:	4b26      	ldr	r3, [pc, #152]	@ (80045c0 <SystemInit+0xe8>)
 8004528:	681b      	ldr	r3, [r3, #0]
 800452a:	f003 0308 	and.w	r3, r3, #8
 800452e:	2b00      	cmp	r3, #0
 8004530:	d007      	beq.n	8004542 <SystemInit+0x6a>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT));
 8004532:	4b23      	ldr	r3, [pc, #140]	@ (80045c0 <SystemInit+0xe8>)
 8004534:	681b      	ldr	r3, [r3, #0]
 8004536:	f023 030f 	bic.w	r3, r3, #15
 800453a:	4a21      	ldr	r2, [pc, #132]	@ (80045c0 <SystemInit+0xe8>)
 800453c:	f043 0307 	orr.w	r3, r3, #7
 8004540:	6013      	str	r3, [r2, #0]
  }

#if defined(D3_SRAM_BASE)
  /* Reset D1CFGR register */
  RCC->D1CFGR = 0x00000000;
 8004542:	4b20      	ldr	r3, [pc, #128]	@ (80045c4 <SystemInit+0xec>)
 8004544:	2200      	movs	r2, #0
 8004546:	619a      	str	r2, [r3, #24]

  /* Reset D2CFGR register */
  RCC->D2CFGR = 0x00000000;
 8004548:	4b1e      	ldr	r3, [pc, #120]	@ (80045c4 <SystemInit+0xec>)
 800454a:	2200      	movs	r2, #0
 800454c:	61da      	str	r2, [r3, #28]

  /* Reset D3CFGR register */
  RCC->D3CFGR = 0x00000000;
 800454e:	4b1d      	ldr	r3, [pc, #116]	@ (80045c4 <SystemInit+0xec>)
 8004550:	2200      	movs	r2, #0
 8004552:	621a      	str	r2, [r3, #32]

  /* Reset SRDCFGR register */
  RCC->SRDCFGR = 0x00000000;
#endif
  /* Reset PLLCKSELR register */
  RCC->PLLCKSELR = 0x02020200;
 8004554:	4b1b      	ldr	r3, [pc, #108]	@ (80045c4 <SystemInit+0xec>)
 8004556:	4a1d      	ldr	r2, [pc, #116]	@ (80045cc <SystemInit+0xf4>)
 8004558:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Reset PLLCFGR register */
  RCC->PLLCFGR = 0x01FF0000;
 800455a:	4b1a      	ldr	r3, [pc, #104]	@ (80045c4 <SystemInit+0xec>)
 800455c:	4a1c      	ldr	r2, [pc, #112]	@ (80045d0 <SystemInit+0xf8>)
 800455e:	62da      	str	r2, [r3, #44]	@ 0x2c
  /* Reset PLL1DIVR register */
  RCC->PLL1DIVR = 0x01010280;
 8004560:	4b18      	ldr	r3, [pc, #96]	@ (80045c4 <SystemInit+0xec>)
 8004562:	4a1c      	ldr	r2, [pc, #112]	@ (80045d4 <SystemInit+0xfc>)
 8004564:	631a      	str	r2, [r3, #48]	@ 0x30
  /* Reset PLL1FRACR register */
  RCC->PLL1FRACR = 0x00000000;
 8004566:	4b17      	ldr	r3, [pc, #92]	@ (80045c4 <SystemInit+0xec>)
 8004568:	2200      	movs	r2, #0
 800456a:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Reset PLL2DIVR register */
  RCC->PLL2DIVR = 0x01010280;
 800456c:	4b15      	ldr	r3, [pc, #84]	@ (80045c4 <SystemInit+0xec>)
 800456e:	4a19      	ldr	r2, [pc, #100]	@ (80045d4 <SystemInit+0xfc>)
 8004570:	639a      	str	r2, [r3, #56]	@ 0x38

  /* Reset PLL2FRACR register */

  RCC->PLL2FRACR = 0x00000000;
 8004572:	4b14      	ldr	r3, [pc, #80]	@ (80045c4 <SystemInit+0xec>)
 8004574:	2200      	movs	r2, #0
 8004576:	63da      	str	r2, [r3, #60]	@ 0x3c
  /* Reset PLL3DIVR register */
  RCC->PLL3DIVR = 0x01010280;
 8004578:	4b12      	ldr	r3, [pc, #72]	@ (80045c4 <SystemInit+0xec>)
 800457a:	4a16      	ldr	r2, [pc, #88]	@ (80045d4 <SystemInit+0xfc>)
 800457c:	641a      	str	r2, [r3, #64]	@ 0x40

  /* Reset PLL3FRACR register */
  RCC->PLL3FRACR = 0x00000000;
 800457e:	4b11      	ldr	r3, [pc, #68]	@ (80045c4 <SystemInit+0xec>)
 8004580:	2200      	movs	r2, #0
 8004582:	645a      	str	r2, [r3, #68]	@ 0x44

  /* Reset HSEBYP bit */
  RCC->CR &= 0xFFFBFFFFU;
 8004584:	4b0f      	ldr	r3, [pc, #60]	@ (80045c4 <SystemInit+0xec>)
 8004586:	681b      	ldr	r3, [r3, #0]
 8004588:	4a0e      	ldr	r2, [pc, #56]	@ (80045c4 <SystemInit+0xec>)
 800458a:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 800458e:	6013      	str	r3, [r2, #0]

  /* Disable all interrupts */
  RCC->CIER = 0x00000000;
 8004590:	4b0c      	ldr	r3, [pc, #48]	@ (80045c4 <SystemInit+0xec>)
 8004592:	2200      	movs	r2, #0
 8004594:	661a      	str	r2, [r3, #96]	@ 0x60

#if (STM32H7_DEV_ID == 0x450UL)
  /* dual core CM7 or single core line */
  if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U)
 8004596:	4b10      	ldr	r3, [pc, #64]	@ (80045d8 <SystemInit+0x100>)
 8004598:	681a      	ldr	r2, [r3, #0]
 800459a:	4b10      	ldr	r3, [pc, #64]	@ (80045dc <SystemInit+0x104>)
 800459c:	4013      	ands	r3, r2
 800459e:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 80045a2:	d202      	bcs.n	80045aa <SystemInit+0xd2>
  {
    /* if stm32h7 revY*/
    /* Change  the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */
    *((__IO uint32_t*)0x51008108) = 0x000000001U;
 80045a4:	4b0e      	ldr	r3, [pc, #56]	@ (80045e0 <SystemInit+0x108>)
 80045a6:	2201      	movs	r2, #1
 80045a8:	601a      	str	r2, [r3, #0]
  /*
   * Disable the FMC bank1 (enabled after reset).
   * This, prevents CPU speculation access on this bank which blocks the use of FMC during
   * 24us. During this time the others FMC master (such as LTDC) cannot use it!
   */
  FMC_Bank1_R->BTCR[0] = 0x000030D2;
 80045aa:	4b0e      	ldr	r3, [pc, #56]	@ (80045e4 <SystemInit+0x10c>)
 80045ac:	f243 02d2 	movw	r2, #12498	@ 0x30d2
 80045b0:	601a      	str	r2, [r3, #0]
#if defined(USER_VECT_TAB_ADDRESS)
  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */
#endif /* USER_VECT_TAB_ADDRESS */

#endif /*DUAL_CORE && CORE_CM4*/
}
 80045b2:	bf00      	nop
 80045b4:	46bd      	mov	sp, r7
 80045b6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80045ba:	4770      	bx	lr
 80045bc:	e000ed00 	.word	0xe000ed00
 80045c0:	52002000 	.word	0x52002000
 80045c4:	58024400 	.word	0x58024400
 80045c8:	eaf6ed7f 	.word	0xeaf6ed7f
 80045cc:	02020200 	.word	0x02020200
 80045d0:	01ff0000 	.word	0x01ff0000
 80045d4:	01010280 	.word	0x01010280
 80045d8:	5c001000 	.word	0x5c001000
 80045dc:	ffff0000 	.word	0xffff0000
 80045e0:	51008108 	.word	0x51008108
 80045e4:	52004000 	.word	0x52004000

080045e8 <UartTasksInit>:
osMutexId_t resMeasurementsMutex;
osMutexId_t sensorsInfoMutex;

extern RNG_HandleTypeDef hrng;

void UartTasksInit (void) {
 80045e8:	b580      	push	{r7, lr}
 80045ea:	af00      	add	r7, sp, #0
    uart1TaskData.uartRxBuffer    = uart1RxBuffer;
 80045ec:	4b4e      	ldr	r3, [pc, #312]	@ (8004728 <UartTasksInit+0x140>)
 80045ee:	4a4f      	ldr	r2, [pc, #316]	@ (800472c <UartTasksInit+0x144>)
 80045f0:	601a      	str	r2, [r3, #0]
    uart1TaskData.uartRxBufferLen = UART1_RX_BUFF_SIZE;
 80045f2:	4b4d      	ldr	r3, [pc, #308]	@ (8004728 <UartTasksInit+0x140>)
 80045f4:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80045f8:	809a      	strh	r2, [r3, #4]
    uart1TaskData.uartTxBuffer    = uart1TxBuffer;
 80045fa:	4b4b      	ldr	r3, [pc, #300]	@ (8004728 <UartTasksInit+0x140>)
 80045fc:	4a4c      	ldr	r2, [pc, #304]	@ (8004730 <UartTasksInit+0x148>)
 80045fe:	609a      	str	r2, [r3, #8]
    uart1TaskData.uartRxBufferLen = UART1_TX_BUFF_SIZE;
 8004600:	4b49      	ldr	r3, [pc, #292]	@ (8004728 <UartTasksInit+0x140>)
 8004602:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004606:	809a      	strh	r2, [r3, #4]
    uart1TaskData.frameData       = uart1TaskFrameData;
 8004608:	4b47      	ldr	r3, [pc, #284]	@ (8004728 <UartTasksInit+0x140>)
 800460a:	4a4a      	ldr	r2, [pc, #296]	@ (8004734 <UartTasksInit+0x14c>)
 800460c:	611a      	str	r2, [r3, #16]
    uart1TaskData.frameDataLen    = UART1_RX_BUFF_SIZE;
 800460e:	4b46      	ldr	r3, [pc, #280]	@ (8004728 <UartTasksInit+0x140>)
 8004610:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004614:	829a      	strh	r2, [r3, #20]
    uart1TaskData.huart           = &huart1;
 8004616:	4b44      	ldr	r3, [pc, #272]	@ (8004728 <UartTasksInit+0x140>)
 8004618:	4a47      	ldr	r2, [pc, #284]	@ (8004738 <UartTasksInit+0x150>)
 800461a:	631a      	str	r2, [r3, #48]	@ 0x30
    uart1TaskData.uartNumber      = 1;
 800461c:	4b42      	ldr	r3, [pc, #264]	@ (8004728 <UartTasksInit+0x140>)
 800461e:	2201      	movs	r2, #1
 8004620:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart2TaskData.uartRxBuffer    = uart2RxBuffer;
 8004624:	4b45      	ldr	r3, [pc, #276]	@ (800473c <UartTasksInit+0x154>)
 8004626:	4a46      	ldr	r2, [pc, #280]	@ (8004740 <UartTasksInit+0x158>)
 8004628:	601a      	str	r2, [r3, #0]
    uart2TaskData.uartRxBufferLen = UART2_RX_BUFF_SIZE;
 800462a:	4b44      	ldr	r3, [pc, #272]	@ (800473c <UartTasksInit+0x154>)
 800462c:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004630:	809a      	strh	r2, [r3, #4]
    uart2TaskData.uartTxBuffer    = uart2TxBuffer;
 8004632:	4b42      	ldr	r3, [pc, #264]	@ (800473c <UartTasksInit+0x154>)
 8004634:	4a43      	ldr	r2, [pc, #268]	@ (8004744 <UartTasksInit+0x15c>)
 8004636:	609a      	str	r2, [r3, #8]
    uart2TaskData.uartRxBufferLen = UART2_TX_BUFF_SIZE;
 8004638:	4b40      	ldr	r3, [pc, #256]	@ (800473c <UartTasksInit+0x154>)
 800463a:	f44f 7280 	mov.w	r2, #256	@ 0x100
 800463e:	809a      	strh	r2, [r3, #4]
    uart2TaskData.frameData       = uart2TaskFrameData;
 8004640:	4b3e      	ldr	r3, [pc, #248]	@ (800473c <UartTasksInit+0x154>)
 8004642:	4a41      	ldr	r2, [pc, #260]	@ (8004748 <UartTasksInit+0x160>)
 8004644:	611a      	str	r2, [r3, #16]
    uart2TaskData.frameDataLen    = UART2_RX_BUFF_SIZE;
 8004646:	4b3d      	ldr	r3, [pc, #244]	@ (800473c <UartTasksInit+0x154>)
 8004648:	f44f 7280 	mov.w	r2, #256	@ 0x100
 800464c:	829a      	strh	r2, [r3, #20]
    uart2TaskData.huart           = &huart2;
 800464e:	4b3b      	ldr	r3, [pc, #236]	@ (800473c <UartTasksInit+0x154>)
 8004650:	4a3e      	ldr	r2, [pc, #248]	@ (800474c <UartTasksInit+0x164>)
 8004652:	631a      	str	r2, [r3, #48]	@ 0x30
    uart2TaskData.uartNumber      = 2;
 8004654:	4b39      	ldr	r3, [pc, #228]	@ (800473c <UartTasksInit+0x154>)
 8004656:	2202      	movs	r2, #2
 8004658:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart3TaskData.uartRxBuffer    = uart3RxBuffer;
 800465c:	4b3c      	ldr	r3, [pc, #240]	@ (8004750 <UartTasksInit+0x168>)
 800465e:	4a3d      	ldr	r2, [pc, #244]	@ (8004754 <UartTasksInit+0x16c>)
 8004660:	601a      	str	r2, [r3, #0]
    uart3TaskData.uartRxBufferLen = UART3_RX_BUFF_SIZE;
 8004662:	4b3b      	ldr	r3, [pc, #236]	@ (8004750 <UartTasksInit+0x168>)
 8004664:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004668:	809a      	strh	r2, [r3, #4]
    uart3TaskData.uartTxBuffer    = uart3TxBuffer;
 800466a:	4b39      	ldr	r3, [pc, #228]	@ (8004750 <UartTasksInit+0x168>)
 800466c:	4a3a      	ldr	r2, [pc, #232]	@ (8004758 <UartTasksInit+0x170>)
 800466e:	609a      	str	r2, [r3, #8]
    uart3TaskData.uartRxBufferLen = UART3_TX_BUFF_SIZE;
 8004670:	4b37      	ldr	r3, [pc, #220]	@ (8004750 <UartTasksInit+0x168>)
 8004672:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004676:	809a      	strh	r2, [r3, #4]
    uart3TaskData.frameData       = uart3TaskFrameData;
 8004678:	4b35      	ldr	r3, [pc, #212]	@ (8004750 <UartTasksInit+0x168>)
 800467a:	4a38      	ldr	r2, [pc, #224]	@ (800475c <UartTasksInit+0x174>)
 800467c:	611a      	str	r2, [r3, #16]
    uart3TaskData.frameDataLen    = UART3_RX_BUFF_SIZE;
 800467e:	4b34      	ldr	r3, [pc, #208]	@ (8004750 <UartTasksInit+0x168>)
 8004680:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8004684:	829a      	strh	r2, [r3, #20]
    uart3TaskData.huart           = &huart3;
 8004686:	4b32      	ldr	r3, [pc, #200]	@ (8004750 <UartTasksInit+0x168>)
 8004688:	4a35      	ldr	r2, [pc, #212]	@ (8004760 <UartTasksInit+0x178>)
 800468a:	631a      	str	r2, [r3, #48]	@ 0x30
    uart3TaskData.uartNumber      = 3;
 800468c:	4b30      	ldr	r3, [pc, #192]	@ (8004750 <UartTasksInit+0x168>)
 800468e:	2203      	movs	r2, #3
 8004690:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart6TaskData.uartRxBuffer    = uart6RxBuffer;
 8004694:	4b33      	ldr	r3, [pc, #204]	@ (8004764 <UartTasksInit+0x17c>)
 8004696:	4a34      	ldr	r2, [pc, #208]	@ (8004768 <UartTasksInit+0x180>)
 8004698:	601a      	str	r2, [r3, #0]
    uart6TaskData.uartRxBufferLen = UART6_RX_BUFF_SIZE;
 800469a:	4b32      	ldr	r3, [pc, #200]	@ (8004764 <UartTasksInit+0x17c>)
 800469c:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80046a0:	809a      	strh	r2, [r3, #4]
    uart6TaskData.uartTxBuffer    = uart6TxBuffer;
 80046a2:	4b30      	ldr	r3, [pc, #192]	@ (8004764 <UartTasksInit+0x17c>)
 80046a4:	4a31      	ldr	r2, [pc, #196]	@ (800476c <UartTasksInit+0x184>)
 80046a6:	609a      	str	r2, [r3, #8]
    uart6TaskData.uartRxBufferLen = UART6_TX_BUFF_SIZE;
 80046a8:	4b2e      	ldr	r3, [pc, #184]	@ (8004764 <UartTasksInit+0x17c>)
 80046aa:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80046ae:	809a      	strh	r2, [r3, #4]
    uart6TaskData.frameData       = uart6TaskFrameData;
 80046b0:	4b2c      	ldr	r3, [pc, #176]	@ (8004764 <UartTasksInit+0x17c>)
 80046b2:	4a2f      	ldr	r2, [pc, #188]	@ (8004770 <UartTasksInit+0x188>)
 80046b4:	611a      	str	r2, [r3, #16]
    uart6TaskData.frameDataLen    = UART6_RX_BUFF_SIZE;
 80046b6:	4b2b      	ldr	r3, [pc, #172]	@ (8004764 <UartTasksInit+0x17c>)
 80046b8:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80046bc:	829a      	strh	r2, [r3, #20]
    uart6TaskData.huart           = &huart6;
 80046be:	4b29      	ldr	r3, [pc, #164]	@ (8004764 <UartTasksInit+0x17c>)
 80046c0:	4a2c      	ldr	r2, [pc, #176]	@ (8004774 <UartTasksInit+0x18c>)
 80046c2:	631a      	str	r2, [r3, #48]	@ 0x30
    uart6TaskData.uartNumber      = 6;
 80046c4:	4b27      	ldr	r3, [pc, #156]	@ (8004764 <UartTasksInit+0x17c>)
 80046c6:	2206      	movs	r2, #6
 80046c8:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    uart8TaskData.uartRxBuffer    = uart8RxBuffer;
 80046cc:	4b2a      	ldr	r3, [pc, #168]	@ (8004778 <UartTasksInit+0x190>)
 80046ce:	4a2b      	ldr	r2, [pc, #172]	@ (800477c <UartTasksInit+0x194>)
 80046d0:	601a      	str	r2, [r3, #0]
    uart8TaskData.uartRxBufferLen = UART8_RX_BUFF_SIZE;
 80046d2:	4b29      	ldr	r3, [pc, #164]	@ (8004778 <UartTasksInit+0x190>)
 80046d4:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80046d8:	809a      	strh	r2, [r3, #4]
    uart8TaskData.uartTxBuffer    = uart8TxBuffer;
 80046da:	4b27      	ldr	r3, [pc, #156]	@ (8004778 <UartTasksInit+0x190>)
 80046dc:	4a28      	ldr	r2, [pc, #160]	@ (8004780 <UartTasksInit+0x198>)
 80046de:	609a      	str	r2, [r3, #8]
    uart8TaskData.uartRxBufferLen = UART8_TX_BUFF_SIZE;
 80046e0:	4b25      	ldr	r3, [pc, #148]	@ (8004778 <UartTasksInit+0x190>)
 80046e2:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80046e6:	809a      	strh	r2, [r3, #4]
    uart8TaskData.frameData       = uart8TaskFrameData;
 80046e8:	4b23      	ldr	r3, [pc, #140]	@ (8004778 <UartTasksInit+0x190>)
 80046ea:	4a26      	ldr	r2, [pc, #152]	@ (8004784 <UartTasksInit+0x19c>)
 80046ec:	611a      	str	r2, [r3, #16]
    uart8TaskData.frameDataLen    = UART8_RX_BUFF_SIZE;
 80046ee:	4b22      	ldr	r3, [pc, #136]	@ (8004778 <UartTasksInit+0x190>)
 80046f0:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80046f4:	829a      	strh	r2, [r3, #20]
    uart8TaskData.huart           = &huart8;
 80046f6:	4b20      	ldr	r3, [pc, #128]	@ (8004778 <UartTasksInit+0x190>)
 80046f8:	4a23      	ldr	r2, [pc, #140]	@ (8004788 <UartTasksInit+0x1a0>)
 80046fa:	631a      	str	r2, [r3, #48]	@ 0x30
    uart8TaskData.uartNumber      = 8;
 80046fc:	4b1e      	ldr	r3, [pc, #120]	@ (8004778 <UartTasksInit+0x190>)
 80046fe:	2208      	movs	r2, #8
 8004700:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    UartTaskCreate (&uart1TaskData);
 8004704:	4808      	ldr	r0, [pc, #32]	@ (8004728 <UartTasksInit+0x140>)
 8004706:	f000 f841 	bl	800478c <UartTaskCreate>
    UartTaskCreate (&uart2TaskData);
 800470a:	480c      	ldr	r0, [pc, #48]	@ (800473c <UartTasksInit+0x154>)
 800470c:	f000 f83e 	bl	800478c <UartTaskCreate>
    UartTaskCreate (&uart3TaskData);
 8004710:	480f      	ldr	r0, [pc, #60]	@ (8004750 <UartTasksInit+0x168>)
 8004712:	f000 f83b 	bl	800478c <UartTaskCreate>
    UartTaskCreate (&uart6TaskData);
 8004716:	4813      	ldr	r0, [pc, #76]	@ (8004764 <UartTasksInit+0x17c>)
 8004718:	f000 f838 	bl	800478c <UartTaskCreate>
    UartTaskCreate (&uart8TaskData);
 800471c:	4816      	ldr	r0, [pc, #88]	@ (8004778 <UartTasksInit+0x190>)
 800471e:	f000 f835 	bl	800478c <UartTaskCreate>
}
 8004722:	bf00      	nop
 8004724:	bd80      	pop	{r7, pc}
 8004726:	bf00      	nop
 8004728:	24001efc 	.word	0x24001efc
 800472c:	24000ffc 	.word	0x24000ffc
 8004730:	240010fc 	.word	0x240010fc
 8004734:	240011fc 	.word	0x240011fc
 8004738:	24000324 	.word	0x24000324
 800473c:	24001fa4 	.word	0x24001fa4
 8004740:	240012fc 	.word	0x240012fc
 8004744:	240013fc 	.word	0x240013fc
 8004748:	240014fc 	.word	0x240014fc
 800474c:	240003b8 	.word	0x240003b8
 8004750:	24001f34 	.word	0x24001f34
 8004754:	240015fc 	.word	0x240015fc
 8004758:	240016fc 	.word	0x240016fc
 800475c:	240017fc 	.word	0x240017fc
 8004760:	2400044c 	.word	0x2400044c
 8004764:	24001f6c 	.word	0x24001f6c
 8004768:	240018fc 	.word	0x240018fc
 800476c:	240019fc 	.word	0x240019fc
 8004770:	24001afc 	.word	0x24001afc
 8004774:	240004e0 	.word	0x240004e0
 8004778:	24001fdc 	.word	0x24001fdc
 800477c:	24001bfc 	.word	0x24001bfc
 8004780:	24001cfc 	.word	0x24001cfc
 8004784:	24001dfc 	.word	0x24001dfc
 8004788:	24000290 	.word	0x24000290

0800478c <UartTaskCreate>:

void UartTaskCreate (UartTaskData* uartTaskData) {
 800478c:	b580      	push	{r7, lr}
 800478e:	b09a      	sub	sp, #104	@ 0x68
 8004790:	af00      	add	r7, sp, #0
 8004792:	6078      	str	r0, [r7, #4]
    osThreadAttr_t osThreadAttrRxUart = { 0 };
 8004794:	f107 0344 	add.w	r3, r7, #68	@ 0x44
 8004798:	2224      	movs	r2, #36	@ 0x24
 800479a:	2100      	movs	r1, #0
 800479c:	4618      	mov	r0, r3
 800479e:	f026 faef 	bl	802ad80 <memset>
    osThreadAttr_t osThreadAttrTxUart = { 0 };
 80047a2:	f107 0320 	add.w	r3, r7, #32
 80047a6:	2224      	movs	r2, #36	@ 0x24
 80047a8:	2100      	movs	r1, #0
 80047aa:	4618      	mov	r0, r3
 80047ac:	f026 fae8 	bl	802ad80 <memset>

    uartTaskData->processRxDataMsgBuffer = xMessageBufferCreate (INPUT_DATA_BUFF_SIZE);
 80047b0:	2201      	movs	r2, #1
 80047b2:	2100      	movs	r1, #0
 80047b4:	f44f 7080 	mov.w	r0, #256	@ 0x100
 80047b8:	f00e fe30 	bl	801341c <xStreamBufferGenericCreate>
 80047bc:	4602      	mov	r2, r0
 80047be:	687b      	ldr	r3, [r7, #4]
 80047c0:	625a      	str	r2, [r3, #36]	@ 0x24
    uartTaskData->processDataCb          = NULL;
 80047c2:	687b      	ldr	r3, [r7, #4]
 80047c4:	2200      	movs	r2, #0
 80047c6:	629a      	str	r2, [r3, #40]	@ 0x28

    //    osThreadAttrRxUart.name       = "os_thread_uart1_rx";
    osThreadAttrRxUart.stack_size = configMINIMAL_STACK_SIZE * 2;
 80047c8:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 80047cc:	65bb      	str	r3, [r7, #88]	@ 0x58
    osThreadAttrRxUart.priority   = (osPriority_t)osPriorityHigh;
 80047ce:	2328      	movs	r3, #40	@ 0x28
 80047d0:	65fb      	str	r3, [r7, #92]	@ 0x5c


    uartTaskData->uartRecieveTaskHandle = osThreadNew (UartRxTask, uartTaskData, &osThreadAttrRxUart);
 80047d2:	f107 0344 	add.w	r3, r7, #68	@ 0x44
 80047d6:	461a      	mov	r2, r3
 80047d8:	6879      	ldr	r1, [r7, #4]
 80047da:	4816      	ldr	r0, [pc, #88]	@ (8004834 <UartTaskCreate+0xa8>)
 80047dc:	f00c fe9d 	bl	801151a <osThreadNew>
 80047e0:	4602      	mov	r2, r0
 80047e2:	687b      	ldr	r3, [r7, #4]
 80047e4:	619a      	str	r2, [r3, #24]


    osMessageQueueAttr_t uartTxMsgQueueAttr = { 0 };
 80047e6:	f107 0308 	add.w	r3, r7, #8
 80047ea:	2200      	movs	r2, #0
 80047ec:	601a      	str	r2, [r3, #0]
 80047ee:	605a      	str	r2, [r3, #4]
 80047f0:	609a      	str	r2, [r3, #8]
 80047f2:	60da      	str	r2, [r3, #12]
 80047f4:	611a      	str	r2, [r3, #16]
 80047f6:	615a      	str	r2, [r3, #20]
    //    uartTxMsgQueueAttr.name                 = "uart1TxMsgQueue";
    uartTaskData->sendCmdToSlaveQueue = osMessageQueueNew (16, sizeof (InterProcessData), &uartTxMsgQueueAttr);
 80047f8:	f107 0308 	add.w	r3, r7, #8
 80047fc:	461a      	mov	r2, r3
 80047fe:	2110      	movs	r1, #16
 8004800:	2010      	movs	r0, #16
 8004802:	f00d fa8b 	bl	8011d1c <osMessageQueueNew>
 8004806:	4602      	mov	r2, r0
 8004808:	687b      	ldr	r3, [r7, #4]
 800480a:	62da      	str	r2, [r3, #44]	@ 0x2c

    //    osThreadAttrTxUart.name              = "os_thread_uart1_tx";
    osThreadAttrTxUart.stack_size        = configMINIMAL_STACK_SIZE * 4;
 800480c:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 8004810:	637b      	str	r3, [r7, #52]	@ 0x34
    osThreadAttrTxUart.priority          = (osPriority_t)osPriorityNormal;
 8004812:	2318      	movs	r3, #24
 8004814:	63bb      	str	r3, [r7, #56]	@ 0x38
    uartTaskData->uartTransmitTaskHandle = osThreadNew (UartTxTask, uartTaskData, &osThreadAttrTxUart);
 8004816:	f107 0320 	add.w	r3, r7, #32
 800481a:	461a      	mov	r2, r3
 800481c:	6879      	ldr	r1, [r7, #4]
 800481e:	4806      	ldr	r0, [pc, #24]	@ (8004838 <UartTaskCreate+0xac>)
 8004820:	f00c fe7b 	bl	801151a <osThreadNew>
 8004824:	4602      	mov	r2, r0
 8004826:	687b      	ldr	r3, [r7, #4]
 8004828:	61da      	str	r2, [r3, #28]
}
 800482a:	bf00      	nop
 800482c:	3768      	adds	r7, #104	@ 0x68
 800482e:	46bd      	mov	sp, r7
 8004830:	bd80      	pop	{r7, pc}
 8004832:	bf00      	nop
 8004834:	080049b1 	.word	0x080049b1
 8004838:	08004f9d 	.word	0x08004f9d

0800483c <HAL_UART_RxCpltCallback>:

void HAL_UART_RxCpltCallback (UART_HandleTypeDef* huart) {
 800483c:	b480      	push	{r7}
 800483e:	b083      	sub	sp, #12
 8004840:	af00      	add	r7, sp, #0
 8004842:	6078      	str	r0, [r7, #4]
    //	osSemaphoreRelease(uart8RxSemaphore);
}
 8004844:	bf00      	nop
 8004846:	370c      	adds	r7, #12
 8004848:	46bd      	mov	sp, r7
 800484a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800484e:	4770      	bx	lr

08004850 <HAL_UARTEx_RxEventCallback>:

void HAL_UARTEx_RxEventCallback (UART_HandleTypeDef* huart, uint16_t Size) {
 8004850:	b580      	push	{r7, lr}
 8004852:	b082      	sub	sp, #8
 8004854:	af00      	add	r7, sp, #0
 8004856:	6078      	str	r0, [r7, #4]
 8004858:	460b      	mov	r3, r1
 800485a:	807b      	strh	r3, [r7, #2]
    if (huart->Instance == USART1) {
 800485c:	687b      	ldr	r3, [r7, #4]
 800485e:	681b      	ldr	r3, [r3, #0]
 8004860:	4a1e      	ldr	r2, [pc, #120]	@ (80048dc <HAL_UARTEx_RxEventCallback+0x8c>)
 8004862:	4293      	cmp	r3, r2
 8004864:	d106      	bne.n	8004874 <HAL_UARTEx_RxEventCallback+0x24>
        HandleUartRxCallback (&uart1TaskData, huart, Size);
 8004866:	887b      	ldrh	r3, [r7, #2]
 8004868:	461a      	mov	r2, r3
 800486a:	6879      	ldr	r1, [r7, #4]
 800486c:	481c      	ldr	r0, [pc, #112]	@ (80048e0 <HAL_UARTEx_RxEventCallback+0x90>)
 800486e:	f000 f853 	bl	8004918 <HandleUartRxCallback>
    } else if (huart->Instance == USART6) {
        HandleUartRxCallback (&uart6TaskData, huart, Size);
    } else if (huart->Instance == UART8) {
        HandleUartRxCallback (&uart8TaskData, huart, Size);
    }
}
 8004872:	e02e      	b.n	80048d2 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART2) {
 8004874:	687b      	ldr	r3, [r7, #4]
 8004876:	681b      	ldr	r3, [r3, #0]
 8004878:	4a1a      	ldr	r2, [pc, #104]	@ (80048e4 <HAL_UARTEx_RxEventCallback+0x94>)
 800487a:	4293      	cmp	r3, r2
 800487c:	d106      	bne.n	800488c <HAL_UARTEx_RxEventCallback+0x3c>
        HandleUartRxCallback (&uart2TaskData, huart, Size);
 800487e:	887b      	ldrh	r3, [r7, #2]
 8004880:	461a      	mov	r2, r3
 8004882:	6879      	ldr	r1, [r7, #4]
 8004884:	4818      	ldr	r0, [pc, #96]	@ (80048e8 <HAL_UARTEx_RxEventCallback+0x98>)
 8004886:	f000 f847 	bl	8004918 <HandleUartRxCallback>
}
 800488a:	e022      	b.n	80048d2 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART3) {
 800488c:	687b      	ldr	r3, [r7, #4]
 800488e:	681b      	ldr	r3, [r3, #0]
 8004890:	4a16      	ldr	r2, [pc, #88]	@ (80048ec <HAL_UARTEx_RxEventCallback+0x9c>)
 8004892:	4293      	cmp	r3, r2
 8004894:	d106      	bne.n	80048a4 <HAL_UARTEx_RxEventCallback+0x54>
        HandleUartRxCallback (&uart3TaskData, huart, Size);
 8004896:	887b      	ldrh	r3, [r7, #2]
 8004898:	461a      	mov	r2, r3
 800489a:	6879      	ldr	r1, [r7, #4]
 800489c:	4814      	ldr	r0, [pc, #80]	@ (80048f0 <HAL_UARTEx_RxEventCallback+0xa0>)
 800489e:	f000 f83b 	bl	8004918 <HandleUartRxCallback>
}
 80048a2:	e016      	b.n	80048d2 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == USART6) {
 80048a4:	687b      	ldr	r3, [r7, #4]
 80048a6:	681b      	ldr	r3, [r3, #0]
 80048a8:	4a12      	ldr	r2, [pc, #72]	@ (80048f4 <HAL_UARTEx_RxEventCallback+0xa4>)
 80048aa:	4293      	cmp	r3, r2
 80048ac:	d106      	bne.n	80048bc <HAL_UARTEx_RxEventCallback+0x6c>
        HandleUartRxCallback (&uart6TaskData, huart, Size);
 80048ae:	887b      	ldrh	r3, [r7, #2]
 80048b0:	461a      	mov	r2, r3
 80048b2:	6879      	ldr	r1, [r7, #4]
 80048b4:	4810      	ldr	r0, [pc, #64]	@ (80048f8 <HAL_UARTEx_RxEventCallback+0xa8>)
 80048b6:	f000 f82f 	bl	8004918 <HandleUartRxCallback>
}
 80048ba:	e00a      	b.n	80048d2 <HAL_UARTEx_RxEventCallback+0x82>
    } else if (huart->Instance == UART8) {
 80048bc:	687b      	ldr	r3, [r7, #4]
 80048be:	681b      	ldr	r3, [r3, #0]
 80048c0:	4a0e      	ldr	r2, [pc, #56]	@ (80048fc <HAL_UARTEx_RxEventCallback+0xac>)
 80048c2:	4293      	cmp	r3, r2
 80048c4:	d105      	bne.n	80048d2 <HAL_UARTEx_RxEventCallback+0x82>
        HandleUartRxCallback (&uart8TaskData, huart, Size);
 80048c6:	887b      	ldrh	r3, [r7, #2]
 80048c8:	461a      	mov	r2, r3
 80048ca:	6879      	ldr	r1, [r7, #4]
 80048cc:	480c      	ldr	r0, [pc, #48]	@ (8004900 <HAL_UARTEx_RxEventCallback+0xb0>)
 80048ce:	f000 f823 	bl	8004918 <HandleUartRxCallback>
}
 80048d2:	bf00      	nop
 80048d4:	3708      	adds	r7, #8
 80048d6:	46bd      	mov	sp, r7
 80048d8:	bd80      	pop	{r7, pc}
 80048da:	bf00      	nop
 80048dc:	40011000 	.word	0x40011000
 80048e0:	24001efc 	.word	0x24001efc
 80048e4:	40004400 	.word	0x40004400
 80048e8:	24001fa4 	.word	0x24001fa4
 80048ec:	40004800 	.word	0x40004800
 80048f0:	24001f34 	.word	0x24001f34
 80048f4:	40011400 	.word	0x40011400
 80048f8:	24001f6c 	.word	0x24001f6c
 80048fc:	40007c00 	.word	0x40007c00
 8004900:	24001fdc 	.word	0x24001fdc

08004904 <HAL_UART_TxCpltCallback>:

void HAL_UART_TxCpltCallback (UART_HandleTypeDef* huart) {
 8004904:	b480      	push	{r7}
 8004906:	b083      	sub	sp, #12
 8004908:	af00      	add	r7, sp, #0
 800490a:	6078      	str	r0, [r7, #4]
    if (huart->Instance == UART8) {
    }
}
 800490c:	bf00      	nop
 800490e:	370c      	adds	r7, #12
 8004910:	46bd      	mov	sp, r7
 8004912:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004916:	4770      	bx	lr

08004918 <HandleUartRxCallback>:

void HandleUartRxCallback (UartTaskData* uartTaskData, UART_HandleTypeDef* huart, uint16_t Size) {
 8004918:	b580      	push	{r7, lr}
 800491a:	b088      	sub	sp, #32
 800491c:	af02      	add	r7, sp, #8
 800491e:	60f8      	str	r0, [r7, #12]
 8004920:	60b9      	str	r1, [r7, #8]
 8004922:	4613      	mov	r3, r2
 8004924:	80fb      	strh	r3, [r7, #6]
    BaseType_t pxHigherPriorityTaskWoken = pdFALSE;
 8004926:	2300      	movs	r3, #0
 8004928:	617b      	str	r3, [r7, #20]
    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 800492a:	68fb      	ldr	r3, [r7, #12]
 800492c:	6a1b      	ldr	r3, [r3, #32]
 800492e:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004932:	4618      	mov	r0, r3
 8004934:	f00d f827 	bl	8011986 <osMutexAcquire>
    memcpy (&(uartTaskData->frameData[uartTaskData->frameBytesCount]), uartTaskData->uartRxBuffer, Size);
 8004938:	68fb      	ldr	r3, [r7, #12]
 800493a:	691b      	ldr	r3, [r3, #16]
 800493c:	68fa      	ldr	r2, [r7, #12]
 800493e:	8ad2      	ldrh	r2, [r2, #22]
 8004940:	1898      	adds	r0, r3, r2
 8004942:	68fb      	ldr	r3, [r7, #12]
 8004944:	681b      	ldr	r3, [r3, #0]
 8004946:	88fa      	ldrh	r2, [r7, #6]
 8004948:	4619      	mov	r1, r3
 800494a:	f026 fb10 	bl	802af6e <memcpy>
    uartTaskData->frameBytesCount += Size;
 800494e:	68fb      	ldr	r3, [r7, #12]
 8004950:	8ada      	ldrh	r2, [r3, #22]
 8004952:	88fb      	ldrh	r3, [r7, #6]
 8004954:	4413      	add	r3, r2
 8004956:	b29a      	uxth	r2, r3
 8004958:	68fb      	ldr	r3, [r7, #12]
 800495a:	82da      	strh	r2, [r3, #22]
    osMutexRelease (uartTaskData->rxDataBufferMutex);
 800495c:	68fb      	ldr	r3, [r7, #12]
 800495e:	6a1b      	ldr	r3, [r3, #32]
 8004960:	4618      	mov	r0, r3
 8004962:	f00d f85b 	bl	8011a1c <osMutexRelease>
    xTaskNotifyFromISR (uartTaskData->uartRecieveTaskHandle, Size, eSetValueWithOverwrite, &pxHigherPriorityTaskWoken);
 8004966:	68fb      	ldr	r3, [r7, #12]
 8004968:	6998      	ldr	r0, [r3, #24]
 800496a:	88f9      	ldrh	r1, [r7, #6]
 800496c:	f107 0314 	add.w	r3, r7, #20
 8004970:	9300      	str	r3, [sp, #0]
 8004972:	2300      	movs	r3, #0
 8004974:	2203      	movs	r2, #3
 8004976:	f010 fa49 	bl	8014e0c <xTaskGenericNotifyFromISR>
    //	HAL_UARTEx_ReceiveToIdle_DMA(huart, uart8RxBuffer, UART8_RX_BUFF_SIZE);
    //	__HAL_DMA_DISABLE_IT(&hdma_uart8_rx, DMA_IT_HT);
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 800497a:	68fb      	ldr	r3, [r7, #12]
 800497c:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 800497e:	68fb      	ldr	r3, [r7, #12]
 8004980:	6819      	ldr	r1, [r3, #0]
 8004982:	68fb      	ldr	r3, [r7, #12]
 8004984:	889b      	ldrh	r3, [r3, #4]
 8004986:	461a      	mov	r2, r3
 8004988:	f00b fdd3 	bl	8010532 <HAL_UARTEx_ReceiveToIdle_IT>
    portEND_SWITCHING_ISR (pxHigherPriorityTaskWoken);
 800498c:	697b      	ldr	r3, [r7, #20]
 800498e:	2b00      	cmp	r3, #0
 8004990:	d007      	beq.n	80049a2 <HandleUartRxCallback+0x8a>
 8004992:	4b06      	ldr	r3, [pc, #24]	@ (80049ac <HandleUartRxCallback+0x94>)
 8004994:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8004998:	601a      	str	r2, [r3, #0]
 800499a:	f3bf 8f4f 	dsb	sy
 800499e:	f3bf 8f6f 	isb	sy
}
 80049a2:	bf00      	nop
 80049a4:	3718      	adds	r7, #24
 80049a6:	46bd      	mov	sp, r7
 80049a8:	bd80      	pop	{r7, pc}
 80049aa:	bf00      	nop
 80049ac:	e000ed04 	.word	0xe000ed04

080049b0 <UartRxTask>:

void UartRxTask (void* argument) {
 80049b0:	b580      	push	{r7, lr}
 80049b2:	b0d2      	sub	sp, #328	@ 0x148
 80049b4:	af02      	add	r7, sp, #8
 80049b6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80049ba:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 80049be:	6018      	str	r0, [r3, #0]
    UartTaskData* uartTaskData             = (UartTaskData*)argument;
 80049c0:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80049c4:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 80049c8:	681b      	ldr	r3, [r3, #0]
 80049ca:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
    SerialProtocolFrameData spFrameData    = { 0 };
 80049ce:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80049d2:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 80049d6:	4618      	mov	r0, r3
 80049d8:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 80049dc:	461a      	mov	r2, r3
 80049de:	2100      	movs	r1, #0
 80049e0:	f026 f9ce 	bl	802ad80 <memset>
    uint32_t bytesRec                      = 0;
 80049e4:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 80049e8:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 80049ec:	2200      	movs	r2, #0
 80049ee:	601a      	str	r2, [r3, #0]
    uint32_t crc                           = 0;
 80049f0:	2300      	movs	r3, #0
 80049f2:	f8c7 3128 	str.w	r3, [r7, #296]	@ 0x128
    uint16_t frameCommandRaw               = 0x0000;
 80049f6:	2300      	movs	r3, #0
 80049f8:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
    uint16_t frameBytesCount               = 0;
 80049fc:	2300      	movs	r3, #0
 80049fe:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
    uint16_t frameCrc                      = 0;
 8004a02:	2300      	movs	r3, #0
 8004a04:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
    uint16_t frameTotalLength              = 0;
 8004a08:	2300      	movs	r3, #0
 8004a0a:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
    uint16_t dataToSend                    = 0;
 8004a0e:	2300      	movs	r3, #0
 8004a10:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
    portBASE_TYPE crcPass                  = pdFAIL;
 8004a14:	2300      	movs	r3, #0
 8004a16:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
    portBASE_TYPE proceed                  = pdFALSE;
 8004a1a:	2300      	movs	r3, #0
 8004a1c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
    portBASE_TYPE frameTimeout             = pdFAIL;
 8004a20:	2300      	movs	r3, #0
 8004a22:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c
    enum SerialReceiverStates receverState = srWaitForHeader;
 8004a26:	2300      	movs	r3, #0
 8004a28:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133

    uartTaskData->rxDataBufferMutex = osMutexNew (NULL);
 8004a2c:	2000      	movs	r0, #0
 8004a2e:	f00c ff24 	bl	801187a <osMutexNew>
 8004a32:	4602      	mov	r2, r0
 8004a34:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a38:	621a      	str	r2, [r3, #32]
    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 8004a3a:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a3e:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004a40:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a44:	6819      	ldr	r1, [r3, #0]
 8004a46:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a4a:	889b      	ldrh	r3, [r3, #4]
 8004a4c:	461a      	mov	r2, r3
 8004a4e:	f00b fd70 	bl	8010532 <HAL_UARTEx_ReceiveToIdle_IT>
    while (pdTRUE) {
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 8004a52:	f107 020c 	add.w	r2, r7, #12
 8004a56:	f44f 63fa 	mov.w	r3, #2000	@ 0x7d0
 8004a5a:	2100      	movs	r1, #0
 8004a5c:	2000      	movs	r0, #0
 8004a5e:	f010 f8b3 	bl	8014bc8 <xTaskNotifyWait>
 8004a62:	4603      	mov	r3, r0
 8004a64:	2b00      	cmp	r3, #0
 8004a66:	bf0c      	ite	eq
 8004a68:	2301      	moveq	r3, #1
 8004a6a:	2300      	movne	r3, #0
 8004a6c:	b2db      	uxtb	r3, r3
 8004a6e:	f8c7 311c 	str.w	r3, [r7, #284]	@ 0x11c

        osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004a72:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a76:	6a1b      	ldr	r3, [r3, #32]
 8004a78:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004a7c:	4618      	mov	r0, r3
 8004a7e:	f00c ff82 	bl	8011986 <osMutexAcquire>
        frameBytesCount = uartTaskData->frameBytesCount;
 8004a82:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a86:	8adb      	ldrh	r3, [r3, #22]
 8004a88:	f8a7 3124 	strh.w	r3, [r7, #292]	@ 0x124
        osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004a8c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004a90:	6a1b      	ldr	r3, [r3, #32]
 8004a92:	4618      	mov	r0, r3
 8004a94:	f00c ffc2 	bl	8011a1c <osMutexRelease>
        if ((frameTimeout == pdTRUE) && (frameBytesCount > 0)) {
 8004a98:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 8004a9c:	2b01      	cmp	r3, #1
 8004a9e:	d10a      	bne.n	8004ab6 <UartRxTask+0x106>
 8004aa0:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004aa4:	2b00      	cmp	r3, #0
 8004aa6:	d006      	beq.n	8004ab6 <UartRxTask+0x106>
            receverState = srFail;
 8004aa8:	2304      	movs	r3, #4
 8004aaa:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
            proceed      = pdTRUE;
 8004aae:	2301      	movs	r3, #1
 8004ab0:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 8004ab4:	e029      	b.n	8004b0a <UartRxTask+0x15a>
        } else {
            if (frameTimeout == pdFALSE) {
 8004ab6:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 8004aba:	2b00      	cmp	r3, #0
 8004abc:	d111      	bne.n	8004ae2 <UartRxTask+0x132>
                proceed = pdTRUE;
 8004abe:	2301      	movs	r3, #1
 8004ac0:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                printf ("Uart%d: RX bytes received: %ld\n", uartTaskData->uartNumber, bytesRec);
 8004ac4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004ac8:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004acc:	4619      	mov	r1, r3
 8004ace:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004ad2:	f5a3 739a 	sub.w	r3, r3, #308	@ 0x134
 8004ad6:	681b      	ldr	r3, [r3, #0]
 8004ad8:	461a      	mov	r2, r3
 8004ada:	48c1      	ldr	r0, [pc, #772]	@ (8004de0 <UartRxTask+0x430>)
 8004adc:	f025 ffbe 	bl	802aa5c <iprintf>
 8004ae0:	e22f      	b.n	8004f42 <UartRxTask+0x592>
            } else {
                if (uartTaskData->huart->RxState == HAL_UART_STATE_READY) {
 8004ae2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004ae6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8004ae8:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 8004aec:	2b20      	cmp	r3, #32
 8004aee:	f040 8228 	bne.w	8004f42 <UartRxTask+0x592>
                    HAL_UARTEx_ReceiveToIdle_IT (uartTaskData->huart, uartTaskData->uartRxBuffer, uartTaskData->uartRxBufferLen);
 8004af2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004af6:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004af8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004afc:	6819      	ldr	r1, [r3, #0]
 8004afe:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b02:	889b      	ldrh	r3, [r3, #4]
 8004b04:	461a      	mov	r2, r3
 8004b06:	f00b fd14 	bl	8010532 <HAL_UARTEx_ReceiveToIdle_IT>
                }
            }
        }

        while (proceed) {
 8004b0a:	e21a      	b.n	8004f42 <UartRxTask+0x592>
            switch (receverState) {
 8004b0c:	f897 3133 	ldrb.w	r3, [r7, #307]	@ 0x133
 8004b10:	2b04      	cmp	r3, #4
 8004b12:	f200 81f1 	bhi.w	8004ef8 <UartRxTask+0x548>
 8004b16:	a201      	add	r2, pc, #4	@ (adr r2, 8004b1c <UartRxTask+0x16c>)
 8004b18:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8004b1c:	08004b31 	.word	0x08004b31
 8004b20:	08004c93 	.word	0x08004c93
 8004b24:	08004c77 	.word	0x08004c77
 8004b28:	08004d33 	.word	0x08004d33
 8004b2c:	08004ded 	.word	0x08004ded
            case srWaitForHeader:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004b30:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b34:	6a1b      	ldr	r3, [r3, #32]
 8004b36:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004b3a:	4618      	mov	r0, r3
 8004b3c:	f00c ff23 	bl	8011986 <osMutexAcquire>
                if (uartTaskData->frameData[0] == FRAME_INDICATOR) {
 8004b40:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b44:	691b      	ldr	r3, [r3, #16]
 8004b46:	781b      	ldrb	r3, [r3, #0]
 8004b48:	2baa      	cmp	r3, #170	@ 0xaa
 8004b4a:	f040 8082 	bne.w	8004c52 <UartRxTask+0x2a2>
                    if (frameBytesCount > FRAME_ID_LENGTH) {
 8004b4e:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004b52:	2b02      	cmp	r3, #2
 8004b54:	d914      	bls.n	8004b80 <UartRxTask+0x1d0>
                        spFrameData.frameHeader.frameId =
                        CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_ID_LENGTH - FRAME_COMMAND_LENGTH]));
 8004b56:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b5a:	691b      	ldr	r3, [r3, #16]
 8004b5c:	3302      	adds	r3, #2
 8004b5e:	781b      	ldrb	r3, [r3, #0]
 8004b60:	021b      	lsls	r3, r3, #8
 8004b62:	b21a      	sxth	r2, r3
 8004b64:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b68:	691b      	ldr	r3, [r3, #16]
 8004b6a:	3301      	adds	r3, #1
 8004b6c:	781b      	ldrb	r3, [r3, #0]
 8004b6e:	b21b      	sxth	r3, r3
 8004b70:	4313      	orrs	r3, r2
 8004b72:	b21b      	sxth	r3, r3
 8004b74:	b29a      	uxth	r2, r3
                        spFrameData.frameHeader.frameId =
 8004b76:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004b7a:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004b7e:	801a      	strh	r2, [r3, #0]
                    }
                    if (frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH) {
 8004b80:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004b84:	2b04      	cmp	r3, #4
 8004b86:	d923      	bls.n	8004bd0 <UartRxTask+0x220>
                        frameCommandRaw = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH - FRAME_COMMAND_LENGTH]));
 8004b88:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b8c:	691b      	ldr	r3, [r3, #16]
 8004b8e:	3304      	adds	r3, #4
 8004b90:	781b      	ldrb	r3, [r3, #0]
 8004b92:	021b      	lsls	r3, r3, #8
 8004b94:	b21a      	sxth	r2, r3
 8004b96:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004b9a:	691b      	ldr	r3, [r3, #16]
 8004b9c:	3303      	adds	r3, #3
 8004b9e:	781b      	ldrb	r3, [r3, #0]
 8004ba0:	b21b      	sxth	r3, r3
 8004ba2:	4313      	orrs	r3, r2
 8004ba4:	b21b      	sxth	r3, r3
 8004ba6:	f8a7 3126 	strh.w	r3, [r7, #294]	@ 0x126
                        spFrameData.frameHeader.frameCommand    = (SerialProtocolCommands)(frameCommandRaw & 0x7FFF);
 8004baa:	f8b7 3126 	ldrh.w	r3, [r7, #294]	@ 0x126
 8004bae:	b2da      	uxtb	r2, r3
 8004bb0:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004bb4:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004bb8:	709a      	strb	r2, [r3, #2]
                        spFrameData.frameHeader.isResponseFrame = (frameCommandRaw & 0x8000) != 0 ? pdTRUE : pdFALSE;
 8004bba:	f9b7 3126 	ldrsh.w	r3, [r7, #294]	@ 0x126
 8004bbe:	13db      	asrs	r3, r3, #15
 8004bc0:	b21b      	sxth	r3, r3
 8004bc2:	f003 0201 	and.w	r2, r3, #1
 8004bc6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004bca:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004bce:	609a      	str	r2, [r3, #8]
                    }
                    if ((frameBytesCount > FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH) && ((spFrameData.frameHeader.frameCommand & 0x8000) != 0)) {
 8004bd0:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004bd4:	2b05      	cmp	r3, #5
 8004bd6:	d913      	bls.n	8004c00 <UartRxTask+0x250>
 8004bd8:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004bdc:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004be0:	789b      	ldrb	r3, [r3, #2]
 8004be2:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8004be6:	2b00      	cmp	r3, #0
 8004be8:	d00a      	beq.n	8004c00 <UartRxTask+0x250>
                        spFrameData.frameHeader.respStatus = (SerialProtocolRespStatus)(uartTaskData->frameData[FRAME_ID_LENGTH + FRAME_COMMAND_LENGTH + FRAME_RESP_STAT_LENGTH]);
 8004bea:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004bee:	691b      	ldr	r3, [r3, #16]
 8004bf0:	3305      	adds	r3, #5
 8004bf2:	781b      	ldrb	r3, [r3, #0]
 8004bf4:	b25a      	sxtb	r2, r3
 8004bf6:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004bfa:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004bfe:	70da      	strb	r2, [r3, #3]
                    }
                    if (frameBytesCount >= FRAME_HEADER_LENGTH) {
 8004c00:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004c04:	2b07      	cmp	r3, #7
 8004c06:	d920      	bls.n	8004c4a <UartRxTask+0x29a>
                        spFrameData.frameHeader.frameDataLength = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[FRAME_HEADER_LENGTH - FRAME_RESP_STAT_LENGTH - FRAME_DATALEN_LENGTH]));
 8004c08:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c0c:	691b      	ldr	r3, [r3, #16]
 8004c0e:	3306      	adds	r3, #6
 8004c10:	781b      	ldrb	r3, [r3, #0]
 8004c12:	021b      	lsls	r3, r3, #8
 8004c14:	b21a      	sxth	r2, r3
 8004c16:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c1a:	691b      	ldr	r3, [r3, #16]
 8004c1c:	3305      	adds	r3, #5
 8004c1e:	781b      	ldrb	r3, [r3, #0]
 8004c20:	b21b      	sxth	r3, r3
 8004c22:	4313      	orrs	r3, r2
 8004c24:	b21b      	sxth	r3, r3
 8004c26:	b29a      	uxth	r2, r3
 8004c28:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004c2c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004c30:	809a      	strh	r2, [r3, #4]
                        frameTotalLength                        = FRAME_HEADER_LENGTH + spFrameData.frameHeader.frameDataLength + FRAME_CRC_LENGTH;
 8004c32:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004c36:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004c3a:	889b      	ldrh	r3, [r3, #4]
 8004c3c:	330a      	adds	r3, #10
 8004c3e:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                        receverState                            = srRecieveData;
 8004c42:	2302      	movs	r3, #2
 8004c44:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 8004c48:	e00e      	b.n	8004c68 <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 8004c4a:	2300      	movs	r3, #0
 8004c4c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
 8004c50:	e00a      	b.n	8004c68 <UartRxTask+0x2b8>
                    }
                } else {
                    if (frameBytesCount > 0) {
 8004c52:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004c56:	2b00      	cmp	r3, #0
 8004c58:	d003      	beq.n	8004c62 <UartRxTask+0x2b2>
                        receverState = srFail;
 8004c5a:	2304      	movs	r3, #4
 8004c5c:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
 8004c60:	e002      	b.n	8004c68 <UartRxTask+0x2b8>
                    } else {
                        proceed = pdFALSE;
 8004c62:	2300      	movs	r3, #0
 8004c64:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                    }
                }
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004c68:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c6c:	6a1b      	ldr	r3, [r3, #32]
 8004c6e:	4618      	mov	r0, r3
 8004c70:	f00c fed4 	bl	8011a1c <osMutexRelease>
                break;
 8004c74:	e165      	b.n	8004f42 <UartRxTask+0x592>
            case srRecieveData:
                if (frameBytesCount >= frameTotalLength) {
 8004c76:	f8b7 2124 	ldrh.w	r2, [r7, #292]	@ 0x124
 8004c7a:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004c7e:	429a      	cmp	r2, r3
 8004c80:	d303      	bcc.n	8004c8a <UartRxTask+0x2da>
                    receverState = srCheckCrc;
 8004c82:	2301      	movs	r3, #1
 8004c84:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    proceed = pdFALSE;
                }
                break;
 8004c88:	e15b      	b.n	8004f42 <UartRxTask+0x592>
                    proceed = pdFALSE;
 8004c8a:	2300      	movs	r3, #0
 8004c8c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 8004c90:	e157      	b.n	8004f42 <UartRxTask+0x592>
            case srCheckCrc:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004c92:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004c96:	6a1b      	ldr	r3, [r3, #32]
 8004c98:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004c9c:	4618      	mov	r0, r3
 8004c9e:	f00c fe72 	bl	8011986 <osMutexAcquire>
                frameCrc = CONVERT_BYTES_TO_SHORT_WORD (&(uartTaskData->frameData[frameTotalLength - FRAME_CRC_LENGTH]));
 8004ca2:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004ca6:	691a      	ldr	r2, [r3, #16]
 8004ca8:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004cac:	3b01      	subs	r3, #1
 8004cae:	4413      	add	r3, r2
 8004cb0:	781b      	ldrb	r3, [r3, #0]
 8004cb2:	021b      	lsls	r3, r3, #8
 8004cb4:	b21a      	sxth	r2, r3
 8004cb6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004cba:	6919      	ldr	r1, [r3, #16]
 8004cbc:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004cc0:	3b02      	subs	r3, #2
 8004cc2:	440b      	add	r3, r1
 8004cc4:	781b      	ldrb	r3, [r3, #0]
 8004cc6:	b21b      	sxth	r3, r3
 8004cc8:	4313      	orrs	r3, r2
 8004cca:	b21b      	sxth	r3, r3
 8004ccc:	f8a7 3122 	strh.w	r3, [r7, #290]	@ 0x122
                crc      = HAL_CRC_Calculate (&hcrc, (uint32_t*)(uartTaskData->frameData), frameTotalLength - FRAME_CRC_LENGTH);
 8004cd0:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004cd4:	6919      	ldr	r1, [r3, #16]
 8004cd6:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8004cda:	3b02      	subs	r3, #2
 8004cdc:	461a      	mov	r2, r3
 8004cde:	4841      	ldr	r0, [pc, #260]	@ (8004de4 <UartRxTask+0x434>)
 8004ce0:	f001 f896 	bl	8005e10 <HAL_CRC_Calculate>
 8004ce4:	f8c7 0128 	str.w	r0, [r7, #296]	@ 0x128
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004ce8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004cec:	6a1b      	ldr	r3, [r3, #32]
 8004cee:	4618      	mov	r0, r3
 8004cf0:	f00c fe94 	bl	8011a1c <osMutexRelease>
                crcPass = frameCrc == crc;
 8004cf4:	f8b7 3122 	ldrh.w	r3, [r7, #290]	@ 0x122
 8004cf8:	f8d7 2128 	ldr.w	r2, [r7, #296]	@ 0x128
 8004cfc:	429a      	cmp	r2, r3
 8004cfe:	bf0c      	ite	eq
 8004d00:	2301      	moveq	r3, #1
 8004d02:	2300      	movne	r3, #0
 8004d04:	b2db      	uxtb	r3, r3
 8004d06:	f8c7 3138 	str.w	r3, [r7, #312]	@ 0x138
                if (crcPass) {
 8004d0a:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 8004d0e:	2b00      	cmp	r3, #0
 8004d10:	d00b      	beq.n	8004d2a <UartRxTask+0x37a>
                    printf ("Uart%d: Frame CRC PASS\n", uartTaskData->uartNumber);
 8004d12:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004d16:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004d1a:	4619      	mov	r1, r3
 8004d1c:	4832      	ldr	r0, [pc, #200]	@ (8004de8 <UartRxTask+0x438>)
 8004d1e:	f025 fe9d 	bl	802aa5c <iprintf>
                    receverState = srExecuteCmd;
 8004d22:	2303      	movs	r3, #3
 8004d24:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                } else {
                    receverState = srFail;
                }
                break;
 8004d28:	e10b      	b.n	8004f42 <UartRxTask+0x592>
                    receverState = srFail;
 8004d2a:	2304      	movs	r3, #4
 8004d2c:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 8004d30:	e107      	b.n	8004f42 <UartRxTask+0x592>
            case srExecuteCmd:
                if ((uartTaskData->processDataCb != NULL) || (uartTaskData->processRxDataMsgBuffer != NULL)) {
 8004d32:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004d36:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8004d38:	2b00      	cmp	r3, #0
 8004d3a:	d104      	bne.n	8004d46 <UartRxTask+0x396>
 8004d3c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004d40:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8004d42:	2b00      	cmp	r3, #0
 8004d44:	d01e      	beq.n	8004d84 <UartRxTask+0x3d4>
                    osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004d46:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004d4a:	6a1b      	ldr	r3, [r3, #32]
 8004d4c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004d50:	4618      	mov	r0, r3
 8004d52:	f00c fe18 	bl	8011986 <osMutexAcquire>
                    memcpy (spFrameData.dataBuffer, &(uartTaskData->frameData[FRAME_HEADER_LENGTH]), spFrameData.frameHeader.frameDataLength);
 8004d56:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004d5a:	691b      	ldr	r3, [r3, #16]
 8004d5c:	f103 0108 	add.w	r1, r3, #8
 8004d60:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004d64:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004d68:	889b      	ldrh	r3, [r3, #4]
 8004d6a:	461a      	mov	r2, r3
 8004d6c:	f107 0310 	add.w	r3, r7, #16
 8004d70:	330c      	adds	r3, #12
 8004d72:	4618      	mov	r0, r3
 8004d74:	f026 f8fb 	bl	802af6e <memcpy>
                    osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004d78:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004d7c:	6a1b      	ldr	r3, [r3, #32]
 8004d7e:	4618      	mov	r0, r3
 8004d80:	f00c fe4c 	bl	8011a1c <osMutexRelease>
                }
                if (uartTaskData->processRxDataMsgBuffer != NULL) {
 8004d84:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004d88:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8004d8a:	2b00      	cmp	r3, #0
 8004d8c:	d015      	beq.n	8004dba <UartRxTask+0x40a>
                    if(xMessageBufferSend (uartTaskData->processRxDataMsgBuffer, &spFrameData, sizeof (SerialProtocolFrameHeader) + spFrameData.frameHeader.frameDataLength, pdMS_TO_TICKS (200)) == pdFALSE)
 8004d8e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004d92:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8004d94:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004d98:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004d9c:	889b      	ldrh	r3, [r3, #4]
 8004d9e:	f103 020c 	add.w	r2, r3, #12
 8004da2:	f107 0110 	add.w	r1, r7, #16
 8004da6:	23c8      	movs	r3, #200	@ 0xc8
 8004da8:	f00e fbca 	bl	8013540 <xStreamBufferSend>
 8004dac:	4603      	mov	r3, r0
 8004dae:	2b00      	cmp	r3, #0
 8004db0:	d103      	bne.n	8004dba <UartRxTask+0x40a>
                    {
                    	receverState = srFail;
 8004db2:	2304      	movs	r3, #4
 8004db4:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                    	break;
 8004db8:	e0c3      	b.n	8004f42 <UartRxTask+0x592>
                    }
                }
                if (uartTaskData->processDataCb != NULL) {
 8004dba:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004dbe:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8004dc0:	2b00      	cmp	r3, #0
 8004dc2:	d008      	beq.n	8004dd6 <UartRxTask+0x426>
                    uartTaskData->processDataCb (uartTaskData, &spFrameData);
 8004dc4:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004dc8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8004dca:	f107 0210 	add.w	r2, r7, #16
 8004dce:	4611      	mov	r1, r2
 8004dd0:	f8d7 012c 	ldr.w	r0, [r7, #300]	@ 0x12c
 8004dd4:	4798      	blx	r3
                }
                receverState = srFinish;
 8004dd6:	2305      	movs	r3, #5
 8004dd8:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 8004ddc:	e0b1      	b.n	8004f42 <UartRxTask+0x592>
 8004dde:	bf00      	nop
 8004de0:	0802db5c 	.word	0x0802db5c
 8004de4:	24000248 	.word	0x24000248
 8004de8:	0802db7c 	.word	0x0802db7c
            case srFail:
                dataToSend = 0;
 8004dec:	2300      	movs	r3, #0
 8004dee:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                if ((frameTimeout == pdTRUE) && (frameBytesCount > 2)) {
 8004df2:	f8d7 311c 	ldr.w	r3, [r7, #284]	@ 0x11c
 8004df6:	2b01      	cmp	r3, #1
 8004df8:	d124      	bne.n	8004e44 <UartRxTask+0x494>
 8004dfa:	f8b7 3124 	ldrh.w	r3, [r7, #292]	@ 0x124
 8004dfe:	2b02      	cmp	r3, #2
 8004e00:	d920      	bls.n	8004e44 <UartRxTask+0x494>
                    dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spTimeout, NULL, 0);
 8004e02:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004e06:	6898      	ldr	r0, [r3, #8]
 8004e08:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004e0c:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004e10:	8819      	ldrh	r1, [r3, #0]
 8004e12:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004e16:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004e1a:	789a      	ldrb	r2, [r3, #2]
 8004e1c:	2300      	movs	r3, #0
 8004e1e:	9301      	str	r3, [sp, #4]
 8004e20:	2300      	movs	r3, #0
 8004e22:	9300      	str	r3, [sp, #0]
 8004e24:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8004e28:	f7fe fdf6 	bl	8003a18 <PrepareRespFrame>
 8004e2c:	4603      	mov	r3, r0
 8004e2e:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                    printf ("Uart%d: RX data receiver timeout!\n", uartTaskData->uartNumber);
 8004e32:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004e36:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004e3a:	4619      	mov	r1, r3
 8004e3c:	4844      	ldr	r0, [pc, #272]	@ (8004f50 <UartRxTask+0x5a0>)
 8004e3e:	f025 fe0d 	bl	802aa5c <iprintf>
 8004e42:	e03c      	b.n	8004ebe <UartRxTask+0x50e>
                } else if (!crcPass) {
 8004e44:	f8d7 3138 	ldr.w	r3, [r7, #312]	@ 0x138
 8004e48:	2b00      	cmp	r3, #0
 8004e4a:	d120      	bne.n	8004e8e <UartRxTask+0x4de>
                    dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spCrcFail, NULL, 0);
 8004e4c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004e50:	6898      	ldr	r0, [r3, #8]
 8004e52:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004e56:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004e5a:	8819      	ldrh	r1, [r3, #0]
 8004e5c:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004e60:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004e64:	789a      	ldrb	r2, [r3, #2]
 8004e66:	2300      	movs	r3, #0
 8004e68:	9301      	str	r3, [sp, #4]
 8004e6a:	2300      	movs	r3, #0
 8004e6c:	9300      	str	r3, [sp, #0]
 8004e6e:	f06f 0301 	mvn.w	r3, #1
 8004e72:	f7fe fdd1 	bl	8003a18 <PrepareRespFrame>
 8004e76:	4603      	mov	r3, r0
 8004e78:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                    printf ("Uart%d: Frame CRC FAIL\n", uartTaskData->uartNumber);
 8004e7c:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004e80:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004e84:	4619      	mov	r1, r3
 8004e86:	4833      	ldr	r0, [pc, #204]	@ (8004f54 <UartRxTask+0x5a4>)
 8004e88:	f025 fde8 	bl	802aa5c <iprintf>
 8004e8c:	e017      	b.n	8004ebe <UartRxTask+0x50e>
                }
                else
                {
                	dataToSend = PrepareRespFrame (uartTaskData->uartTxBuffer, spFrameData.frameHeader.frameId, spFrameData.frameHeader.frameCommand, spInternalError, NULL, 0);
 8004e8e:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004e92:	6898      	ldr	r0, [r3, #8]
 8004e94:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004e98:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004e9c:	8819      	ldrh	r1, [r3, #0]
 8004e9e:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004ea2:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004ea6:	789a      	ldrb	r2, [r3, #2]
 8004ea8:	2300      	movs	r3, #0
 8004eaa:	9301      	str	r3, [sp, #4]
 8004eac:	2300      	movs	r3, #0
 8004eae:	9300      	str	r3, [sp, #0]
 8004eb0:	f06f 0303 	mvn.w	r3, #3
 8004eb4:	f7fe fdb0 	bl	8003a18 <PrepareRespFrame>
 8004eb8:	4603      	mov	r3, r0
 8004eba:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
                }
                if (dataToSend > 0) {
 8004ebe:	f8b7 313c 	ldrh.w	r3, [r7, #316]	@ 0x13c
 8004ec2:	2b00      	cmp	r3, #0
 8004ec4:	d00a      	beq.n	8004edc <UartRxTask+0x52c>
                    HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, dataToSend);
 8004ec6:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004eca:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8004ecc:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004ed0:	689b      	ldr	r3, [r3, #8]
 8004ed2:	f8b7 213c 	ldrh.w	r2, [r7, #316]	@ 0x13c
 8004ed6:	4619      	mov	r1, r3
 8004ed8:	f008 fe56 	bl	800db88 <HAL_UART_Transmit_IT>
                }
                printf ("Uart%d: TX bytes sent: %d\n", dataToSend, uartTaskData->uartNumber);
 8004edc:	f8b7 113c 	ldrh.w	r1, [r7, #316]	@ 0x13c
 8004ee0:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004ee4:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8004ee8:	461a      	mov	r2, r3
 8004eea:	481b      	ldr	r0, [pc, #108]	@ (8004f58 <UartRxTask+0x5a8>)
 8004eec:	f025 fdb6 	bl	802aa5c <iprintf>
                receverState = srFinish;
 8004ef0:	2305      	movs	r3, #5
 8004ef2:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                break;
 8004ef6:	e024      	b.n	8004f42 <UartRxTask+0x592>
            case srFinish:
            default:
                osMutexAcquire (uartTaskData->rxDataBufferMutex, osWaitForever);
 8004ef8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004efc:	6a1b      	ldr	r3, [r3, #32]
 8004efe:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8004f02:	4618      	mov	r0, r3
 8004f04:	f00c fd3f 	bl	8011986 <osMutexAcquire>
                uartTaskData->frameBytesCount = 0;
 8004f08:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004f0c:	2200      	movs	r2, #0
 8004f0e:	82da      	strh	r2, [r3, #22]
                osMutexRelease (uartTaskData->rxDataBufferMutex);
 8004f10:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8004f14:	6a1b      	ldr	r3, [r3, #32]
 8004f16:	4618      	mov	r0, r3
 8004f18:	f00c fd80 	bl	8011a1c <osMutexRelease>
                spFrameData.frameHeader.frameCommand = spUnknown;
 8004f1c:	f507 73a0 	add.w	r3, r7, #320	@ 0x140
 8004f20:	f5a3 7398 	sub.w	r3, r3, #304	@ 0x130
 8004f24:	2212      	movs	r2, #18
 8004f26:	709a      	strb	r2, [r3, #2]
                frameTotalLength                     = 0;
 8004f28:	2300      	movs	r3, #0
 8004f2a:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
                outputDataBufferPos                  = 0;
 8004f2e:	4b0b      	ldr	r3, [pc, #44]	@ (8004f5c <UartRxTask+0x5ac>)
 8004f30:	2200      	movs	r2, #0
 8004f32:	801a      	strh	r2, [r3, #0]
                receverState                         = srWaitForHeader;
 8004f34:	2300      	movs	r3, #0
 8004f36:	f887 3133 	strb.w	r3, [r7, #307]	@ 0x133
                proceed                              = pdFALSE;
 8004f3a:	2300      	movs	r3, #0
 8004f3c:	f8c7 3134 	str.w	r3, [r7, #308]	@ 0x134
                break;
 8004f40:	bf00      	nop
        while (proceed) {
 8004f42:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
 8004f46:	2b00      	cmp	r3, #0
 8004f48:	f47f ade0 	bne.w	8004b0c <UartRxTask+0x15c>
        frameTimeout = !(xTaskNotifyWait (0, 0, &bytesRec, pdMS_TO_TICKS (FRAME_TIMEOUT_MS)));
 8004f4c:	e581      	b.n	8004a52 <UartRxTask+0xa2>
 8004f4e:	bf00      	nop
 8004f50:	0802db94 	.word	0x0802db94
 8004f54:	0802dbb8 	.word	0x0802dbb8
 8004f58:	0802dbd0 	.word	0x0802dbd0
 8004f5c:	24002094 	.word	0x24002094

08004f60 <ReadMeasSetFromBuffer>:
        }
    }
}

void ReadMeasSetFromBuffer(uint8_t* buff, uint16_t* buffPos, float* dataSet)
{
 8004f60:	b580      	push	{r7, lr}
 8004f62:	b086      	sub	sp, #24
 8004f64:	af00      	add	r7, sp, #0
 8004f66:	60f8      	str	r0, [r7, #12]
 8004f68:	60b9      	str	r1, [r7, #8]
 8004f6a:	607a      	str	r2, [r7, #4]
	for(uint8_t i = 0; i < 3; i++)
 8004f6c:	2300      	movs	r3, #0
 8004f6e:	75fb      	strb	r3, [r7, #23]
 8004f70:	e00b      	b.n	8004f8a <ReadMeasSetFromBuffer+0x2a>
	{
		ReadFloatFromBuffer(buff, buffPos, &dataSet[i]);
 8004f72:	7dfb      	ldrb	r3, [r7, #23]
 8004f74:	009b      	lsls	r3, r3, #2
 8004f76:	687a      	ldr	r2, [r7, #4]
 8004f78:	4413      	add	r3, r2
 8004f7a:	461a      	mov	r2, r3
 8004f7c:	68b9      	ldr	r1, [r7, #8]
 8004f7e:	68f8      	ldr	r0, [r7, #12]
 8004f80:	f7fe fc5b 	bl	800383a <ReadFloatFromBuffer>
	for(uint8_t i = 0; i < 3; i++)
 8004f84:	7dfb      	ldrb	r3, [r7, #23]
 8004f86:	3301      	adds	r3, #1
 8004f88:	75fb      	strb	r3, [r7, #23]
 8004f8a:	7dfb      	ldrb	r3, [r7, #23]
 8004f8c:	2b02      	cmp	r3, #2
 8004f8e:	d9f0      	bls.n	8004f72 <ReadMeasSetFromBuffer+0x12>
	}
}
 8004f90:	bf00      	nop
 8004f92:	bf00      	nop
 8004f94:	3718      	adds	r7, #24
 8004f96:	46bd      	mov	sp, r7
 8004f98:	bd80      	pop	{r7, pc}
	...

08004f9c <UartTxTask>:

void UartTxTask (void* argument) {
 8004f9c:	b580      	push	{r7, lr}
 8004f9e:	b0d4      	sub	sp, #336	@ 0x150
 8004fa0:	af02      	add	r7, sp, #8
 8004fa2:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004fa6:	f5a3 73a2 	sub.w	r3, r3, #324	@ 0x144
 8004faa:	6018      	str	r0, [r3, #0]
    UartTaskData* const uartTaskData  = (UartTaskData*)argument;
 8004fac:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004fb0:	f5a3 73a2 	sub.w	r3, r3, #324	@ 0x144
 8004fb4:	681b      	ldr	r3, [r3, #0]
 8004fb6:	f8c7 3140 	str.w	r3, [r7, #320]	@ 0x140
    InterProcessData data             = { 0 };
 8004fba:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8004fbe:	2200      	movs	r2, #0
 8004fc0:	601a      	str	r2, [r3, #0]
 8004fc2:	605a      	str	r2, [r3, #4]
 8004fc4:	609a      	str	r2, [r3, #8]
 8004fc6:	60da      	str	r2, [r3, #12]
    SerialProtocolFrameData frameData = { 0 };
 8004fc8:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004fcc:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 8004fd0:	4618      	mov	r0, r3
 8004fd2:	f44f 7386 	mov.w	r3, #268	@ 0x10c
 8004fd6:	461a      	mov	r2, r3
 8004fd8:	2100      	movs	r1, #0
 8004fda:	f025 fed1 	bl	802ad80 <memset>
    size_t bytesInMsg;
    uint16_t frameId                    = 0;
 8004fde:	2300      	movs	r3, #0
 8004fe0:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
    uint32_t rndVal                     = 0;
 8004fe4:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8004fe8:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 8004fec:	2200      	movs	r2, #0
 8004fee:	601a      	str	r2, [r3, #0]
    uint16_t bytesToSend                = 0;
 8004ff0:	2300      	movs	r3, #0
 8004ff2:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
    SerialProtocolCommands frameCommand = spUnknown;
 8004ff6:	2312      	movs	r3, #18
 8004ff8:	f887 313b 	strb.w	r3, [r7, #315]	@ 0x13b
    uint16_t inputDataBufferPos         = 0;
 8004ffc:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8005000:	f5a3 739f 	sub.w	r3, r3, #318	@ 0x13e
 8005004:	2200      	movs	r2, #0
 8005006:	801a      	strh	r2, [r3, #0]
    uint8_t boardNumber                 = 0;
 8005008:	2300      	movs	r3, #0
 800500a:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147

    while (pdTRUE) {
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 800500e:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8005012:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8005014:	2b00      	cmp	r3, #0
 8005016:	f000 82d5 	beq.w	80055c4 <UartTxTask+0x628>
            osMessageQueueGet (uartTaskData->sendCmdToSlaveQueue, &data, 0, osWaitForever);
 800501a:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 800501e:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 8005020:	f507 718e 	add.w	r1, r7, #284	@ 0x11c
 8005024:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8005028:	2200      	movs	r2, #0
 800502a:	f00c ff4b 	bl	8011ec4 <osMessageQueueGet>
            HAL_RNG_GenerateRandomNumber (&hrng, &rndVal);
 800502e:	f107 030c 	add.w	r3, r7, #12
 8005032:	4619      	mov	r1, r3
 8005034:	48c7      	ldr	r0, [pc, #796]	@ (8005354 <UartTxTask+0x3b8>)
 8005036:	f008 fa33 	bl	800d4a0 <HAL_RNG_GenerateRandomNumber>
            frameId             = (uint16_t)(rndVal & 0xFFFF);
 800503a:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 800503e:	f5a3 739e 	sub.w	r3, r3, #316	@ 0x13c
 8005042:	681b      	ldr	r3, [r3, #0]
 8005044:	f8a7 313e 	strh.w	r3, [r7, #318]	@ 0x13e
            frameCommand        = data.spCommand;
 8005048:	f897 311c 	ldrb.w	r3, [r7, #284]	@ 0x11c
 800504c:	f887 313b 	strb.w	r3, [r7, #315]	@ 0x13b
            outputDataBufferPos = 0;
 8005050:	4bc1      	ldr	r3, [pc, #772]	@ (8005358 <UartTxTask+0x3bc>)
 8005052:	2200      	movs	r2, #0
 8005054:	801a      	strh	r2, [r3, #0]
            memset (outputDataBuffer, 0x00, OUTPUT_DATA_BUFF_SIZE);
 8005056:	2280      	movs	r2, #128	@ 0x80
 8005058:	2100      	movs	r1, #0
 800505a:	48c0      	ldr	r0, [pc, #768]	@ (800535c <UartTxTask+0x3c0>)
 800505c:	f025 fe90 	bl	802ad80 <memset>
            switch (frameCommand) {
 8005060:	f897 313b 	ldrb.w	r3, [r7, #315]	@ 0x13b
 8005064:	2b11      	cmp	r3, #17
 8005066:	f200 82b2 	bhi.w	80055ce <UartTxTask+0x632>
 800506a:	a201      	add	r2, pc, #4	@ (adr r2, 8005070 <UartTxTask+0xd4>)
 800506c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8005070:	0800516d 	.word	0x0800516d
 8005074:	0800516d 	.word	0x0800516d
 8005078:	080050b9 	.word	0x080050b9
 800507c:	080050b9 	.word	0x080050b9
 8005080:	080050b9 	.word	0x080050b9
 8005084:	080050ef 	.word	0x080050ef
 8005088:	080050ef 	.word	0x080050ef
 800508c:	080050dd 	.word	0x080050dd
 8005090:	0800516d 	.word	0x0800516d
 8005094:	08005101 	.word	0x08005101
 8005098:	08005113 	.word	0x08005113
 800509c:	08005125 	.word	0x08005125
 80050a0:	08005125 	.word	0x08005125
 80050a4:	08005125 	.word	0x08005125
 80050a8:	08005125 	.word	0x08005125
 80050ac:	0800516d 	.word	0x0800516d
 80050b0:	0800515b 	.word	0x0800515b
 80050b4:	0800515b 	.word	0x0800515b
            case spSetFanSpeed:
            case spSetMotorXOn:
            case spSetMotorYOn:
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (uint32_t));
 80050b8:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 80050bc:	1d1a      	adds	r2, r3, #4
 80050be:	2304      	movs	r3, #4
 80050c0:	49a5      	ldr	r1, [pc, #660]	@ (8005358 <UartTxTask+0x3bc>)
 80050c2:	48a6      	ldr	r0, [pc, #664]	@ (800535c <UartTxTask+0x3c0>)
 80050c4:	f7fe fb88 	bl	80037d8 <WriteDataToBuffer>
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[1], sizeof (uint32_t));
 80050c8:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 80050cc:	f103 0208 	add.w	r2, r3, #8
 80050d0:	2304      	movs	r3, #4
 80050d2:	49a1      	ldr	r1, [pc, #644]	@ (8005358 <UartTxTask+0x3bc>)
 80050d4:	48a1      	ldr	r0, [pc, #644]	@ (800535c <UartTxTask+0x3c0>)
 80050d6:	f7fe fb7f 	bl	80037d8 <WriteDataToBuffer>
                break;
 80050da:	e048      	b.n	800516e <UartTxTask+0x1d2>
            case spSetDiodeOn: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.integerValues.value[0], sizeof (uint32_t)); break;
 80050dc:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 80050e0:	1d1a      	adds	r2, r3, #4
 80050e2:	2304      	movs	r3, #4
 80050e4:	499c      	ldr	r1, [pc, #624]	@ (8005358 <UartTxTask+0x3bc>)
 80050e6:	489d      	ldr	r0, [pc, #628]	@ (800535c <UartTxTask+0x3c0>)
 80050e8:	f7fe fb76 	bl	80037d8 <WriteDataToBuffer>
 80050ec:	e03f      	b.n	800516e <UartTxTask+0x1d2>
            case spSetmotorXMaxCurrent:
            case spSetmotorYMaxCurrent: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
 80050ee:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 80050f2:	1d1a      	adds	r2, r3, #4
 80050f4:	2304      	movs	r3, #4
 80050f6:	4998      	ldr	r1, [pc, #608]	@ (8005358 <UartTxTask+0x3bc>)
 80050f8:	4898      	ldr	r0, [pc, #608]	@ (800535c <UartTxTask+0x3c0>)
 80050fa:	f7fe fb6d 	bl	80037d8 <WriteDataToBuffer>
 80050fe:	e036      	b.n	800516e <UartTxTask+0x1d2>
            case spGetElectricalMeasurments:
            case spGetSensorMeasurments: break;
            case spClearPeakMeasurments: break;
            case spSetEncoderXValue: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
 8005100:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8005104:	1d1a      	adds	r2, r3, #4
 8005106:	2304      	movs	r3, #4
 8005108:	4993      	ldr	r1, [pc, #588]	@ (8005358 <UartTxTask+0x3bc>)
 800510a:	4894      	ldr	r0, [pc, #592]	@ (800535c <UartTxTask+0x3c0>)
 800510c:	f7fe fb64 	bl	80037d8 <WriteDataToBuffer>
 8005110:	e02d      	b.n	800516e <UartTxTask+0x1d2>
            case spSetEncoderYValue: WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float)); break;
 8005112:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8005116:	1d1a      	adds	r2, r3, #4
 8005118:	2304      	movs	r3, #4
 800511a:	498f      	ldr	r1, [pc, #572]	@ (8005358 <UartTxTask+0x3bc>)
 800511c:	488f      	ldr	r0, [pc, #572]	@ (800535c <UartTxTask+0x3c0>)
 800511e:	f7fe fb5b 	bl	80037d8 <WriteDataToBuffer>
 8005122:	e024      	b.n	800516e <UartTxTask+0x1d2>
            case spSetVoltageMeasGains:
            case spSetVoltageMeasOffsets:
            case spSetCurrentMeasGains:
            case spSetCurrentMeasOffsets:
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float));
 8005124:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8005128:	1d1a      	adds	r2, r3, #4
 800512a:	2304      	movs	r3, #4
 800512c:	498a      	ldr	r1, [pc, #552]	@ (8005358 <UartTxTask+0x3bc>)
 800512e:	488b      	ldr	r0, [pc, #556]	@ (800535c <UartTxTask+0x3c0>)
 8005130:	f7fe fb52 	bl	80037d8 <WriteDataToBuffer>
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[1], sizeof (float));
 8005134:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 8005138:	f103 0208 	add.w	r2, r3, #8
 800513c:	2304      	movs	r3, #4
 800513e:	4986      	ldr	r1, [pc, #536]	@ (8005358 <UartTxTask+0x3bc>)
 8005140:	4886      	ldr	r0, [pc, #536]	@ (800535c <UartTxTask+0x3c0>)
 8005142:	f7fe fb49 	bl	80037d8 <WriteDataToBuffer>
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[2], sizeof (float));
 8005146:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 800514a:	f103 020c 	add.w	r2, r3, #12
 800514e:	2304      	movs	r3, #4
 8005150:	4981      	ldr	r1, [pc, #516]	@ (8005358 <UartTxTask+0x3bc>)
 8005152:	4882      	ldr	r0, [pc, #520]	@ (800535c <UartTxTask+0x3c0>)
 8005154:	f7fe fb40 	bl	80037d8 <WriteDataToBuffer>
                break;
 8005158:	e009      	b.n	800516e <UartTxTask+0x1d2>
            case spResetSystem: break;
            case spSetPositonX:
            case spSetPositonY:
                WriteDataToBuffer (outputDataBuffer, &outputDataBufferPos, &data.values.flaotValues.value[0], sizeof (float));
 800515a:	f507 738e 	add.w	r3, r7, #284	@ 0x11c
 800515e:	1d1a      	adds	r2, r3, #4
 8005160:	2304      	movs	r3, #4
 8005162:	497d      	ldr	r1, [pc, #500]	@ (8005358 <UartTxTask+0x3bc>)
 8005164:	487d      	ldr	r0, [pc, #500]	@ (800535c <UartTxTask+0x3c0>)
 8005166:	f7fe fb37 	bl	80037d8 <WriteDataToBuffer>
                break;
 800516a:	e000      	b.n	800516e <UartTxTask+0x1d2>
            case spGetSensorMeasurments: break;
 800516c:	bf00      	nop
            default: continue; break;
            }

            bytesToSend = PrepareReqFrame (uartTaskData->uartTxBuffer, frameId, frameCommand, outputDataBuffer, outputDataBufferPos);
 800516e:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8005172:	6898      	ldr	r0, [r3, #8]
 8005174:	4b78      	ldr	r3, [pc, #480]	@ (8005358 <UartTxTask+0x3bc>)
 8005176:	881b      	ldrh	r3, [r3, #0]
 8005178:	f897 213b 	ldrb.w	r2, [r7, #315]	@ 0x13b
 800517c:	f8b7 113e 	ldrh.w	r1, [r7, #318]	@ 0x13e
 8005180:	9300      	str	r3, [sp, #0]
 8005182:	4b76      	ldr	r3, [pc, #472]	@ (800535c <UartTxTask+0x3c0>)
 8005184:	f7fe fbb4 	bl	80038f0 <PrepareReqFrame>
 8005188:	4603      	mov	r3, r0
 800518a:	f8a7 313c 	strh.w	r3, [r7, #316]	@ 0x13c
            HAL_UART_Transmit_IT (uartTaskData->huart, uartTaskData->uartTxBuffer, bytesToSend);
 800518e:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8005192:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8005194:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 8005198:	689b      	ldr	r3, [r3, #8]
 800519a:	f8b7 213c 	ldrh.w	r2, [r7, #316]	@ 0x13c
 800519e:	4619      	mov	r1, r3
 80051a0:	f008 fcf2 	bl	800db88 <HAL_UART_Transmit_IT>
            bytesInMsg = xMessageBufferReceive (uartTaskData->processRxDataMsgBuffer, &frameData, INPUT_DATA_BUFF_SIZE, pdMS_TO_TICKS (1000));
 80051a4:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 80051a8:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 80051aa:	f107 0110 	add.w	r1, r7, #16
 80051ae:	f44f 737a 	mov.w	r3, #1000	@ 0x3e8
 80051b2:	f44f 7280 	mov.w	r2, #256	@ 0x100
 80051b6:	f00e fab9 	bl	801372c <xStreamBufferReceive>
 80051ba:	f8c7 0134 	str.w	r0, [r7, #308]	@ 0x134
            for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 80051be:	2300      	movs	r3, #0
 80051c0:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147
 80051c4:	e00e      	b.n	80051e4 <UartTxTask+0x248>
                if (boardToUartNumberMap[boardNumber] == uartTaskData->uartNumber) {
 80051c6:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 80051ca:	4a65      	ldr	r2, [pc, #404]	@ (8005360 <UartTxTask+0x3c4>)
 80051cc:	5cd2      	ldrb	r2, [r2, r3]
 80051ce:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 80051d2:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 80051d6:	429a      	cmp	r2, r3
 80051d8:	d009      	beq.n	80051ee <UartTxTask+0x252>
            for (boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++) {
 80051da:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 80051de:	3301      	adds	r3, #1
 80051e0:	f887 3147 	strb.w	r3, [r7, #327]	@ 0x147
 80051e4:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 80051e8:	2b03      	cmp	r3, #3
 80051ea:	d9ec      	bls.n	80051c6 <UartTxTask+0x22a>
 80051ec:	e000      	b.n	80051f0 <UartTxTask+0x254>
                    break;
 80051ee:	bf00      	nop
                }
            }
            if (bytesInMsg == 0) {
 80051f0:	f8d7 3134 	ldr.w	r3, [r7, #308]	@ 0x134
 80051f4:	2b00      	cmp	r3, #0
 80051f6:	d124      	bne.n	8005242 <UartTxTask+0x2a6>
                if (frameCommand == spGetElectricalMeasurments) {
 80051f8:	f897 313b 	ldrb.w	r3, [r7, #315]	@ 0x13b
 80051fc:	2b00      	cmp	r3, #0
 80051fe:	d114      	bne.n	800522a <UartTxTask+0x28e>
                    osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8005200:	4b58      	ldr	r3, [pc, #352]	@ (8005364 <UartTxTask+0x3c8>)
 8005202:	681b      	ldr	r3, [r3, #0]
 8005204:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8005208:	4618      	mov	r0, r3
 800520a:	f00c fbbc 	bl	8011986 <osMutexAcquire>
                    slaveLastSeen[boardNumber]++;
 800520e:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8005212:	4a55      	ldr	r2, [pc, #340]	@ (8005368 <UartTxTask+0x3cc>)
 8005214:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8005218:	3201      	adds	r2, #1
 800521a:	4953      	ldr	r1, [pc, #332]	@ (8005368 <UartTxTask+0x3cc>)
 800521c:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
                    osMutexRelease (resMeasurementsMutex);
 8005220:	4b50      	ldr	r3, [pc, #320]	@ (8005364 <UartTxTask+0x3c8>)
 8005222:	681b      	ldr	r3, [r3, #0]
 8005224:	4618      	mov	r0, r3
 8005226:	f00c fbf9 	bl	8011a1c <osMutexRelease>
                }
                printf ("Uart%d: Response timeout for frameId 0x%x\n", uartTaskData->uartNumber, frameId);
 800522a:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 800522e:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8005232:	4619      	mov	r1, r3
 8005234:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8005238:	461a      	mov	r2, r3
 800523a:	484c      	ldr	r0, [pc, #304]	@ (800536c <UartTxTask+0x3d0>)
 800523c:	f025 fc0e 	bl	802aa5c <iprintf>
 8005240:	e6e5      	b.n	800500e <UartTxTask+0x72>
            } else {
                if ((frameId == frameData.frameHeader.frameId) && (frameData.frameHeader.respStatus == spOK)) {
 8005242:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8005246:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 800524a:	881b      	ldrh	r3, [r3, #0]
 800524c:	f8b7 213e 	ldrh.w	r2, [r7, #318]	@ 0x13e
 8005250:	429a      	cmp	r2, r3
 8005252:	f47f aedc 	bne.w	800500e <UartTxTask+0x72>
 8005256:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 800525a:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 800525e:	f993 3003 	ldrsb.w	r3, [r3, #3]
 8005262:	2b00      	cmp	r3, #0
 8005264:	f47f aed3 	bne.w	800500e <UartTxTask+0x72>
                    printf ("Uart%d: Response for frameId 0x%x OK\n", uartTaskData->uartNumber, frameId);
 8005268:	f8d7 3140 	ldr.w	r3, [r7, #320]	@ 0x140
 800526c:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8005270:	4619      	mov	r1, r3
 8005272:	f8b7 313e 	ldrh.w	r3, [r7, #318]	@ 0x13e
 8005276:	461a      	mov	r2, r3
 8005278:	483d      	ldr	r0, [pc, #244]	@ (8005370 <UartTxTask+0x3d4>)
 800527a:	f025 fbef 	bl	802aa5c <iprintf>
                    slaveLastSeen[boardNumber] = 0;
 800527e:	f897 3147 	ldrb.w	r3, [r7, #327]	@ 0x147
 8005282:	4a39      	ldr	r2, [pc, #228]	@ (8005368 <UartTxTask+0x3cc>)
 8005284:	2100      	movs	r1, #0
 8005286:	f842 1023 	str.w	r1, [r2, r3, lsl #2]
                    switch (frameData.frameHeader.frameCommand) {
 800528a:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 800528e:	f5a3 739c 	sub.w	r3, r3, #312	@ 0x138
 8005292:	789b      	ldrb	r3, [r3, #2]
 8005294:	2b00      	cmp	r3, #0
 8005296:	d002      	beq.n	800529e <UartTxTask+0x302>
 8005298:	2b01      	cmp	r3, #1
 800529a:	d06d      	beq.n	8005378 <UartTxTask+0x3dc>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->positionXWeak);
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->positionYWeak);
                            osMutexRelease (sensorsInfoMutex);
                        }
                        break;
                    default: break;
 800529c:	e19c      	b.n	80055d8 <UartTxTask+0x63c>
                        if (osMutexAcquire (resMeasurementsMutex, osWaitForever) == osOK) {
 800529e:	4b31      	ldr	r3, [pc, #196]	@ (8005364 <UartTxTask+0x3c8>)
 80052a0:	681b      	ldr	r3, [r3, #0]
 80052a2:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80052a6:	4618      	mov	r0, r3
 80052a8:	f00c fb6d 	bl	8011986 <osMutexAcquire>
 80052ac:	4603      	mov	r3, r0
 80052ae:	2b00      	cmp	r3, #0
 80052b0:	f040 818f 	bne.w	80055d2 <UartTxTask+0x636>
                            RESMeasurements* resMeas = &resMeasurements[boardNumber];
 80052b4:	f897 2147 	ldrb.w	r2, [r7, #327]	@ 0x147
 80052b8:	4613      	mov	r3, r2
 80052ba:	011b      	lsls	r3, r3, #4
 80052bc:	1a9b      	subs	r3, r3, r2
 80052be:	009b      	lsls	r3, r3, #2
 80052c0:	4a2c      	ldr	r2, [pc, #176]	@ (8005374 <UartTxTask+0x3d8>)
 80052c2:	4413      	add	r3, r2
 80052c4:	f8c7 312c 	str.w	r3, [r7, #300]	@ 0x12c
                            inputDataBufferPos       = 0;
 80052c8:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 80052cc:	f5a3 739f 	sub.w	r3, r3, #318	@ 0x13e
 80052d0:	2200      	movs	r2, #0
 80052d2:	801a      	strh	r2, [r3, #0]
                            ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->voltageRMS);
 80052d4:	f8d7 212c 	ldr.w	r2, [r7, #300]	@ 0x12c
 80052d8:	f107 010a 	add.w	r1, r7, #10
 80052dc:	f107 0310 	add.w	r3, r7, #16
 80052e0:	330c      	adds	r3, #12
 80052e2:	4618      	mov	r0, r3
 80052e4:	f7ff fe3c 	bl	8004f60 <ReadMeasSetFromBuffer>
                            ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->voltagePeak);
 80052e8:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 80052ec:	f103 020c 	add.w	r2, r3, #12
 80052f0:	f107 010a 	add.w	r1, r7, #10
 80052f4:	f107 0310 	add.w	r3, r7, #16
 80052f8:	330c      	adds	r3, #12
 80052fa:	4618      	mov	r0, r3
 80052fc:	f7ff fe30 	bl	8004f60 <ReadMeasSetFromBuffer>
                            ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->currentRMS);
 8005300:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8005304:	f103 0218 	add.w	r2, r3, #24
 8005308:	f107 010a 	add.w	r1, r7, #10
 800530c:	f107 0310 	add.w	r3, r7, #16
 8005310:	330c      	adds	r3, #12
 8005312:	4618      	mov	r0, r3
 8005314:	f7ff fe24 	bl	8004f60 <ReadMeasSetFromBuffer>
                            ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->currentPeak);
 8005318:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 800531c:	f103 0224 	add.w	r2, r3, #36	@ 0x24
 8005320:	f107 010a 	add.w	r1, r7, #10
 8005324:	f107 0310 	add.w	r3, r7, #16
 8005328:	330c      	adds	r3, #12
 800532a:	4618      	mov	r0, r3
 800532c:	f7ff fe18 	bl	8004f60 <ReadMeasSetFromBuffer>
                            ReadMeasSetFromBuffer (frameData.dataBuffer, &inputDataBufferPos, resMeas->power);
 8005330:	f8d7 312c 	ldr.w	r3, [r7, #300]	@ 0x12c
 8005334:	f103 0230 	add.w	r2, r3, #48	@ 0x30
 8005338:	f107 010a 	add.w	r1, r7, #10
 800533c:	f107 0310 	add.w	r3, r7, #16
 8005340:	330c      	adds	r3, #12
 8005342:	4618      	mov	r0, r3
 8005344:	f7ff fe0c 	bl	8004f60 <ReadMeasSetFromBuffer>
                            osMutexRelease (resMeasurementsMutex);
 8005348:	4b06      	ldr	r3, [pc, #24]	@ (8005364 <UartTxTask+0x3c8>)
 800534a:	681b      	ldr	r3, [r3, #0]
 800534c:	4618      	mov	r0, r3
 800534e:	f00c fb65 	bl	8011a1c <osMutexRelease>
                        break;
 8005352:	e13e      	b.n	80055d2 <UartTxTask+0x636>
 8005354:	2400027c 	.word	0x2400027c
 8005358:	24002094 	.word	0x24002094
 800535c:	24002014 	.word	0x24002014
 8005360:	24000014 	.word	0x24000014
 8005364:	24002288 	.word	0x24002288
 8005368:	24002278 	.word	0x24002278
 800536c:	0802dbec 	.word	0x0802dbec
 8005370:	0802dc18 	.word	0x0802dc18
 8005374:	24002098 	.word	0x24002098
                        if (osMutexAcquire (sensorsInfoMutex, osWaitForever) == osOK) {
 8005378:	4b98      	ldr	r3, [pc, #608]	@ (80055dc <UartTxTask+0x640>)
 800537a:	681b      	ldr	r3, [r3, #0]
 800537c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8005380:	4618      	mov	r0, r3
 8005382:	f00c fb00 	bl	8011986 <osMutexAcquire>
 8005386:	4603      	mov	r3, r0
 8005388:	2b00      	cmp	r3, #0
 800538a:	f040 8124 	bne.w	80055d6 <UartTxTask+0x63a>
                            inputDataBufferPos   = 0;
 800538e:	f507 73a4 	add.w	r3, r7, #328	@ 0x148
 8005392:	f5a3 739f 	sub.w	r3, r3, #318	@ 0x13e
 8005396:	2200      	movs	r2, #0
 8005398:	801a      	strh	r2, [r3, #0]
                            SesnorsInfo* sensors = &sensorsInfo[boardNumber];
 800539a:	f897 2147 	ldrb.w	r2, [r7, #327]	@ 0x147
 800539e:	4613      	mov	r3, r2
 80053a0:	011b      	lsls	r3, r3, #4
 80053a2:	1a9b      	subs	r3, r3, r2
 80053a4:	009b      	lsls	r3, r3, #2
 80053a6:	4a8e      	ldr	r2, [pc, #568]	@ (80055e0 <UartTxTask+0x644>)
 80053a8:	4413      	add	r3, r2
 80053aa:	f8c7 3130 	str.w	r3, [r7, #304]	@ 0x130
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[0]);
 80053ae:	f8d7 2130 	ldr.w	r2, [r7, #304]	@ 0x130
 80053b2:	f107 010a 	add.w	r1, r7, #10
 80053b6:	f107 0310 	add.w	r3, r7, #16
 80053ba:	330c      	adds	r3, #12
 80053bc:	4618      	mov	r0, r3
 80053be:	f7fe fa3c 	bl	800383a <ReadFloatFromBuffer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->pvTemperature[1]);
 80053c2:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80053c6:	1d1a      	adds	r2, r3, #4
 80053c8:	f107 010a 	add.w	r1, r7, #10
 80053cc:	f107 0310 	add.w	r3, r7, #16
 80053d0:	330c      	adds	r3, #12
 80053d2:	4618      	mov	r0, r3
 80053d4:	f7fe fa31 	bl	800383a <ReadFloatFromBuffer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->fanVoltage);
 80053d8:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80053dc:	f103 0208 	add.w	r2, r3, #8
 80053e0:	f107 010a 	add.w	r1, r7, #10
 80053e4:	f107 0310 	add.w	r3, r7, #16
 80053e8:	330c      	adds	r3, #12
 80053ea:	4618      	mov	r0, r3
 80053ec:	f7fe fa25 	bl	800383a <ReadFloatFromBuffer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->pvEncoderX);
 80053f0:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80053f4:	f103 020c 	add.w	r2, r3, #12
 80053f8:	f107 010a 	add.w	r1, r7, #10
 80053fc:	f107 0310 	add.w	r3, r7, #16
 8005400:	330c      	adds	r3, #12
 8005402:	4618      	mov	r0, r3
 8005404:	f7fe fa19 	bl	800383a <ReadFloatFromBuffer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->pvEncoderY);
 8005408:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 800540c:	f103 0210 	add.w	r2, r3, #16
 8005410:	f107 010a 	add.w	r1, r7, #10
 8005414:	f107 0310 	add.w	r3, r7, #16
 8005418:	330c      	adds	r3, #12
 800541a:	4618      	mov	r0, r3
 800541c:	f7fe fa0d 	bl	800383a <ReadFloatFromBuffer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXStatus);
 8005420:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005424:	f103 0214 	add.w	r2, r3, #20
 8005428:	f107 010a 	add.w	r1, r7, #10
 800542c:	f107 0310 	add.w	r3, r7, #16
 8005430:	330c      	adds	r3, #12
 8005432:	4618      	mov	r0, r3
 8005434:	f7fe fa36 	bl	80038a4 <ReadByteFromBufer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYStatus);
 8005438:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 800543c:	f103 0215 	add.w	r2, r3, #21
 8005440:	f107 010a 	add.w	r1, r7, #10
 8005444:	f107 0310 	add.w	r3, r7, #16
 8005448:	330c      	adds	r3, #12
 800544a:	4618      	mov	r0, r3
 800544c:	f7fe fa2a 	bl	80038a4 <ReadByteFromBufer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXAveCurrent);
 8005450:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005454:	f103 0218 	add.w	r2, r3, #24
 8005458:	f107 010a 	add.w	r1, r7, #10
 800545c:	f107 0310 	add.w	r3, r7, #16
 8005460:	330c      	adds	r3, #12
 8005462:	4618      	mov	r0, r3
 8005464:	f7fe f9e9 	bl	800383a <ReadFloatFromBuffer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYAveCurrent);
 8005468:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 800546c:	f103 021c 	add.w	r2, r3, #28
 8005470:	f107 010a 	add.w	r1, r7, #10
 8005474:	f107 0310 	add.w	r3, r7, #16
 8005478:	330c      	adds	r3, #12
 800547a:	4618      	mov	r0, r3
 800547c:	f7fe f9dd 	bl	800383a <ReadFloatFromBuffer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorXPeakCurrent);
 8005480:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005484:	f103 0220 	add.w	r2, r3, #32
 8005488:	f107 010a 	add.w	r1, r7, #10
 800548c:	f107 0310 	add.w	r3, r7, #16
 8005490:	330c      	adds	r3, #12
 8005492:	4618      	mov	r0, r3
 8005494:	f7fe f9d1 	bl	800383a <ReadFloatFromBuffer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->motorYPeakCurrent);
 8005498:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 800549c:	f103 0224 	add.w	r2, r3, #36	@ 0x24
 80054a0:	f107 010a 	add.w	r1, r7, #10
 80054a4:	f107 0310 	add.w	r3, r7, #16
 80054a8:	330c      	adds	r3, #12
 80054aa:	4618      	mov	r0, r3
 80054ac:	f7fe f9c5 	bl	800383a <ReadFloatFromBuffer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchUp);
 80054b0:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80054b4:	f103 0228 	add.w	r2, r3, #40	@ 0x28
 80054b8:	f107 010a 	add.w	r1, r7, #10
 80054bc:	f107 0310 	add.w	r3, r7, #16
 80054c0:	330c      	adds	r3, #12
 80054c2:	4618      	mov	r0, r3
 80054c4:	f7fe f9ee 	bl	80038a4 <ReadByteFromBufer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchDown);
 80054c8:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80054cc:	f103 0229 	add.w	r2, r3, #41	@ 0x29
 80054d0:	f107 010a 	add.w	r1, r7, #10
 80054d4:	f107 0310 	add.w	r3, r7, #16
 80054d8:	330c      	adds	r3, #12
 80054da:	4618      	mov	r0, r3
 80054dc:	f7fe f9e2 	bl	80038a4 <ReadByteFromBufer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitXSwitchCenter);
 80054e0:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80054e4:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 80054e8:	f107 010a 	add.w	r1, r7, #10
 80054ec:	f107 0310 	add.w	r3, r7, #16
 80054f0:	330c      	adds	r3, #12
 80054f2:	4618      	mov	r0, r3
 80054f4:	f7fe f9d6 	bl	80038a4 <ReadByteFromBufer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchUp);
 80054f8:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80054fc:	f103 022b 	add.w	r2, r3, #43	@ 0x2b
 8005500:	f107 010a 	add.w	r1, r7, #10
 8005504:	f107 0310 	add.w	r3, r7, #16
 8005508:	330c      	adds	r3, #12
 800550a:	4618      	mov	r0, r3
 800550c:	f7fe f9ca 	bl	80038a4 <ReadByteFromBufer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchDown);
 8005510:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005514:	f103 022c 	add.w	r2, r3, #44	@ 0x2c
 8005518:	f107 010a 	add.w	r1, r7, #10
 800551c:	f107 0310 	add.w	r3, r7, #16
 8005520:	330c      	adds	r3, #12
 8005522:	4618      	mov	r0, r3
 8005524:	f7fe f9be 	bl	80038a4 <ReadByteFromBufer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->limitYSwitchCenter);
 8005528:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 800552c:	f103 022d 	add.w	r2, r3, #45	@ 0x2d
 8005530:	f107 010a 	add.w	r1, r7, #10
 8005534:	f107 0310 	add.w	r3, r7, #16
 8005538:	330c      	adds	r3, #12
 800553a:	4618      	mov	r0, r3
 800553c:	f7fe f9b2 	bl	80038a4 <ReadByteFromBufer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->powerSupplyFailMask);
 8005540:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005544:	f103 022e 	add.w	r2, r3, #46	@ 0x2e
 8005548:	f107 010a 	add.w	r1, r7, #10
 800554c:	f107 0310 	add.w	r3, r7, #16
 8005550:	330c      	adds	r3, #12
 8005552:	4618      	mov	r0, r3
 8005554:	f7fe f9a6 	bl	80038a4 <ReadByteFromBufer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->currentXPosition);
 8005558:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 800555c:	f103 0230 	add.w	r2, r3, #48	@ 0x30
 8005560:	f107 010a 	add.w	r1, r7, #10
 8005564:	f107 0310 	add.w	r3, r7, #16
 8005568:	330c      	adds	r3, #12
 800556a:	4618      	mov	r0, r3
 800556c:	f7fe f965 	bl	800383a <ReadFloatFromBuffer>
                            ReadFloatFromBuffer (frameData.dataBuffer, &inputDataBufferPos, &sensors->currentYPosition);
 8005570:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 8005574:	f103 0234 	add.w	r2, r3, #52	@ 0x34
 8005578:	f107 010a 	add.w	r1, r7, #10
 800557c:	f107 0310 	add.w	r3, r7, #16
 8005580:	330c      	adds	r3, #12
 8005582:	4618      	mov	r0, r3
 8005584:	f7fe f959 	bl	800383a <ReadFloatFromBuffer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->positionXWeak);
 8005588:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 800558c:	f103 0238 	add.w	r2, r3, #56	@ 0x38
 8005590:	f107 010a 	add.w	r1, r7, #10
 8005594:	f107 0310 	add.w	r3, r7, #16
 8005598:	330c      	adds	r3, #12
 800559a:	4618      	mov	r0, r3
 800559c:	f7fe f982 	bl	80038a4 <ReadByteFromBufer>
                            ReadByteFromBufer (frameData.dataBuffer, &inputDataBufferPos, &sensors->positionYWeak);
 80055a0:	f8d7 3130 	ldr.w	r3, [r7, #304]	@ 0x130
 80055a4:	f103 0239 	add.w	r2, r3, #57	@ 0x39
 80055a8:	f107 010a 	add.w	r1, r7, #10
 80055ac:	f107 0310 	add.w	r3, r7, #16
 80055b0:	330c      	adds	r3, #12
 80055b2:	4618      	mov	r0, r3
 80055b4:	f7fe f976 	bl	80038a4 <ReadByteFromBufer>
                            osMutexRelease (sensorsInfoMutex);
 80055b8:	4b08      	ldr	r3, [pc, #32]	@ (80055dc <UartTxTask+0x640>)
 80055ba:	681b      	ldr	r3, [r3, #0]
 80055bc:	4618      	mov	r0, r3
 80055be:	f00c fa2d 	bl	8011a1c <osMutexRelease>
                        break;
 80055c2:	e008      	b.n	80055d6 <UartTxTask+0x63a>
                    }
                }
            }
        } else {
            osDelay (pdMS_TO_TICKS (1000));
 80055c4:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 80055c8:	f00c f845 	bl	8011656 <osDelay>
 80055cc:	e51f      	b.n	800500e <UartTxTask+0x72>
            default: continue; break;
 80055ce:	bf00      	nop
 80055d0:	e51d      	b.n	800500e <UartTxTask+0x72>
                        break;
 80055d2:	bf00      	nop
 80055d4:	e51b      	b.n	800500e <UartTxTask+0x72>
                        break;
 80055d6:	bf00      	nop
        if (uartTaskData->sendCmdToSlaveQueue != NULL) {
 80055d8:	e519      	b.n	800500e <UartTxTask+0x72>
 80055da:	bf00      	nop
 80055dc:	2400228c 	.word	0x2400228c
 80055e0:	24002188 	.word	0x24002188

080055e4 <MeasurmentsReqSchedulerTaskInit>:
        }
    }
}

void MeasurmentsReqSchedulerTaskInit (void) {
 80055e4:	b580      	push	{r7, lr}
 80055e6:	b08a      	sub	sp, #40	@ 0x28
 80055e8:	af00      	add	r7, sp, #0
    osThreadAttr_t osThreadAttrMeasurmentsReqSchedulerTask = { 0 };
 80055ea:	1d3b      	adds	r3, r7, #4
 80055ec:	2224      	movs	r2, #36	@ 0x24
 80055ee:	2100      	movs	r1, #0
 80055f0:	4618      	mov	r0, r3
 80055f2:	f025 fbc5 	bl	802ad80 <memset>

    osThreadAttrMeasurmentsReqSchedulerTask.name       = "os_thread_XXX";
 80055f6:	4b08      	ldr	r3, [pc, #32]	@ (8005618 <MeasurmentsReqSchedulerTaskInit+0x34>)
 80055f8:	607b      	str	r3, [r7, #4]
    osThreadAttrMeasurmentsReqSchedulerTask.stack_size = configMINIMAL_STACK_SIZE * 2;
 80055fa:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 80055fe:	61bb      	str	r3, [r7, #24]
    osThreadAttrMeasurmentsReqSchedulerTask.priority   = (osPriority_t)osPriorityNormal;
 8005600:	2318      	movs	r3, #24
 8005602:	61fb      	str	r3, [r7, #28]

    osThreadNew (MeasurmentsReqSchedulerTask, uartTasks, &osThreadAttrMeasurmentsReqSchedulerTask);
 8005604:	1d3b      	adds	r3, r7, #4
 8005606:	461a      	mov	r2, r3
 8005608:	4904      	ldr	r1, [pc, #16]	@ (800561c <MeasurmentsReqSchedulerTaskInit+0x38>)
 800560a:	4805      	ldr	r0, [pc, #20]	@ (8005620 <MeasurmentsReqSchedulerTaskInit+0x3c>)
 800560c:	f00b ff85 	bl	801151a <osThreadNew>
}
 8005610:	bf00      	nop
 8005612:	3728      	adds	r7, #40	@ 0x28
 8005614:	46bd      	mov	sp, r7
 8005616:	bd80      	pop	{r7, pc}
 8005618:	0802dc40 	.word	0x0802dc40
 800561c:	24000018 	.word	0x24000018
 8005620:	08005625 	.word	0x08005625

08005624 <MeasurmentsReqSchedulerTask>:

void MeasurmentsReqSchedulerTask (void* argument) {
 8005624:	b580      	push	{r7, lr}
 8005626:	b08a      	sub	sp, #40	@ 0x28
 8005628:	af00      	add	r7, sp, #0
 800562a:	6078      	str	r0, [r7, #4]
    while (pdTRUE) {
        __uintptr_t* ptr = (__uintptr_t*)argument;
 800562c:	687b      	ldr	r3, [r7, #4]
 800562e:	627b      	str	r3, [r7, #36]	@ 0x24
        while (*ptr != 0) {
 8005630:	e052      	b.n	80056d8 <MeasurmentsReqSchedulerTask+0xb4>
            UartTaskData* uartTask = (UartTaskData*)*ptr;
 8005632:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8005634:	681b      	ldr	r3, [r3, #0]
 8005636:	61fb      	str	r3, [r7, #28]
            if (uartTask->sendCmdToSlaveQueue != NULL) {
 8005638:	69fb      	ldr	r3, [r7, #28]
 800563a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800563c:	2b00      	cmp	r3, #0
 800563e:	d048      	beq.n	80056d2 <MeasurmentsReqSchedulerTask+0xae>
                InterProcessData data = { 0 };
 8005640:	f107 030c 	add.w	r3, r7, #12
 8005644:	2200      	movs	r2, #0
 8005646:	601a      	str	r2, [r3, #0]
 8005648:	605a      	str	r2, [r3, #4]
 800564a:	609a      	str	r2, [r3, #8]
 800564c:	60da      	str	r2, [r3, #12]
                uint8_t boardNumber = 0;
 800564e:	2300      	movs	r3, #0
 8005650:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
            	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 8005654:	2300      	movs	r3, #0
 8005656:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
 800565a:	e00d      	b.n	8005678 <MeasurmentsReqSchedulerTask+0x54>
            	{
            		if(boardToUartNumberMap[boardNumber] == uartTask->uartNumber)
 800565c:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8005660:	4a22      	ldr	r2, [pc, #136]	@ (80056ec <MeasurmentsReqSchedulerTask+0xc8>)
 8005662:	5cd2      	ldrb	r2, [r2, r3]
 8005664:	69fb      	ldr	r3, [r7, #28]
 8005666:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 800566a:	429a      	cmp	r2, r3
 800566c:	d009      	beq.n	8005682 <MeasurmentsReqSchedulerTask+0x5e>
            	for(boardNumber = 0; boardNumber < SLAVES_COUNT; boardNumber++)
 800566e:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8005672:	3301      	adds	r3, #1
 8005674:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
 8005678:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 800567c:	2b03      	cmp	r3, #3
 800567e:	d9ed      	bls.n	800565c <MeasurmentsReqSchedulerTask+0x38>
 8005680:	e000      	b.n	8005684 <MeasurmentsReqSchedulerTask+0x60>
            		{
            			break;
 8005682:	bf00      	nop
            		}
            	}
                data.spCommand        = spGetElectricalMeasurments;
 8005684:	2300      	movs	r3, #0
 8005686:	733b      	strb	r3, [r7, #12]
                osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 8005688:	69fb      	ldr	r3, [r7, #28]
 800568a:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 800568c:	f107 010c 	add.w	r1, r7, #12
 8005690:	2364      	movs	r3, #100	@ 0x64
 8005692:	2200      	movs	r2, #0
 8005694:	f00c fbb6 	bl	8011e04 <osMessageQueuePut>
            	osMutexAcquire (resMeasurementsMutex, osWaitForever);
 8005698:	4b15      	ldr	r3, [pc, #84]	@ (80056f0 <MeasurmentsReqSchedulerTask+0xcc>)
 800569a:	681b      	ldr	r3, [r3, #0]
 800569c:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80056a0:	4618      	mov	r0, r3
 80056a2:	f00c f970 	bl	8011986 <osMutexAcquire>
            	if(slaveLastSeen[boardNumber] == 0)
 80056a6:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80056aa:	4a12      	ldr	r2, [pc, #72]	@ (80056f4 <MeasurmentsReqSchedulerTask+0xd0>)
 80056ac:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 80056b0:	2b00      	cmp	r3, #0
 80056b2:	d109      	bne.n	80056c8 <MeasurmentsReqSchedulerTask+0xa4>
            	{
            		data.spCommand = spGetSensorMeasurments;
 80056b4:	2301      	movs	r3, #1
 80056b6:	733b      	strb	r3, [r7, #12]
            		osMessageQueuePut (uartTask->sendCmdToSlaveQueue, &data, 0, (TickType_t)100);
 80056b8:	69fb      	ldr	r3, [r7, #28]
 80056ba:	6ad8      	ldr	r0, [r3, #44]	@ 0x2c
 80056bc:	f107 010c 	add.w	r1, r7, #12
 80056c0:	2364      	movs	r3, #100	@ 0x64
 80056c2:	2200      	movs	r2, #0
 80056c4:	f00c fb9e 	bl	8011e04 <osMessageQueuePut>
            	}
            	osMutexRelease(resMeasurementsMutex);
 80056c8:	4b09      	ldr	r3, [pc, #36]	@ (80056f0 <MeasurmentsReqSchedulerTask+0xcc>)
 80056ca:	681b      	ldr	r3, [r3, #0]
 80056cc:	4618      	mov	r0, r3
 80056ce:	f00c f9a5 	bl	8011a1c <osMutexRelease>
            }
            ptr++;
 80056d2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80056d4:	3304      	adds	r3, #4
 80056d6:	627b      	str	r3, [r7, #36]	@ 0x24
        while (*ptr != 0) {
 80056d8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80056da:	681b      	ldr	r3, [r3, #0]
 80056dc:	2b00      	cmp	r3, #0
 80056de:	d1a8      	bne.n	8005632 <MeasurmentsReqSchedulerTask+0xe>
        }
        osDelay (pdMS_TO_TICKS (MEASURMENTS_SCHEDULER_INTERVAL_MS));
 80056e0:	f44f 707a 	mov.w	r0, #1000	@ 0x3e8
 80056e4:	f00b ffb7 	bl	8011656 <osDelay>
    while (pdTRUE) {
 80056e8:	e7a0      	b.n	800562c <MeasurmentsReqSchedulerTask+0x8>
 80056ea:	bf00      	nop
 80056ec:	24000014 	.word	0x24000014
 80056f0:	24002288 	.word	0x24002288
 80056f4:	24002278 	.word	0x24002278

080056f8 <Reset_Handler>:

    .section  .text.Reset_Handler
  .weak  Reset_Handler
  .type  Reset_Handler, %function
Reset_Handler:
  ldr   sp, =_estack      /* set stack pointer */
 80056f8:	f8df d034 	ldr.w	sp, [pc, #52]	@ 8005730 <LoopFillZerobss+0xe>

/* Call the clock system initialization function.*/
  bl  SystemInit
 80056fc:	f7fe feec 	bl	80044d8 <SystemInit>

/* Copy the data segment initializers from flash to SRAM */
  ldr r0, =_sdata
 8005700:	480c      	ldr	r0, [pc, #48]	@ (8005734 <LoopFillZerobss+0x12>)
  ldr r1, =_edata
 8005702:	490d      	ldr	r1, [pc, #52]	@ (8005738 <LoopFillZerobss+0x16>)
  ldr r2, =_sidata
 8005704:	4a0d      	ldr	r2, [pc, #52]	@ (800573c <LoopFillZerobss+0x1a>)
  movs r3, #0
 8005706:	2300      	movs	r3, #0
  b LoopCopyDataInit
 8005708:	e002      	b.n	8005710 <LoopCopyDataInit>

0800570a <CopyDataInit>:

CopyDataInit:
  ldr r4, [r2, r3]
 800570a:	58d4      	ldr	r4, [r2, r3]
  str r4, [r0, r3]
 800570c:	50c4      	str	r4, [r0, r3]
  adds r3, r3, #4
 800570e:	3304      	adds	r3, #4

08005710 <LoopCopyDataInit>:

LoopCopyDataInit:
  adds r4, r0, r3
 8005710:	18c4      	adds	r4, r0, r3
  cmp r4, r1
 8005712:	428c      	cmp	r4, r1
  bcc CopyDataInit
 8005714:	d3f9      	bcc.n	800570a <CopyDataInit>
/* Zero fill the bss segment. */
  ldr r2, =_sbss
 8005716:	4a0a      	ldr	r2, [pc, #40]	@ (8005740 <LoopFillZerobss+0x1e>)
  ldr r4, =_ebss
 8005718:	4c0a      	ldr	r4, [pc, #40]	@ (8005744 <LoopFillZerobss+0x22>)
  movs r3, #0
 800571a:	2300      	movs	r3, #0
  b LoopFillZerobss
 800571c:	e001      	b.n	8005722 <LoopFillZerobss>

0800571e <FillZerobss>:

FillZerobss:
  str  r3, [r2]
 800571e:	6013      	str	r3, [r2, #0]
  adds r2, r2, #4
 8005720:	3204      	adds	r2, #4

08005722 <LoopFillZerobss>:

LoopFillZerobss:
  cmp r2, r4
 8005722:	42a2      	cmp	r2, r4
  bcc FillZerobss
 8005724:	d3fb      	bcc.n	800571e <FillZerobss>

/* Call static constructors */
    bl __libc_init_array
 8005726:	f025 fbfb 	bl	802af20 <__libc_init_array>
/* Call the application's entry point.*/
  bl  main
 800572a:	f7fc fb0f 	bl	8001d4c <main>
  bx  lr
 800572e:	4770      	bx	lr
  ldr   sp, =_estack      /* set stack pointer */
 8005730:	24060000 	.word	0x24060000
  ldr r0, =_sdata
 8005734:	24000000 	.word	0x24000000
  ldr r1, =_edata
 8005738:	24000224 	.word	0x24000224
  ldr r2, =_sidata
 800573c:	0803239c 	.word	0x0803239c
  ldr r2, =_sbss
 8005740:	24000224 	.word	0x24000224
  ldr r4, =_ebss
 8005744:	2402b2a8 	.word	0x2402b2a8

08005748 <ADC3_IRQHandler>:
 * @retval None
*/
    .section  .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
  b  Infinite_Loop
 8005748:	e7fe      	b.n	8005748 <ADC3_IRQHandler>

0800574a <DP83848_RegisterBusIO>:
  * @param  ioctx: holds device IO functions.
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ERROR if missing mandatory function
  */
int32_t  DP83848_RegisterBusIO(dp83848_Object_t *pObj, dp83848_IOCtx_t *ioctx)
{
 800574a:	b480      	push	{r7}
 800574c:	b083      	sub	sp, #12
 800574e:	af00      	add	r7, sp, #0
 8005750:	6078      	str	r0, [r7, #4]
 8005752:	6039      	str	r1, [r7, #0]
  if(!pObj || !ioctx->ReadReg || !ioctx->WriteReg || !ioctx->GetTick)
 8005754:	687b      	ldr	r3, [r7, #4]
 8005756:	2b00      	cmp	r3, #0
 8005758:	d00b      	beq.n	8005772 <DP83848_RegisterBusIO+0x28>
 800575a:	683b      	ldr	r3, [r7, #0]
 800575c:	68db      	ldr	r3, [r3, #12]
 800575e:	2b00      	cmp	r3, #0
 8005760:	d007      	beq.n	8005772 <DP83848_RegisterBusIO+0x28>
 8005762:	683b      	ldr	r3, [r7, #0]
 8005764:	689b      	ldr	r3, [r3, #8]
 8005766:	2b00      	cmp	r3, #0
 8005768:	d003      	beq.n	8005772 <DP83848_RegisterBusIO+0x28>
 800576a:	683b      	ldr	r3, [r7, #0]
 800576c:	691b      	ldr	r3, [r3, #16]
 800576e:	2b00      	cmp	r3, #0
 8005770:	d102      	bne.n	8005778 <DP83848_RegisterBusIO+0x2e>
  {
    return DP83848_STATUS_ERROR;
 8005772:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8005776:	e014      	b.n	80057a2 <DP83848_RegisterBusIO+0x58>
  }

  pObj->IO.Init = ioctx->Init;
 8005778:	683b      	ldr	r3, [r7, #0]
 800577a:	681a      	ldr	r2, [r3, #0]
 800577c:	687b      	ldr	r3, [r7, #4]
 800577e:	609a      	str	r2, [r3, #8]
  pObj->IO.DeInit = ioctx->DeInit;
 8005780:	683b      	ldr	r3, [r7, #0]
 8005782:	685a      	ldr	r2, [r3, #4]
 8005784:	687b      	ldr	r3, [r7, #4]
 8005786:	60da      	str	r2, [r3, #12]
  pObj->IO.ReadReg = ioctx->ReadReg;
 8005788:	683b      	ldr	r3, [r7, #0]
 800578a:	68da      	ldr	r2, [r3, #12]
 800578c:	687b      	ldr	r3, [r7, #4]
 800578e:	615a      	str	r2, [r3, #20]
  pObj->IO.WriteReg = ioctx->WriteReg;
 8005790:	683b      	ldr	r3, [r7, #0]
 8005792:	689a      	ldr	r2, [r3, #8]
 8005794:	687b      	ldr	r3, [r7, #4]
 8005796:	611a      	str	r2, [r3, #16]
  pObj->IO.GetTick = ioctx->GetTick;
 8005798:	683b      	ldr	r3, [r7, #0]
 800579a:	691a      	ldr	r2, [r3, #16]
 800579c:	687b      	ldr	r3, [r7, #4]
 800579e:	619a      	str	r2, [r3, #24]

  return DP83848_STATUS_OK;
 80057a0:	2300      	movs	r3, #0
}
 80057a2:	4618      	mov	r0, r3
 80057a4:	370c      	adds	r7, #12
 80057a6:	46bd      	mov	sp, r7
 80057a8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80057ac:	4770      	bx	lr

080057ae <DP83848_Init>:
  * @retval DP83848_STATUS_OK  if OK
  *         DP83848_STATUS_ADDRESS_ERROR if cannot find device address
  *         DP83848_STATUS_READ_ERROR if connot read register
  */
 int32_t DP83848_Init(dp83848_Object_t *pObj)
 {
 80057ae:	b580      	push	{r7, lr}
 80057b0:	b086      	sub	sp, #24
 80057b2:	af00      	add	r7, sp, #0
 80057b4:	6078      	str	r0, [r7, #4]
   uint32_t regvalue = 0, addr = 0;
 80057b6:	2300      	movs	r3, #0
 80057b8:	60fb      	str	r3, [r7, #12]
 80057ba:	2300      	movs	r3, #0
 80057bc:	617b      	str	r3, [r7, #20]
   int32_t status = DP83848_STATUS_OK;
 80057be:	2300      	movs	r3, #0
 80057c0:	613b      	str	r3, [r7, #16]

   if(pObj->Is_Initialized == 0)
 80057c2:	687b      	ldr	r3, [r7, #4]
 80057c4:	685b      	ldr	r3, [r3, #4]
 80057c6:	2b00      	cmp	r3, #0
 80057c8:	d139      	bne.n	800583e <DP83848_Init+0x90>
   {
     if(pObj->IO.Init != 0)
 80057ca:	687b      	ldr	r3, [r7, #4]
 80057cc:	689b      	ldr	r3, [r3, #8]
 80057ce:	2b00      	cmp	r3, #0
 80057d0:	d002      	beq.n	80057d8 <DP83848_Init+0x2a>
     {
       /* GPIO and Clocks initialization */
       pObj->IO.Init();
 80057d2:	687b      	ldr	r3, [r7, #4]
 80057d4:	689b      	ldr	r3, [r3, #8]
 80057d6:	4798      	blx	r3
     }

     /* for later check */
     pObj->DevAddr = DP83848_MAX_DEV_ADDR + 1;
 80057d8:	687b      	ldr	r3, [r7, #4]
 80057da:	2220      	movs	r2, #32
 80057dc:	601a      	str	r2, [r3, #0]

     /* Get the device address from special mode register */
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 80057de:	2300      	movs	r3, #0
 80057e0:	617b      	str	r3, [r7, #20]
 80057e2:	e01c      	b.n	800581e <DP83848_Init+0x70>
     {
       if(pObj->IO.ReadReg(addr, DP83848_SMR, &regvalue) < 0)
 80057e4:	687b      	ldr	r3, [r7, #4]
 80057e6:	695b      	ldr	r3, [r3, #20]
 80057e8:	f107 020c 	add.w	r2, r7, #12
 80057ec:	2119      	movs	r1, #25
 80057ee:	6978      	ldr	r0, [r7, #20]
 80057f0:	4798      	blx	r3
 80057f2:	4603      	mov	r3, r0
 80057f4:	2b00      	cmp	r3, #0
 80057f6:	da03      	bge.n	8005800 <DP83848_Init+0x52>
       {
         status = DP83848_STATUS_READ_ERROR;
 80057f8:	f06f 0304 	mvn.w	r3, #4
 80057fc:	613b      	str	r3, [r7, #16]
         /* Can't read from this device address
            continue with next address */
         continue;
 80057fe:	e00b      	b.n	8005818 <DP83848_Init+0x6a>
       }

       if((regvalue & DP83848_SMR_PHY_ADDR) == addr)
 8005800:	68fb      	ldr	r3, [r7, #12]
 8005802:	f003 031f 	and.w	r3, r3, #31
 8005806:	697a      	ldr	r2, [r7, #20]
 8005808:	429a      	cmp	r2, r3
 800580a:	d105      	bne.n	8005818 <DP83848_Init+0x6a>
       {
         pObj->DevAddr = addr;
 800580c:	687b      	ldr	r3, [r7, #4]
 800580e:	697a      	ldr	r2, [r7, #20]
 8005810:	601a      	str	r2, [r3, #0]
         status = DP83848_STATUS_OK;
 8005812:	2300      	movs	r3, #0
 8005814:	613b      	str	r3, [r7, #16]
         break;
 8005816:	e005      	b.n	8005824 <DP83848_Init+0x76>
     for(addr = 0; addr <= DP83848_MAX_DEV_ADDR; addr ++)
 8005818:	697b      	ldr	r3, [r7, #20]
 800581a:	3301      	adds	r3, #1
 800581c:	617b      	str	r3, [r7, #20]
 800581e:	697b      	ldr	r3, [r7, #20]
 8005820:	2b1f      	cmp	r3, #31
 8005822:	d9df      	bls.n	80057e4 <DP83848_Init+0x36>
       }
     }

     if(pObj->DevAddr > DP83848_MAX_DEV_ADDR)
 8005824:	687b      	ldr	r3, [r7, #4]
 8005826:	681b      	ldr	r3, [r3, #0]
 8005828:	2b1f      	cmp	r3, #31
 800582a:	d902      	bls.n	8005832 <DP83848_Init+0x84>
     {
       status = DP83848_STATUS_ADDRESS_ERROR;
 800582c:	f06f 0302 	mvn.w	r3, #2
 8005830:	613b      	str	r3, [r7, #16]
     }

     /* if device address is matched */
     if(status == DP83848_STATUS_OK)
 8005832:	693b      	ldr	r3, [r7, #16]
 8005834:	2b00      	cmp	r3, #0
 8005836:	d102      	bne.n	800583e <DP83848_Init+0x90>
     {
       pObj->Is_Initialized = 1;
 8005838:	687b      	ldr	r3, [r7, #4]
 800583a:	2201      	movs	r2, #1
 800583c:	605a      	str	r2, [r3, #4]
     }
   }

   return status;
 800583e:	693b      	ldr	r3, [r7, #16]
 }
 8005840:	4618      	mov	r0, r3
 8005842:	3718      	adds	r7, #24
 8005844:	46bd      	mov	sp, r7
 8005846:	bd80      	pop	{r7, pc}

08005848 <DP83848_GetLinkState>:
  *         DP83848_STATUS_10MBITS_HALFDUPLEX  if 10Mb/s HD
  *         DP83848_STATUS_READ_ERROR if connot read register
  *         DP83848_STATUS_WRITE_ERROR if connot write to register
  */
int32_t DP83848_GetLinkState(dp83848_Object_t *pObj)
{
 8005848:	b580      	push	{r7, lr}
 800584a:	b084      	sub	sp, #16
 800584c:	af00      	add	r7, sp, #0
 800584e:	6078      	str	r0, [r7, #4]
  uint32_t readval = 0;
 8005850:	2300      	movs	r3, #0
 8005852:	60fb      	str	r3, [r7, #12]

  /* Read Status register  */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 8005854:	687b      	ldr	r3, [r7, #4]
 8005856:	695b      	ldr	r3, [r3, #20]
 8005858:	687a      	ldr	r2, [r7, #4]
 800585a:	6810      	ldr	r0, [r2, #0]
 800585c:	f107 020c 	add.w	r2, r7, #12
 8005860:	2101      	movs	r1, #1
 8005862:	4798      	blx	r3
 8005864:	4603      	mov	r3, r0
 8005866:	2b00      	cmp	r3, #0
 8005868:	da02      	bge.n	8005870 <DP83848_GetLinkState+0x28>
  {
    return DP83848_STATUS_READ_ERROR;
 800586a:	f06f 0304 	mvn.w	r3, #4
 800586e:	e06e      	b.n	800594e <DP83848_GetLinkState+0x106>
  }

  /* Read Status register again */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BSR, &readval) < 0)
 8005870:	687b      	ldr	r3, [r7, #4]
 8005872:	695b      	ldr	r3, [r3, #20]
 8005874:	687a      	ldr	r2, [r7, #4]
 8005876:	6810      	ldr	r0, [r2, #0]
 8005878:	f107 020c 	add.w	r2, r7, #12
 800587c:	2101      	movs	r1, #1
 800587e:	4798      	blx	r3
 8005880:	4603      	mov	r3, r0
 8005882:	2b00      	cmp	r3, #0
 8005884:	da02      	bge.n	800588c <DP83848_GetLinkState+0x44>
  {
    return DP83848_STATUS_READ_ERROR;
 8005886:	f06f 0304 	mvn.w	r3, #4
 800588a:	e060      	b.n	800594e <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BSR_LINK_STATUS) == 0)
 800588c:	68fb      	ldr	r3, [r7, #12]
 800588e:	f003 0304 	and.w	r3, r3, #4
 8005892:	2b00      	cmp	r3, #0
 8005894:	d101      	bne.n	800589a <DP83848_GetLinkState+0x52>
  {
    /* Return Link Down status */
    return DP83848_STATUS_LINK_DOWN;
 8005896:	2301      	movs	r3, #1
 8005898:	e059      	b.n	800594e <DP83848_GetLinkState+0x106>
  }

  /* Check Auto negotiaition */
  if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_BCR, &readval) < 0)
 800589a:	687b      	ldr	r3, [r7, #4]
 800589c:	695b      	ldr	r3, [r3, #20]
 800589e:	687a      	ldr	r2, [r7, #4]
 80058a0:	6810      	ldr	r0, [r2, #0]
 80058a2:	f107 020c 	add.w	r2, r7, #12
 80058a6:	2100      	movs	r1, #0
 80058a8:	4798      	blx	r3
 80058aa:	4603      	mov	r3, r0
 80058ac:	2b00      	cmp	r3, #0
 80058ae:	da02      	bge.n	80058b6 <DP83848_GetLinkState+0x6e>
  {
    return DP83848_STATUS_READ_ERROR;
 80058b0:	f06f 0304 	mvn.w	r3, #4
 80058b4:	e04b      	b.n	800594e <DP83848_GetLinkState+0x106>
  }

  if((readval & DP83848_BCR_AUTONEGO_EN) != DP83848_BCR_AUTONEGO_EN)
 80058b6:	68fb      	ldr	r3, [r7, #12]
 80058b8:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 80058bc:	2b00      	cmp	r3, #0
 80058be:	d11b      	bne.n	80058f8 <DP83848_GetLinkState+0xb0>
  {
    if(((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT) && ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE))
 80058c0:	68fb      	ldr	r3, [r7, #12]
 80058c2:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 80058c6:	2b00      	cmp	r3, #0
 80058c8:	d006      	beq.n	80058d8 <DP83848_GetLinkState+0x90>
 80058ca:	68fb      	ldr	r3, [r7, #12]
 80058cc:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 80058d0:	2b00      	cmp	r3, #0
 80058d2:	d001      	beq.n	80058d8 <DP83848_GetLinkState+0x90>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 80058d4:	2302      	movs	r3, #2
 80058d6:	e03a      	b.n	800594e <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_SPEED_SELECT) == DP83848_BCR_SPEED_SELECT)
 80058d8:	68fb      	ldr	r3, [r7, #12]
 80058da:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 80058de:	2b00      	cmp	r3, #0
 80058e0:	d001      	beq.n	80058e6 <DP83848_GetLinkState+0x9e>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 80058e2:	2303      	movs	r3, #3
 80058e4:	e033      	b.n	800594e <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_BCR_DUPLEX_MODE) == DP83848_BCR_DUPLEX_MODE)
 80058e6:	68fb      	ldr	r3, [r7, #12]
 80058e8:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 80058ec:	2b00      	cmp	r3, #0
 80058ee:	d001      	beq.n	80058f4 <DP83848_GetLinkState+0xac>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 80058f0:	2304      	movs	r3, #4
 80058f2:	e02c      	b.n	800594e <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 80058f4:	2305      	movs	r3, #5
 80058f6:	e02a      	b.n	800594e <DP83848_GetLinkState+0x106>
    }
  }
  else /* Auto Nego enabled */
  {
    if(pObj->IO.ReadReg(pObj->DevAddr, DP83848_PHYSCSR, &readval) < 0)
 80058f8:	687b      	ldr	r3, [r7, #4]
 80058fa:	695b      	ldr	r3, [r3, #20]
 80058fc:	687a      	ldr	r2, [r7, #4]
 80058fe:	6810      	ldr	r0, [r2, #0]
 8005900:	f107 020c 	add.w	r2, r7, #12
 8005904:	2110      	movs	r1, #16
 8005906:	4798      	blx	r3
 8005908:	4603      	mov	r3, r0
 800590a:	2b00      	cmp	r3, #0
 800590c:	da02      	bge.n	8005914 <DP83848_GetLinkState+0xcc>
    {
      return DP83848_STATUS_READ_ERROR;
 800590e:	f06f 0304 	mvn.w	r3, #4
 8005912:	e01c      	b.n	800594e <DP83848_GetLinkState+0x106>
    }

    /* Check if auto nego not done */
    if((readval & DP83848_PHYSCSR_AUTONEGO_DONE) == 0)
 8005914:	68fb      	ldr	r3, [r7, #12]
 8005916:	f003 0310 	and.w	r3, r3, #16
 800591a:	2b00      	cmp	r3, #0
 800591c:	d101      	bne.n	8005922 <DP83848_GetLinkState+0xda>
    {
      return DP83848_STATUS_AUTONEGO_NOTDONE;
 800591e:	2306      	movs	r3, #6
 8005920:	e015      	b.n	800594e <DP83848_GetLinkState+0x106>
    }

    if((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_FD)
 8005922:	68fb      	ldr	r3, [r7, #12]
 8005924:	f003 0306 	and.w	r3, r3, #6
 8005928:	2b04      	cmp	r3, #4
 800592a:	d101      	bne.n	8005930 <DP83848_GetLinkState+0xe8>
    {
      return DP83848_STATUS_100MBITS_FULLDUPLEX;
 800592c:	2302      	movs	r3, #2
 800592e:	e00e      	b.n	800594e <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_100BTX_HD)
 8005930:	68fb      	ldr	r3, [r7, #12]
 8005932:	f003 0306 	and.w	r3, r3, #6
 8005936:	2b00      	cmp	r3, #0
 8005938:	d101      	bne.n	800593e <DP83848_GetLinkState+0xf6>
    {
      return DP83848_STATUS_100MBITS_HALFDUPLEX;
 800593a:	2303      	movs	r3, #3
 800593c:	e007      	b.n	800594e <DP83848_GetLinkState+0x106>
    }
    else if ((readval & DP83848_PHYSCSR_HCDSPEEDMASK) == DP83848_PHYSCSR_10BT_FD)
 800593e:	68fb      	ldr	r3, [r7, #12]
 8005940:	f003 0306 	and.w	r3, r3, #6
 8005944:	2b06      	cmp	r3, #6
 8005946:	d101      	bne.n	800594c <DP83848_GetLinkState+0x104>
    {
      return DP83848_STATUS_10MBITS_FULLDUPLEX;
 8005948:	2304      	movs	r3, #4
 800594a:	e000      	b.n	800594e <DP83848_GetLinkState+0x106>
    }
    else
    {
      return DP83848_STATUS_10MBITS_HALFDUPLEX;
 800594c:	2305      	movs	r3, #5
    }
  }
}
 800594e:	4618      	mov	r0, r3
 8005950:	3710      	adds	r7, #16
 8005952:	46bd      	mov	sp, r7
 8005954:	bd80      	pop	{r7, pc}
	...

08005958 <HAL_Init>:
  *         need to ensure that the SysTick time base is always set to 1 millisecond
  *         to have correct HAL operation.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_Init(void)
{
 8005958:	b580      	push	{r7, lr}
 800595a:	b082      	sub	sp, #8
 800595c:	af00      	add	r7, sp, #0
   __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL);  /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */
   __HAL_ART_ENABLE();                           /* Enable the Cortex-M4 ART */
#endif /* DUAL_CORE &&  CORE_CM4 */

  /* Set Interrupt Group Priority */
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 800595e:	2003      	movs	r0, #3
 8005960:	f000 f947 	bl	8005bf2 <HAL_NVIC_SetPriorityGrouping>

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 8005964:	f005 fd12 	bl	800b38c <HAL_RCC_GetSysClockFreq>
 8005968:	4602      	mov	r2, r0
 800596a:	4b15      	ldr	r3, [pc, #84]	@ (80059c0 <HAL_Init+0x68>)
 800596c:	699b      	ldr	r3, [r3, #24]
 800596e:	0a1b      	lsrs	r3, r3, #8
 8005970:	f003 030f 	and.w	r3, r3, #15
 8005974:	4913      	ldr	r1, [pc, #76]	@ (80059c4 <HAL_Init+0x6c>)
 8005976:	5ccb      	ldrb	r3, [r1, r3]
 8005978:	f003 031f 	and.w	r3, r3, #31
 800597c:	fa22 f303 	lsr.w	r3, r2, r3
 8005980:	607b      	str	r3, [r7, #4]
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

  /* Update the SystemD2Clock global variable */
#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 8005982:	4b0f      	ldr	r3, [pc, #60]	@ (80059c0 <HAL_Init+0x68>)
 8005984:	699b      	ldr	r3, [r3, #24]
 8005986:	f003 030f 	and.w	r3, r3, #15
 800598a:	4a0e      	ldr	r2, [pc, #56]	@ (80059c4 <HAL_Init+0x6c>)
 800598c:	5cd3      	ldrb	r3, [r2, r3]
 800598e:	f003 031f 	and.w	r3, r3, #31
 8005992:	687a      	ldr	r2, [r7, #4]
 8005994:	fa22 f303 	lsr.w	r3, r2, r3
 8005998:	4a0b      	ldr	r2, [pc, #44]	@ (80059c8 <HAL_Init+0x70>)
 800599a:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800599c:	4a0b      	ldr	r2, [pc, #44]	@ (80059cc <HAL_Init+0x74>)
 800599e:	687b      	ldr	r3, [r7, #4]
 80059a0:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
  if(HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
 80059a2:	200f      	movs	r0, #15
 80059a4:	f7fe fbe6 	bl	8004174 <HAL_InitTick>
 80059a8:	4603      	mov	r3, r0
 80059aa:	2b00      	cmp	r3, #0
 80059ac:	d001      	beq.n	80059b2 <HAL_Init+0x5a>
  {
    return HAL_ERROR;
 80059ae:	2301      	movs	r3, #1
 80059b0:	e002      	b.n	80059b8 <HAL_Init+0x60>
  }

  /* Init the low level hardware */
  HAL_MspInit();
 80059b2:	f7fe f8cf 	bl	8003b54 <HAL_MspInit>

  /* Return function status */
  return HAL_OK;
 80059b6:	2300      	movs	r3, #0
}
 80059b8:	4618      	mov	r0, r3
 80059ba:	3708      	adds	r7, #8
 80059bc:	46bd      	mov	sp, r7
 80059be:	bd80      	pop	{r7, pc}
 80059c0:	58024400 	.word	0x58024400
 80059c4:	08031d0c 	.word	0x08031d0c
 80059c8:	24000010 	.word	0x24000010
 80059cc:	2400000c 	.word	0x2400000c

080059d0 <HAL_IncTick>:
 * @note This function is declared as __weak to be overwritten in case of other
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
 80059d0:	b480      	push	{r7}
 80059d2:	af00      	add	r7, sp, #0
  uwTick += (uint32_t)uwTickFreq;
 80059d4:	4b06      	ldr	r3, [pc, #24]	@ (80059f0 <HAL_IncTick+0x20>)
 80059d6:	781b      	ldrb	r3, [r3, #0]
 80059d8:	461a      	mov	r2, r3
 80059da:	4b06      	ldr	r3, [pc, #24]	@ (80059f4 <HAL_IncTick+0x24>)
 80059dc:	681b      	ldr	r3, [r3, #0]
 80059de:	4413      	add	r3, r2
 80059e0:	4a04      	ldr	r2, [pc, #16]	@ (80059f4 <HAL_IncTick+0x24>)
 80059e2:	6013      	str	r3, [r2, #0]
}
 80059e4:	bf00      	nop
 80059e6:	46bd      	mov	sp, r7
 80059e8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80059ec:	4770      	bx	lr
 80059ee:	bf00      	nop
 80059f0:	24000030 	.word	0x24000030
 80059f4:	24002290 	.word	0x24002290

080059f8 <HAL_GetTick>:
  * @note This function is declared as __weak to be overwritten in case of other
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
 80059f8:	b480      	push	{r7}
 80059fa:	af00      	add	r7, sp, #0
  return uwTick;
 80059fc:	4b03      	ldr	r3, [pc, #12]	@ (8005a0c <HAL_GetTick+0x14>)
 80059fe:	681b      	ldr	r3, [r3, #0]
}
 8005a00:	4618      	mov	r0, r3
 8005a02:	46bd      	mov	sp, r7
 8005a04:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005a08:	4770      	bx	lr
 8005a0a:	bf00      	nop
 8005a0c:	24002290 	.word	0x24002290

08005a10 <HAL_Delay>:
  *       implementations in user file.
  * @param Delay  specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 8005a10:	b580      	push	{r7, lr}
 8005a12:	b084      	sub	sp, #16
 8005a14:	af00      	add	r7, sp, #0
 8005a16:	6078      	str	r0, [r7, #4]
  uint32_t tickstart = HAL_GetTick();
 8005a18:	f7ff ffee 	bl	80059f8 <HAL_GetTick>
 8005a1c:	60b8      	str	r0, [r7, #8]
  uint32_t wait = Delay;
 8005a1e:	687b      	ldr	r3, [r7, #4]
 8005a20:	60fb      	str	r3, [r7, #12]

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 8005a22:	68fb      	ldr	r3, [r7, #12]
 8005a24:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8005a28:	d005      	beq.n	8005a36 <HAL_Delay+0x26>
  {
    wait += (uint32_t)(uwTickFreq);
 8005a2a:	4b0a      	ldr	r3, [pc, #40]	@ (8005a54 <HAL_Delay+0x44>)
 8005a2c:	781b      	ldrb	r3, [r3, #0]
 8005a2e:	461a      	mov	r2, r3
 8005a30:	68fb      	ldr	r3, [r7, #12]
 8005a32:	4413      	add	r3, r2
 8005a34:	60fb      	str	r3, [r7, #12]
  }

  while ((HAL_GetTick() - tickstart) < wait)
 8005a36:	bf00      	nop
 8005a38:	f7ff ffde 	bl	80059f8 <HAL_GetTick>
 8005a3c:	4602      	mov	r2, r0
 8005a3e:	68bb      	ldr	r3, [r7, #8]
 8005a40:	1ad3      	subs	r3, r2, r3
 8005a42:	68fa      	ldr	r2, [r7, #12]
 8005a44:	429a      	cmp	r2, r3
 8005a46:	d8f7      	bhi.n	8005a38 <HAL_Delay+0x28>
  {
  }
}
 8005a48:	bf00      	nop
 8005a4a:	bf00      	nop
 8005a4c:	3710      	adds	r7, #16
 8005a4e:	46bd      	mov	sp, r7
 8005a50:	bd80      	pop	{r7, pc}
 8005a52:	bf00      	nop
 8005a54:	24000030 	.word	0x24000030

08005a58 <HAL_GetREVID>:
/**
  * @brief  Returns the device revision identifier.
  * @retval Device revision identifier
  */
uint32_t HAL_GetREVID(void)
{
 8005a58:	b480      	push	{r7}
 8005a5a:	af00      	add	r7, sp, #0
   return((DBGMCU->IDCODE) >> 16);
 8005a5c:	4b03      	ldr	r3, [pc, #12]	@ (8005a6c <HAL_GetREVID+0x14>)
 8005a5e:	681b      	ldr	r3, [r3, #0]
 8005a60:	0c1b      	lsrs	r3, r3, #16
}
 8005a62:	4618      	mov	r0, r3
 8005a64:	46bd      	mov	sp, r7
 8005a66:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005a6a:	4770      	bx	lr
 8005a6c:	5c001000 	.word	0x5c001000

08005a70 <HAL_SYSCFG_ETHInterfaceSelect>:
  *   @arg SYSCFG_ETH_MII : Select the Media Independent Interface
  *   @arg SYSCFG_ETH_RMII: Select the Reduced Media Independent Interface
  * @retval None
  */
void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface)
{
 8005a70:	b480      	push	{r7}
 8005a72:	b083      	sub	sp, #12
 8005a74:	af00      	add	r7, sp, #0
 8005a76:	6078      	str	r0, [r7, #4]
  /* Check the parameter */
  assert_param(IS_SYSCFG_ETHERNET_CONFIG(SYSCFG_ETHInterface));

  MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface));
 8005a78:	4b06      	ldr	r3, [pc, #24]	@ (8005a94 <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 8005a7a:	685b      	ldr	r3, [r3, #4]
 8005a7c:	f423 0260 	bic.w	r2, r3, #14680064	@ 0xe00000
 8005a80:	4904      	ldr	r1, [pc, #16]	@ (8005a94 <HAL_SYSCFG_ETHInterfaceSelect+0x24>)
 8005a82:	687b      	ldr	r3, [r7, #4]
 8005a84:	4313      	orrs	r3, r2
 8005a86:	604b      	str	r3, [r1, #4]
}
 8005a88:	bf00      	nop
 8005a8a:	370c      	adds	r7, #12
 8005a8c:	46bd      	mov	sp, r7
 8005a8e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005a92:	4770      	bx	lr
 8005a94:	58000400 	.word	0x58000400

08005a98 <__NVIC_SetPriorityGrouping>:
{
 8005a98:	b480      	push	{r7}
 8005a9a:	b085      	sub	sp, #20
 8005a9c:	af00      	add	r7, sp, #0
 8005a9e:	6078      	str	r0, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 8005aa0:	687b      	ldr	r3, [r7, #4]
 8005aa2:	f003 0307 	and.w	r3, r3, #7
 8005aa6:	60fb      	str	r3, [r7, #12]
  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8005aa8:	4b0b      	ldr	r3, [pc, #44]	@ (8005ad8 <__NVIC_SetPriorityGrouping+0x40>)
 8005aaa:	68db      	ldr	r3, [r3, #12]
 8005aac:	60bb      	str	r3, [r7, #8]
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 8005aae:	68ba      	ldr	r2, [r7, #8]
 8005ab0:	f64f 03ff 	movw	r3, #63743	@ 0xf8ff
 8005ab4:	4013      	ands	r3, r2
 8005ab6:	60bb      	str	r3, [r7, #8]
                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
 8005ab8:	68fb      	ldr	r3, [r7, #12]
 8005aba:	021a      	lsls	r2, r3, #8
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
 8005abc:	68bb      	ldr	r3, [r7, #8]
 8005abe:	431a      	orrs	r2, r3
  reg_value  =  (reg_value                                   |
 8005ac0:	4b06      	ldr	r3, [pc, #24]	@ (8005adc <__NVIC_SetPriorityGrouping+0x44>)
 8005ac2:	4313      	orrs	r3, r2
 8005ac4:	60bb      	str	r3, [r7, #8]
  SCB->AIRCR =  reg_value;
 8005ac6:	4a04      	ldr	r2, [pc, #16]	@ (8005ad8 <__NVIC_SetPriorityGrouping+0x40>)
 8005ac8:	68bb      	ldr	r3, [r7, #8]
 8005aca:	60d3      	str	r3, [r2, #12]
}
 8005acc:	bf00      	nop
 8005ace:	3714      	adds	r7, #20
 8005ad0:	46bd      	mov	sp, r7
 8005ad2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005ad6:	4770      	bx	lr
 8005ad8:	e000ed00 	.word	0xe000ed00
 8005adc:	05fa0000 	.word	0x05fa0000

08005ae0 <__NVIC_GetPriorityGrouping>:
{
 8005ae0:	b480      	push	{r7}
 8005ae2:	af00      	add	r7, sp, #0
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8005ae4:	4b04      	ldr	r3, [pc, #16]	@ (8005af8 <__NVIC_GetPriorityGrouping+0x18>)
 8005ae6:	68db      	ldr	r3, [r3, #12]
 8005ae8:	0a1b      	lsrs	r3, r3, #8
 8005aea:	f003 0307 	and.w	r3, r3, #7
}
 8005aee:	4618      	mov	r0, r3
 8005af0:	46bd      	mov	sp, r7
 8005af2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005af6:	4770      	bx	lr
 8005af8:	e000ed00 	.word	0xe000ed00

08005afc <__NVIC_EnableIRQ>:
{
 8005afc:	b480      	push	{r7}
 8005afe:	b083      	sub	sp, #12
 8005b00:	af00      	add	r7, sp, #0
 8005b02:	4603      	mov	r3, r0
 8005b04:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 8005b06:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005b0a:	2b00      	cmp	r3, #0
 8005b0c:	db0b      	blt.n	8005b26 <__NVIC_EnableIRQ+0x2a>
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
 8005b0e:	88fb      	ldrh	r3, [r7, #6]
 8005b10:	f003 021f 	and.w	r2, r3, #31
 8005b14:	4907      	ldr	r1, [pc, #28]	@ (8005b34 <__NVIC_EnableIRQ+0x38>)
 8005b16:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005b1a:	095b      	lsrs	r3, r3, #5
 8005b1c:	2001      	movs	r0, #1
 8005b1e:	fa00 f202 	lsl.w	r2, r0, r2
 8005b22:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
}
 8005b26:	bf00      	nop
 8005b28:	370c      	adds	r7, #12
 8005b2a:	46bd      	mov	sp, r7
 8005b2c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005b30:	4770      	bx	lr
 8005b32:	bf00      	nop
 8005b34:	e000e100 	.word	0xe000e100

08005b38 <__NVIC_SetPriority>:
{
 8005b38:	b480      	push	{r7}
 8005b3a:	b083      	sub	sp, #12
 8005b3c:	af00      	add	r7, sp, #0
 8005b3e:	4603      	mov	r3, r0
 8005b40:	6039      	str	r1, [r7, #0]
 8005b42:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 8005b44:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005b48:	2b00      	cmp	r3, #0
 8005b4a:	db0a      	blt.n	8005b62 <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005b4c:	683b      	ldr	r3, [r7, #0]
 8005b4e:	b2da      	uxtb	r2, r3
 8005b50:	490c      	ldr	r1, [pc, #48]	@ (8005b84 <__NVIC_SetPriority+0x4c>)
 8005b52:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005b56:	0112      	lsls	r2, r2, #4
 8005b58:	b2d2      	uxtb	r2, r2
 8005b5a:	440b      	add	r3, r1
 8005b5c:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 8005b60:	e00a      	b.n	8005b78 <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 8005b62:	683b      	ldr	r3, [r7, #0]
 8005b64:	b2da      	uxtb	r2, r3
 8005b66:	4908      	ldr	r1, [pc, #32]	@ (8005b88 <__NVIC_SetPriority+0x50>)
 8005b68:	88fb      	ldrh	r3, [r7, #6]
 8005b6a:	f003 030f 	and.w	r3, r3, #15
 8005b6e:	3b04      	subs	r3, #4
 8005b70:	0112      	lsls	r2, r2, #4
 8005b72:	b2d2      	uxtb	r2, r2
 8005b74:	440b      	add	r3, r1
 8005b76:	761a      	strb	r2, [r3, #24]
}
 8005b78:	bf00      	nop
 8005b7a:	370c      	adds	r7, #12
 8005b7c:	46bd      	mov	sp, r7
 8005b7e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005b82:	4770      	bx	lr
 8005b84:	e000e100 	.word	0xe000e100
 8005b88:	e000ed00 	.word	0xe000ed00

08005b8c <NVIC_EncodePriority>:
{
 8005b8c:	b480      	push	{r7}
 8005b8e:	b089      	sub	sp, #36	@ 0x24
 8005b90:	af00      	add	r7, sp, #0
 8005b92:	60f8      	str	r0, [r7, #12]
 8005b94:	60b9      	str	r1, [r7, #8]
 8005b96:	607a      	str	r2, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
 8005b98:	68fb      	ldr	r3, [r7, #12]
 8005b9a:	f003 0307 	and.w	r3, r3, #7
 8005b9e:	61fb      	str	r3, [r7, #28]
  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8005ba0:	69fb      	ldr	r3, [r7, #28]
 8005ba2:	f1c3 0307 	rsb	r3, r3, #7
 8005ba6:	2b04      	cmp	r3, #4
 8005ba8:	bf28      	it	cs
 8005baa:	2304      	movcs	r3, #4
 8005bac:	61bb      	str	r3, [r7, #24]
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 8005bae:	69fb      	ldr	r3, [r7, #28]
 8005bb0:	3304      	adds	r3, #4
 8005bb2:	2b06      	cmp	r3, #6
 8005bb4:	d902      	bls.n	8005bbc <NVIC_EncodePriority+0x30>
 8005bb6:	69fb      	ldr	r3, [r7, #28]
 8005bb8:	3b03      	subs	r3, #3
 8005bba:	e000      	b.n	8005bbe <NVIC_EncodePriority+0x32>
 8005bbc:	2300      	movs	r3, #0
 8005bbe:	617b      	str	r3, [r7, #20]
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005bc0:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8005bc4:	69bb      	ldr	r3, [r7, #24]
 8005bc6:	fa02 f303 	lsl.w	r3, r2, r3
 8005bca:	43da      	mvns	r2, r3
 8005bcc:	68bb      	ldr	r3, [r7, #8]
 8005bce:	401a      	ands	r2, r3
 8005bd0:	697b      	ldr	r3, [r7, #20]
 8005bd2:	409a      	lsls	r2, r3
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8005bd4:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8005bd8:	697b      	ldr	r3, [r7, #20]
 8005bda:	fa01 f303 	lsl.w	r3, r1, r3
 8005bde:	43d9      	mvns	r1, r3
 8005be0:	687b      	ldr	r3, [r7, #4]
 8005be2:	400b      	ands	r3, r1
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8005be4:	4313      	orrs	r3, r2
}
 8005be6:	4618      	mov	r0, r3
 8005be8:	3724      	adds	r7, #36	@ 0x24
 8005bea:	46bd      	mov	sp, r7
 8005bec:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005bf0:	4770      	bx	lr

08005bf2 <HAL_NVIC_SetPriorityGrouping>:
  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
  *         The pending IRQ priority will be managed only by the subpriority.
  * @retval None
  */
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
 8005bf2:	b580      	push	{r7, lr}
 8005bf4:	b082      	sub	sp, #8
 8005bf6:	af00      	add	r7, sp, #0
 8005bf8:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));

  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
  NVIC_SetPriorityGrouping(PriorityGroup);
 8005bfa:	6878      	ldr	r0, [r7, #4]
 8005bfc:	f7ff ff4c 	bl	8005a98 <__NVIC_SetPriorityGrouping>
}
 8005c00:	bf00      	nop
 8005c02:	3708      	adds	r7, #8
 8005c04:	46bd      	mov	sp, r7
 8005c06:	bd80      	pop	{r7, pc}

08005c08 <HAL_NVIC_SetPriority>:
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
 8005c08:	b580      	push	{r7, lr}
 8005c0a:	b086      	sub	sp, #24
 8005c0c:	af00      	add	r7, sp, #0
 8005c0e:	4603      	mov	r3, r0
 8005c10:	60b9      	str	r1, [r7, #8]
 8005c12:	607a      	str	r2, [r7, #4]
 8005c14:	81fb      	strh	r3, [r7, #14]

  /* Check the parameters */
  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));

  prioritygroup = NVIC_GetPriorityGrouping();
 8005c16:	f7ff ff63 	bl	8005ae0 <__NVIC_GetPriorityGrouping>
 8005c1a:	6178      	str	r0, [r7, #20]

  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
 8005c1c:	687a      	ldr	r2, [r7, #4]
 8005c1e:	68b9      	ldr	r1, [r7, #8]
 8005c20:	6978      	ldr	r0, [r7, #20]
 8005c22:	f7ff ffb3 	bl	8005b8c <NVIC_EncodePriority>
 8005c26:	4602      	mov	r2, r0
 8005c28:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 8005c2c:	4611      	mov	r1, r2
 8005c2e:	4618      	mov	r0, r3
 8005c30:	f7ff ff82 	bl	8005b38 <__NVIC_SetPriority>
}
 8005c34:	bf00      	nop
 8005c36:	3718      	adds	r7, #24
 8005c38:	46bd      	mov	sp, r7
 8005c3a:	bd80      	pop	{r7, pc}

08005c3c <HAL_NVIC_EnableIRQ>:
  *         This parameter can be an enumerator of IRQn_Type enumeration
  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32h7xxxx.h))
  * @retval None
  */
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
 8005c3c:	b580      	push	{r7, lr}
 8005c3e:	b082      	sub	sp, #8
 8005c40:	af00      	add	r7, sp, #0
 8005c42:	4603      	mov	r3, r0
 8005c44:	80fb      	strh	r3, [r7, #6]
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));

  /* Enable interrupt */
  NVIC_EnableIRQ(IRQn);
 8005c46:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 8005c4a:	4618      	mov	r0, r3
 8005c4c:	f7ff ff56 	bl	8005afc <__NVIC_EnableIRQ>
}
 8005c50:	bf00      	nop
 8005c52:	3708      	adds	r7, #8
 8005c54:	46bd      	mov	sp, r7
 8005c56:	bd80      	pop	{r7, pc}

08005c58 <HAL_MPU_Disable>:
/**
  * @brief  Disables the MPU
  * @retval None
  */
void HAL_MPU_Disable(void)
{
 8005c58:	b480      	push	{r7}
 8005c5a:	af00      	add	r7, sp, #0
  \details Ensures the apparent order of the explicit memory operations before
           and after the instruction, without ensuring their completion.
 */
__STATIC_FORCEINLINE void __DMB(void)
{
  __ASM volatile ("dmb 0xF":::"memory");
 8005c5c:	f3bf 8f5f 	dmb	sy
}
 8005c60:	bf00      	nop
  /* Make sure outstanding transfers are done */
  __DMB();

  /* Disable fault exceptions */
  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
 8005c62:	4b07      	ldr	r3, [pc, #28]	@ (8005c80 <HAL_MPU_Disable+0x28>)
 8005c64:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8005c66:	4a06      	ldr	r2, [pc, #24]	@ (8005c80 <HAL_MPU_Disable+0x28>)
 8005c68:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 8005c6c:	6253      	str	r3, [r2, #36]	@ 0x24

  /* Disable the MPU and clear the control register*/
  MPU->CTRL = 0;
 8005c6e:	4b05      	ldr	r3, [pc, #20]	@ (8005c84 <HAL_MPU_Disable+0x2c>)
 8005c70:	2200      	movs	r2, #0
 8005c72:	605a      	str	r2, [r3, #4]
}
 8005c74:	bf00      	nop
 8005c76:	46bd      	mov	sp, r7
 8005c78:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005c7c:	4770      	bx	lr
 8005c7e:	bf00      	nop
 8005c80:	e000ed00 	.word	0xe000ed00
 8005c84:	e000ed90 	.word	0xe000ed90

08005c88 <HAL_MPU_Enable>:
  *            @arg MPU_PRIVILEGED_DEFAULT
  *            @arg MPU_HFNMI_PRIVDEF
  * @retval None
  */
void HAL_MPU_Enable(uint32_t MPU_Control)
{
 8005c88:	b480      	push	{r7}
 8005c8a:	b083      	sub	sp, #12
 8005c8c:	af00      	add	r7, sp, #0
 8005c8e:	6078      	str	r0, [r7, #4]
  /* Enable the MPU */
  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 8005c90:	4a0b      	ldr	r2, [pc, #44]	@ (8005cc0 <HAL_MPU_Enable+0x38>)
 8005c92:	687b      	ldr	r3, [r7, #4]
 8005c94:	f043 0301 	orr.w	r3, r3, #1
 8005c98:	6053      	str	r3, [r2, #4]

  /* Enable fault exceptions */
  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
 8005c9a:	4b0a      	ldr	r3, [pc, #40]	@ (8005cc4 <HAL_MPU_Enable+0x3c>)
 8005c9c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8005c9e:	4a09      	ldr	r2, [pc, #36]	@ (8005cc4 <HAL_MPU_Enable+0x3c>)
 8005ca0:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8005ca4:	6253      	str	r3, [r2, #36]	@ 0x24
  __ASM volatile ("dsb 0xF":::"memory");
 8005ca6:	f3bf 8f4f 	dsb	sy
}
 8005caa:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8005cac:	f3bf 8f6f 	isb	sy
}
 8005cb0:	bf00      	nop

  /* Ensure MPU setting take effects */
  __DSB();
  __ISB();
}
 8005cb2:	bf00      	nop
 8005cb4:	370c      	adds	r7, #12
 8005cb6:	46bd      	mov	sp, r7
 8005cb8:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005cbc:	4770      	bx	lr
 8005cbe:	bf00      	nop
 8005cc0:	e000ed90 	.word	0xe000ed90
 8005cc4:	e000ed00 	.word	0xe000ed00

08005cc8 <HAL_MPU_ConfigRegion>:
  * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
  *                the initialization and configuration information.
  * @retval None
  */
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
{
 8005cc8:	b480      	push	{r7}
 8005cca:	b083      	sub	sp, #12
 8005ccc:	af00      	add	r7, sp, #0
 8005cce:	6078      	str	r0, [r7, #4]
  assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
  assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
  assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));

  /* Set the Region number */
  MPU->RNR = MPU_Init->Number;
 8005cd0:	687b      	ldr	r3, [r7, #4]
 8005cd2:	785a      	ldrb	r2, [r3, #1]
 8005cd4:	4b1b      	ldr	r3, [pc, #108]	@ (8005d44 <HAL_MPU_ConfigRegion+0x7c>)
 8005cd6:	609a      	str	r2, [r3, #8]

  /* Disable the Region */
  CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk);
 8005cd8:	4b1a      	ldr	r3, [pc, #104]	@ (8005d44 <HAL_MPU_ConfigRegion+0x7c>)
 8005cda:	691b      	ldr	r3, [r3, #16]
 8005cdc:	4a19      	ldr	r2, [pc, #100]	@ (8005d44 <HAL_MPU_ConfigRegion+0x7c>)
 8005cde:	f023 0301 	bic.w	r3, r3, #1
 8005ce2:	6113      	str	r3, [r2, #16]

  /* Apply configuration */
  MPU->RBAR = MPU_Init->BaseAddress;
 8005ce4:	4a17      	ldr	r2, [pc, #92]	@ (8005d44 <HAL_MPU_ConfigRegion+0x7c>)
 8005ce6:	687b      	ldr	r3, [r7, #4]
 8005ce8:	685b      	ldr	r3, [r3, #4]
 8005cea:	60d3      	str	r3, [r2, #12]
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005cec:	687b      	ldr	r3, [r7, #4]
 8005cee:	7b1b      	ldrb	r3, [r3, #12]
 8005cf0:	071a      	lsls	r2, r3, #28
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 8005cf2:	687b      	ldr	r3, [r7, #4]
 8005cf4:	7adb      	ldrb	r3, [r3, #11]
 8005cf6:	061b      	lsls	r3, r3, #24
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005cf8:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 8005cfa:	687b      	ldr	r3, [r7, #4]
 8005cfc:	7a9b      	ldrb	r3, [r3, #10]
 8005cfe:	04db      	lsls	r3, r3, #19
              ((uint32_t)MPU_Init->AccessPermission        << MPU_RASR_AP_Pos)   |
 8005d00:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 8005d02:	687b      	ldr	r3, [r7, #4]
 8005d04:	7b5b      	ldrb	r3, [r3, #13]
 8005d06:	049b      	lsls	r3, r3, #18
              ((uint32_t)MPU_Init->TypeExtField            << MPU_RASR_TEX_Pos)  |
 8005d08:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 8005d0a:	687b      	ldr	r3, [r7, #4]
 8005d0c:	7b9b      	ldrb	r3, [r3, #14]
 8005d0e:	045b      	lsls	r3, r3, #17
              ((uint32_t)MPU_Init->IsShareable             << MPU_RASR_S_Pos)    |
 8005d10:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 8005d12:	687b      	ldr	r3, [r7, #4]
 8005d14:	7bdb      	ldrb	r3, [r3, #15]
 8005d16:	041b      	lsls	r3, r3, #16
              ((uint32_t)MPU_Init->IsCacheable             << MPU_RASR_C_Pos)    |
 8005d18:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 8005d1a:	687b      	ldr	r3, [r7, #4]
 8005d1c:	7a5b      	ldrb	r3, [r3, #9]
 8005d1e:	021b      	lsls	r3, r3, #8
              ((uint32_t)MPU_Init->IsBufferable            << MPU_RASR_B_Pos)    |
 8005d20:	431a      	orrs	r2, r3
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 8005d22:	687b      	ldr	r3, [r7, #4]
 8005d24:	7a1b      	ldrb	r3, [r3, #8]
 8005d26:	005b      	lsls	r3, r3, #1
              ((uint32_t)MPU_Init->SubRegionDisable        << MPU_RASR_SRD_Pos)  |
 8005d28:	4313      	orrs	r3, r2
              ((uint32_t)MPU_Init->Enable                  << MPU_RASR_ENABLE_Pos);
 8005d2a:	687a      	ldr	r2, [r7, #4]
 8005d2c:	7812      	ldrb	r2, [r2, #0]
 8005d2e:	4611      	mov	r1, r2
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005d30:	4a04      	ldr	r2, [pc, #16]	@ (8005d44 <HAL_MPU_ConfigRegion+0x7c>)
              ((uint32_t)MPU_Init->Size                    << MPU_RASR_SIZE_Pos) |
 8005d32:	430b      	orrs	r3, r1
  MPU->RASR = ((uint32_t)MPU_Init->DisableExec             << MPU_RASR_XN_Pos)   |
 8005d34:	6113      	str	r3, [r2, #16]
}
 8005d36:	bf00      	nop
 8005d38:	370c      	adds	r7, #12
 8005d3a:	46bd      	mov	sp, r7
 8005d3c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005d40:	4770      	bx	lr
 8005d42:	bf00      	nop
 8005d44:	e000ed90 	.word	0xe000ed90

08005d48 <HAL_CRC_Init>:
  *         parameters in the CRC_InitTypeDef and create the associated handle.
  * @param  hcrc CRC handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc)
{
 8005d48:	b580      	push	{r7, lr}
 8005d4a:	b082      	sub	sp, #8
 8005d4c:	af00      	add	r7, sp, #0
 8005d4e:	6078      	str	r0, [r7, #4]
  /* Check the CRC handle allocation */
  if (hcrc == NULL)
 8005d50:	687b      	ldr	r3, [r7, #4]
 8005d52:	2b00      	cmp	r3, #0
 8005d54:	d101      	bne.n	8005d5a <HAL_CRC_Init+0x12>
  {
    return HAL_ERROR;
 8005d56:	2301      	movs	r3, #1
 8005d58:	e054      	b.n	8005e04 <HAL_CRC_Init+0xbc>
  }

  /* Check the parameters */
  assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance));

  if (hcrc->State == HAL_CRC_STATE_RESET)
 8005d5a:	687b      	ldr	r3, [r7, #4]
 8005d5c:	7f5b      	ldrb	r3, [r3, #29]
 8005d5e:	b2db      	uxtb	r3, r3
 8005d60:	2b00      	cmp	r3, #0
 8005d62:	d105      	bne.n	8005d70 <HAL_CRC_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hcrc->Lock = HAL_UNLOCKED;
 8005d64:	687b      	ldr	r3, [r7, #4]
 8005d66:	2200      	movs	r2, #0
 8005d68:	771a      	strb	r2, [r3, #28]
    /* Init the low level hardware */
    HAL_CRC_MspInit(hcrc);
 8005d6a:	6878      	ldr	r0, [r7, #4]
 8005d6c:	f7fd ff3a 	bl	8003be4 <HAL_CRC_MspInit>
  }

  hcrc->State = HAL_CRC_STATE_BUSY;
 8005d70:	687b      	ldr	r3, [r7, #4]
 8005d72:	2202      	movs	r2, #2
 8005d74:	775a      	strb	r2, [r3, #29]

  /* check whether or not non-default generating polynomial has been
   * picked up by user */
  assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse));
  if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE)
 8005d76:	687b      	ldr	r3, [r7, #4]
 8005d78:	791b      	ldrb	r3, [r3, #4]
 8005d7a:	2b00      	cmp	r3, #0
 8005d7c:	d10c      	bne.n	8005d98 <HAL_CRC_Init+0x50>
  {
    /* initialize peripheral with default generating polynomial */
    WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY);
 8005d7e:	687b      	ldr	r3, [r7, #4]
 8005d80:	681b      	ldr	r3, [r3, #0]
 8005d82:	4a22      	ldr	r2, [pc, #136]	@ (8005e0c <HAL_CRC_Init+0xc4>)
 8005d84:	615a      	str	r2, [r3, #20]
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B);
 8005d86:	687b      	ldr	r3, [r7, #4]
 8005d88:	681b      	ldr	r3, [r3, #0]
 8005d8a:	689a      	ldr	r2, [r3, #8]
 8005d8c:	687b      	ldr	r3, [r7, #4]
 8005d8e:	681b      	ldr	r3, [r3, #0]
 8005d90:	f022 0218 	bic.w	r2, r2, #24
 8005d94:	609a      	str	r2, [r3, #8]
 8005d96:	e00c      	b.n	8005db2 <HAL_CRC_Init+0x6a>
  }
  else
  {
    /* initialize CRC peripheral with generating polynomial defined by user */
    if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK)
 8005d98:	687b      	ldr	r3, [r7, #4]
 8005d9a:	6899      	ldr	r1, [r3, #8]
 8005d9c:	687b      	ldr	r3, [r7, #4]
 8005d9e:	68db      	ldr	r3, [r3, #12]
 8005da0:	461a      	mov	r2, r3
 8005da2:	6878      	ldr	r0, [r7, #4]
 8005da4:	f000 f948 	bl	8006038 <HAL_CRCEx_Polynomial_Set>
 8005da8:	4603      	mov	r3, r0
 8005daa:	2b00      	cmp	r3, #0
 8005dac:	d001      	beq.n	8005db2 <HAL_CRC_Init+0x6a>
    {
      return HAL_ERROR;
 8005dae:	2301      	movs	r3, #1
 8005db0:	e028      	b.n	8005e04 <HAL_CRC_Init+0xbc>
  }

  /* check whether or not non-default CRC initial value has been
   * picked up by user */
  assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse));
  if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE)
 8005db2:	687b      	ldr	r3, [r7, #4]
 8005db4:	795b      	ldrb	r3, [r3, #5]
 8005db6:	2b00      	cmp	r3, #0
 8005db8:	d105      	bne.n	8005dc6 <HAL_CRC_Init+0x7e>
  {
    WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE);
 8005dba:	687b      	ldr	r3, [r7, #4]
 8005dbc:	681b      	ldr	r3, [r3, #0]
 8005dbe:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8005dc2:	611a      	str	r2, [r3, #16]
 8005dc4:	e004      	b.n	8005dd0 <HAL_CRC_Init+0x88>
  }
  else
  {
    WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue);
 8005dc6:	687b      	ldr	r3, [r7, #4]
 8005dc8:	681b      	ldr	r3, [r3, #0]
 8005dca:	687a      	ldr	r2, [r7, #4]
 8005dcc:	6912      	ldr	r2, [r2, #16]
 8005dce:	611a      	str	r2, [r3, #16]
  }


  /* set input data inversion mode */
  assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode);
 8005dd0:	687b      	ldr	r3, [r7, #4]
 8005dd2:	681b      	ldr	r3, [r3, #0]
 8005dd4:	689b      	ldr	r3, [r3, #8]
 8005dd6:	f023 0160 	bic.w	r1, r3, #96	@ 0x60
 8005dda:	687b      	ldr	r3, [r7, #4]
 8005ddc:	695a      	ldr	r2, [r3, #20]
 8005dde:	687b      	ldr	r3, [r7, #4]
 8005de0:	681b      	ldr	r3, [r3, #0]
 8005de2:	430a      	orrs	r2, r1
 8005de4:	609a      	str	r2, [r3, #8]

  /* set output data inversion mode */
  assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode));
  MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode);
 8005de6:	687b      	ldr	r3, [r7, #4]
 8005de8:	681b      	ldr	r3, [r3, #0]
 8005dea:	689b      	ldr	r3, [r3, #8]
 8005dec:	f023 0180 	bic.w	r1, r3, #128	@ 0x80
 8005df0:	687b      	ldr	r3, [r7, #4]
 8005df2:	699a      	ldr	r2, [r3, #24]
 8005df4:	687b      	ldr	r3, [r7, #4]
 8005df6:	681b      	ldr	r3, [r3, #0]
 8005df8:	430a      	orrs	r2, r1
 8005dfa:	609a      	str	r2, [r3, #8]
  /* makes sure the input data format (bytes, halfwords or words stream)
   * is properly specified by user */
  assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat));

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 8005dfc:	687b      	ldr	r3, [r7, #4]
 8005dfe:	2201      	movs	r2, #1
 8005e00:	775a      	strb	r2, [r3, #29]

  /* Return function status */
  return HAL_OK;
 8005e02:	2300      	movs	r3, #0
}
 8005e04:	4618      	mov	r0, r3
 8005e06:	3708      	adds	r7, #8
 8005e08:	46bd      	mov	sp, r7
 8005e0a:	bd80      	pop	{r7, pc}
 8005e0c:	04c11db7 	.word	0x04c11db7

08005e10 <HAL_CRC_Calculate>:
  *        and the API will internally adjust its input data processing based on the
  *        handle field hcrc->InputDataFormat.
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength)
{
 8005e10:	b580      	push	{r7, lr}
 8005e12:	b086      	sub	sp, #24
 8005e14:	af00      	add	r7, sp, #0
 8005e16:	60f8      	str	r0, [r7, #12]
 8005e18:	60b9      	str	r1, [r7, #8]
 8005e1a:	607a      	str	r2, [r7, #4]
  uint32_t index;      /* CRC input data buffer index */
  uint32_t temp = 0U;  /* CRC output (read from hcrc->Instance->DR register) */
 8005e1c:	2300      	movs	r3, #0
 8005e1e:	613b      	str	r3, [r7, #16]

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_BUSY;
 8005e20:	68fb      	ldr	r3, [r7, #12]
 8005e22:	2202      	movs	r2, #2
 8005e24:	775a      	strb	r2, [r3, #29]

  /* Reset CRC Calculation Unit (hcrc->Instance->INIT is
  *  written in hcrc->Instance->DR) */
  __HAL_CRC_DR_RESET(hcrc);
 8005e26:	68fb      	ldr	r3, [r7, #12]
 8005e28:	681b      	ldr	r3, [r3, #0]
 8005e2a:	689a      	ldr	r2, [r3, #8]
 8005e2c:	68fb      	ldr	r3, [r7, #12]
 8005e2e:	681b      	ldr	r3, [r3, #0]
 8005e30:	f042 0201 	orr.w	r2, r2, #1
 8005e34:	609a      	str	r2, [r3, #8]

  switch (hcrc->InputDataFormat)
 8005e36:	68fb      	ldr	r3, [r7, #12]
 8005e38:	6a1b      	ldr	r3, [r3, #32]
 8005e3a:	2b03      	cmp	r3, #3
 8005e3c:	d006      	beq.n	8005e4c <HAL_CRC_Calculate+0x3c>
 8005e3e:	2b03      	cmp	r3, #3
 8005e40:	d829      	bhi.n	8005e96 <HAL_CRC_Calculate+0x86>
 8005e42:	2b01      	cmp	r3, #1
 8005e44:	d019      	beq.n	8005e7a <HAL_CRC_Calculate+0x6a>
 8005e46:	2b02      	cmp	r3, #2
 8005e48:	d01e      	beq.n	8005e88 <HAL_CRC_Calculate+0x78>
      /* Specific 16-bit input data handling  */
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
      break;

    default:
      break;
 8005e4a:	e024      	b.n	8005e96 <HAL_CRC_Calculate+0x86>
      for (index = 0U; index < BufferLength; index++)
 8005e4c:	2300      	movs	r3, #0
 8005e4e:	617b      	str	r3, [r7, #20]
 8005e50:	e00a      	b.n	8005e68 <HAL_CRC_Calculate+0x58>
        hcrc->Instance->DR = pBuffer[index];
 8005e52:	697b      	ldr	r3, [r7, #20]
 8005e54:	009b      	lsls	r3, r3, #2
 8005e56:	68ba      	ldr	r2, [r7, #8]
 8005e58:	441a      	add	r2, r3
 8005e5a:	68fb      	ldr	r3, [r7, #12]
 8005e5c:	681b      	ldr	r3, [r3, #0]
 8005e5e:	6812      	ldr	r2, [r2, #0]
 8005e60:	601a      	str	r2, [r3, #0]
      for (index = 0U; index < BufferLength; index++)
 8005e62:	697b      	ldr	r3, [r7, #20]
 8005e64:	3301      	adds	r3, #1
 8005e66:	617b      	str	r3, [r7, #20]
 8005e68:	697a      	ldr	r2, [r7, #20]
 8005e6a:	687b      	ldr	r3, [r7, #4]
 8005e6c:	429a      	cmp	r2, r3
 8005e6e:	d3f0      	bcc.n	8005e52 <HAL_CRC_Calculate+0x42>
      temp = hcrc->Instance->DR;
 8005e70:	68fb      	ldr	r3, [r7, #12]
 8005e72:	681b      	ldr	r3, [r3, #0]
 8005e74:	681b      	ldr	r3, [r3, #0]
 8005e76:	613b      	str	r3, [r7, #16]
      break;
 8005e78:	e00e      	b.n	8005e98 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_8(hcrc, (uint8_t *)pBuffer, BufferLength);
 8005e7a:	687a      	ldr	r2, [r7, #4]
 8005e7c:	68b9      	ldr	r1, [r7, #8]
 8005e7e:	68f8      	ldr	r0, [r7, #12]
 8005e80:	f000 f812 	bl	8005ea8 <CRC_Handle_8>
 8005e84:	6138      	str	r0, [r7, #16]
      break;
 8005e86:	e007      	b.n	8005e98 <HAL_CRC_Calculate+0x88>
      temp = CRC_Handle_16(hcrc, (uint16_t *)(void *)pBuffer, BufferLength);    /* Derogation MisraC2012 R.11.5 */
 8005e88:	687a      	ldr	r2, [r7, #4]
 8005e8a:	68b9      	ldr	r1, [r7, #8]
 8005e8c:	68f8      	ldr	r0, [r7, #12]
 8005e8e:	f000 f899 	bl	8005fc4 <CRC_Handle_16>
 8005e92:	6138      	str	r0, [r7, #16]
      break;
 8005e94:	e000      	b.n	8005e98 <HAL_CRC_Calculate+0x88>
      break;
 8005e96:	bf00      	nop
  }

  /* Change CRC peripheral state */
  hcrc->State = HAL_CRC_STATE_READY;
 8005e98:	68fb      	ldr	r3, [r7, #12]
 8005e9a:	2201      	movs	r2, #1
 8005e9c:	775a      	strb	r2, [r3, #29]

  /* Return the CRC computed value */
  return temp;
 8005e9e:	693b      	ldr	r3, [r7, #16]
}
 8005ea0:	4618      	mov	r0, r3
 8005ea2:	3718      	adds	r7, #24
 8005ea4:	46bd      	mov	sp, r7
 8005ea6:	bd80      	pop	{r7, pc}

08005ea8 <CRC_Handle_8>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength)
{
 8005ea8:	b480      	push	{r7}
 8005eaa:	b089      	sub	sp, #36	@ 0x24
 8005eac:	af00      	add	r7, sp, #0
 8005eae:	60f8      	str	r0, [r7, #12]
 8005eb0:	60b9      	str	r1, [r7, #8]
 8005eb2:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 4 bytes are entered in a row with a single word write,
   * last bytes must be carefully fed to the CRC calculator to ensure a correct type
   * handling by the peripheral */
  for (i = 0U; i < (BufferLength / 4U); i++)
 8005eb4:	2300      	movs	r3, #0
 8005eb6:	61fb      	str	r3, [r7, #28]
 8005eb8:	e023      	b.n	8005f02 <CRC_Handle_8+0x5a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005eba:	69fb      	ldr	r3, [r7, #28]
 8005ebc:	009b      	lsls	r3, r3, #2
 8005ebe:	68ba      	ldr	r2, [r7, #8]
 8005ec0:	4413      	add	r3, r2
 8005ec2:	781b      	ldrb	r3, [r3, #0]
 8005ec4:	061a      	lsls	r2, r3, #24
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 8005ec6:	69fb      	ldr	r3, [r7, #28]
 8005ec8:	009b      	lsls	r3, r3, #2
 8005eca:	3301      	adds	r3, #1
 8005ecc:	68b9      	ldr	r1, [r7, #8]
 8005ece:	440b      	add	r3, r1
 8005ed0:	781b      	ldrb	r3, [r3, #0]
 8005ed2:	041b      	lsls	r3, r3, #16
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005ed4:	431a      	orrs	r2, r3
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 8005ed6:	69fb      	ldr	r3, [r7, #28]
 8005ed8:	009b      	lsls	r3, r3, #2
 8005eda:	3302      	adds	r3, #2
 8005edc:	68b9      	ldr	r1, [r7, #8]
 8005ede:	440b      	add	r3, r1
 8005ee0:	781b      	ldrb	r3, [r3, #0]
 8005ee2:	021b      	lsls	r3, r3, #8
                         ((uint32_t)pBuffer[(4U * i) + 1U] << 16U) | \
 8005ee4:	431a      	orrs	r2, r3
                         (uint32_t)pBuffer[(4U * i) + 3U];
 8005ee6:	69fb      	ldr	r3, [r7, #28]
 8005ee8:	009b      	lsls	r3, r3, #2
 8005eea:	3303      	adds	r3, #3
 8005eec:	68b9      	ldr	r1, [r7, #8]
 8005eee:	440b      	add	r3, r1
 8005ef0:	781b      	ldrb	r3, [r3, #0]
 8005ef2:	4619      	mov	r1, r3
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005ef4:	68fb      	ldr	r3, [r7, #12]
 8005ef6:	681b      	ldr	r3, [r3, #0]
                         ((uint32_t)pBuffer[(4U * i) + 2U] << 8U)  | \
 8005ef8:	430a      	orrs	r2, r1
    hcrc->Instance->DR = ((uint32_t)pBuffer[4U * i] << 24U) | \
 8005efa:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 4U); i++)
 8005efc:	69fb      	ldr	r3, [r7, #28]
 8005efe:	3301      	adds	r3, #1
 8005f00:	61fb      	str	r3, [r7, #28]
 8005f02:	687b      	ldr	r3, [r7, #4]
 8005f04:	089b      	lsrs	r3, r3, #2
 8005f06:	69fa      	ldr	r2, [r7, #28]
 8005f08:	429a      	cmp	r2, r3
 8005f0a:	d3d6      	bcc.n	8005eba <CRC_Handle_8+0x12>
  }
  /* last bytes specific handling */
  if ((BufferLength % 4U) != 0U)
 8005f0c:	687b      	ldr	r3, [r7, #4]
 8005f0e:	f003 0303 	and.w	r3, r3, #3
 8005f12:	2b00      	cmp	r3, #0
 8005f14:	d04d      	beq.n	8005fb2 <CRC_Handle_8+0x10a>
  {
    if ((BufferLength % 4U) == 1U)
 8005f16:	687b      	ldr	r3, [r7, #4]
 8005f18:	f003 0303 	and.w	r3, r3, #3
 8005f1c:	2b01      	cmp	r3, #1
 8005f1e:	d107      	bne.n	8005f30 <CRC_Handle_8+0x88>
    {
      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[4U * i];         /* Derogation MisraC2012 R.11.5 */
 8005f20:	69fb      	ldr	r3, [r7, #28]
 8005f22:	009b      	lsls	r3, r3, #2
 8005f24:	68ba      	ldr	r2, [r7, #8]
 8005f26:	4413      	add	r3, r2
 8005f28:	68fa      	ldr	r2, [r7, #12]
 8005f2a:	6812      	ldr	r2, [r2, #0]
 8005f2c:	781b      	ldrb	r3, [r3, #0]
 8005f2e:	7013      	strb	r3, [r2, #0]
    }
    if ((BufferLength % 4U) == 2U)
 8005f30:	687b      	ldr	r3, [r7, #4]
 8005f32:	f003 0303 	and.w	r3, r3, #3
 8005f36:	2b02      	cmp	r3, #2
 8005f38:	d116      	bne.n	8005f68 <CRC_Handle_8+0xc0>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 8005f3a:	69fb      	ldr	r3, [r7, #28]
 8005f3c:	009b      	lsls	r3, r3, #2
 8005f3e:	68ba      	ldr	r2, [r7, #8]
 8005f40:	4413      	add	r3, r2
 8005f42:	781b      	ldrb	r3, [r3, #0]
 8005f44:	021b      	lsls	r3, r3, #8
 8005f46:	b21a      	sxth	r2, r3
 8005f48:	69fb      	ldr	r3, [r7, #28]
 8005f4a:	009b      	lsls	r3, r3, #2
 8005f4c:	3301      	adds	r3, #1
 8005f4e:	68b9      	ldr	r1, [r7, #8]
 8005f50:	440b      	add	r3, r1
 8005f52:	781b      	ldrb	r3, [r3, #0]
 8005f54:	b21b      	sxth	r3, r3
 8005f56:	4313      	orrs	r3, r2
 8005f58:	b21b      	sxth	r3, r3
 8005f5a:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 8005f5c:	68fb      	ldr	r3, [r7, #12]
 8005f5e:	681b      	ldr	r3, [r3, #0]
 8005f60:	617b      	str	r3, [r7, #20]
      *pReg = data;
 8005f62:	697b      	ldr	r3, [r7, #20]
 8005f64:	8b7a      	ldrh	r2, [r7, #26]
 8005f66:	801a      	strh	r2, [r3, #0]
    }
    if ((BufferLength % 4U) == 3U)
 8005f68:	687b      	ldr	r3, [r7, #4]
 8005f6a:	f003 0303 	and.w	r3, r3, #3
 8005f6e:	2b03      	cmp	r3, #3
 8005f70:	d11f      	bne.n	8005fb2 <CRC_Handle_8+0x10a>
    {
      data = ((uint16_t)(pBuffer[4U * i]) << 8U) | (uint16_t)pBuffer[(4U * i) + 1U];
 8005f72:	69fb      	ldr	r3, [r7, #28]
 8005f74:	009b      	lsls	r3, r3, #2
 8005f76:	68ba      	ldr	r2, [r7, #8]
 8005f78:	4413      	add	r3, r2
 8005f7a:	781b      	ldrb	r3, [r3, #0]
 8005f7c:	021b      	lsls	r3, r3, #8
 8005f7e:	b21a      	sxth	r2, r3
 8005f80:	69fb      	ldr	r3, [r7, #28]
 8005f82:	009b      	lsls	r3, r3, #2
 8005f84:	3301      	adds	r3, #1
 8005f86:	68b9      	ldr	r1, [r7, #8]
 8005f88:	440b      	add	r3, r1
 8005f8a:	781b      	ldrb	r3, [r3, #0]
 8005f8c:	b21b      	sxth	r3, r3
 8005f8e:	4313      	orrs	r3, r2
 8005f90:	b21b      	sxth	r3, r3
 8005f92:	837b      	strh	r3, [r7, #26]
      pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                    /* Derogation MisraC2012 R.11.5 */
 8005f94:	68fb      	ldr	r3, [r7, #12]
 8005f96:	681b      	ldr	r3, [r3, #0]
 8005f98:	617b      	str	r3, [r7, #20]
      *pReg = data;
 8005f9a:	697b      	ldr	r3, [r7, #20]
 8005f9c:	8b7a      	ldrh	r2, [r7, #26]
 8005f9e:	801a      	strh	r2, [r3, #0]

      *(__IO uint8_t *)(__IO void *)(&hcrc->Instance->DR) = pBuffer[(4U * i) + 2U];  /* Derogation MisraC2012 R.11.5 */
 8005fa0:	69fb      	ldr	r3, [r7, #28]
 8005fa2:	009b      	lsls	r3, r3, #2
 8005fa4:	3302      	adds	r3, #2
 8005fa6:	68ba      	ldr	r2, [r7, #8]
 8005fa8:	4413      	add	r3, r2
 8005faa:	68fa      	ldr	r2, [r7, #12]
 8005fac:	6812      	ldr	r2, [r2, #0]
 8005fae:	781b      	ldrb	r3, [r3, #0]
 8005fb0:	7013      	strb	r3, [r2, #0]
    }
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 8005fb2:	68fb      	ldr	r3, [r7, #12]
 8005fb4:	681b      	ldr	r3, [r3, #0]
 8005fb6:	681b      	ldr	r3, [r3, #0]
}
 8005fb8:	4618      	mov	r0, r3
 8005fba:	3724      	adds	r7, #36	@ 0x24
 8005fbc:	46bd      	mov	sp, r7
 8005fbe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005fc2:	4770      	bx	lr

08005fc4 <CRC_Handle_16>:
  * @param  pBuffer pointer to the input data buffer
  * @param  BufferLength input data buffer length
  * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits)
  */
static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength)
{
 8005fc4:	b480      	push	{r7}
 8005fc6:	b087      	sub	sp, #28
 8005fc8:	af00      	add	r7, sp, #0
 8005fca:	60f8      	str	r0, [r7, #12]
 8005fcc:	60b9      	str	r1, [r7, #8]
 8005fce:	607a      	str	r2, [r7, #4]
  __IO uint16_t *pReg;

  /* Processing time optimization: 2 HalfWords are entered in a row with a single word write,
   * in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure
   * a correct type handling by the peripheral */
  for (i = 0U; i < (BufferLength / 2U); i++)
 8005fd0:	2300      	movs	r3, #0
 8005fd2:	617b      	str	r3, [r7, #20]
 8005fd4:	e013      	b.n	8005ffe <CRC_Handle_16+0x3a>
  {
    hcrc->Instance->DR = ((uint32_t)pBuffer[2U * i] << 16U) | (uint32_t)pBuffer[(2U * i) + 1U];
 8005fd6:	697b      	ldr	r3, [r7, #20]
 8005fd8:	009b      	lsls	r3, r3, #2
 8005fda:	68ba      	ldr	r2, [r7, #8]
 8005fdc:	4413      	add	r3, r2
 8005fde:	881b      	ldrh	r3, [r3, #0]
 8005fe0:	041a      	lsls	r2, r3, #16
 8005fe2:	697b      	ldr	r3, [r7, #20]
 8005fe4:	009b      	lsls	r3, r3, #2
 8005fe6:	3302      	adds	r3, #2
 8005fe8:	68b9      	ldr	r1, [r7, #8]
 8005fea:	440b      	add	r3, r1
 8005fec:	881b      	ldrh	r3, [r3, #0]
 8005fee:	4619      	mov	r1, r3
 8005ff0:	68fb      	ldr	r3, [r7, #12]
 8005ff2:	681b      	ldr	r3, [r3, #0]
 8005ff4:	430a      	orrs	r2, r1
 8005ff6:	601a      	str	r2, [r3, #0]
  for (i = 0U; i < (BufferLength / 2U); i++)
 8005ff8:	697b      	ldr	r3, [r7, #20]
 8005ffa:	3301      	adds	r3, #1
 8005ffc:	617b      	str	r3, [r7, #20]
 8005ffe:	687b      	ldr	r3, [r7, #4]
 8006000:	085b      	lsrs	r3, r3, #1
 8006002:	697a      	ldr	r2, [r7, #20]
 8006004:	429a      	cmp	r2, r3
 8006006:	d3e6      	bcc.n	8005fd6 <CRC_Handle_16+0x12>
  }
  if ((BufferLength % 2U) != 0U)
 8006008:	687b      	ldr	r3, [r7, #4]
 800600a:	f003 0301 	and.w	r3, r3, #1
 800600e:	2b00      	cmp	r3, #0
 8006010:	d009      	beq.n	8006026 <CRC_Handle_16+0x62>
  {
    pReg = (__IO uint16_t *)(__IO void *)(&hcrc->Instance->DR);                 /* Derogation MisraC2012 R.11.5 */
 8006012:	68fb      	ldr	r3, [r7, #12]
 8006014:	681b      	ldr	r3, [r3, #0]
 8006016:	613b      	str	r3, [r7, #16]
    *pReg = pBuffer[2U * i];
 8006018:	697b      	ldr	r3, [r7, #20]
 800601a:	009b      	lsls	r3, r3, #2
 800601c:	68ba      	ldr	r2, [r7, #8]
 800601e:	4413      	add	r3, r2
 8006020:	881a      	ldrh	r2, [r3, #0]
 8006022:	693b      	ldr	r3, [r7, #16]
 8006024:	801a      	strh	r2, [r3, #0]
  }

  /* Return the CRC computed value */
  return hcrc->Instance->DR;
 8006026:	68fb      	ldr	r3, [r7, #12]
 8006028:	681b      	ldr	r3, [r3, #0]
 800602a:	681b      	ldr	r3, [r3, #0]
}
 800602c:	4618      	mov	r0, r3
 800602e:	371c      	adds	r7, #28
 8006030:	46bd      	mov	sp, r7
 8006032:	f85d 7b04 	ldr.w	r7, [sp], #4
 8006036:	4770      	bx	lr

08006038 <HAL_CRCEx_Polynomial_Set>:
  *          @arg @ref CRC_POLYLENGTH_16B 16-bit long CRC (generating polynomial of degree 16)
  *          @arg @ref CRC_POLYLENGTH_32B 32-bit long CRC (generating polynomial of degree 32)
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength)
{
 8006038:	b480      	push	{r7}
 800603a:	b087      	sub	sp, #28
 800603c:	af00      	add	r7, sp, #0
 800603e:	60f8      	str	r0, [r7, #12]
 8006040:	60b9      	str	r1, [r7, #8]
 8006042:	607a      	str	r2, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 8006044:	2300      	movs	r3, #0
 8006046:	75fb      	strb	r3, [r7, #23]
  uint32_t msb = 31U; /* polynomial degree is 32 at most, so msb is initialized to max value */
 8006048:	231f      	movs	r3, #31
 800604a:	613b      	str	r3, [r7, #16]

  /* Check the parameters */
  assert_param(IS_CRC_POL_LENGTH(PolyLength));

  /* Ensure that the generating polynomial is odd */
  if ((Pol & (uint32_t)(0x1U)) ==  0U)
 800604c:	68bb      	ldr	r3, [r7, #8]
 800604e:	f003 0301 	and.w	r3, r3, #1
 8006052:	2b00      	cmp	r3, #0
 8006054:	d102      	bne.n	800605c <HAL_CRCEx_Polynomial_Set+0x24>
  {
    status =  HAL_ERROR;
 8006056:	2301      	movs	r3, #1
 8006058:	75fb      	strb	r3, [r7, #23]
 800605a:	e063      	b.n	8006124 <HAL_CRCEx_Polynomial_Set+0xec>
     * definition. HAL_ERROR is reported if Pol degree is
     * larger than that indicated by PolyLength.
     * Look for MSB position: msb will contain the degree of
     *  the second to the largest polynomial member. E.g., for
     *  X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */
    while ((msb-- > 0U) && ((Pol & ((uint32_t)(0x1U) << (msb & 0x1FU))) == 0U))
 800605c:	bf00      	nop
 800605e:	693b      	ldr	r3, [r7, #16]
 8006060:	1e5a      	subs	r2, r3, #1
 8006062:	613a      	str	r2, [r7, #16]
 8006064:	2b00      	cmp	r3, #0
 8006066:	d009      	beq.n	800607c <HAL_CRCEx_Polynomial_Set+0x44>
 8006068:	693b      	ldr	r3, [r7, #16]
 800606a:	f003 031f 	and.w	r3, r3, #31
 800606e:	68ba      	ldr	r2, [r7, #8]
 8006070:	fa22 f303 	lsr.w	r3, r2, r3
 8006074:	f003 0301 	and.w	r3, r3, #1
 8006078:	2b00      	cmp	r3, #0
 800607a:	d0f0      	beq.n	800605e <HAL_CRCEx_Polynomial_Set+0x26>
    {
    }

    switch (PolyLength)
 800607c:	687b      	ldr	r3, [r7, #4]
 800607e:	2b18      	cmp	r3, #24
 8006080:	d846      	bhi.n	8006110 <HAL_CRCEx_Polynomial_Set+0xd8>
 8006082:	a201      	add	r2, pc, #4	@ (adr r2, 8006088 <HAL_CRCEx_Polynomial_Set+0x50>)
 8006084:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8006088:	08006117 	.word	0x08006117
 800608c:	08006111 	.word	0x08006111
 8006090:	08006111 	.word	0x08006111
 8006094:	08006111 	.word	0x08006111
 8006098:	08006111 	.word	0x08006111
 800609c:	08006111 	.word	0x08006111
 80060a0:	08006111 	.word	0x08006111
 80060a4:	08006111 	.word	0x08006111
 80060a8:	08006105 	.word	0x08006105
 80060ac:	08006111 	.word	0x08006111
 80060b0:	08006111 	.word	0x08006111
 80060b4:	08006111 	.word	0x08006111
 80060b8:	08006111 	.word	0x08006111
 80060bc:	08006111 	.word	0x08006111
 80060c0:	08006111 	.word	0x08006111
 80060c4:	08006111 	.word	0x08006111
 80060c8:	080060f9 	.word	0x080060f9
 80060cc:	08006111 	.word	0x08006111
 80060d0:	08006111 	.word	0x08006111
 80060d4:	08006111 	.word	0x08006111
 80060d8:	08006111 	.word	0x08006111
 80060dc:	08006111 	.word	0x08006111
 80060e0:	08006111 	.word	0x08006111
 80060e4:	08006111 	.word	0x08006111
 80060e8:	080060ed 	.word	0x080060ed
    {

      case CRC_POLYLENGTH_7B:
        if (msb >= HAL_CRC_LENGTH_7B)
 80060ec:	693b      	ldr	r3, [r7, #16]
 80060ee:	2b06      	cmp	r3, #6
 80060f0:	d913      	bls.n	800611a <HAL_CRCEx_Polynomial_Set+0xe2>
        {
          status =   HAL_ERROR;
 80060f2:	2301      	movs	r3, #1
 80060f4:	75fb      	strb	r3, [r7, #23]
        }
        break;
 80060f6:	e010      	b.n	800611a <HAL_CRCEx_Polynomial_Set+0xe2>
      case CRC_POLYLENGTH_8B:
        if (msb >= HAL_CRC_LENGTH_8B)
 80060f8:	693b      	ldr	r3, [r7, #16]
 80060fa:	2b07      	cmp	r3, #7
 80060fc:	d90f      	bls.n	800611e <HAL_CRCEx_Polynomial_Set+0xe6>
        {
          status =   HAL_ERROR;
 80060fe:	2301      	movs	r3, #1
 8006100:	75fb      	strb	r3, [r7, #23]
        }
        break;
 8006102:	e00c      	b.n	800611e <HAL_CRCEx_Polynomial_Set+0xe6>
      case CRC_POLYLENGTH_16B:
        if (msb >= HAL_CRC_LENGTH_16B)
 8006104:	693b      	ldr	r3, [r7, #16]
 8006106:	2b0f      	cmp	r3, #15
 8006108:	d90b      	bls.n	8006122 <HAL_CRCEx_Polynomial_Set+0xea>
        {
          status =   HAL_ERROR;
 800610a:	2301      	movs	r3, #1
 800610c:	75fb      	strb	r3, [r7, #23]
        }
        break;
 800610e:	e008      	b.n	8006122 <HAL_CRCEx_Polynomial_Set+0xea>

      case CRC_POLYLENGTH_32B:
        /* no polynomial definition vs. polynomial length issue possible */
        break;
      default:
        status =  HAL_ERROR;
 8006110:	2301      	movs	r3, #1
 8006112:	75fb      	strb	r3, [r7, #23]
        break;
 8006114:	e006      	b.n	8006124 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8006116:	bf00      	nop
 8006118:	e004      	b.n	8006124 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 800611a:	bf00      	nop
 800611c:	e002      	b.n	8006124 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 800611e:	bf00      	nop
 8006120:	e000      	b.n	8006124 <HAL_CRCEx_Polynomial_Set+0xec>
        break;
 8006122:	bf00      	nop
    }
  }
  if (status == HAL_OK)
 8006124:	7dfb      	ldrb	r3, [r7, #23]
 8006126:	2b00      	cmp	r3, #0
 8006128:	d10d      	bne.n	8006146 <HAL_CRCEx_Polynomial_Set+0x10e>
  {
    /* set generating polynomial */
    WRITE_REG(hcrc->Instance->POL, Pol);
 800612a:	68fb      	ldr	r3, [r7, #12]
 800612c:	681b      	ldr	r3, [r3, #0]
 800612e:	68ba      	ldr	r2, [r7, #8]
 8006130:	615a      	str	r2, [r3, #20]

    /* set generating polynomial size */
    MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength);
 8006132:	68fb      	ldr	r3, [r7, #12]
 8006134:	681b      	ldr	r3, [r3, #0]
 8006136:	689b      	ldr	r3, [r3, #8]
 8006138:	f023 0118 	bic.w	r1, r3, #24
 800613c:	68fb      	ldr	r3, [r7, #12]
 800613e:	681b      	ldr	r3, [r3, #0]
 8006140:	687a      	ldr	r2, [r7, #4]
 8006142:	430a      	orrs	r2, r1
 8006144:	609a      	str	r2, [r3, #8]
  }
  /* Return function status */
  return status;
 8006146:	7dfb      	ldrb	r3, [r7, #23]
}
 8006148:	4618      	mov	r0, r3
 800614a:	371c      	adds	r7, #28
 800614c:	46bd      	mov	sp, r7
 800614e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8006152:	4770      	bx	lr

08006154 <HAL_DMA_Init>:
  * @param  hdma: Pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
 8006154:	b580      	push	{r7, lr}
 8006156:	b086      	sub	sp, #24
 8006158:	af00      	add	r7, sp, #0
 800615a:	6078      	str	r0, [r7, #4]
  uint32_t registerValue;
  uint32_t tickstart = HAL_GetTick();
 800615c:	f7ff fc4c 	bl	80059f8 <HAL_GetTick>
 8006160:	6138      	str	r0, [r7, #16]
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 8006162:	687b      	ldr	r3, [r7, #4]
 8006164:	2b00      	cmp	r3, #0
 8006166:	d101      	bne.n	800616c <HAL_DMA_Init+0x18>
  {
    return HAL_ERROR;
 8006168:	2301      	movs	r3, #1
 800616a:	e316      	b.n	800679a <HAL_DMA_Init+0x646>
  assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
  assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
  assert_param(IS_DMA_MODE(hdma->Init.Mode));
  assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 800616c:	687b      	ldr	r3, [r7, #4]
 800616e:	681b      	ldr	r3, [r3, #0]
 8006170:	4a66      	ldr	r2, [pc, #408]	@ (800630c <HAL_DMA_Init+0x1b8>)
 8006172:	4293      	cmp	r3, r2
 8006174:	d04a      	beq.n	800620c <HAL_DMA_Init+0xb8>
 8006176:	687b      	ldr	r3, [r7, #4]
 8006178:	681b      	ldr	r3, [r3, #0]
 800617a:	4a65      	ldr	r2, [pc, #404]	@ (8006310 <HAL_DMA_Init+0x1bc>)
 800617c:	4293      	cmp	r3, r2
 800617e:	d045      	beq.n	800620c <HAL_DMA_Init+0xb8>
 8006180:	687b      	ldr	r3, [r7, #4]
 8006182:	681b      	ldr	r3, [r3, #0]
 8006184:	4a63      	ldr	r2, [pc, #396]	@ (8006314 <HAL_DMA_Init+0x1c0>)
 8006186:	4293      	cmp	r3, r2
 8006188:	d040      	beq.n	800620c <HAL_DMA_Init+0xb8>
 800618a:	687b      	ldr	r3, [r7, #4]
 800618c:	681b      	ldr	r3, [r3, #0]
 800618e:	4a62      	ldr	r2, [pc, #392]	@ (8006318 <HAL_DMA_Init+0x1c4>)
 8006190:	4293      	cmp	r3, r2
 8006192:	d03b      	beq.n	800620c <HAL_DMA_Init+0xb8>
 8006194:	687b      	ldr	r3, [r7, #4]
 8006196:	681b      	ldr	r3, [r3, #0]
 8006198:	4a60      	ldr	r2, [pc, #384]	@ (800631c <HAL_DMA_Init+0x1c8>)
 800619a:	4293      	cmp	r3, r2
 800619c:	d036      	beq.n	800620c <HAL_DMA_Init+0xb8>
 800619e:	687b      	ldr	r3, [r7, #4]
 80061a0:	681b      	ldr	r3, [r3, #0]
 80061a2:	4a5f      	ldr	r2, [pc, #380]	@ (8006320 <HAL_DMA_Init+0x1cc>)
 80061a4:	4293      	cmp	r3, r2
 80061a6:	d031      	beq.n	800620c <HAL_DMA_Init+0xb8>
 80061a8:	687b      	ldr	r3, [r7, #4]
 80061aa:	681b      	ldr	r3, [r3, #0]
 80061ac:	4a5d      	ldr	r2, [pc, #372]	@ (8006324 <HAL_DMA_Init+0x1d0>)
 80061ae:	4293      	cmp	r3, r2
 80061b0:	d02c      	beq.n	800620c <HAL_DMA_Init+0xb8>
 80061b2:	687b      	ldr	r3, [r7, #4]
 80061b4:	681b      	ldr	r3, [r3, #0]
 80061b6:	4a5c      	ldr	r2, [pc, #368]	@ (8006328 <HAL_DMA_Init+0x1d4>)
 80061b8:	4293      	cmp	r3, r2
 80061ba:	d027      	beq.n	800620c <HAL_DMA_Init+0xb8>
 80061bc:	687b      	ldr	r3, [r7, #4]
 80061be:	681b      	ldr	r3, [r3, #0]
 80061c0:	4a5a      	ldr	r2, [pc, #360]	@ (800632c <HAL_DMA_Init+0x1d8>)
 80061c2:	4293      	cmp	r3, r2
 80061c4:	d022      	beq.n	800620c <HAL_DMA_Init+0xb8>
 80061c6:	687b      	ldr	r3, [r7, #4]
 80061c8:	681b      	ldr	r3, [r3, #0]
 80061ca:	4a59      	ldr	r2, [pc, #356]	@ (8006330 <HAL_DMA_Init+0x1dc>)
 80061cc:	4293      	cmp	r3, r2
 80061ce:	d01d      	beq.n	800620c <HAL_DMA_Init+0xb8>
 80061d0:	687b      	ldr	r3, [r7, #4]
 80061d2:	681b      	ldr	r3, [r3, #0]
 80061d4:	4a57      	ldr	r2, [pc, #348]	@ (8006334 <HAL_DMA_Init+0x1e0>)
 80061d6:	4293      	cmp	r3, r2
 80061d8:	d018      	beq.n	800620c <HAL_DMA_Init+0xb8>
 80061da:	687b      	ldr	r3, [r7, #4]
 80061dc:	681b      	ldr	r3, [r3, #0]
 80061de:	4a56      	ldr	r2, [pc, #344]	@ (8006338 <HAL_DMA_Init+0x1e4>)
 80061e0:	4293      	cmp	r3, r2
 80061e2:	d013      	beq.n	800620c <HAL_DMA_Init+0xb8>
 80061e4:	687b      	ldr	r3, [r7, #4]
 80061e6:	681b      	ldr	r3, [r3, #0]
 80061e8:	4a54      	ldr	r2, [pc, #336]	@ (800633c <HAL_DMA_Init+0x1e8>)
 80061ea:	4293      	cmp	r3, r2
 80061ec:	d00e      	beq.n	800620c <HAL_DMA_Init+0xb8>
 80061ee:	687b      	ldr	r3, [r7, #4]
 80061f0:	681b      	ldr	r3, [r3, #0]
 80061f2:	4a53      	ldr	r2, [pc, #332]	@ (8006340 <HAL_DMA_Init+0x1ec>)
 80061f4:	4293      	cmp	r3, r2
 80061f6:	d009      	beq.n	800620c <HAL_DMA_Init+0xb8>
 80061f8:	687b      	ldr	r3, [r7, #4]
 80061fa:	681b      	ldr	r3, [r3, #0]
 80061fc:	4a51      	ldr	r2, [pc, #324]	@ (8006344 <HAL_DMA_Init+0x1f0>)
 80061fe:	4293      	cmp	r3, r2
 8006200:	d004      	beq.n	800620c <HAL_DMA_Init+0xb8>
 8006202:	687b      	ldr	r3, [r7, #4]
 8006204:	681b      	ldr	r3, [r3, #0]
 8006206:	4a50      	ldr	r2, [pc, #320]	@ (8006348 <HAL_DMA_Init+0x1f4>)
 8006208:	4293      	cmp	r3, r2
 800620a:	d101      	bne.n	8006210 <HAL_DMA_Init+0xbc>
 800620c:	2301      	movs	r3, #1
 800620e:	e000      	b.n	8006212 <HAL_DMA_Init+0xbe>
 8006210:	2300      	movs	r3, #0
 8006212:	2b00      	cmp	r3, #0
 8006214:	f000 813b 	beq.w	800648e <HAL_DMA_Init+0x33a>
      assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
      assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 8006218:	687b      	ldr	r3, [r7, #4]
 800621a:	2202      	movs	r2, #2
 800621c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 8006220:	687b      	ldr	r3, [r7, #4]
 8006222:	2200      	movs	r2, #0
 8006224:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Disable the peripheral */
    __HAL_DMA_DISABLE(hdma);
 8006228:	687b      	ldr	r3, [r7, #4]
 800622a:	681b      	ldr	r3, [r3, #0]
 800622c:	4a37      	ldr	r2, [pc, #220]	@ (800630c <HAL_DMA_Init+0x1b8>)
 800622e:	4293      	cmp	r3, r2
 8006230:	d04a      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 8006232:	687b      	ldr	r3, [r7, #4]
 8006234:	681b      	ldr	r3, [r3, #0]
 8006236:	4a36      	ldr	r2, [pc, #216]	@ (8006310 <HAL_DMA_Init+0x1bc>)
 8006238:	4293      	cmp	r3, r2
 800623a:	d045      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 800623c:	687b      	ldr	r3, [r7, #4]
 800623e:	681b      	ldr	r3, [r3, #0]
 8006240:	4a34      	ldr	r2, [pc, #208]	@ (8006314 <HAL_DMA_Init+0x1c0>)
 8006242:	4293      	cmp	r3, r2
 8006244:	d040      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 8006246:	687b      	ldr	r3, [r7, #4]
 8006248:	681b      	ldr	r3, [r3, #0]
 800624a:	4a33      	ldr	r2, [pc, #204]	@ (8006318 <HAL_DMA_Init+0x1c4>)
 800624c:	4293      	cmp	r3, r2
 800624e:	d03b      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 8006250:	687b      	ldr	r3, [r7, #4]
 8006252:	681b      	ldr	r3, [r3, #0]
 8006254:	4a31      	ldr	r2, [pc, #196]	@ (800631c <HAL_DMA_Init+0x1c8>)
 8006256:	4293      	cmp	r3, r2
 8006258:	d036      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 800625a:	687b      	ldr	r3, [r7, #4]
 800625c:	681b      	ldr	r3, [r3, #0]
 800625e:	4a30      	ldr	r2, [pc, #192]	@ (8006320 <HAL_DMA_Init+0x1cc>)
 8006260:	4293      	cmp	r3, r2
 8006262:	d031      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 8006264:	687b      	ldr	r3, [r7, #4]
 8006266:	681b      	ldr	r3, [r3, #0]
 8006268:	4a2e      	ldr	r2, [pc, #184]	@ (8006324 <HAL_DMA_Init+0x1d0>)
 800626a:	4293      	cmp	r3, r2
 800626c:	d02c      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 800626e:	687b      	ldr	r3, [r7, #4]
 8006270:	681b      	ldr	r3, [r3, #0]
 8006272:	4a2d      	ldr	r2, [pc, #180]	@ (8006328 <HAL_DMA_Init+0x1d4>)
 8006274:	4293      	cmp	r3, r2
 8006276:	d027      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 8006278:	687b      	ldr	r3, [r7, #4]
 800627a:	681b      	ldr	r3, [r3, #0]
 800627c:	4a2b      	ldr	r2, [pc, #172]	@ (800632c <HAL_DMA_Init+0x1d8>)
 800627e:	4293      	cmp	r3, r2
 8006280:	d022      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 8006282:	687b      	ldr	r3, [r7, #4]
 8006284:	681b      	ldr	r3, [r3, #0]
 8006286:	4a2a      	ldr	r2, [pc, #168]	@ (8006330 <HAL_DMA_Init+0x1dc>)
 8006288:	4293      	cmp	r3, r2
 800628a:	d01d      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 800628c:	687b      	ldr	r3, [r7, #4]
 800628e:	681b      	ldr	r3, [r3, #0]
 8006290:	4a28      	ldr	r2, [pc, #160]	@ (8006334 <HAL_DMA_Init+0x1e0>)
 8006292:	4293      	cmp	r3, r2
 8006294:	d018      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 8006296:	687b      	ldr	r3, [r7, #4]
 8006298:	681b      	ldr	r3, [r3, #0]
 800629a:	4a27      	ldr	r2, [pc, #156]	@ (8006338 <HAL_DMA_Init+0x1e4>)
 800629c:	4293      	cmp	r3, r2
 800629e:	d013      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 80062a0:	687b      	ldr	r3, [r7, #4]
 80062a2:	681b      	ldr	r3, [r3, #0]
 80062a4:	4a25      	ldr	r2, [pc, #148]	@ (800633c <HAL_DMA_Init+0x1e8>)
 80062a6:	4293      	cmp	r3, r2
 80062a8:	d00e      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 80062aa:	687b      	ldr	r3, [r7, #4]
 80062ac:	681b      	ldr	r3, [r3, #0]
 80062ae:	4a24      	ldr	r2, [pc, #144]	@ (8006340 <HAL_DMA_Init+0x1ec>)
 80062b0:	4293      	cmp	r3, r2
 80062b2:	d009      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 80062b4:	687b      	ldr	r3, [r7, #4]
 80062b6:	681b      	ldr	r3, [r3, #0]
 80062b8:	4a22      	ldr	r2, [pc, #136]	@ (8006344 <HAL_DMA_Init+0x1f0>)
 80062ba:	4293      	cmp	r3, r2
 80062bc:	d004      	beq.n	80062c8 <HAL_DMA_Init+0x174>
 80062be:	687b      	ldr	r3, [r7, #4]
 80062c0:	681b      	ldr	r3, [r3, #0]
 80062c2:	4a21      	ldr	r2, [pc, #132]	@ (8006348 <HAL_DMA_Init+0x1f4>)
 80062c4:	4293      	cmp	r3, r2
 80062c6:	d108      	bne.n	80062da <HAL_DMA_Init+0x186>
 80062c8:	687b      	ldr	r3, [r7, #4]
 80062ca:	681b      	ldr	r3, [r3, #0]
 80062cc:	681a      	ldr	r2, [r3, #0]
 80062ce:	687b      	ldr	r3, [r7, #4]
 80062d0:	681b      	ldr	r3, [r3, #0]
 80062d2:	f022 0201 	bic.w	r2, r2, #1
 80062d6:	601a      	str	r2, [r3, #0]
 80062d8:	e007      	b.n	80062ea <HAL_DMA_Init+0x196>
 80062da:	687b      	ldr	r3, [r7, #4]
 80062dc:	681b      	ldr	r3, [r3, #0]
 80062de:	681a      	ldr	r2, [r3, #0]
 80062e0:	687b      	ldr	r3, [r7, #4]
 80062e2:	681b      	ldr	r3, [r3, #0]
 80062e4:	f022 0201 	bic.w	r2, r2, #1
 80062e8:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 80062ea:	e02f      	b.n	800634c <HAL_DMA_Init+0x1f8>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 80062ec:	f7ff fb84 	bl	80059f8 <HAL_GetTick>
 80062f0:	4602      	mov	r2, r0
 80062f2:	693b      	ldr	r3, [r7, #16]
 80062f4:	1ad3      	subs	r3, r2, r3
 80062f6:	2b05      	cmp	r3, #5
 80062f8:	d928      	bls.n	800634c <HAL_DMA_Init+0x1f8>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 80062fa:	687b      	ldr	r3, [r7, #4]
 80062fc:	2220      	movs	r2, #32
 80062fe:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 8006300:	687b      	ldr	r3, [r7, #4]
 8006302:	2203      	movs	r2, #3
 8006304:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        return HAL_ERROR;
 8006308:	2301      	movs	r3, #1
 800630a:	e246      	b.n	800679a <HAL_DMA_Init+0x646>
 800630c:	40020010 	.word	0x40020010
 8006310:	40020028 	.word	0x40020028
 8006314:	40020040 	.word	0x40020040
 8006318:	40020058 	.word	0x40020058
 800631c:	40020070 	.word	0x40020070
 8006320:	40020088 	.word	0x40020088
 8006324:	400200a0 	.word	0x400200a0
 8006328:	400200b8 	.word	0x400200b8
 800632c:	40020410 	.word	0x40020410
 8006330:	40020428 	.word	0x40020428
 8006334:	40020440 	.word	0x40020440
 8006338:	40020458 	.word	0x40020458
 800633c:	40020470 	.word	0x40020470
 8006340:	40020488 	.word	0x40020488
 8006344:	400204a0 	.word	0x400204a0
 8006348:	400204b8 	.word	0x400204b8
    while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 800634c:	687b      	ldr	r3, [r7, #4]
 800634e:	681b      	ldr	r3, [r3, #0]
 8006350:	681b      	ldr	r3, [r3, #0]
 8006352:	f003 0301 	and.w	r3, r3, #1
 8006356:	2b00      	cmp	r3, #0
 8006358:	d1c8      	bne.n	80062ec <HAL_DMA_Init+0x198>
      }
    }

    /* Get the CR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->CR;
 800635a:	687b      	ldr	r3, [r7, #4]
 800635c:	681b      	ldr	r3, [r3, #0]
 800635e:	681b      	ldr	r3, [r3, #0]
 8006360:	617b      	str	r3, [r7, #20]

    /* Clear CHSEL, MBURST, PBURST, PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, CT and DBM bits */
    registerValue &= ((uint32_t)~(DMA_SxCR_MBURST | DMA_SxCR_PBURST | \
 8006362:	697a      	ldr	r2, [r7, #20]
 8006364:	4b83      	ldr	r3, [pc, #524]	@ (8006574 <HAL_DMA_Init+0x420>)
 8006366:	4013      	ands	r3, r2
 8006368:	617b      	str	r3, [r7, #20]
                        DMA_SxCR_PL    | DMA_SxCR_MSIZE  | DMA_SxCR_PSIZE  | \
                        DMA_SxCR_MINC  | DMA_SxCR_PINC   | DMA_SxCR_CIRC   | \
                        DMA_SxCR_DIR   | DMA_SxCR_CT     | DMA_SxCR_DBM));

    /* Prepare the DMA Stream configuration */
    registerValue |=  hdma->Init.Direction           |
 800636a:	687b      	ldr	r3, [r7, #4]
 800636c:	689a      	ldr	r2, [r3, #8]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 800636e:	687b      	ldr	r3, [r7, #4]
 8006370:	68db      	ldr	r3, [r3, #12]
    registerValue |=  hdma->Init.Direction           |
 8006372:	431a      	orrs	r2, r3
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 8006374:	687b      	ldr	r3, [r7, #4]
 8006376:	691b      	ldr	r3, [r3, #16]
 8006378:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 800637a:	687b      	ldr	r3, [r7, #4]
 800637c:	695b      	ldr	r3, [r3, #20]
            hdma->Init.PeriphInc           | hdma->Init.MemInc           |
 800637e:	431a      	orrs	r2, r3
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 8006380:	687b      	ldr	r3, [r7, #4]
 8006382:	699b      	ldr	r3, [r3, #24]
 8006384:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 8006386:	687b      	ldr	r3, [r7, #4]
 8006388:	69db      	ldr	r3, [r3, #28]
            hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
 800638a:	431a      	orrs	r2, r3
            hdma->Init.Mode                | hdma->Init.Priority;
 800638c:	687b      	ldr	r3, [r7, #4]
 800638e:	6a1b      	ldr	r3, [r3, #32]
 8006390:	4313      	orrs	r3, r2
    registerValue |=  hdma->Init.Direction           |
 8006392:	697a      	ldr	r2, [r7, #20]
 8006394:	4313      	orrs	r3, r2
 8006396:	617b      	str	r3, [r7, #20]

    /* the Memory burst and peripheral burst are not used when the FIFO is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 8006398:	687b      	ldr	r3, [r7, #4]
 800639a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800639c:	2b04      	cmp	r3, #4
 800639e:	d107      	bne.n	80063b0 <HAL_DMA_Init+0x25c>
    {
      /* Get memory burst and peripheral burst */
      registerValue |=  hdma->Init.MemBurst | hdma->Init.PeriphBurst;
 80063a0:	687b      	ldr	r3, [r7, #4]
 80063a2:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80063a4:	687b      	ldr	r3, [r7, #4]
 80063a6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80063a8:	4313      	orrs	r3, r2
 80063aa:	697a      	ldr	r2, [r7, #20]
 80063ac:	4313      	orrs	r3, r2
 80063ae:	617b      	str	r3, [r7, #20]
    }

    /* Work around for Errata 2.22: UART/USART- DMA transfer lock: DMA stream could be
                                    lock when transferring data to/from USART/UART */
#if (STM32H7_DEV_ID == 0x450UL)
    if((DBGMCU->IDCODE & 0xFFFF0000U) >= 0x20000000U)
 80063b0:	4b71      	ldr	r3, [pc, #452]	@ (8006578 <HAL_DMA_Init+0x424>)
 80063b2:	681a      	ldr	r2, [r3, #0]
 80063b4:	4b71      	ldr	r3, [pc, #452]	@ (800657c <HAL_DMA_Init+0x428>)
 80063b6:	4013      	ands	r3, r2
 80063b8:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 80063bc:	d328      	bcc.n	8006410 <HAL_DMA_Init+0x2bc>
    {
#endif /* STM32H7_DEV_ID == 0x450UL */
      if(IS_DMA_UART_USART_REQUEST(hdma->Init.Request) != 0U)
 80063be:	687b      	ldr	r3, [r7, #4]
 80063c0:	685b      	ldr	r3, [r3, #4]
 80063c2:	2b28      	cmp	r3, #40	@ 0x28
 80063c4:	d903      	bls.n	80063ce <HAL_DMA_Init+0x27a>
 80063c6:	687b      	ldr	r3, [r7, #4]
 80063c8:	685b      	ldr	r3, [r3, #4]
 80063ca:	2b2e      	cmp	r3, #46	@ 0x2e
 80063cc:	d917      	bls.n	80063fe <HAL_DMA_Init+0x2aa>
 80063ce:	687b      	ldr	r3, [r7, #4]
 80063d0:	685b      	ldr	r3, [r3, #4]
 80063d2:	2b3e      	cmp	r3, #62	@ 0x3e
 80063d4:	d903      	bls.n	80063de <HAL_DMA_Init+0x28a>
 80063d6:	687b      	ldr	r3, [r7, #4]
 80063d8:	685b      	ldr	r3, [r3, #4]
 80063da:	2b42      	cmp	r3, #66	@ 0x42
 80063dc:	d90f      	bls.n	80063fe <HAL_DMA_Init+0x2aa>
 80063de:	687b      	ldr	r3, [r7, #4]
 80063e0:	685b      	ldr	r3, [r3, #4]
 80063e2:	2b46      	cmp	r3, #70	@ 0x46
 80063e4:	d903      	bls.n	80063ee <HAL_DMA_Init+0x29a>
 80063e6:	687b      	ldr	r3, [r7, #4]
 80063e8:	685b      	ldr	r3, [r3, #4]
 80063ea:	2b48      	cmp	r3, #72	@ 0x48
 80063ec:	d907      	bls.n	80063fe <HAL_DMA_Init+0x2aa>
 80063ee:	687b      	ldr	r3, [r7, #4]
 80063f0:	685b      	ldr	r3, [r3, #4]
 80063f2:	2b4e      	cmp	r3, #78	@ 0x4e
 80063f4:	d905      	bls.n	8006402 <HAL_DMA_Init+0x2ae>
 80063f6:	687b      	ldr	r3, [r7, #4]
 80063f8:	685b      	ldr	r3, [r3, #4]
 80063fa:	2b52      	cmp	r3, #82	@ 0x52
 80063fc:	d801      	bhi.n	8006402 <HAL_DMA_Init+0x2ae>
 80063fe:	2301      	movs	r3, #1
 8006400:	e000      	b.n	8006404 <HAL_DMA_Init+0x2b0>
 8006402:	2300      	movs	r3, #0
 8006404:	2b00      	cmp	r3, #0
 8006406:	d003      	beq.n	8006410 <HAL_DMA_Init+0x2bc>
      {
        registerValue |= DMA_SxCR_TRBUFF;
 8006408:	697b      	ldr	r3, [r7, #20]
 800640a:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 800640e:	617b      	str	r3, [r7, #20]
#if (STM32H7_DEV_ID == 0x450UL)
    }
#endif /* STM32H7_DEV_ID == 0x450UL */

    /* Write to DMA Stream CR register */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->CR = registerValue;
 8006410:	687b      	ldr	r3, [r7, #4]
 8006412:	681b      	ldr	r3, [r3, #0]
 8006414:	697a      	ldr	r2, [r7, #20]
 8006416:	601a      	str	r2, [r3, #0]

    /* Get the FCR register value */
    registerValue = ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR;
 8006418:	687b      	ldr	r3, [r7, #4]
 800641a:	681b      	ldr	r3, [r3, #0]
 800641c:	695b      	ldr	r3, [r3, #20]
 800641e:	617b      	str	r3, [r7, #20]

    /* Clear Direct mode and FIFO threshold bits */
    registerValue &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
 8006420:	697b      	ldr	r3, [r7, #20]
 8006422:	f023 0307 	bic.w	r3, r3, #7
 8006426:	617b      	str	r3, [r7, #20]

    /* Prepare the DMA Stream FIFO configuration */
    registerValue |= hdma->Init.FIFOMode;
 8006428:	687b      	ldr	r3, [r7, #4]
 800642a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800642c:	697a      	ldr	r2, [r7, #20]
 800642e:	4313      	orrs	r3, r2
 8006430:	617b      	str	r3, [r7, #20]

    /* the FIFO threshold is not used when the FIFO mode is disabled */
    if(hdma->Init.FIFOMode == DMA_FIFOMODE_ENABLE)
 8006432:	687b      	ldr	r3, [r7, #4]
 8006434:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8006436:	2b04      	cmp	r3, #4
 8006438:	d117      	bne.n	800646a <HAL_DMA_Init+0x316>
    {
      /* Get the FIFO threshold */
      registerValue |= hdma->Init.FIFOThreshold;
 800643a:	687b      	ldr	r3, [r7, #4]
 800643c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800643e:	697a      	ldr	r2, [r7, #20]
 8006440:	4313      	orrs	r3, r2
 8006442:	617b      	str	r3, [r7, #20]

      /* Check compatibility between FIFO threshold level and size of the memory burst */
      /* for INCR4, INCR8, INCR16 */
      if(hdma->Init.MemBurst != DMA_MBURST_SINGLE)
 8006444:	687b      	ldr	r3, [r7, #4]
 8006446:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8006448:	2b00      	cmp	r3, #0
 800644a:	d00e      	beq.n	800646a <HAL_DMA_Init+0x316>
      {
        if (DMA_CheckFifoParam(hdma) != HAL_OK)
 800644c:	6878      	ldr	r0, [r7, #4]
 800644e:	f001 ff1d 	bl	800828c <DMA_CheckFifoParam>
 8006452:	4603      	mov	r3, r0
 8006454:	2b00      	cmp	r3, #0
 8006456:	d008      	beq.n	800646a <HAL_DMA_Init+0x316>
        {
          /* Update error code */
          hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 8006458:	687b      	ldr	r3, [r7, #4]
 800645a:	2240      	movs	r2, #64	@ 0x40
 800645c:	655a      	str	r2, [r3, #84]	@ 0x54

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 800645e:	687b      	ldr	r3, [r7, #4]
 8006460:	2201      	movs	r2, #1
 8006462:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          return HAL_ERROR;
 8006466:	2301      	movs	r3, #1
 8006468:	e197      	b.n	800679a <HAL_DMA_Init+0x646>
        }
      }
    }

    /* Write to DMA Stream FCR */
    ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR = registerValue;
 800646a:	687b      	ldr	r3, [r7, #4]
 800646c:	681b      	ldr	r3, [r3, #0]
 800646e:	697a      	ldr	r2, [r7, #20]
 8006470:	615a      	str	r2, [r3, #20]

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
       DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_dma = (DMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 8006472:	6878      	ldr	r0, [r7, #4]
 8006474:	f001 fe58 	bl	8008128 <DMA_CalcBaseAndBitshift>
 8006478:	4603      	mov	r3, r0
 800647a:	60bb      	str	r3, [r7, #8]

    /* Clear all interrupt flags */
    regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 800647c:	687b      	ldr	r3, [r7, #4]
 800647e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006480:	f003 031f 	and.w	r3, r3, #31
 8006484:	223f      	movs	r2, #63	@ 0x3f
 8006486:	409a      	lsls	r2, r3
 8006488:	68bb      	ldr	r3, [r7, #8]
 800648a:	609a      	str	r2, [r3, #8]
 800648c:	e0cd      	b.n	800662a <HAL_DMA_Init+0x4d6>
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U) /* BDMA instance(s) */
 800648e:	687b      	ldr	r3, [r7, #4]
 8006490:	681b      	ldr	r3, [r3, #0]
 8006492:	4a3b      	ldr	r2, [pc, #236]	@ (8006580 <HAL_DMA_Init+0x42c>)
 8006494:	4293      	cmp	r3, r2
 8006496:	d022      	beq.n	80064de <HAL_DMA_Init+0x38a>
 8006498:	687b      	ldr	r3, [r7, #4]
 800649a:	681b      	ldr	r3, [r3, #0]
 800649c:	4a39      	ldr	r2, [pc, #228]	@ (8006584 <HAL_DMA_Init+0x430>)
 800649e:	4293      	cmp	r3, r2
 80064a0:	d01d      	beq.n	80064de <HAL_DMA_Init+0x38a>
 80064a2:	687b      	ldr	r3, [r7, #4]
 80064a4:	681b      	ldr	r3, [r3, #0]
 80064a6:	4a38      	ldr	r2, [pc, #224]	@ (8006588 <HAL_DMA_Init+0x434>)
 80064a8:	4293      	cmp	r3, r2
 80064aa:	d018      	beq.n	80064de <HAL_DMA_Init+0x38a>
 80064ac:	687b      	ldr	r3, [r7, #4]
 80064ae:	681b      	ldr	r3, [r3, #0]
 80064b0:	4a36      	ldr	r2, [pc, #216]	@ (800658c <HAL_DMA_Init+0x438>)
 80064b2:	4293      	cmp	r3, r2
 80064b4:	d013      	beq.n	80064de <HAL_DMA_Init+0x38a>
 80064b6:	687b      	ldr	r3, [r7, #4]
 80064b8:	681b      	ldr	r3, [r3, #0]
 80064ba:	4a35      	ldr	r2, [pc, #212]	@ (8006590 <HAL_DMA_Init+0x43c>)
 80064bc:	4293      	cmp	r3, r2
 80064be:	d00e      	beq.n	80064de <HAL_DMA_Init+0x38a>
 80064c0:	687b      	ldr	r3, [r7, #4]
 80064c2:	681b      	ldr	r3, [r3, #0]
 80064c4:	4a33      	ldr	r2, [pc, #204]	@ (8006594 <HAL_DMA_Init+0x440>)
 80064c6:	4293      	cmp	r3, r2
 80064c8:	d009      	beq.n	80064de <HAL_DMA_Init+0x38a>
 80064ca:	687b      	ldr	r3, [r7, #4]
 80064cc:	681b      	ldr	r3, [r3, #0]
 80064ce:	4a32      	ldr	r2, [pc, #200]	@ (8006598 <HAL_DMA_Init+0x444>)
 80064d0:	4293      	cmp	r3, r2
 80064d2:	d004      	beq.n	80064de <HAL_DMA_Init+0x38a>
 80064d4:	687b      	ldr	r3, [r7, #4]
 80064d6:	681b      	ldr	r3, [r3, #0]
 80064d8:	4a30      	ldr	r2, [pc, #192]	@ (800659c <HAL_DMA_Init+0x448>)
 80064da:	4293      	cmp	r3, r2
 80064dc:	d101      	bne.n	80064e2 <HAL_DMA_Init+0x38e>
 80064de:	2301      	movs	r3, #1
 80064e0:	e000      	b.n	80064e4 <HAL_DMA_Init+0x390>
 80064e2:	2300      	movs	r3, #0
 80064e4:	2b00      	cmp	r3, #0
 80064e6:	f000 8097 	beq.w	8006618 <HAL_DMA_Init+0x4c4>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 80064ea:	687b      	ldr	r3, [r7, #4]
 80064ec:	681b      	ldr	r3, [r3, #0]
 80064ee:	4a24      	ldr	r2, [pc, #144]	@ (8006580 <HAL_DMA_Init+0x42c>)
 80064f0:	4293      	cmp	r3, r2
 80064f2:	d021      	beq.n	8006538 <HAL_DMA_Init+0x3e4>
 80064f4:	687b      	ldr	r3, [r7, #4]
 80064f6:	681b      	ldr	r3, [r3, #0]
 80064f8:	4a22      	ldr	r2, [pc, #136]	@ (8006584 <HAL_DMA_Init+0x430>)
 80064fa:	4293      	cmp	r3, r2
 80064fc:	d01c      	beq.n	8006538 <HAL_DMA_Init+0x3e4>
 80064fe:	687b      	ldr	r3, [r7, #4]
 8006500:	681b      	ldr	r3, [r3, #0]
 8006502:	4a21      	ldr	r2, [pc, #132]	@ (8006588 <HAL_DMA_Init+0x434>)
 8006504:	4293      	cmp	r3, r2
 8006506:	d017      	beq.n	8006538 <HAL_DMA_Init+0x3e4>
 8006508:	687b      	ldr	r3, [r7, #4]
 800650a:	681b      	ldr	r3, [r3, #0]
 800650c:	4a1f      	ldr	r2, [pc, #124]	@ (800658c <HAL_DMA_Init+0x438>)
 800650e:	4293      	cmp	r3, r2
 8006510:	d012      	beq.n	8006538 <HAL_DMA_Init+0x3e4>
 8006512:	687b      	ldr	r3, [r7, #4]
 8006514:	681b      	ldr	r3, [r3, #0]
 8006516:	4a1e      	ldr	r2, [pc, #120]	@ (8006590 <HAL_DMA_Init+0x43c>)
 8006518:	4293      	cmp	r3, r2
 800651a:	d00d      	beq.n	8006538 <HAL_DMA_Init+0x3e4>
 800651c:	687b      	ldr	r3, [r7, #4]
 800651e:	681b      	ldr	r3, [r3, #0]
 8006520:	4a1c      	ldr	r2, [pc, #112]	@ (8006594 <HAL_DMA_Init+0x440>)
 8006522:	4293      	cmp	r3, r2
 8006524:	d008      	beq.n	8006538 <HAL_DMA_Init+0x3e4>
 8006526:	687b      	ldr	r3, [r7, #4]
 8006528:	681b      	ldr	r3, [r3, #0]
 800652a:	4a1b      	ldr	r2, [pc, #108]	@ (8006598 <HAL_DMA_Init+0x444>)
 800652c:	4293      	cmp	r3, r2
 800652e:	d003      	beq.n	8006538 <HAL_DMA_Init+0x3e4>
 8006530:	687b      	ldr	r3, [r7, #4]
 8006532:	681b      	ldr	r3, [r3, #0]
 8006534:	4a19      	ldr	r2, [pc, #100]	@ (800659c <HAL_DMA_Init+0x448>)
 8006536:	4293      	cmp	r3, r2
      /* Check the request parameter */
      assert_param(IS_BDMA_REQUEST(hdma->Init.Request));
    }

    /* Change DMA peripheral state */
    hdma->State = HAL_DMA_STATE_BUSY;
 8006538:	687b      	ldr	r3, [r7, #4]
 800653a:	2202      	movs	r2, #2
 800653c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Allocate lock resource */
    __HAL_UNLOCK(hdma);
 8006540:	687b      	ldr	r3, [r7, #4]
 8006542:	2200      	movs	r2, #0
 8006544:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    /* Get the CR register value */
    registerValue = ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR;
 8006548:	687b      	ldr	r3, [r7, #4]
 800654a:	681b      	ldr	r3, [r3, #0]
 800654c:	681b      	ldr	r3, [r3, #0]
 800654e:	617b      	str	r3, [r7, #20]

    /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR, MEM2MEM, DBM and CT bits */
    registerValue &= ((uint32_t)~(BDMA_CCR_PL    | BDMA_CCR_MSIZE   | BDMA_CCR_PSIZE  | \
 8006550:	697a      	ldr	r2, [r7, #20]
 8006552:	4b13      	ldr	r3, [pc, #76]	@ (80065a0 <HAL_DMA_Init+0x44c>)
 8006554:	4013      	ands	r3, r2
 8006556:	617b      	str	r3, [r7, #20]
                                  BDMA_CCR_MINC  | BDMA_CCR_PINC    | BDMA_CCR_CIRC   | \
                                  BDMA_CCR_DIR   | BDMA_CCR_MEM2MEM | BDMA_CCR_DBM    | \
                                  BDMA_CCR_CT));

    /* Prepare the DMA Channel configuration */
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 8006558:	687b      	ldr	r3, [r7, #4]
 800655a:	689b      	ldr	r3, [r3, #8]
 800655c:	2b40      	cmp	r3, #64	@ 0x40
 800655e:	d021      	beq.n	80065a4 <HAL_DMA_Init+0x450>
 8006560:	687b      	ldr	r3, [r7, #4]
 8006562:	689b      	ldr	r3, [r3, #8]
 8006564:	2b80      	cmp	r3, #128	@ 0x80
 8006566:	d102      	bne.n	800656e <HAL_DMA_Init+0x41a>
 8006568:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800656c:	e01b      	b.n	80065a6 <HAL_DMA_Init+0x452>
 800656e:	2300      	movs	r3, #0
 8006570:	e019      	b.n	80065a6 <HAL_DMA_Init+0x452>
 8006572:	bf00      	nop
 8006574:	fe10803f 	.word	0xfe10803f
 8006578:	5c001000 	.word	0x5c001000
 800657c:	ffff0000 	.word	0xffff0000
 8006580:	58025408 	.word	0x58025408
 8006584:	5802541c 	.word	0x5802541c
 8006588:	58025430 	.word	0x58025430
 800658c:	58025444 	.word	0x58025444
 8006590:	58025458 	.word	0x58025458
 8006594:	5802546c 	.word	0x5802546c
 8006598:	58025480 	.word	0x58025480
 800659c:	58025494 	.word	0x58025494
 80065a0:	fffe000f 	.word	0xfffe000f
 80065a4:	2310      	movs	r3, #16
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 80065a6:	687a      	ldr	r2, [r7, #4]
 80065a8:	68d2      	ldr	r2, [r2, #12]
 80065aa:	08d2      	lsrs	r2, r2, #3
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 80065ac:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 80065ae:	687b      	ldr	r3, [r7, #4]
 80065b0:	691b      	ldr	r3, [r3, #16]
 80065b2:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PERIPHERAL_INC(hdma->Init.PeriphInc)       |
 80065b4:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 80065b6:	687b      	ldr	r3, [r7, #4]
 80065b8:	695b      	ldr	r3, [r3, #20]
 80065ba:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MEMORY_INC(hdma->Init.MemInc)              |
 80065bc:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 80065be:	687b      	ldr	r3, [r7, #4]
 80065c0:	699b      	ldr	r3, [r3, #24]
 80065c2:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_PDATA_SIZE(hdma->Init.PeriphDataAlignment) |
 80065c4:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 80065c6:	687b      	ldr	r3, [r7, #4]
 80065c8:	69db      	ldr	r3, [r3, #28]
 80065ca:	08db      	lsrs	r3, r3, #3
                      DMA_TO_BDMA_MDATA_SIZE(hdma->Init.MemDataAlignment)    |
 80065cc:	431a      	orrs	r2, r3
                      DMA_TO_BDMA_PRIORITY(hdma->Init.Priority);
 80065ce:	687b      	ldr	r3, [r7, #4]
 80065d0:	6a1b      	ldr	r3, [r3, #32]
 80065d2:	091b      	lsrs	r3, r3, #4
                      DMA_TO_BDMA_MODE(hdma->Init.Mode)                      |
 80065d4:	4313      	orrs	r3, r2
    registerValue |=  DMA_TO_BDMA_DIRECTION(hdma->Init.Direction)            |
 80065d6:	697a      	ldr	r2, [r7, #20]
 80065d8:	4313      	orrs	r3, r2
 80065da:	617b      	str	r3, [r7, #20]

    /* Write to DMA Channel CR register */
    ((BDMA_Channel_TypeDef *)hdma->Instance)->CCR = registerValue;
 80065dc:	687b      	ldr	r3, [r7, #4]
 80065de:	681b      	ldr	r3, [r3, #0]
 80065e0:	697a      	ldr	r2, [r7, #20]
 80065e2:	601a      	str	r2, [r3, #0]

    /* calculation of the channel index */
    hdma->StreamIndex = (((uint32_t)((uint32_t*)hdma->Instance) - (uint32_t)BDMA_Channel0) / ((uint32_t)BDMA_Channel1 - (uint32_t)BDMA_Channel0)) << 2U;
 80065e4:	687b      	ldr	r3, [r7, #4]
 80065e6:	681b      	ldr	r3, [r3, #0]
 80065e8:	461a      	mov	r2, r3
 80065ea:	4b6e      	ldr	r3, [pc, #440]	@ (80067a4 <HAL_DMA_Init+0x650>)
 80065ec:	4413      	add	r3, r2
 80065ee:	4a6e      	ldr	r2, [pc, #440]	@ (80067a8 <HAL_DMA_Init+0x654>)
 80065f0:	fba2 2303 	umull	r2, r3, r2, r3
 80065f4:	091b      	lsrs	r3, r3, #4
 80065f6:	009a      	lsls	r2, r3, #2
 80065f8:	687b      	ldr	r3, [r7, #4]
 80065fa:	65da      	str	r2, [r3, #92]	@ 0x5c

    /* Initialize StreamBaseAddress and StreamIndex parameters to be used to calculate
    DMA steam Base Address needed by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */
    regs_bdma = (BDMA_Base_Registers *)DMA_CalcBaseAndBitshift(hdma);
 80065fc:	6878      	ldr	r0, [r7, #4]
 80065fe:	f001 fd93 	bl	8008128 <DMA_CalcBaseAndBitshift>
 8006602:	4603      	mov	r3, r0
 8006604:	60fb      	str	r3, [r7, #12]

    /* Clear all interrupt flags */
    regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 8006606:	687b      	ldr	r3, [r7, #4]
 8006608:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800660a:	f003 031f 	and.w	r3, r3, #31
 800660e:	2201      	movs	r2, #1
 8006610:	409a      	lsls	r2, r3
 8006612:	68fb      	ldr	r3, [r7, #12]
 8006614:	605a      	str	r2, [r3, #4]
 8006616:	e008      	b.n	800662a <HAL_DMA_Init+0x4d6>
  }
  else
  {
    hdma->ErrorCode = HAL_DMA_ERROR_PARAM;
 8006618:	687b      	ldr	r3, [r7, #4]
 800661a:	2240      	movs	r2, #64	@ 0x40
 800661c:	655a      	str	r2, [r3, #84]	@ 0x54
    hdma->State     = HAL_DMA_STATE_ERROR;
 800661e:	687b      	ldr	r3, [r7, #4]
 8006620:	2203      	movs	r2, #3
 8006622:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    return HAL_ERROR;
 8006626:	2301      	movs	r3, #1
 8006628:	e0b7      	b.n	800679a <HAL_DMA_Init+0x646>
  }

  if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 800662a:	687b      	ldr	r3, [r7, #4]
 800662c:	681b      	ldr	r3, [r3, #0]
 800662e:	4a5f      	ldr	r2, [pc, #380]	@ (80067ac <HAL_DMA_Init+0x658>)
 8006630:	4293      	cmp	r3, r2
 8006632:	d072      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 8006634:	687b      	ldr	r3, [r7, #4]
 8006636:	681b      	ldr	r3, [r3, #0]
 8006638:	4a5d      	ldr	r2, [pc, #372]	@ (80067b0 <HAL_DMA_Init+0x65c>)
 800663a:	4293      	cmp	r3, r2
 800663c:	d06d      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 800663e:	687b      	ldr	r3, [r7, #4]
 8006640:	681b      	ldr	r3, [r3, #0]
 8006642:	4a5c      	ldr	r2, [pc, #368]	@ (80067b4 <HAL_DMA_Init+0x660>)
 8006644:	4293      	cmp	r3, r2
 8006646:	d068      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 8006648:	687b      	ldr	r3, [r7, #4]
 800664a:	681b      	ldr	r3, [r3, #0]
 800664c:	4a5a      	ldr	r2, [pc, #360]	@ (80067b8 <HAL_DMA_Init+0x664>)
 800664e:	4293      	cmp	r3, r2
 8006650:	d063      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 8006652:	687b      	ldr	r3, [r7, #4]
 8006654:	681b      	ldr	r3, [r3, #0]
 8006656:	4a59      	ldr	r2, [pc, #356]	@ (80067bc <HAL_DMA_Init+0x668>)
 8006658:	4293      	cmp	r3, r2
 800665a:	d05e      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 800665c:	687b      	ldr	r3, [r7, #4]
 800665e:	681b      	ldr	r3, [r3, #0]
 8006660:	4a57      	ldr	r2, [pc, #348]	@ (80067c0 <HAL_DMA_Init+0x66c>)
 8006662:	4293      	cmp	r3, r2
 8006664:	d059      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 8006666:	687b      	ldr	r3, [r7, #4]
 8006668:	681b      	ldr	r3, [r3, #0]
 800666a:	4a56      	ldr	r2, [pc, #344]	@ (80067c4 <HAL_DMA_Init+0x670>)
 800666c:	4293      	cmp	r3, r2
 800666e:	d054      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 8006670:	687b      	ldr	r3, [r7, #4]
 8006672:	681b      	ldr	r3, [r3, #0]
 8006674:	4a54      	ldr	r2, [pc, #336]	@ (80067c8 <HAL_DMA_Init+0x674>)
 8006676:	4293      	cmp	r3, r2
 8006678:	d04f      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 800667a:	687b      	ldr	r3, [r7, #4]
 800667c:	681b      	ldr	r3, [r3, #0]
 800667e:	4a53      	ldr	r2, [pc, #332]	@ (80067cc <HAL_DMA_Init+0x678>)
 8006680:	4293      	cmp	r3, r2
 8006682:	d04a      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 8006684:	687b      	ldr	r3, [r7, #4]
 8006686:	681b      	ldr	r3, [r3, #0]
 8006688:	4a51      	ldr	r2, [pc, #324]	@ (80067d0 <HAL_DMA_Init+0x67c>)
 800668a:	4293      	cmp	r3, r2
 800668c:	d045      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 800668e:	687b      	ldr	r3, [r7, #4]
 8006690:	681b      	ldr	r3, [r3, #0]
 8006692:	4a50      	ldr	r2, [pc, #320]	@ (80067d4 <HAL_DMA_Init+0x680>)
 8006694:	4293      	cmp	r3, r2
 8006696:	d040      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 8006698:	687b      	ldr	r3, [r7, #4]
 800669a:	681b      	ldr	r3, [r3, #0]
 800669c:	4a4e      	ldr	r2, [pc, #312]	@ (80067d8 <HAL_DMA_Init+0x684>)
 800669e:	4293      	cmp	r3, r2
 80066a0:	d03b      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066a2:	687b      	ldr	r3, [r7, #4]
 80066a4:	681b      	ldr	r3, [r3, #0]
 80066a6:	4a4d      	ldr	r2, [pc, #308]	@ (80067dc <HAL_DMA_Init+0x688>)
 80066a8:	4293      	cmp	r3, r2
 80066aa:	d036      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066ac:	687b      	ldr	r3, [r7, #4]
 80066ae:	681b      	ldr	r3, [r3, #0]
 80066b0:	4a4b      	ldr	r2, [pc, #300]	@ (80067e0 <HAL_DMA_Init+0x68c>)
 80066b2:	4293      	cmp	r3, r2
 80066b4:	d031      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066b6:	687b      	ldr	r3, [r7, #4]
 80066b8:	681b      	ldr	r3, [r3, #0]
 80066ba:	4a4a      	ldr	r2, [pc, #296]	@ (80067e4 <HAL_DMA_Init+0x690>)
 80066bc:	4293      	cmp	r3, r2
 80066be:	d02c      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066c0:	687b      	ldr	r3, [r7, #4]
 80066c2:	681b      	ldr	r3, [r3, #0]
 80066c4:	4a48      	ldr	r2, [pc, #288]	@ (80067e8 <HAL_DMA_Init+0x694>)
 80066c6:	4293      	cmp	r3, r2
 80066c8:	d027      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066ca:	687b      	ldr	r3, [r7, #4]
 80066cc:	681b      	ldr	r3, [r3, #0]
 80066ce:	4a47      	ldr	r2, [pc, #284]	@ (80067ec <HAL_DMA_Init+0x698>)
 80066d0:	4293      	cmp	r3, r2
 80066d2:	d022      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066d4:	687b      	ldr	r3, [r7, #4]
 80066d6:	681b      	ldr	r3, [r3, #0]
 80066d8:	4a45      	ldr	r2, [pc, #276]	@ (80067f0 <HAL_DMA_Init+0x69c>)
 80066da:	4293      	cmp	r3, r2
 80066dc:	d01d      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066de:	687b      	ldr	r3, [r7, #4]
 80066e0:	681b      	ldr	r3, [r3, #0]
 80066e2:	4a44      	ldr	r2, [pc, #272]	@ (80067f4 <HAL_DMA_Init+0x6a0>)
 80066e4:	4293      	cmp	r3, r2
 80066e6:	d018      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066e8:	687b      	ldr	r3, [r7, #4]
 80066ea:	681b      	ldr	r3, [r3, #0]
 80066ec:	4a42      	ldr	r2, [pc, #264]	@ (80067f8 <HAL_DMA_Init+0x6a4>)
 80066ee:	4293      	cmp	r3, r2
 80066f0:	d013      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066f2:	687b      	ldr	r3, [r7, #4]
 80066f4:	681b      	ldr	r3, [r3, #0]
 80066f6:	4a41      	ldr	r2, [pc, #260]	@ (80067fc <HAL_DMA_Init+0x6a8>)
 80066f8:	4293      	cmp	r3, r2
 80066fa:	d00e      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 80066fc:	687b      	ldr	r3, [r7, #4]
 80066fe:	681b      	ldr	r3, [r3, #0]
 8006700:	4a3f      	ldr	r2, [pc, #252]	@ (8006800 <HAL_DMA_Init+0x6ac>)
 8006702:	4293      	cmp	r3, r2
 8006704:	d009      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 8006706:	687b      	ldr	r3, [r7, #4]
 8006708:	681b      	ldr	r3, [r3, #0]
 800670a:	4a3e      	ldr	r2, [pc, #248]	@ (8006804 <HAL_DMA_Init+0x6b0>)
 800670c:	4293      	cmp	r3, r2
 800670e:	d004      	beq.n	800671a <HAL_DMA_Init+0x5c6>
 8006710:	687b      	ldr	r3, [r7, #4]
 8006712:	681b      	ldr	r3, [r3, #0]
 8006714:	4a3c      	ldr	r2, [pc, #240]	@ (8006808 <HAL_DMA_Init+0x6b4>)
 8006716:	4293      	cmp	r3, r2
 8006718:	d101      	bne.n	800671e <HAL_DMA_Init+0x5ca>
 800671a:	2301      	movs	r3, #1
 800671c:	e000      	b.n	8006720 <HAL_DMA_Init+0x5cc>
 800671e:	2300      	movs	r3, #0
 8006720:	2b00      	cmp	r3, #0
 8006722:	d032      	beq.n	800678a <HAL_DMA_Init+0x636>
  {
    /* Initialize parameters for DMAMUX channel :
    DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask
    */
    DMA_CalcDMAMUXChannelBaseAndMask(hdma);
 8006724:	6878      	ldr	r0, [r7, #4]
 8006726:	f001 fe2d 	bl	8008384 <DMA_CalcDMAMUXChannelBaseAndMask>

    if(hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
 800672a:	687b      	ldr	r3, [r7, #4]
 800672c:	689b      	ldr	r3, [r3, #8]
 800672e:	2b80      	cmp	r3, #128	@ 0x80
 8006730:	d102      	bne.n	8006738 <HAL_DMA_Init+0x5e4>
    {
      /* if memory to memory force the request to 0*/
      hdma->Init.Request = DMA_REQUEST_MEM2MEM;
 8006732:	687b      	ldr	r3, [r7, #4]
 8006734:	2200      	movs	r2, #0
 8006736:	605a      	str	r2, [r3, #4]
    }

    /* Set peripheral request  to DMAMUX channel */
    hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);
 8006738:	687b      	ldr	r3, [r7, #4]
 800673a:	685a      	ldr	r2, [r3, #4]
 800673c:	687b      	ldr	r3, [r7, #4]
 800673e:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8006740:	b2d2      	uxtb	r2, r2
 8006742:	601a      	str	r2, [r3, #0]

    /* Clear the DMAMUX synchro overrun flag */
    hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 8006744:	687b      	ldr	r3, [r7, #4]
 8006746:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8006748:	687a      	ldr	r2, [r7, #4]
 800674a:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 800674c:	605a      	str	r2, [r3, #4]

    /* Initialize parameters for DMAMUX request generator :
    if the DMA request is DMA_REQUEST_GENERATOR0 to DMA_REQUEST_GENERATOR7
    */
    if((hdma->Init.Request >= DMA_REQUEST_GENERATOR0) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR7))
 800674e:	687b      	ldr	r3, [r7, #4]
 8006750:	685b      	ldr	r3, [r3, #4]
 8006752:	2b00      	cmp	r3, #0
 8006754:	d010      	beq.n	8006778 <HAL_DMA_Init+0x624>
 8006756:	687b      	ldr	r3, [r7, #4]
 8006758:	685b      	ldr	r3, [r3, #4]
 800675a:	2b08      	cmp	r3, #8
 800675c:	d80c      	bhi.n	8006778 <HAL_DMA_Init+0x624>
    {
      /* Initialize parameters for DMAMUX request generator :
      DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask */
      DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
 800675e:	6878      	ldr	r0, [r7, #4]
 8006760:	f001 feaa 	bl	80084b8 <DMA_CalcDMAMUXRequestGenBaseAndMask>

      /* Reset the DMAMUX request generator register */
      hdma->DMAmuxRequestGen->RGCR = 0U;
 8006764:	687b      	ldr	r3, [r7, #4]
 8006766:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006768:	2200      	movs	r2, #0
 800676a:	601a      	str	r2, [r3, #0]

      /* Clear the DMAMUX request generator overrun flag */
      hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 800676c:	687b      	ldr	r3, [r7, #4]
 800676e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8006770:	687a      	ldr	r2, [r7, #4]
 8006772:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8006774:	605a      	str	r2, [r3, #4]
 8006776:	e008      	b.n	800678a <HAL_DMA_Init+0x636>
    }
    else
    {
      hdma->DMAmuxRequestGen = 0U;
 8006778:	687b      	ldr	r3, [r7, #4]
 800677a:	2200      	movs	r2, #0
 800677c:	66da      	str	r2, [r3, #108]	@ 0x6c
      hdma->DMAmuxRequestGenStatus = 0U;
 800677e:	687b      	ldr	r3, [r7, #4]
 8006780:	2200      	movs	r2, #0
 8006782:	671a      	str	r2, [r3, #112]	@ 0x70
      hdma->DMAmuxRequestGenStatusMask = 0U;
 8006784:	687b      	ldr	r3, [r7, #4]
 8006786:	2200      	movs	r2, #0
 8006788:	675a      	str	r2, [r3, #116]	@ 0x74
    }
  }

  /* Initialize the error code */
  hdma->ErrorCode = HAL_DMA_ERROR_NONE;
 800678a:	687b      	ldr	r3, [r7, #4]
 800678c:	2200      	movs	r2, #0
 800678e:	655a      	str	r2, [r3, #84]	@ 0x54

  /* Initialize the DMA state */
  hdma->State = HAL_DMA_STATE_READY;
 8006790:	687b      	ldr	r3, [r7, #4]
 8006792:	2201      	movs	r2, #1
 8006794:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

  return HAL_OK;
 8006798:	2300      	movs	r3, #0
}
 800679a:	4618      	mov	r0, r3
 800679c:	3718      	adds	r7, #24
 800679e:	46bd      	mov	sp, r7
 80067a0:	bd80      	pop	{r7, pc}
 80067a2:	bf00      	nop
 80067a4:	a7fdabf8 	.word	0xa7fdabf8
 80067a8:	cccccccd 	.word	0xcccccccd
 80067ac:	40020010 	.word	0x40020010
 80067b0:	40020028 	.word	0x40020028
 80067b4:	40020040 	.word	0x40020040
 80067b8:	40020058 	.word	0x40020058
 80067bc:	40020070 	.word	0x40020070
 80067c0:	40020088 	.word	0x40020088
 80067c4:	400200a0 	.word	0x400200a0
 80067c8:	400200b8 	.word	0x400200b8
 80067cc:	40020410 	.word	0x40020410
 80067d0:	40020428 	.word	0x40020428
 80067d4:	40020440 	.word	0x40020440
 80067d8:	40020458 	.word	0x40020458
 80067dc:	40020470 	.word	0x40020470
 80067e0:	40020488 	.word	0x40020488
 80067e4:	400204a0 	.word	0x400204a0
 80067e8:	400204b8 	.word	0x400204b8
 80067ec:	58025408 	.word	0x58025408
 80067f0:	5802541c 	.word	0x5802541c
 80067f4:	58025430 	.word	0x58025430
 80067f8:	58025444 	.word	0x58025444
 80067fc:	58025458 	.word	0x58025458
 8006800:	5802546c 	.word	0x5802546c
 8006804:	58025480 	.word	0x58025480
 8006808:	58025494 	.word	0x58025494

0800680c <HAL_DMA_Abort>:
  *        and the Stream will be effectively disabled only after the transfer of
  *        this single data is finished.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
{
 800680c:	b580      	push	{r7, lr}
 800680e:	b086      	sub	sp, #24
 8006810:	af00      	add	r7, sp, #0
 8006812:	6078      	str	r0, [r7, #4]
  /* calculate DMA base and stream number */
  DMA_Base_Registers *regs_dma;
  BDMA_Base_Registers *regs_bdma;
  const __IO uint32_t *enableRegister;

  uint32_t tickstart = HAL_GetTick();
 8006814:	f7ff f8f0 	bl	80059f8 <HAL_GetTick>
 8006818:	6138      	str	r0, [r7, #16]

 /* Check the DMA peripheral handle */
  if(hdma == NULL)
 800681a:	687b      	ldr	r3, [r7, #4]
 800681c:	2b00      	cmp	r3, #0
 800681e:	d101      	bne.n	8006824 <HAL_DMA_Abort+0x18>
  {
    return HAL_ERROR;
 8006820:	2301      	movs	r3, #1
 8006822:	e2dc      	b.n	8006dde <HAL_DMA_Abort+0x5d2>
  }

  /* Check the DMA peripheral state */
  if(hdma->State != HAL_DMA_STATE_BUSY)
 8006824:	687b      	ldr	r3, [r7, #4]
 8006826:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 800682a:	b2db      	uxtb	r3, r3
 800682c:	2b02      	cmp	r3, #2
 800682e:	d008      	beq.n	8006842 <HAL_DMA_Abort+0x36>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 8006830:	687b      	ldr	r3, [r7, #4]
 8006832:	2280      	movs	r2, #128	@ 0x80
 8006834:	655a      	str	r2, [r3, #84]	@ 0x54

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 8006836:	687b      	ldr	r3, [r7, #4]
 8006838:	2200      	movs	r2, #0
 800683a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

    return HAL_ERROR;
 800683e:	2301      	movs	r3, #1
 8006840:	e2cd      	b.n	8006dde <HAL_DMA_Abort+0x5d2>
  }
  else
  {
    /* Disable all the transfer interrupts */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8006842:	687b      	ldr	r3, [r7, #4]
 8006844:	681b      	ldr	r3, [r3, #0]
 8006846:	4a76      	ldr	r2, [pc, #472]	@ (8006a20 <HAL_DMA_Abort+0x214>)
 8006848:	4293      	cmp	r3, r2
 800684a:	d04a      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 800684c:	687b      	ldr	r3, [r7, #4]
 800684e:	681b      	ldr	r3, [r3, #0]
 8006850:	4a74      	ldr	r2, [pc, #464]	@ (8006a24 <HAL_DMA_Abort+0x218>)
 8006852:	4293      	cmp	r3, r2
 8006854:	d045      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 8006856:	687b      	ldr	r3, [r7, #4]
 8006858:	681b      	ldr	r3, [r3, #0]
 800685a:	4a73      	ldr	r2, [pc, #460]	@ (8006a28 <HAL_DMA_Abort+0x21c>)
 800685c:	4293      	cmp	r3, r2
 800685e:	d040      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 8006860:	687b      	ldr	r3, [r7, #4]
 8006862:	681b      	ldr	r3, [r3, #0]
 8006864:	4a71      	ldr	r2, [pc, #452]	@ (8006a2c <HAL_DMA_Abort+0x220>)
 8006866:	4293      	cmp	r3, r2
 8006868:	d03b      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 800686a:	687b      	ldr	r3, [r7, #4]
 800686c:	681b      	ldr	r3, [r3, #0]
 800686e:	4a70      	ldr	r2, [pc, #448]	@ (8006a30 <HAL_DMA_Abort+0x224>)
 8006870:	4293      	cmp	r3, r2
 8006872:	d036      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 8006874:	687b      	ldr	r3, [r7, #4]
 8006876:	681b      	ldr	r3, [r3, #0]
 8006878:	4a6e      	ldr	r2, [pc, #440]	@ (8006a34 <HAL_DMA_Abort+0x228>)
 800687a:	4293      	cmp	r3, r2
 800687c:	d031      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 800687e:	687b      	ldr	r3, [r7, #4]
 8006880:	681b      	ldr	r3, [r3, #0]
 8006882:	4a6d      	ldr	r2, [pc, #436]	@ (8006a38 <HAL_DMA_Abort+0x22c>)
 8006884:	4293      	cmp	r3, r2
 8006886:	d02c      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 8006888:	687b      	ldr	r3, [r7, #4]
 800688a:	681b      	ldr	r3, [r3, #0]
 800688c:	4a6b      	ldr	r2, [pc, #428]	@ (8006a3c <HAL_DMA_Abort+0x230>)
 800688e:	4293      	cmp	r3, r2
 8006890:	d027      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 8006892:	687b      	ldr	r3, [r7, #4]
 8006894:	681b      	ldr	r3, [r3, #0]
 8006896:	4a6a      	ldr	r2, [pc, #424]	@ (8006a40 <HAL_DMA_Abort+0x234>)
 8006898:	4293      	cmp	r3, r2
 800689a:	d022      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 800689c:	687b      	ldr	r3, [r7, #4]
 800689e:	681b      	ldr	r3, [r3, #0]
 80068a0:	4a68      	ldr	r2, [pc, #416]	@ (8006a44 <HAL_DMA_Abort+0x238>)
 80068a2:	4293      	cmp	r3, r2
 80068a4:	d01d      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 80068a6:	687b      	ldr	r3, [r7, #4]
 80068a8:	681b      	ldr	r3, [r3, #0]
 80068aa:	4a67      	ldr	r2, [pc, #412]	@ (8006a48 <HAL_DMA_Abort+0x23c>)
 80068ac:	4293      	cmp	r3, r2
 80068ae:	d018      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 80068b0:	687b      	ldr	r3, [r7, #4]
 80068b2:	681b      	ldr	r3, [r3, #0]
 80068b4:	4a65      	ldr	r2, [pc, #404]	@ (8006a4c <HAL_DMA_Abort+0x240>)
 80068b6:	4293      	cmp	r3, r2
 80068b8:	d013      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 80068ba:	687b      	ldr	r3, [r7, #4]
 80068bc:	681b      	ldr	r3, [r3, #0]
 80068be:	4a64      	ldr	r2, [pc, #400]	@ (8006a50 <HAL_DMA_Abort+0x244>)
 80068c0:	4293      	cmp	r3, r2
 80068c2:	d00e      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 80068c4:	687b      	ldr	r3, [r7, #4]
 80068c6:	681b      	ldr	r3, [r3, #0]
 80068c8:	4a62      	ldr	r2, [pc, #392]	@ (8006a54 <HAL_DMA_Abort+0x248>)
 80068ca:	4293      	cmp	r3, r2
 80068cc:	d009      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 80068ce:	687b      	ldr	r3, [r7, #4]
 80068d0:	681b      	ldr	r3, [r3, #0]
 80068d2:	4a61      	ldr	r2, [pc, #388]	@ (8006a58 <HAL_DMA_Abort+0x24c>)
 80068d4:	4293      	cmp	r3, r2
 80068d6:	d004      	beq.n	80068e2 <HAL_DMA_Abort+0xd6>
 80068d8:	687b      	ldr	r3, [r7, #4]
 80068da:	681b      	ldr	r3, [r3, #0]
 80068dc:	4a5f      	ldr	r2, [pc, #380]	@ (8006a5c <HAL_DMA_Abort+0x250>)
 80068de:	4293      	cmp	r3, r2
 80068e0:	d101      	bne.n	80068e6 <HAL_DMA_Abort+0xda>
 80068e2:	2301      	movs	r3, #1
 80068e4:	e000      	b.n	80068e8 <HAL_DMA_Abort+0xdc>
 80068e6:	2300      	movs	r3, #0
 80068e8:	2b00      	cmp	r3, #0
 80068ea:	d013      	beq.n	8006914 <HAL_DMA_Abort+0x108>
    {
       /* Disable DMA All Interrupts  */
      ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME | DMA_IT_HT);
 80068ec:	687b      	ldr	r3, [r7, #4]
 80068ee:	681b      	ldr	r3, [r3, #0]
 80068f0:	681a      	ldr	r2, [r3, #0]
 80068f2:	687b      	ldr	r3, [r7, #4]
 80068f4:	681b      	ldr	r3, [r3, #0]
 80068f6:	f022 021e 	bic.w	r2, r2, #30
 80068fa:	601a      	str	r2, [r3, #0]
      ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 80068fc:	687b      	ldr	r3, [r7, #4]
 80068fe:	681b      	ldr	r3, [r3, #0]
 8006900:	695a      	ldr	r2, [r3, #20]
 8006902:	687b      	ldr	r3, [r7, #4]
 8006904:	681b      	ldr	r3, [r3, #0]
 8006906:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 800690a:	615a      	str	r2, [r3, #20]

      enableRegister = (__IO uint32_t *)(&(((DMA_Stream_TypeDef   *)hdma->Instance)->CR));
 800690c:	687b      	ldr	r3, [r7, #4]
 800690e:	681b      	ldr	r3, [r3, #0]
 8006910:	617b      	str	r3, [r7, #20]
 8006912:	e00a      	b.n	800692a <HAL_DMA_Abort+0x11e>
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 8006914:	687b      	ldr	r3, [r7, #4]
 8006916:	681b      	ldr	r3, [r3, #0]
 8006918:	681a      	ldr	r2, [r3, #0]
 800691a:	687b      	ldr	r3, [r7, #4]
 800691c:	681b      	ldr	r3, [r3, #0]
 800691e:	f022 020e 	bic.w	r2, r2, #14
 8006922:	601a      	str	r2, [r3, #0]

      enableRegister = (__IO uint32_t *)(&(((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR));
 8006924:	687b      	ldr	r3, [r7, #4]
 8006926:	681b      	ldr	r3, [r3, #0]
 8006928:	617b      	str	r3, [r7, #20]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 800692a:	687b      	ldr	r3, [r7, #4]
 800692c:	681b      	ldr	r3, [r3, #0]
 800692e:	4a3c      	ldr	r2, [pc, #240]	@ (8006a20 <HAL_DMA_Abort+0x214>)
 8006930:	4293      	cmp	r3, r2
 8006932:	d072      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 8006934:	687b      	ldr	r3, [r7, #4]
 8006936:	681b      	ldr	r3, [r3, #0]
 8006938:	4a3a      	ldr	r2, [pc, #232]	@ (8006a24 <HAL_DMA_Abort+0x218>)
 800693a:	4293      	cmp	r3, r2
 800693c:	d06d      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 800693e:	687b      	ldr	r3, [r7, #4]
 8006940:	681b      	ldr	r3, [r3, #0]
 8006942:	4a39      	ldr	r2, [pc, #228]	@ (8006a28 <HAL_DMA_Abort+0x21c>)
 8006944:	4293      	cmp	r3, r2
 8006946:	d068      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 8006948:	687b      	ldr	r3, [r7, #4]
 800694a:	681b      	ldr	r3, [r3, #0]
 800694c:	4a37      	ldr	r2, [pc, #220]	@ (8006a2c <HAL_DMA_Abort+0x220>)
 800694e:	4293      	cmp	r3, r2
 8006950:	d063      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 8006952:	687b      	ldr	r3, [r7, #4]
 8006954:	681b      	ldr	r3, [r3, #0]
 8006956:	4a36      	ldr	r2, [pc, #216]	@ (8006a30 <HAL_DMA_Abort+0x224>)
 8006958:	4293      	cmp	r3, r2
 800695a:	d05e      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 800695c:	687b      	ldr	r3, [r7, #4]
 800695e:	681b      	ldr	r3, [r3, #0]
 8006960:	4a34      	ldr	r2, [pc, #208]	@ (8006a34 <HAL_DMA_Abort+0x228>)
 8006962:	4293      	cmp	r3, r2
 8006964:	d059      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 8006966:	687b      	ldr	r3, [r7, #4]
 8006968:	681b      	ldr	r3, [r3, #0]
 800696a:	4a33      	ldr	r2, [pc, #204]	@ (8006a38 <HAL_DMA_Abort+0x22c>)
 800696c:	4293      	cmp	r3, r2
 800696e:	d054      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 8006970:	687b      	ldr	r3, [r7, #4]
 8006972:	681b      	ldr	r3, [r3, #0]
 8006974:	4a31      	ldr	r2, [pc, #196]	@ (8006a3c <HAL_DMA_Abort+0x230>)
 8006976:	4293      	cmp	r3, r2
 8006978:	d04f      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 800697a:	687b      	ldr	r3, [r7, #4]
 800697c:	681b      	ldr	r3, [r3, #0]
 800697e:	4a30      	ldr	r2, [pc, #192]	@ (8006a40 <HAL_DMA_Abort+0x234>)
 8006980:	4293      	cmp	r3, r2
 8006982:	d04a      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 8006984:	687b      	ldr	r3, [r7, #4]
 8006986:	681b      	ldr	r3, [r3, #0]
 8006988:	4a2e      	ldr	r2, [pc, #184]	@ (8006a44 <HAL_DMA_Abort+0x238>)
 800698a:	4293      	cmp	r3, r2
 800698c:	d045      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 800698e:	687b      	ldr	r3, [r7, #4]
 8006990:	681b      	ldr	r3, [r3, #0]
 8006992:	4a2d      	ldr	r2, [pc, #180]	@ (8006a48 <HAL_DMA_Abort+0x23c>)
 8006994:	4293      	cmp	r3, r2
 8006996:	d040      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 8006998:	687b      	ldr	r3, [r7, #4]
 800699a:	681b      	ldr	r3, [r3, #0]
 800699c:	4a2b      	ldr	r2, [pc, #172]	@ (8006a4c <HAL_DMA_Abort+0x240>)
 800699e:	4293      	cmp	r3, r2
 80069a0:	d03b      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069a2:	687b      	ldr	r3, [r7, #4]
 80069a4:	681b      	ldr	r3, [r3, #0]
 80069a6:	4a2a      	ldr	r2, [pc, #168]	@ (8006a50 <HAL_DMA_Abort+0x244>)
 80069a8:	4293      	cmp	r3, r2
 80069aa:	d036      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069ac:	687b      	ldr	r3, [r7, #4]
 80069ae:	681b      	ldr	r3, [r3, #0]
 80069b0:	4a28      	ldr	r2, [pc, #160]	@ (8006a54 <HAL_DMA_Abort+0x248>)
 80069b2:	4293      	cmp	r3, r2
 80069b4:	d031      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069b6:	687b      	ldr	r3, [r7, #4]
 80069b8:	681b      	ldr	r3, [r3, #0]
 80069ba:	4a27      	ldr	r2, [pc, #156]	@ (8006a58 <HAL_DMA_Abort+0x24c>)
 80069bc:	4293      	cmp	r3, r2
 80069be:	d02c      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069c0:	687b      	ldr	r3, [r7, #4]
 80069c2:	681b      	ldr	r3, [r3, #0]
 80069c4:	4a25      	ldr	r2, [pc, #148]	@ (8006a5c <HAL_DMA_Abort+0x250>)
 80069c6:	4293      	cmp	r3, r2
 80069c8:	d027      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069ca:	687b      	ldr	r3, [r7, #4]
 80069cc:	681b      	ldr	r3, [r3, #0]
 80069ce:	4a24      	ldr	r2, [pc, #144]	@ (8006a60 <HAL_DMA_Abort+0x254>)
 80069d0:	4293      	cmp	r3, r2
 80069d2:	d022      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069d4:	687b      	ldr	r3, [r7, #4]
 80069d6:	681b      	ldr	r3, [r3, #0]
 80069d8:	4a22      	ldr	r2, [pc, #136]	@ (8006a64 <HAL_DMA_Abort+0x258>)
 80069da:	4293      	cmp	r3, r2
 80069dc:	d01d      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069de:	687b      	ldr	r3, [r7, #4]
 80069e0:	681b      	ldr	r3, [r3, #0]
 80069e2:	4a21      	ldr	r2, [pc, #132]	@ (8006a68 <HAL_DMA_Abort+0x25c>)
 80069e4:	4293      	cmp	r3, r2
 80069e6:	d018      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069e8:	687b      	ldr	r3, [r7, #4]
 80069ea:	681b      	ldr	r3, [r3, #0]
 80069ec:	4a1f      	ldr	r2, [pc, #124]	@ (8006a6c <HAL_DMA_Abort+0x260>)
 80069ee:	4293      	cmp	r3, r2
 80069f0:	d013      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069f2:	687b      	ldr	r3, [r7, #4]
 80069f4:	681b      	ldr	r3, [r3, #0]
 80069f6:	4a1e      	ldr	r2, [pc, #120]	@ (8006a70 <HAL_DMA_Abort+0x264>)
 80069f8:	4293      	cmp	r3, r2
 80069fa:	d00e      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 80069fc:	687b      	ldr	r3, [r7, #4]
 80069fe:	681b      	ldr	r3, [r3, #0]
 8006a00:	4a1c      	ldr	r2, [pc, #112]	@ (8006a74 <HAL_DMA_Abort+0x268>)
 8006a02:	4293      	cmp	r3, r2
 8006a04:	d009      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 8006a06:	687b      	ldr	r3, [r7, #4]
 8006a08:	681b      	ldr	r3, [r3, #0]
 8006a0a:	4a1b      	ldr	r2, [pc, #108]	@ (8006a78 <HAL_DMA_Abort+0x26c>)
 8006a0c:	4293      	cmp	r3, r2
 8006a0e:	d004      	beq.n	8006a1a <HAL_DMA_Abort+0x20e>
 8006a10:	687b      	ldr	r3, [r7, #4]
 8006a12:	681b      	ldr	r3, [r3, #0]
 8006a14:	4a19      	ldr	r2, [pc, #100]	@ (8006a7c <HAL_DMA_Abort+0x270>)
 8006a16:	4293      	cmp	r3, r2
 8006a18:	d132      	bne.n	8006a80 <HAL_DMA_Abort+0x274>
 8006a1a:	2301      	movs	r3, #1
 8006a1c:	e031      	b.n	8006a82 <HAL_DMA_Abort+0x276>
 8006a1e:	bf00      	nop
 8006a20:	40020010 	.word	0x40020010
 8006a24:	40020028 	.word	0x40020028
 8006a28:	40020040 	.word	0x40020040
 8006a2c:	40020058 	.word	0x40020058
 8006a30:	40020070 	.word	0x40020070
 8006a34:	40020088 	.word	0x40020088
 8006a38:	400200a0 	.word	0x400200a0
 8006a3c:	400200b8 	.word	0x400200b8
 8006a40:	40020410 	.word	0x40020410
 8006a44:	40020428 	.word	0x40020428
 8006a48:	40020440 	.word	0x40020440
 8006a4c:	40020458 	.word	0x40020458
 8006a50:	40020470 	.word	0x40020470
 8006a54:	40020488 	.word	0x40020488
 8006a58:	400204a0 	.word	0x400204a0
 8006a5c:	400204b8 	.word	0x400204b8
 8006a60:	58025408 	.word	0x58025408
 8006a64:	5802541c 	.word	0x5802541c
 8006a68:	58025430 	.word	0x58025430
 8006a6c:	58025444 	.word	0x58025444
 8006a70:	58025458 	.word	0x58025458
 8006a74:	5802546c 	.word	0x5802546c
 8006a78:	58025480 	.word	0x58025480
 8006a7c:	58025494 	.word	0x58025494
 8006a80:	2300      	movs	r3, #0
 8006a82:	2b00      	cmp	r3, #0
 8006a84:	d007      	beq.n	8006a96 <HAL_DMA_Abort+0x28a>
    {
      /* disable the DMAMUX sync overrun IT */
      hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 8006a86:	687b      	ldr	r3, [r7, #4]
 8006a88:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8006a8a:	681a      	ldr	r2, [r3, #0]
 8006a8c:	687b      	ldr	r3, [r7, #4]
 8006a8e:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8006a90:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006a94:	601a      	str	r2, [r3, #0]
    }

    /* Disable the stream */
    __HAL_DMA_DISABLE(hdma);
 8006a96:	687b      	ldr	r3, [r7, #4]
 8006a98:	681b      	ldr	r3, [r3, #0]
 8006a9a:	4a6d      	ldr	r2, [pc, #436]	@ (8006c50 <HAL_DMA_Abort+0x444>)
 8006a9c:	4293      	cmp	r3, r2
 8006a9e:	d04a      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006aa0:	687b      	ldr	r3, [r7, #4]
 8006aa2:	681b      	ldr	r3, [r3, #0]
 8006aa4:	4a6b      	ldr	r2, [pc, #428]	@ (8006c54 <HAL_DMA_Abort+0x448>)
 8006aa6:	4293      	cmp	r3, r2
 8006aa8:	d045      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006aaa:	687b      	ldr	r3, [r7, #4]
 8006aac:	681b      	ldr	r3, [r3, #0]
 8006aae:	4a6a      	ldr	r2, [pc, #424]	@ (8006c58 <HAL_DMA_Abort+0x44c>)
 8006ab0:	4293      	cmp	r3, r2
 8006ab2:	d040      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006ab4:	687b      	ldr	r3, [r7, #4]
 8006ab6:	681b      	ldr	r3, [r3, #0]
 8006ab8:	4a68      	ldr	r2, [pc, #416]	@ (8006c5c <HAL_DMA_Abort+0x450>)
 8006aba:	4293      	cmp	r3, r2
 8006abc:	d03b      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006abe:	687b      	ldr	r3, [r7, #4]
 8006ac0:	681b      	ldr	r3, [r3, #0]
 8006ac2:	4a67      	ldr	r2, [pc, #412]	@ (8006c60 <HAL_DMA_Abort+0x454>)
 8006ac4:	4293      	cmp	r3, r2
 8006ac6:	d036      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006ac8:	687b      	ldr	r3, [r7, #4]
 8006aca:	681b      	ldr	r3, [r3, #0]
 8006acc:	4a65      	ldr	r2, [pc, #404]	@ (8006c64 <HAL_DMA_Abort+0x458>)
 8006ace:	4293      	cmp	r3, r2
 8006ad0:	d031      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006ad2:	687b      	ldr	r3, [r7, #4]
 8006ad4:	681b      	ldr	r3, [r3, #0]
 8006ad6:	4a64      	ldr	r2, [pc, #400]	@ (8006c68 <HAL_DMA_Abort+0x45c>)
 8006ad8:	4293      	cmp	r3, r2
 8006ada:	d02c      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006adc:	687b      	ldr	r3, [r7, #4]
 8006ade:	681b      	ldr	r3, [r3, #0]
 8006ae0:	4a62      	ldr	r2, [pc, #392]	@ (8006c6c <HAL_DMA_Abort+0x460>)
 8006ae2:	4293      	cmp	r3, r2
 8006ae4:	d027      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006ae6:	687b      	ldr	r3, [r7, #4]
 8006ae8:	681b      	ldr	r3, [r3, #0]
 8006aea:	4a61      	ldr	r2, [pc, #388]	@ (8006c70 <HAL_DMA_Abort+0x464>)
 8006aec:	4293      	cmp	r3, r2
 8006aee:	d022      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006af0:	687b      	ldr	r3, [r7, #4]
 8006af2:	681b      	ldr	r3, [r3, #0]
 8006af4:	4a5f      	ldr	r2, [pc, #380]	@ (8006c74 <HAL_DMA_Abort+0x468>)
 8006af6:	4293      	cmp	r3, r2
 8006af8:	d01d      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006afa:	687b      	ldr	r3, [r7, #4]
 8006afc:	681b      	ldr	r3, [r3, #0]
 8006afe:	4a5e      	ldr	r2, [pc, #376]	@ (8006c78 <HAL_DMA_Abort+0x46c>)
 8006b00:	4293      	cmp	r3, r2
 8006b02:	d018      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006b04:	687b      	ldr	r3, [r7, #4]
 8006b06:	681b      	ldr	r3, [r3, #0]
 8006b08:	4a5c      	ldr	r2, [pc, #368]	@ (8006c7c <HAL_DMA_Abort+0x470>)
 8006b0a:	4293      	cmp	r3, r2
 8006b0c:	d013      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006b0e:	687b      	ldr	r3, [r7, #4]
 8006b10:	681b      	ldr	r3, [r3, #0]
 8006b12:	4a5b      	ldr	r2, [pc, #364]	@ (8006c80 <HAL_DMA_Abort+0x474>)
 8006b14:	4293      	cmp	r3, r2
 8006b16:	d00e      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006b18:	687b      	ldr	r3, [r7, #4]
 8006b1a:	681b      	ldr	r3, [r3, #0]
 8006b1c:	4a59      	ldr	r2, [pc, #356]	@ (8006c84 <HAL_DMA_Abort+0x478>)
 8006b1e:	4293      	cmp	r3, r2
 8006b20:	d009      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006b22:	687b      	ldr	r3, [r7, #4]
 8006b24:	681b      	ldr	r3, [r3, #0]
 8006b26:	4a58      	ldr	r2, [pc, #352]	@ (8006c88 <HAL_DMA_Abort+0x47c>)
 8006b28:	4293      	cmp	r3, r2
 8006b2a:	d004      	beq.n	8006b36 <HAL_DMA_Abort+0x32a>
 8006b2c:	687b      	ldr	r3, [r7, #4]
 8006b2e:	681b      	ldr	r3, [r3, #0]
 8006b30:	4a56      	ldr	r2, [pc, #344]	@ (8006c8c <HAL_DMA_Abort+0x480>)
 8006b32:	4293      	cmp	r3, r2
 8006b34:	d108      	bne.n	8006b48 <HAL_DMA_Abort+0x33c>
 8006b36:	687b      	ldr	r3, [r7, #4]
 8006b38:	681b      	ldr	r3, [r3, #0]
 8006b3a:	681a      	ldr	r2, [r3, #0]
 8006b3c:	687b      	ldr	r3, [r7, #4]
 8006b3e:	681b      	ldr	r3, [r3, #0]
 8006b40:	f022 0201 	bic.w	r2, r2, #1
 8006b44:	601a      	str	r2, [r3, #0]
 8006b46:	e007      	b.n	8006b58 <HAL_DMA_Abort+0x34c>
 8006b48:	687b      	ldr	r3, [r7, #4]
 8006b4a:	681b      	ldr	r3, [r3, #0]
 8006b4c:	681a      	ldr	r2, [r3, #0]
 8006b4e:	687b      	ldr	r3, [r7, #4]
 8006b50:	681b      	ldr	r3, [r3, #0]
 8006b52:	f022 0201 	bic.w	r2, r2, #1
 8006b56:	601a      	str	r2, [r3, #0]

    /* Check if the DMA Stream is effectively disabled */
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 8006b58:	e013      	b.n	8006b82 <HAL_DMA_Abort+0x376>
    {
      /* Check for the Timeout */
      if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA_ABORT)
 8006b5a:	f7fe ff4d 	bl	80059f8 <HAL_GetTick>
 8006b5e:	4602      	mov	r2, r0
 8006b60:	693b      	ldr	r3, [r7, #16]
 8006b62:	1ad3      	subs	r3, r2, r3
 8006b64:	2b05      	cmp	r3, #5
 8006b66:	d90c      	bls.n	8006b82 <HAL_DMA_Abort+0x376>
      {
        /* Update error code */
        hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
 8006b68:	687b      	ldr	r3, [r7, #4]
 8006b6a:	2220      	movs	r2, #32
 8006b6c:	655a      	str	r2, [r3, #84]	@ 0x54

        /* Change the DMA state */
        hdma->State = HAL_DMA_STATE_ERROR;
 8006b6e:	687b      	ldr	r3, [r7, #4]
 8006b70:	2203      	movs	r2, #3
 8006b72:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 8006b76:	687b      	ldr	r3, [r7, #4]
 8006b78:	2200      	movs	r2, #0
 8006b7a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

        return HAL_ERROR;
 8006b7e:	2301      	movs	r3, #1
 8006b80:	e12d      	b.n	8006dde <HAL_DMA_Abort+0x5d2>
    while(((*enableRegister) & DMA_SxCR_EN) != 0U)
 8006b82:	697b      	ldr	r3, [r7, #20]
 8006b84:	681b      	ldr	r3, [r3, #0]
 8006b86:	f003 0301 	and.w	r3, r3, #1
 8006b8a:	2b00      	cmp	r3, #0
 8006b8c:	d1e5      	bne.n	8006b5a <HAL_DMA_Abort+0x34e>
      }
    }

    /* Clear all interrupt flags at correct offset within the register */
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8006b8e:	687b      	ldr	r3, [r7, #4]
 8006b90:	681b      	ldr	r3, [r3, #0]
 8006b92:	4a2f      	ldr	r2, [pc, #188]	@ (8006c50 <HAL_DMA_Abort+0x444>)
 8006b94:	4293      	cmp	r3, r2
 8006b96:	d04a      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006b98:	687b      	ldr	r3, [r7, #4]
 8006b9a:	681b      	ldr	r3, [r3, #0]
 8006b9c:	4a2d      	ldr	r2, [pc, #180]	@ (8006c54 <HAL_DMA_Abort+0x448>)
 8006b9e:	4293      	cmp	r3, r2
 8006ba0:	d045      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006ba2:	687b      	ldr	r3, [r7, #4]
 8006ba4:	681b      	ldr	r3, [r3, #0]
 8006ba6:	4a2c      	ldr	r2, [pc, #176]	@ (8006c58 <HAL_DMA_Abort+0x44c>)
 8006ba8:	4293      	cmp	r3, r2
 8006baa:	d040      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006bac:	687b      	ldr	r3, [r7, #4]
 8006bae:	681b      	ldr	r3, [r3, #0]
 8006bb0:	4a2a      	ldr	r2, [pc, #168]	@ (8006c5c <HAL_DMA_Abort+0x450>)
 8006bb2:	4293      	cmp	r3, r2
 8006bb4:	d03b      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006bb6:	687b      	ldr	r3, [r7, #4]
 8006bb8:	681b      	ldr	r3, [r3, #0]
 8006bba:	4a29      	ldr	r2, [pc, #164]	@ (8006c60 <HAL_DMA_Abort+0x454>)
 8006bbc:	4293      	cmp	r3, r2
 8006bbe:	d036      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006bc0:	687b      	ldr	r3, [r7, #4]
 8006bc2:	681b      	ldr	r3, [r3, #0]
 8006bc4:	4a27      	ldr	r2, [pc, #156]	@ (8006c64 <HAL_DMA_Abort+0x458>)
 8006bc6:	4293      	cmp	r3, r2
 8006bc8:	d031      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006bca:	687b      	ldr	r3, [r7, #4]
 8006bcc:	681b      	ldr	r3, [r3, #0]
 8006bce:	4a26      	ldr	r2, [pc, #152]	@ (8006c68 <HAL_DMA_Abort+0x45c>)
 8006bd0:	4293      	cmp	r3, r2
 8006bd2:	d02c      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006bd4:	687b      	ldr	r3, [r7, #4]
 8006bd6:	681b      	ldr	r3, [r3, #0]
 8006bd8:	4a24      	ldr	r2, [pc, #144]	@ (8006c6c <HAL_DMA_Abort+0x460>)
 8006bda:	4293      	cmp	r3, r2
 8006bdc:	d027      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006bde:	687b      	ldr	r3, [r7, #4]
 8006be0:	681b      	ldr	r3, [r3, #0]
 8006be2:	4a23      	ldr	r2, [pc, #140]	@ (8006c70 <HAL_DMA_Abort+0x464>)
 8006be4:	4293      	cmp	r3, r2
 8006be6:	d022      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006be8:	687b      	ldr	r3, [r7, #4]
 8006bea:	681b      	ldr	r3, [r3, #0]
 8006bec:	4a21      	ldr	r2, [pc, #132]	@ (8006c74 <HAL_DMA_Abort+0x468>)
 8006bee:	4293      	cmp	r3, r2
 8006bf0:	d01d      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006bf2:	687b      	ldr	r3, [r7, #4]
 8006bf4:	681b      	ldr	r3, [r3, #0]
 8006bf6:	4a20      	ldr	r2, [pc, #128]	@ (8006c78 <HAL_DMA_Abort+0x46c>)
 8006bf8:	4293      	cmp	r3, r2
 8006bfa:	d018      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006bfc:	687b      	ldr	r3, [r7, #4]
 8006bfe:	681b      	ldr	r3, [r3, #0]
 8006c00:	4a1e      	ldr	r2, [pc, #120]	@ (8006c7c <HAL_DMA_Abort+0x470>)
 8006c02:	4293      	cmp	r3, r2
 8006c04:	d013      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006c06:	687b      	ldr	r3, [r7, #4]
 8006c08:	681b      	ldr	r3, [r3, #0]
 8006c0a:	4a1d      	ldr	r2, [pc, #116]	@ (8006c80 <HAL_DMA_Abort+0x474>)
 8006c0c:	4293      	cmp	r3, r2
 8006c0e:	d00e      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006c10:	687b      	ldr	r3, [r7, #4]
 8006c12:	681b      	ldr	r3, [r3, #0]
 8006c14:	4a1b      	ldr	r2, [pc, #108]	@ (8006c84 <HAL_DMA_Abort+0x478>)
 8006c16:	4293      	cmp	r3, r2
 8006c18:	d009      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006c1a:	687b      	ldr	r3, [r7, #4]
 8006c1c:	681b      	ldr	r3, [r3, #0]
 8006c1e:	4a1a      	ldr	r2, [pc, #104]	@ (8006c88 <HAL_DMA_Abort+0x47c>)
 8006c20:	4293      	cmp	r3, r2
 8006c22:	d004      	beq.n	8006c2e <HAL_DMA_Abort+0x422>
 8006c24:	687b      	ldr	r3, [r7, #4]
 8006c26:	681b      	ldr	r3, [r3, #0]
 8006c28:	4a18      	ldr	r2, [pc, #96]	@ (8006c8c <HAL_DMA_Abort+0x480>)
 8006c2a:	4293      	cmp	r3, r2
 8006c2c:	d101      	bne.n	8006c32 <HAL_DMA_Abort+0x426>
 8006c2e:	2301      	movs	r3, #1
 8006c30:	e000      	b.n	8006c34 <HAL_DMA_Abort+0x428>
 8006c32:	2300      	movs	r3, #0
 8006c34:	2b00      	cmp	r3, #0
 8006c36:	d02b      	beq.n	8006c90 <HAL_DMA_Abort+0x484>
    {
      regs_dma = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 8006c38:	687b      	ldr	r3, [r7, #4]
 8006c3a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006c3c:	60bb      	str	r3, [r7, #8]
      regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8006c3e:	687b      	ldr	r3, [r7, #4]
 8006c40:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006c42:	f003 031f 	and.w	r3, r3, #31
 8006c46:	223f      	movs	r2, #63	@ 0x3f
 8006c48:	409a      	lsls	r2, r3
 8006c4a:	68bb      	ldr	r3, [r7, #8]
 8006c4c:	609a      	str	r2, [r3, #8]
 8006c4e:	e02a      	b.n	8006ca6 <HAL_DMA_Abort+0x49a>
 8006c50:	40020010 	.word	0x40020010
 8006c54:	40020028 	.word	0x40020028
 8006c58:	40020040 	.word	0x40020040
 8006c5c:	40020058 	.word	0x40020058
 8006c60:	40020070 	.word	0x40020070
 8006c64:	40020088 	.word	0x40020088
 8006c68:	400200a0 	.word	0x400200a0
 8006c6c:	400200b8 	.word	0x400200b8
 8006c70:	40020410 	.word	0x40020410
 8006c74:	40020428 	.word	0x40020428
 8006c78:	40020440 	.word	0x40020440
 8006c7c:	40020458 	.word	0x40020458
 8006c80:	40020470 	.word	0x40020470
 8006c84:	40020488 	.word	0x40020488
 8006c88:	400204a0 	.word	0x400204a0
 8006c8c:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 8006c90:	687b      	ldr	r3, [r7, #4]
 8006c92:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8006c94:	60fb      	str	r3, [r7, #12]
      regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 8006c96:	687b      	ldr	r3, [r7, #4]
 8006c98:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8006c9a:	f003 031f 	and.w	r3, r3, #31
 8006c9e:	2201      	movs	r2, #1
 8006ca0:	409a      	lsls	r2, r3
 8006ca2:	68fb      	ldr	r3, [r7, #12]
 8006ca4:	605a      	str	r2, [r3, #4]
    }

    if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 8006ca6:	687b      	ldr	r3, [r7, #4]
 8006ca8:	681b      	ldr	r3, [r3, #0]
 8006caa:	4a4f      	ldr	r2, [pc, #316]	@ (8006de8 <HAL_DMA_Abort+0x5dc>)
 8006cac:	4293      	cmp	r3, r2
 8006cae:	d072      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006cb0:	687b      	ldr	r3, [r7, #4]
 8006cb2:	681b      	ldr	r3, [r3, #0]
 8006cb4:	4a4d      	ldr	r2, [pc, #308]	@ (8006dec <HAL_DMA_Abort+0x5e0>)
 8006cb6:	4293      	cmp	r3, r2
 8006cb8:	d06d      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006cba:	687b      	ldr	r3, [r7, #4]
 8006cbc:	681b      	ldr	r3, [r3, #0]
 8006cbe:	4a4c      	ldr	r2, [pc, #304]	@ (8006df0 <HAL_DMA_Abort+0x5e4>)
 8006cc0:	4293      	cmp	r3, r2
 8006cc2:	d068      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006cc4:	687b      	ldr	r3, [r7, #4]
 8006cc6:	681b      	ldr	r3, [r3, #0]
 8006cc8:	4a4a      	ldr	r2, [pc, #296]	@ (8006df4 <HAL_DMA_Abort+0x5e8>)
 8006cca:	4293      	cmp	r3, r2
 8006ccc:	d063      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006cce:	687b      	ldr	r3, [r7, #4]
 8006cd0:	681b      	ldr	r3, [r3, #0]
 8006cd2:	4a49      	ldr	r2, [pc, #292]	@ (8006df8 <HAL_DMA_Abort+0x5ec>)
 8006cd4:	4293      	cmp	r3, r2
 8006cd6:	d05e      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006cd8:	687b      	ldr	r3, [r7, #4]
 8006cda:	681b      	ldr	r3, [r3, #0]
 8006cdc:	4a47      	ldr	r2, [pc, #284]	@ (8006dfc <HAL_DMA_Abort+0x5f0>)
 8006cde:	4293      	cmp	r3, r2
 8006ce0:	d059      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006ce2:	687b      	ldr	r3, [r7, #4]
 8006ce4:	681b      	ldr	r3, [r3, #0]
 8006ce6:	4a46      	ldr	r2, [pc, #280]	@ (8006e00 <HAL_DMA_Abort+0x5f4>)
 8006ce8:	4293      	cmp	r3, r2
 8006cea:	d054      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006cec:	687b      	ldr	r3, [r7, #4]
 8006cee:	681b      	ldr	r3, [r3, #0]
 8006cf0:	4a44      	ldr	r2, [pc, #272]	@ (8006e04 <HAL_DMA_Abort+0x5f8>)
 8006cf2:	4293      	cmp	r3, r2
 8006cf4:	d04f      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006cf6:	687b      	ldr	r3, [r7, #4]
 8006cf8:	681b      	ldr	r3, [r3, #0]
 8006cfa:	4a43      	ldr	r2, [pc, #268]	@ (8006e08 <HAL_DMA_Abort+0x5fc>)
 8006cfc:	4293      	cmp	r3, r2
 8006cfe:	d04a      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d00:	687b      	ldr	r3, [r7, #4]
 8006d02:	681b      	ldr	r3, [r3, #0]
 8006d04:	4a41      	ldr	r2, [pc, #260]	@ (8006e0c <HAL_DMA_Abort+0x600>)
 8006d06:	4293      	cmp	r3, r2
 8006d08:	d045      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d0a:	687b      	ldr	r3, [r7, #4]
 8006d0c:	681b      	ldr	r3, [r3, #0]
 8006d0e:	4a40      	ldr	r2, [pc, #256]	@ (8006e10 <HAL_DMA_Abort+0x604>)
 8006d10:	4293      	cmp	r3, r2
 8006d12:	d040      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d14:	687b      	ldr	r3, [r7, #4]
 8006d16:	681b      	ldr	r3, [r3, #0]
 8006d18:	4a3e      	ldr	r2, [pc, #248]	@ (8006e14 <HAL_DMA_Abort+0x608>)
 8006d1a:	4293      	cmp	r3, r2
 8006d1c:	d03b      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d1e:	687b      	ldr	r3, [r7, #4]
 8006d20:	681b      	ldr	r3, [r3, #0]
 8006d22:	4a3d      	ldr	r2, [pc, #244]	@ (8006e18 <HAL_DMA_Abort+0x60c>)
 8006d24:	4293      	cmp	r3, r2
 8006d26:	d036      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d28:	687b      	ldr	r3, [r7, #4]
 8006d2a:	681b      	ldr	r3, [r3, #0]
 8006d2c:	4a3b      	ldr	r2, [pc, #236]	@ (8006e1c <HAL_DMA_Abort+0x610>)
 8006d2e:	4293      	cmp	r3, r2
 8006d30:	d031      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d32:	687b      	ldr	r3, [r7, #4]
 8006d34:	681b      	ldr	r3, [r3, #0]
 8006d36:	4a3a      	ldr	r2, [pc, #232]	@ (8006e20 <HAL_DMA_Abort+0x614>)
 8006d38:	4293      	cmp	r3, r2
 8006d3a:	d02c      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d3c:	687b      	ldr	r3, [r7, #4]
 8006d3e:	681b      	ldr	r3, [r3, #0]
 8006d40:	4a38      	ldr	r2, [pc, #224]	@ (8006e24 <HAL_DMA_Abort+0x618>)
 8006d42:	4293      	cmp	r3, r2
 8006d44:	d027      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d46:	687b      	ldr	r3, [r7, #4]
 8006d48:	681b      	ldr	r3, [r3, #0]
 8006d4a:	4a37      	ldr	r2, [pc, #220]	@ (8006e28 <HAL_DMA_Abort+0x61c>)
 8006d4c:	4293      	cmp	r3, r2
 8006d4e:	d022      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d50:	687b      	ldr	r3, [r7, #4]
 8006d52:	681b      	ldr	r3, [r3, #0]
 8006d54:	4a35      	ldr	r2, [pc, #212]	@ (8006e2c <HAL_DMA_Abort+0x620>)
 8006d56:	4293      	cmp	r3, r2
 8006d58:	d01d      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d5a:	687b      	ldr	r3, [r7, #4]
 8006d5c:	681b      	ldr	r3, [r3, #0]
 8006d5e:	4a34      	ldr	r2, [pc, #208]	@ (8006e30 <HAL_DMA_Abort+0x624>)
 8006d60:	4293      	cmp	r3, r2
 8006d62:	d018      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d64:	687b      	ldr	r3, [r7, #4]
 8006d66:	681b      	ldr	r3, [r3, #0]
 8006d68:	4a32      	ldr	r2, [pc, #200]	@ (8006e34 <HAL_DMA_Abort+0x628>)
 8006d6a:	4293      	cmp	r3, r2
 8006d6c:	d013      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d6e:	687b      	ldr	r3, [r7, #4]
 8006d70:	681b      	ldr	r3, [r3, #0]
 8006d72:	4a31      	ldr	r2, [pc, #196]	@ (8006e38 <HAL_DMA_Abort+0x62c>)
 8006d74:	4293      	cmp	r3, r2
 8006d76:	d00e      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d78:	687b      	ldr	r3, [r7, #4]
 8006d7a:	681b      	ldr	r3, [r3, #0]
 8006d7c:	4a2f      	ldr	r2, [pc, #188]	@ (8006e3c <HAL_DMA_Abort+0x630>)
 8006d7e:	4293      	cmp	r3, r2
 8006d80:	d009      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d82:	687b      	ldr	r3, [r7, #4]
 8006d84:	681b      	ldr	r3, [r3, #0]
 8006d86:	4a2e      	ldr	r2, [pc, #184]	@ (8006e40 <HAL_DMA_Abort+0x634>)
 8006d88:	4293      	cmp	r3, r2
 8006d8a:	d004      	beq.n	8006d96 <HAL_DMA_Abort+0x58a>
 8006d8c:	687b      	ldr	r3, [r7, #4]
 8006d8e:	681b      	ldr	r3, [r3, #0]
 8006d90:	4a2c      	ldr	r2, [pc, #176]	@ (8006e44 <HAL_DMA_Abort+0x638>)
 8006d92:	4293      	cmp	r3, r2
 8006d94:	d101      	bne.n	8006d9a <HAL_DMA_Abort+0x58e>
 8006d96:	2301      	movs	r3, #1
 8006d98:	e000      	b.n	8006d9c <HAL_DMA_Abort+0x590>
 8006d9a:	2300      	movs	r3, #0
 8006d9c:	2b00      	cmp	r3, #0
 8006d9e:	d015      	beq.n	8006dcc <HAL_DMA_Abort+0x5c0>
    {
      /* Clear the DMAMUX synchro overrun flag */
      hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 8006da0:	687b      	ldr	r3, [r7, #4]
 8006da2:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8006da4:	687a      	ldr	r2, [r7, #4]
 8006da6:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 8006da8:	605a      	str	r2, [r3, #4]

      if(hdma->DMAmuxRequestGen != 0U)
 8006daa:	687b      	ldr	r3, [r7, #4]
 8006dac:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006dae:	2b00      	cmp	r3, #0
 8006db0:	d00c      	beq.n	8006dcc <HAL_DMA_Abort+0x5c0>
      {
        /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT */
        /* disable the request gen overrun IT */
        hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 8006db2:	687b      	ldr	r3, [r7, #4]
 8006db4:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006db6:	681a      	ldr	r2, [r3, #0]
 8006db8:	687b      	ldr	r3, [r7, #4]
 8006dba:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8006dbc:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8006dc0:	601a      	str	r2, [r3, #0]

        /* Clear the DMAMUX request generator overrun flag */
        hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 8006dc2:	687b      	ldr	r3, [r7, #4]
 8006dc4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8006dc6:	687a      	ldr	r2, [r7, #4]
 8006dc8:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 8006dca:	605a      	str	r2, [r3, #4]
      }
    }

    /* Change the DMA state */
    hdma->State = HAL_DMA_STATE_READY;
 8006dcc:	687b      	ldr	r3, [r7, #4]
 8006dce:	2201      	movs	r2, #1
 8006dd0:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

    /* Process Unlocked */
    __HAL_UNLOCK(hdma);
 8006dd4:	687b      	ldr	r3, [r7, #4]
 8006dd6:	2200      	movs	r2, #0
 8006dd8:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  }

  return HAL_OK;
 8006ddc:	2300      	movs	r3, #0
}
 8006dde:	4618      	mov	r0, r3
 8006de0:	3718      	adds	r7, #24
 8006de2:	46bd      	mov	sp, r7
 8006de4:	bd80      	pop	{r7, pc}
 8006de6:	bf00      	nop
 8006de8:	40020010 	.word	0x40020010
 8006dec:	40020028 	.word	0x40020028
 8006df0:	40020040 	.word	0x40020040
 8006df4:	40020058 	.word	0x40020058
 8006df8:	40020070 	.word	0x40020070
 8006dfc:	40020088 	.word	0x40020088
 8006e00:	400200a0 	.word	0x400200a0
 8006e04:	400200b8 	.word	0x400200b8
 8006e08:	40020410 	.word	0x40020410
 8006e0c:	40020428 	.word	0x40020428
 8006e10:	40020440 	.word	0x40020440
 8006e14:	40020458 	.word	0x40020458
 8006e18:	40020470 	.word	0x40020470
 8006e1c:	40020488 	.word	0x40020488
 8006e20:	400204a0 	.word	0x400204a0
 8006e24:	400204b8 	.word	0x400204b8
 8006e28:	58025408 	.word	0x58025408
 8006e2c:	5802541c 	.word	0x5802541c
 8006e30:	58025430 	.word	0x58025430
 8006e34:	58025444 	.word	0x58025444
 8006e38:	58025458 	.word	0x58025458
 8006e3c:	5802546c 	.word	0x5802546c
 8006e40:	58025480 	.word	0x58025480
 8006e44:	58025494 	.word	0x58025494

08006e48 <HAL_DMA_Abort_IT>:
  * @param  hdma  : pointer to a DMA_HandleTypeDef structure that contains
  *                 the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
{
 8006e48:	b580      	push	{r7, lr}
 8006e4a:	b084      	sub	sp, #16
 8006e4c:	af00      	add	r7, sp, #0
 8006e4e:	6078      	str	r0, [r7, #4]
  BDMA_Base_Registers *regs_bdma;

  /* Check the DMA peripheral handle */
  if(hdma == NULL)
 8006e50:	687b      	ldr	r3, [r7, #4]
 8006e52:	2b00      	cmp	r3, #0
 8006e54:	d101      	bne.n	8006e5a <HAL_DMA_Abort_IT+0x12>
  {
    return HAL_ERROR;
 8006e56:	2301      	movs	r3, #1
 8006e58:	e237      	b.n	80072ca <HAL_DMA_Abort_IT+0x482>
  }

  if(hdma->State != HAL_DMA_STATE_BUSY)
 8006e5a:	687b      	ldr	r3, [r7, #4]
 8006e5c:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 8006e60:	b2db      	uxtb	r3, r3
 8006e62:	2b02      	cmp	r3, #2
 8006e64:	d004      	beq.n	8006e70 <HAL_DMA_Abort_IT+0x28>
  {
    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
 8006e66:	687b      	ldr	r3, [r7, #4]
 8006e68:	2280      	movs	r2, #128	@ 0x80
 8006e6a:	655a      	str	r2, [r3, #84]	@ 0x54
    return HAL_ERROR;
 8006e6c:	2301      	movs	r3, #1
 8006e6e:	e22c      	b.n	80072ca <HAL_DMA_Abort_IT+0x482>
  }
  else
  {
    if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8006e70:	687b      	ldr	r3, [r7, #4]
 8006e72:	681b      	ldr	r3, [r3, #0]
 8006e74:	4a5c      	ldr	r2, [pc, #368]	@ (8006fe8 <HAL_DMA_Abort_IT+0x1a0>)
 8006e76:	4293      	cmp	r3, r2
 8006e78:	d04a      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006e7a:	687b      	ldr	r3, [r7, #4]
 8006e7c:	681b      	ldr	r3, [r3, #0]
 8006e7e:	4a5b      	ldr	r2, [pc, #364]	@ (8006fec <HAL_DMA_Abort_IT+0x1a4>)
 8006e80:	4293      	cmp	r3, r2
 8006e82:	d045      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006e84:	687b      	ldr	r3, [r7, #4]
 8006e86:	681b      	ldr	r3, [r3, #0]
 8006e88:	4a59      	ldr	r2, [pc, #356]	@ (8006ff0 <HAL_DMA_Abort_IT+0x1a8>)
 8006e8a:	4293      	cmp	r3, r2
 8006e8c:	d040      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006e8e:	687b      	ldr	r3, [r7, #4]
 8006e90:	681b      	ldr	r3, [r3, #0]
 8006e92:	4a58      	ldr	r2, [pc, #352]	@ (8006ff4 <HAL_DMA_Abort_IT+0x1ac>)
 8006e94:	4293      	cmp	r3, r2
 8006e96:	d03b      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006e98:	687b      	ldr	r3, [r7, #4]
 8006e9a:	681b      	ldr	r3, [r3, #0]
 8006e9c:	4a56      	ldr	r2, [pc, #344]	@ (8006ff8 <HAL_DMA_Abort_IT+0x1b0>)
 8006e9e:	4293      	cmp	r3, r2
 8006ea0:	d036      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006ea2:	687b      	ldr	r3, [r7, #4]
 8006ea4:	681b      	ldr	r3, [r3, #0]
 8006ea6:	4a55      	ldr	r2, [pc, #340]	@ (8006ffc <HAL_DMA_Abort_IT+0x1b4>)
 8006ea8:	4293      	cmp	r3, r2
 8006eaa:	d031      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006eac:	687b      	ldr	r3, [r7, #4]
 8006eae:	681b      	ldr	r3, [r3, #0]
 8006eb0:	4a53      	ldr	r2, [pc, #332]	@ (8007000 <HAL_DMA_Abort_IT+0x1b8>)
 8006eb2:	4293      	cmp	r3, r2
 8006eb4:	d02c      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006eb6:	687b      	ldr	r3, [r7, #4]
 8006eb8:	681b      	ldr	r3, [r3, #0]
 8006eba:	4a52      	ldr	r2, [pc, #328]	@ (8007004 <HAL_DMA_Abort_IT+0x1bc>)
 8006ebc:	4293      	cmp	r3, r2
 8006ebe:	d027      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006ec0:	687b      	ldr	r3, [r7, #4]
 8006ec2:	681b      	ldr	r3, [r3, #0]
 8006ec4:	4a50      	ldr	r2, [pc, #320]	@ (8007008 <HAL_DMA_Abort_IT+0x1c0>)
 8006ec6:	4293      	cmp	r3, r2
 8006ec8:	d022      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006eca:	687b      	ldr	r3, [r7, #4]
 8006ecc:	681b      	ldr	r3, [r3, #0]
 8006ece:	4a4f      	ldr	r2, [pc, #316]	@ (800700c <HAL_DMA_Abort_IT+0x1c4>)
 8006ed0:	4293      	cmp	r3, r2
 8006ed2:	d01d      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006ed4:	687b      	ldr	r3, [r7, #4]
 8006ed6:	681b      	ldr	r3, [r3, #0]
 8006ed8:	4a4d      	ldr	r2, [pc, #308]	@ (8007010 <HAL_DMA_Abort_IT+0x1c8>)
 8006eda:	4293      	cmp	r3, r2
 8006edc:	d018      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006ede:	687b      	ldr	r3, [r7, #4]
 8006ee0:	681b      	ldr	r3, [r3, #0]
 8006ee2:	4a4c      	ldr	r2, [pc, #304]	@ (8007014 <HAL_DMA_Abort_IT+0x1cc>)
 8006ee4:	4293      	cmp	r3, r2
 8006ee6:	d013      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006ee8:	687b      	ldr	r3, [r7, #4]
 8006eea:	681b      	ldr	r3, [r3, #0]
 8006eec:	4a4a      	ldr	r2, [pc, #296]	@ (8007018 <HAL_DMA_Abort_IT+0x1d0>)
 8006eee:	4293      	cmp	r3, r2
 8006ef0:	d00e      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006ef2:	687b      	ldr	r3, [r7, #4]
 8006ef4:	681b      	ldr	r3, [r3, #0]
 8006ef6:	4a49      	ldr	r2, [pc, #292]	@ (800701c <HAL_DMA_Abort_IT+0x1d4>)
 8006ef8:	4293      	cmp	r3, r2
 8006efa:	d009      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006efc:	687b      	ldr	r3, [r7, #4]
 8006efe:	681b      	ldr	r3, [r3, #0]
 8006f00:	4a47      	ldr	r2, [pc, #284]	@ (8007020 <HAL_DMA_Abort_IT+0x1d8>)
 8006f02:	4293      	cmp	r3, r2
 8006f04:	d004      	beq.n	8006f10 <HAL_DMA_Abort_IT+0xc8>
 8006f06:	687b      	ldr	r3, [r7, #4]
 8006f08:	681b      	ldr	r3, [r3, #0]
 8006f0a:	4a46      	ldr	r2, [pc, #280]	@ (8007024 <HAL_DMA_Abort_IT+0x1dc>)
 8006f0c:	4293      	cmp	r3, r2
 8006f0e:	d101      	bne.n	8006f14 <HAL_DMA_Abort_IT+0xcc>
 8006f10:	2301      	movs	r3, #1
 8006f12:	e000      	b.n	8006f16 <HAL_DMA_Abort_IT+0xce>
 8006f14:	2300      	movs	r3, #0
 8006f16:	2b00      	cmp	r3, #0
 8006f18:	f000 8086 	beq.w	8007028 <HAL_DMA_Abort_IT+0x1e0>
    {
      /* Set Abort State  */
      hdma->State = HAL_DMA_STATE_ABORT;
 8006f1c:	687b      	ldr	r3, [r7, #4]
 8006f1e:	2204      	movs	r2, #4
 8006f20:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Disable the stream */
      __HAL_DMA_DISABLE(hdma);
 8006f24:	687b      	ldr	r3, [r7, #4]
 8006f26:	681b      	ldr	r3, [r3, #0]
 8006f28:	4a2f      	ldr	r2, [pc, #188]	@ (8006fe8 <HAL_DMA_Abort_IT+0x1a0>)
 8006f2a:	4293      	cmp	r3, r2
 8006f2c:	d04a      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f2e:	687b      	ldr	r3, [r7, #4]
 8006f30:	681b      	ldr	r3, [r3, #0]
 8006f32:	4a2e      	ldr	r2, [pc, #184]	@ (8006fec <HAL_DMA_Abort_IT+0x1a4>)
 8006f34:	4293      	cmp	r3, r2
 8006f36:	d045      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f38:	687b      	ldr	r3, [r7, #4]
 8006f3a:	681b      	ldr	r3, [r3, #0]
 8006f3c:	4a2c      	ldr	r2, [pc, #176]	@ (8006ff0 <HAL_DMA_Abort_IT+0x1a8>)
 8006f3e:	4293      	cmp	r3, r2
 8006f40:	d040      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f42:	687b      	ldr	r3, [r7, #4]
 8006f44:	681b      	ldr	r3, [r3, #0]
 8006f46:	4a2b      	ldr	r2, [pc, #172]	@ (8006ff4 <HAL_DMA_Abort_IT+0x1ac>)
 8006f48:	4293      	cmp	r3, r2
 8006f4a:	d03b      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f4c:	687b      	ldr	r3, [r7, #4]
 8006f4e:	681b      	ldr	r3, [r3, #0]
 8006f50:	4a29      	ldr	r2, [pc, #164]	@ (8006ff8 <HAL_DMA_Abort_IT+0x1b0>)
 8006f52:	4293      	cmp	r3, r2
 8006f54:	d036      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f56:	687b      	ldr	r3, [r7, #4]
 8006f58:	681b      	ldr	r3, [r3, #0]
 8006f5a:	4a28      	ldr	r2, [pc, #160]	@ (8006ffc <HAL_DMA_Abort_IT+0x1b4>)
 8006f5c:	4293      	cmp	r3, r2
 8006f5e:	d031      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f60:	687b      	ldr	r3, [r7, #4]
 8006f62:	681b      	ldr	r3, [r3, #0]
 8006f64:	4a26      	ldr	r2, [pc, #152]	@ (8007000 <HAL_DMA_Abort_IT+0x1b8>)
 8006f66:	4293      	cmp	r3, r2
 8006f68:	d02c      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f6a:	687b      	ldr	r3, [r7, #4]
 8006f6c:	681b      	ldr	r3, [r3, #0]
 8006f6e:	4a25      	ldr	r2, [pc, #148]	@ (8007004 <HAL_DMA_Abort_IT+0x1bc>)
 8006f70:	4293      	cmp	r3, r2
 8006f72:	d027      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f74:	687b      	ldr	r3, [r7, #4]
 8006f76:	681b      	ldr	r3, [r3, #0]
 8006f78:	4a23      	ldr	r2, [pc, #140]	@ (8007008 <HAL_DMA_Abort_IT+0x1c0>)
 8006f7a:	4293      	cmp	r3, r2
 8006f7c:	d022      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f7e:	687b      	ldr	r3, [r7, #4]
 8006f80:	681b      	ldr	r3, [r3, #0]
 8006f82:	4a22      	ldr	r2, [pc, #136]	@ (800700c <HAL_DMA_Abort_IT+0x1c4>)
 8006f84:	4293      	cmp	r3, r2
 8006f86:	d01d      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f88:	687b      	ldr	r3, [r7, #4]
 8006f8a:	681b      	ldr	r3, [r3, #0]
 8006f8c:	4a20      	ldr	r2, [pc, #128]	@ (8007010 <HAL_DMA_Abort_IT+0x1c8>)
 8006f8e:	4293      	cmp	r3, r2
 8006f90:	d018      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f92:	687b      	ldr	r3, [r7, #4]
 8006f94:	681b      	ldr	r3, [r3, #0]
 8006f96:	4a1f      	ldr	r2, [pc, #124]	@ (8007014 <HAL_DMA_Abort_IT+0x1cc>)
 8006f98:	4293      	cmp	r3, r2
 8006f9a:	d013      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006f9c:	687b      	ldr	r3, [r7, #4]
 8006f9e:	681b      	ldr	r3, [r3, #0]
 8006fa0:	4a1d      	ldr	r2, [pc, #116]	@ (8007018 <HAL_DMA_Abort_IT+0x1d0>)
 8006fa2:	4293      	cmp	r3, r2
 8006fa4:	d00e      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006fa6:	687b      	ldr	r3, [r7, #4]
 8006fa8:	681b      	ldr	r3, [r3, #0]
 8006faa:	4a1c      	ldr	r2, [pc, #112]	@ (800701c <HAL_DMA_Abort_IT+0x1d4>)
 8006fac:	4293      	cmp	r3, r2
 8006fae:	d009      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006fb0:	687b      	ldr	r3, [r7, #4]
 8006fb2:	681b      	ldr	r3, [r3, #0]
 8006fb4:	4a1a      	ldr	r2, [pc, #104]	@ (8007020 <HAL_DMA_Abort_IT+0x1d8>)
 8006fb6:	4293      	cmp	r3, r2
 8006fb8:	d004      	beq.n	8006fc4 <HAL_DMA_Abort_IT+0x17c>
 8006fba:	687b      	ldr	r3, [r7, #4]
 8006fbc:	681b      	ldr	r3, [r3, #0]
 8006fbe:	4a19      	ldr	r2, [pc, #100]	@ (8007024 <HAL_DMA_Abort_IT+0x1dc>)
 8006fc0:	4293      	cmp	r3, r2
 8006fc2:	d108      	bne.n	8006fd6 <HAL_DMA_Abort_IT+0x18e>
 8006fc4:	687b      	ldr	r3, [r7, #4]
 8006fc6:	681b      	ldr	r3, [r3, #0]
 8006fc8:	681a      	ldr	r2, [r3, #0]
 8006fca:	687b      	ldr	r3, [r7, #4]
 8006fcc:	681b      	ldr	r3, [r3, #0]
 8006fce:	f022 0201 	bic.w	r2, r2, #1
 8006fd2:	601a      	str	r2, [r3, #0]
 8006fd4:	e178      	b.n	80072c8 <HAL_DMA_Abort_IT+0x480>
 8006fd6:	687b      	ldr	r3, [r7, #4]
 8006fd8:	681b      	ldr	r3, [r3, #0]
 8006fda:	681a      	ldr	r2, [r3, #0]
 8006fdc:	687b      	ldr	r3, [r7, #4]
 8006fde:	681b      	ldr	r3, [r3, #0]
 8006fe0:	f022 0201 	bic.w	r2, r2, #1
 8006fe4:	601a      	str	r2, [r3, #0]
 8006fe6:	e16f      	b.n	80072c8 <HAL_DMA_Abort_IT+0x480>
 8006fe8:	40020010 	.word	0x40020010
 8006fec:	40020028 	.word	0x40020028
 8006ff0:	40020040 	.word	0x40020040
 8006ff4:	40020058 	.word	0x40020058
 8006ff8:	40020070 	.word	0x40020070
 8006ffc:	40020088 	.word	0x40020088
 8007000:	400200a0 	.word	0x400200a0
 8007004:	400200b8 	.word	0x400200b8
 8007008:	40020410 	.word	0x40020410
 800700c:	40020428 	.word	0x40020428
 8007010:	40020440 	.word	0x40020440
 8007014:	40020458 	.word	0x40020458
 8007018:	40020470 	.word	0x40020470
 800701c:	40020488 	.word	0x40020488
 8007020:	400204a0 	.word	0x400204a0
 8007024:	400204b8 	.word	0x400204b8
    }
    else /* BDMA channel */
    {
      /* Disable DMA All Interrupts  */
      ((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR  &= ~(BDMA_CCR_TCIE | BDMA_CCR_HTIE | BDMA_CCR_TEIE);
 8007028:	687b      	ldr	r3, [r7, #4]
 800702a:	681b      	ldr	r3, [r3, #0]
 800702c:	681a      	ldr	r2, [r3, #0]
 800702e:	687b      	ldr	r3, [r7, #4]
 8007030:	681b      	ldr	r3, [r3, #0]
 8007032:	f022 020e 	bic.w	r2, r2, #14
 8007036:	601a      	str	r2, [r3, #0]

      /* Disable the channel */
      __HAL_DMA_DISABLE(hdma);
 8007038:	687b      	ldr	r3, [r7, #4]
 800703a:	681b      	ldr	r3, [r3, #0]
 800703c:	4a6c      	ldr	r2, [pc, #432]	@ (80071f0 <HAL_DMA_Abort_IT+0x3a8>)
 800703e:	4293      	cmp	r3, r2
 8007040:	d04a      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 8007042:	687b      	ldr	r3, [r7, #4]
 8007044:	681b      	ldr	r3, [r3, #0]
 8007046:	4a6b      	ldr	r2, [pc, #428]	@ (80071f4 <HAL_DMA_Abort_IT+0x3ac>)
 8007048:	4293      	cmp	r3, r2
 800704a:	d045      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 800704c:	687b      	ldr	r3, [r7, #4]
 800704e:	681b      	ldr	r3, [r3, #0]
 8007050:	4a69      	ldr	r2, [pc, #420]	@ (80071f8 <HAL_DMA_Abort_IT+0x3b0>)
 8007052:	4293      	cmp	r3, r2
 8007054:	d040      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 8007056:	687b      	ldr	r3, [r7, #4]
 8007058:	681b      	ldr	r3, [r3, #0]
 800705a:	4a68      	ldr	r2, [pc, #416]	@ (80071fc <HAL_DMA_Abort_IT+0x3b4>)
 800705c:	4293      	cmp	r3, r2
 800705e:	d03b      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 8007060:	687b      	ldr	r3, [r7, #4]
 8007062:	681b      	ldr	r3, [r3, #0]
 8007064:	4a66      	ldr	r2, [pc, #408]	@ (8007200 <HAL_DMA_Abort_IT+0x3b8>)
 8007066:	4293      	cmp	r3, r2
 8007068:	d036      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 800706a:	687b      	ldr	r3, [r7, #4]
 800706c:	681b      	ldr	r3, [r3, #0]
 800706e:	4a65      	ldr	r2, [pc, #404]	@ (8007204 <HAL_DMA_Abort_IT+0x3bc>)
 8007070:	4293      	cmp	r3, r2
 8007072:	d031      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 8007074:	687b      	ldr	r3, [r7, #4]
 8007076:	681b      	ldr	r3, [r3, #0]
 8007078:	4a63      	ldr	r2, [pc, #396]	@ (8007208 <HAL_DMA_Abort_IT+0x3c0>)
 800707a:	4293      	cmp	r3, r2
 800707c:	d02c      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 800707e:	687b      	ldr	r3, [r7, #4]
 8007080:	681b      	ldr	r3, [r3, #0]
 8007082:	4a62      	ldr	r2, [pc, #392]	@ (800720c <HAL_DMA_Abort_IT+0x3c4>)
 8007084:	4293      	cmp	r3, r2
 8007086:	d027      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 8007088:	687b      	ldr	r3, [r7, #4]
 800708a:	681b      	ldr	r3, [r3, #0]
 800708c:	4a60      	ldr	r2, [pc, #384]	@ (8007210 <HAL_DMA_Abort_IT+0x3c8>)
 800708e:	4293      	cmp	r3, r2
 8007090:	d022      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 8007092:	687b      	ldr	r3, [r7, #4]
 8007094:	681b      	ldr	r3, [r3, #0]
 8007096:	4a5f      	ldr	r2, [pc, #380]	@ (8007214 <HAL_DMA_Abort_IT+0x3cc>)
 8007098:	4293      	cmp	r3, r2
 800709a:	d01d      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 800709c:	687b      	ldr	r3, [r7, #4]
 800709e:	681b      	ldr	r3, [r3, #0]
 80070a0:	4a5d      	ldr	r2, [pc, #372]	@ (8007218 <HAL_DMA_Abort_IT+0x3d0>)
 80070a2:	4293      	cmp	r3, r2
 80070a4:	d018      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 80070a6:	687b      	ldr	r3, [r7, #4]
 80070a8:	681b      	ldr	r3, [r3, #0]
 80070aa:	4a5c      	ldr	r2, [pc, #368]	@ (800721c <HAL_DMA_Abort_IT+0x3d4>)
 80070ac:	4293      	cmp	r3, r2
 80070ae:	d013      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 80070b0:	687b      	ldr	r3, [r7, #4]
 80070b2:	681b      	ldr	r3, [r3, #0]
 80070b4:	4a5a      	ldr	r2, [pc, #360]	@ (8007220 <HAL_DMA_Abort_IT+0x3d8>)
 80070b6:	4293      	cmp	r3, r2
 80070b8:	d00e      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 80070ba:	687b      	ldr	r3, [r7, #4]
 80070bc:	681b      	ldr	r3, [r3, #0]
 80070be:	4a59      	ldr	r2, [pc, #356]	@ (8007224 <HAL_DMA_Abort_IT+0x3dc>)
 80070c0:	4293      	cmp	r3, r2
 80070c2:	d009      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 80070c4:	687b      	ldr	r3, [r7, #4]
 80070c6:	681b      	ldr	r3, [r3, #0]
 80070c8:	4a57      	ldr	r2, [pc, #348]	@ (8007228 <HAL_DMA_Abort_IT+0x3e0>)
 80070ca:	4293      	cmp	r3, r2
 80070cc:	d004      	beq.n	80070d8 <HAL_DMA_Abort_IT+0x290>
 80070ce:	687b      	ldr	r3, [r7, #4]
 80070d0:	681b      	ldr	r3, [r3, #0]
 80070d2:	4a56      	ldr	r2, [pc, #344]	@ (800722c <HAL_DMA_Abort_IT+0x3e4>)
 80070d4:	4293      	cmp	r3, r2
 80070d6:	d108      	bne.n	80070ea <HAL_DMA_Abort_IT+0x2a2>
 80070d8:	687b      	ldr	r3, [r7, #4]
 80070da:	681b      	ldr	r3, [r3, #0]
 80070dc:	681a      	ldr	r2, [r3, #0]
 80070de:	687b      	ldr	r3, [r7, #4]
 80070e0:	681b      	ldr	r3, [r3, #0]
 80070e2:	f022 0201 	bic.w	r2, r2, #1
 80070e6:	601a      	str	r2, [r3, #0]
 80070e8:	e007      	b.n	80070fa <HAL_DMA_Abort_IT+0x2b2>
 80070ea:	687b      	ldr	r3, [r7, #4]
 80070ec:	681b      	ldr	r3, [r3, #0]
 80070ee:	681a      	ldr	r2, [r3, #0]
 80070f0:	687b      	ldr	r3, [r7, #4]
 80070f2:	681b      	ldr	r3, [r3, #0]
 80070f4:	f022 0201 	bic.w	r2, r2, #1
 80070f8:	601a      	str	r2, [r3, #0]

      if(IS_DMA_DMAMUX_ALL_INSTANCE(hdma->Instance) != 0U) /* No DMAMUX available for BDMA1 */
 80070fa:	687b      	ldr	r3, [r7, #4]
 80070fc:	681b      	ldr	r3, [r3, #0]
 80070fe:	4a3c      	ldr	r2, [pc, #240]	@ (80071f0 <HAL_DMA_Abort_IT+0x3a8>)
 8007100:	4293      	cmp	r3, r2
 8007102:	d072      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007104:	687b      	ldr	r3, [r7, #4]
 8007106:	681b      	ldr	r3, [r3, #0]
 8007108:	4a3a      	ldr	r2, [pc, #232]	@ (80071f4 <HAL_DMA_Abort_IT+0x3ac>)
 800710a:	4293      	cmp	r3, r2
 800710c:	d06d      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 800710e:	687b      	ldr	r3, [r7, #4]
 8007110:	681b      	ldr	r3, [r3, #0]
 8007112:	4a39      	ldr	r2, [pc, #228]	@ (80071f8 <HAL_DMA_Abort_IT+0x3b0>)
 8007114:	4293      	cmp	r3, r2
 8007116:	d068      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007118:	687b      	ldr	r3, [r7, #4]
 800711a:	681b      	ldr	r3, [r3, #0]
 800711c:	4a37      	ldr	r2, [pc, #220]	@ (80071fc <HAL_DMA_Abort_IT+0x3b4>)
 800711e:	4293      	cmp	r3, r2
 8007120:	d063      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007122:	687b      	ldr	r3, [r7, #4]
 8007124:	681b      	ldr	r3, [r3, #0]
 8007126:	4a36      	ldr	r2, [pc, #216]	@ (8007200 <HAL_DMA_Abort_IT+0x3b8>)
 8007128:	4293      	cmp	r3, r2
 800712a:	d05e      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 800712c:	687b      	ldr	r3, [r7, #4]
 800712e:	681b      	ldr	r3, [r3, #0]
 8007130:	4a34      	ldr	r2, [pc, #208]	@ (8007204 <HAL_DMA_Abort_IT+0x3bc>)
 8007132:	4293      	cmp	r3, r2
 8007134:	d059      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007136:	687b      	ldr	r3, [r7, #4]
 8007138:	681b      	ldr	r3, [r3, #0]
 800713a:	4a33      	ldr	r2, [pc, #204]	@ (8007208 <HAL_DMA_Abort_IT+0x3c0>)
 800713c:	4293      	cmp	r3, r2
 800713e:	d054      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007140:	687b      	ldr	r3, [r7, #4]
 8007142:	681b      	ldr	r3, [r3, #0]
 8007144:	4a31      	ldr	r2, [pc, #196]	@ (800720c <HAL_DMA_Abort_IT+0x3c4>)
 8007146:	4293      	cmp	r3, r2
 8007148:	d04f      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 800714a:	687b      	ldr	r3, [r7, #4]
 800714c:	681b      	ldr	r3, [r3, #0]
 800714e:	4a30      	ldr	r2, [pc, #192]	@ (8007210 <HAL_DMA_Abort_IT+0x3c8>)
 8007150:	4293      	cmp	r3, r2
 8007152:	d04a      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007154:	687b      	ldr	r3, [r7, #4]
 8007156:	681b      	ldr	r3, [r3, #0]
 8007158:	4a2e      	ldr	r2, [pc, #184]	@ (8007214 <HAL_DMA_Abort_IT+0x3cc>)
 800715a:	4293      	cmp	r3, r2
 800715c:	d045      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 800715e:	687b      	ldr	r3, [r7, #4]
 8007160:	681b      	ldr	r3, [r3, #0]
 8007162:	4a2d      	ldr	r2, [pc, #180]	@ (8007218 <HAL_DMA_Abort_IT+0x3d0>)
 8007164:	4293      	cmp	r3, r2
 8007166:	d040      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007168:	687b      	ldr	r3, [r7, #4]
 800716a:	681b      	ldr	r3, [r3, #0]
 800716c:	4a2b      	ldr	r2, [pc, #172]	@ (800721c <HAL_DMA_Abort_IT+0x3d4>)
 800716e:	4293      	cmp	r3, r2
 8007170:	d03b      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007172:	687b      	ldr	r3, [r7, #4]
 8007174:	681b      	ldr	r3, [r3, #0]
 8007176:	4a2a      	ldr	r2, [pc, #168]	@ (8007220 <HAL_DMA_Abort_IT+0x3d8>)
 8007178:	4293      	cmp	r3, r2
 800717a:	d036      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 800717c:	687b      	ldr	r3, [r7, #4]
 800717e:	681b      	ldr	r3, [r3, #0]
 8007180:	4a28      	ldr	r2, [pc, #160]	@ (8007224 <HAL_DMA_Abort_IT+0x3dc>)
 8007182:	4293      	cmp	r3, r2
 8007184:	d031      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007186:	687b      	ldr	r3, [r7, #4]
 8007188:	681b      	ldr	r3, [r3, #0]
 800718a:	4a27      	ldr	r2, [pc, #156]	@ (8007228 <HAL_DMA_Abort_IT+0x3e0>)
 800718c:	4293      	cmp	r3, r2
 800718e:	d02c      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 8007190:	687b      	ldr	r3, [r7, #4]
 8007192:	681b      	ldr	r3, [r3, #0]
 8007194:	4a25      	ldr	r2, [pc, #148]	@ (800722c <HAL_DMA_Abort_IT+0x3e4>)
 8007196:	4293      	cmp	r3, r2
 8007198:	d027      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 800719a:	687b      	ldr	r3, [r7, #4]
 800719c:	681b      	ldr	r3, [r3, #0]
 800719e:	4a24      	ldr	r2, [pc, #144]	@ (8007230 <HAL_DMA_Abort_IT+0x3e8>)
 80071a0:	4293      	cmp	r3, r2
 80071a2:	d022      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 80071a4:	687b      	ldr	r3, [r7, #4]
 80071a6:	681b      	ldr	r3, [r3, #0]
 80071a8:	4a22      	ldr	r2, [pc, #136]	@ (8007234 <HAL_DMA_Abort_IT+0x3ec>)
 80071aa:	4293      	cmp	r3, r2
 80071ac:	d01d      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 80071ae:	687b      	ldr	r3, [r7, #4]
 80071b0:	681b      	ldr	r3, [r3, #0]
 80071b2:	4a21      	ldr	r2, [pc, #132]	@ (8007238 <HAL_DMA_Abort_IT+0x3f0>)
 80071b4:	4293      	cmp	r3, r2
 80071b6:	d018      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 80071b8:	687b      	ldr	r3, [r7, #4]
 80071ba:	681b      	ldr	r3, [r3, #0]
 80071bc:	4a1f      	ldr	r2, [pc, #124]	@ (800723c <HAL_DMA_Abort_IT+0x3f4>)
 80071be:	4293      	cmp	r3, r2
 80071c0:	d013      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 80071c2:	687b      	ldr	r3, [r7, #4]
 80071c4:	681b      	ldr	r3, [r3, #0]
 80071c6:	4a1e      	ldr	r2, [pc, #120]	@ (8007240 <HAL_DMA_Abort_IT+0x3f8>)
 80071c8:	4293      	cmp	r3, r2
 80071ca:	d00e      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 80071cc:	687b      	ldr	r3, [r7, #4]
 80071ce:	681b      	ldr	r3, [r3, #0]
 80071d0:	4a1c      	ldr	r2, [pc, #112]	@ (8007244 <HAL_DMA_Abort_IT+0x3fc>)
 80071d2:	4293      	cmp	r3, r2
 80071d4:	d009      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 80071d6:	687b      	ldr	r3, [r7, #4]
 80071d8:	681b      	ldr	r3, [r3, #0]
 80071da:	4a1b      	ldr	r2, [pc, #108]	@ (8007248 <HAL_DMA_Abort_IT+0x400>)
 80071dc:	4293      	cmp	r3, r2
 80071de:	d004      	beq.n	80071ea <HAL_DMA_Abort_IT+0x3a2>
 80071e0:	687b      	ldr	r3, [r7, #4]
 80071e2:	681b      	ldr	r3, [r3, #0]
 80071e4:	4a19      	ldr	r2, [pc, #100]	@ (800724c <HAL_DMA_Abort_IT+0x404>)
 80071e6:	4293      	cmp	r3, r2
 80071e8:	d132      	bne.n	8007250 <HAL_DMA_Abort_IT+0x408>
 80071ea:	2301      	movs	r3, #1
 80071ec:	e031      	b.n	8007252 <HAL_DMA_Abort_IT+0x40a>
 80071ee:	bf00      	nop
 80071f0:	40020010 	.word	0x40020010
 80071f4:	40020028 	.word	0x40020028
 80071f8:	40020040 	.word	0x40020040
 80071fc:	40020058 	.word	0x40020058
 8007200:	40020070 	.word	0x40020070
 8007204:	40020088 	.word	0x40020088
 8007208:	400200a0 	.word	0x400200a0
 800720c:	400200b8 	.word	0x400200b8
 8007210:	40020410 	.word	0x40020410
 8007214:	40020428 	.word	0x40020428
 8007218:	40020440 	.word	0x40020440
 800721c:	40020458 	.word	0x40020458
 8007220:	40020470 	.word	0x40020470
 8007224:	40020488 	.word	0x40020488
 8007228:	400204a0 	.word	0x400204a0
 800722c:	400204b8 	.word	0x400204b8
 8007230:	58025408 	.word	0x58025408
 8007234:	5802541c 	.word	0x5802541c
 8007238:	58025430 	.word	0x58025430
 800723c:	58025444 	.word	0x58025444
 8007240:	58025458 	.word	0x58025458
 8007244:	5802546c 	.word	0x5802546c
 8007248:	58025480 	.word	0x58025480
 800724c:	58025494 	.word	0x58025494
 8007250:	2300      	movs	r3, #0
 8007252:	2b00      	cmp	r3, #0
 8007254:	d028      	beq.n	80072a8 <HAL_DMA_Abort_IT+0x460>
      {
        /* disable the DMAMUX sync overrun IT */
        hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
 8007256:	687b      	ldr	r3, [r7, #4]
 8007258:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800725a:	681a      	ldr	r2, [r3, #0]
 800725c:	687b      	ldr	r3, [r7, #4]
 800725e:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8007260:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 8007264:	601a      	str	r2, [r3, #0]

        /* Clear all flags */
        regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 8007266:	687b      	ldr	r3, [r7, #4]
 8007268:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800726a:	60fb      	str	r3, [r7, #12]
        regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU));
 800726c:	687b      	ldr	r3, [r7, #4]
 800726e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007270:	f003 031f 	and.w	r3, r3, #31
 8007274:	2201      	movs	r2, #1
 8007276:	409a      	lsls	r2, r3
 8007278:	68fb      	ldr	r3, [r7, #12]
 800727a:	605a      	str	r2, [r3, #4]

        /* Clear the DMAMUX synchro overrun flag */
        hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
 800727c:	687b      	ldr	r3, [r7, #4]
 800727e:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8007280:	687a      	ldr	r2, [r7, #4]
 8007282:	6e92      	ldr	r2, [r2, #104]	@ 0x68
 8007284:	605a      	str	r2, [r3, #4]

        if(hdma->DMAmuxRequestGen != 0U)
 8007286:	687b      	ldr	r3, [r7, #4]
 8007288:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800728a:	2b00      	cmp	r3, #0
 800728c:	d00c      	beq.n	80072a8 <HAL_DMA_Abort_IT+0x460>
        {
          /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
          /* disable the request gen overrun IT */
          hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
 800728e:	687b      	ldr	r3, [r7, #4]
 8007290:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8007292:	681a      	ldr	r2, [r3, #0]
 8007294:	687b      	ldr	r3, [r7, #4]
 8007296:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8007298:	f422 7280 	bic.w	r2, r2, #256	@ 0x100
 800729c:	601a      	str	r2, [r3, #0]

          /* Clear the DMAMUX request generator overrun flag */
          hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
 800729e:	687b      	ldr	r3, [r7, #4]
 80072a0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80072a2:	687a      	ldr	r2, [r7, #4]
 80072a4:	6f52      	ldr	r2, [r2, #116]	@ 0x74
 80072a6:	605a      	str	r2, [r3, #4]
        }
      }

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 80072a8:	687b      	ldr	r3, [r7, #4]
 80072aa:	2201      	movs	r2, #1
 80072ac:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 80072b0:	687b      	ldr	r3, [r7, #4]
 80072b2:	2200      	movs	r2, #0
 80072b4:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      /* Call User Abort callback */
      if(hdma->XferAbortCallback != NULL)
 80072b8:	687b      	ldr	r3, [r7, #4]
 80072ba:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80072bc:	2b00      	cmp	r3, #0
 80072be:	d003      	beq.n	80072c8 <HAL_DMA_Abort_IT+0x480>
      {
        hdma->XferAbortCallback(hdma);
 80072c0:	687b      	ldr	r3, [r7, #4]
 80072c2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80072c4:	6878      	ldr	r0, [r7, #4]
 80072c6:	4798      	blx	r3
      }
    }
  }

  return HAL_OK;
 80072c8:	2300      	movs	r3, #0
}
 80072ca:	4618      	mov	r0, r3
 80072cc:	3710      	adds	r7, #16
 80072ce:	46bd      	mov	sp, r7
 80072d0:	bd80      	pop	{r7, pc}
 80072d2:	bf00      	nop

080072d4 <HAL_DMA_IRQHandler>:
  * @param  hdma: pointer to a DMA_HandleTypeDef structure that contains
  *               the configuration information for the specified DMA Stream.
  * @retval None
  */
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
 80072d4:	b580      	push	{r7, lr}
 80072d6:	b08a      	sub	sp, #40	@ 0x28
 80072d8:	af00      	add	r7, sp, #0
 80072da:	6078      	str	r0, [r7, #4]
  uint32_t tmpisr_dma, tmpisr_bdma;
  uint32_t ccr_reg;
  __IO uint32_t count = 0U;
 80072dc:	2300      	movs	r3, #0
 80072de:	60fb      	str	r3, [r7, #12]
  uint32_t timeout = SystemCoreClock / 9600U;
 80072e0:	4b67      	ldr	r3, [pc, #412]	@ (8007480 <HAL_DMA_IRQHandler+0x1ac>)
 80072e2:	681b      	ldr	r3, [r3, #0]
 80072e4:	4a67      	ldr	r2, [pc, #412]	@ (8007484 <HAL_DMA_IRQHandler+0x1b0>)
 80072e6:	fba2 2303 	umull	r2, r3, r2, r3
 80072ea:	0a9b      	lsrs	r3, r3, #10
 80072ec:	627b      	str	r3, [r7, #36]	@ 0x24

  /* calculate DMA base and stream number */
  DMA_Base_Registers  *regs_dma  = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 80072ee:	687b      	ldr	r3, [r7, #4]
 80072f0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 80072f2:	623b      	str	r3, [r7, #32]
  BDMA_Base_Registers *regs_bdma = (BDMA_Base_Registers *)hdma->StreamBaseAddress;
 80072f4:	687b      	ldr	r3, [r7, #4]
 80072f6:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 80072f8:	61fb      	str	r3, [r7, #28]

  tmpisr_dma  = regs_dma->ISR;
 80072fa:	6a3b      	ldr	r3, [r7, #32]
 80072fc:	681b      	ldr	r3, [r3, #0]
 80072fe:	61bb      	str	r3, [r7, #24]
  tmpisr_bdma = regs_bdma->ISR;
 8007300:	69fb      	ldr	r3, [r7, #28]
 8007302:	681b      	ldr	r3, [r3, #0]
 8007304:	617b      	str	r3, [r7, #20]

  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U)  /* DMA1 or DMA2 instance */
 8007306:	687b      	ldr	r3, [r7, #4]
 8007308:	681b      	ldr	r3, [r3, #0]
 800730a:	4a5f      	ldr	r2, [pc, #380]	@ (8007488 <HAL_DMA_IRQHandler+0x1b4>)
 800730c:	4293      	cmp	r3, r2
 800730e:	d04a      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 8007310:	687b      	ldr	r3, [r7, #4]
 8007312:	681b      	ldr	r3, [r3, #0]
 8007314:	4a5d      	ldr	r2, [pc, #372]	@ (800748c <HAL_DMA_IRQHandler+0x1b8>)
 8007316:	4293      	cmp	r3, r2
 8007318:	d045      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 800731a:	687b      	ldr	r3, [r7, #4]
 800731c:	681b      	ldr	r3, [r3, #0]
 800731e:	4a5c      	ldr	r2, [pc, #368]	@ (8007490 <HAL_DMA_IRQHandler+0x1bc>)
 8007320:	4293      	cmp	r3, r2
 8007322:	d040      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 8007324:	687b      	ldr	r3, [r7, #4]
 8007326:	681b      	ldr	r3, [r3, #0]
 8007328:	4a5a      	ldr	r2, [pc, #360]	@ (8007494 <HAL_DMA_IRQHandler+0x1c0>)
 800732a:	4293      	cmp	r3, r2
 800732c:	d03b      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 800732e:	687b      	ldr	r3, [r7, #4]
 8007330:	681b      	ldr	r3, [r3, #0]
 8007332:	4a59      	ldr	r2, [pc, #356]	@ (8007498 <HAL_DMA_IRQHandler+0x1c4>)
 8007334:	4293      	cmp	r3, r2
 8007336:	d036      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 8007338:	687b      	ldr	r3, [r7, #4]
 800733a:	681b      	ldr	r3, [r3, #0]
 800733c:	4a57      	ldr	r2, [pc, #348]	@ (800749c <HAL_DMA_IRQHandler+0x1c8>)
 800733e:	4293      	cmp	r3, r2
 8007340:	d031      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 8007342:	687b      	ldr	r3, [r7, #4]
 8007344:	681b      	ldr	r3, [r3, #0]
 8007346:	4a56      	ldr	r2, [pc, #344]	@ (80074a0 <HAL_DMA_IRQHandler+0x1cc>)
 8007348:	4293      	cmp	r3, r2
 800734a:	d02c      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 800734c:	687b      	ldr	r3, [r7, #4]
 800734e:	681b      	ldr	r3, [r3, #0]
 8007350:	4a54      	ldr	r2, [pc, #336]	@ (80074a4 <HAL_DMA_IRQHandler+0x1d0>)
 8007352:	4293      	cmp	r3, r2
 8007354:	d027      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 8007356:	687b      	ldr	r3, [r7, #4]
 8007358:	681b      	ldr	r3, [r3, #0]
 800735a:	4a53      	ldr	r2, [pc, #332]	@ (80074a8 <HAL_DMA_IRQHandler+0x1d4>)
 800735c:	4293      	cmp	r3, r2
 800735e:	d022      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 8007360:	687b      	ldr	r3, [r7, #4]
 8007362:	681b      	ldr	r3, [r3, #0]
 8007364:	4a51      	ldr	r2, [pc, #324]	@ (80074ac <HAL_DMA_IRQHandler+0x1d8>)
 8007366:	4293      	cmp	r3, r2
 8007368:	d01d      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 800736a:	687b      	ldr	r3, [r7, #4]
 800736c:	681b      	ldr	r3, [r3, #0]
 800736e:	4a50      	ldr	r2, [pc, #320]	@ (80074b0 <HAL_DMA_IRQHandler+0x1dc>)
 8007370:	4293      	cmp	r3, r2
 8007372:	d018      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 8007374:	687b      	ldr	r3, [r7, #4]
 8007376:	681b      	ldr	r3, [r3, #0]
 8007378:	4a4e      	ldr	r2, [pc, #312]	@ (80074b4 <HAL_DMA_IRQHandler+0x1e0>)
 800737a:	4293      	cmp	r3, r2
 800737c:	d013      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 800737e:	687b      	ldr	r3, [r7, #4]
 8007380:	681b      	ldr	r3, [r3, #0]
 8007382:	4a4d      	ldr	r2, [pc, #308]	@ (80074b8 <HAL_DMA_IRQHandler+0x1e4>)
 8007384:	4293      	cmp	r3, r2
 8007386:	d00e      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 8007388:	687b      	ldr	r3, [r7, #4]
 800738a:	681b      	ldr	r3, [r3, #0]
 800738c:	4a4b      	ldr	r2, [pc, #300]	@ (80074bc <HAL_DMA_IRQHandler+0x1e8>)
 800738e:	4293      	cmp	r3, r2
 8007390:	d009      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 8007392:	687b      	ldr	r3, [r7, #4]
 8007394:	681b      	ldr	r3, [r3, #0]
 8007396:	4a4a      	ldr	r2, [pc, #296]	@ (80074c0 <HAL_DMA_IRQHandler+0x1ec>)
 8007398:	4293      	cmp	r3, r2
 800739a:	d004      	beq.n	80073a6 <HAL_DMA_IRQHandler+0xd2>
 800739c:	687b      	ldr	r3, [r7, #4]
 800739e:	681b      	ldr	r3, [r3, #0]
 80073a0:	4a48      	ldr	r2, [pc, #288]	@ (80074c4 <HAL_DMA_IRQHandler+0x1f0>)
 80073a2:	4293      	cmp	r3, r2
 80073a4:	d101      	bne.n	80073aa <HAL_DMA_IRQHandler+0xd6>
 80073a6:	2301      	movs	r3, #1
 80073a8:	e000      	b.n	80073ac <HAL_DMA_IRQHandler+0xd8>
 80073aa:	2300      	movs	r3, #0
 80073ac:	2b00      	cmp	r3, #0
 80073ae:	f000 842b 	beq.w	8007c08 <HAL_DMA_IRQHandler+0x934>
  {
    /* Transfer Error Interrupt management ***************************************/
    if ((tmpisr_dma & (DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 80073b2:	687b      	ldr	r3, [r7, #4]
 80073b4:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80073b6:	f003 031f 	and.w	r3, r3, #31
 80073ba:	2208      	movs	r2, #8
 80073bc:	409a      	lsls	r2, r3
 80073be:	69bb      	ldr	r3, [r7, #24]
 80073c0:	4013      	ands	r3, r2
 80073c2:	2b00      	cmp	r3, #0
 80073c4:	f000 80a2 	beq.w	800750c <HAL_DMA_IRQHandler+0x238>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != 0U)
 80073c8:	687b      	ldr	r3, [r7, #4]
 80073ca:	681b      	ldr	r3, [r3, #0]
 80073cc:	4a2e      	ldr	r2, [pc, #184]	@ (8007488 <HAL_DMA_IRQHandler+0x1b4>)
 80073ce:	4293      	cmp	r3, r2
 80073d0:	d04a      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 80073d2:	687b      	ldr	r3, [r7, #4]
 80073d4:	681b      	ldr	r3, [r3, #0]
 80073d6:	4a2d      	ldr	r2, [pc, #180]	@ (800748c <HAL_DMA_IRQHandler+0x1b8>)
 80073d8:	4293      	cmp	r3, r2
 80073da:	d045      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 80073dc:	687b      	ldr	r3, [r7, #4]
 80073de:	681b      	ldr	r3, [r3, #0]
 80073e0:	4a2b      	ldr	r2, [pc, #172]	@ (8007490 <HAL_DMA_IRQHandler+0x1bc>)
 80073e2:	4293      	cmp	r3, r2
 80073e4:	d040      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 80073e6:	687b      	ldr	r3, [r7, #4]
 80073e8:	681b      	ldr	r3, [r3, #0]
 80073ea:	4a2a      	ldr	r2, [pc, #168]	@ (8007494 <HAL_DMA_IRQHandler+0x1c0>)
 80073ec:	4293      	cmp	r3, r2
 80073ee:	d03b      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 80073f0:	687b      	ldr	r3, [r7, #4]
 80073f2:	681b      	ldr	r3, [r3, #0]
 80073f4:	4a28      	ldr	r2, [pc, #160]	@ (8007498 <HAL_DMA_IRQHandler+0x1c4>)
 80073f6:	4293      	cmp	r3, r2
 80073f8:	d036      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 80073fa:	687b      	ldr	r3, [r7, #4]
 80073fc:	681b      	ldr	r3, [r3, #0]
 80073fe:	4a27      	ldr	r2, [pc, #156]	@ (800749c <HAL_DMA_IRQHandler+0x1c8>)
 8007400:	4293      	cmp	r3, r2
 8007402:	d031      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 8007404:	687b      	ldr	r3, [r7, #4]
 8007406:	681b      	ldr	r3, [r3, #0]
 8007408:	4a25      	ldr	r2, [pc, #148]	@ (80074a0 <HAL_DMA_IRQHandler+0x1cc>)
 800740a:	4293      	cmp	r3, r2
 800740c:	d02c      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 800740e:	687b      	ldr	r3, [r7, #4]
 8007410:	681b      	ldr	r3, [r3, #0]
 8007412:	4a24      	ldr	r2, [pc, #144]	@ (80074a4 <HAL_DMA_IRQHandler+0x1d0>)
 8007414:	4293      	cmp	r3, r2
 8007416:	d027      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 8007418:	687b      	ldr	r3, [r7, #4]
 800741a:	681b      	ldr	r3, [r3, #0]
 800741c:	4a22      	ldr	r2, [pc, #136]	@ (80074a8 <HAL_DMA_IRQHandler+0x1d4>)
 800741e:	4293      	cmp	r3, r2
 8007420:	d022      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 8007422:	687b      	ldr	r3, [r7, #4]
 8007424:	681b      	ldr	r3, [r3, #0]
 8007426:	4a21      	ldr	r2, [pc, #132]	@ (80074ac <HAL_DMA_IRQHandler+0x1d8>)
 8007428:	4293      	cmp	r3, r2
 800742a:	d01d      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 800742c:	687b      	ldr	r3, [r7, #4]
 800742e:	681b      	ldr	r3, [r3, #0]
 8007430:	4a1f      	ldr	r2, [pc, #124]	@ (80074b0 <HAL_DMA_IRQHandler+0x1dc>)
 8007432:	4293      	cmp	r3, r2
 8007434:	d018      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 8007436:	687b      	ldr	r3, [r7, #4]
 8007438:	681b      	ldr	r3, [r3, #0]
 800743a:	4a1e      	ldr	r2, [pc, #120]	@ (80074b4 <HAL_DMA_IRQHandler+0x1e0>)
 800743c:	4293      	cmp	r3, r2
 800743e:	d013      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 8007440:	687b      	ldr	r3, [r7, #4]
 8007442:	681b      	ldr	r3, [r3, #0]
 8007444:	4a1c      	ldr	r2, [pc, #112]	@ (80074b8 <HAL_DMA_IRQHandler+0x1e4>)
 8007446:	4293      	cmp	r3, r2
 8007448:	d00e      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 800744a:	687b      	ldr	r3, [r7, #4]
 800744c:	681b      	ldr	r3, [r3, #0]
 800744e:	4a1b      	ldr	r2, [pc, #108]	@ (80074bc <HAL_DMA_IRQHandler+0x1e8>)
 8007450:	4293      	cmp	r3, r2
 8007452:	d009      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 8007454:	687b      	ldr	r3, [r7, #4]
 8007456:	681b      	ldr	r3, [r3, #0]
 8007458:	4a19      	ldr	r2, [pc, #100]	@ (80074c0 <HAL_DMA_IRQHandler+0x1ec>)
 800745a:	4293      	cmp	r3, r2
 800745c:	d004      	beq.n	8007468 <HAL_DMA_IRQHandler+0x194>
 800745e:	687b      	ldr	r3, [r7, #4]
 8007460:	681b      	ldr	r3, [r3, #0]
 8007462:	4a18      	ldr	r2, [pc, #96]	@ (80074c4 <HAL_DMA_IRQHandler+0x1f0>)
 8007464:	4293      	cmp	r3, r2
 8007466:	d12f      	bne.n	80074c8 <HAL_DMA_IRQHandler+0x1f4>
 8007468:	687b      	ldr	r3, [r7, #4]
 800746a:	681b      	ldr	r3, [r3, #0]
 800746c:	681b      	ldr	r3, [r3, #0]
 800746e:	f003 0304 	and.w	r3, r3, #4
 8007472:	2b00      	cmp	r3, #0
 8007474:	bf14      	ite	ne
 8007476:	2301      	movne	r3, #1
 8007478:	2300      	moveq	r3, #0
 800747a:	b2db      	uxtb	r3, r3
 800747c:	e02e      	b.n	80074dc <HAL_DMA_IRQHandler+0x208>
 800747e:	bf00      	nop
 8007480:	2400000c 	.word	0x2400000c
 8007484:	1b4e81b5 	.word	0x1b4e81b5
 8007488:	40020010 	.word	0x40020010
 800748c:	40020028 	.word	0x40020028
 8007490:	40020040 	.word	0x40020040
 8007494:	40020058 	.word	0x40020058
 8007498:	40020070 	.word	0x40020070
 800749c:	40020088 	.word	0x40020088
 80074a0:	400200a0 	.word	0x400200a0
 80074a4:	400200b8 	.word	0x400200b8
 80074a8:	40020410 	.word	0x40020410
 80074ac:	40020428 	.word	0x40020428
 80074b0:	40020440 	.word	0x40020440
 80074b4:	40020458 	.word	0x40020458
 80074b8:	40020470 	.word	0x40020470
 80074bc:	40020488 	.word	0x40020488
 80074c0:	400204a0 	.word	0x400204a0
 80074c4:	400204b8 	.word	0x400204b8
 80074c8:	687b      	ldr	r3, [r7, #4]
 80074ca:	681b      	ldr	r3, [r3, #0]
 80074cc:	681b      	ldr	r3, [r3, #0]
 80074ce:	f003 0308 	and.w	r3, r3, #8
 80074d2:	2b00      	cmp	r3, #0
 80074d4:	bf14      	ite	ne
 80074d6:	2301      	movne	r3, #1
 80074d8:	2300      	moveq	r3, #0
 80074da:	b2db      	uxtb	r3, r3
 80074dc:	2b00      	cmp	r3, #0
 80074de:	d015      	beq.n	800750c <HAL_DMA_IRQHandler+0x238>
      {
        /* Disable the transfer error interrupt */
        ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TE);
 80074e0:	687b      	ldr	r3, [r7, #4]
 80074e2:	681b      	ldr	r3, [r3, #0]
 80074e4:	681a      	ldr	r2, [r3, #0]
 80074e6:	687b      	ldr	r3, [r7, #4]
 80074e8:	681b      	ldr	r3, [r3, #0]
 80074ea:	f022 0204 	bic.w	r2, r2, #4
 80074ee:	601a      	str	r2, [r3, #0]

        /* Clear the transfer error flag */
        regs_dma->IFCR = DMA_FLAG_TEIF0_4 << (hdma->StreamIndex & 0x1FU);
 80074f0:	687b      	ldr	r3, [r7, #4]
 80074f2:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80074f4:	f003 031f 	and.w	r3, r3, #31
 80074f8:	2208      	movs	r2, #8
 80074fa:	409a      	lsls	r2, r3
 80074fc:	6a3b      	ldr	r3, [r7, #32]
 80074fe:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_TE;
 8007500:	687b      	ldr	r3, [r7, #4]
 8007502:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8007504:	f043 0201 	orr.w	r2, r3, #1
 8007508:	687b      	ldr	r3, [r7, #4]
 800750a:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* FIFO Error Interrupt management ******************************************/
    if ((tmpisr_dma & (DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 800750c:	687b      	ldr	r3, [r7, #4]
 800750e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007510:	f003 031f 	and.w	r3, r3, #31
 8007514:	69ba      	ldr	r2, [r7, #24]
 8007516:	fa22 f303 	lsr.w	r3, r2, r3
 800751a:	f003 0301 	and.w	r3, r3, #1
 800751e:	2b00      	cmp	r3, #0
 8007520:	d06e      	beq.n	8007600 <HAL_DMA_IRQHandler+0x32c>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != 0U)
 8007522:	687b      	ldr	r3, [r7, #4]
 8007524:	681b      	ldr	r3, [r3, #0]
 8007526:	4a69      	ldr	r2, [pc, #420]	@ (80076cc <HAL_DMA_IRQHandler+0x3f8>)
 8007528:	4293      	cmp	r3, r2
 800752a:	d04a      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 800752c:	687b      	ldr	r3, [r7, #4]
 800752e:	681b      	ldr	r3, [r3, #0]
 8007530:	4a67      	ldr	r2, [pc, #412]	@ (80076d0 <HAL_DMA_IRQHandler+0x3fc>)
 8007532:	4293      	cmp	r3, r2
 8007534:	d045      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 8007536:	687b      	ldr	r3, [r7, #4]
 8007538:	681b      	ldr	r3, [r3, #0]
 800753a:	4a66      	ldr	r2, [pc, #408]	@ (80076d4 <HAL_DMA_IRQHandler+0x400>)
 800753c:	4293      	cmp	r3, r2
 800753e:	d040      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 8007540:	687b      	ldr	r3, [r7, #4]
 8007542:	681b      	ldr	r3, [r3, #0]
 8007544:	4a64      	ldr	r2, [pc, #400]	@ (80076d8 <HAL_DMA_IRQHandler+0x404>)
 8007546:	4293      	cmp	r3, r2
 8007548:	d03b      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 800754a:	687b      	ldr	r3, [r7, #4]
 800754c:	681b      	ldr	r3, [r3, #0]
 800754e:	4a63      	ldr	r2, [pc, #396]	@ (80076dc <HAL_DMA_IRQHandler+0x408>)
 8007550:	4293      	cmp	r3, r2
 8007552:	d036      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 8007554:	687b      	ldr	r3, [r7, #4]
 8007556:	681b      	ldr	r3, [r3, #0]
 8007558:	4a61      	ldr	r2, [pc, #388]	@ (80076e0 <HAL_DMA_IRQHandler+0x40c>)
 800755a:	4293      	cmp	r3, r2
 800755c:	d031      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 800755e:	687b      	ldr	r3, [r7, #4]
 8007560:	681b      	ldr	r3, [r3, #0]
 8007562:	4a60      	ldr	r2, [pc, #384]	@ (80076e4 <HAL_DMA_IRQHandler+0x410>)
 8007564:	4293      	cmp	r3, r2
 8007566:	d02c      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 8007568:	687b      	ldr	r3, [r7, #4]
 800756a:	681b      	ldr	r3, [r3, #0]
 800756c:	4a5e      	ldr	r2, [pc, #376]	@ (80076e8 <HAL_DMA_IRQHandler+0x414>)
 800756e:	4293      	cmp	r3, r2
 8007570:	d027      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 8007572:	687b      	ldr	r3, [r7, #4]
 8007574:	681b      	ldr	r3, [r3, #0]
 8007576:	4a5d      	ldr	r2, [pc, #372]	@ (80076ec <HAL_DMA_IRQHandler+0x418>)
 8007578:	4293      	cmp	r3, r2
 800757a:	d022      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 800757c:	687b      	ldr	r3, [r7, #4]
 800757e:	681b      	ldr	r3, [r3, #0]
 8007580:	4a5b      	ldr	r2, [pc, #364]	@ (80076f0 <HAL_DMA_IRQHandler+0x41c>)
 8007582:	4293      	cmp	r3, r2
 8007584:	d01d      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 8007586:	687b      	ldr	r3, [r7, #4]
 8007588:	681b      	ldr	r3, [r3, #0]
 800758a:	4a5a      	ldr	r2, [pc, #360]	@ (80076f4 <HAL_DMA_IRQHandler+0x420>)
 800758c:	4293      	cmp	r3, r2
 800758e:	d018      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 8007590:	687b      	ldr	r3, [r7, #4]
 8007592:	681b      	ldr	r3, [r3, #0]
 8007594:	4a58      	ldr	r2, [pc, #352]	@ (80076f8 <HAL_DMA_IRQHandler+0x424>)
 8007596:	4293      	cmp	r3, r2
 8007598:	d013      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 800759a:	687b      	ldr	r3, [r7, #4]
 800759c:	681b      	ldr	r3, [r3, #0]
 800759e:	4a57      	ldr	r2, [pc, #348]	@ (80076fc <HAL_DMA_IRQHandler+0x428>)
 80075a0:	4293      	cmp	r3, r2
 80075a2:	d00e      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 80075a4:	687b      	ldr	r3, [r7, #4]
 80075a6:	681b      	ldr	r3, [r3, #0]
 80075a8:	4a55      	ldr	r2, [pc, #340]	@ (8007700 <HAL_DMA_IRQHandler+0x42c>)
 80075aa:	4293      	cmp	r3, r2
 80075ac:	d009      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 80075ae:	687b      	ldr	r3, [r7, #4]
 80075b0:	681b      	ldr	r3, [r3, #0]
 80075b2:	4a54      	ldr	r2, [pc, #336]	@ (8007704 <HAL_DMA_IRQHandler+0x430>)
 80075b4:	4293      	cmp	r3, r2
 80075b6:	d004      	beq.n	80075c2 <HAL_DMA_IRQHandler+0x2ee>
 80075b8:	687b      	ldr	r3, [r7, #4]
 80075ba:	681b      	ldr	r3, [r3, #0]
 80075bc:	4a52      	ldr	r2, [pc, #328]	@ (8007708 <HAL_DMA_IRQHandler+0x434>)
 80075be:	4293      	cmp	r3, r2
 80075c0:	d10a      	bne.n	80075d8 <HAL_DMA_IRQHandler+0x304>
 80075c2:	687b      	ldr	r3, [r7, #4]
 80075c4:	681b      	ldr	r3, [r3, #0]
 80075c6:	695b      	ldr	r3, [r3, #20]
 80075c8:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 80075cc:	2b00      	cmp	r3, #0
 80075ce:	bf14      	ite	ne
 80075d0:	2301      	movne	r3, #1
 80075d2:	2300      	moveq	r3, #0
 80075d4:	b2db      	uxtb	r3, r3
 80075d6:	e003      	b.n	80075e0 <HAL_DMA_IRQHandler+0x30c>
 80075d8:	687b      	ldr	r3, [r7, #4]
 80075da:	681b      	ldr	r3, [r3, #0]
 80075dc:	681b      	ldr	r3, [r3, #0]
 80075de:	2300      	movs	r3, #0
 80075e0:	2b00      	cmp	r3, #0
 80075e2:	d00d      	beq.n	8007600 <HAL_DMA_IRQHandler+0x32c>
      {
        /* Clear the FIFO error flag */
        regs_dma->IFCR = DMA_FLAG_FEIF0_4 << (hdma->StreamIndex & 0x1FU);
 80075e4:	687b      	ldr	r3, [r7, #4]
 80075e6:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80075e8:	f003 031f 	and.w	r3, r3, #31
 80075ec:	2201      	movs	r2, #1
 80075ee:	409a      	lsls	r2, r3
 80075f0:	6a3b      	ldr	r3, [r7, #32]
 80075f2:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_FE;
 80075f4:	687b      	ldr	r3, [r7, #4]
 80075f6:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80075f8:	f043 0202 	orr.w	r2, r3, #2
 80075fc:	687b      	ldr	r3, [r7, #4]
 80075fe:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Direct Mode Error Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8007600:	687b      	ldr	r3, [r7, #4]
 8007602:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007604:	f003 031f 	and.w	r3, r3, #31
 8007608:	2204      	movs	r2, #4
 800760a:	409a      	lsls	r2, r3
 800760c:	69bb      	ldr	r3, [r7, #24]
 800760e:	4013      	ands	r3, r2
 8007610:	2b00      	cmp	r3, #0
 8007612:	f000 808f 	beq.w	8007734 <HAL_DMA_IRQHandler+0x460>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != 0U)
 8007616:	687b      	ldr	r3, [r7, #4]
 8007618:	681b      	ldr	r3, [r3, #0]
 800761a:	4a2c      	ldr	r2, [pc, #176]	@ (80076cc <HAL_DMA_IRQHandler+0x3f8>)
 800761c:	4293      	cmp	r3, r2
 800761e:	d04a      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 8007620:	687b      	ldr	r3, [r7, #4]
 8007622:	681b      	ldr	r3, [r3, #0]
 8007624:	4a2a      	ldr	r2, [pc, #168]	@ (80076d0 <HAL_DMA_IRQHandler+0x3fc>)
 8007626:	4293      	cmp	r3, r2
 8007628:	d045      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 800762a:	687b      	ldr	r3, [r7, #4]
 800762c:	681b      	ldr	r3, [r3, #0]
 800762e:	4a29      	ldr	r2, [pc, #164]	@ (80076d4 <HAL_DMA_IRQHandler+0x400>)
 8007630:	4293      	cmp	r3, r2
 8007632:	d040      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 8007634:	687b      	ldr	r3, [r7, #4]
 8007636:	681b      	ldr	r3, [r3, #0]
 8007638:	4a27      	ldr	r2, [pc, #156]	@ (80076d8 <HAL_DMA_IRQHandler+0x404>)
 800763a:	4293      	cmp	r3, r2
 800763c:	d03b      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 800763e:	687b      	ldr	r3, [r7, #4]
 8007640:	681b      	ldr	r3, [r3, #0]
 8007642:	4a26      	ldr	r2, [pc, #152]	@ (80076dc <HAL_DMA_IRQHandler+0x408>)
 8007644:	4293      	cmp	r3, r2
 8007646:	d036      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 8007648:	687b      	ldr	r3, [r7, #4]
 800764a:	681b      	ldr	r3, [r3, #0]
 800764c:	4a24      	ldr	r2, [pc, #144]	@ (80076e0 <HAL_DMA_IRQHandler+0x40c>)
 800764e:	4293      	cmp	r3, r2
 8007650:	d031      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 8007652:	687b      	ldr	r3, [r7, #4]
 8007654:	681b      	ldr	r3, [r3, #0]
 8007656:	4a23      	ldr	r2, [pc, #140]	@ (80076e4 <HAL_DMA_IRQHandler+0x410>)
 8007658:	4293      	cmp	r3, r2
 800765a:	d02c      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 800765c:	687b      	ldr	r3, [r7, #4]
 800765e:	681b      	ldr	r3, [r3, #0]
 8007660:	4a21      	ldr	r2, [pc, #132]	@ (80076e8 <HAL_DMA_IRQHandler+0x414>)
 8007662:	4293      	cmp	r3, r2
 8007664:	d027      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 8007666:	687b      	ldr	r3, [r7, #4]
 8007668:	681b      	ldr	r3, [r3, #0]
 800766a:	4a20      	ldr	r2, [pc, #128]	@ (80076ec <HAL_DMA_IRQHandler+0x418>)
 800766c:	4293      	cmp	r3, r2
 800766e:	d022      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 8007670:	687b      	ldr	r3, [r7, #4]
 8007672:	681b      	ldr	r3, [r3, #0]
 8007674:	4a1e      	ldr	r2, [pc, #120]	@ (80076f0 <HAL_DMA_IRQHandler+0x41c>)
 8007676:	4293      	cmp	r3, r2
 8007678:	d01d      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 800767a:	687b      	ldr	r3, [r7, #4]
 800767c:	681b      	ldr	r3, [r3, #0]
 800767e:	4a1d      	ldr	r2, [pc, #116]	@ (80076f4 <HAL_DMA_IRQHandler+0x420>)
 8007680:	4293      	cmp	r3, r2
 8007682:	d018      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 8007684:	687b      	ldr	r3, [r7, #4]
 8007686:	681b      	ldr	r3, [r3, #0]
 8007688:	4a1b      	ldr	r2, [pc, #108]	@ (80076f8 <HAL_DMA_IRQHandler+0x424>)
 800768a:	4293      	cmp	r3, r2
 800768c:	d013      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 800768e:	687b      	ldr	r3, [r7, #4]
 8007690:	681b      	ldr	r3, [r3, #0]
 8007692:	4a1a      	ldr	r2, [pc, #104]	@ (80076fc <HAL_DMA_IRQHandler+0x428>)
 8007694:	4293      	cmp	r3, r2
 8007696:	d00e      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 8007698:	687b      	ldr	r3, [r7, #4]
 800769a:	681b      	ldr	r3, [r3, #0]
 800769c:	4a18      	ldr	r2, [pc, #96]	@ (8007700 <HAL_DMA_IRQHandler+0x42c>)
 800769e:	4293      	cmp	r3, r2
 80076a0:	d009      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 80076a2:	687b      	ldr	r3, [r7, #4]
 80076a4:	681b      	ldr	r3, [r3, #0]
 80076a6:	4a17      	ldr	r2, [pc, #92]	@ (8007704 <HAL_DMA_IRQHandler+0x430>)
 80076a8:	4293      	cmp	r3, r2
 80076aa:	d004      	beq.n	80076b6 <HAL_DMA_IRQHandler+0x3e2>
 80076ac:	687b      	ldr	r3, [r7, #4]
 80076ae:	681b      	ldr	r3, [r3, #0]
 80076b0:	4a15      	ldr	r2, [pc, #84]	@ (8007708 <HAL_DMA_IRQHandler+0x434>)
 80076b2:	4293      	cmp	r3, r2
 80076b4:	d12a      	bne.n	800770c <HAL_DMA_IRQHandler+0x438>
 80076b6:	687b      	ldr	r3, [r7, #4]
 80076b8:	681b      	ldr	r3, [r3, #0]
 80076ba:	681b      	ldr	r3, [r3, #0]
 80076bc:	f003 0302 	and.w	r3, r3, #2
 80076c0:	2b00      	cmp	r3, #0
 80076c2:	bf14      	ite	ne
 80076c4:	2301      	movne	r3, #1
 80076c6:	2300      	moveq	r3, #0
 80076c8:	b2db      	uxtb	r3, r3
 80076ca:	e023      	b.n	8007714 <HAL_DMA_IRQHandler+0x440>
 80076cc:	40020010 	.word	0x40020010
 80076d0:	40020028 	.word	0x40020028
 80076d4:	40020040 	.word	0x40020040
 80076d8:	40020058 	.word	0x40020058
 80076dc:	40020070 	.word	0x40020070
 80076e0:	40020088 	.word	0x40020088
 80076e4:	400200a0 	.word	0x400200a0
 80076e8:	400200b8 	.word	0x400200b8
 80076ec:	40020410 	.word	0x40020410
 80076f0:	40020428 	.word	0x40020428
 80076f4:	40020440 	.word	0x40020440
 80076f8:	40020458 	.word	0x40020458
 80076fc:	40020470 	.word	0x40020470
 8007700:	40020488 	.word	0x40020488
 8007704:	400204a0 	.word	0x400204a0
 8007708:	400204b8 	.word	0x400204b8
 800770c:	687b      	ldr	r3, [r7, #4]
 800770e:	681b      	ldr	r3, [r3, #0]
 8007710:	681b      	ldr	r3, [r3, #0]
 8007712:	2300      	movs	r3, #0
 8007714:	2b00      	cmp	r3, #0
 8007716:	d00d      	beq.n	8007734 <HAL_DMA_IRQHandler+0x460>
      {
        /* Clear the direct mode error flag */
        regs_dma->IFCR = DMA_FLAG_DMEIF0_4 << (hdma->StreamIndex & 0x1FU);
 8007718:	687b      	ldr	r3, [r7, #4]
 800771a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800771c:	f003 031f 	and.w	r3, r3, #31
 8007720:	2204      	movs	r2, #4
 8007722:	409a      	lsls	r2, r3
 8007724:	6a3b      	ldr	r3, [r7, #32]
 8007726:	609a      	str	r2, [r3, #8]

        /* Update error code */
        hdma->ErrorCode |= HAL_DMA_ERROR_DME;
 8007728:	687b      	ldr	r3, [r7, #4]
 800772a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800772c:	f043 0204 	orr.w	r2, r3, #4
 8007730:	687b      	ldr	r3, [r7, #4]
 8007732:	655a      	str	r2, [r3, #84]	@ 0x54
      }
    }
    /* Half Transfer Complete Interrupt management ******************************/
    if ((tmpisr_dma & (DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8007734:	687b      	ldr	r3, [r7, #4]
 8007736:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007738:	f003 031f 	and.w	r3, r3, #31
 800773c:	2210      	movs	r2, #16
 800773e:	409a      	lsls	r2, r3
 8007740:	69bb      	ldr	r3, [r7, #24]
 8007742:	4013      	ands	r3, r2
 8007744:	2b00      	cmp	r3, #0
 8007746:	f000 80a6 	beq.w	8007896 <HAL_DMA_IRQHandler+0x5c2>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != 0U)
 800774a:	687b      	ldr	r3, [r7, #4]
 800774c:	681b      	ldr	r3, [r3, #0]
 800774e:	4a85      	ldr	r2, [pc, #532]	@ (8007964 <HAL_DMA_IRQHandler+0x690>)
 8007750:	4293      	cmp	r3, r2
 8007752:	d04a      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 8007754:	687b      	ldr	r3, [r7, #4]
 8007756:	681b      	ldr	r3, [r3, #0]
 8007758:	4a83      	ldr	r2, [pc, #524]	@ (8007968 <HAL_DMA_IRQHandler+0x694>)
 800775a:	4293      	cmp	r3, r2
 800775c:	d045      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 800775e:	687b      	ldr	r3, [r7, #4]
 8007760:	681b      	ldr	r3, [r3, #0]
 8007762:	4a82      	ldr	r2, [pc, #520]	@ (800796c <HAL_DMA_IRQHandler+0x698>)
 8007764:	4293      	cmp	r3, r2
 8007766:	d040      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 8007768:	687b      	ldr	r3, [r7, #4]
 800776a:	681b      	ldr	r3, [r3, #0]
 800776c:	4a80      	ldr	r2, [pc, #512]	@ (8007970 <HAL_DMA_IRQHandler+0x69c>)
 800776e:	4293      	cmp	r3, r2
 8007770:	d03b      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 8007772:	687b      	ldr	r3, [r7, #4]
 8007774:	681b      	ldr	r3, [r3, #0]
 8007776:	4a7f      	ldr	r2, [pc, #508]	@ (8007974 <HAL_DMA_IRQHandler+0x6a0>)
 8007778:	4293      	cmp	r3, r2
 800777a:	d036      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 800777c:	687b      	ldr	r3, [r7, #4]
 800777e:	681b      	ldr	r3, [r3, #0]
 8007780:	4a7d      	ldr	r2, [pc, #500]	@ (8007978 <HAL_DMA_IRQHandler+0x6a4>)
 8007782:	4293      	cmp	r3, r2
 8007784:	d031      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 8007786:	687b      	ldr	r3, [r7, #4]
 8007788:	681b      	ldr	r3, [r3, #0]
 800778a:	4a7c      	ldr	r2, [pc, #496]	@ (800797c <HAL_DMA_IRQHandler+0x6a8>)
 800778c:	4293      	cmp	r3, r2
 800778e:	d02c      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 8007790:	687b      	ldr	r3, [r7, #4]
 8007792:	681b      	ldr	r3, [r3, #0]
 8007794:	4a7a      	ldr	r2, [pc, #488]	@ (8007980 <HAL_DMA_IRQHandler+0x6ac>)
 8007796:	4293      	cmp	r3, r2
 8007798:	d027      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 800779a:	687b      	ldr	r3, [r7, #4]
 800779c:	681b      	ldr	r3, [r3, #0]
 800779e:	4a79      	ldr	r2, [pc, #484]	@ (8007984 <HAL_DMA_IRQHandler+0x6b0>)
 80077a0:	4293      	cmp	r3, r2
 80077a2:	d022      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 80077a4:	687b      	ldr	r3, [r7, #4]
 80077a6:	681b      	ldr	r3, [r3, #0]
 80077a8:	4a77      	ldr	r2, [pc, #476]	@ (8007988 <HAL_DMA_IRQHandler+0x6b4>)
 80077aa:	4293      	cmp	r3, r2
 80077ac:	d01d      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 80077ae:	687b      	ldr	r3, [r7, #4]
 80077b0:	681b      	ldr	r3, [r3, #0]
 80077b2:	4a76      	ldr	r2, [pc, #472]	@ (800798c <HAL_DMA_IRQHandler+0x6b8>)
 80077b4:	4293      	cmp	r3, r2
 80077b6:	d018      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 80077b8:	687b      	ldr	r3, [r7, #4]
 80077ba:	681b      	ldr	r3, [r3, #0]
 80077bc:	4a74      	ldr	r2, [pc, #464]	@ (8007990 <HAL_DMA_IRQHandler+0x6bc>)
 80077be:	4293      	cmp	r3, r2
 80077c0:	d013      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 80077c2:	687b      	ldr	r3, [r7, #4]
 80077c4:	681b      	ldr	r3, [r3, #0]
 80077c6:	4a73      	ldr	r2, [pc, #460]	@ (8007994 <HAL_DMA_IRQHandler+0x6c0>)
 80077c8:	4293      	cmp	r3, r2
 80077ca:	d00e      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 80077cc:	687b      	ldr	r3, [r7, #4]
 80077ce:	681b      	ldr	r3, [r3, #0]
 80077d0:	4a71      	ldr	r2, [pc, #452]	@ (8007998 <HAL_DMA_IRQHandler+0x6c4>)
 80077d2:	4293      	cmp	r3, r2
 80077d4:	d009      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 80077d6:	687b      	ldr	r3, [r7, #4]
 80077d8:	681b      	ldr	r3, [r3, #0]
 80077da:	4a70      	ldr	r2, [pc, #448]	@ (800799c <HAL_DMA_IRQHandler+0x6c8>)
 80077dc:	4293      	cmp	r3, r2
 80077de:	d004      	beq.n	80077ea <HAL_DMA_IRQHandler+0x516>
 80077e0:	687b      	ldr	r3, [r7, #4]
 80077e2:	681b      	ldr	r3, [r3, #0]
 80077e4:	4a6e      	ldr	r2, [pc, #440]	@ (80079a0 <HAL_DMA_IRQHandler+0x6cc>)
 80077e6:	4293      	cmp	r3, r2
 80077e8:	d10a      	bne.n	8007800 <HAL_DMA_IRQHandler+0x52c>
 80077ea:	687b      	ldr	r3, [r7, #4]
 80077ec:	681b      	ldr	r3, [r3, #0]
 80077ee:	681b      	ldr	r3, [r3, #0]
 80077f0:	f003 0308 	and.w	r3, r3, #8
 80077f4:	2b00      	cmp	r3, #0
 80077f6:	bf14      	ite	ne
 80077f8:	2301      	movne	r3, #1
 80077fa:	2300      	moveq	r3, #0
 80077fc:	b2db      	uxtb	r3, r3
 80077fe:	e009      	b.n	8007814 <HAL_DMA_IRQHandler+0x540>
 8007800:	687b      	ldr	r3, [r7, #4]
 8007802:	681b      	ldr	r3, [r3, #0]
 8007804:	681b      	ldr	r3, [r3, #0]
 8007806:	f003 0304 	and.w	r3, r3, #4
 800780a:	2b00      	cmp	r3, #0
 800780c:	bf14      	ite	ne
 800780e:	2301      	movne	r3, #1
 8007810:	2300      	moveq	r3, #0
 8007812:	b2db      	uxtb	r3, r3
 8007814:	2b00      	cmp	r3, #0
 8007816:	d03e      	beq.n	8007896 <HAL_DMA_IRQHandler+0x5c2>
      {
        /* Clear the half transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_HTIF0_4 << (hdma->StreamIndex & 0x1FU);
 8007818:	687b      	ldr	r3, [r7, #4]
 800781a:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800781c:	f003 031f 	and.w	r3, r3, #31
 8007820:	2210      	movs	r2, #16
 8007822:	409a      	lsls	r2, r3
 8007824:	6a3b      	ldr	r3, [r7, #32]
 8007826:	609a      	str	r2, [r3, #8]

        /* Multi_Buffering mode enabled */
        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 8007828:	687b      	ldr	r3, [r7, #4]
 800782a:	681b      	ldr	r3, [r3, #0]
 800782c:	681b      	ldr	r3, [r3, #0]
 800782e:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 8007832:	2b00      	cmp	r3, #0
 8007834:	d018      	beq.n	8007868 <HAL_DMA_IRQHandler+0x594>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 8007836:	687b      	ldr	r3, [r7, #4]
 8007838:	681b      	ldr	r3, [r3, #0]
 800783a:	681b      	ldr	r3, [r3, #0]
 800783c:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8007840:	2b00      	cmp	r3, #0
 8007842:	d108      	bne.n	8007856 <HAL_DMA_IRQHandler+0x582>
          {
            if(hdma->XferHalfCpltCallback != NULL)
 8007844:	687b      	ldr	r3, [r7, #4]
 8007846:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007848:	2b00      	cmp	r3, #0
 800784a:	d024      	beq.n	8007896 <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferHalfCpltCallback(hdma);
 800784c:	687b      	ldr	r3, [r7, #4]
 800784e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007850:	6878      	ldr	r0, [r7, #4]
 8007852:	4798      	blx	r3
 8007854:	e01f      	b.n	8007896 <HAL_DMA_IRQHandler+0x5c2>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferM1HalfCpltCallback != NULL)
 8007856:	687b      	ldr	r3, [r7, #4]
 8007858:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800785a:	2b00      	cmp	r3, #0
 800785c:	d01b      	beq.n	8007896 <HAL_DMA_IRQHandler+0x5c2>
            {
              /* Half transfer callback */
              hdma->XferM1HalfCpltCallback(hdma);
 800785e:	687b      	ldr	r3, [r7, #4]
 8007860:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8007862:	6878      	ldr	r0, [r7, #4]
 8007864:	4798      	blx	r3
 8007866:	e016      	b.n	8007896 <HAL_DMA_IRQHandler+0x5c2>
          }
        }
        else
        {
          /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 8007868:	687b      	ldr	r3, [r7, #4]
 800786a:	681b      	ldr	r3, [r3, #0]
 800786c:	681b      	ldr	r3, [r3, #0]
 800786e:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8007872:	2b00      	cmp	r3, #0
 8007874:	d107      	bne.n	8007886 <HAL_DMA_IRQHandler+0x5b2>
          {
            /* Disable the half transfer interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 8007876:	687b      	ldr	r3, [r7, #4]
 8007878:	681b      	ldr	r3, [r3, #0]
 800787a:	681a      	ldr	r2, [r3, #0]
 800787c:	687b      	ldr	r3, [r7, #4]
 800787e:	681b      	ldr	r3, [r3, #0]
 8007880:	f022 0208 	bic.w	r2, r2, #8
 8007884:	601a      	str	r2, [r3, #0]
          }

          if(hdma->XferHalfCpltCallback != NULL)
 8007886:	687b      	ldr	r3, [r7, #4]
 8007888:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800788a:	2b00      	cmp	r3, #0
 800788c:	d003      	beq.n	8007896 <HAL_DMA_IRQHandler+0x5c2>
          {
            /* Half transfer callback */
            hdma->XferHalfCpltCallback(hdma);
 800788e:	687b      	ldr	r3, [r7, #4]
 8007890:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007892:	6878      	ldr	r0, [r7, #4]
 8007894:	4798      	blx	r3
          }
        }
      }
    }
    /* Transfer Complete Interrupt management ***********************************/
    if ((tmpisr_dma & (DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU))) != 0U)
 8007896:	687b      	ldr	r3, [r7, #4]
 8007898:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800789a:	f003 031f 	and.w	r3, r3, #31
 800789e:	2220      	movs	r2, #32
 80078a0:	409a      	lsls	r2, r3
 80078a2:	69bb      	ldr	r3, [r7, #24]
 80078a4:	4013      	ands	r3, r2
 80078a6:	2b00      	cmp	r3, #0
 80078a8:	f000 8110 	beq.w	8007acc <HAL_DMA_IRQHandler+0x7f8>
    {
      if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != 0U)
 80078ac:	687b      	ldr	r3, [r7, #4]
 80078ae:	681b      	ldr	r3, [r3, #0]
 80078b0:	4a2c      	ldr	r2, [pc, #176]	@ (8007964 <HAL_DMA_IRQHandler+0x690>)
 80078b2:	4293      	cmp	r3, r2
 80078b4:	d04a      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 80078b6:	687b      	ldr	r3, [r7, #4]
 80078b8:	681b      	ldr	r3, [r3, #0]
 80078ba:	4a2b      	ldr	r2, [pc, #172]	@ (8007968 <HAL_DMA_IRQHandler+0x694>)
 80078bc:	4293      	cmp	r3, r2
 80078be:	d045      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 80078c0:	687b      	ldr	r3, [r7, #4]
 80078c2:	681b      	ldr	r3, [r3, #0]
 80078c4:	4a29      	ldr	r2, [pc, #164]	@ (800796c <HAL_DMA_IRQHandler+0x698>)
 80078c6:	4293      	cmp	r3, r2
 80078c8:	d040      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 80078ca:	687b      	ldr	r3, [r7, #4]
 80078cc:	681b      	ldr	r3, [r3, #0]
 80078ce:	4a28      	ldr	r2, [pc, #160]	@ (8007970 <HAL_DMA_IRQHandler+0x69c>)
 80078d0:	4293      	cmp	r3, r2
 80078d2:	d03b      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 80078d4:	687b      	ldr	r3, [r7, #4]
 80078d6:	681b      	ldr	r3, [r3, #0]
 80078d8:	4a26      	ldr	r2, [pc, #152]	@ (8007974 <HAL_DMA_IRQHandler+0x6a0>)
 80078da:	4293      	cmp	r3, r2
 80078dc:	d036      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 80078de:	687b      	ldr	r3, [r7, #4]
 80078e0:	681b      	ldr	r3, [r3, #0]
 80078e2:	4a25      	ldr	r2, [pc, #148]	@ (8007978 <HAL_DMA_IRQHandler+0x6a4>)
 80078e4:	4293      	cmp	r3, r2
 80078e6:	d031      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 80078e8:	687b      	ldr	r3, [r7, #4]
 80078ea:	681b      	ldr	r3, [r3, #0]
 80078ec:	4a23      	ldr	r2, [pc, #140]	@ (800797c <HAL_DMA_IRQHandler+0x6a8>)
 80078ee:	4293      	cmp	r3, r2
 80078f0:	d02c      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 80078f2:	687b      	ldr	r3, [r7, #4]
 80078f4:	681b      	ldr	r3, [r3, #0]
 80078f6:	4a22      	ldr	r2, [pc, #136]	@ (8007980 <HAL_DMA_IRQHandler+0x6ac>)
 80078f8:	4293      	cmp	r3, r2
 80078fa:	d027      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 80078fc:	687b      	ldr	r3, [r7, #4]
 80078fe:	681b      	ldr	r3, [r3, #0]
 8007900:	4a20      	ldr	r2, [pc, #128]	@ (8007984 <HAL_DMA_IRQHandler+0x6b0>)
 8007902:	4293      	cmp	r3, r2
 8007904:	d022      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 8007906:	687b      	ldr	r3, [r7, #4]
 8007908:	681b      	ldr	r3, [r3, #0]
 800790a:	4a1f      	ldr	r2, [pc, #124]	@ (8007988 <HAL_DMA_IRQHandler+0x6b4>)
 800790c:	4293      	cmp	r3, r2
 800790e:	d01d      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 8007910:	687b      	ldr	r3, [r7, #4]
 8007912:	681b      	ldr	r3, [r3, #0]
 8007914:	4a1d      	ldr	r2, [pc, #116]	@ (800798c <HAL_DMA_IRQHandler+0x6b8>)
 8007916:	4293      	cmp	r3, r2
 8007918:	d018      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 800791a:	687b      	ldr	r3, [r7, #4]
 800791c:	681b      	ldr	r3, [r3, #0]
 800791e:	4a1c      	ldr	r2, [pc, #112]	@ (8007990 <HAL_DMA_IRQHandler+0x6bc>)
 8007920:	4293      	cmp	r3, r2
 8007922:	d013      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 8007924:	687b      	ldr	r3, [r7, #4]
 8007926:	681b      	ldr	r3, [r3, #0]
 8007928:	4a1a      	ldr	r2, [pc, #104]	@ (8007994 <HAL_DMA_IRQHandler+0x6c0>)
 800792a:	4293      	cmp	r3, r2
 800792c:	d00e      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 800792e:	687b      	ldr	r3, [r7, #4]
 8007930:	681b      	ldr	r3, [r3, #0]
 8007932:	4a19      	ldr	r2, [pc, #100]	@ (8007998 <HAL_DMA_IRQHandler+0x6c4>)
 8007934:	4293      	cmp	r3, r2
 8007936:	d009      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 8007938:	687b      	ldr	r3, [r7, #4]
 800793a:	681b      	ldr	r3, [r3, #0]
 800793c:	4a17      	ldr	r2, [pc, #92]	@ (800799c <HAL_DMA_IRQHandler+0x6c8>)
 800793e:	4293      	cmp	r3, r2
 8007940:	d004      	beq.n	800794c <HAL_DMA_IRQHandler+0x678>
 8007942:	687b      	ldr	r3, [r7, #4]
 8007944:	681b      	ldr	r3, [r3, #0]
 8007946:	4a16      	ldr	r2, [pc, #88]	@ (80079a0 <HAL_DMA_IRQHandler+0x6cc>)
 8007948:	4293      	cmp	r3, r2
 800794a:	d12b      	bne.n	80079a4 <HAL_DMA_IRQHandler+0x6d0>
 800794c:	687b      	ldr	r3, [r7, #4]
 800794e:	681b      	ldr	r3, [r3, #0]
 8007950:	681b      	ldr	r3, [r3, #0]
 8007952:	f003 0310 	and.w	r3, r3, #16
 8007956:	2b00      	cmp	r3, #0
 8007958:	bf14      	ite	ne
 800795a:	2301      	movne	r3, #1
 800795c:	2300      	moveq	r3, #0
 800795e:	b2db      	uxtb	r3, r3
 8007960:	e02a      	b.n	80079b8 <HAL_DMA_IRQHandler+0x6e4>
 8007962:	bf00      	nop
 8007964:	40020010 	.word	0x40020010
 8007968:	40020028 	.word	0x40020028
 800796c:	40020040 	.word	0x40020040
 8007970:	40020058 	.word	0x40020058
 8007974:	40020070 	.word	0x40020070
 8007978:	40020088 	.word	0x40020088
 800797c:	400200a0 	.word	0x400200a0
 8007980:	400200b8 	.word	0x400200b8
 8007984:	40020410 	.word	0x40020410
 8007988:	40020428 	.word	0x40020428
 800798c:	40020440 	.word	0x40020440
 8007990:	40020458 	.word	0x40020458
 8007994:	40020470 	.word	0x40020470
 8007998:	40020488 	.word	0x40020488
 800799c:	400204a0 	.word	0x400204a0
 80079a0:	400204b8 	.word	0x400204b8
 80079a4:	687b      	ldr	r3, [r7, #4]
 80079a6:	681b      	ldr	r3, [r3, #0]
 80079a8:	681b      	ldr	r3, [r3, #0]
 80079aa:	f003 0302 	and.w	r3, r3, #2
 80079ae:	2b00      	cmp	r3, #0
 80079b0:	bf14      	ite	ne
 80079b2:	2301      	movne	r3, #1
 80079b4:	2300      	moveq	r3, #0
 80079b6:	b2db      	uxtb	r3, r3
 80079b8:	2b00      	cmp	r3, #0
 80079ba:	f000 8087 	beq.w	8007acc <HAL_DMA_IRQHandler+0x7f8>
      {
        /* Clear the transfer complete flag */
        regs_dma->IFCR = DMA_FLAG_TCIF0_4 << (hdma->StreamIndex & 0x1FU);
 80079be:	687b      	ldr	r3, [r7, #4]
 80079c0:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80079c2:	f003 031f 	and.w	r3, r3, #31
 80079c6:	2220      	movs	r2, #32
 80079c8:	409a      	lsls	r2, r3
 80079ca:	6a3b      	ldr	r3, [r7, #32]
 80079cc:	609a      	str	r2, [r3, #8]

        if(HAL_DMA_STATE_ABORT == hdma->State)
 80079ce:	687b      	ldr	r3, [r7, #4]
 80079d0:	f893 3035 	ldrb.w	r3, [r3, #53]	@ 0x35
 80079d4:	b2db      	uxtb	r3, r3
 80079d6:	2b04      	cmp	r3, #4
 80079d8:	d139      	bne.n	8007a4e <HAL_DMA_IRQHandler+0x77a>
        {
          /* Disable all the transfer interrupts */
          ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
 80079da:	687b      	ldr	r3, [r7, #4]
 80079dc:	681b      	ldr	r3, [r3, #0]
 80079de:	681a      	ldr	r2, [r3, #0]
 80079e0:	687b      	ldr	r3, [r7, #4]
 80079e2:	681b      	ldr	r3, [r3, #0]
 80079e4:	f022 0216 	bic.w	r2, r2, #22
 80079e8:	601a      	str	r2, [r3, #0]
          ((DMA_Stream_TypeDef   *)hdma->Instance)->FCR &= ~(DMA_IT_FE);
 80079ea:	687b      	ldr	r3, [r7, #4]
 80079ec:	681b      	ldr	r3, [r3, #0]
 80079ee:	695a      	ldr	r2, [r3, #20]
 80079f0:	687b      	ldr	r3, [r7, #4]
 80079f2:	681b      	ldr	r3, [r3, #0]
 80079f4:	f022 0280 	bic.w	r2, r2, #128	@ 0x80
 80079f8:	615a      	str	r2, [r3, #20]

          if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
 80079fa:	687b      	ldr	r3, [r7, #4]
 80079fc:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80079fe:	2b00      	cmp	r3, #0
 8007a00:	d103      	bne.n	8007a0a <HAL_DMA_IRQHandler+0x736>
 8007a02:	687b      	ldr	r3, [r7, #4]
 8007a04:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8007a06:	2b00      	cmp	r3, #0
 8007a08:	d007      	beq.n	8007a1a <HAL_DMA_IRQHandler+0x746>
          {
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_HT);
 8007a0a:	687b      	ldr	r3, [r7, #4]
 8007a0c:	681b      	ldr	r3, [r3, #0]
 8007a0e:	681a      	ldr	r2, [r3, #0]
 8007a10:	687b      	ldr	r3, [r7, #4]
 8007a12:	681b      	ldr	r3, [r3, #0]
 8007a14:	f022 0208 	bic.w	r2, r2, #8
 8007a18:	601a      	str	r2, [r3, #0]
          }

          /* Clear all interrupt flags at correct offset within the register */
          regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU);
 8007a1a:	687b      	ldr	r3, [r7, #4]
 8007a1c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007a1e:	f003 031f 	and.w	r3, r3, #31
 8007a22:	223f      	movs	r2, #63	@ 0x3f
 8007a24:	409a      	lsls	r2, r3
 8007a26:	6a3b      	ldr	r3, [r7, #32]
 8007a28:	609a      	str	r2, [r3, #8]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 8007a2a:	687b      	ldr	r3, [r7, #4]
 8007a2c:	2201      	movs	r2, #1
 8007a2e:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 8007a32:	687b      	ldr	r3, [r7, #4]
 8007a34:	2200      	movs	r2, #0
 8007a36:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

          if(hdma->XferAbortCallback != NULL)
 8007a3a:	687b      	ldr	r3, [r7, #4]
 8007a3c:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8007a3e:	2b00      	cmp	r3, #0
 8007a40:	f000 834a 	beq.w	80080d8 <HAL_DMA_IRQHandler+0xe04>
          {
            hdma->XferAbortCallback(hdma);
 8007a44:	687b      	ldr	r3, [r7, #4]
 8007a46:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8007a48:	6878      	ldr	r0, [r7, #4]
 8007a4a:	4798      	blx	r3
          }
          return;
 8007a4c:	e344      	b.n	80080d8 <HAL_DMA_IRQHandler+0xe04>
        }

        if(((((DMA_Stream_TypeDef   *)hdma->Instance)->CR) & (uint32_t)(DMA_SxCR_DBM)) != 0U)
 8007a4e:	687b      	ldr	r3, [r7, #4]
 8007a50:	681b      	ldr	r3, [r3, #0]
 8007a52:	681b      	ldr	r3, [r3, #0]
 8007a54:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 8007a58:	2b00      	cmp	r3, #0
 8007a5a:	d018      	beq.n	8007a8e <HAL_DMA_IRQHandler+0x7ba>
        {
          /* Current memory buffer used is Memory 0 */
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CT) == 0U)
 8007a5c:	687b      	ldr	r3, [r7, #4]
 8007a5e:	681b      	ldr	r3, [r3, #0]
 8007a60:	681b      	ldr	r3, [r3, #0]
 8007a62:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 8007a66:	2b00      	cmp	r3, #0
 8007a68:	d108      	bne.n	8007a7c <HAL_DMA_IRQHandler+0x7a8>
          {
            if(hdma->XferM1CpltCallback != NULL)
 8007a6a:	687b      	ldr	r3, [r7, #4]
 8007a6c:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8007a6e:	2b00      	cmp	r3, #0
 8007a70:	d02c      	beq.n	8007acc <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory1 */
              hdma->XferM1CpltCallback(hdma);
 8007a72:	687b      	ldr	r3, [r7, #4]
 8007a74:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8007a76:	6878      	ldr	r0, [r7, #4]
 8007a78:	4798      	blx	r3
 8007a7a:	e027      	b.n	8007acc <HAL_DMA_IRQHandler+0x7f8>
            }
          }
          /* Current memory buffer used is Memory 1 */
          else
          {
            if(hdma->XferCpltCallback != NULL)
 8007a7c:	687b      	ldr	r3, [r7, #4]
 8007a7e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007a80:	2b00      	cmp	r3, #0
 8007a82:	d023      	beq.n	8007acc <HAL_DMA_IRQHandler+0x7f8>
            {
              /* Transfer complete Callback for memory0 */
              hdma->XferCpltCallback(hdma);
 8007a84:	687b      	ldr	r3, [r7, #4]
 8007a86:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007a88:	6878      	ldr	r0, [r7, #4]
 8007a8a:	4798      	blx	r3
 8007a8c:	e01e      	b.n	8007acc <HAL_DMA_IRQHandler+0x7f8>
          }
        }
        /* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
        else
        {
          if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_CIRC) == 0U)
 8007a8e:	687b      	ldr	r3, [r7, #4]
 8007a90:	681b      	ldr	r3, [r3, #0]
 8007a92:	681b      	ldr	r3, [r3, #0]
 8007a94:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8007a98:	2b00      	cmp	r3, #0
 8007a9a:	d10f      	bne.n	8007abc <HAL_DMA_IRQHandler+0x7e8>
          {
            /* Disable the transfer complete interrupt */
            ((DMA_Stream_TypeDef   *)hdma->Instance)->CR  &= ~(DMA_IT_TC);
 8007a9c:	687b      	ldr	r3, [r7, #4]
 8007a9e:	681b      	ldr	r3, [r3, #0]
 8007aa0:	681a      	ldr	r2, [r3, #0]
 8007aa2:	687b      	ldr	r3, [r7, #4]
 8007aa4:	681b      	ldr	r3, [r3, #0]
 8007aa6:	f022 0210 	bic.w	r2, r2, #16
 8007aaa:	601a      	str	r2, [r3, #0]

            /* Change the DMA state */
            hdma->State = HAL_DMA_STATE_READY;
 8007aac:	687b      	ldr	r3, [r7, #4]
 8007aae:	2201      	movs	r2, #1
 8007ab0:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

            /* Process Unlocked */
            __HAL_UNLOCK(hdma);
 8007ab4:	687b      	ldr	r3, [r7, #4]
 8007ab6:	2200      	movs	r2, #0
 8007ab8:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          }

          if(hdma->XferCpltCallback != NULL)
 8007abc:	687b      	ldr	r3, [r7, #4]
 8007abe:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007ac0:	2b00      	cmp	r3, #0
 8007ac2:	d003      	beq.n	8007acc <HAL_DMA_IRQHandler+0x7f8>
          {
            /* Transfer complete callback */
            hdma->XferCpltCallback(hdma);
 8007ac4:	687b      	ldr	r3, [r7, #4]
 8007ac6:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007ac8:	6878      	ldr	r0, [r7, #4]
 8007aca:	4798      	blx	r3
        }
      }
    }

    /* manage error case */
    if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
 8007acc:	687b      	ldr	r3, [r7, #4]
 8007ace:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8007ad0:	2b00      	cmp	r3, #0
 8007ad2:	f000 8306 	beq.w	80080e2 <HAL_DMA_IRQHandler+0xe0e>
    {
      if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != 0U)
 8007ad6:	687b      	ldr	r3, [r7, #4]
 8007ad8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8007ada:	f003 0301 	and.w	r3, r3, #1
 8007ade:	2b00      	cmp	r3, #0
 8007ae0:	f000 8088 	beq.w	8007bf4 <HAL_DMA_IRQHandler+0x920>
      {
        hdma->State = HAL_DMA_STATE_ABORT;
 8007ae4:	687b      	ldr	r3, [r7, #4]
 8007ae6:	2204      	movs	r2, #4
 8007ae8:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

        /* Disable the stream */
        __HAL_DMA_DISABLE(hdma);
 8007aec:	687b      	ldr	r3, [r7, #4]
 8007aee:	681b      	ldr	r3, [r3, #0]
 8007af0:	4a7a      	ldr	r2, [pc, #488]	@ (8007cdc <HAL_DMA_IRQHandler+0xa08>)
 8007af2:	4293      	cmp	r3, r2
 8007af4:	d04a      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007af6:	687b      	ldr	r3, [r7, #4]
 8007af8:	681b      	ldr	r3, [r3, #0]
 8007afa:	4a79      	ldr	r2, [pc, #484]	@ (8007ce0 <HAL_DMA_IRQHandler+0xa0c>)
 8007afc:	4293      	cmp	r3, r2
 8007afe:	d045      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b00:	687b      	ldr	r3, [r7, #4]
 8007b02:	681b      	ldr	r3, [r3, #0]
 8007b04:	4a77      	ldr	r2, [pc, #476]	@ (8007ce4 <HAL_DMA_IRQHandler+0xa10>)
 8007b06:	4293      	cmp	r3, r2
 8007b08:	d040      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b0a:	687b      	ldr	r3, [r7, #4]
 8007b0c:	681b      	ldr	r3, [r3, #0]
 8007b0e:	4a76      	ldr	r2, [pc, #472]	@ (8007ce8 <HAL_DMA_IRQHandler+0xa14>)
 8007b10:	4293      	cmp	r3, r2
 8007b12:	d03b      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b14:	687b      	ldr	r3, [r7, #4]
 8007b16:	681b      	ldr	r3, [r3, #0]
 8007b18:	4a74      	ldr	r2, [pc, #464]	@ (8007cec <HAL_DMA_IRQHandler+0xa18>)
 8007b1a:	4293      	cmp	r3, r2
 8007b1c:	d036      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b1e:	687b      	ldr	r3, [r7, #4]
 8007b20:	681b      	ldr	r3, [r3, #0]
 8007b22:	4a73      	ldr	r2, [pc, #460]	@ (8007cf0 <HAL_DMA_IRQHandler+0xa1c>)
 8007b24:	4293      	cmp	r3, r2
 8007b26:	d031      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b28:	687b      	ldr	r3, [r7, #4]
 8007b2a:	681b      	ldr	r3, [r3, #0]
 8007b2c:	4a71      	ldr	r2, [pc, #452]	@ (8007cf4 <HAL_DMA_IRQHandler+0xa20>)
 8007b2e:	4293      	cmp	r3, r2
 8007b30:	d02c      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b32:	687b      	ldr	r3, [r7, #4]
 8007b34:	681b      	ldr	r3, [r3, #0]
 8007b36:	4a70      	ldr	r2, [pc, #448]	@ (8007cf8 <HAL_DMA_IRQHandler+0xa24>)
 8007b38:	4293      	cmp	r3, r2
 8007b3a:	d027      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b3c:	687b      	ldr	r3, [r7, #4]
 8007b3e:	681b      	ldr	r3, [r3, #0]
 8007b40:	4a6e      	ldr	r2, [pc, #440]	@ (8007cfc <HAL_DMA_IRQHandler+0xa28>)
 8007b42:	4293      	cmp	r3, r2
 8007b44:	d022      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b46:	687b      	ldr	r3, [r7, #4]
 8007b48:	681b      	ldr	r3, [r3, #0]
 8007b4a:	4a6d      	ldr	r2, [pc, #436]	@ (8007d00 <HAL_DMA_IRQHandler+0xa2c>)
 8007b4c:	4293      	cmp	r3, r2
 8007b4e:	d01d      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b50:	687b      	ldr	r3, [r7, #4]
 8007b52:	681b      	ldr	r3, [r3, #0]
 8007b54:	4a6b      	ldr	r2, [pc, #428]	@ (8007d04 <HAL_DMA_IRQHandler+0xa30>)
 8007b56:	4293      	cmp	r3, r2
 8007b58:	d018      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b5a:	687b      	ldr	r3, [r7, #4]
 8007b5c:	681b      	ldr	r3, [r3, #0]
 8007b5e:	4a6a      	ldr	r2, [pc, #424]	@ (8007d08 <HAL_DMA_IRQHandler+0xa34>)
 8007b60:	4293      	cmp	r3, r2
 8007b62:	d013      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b64:	687b      	ldr	r3, [r7, #4]
 8007b66:	681b      	ldr	r3, [r3, #0]
 8007b68:	4a68      	ldr	r2, [pc, #416]	@ (8007d0c <HAL_DMA_IRQHandler+0xa38>)
 8007b6a:	4293      	cmp	r3, r2
 8007b6c:	d00e      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b6e:	687b      	ldr	r3, [r7, #4]
 8007b70:	681b      	ldr	r3, [r3, #0]
 8007b72:	4a67      	ldr	r2, [pc, #412]	@ (8007d10 <HAL_DMA_IRQHandler+0xa3c>)
 8007b74:	4293      	cmp	r3, r2
 8007b76:	d009      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b78:	687b      	ldr	r3, [r7, #4]
 8007b7a:	681b      	ldr	r3, [r3, #0]
 8007b7c:	4a65      	ldr	r2, [pc, #404]	@ (8007d14 <HAL_DMA_IRQHandler+0xa40>)
 8007b7e:	4293      	cmp	r3, r2
 8007b80:	d004      	beq.n	8007b8c <HAL_DMA_IRQHandler+0x8b8>
 8007b82:	687b      	ldr	r3, [r7, #4]
 8007b84:	681b      	ldr	r3, [r3, #0]
 8007b86:	4a64      	ldr	r2, [pc, #400]	@ (8007d18 <HAL_DMA_IRQHandler+0xa44>)
 8007b88:	4293      	cmp	r3, r2
 8007b8a:	d108      	bne.n	8007b9e <HAL_DMA_IRQHandler+0x8ca>
 8007b8c:	687b      	ldr	r3, [r7, #4]
 8007b8e:	681b      	ldr	r3, [r3, #0]
 8007b90:	681a      	ldr	r2, [r3, #0]
 8007b92:	687b      	ldr	r3, [r7, #4]
 8007b94:	681b      	ldr	r3, [r3, #0]
 8007b96:	f022 0201 	bic.w	r2, r2, #1
 8007b9a:	601a      	str	r2, [r3, #0]
 8007b9c:	e007      	b.n	8007bae <HAL_DMA_IRQHandler+0x8da>
 8007b9e:	687b      	ldr	r3, [r7, #4]
 8007ba0:	681b      	ldr	r3, [r3, #0]
 8007ba2:	681a      	ldr	r2, [r3, #0]
 8007ba4:	687b      	ldr	r3, [r7, #4]
 8007ba6:	681b      	ldr	r3, [r3, #0]
 8007ba8:	f022 0201 	bic.w	r2, r2, #1
 8007bac:	601a      	str	r2, [r3, #0]

        do
        {
          if (++count > timeout)
 8007bae:	68fb      	ldr	r3, [r7, #12]
 8007bb0:	3301      	adds	r3, #1
 8007bb2:	60fb      	str	r3, [r7, #12]
 8007bb4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8007bb6:	429a      	cmp	r2, r3
 8007bb8:	d307      	bcc.n	8007bca <HAL_DMA_IRQHandler+0x8f6>
          {
            break;
          }
        }
        while((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U);
 8007bba:	687b      	ldr	r3, [r7, #4]
 8007bbc:	681b      	ldr	r3, [r3, #0]
 8007bbe:	681b      	ldr	r3, [r3, #0]
 8007bc0:	f003 0301 	and.w	r3, r3, #1
 8007bc4:	2b00      	cmp	r3, #0
 8007bc6:	d1f2      	bne.n	8007bae <HAL_DMA_IRQHandler+0x8da>
 8007bc8:	e000      	b.n	8007bcc <HAL_DMA_IRQHandler+0x8f8>
            break;
 8007bca:	bf00      	nop

        if((((DMA_Stream_TypeDef   *)hdma->Instance)->CR & DMA_SxCR_EN) != 0U)
 8007bcc:	687b      	ldr	r3, [r7, #4]
 8007bce:	681b      	ldr	r3, [r3, #0]
 8007bd0:	681b      	ldr	r3, [r3, #0]
 8007bd2:	f003 0301 	and.w	r3, r3, #1
 8007bd6:	2b00      	cmp	r3, #0
 8007bd8:	d004      	beq.n	8007be4 <HAL_DMA_IRQHandler+0x910>
        {
          /* Change the DMA state to error if DMA disable fails */
          hdma->State = HAL_DMA_STATE_ERROR;
 8007bda:	687b      	ldr	r3, [r7, #4]
 8007bdc:	2203      	movs	r2, #3
 8007bde:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
 8007be2:	e003      	b.n	8007bec <HAL_DMA_IRQHandler+0x918>
        }
        else
        {
          /* Change the DMA state to Ready if DMA disable success */
          hdma->State = HAL_DMA_STATE_READY;
 8007be4:	687b      	ldr	r3, [r7, #4]
 8007be6:	2201      	movs	r2, #1
 8007be8:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35
        }

        /* Process Unlocked */
        __HAL_UNLOCK(hdma);
 8007bec:	687b      	ldr	r3, [r7, #4]
 8007bee:	2200      	movs	r2, #0
 8007bf0:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }

      if(hdma->XferErrorCallback != NULL)
 8007bf4:	687b      	ldr	r3, [r7, #4]
 8007bf6:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007bf8:	2b00      	cmp	r3, #0
 8007bfa:	f000 8272 	beq.w	80080e2 <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 8007bfe:	687b      	ldr	r3, [r7, #4]
 8007c00:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8007c02:	6878      	ldr	r0, [r7, #4]
 8007c04:	4798      	blx	r3
 8007c06:	e26c      	b.n	80080e2 <HAL_DMA_IRQHandler+0xe0e>
      }
    }
  }
  else if(IS_BDMA_CHANNEL_INSTANCE(hdma->Instance) != 0U)  /* BDMA instance(s) */
 8007c08:	687b      	ldr	r3, [r7, #4]
 8007c0a:	681b      	ldr	r3, [r3, #0]
 8007c0c:	4a43      	ldr	r2, [pc, #268]	@ (8007d1c <HAL_DMA_IRQHandler+0xa48>)
 8007c0e:	4293      	cmp	r3, r2
 8007c10:	d022      	beq.n	8007c58 <HAL_DMA_IRQHandler+0x984>
 8007c12:	687b      	ldr	r3, [r7, #4]
 8007c14:	681b      	ldr	r3, [r3, #0]
 8007c16:	4a42      	ldr	r2, [pc, #264]	@ (8007d20 <HAL_DMA_IRQHandler+0xa4c>)
 8007c18:	4293      	cmp	r3, r2
 8007c1a:	d01d      	beq.n	8007c58 <HAL_DMA_IRQHandler+0x984>
 8007c1c:	687b      	ldr	r3, [r7, #4]
 8007c1e:	681b      	ldr	r3, [r3, #0]
 8007c20:	4a40      	ldr	r2, [pc, #256]	@ (8007d24 <HAL_DMA_IRQHandler+0xa50>)
 8007c22:	4293      	cmp	r3, r2
 8007c24:	d018      	beq.n	8007c58 <HAL_DMA_IRQHandler+0x984>
 8007c26:	687b      	ldr	r3, [r7, #4]
 8007c28:	681b      	ldr	r3, [r3, #0]
 8007c2a:	4a3f      	ldr	r2, [pc, #252]	@ (8007d28 <HAL_DMA_IRQHandler+0xa54>)
 8007c2c:	4293      	cmp	r3, r2
 8007c2e:	d013      	beq.n	8007c58 <HAL_DMA_IRQHandler+0x984>
 8007c30:	687b      	ldr	r3, [r7, #4]
 8007c32:	681b      	ldr	r3, [r3, #0]
 8007c34:	4a3d      	ldr	r2, [pc, #244]	@ (8007d2c <HAL_DMA_IRQHandler+0xa58>)
 8007c36:	4293      	cmp	r3, r2
 8007c38:	d00e      	beq.n	8007c58 <HAL_DMA_IRQHandler+0x984>
 8007c3a:	687b      	ldr	r3, [r7, #4]
 8007c3c:	681b      	ldr	r3, [r3, #0]
 8007c3e:	4a3c      	ldr	r2, [pc, #240]	@ (8007d30 <HAL_DMA_IRQHandler+0xa5c>)
 8007c40:	4293      	cmp	r3, r2
 8007c42:	d009      	beq.n	8007c58 <HAL_DMA_IRQHandler+0x984>
 8007c44:	687b      	ldr	r3, [r7, #4]
 8007c46:	681b      	ldr	r3, [r3, #0]
 8007c48:	4a3a      	ldr	r2, [pc, #232]	@ (8007d34 <HAL_DMA_IRQHandler+0xa60>)
 8007c4a:	4293      	cmp	r3, r2
 8007c4c:	d004      	beq.n	8007c58 <HAL_DMA_IRQHandler+0x984>
 8007c4e:	687b      	ldr	r3, [r7, #4]
 8007c50:	681b      	ldr	r3, [r3, #0]
 8007c52:	4a39      	ldr	r2, [pc, #228]	@ (8007d38 <HAL_DMA_IRQHandler+0xa64>)
 8007c54:	4293      	cmp	r3, r2
 8007c56:	d101      	bne.n	8007c5c <HAL_DMA_IRQHandler+0x988>
 8007c58:	2301      	movs	r3, #1
 8007c5a:	e000      	b.n	8007c5e <HAL_DMA_IRQHandler+0x98a>
 8007c5c:	2300      	movs	r3, #0
 8007c5e:	2b00      	cmp	r3, #0
 8007c60:	f000 823f 	beq.w	80080e2 <HAL_DMA_IRQHandler+0xe0e>
  {
    ccr_reg = (((BDMA_Channel_TypeDef   *)hdma->Instance)->CCR);
 8007c64:	687b      	ldr	r3, [r7, #4]
 8007c66:	681b      	ldr	r3, [r3, #0]
 8007c68:	681b      	ldr	r3, [r3, #0]
 8007c6a:	613b      	str	r3, [r7, #16]

    /* Half Transfer Complete Interrupt management ******************************/
    if (((tmpisr_bdma & (BDMA_FLAG_HT0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_HTIE) != 0U))
 8007c6c:	687b      	ldr	r3, [r7, #4]
 8007c6e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007c70:	f003 031f 	and.w	r3, r3, #31
 8007c74:	2204      	movs	r2, #4
 8007c76:	409a      	lsls	r2, r3
 8007c78:	697b      	ldr	r3, [r7, #20]
 8007c7a:	4013      	ands	r3, r2
 8007c7c:	2b00      	cmp	r3, #0
 8007c7e:	f000 80cd 	beq.w	8007e1c <HAL_DMA_IRQHandler+0xb48>
 8007c82:	693b      	ldr	r3, [r7, #16]
 8007c84:	f003 0304 	and.w	r3, r3, #4
 8007c88:	2b00      	cmp	r3, #0
 8007c8a:	f000 80c7 	beq.w	8007e1c <HAL_DMA_IRQHandler+0xb48>
    {
      /* Clear the half transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_HTIF0 << (hdma->StreamIndex & 0x1FU));
 8007c8e:	687b      	ldr	r3, [r7, #4]
 8007c90:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007c92:	f003 031f 	and.w	r3, r3, #31
 8007c96:	2204      	movs	r2, #4
 8007c98:	409a      	lsls	r2, r3
 8007c9a:	69fb      	ldr	r3, [r7, #28]
 8007c9c:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007c9e:	693b      	ldr	r3, [r7, #16]
 8007ca0:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8007ca4:	2b00      	cmp	r3, #0
 8007ca6:	d049      	beq.n	8007d3c <HAL_DMA_IRQHandler+0xa68>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 8007ca8:	693b      	ldr	r3, [r7, #16]
 8007caa:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8007cae:	2b00      	cmp	r3, #0
 8007cb0:	d109      	bne.n	8007cc6 <HAL_DMA_IRQHandler+0x9f2>
        {
          if(hdma->XferM1HalfCpltCallback != NULL)
 8007cb2:	687b      	ldr	r3, [r7, #4]
 8007cb4:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8007cb6:	2b00      	cmp	r3, #0
 8007cb8:	f000 8210 	beq.w	80080dc <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 1 */
            hdma->XferM1HalfCpltCallback(hdma);
 8007cbc:	687b      	ldr	r3, [r7, #4]
 8007cbe:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8007cc0:	6878      	ldr	r0, [r7, #4]
 8007cc2:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007cc4:	e20a      	b.n	80080dc <HAL_DMA_IRQHandler+0xe08>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferHalfCpltCallback != NULL)
 8007cc6:	687b      	ldr	r3, [r7, #4]
 8007cc8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007cca:	2b00      	cmp	r3, #0
 8007ccc:	f000 8206 	beq.w	80080dc <HAL_DMA_IRQHandler+0xe08>
          {
            /* Half transfer Callback for Memory 0 */
            hdma->XferHalfCpltCallback(hdma);
 8007cd0:	687b      	ldr	r3, [r7, #4]
 8007cd2:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007cd4:	6878      	ldr	r0, [r7, #4]
 8007cd6:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007cd8:	e200      	b.n	80080dc <HAL_DMA_IRQHandler+0xe08>
 8007cda:	bf00      	nop
 8007cdc:	40020010 	.word	0x40020010
 8007ce0:	40020028 	.word	0x40020028
 8007ce4:	40020040 	.word	0x40020040
 8007ce8:	40020058 	.word	0x40020058
 8007cec:	40020070 	.word	0x40020070
 8007cf0:	40020088 	.word	0x40020088
 8007cf4:	400200a0 	.word	0x400200a0
 8007cf8:	400200b8 	.word	0x400200b8
 8007cfc:	40020410 	.word	0x40020410
 8007d00:	40020428 	.word	0x40020428
 8007d04:	40020440 	.word	0x40020440
 8007d08:	40020458 	.word	0x40020458
 8007d0c:	40020470 	.word	0x40020470
 8007d10:	40020488 	.word	0x40020488
 8007d14:	400204a0 	.word	0x400204a0
 8007d18:	400204b8 	.word	0x400204b8
 8007d1c:	58025408 	.word	0x58025408
 8007d20:	5802541c 	.word	0x5802541c
 8007d24:	58025430 	.word	0x58025430
 8007d28:	58025444 	.word	0x58025444
 8007d2c:	58025458 	.word	0x58025458
 8007d30:	5802546c 	.word	0x5802546c
 8007d34:	58025480 	.word	0x58025480
 8007d38:	58025494 	.word	0x58025494
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 8007d3c:	693b      	ldr	r3, [r7, #16]
 8007d3e:	f003 0320 	and.w	r3, r3, #32
 8007d42:	2b00      	cmp	r3, #0
 8007d44:	d160      	bne.n	8007e08 <HAL_DMA_IRQHandler+0xb34>
        {
          /* Disable the half transfer interrupt */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
 8007d46:	687b      	ldr	r3, [r7, #4]
 8007d48:	681b      	ldr	r3, [r3, #0]
 8007d4a:	4a7f      	ldr	r2, [pc, #508]	@ (8007f48 <HAL_DMA_IRQHandler+0xc74>)
 8007d4c:	4293      	cmp	r3, r2
 8007d4e:	d04a      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007d50:	687b      	ldr	r3, [r7, #4]
 8007d52:	681b      	ldr	r3, [r3, #0]
 8007d54:	4a7d      	ldr	r2, [pc, #500]	@ (8007f4c <HAL_DMA_IRQHandler+0xc78>)
 8007d56:	4293      	cmp	r3, r2
 8007d58:	d045      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007d5a:	687b      	ldr	r3, [r7, #4]
 8007d5c:	681b      	ldr	r3, [r3, #0]
 8007d5e:	4a7c      	ldr	r2, [pc, #496]	@ (8007f50 <HAL_DMA_IRQHandler+0xc7c>)
 8007d60:	4293      	cmp	r3, r2
 8007d62:	d040      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007d64:	687b      	ldr	r3, [r7, #4]
 8007d66:	681b      	ldr	r3, [r3, #0]
 8007d68:	4a7a      	ldr	r2, [pc, #488]	@ (8007f54 <HAL_DMA_IRQHandler+0xc80>)
 8007d6a:	4293      	cmp	r3, r2
 8007d6c:	d03b      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007d6e:	687b      	ldr	r3, [r7, #4]
 8007d70:	681b      	ldr	r3, [r3, #0]
 8007d72:	4a79      	ldr	r2, [pc, #484]	@ (8007f58 <HAL_DMA_IRQHandler+0xc84>)
 8007d74:	4293      	cmp	r3, r2
 8007d76:	d036      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007d78:	687b      	ldr	r3, [r7, #4]
 8007d7a:	681b      	ldr	r3, [r3, #0]
 8007d7c:	4a77      	ldr	r2, [pc, #476]	@ (8007f5c <HAL_DMA_IRQHandler+0xc88>)
 8007d7e:	4293      	cmp	r3, r2
 8007d80:	d031      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007d82:	687b      	ldr	r3, [r7, #4]
 8007d84:	681b      	ldr	r3, [r3, #0]
 8007d86:	4a76      	ldr	r2, [pc, #472]	@ (8007f60 <HAL_DMA_IRQHandler+0xc8c>)
 8007d88:	4293      	cmp	r3, r2
 8007d8a:	d02c      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007d8c:	687b      	ldr	r3, [r7, #4]
 8007d8e:	681b      	ldr	r3, [r3, #0]
 8007d90:	4a74      	ldr	r2, [pc, #464]	@ (8007f64 <HAL_DMA_IRQHandler+0xc90>)
 8007d92:	4293      	cmp	r3, r2
 8007d94:	d027      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007d96:	687b      	ldr	r3, [r7, #4]
 8007d98:	681b      	ldr	r3, [r3, #0]
 8007d9a:	4a73      	ldr	r2, [pc, #460]	@ (8007f68 <HAL_DMA_IRQHandler+0xc94>)
 8007d9c:	4293      	cmp	r3, r2
 8007d9e:	d022      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007da0:	687b      	ldr	r3, [r7, #4]
 8007da2:	681b      	ldr	r3, [r3, #0]
 8007da4:	4a71      	ldr	r2, [pc, #452]	@ (8007f6c <HAL_DMA_IRQHandler+0xc98>)
 8007da6:	4293      	cmp	r3, r2
 8007da8:	d01d      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007daa:	687b      	ldr	r3, [r7, #4]
 8007dac:	681b      	ldr	r3, [r3, #0]
 8007dae:	4a70      	ldr	r2, [pc, #448]	@ (8007f70 <HAL_DMA_IRQHandler+0xc9c>)
 8007db0:	4293      	cmp	r3, r2
 8007db2:	d018      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007db4:	687b      	ldr	r3, [r7, #4]
 8007db6:	681b      	ldr	r3, [r3, #0]
 8007db8:	4a6e      	ldr	r2, [pc, #440]	@ (8007f74 <HAL_DMA_IRQHandler+0xca0>)
 8007dba:	4293      	cmp	r3, r2
 8007dbc:	d013      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007dbe:	687b      	ldr	r3, [r7, #4]
 8007dc0:	681b      	ldr	r3, [r3, #0]
 8007dc2:	4a6d      	ldr	r2, [pc, #436]	@ (8007f78 <HAL_DMA_IRQHandler+0xca4>)
 8007dc4:	4293      	cmp	r3, r2
 8007dc6:	d00e      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007dc8:	687b      	ldr	r3, [r7, #4]
 8007dca:	681b      	ldr	r3, [r3, #0]
 8007dcc:	4a6b      	ldr	r2, [pc, #428]	@ (8007f7c <HAL_DMA_IRQHandler+0xca8>)
 8007dce:	4293      	cmp	r3, r2
 8007dd0:	d009      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007dd2:	687b      	ldr	r3, [r7, #4]
 8007dd4:	681b      	ldr	r3, [r3, #0]
 8007dd6:	4a6a      	ldr	r2, [pc, #424]	@ (8007f80 <HAL_DMA_IRQHandler+0xcac>)
 8007dd8:	4293      	cmp	r3, r2
 8007dda:	d004      	beq.n	8007de6 <HAL_DMA_IRQHandler+0xb12>
 8007ddc:	687b      	ldr	r3, [r7, #4]
 8007dde:	681b      	ldr	r3, [r3, #0]
 8007de0:	4a68      	ldr	r2, [pc, #416]	@ (8007f84 <HAL_DMA_IRQHandler+0xcb0>)
 8007de2:	4293      	cmp	r3, r2
 8007de4:	d108      	bne.n	8007df8 <HAL_DMA_IRQHandler+0xb24>
 8007de6:	687b      	ldr	r3, [r7, #4]
 8007de8:	681b      	ldr	r3, [r3, #0]
 8007dea:	681a      	ldr	r2, [r3, #0]
 8007dec:	687b      	ldr	r3, [r7, #4]
 8007dee:	681b      	ldr	r3, [r3, #0]
 8007df0:	f022 0208 	bic.w	r2, r2, #8
 8007df4:	601a      	str	r2, [r3, #0]
 8007df6:	e007      	b.n	8007e08 <HAL_DMA_IRQHandler+0xb34>
 8007df8:	687b      	ldr	r3, [r7, #4]
 8007dfa:	681b      	ldr	r3, [r3, #0]
 8007dfc:	681a      	ldr	r2, [r3, #0]
 8007dfe:	687b      	ldr	r3, [r7, #4]
 8007e00:	681b      	ldr	r3, [r3, #0]
 8007e02:	f022 0204 	bic.w	r2, r2, #4
 8007e06:	601a      	str	r2, [r3, #0]
        }

        /* DMA peripheral state is not updated in Half Transfer */
        /* but in Transfer Complete case */

       if(hdma->XferHalfCpltCallback != NULL)
 8007e08:	687b      	ldr	r3, [r7, #4]
 8007e0a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007e0c:	2b00      	cmp	r3, #0
 8007e0e:	f000 8165 	beq.w	80080dc <HAL_DMA_IRQHandler+0xe08>
        {
          /* Half transfer callback */
          hdma->XferHalfCpltCallback(hdma);
 8007e12:	687b      	ldr	r3, [r7, #4]
 8007e14:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8007e16:	6878      	ldr	r0, [r7, #4]
 8007e18:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007e1a:	e15f      	b.n	80080dc <HAL_DMA_IRQHandler+0xe08>
        }
      }
    }

    /* Transfer Complete Interrupt management ***********************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TC0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TCIE) != 0U))
 8007e1c:	687b      	ldr	r3, [r7, #4]
 8007e1e:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007e20:	f003 031f 	and.w	r3, r3, #31
 8007e24:	2202      	movs	r2, #2
 8007e26:	409a      	lsls	r2, r3
 8007e28:	697b      	ldr	r3, [r7, #20]
 8007e2a:	4013      	ands	r3, r2
 8007e2c:	2b00      	cmp	r3, #0
 8007e2e:	f000 80c5 	beq.w	8007fbc <HAL_DMA_IRQHandler+0xce8>
 8007e32:	693b      	ldr	r3, [r7, #16]
 8007e34:	f003 0302 	and.w	r3, r3, #2
 8007e38:	2b00      	cmp	r3, #0
 8007e3a:	f000 80bf 	beq.w	8007fbc <HAL_DMA_IRQHandler+0xce8>
    {
      /* Clear the transfer complete flag */
      regs_bdma->IFCR = (BDMA_ISR_TCIF0) << (hdma->StreamIndex & 0x1FU);
 8007e3e:	687b      	ldr	r3, [r7, #4]
 8007e40:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007e42:	f003 031f 	and.w	r3, r3, #31
 8007e46:	2202      	movs	r2, #2
 8007e48:	409a      	lsls	r2, r3
 8007e4a:	69fb      	ldr	r3, [r7, #28]
 8007e4c:	605a      	str	r2, [r3, #4]

      /* Disable the transfer complete interrupt if the DMA mode is Double Buffering */
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007e4e:	693b      	ldr	r3, [r7, #16]
 8007e50:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8007e54:	2b00      	cmp	r3, #0
 8007e56:	d018      	beq.n	8007e8a <HAL_DMA_IRQHandler+0xbb6>
      {
        /* Current memory buffer used is Memory 0 */
        if((ccr_reg & BDMA_CCR_CT) == 0U)
 8007e58:	693b      	ldr	r3, [r7, #16]
 8007e5a:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8007e5e:	2b00      	cmp	r3, #0
 8007e60:	d109      	bne.n	8007e76 <HAL_DMA_IRQHandler+0xba2>
        {
          if(hdma->XferM1CpltCallback != NULL)
 8007e62:	687b      	ldr	r3, [r7, #4]
 8007e64:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8007e66:	2b00      	cmp	r3, #0
 8007e68:	f000 813a 	beq.w	80080e0 <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 1 */
            hdma->XferM1CpltCallback(hdma);
 8007e6c:	687b      	ldr	r3, [r7, #4]
 8007e6e:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8007e70:	6878      	ldr	r0, [r7, #4]
 8007e72:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007e74:	e134      	b.n	80080e0 <HAL_DMA_IRQHandler+0xe0c>
          }
        }
        /* Current memory buffer used is Memory 1 */
        else
        {
          if(hdma->XferCpltCallback != NULL)
 8007e76:	687b      	ldr	r3, [r7, #4]
 8007e78:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007e7a:	2b00      	cmp	r3, #0
 8007e7c:	f000 8130 	beq.w	80080e0 <HAL_DMA_IRQHandler+0xe0c>
          {
            /* Transfer complete Callback for Memory 0 */
            hdma->XferCpltCallback(hdma);
 8007e80:	687b      	ldr	r3, [r7, #4]
 8007e82:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007e84:	6878      	ldr	r0, [r7, #4]
 8007e86:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007e88:	e12a      	b.n	80080e0 <HAL_DMA_IRQHandler+0xe0c>
          }
        }
      }
      else
      {
        if((ccr_reg & BDMA_CCR_CIRC) == 0U)
 8007e8a:	693b      	ldr	r3, [r7, #16]
 8007e8c:	f003 0320 	and.w	r3, r3, #32
 8007e90:	2b00      	cmp	r3, #0
 8007e92:	f040 8089 	bne.w	8007fa8 <HAL_DMA_IRQHandler+0xcd4>
        {
          /* Disable the transfer complete and error interrupt, if the DMA mode is not CIRCULAR */
          __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
 8007e96:	687b      	ldr	r3, [r7, #4]
 8007e98:	681b      	ldr	r3, [r3, #0]
 8007e9a:	4a2b      	ldr	r2, [pc, #172]	@ (8007f48 <HAL_DMA_IRQHandler+0xc74>)
 8007e9c:	4293      	cmp	r3, r2
 8007e9e:	d04a      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007ea0:	687b      	ldr	r3, [r7, #4]
 8007ea2:	681b      	ldr	r3, [r3, #0]
 8007ea4:	4a29      	ldr	r2, [pc, #164]	@ (8007f4c <HAL_DMA_IRQHandler+0xc78>)
 8007ea6:	4293      	cmp	r3, r2
 8007ea8:	d045      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007eaa:	687b      	ldr	r3, [r7, #4]
 8007eac:	681b      	ldr	r3, [r3, #0]
 8007eae:	4a28      	ldr	r2, [pc, #160]	@ (8007f50 <HAL_DMA_IRQHandler+0xc7c>)
 8007eb0:	4293      	cmp	r3, r2
 8007eb2:	d040      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007eb4:	687b      	ldr	r3, [r7, #4]
 8007eb6:	681b      	ldr	r3, [r3, #0]
 8007eb8:	4a26      	ldr	r2, [pc, #152]	@ (8007f54 <HAL_DMA_IRQHandler+0xc80>)
 8007eba:	4293      	cmp	r3, r2
 8007ebc:	d03b      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007ebe:	687b      	ldr	r3, [r7, #4]
 8007ec0:	681b      	ldr	r3, [r3, #0]
 8007ec2:	4a25      	ldr	r2, [pc, #148]	@ (8007f58 <HAL_DMA_IRQHandler+0xc84>)
 8007ec4:	4293      	cmp	r3, r2
 8007ec6:	d036      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007ec8:	687b      	ldr	r3, [r7, #4]
 8007eca:	681b      	ldr	r3, [r3, #0]
 8007ecc:	4a23      	ldr	r2, [pc, #140]	@ (8007f5c <HAL_DMA_IRQHandler+0xc88>)
 8007ece:	4293      	cmp	r3, r2
 8007ed0:	d031      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007ed2:	687b      	ldr	r3, [r7, #4]
 8007ed4:	681b      	ldr	r3, [r3, #0]
 8007ed6:	4a22      	ldr	r2, [pc, #136]	@ (8007f60 <HAL_DMA_IRQHandler+0xc8c>)
 8007ed8:	4293      	cmp	r3, r2
 8007eda:	d02c      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007edc:	687b      	ldr	r3, [r7, #4]
 8007ede:	681b      	ldr	r3, [r3, #0]
 8007ee0:	4a20      	ldr	r2, [pc, #128]	@ (8007f64 <HAL_DMA_IRQHandler+0xc90>)
 8007ee2:	4293      	cmp	r3, r2
 8007ee4:	d027      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007ee6:	687b      	ldr	r3, [r7, #4]
 8007ee8:	681b      	ldr	r3, [r3, #0]
 8007eea:	4a1f      	ldr	r2, [pc, #124]	@ (8007f68 <HAL_DMA_IRQHandler+0xc94>)
 8007eec:	4293      	cmp	r3, r2
 8007eee:	d022      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007ef0:	687b      	ldr	r3, [r7, #4]
 8007ef2:	681b      	ldr	r3, [r3, #0]
 8007ef4:	4a1d      	ldr	r2, [pc, #116]	@ (8007f6c <HAL_DMA_IRQHandler+0xc98>)
 8007ef6:	4293      	cmp	r3, r2
 8007ef8:	d01d      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007efa:	687b      	ldr	r3, [r7, #4]
 8007efc:	681b      	ldr	r3, [r3, #0]
 8007efe:	4a1c      	ldr	r2, [pc, #112]	@ (8007f70 <HAL_DMA_IRQHandler+0xc9c>)
 8007f00:	4293      	cmp	r3, r2
 8007f02:	d018      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007f04:	687b      	ldr	r3, [r7, #4]
 8007f06:	681b      	ldr	r3, [r3, #0]
 8007f08:	4a1a      	ldr	r2, [pc, #104]	@ (8007f74 <HAL_DMA_IRQHandler+0xca0>)
 8007f0a:	4293      	cmp	r3, r2
 8007f0c:	d013      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007f0e:	687b      	ldr	r3, [r7, #4]
 8007f10:	681b      	ldr	r3, [r3, #0]
 8007f12:	4a19      	ldr	r2, [pc, #100]	@ (8007f78 <HAL_DMA_IRQHandler+0xca4>)
 8007f14:	4293      	cmp	r3, r2
 8007f16:	d00e      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007f18:	687b      	ldr	r3, [r7, #4]
 8007f1a:	681b      	ldr	r3, [r3, #0]
 8007f1c:	4a17      	ldr	r2, [pc, #92]	@ (8007f7c <HAL_DMA_IRQHandler+0xca8>)
 8007f1e:	4293      	cmp	r3, r2
 8007f20:	d009      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007f22:	687b      	ldr	r3, [r7, #4]
 8007f24:	681b      	ldr	r3, [r3, #0]
 8007f26:	4a16      	ldr	r2, [pc, #88]	@ (8007f80 <HAL_DMA_IRQHandler+0xcac>)
 8007f28:	4293      	cmp	r3, r2
 8007f2a:	d004      	beq.n	8007f36 <HAL_DMA_IRQHandler+0xc62>
 8007f2c:	687b      	ldr	r3, [r7, #4]
 8007f2e:	681b      	ldr	r3, [r3, #0]
 8007f30:	4a14      	ldr	r2, [pc, #80]	@ (8007f84 <HAL_DMA_IRQHandler+0xcb0>)
 8007f32:	4293      	cmp	r3, r2
 8007f34:	d128      	bne.n	8007f88 <HAL_DMA_IRQHandler+0xcb4>
 8007f36:	687b      	ldr	r3, [r7, #4]
 8007f38:	681b      	ldr	r3, [r3, #0]
 8007f3a:	681a      	ldr	r2, [r3, #0]
 8007f3c:	687b      	ldr	r3, [r7, #4]
 8007f3e:	681b      	ldr	r3, [r3, #0]
 8007f40:	f022 0214 	bic.w	r2, r2, #20
 8007f44:	601a      	str	r2, [r3, #0]
 8007f46:	e027      	b.n	8007f98 <HAL_DMA_IRQHandler+0xcc4>
 8007f48:	40020010 	.word	0x40020010
 8007f4c:	40020028 	.word	0x40020028
 8007f50:	40020040 	.word	0x40020040
 8007f54:	40020058 	.word	0x40020058
 8007f58:	40020070 	.word	0x40020070
 8007f5c:	40020088 	.word	0x40020088
 8007f60:	400200a0 	.word	0x400200a0
 8007f64:	400200b8 	.word	0x400200b8
 8007f68:	40020410 	.word	0x40020410
 8007f6c:	40020428 	.word	0x40020428
 8007f70:	40020440 	.word	0x40020440
 8007f74:	40020458 	.word	0x40020458
 8007f78:	40020470 	.word	0x40020470
 8007f7c:	40020488 	.word	0x40020488
 8007f80:	400204a0 	.word	0x400204a0
 8007f84:	400204b8 	.word	0x400204b8
 8007f88:	687b      	ldr	r3, [r7, #4]
 8007f8a:	681b      	ldr	r3, [r3, #0]
 8007f8c:	681a      	ldr	r2, [r3, #0]
 8007f8e:	687b      	ldr	r3, [r7, #4]
 8007f90:	681b      	ldr	r3, [r3, #0]
 8007f92:	f022 020a 	bic.w	r2, r2, #10
 8007f96:	601a      	str	r2, [r3, #0]

          /* Change the DMA state */
          hdma->State = HAL_DMA_STATE_READY;
 8007f98:	687b      	ldr	r3, [r7, #4]
 8007f9a:	2201      	movs	r2, #1
 8007f9c:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

          /* Process Unlocked */
          __HAL_UNLOCK(hdma);
 8007fa0:	687b      	ldr	r3, [r7, #4]
 8007fa2:	2200      	movs	r2, #0
 8007fa4:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
        }

        if(hdma->XferCpltCallback != NULL)
 8007fa8:	687b      	ldr	r3, [r7, #4]
 8007faa:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007fac:	2b00      	cmp	r3, #0
 8007fae:	f000 8097 	beq.w	80080e0 <HAL_DMA_IRQHandler+0xe0c>
        {
          /* Transfer complete callback */
          hdma->XferCpltCallback(hdma);
 8007fb2:	687b      	ldr	r3, [r7, #4]
 8007fb4:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8007fb6:	6878      	ldr	r0, [r7, #4]
 8007fb8:	4798      	blx	r3
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 8007fba:	e091      	b.n	80080e0 <HAL_DMA_IRQHandler+0xe0c>
        }
      }
    }
    /* Transfer Error Interrupt management **************************************/
    else if (((tmpisr_bdma & (BDMA_FLAG_TE0 << (hdma->StreamIndex & 0x1FU))) != 0U) && ((ccr_reg & BDMA_CCR_TEIE) != 0U))
 8007fbc:	687b      	ldr	r3, [r7, #4]
 8007fbe:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8007fc0:	f003 031f 	and.w	r3, r3, #31
 8007fc4:	2208      	movs	r2, #8
 8007fc6:	409a      	lsls	r2, r3
 8007fc8:	697b      	ldr	r3, [r7, #20]
 8007fca:	4013      	ands	r3, r2
 8007fcc:	2b00      	cmp	r3, #0
 8007fce:	f000 8088 	beq.w	80080e2 <HAL_DMA_IRQHandler+0xe0e>
 8007fd2:	693b      	ldr	r3, [r7, #16]
 8007fd4:	f003 0308 	and.w	r3, r3, #8
 8007fd8:	2b00      	cmp	r3, #0
 8007fda:	f000 8082 	beq.w	80080e2 <HAL_DMA_IRQHandler+0xe0e>
    {
      /* When a DMA transfer error occurs */
      /* A hardware clear of its EN bits is performed */
      /* Disable ALL DMA IT */
      __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
 8007fde:	687b      	ldr	r3, [r7, #4]
 8007fe0:	681b      	ldr	r3, [r3, #0]
 8007fe2:	4a41      	ldr	r2, [pc, #260]	@ (80080e8 <HAL_DMA_IRQHandler+0xe14>)
 8007fe4:	4293      	cmp	r3, r2
 8007fe6:	d04a      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8007fe8:	687b      	ldr	r3, [r7, #4]
 8007fea:	681b      	ldr	r3, [r3, #0]
 8007fec:	4a3f      	ldr	r2, [pc, #252]	@ (80080ec <HAL_DMA_IRQHandler+0xe18>)
 8007fee:	4293      	cmp	r3, r2
 8007ff0:	d045      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8007ff2:	687b      	ldr	r3, [r7, #4]
 8007ff4:	681b      	ldr	r3, [r3, #0]
 8007ff6:	4a3e      	ldr	r2, [pc, #248]	@ (80080f0 <HAL_DMA_IRQHandler+0xe1c>)
 8007ff8:	4293      	cmp	r3, r2
 8007ffa:	d040      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8007ffc:	687b      	ldr	r3, [r7, #4]
 8007ffe:	681b      	ldr	r3, [r3, #0]
 8008000:	4a3c      	ldr	r2, [pc, #240]	@ (80080f4 <HAL_DMA_IRQHandler+0xe20>)
 8008002:	4293      	cmp	r3, r2
 8008004:	d03b      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8008006:	687b      	ldr	r3, [r7, #4]
 8008008:	681b      	ldr	r3, [r3, #0]
 800800a:	4a3b      	ldr	r2, [pc, #236]	@ (80080f8 <HAL_DMA_IRQHandler+0xe24>)
 800800c:	4293      	cmp	r3, r2
 800800e:	d036      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8008010:	687b      	ldr	r3, [r7, #4]
 8008012:	681b      	ldr	r3, [r3, #0]
 8008014:	4a39      	ldr	r2, [pc, #228]	@ (80080fc <HAL_DMA_IRQHandler+0xe28>)
 8008016:	4293      	cmp	r3, r2
 8008018:	d031      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 800801a:	687b      	ldr	r3, [r7, #4]
 800801c:	681b      	ldr	r3, [r3, #0]
 800801e:	4a38      	ldr	r2, [pc, #224]	@ (8008100 <HAL_DMA_IRQHandler+0xe2c>)
 8008020:	4293      	cmp	r3, r2
 8008022:	d02c      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8008024:	687b      	ldr	r3, [r7, #4]
 8008026:	681b      	ldr	r3, [r3, #0]
 8008028:	4a36      	ldr	r2, [pc, #216]	@ (8008104 <HAL_DMA_IRQHandler+0xe30>)
 800802a:	4293      	cmp	r3, r2
 800802c:	d027      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 800802e:	687b      	ldr	r3, [r7, #4]
 8008030:	681b      	ldr	r3, [r3, #0]
 8008032:	4a35      	ldr	r2, [pc, #212]	@ (8008108 <HAL_DMA_IRQHandler+0xe34>)
 8008034:	4293      	cmp	r3, r2
 8008036:	d022      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8008038:	687b      	ldr	r3, [r7, #4]
 800803a:	681b      	ldr	r3, [r3, #0]
 800803c:	4a33      	ldr	r2, [pc, #204]	@ (800810c <HAL_DMA_IRQHandler+0xe38>)
 800803e:	4293      	cmp	r3, r2
 8008040:	d01d      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8008042:	687b      	ldr	r3, [r7, #4]
 8008044:	681b      	ldr	r3, [r3, #0]
 8008046:	4a32      	ldr	r2, [pc, #200]	@ (8008110 <HAL_DMA_IRQHandler+0xe3c>)
 8008048:	4293      	cmp	r3, r2
 800804a:	d018      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 800804c:	687b      	ldr	r3, [r7, #4]
 800804e:	681b      	ldr	r3, [r3, #0]
 8008050:	4a30      	ldr	r2, [pc, #192]	@ (8008114 <HAL_DMA_IRQHandler+0xe40>)
 8008052:	4293      	cmp	r3, r2
 8008054:	d013      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8008056:	687b      	ldr	r3, [r7, #4]
 8008058:	681b      	ldr	r3, [r3, #0]
 800805a:	4a2f      	ldr	r2, [pc, #188]	@ (8008118 <HAL_DMA_IRQHandler+0xe44>)
 800805c:	4293      	cmp	r3, r2
 800805e:	d00e      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8008060:	687b      	ldr	r3, [r7, #4]
 8008062:	681b      	ldr	r3, [r3, #0]
 8008064:	4a2d      	ldr	r2, [pc, #180]	@ (800811c <HAL_DMA_IRQHandler+0xe48>)
 8008066:	4293      	cmp	r3, r2
 8008068:	d009      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 800806a:	687b      	ldr	r3, [r7, #4]
 800806c:	681b      	ldr	r3, [r3, #0]
 800806e:	4a2c      	ldr	r2, [pc, #176]	@ (8008120 <HAL_DMA_IRQHandler+0xe4c>)
 8008070:	4293      	cmp	r3, r2
 8008072:	d004      	beq.n	800807e <HAL_DMA_IRQHandler+0xdaa>
 8008074:	687b      	ldr	r3, [r7, #4]
 8008076:	681b      	ldr	r3, [r3, #0]
 8008078:	4a2a      	ldr	r2, [pc, #168]	@ (8008124 <HAL_DMA_IRQHandler+0xe50>)
 800807a:	4293      	cmp	r3, r2
 800807c:	d108      	bne.n	8008090 <HAL_DMA_IRQHandler+0xdbc>
 800807e:	687b      	ldr	r3, [r7, #4]
 8008080:	681b      	ldr	r3, [r3, #0]
 8008082:	681a      	ldr	r2, [r3, #0]
 8008084:	687b      	ldr	r3, [r7, #4]
 8008086:	681b      	ldr	r3, [r3, #0]
 8008088:	f022 021c 	bic.w	r2, r2, #28
 800808c:	601a      	str	r2, [r3, #0]
 800808e:	e007      	b.n	80080a0 <HAL_DMA_IRQHandler+0xdcc>
 8008090:	687b      	ldr	r3, [r7, #4]
 8008092:	681b      	ldr	r3, [r3, #0]
 8008094:	681a      	ldr	r2, [r3, #0]
 8008096:	687b      	ldr	r3, [r7, #4]
 8008098:	681b      	ldr	r3, [r3, #0]
 800809a:	f022 020e 	bic.w	r2, r2, #14
 800809e:	601a      	str	r2, [r3, #0]

      /* Clear all flags */
      regs_bdma->IFCR = (BDMA_ISR_GIF0) << (hdma->StreamIndex & 0x1FU);
 80080a0:	687b      	ldr	r3, [r7, #4]
 80080a2:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 80080a4:	f003 031f 	and.w	r3, r3, #31
 80080a8:	2201      	movs	r2, #1
 80080aa:	409a      	lsls	r2, r3
 80080ac:	69fb      	ldr	r3, [r7, #28]
 80080ae:	605a      	str	r2, [r3, #4]

      /* Update error code */
      hdma->ErrorCode = HAL_DMA_ERROR_TE;
 80080b0:	687b      	ldr	r3, [r7, #4]
 80080b2:	2201      	movs	r2, #1
 80080b4:	655a      	str	r2, [r3, #84]	@ 0x54

      /* Change the DMA state */
      hdma->State = HAL_DMA_STATE_READY;
 80080b6:	687b      	ldr	r3, [r7, #4]
 80080b8:	2201      	movs	r2, #1
 80080ba:	f883 2035 	strb.w	r2, [r3, #53]	@ 0x35

      /* Process Unlocked */
      __HAL_UNLOCK(hdma);
 80080be:	687b      	ldr	r3, [r7, #4]
 80080c0:	2200      	movs	r2, #0
 80080c2:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34

      if (hdma->XferErrorCallback != NULL)
 80080c6:	687b      	ldr	r3, [r7, #4]
 80080c8:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80080ca:	2b00      	cmp	r3, #0
 80080cc:	d009      	beq.n	80080e2 <HAL_DMA_IRQHandler+0xe0e>
      {
        /* Transfer error callback */
        hdma->XferErrorCallback(hdma);
 80080ce:	687b      	ldr	r3, [r7, #4]
 80080d0:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80080d2:	6878      	ldr	r0, [r7, #4]
 80080d4:	4798      	blx	r3
 80080d6:	e004      	b.n	80080e2 <HAL_DMA_IRQHandler+0xe0e>
          return;
 80080d8:	bf00      	nop
 80080da:	e002      	b.n	80080e2 <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 80080dc:	bf00      	nop
 80080de:	e000      	b.n	80080e2 <HAL_DMA_IRQHandler+0xe0e>
      if((ccr_reg & BDMA_CCR_DBM) != 0U)
 80080e0:	bf00      	nop
  }
  else
  {
    /* Nothing To Do */
  }
}
 80080e2:	3728      	adds	r7, #40	@ 0x28
 80080e4:	46bd      	mov	sp, r7
 80080e6:	bd80      	pop	{r7, pc}
 80080e8:	40020010 	.word	0x40020010
 80080ec:	40020028 	.word	0x40020028
 80080f0:	40020040 	.word	0x40020040
 80080f4:	40020058 	.word	0x40020058
 80080f8:	40020070 	.word	0x40020070
 80080fc:	40020088 	.word	0x40020088
 8008100:	400200a0 	.word	0x400200a0
 8008104:	400200b8 	.word	0x400200b8
 8008108:	40020410 	.word	0x40020410
 800810c:	40020428 	.word	0x40020428
 8008110:	40020440 	.word	0x40020440
 8008114:	40020458 	.word	0x40020458
 8008118:	40020470 	.word	0x40020470
 800811c:	40020488 	.word	0x40020488
 8008120:	400204a0 	.word	0x400204a0
 8008124:	400204b8 	.word	0x400204b8

08008128 <DMA_CalcBaseAndBitshift>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval Stream base address
  */
static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma)
{
 8008128:	b480      	push	{r7}
 800812a:	b085      	sub	sp, #20
 800812c:	af00      	add	r7, sp, #0
 800812e:	6078      	str	r0, [r7, #4]
  if(IS_DMA_STREAM_INSTANCE(hdma->Instance) != 0U) /* DMA1 or DMA2 instance */
 8008130:	687b      	ldr	r3, [r7, #4]
 8008132:	681b      	ldr	r3, [r3, #0]
 8008134:	4a42      	ldr	r2, [pc, #264]	@ (8008240 <DMA_CalcBaseAndBitshift+0x118>)
 8008136:	4293      	cmp	r3, r2
 8008138:	d04a      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 800813a:	687b      	ldr	r3, [r7, #4]
 800813c:	681b      	ldr	r3, [r3, #0]
 800813e:	4a41      	ldr	r2, [pc, #260]	@ (8008244 <DMA_CalcBaseAndBitshift+0x11c>)
 8008140:	4293      	cmp	r3, r2
 8008142:	d045      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 8008144:	687b      	ldr	r3, [r7, #4]
 8008146:	681b      	ldr	r3, [r3, #0]
 8008148:	4a3f      	ldr	r2, [pc, #252]	@ (8008248 <DMA_CalcBaseAndBitshift+0x120>)
 800814a:	4293      	cmp	r3, r2
 800814c:	d040      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 800814e:	687b      	ldr	r3, [r7, #4]
 8008150:	681b      	ldr	r3, [r3, #0]
 8008152:	4a3e      	ldr	r2, [pc, #248]	@ (800824c <DMA_CalcBaseAndBitshift+0x124>)
 8008154:	4293      	cmp	r3, r2
 8008156:	d03b      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 8008158:	687b      	ldr	r3, [r7, #4]
 800815a:	681b      	ldr	r3, [r3, #0]
 800815c:	4a3c      	ldr	r2, [pc, #240]	@ (8008250 <DMA_CalcBaseAndBitshift+0x128>)
 800815e:	4293      	cmp	r3, r2
 8008160:	d036      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 8008162:	687b      	ldr	r3, [r7, #4]
 8008164:	681b      	ldr	r3, [r3, #0]
 8008166:	4a3b      	ldr	r2, [pc, #236]	@ (8008254 <DMA_CalcBaseAndBitshift+0x12c>)
 8008168:	4293      	cmp	r3, r2
 800816a:	d031      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 800816c:	687b      	ldr	r3, [r7, #4]
 800816e:	681b      	ldr	r3, [r3, #0]
 8008170:	4a39      	ldr	r2, [pc, #228]	@ (8008258 <DMA_CalcBaseAndBitshift+0x130>)
 8008172:	4293      	cmp	r3, r2
 8008174:	d02c      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 8008176:	687b      	ldr	r3, [r7, #4]
 8008178:	681b      	ldr	r3, [r3, #0]
 800817a:	4a38      	ldr	r2, [pc, #224]	@ (800825c <DMA_CalcBaseAndBitshift+0x134>)
 800817c:	4293      	cmp	r3, r2
 800817e:	d027      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 8008180:	687b      	ldr	r3, [r7, #4]
 8008182:	681b      	ldr	r3, [r3, #0]
 8008184:	4a36      	ldr	r2, [pc, #216]	@ (8008260 <DMA_CalcBaseAndBitshift+0x138>)
 8008186:	4293      	cmp	r3, r2
 8008188:	d022      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 800818a:	687b      	ldr	r3, [r7, #4]
 800818c:	681b      	ldr	r3, [r3, #0]
 800818e:	4a35      	ldr	r2, [pc, #212]	@ (8008264 <DMA_CalcBaseAndBitshift+0x13c>)
 8008190:	4293      	cmp	r3, r2
 8008192:	d01d      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 8008194:	687b      	ldr	r3, [r7, #4]
 8008196:	681b      	ldr	r3, [r3, #0]
 8008198:	4a33      	ldr	r2, [pc, #204]	@ (8008268 <DMA_CalcBaseAndBitshift+0x140>)
 800819a:	4293      	cmp	r3, r2
 800819c:	d018      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 800819e:	687b      	ldr	r3, [r7, #4]
 80081a0:	681b      	ldr	r3, [r3, #0]
 80081a2:	4a32      	ldr	r2, [pc, #200]	@ (800826c <DMA_CalcBaseAndBitshift+0x144>)
 80081a4:	4293      	cmp	r3, r2
 80081a6:	d013      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 80081a8:	687b      	ldr	r3, [r7, #4]
 80081aa:	681b      	ldr	r3, [r3, #0]
 80081ac:	4a30      	ldr	r2, [pc, #192]	@ (8008270 <DMA_CalcBaseAndBitshift+0x148>)
 80081ae:	4293      	cmp	r3, r2
 80081b0:	d00e      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 80081b2:	687b      	ldr	r3, [r7, #4]
 80081b4:	681b      	ldr	r3, [r3, #0]
 80081b6:	4a2f      	ldr	r2, [pc, #188]	@ (8008274 <DMA_CalcBaseAndBitshift+0x14c>)
 80081b8:	4293      	cmp	r3, r2
 80081ba:	d009      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 80081bc:	687b      	ldr	r3, [r7, #4]
 80081be:	681b      	ldr	r3, [r3, #0]
 80081c0:	4a2d      	ldr	r2, [pc, #180]	@ (8008278 <DMA_CalcBaseAndBitshift+0x150>)
 80081c2:	4293      	cmp	r3, r2
 80081c4:	d004      	beq.n	80081d0 <DMA_CalcBaseAndBitshift+0xa8>
 80081c6:	687b      	ldr	r3, [r7, #4]
 80081c8:	681b      	ldr	r3, [r3, #0]
 80081ca:	4a2c      	ldr	r2, [pc, #176]	@ (800827c <DMA_CalcBaseAndBitshift+0x154>)
 80081cc:	4293      	cmp	r3, r2
 80081ce:	d101      	bne.n	80081d4 <DMA_CalcBaseAndBitshift+0xac>
 80081d0:	2301      	movs	r3, #1
 80081d2:	e000      	b.n	80081d6 <DMA_CalcBaseAndBitshift+0xae>
 80081d4:	2300      	movs	r3, #0
 80081d6:	2b00      	cmp	r3, #0
 80081d8:	d024      	beq.n	8008224 <DMA_CalcBaseAndBitshift+0xfc>
  {
    uint32_t stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 80081da:	687b      	ldr	r3, [r7, #4]
 80081dc:	681b      	ldr	r3, [r3, #0]
 80081de:	b2db      	uxtb	r3, r3
 80081e0:	3b10      	subs	r3, #16
 80081e2:	4a27      	ldr	r2, [pc, #156]	@ (8008280 <DMA_CalcBaseAndBitshift+0x158>)
 80081e4:	fba2 2303 	umull	r2, r3, r2, r3
 80081e8:	091b      	lsrs	r3, r3, #4
 80081ea:	60fb      	str	r3, [r7, #12]

    /* lookup table for necessary bitshift of flags within status registers */
    static const uint8_t flagBitshiftOffset[8U] = {0U, 6U, 16U, 22U, 0U, 6U, 16U, 22U};
    hdma->StreamIndex = flagBitshiftOffset[stream_number & 0x7U];
 80081ec:	68fb      	ldr	r3, [r7, #12]
 80081ee:	f003 0307 	and.w	r3, r3, #7
 80081f2:	4a24      	ldr	r2, [pc, #144]	@ (8008284 <DMA_CalcBaseAndBitshift+0x15c>)
 80081f4:	5cd3      	ldrb	r3, [r2, r3]
 80081f6:	461a      	mov	r2, r3
 80081f8:	687b      	ldr	r3, [r7, #4]
 80081fa:	65da      	str	r2, [r3, #92]	@ 0x5c

    if (stream_number > 3U)
 80081fc:	68fb      	ldr	r3, [r7, #12]
 80081fe:	2b03      	cmp	r3, #3
 8008200:	d908      	bls.n	8008214 <DMA_CalcBaseAndBitshift+0xec>
    {
      /* return pointer to HISR and HIFCR */
      hdma->StreamBaseAddress = (((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU)) + 4U);
 8008202:	687b      	ldr	r3, [r7, #4]
 8008204:	681b      	ldr	r3, [r3, #0]
 8008206:	461a      	mov	r2, r3
 8008208:	4b1f      	ldr	r3, [pc, #124]	@ (8008288 <DMA_CalcBaseAndBitshift+0x160>)
 800820a:	4013      	ands	r3, r2
 800820c:	1d1a      	adds	r2, r3, #4
 800820e:	687b      	ldr	r3, [r7, #4]
 8008210:	659a      	str	r2, [r3, #88]	@ 0x58
 8008212:	e00d      	b.n	8008230 <DMA_CalcBaseAndBitshift+0x108>
    }
    else
    {
      /* return pointer to LISR and LIFCR */
      hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0x3FFU));
 8008214:	687b      	ldr	r3, [r7, #4]
 8008216:	681b      	ldr	r3, [r3, #0]
 8008218:	461a      	mov	r2, r3
 800821a:	4b1b      	ldr	r3, [pc, #108]	@ (8008288 <DMA_CalcBaseAndBitshift+0x160>)
 800821c:	4013      	ands	r3, r2
 800821e:	687a      	ldr	r2, [r7, #4]
 8008220:	6593      	str	r3, [r2, #88]	@ 0x58
 8008222:	e005      	b.n	8008230 <DMA_CalcBaseAndBitshift+0x108>
    }
  }
  else /* BDMA instance(s) */
  {
    /* return pointer to ISR and IFCR */
    hdma->StreamBaseAddress = ((uint32_t)((uint32_t*)hdma->Instance) & (uint32_t)(~0xFFU));
 8008224:	687b      	ldr	r3, [r7, #4]
 8008226:	681b      	ldr	r3, [r3, #0]
 8008228:	f023 02ff 	bic.w	r2, r3, #255	@ 0xff
 800822c:	687b      	ldr	r3, [r7, #4]
 800822e:	659a      	str	r2, [r3, #88]	@ 0x58
  }

  return hdma->StreamBaseAddress;
 8008230:	687b      	ldr	r3, [r7, #4]
 8008232:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
}
 8008234:	4618      	mov	r0, r3
 8008236:	3714      	adds	r7, #20
 8008238:	46bd      	mov	sp, r7
 800823a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800823e:	4770      	bx	lr
 8008240:	40020010 	.word	0x40020010
 8008244:	40020028 	.word	0x40020028
 8008248:	40020040 	.word	0x40020040
 800824c:	40020058 	.word	0x40020058
 8008250:	40020070 	.word	0x40020070
 8008254:	40020088 	.word	0x40020088
 8008258:	400200a0 	.word	0x400200a0
 800825c:	400200b8 	.word	0x400200b8
 8008260:	40020410 	.word	0x40020410
 8008264:	40020428 	.word	0x40020428
 8008268:	40020440 	.word	0x40020440
 800826c:	40020458 	.word	0x40020458
 8008270:	40020470 	.word	0x40020470
 8008274:	40020488 	.word	0x40020488
 8008278:	400204a0 	.word	0x400204a0
 800827c:	400204b8 	.word	0x400204b8
 8008280:	aaaaaaab 	.word	0xaaaaaaab
 8008284:	08031d1c 	.word	0x08031d1c
 8008288:	fffffc00 	.word	0xfffffc00

0800828c <DMA_CheckFifoParam>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma)
{
 800828c:	b480      	push	{r7}
 800828e:	b085      	sub	sp, #20
 8008290:	af00      	add	r7, sp, #0
 8008292:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef status = HAL_OK;
 8008294:	2300      	movs	r3, #0
 8008296:	73fb      	strb	r3, [r7, #15]

  /* Memory Data size equal to Byte */
  if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
 8008298:	687b      	ldr	r3, [r7, #4]
 800829a:	699b      	ldr	r3, [r3, #24]
 800829c:	2b00      	cmp	r3, #0
 800829e:	d120      	bne.n	80082e2 <DMA_CheckFifoParam+0x56>
  {
    switch (hdma->Init.FIFOThreshold)
 80082a0:	687b      	ldr	r3, [r7, #4]
 80082a2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80082a4:	2b03      	cmp	r3, #3
 80082a6:	d858      	bhi.n	800835a <DMA_CheckFifoParam+0xce>
 80082a8:	a201      	add	r2, pc, #4	@ (adr r2, 80082b0 <DMA_CheckFifoParam+0x24>)
 80082aa:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80082ae:	bf00      	nop
 80082b0:	080082c1 	.word	0x080082c1
 80082b4:	080082d3 	.word	0x080082d3
 80082b8:	080082c1 	.word	0x080082c1
 80082bc:	0800835b 	.word	0x0800835b
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:

        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 80082c0:	687b      	ldr	r3, [r7, #4]
 80082c2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80082c4:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 80082c8:	2b00      	cmp	r3, #0
 80082ca:	d048      	beq.n	800835e <DMA_CheckFifoParam+0xd2>
        {
          status = HAL_ERROR;
 80082cc:	2301      	movs	r3, #1
 80082ce:	73fb      	strb	r3, [r7, #15]
        }
        break;
 80082d0:	e045      	b.n	800835e <DMA_CheckFifoParam+0xd2>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 80082d2:	687b      	ldr	r3, [r7, #4]
 80082d4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80082d6:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 80082da:	d142      	bne.n	8008362 <DMA_CheckFifoParam+0xd6>
        {
          status = HAL_ERROR;
 80082dc:	2301      	movs	r3, #1
 80082de:	73fb      	strb	r3, [r7, #15]
        }
        break;
 80082e0:	e03f      	b.n	8008362 <DMA_CheckFifoParam+0xd6>
        break;
    }
  }

  /* Memory Data size equal to Half-Word */
  else if (hdma->Init.MemDataAlignment == DMA_MDATAALIGN_HALFWORD)
 80082e2:	687b      	ldr	r3, [r7, #4]
 80082e4:	699b      	ldr	r3, [r3, #24]
 80082e6:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 80082ea:	d123      	bne.n	8008334 <DMA_CheckFifoParam+0xa8>
  {
    switch (hdma->Init.FIFOThreshold)
 80082ec:	687b      	ldr	r3, [r7, #4]
 80082ee:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80082f0:	2b03      	cmp	r3, #3
 80082f2:	d838      	bhi.n	8008366 <DMA_CheckFifoParam+0xda>
 80082f4:	a201      	add	r2, pc, #4	@ (adr r2, 80082fc <DMA_CheckFifoParam+0x70>)
 80082f6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80082fa:	bf00      	nop
 80082fc:	0800830d 	.word	0x0800830d
 8008300:	08008313 	.word	0x08008313
 8008304:	0800830d 	.word	0x0800830d
 8008308:	08008325 	.word	0x08008325
    {
      case DMA_FIFO_THRESHOLD_1QUARTERFULL:
      case DMA_FIFO_THRESHOLD_3QUARTERSFULL:
        status = HAL_ERROR;
 800830c:	2301      	movs	r3, #1
 800830e:	73fb      	strb	r3, [r7, #15]
        break;
 8008310:	e030      	b.n	8008374 <DMA_CheckFifoParam+0xe8>

      case DMA_FIFO_THRESHOLD_HALFFULL:
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8008312:	687b      	ldr	r3, [r7, #4]
 8008314:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8008316:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 800831a:	2b00      	cmp	r3, #0
 800831c:	d025      	beq.n	800836a <DMA_CheckFifoParam+0xde>
        {
          status = HAL_ERROR;
 800831e:	2301      	movs	r3, #1
 8008320:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8008322:	e022      	b.n	800836a <DMA_CheckFifoParam+0xde>

      case DMA_FIFO_THRESHOLD_FULL:
        if (hdma->Init.MemBurst == DMA_MBURST_INC16)
 8008324:	687b      	ldr	r3, [r7, #4]
 8008326:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8008328:	f1b3 7fc0 	cmp.w	r3, #25165824	@ 0x1800000
 800832c:	d11f      	bne.n	800836e <DMA_CheckFifoParam+0xe2>
        {
          status = HAL_ERROR;
 800832e:	2301      	movs	r3, #1
 8008330:	73fb      	strb	r3, [r7, #15]
        }
        break;
 8008332:	e01c      	b.n	800836e <DMA_CheckFifoParam+0xe2>
  }

  /* Memory Data size equal to Word */
  else
  {
    switch (hdma->Init.FIFOThreshold)
 8008334:	687b      	ldr	r3, [r7, #4]
 8008336:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008338:	2b02      	cmp	r3, #2
 800833a:	d902      	bls.n	8008342 <DMA_CheckFifoParam+0xb6>
 800833c:	2b03      	cmp	r3, #3
 800833e:	d003      	beq.n	8008348 <DMA_CheckFifoParam+0xbc>
          status = HAL_ERROR;
        }
    break;

      default:
        break;
 8008340:	e018      	b.n	8008374 <DMA_CheckFifoParam+0xe8>
        status = HAL_ERROR;
 8008342:	2301      	movs	r3, #1
 8008344:	73fb      	strb	r3, [r7, #15]
        break;
 8008346:	e015      	b.n	8008374 <DMA_CheckFifoParam+0xe8>
        if ((hdma->Init.MemBurst & DMA_SxCR_MBURST_1) == DMA_SxCR_MBURST_1)
 8008348:	687b      	ldr	r3, [r7, #4]
 800834a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800834c:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 8008350:	2b00      	cmp	r3, #0
 8008352:	d00e      	beq.n	8008372 <DMA_CheckFifoParam+0xe6>
          status = HAL_ERROR;
 8008354:	2301      	movs	r3, #1
 8008356:	73fb      	strb	r3, [r7, #15]
    break;
 8008358:	e00b      	b.n	8008372 <DMA_CheckFifoParam+0xe6>
        break;
 800835a:	bf00      	nop
 800835c:	e00a      	b.n	8008374 <DMA_CheckFifoParam+0xe8>
        break;
 800835e:	bf00      	nop
 8008360:	e008      	b.n	8008374 <DMA_CheckFifoParam+0xe8>
        break;
 8008362:	bf00      	nop
 8008364:	e006      	b.n	8008374 <DMA_CheckFifoParam+0xe8>
        break;
 8008366:	bf00      	nop
 8008368:	e004      	b.n	8008374 <DMA_CheckFifoParam+0xe8>
        break;
 800836a:	bf00      	nop
 800836c:	e002      	b.n	8008374 <DMA_CheckFifoParam+0xe8>
        break;
 800836e:	bf00      	nop
 8008370:	e000      	b.n	8008374 <DMA_CheckFifoParam+0xe8>
    break;
 8008372:	bf00      	nop
    }
  }

  return status;
 8008374:	7bfb      	ldrb	r3, [r7, #15]
}
 8008376:	4618      	mov	r0, r3
 8008378:	3714      	adds	r7, #20
 800837a:	46bd      	mov	sp, r7
 800837c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008380:	4770      	bx	lr
 8008382:	bf00      	nop

08008384 <DMA_CalcDMAMUXChannelBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)
{
 8008384:	b480      	push	{r7}
 8008386:	b085      	sub	sp, #20
 8008388:	af00      	add	r7, sp, #0
 800838a:	6078      	str	r0, [r7, #4]
  uint32_t stream_number;
  uint32_t stream_baseaddress = (uint32_t)((uint32_t*)hdma->Instance);
 800838c:	687b      	ldr	r3, [r7, #4]
 800838e:	681b      	ldr	r3, [r3, #0]
 8008390:	60bb      	str	r3, [r7, #8]

  if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 8008392:	687b      	ldr	r3, [r7, #4]
 8008394:	681b      	ldr	r3, [r3, #0]
 8008396:	4a38      	ldr	r2, [pc, #224]	@ (8008478 <DMA_CalcDMAMUXChannelBaseAndMask+0xf4>)
 8008398:	4293      	cmp	r3, r2
 800839a:	d022      	beq.n	80083e2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 800839c:	687b      	ldr	r3, [r7, #4]
 800839e:	681b      	ldr	r3, [r3, #0]
 80083a0:	4a36      	ldr	r2, [pc, #216]	@ (800847c <DMA_CalcDMAMUXChannelBaseAndMask+0xf8>)
 80083a2:	4293      	cmp	r3, r2
 80083a4:	d01d      	beq.n	80083e2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 80083a6:	687b      	ldr	r3, [r7, #4]
 80083a8:	681b      	ldr	r3, [r3, #0]
 80083aa:	4a35      	ldr	r2, [pc, #212]	@ (8008480 <DMA_CalcDMAMUXChannelBaseAndMask+0xfc>)
 80083ac:	4293      	cmp	r3, r2
 80083ae:	d018      	beq.n	80083e2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 80083b0:	687b      	ldr	r3, [r7, #4]
 80083b2:	681b      	ldr	r3, [r3, #0]
 80083b4:	4a33      	ldr	r2, [pc, #204]	@ (8008484 <DMA_CalcDMAMUXChannelBaseAndMask+0x100>)
 80083b6:	4293      	cmp	r3, r2
 80083b8:	d013      	beq.n	80083e2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 80083ba:	687b      	ldr	r3, [r7, #4]
 80083bc:	681b      	ldr	r3, [r3, #0]
 80083be:	4a32      	ldr	r2, [pc, #200]	@ (8008488 <DMA_CalcDMAMUXChannelBaseAndMask+0x104>)
 80083c0:	4293      	cmp	r3, r2
 80083c2:	d00e      	beq.n	80083e2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 80083c4:	687b      	ldr	r3, [r7, #4]
 80083c6:	681b      	ldr	r3, [r3, #0]
 80083c8:	4a30      	ldr	r2, [pc, #192]	@ (800848c <DMA_CalcDMAMUXChannelBaseAndMask+0x108>)
 80083ca:	4293      	cmp	r3, r2
 80083cc:	d009      	beq.n	80083e2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 80083ce:	687b      	ldr	r3, [r7, #4]
 80083d0:	681b      	ldr	r3, [r3, #0]
 80083d2:	4a2f      	ldr	r2, [pc, #188]	@ (8008490 <DMA_CalcDMAMUXChannelBaseAndMask+0x10c>)
 80083d4:	4293      	cmp	r3, r2
 80083d6:	d004      	beq.n	80083e2 <DMA_CalcDMAMUXChannelBaseAndMask+0x5e>
 80083d8:	687b      	ldr	r3, [r7, #4]
 80083da:	681b      	ldr	r3, [r3, #0]
 80083dc:	4a2d      	ldr	r2, [pc, #180]	@ (8008494 <DMA_CalcDMAMUXChannelBaseAndMask+0x110>)
 80083de:	4293      	cmp	r3, r2
 80083e0:	d101      	bne.n	80083e6 <DMA_CalcDMAMUXChannelBaseAndMask+0x62>
 80083e2:	2301      	movs	r3, #1
 80083e4:	e000      	b.n	80083e8 <DMA_CalcDMAMUXChannelBaseAndMask+0x64>
 80083e6:	2300      	movs	r3, #0
 80083e8:	2b00      	cmp	r3, #0
 80083ea:	d01a      	beq.n	8008422 <DMA_CalcDMAMUXChannelBaseAndMask+0x9e>
  {
    /* BDMA Channels are connected to DMAMUX2 channels */
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 8U) / 20U;
 80083ec:	687b      	ldr	r3, [r7, #4]
 80083ee:	681b      	ldr	r3, [r3, #0]
 80083f0:	b2db      	uxtb	r3, r3
 80083f2:	3b08      	subs	r3, #8
 80083f4:	4a28      	ldr	r2, [pc, #160]	@ (8008498 <DMA_CalcDMAMUXChannelBaseAndMask+0x114>)
 80083f6:	fba2 2303 	umull	r2, r3, r2, r3
 80083fa:	091b      	lsrs	r3, r3, #4
 80083fc:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_Channel0) + (stream_number * 4U)));
 80083fe:	68fa      	ldr	r2, [r7, #12]
 8008400:	4b26      	ldr	r3, [pc, #152]	@ (800849c <DMA_CalcDMAMUXChannelBaseAndMask+0x118>)
 8008402:	4413      	add	r3, r2
 8008404:	009b      	lsls	r3, r3, #2
 8008406:	461a      	mov	r2, r3
 8008408:	687b      	ldr	r3, [r7, #4]
 800840a:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX2_ChannelStatus;
 800840c:	687b      	ldr	r3, [r7, #4]
 800840e:	4a24      	ldr	r2, [pc, #144]	@ (80084a0 <DMA_CalcDMAMUXChannelBaseAndMask+0x11c>)
 8008410:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 8008412:	68fb      	ldr	r3, [r7, #12]
 8008414:	f003 031f 	and.w	r3, r3, #31
 8008418:	2201      	movs	r2, #1
 800841a:	409a      	lsls	r2, r3
 800841c:	687b      	ldr	r3, [r7, #4]
 800841e:	669a      	str	r2, [r3, #104]	@ 0x68
    }
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
  }
}
 8008420:	e024      	b.n	800846c <DMA_CalcDMAMUXChannelBaseAndMask+0xe8>
    stream_number = (((uint32_t)((uint32_t*)hdma->Instance) & 0xFFU) - 16U) / 24U;
 8008422:	687b      	ldr	r3, [r7, #4]
 8008424:	681b      	ldr	r3, [r3, #0]
 8008426:	b2db      	uxtb	r3, r3
 8008428:	3b10      	subs	r3, #16
 800842a:	4a1e      	ldr	r2, [pc, #120]	@ (80084a4 <DMA_CalcDMAMUXChannelBaseAndMask+0x120>)
 800842c:	fba2 2303 	umull	r2, r3, r2, r3
 8008430:	091b      	lsrs	r3, r3, #4
 8008432:	60fb      	str	r3, [r7, #12]
    if((stream_baseaddress <= ((uint32_t)DMA2_Stream7) ) && \
 8008434:	68bb      	ldr	r3, [r7, #8]
 8008436:	4a1c      	ldr	r2, [pc, #112]	@ (80084a8 <DMA_CalcDMAMUXChannelBaseAndMask+0x124>)
 8008438:	4293      	cmp	r3, r2
 800843a:	d806      	bhi.n	800844a <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
 800843c:	68bb      	ldr	r3, [r7, #8]
 800843e:	4a1b      	ldr	r2, [pc, #108]	@ (80084ac <DMA_CalcDMAMUXChannelBaseAndMask+0x128>)
 8008440:	4293      	cmp	r3, r2
 8008442:	d902      	bls.n	800844a <DMA_CalcDMAMUXChannelBaseAndMask+0xc6>
      stream_number += 8U;
 8008444:	68fb      	ldr	r3, [r7, #12]
 8008446:	3308      	adds	r3, #8
 8008448:	60fb      	str	r3, [r7, #12]
    hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_Channel0) + (stream_number * 4U)));
 800844a:	68fa      	ldr	r2, [r7, #12]
 800844c:	4b18      	ldr	r3, [pc, #96]	@ (80084b0 <DMA_CalcDMAMUXChannelBaseAndMask+0x12c>)
 800844e:	4413      	add	r3, r2
 8008450:	009b      	lsls	r3, r3, #2
 8008452:	461a      	mov	r2, r3
 8008454:	687b      	ldr	r3, [r7, #4]
 8008456:	661a      	str	r2, [r3, #96]	@ 0x60
    hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
 8008458:	687b      	ldr	r3, [r7, #4]
 800845a:	4a16      	ldr	r2, [pc, #88]	@ (80084b4 <DMA_CalcDMAMUXChannelBaseAndMask+0x130>)
 800845c:	665a      	str	r2, [r3, #100]	@ 0x64
    hdma->DMAmuxChannelStatusMask = 1UL << (stream_number & 0x1FU);
 800845e:	68fb      	ldr	r3, [r7, #12]
 8008460:	f003 031f 	and.w	r3, r3, #31
 8008464:	2201      	movs	r2, #1
 8008466:	409a      	lsls	r2, r3
 8008468:	687b      	ldr	r3, [r7, #4]
 800846a:	669a      	str	r2, [r3, #104]	@ 0x68
}
 800846c:	bf00      	nop
 800846e:	3714      	adds	r7, #20
 8008470:	46bd      	mov	sp, r7
 8008472:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008476:	4770      	bx	lr
 8008478:	58025408 	.word	0x58025408
 800847c:	5802541c 	.word	0x5802541c
 8008480:	58025430 	.word	0x58025430
 8008484:	58025444 	.word	0x58025444
 8008488:	58025458 	.word	0x58025458
 800848c:	5802546c 	.word	0x5802546c
 8008490:	58025480 	.word	0x58025480
 8008494:	58025494 	.word	0x58025494
 8008498:	cccccccd 	.word	0xcccccccd
 800849c:	16009600 	.word	0x16009600
 80084a0:	58025880 	.word	0x58025880
 80084a4:	aaaaaaab 	.word	0xaaaaaaab
 80084a8:	400204b8 	.word	0x400204b8
 80084ac:	4002040f 	.word	0x4002040f
 80084b0:	10008200 	.word	0x10008200
 80084b4:	40020880 	.word	0x40020880

080084b8 <DMA_CalcDMAMUXRequestGenBaseAndMask>:
  * @param  hdma:       pointer to a DMA_HandleTypeDef structure that contains
  *                     the configuration information for the specified DMA Stream.
  * @retval HAL status
  */
static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
{
 80084b8:	b480      	push	{r7}
 80084ba:	b085      	sub	sp, #20
 80084bc:	af00      	add	r7, sp, #0
 80084be:	6078      	str	r0, [r7, #4]
  uint32_t request =  hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;
 80084c0:	687b      	ldr	r3, [r7, #4]
 80084c2:	685b      	ldr	r3, [r3, #4]
 80084c4:	b2db      	uxtb	r3, r3
 80084c6:	60fb      	str	r3, [r7, #12]

  if((request >= DMA_REQUEST_GENERATOR0) && (request <= DMA_REQUEST_GENERATOR7))
 80084c8:	68fb      	ldr	r3, [r7, #12]
 80084ca:	2b00      	cmp	r3, #0
 80084cc:	d04a      	beq.n	8008564 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
 80084ce:	68fb      	ldr	r3, [r7, #12]
 80084d0:	2b08      	cmp	r3, #8
 80084d2:	d847      	bhi.n	8008564 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xac>
  {
    if(IS_BDMA_CHANNEL_DMAMUX_INSTANCE(hdma->Instance) != 0U)
 80084d4:	687b      	ldr	r3, [r7, #4]
 80084d6:	681b      	ldr	r3, [r3, #0]
 80084d8:	4a25      	ldr	r2, [pc, #148]	@ (8008570 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xb8>)
 80084da:	4293      	cmp	r3, r2
 80084dc:	d022      	beq.n	8008524 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 80084de:	687b      	ldr	r3, [r7, #4]
 80084e0:	681b      	ldr	r3, [r3, #0]
 80084e2:	4a24      	ldr	r2, [pc, #144]	@ (8008574 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xbc>)
 80084e4:	4293      	cmp	r3, r2
 80084e6:	d01d      	beq.n	8008524 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 80084e8:	687b      	ldr	r3, [r7, #4]
 80084ea:	681b      	ldr	r3, [r3, #0]
 80084ec:	4a22      	ldr	r2, [pc, #136]	@ (8008578 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc0>)
 80084ee:	4293      	cmp	r3, r2
 80084f0:	d018      	beq.n	8008524 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 80084f2:	687b      	ldr	r3, [r7, #4]
 80084f4:	681b      	ldr	r3, [r3, #0]
 80084f6:	4a21      	ldr	r2, [pc, #132]	@ (800857c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc4>)
 80084f8:	4293      	cmp	r3, r2
 80084fa:	d013      	beq.n	8008524 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 80084fc:	687b      	ldr	r3, [r7, #4]
 80084fe:	681b      	ldr	r3, [r3, #0]
 8008500:	4a1f      	ldr	r2, [pc, #124]	@ (8008580 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xc8>)
 8008502:	4293      	cmp	r3, r2
 8008504:	d00e      	beq.n	8008524 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8008506:	687b      	ldr	r3, [r7, #4]
 8008508:	681b      	ldr	r3, [r3, #0]
 800850a:	4a1e      	ldr	r2, [pc, #120]	@ (8008584 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xcc>)
 800850c:	4293      	cmp	r3, r2
 800850e:	d009      	beq.n	8008524 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 8008510:	687b      	ldr	r3, [r7, #4]
 8008512:	681b      	ldr	r3, [r3, #0]
 8008514:	4a1c      	ldr	r2, [pc, #112]	@ (8008588 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd0>)
 8008516:	4293      	cmp	r3, r2
 8008518:	d004      	beq.n	8008524 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x6c>
 800851a:	687b      	ldr	r3, [r7, #4]
 800851c:	681b      	ldr	r3, [r3, #0]
 800851e:	4a1b      	ldr	r2, [pc, #108]	@ (800858c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd4>)
 8008520:	4293      	cmp	r3, r2
 8008522:	d101      	bne.n	8008528 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x70>
 8008524:	2301      	movs	r3, #1
 8008526:	e000      	b.n	800852a <DMA_CalcDMAMUXRequestGenBaseAndMask+0x72>
 8008528:	2300      	movs	r3, #0
 800852a:	2b00      	cmp	r3, #0
 800852c:	d00a      	beq.n	8008544 <DMA_CalcDMAMUXRequestGenBaseAndMask+0x8c>
    {
      /* BDMA Channels are connected to DMAMUX2 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX2_RequestGenerator0) + ((request - 1U) * 4U)));
 800852e:	68fa      	ldr	r2, [r7, #12]
 8008530:	4b17      	ldr	r3, [pc, #92]	@ (8008590 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xd8>)
 8008532:	4413      	add	r3, r2
 8008534:	009b      	lsls	r3, r3, #2
 8008536:	461a      	mov	r2, r3
 8008538:	687b      	ldr	r3, [r7, #4]
 800853a:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX2_RequestGenStatus;
 800853c:	687b      	ldr	r3, [r7, #4]
 800853e:	4a15      	ldr	r2, [pc, #84]	@ (8008594 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xdc>)
 8008540:	671a      	str	r2, [r3, #112]	@ 0x70
 8008542:	e009      	b.n	8008558 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xa0>
    }
    else
    {
      /* DMA1 and DMA2 Streams use DMAMUX1 request generator blocks */
      hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGenerator0) + ((request - 1U) * 4U)));
 8008544:	68fa      	ldr	r2, [r7, #12]
 8008546:	4b14      	ldr	r3, [pc, #80]	@ (8008598 <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe0>)
 8008548:	4413      	add	r3, r2
 800854a:	009b      	lsls	r3, r3, #2
 800854c:	461a      	mov	r2, r3
 800854e:	687b      	ldr	r3, [r7, #4]
 8008550:	66da      	str	r2, [r3, #108]	@ 0x6c

      hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;
 8008552:	687b      	ldr	r3, [r7, #4]
 8008554:	4a11      	ldr	r2, [pc, #68]	@ (800859c <DMA_CalcDMAMUXRequestGenBaseAndMask+0xe4>)
 8008556:	671a      	str	r2, [r3, #112]	@ 0x70
    }

    hdma->DMAmuxRequestGenStatusMask = 1UL << (request - 1U);
 8008558:	68fb      	ldr	r3, [r7, #12]
 800855a:	3b01      	subs	r3, #1
 800855c:	2201      	movs	r2, #1
 800855e:	409a      	lsls	r2, r3
 8008560:	687b      	ldr	r3, [r7, #4]
 8008562:	675a      	str	r2, [r3, #116]	@ 0x74
  }
}
 8008564:	bf00      	nop
 8008566:	3714      	adds	r7, #20
 8008568:	46bd      	mov	sp, r7
 800856a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800856e:	4770      	bx	lr
 8008570:	58025408 	.word	0x58025408
 8008574:	5802541c 	.word	0x5802541c
 8008578:	58025430 	.word	0x58025430
 800857c:	58025444 	.word	0x58025444
 8008580:	58025458 	.word	0x58025458
 8008584:	5802546c 	.word	0x5802546c
 8008588:	58025480 	.word	0x58025480
 800858c:	58025494 	.word	0x58025494
 8008590:	1600963f 	.word	0x1600963f
 8008594:	58025940 	.word	0x58025940
 8008598:	1000823f 	.word	0x1000823f
 800859c:	40020940 	.word	0x40020940

080085a0 <HAL_ETH_Init>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
{
 80085a0:	b580      	push	{r7, lr}
 80085a2:	b084      	sub	sp, #16
 80085a4:	af00      	add	r7, sp, #0
 80085a6:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  if (heth == NULL)
 80085a8:	687b      	ldr	r3, [r7, #4]
 80085aa:	2b00      	cmp	r3, #0
 80085ac:	d101      	bne.n	80085b2 <HAL_ETH_Init+0x12>
  {
    return HAL_ERROR;
 80085ae:	2301      	movs	r3, #1
 80085b0:	e0e3      	b.n	800877a <HAL_ETH_Init+0x1da>
  }
  if (heth->gState == HAL_ETH_STATE_RESET)
 80085b2:	687b      	ldr	r3, [r7, #4]
 80085b4:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 80085b8:	2b00      	cmp	r3, #0
 80085ba:	d106      	bne.n	80085ca <HAL_ETH_Init+0x2a>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 80085bc:	687b      	ldr	r3, [r7, #4]
 80085be:	2223      	movs	r2, #35	@ 0x23
 80085c0:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    heth->MspInitCallback(heth);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC. */
    HAL_ETH_MspInit(heth);
 80085c4:	6878      	ldr	r0, [r7, #4]
 80085c6:	f008 fb89 	bl	8010cdc <HAL_ETH_MspInit>

#endif /* (USE_HAL_ETH_REGISTER_CALLBACKS) */
  }

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 80085ca:	4b6e      	ldr	r3, [pc, #440]	@ (8008784 <HAL_ETH_Init+0x1e4>)
 80085cc:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 80085d0:	4a6c      	ldr	r2, [pc, #432]	@ (8008784 <HAL_ETH_Init+0x1e4>)
 80085d2:	f043 0302 	orr.w	r3, r3, #2
 80085d6:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 80085da:	4b6a      	ldr	r3, [pc, #424]	@ (8008784 <HAL_ETH_Init+0x1e4>)
 80085dc:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 80085e0:	f003 0302 	and.w	r3, r3, #2
 80085e4:	60bb      	str	r3, [r7, #8]
 80085e6:	68bb      	ldr	r3, [r7, #8]

  if (heth->Init.MediaInterface == HAL_ETH_MII_MODE)
 80085e8:	687b      	ldr	r3, [r7, #4]
 80085ea:	7a1b      	ldrb	r3, [r3, #8]
 80085ec:	2b00      	cmp	r3, #0
 80085ee:	d103      	bne.n	80085f8 <HAL_ETH_Init+0x58>
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_MII);
 80085f0:	2000      	movs	r0, #0
 80085f2:	f7fd fa3d 	bl	8005a70 <HAL_SYSCFG_ETHInterfaceSelect>
 80085f6:	e003      	b.n	8008600 <HAL_ETH_Init+0x60>
  }
  else
  {
    HAL_SYSCFG_ETHInterfaceSelect(SYSCFG_ETH_RMII);
 80085f8:	f44f 0000 	mov.w	r0, #8388608	@ 0x800000
 80085fc:	f7fd fa38 	bl	8005a70 <HAL_SYSCFG_ETHInterfaceSelect>
  }

  /* Dummy read to sync with ETH */
  (void)SYSCFG->PMCR;
 8008600:	4b61      	ldr	r3, [pc, #388]	@ (8008788 <HAL_ETH_Init+0x1e8>)
 8008602:	685b      	ldr	r3, [r3, #4]

  /* Ethernet Software reset */
  /* Set the SWR bit: resets all MAC subsystem internal registers and logic */
  /* After reset all the registers holds their respective reset values */
  SET_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR);
 8008604:	687b      	ldr	r3, [r7, #4]
 8008606:	681b      	ldr	r3, [r3, #0]
 8008608:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800860c:	681b      	ldr	r3, [r3, #0]
 800860e:	687a      	ldr	r2, [r7, #4]
 8008610:	6812      	ldr	r2, [r2, #0]
 8008612:	f043 0301 	orr.w	r3, r3, #1
 8008616:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800861a:	6013      	str	r3, [r2, #0]

  /* Get tick */
  tickstart = HAL_GetTick();
 800861c:	f7fd f9ec 	bl	80059f8 <HAL_GetTick>
 8008620:	60f8      	str	r0, [r7, #12]

  /* Wait for software reset */
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 8008622:	e011      	b.n	8008648 <HAL_ETH_Init+0xa8>
  {
    if (((HAL_GetTick() - tickstart) > ETH_SWRESET_TIMEOUT))
 8008624:	f7fd f9e8 	bl	80059f8 <HAL_GetTick>
 8008628:	4602      	mov	r2, r0
 800862a:	68fb      	ldr	r3, [r7, #12]
 800862c:	1ad3      	subs	r3, r2, r3
 800862e:	f5b3 7ffa 	cmp.w	r3, #500	@ 0x1f4
 8008632:	d909      	bls.n	8008648 <HAL_ETH_Init+0xa8>
    {
      /* Set Error Code */
      heth->ErrorCode = HAL_ETH_ERROR_TIMEOUT;
 8008634:	687b      	ldr	r3, [r7, #4]
 8008636:	2204      	movs	r2, #4
 8008638:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      /* Set State as Error */
      heth->gState = HAL_ETH_STATE_ERROR;
 800863c:	687b      	ldr	r3, [r7, #4]
 800863e:	22e0      	movs	r2, #224	@ 0xe0
 8008640:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
      /* Return Error */
      return HAL_ERROR;
 8008644:	2301      	movs	r3, #1
 8008646:	e098      	b.n	800877a <HAL_ETH_Init+0x1da>
  while (READ_BIT(heth->Instance->DMAMR, ETH_DMAMR_SWR) > 0U)
 8008648:	687b      	ldr	r3, [r7, #4]
 800864a:	681b      	ldr	r3, [r3, #0]
 800864c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008650:	681b      	ldr	r3, [r3, #0]
 8008652:	f003 0301 	and.w	r3, r3, #1
 8008656:	2b00      	cmp	r3, #0
 8008658:	d1e4      	bne.n	8008624 <HAL_ETH_Init+0x84>
    }
  }

  /*------------------ MDIO CSR Clock Range Configuration --------------------*/
  HAL_ETH_SetMDIOClockRange(heth);
 800865a:	6878      	ldr	r0, [r7, #4]
 800865c:	f000 ff1c 	bl	8009498 <HAL_ETH_SetMDIOClockRange>

  /*------------------ MAC LPI 1US Tic Counter Configuration --------------------*/
  WRITE_REG(heth->Instance->MAC1USTCR, (((uint32_t)HAL_RCC_GetHCLKFreq() / ETH_MAC_US_TICK) - 1U));
 8008660:	f003 f80e 	bl	800b680 <HAL_RCC_GetHCLKFreq>
 8008664:	4603      	mov	r3, r0
 8008666:	4a49      	ldr	r2, [pc, #292]	@ (800878c <HAL_ETH_Init+0x1ec>)
 8008668:	fba2 2303 	umull	r2, r3, r2, r3
 800866c:	0c9a      	lsrs	r2, r3, #18
 800866e:	687b      	ldr	r3, [r7, #4]
 8008670:	681b      	ldr	r3, [r3, #0]
 8008672:	3a01      	subs	r2, #1
 8008674:	f8c3 20dc 	str.w	r2, [r3, #220]	@ 0xdc

  /*------------------ MAC, MTL and DMA default Configuration ----------------*/
  ETH_MACDMAConfig(heth);
 8008678:	6878      	ldr	r0, [r7, #4]
 800867a:	f001 f90d 	bl	8009898 <ETH_MACDMAConfig>

  /* SET DSL to 64 bit */
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_DSL, ETH_DMACCR_DSL_64BIT);
 800867e:	687b      	ldr	r3, [r7, #4]
 8008680:	681b      	ldr	r3, [r3, #0]
 8008682:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008686:	f8d3 3100 	ldr.w	r3, [r3, #256]	@ 0x100
 800868a:	f423 13e0 	bic.w	r3, r3, #1835008	@ 0x1c0000
 800868e:	687a      	ldr	r2, [r7, #4]
 8008690:	6812      	ldr	r2, [r2, #0]
 8008692:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 8008696:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800869a:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /* Set Receive Buffers Length (must be a multiple of 4) */
  if ((heth->Init.RxBuffLen % 0x4U) != 0x0U)
 800869e:	687b      	ldr	r3, [r7, #4]
 80086a0:	695b      	ldr	r3, [r3, #20]
 80086a2:	f003 0303 	and.w	r3, r3, #3
 80086a6:	2b00      	cmp	r3, #0
 80086a8:	d009      	beq.n	80086be <HAL_ETH_Init+0x11e>
  {
    /* Set Error Code */
    heth->ErrorCode = HAL_ETH_ERROR_PARAM;
 80086aa:	687b      	ldr	r3, [r7, #4]
 80086ac:	2201      	movs	r2, #1
 80086ae:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* Set State as Error */
    heth->gState = HAL_ETH_STATE_ERROR;
 80086b2:	687b      	ldr	r3, [r7, #4]
 80086b4:	22e0      	movs	r2, #224	@ 0xe0
 80086b6:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Return Error */
    return HAL_ERROR;
 80086ba:	2301      	movs	r3, #1
 80086bc:	e05d      	b.n	800877a <HAL_ETH_Init+0x1da>
  }
  else
  {
    MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_RBSZ, ((heth->Init.RxBuffLen) << 1));
 80086be:	687b      	ldr	r3, [r7, #4]
 80086c0:	681b      	ldr	r3, [r3, #0]
 80086c2:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80086c6:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 80086ca:	4b31      	ldr	r3, [pc, #196]	@ (8008790 <HAL_ETH_Init+0x1f0>)
 80086cc:	4013      	ands	r3, r2
 80086ce:	687a      	ldr	r2, [r7, #4]
 80086d0:	6952      	ldr	r2, [r2, #20]
 80086d2:	0051      	lsls	r1, r2, #1
 80086d4:	687a      	ldr	r2, [r7, #4]
 80086d6:	6812      	ldr	r2, [r2, #0]
 80086d8:	430b      	orrs	r3, r1
 80086da:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80086de:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
  }

  /*------------------ DMA Tx Descriptors Configuration ----------------------*/
  ETH_DMATxDescListInit(heth);
 80086e2:	6878      	ldr	r0, [r7, #4]
 80086e4:	f001 f975 	bl	80099d2 <ETH_DMATxDescListInit>

  /*------------------ DMA Rx Descriptors Configuration ----------------------*/
  ETH_DMARxDescListInit(heth);
 80086e8:	6878      	ldr	r0, [r7, #4]
 80086ea:	f001 f9bb 	bl	8009a64 <ETH_DMARxDescListInit>

  /*--------------------- ETHERNET MAC Address Configuration ------------------*/
  /* Set MAC addr bits 32 to 47 */
  heth->Instance->MACA0HR = (((uint32_t)(heth->Init.MACAddr[5]) << 8) | (uint32_t)heth->Init.MACAddr[4]);
 80086ee:	687b      	ldr	r3, [r7, #4]
 80086f0:	685b      	ldr	r3, [r3, #4]
 80086f2:	3305      	adds	r3, #5
 80086f4:	781b      	ldrb	r3, [r3, #0]
 80086f6:	021a      	lsls	r2, r3, #8
 80086f8:	687b      	ldr	r3, [r7, #4]
 80086fa:	685b      	ldr	r3, [r3, #4]
 80086fc:	3304      	adds	r3, #4
 80086fe:	781b      	ldrb	r3, [r3, #0]
 8008700:	4619      	mov	r1, r3
 8008702:	687b      	ldr	r3, [r7, #4]
 8008704:	681b      	ldr	r3, [r3, #0]
 8008706:	430a      	orrs	r2, r1
 8008708:	f8c3 2300 	str.w	r2, [r3, #768]	@ 0x300
  /* Set MAC addr bits 0 to 31 */
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 800870c:	687b      	ldr	r3, [r7, #4]
 800870e:	685b      	ldr	r3, [r3, #4]
 8008710:	3303      	adds	r3, #3
 8008712:	781b      	ldrb	r3, [r3, #0]
 8008714:	061a      	lsls	r2, r3, #24
 8008716:	687b      	ldr	r3, [r7, #4]
 8008718:	685b      	ldr	r3, [r3, #4]
 800871a:	3302      	adds	r3, #2
 800871c:	781b      	ldrb	r3, [r3, #0]
 800871e:	041b      	lsls	r3, r3, #16
 8008720:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 8008722:	687b      	ldr	r3, [r7, #4]
 8008724:	685b      	ldr	r3, [r3, #4]
 8008726:	3301      	adds	r3, #1
 8008728:	781b      	ldrb	r3, [r3, #0]
 800872a:	021b      	lsls	r3, r3, #8
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 800872c:	431a      	orrs	r2, r3
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 800872e:	687b      	ldr	r3, [r7, #4]
 8008730:	685b      	ldr	r3, [r3, #4]
 8008732:	781b      	ldrb	r3, [r3, #0]
 8008734:	4619      	mov	r1, r3
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 8008736:	687b      	ldr	r3, [r7, #4]
 8008738:	681b      	ldr	r3, [r3, #0]
                             ((uint32_t)(heth->Init.MACAddr[1]) << 8) | (uint32_t)heth->Init.MACAddr[0]);
 800873a:	430a      	orrs	r2, r1
  heth->Instance->MACA0LR = (((uint32_t)(heth->Init.MACAddr[3]) << 24) | ((uint32_t)(heth->Init.MACAddr[2]) << 16) |
 800873c:	f8c3 2304 	str.w	r2, [r3, #772]	@ 0x304

  /* Disable Rx MMC Interrupts */
  SET_BIT(heth->Instance->MMCRIMR, ETH_MMCRIMR_RXLPITRCIM | ETH_MMCRIMR_RXLPIUSCIM | \
 8008740:	687b      	ldr	r3, [r7, #4]
 8008742:	681b      	ldr	r3, [r3, #0]
 8008744:	f8d3 170c 	ldr.w	r1, [r3, #1804]	@ 0x70c
 8008748:	687b      	ldr	r3, [r7, #4]
 800874a:	681a      	ldr	r2, [r3, #0]
 800874c:	4b11      	ldr	r3, [pc, #68]	@ (8008794 <HAL_ETH_Init+0x1f4>)
 800874e:	430b      	orrs	r3, r1
 8008750:	f8c2 370c 	str.w	r3, [r2, #1804]	@ 0x70c
          ETH_MMCRIMR_RXUCGPIM | ETH_MMCRIMR_RXALGNERPIM | ETH_MMCRIMR_RXCRCERPIM);

  /* Disable Tx MMC Interrupts */
  SET_BIT(heth->Instance->MMCTIMR, ETH_MMCTIMR_TXLPITRCIM | ETH_MMCTIMR_TXLPIUSCIM | \
 8008754:	687b      	ldr	r3, [r7, #4]
 8008756:	681b      	ldr	r3, [r3, #0]
 8008758:	f8d3 1710 	ldr.w	r1, [r3, #1808]	@ 0x710
 800875c:	687b      	ldr	r3, [r7, #4]
 800875e:	681a      	ldr	r2, [r3, #0]
 8008760:	4b0d      	ldr	r3, [pc, #52]	@ (8008798 <HAL_ETH_Init+0x1f8>)
 8008762:	430b      	orrs	r3, r1
 8008764:	f8c2 3710 	str.w	r3, [r2, #1808]	@ 0x710
          ETH_MMCTIMR_TXGPKTIM | ETH_MMCTIMR_TXMCOLGPIM | ETH_MMCTIMR_TXSCOLGPIM);

  heth->ErrorCode = HAL_ETH_ERROR_NONE;
 8008768:	687b      	ldr	r3, [r7, #4]
 800876a:	2200      	movs	r2, #0
 800876c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  heth->gState = HAL_ETH_STATE_READY;
 8008770:	687b      	ldr	r3, [r7, #4]
 8008772:	2210      	movs	r2, #16
 8008774:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 8008778:	2300      	movs	r3, #0
}
 800877a:	4618      	mov	r0, r3
 800877c:	3710      	adds	r7, #16
 800877e:	46bd      	mov	sp, r7
 8008780:	bd80      	pop	{r7, pc}
 8008782:	bf00      	nop
 8008784:	58024400 	.word	0x58024400
 8008788:	58000400 	.word	0x58000400
 800878c:	431bde83 	.word	0x431bde83
 8008790:	ffff8001 	.word	0xffff8001
 8008794:	0c020060 	.word	0x0c020060
 8008798:	0c20c000 	.word	0x0c20c000

0800879c <HAL_ETH_Start_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Start_IT(ETH_HandleTypeDef *heth)
{
 800879c:	b580      	push	{r7, lr}
 800879e:	b082      	sub	sp, #8
 80087a0:	af00      	add	r7, sp, #0
 80087a2:	6078      	str	r0, [r7, #4]
  if (heth->gState == HAL_ETH_STATE_READY)
 80087a4:	687b      	ldr	r3, [r7, #4]
 80087a6:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 80087aa:	2b10      	cmp	r3, #16
 80087ac:	d165      	bne.n	800887a <HAL_ETH_Start_IT+0xde>
  {
    heth->gState = HAL_ETH_STATE_BUSY;
 80087ae:	687b      	ldr	r3, [r7, #4]
 80087b0:	2223      	movs	r2, #35	@ 0x23
 80087b2:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* save IT mode to ETH Handle */
    heth->RxDescList.ItMode = 1U;
 80087b6:	687b      	ldr	r3, [r7, #4]
 80087b8:	2201      	movs	r2, #1
 80087ba:	659a      	str	r2, [r3, #88]	@ 0x58

    /* Set number of descriptors to build */
    heth->RxDescList.RxBuildDescCnt = ETH_RX_DESC_CNT;
 80087bc:	687b      	ldr	r3, [r7, #4]
 80087be:	2204      	movs	r2, #4
 80087c0:	66da      	str	r2, [r3, #108]	@ 0x6c

    /* Build all descriptors */
    ETH_UpdateDescriptor(heth);
 80087c2:	6878      	ldr	r0, [r7, #4]
 80087c4:	f000 f9e4 	bl	8008b90 <ETH_UpdateDescriptor>

    /* Enable the DMA transmission */
    SET_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 80087c8:	687b      	ldr	r3, [r7, #4]
 80087ca:	681b      	ldr	r3, [r3, #0]
 80087cc:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80087d0:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 80087d4:	687a      	ldr	r2, [r7, #4]
 80087d6:	6812      	ldr	r2, [r2, #0]
 80087d8:	f043 0301 	orr.w	r3, r3, #1
 80087dc:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80087e0:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Enable the DMA reception */
    SET_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 80087e4:	687b      	ldr	r3, [r7, #4]
 80087e6:	681b      	ldr	r3, [r3, #0]
 80087e8:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80087ec:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 80087f0:	687a      	ldr	r2, [r7, #4]
 80087f2:	6812      	ldr	r2, [r2, #0]
 80087f4:	f043 0301 	orr.w	r3, r3, #1
 80087f8:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80087fc:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Clear Tx and Rx process stopped flags */
    heth->Instance->DMACSR |= (ETH_DMACSR_TPS | ETH_DMACSR_RPS);
 8008800:	687b      	ldr	r3, [r7, #4]
 8008802:	681b      	ldr	r3, [r3, #0]
 8008804:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008808:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 800880c:	687a      	ldr	r2, [r7, #4]
 800880e:	6812      	ldr	r2, [r2, #0]
 8008810:	f443 7381 	orr.w	r3, r3, #258	@ 0x102
 8008814:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008818:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 800881c:	687b      	ldr	r3, [r7, #4]
 800881e:	681b      	ldr	r3, [r3, #0]
 8008820:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 8008824:	687b      	ldr	r3, [r7, #4]
 8008826:	681b      	ldr	r3, [r3, #0]
 8008828:	f042 0201 	orr.w	r2, r2, #1
 800882c:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Enable the MAC transmission */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 8008830:	687b      	ldr	r3, [r7, #4]
 8008832:	681b      	ldr	r3, [r3, #0]
 8008834:	681a      	ldr	r2, [r3, #0]
 8008836:	687b      	ldr	r3, [r7, #4]
 8008838:	681b      	ldr	r3, [r3, #0]
 800883a:	f042 0202 	orr.w	r2, r2, #2
 800883e:	601a      	str	r2, [r3, #0]

    /* Enable the MAC reception */
    SET_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 8008840:	687b      	ldr	r3, [r7, #4]
 8008842:	681b      	ldr	r3, [r3, #0]
 8008844:	681a      	ldr	r2, [r3, #0]
 8008846:	687b      	ldr	r3, [r7, #4]
 8008848:	681b      	ldr	r3, [r3, #0]
 800884a:	f042 0201 	orr.w	r2, r2, #1
 800884e:	601a      	str	r2, [r3, #0]
    /* Enable ETH DMA interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_ENABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 8008850:	687b      	ldr	r3, [r7, #4]
 8008852:	681b      	ldr	r3, [r3, #0]
 8008854:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008858:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 800885c:	687b      	ldr	r3, [r7, #4]
 800885e:	681a      	ldr	r2, [r3, #0]
 8008860:	f24d 03c1 	movw	r3, #53441	@ 0xd0c1
 8008864:	430b      	orrs	r3, r1
 8008866:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 800886a:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                   ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    heth->gState = HAL_ETH_STATE_STARTED;
 800886e:	687b      	ldr	r3, [r7, #4]
 8008870:	2223      	movs	r2, #35	@ 0x23
 8008872:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    return HAL_OK;
 8008876:	2300      	movs	r3, #0
 8008878:	e000      	b.n	800887c <HAL_ETH_Start_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 800887a:	2301      	movs	r3, #1
  }
}
 800887c:	4618      	mov	r0, r3
 800887e:	3708      	adds	r7, #8
 8008880:	46bd      	mov	sp, r7
 8008882:	bd80      	pop	{r7, pc}

08008884 <HAL_ETH_Stop_IT>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Stop_IT(ETH_HandleTypeDef *heth)
{
 8008884:	b480      	push	{r7}
 8008886:	b085      	sub	sp, #20
 8008888:	af00      	add	r7, sp, #0
 800888a:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t descindex;

  if (heth->gState == HAL_ETH_STATE_STARTED)
 800888c:	687b      	ldr	r3, [r7, #4]
 800888e:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8008892:	2b23      	cmp	r3, #35	@ 0x23
 8008894:	d165      	bne.n	8008962 <HAL_ETH_Stop_IT+0xde>
  {
    /* Set the ETH peripheral state to BUSY */
    heth->gState = HAL_ETH_STATE_BUSY;
 8008896:	687b      	ldr	r3, [r7, #4]
 8008898:	2223      	movs	r2, #35	@ 0x23
 800889a:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
    /* Disable interrupts:
    - Tx complete interrupt
    - Rx complete interrupt
    - Fatal bus interrupt
    */
    __HAL_ETH_DMA_DISABLE_IT(heth, (ETH_DMACIER_NIE | ETH_DMACIER_RIE | ETH_DMACIER_TIE  |
 800889e:	687b      	ldr	r3, [r7, #4]
 80088a0:	681b      	ldr	r3, [r3, #0]
 80088a2:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80088a6:	f8d3 1134 	ldr.w	r1, [r3, #308]	@ 0x134
 80088aa:	687b      	ldr	r3, [r7, #4]
 80088ac:	681a      	ldr	r2, [r3, #0]
 80088ae:	4b30      	ldr	r3, [pc, #192]	@ (8008970 <HAL_ETH_Stop_IT+0xec>)
 80088b0:	400b      	ands	r3, r1
 80088b2:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80088b6:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134
                                    ETH_DMACIER_FBEE | ETH_DMACIER_AIE | ETH_DMACIER_RBUE));

    /* Disable the DMA transmission */
    CLEAR_BIT(heth->Instance->DMACTCR, ETH_DMACTCR_ST);
 80088ba:	687b      	ldr	r3, [r7, #4]
 80088bc:	681b      	ldr	r3, [r3, #0]
 80088be:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80088c2:	f8d3 3104 	ldr.w	r3, [r3, #260]	@ 0x104
 80088c6:	687a      	ldr	r2, [r7, #4]
 80088c8:	6812      	ldr	r2, [r2, #0]
 80088ca:	f023 0301 	bic.w	r3, r3, #1
 80088ce:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80088d2:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

    /* Disable the DMA reception */
    CLEAR_BIT(heth->Instance->DMACRCR, ETH_DMACRCR_SR);
 80088d6:	687b      	ldr	r3, [r7, #4]
 80088d8:	681b      	ldr	r3, [r3, #0]
 80088da:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80088de:	f8d3 3108 	ldr.w	r3, [r3, #264]	@ 0x108
 80088e2:	687a      	ldr	r2, [r7, #4]
 80088e4:	6812      	ldr	r2, [r2, #0]
 80088e6:	f023 0301 	bic.w	r3, r3, #1
 80088ea:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80088ee:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108

    /* Disable the MAC reception */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_RE);
 80088f2:	687b      	ldr	r3, [r7, #4]
 80088f4:	681b      	ldr	r3, [r3, #0]
 80088f6:	681a      	ldr	r2, [r3, #0]
 80088f8:	687b      	ldr	r3, [r7, #4]
 80088fa:	681b      	ldr	r3, [r3, #0]
 80088fc:	f022 0201 	bic.w	r2, r2, #1
 8008900:	601a      	str	r2, [r3, #0]

    /* Set the Flush Transmit FIFO bit */
    SET_BIT(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_FTQ);
 8008902:	687b      	ldr	r3, [r7, #4]
 8008904:	681b      	ldr	r3, [r3, #0]
 8008906:	f8d3 2d00 	ldr.w	r2, [r3, #3328]	@ 0xd00
 800890a:	687b      	ldr	r3, [r7, #4]
 800890c:	681b      	ldr	r3, [r3, #0]
 800890e:	f042 0201 	orr.w	r2, r2, #1
 8008912:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

    /* Disable the MAC transmission */
    CLEAR_BIT(heth->Instance->MACCR, ETH_MACCR_TE);
 8008916:	687b      	ldr	r3, [r7, #4]
 8008918:	681b      	ldr	r3, [r3, #0]
 800891a:	681a      	ldr	r2, [r3, #0]
 800891c:	687b      	ldr	r3, [r7, #4]
 800891e:	681b      	ldr	r3, [r3, #0]
 8008920:	f022 0202 	bic.w	r2, r2, #2
 8008924:	601a      	str	r2, [r3, #0]

    /* Clear IOC bit to all Rx descriptors */
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 8008926:	2300      	movs	r3, #0
 8008928:	60fb      	str	r3, [r7, #12]
 800892a:	e00e      	b.n	800894a <HAL_ETH_Stop_IT+0xc6>
    {
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descindex];
 800892c:	687b      	ldr	r3, [r7, #4]
 800892e:	68fa      	ldr	r2, [r7, #12]
 8008930:	3212      	adds	r2, #18
 8008932:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008936:	60bb      	str	r3, [r7, #8]
      CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC);
 8008938:	68bb      	ldr	r3, [r7, #8]
 800893a:	68db      	ldr	r3, [r3, #12]
 800893c:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8008940:	68bb      	ldr	r3, [r7, #8]
 8008942:	60da      	str	r2, [r3, #12]
    for (descindex = 0; descindex < (uint32_t)ETH_RX_DESC_CNT; descindex++)
 8008944:	68fb      	ldr	r3, [r7, #12]
 8008946:	3301      	adds	r3, #1
 8008948:	60fb      	str	r3, [r7, #12]
 800894a:	68fb      	ldr	r3, [r7, #12]
 800894c:	2b03      	cmp	r3, #3
 800894e:	d9ed      	bls.n	800892c <HAL_ETH_Stop_IT+0xa8>
    }

    heth->RxDescList.ItMode = 0U;
 8008950:	687b      	ldr	r3, [r7, #4]
 8008952:	2200      	movs	r2, #0
 8008954:	659a      	str	r2, [r3, #88]	@ 0x58

    heth->gState = HAL_ETH_STATE_READY;
 8008956:	687b      	ldr	r3, [r7, #4]
 8008958:	2210      	movs	r2, #16
 800895a:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84

    /* Return function status */
    return HAL_OK;
 800895e:	2300      	movs	r3, #0
 8008960:	e000      	b.n	8008964 <HAL_ETH_Stop_IT+0xe0>
  }
  else
  {
    return HAL_ERROR;
 8008962:	2301      	movs	r3, #1
  }
}
 8008964:	4618      	mov	r0, r3
 8008966:	3714      	adds	r7, #20
 8008968:	46bd      	mov	sp, r7
 800896a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800896e:	4770      	bx	lr
 8008970:	ffff2f3e 	.word	0xffff2f3e

08008974 <HAL_ETH_Transmit_IT>:
  *         the configuration information for ETHERNET module
  * @param  pTxConfig: Hold the configuration of packet to be transmitted
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_Transmit_IT(ETH_HandleTypeDef *heth, ETH_TxPacketConfigTypeDef *pTxConfig)
{
 8008974:	b580      	push	{r7, lr}
 8008976:	b082      	sub	sp, #8
 8008978:	af00      	add	r7, sp, #0
 800897a:	6078      	str	r0, [r7, #4]
 800897c:	6039      	str	r1, [r7, #0]
  if (pTxConfig == NULL)
 800897e:	683b      	ldr	r3, [r7, #0]
 8008980:	2b00      	cmp	r3, #0
 8008982:	d109      	bne.n	8008998 <HAL_ETH_Transmit_IT+0x24>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 8008984:	687b      	ldr	r3, [r7, #4]
 8008986:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800898a:	f043 0201 	orr.w	r2, r3, #1
 800898e:	687b      	ldr	r3, [r7, #4]
 8008990:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 8008994:	2301      	movs	r3, #1
 8008996:	e03a      	b.n	8008a0e <HAL_ETH_Transmit_IT+0x9a>
  }

  if (heth->gState == HAL_ETH_STATE_STARTED)
 8008998:	687b      	ldr	r3, [r7, #4]
 800899a:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800899e:	2b23      	cmp	r3, #35	@ 0x23
 80089a0:	d134      	bne.n	8008a0c <HAL_ETH_Transmit_IT+0x98>
  {
    /* Save the packet pointer to release.  */
    heth->TxDescList.CurrentPacketAddress = (uint32_t *)pTxConfig->pData;
 80089a2:	683b      	ldr	r3, [r7, #0]
 80089a4:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 80089a6:	687b      	ldr	r3, [r7, #4]
 80089a8:	63da      	str	r2, [r3, #60]	@ 0x3c

    /* Config DMA Tx descriptor by Tx Packet info */
    if (ETH_Prepare_Tx_Descriptors(heth, pTxConfig, 1) != HAL_ETH_ERROR_NONE)
 80089aa:	2201      	movs	r2, #1
 80089ac:	6839      	ldr	r1, [r7, #0]
 80089ae:	6878      	ldr	r0, [r7, #4]
 80089b0:	f001 f8b6 	bl	8009b20 <ETH_Prepare_Tx_Descriptors>
 80089b4:	4603      	mov	r3, r0
 80089b6:	2b00      	cmp	r3, #0
 80089b8:	d009      	beq.n	80089ce <HAL_ETH_Transmit_IT+0x5a>
    {
      heth->ErrorCode |= HAL_ETH_ERROR_BUSY;
 80089ba:	687b      	ldr	r3, [r7, #4]
 80089bc:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 80089c0:	f043 0202 	orr.w	r2, r3, #2
 80089c4:	687b      	ldr	r3, [r7, #4]
 80089c6:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
      return HAL_ERROR;
 80089ca:	2301      	movs	r3, #1
 80089cc:	e01f      	b.n	8008a0e <HAL_ETH_Transmit_IT+0x9a>
  __ASM volatile ("dsb 0xF":::"memory");
 80089ce:	f3bf 8f4f 	dsb	sy
}
 80089d2:	bf00      	nop

    /* Ensure completion of descriptor preparation before transmission start */
    __DSB();

    /* Incr current tx desc index */
    INCR_TX_DESC_INDEX(heth->TxDescList.CurTxDesc, 1U);
 80089d4:	687b      	ldr	r3, [r7, #4]
 80089d6:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80089d8:	1c5a      	adds	r2, r3, #1
 80089da:	687b      	ldr	r3, [r7, #4]
 80089dc:	629a      	str	r2, [r3, #40]	@ 0x28
 80089de:	687b      	ldr	r3, [r7, #4]
 80089e0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80089e2:	2b03      	cmp	r3, #3
 80089e4:	d904      	bls.n	80089f0 <HAL_ETH_Transmit_IT+0x7c>
 80089e6:	687b      	ldr	r3, [r7, #4]
 80089e8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80089ea:	1f1a      	subs	r2, r3, #4
 80089ec:	687b      	ldr	r3, [r7, #4]
 80089ee:	629a      	str	r2, [r3, #40]	@ 0x28

    /* Start transmission */
    /* issue a poll command to Tx DMA by writing address of next immediate free descriptor */
    WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t)(heth->TxDescList.TxDesc[heth->TxDescList.CurTxDesc]));
 80089f0:	687b      	ldr	r3, [r7, #4]
 80089f2:	6a99      	ldr	r1, [r3, #40]	@ 0x28
 80089f4:	687b      	ldr	r3, [r7, #4]
 80089f6:	681a      	ldr	r2, [r3, #0]
 80089f8:	687b      	ldr	r3, [r7, #4]
 80089fa:	3106      	adds	r1, #6
 80089fc:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 8008a00:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008a04:	f8c2 3120 	str.w	r3, [r2, #288]	@ 0x120

    return HAL_OK;
 8008a08:	2300      	movs	r3, #0
 8008a0a:	e000      	b.n	8008a0e <HAL_ETH_Transmit_IT+0x9a>

  }
  else
  {
    return HAL_ERROR;
 8008a0c:	2301      	movs	r3, #1
  }
}
 8008a0e:	4618      	mov	r0, r3
 8008a10:	3708      	adds	r7, #8
 8008a12:	46bd      	mov	sp, r7
 8008a14:	bd80      	pop	{r7, pc}

08008a16 <HAL_ETH_ReadData>:
  *         the configuration information for ETHERNET module
  * @param  pAppBuff: Pointer to an application buffer to receive the packet.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadData(ETH_HandleTypeDef *heth, void **pAppBuff)
{
 8008a16:	b580      	push	{r7, lr}
 8008a18:	b088      	sub	sp, #32
 8008a1a:	af00      	add	r7, sp, #0
 8008a1c:	6078      	str	r0, [r7, #4]
 8008a1e:	6039      	str	r1, [r7, #0]
  uint32_t descidx;
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t desccnt = 0U;
 8008a20:	2300      	movs	r3, #0
 8008a22:	617b      	str	r3, [r7, #20]
  uint32_t desccntmax;
  uint32_t bufflength;
  uint8_t rxdataready = 0U;
 8008a24:	2300      	movs	r3, #0
 8008a26:	74fb      	strb	r3, [r7, #19]

  if (pAppBuff == NULL)
 8008a28:	683b      	ldr	r3, [r7, #0]
 8008a2a:	2b00      	cmp	r3, #0
 8008a2c:	d109      	bne.n	8008a42 <HAL_ETH_ReadData+0x2c>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_PARAM;
 8008a2e:	687b      	ldr	r3, [r7, #4]
 8008a30:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008a34:	f043 0201 	orr.w	r2, r3, #1
 8008a38:	687b      	ldr	r3, [r7, #4]
 8008a3a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    return HAL_ERROR;
 8008a3e:	2301      	movs	r3, #1
 8008a40:	e0a2      	b.n	8008b88 <HAL_ETH_ReadData+0x172>
  }

  if (heth->gState != HAL_ETH_STATE_STARTED)
 8008a42:	687b      	ldr	r3, [r7, #4]
 8008a44:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 8008a48:	2b23      	cmp	r3, #35	@ 0x23
 8008a4a:	d001      	beq.n	8008a50 <HAL_ETH_ReadData+0x3a>
  {
    return HAL_ERROR;
 8008a4c:	2301      	movs	r3, #1
 8008a4e:	e09b      	b.n	8008b88 <HAL_ETH_ReadData+0x172>
  }

  descidx = heth->RxDescList.RxDescIdx;
 8008a50:	687b      	ldr	r3, [r7, #4]
 8008a52:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8008a54:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8008a56:	687b      	ldr	r3, [r7, #4]
 8008a58:	69fa      	ldr	r2, [r7, #28]
 8008a5a:	3212      	adds	r2, #18
 8008a5c:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008a60:	61bb      	str	r3, [r7, #24]
  desccntmax = ETH_RX_DESC_CNT - heth->RxDescList.RxBuildDescCnt;
 8008a62:	687b      	ldr	r3, [r7, #4]
 8008a64:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8008a66:	f1c3 0304 	rsb	r3, r3, #4
 8008a6a:	60fb      	str	r3, [r7, #12]

  /* Check if descriptor is not owned by DMA */
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8008a6c:	e064      	b.n	8008b38 <HAL_ETH_ReadData+0x122>
         && (rxdataready == 0U))
  {
    if (READ_BIT(dmarxdesc->DESC3,  ETH_DMARXNDESCWBF_CTXT)  != (uint32_t)RESET)
 8008a6e:	69bb      	ldr	r3, [r7, #24]
 8008a70:	68db      	ldr	r3, [r3, #12]
 8008a72:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 8008a76:	2b00      	cmp	r3, #0
 8008a78:	d007      	beq.n	8008a8a <HAL_ETH_ReadData+0x74>
    {
      /* Get timestamp high */
      heth->RxDescList.TimeStamp.TimeStampHigh = dmarxdesc->DESC1;
 8008a7a:	69bb      	ldr	r3, [r7, #24]
 8008a7c:	685a      	ldr	r2, [r3, #4]
 8008a7e:	687b      	ldr	r3, [r7, #4]
 8008a80:	679a      	str	r2, [r3, #120]	@ 0x78
      /* Get timestamp low */
      heth->RxDescList.TimeStamp.TimeStampLow  = dmarxdesc->DESC0;
 8008a82:	69bb      	ldr	r3, [r7, #24]
 8008a84:	681a      	ldr	r2, [r3, #0]
 8008a86:	687b      	ldr	r3, [r7, #4]
 8008a88:	675a      	str	r2, [r3, #116]	@ 0x74
    }
    if ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET) || (heth->RxDescList.pRxStart != NULL))
 8008a8a:	69bb      	ldr	r3, [r7, #24]
 8008a8c:	68db      	ldr	r3, [r3, #12]
 8008a8e:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 8008a92:	2b00      	cmp	r3, #0
 8008a94:	d103      	bne.n	8008a9e <HAL_ETH_ReadData+0x88>
 8008a96:	687b      	ldr	r3, [r7, #4]
 8008a98:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 8008a9a:	2b00      	cmp	r3, #0
 8008a9c:	d03a      	beq.n	8008b14 <HAL_ETH_ReadData+0xfe>
    {
      /* Check if first descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_FD) != (uint32_t)RESET)
 8008a9e:	69bb      	ldr	r3, [r7, #24]
 8008aa0:	68db      	ldr	r3, [r3, #12]
 8008aa2:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 8008aa6:	2b00      	cmp	r3, #0
 8008aa8:	d005      	beq.n	8008ab6 <HAL_ETH_ReadData+0xa0>
      {
        heth->RxDescList.RxDescCnt = 0;
 8008aaa:	687b      	ldr	r3, [r7, #4]
 8008aac:	2200      	movs	r2, #0
 8008aae:	661a      	str	r2, [r3, #96]	@ 0x60
        heth->RxDescList.RxDataLength = 0;
 8008ab0:	687b      	ldr	r3, [r7, #4]
 8008ab2:	2200      	movs	r2, #0
 8008ab4:	665a      	str	r2, [r3, #100]	@ 0x64
      }

      /* Get the Frame Length of the received packet: substruct 4 bytes of the CRC */
      bufflength = READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_PL) - heth->RxDescList.RxDataLength;
 8008ab6:	69bb      	ldr	r3, [r7, #24]
 8008ab8:	68db      	ldr	r3, [r3, #12]
 8008aba:	f3c3 020e 	ubfx	r2, r3, #0, #15
 8008abe:	687b      	ldr	r3, [r7, #4]
 8008ac0:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 8008ac2:	1ad3      	subs	r3, r2, r3
 8008ac4:	60bb      	str	r3, [r7, #8]

      /* Check if last descriptor */
      if (READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_LD) != (uint32_t)RESET)
 8008ac6:	69bb      	ldr	r3, [r7, #24]
 8008ac8:	68db      	ldr	r3, [r3, #12]
 8008aca:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 8008ace:	2b00      	cmp	r3, #0
 8008ad0:	d005      	beq.n	8008ade <HAL_ETH_ReadData+0xc8>
      {
        /* Save Last descriptor index */
        heth->RxDescList.pRxLastRxDesc = dmarxdesc->DESC3;
 8008ad2:	69bb      	ldr	r3, [r7, #24]
 8008ad4:	68da      	ldr	r2, [r3, #12]
 8008ad6:	687b      	ldr	r3, [r7, #4]
 8008ad8:	671a      	str	r2, [r3, #112]	@ 0x70

        /* Packet ready */
        rxdataready = 1;
 8008ada:	2301      	movs	r3, #1
 8008adc:	74fb      	strb	r3, [r7, #19]
      /*Call registered Link callback*/
      heth->rxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
                           (uint8_t *)dmarxdesc->BackupAddr0, bufflength);
#else
      /* Link callback */
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 8008ade:	687b      	ldr	r3, [r7, #4]
 8008ae0:	f103 007c 	add.w	r0, r3, #124	@ 0x7c
 8008ae4:	687b      	ldr	r3, [r7, #4]
 8008ae6:	f103 0180 	add.w	r1, r3, #128	@ 0x80
                             (uint8_t *)dmarxdesc->BackupAddr0, (uint16_t) bufflength);
 8008aea:	69bb      	ldr	r3, [r7, #24]
 8008aec:	691b      	ldr	r3, [r3, #16]
      HAL_ETH_RxLinkCallback(&heth->RxDescList.pRxStart, &heth->RxDescList.pRxEnd,
 8008aee:	461a      	mov	r2, r3
 8008af0:	68bb      	ldr	r3, [r7, #8]
 8008af2:	b29b      	uxth	r3, r3
 8008af4:	f008 faf4 	bl	80110e0 <HAL_ETH_RxLinkCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      heth->RxDescList.RxDescCnt++;
 8008af8:	687b      	ldr	r3, [r7, #4]
 8008afa:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 8008afc:	1c5a      	adds	r2, r3, #1
 8008afe:	687b      	ldr	r3, [r7, #4]
 8008b00:	661a      	str	r2, [r3, #96]	@ 0x60
      heth->RxDescList.RxDataLength += bufflength;
 8008b02:	687b      	ldr	r3, [r7, #4]
 8008b04:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 8008b06:	68bb      	ldr	r3, [r7, #8]
 8008b08:	441a      	add	r2, r3
 8008b0a:	687b      	ldr	r3, [r7, #4]
 8008b0c:	665a      	str	r2, [r3, #100]	@ 0x64

      /* Clear buffer pointer */
      dmarxdesc->BackupAddr0 = 0;
 8008b0e:	69bb      	ldr	r3, [r7, #24]
 8008b10:	2200      	movs	r2, #0
 8008b12:	611a      	str	r2, [r3, #16]
    }

    /* Increment current rx descriptor index */
    INCR_RX_DESC_INDEX(descidx, 1U);
 8008b14:	69fb      	ldr	r3, [r7, #28]
 8008b16:	3301      	adds	r3, #1
 8008b18:	61fb      	str	r3, [r7, #28]
 8008b1a:	69fb      	ldr	r3, [r7, #28]
 8008b1c:	2b03      	cmp	r3, #3
 8008b1e:	d902      	bls.n	8008b26 <HAL_ETH_ReadData+0x110>
 8008b20:	69fb      	ldr	r3, [r7, #28]
 8008b22:	3b04      	subs	r3, #4
 8008b24:	61fb      	str	r3, [r7, #28]
    /* Get current descriptor address */
    dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8008b26:	687b      	ldr	r3, [r7, #4]
 8008b28:	69fa      	ldr	r2, [r7, #28]
 8008b2a:	3212      	adds	r2, #18
 8008b2c:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008b30:	61bb      	str	r3, [r7, #24]
    desccnt++;
 8008b32:	697b      	ldr	r3, [r7, #20]
 8008b34:	3301      	adds	r3, #1
 8008b36:	617b      	str	r3, [r7, #20]
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8008b38:	69bb      	ldr	r3, [r7, #24]
 8008b3a:	68db      	ldr	r3, [r3, #12]
         && (rxdataready == 0U))
 8008b3c:	2b00      	cmp	r3, #0
 8008b3e:	db06      	blt.n	8008b4e <HAL_ETH_ReadData+0x138>
  while ((READ_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCWBF_OWN) == (uint32_t)RESET) && (desccnt < desccntmax)
 8008b40:	697a      	ldr	r2, [r7, #20]
 8008b42:	68fb      	ldr	r3, [r7, #12]
 8008b44:	429a      	cmp	r2, r3
 8008b46:	d202      	bcs.n	8008b4e <HAL_ETH_ReadData+0x138>
         && (rxdataready == 0U))
 8008b48:	7cfb      	ldrb	r3, [r7, #19]
 8008b4a:	2b00      	cmp	r3, #0
 8008b4c:	d08f      	beq.n	8008a6e <HAL_ETH_ReadData+0x58>
  }

  heth->RxDescList.RxBuildDescCnt += desccnt;
 8008b4e:	687b      	ldr	r3, [r7, #4]
 8008b50:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 8008b52:	697b      	ldr	r3, [r7, #20]
 8008b54:	441a      	add	r2, r3
 8008b56:	687b      	ldr	r3, [r7, #4]
 8008b58:	66da      	str	r2, [r3, #108]	@ 0x6c
  if ((heth->RxDescList.RxBuildDescCnt) != 0U)
 8008b5a:	687b      	ldr	r3, [r7, #4]
 8008b5c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8008b5e:	2b00      	cmp	r3, #0
 8008b60:	d002      	beq.n	8008b68 <HAL_ETH_ReadData+0x152>
  {
    /* Update Descriptors */
    ETH_UpdateDescriptor(heth);
 8008b62:	6878      	ldr	r0, [r7, #4]
 8008b64:	f000 f814 	bl	8008b90 <ETH_UpdateDescriptor>
  }

  heth->RxDescList.RxDescIdx = descidx;
 8008b68:	687b      	ldr	r3, [r7, #4]
 8008b6a:	69fa      	ldr	r2, [r7, #28]
 8008b6c:	65da      	str	r2, [r3, #92]	@ 0x5c

  if (rxdataready == 1U)
 8008b6e:	7cfb      	ldrb	r3, [r7, #19]
 8008b70:	2b01      	cmp	r3, #1
 8008b72:	d108      	bne.n	8008b86 <HAL_ETH_ReadData+0x170>
  {
    /* Return received packet */
    *pAppBuff = heth->RxDescList.pRxStart;
 8008b74:	687b      	ldr	r3, [r7, #4]
 8008b76:	6fda      	ldr	r2, [r3, #124]	@ 0x7c
 8008b78:	683b      	ldr	r3, [r7, #0]
 8008b7a:	601a      	str	r2, [r3, #0]
    /* Reset first element */
    heth->RxDescList.pRxStart = NULL;
 8008b7c:	687b      	ldr	r3, [r7, #4]
 8008b7e:	2200      	movs	r2, #0
 8008b80:	67da      	str	r2, [r3, #124]	@ 0x7c

    return HAL_OK;
 8008b82:	2300      	movs	r3, #0
 8008b84:	e000      	b.n	8008b88 <HAL_ETH_ReadData+0x172>
  }

  /* Packet not ready */
  return HAL_ERROR;
 8008b86:	2301      	movs	r3, #1
}
 8008b88:	4618      	mov	r0, r3
 8008b8a:	3720      	adds	r7, #32
 8008b8c:	46bd      	mov	sp, r7
 8008b8e:	bd80      	pop	{r7, pc}

08008b90 <ETH_UpdateDescriptor>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_UpdateDescriptor(ETH_HandleTypeDef *heth)
{
 8008b90:	b580      	push	{r7, lr}
 8008b92:	b088      	sub	sp, #32
 8008b94:	af00      	add	r7, sp, #0
 8008b96:	6078      	str	r0, [r7, #4]
  uint32_t descidx;
  uint32_t tailidx;
  uint32_t desccount;
  ETH_DMADescTypeDef *dmarxdesc;
  uint8_t *buff = NULL;
 8008b98:	2300      	movs	r3, #0
 8008b9a:	60bb      	str	r3, [r7, #8]
  uint8_t allocStatus = 1U;
 8008b9c:	2301      	movs	r3, #1
 8008b9e:	74fb      	strb	r3, [r7, #19]

  descidx = heth->RxDescList.RxBuildDescIdx;
 8008ba0:	687b      	ldr	r3, [r7, #4]
 8008ba2:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8008ba4:	61fb      	str	r3, [r7, #28]
  dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8008ba6:	687b      	ldr	r3, [r7, #4]
 8008ba8:	69fa      	ldr	r2, [r7, #28]
 8008baa:	3212      	adds	r2, #18
 8008bac:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008bb0:	617b      	str	r3, [r7, #20]
  desccount = heth->RxDescList.RxBuildDescCnt;
 8008bb2:	687b      	ldr	r3, [r7, #4]
 8008bb4:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8008bb6:	61bb      	str	r3, [r7, #24]

  while ((desccount > 0U) && (allocStatus != 0U))
 8008bb8:	e038      	b.n	8008c2c <ETH_UpdateDescriptor+0x9c>
  {
    /* Check if a buffer's attached the descriptor */
    if (READ_REG(dmarxdesc->BackupAddr0) == 0U)
 8008bba:	697b      	ldr	r3, [r7, #20]
 8008bbc:	691b      	ldr	r3, [r3, #16]
 8008bbe:	2b00      	cmp	r3, #0
 8008bc0:	d112      	bne.n	8008be8 <ETH_UpdateDescriptor+0x58>
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
      /*Call registered Allocate callback*/
      heth->rxAllocateCallback(&buff);
#else
      /* Allocate callback */
      HAL_ETH_RxAllocateCallback(&buff);
 8008bc2:	f107 0308 	add.w	r3, r7, #8
 8008bc6:	4618      	mov	r0, r3
 8008bc8:	f008 fa5a 	bl	8011080 <HAL_ETH_RxAllocateCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
      if (buff == NULL)
 8008bcc:	68bb      	ldr	r3, [r7, #8]
 8008bce:	2b00      	cmp	r3, #0
 8008bd0:	d102      	bne.n	8008bd8 <ETH_UpdateDescriptor+0x48>
      {
        allocStatus = 0U;
 8008bd2:	2300      	movs	r3, #0
 8008bd4:	74fb      	strb	r3, [r7, #19]
 8008bd6:	e007      	b.n	8008be8 <ETH_UpdateDescriptor+0x58>
      }
      else
      {
        WRITE_REG(dmarxdesc->BackupAddr0, (uint32_t)buff);
 8008bd8:	68bb      	ldr	r3, [r7, #8]
 8008bda:	461a      	mov	r2, r3
 8008bdc:	697b      	ldr	r3, [r7, #20]
 8008bde:	611a      	str	r2, [r3, #16]
        WRITE_REG(dmarxdesc->DESC0, (uint32_t)buff);
 8008be0:	68bb      	ldr	r3, [r7, #8]
 8008be2:	461a      	mov	r2, r3
 8008be4:	697b      	ldr	r3, [r7, #20]
 8008be6:	601a      	str	r2, [r3, #0]
      }
    }

    if (allocStatus != 0U)
 8008be8:	7cfb      	ldrb	r3, [r7, #19]
 8008bea:	2b00      	cmp	r3, #0
 8008bec:	d01e      	beq.n	8008c2c <ETH_UpdateDescriptor+0x9c>
    {

      if (heth->RxDescList.ItMode != 0U)
 8008bee:	687b      	ldr	r3, [r7, #4]
 8008bf0:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8008bf2:	2b00      	cmp	r3, #0
 8008bf4:	d004      	beq.n	8008c00 <ETH_UpdateDescriptor+0x70>
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC);
 8008bf6:	697b      	ldr	r3, [r7, #20]
 8008bf8:	f04f 4241 	mov.w	r2, #3238002688	@ 0xc1000000
 8008bfc:	60da      	str	r2, [r3, #12]
 8008bfe:	e003      	b.n	8008c08 <ETH_UpdateDescriptor+0x78>
      }
      else
      {
        WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V);
 8008c00:	697b      	ldr	r3, [r7, #20]
 8008c02:	f04f 4201 	mov.w	r2, #2164260864	@ 0x81000000
 8008c06:	60da      	str	r2, [r3, #12]
      }

      /* Increment current rx descriptor index */
      INCR_RX_DESC_INDEX(descidx, 1U);
 8008c08:	69fb      	ldr	r3, [r7, #28]
 8008c0a:	3301      	adds	r3, #1
 8008c0c:	61fb      	str	r3, [r7, #28]
 8008c0e:	69fb      	ldr	r3, [r7, #28]
 8008c10:	2b03      	cmp	r3, #3
 8008c12:	d902      	bls.n	8008c1a <ETH_UpdateDescriptor+0x8a>
 8008c14:	69fb      	ldr	r3, [r7, #28]
 8008c16:	3b04      	subs	r3, #4
 8008c18:	61fb      	str	r3, [r7, #28]
      /* Get current descriptor address */
      dmarxdesc = (ETH_DMADescTypeDef *)heth->RxDescList.RxDesc[descidx];
 8008c1a:	687b      	ldr	r3, [r7, #4]
 8008c1c:	69fa      	ldr	r2, [r7, #28]
 8008c1e:	3212      	adds	r2, #18
 8008c20:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8008c24:	617b      	str	r3, [r7, #20]
      desccount--;
 8008c26:	69bb      	ldr	r3, [r7, #24]
 8008c28:	3b01      	subs	r3, #1
 8008c2a:	61bb      	str	r3, [r7, #24]
  while ((desccount > 0U) && (allocStatus != 0U))
 8008c2c:	69bb      	ldr	r3, [r7, #24]
 8008c2e:	2b00      	cmp	r3, #0
 8008c30:	d002      	beq.n	8008c38 <ETH_UpdateDescriptor+0xa8>
 8008c32:	7cfb      	ldrb	r3, [r7, #19]
 8008c34:	2b00      	cmp	r3, #0
 8008c36:	d1c0      	bne.n	8008bba <ETH_UpdateDescriptor+0x2a>
    }
  }

  if (heth->RxDescList.RxBuildDescCnt != desccount)
 8008c38:	687b      	ldr	r3, [r7, #4]
 8008c3a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8008c3c:	69ba      	ldr	r2, [r7, #24]
 8008c3e:	429a      	cmp	r2, r3
 8008c40:	d01b      	beq.n	8008c7a <ETH_UpdateDescriptor+0xea>
  {
    /* Set the tail pointer index */
    tailidx = (descidx + 1U) % ETH_RX_DESC_CNT;
 8008c42:	69fb      	ldr	r3, [r7, #28]
 8008c44:	3301      	adds	r3, #1
 8008c46:	f003 0303 	and.w	r3, r3, #3
 8008c4a:	60fb      	str	r3, [r7, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8008c4c:	f3bf 8f5f 	dmb	sy
}
 8008c50:	bf00      	nop

    /* DMB instruction to avoid race condition */
    __DMB();

    /* Set the Tail pointer address */
    WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (tailidx))));
 8008c52:	687b      	ldr	r3, [r7, #4]
 8008c54:	6919      	ldr	r1, [r3, #16]
 8008c56:	68fa      	ldr	r2, [r7, #12]
 8008c58:	4613      	mov	r3, r2
 8008c5a:	005b      	lsls	r3, r3, #1
 8008c5c:	4413      	add	r3, r2
 8008c5e:	00db      	lsls	r3, r3, #3
 8008c60:	18ca      	adds	r2, r1, r3
 8008c62:	687b      	ldr	r3, [r7, #4]
 8008c64:	681b      	ldr	r3, [r3, #0]
 8008c66:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008c6a:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128

    heth->RxDescList.RxBuildDescIdx = descidx;
 8008c6e:	687b      	ldr	r3, [r7, #4]
 8008c70:	69fa      	ldr	r2, [r7, #28]
 8008c72:	669a      	str	r2, [r3, #104]	@ 0x68
    heth->RxDescList.RxBuildDescCnt = desccount;
 8008c74:	687b      	ldr	r3, [r7, #4]
 8008c76:	69ba      	ldr	r2, [r7, #24]
 8008c78:	66da      	str	r2, [r3, #108]	@ 0x6c
  }
}
 8008c7a:	bf00      	nop
 8008c7c:	3720      	adds	r7, #32
 8008c7e:	46bd      	mov	sp, r7
 8008c80:	bd80      	pop	{r7, pc}

08008c82 <HAL_ETH_ReleaseTxPacket>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReleaseTxPacket(ETH_HandleTypeDef *heth)
{
 8008c82:	b580      	push	{r7, lr}
 8008c84:	b086      	sub	sp, #24
 8008c86:	af00      	add	r7, sp, #0
 8008c88:	6078      	str	r0, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 8008c8a:	687b      	ldr	r3, [r7, #4]
 8008c8c:	3318      	adds	r3, #24
 8008c8e:	60bb      	str	r3, [r7, #8]
  uint32_t numOfBuf =  dmatxdesclist->BuffersInUse;
 8008c90:	68bb      	ldr	r3, [r7, #8]
 8008c92:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008c94:	617b      	str	r3, [r7, #20]
  uint32_t idx =       dmatxdesclist->releaseIndex;
 8008c96:	68bb      	ldr	r3, [r7, #8]
 8008c98:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8008c9a:	613b      	str	r3, [r7, #16]
  uint8_t pktTxStatus = 1U;
 8008c9c:	2301      	movs	r3, #1
 8008c9e:	73fb      	strb	r3, [r7, #15]
#ifdef HAL_ETH_USE_PTP
  ETH_TimeStampTypeDef *timestamp = &heth->TxTimestamp;
#endif /* HAL_ETH_USE_PTP */

  /* Loop through buffers in use.  */
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 8008ca0:	e047      	b.n	8008d32 <HAL_ETH_ReleaseTxPacket+0xb0>
  {
    pktInUse = 1U;
 8008ca2:	2301      	movs	r3, #1
 8008ca4:	73bb      	strb	r3, [r7, #14]
    numOfBuf--;
 8008ca6:	697b      	ldr	r3, [r7, #20]
 8008ca8:	3b01      	subs	r3, #1
 8008caa:	617b      	str	r3, [r7, #20]
    /* If no packet, just examine the next packet.  */
    if (dmatxdesclist->PacketAddress[idx] == NULL)
 8008cac:	68ba      	ldr	r2, [r7, #8]
 8008cae:	693b      	ldr	r3, [r7, #16]
 8008cb0:	3304      	adds	r3, #4
 8008cb2:	009b      	lsls	r3, r3, #2
 8008cb4:	4413      	add	r3, r2
 8008cb6:	685b      	ldr	r3, [r3, #4]
 8008cb8:	2b00      	cmp	r3, #0
 8008cba:	d10a      	bne.n	8008cd2 <HAL_ETH_ReleaseTxPacket+0x50>
    {
      /* No packet in use, skip to next.  */
      INCR_TX_DESC_INDEX(idx, 1U);
 8008cbc:	693b      	ldr	r3, [r7, #16]
 8008cbe:	3301      	adds	r3, #1
 8008cc0:	613b      	str	r3, [r7, #16]
 8008cc2:	693b      	ldr	r3, [r7, #16]
 8008cc4:	2b03      	cmp	r3, #3
 8008cc6:	d902      	bls.n	8008cce <HAL_ETH_ReleaseTxPacket+0x4c>
 8008cc8:	693b      	ldr	r3, [r7, #16]
 8008cca:	3b04      	subs	r3, #4
 8008ccc:	613b      	str	r3, [r7, #16]
      pktInUse = 0U;
 8008cce:	2300      	movs	r3, #0
 8008cd0:	73bb      	strb	r3, [r7, #14]
    }

    if (pktInUse != 0U)
 8008cd2:	7bbb      	ldrb	r3, [r7, #14]
 8008cd4:	2b00      	cmp	r3, #0
 8008cd6:	d02c      	beq.n	8008d32 <HAL_ETH_ReleaseTxPacket+0xb0>
    {
      /* Determine if the packet has been transmitted.  */
      if ((heth->Init.TxDesc[idx].DESC3 & ETH_DMATXNDESCRF_OWN) == 0U)
 8008cd8:	687b      	ldr	r3, [r7, #4]
 8008cda:	68d9      	ldr	r1, [r3, #12]
 8008cdc:	693a      	ldr	r2, [r7, #16]
 8008cde:	4613      	mov	r3, r2
 8008ce0:	005b      	lsls	r3, r3, #1
 8008ce2:	4413      	add	r3, r2
 8008ce4:	00db      	lsls	r3, r3, #3
 8008ce6:	440b      	add	r3, r1
 8008ce8:	68db      	ldr	r3, [r3, #12]
 8008cea:	2b00      	cmp	r3, #0
 8008cec:	db1f      	blt.n	8008d2e <HAL_ETH_ReleaseTxPacket+0xac>
        {
          HAL_ETH_TxPtpCallback(dmatxdesclist->PacketAddress[idx], timestamp);
        }
#endif  /* HAL_ETH_USE_PTP */
        /* Release the packet.  */
        HAL_ETH_TxFreeCallback(dmatxdesclist->PacketAddress[idx]);
 8008cee:	68ba      	ldr	r2, [r7, #8]
 8008cf0:	693b      	ldr	r3, [r7, #16]
 8008cf2:	3304      	adds	r3, #4
 8008cf4:	009b      	lsls	r3, r3, #2
 8008cf6:	4413      	add	r3, r2
 8008cf8:	685b      	ldr	r3, [r3, #4]
 8008cfa:	4618      	mov	r0, r3
 8008cfc:	f008 fa58 	bl	80111b0 <HAL_ETH_TxFreeCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

        /* Clear the entry in the in-use array.  */
        dmatxdesclist->PacketAddress[idx] = NULL;
 8008d00:	68ba      	ldr	r2, [r7, #8]
 8008d02:	693b      	ldr	r3, [r7, #16]
 8008d04:	3304      	adds	r3, #4
 8008d06:	009b      	lsls	r3, r3, #2
 8008d08:	4413      	add	r3, r2
 8008d0a:	2200      	movs	r2, #0
 8008d0c:	605a      	str	r2, [r3, #4]

        /* Update the transmit relesae index and number of buffers in use.  */
        INCR_TX_DESC_INDEX(idx, 1U);
 8008d0e:	693b      	ldr	r3, [r7, #16]
 8008d10:	3301      	adds	r3, #1
 8008d12:	613b      	str	r3, [r7, #16]
 8008d14:	693b      	ldr	r3, [r7, #16]
 8008d16:	2b03      	cmp	r3, #3
 8008d18:	d902      	bls.n	8008d20 <HAL_ETH_ReleaseTxPacket+0x9e>
 8008d1a:	693b      	ldr	r3, [r7, #16]
 8008d1c:	3b04      	subs	r3, #4
 8008d1e:	613b      	str	r3, [r7, #16]
        dmatxdesclist->BuffersInUse = numOfBuf;
 8008d20:	68bb      	ldr	r3, [r7, #8]
 8008d22:	697a      	ldr	r2, [r7, #20]
 8008d24:	629a      	str	r2, [r3, #40]	@ 0x28
        dmatxdesclist->releaseIndex = idx;
 8008d26:	68bb      	ldr	r3, [r7, #8]
 8008d28:	693a      	ldr	r2, [r7, #16]
 8008d2a:	62da      	str	r2, [r3, #44]	@ 0x2c
 8008d2c:	e001      	b.n	8008d32 <HAL_ETH_ReleaseTxPacket+0xb0>
      }
      else
      {
        /* Get out of the loop!  */
        pktTxStatus = 0U;
 8008d2e:	2300      	movs	r3, #0
 8008d30:	73fb      	strb	r3, [r7, #15]
  while ((numOfBuf != 0U) && (pktTxStatus != 0U))
 8008d32:	697b      	ldr	r3, [r7, #20]
 8008d34:	2b00      	cmp	r3, #0
 8008d36:	d002      	beq.n	8008d3e <HAL_ETH_ReleaseTxPacket+0xbc>
 8008d38:	7bfb      	ldrb	r3, [r7, #15]
 8008d3a:	2b00      	cmp	r3, #0
 8008d3c:	d1b1      	bne.n	8008ca2 <HAL_ETH_ReleaseTxPacket+0x20>
      }
    }
  }
  return HAL_OK;
 8008d3e:	2300      	movs	r3, #0
}
 8008d40:	4618      	mov	r0, r3
 8008d42:	3718      	adds	r7, #24
 8008d44:	46bd      	mov	sp, r7
 8008d46:	bd80      	pop	{r7, pc}

08008d48 <HAL_ETH_IRQHandler>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth)
{
 8008d48:	b580      	push	{r7, lr}
 8008d4a:	b086      	sub	sp, #24
 8008d4c:	af00      	add	r7, sp, #0
 8008d4e:	6078      	str	r0, [r7, #4]
  uint32_t mac_flag = READ_REG(heth->Instance->MACISR);
 8008d50:	687b      	ldr	r3, [r7, #4]
 8008d52:	681b      	ldr	r3, [r3, #0]
 8008d54:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 8008d58:	617b      	str	r3, [r7, #20]
  uint32_t dma_flag = READ_REG(heth->Instance->DMACSR);
 8008d5a:	687b      	ldr	r3, [r7, #4]
 8008d5c:	681b      	ldr	r3, [r3, #0]
 8008d5e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008d62:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8008d66:	613b      	str	r3, [r7, #16]
  uint32_t dma_itsource = READ_REG(heth->Instance->DMACIER);
 8008d68:	687b      	ldr	r3, [r7, #4]
 8008d6a:	681b      	ldr	r3, [r3, #0]
 8008d6c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008d70:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 8008d74:	60fb      	str	r3, [r7, #12]
  uint32_t exti_d1_flag = READ_REG(EXTI_D1->PR3);
 8008d76:	4b6d      	ldr	r3, [pc, #436]	@ (8008f2c <HAL_ETH_IRQHandler+0x1e4>)
 8008d78:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8008d7a:	60bb      	str	r3, [r7, #8]
#if defined(DUAL_CORE)
  uint32_t exti_d2_flag = READ_REG(EXTI_D2->PR3);
#endif /* DUAL_CORE */

  /* Packet received */
  if (((dma_flag & ETH_DMACSR_RI) != 0U) && ((dma_itsource & ETH_DMACIER_RIE) != 0U))
 8008d7c:	693b      	ldr	r3, [r7, #16]
 8008d7e:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8008d82:	2b00      	cmp	r3, #0
 8008d84:	d010      	beq.n	8008da8 <HAL_ETH_IRQHandler+0x60>
 8008d86:	68fb      	ldr	r3, [r7, #12]
 8008d88:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8008d8c:	2b00      	cmp	r3, #0
 8008d8e:	d00b      	beq.n	8008da8 <HAL_ETH_IRQHandler+0x60>
  {
    /* Clear the Eth DMA Rx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_RI | ETH_DMACSR_NIS);
 8008d90:	687b      	ldr	r3, [r7, #4]
 8008d92:	681b      	ldr	r3, [r3, #0]
 8008d94:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008d98:	461a      	mov	r2, r3
 8008d9a:	f248 0340 	movw	r3, #32832	@ 0x8040
 8008d9e:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Receive complete callback*/
    heth->RxCpltCallback(heth);
#else
    /* Receive complete callback */
    HAL_ETH_RxCpltCallback(heth);
 8008da2:	6878      	ldr	r0, [r7, #4]
 8008da4:	f007 fcf4 	bl	8010790 <HAL_ETH_RxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* Packet transmitted */
  if (((dma_flag & ETH_DMACSR_TI) != 0U) && ((dma_itsource & ETH_DMACIER_TIE) != 0U))
 8008da8:	693b      	ldr	r3, [r7, #16]
 8008daa:	f003 0301 	and.w	r3, r3, #1
 8008dae:	2b00      	cmp	r3, #0
 8008db0:	d010      	beq.n	8008dd4 <HAL_ETH_IRQHandler+0x8c>
 8008db2:	68fb      	ldr	r3, [r7, #12]
 8008db4:	f003 0301 	and.w	r3, r3, #1
 8008db8:	2b00      	cmp	r3, #0
 8008dba:	d00b      	beq.n	8008dd4 <HAL_ETH_IRQHandler+0x8c>
  {
    /* Clear the Eth DMA Tx IT pending bits */
    __HAL_ETH_DMA_CLEAR_IT(heth, ETH_DMACSR_TI | ETH_DMACSR_NIS);
 8008dbc:	687b      	ldr	r3, [r7, #4]
 8008dbe:	681b      	ldr	r3, [r3, #0]
 8008dc0:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008dc4:	461a      	mov	r2, r3
 8008dc6:	f248 0301 	movw	r3, #32769	@ 0x8001
 8008dca:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /*Call registered Transmit complete callback*/
    heth->TxCpltCallback(heth);
#else
    /* Transfer complete callback */
    HAL_ETH_TxCpltCallback(heth);
 8008dce:	6878      	ldr	r0, [r7, #4]
 8008dd0:	f007 fcee 	bl	80107b0 <HAL_ETH_TxCpltCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH DMA Error */
  if (((dma_flag & ETH_DMACSR_AIS) != 0U) && ((dma_itsource & ETH_DMACIER_AIE) != 0U))
 8008dd4:	693b      	ldr	r3, [r7, #16]
 8008dd6:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8008dda:	2b00      	cmp	r3, #0
 8008ddc:	d047      	beq.n	8008e6e <HAL_ETH_IRQHandler+0x126>
 8008dde:	68fb      	ldr	r3, [r7, #12]
 8008de0:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8008de4:	2b00      	cmp	r3, #0
 8008de6:	d042      	beq.n	8008e6e <HAL_ETH_IRQHandler+0x126>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_DMA;
 8008de8:	687b      	ldr	r3, [r7, #4]
 8008dea:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008dee:	f043 0208 	orr.w	r2, r3, #8
 8008df2:	687b      	ldr	r3, [r7, #4]
 8008df4:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
    /* if fatal bus error occurred */
    if ((dma_flag & ETH_DMACSR_FBE) != 0U)
 8008df8:	693b      	ldr	r3, [r7, #16]
 8008dfa:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 8008dfe:	2b00      	cmp	r3, #0
 8008e00:	d01e      	beq.n	8008e40 <HAL_ETH_IRQHandler+0xf8>
    {
      /* Get DMA error code  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_FBE | ETH_DMACSR_TPS | ETH_DMACSR_RPS));
 8008e02:	687b      	ldr	r3, [r7, #4]
 8008e04:	681b      	ldr	r3, [r3, #0]
 8008e06:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008e0a:	f8d3 2160 	ldr.w	r2, [r3, #352]	@ 0x160
 8008e0e:	f241 1302 	movw	r3, #4354	@ 0x1102
 8008e12:	4013      	ands	r3, r2
 8008e14:	687a      	ldr	r2, [r7, #4]
 8008e16:	f8c2 308c 	str.w	r3, [r2, #140]	@ 0x8c

      /* Disable all interrupts */
      __HAL_ETH_DMA_DISABLE_IT(heth, ETH_DMACIER_NIE | ETH_DMACIER_AIE);
 8008e1a:	687b      	ldr	r3, [r7, #4]
 8008e1c:	681b      	ldr	r3, [r3, #0]
 8008e1e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008e22:	f8d3 3134 	ldr.w	r3, [r3, #308]	@ 0x134
 8008e26:	687a      	ldr	r2, [r7, #4]
 8008e28:	6812      	ldr	r2, [r2, #0]
 8008e2a:	f423 4340 	bic.w	r3, r3, #49152	@ 0xc000
 8008e2e:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8008e32:	f8c2 3134 	str.w	r3, [r2, #308]	@ 0x134

      /* Set HAL state to ERROR */
      heth->gState = HAL_ETH_STATE_ERROR;
 8008e36:	687b      	ldr	r3, [r7, #4]
 8008e38:	22e0      	movs	r2, #224	@ 0xe0
 8008e3a:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
 8008e3e:	e013      	b.n	8008e68 <HAL_ETH_IRQHandler+0x120>
    }
    else
    {
      /* Get DMA error status  */
      heth->DMAErrorCode = READ_BIT(heth->Instance->DMACSR, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 8008e40:	687b      	ldr	r3, [r7, #4]
 8008e42:	681b      	ldr	r3, [r3, #0]
 8008e44:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008e48:	f8d3 3160 	ldr.w	r3, [r3, #352]	@ 0x160
 8008e4c:	f403 42cd 	and.w	r2, r3, #26240	@ 0x6680
 8008e50:	687b      	ldr	r3, [r7, #4]
 8008e52:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
                                                             ETH_DMACSR_RBU | ETH_DMACSR_AIS));

      /* Clear the interrupt summary flag */
      __HAL_ETH_DMA_CLEAR_IT(heth, (ETH_DMACSR_CDE | ETH_DMACSR_ETI | ETH_DMACSR_RWT |
 8008e56:	687b      	ldr	r3, [r7, #4]
 8008e58:	681b      	ldr	r3, [r3, #0]
 8008e5a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8008e5e:	461a      	mov	r2, r3
 8008e60:	f44f 43cd 	mov.w	r3, #26240	@ 0x6680
 8008e64:	f8c2 3160 	str.w	r3, [r2, #352]	@ 0x160
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet DMA Error callback */
    HAL_ETH_ErrorCallback(heth);
 8008e68:	6878      	ldr	r0, [r7, #4]
 8008e6a:	f007 fcb1 	bl	80107d0 <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }

  /* ETH MAC Error IT */
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 8008e6e:	697b      	ldr	r3, [r7, #20]
 8008e70:	f403 4380 	and.w	r3, r3, #16384	@ 0x4000
 8008e74:	2b00      	cmp	r3, #0
 8008e76:	d104      	bne.n	8008e82 <HAL_ETH_IRQHandler+0x13a>
      ((mac_flag & ETH_MACIER_TXSTSIE) == ETH_MACIER_TXSTSIE))
 8008e78:	697b      	ldr	r3, [r7, #20]
 8008e7a:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((mac_flag & ETH_MACIER_RXSTSIE) == ETH_MACIER_RXSTSIE) || \
 8008e7e:	2b00      	cmp	r3, #0
 8008e80:	d019      	beq.n	8008eb6 <HAL_ETH_IRQHandler+0x16e>
  {
    heth->ErrorCode |= HAL_ETH_ERROR_MAC;
 8008e82:	687b      	ldr	r3, [r7, #4]
 8008e84:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 8008e88:	f043 0210 	orr.w	r2, r3, #16
 8008e8c:	687b      	ldr	r3, [r7, #4]
 8008e8e:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Get MAC Rx Tx status and clear Status register pending bit */
    heth->MACErrorCode = READ_REG(heth->Instance->MACRXTXSR);
 8008e92:	687b      	ldr	r3, [r7, #4]
 8008e94:	681b      	ldr	r3, [r3, #0]
 8008e96:	f8d3 20b8 	ldr.w	r2, [r3, #184]	@ 0xb8
 8008e9a:	687b      	ldr	r3, [r7, #4]
 8008e9c:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

    heth->gState = HAL_ETH_STATE_ERROR;
 8008ea0:	687b      	ldr	r3, [r7, #4]
 8008ea2:	22e0      	movs	r2, #224	@ 0xe0
 8008ea4:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered Error callback*/
    heth->ErrorCallback(heth);
#else
    /* Ethernet Error callback */
    HAL_ETH_ErrorCallback(heth);
 8008ea8:	6878      	ldr	r0, [r7, #4]
 8008eaa:	f007 fc91 	bl	80107d0 <HAL_ETH_ErrorCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */
    heth->MACErrorCode = (uint32_t)(0x0U);
 8008eae:	687b      	ldr	r3, [r7, #4]
 8008eb0:	2200      	movs	r2, #0
 8008eb2:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }

  /* ETH PMT IT */
  if ((mac_flag & ETH_MAC_PMT_IT) != 0U)
 8008eb6:	697b      	ldr	r3, [r7, #20]
 8008eb8:	f003 0310 	and.w	r3, r3, #16
 8008ebc:	2b00      	cmp	r3, #0
 8008ebe:	d00f      	beq.n	8008ee0 <HAL_ETH_IRQHandler+0x198>
  {
    /* Get MAC Wake-up source and clear the status register pending bit */
    heth->MACWakeUpEvent = READ_BIT(heth->Instance->MACPCSR, (ETH_MACPCSR_RWKPRCVD | ETH_MACPCSR_MGKPRCVD));
 8008ec0:	687b      	ldr	r3, [r7, #4]
 8008ec2:	681b      	ldr	r3, [r3, #0]
 8008ec4:	f8d3 30c0 	ldr.w	r3, [r3, #192]	@ 0xc0
 8008ec8:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 8008ecc:	687b      	ldr	r3, [r7, #4]
 8008ece:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered PMT callback*/
    heth->PMTCallback(heth);
#else
    /* Ethernet PMT callback */
    HAL_ETH_PMTCallback(heth);
 8008ed2:	6878      	ldr	r0, [r7, #4]
 8008ed4:	f000 f82c 	bl	8008f30 <HAL_ETH_PMTCallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACWakeUpEvent = (uint32_t)(0x0U);
 8008ed8:	687b      	ldr	r3, [r7, #4]
 8008eda:	2200      	movs	r2, #0
 8008edc:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
  }

  /* ETH EEE IT */
  if ((mac_flag & ETH_MAC_LPI_IT) != 0U)
 8008ee0:	697b      	ldr	r3, [r7, #20]
 8008ee2:	f003 0320 	and.w	r3, r3, #32
 8008ee6:	2b00      	cmp	r3, #0
 8008ee8:	d00f      	beq.n	8008f0a <HAL_ETH_IRQHandler+0x1c2>
  {
    /* Get MAC LPI interrupt source and clear the status register pending bit */
    heth->MACLPIEvent = READ_BIT(heth->Instance->MACLCSR, 0x0000000FU);
 8008eea:	687b      	ldr	r3, [r7, #4]
 8008eec:	681b      	ldr	r3, [r3, #0]
 8008eee:	f8d3 30d0 	ldr.w	r3, [r3, #208]	@ 0xd0
 8008ef2:	f003 020f 	and.w	r2, r3, #15
 8008ef6:	687b      	ldr	r3, [r7, #4]
 8008ef8:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered EEE callback*/
    heth->EEECallback(heth);
#else
    /* Ethernet EEE callback */
    HAL_ETH_EEECallback(heth);
 8008efc:	6878      	ldr	r0, [r7, #4]
 8008efe:	f000 f821 	bl	8008f44 <HAL_ETH_EEECallback>
#endif  /* USE_HAL_ETH_REGISTER_CALLBACKS */

    heth->MACLPIEvent = (uint32_t)(0x0U);
 8008f02:	687b      	ldr	r3, [r7, #4]
 8008f04:	2200      	movs	r2, #0
 8008f06:	f8c3 2098 	str.w	r2, [r3, #152]	@ 0x98
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
    }
  }
#else /* DUAL_CORE not defined */
  /* check ETH WAKEUP exti flag */
  if ((exti_d1_flag & ETH_WAKEUP_EXTI_LINE) != 0U)
 8008f0a:	68bb      	ldr	r3, [r7, #8]
 8008f0c:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 8008f10:	2b00      	cmp	r3, #0
 8008f12:	d006      	beq.n	8008f22 <HAL_ETH_IRQHandler+0x1da>
  {
    /* Clear ETH WAKEUP Exti pending bit */
    __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG(ETH_WAKEUP_EXTI_LINE);
 8008f14:	4b05      	ldr	r3, [pc, #20]	@ (8008f2c <HAL_ETH_IRQHandler+0x1e4>)
 8008f16:	f44f 0280 	mov.w	r2, #4194304	@ 0x400000
 8008f1a:	629a      	str	r2, [r3, #40]	@ 0x28
#if (USE_HAL_ETH_REGISTER_CALLBACKS == 1)
    /* Call registered WakeUp callback*/
    heth->WakeUpCallback(heth);
#else
    /* ETH WAKEUP callback */
    HAL_ETH_WakeUpCallback(heth);
 8008f1c:	6878      	ldr	r0, [r7, #4]
 8008f1e:	f000 f81b 	bl	8008f58 <HAL_ETH_WakeUpCallback>
#endif /* USE_HAL_ETH_REGISTER_CALLBACKS */
  }
#endif /* DUAL_CORE */
}
 8008f22:	bf00      	nop
 8008f24:	3718      	adds	r7, #24
 8008f26:	46bd      	mov	sp, r7
 8008f28:	bd80      	pop	{r7, pc}
 8008f2a:	bf00      	nop
 8008f2c:	58000080 	.word	0x58000080

08008f30 <HAL_ETH_PMTCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_PMTCallback(ETH_HandleTypeDef *heth)
{
 8008f30:	b480      	push	{r7}
 8008f32:	b083      	sub	sp, #12
 8008f34:	af00      	add	r7, sp, #0
 8008f36:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_PMTCallback could be implemented in the user file
  */
}
 8008f38:	bf00      	nop
 8008f3a:	370c      	adds	r7, #12
 8008f3c:	46bd      	mov	sp, r7
 8008f3e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008f42:	4770      	bx	lr

08008f44 <HAL_ETH_EEECallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_EEECallback(ETH_HandleTypeDef *heth)
{
 8008f44:	b480      	push	{r7}
 8008f46:	b083      	sub	sp, #12
 8008f48:	af00      	add	r7, sp, #0
 8008f4a:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
  the HAL_ETH_EEECallback could be implemented in the user file
  */
}
 8008f4c:	bf00      	nop
 8008f4e:	370c      	adds	r7, #12
 8008f50:	46bd      	mov	sp, r7
 8008f52:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008f56:	4770      	bx	lr

08008f58 <HAL_ETH_WakeUpCallback>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
__weak void HAL_ETH_WakeUpCallback(ETH_HandleTypeDef *heth)
{
 8008f58:	b480      	push	{r7}
 8008f5a:	b083      	sub	sp, #12
 8008f5c:	af00      	add	r7, sp, #0
 8008f5e:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(heth);
  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_ETH_WakeUpCallback could be implemented in the user file
   */
}
 8008f60:	bf00      	nop
 8008f62:	370c      	adds	r7, #12
 8008f64:	46bd      	mov	sp, r7
 8008f66:	f85d 7b04 	ldr.w	r7, [sp], #4
 8008f6a:	4770      	bx	lr

08008f6c <HAL_ETH_ReadPHYRegister>:
  * @param pRegValue: parameter to hold read value
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                          uint32_t *pRegValue)
{
 8008f6c:	b580      	push	{r7, lr}
 8008f6e:	b086      	sub	sp, #24
 8008f70:	af00      	add	r7, sp, #0
 8008f72:	60f8      	str	r0, [r7, #12]
 8008f74:	60b9      	str	r1, [r7, #8]
 8008f76:	607a      	str	r2, [r7, #4]
 8008f78:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 8008f7a:	68fb      	ldr	r3, [r7, #12]
 8008f7c:	681b      	ldr	r3, [r3, #0]
 8008f7e:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008f82:	f003 0301 	and.w	r3, r3, #1
 8008f86:	2b00      	cmp	r3, #0
 8008f88:	d001      	beq.n	8008f8e <HAL_ETH_ReadPHYRegister+0x22>
  {
    return HAL_ERROR;
 8008f8a:	2301      	movs	r3, #1
 8008f8c:	e03e      	b.n	800900c <HAL_ETH_ReadPHYRegister+0xa0>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 8008f8e:	68fb      	ldr	r3, [r7, #12]
 8008f90:	681b      	ldr	r3, [r3, #0]
 8008f92:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008f96:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the read mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 8008f98:	697b      	ldr	r3, [r7, #20]
 8008f9a:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 8008f9e:	68bb      	ldr	r3, [r7, #8]
 8008fa0:	055b      	lsls	r3, r3, #21
 8008fa2:	4313      	orrs	r3, r2
 8008fa4:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 8008fa6:	697b      	ldr	r3, [r7, #20]
 8008fa8:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 8008fac:	687b      	ldr	r3, [r7, #4]
 8008fae:	041b      	lsls	r3, r3, #16
 8008fb0:	4313      	orrs	r3, r2
 8008fb2:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_RD);
 8008fb4:	697b      	ldr	r3, [r7, #20]
 8008fb6:	f043 030c 	orr.w	r3, r3, #12
 8008fba:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 8008fbc:	697b      	ldr	r3, [r7, #20]
 8008fbe:	f043 0301 	orr.w	r3, r3, #1
 8008fc2:	617b      	str	r3, [r7, #20]

  /* Write the result value into the MDII Address register */
  WRITE_REG(heth->Instance->MACMDIOAR, tmpreg);
 8008fc4:	68fb      	ldr	r3, [r7, #12]
 8008fc6:	681b      	ldr	r3, [r3, #0]
 8008fc8:	697a      	ldr	r2, [r7, #20]
 8008fca:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200

  tickstart = HAL_GetTick();
 8008fce:	f7fc fd13 	bl	80059f8 <HAL_GetTick>
 8008fd2:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008fd4:	e009      	b.n	8008fea <HAL_ETH_ReadPHYRegister+0x7e>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 8008fd6:	f7fc fd0f 	bl	80059f8 <HAL_GetTick>
 8008fda:	4602      	mov	r2, r0
 8008fdc:	693b      	ldr	r3, [r7, #16]
 8008fde:	1ad3      	subs	r3, r2, r3
 8008fe0:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8008fe4:	d901      	bls.n	8008fea <HAL_ETH_ReadPHYRegister+0x7e>
    {
      return HAL_ERROR;
 8008fe6:	2301      	movs	r3, #1
 8008fe8:	e010      	b.n	800900c <HAL_ETH_ReadPHYRegister+0xa0>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8008fea:	68fb      	ldr	r3, [r7, #12]
 8008fec:	681b      	ldr	r3, [r3, #0]
 8008fee:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 8008ff2:	f003 0301 	and.w	r3, r3, #1
 8008ff6:	2b00      	cmp	r3, #0
 8008ff8:	d1ed      	bne.n	8008fd6 <HAL_ETH_ReadPHYRegister+0x6a>
    }
  }

  /* Get MACMIIDR value */
  WRITE_REG(*pRegValue, (uint16_t)heth->Instance->MACMDIODR);
 8008ffa:	68fb      	ldr	r3, [r7, #12]
 8008ffc:	681b      	ldr	r3, [r3, #0]
 8008ffe:	f8d3 3204 	ldr.w	r3, [r3, #516]	@ 0x204
 8009002:	b29b      	uxth	r3, r3
 8009004:	461a      	mov	r2, r3
 8009006:	683b      	ldr	r3, [r7, #0]
 8009008:	601a      	str	r2, [r3, #0]

  return HAL_OK;
 800900a:	2300      	movs	r3, #0
}
 800900c:	4618      	mov	r0, r3
 800900e:	3718      	adds	r7, #24
 8009010:	46bd      	mov	sp, r7
 8009012:	bd80      	pop	{r7, pc}

08009014 <HAL_ETH_WritePHYRegister>:
  * @param  RegValue: the value to write
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_WritePHYRegister(const ETH_HandleTypeDef *heth, uint32_t PHYAddr, uint32_t PHYReg,
                                           uint32_t RegValue)
{
 8009014:	b580      	push	{r7, lr}
 8009016:	b086      	sub	sp, #24
 8009018:	af00      	add	r7, sp, #0
 800901a:	60f8      	str	r0, [r7, #12]
 800901c:	60b9      	str	r1, [r7, #8]
 800901e:	607a      	str	r2, [r7, #4]
 8009020:	603b      	str	r3, [r7, #0]
  uint32_t tickstart;
  uint32_t tmpreg;

  /* Check for the Busy flag */
  if (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) != (uint32_t)RESET)
 8009022:	68fb      	ldr	r3, [r7, #12]
 8009024:	681b      	ldr	r3, [r3, #0]
 8009026:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 800902a:	f003 0301 	and.w	r3, r3, #1
 800902e:	2b00      	cmp	r3, #0
 8009030:	d001      	beq.n	8009036 <HAL_ETH_WritePHYRegister+0x22>
  {
    return HAL_ERROR;
 8009032:	2301      	movs	r3, #1
 8009034:	e03c      	b.n	80090b0 <HAL_ETH_WritePHYRegister+0x9c>
  }

  /* Get the  MACMDIOAR value */
  WRITE_REG(tmpreg, heth->Instance->MACMDIOAR);
 8009036:	68fb      	ldr	r3, [r7, #12]
 8009038:	681b      	ldr	r3, [r3, #0]
 800903a:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 800903e:	617b      	str	r3, [r7, #20]
     - Set the PHY device address
     - Set the PHY register address
     - Set the write mode
     - Set the MII Busy bit */

  MODIFY_REG(tmpreg, ETH_MACMDIOAR_PA, (PHYAddr << 21));
 8009040:	697b      	ldr	r3, [r7, #20]
 8009042:	f023 7278 	bic.w	r2, r3, #65011712	@ 0x3e00000
 8009046:	68bb      	ldr	r3, [r7, #8]
 8009048:	055b      	lsls	r3, r3, #21
 800904a:	4313      	orrs	r3, r2
 800904c:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_RDA, (PHYReg << 16));
 800904e:	697b      	ldr	r3, [r7, #20]
 8009050:	f423 12f8 	bic.w	r2, r3, #2031616	@ 0x1f0000
 8009054:	687b      	ldr	r3, [r7, #4]
 8009056:	041b      	lsls	r3, r3, #16
 8009058:	4313      	orrs	r3, r2
 800905a:	617b      	str	r3, [r7, #20]
  MODIFY_REG(tmpreg, ETH_MACMDIOAR_MOC, ETH_MACMDIOAR_MOC_WR);
 800905c:	697b      	ldr	r3, [r7, #20]
 800905e:	f023 030c 	bic.w	r3, r3, #12
 8009062:	f043 0304 	orr.w	r3, r3, #4
 8009066:	617b      	str	r3, [r7, #20]
  SET_BIT(tmpreg, ETH_MACMDIOAR_MB);
 8009068:	697b      	ldr	r3, [r7, #20]
 800906a:	f043 0301 	orr.w	r3, r3, #1
 800906e:	617b      	str	r3, [r7, #20]

  /* Give the value to the MII data register */
  WRITE_REG(ETH->MACMDIODR, (uint16_t)RegValue);
 8009070:	683b      	ldr	r3, [r7, #0]
 8009072:	b29a      	uxth	r2, r3
 8009074:	4b10      	ldr	r3, [pc, #64]	@ (80090b8 <HAL_ETH_WritePHYRegister+0xa4>)
 8009076:	f8c3 2204 	str.w	r2, [r3, #516]	@ 0x204

  /* Write the result value into the MII Address register */
  WRITE_REG(ETH->MACMDIOAR, tmpreg);
 800907a:	4a0f      	ldr	r2, [pc, #60]	@ (80090b8 <HAL_ETH_WritePHYRegister+0xa4>)
 800907c:	697b      	ldr	r3, [r7, #20]
 800907e:	f8c2 3200 	str.w	r3, [r2, #512]	@ 0x200

  tickstart = HAL_GetTick();
 8009082:	f7fc fcb9 	bl	80059f8 <HAL_GetTick>
 8009086:	6138      	str	r0, [r7, #16]

  /* Wait for the Busy flag */
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 8009088:	e009      	b.n	800909e <HAL_ETH_WritePHYRegister+0x8a>
  {
    if (((HAL_GetTick() - tickstart) > ETH_MDIO_BUS_TIMEOUT))
 800908a:	f7fc fcb5 	bl	80059f8 <HAL_GetTick>
 800908e:	4602      	mov	r2, r0
 8009090:	693b      	ldr	r3, [r7, #16]
 8009092:	1ad3      	subs	r3, r2, r3
 8009094:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 8009098:	d901      	bls.n	800909e <HAL_ETH_WritePHYRegister+0x8a>
    {
      return HAL_ERROR;
 800909a:	2301      	movs	r3, #1
 800909c:	e008      	b.n	80090b0 <HAL_ETH_WritePHYRegister+0x9c>
  while (READ_BIT(heth->Instance->MACMDIOAR, ETH_MACMDIOAR_MB) > 0U)
 800909e:	68fb      	ldr	r3, [r7, #12]
 80090a0:	681b      	ldr	r3, [r3, #0]
 80090a2:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80090a6:	f003 0301 	and.w	r3, r3, #1
 80090aa:	2b00      	cmp	r3, #0
 80090ac:	d1ed      	bne.n	800908a <HAL_ETH_WritePHYRegister+0x76>
    }
  }

  return HAL_OK;
 80090ae:	2300      	movs	r3, #0
}
 80090b0:	4618      	mov	r0, r3
 80090b2:	3718      	adds	r7, #24
 80090b4:	46bd      	mov	sp, r7
 80090b6:	bd80      	pop	{r7, pc}
 80090b8:	40028000 	.word	0x40028000

080090bc <HAL_ETH_GetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that will hold
  *         the configuration of the MAC.
  * @retval HAL Status
  */
HAL_StatusTypeDef HAL_ETH_GetMACConfig(const ETH_HandleTypeDef *heth, ETH_MACConfigTypeDef *macconf)
{
 80090bc:	b480      	push	{r7}
 80090be:	b083      	sub	sp, #12
 80090c0:	af00      	add	r7, sp, #0
 80090c2:	6078      	str	r0, [r7, #4]
 80090c4:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 80090c6:	683b      	ldr	r3, [r7, #0]
 80090c8:	2b00      	cmp	r3, #0
 80090ca:	d101      	bne.n	80090d0 <HAL_ETH_GetMACConfig+0x14>
  {
    return HAL_ERROR;
 80090cc:	2301      	movs	r3, #1
 80090ce:	e1c3      	b.n	8009458 <HAL_ETH_GetMACConfig+0x39c>
  }

  /* Get MAC parameters */
  macconf->PreambleLength = READ_BIT(heth->Instance->MACCR, ETH_MACCR_PRELEN);
 80090d0:	687b      	ldr	r3, [r7, #4]
 80090d2:	681b      	ldr	r3, [r3, #0]
 80090d4:	681b      	ldr	r3, [r3, #0]
 80090d6:	f003 020c 	and.w	r2, r3, #12
 80090da:	683b      	ldr	r3, [r7, #0]
 80090dc:	62da      	str	r2, [r3, #44]	@ 0x2c
  macconf->DeferralCheck = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DC) >> 4) > 0U) ? ENABLE : DISABLE;
 80090de:	687b      	ldr	r3, [r7, #4]
 80090e0:	681b      	ldr	r3, [r3, #0]
 80090e2:	681b      	ldr	r3, [r3, #0]
 80090e4:	f003 0310 	and.w	r3, r3, #16
 80090e8:	2b00      	cmp	r3, #0
 80090ea:	bf14      	ite	ne
 80090ec:	2301      	movne	r3, #1
 80090ee:	2300      	moveq	r3, #0
 80090f0:	b2db      	uxtb	r3, r3
 80090f2:	461a      	mov	r2, r3
 80090f4:	683b      	ldr	r3, [r7, #0]
 80090f6:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  macconf->BackOffLimit = READ_BIT(heth->Instance->MACCR, ETH_MACCR_BL);
 80090fa:	687b      	ldr	r3, [r7, #4]
 80090fc:	681b      	ldr	r3, [r3, #0]
 80090fe:	681b      	ldr	r3, [r3, #0]
 8009100:	f003 0260 	and.w	r2, r3, #96	@ 0x60
 8009104:	683b      	ldr	r3, [r7, #0]
 8009106:	625a      	str	r2, [r3, #36]	@ 0x24
  macconf->RetryTransmission = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DR) >> 8) == 0U) ? ENABLE : DISABLE;
 8009108:	687b      	ldr	r3, [r7, #4]
 800910a:	681b      	ldr	r3, [r3, #0]
 800910c:	681b      	ldr	r3, [r3, #0]
 800910e:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 8009112:	2b00      	cmp	r3, #0
 8009114:	bf0c      	ite	eq
 8009116:	2301      	moveq	r3, #1
 8009118:	2300      	movne	r3, #0
 800911a:	b2db      	uxtb	r3, r3
 800911c:	461a      	mov	r2, r3
 800911e:	683b      	ldr	r3, [r7, #0]
 8009120:	f883 2020 	strb.w	r2, [r3, #32]
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 8009124:	687b      	ldr	r3, [r7, #4]
 8009126:	681b      	ldr	r3, [r3, #0]
 8009128:	681b      	ldr	r3, [r3, #0]
 800912a:	f403 7300 	and.w	r3, r3, #512	@ 0x200
                                        ? ENABLE : DISABLE;
 800912e:	2b00      	cmp	r3, #0
 8009130:	bf14      	ite	ne
 8009132:	2301      	movne	r3, #1
 8009134:	2300      	moveq	r3, #0
 8009136:	b2db      	uxtb	r3, r3
 8009138:	461a      	mov	r2, r3
  macconf->CarrierSenseDuringTransmit = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DCRS) >> 9) > 0U)
 800913a:	683b      	ldr	r3, [r7, #0]
 800913c:	77da      	strb	r2, [r3, #31]
  macconf->ReceiveOwn = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_DO) >> 10) == 0U) ? ENABLE : DISABLE;
 800913e:	687b      	ldr	r3, [r7, #4]
 8009140:	681b      	ldr	r3, [r3, #0]
 8009142:	681b      	ldr	r3, [r3, #0]
 8009144:	f403 6380 	and.w	r3, r3, #1024	@ 0x400
 8009148:	2b00      	cmp	r3, #0
 800914a:	bf0c      	ite	eq
 800914c:	2301      	moveq	r3, #1
 800914e:	2300      	movne	r3, #0
 8009150:	b2db      	uxtb	r3, r3
 8009152:	461a      	mov	r2, r3
 8009154:	683b      	ldr	r3, [r7, #0]
 8009156:	779a      	strb	r2, [r3, #30]
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 8009158:	687b      	ldr	r3, [r7, #4]
 800915a:	681b      	ldr	r3, [r3, #0]
 800915c:	681b      	ldr	r3, [r3, #0]
                                                   ETH_MACCR_ECRSFD) >> 11) > 0U) ? ENABLE : DISABLE;
 800915e:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 8009162:	2b00      	cmp	r3, #0
 8009164:	bf14      	ite	ne
 8009166:	2301      	movne	r3, #1
 8009168:	2300      	moveq	r3, #0
 800916a:	b2db      	uxtb	r3, r3
 800916c:	461a      	mov	r2, r3
  macconf->CarrierSenseBeforeTransmit = ((READ_BIT(heth->Instance->MACCR,
 800916e:	683b      	ldr	r3, [r7, #0]
 8009170:	775a      	strb	r2, [r3, #29]
  macconf->LoopbackMode = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_LM) >> 12) > 0U) ? ENABLE : DISABLE;
 8009172:	687b      	ldr	r3, [r7, #4]
 8009174:	681b      	ldr	r3, [r3, #0]
 8009176:	681b      	ldr	r3, [r3, #0]
 8009178:	f403 5380 	and.w	r3, r3, #4096	@ 0x1000
 800917c:	2b00      	cmp	r3, #0
 800917e:	bf14      	ite	ne
 8009180:	2301      	movne	r3, #1
 8009182:	2300      	moveq	r3, #0
 8009184:	b2db      	uxtb	r3, r3
 8009186:	461a      	mov	r2, r3
 8009188:	683b      	ldr	r3, [r7, #0]
 800918a:	771a      	strb	r2, [r3, #28]
  macconf->DuplexMode = READ_BIT(heth->Instance->MACCR, ETH_MACCR_DM);
 800918c:	687b      	ldr	r3, [r7, #4]
 800918e:	681b      	ldr	r3, [r3, #0]
 8009190:	681b      	ldr	r3, [r3, #0]
 8009192:	f403 5200 	and.w	r2, r3, #8192	@ 0x2000
 8009196:	683b      	ldr	r3, [r7, #0]
 8009198:	619a      	str	r2, [r3, #24]
  macconf->Speed = READ_BIT(heth->Instance->MACCR, ETH_MACCR_FES);
 800919a:	687b      	ldr	r3, [r7, #4]
 800919c:	681b      	ldr	r3, [r3, #0]
 800919e:	681b      	ldr	r3, [r3, #0]
 80091a0:	f403 4280 	and.w	r2, r3, #16384	@ 0x4000
 80091a4:	683b      	ldr	r3, [r7, #0]
 80091a6:	615a      	str	r2, [r3, #20]
  macconf->JumboPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JE) >> 16) > 0U) ? ENABLE : DISABLE;
 80091a8:	687b      	ldr	r3, [r7, #4]
 80091aa:	681b      	ldr	r3, [r3, #0]
 80091ac:	681b      	ldr	r3, [r3, #0]
 80091ae:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80091b2:	2b00      	cmp	r3, #0
 80091b4:	bf14      	ite	ne
 80091b6:	2301      	movne	r3, #1
 80091b8:	2300      	moveq	r3, #0
 80091ba:	b2db      	uxtb	r3, r3
 80091bc:	461a      	mov	r2, r3
 80091be:	683b      	ldr	r3, [r7, #0]
 80091c0:	749a      	strb	r2, [r3, #18]
  macconf->Jabber = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_JD) >> 17) == 0U) ? ENABLE : DISABLE;
 80091c2:	687b      	ldr	r3, [r7, #4]
 80091c4:	681b      	ldr	r3, [r3, #0]
 80091c6:	681b      	ldr	r3, [r3, #0]
 80091c8:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 80091cc:	2b00      	cmp	r3, #0
 80091ce:	bf0c      	ite	eq
 80091d0:	2301      	moveq	r3, #1
 80091d2:	2300      	movne	r3, #0
 80091d4:	b2db      	uxtb	r3, r3
 80091d6:	461a      	mov	r2, r3
 80091d8:	683b      	ldr	r3, [r7, #0]
 80091da:	745a      	strb	r2, [r3, #17]
  macconf->Watchdog = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_WD) >> 19) == 0U) ? ENABLE : DISABLE;
 80091dc:	687b      	ldr	r3, [r7, #4]
 80091de:	681b      	ldr	r3, [r3, #0]
 80091e0:	681b      	ldr	r3, [r3, #0]
 80091e2:	f403 2300 	and.w	r3, r3, #524288	@ 0x80000
 80091e6:	2b00      	cmp	r3, #0
 80091e8:	bf0c      	ite	eq
 80091ea:	2301      	moveq	r3, #1
 80091ec:	2300      	movne	r3, #0
 80091ee:	b2db      	uxtb	r3, r3
 80091f0:	461a      	mov	r2, r3
 80091f2:	683b      	ldr	r3, [r7, #0]
 80091f4:	741a      	strb	r2, [r3, #16]
  macconf->AutomaticPadCRCStrip = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_ACS) >> 20) > 0U) ? ENABLE : DISABLE;
 80091f6:	687b      	ldr	r3, [r7, #4]
 80091f8:	681b      	ldr	r3, [r3, #0]
 80091fa:	681b      	ldr	r3, [r3, #0]
 80091fc:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 8009200:	2b00      	cmp	r3, #0
 8009202:	bf14      	ite	ne
 8009204:	2301      	movne	r3, #1
 8009206:	2300      	moveq	r3, #0
 8009208:	b2db      	uxtb	r3, r3
 800920a:	461a      	mov	r2, r3
 800920c:	683b      	ldr	r3, [r7, #0]
 800920e:	73da      	strb	r2, [r3, #15]
  macconf->CRCStripTypePacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_CST) >> 21) > 0U) ? ENABLE : DISABLE;
 8009210:	687b      	ldr	r3, [r7, #4]
 8009212:	681b      	ldr	r3, [r3, #0]
 8009214:	681b      	ldr	r3, [r3, #0]
 8009216:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 800921a:	2b00      	cmp	r3, #0
 800921c:	bf14      	ite	ne
 800921e:	2301      	movne	r3, #1
 8009220:	2300      	moveq	r3, #0
 8009222:	b2db      	uxtb	r3, r3
 8009224:	461a      	mov	r2, r3
 8009226:	683b      	ldr	r3, [r7, #0]
 8009228:	739a      	strb	r2, [r3, #14]
  macconf->Support2KPacket = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_S2KP) >> 22) > 0U) ? ENABLE : DISABLE;
 800922a:	687b      	ldr	r3, [r7, #4]
 800922c:	681b      	ldr	r3, [r3, #0]
 800922e:	681b      	ldr	r3, [r3, #0]
 8009230:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 8009234:	2b00      	cmp	r3, #0
 8009236:	bf14      	ite	ne
 8009238:	2301      	movne	r3, #1
 800923a:	2300      	moveq	r3, #0
 800923c:	b2db      	uxtb	r3, r3
 800923e:	461a      	mov	r2, r3
 8009240:	683b      	ldr	r3, [r7, #0]
 8009242:	735a      	strb	r2, [r3, #13]
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 8009244:	687b      	ldr	r3, [r7, #4]
 8009246:	681b      	ldr	r3, [r3, #0]
 8009248:	681b      	ldr	r3, [r3, #0]
                                                    ETH_MACCR_GPSLCE) >> 23) > 0U) ? ENABLE : DISABLE;
 800924a:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800924e:	2b00      	cmp	r3, #0
 8009250:	bf14      	ite	ne
 8009252:	2301      	movne	r3, #1
 8009254:	2300      	moveq	r3, #0
 8009256:	b2db      	uxtb	r3, r3
 8009258:	461a      	mov	r2, r3
  macconf->GiantPacketSizeLimitControl = ((READ_BIT(heth->Instance->MACCR,
 800925a:	683b      	ldr	r3, [r7, #0]
 800925c:	731a      	strb	r2, [r3, #12]
  macconf->InterPacketGapVal = READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPG);
 800925e:	687b      	ldr	r3, [r7, #4]
 8009260:	681b      	ldr	r3, [r3, #0]
 8009262:	681b      	ldr	r3, [r3, #0]
 8009264:	f003 62e0 	and.w	r2, r3, #117440512	@ 0x7000000
 8009268:	683b      	ldr	r3, [r7, #0]
 800926a:	609a      	str	r2, [r3, #8]
  macconf->ChecksumOffload = ((READ_BIT(heth->Instance->MACCR, ETH_MACCR_IPC) >> 27) > 0U) ? ENABLE : DISABLE;
 800926c:	687b      	ldr	r3, [r7, #4]
 800926e:	681b      	ldr	r3, [r3, #0]
 8009270:	681b      	ldr	r3, [r3, #0]
 8009272:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 8009276:	2b00      	cmp	r3, #0
 8009278:	bf14      	ite	ne
 800927a:	2301      	movne	r3, #1
 800927c:	2300      	moveq	r3, #0
 800927e:	b2db      	uxtb	r3, r3
 8009280:	461a      	mov	r2, r3
 8009282:	683b      	ldr	r3, [r7, #0]
 8009284:	711a      	strb	r2, [r3, #4]
  macconf->SourceAddrControl = READ_BIT(heth->Instance->MACCR, ETH_MACCR_SARC);
 8009286:	687b      	ldr	r3, [r7, #4]
 8009288:	681b      	ldr	r3, [r3, #0]
 800928a:	681b      	ldr	r3, [r3, #0]
 800928c:	f003 42e0 	and.w	r2, r3, #1879048192	@ 0x70000000
 8009290:	683b      	ldr	r3, [r7, #0]
 8009292:	601a      	str	r2, [r3, #0]

  macconf->GiantPacketSizeLimit = READ_BIT(heth->Instance->MACECR, ETH_MACECR_GPSL);
 8009294:	687b      	ldr	r3, [r7, #4]
 8009296:	681b      	ldr	r3, [r3, #0]
 8009298:	685b      	ldr	r3, [r3, #4]
 800929a:	f3c3 020d 	ubfx	r2, r3, #0, #14
 800929e:	683b      	ldr	r3, [r7, #0]
 80092a0:	635a      	str	r2, [r3, #52]	@ 0x34
  macconf->CRCCheckingRxPackets = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_DCRCC) >> 16) == 0U) ? ENABLE : DISABLE;
 80092a2:	687b      	ldr	r3, [r7, #4]
 80092a4:	681b      	ldr	r3, [r3, #0]
 80092a6:	685b      	ldr	r3, [r3, #4]
 80092a8:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 80092ac:	2b00      	cmp	r3, #0
 80092ae:	bf0c      	ite	eq
 80092b0:	2301      	moveq	r3, #1
 80092b2:	2300      	movne	r3, #0
 80092b4:	b2db      	uxtb	r3, r3
 80092b6:	461a      	mov	r2, r3
 80092b8:	683b      	ldr	r3, [r7, #0]
 80092ba:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  macconf->SlowProtocolDetect = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_SPEN) >> 17) > 0U) ? ENABLE : DISABLE;
 80092be:	687b      	ldr	r3, [r7, #4]
 80092c0:	681b      	ldr	r3, [r3, #0]
 80092c2:	685b      	ldr	r3, [r3, #4]
 80092c4:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 80092c8:	2b00      	cmp	r3, #0
 80092ca:	bf14      	ite	ne
 80092cc:	2301      	movne	r3, #1
 80092ce:	2300      	moveq	r3, #0
 80092d0:	b2db      	uxtb	r3, r3
 80092d2:	461a      	mov	r2, r3
 80092d4:	683b      	ldr	r3, [r7, #0]
 80092d6:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 80092da:	687b      	ldr	r3, [r7, #4]
 80092dc:	681b      	ldr	r3, [r3, #0]
 80092de:	685b      	ldr	r3, [r3, #4]
                                                        ETH_MACECR_USP) >> 18) > 0U) ? ENABLE : DISABLE;
 80092e0:	f403 2380 	and.w	r3, r3, #262144	@ 0x40000
 80092e4:	2b00      	cmp	r3, #0
 80092e6:	bf14      	ite	ne
 80092e8:	2301      	movne	r3, #1
 80092ea:	2300      	moveq	r3, #0
 80092ec:	b2db      	uxtb	r3, r3
 80092ee:	461a      	mov	r2, r3
  macconf->UnicastSlowProtocolPacketDetect = ((READ_BIT(heth->Instance->MACECR,
 80092f0:	683b      	ldr	r3, [r7, #0]
 80092f2:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 80092f6:	687b      	ldr	r3, [r7, #4]
 80092f8:	681b      	ldr	r3, [r3, #0]
 80092fa:	685b      	ldr	r3, [r3, #4]
 80092fc:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
                                    ? ENABLE : DISABLE;
 8009300:	2b00      	cmp	r3, #0
 8009302:	bf14      	ite	ne
 8009304:	2301      	movne	r3, #1
 8009306:	2300      	moveq	r3, #0
 8009308:	b2db      	uxtb	r3, r3
 800930a:	461a      	mov	r2, r3
  macconf->ExtendedInterPacketGap = ((READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPGEN) >> 24) > 0U)
 800930c:	683b      	ldr	r3, [r7, #0]
 800930e:	f883 2038 	strb.w	r2, [r3, #56]	@ 0x38
  macconf->ExtendedInterPacketGapVal = READ_BIT(heth->Instance->MACECR, ETH_MACECR_EIPG) >> 25;
 8009312:	687b      	ldr	r3, [r7, #4]
 8009314:	681b      	ldr	r3, [r3, #0]
 8009316:	685b      	ldr	r3, [r3, #4]
 8009318:	0e5b      	lsrs	r3, r3, #25
 800931a:	f003 021f 	and.w	r2, r3, #31
 800931e:	683b      	ldr	r3, [r7, #0]
 8009320:	63da      	str	r2, [r3, #60]	@ 0x3c

  macconf->ProgrammableWatchdog = ((READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_PWE) >> 8) > 0U) ? ENABLE : DISABLE;
 8009322:	687b      	ldr	r3, [r7, #4]
 8009324:	681b      	ldr	r3, [r3, #0]
 8009326:	68db      	ldr	r3, [r3, #12]
 8009328:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800932c:	2b00      	cmp	r3, #0
 800932e:	bf14      	ite	ne
 8009330:	2301      	movne	r3, #1
 8009332:	2300      	moveq	r3, #0
 8009334:	b2db      	uxtb	r3, r3
 8009336:	461a      	mov	r2, r3
 8009338:	683b      	ldr	r3, [r7, #0]
 800933a:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
  macconf->WatchdogTimeout = READ_BIT(heth->Instance->MACWTR, ETH_MACWTR_WTO);
 800933e:	687b      	ldr	r3, [r7, #4]
 8009340:	681b      	ldr	r3, [r3, #0]
 8009342:	68db      	ldr	r3, [r3, #12]
 8009344:	f003 020f 	and.w	r2, r3, #15
 8009348:	683b      	ldr	r3, [r7, #0]
 800934a:	645a      	str	r2, [r3, #68]	@ 0x44

  macconf->TransmitFlowControl = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_TFE) >> 1) > 0U) ? ENABLE : DISABLE;
 800934c:	687b      	ldr	r3, [r7, #4]
 800934e:	681b      	ldr	r3, [r3, #0]
 8009350:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009352:	f003 0302 	and.w	r3, r3, #2
 8009356:	2b00      	cmp	r3, #0
 8009358:	bf14      	ite	ne
 800935a:	2301      	movne	r3, #1
 800935c:	2300      	moveq	r3, #0
 800935e:	b2db      	uxtb	r3, r3
 8009360:	461a      	mov	r2, r3
 8009362:	683b      	ldr	r3, [r7, #0]
 8009364:	f883 2054 	strb.w	r2, [r3, #84]	@ 0x54
  macconf->ZeroQuantaPause = ((READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_DZPQ) >> 7) == 0U) ? ENABLE : DISABLE;
 8009368:	687b      	ldr	r3, [r7, #4]
 800936a:	681b      	ldr	r3, [r3, #0]
 800936c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800936e:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8009372:	2b00      	cmp	r3, #0
 8009374:	bf0c      	ite	eq
 8009376:	2301      	moveq	r3, #1
 8009378:	2300      	movne	r3, #0
 800937a:	b2db      	uxtb	r3, r3
 800937c:	461a      	mov	r2, r3
 800937e:	683b      	ldr	r3, [r7, #0]
 8009380:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
  macconf->PauseLowThreshold = READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PLT);
 8009384:	687b      	ldr	r3, [r7, #4]
 8009386:	681b      	ldr	r3, [r3, #0]
 8009388:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800938a:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800938e:	683b      	ldr	r3, [r7, #0]
 8009390:	651a      	str	r2, [r3, #80]	@ 0x50
  macconf->PauseTime = (READ_BIT(heth->Instance->MACTFCR, ETH_MACTFCR_PT) >> 16);
 8009392:	687b      	ldr	r3, [r7, #4]
 8009394:	681b      	ldr	r3, [r3, #0]
 8009396:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8009398:	0c1b      	lsrs	r3, r3, #16
 800939a:	b29a      	uxth	r2, r3
 800939c:	683b      	ldr	r3, [r7, #0]
 800939e:	649a      	str	r2, [r3, #72]	@ 0x48
  macconf->ReceiveFlowControl = (READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_RFE) > 0U) ? ENABLE : DISABLE;
 80093a0:	687b      	ldr	r3, [r7, #4]
 80093a2:	681b      	ldr	r3, [r3, #0]
 80093a4:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 80093a8:	f003 0301 	and.w	r3, r3, #1
 80093ac:	2b00      	cmp	r3, #0
 80093ae:	bf14      	ite	ne
 80093b0:	2301      	movne	r3, #1
 80093b2:	2300      	moveq	r3, #0
 80093b4:	b2db      	uxtb	r3, r3
 80093b6:	461a      	mov	r2, r3
 80093b8:	683b      	ldr	r3, [r7, #0]
 80093ba:	f883 2056 	strb.w	r2, [r3, #86]	@ 0x56
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 80093be:	687b      	ldr	r3, [r7, #4]
 80093c0:	681b      	ldr	r3, [r3, #0]
 80093c2:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 80093c6:	f003 0302 	and.w	r3, r3, #2
                                      ? ENABLE : DISABLE;
 80093ca:	2b00      	cmp	r3, #0
 80093cc:	bf14      	ite	ne
 80093ce:	2301      	movne	r3, #1
 80093d0:	2300      	moveq	r3, #0
 80093d2:	b2db      	uxtb	r3, r3
 80093d4:	461a      	mov	r2, r3
  macconf->UnicastPausePacketDetect = ((READ_BIT(heth->Instance->MACRFCR, ETH_MACRFCR_UP) >> 1) > 0U)
 80093d6:	683b      	ldr	r3, [r7, #0]
 80093d8:	f883 2055 	strb.w	r2, [r3, #85]	@ 0x55

  macconf->TransmitQueueMode = READ_BIT(heth->Instance->MTLTQOMR, (ETH_MTLTQOMR_TTC | ETH_MTLTQOMR_TSF));
 80093dc:	687b      	ldr	r3, [r7, #4]
 80093de:	681b      	ldr	r3, [r3, #0]
 80093e0:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 80093e4:	f003 0272 	and.w	r2, r3, #114	@ 0x72
 80093e8:	683b      	ldr	r3, [r7, #0]
 80093ea:	659a      	str	r2, [r3, #88]	@ 0x58

  macconf->ReceiveQueueMode = READ_BIT(heth->Instance->MTLRQOMR, (ETH_MTLRQOMR_RTC | ETH_MTLRQOMR_RSF));
 80093ec:	687b      	ldr	r3, [r7, #4]
 80093ee:	681b      	ldr	r3, [r3, #0]
 80093f0:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 80093f4:	f003 0223 	and.w	r2, r3, #35	@ 0x23
 80093f8:	683b      	ldr	r3, [r7, #0]
 80093fa:	65da      	str	r2, [r3, #92]	@ 0x5c
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 80093fc:	687b      	ldr	r3, [r7, #4]
 80093fe:	681b      	ldr	r3, [r3, #0]
 8009400:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                      ETH_MTLRQOMR_FUP) >> 3) > 0U) ? ENABLE : DISABLE;
 8009404:	f003 0308 	and.w	r3, r3, #8
 8009408:	2b00      	cmp	r3, #0
 800940a:	bf14      	ite	ne
 800940c:	2301      	movne	r3, #1
 800940e:	2300      	moveq	r3, #0
 8009410:	b2db      	uxtb	r3, r3
 8009412:	461a      	mov	r2, r3
  macconf->ForwardRxUndersizedGoodPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8009414:	683b      	ldr	r3, [r7, #0]
 8009416:	f883 2062 	strb.w	r2, [r3, #98]	@ 0x62
  macconf->ForwardRxErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_FEP) >> 4) > 0U) ? ENABLE : DISABLE;
 800941a:	687b      	ldr	r3, [r7, #4]
 800941c:	681b      	ldr	r3, [r3, #0]
 800941e:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8009422:	f003 0310 	and.w	r3, r3, #16
 8009426:	2b00      	cmp	r3, #0
 8009428:	bf14      	ite	ne
 800942a:	2301      	movne	r3, #1
 800942c:	2300      	moveq	r3, #0
 800942e:	b2db      	uxtb	r3, r3
 8009430:	461a      	mov	r2, r3
 8009432:	683b      	ldr	r3, [r7, #0]
 8009434:	f883 2061 	strb.w	r2, [r3, #97]	@ 0x61
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8009438:	687b      	ldr	r3, [r7, #4]
 800943a:	681b      	ldr	r3, [r3, #0]
 800943c:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
                                                     ETH_MTLRQOMR_DISTCPEF) >> 6) == 0U) ? ENABLE : DISABLE;
 8009440:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 8009444:	2b00      	cmp	r3, #0
 8009446:	bf0c      	ite	eq
 8009448:	2301      	moveq	r3, #1
 800944a:	2300      	movne	r3, #0
 800944c:	b2db      	uxtb	r3, r3
 800944e:	461a      	mov	r2, r3
  macconf->DropTCPIPChecksumErrorPacket = ((READ_BIT(heth->Instance->MTLRQOMR,
 8009450:	683b      	ldr	r3, [r7, #0]
 8009452:	f883 2060 	strb.w	r2, [r3, #96]	@ 0x60

  return HAL_OK;
 8009456:	2300      	movs	r3, #0
}
 8009458:	4618      	mov	r0, r3
 800945a:	370c      	adds	r7, #12
 800945c:	46bd      	mov	sp, r7
 800945e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009462:	4770      	bx	lr

08009464 <HAL_ETH_SetMACConfig>:
  * @param  macconf: pointer to a ETH_MACConfigTypeDef structure that contains
  *         the configuration of the MAC.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ETH_SetMACConfig(ETH_HandleTypeDef *heth,  ETH_MACConfigTypeDef *macconf)
{
 8009464:	b580      	push	{r7, lr}
 8009466:	b082      	sub	sp, #8
 8009468:	af00      	add	r7, sp, #0
 800946a:	6078      	str	r0, [r7, #4]
 800946c:	6039      	str	r1, [r7, #0]
  if (macconf == NULL)
 800946e:	683b      	ldr	r3, [r7, #0]
 8009470:	2b00      	cmp	r3, #0
 8009472:	d101      	bne.n	8009478 <HAL_ETH_SetMACConfig+0x14>
  {
    return HAL_ERROR;
 8009474:	2301      	movs	r3, #1
 8009476:	e00b      	b.n	8009490 <HAL_ETH_SetMACConfig+0x2c>
  }

  if (heth->gState == HAL_ETH_STATE_READY)
 8009478:	687b      	ldr	r3, [r7, #4]
 800947a:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800947e:	2b10      	cmp	r3, #16
 8009480:	d105      	bne.n	800948e <HAL_ETH_SetMACConfig+0x2a>
  {
    ETH_SetMACConfig(heth, macconf);
 8009482:	6839      	ldr	r1, [r7, #0]
 8009484:	6878      	ldr	r0, [r7, #4]
 8009486:	f000 f865 	bl	8009554 <ETH_SetMACConfig>

    return HAL_OK;
 800948a:	2300      	movs	r3, #0
 800948c:	e000      	b.n	8009490 <HAL_ETH_SetMACConfig+0x2c>
  }
  else
  {
    return HAL_ERROR;
 800948e:	2301      	movs	r3, #1
  }
}
 8009490:	4618      	mov	r0, r3
 8009492:	3708      	adds	r7, #8
 8009494:	46bd      	mov	sp, r7
 8009496:	bd80      	pop	{r7, pc}

08009498 <HAL_ETH_SetMDIOClockRange>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
void HAL_ETH_SetMDIOClockRange(ETH_HandleTypeDef *heth)
{
 8009498:	b580      	push	{r7, lr}
 800949a:	b084      	sub	sp, #16
 800949c:	af00      	add	r7, sp, #0
 800949e:	6078      	str	r0, [r7, #4]
  uint32_t hclk;
  uint32_t tmpreg;

  /* Get the ETHERNET MACMDIOAR value */
  tmpreg = (heth->Instance)->MACMDIOAR;
 80094a0:	687b      	ldr	r3, [r7, #4]
 80094a2:	681b      	ldr	r3, [r3, #0]
 80094a4:	f8d3 3200 	ldr.w	r3, [r3, #512]	@ 0x200
 80094a8:	60fb      	str	r3, [r7, #12]

  /* Clear CSR Clock Range bits */
  tmpreg &= ~ETH_MACMDIOAR_CR;
 80094aa:	68fb      	ldr	r3, [r7, #12]
 80094ac:	f423 6370 	bic.w	r3, r3, #3840	@ 0xf00
 80094b0:	60fb      	str	r3, [r7, #12]

  /* Get hclk frequency value */
  hclk = HAL_RCC_GetHCLKFreq();
 80094b2:	f002 f8e5 	bl	800b680 <HAL_RCC_GetHCLKFreq>
 80094b6:	60b8      	str	r0, [r7, #8]

  /* Set CR bits depending on hclk value */
  if (hclk < 35000000U)
 80094b8:	68bb      	ldr	r3, [r7, #8]
 80094ba:	4a1a      	ldr	r2, [pc, #104]	@ (8009524 <HAL_ETH_SetMDIOClockRange+0x8c>)
 80094bc:	4293      	cmp	r3, r2
 80094be:	d804      	bhi.n	80094ca <HAL_ETH_SetMDIOClockRange+0x32>
  {
    /* CSR Clock Range between 0-35 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV16;
 80094c0:	68fb      	ldr	r3, [r7, #12]
 80094c2:	f443 7300 	orr.w	r3, r3, #512	@ 0x200
 80094c6:	60fb      	str	r3, [r7, #12]
 80094c8:	e022      	b.n	8009510 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 60000000U)
 80094ca:	68bb      	ldr	r3, [r7, #8]
 80094cc:	4a16      	ldr	r2, [pc, #88]	@ (8009528 <HAL_ETH_SetMDIOClockRange+0x90>)
 80094ce:	4293      	cmp	r3, r2
 80094d0:	d204      	bcs.n	80094dc <HAL_ETH_SetMDIOClockRange+0x44>
  {
    /* CSR Clock Range between 35-60 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV26;
 80094d2:	68fb      	ldr	r3, [r7, #12]
 80094d4:	f443 7340 	orr.w	r3, r3, #768	@ 0x300
 80094d8:	60fb      	str	r3, [r7, #12]
 80094da:	e019      	b.n	8009510 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 100000000U)
 80094dc:	68bb      	ldr	r3, [r7, #8]
 80094de:	4a13      	ldr	r2, [pc, #76]	@ (800952c <HAL_ETH_SetMDIOClockRange+0x94>)
 80094e0:	4293      	cmp	r3, r2
 80094e2:	d915      	bls.n	8009510 <HAL_ETH_SetMDIOClockRange+0x78>
  {
    /* CSR Clock Range between 60-100 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV42;
  }
  else if (hclk < 150000000U)
 80094e4:	68bb      	ldr	r3, [r7, #8]
 80094e6:	4a12      	ldr	r2, [pc, #72]	@ (8009530 <HAL_ETH_SetMDIOClockRange+0x98>)
 80094e8:	4293      	cmp	r3, r2
 80094ea:	d804      	bhi.n	80094f6 <HAL_ETH_SetMDIOClockRange+0x5e>
  {
    /* CSR Clock Range between 100-150 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV62;
 80094ec:	68fb      	ldr	r3, [r7, #12]
 80094ee:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 80094f2:	60fb      	str	r3, [r7, #12]
 80094f4:	e00c      	b.n	8009510 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else if (hclk < 250000000U)
 80094f6:	68bb      	ldr	r3, [r7, #8]
 80094f8:	4a0e      	ldr	r2, [pc, #56]	@ (8009534 <HAL_ETH_SetMDIOClockRange+0x9c>)
 80094fa:	4293      	cmp	r3, r2
 80094fc:	d804      	bhi.n	8009508 <HAL_ETH_SetMDIOClockRange+0x70>
  {
    /* CSR Clock Range between 150-250 MHz */
    tmpreg |= (uint32_t)ETH_MACMDIOAR_CR_DIV102;
 80094fe:	68fb      	ldr	r3, [r7, #12]
 8009500:	f443 6380 	orr.w	r3, r3, #1024	@ 0x400
 8009504:	60fb      	str	r3, [r7, #12]
 8009506:	e003      	b.n	8009510 <HAL_ETH_SetMDIOClockRange+0x78>
  }
  else /* (hclk >= 250000000U) */
  {
    /* CSR Clock >= 250 MHz */
    tmpreg |= (uint32_t)(ETH_MACMDIOAR_CR_DIV124);
 8009508:	68fb      	ldr	r3, [r7, #12]
 800950a:	f443 63a0 	orr.w	r3, r3, #1280	@ 0x500
 800950e:	60fb      	str	r3, [r7, #12]
  }

  /* Configure the CSR Clock Range */
  (heth->Instance)->MACMDIOAR = (uint32_t)tmpreg;
 8009510:	687b      	ldr	r3, [r7, #4]
 8009512:	681b      	ldr	r3, [r3, #0]
 8009514:	68fa      	ldr	r2, [r7, #12]
 8009516:	f8c3 2200 	str.w	r2, [r3, #512]	@ 0x200
}
 800951a:	bf00      	nop
 800951c:	3710      	adds	r7, #16
 800951e:	46bd      	mov	sp, r7
 8009520:	bd80      	pop	{r7, pc}
 8009522:	bf00      	nop
 8009524:	02160ebf 	.word	0x02160ebf
 8009528:	03938700 	.word	0x03938700
 800952c:	05f5e0ff 	.word	0x05f5e0ff
 8009530:	08f0d17f 	.word	0x08f0d17f
 8009534:	0ee6b27f 	.word	0x0ee6b27f

08009538 <HAL_ETH_GetDMAError>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval ETH DMA Error Code
  */
uint32_t HAL_ETH_GetDMAError(const ETH_HandleTypeDef *heth)
{
 8009538:	b480      	push	{r7}
 800953a:	b083      	sub	sp, #12
 800953c:	af00      	add	r7, sp, #0
 800953e:	6078      	str	r0, [r7, #4]
  return heth->DMAErrorCode;
 8009540:	687b      	ldr	r3, [r7, #4]
 8009542:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
}
 8009546:	4618      	mov	r0, r3
 8009548:	370c      	adds	r7, #12
 800954a:	46bd      	mov	sp, r7
 800954c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009550:	4770      	bx	lr
	...

08009554 <ETH_SetMACConfig>:
/** @addtogroup ETH_Private_Functions   ETH Private Functions
  * @{
  */

static void ETH_SetMACConfig(ETH_HandleTypeDef *heth, const ETH_MACConfigTypeDef *macconf)
{
 8009554:	b480      	push	{r7}
 8009556:	b085      	sub	sp, #20
 8009558:	af00      	add	r7, sp, #0
 800955a:	6078      	str	r0, [r7, #4]
 800955c:	6039      	str	r1, [r7, #0]
  uint32_t macregval;

  /*------------------------ MACCR Configuration --------------------*/
  macregval = (macconf->InterPacketGapVal |
 800955e:	683b      	ldr	r3, [r7, #0]
 8009560:	689a      	ldr	r2, [r3, #8]
               macconf->SourceAddrControl |
 8009562:	683b      	ldr	r3, [r7, #0]
 8009564:	681b      	ldr	r3, [r3, #0]
  macregval = (macconf->InterPacketGapVal |
 8009566:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ChecksumOffload << 27) |
 8009568:	683b      	ldr	r3, [r7, #0]
 800956a:	791b      	ldrb	r3, [r3, #4]
 800956c:	06db      	lsls	r3, r3, #27
               macconf->SourceAddrControl |
 800956e:	431a      	orrs	r2, r3
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 8009570:	683b      	ldr	r3, [r7, #0]
 8009572:	7b1b      	ldrb	r3, [r3, #12]
 8009574:	05db      	lsls	r3, r3, #23
               ((uint32_t)macconf->ChecksumOffload << 27) |
 8009576:	431a      	orrs	r2, r3
               ((uint32_t)macconf->Support2KPacket  << 22) |
 8009578:	683b      	ldr	r3, [r7, #0]
 800957a:	7b5b      	ldrb	r3, [r3, #13]
 800957c:	059b      	lsls	r3, r3, #22
               ((uint32_t)macconf->GiantPacketSizeLimitControl << 23) |
 800957e:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 8009580:	683b      	ldr	r3, [r7, #0]
 8009582:	7b9b      	ldrb	r3, [r3, #14]
 8009584:	055b      	lsls	r3, r3, #21
               ((uint32_t)macconf->Support2KPacket  << 22) |
 8009586:	431a      	orrs	r2, r3
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 8009588:	683b      	ldr	r3, [r7, #0]
 800958a:	7bdb      	ldrb	r3, [r3, #15]
 800958c:	051b      	lsls	r3, r3, #20
               ((uint32_t)macconf->CRCStripTypePacket << 21) |
 800958e:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 8009590:	683a      	ldr	r2, [r7, #0]
 8009592:	7c12      	ldrb	r2, [r2, #16]
 8009594:	2a00      	cmp	r2, #0
 8009596:	d102      	bne.n	800959e <ETH_SetMACConfig+0x4a>
 8009598:	f44f 2200 	mov.w	r2, #524288	@ 0x80000
 800959c:	e000      	b.n	80095a0 <ETH_SetMACConfig+0x4c>
 800959e:	2200      	movs	r2, #0
               ((uint32_t)macconf->AutomaticPadCRCStrip << 20) |
 80095a0:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 80095a2:	683a      	ldr	r2, [r7, #0]
 80095a4:	7c52      	ldrb	r2, [r2, #17]
 80095a6:	2a00      	cmp	r2, #0
 80095a8:	d102      	bne.n	80095b0 <ETH_SetMACConfig+0x5c>
 80095aa:	f44f 3200 	mov.w	r2, #131072	@ 0x20000
 80095ae:	e000      	b.n	80095b2 <ETH_SetMACConfig+0x5e>
 80095b0:	2200      	movs	r2, #0
               ((uint32_t)((macconf->Watchdog == DISABLE) ? 1U : 0U) << 19) |
 80095b2:	431a      	orrs	r2, r3
               ((uint32_t)macconf->JumboPacket << 16) |
 80095b4:	683b      	ldr	r3, [r7, #0]
 80095b6:	7c9b      	ldrb	r3, [r3, #18]
 80095b8:	041b      	lsls	r3, r3, #16
               ((uint32_t)((macconf->Jabber == DISABLE) ? 1U : 0U) << 17) |
 80095ba:	431a      	orrs	r2, r3
               macconf->Speed |
 80095bc:	683b      	ldr	r3, [r7, #0]
 80095be:	695b      	ldr	r3, [r3, #20]
               ((uint32_t)macconf->JumboPacket << 16) |
 80095c0:	431a      	orrs	r2, r3
               macconf->DuplexMode |
 80095c2:	683b      	ldr	r3, [r7, #0]
 80095c4:	699b      	ldr	r3, [r3, #24]
               macconf->Speed |
 80095c6:	431a      	orrs	r2, r3
               ((uint32_t)macconf->LoopbackMode << 12) |
 80095c8:	683b      	ldr	r3, [r7, #0]
 80095ca:	7f1b      	ldrb	r3, [r3, #28]
 80095cc:	031b      	lsls	r3, r3, #12
               macconf->DuplexMode |
 80095ce:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 80095d0:	683b      	ldr	r3, [r7, #0]
 80095d2:	7f5b      	ldrb	r3, [r3, #29]
 80095d4:	02db      	lsls	r3, r3, #11
               ((uint32_t)macconf->LoopbackMode << 12) |
 80095d6:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 80095d8:	683a      	ldr	r2, [r7, #0]
 80095da:	7f92      	ldrb	r2, [r2, #30]
 80095dc:	2a00      	cmp	r2, #0
 80095de:	d102      	bne.n	80095e6 <ETH_SetMACConfig+0x92>
 80095e0:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 80095e4:	e000      	b.n	80095e8 <ETH_SetMACConfig+0x94>
 80095e6:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseBeforeTransmit << 11) |
 80095e8:	431a      	orrs	r2, r3
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 80095ea:	683b      	ldr	r3, [r7, #0]
 80095ec:	7fdb      	ldrb	r3, [r3, #31]
 80095ee:	025b      	lsls	r3, r3, #9
               ((uint32_t)((macconf->ReceiveOwn == DISABLE) ? 1U : 0U) << 10) |
 80095f0:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 80095f2:	683a      	ldr	r2, [r7, #0]
 80095f4:	f892 2020 	ldrb.w	r2, [r2, #32]
 80095f8:	2a00      	cmp	r2, #0
 80095fa:	d102      	bne.n	8009602 <ETH_SetMACConfig+0xae>
 80095fc:	f44f 7280 	mov.w	r2, #256	@ 0x100
 8009600:	e000      	b.n	8009604 <ETH_SetMACConfig+0xb0>
 8009602:	2200      	movs	r2, #0
               ((uint32_t)macconf->CarrierSenseDuringTransmit << 9) |
 8009604:	431a      	orrs	r2, r3
               macconf->BackOffLimit |
 8009606:	683b      	ldr	r3, [r7, #0]
 8009608:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
               ((uint32_t)((macconf->RetryTransmission == DISABLE) ? 1U : 0U) << 8) |
 800960a:	431a      	orrs	r2, r3
               ((uint32_t)macconf->DeferralCheck << 4) |
 800960c:	683b      	ldr	r3, [r7, #0]
 800960e:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8009612:	011b      	lsls	r3, r3, #4
               macconf->BackOffLimit |
 8009614:	431a      	orrs	r2, r3
               macconf->PreambleLength);
 8009616:	683b      	ldr	r3, [r7, #0]
 8009618:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
  macregval = (macconf->InterPacketGapVal |
 800961a:	4313      	orrs	r3, r2
 800961c:	60fb      	str	r3, [r7, #12]

  /* Write to MACCR */
  MODIFY_REG(heth->Instance->MACCR, ETH_MACCR_MASK, macregval);
 800961e:	687b      	ldr	r3, [r7, #4]
 8009620:	681b      	ldr	r3, [r3, #0]
 8009622:	681a      	ldr	r2, [r3, #0]
 8009624:	4b56      	ldr	r3, [pc, #344]	@ (8009780 <ETH_SetMACConfig+0x22c>)
 8009626:	4013      	ands	r3, r2
 8009628:	687a      	ldr	r2, [r7, #4]
 800962a:	6812      	ldr	r2, [r2, #0]
 800962c:	68f9      	ldr	r1, [r7, #12]
 800962e:	430b      	orrs	r3, r1
 8009630:	6013      	str	r3, [r2, #0]

  /*------------------------ MACECR Configuration --------------------*/
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 8009632:	683b      	ldr	r3, [r7, #0]
 8009634:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8009636:	065a      	lsls	r2, r3, #25
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 8009638:	683b      	ldr	r3, [r7, #0]
 800963a:	f893 3038 	ldrb.w	r3, [r3, #56]	@ 0x38
 800963e:	061b      	lsls	r3, r3, #24
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 8009640:	431a      	orrs	r2, r3
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 8009642:	683b      	ldr	r3, [r7, #0]
 8009644:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8009648:	049b      	lsls	r3, r3, #18
               ((uint32_t)macconf->ExtendedInterPacketGap << 24) |
 800964a:	431a      	orrs	r2, r3
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 800964c:	683b      	ldr	r3, [r7, #0]
 800964e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8009652:	045b      	lsls	r3, r3, #17
               ((uint32_t)macconf->UnicastSlowProtocolPacketDetect << 18) |
 8009654:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->CRCCheckingRxPackets == DISABLE) ? 1U : 0U) << 16) |
 8009656:	683a      	ldr	r2, [r7, #0]
 8009658:	f892 2032 	ldrb.w	r2, [r2, #50]	@ 0x32
 800965c:	2a00      	cmp	r2, #0
 800965e:	d102      	bne.n	8009666 <ETH_SetMACConfig+0x112>
 8009660:	f44f 3280 	mov.w	r2, #65536	@ 0x10000
 8009664:	e000      	b.n	8009668 <ETH_SetMACConfig+0x114>
 8009666:	2200      	movs	r2, #0
               ((uint32_t)macconf->SlowProtocolDetect << 17) |
 8009668:	431a      	orrs	r2, r3
               macconf->GiantPacketSizeLimit);
 800966a:	683b      	ldr	r3, [r7, #0]
 800966c:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
  macregval = ((macconf->ExtendedInterPacketGapVal << 25) |
 800966e:	4313      	orrs	r3, r2
 8009670:	60fb      	str	r3, [r7, #12]

  /* Write to MACECR */
  MODIFY_REG(heth->Instance->MACECR, ETH_MACECR_MASK, macregval);
 8009672:	687b      	ldr	r3, [r7, #4]
 8009674:	681b      	ldr	r3, [r3, #0]
 8009676:	685a      	ldr	r2, [r3, #4]
 8009678:	4b42      	ldr	r3, [pc, #264]	@ (8009784 <ETH_SetMACConfig+0x230>)
 800967a:	4013      	ands	r3, r2
 800967c:	687a      	ldr	r2, [r7, #4]
 800967e:	6812      	ldr	r2, [r2, #0]
 8009680:	68f9      	ldr	r1, [r7, #12]
 8009682:	430b      	orrs	r3, r1
 8009684:	6053      	str	r3, [r2, #4]

  /*------------------------ MACWTR Configuration --------------------*/
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 8009686:	683b      	ldr	r3, [r7, #0]
 8009688:	f893 3040 	ldrb.w	r3, [r3, #64]	@ 0x40
 800968c:	021a      	lsls	r2, r3, #8
               macconf->WatchdogTimeout);
 800968e:	683b      	ldr	r3, [r7, #0]
 8009690:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
  macregval = (((uint32_t)macconf->ProgrammableWatchdog << 8) |
 8009692:	4313      	orrs	r3, r2
 8009694:	60fb      	str	r3, [r7, #12]

  /* Write to MACWTR */
  MODIFY_REG(heth->Instance->MACWTR, ETH_MACWTR_MASK, macregval);
 8009696:	687b      	ldr	r3, [r7, #4]
 8009698:	681b      	ldr	r3, [r3, #0]
 800969a:	68da      	ldr	r2, [r3, #12]
 800969c:	4b3a      	ldr	r3, [pc, #232]	@ (8009788 <ETH_SetMACConfig+0x234>)
 800969e:	4013      	ands	r3, r2
 80096a0:	687a      	ldr	r2, [r7, #4]
 80096a2:	6812      	ldr	r2, [r2, #0]
 80096a4:	68f9      	ldr	r1, [r7, #12]
 80096a6:	430b      	orrs	r3, r1
 80096a8:	60d3      	str	r3, [r2, #12]

  /*------------------------ MACTFCR Configuration --------------------*/
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 80096aa:	683b      	ldr	r3, [r7, #0]
 80096ac:	f893 3054 	ldrb.w	r3, [r3, #84]	@ 0x54
 80096b0:	005a      	lsls	r2, r3, #1
               macconf->PauseLowThreshold |
 80096b2:	683b      	ldr	r3, [r7, #0]
 80096b4:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 80096b6:	4313      	orrs	r3, r2
               ((uint32_t)((macconf->ZeroQuantaPause == DISABLE) ? 1U : 0U) << 7) |
 80096b8:	683a      	ldr	r2, [r7, #0]
 80096ba:	f892 204c 	ldrb.w	r2, [r2, #76]	@ 0x4c
 80096be:	2a00      	cmp	r2, #0
 80096c0:	d101      	bne.n	80096c6 <ETH_SetMACConfig+0x172>
 80096c2:	2280      	movs	r2, #128	@ 0x80
 80096c4:	e000      	b.n	80096c8 <ETH_SetMACConfig+0x174>
 80096c6:	2200      	movs	r2, #0
               macconf->PauseLowThreshold |
 80096c8:	431a      	orrs	r2, r3
               (macconf->PauseTime << 16));
 80096ca:	683b      	ldr	r3, [r7, #0]
 80096cc:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80096ce:	041b      	lsls	r3, r3, #16
  macregval = (((uint32_t)macconf->TransmitFlowControl << 1) |
 80096d0:	4313      	orrs	r3, r2
 80096d2:	60fb      	str	r3, [r7, #12]

  /* Write to MACTFCR */
  MODIFY_REG(heth->Instance->MACTFCR, ETH_MACTFCR_MASK, macregval);
 80096d4:	687b      	ldr	r3, [r7, #4]
 80096d6:	681b      	ldr	r3, [r3, #0]
 80096d8:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 80096da:	f64f 730d 	movw	r3, #65293	@ 0xff0d
 80096de:	4013      	ands	r3, r2
 80096e0:	687a      	ldr	r2, [r7, #4]
 80096e2:	6812      	ldr	r2, [r2, #0]
 80096e4:	68f9      	ldr	r1, [r7, #12]
 80096e6:	430b      	orrs	r3, r1
 80096e8:	6713      	str	r3, [r2, #112]	@ 0x70

  /*------------------------ MACRFCR Configuration --------------------*/
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 80096ea:	683b      	ldr	r3, [r7, #0]
 80096ec:	f893 3056 	ldrb.w	r3, [r3, #86]	@ 0x56
 80096f0:	461a      	mov	r2, r3
               ((uint32_t)macconf->UnicastPausePacketDetect << 1));
 80096f2:	683b      	ldr	r3, [r7, #0]
 80096f4:	f893 3055 	ldrb.w	r3, [r3, #85]	@ 0x55
 80096f8:	005b      	lsls	r3, r3, #1
  macregval = ((uint32_t)macconf->ReceiveFlowControl |
 80096fa:	4313      	orrs	r3, r2
 80096fc:	60fb      	str	r3, [r7, #12]

  /* Write to MACRFCR */
  MODIFY_REG(heth->Instance->MACRFCR, ETH_MACRFCR_MASK, macregval);
 80096fe:	687b      	ldr	r3, [r7, #4]
 8009700:	681b      	ldr	r3, [r3, #0]
 8009702:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8009706:	f023 0103 	bic.w	r1, r3, #3
 800970a:	687b      	ldr	r3, [r7, #4]
 800970c:	681b      	ldr	r3, [r3, #0]
 800970e:	68fa      	ldr	r2, [r7, #12]
 8009710:	430a      	orrs	r2, r1
 8009712:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /*------------------------ MTLTQOMR Configuration --------------------*/
  /* Write to MTLTQOMR */
  MODIFY_REG(heth->Instance->MTLTQOMR, ETH_MTLTQOMR_MASK, macconf->TransmitQueueMode);
 8009716:	687b      	ldr	r3, [r7, #4]
 8009718:	681b      	ldr	r3, [r3, #0]
 800971a:	f8d3 3d00 	ldr.w	r3, [r3, #3328]	@ 0xd00
 800971e:	f023 0172 	bic.w	r1, r3, #114	@ 0x72
 8009722:	683b      	ldr	r3, [r7, #0]
 8009724:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 8009726:	687b      	ldr	r3, [r7, #4]
 8009728:	681b      	ldr	r3, [r3, #0]
 800972a:	430a      	orrs	r2, r1
 800972c:	f8c3 2d00 	str.w	r2, [r3, #3328]	@ 0xd00

  /*------------------------ MTLRQOMR Configuration --------------------*/
  macregval = (macconf->ReceiveQueueMode |
 8009730:	683b      	ldr	r3, [r7, #0]
 8009732:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 8009734:	683a      	ldr	r2, [r7, #0]
 8009736:	f892 2060 	ldrb.w	r2, [r2, #96]	@ 0x60
 800973a:	2a00      	cmp	r2, #0
 800973c:	d101      	bne.n	8009742 <ETH_SetMACConfig+0x1ee>
 800973e:	2240      	movs	r2, #64	@ 0x40
 8009740:	e000      	b.n	8009744 <ETH_SetMACConfig+0x1f0>
 8009742:	2200      	movs	r2, #0
  macregval = (macconf->ReceiveQueueMode |
 8009744:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxErrorPacket << 4) |
 8009746:	683b      	ldr	r3, [r7, #0]
 8009748:	f893 3061 	ldrb.w	r3, [r3, #97]	@ 0x61
 800974c:	011b      	lsls	r3, r3, #4
               ((uint32_t)((macconf->DropTCPIPChecksumErrorPacket == DISABLE) ? 1U : 0U) << 6) |
 800974e:	431a      	orrs	r2, r3
               ((uint32_t)macconf->ForwardRxUndersizedGoodPacket << 3));
 8009750:	683b      	ldr	r3, [r7, #0]
 8009752:	f893 3062 	ldrb.w	r3, [r3, #98]	@ 0x62
 8009756:	00db      	lsls	r3, r3, #3
  macregval = (macconf->ReceiveQueueMode |
 8009758:	4313      	orrs	r3, r2
 800975a:	60fb      	str	r3, [r7, #12]

  /* Write to MTLRQOMR */
  MODIFY_REG(heth->Instance->MTLRQOMR, ETH_MTLRQOMR_MASK, macregval);
 800975c:	687b      	ldr	r3, [r7, #4]
 800975e:	681b      	ldr	r3, [r3, #0]
 8009760:	f8d3 3d30 	ldr.w	r3, [r3, #3376]	@ 0xd30
 8009764:	f023 017b 	bic.w	r1, r3, #123	@ 0x7b
 8009768:	687b      	ldr	r3, [r7, #4]
 800976a:	681b      	ldr	r3, [r3, #0]
 800976c:	68fa      	ldr	r2, [r7, #12]
 800976e:	430a      	orrs	r2, r1
 8009770:	f8c3 2d30 	str.w	r2, [r3, #3376]	@ 0xd30
}
 8009774:	bf00      	nop
 8009776:	3714      	adds	r7, #20
 8009778:	46bd      	mov	sp, r7
 800977a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800977e:	4770      	bx	lr
 8009780:	00048083 	.word	0x00048083
 8009784:	c0f88000 	.word	0xc0f88000
 8009788:	fffffef0 	.word	0xfffffef0

0800978c <ETH_SetDMAConfig>:

static void ETH_SetDMAConfig(ETH_HandleTypeDef *heth, const ETH_DMAConfigTypeDef *dmaconf)
{
 800978c:	b480      	push	{r7}
 800978e:	b085      	sub	sp, #20
 8009790:	af00      	add	r7, sp, #0
 8009792:	6078      	str	r0, [r7, #4]
 8009794:	6039      	str	r1, [r7, #0]
  uint32_t dmaregval;

  /*------------------------ DMAMR Configuration --------------------*/
  MODIFY_REG(heth->Instance->DMAMR, ETH_DMAMR_MASK, dmaconf->DMAArbitration);
 8009796:	687b      	ldr	r3, [r7, #4]
 8009798:	681b      	ldr	r3, [r3, #0]
 800979a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 800979e:	681a      	ldr	r2, [r3, #0]
 80097a0:	4b38      	ldr	r3, [pc, #224]	@ (8009884 <ETH_SetDMAConfig+0xf8>)
 80097a2:	4013      	ands	r3, r2
 80097a4:	683a      	ldr	r2, [r7, #0]
 80097a6:	6811      	ldr	r1, [r2, #0]
 80097a8:	687a      	ldr	r2, [r7, #4]
 80097aa:	6812      	ldr	r2, [r2, #0]
 80097ac:	430b      	orrs	r3, r1
 80097ae:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80097b2:	6013      	str	r3, [r2, #0]

  /*------------------------ DMASBMR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 80097b4:	683b      	ldr	r3, [r7, #0]
 80097b6:	791b      	ldrb	r3, [r3, #4]
 80097b8:	031a      	lsls	r2, r3, #12
               dmaconf->BurstMode |
 80097ba:	683b      	ldr	r3, [r7, #0]
 80097bc:	689b      	ldr	r3, [r3, #8]
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 80097be:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->RebuildINCRxBurst << 15));
 80097c0:	683b      	ldr	r3, [r7, #0]
 80097c2:	7b1b      	ldrb	r3, [r3, #12]
 80097c4:	03db      	lsls	r3, r3, #15
  dmaregval = (((uint32_t)dmaconf->AddressAlignedBeats << 12) |
 80097c6:	4313      	orrs	r3, r2
 80097c8:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMASBMR, ETH_DMASBMR_MASK, dmaregval);
 80097ca:	687b      	ldr	r3, [r7, #4]
 80097cc:	681b      	ldr	r3, [r3, #0]
 80097ce:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80097d2:	685a      	ldr	r2, [r3, #4]
 80097d4:	4b2c      	ldr	r3, [pc, #176]	@ (8009888 <ETH_SetDMAConfig+0xfc>)
 80097d6:	4013      	ands	r3, r2
 80097d8:	687a      	ldr	r2, [r7, #4]
 80097da:	6812      	ldr	r2, [r2, #0]
 80097dc:	68f9      	ldr	r1, [r7, #12]
 80097de:	430b      	orrs	r3, r1
 80097e0:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 80097e4:	6053      	str	r3, [r2, #4]

  /*------------------------ DMACCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 80097e6:	683b      	ldr	r3, [r7, #0]
 80097e8:	7b5b      	ldrb	r3, [r3, #13]
 80097ea:	041a      	lsls	r2, r3, #16
               dmaconf->MaximumSegmentSize);
 80097ec:	683b      	ldr	r3, [r7, #0]
 80097ee:	6a1b      	ldr	r3, [r3, #32]
  dmaregval = (((uint32_t)dmaconf->PBLx8Mode << 16) |
 80097f0:	4313      	orrs	r3, r2
 80097f2:	60fb      	str	r3, [r7, #12]
  MODIFY_REG(heth->Instance->DMACCR, ETH_DMACCR_MASK, dmaregval);
 80097f4:	687b      	ldr	r3, [r7, #4]
 80097f6:	681b      	ldr	r3, [r3, #0]
 80097f8:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 80097fc:	f8d3 2100 	ldr.w	r2, [r3, #256]	@ 0x100
 8009800:	4b22      	ldr	r3, [pc, #136]	@ (800988c <ETH_SetDMAConfig+0x100>)
 8009802:	4013      	ands	r3, r2
 8009804:	687a      	ldr	r2, [r7, #4]
 8009806:	6812      	ldr	r2, [r2, #0]
 8009808:	68f9      	ldr	r1, [r7, #12]
 800980a:	430b      	orrs	r3, r1
 800980c:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8009810:	f8c2 3100 	str.w	r3, [r2, #256]	@ 0x100

  /*------------------------ DMACTCR Configuration --------------------*/
  dmaregval = (dmaconf->TxDMABurstLength |
 8009814:	683b      	ldr	r3, [r7, #0]
 8009816:	691a      	ldr	r2, [r3, #16]
               ((uint32_t)dmaconf->SecondPacketOperate << 4) |
 8009818:	683b      	ldr	r3, [r7, #0]
 800981a:	7d1b      	ldrb	r3, [r3, #20]
 800981c:	011b      	lsls	r3, r3, #4
  dmaregval = (dmaconf->TxDMABurstLength |
 800981e:	431a      	orrs	r2, r3
               ((uint32_t)dmaconf->TCPSegmentation << 12));
 8009820:	683b      	ldr	r3, [r7, #0]
 8009822:	7f5b      	ldrb	r3, [r3, #29]
 8009824:	031b      	lsls	r3, r3, #12
  dmaregval = (dmaconf->TxDMABurstLength |
 8009826:	4313      	orrs	r3, r2
 8009828:	60fb      	str	r3, [r7, #12]

  MODIFY_REG(heth->Instance->DMACTCR, ETH_DMACTCR_MASK, dmaregval);
 800982a:	687b      	ldr	r3, [r7, #4]
 800982c:	681b      	ldr	r3, [r3, #0]
 800982e:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009832:	f8d3 2104 	ldr.w	r2, [r3, #260]	@ 0x104
 8009836:	4b16      	ldr	r3, [pc, #88]	@ (8009890 <ETH_SetDMAConfig+0x104>)
 8009838:	4013      	ands	r3, r2
 800983a:	687a      	ldr	r2, [r7, #4]
 800983c:	6812      	ldr	r2, [r2, #0]
 800983e:	68f9      	ldr	r1, [r7, #12]
 8009840:	430b      	orrs	r3, r1
 8009842:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8009846:	f8c2 3104 	str.w	r3, [r2, #260]	@ 0x104

  /*------------------------ DMACRCR Configuration --------------------*/
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 800984a:	683b      	ldr	r3, [r7, #0]
 800984c:	7f1b      	ldrb	r3, [r3, #28]
 800984e:	07da      	lsls	r2, r3, #31
               dmaconf->RxDMABurstLength);
 8009850:	683b      	ldr	r3, [r7, #0]
 8009852:	699b      	ldr	r3, [r3, #24]
  dmaregval = (((uint32_t)dmaconf->FlushRxPacket  << 31) |
 8009854:	4313      	orrs	r3, r2
 8009856:	60fb      	str	r3, [r7, #12]

  /* Write to DMACRCR */
  MODIFY_REG(heth->Instance->DMACRCR, ETH_DMACRCR_MASK, dmaregval);
 8009858:	687b      	ldr	r3, [r7, #4]
 800985a:	681b      	ldr	r3, [r3, #0]
 800985c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009860:	f8d3 2108 	ldr.w	r2, [r3, #264]	@ 0x108
 8009864:	4b0b      	ldr	r3, [pc, #44]	@ (8009894 <ETH_SetDMAConfig+0x108>)
 8009866:	4013      	ands	r3, r2
 8009868:	687a      	ldr	r2, [r7, #4]
 800986a:	6812      	ldr	r2, [r2, #0]
 800986c:	68f9      	ldr	r1, [r7, #12]
 800986e:	430b      	orrs	r3, r1
 8009870:	f502 5280 	add.w	r2, r2, #4096	@ 0x1000
 8009874:	f8c2 3108 	str.w	r3, [r2, #264]	@ 0x108
}
 8009878:	bf00      	nop
 800987a:	3714      	adds	r7, #20
 800987c:	46bd      	mov	sp, r7
 800987e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009882:	4770      	bx	lr
 8009884:	ffff87fd 	.word	0xffff87fd
 8009888:	ffff2ffe 	.word	0xffff2ffe
 800988c:	fffec000 	.word	0xfffec000
 8009890:	ffc0efef 	.word	0xffc0efef
 8009894:	7fc0ffff 	.word	0x7fc0ffff

08009898 <ETH_MACDMAConfig>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval HAL status
  */
static void ETH_MACDMAConfig(ETH_HandleTypeDef *heth)
{
 8009898:	b580      	push	{r7, lr}
 800989a:	b0a4      	sub	sp, #144	@ 0x90
 800989c:	af00      	add	r7, sp, #0
 800989e:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef macDefaultConf;
  ETH_DMAConfigTypeDef dmaDefaultConf;

  /*--------------- ETHERNET MAC registers default Configuration --------------*/
  macDefaultConf.AutomaticPadCRCStrip = ENABLE;
 80098a0:	2301      	movs	r3, #1
 80098a2:	f887 303b 	strb.w	r3, [r7, #59]	@ 0x3b
  macDefaultConf.BackOffLimit = ETH_BACKOFFLIMIT_10;
 80098a6:	2300      	movs	r3, #0
 80098a8:	653b      	str	r3, [r7, #80]	@ 0x50
  macDefaultConf.CarrierSenseBeforeTransmit = DISABLE;
 80098aa:	2300      	movs	r3, #0
 80098ac:	f887 3049 	strb.w	r3, [r7, #73]	@ 0x49
  macDefaultConf.CarrierSenseDuringTransmit = DISABLE;
 80098b0:	2300      	movs	r3, #0
 80098b2:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
  macDefaultConf.ChecksumOffload = ENABLE;
 80098b6:	2301      	movs	r3, #1
 80098b8:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  macDefaultConf.CRCCheckingRxPackets = ENABLE;
 80098bc:	2301      	movs	r3, #1
 80098be:	f887 305e 	strb.w	r3, [r7, #94]	@ 0x5e
  macDefaultConf.CRCStripTypePacket = ENABLE;
 80098c2:	2301      	movs	r3, #1
 80098c4:	f887 303a 	strb.w	r3, [r7, #58]	@ 0x3a
  macDefaultConf.DeferralCheck = DISABLE;
 80098c8:	2300      	movs	r3, #0
 80098ca:	f887 3054 	strb.w	r3, [r7, #84]	@ 0x54
  macDefaultConf.DropTCPIPChecksumErrorPacket = ENABLE;
 80098ce:	2301      	movs	r3, #1
 80098d0:	f887 308c 	strb.w	r3, [r7, #140]	@ 0x8c
  macDefaultConf.DuplexMode = ETH_FULLDUPLEX_MODE;
 80098d4:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 80098d8:	647b      	str	r3, [r7, #68]	@ 0x44
  macDefaultConf.ExtendedInterPacketGap = DISABLE;
 80098da:	2300      	movs	r3, #0
 80098dc:	f887 3064 	strb.w	r3, [r7, #100]	@ 0x64
  macDefaultConf.ExtendedInterPacketGapVal = 0x0U;
 80098e0:	2300      	movs	r3, #0
 80098e2:	66bb      	str	r3, [r7, #104]	@ 0x68
  macDefaultConf.ForwardRxErrorPacket = DISABLE;
 80098e4:	2300      	movs	r3, #0
 80098e6:	f887 308d 	strb.w	r3, [r7, #141]	@ 0x8d
  macDefaultConf.ForwardRxUndersizedGoodPacket = DISABLE;
 80098ea:	2300      	movs	r3, #0
 80098ec:	f887 308e 	strb.w	r3, [r7, #142]	@ 0x8e
  macDefaultConf.GiantPacketSizeLimit = 0x618U;
 80098f0:	f44f 63c3 	mov.w	r3, #1560	@ 0x618
 80098f4:	663b      	str	r3, [r7, #96]	@ 0x60
  macDefaultConf.GiantPacketSizeLimitControl = DISABLE;
 80098f6:	2300      	movs	r3, #0
 80098f8:	f887 3038 	strb.w	r3, [r7, #56]	@ 0x38
  macDefaultConf.InterPacketGapVal = ETH_INTERPACKETGAP_96BIT;
 80098fc:	2300      	movs	r3, #0
 80098fe:	637b      	str	r3, [r7, #52]	@ 0x34
  macDefaultConf.Jabber = ENABLE;
 8009900:	2301      	movs	r3, #1
 8009902:	f887 303d 	strb.w	r3, [r7, #61]	@ 0x3d
  macDefaultConf.JumboPacket = DISABLE;
 8009906:	2300      	movs	r3, #0
 8009908:	f887 303e 	strb.w	r3, [r7, #62]	@ 0x3e
  macDefaultConf.LoopbackMode = DISABLE;
 800990c:	2300      	movs	r3, #0
 800990e:	f887 3048 	strb.w	r3, [r7, #72]	@ 0x48
  macDefaultConf.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS_4;
 8009912:	2300      	movs	r3, #0
 8009914:	67fb      	str	r3, [r7, #124]	@ 0x7c
  macDefaultConf.PauseTime = 0x0U;
 8009916:	2300      	movs	r3, #0
 8009918:	677b      	str	r3, [r7, #116]	@ 0x74
  macDefaultConf.PreambleLength = ETH_PREAMBLELENGTH_7;
 800991a:	2300      	movs	r3, #0
 800991c:	65bb      	str	r3, [r7, #88]	@ 0x58
  macDefaultConf.ProgrammableWatchdog = DISABLE;
 800991e:	2300      	movs	r3, #0
 8009920:	f887 306c 	strb.w	r3, [r7, #108]	@ 0x6c
  macDefaultConf.ReceiveFlowControl = DISABLE;
 8009924:	2300      	movs	r3, #0
 8009926:	f887 3082 	strb.w	r3, [r7, #130]	@ 0x82
  macDefaultConf.ReceiveOwn = ENABLE;
 800992a:	2301      	movs	r3, #1
 800992c:	f887 304a 	strb.w	r3, [r7, #74]	@ 0x4a
  macDefaultConf.ReceiveQueueMode = ETH_RECEIVESTOREFORWARD;
 8009930:	2320      	movs	r3, #32
 8009932:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  macDefaultConf.RetryTransmission = ENABLE;
 8009936:	2301      	movs	r3, #1
 8009938:	f887 304c 	strb.w	r3, [r7, #76]	@ 0x4c
  macDefaultConf.SlowProtocolDetect = DISABLE;
 800993c:	2300      	movs	r3, #0
 800993e:	f887 305d 	strb.w	r3, [r7, #93]	@ 0x5d
  macDefaultConf.SourceAddrControl = ETH_SOURCEADDRESS_REPLACE_ADDR0;
 8009942:	f04f 5340 	mov.w	r3, #805306368	@ 0x30000000
 8009946:	62fb      	str	r3, [r7, #44]	@ 0x2c
  macDefaultConf.Speed = ETH_SPEED_100M;
 8009948:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 800994c:	643b      	str	r3, [r7, #64]	@ 0x40
  macDefaultConf.Support2KPacket = DISABLE;
 800994e:	2300      	movs	r3, #0
 8009950:	f887 3039 	strb.w	r3, [r7, #57]	@ 0x39
  macDefaultConf.TransmitQueueMode = ETH_TRANSMITSTOREFORWARD;
 8009954:	2302      	movs	r3, #2
 8009956:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
  macDefaultConf.TransmitFlowControl = DISABLE;
 800995a:	2300      	movs	r3, #0
 800995c:	f887 3080 	strb.w	r3, [r7, #128]	@ 0x80
  macDefaultConf.UnicastPausePacketDetect = DISABLE;
 8009960:	2300      	movs	r3, #0
 8009962:	f887 3081 	strb.w	r3, [r7, #129]	@ 0x81
  macDefaultConf.UnicastSlowProtocolPacketDetect = DISABLE;
 8009966:	2300      	movs	r3, #0
 8009968:	f887 305c 	strb.w	r3, [r7, #92]	@ 0x5c
  macDefaultConf.Watchdog = ENABLE;
 800996c:	2301      	movs	r3, #1
 800996e:	f887 303c 	strb.w	r3, [r7, #60]	@ 0x3c
  macDefaultConf.WatchdogTimeout =  ETH_MACWTR_WTO_2KB;
 8009972:	2300      	movs	r3, #0
 8009974:	673b      	str	r3, [r7, #112]	@ 0x70
  macDefaultConf.ZeroQuantaPause = ENABLE;
 8009976:	2301      	movs	r3, #1
 8009978:	f887 3078 	strb.w	r3, [r7, #120]	@ 0x78

  /* MAC default configuration */
  ETH_SetMACConfig(heth, &macDefaultConf);
 800997c:	f107 032c 	add.w	r3, r7, #44	@ 0x2c
 8009980:	4619      	mov	r1, r3
 8009982:	6878      	ldr	r0, [r7, #4]
 8009984:	f7ff fde6 	bl	8009554 <ETH_SetMACConfig>

  /*--------------- ETHERNET DMA registers default Configuration --------------*/
  dmaDefaultConf.AddressAlignedBeats = ENABLE;
 8009988:	2301      	movs	r3, #1
 800998a:	733b      	strb	r3, [r7, #12]
  dmaDefaultConf.BurstMode = ETH_BURSTLENGTH_FIXED;
 800998c:	2301      	movs	r3, #1
 800998e:	613b      	str	r3, [r7, #16]
  dmaDefaultConf.DMAArbitration = ETH_DMAARBITRATION_RX1_TX1;
 8009990:	2300      	movs	r3, #0
 8009992:	60bb      	str	r3, [r7, #8]
  dmaDefaultConf.FlushRxPacket = DISABLE;
 8009994:	2300      	movs	r3, #0
 8009996:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
  dmaDefaultConf.PBLx8Mode = DISABLE;
 800999a:	2300      	movs	r3, #0
 800999c:	757b      	strb	r3, [r7, #21]
  dmaDefaultConf.RebuildINCRxBurst = DISABLE;
 800999e:	2300      	movs	r3, #0
 80099a0:	753b      	strb	r3, [r7, #20]
  dmaDefaultConf.RxDMABurstLength = ETH_RXDMABURSTLENGTH_32BEAT;
 80099a2:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 80099a6:	623b      	str	r3, [r7, #32]
  dmaDefaultConf.SecondPacketOperate = DISABLE;
 80099a8:	2300      	movs	r3, #0
 80099aa:	773b      	strb	r3, [r7, #28]
  dmaDefaultConf.TxDMABurstLength = ETH_TXDMABURSTLENGTH_32BEAT;
 80099ac:	f44f 1300 	mov.w	r3, #2097152	@ 0x200000
 80099b0:	61bb      	str	r3, [r7, #24]
  dmaDefaultConf.TCPSegmentation = DISABLE;
 80099b2:	2300      	movs	r3, #0
 80099b4:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
  dmaDefaultConf.MaximumSegmentSize = ETH_SEGMENT_SIZE_DEFAULT;
 80099b8:	f44f 7306 	mov.w	r3, #536	@ 0x218
 80099bc:	62bb      	str	r3, [r7, #40]	@ 0x28

  /* DMA default configuration */
  ETH_SetDMAConfig(heth, &dmaDefaultConf);
 80099be:	f107 0308 	add.w	r3, r7, #8
 80099c2:	4619      	mov	r1, r3
 80099c4:	6878      	ldr	r0, [r7, #4]
 80099c6:	f7ff fee1 	bl	800978c <ETH_SetDMAConfig>
}
 80099ca:	bf00      	nop
 80099cc:	3790      	adds	r7, #144	@ 0x90
 80099ce:	46bd      	mov	sp, r7
 80099d0:	bd80      	pop	{r7, pc}

080099d2 <ETH_DMATxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMATxDescListInit(ETH_HandleTypeDef *heth)
{
 80099d2:	b480      	push	{r7}
 80099d4:	b085      	sub	sp, #20
 80099d6:	af00      	add	r7, sp, #0
 80099d8:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmatxdesc;
  uint32_t i;

  /* Fill each DMATxDesc descriptor with the right values */
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 80099da:	2300      	movs	r3, #0
 80099dc:	60fb      	str	r3, [r7, #12]
 80099de:	e01d      	b.n	8009a1c <ETH_DMATxDescListInit+0x4a>
  {
    dmatxdesc = heth->Init.TxDesc + i;
 80099e0:	687b      	ldr	r3, [r7, #4]
 80099e2:	68d9      	ldr	r1, [r3, #12]
 80099e4:	68fa      	ldr	r2, [r7, #12]
 80099e6:	4613      	mov	r3, r2
 80099e8:	005b      	lsls	r3, r3, #1
 80099ea:	4413      	add	r3, r2
 80099ec:	00db      	lsls	r3, r3, #3
 80099ee:	440b      	add	r3, r1
 80099f0:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmatxdesc->DESC0, 0x0U);
 80099f2:	68bb      	ldr	r3, [r7, #8]
 80099f4:	2200      	movs	r2, #0
 80099f6:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 80099f8:	68bb      	ldr	r3, [r7, #8]
 80099fa:	2200      	movs	r2, #0
 80099fc:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmatxdesc->DESC2, 0x0U);
 80099fe:	68bb      	ldr	r3, [r7, #8]
 8009a00:	2200      	movs	r2, #0
 8009a02:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmatxdesc->DESC3, 0x0U);
 8009a04:	68bb      	ldr	r3, [r7, #8]
 8009a06:	2200      	movs	r2, #0
 8009a08:	60da      	str	r2, [r3, #12]

    WRITE_REG(heth->TxDescList.TxDesc[i], (uint32_t)dmatxdesc);
 8009a0a:	68b9      	ldr	r1, [r7, #8]
 8009a0c:	687b      	ldr	r3, [r7, #4]
 8009a0e:	68fa      	ldr	r2, [r7, #12]
 8009a10:	3206      	adds	r2, #6
 8009a12:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_TX_DESC_CNT; i++)
 8009a16:	68fb      	ldr	r3, [r7, #12]
 8009a18:	3301      	adds	r3, #1
 8009a1a:	60fb      	str	r3, [r7, #12]
 8009a1c:	68fb      	ldr	r3, [r7, #12]
 8009a1e:	2b03      	cmp	r3, #3
 8009a20:	d9de      	bls.n	80099e0 <ETH_DMATxDescListInit+0xe>

  }

  heth->TxDescList.CurTxDesc = 0;
 8009a22:	687b      	ldr	r3, [r7, #4]
 8009a24:	2200      	movs	r2, #0
 8009a26:	629a      	str	r2, [r3, #40]	@ 0x28

  /* Set Transmit Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACTDRLR, (ETH_TX_DESC_CNT - 1U));
 8009a28:	687b      	ldr	r3, [r7, #4]
 8009a2a:	681b      	ldr	r3, [r3, #0]
 8009a2c:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009a30:	461a      	mov	r2, r3
 8009a32:	2303      	movs	r3, #3
 8009a34:	f8c2 312c 	str.w	r3, [r2, #300]	@ 0x12c

  /* Set Transmit Descriptor List Address */
  WRITE_REG(heth->Instance->DMACTDLAR, (uint32_t) heth->Init.TxDesc);
 8009a38:	687b      	ldr	r3, [r7, #4]
 8009a3a:	68da      	ldr	r2, [r3, #12]
 8009a3c:	687b      	ldr	r3, [r7, #4]
 8009a3e:	681b      	ldr	r3, [r3, #0]
 8009a40:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009a44:	f8c3 2114 	str.w	r2, [r3, #276]	@ 0x114

  /* Set Transmit Descriptor Tail pointer */
  WRITE_REG(heth->Instance->DMACTDTPR, (uint32_t) heth->Init.TxDesc);
 8009a48:	687b      	ldr	r3, [r7, #4]
 8009a4a:	68da      	ldr	r2, [r3, #12]
 8009a4c:	687b      	ldr	r3, [r7, #4]
 8009a4e:	681b      	ldr	r3, [r3, #0]
 8009a50:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009a54:	f8c3 2120 	str.w	r2, [r3, #288]	@ 0x120
}
 8009a58:	bf00      	nop
 8009a5a:	3714      	adds	r7, #20
 8009a5c:	46bd      	mov	sp, r7
 8009a5e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009a62:	4770      	bx	lr

08009a64 <ETH_DMARxDescListInit>:
  * @param  heth: pointer to a ETH_HandleTypeDef structure that contains
  *         the configuration information for ETHERNET module
  * @retval None
  */
static void ETH_DMARxDescListInit(ETH_HandleTypeDef *heth)
{
 8009a64:	b480      	push	{r7}
 8009a66:	b085      	sub	sp, #20
 8009a68:	af00      	add	r7, sp, #0
 8009a6a:	6078      	str	r0, [r7, #4]
  ETH_DMADescTypeDef *dmarxdesc;
  uint32_t i;

  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 8009a6c:	2300      	movs	r3, #0
 8009a6e:	60fb      	str	r3, [r7, #12]
 8009a70:	e023      	b.n	8009aba <ETH_DMARxDescListInit+0x56>
  {
    dmarxdesc =  heth->Init.RxDesc + i;
 8009a72:	687b      	ldr	r3, [r7, #4]
 8009a74:	6919      	ldr	r1, [r3, #16]
 8009a76:	68fa      	ldr	r2, [r7, #12]
 8009a78:	4613      	mov	r3, r2
 8009a7a:	005b      	lsls	r3, r3, #1
 8009a7c:	4413      	add	r3, r2
 8009a7e:	00db      	lsls	r3, r3, #3
 8009a80:	440b      	add	r3, r1
 8009a82:	60bb      	str	r3, [r7, #8]

    WRITE_REG(dmarxdesc->DESC0, 0x0U);
 8009a84:	68bb      	ldr	r3, [r7, #8]
 8009a86:	2200      	movs	r2, #0
 8009a88:	601a      	str	r2, [r3, #0]
    WRITE_REG(dmarxdesc->DESC1, 0x0U);
 8009a8a:	68bb      	ldr	r3, [r7, #8]
 8009a8c:	2200      	movs	r2, #0
 8009a8e:	605a      	str	r2, [r3, #4]
    WRITE_REG(dmarxdesc->DESC2, 0x0U);
 8009a90:	68bb      	ldr	r3, [r7, #8]
 8009a92:	2200      	movs	r2, #0
 8009a94:	609a      	str	r2, [r3, #8]
    WRITE_REG(dmarxdesc->DESC3, 0x0U);
 8009a96:	68bb      	ldr	r3, [r7, #8]
 8009a98:	2200      	movs	r2, #0
 8009a9a:	60da      	str	r2, [r3, #12]
    WRITE_REG(dmarxdesc->BackupAddr0, 0x0U);
 8009a9c:	68bb      	ldr	r3, [r7, #8]
 8009a9e:	2200      	movs	r2, #0
 8009aa0:	611a      	str	r2, [r3, #16]
    WRITE_REG(dmarxdesc->BackupAddr1, 0x0U);
 8009aa2:	68bb      	ldr	r3, [r7, #8]
 8009aa4:	2200      	movs	r2, #0
 8009aa6:	615a      	str	r2, [r3, #20]

    /* Set Rx descritors addresses */
    WRITE_REG(heth->RxDescList.RxDesc[i], (uint32_t)dmarxdesc);
 8009aa8:	68b9      	ldr	r1, [r7, #8]
 8009aaa:	687b      	ldr	r3, [r7, #4]
 8009aac:	68fa      	ldr	r2, [r7, #12]
 8009aae:	3212      	adds	r2, #18
 8009ab0:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
  for (i = 0; i < (uint32_t)ETH_RX_DESC_CNT; i++)
 8009ab4:	68fb      	ldr	r3, [r7, #12]
 8009ab6:	3301      	adds	r3, #1
 8009ab8:	60fb      	str	r3, [r7, #12]
 8009aba:	68fb      	ldr	r3, [r7, #12]
 8009abc:	2b03      	cmp	r3, #3
 8009abe:	d9d8      	bls.n	8009a72 <ETH_DMARxDescListInit+0xe>

  }

  WRITE_REG(heth->RxDescList.RxDescIdx, 0U);
 8009ac0:	687b      	ldr	r3, [r7, #4]
 8009ac2:	2200      	movs	r2, #0
 8009ac4:	65da      	str	r2, [r3, #92]	@ 0x5c
  WRITE_REG(heth->RxDescList.RxDescCnt, 0U);
 8009ac6:	687b      	ldr	r3, [r7, #4]
 8009ac8:	2200      	movs	r2, #0
 8009aca:	661a      	str	r2, [r3, #96]	@ 0x60
  WRITE_REG(heth->RxDescList.RxBuildDescIdx, 0U);
 8009acc:	687b      	ldr	r3, [r7, #4]
 8009ace:	2200      	movs	r2, #0
 8009ad0:	669a      	str	r2, [r3, #104]	@ 0x68
  WRITE_REG(heth->RxDescList.RxBuildDescCnt, 0U);
 8009ad2:	687b      	ldr	r3, [r7, #4]
 8009ad4:	2200      	movs	r2, #0
 8009ad6:	66da      	str	r2, [r3, #108]	@ 0x6c
  WRITE_REG(heth->RxDescList.ItMode, 0U);
 8009ad8:	687b      	ldr	r3, [r7, #4]
 8009ada:	2200      	movs	r2, #0
 8009adc:	659a      	str	r2, [r3, #88]	@ 0x58

  /* Set Receive Descriptor Ring Length */
  WRITE_REG(heth->Instance->DMACRDRLR, ((uint32_t)(ETH_RX_DESC_CNT - 1U)));
 8009ade:	687b      	ldr	r3, [r7, #4]
 8009ae0:	681b      	ldr	r3, [r3, #0]
 8009ae2:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009ae6:	461a      	mov	r2, r3
 8009ae8:	2303      	movs	r3, #3
 8009aea:	f8c2 3130 	str.w	r3, [r2, #304]	@ 0x130

  /* Set Receive Descriptor List Address */
  WRITE_REG(heth->Instance->DMACRDLAR, (uint32_t) heth->Init.RxDesc);
 8009aee:	687b      	ldr	r3, [r7, #4]
 8009af0:	691a      	ldr	r2, [r3, #16]
 8009af2:	687b      	ldr	r3, [r7, #4]
 8009af4:	681b      	ldr	r3, [r3, #0]
 8009af6:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009afa:	f8c3 211c 	str.w	r2, [r3, #284]	@ 0x11c

  /* Set Receive Descriptor Tail pointer Address */
  WRITE_REG(heth->Instance->DMACRDTPR, ((uint32_t)(heth->Init.RxDesc + (uint32_t)(ETH_RX_DESC_CNT - 1U))));
 8009afe:	687b      	ldr	r3, [r7, #4]
 8009b00:	691b      	ldr	r3, [r3, #16]
 8009b02:	f103 0248 	add.w	r2, r3, #72	@ 0x48
 8009b06:	687b      	ldr	r3, [r7, #4]
 8009b08:	681b      	ldr	r3, [r3, #0]
 8009b0a:	f503 5380 	add.w	r3, r3, #4096	@ 0x1000
 8009b0e:	f8c3 2128 	str.w	r2, [r3, #296]	@ 0x128
}
 8009b12:	bf00      	nop
 8009b14:	3714      	adds	r7, #20
 8009b16:	46bd      	mov	sp, r7
 8009b18:	f85d 7b04 	ldr.w	r7, [sp], #4
 8009b1c:	4770      	bx	lr
	...

08009b20 <ETH_Prepare_Tx_Descriptors>:
  * @param  ItMode: Enable or disable Tx EOT interrept
  * @retval Status
  */
static uint32_t ETH_Prepare_Tx_Descriptors(ETH_HandleTypeDef *heth, const ETH_TxPacketConfigTypeDef *pTxConfig,
                                           uint32_t ItMode)
{
 8009b20:	b480      	push	{r7}
 8009b22:	b091      	sub	sp, #68	@ 0x44
 8009b24:	af00      	add	r7, sp, #0
 8009b26:	60f8      	str	r0, [r7, #12]
 8009b28:	60b9      	str	r1, [r7, #8]
 8009b2a:	607a      	str	r2, [r7, #4]
  ETH_TxDescListTypeDef *dmatxdesclist = &heth->TxDescList;
 8009b2c:	68fb      	ldr	r3, [r7, #12]
 8009b2e:	3318      	adds	r3, #24
 8009b30:	627b      	str	r3, [r7, #36]	@ 0x24
  uint32_t descidx = dmatxdesclist->CurTxDesc;
 8009b32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009b34:	691b      	ldr	r3, [r3, #16]
 8009b36:	63fb      	str	r3, [r7, #60]	@ 0x3c
  uint32_t firstdescidx = dmatxdesclist->CurTxDesc;
 8009b38:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009b3a:	691b      	ldr	r3, [r3, #16]
 8009b3c:	623b      	str	r3, [r7, #32]
  uint32_t idx;
  uint32_t descnbr = 0;
 8009b3e:	2300      	movs	r3, #0
 8009b40:	637b      	str	r3, [r7, #52]	@ 0x34
  ETH_DMADescTypeDef *dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009b42:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009b44:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009b46:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009b4a:	633b      	str	r3, [r7, #48]	@ 0x30

  ETH_BufferTypeDef  *txbuffer = pTxConfig->TxBuffer;
 8009b4c:	68bb      	ldr	r3, [r7, #8]
 8009b4e:	689b      	ldr	r3, [r3, #8]
 8009b50:	62fb      	str	r3, [r7, #44]	@ 0x2c
  uint32_t           bd_count = 0;
 8009b52:	2300      	movs	r3, #0
 8009b54:	62bb      	str	r3, [r7, #40]	@ 0x28
  uint32_t primask_bit;

  /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
  if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 8009b56:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009b58:	68db      	ldr	r3, [r3, #12]
 8009b5a:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8009b5e:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 8009b62:	d007      	beq.n	8009b74 <ETH_Prepare_Tx_Descriptors+0x54>
      || (dmatxdesclist->PacketAddress[descidx] != NULL))
 8009b64:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8009b66:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009b68:	3304      	adds	r3, #4
 8009b6a:	009b      	lsls	r3, r3, #2
 8009b6c:	4413      	add	r3, r2
 8009b6e:	685b      	ldr	r3, [r3, #4]
 8009b70:	2b00      	cmp	r3, #0
 8009b72:	d001      	beq.n	8009b78 <ETH_Prepare_Tx_Descriptors+0x58>
  {
    return HAL_ETH_ERROR_BUSY;
 8009b74:	2302      	movs	r3, #2
 8009b76:	e266      	b.n	800a046 <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Context descriptor configuration (Optional) **********/
  /***************************************************************************/
  /* If VLAN tag is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8009b78:	68bb      	ldr	r3, [r7, #8]
 8009b7a:	681b      	ldr	r3, [r3, #0]
 8009b7c:	f003 0304 	and.w	r3, r3, #4
 8009b80:	2b00      	cmp	r3, #0
 8009b82:	d044      	beq.n	8009c0e <ETH_Prepare_Tx_Descriptors+0xee>
  {
    /* Set vlan tag value */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_VT, pTxConfig->VlanTag);
 8009b84:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009b86:	68da      	ldr	r2, [r3, #12]
 8009b88:	4b75      	ldr	r3, [pc, #468]	@ (8009d60 <ETH_Prepare_Tx_Descriptors+0x240>)
 8009b8a:	4013      	ands	r3, r2
 8009b8c:	68ba      	ldr	r2, [r7, #8]
 8009b8e:	6a52      	ldr	r2, [r2, #36]	@ 0x24
 8009b90:	431a      	orrs	r2, r3
 8009b92:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009b94:	60da      	str	r2, [r3, #12]
    /* Set vlan tag valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_VLTV);
 8009b96:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009b98:	68db      	ldr	r3, [r3, #12]
 8009b9a:	f443 3280 	orr.w	r2, r3, #65536	@ 0x10000
 8009b9e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ba0:	60da      	str	r2, [r3, #12]
    /* Set the descriptor as the vlan input source */
    SET_BIT(heth->Instance->MACVIR, ETH_MACVIR_VLTI);
 8009ba2:	68fb      	ldr	r3, [r7, #12]
 8009ba4:	681b      	ldr	r3, [r3, #0]
 8009ba6:	6e1a      	ldr	r2, [r3, #96]	@ 0x60
 8009ba8:	68fb      	ldr	r3, [r7, #12]
 8009baa:	681b      	ldr	r3, [r3, #0]
 8009bac:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 8009bb0:	661a      	str	r2, [r3, #96]	@ 0x60

    /* if inner VLAN is enabled */
    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_INNERVLANTAG) != (uint32_t)RESET)
 8009bb2:	68bb      	ldr	r3, [r7, #8]
 8009bb4:	681b      	ldr	r3, [r3, #0]
 8009bb6:	f003 0308 	and.w	r3, r3, #8
 8009bba:	2b00      	cmp	r3, #0
 8009bbc:	d027      	beq.n	8009c0e <ETH_Prepare_Tx_Descriptors+0xee>
    {
      /* Set inner vlan tag value */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_IVT, (pTxConfig->InnerVlanTag << 16));
 8009bbe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bc0:	689b      	ldr	r3, [r3, #8]
 8009bc2:	b29a      	uxth	r2, r3
 8009bc4:	68bb      	ldr	r3, [r7, #8]
 8009bc6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8009bc8:	041b      	lsls	r3, r3, #16
 8009bca:	431a      	orrs	r2, r3
 8009bcc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bce:	609a      	str	r2, [r3, #8]
      /* Set inner vlan tag valid bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_IVLTV);
 8009bd0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bd2:	68db      	ldr	r3, [r3, #12]
 8009bd4:	f443 3200 	orr.w	r2, r3, #131072	@ 0x20000
 8009bd8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bda:	60da      	str	r2, [r3, #12]

      /* Set Vlan Tag control */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXCDESC_IVTIR, pTxConfig->InnerVlanCtrl);
 8009bdc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bde:	68db      	ldr	r3, [r3, #12]
 8009be0:	f423 2240 	bic.w	r2, r3, #786432	@ 0xc0000
 8009be4:	68bb      	ldr	r3, [r7, #8]
 8009be6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8009be8:	431a      	orrs	r2, r3
 8009bea:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009bec:	60da      	str	r2, [r3, #12]

      /* Set the descriptor as the inner vlan input source */
      SET_BIT(heth->Instance->MACIVIR, ETH_MACIVIR_VLTI);
 8009bee:	68fb      	ldr	r3, [r7, #12]
 8009bf0:	681b      	ldr	r3, [r3, #0]
 8009bf2:	6e5a      	ldr	r2, [r3, #100]	@ 0x64
 8009bf4:	68fb      	ldr	r3, [r7, #12]
 8009bf6:	681b      	ldr	r3, [r3, #0]
 8009bf8:	f442 1280 	orr.w	r2, r2, #1048576	@ 0x100000
 8009bfc:	665a      	str	r2, [r3, #100]	@ 0x64
      /* Enable double VLAN processing */
      SET_BIT(heth->Instance->MACVTR, ETH_MACVTR_EDVLP);
 8009bfe:	68fb      	ldr	r3, [r7, #12]
 8009c00:	681b      	ldr	r3, [r3, #0]
 8009c02:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8009c04:	68fb      	ldr	r3, [r7, #12]
 8009c06:	681b      	ldr	r3, [r3, #0]
 8009c08:	f042 6280 	orr.w	r2, r2, #67108864	@ 0x4000000
 8009c0c:	651a      	str	r2, [r3, #80]	@ 0x50
    }
  }

  /* if tcp segmentation is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 8009c0e:	68bb      	ldr	r3, [r7, #8]
 8009c10:	681b      	ldr	r3, [r3, #0]
 8009c12:	f003 0310 	and.w	r3, r3, #16
 8009c16:	2b00      	cmp	r3, #0
 8009c18:	d00e      	beq.n	8009c38 <ETH_Prepare_Tx_Descriptors+0x118>
  {
    /* Set MSS value */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXCDESC_MSS, pTxConfig->MaxSegmentSize);
 8009c1a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c1c:	689a      	ldr	r2, [r3, #8]
 8009c1e:	4b51      	ldr	r3, [pc, #324]	@ (8009d64 <ETH_Prepare_Tx_Descriptors+0x244>)
 8009c20:	4013      	ands	r3, r2
 8009c22:	68ba      	ldr	r2, [r7, #8]
 8009c24:	6992      	ldr	r2, [r2, #24]
 8009c26:	431a      	orrs	r2, r3
 8009c28:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c2a:	609a      	str	r2, [r3, #8]
    /* Set MSS valid bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_TCMSSV);
 8009c2c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c2e:	68db      	ldr	r3, [r3, #12]
 8009c30:	f043 6280 	orr.w	r2, r3, #67108864	@ 0x4000000
 8009c34:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c36:	60da      	str	r2, [r3, #12]
  }

  if ((READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8009c38:	68bb      	ldr	r3, [r7, #8]
 8009c3a:	681b      	ldr	r3, [r3, #0]
 8009c3c:	f003 0304 	and.w	r3, r3, #4
 8009c40:	2b00      	cmp	r3, #0
 8009c42:	d105      	bne.n	8009c50 <ETH_Prepare_Tx_Descriptors+0x130>
      || (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET))
 8009c44:	68bb      	ldr	r3, [r7, #8]
 8009c46:	681b      	ldr	r3, [r3, #0]
 8009c48:	f003 0310 	and.w	r3, r3, #16
 8009c4c:	2b00      	cmp	r3, #0
 8009c4e:	d036      	beq.n	8009cbe <ETH_Prepare_Tx_Descriptors+0x19e>
  {
    /* Set as context descriptor */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_CTXT);
 8009c50:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c52:	68db      	ldr	r3, [r3, #12]
 8009c54:	f043 4280 	orr.w	r2, r3, #1073741824	@ 0x40000000
 8009c58:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c5a:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8009c5c:	f3bf 8f5f 	dmb	sy
}
 8009c60:	bf00      	nop
    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 8009c62:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c64:	68db      	ldr	r3, [r3, #12]
 8009c66:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009c6a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c6c:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 8009c6e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009c70:	3301      	adds	r3, #1
 8009c72:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8009c74:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009c76:	2b03      	cmp	r3, #3
 8009c78:	d902      	bls.n	8009c80 <ETH_Prepare_Tx_Descriptors+0x160>
 8009c7a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009c7c:	3b04      	subs	r3, #4
 8009c7e:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009c80:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009c82:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009c84:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009c88:	633b      	str	r3, [r7, #48]	@ 0x30

    descnbr += 1U;
 8009c8a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009c8c:	3301      	adds	r3, #1
 8009c8e:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if (READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCWBF_OWN) == ETH_DMATXNDESCWBF_OWN)
 8009c90:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009c92:	68db      	ldr	r3, [r3, #12]
 8009c94:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8009c98:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 8009c9c:	d10f      	bne.n	8009cbe <ETH_Prepare_Tx_Descriptors+0x19e>
    {
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[firstdescidx];
 8009c9e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009ca0:	6a3a      	ldr	r2, [r7, #32]
 8009ca2:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009ca6:	633b      	str	r3, [r7, #48]	@ 0x30
  __ASM volatile ("dmb 0xF":::"memory");
 8009ca8:	f3bf 8f5f 	dmb	sy
}
 8009cac:	bf00      	nop
      /* Ensure rest of descriptor is written to RAM before the OWN bit */
      __DMB();
      /* Clear own bit */
      CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXCDESC_OWN);
 8009cae:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009cb0:	68db      	ldr	r3, [r3, #12]
 8009cb2:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009cb6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009cb8:	60da      	str	r2, [r3, #12]

      return HAL_ETH_ERROR_BUSY;
 8009cba:	2302      	movs	r3, #2
 8009cbc:	e1c3      	b.n	800a046 <ETH_Prepare_Tx_Descriptors+0x526>

  /***************************************************************************/
  /*****************    Normal descriptors configuration     *****************/
  /***************************************************************************/

  descnbr += 1U;
 8009cbe:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009cc0:	3301      	adds	r3, #1
 8009cc2:	637b      	str	r3, [r7, #52]	@ 0x34

  /* Set header or buffer 1 address */
  WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 8009cc4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009cc6:	681b      	ldr	r3, [r3, #0]
 8009cc8:	461a      	mov	r2, r3
 8009cca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ccc:	601a      	str	r2, [r3, #0]
  /* Set header or buffer 1 Length */
  MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 8009cce:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009cd0:	689a      	ldr	r2, [r3, #8]
 8009cd2:	4b24      	ldr	r3, [pc, #144]	@ (8009d64 <ETH_Prepare_Tx_Descriptors+0x244>)
 8009cd4:	4013      	ands	r3, r2
 8009cd6:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009cd8:	6852      	ldr	r2, [r2, #4]
 8009cda:	431a      	orrs	r2, r3
 8009cdc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009cde:	609a      	str	r2, [r3, #8]

  if (txbuffer->next != NULL)
 8009ce0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009ce2:	689b      	ldr	r3, [r3, #8]
 8009ce4:	2b00      	cmp	r3, #0
 8009ce6:	d012      	beq.n	8009d0e <ETH_Prepare_Tx_Descriptors+0x1ee>
  {
    txbuffer = txbuffer->next;
 8009ce8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009cea:	689b      	ldr	r3, [r3, #8]
 8009cec:	62fb      	str	r3, [r7, #44]	@ 0x2c
    /* Set buffer 2 address */
    WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 8009cee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009cf0:	681b      	ldr	r3, [r3, #0]
 8009cf2:	461a      	mov	r2, r3
 8009cf4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009cf6:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 8009cf8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009cfa:	689a      	ldr	r2, [r3, #8]
 8009cfc:	4b1a      	ldr	r3, [pc, #104]	@ (8009d68 <ETH_Prepare_Tx_Descriptors+0x248>)
 8009cfe:	4013      	ands	r3, r2
 8009d00:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009d02:	6852      	ldr	r2, [r2, #4]
 8009d04:	0412      	lsls	r2, r2, #16
 8009d06:	431a      	orrs	r2, r3
 8009d08:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d0a:	609a      	str	r2, [r3, #8]
 8009d0c:	e008      	b.n	8009d20 <ETH_Prepare_Tx_Descriptors+0x200>
  }
  else
  {
    WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8009d0e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d10:	2200      	movs	r2, #0
 8009d12:	605a      	str	r2, [r3, #4]
    /* Set buffer 2 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 8009d14:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d16:	689a      	ldr	r2, [r3, #8]
 8009d18:	4b13      	ldr	r3, [pc, #76]	@ (8009d68 <ETH_Prepare_Tx_Descriptors+0x248>)
 8009d1a:	4013      	ands	r3, r2
 8009d1c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8009d1e:	6093      	str	r3, [r2, #8]
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 8009d20:	68bb      	ldr	r3, [r7, #8]
 8009d22:	681b      	ldr	r3, [r3, #0]
 8009d24:	f003 0310 	and.w	r3, r3, #16
 8009d28:	2b00      	cmp	r3, #0
 8009d2a:	d021      	beq.n	8009d70 <ETH_Prepare_Tx_Descriptors+0x250>
  {
    /* Set TCP Header length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_THL, (pTxConfig->TCPHeaderLen << 19));
 8009d2c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d2e:	68db      	ldr	r3, [r3, #12]
 8009d30:	f423 02f0 	bic.w	r2, r3, #7864320	@ 0x780000
 8009d34:	68bb      	ldr	r3, [r7, #8]
 8009d36:	6a1b      	ldr	r3, [r3, #32]
 8009d38:	04db      	lsls	r3, r3, #19
 8009d3a:	431a      	orrs	r2, r3
 8009d3c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d3e:	60da      	str	r2, [r3, #12]
    /* Set TCP payload length */
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 8009d40:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d42:	68da      	ldr	r2, [r3, #12]
 8009d44:	4b09      	ldr	r3, [pc, #36]	@ (8009d6c <ETH_Prepare_Tx_Descriptors+0x24c>)
 8009d46:	4013      	ands	r3, r2
 8009d48:	68ba      	ldr	r2, [r7, #8]
 8009d4a:	69d2      	ldr	r2, [r2, #28]
 8009d4c:	431a      	orrs	r2, r3
 8009d4e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d50:	60da      	str	r2, [r3, #12]
    /* Set TCP Segmentation Enabled bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 8009d52:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d54:	68db      	ldr	r3, [r3, #12]
 8009d56:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 8009d5a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d5c:	60da      	str	r2, [r3, #12]
 8009d5e:	e02e      	b.n	8009dbe <ETH_Prepare_Tx_Descriptors+0x29e>
 8009d60:	ffff0000 	.word	0xffff0000
 8009d64:	ffffc000 	.word	0xffffc000
 8009d68:	c000ffff 	.word	0xc000ffff
 8009d6c:	fffc0000 	.word	0xfffc0000
  }
  else
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 8009d70:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d72:	68da      	ldr	r2, [r3, #12]
 8009d74:	4b7b      	ldr	r3, [pc, #492]	@ (8009f64 <ETH_Prepare_Tx_Descriptors+0x444>)
 8009d76:	4013      	ands	r3, r2
 8009d78:	68ba      	ldr	r2, [r7, #8]
 8009d7a:	6852      	ldr	r2, [r2, #4]
 8009d7c:	431a      	orrs	r2, r3
 8009d7e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d80:	60da      	str	r2, [r3, #12]

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 8009d82:	68bb      	ldr	r3, [r7, #8]
 8009d84:	681b      	ldr	r3, [r3, #0]
 8009d86:	f003 0301 	and.w	r3, r3, #1
 8009d8a:	2b00      	cmp	r3, #0
 8009d8c:	d008      	beq.n	8009da0 <ETH_Prepare_Tx_Descriptors+0x280>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 8009d8e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d90:	68db      	ldr	r3, [r3, #12]
 8009d92:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 8009d96:	68bb      	ldr	r3, [r7, #8]
 8009d98:	695b      	ldr	r3, [r3, #20]
 8009d9a:	431a      	orrs	r2, r3
 8009d9c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009d9e:	60da      	str	r2, [r3, #12]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CRCPAD) != (uint32_t)RESET)
 8009da0:	68bb      	ldr	r3, [r7, #8]
 8009da2:	681b      	ldr	r3, [r3, #0]
 8009da4:	f003 0320 	and.w	r3, r3, #32
 8009da8:	2b00      	cmp	r3, #0
 8009daa:	d008      	beq.n	8009dbe <ETH_Prepare_Tx_Descriptors+0x29e>
    {
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CPC, pTxConfig->CRCPadCtrl);
 8009dac:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009dae:	68db      	ldr	r3, [r3, #12]
 8009db0:	f023 6240 	bic.w	r2, r3, #201326592	@ 0xc000000
 8009db4:	68bb      	ldr	r3, [r7, #8]
 8009db6:	691b      	ldr	r3, [r3, #16]
 8009db8:	431a      	orrs	r2, r3
 8009dba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009dbc:	60da      	str	r2, [r3, #12]
    }
  }

  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_VLANTAG) != (uint32_t)RESET)
 8009dbe:	68bb      	ldr	r3, [r7, #8]
 8009dc0:	681b      	ldr	r3, [r3, #0]
 8009dc2:	f003 0304 	and.w	r3, r3, #4
 8009dc6:	2b00      	cmp	r3, #0
 8009dc8:	d008      	beq.n	8009ddc <ETH_Prepare_Tx_Descriptors+0x2bc>
  {
    /* Set Vlan Tag control */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_VTIR, pTxConfig->VlanCtrl);
 8009dca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009dcc:	689b      	ldr	r3, [r3, #8]
 8009dce:	f423 4240 	bic.w	r2, r3, #49152	@ 0xc000
 8009dd2:	68bb      	ldr	r3, [r7, #8]
 8009dd4:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8009dd6:	431a      	orrs	r2, r3
 8009dd8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009dda:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as First Descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 8009ddc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009dde:	68db      	ldr	r3, [r3, #12]
 8009de0:	f043 5200 	orr.w	r2, r3, #536870912	@ 0x20000000
 8009de4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009de6:	60da      	str	r2, [r3, #12]
  /* Mark it as NORMAL descriptor */
  CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8009de8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009dea:	68db      	ldr	r3, [r3, #12]
 8009dec:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8009df0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009df2:	60da      	str	r2, [r3, #12]
  __ASM volatile ("dmb 0xF":::"memory");
 8009df4:	f3bf 8f5f 	dmb	sy
}
 8009df8:	bf00      	nop
  /* Ensure rest of descriptor is written to RAM before the OWN bit */
  __DMB();
  /* set OWN bit of FIRST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8009dfa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009dfc:	68db      	ldr	r3, [r3, #12]
 8009dfe:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009e02:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e04:	60da      	str	r2, [r3, #12]

  /* If source address insertion/replacement is enabled for this packet */
  if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_SAIC) != (uint32_t)RESET)
 8009e06:	68bb      	ldr	r3, [r7, #8]
 8009e08:	681b      	ldr	r3, [r3, #0]
 8009e0a:	f003 0302 	and.w	r3, r3, #2
 8009e0e:	2b00      	cmp	r3, #0
 8009e10:	f000 80da 	beq.w	8009fc8 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_SAIC, pTxConfig->SrcAddrCtrl);
 8009e14:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e16:	68db      	ldr	r3, [r3, #12]
 8009e18:	f023 7260 	bic.w	r2, r3, #58720256	@ 0x3800000
 8009e1c:	68bb      	ldr	r3, [r7, #8]
 8009e1e:	68db      	ldr	r3, [r3, #12]
 8009e20:	431a      	orrs	r2, r3
 8009e22:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e24:	60da      	str	r2, [r3, #12]
  }

  /* only if the packet is split into more than one descriptors > 1 */
  while (txbuffer->next != NULL)
 8009e26:	e0cf      	b.n	8009fc8 <ETH_Prepare_Tx_Descriptors+0x4a8>
  {
    /* Clear the LD bit of previous descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 8009e28:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e2a:	68db      	ldr	r3, [r3, #12]
 8009e2c:	f023 5280 	bic.w	r2, r3, #268435456	@ 0x10000000
 8009e30:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e32:	60da      	str	r2, [r3, #12]
    /* Increment current tx descriptor index */
    INCR_TX_DESC_INDEX(descidx, 1U);
 8009e34:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009e36:	3301      	adds	r3, #1
 8009e38:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8009e3a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009e3c:	2b03      	cmp	r3, #3
 8009e3e:	d902      	bls.n	8009e46 <ETH_Prepare_Tx_Descriptors+0x326>
 8009e40:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009e42:	3b04      	subs	r3, #4
 8009e44:	63fb      	str	r3, [r7, #60]	@ 0x3c
    /* Get current descriptor address */
    dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009e46:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009e48:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009e4a:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009e4e:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Clear the FD bit of new Descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FD);
 8009e50:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e52:	68db      	ldr	r3, [r3, #12]
 8009e54:	f023 5200 	bic.w	r2, r3, #536870912	@ 0x20000000
 8009e58:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e5a:	60da      	str	r2, [r3, #12]

    /* Current Tx Descriptor Owned by DMA: cannot be used by the application  */
    if ((READ_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN) == ETH_DMATXNDESCRF_OWN)
 8009e5c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e5e:	68db      	ldr	r3, [r3, #12]
 8009e60:	f003 4300 	and.w	r3, r3, #2147483648	@ 0x80000000
 8009e64:	f1b3 4f00 	cmp.w	r3, #2147483648	@ 0x80000000
 8009e68:	d007      	beq.n	8009e7a <ETH_Prepare_Tx_Descriptors+0x35a>
        || (dmatxdesclist->PacketAddress[descidx] != NULL))
 8009e6a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8009e6c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009e6e:	3304      	adds	r3, #4
 8009e70:	009b      	lsls	r3, r3, #2
 8009e72:	4413      	add	r3, r2
 8009e74:	685b      	ldr	r3, [r3, #4]
 8009e76:	2b00      	cmp	r3, #0
 8009e78:	d029      	beq.n	8009ece <ETH_Prepare_Tx_Descriptors+0x3ae>
    {
      descidx = firstdescidx;
 8009e7a:	6a3b      	ldr	r3, [r7, #32]
 8009e7c:	63fb      	str	r3, [r7, #60]	@ 0x3c
      dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009e7e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009e80:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009e82:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009e86:	633b      	str	r3, [r7, #48]	@ 0x30

      /* clear previous desc own bit */
      for (idx = 0; idx < descnbr; idx ++)
 8009e88:	2300      	movs	r3, #0
 8009e8a:	63bb      	str	r3, [r7, #56]	@ 0x38
 8009e8c:	e019      	b.n	8009ec2 <ETH_Prepare_Tx_Descriptors+0x3a2>
  __ASM volatile ("dmb 0xF":::"memory");
 8009e8e:	f3bf 8f5f 	dmb	sy
}
 8009e92:	bf00      	nop
      {
        /* Ensure rest of descriptor is written to RAM before the OWN bit */
        __DMB();

        CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8009e94:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e96:	68db      	ldr	r3, [r3, #12]
 8009e98:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009e9c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009e9e:	60da      	str	r2, [r3, #12]

        /* Increment current tx descriptor index */
        INCR_TX_DESC_INDEX(descidx, 1U);
 8009ea0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009ea2:	3301      	adds	r3, #1
 8009ea4:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8009ea6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009ea8:	2b03      	cmp	r3, #3
 8009eaa:	d902      	bls.n	8009eb2 <ETH_Prepare_Tx_Descriptors+0x392>
 8009eac:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8009eae:	3b04      	subs	r3, #4
 8009eb0:	63fb      	str	r3, [r7, #60]	@ 0x3c
        /* Get current descriptor address */
        dmatxdesc = (ETH_DMADescTypeDef *)dmatxdesclist->TxDesc[descidx];
 8009eb2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8009eb4:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 8009eb6:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8009eba:	633b      	str	r3, [r7, #48]	@ 0x30
      for (idx = 0; idx < descnbr; idx ++)
 8009ebc:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8009ebe:	3301      	adds	r3, #1
 8009ec0:	63bb      	str	r3, [r7, #56]	@ 0x38
 8009ec2:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 8009ec4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009ec6:	429a      	cmp	r2, r3
 8009ec8:	d3e1      	bcc.n	8009e8e <ETH_Prepare_Tx_Descriptors+0x36e>
      }

      return HAL_ETH_ERROR_BUSY;
 8009eca:	2302      	movs	r3, #2
 8009ecc:	e0bb      	b.n	800a046 <ETH_Prepare_Tx_Descriptors+0x526>
    }

    descnbr += 1U;
 8009ece:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8009ed0:	3301      	adds	r3, #1
 8009ed2:	637b      	str	r3, [r7, #52]	@ 0x34

    /* Get the next Tx buffer in the list */
    txbuffer = txbuffer->next;
 8009ed4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009ed6:	689b      	ldr	r3, [r3, #8]
 8009ed8:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* Set header or buffer 1 address */
    WRITE_REG(dmatxdesc->DESC0, (uint32_t)txbuffer->buffer);
 8009eda:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009edc:	681b      	ldr	r3, [r3, #0]
 8009ede:	461a      	mov	r2, r3
 8009ee0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ee2:	601a      	str	r2, [r3, #0]
    /* Set header or buffer 1 Length */
    MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B1L, txbuffer->len);
 8009ee4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ee6:	689a      	ldr	r2, [r3, #8]
 8009ee8:	4b1f      	ldr	r3, [pc, #124]	@ (8009f68 <ETH_Prepare_Tx_Descriptors+0x448>)
 8009eea:	4013      	ands	r3, r2
 8009eec:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009eee:	6852      	ldr	r2, [r2, #4]
 8009ef0:	431a      	orrs	r2, r3
 8009ef2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ef4:	609a      	str	r2, [r3, #8]

    if (txbuffer->next != NULL)
 8009ef6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009ef8:	689b      	ldr	r3, [r3, #8]
 8009efa:	2b00      	cmp	r3, #0
 8009efc:	d012      	beq.n	8009f24 <ETH_Prepare_Tx_Descriptors+0x404>
    {
      /* Get the next Tx buffer in the list */
      txbuffer = txbuffer->next;
 8009efe:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009f00:	689b      	ldr	r3, [r3, #8]
 8009f02:	62fb      	str	r3, [r7, #44]	@ 0x2c
      /* Set buffer 2 address */
      WRITE_REG(dmatxdesc->DESC1, (uint32_t)txbuffer->buffer);
 8009f04:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009f06:	681b      	ldr	r3, [r3, #0]
 8009f08:	461a      	mov	r2, r3
 8009f0a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f0c:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, (txbuffer->len << 16));
 8009f0e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f10:	689a      	ldr	r2, [r3, #8]
 8009f12:	4b16      	ldr	r3, [pc, #88]	@ (8009f6c <ETH_Prepare_Tx_Descriptors+0x44c>)
 8009f14:	4013      	ands	r3, r2
 8009f16:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8009f18:	6852      	ldr	r2, [r2, #4]
 8009f1a:	0412      	lsls	r2, r2, #16
 8009f1c:	431a      	orrs	r2, r3
 8009f1e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f20:	609a      	str	r2, [r3, #8]
 8009f22:	e008      	b.n	8009f36 <ETH_Prepare_Tx_Descriptors+0x416>
    }
    else
    {
      WRITE_REG(dmatxdesc->DESC1, 0x0U);
 8009f24:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f26:	2200      	movs	r2, #0
 8009f28:	605a      	str	r2, [r3, #4]
      /* Set buffer 2 Length */
      MODIFY_REG(dmatxdesc->DESC2, ETH_DMATXNDESCRF_B2L, 0x0U);
 8009f2a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f2c:	689a      	ldr	r2, [r3, #8]
 8009f2e:	4b0f      	ldr	r3, [pc, #60]	@ (8009f6c <ETH_Prepare_Tx_Descriptors+0x44c>)
 8009f30:	4013      	ands	r3, r2
 8009f32:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8009f34:	6093      	str	r3, [r2, #8]
    }

    if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_TSO) != (uint32_t)RESET)
 8009f36:	68bb      	ldr	r3, [r7, #8]
 8009f38:	681b      	ldr	r3, [r3, #0]
 8009f3a:	f003 0310 	and.w	r3, r3, #16
 8009f3e:	2b00      	cmp	r3, #0
 8009f40:	d018      	beq.n	8009f74 <ETH_Prepare_Tx_Descriptors+0x454>
    {
      /* Set TCP payload length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TPL, pTxConfig->PayloadLen);
 8009f42:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f44:	68da      	ldr	r2, [r3, #12]
 8009f46:	4b0a      	ldr	r3, [pc, #40]	@ (8009f70 <ETH_Prepare_Tx_Descriptors+0x450>)
 8009f48:	4013      	ands	r3, r2
 8009f4a:	68ba      	ldr	r2, [r7, #8]
 8009f4c:	69d2      	ldr	r2, [r2, #28]
 8009f4e:	431a      	orrs	r2, r3
 8009f50:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f52:	60da      	str	r2, [r3, #12]
      /* Set TCP Segmentation Enabled bit */
      SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_TSE);
 8009f54:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f56:	68db      	ldr	r3, [r3, #12]
 8009f58:	f443 2280 	orr.w	r2, r3, #262144	@ 0x40000
 8009f5c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f5e:	60da      	str	r2, [r3, #12]
 8009f60:	e020      	b.n	8009fa4 <ETH_Prepare_Tx_Descriptors+0x484>
 8009f62:	bf00      	nop
 8009f64:	ffff8000 	.word	0xffff8000
 8009f68:	ffffc000 	.word	0xffffc000
 8009f6c:	c000ffff 	.word	0xc000ffff
 8009f70:	fffc0000 	.word	0xfffc0000
    }
    else
    {
      /* Set the packet length */
      MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_FL, pTxConfig->Length);
 8009f74:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f76:	68da      	ldr	r2, [r3, #12]
 8009f78:	4b36      	ldr	r3, [pc, #216]	@ (800a054 <ETH_Prepare_Tx_Descriptors+0x534>)
 8009f7a:	4013      	ands	r3, r2
 8009f7c:	68ba      	ldr	r2, [r7, #8]
 8009f7e:	6852      	ldr	r2, [r2, #4]
 8009f80:	431a      	orrs	r2, r3
 8009f82:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f84:	60da      	str	r2, [r3, #12]

      if (READ_BIT(pTxConfig->Attributes, ETH_TX_PACKETS_FEATURES_CSUM) != (uint32_t)RESET)
 8009f86:	68bb      	ldr	r3, [r7, #8]
 8009f88:	681b      	ldr	r3, [r3, #0]
 8009f8a:	f003 0301 	and.w	r3, r3, #1
 8009f8e:	2b00      	cmp	r3, #0
 8009f90:	d008      	beq.n	8009fa4 <ETH_Prepare_Tx_Descriptors+0x484>
      {
        /* Checksum Insertion Control */
        MODIFY_REG(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CIC, pTxConfig->ChecksumCtrl);
 8009f92:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009f94:	68db      	ldr	r3, [r3, #12]
 8009f96:	f423 3240 	bic.w	r2, r3, #196608	@ 0x30000
 8009f9a:	68bb      	ldr	r3, [r7, #8]
 8009f9c:	695b      	ldr	r3, [r3, #20]
 8009f9e:	431a      	orrs	r2, r3
 8009fa0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009fa2:	60da      	str	r2, [r3, #12]
      }
    }

    bd_count += 1U;
 8009fa4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8009fa6:	3301      	adds	r3, #1
 8009fa8:	62bb      	str	r3, [r7, #40]	@ 0x28
  __ASM volatile ("dmb 0xF":::"memory");
 8009faa:	f3bf 8f5f 	dmb	sy
}
 8009fae:	bf00      	nop

    /* Ensure rest of descriptor is written to RAM before the OWN bit */
    __DMB();
    /* Set Own bit */
    SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_OWN);
 8009fb0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009fb2:	68db      	ldr	r3, [r3, #12]
 8009fb4:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009fb8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009fba:	60da      	str	r2, [r3, #12]
    /* Mark it as NORMAL descriptor */
    CLEAR_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_CTXT);
 8009fbc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009fbe:	68db      	ldr	r3, [r3, #12]
 8009fc0:	f023 4280 	bic.w	r2, r3, #1073741824	@ 0x40000000
 8009fc4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009fc6:	60da      	str	r2, [r3, #12]
  while (txbuffer->next != NULL)
 8009fc8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8009fca:	689b      	ldr	r3, [r3, #8]
 8009fcc:	2b00      	cmp	r3, #0
 8009fce:	f47f af2b 	bne.w	8009e28 <ETH_Prepare_Tx_Descriptors+0x308>
  }

  if (ItMode != ((uint32_t)RESET))
 8009fd2:	687b      	ldr	r3, [r7, #4]
 8009fd4:	2b00      	cmp	r3, #0
 8009fd6:	d006      	beq.n	8009fe6 <ETH_Prepare_Tx_Descriptors+0x4c6>
  {
    /* Set Interrupt on completion bit */
    SET_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 8009fd8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009fda:	689b      	ldr	r3, [r3, #8]
 8009fdc:	f043 4200 	orr.w	r2, r3, #2147483648	@ 0x80000000
 8009fe0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009fe2:	609a      	str	r2, [r3, #8]
 8009fe4:	e005      	b.n	8009ff2 <ETH_Prepare_Tx_Descriptors+0x4d2>
  }
  else
  {
    /* Clear Interrupt on completion bit */
    CLEAR_BIT(dmatxdesc->DESC2, ETH_DMATXNDESCRF_IOC);
 8009fe6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009fe8:	689b      	ldr	r3, [r3, #8]
 8009fea:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 8009fee:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ff0:	609a      	str	r2, [r3, #8]
  }

  /* Mark it as LAST descriptor */
  SET_BIT(dmatxdesc->DESC3, ETH_DMATXNDESCRF_LD);
 8009ff2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ff4:	68db      	ldr	r3, [r3, #12]
 8009ff6:	f043 5280 	orr.w	r2, r3, #268435456	@ 0x10000000
 8009ffa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8009ffc:	60da      	str	r2, [r3, #12]
  /* Save the current packet address to expose it to the application */
  dmatxdesclist->PacketAddress[descidx] = dmatxdesclist->CurrentPacketAddress;
 8009ffe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a000:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 800a002:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 800a004:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800a006:	3304      	adds	r3, #4
 800a008:	009b      	lsls	r3, r3, #2
 800a00a:	440b      	add	r3, r1
 800a00c:	605a      	str	r2, [r3, #4]

  dmatxdesclist->CurTxDesc = descidx;
 800a00e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a010:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 800a012:	611a      	str	r2, [r3, #16]
  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 800a014:	f3ef 8310 	mrs	r3, PRIMASK
 800a018:	613b      	str	r3, [r7, #16]
  return(result);
 800a01a:	693b      	ldr	r3, [r7, #16]

  /* Enter critical section */
  primask_bit = __get_PRIMASK();
 800a01c:	61fb      	str	r3, [r7, #28]
 800a01e:	2301      	movs	r3, #1
 800a020:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 800a022:	697b      	ldr	r3, [r7, #20]
 800a024:	f383 8810 	msr	PRIMASK, r3
}
 800a028:	bf00      	nop
  __set_PRIMASK(1);

  dmatxdesclist->BuffersInUse += bd_count + 1U;
 800a02a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a02c:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 800a02e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800a030:	4413      	add	r3, r2
 800a032:	1c5a      	adds	r2, r3, #1
 800a034:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a036:	629a      	str	r2, [r3, #40]	@ 0x28
 800a038:	69fb      	ldr	r3, [r7, #28]
 800a03a:	61bb      	str	r3, [r7, #24]
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 800a03c:	69bb      	ldr	r3, [r7, #24]
 800a03e:	f383 8810 	msr	PRIMASK, r3
}
 800a042:	bf00      	nop

  /* Exit critical section: restore previous priority mask */
  __set_PRIMASK(primask_bit);

  /* Return function status */
  return HAL_ETH_ERROR_NONE;
 800a044:	2300      	movs	r3, #0
}
 800a046:	4618      	mov	r0, r3
 800a048:	3744      	adds	r7, #68	@ 0x44
 800a04a:	46bd      	mov	sp, r7
 800a04c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a050:	4770      	bx	lr
 800a052:	bf00      	nop
 800a054:	ffff8000 	.word	0xffff8000

0800a058 <HAL_GPIO_Init>:
  * @param  GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 800a058:	b480      	push	{r7}
 800a05a:	b089      	sub	sp, #36	@ 0x24
 800a05c:	af00      	add	r7, sp, #0
 800a05e:	6078      	str	r0, [r7, #4]
 800a060:	6039      	str	r1, [r7, #0]
  uint32_t position = 0x00U;
 800a062:	2300      	movs	r3, #0
 800a064:	61fb      	str	r3, [r7, #28]
  EXTI_Core_TypeDef *EXTI_CurrentCPU;

#if defined(DUAL_CORE) && defined(CORE_CM4)
  EXTI_CurrentCPU = EXTI_D2; /* EXTI for CM4 CPU */
#else
  EXTI_CurrentCPU = EXTI_D1; /* EXTI for CM7 CPU */
 800a066:	4b89      	ldr	r3, [pc, #548]	@ (800a28c <HAL_GPIO_Init+0x234>)
 800a068:	617b      	str	r3, [r7, #20]
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));

  /* Configure the port pins */
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 800a06a:	e194      	b.n	800a396 <HAL_GPIO_Init+0x33e>
  {
    /* Get current io position */
    iocurrent = (GPIO_Init->Pin) & (1UL << position);
 800a06c:	683b      	ldr	r3, [r7, #0]
 800a06e:	681a      	ldr	r2, [r3, #0]
 800a070:	2101      	movs	r1, #1
 800a072:	69fb      	ldr	r3, [r7, #28]
 800a074:	fa01 f303 	lsl.w	r3, r1, r3
 800a078:	4013      	ands	r3, r2
 800a07a:	613b      	str	r3, [r7, #16]

    if (iocurrent != 0x00U)
 800a07c:	693b      	ldr	r3, [r7, #16]
 800a07e:	2b00      	cmp	r3, #0
 800a080:	f000 8186 	beq.w	800a390 <HAL_GPIO_Init+0x338>
    {
      /*--------------------- GPIO Mode Configuration ------------------------*/
      /* In case of Output or Alternate function mode selection */
      if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
 800a084:	683b      	ldr	r3, [r7, #0]
 800a086:	685b      	ldr	r3, [r3, #4]
 800a088:	f003 0303 	and.w	r3, r3, #3
 800a08c:	2b01      	cmp	r3, #1
 800a08e:	d005      	beq.n	800a09c <HAL_GPIO_Init+0x44>
 800a090:	683b      	ldr	r3, [r7, #0]
 800a092:	685b      	ldr	r3, [r3, #4]
 800a094:	f003 0303 	and.w	r3, r3, #3
 800a098:	2b02      	cmp	r3, #2
 800a09a:	d130      	bne.n	800a0fe <HAL_GPIO_Init+0xa6>
      {
        /* Check the Speed parameter */
        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));

        /* Configure the IO Speed */
        temp = GPIOx->OSPEEDR;
 800a09c:	687b      	ldr	r3, [r7, #4]
 800a09e:	689b      	ldr	r3, [r3, #8]
 800a0a0:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2U));
 800a0a2:	69fb      	ldr	r3, [r7, #28]
 800a0a4:	005b      	lsls	r3, r3, #1
 800a0a6:	2203      	movs	r2, #3
 800a0a8:	fa02 f303 	lsl.w	r3, r2, r3
 800a0ac:	43db      	mvns	r3, r3
 800a0ae:	69ba      	ldr	r2, [r7, #24]
 800a0b0:	4013      	ands	r3, r2
 800a0b2:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_Init->Speed << (position * 2U));
 800a0b4:	683b      	ldr	r3, [r7, #0]
 800a0b6:	68da      	ldr	r2, [r3, #12]
 800a0b8:	69fb      	ldr	r3, [r7, #28]
 800a0ba:	005b      	lsls	r3, r3, #1
 800a0bc:	fa02 f303 	lsl.w	r3, r2, r3
 800a0c0:	69ba      	ldr	r2, [r7, #24]
 800a0c2:	4313      	orrs	r3, r2
 800a0c4:	61bb      	str	r3, [r7, #24]
        GPIOx->OSPEEDR = temp;
 800a0c6:	687b      	ldr	r3, [r7, #4]
 800a0c8:	69ba      	ldr	r2, [r7, #24]
 800a0ca:	609a      	str	r2, [r3, #8]

        /* Configure the IO Output Type */
        temp = GPIOx->OTYPER;
 800a0cc:	687b      	ldr	r3, [r7, #4]
 800a0ce:	685b      	ldr	r3, [r3, #4]
 800a0d0:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OTYPER_OT0 << position) ;
 800a0d2:	2201      	movs	r2, #1
 800a0d4:	69fb      	ldr	r3, [r7, #28]
 800a0d6:	fa02 f303 	lsl.w	r3, r2, r3
 800a0da:	43db      	mvns	r3, r3
 800a0dc:	69ba      	ldr	r2, [r7, #24]
 800a0de:	4013      	ands	r3, r2
 800a0e0:	61bb      	str	r3, [r7, #24]
        temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
 800a0e2:	683b      	ldr	r3, [r7, #0]
 800a0e4:	685b      	ldr	r3, [r3, #4]
 800a0e6:	091b      	lsrs	r3, r3, #4
 800a0e8:	f003 0201 	and.w	r2, r3, #1
 800a0ec:	69fb      	ldr	r3, [r7, #28]
 800a0ee:	fa02 f303 	lsl.w	r3, r2, r3
 800a0f2:	69ba      	ldr	r2, [r7, #24]
 800a0f4:	4313      	orrs	r3, r2
 800a0f6:	61bb      	str	r3, [r7, #24]
        GPIOx->OTYPER = temp;
 800a0f8:	687b      	ldr	r3, [r7, #4]
 800a0fa:	69ba      	ldr	r2, [r7, #24]
 800a0fc:	605a      	str	r2, [r3, #4]
      }

      if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
 800a0fe:	683b      	ldr	r3, [r7, #0]
 800a100:	685b      	ldr	r3, [r3, #4]
 800a102:	f003 0303 	and.w	r3, r3, #3
 800a106:	2b03      	cmp	r3, #3
 800a108:	d017      	beq.n	800a13a <HAL_GPIO_Init+0xe2>
      {
       /* Check the Pull parameter */
       assert_param(IS_GPIO_PULL(GPIO_Init->Pull));

      /* Activate the Pull-up or Pull down resistor for the current IO */
      temp = GPIOx->PUPDR;
 800a10a:	687b      	ldr	r3, [r7, #4]
 800a10c:	68db      	ldr	r3, [r3, #12]
 800a10e:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
 800a110:	69fb      	ldr	r3, [r7, #28]
 800a112:	005b      	lsls	r3, r3, #1
 800a114:	2203      	movs	r2, #3
 800a116:	fa02 f303 	lsl.w	r3, r2, r3
 800a11a:	43db      	mvns	r3, r3
 800a11c:	69ba      	ldr	r2, [r7, #24]
 800a11e:	4013      	ands	r3, r2
 800a120:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Pull) << (position * 2U));
 800a122:	683b      	ldr	r3, [r7, #0]
 800a124:	689a      	ldr	r2, [r3, #8]
 800a126:	69fb      	ldr	r3, [r7, #28]
 800a128:	005b      	lsls	r3, r3, #1
 800a12a:	fa02 f303 	lsl.w	r3, r2, r3
 800a12e:	69ba      	ldr	r2, [r7, #24]
 800a130:	4313      	orrs	r3, r2
 800a132:	61bb      	str	r3, [r7, #24]
      GPIOx->PUPDR = temp;
 800a134:	687b      	ldr	r3, [r7, #4]
 800a136:	69ba      	ldr	r2, [r7, #24]
 800a138:	60da      	str	r2, [r3, #12]
      }

      /* In case of Alternate function mode selection */
      if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
 800a13a:	683b      	ldr	r3, [r7, #0]
 800a13c:	685b      	ldr	r3, [r3, #4]
 800a13e:	f003 0303 	and.w	r3, r3, #3
 800a142:	2b02      	cmp	r3, #2
 800a144:	d123      	bne.n	800a18e <HAL_GPIO_Init+0x136>
        /* Check the Alternate function parameters */
        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));

        /* Configure Alternate function mapped with the current IO */
        temp = GPIOx->AFR[position >> 3U];
 800a146:	69fb      	ldr	r3, [r7, #28]
 800a148:	08da      	lsrs	r2, r3, #3
 800a14a:	687b      	ldr	r3, [r7, #4]
 800a14c:	3208      	adds	r2, #8
 800a14e:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 800a152:	61bb      	str	r3, [r7, #24]
        temp &= ~(0xFU << ((position & 0x07U) * 4U));
 800a154:	69fb      	ldr	r3, [r7, #28]
 800a156:	f003 0307 	and.w	r3, r3, #7
 800a15a:	009b      	lsls	r3, r3, #2
 800a15c:	220f      	movs	r2, #15
 800a15e:	fa02 f303 	lsl.w	r3, r2, r3
 800a162:	43db      	mvns	r3, r3
 800a164:	69ba      	ldr	r2, [r7, #24]
 800a166:	4013      	ands	r3, r2
 800a168:	61bb      	str	r3, [r7, #24]
        temp |= ((GPIO_Init->Alternate) << ((position & 0x07U) * 4U));
 800a16a:	683b      	ldr	r3, [r7, #0]
 800a16c:	691a      	ldr	r2, [r3, #16]
 800a16e:	69fb      	ldr	r3, [r7, #28]
 800a170:	f003 0307 	and.w	r3, r3, #7
 800a174:	009b      	lsls	r3, r3, #2
 800a176:	fa02 f303 	lsl.w	r3, r2, r3
 800a17a:	69ba      	ldr	r2, [r7, #24]
 800a17c:	4313      	orrs	r3, r2
 800a17e:	61bb      	str	r3, [r7, #24]
        GPIOx->AFR[position >> 3U] = temp;
 800a180:	69fb      	ldr	r3, [r7, #28]
 800a182:	08da      	lsrs	r2, r3, #3
 800a184:	687b      	ldr	r3, [r7, #4]
 800a186:	3208      	adds	r2, #8
 800a188:	69b9      	ldr	r1, [r7, #24]
 800a18a:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
      }

      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
      temp = GPIOx->MODER;
 800a18e:	687b      	ldr	r3, [r7, #4]
 800a190:	681b      	ldr	r3, [r3, #0]
 800a192:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
 800a194:	69fb      	ldr	r3, [r7, #28]
 800a196:	005b      	lsls	r3, r3, #1
 800a198:	2203      	movs	r2, #3
 800a19a:	fa02 f303 	lsl.w	r3, r2, r3
 800a19e:	43db      	mvns	r3, r3
 800a1a0:	69ba      	ldr	r2, [r7, #24]
 800a1a2:	4013      	ands	r3, r2
 800a1a4:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
 800a1a6:	683b      	ldr	r3, [r7, #0]
 800a1a8:	685b      	ldr	r3, [r3, #4]
 800a1aa:	f003 0203 	and.w	r2, r3, #3
 800a1ae:	69fb      	ldr	r3, [r7, #28]
 800a1b0:	005b      	lsls	r3, r3, #1
 800a1b2:	fa02 f303 	lsl.w	r3, r2, r3
 800a1b6:	69ba      	ldr	r2, [r7, #24]
 800a1b8:	4313      	orrs	r3, r2
 800a1ba:	61bb      	str	r3, [r7, #24]
      GPIOx->MODER = temp;
 800a1bc:	687b      	ldr	r3, [r7, #4]
 800a1be:	69ba      	ldr	r2, [r7, #24]
 800a1c0:	601a      	str	r2, [r3, #0]

      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
 800a1c2:	683b      	ldr	r3, [r7, #0]
 800a1c4:	685b      	ldr	r3, [r3, #4]
 800a1c6:	f403 3340 	and.w	r3, r3, #196608	@ 0x30000
 800a1ca:	2b00      	cmp	r3, #0
 800a1cc:	f000 80e0 	beq.w	800a390 <HAL_GPIO_Init+0x338>
      {
        /* Enable SYSCFG Clock */
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 800a1d0:	4b2f      	ldr	r3, [pc, #188]	@ (800a290 <HAL_GPIO_Init+0x238>)
 800a1d2:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 800a1d6:	4a2e      	ldr	r2, [pc, #184]	@ (800a290 <HAL_GPIO_Init+0x238>)
 800a1d8:	f043 0302 	orr.w	r3, r3, #2
 800a1dc:	f8c2 30f4 	str.w	r3, [r2, #244]	@ 0xf4
 800a1e0:	4b2b      	ldr	r3, [pc, #172]	@ (800a290 <HAL_GPIO_Init+0x238>)
 800a1e2:	f8d3 30f4 	ldr.w	r3, [r3, #244]	@ 0xf4
 800a1e6:	f003 0302 	and.w	r3, r3, #2
 800a1ea:	60fb      	str	r3, [r7, #12]
 800a1ec:	68fb      	ldr	r3, [r7, #12]

        temp = SYSCFG->EXTICR[position >> 2U];
 800a1ee:	4a29      	ldr	r2, [pc, #164]	@ (800a294 <HAL_GPIO_Init+0x23c>)
 800a1f0:	69fb      	ldr	r3, [r7, #28]
 800a1f2:	089b      	lsrs	r3, r3, #2
 800a1f4:	3302      	adds	r3, #2
 800a1f6:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 800a1fa:	61bb      	str	r3, [r7, #24]
        temp &= ~(0x0FUL << (4U * (position & 0x03U)));
 800a1fc:	69fb      	ldr	r3, [r7, #28]
 800a1fe:	f003 0303 	and.w	r3, r3, #3
 800a202:	009b      	lsls	r3, r3, #2
 800a204:	220f      	movs	r2, #15
 800a206:	fa02 f303 	lsl.w	r3, r2, r3
 800a20a:	43db      	mvns	r3, r3
 800a20c:	69ba      	ldr	r2, [r7, #24]
 800a20e:	4013      	ands	r3, r2
 800a210:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U)));
 800a212:	687b      	ldr	r3, [r7, #4]
 800a214:	4a20      	ldr	r2, [pc, #128]	@ (800a298 <HAL_GPIO_Init+0x240>)
 800a216:	4293      	cmp	r3, r2
 800a218:	d052      	beq.n	800a2c0 <HAL_GPIO_Init+0x268>
 800a21a:	687b      	ldr	r3, [r7, #4]
 800a21c:	4a1f      	ldr	r2, [pc, #124]	@ (800a29c <HAL_GPIO_Init+0x244>)
 800a21e:	4293      	cmp	r3, r2
 800a220:	d031      	beq.n	800a286 <HAL_GPIO_Init+0x22e>
 800a222:	687b      	ldr	r3, [r7, #4]
 800a224:	4a1e      	ldr	r2, [pc, #120]	@ (800a2a0 <HAL_GPIO_Init+0x248>)
 800a226:	4293      	cmp	r3, r2
 800a228:	d02b      	beq.n	800a282 <HAL_GPIO_Init+0x22a>
 800a22a:	687b      	ldr	r3, [r7, #4]
 800a22c:	4a1d      	ldr	r2, [pc, #116]	@ (800a2a4 <HAL_GPIO_Init+0x24c>)
 800a22e:	4293      	cmp	r3, r2
 800a230:	d025      	beq.n	800a27e <HAL_GPIO_Init+0x226>
 800a232:	687b      	ldr	r3, [r7, #4]
 800a234:	4a1c      	ldr	r2, [pc, #112]	@ (800a2a8 <HAL_GPIO_Init+0x250>)
 800a236:	4293      	cmp	r3, r2
 800a238:	d01f      	beq.n	800a27a <HAL_GPIO_Init+0x222>
 800a23a:	687b      	ldr	r3, [r7, #4]
 800a23c:	4a1b      	ldr	r2, [pc, #108]	@ (800a2ac <HAL_GPIO_Init+0x254>)
 800a23e:	4293      	cmp	r3, r2
 800a240:	d019      	beq.n	800a276 <HAL_GPIO_Init+0x21e>
 800a242:	687b      	ldr	r3, [r7, #4]
 800a244:	4a1a      	ldr	r2, [pc, #104]	@ (800a2b0 <HAL_GPIO_Init+0x258>)
 800a246:	4293      	cmp	r3, r2
 800a248:	d013      	beq.n	800a272 <HAL_GPIO_Init+0x21a>
 800a24a:	687b      	ldr	r3, [r7, #4]
 800a24c:	4a19      	ldr	r2, [pc, #100]	@ (800a2b4 <HAL_GPIO_Init+0x25c>)
 800a24e:	4293      	cmp	r3, r2
 800a250:	d00d      	beq.n	800a26e <HAL_GPIO_Init+0x216>
 800a252:	687b      	ldr	r3, [r7, #4]
 800a254:	4a18      	ldr	r2, [pc, #96]	@ (800a2b8 <HAL_GPIO_Init+0x260>)
 800a256:	4293      	cmp	r3, r2
 800a258:	d007      	beq.n	800a26a <HAL_GPIO_Init+0x212>
 800a25a:	687b      	ldr	r3, [r7, #4]
 800a25c:	4a17      	ldr	r2, [pc, #92]	@ (800a2bc <HAL_GPIO_Init+0x264>)
 800a25e:	4293      	cmp	r3, r2
 800a260:	d101      	bne.n	800a266 <HAL_GPIO_Init+0x20e>
 800a262:	2309      	movs	r3, #9
 800a264:	e02d      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a266:	230a      	movs	r3, #10
 800a268:	e02b      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a26a:	2308      	movs	r3, #8
 800a26c:	e029      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a26e:	2307      	movs	r3, #7
 800a270:	e027      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a272:	2306      	movs	r3, #6
 800a274:	e025      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a276:	2305      	movs	r3, #5
 800a278:	e023      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a27a:	2304      	movs	r3, #4
 800a27c:	e021      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a27e:	2303      	movs	r3, #3
 800a280:	e01f      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a282:	2302      	movs	r3, #2
 800a284:	e01d      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a286:	2301      	movs	r3, #1
 800a288:	e01b      	b.n	800a2c2 <HAL_GPIO_Init+0x26a>
 800a28a:	bf00      	nop
 800a28c:	58000080 	.word	0x58000080
 800a290:	58024400 	.word	0x58024400
 800a294:	58000400 	.word	0x58000400
 800a298:	58020000 	.word	0x58020000
 800a29c:	58020400 	.word	0x58020400
 800a2a0:	58020800 	.word	0x58020800
 800a2a4:	58020c00 	.word	0x58020c00
 800a2a8:	58021000 	.word	0x58021000
 800a2ac:	58021400 	.word	0x58021400
 800a2b0:	58021800 	.word	0x58021800
 800a2b4:	58021c00 	.word	0x58021c00
 800a2b8:	58022000 	.word	0x58022000
 800a2bc:	58022400 	.word	0x58022400
 800a2c0:	2300      	movs	r3, #0
 800a2c2:	69fa      	ldr	r2, [r7, #28]
 800a2c4:	f002 0203 	and.w	r2, r2, #3
 800a2c8:	0092      	lsls	r2, r2, #2
 800a2ca:	4093      	lsls	r3, r2
 800a2cc:	69ba      	ldr	r2, [r7, #24]
 800a2ce:	4313      	orrs	r3, r2
 800a2d0:	61bb      	str	r3, [r7, #24]
        SYSCFG->EXTICR[position >> 2U] = temp;
 800a2d2:	4938      	ldr	r1, [pc, #224]	@ (800a3b4 <HAL_GPIO_Init+0x35c>)
 800a2d4:	69fb      	ldr	r3, [r7, #28]
 800a2d6:	089b      	lsrs	r3, r3, #2
 800a2d8:	3302      	adds	r3, #2
 800a2da:	69ba      	ldr	r2, [r7, #24]
 800a2dc:	f841 2023 	str.w	r2, [r1, r3, lsl #2]

        /* Clear Rising Falling edge configuration */
        temp = EXTI->RTSR1;
 800a2e0:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a2e4:	681b      	ldr	r3, [r3, #0]
 800a2e6:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 800a2e8:	693b      	ldr	r3, [r7, #16]
 800a2ea:	43db      	mvns	r3, r3
 800a2ec:	69ba      	ldr	r2, [r7, #24]
 800a2ee:	4013      	ands	r3, r2
 800a2f0:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
 800a2f2:	683b      	ldr	r3, [r7, #0]
 800a2f4:	685b      	ldr	r3, [r3, #4]
 800a2f6:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 800a2fa:	2b00      	cmp	r3, #0
 800a2fc:	d003      	beq.n	800a306 <HAL_GPIO_Init+0x2ae>
        {
          temp |= iocurrent;
 800a2fe:	69ba      	ldr	r2, [r7, #24]
 800a300:	693b      	ldr	r3, [r7, #16]
 800a302:	4313      	orrs	r3, r2
 800a304:	61bb      	str	r3, [r7, #24]
        }
        EXTI->RTSR1 = temp;
 800a306:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a30a:	69bb      	ldr	r3, [r7, #24]
 800a30c:	6013      	str	r3, [r2, #0]

        temp = EXTI->FTSR1;
 800a30e:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a312:	685b      	ldr	r3, [r3, #4]
 800a314:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 800a316:	693b      	ldr	r3, [r7, #16]
 800a318:	43db      	mvns	r3, r3
 800a31a:	69ba      	ldr	r2, [r7, #24]
 800a31c:	4013      	ands	r3, r2
 800a31e:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
 800a320:	683b      	ldr	r3, [r7, #0]
 800a322:	685b      	ldr	r3, [r3, #4]
 800a324:	f403 1300 	and.w	r3, r3, #2097152	@ 0x200000
 800a328:	2b00      	cmp	r3, #0
 800a32a:	d003      	beq.n	800a334 <HAL_GPIO_Init+0x2dc>
        {
          temp |= iocurrent;
 800a32c:	69ba      	ldr	r2, [r7, #24]
 800a32e:	693b      	ldr	r3, [r7, #16]
 800a330:	4313      	orrs	r3, r2
 800a332:	61bb      	str	r3, [r7, #24]
        }
        EXTI->FTSR1 = temp;
 800a334:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a338:	69bb      	ldr	r3, [r7, #24]
 800a33a:	6053      	str	r3, [r2, #4]

        temp = EXTI_CurrentCPU->EMR1;
 800a33c:	697b      	ldr	r3, [r7, #20]
 800a33e:	685b      	ldr	r3, [r3, #4]
 800a340:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 800a342:	693b      	ldr	r3, [r7, #16]
 800a344:	43db      	mvns	r3, r3
 800a346:	69ba      	ldr	r2, [r7, #24]
 800a348:	4013      	ands	r3, r2
 800a34a:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
 800a34c:	683b      	ldr	r3, [r7, #0]
 800a34e:	685b      	ldr	r3, [r3, #4]
 800a350:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a354:	2b00      	cmp	r3, #0
 800a356:	d003      	beq.n	800a360 <HAL_GPIO_Init+0x308>
        {
          temp |= iocurrent;
 800a358:	69ba      	ldr	r2, [r7, #24]
 800a35a:	693b      	ldr	r3, [r7, #16]
 800a35c:	4313      	orrs	r3, r2
 800a35e:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->EMR1 = temp;
 800a360:	697b      	ldr	r3, [r7, #20]
 800a362:	69ba      	ldr	r2, [r7, #24]
 800a364:	605a      	str	r2, [r3, #4]

        /* Clear EXTI line configuration */
        temp = EXTI_CurrentCPU->IMR1;
 800a366:	697b      	ldr	r3, [r7, #20]
 800a368:	681b      	ldr	r3, [r3, #0]
 800a36a:	61bb      	str	r3, [r7, #24]
        temp &= ~(iocurrent);
 800a36c:	693b      	ldr	r3, [r7, #16]
 800a36e:	43db      	mvns	r3, r3
 800a370:	69ba      	ldr	r2, [r7, #24]
 800a372:	4013      	ands	r3, r2
 800a374:	61bb      	str	r3, [r7, #24]
        if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
 800a376:	683b      	ldr	r3, [r7, #0]
 800a378:	685b      	ldr	r3, [r3, #4]
 800a37a:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 800a37e:	2b00      	cmp	r3, #0
 800a380:	d003      	beq.n	800a38a <HAL_GPIO_Init+0x332>
        {
          temp |= iocurrent;
 800a382:	69ba      	ldr	r2, [r7, #24]
 800a384:	693b      	ldr	r3, [r7, #16]
 800a386:	4313      	orrs	r3, r2
 800a388:	61bb      	str	r3, [r7, #24]
        }
        EXTI_CurrentCPU->IMR1 = temp;
 800a38a:	697b      	ldr	r3, [r7, #20]
 800a38c:	69ba      	ldr	r2, [r7, #24]
 800a38e:	601a      	str	r2, [r3, #0]
      }
    }

    position++;
 800a390:	69fb      	ldr	r3, [r7, #28]
 800a392:	3301      	adds	r3, #1
 800a394:	61fb      	str	r3, [r7, #28]
  while (((GPIO_Init->Pin) >> position) != 0x00U)
 800a396:	683b      	ldr	r3, [r7, #0]
 800a398:	681a      	ldr	r2, [r3, #0]
 800a39a:	69fb      	ldr	r3, [r7, #28]
 800a39c:	fa22 f303 	lsr.w	r3, r2, r3
 800a3a0:	2b00      	cmp	r3, #0
 800a3a2:	f47f ae63 	bne.w	800a06c <HAL_GPIO_Init+0x14>
  }
}
 800a3a6:	bf00      	nop
 800a3a8:	bf00      	nop
 800a3aa:	3724      	adds	r7, #36	@ 0x24
 800a3ac:	46bd      	mov	sp, r7
 800a3ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a3b2:	4770      	bx	lr
 800a3b4:	58000400 	.word	0x58000400

0800a3b8 <HAL_GPIO_ReadPin>:
  * @param  GPIO_Pin: specifies the port bit to read.
  *         This parameter can be GPIO_PIN_x where x can be (0..15).
  * @retval The input port pin value.
  */
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
 800a3b8:	b480      	push	{r7}
 800a3ba:	b085      	sub	sp, #20
 800a3bc:	af00      	add	r7, sp, #0
 800a3be:	6078      	str	r0, [r7, #4]
 800a3c0:	460b      	mov	r3, r1
 800a3c2:	807b      	strh	r3, [r7, #2]
  GPIO_PinState bitstatus;

  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));

  if ((GPIOx->IDR & GPIO_Pin) != 0x00U)
 800a3c4:	687b      	ldr	r3, [r7, #4]
 800a3c6:	691a      	ldr	r2, [r3, #16]
 800a3c8:	887b      	ldrh	r3, [r7, #2]
 800a3ca:	4013      	ands	r3, r2
 800a3cc:	2b00      	cmp	r3, #0
 800a3ce:	d002      	beq.n	800a3d6 <HAL_GPIO_ReadPin+0x1e>
  {
    bitstatus = GPIO_PIN_SET;
 800a3d0:	2301      	movs	r3, #1
 800a3d2:	73fb      	strb	r3, [r7, #15]
 800a3d4:	e001      	b.n	800a3da <HAL_GPIO_ReadPin+0x22>
  }
  else
  {
    bitstatus = GPIO_PIN_RESET;
 800a3d6:	2300      	movs	r3, #0
 800a3d8:	73fb      	strb	r3, [r7, #15]
  }
  return bitstatus;
 800a3da:	7bfb      	ldrb	r3, [r7, #15]
}
 800a3dc:	4618      	mov	r0, r3
 800a3de:	3714      	adds	r7, #20
 800a3e0:	46bd      	mov	sp, r7
 800a3e2:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a3e6:	4770      	bx	lr

0800a3e8 <HAL_GPIO_WritePin>:
  *            @arg GPIO_PIN_RESET: to clear the port pin
  *            @arg GPIO_PIN_SET: to set the port pin
  * @retval None
  */
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
 800a3e8:	b480      	push	{r7}
 800a3ea:	b083      	sub	sp, #12
 800a3ec:	af00      	add	r7, sp, #0
 800a3ee:	6078      	str	r0, [r7, #4]
 800a3f0:	460b      	mov	r3, r1
 800a3f2:	807b      	strh	r3, [r7, #2]
 800a3f4:	4613      	mov	r3, r2
 800a3f6:	707b      	strb	r3, [r7, #1]
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if (PinState != GPIO_PIN_RESET)
 800a3f8:	787b      	ldrb	r3, [r7, #1]
 800a3fa:	2b00      	cmp	r3, #0
 800a3fc:	d003      	beq.n	800a406 <HAL_GPIO_WritePin+0x1e>
  {
    GPIOx->BSRR = GPIO_Pin;
 800a3fe:	887a      	ldrh	r2, [r7, #2]
 800a400:	687b      	ldr	r3, [r7, #4]
 800a402:	619a      	str	r2, [r3, #24]
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
  }
}
 800a404:	e003      	b.n	800a40e <HAL_GPIO_WritePin+0x26>
    GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER;
 800a406:	887b      	ldrh	r3, [r7, #2]
 800a408:	041a      	lsls	r2, r3, #16
 800a40a:	687b      	ldr	r3, [r7, #4]
 800a40c:	619a      	str	r2, [r3, #24]
}
 800a40e:	bf00      	nop
 800a410:	370c      	adds	r7, #12
 800a412:	46bd      	mov	sp, r7
 800a414:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a418:	4770      	bx	lr

0800a41a <HAL_IWDG_Init>:
  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
  *                the configuration information for the specified IWDG module.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
{
 800a41a:	b580      	push	{r7, lr}
 800a41c:	b084      	sub	sp, #16
 800a41e:	af00      	add	r7, sp, #0
 800a420:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  /* Check the IWDG handle allocation */
  if (hiwdg == NULL)
 800a422:	687b      	ldr	r3, [r7, #4]
 800a424:	2b00      	cmp	r3, #0
 800a426:	d101      	bne.n	800a42c <HAL_IWDG_Init+0x12>
  {
    return HAL_ERROR;
 800a428:	2301      	movs	r3, #1
 800a42a:	e041      	b.n	800a4b0 <HAL_IWDG_Init+0x96>
  assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
  assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
  assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window));

  /* Enable IWDG. LSI is turned on automatically */
  __HAL_IWDG_START(hiwdg);
 800a42c:	687b      	ldr	r3, [r7, #4]
 800a42e:	681b      	ldr	r3, [r3, #0]
 800a430:	f64c 42cc 	movw	r2, #52428	@ 0xcccc
 800a434:	601a      	str	r2, [r3, #0]

  /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers by writing
  0x5555 in KR */
  IWDG_ENABLE_WRITE_ACCESS(hiwdg);
 800a436:	687b      	ldr	r3, [r7, #4]
 800a438:	681b      	ldr	r3, [r3, #0]
 800a43a:	f245 5255 	movw	r2, #21845	@ 0x5555
 800a43e:	601a      	str	r2, [r3, #0]

  /* Write to IWDG registers the Prescaler & Reload values to work with */
  hiwdg->Instance->PR = hiwdg->Init.Prescaler;
 800a440:	687b      	ldr	r3, [r7, #4]
 800a442:	681b      	ldr	r3, [r3, #0]
 800a444:	687a      	ldr	r2, [r7, #4]
 800a446:	6852      	ldr	r2, [r2, #4]
 800a448:	605a      	str	r2, [r3, #4]
  hiwdg->Instance->RLR = hiwdg->Init.Reload;
 800a44a:	687b      	ldr	r3, [r7, #4]
 800a44c:	681b      	ldr	r3, [r3, #0]
 800a44e:	687a      	ldr	r2, [r7, #4]
 800a450:	6892      	ldr	r2, [r2, #8]
 800a452:	609a      	str	r2, [r3, #8]

  /* Check pending flag, if previous update not done, return timeout */
  tickstart = HAL_GetTick();
 800a454:	f7fb fad0 	bl	80059f8 <HAL_GetTick>
 800a458:	60f8      	str	r0, [r7, #12]

  /* Wait for register to be updated */
  while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
 800a45a:	e00f      	b.n	800a47c <HAL_IWDG_Init+0x62>
  {
    if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
 800a45c:	f7fb facc 	bl	80059f8 <HAL_GetTick>
 800a460:	4602      	mov	r2, r0
 800a462:	68fb      	ldr	r3, [r7, #12]
 800a464:	1ad3      	subs	r3, r2, r3
 800a466:	2b31      	cmp	r3, #49	@ 0x31
 800a468:	d908      	bls.n	800a47c <HAL_IWDG_Init+0x62>
    {
      if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
 800a46a:	687b      	ldr	r3, [r7, #4]
 800a46c:	681b      	ldr	r3, [r3, #0]
 800a46e:	68db      	ldr	r3, [r3, #12]
 800a470:	f003 0307 	and.w	r3, r3, #7
 800a474:	2b00      	cmp	r3, #0
 800a476:	d001      	beq.n	800a47c <HAL_IWDG_Init+0x62>
      {
        return HAL_TIMEOUT;
 800a478:	2303      	movs	r3, #3
 800a47a:	e019      	b.n	800a4b0 <HAL_IWDG_Init+0x96>
  while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u)
 800a47c:	687b      	ldr	r3, [r7, #4]
 800a47e:	681b      	ldr	r3, [r3, #0]
 800a480:	68db      	ldr	r3, [r3, #12]
 800a482:	f003 0307 	and.w	r3, r3, #7
 800a486:	2b00      	cmp	r3, #0
 800a488:	d1e8      	bne.n	800a45c <HAL_IWDG_Init+0x42>
    }
  }

  /* If window parameter is different than current value, modify window
  register */
  if (hiwdg->Instance->WINR != hiwdg->Init.Window)
 800a48a:	687b      	ldr	r3, [r7, #4]
 800a48c:	681b      	ldr	r3, [r3, #0]
 800a48e:	691a      	ldr	r2, [r3, #16]
 800a490:	687b      	ldr	r3, [r7, #4]
 800a492:	68db      	ldr	r3, [r3, #12]
 800a494:	429a      	cmp	r2, r3
 800a496:	d005      	beq.n	800a4a4 <HAL_IWDG_Init+0x8a>
  {
    /* Write to IWDG WINR the IWDG_Window value to compare with. In any case,
    even if window feature is disabled, Watchdog will be reloaded by writing
    windows register */
    hiwdg->Instance->WINR = hiwdg->Init.Window;
 800a498:	687b      	ldr	r3, [r7, #4]
 800a49a:	681b      	ldr	r3, [r3, #0]
 800a49c:	687a      	ldr	r2, [r7, #4]
 800a49e:	68d2      	ldr	r2, [r2, #12]
 800a4a0:	611a      	str	r2, [r3, #16]
 800a4a2:	e004      	b.n	800a4ae <HAL_IWDG_Init+0x94>
  }
  else
  {
    /* Reload IWDG counter with value defined in the reload register */
    __HAL_IWDG_RELOAD_COUNTER(hiwdg);
 800a4a4:	687b      	ldr	r3, [r7, #4]
 800a4a6:	681b      	ldr	r3, [r3, #0]
 800a4a8:	f64a 22aa 	movw	r2, #43690	@ 0xaaaa
 800a4ac:	601a      	str	r2, [r3, #0]
  }

  /* Return function status */
  return HAL_OK;
 800a4ae:	2300      	movs	r3, #0
}
 800a4b0:	4618      	mov	r0, r3
 800a4b2:	3710      	adds	r7, #16
 800a4b4:	46bd      	mov	sp, r7
 800a4b6:	bd80      	pop	{r7, pc}

0800a4b8 <HAL_IWDG_Refresh>:
  * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
  *                the configuration information for the specified IWDG module.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
{
 800a4b8:	b480      	push	{r7}
 800a4ba:	b083      	sub	sp, #12
 800a4bc:	af00      	add	r7, sp, #0
 800a4be:	6078      	str	r0, [r7, #4]
  /* Reload IWDG counter with value defined in the reload register */
  __HAL_IWDG_RELOAD_COUNTER(hiwdg);
 800a4c0:	687b      	ldr	r3, [r7, #4]
 800a4c2:	681b      	ldr	r3, [r3, #0]
 800a4c4:	f64a 22aa 	movw	r2, #43690	@ 0xaaaa
 800a4c8:	601a      	str	r2, [r3, #0]

  /* Return function status */
  return HAL_OK;
 800a4ca:	2300      	movs	r3, #0
}
 800a4cc:	4618      	mov	r0, r3
 800a4ce:	370c      	adds	r7, #12
 800a4d0:	46bd      	mov	sp, r7
 800a4d2:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a4d6:	4770      	bx	lr

0800a4d8 <HAL_PWR_ConfigPVD>:
  *         driver. All combination are allowed: wake up only Cortex-M7, wake up
  *         only Cortex-M4 or wake up Cortex-M7 and Cortex-M4.
  * @retval None.
  */
void HAL_PWR_ConfigPVD (PWR_PVDTypeDef *sConfigPVD)
{
 800a4d8:	b480      	push	{r7}
 800a4da:	b083      	sub	sp, #12
 800a4dc:	af00      	add	r7, sp, #0
 800a4de:	6078      	str	r0, [r7, #4]
  /* Check the PVD configuration parameter */
  if (sConfigPVD == NULL)
 800a4e0:	687b      	ldr	r3, [r7, #4]
 800a4e2:	2b00      	cmp	r3, #0
 800a4e4:	d069      	beq.n	800a5ba <HAL_PWR_ConfigPVD+0xe2>
  /* Check the parameters */
  assert_param (IS_PWR_PVD_LEVEL (sConfigPVD->PVDLevel));
  assert_param (IS_PWR_PVD_MODE (sConfigPVD->Mode));

  /* Set PLS[7:5] bits according to PVDLevel value */
  MODIFY_REG (PWR->CR1, PWR_CR1_PLS, sConfigPVD->PVDLevel);
 800a4e6:	4b38      	ldr	r3, [pc, #224]	@ (800a5c8 <HAL_PWR_ConfigPVD+0xf0>)
 800a4e8:	681b      	ldr	r3, [r3, #0]
 800a4ea:	f023 02e0 	bic.w	r2, r3, #224	@ 0xe0
 800a4ee:	687b      	ldr	r3, [r7, #4]
 800a4f0:	681b      	ldr	r3, [r3, #0]
 800a4f2:	4935      	ldr	r1, [pc, #212]	@ (800a5c8 <HAL_PWR_ConfigPVD+0xf0>)
 800a4f4:	4313      	orrs	r3, r2
 800a4f6:	600b      	str	r3, [r1, #0]

  /* Clear previous config */
#if !defined (DUAL_CORE)
  __HAL_PWR_PVD_EXTI_DISABLE_EVENT ();
 800a4f8:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a4fc:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800a500:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a504:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a508:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  __HAL_PWR_PVD_EXTI_DISABLE_IT ();
 800a50c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a510:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800a514:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a518:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a51c:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
#endif /* !defined (DUAL_CORE) */

  __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE ();
 800a520:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a524:	681b      	ldr	r3, [r3, #0]
 800a526:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a52a:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a52e:	6013      	str	r3, [r2, #0]
  __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE ();
 800a530:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a534:	685b      	ldr	r3, [r3, #4]
 800a536:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a53a:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a53e:	6053      	str	r3, [r2, #4]

#if !defined (DUAL_CORE)
  /* Interrupt mode configuration */
  if ((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
 800a540:	687b      	ldr	r3, [r7, #4]
 800a542:	685b      	ldr	r3, [r3, #4]
 800a544:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 800a548:	2b00      	cmp	r3, #0
 800a54a:	d009      	beq.n	800a560 <HAL_PWR_ConfigPVD+0x88>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_IT ();
 800a54c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a550:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800a554:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a558:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a55c:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
  }

  /* Event mode configuration */
  if ((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
 800a560:	687b      	ldr	r3, [r7, #4]
 800a562:	685b      	ldr	r3, [r3, #4]
 800a564:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a568:	2b00      	cmp	r3, #0
 800a56a:	d009      	beq.n	800a580 <HAL_PWR_ConfigPVD+0xa8>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_EVENT ();
 800a56c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a570:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800a574:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a578:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a57c:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  }
#endif /* !defined (DUAL_CORE) */

  /* Rising edge configuration */
  if ((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
 800a580:	687b      	ldr	r3, [r7, #4]
 800a582:	685b      	ldr	r3, [r3, #4]
 800a584:	f003 0301 	and.w	r3, r3, #1
 800a588:	2b00      	cmp	r3, #0
 800a58a:	d007      	beq.n	800a59c <HAL_PWR_ConfigPVD+0xc4>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE ();
 800a58c:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a590:	681b      	ldr	r3, [r3, #0]
 800a592:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a596:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a59a:	6013      	str	r3, [r2, #0]
  }

  /* Falling edge configuration */
  if ((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
 800a59c:	687b      	ldr	r3, [r7, #4]
 800a59e:	685b      	ldr	r3, [r3, #4]
 800a5a0:	f003 0302 	and.w	r3, r3, #2
 800a5a4:	2b00      	cmp	r3, #0
 800a5a6:	d009      	beq.n	800a5bc <HAL_PWR_ConfigPVD+0xe4>
  {
    __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE ();
 800a5a8:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a5ac:	685b      	ldr	r3, [r3, #4]
 800a5ae:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a5b2:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a5b6:	6053      	str	r3, [r2, #4]
 800a5b8:	e000      	b.n	800a5bc <HAL_PWR_ConfigPVD+0xe4>
    return;
 800a5ba:	bf00      	nop
  }
}
 800a5bc:	370c      	adds	r7, #12
 800a5be:	46bd      	mov	sp, r7
 800a5c0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a5c4:	4770      	bx	lr
 800a5c6:	bf00      	nop
 800a5c8:	58024800 	.word	0x58024800

0800a5cc <HAL_PWR_EnablePVD>:
/**
  * @brief Enable the Programmable Voltage Detector (PVD).
  * @retval None.
  */
void HAL_PWR_EnablePVD (void)
{
 800a5cc:	b480      	push	{r7}
 800a5ce:	af00      	add	r7, sp, #0
  /* Enable the power voltage detector */
  SET_BIT (PWR->CR1, PWR_CR1_PVDEN);
 800a5d0:	4b05      	ldr	r3, [pc, #20]	@ (800a5e8 <HAL_PWR_EnablePVD+0x1c>)
 800a5d2:	681b      	ldr	r3, [r3, #0]
 800a5d4:	4a04      	ldr	r2, [pc, #16]	@ (800a5e8 <HAL_PWR_EnablePVD+0x1c>)
 800a5d6:	f043 0310 	orr.w	r3, r3, #16
 800a5da:	6013      	str	r3, [r2, #0]
}
 800a5dc:	bf00      	nop
 800a5de:	46bd      	mov	sp, r7
 800a5e0:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a5e4:	4770      	bx	lr
 800a5e6:	bf00      	nop
 800a5e8:	58024800 	.word	0x58024800

0800a5ec <HAL_PWREx_ConfigSupply>:
  *         PWR_SMPS_2V5_SUPPLIES_EXT are used only for lines that supports SMPS
  *         regulator.
  * @retval HAL status.
  */
HAL_StatusTypeDef HAL_PWREx_ConfigSupply (uint32_t SupplySource)
{
 800a5ec:	b580      	push	{r7, lr}
 800a5ee:	b084      	sub	sp, #16
 800a5f0:	af00      	add	r7, sp, #0
 800a5f2:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param (IS_PWR_SUPPLY (SupplySource));

  /* Check if supply source was configured */
#if defined (PWR_FLAG_SCUEN)
  if (__HAL_PWR_GET_FLAG (PWR_FLAG_SCUEN) == 0U)
 800a5f4:	4b19      	ldr	r3, [pc, #100]	@ (800a65c <HAL_PWREx_ConfigSupply+0x70>)
 800a5f6:	68db      	ldr	r3, [r3, #12]
 800a5f8:	f003 0304 	and.w	r3, r3, #4
 800a5fc:	2b04      	cmp	r3, #4
 800a5fe:	d00a      	beq.n	800a616 <HAL_PWREx_ConfigSupply+0x2a>
#else
  if ((PWR->CR3 & (PWR_CR3_SMPSEN | PWR_CR3_LDOEN | PWR_CR3_BYPASS)) != (PWR_CR3_SMPSEN | PWR_CR3_LDOEN))
#endif /* defined (PWR_FLAG_SCUEN) */
  {
    /* Check supply configuration */
    if ((PWR->CR3 & PWR_SUPPLY_CONFIG_MASK) != SupplySource)
 800a600:	4b16      	ldr	r3, [pc, #88]	@ (800a65c <HAL_PWREx_ConfigSupply+0x70>)
 800a602:	68db      	ldr	r3, [r3, #12]
 800a604:	f003 0307 	and.w	r3, r3, #7
 800a608:	687a      	ldr	r2, [r7, #4]
 800a60a:	429a      	cmp	r2, r3
 800a60c:	d001      	beq.n	800a612 <HAL_PWREx_ConfigSupply+0x26>
    {
      /* Supply configuration update locked, can't apply a new supply config */
      return HAL_ERROR;
 800a60e:	2301      	movs	r3, #1
 800a610:	e01f      	b.n	800a652 <HAL_PWREx_ConfigSupply+0x66>
    else
    {
      /* Supply configuration update locked, but new supply configuration
         matches with old supply configuration : nothing to do
      */
      return HAL_OK;
 800a612:	2300      	movs	r3, #0
 800a614:	e01d      	b.n	800a652 <HAL_PWREx_ConfigSupply+0x66>
    }
  }

  /* Set the power supply configuration */
  MODIFY_REG (PWR->CR3, PWR_SUPPLY_CONFIG_MASK, SupplySource);
 800a616:	4b11      	ldr	r3, [pc, #68]	@ (800a65c <HAL_PWREx_ConfigSupply+0x70>)
 800a618:	68db      	ldr	r3, [r3, #12]
 800a61a:	f023 0207 	bic.w	r2, r3, #7
 800a61e:	490f      	ldr	r1, [pc, #60]	@ (800a65c <HAL_PWREx_ConfigSupply+0x70>)
 800a620:	687b      	ldr	r3, [r7, #4]
 800a622:	4313      	orrs	r3, r2
 800a624:	60cb      	str	r3, [r1, #12]

  /* Get tick */
  tickstart = HAL_GetTick ();
 800a626:	f7fb f9e7 	bl	80059f8 <HAL_GetTick>
 800a62a:	60f8      	str	r0, [r7, #12]

  /* Wait till voltage level flag is set */
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 800a62c:	e009      	b.n	800a642 <HAL_PWREx_ConfigSupply+0x56>
  {
    if ((HAL_GetTick () - tickstart) > PWR_FLAG_SETTING_DELAY)
 800a62e:	f7fb f9e3 	bl	80059f8 <HAL_GetTick>
 800a632:	4602      	mov	r2, r0
 800a634:	68fb      	ldr	r3, [r7, #12]
 800a636:	1ad3      	subs	r3, r2, r3
 800a638:	f5b3 7f7a 	cmp.w	r3, #1000	@ 0x3e8
 800a63c:	d901      	bls.n	800a642 <HAL_PWREx_ConfigSupply+0x56>
    {
      return HAL_ERROR;
 800a63e:	2301      	movs	r3, #1
 800a640:	e007      	b.n	800a652 <HAL_PWREx_ConfigSupply+0x66>
  while (__HAL_PWR_GET_FLAG (PWR_FLAG_ACTVOSRDY) == 0U)
 800a642:	4b06      	ldr	r3, [pc, #24]	@ (800a65c <HAL_PWREx_ConfigSupply+0x70>)
 800a644:	685b      	ldr	r3, [r3, #4]
 800a646:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800a64a:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800a64e:	d1ee      	bne.n	800a62e <HAL_PWREx_ConfigSupply+0x42>
      }
    }
  }
#endif /* defined (SMPS) */

  return HAL_OK;
 800a650:	2300      	movs	r3, #0
}
 800a652:	4618      	mov	r0, r3
 800a654:	3710      	adds	r7, #16
 800a656:	46bd      	mov	sp, r7
 800a658:	bd80      	pop	{r7, pc}
 800a65a:	bf00      	nop
 800a65c:	58024800 	.word	0x58024800

0800a660 <HAL_PWREx_ConfigAVD>:
  *         driver. All combination are allowed: wake up only Cortex-M7, wake up
  *         only Cortex-M4 and wake up Cortex-M7 and Cortex-M4.
  * @retval None.
  */
void HAL_PWREx_ConfigAVD (PWREx_AVDTypeDef *sConfigAVD)
{
 800a660:	b480      	push	{r7}
 800a662:	b083      	sub	sp, #12
 800a664:	af00      	add	r7, sp, #0
 800a666:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param (IS_PWR_AVD_LEVEL (sConfigAVD->AVDLevel));
  assert_param (IS_PWR_AVD_MODE (sConfigAVD->Mode));

  /* Set the ALS[18:17] bits according to AVDLevel value */
  MODIFY_REG (PWR->CR1, PWR_CR1_ALS, sConfigAVD->AVDLevel);
 800a668:	4b37      	ldr	r3, [pc, #220]	@ (800a748 <HAL_PWREx_ConfigAVD+0xe8>)
 800a66a:	681b      	ldr	r3, [r3, #0]
 800a66c:	f423 22c0 	bic.w	r2, r3, #393216	@ 0x60000
 800a670:	687b      	ldr	r3, [r7, #4]
 800a672:	681b      	ldr	r3, [r3, #0]
 800a674:	4934      	ldr	r1, [pc, #208]	@ (800a748 <HAL_PWREx_ConfigAVD+0xe8>)
 800a676:	4313      	orrs	r3, r2
 800a678:	600b      	str	r3, [r1, #0]

  /* Clear any previous config */
#if !defined (DUAL_CORE)
  __HAL_PWR_AVD_EXTI_DISABLE_EVENT ();
 800a67a:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a67e:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800a682:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a686:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a68a:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  __HAL_PWR_AVD_EXTI_DISABLE_IT ();
 800a68e:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a692:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800a696:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a69a:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a69e:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
#endif /* !defined (DUAL_CORE) */

  __HAL_PWR_AVD_EXTI_DISABLE_RISING_EDGE ();
 800a6a2:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a6a6:	681b      	ldr	r3, [r3, #0]
 800a6a8:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a6ac:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a6b0:	6013      	str	r3, [r2, #0]
  __HAL_PWR_AVD_EXTI_DISABLE_FALLING_EDGE ();
 800a6b2:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a6b6:	685b      	ldr	r3, [r3, #4]
 800a6b8:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a6bc:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a6c0:	6053      	str	r3, [r2, #4]

#if !defined (DUAL_CORE)
  /* Configure the interrupt mode */
  if ((sConfigAVD->Mode & AVD_MODE_IT) == AVD_MODE_IT)
 800a6c2:	687b      	ldr	r3, [r7, #4]
 800a6c4:	685b      	ldr	r3, [r3, #4]
 800a6c6:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 800a6ca:	2b00      	cmp	r3, #0
 800a6cc:	d009      	beq.n	800a6e2 <HAL_PWREx_ConfigAVD+0x82>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_IT ();
 800a6ce:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a6d2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800a6d6:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a6da:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a6de:	f8c2 3080 	str.w	r3, [r2, #128]	@ 0x80
  }

  /* Configure the event mode */
  if ((sConfigAVD->Mode & AVD_MODE_EVT) == AVD_MODE_EVT)
 800a6e2:	687b      	ldr	r3, [r7, #4]
 800a6e4:	685b      	ldr	r3, [r3, #4]
 800a6e6:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a6ea:	2b00      	cmp	r3, #0
 800a6ec:	d009      	beq.n	800a702 <HAL_PWREx_ConfigAVD+0xa2>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_EVENT ();
 800a6ee:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a6f2:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800a6f6:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a6fa:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a6fe:	f8c2 3084 	str.w	r3, [r2, #132]	@ 0x84
  }
#endif /* !defined (DUAL_CORE) */

  /* Rising edge configuration */
  if ((sConfigAVD->Mode & AVD_RISING_EDGE) == AVD_RISING_EDGE)
 800a702:	687b      	ldr	r3, [r7, #4]
 800a704:	685b      	ldr	r3, [r3, #4]
 800a706:	f003 0301 	and.w	r3, r3, #1
 800a70a:	2b00      	cmp	r3, #0
 800a70c:	d007      	beq.n	800a71e <HAL_PWREx_ConfigAVD+0xbe>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_RISING_EDGE ();
 800a70e:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a712:	681b      	ldr	r3, [r3, #0]
 800a714:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a718:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a71c:	6013      	str	r3, [r2, #0]
  }

  /* Falling edge configuration */
  if ((sConfigAVD->Mode & AVD_FALLING_EDGE) == AVD_FALLING_EDGE)
 800a71e:	687b      	ldr	r3, [r7, #4]
 800a720:	685b      	ldr	r3, [r3, #4]
 800a722:	f003 0302 	and.w	r3, r3, #2
 800a726:	2b00      	cmp	r3, #0
 800a728:	d007      	beq.n	800a73a <HAL_PWREx_ConfigAVD+0xda>
  {
    __HAL_PWR_AVD_EXTI_ENABLE_FALLING_EDGE ();
 800a72a:	f04f 43b0 	mov.w	r3, #1476395008	@ 0x58000000
 800a72e:	685b      	ldr	r3, [r3, #4]
 800a730:	f04f 42b0 	mov.w	r2, #1476395008	@ 0x58000000
 800a734:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a738:	6053      	str	r3, [r2, #4]
  }
}
 800a73a:	bf00      	nop
 800a73c:	370c      	adds	r7, #12
 800a73e:	46bd      	mov	sp, r7
 800a740:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a744:	4770      	bx	lr
 800a746:	bf00      	nop
 800a748:	58024800 	.word	0x58024800

0800a74c <HAL_PWREx_EnableAVD>:
/**
  * @brief Enable the Analog Voltage Detector (AVD).
  * @retval None.
  */
void HAL_PWREx_EnableAVD (void)
{
 800a74c:	b480      	push	{r7}
 800a74e:	af00      	add	r7, sp, #0
  /* Enable the Analog Voltage Detector */
  SET_BIT (PWR->CR1, PWR_CR1_AVDEN);
 800a750:	4b05      	ldr	r3, [pc, #20]	@ (800a768 <HAL_PWREx_EnableAVD+0x1c>)
 800a752:	681b      	ldr	r3, [r3, #0]
 800a754:	4a04      	ldr	r2, [pc, #16]	@ (800a768 <HAL_PWREx_EnableAVD+0x1c>)
 800a756:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a75a:	6013      	str	r3, [r2, #0]
}
 800a75c:	bf00      	nop
 800a75e:	46bd      	mov	sp, r7
 800a760:	f85d 7b04 	ldr.w	r7, [sp], #4
 800a764:	4770      	bx	lr
 800a766:	bf00      	nop
 800a768:	58024800 	.word	0x58024800

0800a76c <HAL_RCC_OscConfig>:
  *         supported by this function. User should request a transition to HSE Off
  *         first and then HSE On or HSE Bypass.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
{
 800a76c:	b580      	push	{r7, lr}
 800a76e:	b08c      	sub	sp, #48	@ 0x30
 800a770:	af00      	add	r7, sp, #0
 800a772:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  uint32_t temp1_pllckcfg, temp2_pllckcfg;

  /* Check Null pointer */
  if (RCC_OscInitStruct == NULL)
 800a774:	687b      	ldr	r3, [r7, #4]
 800a776:	2b00      	cmp	r3, #0
 800a778:	d102      	bne.n	800a780 <HAL_RCC_OscConfig+0x14>
  {
    return HAL_ERROR;
 800a77a:	2301      	movs	r3, #1
 800a77c:	f000 bc48 	b.w	800b010 <HAL_RCC_OscConfig+0x8a4>
  }

  /* Check the parameters */
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  /*------------------------------- HSE Configuration ------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 800a780:	687b      	ldr	r3, [r7, #4]
 800a782:	681b      	ldr	r3, [r3, #0]
 800a784:	f003 0301 	and.w	r3, r3, #1
 800a788:	2b00      	cmp	r3, #0
 800a78a:	f000 8088 	beq.w	800a89e <HAL_RCC_OscConfig+0x132>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));

    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 800a78e:	4b99      	ldr	r3, [pc, #612]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a790:	691b      	ldr	r3, [r3, #16]
 800a792:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a796:	62fb      	str	r3, [r7, #44]	@ 0x2c
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 800a798:	4b96      	ldr	r3, [pc, #600]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a79a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a79c:	62bb      	str	r3, [r7, #40]	@ 0x28
    /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSE) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSE)))
 800a79e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800a7a0:	2b10      	cmp	r3, #16
 800a7a2:	d007      	beq.n	800a7b4 <HAL_RCC_OscConfig+0x48>
 800a7a4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800a7a6:	2b18      	cmp	r3, #24
 800a7a8:	d111      	bne.n	800a7ce <HAL_RCC_OscConfig+0x62>
 800a7aa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800a7ac:	f003 0303 	and.w	r3, r3, #3
 800a7b0:	2b02      	cmp	r3, #2
 800a7b2:	d10c      	bne.n	800a7ce <HAL_RCC_OscConfig+0x62>
    {
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 800a7b4:	4b8f      	ldr	r3, [pc, #572]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a7b6:	681b      	ldr	r3, [r3, #0]
 800a7b8:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a7bc:	2b00      	cmp	r3, #0
 800a7be:	d06d      	beq.n	800a89c <HAL_RCC_OscConfig+0x130>
 800a7c0:	687b      	ldr	r3, [r7, #4]
 800a7c2:	685b      	ldr	r3, [r3, #4]
 800a7c4:	2b00      	cmp	r3, #0
 800a7c6:	d169      	bne.n	800a89c <HAL_RCC_OscConfig+0x130>
      {
        return HAL_ERROR;
 800a7c8:	2301      	movs	r3, #1
 800a7ca:	f000 bc21 	b.w	800b010 <HAL_RCC_OscConfig+0x8a4>
      }
    }
    else
    {
      /* Set the new HSE configuration ---------------------------------------*/
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 800a7ce:	687b      	ldr	r3, [r7, #4]
 800a7d0:	685b      	ldr	r3, [r3, #4]
 800a7d2:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800a7d6:	d106      	bne.n	800a7e6 <HAL_RCC_OscConfig+0x7a>
 800a7d8:	4b86      	ldr	r3, [pc, #536]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a7da:	681b      	ldr	r3, [r3, #0]
 800a7dc:	4a85      	ldr	r2, [pc, #532]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a7de:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a7e2:	6013      	str	r3, [r2, #0]
 800a7e4:	e02e      	b.n	800a844 <HAL_RCC_OscConfig+0xd8>
 800a7e6:	687b      	ldr	r3, [r7, #4]
 800a7e8:	685b      	ldr	r3, [r3, #4]
 800a7ea:	2b00      	cmp	r3, #0
 800a7ec:	d10c      	bne.n	800a808 <HAL_RCC_OscConfig+0x9c>
 800a7ee:	4b81      	ldr	r3, [pc, #516]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a7f0:	681b      	ldr	r3, [r3, #0]
 800a7f2:	4a80      	ldr	r2, [pc, #512]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a7f4:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a7f8:	6013      	str	r3, [r2, #0]
 800a7fa:	4b7e      	ldr	r3, [pc, #504]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a7fc:	681b      	ldr	r3, [r3, #0]
 800a7fe:	4a7d      	ldr	r2, [pc, #500]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a800:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 800a804:	6013      	str	r3, [r2, #0]
 800a806:	e01d      	b.n	800a844 <HAL_RCC_OscConfig+0xd8>
 800a808:	687b      	ldr	r3, [r7, #4]
 800a80a:	685b      	ldr	r3, [r3, #4]
 800a80c:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800a810:	d10c      	bne.n	800a82c <HAL_RCC_OscConfig+0xc0>
 800a812:	4b78      	ldr	r3, [pc, #480]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a814:	681b      	ldr	r3, [r3, #0]
 800a816:	4a77      	ldr	r2, [pc, #476]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a818:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 800a81c:	6013      	str	r3, [r2, #0]
 800a81e:	4b75      	ldr	r3, [pc, #468]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a820:	681b      	ldr	r3, [r3, #0]
 800a822:	4a74      	ldr	r2, [pc, #464]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a824:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800a828:	6013      	str	r3, [r2, #0]
 800a82a:	e00b      	b.n	800a844 <HAL_RCC_OscConfig+0xd8>
 800a82c:	4b71      	ldr	r3, [pc, #452]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a82e:	681b      	ldr	r3, [r3, #0]
 800a830:	4a70      	ldr	r2, [pc, #448]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a832:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800a836:	6013      	str	r3, [r2, #0]
 800a838:	4b6e      	ldr	r3, [pc, #440]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a83a:	681b      	ldr	r3, [r3, #0]
 800a83c:	4a6d      	ldr	r2, [pc, #436]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a83e:	f423 2380 	bic.w	r3, r3, #262144	@ 0x40000
 800a842:	6013      	str	r3, [r2, #0]

      /* Check the HSE State */
      if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
 800a844:	687b      	ldr	r3, [r7, #4]
 800a846:	685b      	ldr	r3, [r3, #4]
 800a848:	2b00      	cmp	r3, #0
 800a84a:	d013      	beq.n	800a874 <HAL_RCC_OscConfig+0x108>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a84c:	f7fb f8d4 	bl	80059f8 <HAL_GetTick>
 800a850:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 800a852:	e008      	b.n	800a866 <HAL_RCC_OscConfig+0xfa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 800a854:	f7fb f8d0 	bl	80059f8 <HAL_GetTick>
 800a858:	4602      	mov	r2, r0
 800a85a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a85c:	1ad3      	subs	r3, r2, r3
 800a85e:	2b64      	cmp	r3, #100	@ 0x64
 800a860:	d901      	bls.n	800a866 <HAL_RCC_OscConfig+0xfa>
          {
            return HAL_TIMEOUT;
 800a862:	2303      	movs	r3, #3
 800a864:	e3d4      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 800a866:	4b63      	ldr	r3, [pc, #396]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a868:	681b      	ldr	r3, [r3, #0]
 800a86a:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a86e:	2b00      	cmp	r3, #0
 800a870:	d0f0      	beq.n	800a854 <HAL_RCC_OscConfig+0xe8>
 800a872:	e014      	b.n	800a89e <HAL_RCC_OscConfig+0x132>
        }
      }
      else
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a874:	f7fb f8c0 	bl	80059f8 <HAL_GetTick>
 800a878:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSE is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 800a87a:	e008      	b.n	800a88e <HAL_RCC_OscConfig+0x122>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
 800a87c:	f7fb f8bc 	bl	80059f8 <HAL_GetTick>
 800a880:	4602      	mov	r2, r0
 800a882:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a884:	1ad3      	subs	r3, r2, r3
 800a886:	2b64      	cmp	r3, #100	@ 0x64
 800a888:	d901      	bls.n	800a88e <HAL_RCC_OscConfig+0x122>
          {
            return HAL_TIMEOUT;
 800a88a:	2303      	movs	r3, #3
 800a88c:	e3c0      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
 800a88e:	4b59      	ldr	r3, [pc, #356]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a890:	681b      	ldr	r3, [r3, #0]
 800a892:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800a896:	2b00      	cmp	r3, #0
 800a898:	d1f0      	bne.n	800a87c <HAL_RCC_OscConfig+0x110>
 800a89a:	e000      	b.n	800a89e <HAL_RCC_OscConfig+0x132>
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 800a89c:	bf00      	nop
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 800a89e:	687b      	ldr	r3, [r7, #4]
 800a8a0:	681b      	ldr	r3, [r3, #0]
 800a8a2:	f003 0302 	and.w	r3, r3, #2
 800a8a6:	2b00      	cmp	r3, #0
 800a8a8:	f000 80ca 	beq.w	800aa40 <HAL_RCC_OscConfig+0x2d4>
    /* Check the parameters */
    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
    assert_param(IS_RCC_HSICALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));

    /* When the HSI is used as system clock it will not be disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 800a8ac:	4b51      	ldr	r3, [pc, #324]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a8ae:	691b      	ldr	r3, [r3, #16]
 800a8b0:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800a8b4:	623b      	str	r3, [r7, #32]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 800a8b6:	4b4f      	ldr	r3, [pc, #316]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a8b8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800a8ba:	61fb      	str	r3, [r7, #28]
    if ((temp_sysclksrc == RCC_CFGR_SWS_HSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_HSI)))
 800a8bc:	6a3b      	ldr	r3, [r7, #32]
 800a8be:	2b00      	cmp	r3, #0
 800a8c0:	d007      	beq.n	800a8d2 <HAL_RCC_OscConfig+0x166>
 800a8c2:	6a3b      	ldr	r3, [r7, #32]
 800a8c4:	2b18      	cmp	r3, #24
 800a8c6:	d156      	bne.n	800a976 <HAL_RCC_OscConfig+0x20a>
 800a8c8:	69fb      	ldr	r3, [r7, #28]
 800a8ca:	f003 0303 	and.w	r3, r3, #3
 800a8ce:	2b00      	cmp	r3, #0
 800a8d0:	d151      	bne.n	800a976 <HAL_RCC_OscConfig+0x20a>
    {
      /* When HSI is used as system clock it will not be disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a8d2:	4b48      	ldr	r3, [pc, #288]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a8d4:	681b      	ldr	r3, [r3, #0]
 800a8d6:	f003 0304 	and.w	r3, r3, #4
 800a8da:	2b00      	cmp	r3, #0
 800a8dc:	d005      	beq.n	800a8ea <HAL_RCC_OscConfig+0x17e>
 800a8de:	687b      	ldr	r3, [r7, #4]
 800a8e0:	68db      	ldr	r3, [r3, #12]
 800a8e2:	2b00      	cmp	r3, #0
 800a8e4:	d101      	bne.n	800a8ea <HAL_RCC_OscConfig+0x17e>
      {
        return HAL_ERROR;
 800a8e6:	2301      	movs	r3, #1
 800a8e8:	e392      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, only HSI division and calibration are allowed */
      else
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2, HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 800a8ea:	4b42      	ldr	r3, [pc, #264]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a8ec:	681b      	ldr	r3, [r3, #0]
 800a8ee:	f023 0219 	bic.w	r2, r3, #25
 800a8f2:	687b      	ldr	r3, [r7, #4]
 800a8f4:	68db      	ldr	r3, [r3, #12]
 800a8f6:	493f      	ldr	r1, [pc, #252]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a8f8:	4313      	orrs	r3, r2
 800a8fa:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a8fc:	f7fb f87c 	bl	80059f8 <HAL_GetTick>
 800a900:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a902:	e008      	b.n	800a916 <HAL_RCC_OscConfig+0x1aa>
        {
          if ((uint32_t)(HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 800a904:	f7fb f878 	bl	80059f8 <HAL_GetTick>
 800a908:	4602      	mov	r2, r0
 800a90a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a90c:	1ad3      	subs	r3, r2, r3
 800a90e:	2b02      	cmp	r3, #2
 800a910:	d901      	bls.n	800a916 <HAL_RCC_OscConfig+0x1aa>
          {
            return HAL_TIMEOUT;
 800a912:	2303      	movs	r3, #3
 800a914:	e37c      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a916:	4b37      	ldr	r3, [pc, #220]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a918:	681b      	ldr	r3, [r3, #0]
 800a91a:	f003 0304 	and.w	r3, r3, #4
 800a91e:	2b00      	cmp	r3, #0
 800a920:	d0f0      	beq.n	800a904 <HAL_RCC_OscConfig+0x198>
          }
        }
        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a922:	f7fb f899 	bl	8005a58 <HAL_GetREVID>
 800a926:	4603      	mov	r3, r0
 800a928:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a92c:	4293      	cmp	r3, r2
 800a92e:	d817      	bhi.n	800a960 <HAL_RCC_OscConfig+0x1f4>
 800a930:	687b      	ldr	r3, [r7, #4]
 800a932:	691b      	ldr	r3, [r3, #16]
 800a934:	2b40      	cmp	r3, #64	@ 0x40
 800a936:	d108      	bne.n	800a94a <HAL_RCC_OscConfig+0x1de>
 800a938:	4b2e      	ldr	r3, [pc, #184]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a93a:	685b      	ldr	r3, [r3, #4]
 800a93c:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 800a940:	4a2c      	ldr	r2, [pc, #176]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a942:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a946:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a948:	e07a      	b.n	800aa40 <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a94a:	4b2a      	ldr	r3, [pc, #168]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a94c:	685b      	ldr	r3, [r3, #4]
 800a94e:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800a952:	687b      	ldr	r3, [r7, #4]
 800a954:	691b      	ldr	r3, [r3, #16]
 800a956:	031b      	lsls	r3, r3, #12
 800a958:	4926      	ldr	r1, [pc, #152]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a95a:	4313      	orrs	r3, r2
 800a95c:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a95e:	e06f      	b.n	800aa40 <HAL_RCC_OscConfig+0x2d4>
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a960:	4b24      	ldr	r3, [pc, #144]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a962:	685b      	ldr	r3, [r3, #4]
 800a964:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 800a968:	687b      	ldr	r3, [r7, #4]
 800a96a:	691b      	ldr	r3, [r3, #16]
 800a96c:	061b      	lsls	r3, r3, #24
 800a96e:	4921      	ldr	r1, [pc, #132]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a970:	4313      	orrs	r3, r2
 800a972:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF))
 800a974:	e064      	b.n	800aa40 <HAL_RCC_OscConfig+0x2d4>
    }

    else
    {
      /* Check the HSI State */
      if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
 800a976:	687b      	ldr	r3, [r7, #4]
 800a978:	68db      	ldr	r3, [r3, #12]
 800a97a:	2b00      	cmp	r3, #0
 800a97c:	d047      	beq.n	800aa0e <HAL_RCC_OscConfig+0x2a2>
      {
        /* Enable the Internal High Speed oscillator (HSI, HSIDIV2,HSIDIV4, or HSIDIV8) */
        __HAL_RCC_HSI_CONFIG(RCC_OscInitStruct->HSIState);
 800a97e:	4b1d      	ldr	r3, [pc, #116]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a980:	681b      	ldr	r3, [r3, #0]
 800a982:	f023 0219 	bic.w	r2, r3, #25
 800a986:	687b      	ldr	r3, [r7, #4]
 800a988:	68db      	ldr	r3, [r3, #12]
 800a98a:	491a      	ldr	r1, [pc, #104]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a98c:	4313      	orrs	r3, r2
 800a98e:	600b      	str	r3, [r1, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800a990:	f7fb f832 	bl	80059f8 <HAL_GetTick>
 800a994:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a996:	e008      	b.n	800a9aa <HAL_RCC_OscConfig+0x23e>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 800a998:	f7fb f82e 	bl	80059f8 <HAL_GetTick>
 800a99c:	4602      	mov	r2, r0
 800a99e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800a9a0:	1ad3      	subs	r3, r2, r3
 800a9a2:	2b02      	cmp	r3, #2
 800a9a4:	d901      	bls.n	800a9aa <HAL_RCC_OscConfig+0x23e>
          {
            return HAL_TIMEOUT;
 800a9a6:	2303      	movs	r3, #3
 800a9a8:	e332      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800a9aa:	4b12      	ldr	r3, [pc, #72]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a9ac:	681b      	ldr	r3, [r3, #0]
 800a9ae:	f003 0304 	and.w	r3, r3, #4
 800a9b2:	2b00      	cmp	r3, #0
 800a9b4:	d0f0      	beq.n	800a998 <HAL_RCC_OscConfig+0x22c>
          }
        }

        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 800a9b6:	f7fb f84f 	bl	8005a58 <HAL_GetREVID>
 800a9ba:	4603      	mov	r3, r0
 800a9bc:	f241 0203 	movw	r2, #4099	@ 0x1003
 800a9c0:	4293      	cmp	r3, r2
 800a9c2:	d819      	bhi.n	800a9f8 <HAL_RCC_OscConfig+0x28c>
 800a9c4:	687b      	ldr	r3, [r7, #4]
 800a9c6:	691b      	ldr	r3, [r3, #16]
 800a9c8:	2b40      	cmp	r3, #64	@ 0x40
 800a9ca:	d108      	bne.n	800a9de <HAL_RCC_OscConfig+0x272>
 800a9cc:	4b09      	ldr	r3, [pc, #36]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a9ce:	685b      	ldr	r3, [r3, #4]
 800a9d0:	f423 337c 	bic.w	r3, r3, #258048	@ 0x3f000
 800a9d4:	4a07      	ldr	r2, [pc, #28]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a9d6:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800a9da:	6053      	str	r3, [r2, #4]
 800a9dc:	e030      	b.n	800aa40 <HAL_RCC_OscConfig+0x2d4>
 800a9de:	4b05      	ldr	r3, [pc, #20]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a9e0:	685b      	ldr	r3, [r3, #4]
 800a9e2:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800a9e6:	687b      	ldr	r3, [r7, #4]
 800a9e8:	691b      	ldr	r3, [r3, #16]
 800a9ea:	031b      	lsls	r3, r3, #12
 800a9ec:	4901      	ldr	r1, [pc, #4]	@ (800a9f4 <HAL_RCC_OscConfig+0x288>)
 800a9ee:	4313      	orrs	r3, r2
 800a9f0:	604b      	str	r3, [r1, #4]
 800a9f2:	e025      	b.n	800aa40 <HAL_RCC_OscConfig+0x2d4>
 800a9f4:	58024400 	.word	0x58024400
 800a9f8:	4b9a      	ldr	r3, [pc, #616]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800a9fa:	685b      	ldr	r3, [r3, #4]
 800a9fc:	f023 42fe 	bic.w	r2, r3, #2130706432	@ 0x7f000000
 800aa00:	687b      	ldr	r3, [r7, #4]
 800aa02:	691b      	ldr	r3, [r3, #16]
 800aa04:	061b      	lsls	r3, r3, #24
 800aa06:	4997      	ldr	r1, [pc, #604]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aa08:	4313      	orrs	r3, r2
 800aa0a:	604b      	str	r3, [r1, #4]
 800aa0c:	e018      	b.n	800aa40 <HAL_RCC_OscConfig+0x2d4>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (HSI). */
        __HAL_RCC_HSI_DISABLE();
 800aa0e:	4b95      	ldr	r3, [pc, #596]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aa10:	681b      	ldr	r3, [r3, #0]
 800aa12:	4a94      	ldr	r2, [pc, #592]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aa14:	f023 0301 	bic.w	r3, r3, #1
 800aa18:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800aa1a:	f7fa ffed 	bl	80059f8 <HAL_GetTick>
 800aa1e:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till HSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 800aa20:	e008      	b.n	800aa34 <HAL_RCC_OscConfig+0x2c8>
        {
          if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
 800aa22:	f7fa ffe9 	bl	80059f8 <HAL_GetTick>
 800aa26:	4602      	mov	r2, r0
 800aa28:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800aa2a:	1ad3      	subs	r3, r2, r3
 800aa2c:	2b02      	cmp	r3, #2
 800aa2e:	d901      	bls.n	800aa34 <HAL_RCC_OscConfig+0x2c8>
          {
            return HAL_TIMEOUT;
 800aa30:	2303      	movs	r3, #3
 800aa32:	e2ed      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
 800aa34:	4b8b      	ldr	r3, [pc, #556]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aa36:	681b      	ldr	r3, [r3, #0]
 800aa38:	f003 0304 	and.w	r3, r3, #4
 800aa3c:	2b00      	cmp	r3, #0
 800aa3e:	d1f0      	bne.n	800aa22 <HAL_RCC_OscConfig+0x2b6>
        }
      }
    }
  }
  /*----------------------------- CSI Configuration --------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_CSI) == RCC_OSCILLATORTYPE_CSI)
 800aa40:	687b      	ldr	r3, [r7, #4]
 800aa42:	681b      	ldr	r3, [r3, #0]
 800aa44:	f003 0310 	and.w	r3, r3, #16
 800aa48:	2b00      	cmp	r3, #0
 800aa4a:	f000 80a9 	beq.w	800aba0 <HAL_RCC_OscConfig+0x434>
    /* Check the parameters */
    assert_param(IS_RCC_CSI(RCC_OscInitStruct->CSIState));
    assert_param(IS_RCC_CSICALIBRATION_VALUE(RCC_OscInitStruct->CSICalibrationValue));

    /* When the CSI is used as system clock it will not disabled */
    const uint32_t temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE();
 800aa4e:	4b85      	ldr	r3, [pc, #532]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aa50:	691b      	ldr	r3, [r3, #16]
 800aa52:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800aa56:	61bb      	str	r3, [r7, #24]
    const uint32_t temp_pllckselr = RCC->PLLCKSELR;
 800aa58:	4b82      	ldr	r3, [pc, #520]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aa5a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800aa5c:	617b      	str	r3, [r7, #20]
    if ((temp_sysclksrc == RCC_CFGR_SWS_CSI) || ((temp_sysclksrc == RCC_CFGR_SWS_PLL1) && ((temp_pllckselr & RCC_PLLCKSELR_PLLSRC) == RCC_PLLCKSELR_PLLSRC_CSI)))
 800aa5e:	69bb      	ldr	r3, [r7, #24]
 800aa60:	2b08      	cmp	r3, #8
 800aa62:	d007      	beq.n	800aa74 <HAL_RCC_OscConfig+0x308>
 800aa64:	69bb      	ldr	r3, [r7, #24]
 800aa66:	2b18      	cmp	r3, #24
 800aa68:	d13a      	bne.n	800aae0 <HAL_RCC_OscConfig+0x374>
 800aa6a:	697b      	ldr	r3, [r7, #20]
 800aa6c:	f003 0303 	and.w	r3, r3, #3
 800aa70:	2b01      	cmp	r3, #1
 800aa72:	d135      	bne.n	800aae0 <HAL_RCC_OscConfig+0x374>
    {
      /* When CSI is used as system clock it will not disabled */
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800aa74:	4b7b      	ldr	r3, [pc, #492]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aa76:	681b      	ldr	r3, [r3, #0]
 800aa78:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800aa7c:	2b00      	cmp	r3, #0
 800aa7e:	d005      	beq.n	800aa8c <HAL_RCC_OscConfig+0x320>
 800aa80:	687b      	ldr	r3, [r7, #4]
 800aa82:	69db      	ldr	r3, [r3, #28]
 800aa84:	2b80      	cmp	r3, #128	@ 0x80
 800aa86:	d001      	beq.n	800aa8c <HAL_RCC_OscConfig+0x320>
      {
        return HAL_ERROR;
 800aa88:	2301      	movs	r3, #1
 800aa8a:	e2c1      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
      }
      /* Otherwise, just the calibration is allowed */
      else
      {
        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800aa8c:	f7fa ffe4 	bl	8005a58 <HAL_GetREVID>
 800aa90:	4603      	mov	r3, r0
 800aa92:	f241 0203 	movw	r2, #4099	@ 0x1003
 800aa96:	4293      	cmp	r3, r2
 800aa98:	d817      	bhi.n	800aaca <HAL_RCC_OscConfig+0x35e>
 800aa9a:	687b      	ldr	r3, [r7, #4]
 800aa9c:	6a1b      	ldr	r3, [r3, #32]
 800aa9e:	2b20      	cmp	r3, #32
 800aaa0:	d108      	bne.n	800aab4 <HAL_RCC_OscConfig+0x348>
 800aaa2:	4b70      	ldr	r3, [pc, #448]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aaa4:	685b      	ldr	r3, [r3, #4]
 800aaa6:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 800aaaa:	4a6e      	ldr	r2, [pc, #440]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aaac:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 800aab0:	6053      	str	r3, [r2, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800aab2:	e075      	b.n	800aba0 <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800aab4:	4b6b      	ldr	r3, [pc, #428]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aab6:	685b      	ldr	r3, [r3, #4]
 800aab8:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 800aabc:	687b      	ldr	r3, [r7, #4]
 800aabe:	6a1b      	ldr	r3, [r3, #32]
 800aac0:	069b      	lsls	r3, r3, #26
 800aac2:	4968      	ldr	r1, [pc, #416]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aac4:	4313      	orrs	r3, r2
 800aac6:	604b      	str	r3, [r1, #4]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800aac8:	e06a      	b.n	800aba0 <HAL_RCC_OscConfig+0x434>
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800aaca:	4b66      	ldr	r3, [pc, #408]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aacc:	68db      	ldr	r3, [r3, #12]
 800aace:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 800aad2:	687b      	ldr	r3, [r7, #4]
 800aad4:	6a1b      	ldr	r3, [r3, #32]
 800aad6:	061b      	lsls	r3, r3, #24
 800aad8:	4962      	ldr	r1, [pc, #392]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aada:	4313      	orrs	r3, r2
 800aadc:	60cb      	str	r3, [r1, #12]
      if ((__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U) && (RCC_OscInitStruct->CSIState != RCC_CSI_ON))
 800aade:	e05f      	b.n	800aba0 <HAL_RCC_OscConfig+0x434>
      }
    }
    else
    {
      /* Check the CSI State */
      if ((RCC_OscInitStruct->CSIState) != RCC_CSI_OFF)
 800aae0:	687b      	ldr	r3, [r7, #4]
 800aae2:	69db      	ldr	r3, [r3, #28]
 800aae4:	2b00      	cmp	r3, #0
 800aae6:	d042      	beq.n	800ab6e <HAL_RCC_OscConfig+0x402>
      {
        /* Enable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_ENABLE();
 800aae8:	4b5e      	ldr	r3, [pc, #376]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aaea:	681b      	ldr	r3, [r3, #0]
 800aaec:	4a5d      	ldr	r2, [pc, #372]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800aaee:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800aaf2:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800aaf4:	f7fa ff80 	bl	80059f8 <HAL_GetTick>
 800aaf8:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800aafa:	e008      	b.n	800ab0e <HAL_RCC_OscConfig+0x3a2>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 800aafc:	f7fa ff7c 	bl	80059f8 <HAL_GetTick>
 800ab00:	4602      	mov	r2, r0
 800ab02:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ab04:	1ad3      	subs	r3, r2, r3
 800ab06:	2b02      	cmp	r3, #2
 800ab08:	d901      	bls.n	800ab0e <HAL_RCC_OscConfig+0x3a2>
          {
            return HAL_TIMEOUT;
 800ab0a:	2303      	movs	r3, #3
 800ab0c:	e280      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800ab0e:	4b55      	ldr	r3, [pc, #340]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab10:	681b      	ldr	r3, [r3, #0]
 800ab12:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800ab16:	2b00      	cmp	r3, #0
 800ab18:	d0f0      	beq.n	800aafc <HAL_RCC_OscConfig+0x390>
          }
        }

        /* Adjusts the Internal High Speed oscillator (CSI) calibration value.*/
        __HAL_RCC_CSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->CSICalibrationValue);
 800ab1a:	f7fa ff9d 	bl	8005a58 <HAL_GetREVID>
 800ab1e:	4603      	mov	r3, r0
 800ab20:	f241 0203 	movw	r2, #4099	@ 0x1003
 800ab24:	4293      	cmp	r3, r2
 800ab26:	d817      	bhi.n	800ab58 <HAL_RCC_OscConfig+0x3ec>
 800ab28:	687b      	ldr	r3, [r7, #4]
 800ab2a:	6a1b      	ldr	r3, [r3, #32]
 800ab2c:	2b20      	cmp	r3, #32
 800ab2e:	d108      	bne.n	800ab42 <HAL_RCC_OscConfig+0x3d6>
 800ab30:	4b4c      	ldr	r3, [pc, #304]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab32:	685b      	ldr	r3, [r3, #4]
 800ab34:	f023 43f8 	bic.w	r3, r3, #2080374784	@ 0x7c000000
 800ab38:	4a4a      	ldr	r2, [pc, #296]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab3a:	f043 4380 	orr.w	r3, r3, #1073741824	@ 0x40000000
 800ab3e:	6053      	str	r3, [r2, #4]
 800ab40:	e02e      	b.n	800aba0 <HAL_RCC_OscConfig+0x434>
 800ab42:	4b48      	ldr	r3, [pc, #288]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab44:	685b      	ldr	r3, [r3, #4]
 800ab46:	f023 42f8 	bic.w	r2, r3, #2080374784	@ 0x7c000000
 800ab4a:	687b      	ldr	r3, [r7, #4]
 800ab4c:	6a1b      	ldr	r3, [r3, #32]
 800ab4e:	069b      	lsls	r3, r3, #26
 800ab50:	4944      	ldr	r1, [pc, #272]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab52:	4313      	orrs	r3, r2
 800ab54:	604b      	str	r3, [r1, #4]
 800ab56:	e023      	b.n	800aba0 <HAL_RCC_OscConfig+0x434>
 800ab58:	4b42      	ldr	r3, [pc, #264]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab5a:	68db      	ldr	r3, [r3, #12]
 800ab5c:	f023 527c 	bic.w	r2, r3, #1056964608	@ 0x3f000000
 800ab60:	687b      	ldr	r3, [r7, #4]
 800ab62:	6a1b      	ldr	r3, [r3, #32]
 800ab64:	061b      	lsls	r3, r3, #24
 800ab66:	493f      	ldr	r1, [pc, #252]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab68:	4313      	orrs	r3, r2
 800ab6a:	60cb      	str	r3, [r1, #12]
 800ab6c:	e018      	b.n	800aba0 <HAL_RCC_OscConfig+0x434>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (CSI). */
        __HAL_RCC_CSI_DISABLE();
 800ab6e:	4b3d      	ldr	r3, [pc, #244]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab70:	681b      	ldr	r3, [r3, #0]
 800ab72:	4a3c      	ldr	r2, [pc, #240]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab74:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800ab78:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800ab7a:	f7fa ff3d 	bl	80059f8 <HAL_GetTick>
 800ab7e:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till CSI is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 800ab80:	e008      	b.n	800ab94 <HAL_RCC_OscConfig+0x428>
        {
          if ((HAL_GetTick() - tickstart) > CSI_TIMEOUT_VALUE)
 800ab82:	f7fa ff39 	bl	80059f8 <HAL_GetTick>
 800ab86:	4602      	mov	r2, r0
 800ab88:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ab8a:	1ad3      	subs	r3, r2, r3
 800ab8c:	2b02      	cmp	r3, #2
 800ab8e:	d901      	bls.n	800ab94 <HAL_RCC_OscConfig+0x428>
          {
            return HAL_TIMEOUT;
 800ab90:	2303      	movs	r3, #3
 800ab92:	e23d      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) != 0U)
 800ab94:	4b33      	ldr	r3, [pc, #204]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ab96:	681b      	ldr	r3, [r3, #0]
 800ab98:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800ab9c:	2b00      	cmp	r3, #0
 800ab9e:	d1f0      	bne.n	800ab82 <HAL_RCC_OscConfig+0x416>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 800aba0:	687b      	ldr	r3, [r7, #4]
 800aba2:	681b      	ldr	r3, [r3, #0]
 800aba4:	f003 0308 	and.w	r3, r3, #8
 800aba8:	2b00      	cmp	r3, #0
 800abaa:	d036      	beq.n	800ac1a <HAL_RCC_OscConfig+0x4ae>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));

    /* Check the LSI State */
    if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
 800abac:	687b      	ldr	r3, [r7, #4]
 800abae:	695b      	ldr	r3, [r3, #20]
 800abb0:	2b00      	cmp	r3, #0
 800abb2:	d019      	beq.n	800abe8 <HAL_RCC_OscConfig+0x47c>
    {
      /* Enable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_ENABLE();
 800abb4:	4b2b      	ldr	r3, [pc, #172]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800abb6:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800abb8:	4a2a      	ldr	r2, [pc, #168]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800abba:	f043 0301 	orr.w	r3, r3, #1
 800abbe:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800abc0:	f7fa ff1a 	bl	80059f8 <HAL_GetTick>
 800abc4:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 800abc6:	e008      	b.n	800abda <HAL_RCC_OscConfig+0x46e>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 800abc8:	f7fa ff16 	bl	80059f8 <HAL_GetTick>
 800abcc:	4602      	mov	r2, r0
 800abce:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800abd0:	1ad3      	subs	r3, r2, r3
 800abd2:	2b02      	cmp	r3, #2
 800abd4:	d901      	bls.n	800abda <HAL_RCC_OscConfig+0x46e>
        {
          return HAL_TIMEOUT;
 800abd6:	2303      	movs	r3, #3
 800abd8:	e21a      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
 800abda:	4b22      	ldr	r3, [pc, #136]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800abdc:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800abde:	f003 0302 	and.w	r3, r3, #2
 800abe2:	2b00      	cmp	r3, #0
 800abe4:	d0f0      	beq.n	800abc8 <HAL_RCC_OscConfig+0x45c>
 800abe6:	e018      	b.n	800ac1a <HAL_RCC_OscConfig+0x4ae>
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_DISABLE();
 800abe8:	4b1e      	ldr	r3, [pc, #120]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800abea:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800abec:	4a1d      	ldr	r2, [pc, #116]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800abee:	f023 0301 	bic.w	r3, r3, #1
 800abf2:	6753      	str	r3, [r2, #116]	@ 0x74

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800abf4:	f7fa ff00 	bl	80059f8 <HAL_GetTick>
 800abf8:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSI is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 800abfa:	e008      	b.n	800ac0e <HAL_RCC_OscConfig+0x4a2>
      {
        if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
 800abfc:	f7fa fefc 	bl	80059f8 <HAL_GetTick>
 800ac00:	4602      	mov	r2, r0
 800ac02:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ac04:	1ad3      	subs	r3, r2, r3
 800ac06:	2b02      	cmp	r3, #2
 800ac08:	d901      	bls.n	800ac0e <HAL_RCC_OscConfig+0x4a2>
        {
          return HAL_TIMEOUT;
 800ac0a:	2303      	movs	r3, #3
 800ac0c:	e200      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
 800ac0e:	4b15      	ldr	r3, [pc, #84]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ac10:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800ac12:	f003 0302 	and.w	r3, r3, #2
 800ac16:	2b00      	cmp	r3, #0
 800ac18:	d1f0      	bne.n	800abfc <HAL_RCC_OscConfig+0x490>
      }
    }
  }

  /*------------------------------ HSI48 Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
 800ac1a:	687b      	ldr	r3, [r7, #4]
 800ac1c:	681b      	ldr	r3, [r3, #0]
 800ac1e:	f003 0320 	and.w	r3, r3, #32
 800ac22:	2b00      	cmp	r3, #0
 800ac24:	d039      	beq.n	800ac9a <HAL_RCC_OscConfig+0x52e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));

    /* Check the HSI48 State */
    if ((RCC_OscInitStruct->HSI48State) != RCC_HSI48_OFF)
 800ac26:	687b      	ldr	r3, [r7, #4]
 800ac28:	699b      	ldr	r3, [r3, #24]
 800ac2a:	2b00      	cmp	r3, #0
 800ac2c:	d01c      	beq.n	800ac68 <HAL_RCC_OscConfig+0x4fc>
    {
      /* Enable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_ENABLE();
 800ac2e:	4b0d      	ldr	r3, [pc, #52]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ac30:	681b      	ldr	r3, [r3, #0]
 800ac32:	4a0c      	ldr	r2, [pc, #48]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ac34:	f443 5380 	orr.w	r3, r3, #4096	@ 0x1000
 800ac38:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 800ac3a:	f7fa fedd 	bl	80059f8 <HAL_GetTick>
 800ac3e:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 800ac40:	e008      	b.n	800ac54 <HAL_RCC_OscConfig+0x4e8>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 800ac42:	f7fa fed9 	bl	80059f8 <HAL_GetTick>
 800ac46:	4602      	mov	r2, r0
 800ac48:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ac4a:	1ad3      	subs	r3, r2, r3
 800ac4c:	2b02      	cmp	r3, #2
 800ac4e:	d901      	bls.n	800ac54 <HAL_RCC_OscConfig+0x4e8>
        {
          return HAL_TIMEOUT;
 800ac50:	2303      	movs	r3, #3
 800ac52:	e1dd      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == 0U)
 800ac54:	4b03      	ldr	r3, [pc, #12]	@ (800ac64 <HAL_RCC_OscConfig+0x4f8>)
 800ac56:	681b      	ldr	r3, [r3, #0]
 800ac58:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800ac5c:	2b00      	cmp	r3, #0
 800ac5e:	d0f0      	beq.n	800ac42 <HAL_RCC_OscConfig+0x4d6>
 800ac60:	e01b      	b.n	800ac9a <HAL_RCC_OscConfig+0x52e>
 800ac62:	bf00      	nop
 800ac64:	58024400 	.word	0x58024400
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (HSI48). */
      __HAL_RCC_HSI48_DISABLE();
 800ac68:	4b9b      	ldr	r3, [pc, #620]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ac6a:	681b      	ldr	r3, [r3, #0]
 800ac6c:	4a9a      	ldr	r2, [pc, #616]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ac6e:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 800ac72:	6013      	str	r3, [r2, #0]

      /* Get time-out */
      tickstart = HAL_GetTick();
 800ac74:	f7fa fec0 	bl	80059f8 <HAL_GetTick>
 800ac78:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till HSI48 is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 800ac7a:	e008      	b.n	800ac8e <HAL_RCC_OscConfig+0x522>
      {
        if ((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 800ac7c:	f7fa febc 	bl	80059f8 <HAL_GetTick>
 800ac80:	4602      	mov	r2, r0
 800ac82:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ac84:	1ad3      	subs	r3, r2, r3
 800ac86:	2b02      	cmp	r3, #2
 800ac88:	d901      	bls.n	800ac8e <HAL_RCC_OscConfig+0x522>
        {
          return HAL_TIMEOUT;
 800ac8a:	2303      	movs	r3, #3
 800ac8c:	e1c0      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != 0U)
 800ac8e:	4b92      	ldr	r3, [pc, #584]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ac90:	681b      	ldr	r3, [r3, #0]
 800ac92:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 800ac96:	2b00      	cmp	r3, #0
 800ac98:	d1f0      	bne.n	800ac7c <HAL_RCC_OscConfig+0x510>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/
  if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 800ac9a:	687b      	ldr	r3, [r7, #4]
 800ac9c:	681b      	ldr	r3, [r3, #0]
 800ac9e:	f003 0304 	and.w	r3, r3, #4
 800aca2:	2b00      	cmp	r3, #0
 800aca4:	f000 8081 	beq.w	800adaa <HAL_RCC_OscConfig+0x63e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));

    /* Enable write access to Backup domain */
    PWR->CR1 |= PWR_CR1_DBP;
 800aca8:	4b8c      	ldr	r3, [pc, #560]	@ (800aedc <HAL_RCC_OscConfig+0x770>)
 800acaa:	681b      	ldr	r3, [r3, #0]
 800acac:	4a8b      	ldr	r2, [pc, #556]	@ (800aedc <HAL_RCC_OscConfig+0x770>)
 800acae:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800acb2:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 800acb4:	f7fa fea0 	bl	80059f8 <HAL_GetTick>
 800acb8:	6278      	str	r0, [r7, #36]	@ 0x24

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800acba:	e008      	b.n	800acce <HAL_RCC_OscConfig+0x562>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800acbc:	f7fa fe9c 	bl	80059f8 <HAL_GetTick>
 800acc0:	4602      	mov	r2, r0
 800acc2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800acc4:	1ad3      	subs	r3, r2, r3
 800acc6:	2b64      	cmp	r3, #100	@ 0x64
 800acc8:	d901      	bls.n	800acce <HAL_RCC_OscConfig+0x562>
      {
        return HAL_TIMEOUT;
 800acca:	2303      	movs	r3, #3
 800accc:	e1a0      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800acce:	4b83      	ldr	r3, [pc, #524]	@ (800aedc <HAL_RCC_OscConfig+0x770>)
 800acd0:	681b      	ldr	r3, [r3, #0]
 800acd2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800acd6:	2b00      	cmp	r3, #0
 800acd8:	d0f0      	beq.n	800acbc <HAL_RCC_OscConfig+0x550>
      }
    }

    /* Set the new LSE configuration -----------------------------------------*/
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800acda:	687b      	ldr	r3, [r7, #4]
 800acdc:	689b      	ldr	r3, [r3, #8]
 800acde:	2b01      	cmp	r3, #1
 800ace0:	d106      	bne.n	800acf0 <HAL_RCC_OscConfig+0x584>
 800ace2:	4b7d      	ldr	r3, [pc, #500]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ace4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ace6:	4a7c      	ldr	r2, [pc, #496]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ace8:	f043 0301 	orr.w	r3, r3, #1
 800acec:	6713      	str	r3, [r2, #112]	@ 0x70
 800acee:	e02d      	b.n	800ad4c <HAL_RCC_OscConfig+0x5e0>
 800acf0:	687b      	ldr	r3, [r7, #4]
 800acf2:	689b      	ldr	r3, [r3, #8]
 800acf4:	2b00      	cmp	r3, #0
 800acf6:	d10c      	bne.n	800ad12 <HAL_RCC_OscConfig+0x5a6>
 800acf8:	4b77      	ldr	r3, [pc, #476]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800acfa:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800acfc:	4a76      	ldr	r2, [pc, #472]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800acfe:	f023 0301 	bic.w	r3, r3, #1
 800ad02:	6713      	str	r3, [r2, #112]	@ 0x70
 800ad04:	4b74      	ldr	r3, [pc, #464]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad06:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ad08:	4a73      	ldr	r2, [pc, #460]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad0a:	f023 0304 	bic.w	r3, r3, #4
 800ad0e:	6713      	str	r3, [r2, #112]	@ 0x70
 800ad10:	e01c      	b.n	800ad4c <HAL_RCC_OscConfig+0x5e0>
 800ad12:	687b      	ldr	r3, [r7, #4]
 800ad14:	689b      	ldr	r3, [r3, #8]
 800ad16:	2b05      	cmp	r3, #5
 800ad18:	d10c      	bne.n	800ad34 <HAL_RCC_OscConfig+0x5c8>
 800ad1a:	4b6f      	ldr	r3, [pc, #444]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad1c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ad1e:	4a6e      	ldr	r2, [pc, #440]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad20:	f043 0304 	orr.w	r3, r3, #4
 800ad24:	6713      	str	r3, [r2, #112]	@ 0x70
 800ad26:	4b6c      	ldr	r3, [pc, #432]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad28:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ad2a:	4a6b      	ldr	r2, [pc, #428]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad2c:	f043 0301 	orr.w	r3, r3, #1
 800ad30:	6713      	str	r3, [r2, #112]	@ 0x70
 800ad32:	e00b      	b.n	800ad4c <HAL_RCC_OscConfig+0x5e0>
 800ad34:	4b68      	ldr	r3, [pc, #416]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad36:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ad38:	4a67      	ldr	r2, [pc, #412]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad3a:	f023 0301 	bic.w	r3, r3, #1
 800ad3e:	6713      	str	r3, [r2, #112]	@ 0x70
 800ad40:	4b65      	ldr	r3, [pc, #404]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad42:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ad44:	4a64      	ldr	r2, [pc, #400]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad46:	f023 0304 	bic.w	r3, r3, #4
 800ad4a:	6713      	str	r3, [r2, #112]	@ 0x70
    /* Check the LSE State */
    if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
 800ad4c:	687b      	ldr	r3, [r7, #4]
 800ad4e:	689b      	ldr	r3, [r3, #8]
 800ad50:	2b00      	cmp	r3, #0
 800ad52:	d015      	beq.n	800ad80 <HAL_RCC_OscConfig+0x614>
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800ad54:	f7fa fe50 	bl	80059f8 <HAL_GetTick>
 800ad58:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is ready */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800ad5a:	e00a      	b.n	800ad72 <HAL_RCC_OscConfig+0x606>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800ad5c:	f7fa fe4c 	bl	80059f8 <HAL_GetTick>
 800ad60:	4602      	mov	r2, r0
 800ad62:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ad64:	1ad3      	subs	r3, r2, r3
 800ad66:	f241 3288 	movw	r2, #5000	@ 0x1388
 800ad6a:	4293      	cmp	r3, r2
 800ad6c:	d901      	bls.n	800ad72 <HAL_RCC_OscConfig+0x606>
        {
          return HAL_TIMEOUT;
 800ad6e:	2303      	movs	r3, #3
 800ad70:	e14e      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800ad72:	4b59      	ldr	r3, [pc, #356]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ad74:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ad76:	f003 0302 	and.w	r3, r3, #2
 800ad7a:	2b00      	cmp	r3, #0
 800ad7c:	d0ee      	beq.n	800ad5c <HAL_RCC_OscConfig+0x5f0>
 800ad7e:	e014      	b.n	800adaa <HAL_RCC_OscConfig+0x63e>
      }
    }
    else
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800ad80:	f7fa fe3a 	bl	80059f8 <HAL_GetTick>
 800ad84:	6278      	str	r0, [r7, #36]	@ 0x24

      /* Wait till LSE is disabled */
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 800ad86:	e00a      	b.n	800ad9e <HAL_RCC_OscConfig+0x632>
      {
        if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800ad88:	f7fa fe36 	bl	80059f8 <HAL_GetTick>
 800ad8c:	4602      	mov	r2, r0
 800ad8e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ad90:	1ad3      	subs	r3, r2, r3
 800ad92:	f241 3288 	movw	r2, #5000	@ 0x1388
 800ad96:	4293      	cmp	r3, r2
 800ad98:	d901      	bls.n	800ad9e <HAL_RCC_OscConfig+0x632>
        {
          return HAL_TIMEOUT;
 800ad9a:	2303      	movs	r3, #3
 800ad9c:	e138      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
      while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
 800ad9e:	4b4e      	ldr	r3, [pc, #312]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ada0:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800ada2:	f003 0302 	and.w	r3, r3, #2
 800ada6:	2b00      	cmp	r3, #0
 800ada8:	d1ee      	bne.n	800ad88 <HAL_RCC_OscConfig+0x61c>
    }
  }
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 800adaa:	687b      	ldr	r3, [r7, #4]
 800adac:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800adae:	2b00      	cmp	r3, #0
 800adb0:	f000 812d 	beq.w	800b00e <HAL_RCC_OscConfig+0x8a2>
  {
    /* Check if the PLL is used as system clock or not */
    if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL1)
 800adb4:	4b48      	ldr	r3, [pc, #288]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800adb6:	691b      	ldr	r3, [r3, #16]
 800adb8:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800adbc:	2b18      	cmp	r3, #24
 800adbe:	f000 80bd 	beq.w	800af3c <HAL_RCC_OscConfig+0x7d0>
    {
      if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 800adc2:	687b      	ldr	r3, [r7, #4]
 800adc4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800adc6:	2b02      	cmp	r3, #2
 800adc8:	f040 809e 	bne.w	800af08 <HAL_RCC_OscConfig+0x79c>
        assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
        assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
        assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));

        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 800adcc:	4b42      	ldr	r3, [pc, #264]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800adce:	681b      	ldr	r3, [r3, #0]
 800add0:	4a41      	ldr	r2, [pc, #260]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800add2:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 800add6:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800add8:	f7fa fe0e 	bl	80059f8 <HAL_GetTick>
 800addc:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800adde:	e008      	b.n	800adf2 <HAL_RCC_OscConfig+0x686>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800ade0:	f7fa fe0a 	bl	80059f8 <HAL_GetTick>
 800ade4:	4602      	mov	r2, r0
 800ade6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ade8:	1ad3      	subs	r3, r2, r3
 800adea:	2b02      	cmp	r3, #2
 800adec:	d901      	bls.n	800adf2 <HAL_RCC_OscConfig+0x686>
          {
            return HAL_TIMEOUT;
 800adee:	2303      	movs	r3, #3
 800adf0:	e10e      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800adf2:	4b39      	ldr	r3, [pc, #228]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800adf4:	681b      	ldr	r3, [r3, #0]
 800adf6:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800adfa:	2b00      	cmp	r3, #0
 800adfc:	d1f0      	bne.n	800ade0 <HAL_RCC_OscConfig+0x674>
          }
        }

        /* Configure the main PLL clock source, multiplication and division factors. */
        __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 800adfe:	4b36      	ldr	r3, [pc, #216]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae00:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 800ae02:	4b37      	ldr	r3, [pc, #220]	@ (800aee0 <HAL_RCC_OscConfig+0x774>)
 800ae04:	4013      	ands	r3, r2
 800ae06:	687a      	ldr	r2, [r7, #4]
 800ae08:	6a91      	ldr	r1, [r2, #40]	@ 0x28
 800ae0a:	687a      	ldr	r2, [r7, #4]
 800ae0c:	6ad2      	ldr	r2, [r2, #44]	@ 0x2c
 800ae0e:	0112      	lsls	r2, r2, #4
 800ae10:	430a      	orrs	r2, r1
 800ae12:	4931      	ldr	r1, [pc, #196]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae14:	4313      	orrs	r3, r2
 800ae16:	628b      	str	r3, [r1, #40]	@ 0x28
 800ae18:	687b      	ldr	r3, [r7, #4]
 800ae1a:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800ae1c:	3b01      	subs	r3, #1
 800ae1e:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800ae22:	687b      	ldr	r3, [r7, #4]
 800ae24:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800ae26:	3b01      	subs	r3, #1
 800ae28:	025b      	lsls	r3, r3, #9
 800ae2a:	b29b      	uxth	r3, r3
 800ae2c:	431a      	orrs	r2, r3
 800ae2e:	687b      	ldr	r3, [r7, #4]
 800ae30:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800ae32:	3b01      	subs	r3, #1
 800ae34:	041b      	lsls	r3, r3, #16
 800ae36:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800ae3a:	431a      	orrs	r2, r3
 800ae3c:	687b      	ldr	r3, [r7, #4]
 800ae3e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800ae40:	3b01      	subs	r3, #1
 800ae42:	061b      	lsls	r3, r3, #24
 800ae44:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800ae48:	4923      	ldr	r1, [pc, #140]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae4a:	4313      	orrs	r3, r2
 800ae4c:	630b      	str	r3, [r1, #48]	@ 0x30
                             RCC_OscInitStruct->PLL.PLLP,
                             RCC_OscInitStruct->PLL.PLLQ,
                             RCC_OscInitStruct->PLL.PLLR);

        /* Disable PLLFRACN . */
        __HAL_RCC_PLLFRACN_DISABLE();
 800ae4e:	4b22      	ldr	r3, [pc, #136]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae50:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ae52:	4a21      	ldr	r2, [pc, #132]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae54:	f023 0301 	bic.w	r3, r3, #1
 800ae58:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Configure PLL PLL1FRACN */
        __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 800ae5a:	4b1f      	ldr	r3, [pc, #124]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae5c:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800ae5e:	4b21      	ldr	r3, [pc, #132]	@ (800aee4 <HAL_RCC_OscConfig+0x778>)
 800ae60:	4013      	ands	r3, r2
 800ae62:	687a      	ldr	r2, [r7, #4]
 800ae64:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 800ae66:	00d2      	lsls	r2, r2, #3
 800ae68:	491b      	ldr	r1, [pc, #108]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae6a:	4313      	orrs	r3, r2
 800ae6c:	634b      	str	r3, [r1, #52]	@ 0x34

        /* Select PLL1 input reference frequency range: VCI */
        __HAL_RCC_PLL_VCIRANGE(RCC_OscInitStruct->PLL.PLLRGE) ;
 800ae6e:	4b1a      	ldr	r3, [pc, #104]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae70:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ae72:	f023 020c 	bic.w	r2, r3, #12
 800ae76:	687b      	ldr	r3, [r7, #4]
 800ae78:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800ae7a:	4917      	ldr	r1, [pc, #92]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae7c:	4313      	orrs	r3, r2
 800ae7e:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Select PLL1 output frequency range : VCO */
        __HAL_RCC_PLL_VCORANGE(RCC_OscInitStruct->PLL.PLLVCOSEL) ;
 800ae80:	4b15      	ldr	r3, [pc, #84]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae82:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ae84:	f023 0202 	bic.w	r2, r3, #2
 800ae88:	687b      	ldr	r3, [r7, #4]
 800ae8a:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800ae8c:	4912      	ldr	r1, [pc, #72]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae8e:	4313      	orrs	r3, r2
 800ae90:	62cb      	str	r3, [r1, #44]	@ 0x2c

        /* Enable PLL System Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVP);
 800ae92:	4b11      	ldr	r3, [pc, #68]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae94:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ae96:	4a10      	ldr	r2, [pc, #64]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800ae98:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800ae9c:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1Q Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800ae9e:	4b0e      	ldr	r3, [pc, #56]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800aea0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aea2:	4a0d      	ldr	r2, [pc, #52]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800aea4:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800aea8:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1R  Clock output. */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVR);
 800aeaa:	4b0b      	ldr	r3, [pc, #44]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800aeac:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aeae:	4a0a      	ldr	r2, [pc, #40]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800aeb0:	f443 2380 	orr.w	r3, r3, #262144	@ 0x40000
 800aeb4:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable PLL1FRACN . */
        __HAL_RCC_PLLFRACN_ENABLE();
 800aeb6:	4b08      	ldr	r3, [pc, #32]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800aeb8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800aeba:	4a07      	ldr	r2, [pc, #28]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800aebc:	f043 0301 	orr.w	r3, r3, #1
 800aec0:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* Enable the main PLL. */
        __HAL_RCC_PLL_ENABLE();
 800aec2:	4b05      	ldr	r3, [pc, #20]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800aec4:	681b      	ldr	r3, [r3, #0]
 800aec6:	4a04      	ldr	r2, [pc, #16]	@ (800aed8 <HAL_RCC_OscConfig+0x76c>)
 800aec8:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 800aecc:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800aece:	f7fa fd93 	bl	80059f8 <HAL_GetTick>
 800aed2:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800aed4:	e011      	b.n	800aefa <HAL_RCC_OscConfig+0x78e>
 800aed6:	bf00      	nop
 800aed8:	58024400 	.word	0x58024400
 800aedc:	58024800 	.word	0x58024800
 800aee0:	fffffc0c 	.word	0xfffffc0c
 800aee4:	ffff0007 	.word	0xffff0007
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800aee8:	f7fa fd86 	bl	80059f8 <HAL_GetTick>
 800aeec:	4602      	mov	r2, r0
 800aeee:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800aef0:	1ad3      	subs	r3, r2, r3
 800aef2:	2b02      	cmp	r3, #2
 800aef4:	d901      	bls.n	800aefa <HAL_RCC_OscConfig+0x78e>
          {
            return HAL_TIMEOUT;
 800aef6:	2303      	movs	r3, #3
 800aef8:	e08a      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800aefa:	4b47      	ldr	r3, [pc, #284]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800aefc:	681b      	ldr	r3, [r3, #0]
 800aefe:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800af02:	2b00      	cmp	r3, #0
 800af04:	d0f0      	beq.n	800aee8 <HAL_RCC_OscConfig+0x77c>
 800af06:	e082      	b.n	800b00e <HAL_RCC_OscConfig+0x8a2>
        }
      }
      else
      {
        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 800af08:	4b43      	ldr	r3, [pc, #268]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800af0a:	681b      	ldr	r3, [r3, #0]
 800af0c:	4a42      	ldr	r2, [pc, #264]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800af0e:	f023 7380 	bic.w	r3, r3, #16777216	@ 0x1000000
 800af12:	6013      	str	r3, [r2, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800af14:	f7fa fd70 	bl	80059f8 <HAL_GetTick>
 800af18:	6278      	str	r0, [r7, #36]	@ 0x24

        /* Wait till PLL is disabled */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800af1a:	e008      	b.n	800af2e <HAL_RCC_OscConfig+0x7c2>
        {
          if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 800af1c:	f7fa fd6c 	bl	80059f8 <HAL_GetTick>
 800af20:	4602      	mov	r2, r0
 800af22:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800af24:	1ad3      	subs	r3, r2, r3
 800af26:	2b02      	cmp	r3, #2
 800af28:	d901      	bls.n	800af2e <HAL_RCC_OscConfig+0x7c2>
          {
            return HAL_TIMEOUT;
 800af2a:	2303      	movs	r3, #3
 800af2c:	e070      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
 800af2e:	4b3a      	ldr	r3, [pc, #232]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800af30:	681b      	ldr	r3, [r3, #0]
 800af32:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800af36:	2b00      	cmp	r3, #0
 800af38:	d1f0      	bne.n	800af1c <HAL_RCC_OscConfig+0x7b0>
 800af3a:	e068      	b.n	800b00e <HAL_RCC_OscConfig+0x8a2>
      }
    }
    else
    {
      /* Do not return HAL_ERROR if request repeats the current configuration */
      temp1_pllckcfg = RCC->PLLCKSELR;
 800af3c:	4b36      	ldr	r3, [pc, #216]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800af3e:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800af40:	613b      	str	r3, [r7, #16]
      temp2_pllckcfg = RCC->PLL1DIVR;
 800af42:	4b35      	ldr	r3, [pc, #212]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800af44:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800af46:	60fb      	str	r3, [r7, #12]
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 800af48:	687b      	ldr	r3, [r7, #4]
 800af4a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800af4c:	2b01      	cmp	r3, #1
 800af4e:	d031      	beq.n	800afb4 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 800af50:	693b      	ldr	r3, [r7, #16]
 800af52:	f003 0203 	and.w	r2, r3, #3
 800af56:	687b      	ldr	r3, [r7, #4]
 800af58:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
      if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
 800af5a:	429a      	cmp	r2, r3
 800af5c:	d12a      	bne.n	800afb4 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 800af5e:	693b      	ldr	r3, [r7, #16]
 800af60:	091b      	lsrs	r3, r3, #4
 800af62:	f003 023f 	and.w	r2, r3, #63	@ 0x3f
 800af66:	687b      	ldr	r3, [r7, #4]
 800af68:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
          (READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 800af6a:	429a      	cmp	r2, r3
 800af6c:	d122      	bne.n	800afb4 <HAL_RCC_OscConfig+0x848>
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 800af6e:	68fb      	ldr	r3, [r7, #12]
 800af70:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800af74:	687b      	ldr	r3, [r7, #4]
 800af76:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800af78:	3b01      	subs	r3, #1
          ((READ_BIT(temp1_pllckcfg, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) != RCC_OscInitStruct->PLL.PLLM) ||
 800af7a:	429a      	cmp	r2, r3
 800af7c:	d11a      	bne.n	800afb4 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 800af7e:	68fb      	ldr	r3, [r7, #12]
 800af80:	0a5b      	lsrs	r3, r3, #9
 800af82:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800af86:	687b      	ldr	r3, [r7, #4]
 800af88:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800af8a:	3b01      	subs	r3, #1
          (READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_N1) != (RCC_OscInitStruct->PLL.PLLN - 1U)) ||
 800af8c:	429a      	cmp	r2, r3
 800af8e:	d111      	bne.n	800afb4 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 800af90:	68fb      	ldr	r3, [r7, #12]
 800af92:	0c1b      	lsrs	r3, r3, #16
 800af94:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800af98:	687b      	ldr	r3, [r7, #4]
 800af9a:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800af9c:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_P1) >> RCC_PLL1DIVR_P1_Pos) != (RCC_OscInitStruct->PLL.PLLP - 1U)) ||
 800af9e:	429a      	cmp	r2, r3
 800afa0:	d108      	bne.n	800afb4 <HAL_RCC_OscConfig+0x848>
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_R1) >> RCC_PLL1DIVR_R1_Pos) != (RCC_OscInitStruct->PLL.PLLR - 1U)))
 800afa2:	68fb      	ldr	r3, [r7, #12]
 800afa4:	0e1b      	lsrs	r3, r3, #24
 800afa6:	f003 027f 	and.w	r2, r3, #127	@ 0x7f
 800afaa:	687b      	ldr	r3, [r7, #4]
 800afac:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800afae:	3b01      	subs	r3, #1
          ((READ_BIT(temp2_pllckcfg, RCC_PLL1DIVR_Q1) >> RCC_PLL1DIVR_Q1_Pos) != (RCC_OscInitStruct->PLL.PLLQ - 1U)) ||
 800afb0:	429a      	cmp	r2, r3
 800afb2:	d001      	beq.n	800afb8 <HAL_RCC_OscConfig+0x84c>
      {
        return HAL_ERROR;
 800afb4:	2301      	movs	r3, #1
 800afb6:	e02b      	b.n	800b010 <HAL_RCC_OscConfig+0x8a4>
      }
      else
      {
        /* Check if only fractional part needs to be updated  */
        temp1_pllckcfg = ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> RCC_PLL1FRACR_FRACN1_Pos);
 800afb8:	4b17      	ldr	r3, [pc, #92]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800afba:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800afbc:	08db      	lsrs	r3, r3, #3
 800afbe:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800afc2:	613b      	str	r3, [r7, #16]
        if (RCC_OscInitStruct->PLL.PLLFRACN != temp1_pllckcfg)
 800afc4:	687b      	ldr	r3, [r7, #4]
 800afc6:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800afc8:	693a      	ldr	r2, [r7, #16]
 800afca:	429a      	cmp	r2, r3
 800afcc:	d01f      	beq.n	800b00e <HAL_RCC_OscConfig+0x8a2>
        {
          assert_param(IS_RCC_PLLFRACN_VALUE(RCC_OscInitStruct->PLL.PLLFRACN));
          /* Disable PLL1FRACEN */
          __HAL_RCC_PLLFRACN_DISABLE();
 800afce:	4b12      	ldr	r3, [pc, #72]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800afd0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800afd2:	4a11      	ldr	r2, [pc, #68]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800afd4:	f023 0301 	bic.w	r3, r3, #1
 800afd8:	62d3      	str	r3, [r2, #44]	@ 0x2c
          /* Get Start Tick*/
          tickstart = HAL_GetTick();
 800afda:	f7fa fd0d 	bl	80059f8 <HAL_GetTick>
 800afde:	6278      	str	r0, [r7, #36]	@ 0x24
          /* Wait at least 2 CK_REF (PLL input source divided by M) period to make sure next latched value will be taken into account. */
          while ((HAL_GetTick() - tickstart) < PLL_FRAC_TIMEOUT_VALUE)
 800afe0:	bf00      	nop
 800afe2:	f7fa fd09 	bl	80059f8 <HAL_GetTick>
 800afe6:	4602      	mov	r2, r0
 800afe8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800afea:	4293      	cmp	r3, r2
 800afec:	d0f9      	beq.n	800afe2 <HAL_RCC_OscConfig+0x876>
          {
          }
          /* Configure PLL1 PLL1FRACN */
          __HAL_RCC_PLLFRACN_CONFIG(RCC_OscInitStruct->PLL.PLLFRACN);
 800afee:	4b0a      	ldr	r3, [pc, #40]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800aff0:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800aff2:	4b0a      	ldr	r3, [pc, #40]	@ (800b01c <HAL_RCC_OscConfig+0x8b0>)
 800aff4:	4013      	ands	r3, r2
 800aff6:	687a      	ldr	r2, [r7, #4]
 800aff8:	6c92      	ldr	r2, [r2, #72]	@ 0x48
 800affa:	00d2      	lsls	r2, r2, #3
 800affc:	4906      	ldr	r1, [pc, #24]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800affe:	4313      	orrs	r3, r2
 800b000:	634b      	str	r3, [r1, #52]	@ 0x34
          /* Enable PLL1FRACEN to latch new value. */
          __HAL_RCC_PLLFRACN_ENABLE();
 800b002:	4b05      	ldr	r3, [pc, #20]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800b004:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b006:	4a04      	ldr	r2, [pc, #16]	@ (800b018 <HAL_RCC_OscConfig+0x8ac>)
 800b008:	f043 0301 	orr.w	r3, r3, #1
 800b00c:	62d3      	str	r3, [r2, #44]	@ 0x2c
        }
      }
    }
  }
  return HAL_OK;
 800b00e:	2300      	movs	r3, #0
}
 800b010:	4618      	mov	r0, r3
 800b012:	3730      	adds	r7, #48	@ 0x30
 800b014:	46bd      	mov	sp, r7
 800b016:	bd80      	pop	{r7, pc}
 800b018:	58024400 	.word	0x58024400
 800b01c:	ffff0007 	.word	0xffff0007

0800b020 <HAL_RCC_ClockConfig>:
  *         D1CPRE[3:0] bits to ensure that  Domain1 core clock not exceed the maximum allowed frequency
  *         (for more details refer to section above "Initialization/de-initialization functions")
  * @retval None
  */
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
{
 800b020:	b580      	push	{r7, lr}
 800b022:	b086      	sub	sp, #24
 800b024:	af00      	add	r7, sp, #0
 800b026:	6078      	str	r0, [r7, #4]
 800b028:	6039      	str	r1, [r7, #0]
  HAL_StatusTypeDef halstatus;
  uint32_t tickstart;
  uint32_t common_system_clock;

  /* Check Null pointer */
  if (RCC_ClkInitStruct == NULL)
 800b02a:	687b      	ldr	r3, [r7, #4]
 800b02c:	2b00      	cmp	r3, #0
 800b02e:	d101      	bne.n	800b034 <HAL_RCC_ClockConfig+0x14>
  {
    return HAL_ERROR;
 800b030:	2301      	movs	r3, #1
 800b032:	e19c      	b.n	800b36e <HAL_RCC_ClockConfig+0x34e>
  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
    must be correctly programmed according to the frequency of the CPU clock
    (HCLK) and the supply voltage of the device. */

  /* Increasing the CPU frequency */
  if (FLatency > __HAL_FLASH_GET_LATENCY())
 800b034:	4b8a      	ldr	r3, [pc, #552]	@ (800b260 <HAL_RCC_ClockConfig+0x240>)
 800b036:	681b      	ldr	r3, [r3, #0]
 800b038:	f003 030f 	and.w	r3, r3, #15
 800b03c:	683a      	ldr	r2, [r7, #0]
 800b03e:	429a      	cmp	r2, r3
 800b040:	d910      	bls.n	800b064 <HAL_RCC_ClockConfig+0x44>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800b042:	4b87      	ldr	r3, [pc, #540]	@ (800b260 <HAL_RCC_ClockConfig+0x240>)
 800b044:	681b      	ldr	r3, [r3, #0]
 800b046:	f023 020f 	bic.w	r2, r3, #15
 800b04a:	4985      	ldr	r1, [pc, #532]	@ (800b260 <HAL_RCC_ClockConfig+0x240>)
 800b04c:	683b      	ldr	r3, [r7, #0]
 800b04e:	4313      	orrs	r3, r2
 800b050:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 800b052:	4b83      	ldr	r3, [pc, #524]	@ (800b260 <HAL_RCC_ClockConfig+0x240>)
 800b054:	681b      	ldr	r3, [r3, #0]
 800b056:	f003 030f 	and.w	r3, r3, #15
 800b05a:	683a      	ldr	r2, [r7, #0]
 800b05c:	429a      	cmp	r2, r3
 800b05e:	d001      	beq.n	800b064 <HAL_RCC_ClockConfig+0x44>
    {
      return HAL_ERROR;
 800b060:	2301      	movs	r3, #1
 800b062:	e184      	b.n	800b36e <HAL_RCC_ClockConfig+0x34e>

  }

  /* Increasing the BUS frequency divider */
  /*-------------------------- D1PCLK1/CDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 800b064:	687b      	ldr	r3, [r7, #4]
 800b066:	681b      	ldr	r3, [r3, #0]
 800b068:	f003 0304 	and.w	r3, r3, #4
 800b06c:	2b00      	cmp	r3, #0
 800b06e:	d010      	beq.n	800b092 <HAL_RCC_ClockConfig+0x72>
  {
#if defined (RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 800b070:	687b      	ldr	r3, [r7, #4]
 800b072:	691a      	ldr	r2, [r3, #16]
 800b074:	4b7b      	ldr	r3, [pc, #492]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b076:	699b      	ldr	r3, [r3, #24]
 800b078:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800b07c:	429a      	cmp	r2, r3
 800b07e:	d908      	bls.n	800b092 <HAL_RCC_ClockConfig+0x72>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 800b080:	4b78      	ldr	r3, [pc, #480]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b082:	699b      	ldr	r3, [r3, #24]
 800b084:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800b088:	687b      	ldr	r3, [r7, #4]
 800b08a:	691b      	ldr	r3, [r3, #16]
 800b08c:	4975      	ldr	r1, [pc, #468]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b08e:	4313      	orrs	r3, r2
 800b090:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800b092:	687b      	ldr	r3, [r7, #4]
 800b094:	681b      	ldr	r3, [r3, #0]
 800b096:	f003 0308 	and.w	r3, r3, #8
 800b09a:	2b00      	cmp	r3, #0
 800b09c:	d010      	beq.n	800b0c0 <HAL_RCC_ClockConfig+0xa0>
  {
#if defined (RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 800b09e:	687b      	ldr	r3, [r7, #4]
 800b0a0:	695a      	ldr	r2, [r3, #20]
 800b0a2:	4b70      	ldr	r3, [pc, #448]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b0a4:	69db      	ldr	r3, [r3, #28]
 800b0a6:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800b0aa:	429a      	cmp	r2, r3
 800b0ac:	d908      	bls.n	800b0c0 <HAL_RCC_ClockConfig+0xa0>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 800b0ae:	4b6d      	ldr	r3, [pc, #436]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b0b0:	69db      	ldr	r3, [r3, #28]
 800b0b2:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800b0b6:	687b      	ldr	r3, [r7, #4]
 800b0b8:	695b      	ldr	r3, [r3, #20]
 800b0ba:	496a      	ldr	r1, [pc, #424]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b0bc:	4313      	orrs	r3, r2
 800b0be:	61cb      	str	r3, [r1, #28]
      MODIFY_REG(RCC->CDCFGR2, RCC_CDCFGR2_CDPPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
    }
#endif
  }
  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800b0c0:	687b      	ldr	r3, [r7, #4]
 800b0c2:	681b      	ldr	r3, [r3, #0]
 800b0c4:	f003 0310 	and.w	r3, r3, #16
 800b0c8:	2b00      	cmp	r3, #0
 800b0ca:	d010      	beq.n	800b0ee <HAL_RCC_ClockConfig+0xce>
  {
#if defined(RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) > (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 800b0cc:	687b      	ldr	r3, [r7, #4]
 800b0ce:	699a      	ldr	r2, [r3, #24]
 800b0d0:	4b64      	ldr	r3, [pc, #400]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b0d2:	69db      	ldr	r3, [r3, #28]
 800b0d4:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 800b0d8:	429a      	cmp	r2, r3
 800b0da:	d908      	bls.n	800b0ee <HAL_RCC_ClockConfig+0xce>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 800b0dc:	4b61      	ldr	r3, [pc, #388]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b0de:	69db      	ldr	r3, [r3, #28]
 800b0e0:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 800b0e4:	687b      	ldr	r3, [r7, #4]
 800b0e6:	699b      	ldr	r3, [r3, #24]
 800b0e8:	495e      	ldr	r1, [pc, #376]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b0ea:	4313      	orrs	r3, r2
 800b0ec:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 800b0ee:	687b      	ldr	r3, [r7, #4]
 800b0f0:	681b      	ldr	r3, [r3, #0]
 800b0f2:	f003 0320 	and.w	r3, r3, #32
 800b0f6:	2b00      	cmp	r3, #0
 800b0f8:	d010      	beq.n	800b11c <HAL_RCC_ClockConfig+0xfc>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) > (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 800b0fa:	687b      	ldr	r3, [r7, #4]
 800b0fc:	69da      	ldr	r2, [r3, #28]
 800b0fe:	4b59      	ldr	r3, [pc, #356]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b100:	6a1b      	ldr	r3, [r3, #32]
 800b102:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800b106:	429a      	cmp	r2, r3
 800b108:	d908      	bls.n	800b11c <HAL_RCC_ClockConfig+0xfc>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 800b10a:	4b56      	ldr	r3, [pc, #344]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b10c:	6a1b      	ldr	r3, [r3, #32]
 800b10e:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800b112:	687b      	ldr	r3, [r7, #4]
 800b114:	69db      	ldr	r3, [r3, #28]
 800b116:	4953      	ldr	r1, [pc, #332]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b118:	4313      	orrs	r3, r2
 800b11a:	620b      	str	r3, [r1, #32]
    }
#endif
  }

  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800b11c:	687b      	ldr	r3, [r7, #4]
 800b11e:	681b      	ldr	r3, [r3, #0]
 800b120:	f003 0302 	and.w	r3, r3, #2
 800b124:	2b00      	cmp	r3, #0
 800b126:	d010      	beq.n	800b14a <HAL_RCC_ClockConfig+0x12a>
  {
#if defined (RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) > (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 800b128:	687b      	ldr	r3, [r7, #4]
 800b12a:	68da      	ldr	r2, [r3, #12]
 800b12c:	4b4d      	ldr	r3, [pc, #308]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b12e:	699b      	ldr	r3, [r3, #24]
 800b130:	f003 030f 	and.w	r3, r3, #15
 800b134:	429a      	cmp	r2, r3
 800b136:	d908      	bls.n	800b14a <HAL_RCC_ClockConfig+0x12a>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800b138:	4b4a      	ldr	r3, [pc, #296]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b13a:	699b      	ldr	r3, [r3, #24]
 800b13c:	f023 020f 	bic.w	r2, r3, #15
 800b140:	687b      	ldr	r3, [r7, #4]
 800b142:	68db      	ldr	r3, [r3, #12]
 800b144:	4947      	ldr	r1, [pc, #284]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b146:	4313      	orrs	r3, r2
 800b148:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*------------------------- SYSCLK Configuration -------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 800b14a:	687b      	ldr	r3, [r7, #4]
 800b14c:	681b      	ldr	r3, [r3, #0]
 800b14e:	f003 0301 	and.w	r3, r3, #1
 800b152:	2b00      	cmp	r3, #0
 800b154:	d055      	beq.n	800b202 <HAL_RCC_ClockConfig+0x1e2>
  {
    assert_param(IS_RCC_SYSCLK(RCC_ClkInitStruct->SYSCLKDivider));
    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
#if defined(RCC_D1CFGR_D1CPRE)
    MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1CPRE, RCC_ClkInitStruct->SYSCLKDivider);
 800b156:	4b43      	ldr	r3, [pc, #268]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b158:	699b      	ldr	r3, [r3, #24]
 800b15a:	f423 6270 	bic.w	r2, r3, #3840	@ 0xf00
 800b15e:	687b      	ldr	r3, [r7, #4]
 800b160:	689b      	ldr	r3, [r3, #8]
 800b162:	4940      	ldr	r1, [pc, #256]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b164:	4313      	orrs	r3, r2
 800b166:	618b      	str	r3, [r1, #24]
#else
    MODIFY_REG(RCC->CDCFGR1, RCC_CDCFGR1_CDCPRE, RCC_ClkInitStruct->SYSCLKDivider);
#endif
    /* HSE is selected as System Clock Source */
    if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 800b168:	687b      	ldr	r3, [r7, #4]
 800b16a:	685b      	ldr	r3, [r3, #4]
 800b16c:	2b02      	cmp	r3, #2
 800b16e:	d107      	bne.n	800b180 <HAL_RCC_ClockConfig+0x160>
    {
      /* Check the HSE ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
 800b170:	4b3c      	ldr	r3, [pc, #240]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b172:	681b      	ldr	r3, [r3, #0]
 800b174:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 800b178:	2b00      	cmp	r3, #0
 800b17a:	d121      	bne.n	800b1c0 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800b17c:	2301      	movs	r3, #1
 800b17e:	e0f6      	b.n	800b36e <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* PLL is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 800b180:	687b      	ldr	r3, [r7, #4]
 800b182:	685b      	ldr	r3, [r3, #4]
 800b184:	2b03      	cmp	r3, #3
 800b186:	d107      	bne.n	800b198 <HAL_RCC_ClockConfig+0x178>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
 800b188:	4b36      	ldr	r3, [pc, #216]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b18a:	681b      	ldr	r3, [r3, #0]
 800b18c:	f003 7300 	and.w	r3, r3, #33554432	@ 0x2000000
 800b190:	2b00      	cmp	r3, #0
 800b192:	d115      	bne.n	800b1c0 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800b194:	2301      	movs	r3, #1
 800b196:	e0ea      	b.n	800b36e <HAL_RCC_ClockConfig+0x34e>
      }
    }
    /* CSI is selected as System Clock Source */
    else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_CSI)
 800b198:	687b      	ldr	r3, [r7, #4]
 800b19a:	685b      	ldr	r3, [r3, #4]
 800b19c:	2b01      	cmp	r3, #1
 800b19e:	d107      	bne.n	800b1b0 <HAL_RCC_ClockConfig+0x190>
    {
      /* Check the PLL ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_CSIRDY) == 0U)
 800b1a0:	4b30      	ldr	r3, [pc, #192]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b1a2:	681b      	ldr	r3, [r3, #0]
 800b1a4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800b1a8:	2b00      	cmp	r3, #0
 800b1aa:	d109      	bne.n	800b1c0 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800b1ac:	2301      	movs	r3, #1
 800b1ae:	e0de      	b.n	800b36e <HAL_RCC_ClockConfig+0x34e>
    }
    /* HSI is selected as System Clock Source */
    else
    {
      /* Check the HSI ready flag */
      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
 800b1b0:	4b2c      	ldr	r3, [pc, #176]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b1b2:	681b      	ldr	r3, [r3, #0]
 800b1b4:	f003 0304 	and.w	r3, r3, #4
 800b1b8:	2b00      	cmp	r3, #0
 800b1ba:	d101      	bne.n	800b1c0 <HAL_RCC_ClockConfig+0x1a0>
      {
        return HAL_ERROR;
 800b1bc:	2301      	movs	r3, #1
 800b1be:	e0d6      	b.n	800b36e <HAL_RCC_ClockConfig+0x34e>
      }
    }
    MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
 800b1c0:	4b28      	ldr	r3, [pc, #160]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b1c2:	691b      	ldr	r3, [r3, #16]
 800b1c4:	f023 0207 	bic.w	r2, r3, #7
 800b1c8:	687b      	ldr	r3, [r7, #4]
 800b1ca:	685b      	ldr	r3, [r3, #4]
 800b1cc:	4925      	ldr	r1, [pc, #148]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b1ce:	4313      	orrs	r3, r2
 800b1d0:	610b      	str	r3, [r1, #16]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800b1d2:	f7fa fc11 	bl	80059f8 <HAL_GetTick>
 800b1d6:	6178      	str	r0, [r7, #20]

    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800b1d8:	e00a      	b.n	800b1f0 <HAL_RCC_ClockConfig+0x1d0>
    {
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 800b1da:	f7fa fc0d 	bl	80059f8 <HAL_GetTick>
 800b1de:	4602      	mov	r2, r0
 800b1e0:	697b      	ldr	r3, [r7, #20]
 800b1e2:	1ad3      	subs	r3, r2, r3
 800b1e4:	f241 3288 	movw	r2, #5000	@ 0x1388
 800b1e8:	4293      	cmp	r3, r2
 800b1ea:	d901      	bls.n	800b1f0 <HAL_RCC_ClockConfig+0x1d0>
      {
        return HAL_TIMEOUT;
 800b1ec:	2303      	movs	r3, #3
 800b1ee:	e0be      	b.n	800b36e <HAL_RCC_ClockConfig+0x34e>
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 800b1f0:	4b1c      	ldr	r3, [pc, #112]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b1f2:	691b      	ldr	r3, [r3, #16]
 800b1f4:	f003 0238 	and.w	r2, r3, #56	@ 0x38
 800b1f8:	687b      	ldr	r3, [r7, #4]
 800b1fa:	685b      	ldr	r3, [r3, #4]
 800b1fc:	00db      	lsls	r3, r3, #3
 800b1fe:	429a      	cmp	r2, r3
 800b200:	d1eb      	bne.n	800b1da <HAL_RCC_ClockConfig+0x1ba>

  }

  /* Decreasing the BUS frequency divider */
  /*-------------------------- HCLK Configuration --------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 800b202:	687b      	ldr	r3, [r7, #4]
 800b204:	681b      	ldr	r3, [r3, #0]
 800b206:	f003 0302 	and.w	r3, r3, #2
 800b20a:	2b00      	cmp	r3, #0
 800b20c:	d010      	beq.n	800b230 <HAL_RCC_ClockConfig+0x210>
  {
#if defined(RCC_D1CFGR_HPRE)
    if ((RCC_ClkInitStruct->AHBCLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_HPRE))
 800b20e:	687b      	ldr	r3, [r7, #4]
 800b210:	68da      	ldr	r2, [r3, #12]
 800b212:	4b14      	ldr	r3, [pc, #80]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b214:	699b      	ldr	r3, [r3, #24]
 800b216:	f003 030f 	and.w	r3, r3, #15
 800b21a:	429a      	cmp	r2, r3
 800b21c:	d208      	bcs.n	800b230 <HAL_RCC_ClockConfig+0x210>
    {
      /* Set the new HCLK clock divider */
      assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 800b21e:	4b11      	ldr	r3, [pc, #68]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b220:	699b      	ldr	r3, [r3, #24]
 800b222:	f023 020f 	bic.w	r2, r3, #15
 800b226:	687b      	ldr	r3, [r7, #4]
 800b228:	68db      	ldr	r3, [r3, #12]
 800b22a:	490e      	ldr	r1, [pc, #56]	@ (800b264 <HAL_RCC_ClockConfig+0x244>)
 800b22c:	4313      	orrs	r3, r2
 800b22e:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /* Decreasing the number of wait states because of lower CPU frequency */
  if (FLatency < __HAL_FLASH_GET_LATENCY())
 800b230:	4b0b      	ldr	r3, [pc, #44]	@ (800b260 <HAL_RCC_ClockConfig+0x240>)
 800b232:	681b      	ldr	r3, [r3, #0]
 800b234:	f003 030f 	and.w	r3, r3, #15
 800b238:	683a      	ldr	r2, [r7, #0]
 800b23a:	429a      	cmp	r2, r3
 800b23c:	d214      	bcs.n	800b268 <HAL_RCC_ClockConfig+0x248>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 800b23e:	4b08      	ldr	r3, [pc, #32]	@ (800b260 <HAL_RCC_ClockConfig+0x240>)
 800b240:	681b      	ldr	r3, [r3, #0]
 800b242:	f023 020f 	bic.w	r2, r3, #15
 800b246:	4906      	ldr	r1, [pc, #24]	@ (800b260 <HAL_RCC_ClockConfig+0x240>)
 800b248:	683b      	ldr	r3, [r7, #0]
 800b24a:	4313      	orrs	r3, r2
 800b24c:	600b      	str	r3, [r1, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if (__HAL_FLASH_GET_LATENCY() != FLatency)
 800b24e:	4b04      	ldr	r3, [pc, #16]	@ (800b260 <HAL_RCC_ClockConfig+0x240>)
 800b250:	681b      	ldr	r3, [r3, #0]
 800b252:	f003 030f 	and.w	r3, r3, #15
 800b256:	683a      	ldr	r2, [r7, #0]
 800b258:	429a      	cmp	r2, r3
 800b25a:	d005      	beq.n	800b268 <HAL_RCC_ClockConfig+0x248>
    {
      return HAL_ERROR;
 800b25c:	2301      	movs	r3, #1
 800b25e:	e086      	b.n	800b36e <HAL_RCC_ClockConfig+0x34e>
 800b260:	52002000 	.word	0x52002000
 800b264:	58024400 	.word	0x58024400
    }
  }

  /*-------------------------- D1PCLK1/CDPCLK Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D1PCLK1) == RCC_CLOCKTYPE_D1PCLK1)
 800b268:	687b      	ldr	r3, [r7, #4]
 800b26a:	681b      	ldr	r3, [r3, #0]
 800b26c:	f003 0304 	and.w	r3, r3, #4
 800b270:	2b00      	cmp	r3, #0
 800b272:	d010      	beq.n	800b296 <HAL_RCC_ClockConfig+0x276>
  {
#if defined(RCC_D1CFGR_D1PPRE)
    if ((RCC_ClkInitStruct->APB3CLKDivider) < (RCC->D1CFGR & RCC_D1CFGR_D1PPRE))
 800b274:	687b      	ldr	r3, [r7, #4]
 800b276:	691a      	ldr	r2, [r3, #16]
 800b278:	4b3f      	ldr	r3, [pc, #252]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b27a:	699b      	ldr	r3, [r3, #24]
 800b27c:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800b280:	429a      	cmp	r2, r3
 800b282:	d208      	bcs.n	800b296 <HAL_RCC_ClockConfig+0x276>
    {
      assert_param(IS_RCC_D1PCLK1(RCC_ClkInitStruct->APB3CLKDivider));
      MODIFY_REG(RCC->D1CFGR, RCC_D1CFGR_D1PPRE, RCC_ClkInitStruct->APB3CLKDivider);
 800b284:	4b3c      	ldr	r3, [pc, #240]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b286:	699b      	ldr	r3, [r3, #24]
 800b288:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800b28c:	687b      	ldr	r3, [r7, #4]
 800b28e:	691b      	ldr	r3, [r3, #16]
 800b290:	4939      	ldr	r1, [pc, #228]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b292:	4313      	orrs	r3, r2
 800b294:	618b      	str	r3, [r1, #24]
    }
#endif
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 800b296:	687b      	ldr	r3, [r7, #4]
 800b298:	681b      	ldr	r3, [r3, #0]
 800b29a:	f003 0308 	and.w	r3, r3, #8
 800b29e:	2b00      	cmp	r3, #0
 800b2a0:	d010      	beq.n	800b2c4 <HAL_RCC_ClockConfig+0x2a4>
  {
#if defined(RCC_D2CFGR_D2PPRE1)
    if ((RCC_ClkInitStruct->APB1CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE1))
 800b2a2:	687b      	ldr	r3, [r7, #4]
 800b2a4:	695a      	ldr	r2, [r3, #20]
 800b2a6:	4b34      	ldr	r3, [pc, #208]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b2a8:	69db      	ldr	r3, [r3, #28]
 800b2aa:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800b2ae:	429a      	cmp	r2, r3
 800b2b0:	d208      	bcs.n	800b2c4 <HAL_RCC_ClockConfig+0x2a4>
    {
      assert_param(IS_RCC_PCLK1(RCC_ClkInitStruct->APB1CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE1, (RCC_ClkInitStruct->APB1CLKDivider));
 800b2b2:	4b31      	ldr	r3, [pc, #196]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b2b4:	69db      	ldr	r3, [r3, #28]
 800b2b6:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800b2ba:	687b      	ldr	r3, [r7, #4]
 800b2bc:	695b      	ldr	r3, [r3, #20]
 800b2be:	492e      	ldr	r1, [pc, #184]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b2c0:	4313      	orrs	r3, r2
 800b2c2:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 800b2c4:	687b      	ldr	r3, [r7, #4]
 800b2c6:	681b      	ldr	r3, [r3, #0]
 800b2c8:	f003 0310 	and.w	r3, r3, #16
 800b2cc:	2b00      	cmp	r3, #0
 800b2ce:	d010      	beq.n	800b2f2 <HAL_RCC_ClockConfig+0x2d2>
  {
#if defined (RCC_D2CFGR_D2PPRE2)
    if ((RCC_ClkInitStruct->APB2CLKDivider) < (RCC->D2CFGR & RCC_D2CFGR_D2PPRE2))
 800b2d0:	687b      	ldr	r3, [r7, #4]
 800b2d2:	699a      	ldr	r2, [r3, #24]
 800b2d4:	4b28      	ldr	r3, [pc, #160]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b2d6:	69db      	ldr	r3, [r3, #28]
 800b2d8:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 800b2dc:	429a      	cmp	r2, r3
 800b2de:	d208      	bcs.n	800b2f2 <HAL_RCC_ClockConfig+0x2d2>
    {
      assert_param(IS_RCC_PCLK2(RCC_ClkInitStruct->APB2CLKDivider));
      MODIFY_REG(RCC->D2CFGR, RCC_D2CFGR_D2PPRE2, (RCC_ClkInitStruct->APB2CLKDivider));
 800b2e0:	4b25      	ldr	r3, [pc, #148]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b2e2:	69db      	ldr	r3, [r3, #28]
 800b2e4:	f423 62e0 	bic.w	r2, r3, #1792	@ 0x700
 800b2e8:	687b      	ldr	r3, [r7, #4]
 800b2ea:	699b      	ldr	r3, [r3, #24]
 800b2ec:	4922      	ldr	r1, [pc, #136]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b2ee:	4313      	orrs	r3, r2
 800b2f0:	61cb      	str	r3, [r1, #28]
    }
#endif
  }

  /*-------------------------- D3PCLK1/SRDPCLK1 Configuration ---------------------------*/
  if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_D3PCLK1) == RCC_CLOCKTYPE_D3PCLK1)
 800b2f2:	687b      	ldr	r3, [r7, #4]
 800b2f4:	681b      	ldr	r3, [r3, #0]
 800b2f6:	f003 0320 	and.w	r3, r3, #32
 800b2fa:	2b00      	cmp	r3, #0
 800b2fc:	d010      	beq.n	800b320 <HAL_RCC_ClockConfig+0x300>
  {
#if defined(RCC_D3CFGR_D3PPRE)
    if ((RCC_ClkInitStruct->APB4CLKDivider) < (RCC->D3CFGR & RCC_D3CFGR_D3PPRE))
 800b2fe:	687b      	ldr	r3, [r7, #4]
 800b300:	69da      	ldr	r2, [r3, #28]
 800b302:	4b1d      	ldr	r3, [pc, #116]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b304:	6a1b      	ldr	r3, [r3, #32]
 800b306:	f003 0370 	and.w	r3, r3, #112	@ 0x70
 800b30a:	429a      	cmp	r2, r3
 800b30c:	d208      	bcs.n	800b320 <HAL_RCC_ClockConfig+0x300>
    {
      assert_param(IS_RCC_D3PCLK1(RCC_ClkInitStruct->APB4CLKDivider));
      MODIFY_REG(RCC->D3CFGR, RCC_D3CFGR_D3PPRE, (RCC_ClkInitStruct->APB4CLKDivider));
 800b30e:	4b1a      	ldr	r3, [pc, #104]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b310:	6a1b      	ldr	r3, [r3, #32]
 800b312:	f023 0270 	bic.w	r2, r3, #112	@ 0x70
 800b316:	687b      	ldr	r3, [r7, #4]
 800b318:	69db      	ldr	r3, [r3, #28]
 800b31a:	4917      	ldr	r1, [pc, #92]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b31c:	4313      	orrs	r3, r2
 800b31e:	620b      	str	r3, [r1, #32]
#endif
  }

  /* Update the SystemCoreClock global variable */
#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos]) & 0x1FU);
 800b320:	f000 f834 	bl	800b38c <HAL_RCC_GetSysClockFreq>
 800b324:	4602      	mov	r2, r0
 800b326:	4b14      	ldr	r3, [pc, #80]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b328:	699b      	ldr	r3, [r3, #24]
 800b32a:	0a1b      	lsrs	r3, r3, #8
 800b32c:	f003 030f 	and.w	r3, r3, #15
 800b330:	4912      	ldr	r1, [pc, #72]	@ (800b37c <HAL_RCC_ClockConfig+0x35c>)
 800b332:	5ccb      	ldrb	r3, [r1, r3]
 800b334:	f003 031f 	and.w	r3, r3, #31
 800b338:	fa22 f303 	lsr.w	r3, r2, r3
 800b33c:	613b      	str	r3, [r7, #16]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos]) & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800b33e:	4b0e      	ldr	r3, [pc, #56]	@ (800b378 <HAL_RCC_ClockConfig+0x358>)
 800b340:	699b      	ldr	r3, [r3, #24]
 800b342:	f003 030f 	and.w	r3, r3, #15
 800b346:	4a0d      	ldr	r2, [pc, #52]	@ (800b37c <HAL_RCC_ClockConfig+0x35c>)
 800b348:	5cd3      	ldrb	r3, [r2, r3]
 800b34a:	f003 031f 	and.w	r3, r3, #31
 800b34e:	693a      	ldr	r2, [r7, #16]
 800b350:	fa22 f303 	lsr.w	r3, r2, r3
 800b354:	4a0a      	ldr	r2, [pc, #40]	@ (800b380 <HAL_RCC_ClockConfig+0x360>)
 800b356:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800b358:	4a0a      	ldr	r2, [pc, #40]	@ (800b384 <HAL_RCC_ClockConfig+0x364>)
 800b35a:	693b      	ldr	r3, [r7, #16]
 800b35c:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  /* Configure the source of time base considering new system clocks settings*/
  halstatus = HAL_InitTick(uwTickPrio);
 800b35e:	4b0a      	ldr	r3, [pc, #40]	@ (800b388 <HAL_RCC_ClockConfig+0x368>)
 800b360:	681b      	ldr	r3, [r3, #0]
 800b362:	4618      	mov	r0, r3
 800b364:	f7f8 ff06 	bl	8004174 <HAL_InitTick>
 800b368:	4603      	mov	r3, r0
 800b36a:	73fb      	strb	r3, [r7, #15]

  return halstatus;
 800b36c:	7bfb      	ldrb	r3, [r7, #15]
}
 800b36e:	4618      	mov	r0, r3
 800b370:	3718      	adds	r7, #24
 800b372:	46bd      	mov	sp, r7
 800b374:	bd80      	pop	{r7, pc}
 800b376:	bf00      	nop
 800b378:	58024400 	.word	0x58024400
 800b37c:	08031d0c 	.word	0x08031d0c
 800b380:	24000010 	.word	0x24000010
 800b384:	2400000c 	.word	0x2400000c
 800b388:	2400002c 	.word	0x2400002c

0800b38c <HAL_RCC_GetSysClockFreq>:
  *
  *
  * @retval SYSCLK frequency
  */
uint32_t HAL_RCC_GetSysClockFreq(void)
{
 800b38c:	b480      	push	{r7}
 800b38e:	b089      	sub	sp, #36	@ 0x24
 800b390:	af00      	add	r7, sp, #0
  float_t fracn1, pllvco;
  uint32_t sysclockfreq;

  /* Get SYSCLK source -------------------------------------------------------*/

  switch (RCC->CFGR & RCC_CFGR_SWS)
 800b392:	4bb3      	ldr	r3, [pc, #716]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b394:	691b      	ldr	r3, [r3, #16]
 800b396:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800b39a:	2b18      	cmp	r3, #24
 800b39c:	f200 8155 	bhi.w	800b64a <HAL_RCC_GetSysClockFreq+0x2be>
 800b3a0:	a201      	add	r2, pc, #4	@ (adr r2, 800b3a8 <HAL_RCC_GetSysClockFreq+0x1c>)
 800b3a2:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b3a6:	bf00      	nop
 800b3a8:	0800b40d 	.word	0x0800b40d
 800b3ac:	0800b64b 	.word	0x0800b64b
 800b3b0:	0800b64b 	.word	0x0800b64b
 800b3b4:	0800b64b 	.word	0x0800b64b
 800b3b8:	0800b64b 	.word	0x0800b64b
 800b3bc:	0800b64b 	.word	0x0800b64b
 800b3c0:	0800b64b 	.word	0x0800b64b
 800b3c4:	0800b64b 	.word	0x0800b64b
 800b3c8:	0800b433 	.word	0x0800b433
 800b3cc:	0800b64b 	.word	0x0800b64b
 800b3d0:	0800b64b 	.word	0x0800b64b
 800b3d4:	0800b64b 	.word	0x0800b64b
 800b3d8:	0800b64b 	.word	0x0800b64b
 800b3dc:	0800b64b 	.word	0x0800b64b
 800b3e0:	0800b64b 	.word	0x0800b64b
 800b3e4:	0800b64b 	.word	0x0800b64b
 800b3e8:	0800b439 	.word	0x0800b439
 800b3ec:	0800b64b 	.word	0x0800b64b
 800b3f0:	0800b64b 	.word	0x0800b64b
 800b3f4:	0800b64b 	.word	0x0800b64b
 800b3f8:	0800b64b 	.word	0x0800b64b
 800b3fc:	0800b64b 	.word	0x0800b64b
 800b400:	0800b64b 	.word	0x0800b64b
 800b404:	0800b64b 	.word	0x0800b64b
 800b408:	0800b43f 	.word	0x0800b43f
  {
    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */

      if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800b40c:	4b94      	ldr	r3, [pc, #592]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b40e:	681b      	ldr	r3, [r3, #0]
 800b410:	f003 0320 	and.w	r3, r3, #32
 800b414:	2b00      	cmp	r3, #0
 800b416:	d009      	beq.n	800b42c <HAL_RCC_GetSysClockFreq+0xa0>
      {
        sysclockfreq = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800b418:	4b91      	ldr	r3, [pc, #580]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b41a:	681b      	ldr	r3, [r3, #0]
 800b41c:	08db      	lsrs	r3, r3, #3
 800b41e:	f003 0303 	and.w	r3, r3, #3
 800b422:	4a90      	ldr	r2, [pc, #576]	@ (800b664 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800b424:	fa22 f303 	lsr.w	r3, r2, r3
 800b428:	61bb      	str	r3, [r7, #24]
      else
      {
        sysclockfreq = (uint32_t) HSI_VALUE;
      }

      break;
 800b42a:	e111      	b.n	800b650 <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = (uint32_t) HSI_VALUE;
 800b42c:	4b8d      	ldr	r3, [pc, #564]	@ (800b664 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800b42e:	61bb      	str	r3, [r7, #24]
      break;
 800b430:	e10e      	b.n	800b650 <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_CSI:  /* CSI used as system clock  source */
      sysclockfreq = CSI_VALUE;
 800b432:	4b8d      	ldr	r3, [pc, #564]	@ (800b668 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800b434:	61bb      	str	r3, [r7, #24]
      break;
 800b436:	e10b      	b.n	800b650 <HAL_RCC_GetSysClockFreq+0x2c4>

    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
      sysclockfreq = HSE_VALUE;
 800b438:	4b8c      	ldr	r3, [pc, #560]	@ (800b66c <HAL_RCC_GetSysClockFreq+0x2e0>)
 800b43a:	61bb      	str	r3, [r7, #24]
      break;
 800b43c:	e108      	b.n	800b650 <HAL_RCC_GetSysClockFreq+0x2c4>
    case RCC_CFGR_SWS_PLL1:  /* PLL1 used as system clock  source */

      /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
      SYSCLK = PLL_VCO / PLLR
      */
      pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800b43e:	4b88      	ldr	r3, [pc, #544]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b440:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800b442:	f003 0303 	and.w	r3, r3, #3
 800b446:	617b      	str	r3, [r7, #20]
      pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4)  ;
 800b448:	4b85      	ldr	r3, [pc, #532]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b44a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800b44c:	091b      	lsrs	r3, r3, #4
 800b44e:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800b452:	613b      	str	r3, [r7, #16]
      pllfracen = ((RCC-> PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) >> RCC_PLLCFGR_PLL1FRACEN_Pos);
 800b454:	4b82      	ldr	r3, [pc, #520]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b456:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b458:	f003 0301 	and.w	r3, r3, #1
 800b45c:	60fb      	str	r3, [r7, #12]
      fracn1 = (float_t)(uint32_t)(pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1) >> 3));
 800b45e:	4b80      	ldr	r3, [pc, #512]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b460:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 800b462:	08db      	lsrs	r3, r3, #3
 800b464:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800b468:	68fa      	ldr	r2, [r7, #12]
 800b46a:	fb02 f303 	mul.w	r3, r2, r3
 800b46e:	ee07 3a90 	vmov	s15, r3
 800b472:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b476:	edc7 7a02 	vstr	s15, [r7, #8]

      if (pllm != 0U)
 800b47a:	693b      	ldr	r3, [r7, #16]
 800b47c:	2b00      	cmp	r3, #0
 800b47e:	f000 80e1 	beq.w	800b644 <HAL_RCC_GetSysClockFreq+0x2b8>
 800b482:	697b      	ldr	r3, [r7, #20]
 800b484:	2b02      	cmp	r3, #2
 800b486:	f000 8083 	beq.w	800b590 <HAL_RCC_GetSysClockFreq+0x204>
 800b48a:	697b      	ldr	r3, [r7, #20]
 800b48c:	2b02      	cmp	r3, #2
 800b48e:	f200 80a1 	bhi.w	800b5d4 <HAL_RCC_GetSysClockFreq+0x248>
 800b492:	697b      	ldr	r3, [r7, #20]
 800b494:	2b00      	cmp	r3, #0
 800b496:	d003      	beq.n	800b4a0 <HAL_RCC_GetSysClockFreq+0x114>
 800b498:	697b      	ldr	r3, [r7, #20]
 800b49a:	2b01      	cmp	r3, #1
 800b49c:	d056      	beq.n	800b54c <HAL_RCC_GetSysClockFreq+0x1c0>
 800b49e:	e099      	b.n	800b5d4 <HAL_RCC_GetSysClockFreq+0x248>
      {
        switch (pllsource)
        {
          case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

            if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800b4a0:	4b6f      	ldr	r3, [pc, #444]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b4a2:	681b      	ldr	r3, [r3, #0]
 800b4a4:	f003 0320 	and.w	r3, r3, #32
 800b4a8:	2b00      	cmp	r3, #0
 800b4aa:	d02d      	beq.n	800b508 <HAL_RCC_GetSysClockFreq+0x17c>
            {
              hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800b4ac:	4b6c      	ldr	r3, [pc, #432]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b4ae:	681b      	ldr	r3, [r3, #0]
 800b4b0:	08db      	lsrs	r3, r3, #3
 800b4b2:	f003 0303 	and.w	r3, r3, #3
 800b4b6:	4a6b      	ldr	r2, [pc, #428]	@ (800b664 <HAL_RCC_GetSysClockFreq+0x2d8>)
 800b4b8:	fa22 f303 	lsr.w	r3, r2, r3
 800b4bc:	607b      	str	r3, [r7, #4]
              pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b4be:	687b      	ldr	r3, [r7, #4]
 800b4c0:	ee07 3a90 	vmov	s15, r3
 800b4c4:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b4c8:	693b      	ldr	r3, [r7, #16]
 800b4ca:	ee07 3a90 	vmov	s15, r3
 800b4ce:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b4d2:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b4d6:	4b62      	ldr	r3, [pc, #392]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b4d8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b4da:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b4de:	ee07 3a90 	vmov	s15, r3
 800b4e2:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b4e6:	ed97 6a02 	vldr	s12, [r7, #8]
 800b4ea:	eddf 5a61 	vldr	s11, [pc, #388]	@ 800b670 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b4ee:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b4f2:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b4f6:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b4fa:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b4fe:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b502:	edc7 7a07 	vstr	s15, [r7, #28]
            }
            else
            {
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
            }
            break;
 800b506:	e087      	b.n	800b618 <HAL_RCC_GetSysClockFreq+0x28c>
              pllvco = ((float_t)HSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b508:	693b      	ldr	r3, [r7, #16]
 800b50a:	ee07 3a90 	vmov	s15, r3
 800b50e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b512:	eddf 6a58 	vldr	s13, [pc, #352]	@ 800b674 <HAL_RCC_GetSysClockFreq+0x2e8>
 800b516:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b51a:	4b51      	ldr	r3, [pc, #324]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b51c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b51e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b522:	ee07 3a90 	vmov	s15, r3
 800b526:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b52a:	ed97 6a02 	vldr	s12, [r7, #8]
 800b52e:	eddf 5a50 	vldr	s11, [pc, #320]	@ 800b670 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b532:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b536:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b53a:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b53e:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b542:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b546:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800b54a:	e065      	b.n	800b618 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b54c:	693b      	ldr	r3, [r7, #16]
 800b54e:	ee07 3a90 	vmov	s15, r3
 800b552:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b556:	eddf 6a48 	vldr	s13, [pc, #288]	@ 800b678 <HAL_RCC_GetSysClockFreq+0x2ec>
 800b55a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b55e:	4b40      	ldr	r3, [pc, #256]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b560:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b562:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b566:	ee07 3a90 	vmov	s15, r3
 800b56a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b56e:	ed97 6a02 	vldr	s12, [r7, #8]
 800b572:	eddf 5a3f 	vldr	s11, [pc, #252]	@ 800b670 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b576:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b57a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b57e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b582:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b586:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b58a:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800b58e:	e043      	b.n	800b618 <HAL_RCC_GetSysClockFreq+0x28c>

          case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
            pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b590:	693b      	ldr	r3, [r7, #16]
 800b592:	ee07 3a90 	vmov	s15, r3
 800b596:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b59a:	eddf 6a38 	vldr	s13, [pc, #224]	@ 800b67c <HAL_RCC_GetSysClockFreq+0x2f0>
 800b59e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b5a2:	4b2f      	ldr	r3, [pc, #188]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b5a4:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b5a6:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b5aa:	ee07 3a90 	vmov	s15, r3
 800b5ae:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b5b2:	ed97 6a02 	vldr	s12, [r7, #8]
 800b5b6:	eddf 5a2e 	vldr	s11, [pc, #184]	@ 800b670 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b5ba:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b5be:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b5c2:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b5c6:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b5ca:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b5ce:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800b5d2:	e021      	b.n	800b618 <HAL_RCC_GetSysClockFreq+0x28c>

          default:
            pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1 / (float_t)0x2000) + (float_t)1);
 800b5d4:	693b      	ldr	r3, [r7, #16]
 800b5d6:	ee07 3a90 	vmov	s15, r3
 800b5da:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800b5de:	eddf 6a26 	vldr	s13, [pc, #152]	@ 800b678 <HAL_RCC_GetSysClockFreq+0x2ec>
 800b5e2:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800b5e6:	4b1e      	ldr	r3, [pc, #120]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b5e8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b5ea:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800b5ee:	ee07 3a90 	vmov	s15, r3
 800b5f2:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800b5f6:	ed97 6a02 	vldr	s12, [r7, #8]
 800b5fa:	eddf 5a1d 	vldr	s11, [pc, #116]	@ 800b670 <HAL_RCC_GetSysClockFreq+0x2e4>
 800b5fe:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800b602:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800b606:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800b60a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800b60e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800b612:	edc7 7a07 	vstr	s15, [r7, #28]
            break;
 800b616:	bf00      	nop
        }
        pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >> 9) + 1U) ;
 800b618:	4b11      	ldr	r3, [pc, #68]	@ (800b660 <HAL_RCC_GetSysClockFreq+0x2d4>)
 800b61a:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 800b61c:	0a5b      	lsrs	r3, r3, #9
 800b61e:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800b622:	3301      	adds	r3, #1
 800b624:	603b      	str	r3, [r7, #0]
        sysclockfreq = (uint32_t)(float_t)(pllvco / (float_t)pllp);
 800b626:	683b      	ldr	r3, [r7, #0]
 800b628:	ee07 3a90 	vmov	s15, r3
 800b62c:	eeb8 7a67 	vcvt.f32.u32	s14, s15
 800b630:	edd7 6a07 	vldr	s13, [r7, #28]
 800b634:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800b638:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800b63c:	ee17 3a90 	vmov	r3, s15
 800b640:	61bb      	str	r3, [r7, #24]
      }
      else
      {
        sysclockfreq = 0U;
      }
      break;
 800b642:	e005      	b.n	800b650 <HAL_RCC_GetSysClockFreq+0x2c4>
        sysclockfreq = 0U;
 800b644:	2300      	movs	r3, #0
 800b646:	61bb      	str	r3, [r7, #24]
      break;
 800b648:	e002      	b.n	800b650 <HAL_RCC_GetSysClockFreq+0x2c4>

    default:
      sysclockfreq = CSI_VALUE;
 800b64a:	4b07      	ldr	r3, [pc, #28]	@ (800b668 <HAL_RCC_GetSysClockFreq+0x2dc>)
 800b64c:	61bb      	str	r3, [r7, #24]
      break;
 800b64e:	bf00      	nop
  }

  return sysclockfreq;
 800b650:	69bb      	ldr	r3, [r7, #24]
}
 800b652:	4618      	mov	r0, r3
 800b654:	3724      	adds	r7, #36	@ 0x24
 800b656:	46bd      	mov	sp, r7
 800b658:	f85d 7b04 	ldr.w	r7, [sp], #4
 800b65c:	4770      	bx	lr
 800b65e:	bf00      	nop
 800b660:	58024400 	.word	0x58024400
 800b664:	03d09000 	.word	0x03d09000
 800b668:	003d0900 	.word	0x003d0900
 800b66c:	017d7840 	.word	0x017d7840
 800b670:	46000000 	.word	0x46000000
 800b674:	4c742400 	.word	0x4c742400
 800b678:	4a742400 	.word	0x4a742400
 800b67c:	4bbebc20 	.word	0x4bbebc20

0800b680 <HAL_RCC_GetHCLKFreq>:
  * @note   The SystemD2Clock CMSIS variable is used to store System domain2 Clock Frequency
  *         and updated within this function
  * @retval HCLK frequency
  */
uint32_t HAL_RCC_GetHCLKFreq(void)
{
 800b680:	b580      	push	{r7, lr}
 800b682:	b082      	sub	sp, #8
 800b684:	af00      	add	r7, sp, #0
  uint32_t common_system_clock;

#if defined(RCC_D1CFGR_D1CPRE)
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE) >> RCC_D1CFGR_D1CPRE_Pos] & 0x1FU);
 800b686:	f7ff fe81 	bl	800b38c <HAL_RCC_GetSysClockFreq>
 800b68a:	4602      	mov	r2, r0
 800b68c:	4b10      	ldr	r3, [pc, #64]	@ (800b6d0 <HAL_RCC_GetHCLKFreq+0x50>)
 800b68e:	699b      	ldr	r3, [r3, #24]
 800b690:	0a1b      	lsrs	r3, r3, #8
 800b692:	f003 030f 	and.w	r3, r3, #15
 800b696:	490f      	ldr	r1, [pc, #60]	@ (800b6d4 <HAL_RCC_GetHCLKFreq+0x54>)
 800b698:	5ccb      	ldrb	r3, [r1, r3]
 800b69a:	f003 031f 	and.w	r3, r3, #31
 800b69e:	fa22 f303 	lsr.w	r3, r2, r3
 800b6a2:	607b      	str	r3, [r7, #4]
#else
  common_system_clock = HAL_RCC_GetSysClockFreq() >> (D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE) >> RCC_CDCFGR1_CDCPRE_Pos] & 0x1FU);
#endif

#if defined(RCC_D1CFGR_HPRE)
  SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE) >> RCC_D1CFGR_HPRE_Pos]) & 0x1FU));
 800b6a4:	4b0a      	ldr	r3, [pc, #40]	@ (800b6d0 <HAL_RCC_GetHCLKFreq+0x50>)
 800b6a6:	699b      	ldr	r3, [r3, #24]
 800b6a8:	f003 030f 	and.w	r3, r3, #15
 800b6ac:	4a09      	ldr	r2, [pc, #36]	@ (800b6d4 <HAL_RCC_GetHCLKFreq+0x54>)
 800b6ae:	5cd3      	ldrb	r3, [r2, r3]
 800b6b0:	f003 031f 	and.w	r3, r3, #31
 800b6b4:	687a      	ldr	r2, [r7, #4]
 800b6b6:	fa22 f303 	lsr.w	r3, r2, r3
 800b6ba:	4a07      	ldr	r2, [pc, #28]	@ (800b6d8 <HAL_RCC_GetHCLKFreq+0x58>)
 800b6bc:	6013      	str	r3, [r2, #0]
#endif

#if defined(DUAL_CORE) && defined(CORE_CM4)
  SystemCoreClock = SystemD2Clock;
#else
  SystemCoreClock = common_system_clock;
 800b6be:	4a07      	ldr	r2, [pc, #28]	@ (800b6dc <HAL_RCC_GetHCLKFreq+0x5c>)
 800b6c0:	687b      	ldr	r3, [r7, #4]
 800b6c2:	6013      	str	r3, [r2, #0]
#endif /* DUAL_CORE && CORE_CM4 */

  return SystemD2Clock;
 800b6c4:	4b04      	ldr	r3, [pc, #16]	@ (800b6d8 <HAL_RCC_GetHCLKFreq+0x58>)
 800b6c6:	681b      	ldr	r3, [r3, #0]
}
 800b6c8:	4618      	mov	r0, r3
 800b6ca:	3708      	adds	r7, #8
 800b6cc:	46bd      	mov	sp, r7
 800b6ce:	bd80      	pop	{r7, pc}
 800b6d0:	58024400 	.word	0x58024400
 800b6d4:	08031d0c 	.word	0x08031d0c
 800b6d8:	24000010 	.word	0x24000010
 800b6dc:	2400000c 	.word	0x2400000c

0800b6e0 <HAL_RCC_GetPCLK1Freq>:
  * @note   Each time PCLK1 changes, this function must be called to update the
  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
 800b6e0:	b580      	push	{r7, lr}
 800b6e2:	af00      	add	r7, sp, #0
#if defined (RCC_D2CFGR_D2PPRE1)
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1) >> RCC_D2CFGR_D2PPRE1_Pos]) & 0x1FU));
 800b6e4:	f7ff ffcc 	bl	800b680 <HAL_RCC_GetHCLKFreq>
 800b6e8:	4602      	mov	r2, r0
 800b6ea:	4b06      	ldr	r3, [pc, #24]	@ (800b704 <HAL_RCC_GetPCLK1Freq+0x24>)
 800b6ec:	69db      	ldr	r3, [r3, #28]
 800b6ee:	091b      	lsrs	r3, r3, #4
 800b6f0:	f003 0307 	and.w	r3, r3, #7
 800b6f4:	4904      	ldr	r1, [pc, #16]	@ (800b708 <HAL_RCC_GetPCLK1Freq+0x28>)
 800b6f6:	5ccb      	ldrb	r3, [r1, r3]
 800b6f8:	f003 031f 	and.w	r3, r3, #31
 800b6fc:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE1) >> RCC_CDCFGR2_CDPPRE1_Pos]) & 0x1FU));
#endif
}
 800b700:	4618      	mov	r0, r3
 800b702:	bd80      	pop	{r7, pc}
 800b704:	58024400 	.word	0x58024400
 800b708:	08031d0c 	.word	0x08031d0c

0800b70c <HAL_RCC_GetPCLK2Freq>:
  * @note   Each time PCLK2 changes, this function must be called to update the
  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
 800b70c:	b580      	push	{r7, lr}
 800b70e:	af00      	add	r7, sp, #0
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
#if defined(RCC_D2CFGR_D2PPRE2)
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2) >> RCC_D2CFGR_D2PPRE2_Pos]) & 0x1FU));
 800b710:	f7ff ffb6 	bl	800b680 <HAL_RCC_GetHCLKFreq>
 800b714:	4602      	mov	r2, r0
 800b716:	4b06      	ldr	r3, [pc, #24]	@ (800b730 <HAL_RCC_GetPCLK2Freq+0x24>)
 800b718:	69db      	ldr	r3, [r3, #28]
 800b71a:	0a1b      	lsrs	r3, r3, #8
 800b71c:	f003 0307 	and.w	r3, r3, #7
 800b720:	4904      	ldr	r1, [pc, #16]	@ (800b734 <HAL_RCC_GetPCLK2Freq+0x28>)
 800b722:	5ccb      	ldrb	r3, [r1, r3]
 800b724:	f003 031f 	and.w	r3, r3, #31
 800b728:	fa22 f303 	lsr.w	r3, r2, r3
#else
  return (HAL_RCC_GetHCLKFreq() >> ((D1CorePrescTable[(RCC->CDCFGR2 & RCC_CDCFGR2_CDPPRE2) >> RCC_CDCFGR2_CDPPRE2_Pos]) & 0x1FU));
#endif
}
 800b72c:	4618      	mov	r0, r3
 800b72e:	bd80      	pop	{r7, pc}
 800b730:	58024400 	.word	0x58024400
 800b734:	08031d0c 	.word	0x08031d0c

0800b738 <HAL_RCC_GetClockConfig>:
  * will be configured.
  * @param  pFLatency: Pointer on the Flash Latency.
  * @retval None
  */
void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
{
 800b738:	b480      	push	{r7}
 800b73a:	b083      	sub	sp, #12
 800b73c:	af00      	add	r7, sp, #0
 800b73e:	6078      	str	r0, [r7, #4]
 800b740:	6039      	str	r1, [r7, #0]
  /* Set all possible values for the Clock type parameter --------------------*/
  RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 |
 800b742:	687b      	ldr	r3, [r7, #4]
 800b744:	223f      	movs	r2, #63	@ 0x3f
 800b746:	601a      	str	r2, [r3, #0]
                                 RCC_CLOCKTYPE_PCLK2 |  RCC_CLOCKTYPE_D3PCLK1  ;

  /* Get the SYSCLK configuration --------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
 800b748:	4b1a      	ldr	r3, [pc, #104]	@ (800b7b4 <HAL_RCC_GetClockConfig+0x7c>)
 800b74a:	691b      	ldr	r3, [r3, #16]
 800b74c:	f003 0207 	and.w	r2, r3, #7
 800b750:	687b      	ldr	r3, [r7, #4]
 800b752:	605a      	str	r2, [r3, #4]

#if defined(RCC_D1CFGR_D1CPRE)
  /* Get the SYSCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->SYSCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1CPRE);
 800b754:	4b17      	ldr	r3, [pc, #92]	@ (800b7b4 <HAL_RCC_GetClockConfig+0x7c>)
 800b756:	699b      	ldr	r3, [r3, #24]
 800b758:	f403 6270 	and.w	r2, r3, #3840	@ 0xf00
 800b75c:	687b      	ldr	r3, [r7, #4]
 800b75e:	609a      	str	r2, [r3, #8]

  /* Get the D1HCLK configuration ----------------------------------------------*/
  RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_HPRE);
 800b760:	4b14      	ldr	r3, [pc, #80]	@ (800b7b4 <HAL_RCC_GetClockConfig+0x7c>)
 800b762:	699b      	ldr	r3, [r3, #24]
 800b764:	f003 020f 	and.w	r2, r3, #15
 800b768:	687b      	ldr	r3, [r7, #4]
 800b76a:	60da      	str	r2, [r3, #12]

  /* Get the APB3 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB3CLKDivider = (uint32_t)(RCC->D1CFGR & RCC_D1CFGR_D1PPRE);
 800b76c:	4b11      	ldr	r3, [pc, #68]	@ (800b7b4 <HAL_RCC_GetClockConfig+0x7c>)
 800b76e:	699b      	ldr	r3, [r3, #24]
 800b770:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800b774:	687b      	ldr	r3, [r7, #4]
 800b776:	611a      	str	r2, [r3, #16]

  /* Get the APB1 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE1);
 800b778:	4b0e      	ldr	r3, [pc, #56]	@ (800b7b4 <HAL_RCC_GetClockConfig+0x7c>)
 800b77a:	69db      	ldr	r3, [r3, #28]
 800b77c:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800b780:	687b      	ldr	r3, [r7, #4]
 800b782:	615a      	str	r2, [r3, #20]

  /* Get the APB2 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)(RCC->D2CFGR & RCC_D2CFGR_D2PPRE2);
 800b784:	4b0b      	ldr	r3, [pc, #44]	@ (800b7b4 <HAL_RCC_GetClockConfig+0x7c>)
 800b786:	69db      	ldr	r3, [r3, #28]
 800b788:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 800b78c:	687b      	ldr	r3, [r7, #4]
 800b78e:	619a      	str	r2, [r3, #24]

  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->D3CFGR & RCC_D3CFGR_D3PPRE);
 800b790:	4b08      	ldr	r3, [pc, #32]	@ (800b7b4 <HAL_RCC_GetClockConfig+0x7c>)
 800b792:	6a1b      	ldr	r3, [r3, #32]
 800b794:	f003 0270 	and.w	r2, r3, #112	@ 0x70
 800b798:	687b      	ldr	r3, [r7, #4]
 800b79a:	61da      	str	r2, [r3, #28]
  /* Get the APB4 configuration ----------------------------------------------*/
  RCC_ClkInitStruct->APB4CLKDivider = (uint32_t)(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE);
#endif

  /* Get the Flash Wait State (Latency) configuration ------------------------*/
  *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
 800b79c:	4b06      	ldr	r3, [pc, #24]	@ (800b7b8 <HAL_RCC_GetClockConfig+0x80>)
 800b79e:	681b      	ldr	r3, [r3, #0]
 800b7a0:	f003 020f 	and.w	r2, r3, #15
 800b7a4:	683b      	ldr	r3, [r7, #0]
 800b7a6:	601a      	str	r2, [r3, #0]
}
 800b7a8:	bf00      	nop
 800b7aa:	370c      	adds	r7, #12
 800b7ac:	46bd      	mov	sp, r7
 800b7ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 800b7b2:	4770      	bx	lr
 800b7b4:	58024400 	.word	0x58024400
 800b7b8:	52002000 	.word	0x52002000

0800b7bc <HAL_RCCEx_PeriphCLKConfig>:
  * (*) : Available on some STM32H7 lines only.
  *
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
{
 800b7bc:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800b7c0:	b0c8      	sub	sp, #288	@ 0x120
 800b7c2:	af00      	add	r7, sp, #0
 800b7c4:	f8c7 010c 	str.w	r0, [r7, #268]	@ 0x10c
  uint32_t tmpreg;
  uint32_t tickstart;
  HAL_StatusTypeDef ret = HAL_OK;      /* Intermediate status */
 800b7c8:	2300      	movs	r3, #0
 800b7ca:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  HAL_StatusTypeDef status = HAL_OK;   /* Final status */
 800b7ce:	2300      	movs	r3, #0
 800b7d0:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

  /*---------------------------- SPDIFRX configuration -------------------------------*/

  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
 800b7d4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7d8:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b7dc:	f002 6400 	and.w	r4, r2, #134217728	@ 0x8000000
 800b7e0:	2500      	movs	r5, #0
 800b7e2:	ea54 0305 	orrs.w	r3, r4, r5
 800b7e6:	d049      	beq.n	800b87c <HAL_RCCEx_PeriphCLKConfig+0xc0>
  {

    switch (PeriphClkInit->SpdifrxClockSelection)
 800b7e8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b7ec:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800b7ee:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800b7f2:	d02f      	beq.n	800b854 <HAL_RCCEx_PeriphCLKConfig+0x98>
 800b7f4:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800b7f8:	d828      	bhi.n	800b84c <HAL_RCCEx_PeriphCLKConfig+0x90>
 800b7fa:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800b7fe:	d01a      	beq.n	800b836 <HAL_RCCEx_PeriphCLKConfig+0x7a>
 800b800:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800b804:	d822      	bhi.n	800b84c <HAL_RCCEx_PeriphCLKConfig+0x90>
 800b806:	2b00      	cmp	r3, #0
 800b808:	d003      	beq.n	800b812 <HAL_RCCEx_PeriphCLKConfig+0x56>
 800b80a:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800b80e:	d007      	beq.n	800b820 <HAL_RCCEx_PeriphCLKConfig+0x64>
 800b810:	e01c      	b.n	800b84c <HAL_RCCEx_PeriphCLKConfig+0x90>
    {
      case RCC_SPDIFRXCLKSOURCE_PLL:      /* PLL is used as clock source for SPDIFRX*/
        /* Enable PLL1Q Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b812:	4bb8      	ldr	r3, [pc, #736]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b814:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b816:	4ab7      	ldr	r2, [pc, #732]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b818:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b81c:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800b81e:	e01a      	b.n	800b856 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL2: /* PLL2 is used as clock source for SPDIFRX*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800b820:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b824:	3308      	adds	r3, #8
 800b826:	2102      	movs	r1, #2
 800b828:	4618      	mov	r0, r3
 800b82a:	f001 fc73 	bl	800d114 <RCCEx_PLL2_Config>
 800b82e:	4603      	mov	r3, r0
 800b830:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800b834:	e00f      	b.n	800b856 <HAL_RCCEx_PeriphCLKConfig+0x9a>

      case RCC_SPDIFRXCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPDIFRX*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800b836:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b83a:	3328      	adds	r3, #40	@ 0x28
 800b83c:	2102      	movs	r1, #2
 800b83e:	4618      	mov	r0, r3
 800b840:	f001 fd1a 	bl	800d278 <RCCEx_PLL3_Config>
 800b844:	4603      	mov	r3, r0
 800b846:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPDIFRX clock source configuration done later after clock selection check */
        break;
 800b84a:	e004      	b.n	800b856 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        /* Internal OSC clock is used as source of SPDIFRX clock*/
        /* SPDIFRX clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b84c:	2301      	movs	r3, #1
 800b84e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b852:	e000      	b.n	800b856 <HAL_RCCEx_PeriphCLKConfig+0x9a>
        break;
 800b854:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b856:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b85a:	2b00      	cmp	r3, #0
 800b85c:	d10a      	bne.n	800b874 <HAL_RCCEx_PeriphCLKConfig+0xb8>
    {
      /* Set the source of SPDIFRX clock*/
      __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifrxClockSelection);
 800b85e:	4ba5      	ldr	r3, [pc, #660]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b860:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b862:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800b866:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b86a:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 800b86c:	4aa1      	ldr	r2, [pc, #644]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b86e:	430b      	orrs	r3, r1
 800b870:	6513      	str	r3, [r2, #80]	@ 0x50
 800b872:	e003      	b.n	800b87c <HAL_RCCEx_PeriphCLKConfig+0xc0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b874:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b878:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SAI1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
 800b87c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b880:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b884:	f402 7880 	and.w	r8, r2, #256	@ 0x100
 800b888:	f04f 0900 	mov.w	r9, #0
 800b88c:	ea58 0309 	orrs.w	r3, r8, r9
 800b890:	d047      	beq.n	800b922 <HAL_RCCEx_PeriphCLKConfig+0x166>
  {
    switch (PeriphClkInit->Sai1ClockSelection)
 800b892:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b896:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b898:	2b04      	cmp	r3, #4
 800b89a:	d82a      	bhi.n	800b8f2 <HAL_RCCEx_PeriphCLKConfig+0x136>
 800b89c:	a201      	add	r2, pc, #4	@ (adr r2, 800b8a4 <HAL_RCCEx_PeriphCLKConfig+0xe8>)
 800b89e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800b8a2:	bf00      	nop
 800b8a4:	0800b8b9 	.word	0x0800b8b9
 800b8a8:	0800b8c7 	.word	0x0800b8c7
 800b8ac:	0800b8dd 	.word	0x0800b8dd
 800b8b0:	0800b8fb 	.word	0x0800b8fb
 800b8b4:	0800b8fb 	.word	0x0800b8fb
    {
      case RCC_SAI1CLKSOURCE_PLL:      /* PLL is used as clock source for SAI1*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b8b8:	4b8e      	ldr	r3, [pc, #568]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b8ba:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b8bc:	4a8d      	ldr	r2, [pc, #564]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b8be:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b8c2:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b8c4:	e01a      	b.n	800b8fc <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b8c6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8ca:	3308      	adds	r3, #8
 800b8cc:	2100      	movs	r1, #0
 800b8ce:	4618      	mov	r0, r3
 800b8d0:	f001 fc20 	bl	800d114 <RCCEx_PLL2_Config>
 800b8d4:	4603      	mov	r3, r0
 800b8d6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b8da:	e00f      	b.n	800b8fc <HAL_RCCEx_PeriphCLKConfig+0x140>

      case RCC_SAI1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b8dc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b8e0:	3328      	adds	r3, #40	@ 0x28
 800b8e2:	2100      	movs	r1, #0
 800b8e4:	4618      	mov	r0, r3
 800b8e6:	f001 fcc7 	bl	800d278 <RCCEx_PLL3_Config>
 800b8ea:	4603      	mov	r3, r0
 800b8ec:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800b8f0:	e004      	b.n	800b8fc <HAL_RCCEx_PeriphCLKConfig+0x140>
        /* HSI, HSE, or CSI oscillator is used as source of SAI1 clock */
        /* SAI1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b8f2:	2301      	movs	r3, #1
 800b8f4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b8f8:	e000      	b.n	800b8fc <HAL_RCCEx_PeriphCLKConfig+0x140>
        break;
 800b8fa:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b8fc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b900:	2b00      	cmp	r3, #0
 800b902:	d10a      	bne.n	800b91a <HAL_RCCEx_PeriphCLKConfig+0x15e>
    {
      /* Set the source of SAI1 clock*/
      __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
 800b904:	4b7b      	ldr	r3, [pc, #492]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b906:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b908:	f023 0107 	bic.w	r1, r3, #7
 800b90c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b910:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800b912:	4a78      	ldr	r2, [pc, #480]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b914:	430b      	orrs	r3, r1
 800b916:	6513      	str	r3, [r2, #80]	@ 0x50
 800b918:	e003      	b.n	800b922 <HAL_RCCEx_PeriphCLKConfig+0x166>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b91a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b91e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

#if defined(SAI3)
  /*---------------------------- SAI2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI23) == RCC_PERIPHCLK_SAI23)
 800b922:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b926:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b92a:	f402 7a00 	and.w	sl, r2, #512	@ 0x200
 800b92e:	f04f 0b00 	mov.w	fp, #0
 800b932:	ea5a 030b 	orrs.w	r3, sl, fp
 800b936:	d04c      	beq.n	800b9d2 <HAL_RCCEx_PeriphCLKConfig+0x216>
  {
    switch (PeriphClkInit->Sai23ClockSelection)
 800b938:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b93c:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800b93e:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b942:	d030      	beq.n	800b9a6 <HAL_RCCEx_PeriphCLKConfig+0x1ea>
 800b944:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800b948:	d829      	bhi.n	800b99e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800b94a:	2bc0      	cmp	r3, #192	@ 0xc0
 800b94c:	d02d      	beq.n	800b9aa <HAL_RCCEx_PeriphCLKConfig+0x1ee>
 800b94e:	2bc0      	cmp	r3, #192	@ 0xc0
 800b950:	d825      	bhi.n	800b99e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800b952:	2b80      	cmp	r3, #128	@ 0x80
 800b954:	d018      	beq.n	800b988 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
 800b956:	2b80      	cmp	r3, #128	@ 0x80
 800b958:	d821      	bhi.n	800b99e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
 800b95a:	2b00      	cmp	r3, #0
 800b95c:	d002      	beq.n	800b964 <HAL_RCCEx_PeriphCLKConfig+0x1a8>
 800b95e:	2b40      	cmp	r3, #64	@ 0x40
 800b960:	d007      	beq.n	800b972 <HAL_RCCEx_PeriphCLKConfig+0x1b6>
 800b962:	e01c      	b.n	800b99e <HAL_RCCEx_PeriphCLKConfig+0x1e2>
    {
      case RCC_SAI23CLKSOURCE_PLL:      /* PLL is used as clock source for SAI2/3 */
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800b964:	4b63      	ldr	r3, [pc, #396]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b966:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800b968:	4a62      	ldr	r2, [pc, #392]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b96a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800b96e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800b970:	e01c      	b.n	800b9ac <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2/3 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800b972:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b976:	3308      	adds	r3, #8
 800b978:	2100      	movs	r1, #0
 800b97a:	4618      	mov	r0, r3
 800b97c:	f001 fbca 	bl	800d114 <RCCEx_PLL2_Config>
 800b980:	4603      	mov	r3, r0
 800b982:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800b986:	e011      	b.n	800b9ac <HAL_RCCEx_PeriphCLKConfig+0x1f0>

      case RCC_SAI23CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800b988:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b98c:	3328      	adds	r3, #40	@ 0x28
 800b98e:	2100      	movs	r1, #0
 800b990:	4618      	mov	r0, r3
 800b992:	f001 fc71 	bl	800d278 <RCCEx_PLL3_Config>
 800b996:	4603      	mov	r3, r0
 800b998:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2/3 clock source configuration done later after clock selection check */
        break;
 800b99c:	e006      	b.n	800b9ac <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        /* HSI, HSE, or CSI oscillator is used as source of SAI2/3 clock */
        /* SAI2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800b99e:	2301      	movs	r3, #1
 800b9a0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800b9a4:	e002      	b.n	800b9ac <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800b9a6:	bf00      	nop
 800b9a8:	e000      	b.n	800b9ac <HAL_RCCEx_PeriphCLKConfig+0x1f0>
        break;
 800b9aa:	bf00      	nop
    }

    if (ret == HAL_OK)
 800b9ac:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b9b0:	2b00      	cmp	r3, #0
 800b9b2:	d10a      	bne.n	800b9ca <HAL_RCCEx_PeriphCLKConfig+0x20e>
    {
      /* Set the source of SAI2/3 clock*/
      __HAL_RCC_SAI23_CONFIG(PeriphClkInit->Sai23ClockSelection);
 800b9b4:	4b4f      	ldr	r3, [pc, #316]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b9b6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800b9b8:	f423 71e0 	bic.w	r1, r3, #448	@ 0x1c0
 800b9bc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9c0:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 800b9c2:	4a4c      	ldr	r2, [pc, #304]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800b9c4:	430b      	orrs	r3, r1
 800b9c6:	6513      	str	r3, [r2, #80]	@ 0x50
 800b9c8:	e003      	b.n	800b9d2 <HAL_RCCEx_PeriphCLKConfig+0x216>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800b9ca:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800b9ce:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI2B*/

#if defined(SAI4)
  /*---------------------------- SAI4A configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4A) == RCC_PERIPHCLK_SAI4A)
 800b9d2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9d6:	e9d3 2300 	ldrd	r2, r3, [r3]
 800b9da:	f402 6380 	and.w	r3, r2, #1024	@ 0x400
 800b9de:	f8c7 3100 	str.w	r3, [r7, #256]	@ 0x100
 800b9e2:	2300      	movs	r3, #0
 800b9e4:	f8c7 3104 	str.w	r3, [r7, #260]	@ 0x104
 800b9e8:	e9d7 1240 	ldrd	r1, r2, [r7, #256]	@ 0x100
 800b9ec:	460b      	mov	r3, r1
 800b9ee:	4313      	orrs	r3, r2
 800b9f0:	d053      	beq.n	800ba9a <HAL_RCCEx_PeriphCLKConfig+0x2de>
  {
    switch (PeriphClkInit->Sai4AClockSelection)
 800b9f2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800b9f6:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800b9fa:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800b9fe:	d035      	beq.n	800ba6c <HAL_RCCEx_PeriphCLKConfig+0x2b0>
 800ba00:	f5b3 0f00 	cmp.w	r3, #8388608	@ 0x800000
 800ba04:	d82e      	bhi.n	800ba64 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800ba06:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800ba0a:	d031      	beq.n	800ba70 <HAL_RCCEx_PeriphCLKConfig+0x2b4>
 800ba0c:	f5b3 0fc0 	cmp.w	r3, #6291456	@ 0x600000
 800ba10:	d828      	bhi.n	800ba64 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800ba12:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800ba16:	d01a      	beq.n	800ba4e <HAL_RCCEx_PeriphCLKConfig+0x292>
 800ba18:	f5b3 0f80 	cmp.w	r3, #4194304	@ 0x400000
 800ba1c:	d822      	bhi.n	800ba64 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
 800ba1e:	2b00      	cmp	r3, #0
 800ba20:	d003      	beq.n	800ba2a <HAL_RCCEx_PeriphCLKConfig+0x26e>
 800ba22:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800ba26:	d007      	beq.n	800ba38 <HAL_RCCEx_PeriphCLKConfig+0x27c>
 800ba28:	e01c      	b.n	800ba64 <HAL_RCCEx_PeriphCLKConfig+0x2a8>
    {
      case RCC_SAI4ACLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800ba2a:	4b32      	ldr	r3, [pc, #200]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ba2c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ba2e:	4a31      	ldr	r2, [pc, #196]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ba30:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800ba34:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800ba36:	e01c      	b.n	800ba72 <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800ba38:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba3c:	3308      	adds	r3, #8
 800ba3e:	2100      	movs	r1, #0
 800ba40:	4618      	mov	r0, r3
 800ba42:	f001 fb67 	bl	800d114 <RCCEx_PLL2_Config>
 800ba46:	4603      	mov	r3, r0
 800ba48:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800ba4c:	e011      	b.n	800ba72 <HAL_RCCEx_PeriphCLKConfig+0x2b6>

      case RCC_SAI4ACLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800ba4e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba52:	3328      	adds	r3, #40	@ 0x28
 800ba54:	2100      	movs	r1, #0
 800ba56:	4618      	mov	r0, r3
 800ba58:	f001 fc0e 	bl	800d278 <RCCEx_PLL3_Config>
 800ba5c:	4603      	mov	r3, r0
 800ba5e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800ba62:	e006      	b.n	800ba72 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        /* SAI4A clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800ba64:	2301      	movs	r3, #1
 800ba66:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800ba6a:	e002      	b.n	800ba72 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800ba6c:	bf00      	nop
 800ba6e:	e000      	b.n	800ba72 <HAL_RCCEx_PeriphCLKConfig+0x2b6>
        break;
 800ba70:	bf00      	nop
    }

    if (ret == HAL_OK)
 800ba72:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ba76:	2b00      	cmp	r3, #0
 800ba78:	d10b      	bne.n	800ba92 <HAL_RCCEx_PeriphCLKConfig+0x2d6>
    {
      /* Set the source of SAI4A clock*/
      __HAL_RCC_SAI4A_CONFIG(PeriphClkInit->Sai4AClockSelection);
 800ba7a:	4b1e      	ldr	r3, [pc, #120]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ba7c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800ba7e:	f423 0160 	bic.w	r1, r3, #14680064	@ 0xe00000
 800ba82:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba86:	f8d3 30a8 	ldr.w	r3, [r3, #168]	@ 0xa8
 800ba8a:	4a1a      	ldr	r2, [pc, #104]	@ (800baf4 <HAL_RCCEx_PeriphCLKConfig+0x338>)
 800ba8c:	430b      	orrs	r3, r1
 800ba8e:	6593      	str	r3, [r2, #88]	@ 0x58
 800ba90:	e003      	b.n	800ba9a <HAL_RCCEx_PeriphCLKConfig+0x2de>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ba92:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ba96:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  /*---------------------------- SAI4B configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI4B) == RCC_PERIPHCLK_SAI4B)
 800ba9a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ba9e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800baa2:	f402 6300 	and.w	r3, r2, #2048	@ 0x800
 800baa6:	f8c7 30f8 	str.w	r3, [r7, #248]	@ 0xf8
 800baaa:	2300      	movs	r3, #0
 800baac:	f8c7 30fc 	str.w	r3, [r7, #252]	@ 0xfc
 800bab0:	e9d7 123e 	ldrd	r1, r2, [r7, #248]	@ 0xf8
 800bab4:	460b      	mov	r3, r1
 800bab6:	4313      	orrs	r3, r2
 800bab8:	d056      	beq.n	800bb68 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
  {
    switch (PeriphClkInit->Sai4BClockSelection)
 800baba:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800babe:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800bac2:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800bac6:	d038      	beq.n	800bb3a <HAL_RCCEx_PeriphCLKConfig+0x37e>
 800bac8:	f1b3 6f80 	cmp.w	r3, #67108864	@ 0x4000000
 800bacc:	d831      	bhi.n	800bb32 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800bace:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800bad2:	d034      	beq.n	800bb3e <HAL_RCCEx_PeriphCLKConfig+0x382>
 800bad4:	f1b3 7f40 	cmp.w	r3, #50331648	@ 0x3000000
 800bad8:	d82b      	bhi.n	800bb32 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800bada:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800bade:	d01d      	beq.n	800bb1c <HAL_RCCEx_PeriphCLKConfig+0x360>
 800bae0:	f1b3 7f00 	cmp.w	r3, #33554432	@ 0x2000000
 800bae4:	d825      	bhi.n	800bb32 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800bae6:	2b00      	cmp	r3, #0
 800bae8:	d006      	beq.n	800baf8 <HAL_RCCEx_PeriphCLKConfig+0x33c>
 800baea:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 800baee:	d00a      	beq.n	800bb06 <HAL_RCCEx_PeriphCLKConfig+0x34a>
 800baf0:	e01f      	b.n	800bb32 <HAL_RCCEx_PeriphCLKConfig+0x376>
 800baf2:	bf00      	nop
 800baf4:	58024400 	.word	0x58024400
    {
      case RCC_SAI4BCLKSOURCE_PLL:      /* PLL is used as clock source for SAI2*/
        /* Enable SAI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800baf8:	4ba2      	ldr	r3, [pc, #648]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bafa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bafc:	4aa1      	ldr	r2, [pc, #644]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bafe:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bb02:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800bb04:	e01c      	b.n	800bb40 <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL2: /* PLL2 is used as clock source for SAI2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800bb06:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb0a:	3308      	adds	r3, #8
 800bb0c:	2100      	movs	r1, #0
 800bb0e:	4618      	mov	r0, r3
 800bb10:	f001 fb00 	bl	800d114 <RCCEx_PLL2_Config>
 800bb14:	4603      	mov	r3, r0
 800bb16:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI2 clock source configuration done later after clock selection check */
        break;
 800bb1a:	e011      	b.n	800bb40 <HAL_RCCEx_PeriphCLKConfig+0x384>

      case RCC_SAI4BCLKSOURCE_PLL3:  /* PLL3 is used as clock source for SAI2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800bb1c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb20:	3328      	adds	r3, #40	@ 0x28
 800bb22:	2100      	movs	r1, #0
 800bb24:	4618      	mov	r0, r3
 800bb26:	f001 fba7 	bl	800d278 <RCCEx_PLL3_Config>
 800bb2a:	4603      	mov	r3, r0
 800bb2c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SAI1 clock source configuration done later after clock selection check */
        break;
 800bb30:	e006      	b.n	800bb40 <HAL_RCCEx_PeriphCLKConfig+0x384>
        /* SAI4B clock source configuration done later after clock selection check */
        break;
#endif /* RCC_VER_3_0 */

      default:
        ret = HAL_ERROR;
 800bb32:	2301      	movs	r3, #1
 800bb34:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bb38:	e002      	b.n	800bb40 <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800bb3a:	bf00      	nop
 800bb3c:	e000      	b.n	800bb40 <HAL_RCCEx_PeriphCLKConfig+0x384>
        break;
 800bb3e:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bb40:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bb44:	2b00      	cmp	r3, #0
 800bb46:	d10b      	bne.n	800bb60 <HAL_RCCEx_PeriphCLKConfig+0x3a4>
    {
      /* Set the source of SAI4B clock*/
      __HAL_RCC_SAI4B_CONFIG(PeriphClkInit->Sai4BClockSelection);
 800bb48:	4b8e      	ldr	r3, [pc, #568]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bb4a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800bb4c:	f023 61e0 	bic.w	r1, r3, #117440512	@ 0x7000000
 800bb50:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb54:	f8d3 30ac 	ldr.w	r3, [r3, #172]	@ 0xac
 800bb58:	4a8a      	ldr	r2, [pc, #552]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bb5a:	430b      	orrs	r3, r1
 800bb5c:	6593      	str	r3, [r2, #88]	@ 0x58
 800bb5e:	e003      	b.n	800bb68 <HAL_RCCEx_PeriphCLKConfig+0x3ac>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bb60:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bb64:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif  /*SAI4*/

#if defined(QUADSPI)
  /*---------------------------- QSPI configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_QSPI) == RCC_PERIPHCLK_QSPI)
 800bb68:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb6c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bb70:	f002 7300 	and.w	r3, r2, #33554432	@ 0x2000000
 800bb74:	f8c7 30f0 	str.w	r3, [r7, #240]	@ 0xf0
 800bb78:	2300      	movs	r3, #0
 800bb7a:	f8c7 30f4 	str.w	r3, [r7, #244]	@ 0xf4
 800bb7e:	e9d7 123c 	ldrd	r1, r2, [r7, #240]	@ 0xf0
 800bb82:	460b      	mov	r3, r1
 800bb84:	4313      	orrs	r3, r2
 800bb86:	d03a      	beq.n	800bbfe <HAL_RCCEx_PeriphCLKConfig+0x442>
  {
    switch (PeriphClkInit->QspiClockSelection)
 800bb88:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bb8c:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800bb8e:	2b30      	cmp	r3, #48	@ 0x30
 800bb90:	d01f      	beq.n	800bbd2 <HAL_RCCEx_PeriphCLKConfig+0x416>
 800bb92:	2b30      	cmp	r3, #48	@ 0x30
 800bb94:	d819      	bhi.n	800bbca <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800bb96:	2b20      	cmp	r3, #32
 800bb98:	d00c      	beq.n	800bbb4 <HAL_RCCEx_PeriphCLKConfig+0x3f8>
 800bb9a:	2b20      	cmp	r3, #32
 800bb9c:	d815      	bhi.n	800bbca <HAL_RCCEx_PeriphCLKConfig+0x40e>
 800bb9e:	2b00      	cmp	r3, #0
 800bba0:	d019      	beq.n	800bbd6 <HAL_RCCEx_PeriphCLKConfig+0x41a>
 800bba2:	2b10      	cmp	r3, #16
 800bba4:	d111      	bne.n	800bbca <HAL_RCCEx_PeriphCLKConfig+0x40e>
    {
      case RCC_QSPICLKSOURCE_PLL:      /* PLL is used as clock source for QSPI*/
        /* Enable QSPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800bba6:	4b77      	ldr	r3, [pc, #476]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bba8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bbaa:	4a76      	ldr	r2, [pc, #472]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bbac:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bbb0:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800bbb2:	e011      	b.n	800bbd8 <HAL_RCCEx_PeriphCLKConfig+0x41c>

      case RCC_QSPICLKSOURCE_PLL2: /* PLL2 is used as clock source for QSPI*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800bbb4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bbb8:	3308      	adds	r3, #8
 800bbba:	2102      	movs	r1, #2
 800bbbc:	4618      	mov	r0, r3
 800bbbe:	f001 faa9 	bl	800d114 <RCCEx_PLL2_Config>
 800bbc2:	4603      	mov	r3, r0
 800bbc4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* QSPI clock source configuration done later after clock selection check */
        break;
 800bbc8:	e006      	b.n	800bbd8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
      case RCC_QSPICLKSOURCE_D1HCLK:
        /* Domain1 HCLK  clock selected as QSPI kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800bbca:	2301      	movs	r3, #1
 800bbcc:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bbd0:	e002      	b.n	800bbd8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800bbd2:	bf00      	nop
 800bbd4:	e000      	b.n	800bbd8 <HAL_RCCEx_PeriphCLKConfig+0x41c>
        break;
 800bbd6:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bbd8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bbdc:	2b00      	cmp	r3, #0
 800bbde:	d10a      	bne.n	800bbf6 <HAL_RCCEx_PeriphCLKConfig+0x43a>
    {
      /* Set the source of QSPI clock*/
      __HAL_RCC_QSPI_CONFIG(PeriphClkInit->QspiClockSelection);
 800bbe0:	4b68      	ldr	r3, [pc, #416]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bbe2:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800bbe4:	f023 0130 	bic.w	r1, r3, #48	@ 0x30
 800bbe8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bbec:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800bbee:	4a65      	ldr	r2, [pc, #404]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bbf0:	430b      	orrs	r3, r1
 800bbf2:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800bbf4:	e003      	b.n	800bbfe <HAL_RCCEx_PeriphCLKConfig+0x442>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bbf6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bbfa:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif  /*OCTOSPI*/

  /*---------------------------- SPI1/2/3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI123) == RCC_PERIPHCLK_SPI123)
 800bbfe:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc02:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bc06:	f402 5380 	and.w	r3, r2, #4096	@ 0x1000
 800bc0a:	f8c7 30e8 	str.w	r3, [r7, #232]	@ 0xe8
 800bc0e:	2300      	movs	r3, #0
 800bc10:	f8c7 30ec 	str.w	r3, [r7, #236]	@ 0xec
 800bc14:	e9d7 123a 	ldrd	r1, r2, [r7, #232]	@ 0xe8
 800bc18:	460b      	mov	r3, r1
 800bc1a:	4313      	orrs	r3, r2
 800bc1c:	d051      	beq.n	800bcc2 <HAL_RCCEx_PeriphCLKConfig+0x506>
  {
    switch (PeriphClkInit->Spi123ClockSelection)
 800bc1e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc22:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800bc24:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800bc28:	d035      	beq.n	800bc96 <HAL_RCCEx_PeriphCLKConfig+0x4da>
 800bc2a:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800bc2e:	d82e      	bhi.n	800bc8e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800bc30:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800bc34:	d031      	beq.n	800bc9a <HAL_RCCEx_PeriphCLKConfig+0x4de>
 800bc36:	f5b3 5f40 	cmp.w	r3, #12288	@ 0x3000
 800bc3a:	d828      	bhi.n	800bc8e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800bc3c:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800bc40:	d01a      	beq.n	800bc78 <HAL_RCCEx_PeriphCLKConfig+0x4bc>
 800bc42:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800bc46:	d822      	bhi.n	800bc8e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
 800bc48:	2b00      	cmp	r3, #0
 800bc4a:	d003      	beq.n	800bc54 <HAL_RCCEx_PeriphCLKConfig+0x498>
 800bc4c:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800bc50:	d007      	beq.n	800bc62 <HAL_RCCEx_PeriphCLKConfig+0x4a6>
 800bc52:	e01c      	b.n	800bc8e <HAL_RCCEx_PeriphCLKConfig+0x4d2>
    {
      case RCC_SPI123CLKSOURCE_PLL:      /* PLL is used as clock source for SPI1/2/3 */
        /* Enable SPI Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800bc54:	4b4b      	ldr	r3, [pc, #300]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bc56:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bc58:	4a4a      	ldr	r2, [pc, #296]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bc5a:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bc5e:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800bc60:	e01c      	b.n	800bc9c <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800bc62:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc66:	3308      	adds	r3, #8
 800bc68:	2100      	movs	r1, #0
 800bc6a:	4618      	mov	r0, r3
 800bc6c:	f001 fa52 	bl	800d114 <RCCEx_PLL2_Config>
 800bc70:	4603      	mov	r3, r0
 800bc72:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800bc76:	e011      	b.n	800bc9c <HAL_RCCEx_PeriphCLKConfig+0x4e0>

      case RCC_SPI123CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI1/2/3 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800bc78:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bc7c:	3328      	adds	r3, #40	@ 0x28
 800bc7e:	2100      	movs	r1, #0
 800bc80:	4618      	mov	r0, r3
 800bc82:	f001 faf9 	bl	800d278 <RCCEx_PLL3_Config>
 800bc86:	4603      	mov	r3, r0
 800bc88:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;
 800bc8c:	e006      	b.n	800bc9c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        /* HSI, HSE, or CSI oscillator is used as source of SPI1/2/3 clock */
        /* SPI1/2/3 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bc8e:	2301      	movs	r3, #1
 800bc90:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bc94:	e002      	b.n	800bc9c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800bc96:	bf00      	nop
 800bc98:	e000      	b.n	800bc9c <HAL_RCCEx_PeriphCLKConfig+0x4e0>
        break;
 800bc9a:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bc9c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bca0:	2b00      	cmp	r3, #0
 800bca2:	d10a      	bne.n	800bcba <HAL_RCCEx_PeriphCLKConfig+0x4fe>
    {
      /* Set the source of SPI1/2/3 clock*/
      __HAL_RCC_SPI123_CONFIG(PeriphClkInit->Spi123ClockSelection);
 800bca4:	4b37      	ldr	r3, [pc, #220]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bca6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bca8:	f423 41e0 	bic.w	r1, r3, #28672	@ 0x7000
 800bcac:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bcb0:	6e1b      	ldr	r3, [r3, #96]	@ 0x60
 800bcb2:	4a34      	ldr	r2, [pc, #208]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bcb4:	430b      	orrs	r3, r1
 800bcb6:	6513      	str	r3, [r2, #80]	@ 0x50
 800bcb8:	e003      	b.n	800bcc2 <HAL_RCCEx_PeriphCLKConfig+0x506>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bcba:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bcbe:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI4/5 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI45) == RCC_PERIPHCLK_SPI45)
 800bcc2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bcc6:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bcca:	f402 5300 	and.w	r3, r2, #8192	@ 0x2000
 800bcce:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
 800bcd2:	2300      	movs	r3, #0
 800bcd4:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
 800bcd8:	e9d7 1238 	ldrd	r1, r2, [r7, #224]	@ 0xe0
 800bcdc:	460b      	mov	r3, r1
 800bcde:	4313      	orrs	r3, r2
 800bce0:	d056      	beq.n	800bd90 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
  {
    switch (PeriphClkInit->Spi45ClockSelection)
 800bce2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bce6:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800bce8:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800bcec:	d033      	beq.n	800bd56 <HAL_RCCEx_PeriphCLKConfig+0x59a>
 800bcee:	f5b3 2fa0 	cmp.w	r3, #327680	@ 0x50000
 800bcf2:	d82c      	bhi.n	800bd4e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800bcf4:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800bcf8:	d02f      	beq.n	800bd5a <HAL_RCCEx_PeriphCLKConfig+0x59e>
 800bcfa:	f5b3 2f80 	cmp.w	r3, #262144	@ 0x40000
 800bcfe:	d826      	bhi.n	800bd4e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800bd00:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800bd04:	d02b      	beq.n	800bd5e <HAL_RCCEx_PeriphCLKConfig+0x5a2>
 800bd06:	f5b3 3f40 	cmp.w	r3, #196608	@ 0x30000
 800bd0a:	d820      	bhi.n	800bd4e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800bd0c:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800bd10:	d012      	beq.n	800bd38 <HAL_RCCEx_PeriphCLKConfig+0x57c>
 800bd12:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800bd16:	d81a      	bhi.n	800bd4e <HAL_RCCEx_PeriphCLKConfig+0x592>
 800bd18:	2b00      	cmp	r3, #0
 800bd1a:	d022      	beq.n	800bd62 <HAL_RCCEx_PeriphCLKConfig+0x5a6>
 800bd1c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800bd20:	d115      	bne.n	800bd4e <HAL_RCCEx_PeriphCLKConfig+0x592>
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI45CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI4/5 */

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800bd22:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd26:	3308      	adds	r3, #8
 800bd28:	2101      	movs	r1, #1
 800bd2a:	4618      	mov	r0, r3
 800bd2c:	f001 f9f2 	bl	800d114 <RCCEx_PLL2_Config>
 800bd30:	4603      	mov	r3, r0
 800bd32:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800bd36:	e015      	b.n	800bd64 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
      case RCC_SPI45CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800bd38:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd3c:	3328      	adds	r3, #40	@ 0x28
 800bd3e:	2101      	movs	r1, #1
 800bd40:	4618      	mov	r0, r3
 800bd42:	f001 fa99 	bl	800d278 <RCCEx_PLL3_Config>
 800bd46:	4603      	mov	r3, r0
 800bd48:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;
 800bd4c:	e00a      	b.n	800bd64 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        /* HSE,  oscillator is used as source of SPI4/5 clock */
        /* SPI4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bd4e:	2301      	movs	r3, #1
 800bd50:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bd54:	e006      	b.n	800bd64 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800bd56:	bf00      	nop
 800bd58:	e004      	b.n	800bd64 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800bd5a:	bf00      	nop
 800bd5c:	e002      	b.n	800bd64 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800bd5e:	bf00      	nop
 800bd60:	e000      	b.n	800bd64 <HAL_RCCEx_PeriphCLKConfig+0x5a8>
        break;
 800bd62:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bd64:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bd68:	2b00      	cmp	r3, #0
 800bd6a:	d10d      	bne.n	800bd88 <HAL_RCCEx_PeriphCLKConfig+0x5cc>
    {
      /* Set the source of SPI4/5 clock*/
      __HAL_RCC_SPI45_CONFIG(PeriphClkInit->Spi45ClockSelection);
 800bd6c:	4b05      	ldr	r3, [pc, #20]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bd6e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bd70:	f423 21e0 	bic.w	r1, r3, #458752	@ 0x70000
 800bd74:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd78:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800bd7a:	4a02      	ldr	r2, [pc, #8]	@ (800bd84 <HAL_RCCEx_PeriphCLKConfig+0x5c8>)
 800bd7c:	430b      	orrs	r3, r1
 800bd7e:	6513      	str	r3, [r2, #80]	@ 0x50
 800bd80:	e006      	b.n	800bd90 <HAL_RCCEx_PeriphCLKConfig+0x5d4>
 800bd82:	bf00      	nop
 800bd84:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bd88:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bd8c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- SPI6 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPI6) == RCC_PERIPHCLK_SPI6)
 800bd90:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bd94:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bd98:	f402 4380 	and.w	r3, r2, #16384	@ 0x4000
 800bd9c:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
 800bda0:	2300      	movs	r3, #0
 800bda2:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc
 800bda6:	e9d7 1236 	ldrd	r1, r2, [r7, #216]	@ 0xd8
 800bdaa:	460b      	mov	r3, r1
 800bdac:	4313      	orrs	r3, r2
 800bdae:	d055      	beq.n	800be5c <HAL_RCCEx_PeriphCLKConfig+0x6a0>
  {
    switch (PeriphClkInit->Spi6ClockSelection)
 800bdb0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdb4:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800bdb8:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800bdbc:	d033      	beq.n	800be26 <HAL_RCCEx_PeriphCLKConfig+0x66a>
 800bdbe:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800bdc2:	d82c      	bhi.n	800be1e <HAL_RCCEx_PeriphCLKConfig+0x662>
 800bdc4:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800bdc8:	d02f      	beq.n	800be2a <HAL_RCCEx_PeriphCLKConfig+0x66e>
 800bdca:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800bdce:	d826      	bhi.n	800be1e <HAL_RCCEx_PeriphCLKConfig+0x662>
 800bdd0:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800bdd4:	d02b      	beq.n	800be2e <HAL_RCCEx_PeriphCLKConfig+0x672>
 800bdd6:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800bdda:	d820      	bhi.n	800be1e <HAL_RCCEx_PeriphCLKConfig+0x662>
 800bddc:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800bde0:	d012      	beq.n	800be08 <HAL_RCCEx_PeriphCLKConfig+0x64c>
 800bde2:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800bde6:	d81a      	bhi.n	800be1e <HAL_RCCEx_PeriphCLKConfig+0x662>
 800bde8:	2b00      	cmp	r3, #0
 800bdea:	d022      	beq.n	800be32 <HAL_RCCEx_PeriphCLKConfig+0x676>
 800bdec:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800bdf0:	d115      	bne.n	800be1e <HAL_RCCEx_PeriphCLKConfig+0x662>
        /* SPI6 clock source configuration done later after clock selection check */
        break;

      case RCC_SPI6CLKSOURCE_PLL2: /* PLL2 is used as clock source for SPI6*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800bdf2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bdf6:	3308      	adds	r3, #8
 800bdf8:	2101      	movs	r1, #1
 800bdfa:	4618      	mov	r0, r3
 800bdfc:	f001 f98a 	bl	800d114 <RCCEx_PLL2_Config>
 800be00:	4603      	mov	r3, r0
 800be02:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800be06:	e015      	b.n	800be34 <HAL_RCCEx_PeriphCLKConfig+0x678>
      case RCC_SPI6CLKSOURCE_PLL3:  /* PLL3 is used as clock source for SPI6*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800be08:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be0c:	3328      	adds	r3, #40	@ 0x28
 800be0e:	2101      	movs	r1, #1
 800be10:	4618      	mov	r0, r3
 800be12:	f001 fa31 	bl	800d278 <RCCEx_PLL3_Config>
 800be16:	4603      	mov	r3, r0
 800be18:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* SPI6 clock source configuration done later after clock selection check */
        break;
 800be1c:	e00a      	b.n	800be34 <HAL_RCCEx_PeriphCLKConfig+0x678>
        /* SPI6 clock source configuration done later after clock selection check */
        break;
#endif

      default:
        ret = HAL_ERROR;
 800be1e:	2301      	movs	r3, #1
 800be20:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800be24:	e006      	b.n	800be34 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800be26:	bf00      	nop
 800be28:	e004      	b.n	800be34 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800be2a:	bf00      	nop
 800be2c:	e002      	b.n	800be34 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800be2e:	bf00      	nop
 800be30:	e000      	b.n	800be34 <HAL_RCCEx_PeriphCLKConfig+0x678>
        break;
 800be32:	bf00      	nop
    }

    if (ret == HAL_OK)
 800be34:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be38:	2b00      	cmp	r3, #0
 800be3a:	d10b      	bne.n	800be54 <HAL_RCCEx_PeriphCLKConfig+0x698>
    {
      /* Set the source of SPI6 clock*/
      __HAL_RCC_SPI6_CONFIG(PeriphClkInit->Spi6ClockSelection);
 800be3c:	4ba3      	ldr	r3, [pc, #652]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800be3e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800be40:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800be44:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be48:	f8d3 30b0 	ldr.w	r3, [r3, #176]	@ 0xb0
 800be4c:	4a9f      	ldr	r2, [pc, #636]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800be4e:	430b      	orrs	r3, r1
 800be50:	6593      	str	r3, [r2, #88]	@ 0x58
 800be52:	e003      	b.n	800be5c <HAL_RCCEx_PeriphCLKConfig+0x6a0>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800be54:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800be58:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
  }
#endif /*DSI*/

#if defined(FDCAN1) || defined(FDCAN2)
  /*---------------------------- FDCAN configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FDCAN) == RCC_PERIPHCLK_FDCAN)
 800be5c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be60:	e9d3 2300 	ldrd	r2, r3, [r3]
 800be64:	f402 4300 	and.w	r3, r2, #32768	@ 0x8000
 800be68:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800be6c:	2300      	movs	r3, #0
 800be6e:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
 800be72:	e9d7 1234 	ldrd	r1, r2, [r7, #208]	@ 0xd0
 800be76:	460b      	mov	r3, r1
 800be78:	4313      	orrs	r3, r2
 800be7a:	d037      	beq.n	800beec <HAL_RCCEx_PeriphCLKConfig+0x730>
  {
    switch (PeriphClkInit->FdcanClockSelection)
 800be7c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800be80:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800be82:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800be86:	d00e      	beq.n	800bea6 <HAL_RCCEx_PeriphCLKConfig+0x6ea>
 800be88:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800be8c:	d816      	bhi.n	800bebc <HAL_RCCEx_PeriphCLKConfig+0x700>
 800be8e:	2b00      	cmp	r3, #0
 800be90:	d018      	beq.n	800bec4 <HAL_RCCEx_PeriphCLKConfig+0x708>
 800be92:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800be96:	d111      	bne.n	800bebc <HAL_RCCEx_PeriphCLKConfig+0x700>
    {
      case RCC_FDCANCLKSOURCE_PLL:      /* PLL is used as clock source for FDCAN*/
        /* Enable FDCAN Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800be98:	4b8c      	ldr	r3, [pc, #560]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800be9a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800be9c:	4a8b      	ldr	r2, [pc, #556]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800be9e:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bea2:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800bea4:	e00f      	b.n	800bec6 <HAL_RCCEx_PeriphCLKConfig+0x70a>

      case RCC_FDCANCLKSOURCE_PLL2: /* PLL2 is used as clock source for FDCAN*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800bea6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800beaa:	3308      	adds	r3, #8
 800beac:	2101      	movs	r1, #1
 800beae:	4618      	mov	r0, r3
 800beb0:	f001 f930 	bl	800d114 <RCCEx_PLL2_Config>
 800beb4:	4603      	mov	r3, r0
 800beb6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FDCAN clock source configuration done later after clock selection check */
        break;
 800beba:	e004      	b.n	800bec6 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        /* HSE is used as clock source for FDCAN*/
        /* FDCAN clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800bebc:	2301      	movs	r3, #1
 800bebe:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bec2:	e000      	b.n	800bec6 <HAL_RCCEx_PeriphCLKConfig+0x70a>
        break;
 800bec4:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bec6:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800beca:	2b00      	cmp	r3, #0
 800becc:	d10a      	bne.n	800bee4 <HAL_RCCEx_PeriphCLKConfig+0x728>
    {
      /* Set the source of FDCAN clock*/
      __HAL_RCC_FDCAN_CONFIG(PeriphClkInit->FdcanClockSelection);
 800bece:	4b7f      	ldr	r3, [pc, #508]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bed0:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800bed2:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800bed6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800beda:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800bedc:	4a7b      	ldr	r2, [pc, #492]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bede:	430b      	orrs	r3, r1
 800bee0:	6513      	str	r3, [r2, #80]	@ 0x50
 800bee2:	e003      	b.n	800beec <HAL_RCCEx_PeriphCLKConfig+0x730>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bee4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bee8:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /*FDCAN1 || FDCAN2*/

  /*---------------------------- FMC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMC) == RCC_PERIPHCLK_FMC)
 800beec:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bef0:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bef4:	f002 7380 	and.w	r3, r2, #16777216	@ 0x1000000
 800bef8:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800befc:	2300      	movs	r3, #0
 800befe:	f8c7 30cc 	str.w	r3, [r7, #204]	@ 0xcc
 800bf02:	e9d7 1232 	ldrd	r1, r2, [r7, #200]	@ 0xc8
 800bf06:	460b      	mov	r3, r1
 800bf08:	4313      	orrs	r3, r2
 800bf0a:	d039      	beq.n	800bf80 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
  {
    switch (PeriphClkInit->FmcClockSelection)
 800bf0c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf10:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800bf12:	2b03      	cmp	r3, #3
 800bf14:	d81c      	bhi.n	800bf50 <HAL_RCCEx_PeriphCLKConfig+0x794>
 800bf16:	a201      	add	r2, pc, #4	@ (adr r2, 800bf1c <HAL_RCCEx_PeriphCLKConfig+0x760>)
 800bf18:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800bf1c:	0800bf59 	.word	0x0800bf59
 800bf20:	0800bf2d 	.word	0x0800bf2d
 800bf24:	0800bf3b 	.word	0x0800bf3b
 800bf28:	0800bf59 	.word	0x0800bf59
    {
      case RCC_FMCCLKSOURCE_PLL:      /* PLL is used as clock source for FMC*/
        /* Enable FMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800bf2c:	4b67      	ldr	r3, [pc, #412]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bf2e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800bf30:	4a66      	ldr	r2, [pc, #408]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bf32:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800bf36:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* FMC clock source configuration done later after clock selection check */
        break;
 800bf38:	e00f      	b.n	800bf5a <HAL_RCCEx_PeriphCLKConfig+0x79e>

      case RCC_FMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for FMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800bf3a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf3e:	3308      	adds	r3, #8
 800bf40:	2102      	movs	r1, #2
 800bf42:	4618      	mov	r0, r3
 800bf44:	f001 f8e6 	bl	800d114 <RCCEx_PLL2_Config>
 800bf48:	4603      	mov	r3, r0
 800bf4a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* FMC clock source configuration done later after clock selection check */
        break;
 800bf4e:	e004      	b.n	800bf5a <HAL_RCCEx_PeriphCLKConfig+0x79e>
      case RCC_FMCCLKSOURCE_HCLK:
        /* D1/CD HCLK  clock selected as FMC kernel peripheral clock */
        break;

      default:
        ret = HAL_ERROR;
 800bf50:	2301      	movs	r3, #1
 800bf52:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bf56:	e000      	b.n	800bf5a <HAL_RCCEx_PeriphCLKConfig+0x79e>
        break;
 800bf58:	bf00      	nop
    }

    if (ret == HAL_OK)
 800bf5a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bf5e:	2b00      	cmp	r3, #0
 800bf60:	d10a      	bne.n	800bf78 <HAL_RCCEx_PeriphCLKConfig+0x7bc>
    {
      /* Set the source of FMC clock*/
      __HAL_RCC_FMC_CONFIG(PeriphClkInit->FmcClockSelection);
 800bf62:	4b5a      	ldr	r3, [pc, #360]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bf64:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800bf66:	f023 0103 	bic.w	r1, r3, #3
 800bf6a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf6e:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 800bf70:	4a56      	ldr	r2, [pc, #344]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bf72:	430b      	orrs	r3, r1
 800bf74:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800bf76:	e003      	b.n	800bf80 <HAL_RCCEx_PeriphCLKConfig+0x7c4>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800bf78:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bf7c:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- RTC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
 800bf80:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bf84:	e9d3 2300 	ldrd	r2, r3, [r3]
 800bf88:	f402 0380 	and.w	r3, r2, #4194304	@ 0x400000
 800bf8c:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800bf90:	2300      	movs	r3, #0
 800bf92:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800bf96:	e9d7 1230 	ldrd	r1, r2, [r7, #192]	@ 0xc0
 800bf9a:	460b      	mov	r3, r1
 800bf9c:	4313      	orrs	r3, r2
 800bf9e:	f000 809f 	beq.w	800c0e0 <HAL_RCCEx_PeriphCLKConfig+0x924>
  {
    /* check for RTC Parameters used to output RTCCLK */
    assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));

    /* Enable write access to Backup domain */
    SET_BIT(PWR->CR1, PWR_CR1_DBP);
 800bfa2:	4b4b      	ldr	r3, [pc, #300]	@ (800c0d0 <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800bfa4:	681b      	ldr	r3, [r3, #0]
 800bfa6:	4a4a      	ldr	r2, [pc, #296]	@ (800c0d0 <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800bfa8:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800bfac:	6013      	str	r3, [r2, #0]

    /* Wait for Backup domain Write protection disable */
    tickstart = HAL_GetTick();
 800bfae:	f7f9 fd23 	bl	80059f8 <HAL_GetTick>
 800bfb2:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800bfb6:	e00b      	b.n	800bfd0 <HAL_RCCEx_PeriphCLKConfig+0x814>
    {
      if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 800bfb8:	f7f9 fd1e 	bl	80059f8 <HAL_GetTick>
 800bfbc:	4602      	mov	r2, r0
 800bfbe:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800bfc2:	1ad3      	subs	r3, r2, r3
 800bfc4:	2b64      	cmp	r3, #100	@ 0x64
 800bfc6:	d903      	bls.n	800bfd0 <HAL_RCCEx_PeriphCLKConfig+0x814>
      {
        ret = HAL_TIMEOUT;
 800bfc8:	2303      	movs	r3, #3
 800bfca:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800bfce:	e005      	b.n	800bfdc <HAL_RCCEx_PeriphCLKConfig+0x820>
    while ((PWR->CR1 & PWR_CR1_DBP) == 0U)
 800bfd0:	4b3f      	ldr	r3, [pc, #252]	@ (800c0d0 <HAL_RCCEx_PeriphCLKConfig+0x914>)
 800bfd2:	681b      	ldr	r3, [r3, #0]
 800bfd4:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800bfd8:	2b00      	cmp	r3, #0
 800bfda:	d0ed      	beq.n	800bfb8 <HAL_RCCEx_PeriphCLKConfig+0x7fc>
      }
    }

    if (ret == HAL_OK)
 800bfdc:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800bfe0:	2b00      	cmp	r3, #0
 800bfe2:	d179      	bne.n	800c0d8 <HAL_RCCEx_PeriphCLKConfig+0x91c>
    {
      /* Reset the Backup domain only if the RTC Clock source selection is modified */
      if ((RCC->BDCR & RCC_BDCR_RTCSEL) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))
 800bfe4:	4b39      	ldr	r3, [pc, #228]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bfe6:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 800bfe8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800bfec:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800bff0:	4053      	eors	r3, r2
 800bff2:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800bff6:	2b00      	cmp	r3, #0
 800bff8:	d015      	beq.n	800c026 <HAL_RCCEx_PeriphCLKConfig+0x86a>
      {
        /* Store the content of BDCR register before the reset of Backup Domain */
        tmpreg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
 800bffa:	4b34      	ldr	r3, [pc, #208]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800bffc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800bffe:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800c002:	f8c7 3114 	str.w	r3, [r7, #276]	@ 0x114
        /* RTC Clock selection can be changed only if the Backup Domain is reset */
        __HAL_RCC_BACKUPRESET_FORCE();
 800c006:	4b31      	ldr	r3, [pc, #196]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c008:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800c00a:	4a30      	ldr	r2, [pc, #192]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c00c:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 800c010:	6713      	str	r3, [r2, #112]	@ 0x70
        __HAL_RCC_BACKUPRESET_RELEASE();
 800c012:	4b2e      	ldr	r3, [pc, #184]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c014:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800c016:	4a2d      	ldr	r2, [pc, #180]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c018:	f423 3380 	bic.w	r3, r3, #65536	@ 0x10000
 800c01c:	6713      	str	r3, [r2, #112]	@ 0x70
        /* Restore the Content of BDCR register */
        RCC->BDCR = tmpreg;
 800c01e:	4a2b      	ldr	r2, [pc, #172]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c020:	f8d7 3114 	ldr.w	r3, [r7, #276]	@ 0x114
 800c024:	6713      	str	r3, [r2, #112]	@ 0x70
      }

      /* If LSE is selected as RTC clock source (and enabled prior to Backup Domain reset), wait for LSE reactivation */
      if (PeriphClkInit->RTCClockSelection == RCC_RTCCLKSOURCE_LSE)
 800c026:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c02a:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800c02e:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800c032:	d118      	bne.n	800c066 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
      {
        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800c034:	f7f9 fce0 	bl	80059f8 <HAL_GetTick>
 800c038:	f8c7 0118 	str.w	r0, [r7, #280]	@ 0x118

        /* Wait till LSE is ready */
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800c03c:	e00d      	b.n	800c05a <HAL_RCCEx_PeriphCLKConfig+0x89e>
        {
          if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
 800c03e:	f7f9 fcdb 	bl	80059f8 <HAL_GetTick>
 800c042:	4602      	mov	r2, r0
 800c044:	f8d7 3118 	ldr.w	r3, [r7, #280]	@ 0x118
 800c048:	1ad2      	subs	r2, r2, r3
 800c04a:	f241 3388 	movw	r3, #5000	@ 0x1388
 800c04e:	429a      	cmp	r2, r3
 800c050:	d903      	bls.n	800c05a <HAL_RCCEx_PeriphCLKConfig+0x89e>
          {
            ret = HAL_TIMEOUT;
 800c052:	2303      	movs	r3, #3
 800c054:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
            break;
 800c058:	e005      	b.n	800c066 <HAL_RCCEx_PeriphCLKConfig+0x8aa>
        while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
 800c05a:	4b1c      	ldr	r3, [pc, #112]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c05c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 800c05e:	f003 0302 	and.w	r3, r3, #2
 800c062:	2b00      	cmp	r3, #0
 800c064:	d0eb      	beq.n	800c03e <HAL_RCCEx_PeriphCLKConfig+0x882>
          }
        }
      }

      if (ret == HAL_OK)
 800c066:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c06a:	2b00      	cmp	r3, #0
 800c06c:	d129      	bne.n	800c0c2 <HAL_RCCEx_PeriphCLKConfig+0x906>
      {
        __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
 800c06e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c072:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800c076:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800c07a:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800c07e:	d10e      	bne.n	800c09e <HAL_RCCEx_PeriphCLKConfig+0x8e2>
 800c080:	4b12      	ldr	r3, [pc, #72]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c082:	691b      	ldr	r3, [r3, #16]
 800c084:	f423 517c 	bic.w	r1, r3, #16128	@ 0x3f00
 800c088:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c08c:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800c090:	091a      	lsrs	r2, r3, #4
 800c092:	4b10      	ldr	r3, [pc, #64]	@ (800c0d4 <HAL_RCCEx_PeriphCLKConfig+0x918>)
 800c094:	4013      	ands	r3, r2
 800c096:	4a0d      	ldr	r2, [pc, #52]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c098:	430b      	orrs	r3, r1
 800c09a:	6113      	str	r3, [r2, #16]
 800c09c:	e005      	b.n	800c0aa <HAL_RCCEx_PeriphCLKConfig+0x8ee>
 800c09e:	4b0b      	ldr	r3, [pc, #44]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c0a0:	691b      	ldr	r3, [r3, #16]
 800c0a2:	4a0a      	ldr	r2, [pc, #40]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c0a4:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 800c0a8:	6113      	str	r3, [r2, #16]
 800c0aa:	4b08      	ldr	r3, [pc, #32]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c0ac:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 800c0ae:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c0b2:	f8d3 30b4 	ldr.w	r3, [r3, #180]	@ 0xb4
 800c0b6:	f3c3 030b 	ubfx	r3, r3, #0, #12
 800c0ba:	4a04      	ldr	r2, [pc, #16]	@ (800c0cc <HAL_RCCEx_PeriphCLKConfig+0x910>)
 800c0bc:	430b      	orrs	r3, r1
 800c0be:	6713      	str	r3, [r2, #112]	@ 0x70
 800c0c0:	e00e      	b.n	800c0e0 <HAL_RCCEx_PeriphCLKConfig+0x924>
      }
      else
      {
        /* set overall return value */
        status = ret;
 800c0c2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c0c6:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
 800c0ca:	e009      	b.n	800c0e0 <HAL_RCCEx_PeriphCLKConfig+0x924>
 800c0cc:	58024400 	.word	0x58024400
 800c0d0:	58024800 	.word	0x58024800
 800c0d4:	00ffffcf 	.word	0x00ffffcf
      }
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c0d8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c0dc:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }


  /*-------------------------- USART1/6 configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART16) == RCC_PERIPHCLK_USART16)
 800c0e0:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c0e4:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c0e8:	f002 0301 	and.w	r3, r2, #1
 800c0ec:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800c0f0:	2300      	movs	r3, #0
 800c0f2:	f8c7 30bc 	str.w	r3, [r7, #188]	@ 0xbc
 800c0f6:	e9d7 122e 	ldrd	r1, r2, [r7, #184]	@ 0xb8
 800c0fa:	460b      	mov	r3, r1
 800c0fc:	4313      	orrs	r3, r2
 800c0fe:	f000 8089 	beq.w	800c214 <HAL_RCCEx_PeriphCLKConfig+0xa58>
  {
    switch (PeriphClkInit->Usart16ClockSelection)
 800c102:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c106:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800c108:	2b28      	cmp	r3, #40	@ 0x28
 800c10a:	d86b      	bhi.n	800c1e4 <HAL_RCCEx_PeriphCLKConfig+0xa28>
 800c10c:	a201      	add	r2, pc, #4	@ (adr r2, 800c114 <HAL_RCCEx_PeriphCLKConfig+0x958>)
 800c10e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800c112:	bf00      	nop
 800c114:	0800c1ed 	.word	0x0800c1ed
 800c118:	0800c1e5 	.word	0x0800c1e5
 800c11c:	0800c1e5 	.word	0x0800c1e5
 800c120:	0800c1e5 	.word	0x0800c1e5
 800c124:	0800c1e5 	.word	0x0800c1e5
 800c128:	0800c1e5 	.word	0x0800c1e5
 800c12c:	0800c1e5 	.word	0x0800c1e5
 800c130:	0800c1e5 	.word	0x0800c1e5
 800c134:	0800c1b9 	.word	0x0800c1b9
 800c138:	0800c1e5 	.word	0x0800c1e5
 800c13c:	0800c1e5 	.word	0x0800c1e5
 800c140:	0800c1e5 	.word	0x0800c1e5
 800c144:	0800c1e5 	.word	0x0800c1e5
 800c148:	0800c1e5 	.word	0x0800c1e5
 800c14c:	0800c1e5 	.word	0x0800c1e5
 800c150:	0800c1e5 	.word	0x0800c1e5
 800c154:	0800c1cf 	.word	0x0800c1cf
 800c158:	0800c1e5 	.word	0x0800c1e5
 800c15c:	0800c1e5 	.word	0x0800c1e5
 800c160:	0800c1e5 	.word	0x0800c1e5
 800c164:	0800c1e5 	.word	0x0800c1e5
 800c168:	0800c1e5 	.word	0x0800c1e5
 800c16c:	0800c1e5 	.word	0x0800c1e5
 800c170:	0800c1e5 	.word	0x0800c1e5
 800c174:	0800c1ed 	.word	0x0800c1ed
 800c178:	0800c1e5 	.word	0x0800c1e5
 800c17c:	0800c1e5 	.word	0x0800c1e5
 800c180:	0800c1e5 	.word	0x0800c1e5
 800c184:	0800c1e5 	.word	0x0800c1e5
 800c188:	0800c1e5 	.word	0x0800c1e5
 800c18c:	0800c1e5 	.word	0x0800c1e5
 800c190:	0800c1e5 	.word	0x0800c1e5
 800c194:	0800c1ed 	.word	0x0800c1ed
 800c198:	0800c1e5 	.word	0x0800c1e5
 800c19c:	0800c1e5 	.word	0x0800c1e5
 800c1a0:	0800c1e5 	.word	0x0800c1e5
 800c1a4:	0800c1e5 	.word	0x0800c1e5
 800c1a8:	0800c1e5 	.word	0x0800c1e5
 800c1ac:	0800c1e5 	.word	0x0800c1e5
 800c1b0:	0800c1e5 	.word	0x0800c1e5
 800c1b4:	0800c1ed 	.word	0x0800c1ed
      case RCC_USART16CLKSOURCE_PCLK2: /* CD/D2 PCLK2 as clock source for USART1/6 */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      case RCC_USART16CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART1/6 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800c1b8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c1bc:	3308      	adds	r3, #8
 800c1be:	2101      	movs	r1, #1
 800c1c0:	4618      	mov	r0, r3
 800c1c2:	f000 ffa7 	bl	800d114 <RCCEx_PLL2_Config>
 800c1c6:	4603      	mov	r3, r0
 800c1c8:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800c1cc:	e00f      	b.n	800c1ee <HAL_RCCEx_PeriphCLKConfig+0xa32>

      case RCC_USART16CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART1/6 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800c1ce:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c1d2:	3328      	adds	r3, #40	@ 0x28
 800c1d4:	2101      	movs	r1, #1
 800c1d6:	4618      	mov	r0, r3
 800c1d8:	f001 f84e 	bl	800d278 <RCCEx_PLL3_Config>
 800c1dc:	4603      	mov	r3, r0
 800c1de:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART1/6 clock source configuration done later after clock selection check */
        break;
 800c1e2:	e004      	b.n	800c1ee <HAL_RCCEx_PeriphCLKConfig+0xa32>
        /* LSE,  oscillator is used as source of USART1/6 clock */
        /* USART1/6 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c1e4:	2301      	movs	r3, #1
 800c1e6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c1ea:	e000      	b.n	800c1ee <HAL_RCCEx_PeriphCLKConfig+0xa32>
        break;
 800c1ec:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c1ee:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c1f2:	2b00      	cmp	r3, #0
 800c1f4:	d10a      	bne.n	800c20c <HAL_RCCEx_PeriphCLKConfig+0xa50>
    {
      /* Set the source of USART1/6 clock */
      __HAL_RCC_USART16_CONFIG(PeriphClkInit->Usart16ClockSelection);
 800c1f6:	4bbf      	ldr	r3, [pc, #764]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c1f8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c1fa:	f023 0138 	bic.w	r1, r3, #56	@ 0x38
 800c1fe:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c202:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 800c204:	4abb      	ldr	r2, [pc, #748]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c206:	430b      	orrs	r3, r1
 800c208:	6553      	str	r3, [r2, #84]	@ 0x54
 800c20a:	e003      	b.n	800c214 <HAL_RCCEx_PeriphCLKConfig+0xa58>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c20c:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c210:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- USART2/3/4/5/7/8 Configuration --------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART234578) == RCC_PERIPHCLK_USART234578)
 800c214:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c218:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c21c:	f002 0302 	and.w	r3, r2, #2
 800c220:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800c224:	2300      	movs	r3, #0
 800c226:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800c22a:	e9d7 122c 	ldrd	r1, r2, [r7, #176]	@ 0xb0
 800c22e:	460b      	mov	r3, r1
 800c230:	4313      	orrs	r3, r2
 800c232:	d041      	beq.n	800c2b8 <HAL_RCCEx_PeriphCLKConfig+0xafc>
  {
    switch (PeriphClkInit->Usart234578ClockSelection)
 800c234:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c238:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800c23a:	2b05      	cmp	r3, #5
 800c23c:	d824      	bhi.n	800c288 <HAL_RCCEx_PeriphCLKConfig+0xacc>
 800c23e:	a201      	add	r2, pc, #4	@ (adr r2, 800c244 <HAL_RCCEx_PeriphCLKConfig+0xa88>)
 800c240:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800c244:	0800c291 	.word	0x0800c291
 800c248:	0800c25d 	.word	0x0800c25d
 800c24c:	0800c273 	.word	0x0800c273
 800c250:	0800c291 	.word	0x0800c291
 800c254:	0800c291 	.word	0x0800c291
 800c258:	0800c291 	.word	0x0800c291
      case RCC_USART234578CLKSOURCE_PCLK1: /* CD/D2 PCLK1 as clock source for USART2/3/4/5/7/8 */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      case RCC_USART234578CLKSOURCE_PLL2: /* PLL2 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800c25c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c260:	3308      	adds	r3, #8
 800c262:	2101      	movs	r1, #1
 800c264:	4618      	mov	r0, r3
 800c266:	f000 ff55 	bl	800d114 <RCCEx_PLL2_Config>
 800c26a:	4603      	mov	r3, r0
 800c26c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800c270:	e00f      	b.n	800c292 <HAL_RCCEx_PeriphCLKConfig+0xad6>

      case RCC_USART234578CLKSOURCE_PLL3: /* PLL3 is used as clock source for USART2/3/4/5/7/8 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800c272:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c276:	3328      	adds	r3, #40	@ 0x28
 800c278:	2101      	movs	r1, #1
 800c27a:	4618      	mov	r0, r3
 800c27c:	f000 fffc 	bl	800d278 <RCCEx_PLL3_Config>
 800c280:	4603      	mov	r3, r0
 800c282:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;
 800c286:	e004      	b.n	800c292 <HAL_RCCEx_PeriphCLKConfig+0xad6>
        /* LSE,  oscillator is used as source of USART2/3/4/5/7/8 clock */
        /* USART2/3/4/5/7/8 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c288:	2301      	movs	r3, #1
 800c28a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c28e:	e000      	b.n	800c292 <HAL_RCCEx_PeriphCLKConfig+0xad6>
        break;
 800c290:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c292:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c296:	2b00      	cmp	r3, #0
 800c298:	d10a      	bne.n	800c2b0 <HAL_RCCEx_PeriphCLKConfig+0xaf4>
    {
      /* Set the source of USART2/3/4/5/7/8 clock */
      __HAL_RCC_USART234578_CONFIG(PeriphClkInit->Usart234578ClockSelection);
 800c29a:	4b96      	ldr	r3, [pc, #600]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c29c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c29e:	f023 0107 	bic.w	r1, r3, #7
 800c2a2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c2a6:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800c2a8:	4a92      	ldr	r2, [pc, #584]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c2aa:	430b      	orrs	r3, r1
 800c2ac:	6553      	str	r3, [r2, #84]	@ 0x54
 800c2ae:	e003      	b.n	800c2b8 <HAL_RCCEx_PeriphCLKConfig+0xafc>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c2b0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c2b4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*-------------------------- LPUART1 Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
 800c2b8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c2bc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c2c0:	f002 0304 	and.w	r3, r2, #4
 800c2c4:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8
 800c2c8:	2300      	movs	r3, #0
 800c2ca:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800c2ce:	e9d7 122a 	ldrd	r1, r2, [r7, #168]	@ 0xa8
 800c2d2:	460b      	mov	r3, r1
 800c2d4:	4313      	orrs	r3, r2
 800c2d6:	d044      	beq.n	800c362 <HAL_RCCEx_PeriphCLKConfig+0xba6>
  {
    switch (PeriphClkInit->Lpuart1ClockSelection)
 800c2d8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c2dc:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800c2e0:	2b05      	cmp	r3, #5
 800c2e2:	d825      	bhi.n	800c330 <HAL_RCCEx_PeriphCLKConfig+0xb74>
 800c2e4:	a201      	add	r2, pc, #4	@ (adr r2, 800c2ec <HAL_RCCEx_PeriphCLKConfig+0xb30>)
 800c2e6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800c2ea:	bf00      	nop
 800c2ec:	0800c339 	.word	0x0800c339
 800c2f0:	0800c305 	.word	0x0800c305
 800c2f4:	0800c31b 	.word	0x0800c31b
 800c2f8:	0800c339 	.word	0x0800c339
 800c2fc:	0800c339 	.word	0x0800c339
 800c300:	0800c339 	.word	0x0800c339
      case RCC_LPUART1CLKSOURCE_PCLK4: /* SRD/D3 PCLK1 (PCLK4) as clock source for LPUART1 */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPUART1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPUART1 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800c304:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c308:	3308      	adds	r3, #8
 800c30a:	2101      	movs	r1, #1
 800c30c:	4618      	mov	r0, r3
 800c30e:	f000 ff01 	bl	800d114 <RCCEx_PLL2_Config>
 800c312:	4603      	mov	r3, r0
 800c314:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800c318:	e00f      	b.n	800c33a <HAL_RCCEx_PeriphCLKConfig+0xb7e>

      case RCC_LPUART1CLKSOURCE_PLL3: /* PLL3 is used as clock source for LPUART1 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800c31a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c31e:	3328      	adds	r3, #40	@ 0x28
 800c320:	2101      	movs	r1, #1
 800c322:	4618      	mov	r0, r3
 800c324:	f000 ffa8 	bl	800d278 <RCCEx_PLL3_Config>
 800c328:	4603      	mov	r3, r0
 800c32a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        /* LPUART1 clock source configuration done later after clock selection check */
        break;
 800c32e:	e004      	b.n	800c33a <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        /* LSE,  oscillator is used as source of LPUART1 clock */
        /* LPUART1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c330:	2301      	movs	r3, #1
 800c332:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c336:	e000      	b.n	800c33a <HAL_RCCEx_PeriphCLKConfig+0xb7e>
        break;
 800c338:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c33a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c33e:	2b00      	cmp	r3, #0
 800c340:	d10b      	bne.n	800c35a <HAL_RCCEx_PeriphCLKConfig+0xb9e>
    {
      /* Set the source of LPUART1 clock */
      __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
 800c342:	4b6c      	ldr	r3, [pc, #432]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c344:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800c346:	f023 0107 	bic.w	r1, r3, #7
 800c34a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c34e:	f8d3 3094 	ldr.w	r3, [r3, #148]	@ 0x94
 800c352:	4a68      	ldr	r2, [pc, #416]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c354:	430b      	orrs	r3, r1
 800c356:	6593      	str	r3, [r2, #88]	@ 0x58
 800c358:	e003      	b.n	800c362 <HAL_RCCEx_PeriphCLKConfig+0xba6>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c35a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c35e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM1 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)
 800c362:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c366:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c36a:	f002 0320 	and.w	r3, r2, #32
 800c36e:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
 800c372:	2300      	movs	r3, #0
 800c374:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
 800c378:	e9d7 1228 	ldrd	r1, r2, [r7, #160]	@ 0xa0
 800c37c:	460b      	mov	r3, r1
 800c37e:	4313      	orrs	r3, r2
 800c380:	d055      	beq.n	800c42e <HAL_RCCEx_PeriphCLKConfig+0xc72>
  {
    switch (PeriphClkInit->Lptim1ClockSelection)
 800c382:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c386:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800c38a:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800c38e:	d033      	beq.n	800c3f8 <HAL_RCCEx_PeriphCLKConfig+0xc3c>
 800c390:	f1b3 4fa0 	cmp.w	r3, #1342177280	@ 0x50000000
 800c394:	d82c      	bhi.n	800c3f0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800c396:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800c39a:	d02f      	beq.n	800c3fc <HAL_RCCEx_PeriphCLKConfig+0xc40>
 800c39c:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800c3a0:	d826      	bhi.n	800c3f0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800c3a2:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800c3a6:	d02b      	beq.n	800c400 <HAL_RCCEx_PeriphCLKConfig+0xc44>
 800c3a8:	f1b3 5f40 	cmp.w	r3, #805306368	@ 0x30000000
 800c3ac:	d820      	bhi.n	800c3f0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800c3ae:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800c3b2:	d012      	beq.n	800c3da <HAL_RCCEx_PeriphCLKConfig+0xc1e>
 800c3b4:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800c3b8:	d81a      	bhi.n	800c3f0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
 800c3ba:	2b00      	cmp	r3, #0
 800c3bc:	d022      	beq.n	800c404 <HAL_RCCEx_PeriphCLKConfig+0xc48>
 800c3be:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800c3c2:	d115      	bne.n	800c3f0 <HAL_RCCEx_PeriphCLKConfig+0xc34>
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM1CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM1*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800c3c4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c3c8:	3308      	adds	r3, #8
 800c3ca:	2100      	movs	r1, #0
 800c3cc:	4618      	mov	r0, r3
 800c3ce:	f000 fea1 	bl	800d114 <RCCEx_PLL2_Config>
 800c3d2:	4603      	mov	r3, r0
 800c3d4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800c3d8:	e015      	b.n	800c406 <HAL_RCCEx_PeriphCLKConfig+0xc4a>

      case RCC_LPTIM1CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM1*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800c3da:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c3de:	3328      	adds	r3, #40	@ 0x28
 800c3e0:	2102      	movs	r1, #2
 800c3e2:	4618      	mov	r0, r3
 800c3e4:	f000 ff48 	bl	800d278 <RCCEx_PLL3_Config>
 800c3e8:	4603      	mov	r3, r0
 800c3ea:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM1 clock source configuration done later after clock selection check */
        break;
 800c3ee:	e00a      	b.n	800c406 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM1 clock */
        /* LPTIM1 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c3f0:	2301      	movs	r3, #1
 800c3f2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c3f6:	e006      	b.n	800c406 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800c3f8:	bf00      	nop
 800c3fa:	e004      	b.n	800c406 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800c3fc:	bf00      	nop
 800c3fe:	e002      	b.n	800c406 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800c400:	bf00      	nop
 800c402:	e000      	b.n	800c406 <HAL_RCCEx_PeriphCLKConfig+0xc4a>
        break;
 800c404:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c406:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c40a:	2b00      	cmp	r3, #0
 800c40c:	d10b      	bne.n	800c426 <HAL_RCCEx_PeriphCLKConfig+0xc6a>
    {
      /* Set the source of LPTIM1 clock*/
      __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection);
 800c40e:	4b39      	ldr	r3, [pc, #228]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c410:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c412:	f023 41e0 	bic.w	r1, r3, #1879048192	@ 0x70000000
 800c416:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c41a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800c41e:	4a35      	ldr	r2, [pc, #212]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c420:	430b      	orrs	r3, r1
 800c422:	6553      	str	r3, [r2, #84]	@ 0x54
 800c424:	e003      	b.n	800c42e <HAL_RCCEx_PeriphCLKConfig+0xc72>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c426:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c42a:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == RCC_PERIPHCLK_LPTIM2)
 800c42e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c432:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c436:	f002 0340 	and.w	r3, r2, #64	@ 0x40
 800c43a:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800c43e:	2300      	movs	r3, #0
 800c440:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 800c444:	e9d7 1226 	ldrd	r1, r2, [r7, #152]	@ 0x98
 800c448:	460b      	mov	r3, r1
 800c44a:	4313      	orrs	r3, r2
 800c44c:	d058      	beq.n	800c500 <HAL_RCCEx_PeriphCLKConfig+0xd44>
  {
    switch (PeriphClkInit->Lptim2ClockSelection)
 800c44e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c452:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800c456:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800c45a:	d033      	beq.n	800c4c4 <HAL_RCCEx_PeriphCLKConfig+0xd08>
 800c45c:	f5b3 5fa0 	cmp.w	r3, #5120	@ 0x1400
 800c460:	d82c      	bhi.n	800c4bc <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800c462:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800c466:	d02f      	beq.n	800c4c8 <HAL_RCCEx_PeriphCLKConfig+0xd0c>
 800c468:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800c46c:	d826      	bhi.n	800c4bc <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800c46e:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800c472:	d02b      	beq.n	800c4cc <HAL_RCCEx_PeriphCLKConfig+0xd10>
 800c474:	f5b3 6f40 	cmp.w	r3, #3072	@ 0xc00
 800c478:	d820      	bhi.n	800c4bc <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800c47a:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800c47e:	d012      	beq.n	800c4a6 <HAL_RCCEx_PeriphCLKConfig+0xcea>
 800c480:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800c484:	d81a      	bhi.n	800c4bc <HAL_RCCEx_PeriphCLKConfig+0xd00>
 800c486:	2b00      	cmp	r3, #0
 800c488:	d022      	beq.n	800c4d0 <HAL_RCCEx_PeriphCLKConfig+0xd14>
 800c48a:	f5b3 6f80 	cmp.w	r3, #1024	@ 0x400
 800c48e:	d115      	bne.n	800c4bc <HAL_RCCEx_PeriphCLKConfig+0xd00>
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM2CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM2*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800c490:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c494:	3308      	adds	r3, #8
 800c496:	2100      	movs	r1, #0
 800c498:	4618      	mov	r0, r3
 800c49a:	f000 fe3b 	bl	800d114 <RCCEx_PLL2_Config>
 800c49e:	4603      	mov	r3, r0
 800c4a0:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800c4a4:	e015      	b.n	800c4d2 <HAL_RCCEx_PeriphCLKConfig+0xd16>

      case RCC_LPTIM2CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM2*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800c4a6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c4aa:	3328      	adds	r3, #40	@ 0x28
 800c4ac:	2102      	movs	r1, #2
 800c4ae:	4618      	mov	r0, r3
 800c4b0:	f000 fee2 	bl	800d278 <RCCEx_PLL3_Config>
 800c4b4:	4603      	mov	r3, r0
 800c4b6:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM2 clock source configuration done later after clock selection check */
        break;
 800c4ba:	e00a      	b.n	800c4d2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM2 clock */
        /* LPTIM2 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c4bc:	2301      	movs	r3, #1
 800c4be:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c4c2:	e006      	b.n	800c4d2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800c4c4:	bf00      	nop
 800c4c6:	e004      	b.n	800c4d2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800c4c8:	bf00      	nop
 800c4ca:	e002      	b.n	800c4d2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800c4cc:	bf00      	nop
 800c4ce:	e000      	b.n	800c4d2 <HAL_RCCEx_PeriphCLKConfig+0xd16>
        break;
 800c4d0:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c4d2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c4d6:	2b00      	cmp	r3, #0
 800c4d8:	d10e      	bne.n	800c4f8 <HAL_RCCEx_PeriphCLKConfig+0xd3c>
    {
      /* Set the source of LPTIM2 clock*/
      __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection);
 800c4da:	4b06      	ldr	r3, [pc, #24]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c4dc:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800c4de:	f423 51e0 	bic.w	r1, r3, #7168	@ 0x1c00
 800c4e2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c4e6:	f8d3 309c 	ldr.w	r3, [r3, #156]	@ 0x9c
 800c4ea:	4a02      	ldr	r2, [pc, #8]	@ (800c4f4 <HAL_RCCEx_PeriphCLKConfig+0xd38>)
 800c4ec:	430b      	orrs	r3, r1
 800c4ee:	6593      	str	r3, [r2, #88]	@ 0x58
 800c4f0:	e006      	b.n	800c500 <HAL_RCCEx_PeriphCLKConfig+0xd44>
 800c4f2:	bf00      	nop
 800c4f4:	58024400 	.word	0x58024400
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c4f8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c4fc:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*---------------------------- LPTIM345 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM345) == RCC_PERIPHCLK_LPTIM345)
 800c500:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c504:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c508:	f002 0380 	and.w	r3, r2, #128	@ 0x80
 800c50c:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800c510:	2300      	movs	r3, #0
 800c512:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800c516:	e9d7 1224 	ldrd	r1, r2, [r7, #144]	@ 0x90
 800c51a:	460b      	mov	r3, r1
 800c51c:	4313      	orrs	r3, r2
 800c51e:	d055      	beq.n	800c5cc <HAL_RCCEx_PeriphCLKConfig+0xe10>
  {
    switch (PeriphClkInit->Lptim345ClockSelection)
 800c520:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c524:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800c528:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800c52c:	d033      	beq.n	800c596 <HAL_RCCEx_PeriphCLKConfig+0xdda>
 800c52e:	f5b3 4f20 	cmp.w	r3, #40960	@ 0xa000
 800c532:	d82c      	bhi.n	800c58e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800c534:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800c538:	d02f      	beq.n	800c59a <HAL_RCCEx_PeriphCLKConfig+0xdde>
 800c53a:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800c53e:	d826      	bhi.n	800c58e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800c540:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800c544:	d02b      	beq.n	800c59e <HAL_RCCEx_PeriphCLKConfig+0xde2>
 800c546:	f5b3 4fc0 	cmp.w	r3, #24576	@ 0x6000
 800c54a:	d820      	bhi.n	800c58e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800c54c:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800c550:	d012      	beq.n	800c578 <HAL_RCCEx_PeriphCLKConfig+0xdbc>
 800c552:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 800c556:	d81a      	bhi.n	800c58e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
 800c558:	2b00      	cmp	r3, #0
 800c55a:	d022      	beq.n	800c5a2 <HAL_RCCEx_PeriphCLKConfig+0xde6>
 800c55c:	f5b3 5f00 	cmp.w	r3, #8192	@ 0x2000
 800c560:	d115      	bne.n	800c58e <HAL_RCCEx_PeriphCLKConfig+0xdd2>
      case RCC_LPTIM345CLKSOURCE_PCLK4:      /* SRD/D3 PCLK1 (PCLK4) as clock source for LPTIM3/4/5 */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      case RCC_LPTIM345CLKSOURCE_PLL2: /* PLL2 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800c562:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c566:	3308      	adds	r3, #8
 800c568:	2100      	movs	r1, #0
 800c56a:	4618      	mov	r0, r3
 800c56c:	f000 fdd2 	bl	800d114 <RCCEx_PLL2_Config>
 800c570:	4603      	mov	r3, r0
 800c572:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800c576:	e015      	b.n	800c5a4 <HAL_RCCEx_PeriphCLKConfig+0xde8>

      case RCC_LPTIM345CLKSOURCE_PLL3:  /* PLL3 is used as clock source for LPTIM3/4/5 */
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800c578:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c57c:	3328      	adds	r3, #40	@ 0x28
 800c57e:	2102      	movs	r1, #2
 800c580:	4618      	mov	r0, r3
 800c582:	f000 fe79 	bl	800d278 <RCCEx_PLL3_Config>
 800c586:	4603      	mov	r3, r0
 800c588:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;
 800c58c:	e00a      	b.n	800c5a4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        /* HSI, HSE, or CSI oscillator is used as source of LPTIM3/4/5 clock */
        /* LPTIM3/4/5 clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c58e:	2301      	movs	r3, #1
 800c590:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c594:	e006      	b.n	800c5a4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800c596:	bf00      	nop
 800c598:	e004      	b.n	800c5a4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800c59a:	bf00      	nop
 800c59c:	e002      	b.n	800c5a4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800c59e:	bf00      	nop
 800c5a0:	e000      	b.n	800c5a4 <HAL_RCCEx_PeriphCLKConfig+0xde8>
        break;
 800c5a2:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c5a4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c5a8:	2b00      	cmp	r3, #0
 800c5aa:	d10b      	bne.n	800c5c4 <HAL_RCCEx_PeriphCLKConfig+0xe08>
    {
      /* Set the source of LPTIM3/4/5 clock */
      __HAL_RCC_LPTIM345_CONFIG(PeriphClkInit->Lptim345ClockSelection);
 800c5ac:	4bbb      	ldr	r3, [pc, #748]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c5ae:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800c5b0:	f423 4160 	bic.w	r1, r3, #57344	@ 0xe000
 800c5b4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c5b8:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 800c5bc:	4ab7      	ldr	r2, [pc, #732]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c5be:	430b      	orrs	r3, r1
 800c5c0:	6593      	str	r3, [r2, #88]	@ 0x58
 800c5c2:	e003      	b.n	800c5cc <HAL_RCCEx_PeriphCLKConfig+0xe10>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c5c4:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c5c8:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e

    __HAL_RCC_I2C1235_CONFIG(PeriphClkInit->I2c1235ClockSelection);

  }
#else
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C123) == RCC_PERIPHCLK_I2C123)
 800c5cc:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c5d0:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c5d4:	f002 0308 	and.w	r3, r2, #8
 800c5d8:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 800c5dc:	2300      	movs	r3, #0
 800c5de:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800c5e2:	e9d7 1222 	ldrd	r1, r2, [r7, #136]	@ 0x88
 800c5e6:	460b      	mov	r3, r1
 800c5e8:	4313      	orrs	r3, r2
 800c5ea:	d01e      	beq.n	800c62a <HAL_RCCEx_PeriphCLKConfig+0xe6e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C123CLKSOURCE(PeriphClkInit->I2c123ClockSelection));

    if ((PeriphClkInit->I2c123ClockSelection) == RCC_I2C123CLKSOURCE_PLL3)
 800c5ec:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c5f0:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800c5f4:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800c5f8:	d10c      	bne.n	800c614 <HAL_RCCEx_PeriphCLKConfig+0xe58>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800c5fa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c5fe:	3328      	adds	r3, #40	@ 0x28
 800c600:	2102      	movs	r1, #2
 800c602:	4618      	mov	r0, r3
 800c604:	f000 fe38 	bl	800d278 <RCCEx_PLL3_Config>
 800c608:	4603      	mov	r3, r0
 800c60a:	2b00      	cmp	r3, #0
 800c60c:	d002      	beq.n	800c614 <HAL_RCCEx_PeriphCLKConfig+0xe58>
      {
        status = HAL_ERROR;
 800c60e:	2301      	movs	r3, #1
 800c610:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C123_CONFIG(PeriphClkInit->I2c123ClockSelection);
 800c614:	4ba1      	ldr	r3, [pc, #644]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c616:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c618:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800c61c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c620:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 800c624:	4a9d      	ldr	r2, [pc, #628]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c626:	430b      	orrs	r3, r1
 800c628:	6553      	str	r3, [r2, #84]	@ 0x54

  }
#endif /* I2C5 */

  /*------------------------------ I2C4 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C4) == RCC_PERIPHCLK_I2C4)
 800c62a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c62e:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c632:	f002 0310 	and.w	r3, r2, #16
 800c636:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800c63a:	2300      	movs	r3, #0
 800c63c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800c640:	e9d7 1220 	ldrd	r1, r2, [r7, #128]	@ 0x80
 800c644:	460b      	mov	r3, r1
 800c646:	4313      	orrs	r3, r2
 800c648:	d01e      	beq.n	800c688 <HAL_RCCEx_PeriphCLKConfig+0xecc>
  {
    /* Check the parameters */
    assert_param(IS_RCC_I2C4CLKSOURCE(PeriphClkInit->I2c4ClockSelection));

    if ((PeriphClkInit->I2c4ClockSelection) == RCC_I2C4CLKSOURCE_PLL3)
 800c64a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c64e:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800c652:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800c656:	d10c      	bne.n	800c672 <HAL_RCCEx_PeriphCLKConfig+0xeb6>
    {
      if (RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE) != HAL_OK)
 800c658:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c65c:	3328      	adds	r3, #40	@ 0x28
 800c65e:	2102      	movs	r1, #2
 800c660:	4618      	mov	r0, r3
 800c662:	f000 fe09 	bl	800d278 <RCCEx_PLL3_Config>
 800c666:	4603      	mov	r3, r0
 800c668:	2b00      	cmp	r3, #0
 800c66a:	d002      	beq.n	800c672 <HAL_RCCEx_PeriphCLKConfig+0xeb6>
      {
        status = HAL_ERROR;
 800c66c:	2301      	movs	r3, #1
 800c66e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
      }
    }

    __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
 800c672:	4b8a      	ldr	r3, [pc, #552]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c674:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800c676:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800c67a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c67e:	f8d3 3098 	ldr.w	r3, [r3, #152]	@ 0x98
 800c682:	4a86      	ldr	r2, [pc, #536]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c684:	430b      	orrs	r3, r1
 800c686:	6593      	str	r3, [r2, #88]	@ 0x58

  }

  /*---------------------------- ADC configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
 800c688:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c68c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c690:	f402 2300 	and.w	r3, r2, #524288	@ 0x80000
 800c694:	67bb      	str	r3, [r7, #120]	@ 0x78
 800c696:	2300      	movs	r3, #0
 800c698:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800c69a:	e9d7 121e 	ldrd	r1, r2, [r7, #120]	@ 0x78
 800c69e:	460b      	mov	r3, r1
 800c6a0:	4313      	orrs	r3, r2
 800c6a2:	d03e      	beq.n	800c722 <HAL_RCCEx_PeriphCLKConfig+0xf66>
  {
    switch (PeriphClkInit->AdcClockSelection)
 800c6a4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c6a8:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800c6ac:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800c6b0:	d022      	beq.n	800c6f8 <HAL_RCCEx_PeriphCLKConfig+0xf3c>
 800c6b2:	f5b3 3f00 	cmp.w	r3, #131072	@ 0x20000
 800c6b6:	d81b      	bhi.n	800c6f0 <HAL_RCCEx_PeriphCLKConfig+0xf34>
 800c6b8:	2b00      	cmp	r3, #0
 800c6ba:	d003      	beq.n	800c6c4 <HAL_RCCEx_PeriphCLKConfig+0xf08>
 800c6bc:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800c6c0:	d00b      	beq.n	800c6da <HAL_RCCEx_PeriphCLKConfig+0xf1e>
 800c6c2:	e015      	b.n	800c6f0 <HAL_RCCEx_PeriphCLKConfig+0xf34>
    {

      case RCC_ADCCLKSOURCE_PLL2: /* PLL2 is used as clock source for ADC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800c6c4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c6c8:	3308      	adds	r3, #8
 800c6ca:	2100      	movs	r1, #0
 800c6cc:	4618      	mov	r0, r3
 800c6ce:	f000 fd21 	bl	800d114 <RCCEx_PLL2_Config>
 800c6d2:	4603      	mov	r3, r0
 800c6d4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800c6d8:	e00f      	b.n	800c6fa <HAL_RCCEx_PeriphCLKConfig+0xf3e>

      case RCC_ADCCLKSOURCE_PLL3:  /* PLL3 is used as clock source for ADC*/
        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800c6da:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c6de:	3328      	adds	r3, #40	@ 0x28
 800c6e0:	2102      	movs	r1, #2
 800c6e2:	4618      	mov	r0, r3
 800c6e4:	f000 fdc8 	bl	800d278 <RCCEx_PLL3_Config>
 800c6e8:	4603      	mov	r3, r0
 800c6ea:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* ADC clock source configuration done later after clock selection check */
        break;
 800c6ee:	e004      	b.n	800c6fa <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        /* HSI, HSE, or CSI oscillator is used as source of ADC clock */
        /* ADC clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c6f0:	2301      	movs	r3, #1
 800c6f2:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c6f6:	e000      	b.n	800c6fa <HAL_RCCEx_PeriphCLKConfig+0xf3e>
        break;
 800c6f8:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c6fa:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c6fe:	2b00      	cmp	r3, #0
 800c700:	d10b      	bne.n	800c71a <HAL_RCCEx_PeriphCLKConfig+0xf5e>
    {
      /* Set the source of ADC clock*/
      __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
 800c702:	4b66      	ldr	r3, [pc, #408]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c704:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800c706:	f423 3140 	bic.w	r1, r3, #196608	@ 0x30000
 800c70a:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c70e:	f8d3 30a4 	ldr.w	r3, [r3, #164]	@ 0xa4
 800c712:	4a62      	ldr	r2, [pc, #392]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c714:	430b      	orrs	r3, r1
 800c716:	6593      	str	r3, [r2, #88]	@ 0x58
 800c718:	e003      	b.n	800c722 <HAL_RCCEx_PeriphCLKConfig+0xf66>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c71a:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c71e:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }

  /*------------------------------ USB Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
 800c722:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c726:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c72a:	f402 2380 	and.w	r3, r2, #262144	@ 0x40000
 800c72e:	673b      	str	r3, [r7, #112]	@ 0x70
 800c730:	2300      	movs	r3, #0
 800c732:	677b      	str	r3, [r7, #116]	@ 0x74
 800c734:	e9d7 121c 	ldrd	r1, r2, [r7, #112]	@ 0x70
 800c738:	460b      	mov	r3, r1
 800c73a:	4313      	orrs	r3, r2
 800c73c:	d03b      	beq.n	800c7b6 <HAL_RCCEx_PeriphCLKConfig+0xffa>
  {

    switch (PeriphClkInit->UsbClockSelection)
 800c73e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c742:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800c746:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800c74a:	d01f      	beq.n	800c78c <HAL_RCCEx_PeriphCLKConfig+0xfd0>
 800c74c:	f5b3 1f40 	cmp.w	r3, #3145728	@ 0x300000
 800c750:	d818      	bhi.n	800c784 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
 800c752:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800c756:	d003      	beq.n	800c760 <HAL_RCCEx_PeriphCLKConfig+0xfa4>
 800c758:	f5b3 1f00 	cmp.w	r3, #2097152	@ 0x200000
 800c75c:	d007      	beq.n	800c76e <HAL_RCCEx_PeriphCLKConfig+0xfb2>
 800c75e:	e011      	b.n	800c784 <HAL_RCCEx_PeriphCLKConfig+0xfc8>
    {
      case RCC_USBCLKSOURCE_PLL:      /* PLL is used as clock source for USB*/
        /* Enable USB Clock output generated form System USB . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800c760:	4b4e      	ldr	r3, [pc, #312]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c762:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c764:	4a4d      	ldr	r2, [pc, #308]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c766:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800c76a:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* USB clock source configuration done later after clock selection check */
        break;
 800c76c:	e00f      	b.n	800c78e <HAL_RCCEx_PeriphCLKConfig+0xfd2>

      case RCC_USBCLKSOURCE_PLL3: /* PLL3 is used as clock source for USB*/

        ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800c76e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c772:	3328      	adds	r3, #40	@ 0x28
 800c774:	2101      	movs	r1, #1
 800c776:	4618      	mov	r0, r3
 800c778:	f000 fd7e 	bl	800d278 <RCCEx_PLL3_Config>
 800c77c:	4603      	mov	r3, r0
 800c77e:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* USB clock source configuration done later after clock selection check */
        break;
 800c782:	e004      	b.n	800c78e <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        /* HSI48 oscillator is used as source of USB clock */
        /* USB clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c784:	2301      	movs	r3, #1
 800c786:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c78a:	e000      	b.n	800c78e <HAL_RCCEx_PeriphCLKConfig+0xfd2>
        break;
 800c78c:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c78e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c792:	2b00      	cmp	r3, #0
 800c794:	d10b      	bne.n	800c7ae <HAL_RCCEx_PeriphCLKConfig+0xff2>
    {
      /* Set the source of USB clock*/
      __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
 800c796:	4b41      	ldr	r3, [pc, #260]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c798:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c79a:	f423 1140 	bic.w	r1, r3, #3145728	@ 0x300000
 800c79e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c7a2:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800c7a6:	4a3d      	ldr	r2, [pc, #244]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c7a8:	430b      	orrs	r3, r1
 800c7aa:	6553      	str	r3, [r2, #84]	@ 0x54
 800c7ac:	e003      	b.n	800c7b6 <HAL_RCCEx_PeriphCLKConfig+0xffa>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c7ae:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c7b2:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------------- SDMMC Configuration ------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC) == RCC_PERIPHCLK_SDMMC)
 800c7b6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c7ba:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c7be:	f402 3380 	and.w	r3, r2, #65536	@ 0x10000
 800c7c2:	66bb      	str	r3, [r7, #104]	@ 0x68
 800c7c4:	2300      	movs	r3, #0
 800c7c6:	66fb      	str	r3, [r7, #108]	@ 0x6c
 800c7c8:	e9d7 121a 	ldrd	r1, r2, [r7, #104]	@ 0x68
 800c7cc:	460b      	mov	r3, r1
 800c7ce:	4313      	orrs	r3, r2
 800c7d0:	d031      	beq.n	800c836 <HAL_RCCEx_PeriphCLKConfig+0x107a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SDMMC(PeriphClkInit->SdmmcClockSelection));

    switch (PeriphClkInit->SdmmcClockSelection)
 800c7d2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c7d6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c7d8:	2b00      	cmp	r3, #0
 800c7da:	d003      	beq.n	800c7e4 <HAL_RCCEx_PeriphCLKConfig+0x1028>
 800c7dc:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800c7e0:	d007      	beq.n	800c7f2 <HAL_RCCEx_PeriphCLKConfig+0x1036>
 800c7e2:	e011      	b.n	800c808 <HAL_RCCEx_PeriphCLKConfig+0x104c>
    {
      case RCC_SDMMCCLKSOURCE_PLL:      /* PLL is used as clock source for SDMMC*/
        /* Enable SDMMC Clock output generated form System PLL . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800c7e4:	4b2d      	ldr	r3, [pc, #180]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c7e6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c7e8:	4a2c      	ldr	r2, [pc, #176]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c7ea:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800c7ee:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800c7f0:	e00e      	b.n	800c810 <HAL_RCCEx_PeriphCLKConfig+0x1054>

      case RCC_SDMMCCLKSOURCE_PLL2: /* PLL2 is used as clock source for SDMMC*/

        ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800c7f2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c7f6:	3308      	adds	r3, #8
 800c7f8:	2102      	movs	r1, #2
 800c7fa:	4618      	mov	r0, r3
 800c7fc:	f000 fc8a 	bl	800d114 <RCCEx_PLL2_Config>
 800c800:	4603      	mov	r3, r0
 800c802:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f

        /* SDMMC clock source configuration done later after clock selection check */
        break;
 800c806:	e003      	b.n	800c810 <HAL_RCCEx_PeriphCLKConfig+0x1054>

      default:
        ret = HAL_ERROR;
 800c808:	2301      	movs	r3, #1
 800c80a:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c80e:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c810:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c814:	2b00      	cmp	r3, #0
 800c816:	d10a      	bne.n	800c82e <HAL_RCCEx_PeriphCLKConfig+0x1072>
    {
      /* Set the source of SDMMC clock*/
      __HAL_RCC_SDMMC_CONFIG(PeriphClkInit->SdmmcClockSelection);
 800c818:	4b20      	ldr	r3, [pc, #128]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c81a:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800c81c:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800c820:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c824:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c826:	4a1d      	ldr	r2, [pc, #116]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c828:	430b      	orrs	r3, r1
 800c82a:	64d3      	str	r3, [r2, #76]	@ 0x4c
 800c82c:	e003      	b.n	800c836 <HAL_RCCEx_PeriphCLKConfig+0x107a>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c82e:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c832:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
#endif /* LTDC */

  /*------------------------------ RNG Configuration -------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == RCC_PERIPHCLK_RNG)
 800c836:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c83a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c83e:	f402 3300 	and.w	r3, r2, #131072	@ 0x20000
 800c842:	663b      	str	r3, [r7, #96]	@ 0x60
 800c844:	2300      	movs	r3, #0
 800c846:	667b      	str	r3, [r7, #100]	@ 0x64
 800c848:	e9d7 1218 	ldrd	r1, r2, [r7, #96]	@ 0x60
 800c84c:	460b      	mov	r3, r1
 800c84e:	4313      	orrs	r3, r2
 800c850:	d03b      	beq.n	800c8ca <HAL_RCCEx_PeriphCLKConfig+0x110e>
  {

    switch (PeriphClkInit->RngClockSelection)
 800c852:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c856:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800c85a:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800c85e:	d018      	beq.n	800c892 <HAL_RCCEx_PeriphCLKConfig+0x10d6>
 800c860:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800c864:	d811      	bhi.n	800c88a <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800c866:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800c86a:	d014      	beq.n	800c896 <HAL_RCCEx_PeriphCLKConfig+0x10da>
 800c86c:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 800c870:	d80b      	bhi.n	800c88a <HAL_RCCEx_PeriphCLKConfig+0x10ce>
 800c872:	2b00      	cmp	r3, #0
 800c874:	d014      	beq.n	800c8a0 <HAL_RCCEx_PeriphCLKConfig+0x10e4>
 800c876:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800c87a:	d106      	bne.n	800c88a <HAL_RCCEx_PeriphCLKConfig+0x10ce>
    {
      case RCC_RNGCLKSOURCE_PLL:     /* PLL is used as clock source for RNG*/
        /* Enable RNG Clock output generated form System RNG . */
        __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL1_DIVQ);
 800c87c:	4b07      	ldr	r3, [pc, #28]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c87e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800c880:	4a06      	ldr	r2, [pc, #24]	@ (800c89c <HAL_RCCEx_PeriphCLKConfig+0x10e0>)
 800c882:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 800c886:	62d3      	str	r3, [r2, #44]	@ 0x2c

        /* RNG clock source configuration done later after clock selection check */
        break;
 800c888:	e00b      	b.n	800c8a2 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        /* HSI48 oscillator is used as source of RNG clock */
        /* RNG clock source configuration done later after clock selection check */
        break;

      default:
        ret = HAL_ERROR;
 800c88a:	2301      	movs	r3, #1
 800c88c:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
        break;
 800c890:	e007      	b.n	800c8a2 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800c892:	bf00      	nop
 800c894:	e005      	b.n	800c8a2 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
        break;
 800c896:	bf00      	nop
 800c898:	e003      	b.n	800c8a2 <HAL_RCCEx_PeriphCLKConfig+0x10e6>
 800c89a:	bf00      	nop
 800c89c:	58024400 	.word	0x58024400
        break;
 800c8a0:	bf00      	nop
    }

    if (ret == HAL_OK)
 800c8a2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c8a6:	2b00      	cmp	r3, #0
 800c8a8:	d10b      	bne.n	800c8c2 <HAL_RCCEx_PeriphCLKConfig+0x1106>
    {
      /* Set the source of RNG clock*/
      __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection);
 800c8aa:	4bba      	ldr	r3, [pc, #744]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c8ac:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c8ae:	f423 7140 	bic.w	r1, r3, #768	@ 0x300
 800c8b2:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c8b6:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800c8ba:	4ab6      	ldr	r2, [pc, #728]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c8bc:	430b      	orrs	r3, r1
 800c8be:	6553      	str	r3, [r2, #84]	@ 0x54
 800c8c0:	e003      	b.n	800c8ca <HAL_RCCEx_PeriphCLKConfig+0x110e>
    }
    else
    {
      /* set overall return value */
      status = ret;
 800c8c2:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800c8c6:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }

  }

  /*------------------------------ SWPMI1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1)
 800c8ca:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c8ce:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c8d2:	f402 1380 	and.w	r3, r2, #1048576	@ 0x100000
 800c8d6:	65bb      	str	r3, [r7, #88]	@ 0x58
 800c8d8:	2300      	movs	r3, #0
 800c8da:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800c8dc:	e9d7 1216 	ldrd	r1, r2, [r7, #88]	@ 0x58
 800c8e0:	460b      	mov	r3, r1
 800c8e2:	4313      	orrs	r3, r2
 800c8e4:	d009      	beq.n	800c8fa <HAL_RCCEx_PeriphCLKConfig+0x113e>
  {
    /* Check the parameters */
    assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection));

    /* Configure the SWPMI1 interface clock source */
    __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection);
 800c8e6:	4bab      	ldr	r3, [pc, #684]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c8e8:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c8ea:	f023 4100 	bic.w	r1, r3, #2147483648	@ 0x80000000
 800c8ee:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c8f2:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800c8f4:	4aa7      	ldr	r2, [pc, #668]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c8f6:	430b      	orrs	r3, r1
 800c8f8:	6513      	str	r3, [r2, #80]	@ 0x50
  }
#if defined(HRTIM1)
  /*------------------------------ HRTIM1 clock Configuration ----------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_HRTIM1) == RCC_PERIPHCLK_HRTIM1)
 800c8fa:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c8fe:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c902:	f002 5380 	and.w	r3, r2, #268435456	@ 0x10000000
 800c906:	653b      	str	r3, [r7, #80]	@ 0x50
 800c908:	2300      	movs	r3, #0
 800c90a:	657b      	str	r3, [r7, #84]	@ 0x54
 800c90c:	e9d7 1214 	ldrd	r1, r2, [r7, #80]	@ 0x50
 800c910:	460b      	mov	r3, r1
 800c912:	4313      	orrs	r3, r2
 800c914:	d00a      	beq.n	800c92c <HAL_RCCEx_PeriphCLKConfig+0x1170>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HRTIM1CLKSOURCE(PeriphClkInit->Hrtim1ClockSelection));

    /* Configure the HRTIM1 clock source */
    __HAL_RCC_HRTIM1_CONFIG(PeriphClkInit->Hrtim1ClockSelection);
 800c916:	4b9f      	ldr	r3, [pc, #636]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c918:	691b      	ldr	r3, [r3, #16]
 800c91a:	f423 4180 	bic.w	r1, r3, #16384	@ 0x4000
 800c91e:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c922:	f8d3 30b8 	ldr.w	r3, [r3, #184]	@ 0xb8
 800c926:	4a9b      	ldr	r2, [pc, #620]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c928:	430b      	orrs	r3, r1
 800c92a:	6113      	str	r3, [r2, #16]
  }
#endif  /*HRTIM1*/
  /*------------------------------ DFSDM1 Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM1) == RCC_PERIPHCLK_DFSDM1)
 800c92c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c930:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c934:	f402 1300 	and.w	r3, r2, #2097152	@ 0x200000
 800c938:	64bb      	str	r3, [r7, #72]	@ 0x48
 800c93a:	2300      	movs	r3, #0
 800c93c:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800c93e:	e9d7 1212 	ldrd	r1, r2, [r7, #72]	@ 0x48
 800c942:	460b      	mov	r3, r1
 800c944:	4313      	orrs	r3, r2
 800c946:	d009      	beq.n	800c95c <HAL_RCCEx_PeriphCLKConfig+0x11a0>
  {
    /* Check the parameters */
    assert_param(IS_RCC_DFSDM1CLKSOURCE(PeriphClkInit->Dfsdm1ClockSelection));

    /* Configure the DFSDM1 interface clock source */
    __HAL_RCC_DFSDM1_CONFIG(PeriphClkInit->Dfsdm1ClockSelection);
 800c948:	4b92      	ldr	r3, [pc, #584]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c94a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800c94c:	f023 7180 	bic.w	r1, r3, #16777216	@ 0x1000000
 800c950:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c954:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800c956:	4a8f      	ldr	r2, [pc, #572]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c958:	430b      	orrs	r3, r1
 800c95a:	6513      	str	r3, [r2, #80]	@ 0x50
    __HAL_RCC_DFSDM2_CONFIG(PeriphClkInit->Dfsdm2ClockSelection);
  }
#endif  /* DFSDM2 */

  /*------------------------------------ TIM configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == RCC_PERIPHCLK_TIM)
 800c95c:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c960:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c964:	f002 4380 	and.w	r3, r2, #1073741824	@ 0x40000000
 800c968:	643b      	str	r3, [r7, #64]	@ 0x40
 800c96a:	2300      	movs	r3, #0
 800c96c:	647b      	str	r3, [r7, #68]	@ 0x44
 800c96e:	e9d7 1210 	ldrd	r1, r2, [r7, #64]	@ 0x40
 800c972:	460b      	mov	r3, r1
 800c974:	4313      	orrs	r3, r2
 800c976:	d00e      	beq.n	800c996 <HAL_RCCEx_PeriphCLKConfig+0x11da>
  {
    /* Check the parameters */
    assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection));

    /* Configure Timer Prescaler */
    __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
 800c978:	4b86      	ldr	r3, [pc, #536]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c97a:	691b      	ldr	r3, [r3, #16]
 800c97c:	4a85      	ldr	r2, [pc, #532]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c97e:	f423 4300 	bic.w	r3, r3, #32768	@ 0x8000
 800c982:	6113      	str	r3, [r2, #16]
 800c984:	4b83      	ldr	r3, [pc, #524]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c986:	6919      	ldr	r1, [r3, #16]
 800c988:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c98c:	f8d3 30bc 	ldr.w	r3, [r3, #188]	@ 0xbc
 800c990:	4a80      	ldr	r2, [pc, #512]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c992:	430b      	orrs	r3, r1
 800c994:	6113      	str	r3, [r2, #16]
  }

  /*------------------------------------ CKPER configuration --------------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CKPER) == RCC_PERIPHCLK_CKPER)
 800c996:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c99a:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c99e:	f002 4300 	and.w	r3, r2, #2147483648	@ 0x80000000
 800c9a2:	63bb      	str	r3, [r7, #56]	@ 0x38
 800c9a4:	2300      	movs	r3, #0
 800c9a6:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800c9a8:	e9d7 120e 	ldrd	r1, r2, [r7, #56]	@ 0x38
 800c9ac:	460b      	mov	r3, r1
 800c9ae:	4313      	orrs	r3, r2
 800c9b0:	d009      	beq.n	800c9c6 <HAL_RCCEx_PeriphCLKConfig+0x120a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CLKPSOURCE(PeriphClkInit->CkperClockSelection));

    /* Configure the CKPER clock source */
    __HAL_RCC_CLKP_CONFIG(PeriphClkInit->CkperClockSelection);
 800c9b2:	4b78      	ldr	r3, [pc, #480]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c9b4:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 800c9b6:	f023 5140 	bic.w	r1, r3, #805306368	@ 0x30000000
 800c9ba:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c9be:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c9c0:	4a74      	ldr	r2, [pc, #464]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c9c2:	430b      	orrs	r3, r1
 800c9c4:	64d3      	str	r3, [r2, #76]	@ 0x4c
  }

  /*------------------------------ CEC Configuration ------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
 800c9c6:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c9ca:	e9d3 2300 	ldrd	r2, r3, [r3]
 800c9ce:	f402 0300 	and.w	r3, r2, #8388608	@ 0x800000
 800c9d2:	633b      	str	r3, [r7, #48]	@ 0x30
 800c9d4:	2300      	movs	r3, #0
 800c9d6:	637b      	str	r3, [r7, #52]	@ 0x34
 800c9d8:	e9d7 120c 	ldrd	r1, r2, [r7, #48]	@ 0x30
 800c9dc:	460b      	mov	r3, r1
 800c9de:	4313      	orrs	r3, r2
 800c9e0:	d00a      	beq.n	800c9f8 <HAL_RCCEx_PeriphCLKConfig+0x123c>
  {
    /* Check the parameters */
    assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));

    /* Configure the CEC interface clock source */
    __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
 800c9e2:	4b6c      	ldr	r3, [pc, #432]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c9e4:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800c9e6:	f423 0140 	bic.w	r1, r3, #12582912	@ 0xc00000
 800c9ea:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c9ee:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800c9f2:	4a68      	ldr	r2, [pc, #416]	@ (800cb94 <HAL_RCCEx_PeriphCLKConfig+0x13d8>)
 800c9f4:	430b      	orrs	r3, r1
 800c9f6:	6553      	str	r3, [r2, #84]	@ 0x54
  }

  /*---------------------------- PLL2 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVP) == RCC_PERIPHCLK_PLL2_DIVP)
 800c9f8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800c9fc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ca00:	2100      	movs	r1, #0
 800ca02:	62b9      	str	r1, [r7, #40]	@ 0x28
 800ca04:	f003 0301 	and.w	r3, r3, #1
 800ca08:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800ca0a:	e9d7 120a 	ldrd	r1, r2, [r7, #40]	@ 0x28
 800ca0e:	460b      	mov	r3, r1
 800ca10:	4313      	orrs	r3, r2
 800ca12:	d011      	beq.n	800ca38 <HAL_RCCEx_PeriphCLKConfig+0x127c>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_P_UPDATE);
 800ca14:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ca18:	3308      	adds	r3, #8
 800ca1a:	2100      	movs	r1, #0
 800ca1c:	4618      	mov	r0, r3
 800ca1e:	f000 fb79 	bl	800d114 <RCCEx_PLL2_Config>
 800ca22:	4603      	mov	r3, r0
 800ca24:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800ca28:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ca2c:	2b00      	cmp	r3, #0
 800ca2e:	d003      	beq.n	800ca38 <HAL_RCCEx_PeriphCLKConfig+0x127c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ca30:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ca34:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVQ) == RCC_PERIPHCLK_PLL2_DIVQ)
 800ca38:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ca3c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ca40:	2100      	movs	r1, #0
 800ca42:	6239      	str	r1, [r7, #32]
 800ca44:	f003 0302 	and.w	r3, r3, #2
 800ca48:	627b      	str	r3, [r7, #36]	@ 0x24
 800ca4a:	e9d7 1208 	ldrd	r1, r2, [r7, #32]
 800ca4e:	460b      	mov	r3, r1
 800ca50:	4313      	orrs	r3, r2
 800ca52:	d011      	beq.n	800ca78 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_Q_UPDATE);
 800ca54:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ca58:	3308      	adds	r3, #8
 800ca5a:	2101      	movs	r1, #1
 800ca5c:	4618      	mov	r0, r3
 800ca5e:	f000 fb59 	bl	800d114 <RCCEx_PLL2_Config>
 800ca62:	4603      	mov	r3, r0
 800ca64:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800ca68:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ca6c:	2b00      	cmp	r3, #0
 800ca6e:	d003      	beq.n	800ca78 <HAL_RCCEx_PeriphCLKConfig+0x12bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800ca70:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800ca74:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL2_DIVR) == RCC_PERIPHCLK_PLL2_DIVR)
 800ca78:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ca7c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800ca80:	2100      	movs	r1, #0
 800ca82:	61b9      	str	r1, [r7, #24]
 800ca84:	f003 0304 	and.w	r3, r3, #4
 800ca88:	61fb      	str	r3, [r7, #28]
 800ca8a:	e9d7 1206 	ldrd	r1, r2, [r7, #24]
 800ca8e:	460b      	mov	r3, r1
 800ca90:	4313      	orrs	r3, r2
 800ca92:	d011      	beq.n	800cab8 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
  {
    ret = RCCEx_PLL2_Config(&(PeriphClkInit->PLL2), DIVIDER_R_UPDATE);
 800ca94:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800ca98:	3308      	adds	r3, #8
 800ca9a:	2102      	movs	r1, #2
 800ca9c:	4618      	mov	r0, r3
 800ca9e:	f000 fb39 	bl	800d114 <RCCEx_PLL2_Config>
 800caa2:	4603      	mov	r3, r0
 800caa4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800caa8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800caac:	2b00      	cmp	r3, #0
 800caae:	d003      	beq.n	800cab8 <HAL_RCCEx_PeriphCLKConfig+0x12fc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800cab0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800cab4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  

  /*---------------------------- PLL3 configuration -------------------------------*/
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVP) == RCC_PERIPHCLK_PLL3_DIVP)
 800cab8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800cabc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800cac0:	2100      	movs	r1, #0
 800cac2:	6139      	str	r1, [r7, #16]
 800cac4:	f003 0308 	and.w	r3, r3, #8
 800cac8:	617b      	str	r3, [r7, #20]
 800caca:	e9d7 1204 	ldrd	r1, r2, [r7, #16]
 800cace:	460b      	mov	r3, r1
 800cad0:	4313      	orrs	r3, r2
 800cad2:	d011      	beq.n	800caf8 <HAL_RCCEx_PeriphCLKConfig+0x133c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_P_UPDATE);
 800cad4:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800cad8:	3328      	adds	r3, #40	@ 0x28
 800cada:	2100      	movs	r1, #0
 800cadc:	4618      	mov	r0, r3
 800cade:	f000 fbcb 	bl	800d278 <RCCEx_PLL3_Config>
 800cae2:	4603      	mov	r3, r0
 800cae4:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
  
    if (ret == HAL_OK)
 800cae8:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800caec:	2b00      	cmp	r3, #0
 800caee:	d003      	beq.n	800caf8 <HAL_RCCEx_PeriphCLKConfig+0x133c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800caf0:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800caf4:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVQ) == RCC_PERIPHCLK_PLL3_DIVQ)
 800caf8:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800cafc:	e9d3 2300 	ldrd	r2, r3, [r3]
 800cb00:	2100      	movs	r1, #0
 800cb02:	60b9      	str	r1, [r7, #8]
 800cb04:	f003 0310 	and.w	r3, r3, #16
 800cb08:	60fb      	str	r3, [r7, #12]
 800cb0a:	e9d7 1202 	ldrd	r1, r2, [r7, #8]
 800cb0e:	460b      	mov	r3, r1
 800cb10:	4313      	orrs	r3, r2
 800cb12:	d011      	beq.n	800cb38 <HAL_RCCEx_PeriphCLKConfig+0x137c>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_Q_UPDATE);
 800cb14:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800cb18:	3328      	adds	r3, #40	@ 0x28
 800cb1a:	2101      	movs	r1, #1
 800cb1c:	4618      	mov	r0, r3
 800cb1e:	f000 fbab 	bl	800d278 <RCCEx_PLL3_Config>
 800cb22:	4603      	mov	r3, r0
 800cb24:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800cb28:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800cb2c:	2b00      	cmp	r3, #0
 800cb2e:	d003      	beq.n	800cb38 <HAL_RCCEx_PeriphCLKConfig+0x137c>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800cb30:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800cb34:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    }
  }
  
  
  if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLL3_DIVR) == RCC_PERIPHCLK_PLL3_DIVR)
 800cb38:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800cb3c:	e9d3 2300 	ldrd	r2, r3, [r3]
 800cb40:	2100      	movs	r1, #0
 800cb42:	6039      	str	r1, [r7, #0]
 800cb44:	f003 0320 	and.w	r3, r3, #32
 800cb48:	607b      	str	r3, [r7, #4]
 800cb4a:	e9d7 1200 	ldrd	r1, r2, [r7]
 800cb4e:	460b      	mov	r3, r1
 800cb50:	4313      	orrs	r3, r2
 800cb52:	d011      	beq.n	800cb78 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
  {
    ret = RCCEx_PLL3_Config(&(PeriphClkInit->PLL3), DIVIDER_R_UPDATE);
 800cb54:	f8d7 310c 	ldr.w	r3, [r7, #268]	@ 0x10c
 800cb58:	3328      	adds	r3, #40	@ 0x28
 800cb5a:	2102      	movs	r1, #2
 800cb5c:	4618      	mov	r0, r3
 800cb5e:	f000 fb8b 	bl	800d278 <RCCEx_PLL3_Config>
 800cb62:	4603      	mov	r3, r0
 800cb64:	f887 311f 	strb.w	r3, [r7, #287]	@ 0x11f
    
    if (ret == HAL_OK)
 800cb68:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800cb6c:	2b00      	cmp	r3, #0
 800cb6e:	d003      	beq.n	800cb78 <HAL_RCCEx_PeriphCLKConfig+0x13bc>
      /*Nothing to do*/
    }
    else
    {
      /* set overall return value */
      status = ret;
 800cb70:	f897 311f 	ldrb.w	r3, [r7, #287]	@ 0x11f
 800cb74:	f887 311e 	strb.w	r3, [r7, #286]	@ 0x11e
    } 
  }

  if (status == HAL_OK)
 800cb78:	f897 311e 	ldrb.w	r3, [r7, #286]	@ 0x11e
 800cb7c:	2b00      	cmp	r3, #0
 800cb7e:	d101      	bne.n	800cb84 <HAL_RCCEx_PeriphCLKConfig+0x13c8>
  {
    return HAL_OK;
 800cb80:	2300      	movs	r3, #0
 800cb82:	e000      	b.n	800cb86 <HAL_RCCEx_PeriphCLKConfig+0x13ca>
  }
  return HAL_ERROR;
 800cb84:	2301      	movs	r3, #1
}
 800cb86:	4618      	mov	r0, r3
 800cb88:	f507 7790 	add.w	r7, r7, #288	@ 0x120
 800cb8c:	46bd      	mov	sp, r7
 800cb8e:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800cb92:	bf00      	nop
 800cb94:	58024400 	.word	0x58024400

0800cb98 <HAL_RCCEx_GetD3PCLK1Freq>:
  * @note   Each time D3PCLK1 changes, this function must be called to update the
  *         right D3PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval D3PCLK1 frequency
  */
uint32_t HAL_RCCEx_GetD3PCLK1Freq(void)
{
 800cb98:	b580      	push	{r7, lr}
 800cb9a:	af00      	add	r7, sp, #0
#if defined(RCC_D3CFGR_D3PPRE)
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->D3CFGR & RCC_D3CFGR_D3PPRE) >> RCC_D3CFGR_D3PPRE_Pos] & 0x1FU));
 800cb9c:	f7fe fd70 	bl	800b680 <HAL_RCC_GetHCLKFreq>
 800cba0:	4602      	mov	r2, r0
 800cba2:	4b06      	ldr	r3, [pc, #24]	@ (800cbbc <HAL_RCCEx_GetD3PCLK1Freq+0x24>)
 800cba4:	6a1b      	ldr	r3, [r3, #32]
 800cba6:	091b      	lsrs	r3, r3, #4
 800cba8:	f003 0307 	and.w	r3, r3, #7
 800cbac:	4904      	ldr	r1, [pc, #16]	@ (800cbc0 <HAL_RCCEx_GetD3PCLK1Freq+0x28>)
 800cbae:	5ccb      	ldrb	r3, [r1, r3]
 800cbb0:	f003 031f 	and.w	r3, r3, #31
 800cbb4:	fa22 f303 	lsr.w	r3, r2, r3
#else
  /* Get HCLK source and Compute D3PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> (D1CorePrescTable[(RCC->SRDCFGR & RCC_SRDCFGR_SRDPPRE) >> RCC_SRDCFGR_SRDPPRE_Pos] & 0x1FU));
#endif
}
 800cbb8:	4618      	mov	r0, r3
 800cbba:	bd80      	pop	{r7, pc}
 800cbbc:	58024400 	.word	0x58024400
 800cbc0:	08031d0c 	.word	0x08031d0c

0800cbc4 <HAL_RCCEx_GetPLL2ClockFreq>:
  *         right PLL2CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL2_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks)
{
 800cbc4:	b480      	push	{r7}
 800cbc6:	b089      	sub	sp, #36	@ 0x24
 800cbc8:	af00      	add	r7, sp, #0
 800cbca:	6078      	str	r0, [r7, #4]
  float_t fracn2, pll2vco;

  /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL2M) * PLL2N
     PLL2xCLK = PLL2_VCO / PLL2x
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800cbcc:	4ba1      	ldr	r3, [pc, #644]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cbce:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800cbd0:	f003 0303 	and.w	r3, r3, #3
 800cbd4:	61bb      	str	r3, [r7, #24]
  pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2) >> 12);
 800cbd6:	4b9f      	ldr	r3, [pc, #636]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cbd8:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800cbda:	0b1b      	lsrs	r3, r3, #12
 800cbdc:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800cbe0:	617b      	str	r3, [r7, #20]
  pll2fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL2FRACEN) >> RCC_PLLCFGR_PLL2FRACEN_Pos;
 800cbe2:	4b9c      	ldr	r3, [pc, #624]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cbe4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800cbe6:	091b      	lsrs	r3, r3, #4
 800cbe8:	f003 0301 	and.w	r3, r3, #1
 800cbec:	613b      	str	r3, [r7, #16]
  fracn2 = (float_t)(uint32_t)(pll2fracen * ((RCC->PLL2FRACR & RCC_PLL2FRACR_FRACN2) >> 3));
 800cbee:	4b99      	ldr	r3, [pc, #612]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cbf0:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 800cbf2:	08db      	lsrs	r3, r3, #3
 800cbf4:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800cbf8:	693a      	ldr	r2, [r7, #16]
 800cbfa:	fb02 f303 	mul.w	r3, r2, r3
 800cbfe:	ee07 3a90 	vmov	s15, r3
 800cc02:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cc06:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll2m != 0U)
 800cc0a:	697b      	ldr	r3, [r7, #20]
 800cc0c:	2b00      	cmp	r3, #0
 800cc0e:	f000 8111 	beq.w	800ce34 <HAL_RCCEx_GetPLL2ClockFreq+0x270>
  {
    switch (pllsource)
 800cc12:	69bb      	ldr	r3, [r7, #24]
 800cc14:	2b02      	cmp	r3, #2
 800cc16:	f000 8083 	beq.w	800cd20 <HAL_RCCEx_GetPLL2ClockFreq+0x15c>
 800cc1a:	69bb      	ldr	r3, [r7, #24]
 800cc1c:	2b02      	cmp	r3, #2
 800cc1e:	f200 80a1 	bhi.w	800cd64 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
 800cc22:	69bb      	ldr	r3, [r7, #24]
 800cc24:	2b00      	cmp	r3, #0
 800cc26:	d003      	beq.n	800cc30 <HAL_RCCEx_GetPLL2ClockFreq+0x6c>
 800cc28:	69bb      	ldr	r3, [r7, #24]
 800cc2a:	2b01      	cmp	r3, #1
 800cc2c:	d056      	beq.n	800ccdc <HAL_RCCEx_GetPLL2ClockFreq+0x118>
 800cc2e:	e099      	b.n	800cd64 <HAL_RCCEx_GetPLL2ClockFreq+0x1a0>
    {

      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800cc30:	4b88      	ldr	r3, [pc, #544]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cc32:	681b      	ldr	r3, [r3, #0]
 800cc34:	f003 0320 	and.w	r3, r3, #32
 800cc38:	2b00      	cmp	r3, #0
 800cc3a:	d02d      	beq.n	800cc98 <HAL_RCCEx_GetPLL2ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800cc3c:	4b85      	ldr	r3, [pc, #532]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cc3e:	681b      	ldr	r3, [r3, #0]
 800cc40:	08db      	lsrs	r3, r3, #3
 800cc42:	f003 0303 	and.w	r3, r3, #3
 800cc46:	4a84      	ldr	r2, [pc, #528]	@ (800ce58 <HAL_RCCEx_GetPLL2ClockFreq+0x294>)
 800cc48:	fa22 f303 	lsr.w	r3, r2, r3
 800cc4c:	60bb      	str	r3, [r7, #8]
          pll2vco = ((float_t)hsivalue / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800cc4e:	68bb      	ldr	r3, [r7, #8]
 800cc50:	ee07 3a90 	vmov	s15, r3
 800cc54:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cc58:	697b      	ldr	r3, [r7, #20]
 800cc5a:	ee07 3a90 	vmov	s15, r3
 800cc5e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cc62:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cc66:	4b7b      	ldr	r3, [pc, #492]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cc68:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800cc6a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cc6e:	ee07 3a90 	vmov	s15, r3
 800cc72:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cc76:	ed97 6a03 	vldr	s12, [r7, #12]
 800cc7a:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800ce5c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800cc7e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cc82:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cc86:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cc8a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cc8e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cc92:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800cc96:	e087      	b.n	800cda8 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>
          pll2vco = ((float_t)HSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800cc98:	697b      	ldr	r3, [r7, #20]
 800cc9a:	ee07 3a90 	vmov	s15, r3
 800cc9e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cca2:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800ce60 <HAL_RCCEx_GetPLL2ClockFreq+0x29c>
 800cca6:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800ccaa:	4b6a      	ldr	r3, [pc, #424]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800ccac:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800ccae:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800ccb2:	ee07 3a90 	vmov	s15, r3
 800ccb6:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800ccba:	ed97 6a03 	vldr	s12, [r7, #12]
 800ccbe:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800ce5c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800ccc2:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800ccc6:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800ccca:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800ccce:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800ccd2:	ee67 7a27 	vmul.f32	s15, s14, s15
 800ccd6:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800ccda:	e065      	b.n	800cda8 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800ccdc:	697b      	ldr	r3, [r7, #20]
 800ccde:	ee07 3a90 	vmov	s15, r3
 800cce2:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cce6:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800ce64 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800ccea:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800ccee:	4b59      	ldr	r3, [pc, #356]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800ccf0:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800ccf2:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800ccf6:	ee07 3a90 	vmov	s15, r3
 800ccfa:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800ccfe:	ed97 6a03 	vldr	s12, [r7, #12]
 800cd02:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800ce5c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800cd06:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cd0a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cd0e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cd12:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cd16:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cd1a:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800cd1e:	e043      	b.n	800cda8 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll2vco = ((float_t)HSE_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800cd20:	697b      	ldr	r3, [r7, #20]
 800cd22:	ee07 3a90 	vmov	s15, r3
 800cd26:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cd2a:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800ce68 <HAL_RCCEx_GetPLL2ClockFreq+0x2a4>
 800cd2e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cd32:	4b48      	ldr	r3, [pc, #288]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cd34:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800cd36:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cd3a:	ee07 3a90 	vmov	s15, r3
 800cd3e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cd42:	ed97 6a03 	vldr	s12, [r7, #12]
 800cd46:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800ce5c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800cd4a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cd4e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cd52:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cd56:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cd5a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cd5e:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800cd62:	e021      	b.n	800cda8 <HAL_RCCEx_GetPLL2ClockFreq+0x1e4>

      default:
        pll2vco = ((float_t)CSI_VALUE / (float_t)pll2m) * ((float_t)(uint32_t)(RCC->PLL2DIVR & RCC_PLL2DIVR_N2) + (fracn2 / (float_t)0x2000) + (float_t)1);
 800cd64:	697b      	ldr	r3, [r7, #20]
 800cd66:	ee07 3a90 	vmov	s15, r3
 800cd6a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cd6e:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800ce64 <HAL_RCCEx_GetPLL2ClockFreq+0x2a0>
 800cd72:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cd76:	4b37      	ldr	r3, [pc, #220]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cd78:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800cd7a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cd7e:	ee07 3a90 	vmov	s15, r3
 800cd82:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cd86:	ed97 6a03 	vldr	s12, [r7, #12]
 800cd8a:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800ce5c <HAL_RCCEx_GetPLL2ClockFreq+0x298>
 800cd8e:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cd92:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cd96:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cd9a:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cd9e:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cda2:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800cda6:	bf00      	nop
    }
    PLL2_Clocks->PLL2_P_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_P2) >> 9)  + (float_t)1)) ;
 800cda8:	4b2a      	ldr	r3, [pc, #168]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cdaa:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800cdac:	0a5b      	lsrs	r3, r3, #9
 800cdae:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800cdb2:	ee07 3a90 	vmov	s15, r3
 800cdb6:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cdba:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800cdbe:	ee37 7a87 	vadd.f32	s14, s15, s14
 800cdc2:	edd7 6a07 	vldr	s13, [r7, #28]
 800cdc6:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800cdca:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800cdce:	ee17 2a90 	vmov	r2, s15
 800cdd2:	687b      	ldr	r3, [r7, #4]
 800cdd4:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_Q2) >> 16) + (float_t)1)) ;
 800cdd6:	4b1f      	ldr	r3, [pc, #124]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800cdd8:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800cdda:	0c1b      	lsrs	r3, r3, #16
 800cddc:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800cde0:	ee07 3a90 	vmov	s15, r3
 800cde4:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cde8:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800cdec:	ee37 7a87 	vadd.f32	s14, s15, s14
 800cdf0:	edd7 6a07 	vldr	s13, [r7, #28]
 800cdf4:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800cdf8:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800cdfc:	ee17 2a90 	vmov	r2, s15
 800ce00:	687b      	ldr	r3, [r7, #4]
 800ce02:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = (uint32_t)(float_t)(pll2vco / ((float_t)(uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_R2) >> 24) + (float_t)1)) ;
 800ce04:	4b13      	ldr	r3, [pc, #76]	@ (800ce54 <HAL_RCCEx_GetPLL2ClockFreq+0x290>)
 800ce06:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800ce08:	0e1b      	lsrs	r3, r3, #24
 800ce0a:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800ce0e:	ee07 3a90 	vmov	s15, r3
 800ce12:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800ce16:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800ce1a:	ee37 7a87 	vadd.f32	s14, s15, s14
 800ce1e:	edd7 6a07 	vldr	s13, [r7, #28]
 800ce22:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800ce26:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800ce2a:	ee17 2a90 	vmov	r2, s15
 800ce2e:	687b      	ldr	r3, [r7, #4]
 800ce30:	609a      	str	r2, [r3, #8]
  {
    PLL2_Clocks->PLL2_P_Frequency = 0U;
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
    PLL2_Clocks->PLL2_R_Frequency = 0U;
  }
}
 800ce32:	e008      	b.n	800ce46 <HAL_RCCEx_GetPLL2ClockFreq+0x282>
    PLL2_Clocks->PLL2_P_Frequency = 0U;
 800ce34:	687b      	ldr	r3, [r7, #4]
 800ce36:	2200      	movs	r2, #0
 800ce38:	601a      	str	r2, [r3, #0]
    PLL2_Clocks->PLL2_Q_Frequency = 0U;
 800ce3a:	687b      	ldr	r3, [r7, #4]
 800ce3c:	2200      	movs	r2, #0
 800ce3e:	605a      	str	r2, [r3, #4]
    PLL2_Clocks->PLL2_R_Frequency = 0U;
 800ce40:	687b      	ldr	r3, [r7, #4]
 800ce42:	2200      	movs	r2, #0
 800ce44:	609a      	str	r2, [r3, #8]
}
 800ce46:	bf00      	nop
 800ce48:	3724      	adds	r7, #36	@ 0x24
 800ce4a:	46bd      	mov	sp, r7
 800ce4c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800ce50:	4770      	bx	lr
 800ce52:	bf00      	nop
 800ce54:	58024400 	.word	0x58024400
 800ce58:	03d09000 	.word	0x03d09000
 800ce5c:	46000000 	.word	0x46000000
 800ce60:	4c742400 	.word	0x4c742400
 800ce64:	4a742400 	.word	0x4a742400
 800ce68:	4bbebc20 	.word	0x4bbebc20

0800ce6c <HAL_RCCEx_GetPLL3ClockFreq>:
  *         right PLL3CLK value. Otherwise, any configuration based on this function will be incorrect.
  * @param  PLL3_Clocks structure.
  * @retval None
  */
void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks)
{
 800ce6c:	b480      	push	{r7}
 800ce6e:	b089      	sub	sp, #36	@ 0x24
 800ce70:	af00      	add	r7, sp, #0
 800ce72:	6078      	str	r0, [r7, #4]
  float_t fracn3, pll3vco;

  /* PLL3_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLL3M) * PLL3N
     PLL3xCLK = PLL3_VCO / PLLxR
  */
  pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
 800ce74:	4ba1      	ldr	r3, [pc, #644]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800ce76:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ce78:	f003 0303 	and.w	r3, r3, #3
 800ce7c:	61bb      	str	r3, [r7, #24]
  pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3) >> 20)  ;
 800ce7e:	4b9f      	ldr	r3, [pc, #636]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800ce80:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ce82:	0d1b      	lsrs	r3, r3, #20
 800ce84:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 800ce88:	617b      	str	r3, [r7, #20]
  pll3fracen = (RCC->PLLCFGR & RCC_PLLCFGR_PLL3FRACEN) >> RCC_PLLCFGR_PLL3FRACEN_Pos;
 800ce8a:	4b9c      	ldr	r3, [pc, #624]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800ce8c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800ce8e:	0a1b      	lsrs	r3, r3, #8
 800ce90:	f003 0301 	and.w	r3, r3, #1
 800ce94:	613b      	str	r3, [r7, #16]
  fracn3 = (float_t)(uint32_t)(pll3fracen * ((RCC->PLL3FRACR & RCC_PLL3FRACR_FRACN3) >> 3));
 800ce96:	4b99      	ldr	r3, [pc, #612]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800ce98:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800ce9a:	08db      	lsrs	r3, r3, #3
 800ce9c:	f3c3 030c 	ubfx	r3, r3, #0, #13
 800cea0:	693a      	ldr	r2, [r7, #16]
 800cea2:	fb02 f303 	mul.w	r3, r2, r3
 800cea6:	ee07 3a90 	vmov	s15, r3
 800ceaa:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800ceae:	edc7 7a03 	vstr	s15, [r7, #12]

  if (pll3m != 0U)
 800ceb2:	697b      	ldr	r3, [r7, #20]
 800ceb4:	2b00      	cmp	r3, #0
 800ceb6:	f000 8111 	beq.w	800d0dc <HAL_RCCEx_GetPLL3ClockFreq+0x270>
  {
    switch (pllsource)
 800ceba:	69bb      	ldr	r3, [r7, #24]
 800cebc:	2b02      	cmp	r3, #2
 800cebe:	f000 8083 	beq.w	800cfc8 <HAL_RCCEx_GetPLL3ClockFreq+0x15c>
 800cec2:	69bb      	ldr	r3, [r7, #24]
 800cec4:	2b02      	cmp	r3, #2
 800cec6:	f200 80a1 	bhi.w	800d00c <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
 800ceca:	69bb      	ldr	r3, [r7, #24]
 800cecc:	2b00      	cmp	r3, #0
 800cece:	d003      	beq.n	800ced8 <HAL_RCCEx_GetPLL3ClockFreq+0x6c>
 800ced0:	69bb      	ldr	r3, [r7, #24]
 800ced2:	2b01      	cmp	r3, #1
 800ced4:	d056      	beq.n	800cf84 <HAL_RCCEx_GetPLL3ClockFreq+0x118>
 800ced6:	e099      	b.n	800d00c <HAL_RCCEx_GetPLL3ClockFreq+0x1a0>
    {
      case RCC_PLLSOURCE_HSI:  /* HSI used as PLL clock source */

        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800ced8:	4b88      	ldr	r3, [pc, #544]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800ceda:	681b      	ldr	r3, [r3, #0]
 800cedc:	f003 0320 	and.w	r3, r3, #32
 800cee0:	2b00      	cmp	r3, #0
 800cee2:	d02d      	beq.n	800cf40 <HAL_RCCEx_GetPLL3ClockFreq+0xd4>
        {
          hsivalue = (HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3));
 800cee4:	4b85      	ldr	r3, [pc, #532]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cee6:	681b      	ldr	r3, [r3, #0]
 800cee8:	08db      	lsrs	r3, r3, #3
 800ceea:	f003 0303 	and.w	r3, r3, #3
 800ceee:	4a84      	ldr	r2, [pc, #528]	@ (800d100 <HAL_RCCEx_GetPLL3ClockFreq+0x294>)
 800cef0:	fa22 f303 	lsr.w	r3, r2, r3
 800cef4:	60bb      	str	r3, [r7, #8]
          pll3vco = ((float_t)hsivalue / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800cef6:	68bb      	ldr	r3, [r7, #8]
 800cef8:	ee07 3a90 	vmov	s15, r3
 800cefc:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cf00:	697b      	ldr	r3, [r7, #20]
 800cf02:	ee07 3a90 	vmov	s15, r3
 800cf06:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cf0a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cf0e:	4b7b      	ldr	r3, [pc, #492]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cf10:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cf12:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cf16:	ee07 3a90 	vmov	s15, r3
 800cf1a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cf1e:	ed97 6a03 	vldr	s12, [r7, #12]
 800cf22:	eddf 5a78 	vldr	s11, [pc, #480]	@ 800d104 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800cf26:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cf2a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cf2e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cf32:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cf36:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cf3a:	edc7 7a07 	vstr	s15, [r7, #28]
        }
        else
        {
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
        }
        break;
 800cf3e:	e087      	b.n	800d050 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
          pll3vco = ((float_t)HSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800cf40:	697b      	ldr	r3, [r7, #20]
 800cf42:	ee07 3a90 	vmov	s15, r3
 800cf46:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cf4a:	eddf 6a6f 	vldr	s13, [pc, #444]	@ 800d108 <HAL_RCCEx_GetPLL3ClockFreq+0x29c>
 800cf4e:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cf52:	4b6a      	ldr	r3, [pc, #424]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cf54:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cf56:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cf5a:	ee07 3a90 	vmov	s15, r3
 800cf5e:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cf62:	ed97 6a03 	vldr	s12, [r7, #12]
 800cf66:	eddf 5a67 	vldr	s11, [pc, #412]	@ 800d104 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800cf6a:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cf6e:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cf72:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cf76:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cf7a:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cf7e:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800cf82:	e065      	b.n	800d050 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>
      case RCC_PLLSOURCE_CSI:  /* CSI used as PLL clock source */
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800cf84:	697b      	ldr	r3, [r7, #20]
 800cf86:	ee07 3a90 	vmov	s15, r3
 800cf8a:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cf8e:	eddf 6a5f 	vldr	s13, [pc, #380]	@ 800d10c <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800cf92:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cf96:	4b59      	ldr	r3, [pc, #356]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cf98:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cf9a:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cf9e:	ee07 3a90 	vmov	s15, r3
 800cfa2:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cfa6:	ed97 6a03 	vldr	s12, [r7, #12]
 800cfaa:	eddf 5a56 	vldr	s11, [pc, #344]	@ 800d104 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800cfae:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cfb2:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cfb6:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cfba:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800cfbe:	ee67 7a27 	vmul.f32	s15, s14, s15
 800cfc2:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800cfc6:	e043      	b.n	800d050 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      case RCC_PLLSOURCE_HSE:  /* HSE used as PLL clock source */
        pll3vco = ((float_t)HSE_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800cfc8:	697b      	ldr	r3, [r7, #20]
 800cfca:	ee07 3a90 	vmov	s15, r3
 800cfce:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800cfd2:	eddf 6a4f 	vldr	s13, [pc, #316]	@ 800d110 <HAL_RCCEx_GetPLL3ClockFreq+0x2a4>
 800cfd6:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800cfda:	4b48      	ldr	r3, [pc, #288]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800cfdc:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800cfde:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800cfe2:	ee07 3a90 	vmov	s15, r3
 800cfe6:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800cfea:	ed97 6a03 	vldr	s12, [r7, #12]
 800cfee:	eddf 5a45 	vldr	s11, [pc, #276]	@ 800d104 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800cff2:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800cff6:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800cffa:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800cffe:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800d002:	ee67 7a27 	vmul.f32	s15, s14, s15
 800d006:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800d00a:	e021      	b.n	800d050 <HAL_RCCEx_GetPLL3ClockFreq+0x1e4>

      default:
        pll3vco = ((float_t)CSI_VALUE / (float_t)pll3m) * ((float_t)(uint32_t)(RCC->PLL3DIVR & RCC_PLL3DIVR_N3) + (fracn3 / (float_t)0x2000) + (float_t)1);
 800d00c:	697b      	ldr	r3, [r7, #20]
 800d00e:	ee07 3a90 	vmov	s15, r3
 800d012:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800d016:	eddf 6a3d 	vldr	s13, [pc, #244]	@ 800d10c <HAL_RCCEx_GetPLL3ClockFreq+0x2a0>
 800d01a:	ee86 7aa7 	vdiv.f32	s14, s13, s15
 800d01e:	4b37      	ldr	r3, [pc, #220]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800d020:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800d022:	f3c3 0308 	ubfx	r3, r3, #0, #9
 800d026:	ee07 3a90 	vmov	s15, r3
 800d02a:	eef8 6a67 	vcvt.f32.u32	s13, s15
 800d02e:	ed97 6a03 	vldr	s12, [r7, #12]
 800d032:	eddf 5a34 	vldr	s11, [pc, #208]	@ 800d104 <HAL_RCCEx_GetPLL3ClockFreq+0x298>
 800d036:	eec6 7a25 	vdiv.f32	s15, s12, s11
 800d03a:	ee76 7aa7 	vadd.f32	s15, s13, s15
 800d03e:	eef7 6a00 	vmov.f32	s13, #112	@ 0x3f800000  1.0
 800d042:	ee77 7aa6 	vadd.f32	s15, s15, s13
 800d046:	ee67 7a27 	vmul.f32	s15, s14, s15
 800d04a:	edc7 7a07 	vstr	s15, [r7, #28]
        break;
 800d04e:	bf00      	nop
    }
    PLL3_Clocks->PLL3_P_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_P3) >> 9)  + (float_t)1)) ;
 800d050:	4b2a      	ldr	r3, [pc, #168]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800d052:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800d054:	0a5b      	lsrs	r3, r3, #9
 800d056:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800d05a:	ee07 3a90 	vmov	s15, r3
 800d05e:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800d062:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800d066:	ee37 7a87 	vadd.f32	s14, s15, s14
 800d06a:	edd7 6a07 	vldr	s13, [r7, #28]
 800d06e:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800d072:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800d076:	ee17 2a90 	vmov	r2, s15
 800d07a:	687b      	ldr	r3, [r7, #4]
 800d07c:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_Q3) >> 16) + (float_t)1)) ;
 800d07e:	4b1f      	ldr	r3, [pc, #124]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800d080:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800d082:	0c1b      	lsrs	r3, r3, #16
 800d084:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800d088:	ee07 3a90 	vmov	s15, r3
 800d08c:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800d090:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800d094:	ee37 7a87 	vadd.f32	s14, s15, s14
 800d098:	edd7 6a07 	vldr	s13, [r7, #28]
 800d09c:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800d0a0:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800d0a4:	ee17 2a90 	vmov	r2, s15
 800d0a8:	687b      	ldr	r3, [r7, #4]
 800d0aa:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = (uint32_t)(float_t)(pll3vco / ((float_t)(uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_R3) >> 24) + (float_t)1)) ;
 800d0ac:	4b13      	ldr	r3, [pc, #76]	@ (800d0fc <HAL_RCCEx_GetPLL3ClockFreq+0x290>)
 800d0ae:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 800d0b0:	0e1b      	lsrs	r3, r3, #24
 800d0b2:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 800d0b6:	ee07 3a90 	vmov	s15, r3
 800d0ba:	eef8 7a67 	vcvt.f32.u32	s15, s15
 800d0be:	eeb7 7a00 	vmov.f32	s14, #112	@ 0x3f800000  1.0
 800d0c2:	ee37 7a87 	vadd.f32	s14, s15, s14
 800d0c6:	edd7 6a07 	vldr	s13, [r7, #28]
 800d0ca:	eec6 7a87 	vdiv.f32	s15, s13, s14
 800d0ce:	eefc 7ae7 	vcvt.u32.f32	s15, s15
 800d0d2:	ee17 2a90 	vmov	r2, s15
 800d0d6:	687b      	ldr	r3, [r7, #4]
 800d0d8:	609a      	str	r2, [r3, #8]
    PLL3_Clocks->PLL3_P_Frequency = 0U;
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
    PLL3_Clocks->PLL3_R_Frequency = 0U;
  }

}
 800d0da:	e008      	b.n	800d0ee <HAL_RCCEx_GetPLL3ClockFreq+0x282>
    PLL3_Clocks->PLL3_P_Frequency = 0U;
 800d0dc:	687b      	ldr	r3, [r7, #4]
 800d0de:	2200      	movs	r2, #0
 800d0e0:	601a      	str	r2, [r3, #0]
    PLL3_Clocks->PLL3_Q_Frequency = 0U;
 800d0e2:	687b      	ldr	r3, [r7, #4]
 800d0e4:	2200      	movs	r2, #0
 800d0e6:	605a      	str	r2, [r3, #4]
    PLL3_Clocks->PLL3_R_Frequency = 0U;
 800d0e8:	687b      	ldr	r3, [r7, #4]
 800d0ea:	2200      	movs	r2, #0
 800d0ec:	609a      	str	r2, [r3, #8]
}
 800d0ee:	bf00      	nop
 800d0f0:	3724      	adds	r7, #36	@ 0x24
 800d0f2:	46bd      	mov	sp, r7
 800d0f4:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d0f8:	4770      	bx	lr
 800d0fa:	bf00      	nop
 800d0fc:	58024400 	.word	0x58024400
 800d100:	03d09000 	.word	0x03d09000
 800d104:	46000000 	.word	0x46000000
 800d108:	4c742400 	.word	0x4c742400
 800d10c:	4a742400 	.word	0x4a742400
 800d110:	4bbebc20 	.word	0x4bbebc20

0800d114 <RCCEx_PLL2_Config>:
  * @note   PLL2 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL2_Config(RCC_PLL2InitTypeDef *pll2, uint32_t Divider)
{
 800d114:	b580      	push	{r7, lr}
 800d116:	b084      	sub	sp, #16
 800d118:	af00      	add	r7, sp, #0
 800d11a:	6078      	str	r0, [r7, #4]
 800d11c:	6039      	str	r1, [r7, #0]

  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800d11e:	2300      	movs	r3, #0
 800d120:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL2RGE_VALUE(pll2->PLL2RGE));
  assert_param(IS_RCC_PLL2VCO_VALUE(pll2->PLL2VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll2->PLL2FRACN));

  /* Check that PLL2 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800d122:	4b53      	ldr	r3, [pc, #332]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d124:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800d126:	f003 0303 	and.w	r3, r3, #3
 800d12a:	2b03      	cmp	r3, #3
 800d12c:	d101      	bne.n	800d132 <RCCEx_PLL2_Config+0x1e>
  {
    return HAL_ERROR;
 800d12e:	2301      	movs	r3, #1
 800d130:	e099      	b.n	800d266 <RCCEx_PLL2_Config+0x152>


  else
  {
    /* Disable  PLL2. */
    __HAL_RCC_PLL2_DISABLE();
 800d132:	4b4f      	ldr	r3, [pc, #316]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d134:	681b      	ldr	r3, [r3, #0]
 800d136:	4a4e      	ldr	r2, [pc, #312]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d138:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800d13c:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800d13e:	f7f8 fc5b 	bl	80059f8 <HAL_GetTick>
 800d142:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL is disabled */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800d144:	e008      	b.n	800d158 <RCCEx_PLL2_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800d146:	f7f8 fc57 	bl	80059f8 <HAL_GetTick>
 800d14a:	4602      	mov	r2, r0
 800d14c:	68bb      	ldr	r3, [r7, #8]
 800d14e:	1ad3      	subs	r3, r2, r3
 800d150:	2b02      	cmp	r3, #2
 800d152:	d901      	bls.n	800d158 <RCCEx_PLL2_Config+0x44>
      {
        return HAL_TIMEOUT;
 800d154:	2303      	movs	r3, #3
 800d156:	e086      	b.n	800d266 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) != 0U)
 800d158:	4b45      	ldr	r3, [pc, #276]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d15a:	681b      	ldr	r3, [r3, #0]
 800d15c:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800d160:	2b00      	cmp	r3, #0
 800d162:	d1f0      	bne.n	800d146 <RCCEx_PLL2_Config+0x32>
      }
    }

    /* Configure PLL2 multiplication and division factors. */
    __HAL_RCC_PLL2_CONFIG(pll2->PLL2M,
 800d164:	4b42      	ldr	r3, [pc, #264]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d166:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800d168:	f423 327c 	bic.w	r2, r3, #258048	@ 0x3f000
 800d16c:	687b      	ldr	r3, [r7, #4]
 800d16e:	681b      	ldr	r3, [r3, #0]
 800d170:	031b      	lsls	r3, r3, #12
 800d172:	493f      	ldr	r1, [pc, #252]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d174:	4313      	orrs	r3, r2
 800d176:	628b      	str	r3, [r1, #40]	@ 0x28
 800d178:	687b      	ldr	r3, [r7, #4]
 800d17a:	685b      	ldr	r3, [r3, #4]
 800d17c:	3b01      	subs	r3, #1
 800d17e:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800d182:	687b      	ldr	r3, [r7, #4]
 800d184:	689b      	ldr	r3, [r3, #8]
 800d186:	3b01      	subs	r3, #1
 800d188:	025b      	lsls	r3, r3, #9
 800d18a:	b29b      	uxth	r3, r3
 800d18c:	431a      	orrs	r2, r3
 800d18e:	687b      	ldr	r3, [r7, #4]
 800d190:	68db      	ldr	r3, [r3, #12]
 800d192:	3b01      	subs	r3, #1
 800d194:	041b      	lsls	r3, r3, #16
 800d196:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800d19a:	431a      	orrs	r2, r3
 800d19c:	687b      	ldr	r3, [r7, #4]
 800d19e:	691b      	ldr	r3, [r3, #16]
 800d1a0:	3b01      	subs	r3, #1
 800d1a2:	061b      	lsls	r3, r3, #24
 800d1a4:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800d1a8:	4931      	ldr	r1, [pc, #196]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1aa:	4313      	orrs	r3, r2
 800d1ac:	638b      	str	r3, [r1, #56]	@ 0x38
                          pll2->PLL2P,
                          pll2->PLL2Q,
                          pll2->PLL2R);

    /* Select PLL2 input reference frequency range: VCI */
    __HAL_RCC_PLL2_VCIRANGE(pll2->PLL2RGE) ;
 800d1ae:	4b30      	ldr	r3, [pc, #192]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1b0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d1b2:	f023 02c0 	bic.w	r2, r3, #192	@ 0xc0
 800d1b6:	687b      	ldr	r3, [r7, #4]
 800d1b8:	695b      	ldr	r3, [r3, #20]
 800d1ba:	492d      	ldr	r1, [pc, #180]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1bc:	4313      	orrs	r3, r2
 800d1be:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL2 output frequency range : VCO */
    __HAL_RCC_PLL2_VCORANGE(pll2->PLL2VCOSEL) ;
 800d1c0:	4b2b      	ldr	r3, [pc, #172]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1c2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d1c4:	f023 0220 	bic.w	r2, r3, #32
 800d1c8:	687b      	ldr	r3, [r7, #4]
 800d1ca:	699b      	ldr	r3, [r3, #24]
 800d1cc:	4928      	ldr	r1, [pc, #160]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1ce:	4313      	orrs	r3, r2
 800d1d0:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_DISABLE();
 800d1d2:	4b27      	ldr	r3, [pc, #156]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1d4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d1d6:	4a26      	ldr	r2, [pc, #152]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1d8:	f023 0310 	bic.w	r3, r3, #16
 800d1dc:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL2 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL2FRACN_CONFIG(pll2->PLL2FRACN);
 800d1de:	4b24      	ldr	r3, [pc, #144]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1e0:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800d1e2:	4b24      	ldr	r3, [pc, #144]	@ (800d274 <RCCEx_PLL2_Config+0x160>)
 800d1e4:	4013      	ands	r3, r2
 800d1e6:	687a      	ldr	r2, [r7, #4]
 800d1e8:	69d2      	ldr	r2, [r2, #28]
 800d1ea:	00d2      	lsls	r2, r2, #3
 800d1ec:	4920      	ldr	r1, [pc, #128]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1ee:	4313      	orrs	r3, r2
 800d1f0:	63cb      	str	r3, [r1, #60]	@ 0x3c

    /* Enable PLL2FRACN . */
    __HAL_RCC_PLL2FRACN_ENABLE();
 800d1f2:	4b1f      	ldr	r3, [pc, #124]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1f4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d1f6:	4a1e      	ldr	r2, [pc, #120]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d1f8:	f043 0310 	orr.w	r3, r3, #16
 800d1fc:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL2 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800d1fe:	683b      	ldr	r3, [r7, #0]
 800d200:	2b00      	cmp	r3, #0
 800d202:	d106      	bne.n	800d212 <RCCEx_PLL2_Config+0xfe>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVP);
 800d204:	4b1a      	ldr	r3, [pc, #104]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d206:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d208:	4a19      	ldr	r2, [pc, #100]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d20a:	f443 2300 	orr.w	r3, r3, #524288	@ 0x80000
 800d20e:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800d210:	e00f      	b.n	800d232 <RCCEx_PLL2_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800d212:	683b      	ldr	r3, [r7, #0]
 800d214:	2b01      	cmp	r3, #1
 800d216:	d106      	bne.n	800d226 <RCCEx_PLL2_Config+0x112>
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVQ);
 800d218:	4b15      	ldr	r3, [pc, #84]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d21a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d21c:	4a14      	ldr	r2, [pc, #80]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d21e:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 800d222:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800d224:	e005      	b.n	800d232 <RCCEx_PLL2_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL2CLKOUT_ENABLE(RCC_PLL2_DIVR);
 800d226:	4b12      	ldr	r3, [pc, #72]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d228:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d22a:	4a11      	ldr	r2, [pc, #68]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d22c:	f443 1300 	orr.w	r3, r3, #2097152	@ 0x200000
 800d230:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL2. */
    __HAL_RCC_PLL2_ENABLE();
 800d232:	4b0f      	ldr	r3, [pc, #60]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d234:	681b      	ldr	r3, [r3, #0]
 800d236:	4a0e      	ldr	r2, [pc, #56]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d238:	f043 6380 	orr.w	r3, r3, #67108864	@ 0x4000000
 800d23c:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800d23e:	f7f8 fbdb 	bl	80059f8 <HAL_GetTick>
 800d242:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL2 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800d244:	e008      	b.n	800d258 <RCCEx_PLL2_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL2_TIMEOUT_VALUE)
 800d246:	f7f8 fbd7 	bl	80059f8 <HAL_GetTick>
 800d24a:	4602      	mov	r2, r0
 800d24c:	68bb      	ldr	r3, [r7, #8]
 800d24e:	1ad3      	subs	r3, r2, r3
 800d250:	2b02      	cmp	r3, #2
 800d252:	d901      	bls.n	800d258 <RCCEx_PLL2_Config+0x144>
      {
        return HAL_TIMEOUT;
 800d254:	2303      	movs	r3, #3
 800d256:	e006      	b.n	800d266 <RCCEx_PLL2_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL2RDY) == 0U)
 800d258:	4b05      	ldr	r3, [pc, #20]	@ (800d270 <RCCEx_PLL2_Config+0x15c>)
 800d25a:	681b      	ldr	r3, [r3, #0]
 800d25c:	f003 6300 	and.w	r3, r3, #134217728	@ 0x8000000
 800d260:	2b00      	cmp	r3, #0
 800d262:	d0f0      	beq.n	800d246 <RCCEx_PLL2_Config+0x132>
    }

  }


  return status;
 800d264:	7bfb      	ldrb	r3, [r7, #15]
}
 800d266:	4618      	mov	r0, r3
 800d268:	3710      	adds	r7, #16
 800d26a:	46bd      	mov	sp, r7
 800d26c:	bd80      	pop	{r7, pc}
 800d26e:	bf00      	nop
 800d270:	58024400 	.word	0x58024400
 800d274:	ffff0007 	.word	0xffff0007

0800d278 <RCCEx_PLL3_Config>:
  * @note   PLL3 is temporary disabled to apply new parameters
  *
  * @retval HAL status
  */
static HAL_StatusTypeDef RCCEx_PLL3_Config(RCC_PLL3InitTypeDef *pll3, uint32_t Divider)
{
 800d278:	b580      	push	{r7, lr}
 800d27a:	b084      	sub	sp, #16
 800d27c:	af00      	add	r7, sp, #0
 800d27e:	6078      	str	r0, [r7, #4]
 800d280:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800d282:	2300      	movs	r3, #0
 800d284:	73fb      	strb	r3, [r7, #15]
  assert_param(IS_RCC_PLL3RGE_VALUE(pll3->PLL3RGE));
  assert_param(IS_RCC_PLL3VCO_VALUE(pll3->PLL3VCOSEL));
  assert_param(IS_RCC_PLLFRACN_VALUE(pll3->PLL3FRACN));

  /* Check that PLL3 OSC clock source is already set */
  if (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_NONE)
 800d286:	4b53      	ldr	r3, [pc, #332]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d288:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800d28a:	f003 0303 	and.w	r3, r3, #3
 800d28e:	2b03      	cmp	r3, #3
 800d290:	d101      	bne.n	800d296 <RCCEx_PLL3_Config+0x1e>
  {
    return HAL_ERROR;
 800d292:	2301      	movs	r3, #1
 800d294:	e099      	b.n	800d3ca <RCCEx_PLL3_Config+0x152>


  else
  {
    /* Disable  PLL3. */
    __HAL_RCC_PLL3_DISABLE();
 800d296:	4b4f      	ldr	r3, [pc, #316]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d298:	681b      	ldr	r3, [r3, #0]
 800d29a:	4a4e      	ldr	r2, [pc, #312]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d29c:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800d2a0:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800d2a2:	f7f8 fba9 	bl	80059f8 <HAL_GetTick>
 800d2a6:	60b8      	str	r0, [r7, #8]
    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800d2a8:	e008      	b.n	800d2bc <RCCEx_PLL3_Config+0x44>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800d2aa:	f7f8 fba5 	bl	80059f8 <HAL_GetTick>
 800d2ae:	4602      	mov	r2, r0
 800d2b0:	68bb      	ldr	r3, [r7, #8]
 800d2b2:	1ad3      	subs	r3, r2, r3
 800d2b4:	2b02      	cmp	r3, #2
 800d2b6:	d901      	bls.n	800d2bc <RCCEx_PLL3_Config+0x44>
      {
        return HAL_TIMEOUT;
 800d2b8:	2303      	movs	r3, #3
 800d2ba:	e086      	b.n	800d3ca <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) != 0U)
 800d2bc:	4b45      	ldr	r3, [pc, #276]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d2be:	681b      	ldr	r3, [r3, #0]
 800d2c0:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800d2c4:	2b00      	cmp	r3, #0
 800d2c6:	d1f0      	bne.n	800d2aa <RCCEx_PLL3_Config+0x32>
      }
    }

    /* Configure the PLL3  multiplication and division factors. */
    __HAL_RCC_PLL3_CONFIG(pll3->PLL3M,
 800d2c8:	4b42      	ldr	r3, [pc, #264]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d2ca:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800d2cc:	f023 727c 	bic.w	r2, r3, #66060288	@ 0x3f00000
 800d2d0:	687b      	ldr	r3, [r7, #4]
 800d2d2:	681b      	ldr	r3, [r3, #0]
 800d2d4:	051b      	lsls	r3, r3, #20
 800d2d6:	493f      	ldr	r1, [pc, #252]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d2d8:	4313      	orrs	r3, r2
 800d2da:	628b      	str	r3, [r1, #40]	@ 0x28
 800d2dc:	687b      	ldr	r3, [r7, #4]
 800d2de:	685b      	ldr	r3, [r3, #4]
 800d2e0:	3b01      	subs	r3, #1
 800d2e2:	f3c3 0208 	ubfx	r2, r3, #0, #9
 800d2e6:	687b      	ldr	r3, [r7, #4]
 800d2e8:	689b      	ldr	r3, [r3, #8]
 800d2ea:	3b01      	subs	r3, #1
 800d2ec:	025b      	lsls	r3, r3, #9
 800d2ee:	b29b      	uxth	r3, r3
 800d2f0:	431a      	orrs	r2, r3
 800d2f2:	687b      	ldr	r3, [r7, #4]
 800d2f4:	68db      	ldr	r3, [r3, #12]
 800d2f6:	3b01      	subs	r3, #1
 800d2f8:	041b      	lsls	r3, r3, #16
 800d2fa:	f403 03fe 	and.w	r3, r3, #8323072	@ 0x7f0000
 800d2fe:	431a      	orrs	r2, r3
 800d300:	687b      	ldr	r3, [r7, #4]
 800d302:	691b      	ldr	r3, [r3, #16]
 800d304:	3b01      	subs	r3, #1
 800d306:	061b      	lsls	r3, r3, #24
 800d308:	f003 43fe 	and.w	r3, r3, #2130706432	@ 0x7f000000
 800d30c:	4931      	ldr	r1, [pc, #196]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d30e:	4313      	orrs	r3, r2
 800d310:	640b      	str	r3, [r1, #64]	@ 0x40
                          pll3->PLL3P,
                          pll3->PLL3Q,
                          pll3->PLL3R);

    /* Select PLL3 input reference frequency range: VCI */
    __HAL_RCC_PLL3_VCIRANGE(pll3->PLL3RGE) ;
 800d312:	4b30      	ldr	r3, [pc, #192]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d314:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d316:	f423 6240 	bic.w	r2, r3, #3072	@ 0xc00
 800d31a:	687b      	ldr	r3, [r7, #4]
 800d31c:	695b      	ldr	r3, [r3, #20]
 800d31e:	492d      	ldr	r1, [pc, #180]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d320:	4313      	orrs	r3, r2
 800d322:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Select PLL3 output frequency range : VCO */
    __HAL_RCC_PLL3_VCORANGE(pll3->PLL3VCOSEL) ;
 800d324:	4b2b      	ldr	r3, [pc, #172]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d326:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d328:	f423 7200 	bic.w	r2, r3, #512	@ 0x200
 800d32c:	687b      	ldr	r3, [r7, #4]
 800d32e:	699b      	ldr	r3, [r3, #24]
 800d330:	4928      	ldr	r1, [pc, #160]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d332:	4313      	orrs	r3, r2
 800d334:	62cb      	str	r3, [r1, #44]	@ 0x2c

    /* Disable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_DISABLE();
 800d336:	4b27      	ldr	r3, [pc, #156]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d338:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d33a:	4a26      	ldr	r2, [pc, #152]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d33c:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800d340:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Configures PLL3 clock Fractional Part Of The Multiplication Factor */
    __HAL_RCC_PLL3FRACN_CONFIG(pll3->PLL3FRACN);
 800d342:	4b24      	ldr	r3, [pc, #144]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d344:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800d346:	4b24      	ldr	r3, [pc, #144]	@ (800d3d8 <RCCEx_PLL3_Config+0x160>)
 800d348:	4013      	ands	r3, r2
 800d34a:	687a      	ldr	r2, [r7, #4]
 800d34c:	69d2      	ldr	r2, [r2, #28]
 800d34e:	00d2      	lsls	r2, r2, #3
 800d350:	4920      	ldr	r1, [pc, #128]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d352:	4313      	orrs	r3, r2
 800d354:	644b      	str	r3, [r1, #68]	@ 0x44

    /* Enable PLL3FRACN . */
    __HAL_RCC_PLL3FRACN_ENABLE();
 800d356:	4b1f      	ldr	r3, [pc, #124]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d358:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d35a:	4a1e      	ldr	r2, [pc, #120]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d35c:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800d360:	62d3      	str	r3, [r2, #44]	@ 0x2c

    /* Enable the PLL3 clock output */
    if (Divider == DIVIDER_P_UPDATE)
 800d362:	683b      	ldr	r3, [r7, #0]
 800d364:	2b00      	cmp	r3, #0
 800d366:	d106      	bne.n	800d376 <RCCEx_PLL3_Config+0xfe>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVP);
 800d368:	4b1a      	ldr	r3, [pc, #104]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d36a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d36c:	4a19      	ldr	r2, [pc, #100]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d36e:	f443 0380 	orr.w	r3, r3, #4194304	@ 0x400000
 800d372:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800d374:	e00f      	b.n	800d396 <RCCEx_PLL3_Config+0x11e>
    }
    else if (Divider == DIVIDER_Q_UPDATE)
 800d376:	683b      	ldr	r3, [r7, #0]
 800d378:	2b01      	cmp	r3, #1
 800d37a:	d106      	bne.n	800d38a <RCCEx_PLL3_Config+0x112>
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVQ);
 800d37c:	4b15      	ldr	r3, [pc, #84]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d37e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d380:	4a14      	ldr	r2, [pc, #80]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d382:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800d386:	62d3      	str	r3, [r2, #44]	@ 0x2c
 800d388:	e005      	b.n	800d396 <RCCEx_PLL3_Config+0x11e>
    }
    else
    {
      __HAL_RCC_PLL3CLKOUT_ENABLE(RCC_PLL3_DIVR);
 800d38a:	4b12      	ldr	r3, [pc, #72]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d38c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800d38e:	4a11      	ldr	r2, [pc, #68]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d390:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 800d394:	62d3      	str	r3, [r2, #44]	@ 0x2c
    }

    /* Enable  PLL3. */
    __HAL_RCC_PLL3_ENABLE();
 800d396:	4b0f      	ldr	r3, [pc, #60]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d398:	681b      	ldr	r3, [r3, #0]
 800d39a:	4a0e      	ldr	r2, [pc, #56]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d39c:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800d3a0:	6013      	str	r3, [r2, #0]

    /* Get Start Tick*/
    tickstart = HAL_GetTick();
 800d3a2:	f7f8 fb29 	bl	80059f8 <HAL_GetTick>
 800d3a6:	60b8      	str	r0, [r7, #8]

    /* Wait till PLL3 is ready */
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800d3a8:	e008      	b.n	800d3bc <RCCEx_PLL3_Config+0x144>
    {
      if ((HAL_GetTick() - tickstart) > PLL3_TIMEOUT_VALUE)
 800d3aa:	f7f8 fb25 	bl	80059f8 <HAL_GetTick>
 800d3ae:	4602      	mov	r2, r0
 800d3b0:	68bb      	ldr	r3, [r7, #8]
 800d3b2:	1ad3      	subs	r3, r2, r3
 800d3b4:	2b02      	cmp	r3, #2
 800d3b6:	d901      	bls.n	800d3bc <RCCEx_PLL3_Config+0x144>
      {
        return HAL_TIMEOUT;
 800d3b8:	2303      	movs	r3, #3
 800d3ba:	e006      	b.n	800d3ca <RCCEx_PLL3_Config+0x152>
    while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLL3RDY) == 0U)
 800d3bc:	4b05      	ldr	r3, [pc, #20]	@ (800d3d4 <RCCEx_PLL3_Config+0x15c>)
 800d3be:	681b      	ldr	r3, [r3, #0]
 800d3c0:	f003 5300 	and.w	r3, r3, #536870912	@ 0x20000000
 800d3c4:	2b00      	cmp	r3, #0
 800d3c6:	d0f0      	beq.n	800d3aa <RCCEx_PLL3_Config+0x132>
    }

  }


  return status;
 800d3c8:	7bfb      	ldrb	r3, [r7, #15]
}
 800d3ca:	4618      	mov	r0, r3
 800d3cc:	3710      	adds	r7, #16
 800d3ce:	46bd      	mov	sp, r7
 800d3d0:	bd80      	pop	{r7, pc}
 800d3d2:	bf00      	nop
 800d3d4:	58024400 	.word	0x58024400
 800d3d8:	ffff0007 	.word	0xffff0007

0800d3dc <HAL_RNG_Init>:
  * @param  hrng pointer to a RNG_HandleTypeDef structure that contains
  *                the configuration information for RNG.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
{
 800d3dc:	b580      	push	{r7, lr}
 800d3de:	b084      	sub	sp, #16
 800d3e0:	af00      	add	r7, sp, #0
 800d3e2:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;
  /* Check the RNG handle allocation */
  if (hrng == NULL)
 800d3e4:	687b      	ldr	r3, [r7, #4]
 800d3e6:	2b00      	cmp	r3, #0
 800d3e8:	d101      	bne.n	800d3ee <HAL_RNG_Init+0x12>
  {
    return HAL_ERROR;
 800d3ea:	2301      	movs	r3, #1
 800d3ec:	e054      	b.n	800d498 <HAL_RNG_Init+0xbc>

    /* Init the low level hardware */
    hrng->MspInitCallback(hrng);
  }
#else
  if (hrng->State == HAL_RNG_STATE_RESET)
 800d3ee:	687b      	ldr	r3, [r7, #4]
 800d3f0:	7a5b      	ldrb	r3, [r3, #9]
 800d3f2:	b2db      	uxtb	r3, r3
 800d3f4:	2b00      	cmp	r3, #0
 800d3f6:	d105      	bne.n	800d404 <HAL_RNG_Init+0x28>
  {
    /* Allocate lock resource and initialize it */
    hrng->Lock = HAL_UNLOCKED;
 800d3f8:	687b      	ldr	r3, [r7, #4]
 800d3fa:	2200      	movs	r2, #0
 800d3fc:	721a      	strb	r2, [r3, #8]

    /* Init the low level hardware */
    HAL_RNG_MspInit(hrng);
 800d3fe:	6878      	ldr	r0, [r7, #4]
 800d400:	f7f6 fc12 	bl	8003c28 <HAL_RNG_MspInit>
  }
#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */

  /* Change RNG peripheral state */
  hrng->State = HAL_RNG_STATE_BUSY;
 800d404:	687b      	ldr	r3, [r7, #4]
 800d406:	2202      	movs	r2, #2
 800d408:	725a      	strb	r2, [r3, #9]
      }
    }
  }
#else
  /* Clock Error Detection Configuration */
  MODIFY_REG(hrng->Instance->CR, RNG_CR_CED, hrng->Init.ClockErrorDetection);
 800d40a:	687b      	ldr	r3, [r7, #4]
 800d40c:	681b      	ldr	r3, [r3, #0]
 800d40e:	681b      	ldr	r3, [r3, #0]
 800d410:	f023 0120 	bic.w	r1, r3, #32
 800d414:	687b      	ldr	r3, [r7, #4]
 800d416:	685a      	ldr	r2, [r3, #4]
 800d418:	687b      	ldr	r3, [r7, #4]
 800d41a:	681b      	ldr	r3, [r3, #0]
 800d41c:	430a      	orrs	r2, r1
 800d41e:	601a      	str	r2, [r3, #0]
#endif /* RNG_CR_CONDRST */

  /* Enable the RNG Peripheral */
  __HAL_RNG_ENABLE(hrng);
 800d420:	687b      	ldr	r3, [r7, #4]
 800d422:	681b      	ldr	r3, [r3, #0]
 800d424:	681a      	ldr	r2, [r3, #0]
 800d426:	687b      	ldr	r3, [r7, #4]
 800d428:	681b      	ldr	r3, [r3, #0]
 800d42a:	f042 0204 	orr.w	r2, r2, #4
 800d42e:	601a      	str	r2, [r3, #0]

  /* verify that no seed error */
  if (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)
 800d430:	687b      	ldr	r3, [r7, #4]
 800d432:	681b      	ldr	r3, [r3, #0]
 800d434:	685b      	ldr	r3, [r3, #4]
 800d436:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d43a:	2b40      	cmp	r3, #64	@ 0x40
 800d43c:	d104      	bne.n	800d448 <HAL_RNG_Init+0x6c>
  {
    hrng->State = HAL_RNG_STATE_ERROR;
 800d43e:	687b      	ldr	r3, [r7, #4]
 800d440:	2204      	movs	r2, #4
 800d442:	725a      	strb	r2, [r3, #9]
    return HAL_ERROR;
 800d444:	2301      	movs	r3, #1
 800d446:	e027      	b.n	800d498 <HAL_RNG_Init+0xbc>
  }
  /* Get tick */
  tickstart = HAL_GetTick();
 800d448:	f7f8 fad6 	bl	80059f8 <HAL_GetTick>
 800d44c:	60f8      	str	r0, [r7, #12]
  /* Check if data register contains valid random data */
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800d44e:	e015      	b.n	800d47c <HAL_RNG_Init+0xa0>
  {
    if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800d450:	f7f8 fad2 	bl	80059f8 <HAL_GetTick>
 800d454:	4602      	mov	r2, r0
 800d456:	68fb      	ldr	r3, [r7, #12]
 800d458:	1ad3      	subs	r3, r2, r3
 800d45a:	2b02      	cmp	r3, #2
 800d45c:	d90e      	bls.n	800d47c <HAL_RNG_Init+0xa0>
    {
      /* New check to avoid false timeout detection in case of preemption */
      if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800d45e:	687b      	ldr	r3, [r7, #4]
 800d460:	681b      	ldr	r3, [r3, #0]
 800d462:	685b      	ldr	r3, [r3, #4]
 800d464:	f003 0304 	and.w	r3, r3, #4
 800d468:	2b04      	cmp	r3, #4
 800d46a:	d107      	bne.n	800d47c <HAL_RNG_Init+0xa0>
      {
        hrng->State = HAL_RNG_STATE_ERROR;
 800d46c:	687b      	ldr	r3, [r7, #4]
 800d46e:	2204      	movs	r2, #4
 800d470:	725a      	strb	r2, [r3, #9]
        hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800d472:	687b      	ldr	r3, [r7, #4]
 800d474:	2202      	movs	r2, #2
 800d476:	60da      	str	r2, [r3, #12]
        return HAL_ERROR;
 800d478:	2301      	movs	r3, #1
 800d47a:	e00d      	b.n	800d498 <HAL_RNG_Init+0xbc>
  while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_SECS) != RESET)
 800d47c:	687b      	ldr	r3, [r7, #4]
 800d47e:	681b      	ldr	r3, [r3, #0]
 800d480:	685b      	ldr	r3, [r3, #4]
 800d482:	f003 0304 	and.w	r3, r3, #4
 800d486:	2b04      	cmp	r3, #4
 800d488:	d0e2      	beq.n	800d450 <HAL_RNG_Init+0x74>
      }
    }
  }

  /* Initialize the RNG state */
  hrng->State = HAL_RNG_STATE_READY;
 800d48a:	687b      	ldr	r3, [r7, #4]
 800d48c:	2201      	movs	r2, #1
 800d48e:	725a      	strb	r2, [r3, #9]

  /* Initialise the error code */
  hrng->ErrorCode = HAL_RNG_ERROR_NONE;
 800d490:	687b      	ldr	r3, [r7, #4]
 800d492:	2200      	movs	r2, #0
 800d494:	60da      	str	r2, [r3, #12]

  /* Return function status */
  return HAL_OK;
 800d496:	2300      	movs	r3, #0
}
 800d498:	4618      	mov	r0, r3
 800d49a:	3710      	adds	r7, #16
 800d49c:	46bd      	mov	sp, r7
 800d49e:	bd80      	pop	{r7, pc}

0800d4a0 <HAL_RNG_GenerateRandomNumber>:
  * @param  random32bit pointer to generated random number variable if successful.
  * @retval HAL status
  */

HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit)
{
 800d4a0:	b580      	push	{r7, lr}
 800d4a2:	b084      	sub	sp, #16
 800d4a4:	af00      	add	r7, sp, #0
 800d4a6:	6078      	str	r0, [r7, #4]
 800d4a8:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;
  HAL_StatusTypeDef status = HAL_OK;
 800d4aa:	2300      	movs	r3, #0
 800d4ac:	73fb      	strb	r3, [r7, #15]

  /* Process Locked */
  __HAL_LOCK(hrng);
 800d4ae:	687b      	ldr	r3, [r7, #4]
 800d4b0:	7a1b      	ldrb	r3, [r3, #8]
 800d4b2:	2b01      	cmp	r3, #1
 800d4b4:	d101      	bne.n	800d4ba <HAL_RNG_GenerateRandomNumber+0x1a>
 800d4b6:	2302      	movs	r3, #2
 800d4b8:	e044      	b.n	800d544 <HAL_RNG_GenerateRandomNumber+0xa4>
 800d4ba:	687b      	ldr	r3, [r7, #4]
 800d4bc:	2201      	movs	r2, #1
 800d4be:	721a      	strb	r2, [r3, #8]

  /* Check RNG peripheral state */
  if (hrng->State == HAL_RNG_STATE_READY)
 800d4c0:	687b      	ldr	r3, [r7, #4]
 800d4c2:	7a5b      	ldrb	r3, [r3, #9]
 800d4c4:	b2db      	uxtb	r3, r3
 800d4c6:	2b01      	cmp	r3, #1
 800d4c8:	d133      	bne.n	800d532 <HAL_RNG_GenerateRandomNumber+0x92>
  {
    /* Change RNG peripheral state */
    hrng->State = HAL_RNG_STATE_BUSY;
 800d4ca:	687b      	ldr	r3, [r7, #4]
 800d4cc:	2202      	movs	r2, #2
 800d4ce:	725a      	strb	r2, [r3, #9]
      }
    }
#endif /* RNG_CR_CONDRST */

    /* Get tick */
    tickstart = HAL_GetTick();
 800d4d0:	f7f8 fa92 	bl	80059f8 <HAL_GetTick>
 800d4d4:	60b8      	str	r0, [r7, #8]

    /* Check if data register contains valid random data */
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800d4d6:	e018      	b.n	800d50a <HAL_RNG_GenerateRandomNumber+0x6a>
    {
      if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE)
 800d4d8:	f7f8 fa8e 	bl	80059f8 <HAL_GetTick>
 800d4dc:	4602      	mov	r2, r0
 800d4de:	68bb      	ldr	r3, [r7, #8]
 800d4e0:	1ad3      	subs	r3, r2, r3
 800d4e2:	2b02      	cmp	r3, #2
 800d4e4:	d911      	bls.n	800d50a <HAL_RNG_GenerateRandomNumber+0x6a>
      {
        /* New check to avoid false timeout detection in case of preemption */
        if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800d4e6:	687b      	ldr	r3, [r7, #4]
 800d4e8:	681b      	ldr	r3, [r3, #0]
 800d4ea:	685b      	ldr	r3, [r3, #4]
 800d4ec:	f003 0301 	and.w	r3, r3, #1
 800d4f0:	2b01      	cmp	r3, #1
 800d4f2:	d00a      	beq.n	800d50a <HAL_RNG_GenerateRandomNumber+0x6a>
        {
          hrng->State = HAL_RNG_STATE_READY;
 800d4f4:	687b      	ldr	r3, [r7, #4]
 800d4f6:	2201      	movs	r2, #1
 800d4f8:	725a      	strb	r2, [r3, #9]
          hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT;
 800d4fa:	687b      	ldr	r3, [r7, #4]
 800d4fc:	2202      	movs	r2, #2
 800d4fe:	60da      	str	r2, [r3, #12]
          /* Process Unlocked */
          __HAL_UNLOCK(hrng);
 800d500:	687b      	ldr	r3, [r7, #4]
 800d502:	2200      	movs	r2, #0
 800d504:	721a      	strb	r2, [r3, #8]
          return HAL_ERROR;
 800d506:	2301      	movs	r3, #1
 800d508:	e01c      	b.n	800d544 <HAL_RNG_GenerateRandomNumber+0xa4>
    while (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET)
 800d50a:	687b      	ldr	r3, [r7, #4]
 800d50c:	681b      	ldr	r3, [r3, #0]
 800d50e:	685b      	ldr	r3, [r3, #4]
 800d510:	f003 0301 	and.w	r3, r3, #1
 800d514:	2b01      	cmp	r3, #1
 800d516:	d1df      	bne.n	800d4d8 <HAL_RNG_GenerateRandomNumber+0x38>
        }
      }
    }

    /* Get a 32bit Random number */
    hrng->RandomNumber = hrng->Instance->DR;
 800d518:	687b      	ldr	r3, [r7, #4]
 800d51a:	681b      	ldr	r3, [r3, #0]
 800d51c:	689a      	ldr	r2, [r3, #8]
 800d51e:	687b      	ldr	r3, [r7, #4]
 800d520:	611a      	str	r2, [r3, #16]
    else /* No seed error */
    {
      *random32bit = hrng->RandomNumber;
    }
#else
    *random32bit = hrng->RandomNumber;
 800d522:	687b      	ldr	r3, [r7, #4]
 800d524:	691a      	ldr	r2, [r3, #16]
 800d526:	683b      	ldr	r3, [r7, #0]
 800d528:	601a      	str	r2, [r3, #0]

#endif /* RNG_CR_CONDRST */
    hrng->State = HAL_RNG_STATE_READY;
 800d52a:	687b      	ldr	r3, [r7, #4]
 800d52c:	2201      	movs	r2, #1
 800d52e:	725a      	strb	r2, [r3, #9]
 800d530:	e004      	b.n	800d53c <HAL_RNG_GenerateRandomNumber+0x9c>
  }
  else
  {
    hrng->ErrorCode = HAL_RNG_ERROR_BUSY;
 800d532:	687b      	ldr	r3, [r7, #4]
 800d534:	2204      	movs	r2, #4
 800d536:	60da      	str	r2, [r3, #12]
    status = HAL_ERROR;
 800d538:	2301      	movs	r3, #1
 800d53a:	73fb      	strb	r3, [r7, #15]
  }

  /* Process Unlocked */
  __HAL_UNLOCK(hrng);
 800d53c:	687b      	ldr	r3, [r7, #4]
 800d53e:	2200      	movs	r2, #0
 800d540:	721a      	strb	r2, [r3, #8]

  return status;
 800d542:	7bfb      	ldrb	r3, [r7, #15]
}
 800d544:	4618      	mov	r0, r3
 800d546:	3710      	adds	r7, #16
 800d548:	46bd      	mov	sp, r7
 800d54a:	bd80      	pop	{r7, pc}

0800d54c <HAL_TIM_Base_Init>:
  *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
 800d54c:	b580      	push	{r7, lr}
 800d54e:	b082      	sub	sp, #8
 800d550:	af00      	add	r7, sp, #0
 800d552:	6078      	str	r0, [r7, #4]
  /* Check the TIM handle allocation */
  if (htim == NULL)
 800d554:	687b      	ldr	r3, [r7, #4]
 800d556:	2b00      	cmp	r3, #0
 800d558:	d101      	bne.n	800d55e <HAL_TIM_Base_Init+0x12>
  {
    return HAL_ERROR;
 800d55a:	2301      	movs	r3, #1
 800d55c:	e049      	b.n	800d5f2 <HAL_TIM_Base_Init+0xa6>
  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));

  if (htim->State == HAL_TIM_STATE_RESET)
 800d55e:	687b      	ldr	r3, [r7, #4]
 800d560:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800d564:	b2db      	uxtb	r3, r3
 800d566:	2b00      	cmp	r3, #0
 800d568:	d106      	bne.n	800d578 <HAL_TIM_Base_Init+0x2c>
  {
    /* Allocate lock resource and initialize it */
    htim->Lock = HAL_UNLOCKED;
 800d56a:	687b      	ldr	r3, [r7, #4]
 800d56c:	2200      	movs	r2, #0
 800d56e:	f883 203c 	strb.w	r2, [r3, #60]	@ 0x3c
    }
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    htim->Base_MspInitCallback(htim);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    HAL_TIM_Base_MspInit(htim);
 800d572:	6878      	ldr	r0, [r7, #4]
 800d574:	f000 f841 	bl	800d5fa <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800d578:	687b      	ldr	r3, [r7, #4]
 800d57a:	2202      	movs	r2, #2
 800d57c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Set the Time Base configuration */
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
 800d580:	687b      	ldr	r3, [r7, #4]
 800d582:	681a      	ldr	r2, [r3, #0]
 800d584:	687b      	ldr	r3, [r7, #4]
 800d586:	3304      	adds	r3, #4
 800d588:	4619      	mov	r1, r3
 800d58a:	4610      	mov	r0, r2
 800d58c:	f000 f9e8 	bl	800d960 <TIM_Base_SetConfig>

  /* Initialize the DMA burst operation state */
  htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
 800d590:	687b      	ldr	r3, [r7, #4]
 800d592:	2201      	movs	r2, #1
 800d594:	f883 2048 	strb.w	r2, [r3, #72]	@ 0x48

  /* Initialize the TIM channels state */
  TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800d598:	687b      	ldr	r3, [r7, #4]
 800d59a:	2201      	movs	r2, #1
 800d59c:	f883 203e 	strb.w	r2, [r3, #62]	@ 0x3e
 800d5a0:	687b      	ldr	r3, [r7, #4]
 800d5a2:	2201      	movs	r2, #1
 800d5a4:	f883 203f 	strb.w	r2, [r3, #63]	@ 0x3f
 800d5a8:	687b      	ldr	r3, [r7, #4]
 800d5aa:	2201      	movs	r2, #1
 800d5ac:	f883 2040 	strb.w	r2, [r3, #64]	@ 0x40
 800d5b0:	687b      	ldr	r3, [r7, #4]
 800d5b2:	2201      	movs	r2, #1
 800d5b4:	f883 2041 	strb.w	r2, [r3, #65]	@ 0x41
 800d5b8:	687b      	ldr	r3, [r7, #4]
 800d5ba:	2201      	movs	r2, #1
 800d5bc:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
 800d5c0:	687b      	ldr	r3, [r7, #4]
 800d5c2:	2201      	movs	r2, #1
 800d5c4:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
  TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
 800d5c8:	687b      	ldr	r3, [r7, #4]
 800d5ca:	2201      	movs	r2, #1
 800d5cc:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 800d5d0:	687b      	ldr	r3, [r7, #4]
 800d5d2:	2201      	movs	r2, #1
 800d5d4:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 800d5d8:	687b      	ldr	r3, [r7, #4]
 800d5da:	2201      	movs	r2, #1
 800d5dc:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
 800d5e0:	687b      	ldr	r3, [r7, #4]
 800d5e2:	2201      	movs	r2, #1
 800d5e4:	f883 2047 	strb.w	r2, [r3, #71]	@ 0x47

  /* Initialize the TIM state*/
  htim->State = HAL_TIM_STATE_READY;
 800d5e8:	687b      	ldr	r3, [r7, #4]
 800d5ea:	2201      	movs	r2, #1
 800d5ec:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  return HAL_OK;
 800d5f0:	2300      	movs	r3, #0
}
 800d5f2:	4618      	mov	r0, r3
 800d5f4:	3708      	adds	r7, #8
 800d5f6:	46bd      	mov	sp, r7
 800d5f8:	bd80      	pop	{r7, pc}

0800d5fa <HAL_TIM_Base_MspInit>:
  * @brief  Initializes the TIM Base MSP.
  * @param  htim TIM Base handle
  * @retval None
  */
__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
{
 800d5fa:	b480      	push	{r7}
 800d5fc:	b083      	sub	sp, #12
 800d5fe:	af00      	add	r7, sp, #0
 800d600:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_Base_MspInit could be implemented in the user file
   */
}
 800d602:	bf00      	nop
 800d604:	370c      	adds	r7, #12
 800d606:	46bd      	mov	sp, r7
 800d608:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d60c:	4770      	bx	lr
	...

0800d610 <HAL_TIM_Base_Start_IT>:
  * @brief  Starts the TIM Base generation in interrupt mode.
  * @param  htim TIM Base handle
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
{
 800d610:	b480      	push	{r7}
 800d612:	b085      	sub	sp, #20
 800d614:	af00      	add	r7, sp, #0
 800d616:	6078      	str	r0, [r7, #4]

  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

  /* Check the TIM state */
  if (htim->State != HAL_TIM_STATE_READY)
 800d618:	687b      	ldr	r3, [r7, #4]
 800d61a:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 800d61e:	b2db      	uxtb	r3, r3
 800d620:	2b01      	cmp	r3, #1
 800d622:	d001      	beq.n	800d628 <HAL_TIM_Base_Start_IT+0x18>
  {
    return HAL_ERROR;
 800d624:	2301      	movs	r3, #1
 800d626:	e054      	b.n	800d6d2 <HAL_TIM_Base_Start_IT+0xc2>
  }

  /* Set the TIM state */
  htim->State = HAL_TIM_STATE_BUSY;
 800d628:	687b      	ldr	r3, [r7, #4]
 800d62a:	2202      	movs	r2, #2
 800d62c:	f883 203d 	strb.w	r2, [r3, #61]	@ 0x3d

  /* Enable the TIM Update interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
 800d630:	687b      	ldr	r3, [r7, #4]
 800d632:	681b      	ldr	r3, [r3, #0]
 800d634:	68da      	ldr	r2, [r3, #12]
 800d636:	687b      	ldr	r3, [r7, #4]
 800d638:	681b      	ldr	r3, [r3, #0]
 800d63a:	f042 0201 	orr.w	r2, r2, #1
 800d63e:	60da      	str	r2, [r3, #12]

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
 800d640:	687b      	ldr	r3, [r7, #4]
 800d642:	681b      	ldr	r3, [r3, #0]
 800d644:	4a26      	ldr	r2, [pc, #152]	@ (800d6e0 <HAL_TIM_Base_Start_IT+0xd0>)
 800d646:	4293      	cmp	r3, r2
 800d648:	d022      	beq.n	800d690 <HAL_TIM_Base_Start_IT+0x80>
 800d64a:	687b      	ldr	r3, [r7, #4]
 800d64c:	681b      	ldr	r3, [r3, #0]
 800d64e:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800d652:	d01d      	beq.n	800d690 <HAL_TIM_Base_Start_IT+0x80>
 800d654:	687b      	ldr	r3, [r7, #4]
 800d656:	681b      	ldr	r3, [r3, #0]
 800d658:	4a22      	ldr	r2, [pc, #136]	@ (800d6e4 <HAL_TIM_Base_Start_IT+0xd4>)
 800d65a:	4293      	cmp	r3, r2
 800d65c:	d018      	beq.n	800d690 <HAL_TIM_Base_Start_IT+0x80>
 800d65e:	687b      	ldr	r3, [r7, #4]
 800d660:	681b      	ldr	r3, [r3, #0]
 800d662:	4a21      	ldr	r2, [pc, #132]	@ (800d6e8 <HAL_TIM_Base_Start_IT+0xd8>)
 800d664:	4293      	cmp	r3, r2
 800d666:	d013      	beq.n	800d690 <HAL_TIM_Base_Start_IT+0x80>
 800d668:	687b      	ldr	r3, [r7, #4]
 800d66a:	681b      	ldr	r3, [r3, #0]
 800d66c:	4a1f      	ldr	r2, [pc, #124]	@ (800d6ec <HAL_TIM_Base_Start_IT+0xdc>)
 800d66e:	4293      	cmp	r3, r2
 800d670:	d00e      	beq.n	800d690 <HAL_TIM_Base_Start_IT+0x80>
 800d672:	687b      	ldr	r3, [r7, #4]
 800d674:	681b      	ldr	r3, [r3, #0]
 800d676:	4a1e      	ldr	r2, [pc, #120]	@ (800d6f0 <HAL_TIM_Base_Start_IT+0xe0>)
 800d678:	4293      	cmp	r3, r2
 800d67a:	d009      	beq.n	800d690 <HAL_TIM_Base_Start_IT+0x80>
 800d67c:	687b      	ldr	r3, [r7, #4]
 800d67e:	681b      	ldr	r3, [r3, #0]
 800d680:	4a1c      	ldr	r2, [pc, #112]	@ (800d6f4 <HAL_TIM_Base_Start_IT+0xe4>)
 800d682:	4293      	cmp	r3, r2
 800d684:	d004      	beq.n	800d690 <HAL_TIM_Base_Start_IT+0x80>
 800d686:	687b      	ldr	r3, [r7, #4]
 800d688:	681b      	ldr	r3, [r3, #0]
 800d68a:	4a1b      	ldr	r2, [pc, #108]	@ (800d6f8 <HAL_TIM_Base_Start_IT+0xe8>)
 800d68c:	4293      	cmp	r3, r2
 800d68e:	d115      	bne.n	800d6bc <HAL_TIM_Base_Start_IT+0xac>
  {
    tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
 800d690:	687b      	ldr	r3, [r7, #4]
 800d692:	681b      	ldr	r3, [r3, #0]
 800d694:	689a      	ldr	r2, [r3, #8]
 800d696:	4b19      	ldr	r3, [pc, #100]	@ (800d6fc <HAL_TIM_Base_Start_IT+0xec>)
 800d698:	4013      	ands	r3, r2
 800d69a:	60fb      	str	r3, [r7, #12]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800d69c:	68fb      	ldr	r3, [r7, #12]
 800d69e:	2b06      	cmp	r3, #6
 800d6a0:	d015      	beq.n	800d6ce <HAL_TIM_Base_Start_IT+0xbe>
 800d6a2:	68fb      	ldr	r3, [r7, #12]
 800d6a4:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800d6a8:	d011      	beq.n	800d6ce <HAL_TIM_Base_Start_IT+0xbe>
    {
      __HAL_TIM_ENABLE(htim);
 800d6aa:	687b      	ldr	r3, [r7, #4]
 800d6ac:	681b      	ldr	r3, [r3, #0]
 800d6ae:	681a      	ldr	r2, [r3, #0]
 800d6b0:	687b      	ldr	r3, [r7, #4]
 800d6b2:	681b      	ldr	r3, [r3, #0]
 800d6b4:	f042 0201 	orr.w	r2, r2, #1
 800d6b8:	601a      	str	r2, [r3, #0]
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800d6ba:	e008      	b.n	800d6ce <HAL_TIM_Base_Start_IT+0xbe>
    }
  }
  else
  {
    __HAL_TIM_ENABLE(htim);
 800d6bc:	687b      	ldr	r3, [r7, #4]
 800d6be:	681b      	ldr	r3, [r3, #0]
 800d6c0:	681a      	ldr	r2, [r3, #0]
 800d6c2:	687b      	ldr	r3, [r7, #4]
 800d6c4:	681b      	ldr	r3, [r3, #0]
 800d6c6:	f042 0201 	orr.w	r2, r2, #1
 800d6ca:	601a      	str	r2, [r3, #0]
 800d6cc:	e000      	b.n	800d6d0 <HAL_TIM_Base_Start_IT+0xc0>
    if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
 800d6ce:	bf00      	nop
  }

  /* Return function status */
  return HAL_OK;
 800d6d0:	2300      	movs	r3, #0
}
 800d6d2:	4618      	mov	r0, r3
 800d6d4:	3714      	adds	r7, #20
 800d6d6:	46bd      	mov	sp, r7
 800d6d8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d6dc:	4770      	bx	lr
 800d6de:	bf00      	nop
 800d6e0:	40010000 	.word	0x40010000
 800d6e4:	40000400 	.word	0x40000400
 800d6e8:	40000800 	.word	0x40000800
 800d6ec:	40000c00 	.word	0x40000c00
 800d6f0:	40010400 	.word	0x40010400
 800d6f4:	40001800 	.word	0x40001800
 800d6f8:	40014000 	.word	0x40014000
 800d6fc:	00010007 	.word	0x00010007

0800d700 <HAL_TIM_IRQHandler>:
  * @brief  This function handles TIM interrupts requests.
  * @param  htim TIM  handle
  * @retval None
  */
void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
{
 800d700:	b580      	push	{r7, lr}
 800d702:	b084      	sub	sp, #16
 800d704:	af00      	add	r7, sp, #0
 800d706:	6078      	str	r0, [r7, #4]
  uint32_t itsource = htim->Instance->DIER;
 800d708:	687b      	ldr	r3, [r7, #4]
 800d70a:	681b      	ldr	r3, [r3, #0]
 800d70c:	68db      	ldr	r3, [r3, #12]
 800d70e:	60fb      	str	r3, [r7, #12]
  uint32_t itflag   = htim->Instance->SR;
 800d710:	687b      	ldr	r3, [r7, #4]
 800d712:	681b      	ldr	r3, [r3, #0]
 800d714:	691b      	ldr	r3, [r3, #16]
 800d716:	60bb      	str	r3, [r7, #8]

  /* Capture compare 1 event */
  if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1))
 800d718:	68bb      	ldr	r3, [r7, #8]
 800d71a:	f003 0302 	and.w	r3, r3, #2
 800d71e:	2b00      	cmp	r3, #0
 800d720:	d020      	beq.n	800d764 <HAL_TIM_IRQHandler+0x64>
  {
    if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1))
 800d722:	68fb      	ldr	r3, [r7, #12]
 800d724:	f003 0302 	and.w	r3, r3, #2
 800d728:	2b00      	cmp	r3, #0
 800d72a:	d01b      	beq.n	800d764 <HAL_TIM_IRQHandler+0x64>
    {
      {
        __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1);
 800d72c:	687b      	ldr	r3, [r7, #4]
 800d72e:	681b      	ldr	r3, [r3, #0]
 800d730:	f06f 0202 	mvn.w	r2, #2
 800d734:	611a      	str	r2, [r3, #16]
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
 800d736:	687b      	ldr	r3, [r7, #4]
 800d738:	2201      	movs	r2, #1
 800d73a:	771a      	strb	r2, [r3, #28]

        /* Input capture event */
        if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
 800d73c:	687b      	ldr	r3, [r7, #4]
 800d73e:	681b      	ldr	r3, [r3, #0]
 800d740:	699b      	ldr	r3, [r3, #24]
 800d742:	f003 0303 	and.w	r3, r3, #3
 800d746:	2b00      	cmp	r3, #0
 800d748:	d003      	beq.n	800d752 <HAL_TIM_IRQHandler+0x52>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->IC_CaptureCallback(htim);
#else
          HAL_TIM_IC_CaptureCallback(htim);
 800d74a:	6878      	ldr	r0, [r7, #4]
 800d74c:	f000 f8e9 	bl	800d922 <HAL_TIM_IC_CaptureCallback>
 800d750:	e005      	b.n	800d75e <HAL_TIM_IRQHandler+0x5e>
        {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
          htim->OC_DelayElapsedCallback(htim);
          htim->PWM_PulseFinishedCallback(htim);
#else
          HAL_TIM_OC_DelayElapsedCallback(htim);
 800d752:	6878      	ldr	r0, [r7, #4]
 800d754:	f000 f8db 	bl	800d90e <HAL_TIM_OC_DelayElapsedCallback>
          HAL_TIM_PWM_PulseFinishedCallback(htim);
 800d758:	6878      	ldr	r0, [r7, #4]
 800d75a:	f000 f8ec 	bl	800d936 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
        }
        htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800d75e:	687b      	ldr	r3, [r7, #4]
 800d760:	2200      	movs	r2, #0
 800d762:	771a      	strb	r2, [r3, #28]
      }
    }
  }
  /* Capture compare 2 event */
  if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2))
 800d764:	68bb      	ldr	r3, [r7, #8]
 800d766:	f003 0304 	and.w	r3, r3, #4
 800d76a:	2b00      	cmp	r3, #0
 800d76c:	d020      	beq.n	800d7b0 <HAL_TIM_IRQHandler+0xb0>
  {
    if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2))
 800d76e:	68fb      	ldr	r3, [r7, #12]
 800d770:	f003 0304 	and.w	r3, r3, #4
 800d774:	2b00      	cmp	r3, #0
 800d776:	d01b      	beq.n	800d7b0 <HAL_TIM_IRQHandler+0xb0>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2);
 800d778:	687b      	ldr	r3, [r7, #4]
 800d77a:	681b      	ldr	r3, [r3, #0]
 800d77c:	f06f 0204 	mvn.w	r2, #4
 800d780:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
 800d782:	687b      	ldr	r3, [r7, #4]
 800d784:	2202      	movs	r2, #2
 800d786:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
 800d788:	687b      	ldr	r3, [r7, #4]
 800d78a:	681b      	ldr	r3, [r3, #0]
 800d78c:	699b      	ldr	r3, [r3, #24]
 800d78e:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800d792:	2b00      	cmp	r3, #0
 800d794:	d003      	beq.n	800d79e <HAL_TIM_IRQHandler+0x9e>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800d796:	6878      	ldr	r0, [r7, #4]
 800d798:	f000 f8c3 	bl	800d922 <HAL_TIM_IC_CaptureCallback>
 800d79c:	e005      	b.n	800d7aa <HAL_TIM_IRQHandler+0xaa>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800d79e:	6878      	ldr	r0, [r7, #4]
 800d7a0:	f000 f8b5 	bl	800d90e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800d7a4:	6878      	ldr	r0, [r7, #4]
 800d7a6:	f000 f8c6 	bl	800d936 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800d7aa:	687b      	ldr	r3, [r7, #4]
 800d7ac:	2200      	movs	r2, #0
 800d7ae:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 3 event */
  if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3))
 800d7b0:	68bb      	ldr	r3, [r7, #8]
 800d7b2:	f003 0308 	and.w	r3, r3, #8
 800d7b6:	2b00      	cmp	r3, #0
 800d7b8:	d020      	beq.n	800d7fc <HAL_TIM_IRQHandler+0xfc>
  {
    if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
 800d7ba:	68fb      	ldr	r3, [r7, #12]
 800d7bc:	f003 0308 	and.w	r3, r3, #8
 800d7c0:	2b00      	cmp	r3, #0
 800d7c2:	d01b      	beq.n	800d7fc <HAL_TIM_IRQHandler+0xfc>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
 800d7c4:	687b      	ldr	r3, [r7, #4]
 800d7c6:	681b      	ldr	r3, [r3, #0]
 800d7c8:	f06f 0208 	mvn.w	r2, #8
 800d7cc:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
 800d7ce:	687b      	ldr	r3, [r7, #4]
 800d7d0:	2204      	movs	r2, #4
 800d7d2:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
 800d7d4:	687b      	ldr	r3, [r7, #4]
 800d7d6:	681b      	ldr	r3, [r3, #0]
 800d7d8:	69db      	ldr	r3, [r3, #28]
 800d7da:	f003 0303 	and.w	r3, r3, #3
 800d7de:	2b00      	cmp	r3, #0
 800d7e0:	d003      	beq.n	800d7ea <HAL_TIM_IRQHandler+0xea>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800d7e2:	6878      	ldr	r0, [r7, #4]
 800d7e4:	f000 f89d 	bl	800d922 <HAL_TIM_IC_CaptureCallback>
 800d7e8:	e005      	b.n	800d7f6 <HAL_TIM_IRQHandler+0xf6>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800d7ea:	6878      	ldr	r0, [r7, #4]
 800d7ec:	f000 f88f 	bl	800d90e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800d7f0:	6878      	ldr	r0, [r7, #4]
 800d7f2:	f000 f8a0 	bl	800d936 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800d7f6:	687b      	ldr	r3, [r7, #4]
 800d7f8:	2200      	movs	r2, #0
 800d7fa:	771a      	strb	r2, [r3, #28]
    }
  }
  /* Capture compare 4 event */
  if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4))
 800d7fc:	68bb      	ldr	r3, [r7, #8]
 800d7fe:	f003 0310 	and.w	r3, r3, #16
 800d802:	2b00      	cmp	r3, #0
 800d804:	d020      	beq.n	800d848 <HAL_TIM_IRQHandler+0x148>
  {
    if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4))
 800d806:	68fb      	ldr	r3, [r7, #12]
 800d808:	f003 0310 	and.w	r3, r3, #16
 800d80c:	2b00      	cmp	r3, #0
 800d80e:	d01b      	beq.n	800d848 <HAL_TIM_IRQHandler+0x148>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4);
 800d810:	687b      	ldr	r3, [r7, #4]
 800d812:	681b      	ldr	r3, [r3, #0]
 800d814:	f06f 0210 	mvn.w	r2, #16
 800d818:	611a      	str	r2, [r3, #16]
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
 800d81a:	687b      	ldr	r3, [r7, #4]
 800d81c:	2208      	movs	r2, #8
 800d81e:	771a      	strb	r2, [r3, #28]
      /* Input capture event */
      if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
 800d820:	687b      	ldr	r3, [r7, #4]
 800d822:	681b      	ldr	r3, [r3, #0]
 800d824:	69db      	ldr	r3, [r3, #28]
 800d826:	f403 7340 	and.w	r3, r3, #768	@ 0x300
 800d82a:	2b00      	cmp	r3, #0
 800d82c:	d003      	beq.n	800d836 <HAL_TIM_IRQHandler+0x136>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->IC_CaptureCallback(htim);
#else
        HAL_TIM_IC_CaptureCallback(htim);
 800d82e:	6878      	ldr	r0, [r7, #4]
 800d830:	f000 f877 	bl	800d922 <HAL_TIM_IC_CaptureCallback>
 800d834:	e005      	b.n	800d842 <HAL_TIM_IRQHandler+0x142>
      {
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
        htim->OC_DelayElapsedCallback(htim);
        htim->PWM_PulseFinishedCallback(htim);
#else
        HAL_TIM_OC_DelayElapsedCallback(htim);
 800d836:	6878      	ldr	r0, [r7, #4]
 800d838:	f000 f869 	bl	800d90e <HAL_TIM_OC_DelayElapsedCallback>
        HAL_TIM_PWM_PulseFinishedCallback(htim);
 800d83c:	6878      	ldr	r0, [r7, #4]
 800d83e:	f000 f87a 	bl	800d936 <HAL_TIM_PWM_PulseFinishedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
      }
      htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
 800d842:	687b      	ldr	r3, [r7, #4]
 800d844:	2200      	movs	r2, #0
 800d846:	771a      	strb	r2, [r3, #28]
    }
  }
  /* TIM Update event */
  if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
 800d848:	68bb      	ldr	r3, [r7, #8]
 800d84a:	f003 0301 	and.w	r3, r3, #1
 800d84e:	2b00      	cmp	r3, #0
 800d850:	d00c      	beq.n	800d86c <HAL_TIM_IRQHandler+0x16c>
  {
    if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
 800d852:	68fb      	ldr	r3, [r7, #12]
 800d854:	f003 0301 	and.w	r3, r3, #1
 800d858:	2b00      	cmp	r3, #0
 800d85a:	d007      	beq.n	800d86c <HAL_TIM_IRQHandler+0x16c>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE);
 800d85c:	687b      	ldr	r3, [r7, #4]
 800d85e:	681b      	ldr	r3, [r3, #0]
 800d860:	f06f 0201 	mvn.w	r2, #1
 800d864:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->PeriodElapsedCallback(htim);
#else
      HAL_TIM_PeriodElapsedCallback(htim);
 800d866:	6878      	ldr	r0, [r7, #4]
 800d868:	f7f4 ff54 	bl	8002714 <HAL_TIM_PeriodElapsedCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break input event */
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800d86c:	68bb      	ldr	r3, [r7, #8]
 800d86e:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d872:	2b00      	cmp	r3, #0
 800d874:	d104      	bne.n	800d880 <HAL_TIM_IRQHandler+0x180>
      ((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK)))
 800d876:	68bb      	ldr	r3, [r7, #8]
 800d878:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
  if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \
 800d87c:	2b00      	cmp	r3, #0
 800d87e:	d00c      	beq.n	800d89a <HAL_TIM_IRQHandler+0x19a>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800d880:	68fb      	ldr	r3, [r7, #12]
 800d882:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d886:	2b00      	cmp	r3, #0
 800d888:	d007      	beq.n	800d89a <HAL_TIM_IRQHandler+0x19a>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK);
 800d88a:	687b      	ldr	r3, [r7, #4]
 800d88c:	681b      	ldr	r3, [r3, #0]
 800d88e:	f46f 5202 	mvn.w	r2, #8320	@ 0x2080
 800d892:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->BreakCallback(htim);
#else
      HAL_TIMEx_BreakCallback(htim);
 800d894:	6878      	ldr	r0, [r7, #4]
 800d896:	f000 f913 	bl	800dac0 <HAL_TIMEx_BreakCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Break2 input event */
  if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2))
 800d89a:	68bb      	ldr	r3, [r7, #8]
 800d89c:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800d8a0:	2b00      	cmp	r3, #0
 800d8a2:	d00c      	beq.n	800d8be <HAL_TIM_IRQHandler+0x1be>
  {
    if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK))
 800d8a4:	68fb      	ldr	r3, [r7, #12]
 800d8a6:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800d8aa:	2b00      	cmp	r3, #0
 800d8ac:	d007      	beq.n	800d8be <HAL_TIM_IRQHandler+0x1be>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2);
 800d8ae:	687b      	ldr	r3, [r7, #4]
 800d8b0:	681b      	ldr	r3, [r3, #0]
 800d8b2:	f46f 7280 	mvn.w	r2, #256	@ 0x100
 800d8b6:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->Break2Callback(htim);
#else
      HAL_TIMEx_Break2Callback(htim);
 800d8b8:	6878      	ldr	r0, [r7, #4]
 800d8ba:	f000 f90b 	bl	800dad4 <HAL_TIMEx_Break2Callback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM Trigger detection event */
  if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER))
 800d8be:	68bb      	ldr	r3, [r7, #8]
 800d8c0:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d8c4:	2b00      	cmp	r3, #0
 800d8c6:	d00c      	beq.n	800d8e2 <HAL_TIM_IRQHandler+0x1e2>
  {
    if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER))
 800d8c8:	68fb      	ldr	r3, [r7, #12]
 800d8ca:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800d8ce:	2b00      	cmp	r3, #0
 800d8d0:	d007      	beq.n	800d8e2 <HAL_TIM_IRQHandler+0x1e2>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER);
 800d8d2:	687b      	ldr	r3, [r7, #4]
 800d8d4:	681b      	ldr	r3, [r3, #0]
 800d8d6:	f06f 0240 	mvn.w	r2, #64	@ 0x40
 800d8da:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->TriggerCallback(htim);
#else
      HAL_TIM_TriggerCallback(htim);
 800d8dc:	6878      	ldr	r0, [r7, #4]
 800d8de:	f000 f834 	bl	800d94a <HAL_TIM_TriggerCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
  /* TIM commutation event */
  if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM))
 800d8e2:	68bb      	ldr	r3, [r7, #8]
 800d8e4:	f003 0320 	and.w	r3, r3, #32
 800d8e8:	2b00      	cmp	r3, #0
 800d8ea:	d00c      	beq.n	800d906 <HAL_TIM_IRQHandler+0x206>
  {
    if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM))
 800d8ec:	68fb      	ldr	r3, [r7, #12]
 800d8ee:	f003 0320 	and.w	r3, r3, #32
 800d8f2:	2b00      	cmp	r3, #0
 800d8f4:	d007      	beq.n	800d906 <HAL_TIM_IRQHandler+0x206>
    {
      __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
 800d8f6:	687b      	ldr	r3, [r7, #4]
 800d8f8:	681b      	ldr	r3, [r3, #0]
 800d8fa:	f06f 0220 	mvn.w	r2, #32
 800d8fe:	611a      	str	r2, [r3, #16]
#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
      htim->CommutationCallback(htim);
#else
      HAL_TIMEx_CommutCallback(htim);
 800d900:	6878      	ldr	r0, [r7, #4]
 800d902:	f000 f8d3 	bl	800daac <HAL_TIMEx_CommutCallback>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
    }
  }
}
 800d906:	bf00      	nop
 800d908:	3710      	adds	r7, #16
 800d90a:	46bd      	mov	sp, r7
 800d90c:	bd80      	pop	{r7, pc}

0800d90e <HAL_TIM_OC_DelayElapsedCallback>:
  * @brief  Output Compare callback in non-blocking mode
  * @param  htim TIM OC handle
  * @retval None
  */
__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
{
 800d90e:	b480      	push	{r7}
 800d910:	b083      	sub	sp, #12
 800d912:	af00      	add	r7, sp, #0
 800d914:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
   */
}
 800d916:	bf00      	nop
 800d918:	370c      	adds	r7, #12
 800d91a:	46bd      	mov	sp, r7
 800d91c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d920:	4770      	bx	lr

0800d922 <HAL_TIM_IC_CaptureCallback>:
  * @brief  Input Capture callback in non-blocking mode
  * @param  htim TIM IC handle
  * @retval None
  */
__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
{
 800d922:	b480      	push	{r7}
 800d924:	b083      	sub	sp, #12
 800d926:	af00      	add	r7, sp, #0
 800d928:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_IC_CaptureCallback could be implemented in the user file
   */
}
 800d92a:	bf00      	nop
 800d92c:	370c      	adds	r7, #12
 800d92e:	46bd      	mov	sp, r7
 800d930:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d934:	4770      	bx	lr

0800d936 <HAL_TIM_PWM_PulseFinishedCallback>:
  * @brief  PWM Pulse finished callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
 800d936:	b480      	push	{r7}
 800d938:	b083      	sub	sp, #12
 800d93a:	af00      	add	r7, sp, #0
 800d93c:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
   */
}
 800d93e:	bf00      	nop
 800d940:	370c      	adds	r7, #12
 800d942:	46bd      	mov	sp, r7
 800d944:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d948:	4770      	bx	lr

0800d94a <HAL_TIM_TriggerCallback>:
  * @brief  Hall Trigger detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
{
 800d94a:	b480      	push	{r7}
 800d94c:	b083      	sub	sp, #12
 800d94e:	af00      	add	r7, sp, #0
 800d950:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIM_TriggerCallback could be implemented in the user file
   */
}
 800d952:	bf00      	nop
 800d954:	370c      	adds	r7, #12
 800d956:	46bd      	mov	sp, r7
 800d958:	f85d 7b04 	ldr.w	r7, [sp], #4
 800d95c:	4770      	bx	lr
	...

0800d960 <TIM_Base_SetConfig>:
  * @param  TIMx TIM peripheral
  * @param  Structure TIM Base configuration structure
  * @retval None
  */
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
 800d960:	b480      	push	{r7}
 800d962:	b085      	sub	sp, #20
 800d964:	af00      	add	r7, sp, #0
 800d966:	6078      	str	r0, [r7, #4]
 800d968:	6039      	str	r1, [r7, #0]
  uint32_t tmpcr1;
  tmpcr1 = TIMx->CR1;
 800d96a:	687b      	ldr	r3, [r7, #4]
 800d96c:	681b      	ldr	r3, [r3, #0]
 800d96e:	60fb      	str	r3, [r7, #12]

  /* Set TIM Time Base Unit parameters ---------------------------------------*/
  if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
 800d970:	687b      	ldr	r3, [r7, #4]
 800d972:	4a46      	ldr	r2, [pc, #280]	@ (800da8c <TIM_Base_SetConfig+0x12c>)
 800d974:	4293      	cmp	r3, r2
 800d976:	d013      	beq.n	800d9a0 <TIM_Base_SetConfig+0x40>
 800d978:	687b      	ldr	r3, [r7, #4]
 800d97a:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800d97e:	d00f      	beq.n	800d9a0 <TIM_Base_SetConfig+0x40>
 800d980:	687b      	ldr	r3, [r7, #4]
 800d982:	4a43      	ldr	r2, [pc, #268]	@ (800da90 <TIM_Base_SetConfig+0x130>)
 800d984:	4293      	cmp	r3, r2
 800d986:	d00b      	beq.n	800d9a0 <TIM_Base_SetConfig+0x40>
 800d988:	687b      	ldr	r3, [r7, #4]
 800d98a:	4a42      	ldr	r2, [pc, #264]	@ (800da94 <TIM_Base_SetConfig+0x134>)
 800d98c:	4293      	cmp	r3, r2
 800d98e:	d007      	beq.n	800d9a0 <TIM_Base_SetConfig+0x40>
 800d990:	687b      	ldr	r3, [r7, #4]
 800d992:	4a41      	ldr	r2, [pc, #260]	@ (800da98 <TIM_Base_SetConfig+0x138>)
 800d994:	4293      	cmp	r3, r2
 800d996:	d003      	beq.n	800d9a0 <TIM_Base_SetConfig+0x40>
 800d998:	687b      	ldr	r3, [r7, #4]
 800d99a:	4a40      	ldr	r2, [pc, #256]	@ (800da9c <TIM_Base_SetConfig+0x13c>)
 800d99c:	4293      	cmp	r3, r2
 800d99e:	d108      	bne.n	800d9b2 <TIM_Base_SetConfig+0x52>
  {
    /* Select the Counter Mode */
    tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
 800d9a0:	68fb      	ldr	r3, [r7, #12]
 800d9a2:	f023 0370 	bic.w	r3, r3, #112	@ 0x70
 800d9a6:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= Structure->CounterMode;
 800d9a8:	683b      	ldr	r3, [r7, #0]
 800d9aa:	685b      	ldr	r3, [r3, #4]
 800d9ac:	68fa      	ldr	r2, [r7, #12]
 800d9ae:	4313      	orrs	r3, r2
 800d9b0:	60fb      	str	r3, [r7, #12]
  }

  if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
 800d9b2:	687b      	ldr	r3, [r7, #4]
 800d9b4:	4a35      	ldr	r2, [pc, #212]	@ (800da8c <TIM_Base_SetConfig+0x12c>)
 800d9b6:	4293      	cmp	r3, r2
 800d9b8:	d01f      	beq.n	800d9fa <TIM_Base_SetConfig+0x9a>
 800d9ba:	687b      	ldr	r3, [r7, #4]
 800d9bc:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 800d9c0:	d01b      	beq.n	800d9fa <TIM_Base_SetConfig+0x9a>
 800d9c2:	687b      	ldr	r3, [r7, #4]
 800d9c4:	4a32      	ldr	r2, [pc, #200]	@ (800da90 <TIM_Base_SetConfig+0x130>)
 800d9c6:	4293      	cmp	r3, r2
 800d9c8:	d017      	beq.n	800d9fa <TIM_Base_SetConfig+0x9a>
 800d9ca:	687b      	ldr	r3, [r7, #4]
 800d9cc:	4a31      	ldr	r2, [pc, #196]	@ (800da94 <TIM_Base_SetConfig+0x134>)
 800d9ce:	4293      	cmp	r3, r2
 800d9d0:	d013      	beq.n	800d9fa <TIM_Base_SetConfig+0x9a>
 800d9d2:	687b      	ldr	r3, [r7, #4]
 800d9d4:	4a30      	ldr	r2, [pc, #192]	@ (800da98 <TIM_Base_SetConfig+0x138>)
 800d9d6:	4293      	cmp	r3, r2
 800d9d8:	d00f      	beq.n	800d9fa <TIM_Base_SetConfig+0x9a>
 800d9da:	687b      	ldr	r3, [r7, #4]
 800d9dc:	4a2f      	ldr	r2, [pc, #188]	@ (800da9c <TIM_Base_SetConfig+0x13c>)
 800d9de:	4293      	cmp	r3, r2
 800d9e0:	d00b      	beq.n	800d9fa <TIM_Base_SetConfig+0x9a>
 800d9e2:	687b      	ldr	r3, [r7, #4]
 800d9e4:	4a2e      	ldr	r2, [pc, #184]	@ (800daa0 <TIM_Base_SetConfig+0x140>)
 800d9e6:	4293      	cmp	r3, r2
 800d9e8:	d007      	beq.n	800d9fa <TIM_Base_SetConfig+0x9a>
 800d9ea:	687b      	ldr	r3, [r7, #4]
 800d9ec:	4a2d      	ldr	r2, [pc, #180]	@ (800daa4 <TIM_Base_SetConfig+0x144>)
 800d9ee:	4293      	cmp	r3, r2
 800d9f0:	d003      	beq.n	800d9fa <TIM_Base_SetConfig+0x9a>
 800d9f2:	687b      	ldr	r3, [r7, #4]
 800d9f4:	4a2c      	ldr	r2, [pc, #176]	@ (800daa8 <TIM_Base_SetConfig+0x148>)
 800d9f6:	4293      	cmp	r3, r2
 800d9f8:	d108      	bne.n	800da0c <TIM_Base_SetConfig+0xac>
  {
    /* Set the clock division */
    tmpcr1 &= ~TIM_CR1_CKD;
 800d9fa:	68fb      	ldr	r3, [r7, #12]
 800d9fc:	f423 7340 	bic.w	r3, r3, #768	@ 0x300
 800da00:	60fb      	str	r3, [r7, #12]
    tmpcr1 |= (uint32_t)Structure->ClockDivision;
 800da02:	683b      	ldr	r3, [r7, #0]
 800da04:	68db      	ldr	r3, [r3, #12]
 800da06:	68fa      	ldr	r2, [r7, #12]
 800da08:	4313      	orrs	r3, r2
 800da0a:	60fb      	str	r3, [r7, #12]
  }

  /* Set the auto-reload preload */
  MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
 800da0c:	68fb      	ldr	r3, [r7, #12]
 800da0e:	f023 0280 	bic.w	r2, r3, #128	@ 0x80
 800da12:	683b      	ldr	r3, [r7, #0]
 800da14:	695b      	ldr	r3, [r3, #20]
 800da16:	4313      	orrs	r3, r2
 800da18:	60fb      	str	r3, [r7, #12]

  TIMx->CR1 = tmpcr1;
 800da1a:	687b      	ldr	r3, [r7, #4]
 800da1c:	68fa      	ldr	r2, [r7, #12]
 800da1e:	601a      	str	r2, [r3, #0]

  /* Set the Autoreload value */
  TIMx->ARR = (uint32_t)Structure->Period ;
 800da20:	683b      	ldr	r3, [r7, #0]
 800da22:	689a      	ldr	r2, [r3, #8]
 800da24:	687b      	ldr	r3, [r7, #4]
 800da26:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Set the Prescaler value */
  TIMx->PSC = Structure->Prescaler;
 800da28:	683b      	ldr	r3, [r7, #0]
 800da2a:	681a      	ldr	r2, [r3, #0]
 800da2c:	687b      	ldr	r3, [r7, #4]
 800da2e:	629a      	str	r2, [r3, #40]	@ 0x28

  if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
 800da30:	687b      	ldr	r3, [r7, #4]
 800da32:	4a16      	ldr	r2, [pc, #88]	@ (800da8c <TIM_Base_SetConfig+0x12c>)
 800da34:	4293      	cmp	r3, r2
 800da36:	d00f      	beq.n	800da58 <TIM_Base_SetConfig+0xf8>
 800da38:	687b      	ldr	r3, [r7, #4]
 800da3a:	4a18      	ldr	r2, [pc, #96]	@ (800da9c <TIM_Base_SetConfig+0x13c>)
 800da3c:	4293      	cmp	r3, r2
 800da3e:	d00b      	beq.n	800da58 <TIM_Base_SetConfig+0xf8>
 800da40:	687b      	ldr	r3, [r7, #4]
 800da42:	4a17      	ldr	r2, [pc, #92]	@ (800daa0 <TIM_Base_SetConfig+0x140>)
 800da44:	4293      	cmp	r3, r2
 800da46:	d007      	beq.n	800da58 <TIM_Base_SetConfig+0xf8>
 800da48:	687b      	ldr	r3, [r7, #4]
 800da4a:	4a16      	ldr	r2, [pc, #88]	@ (800daa4 <TIM_Base_SetConfig+0x144>)
 800da4c:	4293      	cmp	r3, r2
 800da4e:	d003      	beq.n	800da58 <TIM_Base_SetConfig+0xf8>
 800da50:	687b      	ldr	r3, [r7, #4]
 800da52:	4a15      	ldr	r2, [pc, #84]	@ (800daa8 <TIM_Base_SetConfig+0x148>)
 800da54:	4293      	cmp	r3, r2
 800da56:	d103      	bne.n	800da60 <TIM_Base_SetConfig+0x100>
  {
    /* Set the Repetition Counter value */
    TIMx->RCR = Structure->RepetitionCounter;
 800da58:	683b      	ldr	r3, [r7, #0]
 800da5a:	691a      	ldr	r2, [r3, #16]
 800da5c:	687b      	ldr	r3, [r7, #4]
 800da5e:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* Generate an update event to reload the Prescaler
     and the repetition counter (only for advanced timer) value immediately */
  TIMx->EGR = TIM_EGR_UG;
 800da60:	687b      	ldr	r3, [r7, #4]
 800da62:	2201      	movs	r2, #1
 800da64:	615a      	str	r2, [r3, #20]

  /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
  if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
 800da66:	687b      	ldr	r3, [r7, #4]
 800da68:	691b      	ldr	r3, [r3, #16]
 800da6a:	f003 0301 	and.w	r3, r3, #1
 800da6e:	2b01      	cmp	r3, #1
 800da70:	d105      	bne.n	800da7e <TIM_Base_SetConfig+0x11e>
  {
    /* Clear the update flag */
    CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
 800da72:	687b      	ldr	r3, [r7, #4]
 800da74:	691b      	ldr	r3, [r3, #16]
 800da76:	f023 0201 	bic.w	r2, r3, #1
 800da7a:	687b      	ldr	r3, [r7, #4]
 800da7c:	611a      	str	r2, [r3, #16]
  }
}
 800da7e:	bf00      	nop
 800da80:	3714      	adds	r7, #20
 800da82:	46bd      	mov	sp, r7
 800da84:	f85d 7b04 	ldr.w	r7, [sp], #4
 800da88:	4770      	bx	lr
 800da8a:	bf00      	nop
 800da8c:	40010000 	.word	0x40010000
 800da90:	40000400 	.word	0x40000400
 800da94:	40000800 	.word	0x40000800
 800da98:	40000c00 	.word	0x40000c00
 800da9c:	40010400 	.word	0x40010400
 800daa0:	40014000 	.word	0x40014000
 800daa4:	40014400 	.word	0x40014400
 800daa8:	40014800 	.word	0x40014800

0800daac <HAL_TIMEx_CommutCallback>:
  * @brief  Commutation callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
{
 800daac:	b480      	push	{r7}
 800daae:	b083      	sub	sp, #12
 800dab0:	af00      	add	r7, sp, #0
 800dab2:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_CommutCallback could be implemented in the user file
   */
}
 800dab4:	bf00      	nop
 800dab6:	370c      	adds	r7, #12
 800dab8:	46bd      	mov	sp, r7
 800daba:	f85d 7b04 	ldr.w	r7, [sp], #4
 800dabe:	4770      	bx	lr

0800dac0 <HAL_TIMEx_BreakCallback>:
  * @brief  Break detection callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
 800dac0:	b480      	push	{r7}
 800dac2:	b083      	sub	sp, #12
 800dac4:	af00      	add	r7, sp, #0
 800dac6:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_BreakCallback could be implemented in the user file
   */
}
 800dac8:	bf00      	nop
 800daca:	370c      	adds	r7, #12
 800dacc:	46bd      	mov	sp, r7
 800dace:	f85d 7b04 	ldr.w	r7, [sp], #4
 800dad2:	4770      	bx	lr

0800dad4 <HAL_TIMEx_Break2Callback>:
  * @brief  Break2 detection callback in non blocking mode
  * @param  htim: TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
{
 800dad4:	b480      	push	{r7}
 800dad6:	b083      	sub	sp, #12
 800dad8:	af00      	add	r7, sp, #0
 800dada:	6078      	str	r0, [r7, #4]
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_Break2Callback could be implemented in the user file
   */
}
 800dadc:	bf00      	nop
 800dade:	370c      	adds	r7, #12
 800dae0:	46bd      	mov	sp, r7
 800dae2:	f85d 7b04 	ldr.w	r7, [sp], #4
 800dae6:	4770      	bx	lr

0800dae8 <HAL_UART_Init>:
  *        parameters in the UART_InitTypeDef and initialize the associated handle.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
 800dae8:	b580      	push	{r7, lr}
 800daea:	b082      	sub	sp, #8
 800daec:	af00      	add	r7, sp, #0
 800daee:	6078      	str	r0, [r7, #4]
  /* Check the UART handle allocation */
  if (huart == NULL)
 800daf0:	687b      	ldr	r3, [r7, #4]
 800daf2:	2b00      	cmp	r3, #0
 800daf4:	d101      	bne.n	800dafa <HAL_UART_Init+0x12>
  {
    return HAL_ERROR;
 800daf6:	2301      	movs	r3, #1
 800daf8:	e042      	b.n	800db80 <HAL_UART_Init+0x98>
  {
    /* Check the parameters */
    assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
  }

  if (huart->gState == HAL_UART_STATE_RESET)
 800dafa:	687b      	ldr	r3, [r7, #4]
 800dafc:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800db00:	2b00      	cmp	r3, #0
 800db02:	d106      	bne.n	800db12 <HAL_UART_Init+0x2a>
  {
    /* Allocate lock resource and initialize it */
    huart->Lock = HAL_UNLOCKED;
 800db04:	687b      	ldr	r3, [r7, #4]
 800db06:	2200      	movs	r2, #0
 800db08:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

    /* Init the low level hardware */
    huart->MspInitCallback(huart);
#else
    /* Init the low level hardware : GPIO, CLOCK */
    HAL_UART_MspInit(huart);
 800db0c:	6878      	ldr	r0, [r7, #4]
 800db0e:	f7f6 f8c5 	bl	8003c9c <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
  }

  huart->gState = HAL_UART_STATE_BUSY;
 800db12:	687b      	ldr	r3, [r7, #4]
 800db14:	2224      	movs	r2, #36	@ 0x24
 800db16:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  __HAL_UART_DISABLE(huart);
 800db1a:	687b      	ldr	r3, [r7, #4]
 800db1c:	681b      	ldr	r3, [r3, #0]
 800db1e:	681a      	ldr	r2, [r3, #0]
 800db20:	687b      	ldr	r3, [r7, #4]
 800db22:	681b      	ldr	r3, [r3, #0]
 800db24:	f022 0201 	bic.w	r2, r2, #1
 800db28:	601a      	str	r2, [r3, #0]

  /* Perform advanced settings configuration */
  /* For some items, configuration requires to be done prior TE and RE bits are set */
  if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
 800db2a:	687b      	ldr	r3, [r7, #4]
 800db2c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800db2e:	2b00      	cmp	r3, #0
 800db30:	d002      	beq.n	800db38 <HAL_UART_Init+0x50>
  {
    UART_AdvFeatureConfig(huart);
 800db32:	6878      	ldr	r0, [r7, #4]
 800db34:	f001 f9e8 	bl	800ef08 <UART_AdvFeatureConfig>
  }

  /* Set the UART Communication parameters */
  if (UART_SetConfig(huart) == HAL_ERROR)
 800db38:	6878      	ldr	r0, [r7, #4]
 800db3a:	f000 fc7d 	bl	800e438 <UART_SetConfig>
 800db3e:	4603      	mov	r3, r0
 800db40:	2b01      	cmp	r3, #1
 800db42:	d101      	bne.n	800db48 <HAL_UART_Init+0x60>
  {
    return HAL_ERROR;
 800db44:	2301      	movs	r3, #1
 800db46:	e01b      	b.n	800db80 <HAL_UART_Init+0x98>
  }

  /* In asynchronous mode, the following bits must be kept cleared:
  - LINEN and CLKEN bits in the USART_CR2 register,
  - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800db48:	687b      	ldr	r3, [r7, #4]
 800db4a:	681b      	ldr	r3, [r3, #0]
 800db4c:	685a      	ldr	r2, [r3, #4]
 800db4e:	687b      	ldr	r3, [r7, #4]
 800db50:	681b      	ldr	r3, [r3, #0]
 800db52:	f422 4290 	bic.w	r2, r2, #18432	@ 0x4800
 800db56:	605a      	str	r2, [r3, #4]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 800db58:	687b      	ldr	r3, [r7, #4]
 800db5a:	681b      	ldr	r3, [r3, #0]
 800db5c:	689a      	ldr	r2, [r3, #8]
 800db5e:	687b      	ldr	r3, [r7, #4]
 800db60:	681b      	ldr	r3, [r3, #0]
 800db62:	f022 022a 	bic.w	r2, r2, #42	@ 0x2a
 800db66:	609a      	str	r2, [r3, #8]

  __HAL_UART_ENABLE(huart);
 800db68:	687b      	ldr	r3, [r7, #4]
 800db6a:	681b      	ldr	r3, [r3, #0]
 800db6c:	681a      	ldr	r2, [r3, #0]
 800db6e:	687b      	ldr	r3, [r7, #4]
 800db70:	681b      	ldr	r3, [r3, #0]
 800db72:	f042 0201 	orr.w	r2, r2, #1
 800db76:	601a      	str	r2, [r3, #0]

  /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
  return (UART_CheckIdleState(huart));
 800db78:	6878      	ldr	r0, [r7, #4]
 800db7a:	f001 fa67 	bl	800f04c <UART_CheckIdleState>
 800db7e:	4603      	mov	r3, r0
}
 800db80:	4618      	mov	r0, r3
 800db82:	3708      	adds	r7, #8
 800db84:	46bd      	mov	sp, r7
 800db86:	bd80      	pop	{r7, pc}

0800db88 <HAL_UART_Transmit_IT>:
  * @param pData Pointer to data buffer (u8 or u16 data elements).
  * @param Size  Amount of data elements (u8 or u16) to be sent.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
{
 800db88:	b480      	push	{r7}
 800db8a:	b091      	sub	sp, #68	@ 0x44
 800db8c:	af00      	add	r7, sp, #0
 800db8e:	60f8      	str	r0, [r7, #12]
 800db90:	60b9      	str	r1, [r7, #8]
 800db92:	4613      	mov	r3, r2
 800db94:	80fb      	strh	r3, [r7, #6]
  /* Check that a Tx process is not already ongoing */
  if (huart->gState == HAL_UART_STATE_READY)
 800db96:	68fb      	ldr	r3, [r7, #12]
 800db98:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800db9c:	2b20      	cmp	r3, #32
 800db9e:	d178      	bne.n	800dc92 <HAL_UART_Transmit_IT+0x10a>
  {
    if ((pData == NULL) || (Size == 0U))
 800dba0:	68bb      	ldr	r3, [r7, #8]
 800dba2:	2b00      	cmp	r3, #0
 800dba4:	d002      	beq.n	800dbac <HAL_UART_Transmit_IT+0x24>
 800dba6:	88fb      	ldrh	r3, [r7, #6]
 800dba8:	2b00      	cmp	r3, #0
 800dbaa:	d101      	bne.n	800dbb0 <HAL_UART_Transmit_IT+0x28>
    {
      return HAL_ERROR;
 800dbac:	2301      	movs	r3, #1
 800dbae:	e071      	b.n	800dc94 <HAL_UART_Transmit_IT+0x10c>
    }

    huart->pTxBuffPtr  = pData;
 800dbb0:	68fb      	ldr	r3, [r7, #12]
 800dbb2:	68ba      	ldr	r2, [r7, #8]
 800dbb4:	651a      	str	r2, [r3, #80]	@ 0x50
    huart->TxXferSize  = Size;
 800dbb6:	68fb      	ldr	r3, [r7, #12]
 800dbb8:	88fa      	ldrh	r2, [r7, #6]
 800dbba:	f8a3 2054 	strh.w	r2, [r3, #84]	@ 0x54
    huart->TxXferCount = Size;
 800dbbe:	68fb      	ldr	r3, [r7, #12]
 800dbc0:	88fa      	ldrh	r2, [r7, #6]
 800dbc2:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    huart->TxISR       = NULL;
 800dbc6:	68fb      	ldr	r3, [r7, #12]
 800dbc8:	2200      	movs	r2, #0
 800dbca:	679a      	str	r2, [r3, #120]	@ 0x78

    huart->ErrorCode = HAL_UART_ERROR_NONE;
 800dbcc:	68fb      	ldr	r3, [r7, #12]
 800dbce:	2200      	movs	r2, #0
 800dbd0:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    huart->gState = HAL_UART_STATE_BUSY_TX;
 800dbd4:	68fb      	ldr	r3, [r7, #12]
 800dbd6:	2221      	movs	r2, #33	@ 0x21
 800dbd8:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

    /* Configure Tx interrupt processing */
    if (huart->FifoMode == UART_FIFOMODE_ENABLE)
 800dbdc:	68fb      	ldr	r3, [r7, #12]
 800dbde:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800dbe0:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800dbe4:	d12a      	bne.n	800dc3c <HAL_UART_Transmit_IT+0xb4>
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800dbe6:	68fb      	ldr	r3, [r7, #12]
 800dbe8:	689b      	ldr	r3, [r3, #8]
 800dbea:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800dbee:	d107      	bne.n	800dc00 <HAL_UART_Transmit_IT+0x78>
 800dbf0:	68fb      	ldr	r3, [r7, #12]
 800dbf2:	691b      	ldr	r3, [r3, #16]
 800dbf4:	2b00      	cmp	r3, #0
 800dbf6:	d103      	bne.n	800dc00 <HAL_UART_Transmit_IT+0x78>
      {
        huart->TxISR = UART_TxISR_16BIT_FIFOEN;
 800dbf8:	68fb      	ldr	r3, [r7, #12]
 800dbfa:	4a29      	ldr	r2, [pc, #164]	@ (800dca0 <HAL_UART_Transmit_IT+0x118>)
 800dbfc:	679a      	str	r2, [r3, #120]	@ 0x78
 800dbfe:	e002      	b.n	800dc06 <HAL_UART_Transmit_IT+0x7e>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT_FIFOEN;
 800dc00:	68fb      	ldr	r3, [r7, #12]
 800dc02:	4a28      	ldr	r2, [pc, #160]	@ (800dca4 <HAL_UART_Transmit_IT+0x11c>)
 800dc04:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the TX FIFO threshold interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800dc06:	68fb      	ldr	r3, [r7, #12]
 800dc08:	681b      	ldr	r3, [r3, #0]
 800dc0a:	3308      	adds	r3, #8
 800dc0c:	62bb      	str	r3, [r7, #40]	@ 0x28
 */
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
    uint32_t result;

   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800dc0e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800dc10:	e853 3f00 	ldrex	r3, [r3]
 800dc14:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800dc16:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800dc18:	f443 0300 	orr.w	r3, r3, #8388608	@ 0x800000
 800dc1c:	63bb      	str	r3, [r7, #56]	@ 0x38
 800dc1e:	68fb      	ldr	r3, [r7, #12]
 800dc20:	681b      	ldr	r3, [r3, #0]
 800dc22:	3308      	adds	r3, #8
 800dc24:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800dc26:	637a      	str	r2, [r7, #52]	@ 0x34
 800dc28:	633b      	str	r3, [r7, #48]	@ 0x30
 */
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
   uint32_t result;

   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800dc2a:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800dc2c:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800dc2e:	e841 2300 	strex	r3, r2, [r1]
 800dc32:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800dc34:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800dc36:	2b00      	cmp	r3, #0
 800dc38:	d1e5      	bne.n	800dc06 <HAL_UART_Transmit_IT+0x7e>
 800dc3a:	e028      	b.n	800dc8e <HAL_UART_Transmit_IT+0x106>
    }
    else
    {
      /* Set the Tx ISR function pointer according to the data word length */
      if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800dc3c:	68fb      	ldr	r3, [r7, #12]
 800dc3e:	689b      	ldr	r3, [r3, #8]
 800dc40:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800dc44:	d107      	bne.n	800dc56 <HAL_UART_Transmit_IT+0xce>
 800dc46:	68fb      	ldr	r3, [r7, #12]
 800dc48:	691b      	ldr	r3, [r3, #16]
 800dc4a:	2b00      	cmp	r3, #0
 800dc4c:	d103      	bne.n	800dc56 <HAL_UART_Transmit_IT+0xce>
      {
        huart->TxISR = UART_TxISR_16BIT;
 800dc4e:	68fb      	ldr	r3, [r7, #12]
 800dc50:	4a15      	ldr	r2, [pc, #84]	@ (800dca8 <HAL_UART_Transmit_IT+0x120>)
 800dc52:	679a      	str	r2, [r3, #120]	@ 0x78
 800dc54:	e002      	b.n	800dc5c <HAL_UART_Transmit_IT+0xd4>
      }
      else
      {
        huart->TxISR = UART_TxISR_8BIT;
 800dc56:	68fb      	ldr	r3, [r7, #12]
 800dc58:	4a14      	ldr	r2, [pc, #80]	@ (800dcac <HAL_UART_Transmit_IT+0x124>)
 800dc5a:	679a      	str	r2, [r3, #120]	@ 0x78
      }

      /* Enable the Transmit Data Register Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800dc5c:	68fb      	ldr	r3, [r7, #12]
 800dc5e:	681b      	ldr	r3, [r3, #0]
 800dc60:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800dc62:	697b      	ldr	r3, [r7, #20]
 800dc64:	e853 3f00 	ldrex	r3, [r3]
 800dc68:	613b      	str	r3, [r7, #16]
   return(result);
 800dc6a:	693b      	ldr	r3, [r7, #16]
 800dc6c:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 800dc70:	63fb      	str	r3, [r7, #60]	@ 0x3c
 800dc72:	68fb      	ldr	r3, [r7, #12]
 800dc74:	681b      	ldr	r3, [r3, #0]
 800dc76:	461a      	mov	r2, r3
 800dc78:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800dc7a:	623b      	str	r3, [r7, #32]
 800dc7c:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800dc7e:	69f9      	ldr	r1, [r7, #28]
 800dc80:	6a3a      	ldr	r2, [r7, #32]
 800dc82:	e841 2300 	strex	r3, r2, [r1]
 800dc86:	61bb      	str	r3, [r7, #24]
   return(result);
 800dc88:	69bb      	ldr	r3, [r7, #24]
 800dc8a:	2b00      	cmp	r3, #0
 800dc8c:	d1e6      	bne.n	800dc5c <HAL_UART_Transmit_IT+0xd4>
    }

    return HAL_OK;
 800dc8e:	2300      	movs	r3, #0
 800dc90:	e000      	b.n	800dc94 <HAL_UART_Transmit_IT+0x10c>
  }
  else
  {
    return HAL_BUSY;
 800dc92:	2302      	movs	r3, #2
  }
}
 800dc94:	4618      	mov	r0, r3
 800dc96:	3744      	adds	r7, #68	@ 0x44
 800dc98:	46bd      	mov	sp, r7
 800dc9a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800dc9e:	4770      	bx	lr
 800dca0:	0800f813 	.word	0x0800f813
 800dca4:	0800f733 	.word	0x0800f733
 800dca8:	0800f671 	.word	0x0800f671
 800dcac:	0800f5b9 	.word	0x0800f5b9

0800dcb0 <HAL_UART_IRQHandler>:
  * @brief Handle UART interrupt request.
  * @param huart UART handle.
  * @retval None
  */
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
{
 800dcb0:	b580      	push	{r7, lr}
 800dcb2:	b0ba      	sub	sp, #232	@ 0xe8
 800dcb4:	af00      	add	r7, sp, #0
 800dcb6:	6078      	str	r0, [r7, #4]
  uint32_t isrflags   = READ_REG(huart->Instance->ISR);
 800dcb8:	687b      	ldr	r3, [r7, #4]
 800dcba:	681b      	ldr	r3, [r3, #0]
 800dcbc:	69db      	ldr	r3, [r3, #28]
 800dcbe:	f8c7 30e4 	str.w	r3, [r7, #228]	@ 0xe4
  uint32_t cr1its     = READ_REG(huart->Instance->CR1);
 800dcc2:	687b      	ldr	r3, [r7, #4]
 800dcc4:	681b      	ldr	r3, [r3, #0]
 800dcc6:	681b      	ldr	r3, [r3, #0]
 800dcc8:	f8c7 30e0 	str.w	r3, [r7, #224]	@ 0xe0
  uint32_t cr3its     = READ_REG(huart->Instance->CR3);
 800dccc:	687b      	ldr	r3, [r7, #4]
 800dcce:	681b      	ldr	r3, [r3, #0]
 800dcd0:	689b      	ldr	r3, [r3, #8]
 800dcd2:	f8c7 30dc 	str.w	r3, [r7, #220]	@ 0xdc

  uint32_t errorflags;
  uint32_t errorcode;

  /* If no error occurs */
  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
 800dcd6:	f8d7 20e4 	ldr.w	r2, [r7, #228]	@ 0xe4
 800dcda:	f640 030f 	movw	r3, #2063	@ 0x80f
 800dcde:	4013      	ands	r3, r2
 800dce0:	f8c7 30d8 	str.w	r3, [r7, #216]	@ 0xd8
  if (errorflags == 0U)
 800dce4:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800dce8:	2b00      	cmp	r3, #0
 800dcea:	d11b      	bne.n	800dd24 <HAL_UART_IRQHandler+0x74>
  {
    /* UART in mode Receiver ---------------------------------------------------*/
    if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800dcec:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dcf0:	f003 0320 	and.w	r3, r3, #32
 800dcf4:	2b00      	cmp	r3, #0
 800dcf6:	d015      	beq.n	800dd24 <HAL_UART_IRQHandler+0x74>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800dcf8:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800dcfc:	f003 0320 	and.w	r3, r3, #32
 800dd00:	2b00      	cmp	r3, #0
 800dd02:	d105      	bne.n	800dd10 <HAL_UART_IRQHandler+0x60>
            || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800dd04:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800dd08:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800dd0c:	2b00      	cmp	r3, #0
 800dd0e:	d009      	beq.n	800dd24 <HAL_UART_IRQHandler+0x74>
    {
      if (huart->RxISR != NULL)
 800dd10:	687b      	ldr	r3, [r7, #4]
 800dd12:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800dd14:	2b00      	cmp	r3, #0
 800dd16:	f000 8377 	beq.w	800e408 <HAL_UART_IRQHandler+0x758>
      {
        huart->RxISR(huart);
 800dd1a:	687b      	ldr	r3, [r7, #4]
 800dd1c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800dd1e:	6878      	ldr	r0, [r7, #4]
 800dd20:	4798      	blx	r3
      }
      return;
 800dd22:	e371      	b.n	800e408 <HAL_UART_IRQHandler+0x758>
    }
  }

  /* If some errors occur */
  if ((errorflags != 0U)
 800dd24:	f8d7 30d8 	ldr.w	r3, [r7, #216]	@ 0xd8
 800dd28:	2b00      	cmp	r3, #0
 800dd2a:	f000 8123 	beq.w	800df74 <HAL_UART_IRQHandler+0x2c4>
      && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
 800dd2e:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800dd32:	4b8d      	ldr	r3, [pc, #564]	@ (800df68 <HAL_UART_IRQHandler+0x2b8>)
 800dd34:	4013      	ands	r3, r2
 800dd36:	2b00      	cmp	r3, #0
 800dd38:	d106      	bne.n	800dd48 <HAL_UART_IRQHandler+0x98>
           || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
 800dd3a:	f8d7 20e0 	ldr.w	r2, [r7, #224]	@ 0xe0
 800dd3e:	4b8b      	ldr	r3, [pc, #556]	@ (800df6c <HAL_UART_IRQHandler+0x2bc>)
 800dd40:	4013      	ands	r3, r2
 800dd42:	2b00      	cmp	r3, #0
 800dd44:	f000 8116 	beq.w	800df74 <HAL_UART_IRQHandler+0x2c4>
  {
    /* UART parity error interrupt occurred -------------------------------------*/
    if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800dd48:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dd4c:	f003 0301 	and.w	r3, r3, #1
 800dd50:	2b00      	cmp	r3, #0
 800dd52:	d011      	beq.n	800dd78 <HAL_UART_IRQHandler+0xc8>
 800dd54:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800dd58:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800dd5c:	2b00      	cmp	r3, #0
 800dd5e:	d00b      	beq.n	800dd78 <HAL_UART_IRQHandler+0xc8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800dd60:	687b      	ldr	r3, [r7, #4]
 800dd62:	681b      	ldr	r3, [r3, #0]
 800dd64:	2201      	movs	r2, #1
 800dd66:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_PE;
 800dd68:	687b      	ldr	r3, [r7, #4]
 800dd6a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800dd6e:	f043 0201 	orr.w	r2, r3, #1
 800dd72:	687b      	ldr	r3, [r7, #4]
 800dd74:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART frame error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800dd78:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dd7c:	f003 0302 	and.w	r3, r3, #2
 800dd80:	2b00      	cmp	r3, #0
 800dd82:	d011      	beq.n	800dda8 <HAL_UART_IRQHandler+0xf8>
 800dd84:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800dd88:	f003 0301 	and.w	r3, r3, #1
 800dd8c:	2b00      	cmp	r3, #0
 800dd8e:	d00b      	beq.n	800dda8 <HAL_UART_IRQHandler+0xf8>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800dd90:	687b      	ldr	r3, [r7, #4]
 800dd92:	681b      	ldr	r3, [r3, #0]
 800dd94:	2202      	movs	r2, #2
 800dd96:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_FE;
 800dd98:	687b      	ldr	r3, [r7, #4]
 800dd9a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800dd9e:	f043 0204 	orr.w	r2, r3, #4
 800dda2:	687b      	ldr	r3, [r7, #4]
 800dda4:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART noise error interrupt occurred --------------------------------------*/
    if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800dda8:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800ddac:	f003 0304 	and.w	r3, r3, #4
 800ddb0:	2b00      	cmp	r3, #0
 800ddb2:	d011      	beq.n	800ddd8 <HAL_UART_IRQHandler+0x128>
 800ddb4:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800ddb8:	f003 0301 	and.w	r3, r3, #1
 800ddbc:	2b00      	cmp	r3, #0
 800ddbe:	d00b      	beq.n	800ddd8 <HAL_UART_IRQHandler+0x128>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800ddc0:	687b      	ldr	r3, [r7, #4]
 800ddc2:	681b      	ldr	r3, [r3, #0]
 800ddc4:	2204      	movs	r2, #4
 800ddc6:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_NE;
 800ddc8:	687b      	ldr	r3, [r7, #4]
 800ddca:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800ddce:	f043 0202 	orr.w	r2, r3, #2
 800ddd2:	687b      	ldr	r3, [r7, #4]
 800ddd4:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Over-Run interrupt occurred -----------------------------------------*/
    if (((isrflags & USART_ISR_ORE) != 0U)
 800ddd8:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800dddc:	f003 0308 	and.w	r3, r3, #8
 800dde0:	2b00      	cmp	r3, #0
 800dde2:	d017      	beq.n	800de14 <HAL_UART_IRQHandler+0x164>
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800dde4:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800dde8:	f003 0320 	and.w	r3, r3, #32
 800ddec:	2b00      	cmp	r3, #0
 800ddee:	d105      	bne.n	800ddfc <HAL_UART_IRQHandler+0x14c>
            ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
 800ddf0:	f8d7 20dc 	ldr.w	r2, [r7, #220]	@ 0xdc
 800ddf4:	4b5c      	ldr	r3, [pc, #368]	@ (800df68 <HAL_UART_IRQHandler+0x2b8>)
 800ddf6:	4013      	ands	r3, r2
        && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
 800ddf8:	2b00      	cmp	r3, #0
 800ddfa:	d00b      	beq.n	800de14 <HAL_UART_IRQHandler+0x164>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800ddfc:	687b      	ldr	r3, [r7, #4]
 800ddfe:	681b      	ldr	r3, [r3, #0]
 800de00:	2208      	movs	r2, #8
 800de02:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_ORE;
 800de04:	687b      	ldr	r3, [r7, #4]
 800de06:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800de0a:	f043 0208 	orr.w	r2, r3, #8
 800de0e:	687b      	ldr	r3, [r7, #4]
 800de10:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* UART Receiver Timeout interrupt occurred ---------------------------------*/
    if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
 800de14:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800de18:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800de1c:	2b00      	cmp	r3, #0
 800de1e:	d012      	beq.n	800de46 <HAL_UART_IRQHandler+0x196>
 800de20:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800de24:	f003 6380 	and.w	r3, r3, #67108864	@ 0x4000000
 800de28:	2b00      	cmp	r3, #0
 800de2a:	d00c      	beq.n	800de46 <HAL_UART_IRQHandler+0x196>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800de2c:	687b      	ldr	r3, [r7, #4]
 800de2e:	681b      	ldr	r3, [r3, #0]
 800de30:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800de34:	621a      	str	r2, [r3, #32]

      huart->ErrorCode |= HAL_UART_ERROR_RTO;
 800de36:	687b      	ldr	r3, [r7, #4]
 800de38:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800de3c:	f043 0220 	orr.w	r2, r3, #32
 800de40:	687b      	ldr	r3, [r7, #4]
 800de42:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
    }

    /* Call UART Error Call back function if need be ----------------------------*/
    if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800de46:	687b      	ldr	r3, [r7, #4]
 800de48:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800de4c:	2b00      	cmp	r3, #0
 800de4e:	f000 82dd 	beq.w	800e40c <HAL_UART_IRQHandler+0x75c>
    {
      /* UART in mode Receiver --------------------------------------------------*/
      if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
 800de52:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800de56:	f003 0320 	and.w	r3, r3, #32
 800de5a:	2b00      	cmp	r3, #0
 800de5c:	d013      	beq.n	800de86 <HAL_UART_IRQHandler+0x1d6>
          && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
 800de5e:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800de62:	f003 0320 	and.w	r3, r3, #32
 800de66:	2b00      	cmp	r3, #0
 800de68:	d105      	bne.n	800de76 <HAL_UART_IRQHandler+0x1c6>
              || ((cr3its & USART_CR3_RXFTIE) != 0U)))
 800de6a:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800de6e:	f003 5380 	and.w	r3, r3, #268435456	@ 0x10000000
 800de72:	2b00      	cmp	r3, #0
 800de74:	d007      	beq.n	800de86 <HAL_UART_IRQHandler+0x1d6>
      {
        if (huart->RxISR != NULL)
 800de76:	687b      	ldr	r3, [r7, #4]
 800de78:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800de7a:	2b00      	cmp	r3, #0
 800de7c:	d003      	beq.n	800de86 <HAL_UART_IRQHandler+0x1d6>
        {
          huart->RxISR(huart);
 800de7e:	687b      	ldr	r3, [r7, #4]
 800de80:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 800de82:	6878      	ldr	r0, [r7, #4]
 800de84:	4798      	blx	r3
      /* If Error is to be considered as blocking :
          - Receiver Timeout error in Reception
          - Overrun error in Reception
          - any error occurs in DMA mode reception
      */
      errorcode = huart->ErrorCode;
 800de86:	687b      	ldr	r3, [r7, #4]
 800de88:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800de8c:	f8c7 30d4 	str.w	r3, [r7, #212]	@ 0xd4
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800de90:	687b      	ldr	r3, [r7, #4]
 800de92:	681b      	ldr	r3, [r3, #0]
 800de94:	689b      	ldr	r3, [r3, #8]
 800de96:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800de9a:	2b40      	cmp	r3, #64	@ 0x40
 800de9c:	d005      	beq.n	800deaa <HAL_UART_IRQHandler+0x1fa>
          ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
 800de9e:	f8d7 30d4 	ldr.w	r3, [r7, #212]	@ 0xd4
 800dea2:	f003 0328 	and.w	r3, r3, #40	@ 0x28
      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
 800dea6:	2b00      	cmp	r3, #0
 800dea8:	d054      	beq.n	800df54 <HAL_UART_IRQHandler+0x2a4>
      {
        /* Blocking error : transfer is aborted
           Set the UART state ready to be able to start again the process,
           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
        UART_EndRxTransfer(huart);
 800deaa:	6878      	ldr	r0, [r7, #4]
 800deac:	f001 fb08 	bl	800f4c0 <UART_EndRxTransfer>

        /* Abort the UART DMA Rx channel if enabled */
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800deb0:	687b      	ldr	r3, [r7, #4]
 800deb2:	681b      	ldr	r3, [r3, #0]
 800deb4:	689b      	ldr	r3, [r3, #8]
 800deb6:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800deba:	2b40      	cmp	r3, #64	@ 0x40
 800debc:	d146      	bne.n	800df4c <HAL_UART_IRQHandler+0x29c>
        {
          /* Disable the UART DMA Rx request if enabled */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800debe:	687b      	ldr	r3, [r7, #4]
 800dec0:	681b      	ldr	r3, [r3, #0]
 800dec2:	3308      	adds	r3, #8
 800dec4:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800dec8:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 800decc:	e853 3f00 	ldrex	r3, [r3]
 800ded0:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
   return(result);
 800ded4:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800ded8:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800dedc:	f8c7 30d0 	str.w	r3, [r7, #208]	@ 0xd0
 800dee0:	687b      	ldr	r3, [r7, #4]
 800dee2:	681b      	ldr	r3, [r3, #0]
 800dee4:	3308      	adds	r3, #8
 800dee6:	f8d7 20d0 	ldr.w	r2, [r7, #208]	@ 0xd0
 800deea:	f8c7 20a8 	str.w	r2, [r7, #168]	@ 0xa8
 800deee:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800def2:	f8d7 10a4 	ldr.w	r1, [r7, #164]	@ 0xa4
 800def6:	f8d7 20a8 	ldr.w	r2, [r7, #168]	@ 0xa8
 800defa:	e841 2300 	strex	r3, r2, [r1]
 800defe:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
   return(result);
 800df02:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800df06:	2b00      	cmp	r3, #0
 800df08:	d1d9      	bne.n	800debe <HAL_UART_IRQHandler+0x20e>

          /* Abort the UART DMA Rx channel */
          if (huart->hdmarx != NULL)
 800df0a:	687b      	ldr	r3, [r7, #4]
 800df0c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800df10:	2b00      	cmp	r3, #0
 800df12:	d017      	beq.n	800df44 <HAL_UART_IRQHandler+0x294>
          {
            /* Set the UART DMA Abort callback :
               will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
 800df14:	687b      	ldr	r3, [r7, #4]
 800df16:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800df1a:	4a15      	ldr	r2, [pc, #84]	@ (800df70 <HAL_UART_IRQHandler+0x2c0>)
 800df1c:	651a      	str	r2, [r3, #80]	@ 0x50

            /* Abort DMA RX */
            if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
 800df1e:	687b      	ldr	r3, [r7, #4]
 800df20:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800df24:	4618      	mov	r0, r3
 800df26:	f7f8 ff8f 	bl	8006e48 <HAL_DMA_Abort_IT>
 800df2a:	4603      	mov	r3, r0
 800df2c:	2b00      	cmp	r3, #0
 800df2e:	d019      	beq.n	800df64 <HAL_UART_IRQHandler+0x2b4>
            {
              /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
              huart->hdmarx->XferAbortCallback(huart->hdmarx);
 800df30:	687b      	ldr	r3, [r7, #4]
 800df32:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800df36:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800df38:	687a      	ldr	r2, [r7, #4]
 800df3a:	f8d2 2080 	ldr.w	r2, [r2, #128]	@ 0x80
 800df3e:	4610      	mov	r0, r2
 800df40:	4798      	blx	r3
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800df42:	e00f      	b.n	800df64 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
            /*Call registered error callback*/
            huart->ErrorCallback(huart);
#else
            /*Call legacy weak error callback*/
            HAL_UART_ErrorCallback(huart);
 800df44:	6878      	ldr	r0, [r7, #4]
 800df46:	f000 fa6d 	bl	800e424 <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800df4a:	e00b      	b.n	800df64 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800df4c:	6878      	ldr	r0, [r7, #4]
 800df4e:	f000 fa69 	bl	800e424 <HAL_UART_ErrorCallback>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800df52:	e007      	b.n	800df64 <HAL_UART_IRQHandler+0x2b4>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered error callback*/
        huart->ErrorCallback(huart);
#else
        /*Call legacy weak error callback*/
        HAL_UART_ErrorCallback(huart);
 800df54:	6878      	ldr	r0, [r7, #4]
 800df56:	f000 fa65 	bl	800e424 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
        huart->ErrorCode = HAL_UART_ERROR_NONE;
 800df5a:	687b      	ldr	r3, [r7, #4]
 800df5c:	2200      	movs	r2, #0
 800df5e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
      }
    }
    return;
 800df62:	e253      	b.n	800e40c <HAL_UART_IRQHandler+0x75c>
        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800df64:	bf00      	nop
    return;
 800df66:	e251      	b.n	800e40c <HAL_UART_IRQHandler+0x75c>
 800df68:	10000001 	.word	0x10000001
 800df6c:	04000120 	.word	0x04000120
 800df70:	0800f58d 	.word	0x0800f58d

  } /* End if some error occurs */

  /* Check current reception Mode :
     If Reception till IDLE event has been selected : */
  if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800df74:	687b      	ldr	r3, [r7, #4]
 800df76:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800df78:	2b01      	cmp	r3, #1
 800df7a:	f040 81e7 	bne.w	800e34c <HAL_UART_IRQHandler+0x69c>
      && ((isrflags & USART_ISR_IDLE) != 0U)
 800df7e:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800df82:	f003 0310 	and.w	r3, r3, #16
 800df86:	2b00      	cmp	r3, #0
 800df88:	f000 81e0 	beq.w	800e34c <HAL_UART_IRQHandler+0x69c>
      && ((cr1its & USART_ISR_IDLE) != 0U))
 800df8c:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800df90:	f003 0310 	and.w	r3, r3, #16
 800df94:	2b00      	cmp	r3, #0
 800df96:	f000 81d9 	beq.w	800e34c <HAL_UART_IRQHandler+0x69c>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800df9a:	687b      	ldr	r3, [r7, #4]
 800df9c:	681b      	ldr	r3, [r3, #0]
 800df9e:	2210      	movs	r2, #16
 800dfa0:	621a      	str	r2, [r3, #32]

    /* Check if DMA mode is enabled in UART */
    if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
 800dfa2:	687b      	ldr	r3, [r7, #4]
 800dfa4:	681b      	ldr	r3, [r3, #0]
 800dfa6:	689b      	ldr	r3, [r3, #8]
 800dfa8:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800dfac:	2b40      	cmp	r3, #64	@ 0x40
 800dfae:	f040 8151 	bne.w	800e254 <HAL_UART_IRQHandler+0x5a4>
    {
      /* DMA mode enabled */
      /* Check received length : If all expected data are received, do nothing,
         (DMA cplt callback will be called).
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
 800dfb2:	687b      	ldr	r3, [r7, #4]
 800dfb4:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dfb8:	681b      	ldr	r3, [r3, #0]
 800dfba:	4a96      	ldr	r2, [pc, #600]	@ (800e214 <HAL_UART_IRQHandler+0x564>)
 800dfbc:	4293      	cmp	r3, r2
 800dfbe:	d068      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800dfc0:	687b      	ldr	r3, [r7, #4]
 800dfc2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dfc6:	681b      	ldr	r3, [r3, #0]
 800dfc8:	4a93      	ldr	r2, [pc, #588]	@ (800e218 <HAL_UART_IRQHandler+0x568>)
 800dfca:	4293      	cmp	r3, r2
 800dfcc:	d061      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800dfce:	687b      	ldr	r3, [r7, #4]
 800dfd0:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dfd4:	681b      	ldr	r3, [r3, #0]
 800dfd6:	4a91      	ldr	r2, [pc, #580]	@ (800e21c <HAL_UART_IRQHandler+0x56c>)
 800dfd8:	4293      	cmp	r3, r2
 800dfda:	d05a      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800dfdc:	687b      	ldr	r3, [r7, #4]
 800dfde:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dfe2:	681b      	ldr	r3, [r3, #0]
 800dfe4:	4a8e      	ldr	r2, [pc, #568]	@ (800e220 <HAL_UART_IRQHandler+0x570>)
 800dfe6:	4293      	cmp	r3, r2
 800dfe8:	d053      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800dfea:	687b      	ldr	r3, [r7, #4]
 800dfec:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dff0:	681b      	ldr	r3, [r3, #0]
 800dff2:	4a8c      	ldr	r2, [pc, #560]	@ (800e224 <HAL_UART_IRQHandler+0x574>)
 800dff4:	4293      	cmp	r3, r2
 800dff6:	d04c      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800dff8:	687b      	ldr	r3, [r7, #4]
 800dffa:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800dffe:	681b      	ldr	r3, [r3, #0]
 800e000:	4a89      	ldr	r2, [pc, #548]	@ (800e228 <HAL_UART_IRQHandler+0x578>)
 800e002:	4293      	cmp	r3, r2
 800e004:	d045      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e006:	687b      	ldr	r3, [r7, #4]
 800e008:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e00c:	681b      	ldr	r3, [r3, #0]
 800e00e:	4a87      	ldr	r2, [pc, #540]	@ (800e22c <HAL_UART_IRQHandler+0x57c>)
 800e010:	4293      	cmp	r3, r2
 800e012:	d03e      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e014:	687b      	ldr	r3, [r7, #4]
 800e016:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e01a:	681b      	ldr	r3, [r3, #0]
 800e01c:	4a84      	ldr	r2, [pc, #528]	@ (800e230 <HAL_UART_IRQHandler+0x580>)
 800e01e:	4293      	cmp	r3, r2
 800e020:	d037      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e022:	687b      	ldr	r3, [r7, #4]
 800e024:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e028:	681b      	ldr	r3, [r3, #0]
 800e02a:	4a82      	ldr	r2, [pc, #520]	@ (800e234 <HAL_UART_IRQHandler+0x584>)
 800e02c:	4293      	cmp	r3, r2
 800e02e:	d030      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e030:	687b      	ldr	r3, [r7, #4]
 800e032:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e036:	681b      	ldr	r3, [r3, #0]
 800e038:	4a7f      	ldr	r2, [pc, #508]	@ (800e238 <HAL_UART_IRQHandler+0x588>)
 800e03a:	4293      	cmp	r3, r2
 800e03c:	d029      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e03e:	687b      	ldr	r3, [r7, #4]
 800e040:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e044:	681b      	ldr	r3, [r3, #0]
 800e046:	4a7d      	ldr	r2, [pc, #500]	@ (800e23c <HAL_UART_IRQHandler+0x58c>)
 800e048:	4293      	cmp	r3, r2
 800e04a:	d022      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e04c:	687b      	ldr	r3, [r7, #4]
 800e04e:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e052:	681b      	ldr	r3, [r3, #0]
 800e054:	4a7a      	ldr	r2, [pc, #488]	@ (800e240 <HAL_UART_IRQHandler+0x590>)
 800e056:	4293      	cmp	r3, r2
 800e058:	d01b      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e05a:	687b      	ldr	r3, [r7, #4]
 800e05c:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e060:	681b      	ldr	r3, [r3, #0]
 800e062:	4a78      	ldr	r2, [pc, #480]	@ (800e244 <HAL_UART_IRQHandler+0x594>)
 800e064:	4293      	cmp	r3, r2
 800e066:	d014      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e068:	687b      	ldr	r3, [r7, #4]
 800e06a:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e06e:	681b      	ldr	r3, [r3, #0]
 800e070:	4a75      	ldr	r2, [pc, #468]	@ (800e248 <HAL_UART_IRQHandler+0x598>)
 800e072:	4293      	cmp	r3, r2
 800e074:	d00d      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e076:	687b      	ldr	r3, [r7, #4]
 800e078:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e07c:	681b      	ldr	r3, [r3, #0]
 800e07e:	4a73      	ldr	r2, [pc, #460]	@ (800e24c <HAL_UART_IRQHandler+0x59c>)
 800e080:	4293      	cmp	r3, r2
 800e082:	d006      	beq.n	800e092 <HAL_UART_IRQHandler+0x3e2>
 800e084:	687b      	ldr	r3, [r7, #4]
 800e086:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e08a:	681b      	ldr	r3, [r3, #0]
 800e08c:	4a70      	ldr	r2, [pc, #448]	@ (800e250 <HAL_UART_IRQHandler+0x5a0>)
 800e08e:	4293      	cmp	r3, r2
 800e090:	d106      	bne.n	800e0a0 <HAL_UART_IRQHandler+0x3f0>
 800e092:	687b      	ldr	r3, [r7, #4]
 800e094:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e098:	681b      	ldr	r3, [r3, #0]
 800e09a:	685b      	ldr	r3, [r3, #4]
 800e09c:	b29b      	uxth	r3, r3
 800e09e:	e005      	b.n	800e0ac <HAL_UART_IRQHandler+0x3fc>
 800e0a0:	687b      	ldr	r3, [r7, #4]
 800e0a2:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e0a6:	681b      	ldr	r3, [r3, #0]
 800e0a8:	685b      	ldr	r3, [r3, #4]
 800e0aa:	b29b      	uxth	r3, r3
 800e0ac:	f8a7 30be 	strh.w	r3, [r7, #190]	@ 0xbe
      if ((nb_remaining_rx_data > 0U)
 800e0b0:	f8b7 30be 	ldrh.w	r3, [r7, #190]	@ 0xbe
 800e0b4:	2b00      	cmp	r3, #0
 800e0b6:	f000 81ab 	beq.w	800e410 <HAL_UART_IRQHandler+0x760>
          && (nb_remaining_rx_data < huart->RxXferSize))
 800e0ba:	687b      	ldr	r3, [r7, #4]
 800e0bc:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800e0c0:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800e0c4:	429a      	cmp	r2, r3
 800e0c6:	f080 81a3 	bcs.w	800e410 <HAL_UART_IRQHandler+0x760>
      {
        /* Reception is not complete */
        huart->RxXferCount = nb_remaining_rx_data;
 800e0ca:	687b      	ldr	r3, [r7, #4]
 800e0cc:	f8b7 20be 	ldrh.w	r2, [r7, #190]	@ 0xbe
 800e0d0:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

        /* In Normal mode, end DMA xfer and HAL UART Rx process*/
        if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
 800e0d4:	687b      	ldr	r3, [r7, #4]
 800e0d6:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e0da:	69db      	ldr	r3, [r3, #28]
 800e0dc:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 800e0e0:	f000 8087 	beq.w	800e1f2 <HAL_UART_IRQHandler+0x542>
        {
          /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800e0e4:	687b      	ldr	r3, [r7, #4]
 800e0e6:	681b      	ldr	r3, [r3, #0]
 800e0e8:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e0ec:	f8d7 3088 	ldr.w	r3, [r7, #136]	@ 0x88
 800e0f0:	e853 3f00 	ldrex	r3, [r3]
 800e0f4:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
   return(result);
 800e0f8:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 800e0fc:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800e100:	f8c7 30b8 	str.w	r3, [r7, #184]	@ 0xb8
 800e104:	687b      	ldr	r3, [r7, #4]
 800e106:	681b      	ldr	r3, [r3, #0]
 800e108:	461a      	mov	r2, r3
 800e10a:	f8d7 30b8 	ldr.w	r3, [r7, #184]	@ 0xb8
 800e10e:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800e112:	f8c7 2090 	str.w	r2, [r7, #144]	@ 0x90
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e116:	f8d7 1090 	ldr.w	r1, [r7, #144]	@ 0x90
 800e11a:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800e11e:	e841 2300 	strex	r3, r2, [r1]
 800e122:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
   return(result);
 800e126:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800e12a:	2b00      	cmp	r3, #0
 800e12c:	d1da      	bne.n	800e0e4 <HAL_UART_IRQHandler+0x434>
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800e12e:	687b      	ldr	r3, [r7, #4]
 800e130:	681b      	ldr	r3, [r3, #0]
 800e132:	3308      	adds	r3, #8
 800e134:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e136:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800e138:	e853 3f00 	ldrex	r3, [r3]
 800e13c:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 800e13e:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800e140:	f023 0301 	bic.w	r3, r3, #1
 800e144:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
 800e148:	687b      	ldr	r3, [r7, #4]
 800e14a:	681b      	ldr	r3, [r3, #0]
 800e14c:	3308      	adds	r3, #8
 800e14e:	f8d7 20b4 	ldr.w	r2, [r7, #180]	@ 0xb4
 800e152:	f8c7 2080 	str.w	r2, [r7, #128]	@ 0x80
 800e156:	67fb      	str	r3, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e158:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 800e15a:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 800e15e:	e841 2300 	strex	r3, r2, [r1]
 800e162:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 800e164:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800e166:	2b00      	cmp	r3, #0
 800e168:	d1e1      	bne.n	800e12e <HAL_UART_IRQHandler+0x47e>

          /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
             in the UART CR3 register */
          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
 800e16a:	687b      	ldr	r3, [r7, #4]
 800e16c:	681b      	ldr	r3, [r3, #0]
 800e16e:	3308      	adds	r3, #8
 800e170:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e172:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800e174:	e853 3f00 	ldrex	r3, [r3]
 800e178:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 800e17a:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800e17c:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800e180:	f8c7 30b0 	str.w	r3, [r7, #176]	@ 0xb0
 800e184:	687b      	ldr	r3, [r7, #4]
 800e186:	681b      	ldr	r3, [r3, #0]
 800e188:	3308      	adds	r3, #8
 800e18a:	f8d7 20b0 	ldr.w	r2, [r7, #176]	@ 0xb0
 800e18e:	66fa      	str	r2, [r7, #108]	@ 0x6c
 800e190:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e192:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 800e194:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 800e196:	e841 2300 	strex	r3, r2, [r1]
 800e19a:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 800e19c:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800e19e:	2b00      	cmp	r3, #0
 800e1a0:	d1e3      	bne.n	800e16a <HAL_UART_IRQHandler+0x4ba>

          /* At end of Rx process, restore huart->RxState to Ready */
          huart->RxState = HAL_UART_STATE_READY;
 800e1a2:	687b      	ldr	r3, [r7, #4]
 800e1a4:	2220      	movs	r2, #32
 800e1a6:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800e1aa:	687b      	ldr	r3, [r7, #4]
 800e1ac:	2200      	movs	r2, #0
 800e1ae:	66da      	str	r2, [r3, #108]	@ 0x6c

          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800e1b0:	687b      	ldr	r3, [r7, #4]
 800e1b2:	681b      	ldr	r3, [r3, #0]
 800e1b4:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e1b6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800e1b8:	e853 3f00 	ldrex	r3, [r3]
 800e1bc:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800e1be:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800e1c0:	f023 0310 	bic.w	r3, r3, #16
 800e1c4:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
 800e1c8:	687b      	ldr	r3, [r7, #4]
 800e1ca:	681b      	ldr	r3, [r3, #0]
 800e1cc:	461a      	mov	r2, r3
 800e1ce:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800e1d2:	65bb      	str	r3, [r7, #88]	@ 0x58
 800e1d4:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e1d6:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800e1d8:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800e1da:	e841 2300 	strex	r3, r2, [r1]
 800e1de:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800e1e0:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800e1e2:	2b00      	cmp	r3, #0
 800e1e4:	d1e4      	bne.n	800e1b0 <HAL_UART_IRQHandler+0x500>

          /* Last bytes received, so no need as the abort is immediate */
          (void)HAL_DMA_Abort(huart->hdmarx);
 800e1e6:	687b      	ldr	r3, [r7, #4]
 800e1e8:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 800e1ec:	4618      	mov	r0, r3
 800e1ee:	f7f8 fb0d 	bl	800680c <HAL_DMA_Abort>
        }

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800e1f2:	687b      	ldr	r3, [r7, #4]
 800e1f4:	2202      	movs	r2, #2
 800e1f6:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
 800e1f8:	687b      	ldr	r3, [r7, #4]
 800e1fa:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800e1fe:	687b      	ldr	r3, [r7, #4]
 800e200:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800e204:	b29b      	uxth	r3, r3
 800e206:	1ad3      	subs	r3, r2, r3
 800e208:	b29b      	uxth	r3, r3
 800e20a:	4619      	mov	r1, r3
 800e20c:	6878      	ldr	r0, [r7, #4]
 800e20e:	f7f6 fb1f 	bl	8004850 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800e212:	e0fd      	b.n	800e410 <HAL_UART_IRQHandler+0x760>
 800e214:	40020010 	.word	0x40020010
 800e218:	40020028 	.word	0x40020028
 800e21c:	40020040 	.word	0x40020040
 800e220:	40020058 	.word	0x40020058
 800e224:	40020070 	.word	0x40020070
 800e228:	40020088 	.word	0x40020088
 800e22c:	400200a0 	.word	0x400200a0
 800e230:	400200b8 	.word	0x400200b8
 800e234:	40020410 	.word	0x40020410
 800e238:	40020428 	.word	0x40020428
 800e23c:	40020440 	.word	0x40020440
 800e240:	40020458 	.word	0x40020458
 800e244:	40020470 	.word	0x40020470
 800e248:	40020488 	.word	0x40020488
 800e24c:	400204a0 	.word	0x400204a0
 800e250:	400204b8 	.word	0x400204b8
    else
    {
      /* DMA mode not enabled */
      /* Check received length : If all expected data are received, do nothing.
         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
      uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
 800e254:	687b      	ldr	r3, [r7, #4]
 800e256:	f8b3 205c 	ldrh.w	r2, [r3, #92]	@ 0x5c
 800e25a:	687b      	ldr	r3, [r7, #4]
 800e25c:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800e260:	b29b      	uxth	r3, r3
 800e262:	1ad3      	subs	r3, r2, r3
 800e264:	f8a7 30ce 	strh.w	r3, [r7, #206]	@ 0xce
      if ((huart->RxXferCount > 0U)
 800e268:	687b      	ldr	r3, [r7, #4]
 800e26a:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800e26e:	b29b      	uxth	r3, r3
 800e270:	2b00      	cmp	r3, #0
 800e272:	f000 80cf 	beq.w	800e414 <HAL_UART_IRQHandler+0x764>
          && (nb_rx_data > 0U))
 800e276:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800e27a:	2b00      	cmp	r3, #0
 800e27c:	f000 80ca 	beq.w	800e414 <HAL_UART_IRQHandler+0x764>
      {
        /* Disable the UART Parity Error Interrupt and RXNE interrupts */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800e280:	687b      	ldr	r3, [r7, #4]
 800e282:	681b      	ldr	r3, [r3, #0]
 800e284:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e286:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800e288:	e853 3f00 	ldrex	r3, [r3]
 800e28c:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800e28e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800e290:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800e294:	f8c7 30c8 	str.w	r3, [r7, #200]	@ 0xc8
 800e298:	687b      	ldr	r3, [r7, #4]
 800e29a:	681b      	ldr	r3, [r3, #0]
 800e29c:	461a      	mov	r2, r3
 800e29e:	f8d7 30c8 	ldr.w	r3, [r7, #200]	@ 0xc8
 800e2a2:	647b      	str	r3, [r7, #68]	@ 0x44
 800e2a4:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e2a6:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800e2a8:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800e2aa:	e841 2300 	strex	r3, r2, [r1]
 800e2ae:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800e2b0:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800e2b2:	2b00      	cmp	r3, #0
 800e2b4:	d1e4      	bne.n	800e280 <HAL_UART_IRQHandler+0x5d0>

        /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800e2b6:	687b      	ldr	r3, [r7, #4]
 800e2b8:	681b      	ldr	r3, [r3, #0]
 800e2ba:	3308      	adds	r3, #8
 800e2bc:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e2be:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800e2c0:	e853 3f00 	ldrex	r3, [r3]
 800e2c4:	623b      	str	r3, [r7, #32]
   return(result);
 800e2c6:	6a3a      	ldr	r2, [r7, #32]
 800e2c8:	4b55      	ldr	r3, [pc, #340]	@ (800e420 <HAL_UART_IRQHandler+0x770>)
 800e2ca:	4013      	ands	r3, r2
 800e2cc:	f8c7 30c4 	str.w	r3, [r7, #196]	@ 0xc4
 800e2d0:	687b      	ldr	r3, [r7, #4]
 800e2d2:	681b      	ldr	r3, [r3, #0]
 800e2d4:	3308      	adds	r3, #8
 800e2d6:	f8d7 20c4 	ldr.w	r2, [r7, #196]	@ 0xc4
 800e2da:	633a      	str	r2, [r7, #48]	@ 0x30
 800e2dc:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e2de:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800e2e0:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800e2e2:	e841 2300 	strex	r3, r2, [r1]
 800e2e6:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800e2e8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800e2ea:	2b00      	cmp	r3, #0
 800e2ec:	d1e3      	bne.n	800e2b6 <HAL_UART_IRQHandler+0x606>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800e2ee:	687b      	ldr	r3, [r7, #4]
 800e2f0:	2220      	movs	r2, #32
 800e2f2:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800e2f6:	687b      	ldr	r3, [r7, #4]
 800e2f8:	2200      	movs	r2, #0
 800e2fa:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800e2fc:	687b      	ldr	r3, [r7, #4]
 800e2fe:	2200      	movs	r2, #0
 800e300:	675a      	str	r2, [r3, #116]	@ 0x74

        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800e302:	687b      	ldr	r3, [r7, #4]
 800e304:	681b      	ldr	r3, [r3, #0]
 800e306:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800e308:	693b      	ldr	r3, [r7, #16]
 800e30a:	e853 3f00 	ldrex	r3, [r3]
 800e30e:	60fb      	str	r3, [r7, #12]
   return(result);
 800e310:	68fb      	ldr	r3, [r7, #12]
 800e312:	f023 0310 	bic.w	r3, r3, #16
 800e316:	f8c7 30c0 	str.w	r3, [r7, #192]	@ 0xc0
 800e31a:	687b      	ldr	r3, [r7, #4]
 800e31c:	681b      	ldr	r3, [r3, #0]
 800e31e:	461a      	mov	r2, r3
 800e320:	f8d7 30c0 	ldr.w	r3, [r7, #192]	@ 0xc0
 800e324:	61fb      	str	r3, [r7, #28]
 800e326:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800e328:	69b9      	ldr	r1, [r7, #24]
 800e32a:	69fa      	ldr	r2, [r7, #28]
 800e32c:	e841 2300 	strex	r3, r2, [r1]
 800e330:	617b      	str	r3, [r7, #20]
   return(result);
 800e332:	697b      	ldr	r3, [r7, #20]
 800e334:	2b00      	cmp	r3, #0
 800e336:	d1e4      	bne.n	800e302 <HAL_UART_IRQHandler+0x652>

        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
           In this case, Rx Event type is Idle Event */
        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
 800e338:	687b      	ldr	r3, [r7, #4]
 800e33a:	2202      	movs	r2, #2
 800e33c:	671a      	str	r2, [r3, #112]	@ 0x70
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx complete callback*/
        huart->RxEventCallback(huart, nb_rx_data);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
 800e33e:	f8b7 30ce 	ldrh.w	r3, [r7, #206]	@ 0xce
 800e342:	4619      	mov	r1, r3
 800e344:	6878      	ldr	r0, [r7, #4]
 800e346:	f7f6 fa83 	bl	8004850 <HAL_UARTEx_RxEventCallback>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
      }
      return;
 800e34a:	e063      	b.n	800e414 <HAL_UART_IRQHandler+0x764>
    }
  }

  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
  if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
 800e34c:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e350:	f403 1380 	and.w	r3, r3, #1048576	@ 0x100000
 800e354:	2b00      	cmp	r3, #0
 800e356:	d00e      	beq.n	800e376 <HAL_UART_IRQHandler+0x6c6>
 800e358:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800e35c:	f403 0380 	and.w	r3, r3, #4194304	@ 0x400000
 800e360:	2b00      	cmp	r3, #0
 800e362:	d008      	beq.n	800e376 <HAL_UART_IRQHandler+0x6c6>
  {
    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
 800e364:	687b      	ldr	r3, [r7, #4]
 800e366:	681b      	ldr	r3, [r3, #0]
 800e368:	f44f 1280 	mov.w	r2, #1048576	@ 0x100000
 800e36c:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Wakeup Callback */
    huart->WakeupCallback(huart);
#else
    /* Call legacy weak Wakeup Callback */
    HAL_UARTEx_WakeupCallback(huart);
 800e36e:	6878      	ldr	r0, [r7, #4]
 800e370:	f002 f80c 	bl	801038c <HAL_UARTEx_WakeupCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800e374:	e051      	b.n	800e41a <HAL_UART_IRQHandler+0x76a>
  }

  /* UART in mode Transmitter ------------------------------------------------*/
  if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
 800e376:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e37a:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800e37e:	2b00      	cmp	r3, #0
 800e380:	d014      	beq.n	800e3ac <HAL_UART_IRQHandler+0x6fc>
      && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
 800e382:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800e386:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800e38a:	2b00      	cmp	r3, #0
 800e38c:	d105      	bne.n	800e39a <HAL_UART_IRQHandler+0x6ea>
          || ((cr3its & USART_CR3_TXFTIE) != 0U)))
 800e38e:	f8d7 30dc 	ldr.w	r3, [r7, #220]	@ 0xdc
 800e392:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800e396:	2b00      	cmp	r3, #0
 800e398:	d008      	beq.n	800e3ac <HAL_UART_IRQHandler+0x6fc>
  {
    if (huart->TxISR != NULL)
 800e39a:	687b      	ldr	r3, [r7, #4]
 800e39c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800e39e:	2b00      	cmp	r3, #0
 800e3a0:	d03a      	beq.n	800e418 <HAL_UART_IRQHandler+0x768>
    {
      huart->TxISR(huart);
 800e3a2:	687b      	ldr	r3, [r7, #4]
 800e3a4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 800e3a6:	6878      	ldr	r0, [r7, #4]
 800e3a8:	4798      	blx	r3
    }
    return;
 800e3aa:	e035      	b.n	800e418 <HAL_UART_IRQHandler+0x768>
  }

  /* UART in mode Transmitter (transmission end) -----------------------------*/
  if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
 800e3ac:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e3b0:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800e3b4:	2b00      	cmp	r3, #0
 800e3b6:	d009      	beq.n	800e3cc <HAL_UART_IRQHandler+0x71c>
 800e3b8:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800e3bc:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800e3c0:	2b00      	cmp	r3, #0
 800e3c2:	d003      	beq.n	800e3cc <HAL_UART_IRQHandler+0x71c>
  {
    UART_EndTransmit_IT(huart);
 800e3c4:	6878      	ldr	r0, [r7, #4]
 800e3c6:	f001 fa99 	bl	800f8fc <UART_EndTransmit_IT>
    return;
 800e3ca:	e026      	b.n	800e41a <HAL_UART_IRQHandler+0x76a>
  }

  /* UART TX Fifo Empty occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
 800e3cc:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e3d0:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800e3d4:	2b00      	cmp	r3, #0
 800e3d6:	d009      	beq.n	800e3ec <HAL_UART_IRQHandler+0x73c>
 800e3d8:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800e3dc:	f003 4380 	and.w	r3, r3, #1073741824	@ 0x40000000
 800e3e0:	2b00      	cmp	r3, #0
 800e3e2:	d003      	beq.n	800e3ec <HAL_UART_IRQHandler+0x73c>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Tx Fifo Empty Callback */
    huart->TxFifoEmptyCallback(huart);
#else
    /* Call legacy weak Tx Fifo Empty Callback */
    HAL_UARTEx_TxFifoEmptyCallback(huart);
 800e3e4:	6878      	ldr	r0, [r7, #4]
 800e3e6:	f001 ffe5 	bl	80103b4 <HAL_UARTEx_TxFifoEmptyCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800e3ea:	e016      	b.n	800e41a <HAL_UART_IRQHandler+0x76a>
  }

  /* UART RX Fifo Full occurred ----------------------------------------------*/
  if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
 800e3ec:	f8d7 30e4 	ldr.w	r3, [r7, #228]	@ 0xe4
 800e3f0:	f003 7380 	and.w	r3, r3, #16777216	@ 0x1000000
 800e3f4:	2b00      	cmp	r3, #0
 800e3f6:	d010      	beq.n	800e41a <HAL_UART_IRQHandler+0x76a>
 800e3f8:	f8d7 30e0 	ldr.w	r3, [r7, #224]	@ 0xe0
 800e3fc:	2b00      	cmp	r3, #0
 800e3fe:	da0c      	bge.n	800e41a <HAL_UART_IRQHandler+0x76a>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
    /* Call registered Rx Fifo Full Callback */
    huart->RxFifoFullCallback(huart);
#else
    /* Call legacy weak Rx Fifo Full Callback */
    HAL_UARTEx_RxFifoFullCallback(huart);
 800e400:	6878      	ldr	r0, [r7, #4]
 800e402:	f001 ffcd 	bl	80103a0 <HAL_UARTEx_RxFifoFullCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
    return;
 800e406:	e008      	b.n	800e41a <HAL_UART_IRQHandler+0x76a>
      return;
 800e408:	bf00      	nop
 800e40a:	e006      	b.n	800e41a <HAL_UART_IRQHandler+0x76a>
    return;
 800e40c:	bf00      	nop
 800e40e:	e004      	b.n	800e41a <HAL_UART_IRQHandler+0x76a>
      return;
 800e410:	bf00      	nop
 800e412:	e002      	b.n	800e41a <HAL_UART_IRQHandler+0x76a>
      return;
 800e414:	bf00      	nop
 800e416:	e000      	b.n	800e41a <HAL_UART_IRQHandler+0x76a>
    return;
 800e418:	bf00      	nop
  }
}
 800e41a:	37e8      	adds	r7, #232	@ 0xe8
 800e41c:	46bd      	mov	sp, r7
 800e41e:	bd80      	pop	{r7, pc}
 800e420:	effffffe 	.word	0xeffffffe

0800e424 <HAL_UART_ErrorCallback>:
  * @brief  UART error callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
 800e424:	b480      	push	{r7}
 800e426:	b083      	sub	sp, #12
 800e428:	af00      	add	r7, sp, #0
 800e42a:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UART_ErrorCallback can be implemented in the user file.
   */
}
 800e42c:	bf00      	nop
 800e42e:	370c      	adds	r7, #12
 800e430:	46bd      	mov	sp, r7
 800e432:	f85d 7b04 	ldr.w	r7, [sp], #4
 800e436:	4770      	bx	lr

0800e438 <UART_SetConfig>:
  * @brief Configure the UART peripheral.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
{
 800e438:	e92d 4fb0 	stmdb	sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
 800e43c:	b092      	sub	sp, #72	@ 0x48
 800e43e:	af00      	add	r7, sp, #0
 800e440:	6178      	str	r0, [r7, #20]
  uint32_t tmpreg;
  uint16_t brrtemp;
  UART_ClockSourceTypeDef clocksource;
  uint32_t usartdiv;
  HAL_StatusTypeDef ret               = HAL_OK;
 800e442:	2300      	movs	r3, #0
 800e444:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
  *  the UART Word Length, Parity, Mode and oversampling:
  *  set the M bits according to huart->Init.WordLength value
  *  set PCE and PS bits according to huart->Init.Parity value
  *  set TE and RE bits according to huart->Init.Mode value
  *  set OVER8 bit according to huart->Init.OverSampling value */
  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
 800e448:	697b      	ldr	r3, [r7, #20]
 800e44a:	689a      	ldr	r2, [r3, #8]
 800e44c:	697b      	ldr	r3, [r7, #20]
 800e44e:	691b      	ldr	r3, [r3, #16]
 800e450:	431a      	orrs	r2, r3
 800e452:	697b      	ldr	r3, [r7, #20]
 800e454:	695b      	ldr	r3, [r3, #20]
 800e456:	431a      	orrs	r2, r3
 800e458:	697b      	ldr	r3, [r7, #20]
 800e45a:	69db      	ldr	r3, [r3, #28]
 800e45c:	4313      	orrs	r3, r2
 800e45e:	647b      	str	r3, [r7, #68]	@ 0x44
  MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
 800e460:	697b      	ldr	r3, [r7, #20]
 800e462:	681b      	ldr	r3, [r3, #0]
 800e464:	681a      	ldr	r2, [r3, #0]
 800e466:	4bbe      	ldr	r3, [pc, #760]	@ (800e760 <UART_SetConfig+0x328>)
 800e468:	4013      	ands	r3, r2
 800e46a:	697a      	ldr	r2, [r7, #20]
 800e46c:	6812      	ldr	r2, [r2, #0]
 800e46e:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800e470:	430b      	orrs	r3, r1
 800e472:	6013      	str	r3, [r2, #0]

  /*-------------------------- USART CR2 Configuration -----------------------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits according
  * to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 800e474:	697b      	ldr	r3, [r7, #20]
 800e476:	681b      	ldr	r3, [r3, #0]
 800e478:	685b      	ldr	r3, [r3, #4]
 800e47a:	f423 5140 	bic.w	r1, r3, #12288	@ 0x3000
 800e47e:	697b      	ldr	r3, [r7, #20]
 800e480:	68da      	ldr	r2, [r3, #12]
 800e482:	697b      	ldr	r3, [r7, #20]
 800e484:	681b      	ldr	r3, [r3, #0]
 800e486:	430a      	orrs	r2, r1
 800e488:	605a      	str	r2, [r3, #4]
  /* Configure
  * - UART HardWare Flow Control: set CTSE and RTSE bits according
  *   to huart->Init.HwFlowCtl value
  * - one-bit sampling method versus three samples' majority rule according
  *   to huart->Init.OneBitSampling (not applicable to LPUART) */
  tmpreg = (uint32_t)huart->Init.HwFlowCtl;
 800e48a:	697b      	ldr	r3, [r7, #20]
 800e48c:	699b      	ldr	r3, [r3, #24]
 800e48e:	647b      	str	r3, [r7, #68]	@ 0x44

  if (!(UART_INSTANCE_LOWPOWER(huart)))
 800e490:	697b      	ldr	r3, [r7, #20]
 800e492:	681b      	ldr	r3, [r3, #0]
 800e494:	4ab3      	ldr	r2, [pc, #716]	@ (800e764 <UART_SetConfig+0x32c>)
 800e496:	4293      	cmp	r3, r2
 800e498:	d004      	beq.n	800e4a4 <UART_SetConfig+0x6c>
  {
    tmpreg |= huart->Init.OneBitSampling;
 800e49a:	697b      	ldr	r3, [r7, #20]
 800e49c:	6a1b      	ldr	r3, [r3, #32]
 800e49e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800e4a0:	4313      	orrs	r3, r2
 800e4a2:	647b      	str	r3, [r7, #68]	@ 0x44
  }
  MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
 800e4a4:	697b      	ldr	r3, [r7, #20]
 800e4a6:	681b      	ldr	r3, [r3, #0]
 800e4a8:	689a      	ldr	r2, [r3, #8]
 800e4aa:	4baf      	ldr	r3, [pc, #700]	@ (800e768 <UART_SetConfig+0x330>)
 800e4ac:	4013      	ands	r3, r2
 800e4ae:	697a      	ldr	r2, [r7, #20]
 800e4b0:	6812      	ldr	r2, [r2, #0]
 800e4b2:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800e4b4:	430b      	orrs	r3, r1
 800e4b6:	6093      	str	r3, [r2, #8]

  /*-------------------------- USART PRESC Configuration -----------------------*/
  /* Configure
  * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
  MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
 800e4b8:	697b      	ldr	r3, [r7, #20]
 800e4ba:	681b      	ldr	r3, [r3, #0]
 800e4bc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 800e4be:	f023 010f 	bic.w	r1, r3, #15
 800e4c2:	697b      	ldr	r3, [r7, #20]
 800e4c4:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 800e4c6:	697b      	ldr	r3, [r7, #20]
 800e4c8:	681b      	ldr	r3, [r3, #0]
 800e4ca:	430a      	orrs	r2, r1
 800e4cc:	62da      	str	r2, [r3, #44]	@ 0x2c

  /*-------------------------- USART BRR Configuration -----------------------*/
  UART_GETCLOCKSOURCE(huart, clocksource);
 800e4ce:	697b      	ldr	r3, [r7, #20]
 800e4d0:	681b      	ldr	r3, [r3, #0]
 800e4d2:	4aa6      	ldr	r2, [pc, #664]	@ (800e76c <UART_SetConfig+0x334>)
 800e4d4:	4293      	cmp	r3, r2
 800e4d6:	d177      	bne.n	800e5c8 <UART_SetConfig+0x190>
 800e4d8:	4ba5      	ldr	r3, [pc, #660]	@ (800e770 <UART_SetConfig+0x338>)
 800e4da:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e4dc:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800e4e0:	2b28      	cmp	r3, #40	@ 0x28
 800e4e2:	d86d      	bhi.n	800e5c0 <UART_SetConfig+0x188>
 800e4e4:	a201      	add	r2, pc, #4	@ (adr r2, 800e4ec <UART_SetConfig+0xb4>)
 800e4e6:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e4ea:	bf00      	nop
 800e4ec:	0800e591 	.word	0x0800e591
 800e4f0:	0800e5c1 	.word	0x0800e5c1
 800e4f4:	0800e5c1 	.word	0x0800e5c1
 800e4f8:	0800e5c1 	.word	0x0800e5c1
 800e4fc:	0800e5c1 	.word	0x0800e5c1
 800e500:	0800e5c1 	.word	0x0800e5c1
 800e504:	0800e5c1 	.word	0x0800e5c1
 800e508:	0800e5c1 	.word	0x0800e5c1
 800e50c:	0800e599 	.word	0x0800e599
 800e510:	0800e5c1 	.word	0x0800e5c1
 800e514:	0800e5c1 	.word	0x0800e5c1
 800e518:	0800e5c1 	.word	0x0800e5c1
 800e51c:	0800e5c1 	.word	0x0800e5c1
 800e520:	0800e5c1 	.word	0x0800e5c1
 800e524:	0800e5c1 	.word	0x0800e5c1
 800e528:	0800e5c1 	.word	0x0800e5c1
 800e52c:	0800e5a1 	.word	0x0800e5a1
 800e530:	0800e5c1 	.word	0x0800e5c1
 800e534:	0800e5c1 	.word	0x0800e5c1
 800e538:	0800e5c1 	.word	0x0800e5c1
 800e53c:	0800e5c1 	.word	0x0800e5c1
 800e540:	0800e5c1 	.word	0x0800e5c1
 800e544:	0800e5c1 	.word	0x0800e5c1
 800e548:	0800e5c1 	.word	0x0800e5c1
 800e54c:	0800e5a9 	.word	0x0800e5a9
 800e550:	0800e5c1 	.word	0x0800e5c1
 800e554:	0800e5c1 	.word	0x0800e5c1
 800e558:	0800e5c1 	.word	0x0800e5c1
 800e55c:	0800e5c1 	.word	0x0800e5c1
 800e560:	0800e5c1 	.word	0x0800e5c1
 800e564:	0800e5c1 	.word	0x0800e5c1
 800e568:	0800e5c1 	.word	0x0800e5c1
 800e56c:	0800e5b1 	.word	0x0800e5b1
 800e570:	0800e5c1 	.word	0x0800e5c1
 800e574:	0800e5c1 	.word	0x0800e5c1
 800e578:	0800e5c1 	.word	0x0800e5c1
 800e57c:	0800e5c1 	.word	0x0800e5c1
 800e580:	0800e5c1 	.word	0x0800e5c1
 800e584:	0800e5c1 	.word	0x0800e5c1
 800e588:	0800e5c1 	.word	0x0800e5c1
 800e58c:	0800e5b9 	.word	0x0800e5b9
 800e590:	2301      	movs	r3, #1
 800e592:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e596:	e222      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e598:	2304      	movs	r3, #4
 800e59a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e59e:	e21e      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e5a0:	2308      	movs	r3, #8
 800e5a2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5a6:	e21a      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e5a8:	2310      	movs	r3, #16
 800e5aa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5ae:	e216      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e5b0:	2320      	movs	r3, #32
 800e5b2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5b6:	e212      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e5b8:	2340      	movs	r3, #64	@ 0x40
 800e5ba:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5be:	e20e      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e5c0:	2380      	movs	r3, #128	@ 0x80
 800e5c2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e5c6:	e20a      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e5c8:	697b      	ldr	r3, [r7, #20]
 800e5ca:	681b      	ldr	r3, [r3, #0]
 800e5cc:	4a69      	ldr	r2, [pc, #420]	@ (800e774 <UART_SetConfig+0x33c>)
 800e5ce:	4293      	cmp	r3, r2
 800e5d0:	d130      	bne.n	800e634 <UART_SetConfig+0x1fc>
 800e5d2:	4b67      	ldr	r3, [pc, #412]	@ (800e770 <UART_SetConfig+0x338>)
 800e5d4:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e5d6:	f003 0307 	and.w	r3, r3, #7
 800e5da:	2b05      	cmp	r3, #5
 800e5dc:	d826      	bhi.n	800e62c <UART_SetConfig+0x1f4>
 800e5de:	a201      	add	r2, pc, #4	@ (adr r2, 800e5e4 <UART_SetConfig+0x1ac>)
 800e5e0:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e5e4:	0800e5fd 	.word	0x0800e5fd
 800e5e8:	0800e605 	.word	0x0800e605
 800e5ec:	0800e60d 	.word	0x0800e60d
 800e5f0:	0800e615 	.word	0x0800e615
 800e5f4:	0800e61d 	.word	0x0800e61d
 800e5f8:	0800e625 	.word	0x0800e625
 800e5fc:	2300      	movs	r3, #0
 800e5fe:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e602:	e1ec      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e604:	2304      	movs	r3, #4
 800e606:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e60a:	e1e8      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e60c:	2308      	movs	r3, #8
 800e60e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e612:	e1e4      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e614:	2310      	movs	r3, #16
 800e616:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e61a:	e1e0      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e61c:	2320      	movs	r3, #32
 800e61e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e622:	e1dc      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e624:	2340      	movs	r3, #64	@ 0x40
 800e626:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e62a:	e1d8      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e62c:	2380      	movs	r3, #128	@ 0x80
 800e62e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e632:	e1d4      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e634:	697b      	ldr	r3, [r7, #20]
 800e636:	681b      	ldr	r3, [r3, #0]
 800e638:	4a4f      	ldr	r2, [pc, #316]	@ (800e778 <UART_SetConfig+0x340>)
 800e63a:	4293      	cmp	r3, r2
 800e63c:	d130      	bne.n	800e6a0 <UART_SetConfig+0x268>
 800e63e:	4b4c      	ldr	r3, [pc, #304]	@ (800e770 <UART_SetConfig+0x338>)
 800e640:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e642:	f003 0307 	and.w	r3, r3, #7
 800e646:	2b05      	cmp	r3, #5
 800e648:	d826      	bhi.n	800e698 <UART_SetConfig+0x260>
 800e64a:	a201      	add	r2, pc, #4	@ (adr r2, 800e650 <UART_SetConfig+0x218>)
 800e64c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e650:	0800e669 	.word	0x0800e669
 800e654:	0800e671 	.word	0x0800e671
 800e658:	0800e679 	.word	0x0800e679
 800e65c:	0800e681 	.word	0x0800e681
 800e660:	0800e689 	.word	0x0800e689
 800e664:	0800e691 	.word	0x0800e691
 800e668:	2300      	movs	r3, #0
 800e66a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e66e:	e1b6      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e670:	2304      	movs	r3, #4
 800e672:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e676:	e1b2      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e678:	2308      	movs	r3, #8
 800e67a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e67e:	e1ae      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e680:	2310      	movs	r3, #16
 800e682:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e686:	e1aa      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e688:	2320      	movs	r3, #32
 800e68a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e68e:	e1a6      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e690:	2340      	movs	r3, #64	@ 0x40
 800e692:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e696:	e1a2      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e698:	2380      	movs	r3, #128	@ 0x80
 800e69a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e69e:	e19e      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e6a0:	697b      	ldr	r3, [r7, #20]
 800e6a2:	681b      	ldr	r3, [r3, #0]
 800e6a4:	4a35      	ldr	r2, [pc, #212]	@ (800e77c <UART_SetConfig+0x344>)
 800e6a6:	4293      	cmp	r3, r2
 800e6a8:	d130      	bne.n	800e70c <UART_SetConfig+0x2d4>
 800e6aa:	4b31      	ldr	r3, [pc, #196]	@ (800e770 <UART_SetConfig+0x338>)
 800e6ac:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e6ae:	f003 0307 	and.w	r3, r3, #7
 800e6b2:	2b05      	cmp	r3, #5
 800e6b4:	d826      	bhi.n	800e704 <UART_SetConfig+0x2cc>
 800e6b6:	a201      	add	r2, pc, #4	@ (adr r2, 800e6bc <UART_SetConfig+0x284>)
 800e6b8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e6bc:	0800e6d5 	.word	0x0800e6d5
 800e6c0:	0800e6dd 	.word	0x0800e6dd
 800e6c4:	0800e6e5 	.word	0x0800e6e5
 800e6c8:	0800e6ed 	.word	0x0800e6ed
 800e6cc:	0800e6f5 	.word	0x0800e6f5
 800e6d0:	0800e6fd 	.word	0x0800e6fd
 800e6d4:	2300      	movs	r3, #0
 800e6d6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6da:	e180      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e6dc:	2304      	movs	r3, #4
 800e6de:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6e2:	e17c      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e6e4:	2308      	movs	r3, #8
 800e6e6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6ea:	e178      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e6ec:	2310      	movs	r3, #16
 800e6ee:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6f2:	e174      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e6f4:	2320      	movs	r3, #32
 800e6f6:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e6fa:	e170      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e6fc:	2340      	movs	r3, #64	@ 0x40
 800e6fe:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e702:	e16c      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e704:	2380      	movs	r3, #128	@ 0x80
 800e706:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e70a:	e168      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e70c:	697b      	ldr	r3, [r7, #20]
 800e70e:	681b      	ldr	r3, [r3, #0]
 800e710:	4a1b      	ldr	r2, [pc, #108]	@ (800e780 <UART_SetConfig+0x348>)
 800e712:	4293      	cmp	r3, r2
 800e714:	d142      	bne.n	800e79c <UART_SetConfig+0x364>
 800e716:	4b16      	ldr	r3, [pc, #88]	@ (800e770 <UART_SetConfig+0x338>)
 800e718:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e71a:	f003 0307 	and.w	r3, r3, #7
 800e71e:	2b05      	cmp	r3, #5
 800e720:	d838      	bhi.n	800e794 <UART_SetConfig+0x35c>
 800e722:	a201      	add	r2, pc, #4	@ (adr r2, 800e728 <UART_SetConfig+0x2f0>)
 800e724:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e728:	0800e741 	.word	0x0800e741
 800e72c:	0800e749 	.word	0x0800e749
 800e730:	0800e751 	.word	0x0800e751
 800e734:	0800e759 	.word	0x0800e759
 800e738:	0800e785 	.word	0x0800e785
 800e73c:	0800e78d 	.word	0x0800e78d
 800e740:	2300      	movs	r3, #0
 800e742:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e746:	e14a      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e748:	2304      	movs	r3, #4
 800e74a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e74e:	e146      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e750:	2308      	movs	r3, #8
 800e752:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e756:	e142      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e758:	2310      	movs	r3, #16
 800e75a:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e75e:	e13e      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e760:	cfff69f3 	.word	0xcfff69f3
 800e764:	58000c00 	.word	0x58000c00
 800e768:	11fff4ff 	.word	0x11fff4ff
 800e76c:	40011000 	.word	0x40011000
 800e770:	58024400 	.word	0x58024400
 800e774:	40004400 	.word	0x40004400
 800e778:	40004800 	.word	0x40004800
 800e77c:	40004c00 	.word	0x40004c00
 800e780:	40005000 	.word	0x40005000
 800e784:	2320      	movs	r3, #32
 800e786:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e78a:	e128      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e78c:	2340      	movs	r3, #64	@ 0x40
 800e78e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e792:	e124      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e794:	2380      	movs	r3, #128	@ 0x80
 800e796:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e79a:	e120      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e79c:	697b      	ldr	r3, [r7, #20]
 800e79e:	681b      	ldr	r3, [r3, #0]
 800e7a0:	4acb      	ldr	r2, [pc, #812]	@ (800ead0 <UART_SetConfig+0x698>)
 800e7a2:	4293      	cmp	r3, r2
 800e7a4:	d176      	bne.n	800e894 <UART_SetConfig+0x45c>
 800e7a6:	4bcb      	ldr	r3, [pc, #812]	@ (800ead4 <UART_SetConfig+0x69c>)
 800e7a8:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e7aa:	f003 0338 	and.w	r3, r3, #56	@ 0x38
 800e7ae:	2b28      	cmp	r3, #40	@ 0x28
 800e7b0:	d86c      	bhi.n	800e88c <UART_SetConfig+0x454>
 800e7b2:	a201      	add	r2, pc, #4	@ (adr r2, 800e7b8 <UART_SetConfig+0x380>)
 800e7b4:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e7b8:	0800e85d 	.word	0x0800e85d
 800e7bc:	0800e88d 	.word	0x0800e88d
 800e7c0:	0800e88d 	.word	0x0800e88d
 800e7c4:	0800e88d 	.word	0x0800e88d
 800e7c8:	0800e88d 	.word	0x0800e88d
 800e7cc:	0800e88d 	.word	0x0800e88d
 800e7d0:	0800e88d 	.word	0x0800e88d
 800e7d4:	0800e88d 	.word	0x0800e88d
 800e7d8:	0800e865 	.word	0x0800e865
 800e7dc:	0800e88d 	.word	0x0800e88d
 800e7e0:	0800e88d 	.word	0x0800e88d
 800e7e4:	0800e88d 	.word	0x0800e88d
 800e7e8:	0800e88d 	.word	0x0800e88d
 800e7ec:	0800e88d 	.word	0x0800e88d
 800e7f0:	0800e88d 	.word	0x0800e88d
 800e7f4:	0800e88d 	.word	0x0800e88d
 800e7f8:	0800e86d 	.word	0x0800e86d
 800e7fc:	0800e88d 	.word	0x0800e88d
 800e800:	0800e88d 	.word	0x0800e88d
 800e804:	0800e88d 	.word	0x0800e88d
 800e808:	0800e88d 	.word	0x0800e88d
 800e80c:	0800e88d 	.word	0x0800e88d
 800e810:	0800e88d 	.word	0x0800e88d
 800e814:	0800e88d 	.word	0x0800e88d
 800e818:	0800e875 	.word	0x0800e875
 800e81c:	0800e88d 	.word	0x0800e88d
 800e820:	0800e88d 	.word	0x0800e88d
 800e824:	0800e88d 	.word	0x0800e88d
 800e828:	0800e88d 	.word	0x0800e88d
 800e82c:	0800e88d 	.word	0x0800e88d
 800e830:	0800e88d 	.word	0x0800e88d
 800e834:	0800e88d 	.word	0x0800e88d
 800e838:	0800e87d 	.word	0x0800e87d
 800e83c:	0800e88d 	.word	0x0800e88d
 800e840:	0800e88d 	.word	0x0800e88d
 800e844:	0800e88d 	.word	0x0800e88d
 800e848:	0800e88d 	.word	0x0800e88d
 800e84c:	0800e88d 	.word	0x0800e88d
 800e850:	0800e88d 	.word	0x0800e88d
 800e854:	0800e88d 	.word	0x0800e88d
 800e858:	0800e885 	.word	0x0800e885
 800e85c:	2301      	movs	r3, #1
 800e85e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e862:	e0bc      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e864:	2304      	movs	r3, #4
 800e866:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e86a:	e0b8      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e86c:	2308      	movs	r3, #8
 800e86e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e872:	e0b4      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e874:	2310      	movs	r3, #16
 800e876:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e87a:	e0b0      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e87c:	2320      	movs	r3, #32
 800e87e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e882:	e0ac      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e884:	2340      	movs	r3, #64	@ 0x40
 800e886:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e88a:	e0a8      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e88c:	2380      	movs	r3, #128	@ 0x80
 800e88e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e892:	e0a4      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e894:	697b      	ldr	r3, [r7, #20]
 800e896:	681b      	ldr	r3, [r3, #0]
 800e898:	4a8f      	ldr	r2, [pc, #572]	@ (800ead8 <UART_SetConfig+0x6a0>)
 800e89a:	4293      	cmp	r3, r2
 800e89c:	d130      	bne.n	800e900 <UART_SetConfig+0x4c8>
 800e89e:	4b8d      	ldr	r3, [pc, #564]	@ (800ead4 <UART_SetConfig+0x69c>)
 800e8a0:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e8a2:	f003 0307 	and.w	r3, r3, #7
 800e8a6:	2b05      	cmp	r3, #5
 800e8a8:	d826      	bhi.n	800e8f8 <UART_SetConfig+0x4c0>
 800e8aa:	a201      	add	r2, pc, #4	@ (adr r2, 800e8b0 <UART_SetConfig+0x478>)
 800e8ac:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e8b0:	0800e8c9 	.word	0x0800e8c9
 800e8b4:	0800e8d1 	.word	0x0800e8d1
 800e8b8:	0800e8d9 	.word	0x0800e8d9
 800e8bc:	0800e8e1 	.word	0x0800e8e1
 800e8c0:	0800e8e9 	.word	0x0800e8e9
 800e8c4:	0800e8f1 	.word	0x0800e8f1
 800e8c8:	2300      	movs	r3, #0
 800e8ca:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e8ce:	e086      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e8d0:	2304      	movs	r3, #4
 800e8d2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e8d6:	e082      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e8d8:	2308      	movs	r3, #8
 800e8da:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e8de:	e07e      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e8e0:	2310      	movs	r3, #16
 800e8e2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e8e6:	e07a      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e8e8:	2320      	movs	r3, #32
 800e8ea:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e8ee:	e076      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e8f0:	2340      	movs	r3, #64	@ 0x40
 800e8f2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e8f6:	e072      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e8f8:	2380      	movs	r3, #128	@ 0x80
 800e8fa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e8fe:	e06e      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e900:	697b      	ldr	r3, [r7, #20]
 800e902:	681b      	ldr	r3, [r3, #0]
 800e904:	4a75      	ldr	r2, [pc, #468]	@ (800eadc <UART_SetConfig+0x6a4>)
 800e906:	4293      	cmp	r3, r2
 800e908:	d130      	bne.n	800e96c <UART_SetConfig+0x534>
 800e90a:	4b72      	ldr	r3, [pc, #456]	@ (800ead4 <UART_SetConfig+0x69c>)
 800e90c:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 800e90e:	f003 0307 	and.w	r3, r3, #7
 800e912:	2b05      	cmp	r3, #5
 800e914:	d826      	bhi.n	800e964 <UART_SetConfig+0x52c>
 800e916:	a201      	add	r2, pc, #4	@ (adr r2, 800e91c <UART_SetConfig+0x4e4>)
 800e918:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e91c:	0800e935 	.word	0x0800e935
 800e920:	0800e93d 	.word	0x0800e93d
 800e924:	0800e945 	.word	0x0800e945
 800e928:	0800e94d 	.word	0x0800e94d
 800e92c:	0800e955 	.word	0x0800e955
 800e930:	0800e95d 	.word	0x0800e95d
 800e934:	2300      	movs	r3, #0
 800e936:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e93a:	e050      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e93c:	2304      	movs	r3, #4
 800e93e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e942:	e04c      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e944:	2308      	movs	r3, #8
 800e946:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e94a:	e048      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e94c:	2310      	movs	r3, #16
 800e94e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e952:	e044      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e954:	2320      	movs	r3, #32
 800e956:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e95a:	e040      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e95c:	2340      	movs	r3, #64	@ 0x40
 800e95e:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e962:	e03c      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e964:	2380      	movs	r3, #128	@ 0x80
 800e966:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e96a:	e038      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e96c:	697b      	ldr	r3, [r7, #20]
 800e96e:	681b      	ldr	r3, [r3, #0]
 800e970:	4a5b      	ldr	r2, [pc, #364]	@ (800eae0 <UART_SetConfig+0x6a8>)
 800e972:	4293      	cmp	r3, r2
 800e974:	d130      	bne.n	800e9d8 <UART_SetConfig+0x5a0>
 800e976:	4b57      	ldr	r3, [pc, #348]	@ (800ead4 <UART_SetConfig+0x69c>)
 800e978:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800e97a:	f003 0307 	and.w	r3, r3, #7
 800e97e:	2b05      	cmp	r3, #5
 800e980:	d826      	bhi.n	800e9d0 <UART_SetConfig+0x598>
 800e982:	a201      	add	r2, pc, #4	@ (adr r2, 800e988 <UART_SetConfig+0x550>)
 800e984:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800e988:	0800e9a1 	.word	0x0800e9a1
 800e98c:	0800e9a9 	.word	0x0800e9a9
 800e990:	0800e9b1 	.word	0x0800e9b1
 800e994:	0800e9b9 	.word	0x0800e9b9
 800e998:	0800e9c1 	.word	0x0800e9c1
 800e99c:	0800e9c9 	.word	0x0800e9c9
 800e9a0:	2302      	movs	r3, #2
 800e9a2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e9a6:	e01a      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e9a8:	2304      	movs	r3, #4
 800e9aa:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e9ae:	e016      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e9b0:	2308      	movs	r3, #8
 800e9b2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e9b6:	e012      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e9b8:	2310      	movs	r3, #16
 800e9ba:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e9be:	e00e      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e9c0:	2320      	movs	r3, #32
 800e9c2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e9c6:	e00a      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e9c8:	2340      	movs	r3, #64	@ 0x40
 800e9ca:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e9ce:	e006      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e9d0:	2380      	movs	r3, #128	@ 0x80
 800e9d2:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43
 800e9d6:	e002      	b.n	800e9de <UART_SetConfig+0x5a6>
 800e9d8:	2380      	movs	r3, #128	@ 0x80
 800e9da:	f887 3043 	strb.w	r3, [r7, #67]	@ 0x43

  /* Check LPUART instance */
  if (UART_INSTANCE_LOWPOWER(huart))
 800e9de:	697b      	ldr	r3, [r7, #20]
 800e9e0:	681b      	ldr	r3, [r3, #0]
 800e9e2:	4a3f      	ldr	r2, [pc, #252]	@ (800eae0 <UART_SetConfig+0x6a8>)
 800e9e4:	4293      	cmp	r3, r2
 800e9e6:	f040 80f8 	bne.w	800ebda <UART_SetConfig+0x7a2>
  {
    /* Retrieve frequency clock */
    switch (clocksource)
 800e9ea:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800e9ee:	2b20      	cmp	r3, #32
 800e9f0:	dc46      	bgt.n	800ea80 <UART_SetConfig+0x648>
 800e9f2:	2b02      	cmp	r3, #2
 800e9f4:	f2c0 8082 	blt.w	800eafc <UART_SetConfig+0x6c4>
 800e9f8:	3b02      	subs	r3, #2
 800e9fa:	2b1e      	cmp	r3, #30
 800e9fc:	d87e      	bhi.n	800eafc <UART_SetConfig+0x6c4>
 800e9fe:	a201      	add	r2, pc, #4	@ (adr r2, 800ea04 <UART_SetConfig+0x5cc>)
 800ea00:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800ea04:	0800ea87 	.word	0x0800ea87
 800ea08:	0800eafd 	.word	0x0800eafd
 800ea0c:	0800ea8f 	.word	0x0800ea8f
 800ea10:	0800eafd 	.word	0x0800eafd
 800ea14:	0800eafd 	.word	0x0800eafd
 800ea18:	0800eafd 	.word	0x0800eafd
 800ea1c:	0800ea9f 	.word	0x0800ea9f
 800ea20:	0800eafd 	.word	0x0800eafd
 800ea24:	0800eafd 	.word	0x0800eafd
 800ea28:	0800eafd 	.word	0x0800eafd
 800ea2c:	0800eafd 	.word	0x0800eafd
 800ea30:	0800eafd 	.word	0x0800eafd
 800ea34:	0800eafd 	.word	0x0800eafd
 800ea38:	0800eafd 	.word	0x0800eafd
 800ea3c:	0800eaaf 	.word	0x0800eaaf
 800ea40:	0800eafd 	.word	0x0800eafd
 800ea44:	0800eafd 	.word	0x0800eafd
 800ea48:	0800eafd 	.word	0x0800eafd
 800ea4c:	0800eafd 	.word	0x0800eafd
 800ea50:	0800eafd 	.word	0x0800eafd
 800ea54:	0800eafd 	.word	0x0800eafd
 800ea58:	0800eafd 	.word	0x0800eafd
 800ea5c:	0800eafd 	.word	0x0800eafd
 800ea60:	0800eafd 	.word	0x0800eafd
 800ea64:	0800eafd 	.word	0x0800eafd
 800ea68:	0800eafd 	.word	0x0800eafd
 800ea6c:	0800eafd 	.word	0x0800eafd
 800ea70:	0800eafd 	.word	0x0800eafd
 800ea74:	0800eafd 	.word	0x0800eafd
 800ea78:	0800eafd 	.word	0x0800eafd
 800ea7c:	0800eaef 	.word	0x0800eaef
 800ea80:	2b40      	cmp	r3, #64	@ 0x40
 800ea82:	d037      	beq.n	800eaf4 <UART_SetConfig+0x6bc>
 800ea84:	e03a      	b.n	800eafc <UART_SetConfig+0x6c4>
    {
      case UART_CLOCKSOURCE_D3PCLK1:
        pclk = HAL_RCCEx_GetD3PCLK1Freq();
 800ea86:	f7fe f887 	bl	800cb98 <HAL_RCCEx_GetD3PCLK1Freq>
 800ea8a:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800ea8c:	e03c      	b.n	800eb08 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800ea8e:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800ea92:	4618      	mov	r0, r3
 800ea94:	f7fe f896 	bl	800cbc4 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800ea98:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ea9a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ea9c:	e034      	b.n	800eb08 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800ea9e:	f107 0318 	add.w	r3, r7, #24
 800eaa2:	4618      	mov	r0, r3
 800eaa4:	f7fe f9e2 	bl	800ce6c <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800eaa8:	69fb      	ldr	r3, [r7, #28]
 800eaaa:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eaac:	e02c      	b.n	800eb08 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800eaae:	4b09      	ldr	r3, [pc, #36]	@ (800ead4 <UART_SetConfig+0x69c>)
 800eab0:	681b      	ldr	r3, [r3, #0]
 800eab2:	f003 0320 	and.w	r3, r3, #32
 800eab6:	2b00      	cmp	r3, #0
 800eab8:	d016      	beq.n	800eae8 <UART_SetConfig+0x6b0>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800eaba:	4b06      	ldr	r3, [pc, #24]	@ (800ead4 <UART_SetConfig+0x69c>)
 800eabc:	681b      	ldr	r3, [r3, #0]
 800eabe:	08db      	lsrs	r3, r3, #3
 800eac0:	f003 0303 	and.w	r3, r3, #3
 800eac4:	4a07      	ldr	r2, [pc, #28]	@ (800eae4 <UART_SetConfig+0x6ac>)
 800eac6:	fa22 f303 	lsr.w	r3, r2, r3
 800eaca:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800eacc:	e01c      	b.n	800eb08 <UART_SetConfig+0x6d0>
 800eace:	bf00      	nop
 800ead0:	40011400 	.word	0x40011400
 800ead4:	58024400 	.word	0x58024400
 800ead8:	40007800 	.word	0x40007800
 800eadc:	40007c00 	.word	0x40007c00
 800eae0:	58000c00 	.word	0x58000c00
 800eae4:	03d09000 	.word	0x03d09000
          pclk = (uint32_t) HSI_VALUE;
 800eae8:	4b9d      	ldr	r3, [pc, #628]	@ (800ed60 <UART_SetConfig+0x928>)
 800eaea:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eaec:	e00c      	b.n	800eb08 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800eaee:	4b9d      	ldr	r3, [pc, #628]	@ (800ed64 <UART_SetConfig+0x92c>)
 800eaf0:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eaf2:	e009      	b.n	800eb08 <UART_SetConfig+0x6d0>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800eaf4:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800eaf8:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eafa:	e005      	b.n	800eb08 <UART_SetConfig+0x6d0>
      default:
        pclk = 0U;
 800eafc:	2300      	movs	r3, #0
 800eafe:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800eb00:	2301      	movs	r3, #1
 800eb02:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800eb06:	bf00      	nop
    }

    /* If proper clock source reported */
    if (pclk != 0U)
 800eb08:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800eb0a:	2b00      	cmp	r3, #0
 800eb0c:	f000 81de 	beq.w	800eecc <UART_SetConfig+0xa94>
    {
      /* Compute clock after Prescaler */
      lpuart_ker_ck_pres = (pclk / UARTPrescTable[huart->Init.ClockPrescaler]);
 800eb10:	697b      	ldr	r3, [r7, #20]
 800eb12:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800eb14:	4a94      	ldr	r2, [pc, #592]	@ (800ed68 <UART_SetConfig+0x930>)
 800eb16:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800eb1a:	461a      	mov	r2, r3
 800eb1c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800eb1e:	fbb3 f3f2 	udiv	r3, r3, r2
 800eb22:	633b      	str	r3, [r7, #48]	@ 0x30

      /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800eb24:	697b      	ldr	r3, [r7, #20]
 800eb26:	685a      	ldr	r2, [r3, #4]
 800eb28:	4613      	mov	r3, r2
 800eb2a:	005b      	lsls	r3, r3, #1
 800eb2c:	4413      	add	r3, r2
 800eb2e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800eb30:	429a      	cmp	r2, r3
 800eb32:	d305      	bcc.n	800eb40 <UART_SetConfig+0x708>
          (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
 800eb34:	697b      	ldr	r3, [r7, #20]
 800eb36:	685b      	ldr	r3, [r3, #4]
 800eb38:	031b      	lsls	r3, r3, #12
      if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
 800eb3a:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800eb3c:	429a      	cmp	r2, r3
 800eb3e:	d903      	bls.n	800eb48 <UART_SetConfig+0x710>
      {
        ret = HAL_ERROR;
 800eb40:	2301      	movs	r3, #1
 800eb42:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800eb46:	e1c1      	b.n	800eecc <UART_SetConfig+0xa94>
      }
      else
      {
        /* Check computed UsartDiv value is in allocated range
           (it is forbidden to write values lower than 0x300 in the LPUART_BRR register) */
        usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800eb48:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800eb4a:	2200      	movs	r2, #0
 800eb4c:	60bb      	str	r3, [r7, #8]
 800eb4e:	60fa      	str	r2, [r7, #12]
 800eb50:	697b      	ldr	r3, [r7, #20]
 800eb52:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800eb54:	4a84      	ldr	r2, [pc, #528]	@ (800ed68 <UART_SetConfig+0x930>)
 800eb56:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800eb5a:	b29b      	uxth	r3, r3
 800eb5c:	2200      	movs	r2, #0
 800eb5e:	603b      	str	r3, [r7, #0]
 800eb60:	607a      	str	r2, [r7, #4]
 800eb62:	e9d7 2300 	ldrd	r2, r3, [r7]
 800eb66:	e9d7 0102 	ldrd	r0, r1, [r7, #8]
 800eb6a:	f7f1 fddd 	bl	8000728 <__aeabi_uldivmod>
 800eb6e:	4602      	mov	r2, r0
 800eb70:	460b      	mov	r3, r1
 800eb72:	4610      	mov	r0, r2
 800eb74:	4619      	mov	r1, r3
 800eb76:	f04f 0200 	mov.w	r2, #0
 800eb7a:	f04f 0300 	mov.w	r3, #0
 800eb7e:	020b      	lsls	r3, r1, #8
 800eb80:	ea43 6310 	orr.w	r3, r3, r0, lsr #24
 800eb84:	0202      	lsls	r2, r0, #8
 800eb86:	6979      	ldr	r1, [r7, #20]
 800eb88:	6849      	ldr	r1, [r1, #4]
 800eb8a:	0849      	lsrs	r1, r1, #1
 800eb8c:	2000      	movs	r0, #0
 800eb8e:	460c      	mov	r4, r1
 800eb90:	4605      	mov	r5, r0
 800eb92:	eb12 0804 	adds.w	r8, r2, r4
 800eb96:	eb43 0905 	adc.w	r9, r3, r5
 800eb9a:	697b      	ldr	r3, [r7, #20]
 800eb9c:	685b      	ldr	r3, [r3, #4]
 800eb9e:	2200      	movs	r2, #0
 800eba0:	469a      	mov	sl, r3
 800eba2:	4693      	mov	fp, r2
 800eba4:	4652      	mov	r2, sl
 800eba6:	465b      	mov	r3, fp
 800eba8:	4640      	mov	r0, r8
 800ebaa:	4649      	mov	r1, r9
 800ebac:	f7f1 fdbc 	bl	8000728 <__aeabi_uldivmod>
 800ebb0:	4602      	mov	r2, r0
 800ebb2:	460b      	mov	r3, r1
 800ebb4:	4613      	mov	r3, r2
 800ebb6:	63bb      	str	r3, [r7, #56]	@ 0x38
        if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
 800ebb8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ebba:	f5b3 7f40 	cmp.w	r3, #768	@ 0x300
 800ebbe:	d308      	bcc.n	800ebd2 <UART_SetConfig+0x79a>
 800ebc0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ebc2:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800ebc6:	d204      	bcs.n	800ebd2 <UART_SetConfig+0x79a>
        {
          huart->Instance->BRR = usartdiv;
 800ebc8:	697b      	ldr	r3, [r7, #20]
 800ebca:	681b      	ldr	r3, [r3, #0]
 800ebcc:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800ebce:	60da      	str	r2, [r3, #12]
 800ebd0:	e17c      	b.n	800eecc <UART_SetConfig+0xa94>
        }
        else
        {
          ret = HAL_ERROR;
 800ebd2:	2301      	movs	r3, #1
 800ebd4:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800ebd8:	e178      	b.n	800eecc <UART_SetConfig+0xa94>
      } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) ||
                (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
    } /* if (pclk != 0) */
  }
  /* Check UART Over Sampling to set Baud Rate Register */
  else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
 800ebda:	697b      	ldr	r3, [r7, #20]
 800ebdc:	69db      	ldr	r3, [r3, #28]
 800ebde:	f5b3 4f00 	cmp.w	r3, #32768	@ 0x8000
 800ebe2:	f040 80c5 	bne.w	800ed70 <UART_SetConfig+0x938>
  {
    switch (clocksource)
 800ebe6:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800ebea:	2b20      	cmp	r3, #32
 800ebec:	dc48      	bgt.n	800ec80 <UART_SetConfig+0x848>
 800ebee:	2b00      	cmp	r3, #0
 800ebf0:	db7b      	blt.n	800ecea <UART_SetConfig+0x8b2>
 800ebf2:	2b20      	cmp	r3, #32
 800ebf4:	d879      	bhi.n	800ecea <UART_SetConfig+0x8b2>
 800ebf6:	a201      	add	r2, pc, #4	@ (adr r2, 800ebfc <UART_SetConfig+0x7c4>)
 800ebf8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800ebfc:	0800ec87 	.word	0x0800ec87
 800ec00:	0800ec8f 	.word	0x0800ec8f
 800ec04:	0800eceb 	.word	0x0800eceb
 800ec08:	0800eceb 	.word	0x0800eceb
 800ec0c:	0800ec97 	.word	0x0800ec97
 800ec10:	0800eceb 	.word	0x0800eceb
 800ec14:	0800eceb 	.word	0x0800eceb
 800ec18:	0800eceb 	.word	0x0800eceb
 800ec1c:	0800eca7 	.word	0x0800eca7
 800ec20:	0800eceb 	.word	0x0800eceb
 800ec24:	0800eceb 	.word	0x0800eceb
 800ec28:	0800eceb 	.word	0x0800eceb
 800ec2c:	0800eceb 	.word	0x0800eceb
 800ec30:	0800eceb 	.word	0x0800eceb
 800ec34:	0800eceb 	.word	0x0800eceb
 800ec38:	0800eceb 	.word	0x0800eceb
 800ec3c:	0800ecb7 	.word	0x0800ecb7
 800ec40:	0800eceb 	.word	0x0800eceb
 800ec44:	0800eceb 	.word	0x0800eceb
 800ec48:	0800eceb 	.word	0x0800eceb
 800ec4c:	0800eceb 	.word	0x0800eceb
 800ec50:	0800eceb 	.word	0x0800eceb
 800ec54:	0800eceb 	.word	0x0800eceb
 800ec58:	0800eceb 	.word	0x0800eceb
 800ec5c:	0800eceb 	.word	0x0800eceb
 800ec60:	0800eceb 	.word	0x0800eceb
 800ec64:	0800eceb 	.word	0x0800eceb
 800ec68:	0800eceb 	.word	0x0800eceb
 800ec6c:	0800eceb 	.word	0x0800eceb
 800ec70:	0800eceb 	.word	0x0800eceb
 800ec74:	0800eceb 	.word	0x0800eceb
 800ec78:	0800eceb 	.word	0x0800eceb
 800ec7c:	0800ecdd 	.word	0x0800ecdd
 800ec80:	2b40      	cmp	r3, #64	@ 0x40
 800ec82:	d02e      	beq.n	800ece2 <UART_SetConfig+0x8aa>
 800ec84:	e031      	b.n	800ecea <UART_SetConfig+0x8b2>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800ec86:	f7fc fd2b 	bl	800b6e0 <HAL_RCC_GetPCLK1Freq>
 800ec8a:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800ec8c:	e033      	b.n	800ecf6 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800ec8e:	f7fc fd3d 	bl	800b70c <HAL_RCC_GetPCLK2Freq>
 800ec92:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800ec94:	e02f      	b.n	800ecf6 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800ec96:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800ec9a:	4618      	mov	r0, r3
 800ec9c:	f7fd ff92 	bl	800cbc4 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800eca0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800eca2:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800eca4:	e027      	b.n	800ecf6 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800eca6:	f107 0318 	add.w	r3, r7, #24
 800ecaa:	4618      	mov	r0, r3
 800ecac:	f7fe f8de 	bl	800ce6c <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800ecb0:	69fb      	ldr	r3, [r7, #28]
 800ecb2:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ecb4:	e01f      	b.n	800ecf6 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800ecb6:	4b2d      	ldr	r3, [pc, #180]	@ (800ed6c <UART_SetConfig+0x934>)
 800ecb8:	681b      	ldr	r3, [r3, #0]
 800ecba:	f003 0320 	and.w	r3, r3, #32
 800ecbe:	2b00      	cmp	r3, #0
 800ecc0:	d009      	beq.n	800ecd6 <UART_SetConfig+0x89e>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800ecc2:	4b2a      	ldr	r3, [pc, #168]	@ (800ed6c <UART_SetConfig+0x934>)
 800ecc4:	681b      	ldr	r3, [r3, #0]
 800ecc6:	08db      	lsrs	r3, r3, #3
 800ecc8:	f003 0303 	and.w	r3, r3, #3
 800eccc:	4a24      	ldr	r2, [pc, #144]	@ (800ed60 <UART_SetConfig+0x928>)
 800ecce:	fa22 f303 	lsr.w	r3, r2, r3
 800ecd2:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800ecd4:	e00f      	b.n	800ecf6 <UART_SetConfig+0x8be>
          pclk = (uint32_t) HSI_VALUE;
 800ecd6:	4b22      	ldr	r3, [pc, #136]	@ (800ed60 <UART_SetConfig+0x928>)
 800ecd8:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ecda:	e00c      	b.n	800ecf6 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800ecdc:	4b21      	ldr	r3, [pc, #132]	@ (800ed64 <UART_SetConfig+0x92c>)
 800ecde:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ece0:	e009      	b.n	800ecf6 <UART_SetConfig+0x8be>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800ece2:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800ece6:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ece8:	e005      	b.n	800ecf6 <UART_SetConfig+0x8be>
      default:
        pclk = 0U;
 800ecea:	2300      	movs	r3, #0
 800ecec:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800ecee:	2301      	movs	r3, #1
 800ecf0:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800ecf4:	bf00      	nop
    }

    /* USARTDIV must be greater than or equal to 0d16 */
    if (pclk != 0U)
 800ecf6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ecf8:	2b00      	cmp	r3, #0
 800ecfa:	f000 80e7 	beq.w	800eecc <UART_SetConfig+0xa94>
    {
      usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800ecfe:	697b      	ldr	r3, [r7, #20]
 800ed00:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800ed02:	4a19      	ldr	r2, [pc, #100]	@ (800ed68 <UART_SetConfig+0x930>)
 800ed04:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800ed08:	461a      	mov	r2, r3
 800ed0a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ed0c:	fbb3 f3f2 	udiv	r3, r3, r2
 800ed10:	005a      	lsls	r2, r3, #1
 800ed12:	697b      	ldr	r3, [r7, #20]
 800ed14:	685b      	ldr	r3, [r3, #4]
 800ed16:	085b      	lsrs	r3, r3, #1
 800ed18:	441a      	add	r2, r3
 800ed1a:	697b      	ldr	r3, [r7, #20]
 800ed1c:	685b      	ldr	r3, [r3, #4]
 800ed1e:	fbb2 f3f3 	udiv	r3, r2, r3
 800ed22:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800ed24:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ed26:	2b0f      	cmp	r3, #15
 800ed28:	d916      	bls.n	800ed58 <UART_SetConfig+0x920>
 800ed2a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ed2c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800ed30:	d212      	bcs.n	800ed58 <UART_SetConfig+0x920>
      {
        brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
 800ed32:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ed34:	b29b      	uxth	r3, r3
 800ed36:	f023 030f 	bic.w	r3, r3, #15
 800ed3a:	86fb      	strh	r3, [r7, #54]	@ 0x36
        brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
 800ed3c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ed3e:	085b      	lsrs	r3, r3, #1
 800ed40:	b29b      	uxth	r3, r3
 800ed42:	f003 0307 	and.w	r3, r3, #7
 800ed46:	b29a      	uxth	r2, r3
 800ed48:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 800ed4a:	4313      	orrs	r3, r2
 800ed4c:	86fb      	strh	r3, [r7, #54]	@ 0x36
        huart->Instance->BRR = brrtemp;
 800ed4e:	697b      	ldr	r3, [r7, #20]
 800ed50:	681b      	ldr	r3, [r3, #0]
 800ed52:	8efa      	ldrh	r2, [r7, #54]	@ 0x36
 800ed54:	60da      	str	r2, [r3, #12]
 800ed56:	e0b9      	b.n	800eecc <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800ed58:	2301      	movs	r3, #1
 800ed5a:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
 800ed5e:	e0b5      	b.n	800eecc <UART_SetConfig+0xa94>
 800ed60:	03d09000 	.word	0x03d09000
 800ed64:	003d0900 	.word	0x003d0900
 800ed68:	08031d24 	.word	0x08031d24
 800ed6c:	58024400 	.word	0x58024400
      }
    }
  }
  else
  {
    switch (clocksource)
 800ed70:	f897 3043 	ldrb.w	r3, [r7, #67]	@ 0x43
 800ed74:	2b20      	cmp	r3, #32
 800ed76:	dc49      	bgt.n	800ee0c <UART_SetConfig+0x9d4>
 800ed78:	2b00      	cmp	r3, #0
 800ed7a:	db7c      	blt.n	800ee76 <UART_SetConfig+0xa3e>
 800ed7c:	2b20      	cmp	r3, #32
 800ed7e:	d87a      	bhi.n	800ee76 <UART_SetConfig+0xa3e>
 800ed80:	a201      	add	r2, pc, #4	@ (adr r2, 800ed88 <UART_SetConfig+0x950>)
 800ed82:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 800ed86:	bf00      	nop
 800ed88:	0800ee13 	.word	0x0800ee13
 800ed8c:	0800ee1b 	.word	0x0800ee1b
 800ed90:	0800ee77 	.word	0x0800ee77
 800ed94:	0800ee77 	.word	0x0800ee77
 800ed98:	0800ee23 	.word	0x0800ee23
 800ed9c:	0800ee77 	.word	0x0800ee77
 800eda0:	0800ee77 	.word	0x0800ee77
 800eda4:	0800ee77 	.word	0x0800ee77
 800eda8:	0800ee33 	.word	0x0800ee33
 800edac:	0800ee77 	.word	0x0800ee77
 800edb0:	0800ee77 	.word	0x0800ee77
 800edb4:	0800ee77 	.word	0x0800ee77
 800edb8:	0800ee77 	.word	0x0800ee77
 800edbc:	0800ee77 	.word	0x0800ee77
 800edc0:	0800ee77 	.word	0x0800ee77
 800edc4:	0800ee77 	.word	0x0800ee77
 800edc8:	0800ee43 	.word	0x0800ee43
 800edcc:	0800ee77 	.word	0x0800ee77
 800edd0:	0800ee77 	.word	0x0800ee77
 800edd4:	0800ee77 	.word	0x0800ee77
 800edd8:	0800ee77 	.word	0x0800ee77
 800eddc:	0800ee77 	.word	0x0800ee77
 800ede0:	0800ee77 	.word	0x0800ee77
 800ede4:	0800ee77 	.word	0x0800ee77
 800ede8:	0800ee77 	.word	0x0800ee77
 800edec:	0800ee77 	.word	0x0800ee77
 800edf0:	0800ee77 	.word	0x0800ee77
 800edf4:	0800ee77 	.word	0x0800ee77
 800edf8:	0800ee77 	.word	0x0800ee77
 800edfc:	0800ee77 	.word	0x0800ee77
 800ee00:	0800ee77 	.word	0x0800ee77
 800ee04:	0800ee77 	.word	0x0800ee77
 800ee08:	0800ee69 	.word	0x0800ee69
 800ee0c:	2b40      	cmp	r3, #64	@ 0x40
 800ee0e:	d02e      	beq.n	800ee6e <UART_SetConfig+0xa36>
 800ee10:	e031      	b.n	800ee76 <UART_SetConfig+0xa3e>
    {
      case UART_CLOCKSOURCE_D2PCLK1:
        pclk = HAL_RCC_GetPCLK1Freq();
 800ee12:	f7fc fc65 	bl	800b6e0 <HAL_RCC_GetPCLK1Freq>
 800ee16:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800ee18:	e033      	b.n	800ee82 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_D2PCLK2:
        pclk = HAL_RCC_GetPCLK2Freq();
 800ee1a:	f7fc fc77 	bl	800b70c <HAL_RCC_GetPCLK2Freq>
 800ee1e:	63f8      	str	r0, [r7, #60]	@ 0x3c
        break;
 800ee20:	e02f      	b.n	800ee82 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL2:
        HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
 800ee22:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 800ee26:	4618      	mov	r0, r3
 800ee28:	f7fd fecc 	bl	800cbc4 <HAL_RCCEx_GetPLL2ClockFreq>
        pclk = pll2_clocks.PLL2_Q_Frequency;
 800ee2c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800ee2e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ee30:	e027      	b.n	800ee82 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_PLL3:
        HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);
 800ee32:	f107 0318 	add.w	r3, r7, #24
 800ee36:	4618      	mov	r0, r3
 800ee38:	f7fe f818 	bl	800ce6c <HAL_RCCEx_GetPLL3ClockFreq>
        pclk = pll3_clocks.PLL3_Q_Frequency;
 800ee3c:	69fb      	ldr	r3, [r7, #28]
 800ee3e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ee40:	e01f      	b.n	800ee82 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_HSI:
        if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
 800ee42:	4b2d      	ldr	r3, [pc, #180]	@ (800eef8 <UART_SetConfig+0xac0>)
 800ee44:	681b      	ldr	r3, [r3, #0]
 800ee46:	f003 0320 	and.w	r3, r3, #32
 800ee4a:	2b00      	cmp	r3, #0
 800ee4c:	d009      	beq.n	800ee62 <UART_SetConfig+0xa2a>
        {
          pclk = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> 3U));
 800ee4e:	4b2a      	ldr	r3, [pc, #168]	@ (800eef8 <UART_SetConfig+0xac0>)
 800ee50:	681b      	ldr	r3, [r3, #0]
 800ee52:	08db      	lsrs	r3, r3, #3
 800ee54:	f003 0303 	and.w	r3, r3, #3
 800ee58:	4a28      	ldr	r2, [pc, #160]	@ (800eefc <UART_SetConfig+0xac4>)
 800ee5a:	fa22 f303 	lsr.w	r3, r2, r3
 800ee5e:	63fb      	str	r3, [r7, #60]	@ 0x3c
        }
        else
        {
          pclk = (uint32_t) HSI_VALUE;
        }
        break;
 800ee60:	e00f      	b.n	800ee82 <UART_SetConfig+0xa4a>
          pclk = (uint32_t) HSI_VALUE;
 800ee62:	4b26      	ldr	r3, [pc, #152]	@ (800eefc <UART_SetConfig+0xac4>)
 800ee64:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ee66:	e00c      	b.n	800ee82 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_CSI:
        pclk = (uint32_t) CSI_VALUE;
 800ee68:	4b25      	ldr	r3, [pc, #148]	@ (800ef00 <UART_SetConfig+0xac8>)
 800ee6a:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ee6c:	e009      	b.n	800ee82 <UART_SetConfig+0xa4a>
      case UART_CLOCKSOURCE_LSE:
        pclk = (uint32_t) LSE_VALUE;
 800ee6e:	f44f 4300 	mov.w	r3, #32768	@ 0x8000
 800ee72:	63fb      	str	r3, [r7, #60]	@ 0x3c
        break;
 800ee74:	e005      	b.n	800ee82 <UART_SetConfig+0xa4a>
      default:
        pclk = 0U;
 800ee76:	2300      	movs	r3, #0
 800ee78:	63fb      	str	r3, [r7, #60]	@ 0x3c
        ret = HAL_ERROR;
 800ee7a:	2301      	movs	r3, #1
 800ee7c:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
        break;
 800ee80:	bf00      	nop
    }

    if (pclk != 0U)
 800ee82:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ee84:	2b00      	cmp	r3, #0
 800ee86:	d021      	beq.n	800eecc <UART_SetConfig+0xa94>
    {
      /* USARTDIV must be greater than or equal to 0d16 */
      usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
 800ee88:	697b      	ldr	r3, [r7, #20]
 800ee8a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800ee8c:	4a1d      	ldr	r2, [pc, #116]	@ (800ef04 <UART_SetConfig+0xacc>)
 800ee8e:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 800ee92:	461a      	mov	r2, r3
 800ee94:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800ee96:	fbb3 f2f2 	udiv	r2, r3, r2
 800ee9a:	697b      	ldr	r3, [r7, #20]
 800ee9c:	685b      	ldr	r3, [r3, #4]
 800ee9e:	085b      	lsrs	r3, r3, #1
 800eea0:	441a      	add	r2, r3
 800eea2:	697b      	ldr	r3, [r7, #20]
 800eea4:	685b      	ldr	r3, [r3, #4]
 800eea6:	fbb2 f3f3 	udiv	r3, r2, r3
 800eeaa:	63bb      	str	r3, [r7, #56]	@ 0x38
      if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
 800eeac:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800eeae:	2b0f      	cmp	r3, #15
 800eeb0:	d909      	bls.n	800eec6 <UART_SetConfig+0xa8e>
 800eeb2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800eeb4:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 800eeb8:	d205      	bcs.n	800eec6 <UART_SetConfig+0xa8e>
      {
        huart->Instance->BRR = (uint16_t)usartdiv;
 800eeba:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800eebc:	b29a      	uxth	r2, r3
 800eebe:	697b      	ldr	r3, [r7, #20]
 800eec0:	681b      	ldr	r3, [r3, #0]
 800eec2:	60da      	str	r2, [r3, #12]
 800eec4:	e002      	b.n	800eecc <UART_SetConfig+0xa94>
      }
      else
      {
        ret = HAL_ERROR;
 800eec6:	2301      	movs	r3, #1
 800eec8:	f887 3042 	strb.w	r3, [r7, #66]	@ 0x42
      }
    }
  }

  /* Initialize the number of data to process during RX/TX ISR execution */
  huart->NbTxDataToProcess = 1;
 800eecc:	697b      	ldr	r3, [r7, #20]
 800eece:	2201      	movs	r2, #1
 800eed0:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
  huart->NbRxDataToProcess = 1;
 800eed4:	697b      	ldr	r3, [r7, #20]
 800eed6:	2201      	movs	r2, #1
 800eed8:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /* Clear ISR function pointers */
  huart->RxISR = NULL;
 800eedc:	697b      	ldr	r3, [r7, #20]
 800eede:	2200      	movs	r2, #0
 800eee0:	675a      	str	r2, [r3, #116]	@ 0x74
  huart->TxISR = NULL;
 800eee2:	697b      	ldr	r3, [r7, #20]
 800eee4:	2200      	movs	r2, #0
 800eee6:	679a      	str	r2, [r3, #120]	@ 0x78

  return ret;
 800eee8:	f897 3042 	ldrb.w	r3, [r7, #66]	@ 0x42
}
 800eeec:	4618      	mov	r0, r3
 800eeee:	3748      	adds	r7, #72	@ 0x48
 800eef0:	46bd      	mov	sp, r7
 800eef2:	e8bd 8fb0 	ldmia.w	sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
 800eef6:	bf00      	nop
 800eef8:	58024400 	.word	0x58024400
 800eefc:	03d09000 	.word	0x03d09000
 800ef00:	003d0900 	.word	0x003d0900
 800ef04:	08031d24 	.word	0x08031d24

0800ef08 <UART_AdvFeatureConfig>:
  * @brief Configure the UART peripheral advanced features.
  * @param huart UART handle.
  * @retval None
  */
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
{
 800ef08:	b480      	push	{r7}
 800ef0a:	b083      	sub	sp, #12
 800ef0c:	af00      	add	r7, sp, #0
 800ef0e:	6078      	str	r0, [r7, #4]
  /* Check whether the set of advanced features to configure is properly set */
  assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));

  /* if required, configure RX/TX pins swap */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
 800ef10:	687b      	ldr	r3, [r7, #4]
 800ef12:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ef14:	f003 0308 	and.w	r3, r3, #8
 800ef18:	2b00      	cmp	r3, #0
 800ef1a:	d00a      	beq.n	800ef32 <UART_AdvFeatureConfig+0x2a>
  {
    assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
 800ef1c:	687b      	ldr	r3, [r7, #4]
 800ef1e:	681b      	ldr	r3, [r3, #0]
 800ef20:	685b      	ldr	r3, [r3, #4]
 800ef22:	f423 4100 	bic.w	r1, r3, #32768	@ 0x8000
 800ef26:	687b      	ldr	r3, [r7, #4]
 800ef28:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 800ef2a:	687b      	ldr	r3, [r7, #4]
 800ef2c:	681b      	ldr	r3, [r3, #0]
 800ef2e:	430a      	orrs	r2, r1
 800ef30:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure TX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
 800ef32:	687b      	ldr	r3, [r7, #4]
 800ef34:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ef36:	f003 0301 	and.w	r3, r3, #1
 800ef3a:	2b00      	cmp	r3, #0
 800ef3c:	d00a      	beq.n	800ef54 <UART_AdvFeatureConfig+0x4c>
  {
    assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
 800ef3e:	687b      	ldr	r3, [r7, #4]
 800ef40:	681b      	ldr	r3, [r3, #0]
 800ef42:	685b      	ldr	r3, [r3, #4]
 800ef44:	f423 3100 	bic.w	r1, r3, #131072	@ 0x20000
 800ef48:	687b      	ldr	r3, [r7, #4]
 800ef4a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 800ef4c:	687b      	ldr	r3, [r7, #4]
 800ef4e:	681b      	ldr	r3, [r3, #0]
 800ef50:	430a      	orrs	r2, r1
 800ef52:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX pin active level inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
 800ef54:	687b      	ldr	r3, [r7, #4]
 800ef56:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ef58:	f003 0302 	and.w	r3, r3, #2
 800ef5c:	2b00      	cmp	r3, #0
 800ef5e:	d00a      	beq.n	800ef76 <UART_AdvFeatureConfig+0x6e>
  {
    assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
 800ef60:	687b      	ldr	r3, [r7, #4]
 800ef62:	681b      	ldr	r3, [r3, #0]
 800ef64:	685b      	ldr	r3, [r3, #4]
 800ef66:	f423 3180 	bic.w	r1, r3, #65536	@ 0x10000
 800ef6a:	687b      	ldr	r3, [r7, #4]
 800ef6c:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 800ef6e:	687b      	ldr	r3, [r7, #4]
 800ef70:	681b      	ldr	r3, [r3, #0]
 800ef72:	430a      	orrs	r2, r1
 800ef74:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure data inversion */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
 800ef76:	687b      	ldr	r3, [r7, #4]
 800ef78:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ef7a:	f003 0304 	and.w	r3, r3, #4
 800ef7e:	2b00      	cmp	r3, #0
 800ef80:	d00a      	beq.n	800ef98 <UART_AdvFeatureConfig+0x90>
  {
    assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
 800ef82:	687b      	ldr	r3, [r7, #4]
 800ef84:	681b      	ldr	r3, [r3, #0]
 800ef86:	685b      	ldr	r3, [r3, #4]
 800ef88:	f423 2180 	bic.w	r1, r3, #262144	@ 0x40000
 800ef8c:	687b      	ldr	r3, [r7, #4]
 800ef8e:	6b5a      	ldr	r2, [r3, #52]	@ 0x34
 800ef90:	687b      	ldr	r3, [r7, #4]
 800ef92:	681b      	ldr	r3, [r3, #0]
 800ef94:	430a      	orrs	r2, r1
 800ef96:	605a      	str	r2, [r3, #4]
  }

  /* if required, configure RX overrun detection disabling */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
 800ef98:	687b      	ldr	r3, [r7, #4]
 800ef9a:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800ef9c:	f003 0310 	and.w	r3, r3, #16
 800efa0:	2b00      	cmp	r3, #0
 800efa2:	d00a      	beq.n	800efba <UART_AdvFeatureConfig+0xb2>
  {
    assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
 800efa4:	687b      	ldr	r3, [r7, #4]
 800efa6:	681b      	ldr	r3, [r3, #0]
 800efa8:	689b      	ldr	r3, [r3, #8]
 800efaa:	f423 5180 	bic.w	r1, r3, #4096	@ 0x1000
 800efae:	687b      	ldr	r3, [r7, #4]
 800efb0:	6bda      	ldr	r2, [r3, #60]	@ 0x3c
 800efb2:	687b      	ldr	r3, [r7, #4]
 800efb4:	681b      	ldr	r3, [r3, #0]
 800efb6:	430a      	orrs	r2, r1
 800efb8:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure DMA disabling on reception error */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
 800efba:	687b      	ldr	r3, [r7, #4]
 800efbc:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800efbe:	f003 0320 	and.w	r3, r3, #32
 800efc2:	2b00      	cmp	r3, #0
 800efc4:	d00a      	beq.n	800efdc <UART_AdvFeatureConfig+0xd4>
  {
    assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
    MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
 800efc6:	687b      	ldr	r3, [r7, #4]
 800efc8:	681b      	ldr	r3, [r3, #0]
 800efca:	689b      	ldr	r3, [r3, #8]
 800efcc:	f423 5100 	bic.w	r1, r3, #8192	@ 0x2000
 800efd0:	687b      	ldr	r3, [r7, #4]
 800efd2:	6c1a      	ldr	r2, [r3, #64]	@ 0x40
 800efd4:	687b      	ldr	r3, [r7, #4]
 800efd6:	681b      	ldr	r3, [r3, #0]
 800efd8:	430a      	orrs	r2, r1
 800efda:	609a      	str	r2, [r3, #8]
  }

  /* if required, configure auto Baud rate detection scheme */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
 800efdc:	687b      	ldr	r3, [r7, #4]
 800efde:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800efe0:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 800efe4:	2b00      	cmp	r3, #0
 800efe6:	d01a      	beq.n	800f01e <UART_AdvFeatureConfig+0x116>
  {
    assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
    assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
 800efe8:	687b      	ldr	r3, [r7, #4]
 800efea:	681b      	ldr	r3, [r3, #0]
 800efec:	685b      	ldr	r3, [r3, #4]
 800efee:	f423 1180 	bic.w	r1, r3, #1048576	@ 0x100000
 800eff2:	687b      	ldr	r3, [r7, #4]
 800eff4:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 800eff6:	687b      	ldr	r3, [r7, #4]
 800eff8:	681b      	ldr	r3, [r3, #0]
 800effa:	430a      	orrs	r2, r1
 800effc:	605a      	str	r2, [r3, #4]
    /* set auto Baudrate detection parameters if detection is enabled */
    if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
 800effe:	687b      	ldr	r3, [r7, #4]
 800f000:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 800f002:	f5b3 1f80 	cmp.w	r3, #1048576	@ 0x100000
 800f006:	d10a      	bne.n	800f01e <UART_AdvFeatureConfig+0x116>
    {
      assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
      MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
 800f008:	687b      	ldr	r3, [r7, #4]
 800f00a:	681b      	ldr	r3, [r3, #0]
 800f00c:	685b      	ldr	r3, [r3, #4]
 800f00e:	f423 01c0 	bic.w	r1, r3, #6291456	@ 0x600000
 800f012:	687b      	ldr	r3, [r7, #4]
 800f014:	6c9a      	ldr	r2, [r3, #72]	@ 0x48
 800f016:	687b      	ldr	r3, [r7, #4]
 800f018:	681b      	ldr	r3, [r3, #0]
 800f01a:	430a      	orrs	r2, r1
 800f01c:	605a      	str	r2, [r3, #4]
    }
  }

  /* if required, configure MSB first on communication line */
  if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
 800f01e:	687b      	ldr	r3, [r7, #4]
 800f020:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 800f022:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800f026:	2b00      	cmp	r3, #0
 800f028:	d00a      	beq.n	800f040 <UART_AdvFeatureConfig+0x138>
  {
    assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
    MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
 800f02a:	687b      	ldr	r3, [r7, #4]
 800f02c:	681b      	ldr	r3, [r3, #0]
 800f02e:	685b      	ldr	r3, [r3, #4]
 800f030:	f423 2100 	bic.w	r1, r3, #524288	@ 0x80000
 800f034:	687b      	ldr	r3, [r7, #4]
 800f036:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 800f038:	687b      	ldr	r3, [r7, #4]
 800f03a:	681b      	ldr	r3, [r3, #0]
 800f03c:	430a      	orrs	r2, r1
 800f03e:	605a      	str	r2, [r3, #4]
  }
}
 800f040:	bf00      	nop
 800f042:	370c      	adds	r7, #12
 800f044:	46bd      	mov	sp, r7
 800f046:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f04a:	4770      	bx	lr

0800f04c <UART_CheckIdleState>:
  * @brief Check the UART Idle State.
  * @param huart UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
{
 800f04c:	b580      	push	{r7, lr}
 800f04e:	b098      	sub	sp, #96	@ 0x60
 800f050:	af02      	add	r7, sp, #8
 800f052:	6078      	str	r0, [r7, #4]
  uint32_t tickstart;

  /* Initialize the UART ErrorCode */
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800f054:	687b      	ldr	r3, [r7, #4]
 800f056:	2200      	movs	r2, #0
 800f058:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

  /* Init tickstart for timeout management */
  tickstart = HAL_GetTick();
 800f05c:	f7f6 fccc 	bl	80059f8 <HAL_GetTick>
 800f060:	6578      	str	r0, [r7, #84]	@ 0x54

  /* Check if the Transmitter is enabled */
  if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
 800f062:	687b      	ldr	r3, [r7, #4]
 800f064:	681b      	ldr	r3, [r3, #0]
 800f066:	681b      	ldr	r3, [r3, #0]
 800f068:	f003 0308 	and.w	r3, r3, #8
 800f06c:	2b08      	cmp	r3, #8
 800f06e:	d12f      	bne.n	800f0d0 <UART_CheckIdleState+0x84>
  {
    /* Wait until TEACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800f070:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800f074:	9300      	str	r3, [sp, #0]
 800f076:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800f078:	2200      	movs	r2, #0
 800f07a:	f44f 1100 	mov.w	r1, #2097152	@ 0x200000
 800f07e:	6878      	ldr	r0, [r7, #4]
 800f080:	f000 f88e 	bl	800f1a0 <UART_WaitOnFlagUntilTimeout>
 800f084:	4603      	mov	r3, r0
 800f086:	2b00      	cmp	r3, #0
 800f088:	d022      	beq.n	800f0d0 <UART_CheckIdleState+0x84>
    {
      /* Disable TXE interrupt for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE));
 800f08a:	687b      	ldr	r3, [r7, #4]
 800f08c:	681b      	ldr	r3, [r3, #0]
 800f08e:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f090:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f092:	e853 3f00 	ldrex	r3, [r3]
 800f096:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800f098:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f09a:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800f09e:	653b      	str	r3, [r7, #80]	@ 0x50
 800f0a0:	687b      	ldr	r3, [r7, #4]
 800f0a2:	681b      	ldr	r3, [r3, #0]
 800f0a4:	461a      	mov	r2, r3
 800f0a6:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800f0a8:	647b      	str	r3, [r7, #68]	@ 0x44
 800f0aa:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f0ac:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800f0ae:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800f0b0:	e841 2300 	strex	r3, r2, [r1]
 800f0b4:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800f0b6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800f0b8:	2b00      	cmp	r3, #0
 800f0ba:	d1e6      	bne.n	800f08a <UART_CheckIdleState+0x3e>

      huart->gState = HAL_UART_STATE_READY;
 800f0bc:	687b      	ldr	r3, [r7, #4]
 800f0be:	2220      	movs	r2, #32
 800f0c0:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

      __HAL_UNLOCK(huart);
 800f0c4:	687b      	ldr	r3, [r7, #4]
 800f0c6:	2200      	movs	r2, #0
 800f0c8:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800f0cc:	2303      	movs	r3, #3
 800f0ce:	e063      	b.n	800f198 <UART_CheckIdleState+0x14c>
    }
  }

  /* Check if the Receiver is enabled */
  if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
 800f0d0:	687b      	ldr	r3, [r7, #4]
 800f0d2:	681b      	ldr	r3, [r3, #0]
 800f0d4:	681b      	ldr	r3, [r3, #0]
 800f0d6:	f003 0304 	and.w	r3, r3, #4
 800f0da:	2b04      	cmp	r3, #4
 800f0dc:	d149      	bne.n	800f172 <UART_CheckIdleState+0x126>
  {
    /* Wait until REACK flag is set */
    if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
 800f0de:	f06f 437e 	mvn.w	r3, #4261412864	@ 0xfe000000
 800f0e2:	9300      	str	r3, [sp, #0]
 800f0e4:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800f0e6:	2200      	movs	r2, #0
 800f0e8:	f44f 0180 	mov.w	r1, #4194304	@ 0x400000
 800f0ec:	6878      	ldr	r0, [r7, #4]
 800f0ee:	f000 f857 	bl	800f1a0 <UART_WaitOnFlagUntilTimeout>
 800f0f2:	4603      	mov	r3, r0
 800f0f4:	2b00      	cmp	r3, #0
 800f0f6:	d03c      	beq.n	800f172 <UART_CheckIdleState+0x126>
    {
      /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
      interrupts for the interrupt process */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800f0f8:	687b      	ldr	r3, [r7, #4]
 800f0fa:	681b      	ldr	r3, [r3, #0]
 800f0fc:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f0fe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f100:	e853 3f00 	ldrex	r3, [r3]
 800f104:	623b      	str	r3, [r7, #32]
   return(result);
 800f106:	6a3b      	ldr	r3, [r7, #32]
 800f108:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800f10c:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800f10e:	687b      	ldr	r3, [r7, #4]
 800f110:	681b      	ldr	r3, [r3, #0]
 800f112:	461a      	mov	r2, r3
 800f114:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f116:	633b      	str	r3, [r7, #48]	@ 0x30
 800f118:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f11a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800f11c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800f11e:	e841 2300 	strex	r3, r2, [r1]
 800f122:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f124:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f126:	2b00      	cmp	r3, #0
 800f128:	d1e6      	bne.n	800f0f8 <UART_CheckIdleState+0xac>
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800f12a:	687b      	ldr	r3, [r7, #4]
 800f12c:	681b      	ldr	r3, [r3, #0]
 800f12e:	3308      	adds	r3, #8
 800f130:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f132:	693b      	ldr	r3, [r7, #16]
 800f134:	e853 3f00 	ldrex	r3, [r3]
 800f138:	60fb      	str	r3, [r7, #12]
   return(result);
 800f13a:	68fb      	ldr	r3, [r7, #12]
 800f13c:	f023 0301 	bic.w	r3, r3, #1
 800f140:	64bb      	str	r3, [r7, #72]	@ 0x48
 800f142:	687b      	ldr	r3, [r7, #4]
 800f144:	681b      	ldr	r3, [r3, #0]
 800f146:	3308      	adds	r3, #8
 800f148:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800f14a:	61fa      	str	r2, [r7, #28]
 800f14c:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f14e:	69b9      	ldr	r1, [r7, #24]
 800f150:	69fa      	ldr	r2, [r7, #28]
 800f152:	e841 2300 	strex	r3, r2, [r1]
 800f156:	617b      	str	r3, [r7, #20]
   return(result);
 800f158:	697b      	ldr	r3, [r7, #20]
 800f15a:	2b00      	cmp	r3, #0
 800f15c:	d1e5      	bne.n	800f12a <UART_CheckIdleState+0xde>

      huart->RxState = HAL_UART_STATE_READY;
 800f15e:	687b      	ldr	r3, [r7, #4]
 800f160:	2220      	movs	r2, #32
 800f162:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      __HAL_UNLOCK(huart);
 800f166:	687b      	ldr	r3, [r7, #4]
 800f168:	2200      	movs	r2, #0
 800f16a:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

      /* Timeout occurred */
      return HAL_TIMEOUT;
 800f16e:	2303      	movs	r3, #3
 800f170:	e012      	b.n	800f198 <UART_CheckIdleState+0x14c>
    }
  }

  /* Initialize the UART State */
  huart->gState = HAL_UART_STATE_READY;
 800f172:	687b      	ldr	r3, [r7, #4]
 800f174:	2220      	movs	r2, #32
 800f176:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
  huart->RxState = HAL_UART_STATE_READY;
 800f17a:	687b      	ldr	r3, [r7, #4]
 800f17c:	2220      	movs	r2, #32
 800f17e:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f182:	687b      	ldr	r3, [r7, #4]
 800f184:	2200      	movs	r2, #0
 800f186:	66da      	str	r2, [r3, #108]	@ 0x6c
  huart->RxEventType = HAL_UART_RXEVENT_TC;
 800f188:	687b      	ldr	r3, [r7, #4]
 800f18a:	2200      	movs	r2, #0
 800f18c:	671a      	str	r2, [r3, #112]	@ 0x70

  __HAL_UNLOCK(huart);
 800f18e:	687b      	ldr	r3, [r7, #4]
 800f190:	2200      	movs	r2, #0
 800f192:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 800f196:	2300      	movs	r3, #0
}
 800f198:	4618      	mov	r0, r3
 800f19a:	3758      	adds	r7, #88	@ 0x58
 800f19c:	46bd      	mov	sp, r7
 800f19e:	bd80      	pop	{r7, pc}

0800f1a0 <UART_WaitOnFlagUntilTimeout>:
  * @param Timeout   Timeout duration
  * @retval HAL status
  */
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
                                              uint32_t Tickstart, uint32_t Timeout)
{
 800f1a0:	b580      	push	{r7, lr}
 800f1a2:	b084      	sub	sp, #16
 800f1a4:	af00      	add	r7, sp, #0
 800f1a6:	60f8      	str	r0, [r7, #12]
 800f1a8:	60b9      	str	r1, [r7, #8]
 800f1aa:	603b      	str	r3, [r7, #0]
 800f1ac:	4613      	mov	r3, r2
 800f1ae:	71fb      	strb	r3, [r7, #7]
  /* Wait until flag is set */
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800f1b0:	e04f      	b.n	800f252 <UART_WaitOnFlagUntilTimeout+0xb2>
  {
    /* Check for the Timeout */
    if (Timeout != HAL_MAX_DELAY)
 800f1b2:	69bb      	ldr	r3, [r7, #24]
 800f1b4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 800f1b8:	d04b      	beq.n	800f252 <UART_WaitOnFlagUntilTimeout+0xb2>
    {
      if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
 800f1ba:	f7f6 fc1d 	bl	80059f8 <HAL_GetTick>
 800f1be:	4602      	mov	r2, r0
 800f1c0:	683b      	ldr	r3, [r7, #0]
 800f1c2:	1ad3      	subs	r3, r2, r3
 800f1c4:	69ba      	ldr	r2, [r7, #24]
 800f1c6:	429a      	cmp	r2, r3
 800f1c8:	d302      	bcc.n	800f1d0 <UART_WaitOnFlagUntilTimeout+0x30>
 800f1ca:	69bb      	ldr	r3, [r7, #24]
 800f1cc:	2b00      	cmp	r3, #0
 800f1ce:	d101      	bne.n	800f1d4 <UART_WaitOnFlagUntilTimeout+0x34>
      {

        return HAL_TIMEOUT;
 800f1d0:	2303      	movs	r3, #3
 800f1d2:	e04e      	b.n	800f272 <UART_WaitOnFlagUntilTimeout+0xd2>
      }

      if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
 800f1d4:	68fb      	ldr	r3, [r7, #12]
 800f1d6:	681b      	ldr	r3, [r3, #0]
 800f1d8:	681b      	ldr	r3, [r3, #0]
 800f1da:	f003 0304 	and.w	r3, r3, #4
 800f1de:	2b00      	cmp	r3, #0
 800f1e0:	d037      	beq.n	800f252 <UART_WaitOnFlagUntilTimeout+0xb2>
 800f1e2:	68bb      	ldr	r3, [r7, #8]
 800f1e4:	2b80      	cmp	r3, #128	@ 0x80
 800f1e6:	d034      	beq.n	800f252 <UART_WaitOnFlagUntilTimeout+0xb2>
 800f1e8:	68bb      	ldr	r3, [r7, #8]
 800f1ea:	2b40      	cmp	r3, #64	@ 0x40
 800f1ec:	d031      	beq.n	800f252 <UART_WaitOnFlagUntilTimeout+0xb2>
      {
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
 800f1ee:	68fb      	ldr	r3, [r7, #12]
 800f1f0:	681b      	ldr	r3, [r3, #0]
 800f1f2:	69db      	ldr	r3, [r3, #28]
 800f1f4:	f003 0308 	and.w	r3, r3, #8
 800f1f8:	2b08      	cmp	r3, #8
 800f1fa:	d110      	bne.n	800f21e <UART_WaitOnFlagUntilTimeout+0x7e>
        {
          /* Clear Overrun Error flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
 800f1fc:	68fb      	ldr	r3, [r7, #12]
 800f1fe:	681b      	ldr	r3, [r3, #0]
 800f200:	2208      	movs	r2, #8
 800f202:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800f204:	68f8      	ldr	r0, [r7, #12]
 800f206:	f000 f95b 	bl	800f4c0 <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_ORE;
 800f20a:	68fb      	ldr	r3, [r7, #12]
 800f20c:	2208      	movs	r2, #8
 800f20e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800f212:	68fb      	ldr	r3, [r7, #12]
 800f214:	2200      	movs	r2, #0
 800f216:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_ERROR;
 800f21a:	2301      	movs	r3, #1
 800f21c:	e029      	b.n	800f272 <UART_WaitOnFlagUntilTimeout+0xd2>
        }
        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
 800f21e:	68fb      	ldr	r3, [r7, #12]
 800f220:	681b      	ldr	r3, [r3, #0]
 800f222:	69db      	ldr	r3, [r3, #28]
 800f224:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 800f228:	f5b3 6f00 	cmp.w	r3, #2048	@ 0x800
 800f22c:	d111      	bne.n	800f252 <UART_WaitOnFlagUntilTimeout+0xb2>
        {
          /* Clear Receiver Timeout flag*/
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
 800f22e:	68fb      	ldr	r3, [r7, #12]
 800f230:	681b      	ldr	r3, [r3, #0]
 800f232:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 800f236:	621a      	str	r2, [r3, #32]

          /* Blocking error : transfer is aborted
          Set the UART state ready to be able to start again the process,
          Disable Rx Interrupts if ongoing */
          UART_EndRxTransfer(huart);
 800f238:	68f8      	ldr	r0, [r7, #12]
 800f23a:	f000 f941 	bl	800f4c0 <UART_EndRxTransfer>

          huart->ErrorCode = HAL_UART_ERROR_RTO;
 800f23e:	68fb      	ldr	r3, [r7, #12]
 800f240:	2220      	movs	r2, #32
 800f242:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90

          /* Process Unlocked */
          __HAL_UNLOCK(huart);
 800f246:	68fb      	ldr	r3, [r7, #12]
 800f248:	2200      	movs	r2, #0
 800f24a:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

          return HAL_TIMEOUT;
 800f24e:	2303      	movs	r3, #3
 800f250:	e00f      	b.n	800f272 <UART_WaitOnFlagUntilTimeout+0xd2>
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800f252:	68fb      	ldr	r3, [r7, #12]
 800f254:	681b      	ldr	r3, [r3, #0]
 800f256:	69da      	ldr	r2, [r3, #28]
 800f258:	68bb      	ldr	r3, [r7, #8]
 800f25a:	4013      	ands	r3, r2
 800f25c:	68ba      	ldr	r2, [r7, #8]
 800f25e:	429a      	cmp	r2, r3
 800f260:	bf0c      	ite	eq
 800f262:	2301      	moveq	r3, #1
 800f264:	2300      	movne	r3, #0
 800f266:	b2db      	uxtb	r3, r3
 800f268:	461a      	mov	r2, r3
 800f26a:	79fb      	ldrb	r3, [r7, #7]
 800f26c:	429a      	cmp	r2, r3
 800f26e:	d0a0      	beq.n	800f1b2 <UART_WaitOnFlagUntilTimeout+0x12>
        }
      }
    }
  }
  return HAL_OK;
 800f270:	2300      	movs	r3, #0
}
 800f272:	4618      	mov	r0, r3
 800f274:	3710      	adds	r7, #16
 800f276:	46bd      	mov	sp, r7
 800f278:	bd80      	pop	{r7, pc}
	...

0800f27c <UART_Start_Receive_IT>:
  * @param  pData Pointer to data buffer (u8 or u16 data elements).
  * @param  Size  Amount of data elements (u8 or u16) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 800f27c:	b480      	push	{r7}
 800f27e:	b0a3      	sub	sp, #140	@ 0x8c
 800f280:	af00      	add	r7, sp, #0
 800f282:	60f8      	str	r0, [r7, #12]
 800f284:	60b9      	str	r1, [r7, #8]
 800f286:	4613      	mov	r3, r2
 800f288:	80fb      	strh	r3, [r7, #6]
  huart->pRxBuffPtr  = pData;
 800f28a:	68fb      	ldr	r3, [r7, #12]
 800f28c:	68ba      	ldr	r2, [r7, #8]
 800f28e:	659a      	str	r2, [r3, #88]	@ 0x58
  huart->RxXferSize  = Size;
 800f290:	68fb      	ldr	r3, [r7, #12]
 800f292:	88fa      	ldrh	r2, [r7, #6]
 800f294:	f8a3 205c 	strh.w	r2, [r3, #92]	@ 0x5c
  huart->RxXferCount = Size;
 800f298:	68fb      	ldr	r3, [r7, #12]
 800f29a:	88fa      	ldrh	r2, [r7, #6]
 800f29c:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->RxISR       = NULL;
 800f2a0:	68fb      	ldr	r3, [r7, #12]
 800f2a2:	2200      	movs	r2, #0
 800f2a4:	675a      	str	r2, [r3, #116]	@ 0x74

  /* Computation of UART mask to apply to RDR register */
  UART_MASK_COMPUTATION(huart);
 800f2a6:	68fb      	ldr	r3, [r7, #12]
 800f2a8:	689b      	ldr	r3, [r3, #8]
 800f2aa:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800f2ae:	d10e      	bne.n	800f2ce <UART_Start_Receive_IT+0x52>
 800f2b0:	68fb      	ldr	r3, [r7, #12]
 800f2b2:	691b      	ldr	r3, [r3, #16]
 800f2b4:	2b00      	cmp	r3, #0
 800f2b6:	d105      	bne.n	800f2c4 <UART_Start_Receive_IT+0x48>
 800f2b8:	68fb      	ldr	r3, [r7, #12]
 800f2ba:	f240 12ff 	movw	r2, #511	@ 0x1ff
 800f2be:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800f2c2:	e02d      	b.n	800f320 <UART_Start_Receive_IT+0xa4>
 800f2c4:	68fb      	ldr	r3, [r7, #12]
 800f2c6:	22ff      	movs	r2, #255	@ 0xff
 800f2c8:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800f2cc:	e028      	b.n	800f320 <UART_Start_Receive_IT+0xa4>
 800f2ce:	68fb      	ldr	r3, [r7, #12]
 800f2d0:	689b      	ldr	r3, [r3, #8]
 800f2d2:	2b00      	cmp	r3, #0
 800f2d4:	d10d      	bne.n	800f2f2 <UART_Start_Receive_IT+0x76>
 800f2d6:	68fb      	ldr	r3, [r7, #12]
 800f2d8:	691b      	ldr	r3, [r3, #16]
 800f2da:	2b00      	cmp	r3, #0
 800f2dc:	d104      	bne.n	800f2e8 <UART_Start_Receive_IT+0x6c>
 800f2de:	68fb      	ldr	r3, [r7, #12]
 800f2e0:	22ff      	movs	r2, #255	@ 0xff
 800f2e2:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800f2e6:	e01b      	b.n	800f320 <UART_Start_Receive_IT+0xa4>
 800f2e8:	68fb      	ldr	r3, [r7, #12]
 800f2ea:	227f      	movs	r2, #127	@ 0x7f
 800f2ec:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800f2f0:	e016      	b.n	800f320 <UART_Start_Receive_IT+0xa4>
 800f2f2:	68fb      	ldr	r3, [r7, #12]
 800f2f4:	689b      	ldr	r3, [r3, #8]
 800f2f6:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 800f2fa:	d10d      	bne.n	800f318 <UART_Start_Receive_IT+0x9c>
 800f2fc:	68fb      	ldr	r3, [r7, #12]
 800f2fe:	691b      	ldr	r3, [r3, #16]
 800f300:	2b00      	cmp	r3, #0
 800f302:	d104      	bne.n	800f30e <UART_Start_Receive_IT+0x92>
 800f304:	68fb      	ldr	r3, [r7, #12]
 800f306:	227f      	movs	r2, #127	@ 0x7f
 800f308:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800f30c:	e008      	b.n	800f320 <UART_Start_Receive_IT+0xa4>
 800f30e:	68fb      	ldr	r3, [r7, #12]
 800f310:	223f      	movs	r2, #63	@ 0x3f
 800f312:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
 800f316:	e003      	b.n	800f320 <UART_Start_Receive_IT+0xa4>
 800f318:	68fb      	ldr	r3, [r7, #12]
 800f31a:	2200      	movs	r2, #0
 800f31c:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60

  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800f320:	68fb      	ldr	r3, [r7, #12]
 800f322:	2200      	movs	r2, #0
 800f324:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  huart->RxState = HAL_UART_STATE_BUSY_RX;
 800f328:	68fb      	ldr	r3, [r7, #12]
 800f32a:	2222      	movs	r2, #34	@ 0x22
 800f32c:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
  ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800f330:	68fb      	ldr	r3, [r7, #12]
 800f332:	681b      	ldr	r3, [r3, #0]
 800f334:	3308      	adds	r3, #8
 800f336:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f338:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800f33a:	e853 3f00 	ldrex	r3, [r3]
 800f33e:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800f340:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800f342:	f043 0301 	orr.w	r3, r3, #1
 800f346:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800f34a:	68fb      	ldr	r3, [r7, #12]
 800f34c:	681b      	ldr	r3, [r3, #0]
 800f34e:	3308      	adds	r3, #8
 800f350:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800f354:	673a      	str	r2, [r7, #112]	@ 0x70
 800f356:	66fb      	str	r3, [r7, #108]	@ 0x6c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f358:	6ef9      	ldr	r1, [r7, #108]	@ 0x6c
 800f35a:	6f3a      	ldr	r2, [r7, #112]	@ 0x70
 800f35c:	e841 2300 	strex	r3, r2, [r1]
 800f360:	66bb      	str	r3, [r7, #104]	@ 0x68
   return(result);
 800f362:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800f364:	2b00      	cmp	r3, #0
 800f366:	d1e3      	bne.n	800f330 <UART_Start_Receive_IT+0xb4>

  /* Configure Rx interrupt processing */
  if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
 800f368:	68fb      	ldr	r3, [r7, #12]
 800f36a:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 800f36c:	f1b3 5f00 	cmp.w	r3, #536870912	@ 0x20000000
 800f370:	d14f      	bne.n	800f412 <UART_Start_Receive_IT+0x196>
 800f372:	68fb      	ldr	r3, [r7, #12]
 800f374:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800f378:	88fa      	ldrh	r2, [r7, #6]
 800f37a:	429a      	cmp	r2, r3
 800f37c:	d349      	bcc.n	800f412 <UART_Start_Receive_IT+0x196>
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800f37e:	68fb      	ldr	r3, [r7, #12]
 800f380:	689b      	ldr	r3, [r3, #8]
 800f382:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800f386:	d107      	bne.n	800f398 <UART_Start_Receive_IT+0x11c>
 800f388:	68fb      	ldr	r3, [r7, #12]
 800f38a:	691b      	ldr	r3, [r3, #16]
 800f38c:	2b00      	cmp	r3, #0
 800f38e:	d103      	bne.n	800f398 <UART_Start_Receive_IT+0x11c>
    {
      huart->RxISR = UART_RxISR_16BIT_FIFOEN;
 800f390:	68fb      	ldr	r3, [r7, #12]
 800f392:	4a47      	ldr	r2, [pc, #284]	@ (800f4b0 <UART_Start_Receive_IT+0x234>)
 800f394:	675a      	str	r2, [r3, #116]	@ 0x74
 800f396:	e002      	b.n	800f39e <UART_Start_Receive_IT+0x122>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT_FIFOEN;
 800f398:	68fb      	ldr	r3, [r7, #12]
 800f39a:	4a46      	ldr	r2, [pc, #280]	@ (800f4b4 <UART_Start_Receive_IT+0x238>)
 800f39c:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800f39e:	68fb      	ldr	r3, [r7, #12]
 800f3a0:	691b      	ldr	r3, [r3, #16]
 800f3a2:	2b00      	cmp	r3, #0
 800f3a4:	d01a      	beq.n	800f3dc <UART_Start_Receive_IT+0x160>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800f3a6:	68fb      	ldr	r3, [r7, #12]
 800f3a8:	681b      	ldr	r3, [r3, #0]
 800f3aa:	653b      	str	r3, [r7, #80]	@ 0x50
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f3ac:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800f3ae:	e853 3f00 	ldrex	r3, [r3]
 800f3b2:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800f3b4:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f3b6:	f443 7380 	orr.w	r3, r3, #256	@ 0x100
 800f3ba:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800f3be:	68fb      	ldr	r3, [r7, #12]
 800f3c0:	681b      	ldr	r3, [r3, #0]
 800f3c2:	461a      	mov	r2, r3
 800f3c4:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800f3c8:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800f3ca:	65ba      	str	r2, [r7, #88]	@ 0x58
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f3cc:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 800f3ce:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 800f3d0:	e841 2300 	strex	r3, r2, [r1]
 800f3d4:	657b      	str	r3, [r7, #84]	@ 0x54
   return(result);
 800f3d6:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 800f3d8:	2b00      	cmp	r3, #0
 800f3da:	d1e4      	bne.n	800f3a6 <UART_Start_Receive_IT+0x12a>
    }
    ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800f3dc:	68fb      	ldr	r3, [r7, #12]
 800f3de:	681b      	ldr	r3, [r3, #0]
 800f3e0:	3308      	adds	r3, #8
 800f3e2:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f3e4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800f3e6:	e853 3f00 	ldrex	r3, [r3]
 800f3ea:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800f3ec:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f3ee:	f043 5380 	orr.w	r3, r3, #268435456	@ 0x10000000
 800f3f2:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800f3f4:	68fb      	ldr	r3, [r7, #12]
 800f3f6:	681b      	ldr	r3, [r3, #0]
 800f3f8:	3308      	adds	r3, #8
 800f3fa:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800f3fc:	64ba      	str	r2, [r7, #72]	@ 0x48
 800f3fe:	647b      	str	r3, [r7, #68]	@ 0x44
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f400:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 800f402:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800f404:	e841 2300 	strex	r3, r2, [r1]
 800f408:	643b      	str	r3, [r7, #64]	@ 0x40
   return(result);
 800f40a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 800f40c:	2b00      	cmp	r3, #0
 800f40e:	d1e5      	bne.n	800f3dc <UART_Start_Receive_IT+0x160>
 800f410:	e046      	b.n	800f4a0 <UART_Start_Receive_IT+0x224>
  }
  else
  {
    /* Set the Rx ISR function pointer according to the data word length */
    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
 800f412:	68fb      	ldr	r3, [r7, #12]
 800f414:	689b      	ldr	r3, [r3, #8]
 800f416:	f5b3 5f80 	cmp.w	r3, #4096	@ 0x1000
 800f41a:	d107      	bne.n	800f42c <UART_Start_Receive_IT+0x1b0>
 800f41c:	68fb      	ldr	r3, [r7, #12]
 800f41e:	691b      	ldr	r3, [r3, #16]
 800f420:	2b00      	cmp	r3, #0
 800f422:	d103      	bne.n	800f42c <UART_Start_Receive_IT+0x1b0>
    {
      huart->RxISR = UART_RxISR_16BIT;
 800f424:	68fb      	ldr	r3, [r7, #12]
 800f426:	4a24      	ldr	r2, [pc, #144]	@ (800f4b8 <UART_Start_Receive_IT+0x23c>)
 800f428:	675a      	str	r2, [r3, #116]	@ 0x74
 800f42a:	e002      	b.n	800f432 <UART_Start_Receive_IT+0x1b6>
    }
    else
    {
      huart->RxISR = UART_RxISR_8BIT;
 800f42c:	68fb      	ldr	r3, [r7, #12]
 800f42e:	4a23      	ldr	r2, [pc, #140]	@ (800f4bc <UART_Start_Receive_IT+0x240>)
 800f430:	675a      	str	r2, [r3, #116]	@ 0x74
    }

    /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
    if (huart->Init.Parity != UART_PARITY_NONE)
 800f432:	68fb      	ldr	r3, [r7, #12]
 800f434:	691b      	ldr	r3, [r3, #16]
 800f436:	2b00      	cmp	r3, #0
 800f438:	d019      	beq.n	800f46e <UART_Start_Receive_IT+0x1f2>
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
 800f43a:	68fb      	ldr	r3, [r7, #12]
 800f43c:	681b      	ldr	r3, [r3, #0]
 800f43e:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f440:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f442:	e853 3f00 	ldrex	r3, [r3]
 800f446:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f448:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f44a:	f443 7390 	orr.w	r3, r3, #288	@ 0x120
 800f44e:	677b      	str	r3, [r7, #116]	@ 0x74
 800f450:	68fb      	ldr	r3, [r7, #12]
 800f452:	681b      	ldr	r3, [r3, #0]
 800f454:	461a      	mov	r2, r3
 800f456:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800f458:	637b      	str	r3, [r7, #52]	@ 0x34
 800f45a:	633a      	str	r2, [r7, #48]	@ 0x30
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f45c:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 800f45e:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800f460:	e841 2300 	strex	r3, r2, [r1]
 800f464:	62fb      	str	r3, [r7, #44]	@ 0x2c
   return(result);
 800f466:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 800f468:	2b00      	cmp	r3, #0
 800f46a:	d1e6      	bne.n	800f43a <UART_Start_Receive_IT+0x1be>
 800f46c:	e018      	b.n	800f4a0 <UART_Start_Receive_IT+0x224>
    }
    else
    {
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800f46e:	68fb      	ldr	r3, [r7, #12]
 800f470:	681b      	ldr	r3, [r3, #0]
 800f472:	617b      	str	r3, [r7, #20]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f474:	697b      	ldr	r3, [r7, #20]
 800f476:	e853 3f00 	ldrex	r3, [r3]
 800f47a:	613b      	str	r3, [r7, #16]
   return(result);
 800f47c:	693b      	ldr	r3, [r7, #16]
 800f47e:	f043 0320 	orr.w	r3, r3, #32
 800f482:	67bb      	str	r3, [r7, #120]	@ 0x78
 800f484:	68fb      	ldr	r3, [r7, #12]
 800f486:	681b      	ldr	r3, [r3, #0]
 800f488:	461a      	mov	r2, r3
 800f48a:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 800f48c:	623b      	str	r3, [r7, #32]
 800f48e:	61fa      	str	r2, [r7, #28]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f490:	69f9      	ldr	r1, [r7, #28]
 800f492:	6a3a      	ldr	r2, [r7, #32]
 800f494:	e841 2300 	strex	r3, r2, [r1]
 800f498:	61bb      	str	r3, [r7, #24]
   return(result);
 800f49a:	69bb      	ldr	r3, [r7, #24]
 800f49c:	2b00      	cmp	r3, #0
 800f49e:	d1e6      	bne.n	800f46e <UART_Start_Receive_IT+0x1f2>
    }
  }
  return HAL_OK;
 800f4a0:	2300      	movs	r3, #0
}
 800f4a2:	4618      	mov	r0, r3
 800f4a4:	378c      	adds	r7, #140	@ 0x8c
 800f4a6:	46bd      	mov	sp, r7
 800f4a8:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f4ac:	4770      	bx	lr
 800f4ae:	bf00      	nop
 800f4b0:	08010025 	.word	0x08010025
 800f4b4:	0800fcc5 	.word	0x0800fcc5
 800f4b8:	0800fb0d 	.word	0x0800fb0d
 800f4bc:	0800f955 	.word	0x0800f955

0800f4c0 <UART_EndRxTransfer>:
  * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
  * @param  huart UART handle.
  * @retval None
  */
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
 800f4c0:	b480      	push	{r7}
 800f4c2:	b095      	sub	sp, #84	@ 0x54
 800f4c4:	af00      	add	r7, sp, #0
 800f4c6:	6078      	str	r0, [r7, #4]
  /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800f4c8:	687b      	ldr	r3, [r7, #4]
 800f4ca:	681b      	ldr	r3, [r3, #0]
 800f4cc:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f4ce:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f4d0:	e853 3f00 	ldrex	r3, [r3]
 800f4d4:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800f4d6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f4d8:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800f4dc:	64fb      	str	r3, [r7, #76]	@ 0x4c
 800f4de:	687b      	ldr	r3, [r7, #4]
 800f4e0:	681b      	ldr	r3, [r3, #0]
 800f4e2:	461a      	mov	r2, r3
 800f4e4:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f4e6:	643b      	str	r3, [r7, #64]	@ 0x40
 800f4e8:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f4ea:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800f4ec:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800f4ee:	e841 2300 	strex	r3, r2, [r1]
 800f4f2:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800f4f4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f4f6:	2b00      	cmp	r3, #0
 800f4f8:	d1e6      	bne.n	800f4c8 <UART_EndRxTransfer+0x8>
  ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800f4fa:	687b      	ldr	r3, [r7, #4]
 800f4fc:	681b      	ldr	r3, [r3, #0]
 800f4fe:	3308      	adds	r3, #8
 800f500:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f502:	6a3b      	ldr	r3, [r7, #32]
 800f504:	e853 3f00 	ldrex	r3, [r3]
 800f508:	61fb      	str	r3, [r7, #28]
   return(result);
 800f50a:	69fa      	ldr	r2, [r7, #28]
 800f50c:	4b1e      	ldr	r3, [pc, #120]	@ (800f588 <UART_EndRxTransfer+0xc8>)
 800f50e:	4013      	ands	r3, r2
 800f510:	64bb      	str	r3, [r7, #72]	@ 0x48
 800f512:	687b      	ldr	r3, [r7, #4]
 800f514:	681b      	ldr	r3, [r3, #0]
 800f516:	3308      	adds	r3, #8
 800f518:	6cba      	ldr	r2, [r7, #72]	@ 0x48
 800f51a:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800f51c:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f51e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f520:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f522:	e841 2300 	strex	r3, r2, [r1]
 800f526:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f528:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f52a:	2b00      	cmp	r3, #0
 800f52c:	d1e5      	bne.n	800f4fa <UART_EndRxTransfer+0x3a>

  /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
  if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800f52e:	687b      	ldr	r3, [r7, #4]
 800f530:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800f532:	2b01      	cmp	r3, #1
 800f534:	d118      	bne.n	800f568 <UART_EndRxTransfer+0xa8>
  {
    ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800f536:	687b      	ldr	r3, [r7, #4]
 800f538:	681b      	ldr	r3, [r3, #0]
 800f53a:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f53c:	68fb      	ldr	r3, [r7, #12]
 800f53e:	e853 3f00 	ldrex	r3, [r3]
 800f542:	60bb      	str	r3, [r7, #8]
   return(result);
 800f544:	68bb      	ldr	r3, [r7, #8]
 800f546:	f023 0310 	bic.w	r3, r3, #16
 800f54a:	647b      	str	r3, [r7, #68]	@ 0x44
 800f54c:	687b      	ldr	r3, [r7, #4]
 800f54e:	681b      	ldr	r3, [r3, #0]
 800f550:	461a      	mov	r2, r3
 800f552:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800f554:	61bb      	str	r3, [r7, #24]
 800f556:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f558:	6979      	ldr	r1, [r7, #20]
 800f55a:	69ba      	ldr	r2, [r7, #24]
 800f55c:	e841 2300 	strex	r3, r2, [r1]
 800f560:	613b      	str	r3, [r7, #16]
   return(result);
 800f562:	693b      	ldr	r3, [r7, #16]
 800f564:	2b00      	cmp	r3, #0
 800f566:	d1e6      	bne.n	800f536 <UART_EndRxTransfer+0x76>
  }

  /* At end of Rx process, restore huart->RxState to Ready */
  huart->RxState = HAL_UART_STATE_READY;
 800f568:	687b      	ldr	r3, [r7, #4]
 800f56a:	2220      	movs	r2, #32
 800f56c:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
  huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800f570:	687b      	ldr	r3, [r7, #4]
 800f572:	2200      	movs	r2, #0
 800f574:	66da      	str	r2, [r3, #108]	@ 0x6c

  /* Reset RxIsr function pointer */
  huart->RxISR = NULL;
 800f576:	687b      	ldr	r3, [r7, #4]
 800f578:	2200      	movs	r2, #0
 800f57a:	675a      	str	r2, [r3, #116]	@ 0x74
}
 800f57c:	bf00      	nop
 800f57e:	3754      	adds	r7, #84	@ 0x54
 800f580:	46bd      	mov	sp, r7
 800f582:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f586:	4770      	bx	lr
 800f588:	effffffe 	.word	0xeffffffe

0800f58c <UART_DMAAbortOnError>:
  *         (To be called at end of DMA Abort procedure following error occurrence).
  * @param  hdma DMA handle.
  * @retval None
  */
static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
{
 800f58c:	b580      	push	{r7, lr}
 800f58e:	b084      	sub	sp, #16
 800f590:	af00      	add	r7, sp, #0
 800f592:	6078      	str	r0, [r7, #4]
  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
 800f594:	687b      	ldr	r3, [r7, #4]
 800f596:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 800f598:	60fb      	str	r3, [r7, #12]
  huart->RxXferCount = 0U;
 800f59a:	68fb      	ldr	r3, [r7, #12]
 800f59c:	2200      	movs	r2, #0
 800f59e:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
  huart->TxXferCount = 0U;
 800f5a2:	68fb      	ldr	r3, [r7, #12]
 800f5a4:	2200      	movs	r2, #0
 800f5a6:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered error callback*/
  huart->ErrorCallback(huart);
#else
  /*Call legacy weak error callback*/
  HAL_UART_ErrorCallback(huart);
 800f5aa:	68f8      	ldr	r0, [r7, #12]
 800f5ac:	f7fe ff3a 	bl	800e424 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800f5b0:	bf00      	nop
 800f5b2:	3710      	adds	r7, #16
 800f5b4:	46bd      	mov	sp, r7
 800f5b6:	bd80      	pop	{r7, pc}

0800f5b8 <UART_TxISR_8BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
{
 800f5b8:	b480      	push	{r7}
 800f5ba:	b08f      	sub	sp, #60	@ 0x3c
 800f5bc:	af00      	add	r7, sp, #0
 800f5be:	6078      	str	r0, [r7, #4]
  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800f5c0:	687b      	ldr	r3, [r7, #4]
 800f5c2:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800f5c6:	2b21      	cmp	r3, #33	@ 0x21
 800f5c8:	d14c      	bne.n	800f664 <UART_TxISR_8BIT+0xac>
  {
    if (huart->TxXferCount == 0U)
 800f5ca:	687b      	ldr	r3, [r7, #4]
 800f5cc:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f5d0:	b29b      	uxth	r3, r3
 800f5d2:	2b00      	cmp	r3, #0
 800f5d4:	d132      	bne.n	800f63c <UART_TxISR_8BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800f5d6:	687b      	ldr	r3, [r7, #4]
 800f5d8:	681b      	ldr	r3, [r3, #0]
 800f5da:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f5dc:	6a3b      	ldr	r3, [r7, #32]
 800f5de:	e853 3f00 	ldrex	r3, [r3]
 800f5e2:	61fb      	str	r3, [r7, #28]
   return(result);
 800f5e4:	69fb      	ldr	r3, [r7, #28]
 800f5e6:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800f5ea:	637b      	str	r3, [r7, #52]	@ 0x34
 800f5ec:	687b      	ldr	r3, [r7, #4]
 800f5ee:	681b      	ldr	r3, [r3, #0]
 800f5f0:	461a      	mov	r2, r3
 800f5f2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f5f4:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800f5f6:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f5f8:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f5fa:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f5fc:	e841 2300 	strex	r3, r2, [r1]
 800f600:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f602:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f604:	2b00      	cmp	r3, #0
 800f606:	d1e6      	bne.n	800f5d6 <UART_TxISR_8BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f608:	687b      	ldr	r3, [r7, #4]
 800f60a:	681b      	ldr	r3, [r3, #0]
 800f60c:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f60e:	68fb      	ldr	r3, [r7, #12]
 800f610:	e853 3f00 	ldrex	r3, [r3]
 800f614:	60bb      	str	r3, [r7, #8]
   return(result);
 800f616:	68bb      	ldr	r3, [r7, #8]
 800f618:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f61c:	633b      	str	r3, [r7, #48]	@ 0x30
 800f61e:	687b      	ldr	r3, [r7, #4]
 800f620:	681b      	ldr	r3, [r3, #0]
 800f622:	461a      	mov	r2, r3
 800f624:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f626:	61bb      	str	r3, [r7, #24]
 800f628:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f62a:	6979      	ldr	r1, [r7, #20]
 800f62c:	69ba      	ldr	r2, [r7, #24]
 800f62e:	e841 2300 	strex	r3, r2, [r1]
 800f632:	613b      	str	r3, [r7, #16]
   return(result);
 800f634:	693b      	ldr	r3, [r7, #16]
 800f636:	2b00      	cmp	r3, #0
 800f638:	d1e6      	bne.n	800f608 <UART_TxISR_8BIT+0x50>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
      huart->pTxBuffPtr++;
      huart->TxXferCount--;
    }
  }
}
 800f63a:	e013      	b.n	800f664 <UART_TxISR_8BIT+0xac>
      huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800f63c:	687b      	ldr	r3, [r7, #4]
 800f63e:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f640:	781a      	ldrb	r2, [r3, #0]
 800f642:	687b      	ldr	r3, [r7, #4]
 800f644:	681b      	ldr	r3, [r3, #0]
 800f646:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr++;
 800f648:	687b      	ldr	r3, [r7, #4]
 800f64a:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f64c:	1c5a      	adds	r2, r3, #1
 800f64e:	687b      	ldr	r3, [r7, #4]
 800f650:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800f652:	687b      	ldr	r3, [r7, #4]
 800f654:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f658:	b29b      	uxth	r3, r3
 800f65a:	3b01      	subs	r3, #1
 800f65c:	b29a      	uxth	r2, r3
 800f65e:	687b      	ldr	r3, [r7, #4]
 800f660:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800f664:	bf00      	nop
 800f666:	373c      	adds	r7, #60	@ 0x3c
 800f668:	46bd      	mov	sp, r7
 800f66a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f66e:	4770      	bx	lr

0800f670 <UART_TxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
{
 800f670:	b480      	push	{r7}
 800f672:	b091      	sub	sp, #68	@ 0x44
 800f674:	af00      	add	r7, sp, #0
 800f676:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800f678:	687b      	ldr	r3, [r7, #4]
 800f67a:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800f67e:	2b21      	cmp	r3, #33	@ 0x21
 800f680:	d151      	bne.n	800f726 <UART_TxISR_16BIT+0xb6>
  {
    if (huart->TxXferCount == 0U)
 800f682:	687b      	ldr	r3, [r7, #4]
 800f684:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f688:	b29b      	uxth	r3, r3
 800f68a:	2b00      	cmp	r3, #0
 800f68c:	d132      	bne.n	800f6f4 <UART_TxISR_16BIT+0x84>
    {
      /* Disable the UART Transmit Data Register Empty Interrupt */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
 800f68e:	687b      	ldr	r3, [r7, #4]
 800f690:	681b      	ldr	r3, [r3, #0]
 800f692:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f694:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f696:	e853 3f00 	ldrex	r3, [r3]
 800f69a:	623b      	str	r3, [r7, #32]
   return(result);
 800f69c:	6a3b      	ldr	r3, [r7, #32]
 800f69e:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 800f6a2:	63bb      	str	r3, [r7, #56]	@ 0x38
 800f6a4:	687b      	ldr	r3, [r7, #4]
 800f6a6:	681b      	ldr	r3, [r3, #0]
 800f6a8:	461a      	mov	r2, r3
 800f6aa:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f6ac:	633b      	str	r3, [r7, #48]	@ 0x30
 800f6ae:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f6b0:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800f6b2:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800f6b4:	e841 2300 	strex	r3, r2, [r1]
 800f6b8:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f6ba:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f6bc:	2b00      	cmp	r3, #0
 800f6be:	d1e6      	bne.n	800f68e <UART_TxISR_16BIT+0x1e>

      /* Enable the UART Transmit Complete Interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f6c0:	687b      	ldr	r3, [r7, #4]
 800f6c2:	681b      	ldr	r3, [r3, #0]
 800f6c4:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f6c6:	693b      	ldr	r3, [r7, #16]
 800f6c8:	e853 3f00 	ldrex	r3, [r3]
 800f6cc:	60fb      	str	r3, [r7, #12]
   return(result);
 800f6ce:	68fb      	ldr	r3, [r7, #12]
 800f6d0:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f6d4:	637b      	str	r3, [r7, #52]	@ 0x34
 800f6d6:	687b      	ldr	r3, [r7, #4]
 800f6d8:	681b      	ldr	r3, [r3, #0]
 800f6da:	461a      	mov	r2, r3
 800f6dc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f6de:	61fb      	str	r3, [r7, #28]
 800f6e0:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f6e2:	69b9      	ldr	r1, [r7, #24]
 800f6e4:	69fa      	ldr	r2, [r7, #28]
 800f6e6:	e841 2300 	strex	r3, r2, [r1]
 800f6ea:	617b      	str	r3, [r7, #20]
   return(result);
 800f6ec:	697b      	ldr	r3, [r7, #20]
 800f6ee:	2b00      	cmp	r3, #0
 800f6f0:	d1e6      	bne.n	800f6c0 <UART_TxISR_16BIT+0x50>
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
      huart->pTxBuffPtr += 2U;
      huart->TxXferCount--;
    }
  }
}
 800f6f2:	e018      	b.n	800f726 <UART_TxISR_16BIT+0xb6>
      tmp = (const uint16_t *) huart->pTxBuffPtr;
 800f6f4:	687b      	ldr	r3, [r7, #4]
 800f6f6:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f6f8:	63fb      	str	r3, [r7, #60]	@ 0x3c
      huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800f6fa:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800f6fc:	881b      	ldrh	r3, [r3, #0]
 800f6fe:	461a      	mov	r2, r3
 800f700:	687b      	ldr	r3, [r7, #4]
 800f702:	681b      	ldr	r3, [r3, #0]
 800f704:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800f708:	629a      	str	r2, [r3, #40]	@ 0x28
      huart->pTxBuffPtr += 2U;
 800f70a:	687b      	ldr	r3, [r7, #4]
 800f70c:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f70e:	1c9a      	adds	r2, r3, #2
 800f710:	687b      	ldr	r3, [r7, #4]
 800f712:	651a      	str	r2, [r3, #80]	@ 0x50
      huart->TxXferCount--;
 800f714:	687b      	ldr	r3, [r7, #4]
 800f716:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f71a:	b29b      	uxth	r3, r3
 800f71c:	3b01      	subs	r3, #1
 800f71e:	b29a      	uxth	r2, r3
 800f720:	687b      	ldr	r3, [r7, #4]
 800f722:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
}
 800f726:	bf00      	nop
 800f728:	3744      	adds	r7, #68	@ 0x44
 800f72a:	46bd      	mov	sp, r7
 800f72c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f730:	4770      	bx	lr

0800f732 <UART_TxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f732:	b480      	push	{r7}
 800f734:	b091      	sub	sp, #68	@ 0x44
 800f736:	af00      	add	r7, sp, #0
 800f738:	6078      	str	r0, [r7, #4]
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800f73a:	687b      	ldr	r3, [r7, #4]
 800f73c:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800f740:	2b21      	cmp	r3, #33	@ 0x21
 800f742:	d160      	bne.n	800f806 <UART_TxISR_8BIT_FIFOEN+0xd4>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f744:	687b      	ldr	r3, [r7, #4]
 800f746:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800f74a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f74c:	e057      	b.n	800f7fe <UART_TxISR_8BIT_FIFOEN+0xcc>
    {
      if (huart->TxXferCount == 0U)
 800f74e:	687b      	ldr	r3, [r7, #4]
 800f750:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f754:	b29b      	uxth	r3, r3
 800f756:	2b00      	cmp	r3, #0
 800f758:	d133      	bne.n	800f7c2 <UART_TxISR_8BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800f75a:	687b      	ldr	r3, [r7, #4]
 800f75c:	681b      	ldr	r3, [r3, #0]
 800f75e:	3308      	adds	r3, #8
 800f760:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f762:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f764:	e853 3f00 	ldrex	r3, [r3]
 800f768:	623b      	str	r3, [r7, #32]
   return(result);
 800f76a:	6a3b      	ldr	r3, [r7, #32]
 800f76c:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800f770:	63bb      	str	r3, [r7, #56]	@ 0x38
 800f772:	687b      	ldr	r3, [r7, #4]
 800f774:	681b      	ldr	r3, [r3, #0]
 800f776:	3308      	adds	r3, #8
 800f778:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 800f77a:	633a      	str	r2, [r7, #48]	@ 0x30
 800f77c:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f77e:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800f780:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800f782:	e841 2300 	strex	r3, r2, [r1]
 800f786:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800f788:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800f78a:	2b00      	cmp	r3, #0
 800f78c:	d1e5      	bne.n	800f75a <UART_TxISR_8BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f78e:	687b      	ldr	r3, [r7, #4]
 800f790:	681b      	ldr	r3, [r3, #0]
 800f792:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f794:	693b      	ldr	r3, [r7, #16]
 800f796:	e853 3f00 	ldrex	r3, [r3]
 800f79a:	60fb      	str	r3, [r7, #12]
   return(result);
 800f79c:	68fb      	ldr	r3, [r7, #12]
 800f79e:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f7a2:	637b      	str	r3, [r7, #52]	@ 0x34
 800f7a4:	687b      	ldr	r3, [r7, #4]
 800f7a6:	681b      	ldr	r3, [r3, #0]
 800f7a8:	461a      	mov	r2, r3
 800f7aa:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800f7ac:	61fb      	str	r3, [r7, #28]
 800f7ae:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f7b0:	69b9      	ldr	r1, [r7, #24]
 800f7b2:	69fa      	ldr	r2, [r7, #28]
 800f7b4:	e841 2300 	strex	r3, r2, [r1]
 800f7b8:	617b      	str	r3, [r7, #20]
   return(result);
 800f7ba:	697b      	ldr	r3, [r7, #20]
 800f7bc:	2b00      	cmp	r3, #0
 800f7be:	d1e6      	bne.n	800f78e <UART_TxISR_8BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800f7c0:	e021      	b.n	800f806 <UART_TxISR_8BIT_FIFOEN+0xd4>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800f7c2:	687b      	ldr	r3, [r7, #4]
 800f7c4:	681b      	ldr	r3, [r3, #0]
 800f7c6:	69db      	ldr	r3, [r3, #28]
 800f7c8:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800f7cc:	2b00      	cmp	r3, #0
 800f7ce:	d013      	beq.n	800f7f8 <UART_TxISR_8BIT_FIFOEN+0xc6>
      {
        huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
 800f7d0:	687b      	ldr	r3, [r7, #4]
 800f7d2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f7d4:	781a      	ldrb	r2, [r3, #0]
 800f7d6:	687b      	ldr	r3, [r7, #4]
 800f7d8:	681b      	ldr	r3, [r3, #0]
 800f7da:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr++;
 800f7dc:	687b      	ldr	r3, [r7, #4]
 800f7de:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f7e0:	1c5a      	adds	r2, r3, #1
 800f7e2:	687b      	ldr	r3, [r7, #4]
 800f7e4:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800f7e6:	687b      	ldr	r3, [r7, #4]
 800f7e8:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f7ec:	b29b      	uxth	r3, r3
 800f7ee:	3b01      	subs	r3, #1
 800f7f0:	b29a      	uxth	r2, r3
 800f7f2:	687b      	ldr	r3, [r7, #4]
 800f7f4:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f7f8:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f7fa:	3b01      	subs	r3, #1
 800f7fc:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f7fe:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f800:	2b00      	cmp	r3, #0
 800f802:	d1a4      	bne.n	800f74e <UART_TxISR_8BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800f804:	e7ff      	b.n	800f806 <UART_TxISR_8BIT_FIFOEN+0xd4>
 800f806:	bf00      	nop
 800f808:	3744      	adds	r7, #68	@ 0x44
 800f80a:	46bd      	mov	sp, r7
 800f80c:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f810:	4770      	bx	lr

0800f812 <UART_TxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Transmit_IT().
  * @param huart UART handle.
  * @retval None
  */
static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800f812:	b480      	push	{r7}
 800f814:	b091      	sub	sp, #68	@ 0x44
 800f816:	af00      	add	r7, sp, #0
 800f818:	6078      	str	r0, [r7, #4]
  const uint16_t *tmp;
  uint16_t  nb_tx_data;

  /* Check that a Tx process is ongoing */
  if (huart->gState == HAL_UART_STATE_BUSY_TX)
 800f81a:	687b      	ldr	r3, [r7, #4]
 800f81c:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 800f820:	2b21      	cmp	r3, #33	@ 0x21
 800f822:	d165      	bne.n	800f8f0 <UART_TxISR_16BIT_FIFOEN+0xde>
  {
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f824:	687b      	ldr	r3, [r7, #4]
 800f826:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 800f82a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f82c:	e05c      	b.n	800f8e8 <UART_TxISR_16BIT_FIFOEN+0xd6>
    {
      if (huart->TxXferCount == 0U)
 800f82e:	687b      	ldr	r3, [r7, #4]
 800f830:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f834:	b29b      	uxth	r3, r3
 800f836:	2b00      	cmp	r3, #0
 800f838:	d133      	bne.n	800f8a2 <UART_TxISR_16BIT_FIFOEN+0x90>
      {
        /* Disable the TX FIFO threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
 800f83a:	687b      	ldr	r3, [r7, #4]
 800f83c:	681b      	ldr	r3, [r3, #0]
 800f83e:	3308      	adds	r3, #8
 800f840:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f842:	6a3b      	ldr	r3, [r7, #32]
 800f844:	e853 3f00 	ldrex	r3, [r3]
 800f848:	61fb      	str	r3, [r7, #28]
   return(result);
 800f84a:	69fb      	ldr	r3, [r7, #28]
 800f84c:	f423 0300 	bic.w	r3, r3, #8388608	@ 0x800000
 800f850:	637b      	str	r3, [r7, #52]	@ 0x34
 800f852:	687b      	ldr	r3, [r7, #4]
 800f854:	681b      	ldr	r3, [r3, #0]
 800f856:	3308      	adds	r3, #8
 800f858:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 800f85a:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800f85c:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f85e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800f860:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800f862:	e841 2300 	strex	r3, r2, [r1]
 800f866:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800f868:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800f86a:	2b00      	cmp	r3, #0
 800f86c:	d1e5      	bne.n	800f83a <UART_TxISR_16BIT_FIFOEN+0x28>

        /* Enable the UART Transmit Complete Interrupt */
        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f86e:	687b      	ldr	r3, [r7, #4]
 800f870:	681b      	ldr	r3, [r3, #0]
 800f872:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f874:	68fb      	ldr	r3, [r7, #12]
 800f876:	e853 3f00 	ldrex	r3, [r3]
 800f87a:	60bb      	str	r3, [r7, #8]
   return(result);
 800f87c:	68bb      	ldr	r3, [r7, #8]
 800f87e:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 800f882:	633b      	str	r3, [r7, #48]	@ 0x30
 800f884:	687b      	ldr	r3, [r7, #4]
 800f886:	681b      	ldr	r3, [r3, #0]
 800f888:	461a      	mov	r2, r3
 800f88a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800f88c:	61bb      	str	r3, [r7, #24]
 800f88e:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f890:	6979      	ldr	r1, [r7, #20]
 800f892:	69ba      	ldr	r2, [r7, #24]
 800f894:	e841 2300 	strex	r3, r2, [r1]
 800f898:	613b      	str	r3, [r7, #16]
   return(result);
 800f89a:	693b      	ldr	r3, [r7, #16]
 800f89c:	2b00      	cmp	r3, #0
 800f89e:	d1e6      	bne.n	800f86e <UART_TxISR_16BIT_FIFOEN+0x5c>

        break; /* force exit loop */
 800f8a0:	e026      	b.n	800f8f0 <UART_TxISR_16BIT_FIFOEN+0xde>
      }
      else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
 800f8a2:	687b      	ldr	r3, [r7, #4]
 800f8a4:	681b      	ldr	r3, [r3, #0]
 800f8a6:	69db      	ldr	r3, [r3, #28]
 800f8a8:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 800f8ac:	2b00      	cmp	r3, #0
 800f8ae:	d018      	beq.n	800f8e2 <UART_TxISR_16BIT_FIFOEN+0xd0>
      {
        tmp = (const uint16_t *) huart->pTxBuffPtr;
 800f8b0:	687b      	ldr	r3, [r7, #4]
 800f8b2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f8b4:	63bb      	str	r3, [r7, #56]	@ 0x38
        huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
 800f8b6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f8b8:	881b      	ldrh	r3, [r3, #0]
 800f8ba:	461a      	mov	r2, r3
 800f8bc:	687b      	ldr	r3, [r7, #4]
 800f8be:	681b      	ldr	r3, [r3, #0]
 800f8c0:	f3c2 0208 	ubfx	r2, r2, #0, #9
 800f8c4:	629a      	str	r2, [r3, #40]	@ 0x28
        huart->pTxBuffPtr += 2U;
 800f8c6:	687b      	ldr	r3, [r7, #4]
 800f8c8:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 800f8ca:	1c9a      	adds	r2, r3, #2
 800f8cc:	687b      	ldr	r3, [r7, #4]
 800f8ce:	651a      	str	r2, [r3, #80]	@ 0x50
        huart->TxXferCount--;
 800f8d0:	687b      	ldr	r3, [r7, #4]
 800f8d2:	f8b3 3056 	ldrh.w	r3, [r3, #86]	@ 0x56
 800f8d6:	b29b      	uxth	r3, r3
 800f8d8:	3b01      	subs	r3, #1
 800f8da:	b29a      	uxth	r2, r3
 800f8dc:	687b      	ldr	r3, [r7, #4]
 800f8de:	f8a3 2056 	strh.w	r2, [r3, #86]	@ 0x56
    for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
 800f8e2:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f8e4:	3b01      	subs	r3, #1
 800f8e6:	87fb      	strh	r3, [r7, #62]	@ 0x3e
 800f8e8:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 800f8ea:	2b00      	cmp	r3, #0
 800f8ec:	d19f      	bne.n	800f82e <UART_TxISR_16BIT_FIFOEN+0x1c>
      {
        /* Nothing to do */
      }
    }
  }
}
 800f8ee:	e7ff      	b.n	800f8f0 <UART_TxISR_16BIT_FIFOEN+0xde>
 800f8f0:	bf00      	nop
 800f8f2:	3744      	adds	r7, #68	@ 0x44
 800f8f4:	46bd      	mov	sp, r7
 800f8f6:	f85d 7b04 	ldr.w	r7, [sp], #4
 800f8fa:	4770      	bx	lr

0800f8fc <UART_EndTransmit_IT>:
  * @param  huart pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
{
 800f8fc:	b580      	push	{r7, lr}
 800f8fe:	b088      	sub	sp, #32
 800f900:	af00      	add	r7, sp, #0
 800f902:	6078      	str	r0, [r7, #4]
  /* Disable the UART Transmit Complete Interrupt */
  ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
 800f904:	687b      	ldr	r3, [r7, #4]
 800f906:	681b      	ldr	r3, [r3, #0]
 800f908:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f90a:	68fb      	ldr	r3, [r7, #12]
 800f90c:	e853 3f00 	ldrex	r3, [r3]
 800f910:	60bb      	str	r3, [r7, #8]
   return(result);
 800f912:	68bb      	ldr	r3, [r7, #8]
 800f914:	f023 0340 	bic.w	r3, r3, #64	@ 0x40
 800f918:	61fb      	str	r3, [r7, #28]
 800f91a:	687b      	ldr	r3, [r7, #4]
 800f91c:	681b      	ldr	r3, [r3, #0]
 800f91e:	461a      	mov	r2, r3
 800f920:	69fb      	ldr	r3, [r7, #28]
 800f922:	61bb      	str	r3, [r7, #24]
 800f924:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f926:	6979      	ldr	r1, [r7, #20]
 800f928:	69ba      	ldr	r2, [r7, #24]
 800f92a:	e841 2300 	strex	r3, r2, [r1]
 800f92e:	613b      	str	r3, [r7, #16]
   return(result);
 800f930:	693b      	ldr	r3, [r7, #16]
 800f932:	2b00      	cmp	r3, #0
 800f934:	d1e6      	bne.n	800f904 <UART_EndTransmit_IT+0x8>

  /* Tx process is ended, restore huart->gState to Ready */
  huart->gState = HAL_UART_STATE_READY;
 800f936:	687b      	ldr	r3, [r7, #4]
 800f938:	2220      	movs	r2, #32
 800f93a:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Cleat TxISR function pointer */
  huart->TxISR = NULL;
 800f93e:	687b      	ldr	r3, [r7, #4]
 800f940:	2200      	movs	r2, #0
 800f942:	679a      	str	r2, [r3, #120]	@ 0x78
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
  /*Call registered Tx complete callback*/
  huart->TxCpltCallback(huart);
#else
  /*Call legacy weak Tx complete callback*/
  HAL_UART_TxCpltCallback(huart);
 800f944:	6878      	ldr	r0, [r7, #4]
 800f946:	f7f4 ffdd 	bl	8004904 <HAL_UART_TxCpltCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
}
 800f94a:	bf00      	nop
 800f94c:	3720      	adds	r7, #32
 800f94e:	46bd      	mov	sp, r7
 800f950:	bd80      	pop	{r7, pc}
	...

0800f954 <UART_RxISR_8BIT>:
  * @brief RX interrupt handler for 7 or 8 bits data word length .
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
{
 800f954:	b580      	push	{r7, lr}
 800f956:	b09c      	sub	sp, #112	@ 0x70
 800f958:	af00      	add	r7, sp, #0
 800f95a:	6078      	str	r0, [r7, #4]
  uint16_t uhMask = huart->Mask;
 800f95c:	687b      	ldr	r3, [r7, #4]
 800f95e:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800f962:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800f966:	687b      	ldr	r3, [r7, #4]
 800f968:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800f96c:	2b22      	cmp	r3, #34	@ 0x22
 800f96e:	f040 80be 	bne.w	800faee <UART_RxISR_8BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800f972:	687b      	ldr	r3, [r7, #4]
 800f974:	681b      	ldr	r3, [r3, #0]
 800f976:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800f978:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800f97c:	f8b7 306c 	ldrh.w	r3, [r7, #108]	@ 0x6c
 800f980:	b2d9      	uxtb	r1, r3
 800f982:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800f986:	b2da      	uxtb	r2, r3
 800f988:	687b      	ldr	r3, [r7, #4]
 800f98a:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f98c:	400a      	ands	r2, r1
 800f98e:	b2d2      	uxtb	r2, r2
 800f990:	701a      	strb	r2, [r3, #0]
    huart->pRxBuffPtr++;
 800f992:	687b      	ldr	r3, [r7, #4]
 800f994:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800f996:	1c5a      	adds	r2, r3, #1
 800f998:	687b      	ldr	r3, [r7, #4]
 800f99a:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800f99c:	687b      	ldr	r3, [r7, #4]
 800f99e:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f9a2:	b29b      	uxth	r3, r3
 800f9a4:	3b01      	subs	r3, #1
 800f9a6:	b29a      	uxth	r2, r3
 800f9a8:	687b      	ldr	r3, [r7, #4]
 800f9aa:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800f9ae:	687b      	ldr	r3, [r7, #4]
 800f9b0:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800f9b4:	b29b      	uxth	r3, r3
 800f9b6:	2b00      	cmp	r3, #0
 800f9b8:	f040 80a1 	bne.w	800fafe <UART_RxISR_8BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupts */
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800f9bc:	687b      	ldr	r3, [r7, #4]
 800f9be:	681b      	ldr	r3, [r3, #0]
 800f9c0:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f9c2:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800f9c4:	e853 3f00 	ldrex	r3, [r3]
 800f9c8:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 800f9ca:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800f9cc:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800f9d0:	66bb      	str	r3, [r7, #104]	@ 0x68
 800f9d2:	687b      	ldr	r3, [r7, #4]
 800f9d4:	681b      	ldr	r3, [r3, #0]
 800f9d6:	461a      	mov	r2, r3
 800f9d8:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800f9da:	65bb      	str	r3, [r7, #88]	@ 0x58
 800f9dc:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800f9de:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 800f9e0:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800f9e2:	e841 2300 	strex	r3, r2, [r1]
 800f9e6:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 800f9e8:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 800f9ea:	2b00      	cmp	r3, #0
 800f9ec:	d1e6      	bne.n	800f9bc <UART_RxISR_8BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800f9ee:	687b      	ldr	r3, [r7, #4]
 800f9f0:	681b      	ldr	r3, [r3, #0]
 800f9f2:	3308      	adds	r3, #8
 800f9f4:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800f9f6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800f9f8:	e853 3f00 	ldrex	r3, [r3]
 800f9fc:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 800f9fe:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800fa00:	f023 0301 	bic.w	r3, r3, #1
 800fa04:	667b      	str	r3, [r7, #100]	@ 0x64
 800fa06:	687b      	ldr	r3, [r7, #4]
 800fa08:	681b      	ldr	r3, [r3, #0]
 800fa0a:	3308      	adds	r3, #8
 800fa0c:	6e7a      	ldr	r2, [r7, #100]	@ 0x64
 800fa0e:	647a      	str	r2, [r7, #68]	@ 0x44
 800fa10:	643b      	str	r3, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fa12:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 800fa14:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 800fa16:	e841 2300 	strex	r3, r2, [r1]
 800fa1a:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 800fa1c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 800fa1e:	2b00      	cmp	r3, #0
 800fa20:	d1e5      	bne.n	800f9ee <UART_RxISR_8BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800fa22:	687b      	ldr	r3, [r7, #4]
 800fa24:	2220      	movs	r2, #32
 800fa26:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800fa2a:	687b      	ldr	r3, [r7, #4]
 800fa2c:	2200      	movs	r2, #0
 800fa2e:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800fa30:	687b      	ldr	r3, [r7, #4]
 800fa32:	2200      	movs	r2, #0
 800fa34:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800fa36:	687b      	ldr	r3, [r7, #4]
 800fa38:	681b      	ldr	r3, [r3, #0]
 800fa3a:	4a33      	ldr	r2, [pc, #204]	@ (800fb08 <UART_RxISR_8BIT+0x1b4>)
 800fa3c:	4293      	cmp	r3, r2
 800fa3e:	d01f      	beq.n	800fa80 <UART_RxISR_8BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800fa40:	687b      	ldr	r3, [r7, #4]
 800fa42:	681b      	ldr	r3, [r3, #0]
 800fa44:	685b      	ldr	r3, [r3, #4]
 800fa46:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800fa4a:	2b00      	cmp	r3, #0
 800fa4c:	d018      	beq.n	800fa80 <UART_RxISR_8BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800fa4e:	687b      	ldr	r3, [r7, #4]
 800fa50:	681b      	ldr	r3, [r3, #0]
 800fa52:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fa54:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800fa56:	e853 3f00 	ldrex	r3, [r3]
 800fa5a:	623b      	str	r3, [r7, #32]
   return(result);
 800fa5c:	6a3b      	ldr	r3, [r7, #32]
 800fa5e:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800fa62:	663b      	str	r3, [r7, #96]	@ 0x60
 800fa64:	687b      	ldr	r3, [r7, #4]
 800fa66:	681b      	ldr	r3, [r3, #0]
 800fa68:	461a      	mov	r2, r3
 800fa6a:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800fa6c:	633b      	str	r3, [r7, #48]	@ 0x30
 800fa6e:	62fa      	str	r2, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fa70:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 800fa72:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 800fa74:	e841 2300 	strex	r3, r2, [r1]
 800fa78:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 800fa7a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 800fa7c:	2b00      	cmp	r3, #0
 800fa7e:	d1e6      	bne.n	800fa4e <UART_RxISR_8BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800fa80:	687b      	ldr	r3, [r7, #4]
 800fa82:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800fa84:	2b01      	cmp	r3, #1
 800fa86:	d12e      	bne.n	800fae6 <UART_RxISR_8BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800fa88:	687b      	ldr	r3, [r7, #4]
 800fa8a:	2200      	movs	r2, #0
 800fa8c:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800fa8e:	687b      	ldr	r3, [r7, #4]
 800fa90:	681b      	ldr	r3, [r3, #0]
 800fa92:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fa94:	693b      	ldr	r3, [r7, #16]
 800fa96:	e853 3f00 	ldrex	r3, [r3]
 800fa9a:	60fb      	str	r3, [r7, #12]
   return(result);
 800fa9c:	68fb      	ldr	r3, [r7, #12]
 800fa9e:	f023 0310 	bic.w	r3, r3, #16
 800faa2:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800faa4:	687b      	ldr	r3, [r7, #4]
 800faa6:	681b      	ldr	r3, [r3, #0]
 800faa8:	461a      	mov	r2, r3
 800faaa:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800faac:	61fb      	str	r3, [r7, #28]
 800faae:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fab0:	69b9      	ldr	r1, [r7, #24]
 800fab2:	69fa      	ldr	r2, [r7, #28]
 800fab4:	e841 2300 	strex	r3, r2, [r1]
 800fab8:	617b      	str	r3, [r7, #20]
   return(result);
 800faba:	697b      	ldr	r3, [r7, #20]
 800fabc:	2b00      	cmp	r3, #0
 800fabe:	d1e6      	bne.n	800fa8e <UART_RxISR_8BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800fac0:	687b      	ldr	r3, [r7, #4]
 800fac2:	681b      	ldr	r3, [r3, #0]
 800fac4:	69db      	ldr	r3, [r3, #28]
 800fac6:	f003 0310 	and.w	r3, r3, #16
 800faca:	2b10      	cmp	r3, #16
 800facc:	d103      	bne.n	800fad6 <UART_RxISR_8BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800face:	687b      	ldr	r3, [r7, #4]
 800fad0:	681b      	ldr	r3, [r3, #0]
 800fad2:	2210      	movs	r2, #16
 800fad4:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800fad6:	687b      	ldr	r3, [r7, #4]
 800fad8:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800fadc:	4619      	mov	r1, r3
 800fade:	6878      	ldr	r0, [r7, #4]
 800fae0:	f7f4 feb6 	bl	8004850 <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800fae4:	e00b      	b.n	800fafe <UART_RxISR_8BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800fae6:	6878      	ldr	r0, [r7, #4]
 800fae8:	f7f4 fea8 	bl	800483c <HAL_UART_RxCpltCallback>
}
 800faec:	e007      	b.n	800fafe <UART_RxISR_8BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800faee:	687b      	ldr	r3, [r7, #4]
 800faf0:	681b      	ldr	r3, [r3, #0]
 800faf2:	699a      	ldr	r2, [r3, #24]
 800faf4:	687b      	ldr	r3, [r7, #4]
 800faf6:	681b      	ldr	r3, [r3, #0]
 800faf8:	f042 0208 	orr.w	r2, r2, #8
 800fafc:	619a      	str	r2, [r3, #24]
}
 800fafe:	bf00      	nop
 800fb00:	3770      	adds	r7, #112	@ 0x70
 800fb02:	46bd      	mov	sp, r7
 800fb04:	bd80      	pop	{r7, pc}
 800fb06:	bf00      	nop
 800fb08:	58000c00 	.word	0x58000c00

0800fb0c <UART_RxISR_16BIT>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
{
 800fb0c:	b580      	push	{r7, lr}
 800fb0e:	b09c      	sub	sp, #112	@ 0x70
 800fb10:	af00      	add	r7, sp, #0
 800fb12:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t uhMask = huart->Mask;
 800fb14:	687b      	ldr	r3, [r7, #4]
 800fb16:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800fb1a:	f8a7 306e 	strh.w	r3, [r7, #110]	@ 0x6e
  uint16_t  uhdata;

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800fb1e:	687b      	ldr	r3, [r7, #4]
 800fb20:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800fb24:	2b22      	cmp	r3, #34	@ 0x22
 800fb26:	f040 80be 	bne.w	800fca6 <UART_RxISR_16BIT+0x19a>
  {
    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800fb2a:	687b      	ldr	r3, [r7, #4]
 800fb2c:	681b      	ldr	r3, [r3, #0]
 800fb2e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800fb30:	f8a7 306c 	strh.w	r3, [r7, #108]	@ 0x6c
    tmp = (uint16_t *) huart->pRxBuffPtr ;
 800fb34:	687b      	ldr	r3, [r7, #4]
 800fb36:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800fb38:	66bb      	str	r3, [r7, #104]	@ 0x68
    *tmp = (uint16_t)(uhdata & uhMask);
 800fb3a:	f8b7 206c 	ldrh.w	r2, [r7, #108]	@ 0x6c
 800fb3e:	f8b7 306e 	ldrh.w	r3, [r7, #110]	@ 0x6e
 800fb42:	4013      	ands	r3, r2
 800fb44:	b29a      	uxth	r2, r3
 800fb46:	6ebb      	ldr	r3, [r7, #104]	@ 0x68
 800fb48:	801a      	strh	r2, [r3, #0]
    huart->pRxBuffPtr += 2U;
 800fb4a:	687b      	ldr	r3, [r7, #4]
 800fb4c:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800fb4e:	1c9a      	adds	r2, r3, #2
 800fb50:	687b      	ldr	r3, [r7, #4]
 800fb52:	659a      	str	r2, [r3, #88]	@ 0x58
    huart->RxXferCount--;
 800fb54:	687b      	ldr	r3, [r7, #4]
 800fb56:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fb5a:	b29b      	uxth	r3, r3
 800fb5c:	3b01      	subs	r3, #1
 800fb5e:	b29a      	uxth	r2, r3
 800fb60:	687b      	ldr	r3, [r7, #4]
 800fb62:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e

    if (huart->RxXferCount == 0U)
 800fb66:	687b      	ldr	r3, [r7, #4]
 800fb68:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fb6c:	b29b      	uxth	r3, r3
 800fb6e:	2b00      	cmp	r3, #0
 800fb70:	f040 80a1 	bne.w	800fcb6 <UART_RxISR_16BIT+0x1aa>
    {
      /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
 800fb74:	687b      	ldr	r3, [r7, #4]
 800fb76:	681b      	ldr	r3, [r3, #0]
 800fb78:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fb7a:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800fb7c:	e853 3f00 	ldrex	r3, [r3]
 800fb80:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800fb82:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800fb84:	f423 7390 	bic.w	r3, r3, #288	@ 0x120
 800fb88:	667b      	str	r3, [r7, #100]	@ 0x64
 800fb8a:	687b      	ldr	r3, [r7, #4]
 800fb8c:	681b      	ldr	r3, [r3, #0]
 800fb8e:	461a      	mov	r2, r3
 800fb90:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 800fb92:	657b      	str	r3, [r7, #84]	@ 0x54
 800fb94:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fb96:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800fb98:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800fb9a:	e841 2300 	strex	r3, r2, [r1]
 800fb9e:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800fba0:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800fba2:	2b00      	cmp	r3, #0
 800fba4:	d1e6      	bne.n	800fb74 <UART_RxISR_16BIT+0x68>

      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 800fba6:	687b      	ldr	r3, [r7, #4]
 800fba8:	681b      	ldr	r3, [r3, #0]
 800fbaa:	3308      	adds	r3, #8
 800fbac:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fbae:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800fbb0:	e853 3f00 	ldrex	r3, [r3]
 800fbb4:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800fbb6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800fbb8:	f023 0301 	bic.w	r3, r3, #1
 800fbbc:	663b      	str	r3, [r7, #96]	@ 0x60
 800fbbe:	687b      	ldr	r3, [r7, #4]
 800fbc0:	681b      	ldr	r3, [r3, #0]
 800fbc2:	3308      	adds	r3, #8
 800fbc4:	6e3a      	ldr	r2, [r7, #96]	@ 0x60
 800fbc6:	643a      	str	r2, [r7, #64]	@ 0x40
 800fbc8:	63fb      	str	r3, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fbca:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800fbcc:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800fbce:	e841 2300 	strex	r3, r2, [r1]
 800fbd2:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800fbd4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800fbd6:	2b00      	cmp	r3, #0
 800fbd8:	d1e5      	bne.n	800fba6 <UART_RxISR_16BIT+0x9a>

      /* Rx process is completed, restore huart->RxState to Ready */
      huart->RxState = HAL_UART_STATE_READY;
 800fbda:	687b      	ldr	r3, [r7, #4]
 800fbdc:	2220      	movs	r2, #32
 800fbde:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

      /* Clear RxISR function pointer */
      huart->RxISR = NULL;
 800fbe2:	687b      	ldr	r3, [r7, #4]
 800fbe4:	2200      	movs	r2, #0
 800fbe6:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Initialize type of RxEvent to Transfer Complete */
      huart->RxEventType = HAL_UART_RXEVENT_TC;
 800fbe8:	687b      	ldr	r3, [r7, #4]
 800fbea:	2200      	movs	r2, #0
 800fbec:	671a      	str	r2, [r3, #112]	@ 0x70

      if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800fbee:	687b      	ldr	r3, [r7, #4]
 800fbf0:	681b      	ldr	r3, [r3, #0]
 800fbf2:	4a33      	ldr	r2, [pc, #204]	@ (800fcc0 <UART_RxISR_16BIT+0x1b4>)
 800fbf4:	4293      	cmp	r3, r2
 800fbf6:	d01f      	beq.n	800fc38 <UART_RxISR_16BIT+0x12c>
      {
        /* Check that USART RTOEN bit is set */
        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800fbf8:	687b      	ldr	r3, [r7, #4]
 800fbfa:	681b      	ldr	r3, [r3, #0]
 800fbfc:	685b      	ldr	r3, [r3, #4]
 800fbfe:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800fc02:	2b00      	cmp	r3, #0
 800fc04:	d018      	beq.n	800fc38 <UART_RxISR_16BIT+0x12c>
        {
          /* Enable the UART Receiver Timeout Interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800fc06:	687b      	ldr	r3, [r7, #4]
 800fc08:	681b      	ldr	r3, [r3, #0]
 800fc0a:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fc0c:	6a3b      	ldr	r3, [r7, #32]
 800fc0e:	e853 3f00 	ldrex	r3, [r3]
 800fc12:	61fb      	str	r3, [r7, #28]
   return(result);
 800fc14:	69fb      	ldr	r3, [r7, #28]
 800fc16:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800fc1a:	65fb      	str	r3, [r7, #92]	@ 0x5c
 800fc1c:	687b      	ldr	r3, [r7, #4]
 800fc1e:	681b      	ldr	r3, [r3, #0]
 800fc20:	461a      	mov	r2, r3
 800fc22:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800fc24:	62fb      	str	r3, [r7, #44]	@ 0x2c
 800fc26:	62ba      	str	r2, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fc28:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800fc2a:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800fc2c:	e841 2300 	strex	r3, r2, [r1]
 800fc30:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800fc32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800fc34:	2b00      	cmp	r3, #0
 800fc36:	d1e6      	bne.n	800fc06 <UART_RxISR_16BIT+0xfa>
        }
      }

      /* Check current reception Mode :
         If Reception till IDLE event has been selected : */
      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800fc38:	687b      	ldr	r3, [r7, #4]
 800fc3a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800fc3c:	2b01      	cmp	r3, #1
 800fc3e:	d12e      	bne.n	800fc9e <UART_RxISR_16BIT+0x192>
      {
        /* Set reception type to Standard */
        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800fc40:	687b      	ldr	r3, [r7, #4]
 800fc42:	2200      	movs	r2, #0
 800fc44:	66da      	str	r2, [r3, #108]	@ 0x6c

        /* Disable IDLE interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800fc46:	687b      	ldr	r3, [r7, #4]
 800fc48:	681b      	ldr	r3, [r3, #0]
 800fc4a:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fc4c:	68fb      	ldr	r3, [r7, #12]
 800fc4e:	e853 3f00 	ldrex	r3, [r3]
 800fc52:	60bb      	str	r3, [r7, #8]
   return(result);
 800fc54:	68bb      	ldr	r3, [r7, #8]
 800fc56:	f023 0310 	bic.w	r3, r3, #16
 800fc5a:	65bb      	str	r3, [r7, #88]	@ 0x58
 800fc5c:	687b      	ldr	r3, [r7, #4]
 800fc5e:	681b      	ldr	r3, [r3, #0]
 800fc60:	461a      	mov	r2, r3
 800fc62:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 800fc64:	61bb      	str	r3, [r7, #24]
 800fc66:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fc68:	6979      	ldr	r1, [r7, #20]
 800fc6a:	69ba      	ldr	r2, [r7, #24]
 800fc6c:	e841 2300 	strex	r3, r2, [r1]
 800fc70:	613b      	str	r3, [r7, #16]
   return(result);
 800fc72:	693b      	ldr	r3, [r7, #16]
 800fc74:	2b00      	cmp	r3, #0
 800fc76:	d1e6      	bne.n	800fc46 <UART_RxISR_16BIT+0x13a>

        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800fc78:	687b      	ldr	r3, [r7, #4]
 800fc7a:	681b      	ldr	r3, [r3, #0]
 800fc7c:	69db      	ldr	r3, [r3, #28]
 800fc7e:	f003 0310 	and.w	r3, r3, #16
 800fc82:	2b10      	cmp	r3, #16
 800fc84:	d103      	bne.n	800fc8e <UART_RxISR_16BIT+0x182>
        {
          /* Clear IDLE Flag */
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800fc86:	687b      	ldr	r3, [r7, #4]
 800fc88:	681b      	ldr	r3, [r3, #0]
 800fc8a:	2210      	movs	r2, #16
 800fc8c:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
        /*Call registered Rx Event callback*/
        huart->RxEventCallback(huart, huart->RxXferSize);
#else
        /*Call legacy weak Rx Event callback*/
        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800fc8e:	687b      	ldr	r3, [r7, #4]
 800fc90:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800fc94:	4619      	mov	r1, r3
 800fc96:	6878      	ldr	r0, [r7, #4]
 800fc98:	f7f4 fdda 	bl	8004850 <HAL_UARTEx_RxEventCallback>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800fc9c:	e00b      	b.n	800fcb6 <UART_RxISR_16BIT+0x1aa>
        HAL_UART_RxCpltCallback(huart);
 800fc9e:	6878      	ldr	r0, [r7, #4]
 800fca0:	f7f4 fdcc 	bl	800483c <HAL_UART_RxCpltCallback>
}
 800fca4:	e007      	b.n	800fcb6 <UART_RxISR_16BIT+0x1aa>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 800fca6:	687b      	ldr	r3, [r7, #4]
 800fca8:	681b      	ldr	r3, [r3, #0]
 800fcaa:	699a      	ldr	r2, [r3, #24]
 800fcac:	687b      	ldr	r3, [r7, #4]
 800fcae:	681b      	ldr	r3, [r3, #0]
 800fcb0:	f042 0208 	orr.w	r2, r2, #8
 800fcb4:	619a      	str	r2, [r3, #24]
}
 800fcb6:	bf00      	nop
 800fcb8:	3770      	adds	r7, #112	@ 0x70
 800fcba:	46bd      	mov	sp, r7
 800fcbc:	bd80      	pop	{r7, pc}
 800fcbe:	bf00      	nop
 800fcc0:	58000c00 	.word	0x58000c00

0800fcc4 <UART_RxISR_8BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 800fcc4:	b580      	push	{r7, lr}
 800fcc6:	b0ac      	sub	sp, #176	@ 0xb0
 800fcc8:	af00      	add	r7, sp, #0
 800fcca:	6078      	str	r0, [r7, #4]
  uint16_t  uhMask = huart->Mask;
 800fccc:	687b      	ldr	r3, [r7, #4]
 800fcce:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 800fcd2:	f8a7 30aa 	strh.w	r3, [r7, #170]	@ 0xaa
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 800fcd6:	687b      	ldr	r3, [r7, #4]
 800fcd8:	681b      	ldr	r3, [r3, #0]
 800fcda:	69db      	ldr	r3, [r3, #28]
 800fcdc:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 800fce0:	687b      	ldr	r3, [r7, #4]
 800fce2:	681b      	ldr	r3, [r3, #0]
 800fce4:	681b      	ldr	r3, [r3, #0]
 800fce6:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 800fcea:	687b      	ldr	r3, [r7, #4]
 800fcec:	681b      	ldr	r3, [r3, #0]
 800fcee:	689b      	ldr	r3, [r3, #8]
 800fcf0:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 800fcf4:	687b      	ldr	r3, [r7, #4]
 800fcf6:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 800fcfa:	2b22      	cmp	r3, #34	@ 0x22
 800fcfc:	f040 8180 	bne.w	8010000 <UART_RxISR_8BIT_FIFOEN+0x33c>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 800fd00:	687b      	ldr	r3, [r7, #4]
 800fd02:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800fd06:	f8a7 309e 	strh.w	r3, [r7, #158]	@ 0x9e
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800fd0a:	e123      	b.n	800ff54 <UART_RxISR_8BIT_FIFOEN+0x290>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 800fd0c:	687b      	ldr	r3, [r7, #4]
 800fd0e:	681b      	ldr	r3, [r3, #0]
 800fd10:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 800fd12:	f8a7 309c 	strh.w	r3, [r7, #156]	@ 0x9c
      *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
 800fd16:	f8b7 309c 	ldrh.w	r3, [r7, #156]	@ 0x9c
 800fd1a:	b2d9      	uxtb	r1, r3
 800fd1c:	f8b7 30aa 	ldrh.w	r3, [r7, #170]	@ 0xaa
 800fd20:	b2da      	uxtb	r2, r3
 800fd22:	687b      	ldr	r3, [r7, #4]
 800fd24:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800fd26:	400a      	ands	r2, r1
 800fd28:	b2d2      	uxtb	r2, r2
 800fd2a:	701a      	strb	r2, [r3, #0]
      huart->pRxBuffPtr++;
 800fd2c:	687b      	ldr	r3, [r7, #4]
 800fd2e:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 800fd30:	1c5a      	adds	r2, r3, #1
 800fd32:	687b      	ldr	r3, [r7, #4]
 800fd34:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 800fd36:	687b      	ldr	r3, [r7, #4]
 800fd38:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fd3c:	b29b      	uxth	r3, r3
 800fd3e:	3b01      	subs	r3, #1
 800fd40:	b29a      	uxth	r2, r3
 800fd42:	687b      	ldr	r3, [r7, #4]
 800fd44:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 800fd48:	687b      	ldr	r3, [r7, #4]
 800fd4a:	681b      	ldr	r3, [r3, #0]
 800fd4c:	69db      	ldr	r3, [r3, #28]
 800fd4e:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 800fd52:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fd56:	f003 0307 	and.w	r3, r3, #7
 800fd5a:	2b00      	cmp	r3, #0
 800fd5c:	d053      	beq.n	800fe06 <UART_RxISR_8BIT_FIFOEN+0x142>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 800fd5e:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fd62:	f003 0301 	and.w	r3, r3, #1
 800fd66:	2b00      	cmp	r3, #0
 800fd68:	d011      	beq.n	800fd8e <UART_RxISR_8BIT_FIFOEN+0xca>
 800fd6a:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 800fd6e:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 800fd72:	2b00      	cmp	r3, #0
 800fd74:	d00b      	beq.n	800fd8e <UART_RxISR_8BIT_FIFOEN+0xca>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 800fd76:	687b      	ldr	r3, [r7, #4]
 800fd78:	681b      	ldr	r3, [r3, #0]
 800fd7a:	2201      	movs	r2, #1
 800fd7c:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 800fd7e:	687b      	ldr	r3, [r7, #4]
 800fd80:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fd84:	f043 0201 	orr.w	r2, r3, #1
 800fd88:	687b      	ldr	r3, [r7, #4]
 800fd8a:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800fd8e:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fd92:	f003 0302 	and.w	r3, r3, #2
 800fd96:	2b00      	cmp	r3, #0
 800fd98:	d011      	beq.n	800fdbe <UART_RxISR_8BIT_FIFOEN+0xfa>
 800fd9a:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800fd9e:	f003 0301 	and.w	r3, r3, #1
 800fda2:	2b00      	cmp	r3, #0
 800fda4:	d00b      	beq.n	800fdbe <UART_RxISR_8BIT_FIFOEN+0xfa>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 800fda6:	687b      	ldr	r3, [r7, #4]
 800fda8:	681b      	ldr	r3, [r3, #0]
 800fdaa:	2202      	movs	r2, #2
 800fdac:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 800fdae:	687b      	ldr	r3, [r7, #4]
 800fdb0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fdb4:	f043 0204 	orr.w	r2, r3, #4
 800fdb8:	687b      	ldr	r3, [r7, #4]
 800fdba:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 800fdbe:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800fdc2:	f003 0304 	and.w	r3, r3, #4
 800fdc6:	2b00      	cmp	r3, #0
 800fdc8:	d011      	beq.n	800fdee <UART_RxISR_8BIT_FIFOEN+0x12a>
 800fdca:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 800fdce:	f003 0301 	and.w	r3, r3, #1
 800fdd2:	2b00      	cmp	r3, #0
 800fdd4:	d00b      	beq.n	800fdee <UART_RxISR_8BIT_FIFOEN+0x12a>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 800fdd6:	687b      	ldr	r3, [r7, #4]
 800fdd8:	681b      	ldr	r3, [r3, #0]
 800fdda:	2204      	movs	r2, #4
 800fddc:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 800fdde:	687b      	ldr	r3, [r7, #4]
 800fde0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fde4:	f043 0202 	orr.w	r2, r3, #2
 800fde8:	687b      	ldr	r3, [r7, #4]
 800fdea:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 800fdee:	687b      	ldr	r3, [r7, #4]
 800fdf0:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 800fdf4:	2b00      	cmp	r3, #0
 800fdf6:	d006      	beq.n	800fe06 <UART_RxISR_8BIT_FIFOEN+0x142>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 800fdf8:	6878      	ldr	r0, [r7, #4]
 800fdfa:	f7fe fb13 	bl	800e424 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 800fdfe:	687b      	ldr	r3, [r7, #4]
 800fe00:	2200      	movs	r2, #0
 800fe02:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 800fe06:	687b      	ldr	r3, [r7, #4]
 800fe08:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800fe0c:	b29b      	uxth	r3, r3
 800fe0e:	2b00      	cmp	r3, #0
 800fe10:	f040 80a0 	bne.w	800ff54 <UART_RxISR_8BIT_FIFOEN+0x290>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 800fe14:	687b      	ldr	r3, [r7, #4]
 800fe16:	681b      	ldr	r3, [r3, #0]
 800fe18:	673b      	str	r3, [r7, #112]	@ 0x70
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fe1a:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 800fe1c:	e853 3f00 	ldrex	r3, [r3]
 800fe20:	66fb      	str	r3, [r7, #108]	@ 0x6c
   return(result);
 800fe22:	6efb      	ldr	r3, [r7, #108]	@ 0x6c
 800fe24:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 800fe28:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 800fe2c:	687b      	ldr	r3, [r7, #4]
 800fe2e:	681b      	ldr	r3, [r3, #0]
 800fe30:	461a      	mov	r2, r3
 800fe32:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 800fe36:	67fb      	str	r3, [r7, #124]	@ 0x7c
 800fe38:	67ba      	str	r2, [r7, #120]	@ 0x78
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fe3a:	6fb9      	ldr	r1, [r7, #120]	@ 0x78
 800fe3c:	6ffa      	ldr	r2, [r7, #124]	@ 0x7c
 800fe3e:	e841 2300 	strex	r3, r2, [r1]
 800fe42:	677b      	str	r3, [r7, #116]	@ 0x74
   return(result);
 800fe44:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 800fe46:	2b00      	cmp	r3, #0
 800fe48:	d1e4      	bne.n	800fe14 <UART_RxISR_8BIT_FIFOEN+0x150>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 800fe4a:	687b      	ldr	r3, [r7, #4]
 800fe4c:	681b      	ldr	r3, [r3, #0]
 800fe4e:	3308      	adds	r3, #8
 800fe50:	65fb      	str	r3, [r7, #92]	@ 0x5c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fe52:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 800fe54:	e853 3f00 	ldrex	r3, [r3]
 800fe58:	65bb      	str	r3, [r7, #88]	@ 0x58
   return(result);
 800fe5a:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 800fe5c:	4b6e      	ldr	r3, [pc, #440]	@ (8010018 <UART_RxISR_8BIT_FIFOEN+0x354>)
 800fe5e:	4013      	ands	r3, r2
 800fe60:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 800fe64:	687b      	ldr	r3, [r7, #4]
 800fe66:	681b      	ldr	r3, [r3, #0]
 800fe68:	3308      	adds	r3, #8
 800fe6a:	f8d7 2094 	ldr.w	r2, [r7, #148]	@ 0x94
 800fe6e:	66ba      	str	r2, [r7, #104]	@ 0x68
 800fe70:	667b      	str	r3, [r7, #100]	@ 0x64
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fe72:	6e79      	ldr	r1, [r7, #100]	@ 0x64
 800fe74:	6eba      	ldr	r2, [r7, #104]	@ 0x68
 800fe76:	e841 2300 	strex	r3, r2, [r1]
 800fe7a:	663b      	str	r3, [r7, #96]	@ 0x60
   return(result);
 800fe7c:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 800fe7e:	2b00      	cmp	r3, #0
 800fe80:	d1e3      	bne.n	800fe4a <UART_RxISR_8BIT_FIFOEN+0x186>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 800fe82:	687b      	ldr	r3, [r7, #4]
 800fe84:	2220      	movs	r2, #32
 800fe86:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 800fe8a:	687b      	ldr	r3, [r7, #4]
 800fe8c:	2200      	movs	r2, #0
 800fe8e:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 800fe90:	687b      	ldr	r3, [r7, #4]
 800fe92:	2200      	movs	r2, #0
 800fe94:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 800fe96:	687b      	ldr	r3, [r7, #4]
 800fe98:	681b      	ldr	r3, [r3, #0]
 800fe9a:	4a60      	ldr	r2, [pc, #384]	@ (801001c <UART_RxISR_8BIT_FIFOEN+0x358>)
 800fe9c:	4293      	cmp	r3, r2
 800fe9e:	d021      	beq.n	800fee4 <UART_RxISR_8BIT_FIFOEN+0x220>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 800fea0:	687b      	ldr	r3, [r7, #4]
 800fea2:	681b      	ldr	r3, [r3, #0]
 800fea4:	685b      	ldr	r3, [r3, #4]
 800fea6:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 800feaa:	2b00      	cmp	r3, #0
 800feac:	d01a      	beq.n	800fee4 <UART_RxISR_8BIT_FIFOEN+0x220>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 800feae:	687b      	ldr	r3, [r7, #4]
 800feb0:	681b      	ldr	r3, [r3, #0]
 800feb2:	64bb      	str	r3, [r7, #72]	@ 0x48
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800feb4:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 800feb6:	e853 3f00 	ldrex	r3, [r3]
 800feba:	647b      	str	r3, [r7, #68]	@ 0x44
   return(result);
 800febc:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 800febe:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 800fec2:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 800fec6:	687b      	ldr	r3, [r7, #4]
 800fec8:	681b      	ldr	r3, [r3, #0]
 800feca:	461a      	mov	r2, r3
 800fecc:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 800fed0:	657b      	str	r3, [r7, #84]	@ 0x54
 800fed2:	653a      	str	r2, [r7, #80]	@ 0x50
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800fed4:	6d39      	ldr	r1, [r7, #80]	@ 0x50
 800fed6:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 800fed8:	e841 2300 	strex	r3, r2, [r1]
 800fedc:	64fb      	str	r3, [r7, #76]	@ 0x4c
   return(result);
 800fede:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 800fee0:	2b00      	cmp	r3, #0
 800fee2:	d1e4      	bne.n	800feae <UART_RxISR_8BIT_FIFOEN+0x1ea>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 800fee4:	687b      	ldr	r3, [r7, #4]
 800fee6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 800fee8:	2b01      	cmp	r3, #1
 800feea:	d130      	bne.n	800ff4e <UART_RxISR_8BIT_FIFOEN+0x28a>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 800feec:	687b      	ldr	r3, [r7, #4]
 800feee:	2200      	movs	r2, #0
 800fef0:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 800fef2:	687b      	ldr	r3, [r7, #4]
 800fef4:	681b      	ldr	r3, [r3, #0]
 800fef6:	637b      	str	r3, [r7, #52]	@ 0x34
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800fef8:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 800fefa:	e853 3f00 	ldrex	r3, [r3]
 800fefe:	633b      	str	r3, [r7, #48]	@ 0x30
   return(result);
 800ff00:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 800ff02:	f023 0310 	bic.w	r3, r3, #16
 800ff06:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
 800ff0a:	687b      	ldr	r3, [r7, #4]
 800ff0c:	681b      	ldr	r3, [r3, #0]
 800ff0e:	461a      	mov	r2, r3
 800ff10:	f8d7 308c 	ldr.w	r3, [r7, #140]	@ 0x8c
 800ff14:	643b      	str	r3, [r7, #64]	@ 0x40
 800ff16:	63fa      	str	r2, [r7, #60]	@ 0x3c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ff18:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 800ff1a:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 800ff1c:	e841 2300 	strex	r3, r2, [r1]
 800ff20:	63bb      	str	r3, [r7, #56]	@ 0x38
   return(result);
 800ff22:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 800ff24:	2b00      	cmp	r3, #0
 800ff26:	d1e4      	bne.n	800fef2 <UART_RxISR_8BIT_FIFOEN+0x22e>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 800ff28:	687b      	ldr	r3, [r7, #4]
 800ff2a:	681b      	ldr	r3, [r3, #0]
 800ff2c:	69db      	ldr	r3, [r3, #28]
 800ff2e:	f003 0310 	and.w	r3, r3, #16
 800ff32:	2b10      	cmp	r3, #16
 800ff34:	d103      	bne.n	800ff3e <UART_RxISR_8BIT_FIFOEN+0x27a>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 800ff36:	687b      	ldr	r3, [r7, #4]
 800ff38:	681b      	ldr	r3, [r3, #0]
 800ff3a:	2210      	movs	r2, #16
 800ff3c:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 800ff3e:	687b      	ldr	r3, [r7, #4]
 800ff40:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 800ff44:	4619      	mov	r1, r3
 800ff46:	6878      	ldr	r0, [r7, #4]
 800ff48:	f7f4 fc82 	bl	8004850 <HAL_UARTEx_RxEventCallback>
 800ff4c:	e002      	b.n	800ff54 <UART_RxISR_8BIT_FIFOEN+0x290>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 800ff4e:	6878      	ldr	r0, [r7, #4]
 800ff50:	f7f4 fc74 	bl	800483c <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 800ff54:	f8b7 309e 	ldrh.w	r3, [r7, #158]	@ 0x9e
 800ff58:	2b00      	cmp	r3, #0
 800ff5a:	d006      	beq.n	800ff6a <UART_RxISR_8BIT_FIFOEN+0x2a6>
 800ff5c:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 800ff60:	f003 0320 	and.w	r3, r3, #32
 800ff64:	2b00      	cmp	r3, #0
 800ff66:	f47f aed1 	bne.w	800fd0c <UART_RxISR_8BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 800ff6a:	687b      	ldr	r3, [r7, #4]
 800ff6c:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 800ff70:	f8a7 308a 	strh.w	r3, [r7, #138]	@ 0x8a
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 800ff74:	f8b7 308a 	ldrh.w	r3, [r7, #138]	@ 0x8a
 800ff78:	2b00      	cmp	r3, #0
 800ff7a:	d049      	beq.n	8010010 <UART_RxISR_8BIT_FIFOEN+0x34c>
 800ff7c:	687b      	ldr	r3, [r7, #4]
 800ff7e:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 800ff82:	f8b7 208a 	ldrh.w	r2, [r7, #138]	@ 0x8a
 800ff86:	429a      	cmp	r2, r3
 800ff88:	d242      	bcs.n	8010010 <UART_RxISR_8BIT_FIFOEN+0x34c>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 800ff8a:	687b      	ldr	r3, [r7, #4]
 800ff8c:	681b      	ldr	r3, [r3, #0]
 800ff8e:	3308      	adds	r3, #8
 800ff90:	623b      	str	r3, [r7, #32]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ff92:	6a3b      	ldr	r3, [r7, #32]
 800ff94:	e853 3f00 	ldrex	r3, [r3]
 800ff98:	61fb      	str	r3, [r7, #28]
   return(result);
 800ff9a:	69fb      	ldr	r3, [r7, #28]
 800ff9c:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 800ffa0:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 800ffa4:	687b      	ldr	r3, [r7, #4]
 800ffa6:	681b      	ldr	r3, [r3, #0]
 800ffa8:	3308      	adds	r3, #8
 800ffaa:	f8d7 2084 	ldr.w	r2, [r7, #132]	@ 0x84
 800ffae:	62fa      	str	r2, [r7, #44]	@ 0x2c
 800ffb0:	62bb      	str	r3, [r7, #40]	@ 0x28
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ffb2:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 800ffb4:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 800ffb6:	e841 2300 	strex	r3, r2, [r1]
 800ffba:	627b      	str	r3, [r7, #36]	@ 0x24
   return(result);
 800ffbc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 800ffbe:	2b00      	cmp	r3, #0
 800ffc0:	d1e3      	bne.n	800ff8a <UART_RxISR_8BIT_FIFOEN+0x2c6>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_8BIT;
 800ffc2:	687b      	ldr	r3, [r7, #4]
 800ffc4:	4a16      	ldr	r2, [pc, #88]	@ (8010020 <UART_RxISR_8BIT_FIFOEN+0x35c>)
 800ffc6:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 800ffc8:	687b      	ldr	r3, [r7, #4]
 800ffca:	681b      	ldr	r3, [r3, #0]
 800ffcc:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 800ffce:	68fb      	ldr	r3, [r7, #12]
 800ffd0:	e853 3f00 	ldrex	r3, [r3]
 800ffd4:	60bb      	str	r3, [r7, #8]
   return(result);
 800ffd6:	68bb      	ldr	r3, [r7, #8]
 800ffd8:	f043 0320 	orr.w	r3, r3, #32
 800ffdc:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 800ffe0:	687b      	ldr	r3, [r7, #4]
 800ffe2:	681b      	ldr	r3, [r3, #0]
 800ffe4:	461a      	mov	r2, r3
 800ffe6:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 800ffea:	61bb      	str	r3, [r7, #24]
 800ffec:	617a      	str	r2, [r7, #20]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 800ffee:	6979      	ldr	r1, [r7, #20]
 800fff0:	69ba      	ldr	r2, [r7, #24]
 800fff2:	e841 2300 	strex	r3, r2, [r1]
 800fff6:	613b      	str	r3, [r7, #16]
   return(result);
 800fff8:	693b      	ldr	r3, [r7, #16]
 800fffa:	2b00      	cmp	r3, #0
 800fffc:	d1e4      	bne.n	800ffc8 <UART_RxISR_8BIT_FIFOEN+0x304>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 800fffe:	e007      	b.n	8010010 <UART_RxISR_8BIT_FIFOEN+0x34c>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 8010000:	687b      	ldr	r3, [r7, #4]
 8010002:	681b      	ldr	r3, [r3, #0]
 8010004:	699a      	ldr	r2, [r3, #24]
 8010006:	687b      	ldr	r3, [r7, #4]
 8010008:	681b      	ldr	r3, [r3, #0]
 801000a:	f042 0208 	orr.w	r2, r2, #8
 801000e:	619a      	str	r2, [r3, #24]
}
 8010010:	bf00      	nop
 8010012:	37b0      	adds	r7, #176	@ 0xb0
 8010014:	46bd      	mov	sp, r7
 8010016:	bd80      	pop	{r7, pc}
 8010018:	effffffe 	.word	0xeffffffe
 801001c:	58000c00 	.word	0x58000c00
 8010020:	0800f955 	.word	0x0800f955

08010024 <UART_RxISR_16BIT_FIFOEN>:
  *         interruptions have been enabled by HAL_UART_Receive_IT()
  * @param huart UART handle.
  * @retval None
  */
static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
{
 8010024:	b580      	push	{r7, lr}
 8010026:	b0ae      	sub	sp, #184	@ 0xb8
 8010028:	af00      	add	r7, sp, #0
 801002a:	6078      	str	r0, [r7, #4]
  uint16_t *tmp;
  uint16_t  uhMask = huart->Mask;
 801002c:	687b      	ldr	r3, [r7, #4]
 801002e:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 8010032:	f8a7 30b2 	strh.w	r3, [r7, #178]	@ 0xb2
  uint16_t  uhdata;
  uint16_t  nb_rx_data;
  uint16_t  rxdatacount;
  uint32_t  isrflags = READ_REG(huart->Instance->ISR);
 8010036:	687b      	ldr	r3, [r7, #4]
 8010038:	681b      	ldr	r3, [r3, #0]
 801003a:	69db      	ldr	r3, [r3, #28]
 801003c:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4
  uint32_t  cr1its   = READ_REG(huart->Instance->CR1);
 8010040:	687b      	ldr	r3, [r7, #4]
 8010042:	681b      	ldr	r3, [r3, #0]
 8010044:	681b      	ldr	r3, [r3, #0]
 8010046:	f8c7 30ac 	str.w	r3, [r7, #172]	@ 0xac
  uint32_t  cr3its   = READ_REG(huart->Instance->CR3);
 801004a:	687b      	ldr	r3, [r7, #4]
 801004c:	681b      	ldr	r3, [r3, #0]
 801004e:	689b      	ldr	r3, [r3, #8]
 8010050:	f8c7 30a8 	str.w	r3, [r7, #168]	@ 0xa8

  /* Check that a Rx process is ongoing */
  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
 8010054:	687b      	ldr	r3, [r7, #4]
 8010056:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801005a:	2b22      	cmp	r3, #34	@ 0x22
 801005c:	f040 8184 	bne.w	8010368 <UART_RxISR_16BIT_FIFOEN+0x344>
  {
    nb_rx_data = huart->NbRxDataToProcess;
 8010060:	687b      	ldr	r3, [r7, #4]
 8010062:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 8010066:	f8a7 30a6 	strh.w	r3, [r7, #166]	@ 0xa6
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 801006a:	e127      	b.n	80102bc <UART_RxISR_16BIT_FIFOEN+0x298>
    {
      uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
 801006c:	687b      	ldr	r3, [r7, #4]
 801006e:	681b      	ldr	r3, [r3, #0]
 8010070:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8010072:	f8a7 30a4 	strh.w	r3, [r7, #164]	@ 0xa4
      tmp = (uint16_t *) huart->pRxBuffPtr ;
 8010076:	687b      	ldr	r3, [r7, #4]
 8010078:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801007a:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
      *tmp = (uint16_t)(uhdata & uhMask);
 801007e:	f8b7 20a4 	ldrh.w	r2, [r7, #164]	@ 0xa4
 8010082:	f8b7 30b2 	ldrh.w	r3, [r7, #178]	@ 0xb2
 8010086:	4013      	ands	r3, r2
 8010088:	b29a      	uxth	r2, r3
 801008a:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 801008e:	801a      	strh	r2, [r3, #0]
      huart->pRxBuffPtr += 2U;
 8010090:	687b      	ldr	r3, [r7, #4]
 8010092:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 8010094:	1c9a      	adds	r2, r3, #2
 8010096:	687b      	ldr	r3, [r7, #4]
 8010098:	659a      	str	r2, [r3, #88]	@ 0x58
      huart->RxXferCount--;
 801009a:	687b      	ldr	r3, [r7, #4]
 801009c:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 80100a0:	b29b      	uxth	r3, r3
 80100a2:	3b01      	subs	r3, #1
 80100a4:	b29a      	uxth	r2, r3
 80100a6:	687b      	ldr	r3, [r7, #4]
 80100a8:	f8a3 205e 	strh.w	r2, [r3, #94]	@ 0x5e
      isrflags = READ_REG(huart->Instance->ISR);
 80100ac:	687b      	ldr	r3, [r7, #4]
 80100ae:	681b      	ldr	r3, [r3, #0]
 80100b0:	69db      	ldr	r3, [r3, #28]
 80100b2:	f8c7 30b4 	str.w	r3, [r7, #180]	@ 0xb4

      /* If some non blocking errors occurred */
      if ((isrflags & (USART_ISR_PE | USART_ISR_FE | USART_ISR_NE)) != 0U)
 80100b6:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 80100ba:	f003 0307 	and.w	r3, r3, #7
 80100be:	2b00      	cmp	r3, #0
 80100c0:	d053      	beq.n	801016a <UART_RxISR_16BIT_FIFOEN+0x146>
      {
        /* UART parity error interrupt occurred -------------------------------------*/
        if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
 80100c2:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 80100c6:	f003 0301 	and.w	r3, r3, #1
 80100ca:	2b00      	cmp	r3, #0
 80100cc:	d011      	beq.n	80100f2 <UART_RxISR_16BIT_FIFOEN+0xce>
 80100ce:	f8d7 30ac 	ldr.w	r3, [r7, #172]	@ 0xac
 80100d2:	f403 7380 	and.w	r3, r3, #256	@ 0x100
 80100d6:	2b00      	cmp	r3, #0
 80100d8:	d00b      	beq.n	80100f2 <UART_RxISR_16BIT_FIFOEN+0xce>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
 80100da:	687b      	ldr	r3, [r7, #4]
 80100dc:	681b      	ldr	r3, [r3, #0]
 80100de:	2201      	movs	r2, #1
 80100e0:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_PE;
 80100e2:	687b      	ldr	r3, [r7, #4]
 80100e4:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 80100e8:	f043 0201 	orr.w	r2, r3, #1
 80100ec:	687b      	ldr	r3, [r7, #4]
 80100ee:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART frame error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 80100f2:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 80100f6:	f003 0302 	and.w	r3, r3, #2
 80100fa:	2b00      	cmp	r3, #0
 80100fc:	d011      	beq.n	8010122 <UART_RxISR_16BIT_FIFOEN+0xfe>
 80100fe:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 8010102:	f003 0301 	and.w	r3, r3, #1
 8010106:	2b00      	cmp	r3, #0
 8010108:	d00b      	beq.n	8010122 <UART_RxISR_16BIT_FIFOEN+0xfe>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
 801010a:	687b      	ldr	r3, [r7, #4]
 801010c:	681b      	ldr	r3, [r3, #0]
 801010e:	2202      	movs	r2, #2
 8010110:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_FE;
 8010112:	687b      	ldr	r3, [r7, #4]
 8010114:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8010118:	f043 0204 	orr.w	r2, r3, #4
 801011c:	687b      	ldr	r3, [r7, #4]
 801011e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* UART noise error interrupt occurred --------------------------------------*/
        if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
 8010122:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 8010126:	f003 0304 	and.w	r3, r3, #4
 801012a:	2b00      	cmp	r3, #0
 801012c:	d011      	beq.n	8010152 <UART_RxISR_16BIT_FIFOEN+0x12e>
 801012e:	f8d7 30a8 	ldr.w	r3, [r7, #168]	@ 0xa8
 8010132:	f003 0301 	and.w	r3, r3, #1
 8010136:	2b00      	cmp	r3, #0
 8010138:	d00b      	beq.n	8010152 <UART_RxISR_16BIT_FIFOEN+0x12e>
        {
          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
 801013a:	687b      	ldr	r3, [r7, #4]
 801013c:	681b      	ldr	r3, [r3, #0]
 801013e:	2204      	movs	r2, #4
 8010140:	621a      	str	r2, [r3, #32]

          huart->ErrorCode |= HAL_UART_ERROR_NE;
 8010142:	687b      	ldr	r3, [r7, #4]
 8010144:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8010148:	f043 0202 	orr.w	r2, r3, #2
 801014c:	687b      	ldr	r3, [r7, #4]
 801014e:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }

        /* Call UART Error Call back function if need be ----------------------------*/
        if (huart->ErrorCode != HAL_UART_ERROR_NONE)
 8010152:	687b      	ldr	r3, [r7, #4]
 8010154:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 8010158:	2b00      	cmp	r3, #0
 801015a:	d006      	beq.n	801016a <UART_RxISR_16BIT_FIFOEN+0x146>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered error callback*/
          huart->ErrorCallback(huart);
#else
          /*Call legacy weak error callback*/
          HAL_UART_ErrorCallback(huart);
 801015c:	6878      	ldr	r0, [r7, #4]
 801015e:	f7fe f961 	bl	800e424 <HAL_UART_ErrorCallback>
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
          huart->ErrorCode = HAL_UART_ERROR_NONE;
 8010162:	687b      	ldr	r3, [r7, #4]
 8010164:	2200      	movs	r2, #0
 8010166:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
        }
      }

      if (huart->RxXferCount == 0U)
 801016a:	687b      	ldr	r3, [r7, #4]
 801016c:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 8010170:	b29b      	uxth	r3, r3
 8010172:	2b00      	cmp	r3, #0
 8010174:	f040 80a2 	bne.w	80102bc <UART_RxISR_16BIT_FIFOEN+0x298>
      {
        /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
 8010178:	687b      	ldr	r3, [r7, #4]
 801017a:	681b      	ldr	r3, [r3, #0]
 801017c:	677b      	str	r3, [r7, #116]	@ 0x74
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 801017e:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8010180:	e853 3f00 	ldrex	r3, [r3]
 8010184:	673b      	str	r3, [r7, #112]	@ 0x70
   return(result);
 8010186:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 8010188:	f423 7380 	bic.w	r3, r3, #256	@ 0x100
 801018c:	f8c7 309c 	str.w	r3, [r7, #156]	@ 0x9c
 8010190:	687b      	ldr	r3, [r7, #4]
 8010192:	681b      	ldr	r3, [r3, #0]
 8010194:	461a      	mov	r2, r3
 8010196:	f8d7 309c 	ldr.w	r3, [r7, #156]	@ 0x9c
 801019a:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 801019e:	67fa      	str	r2, [r7, #124]	@ 0x7c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 80101a0:	6ff9      	ldr	r1, [r7, #124]	@ 0x7c
 80101a2:	f8d7 2080 	ldr.w	r2, [r7, #128]	@ 0x80
 80101a6:	e841 2300 	strex	r3, r2, [r1]
 80101aa:	67bb      	str	r3, [r7, #120]	@ 0x78
   return(result);
 80101ac:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 80101ae:	2b00      	cmp	r3, #0
 80101b0:	d1e2      	bne.n	8010178 <UART_RxISR_16BIT_FIFOEN+0x154>

        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error)
           and RX FIFO Threshold interrupt */
        ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
 80101b2:	687b      	ldr	r3, [r7, #4]
 80101b4:	681b      	ldr	r3, [r3, #0]
 80101b6:	3308      	adds	r3, #8
 80101b8:	663b      	str	r3, [r7, #96]	@ 0x60
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 80101ba:	6e3b      	ldr	r3, [r7, #96]	@ 0x60
 80101bc:	e853 3f00 	ldrex	r3, [r3]
 80101c0:	65fb      	str	r3, [r7, #92]	@ 0x5c
   return(result);
 80101c2:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 80101c4:	4b6e      	ldr	r3, [pc, #440]	@ (8010380 <UART_RxISR_16BIT_FIFOEN+0x35c>)
 80101c6:	4013      	ands	r3, r2
 80101c8:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
 80101cc:	687b      	ldr	r3, [r7, #4]
 80101ce:	681b      	ldr	r3, [r3, #0]
 80101d0:	3308      	adds	r3, #8
 80101d2:	f8d7 2098 	ldr.w	r2, [r7, #152]	@ 0x98
 80101d6:	66fa      	str	r2, [r7, #108]	@ 0x6c
 80101d8:	66bb      	str	r3, [r7, #104]	@ 0x68
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 80101da:	6eb9      	ldr	r1, [r7, #104]	@ 0x68
 80101dc:	6efa      	ldr	r2, [r7, #108]	@ 0x6c
 80101de:	e841 2300 	strex	r3, r2, [r1]
 80101e2:	667b      	str	r3, [r7, #100]	@ 0x64
   return(result);
 80101e4:	6e7b      	ldr	r3, [r7, #100]	@ 0x64
 80101e6:	2b00      	cmp	r3, #0
 80101e8:	d1e3      	bne.n	80101b2 <UART_RxISR_16BIT_FIFOEN+0x18e>

        /* Rx process is completed, restore huart->RxState to Ready */
        huart->RxState = HAL_UART_STATE_READY;
 80101ea:	687b      	ldr	r3, [r7, #4]
 80101ec:	2220      	movs	r2, #32
 80101ee:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c

        /* Clear RxISR function pointer */
        huart->RxISR = NULL;
 80101f2:	687b      	ldr	r3, [r7, #4]
 80101f4:	2200      	movs	r2, #0
 80101f6:	675a      	str	r2, [r3, #116]	@ 0x74

        /* Initialize type of RxEvent to Transfer Complete */
        huart->RxEventType = HAL_UART_RXEVENT_TC;
 80101f8:	687b      	ldr	r3, [r7, #4]
 80101fa:	2200      	movs	r2, #0
 80101fc:	671a      	str	r2, [r3, #112]	@ 0x70

        if (!(IS_LPUART_INSTANCE(huart->Instance)))
 80101fe:	687b      	ldr	r3, [r7, #4]
 8010200:	681b      	ldr	r3, [r3, #0]
 8010202:	4a60      	ldr	r2, [pc, #384]	@ (8010384 <UART_RxISR_16BIT_FIFOEN+0x360>)
 8010204:	4293      	cmp	r3, r2
 8010206:	d021      	beq.n	801024c <UART_RxISR_16BIT_FIFOEN+0x228>
        {
          /* Check that USART RTOEN bit is set */
          if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
 8010208:	687b      	ldr	r3, [r7, #4]
 801020a:	681b      	ldr	r3, [r3, #0]
 801020c:	685b      	ldr	r3, [r3, #4]
 801020e:	f403 0300 	and.w	r3, r3, #8388608	@ 0x800000
 8010212:	2b00      	cmp	r3, #0
 8010214:	d01a      	beq.n	801024c <UART_RxISR_16BIT_FIFOEN+0x228>
          {
            /* Enable the UART Receiver Timeout Interrupt */
            ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
 8010216:	687b      	ldr	r3, [r7, #4]
 8010218:	681b      	ldr	r3, [r3, #0]
 801021a:	64fb      	str	r3, [r7, #76]	@ 0x4c
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 801021c:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 801021e:	e853 3f00 	ldrex	r3, [r3]
 8010222:	64bb      	str	r3, [r7, #72]	@ 0x48
   return(result);
 8010224:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 8010226:	f023 6380 	bic.w	r3, r3, #67108864	@ 0x4000000
 801022a:	f8c7 3094 	str.w	r3, [r7, #148]	@ 0x94
 801022e:	687b      	ldr	r3, [r7, #4]
 8010230:	681b      	ldr	r3, [r3, #0]
 8010232:	461a      	mov	r2, r3
 8010234:	f8d7 3094 	ldr.w	r3, [r7, #148]	@ 0x94
 8010238:	65bb      	str	r3, [r7, #88]	@ 0x58
 801023a:	657a      	str	r2, [r7, #84]	@ 0x54
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 801023c:	6d79      	ldr	r1, [r7, #84]	@ 0x54
 801023e:	6dba      	ldr	r2, [r7, #88]	@ 0x58
 8010240:	e841 2300 	strex	r3, r2, [r1]
 8010244:	653b      	str	r3, [r7, #80]	@ 0x50
   return(result);
 8010246:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8010248:	2b00      	cmp	r3, #0
 801024a:	d1e4      	bne.n	8010216 <UART_RxISR_16BIT_FIFOEN+0x1f2>
          }
        }

        /* Check current reception Mode :
           If Reception till IDLE event has been selected : */
        if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 801024c:	687b      	ldr	r3, [r7, #4]
 801024e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8010250:	2b01      	cmp	r3, #1
 8010252:	d130      	bne.n	80102b6 <UART_RxISR_16BIT_FIFOEN+0x292>
        {
          /* Set reception type to Standard */
          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
 8010254:	687b      	ldr	r3, [r7, #4]
 8010256:	2200      	movs	r2, #0
 8010258:	66da      	str	r2, [r3, #108]	@ 0x6c

          /* Disable IDLE interrupt */
          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 801025a:	687b      	ldr	r3, [r7, #4]
 801025c:	681b      	ldr	r3, [r3, #0]
 801025e:	63bb      	str	r3, [r7, #56]	@ 0x38
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 8010260:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8010262:	e853 3f00 	ldrex	r3, [r3]
 8010266:	637b      	str	r3, [r7, #52]	@ 0x34
   return(result);
 8010268:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801026a:	f023 0310 	bic.w	r3, r3, #16
 801026e:	f8c7 3090 	str.w	r3, [r7, #144]	@ 0x90
 8010272:	687b      	ldr	r3, [r7, #4]
 8010274:	681b      	ldr	r3, [r3, #0]
 8010276:	461a      	mov	r2, r3
 8010278:	f8d7 3090 	ldr.w	r3, [r7, #144]	@ 0x90
 801027c:	647b      	str	r3, [r7, #68]	@ 0x44
 801027e:	643a      	str	r2, [r7, #64]	@ 0x40
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 8010280:	6c39      	ldr	r1, [r7, #64]	@ 0x40
 8010282:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8010284:	e841 2300 	strex	r3, r2, [r1]
 8010288:	63fb      	str	r3, [r7, #60]	@ 0x3c
   return(result);
 801028a:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801028c:	2b00      	cmp	r3, #0
 801028e:	d1e4      	bne.n	801025a <UART_RxISR_16BIT_FIFOEN+0x236>

          if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
 8010290:	687b      	ldr	r3, [r7, #4]
 8010292:	681b      	ldr	r3, [r3, #0]
 8010294:	69db      	ldr	r3, [r3, #28]
 8010296:	f003 0310 	and.w	r3, r3, #16
 801029a:	2b10      	cmp	r3, #16
 801029c:	d103      	bne.n	80102a6 <UART_RxISR_16BIT_FIFOEN+0x282>
          {
            /* Clear IDLE Flag */
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 801029e:	687b      	ldr	r3, [r7, #4]
 80102a0:	681b      	ldr	r3, [r3, #0]
 80102a2:	2210      	movs	r2, #16
 80102a4:	621a      	str	r2, [r3, #32]
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx Event callback*/
          huart->RxEventCallback(huart, huart->RxXferSize);
#else
          /*Call legacy weak Rx Event callback*/
          HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
 80102a6:	687b      	ldr	r3, [r7, #4]
 80102a8:	f8b3 305c 	ldrh.w	r3, [r3, #92]	@ 0x5c
 80102ac:	4619      	mov	r1, r3
 80102ae:	6878      	ldr	r0, [r7, #4]
 80102b0:	f7f4 face 	bl	8004850 <HAL_UARTEx_RxEventCallback>
 80102b4:	e002      	b.n	80102bc <UART_RxISR_16BIT_FIFOEN+0x298>
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
          /*Call registered Rx complete callback*/
          huart->RxCpltCallback(huart);
#else
          /*Call legacy weak Rx complete callback*/
          HAL_UART_RxCpltCallback(huart);
 80102b6:	6878      	ldr	r0, [r7, #4]
 80102b8:	f7f4 fac0 	bl	800483c <HAL_UART_RxCpltCallback>
    while ((nb_rx_data > 0U) && ((isrflags & USART_ISR_RXNE_RXFNE) != 0U))
 80102bc:	f8b7 30a6 	ldrh.w	r3, [r7, #166]	@ 0xa6
 80102c0:	2b00      	cmp	r3, #0
 80102c2:	d006      	beq.n	80102d2 <UART_RxISR_16BIT_FIFOEN+0x2ae>
 80102c4:	f8d7 30b4 	ldr.w	r3, [r7, #180]	@ 0xb4
 80102c8:	f003 0320 	and.w	r3, r3, #32
 80102cc:	2b00      	cmp	r3, #0
 80102ce:	f47f aecd 	bne.w	801006c <UART_RxISR_16BIT_FIFOEN+0x48>

    /* When remaining number of bytes to receive is less than the RX FIFO
    threshold, next incoming frames are processed as if FIFO mode was
    disabled (i.e. one interrupt per received frame).
    */
    rxdatacount = huart->RxXferCount;
 80102d2:	687b      	ldr	r3, [r7, #4]
 80102d4:	f8b3 305e 	ldrh.w	r3, [r3, #94]	@ 0x5e
 80102d8:	f8a7 308e 	strh.w	r3, [r7, #142]	@ 0x8e
    if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
 80102dc:	f8b7 308e 	ldrh.w	r3, [r7, #142]	@ 0x8e
 80102e0:	2b00      	cmp	r3, #0
 80102e2:	d049      	beq.n	8010378 <UART_RxISR_16BIT_FIFOEN+0x354>
 80102e4:	687b      	ldr	r3, [r7, #4]
 80102e6:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 80102ea:	f8b7 208e 	ldrh.w	r2, [r7, #142]	@ 0x8e
 80102ee:	429a      	cmp	r2, r3
 80102f0:	d242      	bcs.n	8010378 <UART_RxISR_16BIT_FIFOEN+0x354>
    {
      /* Disable the UART RXFT interrupt*/
      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
 80102f2:	687b      	ldr	r3, [r7, #4]
 80102f4:	681b      	ldr	r3, [r3, #0]
 80102f6:	3308      	adds	r3, #8
 80102f8:	627b      	str	r3, [r7, #36]	@ 0x24
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 80102fa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80102fc:	e853 3f00 	ldrex	r3, [r3]
 8010300:	623b      	str	r3, [r7, #32]
   return(result);
 8010302:	6a3b      	ldr	r3, [r7, #32]
 8010304:	f023 5380 	bic.w	r3, r3, #268435456	@ 0x10000000
 8010308:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
 801030c:	687b      	ldr	r3, [r7, #4]
 801030e:	681b      	ldr	r3, [r3, #0]
 8010310:	3308      	adds	r3, #8
 8010312:	f8d7 2088 	ldr.w	r2, [r7, #136]	@ 0x88
 8010316:	633a      	str	r2, [r7, #48]	@ 0x30
 8010318:	62fb      	str	r3, [r7, #44]	@ 0x2c
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 801031a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 801031c:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801031e:	e841 2300 	strex	r3, r2, [r1]
 8010322:	62bb      	str	r3, [r7, #40]	@ 0x28
   return(result);
 8010324:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8010326:	2b00      	cmp	r3, #0
 8010328:	d1e3      	bne.n	80102f2 <UART_RxISR_16BIT_FIFOEN+0x2ce>

      /* Update the RxISR function pointer */
      huart->RxISR = UART_RxISR_16BIT;
 801032a:	687b      	ldr	r3, [r7, #4]
 801032c:	4a16      	ldr	r2, [pc, #88]	@ (8010388 <UART_RxISR_16BIT_FIFOEN+0x364>)
 801032e:	675a      	str	r2, [r3, #116]	@ 0x74

      /* Enable the UART Data Register Not Empty interrupt */
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
 8010330:	687b      	ldr	r3, [r7, #4]
 8010332:	681b      	ldr	r3, [r3, #0]
 8010334:	613b      	str	r3, [r7, #16]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 8010336:	693b      	ldr	r3, [r7, #16]
 8010338:	e853 3f00 	ldrex	r3, [r3]
 801033c:	60fb      	str	r3, [r7, #12]
   return(result);
 801033e:	68fb      	ldr	r3, [r7, #12]
 8010340:	f043 0320 	orr.w	r3, r3, #32
 8010344:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 8010348:	687b      	ldr	r3, [r7, #4]
 801034a:	681b      	ldr	r3, [r3, #0]
 801034c:	461a      	mov	r2, r3
 801034e:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 8010352:	61fb      	str	r3, [r7, #28]
 8010354:	61ba      	str	r2, [r7, #24]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 8010356:	69b9      	ldr	r1, [r7, #24]
 8010358:	69fa      	ldr	r2, [r7, #28]
 801035a:	e841 2300 	strex	r3, r2, [r1]
 801035e:	617b      	str	r3, [r7, #20]
   return(result);
 8010360:	697b      	ldr	r3, [r7, #20]
 8010362:	2b00      	cmp	r3, #0
 8010364:	d1e4      	bne.n	8010330 <UART_RxISR_16BIT_FIFOEN+0x30c>
  else
  {
    /* Clear RXNE interrupt flag */
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
  }
}
 8010366:	e007      	b.n	8010378 <UART_RxISR_16BIT_FIFOEN+0x354>
    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
 8010368:	687b      	ldr	r3, [r7, #4]
 801036a:	681b      	ldr	r3, [r3, #0]
 801036c:	699a      	ldr	r2, [r3, #24]
 801036e:	687b      	ldr	r3, [r7, #4]
 8010370:	681b      	ldr	r3, [r3, #0]
 8010372:	f042 0208 	orr.w	r2, r2, #8
 8010376:	619a      	str	r2, [r3, #24]
}
 8010378:	bf00      	nop
 801037a:	37b8      	adds	r7, #184	@ 0xb8
 801037c:	46bd      	mov	sp, r7
 801037e:	bd80      	pop	{r7, pc}
 8010380:	effffffe 	.word	0xeffffffe
 8010384:	58000c00 	.word	0x58000c00
 8010388:	0800fb0d 	.word	0x0800fb0d

0801038c <HAL_UARTEx_WakeupCallback>:
  * @brief UART wakeup from Stop mode callback.
  * @param huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
{
 801038c:	b480      	push	{r7}
 801038e:	b083      	sub	sp, #12
 8010390:	af00      	add	r7, sp, #0
 8010392:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_WakeupCallback can be implemented in the user file.
   */
}
 8010394:	bf00      	nop
 8010396:	370c      	adds	r7, #12
 8010398:	46bd      	mov	sp, r7
 801039a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801039e:	4770      	bx	lr

080103a0 <HAL_UARTEx_RxFifoFullCallback>:
  * @brief  UART RX Fifo full callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
{
 80103a0:	b480      	push	{r7}
 80103a2:	b083      	sub	sp, #12
 80103a4:	af00      	add	r7, sp, #0
 80103a6:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_RxFifoFullCallback can be implemented in the user file.
   */
}
 80103a8:	bf00      	nop
 80103aa:	370c      	adds	r7, #12
 80103ac:	46bd      	mov	sp, r7
 80103ae:	f85d 7b04 	ldr.w	r7, [sp], #4
 80103b2:	4770      	bx	lr

080103b4 <HAL_UARTEx_TxFifoEmptyCallback>:
  * @brief  UART TX Fifo empty callback.
  * @param  huart UART handle.
  * @retval None
  */
__weak void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
{
 80103b4:	b480      	push	{r7}
 80103b6:	b083      	sub	sp, #12
 80103b8:	af00      	add	r7, sp, #0
 80103ba:	6078      	str	r0, [r7, #4]
  UNUSED(huart);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_UARTEx_TxFifoEmptyCallback can be implemented in the user file.
   */
}
 80103bc:	bf00      	nop
 80103be:	370c      	adds	r7, #12
 80103c0:	46bd      	mov	sp, r7
 80103c2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80103c6:	4770      	bx	lr

080103c8 <HAL_UARTEx_DisableFifoMode>:
  * @brief  Disable the FIFO mode.
  * @param huart      UART handle.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
{
 80103c8:	b480      	push	{r7}
 80103ca:	b085      	sub	sp, #20
 80103cc:	af00      	add	r7, sp, #0
 80103ce:	6078      	str	r0, [r7, #4]

  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));

  /* Process Locked */
  __HAL_LOCK(huart);
 80103d0:	687b      	ldr	r3, [r7, #4]
 80103d2:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 80103d6:	2b01      	cmp	r3, #1
 80103d8:	d101      	bne.n	80103de <HAL_UARTEx_DisableFifoMode+0x16>
 80103da:	2302      	movs	r3, #2
 80103dc:	e027      	b.n	801042e <HAL_UARTEx_DisableFifoMode+0x66>
 80103de:	687b      	ldr	r3, [r7, #4]
 80103e0:	2201      	movs	r2, #1
 80103e2:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 80103e6:	687b      	ldr	r3, [r7, #4]
 80103e8:	2224      	movs	r2, #36	@ 0x24
 80103ea:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 80103ee:	687b      	ldr	r3, [r7, #4]
 80103f0:	681b      	ldr	r3, [r3, #0]
 80103f2:	681b      	ldr	r3, [r3, #0]
 80103f4:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 80103f6:	687b      	ldr	r3, [r7, #4]
 80103f8:	681b      	ldr	r3, [r3, #0]
 80103fa:	681a      	ldr	r2, [r3, #0]
 80103fc:	687b      	ldr	r3, [r7, #4]
 80103fe:	681b      	ldr	r3, [r3, #0]
 8010400:	f022 0201 	bic.w	r2, r2, #1
 8010404:	601a      	str	r2, [r3, #0]

  /* Enable FIFO mode */
  CLEAR_BIT(tmpcr1, USART_CR1_FIFOEN);
 8010406:	68fb      	ldr	r3, [r7, #12]
 8010408:	f023 5300 	bic.w	r3, r3, #536870912	@ 0x20000000
 801040c:	60fb      	str	r3, [r7, #12]
  huart->FifoMode = UART_FIFOMODE_DISABLE;
 801040e:	687b      	ldr	r3, [r7, #4]
 8010410:	2200      	movs	r2, #0
 8010412:	665a      	str	r2, [r3, #100]	@ 0x64

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 8010414:	687b      	ldr	r3, [r7, #4]
 8010416:	681b      	ldr	r3, [r3, #0]
 8010418:	68fa      	ldr	r2, [r7, #12]
 801041a:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 801041c:	687b      	ldr	r3, [r7, #4]
 801041e:	2220      	movs	r2, #32
 8010420:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 8010424:	687b      	ldr	r3, [r7, #4]
 8010426:	2200      	movs	r2, #0
 8010428:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 801042c:	2300      	movs	r3, #0
}
 801042e:	4618      	mov	r0, r3
 8010430:	3714      	adds	r7, #20
 8010432:	46bd      	mov	sp, r7
 8010434:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010438:	4770      	bx	lr

0801043a <HAL_UARTEx_SetTxFifoThreshold>:
  *            @arg @ref UART_TXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_TXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 801043a:	b580      	push	{r7, lr}
 801043c:	b084      	sub	sp, #16
 801043e:	af00      	add	r7, sp, #0
 8010440:	6078      	str	r0, [r7, #4]
 8010442:	6039      	str	r1, [r7, #0]
  /* Check parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_TXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 8010444:	687b      	ldr	r3, [r7, #4]
 8010446:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 801044a:	2b01      	cmp	r3, #1
 801044c:	d101      	bne.n	8010452 <HAL_UARTEx_SetTxFifoThreshold+0x18>
 801044e:	2302      	movs	r3, #2
 8010450:	e02d      	b.n	80104ae <HAL_UARTEx_SetTxFifoThreshold+0x74>
 8010452:	687b      	ldr	r3, [r7, #4]
 8010454:	2201      	movs	r2, #1
 8010456:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 801045a:	687b      	ldr	r3, [r7, #4]
 801045c:	2224      	movs	r2, #36	@ 0x24
 801045e:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 8010462:	687b      	ldr	r3, [r7, #4]
 8010464:	681b      	ldr	r3, [r3, #0]
 8010466:	681b      	ldr	r3, [r3, #0]
 8010468:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 801046a:	687b      	ldr	r3, [r7, #4]
 801046c:	681b      	ldr	r3, [r3, #0]
 801046e:	681a      	ldr	r2, [r3, #0]
 8010470:	687b      	ldr	r3, [r7, #4]
 8010472:	681b      	ldr	r3, [r3, #0]
 8010474:	f022 0201 	bic.w	r2, r2, #1
 8010478:	601a      	str	r2, [r3, #0]

  /* Update TX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_TXFTCFG, Threshold);
 801047a:	687b      	ldr	r3, [r7, #4]
 801047c:	681b      	ldr	r3, [r3, #0]
 801047e:	689b      	ldr	r3, [r3, #8]
 8010480:	f023 4160 	bic.w	r1, r3, #3758096384	@ 0xe0000000
 8010484:	687b      	ldr	r3, [r7, #4]
 8010486:	681b      	ldr	r3, [r3, #0]
 8010488:	683a      	ldr	r2, [r7, #0]
 801048a:	430a      	orrs	r2, r1
 801048c:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 801048e:	6878      	ldr	r0, [r7, #4]
 8010490:	f000 f8a0 	bl	80105d4 <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 8010494:	687b      	ldr	r3, [r7, #4]
 8010496:	681b      	ldr	r3, [r3, #0]
 8010498:	68fa      	ldr	r2, [r7, #12]
 801049a:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 801049c:	687b      	ldr	r3, [r7, #4]
 801049e:	2220      	movs	r2, #32
 80104a0:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 80104a4:	687b      	ldr	r3, [r7, #4]
 80104a6:	2200      	movs	r2, #0
 80104a8:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 80104ac:	2300      	movs	r3, #0
}
 80104ae:	4618      	mov	r0, r3
 80104b0:	3710      	adds	r7, #16
 80104b2:	46bd      	mov	sp, r7
 80104b4:	bd80      	pop	{r7, pc}

080104b6 <HAL_UARTEx_SetRxFifoThreshold>:
  *            @arg @ref UART_RXFIFO_THRESHOLD_7_8
  *            @arg @ref UART_RXFIFO_THRESHOLD_8_8
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
{
 80104b6:	b580      	push	{r7, lr}
 80104b8:	b084      	sub	sp, #16
 80104ba:	af00      	add	r7, sp, #0
 80104bc:	6078      	str	r0, [r7, #4]
 80104be:	6039      	str	r1, [r7, #0]
  /* Check the parameters */
  assert_param(IS_UART_FIFO_INSTANCE(huart->Instance));
  assert_param(IS_UART_RXFIFO_THRESHOLD(Threshold));

  /* Process Locked */
  __HAL_LOCK(huart);
 80104c0:	687b      	ldr	r3, [r7, #4]
 80104c2:	f893 3084 	ldrb.w	r3, [r3, #132]	@ 0x84
 80104c6:	2b01      	cmp	r3, #1
 80104c8:	d101      	bne.n	80104ce <HAL_UARTEx_SetRxFifoThreshold+0x18>
 80104ca:	2302      	movs	r3, #2
 80104cc:	e02d      	b.n	801052a <HAL_UARTEx_SetRxFifoThreshold+0x74>
 80104ce:	687b      	ldr	r3, [r7, #4]
 80104d0:	2201      	movs	r2, #1
 80104d2:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  huart->gState = HAL_UART_STATE_BUSY;
 80104d6:	687b      	ldr	r3, [r7, #4]
 80104d8:	2224      	movs	r2, #36	@ 0x24
 80104da:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Save actual UART configuration */
  tmpcr1 = READ_REG(huart->Instance->CR1);
 80104de:	687b      	ldr	r3, [r7, #4]
 80104e0:	681b      	ldr	r3, [r3, #0]
 80104e2:	681b      	ldr	r3, [r3, #0]
 80104e4:	60fb      	str	r3, [r7, #12]

  /* Disable UART */
  __HAL_UART_DISABLE(huart);
 80104e6:	687b      	ldr	r3, [r7, #4]
 80104e8:	681b      	ldr	r3, [r3, #0]
 80104ea:	681a      	ldr	r2, [r3, #0]
 80104ec:	687b      	ldr	r3, [r7, #4]
 80104ee:	681b      	ldr	r3, [r3, #0]
 80104f0:	f022 0201 	bic.w	r2, r2, #1
 80104f4:	601a      	str	r2, [r3, #0]

  /* Update RX threshold configuration */
  MODIFY_REG(huart->Instance->CR3, USART_CR3_RXFTCFG, Threshold);
 80104f6:	687b      	ldr	r3, [r7, #4]
 80104f8:	681b      	ldr	r3, [r3, #0]
 80104fa:	689b      	ldr	r3, [r3, #8]
 80104fc:	f023 6160 	bic.w	r1, r3, #234881024	@ 0xe000000
 8010500:	687b      	ldr	r3, [r7, #4]
 8010502:	681b      	ldr	r3, [r3, #0]
 8010504:	683a      	ldr	r2, [r7, #0]
 8010506:	430a      	orrs	r2, r1
 8010508:	609a      	str	r2, [r3, #8]

  /* Determine the number of data to process during RX/TX ISR execution */
  UARTEx_SetNbDataToProcess(huart);
 801050a:	6878      	ldr	r0, [r7, #4]
 801050c:	f000 f862 	bl	80105d4 <UARTEx_SetNbDataToProcess>

  /* Restore UART configuration */
  WRITE_REG(huart->Instance->CR1, tmpcr1);
 8010510:	687b      	ldr	r3, [r7, #4]
 8010512:	681b      	ldr	r3, [r3, #0]
 8010514:	68fa      	ldr	r2, [r7, #12]
 8010516:	601a      	str	r2, [r3, #0]

  huart->gState = HAL_UART_STATE_READY;
 8010518:	687b      	ldr	r3, [r7, #4]
 801051a:	2220      	movs	r2, #32
 801051c:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88

  /* Process Unlocked */
  __HAL_UNLOCK(huart);
 8010520:	687b      	ldr	r3, [r7, #4]
 8010522:	2200      	movs	r2, #0
 8010524:	f883 2084 	strb.w	r2, [r3, #132]	@ 0x84

  return HAL_OK;
 8010528:	2300      	movs	r3, #0
}
 801052a:	4618      	mov	r0, r3
 801052c:	3710      	adds	r7, #16
 801052e:	46bd      	mov	sp, r7
 8010530:	bd80      	pop	{r7, pc}

08010532 <HAL_UARTEx_ReceiveToIdle_IT>:
  * @param pData Pointer to data buffer (uint8_t or uint16_t data elements).
  * @param Size  Amount of data elements (uint8_t or uint16_t) to be received.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
{
 8010532:	b580      	push	{r7, lr}
 8010534:	b08c      	sub	sp, #48	@ 0x30
 8010536:	af00      	add	r7, sp, #0
 8010538:	60f8      	str	r0, [r7, #12]
 801053a:	60b9      	str	r1, [r7, #8]
 801053c:	4613      	mov	r3, r2
 801053e:	80fb      	strh	r3, [r7, #6]
  HAL_StatusTypeDef status = HAL_OK;
 8010540:	2300      	movs	r3, #0
 8010542:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f

  /* Check that a Rx process is not already ongoing */
  if (huart->RxState == HAL_UART_STATE_READY)
 8010546:	68fb      	ldr	r3, [r7, #12]
 8010548:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801054c:	2b20      	cmp	r3, #32
 801054e:	d13b      	bne.n	80105c8 <HAL_UARTEx_ReceiveToIdle_IT+0x96>
  {
    if ((pData == NULL) || (Size == 0U))
 8010550:	68bb      	ldr	r3, [r7, #8]
 8010552:	2b00      	cmp	r3, #0
 8010554:	d002      	beq.n	801055c <HAL_UARTEx_ReceiveToIdle_IT+0x2a>
 8010556:	88fb      	ldrh	r3, [r7, #6]
 8010558:	2b00      	cmp	r3, #0
 801055a:	d101      	bne.n	8010560 <HAL_UARTEx_ReceiveToIdle_IT+0x2e>
    {
      return HAL_ERROR;
 801055c:	2301      	movs	r3, #1
 801055e:	e034      	b.n	80105ca <HAL_UARTEx_ReceiveToIdle_IT+0x98>
    }

    /* Set Reception type to reception till IDLE Event*/
    huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE;
 8010560:	68fb      	ldr	r3, [r7, #12]
 8010562:	2201      	movs	r2, #1
 8010564:	66da      	str	r2, [r3, #108]	@ 0x6c
    huart->RxEventType = HAL_UART_RXEVENT_TC;
 8010566:	68fb      	ldr	r3, [r7, #12]
 8010568:	2200      	movs	r2, #0
 801056a:	671a      	str	r2, [r3, #112]	@ 0x70

    (void)UART_Start_Receive_IT(huart, pData, Size);
 801056c:	88fb      	ldrh	r3, [r7, #6]
 801056e:	461a      	mov	r2, r3
 8010570:	68b9      	ldr	r1, [r7, #8]
 8010572:	68f8      	ldr	r0, [r7, #12]
 8010574:	f7fe fe82 	bl	800f27c <UART_Start_Receive_IT>

    if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
 8010578:	68fb      	ldr	r3, [r7, #12]
 801057a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801057c:	2b01      	cmp	r3, #1
 801057e:	d11d      	bne.n	80105bc <HAL_UARTEx_ReceiveToIdle_IT+0x8a>
    {
      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
 8010580:	68fb      	ldr	r3, [r7, #12]
 8010582:	681b      	ldr	r3, [r3, #0]
 8010584:	2210      	movs	r2, #16
 8010586:	621a      	str	r2, [r3, #32]
      ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
 8010588:	68fb      	ldr	r3, [r7, #12]
 801058a:	681b      	ldr	r3, [r3, #0]
 801058c:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
 801058e:	69bb      	ldr	r3, [r7, #24]
 8010590:	e853 3f00 	ldrex	r3, [r3]
 8010594:	617b      	str	r3, [r7, #20]
   return(result);
 8010596:	697b      	ldr	r3, [r7, #20]
 8010598:	f043 0310 	orr.w	r3, r3, #16
 801059c:	62bb      	str	r3, [r7, #40]	@ 0x28
 801059e:	68fb      	ldr	r3, [r7, #12]
 80105a0:	681b      	ldr	r3, [r3, #0]
 80105a2:	461a      	mov	r2, r3
 80105a4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80105a6:	627b      	str	r3, [r7, #36]	@ 0x24
 80105a8:	623a      	str	r2, [r7, #32]
   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
 80105aa:	6a39      	ldr	r1, [r7, #32]
 80105ac:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80105ae:	e841 2300 	strex	r3, r2, [r1]
 80105b2:	61fb      	str	r3, [r7, #28]
   return(result);
 80105b4:	69fb      	ldr	r3, [r7, #28]
 80105b6:	2b00      	cmp	r3, #0
 80105b8:	d1e6      	bne.n	8010588 <HAL_UARTEx_ReceiveToIdle_IT+0x56>
 80105ba:	e002      	b.n	80105c2 <HAL_UARTEx_ReceiveToIdle_IT+0x90>
    {
      /* In case of errors already pending when reception is started,
         Interrupts may have already been raised and lead to reception abortion.
         (Overrun error for instance).
         In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */
      status = HAL_ERROR;
 80105bc:	2301      	movs	r3, #1
 80105be:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
    }

    return status;
 80105c2:	f897 302f 	ldrb.w	r3, [r7, #47]	@ 0x2f
 80105c6:	e000      	b.n	80105ca <HAL_UARTEx_ReceiveToIdle_IT+0x98>
  }
  else
  {
    return HAL_BUSY;
 80105c8:	2302      	movs	r3, #2
  }
}
 80105ca:	4618      	mov	r0, r3
 80105cc:	3730      	adds	r7, #48	@ 0x30
 80105ce:	46bd      	mov	sp, r7
 80105d0:	bd80      	pop	{r7, pc}
	...

080105d4 <UARTEx_SetNbDataToProcess>:
  *       the UART configuration registers.
  * @param huart UART handle.
  * @retval None
  */
static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart)
{
 80105d4:	b480      	push	{r7}
 80105d6:	b085      	sub	sp, #20
 80105d8:	af00      	add	r7, sp, #0
 80105da:	6078      	str	r0, [r7, #4]
  uint8_t rx_fifo_threshold;
  uint8_t tx_fifo_threshold;
  static const uint8_t numerator[] = {1U, 1U, 1U, 3U, 7U, 1U, 0U, 0U};
  static const uint8_t denominator[] = {8U, 4U, 2U, 4U, 8U, 1U, 1U, 1U};

  if (huart->FifoMode == UART_FIFOMODE_DISABLE)
 80105dc:	687b      	ldr	r3, [r7, #4]
 80105de:	6e5b      	ldr	r3, [r3, #100]	@ 0x64
 80105e0:	2b00      	cmp	r3, #0
 80105e2:	d108      	bne.n	80105f6 <UARTEx_SetNbDataToProcess+0x22>
  {
    huart->NbTxDataToProcess = 1U;
 80105e4:	687b      	ldr	r3, [r7, #4]
 80105e6:	2201      	movs	r2, #1
 80105e8:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = 1U;
 80105ec:	687b      	ldr	r3, [r7, #4]
 80105ee:	2201      	movs	r2, #1
 80105f0:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
                               (uint16_t)denominator[tx_fifo_threshold];
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
                               (uint16_t)denominator[rx_fifo_threshold];
  }
}
 80105f4:	e031      	b.n	801065a <UARTEx_SetNbDataToProcess+0x86>
    rx_fifo_depth = RX_FIFO_DEPTH;
 80105f6:	2310      	movs	r3, #16
 80105f8:	73fb      	strb	r3, [r7, #15]
    tx_fifo_depth = TX_FIFO_DEPTH;
 80105fa:	2310      	movs	r3, #16
 80105fc:	73bb      	strb	r3, [r7, #14]
    rx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
 80105fe:	687b      	ldr	r3, [r7, #4]
 8010600:	681b      	ldr	r3, [r3, #0]
 8010602:	689b      	ldr	r3, [r3, #8]
 8010604:	0e5b      	lsrs	r3, r3, #25
 8010606:	b2db      	uxtb	r3, r3
 8010608:	f003 0307 	and.w	r3, r3, #7
 801060c:	737b      	strb	r3, [r7, #13]
    tx_fifo_threshold = (uint8_t)(READ_BIT(huart->Instance->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
 801060e:	687b      	ldr	r3, [r7, #4]
 8010610:	681b      	ldr	r3, [r3, #0]
 8010612:	689b      	ldr	r3, [r3, #8]
 8010614:	0f5b      	lsrs	r3, r3, #29
 8010616:	b2db      	uxtb	r3, r3
 8010618:	f003 0307 	and.w	r3, r3, #7
 801061c:	733b      	strb	r3, [r7, #12]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 801061e:	7bbb      	ldrb	r3, [r7, #14]
 8010620:	7b3a      	ldrb	r2, [r7, #12]
 8010622:	4911      	ldr	r1, [pc, #68]	@ (8010668 <UARTEx_SetNbDataToProcess+0x94>)
 8010624:	5c8a      	ldrb	r2, [r1, r2]
 8010626:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[tx_fifo_threshold];
 801062a:	7b3a      	ldrb	r2, [r7, #12]
 801062c:	490f      	ldr	r1, [pc, #60]	@ (801066c <UARTEx_SetNbDataToProcess+0x98>)
 801062e:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbTxDataToProcess = ((uint16_t)tx_fifo_depth * numerator[tx_fifo_threshold]) /
 8010630:	fb93 f3f2 	sdiv	r3, r3, r2
 8010634:	b29a      	uxth	r2, r3
 8010636:	687b      	ldr	r3, [r7, #4]
 8010638:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 801063c:	7bfb      	ldrb	r3, [r7, #15]
 801063e:	7b7a      	ldrb	r2, [r7, #13]
 8010640:	4909      	ldr	r1, [pc, #36]	@ (8010668 <UARTEx_SetNbDataToProcess+0x94>)
 8010642:	5c8a      	ldrb	r2, [r1, r2]
 8010644:	fb02 f303 	mul.w	r3, r2, r3
                               (uint16_t)denominator[rx_fifo_threshold];
 8010648:	7b7a      	ldrb	r2, [r7, #13]
 801064a:	4908      	ldr	r1, [pc, #32]	@ (801066c <UARTEx_SetNbDataToProcess+0x98>)
 801064c:	5c8a      	ldrb	r2, [r1, r2]
    huart->NbRxDataToProcess = ((uint16_t)rx_fifo_depth * numerator[rx_fifo_threshold]) /
 801064e:	fb93 f3f2 	sdiv	r3, r3, r2
 8010652:	b29a      	uxth	r2, r3
 8010654:	687b      	ldr	r3, [r7, #4]
 8010656:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
}
 801065a:	bf00      	nop
 801065c:	3714      	adds	r7, #20
 801065e:	46bd      	mov	sp, r7
 8010660:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010664:	4770      	bx	lr
 8010666:	bf00      	nop
 8010668:	08031d3c 	.word	0x08031d3c
 801066c:	08031d44 	.word	0x08031d44

08010670 <tcpip_init_wrap>:
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 2 */
/* ETH_CODE: workaround to call LOCK_TCPIP_CORE after tcpip_init in MX_LWIP_Init
 * This is to keep the code after MX code re-generation */
static inline void tcpip_init_wrap(tcpip_init_done_fn tcpip_init_done, void *arg){
 8010670:	b580      	push	{r7, lr}
 8010672:	b082      	sub	sp, #8
 8010674:	af00      	add	r7, sp, #0
 8010676:	6078      	str	r0, [r7, #4]
 8010678:	6039      	str	r1, [r7, #0]
	tcpip_init(tcpip_init_done, arg);
 801067a:	6839      	ldr	r1, [r7, #0]
 801067c:	6878      	ldr	r0, [r7, #4]
 801067e:	f009 fa49 	bl	8019b14 <tcpip_init>
	LOCK_TCPIP_CORE();
 8010682:	f000 fda1 	bl	80111c8 <sys_lock_tcpip_core>
}
 8010686:	bf00      	nop
 8010688:	3708      	adds	r7, #8
 801068a:	46bd      	mov	sp, r7
 801068c:	bd80      	pop	{r7, pc}
	...

08010690 <is_link_up>:
#define tcpip_init tcpip_init_wrap

uint8_t is_link_up(void)
{
 8010690:	b480      	push	{r7}
 8010692:	af00      	add	r7, sp, #0
	return netif_is_up(&gnetif);
 8010694:	4b05      	ldr	r3, [pc, #20]	@ (80106ac <is_link_up+0x1c>)
 8010696:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801069a:	f003 0301 	and.w	r3, r3, #1
 801069e:	b2db      	uxtb	r3, r3
}
 80106a0:	4618      	mov	r0, r3
 80106a2:	46bd      	mov	sp, r7
 80106a4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80106a8:	4770      	bx	lr
 80106aa:	bf00      	nop
 80106ac:	24002294 	.word	0x24002294

080106b0 <MX_LWIP_Init>:

/**
  * LwIP initialization function
  */
void MX_LWIP_Init(void)
{
 80106b0:	b580      	push	{r7, lr}
 80106b2:	b084      	sub	sp, #16
 80106b4:	af04      	add	r7, sp, #16
  /* IP addresses initialization without DHCP (IPv4) */
	ipaddr_aton(STATIC_IP, &ipaddr);
	ipaddr_aton(STATIC_MASK, &netmask);
	ipaddr_aton(STATIC_GW, &gw);
#else
    ip_addr_set_zero_ip4(&ipaddr);
 80106b6:	4b27      	ldr	r3, [pc, #156]	@ (8010754 <MX_LWIP_Init+0xa4>)
 80106b8:	2200      	movs	r2, #0
 80106ba:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&netmask);
 80106bc:	4b26      	ldr	r3, [pc, #152]	@ (8010758 <MX_LWIP_Init+0xa8>)
 80106be:	2200      	movs	r2, #0
 80106c0:	601a      	str	r2, [r3, #0]
    ip_addr_set_zero_ip4(&gw);
 80106c2:	4b26      	ldr	r3, [pc, #152]	@ (801075c <MX_LWIP_Init+0xac>)
 80106c4:	2200      	movs	r2, #0
 80106c6:	601a      	str	r2, [r3, #0]
#endif
	/* USER CODE END IP_ADDRESSES */

  /* Initilialize the LwIP stack with RTOS */
  tcpip_init( NULL, NULL );
 80106c8:	2100      	movs	r1, #0
 80106ca:	2000      	movs	r0, #0
 80106cc:	f7ff ffd0 	bl	8010670 <tcpip_init_wrap>
//  IP4_ADDR(&ipaddr, IP_ADDRESS[0], IP_ADDRESS[1], IP_ADDRESS[2], IP_ADDRESS[3]);
//  IP4_ADDR(&netmask, NETMASK_ADDRESS[0], NETMASK_ADDRESS[1] , NETMASK_ADDRESS[2], NETMASK_ADDRESS[3]);
//  IP4_ADDR(&gw, GATEWAY_ADDRESS[0], GATEWAY_ADDRESS[1], GATEWAY_ADDRESS[2], GATEWAY_ADDRESS[3]);

  /* add the network interface (IPv4/IPv6) with RTOS */
  netif_add(&gnetif, &ipaddr, &netmask, &gw, NULL, &ethernetif_init, &tcpip_input);
 80106d0:	4b23      	ldr	r3, [pc, #140]	@ (8010760 <MX_LWIP_Init+0xb0>)
 80106d2:	9302      	str	r3, [sp, #8]
 80106d4:	4b23      	ldr	r3, [pc, #140]	@ (8010764 <MX_LWIP_Init+0xb4>)
 80106d6:	9301      	str	r3, [sp, #4]
 80106d8:	2300      	movs	r3, #0
 80106da:	9300      	str	r3, [sp, #0]
 80106dc:	4b1f      	ldr	r3, [pc, #124]	@ (801075c <MX_LWIP_Init+0xac>)
 80106de:	4a1e      	ldr	r2, [pc, #120]	@ (8010758 <MX_LWIP_Init+0xa8>)
 80106e0:	491c      	ldr	r1, [pc, #112]	@ (8010754 <MX_LWIP_Init+0xa4>)
 80106e2:	4821      	ldr	r0, [pc, #132]	@ (8010768 <MX_LWIP_Init+0xb8>)
 80106e4:	f00a f886 	bl	801a7f4 <netif_add>

  /* Registers the default network interface */
  netif_set_default(&gnetif);
 80106e8:	481f      	ldr	r0, [pc, #124]	@ (8010768 <MX_LWIP_Init+0xb8>)
 80106ea:	f00a fa41 	bl	801ab70 <netif_set_default>

  if (netif_is_link_up(&gnetif))
 80106ee:	4b1e      	ldr	r3, [pc, #120]	@ (8010768 <MX_LWIP_Init+0xb8>)
 80106f0:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80106f4:	089b      	lsrs	r3, r3, #2
 80106f6:	f003 0301 	and.w	r3, r3, #1
 80106fa:	b2db      	uxtb	r3, r3
 80106fc:	2b00      	cmp	r3, #0
 80106fe:	d003      	beq.n	8010708 <MX_LWIP_Init+0x58>
  {
    /* When the netif is fully configured this function must be called */
    netif_set_up(&gnetif);
 8010700:	4819      	ldr	r0, [pc, #100]	@ (8010768 <MX_LWIP_Init+0xb8>)
 8010702:	f00a fa45 	bl	801ab90 <netif_set_up>
 8010706:	e002      	b.n	801070e <MX_LWIP_Init+0x5e>
  }
  else
  {
    /* When the netif link is down this function must be called */
    netif_set_down(&gnetif);
 8010708:	4817      	ldr	r0, [pc, #92]	@ (8010768 <MX_LWIP_Init+0xb8>)
 801070a:	f00a faaf 	bl	801ac6c <netif_set_down>
  }

  /* Set the link callback function, this function is called on change of link status*/
  netif_set_link_callback(&gnetif, ethernet_link_status_updated);
 801070e:	4917      	ldr	r1, [pc, #92]	@ (801076c <MX_LWIP_Init+0xbc>)
 8010710:	4815      	ldr	r0, [pc, #84]	@ (8010768 <MX_LWIP_Init+0xb8>)
 8010712:	f00a fb4b 	bl	801adac <netif_set_link_callback>

  /* Create the Ethernet link handler thread */
/* USER CODE BEGIN H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 8010716:	2224      	movs	r2, #36	@ 0x24
 8010718:	2100      	movs	r1, #0
 801071a:	4815      	ldr	r0, [pc, #84]	@ (8010770 <MX_LWIP_Init+0xc0>)
 801071c:	f01a fb30 	bl	802ad80 <memset>
  attributes.name = "EthLink";
 8010720:	4b13      	ldr	r3, [pc, #76]	@ (8010770 <MX_LWIP_Init+0xc0>)
 8010722:	4a14      	ldr	r2, [pc, #80]	@ (8010774 <MX_LWIP_Init+0xc4>)
 8010724:	601a      	str	r2, [r3, #0]
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE * 2;
 8010726:	4b12      	ldr	r3, [pc, #72]	@ (8010770 <MX_LWIP_Init+0xc0>)
 8010728:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 801072c:	615a      	str	r2, [r3, #20]
  attributes.priority = osPriorityBelowNormal;
 801072e:	4b10      	ldr	r3, [pc, #64]	@ (8010770 <MX_LWIP_Init+0xc0>)
 8010730:	2210      	movs	r2, #16
 8010732:	619a      	str	r2, [r3, #24]
  osThreadNew(ethernet_link_thread, &gnetif, &attributes);
 8010734:	4a0e      	ldr	r2, [pc, #56]	@ (8010770 <MX_LWIP_Init+0xc0>)
 8010736:	490c      	ldr	r1, [pc, #48]	@ (8010768 <MX_LWIP_Init+0xb8>)
 8010738:	480f      	ldr	r0, [pc, #60]	@ (8010778 <MX_LWIP_Init+0xc8>)
 801073a:	f000 feee 	bl	801151a <osThreadNew>
/* USER CODE END H7_OS_THREAD_NEW_CMSIS_RTOS_V2 */

/* USER CODE BEGIN 3 */
  /* Start DHCP negotiation for a network interface (IPv4) */
#if USE_DHCP
  netif_set_up(&gnetif);
 801073e:	480a      	ldr	r0, [pc, #40]	@ (8010768 <MX_LWIP_Init+0xb8>)
 8010740:	f00a fa26 	bl	801ab90 <netif_set_up>
  dhcp_start(&gnetif);
 8010744:	4808      	ldr	r0, [pc, #32]	@ (8010768 <MX_LWIP_Init+0xb8>)
 8010746:	f012 fd13 	bl	8023170 <dhcp_start>
#else
  netif_set_addr(&gnetif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
#endif
  /* ETH_CODE: call UNLOCK_TCPIP_CORE after we are done */
  UNLOCK_TCPIP_CORE();
 801074a:	f000 fd4d 	bl	80111e8 <sys_unlock_tcpip_core>

/* USER CODE END 3 */
}
 801074e:	bf00      	nop
 8010750:	46bd      	mov	sp, r7
 8010752:	bd80      	pop	{r7, pc}
 8010754:	240022cc 	.word	0x240022cc
 8010758:	240022d0 	.word	0x240022d0
 801075c:	240022d4 	.word	0x240022d4
 8010760:	08019a2d 	.word	0x08019a2d
 8010764:	08010c31 	.word	0x08010c31
 8010768:	24002294 	.word	0x24002294
 801076c:	0801077d 	.word	0x0801077d
 8010770:	240022d8 	.word	0x240022d8
 8010774:	0802dc50 	.word	0x0802dc50
 8010778:	08010f01 	.word	0x08010f01

0801077c <ethernet_link_status_updated>:
  * @brief  Notify the User about the network interface config status
  * @param  netif: the network interface
  * @retval None
  */
static void ethernet_link_status_updated(struct netif *netif)
{
 801077c:	b480      	push	{r7}
 801077e:	b083      	sub	sp, #12
 8010780:	af00      	add	r7, sp, #0
 8010782:	6078      	str	r0, [r7, #4]
  else /* netif is down */
  {
/* USER CODE BEGIN 6 */
/* USER CODE END 6 */
  }
}
 8010784:	bf00      	nop
 8010786:	370c      	adds	r7, #12
 8010788:	46bd      	mov	sp, r7
 801078a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801078e:	4770      	bx	lr

08010790 <HAL_ETH_RxCpltCallback>:
  * @brief  Ethernet Rx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 8010790:	b580      	push	{r7, lr}
 8010792:	b082      	sub	sp, #8
 8010794:	af00      	add	r7, sp, #0
 8010796:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(RxPktSemaphore);
 8010798:	4b04      	ldr	r3, [pc, #16]	@ (80107ac <HAL_ETH_RxCpltCallback+0x1c>)
 801079a:	681b      	ldr	r3, [r3, #0]
 801079c:	4618      	mov	r0, r3
 801079e:	f001 fa55 	bl	8011c4c <osSemaphoreRelease>
}
 80107a2:	bf00      	nop
 80107a4:	3708      	adds	r7, #8
 80107a6:	46bd      	mov	sp, r7
 80107a8:	bd80      	pop	{r7, pc}
 80107aa:	bf00      	nop
 80107ac:	24002304 	.word	0x24002304

080107b0 <HAL_ETH_TxCpltCallback>:
  * @brief  Ethernet Tx Transfer completed callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *handlerEth)
{
 80107b0:	b580      	push	{r7, lr}
 80107b2:	b082      	sub	sp, #8
 80107b4:	af00      	add	r7, sp, #0
 80107b6:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(TxPktSemaphore);
 80107b8:	4b04      	ldr	r3, [pc, #16]	@ (80107cc <HAL_ETH_TxCpltCallback+0x1c>)
 80107ba:	681b      	ldr	r3, [r3, #0]
 80107bc:	4618      	mov	r0, r3
 80107be:	f001 fa45 	bl	8011c4c <osSemaphoreRelease>
}
 80107c2:	bf00      	nop
 80107c4:	3708      	adds	r7, #8
 80107c6:	46bd      	mov	sp, r7
 80107c8:	bd80      	pop	{r7, pc}
 80107ca:	bf00      	nop
 80107cc:	24002308 	.word	0x24002308

080107d0 <HAL_ETH_ErrorCallback>:
  * @brief  Ethernet DMA transfer error callback
  * @param  handlerEth: ETH handler
  * @retval None
  */
void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *handlerEth)
{
 80107d0:	b580      	push	{r7, lr}
 80107d2:	b082      	sub	sp, #8
 80107d4:	af00      	add	r7, sp, #0
 80107d6:	6078      	str	r0, [r7, #4]
  if((HAL_ETH_GetDMAError(handlerEth) & ETH_DMACSR_RBU) == ETH_DMACSR_RBU)
 80107d8:	6878      	ldr	r0, [r7, #4]
 80107da:	f7f8 fead 	bl	8009538 <HAL_ETH_GetDMAError>
 80107de:	4603      	mov	r3, r0
 80107e0:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 80107e4:	2b80      	cmp	r3, #128	@ 0x80
 80107e6:	d104      	bne.n	80107f2 <HAL_ETH_ErrorCallback+0x22>
  {
     osSemaphoreRelease(RxPktSemaphore);
 80107e8:	4b04      	ldr	r3, [pc, #16]	@ (80107fc <HAL_ETH_ErrorCallback+0x2c>)
 80107ea:	681b      	ldr	r3, [r3, #0]
 80107ec:	4618      	mov	r0, r3
 80107ee:	f001 fa2d 	bl	8011c4c <osSemaphoreRelease>
  }
}
 80107f2:	bf00      	nop
 80107f4:	3708      	adds	r7, #8
 80107f6:	46bd      	mov	sp, r7
 80107f8:	bd80      	pop	{r7, pc}
 80107fa:	bf00      	nop
 80107fc:	24002304 	.word	0x24002304

08010800 <low_level_init>:
 *
 * @param netif the already initialized lwip network interface structure
 *        for this ethernetif
 */
static void low_level_init(struct netif *netif)
{
 8010800:	b580      	push	{r7, lr}
 8010802:	b0aa      	sub	sp, #168	@ 0xa8
 8010804:	af00      	add	r7, sp, #0
 8010806:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef hal_eth_init_status = HAL_OK;
 8010808:	2300      	movs	r3, #0
 801080a:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f
/* USER CODE BEGIN OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  osThreadAttr_t attributes;
/* USER CODE END OS_THREAD_ATTR_CMSIS_RTOS_V2 */
  uint32_t duplex, speed = 0;
 801080e:	2300      	movs	r3, #0
 8010810:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
  int32_t PHYLinkState = 0;
 8010814:	2300      	movs	r3, #0
 8010816:	f8c7 3098 	str.w	r3, [r7, #152]	@ 0x98
  ETH_MACConfigTypeDef MACConf = {0};
 801081a:	f107 0310 	add.w	r3, r7, #16
 801081e:	2264      	movs	r2, #100	@ 0x64
 8010820:	2100      	movs	r1, #0
 8010822:	4618      	mov	r0, r3
 8010824:	f01a faac 	bl	802ad80 <memset>
  /* Start ETH HAL Init */

   uint8_t MACAddr[6] ;
  heth.Instance = ETH;
 8010828:	4b86      	ldr	r3, [pc, #536]	@ (8010a44 <low_level_init+0x244>)
 801082a:	4a87      	ldr	r2, [pc, #540]	@ (8010a48 <low_level_init+0x248>)
 801082c:	601a      	str	r2, [r3, #0]
//  MACAddr[1] = 0x80;
//  MACAddr[2] = 0xE1;
//  MACAddr[3] = 0x00;
//  MACAddr[4] = 0x00;
//  MACAddr[5] = 0x00;
    MACAddr[0] = 0x7C;
 801082e:	237c      	movs	r3, #124	@ 0x7c
 8010830:	723b      	strb	r3, [r7, #8]
    MACAddr[1] = 0xF6;
 8010832:	23f6      	movs	r3, #246	@ 0xf6
 8010834:	727b      	strb	r3, [r7, #9]
    MACAddr[2] = 0x66;
 8010836:	2366      	movs	r3, #102	@ 0x66
 8010838:	72bb      	strb	r3, [r7, #10]
    MACAddr[3] = 0xE4;
 801083a:	23e4      	movs	r3, #228	@ 0xe4
 801083c:	72fb      	strb	r3, [r7, #11]
    MACAddr[4] = 0xB5;
 801083e:	23b5      	movs	r3, #181	@ 0xb5
 8010840:	733b      	strb	r3, [r7, #12]
    MACAddr[5] = 0x41;
 8010842:	2341      	movs	r3, #65	@ 0x41
 8010844:	737b      	strb	r3, [r7, #13]
  heth.Init.MACAddr = &MACAddr[0];
 8010846:	4a7f      	ldr	r2, [pc, #508]	@ (8010a44 <low_level_init+0x244>)
 8010848:	f107 0308 	add.w	r3, r7, #8
 801084c:	6053      	str	r3, [r2, #4]
  heth.Init.MediaInterface = HAL_ETH_MII_MODE;
 801084e:	4b7d      	ldr	r3, [pc, #500]	@ (8010a44 <low_level_init+0x244>)
 8010850:	2200      	movs	r2, #0
 8010852:	721a      	strb	r2, [r3, #8]
  heth.Init.TxDesc = DMATxDscrTab;
 8010854:	4b7b      	ldr	r3, [pc, #492]	@ (8010a44 <low_level_init+0x244>)
 8010856:	4a7d      	ldr	r2, [pc, #500]	@ (8010a4c <low_level_init+0x24c>)
 8010858:	60da      	str	r2, [r3, #12]
  heth.Init.RxDesc = DMARxDscrTab;
 801085a:	4b7a      	ldr	r3, [pc, #488]	@ (8010a44 <low_level_init+0x244>)
 801085c:	4a7c      	ldr	r2, [pc, #496]	@ (8010a50 <low_level_init+0x250>)
 801085e:	611a      	str	r2, [r3, #16]
  heth.Init.RxBuffLen = 1536;
 8010860:	4b78      	ldr	r3, [pc, #480]	@ (8010a44 <low_level_init+0x244>)
 8010862:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 8010866:	615a      	str	r2, [r3, #20]

  /* USER CODE BEGIN MACADDRESS */

  /* USER CODE END MACADDRESS */

  hal_eth_init_status = HAL_ETH_Init(&heth);
 8010868:	4876      	ldr	r0, [pc, #472]	@ (8010a44 <low_level_init+0x244>)
 801086a:	f7f7 fe99 	bl	80085a0 <HAL_ETH_Init>
 801086e:	4603      	mov	r3, r0
 8010870:	f887 309f 	strb.w	r3, [r7, #159]	@ 0x9f

  memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
 8010874:	2238      	movs	r2, #56	@ 0x38
 8010876:	2100      	movs	r1, #0
 8010878:	4876      	ldr	r0, [pc, #472]	@ (8010a54 <low_level_init+0x254>)
 801087a:	f01a fa81 	bl	802ad80 <memset>
  TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
 801087e:	4b75      	ldr	r3, [pc, #468]	@ (8010a54 <low_level_init+0x254>)
 8010880:	2221      	movs	r2, #33	@ 0x21
 8010882:	601a      	str	r2, [r3, #0]
  TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
 8010884:	4b73      	ldr	r3, [pc, #460]	@ (8010a54 <low_level_init+0x254>)
 8010886:	f44f 3240 	mov.w	r2, #196608	@ 0x30000
 801088a:	615a      	str	r2, [r3, #20]
  TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
 801088c:	4b71      	ldr	r3, [pc, #452]	@ (8010a54 <low_level_init+0x254>)
 801088e:	2200      	movs	r2, #0
 8010890:	611a      	str	r2, [r3, #16]

  /* End ETH HAL Init */

  /* Initialize the RX POOL */
  LWIP_MEMPOOL_INIT(RX_POOL);
 8010892:	4871      	ldr	r0, [pc, #452]	@ (8010a58 <low_level_init+0x258>)
 8010894:	f009 fe68 	bl	801a568 <memp_init_pool>

#if LWIP_ARP || LWIP_ETHERNET

  /* set MAC hardware address length */
  netif->hwaddr_len = ETH_HWADDR_LEN;
 8010898:	687b      	ldr	r3, [r7, #4]
 801089a:	2206      	movs	r2, #6
 801089c:	f883 2030 	strb.w	r2, [r3, #48]	@ 0x30

  /* set MAC hardware address */
  netif->hwaddr[0] =  heth.Init.MACAddr[0];
 80108a0:	4b68      	ldr	r3, [pc, #416]	@ (8010a44 <low_level_init+0x244>)
 80108a2:	685b      	ldr	r3, [r3, #4]
 80108a4:	781a      	ldrb	r2, [r3, #0]
 80108a6:	687b      	ldr	r3, [r7, #4]
 80108a8:	f883 202a 	strb.w	r2, [r3, #42]	@ 0x2a
  netif->hwaddr[1] =  heth.Init.MACAddr[1];
 80108ac:	4b65      	ldr	r3, [pc, #404]	@ (8010a44 <low_level_init+0x244>)
 80108ae:	685b      	ldr	r3, [r3, #4]
 80108b0:	785a      	ldrb	r2, [r3, #1]
 80108b2:	687b      	ldr	r3, [r7, #4]
 80108b4:	f883 202b 	strb.w	r2, [r3, #43]	@ 0x2b
  netif->hwaddr[2] =  heth.Init.MACAddr[2];
 80108b8:	4b62      	ldr	r3, [pc, #392]	@ (8010a44 <low_level_init+0x244>)
 80108ba:	685b      	ldr	r3, [r3, #4]
 80108bc:	789a      	ldrb	r2, [r3, #2]
 80108be:	687b      	ldr	r3, [r7, #4]
 80108c0:	f883 202c 	strb.w	r2, [r3, #44]	@ 0x2c
  netif->hwaddr[3] =  heth.Init.MACAddr[3];
 80108c4:	4b5f      	ldr	r3, [pc, #380]	@ (8010a44 <low_level_init+0x244>)
 80108c6:	685b      	ldr	r3, [r3, #4]
 80108c8:	78da      	ldrb	r2, [r3, #3]
 80108ca:	687b      	ldr	r3, [r7, #4]
 80108cc:	f883 202d 	strb.w	r2, [r3, #45]	@ 0x2d
  netif->hwaddr[4] =  heth.Init.MACAddr[4];
 80108d0:	4b5c      	ldr	r3, [pc, #368]	@ (8010a44 <low_level_init+0x244>)
 80108d2:	685b      	ldr	r3, [r3, #4]
 80108d4:	791a      	ldrb	r2, [r3, #4]
 80108d6:	687b      	ldr	r3, [r7, #4]
 80108d8:	f883 202e 	strb.w	r2, [r3, #46]	@ 0x2e
  netif->hwaddr[5] =  heth.Init.MACAddr[5];
 80108dc:	4b59      	ldr	r3, [pc, #356]	@ (8010a44 <low_level_init+0x244>)
 80108de:	685b      	ldr	r3, [r3, #4]
 80108e0:	795a      	ldrb	r2, [r3, #5]
 80108e2:	687b      	ldr	r3, [r7, #4]
 80108e4:	f883 202f 	strb.w	r2, [r3, #47]	@ 0x2f

  /* maximum transfer unit */
  netif->mtu = ETH_MAX_PAYLOAD;
 80108e8:	687b      	ldr	r3, [r7, #4]
 80108ea:	f240 52dc 	movw	r2, #1500	@ 0x5dc
 80108ee:	851a      	strh	r2, [r3, #40]	@ 0x28

  /* Accept broadcast address and ARP traffic */
  /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
  #if LWIP_ARP
    netif->flags |= NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP;
 80108f0:	687b      	ldr	r3, [r7, #4]
 80108f2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80108f6:	f043 030a 	orr.w	r3, r3, #10
 80108fa:	b2da      	uxtb	r2, r3
 80108fc:	687b      	ldr	r3, [r7, #4]
 80108fe:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
  #else
    netif->flags |= NETIF_FLAG_BROADCAST;
  #endif /* LWIP_ARP */

  /* create a binary semaphore used for informing ethernetif of frame reception */
  RxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 8010902:	2200      	movs	r2, #0
 8010904:	2101      	movs	r1, #1
 8010906:	2001      	movs	r0, #1
 8010908:	f001 f8c5 	bl	8011a96 <osSemaphoreNew>
 801090c:	4603      	mov	r3, r0
 801090e:	4a53      	ldr	r2, [pc, #332]	@ (8010a5c <low_level_init+0x25c>)
 8010910:	6013      	str	r3, [r2, #0]

  /* create a binary semaphore used for informing ethernetif of frame transmission */
  TxPktSemaphore = osSemaphoreNew(1, 1, NULL);
 8010912:	2200      	movs	r2, #0
 8010914:	2101      	movs	r1, #1
 8010916:	2001      	movs	r0, #1
 8010918:	f001 f8bd 	bl	8011a96 <osSemaphoreNew>
 801091c:	4603      	mov	r3, r0
 801091e:	4a50      	ldr	r2, [pc, #320]	@ (8010a60 <low_level_init+0x260>)
 8010920:	6013      	str	r3, [r2, #0]

  /* create the task that handles the ETH_MAC */
/* USER CODE BEGIN OS_THREAD_NEW_CMSIS_RTOS_V2 */
  memset(&attributes, 0x0, sizeof(osThreadAttr_t));
 8010922:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 8010926:	2224      	movs	r2, #36	@ 0x24
 8010928:	2100      	movs	r1, #0
 801092a:	4618      	mov	r0, r3
 801092c:	f01a fa28 	bl	802ad80 <memset>
  attributes.name = "EthIf";
 8010930:	4b4c      	ldr	r3, [pc, #304]	@ (8010a64 <low_level_init+0x264>)
 8010932:	677b      	str	r3, [r7, #116]	@ 0x74
  attributes.stack_size = INTERFACE_THREAD_STACK_SIZE;
 8010934:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8010938:	f8c7 3088 	str.w	r3, [r7, #136]	@ 0x88
  attributes.priority = osPriorityRealtime;
 801093c:	2330      	movs	r3, #48	@ 0x30
 801093e:	f8c7 308c 	str.w	r3, [r7, #140]	@ 0x8c
  osThreadNew(ethernetif_input, netif, &attributes);
 8010942:	f107 0374 	add.w	r3, r7, #116	@ 0x74
 8010946:	461a      	mov	r2, r3
 8010948:	6879      	ldr	r1, [r7, #4]
 801094a:	4847      	ldr	r0, [pc, #284]	@ (8010a68 <low_level_init+0x268>)
 801094c:	f000 fde5 	bl	801151a <osThreadNew>

/* USER CODE BEGIN PHY_PRE_CONFIG */

/* USER CODE END PHY_PRE_CONFIG */
  /* Set PHY IO functions */
  DP83848_RegisterBusIO(&DP83848, &DP83848_IOCtx);
 8010950:	4946      	ldr	r1, [pc, #280]	@ (8010a6c <low_level_init+0x26c>)
 8010952:	4847      	ldr	r0, [pc, #284]	@ (8010a70 <low_level_init+0x270>)
 8010954:	f7f4 fef9 	bl	800574a <DP83848_RegisterBusIO>

  /* Initialize the DP83848 ETH PHY */
  DP83848_Init(&DP83848);
 8010958:	4845      	ldr	r0, [pc, #276]	@ (8010a70 <low_level_init+0x270>)
 801095a:	f7f4 ff28 	bl	80057ae <DP83848_Init>

  if (hal_eth_init_status == HAL_OK)
 801095e:	f897 309f 	ldrb.w	r3, [r7, #159]	@ 0x9f
 8010962:	2b00      	cmp	r3, #0
 8010964:	d168      	bne.n	8010a38 <low_level_init+0x238>
  {
    PHYLinkState = DP83848_GetLinkState(&DP83848);
 8010966:	4842      	ldr	r0, [pc, #264]	@ (8010a70 <low_level_init+0x270>)
 8010968:	f7f4 ff6e 	bl	8005848 <DP83848_GetLinkState>
 801096c:	f8c7 0098 	str.w	r0, [r7, #152]	@ 0x98

    /* Get link state */
    if(PHYLinkState <= DP83848_STATUS_LINK_DOWN)
 8010970:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 8010974:	2b01      	cmp	r3, #1
 8010976:	dc06      	bgt.n	8010986 <low_level_init+0x186>
    {
      netif_set_link_down(netif);
 8010978:	6878      	ldr	r0, [r7, #4]
 801097a:	f00a f9e5 	bl	801ad48 <netif_set_link_down>
      netif_set_down(netif);
 801097e:	6878      	ldr	r0, [r7, #4]
 8010980:	f00a f974 	bl	801ac6c <netif_set_down>
#endif /* LWIP_ARP || LWIP_ETHERNET */

/* USER CODE BEGIN LOW_LEVEL_INIT */

/* USER CODE END LOW_LEVEL_INIT */
}
 8010984:	e05a      	b.n	8010a3c <low_level_init+0x23c>
      switch (PHYLinkState)
 8010986:	f8d7 3098 	ldr.w	r3, [r7, #152]	@ 0x98
 801098a:	3b02      	subs	r3, #2
 801098c:	2b03      	cmp	r3, #3
 801098e:	d82b      	bhi.n	80109e8 <low_level_init+0x1e8>
 8010990:	a201      	add	r2, pc, #4	@ (adr r2, 8010998 <low_level_init+0x198>)
 8010992:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8010996:	bf00      	nop
 8010998:	080109a9 	.word	0x080109a9
 801099c:	080109bb 	.word	0x080109bb
 80109a0:	080109cb 	.word	0x080109cb
 80109a4:	080109db 	.word	0x080109db
        duplex = ETH_FULLDUPLEX_MODE;
 80109a8:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 80109ac:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 80109b0:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 80109b4:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80109b8:	e01f      	b.n	80109fa <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 80109ba:	2300      	movs	r3, #0
 80109bc:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 80109c0:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 80109c4:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80109c8:	e017      	b.n	80109fa <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 80109ca:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 80109ce:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 80109d2:	2300      	movs	r3, #0
 80109d4:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80109d8:	e00f      	b.n	80109fa <low_level_init+0x1fa>
        duplex = ETH_HALFDUPLEX_MODE;
 80109da:	2300      	movs	r3, #0
 80109dc:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_10M;
 80109e0:	2300      	movs	r3, #0
 80109e2:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80109e6:	e008      	b.n	80109fa <low_level_init+0x1fa>
        duplex = ETH_FULLDUPLEX_MODE;
 80109e8:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 80109ec:	f8c7 30a4 	str.w	r3, [r7, #164]	@ 0xa4
        speed = ETH_SPEED_100M;
 80109f0:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 80109f4:	f8c7 30a0 	str.w	r3, [r7, #160]	@ 0xa0
        break;
 80109f8:	bf00      	nop
    HAL_ETH_GetMACConfig(&heth, &MACConf);
 80109fa:	f107 0310 	add.w	r3, r7, #16
 80109fe:	4619      	mov	r1, r3
 8010a00:	4810      	ldr	r0, [pc, #64]	@ (8010a44 <low_level_init+0x244>)
 8010a02:	f7f8 fb5b 	bl	80090bc <HAL_ETH_GetMACConfig>
    MACConf.DuplexMode = duplex;
 8010a06:	f8d7 30a4 	ldr.w	r3, [r7, #164]	@ 0xa4
 8010a0a:	62bb      	str	r3, [r7, #40]	@ 0x28
    MACConf.Speed = speed;
 8010a0c:	f8d7 30a0 	ldr.w	r3, [r7, #160]	@ 0xa0
 8010a10:	627b      	str	r3, [r7, #36]	@ 0x24
    HAL_ETH_SetMACConfig(&heth, &MACConf);
 8010a12:	f107 0310 	add.w	r3, r7, #16
 8010a16:	4619      	mov	r1, r3
 8010a18:	480a      	ldr	r0, [pc, #40]	@ (8010a44 <low_level_init+0x244>)
 8010a1a:	f7f8 fd23 	bl	8009464 <HAL_ETH_SetMACConfig>
    HAL_ETH_Start_IT(&heth);
 8010a1e:	4809      	ldr	r0, [pc, #36]	@ (8010a44 <low_level_init+0x244>)
 8010a20:	f7f7 febc 	bl	800879c <HAL_ETH_Start_IT>
    netif_set_up(netif);
 8010a24:	6878      	ldr	r0, [r7, #4]
 8010a26:	f00a f8b3 	bl	801ab90 <netif_set_up>
    netif_set_link_up(netif);
 8010a2a:	6878      	ldr	r0, [r7, #4]
 8010a2c:	f00a f952 	bl	801acd4 <netif_set_link_up>
    ethernetif_notify_conn_changed(netif);
 8010a30:	6878      	ldr	r0, [r7, #4]
 8010a32:	f000 fb1b 	bl	801106c <ethernetif_notify_conn_changed>
}
 8010a36:	e001      	b.n	8010a3c <low_level_init+0x23c>
    Error_Handler();
 8010a38:	f7f1 fe8a 	bl	8002750 <Error_Handler>
}
 8010a3c:	bf00      	nop
 8010a3e:	37a8      	adds	r7, #168	@ 0xa8
 8010a40:	46bd      	mov	sp, r7
 8010a42:	bd80      	pop	{r7, pc}
 8010a44:	2400230c 	.word	0x2400230c
 8010a48:	40028000 	.word	0x40028000
 8010a4c:	24040100 	.word	0x24040100
 8010a50:	24040000 	.word	0x24040000
 8010a54:	240023bc 	.word	0x240023bc
 8010a58:	08031d4c 	.word	0x08031d4c
 8010a5c:	24002304 	.word	0x24002304
 8010a60:	24002308 	.word	0x24002308
 8010a64:	0802dc70 	.word	0x0802dc70
 8010a68:	08010bdd 	.word	0x08010bdd
 8010a6c:	24000034 	.word	0x24000034
 8010a70:	240023f4 	.word	0x240023f4

08010a74 <low_level_output>:
 *       to become available since the stack doesn't retry to send a packet
 *       dropped because of memory failure (except for the TCP timers).
 */

static err_t low_level_output(struct netif *netif, struct pbuf *p)
{
 8010a74:	b580      	push	{r7, lr}
 8010a76:	b092      	sub	sp, #72	@ 0x48
 8010a78:	af00      	add	r7, sp, #0
 8010a7a:	6078      	str	r0, [r7, #4]
 8010a7c:	6039      	str	r1, [r7, #0]
  uint32_t i = 0U;
 8010a7e:	2300      	movs	r3, #0
 8010a80:	647b      	str	r3, [r7, #68]	@ 0x44
  struct pbuf *q = NULL;
 8010a82:	2300      	movs	r3, #0
 8010a84:	643b      	str	r3, [r7, #64]	@ 0x40
  err_t errval = ERR_OK;
 8010a86:	2300      	movs	r3, #0
 8010a88:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
 8010a8c:	f107 030c 	add.w	r3, r7, #12
 8010a90:	2230      	movs	r2, #48	@ 0x30
 8010a92:	2100      	movs	r1, #0
 8010a94:	4618      	mov	r0, r3
 8010a96:	f01a f973 	bl	802ad80 <memset>

  memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
 8010a9a:	f107 030c 	add.w	r3, r7, #12
 8010a9e:	2230      	movs	r2, #48	@ 0x30
 8010aa0:	2100      	movs	r1, #0
 8010aa2:	4618      	mov	r0, r3
 8010aa4:	f01a f96c 	bl	802ad80 <memset>

  for(q = p; q != NULL; q = q->next)
 8010aa8:	683b      	ldr	r3, [r7, #0]
 8010aaa:	643b      	str	r3, [r7, #64]	@ 0x40
 8010aac:	e045      	b.n	8010b3a <low_level_output+0xc6>
  {
    if(i >= ETH_TX_DESC_CNT)
 8010aae:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8010ab0:	2b03      	cmp	r3, #3
 8010ab2:	d902      	bls.n	8010aba <low_level_output+0x46>
      return ERR_IF;
 8010ab4:	f06f 030b 	mvn.w	r3, #11
 8010ab8:	e06c      	b.n	8010b94 <low_level_output+0x120>

    Txbuffer[i].buffer = q->payload;
 8010aba:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8010abc:	6859      	ldr	r1, [r3, #4]
 8010abe:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8010ac0:	4613      	mov	r3, r2
 8010ac2:	005b      	lsls	r3, r3, #1
 8010ac4:	4413      	add	r3, r2
 8010ac6:	009b      	lsls	r3, r3, #2
 8010ac8:	3348      	adds	r3, #72	@ 0x48
 8010aca:	443b      	add	r3, r7
 8010acc:	3b3c      	subs	r3, #60	@ 0x3c
 8010ace:	6019      	str	r1, [r3, #0]
    Txbuffer[i].len = q->len;
 8010ad0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8010ad2:	895b      	ldrh	r3, [r3, #10]
 8010ad4:	4619      	mov	r1, r3
 8010ad6:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8010ad8:	4613      	mov	r3, r2
 8010ada:	005b      	lsls	r3, r3, #1
 8010adc:	4413      	add	r3, r2
 8010ade:	009b      	lsls	r3, r3, #2
 8010ae0:	3348      	adds	r3, #72	@ 0x48
 8010ae2:	443b      	add	r3, r7
 8010ae4:	3b38      	subs	r3, #56	@ 0x38
 8010ae6:	6019      	str	r1, [r3, #0]

    if(i>0)
 8010ae8:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8010aea:	2b00      	cmp	r3, #0
 8010aec:	d011      	beq.n	8010b12 <low_level_output+0x9e>
    {
      Txbuffer[i-1].next = &Txbuffer[i];
 8010aee:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8010af0:	1e5a      	subs	r2, r3, #1
 8010af2:	f107 000c 	add.w	r0, r7, #12
 8010af6:	6c79      	ldr	r1, [r7, #68]	@ 0x44
 8010af8:	460b      	mov	r3, r1
 8010afa:	005b      	lsls	r3, r3, #1
 8010afc:	440b      	add	r3, r1
 8010afe:	009b      	lsls	r3, r3, #2
 8010b00:	18c1      	adds	r1, r0, r3
 8010b02:	4613      	mov	r3, r2
 8010b04:	005b      	lsls	r3, r3, #1
 8010b06:	4413      	add	r3, r2
 8010b08:	009b      	lsls	r3, r3, #2
 8010b0a:	3348      	adds	r3, #72	@ 0x48
 8010b0c:	443b      	add	r3, r7
 8010b0e:	3b34      	subs	r3, #52	@ 0x34
 8010b10:	6019      	str	r1, [r3, #0]
    }

    if(q->next == NULL)
 8010b12:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8010b14:	681b      	ldr	r3, [r3, #0]
 8010b16:	2b00      	cmp	r3, #0
 8010b18:	d109      	bne.n	8010b2e <low_level_output+0xba>
    {
      Txbuffer[i].next = NULL;
 8010b1a:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8010b1c:	4613      	mov	r3, r2
 8010b1e:	005b      	lsls	r3, r3, #1
 8010b20:	4413      	add	r3, r2
 8010b22:	009b      	lsls	r3, r3, #2
 8010b24:	3348      	adds	r3, #72	@ 0x48
 8010b26:	443b      	add	r3, r7
 8010b28:	3b34      	subs	r3, #52	@ 0x34
 8010b2a:	2200      	movs	r2, #0
 8010b2c:	601a      	str	r2, [r3, #0]
    }

    i++;
 8010b2e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8010b30:	3301      	adds	r3, #1
 8010b32:	647b      	str	r3, [r7, #68]	@ 0x44
  for(q = p; q != NULL; q = q->next)
 8010b34:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8010b36:	681b      	ldr	r3, [r3, #0]
 8010b38:	643b      	str	r3, [r7, #64]	@ 0x40
 8010b3a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8010b3c:	2b00      	cmp	r3, #0
 8010b3e:	d1b6      	bne.n	8010aae <low_level_output+0x3a>
  }

  TxConfig.Length = p->tot_len;
 8010b40:	683b      	ldr	r3, [r7, #0]
 8010b42:	891b      	ldrh	r3, [r3, #8]
 8010b44:	461a      	mov	r2, r3
 8010b46:	4b15      	ldr	r3, [pc, #84]	@ (8010b9c <low_level_output+0x128>)
 8010b48:	605a      	str	r2, [r3, #4]
  TxConfig.TxBuffer = Txbuffer;
 8010b4a:	4a14      	ldr	r2, [pc, #80]	@ (8010b9c <low_level_output+0x128>)
 8010b4c:	f107 030c 	add.w	r3, r7, #12
 8010b50:	6093      	str	r3, [r2, #8]
  TxConfig.pData = p;
 8010b52:	4a12      	ldr	r2, [pc, #72]	@ (8010b9c <low_level_output+0x128>)
 8010b54:	683b      	ldr	r3, [r7, #0]
 8010b56:	6353      	str	r3, [r2, #52]	@ 0x34

  pbuf_ref(p);
 8010b58:	6838      	ldr	r0, [r7, #0]
 8010b5a:	f00a fdad 	bl	801b6b8 <pbuf_ref>
#if 1
  if (HAL_ETH_Transmit_IT(&heth, &TxConfig) == HAL_OK) {
 8010b5e:	490f      	ldr	r1, [pc, #60]	@ (8010b9c <low_level_output+0x128>)
 8010b60:	480f      	ldr	r0, [pc, #60]	@ (8010ba0 <low_level_output+0x12c>)
 8010b62:	f7f7 ff07 	bl	8008974 <HAL_ETH_Transmit_IT>
 8010b66:	4603      	mov	r3, r0
 8010b68:	2b00      	cmp	r3, #0
 8010b6a:	d10e      	bne.n	8010b8a <low_level_output+0x116>
    while(osSemaphoreAcquire(TxPktSemaphore, TIME_WAITING_FOR_INPUT)!=osOK)
 8010b6c:	bf00      	nop
 8010b6e:	4b0d      	ldr	r3, [pc, #52]	@ (8010ba4 <low_level_output+0x130>)
 8010b70:	681b      	ldr	r3, [r3, #0]
 8010b72:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8010b76:	4618      	mov	r0, r3
 8010b78:	f001 f816 	bl	8011ba8 <osSemaphoreAcquire>
 8010b7c:	4603      	mov	r3, r0
 8010b7e:	2b00      	cmp	r3, #0
 8010b80:	d1f5      	bne.n	8010b6e <low_level_output+0xfa>
    {
    }
//	osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(1000));
    HAL_ETH_ReleaseTxPacket(&heth);
 8010b82:	4807      	ldr	r0, [pc, #28]	@ (8010ba0 <low_level_output+0x12c>)
 8010b84:	f7f8 f87d 	bl	8008c82 <HAL_ETH_ReleaseTxPacket>
 8010b88:	e002      	b.n	8010b90 <low_level_output+0x11c>
  } else {
    pbuf_free(p);
 8010b8a:	6838      	ldr	r0, [r7, #0]
 8010b8c:	f00a fcee 	bl	801b56c <pbuf_free>
  HAL_ETH_Transmit_IT(&heth, &TxConfig);
  osSemaphoreAcquire(TxPktSemaphore, pdMS_TO_TICKS(100));
  HAL_ETH_ReleaseTxPacket(&heth);
#endif

  return errval;
 8010b90:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 8010b94:	4618      	mov	r0, r3
 8010b96:	3748      	adds	r7, #72	@ 0x48
 8010b98:	46bd      	mov	sp, r7
 8010b9a:	bd80      	pop	{r7, pc}
 8010b9c:	240023bc 	.word	0x240023bc
 8010ba0:	2400230c 	.word	0x2400230c
 8010ba4:	24002308 	.word	0x24002308

08010ba8 <low_level_input>:
 * @param netif the lwip network interface structure for this ethernetif
 * @return a pbuf filled with the received packet (including MAC header)
 *         NULL on memory error
   */
static struct pbuf * low_level_input(struct netif *netif)
{
 8010ba8:	b580      	push	{r7, lr}
 8010baa:	b084      	sub	sp, #16
 8010bac:	af00      	add	r7, sp, #0
 8010bae:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 8010bb0:	2300      	movs	r3, #0
 8010bb2:	60fb      	str	r3, [r7, #12]

  if(RxAllocStatus == RX_ALLOC_OK)
 8010bb4:	4b07      	ldr	r3, [pc, #28]	@ (8010bd4 <low_level_input+0x2c>)
 8010bb6:	781b      	ldrb	r3, [r3, #0]
 8010bb8:	2b00      	cmp	r3, #0
 8010bba:	d105      	bne.n	8010bc8 <low_level_input+0x20>
  {
    HAL_ETH_ReadData(&heth, (void **)&p);
 8010bbc:	f107 030c 	add.w	r3, r7, #12
 8010bc0:	4619      	mov	r1, r3
 8010bc2:	4805      	ldr	r0, [pc, #20]	@ (8010bd8 <low_level_input+0x30>)
 8010bc4:	f7f7 ff27 	bl	8008a16 <HAL_ETH_ReadData>
  }

  return p;
 8010bc8:	68fb      	ldr	r3, [r7, #12]
}
 8010bca:	4618      	mov	r0, r3
 8010bcc:	3710      	adds	r7, #16
 8010bce:	46bd      	mov	sp, r7
 8010bd0:	bd80      	pop	{r7, pc}
 8010bd2:	bf00      	nop
 8010bd4:	24002300 	.word	0x24002300
 8010bd8:	2400230c 	.word	0x2400230c

08010bdc <ethernetif_input>:
 * the appropriate input function is called.
 *
 * @param netif the lwip network interface structure for this ethernetif
 */
void ethernetif_input(void* argument)
{
 8010bdc:	b580      	push	{r7, lr}
 8010bde:	b084      	sub	sp, #16
 8010be0:	af00      	add	r7, sp, #0
 8010be2:	6078      	str	r0, [r7, #4]
  struct pbuf *p = NULL;
 8010be4:	2300      	movs	r3, #0
 8010be6:	60fb      	str	r3, [r7, #12]
  struct netif *netif = (struct netif *) argument;
 8010be8:	687b      	ldr	r3, [r7, #4]
 8010bea:	60bb      	str	r3, [r7, #8]

  for( ;; )
  {
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 8010bec:	4b0f      	ldr	r3, [pc, #60]	@ (8010c2c <ethernetif_input+0x50>)
 8010bee:	681b      	ldr	r3, [r3, #0]
 8010bf0:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8010bf4:	4618      	mov	r0, r3
 8010bf6:	f000 ffd7 	bl	8011ba8 <osSemaphoreAcquire>
 8010bfa:	4603      	mov	r3, r0
 8010bfc:	2b00      	cmp	r3, #0
 8010bfe:	d1f5      	bne.n	8010bec <ethernetif_input+0x10>
    {
      do
      {
        p = low_level_input( netif );
 8010c00:	68b8      	ldr	r0, [r7, #8]
 8010c02:	f7ff ffd1 	bl	8010ba8 <low_level_input>
 8010c06:	60f8      	str	r0, [r7, #12]
        if (p != NULL)
 8010c08:	68fb      	ldr	r3, [r7, #12]
 8010c0a:	2b00      	cmp	r3, #0
 8010c0c:	d00a      	beq.n	8010c24 <ethernetif_input+0x48>
        {
          if (netif->input( p, netif) != ERR_OK )
 8010c0e:	68bb      	ldr	r3, [r7, #8]
 8010c10:	691b      	ldr	r3, [r3, #16]
 8010c12:	68b9      	ldr	r1, [r7, #8]
 8010c14:	68f8      	ldr	r0, [r7, #12]
 8010c16:	4798      	blx	r3
 8010c18:	4603      	mov	r3, r0
 8010c1a:	2b00      	cmp	r3, #0
 8010c1c:	d002      	beq.n	8010c24 <ethernetif_input+0x48>
          {
            pbuf_free(p);
 8010c1e:	68f8      	ldr	r0, [r7, #12]
 8010c20:	f00a fca4 	bl	801b56c <pbuf_free>
          }
        }
      } while(p!=NULL);
 8010c24:	68fb      	ldr	r3, [r7, #12]
 8010c26:	2b00      	cmp	r3, #0
 8010c28:	d1ea      	bne.n	8010c00 <ethernetif_input+0x24>
    if (osSemaphoreAcquire(RxPktSemaphore, TIME_WAITING_FOR_INPUT) == osOK)
 8010c2a:	e7df      	b.n	8010bec <ethernetif_input+0x10>
 8010c2c:	24002304 	.word	0x24002304

08010c30 <ethernetif_init>:
 * @return ERR_OK if the loopif is initialized
 *         ERR_MEM if private data couldn't be allocated
 *         any other err_t on error
 */
err_t ethernetif_init(struct netif *netif)
{
 8010c30:	b580      	push	{r7, lr}
 8010c32:	b082      	sub	sp, #8
 8010c34:	af00      	add	r7, sp, #0
 8010c36:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("netif != NULL", (netif != NULL));
 8010c38:	687b      	ldr	r3, [r7, #4]
 8010c3a:	2b00      	cmp	r3, #0
 8010c3c:	d106      	bne.n	8010c4c <ethernetif_init+0x1c>
 8010c3e:	4b0e      	ldr	r3, [pc, #56]	@ (8010c78 <ethernetif_init+0x48>)
 8010c40:	f240 2235 	movw	r2, #565	@ 0x235
 8010c44:	490d      	ldr	r1, [pc, #52]	@ (8010c7c <ethernetif_init+0x4c>)
 8010c46:	480e      	ldr	r0, [pc, #56]	@ (8010c80 <ethernetif_init+0x50>)
 8010c48:	f019 ff08 	bl	802aa5c <iprintf>
   * The last argument should be replaced with your link speed, in units
   * of bits per second.
   */
  // MIB2_INIT_NETIF(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS);

  netif->name[0] = IFNAME0;
 8010c4c:	687b      	ldr	r3, [r7, #4]
 8010c4e:	2273      	movs	r2, #115	@ 0x73
 8010c50:	f883 2032 	strb.w	r2, [r3, #50]	@ 0x32
  netif->name[1] = IFNAME1;
 8010c54:	687b      	ldr	r3, [r7, #4]
 8010c56:	2274      	movs	r2, #116	@ 0x74
 8010c58:	f883 2033 	strb.w	r2, [r3, #51]	@ 0x33
   * is available...) */

#if LWIP_IPV4
#if LWIP_ARP || LWIP_ETHERNET
#if LWIP_ARP
  netif->output = etharp_output;
 8010c5c:	687b      	ldr	r3, [r7, #4]
 8010c5e:	4a09      	ldr	r2, [pc, #36]	@ (8010c84 <ethernetif_init+0x54>)
 8010c60:	615a      	str	r2, [r3, #20]

#if LWIP_IPV6
  netif->output_ip6 = ethip6_output;
#endif /* LWIP_IPV6 */

  netif->linkoutput = low_level_output;
 8010c62:	687b      	ldr	r3, [r7, #4]
 8010c64:	4a08      	ldr	r2, [pc, #32]	@ (8010c88 <ethernetif_init+0x58>)
 8010c66:	619a      	str	r2, [r3, #24]

  /* initialize the hardware */
  low_level_init(netif);
 8010c68:	6878      	ldr	r0, [r7, #4]
 8010c6a:	f7ff fdc9 	bl	8010800 <low_level_init>

  return ERR_OK;
 8010c6e:	2300      	movs	r3, #0
}
 8010c70:	4618      	mov	r0, r3
 8010c72:	3708      	adds	r7, #8
 8010c74:	46bd      	mov	sp, r7
 8010c76:	bd80      	pop	{r7, pc}
 8010c78:	0802dc78 	.word	0x0802dc78
 8010c7c:	0802dc94 	.word	0x0802dc94
 8010c80:	0802dca4 	.word	0x0802dca4
 8010c84:	080250cd 	.word	0x080250cd
 8010c88:	08010a75 	.word	0x08010a75

08010c8c <pbuf_free_custom>:
  * @brief  Custom Rx pbuf free callback
  * @param  pbuf: pbuf to be freed
  * @retval None
  */
void pbuf_free_custom(struct pbuf *p)
{
 8010c8c:	b580      	push	{r7, lr}
 8010c8e:	b084      	sub	sp, #16
 8010c90:	af00      	add	r7, sp, #0
 8010c92:	6078      	str	r0, [r7, #4]
  struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
 8010c94:	687b      	ldr	r3, [r7, #4]
 8010c96:	60fb      	str	r3, [r7, #12]
  LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
 8010c98:	68f9      	ldr	r1, [r7, #12]
 8010c9a:	4809      	ldr	r0, [pc, #36]	@ (8010cc0 <pbuf_free_custom+0x34>)
 8010c9c:	f009 fd54 	bl	801a748 <memp_free_pool>

  /* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
   * call HAL_ETH_GetRxDataBuffer to rebuild the Rx descriptors. */

  if (RxAllocStatus == RX_ALLOC_ERROR)
 8010ca0:	4b08      	ldr	r3, [pc, #32]	@ (8010cc4 <pbuf_free_custom+0x38>)
 8010ca2:	781b      	ldrb	r3, [r3, #0]
 8010ca4:	2b01      	cmp	r3, #1
 8010ca6:	d107      	bne.n	8010cb8 <pbuf_free_custom+0x2c>
  {
    RxAllocStatus = RX_ALLOC_OK;
 8010ca8:	4b06      	ldr	r3, [pc, #24]	@ (8010cc4 <pbuf_free_custom+0x38>)
 8010caa:	2200      	movs	r2, #0
 8010cac:	701a      	strb	r2, [r3, #0]
    osSemaphoreRelease(RxPktSemaphore);
 8010cae:	4b06      	ldr	r3, [pc, #24]	@ (8010cc8 <pbuf_free_custom+0x3c>)
 8010cb0:	681b      	ldr	r3, [r3, #0]
 8010cb2:	4618      	mov	r0, r3
 8010cb4:	f000 ffca 	bl	8011c4c <osSemaphoreRelease>
  }
}
 8010cb8:	bf00      	nop
 8010cba:	3710      	adds	r7, #16
 8010cbc:	46bd      	mov	sp, r7
 8010cbe:	bd80      	pop	{r7, pc}
 8010cc0:	08031d4c 	.word	0x08031d4c
 8010cc4:	24002300 	.word	0x24002300
 8010cc8:	24002304 	.word	0x24002304

08010ccc <sys_now>:
*         when LWIP_TIMERS == 1 and NO_SYS == 1
* @param  None
* @retval Current Time value
*/
u32_t sys_now(void)
{
 8010ccc:	b580      	push	{r7, lr}
 8010cce:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 8010cd0:	f7f4 fe92 	bl	80059f8 <HAL_GetTick>
 8010cd4:	4603      	mov	r3, r0
}
 8010cd6:	4618      	mov	r0, r3
 8010cd8:	bd80      	pop	{r7, pc}
	...

08010cdc <HAL_ETH_MspInit>:
  * @param  ethHandle: ETH handle
  * @retval None
  */

void HAL_ETH_MspInit(ETH_HandleTypeDef* ethHandle)
{
 8010cdc:	b580      	push	{r7, lr}
 8010cde:	b08e      	sub	sp, #56	@ 0x38
 8010ce0:	af00      	add	r7, sp, #0
 8010ce2:	6078      	str	r0, [r7, #4]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8010ce4:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010ce8:	2200      	movs	r2, #0
 8010cea:	601a      	str	r2, [r3, #0]
 8010cec:	605a      	str	r2, [r3, #4]
 8010cee:	609a      	str	r2, [r3, #8]
 8010cf0:	60da      	str	r2, [r3, #12]
 8010cf2:	611a      	str	r2, [r3, #16]
  if(ethHandle->Instance==ETH)
 8010cf4:	687b      	ldr	r3, [r7, #4]
 8010cf6:	681b      	ldr	r3, [r3, #0]
 8010cf8:	4a55      	ldr	r2, [pc, #340]	@ (8010e50 <HAL_ETH_MspInit+0x174>)
 8010cfa:	4293      	cmp	r3, r2
 8010cfc:	f040 80a4 	bne.w	8010e48 <HAL_ETH_MspInit+0x16c>
  {
  /* USER CODE BEGIN ETH_MspInit 0 */

  /* USER CODE END ETH_MspInit 0 */
    /* Enable Peripheral clock */
    __HAL_RCC_ETH1MAC_CLK_ENABLE();
 8010d00:	4b54      	ldr	r3, [pc, #336]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d02:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010d06:	4a53      	ldr	r2, [pc, #332]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d08:	f443 4300 	orr.w	r3, r3, #32768	@ 0x8000
 8010d0c:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 8010d10:	4b50      	ldr	r3, [pc, #320]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d12:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010d16:	f403 4300 	and.w	r3, r3, #32768	@ 0x8000
 8010d1a:	623b      	str	r3, [r7, #32]
 8010d1c:	6a3b      	ldr	r3, [r7, #32]
    __HAL_RCC_ETH1TX_CLK_ENABLE();
 8010d1e:	4b4d      	ldr	r3, [pc, #308]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d20:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010d24:	4a4b      	ldr	r2, [pc, #300]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d26:	f443 3380 	orr.w	r3, r3, #65536	@ 0x10000
 8010d2a:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 8010d2e:	4b49      	ldr	r3, [pc, #292]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d30:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010d34:	f403 3380 	and.w	r3, r3, #65536	@ 0x10000
 8010d38:	61fb      	str	r3, [r7, #28]
 8010d3a:	69fb      	ldr	r3, [r7, #28]
    __HAL_RCC_ETH1RX_CLK_ENABLE();
 8010d3c:	4b45      	ldr	r3, [pc, #276]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d3e:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010d42:	4a44      	ldr	r2, [pc, #272]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d44:	f443 3300 	orr.w	r3, r3, #131072	@ 0x20000
 8010d48:	f8c2 30d8 	str.w	r3, [r2, #216]	@ 0xd8
 8010d4c:	4b41      	ldr	r3, [pc, #260]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d4e:	f8d3 30d8 	ldr.w	r3, [r3, #216]	@ 0xd8
 8010d52:	f403 3300 	and.w	r3, r3, #131072	@ 0x20000
 8010d56:	61bb      	str	r3, [r7, #24]
 8010d58:	69bb      	ldr	r3, [r7, #24]

    __HAL_RCC_GPIOC_CLK_ENABLE();
 8010d5a:	4b3e      	ldr	r3, [pc, #248]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d5c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010d60:	4a3c      	ldr	r2, [pc, #240]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d62:	f043 0304 	orr.w	r3, r3, #4
 8010d66:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8010d6a:	4b3a      	ldr	r3, [pc, #232]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d6c:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010d70:	f003 0304 	and.w	r3, r3, #4
 8010d74:	617b      	str	r3, [r7, #20]
 8010d76:	697b      	ldr	r3, [r7, #20]
    __HAL_RCC_GPIOA_CLK_ENABLE();
 8010d78:	4b36      	ldr	r3, [pc, #216]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d7a:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010d7e:	4a35      	ldr	r2, [pc, #212]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d80:	f043 0301 	orr.w	r3, r3, #1
 8010d84:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8010d88:	4b32      	ldr	r3, [pc, #200]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d8a:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010d8e:	f003 0301 	and.w	r3, r3, #1
 8010d92:	613b      	str	r3, [r7, #16]
 8010d94:	693b      	ldr	r3, [r7, #16]
    __HAL_RCC_GPIOB_CLK_ENABLE();
 8010d96:	4b2f      	ldr	r3, [pc, #188]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d98:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010d9c:	4a2d      	ldr	r2, [pc, #180]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010d9e:	f043 0302 	orr.w	r3, r3, #2
 8010da2:	f8c2 30e0 	str.w	r3, [r2, #224]	@ 0xe0
 8010da6:	4b2b      	ldr	r3, [pc, #172]	@ (8010e54 <HAL_ETH_MspInit+0x178>)
 8010da8:	f8d3 30e0 	ldr.w	r3, [r3, #224]	@ 0xe0
 8010dac:	f003 0302 	and.w	r3, r3, #2
 8010db0:	60fb      	str	r3, [r7, #12]
 8010db2:	68fb      	ldr	r3, [r7, #12]
    PB11     ------> ETH_TX_EN
    PB12     ------> ETH_TXD0
    PB13     ------> ETH_TXD1
    PB8     ------> ETH_TXD3
    */
    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4
 8010db4:	233e      	movs	r3, #62	@ 0x3e
 8010db6:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_5;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010db8:	2302      	movs	r3, #2
 8010dba:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010dbc:	2300      	movs	r3, #0
 8010dbe:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010dc0:	2303      	movs	r3, #3
 8010dc2:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010dc4:	230b      	movs	r3, #11
 8010dc6:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 8010dc8:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010dcc:	4619      	mov	r1, r3
 8010dce:	4822      	ldr	r0, [pc, #136]	@ (8010e58 <HAL_ETH_MspInit+0x17c>)
 8010dd0:	f7f9 f942 	bl	800a058 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
 8010dd4:	238f      	movs	r3, #143	@ 0x8f
 8010dd6:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_7;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010dd8:	2302      	movs	r3, #2
 8010dda:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010ddc:	2300      	movs	r3, #0
 8010dde:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010de0:	2303      	movs	r3, #3
 8010de2:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010de4:	230b      	movs	r3, #11
 8010de6:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 8010de8:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010dec:	4619      	mov	r1, r3
 8010dee:	481b      	ldr	r0, [pc, #108]	@ (8010e5c <HAL_ETH_MspInit+0x180>)
 8010df0:	f7f9 f932 	bl	800a058 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_11|GPIO_PIN_12
 8010df4:	f643 1303 	movw	r3, #14595	@ 0x3903
 8010df8:	627b      	str	r3, [r7, #36]	@ 0x24
                          |GPIO_PIN_13|GPIO_PIN_8;
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010dfa:	2302      	movs	r3, #2
 8010dfc:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010dfe:	2300      	movs	r3, #0
 8010e00:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010e02:	2303      	movs	r3, #3
 8010e04:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010e06:	230b      	movs	r3, #11
 8010e08:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8010e0a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010e0e:	4619      	mov	r1, r3
 8010e10:	4813      	ldr	r0, [pc, #76]	@ (8010e60 <HAL_ETH_MspInit+0x184>)
 8010e12:	f7f9 f921 	bl	800a058 <HAL_GPIO_Init>

    GPIO_InitStruct.Pin = GPIO_PIN_10;
 8010e16:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 8010e1a:	627b      	str	r3, [r7, #36]	@ 0x24
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 8010e1c:	2302      	movs	r3, #2
 8010e1e:	62bb      	str	r3, [r7, #40]	@ 0x28
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8010e20:	2300      	movs	r3, #0
 8010e22:	62fb      	str	r3, [r7, #44]	@ 0x2c
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8010e24:	2303      	movs	r3, #3
 8010e26:	633b      	str	r3, [r7, #48]	@ 0x30
    GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
 8010e28:	230b      	movs	r3, #11
 8010e2a:	637b      	str	r3, [r7, #52]	@ 0x34
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 8010e2c:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8010e30:	4619      	mov	r1, r3
 8010e32:	480b      	ldr	r0, [pc, #44]	@ (8010e60 <HAL_ETH_MspInit+0x184>)
 8010e34:	f7f9 f910 	bl	800a058 <HAL_GPIO_Init>

    /* Peripheral interrupt init */
    HAL_NVIC_SetPriority(ETH_IRQn, 5, 0);
 8010e38:	2200      	movs	r2, #0
 8010e3a:	2105      	movs	r1, #5
 8010e3c:	203d      	movs	r0, #61	@ 0x3d
 8010e3e:	f7f4 fee3 	bl	8005c08 <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(ETH_IRQn);
 8010e42:	203d      	movs	r0, #61	@ 0x3d
 8010e44:	f7f4 fefa 	bl	8005c3c <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN ETH_MspInit 1 */

  /* USER CODE END ETH_MspInit 1 */
  }
}
 8010e48:	bf00      	nop
 8010e4a:	3738      	adds	r7, #56	@ 0x38
 8010e4c:	46bd      	mov	sp, r7
 8010e4e:	bd80      	pop	{r7, pc}
 8010e50:	40028000 	.word	0x40028000
 8010e54:	58024400 	.word	0x58024400
 8010e58:	58020800 	.word	0x58020800
 8010e5c:	58020000 	.word	0x58020000
 8010e60:	58020400 	.word	0x58020400

08010e64 <ETH_PHY_IO_Init>:
  * @brief  Initializes the MDIO interface GPIO and clocks.
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_Init(void)
{
 8010e64:	b580      	push	{r7, lr}
 8010e66:	af00      	add	r7, sp, #0
  /* We assume that MDIO GPIO configuration is already done
     in the ETH_MspInit() else it should be done here
  */

  /* Configure the MDIO Clock */
  HAL_ETH_SetMDIOClockRange(&heth);
 8010e68:	4802      	ldr	r0, [pc, #8]	@ (8010e74 <ETH_PHY_IO_Init+0x10>)
 8010e6a:	f7f8 fb15 	bl	8009498 <HAL_ETH_SetMDIOClockRange>

  return 0;
 8010e6e:	2300      	movs	r3, #0
}
 8010e70:	4618      	mov	r0, r3
 8010e72:	bd80      	pop	{r7, pc}
 8010e74:	2400230c 	.word	0x2400230c

08010e78 <ETH_PHY_IO_DeInit>:
  * @brief  De-Initializes the MDIO interface .
  * @param  None
  * @retval 0 if OK, -1 if ERROR
  */
int32_t ETH_PHY_IO_DeInit (void)
{
 8010e78:	b480      	push	{r7}
 8010e7a:	af00      	add	r7, sp, #0
  return 0;
 8010e7c:	2300      	movs	r3, #0
}
 8010e7e:	4618      	mov	r0, r3
 8010e80:	46bd      	mov	sp, r7
 8010e82:	f85d 7b04 	ldr.w	r7, [sp], #4
 8010e86:	4770      	bx	lr

08010e88 <ETH_PHY_IO_ReadReg>:
  * @param  RegAddr: PHY register address
  * @param  pRegVal: pointer to hold the register value
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal)
{
 8010e88:	b580      	push	{r7, lr}
 8010e8a:	b084      	sub	sp, #16
 8010e8c:	af00      	add	r7, sp, #0
 8010e8e:	60f8      	str	r0, [r7, #12]
 8010e90:	60b9      	str	r1, [r7, #8]
 8010e92:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_ReadPHYRegister(&heth, DevAddr, RegAddr, pRegVal) != HAL_OK)
 8010e94:	687b      	ldr	r3, [r7, #4]
 8010e96:	68ba      	ldr	r2, [r7, #8]
 8010e98:	68f9      	ldr	r1, [r7, #12]
 8010e9a:	4807      	ldr	r0, [pc, #28]	@ (8010eb8 <ETH_PHY_IO_ReadReg+0x30>)
 8010e9c:	f7f8 f866 	bl	8008f6c <HAL_ETH_ReadPHYRegister>
 8010ea0:	4603      	mov	r3, r0
 8010ea2:	2b00      	cmp	r3, #0
 8010ea4:	d002      	beq.n	8010eac <ETH_PHY_IO_ReadReg+0x24>
  {
    return -1;
 8010ea6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010eaa:	e000      	b.n	8010eae <ETH_PHY_IO_ReadReg+0x26>
  }

  return 0;
 8010eac:	2300      	movs	r3, #0
}
 8010eae:	4618      	mov	r0, r3
 8010eb0:	3710      	adds	r7, #16
 8010eb2:	46bd      	mov	sp, r7
 8010eb4:	bd80      	pop	{r7, pc}
 8010eb6:	bf00      	nop
 8010eb8:	2400230c 	.word	0x2400230c

08010ebc <ETH_PHY_IO_WriteReg>:
  * @param  RegAddr: PHY register address
  * @param  RegVal: Value to be written
  * @retval 0 if OK -1 if Error
  */
int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal)
{
 8010ebc:	b580      	push	{r7, lr}
 8010ebe:	b084      	sub	sp, #16
 8010ec0:	af00      	add	r7, sp, #0
 8010ec2:	60f8      	str	r0, [r7, #12]
 8010ec4:	60b9      	str	r1, [r7, #8]
 8010ec6:	607a      	str	r2, [r7, #4]
  if(HAL_ETH_WritePHYRegister(&heth, DevAddr, RegAddr, RegVal) != HAL_OK)
 8010ec8:	687b      	ldr	r3, [r7, #4]
 8010eca:	68ba      	ldr	r2, [r7, #8]
 8010ecc:	68f9      	ldr	r1, [r7, #12]
 8010ece:	4807      	ldr	r0, [pc, #28]	@ (8010eec <ETH_PHY_IO_WriteReg+0x30>)
 8010ed0:	f7f8 f8a0 	bl	8009014 <HAL_ETH_WritePHYRegister>
 8010ed4:	4603      	mov	r3, r0
 8010ed6:	2b00      	cmp	r3, #0
 8010ed8:	d002      	beq.n	8010ee0 <ETH_PHY_IO_WriteReg+0x24>
  {
    return -1;
 8010eda:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8010ede:	e000      	b.n	8010ee2 <ETH_PHY_IO_WriteReg+0x26>
  }

  return 0;
 8010ee0:	2300      	movs	r3, #0
}
 8010ee2:	4618      	mov	r0, r3
 8010ee4:	3710      	adds	r7, #16
 8010ee6:	46bd      	mov	sp, r7
 8010ee8:	bd80      	pop	{r7, pc}
 8010eea:	bf00      	nop
 8010eec:	2400230c 	.word	0x2400230c

08010ef0 <ETH_PHY_IO_GetTick>:
/**
  * @brief  Get the time in millisecons used for internal PHY driver process.
  * @retval Time value
  */
int32_t ETH_PHY_IO_GetTick(void)
{
 8010ef0:	b580      	push	{r7, lr}
 8010ef2:	af00      	add	r7, sp, #0
  return HAL_GetTick();
 8010ef4:	f7f4 fd80 	bl	80059f8 <HAL_GetTick>
 8010ef8:	4603      	mov	r3, r0
}
 8010efa:	4618      	mov	r0, r3
 8010efc:	bd80      	pop	{r7, pc}
	...

08010f00 <ethernet_link_thread>:
/**
  * @brief  Check the ETH link state then update ETH driver and netif link accordingly.
  * @retval None
  */
void ethernet_link_thread(void* argument)
{
 8010f00:	b580      	push	{r7, lr}
 8010f02:	b0a2      	sub	sp, #136	@ 0x88
 8010f04:	af00      	add	r7, sp, #0
 8010f06:	6078      	str	r0, [r7, #4]
  ETH_MACConfigTypeDef MACConf = {0};
 8010f08:	f107 0310 	add.w	r3, r7, #16
 8010f0c:	2264      	movs	r2, #100	@ 0x64
 8010f0e:	2100      	movs	r1, #0
 8010f10:	4618      	mov	r0, r3
 8010f12:	f019 ff35 	bl	802ad80 <memset>
  int32_t PHYLinkState = 0;
 8010f16:	2300      	movs	r3, #0
 8010f18:	67bb      	str	r3, [r7, #120]	@ 0x78
  uint32_t linkchanged = 0U, speed = 0U, duplex = 0U;
 8010f1a:	2300      	movs	r3, #0
 8010f1c:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
 8010f20:	2300      	movs	r3, #0
 8010f22:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
 8010f26:	2300      	movs	r3, #0
 8010f28:	67fb      	str	r3, [r7, #124]	@ 0x7c

  struct netif *netif = (struct netif *) argument;
 8010f2a:	687b      	ldr	r3, [r7, #4]
 8010f2c:	677b      	str	r3, [r7, #116]	@ 0x74
/* USER CODE BEGIN ETH link init */

#if USE_DHCP
  enum dhcp_states DHCP_state = DHCP_START;
 8010f2e:	2301      	movs	r3, #1
 8010f30:	73fb      	strb	r3, [r7, #15]
//  LOCK_TCPIP_CORE();
/* USER CODE END ETH link init */

  for(;;)
  {
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 8010f32:	484a      	ldr	r0, [pc, #296]	@ (801105c <ethernet_link_thread+0x15c>)
 8010f34:	f7f4 fc88 	bl	8005848 <DP83848_GetLinkState>
 8010f38:	67b8      	str	r0, [r7, #120]	@ 0x78

  if(netif_is_link_up(netif) && (PHYLinkState <= DP83848_STATUS_LINK_DOWN))
 8010f3a:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8010f3c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8010f40:	089b      	lsrs	r3, r3, #2
 8010f42:	f003 0301 	and.w	r3, r3, #1
 8010f46:	b2db      	uxtb	r3, r3
 8010f48:	2b00      	cmp	r3, #0
 8010f4a:	d013      	beq.n	8010f74 <ethernet_link_thread+0x74>
 8010f4c:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 8010f4e:	2b01      	cmp	r3, #1
 8010f50:	dc10      	bgt.n	8010f74 <ethernet_link_thread+0x74>
  {
    HAL_ETH_Stop_IT(&heth);
 8010f52:	4843      	ldr	r0, [pc, #268]	@ (8011060 <ethernet_link_thread+0x160>)
 8010f54:	f7f7 fc96 	bl	8008884 <HAL_ETH_Stop_IT>
    LOCK_TCPIP_CORE();
 8010f58:	f000 f936 	bl	80111c8 <sys_lock_tcpip_core>
    netif_set_down(netif);
 8010f5c:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8010f5e:	f009 fe85 	bl	801ac6c <netif_set_down>
    netif_set_link_down(netif);
 8010f62:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8010f64:	f009 fef0 	bl	801ad48 <netif_set_link_down>
    UNLOCK_TCPIP_CORE();
 8010f68:	f000 f93e 	bl	80111e8 <sys_unlock_tcpip_core>
    printf("Link down...\r\n");
 8010f6c:	483d      	ldr	r0, [pc, #244]	@ (8011064 <ethernet_link_thread+0x164>)
 8010f6e:	f019 fddd 	bl	802ab2c <puts>
 8010f72:	e067      	b.n	8011044 <ethernet_link_thread+0x144>
  }
  else if(!netif_is_link_up(netif) && (PHYLinkState > DP83848_STATUS_LINK_DOWN))
 8010f74:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8010f76:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8010f7a:	f003 0304 	and.w	r3, r3, #4
 8010f7e:	2b00      	cmp	r3, #0
 8010f80:	d160      	bne.n	8011044 <ethernet_link_thread+0x144>
 8010f82:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 8010f84:	2b01      	cmp	r3, #1
 8010f86:	dd5d      	ble.n	8011044 <ethernet_link_thread+0x144>
  {
    switch (PHYLinkState)
 8010f88:	6fbb      	ldr	r3, [r7, #120]	@ 0x78
 8010f8a:	3b02      	subs	r3, #2
 8010f8c:	2b03      	cmp	r3, #3
 8010f8e:	d833      	bhi.n	8010ff8 <ethernet_link_thread+0xf8>
 8010f90:	a201      	add	r2, pc, #4	@ (adr r2, 8010f98 <ethernet_link_thread+0x98>)
 8010f92:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8010f96:	bf00      	nop
 8010f98:	08010fa9 	.word	0x08010fa9
 8010f9c:	08010fbf 	.word	0x08010fbf
 8010fa0:	08010fd3 	.word	0x08010fd3
 8010fa4:	08010fe7 	.word	0x08010fe7
    {
    case DP83848_STATUS_100MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 8010fa8:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8010fac:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 8010fae:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8010fb2:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010fb6:	2301      	movs	r3, #1
 8010fb8:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010fbc:	e01d      	b.n	8010ffa <ethernet_link_thread+0xfa>
    case DP83848_STATUS_100MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 8010fbe:	2300      	movs	r3, #0
 8010fc0:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_100M;
 8010fc2:	f44f 4380 	mov.w	r3, #16384	@ 0x4000
 8010fc6:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010fca:	2301      	movs	r3, #1
 8010fcc:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010fd0:	e013      	b.n	8010ffa <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_FULLDUPLEX:
      duplex = ETH_FULLDUPLEX_MODE;
 8010fd2:	f44f 5300 	mov.w	r3, #8192	@ 0x2000
 8010fd6:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 8010fd8:	2300      	movs	r3, #0
 8010fda:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010fde:	2301      	movs	r3, #1
 8010fe0:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010fe4:	e009      	b.n	8010ffa <ethernet_link_thread+0xfa>
    case DP83848_STATUS_10MBITS_HALFDUPLEX:
      duplex = ETH_HALFDUPLEX_MODE;
 8010fe6:	2300      	movs	r3, #0
 8010fe8:	67fb      	str	r3, [r7, #124]	@ 0x7c
      speed = ETH_SPEED_10M;
 8010fea:	2300      	movs	r3, #0
 8010fec:	f8c7 3080 	str.w	r3, [r7, #128]	@ 0x80
      linkchanged = 1;
 8010ff0:	2301      	movs	r3, #1
 8010ff2:	f8c7 3084 	str.w	r3, [r7, #132]	@ 0x84
      break;
 8010ff6:	e000      	b.n	8010ffa <ethernet_link_thread+0xfa>
    default:
      break;
 8010ff8:	bf00      	nop
    }

    if(linkchanged)
 8010ffa:	f8d7 3084 	ldr.w	r3, [r7, #132]	@ 0x84
 8010ffe:	2b00      	cmp	r3, #0
 8011000:	d020      	beq.n	8011044 <ethernet_link_thread+0x144>
    {
      /* Get MAC Config MAC */
      HAL_ETH_GetMACConfig(&heth, &MACConf);
 8011002:	f107 0310 	add.w	r3, r7, #16
 8011006:	4619      	mov	r1, r3
 8011008:	4815      	ldr	r0, [pc, #84]	@ (8011060 <ethernet_link_thread+0x160>)
 801100a:	f7f8 f857 	bl	80090bc <HAL_ETH_GetMACConfig>
      MACConf.DuplexMode = duplex;
 801100e:	6ffb      	ldr	r3, [r7, #124]	@ 0x7c
 8011010:	62bb      	str	r3, [r7, #40]	@ 0x28
      MACConf.Speed = speed;
 8011012:	f8d7 3080 	ldr.w	r3, [r7, #128]	@ 0x80
 8011016:	627b      	str	r3, [r7, #36]	@ 0x24
      HAL_ETH_SetMACConfig(&heth, &MACConf);
 8011018:	f107 0310 	add.w	r3, r7, #16
 801101c:	4619      	mov	r1, r3
 801101e:	4810      	ldr	r0, [pc, #64]	@ (8011060 <ethernet_link_thread+0x160>)
 8011020:	f7f8 fa20 	bl	8009464 <HAL_ETH_SetMACConfig>
      HAL_ETH_Start_IT(&heth);
 8011024:	480e      	ldr	r0, [pc, #56]	@ (8011060 <ethernet_link_thread+0x160>)
 8011026:	f7f7 fbb9 	bl	800879c <HAL_ETH_Start_IT>
      LOCK_TCPIP_CORE();
 801102a:	f000 f8cd 	bl	80111c8 <sys_lock_tcpip_core>
      netif_set_up(netif);
 801102e:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8011030:	f009 fdae 	bl	801ab90 <netif_set_up>
      netif_set_link_up(netif);
 8011034:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 8011036:	f009 fe4d 	bl	801acd4 <netif_set_link_up>
      UNLOCK_TCPIP_CORE();
 801103a:	f000 f8d5 	bl	80111e8 <sys_unlock_tcpip_core>
      printf("Link up...\r\n");
 801103e:	480a      	ldr	r0, [pc, #40]	@ (8011068 <ethernet_link_thread+0x168>)
 8011040:	f019 fd74 	bl	802ab2c <puts>
    }
  }

/* USER CODE BEGIN ETH link Thread core code for User BSP */
#if USE_DHCP
  dhcp_sm(netif, &DHCP_state);
 8011044:	f107 030f 	add.w	r3, r7, #15
 8011048:	4619      	mov	r1, r3
 801104a:	6f78      	ldr	r0, [r7, #116]	@ 0x74
 801104c:	f000 f922 	bl	8011294 <dhcp_sm>
#endif
  /* ETH_CODE: workaround to call LOCK_TCPIP_CORE when accessing netif link functions*/
//  UNLOCK_TCPIP_CORE();
  osDelay(pdMS_TO_TICKS(500));
 8011050:	f44f 70fa 	mov.w	r0, #500	@ 0x1f4
 8011054:	f000 faff 	bl	8011656 <osDelay>
//  LOCK_TCPIP_CORE();
  continue; /* skip next osDelay */
 8011058:	bf00      	nop
  PHYLinkState = DP83848_GetLinkState(&DP83848);
 801105a:	e76a      	b.n	8010f32 <ethernet_link_thread+0x32>
 801105c:	240023f4 	.word	0x240023f4
 8011060:	2400230c 	.word	0x2400230c
 8011064:	0802dccc 	.word	0x0802dccc
 8011068:	0802dcdc 	.word	0x0802dcdc

0801106c <ethernetif_notify_conn_changed>:
  * @brief  This function notify user about link status changement.
  * @param  netif: the network interface
  * @retval None
  */
__weak void ethernetif_notify_conn_changed(struct netif *netif)
{
 801106c:	b480      	push	{r7}
 801106e:	b083      	sub	sp, #12
 8011070:	af00      	add	r7, sp, #0
 8011072:	6078      	str	r0, [r7, #4]
  /* NOTE : This is function could be implemented in user file
            when the callback is needed,
  */
}
 8011074:	bf00      	nop
 8011076:	370c      	adds	r7, #12
 8011078:	46bd      	mov	sp, r7
 801107a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801107e:	4770      	bx	lr

08011080 <HAL_ETH_RxAllocateCallback>:
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
{
 8011080:	b580      	push	{r7, lr}
 8011082:	b086      	sub	sp, #24
 8011084:	af02      	add	r7, sp, #8
 8011086:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH RxAllocateCallback */
  struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
 8011088:	4812      	ldr	r0, [pc, #72]	@ (80110d4 <HAL_ETH_RxAllocateCallback+0x54>)
 801108a:	f009 fae9 	bl	801a660 <memp_malloc_pool>
 801108e:	60f8      	str	r0, [r7, #12]
  if (p)
 8011090:	68fb      	ldr	r3, [r7, #12]
 8011092:	2b00      	cmp	r3, #0
 8011094:	d014      	beq.n	80110c0 <HAL_ETH_RxAllocateCallback+0x40>
  {
    /* Get the buff from the struct pbuf address. */
    *buff = (uint8_t *)p + offsetof(RxBuff_t, buff);
 8011096:	68fb      	ldr	r3, [r7, #12]
 8011098:	f103 0220 	add.w	r2, r3, #32
 801109c:	687b      	ldr	r3, [r7, #4]
 801109e:	601a      	str	r2, [r3, #0]
    p->custom_free_function = pbuf_free_custom;
 80110a0:	68fb      	ldr	r3, [r7, #12]
 80110a2:	4a0d      	ldr	r2, [pc, #52]	@ (80110d8 <HAL_ETH_RxAllocateCallback+0x58>)
 80110a4:	611a      	str	r2, [r3, #16]
    /* Initialize the struct pbuf.
    * This must be performed whenever a buffer's allocated because it may be
    * changed by lwIP or the app, e.g., pbuf_free decrements ref. */
    pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUFFER_SIZE);
 80110a6:	687b      	ldr	r3, [r7, #4]
 80110a8:	681b      	ldr	r3, [r3, #0]
 80110aa:	f44f 62c0 	mov.w	r2, #1536	@ 0x600
 80110ae:	9201      	str	r2, [sp, #4]
 80110b0:	9300      	str	r3, [sp, #0]
 80110b2:	68fb      	ldr	r3, [r7, #12]
 80110b4:	2241      	movs	r2, #65	@ 0x41
 80110b6:	2100      	movs	r1, #0
 80110b8:	2000      	movs	r0, #0
 80110ba:	f00a f86d 	bl	801b198 <pbuf_alloced_custom>
  {
    RxAllocStatus = RX_ALLOC_ERROR;
    *buff = NULL;
  }
/* USER CODE END HAL ETH RxAllocateCallback */
}
 80110be:	e005      	b.n	80110cc <HAL_ETH_RxAllocateCallback+0x4c>
    RxAllocStatus = RX_ALLOC_ERROR;
 80110c0:	4b06      	ldr	r3, [pc, #24]	@ (80110dc <HAL_ETH_RxAllocateCallback+0x5c>)
 80110c2:	2201      	movs	r2, #1
 80110c4:	701a      	strb	r2, [r3, #0]
    *buff = NULL;
 80110c6:	687b      	ldr	r3, [r7, #4]
 80110c8:	2200      	movs	r2, #0
 80110ca:	601a      	str	r2, [r3, #0]
}
 80110cc:	bf00      	nop
 80110ce:	3710      	adds	r7, #16
 80110d0:	46bd      	mov	sp, r7
 80110d2:	bd80      	pop	{r7, pc}
 80110d4:	08031d4c 	.word	0x08031d4c
 80110d8:	08010c8d 	.word	0x08010c8d
 80110dc:	24002300 	.word	0x24002300

080110e0 <HAL_ETH_RxLinkCallback>:

void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
{
 80110e0:	b480      	push	{r7}
 80110e2:	b08d      	sub	sp, #52	@ 0x34
 80110e4:	af00      	add	r7, sp, #0
 80110e6:	60f8      	str	r0, [r7, #12]
 80110e8:	60b9      	str	r1, [r7, #8]
 80110ea:	607a      	str	r2, [r7, #4]
 80110ec:	807b      	strh	r3, [r7, #2]
/* USER CODE BEGIN HAL ETH RxLinkCallback */

  struct pbuf **ppStart = (struct pbuf **)pStart;
 80110ee:	68fb      	ldr	r3, [r7, #12]
 80110f0:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf **ppEnd = (struct pbuf **)pEnd;
 80110f2:	68bb      	ldr	r3, [r7, #8]
 80110f4:	627b      	str	r3, [r7, #36]	@ 0x24
  struct pbuf *p = NULL;
 80110f6:	2300      	movs	r3, #0
 80110f8:	62fb      	str	r3, [r7, #44]	@ 0x2c

  /* Get the struct pbuf from the buff address. */
  p = (struct pbuf *)(buff - offsetof(RxBuff_t, buff));
 80110fa:	687b      	ldr	r3, [r7, #4]
 80110fc:	3b20      	subs	r3, #32
 80110fe:	62fb      	str	r3, [r7, #44]	@ 0x2c
  p->next = NULL;
 8011100:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011102:	2200      	movs	r2, #0
 8011104:	601a      	str	r2, [r3, #0]
  p->tot_len = 0;
 8011106:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011108:	2200      	movs	r2, #0
 801110a:	811a      	strh	r2, [r3, #8]
  p->len = Length;
 801110c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801110e:	887a      	ldrh	r2, [r7, #2]
 8011110:	815a      	strh	r2, [r3, #10]

  /* Chain the buffer. */
  if (!*ppStart)
 8011112:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011114:	681b      	ldr	r3, [r3, #0]
 8011116:	2b00      	cmp	r3, #0
 8011118:	d103      	bne.n	8011122 <HAL_ETH_RxLinkCallback+0x42>
  {
    /* The first buffer of the packet. */
    *ppStart = p;
 801111a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801111c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801111e:	601a      	str	r2, [r3, #0]
 8011120:	e003      	b.n	801112a <HAL_ETH_RxLinkCallback+0x4a>
  }
  else
  {
    /* Chain the buffer to the end of the packet. */
    (*ppEnd)->next = p;
 8011122:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8011124:	681b      	ldr	r3, [r3, #0]
 8011126:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8011128:	601a      	str	r2, [r3, #0]
  }
  *ppEnd  = p;
 801112a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801112c:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801112e:	601a      	str	r2, [r3, #0]

  /* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len
   * set to its own length, plus the length of all the following pbufs in the chain. */
  for (p = *ppStart; p != NULL; p = p->next)
 8011130:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8011132:	681b      	ldr	r3, [r3, #0]
 8011134:	62fb      	str	r3, [r7, #44]	@ 0x2c
 8011136:	e009      	b.n	801114c <HAL_ETH_RxLinkCallback+0x6c>
  {
    p->tot_len += Length;
 8011138:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801113a:	891a      	ldrh	r2, [r3, #8]
 801113c:	887b      	ldrh	r3, [r7, #2]
 801113e:	4413      	add	r3, r2
 8011140:	b29a      	uxth	r2, r3
 8011142:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011144:	811a      	strh	r2, [r3, #8]
  for (p = *ppStart; p != NULL; p = p->next)
 8011146:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011148:	681b      	ldr	r3, [r3, #0]
 801114a:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801114c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801114e:	2b00      	cmp	r3, #0
 8011150:	d1f2      	bne.n	8011138 <HAL_ETH_RxLinkCallback+0x58>
  }

  /* Invalidate data cache because Rx DMA's writing to physical memory makes it stale. */
  SCB_InvalidateDCache_by_Addr((uint32_t *)buff, Length);
 8011152:	887b      	ldrh	r3, [r7, #2]
 8011154:	687a      	ldr	r2, [r7, #4]
 8011156:	623a      	str	r2, [r7, #32]
 8011158:	61fb      	str	r3, [r7, #28]
    if ( dsize > 0 ) { 
 801115a:	69fb      	ldr	r3, [r7, #28]
 801115c:	2b00      	cmp	r3, #0
 801115e:	dd1d      	ble.n	801119c <HAL_ETH_RxLinkCallback+0xbc>
       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
 8011160:	6a3b      	ldr	r3, [r7, #32]
 8011162:	f003 021f 	and.w	r2, r3, #31
 8011166:	69fb      	ldr	r3, [r7, #28]
 8011168:	4413      	add	r3, r2
 801116a:	61bb      	str	r3, [r7, #24]
      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
 801116c:	6a3b      	ldr	r3, [r7, #32]
 801116e:	617b      	str	r3, [r7, #20]
  __ASM volatile ("dsb 0xF":::"memory");
 8011170:	f3bf 8f4f 	dsb	sy
}
 8011174:	bf00      	nop
        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
 8011176:	4a0d      	ldr	r2, [pc, #52]	@ (80111ac <HAL_ETH_RxLinkCallback+0xcc>)
 8011178:	697b      	ldr	r3, [r7, #20]
 801117a:	f8c2 325c 	str.w	r3, [r2, #604]	@ 0x25c
        op_addr += __SCB_DCACHE_LINE_SIZE;
 801117e:	697b      	ldr	r3, [r7, #20]
 8011180:	3320      	adds	r3, #32
 8011182:	617b      	str	r3, [r7, #20]
        op_size -= __SCB_DCACHE_LINE_SIZE;
 8011184:	69bb      	ldr	r3, [r7, #24]
 8011186:	3b20      	subs	r3, #32
 8011188:	61bb      	str	r3, [r7, #24]
      } while ( op_size > 0 );
 801118a:	69bb      	ldr	r3, [r7, #24]
 801118c:	2b00      	cmp	r3, #0
 801118e:	dcf2      	bgt.n	8011176 <HAL_ETH_RxLinkCallback+0x96>
  __ASM volatile ("dsb 0xF":::"memory");
 8011190:	f3bf 8f4f 	dsb	sy
}
 8011194:	bf00      	nop
  __ASM volatile ("isb 0xF":::"memory");
 8011196:	f3bf 8f6f 	isb	sy
}
 801119a:	bf00      	nop
}
 801119c:	bf00      	nop

/* USER CODE END HAL ETH RxLinkCallback */
}
 801119e:	bf00      	nop
 80111a0:	3734      	adds	r7, #52	@ 0x34
 80111a2:	46bd      	mov	sp, r7
 80111a4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80111a8:	4770      	bx	lr
 80111aa:	bf00      	nop
 80111ac:	e000ed00 	.word	0xe000ed00

080111b0 <HAL_ETH_TxFreeCallback>:

void HAL_ETH_TxFreeCallback(uint32_t * buff)
{
 80111b0:	b580      	push	{r7, lr}
 80111b2:	b082      	sub	sp, #8
 80111b4:	af00      	add	r7, sp, #0
 80111b6:	6078      	str	r0, [r7, #4]
/* USER CODE BEGIN HAL ETH TxFreeCallback */

  pbuf_free((struct pbuf *)buff);
 80111b8:	6878      	ldr	r0, [r7, #4]
 80111ba:	f00a f9d7 	bl	801b56c <pbuf_free>

/* USER CODE END HAL ETH TxFreeCallback */
}
 80111be:	bf00      	nop
 80111c0:	3708      	adds	r7, #8
 80111c2:	46bd      	mov	sp, r7
 80111c4:	bd80      	pop	{r7, pc}
	...

080111c8 <sys_lock_tcpip_core>:
/* ETH_CODE: add functions needed for proper multithreading support and check */

static osThreadId_t lwip_core_lock_holder_thread_id;
static osThreadId_t lwip_tcpip_thread_id;

void sys_lock_tcpip_core(void){
 80111c8:	b580      	push	{r7, lr}
 80111ca:	af00      	add	r7, sp, #0
	sys_mutex_lock(&lock_tcpip_core);
 80111cc:	4804      	ldr	r0, [pc, #16]	@ (80111e0 <sys_lock_tcpip_core+0x18>)
 80111ce:	f016 f973 	bl	80274b8 <sys_mutex_lock>
	lwip_core_lock_holder_thread_id = osThreadGetId();
 80111d2:	f000 fa35 	bl	8011640 <osThreadGetId>
 80111d6:	4603      	mov	r3, r0
 80111d8:	4a02      	ldr	r2, [pc, #8]	@ (80111e4 <sys_lock_tcpip_core+0x1c>)
 80111da:	6013      	str	r3, [r2, #0]
}
 80111dc:	bf00      	nop
 80111de:	bd80      	pop	{r7, pc}
 80111e0:	24024454 	.word	0x24024454
 80111e4:	24002414 	.word	0x24002414

080111e8 <sys_unlock_tcpip_core>:

void sys_unlock_tcpip_core(void){
 80111e8:	b580      	push	{r7, lr}
 80111ea:	af00      	add	r7, sp, #0
	lwip_core_lock_holder_thread_id = 0;
 80111ec:	4b03      	ldr	r3, [pc, #12]	@ (80111fc <sys_unlock_tcpip_core+0x14>)
 80111ee:	2200      	movs	r2, #0
 80111f0:	601a      	str	r2, [r3, #0]
	sys_mutex_unlock(&lock_tcpip_core);
 80111f2:	4803      	ldr	r0, [pc, #12]	@ (8011200 <sys_unlock_tcpip_core+0x18>)
 80111f4:	f016 f96f 	bl	80274d6 <sys_mutex_unlock>
}
 80111f8:	bf00      	nop
 80111fa:	bd80      	pop	{r7, pc}
 80111fc:	24002414 	.word	0x24002414
 8011200:	24024454 	.word	0x24024454

08011204 <sys_check_core_locking>:

void sys_check_core_locking(void){
 8011204:	b580      	push	{r7, lr}
 8011206:	b082      	sub	sp, #8
 8011208:	af00      	add	r7, sp, #0
  /* Embedded systems should check we are NOT in an interrupt context here */

  LWIP_ASSERT("Function called from interrupt context", (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0);
 801120a:	4b15      	ldr	r3, [pc, #84]	@ (8011260 <sys_check_core_locking+0x5c>)
 801120c:	685b      	ldr	r3, [r3, #4]
 801120e:	f3c3 0308 	ubfx	r3, r3, #0, #9
 8011212:	2b00      	cmp	r3, #0
 8011214:	d006      	beq.n	8011224 <sys_check_core_locking+0x20>
 8011216:	4b13      	ldr	r3, [pc, #76]	@ (8011264 <sys_check_core_locking+0x60>)
 8011218:	f240 4216 	movw	r2, #1046	@ 0x416
 801121c:	4912      	ldr	r1, [pc, #72]	@ (8011268 <sys_check_core_locking+0x64>)
 801121e:	4813      	ldr	r0, [pc, #76]	@ (801126c <sys_check_core_locking+0x68>)
 8011220:	f019 fc1c 	bl	802aa5c <iprintf>

  if (lwip_tcpip_thread_id != 0) {
 8011224:	4b12      	ldr	r3, [pc, #72]	@ (8011270 <sys_check_core_locking+0x6c>)
 8011226:	681b      	ldr	r3, [r3, #0]
 8011228:	2b00      	cmp	r3, #0
 801122a:	d014      	beq.n	8011256 <sys_check_core_locking+0x52>
	  osThreadId_t current_thread_id = osThreadGetId();
 801122c:	f000 fa08 	bl	8011640 <osThreadGetId>
 8011230:	6078      	str	r0, [r7, #4]

#if LWIP_TCPIP_CORE_LOCKING
	LWIP_ASSERT("Function called without core lock", current_thread_id == lwip_core_lock_holder_thread_id);
 8011232:	4b10      	ldr	r3, [pc, #64]	@ (8011274 <sys_check_core_locking+0x70>)
 8011234:	681b      	ldr	r3, [r3, #0]
 8011236:	687a      	ldr	r2, [r7, #4]
 8011238:	429a      	cmp	r2, r3
 801123a:	d006      	beq.n	801124a <sys_check_core_locking+0x46>
 801123c:	4b09      	ldr	r3, [pc, #36]	@ (8011264 <sys_check_core_locking+0x60>)
 801123e:	f240 421c 	movw	r2, #1052	@ 0x41c
 8011242:	490d      	ldr	r1, [pc, #52]	@ (8011278 <sys_check_core_locking+0x74>)
 8011244:	4809      	ldr	r0, [pc, #36]	@ (801126c <sys_check_core_locking+0x68>)
 8011246:	f019 fc09 	bl	802aa5c <iprintf>
	/* ETH_CODE: to easily check that example has correct handling of core lock
	 * This will trigger breakpoint (__BKPT)
	 */
#warning Below check should be removed in production code
	if(current_thread_id != lwip_core_lock_holder_thread_id) __BKPT(0);
 801124a:	4b0a      	ldr	r3, [pc, #40]	@ (8011274 <sys_check_core_locking+0x70>)
 801124c:	681b      	ldr	r3, [r3, #0]
 801124e:	687a      	ldr	r2, [r7, #4]
 8011250:	429a      	cmp	r2, r3
 8011252:	d000      	beq.n	8011256 <sys_check_core_locking+0x52>
 8011254:	be00      	bkpt	0x0000
#else /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_ASSERT("Function called from wrong thread", current_thread_id == lwip_tcpip_thread_id);
#endif /* LWIP_TCPIP_CORE_LOCKING */
	LWIP_UNUSED_ARG(current_thread_id); /* for LWIP_NOASSERT */
  }
}
 8011256:	bf00      	nop
 8011258:	3708      	adds	r7, #8
 801125a:	46bd      	mov	sp, r7
 801125c:	bd80      	pop	{r7, pc}
 801125e:	bf00      	nop
 8011260:	e000ed00 	.word	0xe000ed00
 8011264:	0802dc78 	.word	0x0802dc78
 8011268:	0802dce8 	.word	0x0802dce8
 801126c:	0802dca4 	.word	0x0802dca4
 8011270:	24002418 	.word	0x24002418
 8011274:	24002414 	.word	0x24002414
 8011278:	0802dd10 	.word	0x0802dd10

0801127c <sys_mark_tcpip_thread>:
void sys_mark_tcpip_thread(void){
 801127c:	b580      	push	{r7, lr}
 801127e:	af00      	add	r7, sp, #0
	lwip_tcpip_thread_id = osThreadGetId();
 8011280:	f000 f9de 	bl	8011640 <osThreadGetId>
 8011284:	4603      	mov	r3, r0
 8011286:	4a02      	ldr	r2, [pc, #8]	@ (8011290 <sys_mark_tcpip_thread+0x14>)
 8011288:	6013      	str	r3, [r2, #0]
}
 801128a:	bf00      	nop
 801128c:	bd80      	pop	{r7, pc}
 801128e:	bf00      	nop
 8011290:	24002418 	.word	0x24002418

08011294 <dhcp_sm>:

#if USE_DHCP
void dhcp_sm(struct netif *netif, enum dhcp_states *state)
{
 8011294:	b580      	push	{r7, lr}
 8011296:	b08c      	sub	sp, #48	@ 0x30
 8011298:	af00      	add	r7, sp, #0
 801129a:	6078      	str	r0, [r7, #4]
 801129c:	6039      	str	r1, [r7, #0]
	ip_addr_t gw;
#ifdef DHCP_USER_LOGS
	uint8_t iptxt[20];
#endif

	switch(*state)
 801129e:	683b      	ldr	r3, [r7, #0]
 80112a0:	781b      	ldrb	r3, [r3, #0]
 80112a2:	2b03      	cmp	r3, #3
 80112a4:	d072      	beq.n	801138c <dhcp_sm+0xf8>
 80112a6:	2b03      	cmp	r3, #3
 80112a8:	dc7b      	bgt.n	80113a2 <dhcp_sm+0x10e>
 80112aa:	2b01      	cmp	r3, #1
 80112ac:	d002      	beq.n	80112b4 <dhcp_sm+0x20>
 80112ae:	2b02      	cmp	r3, #2
 80112b0:	d00a      	beq.n	80112c8 <dhcp_sm+0x34>
	    	{
	    		*state = DHCP_START;
	    	}
	    	break;
	    default:
	    	break;
 80112b2:	e076      	b.n	80113a2 <dhcp_sm+0x10e>
	    	*state = DHCP_WAIT_ADDRESS;
 80112b4:	683b      	ldr	r3, [r7, #0]
 80112b6:	2202      	movs	r2, #2
 80112b8:	701a      	strb	r2, [r3, #0]
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 80112ba:	687b      	ldr	r3, [r7, #4]
 80112bc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80112be:	62fb      	str	r3, [r7, #44]	@ 0x2c
			printf("  State: Looking for DHCP server ...\n");
 80112c0:	483c      	ldr	r0, [pc, #240]	@ (80113b4 <dhcp_sm+0x120>)
 80112c2:	f019 fc33 	bl	802ab2c <puts>
	    	break;
 80112c6:	e071      	b.n	80113ac <dhcp_sm+0x118>
	    	if (dhcp_supplied_address(netif))
 80112c8:	6878      	ldr	r0, [r7, #4]
 80112ca:	f013 fa59 	bl	8024780 <dhcp_supplied_address>
 80112ce:	4603      	mov	r3, r0
 80112d0:	2b00      	cmp	r3, #0
 80112d2:	d015      	beq.n	8011300 <dhcp_sm+0x6c>
	    		*state = DHCP_ADDRESS_ASSIGNED;
 80112d4:	683b      	ldr	r3, [r7, #0]
 80112d6:	2203      	movs	r2, #3
 80112d8:	701a      	strb	r2, [r3, #0]
				sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 80112da:	687b      	ldr	r3, [r7, #4]
 80112dc:	3304      	adds	r3, #4
 80112de:	4618      	mov	r0, r3
 80112e0:	f014 ffe6 	bl	80262b0 <ip4addr_ntoa>
 80112e4:	4602      	mov	r2, r0
 80112e6:	f107 030c 	add.w	r3, r7, #12
 80112ea:	4933      	ldr	r1, [pc, #204]	@ (80113b8 <dhcp_sm+0x124>)
 80112ec:	4618      	mov	r0, r3
 80112ee:	f019 fc25 	bl	802ab3c <siprintf>
				printf("IP address assigned by a DHCP server: %s\n", iptxt);
 80112f2:	f107 030c 	add.w	r3, r7, #12
 80112f6:	4619      	mov	r1, r3
 80112f8:	4830      	ldr	r0, [pc, #192]	@ (80113bc <dhcp_sm+0x128>)
 80112fa:	f019 fbaf 	bl	802aa5c <iprintf>
	    	break;
 80112fe:	e052      	b.n	80113a6 <dhcp_sm+0x112>
	    		dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 8011300:	687b      	ldr	r3, [r7, #4]
 8011302:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8011304:	62fb      	str	r3, [r7, #44]	@ 0x2c
				if (dhcp->tries > MAX_DHCP_TRIES)
 8011306:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011308:	799b      	ldrb	r3, [r3, #6]
 801130a:	2b04      	cmp	r3, #4
 801130c:	d94b      	bls.n	80113a6 <dhcp_sm+0x112>
					*state = DHCP_TIMEOUT;
 801130e:	683b      	ldr	r3, [r7, #0]
 8011310:	2204      	movs	r2, #4
 8011312:	701a      	strb	r2, [r3, #0]
					LOCK_TCPIP_CORE();
 8011314:	f7ff ff58 	bl	80111c8 <sys_lock_tcpip_core>
					dhcp_stop(netif);
 8011318:	6878      	ldr	r0, [r7, #4]
 801131a:	f012 fc89 	bl	8023c30 <dhcp_stop>
					UNLOCK_TCPIP_CORE();
 801131e:	f7ff ff63 	bl	80111e8 <sys_unlock_tcpip_core>
					ipaddr_aton(STATIC_IP, &ipaddr);
 8011322:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8011326:	4619      	mov	r1, r3
 8011328:	4825      	ldr	r0, [pc, #148]	@ (80113c0 <dhcp_sm+0x12c>)
 801132a:	f014 fe97 	bl	802605c <ip4addr_aton>
					ipaddr_aton(STATIC_MASK, &netmask);
 801132e:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 8011332:	4619      	mov	r1, r3
 8011334:	4823      	ldr	r0, [pc, #140]	@ (80113c4 <dhcp_sm+0x130>)
 8011336:	f014 fe91 	bl	802605c <ip4addr_aton>
					ipaddr_aton(STATIC_GW, &gw);
 801133a:	f107 0320 	add.w	r3, r7, #32
 801133e:	4619      	mov	r1, r3
 8011340:	4821      	ldr	r0, [pc, #132]	@ (80113c8 <dhcp_sm+0x134>)
 8011342:	f014 fe8b 	bl	802605c <ip4addr_aton>
					LOCK_TCPIP_CORE();
 8011346:	f7ff ff3f 	bl	80111c8 <sys_lock_tcpip_core>
					netif_set_addr(netif, ip_2_ip4(&ipaddr), ip_2_ip4(&netmask), ip_2_ip4(&gw));
 801134a:	f107 0320 	add.w	r3, r7, #32
 801134e:	f107 0224 	add.w	r2, r7, #36	@ 0x24
 8011352:	f107 0128 	add.w	r1, r7, #40	@ 0x28
 8011356:	6878      	ldr	r0, [r7, #4]
 8011358:	f009 fbbe 	bl	801aad8 <netif_set_addr>
					UNLOCK_TCPIP_CORE();
 801135c:	f7ff ff44 	bl	80111e8 <sys_unlock_tcpip_core>
					sprintf((char *)iptxt, "%s", ip4addr_ntoa((const ip4_addr_t *)&netif->ip_addr));
 8011360:	687b      	ldr	r3, [r7, #4]
 8011362:	3304      	adds	r3, #4
 8011364:	4618      	mov	r0, r3
 8011366:	f014 ffa3 	bl	80262b0 <ip4addr_ntoa>
 801136a:	4602      	mov	r2, r0
 801136c:	f107 030c 	add.w	r3, r7, #12
 8011370:	4911      	ldr	r1, [pc, #68]	@ (80113b8 <dhcp_sm+0x124>)
 8011372:	4618      	mov	r0, r3
 8011374:	f019 fbe2 	bl	802ab3c <siprintf>
					printf("DHCP Timeout !! \n");
 8011378:	4814      	ldr	r0, [pc, #80]	@ (80113cc <dhcp_sm+0x138>)
 801137a:	f019 fbd7 	bl	802ab2c <puts>
					printf("Static IP address: %s\n", iptxt);
 801137e:	f107 030c 	add.w	r3, r7, #12
 8011382:	4619      	mov	r1, r3
 8011384:	4812      	ldr	r0, [pc, #72]	@ (80113d0 <dhcp_sm+0x13c>)
 8011386:	f019 fb69 	bl	802aa5c <iprintf>
	    	break;
 801138a:	e00c      	b.n	80113a6 <dhcp_sm+0x112>
	    	dhcp = (struct dhcp *)netif_get_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP);
 801138c:	687b      	ldr	r3, [r7, #4]
 801138e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8011390:	62fb      	str	r3, [r7, #44]	@ 0x2c
	    	if(dhcp->state == 3)
 8011392:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8011394:	795b      	ldrb	r3, [r3, #5]
 8011396:	2b03      	cmp	r3, #3
 8011398:	d107      	bne.n	80113aa <dhcp_sm+0x116>
	    		*state = DHCP_START;
 801139a:	683b      	ldr	r3, [r7, #0]
 801139c:	2201      	movs	r2, #1
 801139e:	701a      	strb	r2, [r3, #0]
	    	break;
 80113a0:	e003      	b.n	80113aa <dhcp_sm+0x116>
	    	break;
 80113a2:	bf00      	nop
 80113a4:	e002      	b.n	80113ac <dhcp_sm+0x118>
	    	break;
 80113a6:	bf00      	nop
 80113a8:	e000      	b.n	80113ac <dhcp_sm+0x118>
	    	break;
 80113aa:	bf00      	nop
	    }
}
 80113ac:	bf00      	nop
 80113ae:	3730      	adds	r7, #48	@ 0x30
 80113b0:	46bd      	mov	sp, r7
 80113b2:	bd80      	pop	{r7, pc}
 80113b4:	0802dd34 	.word	0x0802dd34
 80113b8:	0802dd5c 	.word	0x0802dd5c
 80113bc:	0802dd60 	.word	0x0802dd60
 80113c0:	0802dd8c 	.word	0x0802dd8c
 80113c4:	0802dd9c 	.word	0x0802dd9c
 80113c8:	0802ddac 	.word	0x0802ddac
 80113cc:	0802ddb8 	.word	0x0802ddb8
 80113d0:	0802ddcc 	.word	0x0802ddcc

080113d4 <__NVIC_SetPriority>:
{
 80113d4:	b480      	push	{r7}
 80113d6:	b083      	sub	sp, #12
 80113d8:	af00      	add	r7, sp, #0
 80113da:	4603      	mov	r3, r0
 80113dc:	6039      	str	r1, [r7, #0]
 80113de:	80fb      	strh	r3, [r7, #6]
  if ((int32_t)(IRQn) >= 0)
 80113e0:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80113e4:	2b00      	cmp	r3, #0
 80113e6:	db0a      	blt.n	80113fe <__NVIC_SetPriority+0x2a>
    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80113e8:	683b      	ldr	r3, [r7, #0]
 80113ea:	b2da      	uxtb	r2, r3
 80113ec:	490c      	ldr	r1, [pc, #48]	@ (8011420 <__NVIC_SetPriority+0x4c>)
 80113ee:	f9b7 3006 	ldrsh.w	r3, [r7, #6]
 80113f2:	0112      	lsls	r2, r2, #4
 80113f4:	b2d2      	uxtb	r2, r2
 80113f6:	440b      	add	r3, r1
 80113f8:	f883 2300 	strb.w	r2, [r3, #768]	@ 0x300
}
 80113fc:	e00a      	b.n	8011414 <__NVIC_SetPriority+0x40>
    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80113fe:	683b      	ldr	r3, [r7, #0]
 8011400:	b2da      	uxtb	r2, r3
 8011402:	4908      	ldr	r1, [pc, #32]	@ (8011424 <__NVIC_SetPriority+0x50>)
 8011404:	88fb      	ldrh	r3, [r7, #6]
 8011406:	f003 030f 	and.w	r3, r3, #15
 801140a:	3b04      	subs	r3, #4
 801140c:	0112      	lsls	r2, r2, #4
 801140e:	b2d2      	uxtb	r2, r2
 8011410:	440b      	add	r3, r1
 8011412:	761a      	strb	r2, [r3, #24]
}
 8011414:	bf00      	nop
 8011416:	370c      	adds	r7, #12
 8011418:	46bd      	mov	sp, r7
 801141a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801141e:	4770      	bx	lr
 8011420:	e000e100 	.word	0xe000e100
 8011424:	e000ed00 	.word	0xe000ed00

08011428 <SysTick_Handler>:

/*
  SysTick handler implementation that also clears overflow flag.
*/
#if (USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION == 0)
void SysTick_Handler (void) {
 8011428:	b580      	push	{r7, lr}
 801142a:	af00      	add	r7, sp, #0
  /* Clear overflow flag */
  SysTick->CTRL;
 801142c:	4b05      	ldr	r3, [pc, #20]	@ (8011444 <SysTick_Handler+0x1c>)
 801142e:	681b      	ldr	r3, [r3, #0]

  if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED) {
 8011430:	f003 fa3c 	bl	80148ac <xTaskGetSchedulerState>
 8011434:	4603      	mov	r3, r0
 8011436:	2b01      	cmp	r3, #1
 8011438:	d001      	beq.n	801143e <SysTick_Handler+0x16>
    /* Call tick handler */
    xPortSysTickHandler();
 801143a:	f004 fc4d 	bl	8015cd8 <xPortSysTickHandler>
  }
}
 801143e:	bf00      	nop
 8011440:	bd80      	pop	{r7, pc}
 8011442:	bf00      	nop
 8011444:	e000e010 	.word	0xe000e010

08011448 <SVC_Setup>:
#endif /* SysTick */

/*
  Setup SVC to reset value.
*/
__STATIC_INLINE void SVC_Setup (void) {
 8011448:	b580      	push	{r7, lr}
 801144a:	af00      	add	r7, sp, #0
#if (__ARM_ARCH_7A__ == 0U)
  /* Service Call interrupt might be configured before kernel start     */
  /* and when its priority is lower or equal to BASEPRI, svc intruction */
  /* causes a Hard Fault.                                               */
  NVIC_SetPriority (SVCall_IRQ_NBR, 0U);
 801144c:	2100      	movs	r1, #0
 801144e:	f06f 0004 	mvn.w	r0, #4
 8011452:	f7ff ffbf 	bl	80113d4 <__NVIC_SetPriority>
#endif
}
 8011456:	bf00      	nop
 8011458:	bd80      	pop	{r7, pc}
	...

0801145c <osKernelInitialize>:
static uint32_t OS_Tick_GetOverflow (void);
/* Get OS Tick interval */
static uint32_t OS_Tick_GetInterval (void);
/*---------------------------------------------------------------------------*/

osStatus_t osKernelInitialize (void) {
 801145c:	b480      	push	{r7}
 801145e:	b083      	sub	sp, #12
 8011460:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011462:	f3ef 8305 	mrs	r3, IPSR
 8011466:	603b      	str	r3, [r7, #0]
  return(result);
 8011468:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 801146a:	2b00      	cmp	r3, #0
 801146c:	d003      	beq.n	8011476 <osKernelInitialize+0x1a>
    stat = osErrorISR;
 801146e:	f06f 0305 	mvn.w	r3, #5
 8011472:	607b      	str	r3, [r7, #4]
 8011474:	e00c      	b.n	8011490 <osKernelInitialize+0x34>
  }
  else {
    if (KernelState == osKernelInactive) {
 8011476:	4b0a      	ldr	r3, [pc, #40]	@ (80114a0 <osKernelInitialize+0x44>)
 8011478:	681b      	ldr	r3, [r3, #0]
 801147a:	2b00      	cmp	r3, #0
 801147c:	d105      	bne.n	801148a <osKernelInitialize+0x2e>
        EvrFreeRTOSSetup(0U);
      #endif
      #if defined(USE_FreeRTOS_HEAP_5) && (HEAP_5_REGION_SETUP == 1)
        vPortDefineHeapRegions (configHEAP_5_REGIONS);
      #endif
      KernelState = osKernelReady;
 801147e:	4b08      	ldr	r3, [pc, #32]	@ (80114a0 <osKernelInitialize+0x44>)
 8011480:	2201      	movs	r2, #1
 8011482:	601a      	str	r2, [r3, #0]
      stat = osOK;
 8011484:	2300      	movs	r3, #0
 8011486:	607b      	str	r3, [r7, #4]
 8011488:	e002      	b.n	8011490 <osKernelInitialize+0x34>
    } else {
      stat = osError;
 801148a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801148e:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 8011490:	687b      	ldr	r3, [r7, #4]
}
 8011492:	4618      	mov	r0, r3
 8011494:	370c      	adds	r7, #12
 8011496:	46bd      	mov	sp, r7
 8011498:	f85d 7b04 	ldr.w	r7, [sp], #4
 801149c:	4770      	bx	lr
 801149e:	bf00      	nop
 80114a0:	2400241c 	.word	0x2400241c

080114a4 <osKernelStart>:
  }

  return (state);
}

osStatus_t osKernelStart (void) {
 80114a4:	b580      	push	{r7, lr}
 80114a6:	b082      	sub	sp, #8
 80114a8:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80114aa:	f3ef 8305 	mrs	r3, IPSR
 80114ae:	603b      	str	r3, [r7, #0]
  return(result);
 80114b0:	683b      	ldr	r3, [r7, #0]
  osStatus_t stat;

  if (IS_IRQ()) {
 80114b2:	2b00      	cmp	r3, #0
 80114b4:	d003      	beq.n	80114be <osKernelStart+0x1a>
    stat = osErrorISR;
 80114b6:	f06f 0305 	mvn.w	r3, #5
 80114ba:	607b      	str	r3, [r7, #4]
 80114bc:	e010      	b.n	80114e0 <osKernelStart+0x3c>
  }
  else {
    if (KernelState == osKernelReady) {
 80114be:	4b0b      	ldr	r3, [pc, #44]	@ (80114ec <osKernelStart+0x48>)
 80114c0:	681b      	ldr	r3, [r3, #0]
 80114c2:	2b01      	cmp	r3, #1
 80114c4:	d109      	bne.n	80114da <osKernelStart+0x36>
      /* Ensure SVC priority is at the reset value */
      SVC_Setup();
 80114c6:	f7ff ffbf 	bl	8011448 <SVC_Setup>
      /* Change state to enable IRQ masking check */
      KernelState = osKernelRunning;
 80114ca:	4b08      	ldr	r3, [pc, #32]	@ (80114ec <osKernelStart+0x48>)
 80114cc:	2202      	movs	r2, #2
 80114ce:	601a      	str	r2, [r3, #0]
      /* Start the kernel scheduler */
      vTaskStartScheduler();
 80114d0:	f002 fd30 	bl	8013f34 <vTaskStartScheduler>
      stat = osOK;
 80114d4:	2300      	movs	r3, #0
 80114d6:	607b      	str	r3, [r7, #4]
 80114d8:	e002      	b.n	80114e0 <osKernelStart+0x3c>
    } else {
      stat = osError;
 80114da:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80114de:	607b      	str	r3, [r7, #4]
    }
  }

  return (stat);
 80114e0:	687b      	ldr	r3, [r7, #4]
}
 80114e2:	4618      	mov	r0, r3
 80114e4:	3708      	adds	r7, #8
 80114e6:	46bd      	mov	sp, r7
 80114e8:	bd80      	pop	{r7, pc}
 80114ea:	bf00      	nop
 80114ec:	2400241c 	.word	0x2400241c

080114f0 <osKernelGetTickCount>:
  }

  return (lock);
}

uint32_t osKernelGetTickCount (void) {
 80114f0:	b580      	push	{r7, lr}
 80114f2:	b082      	sub	sp, #8
 80114f4:	af00      	add	r7, sp, #0
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80114f6:	f3ef 8305 	mrs	r3, IPSR
 80114fa:	603b      	str	r3, [r7, #0]
  return(result);
 80114fc:	683b      	ldr	r3, [r7, #0]
  TickType_t ticks;

  if (IS_IRQ()) {
 80114fe:	2b00      	cmp	r3, #0
 8011500:	d003      	beq.n	801150a <osKernelGetTickCount+0x1a>
    ticks = xTaskGetTickCountFromISR();
 8011502:	f002 fe43 	bl	801418c <xTaskGetTickCountFromISR>
 8011506:	6078      	str	r0, [r7, #4]
 8011508:	e002      	b.n	8011510 <osKernelGetTickCount+0x20>
  } else {
    ticks = xTaskGetTickCount();
 801150a:	f002 fe2f 	bl	801416c <xTaskGetTickCount>
 801150e:	6078      	str	r0, [r7, #4]
  }

  return (ticks);
 8011510:	687b      	ldr	r3, [r7, #4]
}
 8011512:	4618      	mov	r0, r3
 8011514:	3708      	adds	r7, #8
 8011516:	46bd      	mov	sp, r7
 8011518:	bd80      	pop	{r7, pc}

0801151a <osThreadNew>:
  return (configCPU_CLOCK_HZ);
}

/*---------------------------------------------------------------------------*/

osThreadId_t osThreadNew (osThreadFunc_t func, void *argument, const osThreadAttr_t *attr) {
 801151a:	b580      	push	{r7, lr}
 801151c:	b08e      	sub	sp, #56	@ 0x38
 801151e:	af04      	add	r7, sp, #16
 8011520:	60f8      	str	r0, [r7, #12]
 8011522:	60b9      	str	r1, [r7, #8]
 8011524:	607a      	str	r2, [r7, #4]
  uint32_t stack;
  TaskHandle_t hTask;
  UBaseType_t prio;
  int32_t mem;

  hTask = NULL;
 8011526:	2300      	movs	r3, #0
 8011528:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801152a:	f3ef 8305 	mrs	r3, IPSR
 801152e:	617b      	str	r3, [r7, #20]
  return(result);
 8011530:	697b      	ldr	r3, [r7, #20]

  if (!IS_IRQ() && (func != NULL)) {
 8011532:	2b00      	cmp	r3, #0
 8011534:	d17f      	bne.n	8011636 <osThreadNew+0x11c>
 8011536:	68fb      	ldr	r3, [r7, #12]
 8011538:	2b00      	cmp	r3, #0
 801153a:	d07c      	beq.n	8011636 <osThreadNew+0x11c>
    stack = configMINIMAL_STACK_SIZE;
 801153c:	f44f 7300 	mov.w	r3, #512	@ 0x200
 8011540:	623b      	str	r3, [r7, #32]
    prio  = (UBaseType_t)osPriorityNormal;
 8011542:	2318      	movs	r3, #24
 8011544:	61fb      	str	r3, [r7, #28]

    name = NULL;
 8011546:	2300      	movs	r3, #0
 8011548:	627b      	str	r3, [r7, #36]	@ 0x24
    mem  = -1;
 801154a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801154e:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8011550:	687b      	ldr	r3, [r7, #4]
 8011552:	2b00      	cmp	r3, #0
 8011554:	d045      	beq.n	80115e2 <osThreadNew+0xc8>
      if (attr->name != NULL) {
 8011556:	687b      	ldr	r3, [r7, #4]
 8011558:	681b      	ldr	r3, [r3, #0]
 801155a:	2b00      	cmp	r3, #0
 801155c:	d002      	beq.n	8011564 <osThreadNew+0x4a>
        name = attr->name;
 801155e:	687b      	ldr	r3, [r7, #4]
 8011560:	681b      	ldr	r3, [r3, #0]
 8011562:	627b      	str	r3, [r7, #36]	@ 0x24
      }
      if (attr->priority != osPriorityNone) {
 8011564:	687b      	ldr	r3, [r7, #4]
 8011566:	699b      	ldr	r3, [r3, #24]
 8011568:	2b00      	cmp	r3, #0
 801156a:	d002      	beq.n	8011572 <osThreadNew+0x58>
        prio = (UBaseType_t)attr->priority;
 801156c:	687b      	ldr	r3, [r7, #4]
 801156e:	699b      	ldr	r3, [r3, #24]
 8011570:	61fb      	str	r3, [r7, #28]
      }

      if ((prio < osPriorityIdle) || (prio > osPriorityISR) || ((attr->attr_bits & osThreadJoinable) == osThreadJoinable)) {
 8011572:	69fb      	ldr	r3, [r7, #28]
 8011574:	2b00      	cmp	r3, #0
 8011576:	d008      	beq.n	801158a <osThreadNew+0x70>
 8011578:	69fb      	ldr	r3, [r7, #28]
 801157a:	2b38      	cmp	r3, #56	@ 0x38
 801157c:	d805      	bhi.n	801158a <osThreadNew+0x70>
 801157e:	687b      	ldr	r3, [r7, #4]
 8011580:	685b      	ldr	r3, [r3, #4]
 8011582:	f003 0301 	and.w	r3, r3, #1
 8011586:	2b00      	cmp	r3, #0
 8011588:	d001      	beq.n	801158e <osThreadNew+0x74>
        return (NULL);
 801158a:	2300      	movs	r3, #0
 801158c:	e054      	b.n	8011638 <osThreadNew+0x11e>
      }

      if (attr->stack_size > 0U) {
 801158e:	687b      	ldr	r3, [r7, #4]
 8011590:	695b      	ldr	r3, [r3, #20]
 8011592:	2b00      	cmp	r3, #0
 8011594:	d003      	beq.n	801159e <osThreadNew+0x84>
        /* In FreeRTOS stack is not in bytes, but in sizeof(StackType_t) which is 4 on ARM ports.       */
        /* Stack size should be therefore 4 byte aligned in order to avoid division caused side effects */
        stack = attr->stack_size / sizeof(StackType_t);
 8011596:	687b      	ldr	r3, [r7, #4]
 8011598:	695b      	ldr	r3, [r3, #20]
 801159a:	089b      	lsrs	r3, r3, #2
 801159c:	623b      	str	r3, [r7, #32]
      }

      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 801159e:	687b      	ldr	r3, [r7, #4]
 80115a0:	689b      	ldr	r3, [r3, #8]
 80115a2:	2b00      	cmp	r3, #0
 80115a4:	d00e      	beq.n	80115c4 <osThreadNew+0xaa>
 80115a6:	687b      	ldr	r3, [r7, #4]
 80115a8:	68db      	ldr	r3, [r3, #12]
 80115aa:	2ba7      	cmp	r3, #167	@ 0xa7
 80115ac:	d90a      	bls.n	80115c4 <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 80115ae:	687b      	ldr	r3, [r7, #4]
 80115b0:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem    != NULL) && (attr->cb_size    >= sizeof(StaticTask_t)) &&
 80115b2:	2b00      	cmp	r3, #0
 80115b4:	d006      	beq.n	80115c4 <osThreadNew+0xaa>
          (attr->stack_mem != NULL) && (attr->stack_size >  0U)) {
 80115b6:	687b      	ldr	r3, [r7, #4]
 80115b8:	695b      	ldr	r3, [r3, #20]
 80115ba:	2b00      	cmp	r3, #0
 80115bc:	d002      	beq.n	80115c4 <osThreadNew+0xaa>
        mem = 1;
 80115be:	2301      	movs	r3, #1
 80115c0:	61bb      	str	r3, [r7, #24]
 80115c2:	e010      	b.n	80115e6 <osThreadNew+0xcc>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) && (attr->stack_mem == NULL)) {
 80115c4:	687b      	ldr	r3, [r7, #4]
 80115c6:	689b      	ldr	r3, [r3, #8]
 80115c8:	2b00      	cmp	r3, #0
 80115ca:	d10c      	bne.n	80115e6 <osThreadNew+0xcc>
 80115cc:	687b      	ldr	r3, [r7, #4]
 80115ce:	68db      	ldr	r3, [r3, #12]
 80115d0:	2b00      	cmp	r3, #0
 80115d2:	d108      	bne.n	80115e6 <osThreadNew+0xcc>
 80115d4:	687b      	ldr	r3, [r7, #4]
 80115d6:	691b      	ldr	r3, [r3, #16]
 80115d8:	2b00      	cmp	r3, #0
 80115da:	d104      	bne.n	80115e6 <osThreadNew+0xcc>
          mem = 0;
 80115dc:	2300      	movs	r3, #0
 80115de:	61bb      	str	r3, [r7, #24]
 80115e0:	e001      	b.n	80115e6 <osThreadNew+0xcc>
        }
      }
    }
    else {
      mem = 0;
 80115e2:	2300      	movs	r3, #0
 80115e4:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 80115e6:	69bb      	ldr	r3, [r7, #24]
 80115e8:	2b01      	cmp	r3, #1
 80115ea:	d110      	bne.n	801160e <osThreadNew+0xf4>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 80115ec:	687b      	ldr	r3, [r7, #4]
 80115ee:	691b      	ldr	r3, [r3, #16]
                                                                                      (StaticTask_t *)attr->cb_mem);
 80115f0:	687a      	ldr	r2, [r7, #4]
 80115f2:	6892      	ldr	r2, [r2, #8]
        hTask = xTaskCreateStatic ((TaskFunction_t)func, name, stack, argument, prio, (StackType_t  *)attr->stack_mem,
 80115f4:	9202      	str	r2, [sp, #8]
 80115f6:	9301      	str	r3, [sp, #4]
 80115f8:	69fb      	ldr	r3, [r7, #28]
 80115fa:	9300      	str	r3, [sp, #0]
 80115fc:	68bb      	ldr	r3, [r7, #8]
 80115fe:	6a3a      	ldr	r2, [r7, #32]
 8011600:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8011602:	68f8      	ldr	r0, [r7, #12]
 8011604:	f002 faa2 	bl	8013b4c <xTaskCreateStatic>
 8011608:	4603      	mov	r3, r0
 801160a:	613b      	str	r3, [r7, #16]
 801160c:	e013      	b.n	8011636 <osThreadNew+0x11c>
      #endif
    }
    else {
      if (mem == 0) {
 801160e:	69bb      	ldr	r3, [r7, #24]
 8011610:	2b00      	cmp	r3, #0
 8011612:	d110      	bne.n	8011636 <osThreadNew+0x11c>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          if (xTaskCreate ((TaskFunction_t)func, name, (uint16_t)stack, argument, prio, &hTask) != pdPASS) {
 8011614:	6a3b      	ldr	r3, [r7, #32]
 8011616:	b29a      	uxth	r2, r3
 8011618:	f107 0310 	add.w	r3, r7, #16
 801161c:	9301      	str	r3, [sp, #4]
 801161e:	69fb      	ldr	r3, [r7, #28]
 8011620:	9300      	str	r3, [sp, #0]
 8011622:	68bb      	ldr	r3, [r7, #8]
 8011624:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8011626:	68f8      	ldr	r0, [r7, #12]
 8011628:	f002 faf0 	bl	8013c0c <xTaskCreate>
 801162c:	4603      	mov	r3, r0
 801162e:	2b01      	cmp	r3, #1
 8011630:	d001      	beq.n	8011636 <osThreadNew+0x11c>
            hTask = NULL;
 8011632:	2300      	movs	r3, #0
 8011634:	613b      	str	r3, [r7, #16]
        #endif
      }
    }
  }

  return ((osThreadId_t)hTask);
 8011636:	693b      	ldr	r3, [r7, #16]
}
 8011638:	4618      	mov	r0, r3
 801163a:	3728      	adds	r7, #40	@ 0x28
 801163c:	46bd      	mov	sp, r7
 801163e:	bd80      	pop	{r7, pc}

08011640 <osThreadGetId>:
  }

  return (name);
}

osThreadId_t osThreadGetId (void) {
 8011640:	b580      	push	{r7, lr}
 8011642:	b082      	sub	sp, #8
 8011644:	af00      	add	r7, sp, #0
  osThreadId_t id;

  id = (osThreadId_t)xTaskGetCurrentTaskHandle();
 8011646:	f003 f921 	bl	801488c <xTaskGetCurrentTaskHandle>
 801164a:	6078      	str	r0, [r7, #4]

  return (id);
 801164c:	687b      	ldr	r3, [r7, #4]
}
 801164e:	4618      	mov	r0, r3
 8011650:	3708      	adds	r7, #8
 8011652:	46bd      	mov	sp, r7
 8011654:	bd80      	pop	{r7, pc}

08011656 <osDelay>:
  /* Return flags before clearing */
  return (rflags);
}
#endif /* (configUSE_OS2_THREAD_FLAGS == 1) */

osStatus_t osDelay (uint32_t ticks) {
 8011656:	b580      	push	{r7, lr}
 8011658:	b084      	sub	sp, #16
 801165a:	af00      	add	r7, sp, #0
 801165c:	6078      	str	r0, [r7, #4]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 801165e:	f3ef 8305 	mrs	r3, IPSR
 8011662:	60bb      	str	r3, [r7, #8]
  return(result);
 8011664:	68bb      	ldr	r3, [r7, #8]
  osStatus_t stat;

  if (IS_IRQ()) {
 8011666:	2b00      	cmp	r3, #0
 8011668:	d003      	beq.n	8011672 <osDelay+0x1c>
    stat = osErrorISR;
 801166a:	f06f 0305 	mvn.w	r3, #5
 801166e:	60fb      	str	r3, [r7, #12]
 8011670:	e007      	b.n	8011682 <osDelay+0x2c>
  }
  else {
    stat = osOK;
 8011672:	2300      	movs	r3, #0
 8011674:	60fb      	str	r3, [r7, #12]

    if (ticks != 0U) {
 8011676:	687b      	ldr	r3, [r7, #4]
 8011678:	2b00      	cmp	r3, #0
 801167a:	d002      	beq.n	8011682 <osDelay+0x2c>
      vTaskDelay(ticks);
 801167c:	6878      	ldr	r0, [r7, #4]
 801167e:	f002 fc23 	bl	8013ec8 <vTaskDelay>
    }
  }

  return (stat);
 8011682:	68fb      	ldr	r3, [r7, #12]
}
 8011684:	4618      	mov	r0, r3
 8011686:	3710      	adds	r7, #16
 8011688:	46bd      	mov	sp, r7
 801168a:	bd80      	pop	{r7, pc}

0801168c <TimerCallback>:
}

/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_TIMER == 1)

static void TimerCallback (TimerHandle_t hTimer) {
 801168c:	b580      	push	{r7, lr}
 801168e:	b084      	sub	sp, #16
 8011690:	af00      	add	r7, sp, #0
 8011692:	6078      	str	r0, [r7, #4]
  TimerCallback_t *callb;

  callb = (TimerCallback_t *)pvTimerGetTimerID (hTimer);
 8011694:	6878      	ldr	r0, [r7, #4]
 8011696:	f004 f93b 	bl	8015910 <pvTimerGetTimerID>
 801169a:	60f8      	str	r0, [r7, #12]

  if (callb != NULL) {
 801169c:	68fb      	ldr	r3, [r7, #12]
 801169e:	2b00      	cmp	r3, #0
 80116a0:	d005      	beq.n	80116ae <TimerCallback+0x22>
    callb->func (callb->arg);
 80116a2:	68fb      	ldr	r3, [r7, #12]
 80116a4:	681b      	ldr	r3, [r3, #0]
 80116a6:	68fa      	ldr	r2, [r7, #12]
 80116a8:	6852      	ldr	r2, [r2, #4]
 80116aa:	4610      	mov	r0, r2
 80116ac:	4798      	blx	r3
  }
}
 80116ae:	bf00      	nop
 80116b0:	3710      	adds	r7, #16
 80116b2:	46bd      	mov	sp, r7
 80116b4:	bd80      	pop	{r7, pc}
	...

080116b8 <osTimerNew>:

osTimerId_t osTimerNew (osTimerFunc_t func, osTimerType_t type, void *argument, const osTimerAttr_t *attr) {
 80116b8:	b580      	push	{r7, lr}
 80116ba:	b08c      	sub	sp, #48	@ 0x30
 80116bc:	af02      	add	r7, sp, #8
 80116be:	60f8      	str	r0, [r7, #12]
 80116c0:	607a      	str	r2, [r7, #4]
 80116c2:	603b      	str	r3, [r7, #0]
 80116c4:	460b      	mov	r3, r1
 80116c6:	72fb      	strb	r3, [r7, #11]
  TimerHandle_t hTimer;
  TimerCallback_t *callb;
  UBaseType_t reload;
  int32_t mem;

  hTimer = NULL;
 80116c8:	2300      	movs	r3, #0
 80116ca:	623b      	str	r3, [r7, #32]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80116cc:	f3ef 8305 	mrs	r3, IPSR
 80116d0:	613b      	str	r3, [r7, #16]
  return(result);
 80116d2:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (func != NULL)) {
 80116d4:	2b00      	cmp	r3, #0
 80116d6:	d163      	bne.n	80117a0 <osTimerNew+0xe8>
 80116d8:	68fb      	ldr	r3, [r7, #12]
 80116da:	2b00      	cmp	r3, #0
 80116dc:	d060      	beq.n	80117a0 <osTimerNew+0xe8>
    /* Allocate memory to store callback function and argument */
    callb = pvPortMalloc (sizeof(TimerCallback_t));
 80116de:	2008      	movs	r0, #8
 80116e0:	f004 fb8c 	bl	8015dfc <pvPortMalloc>
 80116e4:	6178      	str	r0, [r7, #20]

    if (callb != NULL) {
 80116e6:	697b      	ldr	r3, [r7, #20]
 80116e8:	2b00      	cmp	r3, #0
 80116ea:	d059      	beq.n	80117a0 <osTimerNew+0xe8>
      callb->func = func;
 80116ec:	697b      	ldr	r3, [r7, #20]
 80116ee:	68fa      	ldr	r2, [r7, #12]
 80116f0:	601a      	str	r2, [r3, #0]
      callb->arg  = argument;
 80116f2:	697b      	ldr	r3, [r7, #20]
 80116f4:	687a      	ldr	r2, [r7, #4]
 80116f6:	605a      	str	r2, [r3, #4]

      if (type == osTimerOnce) {
 80116f8:	7afb      	ldrb	r3, [r7, #11]
 80116fa:	2b00      	cmp	r3, #0
 80116fc:	d102      	bne.n	8011704 <osTimerNew+0x4c>
        reload = pdFALSE;
 80116fe:	2300      	movs	r3, #0
 8011700:	61fb      	str	r3, [r7, #28]
 8011702:	e001      	b.n	8011708 <osTimerNew+0x50>
      } else {
        reload = pdTRUE;
 8011704:	2301      	movs	r3, #1
 8011706:	61fb      	str	r3, [r7, #28]
      }

      mem  = -1;
 8011708:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801170c:	61bb      	str	r3, [r7, #24]
      name = NULL;
 801170e:	2300      	movs	r3, #0
 8011710:	627b      	str	r3, [r7, #36]	@ 0x24

      if (attr != NULL) {
 8011712:	683b      	ldr	r3, [r7, #0]
 8011714:	2b00      	cmp	r3, #0
 8011716:	d01c      	beq.n	8011752 <osTimerNew+0x9a>
        if (attr->name != NULL) {
 8011718:	683b      	ldr	r3, [r7, #0]
 801171a:	681b      	ldr	r3, [r3, #0]
 801171c:	2b00      	cmp	r3, #0
 801171e:	d002      	beq.n	8011726 <osTimerNew+0x6e>
          name = attr->name;
 8011720:	683b      	ldr	r3, [r7, #0]
 8011722:	681b      	ldr	r3, [r3, #0]
 8011724:	627b      	str	r3, [r7, #36]	@ 0x24
        }

        if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticTimer_t))) {
 8011726:	683b      	ldr	r3, [r7, #0]
 8011728:	689b      	ldr	r3, [r3, #8]
 801172a:	2b00      	cmp	r3, #0
 801172c:	d006      	beq.n	801173c <osTimerNew+0x84>
 801172e:	683b      	ldr	r3, [r7, #0]
 8011730:	68db      	ldr	r3, [r3, #12]
 8011732:	2b2b      	cmp	r3, #43	@ 0x2b
 8011734:	d902      	bls.n	801173c <osTimerNew+0x84>
          mem = 1;
 8011736:	2301      	movs	r3, #1
 8011738:	61bb      	str	r3, [r7, #24]
 801173a:	e00c      	b.n	8011756 <osTimerNew+0x9e>
        }
        else {
          if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 801173c:	683b      	ldr	r3, [r7, #0]
 801173e:	689b      	ldr	r3, [r3, #8]
 8011740:	2b00      	cmp	r3, #0
 8011742:	d108      	bne.n	8011756 <osTimerNew+0x9e>
 8011744:	683b      	ldr	r3, [r7, #0]
 8011746:	68db      	ldr	r3, [r3, #12]
 8011748:	2b00      	cmp	r3, #0
 801174a:	d104      	bne.n	8011756 <osTimerNew+0x9e>
            mem = 0;
 801174c:	2300      	movs	r3, #0
 801174e:	61bb      	str	r3, [r7, #24]
 8011750:	e001      	b.n	8011756 <osTimerNew+0x9e>
          }
        }
      }
      else {
        mem = 0;
 8011752:	2300      	movs	r3, #0
 8011754:	61bb      	str	r3, [r7, #24]
      }

      if (mem == 1) {
 8011756:	69bb      	ldr	r3, [r7, #24]
 8011758:	2b01      	cmp	r3, #1
 801175a:	d10c      	bne.n	8011776 <osTimerNew+0xbe>
        #if (configSUPPORT_STATIC_ALLOCATION == 1)
          hTimer = xTimerCreateStatic (name, 1, reload, callb, TimerCallback, (StaticTimer_t *)attr->cb_mem);
 801175c:	683b      	ldr	r3, [r7, #0]
 801175e:	689b      	ldr	r3, [r3, #8]
 8011760:	9301      	str	r3, [sp, #4]
 8011762:	4b12      	ldr	r3, [pc, #72]	@ (80117ac <osTimerNew+0xf4>)
 8011764:	9300      	str	r3, [sp, #0]
 8011766:	697b      	ldr	r3, [r7, #20]
 8011768:	69fa      	ldr	r2, [r7, #28]
 801176a:	2101      	movs	r1, #1
 801176c:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801176e:	f003 fd18 	bl	80151a2 <xTimerCreateStatic>
 8011772:	6238      	str	r0, [r7, #32]
 8011774:	e00b      	b.n	801178e <osTimerNew+0xd6>
        #endif
      }
      else {
        if (mem == 0) {
 8011776:	69bb      	ldr	r3, [r7, #24]
 8011778:	2b00      	cmp	r3, #0
 801177a:	d108      	bne.n	801178e <osTimerNew+0xd6>
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hTimer = xTimerCreate (name, 1, reload, callb, TimerCallback);
 801177c:	4b0b      	ldr	r3, [pc, #44]	@ (80117ac <osTimerNew+0xf4>)
 801177e:	9300      	str	r3, [sp, #0]
 8011780:	697b      	ldr	r3, [r7, #20]
 8011782:	69fa      	ldr	r2, [r7, #28]
 8011784:	2101      	movs	r1, #1
 8011786:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8011788:	f003 fcea 	bl	8015160 <xTimerCreate>
 801178c:	6238      	str	r0, [r7, #32]
          #endif
        }
      }

      if ((hTimer == NULL) && (callb != NULL)) {
 801178e:	6a3b      	ldr	r3, [r7, #32]
 8011790:	2b00      	cmp	r3, #0
 8011792:	d105      	bne.n	80117a0 <osTimerNew+0xe8>
 8011794:	697b      	ldr	r3, [r7, #20]
 8011796:	2b00      	cmp	r3, #0
 8011798:	d002      	beq.n	80117a0 <osTimerNew+0xe8>
        vPortFree (callb);
 801179a:	6978      	ldr	r0, [r7, #20]
 801179c:	f004 fbfc 	bl	8015f98 <vPortFree>
      }
    }
  }

  return ((osTimerId_t)hTimer);
 80117a0:	6a3b      	ldr	r3, [r7, #32]
}
 80117a2:	4618      	mov	r0, r3
 80117a4:	3728      	adds	r7, #40	@ 0x28
 80117a6:	46bd      	mov	sp, r7
 80117a8:	bd80      	pop	{r7, pc}
 80117aa:	bf00      	nop
 80117ac:	0801168d 	.word	0x0801168d

080117b0 <osTimerStart>:
  }

  return (p);
}

osStatus_t osTimerStart (osTimerId_t timer_id, uint32_t ticks) {
 80117b0:	b580      	push	{r7, lr}
 80117b2:	b088      	sub	sp, #32
 80117b4:	af02      	add	r7, sp, #8
 80117b6:	6078      	str	r0, [r7, #4]
 80117b8:	6039      	str	r1, [r7, #0]
  TimerHandle_t hTimer = (TimerHandle_t)timer_id;
 80117ba:	687b      	ldr	r3, [r7, #4]
 80117bc:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80117be:	f3ef 8305 	mrs	r3, IPSR
 80117c2:	60fb      	str	r3, [r7, #12]
  return(result);
 80117c4:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

  if (IS_IRQ()) {
 80117c6:	2b00      	cmp	r3, #0
 80117c8:	d003      	beq.n	80117d2 <osTimerStart+0x22>
    stat = osErrorISR;
 80117ca:	f06f 0305 	mvn.w	r3, #5
 80117ce:	617b      	str	r3, [r7, #20]
 80117d0:	e017      	b.n	8011802 <osTimerStart+0x52>
  }
  else if (hTimer == NULL) {
 80117d2:	693b      	ldr	r3, [r7, #16]
 80117d4:	2b00      	cmp	r3, #0
 80117d6:	d103      	bne.n	80117e0 <osTimerStart+0x30>
    stat = osErrorParameter;
 80117d8:	f06f 0303 	mvn.w	r3, #3
 80117dc:	617b      	str	r3, [r7, #20]
 80117de:	e010      	b.n	8011802 <osTimerStart+0x52>
  }
  else {
    if (xTimerChangePeriod (hTimer, ticks, 0) == pdPASS) {
 80117e0:	2300      	movs	r3, #0
 80117e2:	9300      	str	r3, [sp, #0]
 80117e4:	2300      	movs	r3, #0
 80117e6:	683a      	ldr	r2, [r7, #0]
 80117e8:	2104      	movs	r1, #4
 80117ea:	6938      	ldr	r0, [r7, #16]
 80117ec:	f003 fd56 	bl	801529c <xTimerGenericCommand>
 80117f0:	4603      	mov	r3, r0
 80117f2:	2b01      	cmp	r3, #1
 80117f4:	d102      	bne.n	80117fc <osTimerStart+0x4c>
      stat = osOK;
 80117f6:	2300      	movs	r3, #0
 80117f8:	617b      	str	r3, [r7, #20]
 80117fa:	e002      	b.n	8011802 <osTimerStart+0x52>
    } else {
      stat = osErrorResource;
 80117fc:	f06f 0302 	mvn.w	r3, #2
 8011800:	617b      	str	r3, [r7, #20]
    }
  }

  return (stat);
 8011802:	697b      	ldr	r3, [r7, #20]
}
 8011804:	4618      	mov	r0, r3
 8011806:	3718      	adds	r7, #24
 8011808:	46bd      	mov	sp, r7
 801180a:	bd80      	pop	{r7, pc}

0801180c <osTimerStop>:

osStatus_t osTimerStop (osTimerId_t timer_id) {
 801180c:	b580      	push	{r7, lr}
 801180e:	b088      	sub	sp, #32
 8011810:	af02      	add	r7, sp, #8
 8011812:	6078      	str	r0, [r7, #4]
  TimerHandle_t hTimer = (TimerHandle_t)timer_id;
 8011814:	687b      	ldr	r3, [r7, #4]
 8011816:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011818:	f3ef 8305 	mrs	r3, IPSR
 801181c:	60fb      	str	r3, [r7, #12]
  return(result);
 801181e:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

  if (IS_IRQ()) {
 8011820:	2b00      	cmp	r3, #0
 8011822:	d003      	beq.n	801182c <osTimerStop+0x20>
    stat = osErrorISR;
 8011824:	f06f 0305 	mvn.w	r3, #5
 8011828:	617b      	str	r3, [r7, #20]
 801182a:	e021      	b.n	8011870 <osTimerStop+0x64>
  }
  else if (hTimer == NULL) {
 801182c:	693b      	ldr	r3, [r7, #16]
 801182e:	2b00      	cmp	r3, #0
 8011830:	d103      	bne.n	801183a <osTimerStop+0x2e>
    stat = osErrorParameter;
 8011832:	f06f 0303 	mvn.w	r3, #3
 8011836:	617b      	str	r3, [r7, #20]
 8011838:	e01a      	b.n	8011870 <osTimerStop+0x64>
  }
  else {
    if (xTimerIsTimerActive (hTimer) == pdFALSE) {
 801183a:	6938      	ldr	r0, [r7, #16]
 801183c:	f004 f83e 	bl	80158bc <xTimerIsTimerActive>
 8011840:	4603      	mov	r3, r0
 8011842:	2b00      	cmp	r3, #0
 8011844:	d103      	bne.n	801184e <osTimerStop+0x42>
      stat = osErrorResource;
 8011846:	f06f 0302 	mvn.w	r3, #2
 801184a:	617b      	str	r3, [r7, #20]
 801184c:	e010      	b.n	8011870 <osTimerStop+0x64>
    }
    else {
      if (xTimerStop (hTimer, 0) == pdPASS) {
 801184e:	2300      	movs	r3, #0
 8011850:	9300      	str	r3, [sp, #0]
 8011852:	2300      	movs	r3, #0
 8011854:	2200      	movs	r2, #0
 8011856:	2103      	movs	r1, #3
 8011858:	6938      	ldr	r0, [r7, #16]
 801185a:	f003 fd1f 	bl	801529c <xTimerGenericCommand>
 801185e:	4603      	mov	r3, r0
 8011860:	2b01      	cmp	r3, #1
 8011862:	d102      	bne.n	801186a <osTimerStop+0x5e>
        stat = osOK;
 8011864:	2300      	movs	r3, #0
 8011866:	617b      	str	r3, [r7, #20]
 8011868:	e002      	b.n	8011870 <osTimerStop+0x64>
      } else {
        stat = osError;
 801186a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801186e:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 8011870:	697b      	ldr	r3, [r7, #20]
}
 8011872:	4618      	mov	r0, r3
 8011874:	3718      	adds	r7, #24
 8011876:	46bd      	mov	sp, r7
 8011878:	bd80      	pop	{r7, pc}

0801187a <osMutexNew>:
}

/*---------------------------------------------------------------------------*/
#if (configUSE_OS2_MUTEX == 1)

osMutexId_t osMutexNew (const osMutexAttr_t *attr) {
 801187a:	b580      	push	{r7, lr}
 801187c:	b088      	sub	sp, #32
 801187e:	af00      	add	r7, sp, #0
 8011880:	6078      	str	r0, [r7, #4]
  int32_t  mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hMutex = NULL;
 8011882:	2300      	movs	r3, #0
 8011884:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011886:	f3ef 8305 	mrs	r3, IPSR
 801188a:	60bb      	str	r3, [r7, #8]
  return(result);
 801188c:	68bb      	ldr	r3, [r7, #8]

  if (!IS_IRQ()) {
 801188e:	2b00      	cmp	r3, #0
 8011890:	d174      	bne.n	801197c <osMutexNew+0x102>
    if (attr != NULL) {
 8011892:	687b      	ldr	r3, [r7, #4]
 8011894:	2b00      	cmp	r3, #0
 8011896:	d003      	beq.n	80118a0 <osMutexNew+0x26>
      type = attr->attr_bits;
 8011898:	687b      	ldr	r3, [r7, #4]
 801189a:	685b      	ldr	r3, [r3, #4]
 801189c:	61bb      	str	r3, [r7, #24]
 801189e:	e001      	b.n	80118a4 <osMutexNew+0x2a>
    } else {
      type = 0U;
 80118a0:	2300      	movs	r3, #0
 80118a2:	61bb      	str	r3, [r7, #24]
    }

    if ((type & osMutexRecursive) == osMutexRecursive) {
 80118a4:	69bb      	ldr	r3, [r7, #24]
 80118a6:	f003 0301 	and.w	r3, r3, #1
 80118aa:	2b00      	cmp	r3, #0
 80118ac:	d002      	beq.n	80118b4 <osMutexNew+0x3a>
      rmtx = 1U;
 80118ae:	2301      	movs	r3, #1
 80118b0:	617b      	str	r3, [r7, #20]
 80118b2:	e001      	b.n	80118b8 <osMutexNew+0x3e>
    } else {
      rmtx = 0U;
 80118b4:	2300      	movs	r3, #0
 80118b6:	617b      	str	r3, [r7, #20]
    }

    if ((type & osMutexRobust) != osMutexRobust) {
 80118b8:	69bb      	ldr	r3, [r7, #24]
 80118ba:	f003 0308 	and.w	r3, r3, #8
 80118be:	2b00      	cmp	r3, #0
 80118c0:	d15c      	bne.n	801197c <osMutexNew+0x102>
      mem = -1;
 80118c2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80118c6:	613b      	str	r3, [r7, #16]

      if (attr != NULL) {
 80118c8:	687b      	ldr	r3, [r7, #4]
 80118ca:	2b00      	cmp	r3, #0
 80118cc:	d015      	beq.n	80118fa <osMutexNew+0x80>
        if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 80118ce:	687b      	ldr	r3, [r7, #4]
 80118d0:	689b      	ldr	r3, [r3, #8]
 80118d2:	2b00      	cmp	r3, #0
 80118d4:	d006      	beq.n	80118e4 <osMutexNew+0x6a>
 80118d6:	687b      	ldr	r3, [r7, #4]
 80118d8:	68db      	ldr	r3, [r3, #12]
 80118da:	2b4f      	cmp	r3, #79	@ 0x4f
 80118dc:	d902      	bls.n	80118e4 <osMutexNew+0x6a>
          mem = 1;
 80118de:	2301      	movs	r3, #1
 80118e0:	613b      	str	r3, [r7, #16]
 80118e2:	e00c      	b.n	80118fe <osMutexNew+0x84>
        }
        else {
          if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 80118e4:	687b      	ldr	r3, [r7, #4]
 80118e6:	689b      	ldr	r3, [r3, #8]
 80118e8:	2b00      	cmp	r3, #0
 80118ea:	d108      	bne.n	80118fe <osMutexNew+0x84>
 80118ec:	687b      	ldr	r3, [r7, #4]
 80118ee:	68db      	ldr	r3, [r3, #12]
 80118f0:	2b00      	cmp	r3, #0
 80118f2:	d104      	bne.n	80118fe <osMutexNew+0x84>
            mem = 0;
 80118f4:	2300      	movs	r3, #0
 80118f6:	613b      	str	r3, [r7, #16]
 80118f8:	e001      	b.n	80118fe <osMutexNew+0x84>
          }
        }
      }
      else {
        mem = 0;
 80118fa:	2300      	movs	r3, #0
 80118fc:	613b      	str	r3, [r7, #16]
      }

      if (mem == 1) {
 80118fe:	693b      	ldr	r3, [r7, #16]
 8011900:	2b01      	cmp	r3, #1
 8011902:	d112      	bne.n	801192a <osMutexNew+0xb0>
        #if (configSUPPORT_STATIC_ALLOCATION == 1)
          if (rmtx != 0U) {
 8011904:	697b      	ldr	r3, [r7, #20]
 8011906:	2b00      	cmp	r3, #0
 8011908:	d007      	beq.n	801191a <osMutexNew+0xa0>
            #if (configUSE_RECURSIVE_MUTEXES == 1)
            hMutex = xSemaphoreCreateRecursiveMutexStatic (attr->cb_mem);
 801190a:	687b      	ldr	r3, [r7, #4]
 801190c:	689b      	ldr	r3, [r3, #8]
 801190e:	4619      	mov	r1, r3
 8011910:	2004      	movs	r0, #4
 8011912:	f000 fdd8 	bl	80124c6 <xQueueCreateMutexStatic>
 8011916:	61f8      	str	r0, [r7, #28]
 8011918:	e016      	b.n	8011948 <osMutexNew+0xce>
            #endif
          }
          else {
            hMutex = xSemaphoreCreateMutexStatic (attr->cb_mem);
 801191a:	687b      	ldr	r3, [r7, #4]
 801191c:	689b      	ldr	r3, [r3, #8]
 801191e:	4619      	mov	r1, r3
 8011920:	2001      	movs	r0, #1
 8011922:	f000 fdd0 	bl	80124c6 <xQueueCreateMutexStatic>
 8011926:	61f8      	str	r0, [r7, #28]
 8011928:	e00e      	b.n	8011948 <osMutexNew+0xce>
          }
        #endif
      }
      else {
        if (mem == 0) {
 801192a:	693b      	ldr	r3, [r7, #16]
 801192c:	2b00      	cmp	r3, #0
 801192e:	d10b      	bne.n	8011948 <osMutexNew+0xce>
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            if (rmtx != 0U) {
 8011930:	697b      	ldr	r3, [r7, #20]
 8011932:	2b00      	cmp	r3, #0
 8011934:	d004      	beq.n	8011940 <osMutexNew+0xc6>
              #if (configUSE_RECURSIVE_MUTEXES == 1)
              hMutex = xSemaphoreCreateRecursiveMutex ();
 8011936:	2004      	movs	r0, #4
 8011938:	f000 fdad 	bl	8012496 <xQueueCreateMutex>
 801193c:	61f8      	str	r0, [r7, #28]
 801193e:	e003      	b.n	8011948 <osMutexNew+0xce>
              #endif
            } else {
              hMutex = xSemaphoreCreateMutex ();
 8011940:	2001      	movs	r0, #1
 8011942:	f000 fda8 	bl	8012496 <xQueueCreateMutex>
 8011946:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }

      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hMutex != NULL) {
 8011948:	69fb      	ldr	r3, [r7, #28]
 801194a:	2b00      	cmp	r3, #0
 801194c:	d00c      	beq.n	8011968 <osMutexNew+0xee>
        if (attr != NULL) {
 801194e:	687b      	ldr	r3, [r7, #4]
 8011950:	2b00      	cmp	r3, #0
 8011952:	d003      	beq.n	801195c <osMutexNew+0xe2>
          name = attr->name;
 8011954:	687b      	ldr	r3, [r7, #4]
 8011956:	681b      	ldr	r3, [r3, #0]
 8011958:	60fb      	str	r3, [r7, #12]
 801195a:	e001      	b.n	8011960 <osMutexNew+0xe6>
        } else {
          name = NULL;
 801195c:	2300      	movs	r3, #0
 801195e:	60fb      	str	r3, [r7, #12]
        }
        vQueueAddToRegistry (hMutex, name);
 8011960:	68f9      	ldr	r1, [r7, #12]
 8011962:	69f8      	ldr	r0, [r7, #28]
 8011964:	f001 fcd2 	bl	801330c <vQueueAddToRegistry>
      }
      #endif

      if ((hMutex != NULL) && (rmtx != 0U)) {
 8011968:	69fb      	ldr	r3, [r7, #28]
 801196a:	2b00      	cmp	r3, #0
 801196c:	d006      	beq.n	801197c <osMutexNew+0x102>
 801196e:	697b      	ldr	r3, [r7, #20]
 8011970:	2b00      	cmp	r3, #0
 8011972:	d003      	beq.n	801197c <osMutexNew+0x102>
        hMutex = (SemaphoreHandle_t)((uint32_t)hMutex | 1U);
 8011974:	69fb      	ldr	r3, [r7, #28]
 8011976:	f043 0301 	orr.w	r3, r3, #1
 801197a:	61fb      	str	r3, [r7, #28]
      }
    }
  }

  return ((osMutexId_t)hMutex);
 801197c:	69fb      	ldr	r3, [r7, #28]
}
 801197e:	4618      	mov	r0, r3
 8011980:	3720      	adds	r7, #32
 8011982:	46bd      	mov	sp, r7
 8011984:	bd80      	pop	{r7, pc}

08011986 <osMutexAcquire>:

osStatus_t osMutexAcquire (osMutexId_t mutex_id, uint32_t timeout) {
 8011986:	b580      	push	{r7, lr}
 8011988:	b086      	sub	sp, #24
 801198a:	af00      	add	r7, sp, #0
 801198c:	6078      	str	r0, [r7, #4]
 801198e:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 8011990:	687b      	ldr	r3, [r7, #4]
 8011992:	f023 0301 	bic.w	r3, r3, #1
 8011996:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 8011998:	687b      	ldr	r3, [r7, #4]
 801199a:	f003 0301 	and.w	r3, r3, #1
 801199e:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 80119a0:	2300      	movs	r3, #0
 80119a2:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 80119a4:	f3ef 8305 	mrs	r3, IPSR
 80119a8:	60bb      	str	r3, [r7, #8]
  return(result);
 80119aa:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 80119ac:	2b00      	cmp	r3, #0
 80119ae:	d003      	beq.n	80119b8 <osMutexAcquire+0x32>
    stat = osErrorISR;
 80119b0:	f06f 0305 	mvn.w	r3, #5
 80119b4:	617b      	str	r3, [r7, #20]
 80119b6:	e02c      	b.n	8011a12 <osMutexAcquire+0x8c>
  }
  else if (hMutex == NULL) {
 80119b8:	693b      	ldr	r3, [r7, #16]
 80119ba:	2b00      	cmp	r3, #0
 80119bc:	d103      	bne.n	80119c6 <osMutexAcquire+0x40>
    stat = osErrorParameter;
 80119be:	f06f 0303 	mvn.w	r3, #3
 80119c2:	617b      	str	r3, [r7, #20]
 80119c4:	e025      	b.n	8011a12 <osMutexAcquire+0x8c>
  }
  else {
    if (rmtx != 0U) {
 80119c6:	68fb      	ldr	r3, [r7, #12]
 80119c8:	2b00      	cmp	r3, #0
 80119ca:	d011      	beq.n	80119f0 <osMutexAcquire+0x6a>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreTakeRecursive (hMutex, timeout) != pdPASS) {
 80119cc:	6839      	ldr	r1, [r7, #0]
 80119ce:	6938      	ldr	r0, [r7, #16]
 80119d0:	f000 fdc9 	bl	8012566 <xQueueTakeMutexRecursive>
 80119d4:	4603      	mov	r3, r0
 80119d6:	2b01      	cmp	r3, #1
 80119d8:	d01b      	beq.n	8011a12 <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 80119da:	683b      	ldr	r3, [r7, #0]
 80119dc:	2b00      	cmp	r3, #0
 80119de:	d003      	beq.n	80119e8 <osMutexAcquire+0x62>
          stat = osErrorTimeout;
 80119e0:	f06f 0301 	mvn.w	r3, #1
 80119e4:	617b      	str	r3, [r7, #20]
 80119e6:	e014      	b.n	8011a12 <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 80119e8:	f06f 0302 	mvn.w	r3, #2
 80119ec:	617b      	str	r3, [r7, #20]
 80119ee:	e010      	b.n	8011a12 <osMutexAcquire+0x8c>
        }
      }
      #endif
    }
    else {
      if (xSemaphoreTake (hMutex, timeout) != pdPASS) {
 80119f0:	6839      	ldr	r1, [r7, #0]
 80119f2:	6938      	ldr	r0, [r7, #16]
 80119f4:	f001 f96e 	bl	8012cd4 <xQueueSemaphoreTake>
 80119f8:	4603      	mov	r3, r0
 80119fa:	2b01      	cmp	r3, #1
 80119fc:	d009      	beq.n	8011a12 <osMutexAcquire+0x8c>
        if (timeout != 0U) {
 80119fe:	683b      	ldr	r3, [r7, #0]
 8011a00:	2b00      	cmp	r3, #0
 8011a02:	d003      	beq.n	8011a0c <osMutexAcquire+0x86>
          stat = osErrorTimeout;
 8011a04:	f06f 0301 	mvn.w	r3, #1
 8011a08:	617b      	str	r3, [r7, #20]
 8011a0a:	e002      	b.n	8011a12 <osMutexAcquire+0x8c>
        } else {
          stat = osErrorResource;
 8011a0c:	f06f 0302 	mvn.w	r3, #2
 8011a10:	617b      	str	r3, [r7, #20]
        }
      }
    }
  }

  return (stat);
 8011a12:	697b      	ldr	r3, [r7, #20]
}
 8011a14:	4618      	mov	r0, r3
 8011a16:	3718      	adds	r7, #24
 8011a18:	46bd      	mov	sp, r7
 8011a1a:	bd80      	pop	{r7, pc}

08011a1c <osMutexRelease>:

osStatus_t osMutexRelease (osMutexId_t mutex_id) {
 8011a1c:	b580      	push	{r7, lr}
 8011a1e:	b086      	sub	sp, #24
 8011a20:	af00      	add	r7, sp, #0
 8011a22:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hMutex;
  osStatus_t stat;
  uint32_t rmtx;

  hMutex = (SemaphoreHandle_t)((uint32_t)mutex_id & ~1U);
 8011a24:	687b      	ldr	r3, [r7, #4]
 8011a26:	f023 0301 	bic.w	r3, r3, #1
 8011a2a:	613b      	str	r3, [r7, #16]

  rmtx = (uint32_t)mutex_id & 1U;
 8011a2c:	687b      	ldr	r3, [r7, #4]
 8011a2e:	f003 0301 	and.w	r3, r3, #1
 8011a32:	60fb      	str	r3, [r7, #12]

  stat = osOK;
 8011a34:	2300      	movs	r3, #0
 8011a36:	617b      	str	r3, [r7, #20]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011a38:	f3ef 8305 	mrs	r3, IPSR
 8011a3c:	60bb      	str	r3, [r7, #8]
  return(result);
 8011a3e:	68bb      	ldr	r3, [r7, #8]

  if (IS_IRQ()) {
 8011a40:	2b00      	cmp	r3, #0
 8011a42:	d003      	beq.n	8011a4c <osMutexRelease+0x30>
    stat = osErrorISR;
 8011a44:	f06f 0305 	mvn.w	r3, #5
 8011a48:	617b      	str	r3, [r7, #20]
 8011a4a:	e01f      	b.n	8011a8c <osMutexRelease+0x70>
  }
  else if (hMutex == NULL) {
 8011a4c:	693b      	ldr	r3, [r7, #16]
 8011a4e:	2b00      	cmp	r3, #0
 8011a50:	d103      	bne.n	8011a5a <osMutexRelease+0x3e>
    stat = osErrorParameter;
 8011a52:	f06f 0303 	mvn.w	r3, #3
 8011a56:	617b      	str	r3, [r7, #20]
 8011a58:	e018      	b.n	8011a8c <osMutexRelease+0x70>
  }
  else {
    if (rmtx != 0U) {
 8011a5a:	68fb      	ldr	r3, [r7, #12]
 8011a5c:	2b00      	cmp	r3, #0
 8011a5e:	d009      	beq.n	8011a74 <osMutexRelease+0x58>
      #if (configUSE_RECURSIVE_MUTEXES == 1)
      if (xSemaphoreGiveRecursive (hMutex) != pdPASS) {
 8011a60:	6938      	ldr	r0, [r7, #16]
 8011a62:	f000 fd4b 	bl	80124fc <xQueueGiveMutexRecursive>
 8011a66:	4603      	mov	r3, r0
 8011a68:	2b01      	cmp	r3, #1
 8011a6a:	d00f      	beq.n	8011a8c <osMutexRelease+0x70>
        stat = osErrorResource;
 8011a6c:	f06f 0302 	mvn.w	r3, #2
 8011a70:	617b      	str	r3, [r7, #20]
 8011a72:	e00b      	b.n	8011a8c <osMutexRelease+0x70>
      }
      #endif
    }
    else {
      if (xSemaphoreGive (hMutex) != pdPASS) {
 8011a74:	2300      	movs	r3, #0
 8011a76:	2200      	movs	r2, #0
 8011a78:	2100      	movs	r1, #0
 8011a7a:	6938      	ldr	r0, [r7, #16]
 8011a7c:	f000 fe18 	bl	80126b0 <xQueueGenericSend>
 8011a80:	4603      	mov	r3, r0
 8011a82:	2b01      	cmp	r3, #1
 8011a84:	d002      	beq.n	8011a8c <osMutexRelease+0x70>
        stat = osErrorResource;
 8011a86:	f06f 0302 	mvn.w	r3, #2
 8011a8a:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 8011a8c:	697b      	ldr	r3, [r7, #20]
}
 8011a8e:	4618      	mov	r0, r3
 8011a90:	3718      	adds	r7, #24
 8011a92:	46bd      	mov	sp, r7
 8011a94:	bd80      	pop	{r7, pc}

08011a96 <osSemaphoreNew>:
}
#endif /* (configUSE_OS2_MUTEX == 1) */

/*---------------------------------------------------------------------------*/

osSemaphoreId_t osSemaphoreNew (uint32_t max_count, uint32_t initial_count, const osSemaphoreAttr_t *attr) {
 8011a96:	b580      	push	{r7, lr}
 8011a98:	b08a      	sub	sp, #40	@ 0x28
 8011a9a:	af02      	add	r7, sp, #8
 8011a9c:	60f8      	str	r0, [r7, #12]
 8011a9e:	60b9      	str	r1, [r7, #8]
 8011aa0:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hSemaphore = NULL;
 8011aa2:	2300      	movs	r3, #0
 8011aa4:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011aa6:	f3ef 8305 	mrs	r3, IPSR
 8011aaa:	613b      	str	r3, [r7, #16]
  return(result);
 8011aac:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (max_count > 0U) && (initial_count <= max_count)) {
 8011aae:	2b00      	cmp	r3, #0
 8011ab0:	d175      	bne.n	8011b9e <osSemaphoreNew+0x108>
 8011ab2:	68fb      	ldr	r3, [r7, #12]
 8011ab4:	2b00      	cmp	r3, #0
 8011ab6:	d072      	beq.n	8011b9e <osSemaphoreNew+0x108>
 8011ab8:	68ba      	ldr	r2, [r7, #8]
 8011aba:	68fb      	ldr	r3, [r7, #12]
 8011abc:	429a      	cmp	r2, r3
 8011abe:	d86e      	bhi.n	8011b9e <osSemaphoreNew+0x108>
    mem = -1;
 8011ac0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8011ac4:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8011ac6:	687b      	ldr	r3, [r7, #4]
 8011ac8:	2b00      	cmp	r3, #0
 8011aca:	d015      	beq.n	8011af8 <osSemaphoreNew+0x62>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticSemaphore_t))) {
 8011acc:	687b      	ldr	r3, [r7, #4]
 8011ace:	689b      	ldr	r3, [r3, #8]
 8011ad0:	2b00      	cmp	r3, #0
 8011ad2:	d006      	beq.n	8011ae2 <osSemaphoreNew+0x4c>
 8011ad4:	687b      	ldr	r3, [r7, #4]
 8011ad6:	68db      	ldr	r3, [r3, #12]
 8011ad8:	2b4f      	cmp	r3, #79	@ 0x4f
 8011ada:	d902      	bls.n	8011ae2 <osSemaphoreNew+0x4c>
        mem = 1;
 8011adc:	2301      	movs	r3, #1
 8011ade:	61bb      	str	r3, [r7, #24]
 8011ae0:	e00c      	b.n	8011afc <osSemaphoreNew+0x66>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U)) {
 8011ae2:	687b      	ldr	r3, [r7, #4]
 8011ae4:	689b      	ldr	r3, [r3, #8]
 8011ae6:	2b00      	cmp	r3, #0
 8011ae8:	d108      	bne.n	8011afc <osSemaphoreNew+0x66>
 8011aea:	687b      	ldr	r3, [r7, #4]
 8011aec:	68db      	ldr	r3, [r3, #12]
 8011aee:	2b00      	cmp	r3, #0
 8011af0:	d104      	bne.n	8011afc <osSemaphoreNew+0x66>
          mem = 0;
 8011af2:	2300      	movs	r3, #0
 8011af4:	61bb      	str	r3, [r7, #24]
 8011af6:	e001      	b.n	8011afc <osSemaphoreNew+0x66>
        }
      }
    }
    else {
      mem = 0;
 8011af8:	2300      	movs	r3, #0
 8011afa:	61bb      	str	r3, [r7, #24]
    }

    if (mem != -1) {
 8011afc:	69bb      	ldr	r3, [r7, #24]
 8011afe:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8011b02:	d04c      	beq.n	8011b9e <osSemaphoreNew+0x108>
      if (max_count == 1U) {
 8011b04:	68fb      	ldr	r3, [r7, #12]
 8011b06:	2b01      	cmp	r3, #1
 8011b08:	d128      	bne.n	8011b5c <osSemaphoreNew+0xc6>
        if (mem == 1) {
 8011b0a:	69bb      	ldr	r3, [r7, #24]
 8011b0c:	2b01      	cmp	r3, #1
 8011b0e:	d10a      	bne.n	8011b26 <osSemaphoreNew+0x90>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinaryStatic ((StaticSemaphore_t *)attr->cb_mem);
 8011b10:	687b      	ldr	r3, [r7, #4]
 8011b12:	689b      	ldr	r3, [r3, #8]
 8011b14:	2203      	movs	r2, #3
 8011b16:	9200      	str	r2, [sp, #0]
 8011b18:	2200      	movs	r2, #0
 8011b1a:	2100      	movs	r1, #0
 8011b1c:	2001      	movs	r0, #1
 8011b1e:	f000 fbc5 	bl	80122ac <xQueueGenericCreateStatic>
 8011b22:	61f8      	str	r0, [r7, #28]
 8011b24:	e005      	b.n	8011b32 <osSemaphoreNew+0x9c>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateBinary();
 8011b26:	2203      	movs	r2, #3
 8011b28:	2100      	movs	r1, #0
 8011b2a:	2001      	movs	r0, #1
 8011b2c:	f000 fc3b 	bl	80123a6 <xQueueGenericCreate>
 8011b30:	61f8      	str	r0, [r7, #28]
          #endif
        }

        if ((hSemaphore != NULL) && (initial_count != 0U)) {
 8011b32:	69fb      	ldr	r3, [r7, #28]
 8011b34:	2b00      	cmp	r3, #0
 8011b36:	d022      	beq.n	8011b7e <osSemaphoreNew+0xe8>
 8011b38:	68bb      	ldr	r3, [r7, #8]
 8011b3a:	2b00      	cmp	r3, #0
 8011b3c:	d01f      	beq.n	8011b7e <osSemaphoreNew+0xe8>
          if (xSemaphoreGive (hSemaphore) != pdPASS) {
 8011b3e:	2300      	movs	r3, #0
 8011b40:	2200      	movs	r2, #0
 8011b42:	2100      	movs	r1, #0
 8011b44:	69f8      	ldr	r0, [r7, #28]
 8011b46:	f000 fdb3 	bl	80126b0 <xQueueGenericSend>
 8011b4a:	4603      	mov	r3, r0
 8011b4c:	2b01      	cmp	r3, #1
 8011b4e:	d016      	beq.n	8011b7e <osSemaphoreNew+0xe8>
            vSemaphoreDelete (hSemaphore);
 8011b50:	69f8      	ldr	r0, [r7, #28]
 8011b52:	f001 fa8f 	bl	8013074 <vQueueDelete>
            hSemaphore = NULL;
 8011b56:	2300      	movs	r3, #0
 8011b58:	61fb      	str	r3, [r7, #28]
 8011b5a:	e010      	b.n	8011b7e <osSemaphoreNew+0xe8>
          }
        }
      }
      else {
        if (mem == 1) {
 8011b5c:	69bb      	ldr	r3, [r7, #24]
 8011b5e:	2b01      	cmp	r3, #1
 8011b60:	d108      	bne.n	8011b74 <osSemaphoreNew+0xde>
          #if (configSUPPORT_STATIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCountingStatic (max_count, initial_count, (StaticSemaphore_t *)attr->cb_mem);
 8011b62:	687b      	ldr	r3, [r7, #4]
 8011b64:	689b      	ldr	r3, [r3, #8]
 8011b66:	461a      	mov	r2, r3
 8011b68:	68b9      	ldr	r1, [r7, #8]
 8011b6a:	68f8      	ldr	r0, [r7, #12]
 8011b6c:	f000 fd32 	bl	80125d4 <xQueueCreateCountingSemaphoreStatic>
 8011b70:	61f8      	str	r0, [r7, #28]
 8011b72:	e004      	b.n	8011b7e <osSemaphoreNew+0xe8>
          #endif
        }
        else {
          #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
            hSemaphore = xSemaphoreCreateCounting (max_count, initial_count);
 8011b74:	68b9      	ldr	r1, [r7, #8]
 8011b76:	68f8      	ldr	r0, [r7, #12]
 8011b78:	f000 fd65 	bl	8012646 <xQueueCreateCountingSemaphore>
 8011b7c:	61f8      	str	r0, [r7, #28]
          #endif
        }
      }
      
      #if (configQUEUE_REGISTRY_SIZE > 0)
      if (hSemaphore != NULL) {
 8011b7e:	69fb      	ldr	r3, [r7, #28]
 8011b80:	2b00      	cmp	r3, #0
 8011b82:	d00c      	beq.n	8011b9e <osSemaphoreNew+0x108>
        if (attr != NULL) {
 8011b84:	687b      	ldr	r3, [r7, #4]
 8011b86:	2b00      	cmp	r3, #0
 8011b88:	d003      	beq.n	8011b92 <osSemaphoreNew+0xfc>
          name = attr->name;
 8011b8a:	687b      	ldr	r3, [r7, #4]
 8011b8c:	681b      	ldr	r3, [r3, #0]
 8011b8e:	617b      	str	r3, [r7, #20]
 8011b90:	e001      	b.n	8011b96 <osSemaphoreNew+0x100>
        } else {
          name = NULL;
 8011b92:	2300      	movs	r3, #0
 8011b94:	617b      	str	r3, [r7, #20]
        }
        vQueueAddToRegistry (hSemaphore, name);
 8011b96:	6979      	ldr	r1, [r7, #20]
 8011b98:	69f8      	ldr	r0, [r7, #28]
 8011b9a:	f001 fbb7 	bl	801330c <vQueueAddToRegistry>
      }
      #endif
    }
  }

  return ((osSemaphoreId_t)hSemaphore);
 8011b9e:	69fb      	ldr	r3, [r7, #28]
}
 8011ba0:	4618      	mov	r0, r3
 8011ba2:	3720      	adds	r7, #32
 8011ba4:	46bd      	mov	sp, r7
 8011ba6:	bd80      	pop	{r7, pc}

08011ba8 <osSemaphoreAcquire>:

osStatus_t osSemaphoreAcquire (osSemaphoreId_t semaphore_id, uint32_t timeout) {
 8011ba8:	b580      	push	{r7, lr}
 8011baa:	b086      	sub	sp, #24
 8011bac:	af00      	add	r7, sp, #0
 8011bae:	6078      	str	r0, [r7, #4]
 8011bb0:	6039      	str	r1, [r7, #0]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8011bb2:	687b      	ldr	r3, [r7, #4]
 8011bb4:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 8011bb6:	2300      	movs	r3, #0
 8011bb8:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 8011bba:	693b      	ldr	r3, [r7, #16]
 8011bbc:	2b00      	cmp	r3, #0
 8011bbe:	d103      	bne.n	8011bc8 <osSemaphoreAcquire+0x20>
    stat = osErrorParameter;
 8011bc0:	f06f 0303 	mvn.w	r3, #3
 8011bc4:	617b      	str	r3, [r7, #20]
 8011bc6:	e039      	b.n	8011c3c <osSemaphoreAcquire+0x94>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011bc8:	f3ef 8305 	mrs	r3, IPSR
 8011bcc:	60fb      	str	r3, [r7, #12]
  return(result);
 8011bce:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8011bd0:	2b00      	cmp	r3, #0
 8011bd2:	d022      	beq.n	8011c1a <osSemaphoreAcquire+0x72>
    if (timeout != 0U) {
 8011bd4:	683b      	ldr	r3, [r7, #0]
 8011bd6:	2b00      	cmp	r3, #0
 8011bd8:	d003      	beq.n	8011be2 <osSemaphoreAcquire+0x3a>
      stat = osErrorParameter;
 8011bda:	f06f 0303 	mvn.w	r3, #3
 8011bde:	617b      	str	r3, [r7, #20]
 8011be0:	e02c      	b.n	8011c3c <osSemaphoreAcquire+0x94>
    }
    else {
      yield = pdFALSE;
 8011be2:	2300      	movs	r3, #0
 8011be4:	60bb      	str	r3, [r7, #8]

      if (xSemaphoreTakeFromISR (hSemaphore, &yield) != pdPASS) {
 8011be6:	f107 0308 	add.w	r3, r7, #8
 8011bea:	461a      	mov	r2, r3
 8011bec:	2100      	movs	r1, #0
 8011bee:	6938      	ldr	r0, [r7, #16]
 8011bf0:	f001 f980 	bl	8012ef4 <xQueueReceiveFromISR>
 8011bf4:	4603      	mov	r3, r0
 8011bf6:	2b01      	cmp	r3, #1
 8011bf8:	d003      	beq.n	8011c02 <osSemaphoreAcquire+0x5a>
        stat = osErrorResource;
 8011bfa:	f06f 0302 	mvn.w	r3, #2
 8011bfe:	617b      	str	r3, [r7, #20]
 8011c00:	e01c      	b.n	8011c3c <osSemaphoreAcquire+0x94>
      } else {
        portYIELD_FROM_ISR (yield);
 8011c02:	68bb      	ldr	r3, [r7, #8]
 8011c04:	2b00      	cmp	r3, #0
 8011c06:	d019      	beq.n	8011c3c <osSemaphoreAcquire+0x94>
 8011c08:	4b0f      	ldr	r3, [pc, #60]	@ (8011c48 <osSemaphoreAcquire+0xa0>)
 8011c0a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011c0e:	601a      	str	r2, [r3, #0]
 8011c10:	f3bf 8f4f 	dsb	sy
 8011c14:	f3bf 8f6f 	isb	sy
 8011c18:	e010      	b.n	8011c3c <osSemaphoreAcquire+0x94>
      }
    }
  }
  else {
    if (xSemaphoreTake (hSemaphore, (TickType_t)timeout) != pdPASS) {
 8011c1a:	6839      	ldr	r1, [r7, #0]
 8011c1c:	6938      	ldr	r0, [r7, #16]
 8011c1e:	f001 f859 	bl	8012cd4 <xQueueSemaphoreTake>
 8011c22:	4603      	mov	r3, r0
 8011c24:	2b01      	cmp	r3, #1
 8011c26:	d009      	beq.n	8011c3c <osSemaphoreAcquire+0x94>
      if (timeout != 0U) {
 8011c28:	683b      	ldr	r3, [r7, #0]
 8011c2a:	2b00      	cmp	r3, #0
 8011c2c:	d003      	beq.n	8011c36 <osSemaphoreAcquire+0x8e>
        stat = osErrorTimeout;
 8011c2e:	f06f 0301 	mvn.w	r3, #1
 8011c32:	617b      	str	r3, [r7, #20]
 8011c34:	e002      	b.n	8011c3c <osSemaphoreAcquire+0x94>
      } else {
        stat = osErrorResource;
 8011c36:	f06f 0302 	mvn.w	r3, #2
 8011c3a:	617b      	str	r3, [r7, #20]
      }
    }
  }

  return (stat);
 8011c3c:	697b      	ldr	r3, [r7, #20]
}
 8011c3e:	4618      	mov	r0, r3
 8011c40:	3718      	adds	r7, #24
 8011c42:	46bd      	mov	sp, r7
 8011c44:	bd80      	pop	{r7, pc}
 8011c46:	bf00      	nop
 8011c48:	e000ed04 	.word	0xe000ed04

08011c4c <osSemaphoreRelease>:

osStatus_t osSemaphoreRelease (osSemaphoreId_t semaphore_id) {
 8011c4c:	b580      	push	{r7, lr}
 8011c4e:	b086      	sub	sp, #24
 8011c50:	af00      	add	r7, sp, #0
 8011c52:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8011c54:	687b      	ldr	r3, [r7, #4]
 8011c56:	613b      	str	r3, [r7, #16]
  osStatus_t stat;
  BaseType_t yield;

  stat = osOK;
 8011c58:	2300      	movs	r3, #0
 8011c5a:	617b      	str	r3, [r7, #20]

  if (hSemaphore == NULL) {
 8011c5c:	693b      	ldr	r3, [r7, #16]
 8011c5e:	2b00      	cmp	r3, #0
 8011c60:	d103      	bne.n	8011c6a <osSemaphoreRelease+0x1e>
    stat = osErrorParameter;
 8011c62:	f06f 0303 	mvn.w	r3, #3
 8011c66:	617b      	str	r3, [r7, #20]
 8011c68:	e02c      	b.n	8011cc4 <osSemaphoreRelease+0x78>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011c6a:	f3ef 8305 	mrs	r3, IPSR
 8011c6e:	60fb      	str	r3, [r7, #12]
  return(result);
 8011c70:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8011c72:	2b00      	cmp	r3, #0
 8011c74:	d01a      	beq.n	8011cac <osSemaphoreRelease+0x60>
    yield = pdFALSE;
 8011c76:	2300      	movs	r3, #0
 8011c78:	60bb      	str	r3, [r7, #8]

    if (xSemaphoreGiveFromISR (hSemaphore, &yield) != pdTRUE) {
 8011c7a:	f107 0308 	add.w	r3, r7, #8
 8011c7e:	4619      	mov	r1, r3
 8011c80:	6938      	ldr	r0, [r7, #16]
 8011c82:	f000 feb5 	bl	80129f0 <xQueueGiveFromISR>
 8011c86:	4603      	mov	r3, r0
 8011c88:	2b01      	cmp	r3, #1
 8011c8a:	d003      	beq.n	8011c94 <osSemaphoreRelease+0x48>
      stat = osErrorResource;
 8011c8c:	f06f 0302 	mvn.w	r3, #2
 8011c90:	617b      	str	r3, [r7, #20]
 8011c92:	e017      	b.n	8011cc4 <osSemaphoreRelease+0x78>
    } else {
      portYIELD_FROM_ISR (yield);
 8011c94:	68bb      	ldr	r3, [r7, #8]
 8011c96:	2b00      	cmp	r3, #0
 8011c98:	d014      	beq.n	8011cc4 <osSemaphoreRelease+0x78>
 8011c9a:	4b0d      	ldr	r3, [pc, #52]	@ (8011cd0 <osSemaphoreRelease+0x84>)
 8011c9c:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011ca0:	601a      	str	r2, [r3, #0]
 8011ca2:	f3bf 8f4f 	dsb	sy
 8011ca6:	f3bf 8f6f 	isb	sy
 8011caa:	e00b      	b.n	8011cc4 <osSemaphoreRelease+0x78>
    }
  }
  else {
    if (xSemaphoreGive (hSemaphore) != pdPASS) {
 8011cac:	2300      	movs	r3, #0
 8011cae:	2200      	movs	r2, #0
 8011cb0:	2100      	movs	r1, #0
 8011cb2:	6938      	ldr	r0, [r7, #16]
 8011cb4:	f000 fcfc 	bl	80126b0 <xQueueGenericSend>
 8011cb8:	4603      	mov	r3, r0
 8011cba:	2b01      	cmp	r3, #1
 8011cbc:	d002      	beq.n	8011cc4 <osSemaphoreRelease+0x78>
      stat = osErrorResource;
 8011cbe:	f06f 0302 	mvn.w	r3, #2
 8011cc2:	617b      	str	r3, [r7, #20]
    }
  }

  return (stat);
 8011cc4:	697b      	ldr	r3, [r7, #20]
}
 8011cc6:	4618      	mov	r0, r3
 8011cc8:	3718      	adds	r7, #24
 8011cca:	46bd      	mov	sp, r7
 8011ccc:	bd80      	pop	{r7, pc}
 8011cce:	bf00      	nop
 8011cd0:	e000ed04 	.word	0xe000ed04

08011cd4 <osSemaphoreDelete>:
  }

  return (count);
}

osStatus_t osSemaphoreDelete (osSemaphoreId_t semaphore_id) {
 8011cd4:	b580      	push	{r7, lr}
 8011cd6:	b086      	sub	sp, #24
 8011cd8:	af00      	add	r7, sp, #0
 8011cda:	6078      	str	r0, [r7, #4]
  SemaphoreHandle_t hSemaphore = (SemaphoreHandle_t)semaphore_id;
 8011cdc:	687b      	ldr	r3, [r7, #4]
 8011cde:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011ce0:	f3ef 8305 	mrs	r3, IPSR
 8011ce4:	60fb      	str	r3, [r7, #12]
  return(result);
 8011ce6:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 8011ce8:	2b00      	cmp	r3, #0
 8011cea:	d003      	beq.n	8011cf4 <osSemaphoreDelete+0x20>
    stat = osErrorISR;
 8011cec:	f06f 0305 	mvn.w	r3, #5
 8011cf0:	617b      	str	r3, [r7, #20]
 8011cf2:	e00e      	b.n	8011d12 <osSemaphoreDelete+0x3e>
  }
  else if (hSemaphore == NULL) {
 8011cf4:	693b      	ldr	r3, [r7, #16]
 8011cf6:	2b00      	cmp	r3, #0
 8011cf8:	d103      	bne.n	8011d02 <osSemaphoreDelete+0x2e>
    stat = osErrorParameter;
 8011cfa:	f06f 0303 	mvn.w	r3, #3
 8011cfe:	617b      	str	r3, [r7, #20]
 8011d00:	e007      	b.n	8011d12 <osSemaphoreDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hSemaphore);
 8011d02:	6938      	ldr	r0, [r7, #16]
 8011d04:	f001 fb2c 	bl	8013360 <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 8011d08:	2300      	movs	r3, #0
 8011d0a:	617b      	str	r3, [r7, #20]
    vSemaphoreDelete (hSemaphore);
 8011d0c:	6938      	ldr	r0, [r7, #16]
 8011d0e:	f001 f9b1 	bl	8013074 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 8011d12:	697b      	ldr	r3, [r7, #20]
}
 8011d14:	4618      	mov	r0, r3
 8011d16:	3718      	adds	r7, #24
 8011d18:	46bd      	mov	sp, r7
 8011d1a:	bd80      	pop	{r7, pc}

08011d1c <osMessageQueueNew>:

/*---------------------------------------------------------------------------*/

osMessageQueueId_t osMessageQueueNew (uint32_t msg_count, uint32_t msg_size, const osMessageQueueAttr_t *attr) {
 8011d1c:	b580      	push	{r7, lr}
 8011d1e:	b08a      	sub	sp, #40	@ 0x28
 8011d20:	af02      	add	r7, sp, #8
 8011d22:	60f8      	str	r0, [r7, #12]
 8011d24:	60b9      	str	r1, [r7, #8]
 8011d26:	607a      	str	r2, [r7, #4]
  int32_t mem;
  #if (configQUEUE_REGISTRY_SIZE > 0)
  const char *name;
  #endif

  hQueue = NULL;
 8011d28:	2300      	movs	r3, #0
 8011d2a:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011d2c:	f3ef 8305 	mrs	r3, IPSR
 8011d30:	613b      	str	r3, [r7, #16]
  return(result);
 8011d32:	693b      	ldr	r3, [r7, #16]

  if (!IS_IRQ() && (msg_count > 0U) && (msg_size > 0U)) {
 8011d34:	2b00      	cmp	r3, #0
 8011d36:	d15f      	bne.n	8011df8 <osMessageQueueNew+0xdc>
 8011d38:	68fb      	ldr	r3, [r7, #12]
 8011d3a:	2b00      	cmp	r3, #0
 8011d3c:	d05c      	beq.n	8011df8 <osMessageQueueNew+0xdc>
 8011d3e:	68bb      	ldr	r3, [r7, #8]
 8011d40:	2b00      	cmp	r3, #0
 8011d42:	d059      	beq.n	8011df8 <osMessageQueueNew+0xdc>
    mem = -1;
 8011d44:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8011d48:	61bb      	str	r3, [r7, #24]

    if (attr != NULL) {
 8011d4a:	687b      	ldr	r3, [r7, #4]
 8011d4c:	2b00      	cmp	r3, #0
 8011d4e:	d029      	beq.n	8011da4 <osMessageQueueNew+0x88>
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 8011d50:	687b      	ldr	r3, [r7, #4]
 8011d52:	689b      	ldr	r3, [r3, #8]
 8011d54:	2b00      	cmp	r3, #0
 8011d56:	d012      	beq.n	8011d7e <osMessageQueueNew+0x62>
 8011d58:	687b      	ldr	r3, [r7, #4]
 8011d5a:	68db      	ldr	r3, [r3, #12]
 8011d5c:	2b4f      	cmp	r3, #79	@ 0x4f
 8011d5e:	d90e      	bls.n	8011d7e <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 8011d60:	687b      	ldr	r3, [r7, #4]
 8011d62:	691b      	ldr	r3, [r3, #16]
      if ((attr->cb_mem != NULL) && (attr->cb_size >= sizeof(StaticQueue_t)) &&
 8011d64:	2b00      	cmp	r3, #0
 8011d66:	d00a      	beq.n	8011d7e <osMessageQueueNew+0x62>
          (attr->mq_mem != NULL) && (attr->mq_size >= (msg_count * msg_size))) {
 8011d68:	687b      	ldr	r3, [r7, #4]
 8011d6a:	695a      	ldr	r2, [r3, #20]
 8011d6c:	68fb      	ldr	r3, [r7, #12]
 8011d6e:	68b9      	ldr	r1, [r7, #8]
 8011d70:	fb01 f303 	mul.w	r3, r1, r3
 8011d74:	429a      	cmp	r2, r3
 8011d76:	d302      	bcc.n	8011d7e <osMessageQueueNew+0x62>
        mem = 1;
 8011d78:	2301      	movs	r3, #1
 8011d7a:	61bb      	str	r3, [r7, #24]
 8011d7c:	e014      	b.n	8011da8 <osMessageQueueNew+0x8c>
      }
      else {
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 8011d7e:	687b      	ldr	r3, [r7, #4]
 8011d80:	689b      	ldr	r3, [r3, #8]
 8011d82:	2b00      	cmp	r3, #0
 8011d84:	d110      	bne.n	8011da8 <osMessageQueueNew+0x8c>
 8011d86:	687b      	ldr	r3, [r7, #4]
 8011d88:	68db      	ldr	r3, [r3, #12]
 8011d8a:	2b00      	cmp	r3, #0
 8011d8c:	d10c      	bne.n	8011da8 <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 8011d8e:	687b      	ldr	r3, [r7, #4]
 8011d90:	691b      	ldr	r3, [r3, #16]
        if ((attr->cb_mem == NULL) && (attr->cb_size == 0U) &&
 8011d92:	2b00      	cmp	r3, #0
 8011d94:	d108      	bne.n	8011da8 <osMessageQueueNew+0x8c>
            (attr->mq_mem == NULL) && (attr->mq_size == 0U)) {
 8011d96:	687b      	ldr	r3, [r7, #4]
 8011d98:	695b      	ldr	r3, [r3, #20]
 8011d9a:	2b00      	cmp	r3, #0
 8011d9c:	d104      	bne.n	8011da8 <osMessageQueueNew+0x8c>
          mem = 0;
 8011d9e:	2300      	movs	r3, #0
 8011da0:	61bb      	str	r3, [r7, #24]
 8011da2:	e001      	b.n	8011da8 <osMessageQueueNew+0x8c>
        }
      }
    }
    else {
      mem = 0;
 8011da4:	2300      	movs	r3, #0
 8011da6:	61bb      	str	r3, [r7, #24]
    }

    if (mem == 1) {
 8011da8:	69bb      	ldr	r3, [r7, #24]
 8011daa:	2b01      	cmp	r3, #1
 8011dac:	d10b      	bne.n	8011dc6 <osMessageQueueNew+0xaa>
      #if (configSUPPORT_STATIC_ALLOCATION == 1)
        hQueue = xQueueCreateStatic (msg_count, msg_size, attr->mq_mem, attr->cb_mem);
 8011dae:	687b      	ldr	r3, [r7, #4]
 8011db0:	691a      	ldr	r2, [r3, #16]
 8011db2:	687b      	ldr	r3, [r7, #4]
 8011db4:	689b      	ldr	r3, [r3, #8]
 8011db6:	2100      	movs	r1, #0
 8011db8:	9100      	str	r1, [sp, #0]
 8011dba:	68b9      	ldr	r1, [r7, #8]
 8011dbc:	68f8      	ldr	r0, [r7, #12]
 8011dbe:	f000 fa75 	bl	80122ac <xQueueGenericCreateStatic>
 8011dc2:	61f8      	str	r0, [r7, #28]
 8011dc4:	e008      	b.n	8011dd8 <osMessageQueueNew+0xbc>
      #endif
    }
    else {
      if (mem == 0) {
 8011dc6:	69bb      	ldr	r3, [r7, #24]
 8011dc8:	2b00      	cmp	r3, #0
 8011dca:	d105      	bne.n	8011dd8 <osMessageQueueNew+0xbc>
        #if (configSUPPORT_DYNAMIC_ALLOCATION == 1)
          hQueue = xQueueCreate (msg_count, msg_size);
 8011dcc:	2200      	movs	r2, #0
 8011dce:	68b9      	ldr	r1, [r7, #8]
 8011dd0:	68f8      	ldr	r0, [r7, #12]
 8011dd2:	f000 fae8 	bl	80123a6 <xQueueGenericCreate>
 8011dd6:	61f8      	str	r0, [r7, #28]
        #endif
      }
    }

    #if (configQUEUE_REGISTRY_SIZE > 0)
    if (hQueue != NULL) {
 8011dd8:	69fb      	ldr	r3, [r7, #28]
 8011dda:	2b00      	cmp	r3, #0
 8011ddc:	d00c      	beq.n	8011df8 <osMessageQueueNew+0xdc>
      if (attr != NULL) {
 8011dde:	687b      	ldr	r3, [r7, #4]
 8011de0:	2b00      	cmp	r3, #0
 8011de2:	d003      	beq.n	8011dec <osMessageQueueNew+0xd0>
        name = attr->name;
 8011de4:	687b      	ldr	r3, [r7, #4]
 8011de6:	681b      	ldr	r3, [r3, #0]
 8011de8:	617b      	str	r3, [r7, #20]
 8011dea:	e001      	b.n	8011df0 <osMessageQueueNew+0xd4>
      } else {
        name = NULL;
 8011dec:	2300      	movs	r3, #0
 8011dee:	617b      	str	r3, [r7, #20]
      }
      vQueueAddToRegistry (hQueue, name);
 8011df0:	6979      	ldr	r1, [r7, #20]
 8011df2:	69f8      	ldr	r0, [r7, #28]
 8011df4:	f001 fa8a 	bl	801330c <vQueueAddToRegistry>
    }
    #endif

  }

  return ((osMessageQueueId_t)hQueue);
 8011df8:	69fb      	ldr	r3, [r7, #28]
}
 8011dfa:	4618      	mov	r0, r3
 8011dfc:	3720      	adds	r7, #32
 8011dfe:	46bd      	mov	sp, r7
 8011e00:	bd80      	pop	{r7, pc}
	...

08011e04 <osMessageQueuePut>:

osStatus_t osMessageQueuePut (osMessageQueueId_t mq_id, const void *msg_ptr, uint8_t msg_prio, uint32_t timeout) {
 8011e04:	b580      	push	{r7, lr}
 8011e06:	b088      	sub	sp, #32
 8011e08:	af00      	add	r7, sp, #0
 8011e0a:	60f8      	str	r0, [r7, #12]
 8011e0c:	60b9      	str	r1, [r7, #8]
 8011e0e:	603b      	str	r3, [r7, #0]
 8011e10:	4613      	mov	r3, r2
 8011e12:	71fb      	strb	r3, [r7, #7]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011e14:	68fb      	ldr	r3, [r7, #12]
 8011e16:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 8011e18:	2300      	movs	r3, #0
 8011e1a:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011e1c:	f3ef 8305 	mrs	r3, IPSR
 8011e20:	617b      	str	r3, [r7, #20]
  return(result);
 8011e22:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 8011e24:	2b00      	cmp	r3, #0
 8011e26:	d028      	beq.n	8011e7a <osMessageQueuePut+0x76>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 8011e28:	69bb      	ldr	r3, [r7, #24]
 8011e2a:	2b00      	cmp	r3, #0
 8011e2c:	d005      	beq.n	8011e3a <osMessageQueuePut+0x36>
 8011e2e:	68bb      	ldr	r3, [r7, #8]
 8011e30:	2b00      	cmp	r3, #0
 8011e32:	d002      	beq.n	8011e3a <osMessageQueuePut+0x36>
 8011e34:	683b      	ldr	r3, [r7, #0]
 8011e36:	2b00      	cmp	r3, #0
 8011e38:	d003      	beq.n	8011e42 <osMessageQueuePut+0x3e>
      stat = osErrorParameter;
 8011e3a:	f06f 0303 	mvn.w	r3, #3
 8011e3e:	61fb      	str	r3, [r7, #28]
 8011e40:	e038      	b.n	8011eb4 <osMessageQueuePut+0xb0>
    }
    else {
      yield = pdFALSE;
 8011e42:	2300      	movs	r3, #0
 8011e44:	613b      	str	r3, [r7, #16]

      if (xQueueSendToBackFromISR (hQueue, msg_ptr, &yield) != pdTRUE) {
 8011e46:	f107 0210 	add.w	r2, r7, #16
 8011e4a:	2300      	movs	r3, #0
 8011e4c:	68b9      	ldr	r1, [r7, #8]
 8011e4e:	69b8      	ldr	r0, [r7, #24]
 8011e50:	f000 fd30 	bl	80128b4 <xQueueGenericSendFromISR>
 8011e54:	4603      	mov	r3, r0
 8011e56:	2b01      	cmp	r3, #1
 8011e58:	d003      	beq.n	8011e62 <osMessageQueuePut+0x5e>
        stat = osErrorResource;
 8011e5a:	f06f 0302 	mvn.w	r3, #2
 8011e5e:	61fb      	str	r3, [r7, #28]
 8011e60:	e028      	b.n	8011eb4 <osMessageQueuePut+0xb0>
      } else {
        portYIELD_FROM_ISR (yield);
 8011e62:	693b      	ldr	r3, [r7, #16]
 8011e64:	2b00      	cmp	r3, #0
 8011e66:	d025      	beq.n	8011eb4 <osMessageQueuePut+0xb0>
 8011e68:	4b15      	ldr	r3, [pc, #84]	@ (8011ec0 <osMessageQueuePut+0xbc>)
 8011e6a:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011e6e:	601a      	str	r2, [r3, #0]
 8011e70:	f3bf 8f4f 	dsb	sy
 8011e74:	f3bf 8f6f 	isb	sy
 8011e78:	e01c      	b.n	8011eb4 <osMessageQueuePut+0xb0>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 8011e7a:	69bb      	ldr	r3, [r7, #24]
 8011e7c:	2b00      	cmp	r3, #0
 8011e7e:	d002      	beq.n	8011e86 <osMessageQueuePut+0x82>
 8011e80:	68bb      	ldr	r3, [r7, #8]
 8011e82:	2b00      	cmp	r3, #0
 8011e84:	d103      	bne.n	8011e8e <osMessageQueuePut+0x8a>
      stat = osErrorParameter;
 8011e86:	f06f 0303 	mvn.w	r3, #3
 8011e8a:	61fb      	str	r3, [r7, #28]
 8011e8c:	e012      	b.n	8011eb4 <osMessageQueuePut+0xb0>
    }
    else {
      if (xQueueSendToBack (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 8011e8e:	2300      	movs	r3, #0
 8011e90:	683a      	ldr	r2, [r7, #0]
 8011e92:	68b9      	ldr	r1, [r7, #8]
 8011e94:	69b8      	ldr	r0, [r7, #24]
 8011e96:	f000 fc0b 	bl	80126b0 <xQueueGenericSend>
 8011e9a:	4603      	mov	r3, r0
 8011e9c:	2b01      	cmp	r3, #1
 8011e9e:	d009      	beq.n	8011eb4 <osMessageQueuePut+0xb0>
        if (timeout != 0U) {
 8011ea0:	683b      	ldr	r3, [r7, #0]
 8011ea2:	2b00      	cmp	r3, #0
 8011ea4:	d003      	beq.n	8011eae <osMessageQueuePut+0xaa>
          stat = osErrorTimeout;
 8011ea6:	f06f 0301 	mvn.w	r3, #1
 8011eaa:	61fb      	str	r3, [r7, #28]
 8011eac:	e002      	b.n	8011eb4 <osMessageQueuePut+0xb0>
        } else {
          stat = osErrorResource;
 8011eae:	f06f 0302 	mvn.w	r3, #2
 8011eb2:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 8011eb4:	69fb      	ldr	r3, [r7, #28]
}
 8011eb6:	4618      	mov	r0, r3
 8011eb8:	3720      	adds	r7, #32
 8011eba:	46bd      	mov	sp, r7
 8011ebc:	bd80      	pop	{r7, pc}
 8011ebe:	bf00      	nop
 8011ec0:	e000ed04 	.word	0xe000ed04

08011ec4 <osMessageQueueGet>:

osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *msg_prio, uint32_t timeout) {
 8011ec4:	b580      	push	{r7, lr}
 8011ec6:	b088      	sub	sp, #32
 8011ec8:	af00      	add	r7, sp, #0
 8011eca:	60f8      	str	r0, [r7, #12]
 8011ecc:	60b9      	str	r1, [r7, #8]
 8011ece:	607a      	str	r2, [r7, #4]
 8011ed0:	603b      	str	r3, [r7, #0]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011ed2:	68fb      	ldr	r3, [r7, #12]
 8011ed4:	61bb      	str	r3, [r7, #24]
  osStatus_t stat;
  BaseType_t yield;

  (void)msg_prio; /* Message priority is ignored */

  stat = osOK;
 8011ed6:	2300      	movs	r3, #0
 8011ed8:	61fb      	str	r3, [r7, #28]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011eda:	f3ef 8305 	mrs	r3, IPSR
 8011ede:	617b      	str	r3, [r7, #20]
  return(result);
 8011ee0:	697b      	ldr	r3, [r7, #20]

  if (IS_IRQ()) {
 8011ee2:	2b00      	cmp	r3, #0
 8011ee4:	d028      	beq.n	8011f38 <osMessageQueueGet+0x74>
    if ((hQueue == NULL) || (msg_ptr == NULL) || (timeout != 0U)) {
 8011ee6:	69bb      	ldr	r3, [r7, #24]
 8011ee8:	2b00      	cmp	r3, #0
 8011eea:	d005      	beq.n	8011ef8 <osMessageQueueGet+0x34>
 8011eec:	68bb      	ldr	r3, [r7, #8]
 8011eee:	2b00      	cmp	r3, #0
 8011ef0:	d002      	beq.n	8011ef8 <osMessageQueueGet+0x34>
 8011ef2:	683b      	ldr	r3, [r7, #0]
 8011ef4:	2b00      	cmp	r3, #0
 8011ef6:	d003      	beq.n	8011f00 <osMessageQueueGet+0x3c>
      stat = osErrorParameter;
 8011ef8:	f06f 0303 	mvn.w	r3, #3
 8011efc:	61fb      	str	r3, [r7, #28]
 8011efe:	e037      	b.n	8011f70 <osMessageQueueGet+0xac>
    }
    else {
      yield = pdFALSE;
 8011f00:	2300      	movs	r3, #0
 8011f02:	613b      	str	r3, [r7, #16]

      if (xQueueReceiveFromISR (hQueue, msg_ptr, &yield) != pdPASS) {
 8011f04:	f107 0310 	add.w	r3, r7, #16
 8011f08:	461a      	mov	r2, r3
 8011f0a:	68b9      	ldr	r1, [r7, #8]
 8011f0c:	69b8      	ldr	r0, [r7, #24]
 8011f0e:	f000 fff1 	bl	8012ef4 <xQueueReceiveFromISR>
 8011f12:	4603      	mov	r3, r0
 8011f14:	2b01      	cmp	r3, #1
 8011f16:	d003      	beq.n	8011f20 <osMessageQueueGet+0x5c>
        stat = osErrorResource;
 8011f18:	f06f 0302 	mvn.w	r3, #2
 8011f1c:	61fb      	str	r3, [r7, #28]
 8011f1e:	e027      	b.n	8011f70 <osMessageQueueGet+0xac>
      } else {
        portYIELD_FROM_ISR (yield);
 8011f20:	693b      	ldr	r3, [r7, #16]
 8011f22:	2b00      	cmp	r3, #0
 8011f24:	d024      	beq.n	8011f70 <osMessageQueueGet+0xac>
 8011f26:	4b15      	ldr	r3, [pc, #84]	@ (8011f7c <osMessageQueueGet+0xb8>)
 8011f28:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8011f2c:	601a      	str	r2, [r3, #0]
 8011f2e:	f3bf 8f4f 	dsb	sy
 8011f32:	f3bf 8f6f 	isb	sy
 8011f36:	e01b      	b.n	8011f70 <osMessageQueueGet+0xac>
      }
    }
  }
  else {
    if ((hQueue == NULL) || (msg_ptr == NULL)) {
 8011f38:	69bb      	ldr	r3, [r7, #24]
 8011f3a:	2b00      	cmp	r3, #0
 8011f3c:	d002      	beq.n	8011f44 <osMessageQueueGet+0x80>
 8011f3e:	68bb      	ldr	r3, [r7, #8]
 8011f40:	2b00      	cmp	r3, #0
 8011f42:	d103      	bne.n	8011f4c <osMessageQueueGet+0x88>
      stat = osErrorParameter;
 8011f44:	f06f 0303 	mvn.w	r3, #3
 8011f48:	61fb      	str	r3, [r7, #28]
 8011f4a:	e011      	b.n	8011f70 <osMessageQueueGet+0xac>
    }
    else {
      if (xQueueReceive (hQueue, msg_ptr, (TickType_t)timeout) != pdPASS) {
 8011f4c:	683a      	ldr	r2, [r7, #0]
 8011f4e:	68b9      	ldr	r1, [r7, #8]
 8011f50:	69b8      	ldr	r0, [r7, #24]
 8011f52:	f000 fddd 	bl	8012b10 <xQueueReceive>
 8011f56:	4603      	mov	r3, r0
 8011f58:	2b01      	cmp	r3, #1
 8011f5a:	d009      	beq.n	8011f70 <osMessageQueueGet+0xac>
        if (timeout != 0U) {
 8011f5c:	683b      	ldr	r3, [r7, #0]
 8011f5e:	2b00      	cmp	r3, #0
 8011f60:	d003      	beq.n	8011f6a <osMessageQueueGet+0xa6>
          stat = osErrorTimeout;
 8011f62:	f06f 0301 	mvn.w	r3, #1
 8011f66:	61fb      	str	r3, [r7, #28]
 8011f68:	e002      	b.n	8011f70 <osMessageQueueGet+0xac>
        } else {
          stat = osErrorResource;
 8011f6a:	f06f 0302 	mvn.w	r3, #2
 8011f6e:	61fb      	str	r3, [r7, #28]
        }
      }
    }
  }

  return (stat);
 8011f70:	69fb      	ldr	r3, [r7, #28]
}
 8011f72:	4618      	mov	r0, r3
 8011f74:	3720      	adds	r7, #32
 8011f76:	46bd      	mov	sp, r7
 8011f78:	bd80      	pop	{r7, pc}
 8011f7a:	bf00      	nop
 8011f7c:	e000ed04 	.word	0xe000ed04

08011f80 <osMessageQueueGetCount>:
  }

  return (size);
}

uint32_t osMessageQueueGetCount (osMessageQueueId_t mq_id) {
 8011f80:	b580      	push	{r7, lr}
 8011f82:	b086      	sub	sp, #24
 8011f84:	af00      	add	r7, sp, #0
 8011f86:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011f88:	687b      	ldr	r3, [r7, #4]
 8011f8a:	613b      	str	r3, [r7, #16]
  UBaseType_t count;

  if (hQueue == NULL) {
 8011f8c:	693b      	ldr	r3, [r7, #16]
 8011f8e:	2b00      	cmp	r3, #0
 8011f90:	d102      	bne.n	8011f98 <osMessageQueueGetCount+0x18>
    count = 0U;
 8011f92:	2300      	movs	r3, #0
 8011f94:	617b      	str	r3, [r7, #20]
 8011f96:	e00e      	b.n	8011fb6 <osMessageQueueGetCount+0x36>
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011f98:	f3ef 8305 	mrs	r3, IPSR
 8011f9c:	60fb      	str	r3, [r7, #12]
  return(result);
 8011f9e:	68fb      	ldr	r3, [r7, #12]
  }
  else if (IS_IRQ()) {
 8011fa0:	2b00      	cmp	r3, #0
 8011fa2:	d004      	beq.n	8011fae <osMessageQueueGetCount+0x2e>
    count = uxQueueMessagesWaitingFromISR (hQueue);
 8011fa4:	6938      	ldr	r0, [r7, #16]
 8011fa6:	f001 f846 	bl	8013036 <uxQueueMessagesWaitingFromISR>
 8011faa:	6178      	str	r0, [r7, #20]
 8011fac:	e003      	b.n	8011fb6 <osMessageQueueGetCount+0x36>
  }
  else {
    count = uxQueueMessagesWaiting (hQueue);
 8011fae:	6938      	ldr	r0, [r7, #16]
 8011fb0:	f001 f822 	bl	8012ff8 <uxQueueMessagesWaiting>
 8011fb4:	6178      	str	r0, [r7, #20]
  }

  return ((uint32_t)count);
 8011fb6:	697b      	ldr	r3, [r7, #20]
}
 8011fb8:	4618      	mov	r0, r3
 8011fba:	3718      	adds	r7, #24
 8011fbc:	46bd      	mov	sp, r7
 8011fbe:	bd80      	pop	{r7, pc}

08011fc0 <osMessageQueueDelete>:
  }

  return (stat);
}

osStatus_t osMessageQueueDelete (osMessageQueueId_t mq_id) {
 8011fc0:	b580      	push	{r7, lr}
 8011fc2:	b086      	sub	sp, #24
 8011fc4:	af00      	add	r7, sp, #0
 8011fc6:	6078      	str	r0, [r7, #4]
  QueueHandle_t hQueue = (QueueHandle_t)mq_id;
 8011fc8:	687b      	ldr	r3, [r7, #4]
 8011fca:	613b      	str	r3, [r7, #16]
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 8011fcc:	f3ef 8305 	mrs	r3, IPSR
 8011fd0:	60fb      	str	r3, [r7, #12]
  return(result);
 8011fd2:	68fb      	ldr	r3, [r7, #12]
  osStatus_t stat;

#ifndef USE_FreeRTOS_HEAP_1
  if (IS_IRQ()) {
 8011fd4:	2b00      	cmp	r3, #0
 8011fd6:	d003      	beq.n	8011fe0 <osMessageQueueDelete+0x20>
    stat = osErrorISR;
 8011fd8:	f06f 0305 	mvn.w	r3, #5
 8011fdc:	617b      	str	r3, [r7, #20]
 8011fde:	e00e      	b.n	8011ffe <osMessageQueueDelete+0x3e>
  }
  else if (hQueue == NULL) {
 8011fe0:	693b      	ldr	r3, [r7, #16]
 8011fe2:	2b00      	cmp	r3, #0
 8011fe4:	d103      	bne.n	8011fee <osMessageQueueDelete+0x2e>
    stat = osErrorParameter;
 8011fe6:	f06f 0303 	mvn.w	r3, #3
 8011fea:	617b      	str	r3, [r7, #20]
 8011fec:	e007      	b.n	8011ffe <osMessageQueueDelete+0x3e>
  }
  else {
    #if (configQUEUE_REGISTRY_SIZE > 0)
    vQueueUnregisterQueue (hQueue);
 8011fee:	6938      	ldr	r0, [r7, #16]
 8011ff0:	f001 f9b6 	bl	8013360 <vQueueUnregisterQueue>
    #endif

    stat = osOK;
 8011ff4:	2300      	movs	r3, #0
 8011ff6:	617b      	str	r3, [r7, #20]
    vQueueDelete (hQueue);
 8011ff8:	6938      	ldr	r0, [r7, #16]
 8011ffa:	f001 f83b 	bl	8013074 <vQueueDelete>
  }
#else
  stat = osError;
#endif

  return (stat);
 8011ffe:	697b      	ldr	r3, [r7, #20]
}
 8012000:	4618      	mov	r0, r3
 8012002:	3718      	adds	r7, #24
 8012004:	46bd      	mov	sp, r7
 8012006:	bd80      	pop	{r7, pc}

08012008 <vApplicationGetIdleTaskMemory>:

/*
  vApplicationGetIdleTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetIdleTaskMemory (StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) {
 8012008:	b480      	push	{r7}
 801200a:	b085      	sub	sp, #20
 801200c:	af00      	add	r7, sp, #0
 801200e:	60f8      	str	r0, [r7, #12]
 8012010:	60b9      	str	r1, [r7, #8]
 8012012:	607a      	str	r2, [r7, #4]
  /* Idle task control block and stack */
  static StaticTask_t Idle_TCB;
  static StackType_t  Idle_Stack[configMINIMAL_STACK_SIZE];

  *ppxIdleTaskTCBBuffer   = &Idle_TCB;
 8012014:	68fb      	ldr	r3, [r7, #12]
 8012016:	4a07      	ldr	r2, [pc, #28]	@ (8012034 <vApplicationGetIdleTaskMemory+0x2c>)
 8012018:	601a      	str	r2, [r3, #0]
  *ppxIdleTaskStackBuffer = &Idle_Stack[0];
 801201a:	68bb      	ldr	r3, [r7, #8]
 801201c:	4a06      	ldr	r2, [pc, #24]	@ (8012038 <vApplicationGetIdleTaskMemory+0x30>)
 801201e:	601a      	str	r2, [r3, #0]
  *pulIdleTaskStackSize   = (uint32_t)configMINIMAL_STACK_SIZE;
 8012020:	687b      	ldr	r3, [r7, #4]
 8012022:	f44f 7200 	mov.w	r2, #512	@ 0x200
 8012026:	601a      	str	r2, [r3, #0]
}
 8012028:	bf00      	nop
 801202a:	3714      	adds	r7, #20
 801202c:	46bd      	mov	sp, r7
 801202e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012032:	4770      	bx	lr
 8012034:	24002420 	.word	0x24002420
 8012038:	240024c8 	.word	0x240024c8

0801203c <vApplicationGetTimerTaskMemory>:

/*
  vApplicationGetTimerTaskMemory gets called when configSUPPORT_STATIC_ALLOCATION
  equals to 1 and is required for static memory allocation support.
*/
__WEAK void vApplicationGetTimerTaskMemory (StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize) {
 801203c:	b480      	push	{r7}
 801203e:	b085      	sub	sp, #20
 8012040:	af00      	add	r7, sp, #0
 8012042:	60f8      	str	r0, [r7, #12]
 8012044:	60b9      	str	r1, [r7, #8]
 8012046:	607a      	str	r2, [r7, #4]
  /* Timer task control block and stack */
  static StaticTask_t Timer_TCB;
  static StackType_t  Timer_Stack[configTIMER_TASK_STACK_DEPTH];

  *ppxTimerTaskTCBBuffer   = &Timer_TCB;
 8012048:	68fb      	ldr	r3, [r7, #12]
 801204a:	4a07      	ldr	r2, [pc, #28]	@ (8012068 <vApplicationGetTimerTaskMemory+0x2c>)
 801204c:	601a      	str	r2, [r3, #0]
  *ppxTimerTaskStackBuffer = &Timer_Stack[0];
 801204e:	68bb      	ldr	r3, [r7, #8]
 8012050:	4a06      	ldr	r2, [pc, #24]	@ (801206c <vApplicationGetTimerTaskMemory+0x30>)
 8012052:	601a      	str	r2, [r3, #0]
  *pulTimerTaskStackSize   = (uint32_t)configTIMER_TASK_STACK_DEPTH;
 8012054:	687b      	ldr	r3, [r7, #4]
 8012056:	f44f 6280 	mov.w	r2, #1024	@ 0x400
 801205a:	601a      	str	r2, [r3, #0]
}
 801205c:	bf00      	nop
 801205e:	3714      	adds	r7, #20
 8012060:	46bd      	mov	sp, r7
 8012062:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012066:	4770      	bx	lr
 8012068:	24002cc8 	.word	0x24002cc8
 801206c:	24002d70 	.word	0x24002d70

08012070 <vListInitialise>:
/*-----------------------------------------------------------
 * PUBLIC LIST API documented in list.h
 *----------------------------------------------------------*/

void vListInitialise( List_t * const pxList )
{
 8012070:	b480      	push	{r7}
 8012072:	b083      	sub	sp, #12
 8012074:	af00      	add	r7, sp, #0
 8012076:	6078      	str	r0, [r7, #4]
	/* The list structure contains a list item which is used to mark the
	end of the list.  To initialise the list the list end is inserted
	as the only list entry. */
	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8012078:	687b      	ldr	r3, [r7, #4]
 801207a:	f103 0208 	add.w	r2, r3, #8
 801207e:	687b      	ldr	r3, [r7, #4]
 8012080:	605a      	str	r2, [r3, #4]

	/* The list end value is the highest possible value in the list to
	ensure it remains at the end of the list. */
	pxList->xListEnd.xItemValue = portMAX_DELAY;
 8012082:	687b      	ldr	r3, [r7, #4]
 8012084:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8012088:	609a      	str	r2, [r3, #8]

	/* The list end next and previous pointers point to itself so we know
	when the list is empty. */
	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 801208a:	687b      	ldr	r3, [r7, #4]
 801208c:	f103 0208 	add.w	r2, r3, #8
 8012090:	687b      	ldr	r3, [r7, #4]
 8012092:	60da      	str	r2, [r3, #12]
	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
 8012094:	687b      	ldr	r3, [r7, #4]
 8012096:	f103 0208 	add.w	r2, r3, #8
 801209a:	687b      	ldr	r3, [r7, #4]
 801209c:	611a      	str	r2, [r3, #16]

	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
 801209e:	687b      	ldr	r3, [r7, #4]
 80120a0:	2200      	movs	r2, #0
 80120a2:	601a      	str	r2, [r3, #0]

	/* Write known values into the list if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
}
 80120a4:	bf00      	nop
 80120a6:	370c      	adds	r7, #12
 80120a8:	46bd      	mov	sp, r7
 80120aa:	f85d 7b04 	ldr.w	r7, [sp], #4
 80120ae:	4770      	bx	lr

080120b0 <vListInitialiseItem>:
/*-----------------------------------------------------------*/

void vListInitialiseItem( ListItem_t * const pxItem )
{
 80120b0:	b480      	push	{r7}
 80120b2:	b083      	sub	sp, #12
 80120b4:	af00      	add	r7, sp, #0
 80120b6:	6078      	str	r0, [r7, #4]
	/* Make sure the list item is not recorded as being on a list. */
	pxItem->pxContainer = NULL;
 80120b8:	687b      	ldr	r3, [r7, #4]
 80120ba:	2200      	movs	r2, #0
 80120bc:	611a      	str	r2, [r3, #16]

	/* Write known values into the list item if
	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
}
 80120be:	bf00      	nop
 80120c0:	370c      	adds	r7, #12
 80120c2:	46bd      	mov	sp, r7
 80120c4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80120c8:	4770      	bx	lr

080120ca <vListInsertEnd>:
/*-----------------------------------------------------------*/

void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 80120ca:	b480      	push	{r7}
 80120cc:	b085      	sub	sp, #20
 80120ce:	af00      	add	r7, sp, #0
 80120d0:	6078      	str	r0, [r7, #4]
 80120d2:	6039      	str	r1, [r7, #0]
ListItem_t * const pxIndex = pxList->pxIndex;
 80120d4:	687b      	ldr	r3, [r7, #4]
 80120d6:	685b      	ldr	r3, [r3, #4]
 80120d8:	60fb      	str	r3, [r7, #12]
	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );

	/* Insert a new list item into pxList, but rather than sort the list,
	makes the new list item the last item to be removed by a call to
	listGET_OWNER_OF_NEXT_ENTRY(). */
	pxNewListItem->pxNext = pxIndex;
 80120da:	683b      	ldr	r3, [r7, #0]
 80120dc:	68fa      	ldr	r2, [r7, #12]
 80120de:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
 80120e0:	68fb      	ldr	r3, [r7, #12]
 80120e2:	689a      	ldr	r2, [r3, #8]
 80120e4:	683b      	ldr	r3, [r7, #0]
 80120e6:	609a      	str	r2, [r3, #8]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	pxIndex->pxPrevious->pxNext = pxNewListItem;
 80120e8:	68fb      	ldr	r3, [r7, #12]
 80120ea:	689b      	ldr	r3, [r3, #8]
 80120ec:	683a      	ldr	r2, [r7, #0]
 80120ee:	605a      	str	r2, [r3, #4]
	pxIndex->pxPrevious = pxNewListItem;
 80120f0:	68fb      	ldr	r3, [r7, #12]
 80120f2:	683a      	ldr	r2, [r7, #0]
 80120f4:	609a      	str	r2, [r3, #8]

	/* Remember which list the item is in. */
	pxNewListItem->pxContainer = pxList;
 80120f6:	683b      	ldr	r3, [r7, #0]
 80120f8:	687a      	ldr	r2, [r7, #4]
 80120fa:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 80120fc:	687b      	ldr	r3, [r7, #4]
 80120fe:	681b      	ldr	r3, [r3, #0]
 8012100:	1c5a      	adds	r2, r3, #1
 8012102:	687b      	ldr	r3, [r7, #4]
 8012104:	601a      	str	r2, [r3, #0]
}
 8012106:	bf00      	nop
 8012108:	3714      	adds	r7, #20
 801210a:	46bd      	mov	sp, r7
 801210c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012110:	4770      	bx	lr

08012112 <vListInsert>:
/*-----------------------------------------------------------*/

void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
{
 8012112:	b480      	push	{r7}
 8012114:	b085      	sub	sp, #20
 8012116:	af00      	add	r7, sp, #0
 8012118:	6078      	str	r0, [r7, #4]
 801211a:	6039      	str	r1, [r7, #0]
ListItem_t *pxIterator;
const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
 801211c:	683b      	ldr	r3, [r7, #0]
 801211e:	681b      	ldr	r3, [r3, #0]
 8012120:	60bb      	str	r3, [r7, #8]
	new list item should be placed after it.  This ensures that TCBs which are
	stored in ready lists (all of which have the same xItemValue value) get a
	share of the CPU.  However, if the xItemValue is the same as the back marker
	the iteration loop below will not end.  Therefore the value is checked
	first, and the algorithm slightly modified if necessary. */
	if( xValueOfInsertion == portMAX_DELAY )
 8012122:	68bb      	ldr	r3, [r7, #8]
 8012124:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012128:	d103      	bne.n	8012132 <vListInsert+0x20>
	{
		pxIterator = pxList->xListEnd.pxPrevious;
 801212a:	687b      	ldr	r3, [r7, #4]
 801212c:	691b      	ldr	r3, [r3, #16]
 801212e:	60fb      	str	r3, [r7, #12]
 8012130:	e00c      	b.n	801214c <vListInsert+0x3a>
			4) Using a queue or semaphore before it has been initialised or
			   before the scheduler has been started (are interrupts firing
			   before vTaskStartScheduler() has been called?).
		**********************************************************************/

		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
 8012132:	687b      	ldr	r3, [r7, #4]
 8012134:	3308      	adds	r3, #8
 8012136:	60fb      	str	r3, [r7, #12]
 8012138:	e002      	b.n	8012140 <vListInsert+0x2e>
 801213a:	68fb      	ldr	r3, [r7, #12]
 801213c:	685b      	ldr	r3, [r3, #4]
 801213e:	60fb      	str	r3, [r7, #12]
 8012140:	68fb      	ldr	r3, [r7, #12]
 8012142:	685b      	ldr	r3, [r3, #4]
 8012144:	681b      	ldr	r3, [r3, #0]
 8012146:	68ba      	ldr	r2, [r7, #8]
 8012148:	429a      	cmp	r2, r3
 801214a:	d2f6      	bcs.n	801213a <vListInsert+0x28>
			/* There is nothing to do here, just iterating to the wanted
			insertion position. */
		}
	}

	pxNewListItem->pxNext = pxIterator->pxNext;
 801214c:	68fb      	ldr	r3, [r7, #12]
 801214e:	685a      	ldr	r2, [r3, #4]
 8012150:	683b      	ldr	r3, [r7, #0]
 8012152:	605a      	str	r2, [r3, #4]
	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
 8012154:	683b      	ldr	r3, [r7, #0]
 8012156:	685b      	ldr	r3, [r3, #4]
 8012158:	683a      	ldr	r2, [r7, #0]
 801215a:	609a      	str	r2, [r3, #8]
	pxNewListItem->pxPrevious = pxIterator;
 801215c:	683b      	ldr	r3, [r7, #0]
 801215e:	68fa      	ldr	r2, [r7, #12]
 8012160:	609a      	str	r2, [r3, #8]
	pxIterator->pxNext = pxNewListItem;
 8012162:	68fb      	ldr	r3, [r7, #12]
 8012164:	683a      	ldr	r2, [r7, #0]
 8012166:	605a      	str	r2, [r3, #4]

	/* Remember which list the item is in.  This allows fast removal of the
	item later. */
	pxNewListItem->pxContainer = pxList;
 8012168:	683b      	ldr	r3, [r7, #0]
 801216a:	687a      	ldr	r2, [r7, #4]
 801216c:	611a      	str	r2, [r3, #16]

	( pxList->uxNumberOfItems )++;
 801216e:	687b      	ldr	r3, [r7, #4]
 8012170:	681b      	ldr	r3, [r3, #0]
 8012172:	1c5a      	adds	r2, r3, #1
 8012174:	687b      	ldr	r3, [r7, #4]
 8012176:	601a      	str	r2, [r3, #0]
}
 8012178:	bf00      	nop
 801217a:	3714      	adds	r7, #20
 801217c:	46bd      	mov	sp, r7
 801217e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8012182:	4770      	bx	lr

08012184 <uxListRemove>:
/*-----------------------------------------------------------*/

UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
{
 8012184:	b480      	push	{r7}
 8012186:	b085      	sub	sp, #20
 8012188:	af00      	add	r7, sp, #0
 801218a:	6078      	str	r0, [r7, #4]
/* The list item knows which list it is in.  Obtain the list from the list
item. */
List_t * const pxList = pxItemToRemove->pxContainer;
 801218c:	687b      	ldr	r3, [r7, #4]
 801218e:	691b      	ldr	r3, [r3, #16]
 8012190:	60fb      	str	r3, [r7, #12]

	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
 8012192:	687b      	ldr	r3, [r7, #4]
 8012194:	685b      	ldr	r3, [r3, #4]
 8012196:	687a      	ldr	r2, [r7, #4]
 8012198:	6892      	ldr	r2, [r2, #8]
 801219a:	609a      	str	r2, [r3, #8]
	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
 801219c:	687b      	ldr	r3, [r7, #4]
 801219e:	689b      	ldr	r3, [r3, #8]
 80121a0:	687a      	ldr	r2, [r7, #4]
 80121a2:	6852      	ldr	r2, [r2, #4]
 80121a4:	605a      	str	r2, [r3, #4]

	/* Only used during decision coverage testing. */
	mtCOVERAGE_TEST_DELAY();

	/* Make sure the index is left pointing to a valid item. */
	if( pxList->pxIndex == pxItemToRemove )
 80121a6:	68fb      	ldr	r3, [r7, #12]
 80121a8:	685b      	ldr	r3, [r3, #4]
 80121aa:	687a      	ldr	r2, [r7, #4]
 80121ac:	429a      	cmp	r2, r3
 80121ae:	d103      	bne.n	80121b8 <uxListRemove+0x34>
	{
		pxList->pxIndex = pxItemToRemove->pxPrevious;
 80121b0:	687b      	ldr	r3, [r7, #4]
 80121b2:	689a      	ldr	r2, [r3, #8]
 80121b4:	68fb      	ldr	r3, [r7, #12]
 80121b6:	605a      	str	r2, [r3, #4]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxItemToRemove->pxContainer = NULL;
 80121b8:	687b      	ldr	r3, [r7, #4]
 80121ba:	2200      	movs	r2, #0
 80121bc:	611a      	str	r2, [r3, #16]
	( pxList->uxNumberOfItems )--;
 80121be:	68fb      	ldr	r3, [r7, #12]
 80121c0:	681b      	ldr	r3, [r3, #0]
 80121c2:	1e5a      	subs	r2, r3, #1
 80121c4:	68fb      	ldr	r3, [r7, #12]
 80121c6:	601a      	str	r2, [r3, #0]

	return pxList->uxNumberOfItems;
 80121c8:	68fb      	ldr	r3, [r7, #12]
 80121ca:	681b      	ldr	r3, [r3, #0]
}
 80121cc:	4618      	mov	r0, r3
 80121ce:	3714      	adds	r7, #20
 80121d0:	46bd      	mov	sp, r7
 80121d2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80121d6:	4770      	bx	lr

080121d8 <xQueueGenericReset>:
	}														\
	taskEXIT_CRITICAL()
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
{
 80121d8:	b580      	push	{r7, lr}
 80121da:	b084      	sub	sp, #16
 80121dc:	af00      	add	r7, sp, #0
 80121de:	6078      	str	r0, [r7, #4]
 80121e0:	6039      	str	r1, [r7, #0]
Queue_t * const pxQueue = xQueue;
 80121e2:	687b      	ldr	r3, [r7, #4]
 80121e4:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 80121e6:	68fb      	ldr	r3, [r7, #12]
 80121e8:	2b00      	cmp	r3, #0
 80121ea:	d10b      	bne.n	8012204 <xQueueGenericReset+0x2c>

portFORCE_INLINE static void vPortRaiseBASEPRI( void )
{
uint32_t ulNewBASEPRI;

	__asm volatile
 80121ec:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80121f0:	f383 8811 	msr	BASEPRI, r3
 80121f4:	f3bf 8f6f 	isb	sy
 80121f8:	f3bf 8f4f 	dsb	sy
 80121fc:	60bb      	str	r3, [r7, #8]
		"	msr basepri, %0											\n" \
		"	isb														\n" \
		"	dsb														\n" \
		:"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);
}
 80121fe:	bf00      	nop
 8012200:	bf00      	nop
 8012202:	e7fd      	b.n	8012200 <xQueueGenericReset+0x28>

	taskENTER_CRITICAL();
 8012204:	f003 fcd8 	bl	8015bb8 <vPortEnterCritical>
	{
		pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 8012208:	68fb      	ldr	r3, [r7, #12]
 801220a:	681a      	ldr	r2, [r3, #0]
 801220c:	68fb      	ldr	r3, [r7, #12]
 801220e:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012210:	68f9      	ldr	r1, [r7, #12]
 8012212:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 8012214:	fb01 f303 	mul.w	r3, r1, r3
 8012218:	441a      	add	r2, r3
 801221a:	68fb      	ldr	r3, [r7, #12]
 801221c:	609a      	str	r2, [r3, #8]
		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
 801221e:	68fb      	ldr	r3, [r7, #12]
 8012220:	2200      	movs	r2, #0
 8012222:	639a      	str	r2, [r3, #56]	@ 0x38
		pxQueue->pcWriteTo = pxQueue->pcHead;
 8012224:	68fb      	ldr	r3, [r7, #12]
 8012226:	681a      	ldr	r2, [r3, #0]
 8012228:	68fb      	ldr	r3, [r7, #12]
 801222a:	605a      	str	r2, [r3, #4]
		pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 801222c:	68fb      	ldr	r3, [r7, #12]
 801222e:	681a      	ldr	r2, [r3, #0]
 8012230:	68fb      	ldr	r3, [r7, #12]
 8012232:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012234:	3b01      	subs	r3, #1
 8012236:	68f9      	ldr	r1, [r7, #12]
 8012238:	6c09      	ldr	r1, [r1, #64]	@ 0x40
 801223a:	fb01 f303 	mul.w	r3, r1, r3
 801223e:	441a      	add	r2, r3
 8012240:	68fb      	ldr	r3, [r7, #12]
 8012242:	60da      	str	r2, [r3, #12]
		pxQueue->cRxLock = queueUNLOCKED;
 8012244:	68fb      	ldr	r3, [r7, #12]
 8012246:	22ff      	movs	r2, #255	@ 0xff
 8012248:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
		pxQueue->cTxLock = queueUNLOCKED;
 801224c:	68fb      	ldr	r3, [r7, #12]
 801224e:	22ff      	movs	r2, #255	@ 0xff
 8012250:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45

		if( xNewQueue == pdFALSE )
 8012254:	683b      	ldr	r3, [r7, #0]
 8012256:	2b00      	cmp	r3, #0
 8012258:	d114      	bne.n	8012284 <xQueueGenericReset+0xac>
			/* If there are tasks blocked waiting to read from the queue, then
			the tasks will remain blocked as after this function exits the queue
			will still be empty.  If there are tasks blocked waiting to write to
			the queue, then one should be unblocked as after this function exits
			it will be possible to write to it. */
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 801225a:	68fb      	ldr	r3, [r7, #12]
 801225c:	691b      	ldr	r3, [r3, #16]
 801225e:	2b00      	cmp	r3, #0
 8012260:	d01a      	beq.n	8012298 <xQueueGenericReset+0xc0>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8012262:	68fb      	ldr	r3, [r7, #12]
 8012264:	3310      	adds	r3, #16
 8012266:	4618      	mov	r0, r3
 8012268:	f002 f922 	bl	80144b0 <xTaskRemoveFromEventList>
 801226c:	4603      	mov	r3, r0
 801226e:	2b00      	cmp	r3, #0
 8012270:	d012      	beq.n	8012298 <xQueueGenericReset+0xc0>
				{
					queueYIELD_IF_USING_PREEMPTION();
 8012272:	4b0d      	ldr	r3, [pc, #52]	@ (80122a8 <xQueueGenericReset+0xd0>)
 8012274:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012278:	601a      	str	r2, [r3, #0]
 801227a:	f3bf 8f4f 	dsb	sy
 801227e:	f3bf 8f6f 	isb	sy
 8012282:	e009      	b.n	8012298 <xQueueGenericReset+0xc0>
			}
		}
		else
		{
			/* Ensure the event queues start in the correct state. */
			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
 8012284:	68fb      	ldr	r3, [r7, #12]
 8012286:	3310      	adds	r3, #16
 8012288:	4618      	mov	r0, r3
 801228a:	f7ff fef1 	bl	8012070 <vListInitialise>
			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
 801228e:	68fb      	ldr	r3, [r7, #12]
 8012290:	3324      	adds	r3, #36	@ 0x24
 8012292:	4618      	mov	r0, r3
 8012294:	f7ff feec 	bl	8012070 <vListInitialise>
		}
	}
	taskEXIT_CRITICAL();
 8012298:	f003 fcc0 	bl	8015c1c <vPortExitCritical>

	/* A value is returned for calling semantic consistency with previous
	versions. */
	return pdPASS;
 801229c:	2301      	movs	r3, #1
}
 801229e:	4618      	mov	r0, r3
 80122a0:	3710      	adds	r7, #16
 80122a2:	46bd      	mov	sp, r7
 80122a4:	bd80      	pop	{r7, pc}
 80122a6:	bf00      	nop
 80122a8:	e000ed04 	.word	0xe000ed04

080122ac <xQueueGenericCreateStatic>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_STATIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
	{
 80122ac:	b580      	push	{r7, lr}
 80122ae:	b08e      	sub	sp, #56	@ 0x38
 80122b0:	af02      	add	r7, sp, #8
 80122b2:	60f8      	str	r0, [r7, #12]
 80122b4:	60b9      	str	r1, [r7, #8]
 80122b6:	607a      	str	r2, [r7, #4]
 80122b8:	603b      	str	r3, [r7, #0]
	Queue_t *pxNewQueue;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 80122ba:	68fb      	ldr	r3, [r7, #12]
 80122bc:	2b00      	cmp	r3, #0
 80122be:	d10b      	bne.n	80122d8 <xQueueGenericCreateStatic+0x2c>
	__asm volatile
 80122c0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80122c4:	f383 8811 	msr	BASEPRI, r3
 80122c8:	f3bf 8f6f 	isb	sy
 80122cc:	f3bf 8f4f 	dsb	sy
 80122d0:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 80122d2:	bf00      	nop
 80122d4:	bf00      	nop
 80122d6:	e7fd      	b.n	80122d4 <xQueueGenericCreateStatic+0x28>

		/* The StaticQueue_t structure and the queue storage area must be
		supplied. */
		configASSERT( pxStaticQueue != NULL );
 80122d8:	683b      	ldr	r3, [r7, #0]
 80122da:	2b00      	cmp	r3, #0
 80122dc:	d10b      	bne.n	80122f6 <xQueueGenericCreateStatic+0x4a>
	__asm volatile
 80122de:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80122e2:	f383 8811 	msr	BASEPRI, r3
 80122e6:	f3bf 8f6f 	isb	sy
 80122ea:	f3bf 8f4f 	dsb	sy
 80122ee:	627b      	str	r3, [r7, #36]	@ 0x24
}
 80122f0:	bf00      	nop
 80122f2:	bf00      	nop
 80122f4:	e7fd      	b.n	80122f2 <xQueueGenericCreateStatic+0x46>

		/* A queue storage area should be provided if the item size is not 0, and
		should not be provided if the item size is 0. */
		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
 80122f6:	687b      	ldr	r3, [r7, #4]
 80122f8:	2b00      	cmp	r3, #0
 80122fa:	d002      	beq.n	8012302 <xQueueGenericCreateStatic+0x56>
 80122fc:	68bb      	ldr	r3, [r7, #8]
 80122fe:	2b00      	cmp	r3, #0
 8012300:	d001      	beq.n	8012306 <xQueueGenericCreateStatic+0x5a>
 8012302:	2301      	movs	r3, #1
 8012304:	e000      	b.n	8012308 <xQueueGenericCreateStatic+0x5c>
 8012306:	2300      	movs	r3, #0
 8012308:	2b00      	cmp	r3, #0
 801230a:	d10b      	bne.n	8012324 <xQueueGenericCreateStatic+0x78>
	__asm volatile
 801230c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012310:	f383 8811 	msr	BASEPRI, r3
 8012314:	f3bf 8f6f 	isb	sy
 8012318:	f3bf 8f4f 	dsb	sy
 801231c:	623b      	str	r3, [r7, #32]
}
 801231e:	bf00      	nop
 8012320:	bf00      	nop
 8012322:	e7fd      	b.n	8012320 <xQueueGenericCreateStatic+0x74>
		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
 8012324:	687b      	ldr	r3, [r7, #4]
 8012326:	2b00      	cmp	r3, #0
 8012328:	d102      	bne.n	8012330 <xQueueGenericCreateStatic+0x84>
 801232a:	68bb      	ldr	r3, [r7, #8]
 801232c:	2b00      	cmp	r3, #0
 801232e:	d101      	bne.n	8012334 <xQueueGenericCreateStatic+0x88>
 8012330:	2301      	movs	r3, #1
 8012332:	e000      	b.n	8012336 <xQueueGenericCreateStatic+0x8a>
 8012334:	2300      	movs	r3, #0
 8012336:	2b00      	cmp	r3, #0
 8012338:	d10b      	bne.n	8012352 <xQueueGenericCreateStatic+0xa6>
	__asm volatile
 801233a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801233e:	f383 8811 	msr	BASEPRI, r3
 8012342:	f3bf 8f6f 	isb	sy
 8012346:	f3bf 8f4f 	dsb	sy
 801234a:	61fb      	str	r3, [r7, #28]
}
 801234c:	bf00      	nop
 801234e:	bf00      	nop
 8012350:	e7fd      	b.n	801234e <xQueueGenericCreateStatic+0xa2>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
			the real queue and semaphore structures. */
			volatile size_t xSize = sizeof( StaticQueue_t );
 8012352:	2350      	movs	r3, #80	@ 0x50
 8012354:	617b      	str	r3, [r7, #20]
			configASSERT( xSize == sizeof( Queue_t ) );
 8012356:	697b      	ldr	r3, [r7, #20]
 8012358:	2b50      	cmp	r3, #80	@ 0x50
 801235a:	d00b      	beq.n	8012374 <xQueueGenericCreateStatic+0xc8>
	__asm volatile
 801235c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012360:	f383 8811 	msr	BASEPRI, r3
 8012364:	f3bf 8f6f 	isb	sy
 8012368:	f3bf 8f4f 	dsb	sy
 801236c:	61bb      	str	r3, [r7, #24]
}
 801236e:	bf00      	nop
 8012370:	bf00      	nop
 8012372:	e7fd      	b.n	8012370 <xQueueGenericCreateStatic+0xc4>
			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
 8012374:	697b      	ldr	r3, [r7, #20]
		#endif /* configASSERT_DEFINED */

		/* The address of a statically allocated queue was passed in, use it.
		The address of a statically allocated storage area was also passed in
		but is already set. */
		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 8012376:	683b      	ldr	r3, [r7, #0]
 8012378:	62fb      	str	r3, [r7, #44]	@ 0x2c

		if( pxNewQueue != NULL )
 801237a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801237c:	2b00      	cmp	r3, #0
 801237e:	d00d      	beq.n	801239c <xQueueGenericCreateStatic+0xf0>
			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
			{
				/* Queues can be allocated wither statically or dynamically, so
				note this queue was allocated statically in case the queue is
				later deleted. */
				pxNewQueue->ucStaticallyAllocated = pdTRUE;
 8012380:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012382:	2201      	movs	r2, #1
 8012384:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 8012388:	f897 2038 	ldrb.w	r2, [r7, #56]	@ 0x38
 801238c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801238e:	9300      	str	r3, [sp, #0]
 8012390:	4613      	mov	r3, r2
 8012392:	687a      	ldr	r2, [r7, #4]
 8012394:	68b9      	ldr	r1, [r7, #8]
 8012396:	68f8      	ldr	r0, [r7, #12]
 8012398:	f000 f840 	bl	801241c <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 801239c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
	}
 801239e:	4618      	mov	r0, r3
 80123a0:	3730      	adds	r7, #48	@ 0x30
 80123a2:	46bd      	mov	sp, r7
 80123a4:	bd80      	pop	{r7, pc}

080123a6 <xQueueGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
	{
 80123a6:	b580      	push	{r7, lr}
 80123a8:	b08a      	sub	sp, #40	@ 0x28
 80123aa:	af02      	add	r7, sp, #8
 80123ac:	60f8      	str	r0, [r7, #12]
 80123ae:	60b9      	str	r1, [r7, #8]
 80123b0:	4613      	mov	r3, r2
 80123b2:	71fb      	strb	r3, [r7, #7]
	Queue_t *pxNewQueue;
	size_t xQueueSizeInBytes;
	uint8_t *pucQueueStorage;

		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
 80123b4:	68fb      	ldr	r3, [r7, #12]
 80123b6:	2b00      	cmp	r3, #0
 80123b8:	d10b      	bne.n	80123d2 <xQueueGenericCreate+0x2c>
	__asm volatile
 80123ba:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80123be:	f383 8811 	msr	BASEPRI, r3
 80123c2:	f3bf 8f6f 	isb	sy
 80123c6:	f3bf 8f4f 	dsb	sy
 80123ca:	613b      	str	r3, [r7, #16]
}
 80123cc:	bf00      	nop
 80123ce:	bf00      	nop
 80123d0:	e7fd      	b.n	80123ce <xQueueGenericCreate+0x28>

		/* Allocate enough space to hold the maximum number of items that
		can be in the queue at any time.  It is valid for uxItemSize to be
		zero in the case the queue is used as a semaphore. */
		xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 80123d2:	68fb      	ldr	r3, [r7, #12]
 80123d4:	68ba      	ldr	r2, [r7, #8]
 80123d6:	fb02 f303 	mul.w	r3, r2, r3
 80123da:	61fb      	str	r3, [r7, #28]
		alignment requirements of the Queue_t structure - which in this case
		is an int8_t *.  Therefore, whenever the stack alignment requirements
		are greater than or equal to the pointer to char requirements the cast
		is safe.  In other cases alignment requirements are not strict (one or
		two bytes). */
		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
 80123dc:	69fb      	ldr	r3, [r7, #28]
 80123de:	3350      	adds	r3, #80	@ 0x50
 80123e0:	4618      	mov	r0, r3
 80123e2:	f003 fd0b 	bl	8015dfc <pvPortMalloc>
 80123e6:	61b8      	str	r0, [r7, #24]

		if( pxNewQueue != NULL )
 80123e8:	69bb      	ldr	r3, [r7, #24]
 80123ea:	2b00      	cmp	r3, #0
 80123ec:	d011      	beq.n	8012412 <xQueueGenericCreate+0x6c>
		{
			/* Jump past the queue structure to find the location of the queue
			storage area. */
			pucQueueStorage = ( uint8_t * ) pxNewQueue;
 80123ee:	69bb      	ldr	r3, [r7, #24]
 80123f0:	617b      	str	r3, [r7, #20]
			pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
 80123f2:	697b      	ldr	r3, [r7, #20]
 80123f4:	3350      	adds	r3, #80	@ 0x50
 80123f6:	617b      	str	r3, [r7, #20]
			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
			{
				/* Queues can be created either statically or dynamically, so
				note this task was created dynamically in case it is later
				deleted. */
				pxNewQueue->ucStaticallyAllocated = pdFALSE;
 80123f8:	69bb      	ldr	r3, [r7, #24]
 80123fa:	2200      	movs	r2, #0
 80123fc:	f883 2046 	strb.w	r2, [r3, #70]	@ 0x46
			}
			#endif /* configSUPPORT_STATIC_ALLOCATION */

			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
 8012400:	79fa      	ldrb	r2, [r7, #7]
 8012402:	69bb      	ldr	r3, [r7, #24]
 8012404:	9300      	str	r3, [sp, #0]
 8012406:	4613      	mov	r3, r2
 8012408:	697a      	ldr	r2, [r7, #20]
 801240a:	68b9      	ldr	r1, [r7, #8]
 801240c:	68f8      	ldr	r0, [r7, #12]
 801240e:	f000 f805 	bl	801241c <prvInitialiseNewQueue>
		{
			traceQUEUE_CREATE_FAILED( ucQueueType );
			mtCOVERAGE_TEST_MARKER();
		}

		return pxNewQueue;
 8012412:	69bb      	ldr	r3, [r7, #24]
	}
 8012414:	4618      	mov	r0, r3
 8012416:	3720      	adds	r7, #32
 8012418:	46bd      	mov	sp, r7
 801241a:	bd80      	pop	{r7, pc}

0801241c <prvInitialiseNewQueue>:

#endif /* configSUPPORT_STATIC_ALLOCATION */
/*-----------------------------------------------------------*/

static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
{
 801241c:	b580      	push	{r7, lr}
 801241e:	b084      	sub	sp, #16
 8012420:	af00      	add	r7, sp, #0
 8012422:	60f8      	str	r0, [r7, #12]
 8012424:	60b9      	str	r1, [r7, #8]
 8012426:	607a      	str	r2, [r7, #4]
 8012428:	70fb      	strb	r3, [r7, #3]
	/* Remove compiler warnings about unused parameters should
	configUSE_TRACE_FACILITY not be set to 1. */
	( void ) ucQueueType;

	if( uxItemSize == ( UBaseType_t ) 0 )
 801242a:	68bb      	ldr	r3, [r7, #8]
 801242c:	2b00      	cmp	r3, #0
 801242e:	d103      	bne.n	8012438 <prvInitialiseNewQueue+0x1c>
	{
		/* No RAM was allocated for the queue storage area, but PC head cannot
		be set to NULL because NULL is used as a key to say the queue is used as
		a mutex.  Therefore just set pcHead to point to the queue as a benign
		value that is known to be within the memory map. */
		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
 8012430:	69bb      	ldr	r3, [r7, #24]
 8012432:	69ba      	ldr	r2, [r7, #24]
 8012434:	601a      	str	r2, [r3, #0]
 8012436:	e002      	b.n	801243e <prvInitialiseNewQueue+0x22>
	}
	else
	{
		/* Set the head to the start of the queue storage area. */
		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
 8012438:	69bb      	ldr	r3, [r7, #24]
 801243a:	687a      	ldr	r2, [r7, #4]
 801243c:	601a      	str	r2, [r3, #0]
	}

	/* Initialise the queue members as described where the queue type is
	defined. */
	pxNewQueue->uxLength = uxQueueLength;
 801243e:	69bb      	ldr	r3, [r7, #24]
 8012440:	68fa      	ldr	r2, [r7, #12]
 8012442:	63da      	str	r2, [r3, #60]	@ 0x3c
	pxNewQueue->uxItemSize = uxItemSize;
 8012444:	69bb      	ldr	r3, [r7, #24]
 8012446:	68ba      	ldr	r2, [r7, #8]
 8012448:	641a      	str	r2, [r3, #64]	@ 0x40
	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
 801244a:	2101      	movs	r1, #1
 801244c:	69b8      	ldr	r0, [r7, #24]
 801244e:	f7ff fec3 	bl	80121d8 <xQueueGenericReset>

	#if ( configUSE_TRACE_FACILITY == 1 )
	{
		pxNewQueue->ucQueueType = ucQueueType;
 8012452:	69bb      	ldr	r3, [r7, #24]
 8012454:	78fa      	ldrb	r2, [r7, #3]
 8012456:	f883 204c 	strb.w	r2, [r3, #76]	@ 0x4c
		pxNewQueue->pxQueueSetContainer = NULL;
	}
	#endif /* configUSE_QUEUE_SETS */

	traceQUEUE_CREATE( pxNewQueue );
}
 801245a:	bf00      	nop
 801245c:	3710      	adds	r7, #16
 801245e:	46bd      	mov	sp, r7
 8012460:	bd80      	pop	{r7, pc}

08012462 <prvInitialiseMutex>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static void prvInitialiseMutex( Queue_t *pxNewQueue )
	{
 8012462:	b580      	push	{r7, lr}
 8012464:	b082      	sub	sp, #8
 8012466:	af00      	add	r7, sp, #0
 8012468:	6078      	str	r0, [r7, #4]
		if( pxNewQueue != NULL )
 801246a:	687b      	ldr	r3, [r7, #4]
 801246c:	2b00      	cmp	r3, #0
 801246e:	d00e      	beq.n	801248e <prvInitialiseMutex+0x2c>
		{
			/* The queue create function will set all the queue structure members
			correctly for a generic queue, but this function is creating a
			mutex.  Overwrite those members that need to be set differently -
			in particular the information required for priority inheritance. */
			pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
 8012470:	687b      	ldr	r3, [r7, #4]
 8012472:	2200      	movs	r2, #0
 8012474:	609a      	str	r2, [r3, #8]
			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
 8012476:	687b      	ldr	r3, [r7, #4]
 8012478:	2200      	movs	r2, #0
 801247a:	601a      	str	r2, [r3, #0]

			/* In case this is a recursive mutex. */
			pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
 801247c:	687b      	ldr	r3, [r7, #4]
 801247e:	2200      	movs	r2, #0
 8012480:	60da      	str	r2, [r3, #12]

			traceCREATE_MUTEX( pxNewQueue );

			/* Start with the semaphore in the expected state. */
			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
 8012482:	2300      	movs	r3, #0
 8012484:	2200      	movs	r2, #0
 8012486:	2100      	movs	r1, #0
 8012488:	6878      	ldr	r0, [r7, #4]
 801248a:	f000 f911 	bl	80126b0 <xQueueGenericSend>
		}
		else
		{
			traceCREATE_MUTEX_FAILED();
		}
	}
 801248e:	bf00      	nop
 8012490:	3708      	adds	r7, #8
 8012492:	46bd      	mov	sp, r7
 8012494:	bd80      	pop	{r7, pc}

08012496 <xQueueCreateMutex>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
	{
 8012496:	b580      	push	{r7, lr}
 8012498:	b086      	sub	sp, #24
 801249a:	af00      	add	r7, sp, #0
 801249c:	4603      	mov	r3, r0
 801249e:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 80124a0:	2301      	movs	r3, #1
 80124a2:	617b      	str	r3, [r7, #20]
 80124a4:	2300      	movs	r3, #0
 80124a6:	613b      	str	r3, [r7, #16]

		xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
 80124a8:	79fb      	ldrb	r3, [r7, #7]
 80124aa:	461a      	mov	r2, r3
 80124ac:	6939      	ldr	r1, [r7, #16]
 80124ae:	6978      	ldr	r0, [r7, #20]
 80124b0:	f7ff ff79 	bl	80123a6 <xQueueGenericCreate>
 80124b4:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 80124b6:	68f8      	ldr	r0, [r7, #12]
 80124b8:	f7ff ffd3 	bl	8012462 <prvInitialiseMutex>

		return xNewQueue;
 80124bc:	68fb      	ldr	r3, [r7, #12]
	}
 80124be:	4618      	mov	r0, r3
 80124c0:	3718      	adds	r7, #24
 80124c2:	46bd      	mov	sp, r7
 80124c4:	bd80      	pop	{r7, pc}

080124c6 <xQueueCreateMutexStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
	{
 80124c6:	b580      	push	{r7, lr}
 80124c8:	b088      	sub	sp, #32
 80124ca:	af02      	add	r7, sp, #8
 80124cc:	4603      	mov	r3, r0
 80124ce:	6039      	str	r1, [r7, #0]
 80124d0:	71fb      	strb	r3, [r7, #7]
	QueueHandle_t xNewQueue;
	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
 80124d2:	2301      	movs	r3, #1
 80124d4:	617b      	str	r3, [r7, #20]
 80124d6:	2300      	movs	r3, #0
 80124d8:	613b      	str	r3, [r7, #16]

		/* Prevent compiler warnings about unused parameters if
		configUSE_TRACE_FACILITY does not equal 1. */
		( void ) ucQueueType;

		xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
 80124da:	79fb      	ldrb	r3, [r7, #7]
 80124dc:	9300      	str	r3, [sp, #0]
 80124de:	683b      	ldr	r3, [r7, #0]
 80124e0:	2200      	movs	r2, #0
 80124e2:	6939      	ldr	r1, [r7, #16]
 80124e4:	6978      	ldr	r0, [r7, #20]
 80124e6:	f7ff fee1 	bl	80122ac <xQueueGenericCreateStatic>
 80124ea:	60f8      	str	r0, [r7, #12]
		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
 80124ec:	68f8      	ldr	r0, [r7, #12]
 80124ee:	f7ff ffb8 	bl	8012462 <prvInitialiseMutex>

		return xNewQueue;
 80124f2:	68fb      	ldr	r3, [r7, #12]
	}
 80124f4:	4618      	mov	r0, r3
 80124f6:	3718      	adds	r7, #24
 80124f8:	46bd      	mov	sp, r7
 80124fa:	bd80      	pop	{r7, pc}

080124fc <xQueueGiveMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
	{
 80124fc:	b590      	push	{r4, r7, lr}
 80124fe:	b087      	sub	sp, #28
 8012500:	af00      	add	r7, sp, #0
 8012502:	6078      	str	r0, [r7, #4]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 8012504:	687b      	ldr	r3, [r7, #4]
 8012506:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 8012508:	693b      	ldr	r3, [r7, #16]
 801250a:	2b00      	cmp	r3, #0
 801250c:	d10b      	bne.n	8012526 <xQueueGiveMutexRecursive+0x2a>
	__asm volatile
 801250e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012512:	f383 8811 	msr	BASEPRI, r3
 8012516:	f3bf 8f6f 	isb	sy
 801251a:	f3bf 8f4f 	dsb	sy
 801251e:	60fb      	str	r3, [r7, #12]
}
 8012520:	bf00      	nop
 8012522:	bf00      	nop
 8012524:	e7fd      	b.n	8012522 <xQueueGiveMutexRecursive+0x26>
		change outside of this task.  If this task does not hold the mutex then
		pxMutexHolder can never coincidentally equal the tasks handle, and as
		this is the only condition we are interested in it does not matter if
		pxMutexHolder is accessed simultaneously by another task.  Therefore no
		mutual exclusion is required to test the pxMutexHolder variable. */
		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 8012526:	693b      	ldr	r3, [r7, #16]
 8012528:	689c      	ldr	r4, [r3, #8]
 801252a:	f002 f9af 	bl	801488c <xTaskGetCurrentTaskHandle>
 801252e:	4603      	mov	r3, r0
 8012530:	429c      	cmp	r4, r3
 8012532:	d111      	bne.n	8012558 <xQueueGiveMutexRecursive+0x5c>
			/* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
			the task handle, therefore no underflow check is required.  Also,
			uxRecursiveCallCount is only modified by the mutex holder, and as
			there can only be one, no mutual exclusion is required to modify the
			uxRecursiveCallCount member. */
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
 8012534:	693b      	ldr	r3, [r7, #16]
 8012536:	68db      	ldr	r3, [r3, #12]
 8012538:	1e5a      	subs	r2, r3, #1
 801253a:	693b      	ldr	r3, [r7, #16]
 801253c:	60da      	str	r2, [r3, #12]

			/* Has the recursive call count unwound to 0? */
			if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
 801253e:	693b      	ldr	r3, [r7, #16]
 8012540:	68db      	ldr	r3, [r3, #12]
 8012542:	2b00      	cmp	r3, #0
 8012544:	d105      	bne.n	8012552 <xQueueGiveMutexRecursive+0x56>
			{
				/* Return the mutex.  This will automatically unblock any other
				task that might be waiting to access the mutex. */
				( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
 8012546:	2300      	movs	r3, #0
 8012548:	2200      	movs	r2, #0
 801254a:	2100      	movs	r1, #0
 801254c:	6938      	ldr	r0, [r7, #16]
 801254e:	f000 f8af 	bl	80126b0 <xQueueGenericSend>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			xReturn = pdPASS;
 8012552:	2301      	movs	r3, #1
 8012554:	617b      	str	r3, [r7, #20]
 8012556:	e001      	b.n	801255c <xQueueGiveMutexRecursive+0x60>
		}
		else
		{
			/* The mutex cannot be given because the calling task is not the
			holder. */
			xReturn = pdFAIL;
 8012558:	2300      	movs	r3, #0
 801255a:	617b      	str	r3, [r7, #20]

			traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
		}

		return xReturn;
 801255c:	697b      	ldr	r3, [r7, #20]
	}
 801255e:	4618      	mov	r0, r3
 8012560:	371c      	adds	r7, #28
 8012562:	46bd      	mov	sp, r7
 8012564:	bd90      	pop	{r4, r7, pc}

08012566 <xQueueTakeMutexRecursive>:
/*-----------------------------------------------------------*/

#if ( configUSE_RECURSIVE_MUTEXES == 1 )

	BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
	{
 8012566:	b590      	push	{r4, r7, lr}
 8012568:	b087      	sub	sp, #28
 801256a:	af00      	add	r7, sp, #0
 801256c:	6078      	str	r0, [r7, #4]
 801256e:	6039      	str	r1, [r7, #0]
	BaseType_t xReturn;
	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
 8012570:	687b      	ldr	r3, [r7, #4]
 8012572:	613b      	str	r3, [r7, #16]

		configASSERT( pxMutex );
 8012574:	693b      	ldr	r3, [r7, #16]
 8012576:	2b00      	cmp	r3, #0
 8012578:	d10b      	bne.n	8012592 <xQueueTakeMutexRecursive+0x2c>
	__asm volatile
 801257a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801257e:	f383 8811 	msr	BASEPRI, r3
 8012582:	f3bf 8f6f 	isb	sy
 8012586:	f3bf 8f4f 	dsb	sy
 801258a:	60fb      	str	r3, [r7, #12]
}
 801258c:	bf00      	nop
 801258e:	bf00      	nop
 8012590:	e7fd      	b.n	801258e <xQueueTakeMutexRecursive+0x28>
		/* Comments regarding mutual exclusion as per those within
		xQueueGiveMutexRecursive(). */

		traceTAKE_MUTEX_RECURSIVE( pxMutex );

		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
 8012592:	693b      	ldr	r3, [r7, #16]
 8012594:	689c      	ldr	r4, [r3, #8]
 8012596:	f002 f979 	bl	801488c <xTaskGetCurrentTaskHandle>
 801259a:	4603      	mov	r3, r0
 801259c:	429c      	cmp	r4, r3
 801259e:	d107      	bne.n	80125b0 <xQueueTakeMutexRecursive+0x4a>
		{
			( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 80125a0:	693b      	ldr	r3, [r7, #16]
 80125a2:	68db      	ldr	r3, [r3, #12]
 80125a4:	1c5a      	adds	r2, r3, #1
 80125a6:	693b      	ldr	r3, [r7, #16]
 80125a8:	60da      	str	r2, [r3, #12]
			xReturn = pdPASS;
 80125aa:	2301      	movs	r3, #1
 80125ac:	617b      	str	r3, [r7, #20]
 80125ae:	e00c      	b.n	80125ca <xQueueTakeMutexRecursive+0x64>
		}
		else
		{
			xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
 80125b0:	6839      	ldr	r1, [r7, #0]
 80125b2:	6938      	ldr	r0, [r7, #16]
 80125b4:	f000 fb8e 	bl	8012cd4 <xQueueSemaphoreTake>
 80125b8:	6178      	str	r0, [r7, #20]

			/* pdPASS will only be returned if the mutex was successfully
			obtained.  The calling task may have entered the Blocked state
			before reaching here. */
			if( xReturn != pdFAIL )
 80125ba:	697b      	ldr	r3, [r7, #20]
 80125bc:	2b00      	cmp	r3, #0
 80125be:	d004      	beq.n	80125ca <xQueueTakeMutexRecursive+0x64>
			{
				( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
 80125c0:	693b      	ldr	r3, [r7, #16]
 80125c2:	68db      	ldr	r3, [r3, #12]
 80125c4:	1c5a      	adds	r2, r3, #1
 80125c6:	693b      	ldr	r3, [r7, #16]
 80125c8:	60da      	str	r2, [r3, #12]
			{
				traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
			}
		}

		return xReturn;
 80125ca:	697b      	ldr	r3, [r7, #20]
	}
 80125cc:	4618      	mov	r0, r3
 80125ce:	371c      	adds	r7, #28
 80125d0:	46bd      	mov	sp, r7
 80125d2:	bd90      	pop	{r4, r7, pc}

080125d4 <xQueueCreateCountingSemaphoreStatic>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
	{
 80125d4:	b580      	push	{r7, lr}
 80125d6:	b08a      	sub	sp, #40	@ 0x28
 80125d8:	af02      	add	r7, sp, #8
 80125da:	60f8      	str	r0, [r7, #12]
 80125dc:	60b9      	str	r1, [r7, #8]
 80125de:	607a      	str	r2, [r7, #4]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 80125e0:	68fb      	ldr	r3, [r7, #12]
 80125e2:	2b00      	cmp	r3, #0
 80125e4:	d10b      	bne.n	80125fe <xQueueCreateCountingSemaphoreStatic+0x2a>
	__asm volatile
 80125e6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80125ea:	f383 8811 	msr	BASEPRI, r3
 80125ee:	f3bf 8f6f 	isb	sy
 80125f2:	f3bf 8f4f 	dsb	sy
 80125f6:	61bb      	str	r3, [r7, #24]
}
 80125f8:	bf00      	nop
 80125fa:	bf00      	nop
 80125fc:	e7fd      	b.n	80125fa <xQueueCreateCountingSemaphoreStatic+0x26>
		configASSERT( uxInitialCount <= uxMaxCount );
 80125fe:	68ba      	ldr	r2, [r7, #8]
 8012600:	68fb      	ldr	r3, [r7, #12]
 8012602:	429a      	cmp	r2, r3
 8012604:	d90b      	bls.n	801261e <xQueueCreateCountingSemaphoreStatic+0x4a>
	__asm volatile
 8012606:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801260a:	f383 8811 	msr	BASEPRI, r3
 801260e:	f3bf 8f6f 	isb	sy
 8012612:	f3bf 8f4f 	dsb	sy
 8012616:	617b      	str	r3, [r7, #20]
}
 8012618:	bf00      	nop
 801261a:	bf00      	nop
 801261c:	e7fd      	b.n	801261a <xQueueCreateCountingSemaphoreStatic+0x46>

		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 801261e:	2302      	movs	r3, #2
 8012620:	9300      	str	r3, [sp, #0]
 8012622:	687b      	ldr	r3, [r7, #4]
 8012624:	2200      	movs	r2, #0
 8012626:	2100      	movs	r1, #0
 8012628:	68f8      	ldr	r0, [r7, #12]
 801262a:	f7ff fe3f 	bl	80122ac <xQueueGenericCreateStatic>
 801262e:	61f8      	str	r0, [r7, #28]

		if( xHandle != NULL )
 8012630:	69fb      	ldr	r3, [r7, #28]
 8012632:	2b00      	cmp	r3, #0
 8012634:	d002      	beq.n	801263c <xQueueCreateCountingSemaphoreStatic+0x68>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 8012636:	69fb      	ldr	r3, [r7, #28]
 8012638:	68ba      	ldr	r2, [r7, #8]
 801263a:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 801263c:	69fb      	ldr	r3, [r7, #28]
	}
 801263e:	4618      	mov	r0, r3
 8012640:	3720      	adds	r7, #32
 8012642:	46bd      	mov	sp, r7
 8012644:	bd80      	pop	{r7, pc}

08012646 <xQueueCreateCountingSemaphore>:
/*-----------------------------------------------------------*/

#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )

	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
	{
 8012646:	b580      	push	{r7, lr}
 8012648:	b086      	sub	sp, #24
 801264a:	af00      	add	r7, sp, #0
 801264c:	6078      	str	r0, [r7, #4]
 801264e:	6039      	str	r1, [r7, #0]
	QueueHandle_t xHandle;

		configASSERT( uxMaxCount != 0 );
 8012650:	687b      	ldr	r3, [r7, #4]
 8012652:	2b00      	cmp	r3, #0
 8012654:	d10b      	bne.n	801266e <xQueueCreateCountingSemaphore+0x28>
	__asm volatile
 8012656:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801265a:	f383 8811 	msr	BASEPRI, r3
 801265e:	f3bf 8f6f 	isb	sy
 8012662:	f3bf 8f4f 	dsb	sy
 8012666:	613b      	str	r3, [r7, #16]
}
 8012668:	bf00      	nop
 801266a:	bf00      	nop
 801266c:	e7fd      	b.n	801266a <xQueueCreateCountingSemaphore+0x24>
		configASSERT( uxInitialCount <= uxMaxCount );
 801266e:	683a      	ldr	r2, [r7, #0]
 8012670:	687b      	ldr	r3, [r7, #4]
 8012672:	429a      	cmp	r2, r3
 8012674:	d90b      	bls.n	801268e <xQueueCreateCountingSemaphore+0x48>
	__asm volatile
 8012676:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801267a:	f383 8811 	msr	BASEPRI, r3
 801267e:	f3bf 8f6f 	isb	sy
 8012682:	f3bf 8f4f 	dsb	sy
 8012686:	60fb      	str	r3, [r7, #12]
}
 8012688:	bf00      	nop
 801268a:	bf00      	nop
 801268c:	e7fd      	b.n	801268a <xQueueCreateCountingSemaphore+0x44>

		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
 801268e:	2202      	movs	r2, #2
 8012690:	2100      	movs	r1, #0
 8012692:	6878      	ldr	r0, [r7, #4]
 8012694:	f7ff fe87 	bl	80123a6 <xQueueGenericCreate>
 8012698:	6178      	str	r0, [r7, #20]

		if( xHandle != NULL )
 801269a:	697b      	ldr	r3, [r7, #20]
 801269c:	2b00      	cmp	r3, #0
 801269e:	d002      	beq.n	80126a6 <xQueueCreateCountingSemaphore+0x60>
		{
			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
 80126a0:	697b      	ldr	r3, [r7, #20]
 80126a2:	683a      	ldr	r2, [r7, #0]
 80126a4:	639a      	str	r2, [r3, #56]	@ 0x38
		else
		{
			traceCREATE_COUNTING_SEMAPHORE_FAILED();
		}

		return xHandle;
 80126a6:	697b      	ldr	r3, [r7, #20]
	}
 80126a8:	4618      	mov	r0, r3
 80126aa:	3718      	adds	r7, #24
 80126ac:	46bd      	mov	sp, r7
 80126ae:	bd80      	pop	{r7, pc}

080126b0 <xQueueGenericSend>:

#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
{
 80126b0:	b580      	push	{r7, lr}
 80126b2:	b08e      	sub	sp, #56	@ 0x38
 80126b4:	af00      	add	r7, sp, #0
 80126b6:	60f8      	str	r0, [r7, #12]
 80126b8:	60b9      	str	r1, [r7, #8]
 80126ba:	607a      	str	r2, [r7, #4]
 80126bc:	603b      	str	r3, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
 80126be:	2300      	movs	r3, #0
 80126c0:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 80126c2:	68fb      	ldr	r3, [r7, #12]
 80126c4:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 80126c6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80126c8:	2b00      	cmp	r3, #0
 80126ca:	d10b      	bne.n	80126e4 <xQueueGenericSend+0x34>
	__asm volatile
 80126cc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80126d0:	f383 8811 	msr	BASEPRI, r3
 80126d4:	f3bf 8f6f 	isb	sy
 80126d8:	f3bf 8f4f 	dsb	sy
 80126dc:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 80126de:	bf00      	nop
 80126e0:	bf00      	nop
 80126e2:	e7fd      	b.n	80126e0 <xQueueGenericSend+0x30>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 80126e4:	68bb      	ldr	r3, [r7, #8]
 80126e6:	2b00      	cmp	r3, #0
 80126e8:	d103      	bne.n	80126f2 <xQueueGenericSend+0x42>
 80126ea:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80126ec:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80126ee:	2b00      	cmp	r3, #0
 80126f0:	d101      	bne.n	80126f6 <xQueueGenericSend+0x46>
 80126f2:	2301      	movs	r3, #1
 80126f4:	e000      	b.n	80126f8 <xQueueGenericSend+0x48>
 80126f6:	2300      	movs	r3, #0
 80126f8:	2b00      	cmp	r3, #0
 80126fa:	d10b      	bne.n	8012714 <xQueueGenericSend+0x64>
	__asm volatile
 80126fc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012700:	f383 8811 	msr	BASEPRI, r3
 8012704:	f3bf 8f6f 	isb	sy
 8012708:	f3bf 8f4f 	dsb	sy
 801270c:	627b      	str	r3, [r7, #36]	@ 0x24
}
 801270e:	bf00      	nop
 8012710:	bf00      	nop
 8012712:	e7fd      	b.n	8012710 <xQueueGenericSend+0x60>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8012714:	683b      	ldr	r3, [r7, #0]
 8012716:	2b02      	cmp	r3, #2
 8012718:	d103      	bne.n	8012722 <xQueueGenericSend+0x72>
 801271a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801271c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 801271e:	2b01      	cmp	r3, #1
 8012720:	d101      	bne.n	8012726 <xQueueGenericSend+0x76>
 8012722:	2301      	movs	r3, #1
 8012724:	e000      	b.n	8012728 <xQueueGenericSend+0x78>
 8012726:	2300      	movs	r3, #0
 8012728:	2b00      	cmp	r3, #0
 801272a:	d10b      	bne.n	8012744 <xQueueGenericSend+0x94>
	__asm volatile
 801272c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012730:	f383 8811 	msr	BASEPRI, r3
 8012734:	f3bf 8f6f 	isb	sy
 8012738:	f3bf 8f4f 	dsb	sy
 801273c:	623b      	str	r3, [r7, #32]
}
 801273e:	bf00      	nop
 8012740:	bf00      	nop
 8012742:	e7fd      	b.n	8012740 <xQueueGenericSend+0x90>
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8012744:	f002 f8b2 	bl	80148ac <xTaskGetSchedulerState>
 8012748:	4603      	mov	r3, r0
 801274a:	2b00      	cmp	r3, #0
 801274c:	d102      	bne.n	8012754 <xQueueGenericSend+0xa4>
 801274e:	687b      	ldr	r3, [r7, #4]
 8012750:	2b00      	cmp	r3, #0
 8012752:	d101      	bne.n	8012758 <xQueueGenericSend+0xa8>
 8012754:	2301      	movs	r3, #1
 8012756:	e000      	b.n	801275a <xQueueGenericSend+0xaa>
 8012758:	2300      	movs	r3, #0
 801275a:	2b00      	cmp	r3, #0
 801275c:	d10b      	bne.n	8012776 <xQueueGenericSend+0xc6>
	__asm volatile
 801275e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012762:	f383 8811 	msr	BASEPRI, r3
 8012766:	f3bf 8f6f 	isb	sy
 801276a:	f3bf 8f4f 	dsb	sy
 801276e:	61fb      	str	r3, [r7, #28]
}
 8012770:	bf00      	nop
 8012772:	bf00      	nop
 8012774:	e7fd      	b.n	8012772 <xQueueGenericSend+0xc2>
	/*lint -save -e904 This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8012776:	f003 fa1f 	bl	8015bb8 <vPortEnterCritical>
		{
			/* Is there room on the queue now?  The running task must be the
			highest priority task wanting to access the queue.  If the head item
			in the queue is to be overwritten then it does not matter if the
			queue is full. */
			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 801277a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801277c:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 801277e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012780:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012782:	429a      	cmp	r2, r3
 8012784:	d302      	bcc.n	801278c <xQueueGenericSend+0xdc>
 8012786:	683b      	ldr	r3, [r7, #0]
 8012788:	2b02      	cmp	r3, #2
 801278a:	d129      	bne.n	80127e0 <xQueueGenericSend+0x130>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 801278c:	683a      	ldr	r2, [r7, #0]
 801278e:	68b9      	ldr	r1, [r7, #8]
 8012790:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8012792:	f000 fcab 	bl	80130ec <prvCopyDataToQueue>
 8012796:	62f8      	str	r0, [r7, #44]	@ 0x2c

					/* If there was a task waiting for data to arrive on the
					queue then unblock it now. */
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8012798:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801279a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801279c:	2b00      	cmp	r3, #0
 801279e:	d010      	beq.n	80127c2 <xQueueGenericSend+0x112>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 80127a0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80127a2:	3324      	adds	r3, #36	@ 0x24
 80127a4:	4618      	mov	r0, r3
 80127a6:	f001 fe83 	bl	80144b0 <xTaskRemoveFromEventList>
 80127aa:	4603      	mov	r3, r0
 80127ac:	2b00      	cmp	r3, #0
 80127ae:	d013      	beq.n	80127d8 <xQueueGenericSend+0x128>
						{
							/* The unblocked task has a priority higher than
							our own so yield immediately.  Yes it is ok to do
							this from within the critical section - the kernel
							takes care of that. */
							queueYIELD_IF_USING_PREEMPTION();
 80127b0:	4b3f      	ldr	r3, [pc, #252]	@ (80128b0 <xQueueGenericSend+0x200>)
 80127b2:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80127b6:	601a      	str	r2, [r3, #0]
 80127b8:	f3bf 8f4f 	dsb	sy
 80127bc:	f3bf 8f6f 	isb	sy
 80127c0:	e00a      	b.n	80127d8 <xQueueGenericSend+0x128>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}
					}
					else if( xYieldRequired != pdFALSE )
 80127c2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80127c4:	2b00      	cmp	r3, #0
 80127c6:	d007      	beq.n	80127d8 <xQueueGenericSend+0x128>
					{
						/* This path is a special case that will only get
						executed if the task was holding multiple mutexes and
						the mutexes were given back in an order that is
						different to that in which they were taken. */
						queueYIELD_IF_USING_PREEMPTION();
 80127c8:	4b39      	ldr	r3, [pc, #228]	@ (80128b0 <xQueueGenericSend+0x200>)
 80127ca:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80127ce:	601a      	str	r2, [r3, #0]
 80127d0:	f3bf 8f4f 	dsb	sy
 80127d4:	f3bf 8f6f 	isb	sy
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif /* configUSE_QUEUE_SETS */

				taskEXIT_CRITICAL();
 80127d8:	f003 fa20 	bl	8015c1c <vPortExitCritical>
				return pdPASS;
 80127dc:	2301      	movs	r3, #1
 80127de:	e063      	b.n	80128a8 <xQueueGenericSend+0x1f8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 80127e0:	687b      	ldr	r3, [r7, #4]
 80127e2:	2b00      	cmp	r3, #0
 80127e4:	d103      	bne.n	80127ee <xQueueGenericSend+0x13e>
				{
					/* The queue was full and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 80127e6:	f003 fa19 	bl	8015c1c <vPortExitCritical>

					/* Return to the original privilege level before exiting
					the function. */
					traceQUEUE_SEND_FAILED( pxQueue );
					return errQUEUE_FULL;
 80127ea:	2300      	movs	r3, #0
 80127ec:	e05c      	b.n	80128a8 <xQueueGenericSend+0x1f8>
				}
				else if( xEntryTimeSet == pdFALSE )
 80127ee:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80127f0:	2b00      	cmp	r3, #0
 80127f2:	d106      	bne.n	8012802 <xQueueGenericSend+0x152>
				{
					/* The queue was full and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 80127f4:	f107 0314 	add.w	r3, r7, #20
 80127f8:	4618      	mov	r0, r3
 80127fa:	f001 fee5 	bl	80145c8 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 80127fe:	2301      	movs	r3, #1
 8012800:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8012802:	f003 fa0b 	bl	8015c1c <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 8012806:	f001 fc05 	bl	8014014 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 801280a:	f003 f9d5 	bl	8015bb8 <vPortEnterCritical>
 801280e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012810:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012814:	b25b      	sxtb	r3, r3
 8012816:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801281a:	d103      	bne.n	8012824 <xQueueGenericSend+0x174>
 801281c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801281e:	2200      	movs	r2, #0
 8012820:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8012824:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012826:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 801282a:	b25b      	sxtb	r3, r3
 801282c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012830:	d103      	bne.n	801283a <xQueueGenericSend+0x18a>
 8012832:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012834:	2200      	movs	r2, #0
 8012836:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 801283a:	f003 f9ef 	bl	8015c1c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 801283e:	1d3a      	adds	r2, r7, #4
 8012840:	f107 0314 	add.w	r3, r7, #20
 8012844:	4611      	mov	r1, r2
 8012846:	4618      	mov	r0, r3
 8012848:	f001 fed4 	bl	80145f4 <xTaskCheckForTimeOut>
 801284c:	4603      	mov	r3, r0
 801284e:	2b00      	cmp	r3, #0
 8012850:	d124      	bne.n	801289c <xQueueGenericSend+0x1ec>
		{
			if( prvIsQueueFull( pxQueue ) != pdFALSE )
 8012852:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8012854:	f000 fd42 	bl	80132dc <prvIsQueueFull>
 8012858:	4603      	mov	r3, r0
 801285a:	2b00      	cmp	r3, #0
 801285c:	d018      	beq.n	8012890 <xQueueGenericSend+0x1e0>
			{
				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
 801285e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012860:	3310      	adds	r3, #16
 8012862:	687a      	ldr	r2, [r7, #4]
 8012864:	4611      	mov	r1, r2
 8012866:	4618      	mov	r0, r3
 8012868:	f001 fdd0 	bl	801440c <vTaskPlaceOnEventList>
				/* Unlocking the queue means queue events can effect the
				event list.  It is possible that interrupts occurring now
				remove this task from the event list again - but as the
				scheduler is suspended the task will go onto the pending
				ready last instead of the actual ready list. */
				prvUnlockQueue( pxQueue );
 801286c:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801286e:	f000 fccd 	bl	801320c <prvUnlockQueue>
				/* Resuming the scheduler will move tasks from the pending
				ready list into the ready list - so it is feasible that this
				task is already in a ready list before it yields - in which
				case the yield will not cause a context switch unless there
				is also a higher priority task in the pending ready list. */
				if( xTaskResumeAll() == pdFALSE )
 8012872:	f001 fbdd 	bl	8014030 <xTaskResumeAll>
 8012876:	4603      	mov	r3, r0
 8012878:	2b00      	cmp	r3, #0
 801287a:	f47f af7c 	bne.w	8012776 <xQueueGenericSend+0xc6>
				{
					portYIELD_WITHIN_API();
 801287e:	4b0c      	ldr	r3, [pc, #48]	@ (80128b0 <xQueueGenericSend+0x200>)
 8012880:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012884:	601a      	str	r2, [r3, #0]
 8012886:	f3bf 8f4f 	dsb	sy
 801288a:	f3bf 8f6f 	isb	sy
 801288e:	e772      	b.n	8012776 <xQueueGenericSend+0xc6>
				}
			}
			else
			{
				/* Try again. */
				prvUnlockQueue( pxQueue );
 8012890:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8012892:	f000 fcbb 	bl	801320c <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8012896:	f001 fbcb 	bl	8014030 <xTaskResumeAll>
 801289a:	e76c      	b.n	8012776 <xQueueGenericSend+0xc6>
			}
		}
		else
		{
			/* The timeout has expired. */
			prvUnlockQueue( pxQueue );
 801289c:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 801289e:	f000 fcb5 	bl	801320c <prvUnlockQueue>
			( void ) xTaskResumeAll();
 80128a2:	f001 fbc5 	bl	8014030 <xTaskResumeAll>

			traceQUEUE_SEND_FAILED( pxQueue );
			return errQUEUE_FULL;
 80128a6:	2300      	movs	r3, #0
		}
	} /*lint -restore */
}
 80128a8:	4618      	mov	r0, r3
 80128aa:	3738      	adds	r7, #56	@ 0x38
 80128ac:	46bd      	mov	sp, r7
 80128ae:	bd80      	pop	{r7, pc}
 80128b0:	e000ed04 	.word	0xe000ed04

080128b4 <xQueueGenericSendFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
{
 80128b4:	b580      	push	{r7, lr}
 80128b6:	b090      	sub	sp, #64	@ 0x40
 80128b8:	af00      	add	r7, sp, #0
 80128ba:	60f8      	str	r0, [r7, #12]
 80128bc:	60b9      	str	r1, [r7, #8]
 80128be:	607a      	str	r2, [r7, #4]
 80128c0:	603b      	str	r3, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 80128c2:	68fb      	ldr	r3, [r7, #12]
 80128c4:	63bb      	str	r3, [r7, #56]	@ 0x38

	configASSERT( pxQueue );
 80128c6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80128c8:	2b00      	cmp	r3, #0
 80128ca:	d10b      	bne.n	80128e4 <xQueueGenericSendFromISR+0x30>
	__asm volatile
 80128cc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80128d0:	f383 8811 	msr	BASEPRI, r3
 80128d4:	f3bf 8f6f 	isb	sy
 80128d8:	f3bf 8f4f 	dsb	sy
 80128dc:	62bb      	str	r3, [r7, #40]	@ 0x28
}
 80128de:	bf00      	nop
 80128e0:	bf00      	nop
 80128e2:	e7fd      	b.n	80128e0 <xQueueGenericSendFromISR+0x2c>
	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 80128e4:	68bb      	ldr	r3, [r7, #8]
 80128e6:	2b00      	cmp	r3, #0
 80128e8:	d103      	bne.n	80128f2 <xQueueGenericSendFromISR+0x3e>
 80128ea:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80128ec:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80128ee:	2b00      	cmp	r3, #0
 80128f0:	d101      	bne.n	80128f6 <xQueueGenericSendFromISR+0x42>
 80128f2:	2301      	movs	r3, #1
 80128f4:	e000      	b.n	80128f8 <xQueueGenericSendFromISR+0x44>
 80128f6:	2300      	movs	r3, #0
 80128f8:	2b00      	cmp	r3, #0
 80128fa:	d10b      	bne.n	8012914 <xQueueGenericSendFromISR+0x60>
	__asm volatile
 80128fc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012900:	f383 8811 	msr	BASEPRI, r3
 8012904:	f3bf 8f6f 	isb	sy
 8012908:	f3bf 8f4f 	dsb	sy
 801290c:	627b      	str	r3, [r7, #36]	@ 0x24
}
 801290e:	bf00      	nop
 8012910:	bf00      	nop
 8012912:	e7fd      	b.n	8012910 <xQueueGenericSendFromISR+0x5c>
	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
 8012914:	683b      	ldr	r3, [r7, #0]
 8012916:	2b02      	cmp	r3, #2
 8012918:	d103      	bne.n	8012922 <xQueueGenericSendFromISR+0x6e>
 801291a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801291c:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 801291e:	2b01      	cmp	r3, #1
 8012920:	d101      	bne.n	8012926 <xQueueGenericSendFromISR+0x72>
 8012922:	2301      	movs	r3, #1
 8012924:	e000      	b.n	8012928 <xQueueGenericSendFromISR+0x74>
 8012926:	2300      	movs	r3, #0
 8012928:	2b00      	cmp	r3, #0
 801292a:	d10b      	bne.n	8012944 <xQueueGenericSendFromISR+0x90>
	__asm volatile
 801292c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012930:	f383 8811 	msr	BASEPRI, r3
 8012934:	f3bf 8f6f 	isb	sy
 8012938:	f3bf 8f4f 	dsb	sy
 801293c:	623b      	str	r3, [r7, #32]
}
 801293e:	bf00      	nop
 8012940:	bf00      	nop
 8012942:	e7fd      	b.n	8012940 <xQueueGenericSendFromISR+0x8c>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8012944:	f003 fa18 	bl	8015d78 <vPortValidateInterruptPriority>

portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )
{
uint32_t ulOriginalBASEPRI, ulNewBASEPRI;

	__asm volatile
 8012948:	f3ef 8211 	mrs	r2, BASEPRI
 801294c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012950:	f383 8811 	msr	BASEPRI, r3
 8012954:	f3bf 8f6f 	isb	sy
 8012958:	f3bf 8f4f 	dsb	sy
 801295c:	61fa      	str	r2, [r7, #28]
 801295e:	61bb      	str	r3, [r7, #24]
		:"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"
	);

	/* This return will not be reached but is necessary to prevent compiler
	warnings. */
	return ulOriginalBASEPRI;
 8012960:	69fb      	ldr	r3, [r7, #28]
	/* Similar to xQueueGenericSend, except without blocking if there is no room
	in the queue.  Also don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */
	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8012962:	637b      	str	r3, [r7, #52]	@ 0x34
	{
		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
 8012964:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012966:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 8012968:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801296a:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 801296c:	429a      	cmp	r2, r3
 801296e:	d302      	bcc.n	8012976 <xQueueGenericSendFromISR+0xc2>
 8012970:	683b      	ldr	r3, [r7, #0]
 8012972:	2b02      	cmp	r3, #2
 8012974:	d12f      	bne.n	80129d6 <xQueueGenericSendFromISR+0x122>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 8012976:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012978:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 801297c:	f887 3033 	strb.w	r3, [r7, #51]	@ 0x33
			const UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012980:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8012982:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012984:	62fb      	str	r3, [r7, #44]	@ 0x2c
			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
			in a task disinheriting a priority and prvCopyDataToQueue() can be
			called here even though the disinherit function does not check if
			the scheduler is suspended before accessing the ready lists. */
			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
 8012986:	683a      	ldr	r2, [r7, #0]
 8012988:	68b9      	ldr	r1, [r7, #8]
 801298a:	6bb8      	ldr	r0, [r7, #56]	@ 0x38
 801298c:	f000 fbae 	bl	80130ec <prvCopyDataToQueue>

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 8012990:	f997 3033 	ldrsb.w	r3, [r7, #51]	@ 0x33
 8012994:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012998:	d112      	bne.n	80129c0 <xQueueGenericSendFromISR+0x10c>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 801299a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801299c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801299e:	2b00      	cmp	r3, #0
 80129a0:	d016      	beq.n	80129d0 <xQueueGenericSendFromISR+0x11c>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 80129a2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80129a4:	3324      	adds	r3, #36	@ 0x24
 80129a6:	4618      	mov	r0, r3
 80129a8:	f001 fd82 	bl	80144b0 <xTaskRemoveFromEventList>
 80129ac:	4603      	mov	r3, r0
 80129ae:	2b00      	cmp	r3, #0
 80129b0:	d00e      	beq.n	80129d0 <xQueueGenericSendFromISR+0x11c>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 80129b2:	687b      	ldr	r3, [r7, #4]
 80129b4:	2b00      	cmp	r3, #0
 80129b6:	d00b      	beq.n	80129d0 <xQueueGenericSendFromISR+0x11c>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 80129b8:	687b      	ldr	r3, [r7, #4]
 80129ba:	2201      	movs	r2, #1
 80129bc:	601a      	str	r2, [r3, #0]
 80129be:	e007      	b.n	80129d0 <xQueueGenericSendFromISR+0x11c>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 80129c0:	f897 3033 	ldrb.w	r3, [r7, #51]	@ 0x33
 80129c4:	3301      	adds	r3, #1
 80129c6:	b2db      	uxtb	r3, r3
 80129c8:	b25a      	sxtb	r2, r3
 80129ca:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80129cc:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 80129d0:	2301      	movs	r3, #1
 80129d2:	63fb      	str	r3, [r7, #60]	@ 0x3c
		{
 80129d4:	e001      	b.n	80129da <xQueueGenericSendFromISR+0x126>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 80129d6:	2300      	movs	r3, #0
 80129d8:	63fb      	str	r3, [r7, #60]	@ 0x3c
 80129da:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80129dc:	617b      	str	r3, [r7, #20]
}
/*-----------------------------------------------------------*/

portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )
{
	__asm volatile
 80129de:	697b      	ldr	r3, [r7, #20]
 80129e0:	f383 8811 	msr	BASEPRI, r3
	(
		"	msr basepri, %0	" :: "r" ( ulNewMaskValue ) : "memory"
	);
}
 80129e4:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 80129e6:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 80129e8:	4618      	mov	r0, r3
 80129ea:	3740      	adds	r7, #64	@ 0x40
 80129ec:	46bd      	mov	sp, r7
 80129ee:	bd80      	pop	{r7, pc}

080129f0 <xQueueGiveFromISR>:
/*-----------------------------------------------------------*/

BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
{
 80129f0:	b580      	push	{r7, lr}
 80129f2:	b08e      	sub	sp, #56	@ 0x38
 80129f4:	af00      	add	r7, sp, #0
 80129f6:	6078      	str	r0, [r7, #4]
 80129f8:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 80129fa:	687b      	ldr	r3, [r7, #4]
 80129fc:	633b      	str	r3, [r7, #48]	@ 0x30
	item size is 0.  Don't directly wake a task that was blocked on a queue
	read, instead return a flag to say whether a context switch is required or
	not (i.e. has a task with a higher priority than us been woken by this
	post). */

	configASSERT( pxQueue );
 80129fe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a00:	2b00      	cmp	r3, #0
 8012a02:	d10b      	bne.n	8012a1c <xQueueGiveFromISR+0x2c>
	__asm volatile
 8012a04:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012a08:	f383 8811 	msr	BASEPRI, r3
 8012a0c:	f3bf 8f6f 	isb	sy
 8012a10:	f3bf 8f4f 	dsb	sy
 8012a14:	623b      	str	r3, [r7, #32]
}
 8012a16:	bf00      	nop
 8012a18:	bf00      	nop
 8012a1a:	e7fd      	b.n	8012a18 <xQueueGiveFromISR+0x28>

	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
	if the item size is not 0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 8012a1c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a1e:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012a20:	2b00      	cmp	r3, #0
 8012a22:	d00b      	beq.n	8012a3c <xQueueGiveFromISR+0x4c>
	__asm volatile
 8012a24:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012a28:	f383 8811 	msr	BASEPRI, r3
 8012a2c:	f3bf 8f6f 	isb	sy
 8012a30:	f3bf 8f4f 	dsb	sy
 8012a34:	61fb      	str	r3, [r7, #28]
}
 8012a36:	bf00      	nop
 8012a38:	bf00      	nop
 8012a3a:	e7fd      	b.n	8012a38 <xQueueGiveFromISR+0x48>

	/* Normally a mutex would not be given from an interrupt, especially if
	there is a mutex holder, as priority inheritance makes no sense for an
	interrupts, only tasks. */
	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
 8012a3c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a3e:	681b      	ldr	r3, [r3, #0]
 8012a40:	2b00      	cmp	r3, #0
 8012a42:	d103      	bne.n	8012a4c <xQueueGiveFromISR+0x5c>
 8012a44:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a46:	689b      	ldr	r3, [r3, #8]
 8012a48:	2b00      	cmp	r3, #0
 8012a4a:	d101      	bne.n	8012a50 <xQueueGiveFromISR+0x60>
 8012a4c:	2301      	movs	r3, #1
 8012a4e:	e000      	b.n	8012a52 <xQueueGiveFromISR+0x62>
 8012a50:	2300      	movs	r3, #0
 8012a52:	2b00      	cmp	r3, #0
 8012a54:	d10b      	bne.n	8012a6e <xQueueGiveFromISR+0x7e>
	__asm volatile
 8012a56:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012a5a:	f383 8811 	msr	BASEPRI, r3
 8012a5e:	f3bf 8f6f 	isb	sy
 8012a62:	f3bf 8f4f 	dsb	sy
 8012a66:	61bb      	str	r3, [r7, #24]
}
 8012a68:	bf00      	nop
 8012a6a:	bf00      	nop
 8012a6c:	e7fd      	b.n	8012a6a <xQueueGiveFromISR+0x7a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8012a6e:	f003 f983 	bl	8015d78 <vPortValidateInterruptPriority>
	__asm volatile
 8012a72:	f3ef 8211 	mrs	r2, BASEPRI
 8012a76:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012a7a:	f383 8811 	msr	BASEPRI, r3
 8012a7e:	f3bf 8f6f 	isb	sy
 8012a82:	f3bf 8f4f 	dsb	sy
 8012a86:	617a      	str	r2, [r7, #20]
 8012a88:	613b      	str	r3, [r7, #16]
	return ulOriginalBASEPRI;
 8012a8a:	697b      	ldr	r3, [r7, #20]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8012a8c:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012a8e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a90:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012a92:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* When the queue is used to implement a semaphore no data is ever
		moved through the queue but it is still valid to see if the queue 'has
		space'. */
		if( uxMessagesWaiting < pxQueue->uxLength )
 8012a94:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012a96:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 8012a98:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8012a9a:	429a      	cmp	r2, r3
 8012a9c:	d22b      	bcs.n	8012af6 <xQueueGiveFromISR+0x106>
		{
			const int8_t cTxLock = pxQueue->cTxLock;
 8012a9e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012aa0:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012aa4:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			holder - and if there is a mutex holder then the mutex cannot be
			given from an ISR.  As this is the ISR version of the function it
			can be assumed there is no mutex holder and no need to determine if
			priority disinheritance is needed.  Simply increase the count of
			messages (semaphores) available. */
			pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 8012aa8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012aaa:	1c5a      	adds	r2, r3, #1
 8012aac:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012aae:	639a      	str	r2, [r3, #56]	@ 0x38

			/* The event list is not altered if the queue is locked.  This will
			be done when the queue is unlocked later. */
			if( cTxLock == queueUNLOCKED )
 8012ab0:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8012ab4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012ab8:	d112      	bne.n	8012ae0 <xQueueGiveFromISR+0xf0>
						}
					}
				}
				#else /* configUSE_QUEUE_SETS */
				{
					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8012aba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012abc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8012abe:	2b00      	cmp	r3, #0
 8012ac0:	d016      	beq.n	8012af0 <xQueueGiveFromISR+0x100>
					{
						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 8012ac2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ac4:	3324      	adds	r3, #36	@ 0x24
 8012ac6:	4618      	mov	r0, r3
 8012ac8:	f001 fcf2 	bl	80144b0 <xTaskRemoveFromEventList>
 8012acc:	4603      	mov	r3, r0
 8012ace:	2b00      	cmp	r3, #0
 8012ad0:	d00e      	beq.n	8012af0 <xQueueGiveFromISR+0x100>
						{
							/* The task waiting has a higher priority so record that a
							context	switch is required. */
							if( pxHigherPriorityTaskWoken != NULL )
 8012ad2:	683b      	ldr	r3, [r7, #0]
 8012ad4:	2b00      	cmp	r3, #0
 8012ad6:	d00b      	beq.n	8012af0 <xQueueGiveFromISR+0x100>
							{
								*pxHigherPriorityTaskWoken = pdTRUE;
 8012ad8:	683b      	ldr	r3, [r7, #0]
 8012ada:	2201      	movs	r2, #1
 8012adc:	601a      	str	r2, [r3, #0]
 8012ade:	e007      	b.n	8012af0 <xQueueGiveFromISR+0x100>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was posted while it was locked. */
				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
 8012ae0:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8012ae4:	3301      	adds	r3, #1
 8012ae6:	b2db      	uxtb	r3, r3
 8012ae8:	b25a      	sxtb	r2, r3
 8012aea:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012aec:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
			}

			xReturn = pdPASS;
 8012af0:	2301      	movs	r3, #1
 8012af2:	637b      	str	r3, [r7, #52]	@ 0x34
 8012af4:	e001      	b.n	8012afa <xQueueGiveFromISR+0x10a>
		}
		else
		{
			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
			xReturn = errQUEUE_FULL;
 8012af6:	2300      	movs	r3, #0
 8012af8:	637b      	str	r3, [r7, #52]	@ 0x34
 8012afa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012afc:	60fb      	str	r3, [r7, #12]
	__asm volatile
 8012afe:	68fb      	ldr	r3, [r7, #12]
 8012b00:	f383 8811 	msr	BASEPRI, r3
}
 8012b04:	bf00      	nop
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8012b06:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8012b08:	4618      	mov	r0, r3
 8012b0a:	3738      	adds	r7, #56	@ 0x38
 8012b0c:	46bd      	mov	sp, r7
 8012b0e:	bd80      	pop	{r7, pc}

08012b10 <xQueueReceive>:
/*-----------------------------------------------------------*/

BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
{
 8012b10:	b580      	push	{r7, lr}
 8012b12:	b08c      	sub	sp, #48	@ 0x30
 8012b14:	af00      	add	r7, sp, #0
 8012b16:	60f8      	str	r0, [r7, #12]
 8012b18:	60b9      	str	r1, [r7, #8]
 8012b1a:	607a      	str	r2, [r7, #4]
BaseType_t xEntryTimeSet = pdFALSE;
 8012b1c:	2300      	movs	r3, #0
 8012b1e:	62fb      	str	r3, [r7, #44]	@ 0x2c
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 8012b20:	68fb      	ldr	r3, [r7, #12]
 8012b22:	62bb      	str	r3, [r7, #40]	@ 0x28

	/* Check the pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 8012b24:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012b26:	2b00      	cmp	r3, #0
 8012b28:	d10b      	bne.n	8012b42 <xQueueReceive+0x32>
	__asm volatile
 8012b2a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012b2e:	f383 8811 	msr	BASEPRI, r3
 8012b32:	f3bf 8f6f 	isb	sy
 8012b36:	f3bf 8f4f 	dsb	sy
 8012b3a:	623b      	str	r3, [r7, #32]
}
 8012b3c:	bf00      	nop
 8012b3e:	bf00      	nop
 8012b40:	e7fd      	b.n	8012b3e <xQueueReceive+0x2e>

	/* The buffer into which data is received can only be NULL if the data size
	is zero (so no data is copied into the buffer. */
	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8012b42:	68bb      	ldr	r3, [r7, #8]
 8012b44:	2b00      	cmp	r3, #0
 8012b46:	d103      	bne.n	8012b50 <xQueueReceive+0x40>
 8012b48:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012b4a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012b4c:	2b00      	cmp	r3, #0
 8012b4e:	d101      	bne.n	8012b54 <xQueueReceive+0x44>
 8012b50:	2301      	movs	r3, #1
 8012b52:	e000      	b.n	8012b56 <xQueueReceive+0x46>
 8012b54:	2300      	movs	r3, #0
 8012b56:	2b00      	cmp	r3, #0
 8012b58:	d10b      	bne.n	8012b72 <xQueueReceive+0x62>
	__asm volatile
 8012b5a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012b5e:	f383 8811 	msr	BASEPRI, r3
 8012b62:	f3bf 8f6f 	isb	sy
 8012b66:	f3bf 8f4f 	dsb	sy
 8012b6a:	61fb      	str	r3, [r7, #28]
}
 8012b6c:	bf00      	nop
 8012b6e:	bf00      	nop
 8012b70:	e7fd      	b.n	8012b6e <xQueueReceive+0x5e>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8012b72:	f001 fe9b 	bl	80148ac <xTaskGetSchedulerState>
 8012b76:	4603      	mov	r3, r0
 8012b78:	2b00      	cmp	r3, #0
 8012b7a:	d102      	bne.n	8012b82 <xQueueReceive+0x72>
 8012b7c:	687b      	ldr	r3, [r7, #4]
 8012b7e:	2b00      	cmp	r3, #0
 8012b80:	d101      	bne.n	8012b86 <xQueueReceive+0x76>
 8012b82:	2301      	movs	r3, #1
 8012b84:	e000      	b.n	8012b88 <xQueueReceive+0x78>
 8012b86:	2300      	movs	r3, #0
 8012b88:	2b00      	cmp	r3, #0
 8012b8a:	d10b      	bne.n	8012ba4 <xQueueReceive+0x94>
	__asm volatile
 8012b8c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012b90:	f383 8811 	msr	BASEPRI, r3
 8012b94:	f3bf 8f6f 	isb	sy
 8012b98:	f3bf 8f4f 	dsb	sy
 8012b9c:	61bb      	str	r3, [r7, #24]
}
 8012b9e:	bf00      	nop
 8012ba0:	bf00      	nop
 8012ba2:	e7fd      	b.n	8012ba0 <xQueueReceive+0x90>
	/*lint -save -e904  This function relaxes the coding standard somewhat to
	allow return statements within the function itself.  This is done in the
	interest of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8012ba4:	f003 f808 	bl	8015bb8 <vPortEnterCritical>
		{
			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012ba8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012baa:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012bac:	627b      	str	r3, [r7, #36]	@ 0x24

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8012bae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012bb0:	2b00      	cmp	r3, #0
 8012bb2:	d01f      	beq.n	8012bf4 <xQueueReceive+0xe4>
			{
				/* Data available, remove one item. */
				prvCopyDataFromQueue( pxQueue, pvBuffer );
 8012bb4:	68b9      	ldr	r1, [r7, #8]
 8012bb6:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012bb8:	f000 fb02 	bl	80131c0 <prvCopyDataFromQueue>
				traceQUEUE_RECEIVE( pxQueue );
				pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 8012bbc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8012bbe:	1e5a      	subs	r2, r3, #1
 8012bc0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012bc2:	639a      	str	r2, [r3, #56]	@ 0x38

				/* There is now space in the queue, were any tasks waiting to
				post to the queue?  If so, unblock the highest priority waiting
				task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012bc4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012bc6:	691b      	ldr	r3, [r3, #16]
 8012bc8:	2b00      	cmp	r3, #0
 8012bca:	d00f      	beq.n	8012bec <xQueueReceive+0xdc>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8012bcc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012bce:	3310      	adds	r3, #16
 8012bd0:	4618      	mov	r0, r3
 8012bd2:	f001 fc6d 	bl	80144b0 <xTaskRemoveFromEventList>
 8012bd6:	4603      	mov	r3, r0
 8012bd8:	2b00      	cmp	r3, #0
 8012bda:	d007      	beq.n	8012bec <xQueueReceive+0xdc>
					{
						queueYIELD_IF_USING_PREEMPTION();
 8012bdc:	4b3c      	ldr	r3, [pc, #240]	@ (8012cd0 <xQueueReceive+0x1c0>)
 8012bde:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012be2:	601a      	str	r2, [r3, #0]
 8012be4:	f3bf 8f4f 	dsb	sy
 8012be8:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 8012bec:	f003 f816 	bl	8015c1c <vPortExitCritical>
				return pdPASS;
 8012bf0:	2301      	movs	r3, #1
 8012bf2:	e069      	b.n	8012cc8 <xQueueReceive+0x1b8>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8012bf4:	687b      	ldr	r3, [r7, #4]
 8012bf6:	2b00      	cmp	r3, #0
 8012bf8:	d103      	bne.n	8012c02 <xQueueReceive+0xf2>
				{
					/* The queue was empty and no block time is specified (or
					the block time has expired) so leave now. */
					taskEXIT_CRITICAL();
 8012bfa:	f003 f80f 	bl	8015c1c <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 8012bfe:	2300      	movs	r3, #0
 8012c00:	e062      	b.n	8012cc8 <xQueueReceive+0x1b8>
				}
				else if( xEntryTimeSet == pdFALSE )
 8012c02:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012c04:	2b00      	cmp	r3, #0
 8012c06:	d106      	bne.n	8012c16 <xQueueReceive+0x106>
				{
					/* The queue was empty and a block time was specified so
					configure the timeout structure. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8012c08:	f107 0310 	add.w	r3, r7, #16
 8012c0c:	4618      	mov	r0, r3
 8012c0e:	f001 fcdb 	bl	80145c8 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 8012c12:	2301      	movs	r3, #1
 8012c14:	62fb      	str	r3, [r7, #44]	@ 0x2c
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8012c16:	f003 f801 	bl	8015c1c <vPortExitCritical>

		/* Interrupts and other tasks can send to and receive from the queue
		now the critical section has been exited. */

		vTaskSuspendAll();
 8012c1a:	f001 f9fb 	bl	8014014 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 8012c1e:	f002 ffcb 	bl	8015bb8 <vPortEnterCritical>
 8012c22:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012c24:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012c28:	b25b      	sxtb	r3, r3
 8012c2a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012c2e:	d103      	bne.n	8012c38 <xQueueReceive+0x128>
 8012c30:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012c32:	2200      	movs	r2, #0
 8012c34:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8012c38:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012c3a:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012c3e:	b25b      	sxtb	r3, r3
 8012c40:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012c44:	d103      	bne.n	8012c4e <xQueueReceive+0x13e>
 8012c46:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012c48:	2200      	movs	r2, #0
 8012c4a:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8012c4e:	f002 ffe5 	bl	8015c1c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 8012c52:	1d3a      	adds	r2, r7, #4
 8012c54:	f107 0310 	add.w	r3, r7, #16
 8012c58:	4611      	mov	r1, r2
 8012c5a:	4618      	mov	r0, r3
 8012c5c:	f001 fcca 	bl	80145f4 <xTaskCheckForTimeOut>
 8012c60:	4603      	mov	r3, r0
 8012c62:	2b00      	cmp	r3, #0
 8012c64:	d123      	bne.n	8012cae <xQueueReceive+0x19e>
		{
			/* The timeout has not expired.  If the queue is still empty place
			the task on the list of tasks waiting to receive from the queue. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012c66:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012c68:	f000 fb22 	bl	80132b0 <prvIsQueueEmpty>
 8012c6c:	4603      	mov	r3, r0
 8012c6e:	2b00      	cmp	r3, #0
 8012c70:	d017      	beq.n	8012ca2 <xQueueReceive+0x192>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 8012c72:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012c74:	3324      	adds	r3, #36	@ 0x24
 8012c76:	687a      	ldr	r2, [r7, #4]
 8012c78:	4611      	mov	r1, r2
 8012c7a:	4618      	mov	r0, r3
 8012c7c:	f001 fbc6 	bl	801440c <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 8012c80:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012c82:	f000 fac3 	bl	801320c <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8012c86:	f001 f9d3 	bl	8014030 <xTaskResumeAll>
 8012c8a:	4603      	mov	r3, r0
 8012c8c:	2b00      	cmp	r3, #0
 8012c8e:	d189      	bne.n	8012ba4 <xQueueReceive+0x94>
				{
					portYIELD_WITHIN_API();
 8012c90:	4b0f      	ldr	r3, [pc, #60]	@ (8012cd0 <xQueueReceive+0x1c0>)
 8012c92:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012c96:	601a      	str	r2, [r3, #0]
 8012c98:	f3bf 8f4f 	dsb	sy
 8012c9c:	f3bf 8f6f 	isb	sy
 8012ca0:	e780      	b.n	8012ba4 <xQueueReceive+0x94>
			}
			else
			{
				/* The queue contains data again.  Loop back to try and read the
				data. */
				prvUnlockQueue( pxQueue );
 8012ca2:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012ca4:	f000 fab2 	bl	801320c <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8012ca8:	f001 f9c2 	bl	8014030 <xTaskResumeAll>
 8012cac:	e77a      	b.n	8012ba4 <xQueueReceive+0x94>
		}
		else
		{
			/* Timed out.  If there is no data in the queue exit, otherwise loop
			back and attempt to read the data. */
			prvUnlockQueue( pxQueue );
 8012cae:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012cb0:	f000 faac 	bl	801320c <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8012cb4:	f001 f9bc 	bl	8014030 <xTaskResumeAll>

			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012cb8:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8012cba:	f000 faf9 	bl	80132b0 <prvIsQueueEmpty>
 8012cbe:	4603      	mov	r3, r0
 8012cc0:	2b00      	cmp	r3, #0
 8012cc2:	f43f af6f 	beq.w	8012ba4 <xQueueReceive+0x94>
			{
				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 8012cc6:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 8012cc8:	4618      	mov	r0, r3
 8012cca:	3730      	adds	r7, #48	@ 0x30
 8012ccc:	46bd      	mov	sp, r7
 8012cce:	bd80      	pop	{r7, pc}
 8012cd0:	e000ed04 	.word	0xe000ed04

08012cd4 <xQueueSemaphoreTake>:
/*-----------------------------------------------------------*/

BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
{
 8012cd4:	b580      	push	{r7, lr}
 8012cd6:	b08e      	sub	sp, #56	@ 0x38
 8012cd8:	af00      	add	r7, sp, #0
 8012cda:	6078      	str	r0, [r7, #4]
 8012cdc:	6039      	str	r1, [r7, #0]
BaseType_t xEntryTimeSet = pdFALSE;
 8012cde:	2300      	movs	r3, #0
 8012ce0:	637b      	str	r3, [r7, #52]	@ 0x34
TimeOut_t xTimeOut;
Queue_t * const pxQueue = xQueue;
 8012ce2:	687b      	ldr	r3, [r7, #4]
 8012ce4:	62fb      	str	r3, [r7, #44]	@ 0x2c

#if( configUSE_MUTEXES == 1 )
	BaseType_t xInheritanceOccurred = pdFALSE;
 8012ce6:	2300      	movs	r3, #0
 8012ce8:	633b      	str	r3, [r7, #48]	@ 0x30
#endif

	/* Check the queue pointer is not NULL. */
	configASSERT( ( pxQueue ) );
 8012cea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012cec:	2b00      	cmp	r3, #0
 8012cee:	d10b      	bne.n	8012d08 <xQueueSemaphoreTake+0x34>
	__asm volatile
 8012cf0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012cf4:	f383 8811 	msr	BASEPRI, r3
 8012cf8:	f3bf 8f6f 	isb	sy
 8012cfc:	f3bf 8f4f 	dsb	sy
 8012d00:	623b      	str	r3, [r7, #32]
}
 8012d02:	bf00      	nop
 8012d04:	bf00      	nop
 8012d06:	e7fd      	b.n	8012d04 <xQueueSemaphoreTake+0x30>

	/* Check this really is a semaphore, in which case the item size will be
	0. */
	configASSERT( pxQueue->uxItemSize == 0 );
 8012d08:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012d0a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012d0c:	2b00      	cmp	r3, #0
 8012d0e:	d00b      	beq.n	8012d28 <xQueueSemaphoreTake+0x54>
	__asm volatile
 8012d10:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012d14:	f383 8811 	msr	BASEPRI, r3
 8012d18:	f3bf 8f6f 	isb	sy
 8012d1c:	f3bf 8f4f 	dsb	sy
 8012d20:	61fb      	str	r3, [r7, #28]
}
 8012d22:	bf00      	nop
 8012d24:	bf00      	nop
 8012d26:	e7fd      	b.n	8012d24 <xQueueSemaphoreTake+0x50>

	/* Cannot block if the scheduler is suspended. */
	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
	{
		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
 8012d28:	f001 fdc0 	bl	80148ac <xTaskGetSchedulerState>
 8012d2c:	4603      	mov	r3, r0
 8012d2e:	2b00      	cmp	r3, #0
 8012d30:	d102      	bne.n	8012d38 <xQueueSemaphoreTake+0x64>
 8012d32:	683b      	ldr	r3, [r7, #0]
 8012d34:	2b00      	cmp	r3, #0
 8012d36:	d101      	bne.n	8012d3c <xQueueSemaphoreTake+0x68>
 8012d38:	2301      	movs	r3, #1
 8012d3a:	e000      	b.n	8012d3e <xQueueSemaphoreTake+0x6a>
 8012d3c:	2300      	movs	r3, #0
 8012d3e:	2b00      	cmp	r3, #0
 8012d40:	d10b      	bne.n	8012d5a <xQueueSemaphoreTake+0x86>
	__asm volatile
 8012d42:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012d46:	f383 8811 	msr	BASEPRI, r3
 8012d4a:	f3bf 8f6f 	isb	sy
 8012d4e:	f3bf 8f4f 	dsb	sy
 8012d52:	61bb      	str	r3, [r7, #24]
}
 8012d54:	bf00      	nop
 8012d56:	bf00      	nop
 8012d58:	e7fd      	b.n	8012d56 <xQueueSemaphoreTake+0x82>
	/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
	statements within the function itself.  This is done in the interest
	of execution time efficiency. */
	for( ;; )
	{
		taskENTER_CRITICAL();
 8012d5a:	f002 ff2d 	bl	8015bb8 <vPortEnterCritical>
		{
			/* Semaphores are queues with an item size of 0, and where the
			number of messages in the queue is the semaphore's count value. */
			const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
 8012d5e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012d60:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012d62:	62bb      	str	r3, [r7, #40]	@ 0x28

			/* Is there data in the queue now?  To be running the calling task
			must be the highest priority task wanting to access the queue. */
			if( uxSemaphoreCount > ( UBaseType_t ) 0 )
 8012d64:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012d66:	2b00      	cmp	r3, #0
 8012d68:	d024      	beq.n	8012db4 <xQueueSemaphoreTake+0xe0>
			{
				traceQUEUE_RECEIVE( pxQueue );

				/* Semaphores are queues with a data size of zero and where the
				messages waiting is the semaphore's count.  Reduce the count. */
				pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
 8012d6a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012d6c:	1e5a      	subs	r2, r3, #1
 8012d6e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012d70:	639a      	str	r2, [r3, #56]	@ 0x38

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8012d72:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012d74:	681b      	ldr	r3, [r3, #0]
 8012d76:	2b00      	cmp	r3, #0
 8012d78:	d104      	bne.n	8012d84 <xQueueSemaphoreTake+0xb0>
					{
						/* Record the information required to implement
						priority inheritance should it become necessary. */
						pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
 8012d7a:	f001 ff11 	bl	8014ba0 <pvTaskIncrementMutexHeldCount>
 8012d7e:	4602      	mov	r2, r0
 8012d80:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012d82:	609a      	str	r2, [r3, #8]
				}
				#endif /* configUSE_MUTEXES */

				/* Check to see if other tasks are blocked waiting to give the
				semaphore, and if so, unblock the highest priority such task. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012d84:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012d86:	691b      	ldr	r3, [r3, #16]
 8012d88:	2b00      	cmp	r3, #0
 8012d8a:	d00f      	beq.n	8012dac <xQueueSemaphoreTake+0xd8>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8012d8c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012d8e:	3310      	adds	r3, #16
 8012d90:	4618      	mov	r0, r3
 8012d92:	f001 fb8d 	bl	80144b0 <xTaskRemoveFromEventList>
 8012d96:	4603      	mov	r3, r0
 8012d98:	2b00      	cmp	r3, #0
 8012d9a:	d007      	beq.n	8012dac <xQueueSemaphoreTake+0xd8>
					{
						queueYIELD_IF_USING_PREEMPTION();
 8012d9c:	4b54      	ldr	r3, [pc, #336]	@ (8012ef0 <xQueueSemaphoreTake+0x21c>)
 8012d9e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012da2:	601a      	str	r2, [r3, #0]
 8012da4:	f3bf 8f4f 	dsb	sy
 8012da8:	f3bf 8f6f 	isb	sy
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				taskEXIT_CRITICAL();
 8012dac:	f002 ff36 	bl	8015c1c <vPortExitCritical>
				return pdPASS;
 8012db0:	2301      	movs	r3, #1
 8012db2:	e098      	b.n	8012ee6 <xQueueSemaphoreTake+0x212>
			}
			else
			{
				if( xTicksToWait == ( TickType_t ) 0 )
 8012db4:	683b      	ldr	r3, [r7, #0]
 8012db6:	2b00      	cmp	r3, #0
 8012db8:	d112      	bne.n	8012de0 <xQueueSemaphoreTake+0x10c>
					/* For inheritance to have occurred there must have been an
					initial timeout, and an adjusted timeout cannot become 0, as
					if it were 0 the function would have exited. */
					#if( configUSE_MUTEXES == 1 )
					{
						configASSERT( xInheritanceOccurred == pdFALSE );
 8012dba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012dbc:	2b00      	cmp	r3, #0
 8012dbe:	d00b      	beq.n	8012dd8 <xQueueSemaphoreTake+0x104>
	__asm volatile
 8012dc0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012dc4:	f383 8811 	msr	BASEPRI, r3
 8012dc8:	f3bf 8f6f 	isb	sy
 8012dcc:	f3bf 8f4f 	dsb	sy
 8012dd0:	617b      	str	r3, [r7, #20]
}
 8012dd2:	bf00      	nop
 8012dd4:	bf00      	nop
 8012dd6:	e7fd      	b.n	8012dd4 <xQueueSemaphoreTake+0x100>
					}
					#endif /* configUSE_MUTEXES */

					/* The semaphore count was 0 and no block time is specified
					(or the block time has expired) so exit now. */
					taskEXIT_CRITICAL();
 8012dd8:	f002 ff20 	bl	8015c1c <vPortExitCritical>
					traceQUEUE_RECEIVE_FAILED( pxQueue );
					return errQUEUE_EMPTY;
 8012ddc:	2300      	movs	r3, #0
 8012dde:	e082      	b.n	8012ee6 <xQueueSemaphoreTake+0x212>
				}
				else if( xEntryTimeSet == pdFALSE )
 8012de0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8012de2:	2b00      	cmp	r3, #0
 8012de4:	d106      	bne.n	8012df4 <xQueueSemaphoreTake+0x120>
				{
					/* The semaphore count was 0 and a block time was specified
					so configure the timeout structure ready to block. */
					vTaskInternalSetTimeOutState( &xTimeOut );
 8012de6:	f107 030c 	add.w	r3, r7, #12
 8012dea:	4618      	mov	r0, r3
 8012dec:	f001 fbec 	bl	80145c8 <vTaskInternalSetTimeOutState>
					xEntryTimeSet = pdTRUE;
 8012df0:	2301      	movs	r3, #1
 8012df2:	637b      	str	r3, [r7, #52]	@ 0x34
					/* Entry time was already set. */
					mtCOVERAGE_TEST_MARKER();
				}
			}
		}
		taskEXIT_CRITICAL();
 8012df4:	f002 ff12 	bl	8015c1c <vPortExitCritical>

		/* Interrupts and other tasks can give to and take from the semaphore
		now the critical section has been exited. */

		vTaskSuspendAll();
 8012df8:	f001 f90c 	bl	8014014 <vTaskSuspendAll>
		prvLockQueue( pxQueue );
 8012dfc:	f002 fedc 	bl	8015bb8 <vPortEnterCritical>
 8012e00:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e02:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012e06:	b25b      	sxtb	r3, r3
 8012e08:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012e0c:	d103      	bne.n	8012e16 <xQueueSemaphoreTake+0x142>
 8012e0e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e10:	2200      	movs	r2, #0
 8012e12:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 8012e16:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e18:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 8012e1c:	b25b      	sxtb	r3, r3
 8012e1e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012e22:	d103      	bne.n	8012e2c <xQueueSemaphoreTake+0x158>
 8012e24:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e26:	2200      	movs	r2, #0
 8012e28:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 8012e2c:	f002 fef6 	bl	8015c1c <vPortExitCritical>

		/* Update the timeout state to see if it has expired yet. */
		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
 8012e30:	463a      	mov	r2, r7
 8012e32:	f107 030c 	add.w	r3, r7, #12
 8012e36:	4611      	mov	r1, r2
 8012e38:	4618      	mov	r0, r3
 8012e3a:	f001 fbdb 	bl	80145f4 <xTaskCheckForTimeOut>
 8012e3e:	4603      	mov	r3, r0
 8012e40:	2b00      	cmp	r3, #0
 8012e42:	d132      	bne.n	8012eaa <xQueueSemaphoreTake+0x1d6>
		{
			/* A block time is specified and not expired.  If the semaphore
			count is 0 then enter the Blocked state to wait for a semaphore to
			become available.  As semaphores are implemented with queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012e44:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012e46:	f000 fa33 	bl	80132b0 <prvIsQueueEmpty>
 8012e4a:	4603      	mov	r3, r0
 8012e4c:	2b00      	cmp	r3, #0
 8012e4e:	d026      	beq.n	8012e9e <xQueueSemaphoreTake+0x1ca>
			{
				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );

				#if ( configUSE_MUTEXES == 1 )
				{
					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 8012e50:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e52:	681b      	ldr	r3, [r3, #0]
 8012e54:	2b00      	cmp	r3, #0
 8012e56:	d109      	bne.n	8012e6c <xQueueSemaphoreTake+0x198>
					{
						taskENTER_CRITICAL();
 8012e58:	f002 feae 	bl	8015bb8 <vPortEnterCritical>
						{
							xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
 8012e5c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e5e:	689b      	ldr	r3, [r3, #8]
 8012e60:	4618      	mov	r0, r3
 8012e62:	f001 fd41 	bl	80148e8 <xTaskPriorityInherit>
 8012e66:	6338      	str	r0, [r7, #48]	@ 0x30
						}
						taskEXIT_CRITICAL();
 8012e68:	f002 fed8 	bl	8015c1c <vPortExitCritical>
						mtCOVERAGE_TEST_MARKER();
					}
				}
				#endif

				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
 8012e6c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012e6e:	3324      	adds	r3, #36	@ 0x24
 8012e70:	683a      	ldr	r2, [r7, #0]
 8012e72:	4611      	mov	r1, r2
 8012e74:	4618      	mov	r0, r3
 8012e76:	f001 fac9 	bl	801440c <vTaskPlaceOnEventList>
				prvUnlockQueue( pxQueue );
 8012e7a:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012e7c:	f000 f9c6 	bl	801320c <prvUnlockQueue>
				if( xTaskResumeAll() == pdFALSE )
 8012e80:	f001 f8d6 	bl	8014030 <xTaskResumeAll>
 8012e84:	4603      	mov	r3, r0
 8012e86:	2b00      	cmp	r3, #0
 8012e88:	f47f af67 	bne.w	8012d5a <xQueueSemaphoreTake+0x86>
				{
					portYIELD_WITHIN_API();
 8012e8c:	4b18      	ldr	r3, [pc, #96]	@ (8012ef0 <xQueueSemaphoreTake+0x21c>)
 8012e8e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8012e92:	601a      	str	r2, [r3, #0]
 8012e94:	f3bf 8f4f 	dsb	sy
 8012e98:	f3bf 8f6f 	isb	sy
 8012e9c:	e75d      	b.n	8012d5a <xQueueSemaphoreTake+0x86>
			}
			else
			{
				/* There was no timeout and the semaphore count was not 0, so
				attempt to take the semaphore again. */
				prvUnlockQueue( pxQueue );
 8012e9e:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012ea0:	f000 f9b4 	bl	801320c <prvUnlockQueue>
				( void ) xTaskResumeAll();
 8012ea4:	f001 f8c4 	bl	8014030 <xTaskResumeAll>
 8012ea8:	e757      	b.n	8012d5a <xQueueSemaphoreTake+0x86>
			}
		}
		else
		{
			/* Timed out. */
			prvUnlockQueue( pxQueue );
 8012eaa:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012eac:	f000 f9ae 	bl	801320c <prvUnlockQueue>
			( void ) xTaskResumeAll();
 8012eb0:	f001 f8be 	bl	8014030 <xTaskResumeAll>

			/* If the semaphore count is 0 exit now as the timeout has
			expired.  Otherwise return to attempt to take the semaphore that is
			known to be available.  As semaphores are implemented by queues the
			queue being empty is equivalent to the semaphore count being 0. */
			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
 8012eb4:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012eb6:	f000 f9fb 	bl	80132b0 <prvIsQueueEmpty>
 8012eba:	4603      	mov	r3, r0
 8012ebc:	2b00      	cmp	r3, #0
 8012ebe:	f43f af4c 	beq.w	8012d5a <xQueueSemaphoreTake+0x86>
				#if ( configUSE_MUTEXES == 1 )
				{
					/* xInheritanceOccurred could only have be set if
					pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
					test the mutex type again to check it is actually a mutex. */
					if( xInheritanceOccurred != pdFALSE )
 8012ec2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012ec4:	2b00      	cmp	r3, #0
 8012ec6:	d00d      	beq.n	8012ee4 <xQueueSemaphoreTake+0x210>
					{
						taskENTER_CRITICAL();
 8012ec8:	f002 fe76 	bl	8015bb8 <vPortEnterCritical>
							/* This task blocking on the mutex caused another
							task to inherit this task's priority.  Now this task
							has timed out the priority should be disinherited
							again, but only as low as the next highest priority
							task that is waiting for the same mutex. */
							uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
 8012ecc:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8012ece:	f000 f8f5 	bl	80130bc <prvGetDisinheritPriorityAfterTimeout>
 8012ed2:	6278      	str	r0, [r7, #36]	@ 0x24
							vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
 8012ed4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012ed6:	689b      	ldr	r3, [r3, #8]
 8012ed8:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8012eda:	4618      	mov	r0, r3
 8012edc:	f001 fddc 	bl	8014a98 <vTaskPriorityDisinheritAfterTimeout>
						}
						taskEXIT_CRITICAL();
 8012ee0:	f002 fe9c 	bl	8015c1c <vPortExitCritical>
					}
				}
				#endif /* configUSE_MUTEXES */

				traceQUEUE_RECEIVE_FAILED( pxQueue );
				return errQUEUE_EMPTY;
 8012ee4:	2300      	movs	r3, #0
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	} /*lint -restore */
}
 8012ee6:	4618      	mov	r0, r3
 8012ee8:	3738      	adds	r7, #56	@ 0x38
 8012eea:	46bd      	mov	sp, r7
 8012eec:	bd80      	pop	{r7, pc}
 8012eee:	bf00      	nop
 8012ef0:	e000ed04 	.word	0xe000ed04

08012ef4 <xQueueReceiveFromISR>:
	} /*lint -restore */
}
/*-----------------------------------------------------------*/

BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
{
 8012ef4:	b580      	push	{r7, lr}
 8012ef6:	b08e      	sub	sp, #56	@ 0x38
 8012ef8:	af00      	add	r7, sp, #0
 8012efa:	60f8      	str	r0, [r7, #12]
 8012efc:	60b9      	str	r1, [r7, #8]
 8012efe:	607a      	str	r2, [r7, #4]
BaseType_t xReturn;
UBaseType_t uxSavedInterruptStatus;
Queue_t * const pxQueue = xQueue;
 8012f00:	68fb      	ldr	r3, [r7, #12]
 8012f02:	633b      	str	r3, [r7, #48]	@ 0x30

	configASSERT( pxQueue );
 8012f04:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012f06:	2b00      	cmp	r3, #0
 8012f08:	d10b      	bne.n	8012f22 <xQueueReceiveFromISR+0x2e>
	__asm volatile
 8012f0a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012f0e:	f383 8811 	msr	BASEPRI, r3
 8012f12:	f3bf 8f6f 	isb	sy
 8012f16:	f3bf 8f4f 	dsb	sy
 8012f1a:	623b      	str	r3, [r7, #32]
}
 8012f1c:	bf00      	nop
 8012f1e:	bf00      	nop
 8012f20:	e7fd      	b.n	8012f1e <xQueueReceiveFromISR+0x2a>
	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
 8012f22:	68bb      	ldr	r3, [r7, #8]
 8012f24:	2b00      	cmp	r3, #0
 8012f26:	d103      	bne.n	8012f30 <xQueueReceiveFromISR+0x3c>
 8012f28:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012f2a:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8012f2c:	2b00      	cmp	r3, #0
 8012f2e:	d101      	bne.n	8012f34 <xQueueReceiveFromISR+0x40>
 8012f30:	2301      	movs	r3, #1
 8012f32:	e000      	b.n	8012f36 <xQueueReceiveFromISR+0x42>
 8012f34:	2300      	movs	r3, #0
 8012f36:	2b00      	cmp	r3, #0
 8012f38:	d10b      	bne.n	8012f52 <xQueueReceiveFromISR+0x5e>
	__asm volatile
 8012f3a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012f3e:	f383 8811 	msr	BASEPRI, r3
 8012f42:	f3bf 8f6f 	isb	sy
 8012f46:	f3bf 8f4f 	dsb	sy
 8012f4a:	61fb      	str	r3, [r7, #28]
}
 8012f4c:	bf00      	nop
 8012f4e:	bf00      	nop
 8012f50:	e7fd      	b.n	8012f4e <xQueueReceiveFromISR+0x5a>
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8012f52:	f002 ff11 	bl	8015d78 <vPortValidateInterruptPriority>
	__asm volatile
 8012f56:	f3ef 8211 	mrs	r2, BASEPRI
 8012f5a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8012f5e:	f383 8811 	msr	BASEPRI, r3
 8012f62:	f3bf 8f6f 	isb	sy
 8012f66:	f3bf 8f4f 	dsb	sy
 8012f6a:	61ba      	str	r2, [r7, #24]
 8012f6c:	617b      	str	r3, [r7, #20]
	return ulOriginalBASEPRI;
 8012f6e:	69bb      	ldr	r3, [r7, #24]

	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8012f70:	62fb      	str	r3, [r7, #44]	@ 0x2c
	{
		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 8012f72:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012f74:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8012f76:	62bb      	str	r3, [r7, #40]	@ 0x28

		/* Cannot block in an ISR, so check there is data available. */
		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 8012f78:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012f7a:	2b00      	cmp	r3, #0
 8012f7c:	d02f      	beq.n	8012fde <xQueueReceiveFromISR+0xea>
		{
			const int8_t cRxLock = pxQueue->cRxLock;
 8012f7e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012f80:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8012f84:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );

			prvCopyDataFromQueue( pxQueue, pvBuffer );
 8012f88:	68b9      	ldr	r1, [r7, #8]
 8012f8a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8012f8c:	f000 f918 	bl	80131c0 <prvCopyDataFromQueue>
			pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
 8012f90:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8012f92:	1e5a      	subs	r2, r3, #1
 8012f94:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012f96:	639a      	str	r2, [r3, #56]	@ 0x38

			/* If the queue is locked the event list will not be modified.
			Instead update the lock count so the task that unlocks the queue
			will know that an ISR has removed data while the queue was
			locked. */
			if( cRxLock == queueUNLOCKED )
 8012f98:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8012f9c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8012fa0:	d112      	bne.n	8012fc8 <xQueueReceiveFromISR+0xd4>
			{
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 8012fa2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012fa4:	691b      	ldr	r3, [r3, #16]
 8012fa6:	2b00      	cmp	r3, #0
 8012fa8:	d016      	beq.n	8012fd8 <xQueueReceiveFromISR+0xe4>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8012faa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012fac:	3310      	adds	r3, #16
 8012fae:	4618      	mov	r0, r3
 8012fb0:	f001 fa7e 	bl	80144b0 <xTaskRemoveFromEventList>
 8012fb4:	4603      	mov	r3, r0
 8012fb6:	2b00      	cmp	r3, #0
 8012fb8:	d00e      	beq.n	8012fd8 <xQueueReceiveFromISR+0xe4>
					{
						/* The task waiting has a higher priority than us so
						force a context switch. */
						if( pxHigherPriorityTaskWoken != NULL )
 8012fba:	687b      	ldr	r3, [r7, #4]
 8012fbc:	2b00      	cmp	r3, #0
 8012fbe:	d00b      	beq.n	8012fd8 <xQueueReceiveFromISR+0xe4>
						{
							*pxHigherPriorityTaskWoken = pdTRUE;
 8012fc0:	687b      	ldr	r3, [r7, #4]
 8012fc2:	2201      	movs	r2, #1
 8012fc4:	601a      	str	r2, [r3, #0]
 8012fc6:	e007      	b.n	8012fd8 <xQueueReceiveFromISR+0xe4>
			}
			else
			{
				/* Increment the lock count so the task that unlocks the queue
				knows that data was removed while it was locked. */
				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
 8012fc8:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 8012fcc:	3301      	adds	r3, #1
 8012fce:	b2db      	uxtb	r3, r3
 8012fd0:	b25a      	sxtb	r2, r3
 8012fd2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8012fd4:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
			}

			xReturn = pdPASS;
 8012fd8:	2301      	movs	r3, #1
 8012fda:	637b      	str	r3, [r7, #52]	@ 0x34
 8012fdc:	e001      	b.n	8012fe2 <xQueueReceiveFromISR+0xee>
		}
		else
		{
			xReturn = pdFAIL;
 8012fde:	2300      	movs	r3, #0
 8012fe0:	637b      	str	r3, [r7, #52]	@ 0x34
 8012fe2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8012fe4:	613b      	str	r3, [r7, #16]
	__asm volatile
 8012fe6:	693b      	ldr	r3, [r7, #16]
 8012fe8:	f383 8811 	msr	BASEPRI, r3
}
 8012fec:	bf00      	nop
			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
		}
	}
	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 8012fee:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 8012ff0:	4618      	mov	r0, r3
 8012ff2:	3738      	adds	r7, #56	@ 0x38
 8012ff4:	46bd      	mov	sp, r7
 8012ff6:	bd80      	pop	{r7, pc}

08012ff8 <uxQueueMessagesWaiting>:
	return xReturn;
}
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
{
 8012ff8:	b580      	push	{r7, lr}
 8012ffa:	b084      	sub	sp, #16
 8012ffc:	af00      	add	r7, sp, #0
 8012ffe:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;

	configASSERT( xQueue );
 8013000:	687b      	ldr	r3, [r7, #4]
 8013002:	2b00      	cmp	r3, #0
 8013004:	d10b      	bne.n	801301e <uxQueueMessagesWaiting+0x26>
	__asm volatile
 8013006:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801300a:	f383 8811 	msr	BASEPRI, r3
 801300e:	f3bf 8f6f 	isb	sy
 8013012:	f3bf 8f4f 	dsb	sy
 8013016:	60bb      	str	r3, [r7, #8]
}
 8013018:	bf00      	nop
 801301a:	bf00      	nop
 801301c:	e7fd      	b.n	801301a <uxQueueMessagesWaiting+0x22>

	taskENTER_CRITICAL();
 801301e:	f002 fdcb 	bl	8015bb8 <vPortEnterCritical>
	{
		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
 8013022:	687b      	ldr	r3, [r7, #4]
 8013024:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8013026:	60fb      	str	r3, [r7, #12]
	}
	taskEXIT_CRITICAL();
 8013028:	f002 fdf8 	bl	8015c1c <vPortExitCritical>

	return uxReturn;
 801302c:	68fb      	ldr	r3, [r7, #12]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 801302e:	4618      	mov	r0, r3
 8013030:	3710      	adds	r7, #16
 8013032:	46bd      	mov	sp, r7
 8013034:	bd80      	pop	{r7, pc}

08013036 <uxQueueMessagesWaitingFromISR>:
	return uxReturn;
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
/*-----------------------------------------------------------*/

UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
{
 8013036:	b480      	push	{r7}
 8013038:	b087      	sub	sp, #28
 801303a:	af00      	add	r7, sp, #0
 801303c:	6078      	str	r0, [r7, #4]
UBaseType_t uxReturn;
Queue_t * const pxQueue = xQueue;
 801303e:	687b      	ldr	r3, [r7, #4]
 8013040:	617b      	str	r3, [r7, #20]

	configASSERT( pxQueue );
 8013042:	697b      	ldr	r3, [r7, #20]
 8013044:	2b00      	cmp	r3, #0
 8013046:	d10b      	bne.n	8013060 <uxQueueMessagesWaitingFromISR+0x2a>
	__asm volatile
 8013048:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801304c:	f383 8811 	msr	BASEPRI, r3
 8013050:	f3bf 8f6f 	isb	sy
 8013054:	f3bf 8f4f 	dsb	sy
 8013058:	60fb      	str	r3, [r7, #12]
}
 801305a:	bf00      	nop
 801305c:	bf00      	nop
 801305e:	e7fd      	b.n	801305c <uxQueueMessagesWaitingFromISR+0x26>
	uxReturn = pxQueue->uxMessagesWaiting;
 8013060:	697b      	ldr	r3, [r7, #20]
 8013062:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8013064:	613b      	str	r3, [r7, #16]

	return uxReturn;
 8013066:	693b      	ldr	r3, [r7, #16]
} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
 8013068:	4618      	mov	r0, r3
 801306a:	371c      	adds	r7, #28
 801306c:	46bd      	mov	sp, r7
 801306e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013072:	4770      	bx	lr

08013074 <vQueueDelete>:
/*-----------------------------------------------------------*/

void vQueueDelete( QueueHandle_t xQueue )
{
 8013074:	b580      	push	{r7, lr}
 8013076:	b084      	sub	sp, #16
 8013078:	af00      	add	r7, sp, #0
 801307a:	6078      	str	r0, [r7, #4]
Queue_t * const pxQueue = xQueue;
 801307c:	687b      	ldr	r3, [r7, #4]
 801307e:	60fb      	str	r3, [r7, #12]

	configASSERT( pxQueue );
 8013080:	68fb      	ldr	r3, [r7, #12]
 8013082:	2b00      	cmp	r3, #0
 8013084:	d10b      	bne.n	801309e <vQueueDelete+0x2a>
	__asm volatile
 8013086:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801308a:	f383 8811 	msr	BASEPRI, r3
 801308e:	f3bf 8f6f 	isb	sy
 8013092:	f3bf 8f4f 	dsb	sy
 8013096:	60bb      	str	r3, [r7, #8]
}
 8013098:	bf00      	nop
 801309a:	bf00      	nop
 801309c:	e7fd      	b.n	801309a <vQueueDelete+0x26>
	traceQUEUE_DELETE( pxQueue );

	#if ( configQUEUE_REGISTRY_SIZE > 0 )
	{
		vQueueUnregisterQueue( pxQueue );
 801309e:	68f8      	ldr	r0, [r7, #12]
 80130a0:	f000 f95e 	bl	8013360 <vQueueUnregisterQueue>
	}
	#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
	{
		/* The queue could have been allocated statically or dynamically, so
		check before attempting to free the memory. */
		if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
 80130a4:	68fb      	ldr	r3, [r7, #12]
 80130a6:	f893 3046 	ldrb.w	r3, [r3, #70]	@ 0x46
 80130aa:	2b00      	cmp	r3, #0
 80130ac:	d102      	bne.n	80130b4 <vQueueDelete+0x40>
		{
			vPortFree( pxQueue );
 80130ae:	68f8      	ldr	r0, [r7, #12]
 80130b0:	f002 ff72 	bl	8015f98 <vPortFree>
		/* The queue must have been statically allocated, so is not going to be
		deleted.  Avoid compiler warnings about the unused parameter. */
		( void ) pxQueue;
	}
	#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
}
 80130b4:	bf00      	nop
 80130b6:	3710      	adds	r7, #16
 80130b8:	46bd      	mov	sp, r7
 80130ba:	bd80      	pop	{r7, pc}

080130bc <prvGetDisinheritPriorityAfterTimeout>:
/*-----------------------------------------------------------*/

#if( configUSE_MUTEXES == 1 )

	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
	{
 80130bc:	b480      	push	{r7}
 80130be:	b085      	sub	sp, #20
 80130c0:	af00      	add	r7, sp, #0
 80130c2:	6078      	str	r0, [r7, #4]
		priority, but the waiting task times out, then the holder should
		disinherit the priority - but only down to the highest priority of any
		other tasks that are waiting for the same mutex.  For this purpose,
		return the priority of the highest priority task that is waiting for the
		mutex. */
		if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
 80130c4:	687b      	ldr	r3, [r7, #4]
 80130c6:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80130c8:	2b00      	cmp	r3, #0
 80130ca:	d006      	beq.n	80130da <prvGetDisinheritPriorityAfterTimeout+0x1e>
		{
			uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
 80130cc:	687b      	ldr	r3, [r7, #4]
 80130ce:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80130d0:	681b      	ldr	r3, [r3, #0]
 80130d2:	f1c3 0338 	rsb	r3, r3, #56	@ 0x38
 80130d6:	60fb      	str	r3, [r7, #12]
 80130d8:	e001      	b.n	80130de <prvGetDisinheritPriorityAfterTimeout+0x22>
		}
		else
		{
			uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
 80130da:	2300      	movs	r3, #0
 80130dc:	60fb      	str	r3, [r7, #12]
		}

		return uxHighestPriorityOfWaitingTasks;
 80130de:	68fb      	ldr	r3, [r7, #12]
	}
 80130e0:	4618      	mov	r0, r3
 80130e2:	3714      	adds	r7, #20
 80130e4:	46bd      	mov	sp, r7
 80130e6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80130ea:	4770      	bx	lr

080130ec <prvCopyDataToQueue>:

#endif /* configUSE_MUTEXES */
/*-----------------------------------------------------------*/

static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
{
 80130ec:	b580      	push	{r7, lr}
 80130ee:	b086      	sub	sp, #24
 80130f0:	af00      	add	r7, sp, #0
 80130f2:	60f8      	str	r0, [r7, #12]
 80130f4:	60b9      	str	r1, [r7, #8]
 80130f6:	607a      	str	r2, [r7, #4]
BaseType_t xReturn = pdFALSE;
 80130f8:	2300      	movs	r3, #0
 80130fa:	617b      	str	r3, [r7, #20]
UBaseType_t uxMessagesWaiting;

	/* This function is called from a critical section. */

	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
 80130fc:	68fb      	ldr	r3, [r7, #12]
 80130fe:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 8013100:	613b      	str	r3, [r7, #16]

	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
 8013102:	68fb      	ldr	r3, [r7, #12]
 8013104:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8013106:	2b00      	cmp	r3, #0
 8013108:	d10d      	bne.n	8013126 <prvCopyDataToQueue+0x3a>
	{
		#if ( configUSE_MUTEXES == 1 )
		{
			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
 801310a:	68fb      	ldr	r3, [r7, #12]
 801310c:	681b      	ldr	r3, [r3, #0]
 801310e:	2b00      	cmp	r3, #0
 8013110:	d14d      	bne.n	80131ae <prvCopyDataToQueue+0xc2>
			{
				/* The mutex is no longer being held. */
				xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
 8013112:	68fb      	ldr	r3, [r7, #12]
 8013114:	689b      	ldr	r3, [r3, #8]
 8013116:	4618      	mov	r0, r3
 8013118:	f001 fc4e 	bl	80149b8 <xTaskPriorityDisinherit>
 801311c:	6178      	str	r0, [r7, #20]
				pxQueue->u.xSemaphore.xMutexHolder = NULL;
 801311e:	68fb      	ldr	r3, [r7, #12]
 8013120:	2200      	movs	r2, #0
 8013122:	609a      	str	r2, [r3, #8]
 8013124:	e043      	b.n	80131ae <prvCopyDataToQueue+0xc2>
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configUSE_MUTEXES */
	}
	else if( xPosition == queueSEND_TO_BACK )
 8013126:	687b      	ldr	r3, [r7, #4]
 8013128:	2b00      	cmp	r3, #0
 801312a:	d119      	bne.n	8013160 <prvCopyDataToQueue+0x74>
	{
		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 801312c:	68fb      	ldr	r3, [r7, #12]
 801312e:	6858      	ldr	r0, [r3, #4]
 8013130:	68fb      	ldr	r3, [r7, #12]
 8013132:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8013134:	461a      	mov	r2, r3
 8013136:	68b9      	ldr	r1, [r7, #8]
 8013138:	f017 ff19 	bl	802af6e <memcpy>
		pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 801313c:	68fb      	ldr	r3, [r7, #12]
 801313e:	685a      	ldr	r2, [r3, #4]
 8013140:	68fb      	ldr	r3, [r7, #12]
 8013142:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8013144:	441a      	add	r2, r3
 8013146:	68fb      	ldr	r3, [r7, #12]
 8013148:	605a      	str	r2, [r3, #4]
		if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 801314a:	68fb      	ldr	r3, [r7, #12]
 801314c:	685a      	ldr	r2, [r3, #4]
 801314e:	68fb      	ldr	r3, [r7, #12]
 8013150:	689b      	ldr	r3, [r3, #8]
 8013152:	429a      	cmp	r2, r3
 8013154:	d32b      	bcc.n	80131ae <prvCopyDataToQueue+0xc2>
		{
			pxQueue->pcWriteTo = pxQueue->pcHead;
 8013156:	68fb      	ldr	r3, [r7, #12]
 8013158:	681a      	ldr	r2, [r3, #0]
 801315a:	68fb      	ldr	r3, [r7, #12]
 801315c:	605a      	str	r2, [r3, #4]
 801315e:	e026      	b.n	80131ae <prvCopyDataToQueue+0xc2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
 8013160:	68fb      	ldr	r3, [r7, #12]
 8013162:	68d8      	ldr	r0, [r3, #12]
 8013164:	68fb      	ldr	r3, [r7, #12]
 8013166:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8013168:	461a      	mov	r2, r3
 801316a:	68b9      	ldr	r1, [r7, #8]
 801316c:	f017 feff 	bl	802af6e <memcpy>
		pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
 8013170:	68fb      	ldr	r3, [r7, #12]
 8013172:	68da      	ldr	r2, [r3, #12]
 8013174:	68fb      	ldr	r3, [r7, #12]
 8013176:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8013178:	425b      	negs	r3, r3
 801317a:	441a      	add	r2, r3
 801317c:	68fb      	ldr	r3, [r7, #12]
 801317e:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
 8013180:	68fb      	ldr	r3, [r7, #12]
 8013182:	68da      	ldr	r2, [r3, #12]
 8013184:	68fb      	ldr	r3, [r7, #12]
 8013186:	681b      	ldr	r3, [r3, #0]
 8013188:	429a      	cmp	r2, r3
 801318a:	d207      	bcs.n	801319c <prvCopyDataToQueue+0xb0>
		{
			pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
 801318c:	68fb      	ldr	r3, [r7, #12]
 801318e:	689a      	ldr	r2, [r3, #8]
 8013190:	68fb      	ldr	r3, [r7, #12]
 8013192:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8013194:	425b      	negs	r3, r3
 8013196:	441a      	add	r2, r3
 8013198:	68fb      	ldr	r3, [r7, #12]
 801319a:	60da      	str	r2, [r3, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		if( xPosition == queueOVERWRITE )
 801319c:	687b      	ldr	r3, [r7, #4]
 801319e:	2b02      	cmp	r3, #2
 80131a0:	d105      	bne.n	80131ae <prvCopyDataToQueue+0xc2>
		{
			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
 80131a2:	693b      	ldr	r3, [r7, #16]
 80131a4:	2b00      	cmp	r3, #0
 80131a6:	d002      	beq.n	80131ae <prvCopyDataToQueue+0xc2>
			{
				/* An item is not being added but overwritten, so subtract
				one from the recorded number of items in the queue so when
				one is added again below the number of recorded items remains
				correct. */
				--uxMessagesWaiting;
 80131a8:	693b      	ldr	r3, [r7, #16]
 80131aa:	3b01      	subs	r3, #1
 80131ac:	613b      	str	r3, [r7, #16]
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
 80131ae:	693b      	ldr	r3, [r7, #16]
 80131b0:	1c5a      	adds	r2, r3, #1
 80131b2:	68fb      	ldr	r3, [r7, #12]
 80131b4:	639a      	str	r2, [r3, #56]	@ 0x38

	return xReturn;
 80131b6:	697b      	ldr	r3, [r7, #20]
}
 80131b8:	4618      	mov	r0, r3
 80131ba:	3718      	adds	r7, #24
 80131bc:	46bd      	mov	sp, r7
 80131be:	bd80      	pop	{r7, pc}

080131c0 <prvCopyDataFromQueue>:
/*-----------------------------------------------------------*/

static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
{
 80131c0:	b580      	push	{r7, lr}
 80131c2:	b082      	sub	sp, #8
 80131c4:	af00      	add	r7, sp, #0
 80131c6:	6078      	str	r0, [r7, #4]
 80131c8:	6039      	str	r1, [r7, #0]
	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
 80131ca:	687b      	ldr	r3, [r7, #4]
 80131cc:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80131ce:	2b00      	cmp	r3, #0
 80131d0:	d018      	beq.n	8013204 <prvCopyDataFromQueue+0x44>
	{
		pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
 80131d2:	687b      	ldr	r3, [r7, #4]
 80131d4:	68da      	ldr	r2, [r3, #12]
 80131d6:	687b      	ldr	r3, [r7, #4]
 80131d8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80131da:	441a      	add	r2, r3
 80131dc:	687b      	ldr	r3, [r7, #4]
 80131de:	60da      	str	r2, [r3, #12]
		if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
 80131e0:	687b      	ldr	r3, [r7, #4]
 80131e2:	68da      	ldr	r2, [r3, #12]
 80131e4:	687b      	ldr	r3, [r7, #4]
 80131e6:	689b      	ldr	r3, [r3, #8]
 80131e8:	429a      	cmp	r2, r3
 80131ea:	d303      	bcc.n	80131f4 <prvCopyDataFromQueue+0x34>
		{
			pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
 80131ec:	687b      	ldr	r3, [r7, #4]
 80131ee:	681a      	ldr	r2, [r3, #0]
 80131f0:	687b      	ldr	r3, [r7, #4]
 80131f2:	60da      	str	r2, [r3, #12]
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
 80131f4:	687b      	ldr	r3, [r7, #4]
 80131f6:	68d9      	ldr	r1, [r3, #12]
 80131f8:	687b      	ldr	r3, [r7, #4]
 80131fa:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80131fc:	461a      	mov	r2, r3
 80131fe:	6838      	ldr	r0, [r7, #0]
 8013200:	f017 feb5 	bl	802af6e <memcpy>
	}
}
 8013204:	bf00      	nop
 8013206:	3708      	adds	r7, #8
 8013208:	46bd      	mov	sp, r7
 801320a:	bd80      	pop	{r7, pc}

0801320c <prvUnlockQueue>:
/*-----------------------------------------------------------*/

static void prvUnlockQueue( Queue_t * const pxQueue )
{
 801320c:	b580      	push	{r7, lr}
 801320e:	b084      	sub	sp, #16
 8013210:	af00      	add	r7, sp, #0
 8013212:	6078      	str	r0, [r7, #4]

	/* The lock counts contains the number of extra data items placed or
	removed from the queue while the queue was locked.  When a queue is
	locked items can be added or removed, but the event lists cannot be
	updated. */
	taskENTER_CRITICAL();
 8013214:	f002 fcd0 	bl	8015bb8 <vPortEnterCritical>
	{
		int8_t cTxLock = pxQueue->cTxLock;
 8013218:	687b      	ldr	r3, [r7, #4]
 801321a:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 801321e:	73fb      	strb	r3, [r7, #15]

		/* See if data was added to the queue while it was locked. */
		while( cTxLock > queueLOCKED_UNMODIFIED )
 8013220:	e011      	b.n	8013246 <prvUnlockQueue+0x3a>
			}
			#else /* configUSE_QUEUE_SETS */
			{
				/* Tasks that are removed from the event list will get added to
				the pending ready list as the scheduler is still suspended. */
				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
 8013222:	687b      	ldr	r3, [r7, #4]
 8013224:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8013226:	2b00      	cmp	r3, #0
 8013228:	d012      	beq.n	8013250 <prvUnlockQueue+0x44>
				{
					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
 801322a:	687b      	ldr	r3, [r7, #4]
 801322c:	3324      	adds	r3, #36	@ 0x24
 801322e:	4618      	mov	r0, r3
 8013230:	f001 f93e 	bl	80144b0 <xTaskRemoveFromEventList>
 8013234:	4603      	mov	r3, r0
 8013236:	2b00      	cmp	r3, #0
 8013238:	d001      	beq.n	801323e <prvUnlockQueue+0x32>
					{
						/* The task waiting has a higher priority so record that
						a context switch is required. */
						vTaskMissedYield();
 801323a:	f001 fa3f 	bl	80146bc <vTaskMissedYield>
					break;
				}
			}
			#endif /* configUSE_QUEUE_SETS */

			--cTxLock;
 801323e:	7bfb      	ldrb	r3, [r7, #15]
 8013240:	3b01      	subs	r3, #1
 8013242:	b2db      	uxtb	r3, r3
 8013244:	73fb      	strb	r3, [r7, #15]
		while( cTxLock > queueLOCKED_UNMODIFIED )
 8013246:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801324a:	2b00      	cmp	r3, #0
 801324c:	dce9      	bgt.n	8013222 <prvUnlockQueue+0x16>
 801324e:	e000      	b.n	8013252 <prvUnlockQueue+0x46>
					break;
 8013250:	bf00      	nop
		}

		pxQueue->cTxLock = queueUNLOCKED;
 8013252:	687b      	ldr	r3, [r7, #4]
 8013254:	22ff      	movs	r2, #255	@ 0xff
 8013256:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
	}
	taskEXIT_CRITICAL();
 801325a:	f002 fcdf 	bl	8015c1c <vPortExitCritical>

	/* Do the same for the Rx lock. */
	taskENTER_CRITICAL();
 801325e:	f002 fcab 	bl	8015bb8 <vPortEnterCritical>
	{
		int8_t cRxLock = pxQueue->cRxLock;
 8013262:	687b      	ldr	r3, [r7, #4]
 8013264:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 8013268:	73bb      	strb	r3, [r7, #14]

		while( cRxLock > queueLOCKED_UNMODIFIED )
 801326a:	e011      	b.n	8013290 <prvUnlockQueue+0x84>
		{
			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
 801326c:	687b      	ldr	r3, [r7, #4]
 801326e:	691b      	ldr	r3, [r3, #16]
 8013270:	2b00      	cmp	r3, #0
 8013272:	d012      	beq.n	801329a <prvUnlockQueue+0x8e>
			{
				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
 8013274:	687b      	ldr	r3, [r7, #4]
 8013276:	3310      	adds	r3, #16
 8013278:	4618      	mov	r0, r3
 801327a:	f001 f919 	bl	80144b0 <xTaskRemoveFromEventList>
 801327e:	4603      	mov	r3, r0
 8013280:	2b00      	cmp	r3, #0
 8013282:	d001      	beq.n	8013288 <prvUnlockQueue+0x7c>
				{
					vTaskMissedYield();
 8013284:	f001 fa1a 	bl	80146bc <vTaskMissedYield>
				else
				{
					mtCOVERAGE_TEST_MARKER();
				}

				--cRxLock;
 8013288:	7bbb      	ldrb	r3, [r7, #14]
 801328a:	3b01      	subs	r3, #1
 801328c:	b2db      	uxtb	r3, r3
 801328e:	73bb      	strb	r3, [r7, #14]
		while( cRxLock > queueLOCKED_UNMODIFIED )
 8013290:	f997 300e 	ldrsb.w	r3, [r7, #14]
 8013294:	2b00      	cmp	r3, #0
 8013296:	dce9      	bgt.n	801326c <prvUnlockQueue+0x60>
 8013298:	e000      	b.n	801329c <prvUnlockQueue+0x90>
			}
			else
			{
				break;
 801329a:	bf00      	nop
			}
		}

		pxQueue->cRxLock = queueUNLOCKED;
 801329c:	687b      	ldr	r3, [r7, #4]
 801329e:	22ff      	movs	r2, #255	@ 0xff
 80132a0:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
	}
	taskEXIT_CRITICAL();
 80132a4:	f002 fcba 	bl	8015c1c <vPortExitCritical>
}
 80132a8:	bf00      	nop
 80132aa:	3710      	adds	r7, #16
 80132ac:	46bd      	mov	sp, r7
 80132ae:	bd80      	pop	{r7, pc}

080132b0 <prvIsQueueEmpty>:
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
{
 80132b0:	b580      	push	{r7, lr}
 80132b2:	b084      	sub	sp, #16
 80132b4:	af00      	add	r7, sp, #0
 80132b6:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 80132b8:	f002 fc7e 	bl	8015bb8 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
 80132bc:	687b      	ldr	r3, [r7, #4]
 80132be:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 80132c0:	2b00      	cmp	r3, #0
 80132c2:	d102      	bne.n	80132ca <prvIsQueueEmpty+0x1a>
		{
			xReturn = pdTRUE;
 80132c4:	2301      	movs	r3, #1
 80132c6:	60fb      	str	r3, [r7, #12]
 80132c8:	e001      	b.n	80132ce <prvIsQueueEmpty+0x1e>
		}
		else
		{
			xReturn = pdFALSE;
 80132ca:	2300      	movs	r3, #0
 80132cc:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 80132ce:	f002 fca5 	bl	8015c1c <vPortExitCritical>

	return xReturn;
 80132d2:	68fb      	ldr	r3, [r7, #12]
}
 80132d4:	4618      	mov	r0, r3
 80132d6:	3710      	adds	r7, #16
 80132d8:	46bd      	mov	sp, r7
 80132da:	bd80      	pop	{r7, pc}

080132dc <prvIsQueueFull>:
	return xReturn;
} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
/*-----------------------------------------------------------*/

static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
{
 80132dc:	b580      	push	{r7, lr}
 80132de:	b084      	sub	sp, #16
 80132e0:	af00      	add	r7, sp, #0
 80132e2:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;

	taskENTER_CRITICAL();
 80132e4:	f002 fc68 	bl	8015bb8 <vPortEnterCritical>
	{
		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
 80132e8:	687b      	ldr	r3, [r7, #4]
 80132ea:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 80132ec:	687b      	ldr	r3, [r7, #4]
 80132ee:	6bdb      	ldr	r3, [r3, #60]	@ 0x3c
 80132f0:	429a      	cmp	r2, r3
 80132f2:	d102      	bne.n	80132fa <prvIsQueueFull+0x1e>
		{
			xReturn = pdTRUE;
 80132f4:	2301      	movs	r3, #1
 80132f6:	60fb      	str	r3, [r7, #12]
 80132f8:	e001      	b.n	80132fe <prvIsQueueFull+0x22>
		}
		else
		{
			xReturn = pdFALSE;
 80132fa:	2300      	movs	r3, #0
 80132fc:	60fb      	str	r3, [r7, #12]
		}
	}
	taskEXIT_CRITICAL();
 80132fe:	f002 fc8d 	bl	8015c1c <vPortExitCritical>

	return xReturn;
 8013302:	68fb      	ldr	r3, [r7, #12]
}
 8013304:	4618      	mov	r0, r3
 8013306:	3710      	adds	r7, #16
 8013308:	46bd      	mov	sp, r7
 801330a:	bd80      	pop	{r7, pc}

0801330c <vQueueAddToRegistry>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
	{
 801330c:	b480      	push	{r7}
 801330e:	b085      	sub	sp, #20
 8013310:	af00      	add	r7, sp, #0
 8013312:	6078      	str	r0, [r7, #4]
 8013314:	6039      	str	r1, [r7, #0]
	UBaseType_t ux;

		/* See if there is an empty space in the registry.  A NULL name denotes
		a free slot. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8013316:	2300      	movs	r3, #0
 8013318:	60fb      	str	r3, [r7, #12]
 801331a:	e014      	b.n	8013346 <vQueueAddToRegistry+0x3a>
		{
			if( xQueueRegistry[ ux ].pcQueueName == NULL )
 801331c:	4a0f      	ldr	r2, [pc, #60]	@ (801335c <vQueueAddToRegistry+0x50>)
 801331e:	68fb      	ldr	r3, [r7, #12]
 8013320:	f852 3033 	ldr.w	r3, [r2, r3, lsl #3]
 8013324:	2b00      	cmp	r3, #0
 8013326:	d10b      	bne.n	8013340 <vQueueAddToRegistry+0x34>
			{
				/* Store the information on this queue. */
				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
 8013328:	490c      	ldr	r1, [pc, #48]	@ (801335c <vQueueAddToRegistry+0x50>)
 801332a:	68fb      	ldr	r3, [r7, #12]
 801332c:	683a      	ldr	r2, [r7, #0]
 801332e:	f841 2033 	str.w	r2, [r1, r3, lsl #3]
				xQueueRegistry[ ux ].xHandle = xQueue;
 8013332:	4a0a      	ldr	r2, [pc, #40]	@ (801335c <vQueueAddToRegistry+0x50>)
 8013334:	68fb      	ldr	r3, [r7, #12]
 8013336:	00db      	lsls	r3, r3, #3
 8013338:	4413      	add	r3, r2
 801333a:	687a      	ldr	r2, [r7, #4]
 801333c:	605a      	str	r2, [r3, #4]

				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
				break;
 801333e:	e006      	b.n	801334e <vQueueAddToRegistry+0x42>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8013340:	68fb      	ldr	r3, [r7, #12]
 8013342:	3301      	adds	r3, #1
 8013344:	60fb      	str	r3, [r7, #12]
 8013346:	68fb      	ldr	r3, [r7, #12]
 8013348:	2b07      	cmp	r3, #7
 801334a:	d9e7      	bls.n	801331c <vQueueAddToRegistry+0x10>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
	}
 801334c:	bf00      	nop
 801334e:	bf00      	nop
 8013350:	3714      	adds	r7, #20
 8013352:	46bd      	mov	sp, r7
 8013354:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013358:	4770      	bx	lr
 801335a:	bf00      	nop
 801335c:	24003d70 	.word	0x24003d70

08013360 <vQueueUnregisterQueue>:
/*-----------------------------------------------------------*/

#if ( configQUEUE_REGISTRY_SIZE > 0 )

	void vQueueUnregisterQueue( QueueHandle_t xQueue )
	{
 8013360:	b480      	push	{r7}
 8013362:	b085      	sub	sp, #20
 8013364:	af00      	add	r7, sp, #0
 8013366:	6078      	str	r0, [r7, #4]
	UBaseType_t ux;

		/* See if the handle of the queue being unregistered in actually in the
		registry. */
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8013368:	2300      	movs	r3, #0
 801336a:	60fb      	str	r3, [r7, #12]
 801336c:	e016      	b.n	801339c <vQueueUnregisterQueue+0x3c>
		{
			if( xQueueRegistry[ ux ].xHandle == xQueue )
 801336e:	4a10      	ldr	r2, [pc, #64]	@ (80133b0 <vQueueUnregisterQueue+0x50>)
 8013370:	68fb      	ldr	r3, [r7, #12]
 8013372:	00db      	lsls	r3, r3, #3
 8013374:	4413      	add	r3, r2
 8013376:	685b      	ldr	r3, [r3, #4]
 8013378:	687a      	ldr	r2, [r7, #4]
 801337a:	429a      	cmp	r2, r3
 801337c:	d10b      	bne.n	8013396 <vQueueUnregisterQueue+0x36>
			{
				/* Set the name to NULL to show that this slot if free again. */
				xQueueRegistry[ ux ].pcQueueName = NULL;
 801337e:	4a0c      	ldr	r2, [pc, #48]	@ (80133b0 <vQueueUnregisterQueue+0x50>)
 8013380:	68fb      	ldr	r3, [r7, #12]
 8013382:	2100      	movs	r1, #0
 8013384:	f842 1033 	str.w	r1, [r2, r3, lsl #3]

				/* Set the handle to NULL to ensure the same queue handle cannot
				appear in the registry twice if it is added, removed, then
				added again. */
				xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
 8013388:	4a09      	ldr	r2, [pc, #36]	@ (80133b0 <vQueueUnregisterQueue+0x50>)
 801338a:	68fb      	ldr	r3, [r7, #12]
 801338c:	00db      	lsls	r3, r3, #3
 801338e:	4413      	add	r3, r2
 8013390:	2200      	movs	r2, #0
 8013392:	605a      	str	r2, [r3, #4]
				break;
 8013394:	e006      	b.n	80133a4 <vQueueUnregisterQueue+0x44>
		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
 8013396:	68fb      	ldr	r3, [r7, #12]
 8013398:	3301      	adds	r3, #1
 801339a:	60fb      	str	r3, [r7, #12]
 801339c:	68fb      	ldr	r3, [r7, #12]
 801339e:	2b07      	cmp	r3, #7
 80133a0:	d9e5      	bls.n	801336e <vQueueUnregisterQueue+0xe>
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

	} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
 80133a2:	bf00      	nop
 80133a4:	bf00      	nop
 80133a6:	3714      	adds	r7, #20
 80133a8:	46bd      	mov	sp, r7
 80133aa:	f85d 7b04 	ldr.w	r7, [sp], #4
 80133ae:	4770      	bx	lr
 80133b0:	24003d70 	.word	0x24003d70

080133b4 <vQueueWaitForMessageRestricted>:
/*-----------------------------------------------------------*/

#if ( configUSE_TIMERS == 1 )

	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 80133b4:	b580      	push	{r7, lr}
 80133b6:	b086      	sub	sp, #24
 80133b8:	af00      	add	r7, sp, #0
 80133ba:	60f8      	str	r0, [r7, #12]
 80133bc:	60b9      	str	r1, [r7, #8]
 80133be:	607a      	str	r2, [r7, #4]
	Queue_t * const pxQueue = xQueue;
 80133c0:	68fb      	ldr	r3, [r7, #12]
 80133c2:	617b      	str	r3, [r7, #20]
		will not actually cause the task to block, just place it on a blocked
		list.  It will not block until the scheduler is unlocked - at which
		time a yield will be performed.  If an item is added to the queue while
		the queue is locked, and the calling task blocks on the queue, then the
		calling task will be immediately unblocked when the queue is unlocked. */
		prvLockQueue( pxQueue );
 80133c4:	f002 fbf8 	bl	8015bb8 <vPortEnterCritical>
 80133c8:	697b      	ldr	r3, [r7, #20]
 80133ca:	f893 3044 	ldrb.w	r3, [r3, #68]	@ 0x44
 80133ce:	b25b      	sxtb	r3, r3
 80133d0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80133d4:	d103      	bne.n	80133de <vQueueWaitForMessageRestricted+0x2a>
 80133d6:	697b      	ldr	r3, [r7, #20]
 80133d8:	2200      	movs	r2, #0
 80133da:	f883 2044 	strb.w	r2, [r3, #68]	@ 0x44
 80133de:	697b      	ldr	r3, [r7, #20]
 80133e0:	f893 3045 	ldrb.w	r3, [r3, #69]	@ 0x45
 80133e4:	b25b      	sxtb	r3, r3
 80133e6:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80133ea:	d103      	bne.n	80133f4 <vQueueWaitForMessageRestricted+0x40>
 80133ec:	697b      	ldr	r3, [r7, #20]
 80133ee:	2200      	movs	r2, #0
 80133f0:	f883 2045 	strb.w	r2, [r3, #69]	@ 0x45
 80133f4:	f002 fc12 	bl	8015c1c <vPortExitCritical>
		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
 80133f8:	697b      	ldr	r3, [r7, #20]
 80133fa:	6b9b      	ldr	r3, [r3, #56]	@ 0x38
 80133fc:	2b00      	cmp	r3, #0
 80133fe:	d106      	bne.n	801340e <vQueueWaitForMessageRestricted+0x5a>
		{
			/* There is nothing in the queue, block for the specified period. */
			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
 8013400:	697b      	ldr	r3, [r7, #20]
 8013402:	3324      	adds	r3, #36	@ 0x24
 8013404:	687a      	ldr	r2, [r7, #4]
 8013406:	68b9      	ldr	r1, [r7, #8]
 8013408:	4618      	mov	r0, r3
 801340a:	f001 f825 	bl	8014458 <vTaskPlaceOnEventListRestricted>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
		prvUnlockQueue( pxQueue );
 801340e:	6978      	ldr	r0, [r7, #20]
 8013410:	f7ff fefc 	bl	801320c <prvUnlockQueue>
	}
 8013414:	bf00      	nop
 8013416:	3718      	adds	r7, #24
 8013418:	46bd      	mov	sp, r7
 801341a:	bd80      	pop	{r7, pc}

0801341c <xStreamBufferGenericCreate>:
/*-----------------------------------------------------------*/

#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )

	StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer )
	{
 801341c:	b580      	push	{r7, lr}
 801341e:	b08c      	sub	sp, #48	@ 0x30
 8013420:	af02      	add	r7, sp, #8
 8013422:	60f8      	str	r0, [r7, #12]
 8013424:	60b9      	str	r1, [r7, #8]
 8013426:	607a      	str	r2, [r7, #4]

		/* In case the stream buffer is going to be used as a message buffer
		(that is, it will hold discrete messages with a little meta data that
		says how big the next message is) check the buffer will be large enough
		to hold at least one message. */
		if( xIsMessageBuffer == pdTRUE )
 8013428:	687b      	ldr	r3, [r7, #4]
 801342a:	2b01      	cmp	r3, #1
 801342c:	d111      	bne.n	8013452 <xStreamBufferGenericCreate+0x36>
		{
			/* Is a message buffer but not statically allocated. */
			ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
 801342e:	2301      	movs	r3, #1
 8013430:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
 8013434:	68fb      	ldr	r3, [r7, #12]
 8013436:	2b04      	cmp	r3, #4
 8013438:	d81d      	bhi.n	8013476 <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 801343a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801343e:	f383 8811 	msr	BASEPRI, r3
 8013442:	f3bf 8f6f 	isb	sy
 8013446:	f3bf 8f4f 	dsb	sy
 801344a:	61fb      	str	r3, [r7, #28]
}
 801344c:	bf00      	nop
 801344e:	bf00      	nop
 8013450:	e7fd      	b.n	801344e <xStreamBufferGenericCreate+0x32>
		}
		else
		{
			/* Not a message buffer and not statically allocated. */
			ucFlags = 0;
 8013452:	2300      	movs	r3, #0
 8013454:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
			configASSERT( xBufferSizeBytes > 0 );
 8013458:	68fb      	ldr	r3, [r7, #12]
 801345a:	2b00      	cmp	r3, #0
 801345c:	d10b      	bne.n	8013476 <xStreamBufferGenericCreate+0x5a>
	__asm volatile
 801345e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013462:	f383 8811 	msr	BASEPRI, r3
 8013466:	f3bf 8f6f 	isb	sy
 801346a:	f3bf 8f4f 	dsb	sy
 801346e:	61bb      	str	r3, [r7, #24]
}
 8013470:	bf00      	nop
 8013472:	bf00      	nop
 8013474:	e7fd      	b.n	8013472 <xStreamBufferGenericCreate+0x56>
		}
		configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
 8013476:	68ba      	ldr	r2, [r7, #8]
 8013478:	68fb      	ldr	r3, [r7, #12]
 801347a:	429a      	cmp	r2, r3
 801347c:	d90b      	bls.n	8013496 <xStreamBufferGenericCreate+0x7a>
	__asm volatile
 801347e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013482:	f383 8811 	msr	BASEPRI, r3
 8013486:	f3bf 8f6f 	isb	sy
 801348a:	f3bf 8f4f 	dsb	sy
 801348e:	617b      	str	r3, [r7, #20]
}
 8013490:	bf00      	nop
 8013492:	bf00      	nop
 8013494:	e7fd      	b.n	8013492 <xStreamBufferGenericCreate+0x76>

		/* A trigger level of 0 would cause a waiting task to unblock even when
		the buffer was empty. */
		if( xTriggerLevelBytes == ( size_t ) 0 )
 8013496:	68bb      	ldr	r3, [r7, #8]
 8013498:	2b00      	cmp	r3, #0
 801349a:	d101      	bne.n	80134a0 <xStreamBufferGenericCreate+0x84>
		{
			xTriggerLevelBytes = ( size_t ) 1;
 801349c:	2301      	movs	r3, #1
 801349e:	60bb      	str	r3, [r7, #8]
		and the buffer follows immediately after.  The requested size is
		incremented so the free space is returned as the user would expect -
		this is a quirk of the implementation that means otherwise the free
		space would be reported as one byte smaller than would be logically
		expected. */
		xBufferSizeBytes++;
 80134a0:	68fb      	ldr	r3, [r7, #12]
 80134a2:	3301      	adds	r3, #1
 80134a4:	60fb      	str	r3, [r7, #12]
		pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
 80134a6:	68fb      	ldr	r3, [r7, #12]
 80134a8:	3324      	adds	r3, #36	@ 0x24
 80134aa:	4618      	mov	r0, r3
 80134ac:	f002 fca6 	bl	8015dfc <pvPortMalloc>
 80134b0:	6238      	str	r0, [r7, #32]

		if( pucAllocatedMemory != NULL )
 80134b2:	6a3b      	ldr	r3, [r7, #32]
 80134b4:	2b00      	cmp	r3, #0
 80134b6:	d00a      	beq.n	80134ce <xStreamBufferGenericCreate+0xb2>
		{
			prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
 80134b8:	6a3b      	ldr	r3, [r7, #32]
 80134ba:	f103 0124 	add.w	r1, r3, #36	@ 0x24
 80134be:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 80134c2:	9300      	str	r3, [sp, #0]
 80134c4:	68bb      	ldr	r3, [r7, #8]
 80134c6:	68fa      	ldr	r2, [r7, #12]
 80134c8:	6a38      	ldr	r0, [r7, #32]
 80134ca:	f000 fb0b 	bl	8013ae4 <prvInitialiseNewStreamBuffer>
		else
		{
			traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
		}

		return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
 80134ce:	6a3b      	ldr	r3, [r7, #32]
	}
 80134d0:	4618      	mov	r0, r3
 80134d2:	3728      	adds	r7, #40	@ 0x28
 80134d4:	46bd      	mov	sp, r7
 80134d6:	bd80      	pop	{r7, pc}

080134d8 <xStreamBufferSpacesAvailable>:
	return xReturn;
}
/*-----------------------------------------------------------*/

size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
{
 80134d8:	b480      	push	{r7}
 80134da:	b087      	sub	sp, #28
 80134dc:	af00      	add	r7, sp, #0
 80134de:	6078      	str	r0, [r7, #4]
const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 80134e0:	687b      	ldr	r3, [r7, #4]
 80134e2:	613b      	str	r3, [r7, #16]
size_t xSpace;

	configASSERT( pxStreamBuffer );
 80134e4:	693b      	ldr	r3, [r7, #16]
 80134e6:	2b00      	cmp	r3, #0
 80134e8:	d10b      	bne.n	8013502 <xStreamBufferSpacesAvailable+0x2a>
	__asm volatile
 80134ea:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80134ee:	f383 8811 	msr	BASEPRI, r3
 80134f2:	f3bf 8f6f 	isb	sy
 80134f6:	f3bf 8f4f 	dsb	sy
 80134fa:	60fb      	str	r3, [r7, #12]
}
 80134fc:	bf00      	nop
 80134fe:	bf00      	nop
 8013500:	e7fd      	b.n	80134fe <xStreamBufferSpacesAvailable+0x26>

	xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
 8013502:	693b      	ldr	r3, [r7, #16]
 8013504:	689a      	ldr	r2, [r3, #8]
 8013506:	693b      	ldr	r3, [r7, #16]
 8013508:	681b      	ldr	r3, [r3, #0]
 801350a:	4413      	add	r3, r2
 801350c:	617b      	str	r3, [r7, #20]
	xSpace -= pxStreamBuffer->xHead;
 801350e:	693b      	ldr	r3, [r7, #16]
 8013510:	685b      	ldr	r3, [r3, #4]
 8013512:	697a      	ldr	r2, [r7, #20]
 8013514:	1ad3      	subs	r3, r2, r3
 8013516:	617b      	str	r3, [r7, #20]
	xSpace -= ( size_t ) 1;
 8013518:	697b      	ldr	r3, [r7, #20]
 801351a:	3b01      	subs	r3, #1
 801351c:	617b      	str	r3, [r7, #20]

	if( xSpace >= pxStreamBuffer->xLength )
 801351e:	693b      	ldr	r3, [r7, #16]
 8013520:	689b      	ldr	r3, [r3, #8]
 8013522:	697a      	ldr	r2, [r7, #20]
 8013524:	429a      	cmp	r2, r3
 8013526:	d304      	bcc.n	8013532 <xStreamBufferSpacesAvailable+0x5a>
	{
		xSpace -= pxStreamBuffer->xLength;
 8013528:	693b      	ldr	r3, [r7, #16]
 801352a:	689b      	ldr	r3, [r3, #8]
 801352c:	697a      	ldr	r2, [r7, #20]
 801352e:	1ad3      	subs	r3, r2, r3
 8013530:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xSpace;
 8013532:	697b      	ldr	r3, [r7, #20]
}
 8013534:	4618      	mov	r0, r3
 8013536:	371c      	adds	r7, #28
 8013538:	46bd      	mov	sp, r7
 801353a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801353e:	4770      	bx	lr

08013540 <xStreamBufferSend>:

size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
						  const void *pvTxData,
						  size_t xDataLengthBytes,
						  TickType_t xTicksToWait )
{
 8013540:	b580      	push	{r7, lr}
 8013542:	b090      	sub	sp, #64	@ 0x40
 8013544:	af02      	add	r7, sp, #8
 8013546:	60f8      	str	r0, [r7, #12]
 8013548:	60b9      	str	r1, [r7, #8]
 801354a:	607a      	str	r2, [r7, #4]
 801354c:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 801354e:	68fb      	ldr	r3, [r7, #12]
 8013550:	62fb      	str	r3, [r7, #44]	@ 0x2c
size_t xReturn, xSpace = 0;
 8013552:	2300      	movs	r3, #0
 8013554:	637b      	str	r3, [r7, #52]	@ 0x34
size_t xRequiredSpace = xDataLengthBytes;
 8013556:	687b      	ldr	r3, [r7, #4]
 8013558:	633b      	str	r3, [r7, #48]	@ 0x30
TimeOut_t xTimeOut;

	configASSERT( pvTxData );
 801355a:	68bb      	ldr	r3, [r7, #8]
 801355c:	2b00      	cmp	r3, #0
 801355e:	d10b      	bne.n	8013578 <xStreamBufferSend+0x38>
	__asm volatile
 8013560:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013564:	f383 8811 	msr	BASEPRI, r3
 8013568:	f3bf 8f6f 	isb	sy
 801356c:	f3bf 8f4f 	dsb	sy
 8013570:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8013572:	bf00      	nop
 8013574:	bf00      	nop
 8013576:	e7fd      	b.n	8013574 <xStreamBufferSend+0x34>
	configASSERT( pxStreamBuffer );
 8013578:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801357a:	2b00      	cmp	r3, #0
 801357c:	d10b      	bne.n	8013596 <xStreamBufferSend+0x56>
	__asm volatile
 801357e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013582:	f383 8811 	msr	BASEPRI, r3
 8013586:	f3bf 8f6f 	isb	sy
 801358a:	f3bf 8f4f 	dsb	sy
 801358e:	623b      	str	r3, [r7, #32]
}
 8013590:	bf00      	nop
 8013592:	bf00      	nop
 8013594:	e7fd      	b.n	8013592 <xStreamBufferSend+0x52>

	/* This send function is used to write to both message buffers and stream
	buffers.  If this is a message buffer then the space needed must be
	increased by the amount of bytes needed to store the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 8013596:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013598:	7f1b      	ldrb	r3, [r3, #28]
 801359a:	f003 0301 	and.w	r3, r3, #1
 801359e:	2b00      	cmp	r3, #0
 80135a0:	d012      	beq.n	80135c8 <xStreamBufferSend+0x88>
	{
		xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
 80135a2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80135a4:	3304      	adds	r3, #4
 80135a6:	633b      	str	r3, [r7, #48]	@ 0x30

		/* Overflow? */
		configASSERT( xRequiredSpace > xDataLengthBytes );
 80135a8:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80135aa:	687b      	ldr	r3, [r7, #4]
 80135ac:	429a      	cmp	r2, r3
 80135ae:	d80b      	bhi.n	80135c8 <xStreamBufferSend+0x88>
	__asm volatile
 80135b0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80135b4:	f383 8811 	msr	BASEPRI, r3
 80135b8:	f3bf 8f6f 	isb	sy
 80135bc:	f3bf 8f4f 	dsb	sy
 80135c0:	61fb      	str	r3, [r7, #28]
}
 80135c2:	bf00      	nop
 80135c4:	bf00      	nop
 80135c6:	e7fd      	b.n	80135c4 <xStreamBufferSend+0x84>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 80135c8:	683b      	ldr	r3, [r7, #0]
 80135ca:	2b00      	cmp	r3, #0
 80135cc:	d03f      	beq.n	801364e <xStreamBufferSend+0x10e>
	{
		vTaskSetTimeOutState( &xTimeOut );
 80135ce:	f107 0310 	add.w	r3, r7, #16
 80135d2:	4618      	mov	r0, r3
 80135d4:	f000 ffd0 	bl	8014578 <vTaskSetTimeOutState>

		do
		{
			/* Wait until the required number of bytes are free in the message
			buffer. */
			taskENTER_CRITICAL();
 80135d8:	f002 faee 	bl	8015bb8 <vPortEnterCritical>
			{
				xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 80135dc:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 80135de:	f7ff ff7b 	bl	80134d8 <xStreamBufferSpacesAvailable>
 80135e2:	6378      	str	r0, [r7, #52]	@ 0x34

				if( xSpace < xRequiredSpace )
 80135e4:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 80135e6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80135e8:	429a      	cmp	r2, r3
 80135ea:	d218      	bcs.n	801361e <xStreamBufferSend+0xde>
				{
					/* Clear notification state as going to wait for space. */
					( void ) xTaskNotifyStateClear( NULL );
 80135ec:	2000      	movs	r0, #0
 80135ee:	f001 fcf3 	bl	8014fd8 <xTaskNotifyStateClear>

					/* Should only be one writer. */
					configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
 80135f2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80135f4:	695b      	ldr	r3, [r3, #20]
 80135f6:	2b00      	cmp	r3, #0
 80135f8:	d00b      	beq.n	8013612 <xStreamBufferSend+0xd2>
	__asm volatile
 80135fa:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80135fe:	f383 8811 	msr	BASEPRI, r3
 8013602:	f3bf 8f6f 	isb	sy
 8013606:	f3bf 8f4f 	dsb	sy
 801360a:	61bb      	str	r3, [r7, #24]
}
 801360c:	bf00      	nop
 801360e:	bf00      	nop
 8013610:	e7fd      	b.n	801360e <xStreamBufferSend+0xce>
					pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
 8013612:	f001 f93b 	bl	801488c <xTaskGetCurrentTaskHandle>
 8013616:	4602      	mov	r2, r0
 8013618:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801361a:	615a      	str	r2, [r3, #20]
 801361c:	e002      	b.n	8013624 <xStreamBufferSend+0xe4>
				}
				else
				{
					taskEXIT_CRITICAL();
 801361e:	f002 fafd 	bl	8015c1c <vPortExitCritical>
					break;
 8013622:	e014      	b.n	801364e <xStreamBufferSend+0x10e>
				}
			}
			taskEXIT_CRITICAL();
 8013624:	f002 fafa 	bl	8015c1c <vPortExitCritical>

			traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 8013628:	683b      	ldr	r3, [r7, #0]
 801362a:	2200      	movs	r2, #0
 801362c:	2100      	movs	r1, #0
 801362e:	2000      	movs	r0, #0
 8013630:	f001 faca 	bl	8014bc8 <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToSend = NULL;
 8013634:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013636:	2200      	movs	r2, #0
 8013638:	615a      	str	r2, [r3, #20]

		} while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
 801363a:	463a      	mov	r2, r7
 801363c:	f107 0310 	add.w	r3, r7, #16
 8013640:	4611      	mov	r1, r2
 8013642:	4618      	mov	r0, r3
 8013644:	f000 ffd6 	bl	80145f4 <xTaskCheckForTimeOut>
 8013648:	4603      	mov	r3, r0
 801364a:	2b00      	cmp	r3, #0
 801364c:	d0c4      	beq.n	80135d8 <xStreamBufferSend+0x98>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	if( xSpace == ( size_t ) 0 )
 801364e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8013650:	2b00      	cmp	r3, #0
 8013652:	d103      	bne.n	801365c <xStreamBufferSend+0x11c>
	{
		xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
 8013654:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8013656:	f7ff ff3f 	bl	80134d8 <xStreamBufferSpacesAvailable>
 801365a:	6378      	str	r0, [r7, #52]	@ 0x34
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
 801365c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 801365e:	9300      	str	r3, [sp, #0]
 8013660:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8013662:	687a      	ldr	r2, [r7, #4]
 8013664:	68b9      	ldr	r1, [r7, #8]
 8013666:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8013668:	f000 f823 	bl	80136b2 <prvWriteMessageToBuffer>
 801366c:	62b8      	str	r0, [r7, #40]	@ 0x28

	if( xReturn > ( size_t ) 0 )
 801366e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013670:	2b00      	cmp	r3, #0
 8013672:	d019      	beq.n	80136a8 <xStreamBufferSend+0x168>
	{
		traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );

		/* Was a task waiting for the data? */
		if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
 8013674:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8013676:	f000 fa15 	bl	8013aa4 <prvBytesInBuffer>
 801367a:	4602      	mov	r2, r0
 801367c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801367e:	68db      	ldr	r3, [r3, #12]
 8013680:	429a      	cmp	r2, r3
 8013682:	d311      	bcc.n	80136a8 <xStreamBufferSend+0x168>
		{
			sbSEND_COMPLETED( pxStreamBuffer );
 8013684:	f000 fcc6 	bl	8014014 <vTaskSuspendAll>
 8013688:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801368a:	691b      	ldr	r3, [r3, #16]
 801368c:	2b00      	cmp	r3, #0
 801368e:	d009      	beq.n	80136a4 <xStreamBufferSend+0x164>
 8013690:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013692:	6918      	ldr	r0, [r3, #16]
 8013694:	2300      	movs	r3, #0
 8013696:	2200      	movs	r2, #0
 8013698:	2100      	movs	r1, #0
 801369a:	f001 faf5 	bl	8014c88 <xTaskGenericNotify>
 801369e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80136a0:	2200      	movs	r2, #0
 80136a2:	611a      	str	r2, [r3, #16]
 80136a4:	f000 fcc4 	bl	8014030 <xTaskResumeAll>
	{
		mtCOVERAGE_TEST_MARKER();
		traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
	}

	return xReturn;
 80136a8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 80136aa:	4618      	mov	r0, r3
 80136ac:	3738      	adds	r7, #56	@ 0x38
 80136ae:	46bd      	mov	sp, r7
 80136b0:	bd80      	pop	{r7, pc}

080136b2 <prvWriteMessageToBuffer>:
static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
									   const void * pvTxData,
									   size_t xDataLengthBytes,
									   size_t xSpace,
									   size_t xRequiredSpace )
{
 80136b2:	b580      	push	{r7, lr}
 80136b4:	b086      	sub	sp, #24
 80136b6:	af00      	add	r7, sp, #0
 80136b8:	60f8      	str	r0, [r7, #12]
 80136ba:	60b9      	str	r1, [r7, #8]
 80136bc:	607a      	str	r2, [r7, #4]
 80136be:	603b      	str	r3, [r7, #0]
	BaseType_t xShouldWrite;
	size_t xReturn;

	if( xSpace == ( size_t ) 0 )
 80136c0:	683b      	ldr	r3, [r7, #0]
 80136c2:	2b00      	cmp	r3, #0
 80136c4:	d102      	bne.n	80136cc <prvWriteMessageToBuffer+0x1a>
	{
		/* Doesn't matter if this is a stream buffer or a message buffer, there
		is no space to write. */
		xShouldWrite = pdFALSE;
 80136c6:	2300      	movs	r3, #0
 80136c8:	617b      	str	r3, [r7, #20]
 80136ca:	e01d      	b.n	8013708 <prvWriteMessageToBuffer+0x56>
	}
	else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
 80136cc:	68fb      	ldr	r3, [r7, #12]
 80136ce:	7f1b      	ldrb	r3, [r3, #28]
 80136d0:	f003 0301 	and.w	r3, r3, #1
 80136d4:	2b00      	cmp	r3, #0
 80136d6:	d108      	bne.n	80136ea <prvWriteMessageToBuffer+0x38>
	{
		/* This is a stream buffer, as opposed to a message buffer, so writing a
		stream of bytes rather than discrete messages.  Write as many bytes as
		possible. */
		xShouldWrite = pdTRUE;
 80136d8:	2301      	movs	r3, #1
 80136da:	617b      	str	r3, [r7, #20]
		xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
 80136dc:	687a      	ldr	r2, [r7, #4]
 80136de:	683b      	ldr	r3, [r7, #0]
 80136e0:	4293      	cmp	r3, r2
 80136e2:	bf28      	it	cs
 80136e4:	4613      	movcs	r3, r2
 80136e6:	607b      	str	r3, [r7, #4]
 80136e8:	e00e      	b.n	8013708 <prvWriteMessageToBuffer+0x56>
	}
	else if( xSpace >= xRequiredSpace )
 80136ea:	683a      	ldr	r2, [r7, #0]
 80136ec:	6a3b      	ldr	r3, [r7, #32]
 80136ee:	429a      	cmp	r2, r3
 80136f0:	d308      	bcc.n	8013704 <prvWriteMessageToBuffer+0x52>
	{
		/* This is a message buffer, as opposed to a stream buffer, and there
		is enough space to write both the message length and the message itself
		into the buffer.  Start by writing the length of the data, the data
		itself will be written later in this function. */
		xShouldWrite = pdTRUE;
 80136f2:	2301      	movs	r3, #1
 80136f4:	617b      	str	r3, [r7, #20]
		( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
 80136f6:	1d3b      	adds	r3, r7, #4
 80136f8:	2204      	movs	r2, #4
 80136fa:	4619      	mov	r1, r3
 80136fc:	68f8      	ldr	r0, [r7, #12]
 80136fe:	f000 f8df 	bl	80138c0 <prvWriteBytesToBuffer>
 8013702:	e001      	b.n	8013708 <prvWriteMessageToBuffer+0x56>
	}
	else
	{
		/* There is space available, but not enough space. */
		xShouldWrite = pdFALSE;
 8013704:	2300      	movs	r3, #0
 8013706:	617b      	str	r3, [r7, #20]
	}

	if( xShouldWrite != pdFALSE )
 8013708:	697b      	ldr	r3, [r7, #20]
 801370a:	2b00      	cmp	r3, #0
 801370c:	d007      	beq.n	801371e <prvWriteMessageToBuffer+0x6c>
	{
		/* Writes the data itself. */
		xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */
 801370e:	687b      	ldr	r3, [r7, #4]
 8013710:	461a      	mov	r2, r3
 8013712:	68b9      	ldr	r1, [r7, #8]
 8013714:	68f8      	ldr	r0, [r7, #12]
 8013716:	f000 f8d3 	bl	80138c0 <prvWriteBytesToBuffer>
 801371a:	6138      	str	r0, [r7, #16]
 801371c:	e001      	b.n	8013722 <prvWriteMessageToBuffer+0x70>
	}
	else
	{
		xReturn = 0;
 801371e:	2300      	movs	r3, #0
 8013720:	613b      	str	r3, [r7, #16]
	}

	return xReturn;
 8013722:	693b      	ldr	r3, [r7, #16]
}
 8013724:	4618      	mov	r0, r3
 8013726:	3718      	adds	r7, #24
 8013728:	46bd      	mov	sp, r7
 801372a:	bd80      	pop	{r7, pc}

0801372c <xStreamBufferReceive>:

size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
							 void *pvRxData,
							 size_t xBufferLengthBytes,
							 TickType_t xTicksToWait )
{
 801372c:	b580      	push	{r7, lr}
 801372e:	b08e      	sub	sp, #56	@ 0x38
 8013730:	af02      	add	r7, sp, #8
 8013732:	60f8      	str	r0, [r7, #12]
 8013734:	60b9      	str	r1, [r7, #8]
 8013736:	607a      	str	r2, [r7, #4]
 8013738:	603b      	str	r3, [r7, #0]
StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
 801373a:	68fb      	ldr	r3, [r7, #12]
 801373c:	623b      	str	r3, [r7, #32]
size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
 801373e:	2300      	movs	r3, #0
 8013740:	62fb      	str	r3, [r7, #44]	@ 0x2c

	configASSERT( pvRxData );
 8013742:	68bb      	ldr	r3, [r7, #8]
 8013744:	2b00      	cmp	r3, #0
 8013746:	d10b      	bne.n	8013760 <xStreamBufferReceive+0x34>
	__asm volatile
 8013748:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801374c:	f383 8811 	msr	BASEPRI, r3
 8013750:	f3bf 8f6f 	isb	sy
 8013754:	f3bf 8f4f 	dsb	sy
 8013758:	61fb      	str	r3, [r7, #28]
}
 801375a:	bf00      	nop
 801375c:	bf00      	nop
 801375e:	e7fd      	b.n	801375c <xStreamBufferReceive+0x30>
	configASSERT( pxStreamBuffer );
 8013760:	6a3b      	ldr	r3, [r7, #32]
 8013762:	2b00      	cmp	r3, #0
 8013764:	d10b      	bne.n	801377e <xStreamBufferReceive+0x52>
	__asm volatile
 8013766:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801376a:	f383 8811 	msr	BASEPRI, r3
 801376e:	f3bf 8f6f 	isb	sy
 8013772:	f3bf 8f4f 	dsb	sy
 8013776:	61bb      	str	r3, [r7, #24]
}
 8013778:	bf00      	nop
 801377a:	bf00      	nop
 801377c:	e7fd      	b.n	801377a <xStreamBufferReceive+0x4e>
	/* This receive function is used by both message buffers, which store
	discrete messages, and stream buffers, which store a continuous stream of
	bytes.  Discrete messages include an additional
	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
	message. */
	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
 801377e:	6a3b      	ldr	r3, [r7, #32]
 8013780:	7f1b      	ldrb	r3, [r3, #28]
 8013782:	f003 0301 	and.w	r3, r3, #1
 8013786:	2b00      	cmp	r3, #0
 8013788:	d002      	beq.n	8013790 <xStreamBufferReceive+0x64>
	{
		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
 801378a:	2304      	movs	r3, #4
 801378c:	627b      	str	r3, [r7, #36]	@ 0x24
 801378e:	e001      	b.n	8013794 <xStreamBufferReceive+0x68>
	}
	else
	{
		xBytesToStoreMessageLength = 0;
 8013790:	2300      	movs	r3, #0
 8013792:	627b      	str	r3, [r7, #36]	@ 0x24
	}

	if( xTicksToWait != ( TickType_t ) 0 )
 8013794:	683b      	ldr	r3, [r7, #0]
 8013796:	2b00      	cmp	r3, #0
 8013798:	d035      	beq.n	8013806 <xStreamBufferReceive+0xda>
	{
		/* Checking if there is data and clearing the notification state must be
		performed atomically. */
		taskENTER_CRITICAL();
 801379a:	f002 fa0d 	bl	8015bb8 <vPortEnterCritical>
		{
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 801379e:	6a38      	ldr	r0, [r7, #32]
 80137a0:	f000 f980 	bl	8013aa4 <prvBytesInBuffer>
 80137a4:	62b8      	str	r0, [r7, #40]	@ 0x28
			/* If this function was invoked by a message buffer read then
			xBytesToStoreMessageLength holds the number of bytes used to hold
			the length of the next discrete message.  If this function was
			invoked by a stream buffer read then xBytesToStoreMessageLength will
			be 0. */
			if( xBytesAvailable <= xBytesToStoreMessageLength )
 80137a6:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80137a8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80137aa:	429a      	cmp	r2, r3
 80137ac:	d817      	bhi.n	80137de <xStreamBufferReceive+0xb2>
			{
				/* Clear notification state as going to wait for data. */
				( void ) xTaskNotifyStateClear( NULL );
 80137ae:	2000      	movs	r0, #0
 80137b0:	f001 fc12 	bl	8014fd8 <xTaskNotifyStateClear>

				/* Should only be one reader. */
				configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
 80137b4:	6a3b      	ldr	r3, [r7, #32]
 80137b6:	691b      	ldr	r3, [r3, #16]
 80137b8:	2b00      	cmp	r3, #0
 80137ba:	d00b      	beq.n	80137d4 <xStreamBufferReceive+0xa8>
	__asm volatile
 80137bc:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80137c0:	f383 8811 	msr	BASEPRI, r3
 80137c4:	f3bf 8f6f 	isb	sy
 80137c8:	f3bf 8f4f 	dsb	sy
 80137cc:	617b      	str	r3, [r7, #20]
}
 80137ce:	bf00      	nop
 80137d0:	bf00      	nop
 80137d2:	e7fd      	b.n	80137d0 <xStreamBufferReceive+0xa4>
				pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
 80137d4:	f001 f85a 	bl	801488c <xTaskGetCurrentTaskHandle>
 80137d8:	4602      	mov	r2, r0
 80137da:	6a3b      	ldr	r3, [r7, #32]
 80137dc:	611a      	str	r2, [r3, #16]
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 80137de:	f002 fa1d 	bl	8015c1c <vPortExitCritical>

		if( xBytesAvailable <= xBytesToStoreMessageLength )
 80137e2:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80137e4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80137e6:	429a      	cmp	r2, r3
 80137e8:	d811      	bhi.n	801380e <xStreamBufferReceive+0xe2>
		{
			/* Wait for data to be available. */
			traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
 80137ea:	683b      	ldr	r3, [r7, #0]
 80137ec:	2200      	movs	r2, #0
 80137ee:	2100      	movs	r1, #0
 80137f0:	2000      	movs	r0, #0
 80137f2:	f001 f9e9 	bl	8014bc8 <xTaskNotifyWait>
			pxStreamBuffer->xTaskWaitingToReceive = NULL;
 80137f6:	6a3b      	ldr	r3, [r7, #32]
 80137f8:	2200      	movs	r2, #0
 80137fa:	611a      	str	r2, [r3, #16]

			/* Recheck the data available after blocking. */
			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 80137fc:	6a38      	ldr	r0, [r7, #32]
 80137fe:	f000 f951 	bl	8013aa4 <prvBytesInBuffer>
 8013802:	62b8      	str	r0, [r7, #40]	@ 0x28
 8013804:	e003      	b.n	801380e <xStreamBufferReceive+0xe2>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
 8013806:	6a38      	ldr	r0, [r7, #32]
 8013808:	f000 f94c 	bl	8013aa4 <prvBytesInBuffer>
 801380c:	62b8      	str	r0, [r7, #40]	@ 0x28
	/* Whether receiving a discrete message (where xBytesToStoreMessageLength
	holds the number of bytes used to store the message length) or a stream of
	bytes (where xBytesToStoreMessageLength is zero), the number of bytes
	available must be greater than xBytesToStoreMessageLength to be able to
	read bytes from the buffer. */
	if( xBytesAvailable > xBytesToStoreMessageLength )
 801380e:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8013810:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8013812:	429a      	cmp	r2, r3
 8013814:	d91d      	bls.n	8013852 <xStreamBufferReceive+0x126>
	{
		xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
 8013816:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8013818:	9300      	str	r3, [sp, #0]
 801381a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801381c:	687a      	ldr	r2, [r7, #4]
 801381e:	68b9      	ldr	r1, [r7, #8]
 8013820:	6a38      	ldr	r0, [r7, #32]
 8013822:	f000 f81b 	bl	801385c <prvReadMessageFromBuffer>
 8013826:	62f8      	str	r0, [r7, #44]	@ 0x2c

		/* Was a task waiting for space in the buffer? */
		if( xReceivedLength != ( size_t ) 0 )
 8013828:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801382a:	2b00      	cmp	r3, #0
 801382c:	d011      	beq.n	8013852 <xStreamBufferReceive+0x126>
		{
			traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
			sbRECEIVE_COMPLETED( pxStreamBuffer );
 801382e:	f000 fbf1 	bl	8014014 <vTaskSuspendAll>
 8013832:	6a3b      	ldr	r3, [r7, #32]
 8013834:	695b      	ldr	r3, [r3, #20]
 8013836:	2b00      	cmp	r3, #0
 8013838:	d009      	beq.n	801384e <xStreamBufferReceive+0x122>
 801383a:	6a3b      	ldr	r3, [r7, #32]
 801383c:	6958      	ldr	r0, [r3, #20]
 801383e:	2300      	movs	r3, #0
 8013840:	2200      	movs	r2, #0
 8013842:	2100      	movs	r1, #0
 8013844:	f001 fa20 	bl	8014c88 <xTaskGenericNotify>
 8013848:	6a3b      	ldr	r3, [r7, #32]
 801384a:	2200      	movs	r2, #0
 801384c:	615a      	str	r2, [r3, #20]
 801384e:	f000 fbef 	bl	8014030 <xTaskResumeAll>
	{
		traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
		mtCOVERAGE_TEST_MARKER();
	}

	return xReceivedLength;
 8013852:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 8013854:	4618      	mov	r0, r3
 8013856:	3730      	adds	r7, #48	@ 0x30
 8013858:	46bd      	mov	sp, r7
 801385a:	bd80      	pop	{r7, pc}

0801385c <prvReadMessageFromBuffer>:
static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
										void *pvRxData,
										size_t xBufferLengthBytes,
										size_t xBytesAvailable,
										size_t xBytesToStoreMessageLength )
{
 801385c:	b580      	push	{r7, lr}
 801385e:	b088      	sub	sp, #32
 8013860:	af00      	add	r7, sp, #0
 8013862:	60f8      	str	r0, [r7, #12]
 8013864:	60b9      	str	r1, [r7, #8]
 8013866:	607a      	str	r2, [r7, #4]
 8013868:	603b      	str	r3, [r7, #0]
size_t xOriginalTail, xReceivedLength, xNextMessageLength;
configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;

	if( xBytesToStoreMessageLength != ( size_t ) 0 )
 801386a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801386c:	2b00      	cmp	r3, #0
 801386e:	d019      	beq.n	80138a4 <prvReadMessageFromBuffer+0x48>
	{
		/* A discrete message is being received.  First receive the length
		of the message.  A copy of the tail is stored so the buffer can be
		returned to its prior state if the length of the message is too
		large for the provided buffer. */
		xOriginalTail = pxStreamBuffer->xTail;
 8013870:	68fb      	ldr	r3, [r7, #12]
 8013872:	681b      	ldr	r3, [r3, #0]
 8013874:	61bb      	str	r3, [r7, #24]
		( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable );
 8013876:	f107 0110 	add.w	r1, r7, #16
 801387a:	683b      	ldr	r3, [r7, #0]
 801387c:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801387e:	68f8      	ldr	r0, [r7, #12]
 8013880:	f000 f893 	bl	80139aa <prvReadBytesFromBuffer>
		xNextMessageLength = ( size_t ) xTempNextMessageLength;
 8013884:	693b      	ldr	r3, [r7, #16]
 8013886:	61fb      	str	r3, [r7, #28]

		/* Reduce the number of bytes available by the number of bytes just
		read out. */
		xBytesAvailable -= xBytesToStoreMessageLength;
 8013888:	683a      	ldr	r2, [r7, #0]
 801388a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801388c:	1ad3      	subs	r3, r2, r3
 801388e:	603b      	str	r3, [r7, #0]

		/* Check there is enough space in the buffer provided by the
		user. */
		if( xNextMessageLength > xBufferLengthBytes )
 8013890:	69fa      	ldr	r2, [r7, #28]
 8013892:	687b      	ldr	r3, [r7, #4]
 8013894:	429a      	cmp	r2, r3
 8013896:	d907      	bls.n	80138a8 <prvReadMessageFromBuffer+0x4c>
		{
			/* The user has provided insufficient space to read the message
			so return the buffer to its previous state (so the length of
			the message is in the buffer again). */
			pxStreamBuffer->xTail = xOriginalTail;
 8013898:	68fb      	ldr	r3, [r7, #12]
 801389a:	69ba      	ldr	r2, [r7, #24]
 801389c:	601a      	str	r2, [r3, #0]
			xNextMessageLength = 0;
 801389e:	2300      	movs	r3, #0
 80138a0:	61fb      	str	r3, [r7, #28]
 80138a2:	e001      	b.n	80138a8 <prvReadMessageFromBuffer+0x4c>
	}
	else
	{
		/* A stream of bytes is being received (as opposed to a discrete
		message), so read as many bytes as possible. */
		xNextMessageLength = xBufferLengthBytes;
 80138a4:	687b      	ldr	r3, [r7, #4]
 80138a6:	61fb      	str	r3, [r7, #28]
	}

	/* Read the actual data. */
	xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
 80138a8:	683b      	ldr	r3, [r7, #0]
 80138aa:	69fa      	ldr	r2, [r7, #28]
 80138ac:	68b9      	ldr	r1, [r7, #8]
 80138ae:	68f8      	ldr	r0, [r7, #12]
 80138b0:	f000 f87b 	bl	80139aa <prvReadBytesFromBuffer>
 80138b4:	6178      	str	r0, [r7, #20]

	return xReceivedLength;
 80138b6:	697b      	ldr	r3, [r7, #20]
}
 80138b8:	4618      	mov	r0, r3
 80138ba:	3720      	adds	r7, #32
 80138bc:	46bd      	mov	sp, r7
 80138be:	bd80      	pop	{r7, pc}

080138c0 <prvWriteBytesToBuffer>:
	return xReturn;
}
/*-----------------------------------------------------------*/

static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount )
{
 80138c0:	b580      	push	{r7, lr}
 80138c2:	b08a      	sub	sp, #40	@ 0x28
 80138c4:	af00      	add	r7, sp, #0
 80138c6:	60f8      	str	r0, [r7, #12]
 80138c8:	60b9      	str	r1, [r7, #8]
 80138ca:	607a      	str	r2, [r7, #4]
size_t xNextHead, xFirstLength;

	configASSERT( xCount > ( size_t ) 0 );
 80138cc:	687b      	ldr	r3, [r7, #4]
 80138ce:	2b00      	cmp	r3, #0
 80138d0:	d10b      	bne.n	80138ea <prvWriteBytesToBuffer+0x2a>
	__asm volatile
 80138d2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80138d6:	f383 8811 	msr	BASEPRI, r3
 80138da:	f3bf 8f6f 	isb	sy
 80138de:	f3bf 8f4f 	dsb	sy
 80138e2:	61fb      	str	r3, [r7, #28]
}
 80138e4:	bf00      	nop
 80138e6:	bf00      	nop
 80138e8:	e7fd      	b.n	80138e6 <prvWriteBytesToBuffer+0x26>

	xNextHead = pxStreamBuffer->xHead;
 80138ea:	68fb      	ldr	r3, [r7, #12]
 80138ec:	685b      	ldr	r3, [r3, #4]
 80138ee:	627b      	str	r3, [r7, #36]	@ 0x24

	/* Calculate the number of bytes that can be added in the first write -
	which may be less than the total number of bytes that need to be added if
	the buffer will wrap back to the beginning. */
	xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
 80138f0:	68fb      	ldr	r3, [r7, #12]
 80138f2:	689a      	ldr	r2, [r3, #8]
 80138f4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80138f6:	1ad3      	subs	r3, r2, r3
 80138f8:	687a      	ldr	r2, [r7, #4]
 80138fa:	4293      	cmp	r3, r2
 80138fc:	bf28      	it	cs
 80138fe:	4613      	movcs	r3, r2
 8013900:	623b      	str	r3, [r7, #32]

	/* Write as many bytes as can be written in the first write. */
	configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
 8013902:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013904:	6a3b      	ldr	r3, [r7, #32]
 8013906:	441a      	add	r2, r3
 8013908:	68fb      	ldr	r3, [r7, #12]
 801390a:	689b      	ldr	r3, [r3, #8]
 801390c:	429a      	cmp	r2, r3
 801390e:	d90b      	bls.n	8013928 <prvWriteBytesToBuffer+0x68>
	__asm volatile
 8013910:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013914:	f383 8811 	msr	BASEPRI, r3
 8013918:	f3bf 8f6f 	isb	sy
 801391c:	f3bf 8f4f 	dsb	sy
 8013920:	61bb      	str	r3, [r7, #24]
}
 8013922:	bf00      	nop
 8013924:	bf00      	nop
 8013926:	e7fd      	b.n	8013924 <prvWriteBytesToBuffer+0x64>
	( void ) memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8013928:	68fb      	ldr	r3, [r7, #12]
 801392a:	699a      	ldr	r2, [r3, #24]
 801392c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801392e:	4413      	add	r3, r2
 8013930:	6a3a      	ldr	r2, [r7, #32]
 8013932:	68b9      	ldr	r1, [r7, #8]
 8013934:	4618      	mov	r0, r3
 8013936:	f017 fb1a 	bl	802af6e <memcpy>

	/* If the number of bytes written was less than the number that could be
	written in the first write... */
	if( xCount > xFirstLength )
 801393a:	687a      	ldr	r2, [r7, #4]
 801393c:	6a3b      	ldr	r3, [r7, #32]
 801393e:	429a      	cmp	r2, r3
 8013940:	d91d      	bls.n	801397e <prvWriteBytesToBuffer+0xbe>
	{
		/* ...then write the remaining bytes to the start of the buffer. */
		configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
 8013942:	687a      	ldr	r2, [r7, #4]
 8013944:	6a3b      	ldr	r3, [r7, #32]
 8013946:	1ad2      	subs	r2, r2, r3
 8013948:	68fb      	ldr	r3, [r7, #12]
 801394a:	689b      	ldr	r3, [r3, #8]
 801394c:	429a      	cmp	r2, r3
 801394e:	d90b      	bls.n	8013968 <prvWriteBytesToBuffer+0xa8>
	__asm volatile
 8013950:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013954:	f383 8811 	msr	BASEPRI, r3
 8013958:	f3bf 8f6f 	isb	sy
 801395c:	f3bf 8f4f 	dsb	sy
 8013960:	617b      	str	r3, [r7, #20]
}
 8013962:	bf00      	nop
 8013964:	bf00      	nop
 8013966:	e7fd      	b.n	8013964 <prvWriteBytesToBuffer+0xa4>
		( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8013968:	68fb      	ldr	r3, [r7, #12]
 801396a:	6998      	ldr	r0, [r3, #24]
 801396c:	68ba      	ldr	r2, [r7, #8]
 801396e:	6a3b      	ldr	r3, [r7, #32]
 8013970:	18d1      	adds	r1, r2, r3
 8013972:	687a      	ldr	r2, [r7, #4]
 8013974:	6a3b      	ldr	r3, [r7, #32]
 8013976:	1ad3      	subs	r3, r2, r3
 8013978:	461a      	mov	r2, r3
 801397a:	f017 faf8 	bl	802af6e <memcpy>
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	xNextHead += xCount;
 801397e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013980:	687b      	ldr	r3, [r7, #4]
 8013982:	4413      	add	r3, r2
 8013984:	627b      	str	r3, [r7, #36]	@ 0x24
	if( xNextHead >= pxStreamBuffer->xLength )
 8013986:	68fb      	ldr	r3, [r7, #12]
 8013988:	689b      	ldr	r3, [r3, #8]
 801398a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801398c:	429a      	cmp	r2, r3
 801398e:	d304      	bcc.n	801399a <prvWriteBytesToBuffer+0xda>
	{
		xNextHead -= pxStreamBuffer->xLength;
 8013990:	68fb      	ldr	r3, [r7, #12]
 8013992:	689b      	ldr	r3, [r3, #8]
 8013994:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013996:	1ad3      	subs	r3, r2, r3
 8013998:	627b      	str	r3, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxStreamBuffer->xHead = xNextHead;
 801399a:	68fb      	ldr	r3, [r7, #12]
 801399c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801399e:	605a      	str	r2, [r3, #4]

	return xCount;
 80139a0:	687b      	ldr	r3, [r7, #4]
}
 80139a2:	4618      	mov	r0, r3
 80139a4:	3728      	adds	r7, #40	@ 0x28
 80139a6:	46bd      	mov	sp, r7
 80139a8:	bd80      	pop	{r7, pc}

080139aa <prvReadBytesFromBuffer>:
/*-----------------------------------------------------------*/

static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, uint8_t *pucData, size_t xMaxCount, size_t xBytesAvailable )
{
 80139aa:	b580      	push	{r7, lr}
 80139ac:	b08a      	sub	sp, #40	@ 0x28
 80139ae:	af00      	add	r7, sp, #0
 80139b0:	60f8      	str	r0, [r7, #12]
 80139b2:	60b9      	str	r1, [r7, #8]
 80139b4:	607a      	str	r2, [r7, #4]
 80139b6:	603b      	str	r3, [r7, #0]
size_t xCount, xFirstLength, xNextTail;

	/* Use the minimum of the wanted bytes and the available bytes. */
	xCount = configMIN( xBytesAvailable, xMaxCount );
 80139b8:	687a      	ldr	r2, [r7, #4]
 80139ba:	683b      	ldr	r3, [r7, #0]
 80139bc:	4293      	cmp	r3, r2
 80139be:	bf28      	it	cs
 80139c0:	4613      	movcs	r3, r2
 80139c2:	623b      	str	r3, [r7, #32]

	if( xCount > ( size_t ) 0 )
 80139c4:	6a3b      	ldr	r3, [r7, #32]
 80139c6:	2b00      	cmp	r3, #0
 80139c8:	d067      	beq.n	8013a9a <prvReadBytesFromBuffer+0xf0>
	{
		xNextTail = pxStreamBuffer->xTail;
 80139ca:	68fb      	ldr	r3, [r7, #12]
 80139cc:	681b      	ldr	r3, [r3, #0]
 80139ce:	627b      	str	r3, [r7, #36]	@ 0x24

		/* Calculate the number of bytes that can be read - which may be
		less than the number wanted if the data wraps around to the start of
		the buffer. */
		xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount );
 80139d0:	68fb      	ldr	r3, [r7, #12]
 80139d2:	689a      	ldr	r2, [r3, #8]
 80139d4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80139d6:	1ad3      	subs	r3, r2, r3
 80139d8:	6a3a      	ldr	r2, [r7, #32]
 80139da:	4293      	cmp	r3, r2
 80139dc:	bf28      	it	cs
 80139de:	4613      	movcs	r3, r2
 80139e0:	61fb      	str	r3, [r7, #28]

		/* Obtain the number of bytes it is possible to obtain in the first
		read.  Asserts check bounds of read and write. */
		configASSERT( xFirstLength <= xMaxCount );
 80139e2:	69fa      	ldr	r2, [r7, #28]
 80139e4:	687b      	ldr	r3, [r7, #4]
 80139e6:	429a      	cmp	r2, r3
 80139e8:	d90b      	bls.n	8013a02 <prvReadBytesFromBuffer+0x58>
	__asm volatile
 80139ea:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80139ee:	f383 8811 	msr	BASEPRI, r3
 80139f2:	f3bf 8f6f 	isb	sy
 80139f6:	f3bf 8f4f 	dsb	sy
 80139fa:	61bb      	str	r3, [r7, #24]
}
 80139fc:	bf00      	nop
 80139fe:	bf00      	nop
 8013a00:	e7fd      	b.n	80139fe <prvReadBytesFromBuffer+0x54>
		configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength );
 8013a02:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013a04:	69fb      	ldr	r3, [r7, #28]
 8013a06:	441a      	add	r2, r3
 8013a08:	68fb      	ldr	r3, [r7, #12]
 8013a0a:	689b      	ldr	r3, [r3, #8]
 8013a0c:	429a      	cmp	r2, r3
 8013a0e:	d90b      	bls.n	8013a28 <prvReadBytesFromBuffer+0x7e>
	__asm volatile
 8013a10:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013a14:	f383 8811 	msr	BASEPRI, r3
 8013a18:	f3bf 8f6f 	isb	sy
 8013a1c:	f3bf 8f4f 	dsb	sy
 8013a20:	617b      	str	r3, [r7, #20]
}
 8013a22:	bf00      	nop
 8013a24:	bf00      	nop
 8013a26:	e7fd      	b.n	8013a24 <prvReadBytesFromBuffer+0x7a>
		( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8013a28:	68fb      	ldr	r3, [r7, #12]
 8013a2a:	699a      	ldr	r2, [r3, #24]
 8013a2c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8013a2e:	4413      	add	r3, r2
 8013a30:	69fa      	ldr	r2, [r7, #28]
 8013a32:	4619      	mov	r1, r3
 8013a34:	68b8      	ldr	r0, [r7, #8]
 8013a36:	f017 fa9a 	bl	802af6e <memcpy>

		/* If the total number of wanted bytes is greater than the number
		that could be read in the first read... */
		if( xCount > xFirstLength )
 8013a3a:	6a3a      	ldr	r2, [r7, #32]
 8013a3c:	69fb      	ldr	r3, [r7, #28]
 8013a3e:	429a      	cmp	r2, r3
 8013a40:	d91a      	bls.n	8013a78 <prvReadBytesFromBuffer+0xce>
		{
			/*...then read the remaining bytes from the start of the buffer. */
			configASSERT( xCount <= xMaxCount );
 8013a42:	6a3a      	ldr	r2, [r7, #32]
 8013a44:	687b      	ldr	r3, [r7, #4]
 8013a46:	429a      	cmp	r2, r3
 8013a48:	d90b      	bls.n	8013a62 <prvReadBytesFromBuffer+0xb8>
	__asm volatile
 8013a4a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013a4e:	f383 8811 	msr	BASEPRI, r3
 8013a52:	f3bf 8f6f 	isb	sy
 8013a56:	f3bf 8f4f 	dsb	sy
 8013a5a:	613b      	str	r3, [r7, #16]
}
 8013a5c:	bf00      	nop
 8013a5e:	bf00      	nop
 8013a60:	e7fd      	b.n	8013a5e <prvReadBytesFromBuffer+0xb4>
			( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
 8013a62:	68ba      	ldr	r2, [r7, #8]
 8013a64:	69fb      	ldr	r3, [r7, #28]
 8013a66:	18d0      	adds	r0, r2, r3
 8013a68:	68fb      	ldr	r3, [r7, #12]
 8013a6a:	6999      	ldr	r1, [r3, #24]
 8013a6c:	6a3a      	ldr	r2, [r7, #32]
 8013a6e:	69fb      	ldr	r3, [r7, #28]
 8013a70:	1ad3      	subs	r3, r2, r3
 8013a72:	461a      	mov	r2, r3
 8013a74:	f017 fa7b 	bl	802af6e <memcpy>
			mtCOVERAGE_TEST_MARKER();
		}

		/* Move the tail pointer to effectively remove the data read from
		the buffer. */
		xNextTail += xCount;
 8013a78:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013a7a:	6a3b      	ldr	r3, [r7, #32]
 8013a7c:	4413      	add	r3, r2
 8013a7e:	627b      	str	r3, [r7, #36]	@ 0x24

		if( xNextTail >= pxStreamBuffer->xLength )
 8013a80:	68fb      	ldr	r3, [r7, #12]
 8013a82:	689b      	ldr	r3, [r3, #8]
 8013a84:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013a86:	429a      	cmp	r2, r3
 8013a88:	d304      	bcc.n	8013a94 <prvReadBytesFromBuffer+0xea>
		{
			xNextTail -= pxStreamBuffer->xLength;
 8013a8a:	68fb      	ldr	r3, [r7, #12]
 8013a8c:	689b      	ldr	r3, [r3, #8]
 8013a8e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013a90:	1ad3      	subs	r3, r2, r3
 8013a92:	627b      	str	r3, [r7, #36]	@ 0x24
		}

		pxStreamBuffer->xTail = xNextTail;
 8013a94:	68fb      	ldr	r3, [r7, #12]
 8013a96:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8013a98:	601a      	str	r2, [r3, #0]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 8013a9a:	6a3b      	ldr	r3, [r7, #32]
}
 8013a9c:	4618      	mov	r0, r3
 8013a9e:	3728      	adds	r7, #40	@ 0x28
 8013aa0:	46bd      	mov	sp, r7
 8013aa2:	bd80      	pop	{r7, pc}

08013aa4 <prvBytesInBuffer>:
/*-----------------------------------------------------------*/

static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
{
 8013aa4:	b480      	push	{r7}
 8013aa6:	b085      	sub	sp, #20
 8013aa8:	af00      	add	r7, sp, #0
 8013aaa:	6078      	str	r0, [r7, #4]
/* Returns the distance between xTail and xHead. */
size_t xCount;

	xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
 8013aac:	687b      	ldr	r3, [r7, #4]
 8013aae:	689a      	ldr	r2, [r3, #8]
 8013ab0:	687b      	ldr	r3, [r7, #4]
 8013ab2:	685b      	ldr	r3, [r3, #4]
 8013ab4:	4413      	add	r3, r2
 8013ab6:	60fb      	str	r3, [r7, #12]
	xCount -= pxStreamBuffer->xTail;
 8013ab8:	687b      	ldr	r3, [r7, #4]
 8013aba:	681b      	ldr	r3, [r3, #0]
 8013abc:	68fa      	ldr	r2, [r7, #12]
 8013abe:	1ad3      	subs	r3, r2, r3
 8013ac0:	60fb      	str	r3, [r7, #12]
	if ( xCount >= pxStreamBuffer->xLength )
 8013ac2:	687b      	ldr	r3, [r7, #4]
 8013ac4:	689b      	ldr	r3, [r3, #8]
 8013ac6:	68fa      	ldr	r2, [r7, #12]
 8013ac8:	429a      	cmp	r2, r3
 8013aca:	d304      	bcc.n	8013ad6 <prvBytesInBuffer+0x32>
	{
		xCount -= pxStreamBuffer->xLength;
 8013acc:	687b      	ldr	r3, [r7, #4]
 8013ace:	689b      	ldr	r3, [r3, #8]
 8013ad0:	68fa      	ldr	r2, [r7, #12]
 8013ad2:	1ad3      	subs	r3, r2, r3
 8013ad4:	60fb      	str	r3, [r7, #12]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xCount;
 8013ad6:	68fb      	ldr	r3, [r7, #12]
}
 8013ad8:	4618      	mov	r0, r3
 8013ada:	3714      	adds	r7, #20
 8013adc:	46bd      	mov	sp, r7
 8013ade:	f85d 7b04 	ldr.w	r7, [sp], #4
 8013ae2:	4770      	bx	lr

08013ae4 <prvInitialiseNewStreamBuffer>:
static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
										  uint8_t * const pucBuffer,
										  size_t xBufferSizeBytes,
										  size_t xTriggerLevelBytes,
										  uint8_t ucFlags )
{
 8013ae4:	b580      	push	{r7, lr}
 8013ae6:	b086      	sub	sp, #24
 8013ae8:	af00      	add	r7, sp, #0
 8013aea:	60f8      	str	r0, [r7, #12]
 8013aec:	60b9      	str	r1, [r7, #8]
 8013aee:	607a      	str	r2, [r7, #4]
 8013af0:	603b      	str	r3, [r7, #0]
	#if( configASSERT_DEFINED == 1 )
	{
		/* The value written just has to be identifiable when looking at the
		memory.  Don't use 0xA5 as that is the stack fill value and could
		result in confusion as to what is actually being observed. */
		const BaseType_t xWriteValue = 0x55;
 8013af2:	2355      	movs	r3, #85	@ 0x55
 8013af4:	617b      	str	r3, [r7, #20]
		configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
 8013af6:	687a      	ldr	r2, [r7, #4]
 8013af8:	6979      	ldr	r1, [r7, #20]
 8013afa:	68b8      	ldr	r0, [r7, #8]
 8013afc:	f017 f940 	bl	802ad80 <memset>
 8013b00:	4602      	mov	r2, r0
 8013b02:	68bb      	ldr	r3, [r7, #8]
 8013b04:	4293      	cmp	r3, r2
 8013b06:	d00b      	beq.n	8013b20 <prvInitialiseNewStreamBuffer+0x3c>
	__asm volatile
 8013b08:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013b0c:	f383 8811 	msr	BASEPRI, r3
 8013b10:	f3bf 8f6f 	isb	sy
 8013b14:	f3bf 8f4f 	dsb	sy
 8013b18:	613b      	str	r3, [r7, #16]
}
 8013b1a:	bf00      	nop
 8013b1c:	bf00      	nop
 8013b1e:	e7fd      	b.n	8013b1c <prvInitialiseNewStreamBuffer+0x38>
	} /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
	#endif

	( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
 8013b20:	2224      	movs	r2, #36	@ 0x24
 8013b22:	2100      	movs	r1, #0
 8013b24:	68f8      	ldr	r0, [r7, #12]
 8013b26:	f017 f92b 	bl	802ad80 <memset>
	pxStreamBuffer->pucBuffer = pucBuffer;
 8013b2a:	68fb      	ldr	r3, [r7, #12]
 8013b2c:	68ba      	ldr	r2, [r7, #8]
 8013b2e:	619a      	str	r2, [r3, #24]
	pxStreamBuffer->xLength = xBufferSizeBytes;
 8013b30:	68fb      	ldr	r3, [r7, #12]
 8013b32:	687a      	ldr	r2, [r7, #4]
 8013b34:	609a      	str	r2, [r3, #8]
	pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
 8013b36:	68fb      	ldr	r3, [r7, #12]
 8013b38:	683a      	ldr	r2, [r7, #0]
 8013b3a:	60da      	str	r2, [r3, #12]
	pxStreamBuffer->ucFlags = ucFlags;
 8013b3c:	68fb      	ldr	r3, [r7, #12]
 8013b3e:	f897 2020 	ldrb.w	r2, [r7, #32]
 8013b42:	771a      	strb	r2, [r3, #28]
}
 8013b44:	bf00      	nop
 8013b46:	3718      	adds	r7, #24
 8013b48:	46bd      	mov	sp, r7
 8013b4a:	bd80      	pop	{r7, pc}

08013b4c <xTaskCreateStatic>:
									const uint32_t ulStackDepth,
									void * const pvParameters,
									UBaseType_t uxPriority,
									StackType_t * const puxStackBuffer,
									StaticTask_t * const pxTaskBuffer )
	{
 8013b4c:	b580      	push	{r7, lr}
 8013b4e:	b08e      	sub	sp, #56	@ 0x38
 8013b50:	af04      	add	r7, sp, #16
 8013b52:	60f8      	str	r0, [r7, #12]
 8013b54:	60b9      	str	r1, [r7, #8]
 8013b56:	607a      	str	r2, [r7, #4]
 8013b58:	603b      	str	r3, [r7, #0]
	TCB_t *pxNewTCB;
	TaskHandle_t xReturn;

		configASSERT( puxStackBuffer != NULL );
 8013b5a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8013b5c:	2b00      	cmp	r3, #0
 8013b5e:	d10b      	bne.n	8013b78 <xTaskCreateStatic+0x2c>
	__asm volatile
 8013b60:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013b64:	f383 8811 	msr	BASEPRI, r3
 8013b68:	f3bf 8f6f 	isb	sy
 8013b6c:	f3bf 8f4f 	dsb	sy
 8013b70:	623b      	str	r3, [r7, #32]
}
 8013b72:	bf00      	nop
 8013b74:	bf00      	nop
 8013b76:	e7fd      	b.n	8013b74 <xTaskCreateStatic+0x28>
		configASSERT( pxTaskBuffer != NULL );
 8013b78:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8013b7a:	2b00      	cmp	r3, #0
 8013b7c:	d10b      	bne.n	8013b96 <xTaskCreateStatic+0x4a>
	__asm volatile
 8013b7e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013b82:	f383 8811 	msr	BASEPRI, r3
 8013b86:	f3bf 8f6f 	isb	sy
 8013b8a:	f3bf 8f4f 	dsb	sy
 8013b8e:	61fb      	str	r3, [r7, #28]
}
 8013b90:	bf00      	nop
 8013b92:	bf00      	nop
 8013b94:	e7fd      	b.n	8013b92 <xTaskCreateStatic+0x46>
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticTask_t equals the size of the real task
			structure. */
			volatile size_t xSize = sizeof( StaticTask_t );
 8013b96:	23a8      	movs	r3, #168	@ 0xa8
 8013b98:	613b      	str	r3, [r7, #16]
			configASSERT( xSize == sizeof( TCB_t ) );
 8013b9a:	693b      	ldr	r3, [r7, #16]
 8013b9c:	2ba8      	cmp	r3, #168	@ 0xa8
 8013b9e:	d00b      	beq.n	8013bb8 <xTaskCreateStatic+0x6c>
	__asm volatile
 8013ba0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013ba4:	f383 8811 	msr	BASEPRI, r3
 8013ba8:	f3bf 8f6f 	isb	sy
 8013bac:	f3bf 8f4f 	dsb	sy
 8013bb0:	61bb      	str	r3, [r7, #24]
}
 8013bb2:	bf00      	nop
 8013bb4:	bf00      	nop
 8013bb6:	e7fd      	b.n	8013bb4 <xTaskCreateStatic+0x68>
			( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
 8013bb8:	693b      	ldr	r3, [r7, #16]
		}
		#endif /* configASSERT_DEFINED */


		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
 8013bba:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8013bbc:	2b00      	cmp	r3, #0
 8013bbe:	d01e      	beq.n	8013bfe <xTaskCreateStatic+0xb2>
 8013bc0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8013bc2:	2b00      	cmp	r3, #0
 8013bc4:	d01b      	beq.n	8013bfe <xTaskCreateStatic+0xb2>
		{
			/* The memory used for the task's TCB and stack are passed into this
			function - use them. */
			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
 8013bc6:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8013bc8:	627b      	str	r3, [r7, #36]	@ 0x24
			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
 8013bca:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8013bcc:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 8013bce:	631a      	str	r2, [r3, #48]	@ 0x30

			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created statically in case the task is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
 8013bd0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8013bd2:	2202      	movs	r2, #2
 8013bd4:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
 8013bd8:	2300      	movs	r3, #0
 8013bda:	9303      	str	r3, [sp, #12]
 8013bdc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8013bde:	9302      	str	r3, [sp, #8]
 8013be0:	f107 0314 	add.w	r3, r7, #20
 8013be4:	9301      	str	r3, [sp, #4]
 8013be6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013be8:	9300      	str	r3, [sp, #0]
 8013bea:	683b      	ldr	r3, [r7, #0]
 8013bec:	687a      	ldr	r2, [r7, #4]
 8013bee:	68b9      	ldr	r1, [r7, #8]
 8013bf0:	68f8      	ldr	r0, [r7, #12]
 8013bf2:	f000 f851 	bl	8013c98 <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 8013bf6:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8013bf8:	f000 f8f6 	bl	8013de8 <prvAddNewTaskToReadyList>
 8013bfc:	e001      	b.n	8013c02 <xTaskCreateStatic+0xb6>
		}
		else
		{
			xReturn = NULL;
 8013bfe:	2300      	movs	r3, #0
 8013c00:	617b      	str	r3, [r7, #20]
		}

		return xReturn;
 8013c02:	697b      	ldr	r3, [r7, #20]
	}
 8013c04:	4618      	mov	r0, r3
 8013c06:	3728      	adds	r7, #40	@ 0x28
 8013c08:	46bd      	mov	sp, r7
 8013c0a:	bd80      	pop	{r7, pc}

08013c0c <xTaskCreate>:
							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
							const configSTACK_DEPTH_TYPE usStackDepth,
							void * const pvParameters,
							UBaseType_t uxPriority,
							TaskHandle_t * const pxCreatedTask )
	{
 8013c0c:	b580      	push	{r7, lr}
 8013c0e:	b08c      	sub	sp, #48	@ 0x30
 8013c10:	af04      	add	r7, sp, #16
 8013c12:	60f8      	str	r0, [r7, #12]
 8013c14:	60b9      	str	r1, [r7, #8]
 8013c16:	603b      	str	r3, [r7, #0]
 8013c18:	4613      	mov	r3, r2
 8013c1a:	80fb      	strh	r3, [r7, #6]
		#else /* portSTACK_GROWTH */
		{
		StackType_t *pxStack;

			/* Allocate space for the stack used by the task being created. */
			pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
 8013c1c:	88fb      	ldrh	r3, [r7, #6]
 8013c1e:	009b      	lsls	r3, r3, #2
 8013c20:	4618      	mov	r0, r3
 8013c22:	f002 f8eb 	bl	8015dfc <pvPortMalloc>
 8013c26:	6178      	str	r0, [r7, #20]

			if( pxStack != NULL )
 8013c28:	697b      	ldr	r3, [r7, #20]
 8013c2a:	2b00      	cmp	r3, #0
 8013c2c:	d00e      	beq.n	8013c4c <xTaskCreate+0x40>
			{
				/* Allocate space for the TCB. */
				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
 8013c2e:	20a8      	movs	r0, #168	@ 0xa8
 8013c30:	f002 f8e4 	bl	8015dfc <pvPortMalloc>
 8013c34:	61f8      	str	r0, [r7, #28]

				if( pxNewTCB != NULL )
 8013c36:	69fb      	ldr	r3, [r7, #28]
 8013c38:	2b00      	cmp	r3, #0
 8013c3a:	d003      	beq.n	8013c44 <xTaskCreate+0x38>
				{
					/* Store the stack location in the TCB. */
					pxNewTCB->pxStack = pxStack;
 8013c3c:	69fb      	ldr	r3, [r7, #28]
 8013c3e:	697a      	ldr	r2, [r7, #20]
 8013c40:	631a      	str	r2, [r3, #48]	@ 0x30
 8013c42:	e005      	b.n	8013c50 <xTaskCreate+0x44>
				}
				else
				{
					/* The stack cannot be used as the TCB was not created.  Free
					it again. */
					vPortFree( pxStack );
 8013c44:	6978      	ldr	r0, [r7, #20]
 8013c46:	f002 f9a7 	bl	8015f98 <vPortFree>
 8013c4a:	e001      	b.n	8013c50 <xTaskCreate+0x44>
				}
			}
			else
			{
				pxNewTCB = NULL;
 8013c4c:	2300      	movs	r3, #0
 8013c4e:	61fb      	str	r3, [r7, #28]
			}
		}
		#endif /* portSTACK_GROWTH */

		if( pxNewTCB != NULL )
 8013c50:	69fb      	ldr	r3, [r7, #28]
 8013c52:	2b00      	cmp	r3, #0
 8013c54:	d017      	beq.n	8013c86 <xTaskCreate+0x7a>
		{
			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
			{
				/* Tasks can be created statically or dynamically, so note this
				task was created dynamically in case it is later deleted. */
				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
 8013c56:	69fb      	ldr	r3, [r7, #28]
 8013c58:	2200      	movs	r2, #0
 8013c5a:	f883 20a5 	strb.w	r2, [r3, #165]	@ 0xa5
			}
			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */

			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
 8013c5e:	88fa      	ldrh	r2, [r7, #6]
 8013c60:	2300      	movs	r3, #0
 8013c62:	9303      	str	r3, [sp, #12]
 8013c64:	69fb      	ldr	r3, [r7, #28]
 8013c66:	9302      	str	r3, [sp, #8]
 8013c68:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013c6a:	9301      	str	r3, [sp, #4]
 8013c6c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013c6e:	9300      	str	r3, [sp, #0]
 8013c70:	683b      	ldr	r3, [r7, #0]
 8013c72:	68b9      	ldr	r1, [r7, #8]
 8013c74:	68f8      	ldr	r0, [r7, #12]
 8013c76:	f000 f80f 	bl	8013c98 <prvInitialiseNewTask>
			prvAddNewTaskToReadyList( pxNewTCB );
 8013c7a:	69f8      	ldr	r0, [r7, #28]
 8013c7c:	f000 f8b4 	bl	8013de8 <prvAddNewTaskToReadyList>
			xReturn = pdPASS;
 8013c80:	2301      	movs	r3, #1
 8013c82:	61bb      	str	r3, [r7, #24]
 8013c84:	e002      	b.n	8013c8c <xTaskCreate+0x80>
		}
		else
		{
			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
 8013c86:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8013c8a:	61bb      	str	r3, [r7, #24]
		}

		return xReturn;
 8013c8c:	69bb      	ldr	r3, [r7, #24]
	}
 8013c8e:	4618      	mov	r0, r3
 8013c90:	3720      	adds	r7, #32
 8013c92:	46bd      	mov	sp, r7
 8013c94:	bd80      	pop	{r7, pc}
	...

08013c98 <prvInitialiseNewTask>:
									void * const pvParameters,
									UBaseType_t uxPriority,
									TaskHandle_t * const pxCreatedTask,
									TCB_t *pxNewTCB,
									const MemoryRegion_t * const xRegions )
{
 8013c98:	b580      	push	{r7, lr}
 8013c9a:	b088      	sub	sp, #32
 8013c9c:	af00      	add	r7, sp, #0
 8013c9e:	60f8      	str	r0, [r7, #12]
 8013ca0:	60b9      	str	r1, [r7, #8]
 8013ca2:	607a      	str	r2, [r7, #4]
 8013ca4:	603b      	str	r3, [r7, #0]

	/* Avoid dependency on memset() if it is not required. */
	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
	{
		/* Fill the stack with a known value to assist debugging. */
		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
 8013ca6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013ca8:	6b18      	ldr	r0, [r3, #48]	@ 0x30
 8013caa:	687b      	ldr	r3, [r7, #4]
 8013cac:	009b      	lsls	r3, r3, #2
 8013cae:	461a      	mov	r2, r3
 8013cb0:	21a5      	movs	r1, #165	@ 0xa5
 8013cb2:	f017 f865 	bl	802ad80 <memset>
	grows from high memory to low (as per the 80x86) or vice versa.
	portSTACK_GROWTH is used to make the result positive or negative as required
	by the port. */
	#if( portSTACK_GROWTH < 0 )
	{
		pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
 8013cb6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013cb8:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 8013cba:	6879      	ldr	r1, [r7, #4]
 8013cbc:	f06f 4340 	mvn.w	r3, #3221225472	@ 0xc0000000
 8013cc0:	440b      	add	r3, r1
 8013cc2:	009b      	lsls	r3, r3, #2
 8013cc4:	4413      	add	r3, r2
 8013cc6:	61bb      	str	r3, [r7, #24]
		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
 8013cc8:	69bb      	ldr	r3, [r7, #24]
 8013cca:	f023 0307 	bic.w	r3, r3, #7
 8013cce:	61bb      	str	r3, [r7, #24]

		/* Check the alignment of the calculated top of stack is correct. */
		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
 8013cd0:	69bb      	ldr	r3, [r7, #24]
 8013cd2:	f003 0307 	and.w	r3, r3, #7
 8013cd6:	2b00      	cmp	r3, #0
 8013cd8:	d00b      	beq.n	8013cf2 <prvInitialiseNewTask+0x5a>
	__asm volatile
 8013cda:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013cde:	f383 8811 	msr	BASEPRI, r3
 8013ce2:	f3bf 8f6f 	isb	sy
 8013ce6:	f3bf 8f4f 	dsb	sy
 8013cea:	617b      	str	r3, [r7, #20]
}
 8013cec:	bf00      	nop
 8013cee:	bf00      	nop
 8013cf0:	e7fd      	b.n	8013cee <prvInitialiseNewTask+0x56>
		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
	}
	#endif /* portSTACK_GROWTH */

	/* Store the task name in the TCB. */
	if( pcName != NULL )
 8013cf2:	68bb      	ldr	r3, [r7, #8]
 8013cf4:	2b00      	cmp	r3, #0
 8013cf6:	d01f      	beq.n	8013d38 <prvInitialiseNewTask+0xa0>
	{
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 8013cf8:	2300      	movs	r3, #0
 8013cfa:	61fb      	str	r3, [r7, #28]
 8013cfc:	e012      	b.n	8013d24 <prvInitialiseNewTask+0x8c>
		{
			pxNewTCB->pcTaskName[ x ] = pcName[ x ];
 8013cfe:	68ba      	ldr	r2, [r7, #8]
 8013d00:	69fb      	ldr	r3, [r7, #28]
 8013d02:	4413      	add	r3, r2
 8013d04:	7819      	ldrb	r1, [r3, #0]
 8013d06:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013d08:	69fb      	ldr	r3, [r7, #28]
 8013d0a:	4413      	add	r3, r2
 8013d0c:	3334      	adds	r3, #52	@ 0x34
 8013d0e:	460a      	mov	r2, r1
 8013d10:	701a      	strb	r2, [r3, #0]

			/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
			configMAX_TASK_NAME_LEN characters just in case the memory after the
			string is not accessible (extremely unlikely). */
			if( pcName[ x ] == ( char ) 0x00 )
 8013d12:	68ba      	ldr	r2, [r7, #8]
 8013d14:	69fb      	ldr	r3, [r7, #28]
 8013d16:	4413      	add	r3, r2
 8013d18:	781b      	ldrb	r3, [r3, #0]
 8013d1a:	2b00      	cmp	r3, #0
 8013d1c:	d006      	beq.n	8013d2c <prvInitialiseNewTask+0x94>
		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
 8013d1e:	69fb      	ldr	r3, [r7, #28]
 8013d20:	3301      	adds	r3, #1
 8013d22:	61fb      	str	r3, [r7, #28]
 8013d24:	69fb      	ldr	r3, [r7, #28]
 8013d26:	2b0f      	cmp	r3, #15
 8013d28:	d9e9      	bls.n	8013cfe <prvInitialiseNewTask+0x66>
 8013d2a:	e000      	b.n	8013d2e <prvInitialiseNewTask+0x96>
			{
				break;
 8013d2c:	bf00      	nop
			}
		}

		/* Ensure the name string is terminated in the case that the string length
		was greater or equal to configMAX_TASK_NAME_LEN. */
		pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
 8013d2e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d30:	2200      	movs	r2, #0
 8013d32:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 8013d36:	e003      	b.n	8013d40 <prvInitialiseNewTask+0xa8>
	}
	else
	{
		/* The task has not been given a name, so just ensure there is a NULL
		terminator when it is read out. */
		pxNewTCB->pcTaskName[ 0 ] = 0x00;
 8013d38:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d3a:	2200      	movs	r2, #0
 8013d3c:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
	}

	/* This is used as an array index so must ensure it's not too large.  First
	remove the privilege bit if one is present. */
	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
 8013d40:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013d42:	2b37      	cmp	r3, #55	@ 0x37
 8013d44:	d901      	bls.n	8013d4a <prvInitialiseNewTask+0xb2>
	{
		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
 8013d46:	2337      	movs	r3, #55	@ 0x37
 8013d48:	62bb      	str	r3, [r7, #40]	@ 0x28
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	pxNewTCB->uxPriority = uxPriority;
 8013d4a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d4c:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8013d4e:	62da      	str	r2, [r3, #44]	@ 0x2c
	#if ( configUSE_MUTEXES == 1 )
	{
		pxNewTCB->uxBasePriority = uxPriority;
 8013d50:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d52:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8013d54:	64da      	str	r2, [r3, #76]	@ 0x4c
		pxNewTCB->uxMutexesHeld = 0;
 8013d56:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d58:	2200      	movs	r2, #0
 8013d5a:	651a      	str	r2, [r3, #80]	@ 0x50
	}
	#endif /* configUSE_MUTEXES */

	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
 8013d5c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d5e:	3304      	adds	r3, #4
 8013d60:	4618      	mov	r0, r3
 8013d62:	f7fe f9a5 	bl	80120b0 <vListInitialiseItem>
	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
 8013d66:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d68:	3318      	adds	r3, #24
 8013d6a:	4618      	mov	r0, r3
 8013d6c:	f7fe f9a0 	bl	80120b0 <vListInitialiseItem>

	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
	back to	the containing TCB from a generic item in a list. */
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
 8013d70:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d72:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013d74:	611a      	str	r2, [r3, #16]

	/* Event lists are always in priority order. */
	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8013d76:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8013d78:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8013d7c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d7e:	619a      	str	r2, [r3, #24]
	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
 8013d80:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d82:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013d84:	625a      	str	r2, [r3, #36]	@ 0x24
	}
	#endif

	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
	{
		pxNewTCB->ulNotifiedValue = 0;
 8013d86:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d88:	2200      	movs	r2, #0
 8013d8a:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8013d8e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d90:	2200      	movs	r2, #0
 8013d92:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
	#if ( configUSE_NEWLIB_REENTRANT == 1 )
	{
		/* Initialise this task's Newlib reent structure.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
 8013d96:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013d98:	3354      	adds	r3, #84	@ 0x54
 8013d9a:	224c      	movs	r2, #76	@ 0x4c
 8013d9c:	2100      	movs	r1, #0
 8013d9e:	4618      	mov	r0, r3
 8013da0:	f016 ffee 	bl	802ad80 <memset>
 8013da4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013da6:	4a0d      	ldr	r2, [pc, #52]	@ (8013ddc <prvInitialiseNewTask+0x144>)
 8013da8:	659a      	str	r2, [r3, #88]	@ 0x58
 8013daa:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013dac:	4a0c      	ldr	r2, [pc, #48]	@ (8013de0 <prvInitialiseNewTask+0x148>)
 8013dae:	65da      	str	r2, [r3, #92]	@ 0x5c
 8013db0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013db2:	4a0c      	ldr	r2, [pc, #48]	@ (8013de4 <prvInitialiseNewTask+0x14c>)
 8013db4:	661a      	str	r2, [r3, #96]	@ 0x60
			}
			#endif /* portSTACK_GROWTH */
		}
		#else /* portHAS_STACK_OVERFLOW_CHECKING */
		{
			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
 8013db6:	683a      	ldr	r2, [r7, #0]
 8013db8:	68f9      	ldr	r1, [r7, #12]
 8013dba:	69b8      	ldr	r0, [r7, #24]
 8013dbc:	f001 fdca 	bl	8015954 <pxPortInitialiseStack>
 8013dc0:	4602      	mov	r2, r0
 8013dc2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8013dc4:	601a      	str	r2, [r3, #0]
		}
		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
	}
	#endif /* portUSING_MPU_WRAPPERS */

	if( pxCreatedTask != NULL )
 8013dc6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013dc8:	2b00      	cmp	r3, #0
 8013dca:	d002      	beq.n	8013dd2 <prvInitialiseNewTask+0x13a>
	{
		/* Pass the handle out in an anonymous way.  The handle can be used to
		change the created task's priority, delete the created task, etc.*/
		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
 8013dcc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8013dce:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8013dd0:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8013dd2:	bf00      	nop
 8013dd4:	3720      	adds	r7, #32
 8013dd6:	46bd      	mov	sp, r7
 8013dd8:	bd80      	pop	{r7, pc}
 8013dda:	bf00      	nop
 8013ddc:	2402b164 	.word	0x2402b164
 8013de0:	2402b1cc 	.word	0x2402b1cc
 8013de4:	2402b234 	.word	0x2402b234

08013de8 <prvAddNewTaskToReadyList>:
/*-----------------------------------------------------------*/

static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
{
 8013de8:	b580      	push	{r7, lr}
 8013dea:	b082      	sub	sp, #8
 8013dec:	af00      	add	r7, sp, #0
 8013dee:	6078      	str	r0, [r7, #4]
	/* Ensure interrupts don't access the task lists while the lists are being
	updated. */
	taskENTER_CRITICAL();
 8013df0:	f001 fee2 	bl	8015bb8 <vPortEnterCritical>
	{
		uxCurrentNumberOfTasks++;
 8013df4:	4b2d      	ldr	r3, [pc, #180]	@ (8013eac <prvAddNewTaskToReadyList+0xc4>)
 8013df6:	681b      	ldr	r3, [r3, #0]
 8013df8:	3301      	adds	r3, #1
 8013dfa:	4a2c      	ldr	r2, [pc, #176]	@ (8013eac <prvAddNewTaskToReadyList+0xc4>)
 8013dfc:	6013      	str	r3, [r2, #0]
		if( pxCurrentTCB == NULL )
 8013dfe:	4b2c      	ldr	r3, [pc, #176]	@ (8013eb0 <prvAddNewTaskToReadyList+0xc8>)
 8013e00:	681b      	ldr	r3, [r3, #0]
 8013e02:	2b00      	cmp	r3, #0
 8013e04:	d109      	bne.n	8013e1a <prvAddNewTaskToReadyList+0x32>
		{
			/* There are no other tasks, or all the other tasks are in
			the suspended state - make this the current task. */
			pxCurrentTCB = pxNewTCB;
 8013e06:	4a2a      	ldr	r2, [pc, #168]	@ (8013eb0 <prvAddNewTaskToReadyList+0xc8>)
 8013e08:	687b      	ldr	r3, [r7, #4]
 8013e0a:	6013      	str	r3, [r2, #0]

			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
 8013e0c:	4b27      	ldr	r3, [pc, #156]	@ (8013eac <prvAddNewTaskToReadyList+0xc4>)
 8013e0e:	681b      	ldr	r3, [r3, #0]
 8013e10:	2b01      	cmp	r3, #1
 8013e12:	d110      	bne.n	8013e36 <prvAddNewTaskToReadyList+0x4e>
			{
				/* This is the first task to be created so do the preliminary
				initialisation required.  We will not recover if this call
				fails, but we will report the failure. */
				prvInitialiseTaskLists();
 8013e14:	f000 fc76 	bl	8014704 <prvInitialiseTaskLists>
 8013e18:	e00d      	b.n	8013e36 <prvAddNewTaskToReadyList+0x4e>
		else
		{
			/* If the scheduler is not already running, make this task the
			current task if it is the highest priority task to be created
			so far. */
			if( xSchedulerRunning == pdFALSE )
 8013e1a:	4b26      	ldr	r3, [pc, #152]	@ (8013eb4 <prvAddNewTaskToReadyList+0xcc>)
 8013e1c:	681b      	ldr	r3, [r3, #0]
 8013e1e:	2b00      	cmp	r3, #0
 8013e20:	d109      	bne.n	8013e36 <prvAddNewTaskToReadyList+0x4e>
			{
				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
 8013e22:	4b23      	ldr	r3, [pc, #140]	@ (8013eb0 <prvAddNewTaskToReadyList+0xc8>)
 8013e24:	681b      	ldr	r3, [r3, #0]
 8013e26:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013e28:	687b      	ldr	r3, [r7, #4]
 8013e2a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013e2c:	429a      	cmp	r2, r3
 8013e2e:	d802      	bhi.n	8013e36 <prvAddNewTaskToReadyList+0x4e>
				{
					pxCurrentTCB = pxNewTCB;
 8013e30:	4a1f      	ldr	r2, [pc, #124]	@ (8013eb0 <prvAddNewTaskToReadyList+0xc8>)
 8013e32:	687b      	ldr	r3, [r7, #4]
 8013e34:	6013      	str	r3, [r2, #0]
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}

		uxTaskNumber++;
 8013e36:	4b20      	ldr	r3, [pc, #128]	@ (8013eb8 <prvAddNewTaskToReadyList+0xd0>)
 8013e38:	681b      	ldr	r3, [r3, #0]
 8013e3a:	3301      	adds	r3, #1
 8013e3c:	4a1e      	ldr	r2, [pc, #120]	@ (8013eb8 <prvAddNewTaskToReadyList+0xd0>)
 8013e3e:	6013      	str	r3, [r2, #0]

		#if ( configUSE_TRACE_FACILITY == 1 )
		{
			/* Add a counter into the TCB for tracing only. */
			pxNewTCB->uxTCBNumber = uxTaskNumber;
 8013e40:	4b1d      	ldr	r3, [pc, #116]	@ (8013eb8 <prvAddNewTaskToReadyList+0xd0>)
 8013e42:	681a      	ldr	r2, [r3, #0]
 8013e44:	687b      	ldr	r3, [r7, #4]
 8013e46:	645a      	str	r2, [r3, #68]	@ 0x44
		}
		#endif /* configUSE_TRACE_FACILITY */
		traceTASK_CREATE( pxNewTCB );

		prvAddTaskToReadyList( pxNewTCB );
 8013e48:	687b      	ldr	r3, [r7, #4]
 8013e4a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013e4c:	4b1b      	ldr	r3, [pc, #108]	@ (8013ebc <prvAddNewTaskToReadyList+0xd4>)
 8013e4e:	681b      	ldr	r3, [r3, #0]
 8013e50:	429a      	cmp	r2, r3
 8013e52:	d903      	bls.n	8013e5c <prvAddNewTaskToReadyList+0x74>
 8013e54:	687b      	ldr	r3, [r7, #4]
 8013e56:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013e58:	4a18      	ldr	r2, [pc, #96]	@ (8013ebc <prvAddNewTaskToReadyList+0xd4>)
 8013e5a:	6013      	str	r3, [r2, #0]
 8013e5c:	687b      	ldr	r3, [r7, #4]
 8013e5e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013e60:	4613      	mov	r3, r2
 8013e62:	009b      	lsls	r3, r3, #2
 8013e64:	4413      	add	r3, r2
 8013e66:	009b      	lsls	r3, r3, #2
 8013e68:	4a15      	ldr	r2, [pc, #84]	@ (8013ec0 <prvAddNewTaskToReadyList+0xd8>)
 8013e6a:	441a      	add	r2, r3
 8013e6c:	687b      	ldr	r3, [r7, #4]
 8013e6e:	3304      	adds	r3, #4
 8013e70:	4619      	mov	r1, r3
 8013e72:	4610      	mov	r0, r2
 8013e74:	f7fe f929 	bl	80120ca <vListInsertEnd>

		portSETUP_TCB( pxNewTCB );
	}
	taskEXIT_CRITICAL();
 8013e78:	f001 fed0 	bl	8015c1c <vPortExitCritical>

	if( xSchedulerRunning != pdFALSE )
 8013e7c:	4b0d      	ldr	r3, [pc, #52]	@ (8013eb4 <prvAddNewTaskToReadyList+0xcc>)
 8013e7e:	681b      	ldr	r3, [r3, #0]
 8013e80:	2b00      	cmp	r3, #0
 8013e82:	d00e      	beq.n	8013ea2 <prvAddNewTaskToReadyList+0xba>
	{
		/* If the created task is of a higher priority than the current task
		then it should run now. */
		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
 8013e84:	4b0a      	ldr	r3, [pc, #40]	@ (8013eb0 <prvAddNewTaskToReadyList+0xc8>)
 8013e86:	681b      	ldr	r3, [r3, #0]
 8013e88:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8013e8a:	687b      	ldr	r3, [r7, #4]
 8013e8c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8013e8e:	429a      	cmp	r2, r3
 8013e90:	d207      	bcs.n	8013ea2 <prvAddNewTaskToReadyList+0xba>
		{
			taskYIELD_IF_USING_PREEMPTION();
 8013e92:	4b0c      	ldr	r3, [pc, #48]	@ (8013ec4 <prvAddNewTaskToReadyList+0xdc>)
 8013e94:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013e98:	601a      	str	r2, [r3, #0]
 8013e9a:	f3bf 8f4f 	dsb	sy
 8013e9e:	f3bf 8f6f 	isb	sy
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 8013ea2:	bf00      	nop
 8013ea4:	3708      	adds	r7, #8
 8013ea6:	46bd      	mov	sp, r7
 8013ea8:	bd80      	pop	{r7, pc}
 8013eaa:	bf00      	nop
 8013eac:	24004284 	.word	0x24004284
 8013eb0:	24003db0 	.word	0x24003db0
 8013eb4:	24004290 	.word	0x24004290
 8013eb8:	240042a0 	.word	0x240042a0
 8013ebc:	2400428c 	.word	0x2400428c
 8013ec0:	24003db4 	.word	0x24003db4
 8013ec4:	e000ed04 	.word	0xe000ed04

08013ec8 <vTaskDelay>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelay == 1 )

	void vTaskDelay( const TickType_t xTicksToDelay )
	{
 8013ec8:	b580      	push	{r7, lr}
 8013eca:	b084      	sub	sp, #16
 8013ecc:	af00      	add	r7, sp, #0
 8013ece:	6078      	str	r0, [r7, #4]
	BaseType_t xAlreadyYielded = pdFALSE;
 8013ed0:	2300      	movs	r3, #0
 8013ed2:	60fb      	str	r3, [r7, #12]

		/* A delay time of zero just forces a reschedule. */
		if( xTicksToDelay > ( TickType_t ) 0U )
 8013ed4:	687b      	ldr	r3, [r7, #4]
 8013ed6:	2b00      	cmp	r3, #0
 8013ed8:	d018      	beq.n	8013f0c <vTaskDelay+0x44>
		{
			configASSERT( uxSchedulerSuspended == 0 );
 8013eda:	4b14      	ldr	r3, [pc, #80]	@ (8013f2c <vTaskDelay+0x64>)
 8013edc:	681b      	ldr	r3, [r3, #0]
 8013ede:	2b00      	cmp	r3, #0
 8013ee0:	d00b      	beq.n	8013efa <vTaskDelay+0x32>
	__asm volatile
 8013ee2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013ee6:	f383 8811 	msr	BASEPRI, r3
 8013eea:	f3bf 8f6f 	isb	sy
 8013eee:	f3bf 8f4f 	dsb	sy
 8013ef2:	60bb      	str	r3, [r7, #8]
}
 8013ef4:	bf00      	nop
 8013ef6:	bf00      	nop
 8013ef8:	e7fd      	b.n	8013ef6 <vTaskDelay+0x2e>
			vTaskSuspendAll();
 8013efa:	f000 f88b 	bl	8014014 <vTaskSuspendAll>
				list or removed from the blocked list until the scheduler
				is resumed.

				This task cannot be in an event list as it is the currently
				executing task. */
				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
 8013efe:	2100      	movs	r1, #0
 8013f00:	6878      	ldr	r0, [r7, #4]
 8013f02:	f001 f88f 	bl	8015024 <prvAddCurrentTaskToDelayedList>
			}
			xAlreadyYielded = xTaskResumeAll();
 8013f06:	f000 f893 	bl	8014030 <xTaskResumeAll>
 8013f0a:	60f8      	str	r0, [r7, #12]
			mtCOVERAGE_TEST_MARKER();
		}

		/* Force a reschedule if xTaskResumeAll has not already done so, we may
		have put ourselves to sleep. */
		if( xAlreadyYielded == pdFALSE )
 8013f0c:	68fb      	ldr	r3, [r7, #12]
 8013f0e:	2b00      	cmp	r3, #0
 8013f10:	d107      	bne.n	8013f22 <vTaskDelay+0x5a>
		{
			portYIELD_WITHIN_API();
 8013f12:	4b07      	ldr	r3, [pc, #28]	@ (8013f30 <vTaskDelay+0x68>)
 8013f14:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8013f18:	601a      	str	r2, [r3, #0]
 8013f1a:	f3bf 8f4f 	dsb	sy
 8013f1e:	f3bf 8f6f 	isb	sy
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 8013f22:	bf00      	nop
 8013f24:	3710      	adds	r7, #16
 8013f26:	46bd      	mov	sp, r7
 8013f28:	bd80      	pop	{r7, pc}
 8013f2a:	bf00      	nop
 8013f2c:	240042ac 	.word	0x240042ac
 8013f30:	e000ed04 	.word	0xe000ed04

08013f34 <vTaskStartScheduler>:

#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
/*-----------------------------------------------------------*/

void vTaskStartScheduler( void )
{
 8013f34:	b580      	push	{r7, lr}
 8013f36:	b08a      	sub	sp, #40	@ 0x28
 8013f38:	af04      	add	r7, sp, #16
BaseType_t xReturn;

	/* Add the idle task at the lowest priority. */
	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
	{
		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
 8013f3a:	2300      	movs	r3, #0
 8013f3c:	60bb      	str	r3, [r7, #8]
		StackType_t *pxIdleTaskStackBuffer = NULL;
 8013f3e:	2300      	movs	r3, #0
 8013f40:	607b      	str	r3, [r7, #4]
		uint32_t ulIdleTaskStackSize;

		/* The Idle task is created using user provided RAM - obtain the
		address of the RAM then create the idle task. */
		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
 8013f42:	463a      	mov	r2, r7
 8013f44:	1d39      	adds	r1, r7, #4
 8013f46:	f107 0308 	add.w	r3, r7, #8
 8013f4a:	4618      	mov	r0, r3
 8013f4c:	f7fe f85c 	bl	8012008 <vApplicationGetIdleTaskMemory>
		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
 8013f50:	6839      	ldr	r1, [r7, #0]
 8013f52:	687b      	ldr	r3, [r7, #4]
 8013f54:	68ba      	ldr	r2, [r7, #8]
 8013f56:	9202      	str	r2, [sp, #8]
 8013f58:	9301      	str	r3, [sp, #4]
 8013f5a:	2300      	movs	r3, #0
 8013f5c:	9300      	str	r3, [sp, #0]
 8013f5e:	2300      	movs	r3, #0
 8013f60:	460a      	mov	r2, r1
 8013f62:	4924      	ldr	r1, [pc, #144]	@ (8013ff4 <vTaskStartScheduler+0xc0>)
 8013f64:	4824      	ldr	r0, [pc, #144]	@ (8013ff8 <vTaskStartScheduler+0xc4>)
 8013f66:	f7ff fdf1 	bl	8013b4c <xTaskCreateStatic>
 8013f6a:	4603      	mov	r3, r0
 8013f6c:	4a23      	ldr	r2, [pc, #140]	@ (8013ffc <vTaskStartScheduler+0xc8>)
 8013f6e:	6013      	str	r3, [r2, #0]
												( void * ) NULL, /*lint !e961.  The cast is not redundant for all compilers. */
												portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
												pxIdleTaskStackBuffer,
												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */

		if( xIdleTaskHandle != NULL )
 8013f70:	4b22      	ldr	r3, [pc, #136]	@ (8013ffc <vTaskStartScheduler+0xc8>)
 8013f72:	681b      	ldr	r3, [r3, #0]
 8013f74:	2b00      	cmp	r3, #0
 8013f76:	d002      	beq.n	8013f7e <vTaskStartScheduler+0x4a>
		{
			xReturn = pdPASS;
 8013f78:	2301      	movs	r3, #1
 8013f7a:	617b      	str	r3, [r7, #20]
 8013f7c:	e001      	b.n	8013f82 <vTaskStartScheduler+0x4e>
		}
		else
		{
			xReturn = pdFAIL;
 8013f7e:	2300      	movs	r3, #0
 8013f80:	617b      	str	r3, [r7, #20]
	}
	#endif /* configSUPPORT_STATIC_ALLOCATION */

	#if ( configUSE_TIMERS == 1 )
	{
		if( xReturn == pdPASS )
 8013f82:	697b      	ldr	r3, [r7, #20]
 8013f84:	2b01      	cmp	r3, #1
 8013f86:	d102      	bne.n	8013f8e <vTaskStartScheduler+0x5a>
		{
			xReturn = xTimerCreateTimerTask();
 8013f88:	f001 f8a0 	bl	80150cc <xTimerCreateTimerTask>
 8013f8c:	6178      	str	r0, [r7, #20]
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif /* configUSE_TIMERS */

	if( xReturn == pdPASS )
 8013f8e:	697b      	ldr	r3, [r7, #20]
 8013f90:	2b01      	cmp	r3, #1
 8013f92:	d11b      	bne.n	8013fcc <vTaskStartScheduler+0x98>
	__asm volatile
 8013f94:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013f98:	f383 8811 	msr	BASEPRI, r3
 8013f9c:	f3bf 8f6f 	isb	sy
 8013fa0:	f3bf 8f4f 	dsb	sy
 8013fa4:	613b      	str	r3, [r7, #16]
}
 8013fa6:	bf00      	nop
		{
			/* Switch Newlib's _impure_ptr variable to point to the _reent
			structure specific to the task that will run first.
			See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 8013fa8:	4b15      	ldr	r3, [pc, #84]	@ (8014000 <vTaskStartScheduler+0xcc>)
 8013faa:	681b      	ldr	r3, [r3, #0]
 8013fac:	3354      	adds	r3, #84	@ 0x54
 8013fae:	4a15      	ldr	r2, [pc, #84]	@ (8014004 <vTaskStartScheduler+0xd0>)
 8013fb0:	6013      	str	r3, [r2, #0]
		}
		#endif /* configUSE_NEWLIB_REENTRANT */

		xNextTaskUnblockTime = portMAX_DELAY;
 8013fb2:	4b15      	ldr	r3, [pc, #84]	@ (8014008 <vTaskStartScheduler+0xd4>)
 8013fb4:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8013fb8:	601a      	str	r2, [r3, #0]
		xSchedulerRunning = pdTRUE;
 8013fba:	4b14      	ldr	r3, [pc, #80]	@ (801400c <vTaskStartScheduler+0xd8>)
 8013fbc:	2201      	movs	r2, #1
 8013fbe:	601a      	str	r2, [r3, #0]
		xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
 8013fc0:	4b13      	ldr	r3, [pc, #76]	@ (8014010 <vTaskStartScheduler+0xdc>)
 8013fc2:	2200      	movs	r2, #0
 8013fc4:	601a      	str	r2, [r3, #0]

		traceTASK_SWITCHED_IN();

		/* Setting up the timer tick is hardware specific and thus in the
		portable interface. */
		if( xPortStartScheduler() != pdFALSE )
 8013fc6:	f001 fd53 	bl	8015a70 <xPortStartScheduler>
	}

	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
	meaning xIdleTaskHandle is not used anywhere else. */
	( void ) xIdleTaskHandle;
}
 8013fca:	e00f      	b.n	8013fec <vTaskStartScheduler+0xb8>
		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
 8013fcc:	697b      	ldr	r3, [r7, #20]
 8013fce:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8013fd2:	d10b      	bne.n	8013fec <vTaskStartScheduler+0xb8>
	__asm volatile
 8013fd4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8013fd8:	f383 8811 	msr	BASEPRI, r3
 8013fdc:	f3bf 8f6f 	isb	sy
 8013fe0:	f3bf 8f4f 	dsb	sy
 8013fe4:	60fb      	str	r3, [r7, #12]
}
 8013fe6:	bf00      	nop
 8013fe8:	bf00      	nop
 8013fea:	e7fd      	b.n	8013fe8 <vTaskStartScheduler+0xb4>
}
 8013fec:	bf00      	nop
 8013fee:	3718      	adds	r7, #24
 8013ff0:	46bd      	mov	sp, r7
 8013ff2:	bd80      	pop	{r7, pc}
 8013ff4:	0802dde4 	.word	0x0802dde4
 8013ff8:	080146d5 	.word	0x080146d5
 8013ffc:	240042a8 	.word	0x240042a8
 8014000:	24003db0 	.word	0x24003db0
 8014004:	240001d4 	.word	0x240001d4
 8014008:	240042a4 	.word	0x240042a4
 801400c:	24004290 	.word	0x24004290
 8014010:	24004288 	.word	0x24004288

08014014 <vTaskSuspendAll>:
	vPortEndScheduler();
}
/*----------------------------------------------------------*/

void vTaskSuspendAll( void )
{
 8014014:	b480      	push	{r7}
 8014016:	af00      	add	r7, sp, #0
	do not otherwise exhibit real time behaviour. */
	portSOFTWARE_BARRIER();

	/* The scheduler is suspended if uxSchedulerSuspended is non-zero.  An increment
	is used to allow calls to vTaskSuspendAll() to nest. */
	++uxSchedulerSuspended;
 8014018:	4b04      	ldr	r3, [pc, #16]	@ (801402c <vTaskSuspendAll+0x18>)
 801401a:	681b      	ldr	r3, [r3, #0]
 801401c:	3301      	adds	r3, #1
 801401e:	4a03      	ldr	r2, [pc, #12]	@ (801402c <vTaskSuspendAll+0x18>)
 8014020:	6013      	str	r3, [r2, #0]

	/* Enforces ordering for ports and optimised compilers that may otherwise place
	the above increment elsewhere. */
	portMEMORY_BARRIER();
}
 8014022:	bf00      	nop
 8014024:	46bd      	mov	sp, r7
 8014026:	f85d 7b04 	ldr.w	r7, [sp], #4
 801402a:	4770      	bx	lr
 801402c:	240042ac 	.word	0x240042ac

08014030 <xTaskResumeAll>:

#endif /* configUSE_TICKLESS_IDLE */
/*----------------------------------------------------------*/

BaseType_t xTaskResumeAll( void )
{
 8014030:	b580      	push	{r7, lr}
 8014032:	b084      	sub	sp, #16
 8014034:	af00      	add	r7, sp, #0
TCB_t *pxTCB = NULL;
 8014036:	2300      	movs	r3, #0
 8014038:	60fb      	str	r3, [r7, #12]
BaseType_t xAlreadyYielded = pdFALSE;
 801403a:	2300      	movs	r3, #0
 801403c:	60bb      	str	r3, [r7, #8]

	/* If uxSchedulerSuspended is zero then this function does not match a
	previous call to vTaskSuspendAll(). */
	configASSERT( uxSchedulerSuspended );
 801403e:	4b42      	ldr	r3, [pc, #264]	@ (8014148 <xTaskResumeAll+0x118>)
 8014040:	681b      	ldr	r3, [r3, #0]
 8014042:	2b00      	cmp	r3, #0
 8014044:	d10b      	bne.n	801405e <xTaskResumeAll+0x2e>
	__asm volatile
 8014046:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801404a:	f383 8811 	msr	BASEPRI, r3
 801404e:	f3bf 8f6f 	isb	sy
 8014052:	f3bf 8f4f 	dsb	sy
 8014056:	603b      	str	r3, [r7, #0]
}
 8014058:	bf00      	nop
 801405a:	bf00      	nop
 801405c:	e7fd      	b.n	801405a <xTaskResumeAll+0x2a>
	/* It is possible that an ISR caused a task to be removed from an event
	list while the scheduler was suspended.  If this was the case then the
	removed task will have been added to the xPendingReadyList.  Once the
	scheduler has been resumed it is safe to move all the pending ready
	tasks from this list into their appropriate ready list. */
	taskENTER_CRITICAL();
 801405e:	f001 fdab 	bl	8015bb8 <vPortEnterCritical>
	{
		--uxSchedulerSuspended;
 8014062:	4b39      	ldr	r3, [pc, #228]	@ (8014148 <xTaskResumeAll+0x118>)
 8014064:	681b      	ldr	r3, [r3, #0]
 8014066:	3b01      	subs	r3, #1
 8014068:	4a37      	ldr	r2, [pc, #220]	@ (8014148 <xTaskResumeAll+0x118>)
 801406a:	6013      	str	r3, [r2, #0]

		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 801406c:	4b36      	ldr	r3, [pc, #216]	@ (8014148 <xTaskResumeAll+0x118>)
 801406e:	681b      	ldr	r3, [r3, #0]
 8014070:	2b00      	cmp	r3, #0
 8014072:	d162      	bne.n	801413a <xTaskResumeAll+0x10a>
		{
			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
 8014074:	4b35      	ldr	r3, [pc, #212]	@ (801414c <xTaskResumeAll+0x11c>)
 8014076:	681b      	ldr	r3, [r3, #0]
 8014078:	2b00      	cmp	r3, #0
 801407a:	d05e      	beq.n	801413a <xTaskResumeAll+0x10a>
			{
				/* Move any readied tasks from the pending list into the
				appropriate ready list. */
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 801407c:	e02f      	b.n	80140de <xTaskResumeAll+0xae>
				{
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801407e:	4b34      	ldr	r3, [pc, #208]	@ (8014150 <xTaskResumeAll+0x120>)
 8014080:	68db      	ldr	r3, [r3, #12]
 8014082:	68db      	ldr	r3, [r3, #12]
 8014084:	60fb      	str	r3, [r7, #12]
					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 8014086:	68fb      	ldr	r3, [r7, #12]
 8014088:	3318      	adds	r3, #24
 801408a:	4618      	mov	r0, r3
 801408c:	f7fe f87a 	bl	8012184 <uxListRemove>
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8014090:	68fb      	ldr	r3, [r7, #12]
 8014092:	3304      	adds	r3, #4
 8014094:	4618      	mov	r0, r3
 8014096:	f7fe f875 	bl	8012184 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 801409a:	68fb      	ldr	r3, [r7, #12]
 801409c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801409e:	4b2d      	ldr	r3, [pc, #180]	@ (8014154 <xTaskResumeAll+0x124>)
 80140a0:	681b      	ldr	r3, [r3, #0]
 80140a2:	429a      	cmp	r2, r3
 80140a4:	d903      	bls.n	80140ae <xTaskResumeAll+0x7e>
 80140a6:	68fb      	ldr	r3, [r7, #12]
 80140a8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80140aa:	4a2a      	ldr	r2, [pc, #168]	@ (8014154 <xTaskResumeAll+0x124>)
 80140ac:	6013      	str	r3, [r2, #0]
 80140ae:	68fb      	ldr	r3, [r7, #12]
 80140b0:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80140b2:	4613      	mov	r3, r2
 80140b4:	009b      	lsls	r3, r3, #2
 80140b6:	4413      	add	r3, r2
 80140b8:	009b      	lsls	r3, r3, #2
 80140ba:	4a27      	ldr	r2, [pc, #156]	@ (8014158 <xTaskResumeAll+0x128>)
 80140bc:	441a      	add	r2, r3
 80140be:	68fb      	ldr	r3, [r7, #12]
 80140c0:	3304      	adds	r3, #4
 80140c2:	4619      	mov	r1, r3
 80140c4:	4610      	mov	r0, r2
 80140c6:	f7fe f800 	bl	80120ca <vListInsertEnd>

					/* If the moved task has a priority higher than the current
					task then a yield must be performed. */
					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 80140ca:	68fb      	ldr	r3, [r7, #12]
 80140cc:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80140ce:	4b23      	ldr	r3, [pc, #140]	@ (801415c <xTaskResumeAll+0x12c>)
 80140d0:	681b      	ldr	r3, [r3, #0]
 80140d2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80140d4:	429a      	cmp	r2, r3
 80140d6:	d302      	bcc.n	80140de <xTaskResumeAll+0xae>
					{
						xYieldPending = pdTRUE;
 80140d8:	4b21      	ldr	r3, [pc, #132]	@ (8014160 <xTaskResumeAll+0x130>)
 80140da:	2201      	movs	r2, #1
 80140dc:	601a      	str	r2, [r3, #0]
				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
 80140de:	4b1c      	ldr	r3, [pc, #112]	@ (8014150 <xTaskResumeAll+0x120>)
 80140e0:	681b      	ldr	r3, [r3, #0]
 80140e2:	2b00      	cmp	r3, #0
 80140e4:	d1cb      	bne.n	801407e <xTaskResumeAll+0x4e>
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( pxTCB != NULL )
 80140e6:	68fb      	ldr	r3, [r7, #12]
 80140e8:	2b00      	cmp	r3, #0
 80140ea:	d001      	beq.n	80140f0 <xTaskResumeAll+0xc0>
					which may have prevented the next unblock time from being
					re-calculated, in which case re-calculate it now.  Mainly
					important for low power tickless implementations, where
					this can prevent an unnecessary exit from low power
					state. */
					prvResetNextTaskUnblockTime();
 80140ec:	f000 fbae 	bl	801484c <prvResetNextTaskUnblockTime>
				/* If any ticks occurred while the scheduler was suspended then
				they should be processed now.  This ensures the tick count does
				not	slip, and that any delayed tasks are resumed at the correct
				time. */
				{
					TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
 80140f0:	4b1c      	ldr	r3, [pc, #112]	@ (8014164 <xTaskResumeAll+0x134>)
 80140f2:	681b      	ldr	r3, [r3, #0]
 80140f4:	607b      	str	r3, [r7, #4]

					if( xPendedCounts > ( TickType_t ) 0U )
 80140f6:	687b      	ldr	r3, [r7, #4]
 80140f8:	2b00      	cmp	r3, #0
 80140fa:	d010      	beq.n	801411e <xTaskResumeAll+0xee>
					{
						do
						{
							if( xTaskIncrementTick() != pdFALSE )
 80140fc:	f000 f858 	bl	80141b0 <xTaskIncrementTick>
 8014100:	4603      	mov	r3, r0
 8014102:	2b00      	cmp	r3, #0
 8014104:	d002      	beq.n	801410c <xTaskResumeAll+0xdc>
							{
								xYieldPending = pdTRUE;
 8014106:	4b16      	ldr	r3, [pc, #88]	@ (8014160 <xTaskResumeAll+0x130>)
 8014108:	2201      	movs	r2, #1
 801410a:	601a      	str	r2, [r3, #0]
							}
							else
							{
								mtCOVERAGE_TEST_MARKER();
							}
							--xPendedCounts;
 801410c:	687b      	ldr	r3, [r7, #4]
 801410e:	3b01      	subs	r3, #1
 8014110:	607b      	str	r3, [r7, #4]
						} while( xPendedCounts > ( TickType_t ) 0U );
 8014112:	687b      	ldr	r3, [r7, #4]
 8014114:	2b00      	cmp	r3, #0
 8014116:	d1f1      	bne.n	80140fc <xTaskResumeAll+0xcc>

						xPendedTicks = 0;
 8014118:	4b12      	ldr	r3, [pc, #72]	@ (8014164 <xTaskResumeAll+0x134>)
 801411a:	2200      	movs	r2, #0
 801411c:	601a      	str	r2, [r3, #0]
					{
						mtCOVERAGE_TEST_MARKER();
					}
				}

				if( xYieldPending != pdFALSE )
 801411e:	4b10      	ldr	r3, [pc, #64]	@ (8014160 <xTaskResumeAll+0x130>)
 8014120:	681b      	ldr	r3, [r3, #0]
 8014122:	2b00      	cmp	r3, #0
 8014124:	d009      	beq.n	801413a <xTaskResumeAll+0x10a>
				{
					#if( configUSE_PREEMPTION != 0 )
					{
						xAlreadyYielded = pdTRUE;
 8014126:	2301      	movs	r3, #1
 8014128:	60bb      	str	r3, [r7, #8]
					}
					#endif
					taskYIELD_IF_USING_PREEMPTION();
 801412a:	4b0f      	ldr	r3, [pc, #60]	@ (8014168 <xTaskResumeAll+0x138>)
 801412c:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8014130:	601a      	str	r2, [r3, #0]
 8014132:	f3bf 8f4f 	dsb	sy
 8014136:	f3bf 8f6f 	isb	sy
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 801413a:	f001 fd6f 	bl	8015c1c <vPortExitCritical>

	return xAlreadyYielded;
 801413e:	68bb      	ldr	r3, [r7, #8]
}
 8014140:	4618      	mov	r0, r3
 8014142:	3710      	adds	r7, #16
 8014144:	46bd      	mov	sp, r7
 8014146:	bd80      	pop	{r7, pc}
 8014148:	240042ac 	.word	0x240042ac
 801414c:	24004284 	.word	0x24004284
 8014150:	24004244 	.word	0x24004244
 8014154:	2400428c 	.word	0x2400428c
 8014158:	24003db4 	.word	0x24003db4
 801415c:	24003db0 	.word	0x24003db0
 8014160:	24004298 	.word	0x24004298
 8014164:	24004294 	.word	0x24004294
 8014168:	e000ed04 	.word	0xe000ed04

0801416c <xTaskGetTickCount>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCount( void )
{
 801416c:	b480      	push	{r7}
 801416e:	b083      	sub	sp, #12
 8014170:	af00      	add	r7, sp, #0
TickType_t xTicks;

	/* Critical section required if running on a 16 bit processor. */
	portTICK_TYPE_ENTER_CRITICAL();
	{
		xTicks = xTickCount;
 8014172:	4b05      	ldr	r3, [pc, #20]	@ (8014188 <xTaskGetTickCount+0x1c>)
 8014174:	681b      	ldr	r3, [r3, #0]
 8014176:	607b      	str	r3, [r7, #4]
	}
	portTICK_TYPE_EXIT_CRITICAL();

	return xTicks;
 8014178:	687b      	ldr	r3, [r7, #4]
}
 801417a:	4618      	mov	r0, r3
 801417c:	370c      	adds	r7, #12
 801417e:	46bd      	mov	sp, r7
 8014180:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014184:	4770      	bx	lr
 8014186:	bf00      	nop
 8014188:	24004288 	.word	0x24004288

0801418c <xTaskGetTickCountFromISR>:
/*-----------------------------------------------------------*/

TickType_t xTaskGetTickCountFromISR( void )
{
 801418c:	b580      	push	{r7, lr}
 801418e:	b082      	sub	sp, #8
 8014190:	af00      	add	r7, sp, #0
	that have been assigned a priority at or (logically) below the maximum
	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
	safe API to ensure interrupt entry is as fast and as simple as possible.
	More information (albeit Cortex-M specific) is provided on the following
	link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8014192:	f001 fdf1 	bl	8015d78 <vPortValidateInterruptPriority>

	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
 8014196:	2300      	movs	r3, #0
 8014198:	607b      	str	r3, [r7, #4]
	{
		xReturn = xTickCount;
 801419a:	4b04      	ldr	r3, [pc, #16]	@ (80141ac <xTaskGetTickCountFromISR+0x20>)
 801419c:	681b      	ldr	r3, [r3, #0]
 801419e:	603b      	str	r3, [r7, #0]
	}
	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

	return xReturn;
 80141a0:	683b      	ldr	r3, [r7, #0]
}
 80141a2:	4618      	mov	r0, r3
 80141a4:	3708      	adds	r7, #8
 80141a6:	46bd      	mov	sp, r7
 80141a8:	bd80      	pop	{r7, pc}
 80141aa:	bf00      	nop
 80141ac:	24004288 	.word	0x24004288

080141b0 <xTaskIncrementTick>:

#endif /* INCLUDE_xTaskAbortDelay */
/*----------------------------------------------------------*/

BaseType_t xTaskIncrementTick( void )
{
 80141b0:	b580      	push	{r7, lr}
 80141b2:	b086      	sub	sp, #24
 80141b4:	af00      	add	r7, sp, #0
TCB_t * pxTCB;
TickType_t xItemValue;
BaseType_t xSwitchRequired = pdFALSE;
 80141b6:	2300      	movs	r3, #0
 80141b8:	617b      	str	r3, [r7, #20]

	/* Called by the portable layer each time a tick interrupt occurs.
	Increments the tick then checks to see if the new tick value will cause any
	tasks to be unblocked. */
	traceTASK_INCREMENT_TICK( xTickCount );
	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 80141ba:	4b4f      	ldr	r3, [pc, #316]	@ (80142f8 <xTaskIncrementTick+0x148>)
 80141bc:	681b      	ldr	r3, [r3, #0]
 80141be:	2b00      	cmp	r3, #0
 80141c0:	f040 8090 	bne.w	80142e4 <xTaskIncrementTick+0x134>
	{
		/* Minor optimisation.  The tick count cannot change in this
		block. */
		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
 80141c4:	4b4d      	ldr	r3, [pc, #308]	@ (80142fc <xTaskIncrementTick+0x14c>)
 80141c6:	681b      	ldr	r3, [r3, #0]
 80141c8:	3301      	adds	r3, #1
 80141ca:	613b      	str	r3, [r7, #16]

		/* Increment the RTOS tick, switching the delayed and overflowed
		delayed lists if it wraps to 0. */
		xTickCount = xConstTickCount;
 80141cc:	4a4b      	ldr	r2, [pc, #300]	@ (80142fc <xTaskIncrementTick+0x14c>)
 80141ce:	693b      	ldr	r3, [r7, #16]
 80141d0:	6013      	str	r3, [r2, #0]

		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
 80141d2:	693b      	ldr	r3, [r7, #16]
 80141d4:	2b00      	cmp	r3, #0
 80141d6:	d121      	bne.n	801421c <xTaskIncrementTick+0x6c>
		{
			taskSWITCH_DELAYED_LISTS();
 80141d8:	4b49      	ldr	r3, [pc, #292]	@ (8014300 <xTaskIncrementTick+0x150>)
 80141da:	681b      	ldr	r3, [r3, #0]
 80141dc:	681b      	ldr	r3, [r3, #0]
 80141de:	2b00      	cmp	r3, #0
 80141e0:	d00b      	beq.n	80141fa <xTaskIncrementTick+0x4a>
	__asm volatile
 80141e2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80141e6:	f383 8811 	msr	BASEPRI, r3
 80141ea:	f3bf 8f6f 	isb	sy
 80141ee:	f3bf 8f4f 	dsb	sy
 80141f2:	603b      	str	r3, [r7, #0]
}
 80141f4:	bf00      	nop
 80141f6:	bf00      	nop
 80141f8:	e7fd      	b.n	80141f6 <xTaskIncrementTick+0x46>
 80141fa:	4b41      	ldr	r3, [pc, #260]	@ (8014300 <xTaskIncrementTick+0x150>)
 80141fc:	681b      	ldr	r3, [r3, #0]
 80141fe:	60fb      	str	r3, [r7, #12]
 8014200:	4b40      	ldr	r3, [pc, #256]	@ (8014304 <xTaskIncrementTick+0x154>)
 8014202:	681b      	ldr	r3, [r3, #0]
 8014204:	4a3e      	ldr	r2, [pc, #248]	@ (8014300 <xTaskIncrementTick+0x150>)
 8014206:	6013      	str	r3, [r2, #0]
 8014208:	4a3e      	ldr	r2, [pc, #248]	@ (8014304 <xTaskIncrementTick+0x154>)
 801420a:	68fb      	ldr	r3, [r7, #12]
 801420c:	6013      	str	r3, [r2, #0]
 801420e:	4b3e      	ldr	r3, [pc, #248]	@ (8014308 <xTaskIncrementTick+0x158>)
 8014210:	681b      	ldr	r3, [r3, #0]
 8014212:	3301      	adds	r3, #1
 8014214:	4a3c      	ldr	r2, [pc, #240]	@ (8014308 <xTaskIncrementTick+0x158>)
 8014216:	6013      	str	r3, [r2, #0]
 8014218:	f000 fb18 	bl	801484c <prvResetNextTaskUnblockTime>

		/* See if this tick has made a timeout expire.  Tasks are stored in
		the	queue in the order of their wake time - meaning once one task
		has been found whose block time has not expired there is no need to
		look any further down the list. */
		if( xConstTickCount >= xNextTaskUnblockTime )
 801421c:	4b3b      	ldr	r3, [pc, #236]	@ (801430c <xTaskIncrementTick+0x15c>)
 801421e:	681b      	ldr	r3, [r3, #0]
 8014220:	693a      	ldr	r2, [r7, #16]
 8014222:	429a      	cmp	r2, r3
 8014224:	d349      	bcc.n	80142ba <xTaskIncrementTick+0x10a>
		{
			for( ;; )
			{
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8014226:	4b36      	ldr	r3, [pc, #216]	@ (8014300 <xTaskIncrementTick+0x150>)
 8014228:	681b      	ldr	r3, [r3, #0]
 801422a:	681b      	ldr	r3, [r3, #0]
 801422c:	2b00      	cmp	r3, #0
 801422e:	d104      	bne.n	801423a <xTaskIncrementTick+0x8a>
					/* The delayed list is empty.  Set xNextTaskUnblockTime
					to the maximum possible value so it is extremely
					unlikely that the
					if( xTickCount >= xNextTaskUnblockTime ) test will pass
					next time through. */
					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8014230:	4b36      	ldr	r3, [pc, #216]	@ (801430c <xTaskIncrementTick+0x15c>)
 8014232:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8014236:	601a      	str	r2, [r3, #0]
					break;
 8014238:	e03f      	b.n	80142ba <xTaskIncrementTick+0x10a>
				{
					/* The delayed list is not empty, get the value of the
					item at the head of the delayed list.  This is the time
					at which the task at the head of the delayed list must
					be removed from the Blocked state. */
					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 801423a:	4b31      	ldr	r3, [pc, #196]	@ (8014300 <xTaskIncrementTick+0x150>)
 801423c:	681b      	ldr	r3, [r3, #0]
 801423e:	68db      	ldr	r3, [r3, #12]
 8014240:	68db      	ldr	r3, [r3, #12]
 8014242:	60bb      	str	r3, [r7, #8]
					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
 8014244:	68bb      	ldr	r3, [r7, #8]
 8014246:	685b      	ldr	r3, [r3, #4]
 8014248:	607b      	str	r3, [r7, #4]

					if( xConstTickCount < xItemValue )
 801424a:	693a      	ldr	r2, [r7, #16]
 801424c:	687b      	ldr	r3, [r7, #4]
 801424e:	429a      	cmp	r2, r3
 8014250:	d203      	bcs.n	801425a <xTaskIncrementTick+0xaa>
						/* It is not time to unblock this item yet, but the
						item value is the time at which the task at the head
						of the blocked list must be removed from the Blocked
						state -	so record the item value in
						xNextTaskUnblockTime. */
						xNextTaskUnblockTime = xItemValue;
 8014252:	4a2e      	ldr	r2, [pc, #184]	@ (801430c <xTaskIncrementTick+0x15c>)
 8014254:	687b      	ldr	r3, [r7, #4]
 8014256:	6013      	str	r3, [r2, #0]
						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
 8014258:	e02f      	b.n	80142ba <xTaskIncrementTick+0x10a>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* It is time to remove the item from the Blocked state. */
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 801425a:	68bb      	ldr	r3, [r7, #8]
 801425c:	3304      	adds	r3, #4
 801425e:	4618      	mov	r0, r3
 8014260:	f7fd ff90 	bl	8012184 <uxListRemove>

					/* Is the task waiting on an event also?  If so remove
					it from the event list. */
					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
 8014264:	68bb      	ldr	r3, [r7, #8]
 8014266:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8014268:	2b00      	cmp	r3, #0
 801426a:	d004      	beq.n	8014276 <xTaskIncrementTick+0xc6>
					{
						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
 801426c:	68bb      	ldr	r3, [r7, #8]
 801426e:	3318      	adds	r3, #24
 8014270:	4618      	mov	r0, r3
 8014272:	f7fd ff87 	bl	8012184 <uxListRemove>
						mtCOVERAGE_TEST_MARKER();
					}

					/* Place the unblocked task into the appropriate ready
					list. */
					prvAddTaskToReadyList( pxTCB );
 8014276:	68bb      	ldr	r3, [r7, #8]
 8014278:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801427a:	4b25      	ldr	r3, [pc, #148]	@ (8014310 <xTaskIncrementTick+0x160>)
 801427c:	681b      	ldr	r3, [r3, #0]
 801427e:	429a      	cmp	r2, r3
 8014280:	d903      	bls.n	801428a <xTaskIncrementTick+0xda>
 8014282:	68bb      	ldr	r3, [r7, #8]
 8014284:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014286:	4a22      	ldr	r2, [pc, #136]	@ (8014310 <xTaskIncrementTick+0x160>)
 8014288:	6013      	str	r3, [r2, #0]
 801428a:	68bb      	ldr	r3, [r7, #8]
 801428c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801428e:	4613      	mov	r3, r2
 8014290:	009b      	lsls	r3, r3, #2
 8014292:	4413      	add	r3, r2
 8014294:	009b      	lsls	r3, r3, #2
 8014296:	4a1f      	ldr	r2, [pc, #124]	@ (8014314 <xTaskIncrementTick+0x164>)
 8014298:	441a      	add	r2, r3
 801429a:	68bb      	ldr	r3, [r7, #8]
 801429c:	3304      	adds	r3, #4
 801429e:	4619      	mov	r1, r3
 80142a0:	4610      	mov	r0, r2
 80142a2:	f7fd ff12 	bl	80120ca <vListInsertEnd>
					{
						/* Preemption is on, but a context switch should
						only be performed if the unblocked task has a
						priority that is equal to or higher than the
						currently executing task. */
						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
 80142a6:	68bb      	ldr	r3, [r7, #8]
 80142a8:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80142aa:	4b1b      	ldr	r3, [pc, #108]	@ (8014318 <xTaskIncrementTick+0x168>)
 80142ac:	681b      	ldr	r3, [r3, #0]
 80142ae:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80142b0:	429a      	cmp	r2, r3
 80142b2:	d3b8      	bcc.n	8014226 <xTaskIncrementTick+0x76>
						{
							xSwitchRequired = pdTRUE;
 80142b4:	2301      	movs	r3, #1
 80142b6:	617b      	str	r3, [r7, #20]
				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 80142b8:	e7b5      	b.n	8014226 <xTaskIncrementTick+0x76>
		/* Tasks of equal priority to the currently running task will share
		processing time (time slice) if preemption is on, and the application
		writer has not explicitly turned time slicing off. */
		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
		{
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
 80142ba:	4b17      	ldr	r3, [pc, #92]	@ (8014318 <xTaskIncrementTick+0x168>)
 80142bc:	681b      	ldr	r3, [r3, #0]
 80142be:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80142c0:	4914      	ldr	r1, [pc, #80]	@ (8014314 <xTaskIncrementTick+0x164>)
 80142c2:	4613      	mov	r3, r2
 80142c4:	009b      	lsls	r3, r3, #2
 80142c6:	4413      	add	r3, r2
 80142c8:	009b      	lsls	r3, r3, #2
 80142ca:	440b      	add	r3, r1
 80142cc:	681b      	ldr	r3, [r3, #0]
 80142ce:	2b01      	cmp	r3, #1
 80142d0:	d901      	bls.n	80142d6 <xTaskIncrementTick+0x126>
			{
				xSwitchRequired = pdTRUE;
 80142d2:	2301      	movs	r3, #1
 80142d4:	617b      	str	r3, [r7, #20]
		}
		#endif /* configUSE_TICK_HOOK */

		#if ( configUSE_PREEMPTION == 1 )
		{
			if( xYieldPending != pdFALSE )
 80142d6:	4b11      	ldr	r3, [pc, #68]	@ (801431c <xTaskIncrementTick+0x16c>)
 80142d8:	681b      	ldr	r3, [r3, #0]
 80142da:	2b00      	cmp	r3, #0
 80142dc:	d007      	beq.n	80142ee <xTaskIncrementTick+0x13e>
			{
				xSwitchRequired = pdTRUE;
 80142de:	2301      	movs	r3, #1
 80142e0:	617b      	str	r3, [r7, #20]
 80142e2:	e004      	b.n	80142ee <xTaskIncrementTick+0x13e>
		}
		#endif /* configUSE_PREEMPTION */
	}
	else
	{
		++xPendedTicks;
 80142e4:	4b0e      	ldr	r3, [pc, #56]	@ (8014320 <xTaskIncrementTick+0x170>)
 80142e6:	681b      	ldr	r3, [r3, #0]
 80142e8:	3301      	adds	r3, #1
 80142ea:	4a0d      	ldr	r2, [pc, #52]	@ (8014320 <xTaskIncrementTick+0x170>)
 80142ec:	6013      	str	r3, [r2, #0]
			vApplicationTickHook();
		}
		#endif
	}

	return xSwitchRequired;
 80142ee:	697b      	ldr	r3, [r7, #20]
}
 80142f0:	4618      	mov	r0, r3
 80142f2:	3718      	adds	r7, #24
 80142f4:	46bd      	mov	sp, r7
 80142f6:	bd80      	pop	{r7, pc}
 80142f8:	240042ac 	.word	0x240042ac
 80142fc:	24004288 	.word	0x24004288
 8014300:	2400423c 	.word	0x2400423c
 8014304:	24004240 	.word	0x24004240
 8014308:	2400429c 	.word	0x2400429c
 801430c:	240042a4 	.word	0x240042a4
 8014310:	2400428c 	.word	0x2400428c
 8014314:	24003db4 	.word	0x24003db4
 8014318:	24003db0 	.word	0x24003db0
 801431c:	24004298 	.word	0x24004298
 8014320:	24004294 	.word	0x24004294

08014324 <vTaskSwitchContext>:

#endif /* configUSE_APPLICATION_TASK_TAG */
/*-----------------------------------------------------------*/

void vTaskSwitchContext( void )
{
 8014324:	b580      	push	{r7, lr}
 8014326:	b084      	sub	sp, #16
 8014328:	af00      	add	r7, sp, #0
	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
 801432a:	4b32      	ldr	r3, [pc, #200]	@ (80143f4 <vTaskSwitchContext+0xd0>)
 801432c:	681b      	ldr	r3, [r3, #0]
 801432e:	2b00      	cmp	r3, #0
 8014330:	d003      	beq.n	801433a <vTaskSwitchContext+0x16>
	{
		/* The scheduler is currently suspended - do not allow a context
		switch. */
		xYieldPending = pdTRUE;
 8014332:	4b31      	ldr	r3, [pc, #196]	@ (80143f8 <vTaskSwitchContext+0xd4>)
 8014334:	2201      	movs	r2, #1
 8014336:	601a      	str	r2, [r3, #0]
			for additional information. */
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
		}
		#endif /* configUSE_NEWLIB_REENTRANT */
	}
}
 8014338:	e058      	b.n	80143ec <vTaskSwitchContext+0xc8>
		xYieldPending = pdFALSE;
 801433a:	4b2f      	ldr	r3, [pc, #188]	@ (80143f8 <vTaskSwitchContext+0xd4>)
 801433c:	2200      	movs	r2, #0
 801433e:	601a      	str	r2, [r3, #0]
		taskCHECK_FOR_STACK_OVERFLOW();
 8014340:	4b2e      	ldr	r3, [pc, #184]	@ (80143fc <vTaskSwitchContext+0xd8>)
 8014342:	681b      	ldr	r3, [r3, #0]
 8014344:	681a      	ldr	r2, [r3, #0]
 8014346:	4b2d      	ldr	r3, [pc, #180]	@ (80143fc <vTaskSwitchContext+0xd8>)
 8014348:	681b      	ldr	r3, [r3, #0]
 801434a:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801434c:	429a      	cmp	r2, r3
 801434e:	d808      	bhi.n	8014362 <vTaskSwitchContext+0x3e>
 8014350:	4b2a      	ldr	r3, [pc, #168]	@ (80143fc <vTaskSwitchContext+0xd8>)
 8014352:	681a      	ldr	r2, [r3, #0]
 8014354:	4b29      	ldr	r3, [pc, #164]	@ (80143fc <vTaskSwitchContext+0xd8>)
 8014356:	681b      	ldr	r3, [r3, #0]
 8014358:	3334      	adds	r3, #52	@ 0x34
 801435a:	4619      	mov	r1, r3
 801435c:	4610      	mov	r0, r2
 801435e:	f7ed fca0 	bl	8001ca2 <vApplicationStackOverflowHook>
		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8014362:	4b27      	ldr	r3, [pc, #156]	@ (8014400 <vTaskSwitchContext+0xdc>)
 8014364:	681b      	ldr	r3, [r3, #0]
 8014366:	60fb      	str	r3, [r7, #12]
 8014368:	e011      	b.n	801438e <vTaskSwitchContext+0x6a>
 801436a:	68fb      	ldr	r3, [r7, #12]
 801436c:	2b00      	cmp	r3, #0
 801436e:	d10b      	bne.n	8014388 <vTaskSwitchContext+0x64>
	__asm volatile
 8014370:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014374:	f383 8811 	msr	BASEPRI, r3
 8014378:	f3bf 8f6f 	isb	sy
 801437c:	f3bf 8f4f 	dsb	sy
 8014380:	607b      	str	r3, [r7, #4]
}
 8014382:	bf00      	nop
 8014384:	bf00      	nop
 8014386:	e7fd      	b.n	8014384 <vTaskSwitchContext+0x60>
 8014388:	68fb      	ldr	r3, [r7, #12]
 801438a:	3b01      	subs	r3, #1
 801438c:	60fb      	str	r3, [r7, #12]
 801438e:	491d      	ldr	r1, [pc, #116]	@ (8014404 <vTaskSwitchContext+0xe0>)
 8014390:	68fa      	ldr	r2, [r7, #12]
 8014392:	4613      	mov	r3, r2
 8014394:	009b      	lsls	r3, r3, #2
 8014396:	4413      	add	r3, r2
 8014398:	009b      	lsls	r3, r3, #2
 801439a:	440b      	add	r3, r1
 801439c:	681b      	ldr	r3, [r3, #0]
 801439e:	2b00      	cmp	r3, #0
 80143a0:	d0e3      	beq.n	801436a <vTaskSwitchContext+0x46>
 80143a2:	68fa      	ldr	r2, [r7, #12]
 80143a4:	4613      	mov	r3, r2
 80143a6:	009b      	lsls	r3, r3, #2
 80143a8:	4413      	add	r3, r2
 80143aa:	009b      	lsls	r3, r3, #2
 80143ac:	4a15      	ldr	r2, [pc, #84]	@ (8014404 <vTaskSwitchContext+0xe0>)
 80143ae:	4413      	add	r3, r2
 80143b0:	60bb      	str	r3, [r7, #8]
 80143b2:	68bb      	ldr	r3, [r7, #8]
 80143b4:	685b      	ldr	r3, [r3, #4]
 80143b6:	685a      	ldr	r2, [r3, #4]
 80143b8:	68bb      	ldr	r3, [r7, #8]
 80143ba:	605a      	str	r2, [r3, #4]
 80143bc:	68bb      	ldr	r3, [r7, #8]
 80143be:	685a      	ldr	r2, [r3, #4]
 80143c0:	68bb      	ldr	r3, [r7, #8]
 80143c2:	3308      	adds	r3, #8
 80143c4:	429a      	cmp	r2, r3
 80143c6:	d104      	bne.n	80143d2 <vTaskSwitchContext+0xae>
 80143c8:	68bb      	ldr	r3, [r7, #8]
 80143ca:	685b      	ldr	r3, [r3, #4]
 80143cc:	685a      	ldr	r2, [r3, #4]
 80143ce:	68bb      	ldr	r3, [r7, #8]
 80143d0:	605a      	str	r2, [r3, #4]
 80143d2:	68bb      	ldr	r3, [r7, #8]
 80143d4:	685b      	ldr	r3, [r3, #4]
 80143d6:	68db      	ldr	r3, [r3, #12]
 80143d8:	4a08      	ldr	r2, [pc, #32]	@ (80143fc <vTaskSwitchContext+0xd8>)
 80143da:	6013      	str	r3, [r2, #0]
 80143dc:	4a08      	ldr	r2, [pc, #32]	@ (8014400 <vTaskSwitchContext+0xdc>)
 80143de:	68fb      	ldr	r3, [r7, #12]
 80143e0:	6013      	str	r3, [r2, #0]
			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
 80143e2:	4b06      	ldr	r3, [pc, #24]	@ (80143fc <vTaskSwitchContext+0xd8>)
 80143e4:	681b      	ldr	r3, [r3, #0]
 80143e6:	3354      	adds	r3, #84	@ 0x54
 80143e8:	4a07      	ldr	r2, [pc, #28]	@ (8014408 <vTaskSwitchContext+0xe4>)
 80143ea:	6013      	str	r3, [r2, #0]
}
 80143ec:	bf00      	nop
 80143ee:	3710      	adds	r7, #16
 80143f0:	46bd      	mov	sp, r7
 80143f2:	bd80      	pop	{r7, pc}
 80143f4:	240042ac 	.word	0x240042ac
 80143f8:	24004298 	.word	0x24004298
 80143fc:	24003db0 	.word	0x24003db0
 8014400:	2400428c 	.word	0x2400428c
 8014404:	24003db4 	.word	0x24003db4
 8014408:	240001d4 	.word	0x240001d4

0801440c <vTaskPlaceOnEventList>:
/*-----------------------------------------------------------*/

void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
{
 801440c:	b580      	push	{r7, lr}
 801440e:	b084      	sub	sp, #16
 8014410:	af00      	add	r7, sp, #0
 8014412:	6078      	str	r0, [r7, #4]
 8014414:	6039      	str	r1, [r7, #0]
	configASSERT( pxEventList );
 8014416:	687b      	ldr	r3, [r7, #4]
 8014418:	2b00      	cmp	r3, #0
 801441a:	d10b      	bne.n	8014434 <vTaskPlaceOnEventList+0x28>
	__asm volatile
 801441c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014420:	f383 8811 	msr	BASEPRI, r3
 8014424:	f3bf 8f6f 	isb	sy
 8014428:	f3bf 8f4f 	dsb	sy
 801442c:	60fb      	str	r3, [r7, #12]
}
 801442e:	bf00      	nop
 8014430:	bf00      	nop
 8014432:	e7fd      	b.n	8014430 <vTaskPlaceOnEventList+0x24>

	/* Place the event list item of the TCB in the appropriate event list.
	This is placed in the list in priority order so the highest priority task
	is the first to be woken by the event.  The queue that contains the event
	list is locked, preventing simultaneous access from interrupts. */
	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 8014434:	4b07      	ldr	r3, [pc, #28]	@ (8014454 <vTaskPlaceOnEventList+0x48>)
 8014436:	681b      	ldr	r3, [r3, #0]
 8014438:	3318      	adds	r3, #24
 801443a:	4619      	mov	r1, r3
 801443c:	6878      	ldr	r0, [r7, #4]
 801443e:	f7fd fe68 	bl	8012112 <vListInsert>

	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 8014442:	2101      	movs	r1, #1
 8014444:	6838      	ldr	r0, [r7, #0]
 8014446:	f000 fded 	bl	8015024 <prvAddCurrentTaskToDelayedList>
}
 801444a:	bf00      	nop
 801444c:	3710      	adds	r7, #16
 801444e:	46bd      	mov	sp, r7
 8014450:	bd80      	pop	{r7, pc}
 8014452:	bf00      	nop
 8014454:	24003db0 	.word	0x24003db0

08014458 <vTaskPlaceOnEventListRestricted>:
/*-----------------------------------------------------------*/

#if( configUSE_TIMERS == 1 )

	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
	{
 8014458:	b580      	push	{r7, lr}
 801445a:	b086      	sub	sp, #24
 801445c:	af00      	add	r7, sp, #0
 801445e:	60f8      	str	r0, [r7, #12]
 8014460:	60b9      	str	r1, [r7, #8]
 8014462:	607a      	str	r2, [r7, #4]
		configASSERT( pxEventList );
 8014464:	68fb      	ldr	r3, [r7, #12]
 8014466:	2b00      	cmp	r3, #0
 8014468:	d10b      	bne.n	8014482 <vTaskPlaceOnEventListRestricted+0x2a>
	__asm volatile
 801446a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801446e:	f383 8811 	msr	BASEPRI, r3
 8014472:	f3bf 8f6f 	isb	sy
 8014476:	f3bf 8f4f 	dsb	sy
 801447a:	617b      	str	r3, [r7, #20]
}
 801447c:	bf00      	nop
 801447e:	bf00      	nop
 8014480:	e7fd      	b.n	801447e <vTaskPlaceOnEventListRestricted+0x26>

		/* Place the event list item of the TCB in the appropriate event list.
		In this case it is assume that this is the only task that is going to
		be waiting on this event list, so the faster vListInsertEnd() function
		can be used in place of vListInsert. */
		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
 8014482:	4b0a      	ldr	r3, [pc, #40]	@ (80144ac <vTaskPlaceOnEventListRestricted+0x54>)
 8014484:	681b      	ldr	r3, [r3, #0]
 8014486:	3318      	adds	r3, #24
 8014488:	4619      	mov	r1, r3
 801448a:	68f8      	ldr	r0, [r7, #12]
 801448c:	f7fd fe1d 	bl	80120ca <vListInsertEnd>

		/* If the task should block indefinitely then set the block time to a
		value that will be recognised as an indefinite delay inside the
		prvAddCurrentTaskToDelayedList() function. */
		if( xWaitIndefinitely != pdFALSE )
 8014490:	687b      	ldr	r3, [r7, #4]
 8014492:	2b00      	cmp	r3, #0
 8014494:	d002      	beq.n	801449c <vTaskPlaceOnEventListRestricted+0x44>
		{
			xTicksToWait = portMAX_DELAY;
 8014496:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801449a:	60bb      	str	r3, [r7, #8]
		}

		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
 801449c:	6879      	ldr	r1, [r7, #4]
 801449e:	68b8      	ldr	r0, [r7, #8]
 80144a0:	f000 fdc0 	bl	8015024 <prvAddCurrentTaskToDelayedList>
	}
 80144a4:	bf00      	nop
 80144a6:	3718      	adds	r7, #24
 80144a8:	46bd      	mov	sp, r7
 80144aa:	bd80      	pop	{r7, pc}
 80144ac:	24003db0 	.word	0x24003db0

080144b0 <xTaskRemoveFromEventList>:

#endif /* configUSE_TIMERS */
/*-----------------------------------------------------------*/

BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
{
 80144b0:	b580      	push	{r7, lr}
 80144b2:	b086      	sub	sp, #24
 80144b4:	af00      	add	r7, sp, #0
 80144b6:	6078      	str	r0, [r7, #4]
	get called - the lock count on the queue will get modified instead.  This
	means exclusive access to the event list is guaranteed here.

	This function assumes that a check has already been made to ensure that
	pxEventList is not empty. */
	pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 80144b8:	687b      	ldr	r3, [r7, #4]
 80144ba:	68db      	ldr	r3, [r3, #12]
 80144bc:	68db      	ldr	r3, [r3, #12]
 80144be:	613b      	str	r3, [r7, #16]
	configASSERT( pxUnblockedTCB );
 80144c0:	693b      	ldr	r3, [r7, #16]
 80144c2:	2b00      	cmp	r3, #0
 80144c4:	d10b      	bne.n	80144de <xTaskRemoveFromEventList+0x2e>
	__asm volatile
 80144c6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80144ca:	f383 8811 	msr	BASEPRI, r3
 80144ce:	f3bf 8f6f 	isb	sy
 80144d2:	f3bf 8f4f 	dsb	sy
 80144d6:	60fb      	str	r3, [r7, #12]
}
 80144d8:	bf00      	nop
 80144da:	bf00      	nop
 80144dc:	e7fd      	b.n	80144da <xTaskRemoveFromEventList+0x2a>
	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
 80144de:	693b      	ldr	r3, [r7, #16]
 80144e0:	3318      	adds	r3, #24
 80144e2:	4618      	mov	r0, r3
 80144e4:	f7fd fe4e 	bl	8012184 <uxListRemove>

	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 80144e8:	4b1d      	ldr	r3, [pc, #116]	@ (8014560 <xTaskRemoveFromEventList+0xb0>)
 80144ea:	681b      	ldr	r3, [r3, #0]
 80144ec:	2b00      	cmp	r3, #0
 80144ee:	d11d      	bne.n	801452c <xTaskRemoveFromEventList+0x7c>
	{
		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
 80144f0:	693b      	ldr	r3, [r7, #16]
 80144f2:	3304      	adds	r3, #4
 80144f4:	4618      	mov	r0, r3
 80144f6:	f7fd fe45 	bl	8012184 <uxListRemove>
		prvAddTaskToReadyList( pxUnblockedTCB );
 80144fa:	693b      	ldr	r3, [r7, #16]
 80144fc:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 80144fe:	4b19      	ldr	r3, [pc, #100]	@ (8014564 <xTaskRemoveFromEventList+0xb4>)
 8014500:	681b      	ldr	r3, [r3, #0]
 8014502:	429a      	cmp	r2, r3
 8014504:	d903      	bls.n	801450e <xTaskRemoveFromEventList+0x5e>
 8014506:	693b      	ldr	r3, [r7, #16]
 8014508:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801450a:	4a16      	ldr	r2, [pc, #88]	@ (8014564 <xTaskRemoveFromEventList+0xb4>)
 801450c:	6013      	str	r3, [r2, #0]
 801450e:	693b      	ldr	r3, [r7, #16]
 8014510:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014512:	4613      	mov	r3, r2
 8014514:	009b      	lsls	r3, r3, #2
 8014516:	4413      	add	r3, r2
 8014518:	009b      	lsls	r3, r3, #2
 801451a:	4a13      	ldr	r2, [pc, #76]	@ (8014568 <xTaskRemoveFromEventList+0xb8>)
 801451c:	441a      	add	r2, r3
 801451e:	693b      	ldr	r3, [r7, #16]
 8014520:	3304      	adds	r3, #4
 8014522:	4619      	mov	r1, r3
 8014524:	4610      	mov	r0, r2
 8014526:	f7fd fdd0 	bl	80120ca <vListInsertEnd>
 801452a:	e005      	b.n	8014538 <xTaskRemoveFromEventList+0x88>
	}
	else
	{
		/* The delayed and ready lists cannot be accessed, so hold this task
		pending until the scheduler is resumed. */
		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
 801452c:	693b      	ldr	r3, [r7, #16]
 801452e:	3318      	adds	r3, #24
 8014530:	4619      	mov	r1, r3
 8014532:	480e      	ldr	r0, [pc, #56]	@ (801456c <xTaskRemoveFromEventList+0xbc>)
 8014534:	f7fd fdc9 	bl	80120ca <vListInsertEnd>
	}

	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
 8014538:	693b      	ldr	r3, [r7, #16]
 801453a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801453c:	4b0c      	ldr	r3, [pc, #48]	@ (8014570 <xTaskRemoveFromEventList+0xc0>)
 801453e:	681b      	ldr	r3, [r3, #0]
 8014540:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014542:	429a      	cmp	r2, r3
 8014544:	d905      	bls.n	8014552 <xTaskRemoveFromEventList+0xa2>
	{
		/* Return true if the task removed from the event list has a higher
		priority than the calling task.  This allows the calling task to know if
		it should force a context switch now. */
		xReturn = pdTRUE;
 8014546:	2301      	movs	r3, #1
 8014548:	617b      	str	r3, [r7, #20]

		/* Mark that a yield is pending in case the user is not using the
		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
		xYieldPending = pdTRUE;
 801454a:	4b0a      	ldr	r3, [pc, #40]	@ (8014574 <xTaskRemoveFromEventList+0xc4>)
 801454c:	2201      	movs	r2, #1
 801454e:	601a      	str	r2, [r3, #0]
 8014550:	e001      	b.n	8014556 <xTaskRemoveFromEventList+0xa6>
	}
	else
	{
		xReturn = pdFALSE;
 8014552:	2300      	movs	r3, #0
 8014554:	617b      	str	r3, [r7, #20]
	}

	return xReturn;
 8014556:	697b      	ldr	r3, [r7, #20]
}
 8014558:	4618      	mov	r0, r3
 801455a:	3718      	adds	r7, #24
 801455c:	46bd      	mov	sp, r7
 801455e:	bd80      	pop	{r7, pc}
 8014560:	240042ac 	.word	0x240042ac
 8014564:	2400428c 	.word	0x2400428c
 8014568:	24003db4 	.word	0x24003db4
 801456c:	24004244 	.word	0x24004244
 8014570:	24003db0 	.word	0x24003db0
 8014574:	24004298 	.word	0x24004298

08014578 <vTaskSetTimeOutState>:
	}
}
/*-----------------------------------------------------------*/

void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 8014578:	b580      	push	{r7, lr}
 801457a:	b084      	sub	sp, #16
 801457c:	af00      	add	r7, sp, #0
 801457e:	6078      	str	r0, [r7, #4]
	configASSERT( pxTimeOut );
 8014580:	687b      	ldr	r3, [r7, #4]
 8014582:	2b00      	cmp	r3, #0
 8014584:	d10b      	bne.n	801459e <vTaskSetTimeOutState+0x26>
	__asm volatile
 8014586:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801458a:	f383 8811 	msr	BASEPRI, r3
 801458e:	f3bf 8f6f 	isb	sy
 8014592:	f3bf 8f4f 	dsb	sy
 8014596:	60fb      	str	r3, [r7, #12]
}
 8014598:	bf00      	nop
 801459a:	bf00      	nop
 801459c:	e7fd      	b.n	801459a <vTaskSetTimeOutState+0x22>
	taskENTER_CRITICAL();
 801459e:	f001 fb0b 	bl	8015bb8 <vPortEnterCritical>
	{
		pxTimeOut->xOverflowCount = xNumOfOverflows;
 80145a2:	4b07      	ldr	r3, [pc, #28]	@ (80145c0 <vTaskSetTimeOutState+0x48>)
 80145a4:	681a      	ldr	r2, [r3, #0]
 80145a6:	687b      	ldr	r3, [r7, #4]
 80145a8:	601a      	str	r2, [r3, #0]
		pxTimeOut->xTimeOnEntering = xTickCount;
 80145aa:	4b06      	ldr	r3, [pc, #24]	@ (80145c4 <vTaskSetTimeOutState+0x4c>)
 80145ac:	681a      	ldr	r2, [r3, #0]
 80145ae:	687b      	ldr	r3, [r7, #4]
 80145b0:	605a      	str	r2, [r3, #4]
	}
	taskEXIT_CRITICAL();
 80145b2:	f001 fb33 	bl	8015c1c <vPortExitCritical>
}
 80145b6:	bf00      	nop
 80145b8:	3710      	adds	r7, #16
 80145ba:	46bd      	mov	sp, r7
 80145bc:	bd80      	pop	{r7, pc}
 80145be:	bf00      	nop
 80145c0:	2400429c 	.word	0x2400429c
 80145c4:	24004288 	.word	0x24004288

080145c8 <vTaskInternalSetTimeOutState>:
/*-----------------------------------------------------------*/

void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
{
 80145c8:	b480      	push	{r7}
 80145ca:	b083      	sub	sp, #12
 80145cc:	af00      	add	r7, sp, #0
 80145ce:	6078      	str	r0, [r7, #4]
	/* For internal use only as it does not use a critical section. */
	pxTimeOut->xOverflowCount = xNumOfOverflows;
 80145d0:	4b06      	ldr	r3, [pc, #24]	@ (80145ec <vTaskInternalSetTimeOutState+0x24>)
 80145d2:	681a      	ldr	r2, [r3, #0]
 80145d4:	687b      	ldr	r3, [r7, #4]
 80145d6:	601a      	str	r2, [r3, #0]
	pxTimeOut->xTimeOnEntering = xTickCount;
 80145d8:	4b05      	ldr	r3, [pc, #20]	@ (80145f0 <vTaskInternalSetTimeOutState+0x28>)
 80145da:	681a      	ldr	r2, [r3, #0]
 80145dc:	687b      	ldr	r3, [r7, #4]
 80145de:	605a      	str	r2, [r3, #4]
}
 80145e0:	bf00      	nop
 80145e2:	370c      	adds	r7, #12
 80145e4:	46bd      	mov	sp, r7
 80145e6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80145ea:	4770      	bx	lr
 80145ec:	2400429c 	.word	0x2400429c
 80145f0:	24004288 	.word	0x24004288

080145f4 <xTaskCheckForTimeOut>:
/*-----------------------------------------------------------*/

BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
{
 80145f4:	b580      	push	{r7, lr}
 80145f6:	b088      	sub	sp, #32
 80145f8:	af00      	add	r7, sp, #0
 80145fa:	6078      	str	r0, [r7, #4]
 80145fc:	6039      	str	r1, [r7, #0]
BaseType_t xReturn;

	configASSERT( pxTimeOut );
 80145fe:	687b      	ldr	r3, [r7, #4]
 8014600:	2b00      	cmp	r3, #0
 8014602:	d10b      	bne.n	801461c <xTaskCheckForTimeOut+0x28>
	__asm volatile
 8014604:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014608:	f383 8811 	msr	BASEPRI, r3
 801460c:	f3bf 8f6f 	isb	sy
 8014610:	f3bf 8f4f 	dsb	sy
 8014614:	613b      	str	r3, [r7, #16]
}
 8014616:	bf00      	nop
 8014618:	bf00      	nop
 801461a:	e7fd      	b.n	8014618 <xTaskCheckForTimeOut+0x24>
	configASSERT( pxTicksToWait );
 801461c:	683b      	ldr	r3, [r7, #0]
 801461e:	2b00      	cmp	r3, #0
 8014620:	d10b      	bne.n	801463a <xTaskCheckForTimeOut+0x46>
	__asm volatile
 8014622:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014626:	f383 8811 	msr	BASEPRI, r3
 801462a:	f3bf 8f6f 	isb	sy
 801462e:	f3bf 8f4f 	dsb	sy
 8014632:	60fb      	str	r3, [r7, #12]
}
 8014634:	bf00      	nop
 8014636:	bf00      	nop
 8014638:	e7fd      	b.n	8014636 <xTaskCheckForTimeOut+0x42>

	taskENTER_CRITICAL();
 801463a:	f001 fabd 	bl	8015bb8 <vPortEnterCritical>
	{
		/* Minor optimisation.  The tick count cannot change in this block. */
		const TickType_t xConstTickCount = xTickCount;
 801463e:	4b1d      	ldr	r3, [pc, #116]	@ (80146b4 <xTaskCheckForTimeOut+0xc0>)
 8014640:	681b      	ldr	r3, [r3, #0]
 8014642:	61bb      	str	r3, [r7, #24]
		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
 8014644:	687b      	ldr	r3, [r7, #4]
 8014646:	685b      	ldr	r3, [r3, #4]
 8014648:	69ba      	ldr	r2, [r7, #24]
 801464a:	1ad3      	subs	r3, r2, r3
 801464c:	617b      	str	r3, [r7, #20]
			}
			else
		#endif

		#if ( INCLUDE_vTaskSuspend == 1 )
			if( *pxTicksToWait == portMAX_DELAY )
 801464e:	683b      	ldr	r3, [r7, #0]
 8014650:	681b      	ldr	r3, [r3, #0]
 8014652:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8014656:	d102      	bne.n	801465e <xTaskCheckForTimeOut+0x6a>
			{
				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
				specified is the maximum block time then the task should block
				indefinitely, and therefore never time out. */
				xReturn = pdFALSE;
 8014658:	2300      	movs	r3, #0
 801465a:	61fb      	str	r3, [r7, #28]
 801465c:	e023      	b.n	80146a6 <xTaskCheckForTimeOut+0xb2>
			}
			else
		#endif

		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
 801465e:	687b      	ldr	r3, [r7, #4]
 8014660:	681a      	ldr	r2, [r3, #0]
 8014662:	4b15      	ldr	r3, [pc, #84]	@ (80146b8 <xTaskCheckForTimeOut+0xc4>)
 8014664:	681b      	ldr	r3, [r3, #0]
 8014666:	429a      	cmp	r2, r3
 8014668:	d007      	beq.n	801467a <xTaskCheckForTimeOut+0x86>
 801466a:	687b      	ldr	r3, [r7, #4]
 801466c:	685b      	ldr	r3, [r3, #4]
 801466e:	69ba      	ldr	r2, [r7, #24]
 8014670:	429a      	cmp	r2, r3
 8014672:	d302      	bcc.n	801467a <xTaskCheckForTimeOut+0x86>
			/* The tick count is greater than the time at which
			vTaskSetTimeout() was called, but has also overflowed since
			vTaskSetTimeOut() was called.  It must have wrapped all the way
			around and gone past again. This passed since vTaskSetTimeout()
			was called. */
			xReturn = pdTRUE;
 8014674:	2301      	movs	r3, #1
 8014676:	61fb      	str	r3, [r7, #28]
 8014678:	e015      	b.n	80146a6 <xTaskCheckForTimeOut+0xb2>
		}
		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
 801467a:	683b      	ldr	r3, [r7, #0]
 801467c:	681b      	ldr	r3, [r3, #0]
 801467e:	697a      	ldr	r2, [r7, #20]
 8014680:	429a      	cmp	r2, r3
 8014682:	d20b      	bcs.n	801469c <xTaskCheckForTimeOut+0xa8>
		{
			/* Not a genuine timeout. Adjust parameters for time remaining. */
			*pxTicksToWait -= xElapsedTime;
 8014684:	683b      	ldr	r3, [r7, #0]
 8014686:	681a      	ldr	r2, [r3, #0]
 8014688:	697b      	ldr	r3, [r7, #20]
 801468a:	1ad2      	subs	r2, r2, r3
 801468c:	683b      	ldr	r3, [r7, #0]
 801468e:	601a      	str	r2, [r3, #0]
			vTaskInternalSetTimeOutState( pxTimeOut );
 8014690:	6878      	ldr	r0, [r7, #4]
 8014692:	f7ff ff99 	bl	80145c8 <vTaskInternalSetTimeOutState>
			xReturn = pdFALSE;
 8014696:	2300      	movs	r3, #0
 8014698:	61fb      	str	r3, [r7, #28]
 801469a:	e004      	b.n	80146a6 <xTaskCheckForTimeOut+0xb2>
		}
		else
		{
			*pxTicksToWait = 0;
 801469c:	683b      	ldr	r3, [r7, #0]
 801469e:	2200      	movs	r2, #0
 80146a0:	601a      	str	r2, [r3, #0]
			xReturn = pdTRUE;
 80146a2:	2301      	movs	r3, #1
 80146a4:	61fb      	str	r3, [r7, #28]
		}
	}
	taskEXIT_CRITICAL();
 80146a6:	f001 fab9 	bl	8015c1c <vPortExitCritical>

	return xReturn;
 80146aa:	69fb      	ldr	r3, [r7, #28]
}
 80146ac:	4618      	mov	r0, r3
 80146ae:	3720      	adds	r7, #32
 80146b0:	46bd      	mov	sp, r7
 80146b2:	bd80      	pop	{r7, pc}
 80146b4:	24004288 	.word	0x24004288
 80146b8:	2400429c 	.word	0x2400429c

080146bc <vTaskMissedYield>:
/*-----------------------------------------------------------*/

void vTaskMissedYield( void )
{
 80146bc:	b480      	push	{r7}
 80146be:	af00      	add	r7, sp, #0
	xYieldPending = pdTRUE;
 80146c0:	4b03      	ldr	r3, [pc, #12]	@ (80146d0 <vTaskMissedYield+0x14>)
 80146c2:	2201      	movs	r2, #1
 80146c4:	601a      	str	r2, [r3, #0]
}
 80146c6:	bf00      	nop
 80146c8:	46bd      	mov	sp, r7
 80146ca:	f85d 7b04 	ldr.w	r7, [sp], #4
 80146ce:	4770      	bx	lr
 80146d0:	24004298 	.word	0x24004298

080146d4 <prvIdleTask>:
 *
 * void prvIdleTask( void *pvParameters );
 *
 */
static portTASK_FUNCTION( prvIdleTask, pvParameters )
{
 80146d4:	b580      	push	{r7, lr}
 80146d6:	b082      	sub	sp, #8
 80146d8:	af00      	add	r7, sp, #0
 80146da:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* See if any tasks have deleted themselves - if so then the idle task
		is responsible for freeing the deleted task's TCB and stack. */
		prvCheckTasksWaitingTermination();
 80146dc:	f000 f852 	bl	8014784 <prvCheckTasksWaitingTermination>

			A critical region is not required here as we are just reading from
			the list, and an occasional incorrect value will not matter.  If
			the ready list at the idle priority contains more than one task
			then a task other than the idle task is ready to execute. */
			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
 80146e0:	4b06      	ldr	r3, [pc, #24]	@ (80146fc <prvIdleTask+0x28>)
 80146e2:	681b      	ldr	r3, [r3, #0]
 80146e4:	2b01      	cmp	r3, #1
 80146e6:	d9f9      	bls.n	80146dc <prvIdleTask+0x8>
			{
				taskYIELD();
 80146e8:	4b05      	ldr	r3, [pc, #20]	@ (8014700 <prvIdleTask+0x2c>)
 80146ea:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 80146ee:	601a      	str	r2, [r3, #0]
 80146f0:	f3bf 8f4f 	dsb	sy
 80146f4:	f3bf 8f6f 	isb	sy
		prvCheckTasksWaitingTermination();
 80146f8:	e7f0      	b.n	80146dc <prvIdleTask+0x8>
 80146fa:	bf00      	nop
 80146fc:	24003db4 	.word	0x24003db4
 8014700:	e000ed04 	.word	0xe000ed04

08014704 <prvInitialiseTaskLists>:

#endif /* portUSING_MPU_WRAPPERS */
/*-----------------------------------------------------------*/

static void prvInitialiseTaskLists( void )
{
 8014704:	b580      	push	{r7, lr}
 8014706:	b082      	sub	sp, #8
 8014708:	af00      	add	r7, sp, #0
UBaseType_t uxPriority;

	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 801470a:	2300      	movs	r3, #0
 801470c:	607b      	str	r3, [r7, #4]
 801470e:	e00c      	b.n	801472a <prvInitialiseTaskLists+0x26>
	{
		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
 8014710:	687a      	ldr	r2, [r7, #4]
 8014712:	4613      	mov	r3, r2
 8014714:	009b      	lsls	r3, r3, #2
 8014716:	4413      	add	r3, r2
 8014718:	009b      	lsls	r3, r3, #2
 801471a:	4a12      	ldr	r2, [pc, #72]	@ (8014764 <prvInitialiseTaskLists+0x60>)
 801471c:	4413      	add	r3, r2
 801471e:	4618      	mov	r0, r3
 8014720:	f7fd fca6 	bl	8012070 <vListInitialise>
	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
 8014724:	687b      	ldr	r3, [r7, #4]
 8014726:	3301      	adds	r3, #1
 8014728:	607b      	str	r3, [r7, #4]
 801472a:	687b      	ldr	r3, [r7, #4]
 801472c:	2b37      	cmp	r3, #55	@ 0x37
 801472e:	d9ef      	bls.n	8014710 <prvInitialiseTaskLists+0xc>
	}

	vListInitialise( &xDelayedTaskList1 );
 8014730:	480d      	ldr	r0, [pc, #52]	@ (8014768 <prvInitialiseTaskLists+0x64>)
 8014732:	f7fd fc9d 	bl	8012070 <vListInitialise>
	vListInitialise( &xDelayedTaskList2 );
 8014736:	480d      	ldr	r0, [pc, #52]	@ (801476c <prvInitialiseTaskLists+0x68>)
 8014738:	f7fd fc9a 	bl	8012070 <vListInitialise>
	vListInitialise( &xPendingReadyList );
 801473c:	480c      	ldr	r0, [pc, #48]	@ (8014770 <prvInitialiseTaskLists+0x6c>)
 801473e:	f7fd fc97 	bl	8012070 <vListInitialise>

	#if ( INCLUDE_vTaskDelete == 1 )
	{
		vListInitialise( &xTasksWaitingTermination );
 8014742:	480c      	ldr	r0, [pc, #48]	@ (8014774 <prvInitialiseTaskLists+0x70>)
 8014744:	f7fd fc94 	bl	8012070 <vListInitialise>
	}
	#endif /* INCLUDE_vTaskDelete */

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		vListInitialise( &xSuspendedTaskList );
 8014748:	480b      	ldr	r0, [pc, #44]	@ (8014778 <prvInitialiseTaskLists+0x74>)
 801474a:	f7fd fc91 	bl	8012070 <vListInitialise>
	}
	#endif /* INCLUDE_vTaskSuspend */

	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
	using list2. */
	pxDelayedTaskList = &xDelayedTaskList1;
 801474e:	4b0b      	ldr	r3, [pc, #44]	@ (801477c <prvInitialiseTaskLists+0x78>)
 8014750:	4a05      	ldr	r2, [pc, #20]	@ (8014768 <prvInitialiseTaskLists+0x64>)
 8014752:	601a      	str	r2, [r3, #0]
	pxOverflowDelayedTaskList = &xDelayedTaskList2;
 8014754:	4b0a      	ldr	r3, [pc, #40]	@ (8014780 <prvInitialiseTaskLists+0x7c>)
 8014756:	4a05      	ldr	r2, [pc, #20]	@ (801476c <prvInitialiseTaskLists+0x68>)
 8014758:	601a      	str	r2, [r3, #0]
}
 801475a:	bf00      	nop
 801475c:	3708      	adds	r7, #8
 801475e:	46bd      	mov	sp, r7
 8014760:	bd80      	pop	{r7, pc}
 8014762:	bf00      	nop
 8014764:	24003db4 	.word	0x24003db4
 8014768:	24004214 	.word	0x24004214
 801476c:	24004228 	.word	0x24004228
 8014770:	24004244 	.word	0x24004244
 8014774:	24004258 	.word	0x24004258
 8014778:	24004270 	.word	0x24004270
 801477c:	2400423c 	.word	0x2400423c
 8014780:	24004240 	.word	0x24004240

08014784 <prvCheckTasksWaitingTermination>:
/*-----------------------------------------------------------*/

static void prvCheckTasksWaitingTermination( void )
{
 8014784:	b580      	push	{r7, lr}
 8014786:	b082      	sub	sp, #8
 8014788:	af00      	add	r7, sp, #0
	{
		TCB_t *pxTCB;

		/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
		being called too often in the idle task. */
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 801478a:	e019      	b.n	80147c0 <prvCheckTasksWaitingTermination+0x3c>
		{
			taskENTER_CRITICAL();
 801478c:	f001 fa14 	bl	8015bb8 <vPortEnterCritical>
			{
				pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8014790:	4b10      	ldr	r3, [pc, #64]	@ (80147d4 <prvCheckTasksWaitingTermination+0x50>)
 8014792:	68db      	ldr	r3, [r3, #12]
 8014794:	68db      	ldr	r3, [r3, #12]
 8014796:	607b      	str	r3, [r7, #4]
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8014798:	687b      	ldr	r3, [r7, #4]
 801479a:	3304      	adds	r3, #4
 801479c:	4618      	mov	r0, r3
 801479e:	f7fd fcf1 	bl	8012184 <uxListRemove>
				--uxCurrentNumberOfTasks;
 80147a2:	4b0d      	ldr	r3, [pc, #52]	@ (80147d8 <prvCheckTasksWaitingTermination+0x54>)
 80147a4:	681b      	ldr	r3, [r3, #0]
 80147a6:	3b01      	subs	r3, #1
 80147a8:	4a0b      	ldr	r2, [pc, #44]	@ (80147d8 <prvCheckTasksWaitingTermination+0x54>)
 80147aa:	6013      	str	r3, [r2, #0]
				--uxDeletedTasksWaitingCleanUp;
 80147ac:	4b0b      	ldr	r3, [pc, #44]	@ (80147dc <prvCheckTasksWaitingTermination+0x58>)
 80147ae:	681b      	ldr	r3, [r3, #0]
 80147b0:	3b01      	subs	r3, #1
 80147b2:	4a0a      	ldr	r2, [pc, #40]	@ (80147dc <prvCheckTasksWaitingTermination+0x58>)
 80147b4:	6013      	str	r3, [r2, #0]
			}
			taskEXIT_CRITICAL();
 80147b6:	f001 fa31 	bl	8015c1c <vPortExitCritical>

			prvDeleteTCB( pxTCB );
 80147ba:	6878      	ldr	r0, [r7, #4]
 80147bc:	f000 f810 	bl	80147e0 <prvDeleteTCB>
		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
 80147c0:	4b06      	ldr	r3, [pc, #24]	@ (80147dc <prvCheckTasksWaitingTermination+0x58>)
 80147c2:	681b      	ldr	r3, [r3, #0]
 80147c4:	2b00      	cmp	r3, #0
 80147c6:	d1e1      	bne.n	801478c <prvCheckTasksWaitingTermination+0x8>
		}
	}
	#endif /* INCLUDE_vTaskDelete */
}
 80147c8:	bf00      	nop
 80147ca:	bf00      	nop
 80147cc:	3708      	adds	r7, #8
 80147ce:	46bd      	mov	sp, r7
 80147d0:	bd80      	pop	{r7, pc}
 80147d2:	bf00      	nop
 80147d4:	24004258 	.word	0x24004258
 80147d8:	24004284 	.word	0x24004284
 80147dc:	2400426c 	.word	0x2400426c

080147e0 <prvDeleteTCB>:
/*-----------------------------------------------------------*/

#if ( INCLUDE_vTaskDelete == 1 )

	static void prvDeleteTCB( TCB_t *pxTCB )
	{
 80147e0:	b580      	push	{r7, lr}
 80147e2:	b084      	sub	sp, #16
 80147e4:	af00      	add	r7, sp, #0
 80147e6:	6078      	str	r0, [r7, #4]
		to the task to free any memory allocated at the application level.
		See the third party link http://www.nadler.com/embedded/newlibAndFreeRTOS.html
		for additional information. */
		#if ( configUSE_NEWLIB_REENTRANT == 1 )
		{
			_reclaim_reent( &( pxTCB->xNewLib_reent ) );
 80147e8:	687b      	ldr	r3, [r7, #4]
 80147ea:	3354      	adds	r3, #84	@ 0x54
 80147ec:	4618      	mov	r0, r3
 80147ee:	f016 faf5 	bl	802addc <_reclaim_reent>
		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
		{
			/* The task could have been allocated statically or dynamically, so
			check what was statically allocated before trying to free the
			memory. */
			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
 80147f2:	687b      	ldr	r3, [r7, #4]
 80147f4:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 80147f8:	2b00      	cmp	r3, #0
 80147fa:	d108      	bne.n	801480e <prvDeleteTCB+0x2e>
			{
				/* Both the stack and TCB were allocated dynamically, so both
				must be freed. */
				vPortFree( pxTCB->pxStack );
 80147fc:	687b      	ldr	r3, [r7, #4]
 80147fe:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8014800:	4618      	mov	r0, r3
 8014802:	f001 fbc9 	bl	8015f98 <vPortFree>
				vPortFree( pxTCB );
 8014806:	6878      	ldr	r0, [r7, #4]
 8014808:	f001 fbc6 	bl	8015f98 <vPortFree>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
				mtCOVERAGE_TEST_MARKER();
			}
		}
		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
	}
 801480c:	e019      	b.n	8014842 <prvDeleteTCB+0x62>
			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
 801480e:	687b      	ldr	r3, [r7, #4]
 8014810:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8014814:	2b01      	cmp	r3, #1
 8014816:	d103      	bne.n	8014820 <prvDeleteTCB+0x40>
				vPortFree( pxTCB );
 8014818:	6878      	ldr	r0, [r7, #4]
 801481a:	f001 fbbd 	bl	8015f98 <vPortFree>
	}
 801481e:	e010      	b.n	8014842 <prvDeleteTCB+0x62>
				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
 8014820:	687b      	ldr	r3, [r7, #4]
 8014822:	f893 30a5 	ldrb.w	r3, [r3, #165]	@ 0xa5
 8014826:	2b02      	cmp	r3, #2
 8014828:	d00b      	beq.n	8014842 <prvDeleteTCB+0x62>
	__asm volatile
 801482a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801482e:	f383 8811 	msr	BASEPRI, r3
 8014832:	f3bf 8f6f 	isb	sy
 8014836:	f3bf 8f4f 	dsb	sy
 801483a:	60fb      	str	r3, [r7, #12]
}
 801483c:	bf00      	nop
 801483e:	bf00      	nop
 8014840:	e7fd      	b.n	801483e <prvDeleteTCB+0x5e>
	}
 8014842:	bf00      	nop
 8014844:	3710      	adds	r7, #16
 8014846:	46bd      	mov	sp, r7
 8014848:	bd80      	pop	{r7, pc}
	...

0801484c <prvResetNextTaskUnblockTime>:

#endif /* INCLUDE_vTaskDelete */
/*-----------------------------------------------------------*/

static void prvResetNextTaskUnblockTime( void )
{
 801484c:	b480      	push	{r7}
 801484e:	b083      	sub	sp, #12
 8014850:	af00      	add	r7, sp, #0
TCB_t *pxTCB;

	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
 8014852:	4b0c      	ldr	r3, [pc, #48]	@ (8014884 <prvResetNextTaskUnblockTime+0x38>)
 8014854:	681b      	ldr	r3, [r3, #0]
 8014856:	681b      	ldr	r3, [r3, #0]
 8014858:	2b00      	cmp	r3, #0
 801485a:	d104      	bne.n	8014866 <prvResetNextTaskUnblockTime+0x1a>
	{
		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
		the maximum possible value so it is	extremely unlikely that the
		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
		there is an item in the delayed list. */
		xNextTaskUnblockTime = portMAX_DELAY;
 801485c:	4b0a      	ldr	r3, [pc, #40]	@ (8014888 <prvResetNextTaskUnblockTime+0x3c>)
 801485e:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8014862:	601a      	str	r2, [r3, #0]
		which the task at the head of the delayed list should be removed
		from the Blocked state. */
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
	}
}
 8014864:	e008      	b.n	8014878 <prvResetNextTaskUnblockTime+0x2c>
		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8014866:	4b07      	ldr	r3, [pc, #28]	@ (8014884 <prvResetNextTaskUnblockTime+0x38>)
 8014868:	681b      	ldr	r3, [r3, #0]
 801486a:	68db      	ldr	r3, [r3, #12]
 801486c:	68db      	ldr	r3, [r3, #12]
 801486e:	607b      	str	r3, [r7, #4]
		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
 8014870:	687b      	ldr	r3, [r7, #4]
 8014872:	685b      	ldr	r3, [r3, #4]
 8014874:	4a04      	ldr	r2, [pc, #16]	@ (8014888 <prvResetNextTaskUnblockTime+0x3c>)
 8014876:	6013      	str	r3, [r2, #0]
}
 8014878:	bf00      	nop
 801487a:	370c      	adds	r7, #12
 801487c:	46bd      	mov	sp, r7
 801487e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014882:	4770      	bx	lr
 8014884:	2400423c 	.word	0x2400423c
 8014888:	240042a4 	.word	0x240042a4

0801488c <xTaskGetCurrentTaskHandle>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )

	TaskHandle_t xTaskGetCurrentTaskHandle( void )
	{
 801488c:	b480      	push	{r7}
 801488e:	b083      	sub	sp, #12
 8014890:	af00      	add	r7, sp, #0
	TaskHandle_t xReturn;

		/* A critical section is not required as this is not called from
		an interrupt and the current TCB will always be the same for any
		individual execution thread. */
		xReturn = pxCurrentTCB;
 8014892:	4b05      	ldr	r3, [pc, #20]	@ (80148a8 <xTaskGetCurrentTaskHandle+0x1c>)
 8014894:	681b      	ldr	r3, [r3, #0]
 8014896:	607b      	str	r3, [r7, #4]

		return xReturn;
 8014898:	687b      	ldr	r3, [r7, #4]
	}
 801489a:	4618      	mov	r0, r3
 801489c:	370c      	adds	r7, #12
 801489e:	46bd      	mov	sp, r7
 80148a0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80148a4:	4770      	bx	lr
 80148a6:	bf00      	nop
 80148a8:	24003db0 	.word	0x24003db0

080148ac <xTaskGetSchedulerState>:
/*-----------------------------------------------------------*/

#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )

	BaseType_t xTaskGetSchedulerState( void )
	{
 80148ac:	b480      	push	{r7}
 80148ae:	b083      	sub	sp, #12
 80148b0:	af00      	add	r7, sp, #0
	BaseType_t xReturn;

		if( xSchedulerRunning == pdFALSE )
 80148b2:	4b0b      	ldr	r3, [pc, #44]	@ (80148e0 <xTaskGetSchedulerState+0x34>)
 80148b4:	681b      	ldr	r3, [r3, #0]
 80148b6:	2b00      	cmp	r3, #0
 80148b8:	d102      	bne.n	80148c0 <xTaskGetSchedulerState+0x14>
		{
			xReturn = taskSCHEDULER_NOT_STARTED;
 80148ba:	2301      	movs	r3, #1
 80148bc:	607b      	str	r3, [r7, #4]
 80148be:	e008      	b.n	80148d2 <xTaskGetSchedulerState+0x26>
		}
		else
		{
			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 80148c0:	4b08      	ldr	r3, [pc, #32]	@ (80148e4 <xTaskGetSchedulerState+0x38>)
 80148c2:	681b      	ldr	r3, [r3, #0]
 80148c4:	2b00      	cmp	r3, #0
 80148c6:	d102      	bne.n	80148ce <xTaskGetSchedulerState+0x22>
			{
				xReturn = taskSCHEDULER_RUNNING;
 80148c8:	2302      	movs	r3, #2
 80148ca:	607b      	str	r3, [r7, #4]
 80148cc:	e001      	b.n	80148d2 <xTaskGetSchedulerState+0x26>
			}
			else
			{
				xReturn = taskSCHEDULER_SUSPENDED;
 80148ce:	2300      	movs	r3, #0
 80148d0:	607b      	str	r3, [r7, #4]
			}
		}

		return xReturn;
 80148d2:	687b      	ldr	r3, [r7, #4]
	}
 80148d4:	4618      	mov	r0, r3
 80148d6:	370c      	adds	r7, #12
 80148d8:	46bd      	mov	sp, r7
 80148da:	f85d 7b04 	ldr.w	r7, [sp], #4
 80148de:	4770      	bx	lr
 80148e0:	24004290 	.word	0x24004290
 80148e4:	240042ac 	.word	0x240042ac

080148e8 <xTaskPriorityInherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
	{
 80148e8:	b580      	push	{r7, lr}
 80148ea:	b084      	sub	sp, #16
 80148ec:	af00      	add	r7, sp, #0
 80148ee:	6078      	str	r0, [r7, #4]
	TCB_t * const pxMutexHolderTCB = pxMutexHolder;
 80148f0:	687b      	ldr	r3, [r7, #4]
 80148f2:	60bb      	str	r3, [r7, #8]
	BaseType_t xReturn = pdFALSE;
 80148f4:	2300      	movs	r3, #0
 80148f6:	60fb      	str	r3, [r7, #12]

		/* If the mutex was given back by an interrupt while the queue was
		locked then the mutex holder might now be NULL.  _RB_ Is this still
		needed as interrupts can no longer use mutexes? */
		if( pxMutexHolder != NULL )
 80148f8:	687b      	ldr	r3, [r7, #4]
 80148fa:	2b00      	cmp	r3, #0
 80148fc:	d051      	beq.n	80149a2 <xTaskPriorityInherit+0xba>
		{
			/* If the holder of the mutex has a priority below the priority of
			the task attempting to obtain the mutex then it will temporarily
			inherit the priority of the task attempting to obtain the mutex. */
			if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
 80148fe:	68bb      	ldr	r3, [r7, #8]
 8014900:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014902:	4b2a      	ldr	r3, [pc, #168]	@ (80149ac <xTaskPriorityInherit+0xc4>)
 8014904:	681b      	ldr	r3, [r3, #0]
 8014906:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014908:	429a      	cmp	r2, r3
 801490a:	d241      	bcs.n	8014990 <xTaskPriorityInherit+0xa8>
			{
				/* Adjust the mutex holder state to account for its new
				priority.  Only reset the event list item value if the value is
				not being used for anything else. */
				if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 801490c:	68bb      	ldr	r3, [r7, #8]
 801490e:	699b      	ldr	r3, [r3, #24]
 8014910:	2b00      	cmp	r3, #0
 8014912:	db06      	blt.n	8014922 <xTaskPriorityInherit+0x3a>
				{
					listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8014914:	4b25      	ldr	r3, [pc, #148]	@ (80149ac <xTaskPriorityInherit+0xc4>)
 8014916:	681b      	ldr	r3, [r3, #0]
 8014918:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801491a:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 801491e:	68bb      	ldr	r3, [r7, #8]
 8014920:	619a      	str	r2, [r3, #24]
					mtCOVERAGE_TEST_MARKER();
				}

				/* If the task being modified is in the ready state it will need
				to be moved into a new list. */
				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
 8014922:	68bb      	ldr	r3, [r7, #8]
 8014924:	6959      	ldr	r1, [r3, #20]
 8014926:	68bb      	ldr	r3, [r7, #8]
 8014928:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801492a:	4613      	mov	r3, r2
 801492c:	009b      	lsls	r3, r3, #2
 801492e:	4413      	add	r3, r2
 8014930:	009b      	lsls	r3, r3, #2
 8014932:	4a1f      	ldr	r2, [pc, #124]	@ (80149b0 <xTaskPriorityInherit+0xc8>)
 8014934:	4413      	add	r3, r2
 8014936:	4299      	cmp	r1, r3
 8014938:	d122      	bne.n	8014980 <xTaskPriorityInherit+0x98>
				{
					if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 801493a:	68bb      	ldr	r3, [r7, #8]
 801493c:	3304      	adds	r3, #4
 801493e:	4618      	mov	r0, r3
 8014940:	f7fd fc20 	bl	8012184 <uxListRemove>
					{
						mtCOVERAGE_TEST_MARKER();
					}

					/* Inherit the priority before being moved into the new list. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 8014944:	4b19      	ldr	r3, [pc, #100]	@ (80149ac <xTaskPriorityInherit+0xc4>)
 8014946:	681b      	ldr	r3, [r3, #0]
 8014948:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801494a:	68bb      	ldr	r3, [r7, #8]
 801494c:	62da      	str	r2, [r3, #44]	@ 0x2c
					prvAddTaskToReadyList( pxMutexHolderTCB );
 801494e:	68bb      	ldr	r3, [r7, #8]
 8014950:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014952:	4b18      	ldr	r3, [pc, #96]	@ (80149b4 <xTaskPriorityInherit+0xcc>)
 8014954:	681b      	ldr	r3, [r3, #0]
 8014956:	429a      	cmp	r2, r3
 8014958:	d903      	bls.n	8014962 <xTaskPriorityInherit+0x7a>
 801495a:	68bb      	ldr	r3, [r7, #8]
 801495c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801495e:	4a15      	ldr	r2, [pc, #84]	@ (80149b4 <xTaskPriorityInherit+0xcc>)
 8014960:	6013      	str	r3, [r2, #0]
 8014962:	68bb      	ldr	r3, [r7, #8]
 8014964:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014966:	4613      	mov	r3, r2
 8014968:	009b      	lsls	r3, r3, #2
 801496a:	4413      	add	r3, r2
 801496c:	009b      	lsls	r3, r3, #2
 801496e:	4a10      	ldr	r2, [pc, #64]	@ (80149b0 <xTaskPriorityInherit+0xc8>)
 8014970:	441a      	add	r2, r3
 8014972:	68bb      	ldr	r3, [r7, #8]
 8014974:	3304      	adds	r3, #4
 8014976:	4619      	mov	r1, r3
 8014978:	4610      	mov	r0, r2
 801497a:	f7fd fba6 	bl	80120ca <vListInsertEnd>
 801497e:	e004      	b.n	801498a <xTaskPriorityInherit+0xa2>
				}
				else
				{
					/* Just inherit the priority. */
					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
 8014980:	4b0a      	ldr	r3, [pc, #40]	@ (80149ac <xTaskPriorityInherit+0xc4>)
 8014982:	681b      	ldr	r3, [r3, #0]
 8014984:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014986:	68bb      	ldr	r3, [r7, #8]
 8014988:	62da      	str	r2, [r3, #44]	@ 0x2c
				}

				traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );

				/* Inheritance occurred. */
				xReturn = pdTRUE;
 801498a:	2301      	movs	r3, #1
 801498c:	60fb      	str	r3, [r7, #12]
 801498e:	e008      	b.n	80149a2 <xTaskPriorityInherit+0xba>
			}
			else
			{
				if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
 8014990:	68bb      	ldr	r3, [r7, #8]
 8014992:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 8014994:	4b05      	ldr	r3, [pc, #20]	@ (80149ac <xTaskPriorityInherit+0xc4>)
 8014996:	681b      	ldr	r3, [r3, #0]
 8014998:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801499a:	429a      	cmp	r2, r3
 801499c:	d201      	bcs.n	80149a2 <xTaskPriorityInherit+0xba>
					current priority of the mutex holder is not lower than the
					priority of the task attempting to take the mutex.
					Therefore the mutex holder must have already inherited a
					priority, but inheritance would have occurred if that had
					not been the case. */
					xReturn = pdTRUE;
 801499e:	2301      	movs	r3, #1
 80149a0:	60fb      	str	r3, [r7, #12]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 80149a2:	68fb      	ldr	r3, [r7, #12]
	}
 80149a4:	4618      	mov	r0, r3
 80149a6:	3710      	adds	r7, #16
 80149a8:	46bd      	mov	sp, r7
 80149aa:	bd80      	pop	{r7, pc}
 80149ac:	24003db0 	.word	0x24003db0
 80149b0:	24003db4 	.word	0x24003db4
 80149b4:	2400428c 	.word	0x2400428c

080149b8 <xTaskPriorityDisinherit>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
	{
 80149b8:	b580      	push	{r7, lr}
 80149ba:	b086      	sub	sp, #24
 80149bc:	af00      	add	r7, sp, #0
 80149be:	6078      	str	r0, [r7, #4]
	TCB_t * const pxTCB = pxMutexHolder;
 80149c0:	687b      	ldr	r3, [r7, #4]
 80149c2:	613b      	str	r3, [r7, #16]
	BaseType_t xReturn = pdFALSE;
 80149c4:	2300      	movs	r3, #0
 80149c6:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 80149c8:	687b      	ldr	r3, [r7, #4]
 80149ca:	2b00      	cmp	r3, #0
 80149cc:	d058      	beq.n	8014a80 <xTaskPriorityDisinherit+0xc8>
		{
			/* A task can only have an inherited priority if it holds the mutex.
			If the mutex is held by a task then it cannot be given from an
			interrupt, and if a mutex is given by the holding task then it must
			be the running state task. */
			configASSERT( pxTCB == pxCurrentTCB );
 80149ce:	4b2f      	ldr	r3, [pc, #188]	@ (8014a8c <xTaskPriorityDisinherit+0xd4>)
 80149d0:	681b      	ldr	r3, [r3, #0]
 80149d2:	693a      	ldr	r2, [r7, #16]
 80149d4:	429a      	cmp	r2, r3
 80149d6:	d00b      	beq.n	80149f0 <xTaskPriorityDisinherit+0x38>
	__asm volatile
 80149d8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80149dc:	f383 8811 	msr	BASEPRI, r3
 80149e0:	f3bf 8f6f 	isb	sy
 80149e4:	f3bf 8f4f 	dsb	sy
 80149e8:	60fb      	str	r3, [r7, #12]
}
 80149ea:	bf00      	nop
 80149ec:	bf00      	nop
 80149ee:	e7fd      	b.n	80149ec <xTaskPriorityDisinherit+0x34>
			configASSERT( pxTCB->uxMutexesHeld );
 80149f0:	693b      	ldr	r3, [r7, #16]
 80149f2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80149f4:	2b00      	cmp	r3, #0
 80149f6:	d10b      	bne.n	8014a10 <xTaskPriorityDisinherit+0x58>
	__asm volatile
 80149f8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80149fc:	f383 8811 	msr	BASEPRI, r3
 8014a00:	f3bf 8f6f 	isb	sy
 8014a04:	f3bf 8f4f 	dsb	sy
 8014a08:	60bb      	str	r3, [r7, #8]
}
 8014a0a:	bf00      	nop
 8014a0c:	bf00      	nop
 8014a0e:	e7fd      	b.n	8014a0c <xTaskPriorityDisinherit+0x54>
			( pxTCB->uxMutexesHeld )--;
 8014a10:	693b      	ldr	r3, [r7, #16]
 8014a12:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8014a14:	1e5a      	subs	r2, r3, #1
 8014a16:	693b      	ldr	r3, [r7, #16]
 8014a18:	651a      	str	r2, [r3, #80]	@ 0x50

			/* Has the holder of the mutex inherited the priority of another
			task? */
			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
 8014a1a:	693b      	ldr	r3, [r7, #16]
 8014a1c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014a1e:	693b      	ldr	r3, [r7, #16]
 8014a20:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8014a22:	429a      	cmp	r2, r3
 8014a24:	d02c      	beq.n	8014a80 <xTaskPriorityDisinherit+0xc8>
			{
				/* Only disinherit if no other mutexes are held. */
				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
 8014a26:	693b      	ldr	r3, [r7, #16]
 8014a28:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8014a2a:	2b00      	cmp	r3, #0
 8014a2c:	d128      	bne.n	8014a80 <xTaskPriorityDisinherit+0xc8>
					/* A task can only have an inherited priority if it holds
					the mutex.  If the mutex is held by a task then it cannot be
					given from an interrupt, and if a mutex is given by the
					holding task then it must be the running state task.  Remove
					the holding task from the ready/delayed list. */
					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8014a2e:	693b      	ldr	r3, [r7, #16]
 8014a30:	3304      	adds	r3, #4
 8014a32:	4618      	mov	r0, r3
 8014a34:	f7fd fba6 	bl	8012184 <uxListRemove>
					}

					/* Disinherit the priority before adding the task into the
					new	ready list. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					pxTCB->uxPriority = pxTCB->uxBasePriority;
 8014a38:	693b      	ldr	r3, [r7, #16]
 8014a3a:	6cda      	ldr	r2, [r3, #76]	@ 0x4c
 8014a3c:	693b      	ldr	r3, [r7, #16]
 8014a3e:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Reset the event list item value.  It cannot be in use for
					any other purpose if this task is running, and it must be
					running to give back the mutex. */
					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8014a40:	693b      	ldr	r3, [r7, #16]
 8014a42:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014a44:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8014a48:	693b      	ldr	r3, [r7, #16]
 8014a4a:	619a      	str	r2, [r3, #24]
					prvAddTaskToReadyList( pxTCB );
 8014a4c:	693b      	ldr	r3, [r7, #16]
 8014a4e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014a50:	4b0f      	ldr	r3, [pc, #60]	@ (8014a90 <xTaskPriorityDisinherit+0xd8>)
 8014a52:	681b      	ldr	r3, [r3, #0]
 8014a54:	429a      	cmp	r2, r3
 8014a56:	d903      	bls.n	8014a60 <xTaskPriorityDisinherit+0xa8>
 8014a58:	693b      	ldr	r3, [r7, #16]
 8014a5a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014a5c:	4a0c      	ldr	r2, [pc, #48]	@ (8014a90 <xTaskPriorityDisinherit+0xd8>)
 8014a5e:	6013      	str	r3, [r2, #0]
 8014a60:	693b      	ldr	r3, [r7, #16]
 8014a62:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014a64:	4613      	mov	r3, r2
 8014a66:	009b      	lsls	r3, r3, #2
 8014a68:	4413      	add	r3, r2
 8014a6a:	009b      	lsls	r3, r3, #2
 8014a6c:	4a09      	ldr	r2, [pc, #36]	@ (8014a94 <xTaskPriorityDisinherit+0xdc>)
 8014a6e:	441a      	add	r2, r3
 8014a70:	693b      	ldr	r3, [r7, #16]
 8014a72:	3304      	adds	r3, #4
 8014a74:	4619      	mov	r1, r3
 8014a76:	4610      	mov	r0, r2
 8014a78:	f7fd fb27 	bl	80120ca <vListInsertEnd>
					in an order different to that in which they were taken.
					If a context switch did not occur when the first mutex was
					returned, even if a task was waiting on it, then a context
					switch should occur when the last mutex is returned whether
					a task is waiting on it or not. */
					xReturn = pdTRUE;
 8014a7c:	2301      	movs	r3, #1
 8014a7e:	617b      	str	r3, [r7, #20]
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}

		return xReturn;
 8014a80:	697b      	ldr	r3, [r7, #20]
	}
 8014a82:	4618      	mov	r0, r3
 8014a84:	3718      	adds	r7, #24
 8014a86:	46bd      	mov	sp, r7
 8014a88:	bd80      	pop	{r7, pc}
 8014a8a:	bf00      	nop
 8014a8c:	24003db0 	.word	0x24003db0
 8014a90:	2400428c 	.word	0x2400428c
 8014a94:	24003db4 	.word	0x24003db4

08014a98 <vTaskPriorityDisinheritAfterTimeout>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
	{
 8014a98:	b580      	push	{r7, lr}
 8014a9a:	b088      	sub	sp, #32
 8014a9c:	af00      	add	r7, sp, #0
 8014a9e:	6078      	str	r0, [r7, #4]
 8014aa0:	6039      	str	r1, [r7, #0]
	TCB_t * const pxTCB = pxMutexHolder;
 8014aa2:	687b      	ldr	r3, [r7, #4]
 8014aa4:	61bb      	str	r3, [r7, #24]
	UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
	const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
 8014aa6:	2301      	movs	r3, #1
 8014aa8:	617b      	str	r3, [r7, #20]

		if( pxMutexHolder != NULL )
 8014aaa:	687b      	ldr	r3, [r7, #4]
 8014aac:	2b00      	cmp	r3, #0
 8014aae:	d06c      	beq.n	8014b8a <vTaskPriorityDisinheritAfterTimeout+0xf2>
		{
			/* If pxMutexHolder is not NULL then the holder must hold at least
			one mutex. */
			configASSERT( pxTCB->uxMutexesHeld );
 8014ab0:	69bb      	ldr	r3, [r7, #24]
 8014ab2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8014ab4:	2b00      	cmp	r3, #0
 8014ab6:	d10b      	bne.n	8014ad0 <vTaskPriorityDisinheritAfterTimeout+0x38>
	__asm volatile
 8014ab8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014abc:	f383 8811 	msr	BASEPRI, r3
 8014ac0:	f3bf 8f6f 	isb	sy
 8014ac4:	f3bf 8f4f 	dsb	sy
 8014ac8:	60fb      	str	r3, [r7, #12]
}
 8014aca:	bf00      	nop
 8014acc:	bf00      	nop
 8014ace:	e7fd      	b.n	8014acc <vTaskPriorityDisinheritAfterTimeout+0x34>

			/* Determine the priority to which the priority of the task that
			holds the mutex should be set.  This will be the greater of the
			holding task's base priority and the priority of the highest
			priority task that is waiting to obtain the mutex. */
			if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
 8014ad0:	69bb      	ldr	r3, [r7, #24]
 8014ad2:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8014ad4:	683a      	ldr	r2, [r7, #0]
 8014ad6:	429a      	cmp	r2, r3
 8014ad8:	d902      	bls.n	8014ae0 <vTaskPriorityDisinheritAfterTimeout+0x48>
			{
				uxPriorityToUse = uxHighestPriorityWaitingTask;
 8014ada:	683b      	ldr	r3, [r7, #0]
 8014adc:	61fb      	str	r3, [r7, #28]
 8014ade:	e002      	b.n	8014ae6 <vTaskPriorityDisinheritAfterTimeout+0x4e>
			}
			else
			{
				uxPriorityToUse = pxTCB->uxBasePriority;
 8014ae0:	69bb      	ldr	r3, [r7, #24]
 8014ae2:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8014ae4:	61fb      	str	r3, [r7, #28]
			}

			/* Does the priority need to change? */
			if( pxTCB->uxPriority != uxPriorityToUse )
 8014ae6:	69bb      	ldr	r3, [r7, #24]
 8014ae8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014aea:	69fa      	ldr	r2, [r7, #28]
 8014aec:	429a      	cmp	r2, r3
 8014aee:	d04c      	beq.n	8014b8a <vTaskPriorityDisinheritAfterTimeout+0xf2>
			{
				/* Only disinherit if no other mutexes are held.  This is a
				simplification in the priority inheritance implementation.  If
				the task that holds the mutex is also holding other mutexes then
				the other mutexes may have caused the priority inheritance. */
				if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
 8014af0:	69bb      	ldr	r3, [r7, #24]
 8014af2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8014af4:	697a      	ldr	r2, [r7, #20]
 8014af6:	429a      	cmp	r2, r3
 8014af8:	d147      	bne.n	8014b8a <vTaskPriorityDisinheritAfterTimeout+0xf2>
				{
					/* If a task has timed out because it already holds the
					mutex it was trying to obtain then it cannot of inherited
					its own priority. */
					configASSERT( pxTCB != pxCurrentTCB );
 8014afa:	4b26      	ldr	r3, [pc, #152]	@ (8014b94 <vTaskPriorityDisinheritAfterTimeout+0xfc>)
 8014afc:	681b      	ldr	r3, [r3, #0]
 8014afe:	69ba      	ldr	r2, [r7, #24]
 8014b00:	429a      	cmp	r2, r3
 8014b02:	d10b      	bne.n	8014b1c <vTaskPriorityDisinheritAfterTimeout+0x84>
	__asm volatile
 8014b04:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014b08:	f383 8811 	msr	BASEPRI, r3
 8014b0c:	f3bf 8f6f 	isb	sy
 8014b10:	f3bf 8f4f 	dsb	sy
 8014b14:	60bb      	str	r3, [r7, #8]
}
 8014b16:	bf00      	nop
 8014b18:	bf00      	nop
 8014b1a:	e7fd      	b.n	8014b18 <vTaskPriorityDisinheritAfterTimeout+0x80>

					/* Disinherit the priority, remembering the previous
					priority to facilitate determining the subject task's
					state. */
					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
					uxPriorityUsedOnEntry = pxTCB->uxPriority;
 8014b1c:	69bb      	ldr	r3, [r7, #24]
 8014b1e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014b20:	613b      	str	r3, [r7, #16]
					pxTCB->uxPriority = uxPriorityToUse;
 8014b22:	69bb      	ldr	r3, [r7, #24]
 8014b24:	69fa      	ldr	r2, [r7, #28]
 8014b26:	62da      	str	r2, [r3, #44]	@ 0x2c

					/* Only reset the event list item value if the value is not
					being used for anything else. */
					if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
 8014b28:	69bb      	ldr	r3, [r7, #24]
 8014b2a:	699b      	ldr	r3, [r3, #24]
 8014b2c:	2b00      	cmp	r3, #0
 8014b2e:	db04      	blt.n	8014b3a <vTaskPriorityDisinheritAfterTimeout+0xa2>
					{
						listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8014b30:	69fb      	ldr	r3, [r7, #28]
 8014b32:	f1c3 0238 	rsb	r2, r3, #56	@ 0x38
 8014b36:	69bb      	ldr	r3, [r7, #24]
 8014b38:	619a      	str	r2, [r3, #24]
					then the task that holds the mutex could be in either the
					Ready, Blocked or Suspended states.  Only remove the task
					from its current state list if it is in the Ready state as
					the task's priority is going to change and there is one
					Ready list per priority. */
					if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
 8014b3a:	69bb      	ldr	r3, [r7, #24]
 8014b3c:	6959      	ldr	r1, [r3, #20]
 8014b3e:	693a      	ldr	r2, [r7, #16]
 8014b40:	4613      	mov	r3, r2
 8014b42:	009b      	lsls	r3, r3, #2
 8014b44:	4413      	add	r3, r2
 8014b46:	009b      	lsls	r3, r3, #2
 8014b48:	4a13      	ldr	r2, [pc, #76]	@ (8014b98 <vTaskPriorityDisinheritAfterTimeout+0x100>)
 8014b4a:	4413      	add	r3, r2
 8014b4c:	4299      	cmp	r1, r3
 8014b4e:	d11c      	bne.n	8014b8a <vTaskPriorityDisinheritAfterTimeout+0xf2>
					{
						if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8014b50:	69bb      	ldr	r3, [r7, #24]
 8014b52:	3304      	adds	r3, #4
 8014b54:	4618      	mov	r0, r3
 8014b56:	f7fd fb15 	bl	8012184 <uxListRemove>
						else
						{
							mtCOVERAGE_TEST_MARKER();
						}

						prvAddTaskToReadyList( pxTCB );
 8014b5a:	69bb      	ldr	r3, [r7, #24]
 8014b5c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014b5e:	4b0f      	ldr	r3, [pc, #60]	@ (8014b9c <vTaskPriorityDisinheritAfterTimeout+0x104>)
 8014b60:	681b      	ldr	r3, [r3, #0]
 8014b62:	429a      	cmp	r2, r3
 8014b64:	d903      	bls.n	8014b6e <vTaskPriorityDisinheritAfterTimeout+0xd6>
 8014b66:	69bb      	ldr	r3, [r7, #24]
 8014b68:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014b6a:	4a0c      	ldr	r2, [pc, #48]	@ (8014b9c <vTaskPriorityDisinheritAfterTimeout+0x104>)
 8014b6c:	6013      	str	r3, [r2, #0]
 8014b6e:	69bb      	ldr	r3, [r7, #24]
 8014b70:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014b72:	4613      	mov	r3, r2
 8014b74:	009b      	lsls	r3, r3, #2
 8014b76:	4413      	add	r3, r2
 8014b78:	009b      	lsls	r3, r3, #2
 8014b7a:	4a07      	ldr	r2, [pc, #28]	@ (8014b98 <vTaskPriorityDisinheritAfterTimeout+0x100>)
 8014b7c:	441a      	add	r2, r3
 8014b7e:	69bb      	ldr	r3, [r7, #24]
 8014b80:	3304      	adds	r3, #4
 8014b82:	4619      	mov	r1, r3
 8014b84:	4610      	mov	r0, r2
 8014b86:	f7fd faa0 	bl	80120ca <vListInsertEnd>
		}
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
 8014b8a:	bf00      	nop
 8014b8c:	3720      	adds	r7, #32
 8014b8e:	46bd      	mov	sp, r7
 8014b90:	bd80      	pop	{r7, pc}
 8014b92:	bf00      	nop
 8014b94:	24003db0 	.word	0x24003db0
 8014b98:	24003db4 	.word	0x24003db4
 8014b9c:	2400428c 	.word	0x2400428c

08014ba0 <pvTaskIncrementMutexHeldCount>:
/*-----------------------------------------------------------*/

#if ( configUSE_MUTEXES == 1 )

	TaskHandle_t pvTaskIncrementMutexHeldCount( void )
	{
 8014ba0:	b480      	push	{r7}
 8014ba2:	af00      	add	r7, sp, #0
		/* If xSemaphoreCreateMutex() is called before any tasks have been created
		then pxCurrentTCB will be NULL. */
		if( pxCurrentTCB != NULL )
 8014ba4:	4b07      	ldr	r3, [pc, #28]	@ (8014bc4 <pvTaskIncrementMutexHeldCount+0x24>)
 8014ba6:	681b      	ldr	r3, [r3, #0]
 8014ba8:	2b00      	cmp	r3, #0
 8014baa:	d004      	beq.n	8014bb6 <pvTaskIncrementMutexHeldCount+0x16>
		{
			( pxCurrentTCB->uxMutexesHeld )++;
 8014bac:	4b05      	ldr	r3, [pc, #20]	@ (8014bc4 <pvTaskIncrementMutexHeldCount+0x24>)
 8014bae:	681b      	ldr	r3, [r3, #0]
 8014bb0:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8014bb2:	3201      	adds	r2, #1
 8014bb4:	651a      	str	r2, [r3, #80]	@ 0x50
		}

		return pxCurrentTCB;
 8014bb6:	4b03      	ldr	r3, [pc, #12]	@ (8014bc4 <pvTaskIncrementMutexHeldCount+0x24>)
 8014bb8:	681b      	ldr	r3, [r3, #0]
	}
 8014bba:	4618      	mov	r0, r3
 8014bbc:	46bd      	mov	sp, r7
 8014bbe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8014bc2:	4770      	bx	lr
 8014bc4:	24003db0 	.word	0x24003db0

08014bc8 <xTaskNotifyWait>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
	{
 8014bc8:	b580      	push	{r7, lr}
 8014bca:	b086      	sub	sp, #24
 8014bcc:	af00      	add	r7, sp, #0
 8014bce:	60f8      	str	r0, [r7, #12]
 8014bd0:	60b9      	str	r1, [r7, #8]
 8014bd2:	607a      	str	r2, [r7, #4]
 8014bd4:	603b      	str	r3, [r7, #0]
	BaseType_t xReturn;

		taskENTER_CRITICAL();
 8014bd6:	f000 ffef 	bl	8015bb8 <vPortEnterCritical>
		{
			/* Only block if a notification is not already pending. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 8014bda:	4b29      	ldr	r3, [pc, #164]	@ (8014c80 <xTaskNotifyWait+0xb8>)
 8014bdc:	681b      	ldr	r3, [r3, #0]
 8014bde:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014be2:	b2db      	uxtb	r3, r3
 8014be4:	2b02      	cmp	r3, #2
 8014be6:	d01c      	beq.n	8014c22 <xTaskNotifyWait+0x5a>
			{
				/* Clear bits in the task's notification value as bits may get
				set	by the notifying task or interrupt.  This can be used to
				clear the value to zero. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
 8014be8:	4b25      	ldr	r3, [pc, #148]	@ (8014c80 <xTaskNotifyWait+0xb8>)
 8014bea:	681b      	ldr	r3, [r3, #0]
 8014bec:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 8014bf0:	68fa      	ldr	r2, [r7, #12]
 8014bf2:	43d2      	mvns	r2, r2
 8014bf4:	400a      	ands	r2, r1
 8014bf6:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0

				/* Mark this task as waiting for a notification. */
				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
 8014bfa:	4b21      	ldr	r3, [pc, #132]	@ (8014c80 <xTaskNotifyWait+0xb8>)
 8014bfc:	681b      	ldr	r3, [r3, #0]
 8014bfe:	2201      	movs	r2, #1
 8014c00:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

				if( xTicksToWait > ( TickType_t ) 0 )
 8014c04:	683b      	ldr	r3, [r7, #0]
 8014c06:	2b00      	cmp	r3, #0
 8014c08:	d00b      	beq.n	8014c22 <xTaskNotifyWait+0x5a>
				{
					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
 8014c0a:	2101      	movs	r1, #1
 8014c0c:	6838      	ldr	r0, [r7, #0]
 8014c0e:	f000 fa09 	bl	8015024 <prvAddCurrentTaskToDelayedList>

					/* All ports are written to allow a yield in a critical
					section (some will yield immediately, others wait until the
					critical section exits) - but it is not something that
					application code should ever do. */
					portYIELD_WITHIN_API();
 8014c12:	4b1c      	ldr	r3, [pc, #112]	@ (8014c84 <xTaskNotifyWait+0xbc>)
 8014c14:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8014c18:	601a      	str	r2, [r3, #0]
 8014c1a:	f3bf 8f4f 	dsb	sy
 8014c1e:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 8014c22:	f000 fffb 	bl	8015c1c <vPortExitCritical>

		taskENTER_CRITICAL();
 8014c26:	f000 ffc7 	bl	8015bb8 <vPortEnterCritical>
		{
			traceTASK_NOTIFY_WAIT();

			if( pulNotificationValue != NULL )
 8014c2a:	687b      	ldr	r3, [r7, #4]
 8014c2c:	2b00      	cmp	r3, #0
 8014c2e:	d005      	beq.n	8014c3c <xTaskNotifyWait+0x74>
			{
				/* Output the current notification value, which may or may not
				have changed. */
				*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
 8014c30:	4b13      	ldr	r3, [pc, #76]	@ (8014c80 <xTaskNotifyWait+0xb8>)
 8014c32:	681b      	ldr	r3, [r3, #0]
 8014c34:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8014c38:	687b      	ldr	r3, [r7, #4]
 8014c3a:	601a      	str	r2, [r3, #0]

			/* If ucNotifyValue is set then either the task never entered the
			blocked state (because a notification was already pending) or the
			task unblocked because of a notification.  Otherwise the task
			unblocked because of a timeout. */
			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
 8014c3c:	4b10      	ldr	r3, [pc, #64]	@ (8014c80 <xTaskNotifyWait+0xb8>)
 8014c3e:	681b      	ldr	r3, [r3, #0]
 8014c40:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014c44:	b2db      	uxtb	r3, r3
 8014c46:	2b02      	cmp	r3, #2
 8014c48:	d002      	beq.n	8014c50 <xTaskNotifyWait+0x88>
			{
				/* A notification was not received. */
				xReturn = pdFALSE;
 8014c4a:	2300      	movs	r3, #0
 8014c4c:	617b      	str	r3, [r7, #20]
 8014c4e:	e00a      	b.n	8014c66 <xTaskNotifyWait+0x9e>
			}
			else
			{
				/* A notification was already pending or a notification was
				received while the task was waiting. */
				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
 8014c50:	4b0b      	ldr	r3, [pc, #44]	@ (8014c80 <xTaskNotifyWait+0xb8>)
 8014c52:	681b      	ldr	r3, [r3, #0]
 8014c54:	f8d3 10a0 	ldr.w	r1, [r3, #160]	@ 0xa0
 8014c58:	68ba      	ldr	r2, [r7, #8]
 8014c5a:	43d2      	mvns	r2, r2
 8014c5c:	400a      	ands	r2, r1
 8014c5e:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
				xReturn = pdTRUE;
 8014c62:	2301      	movs	r3, #1
 8014c64:	617b      	str	r3, [r7, #20]
			}

			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8014c66:	4b06      	ldr	r3, [pc, #24]	@ (8014c80 <xTaskNotifyWait+0xb8>)
 8014c68:	681b      	ldr	r3, [r3, #0]
 8014c6a:	2200      	movs	r2, #0
 8014c6c:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
		}
		taskEXIT_CRITICAL();
 8014c70:	f000 ffd4 	bl	8015c1c <vPortExitCritical>

		return xReturn;
 8014c74:	697b      	ldr	r3, [r7, #20]
	}
 8014c76:	4618      	mov	r0, r3
 8014c78:	3718      	adds	r7, #24
 8014c7a:	46bd      	mov	sp, r7
 8014c7c:	bd80      	pop	{r7, pc}
 8014c7e:	bf00      	nop
 8014c80:	24003db0 	.word	0x24003db0
 8014c84:	e000ed04 	.word	0xe000ed04

08014c88 <xTaskGenericNotify>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
	{
 8014c88:	b580      	push	{r7, lr}
 8014c8a:	b08a      	sub	sp, #40	@ 0x28
 8014c8c:	af00      	add	r7, sp, #0
 8014c8e:	60f8      	str	r0, [r7, #12]
 8014c90:	60b9      	str	r1, [r7, #8]
 8014c92:	603b      	str	r3, [r7, #0]
 8014c94:	4613      	mov	r3, r2
 8014c96:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	BaseType_t xReturn = pdPASS;
 8014c98:	2301      	movs	r3, #1
 8014c9a:	627b      	str	r3, [r7, #36]	@ 0x24
	uint8_t ucOriginalNotifyState;

		configASSERT( xTaskToNotify );
 8014c9c:	68fb      	ldr	r3, [r7, #12]
 8014c9e:	2b00      	cmp	r3, #0
 8014ca0:	d10b      	bne.n	8014cba <xTaskGenericNotify+0x32>
	__asm volatile
 8014ca2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014ca6:	f383 8811 	msr	BASEPRI, r3
 8014caa:	f3bf 8f6f 	isb	sy
 8014cae:	f3bf 8f4f 	dsb	sy
 8014cb2:	61bb      	str	r3, [r7, #24]
}
 8014cb4:	bf00      	nop
 8014cb6:	bf00      	nop
 8014cb8:	e7fd      	b.n	8014cb6 <xTaskGenericNotify+0x2e>
		pxTCB = xTaskToNotify;
 8014cba:	68fb      	ldr	r3, [r7, #12]
 8014cbc:	623b      	str	r3, [r7, #32]

		taskENTER_CRITICAL();
 8014cbe:	f000 ff7b 	bl	8015bb8 <vPortEnterCritical>
		{
			if( pulPreviousNotificationValue != NULL )
 8014cc2:	683b      	ldr	r3, [r7, #0]
 8014cc4:	2b00      	cmp	r3, #0
 8014cc6:	d004      	beq.n	8014cd2 <xTaskGenericNotify+0x4a>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 8014cc8:	6a3b      	ldr	r3, [r7, #32]
 8014cca:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8014cce:	683b      	ldr	r3, [r7, #0]
 8014cd0:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 8014cd2:	6a3b      	ldr	r3, [r7, #32]
 8014cd4:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014cd8:	77fb      	strb	r3, [r7, #31]

			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 8014cda:	6a3b      	ldr	r3, [r7, #32]
 8014cdc:	2202      	movs	r2, #2
 8014cde:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 8014ce2:	79fb      	ldrb	r3, [r7, #7]
 8014ce4:	2b04      	cmp	r3, #4
 8014ce6:	d82e      	bhi.n	8014d46 <xTaskGenericNotify+0xbe>
 8014ce8:	a201      	add	r2, pc, #4	@ (adr r2, 8014cf0 <xTaskGenericNotify+0x68>)
 8014cea:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8014cee:	bf00      	nop
 8014cf0:	08014d6b 	.word	0x08014d6b
 8014cf4:	08014d05 	.word	0x08014d05
 8014cf8:	08014d17 	.word	0x08014d17
 8014cfc:	08014d27 	.word	0x08014d27
 8014d00:	08014d31 	.word	0x08014d31
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 8014d04:	6a3b      	ldr	r3, [r7, #32]
 8014d06:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8014d0a:	68bb      	ldr	r3, [r7, #8]
 8014d0c:	431a      	orrs	r2, r3
 8014d0e:	6a3b      	ldr	r3, [r7, #32]
 8014d10:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014d14:	e02c      	b.n	8014d70 <xTaskGenericNotify+0xe8>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 8014d16:	6a3b      	ldr	r3, [r7, #32]
 8014d18:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014d1c:	1c5a      	adds	r2, r3, #1
 8014d1e:	6a3b      	ldr	r3, [r7, #32]
 8014d20:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014d24:	e024      	b.n	8014d70 <xTaskGenericNotify+0xe8>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 8014d26:	6a3b      	ldr	r3, [r7, #32]
 8014d28:	68ba      	ldr	r2, [r7, #8]
 8014d2a:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014d2e:	e01f      	b.n	8014d70 <xTaskGenericNotify+0xe8>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 8014d30:	7ffb      	ldrb	r3, [r7, #31]
 8014d32:	2b02      	cmp	r3, #2
 8014d34:	d004      	beq.n	8014d40 <xTaskGenericNotify+0xb8>
					{
						pxTCB->ulNotifiedValue = ulValue;
 8014d36:	6a3b      	ldr	r3, [r7, #32]
 8014d38:	68ba      	ldr	r2, [r7, #8]
 8014d3a:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 8014d3e:	e017      	b.n	8014d70 <xTaskGenericNotify+0xe8>
						xReturn = pdFAIL;
 8014d40:	2300      	movs	r3, #0
 8014d42:	627b      	str	r3, [r7, #36]	@ 0x24
					break;
 8014d44:	e014      	b.n	8014d70 <xTaskGenericNotify+0xe8>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 8014d46:	6a3b      	ldr	r3, [r7, #32]
 8014d48:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014d4c:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8014d50:	d00d      	beq.n	8014d6e <xTaskGenericNotify+0xe6>
	__asm volatile
 8014d52:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014d56:	f383 8811 	msr	BASEPRI, r3
 8014d5a:	f3bf 8f6f 	isb	sy
 8014d5e:	f3bf 8f4f 	dsb	sy
 8014d62:	617b      	str	r3, [r7, #20]
}
 8014d64:	bf00      	nop
 8014d66:	bf00      	nop
 8014d68:	e7fd      	b.n	8014d66 <xTaskGenericNotify+0xde>
					break;
 8014d6a:	bf00      	nop
 8014d6c:	e000      	b.n	8014d70 <xTaskGenericNotify+0xe8>

					break;
 8014d6e:	bf00      	nop

			traceTASK_NOTIFY();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 8014d70:	7ffb      	ldrb	r3, [r7, #31]
 8014d72:	2b01      	cmp	r3, #1
 8014d74:	d13b      	bne.n	8014dee <xTaskGenericNotify+0x166>
			{
				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8014d76:	6a3b      	ldr	r3, [r7, #32]
 8014d78:	3304      	adds	r3, #4
 8014d7a:	4618      	mov	r0, r3
 8014d7c:	f7fd fa02 	bl	8012184 <uxListRemove>
				prvAddTaskToReadyList( pxTCB );
 8014d80:	6a3b      	ldr	r3, [r7, #32]
 8014d82:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014d84:	4b1d      	ldr	r3, [pc, #116]	@ (8014dfc <xTaskGenericNotify+0x174>)
 8014d86:	681b      	ldr	r3, [r3, #0]
 8014d88:	429a      	cmp	r2, r3
 8014d8a:	d903      	bls.n	8014d94 <xTaskGenericNotify+0x10c>
 8014d8c:	6a3b      	ldr	r3, [r7, #32]
 8014d8e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014d90:	4a1a      	ldr	r2, [pc, #104]	@ (8014dfc <xTaskGenericNotify+0x174>)
 8014d92:	6013      	str	r3, [r2, #0]
 8014d94:	6a3b      	ldr	r3, [r7, #32]
 8014d96:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014d98:	4613      	mov	r3, r2
 8014d9a:	009b      	lsls	r3, r3, #2
 8014d9c:	4413      	add	r3, r2
 8014d9e:	009b      	lsls	r3, r3, #2
 8014da0:	4a17      	ldr	r2, [pc, #92]	@ (8014e00 <xTaskGenericNotify+0x178>)
 8014da2:	441a      	add	r2, r3
 8014da4:	6a3b      	ldr	r3, [r7, #32]
 8014da6:	3304      	adds	r3, #4
 8014da8:	4619      	mov	r1, r3
 8014daa:	4610      	mov	r0, r2
 8014dac:	f7fd f98d 	bl	80120ca <vListInsertEnd>

				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 8014db0:	6a3b      	ldr	r3, [r7, #32]
 8014db2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8014db4:	2b00      	cmp	r3, #0
 8014db6:	d00b      	beq.n	8014dd0 <xTaskGenericNotify+0x148>
	__asm volatile
 8014db8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014dbc:	f383 8811 	msr	BASEPRI, r3
 8014dc0:	f3bf 8f6f 	isb	sy
 8014dc4:	f3bf 8f4f 	dsb	sy
 8014dc8:	613b      	str	r3, [r7, #16]
}
 8014dca:	bf00      	nop
 8014dcc:	bf00      	nop
 8014dce:	e7fd      	b.n	8014dcc <xTaskGenericNotify+0x144>
					earliest possible time. */
					prvResetNextTaskUnblockTime();
				}
				#endif

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 8014dd0:	6a3b      	ldr	r3, [r7, #32]
 8014dd2:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014dd4:	4b0b      	ldr	r3, [pc, #44]	@ (8014e04 <xTaskGenericNotify+0x17c>)
 8014dd6:	681b      	ldr	r3, [r3, #0]
 8014dd8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014dda:	429a      	cmp	r2, r3
 8014ddc:	d907      	bls.n	8014dee <xTaskGenericNotify+0x166>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					taskYIELD_IF_USING_PREEMPTION();
 8014dde:	4b0a      	ldr	r3, [pc, #40]	@ (8014e08 <xTaskGenericNotify+0x180>)
 8014de0:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8014de4:	601a      	str	r2, [r3, #0]
 8014de6:	f3bf 8f4f 	dsb	sy
 8014dea:	f3bf 8f6f 	isb	sy
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}
		}
		taskEXIT_CRITICAL();
 8014dee:	f000 ff15 	bl	8015c1c <vPortExitCritical>

		return xReturn;
 8014df2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
	}
 8014df4:	4618      	mov	r0, r3
 8014df6:	3728      	adds	r7, #40	@ 0x28
 8014df8:	46bd      	mov	sp, r7
 8014dfa:	bd80      	pop	{r7, pc}
 8014dfc:	2400428c 	.word	0x2400428c
 8014e00:	24003db4 	.word	0x24003db4
 8014e04:	24003db0 	.word	0x24003db0
 8014e08:	e000ed04 	.word	0xe000ed04

08014e0c <xTaskGenericNotifyFromISR>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
	{
 8014e0c:	b580      	push	{r7, lr}
 8014e0e:	b08e      	sub	sp, #56	@ 0x38
 8014e10:	af00      	add	r7, sp, #0
 8014e12:	60f8      	str	r0, [r7, #12]
 8014e14:	60b9      	str	r1, [r7, #8]
 8014e16:	603b      	str	r3, [r7, #0]
 8014e18:	4613      	mov	r3, r2
 8014e1a:	71fb      	strb	r3, [r7, #7]
	TCB_t * pxTCB;
	uint8_t ucOriginalNotifyState;
	BaseType_t xReturn = pdPASS;
 8014e1c:	2301      	movs	r3, #1
 8014e1e:	637b      	str	r3, [r7, #52]	@ 0x34
	UBaseType_t uxSavedInterruptStatus;

		configASSERT( xTaskToNotify );
 8014e20:	68fb      	ldr	r3, [r7, #12]
 8014e22:	2b00      	cmp	r3, #0
 8014e24:	d10b      	bne.n	8014e3e <xTaskGenericNotifyFromISR+0x32>
	__asm volatile
 8014e26:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014e2a:	f383 8811 	msr	BASEPRI, r3
 8014e2e:	f3bf 8f6f 	isb	sy
 8014e32:	f3bf 8f4f 	dsb	sy
 8014e36:	627b      	str	r3, [r7, #36]	@ 0x24
}
 8014e38:	bf00      	nop
 8014e3a:	bf00      	nop
 8014e3c:	e7fd      	b.n	8014e3a <xTaskGenericNotifyFromISR+0x2e>
		below the maximum system call interrupt priority.  FreeRTOS maintains a
		separate interrupt safe API to ensure interrupt entry is as fast and as
		simple as possible.  More information (albeit Cortex-M specific) is
		provided on the following link:
		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
 8014e3e:	f000 ff9b 	bl	8015d78 <vPortValidateInterruptPriority>

		pxTCB = xTaskToNotify;
 8014e42:	68fb      	ldr	r3, [r7, #12]
 8014e44:	633b      	str	r3, [r7, #48]	@ 0x30
	__asm volatile
 8014e46:	f3ef 8211 	mrs	r2, BASEPRI
 8014e4a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014e4e:	f383 8811 	msr	BASEPRI, r3
 8014e52:	f3bf 8f6f 	isb	sy
 8014e56:	f3bf 8f4f 	dsb	sy
 8014e5a:	623a      	str	r2, [r7, #32]
 8014e5c:	61fb      	str	r3, [r7, #28]
	return ulOriginalBASEPRI;
 8014e5e:	6a3b      	ldr	r3, [r7, #32]

		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
 8014e60:	62fb      	str	r3, [r7, #44]	@ 0x2c
		{
			if( pulPreviousNotificationValue != NULL )
 8014e62:	683b      	ldr	r3, [r7, #0]
 8014e64:	2b00      	cmp	r3, #0
 8014e66:	d004      	beq.n	8014e72 <xTaskGenericNotifyFromISR+0x66>
			{
				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
 8014e68:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014e6a:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8014e6e:	683b      	ldr	r3, [r7, #0]
 8014e70:	601a      	str	r2, [r3, #0]
			}

			ucOriginalNotifyState = pxTCB->ucNotifyState;
 8014e72:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014e74:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014e78:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
 8014e7c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014e7e:	2202      	movs	r2, #2
 8014e80:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4

			switch( eAction )
 8014e84:	79fb      	ldrb	r3, [r7, #7]
 8014e86:	2b04      	cmp	r3, #4
 8014e88:	d82e      	bhi.n	8014ee8 <xTaskGenericNotifyFromISR+0xdc>
 8014e8a:	a201      	add	r2, pc, #4	@ (adr r2, 8014e90 <xTaskGenericNotifyFromISR+0x84>)
 8014e8c:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8014e90:	08014f0d 	.word	0x08014f0d
 8014e94:	08014ea5 	.word	0x08014ea5
 8014e98:	08014eb7 	.word	0x08014eb7
 8014e9c:	08014ec7 	.word	0x08014ec7
 8014ea0:	08014ed1 	.word	0x08014ed1
			{
				case eSetBits	:
					pxTCB->ulNotifiedValue |= ulValue;
 8014ea4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014ea6:	f8d3 20a0 	ldr.w	r2, [r3, #160]	@ 0xa0
 8014eaa:	68bb      	ldr	r3, [r7, #8]
 8014eac:	431a      	orrs	r2, r3
 8014eae:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014eb0:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014eb4:	e02d      	b.n	8014f12 <xTaskGenericNotifyFromISR+0x106>

				case eIncrement	:
					( pxTCB->ulNotifiedValue )++;
 8014eb6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014eb8:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014ebc:	1c5a      	adds	r2, r3, #1
 8014ebe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014ec0:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014ec4:	e025      	b.n	8014f12 <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithOverwrite	:
					pxTCB->ulNotifiedValue = ulValue;
 8014ec6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014ec8:	68ba      	ldr	r2, [r7, #8]
 8014eca:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					break;
 8014ece:	e020      	b.n	8014f12 <xTaskGenericNotifyFromISR+0x106>

				case eSetValueWithoutOverwrite :
					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
 8014ed0:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8014ed4:	2b02      	cmp	r3, #2
 8014ed6:	d004      	beq.n	8014ee2 <xTaskGenericNotifyFromISR+0xd6>
					{
						pxTCB->ulNotifiedValue = ulValue;
 8014ed8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014eda:	68ba      	ldr	r2, [r7, #8]
 8014edc:	f8c3 20a0 	str.w	r2, [r3, #160]	@ 0xa0
					else
					{
						/* The value could not be written to the task. */
						xReturn = pdFAIL;
					}
					break;
 8014ee0:	e017      	b.n	8014f12 <xTaskGenericNotifyFromISR+0x106>
						xReturn = pdFAIL;
 8014ee2:	2300      	movs	r3, #0
 8014ee4:	637b      	str	r3, [r7, #52]	@ 0x34
					break;
 8014ee6:	e014      	b.n	8014f12 <xTaskGenericNotifyFromISR+0x106>

				default:
					/* Should not get here if all enums are handled.
					Artificially force an assert by testing a value the
					compiler can't assume is const. */
					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
 8014ee8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014eea:	f8d3 30a0 	ldr.w	r3, [r3, #160]	@ 0xa0
 8014eee:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8014ef2:	d00d      	beq.n	8014f10 <xTaskGenericNotifyFromISR+0x104>
	__asm volatile
 8014ef4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014ef8:	f383 8811 	msr	BASEPRI, r3
 8014efc:	f3bf 8f6f 	isb	sy
 8014f00:	f3bf 8f4f 	dsb	sy
 8014f04:	61bb      	str	r3, [r7, #24]
}
 8014f06:	bf00      	nop
 8014f08:	bf00      	nop
 8014f0a:	e7fd      	b.n	8014f08 <xTaskGenericNotifyFromISR+0xfc>
					break;
 8014f0c:	bf00      	nop
 8014f0e:	e000      	b.n	8014f12 <xTaskGenericNotifyFromISR+0x106>
					break;
 8014f10:	bf00      	nop

			traceTASK_NOTIFY_FROM_ISR();

			/* If the task is in the blocked state specifically to wait for a
			notification then unblock it now. */
			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
 8014f12:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8014f16:	2b01      	cmp	r3, #1
 8014f18:	d147      	bne.n	8014faa <xTaskGenericNotifyFromISR+0x19e>
			{
				/* The task should not have been on an event list. */
				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
 8014f1a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014f1c:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 8014f1e:	2b00      	cmp	r3, #0
 8014f20:	d00b      	beq.n	8014f3a <xTaskGenericNotifyFromISR+0x12e>
	__asm volatile
 8014f22:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8014f26:	f383 8811 	msr	BASEPRI, r3
 8014f2a:	f3bf 8f6f 	isb	sy
 8014f2e:	f3bf 8f4f 	dsb	sy
 8014f32:	617b      	str	r3, [r7, #20]
}
 8014f34:	bf00      	nop
 8014f36:	bf00      	nop
 8014f38:	e7fd      	b.n	8014f36 <xTaskGenericNotifyFromISR+0x12a>

				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
 8014f3a:	4b21      	ldr	r3, [pc, #132]	@ (8014fc0 <xTaskGenericNotifyFromISR+0x1b4>)
 8014f3c:	681b      	ldr	r3, [r3, #0]
 8014f3e:	2b00      	cmp	r3, #0
 8014f40:	d11d      	bne.n	8014f7e <xTaskGenericNotifyFromISR+0x172>
				{
					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
 8014f42:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014f44:	3304      	adds	r3, #4
 8014f46:	4618      	mov	r0, r3
 8014f48:	f7fd f91c 	bl	8012184 <uxListRemove>
					prvAddTaskToReadyList( pxTCB );
 8014f4c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014f4e:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014f50:	4b1c      	ldr	r3, [pc, #112]	@ (8014fc4 <xTaskGenericNotifyFromISR+0x1b8>)
 8014f52:	681b      	ldr	r3, [r3, #0]
 8014f54:	429a      	cmp	r2, r3
 8014f56:	d903      	bls.n	8014f60 <xTaskGenericNotifyFromISR+0x154>
 8014f58:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014f5a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014f5c:	4a19      	ldr	r2, [pc, #100]	@ (8014fc4 <xTaskGenericNotifyFromISR+0x1b8>)
 8014f5e:	6013      	str	r3, [r2, #0]
 8014f60:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014f62:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014f64:	4613      	mov	r3, r2
 8014f66:	009b      	lsls	r3, r3, #2
 8014f68:	4413      	add	r3, r2
 8014f6a:	009b      	lsls	r3, r3, #2
 8014f6c:	4a16      	ldr	r2, [pc, #88]	@ (8014fc8 <xTaskGenericNotifyFromISR+0x1bc>)
 8014f6e:	441a      	add	r2, r3
 8014f70:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014f72:	3304      	adds	r3, #4
 8014f74:	4619      	mov	r1, r3
 8014f76:	4610      	mov	r0, r2
 8014f78:	f7fd f8a7 	bl	80120ca <vListInsertEnd>
 8014f7c:	e005      	b.n	8014f8a <xTaskGenericNotifyFromISR+0x17e>
				}
				else
				{
					/* The delayed and ready lists cannot be accessed, so hold
					this task pending until the scheduler is resumed. */
					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
 8014f7e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014f80:	3318      	adds	r3, #24
 8014f82:	4619      	mov	r1, r3
 8014f84:	4811      	ldr	r0, [pc, #68]	@ (8014fcc <xTaskGenericNotifyFromISR+0x1c0>)
 8014f86:	f7fd f8a0 	bl	80120ca <vListInsertEnd>
				}

				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
 8014f8a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8014f8c:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8014f8e:	4b10      	ldr	r3, [pc, #64]	@ (8014fd0 <xTaskGenericNotifyFromISR+0x1c4>)
 8014f90:	681b      	ldr	r3, [r3, #0]
 8014f92:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8014f94:	429a      	cmp	r2, r3
 8014f96:	d908      	bls.n	8014faa <xTaskGenericNotifyFromISR+0x19e>
				{
					/* The notified task has a priority above the currently
					executing task so a yield is required. */
					if( pxHigherPriorityTaskWoken != NULL )
 8014f98:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8014f9a:	2b00      	cmp	r3, #0
 8014f9c:	d002      	beq.n	8014fa4 <xTaskGenericNotifyFromISR+0x198>
					{
						*pxHigherPriorityTaskWoken = pdTRUE;
 8014f9e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8014fa0:	2201      	movs	r2, #1
 8014fa2:	601a      	str	r2, [r3, #0]
					}

					/* Mark that a yield is pending in case the user is not
					using the "xHigherPriorityTaskWoken" parameter to an ISR
					safe FreeRTOS function. */
					xYieldPending = pdTRUE;
 8014fa4:	4b0b      	ldr	r3, [pc, #44]	@ (8014fd4 <xTaskGenericNotifyFromISR+0x1c8>)
 8014fa6:	2201      	movs	r2, #1
 8014fa8:	601a      	str	r2, [r3, #0]
 8014faa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8014fac:	613b      	str	r3, [r7, #16]
	__asm volatile
 8014fae:	693b      	ldr	r3, [r7, #16]
 8014fb0:	f383 8811 	msr	BASEPRI, r3
}
 8014fb4:	bf00      	nop
				}
			}
		}
		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );

		return xReturn;
 8014fb6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
	}
 8014fb8:	4618      	mov	r0, r3
 8014fba:	3738      	adds	r7, #56	@ 0x38
 8014fbc:	46bd      	mov	sp, r7
 8014fbe:	bd80      	pop	{r7, pc}
 8014fc0:	240042ac 	.word	0x240042ac
 8014fc4:	2400428c 	.word	0x2400428c
 8014fc8:	24003db4 	.word	0x24003db4
 8014fcc:	24004244 	.word	0x24004244
 8014fd0:	24003db0 	.word	0x24003db0
 8014fd4:	24004298 	.word	0x24004298

08014fd8 <xTaskNotifyStateClear>:
/*-----------------------------------------------------------*/

#if( configUSE_TASK_NOTIFICATIONS == 1 )

	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
	{
 8014fd8:	b580      	push	{r7, lr}
 8014fda:	b084      	sub	sp, #16
 8014fdc:	af00      	add	r7, sp, #0
 8014fde:	6078      	str	r0, [r7, #4]
	TCB_t *pxTCB;
	BaseType_t xReturn;

		/* If null is passed in here then it is the calling task that is having
		its notification state cleared. */
		pxTCB = prvGetTCBFromHandle( xTask );
 8014fe0:	687b      	ldr	r3, [r7, #4]
 8014fe2:	2b00      	cmp	r3, #0
 8014fe4:	d102      	bne.n	8014fec <xTaskNotifyStateClear+0x14>
 8014fe6:	4b0e      	ldr	r3, [pc, #56]	@ (8015020 <xTaskNotifyStateClear+0x48>)
 8014fe8:	681b      	ldr	r3, [r3, #0]
 8014fea:	e000      	b.n	8014fee <xTaskNotifyStateClear+0x16>
 8014fec:	687b      	ldr	r3, [r7, #4]
 8014fee:	60bb      	str	r3, [r7, #8]

		taskENTER_CRITICAL();
 8014ff0:	f000 fde2 	bl	8015bb8 <vPortEnterCritical>
		{
			if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
 8014ff4:	68bb      	ldr	r3, [r7, #8]
 8014ff6:	f893 30a4 	ldrb.w	r3, [r3, #164]	@ 0xa4
 8014ffa:	b2db      	uxtb	r3, r3
 8014ffc:	2b02      	cmp	r3, #2
 8014ffe:	d106      	bne.n	801500e <xTaskNotifyStateClear+0x36>
			{
				pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
 8015000:	68bb      	ldr	r3, [r7, #8]
 8015002:	2200      	movs	r2, #0
 8015004:	f883 20a4 	strb.w	r2, [r3, #164]	@ 0xa4
				xReturn = pdPASS;
 8015008:	2301      	movs	r3, #1
 801500a:	60fb      	str	r3, [r7, #12]
 801500c:	e001      	b.n	8015012 <xTaskNotifyStateClear+0x3a>
			}
			else
			{
				xReturn = pdFAIL;
 801500e:	2300      	movs	r3, #0
 8015010:	60fb      	str	r3, [r7, #12]
			}
		}
		taskEXIT_CRITICAL();
 8015012:	f000 fe03 	bl	8015c1c <vPortExitCritical>

		return xReturn;
 8015016:	68fb      	ldr	r3, [r7, #12]
	}
 8015018:	4618      	mov	r0, r3
 801501a:	3710      	adds	r7, #16
 801501c:	46bd      	mov	sp, r7
 801501e:	bd80      	pop	{r7, pc}
 8015020:	24003db0 	.word	0x24003db0

08015024 <prvAddCurrentTaskToDelayedList>:

#endif
/*-----------------------------------------------------------*/

static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
{
 8015024:	b580      	push	{r7, lr}
 8015026:	b084      	sub	sp, #16
 8015028:	af00      	add	r7, sp, #0
 801502a:	6078      	str	r0, [r7, #4]
 801502c:	6039      	str	r1, [r7, #0]
TickType_t xTimeToWake;
const TickType_t xConstTickCount = xTickCount;
 801502e:	4b21      	ldr	r3, [pc, #132]	@ (80150b4 <prvAddCurrentTaskToDelayedList+0x90>)
 8015030:	681b      	ldr	r3, [r3, #0]
 8015032:	60fb      	str	r3, [r7, #12]
	}
	#endif

	/* Remove the task from the ready list before adding it to the blocked list
	as the same list item is used for both lists. */
	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
 8015034:	4b20      	ldr	r3, [pc, #128]	@ (80150b8 <prvAddCurrentTaskToDelayedList+0x94>)
 8015036:	681b      	ldr	r3, [r3, #0]
 8015038:	3304      	adds	r3, #4
 801503a:	4618      	mov	r0, r3
 801503c:	f7fd f8a2 	bl	8012184 <uxListRemove>
		mtCOVERAGE_TEST_MARKER();
	}

	#if ( INCLUDE_vTaskSuspend == 1 )
	{
		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
 8015040:	687b      	ldr	r3, [r7, #4]
 8015042:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8015046:	d10a      	bne.n	801505e <prvAddCurrentTaskToDelayedList+0x3a>
 8015048:	683b      	ldr	r3, [r7, #0]
 801504a:	2b00      	cmp	r3, #0
 801504c:	d007      	beq.n	801505e <prvAddCurrentTaskToDelayedList+0x3a>
		{
			/* Add the task to the suspended task list instead of a delayed task
			list to ensure it is not woken by a timing event.  It will block
			indefinitely. */
			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
 801504e:	4b1a      	ldr	r3, [pc, #104]	@ (80150b8 <prvAddCurrentTaskToDelayedList+0x94>)
 8015050:	681b      	ldr	r3, [r3, #0]
 8015052:	3304      	adds	r3, #4
 8015054:	4619      	mov	r1, r3
 8015056:	4819      	ldr	r0, [pc, #100]	@ (80150bc <prvAddCurrentTaskToDelayedList+0x98>)
 8015058:	f7fd f837 	bl	80120ca <vListInsertEnd>

		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
		( void ) xCanBlockIndefinitely;
	}
	#endif /* INCLUDE_vTaskSuspend */
}
 801505c:	e026      	b.n	80150ac <prvAddCurrentTaskToDelayedList+0x88>
			xTimeToWake = xConstTickCount + xTicksToWait;
 801505e:	68fa      	ldr	r2, [r7, #12]
 8015060:	687b      	ldr	r3, [r7, #4]
 8015062:	4413      	add	r3, r2
 8015064:	60bb      	str	r3, [r7, #8]
			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
 8015066:	4b14      	ldr	r3, [pc, #80]	@ (80150b8 <prvAddCurrentTaskToDelayedList+0x94>)
 8015068:	681b      	ldr	r3, [r3, #0]
 801506a:	68ba      	ldr	r2, [r7, #8]
 801506c:	605a      	str	r2, [r3, #4]
			if( xTimeToWake < xConstTickCount )
 801506e:	68ba      	ldr	r2, [r7, #8]
 8015070:	68fb      	ldr	r3, [r7, #12]
 8015072:	429a      	cmp	r2, r3
 8015074:	d209      	bcs.n	801508a <prvAddCurrentTaskToDelayedList+0x66>
				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 8015076:	4b12      	ldr	r3, [pc, #72]	@ (80150c0 <prvAddCurrentTaskToDelayedList+0x9c>)
 8015078:	681a      	ldr	r2, [r3, #0]
 801507a:	4b0f      	ldr	r3, [pc, #60]	@ (80150b8 <prvAddCurrentTaskToDelayedList+0x94>)
 801507c:	681b      	ldr	r3, [r3, #0]
 801507e:	3304      	adds	r3, #4
 8015080:	4619      	mov	r1, r3
 8015082:	4610      	mov	r0, r2
 8015084:	f7fd f845 	bl	8012112 <vListInsert>
}
 8015088:	e010      	b.n	80150ac <prvAddCurrentTaskToDelayedList+0x88>
				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
 801508a:	4b0e      	ldr	r3, [pc, #56]	@ (80150c4 <prvAddCurrentTaskToDelayedList+0xa0>)
 801508c:	681a      	ldr	r2, [r3, #0]
 801508e:	4b0a      	ldr	r3, [pc, #40]	@ (80150b8 <prvAddCurrentTaskToDelayedList+0x94>)
 8015090:	681b      	ldr	r3, [r3, #0]
 8015092:	3304      	adds	r3, #4
 8015094:	4619      	mov	r1, r3
 8015096:	4610      	mov	r0, r2
 8015098:	f7fd f83b 	bl	8012112 <vListInsert>
				if( xTimeToWake < xNextTaskUnblockTime )
 801509c:	4b0a      	ldr	r3, [pc, #40]	@ (80150c8 <prvAddCurrentTaskToDelayedList+0xa4>)
 801509e:	681b      	ldr	r3, [r3, #0]
 80150a0:	68ba      	ldr	r2, [r7, #8]
 80150a2:	429a      	cmp	r2, r3
 80150a4:	d202      	bcs.n	80150ac <prvAddCurrentTaskToDelayedList+0x88>
					xNextTaskUnblockTime = xTimeToWake;
 80150a6:	4a08      	ldr	r2, [pc, #32]	@ (80150c8 <prvAddCurrentTaskToDelayedList+0xa4>)
 80150a8:	68bb      	ldr	r3, [r7, #8]
 80150aa:	6013      	str	r3, [r2, #0]
}
 80150ac:	bf00      	nop
 80150ae:	3710      	adds	r7, #16
 80150b0:	46bd      	mov	sp, r7
 80150b2:	bd80      	pop	{r7, pc}
 80150b4:	24004288 	.word	0x24004288
 80150b8:	24003db0 	.word	0x24003db0
 80150bc:	24004270 	.word	0x24004270
 80150c0:	24004240 	.word	0x24004240
 80150c4:	2400423c 	.word	0x2400423c
 80150c8:	240042a4 	.word	0x240042a4

080150cc <xTimerCreateTimerTask>:
									TimerCallbackFunction_t pxCallbackFunction,
									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
/*-----------------------------------------------------------*/

BaseType_t xTimerCreateTimerTask( void )
{
 80150cc:	b580      	push	{r7, lr}
 80150ce:	b08a      	sub	sp, #40	@ 0x28
 80150d0:	af04      	add	r7, sp, #16
BaseType_t xReturn = pdFAIL;
 80150d2:	2300      	movs	r3, #0
 80150d4:	617b      	str	r3, [r7, #20]

	/* This function is called when the scheduler is started if
	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
	timer service task has been created/initialised.  If timers have already
	been created then the initialisation will already have been performed. */
	prvCheckForValidListAndQueue();
 80150d6:	f000 fbb1 	bl	801583c <prvCheckForValidListAndQueue>

	if( xTimerQueue != NULL )
 80150da:	4b1d      	ldr	r3, [pc, #116]	@ (8015150 <xTimerCreateTimerTask+0x84>)
 80150dc:	681b      	ldr	r3, [r3, #0]
 80150de:	2b00      	cmp	r3, #0
 80150e0:	d021      	beq.n	8015126 <xTimerCreateTimerTask+0x5a>
	{
		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
		{
			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
 80150e2:	2300      	movs	r3, #0
 80150e4:	60fb      	str	r3, [r7, #12]
			StackType_t *pxTimerTaskStackBuffer = NULL;
 80150e6:	2300      	movs	r3, #0
 80150e8:	60bb      	str	r3, [r7, #8]
			uint32_t ulTimerTaskStackSize;

			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
 80150ea:	1d3a      	adds	r2, r7, #4
 80150ec:	f107 0108 	add.w	r1, r7, #8
 80150f0:	f107 030c 	add.w	r3, r7, #12
 80150f4:	4618      	mov	r0, r3
 80150f6:	f7fc ffa1 	bl	801203c <vApplicationGetTimerTaskMemory>
			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
 80150fa:	6879      	ldr	r1, [r7, #4]
 80150fc:	68bb      	ldr	r3, [r7, #8]
 80150fe:	68fa      	ldr	r2, [r7, #12]
 8015100:	9202      	str	r2, [sp, #8]
 8015102:	9301      	str	r3, [sp, #4]
 8015104:	2302      	movs	r3, #2
 8015106:	9300      	str	r3, [sp, #0]
 8015108:	2300      	movs	r3, #0
 801510a:	460a      	mov	r2, r1
 801510c:	4911      	ldr	r1, [pc, #68]	@ (8015154 <xTimerCreateTimerTask+0x88>)
 801510e:	4812      	ldr	r0, [pc, #72]	@ (8015158 <xTimerCreateTimerTask+0x8c>)
 8015110:	f7fe fd1c 	bl	8013b4c <xTaskCreateStatic>
 8015114:	4603      	mov	r3, r0
 8015116:	4a11      	ldr	r2, [pc, #68]	@ (801515c <xTimerCreateTimerTask+0x90>)
 8015118:	6013      	str	r3, [r2, #0]
													NULL,
													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
													pxTimerTaskStackBuffer,
													pxTimerTaskTCBBuffer );

			if( xTimerTaskHandle != NULL )
 801511a:	4b10      	ldr	r3, [pc, #64]	@ (801515c <xTimerCreateTimerTask+0x90>)
 801511c:	681b      	ldr	r3, [r3, #0]
 801511e:	2b00      	cmp	r3, #0
 8015120:	d001      	beq.n	8015126 <xTimerCreateTimerTask+0x5a>
			{
				xReturn = pdPASS;
 8015122:	2301      	movs	r3, #1
 8015124:	617b      	str	r3, [r7, #20]
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	configASSERT( xReturn );
 8015126:	697b      	ldr	r3, [r7, #20]
 8015128:	2b00      	cmp	r3, #0
 801512a:	d10b      	bne.n	8015144 <xTimerCreateTimerTask+0x78>
	__asm volatile
 801512c:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015130:	f383 8811 	msr	BASEPRI, r3
 8015134:	f3bf 8f6f 	isb	sy
 8015138:	f3bf 8f4f 	dsb	sy
 801513c:	613b      	str	r3, [r7, #16]
}
 801513e:	bf00      	nop
 8015140:	bf00      	nop
 8015142:	e7fd      	b.n	8015140 <xTimerCreateTimerTask+0x74>
	return xReturn;
 8015144:	697b      	ldr	r3, [r7, #20]
}
 8015146:	4618      	mov	r0, r3
 8015148:	3718      	adds	r7, #24
 801514a:	46bd      	mov	sp, r7
 801514c:	bd80      	pop	{r7, pc}
 801514e:	bf00      	nop
 8015150:	240042e0 	.word	0x240042e0
 8015154:	0802ddec 	.word	0x0802ddec
 8015158:	080153d5 	.word	0x080153d5
 801515c:	240042e4 	.word	0x240042e4

08015160 <xTimerCreate>:
	TimerHandle_t xTimerCreate(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
								const TickType_t xTimerPeriodInTicks,
								const UBaseType_t uxAutoReload,
								void * const pvTimerID,
								TimerCallbackFunction_t pxCallbackFunction )
	{
 8015160:	b580      	push	{r7, lr}
 8015162:	b088      	sub	sp, #32
 8015164:	af02      	add	r7, sp, #8
 8015166:	60f8      	str	r0, [r7, #12]
 8015168:	60b9      	str	r1, [r7, #8]
 801516a:	607a      	str	r2, [r7, #4]
 801516c:	603b      	str	r3, [r7, #0]
	Timer_t *pxNewTimer;

		pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */
 801516e:	202c      	movs	r0, #44	@ 0x2c
 8015170:	f000 fe44 	bl	8015dfc <pvPortMalloc>
 8015174:	6178      	str	r0, [r7, #20]

		if( pxNewTimer != NULL )
 8015176:	697b      	ldr	r3, [r7, #20]
 8015178:	2b00      	cmp	r3, #0
 801517a:	d00d      	beq.n	8015198 <xTimerCreate+0x38>
		{
			/* Status is thus far zero as the timer is not created statically
			and has not been started.  The auto-reload bit may get set in
			prvInitialiseNewTimer. */
			pxNewTimer->ucStatus = 0x00;
 801517c:	697b      	ldr	r3, [r7, #20]
 801517e:	2200      	movs	r2, #0
 8015180:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
 8015184:	697b      	ldr	r3, [r7, #20]
 8015186:	9301      	str	r3, [sp, #4]
 8015188:	6a3b      	ldr	r3, [r7, #32]
 801518a:	9300      	str	r3, [sp, #0]
 801518c:	683b      	ldr	r3, [r7, #0]
 801518e:	687a      	ldr	r2, [r7, #4]
 8015190:	68b9      	ldr	r1, [r7, #8]
 8015192:	68f8      	ldr	r0, [r7, #12]
 8015194:	f000 f845 	bl	8015222 <prvInitialiseNewTimer>
		}

		return pxNewTimer;
 8015198:	697b      	ldr	r3, [r7, #20]
	}
 801519a:	4618      	mov	r0, r3
 801519c:	3718      	adds	r7, #24
 801519e:	46bd      	mov	sp, r7
 80151a0:	bd80      	pop	{r7, pc}

080151a2 <xTimerCreateStatic>:
										const TickType_t xTimerPeriodInTicks,
										const UBaseType_t uxAutoReload,
										void * const pvTimerID,
										TimerCallbackFunction_t pxCallbackFunction,
										StaticTimer_t *pxTimerBuffer )
	{
 80151a2:	b580      	push	{r7, lr}
 80151a4:	b08a      	sub	sp, #40	@ 0x28
 80151a6:	af02      	add	r7, sp, #8
 80151a8:	60f8      	str	r0, [r7, #12]
 80151aa:	60b9      	str	r1, [r7, #8]
 80151ac:	607a      	str	r2, [r7, #4]
 80151ae:	603b      	str	r3, [r7, #0]
		#if( configASSERT_DEFINED == 1 )
		{
			/* Sanity check that the size of the structure used to declare a
			variable of type StaticTimer_t equals the size of the real timer
			structure. */
			volatile size_t xSize = sizeof( StaticTimer_t );
 80151b0:	232c      	movs	r3, #44	@ 0x2c
 80151b2:	613b      	str	r3, [r7, #16]
			configASSERT( xSize == sizeof( Timer_t ) );
 80151b4:	693b      	ldr	r3, [r7, #16]
 80151b6:	2b2c      	cmp	r3, #44	@ 0x2c
 80151b8:	d00b      	beq.n	80151d2 <xTimerCreateStatic+0x30>
	__asm volatile
 80151ba:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80151be:	f383 8811 	msr	BASEPRI, r3
 80151c2:	f3bf 8f6f 	isb	sy
 80151c6:	f3bf 8f4f 	dsb	sy
 80151ca:	61bb      	str	r3, [r7, #24]
}
 80151cc:	bf00      	nop
 80151ce:	bf00      	nop
 80151d0:	e7fd      	b.n	80151ce <xTimerCreateStatic+0x2c>
			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
 80151d2:	693b      	ldr	r3, [r7, #16]
		}
		#endif /* configASSERT_DEFINED */

		/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
		configASSERT( pxTimerBuffer );
 80151d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80151d6:	2b00      	cmp	r3, #0
 80151d8:	d10b      	bne.n	80151f2 <xTimerCreateStatic+0x50>
	__asm volatile
 80151da:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80151de:	f383 8811 	msr	BASEPRI, r3
 80151e2:	f3bf 8f6f 	isb	sy
 80151e6:	f3bf 8f4f 	dsb	sy
 80151ea:	617b      	str	r3, [r7, #20]
}
 80151ec:	bf00      	nop
 80151ee:	bf00      	nop
 80151f0:	e7fd      	b.n	80151ee <xTimerCreateStatic+0x4c>
		pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
 80151f2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80151f4:	61fb      	str	r3, [r7, #28]

		if( pxNewTimer != NULL )
 80151f6:	69fb      	ldr	r3, [r7, #28]
 80151f8:	2b00      	cmp	r3, #0
 80151fa:	d00d      	beq.n	8015218 <xTimerCreateStatic+0x76>
		{
			/* Timers can be created statically or dynamically so note this
			timer was created statically in case it is later deleted.  The
			auto-reload bit may get set in prvInitialiseNewTimer(). */
			pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED;
 80151fc:	69fb      	ldr	r3, [r7, #28]
 80151fe:	2202      	movs	r2, #2
 8015200:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
 8015204:	69fb      	ldr	r3, [r7, #28]
 8015206:	9301      	str	r3, [sp, #4]
 8015208:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801520a:	9300      	str	r3, [sp, #0]
 801520c:	683b      	ldr	r3, [r7, #0]
 801520e:	687a      	ldr	r2, [r7, #4]
 8015210:	68b9      	ldr	r1, [r7, #8]
 8015212:	68f8      	ldr	r0, [r7, #12]
 8015214:	f000 f805 	bl	8015222 <prvInitialiseNewTimer>
		}

		return pxNewTimer;
 8015218:	69fb      	ldr	r3, [r7, #28]
	}
 801521a:	4618      	mov	r0, r3
 801521c:	3720      	adds	r7, #32
 801521e:	46bd      	mov	sp, r7
 8015220:	bd80      	pop	{r7, pc}

08015222 <prvInitialiseNewTimer>:
									const TickType_t xTimerPeriodInTicks,
									const UBaseType_t uxAutoReload,
									void * const pvTimerID,
									TimerCallbackFunction_t pxCallbackFunction,
									Timer_t *pxNewTimer )
{
 8015222:	b580      	push	{r7, lr}
 8015224:	b086      	sub	sp, #24
 8015226:	af00      	add	r7, sp, #0
 8015228:	60f8      	str	r0, [r7, #12]
 801522a:	60b9      	str	r1, [r7, #8]
 801522c:	607a      	str	r2, [r7, #4]
 801522e:	603b      	str	r3, [r7, #0]
	/* 0 is not a valid value for xTimerPeriodInTicks. */
	configASSERT( ( xTimerPeriodInTicks > 0 ) );
 8015230:	68bb      	ldr	r3, [r7, #8]
 8015232:	2b00      	cmp	r3, #0
 8015234:	d10b      	bne.n	801524e <prvInitialiseNewTimer+0x2c>
	__asm volatile
 8015236:	f04f 0350 	mov.w	r3, #80	@ 0x50
 801523a:	f383 8811 	msr	BASEPRI, r3
 801523e:	f3bf 8f6f 	isb	sy
 8015242:	f3bf 8f4f 	dsb	sy
 8015246:	617b      	str	r3, [r7, #20]
}
 8015248:	bf00      	nop
 801524a:	bf00      	nop
 801524c:	e7fd      	b.n	801524a <prvInitialiseNewTimer+0x28>

	if( pxNewTimer != NULL )
 801524e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015250:	2b00      	cmp	r3, #0
 8015252:	d01e      	beq.n	8015292 <prvInitialiseNewTimer+0x70>
	{
		/* Ensure the infrastructure used by the timer service task has been
		created/initialised. */
		prvCheckForValidListAndQueue();
 8015254:	f000 faf2 	bl	801583c <prvCheckForValidListAndQueue>

		/* Initialise the timer structure members using the function
		parameters. */
		pxNewTimer->pcTimerName = pcTimerName;
 8015258:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801525a:	68fa      	ldr	r2, [r7, #12]
 801525c:	601a      	str	r2, [r3, #0]
		pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
 801525e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015260:	68ba      	ldr	r2, [r7, #8]
 8015262:	619a      	str	r2, [r3, #24]
		pxNewTimer->pvTimerID = pvTimerID;
 8015264:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015266:	683a      	ldr	r2, [r7, #0]
 8015268:	61da      	str	r2, [r3, #28]
		pxNewTimer->pxCallbackFunction = pxCallbackFunction;
 801526a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801526c:	6a3a      	ldr	r2, [r7, #32]
 801526e:	621a      	str	r2, [r3, #32]
		vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
 8015270:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015272:	3304      	adds	r3, #4
 8015274:	4618      	mov	r0, r3
 8015276:	f7fc ff1b 	bl	80120b0 <vListInitialiseItem>
		if( uxAutoReload != pdFALSE )
 801527a:	687b      	ldr	r3, [r7, #4]
 801527c:	2b00      	cmp	r3, #0
 801527e:	d008      	beq.n	8015292 <prvInitialiseNewTimer+0x70>
		{
			pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
 8015280:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015282:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015286:	f043 0304 	orr.w	r3, r3, #4
 801528a:	b2da      	uxtb	r2, r3
 801528c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801528e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
		}
		traceTIMER_CREATE( pxNewTimer );
	}
}
 8015292:	bf00      	nop
 8015294:	3718      	adds	r7, #24
 8015296:	46bd      	mov	sp, r7
 8015298:	bd80      	pop	{r7, pc}
	...

0801529c <xTimerGenericCommand>:
/*-----------------------------------------------------------*/

BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
{
 801529c:	b580      	push	{r7, lr}
 801529e:	b08a      	sub	sp, #40	@ 0x28
 80152a0:	af00      	add	r7, sp, #0
 80152a2:	60f8      	str	r0, [r7, #12]
 80152a4:	60b9      	str	r1, [r7, #8]
 80152a6:	607a      	str	r2, [r7, #4]
 80152a8:	603b      	str	r3, [r7, #0]
BaseType_t xReturn = pdFAIL;
 80152aa:	2300      	movs	r3, #0
 80152ac:	627b      	str	r3, [r7, #36]	@ 0x24
DaemonTaskMessage_t xMessage;

	configASSERT( xTimer );
 80152ae:	68fb      	ldr	r3, [r7, #12]
 80152b0:	2b00      	cmp	r3, #0
 80152b2:	d10b      	bne.n	80152cc <xTimerGenericCommand+0x30>
	__asm volatile
 80152b4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80152b8:	f383 8811 	msr	BASEPRI, r3
 80152bc:	f3bf 8f6f 	isb	sy
 80152c0:	f3bf 8f4f 	dsb	sy
 80152c4:	623b      	str	r3, [r7, #32]
}
 80152c6:	bf00      	nop
 80152c8:	bf00      	nop
 80152ca:	e7fd      	b.n	80152c8 <xTimerGenericCommand+0x2c>

	/* Send a message to the timer service task to perform a particular action
	on a particular timer definition. */
	if( xTimerQueue != NULL )
 80152cc:	4b19      	ldr	r3, [pc, #100]	@ (8015334 <xTimerGenericCommand+0x98>)
 80152ce:	681b      	ldr	r3, [r3, #0]
 80152d0:	2b00      	cmp	r3, #0
 80152d2:	d02a      	beq.n	801532a <xTimerGenericCommand+0x8e>
	{
		/* Send a command to the timer service task to start the xTimer timer. */
		xMessage.xMessageID = xCommandID;
 80152d4:	68bb      	ldr	r3, [r7, #8]
 80152d6:	613b      	str	r3, [r7, #16]
		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
 80152d8:	687b      	ldr	r3, [r7, #4]
 80152da:	617b      	str	r3, [r7, #20]
		xMessage.u.xTimerParameters.pxTimer = xTimer;
 80152dc:	68fb      	ldr	r3, [r7, #12]
 80152de:	61bb      	str	r3, [r7, #24]

		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
 80152e0:	68bb      	ldr	r3, [r7, #8]
 80152e2:	2b05      	cmp	r3, #5
 80152e4:	dc18      	bgt.n	8015318 <xTimerGenericCommand+0x7c>
		{
			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
 80152e6:	f7ff fae1 	bl	80148ac <xTaskGetSchedulerState>
 80152ea:	4603      	mov	r3, r0
 80152ec:	2b02      	cmp	r3, #2
 80152ee:	d109      	bne.n	8015304 <xTimerGenericCommand+0x68>
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
 80152f0:	4b10      	ldr	r3, [pc, #64]	@ (8015334 <xTimerGenericCommand+0x98>)
 80152f2:	6818      	ldr	r0, [r3, #0]
 80152f4:	f107 0110 	add.w	r1, r7, #16
 80152f8:	2300      	movs	r3, #0
 80152fa:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80152fc:	f7fd f9d8 	bl	80126b0 <xQueueGenericSend>
 8015300:	6278      	str	r0, [r7, #36]	@ 0x24
 8015302:	e012      	b.n	801532a <xTimerGenericCommand+0x8e>
			}
			else
			{
				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
 8015304:	4b0b      	ldr	r3, [pc, #44]	@ (8015334 <xTimerGenericCommand+0x98>)
 8015306:	6818      	ldr	r0, [r3, #0]
 8015308:	f107 0110 	add.w	r1, r7, #16
 801530c:	2300      	movs	r3, #0
 801530e:	2200      	movs	r2, #0
 8015310:	f7fd f9ce 	bl	80126b0 <xQueueGenericSend>
 8015314:	6278      	str	r0, [r7, #36]	@ 0x24
 8015316:	e008      	b.n	801532a <xTimerGenericCommand+0x8e>
			}
		}
		else
		{
			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
 8015318:	4b06      	ldr	r3, [pc, #24]	@ (8015334 <xTimerGenericCommand+0x98>)
 801531a:	6818      	ldr	r0, [r3, #0]
 801531c:	f107 0110 	add.w	r1, r7, #16
 8015320:	2300      	movs	r3, #0
 8015322:	683a      	ldr	r2, [r7, #0]
 8015324:	f7fd fac6 	bl	80128b4 <xQueueGenericSendFromISR>
 8015328:	6278      	str	r0, [r7, #36]	@ 0x24
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}

	return xReturn;
 801532a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 801532c:	4618      	mov	r0, r3
 801532e:	3728      	adds	r7, #40	@ 0x28
 8015330:	46bd      	mov	sp, r7
 8015332:	bd80      	pop	{r7, pc}
 8015334:	240042e0 	.word	0x240042e0

08015338 <prvProcessExpiredTimer>:
	return pxTimer->pcTimerName;
}
/*-----------------------------------------------------------*/

static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
{
 8015338:	b580      	push	{r7, lr}
 801533a:	b088      	sub	sp, #32
 801533c:	af02      	add	r7, sp, #8
 801533e:	6078      	str	r0, [r7, #4]
 8015340:	6039      	str	r1, [r7, #0]
BaseType_t xResult;
Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8015342:	4b23      	ldr	r3, [pc, #140]	@ (80153d0 <prvProcessExpiredTimer+0x98>)
 8015344:	681b      	ldr	r3, [r3, #0]
 8015346:	68db      	ldr	r3, [r3, #12]
 8015348:	68db      	ldr	r3, [r3, #12]
 801534a:	617b      	str	r3, [r7, #20]

	/* Remove the timer from the list of active timers.  A check has already
	been performed to ensure the list is not empty. */
	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 801534c:	697b      	ldr	r3, [r7, #20]
 801534e:	3304      	adds	r3, #4
 8015350:	4618      	mov	r0, r3
 8015352:	f7fc ff17 	bl	8012184 <uxListRemove>
	traceTIMER_EXPIRED( pxTimer );

	/* If the timer is an auto-reload timer then calculate the next
	expiry time and re-insert the timer in the list of active timers. */
	if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 8015356:	697b      	ldr	r3, [r7, #20]
 8015358:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801535c:	f003 0304 	and.w	r3, r3, #4
 8015360:	2b00      	cmp	r3, #0
 8015362:	d023      	beq.n	80153ac <prvProcessExpiredTimer+0x74>
	{
		/* The timer is inserted into a list using a time relative to anything
		other than the current time.  It will therefore be inserted into the
		correct list relative to the time this task thinks it is now. */
		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
 8015364:	697b      	ldr	r3, [r7, #20]
 8015366:	699a      	ldr	r2, [r3, #24]
 8015368:	687b      	ldr	r3, [r7, #4]
 801536a:	18d1      	adds	r1, r2, r3
 801536c:	687b      	ldr	r3, [r7, #4]
 801536e:	683a      	ldr	r2, [r7, #0]
 8015370:	6978      	ldr	r0, [r7, #20]
 8015372:	f000 f8d5 	bl	8015520 <prvInsertTimerInActiveList>
 8015376:	4603      	mov	r3, r0
 8015378:	2b00      	cmp	r3, #0
 801537a:	d020      	beq.n	80153be <prvProcessExpiredTimer+0x86>
		{
			/* The timer expired before it was added to the active timer
			list.  Reload it now.  */
			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 801537c:	2300      	movs	r3, #0
 801537e:	9300      	str	r3, [sp, #0]
 8015380:	2300      	movs	r3, #0
 8015382:	687a      	ldr	r2, [r7, #4]
 8015384:	2100      	movs	r1, #0
 8015386:	6978      	ldr	r0, [r7, #20]
 8015388:	f7ff ff88 	bl	801529c <xTimerGenericCommand>
 801538c:	6138      	str	r0, [r7, #16]
			configASSERT( xResult );
 801538e:	693b      	ldr	r3, [r7, #16]
 8015390:	2b00      	cmp	r3, #0
 8015392:	d114      	bne.n	80153be <prvProcessExpiredTimer+0x86>
	__asm volatile
 8015394:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015398:	f383 8811 	msr	BASEPRI, r3
 801539c:	f3bf 8f6f 	isb	sy
 80153a0:	f3bf 8f4f 	dsb	sy
 80153a4:	60fb      	str	r3, [r7, #12]
}
 80153a6:	bf00      	nop
 80153a8:	bf00      	nop
 80153aa:	e7fd      	b.n	80153a8 <prvProcessExpiredTimer+0x70>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	else
	{
		pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 80153ac:	697b      	ldr	r3, [r7, #20]
 80153ae:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80153b2:	f023 0301 	bic.w	r3, r3, #1
 80153b6:	b2da      	uxtb	r2, r3
 80153b8:	697b      	ldr	r3, [r7, #20]
 80153ba:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
		mtCOVERAGE_TEST_MARKER();
	}

	/* Call the timer callback. */
	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 80153be:	697b      	ldr	r3, [r7, #20]
 80153c0:	6a1b      	ldr	r3, [r3, #32]
 80153c2:	6978      	ldr	r0, [r7, #20]
 80153c4:	4798      	blx	r3
}
 80153c6:	bf00      	nop
 80153c8:	3718      	adds	r7, #24
 80153ca:	46bd      	mov	sp, r7
 80153cc:	bd80      	pop	{r7, pc}
 80153ce:	bf00      	nop
 80153d0:	240042d8 	.word	0x240042d8

080153d4 <prvTimerTask>:
/*-----------------------------------------------------------*/

static portTASK_FUNCTION( prvTimerTask, pvParameters )
{
 80153d4:	b580      	push	{r7, lr}
 80153d6:	b084      	sub	sp, #16
 80153d8:	af00      	add	r7, sp, #0
 80153da:	6078      	str	r0, [r7, #4]

	for( ;; )
	{
		/* Query the timers list to see if it contains any timers, and if so,
		obtain the time at which the next timer will expire. */
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 80153dc:	f107 0308 	add.w	r3, r7, #8
 80153e0:	4618      	mov	r0, r3
 80153e2:	f000 f859 	bl	8015498 <prvGetNextExpireTime>
 80153e6:	60f8      	str	r0, [r7, #12]

		/* If a timer has expired, process it.  Otherwise, block this task
		until either a timer does expire, or a command is received. */
		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
 80153e8:	68bb      	ldr	r3, [r7, #8]
 80153ea:	4619      	mov	r1, r3
 80153ec:	68f8      	ldr	r0, [r7, #12]
 80153ee:	f000 f805 	bl	80153fc <prvProcessTimerOrBlockTask>

		/* Empty the command queue. */
		prvProcessReceivedCommands();
 80153f2:	f000 f8d7 	bl	80155a4 <prvProcessReceivedCommands>
		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
 80153f6:	bf00      	nop
 80153f8:	e7f0      	b.n	80153dc <prvTimerTask+0x8>
	...

080153fc <prvProcessTimerOrBlockTask>:
	}
}
/*-----------------------------------------------------------*/

static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
{
 80153fc:	b580      	push	{r7, lr}
 80153fe:	b084      	sub	sp, #16
 8015400:	af00      	add	r7, sp, #0
 8015402:	6078      	str	r0, [r7, #4]
 8015404:	6039      	str	r1, [r7, #0]
TickType_t xTimeNow;
BaseType_t xTimerListsWereSwitched;

	vTaskSuspendAll();
 8015406:	f7fe fe05 	bl	8014014 <vTaskSuspendAll>
		/* Obtain the time now to make an assessment as to whether the timer
		has expired or not.  If obtaining the time causes the lists to switch
		then don't process this timer as any timers that remained in the list
		when the lists were switched will have been processed within the
		prvSampleTimeNow() function. */
		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 801540a:	f107 0308 	add.w	r3, r7, #8
 801540e:	4618      	mov	r0, r3
 8015410:	f000 f866 	bl	80154e0 <prvSampleTimeNow>
 8015414:	60f8      	str	r0, [r7, #12]
		if( xTimerListsWereSwitched == pdFALSE )
 8015416:	68bb      	ldr	r3, [r7, #8]
 8015418:	2b00      	cmp	r3, #0
 801541a:	d130      	bne.n	801547e <prvProcessTimerOrBlockTask+0x82>
		{
			/* The tick count has not overflowed, has the timer expired? */
			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
 801541c:	683b      	ldr	r3, [r7, #0]
 801541e:	2b00      	cmp	r3, #0
 8015420:	d10a      	bne.n	8015438 <prvProcessTimerOrBlockTask+0x3c>
 8015422:	687a      	ldr	r2, [r7, #4]
 8015424:	68fb      	ldr	r3, [r7, #12]
 8015426:	429a      	cmp	r2, r3
 8015428:	d806      	bhi.n	8015438 <prvProcessTimerOrBlockTask+0x3c>
			{
				( void ) xTaskResumeAll();
 801542a:	f7fe fe01 	bl	8014030 <xTaskResumeAll>
				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
 801542e:	68f9      	ldr	r1, [r7, #12]
 8015430:	6878      	ldr	r0, [r7, #4]
 8015432:	f7ff ff81 	bl	8015338 <prvProcessExpiredTimer>
		else
		{
			( void ) xTaskResumeAll();
		}
	}
}
 8015436:	e024      	b.n	8015482 <prvProcessTimerOrBlockTask+0x86>
				if( xListWasEmpty != pdFALSE )
 8015438:	683b      	ldr	r3, [r7, #0]
 801543a:	2b00      	cmp	r3, #0
 801543c:	d008      	beq.n	8015450 <prvProcessTimerOrBlockTask+0x54>
					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
 801543e:	4b13      	ldr	r3, [pc, #76]	@ (801548c <prvProcessTimerOrBlockTask+0x90>)
 8015440:	681b      	ldr	r3, [r3, #0]
 8015442:	681b      	ldr	r3, [r3, #0]
 8015444:	2b00      	cmp	r3, #0
 8015446:	d101      	bne.n	801544c <prvProcessTimerOrBlockTask+0x50>
 8015448:	2301      	movs	r3, #1
 801544a:	e000      	b.n	801544e <prvProcessTimerOrBlockTask+0x52>
 801544c:	2300      	movs	r3, #0
 801544e:	603b      	str	r3, [r7, #0]
				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
 8015450:	4b0f      	ldr	r3, [pc, #60]	@ (8015490 <prvProcessTimerOrBlockTask+0x94>)
 8015452:	6818      	ldr	r0, [r3, #0]
 8015454:	687a      	ldr	r2, [r7, #4]
 8015456:	68fb      	ldr	r3, [r7, #12]
 8015458:	1ad3      	subs	r3, r2, r3
 801545a:	683a      	ldr	r2, [r7, #0]
 801545c:	4619      	mov	r1, r3
 801545e:	f7fd ffa9 	bl	80133b4 <vQueueWaitForMessageRestricted>
				if( xTaskResumeAll() == pdFALSE )
 8015462:	f7fe fde5 	bl	8014030 <xTaskResumeAll>
 8015466:	4603      	mov	r3, r0
 8015468:	2b00      	cmp	r3, #0
 801546a:	d10a      	bne.n	8015482 <prvProcessTimerOrBlockTask+0x86>
					portYIELD_WITHIN_API();
 801546c:	4b09      	ldr	r3, [pc, #36]	@ (8015494 <prvProcessTimerOrBlockTask+0x98>)
 801546e:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8015472:	601a      	str	r2, [r3, #0]
 8015474:	f3bf 8f4f 	dsb	sy
 8015478:	f3bf 8f6f 	isb	sy
}
 801547c:	e001      	b.n	8015482 <prvProcessTimerOrBlockTask+0x86>
			( void ) xTaskResumeAll();
 801547e:	f7fe fdd7 	bl	8014030 <xTaskResumeAll>
}
 8015482:	bf00      	nop
 8015484:	3710      	adds	r7, #16
 8015486:	46bd      	mov	sp, r7
 8015488:	bd80      	pop	{r7, pc}
 801548a:	bf00      	nop
 801548c:	240042dc 	.word	0x240042dc
 8015490:	240042e0 	.word	0x240042e0
 8015494:	e000ed04 	.word	0xe000ed04

08015498 <prvGetNextExpireTime>:
/*-----------------------------------------------------------*/

static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
{
 8015498:	b480      	push	{r7}
 801549a:	b085      	sub	sp, #20
 801549c:	af00      	add	r7, sp, #0
 801549e:	6078      	str	r0, [r7, #4]
	the timer with the nearest expiry time will expire.  If there are no
	active timers then just set the next expire time to 0.  That will cause
	this task to unblock when the tick count overflows, at which point the
	timer lists will be switched and the next expiry time can be
	re-assessed.  */
	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
 80154a0:	4b0e      	ldr	r3, [pc, #56]	@ (80154dc <prvGetNextExpireTime+0x44>)
 80154a2:	681b      	ldr	r3, [r3, #0]
 80154a4:	681b      	ldr	r3, [r3, #0]
 80154a6:	2b00      	cmp	r3, #0
 80154a8:	d101      	bne.n	80154ae <prvGetNextExpireTime+0x16>
 80154aa:	2201      	movs	r2, #1
 80154ac:	e000      	b.n	80154b0 <prvGetNextExpireTime+0x18>
 80154ae:	2200      	movs	r2, #0
 80154b0:	687b      	ldr	r3, [r7, #4]
 80154b2:	601a      	str	r2, [r3, #0]
	if( *pxListWasEmpty == pdFALSE )
 80154b4:	687b      	ldr	r3, [r7, #4]
 80154b6:	681b      	ldr	r3, [r3, #0]
 80154b8:	2b00      	cmp	r3, #0
 80154ba:	d105      	bne.n	80154c8 <prvGetNextExpireTime+0x30>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 80154bc:	4b07      	ldr	r3, [pc, #28]	@ (80154dc <prvGetNextExpireTime+0x44>)
 80154be:	681b      	ldr	r3, [r3, #0]
 80154c0:	68db      	ldr	r3, [r3, #12]
 80154c2:	681b      	ldr	r3, [r3, #0]
 80154c4:	60fb      	str	r3, [r7, #12]
 80154c6:	e001      	b.n	80154cc <prvGetNextExpireTime+0x34>
	}
	else
	{
		/* Ensure the task unblocks when the tick count rolls over. */
		xNextExpireTime = ( TickType_t ) 0U;
 80154c8:	2300      	movs	r3, #0
 80154ca:	60fb      	str	r3, [r7, #12]
	}

	return xNextExpireTime;
 80154cc:	68fb      	ldr	r3, [r7, #12]
}
 80154ce:	4618      	mov	r0, r3
 80154d0:	3714      	adds	r7, #20
 80154d2:	46bd      	mov	sp, r7
 80154d4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80154d8:	4770      	bx	lr
 80154da:	bf00      	nop
 80154dc:	240042d8 	.word	0x240042d8

080154e0 <prvSampleTimeNow>:
/*-----------------------------------------------------------*/

static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
{
 80154e0:	b580      	push	{r7, lr}
 80154e2:	b084      	sub	sp, #16
 80154e4:	af00      	add	r7, sp, #0
 80154e6:	6078      	str	r0, [r7, #4]
TickType_t xTimeNow;
PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */

	xTimeNow = xTaskGetTickCount();
 80154e8:	f7fe fe40 	bl	801416c <xTaskGetTickCount>
 80154ec:	60f8      	str	r0, [r7, #12]

	if( xTimeNow < xLastTime )
 80154ee:	4b0b      	ldr	r3, [pc, #44]	@ (801551c <prvSampleTimeNow+0x3c>)
 80154f0:	681b      	ldr	r3, [r3, #0]
 80154f2:	68fa      	ldr	r2, [r7, #12]
 80154f4:	429a      	cmp	r2, r3
 80154f6:	d205      	bcs.n	8015504 <prvSampleTimeNow+0x24>
	{
		prvSwitchTimerLists();
 80154f8:	f000 f93a 	bl	8015770 <prvSwitchTimerLists>
		*pxTimerListsWereSwitched = pdTRUE;
 80154fc:	687b      	ldr	r3, [r7, #4]
 80154fe:	2201      	movs	r2, #1
 8015500:	601a      	str	r2, [r3, #0]
 8015502:	e002      	b.n	801550a <prvSampleTimeNow+0x2a>
	}
	else
	{
		*pxTimerListsWereSwitched = pdFALSE;
 8015504:	687b      	ldr	r3, [r7, #4]
 8015506:	2200      	movs	r2, #0
 8015508:	601a      	str	r2, [r3, #0]
	}

	xLastTime = xTimeNow;
 801550a:	4a04      	ldr	r2, [pc, #16]	@ (801551c <prvSampleTimeNow+0x3c>)
 801550c:	68fb      	ldr	r3, [r7, #12]
 801550e:	6013      	str	r3, [r2, #0]

	return xTimeNow;
 8015510:	68fb      	ldr	r3, [r7, #12]
}
 8015512:	4618      	mov	r0, r3
 8015514:	3710      	adds	r7, #16
 8015516:	46bd      	mov	sp, r7
 8015518:	bd80      	pop	{r7, pc}
 801551a:	bf00      	nop
 801551c:	240042e8 	.word	0x240042e8

08015520 <prvInsertTimerInActiveList>:
/*-----------------------------------------------------------*/

static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
{
 8015520:	b580      	push	{r7, lr}
 8015522:	b086      	sub	sp, #24
 8015524:	af00      	add	r7, sp, #0
 8015526:	60f8      	str	r0, [r7, #12]
 8015528:	60b9      	str	r1, [r7, #8]
 801552a:	607a      	str	r2, [r7, #4]
 801552c:	603b      	str	r3, [r7, #0]
BaseType_t xProcessTimerNow = pdFALSE;
 801552e:	2300      	movs	r3, #0
 8015530:	617b      	str	r3, [r7, #20]

	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
 8015532:	68fb      	ldr	r3, [r7, #12]
 8015534:	68ba      	ldr	r2, [r7, #8]
 8015536:	605a      	str	r2, [r3, #4]
	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 8015538:	68fb      	ldr	r3, [r7, #12]
 801553a:	68fa      	ldr	r2, [r7, #12]
 801553c:	611a      	str	r2, [r3, #16]

	if( xNextExpiryTime <= xTimeNow )
 801553e:	68ba      	ldr	r2, [r7, #8]
 8015540:	687b      	ldr	r3, [r7, #4]
 8015542:	429a      	cmp	r2, r3
 8015544:	d812      	bhi.n	801556c <prvInsertTimerInActiveList+0x4c>
	{
		/* Has the expiry time elapsed between the command to start/reset a
		timer was issued, and the time the command was processed? */
		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
 8015546:	687a      	ldr	r2, [r7, #4]
 8015548:	683b      	ldr	r3, [r7, #0]
 801554a:	1ad2      	subs	r2, r2, r3
 801554c:	68fb      	ldr	r3, [r7, #12]
 801554e:	699b      	ldr	r3, [r3, #24]
 8015550:	429a      	cmp	r2, r3
 8015552:	d302      	bcc.n	801555a <prvInsertTimerInActiveList+0x3a>
		{
			/* The time between a command being issued and the command being
			processed actually exceeds the timers period.  */
			xProcessTimerNow = pdTRUE;
 8015554:	2301      	movs	r3, #1
 8015556:	617b      	str	r3, [r7, #20]
 8015558:	e01b      	b.n	8015592 <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
 801555a:	4b10      	ldr	r3, [pc, #64]	@ (801559c <prvInsertTimerInActiveList+0x7c>)
 801555c:	681a      	ldr	r2, [r3, #0]
 801555e:	68fb      	ldr	r3, [r7, #12]
 8015560:	3304      	adds	r3, #4
 8015562:	4619      	mov	r1, r3
 8015564:	4610      	mov	r0, r2
 8015566:	f7fc fdd4 	bl	8012112 <vListInsert>
 801556a:	e012      	b.n	8015592 <prvInsertTimerInActiveList+0x72>
		}
	}
	else
	{
		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
 801556c:	687a      	ldr	r2, [r7, #4]
 801556e:	683b      	ldr	r3, [r7, #0]
 8015570:	429a      	cmp	r2, r3
 8015572:	d206      	bcs.n	8015582 <prvInsertTimerInActiveList+0x62>
 8015574:	68ba      	ldr	r2, [r7, #8]
 8015576:	683b      	ldr	r3, [r7, #0]
 8015578:	429a      	cmp	r2, r3
 801557a:	d302      	bcc.n	8015582 <prvInsertTimerInActiveList+0x62>
		{
			/* If, since the command was issued, the tick count has overflowed
			but the expiry time has not, then the timer must have already passed
			its expiry time and should be processed immediately. */
			xProcessTimerNow = pdTRUE;
 801557c:	2301      	movs	r3, #1
 801557e:	617b      	str	r3, [r7, #20]
 8015580:	e007      	b.n	8015592 <prvInsertTimerInActiveList+0x72>
		}
		else
		{
			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 8015582:	4b07      	ldr	r3, [pc, #28]	@ (80155a0 <prvInsertTimerInActiveList+0x80>)
 8015584:	681a      	ldr	r2, [r3, #0]
 8015586:	68fb      	ldr	r3, [r7, #12]
 8015588:	3304      	adds	r3, #4
 801558a:	4619      	mov	r1, r3
 801558c:	4610      	mov	r0, r2
 801558e:	f7fc fdc0 	bl	8012112 <vListInsert>
		}
	}

	return xProcessTimerNow;
 8015592:	697b      	ldr	r3, [r7, #20]
}
 8015594:	4618      	mov	r0, r3
 8015596:	3718      	adds	r7, #24
 8015598:	46bd      	mov	sp, r7
 801559a:	bd80      	pop	{r7, pc}
 801559c:	240042dc 	.word	0x240042dc
 80155a0:	240042d8 	.word	0x240042d8

080155a4 <prvProcessReceivedCommands>:
/*-----------------------------------------------------------*/

static void	prvProcessReceivedCommands( void )
{
 80155a4:	b580      	push	{r7, lr}
 80155a6:	b08e      	sub	sp, #56	@ 0x38
 80155a8:	af02      	add	r7, sp, #8
DaemonTaskMessage_t xMessage;
Timer_t *pxTimer;
BaseType_t xTimerListsWereSwitched, xResult;
TickType_t xTimeNow;

	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 80155aa:	e0ce      	b.n	801574a <prvProcessReceivedCommands+0x1a6>
	{
		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
		{
			/* Negative commands are pended function calls rather than timer
			commands. */
			if( xMessage.xMessageID < ( BaseType_t ) 0 )
 80155ac:	687b      	ldr	r3, [r7, #4]
 80155ae:	2b00      	cmp	r3, #0
 80155b0:	da19      	bge.n	80155e6 <prvProcessReceivedCommands+0x42>
			{
				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
 80155b2:	1d3b      	adds	r3, r7, #4
 80155b4:	3304      	adds	r3, #4
 80155b6:	62fb      	str	r3, [r7, #44]	@ 0x2c

				/* The timer uses the xCallbackParameters member to request a
				callback be executed.  Check the callback is not NULL. */
				configASSERT( pxCallback );
 80155b8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80155ba:	2b00      	cmp	r3, #0
 80155bc:	d10b      	bne.n	80155d6 <prvProcessReceivedCommands+0x32>
	__asm volatile
 80155be:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80155c2:	f383 8811 	msr	BASEPRI, r3
 80155c6:	f3bf 8f6f 	isb	sy
 80155ca:	f3bf 8f4f 	dsb	sy
 80155ce:	61fb      	str	r3, [r7, #28]
}
 80155d0:	bf00      	nop
 80155d2:	bf00      	nop
 80155d4:	e7fd      	b.n	80155d2 <prvProcessReceivedCommands+0x2e>

				/* Call the function. */
				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
 80155d6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80155d8:	681b      	ldr	r3, [r3, #0]
 80155da:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80155dc:	6850      	ldr	r0, [r2, #4]
 80155de:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80155e0:	6892      	ldr	r2, [r2, #8]
 80155e2:	4611      	mov	r1, r2
 80155e4:	4798      	blx	r3
		}
		#endif /* INCLUDE_xTimerPendFunctionCall */

		/* Commands that are positive are timer commands rather than pended
		function calls. */
		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
 80155e6:	687b      	ldr	r3, [r7, #4]
 80155e8:	2b00      	cmp	r3, #0
 80155ea:	f2c0 80ae 	blt.w	801574a <prvProcessReceivedCommands+0x1a6>
		{
			/* The messages uses the xTimerParameters member to work on a
			software timer. */
			pxTimer = xMessage.u.xTimerParameters.pxTimer;
 80155ee:	68fb      	ldr	r3, [r7, #12]
 80155f0:	62bb      	str	r3, [r7, #40]	@ 0x28

			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
 80155f2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80155f4:	695b      	ldr	r3, [r3, #20]
 80155f6:	2b00      	cmp	r3, #0
 80155f8:	d004      	beq.n	8015604 <prvProcessReceivedCommands+0x60>
			{
				/* The timer is in a list, remove it. */
				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 80155fa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80155fc:	3304      	adds	r3, #4
 80155fe:	4618      	mov	r0, r3
 8015600:	f7fc fdc0 	bl	8012184 <uxListRemove>
			it must be present in the function call.  prvSampleTimeNow() must be
			called after the message is received from xTimerQueue so there is no
			possibility of a higher priority task adding a message to the message
			queue with a time that is ahead of the timer daemon task (because it
			pre-empted the timer daemon task after the xTimeNow value was set). */
			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
 8015604:	463b      	mov	r3, r7
 8015606:	4618      	mov	r0, r3
 8015608:	f7ff ff6a 	bl	80154e0 <prvSampleTimeNow>
 801560c:	6278      	str	r0, [r7, #36]	@ 0x24

			switch( xMessage.xMessageID )
 801560e:	687b      	ldr	r3, [r7, #4]
 8015610:	2b09      	cmp	r3, #9
 8015612:	f200 8097 	bhi.w	8015744 <prvProcessReceivedCommands+0x1a0>
 8015616:	a201      	add	r2, pc, #4	@ (adr r2, 801561c <prvProcessReceivedCommands+0x78>)
 8015618:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801561c:	08015645 	.word	0x08015645
 8015620:	08015645 	.word	0x08015645
 8015624:	08015645 	.word	0x08015645
 8015628:	080156bb 	.word	0x080156bb
 801562c:	080156cf 	.word	0x080156cf
 8015630:	0801571b 	.word	0x0801571b
 8015634:	08015645 	.word	0x08015645
 8015638:	08015645 	.word	0x08015645
 801563c:	080156bb 	.word	0x080156bb
 8015640:	080156cf 	.word	0x080156cf
				case tmrCOMMAND_START_FROM_ISR :
				case tmrCOMMAND_RESET :
				case tmrCOMMAND_RESET_FROM_ISR :
				case tmrCOMMAND_START_DONT_TRACE :
					/* Start or restart a timer. */
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 8015644:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015646:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801564a:	f043 0301 	orr.w	r3, r3, #1
 801564e:	b2da      	uxtb	r2, r3
 8015650:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015652:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
 8015656:	68ba      	ldr	r2, [r7, #8]
 8015658:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801565a:	699b      	ldr	r3, [r3, #24]
 801565c:	18d1      	adds	r1, r2, r3
 801565e:	68bb      	ldr	r3, [r7, #8]
 8015660:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8015662:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8015664:	f7ff ff5c 	bl	8015520 <prvInsertTimerInActiveList>
 8015668:	4603      	mov	r3, r0
 801566a:	2b00      	cmp	r3, #0
 801566c:	d06c      	beq.n	8015748 <prvProcessReceivedCommands+0x1a4>
					{
						/* The timer expired before it was added to the active
						timer list.  Process it now. */
						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 801566e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015670:	6a1b      	ldr	r3, [r3, #32]
 8015672:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8015674:	4798      	blx	r3
						traceTIMER_EXPIRED( pxTimer );

						if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 8015676:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015678:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801567c:	f003 0304 	and.w	r3, r3, #4
 8015680:	2b00      	cmp	r3, #0
 8015682:	d061      	beq.n	8015748 <prvProcessReceivedCommands+0x1a4>
						{
							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
 8015684:	68ba      	ldr	r2, [r7, #8]
 8015686:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015688:	699b      	ldr	r3, [r3, #24]
 801568a:	441a      	add	r2, r3
 801568c:	2300      	movs	r3, #0
 801568e:	9300      	str	r3, [sp, #0]
 8015690:	2300      	movs	r3, #0
 8015692:	2100      	movs	r1, #0
 8015694:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8015696:	f7ff fe01 	bl	801529c <xTimerGenericCommand>
 801569a:	6238      	str	r0, [r7, #32]
							configASSERT( xResult );
 801569c:	6a3b      	ldr	r3, [r7, #32]
 801569e:	2b00      	cmp	r3, #0
 80156a0:	d152      	bne.n	8015748 <prvProcessReceivedCommands+0x1a4>
	__asm volatile
 80156a2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80156a6:	f383 8811 	msr	BASEPRI, r3
 80156aa:	f3bf 8f6f 	isb	sy
 80156ae:	f3bf 8f4f 	dsb	sy
 80156b2:	61bb      	str	r3, [r7, #24]
}
 80156b4:	bf00      	nop
 80156b6:	bf00      	nop
 80156b8:	e7fd      	b.n	80156b6 <prvProcessReceivedCommands+0x112>
					break;

				case tmrCOMMAND_STOP :
				case tmrCOMMAND_STOP_FROM_ISR :
					/* The timer has already been removed from the active list. */
					pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 80156ba:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80156bc:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80156c0:	f023 0301 	bic.w	r3, r3, #1
 80156c4:	b2da      	uxtb	r2, r3
 80156c6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80156c8:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 80156cc:	e03d      	b.n	801574a <prvProcessReceivedCommands+0x1a6>

				case tmrCOMMAND_CHANGE_PERIOD :
				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
 80156ce:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80156d0:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80156d4:	f043 0301 	orr.w	r3, r3, #1
 80156d8:	b2da      	uxtb	r2, r3
 80156da:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80156dc:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
 80156e0:	68ba      	ldr	r2, [r7, #8]
 80156e2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80156e4:	619a      	str	r2, [r3, #24]
					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
 80156e6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80156e8:	699b      	ldr	r3, [r3, #24]
 80156ea:	2b00      	cmp	r3, #0
 80156ec:	d10b      	bne.n	8015706 <prvProcessReceivedCommands+0x162>
	__asm volatile
 80156ee:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80156f2:	f383 8811 	msr	BASEPRI, r3
 80156f6:	f3bf 8f6f 	isb	sy
 80156fa:	f3bf 8f4f 	dsb	sy
 80156fe:	617b      	str	r3, [r7, #20]
}
 8015700:	bf00      	nop
 8015702:	bf00      	nop
 8015704:	e7fd      	b.n	8015702 <prvProcessReceivedCommands+0x15e>
					be longer or shorter than the old one.  The command time is
					therefore set to the current time, and as the period cannot
					be zero the next expiry time can only be in the future,
					meaning (unlike for the xTimerStart() case above) there is
					no fail case that needs to be handled here. */
					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
 8015706:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015708:	699a      	ldr	r2, [r3, #24]
 801570a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801570c:	18d1      	adds	r1, r2, r3
 801570e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015710:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8015712:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8015714:	f7ff ff04 	bl	8015520 <prvInsertTimerInActiveList>
					break;
 8015718:	e017      	b.n	801574a <prvProcessReceivedCommands+0x1a6>
					#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
					{
						/* The timer has already been removed from the active list,
						just free up the memory if the memory was dynamically
						allocated. */
						if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
 801571a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801571c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015720:	f003 0302 	and.w	r3, r3, #2
 8015724:	2b00      	cmp	r3, #0
 8015726:	d103      	bne.n	8015730 <prvProcessReceivedCommands+0x18c>
						{
							vPortFree( pxTimer );
 8015728:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801572a:	f000 fc35 	bl	8015f98 <vPortFree>
						no need to free the memory - just mark the timer as
						"not active". */
						pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
					}
					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
					break;
 801572e:	e00c      	b.n	801574a <prvProcessReceivedCommands+0x1a6>
							pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
 8015730:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8015732:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8015736:	f023 0301 	bic.w	r3, r3, #1
 801573a:	b2da      	uxtb	r2, r3
 801573c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801573e:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
					break;
 8015742:	e002      	b.n	801574a <prvProcessReceivedCommands+0x1a6>

				default	:
					/* Don't expect to get here. */
					break;
 8015744:	bf00      	nop
 8015746:	e000      	b.n	801574a <prvProcessReceivedCommands+0x1a6>
					break;
 8015748:	bf00      	nop
	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
 801574a:	4b08      	ldr	r3, [pc, #32]	@ (801576c <prvProcessReceivedCommands+0x1c8>)
 801574c:	681b      	ldr	r3, [r3, #0]
 801574e:	1d39      	adds	r1, r7, #4
 8015750:	2200      	movs	r2, #0
 8015752:	4618      	mov	r0, r3
 8015754:	f7fd f9dc 	bl	8012b10 <xQueueReceive>
 8015758:	4603      	mov	r3, r0
 801575a:	2b00      	cmp	r3, #0
 801575c:	f47f af26 	bne.w	80155ac <prvProcessReceivedCommands+0x8>
			}
		}
	}
}
 8015760:	bf00      	nop
 8015762:	bf00      	nop
 8015764:	3730      	adds	r7, #48	@ 0x30
 8015766:	46bd      	mov	sp, r7
 8015768:	bd80      	pop	{r7, pc}
 801576a:	bf00      	nop
 801576c:	240042e0 	.word	0x240042e0

08015770 <prvSwitchTimerLists>:
/*-----------------------------------------------------------*/

static void prvSwitchTimerLists( void )
{
 8015770:	b580      	push	{r7, lr}
 8015772:	b088      	sub	sp, #32
 8015774:	af02      	add	r7, sp, #8

	/* The tick count has overflowed.  The timer lists must be switched.
	If there are any timers still referenced from the current timer list
	then they must have expired and should be processed before the lists
	are switched. */
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 8015776:	e049      	b.n	801580c <prvSwitchTimerLists+0x9c>
	{
		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
 8015778:	4b2e      	ldr	r3, [pc, #184]	@ (8015834 <prvSwitchTimerLists+0xc4>)
 801577a:	681b      	ldr	r3, [r3, #0]
 801577c:	68db      	ldr	r3, [r3, #12]
 801577e:	681b      	ldr	r3, [r3, #0]
 8015780:	613b      	str	r3, [r7, #16]

		/* Remove the timer from the list. */
		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
 8015782:	4b2c      	ldr	r3, [pc, #176]	@ (8015834 <prvSwitchTimerLists+0xc4>)
 8015784:	681b      	ldr	r3, [r3, #0]
 8015786:	68db      	ldr	r3, [r3, #12]
 8015788:	68db      	ldr	r3, [r3, #12]
 801578a:	60fb      	str	r3, [r7, #12]
		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
 801578c:	68fb      	ldr	r3, [r7, #12]
 801578e:	3304      	adds	r3, #4
 8015790:	4618      	mov	r0, r3
 8015792:	f7fc fcf7 	bl	8012184 <uxListRemove>
		traceTIMER_EXPIRED( pxTimer );

		/* Execute its callback, then send a command to restart the timer if
		it is an auto-reload timer.  It cannot be restarted here as the lists
		have not yet been switched. */
		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
 8015796:	68fb      	ldr	r3, [r7, #12]
 8015798:	6a1b      	ldr	r3, [r3, #32]
 801579a:	68f8      	ldr	r0, [r7, #12]
 801579c:	4798      	blx	r3

		if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
 801579e:	68fb      	ldr	r3, [r7, #12]
 80157a0:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80157a4:	f003 0304 	and.w	r3, r3, #4
 80157a8:	2b00      	cmp	r3, #0
 80157aa:	d02f      	beq.n	801580c <prvSwitchTimerLists+0x9c>
			the timer going into the same timer list then it has already expired
			and the timer should be re-inserted into the current list so it is
			processed again within this loop.  Otherwise a command should be sent
			to restart the timer to ensure it is only inserted into a list after
			the lists have been swapped. */
			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
 80157ac:	68fb      	ldr	r3, [r7, #12]
 80157ae:	699b      	ldr	r3, [r3, #24]
 80157b0:	693a      	ldr	r2, [r7, #16]
 80157b2:	4413      	add	r3, r2
 80157b4:	60bb      	str	r3, [r7, #8]
			if( xReloadTime > xNextExpireTime )
 80157b6:	68ba      	ldr	r2, [r7, #8]
 80157b8:	693b      	ldr	r3, [r7, #16]
 80157ba:	429a      	cmp	r2, r3
 80157bc:	d90e      	bls.n	80157dc <prvSwitchTimerLists+0x6c>
			{
				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
 80157be:	68fb      	ldr	r3, [r7, #12]
 80157c0:	68ba      	ldr	r2, [r7, #8]
 80157c2:	605a      	str	r2, [r3, #4]
				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
 80157c4:	68fb      	ldr	r3, [r7, #12]
 80157c6:	68fa      	ldr	r2, [r7, #12]
 80157c8:	611a      	str	r2, [r3, #16]
				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
 80157ca:	4b1a      	ldr	r3, [pc, #104]	@ (8015834 <prvSwitchTimerLists+0xc4>)
 80157cc:	681a      	ldr	r2, [r3, #0]
 80157ce:	68fb      	ldr	r3, [r7, #12]
 80157d0:	3304      	adds	r3, #4
 80157d2:	4619      	mov	r1, r3
 80157d4:	4610      	mov	r0, r2
 80157d6:	f7fc fc9c 	bl	8012112 <vListInsert>
 80157da:	e017      	b.n	801580c <prvSwitchTimerLists+0x9c>
			}
			else
			{
				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
 80157dc:	2300      	movs	r3, #0
 80157de:	9300      	str	r3, [sp, #0]
 80157e0:	2300      	movs	r3, #0
 80157e2:	693a      	ldr	r2, [r7, #16]
 80157e4:	2100      	movs	r1, #0
 80157e6:	68f8      	ldr	r0, [r7, #12]
 80157e8:	f7ff fd58 	bl	801529c <xTimerGenericCommand>
 80157ec:	6078      	str	r0, [r7, #4]
				configASSERT( xResult );
 80157ee:	687b      	ldr	r3, [r7, #4]
 80157f0:	2b00      	cmp	r3, #0
 80157f2:	d10b      	bne.n	801580c <prvSwitchTimerLists+0x9c>
	__asm volatile
 80157f4:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80157f8:	f383 8811 	msr	BASEPRI, r3
 80157fc:	f3bf 8f6f 	isb	sy
 8015800:	f3bf 8f4f 	dsb	sy
 8015804:	603b      	str	r3, [r7, #0]
}
 8015806:	bf00      	nop
 8015808:	bf00      	nop
 801580a:	e7fd      	b.n	8015808 <prvSwitchTimerLists+0x98>
	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
 801580c:	4b09      	ldr	r3, [pc, #36]	@ (8015834 <prvSwitchTimerLists+0xc4>)
 801580e:	681b      	ldr	r3, [r3, #0]
 8015810:	681b      	ldr	r3, [r3, #0]
 8015812:	2b00      	cmp	r3, #0
 8015814:	d1b0      	bne.n	8015778 <prvSwitchTimerLists+0x8>
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}

	pxTemp = pxCurrentTimerList;
 8015816:	4b07      	ldr	r3, [pc, #28]	@ (8015834 <prvSwitchTimerLists+0xc4>)
 8015818:	681b      	ldr	r3, [r3, #0]
 801581a:	617b      	str	r3, [r7, #20]
	pxCurrentTimerList = pxOverflowTimerList;
 801581c:	4b06      	ldr	r3, [pc, #24]	@ (8015838 <prvSwitchTimerLists+0xc8>)
 801581e:	681b      	ldr	r3, [r3, #0]
 8015820:	4a04      	ldr	r2, [pc, #16]	@ (8015834 <prvSwitchTimerLists+0xc4>)
 8015822:	6013      	str	r3, [r2, #0]
	pxOverflowTimerList = pxTemp;
 8015824:	4a04      	ldr	r2, [pc, #16]	@ (8015838 <prvSwitchTimerLists+0xc8>)
 8015826:	697b      	ldr	r3, [r7, #20]
 8015828:	6013      	str	r3, [r2, #0]
}
 801582a:	bf00      	nop
 801582c:	3718      	adds	r7, #24
 801582e:	46bd      	mov	sp, r7
 8015830:	bd80      	pop	{r7, pc}
 8015832:	bf00      	nop
 8015834:	240042d8 	.word	0x240042d8
 8015838:	240042dc 	.word	0x240042dc

0801583c <prvCheckForValidListAndQueue>:
/*-----------------------------------------------------------*/

static void prvCheckForValidListAndQueue( void )
{
 801583c:	b580      	push	{r7, lr}
 801583e:	b082      	sub	sp, #8
 8015840:	af02      	add	r7, sp, #8
	/* Check that the list from which active timers are referenced, and the
	queue used to communicate with the timer service, have been
	initialised. */
	taskENTER_CRITICAL();
 8015842:	f000 f9b9 	bl	8015bb8 <vPortEnterCritical>
	{
		if( xTimerQueue == NULL )
 8015846:	4b15      	ldr	r3, [pc, #84]	@ (801589c <prvCheckForValidListAndQueue+0x60>)
 8015848:	681b      	ldr	r3, [r3, #0]
 801584a:	2b00      	cmp	r3, #0
 801584c:	d120      	bne.n	8015890 <prvCheckForValidListAndQueue+0x54>
		{
			vListInitialise( &xActiveTimerList1 );
 801584e:	4814      	ldr	r0, [pc, #80]	@ (80158a0 <prvCheckForValidListAndQueue+0x64>)
 8015850:	f7fc fc0e 	bl	8012070 <vListInitialise>
			vListInitialise( &xActiveTimerList2 );
 8015854:	4813      	ldr	r0, [pc, #76]	@ (80158a4 <prvCheckForValidListAndQueue+0x68>)
 8015856:	f7fc fc0b 	bl	8012070 <vListInitialise>
			pxCurrentTimerList = &xActiveTimerList1;
 801585a:	4b13      	ldr	r3, [pc, #76]	@ (80158a8 <prvCheckForValidListAndQueue+0x6c>)
 801585c:	4a10      	ldr	r2, [pc, #64]	@ (80158a0 <prvCheckForValidListAndQueue+0x64>)
 801585e:	601a      	str	r2, [r3, #0]
			pxOverflowTimerList = &xActiveTimerList2;
 8015860:	4b12      	ldr	r3, [pc, #72]	@ (80158ac <prvCheckForValidListAndQueue+0x70>)
 8015862:	4a10      	ldr	r2, [pc, #64]	@ (80158a4 <prvCheckForValidListAndQueue+0x68>)
 8015864:	601a      	str	r2, [r3, #0]
				/* The timer queue is allocated statically in case
				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
				static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
				static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */

				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
 8015866:	2300      	movs	r3, #0
 8015868:	9300      	str	r3, [sp, #0]
 801586a:	4b11      	ldr	r3, [pc, #68]	@ (80158b0 <prvCheckForValidListAndQueue+0x74>)
 801586c:	4a11      	ldr	r2, [pc, #68]	@ (80158b4 <prvCheckForValidListAndQueue+0x78>)
 801586e:	2110      	movs	r1, #16
 8015870:	200a      	movs	r0, #10
 8015872:	f7fc fd1b 	bl	80122ac <xQueueGenericCreateStatic>
 8015876:	4603      	mov	r3, r0
 8015878:	4a08      	ldr	r2, [pc, #32]	@ (801589c <prvCheckForValidListAndQueue+0x60>)
 801587a:	6013      	str	r3, [r2, #0]
			}
			#endif

			#if ( configQUEUE_REGISTRY_SIZE > 0 )
			{
				if( xTimerQueue != NULL )
 801587c:	4b07      	ldr	r3, [pc, #28]	@ (801589c <prvCheckForValidListAndQueue+0x60>)
 801587e:	681b      	ldr	r3, [r3, #0]
 8015880:	2b00      	cmp	r3, #0
 8015882:	d005      	beq.n	8015890 <prvCheckForValidListAndQueue+0x54>
				{
					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
 8015884:	4b05      	ldr	r3, [pc, #20]	@ (801589c <prvCheckForValidListAndQueue+0x60>)
 8015886:	681b      	ldr	r3, [r3, #0]
 8015888:	490b      	ldr	r1, [pc, #44]	@ (80158b8 <prvCheckForValidListAndQueue+0x7c>)
 801588a:	4618      	mov	r0, r3
 801588c:	f7fd fd3e 	bl	801330c <vQueueAddToRegistry>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
	taskEXIT_CRITICAL();
 8015890:	f000 f9c4 	bl	8015c1c <vPortExitCritical>
}
 8015894:	bf00      	nop
 8015896:	46bd      	mov	sp, r7
 8015898:	bd80      	pop	{r7, pc}
 801589a:	bf00      	nop
 801589c:	240042e0 	.word	0x240042e0
 80158a0:	240042b0 	.word	0x240042b0
 80158a4:	240042c4 	.word	0x240042c4
 80158a8:	240042d8 	.word	0x240042d8
 80158ac:	240042dc 	.word	0x240042dc
 80158b0:	2400438c 	.word	0x2400438c
 80158b4:	240042ec 	.word	0x240042ec
 80158b8:	0802ddf4 	.word	0x0802ddf4

080158bc <xTimerIsTimerActive>:
/*-----------------------------------------------------------*/

BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
{
 80158bc:	b580      	push	{r7, lr}
 80158be:	b086      	sub	sp, #24
 80158c0:	af00      	add	r7, sp, #0
 80158c2:	6078      	str	r0, [r7, #4]
BaseType_t xReturn;
Timer_t *pxTimer = xTimer;
 80158c4:	687b      	ldr	r3, [r7, #4]
 80158c6:	613b      	str	r3, [r7, #16]

	configASSERT( xTimer );
 80158c8:	687b      	ldr	r3, [r7, #4]
 80158ca:	2b00      	cmp	r3, #0
 80158cc:	d10b      	bne.n	80158e6 <xTimerIsTimerActive+0x2a>
	__asm volatile
 80158ce:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80158d2:	f383 8811 	msr	BASEPRI, r3
 80158d6:	f3bf 8f6f 	isb	sy
 80158da:	f3bf 8f4f 	dsb	sy
 80158de:	60fb      	str	r3, [r7, #12]
}
 80158e0:	bf00      	nop
 80158e2:	bf00      	nop
 80158e4:	e7fd      	b.n	80158e2 <xTimerIsTimerActive+0x26>

	/* Is the timer in the list of active timers? */
	taskENTER_CRITICAL();
 80158e6:	f000 f967 	bl	8015bb8 <vPortEnterCritical>
	{
		if( ( pxTimer->ucStatus & tmrSTATUS_IS_ACTIVE ) == 0 )
 80158ea:	693b      	ldr	r3, [r7, #16]
 80158ec:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80158f0:	f003 0301 	and.w	r3, r3, #1
 80158f4:	2b00      	cmp	r3, #0
 80158f6:	d102      	bne.n	80158fe <xTimerIsTimerActive+0x42>
		{
			xReturn = pdFALSE;
 80158f8:	2300      	movs	r3, #0
 80158fa:	617b      	str	r3, [r7, #20]
 80158fc:	e001      	b.n	8015902 <xTimerIsTimerActive+0x46>
		}
		else
		{
			xReturn = pdTRUE;
 80158fe:	2301      	movs	r3, #1
 8015900:	617b      	str	r3, [r7, #20]
		}
	}
	taskEXIT_CRITICAL();
 8015902:	f000 f98b 	bl	8015c1c <vPortExitCritical>

	return xReturn;
 8015906:	697b      	ldr	r3, [r7, #20]
} /*lint !e818 Can't be pointer to const due to the typedef. */
 8015908:	4618      	mov	r0, r3
 801590a:	3718      	adds	r7, #24
 801590c:	46bd      	mov	sp, r7
 801590e:	bd80      	pop	{r7, pc}

08015910 <pvTimerGetTimerID>:
/*-----------------------------------------------------------*/

void *pvTimerGetTimerID( const TimerHandle_t xTimer )
{
 8015910:	b580      	push	{r7, lr}
 8015912:	b086      	sub	sp, #24
 8015914:	af00      	add	r7, sp, #0
 8015916:	6078      	str	r0, [r7, #4]
Timer_t * const pxTimer = xTimer;
 8015918:	687b      	ldr	r3, [r7, #4]
 801591a:	617b      	str	r3, [r7, #20]
void *pvReturn;

	configASSERT( xTimer );
 801591c:	687b      	ldr	r3, [r7, #4]
 801591e:	2b00      	cmp	r3, #0
 8015920:	d10b      	bne.n	801593a <pvTimerGetTimerID+0x2a>
	__asm volatile
 8015922:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015926:	f383 8811 	msr	BASEPRI, r3
 801592a:	f3bf 8f6f 	isb	sy
 801592e:	f3bf 8f4f 	dsb	sy
 8015932:	60fb      	str	r3, [r7, #12]
}
 8015934:	bf00      	nop
 8015936:	bf00      	nop
 8015938:	e7fd      	b.n	8015936 <pvTimerGetTimerID+0x26>

	taskENTER_CRITICAL();
 801593a:	f000 f93d 	bl	8015bb8 <vPortEnterCritical>
	{
		pvReturn = pxTimer->pvTimerID;
 801593e:	697b      	ldr	r3, [r7, #20]
 8015940:	69db      	ldr	r3, [r3, #28]
 8015942:	613b      	str	r3, [r7, #16]
	}
	taskEXIT_CRITICAL();
 8015944:	f000 f96a 	bl	8015c1c <vPortExitCritical>

	return pvReturn;
 8015948:	693b      	ldr	r3, [r7, #16]
}
 801594a:	4618      	mov	r0, r3
 801594c:	3718      	adds	r7, #24
 801594e:	46bd      	mov	sp, r7
 8015950:	bd80      	pop	{r7, pc}
	...

08015954 <pxPortInitialiseStack>:

/*
 * See header file for description.
 */
StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
{
 8015954:	b480      	push	{r7}
 8015956:	b085      	sub	sp, #20
 8015958:	af00      	add	r7, sp, #0
 801595a:	60f8      	str	r0, [r7, #12]
 801595c:	60b9      	str	r1, [r7, #8]
 801595e:	607a      	str	r2, [r7, #4]
	/* Simulate the stack frame as it would be created by a context switch
	interrupt. */

	/* Offset added to account for the way the MCU uses the stack on entry/exit
	of interrupts, and to ensure alignment. */
	pxTopOfStack--;
 8015960:	68fb      	ldr	r3, [r7, #12]
 8015962:	3b04      	subs	r3, #4
 8015964:	60fb      	str	r3, [r7, #12]

	*pxTopOfStack = portINITIAL_XPSR;	/* xPSR */
 8015966:	68fb      	ldr	r3, [r7, #12]
 8015968:	f04f 7280 	mov.w	r2, #16777216	@ 0x1000000
 801596c:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 801596e:	68fb      	ldr	r3, [r7, #12]
 8015970:	3b04      	subs	r3, #4
 8015972:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK;	/* PC */
 8015974:	68bb      	ldr	r3, [r7, #8]
 8015976:	f023 0201 	bic.w	r2, r3, #1
 801597a:	68fb      	ldr	r3, [r7, #12]
 801597c:	601a      	str	r2, [r3, #0]
	pxTopOfStack--;
 801597e:	68fb      	ldr	r3, [r7, #12]
 8015980:	3b04      	subs	r3, #4
 8015982:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS;	/* LR */
 8015984:	4a0c      	ldr	r2, [pc, #48]	@ (80159b8 <pxPortInitialiseStack+0x64>)
 8015986:	68fb      	ldr	r3, [r7, #12]
 8015988:	601a      	str	r2, [r3, #0]

	/* Save code space by skipping register initialisation. */
	pxTopOfStack -= 5;	/* R12, R3, R2 and R1. */
 801598a:	68fb      	ldr	r3, [r7, #12]
 801598c:	3b14      	subs	r3, #20
 801598e:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = ( StackType_t ) pvParameters;	/* R0 */
 8015990:	687a      	ldr	r2, [r7, #4]
 8015992:	68fb      	ldr	r3, [r7, #12]
 8015994:	601a      	str	r2, [r3, #0]

	/* A save method is being used that requires each task to maintain its
	own exec return value. */
	pxTopOfStack--;
 8015996:	68fb      	ldr	r3, [r7, #12]
 8015998:	3b04      	subs	r3, #4
 801599a:	60fb      	str	r3, [r7, #12]
	*pxTopOfStack = portINITIAL_EXC_RETURN;
 801599c:	68fb      	ldr	r3, [r7, #12]
 801599e:	f06f 0202 	mvn.w	r2, #2
 80159a2:	601a      	str	r2, [r3, #0]

	pxTopOfStack -= 8;	/* R11, R10, R9, R8, R7, R6, R5 and R4. */
 80159a4:	68fb      	ldr	r3, [r7, #12]
 80159a6:	3b20      	subs	r3, #32
 80159a8:	60fb      	str	r3, [r7, #12]

	return pxTopOfStack;
 80159aa:	68fb      	ldr	r3, [r7, #12]
}
 80159ac:	4618      	mov	r0, r3
 80159ae:	3714      	adds	r7, #20
 80159b0:	46bd      	mov	sp, r7
 80159b2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80159b6:	4770      	bx	lr
 80159b8:	080159bd 	.word	0x080159bd

080159bc <prvTaskExitError>:
/*-----------------------------------------------------------*/

static void prvTaskExitError( void )
{
 80159bc:	b480      	push	{r7}
 80159be:	b085      	sub	sp, #20
 80159c0:	af00      	add	r7, sp, #0
volatile uint32_t ulDummy = 0;
 80159c2:	2300      	movs	r3, #0
 80159c4:	607b      	str	r3, [r7, #4]
	its caller as there is nothing to return to.  If a task wants to exit it
	should instead call vTaskDelete( NULL ).

	Artificially force an assert() to be triggered if configASSERT() is
	defined, then stop here so application writers can catch the error. */
	configASSERT( uxCriticalNesting == ~0UL );
 80159c6:	4b13      	ldr	r3, [pc, #76]	@ (8015a14 <prvTaskExitError+0x58>)
 80159c8:	681b      	ldr	r3, [r3, #0]
 80159ca:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80159ce:	d00b      	beq.n	80159e8 <prvTaskExitError+0x2c>
	__asm volatile
 80159d0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80159d4:	f383 8811 	msr	BASEPRI, r3
 80159d8:	f3bf 8f6f 	isb	sy
 80159dc:	f3bf 8f4f 	dsb	sy
 80159e0:	60fb      	str	r3, [r7, #12]
}
 80159e2:	bf00      	nop
 80159e4:	bf00      	nop
 80159e6:	e7fd      	b.n	80159e4 <prvTaskExitError+0x28>
	__asm volatile
 80159e8:	f04f 0350 	mov.w	r3, #80	@ 0x50
 80159ec:	f383 8811 	msr	BASEPRI, r3
 80159f0:	f3bf 8f6f 	isb	sy
 80159f4:	f3bf 8f4f 	dsb	sy
 80159f8:	60bb      	str	r3, [r7, #8]
}
 80159fa:	bf00      	nop
	portDISABLE_INTERRUPTS();
	while( ulDummy == 0 )
 80159fc:	bf00      	nop
 80159fe:	687b      	ldr	r3, [r7, #4]
 8015a00:	2b00      	cmp	r3, #0
 8015a02:	d0fc      	beq.n	80159fe <prvTaskExitError+0x42>
		about code appearing after this function is called - making ulDummy
		volatile makes the compiler think the function could return and
		therefore not output an 'unreachable code' warning for code that appears
		after it. */
	}
}
 8015a04:	bf00      	nop
 8015a06:	bf00      	nop
 8015a08:	3714      	adds	r7, #20
 8015a0a:	46bd      	mov	sp, r7
 8015a0c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015a10:	4770      	bx	lr
 8015a12:	bf00      	nop
 8015a14:	24000048 	.word	0x24000048
	...

08015a20 <SVC_Handler>:
/*-----------------------------------------------------------*/

void vPortSVCHandler( void )
{
	__asm volatile (
 8015a20:	4b07      	ldr	r3, [pc, #28]	@ (8015a40 <pxCurrentTCBConst2>)
 8015a22:	6819      	ldr	r1, [r3, #0]
 8015a24:	6808      	ldr	r0, [r1, #0]
 8015a26:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8015a2a:	f380 8809 	msr	PSP, r0
 8015a2e:	f3bf 8f6f 	isb	sy
 8015a32:	f04f 0000 	mov.w	r0, #0
 8015a36:	f380 8811 	msr	BASEPRI, r0
 8015a3a:	4770      	bx	lr
 8015a3c:	f3af 8000 	nop.w

08015a40 <pxCurrentTCBConst2>:
 8015a40:	24003db0 	.word	0x24003db0
					"	bx r14							\n"
					"									\n"
					"	.align 4						\n"
					"pxCurrentTCBConst2: .word pxCurrentTCB				\n"
				);
}
 8015a44:	bf00      	nop
 8015a46:	bf00      	nop

08015a48 <prvPortStartFirstTask>:
{
	/* Start the first task.  This also clears the bit that indicates the FPU is
	in use in case the FPU was used before the scheduler was started - which
	would otherwise result in the unnecessary leaving of space in the SVC stack
	for lazy saving of FPU registers. */
	__asm volatile(
 8015a48:	4808      	ldr	r0, [pc, #32]	@ (8015a6c <prvPortStartFirstTask+0x24>)
 8015a4a:	6800      	ldr	r0, [r0, #0]
 8015a4c:	6800      	ldr	r0, [r0, #0]
 8015a4e:	f380 8808 	msr	MSP, r0
 8015a52:	f04f 0000 	mov.w	r0, #0
 8015a56:	f380 8814 	msr	CONTROL, r0
 8015a5a:	b662      	cpsie	i
 8015a5c:	b661      	cpsie	f
 8015a5e:	f3bf 8f4f 	dsb	sy
 8015a62:	f3bf 8f6f 	isb	sy
 8015a66:	df00      	svc	0
 8015a68:	bf00      	nop
					" dsb					\n"
					" isb					\n"
					" svc 0					\n" /* System call to start first task. */
					" nop					\n"
				);
}
 8015a6a:	bf00      	nop
 8015a6c:	e000ed08 	.word	0xe000ed08

08015a70 <xPortStartScheduler>:

/*
 * See header file for description.
 */
BaseType_t xPortStartScheduler( void )
{
 8015a70:	b580      	push	{r7, lr}
 8015a72:	b086      	sub	sp, #24
 8015a74:	af00      	add	r7, sp, #0
	configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY );

	/* This port can be used on all revisions of the Cortex-M7 core other than
	the r0p1 parts.  r0p1 parts should use the port from the
	/source/portable/GCC/ARM_CM7/r0p1 directory. */
	configASSERT( portCPUID != portCORTEX_M7_r0p1_ID );
 8015a76:	4b47      	ldr	r3, [pc, #284]	@ (8015b94 <xPortStartScheduler+0x124>)
 8015a78:	681b      	ldr	r3, [r3, #0]
 8015a7a:	4a47      	ldr	r2, [pc, #284]	@ (8015b98 <xPortStartScheduler+0x128>)
 8015a7c:	4293      	cmp	r3, r2
 8015a7e:	d10b      	bne.n	8015a98 <xPortStartScheduler+0x28>
	__asm volatile
 8015a80:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015a84:	f383 8811 	msr	BASEPRI, r3
 8015a88:	f3bf 8f6f 	isb	sy
 8015a8c:	f3bf 8f4f 	dsb	sy
 8015a90:	613b      	str	r3, [r7, #16]
}
 8015a92:	bf00      	nop
 8015a94:	bf00      	nop
 8015a96:	e7fd      	b.n	8015a94 <xPortStartScheduler+0x24>
	configASSERT( portCPUID != portCORTEX_M7_r0p0_ID );
 8015a98:	4b3e      	ldr	r3, [pc, #248]	@ (8015b94 <xPortStartScheduler+0x124>)
 8015a9a:	681b      	ldr	r3, [r3, #0]
 8015a9c:	4a3f      	ldr	r2, [pc, #252]	@ (8015b9c <xPortStartScheduler+0x12c>)
 8015a9e:	4293      	cmp	r3, r2
 8015aa0:	d10b      	bne.n	8015aba <xPortStartScheduler+0x4a>
	__asm volatile
 8015aa2:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015aa6:	f383 8811 	msr	BASEPRI, r3
 8015aaa:	f3bf 8f6f 	isb	sy
 8015aae:	f3bf 8f4f 	dsb	sy
 8015ab2:	60fb      	str	r3, [r7, #12]
}
 8015ab4:	bf00      	nop
 8015ab6:	bf00      	nop
 8015ab8:	e7fd      	b.n	8015ab6 <xPortStartScheduler+0x46>

	#if( configASSERT_DEFINED == 1 )
	{
		volatile uint32_t ulOriginalPriority;
		volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER );
 8015aba:	4b39      	ldr	r3, [pc, #228]	@ (8015ba0 <xPortStartScheduler+0x130>)
 8015abc:	617b      	str	r3, [r7, #20]
		functions can be called.  ISR safe functions are those that end in
		"FromISR".  FreeRTOS maintains separate thread and ISR API functions to
		ensure interrupt entry is as fast and simple as possible.

		Save the interrupt priority value that is about to be clobbered. */
		ulOriginalPriority = *pucFirstUserPriorityRegister;
 8015abe:	697b      	ldr	r3, [r7, #20]
 8015ac0:	781b      	ldrb	r3, [r3, #0]
 8015ac2:	b2db      	uxtb	r3, r3
 8015ac4:	607b      	str	r3, [r7, #4]

		/* Determine the number of priority bits available.  First write to all
		possible bits. */
		*pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE;
 8015ac6:	697b      	ldr	r3, [r7, #20]
 8015ac8:	22ff      	movs	r2, #255	@ 0xff
 8015aca:	701a      	strb	r2, [r3, #0]

		/* Read the value back to see how many bits stuck. */
		ucMaxPriorityValue = *pucFirstUserPriorityRegister;
 8015acc:	697b      	ldr	r3, [r7, #20]
 8015ace:	781b      	ldrb	r3, [r3, #0]
 8015ad0:	b2db      	uxtb	r3, r3
 8015ad2:	70fb      	strb	r3, [r7, #3]

		/* Use the same mask on the maximum system call priority. */
		ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue;
 8015ad4:	78fb      	ldrb	r3, [r7, #3]
 8015ad6:	b2db      	uxtb	r3, r3
 8015ad8:	f003 0350 	and.w	r3, r3, #80	@ 0x50
 8015adc:	b2da      	uxtb	r2, r3
 8015ade:	4b31      	ldr	r3, [pc, #196]	@ (8015ba4 <xPortStartScheduler+0x134>)
 8015ae0:	701a      	strb	r2, [r3, #0]

		/* Calculate the maximum acceptable priority group value for the number
		of bits read back. */
		ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS;
 8015ae2:	4b31      	ldr	r3, [pc, #196]	@ (8015ba8 <xPortStartScheduler+0x138>)
 8015ae4:	2207      	movs	r2, #7
 8015ae6:	601a      	str	r2, [r3, #0]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 8015ae8:	e009      	b.n	8015afe <xPortStartScheduler+0x8e>
		{
			ulMaxPRIGROUPValue--;
 8015aea:	4b2f      	ldr	r3, [pc, #188]	@ (8015ba8 <xPortStartScheduler+0x138>)
 8015aec:	681b      	ldr	r3, [r3, #0]
 8015aee:	3b01      	subs	r3, #1
 8015af0:	4a2d      	ldr	r2, [pc, #180]	@ (8015ba8 <xPortStartScheduler+0x138>)
 8015af2:	6013      	str	r3, [r2, #0]
			ucMaxPriorityValue <<= ( uint8_t ) 0x01;
 8015af4:	78fb      	ldrb	r3, [r7, #3]
 8015af6:	b2db      	uxtb	r3, r3
 8015af8:	005b      	lsls	r3, r3, #1
 8015afa:	b2db      	uxtb	r3, r3
 8015afc:	70fb      	strb	r3, [r7, #3]
		while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE )
 8015afe:	78fb      	ldrb	r3, [r7, #3]
 8015b00:	b2db      	uxtb	r3, r3
 8015b02:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 8015b06:	2b80      	cmp	r3, #128	@ 0x80
 8015b08:	d0ef      	beq.n	8015aea <xPortStartScheduler+0x7a>
		#ifdef configPRIO_BITS
		{
			/* Check the FreeRTOS configuration that defines the number of
			priority bits matches the number of priority bits actually queried
			from the hardware. */
			configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS );
 8015b0a:	4b27      	ldr	r3, [pc, #156]	@ (8015ba8 <xPortStartScheduler+0x138>)
 8015b0c:	681b      	ldr	r3, [r3, #0]
 8015b0e:	f1c3 0307 	rsb	r3, r3, #7
 8015b12:	2b04      	cmp	r3, #4
 8015b14:	d00b      	beq.n	8015b2e <xPortStartScheduler+0xbe>
	__asm volatile
 8015b16:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015b1a:	f383 8811 	msr	BASEPRI, r3
 8015b1e:	f3bf 8f6f 	isb	sy
 8015b22:	f3bf 8f4f 	dsb	sy
 8015b26:	60bb      	str	r3, [r7, #8]
}
 8015b28:	bf00      	nop
 8015b2a:	bf00      	nop
 8015b2c:	e7fd      	b.n	8015b2a <xPortStartScheduler+0xba>
		}
		#endif

		/* Shift the priority group value back to its position within the AIRCR
		register. */
		ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT;
 8015b2e:	4b1e      	ldr	r3, [pc, #120]	@ (8015ba8 <xPortStartScheduler+0x138>)
 8015b30:	681b      	ldr	r3, [r3, #0]
 8015b32:	021b      	lsls	r3, r3, #8
 8015b34:	4a1c      	ldr	r2, [pc, #112]	@ (8015ba8 <xPortStartScheduler+0x138>)
 8015b36:	6013      	str	r3, [r2, #0]
		ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK;
 8015b38:	4b1b      	ldr	r3, [pc, #108]	@ (8015ba8 <xPortStartScheduler+0x138>)
 8015b3a:	681b      	ldr	r3, [r3, #0]
 8015b3c:	f403 63e0 	and.w	r3, r3, #1792	@ 0x700
 8015b40:	4a19      	ldr	r2, [pc, #100]	@ (8015ba8 <xPortStartScheduler+0x138>)
 8015b42:	6013      	str	r3, [r2, #0]

		/* Restore the clobbered interrupt priority register to its original
		value. */
		*pucFirstUserPriorityRegister = ulOriginalPriority;
 8015b44:	687b      	ldr	r3, [r7, #4]
 8015b46:	b2da      	uxtb	r2, r3
 8015b48:	697b      	ldr	r3, [r7, #20]
 8015b4a:	701a      	strb	r2, [r3, #0]
	}
	#endif /* conifgASSERT_DEFINED */

	/* Make PendSV and SysTick the lowest priority interrupts. */
	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
 8015b4c:	4b17      	ldr	r3, [pc, #92]	@ (8015bac <xPortStartScheduler+0x13c>)
 8015b4e:	681b      	ldr	r3, [r3, #0]
 8015b50:	4a16      	ldr	r2, [pc, #88]	@ (8015bac <xPortStartScheduler+0x13c>)
 8015b52:	f443 0370 	orr.w	r3, r3, #15728640	@ 0xf00000
 8015b56:	6013      	str	r3, [r2, #0]
	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
 8015b58:	4b14      	ldr	r3, [pc, #80]	@ (8015bac <xPortStartScheduler+0x13c>)
 8015b5a:	681b      	ldr	r3, [r3, #0]
 8015b5c:	4a13      	ldr	r2, [pc, #76]	@ (8015bac <xPortStartScheduler+0x13c>)
 8015b5e:	f043 4370 	orr.w	r3, r3, #4026531840	@ 0xf0000000
 8015b62:	6013      	str	r3, [r2, #0]

	/* Start the timer that generates the tick ISR.  Interrupts are disabled
	here already. */
	vPortSetupTimerInterrupt();
 8015b64:	f000 f8da 	bl	8015d1c <vPortSetupTimerInterrupt>

	/* Initialise the critical nesting count ready for the first task. */
	uxCriticalNesting = 0;
 8015b68:	4b11      	ldr	r3, [pc, #68]	@ (8015bb0 <xPortStartScheduler+0x140>)
 8015b6a:	2200      	movs	r2, #0
 8015b6c:	601a      	str	r2, [r3, #0]

	/* Ensure the VFP is enabled - it should be anyway. */
	vPortEnableVFP();
 8015b6e:	f000 f8f9 	bl	8015d64 <vPortEnableVFP>

	/* Lazy save always. */
	*( portFPCCR ) |= portASPEN_AND_LSPEN_BITS;
 8015b72:	4b10      	ldr	r3, [pc, #64]	@ (8015bb4 <xPortStartScheduler+0x144>)
 8015b74:	681b      	ldr	r3, [r3, #0]
 8015b76:	4a0f      	ldr	r2, [pc, #60]	@ (8015bb4 <xPortStartScheduler+0x144>)
 8015b78:	f043 4340 	orr.w	r3, r3, #3221225472	@ 0xc0000000
 8015b7c:	6013      	str	r3, [r2, #0]

	/* Start the first task. */
	prvPortStartFirstTask();
 8015b7e:	f7ff ff63 	bl	8015a48 <prvPortStartFirstTask>
	exit error function to prevent compiler warnings about a static function
	not being called in the case that the application writer overrides this
	functionality by defining configTASK_RETURN_ADDRESS.  Call
	vTaskSwitchContext() so link time optimisation does not remove the
	symbol. */
	vTaskSwitchContext();
 8015b82:	f7fe fbcf 	bl	8014324 <vTaskSwitchContext>
	prvTaskExitError();
 8015b86:	f7ff ff19 	bl	80159bc <prvTaskExitError>

	/* Should not get here! */
	return 0;
 8015b8a:	2300      	movs	r3, #0
}
 8015b8c:	4618      	mov	r0, r3
 8015b8e:	3718      	adds	r7, #24
 8015b90:	46bd      	mov	sp, r7
 8015b92:	bd80      	pop	{r7, pc}
 8015b94:	e000ed00 	.word	0xe000ed00
 8015b98:	410fc271 	.word	0x410fc271
 8015b9c:	410fc270 	.word	0x410fc270
 8015ba0:	e000e400 	.word	0xe000e400
 8015ba4:	240043dc 	.word	0x240043dc
 8015ba8:	240043e0 	.word	0x240043e0
 8015bac:	e000ed20 	.word	0xe000ed20
 8015bb0:	24000048 	.word	0x24000048
 8015bb4:	e000ef34 	.word	0xe000ef34

08015bb8 <vPortEnterCritical>:
	configASSERT( uxCriticalNesting == 1000UL );
}
/*-----------------------------------------------------------*/

void vPortEnterCritical( void )
{
 8015bb8:	b480      	push	{r7}
 8015bba:	b083      	sub	sp, #12
 8015bbc:	af00      	add	r7, sp, #0
	__asm volatile
 8015bbe:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015bc2:	f383 8811 	msr	BASEPRI, r3
 8015bc6:	f3bf 8f6f 	isb	sy
 8015bca:	f3bf 8f4f 	dsb	sy
 8015bce:	607b      	str	r3, [r7, #4]
}
 8015bd0:	bf00      	nop
	portDISABLE_INTERRUPTS();
	uxCriticalNesting++;
 8015bd2:	4b10      	ldr	r3, [pc, #64]	@ (8015c14 <vPortEnterCritical+0x5c>)
 8015bd4:	681b      	ldr	r3, [r3, #0]
 8015bd6:	3301      	adds	r3, #1
 8015bd8:	4a0e      	ldr	r2, [pc, #56]	@ (8015c14 <vPortEnterCritical+0x5c>)
 8015bda:	6013      	str	r3, [r2, #0]
	/* This is not the interrupt safe version of the enter critical function so
	assert() if it is being called from an interrupt context.  Only API
	functions that end in "FromISR" can be used in an interrupt.  Only assert if
	the critical nesting count is 1 to protect against recursive calls if the
	assert function also uses a critical section. */
	if( uxCriticalNesting == 1 )
 8015bdc:	4b0d      	ldr	r3, [pc, #52]	@ (8015c14 <vPortEnterCritical+0x5c>)
 8015bde:	681b      	ldr	r3, [r3, #0]
 8015be0:	2b01      	cmp	r3, #1
 8015be2:	d110      	bne.n	8015c06 <vPortEnterCritical+0x4e>
	{
		configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 );
 8015be4:	4b0c      	ldr	r3, [pc, #48]	@ (8015c18 <vPortEnterCritical+0x60>)
 8015be6:	681b      	ldr	r3, [r3, #0]
 8015be8:	b2db      	uxtb	r3, r3
 8015bea:	2b00      	cmp	r3, #0
 8015bec:	d00b      	beq.n	8015c06 <vPortEnterCritical+0x4e>
	__asm volatile
 8015bee:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015bf2:	f383 8811 	msr	BASEPRI, r3
 8015bf6:	f3bf 8f6f 	isb	sy
 8015bfa:	f3bf 8f4f 	dsb	sy
 8015bfe:	603b      	str	r3, [r7, #0]
}
 8015c00:	bf00      	nop
 8015c02:	bf00      	nop
 8015c04:	e7fd      	b.n	8015c02 <vPortEnterCritical+0x4a>
	}
}
 8015c06:	bf00      	nop
 8015c08:	370c      	adds	r7, #12
 8015c0a:	46bd      	mov	sp, r7
 8015c0c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015c10:	4770      	bx	lr
 8015c12:	bf00      	nop
 8015c14:	24000048 	.word	0x24000048
 8015c18:	e000ed04 	.word	0xe000ed04

08015c1c <vPortExitCritical>:
/*-----------------------------------------------------------*/

void vPortExitCritical( void )
{
 8015c1c:	b480      	push	{r7}
 8015c1e:	b083      	sub	sp, #12
 8015c20:	af00      	add	r7, sp, #0
	configASSERT( uxCriticalNesting );
 8015c22:	4b12      	ldr	r3, [pc, #72]	@ (8015c6c <vPortExitCritical+0x50>)
 8015c24:	681b      	ldr	r3, [r3, #0]
 8015c26:	2b00      	cmp	r3, #0
 8015c28:	d10b      	bne.n	8015c42 <vPortExitCritical+0x26>
	__asm volatile
 8015c2a:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015c2e:	f383 8811 	msr	BASEPRI, r3
 8015c32:	f3bf 8f6f 	isb	sy
 8015c36:	f3bf 8f4f 	dsb	sy
 8015c3a:	607b      	str	r3, [r7, #4]
}
 8015c3c:	bf00      	nop
 8015c3e:	bf00      	nop
 8015c40:	e7fd      	b.n	8015c3e <vPortExitCritical+0x22>
	uxCriticalNesting--;
 8015c42:	4b0a      	ldr	r3, [pc, #40]	@ (8015c6c <vPortExitCritical+0x50>)
 8015c44:	681b      	ldr	r3, [r3, #0]
 8015c46:	3b01      	subs	r3, #1
 8015c48:	4a08      	ldr	r2, [pc, #32]	@ (8015c6c <vPortExitCritical+0x50>)
 8015c4a:	6013      	str	r3, [r2, #0]
	if( uxCriticalNesting == 0 )
 8015c4c:	4b07      	ldr	r3, [pc, #28]	@ (8015c6c <vPortExitCritical+0x50>)
 8015c4e:	681b      	ldr	r3, [r3, #0]
 8015c50:	2b00      	cmp	r3, #0
 8015c52:	d105      	bne.n	8015c60 <vPortExitCritical+0x44>
 8015c54:	2300      	movs	r3, #0
 8015c56:	603b      	str	r3, [r7, #0]
	__asm volatile
 8015c58:	683b      	ldr	r3, [r7, #0]
 8015c5a:	f383 8811 	msr	BASEPRI, r3
}
 8015c5e:	bf00      	nop
	{
		portENABLE_INTERRUPTS();
	}
}
 8015c60:	bf00      	nop
 8015c62:	370c      	adds	r7, #12
 8015c64:	46bd      	mov	sp, r7
 8015c66:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015c6a:	4770      	bx	lr
 8015c6c:	24000048 	.word	0x24000048

08015c70 <PendSV_Handler>:

void xPortPendSVHandler( void )
{
	/* This is a naked function. */

	__asm volatile
 8015c70:	f3ef 8009 	mrs	r0, PSP
 8015c74:	f3bf 8f6f 	isb	sy
 8015c78:	4b15      	ldr	r3, [pc, #84]	@ (8015cd0 <pxCurrentTCBConst>)
 8015c7a:	681a      	ldr	r2, [r3, #0]
 8015c7c:	f01e 0f10 	tst.w	lr, #16
 8015c80:	bf08      	it	eq
 8015c82:	ed20 8a10 	vstmdbeq	r0!, {s16-s31}
 8015c86:	e920 4ff0 	stmdb	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8015c8a:	6010      	str	r0, [r2, #0]
 8015c8c:	e92d 0009 	stmdb	sp!, {r0, r3}
 8015c90:	f04f 0050 	mov.w	r0, #80	@ 0x50
 8015c94:	f380 8811 	msr	BASEPRI, r0
 8015c98:	f3bf 8f4f 	dsb	sy
 8015c9c:	f3bf 8f6f 	isb	sy
 8015ca0:	f7fe fb40 	bl	8014324 <vTaskSwitchContext>
 8015ca4:	f04f 0000 	mov.w	r0, #0
 8015ca8:	f380 8811 	msr	BASEPRI, r0
 8015cac:	bc09      	pop	{r0, r3}
 8015cae:	6819      	ldr	r1, [r3, #0]
 8015cb0:	6808      	ldr	r0, [r1, #0]
 8015cb2:	e8b0 4ff0 	ldmia.w	r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8015cb6:	f01e 0f10 	tst.w	lr, #16
 8015cba:	bf08      	it	eq
 8015cbc:	ecb0 8a10 	vldmiaeq	r0!, {s16-s31}
 8015cc0:	f380 8809 	msr	PSP, r0
 8015cc4:	f3bf 8f6f 	isb	sy
 8015cc8:	4770      	bx	lr
 8015cca:	bf00      	nop
 8015ccc:	f3af 8000 	nop.w

08015cd0 <pxCurrentTCBConst>:
 8015cd0:	24003db0 	.word	0x24003db0
	"										\n"
	"	.align 4							\n"
	"pxCurrentTCBConst: .word pxCurrentTCB	\n"
	::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
	);
}
 8015cd4:	bf00      	nop
 8015cd6:	bf00      	nop

08015cd8 <xPortSysTickHandler>:
/*-----------------------------------------------------------*/

void xPortSysTickHandler( void )
{
 8015cd8:	b580      	push	{r7, lr}
 8015cda:	b082      	sub	sp, #8
 8015cdc:	af00      	add	r7, sp, #0
	__asm volatile
 8015cde:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015ce2:	f383 8811 	msr	BASEPRI, r3
 8015ce6:	f3bf 8f6f 	isb	sy
 8015cea:	f3bf 8f4f 	dsb	sy
 8015cee:	607b      	str	r3, [r7, #4]
}
 8015cf0:	bf00      	nop
	save and then restore the interrupt mask value as its value is already
	known. */
	portDISABLE_INTERRUPTS();
	{
		/* Increment the RTOS tick. */
		if( xTaskIncrementTick() != pdFALSE )
 8015cf2:	f7fe fa5d 	bl	80141b0 <xTaskIncrementTick>
 8015cf6:	4603      	mov	r3, r0
 8015cf8:	2b00      	cmp	r3, #0
 8015cfa:	d003      	beq.n	8015d04 <xPortSysTickHandler+0x2c>
		{
			/* A context switch is required.  Context switching is performed in
			the PendSV interrupt.  Pend the PendSV interrupt. */
			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 8015cfc:	4b06      	ldr	r3, [pc, #24]	@ (8015d18 <xPortSysTickHandler+0x40>)
 8015cfe:	f04f 5280 	mov.w	r2, #268435456	@ 0x10000000
 8015d02:	601a      	str	r2, [r3, #0]
 8015d04:	2300      	movs	r3, #0
 8015d06:	603b      	str	r3, [r7, #0]
	__asm volatile
 8015d08:	683b      	ldr	r3, [r7, #0]
 8015d0a:	f383 8811 	msr	BASEPRI, r3
}
 8015d0e:	bf00      	nop
		}
	}
	portENABLE_INTERRUPTS();
}
 8015d10:	bf00      	nop
 8015d12:	3708      	adds	r7, #8
 8015d14:	46bd      	mov	sp, r7
 8015d16:	bd80      	pop	{r7, pc}
 8015d18:	e000ed04 	.word	0xe000ed04

08015d1c <vPortSetupTimerInterrupt>:
/*
 * Setup the systick timer to generate the tick interrupts at the required
 * frequency.
 */
__attribute__(( weak )) void vPortSetupTimerInterrupt( void )
{
 8015d1c:	b480      	push	{r7}
 8015d1e:	af00      	add	r7, sp, #0
		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
	}
	#endif /* configUSE_TICKLESS_IDLE */

	/* Stop and clear the SysTick. */
	portNVIC_SYSTICK_CTRL_REG = 0UL;
 8015d20:	4b0b      	ldr	r3, [pc, #44]	@ (8015d50 <vPortSetupTimerInterrupt+0x34>)
 8015d22:	2200      	movs	r2, #0
 8015d24:	601a      	str	r2, [r3, #0]
	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 8015d26:	4b0b      	ldr	r3, [pc, #44]	@ (8015d54 <vPortSetupTimerInterrupt+0x38>)
 8015d28:	2200      	movs	r2, #0
 8015d2a:	601a      	str	r2, [r3, #0]

	/* Configure SysTick to interrupt at the requested rate. */
	portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
 8015d2c:	4b0a      	ldr	r3, [pc, #40]	@ (8015d58 <vPortSetupTimerInterrupt+0x3c>)
 8015d2e:	681b      	ldr	r3, [r3, #0]
 8015d30:	4a0a      	ldr	r2, [pc, #40]	@ (8015d5c <vPortSetupTimerInterrupt+0x40>)
 8015d32:	fba2 2303 	umull	r2, r3, r2, r3
 8015d36:	099b      	lsrs	r3, r3, #6
 8015d38:	4a09      	ldr	r2, [pc, #36]	@ (8015d60 <vPortSetupTimerInterrupt+0x44>)
 8015d3a:	3b01      	subs	r3, #1
 8015d3c:	6013      	str	r3, [r2, #0]
	portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT );
 8015d3e:	4b04      	ldr	r3, [pc, #16]	@ (8015d50 <vPortSetupTimerInterrupt+0x34>)
 8015d40:	2207      	movs	r2, #7
 8015d42:	601a      	str	r2, [r3, #0]
}
 8015d44:	bf00      	nop
 8015d46:	46bd      	mov	sp, r7
 8015d48:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015d4c:	4770      	bx	lr
 8015d4e:	bf00      	nop
 8015d50:	e000e010 	.word	0xe000e010
 8015d54:	e000e018 	.word	0xe000e018
 8015d58:	2400000c 	.word	0x2400000c
 8015d5c:	10624dd3 	.word	0x10624dd3
 8015d60:	e000e014 	.word	0xe000e014

08015d64 <vPortEnableVFP>:
/*-----------------------------------------------------------*/

/* This is a naked function. */
static void vPortEnableVFP( void )
{
	__asm volatile
 8015d64:	f8df 000c 	ldr.w	r0, [pc, #12]	@ 8015d74 <vPortEnableVFP+0x10>
 8015d68:	6801      	ldr	r1, [r0, #0]
 8015d6a:	f441 0170 	orr.w	r1, r1, #15728640	@ 0xf00000
 8015d6e:	6001      	str	r1, [r0, #0]
 8015d70:	4770      	bx	lr
		"								\n"
		"	orr r1, r1, #( 0xf << 20 )	\n" /* Enable CP10 and CP11 coprocessors, then save back. */
		"	str r1, [r0]				\n"
		"	bx r14						"
	);
}
 8015d72:	bf00      	nop
 8015d74:	e000ed88 	.word	0xe000ed88

08015d78 <vPortValidateInterruptPriority>:
/*-----------------------------------------------------------*/

#if( configASSERT_DEFINED == 1 )

	void vPortValidateInterruptPriority( void )
	{
 8015d78:	b480      	push	{r7}
 8015d7a:	b085      	sub	sp, #20
 8015d7c:	af00      	add	r7, sp, #0
	uint32_t ulCurrentInterrupt;
	uint8_t ucCurrentPriority;

		/* Obtain the number of the currently executing interrupt. */
		__asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );
 8015d7e:	f3ef 8305 	mrs	r3, IPSR
 8015d82:	60fb      	str	r3, [r7, #12]

		/* Is the interrupt number a user defined interrupt? */
		if( ulCurrentInterrupt >= portFIRST_USER_INTERRUPT_NUMBER )
 8015d84:	68fb      	ldr	r3, [r7, #12]
 8015d86:	2b0f      	cmp	r3, #15
 8015d88:	d915      	bls.n	8015db6 <vPortValidateInterruptPriority+0x3e>
		{
			/* Look up the interrupt's priority. */
			ucCurrentPriority = pcInterruptPriorityRegisters[ ulCurrentInterrupt ];
 8015d8a:	4a18      	ldr	r2, [pc, #96]	@ (8015dec <vPortValidateInterruptPriority+0x74>)
 8015d8c:	68fb      	ldr	r3, [r7, #12]
 8015d8e:	4413      	add	r3, r2
 8015d90:	781b      	ldrb	r3, [r3, #0]
 8015d92:	72fb      	strb	r3, [r7, #11]
			interrupt entry is as fast and simple as possible.

			The following links provide detailed information:
			http://www.freertos.org/RTOS-Cortex-M3-M4.html
			http://www.freertos.org/FAQHelp.html */
			configASSERT( ucCurrentPriority >= ucMaxSysCallPriority );
 8015d94:	4b16      	ldr	r3, [pc, #88]	@ (8015df0 <vPortValidateInterruptPriority+0x78>)
 8015d96:	781b      	ldrb	r3, [r3, #0]
 8015d98:	7afa      	ldrb	r2, [r7, #11]
 8015d9a:	429a      	cmp	r2, r3
 8015d9c:	d20b      	bcs.n	8015db6 <vPortValidateInterruptPriority+0x3e>
	__asm volatile
 8015d9e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015da2:	f383 8811 	msr	BASEPRI, r3
 8015da6:	f3bf 8f6f 	isb	sy
 8015daa:	f3bf 8f4f 	dsb	sy
 8015dae:	607b      	str	r3, [r7, #4]
}
 8015db0:	bf00      	nop
 8015db2:	bf00      	nop
 8015db4:	e7fd      	b.n	8015db2 <vPortValidateInterruptPriority+0x3a>
		configuration then the correct setting can be achieved on all Cortex-M
		devices by calling NVIC_SetPriorityGrouping( 0 ); before starting the
		scheduler.  Note however that some vendor specific peripheral libraries
		assume a non-zero priority group setting, in which cases using a value
		of zero will result in unpredictable behaviour. */
		configASSERT( ( portAIRCR_REG & portPRIORITY_GROUP_MASK ) <= ulMaxPRIGROUPValue );
 8015db6:	4b0f      	ldr	r3, [pc, #60]	@ (8015df4 <vPortValidateInterruptPriority+0x7c>)
 8015db8:	681b      	ldr	r3, [r3, #0]
 8015dba:	f403 62e0 	and.w	r2, r3, #1792	@ 0x700
 8015dbe:	4b0e      	ldr	r3, [pc, #56]	@ (8015df8 <vPortValidateInterruptPriority+0x80>)
 8015dc0:	681b      	ldr	r3, [r3, #0]
 8015dc2:	429a      	cmp	r2, r3
 8015dc4:	d90b      	bls.n	8015dde <vPortValidateInterruptPriority+0x66>
	__asm volatile
 8015dc6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015dca:	f383 8811 	msr	BASEPRI, r3
 8015dce:	f3bf 8f6f 	isb	sy
 8015dd2:	f3bf 8f4f 	dsb	sy
 8015dd6:	603b      	str	r3, [r7, #0]
}
 8015dd8:	bf00      	nop
 8015dda:	bf00      	nop
 8015ddc:	e7fd      	b.n	8015dda <vPortValidateInterruptPriority+0x62>
	}
 8015dde:	bf00      	nop
 8015de0:	3714      	adds	r7, #20
 8015de2:	46bd      	mov	sp, r7
 8015de4:	f85d 7b04 	ldr.w	r7, [sp], #4
 8015de8:	4770      	bx	lr
 8015dea:	bf00      	nop
 8015dec:	e000e3f0 	.word	0xe000e3f0
 8015df0:	240043dc 	.word	0x240043dc
 8015df4:	e000ed0c 	.word	0xe000ed0c
 8015df8:	240043e0 	.word	0x240043e0

08015dfc <pvPortMalloc>:
static size_t xBlockAllocatedBit = 0;

/*-----------------------------------------------------------*/

void *pvPortMalloc( size_t xWantedSize )
{
 8015dfc:	b580      	push	{r7, lr}
 8015dfe:	b08a      	sub	sp, #40	@ 0x28
 8015e00:	af00      	add	r7, sp, #0
 8015e02:	6078      	str	r0, [r7, #4]
BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
 8015e04:	2300      	movs	r3, #0
 8015e06:	61fb      	str	r3, [r7, #28]

	vTaskSuspendAll();
 8015e08:	f7fe f904 	bl	8014014 <vTaskSuspendAll>
	{
		/* If this is the first call to malloc then the heap will require
		initialisation to setup the list of free blocks. */
		if( pxEnd == NULL )
 8015e0c:	4b5c      	ldr	r3, [pc, #368]	@ (8015f80 <pvPortMalloc+0x184>)
 8015e0e:	681b      	ldr	r3, [r3, #0]
 8015e10:	2b00      	cmp	r3, #0
 8015e12:	d101      	bne.n	8015e18 <pvPortMalloc+0x1c>
		{
			prvHeapInit();
 8015e14:	f000 f924 	bl	8016060 <prvHeapInit>

		/* Check the requested block size is not so large that the top bit is
		set.  The top bit of the block size member of the BlockLink_t structure
		is used to determine who owns the block - the application or the
		kernel, so it must be free. */
		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
 8015e18:	4b5a      	ldr	r3, [pc, #360]	@ (8015f84 <pvPortMalloc+0x188>)
 8015e1a:	681a      	ldr	r2, [r3, #0]
 8015e1c:	687b      	ldr	r3, [r7, #4]
 8015e1e:	4013      	ands	r3, r2
 8015e20:	2b00      	cmp	r3, #0
 8015e22:	f040 8095 	bne.w	8015f50 <pvPortMalloc+0x154>
		{
			/* The wanted size is increased so it can contain a BlockLink_t
			structure in addition to the requested amount of bytes. */
			if( xWantedSize > 0 )
 8015e26:	687b      	ldr	r3, [r7, #4]
 8015e28:	2b00      	cmp	r3, #0
 8015e2a:	d01e      	beq.n	8015e6a <pvPortMalloc+0x6e>
			{
				xWantedSize += xHeapStructSize;
 8015e2c:	2208      	movs	r2, #8
 8015e2e:	687b      	ldr	r3, [r7, #4]
 8015e30:	4413      	add	r3, r2
 8015e32:	607b      	str	r3, [r7, #4]

				/* Ensure that blocks are always aligned to the required number
				of bytes. */
				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
 8015e34:	687b      	ldr	r3, [r7, #4]
 8015e36:	f003 0307 	and.w	r3, r3, #7
 8015e3a:	2b00      	cmp	r3, #0
 8015e3c:	d015      	beq.n	8015e6a <pvPortMalloc+0x6e>
				{
					/* Byte alignment required. */
					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
 8015e3e:	687b      	ldr	r3, [r7, #4]
 8015e40:	f023 0307 	bic.w	r3, r3, #7
 8015e44:	3308      	adds	r3, #8
 8015e46:	607b      	str	r3, [r7, #4]
					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
 8015e48:	687b      	ldr	r3, [r7, #4]
 8015e4a:	f003 0307 	and.w	r3, r3, #7
 8015e4e:	2b00      	cmp	r3, #0
 8015e50:	d00b      	beq.n	8015e6a <pvPortMalloc+0x6e>
	__asm volatile
 8015e52:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015e56:	f383 8811 	msr	BASEPRI, r3
 8015e5a:	f3bf 8f6f 	isb	sy
 8015e5e:	f3bf 8f4f 	dsb	sy
 8015e62:	617b      	str	r3, [r7, #20]
}
 8015e64:	bf00      	nop
 8015e66:	bf00      	nop
 8015e68:	e7fd      	b.n	8015e66 <pvPortMalloc+0x6a>
			else
			{
				mtCOVERAGE_TEST_MARKER();
			}

			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
 8015e6a:	687b      	ldr	r3, [r7, #4]
 8015e6c:	2b00      	cmp	r3, #0
 8015e6e:	d06f      	beq.n	8015f50 <pvPortMalloc+0x154>
 8015e70:	4b45      	ldr	r3, [pc, #276]	@ (8015f88 <pvPortMalloc+0x18c>)
 8015e72:	681b      	ldr	r3, [r3, #0]
 8015e74:	687a      	ldr	r2, [r7, #4]
 8015e76:	429a      	cmp	r2, r3
 8015e78:	d86a      	bhi.n	8015f50 <pvPortMalloc+0x154>
			{
				/* Traverse the list from the start	(lowest address) block until
				one	of adequate size is found. */
				pxPreviousBlock = &xStart;
 8015e7a:	4b44      	ldr	r3, [pc, #272]	@ (8015f8c <pvPortMalloc+0x190>)
 8015e7c:	623b      	str	r3, [r7, #32]
				pxBlock = xStart.pxNextFreeBlock;
 8015e7e:	4b43      	ldr	r3, [pc, #268]	@ (8015f8c <pvPortMalloc+0x190>)
 8015e80:	681b      	ldr	r3, [r3, #0]
 8015e82:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8015e84:	e004      	b.n	8015e90 <pvPortMalloc+0x94>
				{
					pxPreviousBlock = pxBlock;
 8015e86:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015e88:	623b      	str	r3, [r7, #32]
					pxBlock = pxBlock->pxNextFreeBlock;
 8015e8a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015e8c:	681b      	ldr	r3, [r3, #0]
 8015e8e:	627b      	str	r3, [r7, #36]	@ 0x24
				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
 8015e90:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015e92:	685b      	ldr	r3, [r3, #4]
 8015e94:	687a      	ldr	r2, [r7, #4]
 8015e96:	429a      	cmp	r2, r3
 8015e98:	d903      	bls.n	8015ea2 <pvPortMalloc+0xa6>
 8015e9a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015e9c:	681b      	ldr	r3, [r3, #0]
 8015e9e:	2b00      	cmp	r3, #0
 8015ea0:	d1f1      	bne.n	8015e86 <pvPortMalloc+0x8a>
				}

				/* If the end marker was reached then a block of adequate size
				was	not found. */
				if( pxBlock != pxEnd )
 8015ea2:	4b37      	ldr	r3, [pc, #220]	@ (8015f80 <pvPortMalloc+0x184>)
 8015ea4:	681b      	ldr	r3, [r3, #0]
 8015ea6:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8015ea8:	429a      	cmp	r2, r3
 8015eaa:	d051      	beq.n	8015f50 <pvPortMalloc+0x154>
				{
					/* Return the memory space pointed to - jumping over the
					BlockLink_t structure at its start. */
					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
 8015eac:	6a3b      	ldr	r3, [r7, #32]
 8015eae:	681b      	ldr	r3, [r3, #0]
 8015eb0:	2208      	movs	r2, #8
 8015eb2:	4413      	add	r3, r2
 8015eb4:	61fb      	str	r3, [r7, #28]

					/* This block is being returned for use so must be taken out
					of the list of free blocks. */
					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
 8015eb6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015eb8:	681a      	ldr	r2, [r3, #0]
 8015eba:	6a3b      	ldr	r3, [r7, #32]
 8015ebc:	601a      	str	r2, [r3, #0]

					/* If the block is larger than required it can be split into
					two. */
					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
 8015ebe:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015ec0:	685a      	ldr	r2, [r3, #4]
 8015ec2:	687b      	ldr	r3, [r7, #4]
 8015ec4:	1ad2      	subs	r2, r2, r3
 8015ec6:	2308      	movs	r3, #8
 8015ec8:	005b      	lsls	r3, r3, #1
 8015eca:	429a      	cmp	r2, r3
 8015ecc:	d920      	bls.n	8015f10 <pvPortMalloc+0x114>
					{
						/* This block is to be split into two.  Create a new
						block following the number of bytes requested. The void
						cast is used to prevent byte alignment warnings from the
						compiler. */
						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
 8015ece:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8015ed0:	687b      	ldr	r3, [r7, #4]
 8015ed2:	4413      	add	r3, r2
 8015ed4:	61bb      	str	r3, [r7, #24]
						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
 8015ed6:	69bb      	ldr	r3, [r7, #24]
 8015ed8:	f003 0307 	and.w	r3, r3, #7
 8015edc:	2b00      	cmp	r3, #0
 8015ede:	d00b      	beq.n	8015ef8 <pvPortMalloc+0xfc>
	__asm volatile
 8015ee0:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015ee4:	f383 8811 	msr	BASEPRI, r3
 8015ee8:	f3bf 8f6f 	isb	sy
 8015eec:	f3bf 8f4f 	dsb	sy
 8015ef0:	613b      	str	r3, [r7, #16]
}
 8015ef2:	bf00      	nop
 8015ef4:	bf00      	nop
 8015ef6:	e7fd      	b.n	8015ef4 <pvPortMalloc+0xf8>

						/* Calculate the sizes of two blocks split from the
						single block. */
						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
 8015ef8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015efa:	685a      	ldr	r2, [r3, #4]
 8015efc:	687b      	ldr	r3, [r7, #4]
 8015efe:	1ad2      	subs	r2, r2, r3
 8015f00:	69bb      	ldr	r3, [r7, #24]
 8015f02:	605a      	str	r2, [r3, #4]
						pxBlock->xBlockSize = xWantedSize;
 8015f04:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015f06:	687a      	ldr	r2, [r7, #4]
 8015f08:	605a      	str	r2, [r3, #4]

						/* Insert the new block into the list of free blocks. */
						prvInsertBlockIntoFreeList( pxNewBlockLink );
 8015f0a:	69b8      	ldr	r0, [r7, #24]
 8015f0c:	f000 f90a 	bl	8016124 <prvInsertBlockIntoFreeList>
					else
					{
						mtCOVERAGE_TEST_MARKER();
					}

					xFreeBytesRemaining -= pxBlock->xBlockSize;
 8015f10:	4b1d      	ldr	r3, [pc, #116]	@ (8015f88 <pvPortMalloc+0x18c>)
 8015f12:	681a      	ldr	r2, [r3, #0]
 8015f14:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015f16:	685b      	ldr	r3, [r3, #4]
 8015f18:	1ad3      	subs	r3, r2, r3
 8015f1a:	4a1b      	ldr	r2, [pc, #108]	@ (8015f88 <pvPortMalloc+0x18c>)
 8015f1c:	6013      	str	r3, [r2, #0]

					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
 8015f1e:	4b1a      	ldr	r3, [pc, #104]	@ (8015f88 <pvPortMalloc+0x18c>)
 8015f20:	681a      	ldr	r2, [r3, #0]
 8015f22:	4b1b      	ldr	r3, [pc, #108]	@ (8015f90 <pvPortMalloc+0x194>)
 8015f24:	681b      	ldr	r3, [r3, #0]
 8015f26:	429a      	cmp	r2, r3
 8015f28:	d203      	bcs.n	8015f32 <pvPortMalloc+0x136>
					{
						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
 8015f2a:	4b17      	ldr	r3, [pc, #92]	@ (8015f88 <pvPortMalloc+0x18c>)
 8015f2c:	681b      	ldr	r3, [r3, #0]
 8015f2e:	4a18      	ldr	r2, [pc, #96]	@ (8015f90 <pvPortMalloc+0x194>)
 8015f30:	6013      	str	r3, [r2, #0]
						mtCOVERAGE_TEST_MARKER();
					}

					/* The block is being returned - it is allocated and owned
					by the application and has no "next" block. */
					pxBlock->xBlockSize |= xBlockAllocatedBit;
 8015f32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015f34:	685a      	ldr	r2, [r3, #4]
 8015f36:	4b13      	ldr	r3, [pc, #76]	@ (8015f84 <pvPortMalloc+0x188>)
 8015f38:	681b      	ldr	r3, [r3, #0]
 8015f3a:	431a      	orrs	r2, r3
 8015f3c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015f3e:	605a      	str	r2, [r3, #4]
					pxBlock->pxNextFreeBlock = NULL;
 8015f40:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8015f42:	2200      	movs	r2, #0
 8015f44:	601a      	str	r2, [r3, #0]
					xNumberOfSuccessfulAllocations++;
 8015f46:	4b13      	ldr	r3, [pc, #76]	@ (8015f94 <pvPortMalloc+0x198>)
 8015f48:	681b      	ldr	r3, [r3, #0]
 8015f4a:	3301      	adds	r3, #1
 8015f4c:	4a11      	ldr	r2, [pc, #68]	@ (8015f94 <pvPortMalloc+0x198>)
 8015f4e:	6013      	str	r3, [r2, #0]
			mtCOVERAGE_TEST_MARKER();
		}

		traceMALLOC( pvReturn, xWantedSize );
	}
	( void ) xTaskResumeAll();
 8015f50:	f7fe f86e 	bl	8014030 <xTaskResumeAll>
			mtCOVERAGE_TEST_MARKER();
		}
	}
	#endif

	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
 8015f54:	69fb      	ldr	r3, [r7, #28]
 8015f56:	f003 0307 	and.w	r3, r3, #7
 8015f5a:	2b00      	cmp	r3, #0
 8015f5c:	d00b      	beq.n	8015f76 <pvPortMalloc+0x17a>
	__asm volatile
 8015f5e:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015f62:	f383 8811 	msr	BASEPRI, r3
 8015f66:	f3bf 8f6f 	isb	sy
 8015f6a:	f3bf 8f4f 	dsb	sy
 8015f6e:	60fb      	str	r3, [r7, #12]
}
 8015f70:	bf00      	nop
 8015f72:	bf00      	nop
 8015f74:	e7fd      	b.n	8015f72 <pvPortMalloc+0x176>
	return pvReturn;
 8015f76:	69fb      	ldr	r3, [r7, #28]
}
 8015f78:	4618      	mov	r0, r3
 8015f7a:	3728      	adds	r7, #40	@ 0x28
 8015f7c:	46bd      	mov	sp, r7
 8015f7e:	bd80      	pop	{r7, pc}
 8015f80:	240243ec 	.word	0x240243ec
 8015f84:	24024400 	.word	0x24024400
 8015f88:	240243f0 	.word	0x240243f0
 8015f8c:	240243e4 	.word	0x240243e4
 8015f90:	240243f4 	.word	0x240243f4
 8015f94:	240243f8 	.word	0x240243f8

08015f98 <vPortFree>:
/*-----------------------------------------------------------*/

void vPortFree( void *pv )
{
 8015f98:	b580      	push	{r7, lr}
 8015f9a:	b086      	sub	sp, #24
 8015f9c:	af00      	add	r7, sp, #0
 8015f9e:	6078      	str	r0, [r7, #4]
uint8_t *puc = ( uint8_t * ) pv;
 8015fa0:	687b      	ldr	r3, [r7, #4]
 8015fa2:	617b      	str	r3, [r7, #20]
BlockLink_t *pxLink;

	if( pv != NULL )
 8015fa4:	687b      	ldr	r3, [r7, #4]
 8015fa6:	2b00      	cmp	r3, #0
 8015fa8:	d04f      	beq.n	801604a <vPortFree+0xb2>
	{
		/* The memory being freed will have an BlockLink_t structure immediately
		before it. */
		puc -= xHeapStructSize;
 8015faa:	2308      	movs	r3, #8
 8015fac:	425b      	negs	r3, r3
 8015fae:	697a      	ldr	r2, [r7, #20]
 8015fb0:	4413      	add	r3, r2
 8015fb2:	617b      	str	r3, [r7, #20]

		/* This casting is to keep the compiler from issuing warnings. */
		pxLink = ( void * ) puc;
 8015fb4:	697b      	ldr	r3, [r7, #20]
 8015fb6:	613b      	str	r3, [r7, #16]

		/* Check the block is actually allocated. */
		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
 8015fb8:	693b      	ldr	r3, [r7, #16]
 8015fba:	685a      	ldr	r2, [r3, #4]
 8015fbc:	4b25      	ldr	r3, [pc, #148]	@ (8016054 <vPortFree+0xbc>)
 8015fbe:	681b      	ldr	r3, [r3, #0]
 8015fc0:	4013      	ands	r3, r2
 8015fc2:	2b00      	cmp	r3, #0
 8015fc4:	d10b      	bne.n	8015fde <vPortFree+0x46>
	__asm volatile
 8015fc6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015fca:	f383 8811 	msr	BASEPRI, r3
 8015fce:	f3bf 8f6f 	isb	sy
 8015fd2:	f3bf 8f4f 	dsb	sy
 8015fd6:	60fb      	str	r3, [r7, #12]
}
 8015fd8:	bf00      	nop
 8015fda:	bf00      	nop
 8015fdc:	e7fd      	b.n	8015fda <vPortFree+0x42>
		configASSERT( pxLink->pxNextFreeBlock == NULL );
 8015fde:	693b      	ldr	r3, [r7, #16]
 8015fe0:	681b      	ldr	r3, [r3, #0]
 8015fe2:	2b00      	cmp	r3, #0
 8015fe4:	d00b      	beq.n	8015ffe <vPortFree+0x66>
	__asm volatile
 8015fe6:	f04f 0350 	mov.w	r3, #80	@ 0x50
 8015fea:	f383 8811 	msr	BASEPRI, r3
 8015fee:	f3bf 8f6f 	isb	sy
 8015ff2:	f3bf 8f4f 	dsb	sy
 8015ff6:	60bb      	str	r3, [r7, #8]
}
 8015ff8:	bf00      	nop
 8015ffa:	bf00      	nop
 8015ffc:	e7fd      	b.n	8015ffa <vPortFree+0x62>

		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
 8015ffe:	693b      	ldr	r3, [r7, #16]
 8016000:	685a      	ldr	r2, [r3, #4]
 8016002:	4b14      	ldr	r3, [pc, #80]	@ (8016054 <vPortFree+0xbc>)
 8016004:	681b      	ldr	r3, [r3, #0]
 8016006:	4013      	ands	r3, r2
 8016008:	2b00      	cmp	r3, #0
 801600a:	d01e      	beq.n	801604a <vPortFree+0xb2>
		{
			if( pxLink->pxNextFreeBlock == NULL )
 801600c:	693b      	ldr	r3, [r7, #16]
 801600e:	681b      	ldr	r3, [r3, #0]
 8016010:	2b00      	cmp	r3, #0
 8016012:	d11a      	bne.n	801604a <vPortFree+0xb2>
			{
				/* The block is being returned to the heap - it is no longer
				allocated. */
				pxLink->xBlockSize &= ~xBlockAllocatedBit;
 8016014:	693b      	ldr	r3, [r7, #16]
 8016016:	685a      	ldr	r2, [r3, #4]
 8016018:	4b0e      	ldr	r3, [pc, #56]	@ (8016054 <vPortFree+0xbc>)
 801601a:	681b      	ldr	r3, [r3, #0]
 801601c:	43db      	mvns	r3, r3
 801601e:	401a      	ands	r2, r3
 8016020:	693b      	ldr	r3, [r7, #16]
 8016022:	605a      	str	r2, [r3, #4]

				vTaskSuspendAll();
 8016024:	f7fd fff6 	bl	8014014 <vTaskSuspendAll>
				{
					/* Add this block to the list of free blocks. */
					xFreeBytesRemaining += pxLink->xBlockSize;
 8016028:	693b      	ldr	r3, [r7, #16]
 801602a:	685a      	ldr	r2, [r3, #4]
 801602c:	4b0a      	ldr	r3, [pc, #40]	@ (8016058 <vPortFree+0xc0>)
 801602e:	681b      	ldr	r3, [r3, #0]
 8016030:	4413      	add	r3, r2
 8016032:	4a09      	ldr	r2, [pc, #36]	@ (8016058 <vPortFree+0xc0>)
 8016034:	6013      	str	r3, [r2, #0]
					traceFREE( pv, pxLink->xBlockSize );
					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
 8016036:	6938      	ldr	r0, [r7, #16]
 8016038:	f000 f874 	bl	8016124 <prvInsertBlockIntoFreeList>
					xNumberOfSuccessfulFrees++;
 801603c:	4b07      	ldr	r3, [pc, #28]	@ (801605c <vPortFree+0xc4>)
 801603e:	681b      	ldr	r3, [r3, #0]
 8016040:	3301      	adds	r3, #1
 8016042:	4a06      	ldr	r2, [pc, #24]	@ (801605c <vPortFree+0xc4>)
 8016044:	6013      	str	r3, [r2, #0]
				}
				( void ) xTaskResumeAll();
 8016046:	f7fd fff3 	bl	8014030 <xTaskResumeAll>
		else
		{
			mtCOVERAGE_TEST_MARKER();
		}
	}
}
 801604a:	bf00      	nop
 801604c:	3718      	adds	r7, #24
 801604e:	46bd      	mov	sp, r7
 8016050:	bd80      	pop	{r7, pc}
 8016052:	bf00      	nop
 8016054:	24024400 	.word	0x24024400
 8016058:	240243f0 	.word	0x240243f0
 801605c:	240243fc 	.word	0x240243fc

08016060 <prvHeapInit>:
	/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/

static void prvHeapInit( void )
{
 8016060:	b480      	push	{r7}
 8016062:	b085      	sub	sp, #20
 8016064:	af00      	add	r7, sp, #0
BlockLink_t *pxFirstFreeBlock;
uint8_t *pucAlignedHeap;
size_t uxAddress;
size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
 8016066:	f44f 3300 	mov.w	r3, #131072	@ 0x20000
 801606a:	60bb      	str	r3, [r7, #8]

	/* Ensure the heap starts on a correctly aligned boundary. */
	uxAddress = ( size_t ) ucHeap;
 801606c:	4b27      	ldr	r3, [pc, #156]	@ (801610c <prvHeapInit+0xac>)
 801606e:	60fb      	str	r3, [r7, #12]

	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
 8016070:	68fb      	ldr	r3, [r7, #12]
 8016072:	f003 0307 	and.w	r3, r3, #7
 8016076:	2b00      	cmp	r3, #0
 8016078:	d00c      	beq.n	8016094 <prvHeapInit+0x34>
	{
		uxAddress += ( portBYTE_ALIGNMENT - 1 );
 801607a:	68fb      	ldr	r3, [r7, #12]
 801607c:	3307      	adds	r3, #7
 801607e:	60fb      	str	r3, [r7, #12]
		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 8016080:	68fb      	ldr	r3, [r7, #12]
 8016082:	f023 0307 	bic.w	r3, r3, #7
 8016086:	60fb      	str	r3, [r7, #12]
		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
 8016088:	68ba      	ldr	r2, [r7, #8]
 801608a:	68fb      	ldr	r3, [r7, #12]
 801608c:	1ad3      	subs	r3, r2, r3
 801608e:	4a1f      	ldr	r2, [pc, #124]	@ (801610c <prvHeapInit+0xac>)
 8016090:	4413      	add	r3, r2
 8016092:	60bb      	str	r3, [r7, #8]
	}

	pucAlignedHeap = ( uint8_t * ) uxAddress;
 8016094:	68fb      	ldr	r3, [r7, #12]
 8016096:	607b      	str	r3, [r7, #4]

	/* xStart is used to hold a pointer to the first item in the list of free
	blocks.  The void cast is used to prevent compiler warnings. */
	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
 8016098:	4a1d      	ldr	r2, [pc, #116]	@ (8016110 <prvHeapInit+0xb0>)
 801609a:	687b      	ldr	r3, [r7, #4]
 801609c:	6013      	str	r3, [r2, #0]
	xStart.xBlockSize = ( size_t ) 0;
 801609e:	4b1c      	ldr	r3, [pc, #112]	@ (8016110 <prvHeapInit+0xb0>)
 80160a0:	2200      	movs	r2, #0
 80160a2:	605a      	str	r2, [r3, #4]

	/* pxEnd is used to mark the end of the list of free blocks and is inserted
	at the end of the heap space. */
	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
 80160a4:	687b      	ldr	r3, [r7, #4]
 80160a6:	68ba      	ldr	r2, [r7, #8]
 80160a8:	4413      	add	r3, r2
 80160aa:	60fb      	str	r3, [r7, #12]
	uxAddress -= xHeapStructSize;
 80160ac:	2208      	movs	r2, #8
 80160ae:	68fb      	ldr	r3, [r7, #12]
 80160b0:	1a9b      	subs	r3, r3, r2
 80160b2:	60fb      	str	r3, [r7, #12]
	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
 80160b4:	68fb      	ldr	r3, [r7, #12]
 80160b6:	f023 0307 	bic.w	r3, r3, #7
 80160ba:	60fb      	str	r3, [r7, #12]
	pxEnd = ( void * ) uxAddress;
 80160bc:	68fb      	ldr	r3, [r7, #12]
 80160be:	4a15      	ldr	r2, [pc, #84]	@ (8016114 <prvHeapInit+0xb4>)
 80160c0:	6013      	str	r3, [r2, #0]
	pxEnd->xBlockSize = 0;
 80160c2:	4b14      	ldr	r3, [pc, #80]	@ (8016114 <prvHeapInit+0xb4>)
 80160c4:	681b      	ldr	r3, [r3, #0]
 80160c6:	2200      	movs	r2, #0
 80160c8:	605a      	str	r2, [r3, #4]
	pxEnd->pxNextFreeBlock = NULL;
 80160ca:	4b12      	ldr	r3, [pc, #72]	@ (8016114 <prvHeapInit+0xb4>)
 80160cc:	681b      	ldr	r3, [r3, #0]
 80160ce:	2200      	movs	r2, #0
 80160d0:	601a      	str	r2, [r3, #0]

	/* To start with there is a single free block that is sized to take up the
	entire heap space, minus the space taken by pxEnd. */
	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
 80160d2:	687b      	ldr	r3, [r7, #4]
 80160d4:	603b      	str	r3, [r7, #0]
	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
 80160d6:	683b      	ldr	r3, [r7, #0]
 80160d8:	68fa      	ldr	r2, [r7, #12]
 80160da:	1ad2      	subs	r2, r2, r3
 80160dc:	683b      	ldr	r3, [r7, #0]
 80160de:	605a      	str	r2, [r3, #4]
	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
 80160e0:	4b0c      	ldr	r3, [pc, #48]	@ (8016114 <prvHeapInit+0xb4>)
 80160e2:	681a      	ldr	r2, [r3, #0]
 80160e4:	683b      	ldr	r3, [r7, #0]
 80160e6:	601a      	str	r2, [r3, #0]

	/* Only one block exists - and it covers the entire usable heap space. */
	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 80160e8:	683b      	ldr	r3, [r7, #0]
 80160ea:	685b      	ldr	r3, [r3, #4]
 80160ec:	4a0a      	ldr	r2, [pc, #40]	@ (8016118 <prvHeapInit+0xb8>)
 80160ee:	6013      	str	r3, [r2, #0]
	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
 80160f0:	683b      	ldr	r3, [r7, #0]
 80160f2:	685b      	ldr	r3, [r3, #4]
 80160f4:	4a09      	ldr	r2, [pc, #36]	@ (801611c <prvHeapInit+0xbc>)
 80160f6:	6013      	str	r3, [r2, #0]

	/* Work out the position of the top bit in a size_t variable. */
	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 80160f8:	4b09      	ldr	r3, [pc, #36]	@ (8016120 <prvHeapInit+0xc0>)
 80160fa:	f04f 4200 	mov.w	r2, #2147483648	@ 0x80000000
 80160fe:	601a      	str	r2, [r3, #0]
}
 8016100:	bf00      	nop
 8016102:	3714      	adds	r7, #20
 8016104:	46bd      	mov	sp, r7
 8016106:	f85d 7b04 	ldr.w	r7, [sp], #4
 801610a:	4770      	bx	lr
 801610c:	240043e4 	.word	0x240043e4
 8016110:	240243e4 	.word	0x240243e4
 8016114:	240243ec 	.word	0x240243ec
 8016118:	240243f4 	.word	0x240243f4
 801611c:	240243f0 	.word	0x240243f0
 8016120:	24024400 	.word	0x24024400

08016124 <prvInsertBlockIntoFreeList>:
/*-----------------------------------------------------------*/

static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
{
 8016124:	b480      	push	{r7}
 8016126:	b085      	sub	sp, #20
 8016128:	af00      	add	r7, sp, #0
 801612a:	6078      	str	r0, [r7, #4]
BlockLink_t *pxIterator;
uint8_t *puc;

	/* Iterate through the list until a block is found that has a higher address
	than the block being inserted. */
	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
 801612c:	4b28      	ldr	r3, [pc, #160]	@ (80161d0 <prvInsertBlockIntoFreeList+0xac>)
 801612e:	60fb      	str	r3, [r7, #12]
 8016130:	e002      	b.n	8016138 <prvInsertBlockIntoFreeList+0x14>
 8016132:	68fb      	ldr	r3, [r7, #12]
 8016134:	681b      	ldr	r3, [r3, #0]
 8016136:	60fb      	str	r3, [r7, #12]
 8016138:	68fb      	ldr	r3, [r7, #12]
 801613a:	681b      	ldr	r3, [r3, #0]
 801613c:	687a      	ldr	r2, [r7, #4]
 801613e:	429a      	cmp	r2, r3
 8016140:	d8f7      	bhi.n	8016132 <prvInsertBlockIntoFreeList+0xe>
		/* Nothing to do here, just iterate to the right position. */
	}

	/* Do the block being inserted, and the block it is being inserted after
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxIterator;
 8016142:	68fb      	ldr	r3, [r7, #12]
 8016144:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
 8016146:	68fb      	ldr	r3, [r7, #12]
 8016148:	685b      	ldr	r3, [r3, #4]
 801614a:	68ba      	ldr	r2, [r7, #8]
 801614c:	4413      	add	r3, r2
 801614e:	687a      	ldr	r2, [r7, #4]
 8016150:	429a      	cmp	r2, r3
 8016152:	d108      	bne.n	8016166 <prvInsertBlockIntoFreeList+0x42>
	{
		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
 8016154:	68fb      	ldr	r3, [r7, #12]
 8016156:	685a      	ldr	r2, [r3, #4]
 8016158:	687b      	ldr	r3, [r7, #4]
 801615a:	685b      	ldr	r3, [r3, #4]
 801615c:	441a      	add	r2, r3
 801615e:	68fb      	ldr	r3, [r7, #12]
 8016160:	605a      	str	r2, [r3, #4]
		pxBlockToInsert = pxIterator;
 8016162:	68fb      	ldr	r3, [r7, #12]
 8016164:	607b      	str	r3, [r7, #4]
		mtCOVERAGE_TEST_MARKER();
	}

	/* Do the block being inserted, and the block it is being inserted before
	make a contiguous block of memory? */
	puc = ( uint8_t * ) pxBlockToInsert;
 8016166:	687b      	ldr	r3, [r7, #4]
 8016168:	60bb      	str	r3, [r7, #8]
	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
 801616a:	687b      	ldr	r3, [r7, #4]
 801616c:	685b      	ldr	r3, [r3, #4]
 801616e:	68ba      	ldr	r2, [r7, #8]
 8016170:	441a      	add	r2, r3
 8016172:	68fb      	ldr	r3, [r7, #12]
 8016174:	681b      	ldr	r3, [r3, #0]
 8016176:	429a      	cmp	r2, r3
 8016178:	d118      	bne.n	80161ac <prvInsertBlockIntoFreeList+0x88>
	{
		if( pxIterator->pxNextFreeBlock != pxEnd )
 801617a:	68fb      	ldr	r3, [r7, #12]
 801617c:	681a      	ldr	r2, [r3, #0]
 801617e:	4b15      	ldr	r3, [pc, #84]	@ (80161d4 <prvInsertBlockIntoFreeList+0xb0>)
 8016180:	681b      	ldr	r3, [r3, #0]
 8016182:	429a      	cmp	r2, r3
 8016184:	d00d      	beq.n	80161a2 <prvInsertBlockIntoFreeList+0x7e>
		{
			/* Form one big block from the two blocks. */
			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
 8016186:	687b      	ldr	r3, [r7, #4]
 8016188:	685a      	ldr	r2, [r3, #4]
 801618a:	68fb      	ldr	r3, [r7, #12]
 801618c:	681b      	ldr	r3, [r3, #0]
 801618e:	685b      	ldr	r3, [r3, #4]
 8016190:	441a      	add	r2, r3
 8016192:	687b      	ldr	r3, [r7, #4]
 8016194:	605a      	str	r2, [r3, #4]
			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
 8016196:	68fb      	ldr	r3, [r7, #12]
 8016198:	681b      	ldr	r3, [r3, #0]
 801619a:	681a      	ldr	r2, [r3, #0]
 801619c:	687b      	ldr	r3, [r7, #4]
 801619e:	601a      	str	r2, [r3, #0]
 80161a0:	e008      	b.n	80161b4 <prvInsertBlockIntoFreeList+0x90>
		}
		else
		{
			pxBlockToInsert->pxNextFreeBlock = pxEnd;
 80161a2:	4b0c      	ldr	r3, [pc, #48]	@ (80161d4 <prvInsertBlockIntoFreeList+0xb0>)
 80161a4:	681a      	ldr	r2, [r3, #0]
 80161a6:	687b      	ldr	r3, [r7, #4]
 80161a8:	601a      	str	r2, [r3, #0]
 80161aa:	e003      	b.n	80161b4 <prvInsertBlockIntoFreeList+0x90>
		}
	}
	else
	{
		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
 80161ac:	68fb      	ldr	r3, [r7, #12]
 80161ae:	681a      	ldr	r2, [r3, #0]
 80161b0:	687b      	ldr	r3, [r7, #4]
 80161b2:	601a      	str	r2, [r3, #0]

	/* If the block being inserted plugged a gab, so was merged with the block
	before and the block after, then it's pxNextFreeBlock pointer will have
	already been set, and should not be set here as that would make it point
	to itself. */
	if( pxIterator != pxBlockToInsert )
 80161b4:	68fa      	ldr	r2, [r7, #12]
 80161b6:	687b      	ldr	r3, [r7, #4]
 80161b8:	429a      	cmp	r2, r3
 80161ba:	d002      	beq.n	80161c2 <prvInsertBlockIntoFreeList+0x9e>
	{
		pxIterator->pxNextFreeBlock = pxBlockToInsert;
 80161bc:	68fb      	ldr	r3, [r7, #12]
 80161be:	687a      	ldr	r2, [r7, #4]
 80161c0:	601a      	str	r2, [r3, #0]
	}
	else
	{
		mtCOVERAGE_TEST_MARKER();
	}
}
 80161c2:	bf00      	nop
 80161c4:	3714      	adds	r7, #20
 80161c6:	46bd      	mov	sp, r7
 80161c8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80161cc:	4770      	bx	lr
 80161ce:	bf00      	nop
 80161d0:	240243e4 	.word	0x240243e4
 80161d4:	240243ec 	.word	0x240243ec

080161d8 <netconn_apimsg>:
 * @param apimsg a struct containing the function to call and its parameters
 * @return ERR_OK if the function was called, another err_t if not
 */
static err_t
netconn_apimsg(tcpip_callback_fn fn, struct api_msg *apimsg)
{
 80161d8:	b580      	push	{r7, lr}
 80161da:	b084      	sub	sp, #16
 80161dc:	af00      	add	r7, sp, #0
 80161de:	6078      	str	r0, [r7, #4]
 80161e0:	6039      	str	r1, [r7, #0]
  err_t err;

#ifdef LWIP_DEBUG
  /* catch functions that don't set err */
  apimsg->err = ERR_VAL;
 80161e2:	683b      	ldr	r3, [r7, #0]
 80161e4:	22fa      	movs	r2, #250	@ 0xfa
 80161e6:	711a      	strb	r2, [r3, #4]

#if LWIP_NETCONN_SEM_PER_THREAD
  apimsg->op_completed_sem = LWIP_NETCONN_THREAD_SEM_GET();
#endif /* LWIP_NETCONN_SEM_PER_THREAD */

  err = tcpip_send_msg_wait_sem(fn, apimsg, LWIP_API_MSG_SEM(apimsg));
 80161e8:	683b      	ldr	r3, [r7, #0]
 80161ea:	681b      	ldr	r3, [r3, #0]
 80161ec:	330c      	adds	r3, #12
 80161ee:	461a      	mov	r2, r3
 80161f0:	6839      	ldr	r1, [r7, #0]
 80161f2:	6878      	ldr	r0, [r7, #4]
 80161f4:	f003 fc7c 	bl	8019af0 <tcpip_send_msg_wait_sem>
 80161f8:	4603      	mov	r3, r0
 80161fa:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 80161fc:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8016200:	2b00      	cmp	r3, #0
 8016202:	d103      	bne.n	801620c <netconn_apimsg+0x34>
    return apimsg->err;
 8016204:	683b      	ldr	r3, [r7, #0]
 8016206:	f993 3004 	ldrsb.w	r3, [r3, #4]
 801620a:	e001      	b.n	8016210 <netconn_apimsg+0x38>
  }
  return err;
 801620c:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8016210:	4618      	mov	r0, r3
 8016212:	3710      	adds	r7, #16
 8016214:	46bd      	mov	sp, r7
 8016216:	bd80      	pop	{r7, pc}

08016218 <netconn_new_with_proto_and_callback>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, netconn_callback callback)
{
 8016218:	b580      	push	{r7, lr}
 801621a:	b08c      	sub	sp, #48	@ 0x30
 801621c:	af00      	add	r7, sp, #0
 801621e:	4603      	mov	r3, r0
 8016220:	603a      	str	r2, [r7, #0]
 8016222:	71fb      	strb	r3, [r7, #7]
 8016224:	460b      	mov	r3, r1
 8016226:	71bb      	strb	r3, [r7, #6]
  struct netconn *conn;
  API_MSG_VAR_DECLARE(msg);
  API_MSG_VAR_ALLOC_RETURN_NULL(msg);

  conn = netconn_alloc(t, callback);
 8016228:	79fb      	ldrb	r3, [r7, #7]
 801622a:	6839      	ldr	r1, [r7, #0]
 801622c:	4618      	mov	r0, r3
 801622e:	f001 f8ad 	bl	801738c <netconn_alloc>
 8016232:	62f8      	str	r0, [r7, #44]	@ 0x2c
  if (conn != NULL) {
 8016234:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8016236:	2b00      	cmp	r3, #0
 8016238:	d054      	beq.n	80162e4 <netconn_new_with_proto_and_callback+0xcc>
    err_t err;

    API_MSG_VAR_REF(msg).msg.n.proto = proto;
 801623a:	79bb      	ldrb	r3, [r7, #6]
 801623c:	743b      	strb	r3, [r7, #16]
    API_MSG_VAR_REF(msg).conn = conn;
 801623e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8016240:	60bb      	str	r3, [r7, #8]
    err = netconn_apimsg(lwip_netconn_do_newconn, &API_MSG_VAR_REF(msg));
 8016242:	f107 0308 	add.w	r3, r7, #8
 8016246:	4619      	mov	r1, r3
 8016248:	4829      	ldr	r0, [pc, #164]	@ (80162f0 <netconn_new_with_proto_and_callback+0xd8>)
 801624a:	f7ff ffc5 	bl	80161d8 <netconn_apimsg>
 801624e:	4603      	mov	r3, r0
 8016250:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    if (err != ERR_OK) {
 8016254:	f997 302b 	ldrsb.w	r3, [r7, #43]	@ 0x2b
 8016258:	2b00      	cmp	r3, #0
 801625a:	d043      	beq.n	80162e4 <netconn_new_with_proto_and_callback+0xcc>
      LWIP_ASSERT("freeing conn without freeing pcb", conn->pcb.tcp == NULL);
 801625c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801625e:	685b      	ldr	r3, [r3, #4]
 8016260:	2b00      	cmp	r3, #0
 8016262:	d005      	beq.n	8016270 <netconn_new_with_proto_and_callback+0x58>
 8016264:	4b23      	ldr	r3, [pc, #140]	@ (80162f4 <netconn_new_with_proto_and_callback+0xdc>)
 8016266:	22a3      	movs	r2, #163	@ 0xa3
 8016268:	4923      	ldr	r1, [pc, #140]	@ (80162f8 <netconn_new_with_proto_and_callback+0xe0>)
 801626a:	4824      	ldr	r0, [pc, #144]	@ (80162fc <netconn_new_with_proto_and_callback+0xe4>)
 801626c:	f014 fbf6 	bl	802aa5c <iprintf>
      LWIP_ASSERT("conn has no recvmbox", sys_mbox_valid(&conn->recvmbox));
 8016270:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8016272:	3310      	adds	r3, #16
 8016274:	4618      	mov	r0, r3
 8016276:	f011 f851 	bl	802731c <sys_mbox_valid>
 801627a:	4603      	mov	r3, r0
 801627c:	2b00      	cmp	r3, #0
 801627e:	d105      	bne.n	801628c <netconn_new_with_proto_and_callback+0x74>
 8016280:	4b1c      	ldr	r3, [pc, #112]	@ (80162f4 <netconn_new_with_proto_and_callback+0xdc>)
 8016282:	22a4      	movs	r2, #164	@ 0xa4
 8016284:	491e      	ldr	r1, [pc, #120]	@ (8016300 <netconn_new_with_proto_and_callback+0xe8>)
 8016286:	481d      	ldr	r0, [pc, #116]	@ (80162fc <netconn_new_with_proto_and_callback+0xe4>)
 8016288:	f014 fbe8 	bl	802aa5c <iprintf>
#if LWIP_TCP
      LWIP_ASSERT("conn->acceptmbox shouldn't exist", !sys_mbox_valid(&conn->acceptmbox));
 801628c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801628e:	3314      	adds	r3, #20
 8016290:	4618      	mov	r0, r3
 8016292:	f011 f843 	bl	802731c <sys_mbox_valid>
 8016296:	4603      	mov	r3, r0
 8016298:	2b00      	cmp	r3, #0
 801629a:	d005      	beq.n	80162a8 <netconn_new_with_proto_and_callback+0x90>
 801629c:	4b15      	ldr	r3, [pc, #84]	@ (80162f4 <netconn_new_with_proto_and_callback+0xdc>)
 801629e:	22a6      	movs	r2, #166	@ 0xa6
 80162a0:	4918      	ldr	r1, [pc, #96]	@ (8016304 <netconn_new_with_proto_and_callback+0xec>)
 80162a2:	4816      	ldr	r0, [pc, #88]	@ (80162fc <netconn_new_with_proto_and_callback+0xe4>)
 80162a4:	f014 fbda 	bl	802aa5c <iprintf>
#endif /* LWIP_TCP */
#if !LWIP_NETCONN_SEM_PER_THREAD
      LWIP_ASSERT("conn has no op_completed", sys_sem_valid(&conn->op_completed));
 80162a8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80162aa:	330c      	adds	r3, #12
 80162ac:	4618      	mov	r0, r3
 80162ae:	f011 f8c3 	bl	8027438 <sys_sem_valid>
 80162b2:	4603      	mov	r3, r0
 80162b4:	2b00      	cmp	r3, #0
 80162b6:	d105      	bne.n	80162c4 <netconn_new_with_proto_and_callback+0xac>
 80162b8:	4b0e      	ldr	r3, [pc, #56]	@ (80162f4 <netconn_new_with_proto_and_callback+0xdc>)
 80162ba:	22a9      	movs	r2, #169	@ 0xa9
 80162bc:	4912      	ldr	r1, [pc, #72]	@ (8016308 <netconn_new_with_proto_and_callback+0xf0>)
 80162be:	480f      	ldr	r0, [pc, #60]	@ (80162fc <netconn_new_with_proto_and_callback+0xe4>)
 80162c0:	f014 fbcc 	bl	802aa5c <iprintf>
      sys_sem_free(&conn->op_completed);
 80162c4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80162c6:	330c      	adds	r3, #12
 80162c8:	4618      	mov	r0, r3
 80162ca:	f011 f8a8 	bl	802741e <sys_sem_free>
#endif /* !LWIP_NETCONN_SEM_PER_THREAD */
      sys_mbox_free(&conn->recvmbox);
 80162ce:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80162d0:	3310      	adds	r3, #16
 80162d2:	4618      	mov	r0, r3
 80162d4:	f010 ffae 	bl	8027234 <sys_mbox_free>
      memp_free(MEMP_NETCONN, conn);
 80162d8:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 80162da:	2007      	movs	r0, #7
 80162dc:	f004 fa58 	bl	801a790 <memp_free>
      API_MSG_VAR_FREE(msg);
      return NULL;
 80162e0:	2300      	movs	r3, #0
 80162e2:	e000      	b.n	80162e6 <netconn_new_with_proto_and_callback+0xce>
    }
  }
  API_MSG_VAR_FREE(msg);
  return conn;
 80162e4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
}
 80162e6:	4618      	mov	r0, r3
 80162e8:	3730      	adds	r7, #48	@ 0x30
 80162ea:	46bd      	mov	sp, r7
 80162ec:	bd80      	pop	{r7, pc}
 80162ee:	bf00      	nop
 80162f0:	08017361 	.word	0x08017361
 80162f4:	0802ddfc 	.word	0x0802ddfc
 80162f8:	0802de30 	.word	0x0802de30
 80162fc:	0802de54 	.word	0x0802de54
 8016300:	0802de7c 	.word	0x0802de7c
 8016304:	0802de94 	.word	0x0802de94
 8016308:	0802deb8 	.word	0x0802deb8

0801630c <netconn_prepare_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_prepare_delete(struct netconn *conn)
{
 801630c:	b580      	push	{r7, lr}
 801630e:	b08c      	sub	sp, #48	@ 0x30
 8016310:	af00      	add	r7, sp, #0
 8016312:	6078      	str	r0, [r7, #4]
  err_t err;
  API_MSG_VAR_DECLARE(msg);

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 8016314:	687b      	ldr	r3, [r7, #4]
 8016316:	2b00      	cmp	r3, #0
 8016318:	d101      	bne.n	801631e <netconn_prepare_delete+0x12>
    return ERR_OK;
 801631a:	2300      	movs	r3, #0
 801631c:	e014      	b.n	8016348 <netconn_prepare_delete+0x3c>
  }

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 801631e:	687b      	ldr	r3, [r7, #4]
 8016320:	60fb      	str	r3, [r7, #12]
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#if LWIP_TCP
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 8016322:	2329      	movs	r3, #41	@ 0x29
 8016324:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_TCP */
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  err = netconn_apimsg(lwip_netconn_do_delconn, &API_MSG_VAR_REF(msg));
 8016326:	f107 030c 	add.w	r3, r7, #12
 801632a:	4619      	mov	r1, r3
 801632c:	4808      	ldr	r0, [pc, #32]	@ (8016350 <netconn_prepare_delete+0x44>)
 801632e:	f7ff ff53 	bl	80161d8 <netconn_apimsg>
 8016332:	4603      	mov	r3, r0
 8016334:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  if (err != ERR_OK) {
 8016338:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 801633c:	2b00      	cmp	r3, #0
 801633e:	d002      	beq.n	8016346 <netconn_prepare_delete+0x3a>
    return err;
 8016340:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
 8016344:	e000      	b.n	8016348 <netconn_prepare_delete+0x3c>
  }
  return ERR_OK;
 8016346:	2300      	movs	r3, #0
}
 8016348:	4618      	mov	r0, r3
 801634a:	3730      	adds	r7, #48	@ 0x30
 801634c:	46bd      	mov	sp, r7
 801634e:	bd80      	pop	{r7, pc}
 8016350:	080178e5 	.word	0x080178e5

08016354 <netconn_delete>:
 * @param conn the netconn to delete
 * @return ERR_OK if the connection was deleted
 */
err_t
netconn_delete(struct netconn *conn)
{
 8016354:	b580      	push	{r7, lr}
 8016356:	b084      	sub	sp, #16
 8016358:	af00      	add	r7, sp, #0
 801635a:	6078      	str	r0, [r7, #4]
  err_t err;

  /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */
  if (conn == NULL) {
 801635c:	687b      	ldr	r3, [r7, #4]
 801635e:	2b00      	cmp	r3, #0
 8016360:	d101      	bne.n	8016366 <netconn_delete+0x12>
    return ERR_OK;
 8016362:	2300      	movs	r3, #0
 8016364:	e00d      	b.n	8016382 <netconn_delete+0x2e>
    /* Already called netconn_prepare_delete() before */
    err = ERR_OK;
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    err = netconn_prepare_delete(conn);
 8016366:	6878      	ldr	r0, [r7, #4]
 8016368:	f7ff ffd0 	bl	801630c <netconn_prepare_delete>
 801636c:	4603      	mov	r3, r0
 801636e:	73fb      	strb	r3, [r7, #15]
  }
  if (err == ERR_OK) {
 8016370:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8016374:	2b00      	cmp	r3, #0
 8016376:	d102      	bne.n	801637e <netconn_delete+0x2a>
    netconn_free(conn);
 8016378:	6878      	ldr	r0, [r7, #4]
 801637a:	f001 f881 	bl	8017480 <netconn_free>
  }
  return err;
 801637e:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8016382:	4618      	mov	r0, r3
 8016384:	3710      	adds	r7, #16
 8016386:	46bd      	mov	sp, r7
 8016388:	bd80      	pop	{r7, pc}
	...

0801638c <netconn_getaddr>:
 * @return ERR_CONN for invalid connections
 *         ERR_OK if the information was retrieved
 */
err_t
netconn_getaddr(struct netconn *conn, ip_addr_t *addr, u16_t *port, u8_t local)
{
 801638c:	b580      	push	{r7, lr}
 801638e:	b08e      	sub	sp, #56	@ 0x38
 8016390:	af00      	add	r7, sp, #0
 8016392:	60f8      	str	r0, [r7, #12]
 8016394:	60b9      	str	r1, [r7, #8]
 8016396:	607a      	str	r2, [r7, #4]
 8016398:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_getaddr: invalid conn", (conn != NULL), return ERR_ARG;);
 801639a:	68fb      	ldr	r3, [r7, #12]
 801639c:	2b00      	cmp	r3, #0
 801639e:	d109      	bne.n	80163b4 <netconn_getaddr+0x28>
 80163a0:	4b1d      	ldr	r3, [pc, #116]	@ (8016418 <netconn_getaddr+0x8c>)
 80163a2:	f44f 7289 	mov.w	r2, #274	@ 0x112
 80163a6:	491d      	ldr	r1, [pc, #116]	@ (801641c <netconn_getaddr+0x90>)
 80163a8:	481d      	ldr	r0, [pc, #116]	@ (8016420 <netconn_getaddr+0x94>)
 80163aa:	f014 fb57 	bl	802aa5c <iprintf>
 80163ae:	f06f 030f 	mvn.w	r3, #15
 80163b2:	e02d      	b.n	8016410 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid addr", (addr != NULL), return ERR_ARG;);
 80163b4:	68bb      	ldr	r3, [r7, #8]
 80163b6:	2b00      	cmp	r3, #0
 80163b8:	d109      	bne.n	80163ce <netconn_getaddr+0x42>
 80163ba:	4b17      	ldr	r3, [pc, #92]	@ (8016418 <netconn_getaddr+0x8c>)
 80163bc:	f240 1213 	movw	r2, #275	@ 0x113
 80163c0:	4918      	ldr	r1, [pc, #96]	@ (8016424 <netconn_getaddr+0x98>)
 80163c2:	4817      	ldr	r0, [pc, #92]	@ (8016420 <netconn_getaddr+0x94>)
 80163c4:	f014 fb4a 	bl	802aa5c <iprintf>
 80163c8:	f06f 030f 	mvn.w	r3, #15
 80163cc:	e020      	b.n	8016410 <netconn_getaddr+0x84>
  LWIP_ERROR("netconn_getaddr: invalid port", (port != NULL), return ERR_ARG;);
 80163ce:	687b      	ldr	r3, [r7, #4]
 80163d0:	2b00      	cmp	r3, #0
 80163d2:	d109      	bne.n	80163e8 <netconn_getaddr+0x5c>
 80163d4:	4b10      	ldr	r3, [pc, #64]	@ (8016418 <netconn_getaddr+0x8c>)
 80163d6:	f44f 728a 	mov.w	r2, #276	@ 0x114
 80163da:	4913      	ldr	r1, [pc, #76]	@ (8016428 <netconn_getaddr+0x9c>)
 80163dc:	4810      	ldr	r0, [pc, #64]	@ (8016420 <netconn_getaddr+0x94>)
 80163de:	f014 fb3d 	bl	802aa5c <iprintf>
 80163e2:	f06f 030f 	mvn.w	r3, #15
 80163e6:	e013      	b.n	8016410 <netconn_getaddr+0x84>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 80163e8:	68fb      	ldr	r3, [r7, #12]
 80163ea:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.ad.local = local;
 80163ec:	78fb      	ldrb	r3, [r7, #3]
 80163ee:	f887 3024 	strb.w	r3, [r7, #36]	@ 0x24
#if LWIP_MPU_COMPATIBLE
  err = netconn_apimsg(lwip_netconn_do_getaddr, &API_MSG_VAR_REF(msg));
  *addr = msg->msg.ad.ipaddr;
  *port = msg->msg.ad.port;
#else /* LWIP_MPU_COMPATIBLE */
  msg.msg.ad.ipaddr = addr;
 80163f2:	68bb      	ldr	r3, [r7, #8]
 80163f4:	61fb      	str	r3, [r7, #28]
  msg.msg.ad.port = port;
 80163f6:	687b      	ldr	r3, [r7, #4]
 80163f8:	623b      	str	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_getaddr, &msg);
 80163fa:	f107 0314 	add.w	r3, r7, #20
 80163fe:	4619      	mov	r1, r3
 8016400:	480a      	ldr	r0, [pc, #40]	@ (801642c <netconn_getaddr+0xa0>)
 8016402:	f7ff fee9 	bl	80161d8 <netconn_apimsg>
 8016406:	4603      	mov	r3, r0
 8016408:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
#endif /* LWIP_MPU_COMPATIBLE */
  API_MSG_VAR_FREE(msg);

  return err;
 801640c:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8016410:	4618      	mov	r0, r3
 8016412:	3738      	adds	r7, #56	@ 0x38
 8016414:	46bd      	mov	sp, r7
 8016416:	bd80      	pop	{r7, pc}
 8016418:	0802ddfc 	.word	0x0802ddfc
 801641c:	0802ded4 	.word	0x0802ded4
 8016420:	0802de54 	.word	0x0802de54
 8016424:	0802def4 	.word	0x0802def4
 8016428:	0802df14 	.word	0x0802df14
 801642c:	08018341 	.word	0x08018341

08016430 <netconn_connect>:
 * @param port the remote port to connect to (no used for RAW)
 * @return ERR_OK if connected, return value of tcp_/udp_/raw_connect otherwise
 */
err_t
netconn_connect(struct netconn *conn, const ip_addr_t *addr, u16_t port)
{
 8016430:	b580      	push	{r7, lr}
 8016432:	b08e      	sub	sp, #56	@ 0x38
 8016434:	af00      	add	r7, sp, #0
 8016436:	60f8      	str	r0, [r7, #12]
 8016438:	60b9      	str	r1, [r7, #8]
 801643a:	4613      	mov	r3, r2
 801643c:	80fb      	strh	r3, [r7, #6]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_connect: invalid conn", (conn != NULL), return ERR_ARG;);
 801643e:	68fb      	ldr	r3, [r7, #12]
 8016440:	2b00      	cmp	r3, #0
 8016442:	d109      	bne.n	8016458 <netconn_connect+0x28>
 8016444:	4b11      	ldr	r3, [pc, #68]	@ (801648c <netconn_connect+0x5c>)
 8016446:	f44f 72bf 	mov.w	r2, #382	@ 0x17e
 801644a:	4911      	ldr	r1, [pc, #68]	@ (8016490 <netconn_connect+0x60>)
 801644c:	4811      	ldr	r0, [pc, #68]	@ (8016494 <netconn_connect+0x64>)
 801644e:	f014 fb05 	bl	802aa5c <iprintf>
 8016452:	f06f 030f 	mvn.w	r3, #15
 8016456:	e015      	b.n	8016484 <netconn_connect+0x54>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IP_ADDR_ANY alias) to subsequent functions */
  if (addr == NULL) {
 8016458:	68bb      	ldr	r3, [r7, #8]
 801645a:	2b00      	cmp	r3, #0
 801645c:	d101      	bne.n	8016462 <netconn_connect+0x32>
    addr = IP4_ADDR_ANY;
 801645e:	4b0e      	ldr	r3, [pc, #56]	@ (8016498 <netconn_connect+0x68>)
 8016460:	60bb      	str	r3, [r7, #8]
  }
#endif /* LWIP_IPV4 */

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8016462:	68fb      	ldr	r3, [r7, #12]
 8016464:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.bc.ipaddr = API_MSG_VAR_REF(addr);
 8016466:	68bb      	ldr	r3, [r7, #8]
 8016468:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.bc.port = port;
 801646a:	88fb      	ldrh	r3, [r7, #6]
 801646c:	843b      	strh	r3, [r7, #32]
  err = netconn_apimsg(lwip_netconn_do_connect, &API_MSG_VAR_REF(msg));
 801646e:	f107 0314 	add.w	r3, r7, #20
 8016472:	4619      	mov	r1, r3
 8016474:	4809      	ldr	r0, [pc, #36]	@ (801649c <netconn_connect+0x6c>)
 8016476:	f7ff feaf 	bl	80161d8 <netconn_apimsg>
 801647a:	4603      	mov	r3, r0
 801647c:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  API_MSG_VAR_FREE(msg);

  return err;
 8016480:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8016484:	4618      	mov	r0, r3
 8016486:	3738      	adds	r7, #56	@ 0x38
 8016488:	46bd      	mov	sp, r7
 801648a:	bd80      	pop	{r7, pc}
 801648c:	0802ddfc 	.word	0x0802ddfc
 8016490:	0802df70 	.word	0x0802df70
 8016494:	0802de54 	.word	0x0802de54
 8016498:	08031ef8 	.word	0x08031ef8
 801649c:	08017bd1 	.word	0x08017bd1

080164a0 <netconn_disconnect>:
 * @param conn the netconn to disconnect
 * @return See @ref err_t
 */
err_t
netconn_disconnect(struct netconn *conn)
{
 80164a0:	b580      	push	{r7, lr}
 80164a2:	b08c      	sub	sp, #48	@ 0x30
 80164a4:	af00      	add	r7, sp, #0
 80164a6:	6078      	str	r0, [r7, #4]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_disconnect: invalid conn", (conn != NULL), return ERR_ARG;);
 80164a8:	687b      	ldr	r3, [r7, #4]
 80164aa:	2b00      	cmp	r3, #0
 80164ac:	d109      	bne.n	80164c2 <netconn_disconnect+0x22>
 80164ae:	4b0d      	ldr	r3, [pc, #52]	@ (80164e4 <netconn_disconnect+0x44>)
 80164b0:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 80164b4:	490c      	ldr	r1, [pc, #48]	@ (80164e8 <netconn_disconnect+0x48>)
 80164b6:	480d      	ldr	r0, [pc, #52]	@ (80164ec <netconn_disconnect+0x4c>)
 80164b8:	f014 fad0 	bl	802aa5c <iprintf>
 80164bc:	f06f 030f 	mvn.w	r3, #15
 80164c0:	e00c      	b.n	80164dc <netconn_disconnect+0x3c>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 80164c2:	687b      	ldr	r3, [r7, #4]
 80164c4:	60fb      	str	r3, [r7, #12]
  err = netconn_apimsg(lwip_netconn_do_disconnect, &API_MSG_VAR_REF(msg));
 80164c6:	f107 030c 	add.w	r3, r7, #12
 80164ca:	4619      	mov	r1, r3
 80164cc:	4808      	ldr	r0, [pc, #32]	@ (80164f0 <netconn_disconnect+0x50>)
 80164ce:	f7ff fe83 	bl	80161d8 <netconn_apimsg>
 80164d2:	4603      	mov	r3, r0
 80164d4:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 80164d8:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 80164dc:	4618      	mov	r0, r3
 80164de:	3730      	adds	r7, #48	@ 0x30
 80164e0:	46bd      	mov	sp, r7
 80164e2:	bd80      	pop	{r7, pc}
 80164e4:	0802ddfc 	.word	0x0802ddfc
 80164e8:	0802df90 	.word	0x0802df90
 80164ec:	0802de54 	.word	0x0802de54
 80164f0:	08017d51 	.word	0x08017d51

080164f4 <netconn_recv_data>:
 *         ERR_WOULDBLOCK if the netconn is nonblocking but would block to wait for data
 *         ERR_TIMEOUT if the netconn has a receive timeout and no data was received
 */
static err_t
netconn_recv_data(struct netconn *conn, void **new_buf, u8_t apiflags)
{
 80164f4:	b580      	push	{r7, lr}
 80164f6:	b08a      	sub	sp, #40	@ 0x28
 80164f8:	af00      	add	r7, sp, #0
 80164fa:	60f8      	str	r0, [r7, #12]
 80164fc:	60b9      	str	r1, [r7, #8]
 80164fe:	4613      	mov	r3, r2
 8016500:	71fb      	strb	r3, [r7, #7]
  void *buf = NULL;
 8016502:	2300      	movs	r3, #0
 8016504:	61bb      	str	r3, [r7, #24]
  u16_t len;

  LWIP_ERROR("netconn_recv: invalid pointer", (new_buf != NULL), return ERR_ARG;);
 8016506:	68bb      	ldr	r3, [r7, #8]
 8016508:	2b00      	cmp	r3, #0
 801650a:	d109      	bne.n	8016520 <netconn_recv_data+0x2c>
 801650c:	4b64      	ldr	r3, [pc, #400]	@ (80166a0 <netconn_recv_data+0x1ac>)
 801650e:	f44f 7212 	mov.w	r2, #584	@ 0x248
 8016512:	4964      	ldr	r1, [pc, #400]	@ (80166a4 <netconn_recv_data+0x1b0>)
 8016514:	4864      	ldr	r0, [pc, #400]	@ (80166a8 <netconn_recv_data+0x1b4>)
 8016516:	f014 faa1 	bl	802aa5c <iprintf>
 801651a:	f06f 030f 	mvn.w	r3, #15
 801651e:	e0bb      	b.n	8016698 <netconn_recv_data+0x1a4>
  *new_buf = NULL;
 8016520:	68bb      	ldr	r3, [r7, #8]
 8016522:	2200      	movs	r2, #0
 8016524:	601a      	str	r2, [r3, #0]
  LWIP_ERROR("netconn_recv: invalid conn",    (conn != NULL),    return ERR_ARG;);
 8016526:	68fb      	ldr	r3, [r7, #12]
 8016528:	2b00      	cmp	r3, #0
 801652a:	d109      	bne.n	8016540 <netconn_recv_data+0x4c>
 801652c:	4b5c      	ldr	r3, [pc, #368]	@ (80166a0 <netconn_recv_data+0x1ac>)
 801652e:	f240 224a 	movw	r2, #586	@ 0x24a
 8016532:	495e      	ldr	r1, [pc, #376]	@ (80166ac <netconn_recv_data+0x1b8>)
 8016534:	485c      	ldr	r0, [pc, #368]	@ (80166a8 <netconn_recv_data+0x1b4>)
 8016536:	f014 fa91 	bl	802aa5c <iprintf>
 801653a:	f06f 030f 	mvn.w	r3, #15
 801653e:	e0ab      	b.n	8016698 <netconn_recv_data+0x1a4>

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 8016540:	68fb      	ldr	r3, [r7, #12]
 8016542:	3310      	adds	r3, #16
 8016544:	4618      	mov	r0, r3
 8016546:	f010 fee9 	bl	802731c <sys_mbox_valid>
 801654a:	4603      	mov	r3, r0
 801654c:	2b00      	cmp	r3, #0
 801654e:	d10e      	bne.n	801656e <netconn_recv_data+0x7a>
    err_t err = netconn_err(conn);
 8016550:	68f8      	ldr	r0, [r7, #12]
 8016552:	f000 fb1f 	bl	8016b94 <netconn_err>
 8016556:	4603      	mov	r3, r0
 8016558:	77fb      	strb	r3, [r7, #31]
    if (err != ERR_OK) {
 801655a:	f997 301f 	ldrsb.w	r3, [r7, #31]
 801655e:	2b00      	cmp	r3, #0
 8016560:	d002      	beq.n	8016568 <netconn_recv_data+0x74>
      /* return pending error */
      return err;
 8016562:	f997 301f 	ldrsb.w	r3, [r7, #31]
 8016566:	e097      	b.n	8016698 <netconn_recv_data+0x1a4>
    }
    return ERR_CONN;
 8016568:	f06f 030a 	mvn.w	r3, #10
 801656c:	e094      	b.n	8016698 <netconn_recv_data+0x1a4>
  }

  NETCONN_MBOX_WAITING_INC(conn);
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 801656e:	68fb      	ldr	r3, [r7, #12]
 8016570:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016574:	f003 0302 	and.w	r3, r3, #2
 8016578:	2b00      	cmp	r3, #0
 801657a:	d110      	bne.n	801659e <netconn_recv_data+0xaa>
 801657c:	79fb      	ldrb	r3, [r7, #7]
 801657e:	f003 0304 	and.w	r3, r3, #4
 8016582:	2b00      	cmp	r3, #0
 8016584:	d10b      	bne.n	801659e <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8016586:	68fb      	ldr	r3, [r7, #12]
 8016588:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801658c:	f003 0301 	and.w	r3, r3, #1
  if (netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK) ||
 8016590:	2b00      	cmp	r3, #0
 8016592:	d104      	bne.n	801659e <netconn_recv_data+0xaa>
      (conn->flags & NETCONN_FLAG_MBOXCLOSED) || (conn->pending_err != ERR_OK)) {
 8016594:	68fb      	ldr	r3, [r7, #12]
 8016596:	f993 3008 	ldrsb.w	r3, [r3, #8]
 801659a:	2b00      	cmp	r3, #0
 801659c:	d025      	beq.n	80165ea <netconn_recv_data+0xf6>
    if (sys_arch_mbox_tryfetch(&conn->recvmbox, &buf) == SYS_ARCH_TIMEOUT) {
 801659e:	68fb      	ldr	r3, [r7, #12]
 80165a0:	3310      	adds	r3, #16
 80165a2:	f107 0218 	add.w	r2, r7, #24
 80165a6:	4611      	mov	r1, r2
 80165a8:	4618      	mov	r0, r3
 80165aa:	f010 fea0 	bl	80272ee <sys_arch_mbox_tryfetch>
 80165ae:	4603      	mov	r3, r0
 80165b0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80165b4:	d12a      	bne.n	801660c <netconn_recv_data+0x118>
      err_t err;
      NETCONN_MBOX_WAITING_DEC(conn);
      err = netconn_err(conn);
 80165b6:	68f8      	ldr	r0, [r7, #12]
 80165b8:	f000 faec 	bl	8016b94 <netconn_err>
 80165bc:	4603      	mov	r3, r0
 80165be:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
      if (err != ERR_OK) {
 80165c2:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 80165c6:	2b00      	cmp	r3, #0
 80165c8:	d002      	beq.n	80165d0 <netconn_recv_data+0xdc>
        /* return pending error */
        return err;
 80165ca:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 80165ce:	e063      	b.n	8016698 <netconn_recv_data+0x1a4>
      }
      if (conn->flags & NETCONN_FLAG_MBOXCLOSED) {
 80165d0:	68fb      	ldr	r3, [r7, #12]
 80165d2:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80165d6:	f003 0301 	and.w	r3, r3, #1
 80165da:	2b00      	cmp	r3, #0
 80165dc:	d002      	beq.n	80165e4 <netconn_recv_data+0xf0>
        return ERR_CONN;
 80165de:	f06f 030a 	mvn.w	r3, #10
 80165e2:	e059      	b.n	8016698 <netconn_recv_data+0x1a4>
      }
      return ERR_WOULDBLOCK;
 80165e4:	f06f 0306 	mvn.w	r3, #6
 80165e8:	e056      	b.n	8016698 <netconn_recv_data+0x1a4>
    }
  } else {
#if LWIP_SO_RCVTIMEO
    if (sys_arch_mbox_fetch(&conn->recvmbox, &buf, conn->recv_timeout) == SYS_ARCH_TIMEOUT) {
 80165ea:	68fb      	ldr	r3, [r7, #12]
 80165ec:	f103 0010 	add.w	r0, r3, #16
 80165f0:	68fb      	ldr	r3, [r7, #12]
 80165f2:	69da      	ldr	r2, [r3, #28]
 80165f4:	f107 0318 	add.w	r3, r7, #24
 80165f8:	4619      	mov	r1, r3
 80165fa:	f010 fe47 	bl	802728c <sys_arch_mbox_fetch>
 80165fe:	4603      	mov	r3, r0
 8016600:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8016604:	d102      	bne.n	801660c <netconn_recv_data+0x118>
      NETCONN_MBOX_WAITING_DEC(conn);
      return ERR_TIMEOUT;
 8016606:	f06f 0302 	mvn.w	r3, #2
 801660a:	e045      	b.n	8016698 <netconn_recv_data+0x1a4>
  }
#endif

#if LWIP_TCP
#if (LWIP_UDP || LWIP_RAW)
  if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP)
 801660c:	68fb      	ldr	r3, [r7, #12]
 801660e:	781b      	ldrb	r3, [r3, #0]
 8016610:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8016614:	2b10      	cmp	r3, #16
 8016616:	d117      	bne.n	8016648 <netconn_recv_data+0x154>
#endif /* (LWIP_UDP || LWIP_RAW) */
  {
    err_t err;
    /* Check if this is an error message or a pbuf */
    if (lwip_netconn_is_err_msg(buf, &err)) {
 8016618:	69bb      	ldr	r3, [r7, #24]
 801661a:	f107 0217 	add.w	r2, r7, #23
 801661e:	4611      	mov	r1, r2
 8016620:	4618      	mov	r0, r3
 8016622:	f000 fb09 	bl	8016c38 <lwip_netconn_is_err_msg>
 8016626:	4603      	mov	r3, r0
 8016628:	2b00      	cmp	r3, #0
 801662a:	d009      	beq.n	8016640 <netconn_recv_data+0x14c>
      /* new_buf has been zeroed above already */
      if (err == ERR_CLSD) {
 801662c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8016630:	f113 0f0f 	cmn.w	r3, #15
 8016634:	d101      	bne.n	801663a <netconn_recv_data+0x146>
        /* connection closed translates to ERR_OK with *new_buf == NULL */
        return ERR_OK;
 8016636:	2300      	movs	r3, #0
 8016638:	e02e      	b.n	8016698 <netconn_recv_data+0x1a4>
      }
      return err;
 801663a:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801663e:	e02b      	b.n	8016698 <netconn_recv_data+0x1a4>
    }
    len = ((struct pbuf *)buf)->tot_len;
 8016640:	69bb      	ldr	r3, [r7, #24]
 8016642:	891b      	ldrh	r3, [r3, #8]
 8016644:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8016646:	e00d      	b.n	8016664 <netconn_recv_data+0x170>
#if LWIP_TCP && (LWIP_UDP || LWIP_RAW)
  else
#endif /* LWIP_TCP && (LWIP_UDP || LWIP_RAW) */
#if (LWIP_UDP || LWIP_RAW)
  {
    LWIP_ASSERT("buf != NULL", buf != NULL);
 8016648:	69bb      	ldr	r3, [r7, #24]
 801664a:	2b00      	cmp	r3, #0
 801664c:	d106      	bne.n	801665c <netconn_recv_data+0x168>
 801664e:	4b14      	ldr	r3, [pc, #80]	@ (80166a0 <netconn_recv_data+0x1ac>)
 8016650:	f240 2291 	movw	r2, #657	@ 0x291
 8016654:	4916      	ldr	r1, [pc, #88]	@ (80166b0 <netconn_recv_data+0x1bc>)
 8016656:	4814      	ldr	r0, [pc, #80]	@ (80166a8 <netconn_recv_data+0x1b4>)
 8016658:	f014 fa00 	bl	802aa5c <iprintf>
    len = netbuf_len((struct netbuf *)buf);
 801665c:	69bb      	ldr	r3, [r7, #24]
 801665e:	681b      	ldr	r3, [r3, #0]
 8016660:	891b      	ldrh	r3, [r3, #8]
 8016662:	84fb      	strh	r3, [r7, #38]	@ 0x26
  }
#endif /* (LWIP_UDP || LWIP_RAW) */

#if LWIP_SO_RCVBUF
  SYS_ARCH_DEC(conn->recv_avail, len);
 8016664:	f010 ff64 	bl	8027530 <sys_arch_protect>
 8016668:	6238      	str	r0, [r7, #32]
 801666a:	68fb      	ldr	r3, [r7, #12]
 801666c:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801666e:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8016670:	1ad2      	subs	r2, r2, r3
 8016672:	68fb      	ldr	r3, [r7, #12]
 8016674:	625a      	str	r2, [r3, #36]	@ 0x24
 8016676:	6a38      	ldr	r0, [r7, #32]
 8016678:	f010 ff68 	bl	802754c <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
  /* Register event with callback */
  API_EVENT(conn, NETCONN_EVT_RCVMINUS, len);
 801667c:	68fb      	ldr	r3, [r7, #12]
 801667e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016680:	2b00      	cmp	r3, #0
 8016682:	d005      	beq.n	8016690 <netconn_recv_data+0x19c>
 8016684:	68fb      	ldr	r3, [r7, #12]
 8016686:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016688:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 801668a:	2101      	movs	r1, #1
 801668c:	68f8      	ldr	r0, [r7, #12]
 801668e:	4798      	blx	r3

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv_data: received %p, len=%"U16_F"\n", buf, len));

  *new_buf = buf;
 8016690:	69ba      	ldr	r2, [r7, #24]
 8016692:	68bb      	ldr	r3, [r7, #8]
 8016694:	601a      	str	r2, [r3, #0]
  /* don't set conn->last_err: it's only ERR_OK, anyway */
  return ERR_OK;
 8016696:	2300      	movs	r3, #0
}
 8016698:	4618      	mov	r0, r3
 801669a:	3728      	adds	r7, #40	@ 0x28
 801669c:	46bd      	mov	sp, r7
 801669e:	bd80      	pop	{r7, pc}
 80166a0:	0802ddfc 	.word	0x0802ddfc
 80166a4:	0802e014 	.word	0x0802e014
 80166a8:	0802de54 	.word	0x0802de54
 80166ac:	0802e034 	.word	0x0802e034
 80166b0:	0802e050 	.word	0x0802e050

080166b4 <netconn_tcp_recvd_msg>:

#if LWIP_TCP
static err_t
netconn_tcp_recvd_msg(struct netconn *conn, size_t len, struct api_msg *msg)
{
 80166b4:	b580      	push	{r7, lr}
 80166b6:	b084      	sub	sp, #16
 80166b8:	af00      	add	r7, sp, #0
 80166ba:	60f8      	str	r0, [r7, #12]
 80166bc:	60b9      	str	r1, [r7, #8]
 80166be:	607a      	str	r2, [r7, #4]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 80166c0:	68fb      	ldr	r3, [r7, #12]
 80166c2:	2b00      	cmp	r3, #0
 80166c4:	d005      	beq.n	80166d2 <netconn_tcp_recvd_msg+0x1e>
 80166c6:	68fb      	ldr	r3, [r7, #12]
 80166c8:	781b      	ldrb	r3, [r3, #0]
 80166ca:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80166ce:	2b10      	cmp	r3, #16
 80166d0:	d009      	beq.n	80166e6 <netconn_tcp_recvd_msg+0x32>
 80166d2:	4b0c      	ldr	r3, [pc, #48]	@ (8016704 <netconn_tcp_recvd_msg+0x50>)
 80166d4:	f240 22a7 	movw	r2, #679	@ 0x2a7
 80166d8:	490b      	ldr	r1, [pc, #44]	@ (8016708 <netconn_tcp_recvd_msg+0x54>)
 80166da:	480c      	ldr	r0, [pc, #48]	@ (801670c <netconn_tcp_recvd_msg+0x58>)
 80166dc:	f014 f9be 	bl	802aa5c <iprintf>
 80166e0:	f06f 030f 	mvn.w	r3, #15
 80166e4:	e00a      	b.n	80166fc <netconn_tcp_recvd_msg+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  msg->conn = conn;
 80166e6:	687b      	ldr	r3, [r7, #4]
 80166e8:	68fa      	ldr	r2, [r7, #12]
 80166ea:	601a      	str	r2, [r3, #0]
  msg->msg.r.len = len;
 80166ec:	687b      	ldr	r3, [r7, #4]
 80166ee:	68ba      	ldr	r2, [r7, #8]
 80166f0:	609a      	str	r2, [r3, #8]

  return netconn_apimsg(lwip_netconn_do_recv, msg);
 80166f2:	6879      	ldr	r1, [r7, #4]
 80166f4:	4806      	ldr	r0, [pc, #24]	@ (8016710 <netconn_tcp_recvd_msg+0x5c>)
 80166f6:	f7ff fd6f 	bl	80161d8 <netconn_apimsg>
 80166fa:	4603      	mov	r3, r0
}
 80166fc:	4618      	mov	r0, r3
 80166fe:	3710      	adds	r7, #16
 8016700:	46bd      	mov	sp, r7
 8016702:	bd80      	pop	{r7, pc}
 8016704:	0802ddfc 	.word	0x0802ddfc
 8016708:	0802e05c 	.word	0x0802e05c
 801670c:	0802de54 	.word	0x0802de54
 8016710:	08017e27 	.word	0x08017e27

08016714 <netconn_tcp_recvd>:

err_t
netconn_tcp_recvd(struct netconn *conn, size_t len)
{
 8016714:	b580      	push	{r7, lr}
 8016716:	b08c      	sub	sp, #48	@ 0x30
 8016718:	af00      	add	r7, sp, #0
 801671a:	6078      	str	r0, [r7, #4]
 801671c:	6039      	str	r1, [r7, #0]
  err_t err;
  API_MSG_VAR_DECLARE(msg);
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 801671e:	687b      	ldr	r3, [r7, #4]
 8016720:	2b00      	cmp	r3, #0
 8016722:	d005      	beq.n	8016730 <netconn_tcp_recvd+0x1c>
 8016724:	687b      	ldr	r3, [r7, #4]
 8016726:	781b      	ldrb	r3, [r3, #0]
 8016728:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801672c:	2b10      	cmp	r3, #16
 801672e:	d009      	beq.n	8016744 <netconn_tcp_recvd+0x30>
 8016730:	4b0c      	ldr	r3, [pc, #48]	@ (8016764 <netconn_tcp_recvd+0x50>)
 8016732:	f240 22b5 	movw	r2, #693	@ 0x2b5
 8016736:	490c      	ldr	r1, [pc, #48]	@ (8016768 <netconn_tcp_recvd+0x54>)
 8016738:	480c      	ldr	r0, [pc, #48]	@ (801676c <netconn_tcp_recvd+0x58>)
 801673a:	f014 f98f 	bl	802aa5c <iprintf>
 801673e:	f06f 030f 	mvn.w	r3, #15
 8016742:	e00b      	b.n	801675c <netconn_tcp_recvd+0x48>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  API_MSG_VAR_ALLOC(msg);
  err = netconn_tcp_recvd_msg(conn, len, &API_VAR_REF(msg));
 8016744:	f107 030c 	add.w	r3, r7, #12
 8016748:	461a      	mov	r2, r3
 801674a:	6839      	ldr	r1, [r7, #0]
 801674c:	6878      	ldr	r0, [r7, #4]
 801674e:	f7ff ffb1 	bl	80166b4 <netconn_tcp_recvd_msg>
 8016752:	4603      	mov	r3, r0
 8016754:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);
  return err;
 8016758:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 801675c:	4618      	mov	r0, r3
 801675e:	3730      	adds	r7, #48	@ 0x30
 8016760:	46bd      	mov	sp, r7
 8016762:	bd80      	pop	{r7, pc}
 8016764:	0802ddfc 	.word	0x0802ddfc
 8016768:	0802e05c 	.word	0x0802e05c
 801676c:	0802de54 	.word	0x0802de54

08016770 <netconn_recv_data_tcp>:

static err_t
netconn_recv_data_tcp(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 8016770:	b580      	push	{r7, lr}
 8016772:	b090      	sub	sp, #64	@ 0x40
 8016774:	af00      	add	r7, sp, #0
 8016776:	60f8      	str	r0, [r7, #12]
 8016778:	60b9      	str	r1, [r7, #8]
 801677a:	4613      	mov	r3, r2
 801677c:	71fb      	strb	r3, [r7, #7]
  API_MSG_VAR_DECLARE(msg);
#if LWIP_MPU_COMPATIBLE
  msg = NULL;
#endif

  if (!NETCONN_RECVMBOX_WAITABLE(conn)) {
 801677e:	68fb      	ldr	r3, [r7, #12]
 8016780:	3310      	adds	r3, #16
 8016782:	4618      	mov	r0, r3
 8016784:	f010 fdca 	bl	802731c <sys_mbox_valid>
 8016788:	4603      	mov	r3, r0
 801678a:	2b00      	cmp	r3, #0
 801678c:	d102      	bne.n	8016794 <netconn_recv_data_tcp+0x24>
    /* This only happens when calling this function more than once *after* receiving FIN */
    return ERR_CONN;
 801678e:	f06f 030a 	mvn.w	r3, #10
 8016792:	e072      	b.n	801687a <netconn_recv_data_tcp+0x10a>
  }
  if (netconn_is_flag_set(conn, NETCONN_FIN_RX_PENDING)) {
 8016794:	68fb      	ldr	r3, [r7, #12]
 8016796:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801679a:	b25b      	sxtb	r3, r3
 801679c:	2b00      	cmp	r3, #0
 801679e:	da09      	bge.n	80167b4 <netconn_recv_data_tcp+0x44>
    netconn_clear_flags(conn, NETCONN_FIN_RX_PENDING);
 80167a0:	68fb      	ldr	r3, [r7, #12]
 80167a2:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80167a6:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 80167aa:	b2da      	uxtb	r2, r3
 80167ac:	68fb      	ldr	r3, [r7, #12]
 80167ae:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
    goto handle_fin;
 80167b2:	e03b      	b.n	801682c <netconn_recv_data_tcp+0xbc>
    /* need to allocate API message here so empty message pool does not result in event loss
      * see bug #47512: MPU_COMPATIBLE may fail on empty pool */
    API_MSG_VAR_ALLOC(msg);
  }

  err = netconn_recv_data(conn, (void **)new_buf, apiflags);
 80167b4:	79fb      	ldrb	r3, [r7, #7]
 80167b6:	461a      	mov	r2, r3
 80167b8:	68b9      	ldr	r1, [r7, #8]
 80167ba:	68f8      	ldr	r0, [r7, #12]
 80167bc:	f7ff fe9a 	bl	80164f4 <netconn_recv_data>
 80167c0:	4603      	mov	r3, r0
 80167c2:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
  if (err != ERR_OK) {
 80167c6:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 80167ca:	2b00      	cmp	r3, #0
 80167cc:	d002      	beq.n	80167d4 <netconn_recv_data_tcp+0x64>
    if (!(apiflags & NETCONN_NOAUTORCVD)) {
      API_MSG_VAR_FREE(msg);
    }
    return err;
 80167ce:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 80167d2:	e052      	b.n	801687a <netconn_recv_data_tcp+0x10a>
  }
  buf = *new_buf;
 80167d4:	68bb      	ldr	r3, [r7, #8]
 80167d6:	681b      	ldr	r3, [r3, #0]
 80167d8:	63bb      	str	r3, [r7, #56]	@ 0x38
  if (!(apiflags & NETCONN_NOAUTORCVD)) {
 80167da:	79fb      	ldrb	r3, [r7, #7]
 80167dc:	f003 0308 	and.w	r3, r3, #8
 80167e0:	2b00      	cmp	r3, #0
 80167e2:	d10e      	bne.n	8016802 <netconn_recv_data_tcp+0x92>
    /* Let the stack know that we have taken the data. */
    u16_t len = buf ? buf->tot_len : 1;
 80167e4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80167e6:	2b00      	cmp	r3, #0
 80167e8:	d002      	beq.n	80167f0 <netconn_recv_data_tcp+0x80>
 80167ea:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80167ec:	891b      	ldrh	r3, [r3, #8]
 80167ee:	e000      	b.n	80167f2 <netconn_recv_data_tcp+0x82>
 80167f0:	2301      	movs	r3, #1
 80167f2:	86fb      	strh	r3, [r7, #54]	@ 0x36
    /* don't care for the return value of lwip_netconn_do_recv */
    /* @todo: this should really be fixed, e.g. by retrying in poll on error */
    netconn_tcp_recvd_msg(conn, len,  &API_VAR_REF(msg));
 80167f4:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 80167f6:	f107 0214 	add.w	r2, r7, #20
 80167fa:	4619      	mov	r1, r3
 80167fc:	68f8      	ldr	r0, [r7, #12]
 80167fe:	f7ff ff59 	bl	80166b4 <netconn_tcp_recvd_msg>
    API_MSG_VAR_FREE(msg);
  }

  /* If we are closed, we indicate that we no longer wish to use the socket */
  if (buf == NULL) {
 8016802:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8016804:	2b00      	cmp	r3, #0
 8016806:	d136      	bne.n	8016876 <netconn_recv_data_tcp+0x106>
    if (apiflags & NETCONN_NOFIN) {
 8016808:	79fb      	ldrb	r3, [r7, #7]
 801680a:	f003 0310 	and.w	r3, r3, #16
 801680e:	2b00      	cmp	r3, #0
 8016810:	d00b      	beq.n	801682a <netconn_recv_data_tcp+0xba>
      /* received a FIN but the caller cannot handle it right now:
         re-enqueue it and return "no data" */
      netconn_set_flags(conn, NETCONN_FIN_RX_PENDING);
 8016812:	68fb      	ldr	r3, [r7, #12]
 8016814:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016818:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 801681c:	b2da      	uxtb	r2, r3
 801681e:	68fb      	ldr	r3, [r7, #12]
 8016820:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      return ERR_WOULDBLOCK;
 8016824:	f06f 0306 	mvn.w	r3, #6
 8016828:	e027      	b.n	801687a <netconn_recv_data_tcp+0x10a>
    } else {
handle_fin:
 801682a:	bf00      	nop
      API_EVENT(conn, NETCONN_EVT_RCVMINUS, 0);
 801682c:	68fb      	ldr	r3, [r7, #12]
 801682e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016830:	2b00      	cmp	r3, #0
 8016832:	d005      	beq.n	8016840 <netconn_recv_data_tcp+0xd0>
 8016834:	68fb      	ldr	r3, [r7, #12]
 8016836:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016838:	2200      	movs	r2, #0
 801683a:	2101      	movs	r1, #1
 801683c:	68f8      	ldr	r0, [r7, #12]
 801683e:	4798      	blx	r3
      if (conn->pcb.ip == NULL) {
 8016840:	68fb      	ldr	r3, [r7, #12]
 8016842:	685b      	ldr	r3, [r3, #4]
 8016844:	2b00      	cmp	r3, #0
 8016846:	d10f      	bne.n	8016868 <netconn_recv_data_tcp+0xf8>
        /* race condition: RST during recv */
        err = netconn_err(conn);
 8016848:	68f8      	ldr	r0, [r7, #12]
 801684a:	f000 f9a3 	bl	8016b94 <netconn_err>
 801684e:	4603      	mov	r3, r0
 8016850:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
        if (err != ERR_OK) {
 8016854:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8016858:	2b00      	cmp	r3, #0
 801685a:	d002      	beq.n	8016862 <netconn_recv_data_tcp+0xf2>
          return err;
 801685c:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
 8016860:	e00b      	b.n	801687a <netconn_recv_data_tcp+0x10a>
        }
        return ERR_RST;
 8016862:	f06f 030d 	mvn.w	r3, #13
 8016866:	e008      	b.n	801687a <netconn_recv_data_tcp+0x10a>
      }
      /* RX side is closed, so deallocate the recvmbox */
      netconn_close_shutdown(conn, NETCONN_SHUT_RD);
 8016868:	2101      	movs	r1, #1
 801686a:	68f8      	ldr	r0, [r7, #12]
 801686c:	f000 f962 	bl	8016b34 <netconn_close_shutdown>
      /* Don' store ERR_CLSD as conn->err since we are only half-closed */
      return ERR_CLSD;
 8016870:	f06f 030e 	mvn.w	r3, #14
 8016874:	e001      	b.n	801687a <netconn_recv_data_tcp+0x10a>
    }
  }
  return err;
 8016876:	f997 303f 	ldrsb.w	r3, [r7, #63]	@ 0x3f
}
 801687a:	4618      	mov	r0, r3
 801687c:	3740      	adds	r7, #64	@ 0x40
 801687e:	46bd      	mov	sp, r7
 8016880:	bd80      	pop	{r7, pc}
	...

08016884 <netconn_recv_tcp_pbuf_flags>:
 *                memory error or another error, @see netconn_recv_data)
 *         ERR_ARG if conn is not a TCP netconn
 */
err_t
netconn_recv_tcp_pbuf_flags(struct netconn *conn, struct pbuf **new_buf, u8_t apiflags)
{
 8016884:	b580      	push	{r7, lr}
 8016886:	b084      	sub	sp, #16
 8016888:	af00      	add	r7, sp, #0
 801688a:	60f8      	str	r0, [r7, #12]
 801688c:	60b9      	str	r1, [r7, #8]
 801688e:	4613      	mov	r3, r2
 8016890:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_tcp_pbuf: invalid conn", (conn != NULL) &&
 8016892:	68fb      	ldr	r3, [r7, #12]
 8016894:	2b00      	cmp	r3, #0
 8016896:	d005      	beq.n	80168a4 <netconn_recv_tcp_pbuf_flags+0x20>
 8016898:	68fb      	ldr	r3, [r7, #12]
 801689a:	781b      	ldrb	r3, [r3, #0]
 801689c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80168a0:	2b10      	cmp	r3, #16
 80168a2:	d009      	beq.n	80168b8 <netconn_recv_tcp_pbuf_flags+0x34>
 80168a4:	4b0a      	ldr	r3, [pc, #40]	@ (80168d0 <netconn_recv_tcp_pbuf_flags+0x4c>)
 80168a6:	f240 3225 	movw	r2, #805	@ 0x325
 80168aa:	490a      	ldr	r1, [pc, #40]	@ (80168d4 <netconn_recv_tcp_pbuf_flags+0x50>)
 80168ac:	480a      	ldr	r0, [pc, #40]	@ (80168d8 <netconn_recv_tcp_pbuf_flags+0x54>)
 80168ae:	f014 f8d5 	bl	802aa5c <iprintf>
 80168b2:	f06f 030f 	mvn.w	r3, #15
 80168b6:	e006      	b.n	80168c6 <netconn_recv_tcp_pbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) == NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data_tcp(conn, new_buf, apiflags);
 80168b8:	79fb      	ldrb	r3, [r7, #7]
 80168ba:	461a      	mov	r2, r3
 80168bc:	68b9      	ldr	r1, [r7, #8]
 80168be:	68f8      	ldr	r0, [r7, #12]
 80168c0:	f7ff ff56 	bl	8016770 <netconn_recv_data_tcp>
 80168c4:	4603      	mov	r3, r0
}
 80168c6:	4618      	mov	r0, r3
 80168c8:	3710      	adds	r7, #16
 80168ca:	46bd      	mov	sp, r7
 80168cc:	bd80      	pop	{r7, pc}
 80168ce:	bf00      	nop
 80168d0:	0802ddfc 	.word	0x0802ddfc
 80168d4:	0802e05c 	.word	0x0802e05c
 80168d8:	0802de54 	.word	0x0802de54

080168dc <netconn_recv_udp_raw_netbuf_flags>:
 *                memory error or another error)
 *         ERR_ARG if conn is not a UDP/RAW netconn
 */
err_t
netconn_recv_udp_raw_netbuf_flags(struct netconn *conn, struct netbuf **new_buf, u8_t apiflags)
{
 80168dc:	b580      	push	{r7, lr}
 80168de:	b084      	sub	sp, #16
 80168e0:	af00      	add	r7, sp, #0
 80168e2:	60f8      	str	r0, [r7, #12]
 80168e4:	60b9      	str	r1, [r7, #8]
 80168e6:	4613      	mov	r3, r2
 80168e8:	71fb      	strb	r3, [r7, #7]
  LWIP_ERROR("netconn_recv_udp_raw_netbuf: invalid conn", (conn != NULL) &&
 80168ea:	68fb      	ldr	r3, [r7, #12]
 80168ec:	2b00      	cmp	r3, #0
 80168ee:	d005      	beq.n	80168fc <netconn_recv_udp_raw_netbuf_flags+0x20>
 80168f0:	68fb      	ldr	r3, [r7, #12]
 80168f2:	781b      	ldrb	r3, [r3, #0]
 80168f4:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80168f8:	2b10      	cmp	r3, #16
 80168fa:	d109      	bne.n	8016910 <netconn_recv_udp_raw_netbuf_flags+0x34>
 80168fc:	4b0a      	ldr	r3, [pc, #40]	@ (8016928 <netconn_recv_udp_raw_netbuf_flags+0x4c>)
 80168fe:	f44f 7253 	mov.w	r2, #844	@ 0x34c
 8016902:	490a      	ldr	r1, [pc, #40]	@ (801692c <netconn_recv_udp_raw_netbuf_flags+0x50>)
 8016904:	480a      	ldr	r0, [pc, #40]	@ (8016930 <netconn_recv_udp_raw_netbuf_flags+0x54>)
 8016906:	f014 f8a9 	bl	802aa5c <iprintf>
 801690a:	f06f 030f 	mvn.w	r3, #15
 801690e:	e006      	b.n	801691e <netconn_recv_udp_raw_netbuf_flags+0x42>
             NETCONNTYPE_GROUP(netconn_type(conn)) != NETCONN_TCP, return ERR_ARG;);

  return netconn_recv_data(conn, (void **)new_buf, apiflags);
 8016910:	79fb      	ldrb	r3, [r7, #7]
 8016912:	461a      	mov	r2, r3
 8016914:	68b9      	ldr	r1, [r7, #8]
 8016916:	68f8      	ldr	r0, [r7, #12]
 8016918:	f7ff fdec 	bl	80164f4 <netconn_recv_data>
 801691c:	4603      	mov	r3, r0
}
 801691e:	4618      	mov	r0, r3
 8016920:	3710      	adds	r7, #16
 8016922:	46bd      	mov	sp, r7
 8016924:	bd80      	pop	{r7, pc}
 8016926:	bf00      	nop
 8016928:	0802ddfc 	.word	0x0802ddfc
 801692c:	0802e080 	.word	0x0802e080
 8016930:	0802de54 	.word	0x0802de54

08016934 <netconn_send>:
 * @param buf a netbuf containing the data to send
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_send(struct netconn *conn, struct netbuf *buf)
{
 8016934:	b580      	push	{r7, lr}
 8016936:	b08c      	sub	sp, #48	@ 0x30
 8016938:	af00      	add	r7, sp, #0
 801693a:	6078      	str	r0, [r7, #4]
 801693c:	6039      	str	r1, [r7, #0]
  API_MSG_VAR_DECLARE(msg);
  err_t err;

  LWIP_ERROR("netconn_send: invalid conn",  (conn != NULL), return ERR_ARG;);
 801693e:	687b      	ldr	r3, [r7, #4]
 8016940:	2b00      	cmp	r3, #0
 8016942:	d109      	bne.n	8016958 <netconn_send+0x24>
 8016944:	4b0e      	ldr	r3, [pc, #56]	@ (8016980 <netconn_send+0x4c>)
 8016946:	f240 32b2 	movw	r2, #946	@ 0x3b2
 801694a:	490e      	ldr	r1, [pc, #56]	@ (8016984 <netconn_send+0x50>)
 801694c:	480e      	ldr	r0, [pc, #56]	@ (8016988 <netconn_send+0x54>)
 801694e:	f014 f885 	bl	802aa5c <iprintf>
 8016952:	f06f 030f 	mvn.w	r3, #15
 8016956:	e00e      	b.n	8016976 <netconn_send+0x42>

  LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %"U16_F" bytes\n", buf->p->tot_len));

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8016958:	687b      	ldr	r3, [r7, #4]
 801695a:	60fb      	str	r3, [r7, #12]
  API_MSG_VAR_REF(msg).msg.b = buf;
 801695c:	683b      	ldr	r3, [r7, #0]
 801695e:	617b      	str	r3, [r7, #20]
  err = netconn_apimsg(lwip_netconn_do_send, &API_MSG_VAR_REF(msg));
 8016960:	f107 030c 	add.w	r3, r7, #12
 8016964:	4619      	mov	r1, r3
 8016966:	4809      	ldr	r0, [pc, #36]	@ (801698c <netconn_send+0x58>)
 8016968:	f7ff fc36 	bl	80161d8 <netconn_apimsg>
 801696c:	4603      	mov	r3, r0
 801696e:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8016972:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 8016976:	4618      	mov	r0, r3
 8016978:	3730      	adds	r7, #48	@ 0x30
 801697a:	46bd      	mov	sp, r7
 801697c:	bd80      	pop	{r7, pc}
 801697e:	bf00      	nop
 8016980:	0802ddfc 	.word	0x0802ddfc
 8016984:	0802e0b8 	.word	0x0802e0b8
 8016988:	0802de54 	.word	0x0802de54
 801698c:	08017d8d 	.word	0x08017d8d

08016990 <netconn_write_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_partly(struct netconn *conn, const void *dataptr, size_t size,
                     u8_t apiflags, size_t *bytes_written)
{
 8016990:	b580      	push	{r7, lr}
 8016992:	b088      	sub	sp, #32
 8016994:	af02      	add	r7, sp, #8
 8016996:	60f8      	str	r0, [r7, #12]
 8016998:	60b9      	str	r1, [r7, #8]
 801699a:	607a      	str	r2, [r7, #4]
 801699c:	70fb      	strb	r3, [r7, #3]
  struct netvector vector;
  vector.ptr = dataptr;
 801699e:	68bb      	ldr	r3, [r7, #8]
 80169a0:	613b      	str	r3, [r7, #16]
  vector.len = size;
 80169a2:	687b      	ldr	r3, [r7, #4]
 80169a4:	617b      	str	r3, [r7, #20]
  return netconn_write_vectors_partly(conn, &vector, 1, apiflags, bytes_written);
 80169a6:	78fa      	ldrb	r2, [r7, #3]
 80169a8:	f107 0110 	add.w	r1, r7, #16
 80169ac:	6a3b      	ldr	r3, [r7, #32]
 80169ae:	9300      	str	r3, [sp, #0]
 80169b0:	4613      	mov	r3, r2
 80169b2:	2201      	movs	r2, #1
 80169b4:	68f8      	ldr	r0, [r7, #12]
 80169b6:	f000 f805 	bl	80169c4 <netconn_write_vectors_partly>
 80169ba:	4603      	mov	r3, r0
}
 80169bc:	4618      	mov	r0, r3
 80169be:	3718      	adds	r7, #24
 80169c0:	46bd      	mov	sp, r7
 80169c2:	bd80      	pop	{r7, pc}

080169c4 <netconn_write_vectors_partly>:
 * @return ERR_OK if data was sent, any other err_t on error
 */
err_t
netconn_write_vectors_partly(struct netconn *conn, struct netvector *vectors, u16_t vectorcnt,
                             u8_t apiflags, size_t *bytes_written)
{
 80169c4:	b580      	push	{r7, lr}
 80169c6:	b092      	sub	sp, #72	@ 0x48
 80169c8:	af00      	add	r7, sp, #0
 80169ca:	60f8      	str	r0, [r7, #12]
 80169cc:	60b9      	str	r1, [r7, #8]
 80169ce:	4611      	mov	r1, r2
 80169d0:	461a      	mov	r2, r3
 80169d2:	460b      	mov	r3, r1
 80169d4:	80fb      	strh	r3, [r7, #6]
 80169d6:	4613      	mov	r3, r2
 80169d8:	717b      	strb	r3, [r7, #5]
  err_t err;
  u8_t dontblock;
  size_t size;
  int i;

  LWIP_ERROR("netconn_write: invalid conn",  (conn != NULL), return ERR_ARG;);
 80169da:	68fb      	ldr	r3, [r7, #12]
 80169dc:	2b00      	cmp	r3, #0
 80169de:	d109      	bne.n	80169f4 <netconn_write_vectors_partly+0x30>
 80169e0:	4b4e      	ldr	r3, [pc, #312]	@ (8016b1c <netconn_write_vectors_partly+0x158>)
 80169e2:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 80169e6:	494e      	ldr	r1, [pc, #312]	@ (8016b20 <netconn_write_vectors_partly+0x15c>)
 80169e8:	484e      	ldr	r0, [pc, #312]	@ (8016b24 <netconn_write_vectors_partly+0x160>)
 80169ea:	f014 f837 	bl	802aa5c <iprintf>
 80169ee:	f06f 030f 	mvn.w	r3, #15
 80169f2:	e08f      	b.n	8016b14 <netconn_write_vectors_partly+0x150>
  LWIP_ERROR("netconn_write: invalid conn->type",  (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP), return ERR_VAL;);
 80169f4:	68fb      	ldr	r3, [r7, #12]
 80169f6:	781b      	ldrb	r3, [r3, #0]
 80169f8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80169fc:	2b10      	cmp	r3, #16
 80169fe:	d009      	beq.n	8016a14 <netconn_write_vectors_partly+0x50>
 8016a00:	4b46      	ldr	r3, [pc, #280]	@ (8016b1c <netconn_write_vectors_partly+0x158>)
 8016a02:	f240 32ef 	movw	r2, #1007	@ 0x3ef
 8016a06:	4948      	ldr	r1, [pc, #288]	@ (8016b28 <netconn_write_vectors_partly+0x164>)
 8016a08:	4846      	ldr	r0, [pc, #280]	@ (8016b24 <netconn_write_vectors_partly+0x160>)
 8016a0a:	f014 f827 	bl	802aa5c <iprintf>
 8016a0e:	f06f 0305 	mvn.w	r3, #5
 8016a12:	e07f      	b.n	8016b14 <netconn_write_vectors_partly+0x150>
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 8016a14:	68fb      	ldr	r3, [r7, #12]
 8016a16:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016a1a:	f003 0302 	and.w	r3, r3, #2
 8016a1e:	2b00      	cmp	r3, #0
 8016a20:	d104      	bne.n	8016a2c <netconn_write_vectors_partly+0x68>
 8016a22:	797b      	ldrb	r3, [r7, #5]
 8016a24:	f003 0304 	and.w	r3, r3, #4
 8016a28:	2b00      	cmp	r3, #0
 8016a2a:	d001      	beq.n	8016a30 <netconn_write_vectors_partly+0x6c>
 8016a2c:	2301      	movs	r3, #1
 8016a2e:	e000      	b.n	8016a32 <netconn_write_vectors_partly+0x6e>
 8016a30:	2300      	movs	r3, #0
 8016a32:	f887 303f 	strb.w	r3, [r7, #63]	@ 0x3f
#if LWIP_SO_SNDTIMEO
  if (conn->send_timeout != 0) {
    dontblock = 1;
  }
#endif /* LWIP_SO_SNDTIMEO */
  if (dontblock && !bytes_written) {
 8016a36:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 8016a3a:	2b00      	cmp	r3, #0
 8016a3c:	d005      	beq.n	8016a4a <netconn_write_vectors_partly+0x86>
 8016a3e:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8016a40:	2b00      	cmp	r3, #0
 8016a42:	d102      	bne.n	8016a4a <netconn_write_vectors_partly+0x86>
    /* This implies netconn_write() cannot be used for non-blocking send, since
       it has no way to return the number of bytes written. */
    return ERR_VAL;
 8016a44:	f06f 0305 	mvn.w	r3, #5
 8016a48:	e064      	b.n	8016b14 <netconn_write_vectors_partly+0x150>
  }

  /* sum up the total size */
  size = 0;
 8016a4a:	2300      	movs	r3, #0
 8016a4c:	647b      	str	r3, [r7, #68]	@ 0x44
  for (i = 0; i < vectorcnt; i++) {
 8016a4e:	2300      	movs	r3, #0
 8016a50:	643b      	str	r3, [r7, #64]	@ 0x40
 8016a52:	e015      	b.n	8016a80 <netconn_write_vectors_partly+0xbc>
    size += vectors[i].len;
 8016a54:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8016a56:	00db      	lsls	r3, r3, #3
 8016a58:	68ba      	ldr	r2, [r7, #8]
 8016a5a:	4413      	add	r3, r2
 8016a5c:	685b      	ldr	r3, [r3, #4]
 8016a5e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8016a60:	4413      	add	r3, r2
 8016a62:	647b      	str	r3, [r7, #68]	@ 0x44
    if (size < vectors[i].len) {
 8016a64:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8016a66:	00db      	lsls	r3, r3, #3
 8016a68:	68ba      	ldr	r2, [r7, #8]
 8016a6a:	4413      	add	r3, r2
 8016a6c:	685b      	ldr	r3, [r3, #4]
 8016a6e:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8016a70:	429a      	cmp	r2, r3
 8016a72:	d202      	bcs.n	8016a7a <netconn_write_vectors_partly+0xb6>
      /* overflow */
      return ERR_VAL;
 8016a74:	f06f 0305 	mvn.w	r3, #5
 8016a78:	e04c      	b.n	8016b14 <netconn_write_vectors_partly+0x150>
  for (i = 0; i < vectorcnt; i++) {
 8016a7a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8016a7c:	3301      	adds	r3, #1
 8016a7e:	643b      	str	r3, [r7, #64]	@ 0x40
 8016a80:	88fb      	ldrh	r3, [r7, #6]
 8016a82:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8016a84:	429a      	cmp	r2, r3
 8016a86:	dbe5      	blt.n	8016a54 <netconn_write_vectors_partly+0x90>
    }
  }
  if (size == 0) {
 8016a88:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8016a8a:	2b00      	cmp	r3, #0
 8016a8c:	d101      	bne.n	8016a92 <netconn_write_vectors_partly+0xce>
    return ERR_OK;
 8016a8e:	2300      	movs	r3, #0
 8016a90:	e040      	b.n	8016b14 <netconn_write_vectors_partly+0x150>
  } else if (size > SSIZE_MAX) {
 8016a92:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8016a94:	2b00      	cmp	r3, #0
 8016a96:	da0a      	bge.n	8016aae <netconn_write_vectors_partly+0xea>
    ssize_t limited;
    /* this is required by the socket layer (cannot send full size_t range) */
    if (!bytes_written) {
 8016a98:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8016a9a:	2b00      	cmp	r3, #0
 8016a9c:	d102      	bne.n	8016aa4 <netconn_write_vectors_partly+0xe0>
      return ERR_VAL;
 8016a9e:	f06f 0305 	mvn.w	r3, #5
 8016aa2:	e037      	b.n	8016b14 <netconn_write_vectors_partly+0x150>
    }
    /* limit the amount of data to send */
    limited = SSIZE_MAX;
 8016aa4:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8016aa8:	63bb      	str	r3, [r7, #56]	@ 0x38
    size = (size_t)limited;
 8016aaa:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8016aac:	647b      	str	r3, [r7, #68]	@ 0x44
  }

  API_MSG_VAR_ALLOC(msg);
  /* non-blocking write sends as much  */
  API_MSG_VAR_REF(msg).conn = conn;
 8016aae:	68fb      	ldr	r3, [r7, #12]
 8016ab0:	617b      	str	r3, [r7, #20]
  API_MSG_VAR_REF(msg).msg.w.vector = vectors;
 8016ab2:	68bb      	ldr	r3, [r7, #8]
 8016ab4:	61fb      	str	r3, [r7, #28]
  API_MSG_VAR_REF(msg).msg.w.vector_cnt = vectorcnt;
 8016ab6:	88fb      	ldrh	r3, [r7, #6]
 8016ab8:	843b      	strh	r3, [r7, #32]
  API_MSG_VAR_REF(msg).msg.w.vector_off = 0;
 8016aba:	2300      	movs	r3, #0
 8016abc:	627b      	str	r3, [r7, #36]	@ 0x24
  API_MSG_VAR_REF(msg).msg.w.apiflags = apiflags;
 8016abe:	797b      	ldrb	r3, [r7, #5]
 8016ac0:	f887 3030 	strb.w	r3, [r7, #48]	@ 0x30
  API_MSG_VAR_REF(msg).msg.w.len = size;
 8016ac4:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8016ac6:	62bb      	str	r3, [r7, #40]	@ 0x28
  API_MSG_VAR_REF(msg).msg.w.offset = 0;
 8016ac8:	2300      	movs	r3, #0
 8016aca:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif /* LWIP_SO_SNDTIMEO */

  /* For locking the core: this _can_ be delayed on low memory/low send buffer,
     but if it is, this is done inside api_msg.c:do_write(), so we can use the
     non-blocking version here. */
  err = netconn_apimsg(lwip_netconn_do_write, &API_MSG_VAR_REF(msg));
 8016acc:	f107 0314 	add.w	r3, r7, #20
 8016ad0:	4619      	mov	r1, r3
 8016ad2:	4816      	ldr	r0, [pc, #88]	@ (8016b2c <netconn_write_vectors_partly+0x168>)
 8016ad4:	f7ff fb80 	bl	80161d8 <netconn_apimsg>
 8016ad8:	4603      	mov	r3, r0
 8016ada:	f887 3037 	strb.w	r3, [r7, #55]	@ 0x37
  if (err == ERR_OK) {
 8016ade:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
 8016ae2:	2b00      	cmp	r3, #0
 8016ae4:	d114      	bne.n	8016b10 <netconn_write_vectors_partly+0x14c>
    if (bytes_written != NULL) {
 8016ae6:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8016ae8:	2b00      	cmp	r3, #0
 8016aea:	d002      	beq.n	8016af2 <netconn_write_vectors_partly+0x12e>
      *bytes_written = API_MSG_VAR_REF(msg).msg.w.offset;
 8016aec:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8016aee:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8016af0:	601a      	str	r2, [r3, #0]
    }
    /* for blocking, check all requested bytes were written, NOTE: send_timeout is
       treated as dontblock (see dontblock assignment above) */
    if (!dontblock) {
 8016af2:	f897 303f 	ldrb.w	r3, [r7, #63]	@ 0x3f
 8016af6:	2b00      	cmp	r3, #0
 8016af8:	d10a      	bne.n	8016b10 <netconn_write_vectors_partly+0x14c>
      LWIP_ASSERT("do_write failed to write all bytes", API_MSG_VAR_REF(msg).msg.w.offset == size);
 8016afa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8016afc:	6c7a      	ldr	r2, [r7, #68]	@ 0x44
 8016afe:	429a      	cmp	r2, r3
 8016b00:	d006      	beq.n	8016b10 <netconn_write_vectors_partly+0x14c>
 8016b02:	4b06      	ldr	r3, [pc, #24]	@ (8016b1c <netconn_write_vectors_partly+0x158>)
 8016b04:	f44f 6286 	mov.w	r2, #1072	@ 0x430
 8016b08:	4909      	ldr	r1, [pc, #36]	@ (8016b30 <netconn_write_vectors_partly+0x16c>)
 8016b0a:	4806      	ldr	r0, [pc, #24]	@ (8016b24 <netconn_write_vectors_partly+0x160>)
 8016b0c:	f013 ffa6 	bl	802aa5c <iprintf>
    }
  }
  API_MSG_VAR_FREE(msg);

  return err;
 8016b10:	f997 3037 	ldrsb.w	r3, [r7, #55]	@ 0x37
}
 8016b14:	4618      	mov	r0, r3
 8016b16:	3748      	adds	r7, #72	@ 0x48
 8016b18:	46bd      	mov	sp, r7
 8016b1a:	bd80      	pop	{r7, pc}
 8016b1c:	0802ddfc 	.word	0x0802ddfc
 8016b20:	0802e0d4 	.word	0x0802e0d4
 8016b24:	0802de54 	.word	0x0802de54
 8016b28:	0802e0f0 	.word	0x0802e0f0
 8016b2c:	08018231 	.word	0x08018231
 8016b30:	0802e114 	.word	0x0802e114

08016b34 <netconn_close_shutdown>:
 * @param how fully close or only shutdown one side?
 * @return ERR_OK if the netconn was closed, any other err_t on error
 */
static err_t
netconn_close_shutdown(struct netconn *conn, u8_t how)
{
 8016b34:	b580      	push	{r7, lr}
 8016b36:	b08c      	sub	sp, #48	@ 0x30
 8016b38:	af00      	add	r7, sp, #0
 8016b3a:	6078      	str	r0, [r7, #4]
 8016b3c:	460b      	mov	r3, r1
 8016b3e:	70fb      	strb	r3, [r7, #3]
  API_MSG_VAR_DECLARE(msg);
  err_t err;
  LWIP_UNUSED_ARG(how);

  LWIP_ERROR("netconn_close: invalid conn",  (conn != NULL), return ERR_ARG;);
 8016b40:	687b      	ldr	r3, [r7, #4]
 8016b42:	2b00      	cmp	r3, #0
 8016b44:	d109      	bne.n	8016b5a <netconn_close_shutdown+0x26>
 8016b46:	4b0f      	ldr	r3, [pc, #60]	@ (8016b84 <netconn_close_shutdown+0x50>)
 8016b48:	f240 4247 	movw	r2, #1095	@ 0x447
 8016b4c:	490e      	ldr	r1, [pc, #56]	@ (8016b88 <netconn_close_shutdown+0x54>)
 8016b4e:	480f      	ldr	r0, [pc, #60]	@ (8016b8c <netconn_close_shutdown+0x58>)
 8016b50:	f013 ff84 	bl	802aa5c <iprintf>
 8016b54:	f06f 030f 	mvn.w	r3, #15
 8016b58:	e010      	b.n	8016b7c <netconn_close_shutdown+0x48>

  API_MSG_VAR_ALLOC(msg);
  API_MSG_VAR_REF(msg).conn = conn;
 8016b5a:	687b      	ldr	r3, [r7, #4]
 8016b5c:	60fb      	str	r3, [r7, #12]
#if LWIP_TCP
  /* shutting down both ends is the same as closing */
  API_MSG_VAR_REF(msg).msg.sd.shut = how;
 8016b5e:	78fb      	ldrb	r3, [r7, #3]
 8016b60:	753b      	strb	r3, [r7, #20]
#if LWIP_SO_SNDTIMEO || LWIP_SO_LINGER
  /* get the time we started, which is later compared to
     sys_now() + conn->send_timeout */
  API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
  API_MSG_VAR_REF(msg).msg.sd.polls_left =
 8016b62:	2329      	movs	r3, #41	@ 0x29
 8016b64:	757b      	strb	r3, [r7, #21]
    ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
#endif /* LWIP_TCP */
  err = netconn_apimsg(lwip_netconn_do_close, &API_MSG_VAR_REF(msg));
 8016b66:	f107 030c 	add.w	r3, r7, #12
 8016b6a:	4619      	mov	r1, r3
 8016b6c:	4808      	ldr	r0, [pc, #32]	@ (8016b90 <netconn_close_shutdown+0x5c>)
 8016b6e:	f7ff fb33 	bl	80161d8 <netconn_apimsg>
 8016b72:	4603      	mov	r3, r0
 8016b74:	f887 302f 	strb.w	r3, [r7, #47]	@ 0x2f
  API_MSG_VAR_FREE(msg);

  return err;
 8016b78:	f997 302f 	ldrsb.w	r3, [r7, #47]	@ 0x2f
}
 8016b7c:	4618      	mov	r0, r3
 8016b7e:	3730      	adds	r7, #48	@ 0x30
 8016b80:	46bd      	mov	sp, r7
 8016b82:	bd80      	pop	{r7, pc}
 8016b84:	0802ddfc 	.word	0x0802ddfc
 8016b88:	0802e138 	.word	0x0802e138
 8016b8c:	0802de54 	.word	0x0802de54
 8016b90:	0801844d 	.word	0x0801844d

08016b94 <netconn_err>:
 * @param conn the netconn to get the error from
 * @return and pending error or ERR_OK if no error was pending
 */
err_t
netconn_err(struct netconn *conn)
{
 8016b94:	b580      	push	{r7, lr}
 8016b96:	b084      	sub	sp, #16
 8016b98:	af00      	add	r7, sp, #0
 8016b9a:	6078      	str	r0, [r7, #4]
  err_t err;
  SYS_ARCH_DECL_PROTECT(lev);
  if (conn == NULL) {
 8016b9c:	687b      	ldr	r3, [r7, #4]
 8016b9e:	2b00      	cmp	r3, #0
 8016ba0:	d101      	bne.n	8016ba6 <netconn_err+0x12>
    return ERR_OK;
 8016ba2:	2300      	movs	r3, #0
 8016ba4:	e00d      	b.n	8016bc2 <netconn_err+0x2e>
  }
  SYS_ARCH_PROTECT(lev);
 8016ba6:	f010 fcc3 	bl	8027530 <sys_arch_protect>
 8016baa:	60f8      	str	r0, [r7, #12]
  err = conn->pending_err;
 8016bac:	687b      	ldr	r3, [r7, #4]
 8016bae:	7a1b      	ldrb	r3, [r3, #8]
 8016bb0:	72fb      	strb	r3, [r7, #11]
  conn->pending_err = ERR_OK;
 8016bb2:	687b      	ldr	r3, [r7, #4]
 8016bb4:	2200      	movs	r2, #0
 8016bb6:	721a      	strb	r2, [r3, #8]
  SYS_ARCH_UNPROTECT(lev);
 8016bb8:	68f8      	ldr	r0, [r7, #12]
 8016bba:	f010 fcc7 	bl	802754c <sys_arch_unprotect>
  return err;
 8016bbe:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8016bc2:	4618      	mov	r0, r3
 8016bc4:	3710      	adds	r7, #16
 8016bc6:	46bd      	mov	sp, r7
 8016bc8:	bd80      	pop	{r7, pc}
	...

08016bcc <lwip_netconn_err_to_msg>:
const u8_t netconn_closed = 0;

/** Translate an error to a unique void* passed via an mbox */
static void *
lwip_netconn_err_to_msg(err_t err)
{
 8016bcc:	b580      	push	{r7, lr}
 8016bce:	b082      	sub	sp, #8
 8016bd0:	af00      	add	r7, sp, #0
 8016bd2:	4603      	mov	r3, r0
 8016bd4:	71fb      	strb	r3, [r7, #7]
  switch (err) {
 8016bd6:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8016bda:	f113 0f0d 	cmn.w	r3, #13
 8016bde:	d009      	beq.n	8016bf4 <lwip_netconn_err_to_msg+0x28>
 8016be0:	f113 0f0d 	cmn.w	r3, #13
 8016be4:	dc0c      	bgt.n	8016c00 <lwip_netconn_err_to_msg+0x34>
 8016be6:	f113 0f0f 	cmn.w	r3, #15
 8016bea:	d007      	beq.n	8016bfc <lwip_netconn_err_to_msg+0x30>
 8016bec:	f113 0f0e 	cmn.w	r3, #14
 8016bf0:	d002      	beq.n	8016bf8 <lwip_netconn_err_to_msg+0x2c>
 8016bf2:	e005      	b.n	8016c00 <lwip_netconn_err_to_msg+0x34>
    case ERR_ABRT:
      return LWIP_CONST_CAST(void *, &netconn_aborted);
 8016bf4:	4b0a      	ldr	r3, [pc, #40]	@ (8016c20 <lwip_netconn_err_to_msg+0x54>)
 8016bf6:	e00e      	b.n	8016c16 <lwip_netconn_err_to_msg+0x4a>
    case ERR_RST:
      return LWIP_CONST_CAST(void *, &netconn_reset);
 8016bf8:	4b0a      	ldr	r3, [pc, #40]	@ (8016c24 <lwip_netconn_err_to_msg+0x58>)
 8016bfa:	e00c      	b.n	8016c16 <lwip_netconn_err_to_msg+0x4a>
    case ERR_CLSD:
      return LWIP_CONST_CAST(void *, &netconn_closed);
 8016bfc:	4b0a      	ldr	r3, [pc, #40]	@ (8016c28 <lwip_netconn_err_to_msg+0x5c>)
 8016bfe:	e00a      	b.n	8016c16 <lwip_netconn_err_to_msg+0x4a>
    default:
      LWIP_ASSERT("unhandled error", err == ERR_OK);
 8016c00:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8016c04:	2b00      	cmp	r3, #0
 8016c06:	d005      	beq.n	8016c14 <lwip_netconn_err_to_msg+0x48>
 8016c08:	4b08      	ldr	r3, [pc, #32]	@ (8016c2c <lwip_netconn_err_to_msg+0x60>)
 8016c0a:	227d      	movs	r2, #125	@ 0x7d
 8016c0c:	4908      	ldr	r1, [pc, #32]	@ (8016c30 <lwip_netconn_err_to_msg+0x64>)
 8016c0e:	4809      	ldr	r0, [pc, #36]	@ (8016c34 <lwip_netconn_err_to_msg+0x68>)
 8016c10:	f013 ff24 	bl	802aa5c <iprintf>
      return NULL;
 8016c14:	2300      	movs	r3, #0
  }
}
 8016c16:	4618      	mov	r0, r3
 8016c18:	3708      	adds	r7, #8
 8016c1a:	46bd      	mov	sp, r7
 8016c1c:	bd80      	pop	{r7, pc}
 8016c1e:	bf00      	nop
 8016c20:	08031d5c 	.word	0x08031d5c
 8016c24:	08031d5d 	.word	0x08031d5d
 8016c28:	08031d5e 	.word	0x08031d5e
 8016c2c:	0802e154 	.word	0x0802e154
 8016c30:	0802e188 	.word	0x0802e188
 8016c34:	0802e198 	.word	0x0802e198

08016c38 <lwip_netconn_is_err_msg>:

int
lwip_netconn_is_err_msg(void *msg, err_t *err)
{
 8016c38:	b580      	push	{r7, lr}
 8016c3a:	b082      	sub	sp, #8
 8016c3c:	af00      	add	r7, sp, #0
 8016c3e:	6078      	str	r0, [r7, #4]
 8016c40:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("err != NULL", err != NULL);
 8016c42:	683b      	ldr	r3, [r7, #0]
 8016c44:	2b00      	cmp	r3, #0
 8016c46:	d105      	bne.n	8016c54 <lwip_netconn_is_err_msg+0x1c>
 8016c48:	4b12      	ldr	r3, [pc, #72]	@ (8016c94 <lwip_netconn_is_err_msg+0x5c>)
 8016c4a:	2285      	movs	r2, #133	@ 0x85
 8016c4c:	4912      	ldr	r1, [pc, #72]	@ (8016c98 <lwip_netconn_is_err_msg+0x60>)
 8016c4e:	4813      	ldr	r0, [pc, #76]	@ (8016c9c <lwip_netconn_is_err_msg+0x64>)
 8016c50:	f013 ff04 	bl	802aa5c <iprintf>

  if (msg == &netconn_aborted) {
 8016c54:	687b      	ldr	r3, [r7, #4]
 8016c56:	4a12      	ldr	r2, [pc, #72]	@ (8016ca0 <lwip_netconn_is_err_msg+0x68>)
 8016c58:	4293      	cmp	r3, r2
 8016c5a:	d104      	bne.n	8016c66 <lwip_netconn_is_err_msg+0x2e>
    *err = ERR_ABRT;
 8016c5c:	683b      	ldr	r3, [r7, #0]
 8016c5e:	22f3      	movs	r2, #243	@ 0xf3
 8016c60:	701a      	strb	r2, [r3, #0]
    return 1;
 8016c62:	2301      	movs	r3, #1
 8016c64:	e012      	b.n	8016c8c <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_reset) {
 8016c66:	687b      	ldr	r3, [r7, #4]
 8016c68:	4a0e      	ldr	r2, [pc, #56]	@ (8016ca4 <lwip_netconn_is_err_msg+0x6c>)
 8016c6a:	4293      	cmp	r3, r2
 8016c6c:	d104      	bne.n	8016c78 <lwip_netconn_is_err_msg+0x40>
    *err = ERR_RST;
 8016c6e:	683b      	ldr	r3, [r7, #0]
 8016c70:	22f2      	movs	r2, #242	@ 0xf2
 8016c72:	701a      	strb	r2, [r3, #0]
    return 1;
 8016c74:	2301      	movs	r3, #1
 8016c76:	e009      	b.n	8016c8c <lwip_netconn_is_err_msg+0x54>
  } else if (msg == &netconn_closed) {
 8016c78:	687b      	ldr	r3, [r7, #4]
 8016c7a:	4a0b      	ldr	r2, [pc, #44]	@ (8016ca8 <lwip_netconn_is_err_msg+0x70>)
 8016c7c:	4293      	cmp	r3, r2
 8016c7e:	d104      	bne.n	8016c8a <lwip_netconn_is_err_msg+0x52>
    *err = ERR_CLSD;
 8016c80:	683b      	ldr	r3, [r7, #0]
 8016c82:	22f1      	movs	r2, #241	@ 0xf1
 8016c84:	701a      	strb	r2, [r3, #0]
    return 1;
 8016c86:	2301      	movs	r3, #1
 8016c88:	e000      	b.n	8016c8c <lwip_netconn_is_err_msg+0x54>
  }
  return 0;
 8016c8a:	2300      	movs	r3, #0
}
 8016c8c:	4618      	mov	r0, r3
 8016c8e:	3708      	adds	r7, #8
 8016c90:	46bd      	mov	sp, r7
 8016c92:	bd80      	pop	{r7, pc}
 8016c94:	0802e154 	.word	0x0802e154
 8016c98:	0802e1c0 	.word	0x0802e1c0
 8016c9c:	0802e198 	.word	0x0802e198
 8016ca0:	08031d5c 	.word	0x08031d5c
 8016ca4:	08031d5d 	.word	0x08031d5d
 8016ca8:	08031d5e 	.word	0x08031d5e

08016cac <recv_udp>:
 * @see udp.h (struct udp_pcb.recv) for parameters
 */
static void
recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p,
         const ip_addr_t *addr, u16_t port)
{
 8016cac:	b580      	push	{r7, lr}
 8016cae:	b08a      	sub	sp, #40	@ 0x28
 8016cb0:	af00      	add	r7, sp, #0
 8016cb2:	60f8      	str	r0, [r7, #12]
 8016cb4:	60b9      	str	r1, [r7, #8]
 8016cb6:	607a      	str	r2, [r7, #4]
 8016cb8:	603b      	str	r3, [r7, #0]
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  LWIP_UNUSED_ARG(pcb); /* only used for asserts... */
  LWIP_ASSERT("recv_udp must have a pcb argument", pcb != NULL);
 8016cba:	68bb      	ldr	r3, [r7, #8]
 8016cbc:	2b00      	cmp	r3, #0
 8016cbe:	d105      	bne.n	8016ccc <recv_udp+0x20>
 8016cc0:	4b43      	ldr	r3, [pc, #268]	@ (8016dd0 <recv_udp+0x124>)
 8016cc2:	22e5      	movs	r2, #229	@ 0xe5
 8016cc4:	4943      	ldr	r1, [pc, #268]	@ (8016dd4 <recv_udp+0x128>)
 8016cc6:	4844      	ldr	r0, [pc, #272]	@ (8016dd8 <recv_udp+0x12c>)
 8016cc8:	f013 fec8 	bl	802aa5c <iprintf>
  LWIP_ASSERT("recv_udp must have an argument", arg != NULL);
 8016ccc:	68fb      	ldr	r3, [r7, #12]
 8016cce:	2b00      	cmp	r3, #0
 8016cd0:	d105      	bne.n	8016cde <recv_udp+0x32>
 8016cd2:	4b3f      	ldr	r3, [pc, #252]	@ (8016dd0 <recv_udp+0x124>)
 8016cd4:	22e6      	movs	r2, #230	@ 0xe6
 8016cd6:	4941      	ldr	r1, [pc, #260]	@ (8016ddc <recv_udp+0x130>)
 8016cd8:	483f      	ldr	r0, [pc, #252]	@ (8016dd8 <recv_udp+0x12c>)
 8016cda:	f013 febf 	bl	802aa5c <iprintf>
  conn = (struct netconn *)arg;
 8016cde:	68fb      	ldr	r3, [r7, #12]
 8016ce0:	627b      	str	r3, [r7, #36]	@ 0x24

  if (conn == NULL) {
 8016ce2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016ce4:	2b00      	cmp	r3, #0
 8016ce6:	d103      	bne.n	8016cf0 <recv_udp+0x44>
    pbuf_free(p);
 8016ce8:	6878      	ldr	r0, [r7, #4]
 8016cea:	f004 fc3f 	bl	801b56c <pbuf_free>
    return;
 8016cee:	e06b      	b.n	8016dc8 <recv_udp+0x11c>
  }

  LWIP_ASSERT("recv_udp: recv for wrong pcb!", conn->pcb.udp == pcb);
 8016cf0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016cf2:	685b      	ldr	r3, [r3, #4]
 8016cf4:	68ba      	ldr	r2, [r7, #8]
 8016cf6:	429a      	cmp	r2, r3
 8016cf8:	d005      	beq.n	8016d06 <recv_udp+0x5a>
 8016cfa:	4b35      	ldr	r3, [pc, #212]	@ (8016dd0 <recv_udp+0x124>)
 8016cfc:	22ee      	movs	r2, #238	@ 0xee
 8016cfe:	4938      	ldr	r1, [pc, #224]	@ (8016de0 <recv_udp+0x134>)
 8016d00:	4835      	ldr	r0, [pc, #212]	@ (8016dd8 <recv_udp+0x12c>)
 8016d02:	f013 feab 	bl	802aa5c <iprintf>

#if LWIP_SO_RCVBUF
  SYS_ARCH_GET(conn->recv_avail, recv_avail);
 8016d06:	f010 fc13 	bl	8027530 <sys_arch_protect>
 8016d0a:	6238      	str	r0, [r7, #32]
 8016d0c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016d0e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8016d10:	61fb      	str	r3, [r7, #28]
 8016d12:	6a38      	ldr	r0, [r7, #32]
 8016d14:	f010 fc1a 	bl	802754c <sys_arch_unprotect>
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 8016d18:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016d1a:	3310      	adds	r3, #16
 8016d1c:	4618      	mov	r0, r3
 8016d1e:	f010 fafd 	bl	802731c <sys_mbox_valid>
 8016d22:	4603      	mov	r3, r0
 8016d24:	2b00      	cmp	r3, #0
 8016d26:	d008      	beq.n	8016d3a <recv_udp+0x8e>
      ((recv_avail + (int)(p->tot_len)) > conn->recv_bufsize)) {
 8016d28:	687b      	ldr	r3, [r7, #4]
 8016d2a:	891b      	ldrh	r3, [r3, #8]
 8016d2c:	461a      	mov	r2, r3
 8016d2e:	69fb      	ldr	r3, [r7, #28]
 8016d30:	441a      	add	r2, r3
 8016d32:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016d34:	6a1b      	ldr	r3, [r3, #32]
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox) ||
 8016d36:	429a      	cmp	r2, r3
 8016d38:	dd03      	ble.n	8016d42 <recv_udp+0x96>
#else  /* LWIP_SO_RCVBUF */
  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
#endif /* LWIP_SO_RCVBUF */
    pbuf_free(p);
 8016d3a:	6878      	ldr	r0, [r7, #4]
 8016d3c:	f004 fc16 	bl	801b56c <pbuf_free>
    return;
 8016d40:	e042      	b.n	8016dc8 <recv_udp+0x11c>
  }

  buf = (struct netbuf *)memp_malloc(MEMP_NETBUF);
 8016d42:	2006      	movs	r0, #6
 8016d44:	f003 fcae 	bl	801a6a4 <memp_malloc>
 8016d48:	61b8      	str	r0, [r7, #24]
  if (buf == NULL) {
 8016d4a:	69bb      	ldr	r3, [r7, #24]
 8016d4c:	2b00      	cmp	r3, #0
 8016d4e:	d103      	bne.n	8016d58 <recv_udp+0xac>
    pbuf_free(p);
 8016d50:	6878      	ldr	r0, [r7, #4]
 8016d52:	f004 fc0b 	bl	801b56c <pbuf_free>
    return;
 8016d56:	e037      	b.n	8016dc8 <recv_udp+0x11c>
  } else {
    buf->p = p;
 8016d58:	69bb      	ldr	r3, [r7, #24]
 8016d5a:	687a      	ldr	r2, [r7, #4]
 8016d5c:	601a      	str	r2, [r3, #0]
    buf->ptr = p;
 8016d5e:	69bb      	ldr	r3, [r7, #24]
 8016d60:	687a      	ldr	r2, [r7, #4]
 8016d62:	605a      	str	r2, [r3, #4]
    ip_addr_set(&buf->addr, addr);
 8016d64:	683b      	ldr	r3, [r7, #0]
 8016d66:	2b00      	cmp	r3, #0
 8016d68:	d002      	beq.n	8016d70 <recv_udp+0xc4>
 8016d6a:	683b      	ldr	r3, [r7, #0]
 8016d6c:	681b      	ldr	r3, [r3, #0]
 8016d6e:	e000      	b.n	8016d72 <recv_udp+0xc6>
 8016d70:	2300      	movs	r3, #0
 8016d72:	69ba      	ldr	r2, [r7, #24]
 8016d74:	6093      	str	r3, [r2, #8]
    buf->port = port;
 8016d76:	69bb      	ldr	r3, [r7, #24]
 8016d78:	8e3a      	ldrh	r2, [r7, #48]	@ 0x30
 8016d7a:	819a      	strh	r2, [r3, #12]
      buf->toport_chksum = udphdr->dest;
    }
#endif /* LWIP_NETBUF_RECVINFO */
  }

  len = p->tot_len;
 8016d7c:	687b      	ldr	r3, [r7, #4]
 8016d7e:	891b      	ldrh	r3, [r3, #8]
 8016d80:	82fb      	strh	r3, [r7, #22]
  if (sys_mbox_trypost(&conn->recvmbox, buf) != ERR_OK) {
 8016d82:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016d84:	3310      	adds	r3, #16
 8016d86:	69b9      	ldr	r1, [r7, #24]
 8016d88:	4618      	mov	r0, r3
 8016d8a:	f010 fa65 	bl	8027258 <sys_mbox_trypost>
 8016d8e:	4603      	mov	r3, r0
 8016d90:	2b00      	cmp	r3, #0
 8016d92:	d003      	beq.n	8016d9c <recv_udp+0xf0>
    netbuf_delete(buf);
 8016d94:	69b8      	ldr	r0, [r7, #24]
 8016d96:	f001 fbff 	bl	8018598 <netbuf_delete>
    return;
 8016d9a:	e015      	b.n	8016dc8 <recv_udp+0x11c>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 8016d9c:	f010 fbc8 	bl	8027530 <sys_arch_protect>
 8016da0:	6138      	str	r0, [r7, #16]
 8016da2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016da4:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8016da6:	8afb      	ldrh	r3, [r7, #22]
 8016da8:	441a      	add	r2, r3
 8016daa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016dac:	625a      	str	r2, [r3, #36]	@ 0x24
 8016dae:	6938      	ldr	r0, [r7, #16]
 8016db0:	f010 fbcc 	bl	802754c <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 8016db4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016db6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016db8:	2b00      	cmp	r3, #0
 8016dba:	d005      	beq.n	8016dc8 <recv_udp+0x11c>
 8016dbc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8016dbe:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016dc0:	8afa      	ldrh	r2, [r7, #22]
 8016dc2:	2100      	movs	r1, #0
 8016dc4:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8016dc6:	4798      	blx	r3
  }
}
 8016dc8:	3728      	adds	r7, #40	@ 0x28
 8016dca:	46bd      	mov	sp, r7
 8016dcc:	bd80      	pop	{r7, pc}
 8016dce:	bf00      	nop
 8016dd0:	0802e154 	.word	0x0802e154
 8016dd4:	0802e1cc 	.word	0x0802e1cc
 8016dd8:	0802e198 	.word	0x0802e198
 8016ddc:	0802e1f0 	.word	0x0802e1f0
 8016de0:	0802e210 	.word	0x0802e210

08016de4 <recv_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.recv) for parameters and return value
 */
static err_t
recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 8016de4:	b580      	push	{r7, lr}
 8016de6:	b088      	sub	sp, #32
 8016de8:	af00      	add	r7, sp, #0
 8016dea:	60f8      	str	r0, [r7, #12]
 8016dec:	60b9      	str	r1, [r7, #8]
 8016dee:	607a      	str	r2, [r7, #4]
 8016df0:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  u16_t len;
  void *msg;

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("recv_tcp must have a pcb argument", pcb != NULL);
 8016df2:	68bb      	ldr	r3, [r7, #8]
 8016df4:	2b00      	cmp	r3, #0
 8016df6:	d106      	bne.n	8016e06 <recv_tcp+0x22>
 8016df8:	4b3c      	ldr	r3, [pc, #240]	@ (8016eec <recv_tcp+0x108>)
 8016dfa:	f44f 7296 	mov.w	r2, #300	@ 0x12c
 8016dfe:	493c      	ldr	r1, [pc, #240]	@ (8016ef0 <recv_tcp+0x10c>)
 8016e00:	483c      	ldr	r0, [pc, #240]	@ (8016ef4 <recv_tcp+0x110>)
 8016e02:	f013 fe2b 	bl	802aa5c <iprintf>
  LWIP_ASSERT("recv_tcp must have an argument", arg != NULL);
 8016e06:	68fb      	ldr	r3, [r7, #12]
 8016e08:	2b00      	cmp	r3, #0
 8016e0a:	d106      	bne.n	8016e1a <recv_tcp+0x36>
 8016e0c:	4b37      	ldr	r3, [pc, #220]	@ (8016eec <recv_tcp+0x108>)
 8016e0e:	f240 122d 	movw	r2, #301	@ 0x12d
 8016e12:	4939      	ldr	r1, [pc, #228]	@ (8016ef8 <recv_tcp+0x114>)
 8016e14:	4837      	ldr	r0, [pc, #220]	@ (8016ef4 <recv_tcp+0x110>)
 8016e16:	f013 fe21 	bl	802aa5c <iprintf>
  LWIP_ASSERT("err != ERR_OK unhandled", err == ERR_OK);
 8016e1a:	f997 3003 	ldrsb.w	r3, [r7, #3]
 8016e1e:	2b00      	cmp	r3, #0
 8016e20:	d006      	beq.n	8016e30 <recv_tcp+0x4c>
 8016e22:	4b32      	ldr	r3, [pc, #200]	@ (8016eec <recv_tcp+0x108>)
 8016e24:	f44f 7297 	mov.w	r2, #302	@ 0x12e
 8016e28:	4934      	ldr	r1, [pc, #208]	@ (8016efc <recv_tcp+0x118>)
 8016e2a:	4832      	ldr	r0, [pc, #200]	@ (8016ef4 <recv_tcp+0x110>)
 8016e2c:	f013 fe16 	bl	802aa5c <iprintf>
  LWIP_UNUSED_ARG(err); /* for LWIP_NOASSERT */
  conn = (struct netconn *)arg;
 8016e30:	68fb      	ldr	r3, [r7, #12]
 8016e32:	617b      	str	r3, [r7, #20]

  if (conn == NULL) {
 8016e34:	697b      	ldr	r3, [r7, #20]
 8016e36:	2b00      	cmp	r3, #0
 8016e38:	d102      	bne.n	8016e40 <recv_tcp+0x5c>
    return ERR_VAL;
 8016e3a:	f06f 0305 	mvn.w	r3, #5
 8016e3e:	e051      	b.n	8016ee4 <recv_tcp+0x100>
  }
  LWIP_ASSERT("recv_tcp: recv for wrong pcb!", conn->pcb.tcp == pcb);
 8016e40:	697b      	ldr	r3, [r7, #20]
 8016e42:	685b      	ldr	r3, [r3, #4]
 8016e44:	68ba      	ldr	r2, [r7, #8]
 8016e46:	429a      	cmp	r2, r3
 8016e48:	d006      	beq.n	8016e58 <recv_tcp+0x74>
 8016e4a:	4b28      	ldr	r3, [pc, #160]	@ (8016eec <recv_tcp+0x108>)
 8016e4c:	f240 1235 	movw	r2, #309	@ 0x135
 8016e50:	492b      	ldr	r1, [pc, #172]	@ (8016f00 <recv_tcp+0x11c>)
 8016e52:	4828      	ldr	r0, [pc, #160]	@ (8016ef4 <recv_tcp+0x110>)
 8016e54:	f013 fe02 	bl	802aa5c <iprintf>

  if (!NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 8016e58:	697b      	ldr	r3, [r7, #20]
 8016e5a:	3310      	adds	r3, #16
 8016e5c:	4618      	mov	r0, r3
 8016e5e:	f010 fa5d 	bl	802731c <sys_mbox_valid>
 8016e62:	4603      	mov	r3, r0
 8016e64:	2b00      	cmp	r3, #0
 8016e66:	d10d      	bne.n	8016e84 <recv_tcp+0xa0>
    /* recvmbox already deleted */
    if (p != NULL) {
 8016e68:	687b      	ldr	r3, [r7, #4]
 8016e6a:	2b00      	cmp	r3, #0
 8016e6c:	d008      	beq.n	8016e80 <recv_tcp+0x9c>
      tcp_recved(pcb, p->tot_len);
 8016e6e:	687b      	ldr	r3, [r7, #4]
 8016e70:	891b      	ldrh	r3, [r3, #8]
 8016e72:	4619      	mov	r1, r3
 8016e74:	68b8      	ldr	r0, [r7, #8]
 8016e76:	f005 f9e5 	bl	801c244 <tcp_recved>
      pbuf_free(p);
 8016e7a:	6878      	ldr	r0, [r7, #4]
 8016e7c:	f004 fb76 	bl	801b56c <pbuf_free>
    }
    return ERR_OK;
 8016e80:	2300      	movs	r3, #0
 8016e82:	e02f      	b.n	8016ee4 <recv_tcp+0x100>
  }
  /* Unlike for UDP or RAW pcbs, don't check for available space
     using recv_avail since that could break the connection
     (data is already ACKed) */

  if (p != NULL) {
 8016e84:	687b      	ldr	r3, [r7, #4]
 8016e86:	2b00      	cmp	r3, #0
 8016e88:	d005      	beq.n	8016e96 <recv_tcp+0xb2>
    msg = p;
 8016e8a:	687b      	ldr	r3, [r7, #4]
 8016e8c:	61bb      	str	r3, [r7, #24]
    len = p->tot_len;
 8016e8e:	687b      	ldr	r3, [r7, #4]
 8016e90:	891b      	ldrh	r3, [r3, #8]
 8016e92:	83fb      	strh	r3, [r7, #30]
 8016e94:	e003      	b.n	8016e9e <recv_tcp+0xba>
  } else {
    msg = LWIP_CONST_CAST(void *, &netconn_closed);
 8016e96:	4b1b      	ldr	r3, [pc, #108]	@ (8016f04 <recv_tcp+0x120>)
 8016e98:	61bb      	str	r3, [r7, #24]
    len = 0;
 8016e9a:	2300      	movs	r3, #0
 8016e9c:	83fb      	strh	r3, [r7, #30]
  }

  if (sys_mbox_trypost(&conn->recvmbox, msg) != ERR_OK) {
 8016e9e:	697b      	ldr	r3, [r7, #20]
 8016ea0:	3310      	adds	r3, #16
 8016ea2:	69b9      	ldr	r1, [r7, #24]
 8016ea4:	4618      	mov	r0, r3
 8016ea6:	f010 f9d7 	bl	8027258 <sys_mbox_trypost>
 8016eaa:	4603      	mov	r3, r0
 8016eac:	2b00      	cmp	r3, #0
 8016eae:	d002      	beq.n	8016eb6 <recv_tcp+0xd2>
    /* don't deallocate p: it is presented to us later again from tcp_fasttmr! */
    return ERR_MEM;
 8016eb0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8016eb4:	e016      	b.n	8016ee4 <recv_tcp+0x100>
  } else {
#if LWIP_SO_RCVBUF
    SYS_ARCH_INC(conn->recv_avail, len);
 8016eb6:	f010 fb3b 	bl	8027530 <sys_arch_protect>
 8016eba:	6138      	str	r0, [r7, #16]
 8016ebc:	697b      	ldr	r3, [r7, #20]
 8016ebe:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 8016ec0:	8bfb      	ldrh	r3, [r7, #30]
 8016ec2:	441a      	add	r2, r3
 8016ec4:	697b      	ldr	r3, [r7, #20]
 8016ec6:	625a      	str	r2, [r3, #36]	@ 0x24
 8016ec8:	6938      	ldr	r0, [r7, #16]
 8016eca:	f010 fb3f 	bl	802754c <sys_arch_unprotect>
#endif /* LWIP_SO_RCVBUF */
    /* Register event with callback */
    API_EVENT(conn, NETCONN_EVT_RCVPLUS, len);
 8016ece:	697b      	ldr	r3, [r7, #20]
 8016ed0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016ed2:	2b00      	cmp	r3, #0
 8016ed4:	d005      	beq.n	8016ee2 <recv_tcp+0xfe>
 8016ed6:	697b      	ldr	r3, [r7, #20]
 8016ed8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016eda:	8bfa      	ldrh	r2, [r7, #30]
 8016edc:	2100      	movs	r1, #0
 8016ede:	6978      	ldr	r0, [r7, #20]
 8016ee0:	4798      	blx	r3
  }

  return ERR_OK;
 8016ee2:	2300      	movs	r3, #0
}
 8016ee4:	4618      	mov	r0, r3
 8016ee6:	3720      	adds	r7, #32
 8016ee8:	46bd      	mov	sp, r7
 8016eea:	bd80      	pop	{r7, pc}
 8016eec:	0802e154 	.word	0x0802e154
 8016ef0:	0802e230 	.word	0x0802e230
 8016ef4:	0802e198 	.word	0x0802e198
 8016ef8:	0802e254 	.word	0x0802e254
 8016efc:	0802e274 	.word	0x0802e274
 8016f00:	0802e28c 	.word	0x0802e28c
 8016f04:	08031d5e 	.word	0x08031d5e

08016f08 <poll_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.poll) for parameters and return value
 */
static err_t
poll_tcp(void *arg, struct tcp_pcb *pcb)
{
 8016f08:	b580      	push	{r7, lr}
 8016f0a:	b084      	sub	sp, #16
 8016f0c:	af00      	add	r7, sp, #0
 8016f0e:	6078      	str	r0, [r7, #4]
 8016f10:	6039      	str	r1, [r7, #0]
  struct netconn *conn = (struct netconn *)arg;
 8016f12:	687b      	ldr	r3, [r7, #4]
 8016f14:	60fb      	str	r3, [r7, #12]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8016f16:	68fb      	ldr	r3, [r7, #12]
 8016f18:	2b00      	cmp	r3, #0
 8016f1a:	d106      	bne.n	8016f2a <poll_tcp+0x22>
 8016f1c:	4b2b      	ldr	r3, [pc, #172]	@ (8016fcc <poll_tcp+0xc4>)
 8016f1e:	f44f 72b5 	mov.w	r2, #362	@ 0x16a
 8016f22:	492b      	ldr	r1, [pc, #172]	@ (8016fd0 <poll_tcp+0xc8>)
 8016f24:	482b      	ldr	r0, [pc, #172]	@ (8016fd4 <poll_tcp+0xcc>)
 8016f26:	f013 fd99 	bl	802aa5c <iprintf>

  if (conn->state == NETCONN_WRITE) {
 8016f2a:	68fb      	ldr	r3, [r7, #12]
 8016f2c:	785b      	ldrb	r3, [r3, #1]
 8016f2e:	2b01      	cmp	r3, #1
 8016f30:	d104      	bne.n	8016f3c <poll_tcp+0x34>
    lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 8016f32:	2101      	movs	r1, #1
 8016f34:	68f8      	ldr	r0, [r7, #12]
 8016f36:	f000 ffab 	bl	8017e90 <lwip_netconn_do_writemore>
 8016f3a:	e016      	b.n	8016f6a <poll_tcp+0x62>
  } else if (conn->state == NETCONN_CLOSE) {
 8016f3c:	68fb      	ldr	r3, [r7, #12]
 8016f3e:	785b      	ldrb	r3, [r3, #1]
 8016f40:	2b04      	cmp	r3, #4
 8016f42:	d112      	bne.n	8016f6a <poll_tcp+0x62>
#if !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER
    if (conn->current_msg && conn->current_msg->msg.sd.polls_left) {
 8016f44:	68fb      	ldr	r3, [r7, #12]
 8016f46:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f48:	2b00      	cmp	r3, #0
 8016f4a:	d00a      	beq.n	8016f62 <poll_tcp+0x5a>
 8016f4c:	68fb      	ldr	r3, [r7, #12]
 8016f4e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f50:	7a5b      	ldrb	r3, [r3, #9]
 8016f52:	2b00      	cmp	r3, #0
 8016f54:	d005      	beq.n	8016f62 <poll_tcp+0x5a>
      conn->current_msg->msg.sd.polls_left--;
 8016f56:	68fb      	ldr	r3, [r7, #12]
 8016f58:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8016f5a:	7a5a      	ldrb	r2, [r3, #9]
 8016f5c:	3a01      	subs	r2, #1
 8016f5e:	b2d2      	uxtb	r2, r2
 8016f60:	725a      	strb	r2, [r3, #9]
    }
#endif /* !LWIP_SO_SNDTIMEO && !LWIP_SO_LINGER */
    lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 8016f62:	2101      	movs	r1, #1
 8016f64:	68f8      	ldr	r0, [r7, #12]
 8016f66:	f000 fb53 	bl	8017610 <lwip_netconn_do_close_internal>
  }
  /* @todo: implement connect timeout here? */

  /* Did a nonblocking write fail before? Then check available write-space. */
  if (conn->flags & NETCONN_FLAG_CHECK_WRITESPACE) {
 8016f6a:	68fb      	ldr	r3, [r7, #12]
 8016f6c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016f70:	f003 0310 	and.w	r3, r3, #16
 8016f74:	2b00      	cmp	r3, #0
 8016f76:	d024      	beq.n	8016fc2 <poll_tcp+0xba>
    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8016f78:	68fb      	ldr	r3, [r7, #12]
 8016f7a:	685b      	ldr	r3, [r3, #4]
 8016f7c:	2b00      	cmp	r3, #0
 8016f7e:	d020      	beq.n	8016fc2 <poll_tcp+0xba>
 8016f80:	68fb      	ldr	r3, [r7, #12]
 8016f82:	685b      	ldr	r3, [r3, #4]
 8016f84:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8016f88:	f640 3269 	movw	r2, #2921	@ 0xb69
 8016f8c:	4293      	cmp	r3, r2
 8016f8e:	d918      	bls.n	8016fc2 <poll_tcp+0xba>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 8016f90:	68fb      	ldr	r3, [r7, #12]
 8016f92:	685b      	ldr	r3, [r3, #4]
 8016f94:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8016f98:	2b07      	cmp	r3, #7
 8016f9a:	d812      	bhi.n	8016fc2 <poll_tcp+0xba>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 8016f9c:	68fb      	ldr	r3, [r7, #12]
 8016f9e:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8016fa2:	f023 0310 	bic.w	r3, r3, #16
 8016fa6:	b2da      	uxtb	r2, r3
 8016fa8:	68fb      	ldr	r3, [r7, #12]
 8016faa:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8016fae:	68fb      	ldr	r3, [r7, #12]
 8016fb0:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016fb2:	2b00      	cmp	r3, #0
 8016fb4:	d005      	beq.n	8016fc2 <poll_tcp+0xba>
 8016fb6:	68fb      	ldr	r3, [r7, #12]
 8016fb8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8016fba:	2200      	movs	r2, #0
 8016fbc:	2102      	movs	r1, #2
 8016fbe:	68f8      	ldr	r0, [r7, #12]
 8016fc0:	4798      	blx	r3
    }
  }

  return ERR_OK;
 8016fc2:	2300      	movs	r3, #0
}
 8016fc4:	4618      	mov	r0, r3
 8016fc6:	3710      	adds	r7, #16
 8016fc8:	46bd      	mov	sp, r7
 8016fca:	bd80      	pop	{r7, pc}
 8016fcc:	0802e154 	.word	0x0802e154
 8016fd0:	0802e2ac 	.word	0x0802e2ac
 8016fd4:	0802e198 	.word	0x0802e198

08016fd8 <sent_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.sent) for parameters and return value
 */
static err_t
sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len)
{
 8016fd8:	b580      	push	{r7, lr}
 8016fda:	b086      	sub	sp, #24
 8016fdc:	af00      	add	r7, sp, #0
 8016fde:	60f8      	str	r0, [r7, #12]
 8016fe0:	60b9      	str	r1, [r7, #8]
 8016fe2:	4613      	mov	r3, r2
 8016fe4:	80fb      	strh	r3, [r7, #6]
  struct netconn *conn = (struct netconn *)arg;
 8016fe6:	68fb      	ldr	r3, [r7, #12]
 8016fe8:	617b      	str	r3, [r7, #20]

  LWIP_UNUSED_ARG(pcb);
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8016fea:	697b      	ldr	r3, [r7, #20]
 8016fec:	2b00      	cmp	r3, #0
 8016fee:	d106      	bne.n	8016ffe <sent_tcp+0x26>
 8016ff0:	4b22      	ldr	r3, [pc, #136]	@ (801707c <sent_tcp+0xa4>)
 8016ff2:	f240 1293 	movw	r2, #403	@ 0x193
 8016ff6:	4922      	ldr	r1, [pc, #136]	@ (8017080 <sent_tcp+0xa8>)
 8016ff8:	4822      	ldr	r0, [pc, #136]	@ (8017084 <sent_tcp+0xac>)
 8016ffa:	f013 fd2f 	bl	802aa5c <iprintf>

  if (conn) {
 8016ffe:	697b      	ldr	r3, [r7, #20]
 8017000:	2b00      	cmp	r3, #0
 8017002:	d035      	beq.n	8017070 <sent_tcp+0x98>
    if (conn->state == NETCONN_WRITE) {
 8017004:	697b      	ldr	r3, [r7, #20]
 8017006:	785b      	ldrb	r3, [r3, #1]
 8017008:	2b01      	cmp	r3, #1
 801700a:	d104      	bne.n	8017016 <sent_tcp+0x3e>
      lwip_netconn_do_writemore(conn  WRITE_DELAYED);
 801700c:	2101      	movs	r1, #1
 801700e:	6978      	ldr	r0, [r7, #20]
 8017010:	f000 ff3e 	bl	8017e90 <lwip_netconn_do_writemore>
 8017014:	e007      	b.n	8017026 <sent_tcp+0x4e>
    } else if (conn->state == NETCONN_CLOSE) {
 8017016:	697b      	ldr	r3, [r7, #20]
 8017018:	785b      	ldrb	r3, [r3, #1]
 801701a:	2b04      	cmp	r3, #4
 801701c:	d103      	bne.n	8017026 <sent_tcp+0x4e>
      lwip_netconn_do_close_internal(conn  WRITE_DELAYED);
 801701e:	2101      	movs	r1, #1
 8017020:	6978      	ldr	r0, [r7, #20]
 8017022:	f000 faf5 	bl	8017610 <lwip_netconn_do_close_internal>
    }

    /* If the queued byte- or pbuf-count drops below the configured low-water limit,
       let select mark this pcb as writable again. */
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8017026:	697b      	ldr	r3, [r7, #20]
 8017028:	685b      	ldr	r3, [r3, #4]
 801702a:	2b00      	cmp	r3, #0
 801702c:	d020      	beq.n	8017070 <sent_tcp+0x98>
 801702e:	697b      	ldr	r3, [r7, #20]
 8017030:	685b      	ldr	r3, [r3, #4]
 8017032:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8017036:	f640 3269 	movw	r2, #2921	@ 0xb69
 801703a:	4293      	cmp	r3, r2
 801703c:	d918      	bls.n	8017070 <sent_tcp+0x98>
        (tcp_sndqueuelen(conn->pcb.tcp) < TCP_SNDQUEUELOWAT)) {
 801703e:	697b      	ldr	r3, [r7, #20]
 8017040:	685b      	ldr	r3, [r3, #4]
 8017042:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
    if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT) &&
 8017046:	2b07      	cmp	r3, #7
 8017048:	d812      	bhi.n	8017070 <sent_tcp+0x98>
      netconn_clear_flags(conn, NETCONN_FLAG_CHECK_WRITESPACE);
 801704a:	697b      	ldr	r3, [r7, #20]
 801704c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017050:	f023 0310 	bic.w	r3, r3, #16
 8017054:	b2da      	uxtb	r2, r3
 8017056:	697b      	ldr	r3, [r7, #20]
 8017058:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      API_EVENT(conn, NETCONN_EVT_SENDPLUS, len);
 801705c:	697b      	ldr	r3, [r7, #20]
 801705e:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017060:	2b00      	cmp	r3, #0
 8017062:	d005      	beq.n	8017070 <sent_tcp+0x98>
 8017064:	697b      	ldr	r3, [r7, #20]
 8017066:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017068:	88fa      	ldrh	r2, [r7, #6]
 801706a:	2102      	movs	r1, #2
 801706c:	6978      	ldr	r0, [r7, #20]
 801706e:	4798      	blx	r3
    }
  }

  return ERR_OK;
 8017070:	2300      	movs	r3, #0
}
 8017072:	4618      	mov	r0, r3
 8017074:	3718      	adds	r7, #24
 8017076:	46bd      	mov	sp, r7
 8017078:	bd80      	pop	{r7, pc}
 801707a:	bf00      	nop
 801707c:	0802e154 	.word	0x0802e154
 8017080:	0802e2ac 	.word	0x0802e2ac
 8017084:	0802e198 	.word	0x0802e198

08017088 <err_tcp>:
 *
 * @see tcp.h (struct tcp_pcb.err) for parameters
 */
static void
err_tcp(void *arg, err_t err)
{
 8017088:	b580      	push	{r7, lr}
 801708a:	b088      	sub	sp, #32
 801708c:	af00      	add	r7, sp, #0
 801708e:	6078      	str	r0, [r7, #4]
 8017090:	460b      	mov	r3, r1
 8017092:	70fb      	strb	r3, [r7, #3]
  struct netconn *conn;
  enum netconn_state old_state;
  void *mbox_msg;
  SYS_ARCH_DECL_PROTECT(lev);

  conn = (struct netconn *)arg;
 8017094:	687b      	ldr	r3, [r7, #4]
 8017096:	61fb      	str	r3, [r7, #28]
  LWIP_ASSERT("conn != NULL", (conn != NULL));
 8017098:	69fb      	ldr	r3, [r7, #28]
 801709a:	2b00      	cmp	r3, #0
 801709c:	d106      	bne.n	80170ac <err_tcp+0x24>
 801709e:	4b61      	ldr	r3, [pc, #388]	@ (8017224 <err_tcp+0x19c>)
 80170a0:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 80170a4:	4960      	ldr	r1, [pc, #384]	@ (8017228 <err_tcp+0x1a0>)
 80170a6:	4861      	ldr	r0, [pc, #388]	@ (801722c <err_tcp+0x1a4>)
 80170a8:	f013 fcd8 	bl	802aa5c <iprintf>

  SYS_ARCH_PROTECT(lev);
 80170ac:	f010 fa40 	bl	8027530 <sys_arch_protect>
 80170b0:	61b8      	str	r0, [r7, #24]

  /* when err is called, the pcb is deallocated, so delete the reference */
  conn->pcb.tcp = NULL;
 80170b2:	69fb      	ldr	r3, [r7, #28]
 80170b4:	2200      	movs	r2, #0
 80170b6:	605a      	str	r2, [r3, #4]
  /* store pending error */
  conn->pending_err = err;
 80170b8:	69fb      	ldr	r3, [r7, #28]
 80170ba:	78fa      	ldrb	r2, [r7, #3]
 80170bc:	721a      	strb	r2, [r3, #8]
  /* prevent application threads from blocking on 'recvmbox'/'acceptmbox' */
  conn->flags |= NETCONN_FLAG_MBOXCLOSED;
 80170be:	69fb      	ldr	r3, [r7, #28]
 80170c0:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 80170c4:	f043 0301 	orr.w	r3, r3, #1
 80170c8:	b2da      	uxtb	r2, r3
 80170ca:	69fb      	ldr	r3, [r7, #28]
 80170cc:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

  /* reset conn->state now before waking up other threads */
  old_state = conn->state;
 80170d0:	69fb      	ldr	r3, [r7, #28]
 80170d2:	785b      	ldrb	r3, [r3, #1]
 80170d4:	75fb      	strb	r3, [r7, #23]
  conn->state = NETCONN_NONE;
 80170d6:	69fb      	ldr	r3, [r7, #28]
 80170d8:	2200      	movs	r2, #0
 80170da:	705a      	strb	r2, [r3, #1]

  SYS_ARCH_UNPROTECT(lev);
 80170dc:	69b8      	ldr	r0, [r7, #24]
 80170de:	f010 fa35 	bl	802754c <sys_arch_unprotect>

  /* Notify the user layer about a connection error. Used to signal select. */
  API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 80170e2:	69fb      	ldr	r3, [r7, #28]
 80170e4:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80170e6:	2b00      	cmp	r3, #0
 80170e8:	d005      	beq.n	80170f6 <err_tcp+0x6e>
 80170ea:	69fb      	ldr	r3, [r7, #28]
 80170ec:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80170ee:	2200      	movs	r2, #0
 80170f0:	2104      	movs	r1, #4
 80170f2:	69f8      	ldr	r0, [r7, #28]
 80170f4:	4798      	blx	r3
  /* Try to release selects pending on 'read' or 'write', too.
     They will get an error if they actually try to read or write. */
  API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 80170f6:	69fb      	ldr	r3, [r7, #28]
 80170f8:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80170fa:	2b00      	cmp	r3, #0
 80170fc:	d005      	beq.n	801710a <err_tcp+0x82>
 80170fe:	69fb      	ldr	r3, [r7, #28]
 8017100:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017102:	2200      	movs	r2, #0
 8017104:	2100      	movs	r1, #0
 8017106:	69f8      	ldr	r0, [r7, #28]
 8017108:	4798      	blx	r3
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 801710a:	69fb      	ldr	r3, [r7, #28]
 801710c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801710e:	2b00      	cmp	r3, #0
 8017110:	d005      	beq.n	801711e <err_tcp+0x96>
 8017112:	69fb      	ldr	r3, [r7, #28]
 8017114:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017116:	2200      	movs	r2, #0
 8017118:	2102      	movs	r1, #2
 801711a:	69f8      	ldr	r0, [r7, #28]
 801711c:	4798      	blx	r3

  mbox_msg = lwip_netconn_err_to_msg(err);
 801711e:	f997 3003 	ldrsb.w	r3, [r7, #3]
 8017122:	4618      	mov	r0, r3
 8017124:	f7ff fd52 	bl	8016bcc <lwip_netconn_err_to_msg>
 8017128:	6138      	str	r0, [r7, #16]
  /* pass error message to recvmbox to wake up pending recv */
  if (NETCONN_MBOX_VALID(conn, &conn->recvmbox)) {
 801712a:	69fb      	ldr	r3, [r7, #28]
 801712c:	3310      	adds	r3, #16
 801712e:	4618      	mov	r0, r3
 8017130:	f010 f8f4 	bl	802731c <sys_mbox_valid>
 8017134:	4603      	mov	r3, r0
 8017136:	2b00      	cmp	r3, #0
 8017138:	d005      	beq.n	8017146 <err_tcp+0xbe>
    /* use trypost to prevent deadlock */
    sys_mbox_trypost(&conn->recvmbox, mbox_msg);
 801713a:	69fb      	ldr	r3, [r7, #28]
 801713c:	3310      	adds	r3, #16
 801713e:	6939      	ldr	r1, [r7, #16]
 8017140:	4618      	mov	r0, r3
 8017142:	f010 f889 	bl	8027258 <sys_mbox_trypost>
  }
  /* pass error message to acceptmbox to wake up pending accept */
  if (NETCONN_MBOX_VALID(conn, &conn->acceptmbox)) {
 8017146:	69fb      	ldr	r3, [r7, #28]
 8017148:	3314      	adds	r3, #20
 801714a:	4618      	mov	r0, r3
 801714c:	f010 f8e6 	bl	802731c <sys_mbox_valid>
 8017150:	4603      	mov	r3, r0
 8017152:	2b00      	cmp	r3, #0
 8017154:	d005      	beq.n	8017162 <err_tcp+0xda>
    /* use trypost to preven deadlock */
    sys_mbox_trypost(&conn->acceptmbox, mbox_msg);
 8017156:	69fb      	ldr	r3, [r7, #28]
 8017158:	3314      	adds	r3, #20
 801715a:	6939      	ldr	r1, [r7, #16]
 801715c:	4618      	mov	r0, r3
 801715e:	f010 f87b 	bl	8027258 <sys_mbox_trypost>
  }

  if ((old_state == NETCONN_WRITE) || (old_state == NETCONN_CLOSE) ||
 8017162:	7dfb      	ldrb	r3, [r7, #23]
 8017164:	2b01      	cmp	r3, #1
 8017166:	d005      	beq.n	8017174 <err_tcp+0xec>
 8017168:	7dfb      	ldrb	r3, [r7, #23]
 801716a:	2b04      	cmp	r3, #4
 801716c:	d002      	beq.n	8017174 <err_tcp+0xec>
 801716e:	7dfb      	ldrb	r3, [r7, #23]
 8017170:	2b03      	cmp	r3, #3
 8017172:	d146      	bne.n	8017202 <err_tcp+0x17a>
      (old_state == NETCONN_CONNECT)) {
    /* calling lwip_netconn_do_writemore/lwip_netconn_do_close_internal is not necessary
       since the pcb has already been deleted! */
    int was_nonblocking_connect = IN_NONBLOCKING_CONNECT(conn);
 8017174:	69fb      	ldr	r3, [r7, #28]
 8017176:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801717a:	f003 0304 	and.w	r3, r3, #4
 801717e:	2b00      	cmp	r3, #0
 8017180:	bf14      	ite	ne
 8017182:	2301      	movne	r3, #1
 8017184:	2300      	moveq	r3, #0
 8017186:	b2db      	uxtb	r3, r3
 8017188:	60fb      	str	r3, [r7, #12]
    SET_NONBLOCKING_CONNECT(conn, 0);
 801718a:	69fb      	ldr	r3, [r7, #28]
 801718c:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017190:	f023 0304 	bic.w	r3, r3, #4
 8017194:	b2da      	uxtb	r2, r3
 8017196:	69fb      	ldr	r3, [r7, #28]
 8017198:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28

    if (!was_nonblocking_connect) {
 801719c:	68fb      	ldr	r3, [r7, #12]
 801719e:	2b00      	cmp	r3, #0
 80171a0:	d13b      	bne.n	801721a <err_tcp+0x192>
      sys_sem_t *op_completed_sem;
      /* set error return code */
      LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 80171a2:	69fb      	ldr	r3, [r7, #28]
 80171a4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80171a6:	2b00      	cmp	r3, #0
 80171a8:	d106      	bne.n	80171b8 <err_tcp+0x130>
 80171aa:	4b1e      	ldr	r3, [pc, #120]	@ (8017224 <err_tcp+0x19c>)
 80171ac:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 80171b0:	491f      	ldr	r1, [pc, #124]	@ (8017230 <err_tcp+0x1a8>)
 80171b2:	481e      	ldr	r0, [pc, #120]	@ (801722c <err_tcp+0x1a4>)
 80171b4:	f013 fc52 	bl	802aa5c <iprintf>
      if (old_state == NETCONN_CLOSE) {
 80171b8:	7dfb      	ldrb	r3, [r7, #23]
 80171ba:	2b04      	cmp	r3, #4
 80171bc:	d104      	bne.n	80171c8 <err_tcp+0x140>
        /* let close succeed: the connection is closed after all... */
        conn->current_msg->err = ERR_OK;
 80171be:	69fb      	ldr	r3, [r7, #28]
 80171c0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80171c2:	2200      	movs	r2, #0
 80171c4:	711a      	strb	r2, [r3, #4]
 80171c6:	e003      	b.n	80171d0 <err_tcp+0x148>
      } else {
        /* Write and connect fail */
        conn->current_msg->err = err;
 80171c8:	69fb      	ldr	r3, [r7, #28]
 80171ca:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80171cc:	78fa      	ldrb	r2, [r7, #3]
 80171ce:	711a      	strb	r2, [r3, #4]
      }
      op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 80171d0:	69fb      	ldr	r3, [r7, #28]
 80171d2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80171d4:	681b      	ldr	r3, [r3, #0]
 80171d6:	330c      	adds	r3, #12
 80171d8:	60bb      	str	r3, [r7, #8]
      LWIP_ASSERT("inavlid op_completed_sem", sys_sem_valid(op_completed_sem));
 80171da:	68b8      	ldr	r0, [r7, #8]
 80171dc:	f010 f92c 	bl	8027438 <sys_sem_valid>
 80171e0:	4603      	mov	r3, r0
 80171e2:	2b00      	cmp	r3, #0
 80171e4:	d106      	bne.n	80171f4 <err_tcp+0x16c>
 80171e6:	4b0f      	ldr	r3, [pc, #60]	@ (8017224 <err_tcp+0x19c>)
 80171e8:	f240 12ef 	movw	r2, #495	@ 0x1ef
 80171ec:	4911      	ldr	r1, [pc, #68]	@ (8017234 <err_tcp+0x1ac>)
 80171ee:	480f      	ldr	r0, [pc, #60]	@ (801722c <err_tcp+0x1a4>)
 80171f0:	f013 fc34 	bl	802aa5c <iprintf>
      conn->current_msg = NULL;
 80171f4:	69fb      	ldr	r3, [r7, #28]
 80171f6:	2200      	movs	r2, #0
 80171f8:	62da      	str	r2, [r3, #44]	@ 0x2c
      /* wake up the waiting task */
      sys_sem_signal(op_completed_sem);
 80171fa:	68b8      	ldr	r0, [r7, #8]
 80171fc:	f010 f902 	bl	8027404 <sys_sem_signal>
      (old_state == NETCONN_CONNECT)) {
 8017200:	e00b      	b.n	801721a <err_tcp+0x192>
    } else {
      /* @todo: test what happens for error on nonblocking connect */
    }
  } else {
    LWIP_ASSERT("conn->current_msg == NULL", conn->current_msg == NULL);
 8017202:	69fb      	ldr	r3, [r7, #28]
 8017204:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017206:	2b00      	cmp	r3, #0
 8017208:	d008      	beq.n	801721c <err_tcp+0x194>
 801720a:	4b06      	ldr	r3, [pc, #24]	@ (8017224 <err_tcp+0x19c>)
 801720c:	f240 12f7 	movw	r2, #503	@ 0x1f7
 8017210:	4909      	ldr	r1, [pc, #36]	@ (8017238 <err_tcp+0x1b0>)
 8017212:	4806      	ldr	r0, [pc, #24]	@ (801722c <err_tcp+0x1a4>)
 8017214:	f013 fc22 	bl	802aa5c <iprintf>
  }
}
 8017218:	e000      	b.n	801721c <err_tcp+0x194>
      (old_state == NETCONN_CONNECT)) {
 801721a:	bf00      	nop
}
 801721c:	bf00      	nop
 801721e:	3720      	adds	r7, #32
 8017220:	46bd      	mov	sp, r7
 8017222:	bd80      	pop	{r7, pc}
 8017224:	0802e154 	.word	0x0802e154
 8017228:	0802e2ac 	.word	0x0802e2ac
 801722c:	0802e198 	.word	0x0802e198
 8017230:	0802e2bc 	.word	0x0802e2bc
 8017234:	0802e2d8 	.word	0x0802e2d8
 8017238:	0802e2f4 	.word	0x0802e2f4

0801723c <setup_tcp>:
 *
 * @param conn the TCP netconn to setup
 */
static void
setup_tcp(struct netconn *conn)
{
 801723c:	b580      	push	{r7, lr}
 801723e:	b084      	sub	sp, #16
 8017240:	af00      	add	r7, sp, #0
 8017242:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *pcb;

  pcb = conn->pcb.tcp;
 8017244:	687b      	ldr	r3, [r7, #4]
 8017246:	685b      	ldr	r3, [r3, #4]
 8017248:	60fb      	str	r3, [r7, #12]
  tcp_arg(pcb, conn);
 801724a:	6879      	ldr	r1, [r7, #4]
 801724c:	68f8      	ldr	r0, [r7, #12]
 801724e:	f005 ffe3 	bl	801d218 <tcp_arg>
  tcp_recv(pcb, recv_tcp);
 8017252:	490a      	ldr	r1, [pc, #40]	@ (801727c <setup_tcp+0x40>)
 8017254:	68f8      	ldr	r0, [r7, #12]
 8017256:	f005 fff1 	bl	801d23c <tcp_recv>
  tcp_sent(pcb, sent_tcp);
 801725a:	4909      	ldr	r1, [pc, #36]	@ (8017280 <setup_tcp+0x44>)
 801725c:	68f8      	ldr	r0, [r7, #12]
 801725e:	f006 f811 	bl	801d284 <tcp_sent>
  tcp_poll(pcb, poll_tcp, NETCONN_TCP_POLL_INTERVAL);
 8017262:	2202      	movs	r2, #2
 8017264:	4907      	ldr	r1, [pc, #28]	@ (8017284 <setup_tcp+0x48>)
 8017266:	68f8      	ldr	r0, [r7, #12]
 8017268:	f006 f86c 	bl	801d344 <tcp_poll>
  tcp_err(pcb, err_tcp);
 801726c:	4906      	ldr	r1, [pc, #24]	@ (8017288 <setup_tcp+0x4c>)
 801726e:	68f8      	ldr	r0, [r7, #12]
 8017270:	f006 f82c 	bl	801d2cc <tcp_err>
}
 8017274:	bf00      	nop
 8017276:	3710      	adds	r7, #16
 8017278:	46bd      	mov	sp, r7
 801727a:	bd80      	pop	{r7, pc}
 801727c:	08016de5 	.word	0x08016de5
 8017280:	08016fd9 	.word	0x08016fd9
 8017284:	08016f09 	.word	0x08016f09
 8017288:	08017089 	.word	0x08017089

0801728c <pcb_new>:
 *
 * @param msg the api_msg describing the connection type
 */
static void
pcb_new(struct api_msg *msg)
{
 801728c:	b590      	push	{r4, r7, lr}
 801728e:	b085      	sub	sp, #20
 8017290:	af00      	add	r7, sp, #0
 8017292:	6078      	str	r0, [r7, #4]
  enum lwip_ip_addr_type iptype = IPADDR_TYPE_V4;
 8017294:	2300      	movs	r3, #0
 8017296:	73fb      	strb	r3, [r7, #15]

  LWIP_ASSERT("pcb_new: pcb already allocated", msg->conn->pcb.tcp == NULL);
 8017298:	687b      	ldr	r3, [r7, #4]
 801729a:	681b      	ldr	r3, [r3, #0]
 801729c:	685b      	ldr	r3, [r3, #4]
 801729e:	2b00      	cmp	r3, #0
 80172a0:	d006      	beq.n	80172b0 <pcb_new+0x24>
 80172a2:	4b2b      	ldr	r3, [pc, #172]	@ (8017350 <pcb_new+0xc4>)
 80172a4:	f240 2265 	movw	r2, #613	@ 0x265
 80172a8:	492a      	ldr	r1, [pc, #168]	@ (8017354 <pcb_new+0xc8>)
 80172aa:	482b      	ldr	r0, [pc, #172]	@ (8017358 <pcb_new+0xcc>)
 80172ac:	f013 fbd6 	bl	802aa5c <iprintf>
    iptype = IPADDR_TYPE_ANY;
  }
#endif

  /* Allocate a PCB for this connection */
  switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 80172b0:	687b      	ldr	r3, [r7, #4]
 80172b2:	681b      	ldr	r3, [r3, #0]
 80172b4:	781b      	ldrb	r3, [r3, #0]
 80172b6:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80172ba:	2b10      	cmp	r3, #16
 80172bc:	d022      	beq.n	8017304 <pcb_new+0x78>
 80172be:	2b20      	cmp	r3, #32
 80172c0:	d133      	bne.n	801732a <pcb_new+0x9e>
      }
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      msg->conn->pcb.udp = udp_new_ip_type(iptype);
 80172c2:	687b      	ldr	r3, [r7, #4]
 80172c4:	681c      	ldr	r4, [r3, #0]
 80172c6:	7bfb      	ldrb	r3, [r7, #15]
 80172c8:	4618      	mov	r0, r3
 80172ca:	f00b fb94 	bl	80229f6 <udp_new_ip_type>
 80172ce:	4603      	mov	r3, r0
 80172d0:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.udp != NULL) {
 80172d2:	687b      	ldr	r3, [r7, #4]
 80172d4:	681b      	ldr	r3, [r3, #0]
 80172d6:	685b      	ldr	r3, [r3, #4]
 80172d8:	2b00      	cmp	r3, #0
 80172da:	d02a      	beq.n	8017332 <pcb_new+0xa6>
#if LWIP_UDPLITE
        if (NETCONNTYPE_ISUDPLITE(msg->conn->type)) {
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE);
        }
#endif /* LWIP_UDPLITE */
        if (NETCONNTYPE_ISUDPNOCHKSUM(msg->conn->type)) {
 80172dc:	687b      	ldr	r3, [r7, #4]
 80172de:	681b      	ldr	r3, [r3, #0]
 80172e0:	781b      	ldrb	r3, [r3, #0]
 80172e2:	2b22      	cmp	r3, #34	@ 0x22
 80172e4:	d104      	bne.n	80172f0 <pcb_new+0x64>
          udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM);
 80172e6:	687b      	ldr	r3, [r7, #4]
 80172e8:	681b      	ldr	r3, [r3, #0]
 80172ea:	685b      	ldr	r3, [r3, #4]
 80172ec:	2201      	movs	r2, #1
 80172ee:	741a      	strb	r2, [r3, #16]
        }
        udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn);
 80172f0:	687b      	ldr	r3, [r7, #4]
 80172f2:	681b      	ldr	r3, [r3, #0]
 80172f4:	6858      	ldr	r0, [r3, #4]
 80172f6:	687b      	ldr	r3, [r7, #4]
 80172f8:	681b      	ldr	r3, [r3, #0]
 80172fa:	461a      	mov	r2, r3
 80172fc:	4917      	ldr	r1, [pc, #92]	@ (801735c <pcb_new+0xd0>)
 80172fe:	f00b fafb 	bl	80228f8 <udp_recv>
      }
      break;
 8017302:	e016      	b.n	8017332 <pcb_new+0xa6>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      msg->conn->pcb.tcp = tcp_new_ip_type(iptype);
 8017304:	687b      	ldr	r3, [r7, #4]
 8017306:	681c      	ldr	r4, [r3, #0]
 8017308:	7bfb      	ldrb	r3, [r7, #15]
 801730a:	4618      	mov	r0, r3
 801730c:	f005 ff76 	bl	801d1fc <tcp_new_ip_type>
 8017310:	4603      	mov	r3, r0
 8017312:	6063      	str	r3, [r4, #4]
      if (msg->conn->pcb.tcp != NULL) {
 8017314:	687b      	ldr	r3, [r7, #4]
 8017316:	681b      	ldr	r3, [r3, #0]
 8017318:	685b      	ldr	r3, [r3, #4]
 801731a:	2b00      	cmp	r3, #0
 801731c:	d00b      	beq.n	8017336 <pcb_new+0xaa>
        setup_tcp(msg->conn);
 801731e:	687b      	ldr	r3, [r7, #4]
 8017320:	681b      	ldr	r3, [r3, #0]
 8017322:	4618      	mov	r0, r3
 8017324:	f7ff ff8a 	bl	801723c <setup_tcp>
      }
      break;
 8017328:	e005      	b.n	8017336 <pcb_new+0xaa>
#endif /* LWIP_TCP */
    default:
      /* Unsupported netconn type, e.g. protocol disabled */
      msg->err = ERR_VAL;
 801732a:	687b      	ldr	r3, [r7, #4]
 801732c:	22fa      	movs	r2, #250	@ 0xfa
 801732e:	711a      	strb	r2, [r3, #4]
      return;
 8017330:	e00a      	b.n	8017348 <pcb_new+0xbc>
      break;
 8017332:	bf00      	nop
 8017334:	e000      	b.n	8017338 <pcb_new+0xac>
      break;
 8017336:	bf00      	nop
  }
  if (msg->conn->pcb.ip == NULL) {
 8017338:	687b      	ldr	r3, [r7, #4]
 801733a:	681b      	ldr	r3, [r3, #0]
 801733c:	685b      	ldr	r3, [r3, #4]
 801733e:	2b00      	cmp	r3, #0
 8017340:	d102      	bne.n	8017348 <pcb_new+0xbc>
    msg->err = ERR_MEM;
 8017342:	687b      	ldr	r3, [r7, #4]
 8017344:	22ff      	movs	r2, #255	@ 0xff
 8017346:	711a      	strb	r2, [r3, #4]
  }
}
 8017348:	3714      	adds	r7, #20
 801734a:	46bd      	mov	sp, r7
 801734c:	bd90      	pop	{r4, r7, pc}
 801734e:	bf00      	nop
 8017350:	0802e154 	.word	0x0802e154
 8017354:	0802e338 	.word	0x0802e338
 8017358:	0802e198 	.word	0x0802e198
 801735c:	08016cad 	.word	0x08016cad

08017360 <lwip_netconn_do_newconn>:
 *
 * @param m the api_msg describing the connection type
 */
void
lwip_netconn_do_newconn(void *m)
{
 8017360:	b580      	push	{r7, lr}
 8017362:	b084      	sub	sp, #16
 8017364:	af00      	add	r7, sp, #0
 8017366:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017368:	687b      	ldr	r3, [r7, #4]
 801736a:	60fb      	str	r3, [r7, #12]

  msg->err = ERR_OK;
 801736c:	68fb      	ldr	r3, [r7, #12]
 801736e:	2200      	movs	r2, #0
 8017370:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp == NULL) {
 8017372:	68fb      	ldr	r3, [r7, #12]
 8017374:	681b      	ldr	r3, [r3, #0]
 8017376:	685b      	ldr	r3, [r3, #4]
 8017378:	2b00      	cmp	r3, #0
 801737a:	d102      	bne.n	8017382 <lwip_netconn_do_newconn+0x22>
    pcb_new(msg);
 801737c:	68f8      	ldr	r0, [r7, #12]
 801737e:	f7ff ff85 	bl	801728c <pcb_new>
  /* Else? This "new" connection already has a PCB allocated. */
  /* Is this an error condition? Should it be deleted? */
  /* We currently just are happy and return. */

  TCPIP_APIMSG_ACK(msg);
}
 8017382:	bf00      	nop
 8017384:	3710      	adds	r7, #16
 8017386:	46bd      	mov	sp, r7
 8017388:	bd80      	pop	{r7, pc}
	...

0801738c <netconn_alloc>:
 * @return a newly allocated struct netconn or
 *         NULL on memory error
 */
struct netconn *
netconn_alloc(enum netconn_type t, netconn_callback callback)
{
 801738c:	b580      	push	{r7, lr}
 801738e:	b086      	sub	sp, #24
 8017390:	af00      	add	r7, sp, #0
 8017392:	4603      	mov	r3, r0
 8017394:	6039      	str	r1, [r7, #0]
 8017396:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int size;
  u8_t init_flags = 0;
 8017398:	2300      	movs	r3, #0
 801739a:	74fb      	strb	r3, [r7, #19]

  conn = (struct netconn *)memp_malloc(MEMP_NETCONN);
 801739c:	2007      	movs	r0, #7
 801739e:	f003 f981 	bl	801a6a4 <memp_malloc>
 80173a2:	60f8      	str	r0, [r7, #12]
  if (conn == NULL) {
 80173a4:	68fb      	ldr	r3, [r7, #12]
 80173a6:	2b00      	cmp	r3, #0
 80173a8:	d101      	bne.n	80173ae <netconn_alloc+0x22>
    return NULL;
 80173aa:	2300      	movs	r3, #0
 80173ac:	e05c      	b.n	8017468 <netconn_alloc+0xdc>
  }

  conn->pending_err = ERR_OK;
 80173ae:	68fb      	ldr	r3, [r7, #12]
 80173b0:	2200      	movs	r2, #0
 80173b2:	721a      	strb	r2, [r3, #8]
  conn->type = t;
 80173b4:	68fb      	ldr	r3, [r7, #12]
 80173b6:	79fa      	ldrb	r2, [r7, #7]
 80173b8:	701a      	strb	r2, [r3, #0]
  conn->pcb.tcp = NULL;
 80173ba:	68fb      	ldr	r3, [r7, #12]
 80173bc:	2200      	movs	r2, #0
 80173be:	605a      	str	r2, [r3, #4]

  /* If all sizes are the same, every compiler should optimize this switch to nothing */
  switch (NETCONNTYPE_GROUP(t)) {
 80173c0:	79fb      	ldrb	r3, [r7, #7]
 80173c2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80173c6:	2b10      	cmp	r3, #16
 80173c8:	d004      	beq.n	80173d4 <netconn_alloc+0x48>
 80173ca:	2b20      	cmp	r3, #32
 80173cc:	d105      	bne.n	80173da <netconn_alloc+0x4e>
      size = DEFAULT_RAW_RECVMBOX_SIZE;
      break;
#endif /* LWIP_RAW */
#if LWIP_UDP
    case NETCONN_UDP:
      size = DEFAULT_UDP_RECVMBOX_SIZE;
 80173ce:	2306      	movs	r3, #6
 80173d0:	617b      	str	r3, [r7, #20]
#if LWIP_NETBUF_RECVINFO
      init_flags |= NETCONN_FLAG_PKTINFO;
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 80173d2:	e00a      	b.n	80173ea <netconn_alloc+0x5e>
#endif /* LWIP_UDP */
#if LWIP_TCP
    case NETCONN_TCP:
      size = DEFAULT_TCP_RECVMBOX_SIZE;
 80173d4:	2306      	movs	r3, #6
 80173d6:	617b      	str	r3, [r7, #20]
      break;
 80173d8:	e007      	b.n	80173ea <netconn_alloc+0x5e>
#endif /* LWIP_TCP */
    default:
      LWIP_ASSERT("netconn_alloc: undefined netconn_type", 0);
 80173da:	4b25      	ldr	r3, [pc, #148]	@ (8017470 <netconn_alloc+0xe4>)
 80173dc:	f240 22e5 	movw	r2, #741	@ 0x2e5
 80173e0:	4924      	ldr	r1, [pc, #144]	@ (8017474 <netconn_alloc+0xe8>)
 80173e2:	4825      	ldr	r0, [pc, #148]	@ (8017478 <netconn_alloc+0xec>)
 80173e4:	f013 fb3a 	bl	802aa5c <iprintf>
      goto free_and_return;
 80173e8:	e039      	b.n	801745e <netconn_alloc+0xd2>
  }

  if (sys_mbox_new(&conn->recvmbox, size) != ERR_OK) {
 80173ea:	68fb      	ldr	r3, [r7, #12]
 80173ec:	3310      	adds	r3, #16
 80173ee:	6979      	ldr	r1, [r7, #20]
 80173f0:	4618      	mov	r0, r3
 80173f2:	f00f ff05 	bl	8027200 <sys_mbox_new>
 80173f6:	4603      	mov	r3, r0
 80173f8:	2b00      	cmp	r3, #0
 80173fa:	d12f      	bne.n	801745c <netconn_alloc+0xd0>
    goto free_and_return;
  }
#if !LWIP_NETCONN_SEM_PER_THREAD
  if (sys_sem_new(&conn->op_completed, 0) != ERR_OK) {
 80173fc:	68fb      	ldr	r3, [r7, #12]
 80173fe:	330c      	adds	r3, #12
 8017400:	2100      	movs	r1, #0
 8017402:	4618      	mov	r0, r3
 8017404:	f00f ffa8 	bl	8027358 <sys_sem_new>
 8017408:	4603      	mov	r3, r0
 801740a:	2b00      	cmp	r3, #0
 801740c:	d005      	beq.n	801741a <netconn_alloc+0x8e>
    sys_mbox_free(&conn->recvmbox);
 801740e:	68fb      	ldr	r3, [r7, #12]
 8017410:	3310      	adds	r3, #16
 8017412:	4618      	mov	r0, r3
 8017414:	f00f ff0e 	bl	8027234 <sys_mbox_free>
    goto free_and_return;
 8017418:	e021      	b.n	801745e <netconn_alloc+0xd2>
  }
#endif

#if LWIP_TCP
  sys_mbox_set_invalid(&conn->acceptmbox);
 801741a:	68fb      	ldr	r3, [r7, #12]
 801741c:	3314      	adds	r3, #20
 801741e:	4618      	mov	r0, r3
 8017420:	f00f ff8d 	bl	802733e <sys_mbox_set_invalid>
#endif
  conn->state        = NETCONN_NONE;
 8017424:	68fb      	ldr	r3, [r7, #12]
 8017426:	2200      	movs	r2, #0
 8017428:	705a      	strb	r2, [r3, #1]
#if LWIP_SOCKET
  /* initialize socket to -1 since 0 is a valid socket */
  conn->socket       = -1;
 801742a:	68fb      	ldr	r3, [r7, #12]
 801742c:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 8017430:	619a      	str	r2, [r3, #24]
#endif /* LWIP_SOCKET */
  conn->callback     = callback;
 8017432:	68fb      	ldr	r3, [r7, #12]
 8017434:	683a      	ldr	r2, [r7, #0]
 8017436:	631a      	str	r2, [r3, #48]	@ 0x30
#if LWIP_TCP
  conn->current_msg  = NULL;
 8017438:	68fb      	ldr	r3, [r7, #12]
 801743a:	2200      	movs	r2, #0
 801743c:	62da      	str	r2, [r3, #44]	@ 0x2c
#endif /* LWIP_TCP */
#if LWIP_SO_SNDTIMEO
  conn->send_timeout = 0;
#endif /* LWIP_SO_SNDTIMEO */
#if LWIP_SO_RCVTIMEO
  conn->recv_timeout = 0;
 801743e:	68fb      	ldr	r3, [r7, #12]
 8017440:	2200      	movs	r2, #0
 8017442:	61da      	str	r2, [r3, #28]
#endif /* LWIP_SO_RCVTIMEO */
#if LWIP_SO_RCVBUF
  conn->recv_bufsize = RECV_BUFSIZE_DEFAULT;
 8017444:	68fb      	ldr	r3, [r7, #12]
 8017446:	4a0d      	ldr	r2, [pc, #52]	@ (801747c <netconn_alloc+0xf0>)
 8017448:	621a      	str	r2, [r3, #32]
  conn->recv_avail   = 0;
 801744a:	68fb      	ldr	r3, [r7, #12]
 801744c:	2200      	movs	r2, #0
 801744e:	625a      	str	r2, [r3, #36]	@ 0x24
#endif /* LWIP_SO_RCVBUF */
#if LWIP_SO_LINGER
  conn->linger = -1;
#endif /* LWIP_SO_LINGER */
  conn->flags = init_flags;
 8017450:	68fb      	ldr	r3, [r7, #12]
 8017452:	7cfa      	ldrb	r2, [r7, #19]
 8017454:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  return conn;
 8017458:	68fb      	ldr	r3, [r7, #12]
 801745a:	e005      	b.n	8017468 <netconn_alloc+0xdc>
    goto free_and_return;
 801745c:	bf00      	nop
free_and_return:
  memp_free(MEMP_NETCONN, conn);
 801745e:	68f9      	ldr	r1, [r7, #12]
 8017460:	2007      	movs	r0, #7
 8017462:	f003 f995 	bl	801a790 <memp_free>
  return NULL;
 8017466:	2300      	movs	r3, #0
}
 8017468:	4618      	mov	r0, r3
 801746a:	3718      	adds	r7, #24
 801746c:	46bd      	mov	sp, r7
 801746e:	bd80      	pop	{r7, pc}
 8017470:	0802e154 	.word	0x0802e154
 8017474:	0802e358 	.word	0x0802e358
 8017478:	0802e198 	.word	0x0802e198
 801747c:	77359400 	.word	0x77359400

08017480 <netconn_free>:
 *
 * @param conn the netconn to free
 */
void
netconn_free(struct netconn *conn)
{
 8017480:	b580      	push	{r7, lr}
 8017482:	b082      	sub	sp, #8
 8017484:	af00      	add	r7, sp, #0
 8017486:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("PCB must be deallocated outside this function", conn->pcb.tcp == NULL);
 8017488:	687b      	ldr	r3, [r7, #4]
 801748a:	685b      	ldr	r3, [r3, #4]
 801748c:	2b00      	cmp	r3, #0
 801748e:	d006      	beq.n	801749e <netconn_free+0x1e>
 8017490:	4b1b      	ldr	r3, [pc, #108]	@ (8017500 <netconn_free+0x80>)
 8017492:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 8017496:	491b      	ldr	r1, [pc, #108]	@ (8017504 <netconn_free+0x84>)
 8017498:	481b      	ldr	r0, [pc, #108]	@ (8017508 <netconn_free+0x88>)
 801749a:	f013 fadf 	bl	802aa5c <iprintf>
#if LWIP_NETCONN_FULLDUPLEX
  /* in fullduplex, netconn is drained here */
  netconn_drain(conn);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  LWIP_ASSERT("recvmbox must be deallocated before calling this function",
 801749e:	687b      	ldr	r3, [r7, #4]
 80174a0:	3310      	adds	r3, #16
 80174a2:	4618      	mov	r0, r3
 80174a4:	f00f ff3a 	bl	802731c <sys_mbox_valid>
 80174a8:	4603      	mov	r3, r0
 80174aa:	2b00      	cmp	r3, #0
 80174ac:	d006      	beq.n	80174bc <netconn_free+0x3c>
 80174ae:	4b14      	ldr	r3, [pc, #80]	@ (8017500 <netconn_free+0x80>)
 80174b0:	f240 3223 	movw	r2, #803	@ 0x323
 80174b4:	4915      	ldr	r1, [pc, #84]	@ (801750c <netconn_free+0x8c>)
 80174b6:	4814      	ldr	r0, [pc, #80]	@ (8017508 <netconn_free+0x88>)
 80174b8:	f013 fad0 	bl	802aa5c <iprintf>
              !sys_mbox_valid(&conn->recvmbox));
#if LWIP_TCP
  LWIP_ASSERT("acceptmbox must be deallocated before calling this function",
 80174bc:	687b      	ldr	r3, [r7, #4]
 80174be:	3314      	adds	r3, #20
 80174c0:	4618      	mov	r0, r3
 80174c2:	f00f ff2b 	bl	802731c <sys_mbox_valid>
 80174c6:	4603      	mov	r3, r0
 80174c8:	2b00      	cmp	r3, #0
 80174ca:	d006      	beq.n	80174da <netconn_free+0x5a>
 80174cc:	4b0c      	ldr	r3, [pc, #48]	@ (8017500 <netconn_free+0x80>)
 80174ce:	f240 3226 	movw	r2, #806	@ 0x326
 80174d2:	490f      	ldr	r1, [pc, #60]	@ (8017510 <netconn_free+0x90>)
 80174d4:	480c      	ldr	r0, [pc, #48]	@ (8017508 <netconn_free+0x88>)
 80174d6:	f013 fac1 	bl	802aa5c <iprintf>
              !sys_mbox_valid(&conn->acceptmbox));
#endif /* LWIP_TCP */

#if !LWIP_NETCONN_SEM_PER_THREAD
  sys_sem_free(&conn->op_completed);
 80174da:	687b      	ldr	r3, [r7, #4]
 80174dc:	330c      	adds	r3, #12
 80174de:	4618      	mov	r0, r3
 80174e0:	f00f ff9d 	bl	802741e <sys_sem_free>
  sys_sem_set_invalid(&conn->op_completed);
 80174e4:	687b      	ldr	r3, [r7, #4]
 80174e6:	330c      	adds	r3, #12
 80174e8:	4618      	mov	r0, r3
 80174ea:	f00f ffb6 	bl	802745a <sys_sem_set_invalid>
#endif

  memp_free(MEMP_NETCONN, conn);
 80174ee:	6879      	ldr	r1, [r7, #4]
 80174f0:	2007      	movs	r0, #7
 80174f2:	f003 f94d 	bl	801a790 <memp_free>
}
 80174f6:	bf00      	nop
 80174f8:	3708      	adds	r7, #8
 80174fa:	46bd      	mov	sp, r7
 80174fc:	bd80      	pop	{r7, pc}
 80174fe:	bf00      	nop
 8017500:	0802e154 	.word	0x0802e154
 8017504:	0802e380 	.word	0x0802e380
 8017508:	0802e198 	.word	0x0802e198
 801750c:	0802e3b0 	.word	0x0802e3b0
 8017510:	0802e3ec 	.word	0x0802e3ec

08017514 <netconn_drain>:
 * @bytes_drained bytes drained from recvmbox
 * @accepts_drained pending connections drained from acceptmbox
 */
static void
netconn_drain(struct netconn *conn)
{
 8017514:	b580      	push	{r7, lr}
 8017516:	b086      	sub	sp, #24
 8017518:	af00      	add	r7, sp, #0
 801751a:	6078      	str	r0, [r7, #4]
#if LWIP_NETCONN_FULLDUPLEX
  LWIP_ASSERT("netconn marked closed", conn->flags & NETCONN_FLAG_MBOXINVALID);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  /* Delete and drain the recvmbox. */
  if (sys_mbox_valid(&conn->recvmbox)) {
 801751c:	687b      	ldr	r3, [r7, #4]
 801751e:	3310      	adds	r3, #16
 8017520:	4618      	mov	r0, r3
 8017522:	f00f fefb 	bl	802731c <sys_mbox_valid>
 8017526:	4603      	mov	r3, r0
 8017528:	2b00      	cmp	r3, #0
 801752a:	d02f      	beq.n	801758c <netconn_drain+0x78>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 801752c:	e018      	b.n	8017560 <netconn_drain+0x4c>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
#if LWIP_TCP
        if (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) {
 801752e:	687b      	ldr	r3, [r7, #4]
 8017530:	781b      	ldrb	r3, [r3, #0]
 8017532:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017536:	2b10      	cmp	r3, #16
 8017538:	d10e      	bne.n	8017558 <netconn_drain+0x44>
          err_t err;
          if (!lwip_netconn_is_err_msg(mem, &err)) {
 801753a:	693b      	ldr	r3, [r7, #16]
 801753c:	f107 020f 	add.w	r2, r7, #15
 8017540:	4611      	mov	r1, r2
 8017542:	4618      	mov	r0, r3
 8017544:	f7ff fb78 	bl	8016c38 <lwip_netconn_is_err_msg>
 8017548:	4603      	mov	r3, r0
 801754a:	2b00      	cmp	r3, #0
 801754c:	d108      	bne.n	8017560 <netconn_drain+0x4c>
            pbuf_free((struct pbuf *)mem);
 801754e:	693b      	ldr	r3, [r7, #16]
 8017550:	4618      	mov	r0, r3
 8017552:	f004 f80b 	bl	801b56c <pbuf_free>
 8017556:	e003      	b.n	8017560 <netconn_drain+0x4c>
          }
        } else
#endif /* LWIP_TCP */
        {
          netbuf_delete((struct netbuf *)mem);
 8017558:	693b      	ldr	r3, [r7, #16]
 801755a:	4618      	mov	r0, r3
 801755c:	f001 f81c 	bl	8018598 <netbuf_delete>
    while (sys_mbox_tryfetch(&conn->recvmbox, &mem) != SYS_MBOX_EMPTY) {
 8017560:	687b      	ldr	r3, [r7, #4]
 8017562:	3310      	adds	r3, #16
 8017564:	f107 0210 	add.w	r2, r7, #16
 8017568:	4611      	mov	r1, r2
 801756a:	4618      	mov	r0, r3
 801756c:	f00f febf 	bl	80272ee <sys_arch_mbox_tryfetch>
 8017570:	4603      	mov	r3, r0
 8017572:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8017576:	d1da      	bne.n	801752e <netconn_drain+0x1a>
        }
      }
    }
    sys_mbox_free(&conn->recvmbox);
 8017578:	687b      	ldr	r3, [r7, #4]
 801757a:	3310      	adds	r3, #16
 801757c:	4618      	mov	r0, r3
 801757e:	f00f fe59 	bl	8027234 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->recvmbox);
 8017582:	687b      	ldr	r3, [r7, #4]
 8017584:	3310      	adds	r3, #16
 8017586:	4618      	mov	r0, r3
 8017588:	f00f fed9 	bl	802733e <sys_mbox_set_invalid>
  }

  /* Delete and drain the acceptmbox. */
#if LWIP_TCP
  if (sys_mbox_valid(&conn->acceptmbox)) {
 801758c:	687b      	ldr	r3, [r7, #4]
 801758e:	3314      	adds	r3, #20
 8017590:	4618      	mov	r0, r3
 8017592:	f00f fec3 	bl	802731c <sys_mbox_valid>
 8017596:	4603      	mov	r3, r0
 8017598:	2b00      	cmp	r3, #0
 801759a:	d034      	beq.n	8017606 <netconn_drain+0xf2>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 801759c:	e01d      	b.n	80175da <netconn_drain+0xc6>
#if LWIP_NETCONN_FULLDUPLEX
      if (!lwip_netconn_is_deallocated_msg(mem))
#endif /* LWIP_NETCONN_FULLDUPLEX */
      {
        err_t err;
        if (!lwip_netconn_is_err_msg(mem, &err)) {
 801759e:	693b      	ldr	r3, [r7, #16]
 80175a0:	f107 020e 	add.w	r2, r7, #14
 80175a4:	4611      	mov	r1, r2
 80175a6:	4618      	mov	r0, r3
 80175a8:	f7ff fb46 	bl	8016c38 <lwip_netconn_is_err_msg>
 80175ac:	4603      	mov	r3, r0
 80175ae:	2b00      	cmp	r3, #0
 80175b0:	d113      	bne.n	80175da <netconn_drain+0xc6>
          struct netconn *newconn = (struct netconn *)mem;
 80175b2:	693b      	ldr	r3, [r7, #16]
 80175b4:	617b      	str	r3, [r7, #20]
          /* Only tcp pcbs have an acceptmbox, so no need to check conn->type */
          /* pcb might be set to NULL already by err_tcp() */
          /* drain recvmbox */
          netconn_drain(newconn);
 80175b6:	6978      	ldr	r0, [r7, #20]
 80175b8:	f7ff ffac 	bl	8017514 <netconn_drain>
          if (newconn->pcb.tcp != NULL) {
 80175bc:	697b      	ldr	r3, [r7, #20]
 80175be:	685b      	ldr	r3, [r3, #4]
 80175c0:	2b00      	cmp	r3, #0
 80175c2:	d007      	beq.n	80175d4 <netconn_drain+0xc0>
            tcp_abort(newconn->pcb.tcp);
 80175c4:	697b      	ldr	r3, [r7, #20]
 80175c6:	685b      	ldr	r3, [r3, #4]
 80175c8:	4618      	mov	r0, r3
 80175ca:	f004 fdd5 	bl	801c178 <tcp_abort>
            newconn->pcb.tcp = NULL;
 80175ce:	697b      	ldr	r3, [r7, #20]
 80175d0:	2200      	movs	r2, #0
 80175d2:	605a      	str	r2, [r3, #4]
          }
          netconn_free(newconn);
 80175d4:	6978      	ldr	r0, [r7, #20]
 80175d6:	f7ff ff53 	bl	8017480 <netconn_free>
    while (sys_mbox_tryfetch(&conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) {
 80175da:	687b      	ldr	r3, [r7, #4]
 80175dc:	3314      	adds	r3, #20
 80175de:	f107 0210 	add.w	r2, r7, #16
 80175e2:	4611      	mov	r1, r2
 80175e4:	4618      	mov	r0, r3
 80175e6:	f00f fe82 	bl	80272ee <sys_arch_mbox_tryfetch>
 80175ea:	4603      	mov	r3, r0
 80175ec:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80175f0:	d1d5      	bne.n	801759e <netconn_drain+0x8a>
        }
      }
    }
    sys_mbox_free(&conn->acceptmbox);
 80175f2:	687b      	ldr	r3, [r7, #4]
 80175f4:	3314      	adds	r3, #20
 80175f6:	4618      	mov	r0, r3
 80175f8:	f00f fe1c 	bl	8027234 <sys_mbox_free>
    sys_mbox_set_invalid(&conn->acceptmbox);
 80175fc:	687b      	ldr	r3, [r7, #4]
 80175fe:	3314      	adds	r3, #20
 8017600:	4618      	mov	r0, r3
 8017602:	f00f fe9c 	bl	802733e <sys_mbox_set_invalid>
  }
#endif /* LWIP_TCP */
}
 8017606:	bf00      	nop
 8017608:	3718      	adds	r7, #24
 801760a:	46bd      	mov	sp, r7
 801760c:	bd80      	pop	{r7, pc}
	...

08017610 <lwip_netconn_do_close_internal>:
 *
 * @param conn the TCP netconn to close
 */
static err_t
lwip_netconn_do_close_internal(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 8017610:	b580      	push	{r7, lr}
 8017612:	b086      	sub	sp, #24
 8017614:	af00      	add	r7, sp, #0
 8017616:	6078      	str	r0, [r7, #4]
 8017618:	460b      	mov	r3, r1
 801761a:	70fb      	strb	r3, [r7, #3]
  err_t err;
  u8_t shut, shut_rx, shut_tx, shut_close;
  u8_t close_finished = 0;
 801761c:	2300      	movs	r3, #0
 801761e:	757b      	strb	r3, [r7, #21]
  struct tcp_pcb *tpcb;
#if LWIP_SO_LINGER
  u8_t linger_wait_required = 0;
#endif /* LWIP_SO_LINGER */

  LWIP_ASSERT("invalid conn", (conn != NULL));
 8017620:	687b      	ldr	r3, [r7, #4]
 8017622:	2b00      	cmp	r3, #0
 8017624:	d106      	bne.n	8017634 <lwip_netconn_do_close_internal+0x24>
 8017626:	4b87      	ldr	r3, [pc, #540]	@ (8017844 <lwip_netconn_do_close_internal+0x234>)
 8017628:	f240 32a2 	movw	r2, #930	@ 0x3a2
 801762c:	4986      	ldr	r1, [pc, #536]	@ (8017848 <lwip_netconn_do_close_internal+0x238>)
 801762e:	4887      	ldr	r0, [pc, #540]	@ (801784c <lwip_netconn_do_close_internal+0x23c>)
 8017630:	f013 fa14 	bl	802aa5c <iprintf>
  LWIP_ASSERT("this is for tcp netconns only", (NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP));
 8017634:	687b      	ldr	r3, [r7, #4]
 8017636:	781b      	ldrb	r3, [r3, #0]
 8017638:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801763c:	2b10      	cmp	r3, #16
 801763e:	d006      	beq.n	801764e <lwip_netconn_do_close_internal+0x3e>
 8017640:	4b80      	ldr	r3, [pc, #512]	@ (8017844 <lwip_netconn_do_close_internal+0x234>)
 8017642:	f240 32a3 	movw	r2, #931	@ 0x3a3
 8017646:	4982      	ldr	r1, [pc, #520]	@ (8017850 <lwip_netconn_do_close_internal+0x240>)
 8017648:	4880      	ldr	r0, [pc, #512]	@ (801784c <lwip_netconn_do_close_internal+0x23c>)
 801764a:	f013 fa07 	bl	802aa5c <iprintf>
  LWIP_ASSERT("conn must be in state NETCONN_CLOSE", (conn->state == NETCONN_CLOSE));
 801764e:	687b      	ldr	r3, [r7, #4]
 8017650:	785b      	ldrb	r3, [r3, #1]
 8017652:	2b04      	cmp	r3, #4
 8017654:	d006      	beq.n	8017664 <lwip_netconn_do_close_internal+0x54>
 8017656:	4b7b      	ldr	r3, [pc, #492]	@ (8017844 <lwip_netconn_do_close_internal+0x234>)
 8017658:	f44f 7269 	mov.w	r2, #932	@ 0x3a4
 801765c:	497d      	ldr	r1, [pc, #500]	@ (8017854 <lwip_netconn_do_close_internal+0x244>)
 801765e:	487b      	ldr	r0, [pc, #492]	@ (801784c <lwip_netconn_do_close_internal+0x23c>)
 8017660:	f013 f9fc 	bl	802aa5c <iprintf>
  LWIP_ASSERT("pcb already closed", (conn->pcb.tcp != NULL));
 8017664:	687b      	ldr	r3, [r7, #4]
 8017666:	685b      	ldr	r3, [r3, #4]
 8017668:	2b00      	cmp	r3, #0
 801766a:	d106      	bne.n	801767a <lwip_netconn_do_close_internal+0x6a>
 801766c:	4b75      	ldr	r3, [pc, #468]	@ (8017844 <lwip_netconn_do_close_internal+0x234>)
 801766e:	f240 32a5 	movw	r2, #933	@ 0x3a5
 8017672:	4979      	ldr	r1, [pc, #484]	@ (8017858 <lwip_netconn_do_close_internal+0x248>)
 8017674:	4875      	ldr	r0, [pc, #468]	@ (801784c <lwip_netconn_do_close_internal+0x23c>)
 8017676:	f013 f9f1 	bl	802aa5c <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 801767a:	687b      	ldr	r3, [r7, #4]
 801767c:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801767e:	2b00      	cmp	r3, #0
 8017680:	d106      	bne.n	8017690 <lwip_netconn_do_close_internal+0x80>
 8017682:	4b70      	ldr	r3, [pc, #448]	@ (8017844 <lwip_netconn_do_close_internal+0x234>)
 8017684:	f240 32a6 	movw	r2, #934	@ 0x3a6
 8017688:	4974      	ldr	r1, [pc, #464]	@ (801785c <lwip_netconn_do_close_internal+0x24c>)
 801768a:	4870      	ldr	r0, [pc, #448]	@ (801784c <lwip_netconn_do_close_internal+0x23c>)
 801768c:	f013 f9e6 	bl	802aa5c <iprintf>

  tpcb = conn->pcb.tcp;
 8017690:	687b      	ldr	r3, [r7, #4]
 8017692:	685b      	ldr	r3, [r3, #4]
 8017694:	613b      	str	r3, [r7, #16]
  shut = conn->current_msg->msg.sd.shut;
 8017696:	687b      	ldr	r3, [r7, #4]
 8017698:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801769a:	7a1b      	ldrb	r3, [r3, #8]
 801769c:	73fb      	strb	r3, [r7, #15]
  shut_rx = shut & NETCONN_SHUT_RD;
 801769e:	7bfb      	ldrb	r3, [r7, #15]
 80176a0:	f003 0301 	and.w	r3, r3, #1
 80176a4:	73bb      	strb	r3, [r7, #14]
  shut_tx = shut & NETCONN_SHUT_WR;
 80176a6:	7bfb      	ldrb	r3, [r7, #15]
 80176a8:	f003 0302 	and.w	r3, r3, #2
 80176ac:	737b      	strb	r3, [r7, #13]
  /* shutting down both ends is the same as closing
     (also if RD or WR side was shut down before already) */
  if (shut == NETCONN_SHUT_RDWR) {
 80176ae:	7bfb      	ldrb	r3, [r7, #15]
 80176b0:	2b03      	cmp	r3, #3
 80176b2:	d102      	bne.n	80176ba <lwip_netconn_do_close_internal+0xaa>
    shut_close = 1;
 80176b4:	2301      	movs	r3, #1
 80176b6:	75bb      	strb	r3, [r7, #22]
 80176b8:	e01f      	b.n	80176fa <lwip_netconn_do_close_internal+0xea>
  } else if (shut_rx &&
 80176ba:	7bbb      	ldrb	r3, [r7, #14]
 80176bc:	2b00      	cmp	r3, #0
 80176be:	d00e      	beq.n	80176de <lwip_netconn_do_close_internal+0xce>
             ((tpcb->state == FIN_WAIT_1) ||
 80176c0:	693b      	ldr	r3, [r7, #16]
 80176c2:	7d1b      	ldrb	r3, [r3, #20]
  } else if (shut_rx &&
 80176c4:	2b05      	cmp	r3, #5
 80176c6:	d007      	beq.n	80176d8 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == FIN_WAIT_2) ||
 80176c8:	693b      	ldr	r3, [r7, #16]
 80176ca:	7d1b      	ldrb	r3, [r3, #20]
             ((tpcb->state == FIN_WAIT_1) ||
 80176cc:	2b06      	cmp	r3, #6
 80176ce:	d003      	beq.n	80176d8 <lwip_netconn_do_close_internal+0xc8>
              (tpcb->state == CLOSING))) {
 80176d0:	693b      	ldr	r3, [r7, #16]
 80176d2:	7d1b      	ldrb	r3, [r3, #20]
              (tpcb->state == FIN_WAIT_2) ||
 80176d4:	2b08      	cmp	r3, #8
 80176d6:	d102      	bne.n	80176de <lwip_netconn_do_close_internal+0xce>
    shut_close = 1;
 80176d8:	2301      	movs	r3, #1
 80176da:	75bb      	strb	r3, [r7, #22]
 80176dc:	e00d      	b.n	80176fa <lwip_netconn_do_close_internal+0xea>
  } else if (shut_tx && ((tpcb->flags & TF_RXCLOSED) != 0)) {
 80176de:	7b7b      	ldrb	r3, [r7, #13]
 80176e0:	2b00      	cmp	r3, #0
 80176e2:	d008      	beq.n	80176f6 <lwip_netconn_do_close_internal+0xe6>
 80176e4:	693b      	ldr	r3, [r7, #16]
 80176e6:	8b5b      	ldrh	r3, [r3, #26]
 80176e8:	f003 0310 	and.w	r3, r3, #16
 80176ec:	2b00      	cmp	r3, #0
 80176ee:	d002      	beq.n	80176f6 <lwip_netconn_do_close_internal+0xe6>
    shut_close = 1;
 80176f0:	2301      	movs	r3, #1
 80176f2:	75bb      	strb	r3, [r7, #22]
 80176f4:	e001      	b.n	80176fa <lwip_netconn_do_close_internal+0xea>
  } else {
    shut_close = 0;
 80176f6:	2300      	movs	r3, #0
 80176f8:	75bb      	strb	r3, [r7, #22]
  }

  /* Set back some callback pointers */
  if (shut_close) {
 80176fa:	7dbb      	ldrb	r3, [r7, #22]
 80176fc:	2b00      	cmp	r3, #0
 80176fe:	d003      	beq.n	8017708 <lwip_netconn_do_close_internal+0xf8>
    tcp_arg(tpcb, NULL);
 8017700:	2100      	movs	r1, #0
 8017702:	6938      	ldr	r0, [r7, #16]
 8017704:	f005 fd88 	bl	801d218 <tcp_arg>
  }
  if (tpcb->state == LISTEN) {
 8017708:	693b      	ldr	r3, [r7, #16]
 801770a:	7d1b      	ldrb	r3, [r3, #20]
 801770c:	2b01      	cmp	r3, #1
 801770e:	d104      	bne.n	801771a <lwip_netconn_do_close_internal+0x10a>
    tcp_accept(tpcb, NULL);
 8017710:	2100      	movs	r1, #0
 8017712:	6938      	ldr	r0, [r7, #16]
 8017714:	f005 fdfe 	bl	801d314 <tcp_accept>
 8017718:	e01d      	b.n	8017756 <lwip_netconn_do_close_internal+0x146>
  } else {
    /* some callbacks have to be reset if tcp_close is not successful */
    if (shut_rx) {
 801771a:	7bbb      	ldrb	r3, [r7, #14]
 801771c:	2b00      	cmp	r3, #0
 801771e:	d007      	beq.n	8017730 <lwip_netconn_do_close_internal+0x120>
      tcp_recv(tpcb, NULL);
 8017720:	2100      	movs	r1, #0
 8017722:	6938      	ldr	r0, [r7, #16]
 8017724:	f005 fd8a 	bl	801d23c <tcp_recv>
      tcp_accept(tpcb, NULL);
 8017728:	2100      	movs	r1, #0
 801772a:	6938      	ldr	r0, [r7, #16]
 801772c:	f005 fdf2 	bl	801d314 <tcp_accept>
    }
    if (shut_tx) {
 8017730:	7b7b      	ldrb	r3, [r7, #13]
 8017732:	2b00      	cmp	r3, #0
 8017734:	d003      	beq.n	801773e <lwip_netconn_do_close_internal+0x12e>
      tcp_sent(tpcb, NULL);
 8017736:	2100      	movs	r1, #0
 8017738:	6938      	ldr	r0, [r7, #16]
 801773a:	f005 fda3 	bl	801d284 <tcp_sent>
    }
    if (shut_close) {
 801773e:	7dbb      	ldrb	r3, [r7, #22]
 8017740:	2b00      	cmp	r3, #0
 8017742:	d008      	beq.n	8017756 <lwip_netconn_do_close_internal+0x146>
      tcp_poll(tpcb, NULL, 0);
 8017744:	2200      	movs	r2, #0
 8017746:	2100      	movs	r1, #0
 8017748:	6938      	ldr	r0, [r7, #16]
 801774a:	f005 fdfb 	bl	801d344 <tcp_poll>
      tcp_err(tpcb, NULL);
 801774e:	2100      	movs	r1, #0
 8017750:	6938      	ldr	r0, [r7, #16]
 8017752:	f005 fdbb 	bl	801d2cc <tcp_err>
    }
  }
  /* Try to close the connection */
  if (shut_close) {
 8017756:	7dbb      	ldrb	r3, [r7, #22]
 8017758:	2b00      	cmp	r3, #0
 801775a:	d005      	beq.n	8017768 <lwip_netconn_do_close_internal+0x158>
      }
    }
    if ((err == ERR_OK) && (tpcb != NULL))
#endif /* LWIP_SO_LINGER */
    {
      err = tcp_close(tpcb);
 801775c:	6938      	ldr	r0, [r7, #16]
 801775e:	f004 fbbf 	bl	801bee0 <tcp_close>
 8017762:	4603      	mov	r3, r0
 8017764:	75fb      	strb	r3, [r7, #23]
 8017766:	e007      	b.n	8017778 <lwip_netconn_do_close_internal+0x168>
    }
  } else {
    err = tcp_shutdown(tpcb, shut_rx, shut_tx);
 8017768:	7bbb      	ldrb	r3, [r7, #14]
 801776a:	7b7a      	ldrb	r2, [r7, #13]
 801776c:	4619      	mov	r1, r3
 801776e:	6938      	ldr	r0, [r7, #16]
 8017770:	f004 fbe4 	bl	801bf3c <tcp_shutdown>
 8017774:	4603      	mov	r3, r0
 8017776:	75fb      	strb	r3, [r7, #23]
  }
  if (err == ERR_OK) {
 8017778:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801777c:	2b00      	cmp	r3, #0
 801777e:	d102      	bne.n	8017786 <lwip_netconn_do_close_internal+0x176>
    close_finished = 1;
 8017780:	2301      	movs	r3, #1
 8017782:	757b      	strb	r3, [r7, #21]
 8017784:	e016      	b.n	80177b4 <lwip_netconn_do_close_internal+0x1a4>
      close_finished = 0;
      err = ERR_INPROGRESS;
    }
#endif /* LWIP_SO_LINGER */
  } else {
    if (err == ERR_MEM) {
 8017786:	f997 3017 	ldrsb.w	r3, [r7, #23]
 801778a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801778e:	d10f      	bne.n	80177b0 <lwip_netconn_do_close_internal+0x1a0>
        close_timeout = conn->linger * 1000U;
      }
#endif
      if ((s32_t)(sys_now() - conn->current_msg->msg.sd.time_started) >= close_timeout) {
#else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
      if (conn->current_msg->msg.sd.polls_left == 0) {
 8017790:	687b      	ldr	r3, [r7, #4]
 8017792:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017794:	7a5b      	ldrb	r3, [r3, #9]
 8017796:	2b00      	cmp	r3, #0
 8017798:	d10c      	bne.n	80177b4 <lwip_netconn_do_close_internal+0x1a4>
#endif /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
        close_finished = 1;
 801779a:	2301      	movs	r3, #1
 801779c:	757b      	strb	r3, [r7, #21]
        if (shut_close) {
 801779e:	7dbb      	ldrb	r3, [r7, #22]
 80177a0:	2b00      	cmp	r3, #0
 80177a2:	d007      	beq.n	80177b4 <lwip_netconn_do_close_internal+0x1a4>
          /* in this case, we want to RST the connection */
          tcp_abort(tpcb);
 80177a4:	6938      	ldr	r0, [r7, #16]
 80177a6:	f004 fce7 	bl	801c178 <tcp_abort>
          err = ERR_OK;
 80177aa:	2300      	movs	r3, #0
 80177ac:	75fb      	strb	r3, [r7, #23]
 80177ae:	e001      	b.n	80177b4 <lwip_netconn_do_close_internal+0x1a4>
        }
      }
    } else {
      /* Closing failed for a non-memory error: give up */
      close_finished = 1;
 80177b0:	2301      	movs	r3, #1
 80177b2:	757b      	strb	r3, [r7, #21]
    }
  }
  if (close_finished) {
 80177b4:	7d7b      	ldrb	r3, [r7, #21]
 80177b6:	2b00      	cmp	r3, #0
 80177b8:	d052      	beq.n	8017860 <lwip_netconn_do_close_internal+0x250>
    /* Closing done (succeeded, non-memory error, nonblocking error or timeout) */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 80177ba:	687b      	ldr	r3, [r7, #4]
 80177bc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80177be:	681b      	ldr	r3, [r3, #0]
 80177c0:	330c      	adds	r3, #12
 80177c2:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 80177c4:	687b      	ldr	r3, [r7, #4]
 80177c6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80177c8:	7dfa      	ldrb	r2, [r7, #23]
 80177ca:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 80177cc:	687b      	ldr	r3, [r7, #4]
 80177ce:	2200      	movs	r2, #0
 80177d0:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 80177d2:	687b      	ldr	r3, [r7, #4]
 80177d4:	2200      	movs	r2, #0
 80177d6:	705a      	strb	r2, [r3, #1]
    if (err == ERR_OK) {
 80177d8:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80177dc:	2b00      	cmp	r3, #0
 80177de:	d129      	bne.n	8017834 <lwip_netconn_do_close_internal+0x224>
      if (shut_close) {
 80177e0:	7dbb      	ldrb	r3, [r7, #22]
 80177e2:	2b00      	cmp	r3, #0
 80177e4:	d00c      	beq.n	8017800 <lwip_netconn_do_close_internal+0x1f0>
        /* Set back some callback pointers as conn is going away */
        conn->pcb.tcp = NULL;
 80177e6:	687b      	ldr	r3, [r7, #4]
 80177e8:	2200      	movs	r2, #0
 80177ea:	605a      	str	r2, [r3, #4]
        /* Trigger select() in socket layer. Make sure everybody notices activity
         on the connection, error first! */
        API_EVENT(conn, NETCONN_EVT_ERROR, 0);
 80177ec:	687b      	ldr	r3, [r7, #4]
 80177ee:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80177f0:	2b00      	cmp	r3, #0
 80177f2:	d005      	beq.n	8017800 <lwip_netconn_do_close_internal+0x1f0>
 80177f4:	687b      	ldr	r3, [r7, #4]
 80177f6:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 80177f8:	2200      	movs	r2, #0
 80177fa:	2104      	movs	r1, #4
 80177fc:	6878      	ldr	r0, [r7, #4]
 80177fe:	4798      	blx	r3
      }
      if (shut_rx) {
 8017800:	7bbb      	ldrb	r3, [r7, #14]
 8017802:	2b00      	cmp	r3, #0
 8017804:	d009      	beq.n	801781a <lwip_netconn_do_close_internal+0x20a>
        API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0);
 8017806:	687b      	ldr	r3, [r7, #4]
 8017808:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801780a:	2b00      	cmp	r3, #0
 801780c:	d005      	beq.n	801781a <lwip_netconn_do_close_internal+0x20a>
 801780e:	687b      	ldr	r3, [r7, #4]
 8017810:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017812:	2200      	movs	r2, #0
 8017814:	2100      	movs	r1, #0
 8017816:	6878      	ldr	r0, [r7, #4]
 8017818:	4798      	blx	r3
      }
      if (shut_tx) {
 801781a:	7b7b      	ldrb	r3, [r7, #13]
 801781c:	2b00      	cmp	r3, #0
 801781e:	d009      	beq.n	8017834 <lwip_netconn_do_close_internal+0x224>
        API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8017820:	687b      	ldr	r3, [r7, #4]
 8017822:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017824:	2b00      	cmp	r3, #0
 8017826:	d005      	beq.n	8017834 <lwip_netconn_do_close_internal+0x224>
 8017828:	687b      	ldr	r3, [r7, #4]
 801782a:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801782c:	2200      	movs	r2, #0
 801782e:	2102      	movs	r1, #2
 8017830:	6878      	ldr	r0, [r7, #4]
 8017832:	4798      	blx	r3
      }
    }
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 8017834:	78fb      	ldrb	r3, [r7, #3]
 8017836:	2b00      	cmp	r3, #0
 8017838:	d002      	beq.n	8017840 <lwip_netconn_do_close_internal+0x230>
#endif
    {
      /* wake up the application task */
      sys_sem_signal(op_completed_sem);
 801783a:	68b8      	ldr	r0, [r7, #8]
 801783c:	f00f fde2 	bl	8027404 <sys_sem_signal>
    }
    return ERR_OK;
 8017840:	2300      	movs	r3, #0
 8017842:	e03c      	b.n	80178be <lwip_netconn_do_close_internal+0x2ae>
 8017844:	0802e154 	.word	0x0802e154
 8017848:	0802e428 	.word	0x0802e428
 801784c:	0802e198 	.word	0x0802e198
 8017850:	0802e438 	.word	0x0802e438
 8017854:	0802e458 	.word	0x0802e458
 8017858:	0802e47c 	.word	0x0802e47c
 801785c:	0802e2bc 	.word	0x0802e2bc
  }
  if (!close_finished) {
 8017860:	7d7b      	ldrb	r3, [r7, #21]
 8017862:	2b00      	cmp	r3, #0
 8017864:	d11e      	bne.n	80178a4 <lwip_netconn_do_close_internal+0x294>
    /* Closing failed and we want to wait: restore some of the callbacks */
    /* Closing of listen pcb will never fail! */
    LWIP_ASSERT("Closing a listen pcb may not fail!", (tpcb->state != LISTEN));
 8017866:	693b      	ldr	r3, [r7, #16]
 8017868:	7d1b      	ldrb	r3, [r3, #20]
 801786a:	2b01      	cmp	r3, #1
 801786c:	d106      	bne.n	801787c <lwip_netconn_do_close_internal+0x26c>
 801786e:	4b16      	ldr	r3, [pc, #88]	@ (80178c8 <lwip_netconn_do_close_internal+0x2b8>)
 8017870:	f240 4241 	movw	r2, #1089	@ 0x441
 8017874:	4915      	ldr	r1, [pc, #84]	@ (80178cc <lwip_netconn_do_close_internal+0x2bc>)
 8017876:	4816      	ldr	r0, [pc, #88]	@ (80178d0 <lwip_netconn_do_close_internal+0x2c0>)
 8017878:	f013 f8f0 	bl	802aa5c <iprintf>
    if (shut_tx) {
 801787c:	7b7b      	ldrb	r3, [r7, #13]
 801787e:	2b00      	cmp	r3, #0
 8017880:	d003      	beq.n	801788a <lwip_netconn_do_close_internal+0x27a>
      tcp_sent(tpcb, sent_tcp);
 8017882:	4914      	ldr	r1, [pc, #80]	@ (80178d4 <lwip_netconn_do_close_internal+0x2c4>)
 8017884:	6938      	ldr	r0, [r7, #16]
 8017886:	f005 fcfd 	bl	801d284 <tcp_sent>
    }
    /* when waiting for close, set up poll interval to 500ms */
    tcp_poll(tpcb, poll_tcp, 1);
 801788a:	2201      	movs	r2, #1
 801788c:	4912      	ldr	r1, [pc, #72]	@ (80178d8 <lwip_netconn_do_close_internal+0x2c8>)
 801788e:	6938      	ldr	r0, [r7, #16]
 8017890:	f005 fd58 	bl	801d344 <tcp_poll>
    tcp_err(tpcb, err_tcp);
 8017894:	4911      	ldr	r1, [pc, #68]	@ (80178dc <lwip_netconn_do_close_internal+0x2cc>)
 8017896:	6938      	ldr	r0, [r7, #16]
 8017898:	f005 fd18 	bl	801d2cc <tcp_err>
    tcp_arg(tpcb, conn);
 801789c:	6879      	ldr	r1, [r7, #4]
 801789e:	6938      	ldr	r0, [r7, #16]
 80178a0:	f005 fcba 	bl	801d218 <tcp_arg>
    /* don't restore recv callback: we don't want to receive any more data */
  }
  /* If closing didn't succeed, we get called again either
     from poll_tcp or from sent_tcp */
  LWIP_ASSERT("err != ERR_OK", err != ERR_OK);
 80178a4:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80178a8:	2b00      	cmp	r3, #0
 80178aa:	d106      	bne.n	80178ba <lwip_netconn_do_close_internal+0x2aa>
 80178ac:	4b06      	ldr	r3, [pc, #24]	@ (80178c8 <lwip_netconn_do_close_internal+0x2b8>)
 80178ae:	f240 424d 	movw	r2, #1101	@ 0x44d
 80178b2:	490b      	ldr	r1, [pc, #44]	@ (80178e0 <lwip_netconn_do_close_internal+0x2d0>)
 80178b4:	4806      	ldr	r0, [pc, #24]	@ (80178d0 <lwip_netconn_do_close_internal+0x2c0>)
 80178b6:	f013 f8d1 	bl	802aa5c <iprintf>
  return err;
 80178ba:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 80178be:	4618      	mov	r0, r3
 80178c0:	3718      	adds	r7, #24
 80178c2:	46bd      	mov	sp, r7
 80178c4:	bd80      	pop	{r7, pc}
 80178c6:	bf00      	nop
 80178c8:	0802e154 	.word	0x0802e154
 80178cc:	0802e490 	.word	0x0802e490
 80178d0:	0802e198 	.word	0x0802e198
 80178d4:	08016fd9 	.word	0x08016fd9
 80178d8:	08016f09 	.word	0x08016f09
 80178dc:	08017089 	.word	0x08017089
 80178e0:	0802e4b4 	.word	0x0802e4b4

080178e4 <lwip_netconn_do_delconn>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_delconn(void *m)
{
 80178e4:	b580      	push	{r7, lr}
 80178e6:	b084      	sub	sp, #16
 80178e8:	af00      	add	r7, sp, #0
 80178ea:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 80178ec:	687b      	ldr	r3, [r7, #4]
 80178ee:	60fb      	str	r3, [r7, #12]

  enum netconn_state state = msg->conn->state;
 80178f0:	68fb      	ldr	r3, [r7, #12]
 80178f2:	681b      	ldr	r3, [r3, #0]
 80178f4:	785b      	ldrb	r3, [r3, #1]
 80178f6:	72fb      	strb	r3, [r7, #11]
  LWIP_ASSERT("netconn state error", /* this only happens for TCP netconns */
 80178f8:	7afb      	ldrb	r3, [r7, #11]
 80178fa:	2b00      	cmp	r3, #0
 80178fc:	d00d      	beq.n	801791a <lwip_netconn_do_delconn+0x36>
 80178fe:	68fb      	ldr	r3, [r7, #12]
 8017900:	681b      	ldr	r3, [r3, #0]
 8017902:	781b      	ldrb	r3, [r3, #0]
 8017904:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017908:	2b10      	cmp	r3, #16
 801790a:	d006      	beq.n	801791a <lwip_netconn_do_delconn+0x36>
 801790c:	4b60      	ldr	r3, [pc, #384]	@ (8017a90 <lwip_netconn_do_delconn+0x1ac>)
 801790e:	f240 425e 	movw	r2, #1118	@ 0x45e
 8017912:	4960      	ldr	r1, [pc, #384]	@ (8017a94 <lwip_netconn_do_delconn+0x1b0>)
 8017914:	4860      	ldr	r0, [pc, #384]	@ (8017a98 <lwip_netconn_do_delconn+0x1b4>)
 8017916:	f013 f8a1 	bl	802aa5c <iprintf>
      msg->conn->state = NETCONN_NONE;
      sys_sem_signal(op_completed_sem);
    }
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  if (((state != NETCONN_NONE) &&
 801791a:	7afb      	ldrb	r3, [r7, #11]
 801791c:	2b00      	cmp	r3, #0
 801791e:	d005      	beq.n	801792c <lwip_netconn_do_delconn+0x48>
 8017920:	7afb      	ldrb	r3, [r7, #11]
 8017922:	2b02      	cmp	r3, #2
 8017924:	d002      	beq.n	801792c <lwip_netconn_do_delconn+0x48>
       (state != NETCONN_LISTEN) &&
 8017926:	7afb      	ldrb	r3, [r7, #11]
 8017928:	2b03      	cmp	r3, #3
 801792a:	d10a      	bne.n	8017942 <lwip_netconn_do_delconn+0x5e>
       (state != NETCONN_CONNECT)) ||
 801792c:	7afb      	ldrb	r3, [r7, #11]
 801792e:	2b03      	cmp	r3, #3
 8017930:	d10b      	bne.n	801794a <lwip_netconn_do_delconn+0x66>
      ((state == NETCONN_CONNECT) && !IN_NONBLOCKING_CONNECT(msg->conn))) {
 8017932:	68fb      	ldr	r3, [r7, #12]
 8017934:	681b      	ldr	r3, [r3, #0]
 8017936:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801793a:	f003 0304 	and.w	r3, r3, #4
 801793e:	2b00      	cmp	r3, #0
 8017940:	d103      	bne.n	801794a <lwip_netconn_do_delconn+0x66>
    /* This means either a blocking write or blocking connect is running
       (nonblocking write returns and sets state to NONE) */
    msg->err = ERR_INPROGRESS;
 8017942:	68fb      	ldr	r3, [r7, #12]
 8017944:	22fb      	movs	r2, #251	@ 0xfb
 8017946:	711a      	strb	r2, [r3, #4]
 8017948:	e096      	b.n	8017a78 <lwip_netconn_do_delconn+0x194>
  } else
#endif /* LWIP_NETCONN_FULLDUPLEX */
  {
    LWIP_ASSERT("blocking connect in progress",
 801794a:	7afb      	ldrb	r3, [r7, #11]
 801794c:	2b03      	cmp	r3, #3
 801794e:	d10e      	bne.n	801796e <lwip_netconn_do_delconn+0x8a>
 8017950:	68fb      	ldr	r3, [r7, #12]
 8017952:	681b      	ldr	r3, [r3, #0]
 8017954:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017958:	f003 0304 	and.w	r3, r3, #4
 801795c:	2b00      	cmp	r3, #0
 801795e:	d106      	bne.n	801796e <lwip_netconn_do_delconn+0x8a>
 8017960:	4b4b      	ldr	r3, [pc, #300]	@ (8017a90 <lwip_netconn_do_delconn+0x1ac>)
 8017962:	f240 427a 	movw	r2, #1146	@ 0x47a
 8017966:	494d      	ldr	r1, [pc, #308]	@ (8017a9c <lwip_netconn_do_delconn+0x1b8>)
 8017968:	484b      	ldr	r0, [pc, #300]	@ (8017a98 <lwip_netconn_do_delconn+0x1b4>)
 801796a:	f013 f877 	bl	802aa5c <iprintf>
                (state != NETCONN_CONNECT) || IN_NONBLOCKING_CONNECT(msg->conn));
    msg->err = ERR_OK;
 801796e:	68fb      	ldr	r3, [r7, #12]
 8017970:	2200      	movs	r2, #0
 8017972:	711a      	strb	r2, [r3, #4]
#if LWIP_NETCONN_FULLDUPLEX
    /* Mark mboxes invalid */
    netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
    netconn_drain(msg->conn);
 8017974:	68fb      	ldr	r3, [r7, #12]
 8017976:	681b      	ldr	r3, [r3, #0]
 8017978:	4618      	mov	r0, r3
 801797a:	f7ff fdcb 	bl	8017514 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */

    if (msg->conn->pcb.tcp != NULL) {
 801797e:	68fb      	ldr	r3, [r7, #12]
 8017980:	681b      	ldr	r3, [r3, #0]
 8017982:	685b      	ldr	r3, [r3, #4]
 8017984:	2b00      	cmp	r3, #0
 8017986:	d05d      	beq.n	8017a44 <lwip_netconn_do_delconn+0x160>

      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8017988:	68fb      	ldr	r3, [r7, #12]
 801798a:	681b      	ldr	r3, [r3, #0]
 801798c:	781b      	ldrb	r3, [r3, #0]
 801798e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017992:	2b10      	cmp	r3, #16
 8017994:	d00d      	beq.n	80179b2 <lwip_netconn_do_delconn+0xce>
 8017996:	2b20      	cmp	r3, #32
 8017998:	d14f      	bne.n	8017a3a <lwip_netconn_do_delconn+0x156>
          raw_remove(msg->conn->pcb.raw);
          break;
#endif /* LWIP_RAW */
#if LWIP_UDP
        case NETCONN_UDP:
          msg->conn->pcb.udp->recv_arg = NULL;
 801799a:	68fb      	ldr	r3, [r7, #12]
 801799c:	681b      	ldr	r3, [r3, #0]
 801799e:	685b      	ldr	r3, [r3, #4]
 80179a0:	2200      	movs	r2, #0
 80179a2:	61da      	str	r2, [r3, #28]
          udp_remove(msg->conn->pcb.udp);
 80179a4:	68fb      	ldr	r3, [r7, #12]
 80179a6:	681b      	ldr	r3, [r3, #0]
 80179a8:	685b      	ldr	r3, [r3, #4]
 80179aa:	4618      	mov	r0, r3
 80179ac:	f00a ffc6 	bl	802293c <udp_remove>
          break;
 80179b0:	e044      	b.n	8017a3c <lwip_netconn_do_delconn+0x158>
#endif /* LWIP_UDP */
#if LWIP_TCP
        case NETCONN_TCP:
          LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 80179b2:	68fb      	ldr	r3, [r7, #12]
 80179b4:	681b      	ldr	r3, [r3, #0]
 80179b6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80179b8:	2b00      	cmp	r3, #0
 80179ba:	d006      	beq.n	80179ca <lwip_netconn_do_delconn+0xe6>
 80179bc:	4b34      	ldr	r3, [pc, #208]	@ (8017a90 <lwip_netconn_do_delconn+0x1ac>)
 80179be:	f240 4294 	movw	r2, #1172	@ 0x494
 80179c2:	4937      	ldr	r1, [pc, #220]	@ (8017aa0 <lwip_netconn_do_delconn+0x1bc>)
 80179c4:	4834      	ldr	r0, [pc, #208]	@ (8017a98 <lwip_netconn_do_delconn+0x1b4>)
 80179c6:	f013 f849 	bl	802aa5c <iprintf>
          msg->conn->state = NETCONN_CLOSE;
 80179ca:	68fb      	ldr	r3, [r7, #12]
 80179cc:	681b      	ldr	r3, [r3, #0]
 80179ce:	2204      	movs	r2, #4
 80179d0:	705a      	strb	r2, [r3, #1]
          msg->msg.sd.shut = NETCONN_SHUT_RDWR;
 80179d2:	68fb      	ldr	r3, [r7, #12]
 80179d4:	2203      	movs	r2, #3
 80179d6:	721a      	strb	r2, [r3, #8]
          msg->conn->current_msg = msg;
 80179d8:	68fb      	ldr	r3, [r7, #12]
 80179da:	681b      	ldr	r3, [r3, #0]
 80179dc:	68fa      	ldr	r2, [r7, #12]
 80179de:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
          if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 80179e0:	68fb      	ldr	r3, [r7, #12]
 80179e2:	681b      	ldr	r3, [r3, #0]
 80179e4:	2100      	movs	r1, #0
 80179e6:	4618      	mov	r0, r3
 80179e8:	f7ff fe12 	bl	8017610 <lwip_netconn_do_close_internal>
 80179ec:	4603      	mov	r3, r0
 80179ee:	2b00      	cmp	r3, #0
 80179f0:	d049      	beq.n	8017a86 <lwip_netconn_do_delconn+0x1a2>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 80179f2:	68fb      	ldr	r3, [r7, #12]
 80179f4:	681b      	ldr	r3, [r3, #0]
 80179f6:	785b      	ldrb	r3, [r3, #1]
 80179f8:	2b04      	cmp	r3, #4
 80179fa:	d006      	beq.n	8017a0a <lwip_netconn_do_delconn+0x126>
 80179fc:	4b24      	ldr	r3, [pc, #144]	@ (8017a90 <lwip_netconn_do_delconn+0x1ac>)
 80179fe:	f240 429a 	movw	r2, #1178	@ 0x49a
 8017a02:	4928      	ldr	r1, [pc, #160]	@ (8017aa4 <lwip_netconn_do_delconn+0x1c0>)
 8017a04:	4824      	ldr	r0, [pc, #144]	@ (8017a98 <lwip_netconn_do_delconn+0x1b4>)
 8017a06:	f013 f829 	bl	802aa5c <iprintf>
            UNLOCK_TCPIP_CORE();
 8017a0a:	f7f9 fbed 	bl	80111e8 <sys_unlock_tcpip_core>
            sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8017a0e:	68fb      	ldr	r3, [r7, #12]
 8017a10:	681b      	ldr	r3, [r3, #0]
 8017a12:	330c      	adds	r3, #12
 8017a14:	2100      	movs	r1, #0
 8017a16:	4618      	mov	r0, r3
 8017a18:	f00f fcc3 	bl	80273a2 <sys_arch_sem_wait>
            LOCK_TCPIP_CORE();
 8017a1c:	f7f9 fbd4 	bl	80111c8 <sys_lock_tcpip_core>
            LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 8017a20:	68fb      	ldr	r3, [r7, #12]
 8017a22:	681b      	ldr	r3, [r3, #0]
 8017a24:	785b      	ldrb	r3, [r3, #1]
 8017a26:	2b00      	cmp	r3, #0
 8017a28:	d02d      	beq.n	8017a86 <lwip_netconn_do_delconn+0x1a2>
 8017a2a:	4b19      	ldr	r3, [pc, #100]	@ (8017a90 <lwip_netconn_do_delconn+0x1ac>)
 8017a2c:	f240 429e 	movw	r2, #1182	@ 0x49e
 8017a30:	491c      	ldr	r1, [pc, #112]	@ (8017aa4 <lwip_netconn_do_delconn+0x1c0>)
 8017a32:	4819      	ldr	r0, [pc, #100]	@ (8017a98 <lwip_netconn_do_delconn+0x1b4>)
 8017a34:	f013 f812 	bl	802aa5c <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
          lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
          /* API_EVENT is called inside lwip_netconn_do_close_internal, before releasing
             the application thread, so we can return at this point! */
          return;
 8017a38:	e025      	b.n	8017a86 <lwip_netconn_do_delconn+0x1a2>
#endif /* LWIP_TCP */
        default:
          break;
 8017a3a:	bf00      	nop
      }
      msg->conn->pcb.tcp = NULL;
 8017a3c:	68fb      	ldr	r3, [r7, #12]
 8017a3e:	681b      	ldr	r3, [r3, #0]
 8017a40:	2200      	movs	r2, #0
 8017a42:	605a      	str	r2, [r3, #4]
    }
    /* tcp netconns don't come here! */

    /* @todo: this lets select make the socket readable and writable,
       which is wrong! errfd instead? */
    API_EVENT(msg->conn, NETCONN_EVT_RCVPLUS, 0);
 8017a44:	68fb      	ldr	r3, [r7, #12]
 8017a46:	681b      	ldr	r3, [r3, #0]
 8017a48:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017a4a:	2b00      	cmp	r3, #0
 8017a4c:	d007      	beq.n	8017a5e <lwip_netconn_do_delconn+0x17a>
 8017a4e:	68fb      	ldr	r3, [r7, #12]
 8017a50:	681b      	ldr	r3, [r3, #0]
 8017a52:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017a54:	68fa      	ldr	r2, [r7, #12]
 8017a56:	6810      	ldr	r0, [r2, #0]
 8017a58:	2200      	movs	r2, #0
 8017a5a:	2100      	movs	r1, #0
 8017a5c:	4798      	blx	r3
    API_EVENT(msg->conn, NETCONN_EVT_SENDPLUS, 0);
 8017a5e:	68fb      	ldr	r3, [r7, #12]
 8017a60:	681b      	ldr	r3, [r3, #0]
 8017a62:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017a64:	2b00      	cmp	r3, #0
 8017a66:	d007      	beq.n	8017a78 <lwip_netconn_do_delconn+0x194>
 8017a68:	68fb      	ldr	r3, [r7, #12]
 8017a6a:	681b      	ldr	r3, [r3, #0]
 8017a6c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017a6e:	68fa      	ldr	r2, [r7, #12]
 8017a70:	6810      	ldr	r0, [r2, #0]
 8017a72:	2200      	movs	r2, #0
 8017a74:	2102      	movs	r1, #2
 8017a76:	4798      	blx	r3
  }
  if (sys_sem_valid(LWIP_API_MSG_SEM(msg))) {
 8017a78:	68fb      	ldr	r3, [r7, #12]
 8017a7a:	681b      	ldr	r3, [r3, #0]
 8017a7c:	330c      	adds	r3, #12
 8017a7e:	4618      	mov	r0, r3
 8017a80:	f00f fcda 	bl	8027438 <sys_sem_valid>
 8017a84:	e000      	b.n	8017a88 <lwip_netconn_do_delconn+0x1a4>
          return;
 8017a86:	bf00      	nop
    TCPIP_APIMSG_ACK(msg);
  }
}
 8017a88:	3710      	adds	r7, #16
 8017a8a:	46bd      	mov	sp, r7
 8017a8c:	bd80      	pop	{r7, pc}
 8017a8e:	bf00      	nop
 8017a90:	0802e154 	.word	0x0802e154
 8017a94:	0802e4c4 	.word	0x0802e4c4
 8017a98:	0802e198 	.word	0x0802e198
 8017a9c:	0802e4d8 	.word	0x0802e4d8
 8017aa0:	0802e4f8 	.word	0x0802e4f8
 8017aa4:	0802e514 	.word	0x0802e514

08017aa8 <lwip_netconn_do_connected>:
 *
 * @see tcp.h (struct tcp_pcb.connected) for parameters and return values
 */
static err_t
lwip_netconn_do_connected(void *arg, struct tcp_pcb *pcb, err_t err)
{
 8017aa8:	b580      	push	{r7, lr}
 8017aaa:	b088      	sub	sp, #32
 8017aac:	af00      	add	r7, sp, #0
 8017aae:	60f8      	str	r0, [r7, #12]
 8017ab0:	60b9      	str	r1, [r7, #8]
 8017ab2:	4613      	mov	r3, r2
 8017ab4:	71fb      	strb	r3, [r7, #7]
  struct netconn *conn;
  int was_blocking;
  sys_sem_t *op_completed_sem = NULL;
 8017ab6:	2300      	movs	r3, #0
 8017ab8:	61fb      	str	r3, [r7, #28]

  LWIP_UNUSED_ARG(pcb);

  conn = (struct netconn *)arg;
 8017aba:	68fb      	ldr	r3, [r7, #12]
 8017abc:	61bb      	str	r3, [r7, #24]

  if (conn == NULL) {
 8017abe:	69bb      	ldr	r3, [r7, #24]
 8017ac0:	2b00      	cmp	r3, #0
 8017ac2:	d102      	bne.n	8017aca <lwip_netconn_do_connected+0x22>
    return ERR_VAL;
 8017ac4:	f06f 0305 	mvn.w	r3, #5
 8017ac8:	e074      	b.n	8017bb4 <lwip_netconn_do_connected+0x10c>
  }

  LWIP_ASSERT("conn->state == NETCONN_CONNECT", conn->state == NETCONN_CONNECT);
 8017aca:	69bb      	ldr	r3, [r7, #24]
 8017acc:	785b      	ldrb	r3, [r3, #1]
 8017ace:	2b03      	cmp	r3, #3
 8017ad0:	d006      	beq.n	8017ae0 <lwip_netconn_do_connected+0x38>
 8017ad2:	4b3a      	ldr	r3, [pc, #232]	@ (8017bbc <lwip_netconn_do_connected+0x114>)
 8017ad4:	f240 5223 	movw	r2, #1315	@ 0x523
 8017ad8:	4939      	ldr	r1, [pc, #228]	@ (8017bc0 <lwip_netconn_do_connected+0x118>)
 8017ada:	483a      	ldr	r0, [pc, #232]	@ (8017bc4 <lwip_netconn_do_connected+0x11c>)
 8017adc:	f012 ffbe 	bl	802aa5c <iprintf>
  LWIP_ASSERT("(conn->current_msg != NULL) || conn->in_non_blocking_connect",
 8017ae0:	69bb      	ldr	r3, [r7, #24]
 8017ae2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017ae4:	2b00      	cmp	r3, #0
 8017ae6:	d10d      	bne.n	8017b04 <lwip_netconn_do_connected+0x5c>
 8017ae8:	69bb      	ldr	r3, [r7, #24]
 8017aea:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017aee:	f003 0304 	and.w	r3, r3, #4
 8017af2:	2b00      	cmp	r3, #0
 8017af4:	d106      	bne.n	8017b04 <lwip_netconn_do_connected+0x5c>
 8017af6:	4b31      	ldr	r3, [pc, #196]	@ (8017bbc <lwip_netconn_do_connected+0x114>)
 8017af8:	f240 5224 	movw	r2, #1316	@ 0x524
 8017afc:	4932      	ldr	r1, [pc, #200]	@ (8017bc8 <lwip_netconn_do_connected+0x120>)
 8017afe:	4831      	ldr	r0, [pc, #196]	@ (8017bc4 <lwip_netconn_do_connected+0x11c>)
 8017b00:	f012 ffac 	bl	802aa5c <iprintf>
              (conn->current_msg != NULL) || IN_NONBLOCKING_CONNECT(conn));

  if (conn->current_msg != NULL) {
 8017b04:	69bb      	ldr	r3, [r7, #24]
 8017b06:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017b08:	2b00      	cmp	r3, #0
 8017b0a:	d008      	beq.n	8017b1e <lwip_netconn_do_connected+0x76>
    conn->current_msg->err = err;
 8017b0c:	69bb      	ldr	r3, [r7, #24]
 8017b0e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017b10:	79fa      	ldrb	r2, [r7, #7]
 8017b12:	711a      	strb	r2, [r3, #4]
    op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 8017b14:	69bb      	ldr	r3, [r7, #24]
 8017b16:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017b18:	681b      	ldr	r3, [r3, #0]
 8017b1a:	330c      	adds	r3, #12
 8017b1c:	61fb      	str	r3, [r7, #28]
  }
  if ((NETCONNTYPE_GROUP(conn->type) == NETCONN_TCP) && (err == ERR_OK)) {
 8017b1e:	69bb      	ldr	r3, [r7, #24]
 8017b20:	781b      	ldrb	r3, [r3, #0]
 8017b22:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017b26:	2b10      	cmp	r3, #16
 8017b28:	d106      	bne.n	8017b38 <lwip_netconn_do_connected+0x90>
 8017b2a:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8017b2e:	2b00      	cmp	r3, #0
 8017b30:	d102      	bne.n	8017b38 <lwip_netconn_do_connected+0x90>
    setup_tcp(conn);
 8017b32:	69b8      	ldr	r0, [r7, #24]
 8017b34:	f7ff fb82 	bl	801723c <setup_tcp>
  }
  was_blocking = !IN_NONBLOCKING_CONNECT(conn);
 8017b38:	69bb      	ldr	r3, [r7, #24]
 8017b3a:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017b3e:	f003 0304 	and.w	r3, r3, #4
 8017b42:	2b00      	cmp	r3, #0
 8017b44:	bf0c      	ite	eq
 8017b46:	2301      	moveq	r3, #1
 8017b48:	2300      	movne	r3, #0
 8017b4a:	b2db      	uxtb	r3, r3
 8017b4c:	617b      	str	r3, [r7, #20]
  SET_NONBLOCKING_CONNECT(conn, 0);
 8017b4e:	69bb      	ldr	r3, [r7, #24]
 8017b50:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017b54:	f023 0304 	bic.w	r3, r3, #4
 8017b58:	b2da      	uxtb	r2, r3
 8017b5a:	69bb      	ldr	r3, [r7, #24]
 8017b5c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
  LWIP_ASSERT("blocking connect state error",
 8017b60:	697b      	ldr	r3, [r7, #20]
 8017b62:	2b00      	cmp	r3, #0
 8017b64:	d002      	beq.n	8017b6c <lwip_netconn_do_connected+0xc4>
 8017b66:	69fb      	ldr	r3, [r7, #28]
 8017b68:	2b00      	cmp	r3, #0
 8017b6a:	d10c      	bne.n	8017b86 <lwip_netconn_do_connected+0xde>
 8017b6c:	697b      	ldr	r3, [r7, #20]
 8017b6e:	2b00      	cmp	r3, #0
 8017b70:	d102      	bne.n	8017b78 <lwip_netconn_do_connected+0xd0>
 8017b72:	69fb      	ldr	r3, [r7, #28]
 8017b74:	2b00      	cmp	r3, #0
 8017b76:	d006      	beq.n	8017b86 <lwip_netconn_do_connected+0xde>
 8017b78:	4b10      	ldr	r3, [pc, #64]	@ (8017bbc <lwip_netconn_do_connected+0x114>)
 8017b7a:	f44f 62a6 	mov.w	r2, #1328	@ 0x530
 8017b7e:	4913      	ldr	r1, [pc, #76]	@ (8017bcc <lwip_netconn_do_connected+0x124>)
 8017b80:	4810      	ldr	r0, [pc, #64]	@ (8017bc4 <lwip_netconn_do_connected+0x11c>)
 8017b82:	f012 ff6b 	bl	802aa5c <iprintf>
              (was_blocking && op_completed_sem != NULL) ||
              (!was_blocking && op_completed_sem == NULL));
  conn->current_msg = NULL;
 8017b86:	69bb      	ldr	r3, [r7, #24]
 8017b88:	2200      	movs	r2, #0
 8017b8a:	62da      	str	r2, [r3, #44]	@ 0x2c
  conn->state = NETCONN_NONE;
 8017b8c:	69bb      	ldr	r3, [r7, #24]
 8017b8e:	2200      	movs	r2, #0
 8017b90:	705a      	strb	r2, [r3, #1]
  API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0);
 8017b92:	69bb      	ldr	r3, [r7, #24]
 8017b94:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017b96:	2b00      	cmp	r3, #0
 8017b98:	d005      	beq.n	8017ba6 <lwip_netconn_do_connected+0xfe>
 8017b9a:	69bb      	ldr	r3, [r7, #24]
 8017b9c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8017b9e:	2200      	movs	r2, #0
 8017ba0:	2102      	movs	r1, #2
 8017ba2:	69b8      	ldr	r0, [r7, #24]
 8017ba4:	4798      	blx	r3

  if (was_blocking) {
 8017ba6:	697b      	ldr	r3, [r7, #20]
 8017ba8:	2b00      	cmp	r3, #0
 8017baa:	d002      	beq.n	8017bb2 <lwip_netconn_do_connected+0x10a>
    sys_sem_signal(op_completed_sem);
 8017bac:	69f8      	ldr	r0, [r7, #28]
 8017bae:	f00f fc29 	bl	8027404 <sys_sem_signal>
  }
  return ERR_OK;
 8017bb2:	2300      	movs	r3, #0
}
 8017bb4:	4618      	mov	r0, r3
 8017bb6:	3720      	adds	r7, #32
 8017bb8:	46bd      	mov	sp, r7
 8017bba:	bd80      	pop	{r7, pc}
 8017bbc:	0802e154 	.word	0x0802e154
 8017bc0:	0802e51c 	.word	0x0802e51c
 8017bc4:	0802e198 	.word	0x0802e198
 8017bc8:	0802e53c 	.word	0x0802e53c
 8017bcc:	0802e57c 	.word	0x0802e57c

08017bd0 <lwip_netconn_do_connect>:
 * @param m the api_msg pointing to the connection and containing
 *          the IP address and port to connect to
 */
void
lwip_netconn_do_connect(void *m)
{
 8017bd0:	b580      	push	{r7, lr}
 8017bd2:	b086      	sub	sp, #24
 8017bd4:	af00      	add	r7, sp, #0
 8017bd6:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017bd8:	687b      	ldr	r3, [r7, #4]
 8017bda:	613b      	str	r3, [r7, #16]
  err_t err;

  if (msg->conn->pcb.tcp == NULL) {
 8017bdc:	693b      	ldr	r3, [r7, #16]
 8017bde:	681b      	ldr	r3, [r3, #0]
 8017be0:	685b      	ldr	r3, [r3, #4]
 8017be2:	2b00      	cmp	r3, #0
 8017be4:	d102      	bne.n	8017bec <lwip_netconn_do_connect+0x1c>
    /* This may happen when calling netconn_connect() a second time */
    err = ERR_CLSD;
 8017be6:	23f1      	movs	r3, #241	@ 0xf1
 8017be8:	75fb      	strb	r3, [r7, #23]
 8017bea:	e09e      	b.n	8017d2a <lwip_netconn_do_connect+0x15a>
  } else {
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8017bec:	693b      	ldr	r3, [r7, #16]
 8017bee:	681b      	ldr	r3, [r3, #0]
 8017bf0:	781b      	ldrb	r3, [r3, #0]
 8017bf2:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017bf6:	2b10      	cmp	r3, #16
 8017bf8:	d00f      	beq.n	8017c1a <lwip_netconn_do_connect+0x4a>
 8017bfa:	2b20      	cmp	r3, #32
 8017bfc:	f040 808a 	bne.w	8017d14 <lwip_netconn_do_connect+0x144>
        err = raw_connect(msg->conn->pcb.raw, API_EXPR_REF(msg->msg.bc.ipaddr));
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        err = udp_connect(msg->conn->pcb.udp, API_EXPR_REF(msg->msg.bc.ipaddr), msg->msg.bc.port);
 8017c00:	693b      	ldr	r3, [r7, #16]
 8017c02:	681b      	ldr	r3, [r3, #0]
 8017c04:	6858      	ldr	r0, [r3, #4]
 8017c06:	693b      	ldr	r3, [r7, #16]
 8017c08:	6899      	ldr	r1, [r3, #8]
 8017c0a:	693b      	ldr	r3, [r7, #16]
 8017c0c:	899b      	ldrh	r3, [r3, #12]
 8017c0e:	461a      	mov	r2, r3
 8017c10:	f00a fdd8 	bl	80227c4 <udp_connect>
 8017c14:	4603      	mov	r3, r0
 8017c16:	75fb      	strb	r3, [r7, #23]
        break;
 8017c18:	e087      	b.n	8017d2a <lwip_netconn_do_connect+0x15a>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        /* Prevent connect while doing any other action. */
        if (msg->conn->state == NETCONN_CONNECT) {
 8017c1a:	693b      	ldr	r3, [r7, #16]
 8017c1c:	681b      	ldr	r3, [r3, #0]
 8017c1e:	785b      	ldrb	r3, [r3, #1]
 8017c20:	2b03      	cmp	r3, #3
 8017c22:	d102      	bne.n	8017c2a <lwip_netconn_do_connect+0x5a>
          err = ERR_ALREADY;
 8017c24:	23f7      	movs	r3, #247	@ 0xf7
 8017c26:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_TCPIP_CORE_LOCKING */
              return;
            }
          }
        }
        break;
 8017c28:	e07e      	b.n	8017d28 <lwip_netconn_do_connect+0x158>
        } else if (msg->conn->state != NETCONN_NONE) {
 8017c2a:	693b      	ldr	r3, [r7, #16]
 8017c2c:	681b      	ldr	r3, [r3, #0]
 8017c2e:	785b      	ldrb	r3, [r3, #1]
 8017c30:	2b00      	cmp	r3, #0
 8017c32:	d002      	beq.n	8017c3a <lwip_netconn_do_connect+0x6a>
          err = ERR_ISCONN;
 8017c34:	23f6      	movs	r3, #246	@ 0xf6
 8017c36:	75fb      	strb	r3, [r7, #23]
        break;
 8017c38:	e076      	b.n	8017d28 <lwip_netconn_do_connect+0x158>
          setup_tcp(msg->conn);
 8017c3a:	693b      	ldr	r3, [r7, #16]
 8017c3c:	681b      	ldr	r3, [r3, #0]
 8017c3e:	4618      	mov	r0, r3
 8017c40:	f7ff fafc 	bl	801723c <setup_tcp>
          err = tcp_connect(msg->conn->pcb.tcp, API_EXPR_REF(msg->msg.bc.ipaddr),
 8017c44:	693b      	ldr	r3, [r7, #16]
 8017c46:	681b      	ldr	r3, [r3, #0]
 8017c48:	6858      	ldr	r0, [r3, #4]
 8017c4a:	693b      	ldr	r3, [r7, #16]
 8017c4c:	6899      	ldr	r1, [r3, #8]
 8017c4e:	693b      	ldr	r3, [r7, #16]
 8017c50:	899a      	ldrh	r2, [r3, #12]
 8017c52:	4b3a      	ldr	r3, [pc, #232]	@ (8017d3c <lwip_netconn_do_connect+0x16c>)
 8017c54:	f004 fb90 	bl	801c378 <tcp_connect>
 8017c58:	4603      	mov	r3, r0
 8017c5a:	75fb      	strb	r3, [r7, #23]
          if (err == ERR_OK) {
 8017c5c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8017c60:	2b00      	cmp	r3, #0
 8017c62:	d161      	bne.n	8017d28 <lwip_netconn_do_connect+0x158>
            u8_t non_blocking = netconn_is_nonblocking(msg->conn);
 8017c64:	693b      	ldr	r3, [r7, #16]
 8017c66:	681b      	ldr	r3, [r3, #0]
 8017c68:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017c6c:	f003 0302 	and.w	r3, r3, #2
 8017c70:	2b00      	cmp	r3, #0
 8017c72:	bf14      	ite	ne
 8017c74:	2301      	movne	r3, #1
 8017c76:	2300      	moveq	r3, #0
 8017c78:	b2db      	uxtb	r3, r3
 8017c7a:	73fb      	strb	r3, [r7, #15]
            msg->conn->state = NETCONN_CONNECT;
 8017c7c:	693b      	ldr	r3, [r7, #16]
 8017c7e:	681b      	ldr	r3, [r3, #0]
 8017c80:	2203      	movs	r2, #3
 8017c82:	705a      	strb	r2, [r3, #1]
            SET_NONBLOCKING_CONNECT(msg->conn, non_blocking);
 8017c84:	7bfb      	ldrb	r3, [r7, #15]
 8017c86:	2b00      	cmp	r3, #0
 8017c88:	d00b      	beq.n	8017ca2 <lwip_netconn_do_connect+0xd2>
 8017c8a:	693b      	ldr	r3, [r7, #16]
 8017c8c:	681b      	ldr	r3, [r3, #0]
 8017c8e:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8017c92:	693b      	ldr	r3, [r7, #16]
 8017c94:	681b      	ldr	r3, [r3, #0]
 8017c96:	f042 0204 	orr.w	r2, r2, #4
 8017c9a:	b2d2      	uxtb	r2, r2
 8017c9c:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8017ca0:	e00a      	b.n	8017cb8 <lwip_netconn_do_connect+0xe8>
 8017ca2:	693b      	ldr	r3, [r7, #16]
 8017ca4:	681b      	ldr	r3, [r3, #0]
 8017ca6:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 8017caa:	693b      	ldr	r3, [r7, #16]
 8017cac:	681b      	ldr	r3, [r3, #0]
 8017cae:	f022 0204 	bic.w	r2, r2, #4
 8017cb2:	b2d2      	uxtb	r2, r2
 8017cb4:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
            if (non_blocking) {
 8017cb8:	7bfb      	ldrb	r3, [r7, #15]
 8017cba:	2b00      	cmp	r3, #0
 8017cbc:	d002      	beq.n	8017cc4 <lwip_netconn_do_connect+0xf4>
              err = ERR_INPROGRESS;
 8017cbe:	23fb      	movs	r3, #251	@ 0xfb
 8017cc0:	75fb      	strb	r3, [r7, #23]
        break;
 8017cc2:	e031      	b.n	8017d28 <lwip_netconn_do_connect+0x158>
              msg->conn->current_msg = msg;
 8017cc4:	693b      	ldr	r3, [r7, #16]
 8017cc6:	681b      	ldr	r3, [r3, #0]
 8017cc8:	693a      	ldr	r2, [r7, #16]
 8017cca:	62da      	str	r2, [r3, #44]	@ 0x2c
              LWIP_ASSERT("state!", msg->conn->state == NETCONN_CONNECT);
 8017ccc:	693b      	ldr	r3, [r7, #16]
 8017cce:	681b      	ldr	r3, [r3, #0]
 8017cd0:	785b      	ldrb	r3, [r3, #1]
 8017cd2:	2b03      	cmp	r3, #3
 8017cd4:	d006      	beq.n	8017ce4 <lwip_netconn_do_connect+0x114>
 8017cd6:	4b1a      	ldr	r3, [pc, #104]	@ (8017d40 <lwip_netconn_do_connect+0x170>)
 8017cd8:	f44f 62ae 	mov.w	r2, #1392	@ 0x570
 8017cdc:	4919      	ldr	r1, [pc, #100]	@ (8017d44 <lwip_netconn_do_connect+0x174>)
 8017cde:	481a      	ldr	r0, [pc, #104]	@ (8017d48 <lwip_netconn_do_connect+0x178>)
 8017ce0:	f012 febc 	bl	802aa5c <iprintf>
              UNLOCK_TCPIP_CORE();
 8017ce4:	f7f9 fa80 	bl	80111e8 <sys_unlock_tcpip_core>
              sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 8017ce8:	693b      	ldr	r3, [r7, #16]
 8017cea:	681b      	ldr	r3, [r3, #0]
 8017cec:	330c      	adds	r3, #12
 8017cee:	2100      	movs	r1, #0
 8017cf0:	4618      	mov	r0, r3
 8017cf2:	f00f fb56 	bl	80273a2 <sys_arch_sem_wait>
              LOCK_TCPIP_CORE();
 8017cf6:	f7f9 fa67 	bl	80111c8 <sys_lock_tcpip_core>
              LWIP_ASSERT("state!", msg->conn->state != NETCONN_CONNECT);
 8017cfa:	693b      	ldr	r3, [r7, #16]
 8017cfc:	681b      	ldr	r3, [r3, #0]
 8017cfe:	785b      	ldrb	r3, [r3, #1]
 8017d00:	2b03      	cmp	r3, #3
 8017d02:	d116      	bne.n	8017d32 <lwip_netconn_do_connect+0x162>
 8017d04:	4b0e      	ldr	r3, [pc, #56]	@ (8017d40 <lwip_netconn_do_connect+0x170>)
 8017d06:	f240 5274 	movw	r2, #1396	@ 0x574
 8017d0a:	490e      	ldr	r1, [pc, #56]	@ (8017d44 <lwip_netconn_do_connect+0x174>)
 8017d0c:	480e      	ldr	r0, [pc, #56]	@ (8017d48 <lwip_netconn_do_connect+0x178>)
 8017d0e:	f012 fea5 	bl	802aa5c <iprintf>
              return;
 8017d12:	e00e      	b.n	8017d32 <lwip_netconn_do_connect+0x162>
#endif /* LWIP_TCP */
      default:
        LWIP_ERROR("Invalid netconn type", 0, do {
 8017d14:	4b0a      	ldr	r3, [pc, #40]	@ (8017d40 <lwip_netconn_do_connect+0x170>)
 8017d16:	f240 527d 	movw	r2, #1405	@ 0x57d
 8017d1a:	490c      	ldr	r1, [pc, #48]	@ (8017d4c <lwip_netconn_do_connect+0x17c>)
 8017d1c:	480a      	ldr	r0, [pc, #40]	@ (8017d48 <lwip_netconn_do_connect+0x178>)
 8017d1e:	f012 fe9d 	bl	802aa5c <iprintf>
 8017d22:	23fa      	movs	r3, #250	@ 0xfa
 8017d24:	75fb      	strb	r3, [r7, #23]
          err = ERR_VAL;
        } while (0));
        break;
 8017d26:	e000      	b.n	8017d2a <lwip_netconn_do_connect+0x15a>
        break;
 8017d28:	bf00      	nop
    }
  }
  msg->err = err;
 8017d2a:	693b      	ldr	r3, [r7, #16]
 8017d2c:	7dfa      	ldrb	r2, [r7, #23]
 8017d2e:	711a      	strb	r2, [r3, #4]
 8017d30:	e000      	b.n	8017d34 <lwip_netconn_do_connect+0x164>
              return;
 8017d32:	bf00      	nop
  /* For all other protocols, netconn_connect() calls netconn_apimsg(),
     so use TCPIP_APIMSG_ACK() here. */
  TCPIP_APIMSG_ACK(msg);
}
 8017d34:	3718      	adds	r7, #24
 8017d36:	46bd      	mov	sp, r7
 8017d38:	bd80      	pop	{r7, pc}
 8017d3a:	bf00      	nop
 8017d3c:	08017aa9 	.word	0x08017aa9
 8017d40:	0802e154 	.word	0x0802e154
 8017d44:	0802e514 	.word	0x0802e514
 8017d48:	0802e198 	.word	0x0802e198
 8017d4c:	0802e59c 	.word	0x0802e59c

08017d50 <lwip_netconn_do_disconnect>:
 *
 * @param m the api_msg pointing to the connection to disconnect
 */
void
lwip_netconn_do_disconnect(void *m)
{
 8017d50:	b580      	push	{r7, lr}
 8017d52:	b084      	sub	sp, #16
 8017d54:	af00      	add	r7, sp, #0
 8017d56:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017d58:	687b      	ldr	r3, [r7, #4]
 8017d5a:	60fb      	str	r3, [r7, #12]

#if LWIP_UDP
  if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) {
 8017d5c:	68fb      	ldr	r3, [r7, #12]
 8017d5e:	681b      	ldr	r3, [r3, #0]
 8017d60:	781b      	ldrb	r3, [r3, #0]
 8017d62:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017d66:	2b20      	cmp	r3, #32
 8017d68:	d109      	bne.n	8017d7e <lwip_netconn_do_disconnect+0x2e>
    udp_disconnect(msg->conn->pcb.udp);
 8017d6a:	68fb      	ldr	r3, [r7, #12]
 8017d6c:	681b      	ldr	r3, [r3, #0]
 8017d6e:	685b      	ldr	r3, [r3, #4]
 8017d70:	4618      	mov	r0, r3
 8017d72:	f00a fd97 	bl	80228a4 <udp_disconnect>
    msg->err = ERR_OK;
 8017d76:	68fb      	ldr	r3, [r7, #12]
 8017d78:	2200      	movs	r2, #0
 8017d7a:	711a      	strb	r2, [r3, #4]
#endif /* LWIP_UDP */
  {
    msg->err = ERR_VAL;
  }
  TCPIP_APIMSG_ACK(msg);
}
 8017d7c:	e002      	b.n	8017d84 <lwip_netconn_do_disconnect+0x34>
    msg->err = ERR_VAL;
 8017d7e:	68fb      	ldr	r3, [r7, #12]
 8017d80:	22fa      	movs	r2, #250	@ 0xfa
 8017d82:	711a      	strb	r2, [r3, #4]
}
 8017d84:	bf00      	nop
 8017d86:	3710      	adds	r7, #16
 8017d88:	46bd      	mov	sp, r7
 8017d8a:	bd80      	pop	{r7, pc}

08017d8c <lwip_netconn_do_send>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_send(void *m)
{
 8017d8c:	b580      	push	{r7, lr}
 8017d8e:	b084      	sub	sp, #16
 8017d90:	af00      	add	r7, sp, #0
 8017d92:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017d94:	687b      	ldr	r3, [r7, #4]
 8017d96:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 8017d98:	68bb      	ldr	r3, [r7, #8]
 8017d9a:	681b      	ldr	r3, [r3, #0]
 8017d9c:	4618      	mov	r0, r3
 8017d9e:	f7fe fef9 	bl	8016b94 <netconn_err>
 8017da2:	4603      	mov	r3, r0
 8017da4:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 8017da6:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8017daa:	2b00      	cmp	r3, #0
 8017dac:	d134      	bne.n	8017e18 <lwip_netconn_do_send+0x8c>
    if (msg->conn->pcb.tcp != NULL) {
 8017dae:	68bb      	ldr	r3, [r7, #8]
 8017db0:	681b      	ldr	r3, [r3, #0]
 8017db2:	685b      	ldr	r3, [r3, #4]
 8017db4:	2b00      	cmp	r3, #0
 8017db6:	d02d      	beq.n	8017e14 <lwip_netconn_do_send+0x88>
      switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8017db8:	68bb      	ldr	r3, [r7, #8]
 8017dba:	681b      	ldr	r3, [r3, #0]
 8017dbc:	781b      	ldrb	r3, [r3, #0]
 8017dbe:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017dc2:	2b20      	cmp	r3, #32
 8017dc4:	d123      	bne.n	8017e0e <lwip_netconn_do_send+0x82>
            err = udp_sendto_chksum(msg->conn->pcb.udp, msg->msg.b->p,
                                    &msg->msg.b->addr, msg->msg.b->port,
                                    msg->msg.b->flags & NETBUF_FLAG_CHKSUM, msg->msg.b->toport_chksum);
          }
#else /* LWIP_CHECKSUM_ON_COPY */
          if (ip_addr_isany_val(msg->msg.b->addr) || IP_IS_ANY_TYPE_VAL(msg->msg.b->addr)) {
 8017dc6:	68bb      	ldr	r3, [r7, #8]
 8017dc8:	689b      	ldr	r3, [r3, #8]
 8017dca:	689b      	ldr	r3, [r3, #8]
 8017dcc:	2b00      	cmp	r3, #0
 8017dce:	d10c      	bne.n	8017dea <lwip_netconn_do_send+0x5e>
            err = udp_send(msg->conn->pcb.udp, msg->msg.b->p);
 8017dd0:	68bb      	ldr	r3, [r7, #8]
 8017dd2:	681b      	ldr	r3, [r3, #0]
 8017dd4:	685a      	ldr	r2, [r3, #4]
 8017dd6:	68bb      	ldr	r3, [r7, #8]
 8017dd8:	689b      	ldr	r3, [r3, #8]
 8017dda:	681b      	ldr	r3, [r3, #0]
 8017ddc:	4619      	mov	r1, r3
 8017dde:	4610      	mov	r0, r2
 8017de0:	f00a fa7a 	bl	80222d8 <udp_send>
 8017de4:	4603      	mov	r3, r0
 8017de6:	73fb      	strb	r3, [r7, #15]
          } else {
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
          }
#endif /* LWIP_CHECKSUM_ON_COPY */
          break;
 8017de8:	e016      	b.n	8017e18 <lwip_netconn_do_send+0x8c>
            err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, &msg->msg.b->addr, msg->msg.b->port);
 8017dea:	68bb      	ldr	r3, [r7, #8]
 8017dec:	681b      	ldr	r3, [r3, #0]
 8017dee:	6858      	ldr	r0, [r3, #4]
 8017df0:	68bb      	ldr	r3, [r7, #8]
 8017df2:	689b      	ldr	r3, [r3, #8]
 8017df4:	6819      	ldr	r1, [r3, #0]
 8017df6:	68bb      	ldr	r3, [r7, #8]
 8017df8:	689b      	ldr	r3, [r3, #8]
 8017dfa:	f103 0208 	add.w	r2, r3, #8
 8017dfe:	68bb      	ldr	r3, [r7, #8]
 8017e00:	689b      	ldr	r3, [r3, #8]
 8017e02:	899b      	ldrh	r3, [r3, #12]
 8017e04:	f00a fa9c 	bl	8022340 <udp_sendto>
 8017e08:	4603      	mov	r3, r0
 8017e0a:	73fb      	strb	r3, [r7, #15]
          break;
 8017e0c:	e004      	b.n	8017e18 <lwip_netconn_do_send+0x8c>
#endif /* LWIP_UDP */
        default:
          err = ERR_CONN;
 8017e0e:	23f5      	movs	r3, #245	@ 0xf5
 8017e10:	73fb      	strb	r3, [r7, #15]
          break;
 8017e12:	e001      	b.n	8017e18 <lwip_netconn_do_send+0x8c>
      }
    } else {
      err = ERR_CONN;
 8017e14:	23f5      	movs	r3, #245	@ 0xf5
 8017e16:	73fb      	strb	r3, [r7, #15]
    }
  }
  msg->err = err;
 8017e18:	68bb      	ldr	r3, [r7, #8]
 8017e1a:	7bfa      	ldrb	r2, [r7, #15]
 8017e1c:	711a      	strb	r2, [r3, #4]
  TCPIP_APIMSG_ACK(msg);
}
 8017e1e:	bf00      	nop
 8017e20:	3710      	adds	r7, #16
 8017e22:	46bd      	mov	sp, r7
 8017e24:	bd80      	pop	{r7, pc}

08017e26 <lwip_netconn_do_recv>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_recv(void *m)
{
 8017e26:	b580      	push	{r7, lr}
 8017e28:	b086      	sub	sp, #24
 8017e2a:	af00      	add	r7, sp, #0
 8017e2c:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8017e2e:	687b      	ldr	r3, [r7, #4]
 8017e30:	613b      	str	r3, [r7, #16]

  msg->err = ERR_OK;
 8017e32:	693b      	ldr	r3, [r7, #16]
 8017e34:	2200      	movs	r2, #0
 8017e36:	711a      	strb	r2, [r3, #4]
  if (msg->conn->pcb.tcp != NULL) {
 8017e38:	693b      	ldr	r3, [r7, #16]
 8017e3a:	681b      	ldr	r3, [r3, #0]
 8017e3c:	685b      	ldr	r3, [r3, #4]
 8017e3e:	2b00      	cmp	r3, #0
 8017e40:	d022      	beq.n	8017e88 <lwip_netconn_do_recv+0x62>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 8017e42:	693b      	ldr	r3, [r7, #16]
 8017e44:	681b      	ldr	r3, [r3, #0]
 8017e46:	781b      	ldrb	r3, [r3, #0]
 8017e48:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8017e4c:	2b10      	cmp	r3, #16
 8017e4e:	d11b      	bne.n	8017e88 <lwip_netconn_do_recv+0x62>
      size_t remaining = msg->msg.r.len;
 8017e50:	693b      	ldr	r3, [r7, #16]
 8017e52:	689b      	ldr	r3, [r3, #8]
 8017e54:	617b      	str	r3, [r7, #20]
      do {
        u16_t recved = (u16_t)((remaining > 0xffff) ? 0xffff : remaining);
 8017e56:	697b      	ldr	r3, [r7, #20]
 8017e58:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8017e5c:	d202      	bcs.n	8017e64 <lwip_netconn_do_recv+0x3e>
 8017e5e:	697b      	ldr	r3, [r7, #20]
 8017e60:	b29b      	uxth	r3, r3
 8017e62:	e001      	b.n	8017e68 <lwip_netconn_do_recv+0x42>
 8017e64:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8017e68:	81fb      	strh	r3, [r7, #14]
        tcp_recved(msg->conn->pcb.tcp, recved);
 8017e6a:	693b      	ldr	r3, [r7, #16]
 8017e6c:	681b      	ldr	r3, [r3, #0]
 8017e6e:	685b      	ldr	r3, [r3, #4]
 8017e70:	89fa      	ldrh	r2, [r7, #14]
 8017e72:	4611      	mov	r1, r2
 8017e74:	4618      	mov	r0, r3
 8017e76:	f004 f9e5 	bl	801c244 <tcp_recved>
        remaining -= recved;
 8017e7a:	89fb      	ldrh	r3, [r7, #14]
 8017e7c:	697a      	ldr	r2, [r7, #20]
 8017e7e:	1ad3      	subs	r3, r2, r3
 8017e80:	617b      	str	r3, [r7, #20]
      } while (remaining != 0);
 8017e82:	697b      	ldr	r3, [r7, #20]
 8017e84:	2b00      	cmp	r3, #0
 8017e86:	d1e6      	bne.n	8017e56 <lwip_netconn_do_recv+0x30>
    }
  }
  TCPIP_APIMSG_ACK(msg);
}
 8017e88:	bf00      	nop
 8017e8a:	3718      	adds	r7, #24
 8017e8c:	46bd      	mov	sp, r7
 8017e8e:	bd80      	pop	{r7, pc}

08017e90 <lwip_netconn_do_writemore>:
 * @return ERR_OK
 *         ERR_MEM if LWIP_TCPIP_CORE_LOCKING=1 and sending hasn't yet finished
 */
static err_t
lwip_netconn_do_writemore(struct netconn *conn  WRITE_DELAYED_PARAM)
{
 8017e90:	b580      	push	{r7, lr}
 8017e92:	b088      	sub	sp, #32
 8017e94:	af00      	add	r7, sp, #0
 8017e96:	6078      	str	r0, [r7, #4]
 8017e98:	460b      	mov	r3, r1
 8017e9a:	70fb      	strb	r3, [r7, #3]
  err_t err;
  const void *dataptr;
  u16_t len, available;
  u8_t write_finished = 0;
 8017e9c:	2300      	movs	r3, #0
 8017e9e:	76fb      	strb	r3, [r7, #27]
  size_t diff;
  u8_t dontblock;
  u8_t apiflags;
  u8_t write_more;

  LWIP_ASSERT("conn != NULL", conn != NULL);
 8017ea0:	687b      	ldr	r3, [r7, #4]
 8017ea2:	2b00      	cmp	r3, #0
 8017ea4:	d106      	bne.n	8017eb4 <lwip_netconn_do_writemore+0x24>
 8017ea6:	4b61      	ldr	r3, [pc, #388]	@ (801802c <lwip_netconn_do_writemore+0x19c>)
 8017ea8:	f240 6273 	movw	r2, #1651	@ 0x673
 8017eac:	4960      	ldr	r1, [pc, #384]	@ (8018030 <lwip_netconn_do_writemore+0x1a0>)
 8017eae:	4861      	ldr	r0, [pc, #388]	@ (8018034 <lwip_netconn_do_writemore+0x1a4>)
 8017eb0:	f012 fdd4 	bl	802aa5c <iprintf>
  LWIP_ASSERT("conn->state == NETCONN_WRITE", (conn->state == NETCONN_WRITE));
 8017eb4:	687b      	ldr	r3, [r7, #4]
 8017eb6:	785b      	ldrb	r3, [r3, #1]
 8017eb8:	2b01      	cmp	r3, #1
 8017eba:	d006      	beq.n	8017eca <lwip_netconn_do_writemore+0x3a>
 8017ebc:	4b5b      	ldr	r3, [pc, #364]	@ (801802c <lwip_netconn_do_writemore+0x19c>)
 8017ebe:	f240 6274 	movw	r2, #1652	@ 0x674
 8017ec2:	495d      	ldr	r1, [pc, #372]	@ (8018038 <lwip_netconn_do_writemore+0x1a8>)
 8017ec4:	485b      	ldr	r0, [pc, #364]	@ (8018034 <lwip_netconn_do_writemore+0x1a4>)
 8017ec6:	f012 fdc9 	bl	802aa5c <iprintf>
  LWIP_ASSERT("conn->current_msg != NULL", conn->current_msg != NULL);
 8017eca:	687b      	ldr	r3, [r7, #4]
 8017ecc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017ece:	2b00      	cmp	r3, #0
 8017ed0:	d106      	bne.n	8017ee0 <lwip_netconn_do_writemore+0x50>
 8017ed2:	4b56      	ldr	r3, [pc, #344]	@ (801802c <lwip_netconn_do_writemore+0x19c>)
 8017ed4:	f240 6275 	movw	r2, #1653	@ 0x675
 8017ed8:	4958      	ldr	r1, [pc, #352]	@ (801803c <lwip_netconn_do_writemore+0x1ac>)
 8017eda:	4856      	ldr	r0, [pc, #344]	@ (8018034 <lwip_netconn_do_writemore+0x1a4>)
 8017edc:	f012 fdbe 	bl	802aa5c <iprintf>
  LWIP_ASSERT("conn->pcb.tcp != NULL", conn->pcb.tcp != NULL);
 8017ee0:	687b      	ldr	r3, [r7, #4]
 8017ee2:	685b      	ldr	r3, [r3, #4]
 8017ee4:	2b00      	cmp	r3, #0
 8017ee6:	d106      	bne.n	8017ef6 <lwip_netconn_do_writemore+0x66>
 8017ee8:	4b50      	ldr	r3, [pc, #320]	@ (801802c <lwip_netconn_do_writemore+0x19c>)
 8017eea:	f240 6276 	movw	r2, #1654	@ 0x676
 8017eee:	4954      	ldr	r1, [pc, #336]	@ (8018040 <lwip_netconn_do_writemore+0x1b0>)
 8017ef0:	4850      	ldr	r0, [pc, #320]	@ (8018034 <lwip_netconn_do_writemore+0x1a4>)
 8017ef2:	f012 fdb3 	bl	802aa5c <iprintf>
  LWIP_ASSERT("conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len",
 8017ef6:	687b      	ldr	r3, [r7, #4]
 8017ef8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017efa:	699a      	ldr	r2, [r3, #24]
 8017efc:	687b      	ldr	r3, [r7, #4]
 8017efe:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017f00:	695b      	ldr	r3, [r3, #20]
 8017f02:	429a      	cmp	r2, r3
 8017f04:	d306      	bcc.n	8017f14 <lwip_netconn_do_writemore+0x84>
 8017f06:	4b49      	ldr	r3, [pc, #292]	@ (801802c <lwip_netconn_do_writemore+0x19c>)
 8017f08:	f240 6277 	movw	r2, #1655	@ 0x677
 8017f0c:	494d      	ldr	r1, [pc, #308]	@ (8018044 <lwip_netconn_do_writemore+0x1b4>)
 8017f0e:	4849      	ldr	r0, [pc, #292]	@ (8018034 <lwip_netconn_do_writemore+0x1a4>)
 8017f10:	f012 fda4 	bl	802aa5c <iprintf>
              conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len);
  LWIP_ASSERT("conn->current_msg->msg.w.vector_cnt > 0", conn->current_msg->msg.w.vector_cnt > 0);
 8017f14:	687b      	ldr	r3, [r7, #4]
 8017f16:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017f18:	899b      	ldrh	r3, [r3, #12]
 8017f1a:	2b00      	cmp	r3, #0
 8017f1c:	d106      	bne.n	8017f2c <lwip_netconn_do_writemore+0x9c>
 8017f1e:	4b43      	ldr	r3, [pc, #268]	@ (801802c <lwip_netconn_do_writemore+0x19c>)
 8017f20:	f240 6279 	movw	r2, #1657	@ 0x679
 8017f24:	4948      	ldr	r1, [pc, #288]	@ (8018048 <lwip_netconn_do_writemore+0x1b8>)
 8017f26:	4843      	ldr	r0, [pc, #268]	@ (8018034 <lwip_netconn_do_writemore+0x1a4>)
 8017f28:	f012 fd98 	bl	802aa5c <iprintf>

  apiflags = conn->current_msg->msg.w.apiflags;
 8017f2c:	687b      	ldr	r3, [r7, #4]
 8017f2e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017f30:	7f1b      	ldrb	r3, [r3, #28]
 8017f32:	76bb      	strb	r3, [r7, #26]
  dontblock = netconn_is_nonblocking(conn) || (apiflags & NETCONN_DONTBLOCK);
 8017f34:	687b      	ldr	r3, [r7, #4]
 8017f36:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 8017f3a:	f003 0302 	and.w	r3, r3, #2
 8017f3e:	2b00      	cmp	r3, #0
 8017f40:	d104      	bne.n	8017f4c <lwip_netconn_do_writemore+0xbc>
 8017f42:	7ebb      	ldrb	r3, [r7, #26]
 8017f44:	f003 0304 	and.w	r3, r3, #4
 8017f48:	2b00      	cmp	r3, #0
 8017f4a:	d001      	beq.n	8017f50 <lwip_netconn_do_writemore+0xc0>
 8017f4c:	2301      	movs	r3, #1
 8017f4e:	e000      	b.n	8017f52 <lwip_netconn_do_writemore+0xc2>
 8017f50:	2300      	movs	r3, #0
 8017f52:	763b      	strb	r3, [r7, #24]
    }
  } else
#endif /* LWIP_SO_SNDTIMEO */
  {
    do {
      dataptr = (const u8_t *)conn->current_msg->msg.w.vector->ptr + conn->current_msg->msg.w.vector_off;
 8017f54:	687b      	ldr	r3, [r7, #4]
 8017f56:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017f58:	689b      	ldr	r3, [r3, #8]
 8017f5a:	681a      	ldr	r2, [r3, #0]
 8017f5c:	687b      	ldr	r3, [r7, #4]
 8017f5e:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017f60:	691b      	ldr	r3, [r3, #16]
 8017f62:	4413      	add	r3, r2
 8017f64:	617b      	str	r3, [r7, #20]
      diff = conn->current_msg->msg.w.vector->len - conn->current_msg->msg.w.vector_off;
 8017f66:	687b      	ldr	r3, [r7, #4]
 8017f68:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017f6a:	689b      	ldr	r3, [r3, #8]
 8017f6c:	685a      	ldr	r2, [r3, #4]
 8017f6e:	687b      	ldr	r3, [r7, #4]
 8017f70:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017f72:	691b      	ldr	r3, [r3, #16]
 8017f74:	1ad3      	subs	r3, r2, r3
 8017f76:	613b      	str	r3, [r7, #16]
      if (diff > 0xffffUL) { /* max_u16_t */
 8017f78:	693b      	ldr	r3, [r7, #16]
 8017f7a:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8017f7e:	d307      	bcc.n	8017f90 <lwip_netconn_do_writemore+0x100>
        len = 0xffff;
 8017f80:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8017f84:	83bb      	strh	r3, [r7, #28]
        apiflags |= TCP_WRITE_FLAG_MORE;
 8017f86:	7ebb      	ldrb	r3, [r7, #26]
 8017f88:	f043 0302 	orr.w	r3, r3, #2
 8017f8c:	76bb      	strb	r3, [r7, #26]
 8017f8e:	e001      	b.n	8017f94 <lwip_netconn_do_writemore+0x104>
      } else {
        len = (u16_t)diff;
 8017f90:	693b      	ldr	r3, [r7, #16]
 8017f92:	83bb      	strh	r3, [r7, #28]
      }
      available = tcp_sndbuf(conn->pcb.tcp);
 8017f94:	687b      	ldr	r3, [r7, #4]
 8017f96:	685b      	ldr	r3, [r3, #4]
 8017f98:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8017f9c:	81fb      	strh	r3, [r7, #14]
      if (available < len) {
 8017f9e:	89fa      	ldrh	r2, [r7, #14]
 8017fa0:	8bbb      	ldrh	r3, [r7, #28]
 8017fa2:	429a      	cmp	r2, r3
 8017fa4:	d216      	bcs.n	8017fd4 <lwip_netconn_do_writemore+0x144>
        /* don't try to write more than sendbuf */
        len = available;
 8017fa6:	89fb      	ldrh	r3, [r7, #14]
 8017fa8:	83bb      	strh	r3, [r7, #28]
        if (dontblock) {
 8017faa:	7e3b      	ldrb	r3, [r7, #24]
 8017fac:	2b00      	cmp	r3, #0
 8017fae:	d00d      	beq.n	8017fcc <lwip_netconn_do_writemore+0x13c>
          if (!len) {
 8017fb0:	8bbb      	ldrh	r3, [r7, #28]
 8017fb2:	2b00      	cmp	r3, #0
 8017fb4:	d10e      	bne.n	8017fd4 <lwip_netconn_do_writemore+0x144>
            /* set error according to partial write or not */
            err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 8017fb6:	687b      	ldr	r3, [r7, #4]
 8017fb8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017fba:	699b      	ldr	r3, [r3, #24]
 8017fbc:	2b00      	cmp	r3, #0
 8017fbe:	d102      	bne.n	8017fc6 <lwip_netconn_do_writemore+0x136>
 8017fc0:	f06f 0306 	mvn.w	r3, #6
 8017fc4:	e000      	b.n	8017fc8 <lwip_netconn_do_writemore+0x138>
 8017fc6:	2300      	movs	r3, #0
 8017fc8:	77fb      	strb	r3, [r7, #31]
            goto err_mem;
 8017fca:	e08f      	b.n	80180ec <lwip_netconn_do_writemore+0x25c>
          }
        } else {
          apiflags |= TCP_WRITE_FLAG_MORE;
 8017fcc:	7ebb      	ldrb	r3, [r7, #26]
 8017fce:	f043 0302 	orr.w	r3, r3, #2
 8017fd2:	76bb      	strb	r3, [r7, #26]
        }
      }
      LWIP_ASSERT("lwip_netconn_do_writemore: invalid length!",
 8017fd4:	687b      	ldr	r3, [r7, #4]
 8017fd6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017fd8:	691a      	ldr	r2, [r3, #16]
 8017fda:	8bbb      	ldrh	r3, [r7, #28]
 8017fdc:	441a      	add	r2, r3
 8017fde:	687b      	ldr	r3, [r7, #4]
 8017fe0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8017fe2:	689b      	ldr	r3, [r3, #8]
 8017fe4:	685b      	ldr	r3, [r3, #4]
 8017fe6:	429a      	cmp	r2, r3
 8017fe8:	d906      	bls.n	8017ff8 <lwip_netconn_do_writemore+0x168>
 8017fea:	4b10      	ldr	r3, [pc, #64]	@ (801802c <lwip_netconn_do_writemore+0x19c>)
 8017fec:	f240 62a3 	movw	r2, #1699	@ 0x6a3
 8017ff0:	4916      	ldr	r1, [pc, #88]	@ (801804c <lwip_netconn_do_writemore+0x1bc>)
 8017ff2:	4810      	ldr	r0, [pc, #64]	@ (8018034 <lwip_netconn_do_writemore+0x1a4>)
 8017ff4:	f012 fd32 	bl	802aa5c <iprintf>
                  ((conn->current_msg->msg.w.vector_off + len) <= conn->current_msg->msg.w.vector->len));
      /* we should loop around for more sending in the following cases:
           1) We couldn't finish the current vector because of 16-bit size limitations.
              tcp_write() and tcp_sndbuf() both are limited to 16-bit sizes
           2) We are sending the remainder of the current vector and have more */
      if ((len == 0xffff && diff > 0xffffUL) ||
 8017ff8:	8bbb      	ldrh	r3, [r7, #28]
 8017ffa:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8017ffe:	4293      	cmp	r3, r2
 8018000:	d103      	bne.n	801800a <lwip_netconn_do_writemore+0x17a>
 8018002:	693b      	ldr	r3, [r7, #16]
 8018004:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8018008:	d209      	bcs.n	801801e <lwip_netconn_do_writemore+0x18e>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 801800a:	693b      	ldr	r3, [r7, #16]
 801800c:	b29b      	uxth	r3, r3
      if ((len == 0xffff && diff > 0xffffUL) ||
 801800e:	8bba      	ldrh	r2, [r7, #28]
 8018010:	429a      	cmp	r2, r3
 8018012:	d11d      	bne.n	8018050 <lwip_netconn_do_writemore+0x1c0>
          (len == (u16_t)diff && conn->current_msg->msg.w.vector_cnt > 1)) {
 8018014:	687b      	ldr	r3, [r7, #4]
 8018016:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8018018:	899b      	ldrh	r3, [r3, #12]
 801801a:	2b01      	cmp	r3, #1
 801801c:	d918      	bls.n	8018050 <lwip_netconn_do_writemore+0x1c0>
        write_more = 1;
 801801e:	2301      	movs	r3, #1
 8018020:	767b      	strb	r3, [r7, #25]
        apiflags |= TCP_WRITE_FLAG_MORE;
 8018022:	7ebb      	ldrb	r3, [r7, #26]
 8018024:	f043 0302 	orr.w	r3, r3, #2
 8018028:	76bb      	strb	r3, [r7, #26]
 801802a:	e013      	b.n	8018054 <lwip_netconn_do_writemore+0x1c4>
 801802c:	0802e154 	.word	0x0802e154
 8018030:	0802e2ac 	.word	0x0802e2ac
 8018034:	0802e198 	.word	0x0802e198
 8018038:	0802e5b4 	.word	0x0802e5b4
 801803c:	0802e2bc 	.word	0x0802e2bc
 8018040:	0802e5d4 	.word	0x0802e5d4
 8018044:	0802e5ec 	.word	0x0802e5ec
 8018048:	0802e62c 	.word	0x0802e62c
 801804c:	0802e654 	.word	0x0802e654
      } else {
        write_more = 0;
 8018050:	2300      	movs	r3, #0
 8018052:	767b      	strb	r3, [r7, #25]
      }
      err = tcp_write(conn->pcb.tcp, dataptr, len, apiflags);
 8018054:	687b      	ldr	r3, [r7, #4]
 8018056:	6858      	ldr	r0, [r3, #4]
 8018058:	7ebb      	ldrb	r3, [r7, #26]
 801805a:	8bba      	ldrh	r2, [r7, #28]
 801805c:	6979      	ldr	r1, [r7, #20]
 801805e:	f008 f827 	bl	80200b0 <tcp_write>
 8018062:	4603      	mov	r3, r0
 8018064:	77fb      	strb	r3, [r7, #31]
      if (err == ERR_OK) {
 8018066:	f997 301f 	ldrsb.w	r3, [r7, #31]
 801806a:	2b00      	cmp	r3, #0
 801806c:	d12c      	bne.n	80180c8 <lwip_netconn_do_writemore+0x238>
        conn->current_msg->msg.w.offset += len;
 801806e:	687b      	ldr	r3, [r7, #4]
 8018070:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8018072:	6999      	ldr	r1, [r3, #24]
 8018074:	8bba      	ldrh	r2, [r7, #28]
 8018076:	687b      	ldr	r3, [r7, #4]
 8018078:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801807a:	440a      	add	r2, r1
 801807c:	619a      	str	r2, [r3, #24]
        conn->current_msg->msg.w.vector_off += len;
 801807e:	687b      	ldr	r3, [r7, #4]
 8018080:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8018082:	6919      	ldr	r1, [r3, #16]
 8018084:	8bba      	ldrh	r2, [r7, #28]
 8018086:	687b      	ldr	r3, [r7, #4]
 8018088:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801808a:	440a      	add	r2, r1
 801808c:	611a      	str	r2, [r3, #16]
        /* check if current vector is finished */
        if (conn->current_msg->msg.w.vector_off == conn->current_msg->msg.w.vector->len) {
 801808e:	687b      	ldr	r3, [r7, #4]
 8018090:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8018092:	691a      	ldr	r2, [r3, #16]
 8018094:	687b      	ldr	r3, [r7, #4]
 8018096:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8018098:	689b      	ldr	r3, [r3, #8]
 801809a:	685b      	ldr	r3, [r3, #4]
 801809c:	429a      	cmp	r2, r3
 801809e:	d113      	bne.n	80180c8 <lwip_netconn_do_writemore+0x238>
          conn->current_msg->msg.w.vector_cnt--;
 80180a0:	687b      	ldr	r3, [r7, #4]
 80180a2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80180a4:	899a      	ldrh	r2, [r3, #12]
 80180a6:	3a01      	subs	r2, #1
 80180a8:	b292      	uxth	r2, r2
 80180aa:	819a      	strh	r2, [r3, #12]
          /* if we have additional vectors, move on to them */
          if (conn->current_msg->msg.w.vector_cnt > 0) {
 80180ac:	687b      	ldr	r3, [r7, #4]
 80180ae:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80180b0:	899b      	ldrh	r3, [r3, #12]
 80180b2:	2b00      	cmp	r3, #0
 80180b4:	d008      	beq.n	80180c8 <lwip_netconn_do_writemore+0x238>
            conn->current_msg->msg.w.vector++;
 80180b6:	687b      	ldr	r3, [r7, #4]
 80180b8:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80180ba:	689a      	ldr	r2, [r3, #8]
 80180bc:	3208      	adds	r2, #8
 80180be:	609a      	str	r2, [r3, #8]
            conn->current_msg->msg.w.vector_off = 0;
 80180c0:	687b      	ldr	r3, [r7, #4]
 80180c2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80180c4:	2200      	movs	r2, #0
 80180c6:	611a      	str	r2, [r3, #16]
          }
        }
      }
    } while (write_more && err == ERR_OK);
 80180c8:	7e7b      	ldrb	r3, [r7, #25]
 80180ca:	2b00      	cmp	r3, #0
 80180cc:	d004      	beq.n	80180d8 <lwip_netconn_do_writemore+0x248>
 80180ce:	f997 301f 	ldrsb.w	r3, [r7, #31]
 80180d2:	2b00      	cmp	r3, #0
 80180d4:	f43f af3e 	beq.w	8017f54 <lwip_netconn_do_writemore+0xc4>
    /* if OK or memory error, check available space */
    if ((err == ERR_OK) || (err == ERR_MEM)) {
 80180d8:	f997 301f 	ldrsb.w	r3, [r7, #31]
 80180dc:	2b00      	cmp	r3, #0
 80180de:	d004      	beq.n	80180ea <lwip_netconn_do_writemore+0x25a>
 80180e0:	f997 301f 	ldrsb.w	r3, [r7, #31]
 80180e4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80180e8:	d137      	bne.n	801815a <lwip_netconn_do_writemore+0x2ca>
err_mem:
 80180ea:	bf00      	nop
      if (dontblock && (conn->current_msg->msg.w.offset < conn->current_msg->msg.w.len)) {
 80180ec:	7e3b      	ldrb	r3, [r7, #24]
 80180ee:	2b00      	cmp	r3, #0
 80180f0:	d01b      	beq.n	801812a <lwip_netconn_do_writemore+0x29a>
 80180f2:	687b      	ldr	r3, [r7, #4]
 80180f4:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80180f6:	699a      	ldr	r2, [r3, #24]
 80180f8:	687b      	ldr	r3, [r7, #4]
 80180fa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80180fc:	695b      	ldr	r3, [r3, #20]
 80180fe:	429a      	cmp	r2, r3
 8018100:	d213      	bcs.n	801812a <lwip_netconn_do_writemore+0x29a>
        /* non-blocking write did not write everything: mark the pcb non-writable
           and let poll_tcp check writable space to mark the pcb writable again */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 8018102:	687b      	ldr	r3, [r7, #4]
 8018104:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8018106:	2b00      	cmp	r3, #0
 8018108:	d005      	beq.n	8018116 <lwip_netconn_do_writemore+0x286>
 801810a:	687b      	ldr	r3, [r7, #4]
 801810c:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801810e:	2200      	movs	r2, #0
 8018110:	2103      	movs	r1, #3
 8018112:	6878      	ldr	r0, [r7, #4]
 8018114:	4798      	blx	r3
        conn->flags |= NETCONN_FLAG_CHECK_WRITESPACE;
 8018116:	687b      	ldr	r3, [r7, #4]
 8018118:	f893 3028 	ldrb.w	r3, [r3, #40]	@ 0x28
 801811c:	f043 0310 	orr.w	r3, r3, #16
 8018120:	b2da      	uxtb	r2, r3
 8018122:	687b      	ldr	r3, [r7, #4]
 8018124:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 8018128:	e017      	b.n	801815a <lwip_netconn_do_writemore+0x2ca>
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 801812a:	687b      	ldr	r3, [r7, #4]
 801812c:	685b      	ldr	r3, [r3, #4]
 801812e:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8018132:	f640 3269 	movw	r2, #2921	@ 0xb69
 8018136:	4293      	cmp	r3, r2
 8018138:	d905      	bls.n	8018146 <lwip_netconn_do_writemore+0x2b6>
                 (tcp_sndqueuelen(conn->pcb.tcp) >= TCP_SNDQUEUELOWAT)) {
 801813a:	687b      	ldr	r3, [r7, #4]
 801813c:	685b      	ldr	r3, [r3, #4]
 801813e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
      } else if ((tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT) ||
 8018142:	2b07      	cmp	r3, #7
 8018144:	d909      	bls.n	801815a <lwip_netconn_do_writemore+0x2ca>
        /* The queued byte- or pbuf-count exceeds the configured low-water limit,
           let select mark this pcb as non-writable. */
        API_EVENT(conn, NETCONN_EVT_SENDMINUS, 0);
 8018146:	687b      	ldr	r3, [r7, #4]
 8018148:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 801814a:	2b00      	cmp	r3, #0
 801814c:	d005      	beq.n	801815a <lwip_netconn_do_writemore+0x2ca>
 801814e:	687b      	ldr	r3, [r7, #4]
 8018150:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8018152:	2200      	movs	r2, #0
 8018154:	2103      	movs	r1, #3
 8018156:	6878      	ldr	r0, [r7, #4]
 8018158:	4798      	blx	r3
      }
    }

    if (err == ERR_OK) {
 801815a:	f997 301f 	ldrsb.w	r3, [r7, #31]
 801815e:	2b00      	cmp	r3, #0
 8018160:	d11d      	bne.n	801819e <lwip_netconn_do_writemore+0x30e>
      err_t out_err;
      if ((conn->current_msg->msg.w.offset == conn->current_msg->msg.w.len) || dontblock) {
 8018162:	687b      	ldr	r3, [r7, #4]
 8018164:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8018166:	699a      	ldr	r2, [r3, #24]
 8018168:	687b      	ldr	r3, [r7, #4]
 801816a:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801816c:	695b      	ldr	r3, [r3, #20]
 801816e:	429a      	cmp	r2, r3
 8018170:	d002      	beq.n	8018178 <lwip_netconn_do_writemore+0x2e8>
 8018172:	7e3b      	ldrb	r3, [r7, #24]
 8018174:	2b00      	cmp	r3, #0
 8018176:	d001      	beq.n	801817c <lwip_netconn_do_writemore+0x2ec>
        /* return sent length (caller reads length from msg.w.offset) */
        write_finished = 1;
 8018178:	2301      	movs	r3, #1
 801817a:	76fb      	strb	r3, [r7, #27]
      }
      out_err = tcp_output(conn->pcb.tcp);
 801817c:	687b      	ldr	r3, [r7, #4]
 801817e:	685b      	ldr	r3, [r3, #4]
 8018180:	4618      	mov	r0, r3
 8018182:	f008 fddf 	bl	8020d44 <tcp_output>
 8018186:	4603      	mov	r3, r0
 8018188:	733b      	strb	r3, [r7, #12]
      if (out_err == ERR_RTE) {
 801818a:	f997 300c 	ldrsb.w	r3, [r7, #12]
 801818e:	f113 0f04 	cmn.w	r3, #4
 8018192:	d12c      	bne.n	80181ee <lwip_netconn_do_writemore+0x35e>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 8018194:	7b3b      	ldrb	r3, [r7, #12]
 8018196:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 8018198:	2301      	movs	r3, #1
 801819a:	76fb      	strb	r3, [r7, #27]
 801819c:	e027      	b.n	80181ee <lwip_netconn_do_writemore+0x35e>
      }
    } else if (err == ERR_MEM) {
 801819e:	f997 301f 	ldrsb.w	r3, [r7, #31]
 80181a2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80181a6:	d120      	bne.n	80181ea <lwip_netconn_do_writemore+0x35a>
         For blocking sockets, we do NOT return to the application
         thread, since ERR_MEM is only a temporary error! Non-blocking
         will remain non-writable until sent_tcp/poll_tcp is called */

      /* tcp_write returned ERR_MEM, try tcp_output anyway */
      err_t out_err = tcp_output(conn->pcb.tcp);
 80181a8:	687b      	ldr	r3, [r7, #4]
 80181aa:	685b      	ldr	r3, [r3, #4]
 80181ac:	4618      	mov	r0, r3
 80181ae:	f008 fdc9 	bl	8020d44 <tcp_output>
 80181b2:	4603      	mov	r3, r0
 80181b4:	737b      	strb	r3, [r7, #13]
      if (out_err == ERR_RTE) {
 80181b6:	f997 300d 	ldrsb.w	r3, [r7, #13]
 80181ba:	f113 0f04 	cmn.w	r3, #4
 80181be:	d104      	bne.n	80181ca <lwip_netconn_do_writemore+0x33a>
        /* If tcp_output fails because no route is found,
           don't try writing any more but return the error
           to the application thread. */
        err = out_err;
 80181c0:	7b7b      	ldrb	r3, [r7, #13]
 80181c2:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 80181c4:	2301      	movs	r3, #1
 80181c6:	76fb      	strb	r3, [r7, #27]
 80181c8:	e011      	b.n	80181ee <lwip_netconn_do_writemore+0x35e>
      } else if (dontblock) {
 80181ca:	7e3b      	ldrb	r3, [r7, #24]
 80181cc:	2b00      	cmp	r3, #0
 80181ce:	d00e      	beq.n	80181ee <lwip_netconn_do_writemore+0x35e>
        /* non-blocking write is done on ERR_MEM, set error according
           to partial write or not */
        err = (conn->current_msg->msg.w.offset == 0) ? ERR_WOULDBLOCK : ERR_OK;
 80181d0:	687b      	ldr	r3, [r7, #4]
 80181d2:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80181d4:	699b      	ldr	r3, [r3, #24]
 80181d6:	2b00      	cmp	r3, #0
 80181d8:	d102      	bne.n	80181e0 <lwip_netconn_do_writemore+0x350>
 80181da:	f06f 0306 	mvn.w	r3, #6
 80181de:	e000      	b.n	80181e2 <lwip_netconn_do_writemore+0x352>
 80181e0:	2300      	movs	r3, #0
 80181e2:	77fb      	strb	r3, [r7, #31]
        write_finished = 1;
 80181e4:	2301      	movs	r3, #1
 80181e6:	76fb      	strb	r3, [r7, #27]
 80181e8:	e001      	b.n	80181ee <lwip_netconn_do_writemore+0x35e>
      }
    } else {
      /* On errors != ERR_MEM, we don't try writing any more but return
         the error to the application thread. */
      write_finished = 1;
 80181ea:	2301      	movs	r3, #1
 80181ec:	76fb      	strb	r3, [r7, #27]
    }
  }
  if (write_finished) {
 80181ee:	7efb      	ldrb	r3, [r7, #27]
 80181f0:	2b00      	cmp	r3, #0
 80181f2:	d015      	beq.n	8018220 <lwip_netconn_do_writemore+0x390>
    /* everything was written: set back connection state
       and back to application task */
    sys_sem_t *op_completed_sem = LWIP_API_MSG_SEM(conn->current_msg);
 80181f4:	687b      	ldr	r3, [r7, #4]
 80181f6:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80181f8:	681b      	ldr	r3, [r3, #0]
 80181fa:	330c      	adds	r3, #12
 80181fc:	60bb      	str	r3, [r7, #8]
    conn->current_msg->err = err;
 80181fe:	687b      	ldr	r3, [r7, #4]
 8018200:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8018202:	7ffa      	ldrb	r2, [r7, #31]
 8018204:	711a      	strb	r2, [r3, #4]
    conn->current_msg = NULL;
 8018206:	687b      	ldr	r3, [r7, #4]
 8018208:	2200      	movs	r2, #0
 801820a:	62da      	str	r2, [r3, #44]	@ 0x2c
    conn->state = NETCONN_NONE;
 801820c:	687b      	ldr	r3, [r7, #4]
 801820e:	2200      	movs	r2, #0
 8018210:	705a      	strb	r2, [r3, #1]
#if LWIP_TCPIP_CORE_LOCKING
    if (delayed)
 8018212:	78fb      	ldrb	r3, [r7, #3]
 8018214:	2b00      	cmp	r3, #0
 8018216:	d006      	beq.n	8018226 <lwip_netconn_do_writemore+0x396>
#endif
    {
      sys_sem_signal(op_completed_sem);
 8018218:	68b8      	ldr	r0, [r7, #8]
 801821a:	f00f f8f3 	bl	8027404 <sys_sem_signal>
 801821e:	e002      	b.n	8018226 <lwip_netconn_do_writemore+0x396>
    }
  }
#if LWIP_TCPIP_CORE_LOCKING
  else {
    return ERR_MEM;
 8018220:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018224:	e000      	b.n	8018228 <lwip_netconn_do_writemore+0x398>
  }
#endif
  return ERR_OK;
 8018226:	2300      	movs	r3, #0
}
 8018228:	4618      	mov	r0, r3
 801822a:	3720      	adds	r7, #32
 801822c:	46bd      	mov	sp, r7
 801822e:	bd80      	pop	{r7, pc}

08018230 <lwip_netconn_do_write>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_write(void *m)
{
 8018230:	b580      	push	{r7, lr}
 8018232:	b084      	sub	sp, #16
 8018234:	af00      	add	r7, sp, #0
 8018236:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8018238:	687b      	ldr	r3, [r7, #4]
 801823a:	60bb      	str	r3, [r7, #8]

  err_t err = netconn_err(msg->conn);
 801823c:	68bb      	ldr	r3, [r7, #8]
 801823e:	681b      	ldr	r3, [r3, #0]
 8018240:	4618      	mov	r0, r3
 8018242:	f7fe fca7 	bl	8016b94 <netconn_err>
 8018246:	4603      	mov	r3, r0
 8018248:	73fb      	strb	r3, [r7, #15]
  if (err == ERR_OK) {
 801824a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801824e:	2b00      	cmp	r3, #0
 8018250:	d164      	bne.n	801831c <lwip_netconn_do_write+0xec>
    if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) {
 8018252:	68bb      	ldr	r3, [r7, #8]
 8018254:	681b      	ldr	r3, [r3, #0]
 8018256:	781b      	ldrb	r3, [r3, #0]
 8018258:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801825c:	2b10      	cmp	r3, #16
 801825e:	d15b      	bne.n	8018318 <lwip_netconn_do_write+0xe8>
#if LWIP_TCP
      if (msg->conn->state != NETCONN_NONE) {
 8018260:	68bb      	ldr	r3, [r7, #8]
 8018262:	681b      	ldr	r3, [r3, #0]
 8018264:	785b      	ldrb	r3, [r3, #1]
 8018266:	2b00      	cmp	r3, #0
 8018268:	d002      	beq.n	8018270 <lwip_netconn_do_write+0x40>
        /* netconn is connecting, closing or in blocking write */
        err = ERR_INPROGRESS;
 801826a:	23fb      	movs	r3, #251	@ 0xfb
 801826c:	73fb      	strb	r3, [r7, #15]
 801826e:	e055      	b.n	801831c <lwip_netconn_do_write+0xec>
      } else if (msg->conn->pcb.tcp != NULL) {
 8018270:	68bb      	ldr	r3, [r7, #8]
 8018272:	681b      	ldr	r3, [r3, #0]
 8018274:	685b      	ldr	r3, [r3, #4]
 8018276:	2b00      	cmp	r3, #0
 8018278:	d04b      	beq.n	8018312 <lwip_netconn_do_write+0xe2>
        msg->conn->state = NETCONN_WRITE;
 801827a:	68bb      	ldr	r3, [r7, #8]
 801827c:	681b      	ldr	r3, [r3, #0]
 801827e:	2201      	movs	r2, #1
 8018280:	705a      	strb	r2, [r3, #1]
        /* set all the variables used by lwip_netconn_do_writemore */
        LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 8018282:	68bb      	ldr	r3, [r7, #8]
 8018284:	681b      	ldr	r3, [r3, #0]
 8018286:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 8018288:	2b00      	cmp	r3, #0
 801828a:	d006      	beq.n	801829a <lwip_netconn_do_write+0x6a>
 801828c:	4b27      	ldr	r3, [pc, #156]	@ (801832c <lwip_netconn_do_write+0xfc>)
 801828e:	f240 7223 	movw	r2, #1827	@ 0x723
 8018292:	4927      	ldr	r1, [pc, #156]	@ (8018330 <lwip_netconn_do_write+0x100>)
 8018294:	4827      	ldr	r0, [pc, #156]	@ (8018334 <lwip_netconn_do_write+0x104>)
 8018296:	f012 fbe1 	bl	802aa5c <iprintf>
        LWIP_ASSERT("msg->msg.w.len != 0", msg->msg.w.len != 0);
 801829a:	68bb      	ldr	r3, [r7, #8]
 801829c:	695b      	ldr	r3, [r3, #20]
 801829e:	2b00      	cmp	r3, #0
 80182a0:	d106      	bne.n	80182b0 <lwip_netconn_do_write+0x80>
 80182a2:	4b22      	ldr	r3, [pc, #136]	@ (801832c <lwip_netconn_do_write+0xfc>)
 80182a4:	f240 7224 	movw	r2, #1828	@ 0x724
 80182a8:	4923      	ldr	r1, [pc, #140]	@ (8018338 <lwip_netconn_do_write+0x108>)
 80182aa:	4822      	ldr	r0, [pc, #136]	@ (8018334 <lwip_netconn_do_write+0x104>)
 80182ac:	f012 fbd6 	bl	802aa5c <iprintf>
        msg->conn->current_msg = msg;
 80182b0:	68bb      	ldr	r3, [r7, #8]
 80182b2:	681b      	ldr	r3, [r3, #0]
 80182b4:	68ba      	ldr	r2, [r7, #8]
 80182b6:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
        if (lwip_netconn_do_writemore(msg->conn, 0) != ERR_OK) {
 80182b8:	68bb      	ldr	r3, [r7, #8]
 80182ba:	681b      	ldr	r3, [r3, #0]
 80182bc:	2100      	movs	r1, #0
 80182be:	4618      	mov	r0, r3
 80182c0:	f7ff fde6 	bl	8017e90 <lwip_netconn_do_writemore>
 80182c4:	4603      	mov	r3, r0
 80182c6:	2b00      	cmp	r3, #0
 80182c8:	d02c      	beq.n	8018324 <lwip_netconn_do_write+0xf4>
          LWIP_ASSERT("state!", msg->conn->state == NETCONN_WRITE);
 80182ca:	68bb      	ldr	r3, [r7, #8]
 80182cc:	681b      	ldr	r3, [r3, #0]
 80182ce:	785b      	ldrb	r3, [r3, #1]
 80182d0:	2b01      	cmp	r3, #1
 80182d2:	d006      	beq.n	80182e2 <lwip_netconn_do_write+0xb2>
 80182d4:	4b15      	ldr	r3, [pc, #84]	@ (801832c <lwip_netconn_do_write+0xfc>)
 80182d6:	f44f 62e5 	mov.w	r2, #1832	@ 0x728
 80182da:	4918      	ldr	r1, [pc, #96]	@ (801833c <lwip_netconn_do_write+0x10c>)
 80182dc:	4815      	ldr	r0, [pc, #84]	@ (8018334 <lwip_netconn_do_write+0x104>)
 80182de:	f012 fbbd 	bl	802aa5c <iprintf>
          UNLOCK_TCPIP_CORE();
 80182e2:	f7f8 ff81 	bl	80111e8 <sys_unlock_tcpip_core>
          sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 80182e6:	68bb      	ldr	r3, [r7, #8]
 80182e8:	681b      	ldr	r3, [r3, #0]
 80182ea:	330c      	adds	r3, #12
 80182ec:	2100      	movs	r1, #0
 80182ee:	4618      	mov	r0, r3
 80182f0:	f00f f857 	bl	80273a2 <sys_arch_sem_wait>
          LOCK_TCPIP_CORE();
 80182f4:	f7f8 ff68 	bl	80111c8 <sys_lock_tcpip_core>
          LWIP_ASSERT("state!", msg->conn->state != NETCONN_WRITE);
 80182f8:	68bb      	ldr	r3, [r7, #8]
 80182fa:	681b      	ldr	r3, [r3, #0]
 80182fc:	785b      	ldrb	r3, [r3, #1]
 80182fe:	2b01      	cmp	r3, #1
 8018300:	d110      	bne.n	8018324 <lwip_netconn_do_write+0xf4>
 8018302:	4b0a      	ldr	r3, [pc, #40]	@ (801832c <lwip_netconn_do_write+0xfc>)
 8018304:	f240 722c 	movw	r2, #1836	@ 0x72c
 8018308:	490c      	ldr	r1, [pc, #48]	@ (801833c <lwip_netconn_do_write+0x10c>)
 801830a:	480a      	ldr	r0, [pc, #40]	@ (8018334 <lwip_netconn_do_write+0x104>)
 801830c:	f012 fba6 	bl	802aa5c <iprintf>
#else /* LWIP_TCPIP_CORE_LOCKING */
        lwip_netconn_do_writemore(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
        /* for both cases: if lwip_netconn_do_writemore was called, don't ACK the APIMSG
           since lwip_netconn_do_writemore ACKs it! */
        return;
 8018310:	e008      	b.n	8018324 <lwip_netconn_do_write+0xf4>
      } else {
        err = ERR_CONN;
 8018312:	23f5      	movs	r3, #245	@ 0xf5
 8018314:	73fb      	strb	r3, [r7, #15]
 8018316:	e001      	b.n	801831c <lwip_netconn_do_write+0xec>
#else /* LWIP_TCP */
      err = ERR_VAL;
#endif /* LWIP_TCP */
#if (LWIP_UDP || LWIP_RAW)
    } else {
      err = ERR_VAL;
 8018318:	23fa      	movs	r3, #250	@ 0xfa
 801831a:	73fb      	strb	r3, [r7, #15]
#endif /* (LWIP_UDP || LWIP_RAW) */
    }
  }
  msg->err = err;
 801831c:	68bb      	ldr	r3, [r7, #8]
 801831e:	7bfa      	ldrb	r2, [r7, #15]
 8018320:	711a      	strb	r2, [r3, #4]
 8018322:	e000      	b.n	8018326 <lwip_netconn_do_write+0xf6>
        return;
 8018324:	bf00      	nop
  TCPIP_APIMSG_ACK(msg);
}
 8018326:	3710      	adds	r7, #16
 8018328:	46bd      	mov	sp, r7
 801832a:	bd80      	pop	{r7, pc}
 801832c:	0802e154 	.word	0x0802e154
 8018330:	0802e4f8 	.word	0x0802e4f8
 8018334:	0802e198 	.word	0x0802e198
 8018338:	0802e680 	.word	0x0802e680
 801833c:	0802e514 	.word	0x0802e514

08018340 <lwip_netconn_do_getaddr>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_getaddr(void *m)
{
 8018340:	b580      	push	{r7, lr}
 8018342:	b084      	sub	sp, #16
 8018344:	af00      	add	r7, sp, #0
 8018346:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8018348:	687b      	ldr	r3, [r7, #4]
 801834a:	60fb      	str	r3, [r7, #12]

  if (msg->conn->pcb.ip != NULL) {
 801834c:	68fb      	ldr	r3, [r7, #12]
 801834e:	681b      	ldr	r3, [r3, #0]
 8018350:	685b      	ldr	r3, [r3, #4]
 8018352:	2b00      	cmp	r3, #0
 8018354:	d06b      	beq.n	801842e <lwip_netconn_do_getaddr+0xee>
    if (msg->msg.ad.local) {
 8018356:	68fb      	ldr	r3, [r7, #12]
 8018358:	7c1b      	ldrb	r3, [r3, #16]
 801835a:	2b00      	cmp	r3, #0
 801835c:	d007      	beq.n	801836e <lwip_netconn_do_getaddr+0x2e>
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 801835e:	68fb      	ldr	r3, [r7, #12]
 8018360:	681b      	ldr	r3, [r3, #0]
 8018362:	685a      	ldr	r2, [r3, #4]
 8018364:	68fb      	ldr	r3, [r7, #12]
 8018366:	689b      	ldr	r3, [r3, #8]
 8018368:	6812      	ldr	r2, [r2, #0]
 801836a:	601a      	str	r2, [r3, #0]
 801836c:	e006      	b.n	801837c <lwip_netconn_do_getaddr+0x3c>
                   msg->conn->pcb.ip->local_ip);
    } else {
      ip_addr_copy(API_EXPR_DEREF(msg->msg.ad.ipaddr),
 801836e:	68fb      	ldr	r3, [r7, #12]
 8018370:	681b      	ldr	r3, [r3, #0]
 8018372:	685a      	ldr	r2, [r3, #4]
 8018374:	68fb      	ldr	r3, [r7, #12]
 8018376:	689b      	ldr	r3, [r3, #8]
 8018378:	6852      	ldr	r2, [r2, #4]
 801837a:	601a      	str	r2, [r3, #0]
                   msg->conn->pcb.ip->remote_ip);
    }

    msg->err = ERR_OK;
 801837c:	68fb      	ldr	r3, [r7, #12]
 801837e:	2200      	movs	r2, #0
 8018380:	711a      	strb	r2, [r3, #4]
    switch (NETCONNTYPE_GROUP(msg->conn->type)) {
 8018382:	68fb      	ldr	r3, [r7, #12]
 8018384:	681b      	ldr	r3, [r3, #0]
 8018386:	781b      	ldrb	r3, [r3, #0]
 8018388:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801838c:	2b10      	cmp	r3, #16
 801838e:	d021      	beq.n	80183d4 <lwip_netconn_do_getaddr+0x94>
 8018390:	2b20      	cmp	r3, #32
 8018392:	d144      	bne.n	801841e <lwip_netconn_do_getaddr+0xde>
        }
        break;
#endif /* LWIP_RAW */
#if LWIP_UDP
      case NETCONN_UDP:
        if (msg->msg.ad.local) {
 8018394:	68fb      	ldr	r3, [r7, #12]
 8018396:	7c1b      	ldrb	r3, [r3, #16]
 8018398:	2b00      	cmp	r3, #0
 801839a:	d007      	beq.n	80183ac <lwip_netconn_do_getaddr+0x6c>
          API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->local_port;
 801839c:	68fb      	ldr	r3, [r7, #12]
 801839e:	681b      	ldr	r3, [r3, #0]
 80183a0:	685a      	ldr	r2, [r3, #4]
 80183a2:	68fb      	ldr	r3, [r7, #12]
 80183a4:	68db      	ldr	r3, [r3, #12]
 80183a6:	8a52      	ldrh	r2, [r2, #18]
 80183a8:	801a      	strh	r2, [r3, #0]
            msg->err = ERR_CONN;
          } else {
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
          }
        }
        break;
 80183aa:	e044      	b.n	8018436 <lwip_netconn_do_getaddr+0xf6>
          if ((msg->conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0) {
 80183ac:	68fb      	ldr	r3, [r7, #12]
 80183ae:	681b      	ldr	r3, [r3, #0]
 80183b0:	685b      	ldr	r3, [r3, #4]
 80183b2:	7c1b      	ldrb	r3, [r3, #16]
 80183b4:	f003 0304 	and.w	r3, r3, #4
 80183b8:	2b00      	cmp	r3, #0
 80183ba:	d103      	bne.n	80183c4 <lwip_netconn_do_getaddr+0x84>
            msg->err = ERR_CONN;
 80183bc:	68fb      	ldr	r3, [r7, #12]
 80183be:	22f5      	movs	r2, #245	@ 0xf5
 80183c0:	711a      	strb	r2, [r3, #4]
        break;
 80183c2:	e038      	b.n	8018436 <lwip_netconn_do_getaddr+0xf6>
            API_EXPR_DEREF(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port;
 80183c4:	68fb      	ldr	r3, [r7, #12]
 80183c6:	681b      	ldr	r3, [r3, #0]
 80183c8:	685a      	ldr	r2, [r3, #4]
 80183ca:	68fb      	ldr	r3, [r7, #12]
 80183cc:	68db      	ldr	r3, [r3, #12]
 80183ce:	8a92      	ldrh	r2, [r2, #20]
 80183d0:	801a      	strh	r2, [r3, #0]
        break;
 80183d2:	e030      	b.n	8018436 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case NETCONN_TCP:
        if ((msg->msg.ad.local == 0) &&
 80183d4:	68fb      	ldr	r3, [r7, #12]
 80183d6:	7c1b      	ldrb	r3, [r3, #16]
 80183d8:	2b00      	cmp	r3, #0
 80183da:	d10f      	bne.n	80183fc <lwip_netconn_do_getaddr+0xbc>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 80183dc:	68fb      	ldr	r3, [r7, #12]
 80183de:	681b      	ldr	r3, [r3, #0]
 80183e0:	685b      	ldr	r3, [r3, #4]
 80183e2:	7d1b      	ldrb	r3, [r3, #20]
        if ((msg->msg.ad.local == 0) &&
 80183e4:	2b00      	cmp	r3, #0
 80183e6:	d005      	beq.n	80183f4 <lwip_netconn_do_getaddr+0xb4>
            ((msg->conn->pcb.tcp->state == CLOSED) || (msg->conn->pcb.tcp->state == LISTEN))) {
 80183e8:	68fb      	ldr	r3, [r7, #12]
 80183ea:	681b      	ldr	r3, [r3, #0]
 80183ec:	685b      	ldr	r3, [r3, #4]
 80183ee:	7d1b      	ldrb	r3, [r3, #20]
 80183f0:	2b01      	cmp	r3, #1
 80183f2:	d103      	bne.n	80183fc <lwip_netconn_do_getaddr+0xbc>
          /* pcb is not connected and remote name is requested */
          msg->err = ERR_CONN;
 80183f4:	68fb      	ldr	r3, [r7, #12]
 80183f6:	22f5      	movs	r2, #245	@ 0xf5
 80183f8:	711a      	strb	r2, [r3, #4]
        } else {
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
        }
        break;
 80183fa:	e01c      	b.n	8018436 <lwip_netconn_do_getaddr+0xf6>
          API_EXPR_DEREF(msg->msg.ad.port) = (msg->msg.ad.local ? msg->conn->pcb.tcp->local_port : msg->conn->pcb.tcp->remote_port);
 80183fc:	68fb      	ldr	r3, [r7, #12]
 80183fe:	7c1b      	ldrb	r3, [r3, #16]
 8018400:	2b00      	cmp	r3, #0
 8018402:	d004      	beq.n	801840e <lwip_netconn_do_getaddr+0xce>
 8018404:	68fb      	ldr	r3, [r7, #12]
 8018406:	681b      	ldr	r3, [r3, #0]
 8018408:	685b      	ldr	r3, [r3, #4]
 801840a:	8adb      	ldrh	r3, [r3, #22]
 801840c:	e003      	b.n	8018416 <lwip_netconn_do_getaddr+0xd6>
 801840e:	68fb      	ldr	r3, [r7, #12]
 8018410:	681b      	ldr	r3, [r3, #0]
 8018412:	685b      	ldr	r3, [r3, #4]
 8018414:	8b1b      	ldrh	r3, [r3, #24]
 8018416:	68fa      	ldr	r2, [r7, #12]
 8018418:	68d2      	ldr	r2, [r2, #12]
 801841a:	8013      	strh	r3, [r2, #0]
        break;
 801841c:	e00b      	b.n	8018436 <lwip_netconn_do_getaddr+0xf6>
#endif /* LWIP_TCP */
      default:
        LWIP_ASSERT("invalid netconn_type", 0);
 801841e:	4b08      	ldr	r3, [pc, #32]	@ (8018440 <lwip_netconn_do_getaddr+0x100>)
 8018420:	f240 727d 	movw	r2, #1917	@ 0x77d
 8018424:	4907      	ldr	r1, [pc, #28]	@ (8018444 <lwip_netconn_do_getaddr+0x104>)
 8018426:	4808      	ldr	r0, [pc, #32]	@ (8018448 <lwip_netconn_do_getaddr+0x108>)
 8018428:	f012 fb18 	bl	802aa5c <iprintf>
        break;
 801842c:	e003      	b.n	8018436 <lwip_netconn_do_getaddr+0xf6>
    }
  } else {
    msg->err = ERR_CONN;
 801842e:	68fb      	ldr	r3, [r7, #12]
 8018430:	22f5      	movs	r2, #245	@ 0xf5
 8018432:	711a      	strb	r2, [r3, #4]
  }
  TCPIP_APIMSG_ACK(msg);
}
 8018434:	bf00      	nop
 8018436:	bf00      	nop
 8018438:	3710      	adds	r7, #16
 801843a:	46bd      	mov	sp, r7
 801843c:	bd80      	pop	{r7, pc}
 801843e:	bf00      	nop
 8018440:	0802e154 	.word	0x0802e154
 8018444:	0802e694 	.word	0x0802e694
 8018448:	0802e198 	.word	0x0802e198

0801844c <lwip_netconn_do_close>:
 *
 * @param m the api_msg pointing to the connection
 */
void
lwip_netconn_do_close(void *m)
{
 801844c:	b580      	push	{r7, lr}
 801844e:	b084      	sub	sp, #16
 8018450:	af00      	add	r7, sp, #0
 8018452:	6078      	str	r0, [r7, #4]
  struct api_msg *msg = (struct api_msg *)m;
 8018454:	687b      	ldr	r3, [r7, #4]
 8018456:	60fb      	str	r3, [r7, #12]

#if LWIP_TCP
  enum netconn_state state = msg->conn->state;
 8018458:	68fb      	ldr	r3, [r7, #12]
 801845a:	681b      	ldr	r3, [r3, #0]
 801845c:	785b      	ldrb	r3, [r3, #1]
 801845e:	72fb      	strb	r3, [r7, #11]
  /* First check if this is a TCP netconn and if it is in a correct state
      (LISTEN doesn't support half shutdown) */
  if ((msg->conn->pcb.tcp != NULL) &&
 8018460:	68fb      	ldr	r3, [r7, #12]
 8018462:	681b      	ldr	r3, [r3, #0]
 8018464:	685b      	ldr	r3, [r3, #4]
 8018466:	2b00      	cmp	r3, #0
 8018468:	d067      	beq.n	801853a <lwip_netconn_do_close+0xee>
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 801846a:	68fb      	ldr	r3, [r7, #12]
 801846c:	681b      	ldr	r3, [r3, #0]
 801846e:	781b      	ldrb	r3, [r3, #0]
 8018470:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if ((msg->conn->pcb.tcp != NULL) &&
 8018474:	2b10      	cmp	r3, #16
 8018476:	d160      	bne.n	801853a <lwip_netconn_do_close+0xee>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 8018478:	68fb      	ldr	r3, [r7, #12]
 801847a:	7a1b      	ldrb	r3, [r3, #8]
      (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_TCP) &&
 801847c:	2b03      	cmp	r3, #3
 801847e:	d002      	beq.n	8018486 <lwip_netconn_do_close+0x3a>
      ((msg->msg.sd.shut == NETCONN_SHUT_RDWR) || (state != NETCONN_LISTEN))) {
 8018480:	7afb      	ldrb	r3, [r7, #11]
 8018482:	2b02      	cmp	r3, #2
 8018484:	d059      	beq.n	801853a <lwip_netconn_do_close+0xee>
    /* Check if we are in a connected state */
    if (state == NETCONN_CONNECT) {
 8018486:	7afb      	ldrb	r3, [r7, #11]
 8018488:	2b03      	cmp	r3, #3
 801848a:	d103      	bne.n	8018494 <lwip_netconn_do_close+0x48>
      /* TCP connect in progress: cannot shutdown */
      msg->err = ERR_CONN;
 801848c:	68fb      	ldr	r3, [r7, #12]
 801848e:	22f5      	movs	r2, #245	@ 0xf5
 8018490:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 8018492:	e057      	b.n	8018544 <lwip_netconn_do_close+0xf8>
    } else if (state == NETCONN_WRITE) {
 8018494:	7afb      	ldrb	r3, [r7, #11]
 8018496:	2b01      	cmp	r3, #1
 8018498:	d103      	bne.n	80184a2 <lwip_netconn_do_close+0x56>
        msg->err = tcp_shutdown(msg->conn->pcb.tcp, 1, 0);
      }
    }
    if (state == NETCONN_NONE) {
#else /* LWIP_NETCONN_FULLDUPLEX */
      msg->err = ERR_INPROGRESS;
 801849a:	68fb      	ldr	r3, [r7, #12]
 801849c:	22fb      	movs	r2, #251	@ 0xfb
 801849e:	711a      	strb	r2, [r3, #4]
    if (state == NETCONN_CONNECT) {
 80184a0:	e050      	b.n	8018544 <lwip_netconn_do_close+0xf8>
    } else {
#endif /* LWIP_NETCONN_FULLDUPLEX */
      if (msg->msg.sd.shut & NETCONN_SHUT_RD) {
 80184a2:	68fb      	ldr	r3, [r7, #12]
 80184a4:	7a1b      	ldrb	r3, [r3, #8]
 80184a6:	f003 0301 	and.w	r3, r3, #1
 80184aa:	2b00      	cmp	r3, #0
 80184ac:	d004      	beq.n	80184b8 <lwip_netconn_do_close+0x6c>
#if LWIP_NETCONN_FULLDUPLEX
        /* Mark mboxes invalid */
        netconn_mark_mbox_invalid(msg->conn);
#else /* LWIP_NETCONN_FULLDUPLEX */
        netconn_drain(msg->conn);
 80184ae:	68fb      	ldr	r3, [r7, #12]
 80184b0:	681b      	ldr	r3, [r3, #0]
 80184b2:	4618      	mov	r0, r3
 80184b4:	f7ff f82e 	bl	8017514 <netconn_drain>
#endif /* LWIP_NETCONN_FULLDUPLEX */
      }
      LWIP_ASSERT("already writing or closing", msg->conn->current_msg == NULL);
 80184b8:	68fb      	ldr	r3, [r7, #12]
 80184ba:	681b      	ldr	r3, [r3, #0]
 80184bc:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80184be:	2b00      	cmp	r3, #0
 80184c0:	d006      	beq.n	80184d0 <lwip_netconn_do_close+0x84>
 80184c2:	4b22      	ldr	r3, [pc, #136]	@ (801854c <lwip_netconn_do_close+0x100>)
 80184c4:	f240 72bd 	movw	r2, #1981	@ 0x7bd
 80184c8:	4921      	ldr	r1, [pc, #132]	@ (8018550 <lwip_netconn_do_close+0x104>)
 80184ca:	4822      	ldr	r0, [pc, #136]	@ (8018554 <lwip_netconn_do_close+0x108>)
 80184cc:	f012 fac6 	bl	802aa5c <iprintf>
      msg->conn->state = NETCONN_CLOSE;
 80184d0:	68fb      	ldr	r3, [r7, #12]
 80184d2:	681b      	ldr	r3, [r3, #0]
 80184d4:	2204      	movs	r2, #4
 80184d6:	705a      	strb	r2, [r3, #1]
      msg->conn->current_msg = msg;
 80184d8:	68fb      	ldr	r3, [r7, #12]
 80184da:	681b      	ldr	r3, [r3, #0]
 80184dc:	68fa      	ldr	r2, [r7, #12]
 80184de:	62da      	str	r2, [r3, #44]	@ 0x2c
#if LWIP_TCPIP_CORE_LOCKING
      if (lwip_netconn_do_close_internal(msg->conn, 0) != ERR_OK) {
 80184e0:	68fb      	ldr	r3, [r7, #12]
 80184e2:	681b      	ldr	r3, [r3, #0]
 80184e4:	2100      	movs	r1, #0
 80184e6:	4618      	mov	r0, r3
 80184e8:	f7ff f892 	bl	8017610 <lwip_netconn_do_close_internal>
 80184ec:	4603      	mov	r3, r0
 80184ee:	2b00      	cmp	r3, #0
 80184f0:	d027      	beq.n	8018542 <lwip_netconn_do_close+0xf6>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_CLOSE);
 80184f2:	68fb      	ldr	r3, [r7, #12]
 80184f4:	681b      	ldr	r3, [r3, #0]
 80184f6:	785b      	ldrb	r3, [r3, #1]
 80184f8:	2b04      	cmp	r3, #4
 80184fa:	d006      	beq.n	801850a <lwip_netconn_do_close+0xbe>
 80184fc:	4b13      	ldr	r3, [pc, #76]	@ (801854c <lwip_netconn_do_close+0x100>)
 80184fe:	f240 72c2 	movw	r2, #1986	@ 0x7c2
 8018502:	4915      	ldr	r1, [pc, #84]	@ (8018558 <lwip_netconn_do_close+0x10c>)
 8018504:	4813      	ldr	r0, [pc, #76]	@ (8018554 <lwip_netconn_do_close+0x108>)
 8018506:	f012 faa9 	bl	802aa5c <iprintf>
        UNLOCK_TCPIP_CORE();
 801850a:	f7f8 fe6d 	bl	80111e8 <sys_unlock_tcpip_core>
        sys_arch_sem_wait(LWIP_API_MSG_SEM(msg), 0);
 801850e:	68fb      	ldr	r3, [r7, #12]
 8018510:	681b      	ldr	r3, [r3, #0]
 8018512:	330c      	adds	r3, #12
 8018514:	2100      	movs	r1, #0
 8018516:	4618      	mov	r0, r3
 8018518:	f00e ff43 	bl	80273a2 <sys_arch_sem_wait>
        LOCK_TCPIP_CORE();
 801851c:	f7f8 fe54 	bl	80111c8 <sys_lock_tcpip_core>
        LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE);
 8018520:	68fb      	ldr	r3, [r7, #12]
 8018522:	681b      	ldr	r3, [r3, #0]
 8018524:	785b      	ldrb	r3, [r3, #1]
 8018526:	2b00      	cmp	r3, #0
 8018528:	d00b      	beq.n	8018542 <lwip_netconn_do_close+0xf6>
 801852a:	4b08      	ldr	r3, [pc, #32]	@ (801854c <lwip_netconn_do_close+0x100>)
 801852c:	f240 72c6 	movw	r2, #1990	@ 0x7c6
 8018530:	4909      	ldr	r1, [pc, #36]	@ (8018558 <lwip_netconn_do_close+0x10c>)
 8018532:	4808      	ldr	r0, [pc, #32]	@ (8018554 <lwip_netconn_do_close+0x108>)
 8018534:	f012 fa92 	bl	802aa5c <iprintf>
      }
#else /* LWIP_TCPIP_CORE_LOCKING */
      lwip_netconn_do_close_internal(msg->conn);
#endif /* LWIP_TCPIP_CORE_LOCKING */
      /* for tcp netconns, lwip_netconn_do_close_internal ACKs the message */
      return;
 8018538:	e003      	b.n	8018542 <lwip_netconn_do_close+0xf6>
    }
  } else
#endif /* LWIP_TCP */
  {
    msg->err = ERR_CONN;
 801853a:	68fb      	ldr	r3, [r7, #12]
 801853c:	22f5      	movs	r2, #245	@ 0xf5
 801853e:	711a      	strb	r2, [r3, #4]
 8018540:	e000      	b.n	8018544 <lwip_netconn_do_close+0xf8>
      return;
 8018542:	bf00      	nop
  }
  TCPIP_APIMSG_ACK(msg);
}
 8018544:	3710      	adds	r7, #16
 8018546:	46bd      	mov	sp, r7
 8018548:	bd80      	pop	{r7, pc}
 801854a:	bf00      	nop
 801854c:	0802e154 	.word	0x0802e154
 8018550:	0802e4f8 	.word	0x0802e4f8
 8018554:	0802e198 	.word	0x0802e198
 8018558:	0802e514 	.word	0x0802e514

0801855c <err_to_errno>:
  EIO            /* ERR_ARG        -16     Illegal argument.        */
};

int
err_to_errno(err_t err)
{
 801855c:	b480      	push	{r7}
 801855e:	b083      	sub	sp, #12
 8018560:	af00      	add	r7, sp, #0
 8018562:	4603      	mov	r3, r0
 8018564:	71fb      	strb	r3, [r7, #7]
  if ((err > 0) || (-err >= (err_t)LWIP_ARRAYSIZE(err_to_errno_table))) {
 8018566:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801856a:	2b00      	cmp	r3, #0
 801856c:	dc04      	bgt.n	8018578 <err_to_errno+0x1c>
 801856e:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8018572:	f113 0f10 	cmn.w	r3, #16
 8018576:	da01      	bge.n	801857c <err_to_errno+0x20>
    return EIO;
 8018578:	2305      	movs	r3, #5
 801857a:	e005      	b.n	8018588 <err_to_errno+0x2c>
  }
  return err_to_errno_table[-err];
 801857c:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8018580:	425b      	negs	r3, r3
 8018582:	4a04      	ldr	r2, [pc, #16]	@ (8018594 <err_to_errno+0x38>)
 8018584:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
}
 8018588:	4618      	mov	r0, r3
 801858a:	370c      	adds	r7, #12
 801858c:	46bd      	mov	sp, r7
 801858e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018592:	4770      	bx	lr
 8018594:	08031d60 	.word	0x08031d60

08018598 <netbuf_delete>:
 *
 * @param buf pointer to a netbuf allocated by netbuf_new()
 */
void
netbuf_delete(struct netbuf *buf)
{
 8018598:	b580      	push	{r7, lr}
 801859a:	b082      	sub	sp, #8
 801859c:	af00      	add	r7, sp, #0
 801859e:	6078      	str	r0, [r7, #4]
  if (buf != NULL) {
 80185a0:	687b      	ldr	r3, [r7, #4]
 80185a2:	2b00      	cmp	r3, #0
 80185a4:	d013      	beq.n	80185ce <netbuf_delete+0x36>
    if (buf->p != NULL) {
 80185a6:	687b      	ldr	r3, [r7, #4]
 80185a8:	681b      	ldr	r3, [r3, #0]
 80185aa:	2b00      	cmp	r3, #0
 80185ac:	d00b      	beq.n	80185c6 <netbuf_delete+0x2e>
      pbuf_free(buf->p);
 80185ae:	687b      	ldr	r3, [r7, #4]
 80185b0:	681b      	ldr	r3, [r3, #0]
 80185b2:	4618      	mov	r0, r3
 80185b4:	f002 ffda 	bl	801b56c <pbuf_free>
      buf->p = buf->ptr = NULL;
 80185b8:	687b      	ldr	r3, [r7, #4]
 80185ba:	2200      	movs	r2, #0
 80185bc:	605a      	str	r2, [r3, #4]
 80185be:	687b      	ldr	r3, [r7, #4]
 80185c0:	685a      	ldr	r2, [r3, #4]
 80185c2:	687b      	ldr	r3, [r7, #4]
 80185c4:	601a      	str	r2, [r3, #0]
    }
    memp_free(MEMP_NETBUF, buf);
 80185c6:	6879      	ldr	r1, [r7, #4]
 80185c8:	2006      	movs	r0, #6
 80185ca:	f002 f8e1 	bl	801a790 <memp_free>
  }
}
 80185ce:	bf00      	nop
 80185d0:	3708      	adds	r7, #8
 80185d2:	46bd      	mov	sp, r7
 80185d4:	bd80      	pop	{r7, pc}
	...

080185d8 <netbuf_free>:
 *
 * @param buf pointer to the netbuf which contains the packet buffer to free
 */
void
netbuf_free(struct netbuf *buf)
{
 80185d8:	b580      	push	{r7, lr}
 80185da:	b082      	sub	sp, #8
 80185dc:	af00      	add	r7, sp, #0
 80185de:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;);
 80185e0:	687b      	ldr	r3, [r7, #4]
 80185e2:	2b00      	cmp	r3, #0
 80185e4:	d106      	bne.n	80185f4 <netbuf_free+0x1c>
 80185e6:	4b0d      	ldr	r3, [pc, #52]	@ (801861c <netbuf_free+0x44>)
 80185e8:	2281      	movs	r2, #129	@ 0x81
 80185ea:	490d      	ldr	r1, [pc, #52]	@ (8018620 <netbuf_free+0x48>)
 80185ec:	480d      	ldr	r0, [pc, #52]	@ (8018624 <netbuf_free+0x4c>)
 80185ee:	f012 fa35 	bl	802aa5c <iprintf>
 80185f2:	e00f      	b.n	8018614 <netbuf_free+0x3c>
  if (buf->p != NULL) {
 80185f4:	687b      	ldr	r3, [r7, #4]
 80185f6:	681b      	ldr	r3, [r3, #0]
 80185f8:	2b00      	cmp	r3, #0
 80185fa:	d004      	beq.n	8018606 <netbuf_free+0x2e>
    pbuf_free(buf->p);
 80185fc:	687b      	ldr	r3, [r7, #4]
 80185fe:	681b      	ldr	r3, [r3, #0]
 8018600:	4618      	mov	r0, r3
 8018602:	f002 ffb3 	bl	801b56c <pbuf_free>
  }
  buf->p = buf->ptr = NULL;
 8018606:	687b      	ldr	r3, [r7, #4]
 8018608:	2200      	movs	r2, #0
 801860a:	605a      	str	r2, [r3, #4]
 801860c:	687b      	ldr	r3, [r7, #4]
 801860e:	685a      	ldr	r2, [r3, #4]
 8018610:	687b      	ldr	r3, [r7, #4]
 8018612:	601a      	str	r2, [r3, #0]
#if LWIP_CHECKSUM_ON_COPY
  buf->flags = 0;
  buf->toport_chksum = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
}
 8018614:	3708      	adds	r7, #8
 8018616:	46bd      	mov	sp, r7
 8018618:	bd80      	pop	{r7, pc}
 801861a:	bf00      	nop
 801861c:	0802e6ac 	.word	0x0802e6ac
 8018620:	0802e748 	.word	0x0802e748
 8018624:	0802e6fc 	.word	0x0802e6fc

08018628 <netbuf_ref>:
 * @return ERR_OK if data is referenced
 *         ERR_MEM if data couldn't be referenced due to lack of memory
 */
err_t
netbuf_ref(struct netbuf *buf, const void *dataptr, u16_t size)
{
 8018628:	b580      	push	{r7, lr}
 801862a:	b084      	sub	sp, #16
 801862c:	af00      	add	r7, sp, #0
 801862e:	60f8      	str	r0, [r7, #12]
 8018630:	60b9      	str	r1, [r7, #8]
 8018632:	4613      	mov	r3, r2
 8018634:	80fb      	strh	r3, [r7, #6]
  LWIP_ERROR("netbuf_ref: invalid buf", (buf != NULL), return ERR_ARG;);
 8018636:	68fb      	ldr	r3, [r7, #12]
 8018638:	2b00      	cmp	r3, #0
 801863a:	d108      	bne.n	801864e <netbuf_ref+0x26>
 801863c:	4b1c      	ldr	r3, [pc, #112]	@ (80186b0 <netbuf_ref+0x88>)
 801863e:	2299      	movs	r2, #153	@ 0x99
 8018640:	491c      	ldr	r1, [pc, #112]	@ (80186b4 <netbuf_ref+0x8c>)
 8018642:	481d      	ldr	r0, [pc, #116]	@ (80186b8 <netbuf_ref+0x90>)
 8018644:	f012 fa0a 	bl	802aa5c <iprintf>
 8018648:	f06f 030f 	mvn.w	r3, #15
 801864c:	e02b      	b.n	80186a6 <netbuf_ref+0x7e>
  if (buf->p != NULL) {
 801864e:	68fb      	ldr	r3, [r7, #12]
 8018650:	681b      	ldr	r3, [r3, #0]
 8018652:	2b00      	cmp	r3, #0
 8018654:	d004      	beq.n	8018660 <netbuf_ref+0x38>
    pbuf_free(buf->p);
 8018656:	68fb      	ldr	r3, [r7, #12]
 8018658:	681b      	ldr	r3, [r3, #0]
 801865a:	4618      	mov	r0, r3
 801865c:	f002 ff86 	bl	801b56c <pbuf_free>
  }
  buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF);
 8018660:	2241      	movs	r2, #65	@ 0x41
 8018662:	2100      	movs	r1, #0
 8018664:	2036      	movs	r0, #54	@ 0x36
 8018666:	f002 fc6b 	bl	801af40 <pbuf_alloc>
 801866a:	4602      	mov	r2, r0
 801866c:	68fb      	ldr	r3, [r7, #12]
 801866e:	601a      	str	r2, [r3, #0]
  if (buf->p == NULL) {
 8018670:	68fb      	ldr	r3, [r7, #12]
 8018672:	681b      	ldr	r3, [r3, #0]
 8018674:	2b00      	cmp	r3, #0
 8018676:	d105      	bne.n	8018684 <netbuf_ref+0x5c>
    buf->ptr = NULL;
 8018678:	68fb      	ldr	r3, [r7, #12]
 801867a:	2200      	movs	r2, #0
 801867c:	605a      	str	r2, [r3, #4]
    return ERR_MEM;
 801867e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018682:	e010      	b.n	80186a6 <netbuf_ref+0x7e>
  }
  ((struct pbuf_rom *)buf->p)->payload = dataptr;
 8018684:	68fb      	ldr	r3, [r7, #12]
 8018686:	681b      	ldr	r3, [r3, #0]
 8018688:	68ba      	ldr	r2, [r7, #8]
 801868a:	605a      	str	r2, [r3, #4]
  buf->p->len = buf->p->tot_len = size;
 801868c:	68fb      	ldr	r3, [r7, #12]
 801868e:	681b      	ldr	r3, [r3, #0]
 8018690:	88fa      	ldrh	r2, [r7, #6]
 8018692:	811a      	strh	r2, [r3, #8]
 8018694:	68fa      	ldr	r2, [r7, #12]
 8018696:	6812      	ldr	r2, [r2, #0]
 8018698:	891b      	ldrh	r3, [r3, #8]
 801869a:	8153      	strh	r3, [r2, #10]
  buf->ptr = buf->p;
 801869c:	68fb      	ldr	r3, [r7, #12]
 801869e:	681a      	ldr	r2, [r3, #0]
 80186a0:	68fb      	ldr	r3, [r7, #12]
 80186a2:	605a      	str	r2, [r3, #4]
  return ERR_OK;
 80186a4:	2300      	movs	r3, #0
}
 80186a6:	4618      	mov	r0, r3
 80186a8:	3710      	adds	r7, #16
 80186aa:	46bd      	mov	sp, r7
 80186ac:	bd80      	pop	{r7, pc}
 80186ae:	bf00      	nop
 80186b0:	0802e6ac 	.word	0x0802e6ac
 80186b4:	0802e764 	.word	0x0802e764
 80186b8:	0802e6fc 	.word	0x0802e6fc

080186bc <tryget_socket_unconn_nouse>:
#endif /* LWIP_NETCONN_FULLDUPLEX */

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn_nouse(int fd)
{
 80186bc:	b480      	push	{r7}
 80186be:	b085      	sub	sp, #20
 80186c0:	af00      	add	r7, sp, #0
 80186c2:	6078      	str	r0, [r7, #4]
  int s = fd - LWIP_SOCKET_OFFSET;
 80186c4:	687b      	ldr	r3, [r7, #4]
 80186c6:	60fb      	str	r3, [r7, #12]
  if ((s < 0) || (s >= NUM_SOCKETS)) {
 80186c8:	68fb      	ldr	r3, [r7, #12]
 80186ca:	2b00      	cmp	r3, #0
 80186cc:	db02      	blt.n	80186d4 <tryget_socket_unconn_nouse+0x18>
 80186ce:	68fb      	ldr	r3, [r7, #12]
 80186d0:	2b03      	cmp	r3, #3
 80186d2:	dd01      	ble.n	80186d8 <tryget_socket_unconn_nouse+0x1c>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("tryget_socket_unconn(%d): invalid\n", fd));
    return NULL;
 80186d4:	2300      	movs	r3, #0
 80186d6:	e003      	b.n	80186e0 <tryget_socket_unconn_nouse+0x24>
  }
  return &sockets[s];
 80186d8:	68fb      	ldr	r3, [r7, #12]
 80186da:	011b      	lsls	r3, r3, #4
 80186dc:	4a03      	ldr	r2, [pc, #12]	@ (80186ec <tryget_socket_unconn_nouse+0x30>)
 80186de:	4413      	add	r3, r2
}
 80186e0:	4618      	mov	r0, r3
 80186e2:	3714      	adds	r7, #20
 80186e4:	46bd      	mov	sp, r7
 80186e6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80186ea:	4770      	bx	lr
 80186ec:	24024404 	.word	0x24024404

080186f0 <tryget_socket_unconn>:
}

/* Translate a socket 'int' into a pointer (only fails if the index is invalid) */
static struct lwip_sock *
tryget_socket_unconn(int fd)
{
 80186f0:	b580      	push	{r7, lr}
 80186f2:	b084      	sub	sp, #16
 80186f4:	af00      	add	r7, sp, #0
 80186f6:	6078      	str	r0, [r7, #4]
  struct lwip_sock *ret = tryget_socket_unconn_nouse(fd);
 80186f8:	6878      	ldr	r0, [r7, #4]
 80186fa:	f7ff ffdf 	bl	80186bc <tryget_socket_unconn_nouse>
 80186fe:	60f8      	str	r0, [r7, #12]
  if (ret != NULL) {
    if (!sock_inc_used(ret)) {
      return NULL;
    }
  }
  return ret;
 8018700:	68fb      	ldr	r3, [r7, #12]
}
 8018702:	4618      	mov	r0, r3
 8018704:	3710      	adds	r7, #16
 8018706:	46bd      	mov	sp, r7
 8018708:	bd80      	pop	{r7, pc}

0801870a <tryget_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
tryget_socket(int fd)
{
 801870a:	b580      	push	{r7, lr}
 801870c:	b084      	sub	sp, #16
 801870e:	af00      	add	r7, sp, #0
 8018710:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket_unconn(fd);
 8018712:	6878      	ldr	r0, [r7, #4]
 8018714:	f7ff ffec 	bl	80186f0 <tryget_socket_unconn>
 8018718:	60f8      	str	r0, [r7, #12]
  if (sock != NULL) {
 801871a:	68fb      	ldr	r3, [r7, #12]
 801871c:	2b00      	cmp	r3, #0
 801871e:	d005      	beq.n	801872c <tryget_socket+0x22>
    if (sock->conn) {
 8018720:	68fb      	ldr	r3, [r7, #12]
 8018722:	681b      	ldr	r3, [r3, #0]
 8018724:	2b00      	cmp	r3, #0
 8018726:	d001      	beq.n	801872c <tryget_socket+0x22>
      return sock;
 8018728:	68fb      	ldr	r3, [r7, #12]
 801872a:	e000      	b.n	801872e <tryget_socket+0x24>
    }
    done_socket(sock);
  }
  return NULL;
 801872c:	2300      	movs	r3, #0
}
 801872e:	4618      	mov	r0, r3
 8018730:	3710      	adds	r7, #16
 8018732:	46bd      	mov	sp, r7
 8018734:	bd80      	pop	{r7, pc}
	...

08018738 <get_socket>:
 * @param fd externally used socket index
 * @return struct lwip_sock for the socket or NULL if not found
 */
static struct lwip_sock *
get_socket(int fd)
{
 8018738:	b580      	push	{r7, lr}
 801873a:	b084      	sub	sp, #16
 801873c:	af00      	add	r7, sp, #0
 801873e:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock = tryget_socket(fd);
 8018740:	6878      	ldr	r0, [r7, #4]
 8018742:	f7ff ffe2 	bl	801870a <tryget_socket>
 8018746:	60f8      	str	r0, [r7, #12]
  if (!sock) {
 8018748:	68fb      	ldr	r3, [r7, #12]
 801874a:	2b00      	cmp	r3, #0
 801874c:	d104      	bne.n	8018758 <get_socket+0x20>
    if ((fd < LWIP_SOCKET_OFFSET) || (fd >= (LWIP_SOCKET_OFFSET + NUM_SOCKETS))) {
      LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", fd));
    }
    set_errno(EBADF);
 801874e:	4b05      	ldr	r3, [pc, #20]	@ (8018764 <get_socket+0x2c>)
 8018750:	2209      	movs	r2, #9
 8018752:	601a      	str	r2, [r3, #0]
    return NULL;
 8018754:	2300      	movs	r3, #0
 8018756:	e000      	b.n	801875a <get_socket+0x22>
  }
  return sock;
 8018758:	68fb      	ldr	r3, [r7, #12]
}
 801875a:	4618      	mov	r0, r3
 801875c:	3710      	adds	r7, #16
 801875e:	46bd      	mov	sp, r7
 8018760:	bd80      	pop	{r7, pc}
 8018762:	bf00      	nop
 8018764:	2402b2a0 	.word	0x2402b2a0

08018768 <alloc_socket>:
 *                 0 if socket has been created by socket()
 * @return the index of the new socket; -1 on error
 */
static int
alloc_socket(struct netconn *newconn, int accepted)
{
 8018768:	b580      	push	{r7, lr}
 801876a:	b084      	sub	sp, #16
 801876c:	af00      	add	r7, sp, #0
 801876e:	6078      	str	r0, [r7, #4]
 8018770:	6039      	str	r1, [r7, #0]
  int i;
  SYS_ARCH_DECL_PROTECT(lev);
  LWIP_UNUSED_ARG(accepted);

  /* allocate a new socket identifier */
  for (i = 0; i < NUM_SOCKETS; ++i) {
 8018772:	2300      	movs	r3, #0
 8018774:	60fb      	str	r3, [r7, #12]
 8018776:	e052      	b.n	801881e <alloc_socket+0xb6>
    /* Protect socket array */
    SYS_ARCH_PROTECT(lev);
 8018778:	f00e feda 	bl	8027530 <sys_arch_protect>
 801877c:	60b8      	str	r0, [r7, #8]
    if (!sockets[i].conn) {
 801877e:	4a2c      	ldr	r2, [pc, #176]	@ (8018830 <alloc_socket+0xc8>)
 8018780:	68fb      	ldr	r3, [r7, #12]
 8018782:	011b      	lsls	r3, r3, #4
 8018784:	4413      	add	r3, r2
 8018786:	681b      	ldr	r3, [r3, #0]
 8018788:	2b00      	cmp	r3, #0
 801878a:	d142      	bne.n	8018812 <alloc_socket+0xaa>
        continue;
      }
      sockets[i].fd_used    = 1;
      sockets[i].fd_free_pending = 0;
#endif
      sockets[i].conn       = newconn;
 801878c:	4a28      	ldr	r2, [pc, #160]	@ (8018830 <alloc_socket+0xc8>)
 801878e:	68fb      	ldr	r3, [r7, #12]
 8018790:	011b      	lsls	r3, r3, #4
 8018792:	4413      	add	r3, r2
 8018794:	687a      	ldr	r2, [r7, #4]
 8018796:	601a      	str	r2, [r3, #0]
      /* The socket is not yet known to anyone, so no need to protect
         after having marked it as used. */
      SYS_ARCH_UNPROTECT(lev);
 8018798:	68b8      	ldr	r0, [r7, #8]
 801879a:	f00e fed7 	bl	802754c <sys_arch_unprotect>
      sockets[i].lastdata.pbuf = NULL;
 801879e:	4a24      	ldr	r2, [pc, #144]	@ (8018830 <alloc_socket+0xc8>)
 80187a0:	68fb      	ldr	r3, [r7, #12]
 80187a2:	011b      	lsls	r3, r3, #4
 80187a4:	4413      	add	r3, r2
 80187a6:	3304      	adds	r3, #4
 80187a8:	2200      	movs	r2, #0
 80187aa:	601a      	str	r2, [r3, #0]
#if LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL
      LWIP_ASSERT("sockets[i].select_waiting == 0", sockets[i].select_waiting == 0);
 80187ac:	4a20      	ldr	r2, [pc, #128]	@ (8018830 <alloc_socket+0xc8>)
 80187ae:	68fb      	ldr	r3, [r7, #12]
 80187b0:	011b      	lsls	r3, r3, #4
 80187b2:	4413      	add	r3, r2
 80187b4:	330e      	adds	r3, #14
 80187b6:	781b      	ldrb	r3, [r3, #0]
 80187b8:	2b00      	cmp	r3, #0
 80187ba:	d006      	beq.n	80187ca <alloc_socket+0x62>
 80187bc:	4b1d      	ldr	r3, [pc, #116]	@ (8018834 <alloc_socket+0xcc>)
 80187be:	f240 220e 	movw	r2, #526	@ 0x20e
 80187c2:	491d      	ldr	r1, [pc, #116]	@ (8018838 <alloc_socket+0xd0>)
 80187c4:	481d      	ldr	r0, [pc, #116]	@ (801883c <alloc_socket+0xd4>)
 80187c6:	f012 f949 	bl	802aa5c <iprintf>
      sockets[i].rcvevent   = 0;
 80187ca:	4a19      	ldr	r2, [pc, #100]	@ (8018830 <alloc_socket+0xc8>)
 80187cc:	68fb      	ldr	r3, [r7, #12]
 80187ce:	011b      	lsls	r3, r3, #4
 80187d0:	4413      	add	r3, r2
 80187d2:	3308      	adds	r3, #8
 80187d4:	2200      	movs	r2, #0
 80187d6:	801a      	strh	r2, [r3, #0]
      /* TCP sendbuf is empty, but the socket is not yet writable until connected
       * (unless it has been created by accept()). */
      sockets[i].sendevent  = (NETCONNTYPE_GROUP(newconn->type) == NETCONN_TCP ? (accepted != 0) : 1);
 80187d8:	687b      	ldr	r3, [r7, #4]
 80187da:	781b      	ldrb	r3, [r3, #0]
 80187dc:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80187e0:	2b10      	cmp	r3, #16
 80187e2:	d102      	bne.n	80187ea <alloc_socket+0x82>
 80187e4:	683b      	ldr	r3, [r7, #0]
 80187e6:	2b00      	cmp	r3, #0
 80187e8:	d001      	beq.n	80187ee <alloc_socket+0x86>
 80187ea:	2301      	movs	r3, #1
 80187ec:	e000      	b.n	80187f0 <alloc_socket+0x88>
 80187ee:	2300      	movs	r3, #0
 80187f0:	b299      	uxth	r1, r3
 80187f2:	4a0f      	ldr	r2, [pc, #60]	@ (8018830 <alloc_socket+0xc8>)
 80187f4:	68fb      	ldr	r3, [r7, #12]
 80187f6:	011b      	lsls	r3, r3, #4
 80187f8:	4413      	add	r3, r2
 80187fa:	330a      	adds	r3, #10
 80187fc:	460a      	mov	r2, r1
 80187fe:	801a      	strh	r2, [r3, #0]
      sockets[i].errevent   = 0;
 8018800:	4a0b      	ldr	r2, [pc, #44]	@ (8018830 <alloc_socket+0xc8>)
 8018802:	68fb      	ldr	r3, [r7, #12]
 8018804:	011b      	lsls	r3, r3, #4
 8018806:	4413      	add	r3, r2
 8018808:	330c      	adds	r3, #12
 801880a:	2200      	movs	r2, #0
 801880c:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_SOCKET_SELECT || LWIP_SOCKET_POLL */
      return i + LWIP_SOCKET_OFFSET;
 801880e:	68fb      	ldr	r3, [r7, #12]
 8018810:	e00a      	b.n	8018828 <alloc_socket+0xc0>
    }
    SYS_ARCH_UNPROTECT(lev);
 8018812:	68b8      	ldr	r0, [r7, #8]
 8018814:	f00e fe9a 	bl	802754c <sys_arch_unprotect>
  for (i = 0; i < NUM_SOCKETS; ++i) {
 8018818:	68fb      	ldr	r3, [r7, #12]
 801881a:	3301      	adds	r3, #1
 801881c:	60fb      	str	r3, [r7, #12]
 801881e:	68fb      	ldr	r3, [r7, #12]
 8018820:	2b03      	cmp	r3, #3
 8018822:	dda9      	ble.n	8018778 <alloc_socket+0x10>
  }
  return -1;
 8018824:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8018828:	4618      	mov	r0, r3
 801882a:	3710      	adds	r7, #16
 801882c:	46bd      	mov	sp, r7
 801882e:	bd80      	pop	{r7, pc}
 8018830:	24024404 	.word	0x24024404
 8018834:	0802e844 	.word	0x0802e844
 8018838:	0802e878 	.word	0x0802e878
 801883c:	0802e898 	.word	0x0802e898

08018840 <free_socket_locked>:
 * @param lastdata lastdata is stored here, must be freed externally
 */
static int
free_socket_locked(struct lwip_sock *sock, int is_tcp, struct netconn **conn,
                   union lwip_sock_lastdata *lastdata)
{
 8018840:	b480      	push	{r7}
 8018842:	b085      	sub	sp, #20
 8018844:	af00      	add	r7, sp, #0
 8018846:	60f8      	str	r0, [r7, #12]
 8018848:	60b9      	str	r1, [r7, #8]
 801884a:	607a      	str	r2, [r7, #4]
 801884c:	603b      	str	r3, [r7, #0]
  }
#else /* LWIP_NETCONN_FULLDUPLEX */
  LWIP_UNUSED_ARG(is_tcp);
#endif /* LWIP_NETCONN_FULLDUPLEX */

  *lastdata = sock->lastdata;
 801884e:	683b      	ldr	r3, [r7, #0]
 8018850:	68fa      	ldr	r2, [r7, #12]
 8018852:	6852      	ldr	r2, [r2, #4]
 8018854:	601a      	str	r2, [r3, #0]
  sock->lastdata.pbuf = NULL;
 8018856:	68fb      	ldr	r3, [r7, #12]
 8018858:	2200      	movs	r2, #0
 801885a:	605a      	str	r2, [r3, #4]
  *conn = sock->conn;
 801885c:	68fb      	ldr	r3, [r7, #12]
 801885e:	681a      	ldr	r2, [r3, #0]
 8018860:	687b      	ldr	r3, [r7, #4]
 8018862:	601a      	str	r2, [r3, #0]
  sock->conn = NULL;
 8018864:	68fb      	ldr	r3, [r7, #12]
 8018866:	2200      	movs	r2, #0
 8018868:	601a      	str	r2, [r3, #0]
  return 1;
 801886a:	2301      	movs	r3, #1
}
 801886c:	4618      	mov	r0, r3
 801886e:	3714      	adds	r7, #20
 8018870:	46bd      	mov	sp, r7
 8018872:	f85d 7b04 	ldr.w	r7, [sp], #4
 8018876:	4770      	bx	lr

08018878 <free_socket_free_elements>:

/** Free a socket's leftover members.
 */
static void
free_socket_free_elements(int is_tcp, struct netconn *conn, union lwip_sock_lastdata *lastdata)
{
 8018878:	b580      	push	{r7, lr}
 801887a:	b084      	sub	sp, #16
 801887c:	af00      	add	r7, sp, #0
 801887e:	60f8      	str	r0, [r7, #12]
 8018880:	60b9      	str	r1, [r7, #8]
 8018882:	607a      	str	r2, [r7, #4]
  if (lastdata->pbuf != NULL) {
 8018884:	687b      	ldr	r3, [r7, #4]
 8018886:	681b      	ldr	r3, [r3, #0]
 8018888:	2b00      	cmp	r3, #0
 801888a:	d00d      	beq.n	80188a8 <free_socket_free_elements+0x30>
    if (is_tcp) {
 801888c:	68fb      	ldr	r3, [r7, #12]
 801888e:	2b00      	cmp	r3, #0
 8018890:	d005      	beq.n	801889e <free_socket_free_elements+0x26>
      pbuf_free(lastdata->pbuf);
 8018892:	687b      	ldr	r3, [r7, #4]
 8018894:	681b      	ldr	r3, [r3, #0]
 8018896:	4618      	mov	r0, r3
 8018898:	f002 fe68 	bl	801b56c <pbuf_free>
 801889c:	e004      	b.n	80188a8 <free_socket_free_elements+0x30>
    } else {
      netbuf_delete(lastdata->netbuf);
 801889e:	687b      	ldr	r3, [r7, #4]
 80188a0:	681b      	ldr	r3, [r3, #0]
 80188a2:	4618      	mov	r0, r3
 80188a4:	f7ff fe78 	bl	8018598 <netbuf_delete>
    }
  }
  if (conn != NULL) {
 80188a8:	68bb      	ldr	r3, [r7, #8]
 80188aa:	2b00      	cmp	r3, #0
 80188ac:	d002      	beq.n	80188b4 <free_socket_free_elements+0x3c>
    /* netconn_prepare_delete() has already been called, here we only free the conn */
    netconn_delete(conn);
 80188ae:	68b8      	ldr	r0, [r7, #8]
 80188b0:	f7fd fd50 	bl	8016354 <netconn_delete>
  }
}
 80188b4:	bf00      	nop
 80188b6:	3710      	adds	r7, #16
 80188b8:	46bd      	mov	sp, r7
 80188ba:	bd80      	pop	{r7, pc}

080188bc <free_socket>:
 * @param sock the socket to free
 * @param is_tcp != 0 for TCP sockets, used to free lastdata
 */
static void
free_socket(struct lwip_sock *sock, int is_tcp)
{
 80188bc:	b580      	push	{r7, lr}
 80188be:	b086      	sub	sp, #24
 80188c0:	af00      	add	r7, sp, #0
 80188c2:	6078      	str	r0, [r7, #4]
 80188c4:	6039      	str	r1, [r7, #0]
  struct netconn *conn;
  union lwip_sock_lastdata lastdata;
  SYS_ARCH_DECL_PROTECT(lev);

  /* Protect socket array */
  SYS_ARCH_PROTECT(lev);
 80188c6:	f00e fe33 	bl	8027530 <sys_arch_protect>
 80188ca:	6178      	str	r0, [r7, #20]

  freed = free_socket_locked(sock, is_tcp, &conn, &lastdata);
 80188cc:	f107 0308 	add.w	r3, r7, #8
 80188d0:	f107 020c 	add.w	r2, r7, #12
 80188d4:	6839      	ldr	r1, [r7, #0]
 80188d6:	6878      	ldr	r0, [r7, #4]
 80188d8:	f7ff ffb2 	bl	8018840 <free_socket_locked>
 80188dc:	6138      	str	r0, [r7, #16]
  SYS_ARCH_UNPROTECT(lev);
 80188de:	6978      	ldr	r0, [r7, #20]
 80188e0:	f00e fe34 	bl	802754c <sys_arch_unprotect>
  /* don't use 'sock' after this line, as another task might have allocated it */

  if (freed) {
 80188e4:	693b      	ldr	r3, [r7, #16]
 80188e6:	2b00      	cmp	r3, #0
 80188e8:	d006      	beq.n	80188f8 <free_socket+0x3c>
    free_socket_free_elements(is_tcp, conn, &lastdata);
 80188ea:	68fb      	ldr	r3, [r7, #12]
 80188ec:	f107 0208 	add.w	r2, r7, #8
 80188f0:	4619      	mov	r1, r3
 80188f2:	6838      	ldr	r0, [r7, #0]
 80188f4:	f7ff ffc0 	bl	8018878 <free_socket_free_elements>
  }
}
 80188f8:	bf00      	nop
 80188fa:	3718      	adds	r7, #24
 80188fc:	46bd      	mov	sp, r7
 80188fe:	bd80      	pop	{r7, pc}

08018900 <lwip_close>:
  return 0;
}

int
lwip_close(int s)
{
 8018900:	b580      	push	{r7, lr}
 8018902:	b086      	sub	sp, #24
 8018904:	af00      	add	r7, sp, #0
 8018906:	6078      	str	r0, [r7, #4]
  struct lwip_sock *sock;
  int is_tcp = 0;
 8018908:	2300      	movs	r3, #0
 801890a:	617b      	str	r3, [r7, #20]
  err_t err;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s));

  sock = get_socket(s);
 801890c:	6878      	ldr	r0, [r7, #4]
 801890e:	f7ff ff13 	bl	8018738 <get_socket>
 8018912:	6138      	str	r0, [r7, #16]
  if (!sock) {
 8018914:	693b      	ldr	r3, [r7, #16]
 8018916:	2b00      	cmp	r3, #0
 8018918:	d102      	bne.n	8018920 <lwip_close+0x20>
    return -1;
 801891a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801891e:	e039      	b.n	8018994 <lwip_close+0x94>
  }

  if (sock->conn != NULL) {
 8018920:	693b      	ldr	r3, [r7, #16]
 8018922:	681b      	ldr	r3, [r3, #0]
 8018924:	2b00      	cmp	r3, #0
 8018926:	d00b      	beq.n	8018940 <lwip_close+0x40>
    is_tcp = NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP;
 8018928:	693b      	ldr	r3, [r7, #16]
 801892a:	681b      	ldr	r3, [r3, #0]
 801892c:	781b      	ldrb	r3, [r3, #0]
 801892e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018932:	2b10      	cmp	r3, #16
 8018934:	bf0c      	ite	eq
 8018936:	2301      	moveq	r3, #1
 8018938:	2300      	movne	r3, #0
 801893a:	b2db      	uxtb	r3, r3
 801893c:	617b      	str	r3, [r7, #20]
 801893e:	e00a      	b.n	8018956 <lwip_close+0x56>
  } else {
    LWIP_ASSERT("sock->lastdata == NULL", sock->lastdata.pbuf == NULL);
 8018940:	693b      	ldr	r3, [r7, #16]
 8018942:	685b      	ldr	r3, [r3, #4]
 8018944:	2b00      	cmp	r3, #0
 8018946:	d006      	beq.n	8018956 <lwip_close+0x56>
 8018948:	4b14      	ldr	r3, [pc, #80]	@ (801899c <lwip_close+0x9c>)
 801894a:	f44f 7245 	mov.w	r2, #788	@ 0x314
 801894e:	4914      	ldr	r1, [pc, #80]	@ (80189a0 <lwip_close+0xa0>)
 8018950:	4814      	ldr	r0, [pc, #80]	@ (80189a4 <lwip_close+0xa4>)
 8018952:	f012 f883 	bl	802aa5c <iprintf>
#if LWIP_IPV6_MLD
  /* drop all possibly joined MLD6 memberships */
  lwip_socket_drop_registered_mld6_memberships(s);
#endif /* LWIP_IPV6_MLD */

  err = netconn_prepare_delete(sock->conn);
 8018956:	693b      	ldr	r3, [r7, #16]
 8018958:	681b      	ldr	r3, [r3, #0]
 801895a:	4618      	mov	r0, r3
 801895c:	f7fd fcd6 	bl	801630c <netconn_prepare_delete>
 8018960:	4603      	mov	r3, r0
 8018962:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 8018964:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8018968:	2b00      	cmp	r3, #0
 801896a:	d00e      	beq.n	801898a <lwip_close+0x8a>
    sock_set_errno(sock, err_to_errno(err));
 801896c:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8018970:	4618      	mov	r0, r3
 8018972:	f7ff fdf3 	bl	801855c <err_to_errno>
 8018976:	60b8      	str	r0, [r7, #8]
 8018978:	68bb      	ldr	r3, [r7, #8]
 801897a:	2b00      	cmp	r3, #0
 801897c:	d002      	beq.n	8018984 <lwip_close+0x84>
 801897e:	4a0a      	ldr	r2, [pc, #40]	@ (80189a8 <lwip_close+0xa8>)
 8018980:	68bb      	ldr	r3, [r7, #8]
 8018982:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8018984:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018988:	e004      	b.n	8018994 <lwip_close+0x94>
  }

  free_socket(sock, is_tcp);
 801898a:	6979      	ldr	r1, [r7, #20]
 801898c:	6938      	ldr	r0, [r7, #16]
 801898e:	f7ff ff95 	bl	80188bc <free_socket>
  set_errno(0);
  return 0;
 8018992:	2300      	movs	r3, #0
}
 8018994:	4618      	mov	r0, r3
 8018996:	3718      	adds	r7, #24
 8018998:	46bd      	mov	sp, r7
 801899a:	bd80      	pop	{r7, pc}
 801899c:	0802e844 	.word	0x0802e844
 80189a0:	0802e904 	.word	0x0802e904
 80189a4:	0802e898 	.word	0x0802e898
 80189a8:	2402b2a0 	.word	0x2402b2a0

080189ac <lwip_connect>:

int
lwip_connect(int s, const struct sockaddr *name, socklen_t namelen)
{
 80189ac:	b580      	push	{r7, lr}
 80189ae:	b08a      	sub	sp, #40	@ 0x28
 80189b0:	af00      	add	r7, sp, #0
 80189b2:	60f8      	str	r0, [r7, #12]
 80189b4:	60b9      	str	r1, [r7, #8]
 80189b6:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock;
  err_t err;

  sock = get_socket(s);
 80189b8:	68f8      	ldr	r0, [r7, #12]
 80189ba:	f7ff febd 	bl	8018738 <get_socket>
 80189be:	6278      	str	r0, [r7, #36]	@ 0x24
  if (!sock) {
 80189c0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80189c2:	2b00      	cmp	r3, #0
 80189c4:	d102      	bne.n	80189cc <lwip_connect+0x20>
    return -1;
 80189c6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80189ca:	e062      	b.n	8018a92 <lwip_connect+0xe6>
    done_socket(sock);
    return -1;
  }

  LWIP_UNUSED_ARG(namelen);
  if (name->sa_family == AF_UNSPEC) {
 80189cc:	68bb      	ldr	r3, [r7, #8]
 80189ce:	785b      	ldrb	r3, [r3, #1]
 80189d0:	2b00      	cmp	r3, #0
 80189d2:	d108      	bne.n	80189e6 <lwip_connect+0x3a>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s));
    err = netconn_disconnect(sock->conn);
 80189d4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80189d6:	681b      	ldr	r3, [r3, #0]
 80189d8:	4618      	mov	r0, r3
 80189da:	f7fd fd61 	bl	80164a0 <netconn_disconnect>
 80189de:	4603      	mov	r3, r0
 80189e0:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
 80189e4:	e039      	b.n	8018a5a <lwip_connect+0xae>
  } else {
    ip_addr_t remote_addr;
    u16_t remote_port;

    /* check size, family and alignment of 'name' */
    LWIP_ERROR("lwip_connect: invalid address", IS_SOCK_ADDR_LEN_VALID(namelen) &&
 80189e6:	687b      	ldr	r3, [r7, #4]
 80189e8:	2b10      	cmp	r3, #16
 80189ea:	d10c      	bne.n	8018a06 <lwip_connect+0x5a>
 80189ec:	68bb      	ldr	r3, [r7, #8]
 80189ee:	785b      	ldrb	r3, [r3, #1]
 80189f0:	2b00      	cmp	r3, #0
 80189f2:	d003      	beq.n	80189fc <lwip_connect+0x50>
 80189f4:	68bb      	ldr	r3, [r7, #8]
 80189f6:	785b      	ldrb	r3, [r3, #1]
 80189f8:	2b02      	cmp	r3, #2
 80189fa:	d104      	bne.n	8018a06 <lwip_connect+0x5a>
 80189fc:	68bb      	ldr	r3, [r7, #8]
 80189fe:	f003 0303 	and.w	r3, r3, #3
 8018a02:	2b00      	cmp	r3, #0
 8018a04:	d014      	beq.n	8018a30 <lwip_connect+0x84>
 8018a06:	4b25      	ldr	r3, [pc, #148]	@ (8018a9c <lwip_connect+0xf0>)
 8018a08:	f240 3247 	movw	r2, #839	@ 0x347
 8018a0c:	4924      	ldr	r1, [pc, #144]	@ (8018aa0 <lwip_connect+0xf4>)
 8018a0e:	4825      	ldr	r0, [pc, #148]	@ (8018aa4 <lwip_connect+0xf8>)
 8018a10:	f012 f824 	bl	802aa5c <iprintf>
 8018a14:	f06f 000f 	mvn.w	r0, #15
 8018a18:	f7ff fda0 	bl	801855c <err_to_errno>
 8018a1c:	61f8      	str	r0, [r7, #28]
 8018a1e:	69fb      	ldr	r3, [r7, #28]
 8018a20:	2b00      	cmp	r3, #0
 8018a22:	d002      	beq.n	8018a2a <lwip_connect+0x7e>
 8018a24:	4a20      	ldr	r2, [pc, #128]	@ (8018aa8 <lwip_connect+0xfc>)
 8018a26:	69fb      	ldr	r3, [r7, #28]
 8018a28:	6013      	str	r3, [r2, #0]
 8018a2a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018a2e:	e030      	b.n	8018a92 <lwip_connect+0xe6>
               IS_SOCK_ADDR_TYPE_VALID_OR_UNSPEC(name) && IS_SOCK_ADDR_ALIGNED(name),
               sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);

    SOCKADDR_TO_IPADDR_PORT(name, &remote_addr, remote_port);
 8018a30:	68bb      	ldr	r3, [r7, #8]
 8018a32:	685b      	ldr	r3, [r3, #4]
 8018a34:	613b      	str	r3, [r7, #16]
 8018a36:	68bb      	ldr	r3, [r7, #8]
 8018a38:	885b      	ldrh	r3, [r3, #2]
 8018a3a:	4618      	mov	r0, r3
 8018a3c:	f001 f8b4 	bl	8019ba8 <lwip_htons>
 8018a40:	4603      	mov	r3, r0
 8018a42:	847b      	strh	r3, [r7, #34]	@ 0x22
      unmap_ipv4_mapped_ipv6(ip_2_ip4(&remote_addr), ip_2_ip6(&remote_addr));
      IP_SET_TYPE_VAL(remote_addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    err = netconn_connect(sock->conn, &remote_addr, remote_port);
 8018a44:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018a46:	681b      	ldr	r3, [r3, #0]
 8018a48:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8018a4a:	f107 0110 	add.w	r1, r7, #16
 8018a4e:	4618      	mov	r0, r3
 8018a50:	f7fd fcee 	bl	8016430 <netconn_connect>
 8018a54:	4603      	mov	r3, r0
 8018a56:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
  }

  if (err != ERR_OK) {
 8018a5a:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 8018a5e:	2b00      	cmp	r3, #0
 8018a60:	d00e      	beq.n	8018a80 <lwip_connect+0xd4>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err));
    sock_set_errno(sock, err_to_errno(err));
 8018a62:	f997 3021 	ldrsb.w	r3, [r7, #33]	@ 0x21
 8018a66:	4618      	mov	r0, r3
 8018a68:	f7ff fd78 	bl	801855c <err_to_errno>
 8018a6c:	6178      	str	r0, [r7, #20]
 8018a6e:	697b      	ldr	r3, [r7, #20]
 8018a70:	2b00      	cmp	r3, #0
 8018a72:	d002      	beq.n	8018a7a <lwip_connect+0xce>
 8018a74:	4a0c      	ldr	r2, [pc, #48]	@ (8018aa8 <lwip_connect+0xfc>)
 8018a76:	697b      	ldr	r3, [r7, #20]
 8018a78:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8018a7a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018a7e:	e008      	b.n	8018a92 <lwip_connect+0xe6>
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s));
  sock_set_errno(sock, 0);
 8018a80:	2300      	movs	r3, #0
 8018a82:	61bb      	str	r3, [r7, #24]
 8018a84:	69bb      	ldr	r3, [r7, #24]
 8018a86:	2b00      	cmp	r3, #0
 8018a88:	d002      	beq.n	8018a90 <lwip_connect+0xe4>
 8018a8a:	4a07      	ldr	r2, [pc, #28]	@ (8018aa8 <lwip_connect+0xfc>)
 8018a8c:	69bb      	ldr	r3, [r7, #24]
 8018a8e:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return 0;
 8018a90:	2300      	movs	r3, #0
}
 8018a92:	4618      	mov	r0, r3
 8018a94:	3728      	adds	r7, #40	@ 0x28
 8018a96:	46bd      	mov	sp, r7
 8018a98:	bd80      	pop	{r7, pc}
 8018a9a:	bf00      	nop
 8018a9c:	0802e844 	.word	0x0802e844
 8018aa0:	0802e91c 	.word	0x0802e91c
 8018aa4:	0802e898 	.word	0x0802e898
 8018aa8:	2402b2a0 	.word	0x2402b2a0

08018aac <lwip_recv_tcp>:
 * until "len" bytes are received or we're otherwise done.
 * Keeps sock->lastdata for peeking or partly copying.
 */
static ssize_t
lwip_recv_tcp(struct lwip_sock *sock, void *mem, size_t len, int flags)
{
 8018aac:	b580      	push	{r7, lr}
 8018aae:	b08c      	sub	sp, #48	@ 0x30
 8018ab0:	af00      	add	r7, sp, #0
 8018ab2:	60f8      	str	r0, [r7, #12]
 8018ab4:	60b9      	str	r1, [r7, #8]
 8018ab6:	607a      	str	r2, [r7, #4]
 8018ab8:	603b      	str	r3, [r7, #0]
  u8_t apiflags = NETCONN_NOAUTORCVD;
 8018aba:	2308      	movs	r3, #8
 8018abc:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  ssize_t recvd = 0;
 8018ac0:	2300      	movs	r3, #0
 8018ac2:	62bb      	str	r3, [r7, #40]	@ 0x28
  ssize_t recv_left = (len <= SSIZE_MAX) ? (ssize_t)len : SSIZE_MAX;
 8018ac4:	687b      	ldr	r3, [r7, #4]
 8018ac6:	2b00      	cmp	r3, #0
 8018ac8:	db01      	blt.n	8018ace <lwip_recv_tcp+0x22>
 8018aca:	687b      	ldr	r3, [r7, #4]
 8018acc:	e001      	b.n	8018ad2 <lwip_recv_tcp+0x26>
 8018ace:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 8018ad2:	627b      	str	r3, [r7, #36]	@ 0x24

  LWIP_ASSERT("no socket given", sock != NULL);
 8018ad4:	68fb      	ldr	r3, [r7, #12]
 8018ad6:	2b00      	cmp	r3, #0
 8018ad8:	d106      	bne.n	8018ae8 <lwip_recv_tcp+0x3c>
 8018ada:	4b74      	ldr	r3, [pc, #464]	@ (8018cac <lwip_recv_tcp+0x200>)
 8018adc:	f240 329e 	movw	r2, #926	@ 0x39e
 8018ae0:	4973      	ldr	r1, [pc, #460]	@ (8018cb0 <lwip_recv_tcp+0x204>)
 8018ae2:	4874      	ldr	r0, [pc, #464]	@ (8018cb4 <lwip_recv_tcp+0x208>)
 8018ae4:	f011 ffba 	bl	802aa5c <iprintf>
  LWIP_ASSERT("this should be checked internally", NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP);
 8018ae8:	68fb      	ldr	r3, [r7, #12]
 8018aea:	681b      	ldr	r3, [r3, #0]
 8018aec:	781b      	ldrb	r3, [r3, #0]
 8018aee:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018af2:	2b10      	cmp	r3, #16
 8018af4:	d006      	beq.n	8018b04 <lwip_recv_tcp+0x58>
 8018af6:	4b6d      	ldr	r3, [pc, #436]	@ (8018cac <lwip_recv_tcp+0x200>)
 8018af8:	f240 329f 	movw	r2, #927	@ 0x39f
 8018afc:	496e      	ldr	r1, [pc, #440]	@ (8018cb8 <lwip_recv_tcp+0x20c>)
 8018afe:	486d      	ldr	r0, [pc, #436]	@ (8018cb4 <lwip_recv_tcp+0x208>)
 8018b00:	f011 ffac 	bl	802aa5c <iprintf>

  if (flags & MSG_DONTWAIT) {
 8018b04:	683b      	ldr	r3, [r7, #0]
 8018b06:	f003 0308 	and.w	r3, r3, #8
 8018b0a:	2b00      	cmp	r3, #0
 8018b0c:	d005      	beq.n	8018b1a <lwip_recv_tcp+0x6e>
    apiflags |= NETCONN_DONTBLOCK;
 8018b0e:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8018b12:	f043 0304 	orr.w	r3, r3, #4
 8018b16:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    err_t err;
    u16_t copylen;

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: top while sock->lastdata=%p\n", (void *)sock->lastdata.pbuf));
    /* Check if there is data left from the last recv operation. */
    if (sock->lastdata.pbuf) {
 8018b1a:	68fb      	ldr	r3, [r7, #12]
 8018b1c:	685b      	ldr	r3, [r3, #4]
 8018b1e:	2b00      	cmp	r3, #0
 8018b20:	d003      	beq.n	8018b2a <lwip_recv_tcp+0x7e>
      p = sock->lastdata.pbuf;
 8018b22:	68fb      	ldr	r3, [r7, #12]
 8018b24:	685b      	ldr	r3, [r3, #4]
 8018b26:	617b      	str	r3, [r7, #20]
 8018b28:	e036      	b.n	8018b98 <lwip_recv_tcp+0xec>
    } else {
      /* No data was left from the previous operation, so we try to get
         some from the network. */
      err = netconn_recv_tcp_pbuf_flags(sock->conn, &p, apiflags);
 8018b2a:	68fb      	ldr	r3, [r7, #12]
 8018b2c:	681b      	ldr	r3, [r3, #0]
 8018b2e:	f897 2023 	ldrb.w	r2, [r7, #35]	@ 0x23
 8018b32:	f107 0114 	add.w	r1, r7, #20
 8018b36:	4618      	mov	r0, r3
 8018b38:	f7fd fea4 	bl	8016884 <netconn_recv_tcp_pbuf_flags>
 8018b3c:	4603      	mov	r3, r0
 8018b3e:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: netconn_recv err=%d, pbuf=%p\n",
                                  err, (void *)p));

      if (err != ERR_OK) {
 8018b42:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 8018b46:	2b00      	cmp	r3, #0
 8018b48:	d019      	beq.n	8018b7e <lwip_recv_tcp+0xd2>
        if (recvd > 0) {
 8018b4a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018b4c:	2b00      	cmp	r3, #0
 8018b4e:	f300 808d 	bgt.w	8018c6c <lwip_recv_tcp+0x1c0>
          goto lwip_recv_tcp_done;
        }
        /* We should really do some error checking here. */
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: p == NULL, error is \"%s\"!\n",
                                    lwip_strerr(err)));
        sock_set_errno(sock, err_to_errno(err));
 8018b52:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 8018b56:	4618      	mov	r0, r3
 8018b58:	f7ff fd00 	bl	801855c <err_to_errno>
 8018b5c:	61f8      	str	r0, [r7, #28]
 8018b5e:	69fb      	ldr	r3, [r7, #28]
 8018b60:	2b00      	cmp	r3, #0
 8018b62:	d002      	beq.n	8018b6a <lwip_recv_tcp+0xbe>
 8018b64:	4a55      	ldr	r2, [pc, #340]	@ (8018cbc <lwip_recv_tcp+0x210>)
 8018b66:	69fb      	ldr	r3, [r7, #28]
 8018b68:	6013      	str	r3, [r2, #0]
        if (err == ERR_CLSD) {
 8018b6a:	f997 3022 	ldrsb.w	r3, [r7, #34]	@ 0x22
 8018b6e:	f113 0f0f 	cmn.w	r3, #15
 8018b72:	d101      	bne.n	8018b78 <lwip_recv_tcp+0xcc>
          return 0;
 8018b74:	2300      	movs	r3, #0
 8018b76:	e094      	b.n	8018ca2 <lwip_recv_tcp+0x1f6>
        } else {
          return -1;
 8018b78:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018b7c:	e091      	b.n	8018ca2 <lwip_recv_tcp+0x1f6>
        }
      }
      LWIP_ASSERT("p != NULL", p != NULL);
 8018b7e:	697b      	ldr	r3, [r7, #20]
 8018b80:	2b00      	cmp	r3, #0
 8018b82:	d106      	bne.n	8018b92 <lwip_recv_tcp+0xe6>
 8018b84:	4b49      	ldr	r3, [pc, #292]	@ (8018cac <lwip_recv_tcp+0x200>)
 8018b86:	f240 32c5 	movw	r2, #965	@ 0x3c5
 8018b8a:	494d      	ldr	r1, [pc, #308]	@ (8018cc0 <lwip_recv_tcp+0x214>)
 8018b8c:	4849      	ldr	r0, [pc, #292]	@ (8018cb4 <lwip_recv_tcp+0x208>)
 8018b8e:	f011 ff65 	bl	802aa5c <iprintf>
      sock->lastdata.pbuf = p;
 8018b92:	697a      	ldr	r2, [r7, #20]
 8018b94:	68fb      	ldr	r3, [r7, #12]
 8018b96:	605a      	str	r2, [r3, #4]
    }

    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: buflen=%"U16_F" recv_left=%d off=%d\n",
                                p->tot_len, (int)recv_left, (int)recvd));

    if (recv_left > p->tot_len) {
 8018b98:	697b      	ldr	r3, [r7, #20]
 8018b9a:	891b      	ldrh	r3, [r3, #8]
 8018b9c:	461a      	mov	r2, r3
 8018b9e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018ba0:	4293      	cmp	r3, r2
 8018ba2:	dd03      	ble.n	8018bac <lwip_recv_tcp+0x100>
      copylen = p->tot_len;
 8018ba4:	697b      	ldr	r3, [r7, #20]
 8018ba6:	891b      	ldrh	r3, [r3, #8]
 8018ba8:	85fb      	strh	r3, [r7, #46]	@ 0x2e
 8018baa:	e001      	b.n	8018bb0 <lwip_recv_tcp+0x104>
    } else {
      copylen = (u16_t)recv_left;
 8018bac:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018bae:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }
    if (recvd + copylen < recvd) {
 8018bb0:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8018bb2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018bb4:	4413      	add	r3, r2
 8018bb6:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8018bb8:	429a      	cmp	r2, r3
 8018bba:	dd03      	ble.n	8018bc4 <lwip_recv_tcp+0x118>
      /* overflow */
      copylen = (u16_t)(SSIZE_MAX - recvd);
 8018bbc:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018bbe:	b29b      	uxth	r3, r3
 8018bc0:	43db      	mvns	r3, r3
 8018bc2:	85fb      	strh	r3, [r7, #46]	@ 0x2e
    }

    /* copy the contents of the received buffer into
    the supplied memory pointer mem */
    pbuf_copy_partial(p, (u8_t *)mem + recvd, copylen, 0);
 8018bc4:	6978      	ldr	r0, [r7, #20]
 8018bc6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018bc8:	68ba      	ldr	r2, [r7, #8]
 8018bca:	18d1      	adds	r1, r2, r3
 8018bcc:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8018bce:	2300      	movs	r3, #0
 8018bd0:	f002 fed2 	bl	801b978 <pbuf_copy_partial>

    recvd += copylen;
 8018bd4:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018bd6:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8018bd8:	4413      	add	r3, r2
 8018bda:	62bb      	str	r3, [r7, #40]	@ 0x28

    /* TCP combines multiple pbufs for one recv */
    LWIP_ASSERT("invalid copylen, len would underflow", recv_left >= copylen);
 8018bdc:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018bde:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8018be0:	429a      	cmp	r2, r3
 8018be2:	da06      	bge.n	8018bf2 <lwip_recv_tcp+0x146>
 8018be4:	4b31      	ldr	r3, [pc, #196]	@ (8018cac <lwip_recv_tcp+0x200>)
 8018be6:	f240 32dd 	movw	r2, #989	@ 0x3dd
 8018bea:	4936      	ldr	r1, [pc, #216]	@ (8018cc4 <lwip_recv_tcp+0x218>)
 8018bec:	4831      	ldr	r0, [pc, #196]	@ (8018cb4 <lwip_recv_tcp+0x208>)
 8018bee:	f011 ff35 	bl	802aa5c <iprintf>
    recv_left -= copylen;
 8018bf2:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018bf4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8018bf6:	1ad3      	subs	r3, r2, r3
 8018bf8:	627b      	str	r3, [r7, #36]	@ 0x24

    /* Unless we peek the incoming message... */
    if ((flags & MSG_PEEK) == 0) {
 8018bfa:	683b      	ldr	r3, [r7, #0]
 8018bfc:	f003 0301 	and.w	r3, r3, #1
 8018c00:	2b00      	cmp	r3, #0
 8018c02:	d123      	bne.n	8018c4c <lwip_recv_tcp+0x1a0>
      /* ... check if there is data left in the pbuf */
      LWIP_ASSERT("invalid copylen", p->tot_len >= copylen);
 8018c04:	697b      	ldr	r3, [r7, #20]
 8018c06:	891b      	ldrh	r3, [r3, #8]
 8018c08:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8018c0a:	429a      	cmp	r2, r3
 8018c0c:	d906      	bls.n	8018c1c <lwip_recv_tcp+0x170>
 8018c0e:	4b27      	ldr	r3, [pc, #156]	@ (8018cac <lwip_recv_tcp+0x200>)
 8018c10:	f240 32e3 	movw	r2, #995	@ 0x3e3
 8018c14:	492c      	ldr	r1, [pc, #176]	@ (8018cc8 <lwip_recv_tcp+0x21c>)
 8018c16:	4827      	ldr	r0, [pc, #156]	@ (8018cb4 <lwip_recv_tcp+0x208>)
 8018c18:	f011 ff20 	bl	802aa5c <iprintf>
      if (p->tot_len - copylen > 0) {
 8018c1c:	697b      	ldr	r3, [r7, #20]
 8018c1e:	891b      	ldrh	r3, [r3, #8]
 8018c20:	461a      	mov	r2, r3
 8018c22:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8018c24:	1ad3      	subs	r3, r2, r3
 8018c26:	2b00      	cmp	r3, #0
 8018c28:	dd09      	ble.n	8018c3e <lwip_recv_tcp+0x192>
        /* If so, it should be saved in the sock structure for the next recv call.
           We store the pbuf but hide/free the consumed data: */
        sock->lastdata.pbuf = pbuf_free_header(p, copylen);
 8018c2a:	697b      	ldr	r3, [r7, #20]
 8018c2c:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 8018c2e:	4611      	mov	r1, r2
 8018c30:	4618      	mov	r0, r3
 8018c32:	f002 fc68 	bl	801b506 <pbuf_free_header>
 8018c36:	4602      	mov	r2, r0
 8018c38:	68fb      	ldr	r3, [r7, #12]
 8018c3a:	605a      	str	r2, [r3, #4]
 8018c3c:	e006      	b.n	8018c4c <lwip_recv_tcp+0x1a0>
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: lastdata now pbuf=%p\n", (void *)sock->lastdata.pbuf));
      } else {
        sock->lastdata.pbuf = NULL;
 8018c3e:	68fb      	ldr	r3, [r7, #12]
 8018c40:	2200      	movs	r2, #0
 8018c42:	605a      	str	r2, [r3, #4]
        LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recv_tcp: deleting pbuf=%p\n", (void *)p));
        pbuf_free(p);
 8018c44:	697b      	ldr	r3, [r7, #20]
 8018c46:	4618      	mov	r0, r3
 8018c48:	f002 fc90 	bl	801b56c <pbuf_free>
      }
    }
    /* once we have some data to return, only add more if we don't need to wait */
    apiflags |= NETCONN_DONTBLOCK | NETCONN_NOFIN;
 8018c4c:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8018c50:	f043 0314 	orr.w	r3, r3, #20
 8018c54:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    /* @todo: do we need to support peeking more than one pbuf? */
  } while ((recv_left > 0) && !(flags & MSG_PEEK));
 8018c58:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8018c5a:	2b00      	cmp	r3, #0
 8018c5c:	dd08      	ble.n	8018c70 <lwip_recv_tcp+0x1c4>
 8018c5e:	683b      	ldr	r3, [r7, #0]
 8018c60:	f003 0301 	and.w	r3, r3, #1
 8018c64:	2b00      	cmp	r3, #0
 8018c66:	f43f af58 	beq.w	8018b1a <lwip_recv_tcp+0x6e>
lwip_recv_tcp_done:
 8018c6a:	e001      	b.n	8018c70 <lwip_recv_tcp+0x1c4>
          goto lwip_recv_tcp_done;
 8018c6c:	bf00      	nop
 8018c6e:	e000      	b.n	8018c72 <lwip_recv_tcp+0x1c6>
lwip_recv_tcp_done:
 8018c70:	bf00      	nop
  if ((recvd > 0) && !(flags & MSG_PEEK)) {
 8018c72:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8018c74:	2b00      	cmp	r3, #0
 8018c76:	dd0b      	ble.n	8018c90 <lwip_recv_tcp+0x1e4>
 8018c78:	683b      	ldr	r3, [r7, #0]
 8018c7a:	f003 0301 	and.w	r3, r3, #1
 8018c7e:	2b00      	cmp	r3, #0
 8018c80:	d106      	bne.n	8018c90 <lwip_recv_tcp+0x1e4>
    /* ensure window update after copying all data */
    netconn_tcp_recvd(sock->conn, (size_t)recvd);
 8018c82:	68fb      	ldr	r3, [r7, #12]
 8018c84:	681b      	ldr	r3, [r3, #0]
 8018c86:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8018c88:	4611      	mov	r1, r2
 8018c8a:	4618      	mov	r0, r3
 8018c8c:	f7fd fd42 	bl	8016714 <netconn_tcp_recvd>
  }
  sock_set_errno(sock, 0);
 8018c90:	2300      	movs	r3, #0
 8018c92:	61bb      	str	r3, [r7, #24]
 8018c94:	69bb      	ldr	r3, [r7, #24]
 8018c96:	2b00      	cmp	r3, #0
 8018c98:	d002      	beq.n	8018ca0 <lwip_recv_tcp+0x1f4>
 8018c9a:	4a08      	ldr	r2, [pc, #32]	@ (8018cbc <lwip_recv_tcp+0x210>)
 8018c9c:	69bb      	ldr	r3, [r7, #24]
 8018c9e:	6013      	str	r3, [r2, #0]
  return recvd;
 8018ca0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
}
 8018ca2:	4618      	mov	r0, r3
 8018ca4:	3730      	adds	r7, #48	@ 0x30
 8018ca6:	46bd      	mov	sp, r7
 8018ca8:	bd80      	pop	{r7, pc}
 8018caa:	bf00      	nop
 8018cac:	0802e844 	.word	0x0802e844
 8018cb0:	0802e93c 	.word	0x0802e93c
 8018cb4:	0802e898 	.word	0x0802e898
 8018cb8:	0802e94c 	.word	0x0802e94c
 8018cbc:	2402b2a0 	.word	0x2402b2a0
 8018cc0:	0802e970 	.word	0x0802e970
 8018cc4:	0802e97c 	.word	0x0802e97c
 8018cc8:	0802e9a4 	.word	0x0802e9a4

08018ccc <lwip_sock_make_addr>:

/* Convert a netbuf's address data to struct sockaddr */
static int
lwip_sock_make_addr(struct netconn *conn, ip_addr_t *fromaddr, u16_t port,
                    struct sockaddr *from, socklen_t *fromlen)
{
 8018ccc:	b590      	push	{r4, r7, lr}
 8018cce:	b08b      	sub	sp, #44	@ 0x2c
 8018cd0:	af00      	add	r7, sp, #0
 8018cd2:	60f8      	str	r0, [r7, #12]
 8018cd4:	60b9      	str	r1, [r7, #8]
 8018cd6:	603b      	str	r3, [r7, #0]
 8018cd8:	4613      	mov	r3, r2
 8018cda:	80fb      	strh	r3, [r7, #6]
  int truncated = 0;
 8018cdc:	2300      	movs	r3, #0
 8018cde:	627b      	str	r3, [r7, #36]	@ 0x24
  union sockaddr_aligned saddr;

  LWIP_UNUSED_ARG(conn);

  LWIP_ASSERT("fromaddr != NULL", fromaddr != NULL);
 8018ce0:	68bb      	ldr	r3, [r7, #8]
 8018ce2:	2b00      	cmp	r3, #0
 8018ce4:	d106      	bne.n	8018cf4 <lwip_sock_make_addr+0x28>
 8018ce6:	4b2b      	ldr	r3, [pc, #172]	@ (8018d94 <lwip_sock_make_addr+0xc8>)
 8018ce8:	f240 4207 	movw	r2, #1031	@ 0x407
 8018cec:	492a      	ldr	r1, [pc, #168]	@ (8018d98 <lwip_sock_make_addr+0xcc>)
 8018cee:	482b      	ldr	r0, [pc, #172]	@ (8018d9c <lwip_sock_make_addr+0xd0>)
 8018cf0:	f011 feb4 	bl	802aa5c <iprintf>
  LWIP_ASSERT("from != NULL", from != NULL);
 8018cf4:	683b      	ldr	r3, [r7, #0]
 8018cf6:	2b00      	cmp	r3, #0
 8018cf8:	d106      	bne.n	8018d08 <lwip_sock_make_addr+0x3c>
 8018cfa:	4b26      	ldr	r3, [pc, #152]	@ (8018d94 <lwip_sock_make_addr+0xc8>)
 8018cfc:	f44f 6281 	mov.w	r2, #1032	@ 0x408
 8018d00:	4927      	ldr	r1, [pc, #156]	@ (8018da0 <lwip_sock_make_addr+0xd4>)
 8018d02:	4826      	ldr	r0, [pc, #152]	@ (8018d9c <lwip_sock_make_addr+0xd0>)
 8018d04:	f011 feaa 	bl	802aa5c <iprintf>
  LWIP_ASSERT("fromlen != NULL", fromlen != NULL);
 8018d08:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018d0a:	2b00      	cmp	r3, #0
 8018d0c:	d106      	bne.n	8018d1c <lwip_sock_make_addr+0x50>
 8018d0e:	4b21      	ldr	r3, [pc, #132]	@ (8018d94 <lwip_sock_make_addr+0xc8>)
 8018d10:	f240 4209 	movw	r2, #1033	@ 0x409
 8018d14:	4923      	ldr	r1, [pc, #140]	@ (8018da4 <lwip_sock_make_addr+0xd8>)
 8018d16:	4821      	ldr	r0, [pc, #132]	@ (8018d9c <lwip_sock_make_addr+0xd0>)
 8018d18:	f011 fea0 	bl	802aa5c <iprintf>
    ip4_2_ipv4_mapped_ipv6(ip_2_ip6(fromaddr), ip_2_ip4(fromaddr));
    IP_SET_TYPE(fromaddr, IPADDR_TYPE_V6);
  }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

  IPADDR_PORT_TO_SOCKADDR(&saddr, fromaddr, port);
 8018d1c:	f107 0314 	add.w	r3, r7, #20
 8018d20:	2210      	movs	r2, #16
 8018d22:	701a      	strb	r2, [r3, #0]
 8018d24:	f107 0314 	add.w	r3, r7, #20
 8018d28:	2202      	movs	r2, #2
 8018d2a:	705a      	strb	r2, [r3, #1]
 8018d2c:	f107 0414 	add.w	r4, r7, #20
 8018d30:	88fb      	ldrh	r3, [r7, #6]
 8018d32:	4618      	mov	r0, r3
 8018d34:	f000 ff38 	bl	8019ba8 <lwip_htons>
 8018d38:	4603      	mov	r3, r0
 8018d3a:	8063      	strh	r3, [r4, #2]
 8018d3c:	f107 0314 	add.w	r3, r7, #20
 8018d40:	68ba      	ldr	r2, [r7, #8]
 8018d42:	6812      	ldr	r2, [r2, #0]
 8018d44:	605a      	str	r2, [r3, #4]
 8018d46:	f107 0314 	add.w	r3, r7, #20
 8018d4a:	3308      	adds	r3, #8
 8018d4c:	2208      	movs	r2, #8
 8018d4e:	2100      	movs	r1, #0
 8018d50:	4618      	mov	r0, r3
 8018d52:	f012 f815 	bl	802ad80 <memset>
  if (*fromlen < saddr.sa.sa_len) {
 8018d56:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018d58:	681b      	ldr	r3, [r3, #0]
 8018d5a:	7d3a      	ldrb	r2, [r7, #20]
 8018d5c:	4293      	cmp	r3, r2
 8018d5e:	d202      	bcs.n	8018d66 <lwip_sock_make_addr+0x9a>
    truncated = 1;
 8018d60:	2301      	movs	r3, #1
 8018d62:	627b      	str	r3, [r7, #36]	@ 0x24
 8018d64:	e008      	b.n	8018d78 <lwip_sock_make_addr+0xac>
  } else if (*fromlen > saddr.sa.sa_len) {
 8018d66:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018d68:	681b      	ldr	r3, [r3, #0]
 8018d6a:	7d3a      	ldrb	r2, [r7, #20]
 8018d6c:	4293      	cmp	r3, r2
 8018d6e:	d903      	bls.n	8018d78 <lwip_sock_make_addr+0xac>
    *fromlen = saddr.sa.sa_len;
 8018d70:	7d3b      	ldrb	r3, [r7, #20]
 8018d72:	461a      	mov	r2, r3
 8018d74:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018d76:	601a      	str	r2, [r3, #0]
  }
  MEMCPY(from, &saddr, *fromlen);
 8018d78:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8018d7a:	681a      	ldr	r2, [r3, #0]
 8018d7c:	f107 0314 	add.w	r3, r7, #20
 8018d80:	4619      	mov	r1, r3
 8018d82:	6838      	ldr	r0, [r7, #0]
 8018d84:	f012 f8f3 	bl	802af6e <memcpy>
  return truncated;
 8018d88:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8018d8a:	4618      	mov	r0, r3
 8018d8c:	372c      	adds	r7, #44	@ 0x2c
 8018d8e:	46bd      	mov	sp, r7
 8018d90:	bd90      	pop	{r4, r7, pc}
 8018d92:	bf00      	nop
 8018d94:	0802e844 	.word	0x0802e844
 8018d98:	0802e9b4 	.word	0x0802e9b4
 8018d9c:	0802e898 	.word	0x0802e898
 8018da0:	0802e9c8 	.word	0x0802e9c8
 8018da4:	0802e9d8 	.word	0x0802e9d8

08018da8 <lwip_recv_tcp_from>:

#if LWIP_TCP
/* Helper function to get a tcp socket's remote address info */
static int
lwip_recv_tcp_from(struct lwip_sock *sock, struct sockaddr *from, socklen_t *fromlen, const char *dbg_fn, int dbg_s, ssize_t dbg_ret)
{
 8018da8:	b580      	push	{r7, lr}
 8018daa:	b088      	sub	sp, #32
 8018dac:	af02      	add	r7, sp, #8
 8018dae:	60f8      	str	r0, [r7, #12]
 8018db0:	60b9      	str	r1, [r7, #8]
 8018db2:	607a      	str	r2, [r7, #4]
 8018db4:	603b      	str	r3, [r7, #0]
  if (sock == NULL) {
 8018db6:	68fb      	ldr	r3, [r7, #12]
 8018db8:	2b00      	cmp	r3, #0
 8018dba:	d101      	bne.n	8018dc0 <lwip_recv_tcp_from+0x18>
    return 0;
 8018dbc:	2300      	movs	r3, #0
 8018dbe:	e021      	b.n	8018e04 <lwip_recv_tcp_from+0x5c>
  LWIP_UNUSED_ARG(dbg_fn);
  LWIP_UNUSED_ARG(dbg_s);
  LWIP_UNUSED_ARG(dbg_ret);

#if !SOCKETS_DEBUG
  if (from && fromlen)
 8018dc0:	68bb      	ldr	r3, [r7, #8]
 8018dc2:	2b00      	cmp	r3, #0
 8018dc4:	d01d      	beq.n	8018e02 <lwip_recv_tcp_from+0x5a>
 8018dc6:	687b      	ldr	r3, [r7, #4]
 8018dc8:	2b00      	cmp	r3, #0
 8018dca:	d01a      	beq.n	8018e02 <lwip_recv_tcp_from+0x5a>
#endif /* !SOCKETS_DEBUG */
  {
    /* get remote addr/port from tcp_pcb */
    u16_t port;
    ip_addr_t tmpaddr;
    netconn_getaddr(sock->conn, &tmpaddr, &port, 0);
 8018dcc:	68fb      	ldr	r3, [r7, #12]
 8018dce:	6818      	ldr	r0, [r3, #0]
 8018dd0:	f107 0216 	add.w	r2, r7, #22
 8018dd4:	f107 0110 	add.w	r1, r7, #16
 8018dd8:	2300      	movs	r3, #0
 8018dda:	f7fd fad7 	bl	801638c <netconn_getaddr>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("%s(%d):  addr=", dbg_fn, dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, tmpaddr);
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", port, (int)dbg_ret));
    if (from && fromlen) {
 8018dde:	68bb      	ldr	r3, [r7, #8]
 8018de0:	2b00      	cmp	r3, #0
 8018de2:	d00e      	beq.n	8018e02 <lwip_recv_tcp_from+0x5a>
 8018de4:	687b      	ldr	r3, [r7, #4]
 8018de6:	2b00      	cmp	r3, #0
 8018de8:	d00b      	beq.n	8018e02 <lwip_recv_tcp_from+0x5a>
      return lwip_sock_make_addr(sock->conn, &tmpaddr, port, from, fromlen);
 8018dea:	68fb      	ldr	r3, [r7, #12]
 8018dec:	6818      	ldr	r0, [r3, #0]
 8018dee:	8afa      	ldrh	r2, [r7, #22]
 8018df0:	f107 0110 	add.w	r1, r7, #16
 8018df4:	687b      	ldr	r3, [r7, #4]
 8018df6:	9300      	str	r3, [sp, #0]
 8018df8:	68bb      	ldr	r3, [r7, #8]
 8018dfa:	f7ff ff67 	bl	8018ccc <lwip_sock_make_addr>
 8018dfe:	4603      	mov	r3, r0
 8018e00:	e000      	b.n	8018e04 <lwip_recv_tcp_from+0x5c>
    }
  }
  return 0;
 8018e02:	2300      	movs	r3, #0
}
 8018e04:	4618      	mov	r0, r3
 8018e06:	3718      	adds	r7, #24
 8018e08:	46bd      	mov	sp, r7
 8018e0a:	bd80      	pop	{r7, pc}

08018e0c <lwip_recvfrom_udp_raw>:
/* Helper function to receive a netbuf from a udp or raw netconn.
 * Keeps sock->lastdata for peeking.
 */
static err_t
lwip_recvfrom_udp_raw(struct lwip_sock *sock, int flags, struct msghdr *msg, u16_t *datagram_len, int dbg_s)
{
 8018e0c:	b590      	push	{r4, r7, lr}
 8018e0e:	b08d      	sub	sp, #52	@ 0x34
 8018e10:	af02      	add	r7, sp, #8
 8018e12:	60f8      	str	r0, [r7, #12]
 8018e14:	60b9      	str	r1, [r7, #8]
 8018e16:	607a      	str	r2, [r7, #4]
 8018e18:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t buflen, copylen, copied;
  int i;

  LWIP_UNUSED_ARG(dbg_s);
  LWIP_ERROR("lwip_recvfrom_udp_raw: invalid arguments", (msg->msg_iov != NULL) || (msg->msg_iovlen <= 0), return ERR_ARG;);
 8018e1a:	687b      	ldr	r3, [r7, #4]
 8018e1c:	689b      	ldr	r3, [r3, #8]
 8018e1e:	2b00      	cmp	r3, #0
 8018e20:	d10d      	bne.n	8018e3e <lwip_recvfrom_udp_raw+0x32>
 8018e22:	687b      	ldr	r3, [r7, #4]
 8018e24:	68db      	ldr	r3, [r3, #12]
 8018e26:	2b00      	cmp	r3, #0
 8018e28:	dd09      	ble.n	8018e3e <lwip_recvfrom_udp_raw+0x32>
 8018e2a:	4b5e      	ldr	r3, [pc, #376]	@ (8018fa4 <lwip_recvfrom_udp_raw+0x198>)
 8018e2c:	f240 4249 	movw	r2, #1097	@ 0x449
 8018e30:	495d      	ldr	r1, [pc, #372]	@ (8018fa8 <lwip_recvfrom_udp_raw+0x19c>)
 8018e32:	485e      	ldr	r0, [pc, #376]	@ (8018fac <lwip_recvfrom_udp_raw+0x1a0>)
 8018e34:	f011 fe12 	bl	802aa5c <iprintf>
 8018e38:	f06f 030f 	mvn.w	r3, #15
 8018e3c:	e0ae      	b.n	8018f9c <lwip_recvfrom_udp_raw+0x190>

  if (flags & MSG_DONTWAIT) {
 8018e3e:	68bb      	ldr	r3, [r7, #8]
 8018e40:	f003 0308 	and.w	r3, r3, #8
 8018e44:	2b00      	cmp	r3, #0
 8018e46:	d003      	beq.n	8018e50 <lwip_recvfrom_udp_raw+0x44>
    apiflags = NETCONN_DONTBLOCK;
 8018e48:	2304      	movs	r3, #4
 8018e4a:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 8018e4e:	e002      	b.n	8018e56 <lwip_recvfrom_udp_raw+0x4a>
  } else {
    apiflags = 0;
 8018e50:	2300      	movs	r3, #0
 8018e52:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
  }

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: top sock->lastdata=%p\n", (void *)sock->lastdata.netbuf));
  /* Check if there is data left from the last recv operation. */
  buf = sock->lastdata.netbuf;
 8018e56:	68fb      	ldr	r3, [r7, #12]
 8018e58:	685b      	ldr	r3, [r3, #4]
 8018e5a:	613b      	str	r3, [r7, #16]
  if (buf == NULL) {
 8018e5c:	693b      	ldr	r3, [r7, #16]
 8018e5e:	2b00      	cmp	r3, #0
 8018e60:	d11f      	bne.n	8018ea2 <lwip_recvfrom_udp_raw+0x96>
    /* No data was left from the previous operation, so we try to get
        some from the network. */
    err = netconn_recv_udp_raw_netbuf_flags(sock->conn, &buf, apiflags);
 8018e62:	68fb      	ldr	r3, [r7, #12]
 8018e64:	681b      	ldr	r3, [r3, #0]
 8018e66:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 8018e6a:	f107 0110 	add.w	r1, r7, #16
 8018e6e:	4618      	mov	r0, r3
 8018e70:	f7fd fd34 	bl	80168dc <netconn_recv_udp_raw_netbuf_flags>
 8018e74:	4603      	mov	r3, r0
 8018e76:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw[UDP/RAW]: netconn_recv err=%d, netbuf=%p\n",
                                err, (void *)buf));

    if (err != ERR_OK) {
 8018e7a:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8018e7e:	2b00      	cmp	r3, #0
 8018e80:	d002      	beq.n	8018e88 <lwip_recvfrom_udp_raw+0x7c>
      return err;
 8018e82:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8018e86:	e089      	b.n	8018f9c <lwip_recvfrom_udp_raw+0x190>
    }
    LWIP_ASSERT("buf != NULL", buf != NULL);
 8018e88:	693b      	ldr	r3, [r7, #16]
 8018e8a:	2b00      	cmp	r3, #0
 8018e8c:	d106      	bne.n	8018e9c <lwip_recvfrom_udp_raw+0x90>
 8018e8e:	4b45      	ldr	r3, [pc, #276]	@ (8018fa4 <lwip_recvfrom_udp_raw+0x198>)
 8018e90:	f240 425e 	movw	r2, #1118	@ 0x45e
 8018e94:	4946      	ldr	r1, [pc, #280]	@ (8018fb0 <lwip_recvfrom_udp_raw+0x1a4>)
 8018e96:	4845      	ldr	r0, [pc, #276]	@ (8018fac <lwip_recvfrom_udp_raw+0x1a0>)
 8018e98:	f011 fde0 	bl	802aa5c <iprintf>
    sock->lastdata.netbuf = buf;
 8018e9c:	693a      	ldr	r2, [r7, #16]
 8018e9e:	68fb      	ldr	r3, [r7, #12]
 8018ea0:	605a      	str	r2, [r3, #4]
  }
  buflen = buf->p->tot_len;
 8018ea2:	693b      	ldr	r3, [r7, #16]
 8018ea4:	681b      	ldr	r3, [r3, #0]
 8018ea6:	891b      	ldrh	r3, [r3, #8]
 8018ea8:	837b      	strh	r3, [r7, #26]
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw: buflen=%"U16_F"\n", buflen));

  copied = 0;
 8018eaa:	2300      	movs	r3, #0
 8018eac:	847b      	strh	r3, [r7, #34]	@ 0x22
  /* copy the pbuf payload into the iovs */
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 8018eae:	2300      	movs	r3, #0
 8018eb0:	61fb      	str	r3, [r7, #28]
 8018eb2:	e029      	b.n	8018f08 <lwip_recvfrom_udp_raw+0xfc>
    u16_t len_left = (u16_t)(buflen - copied);
 8018eb4:	8b7a      	ldrh	r2, [r7, #26]
 8018eb6:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8018eb8:	1ad3      	subs	r3, r2, r3
 8018eba:	833b      	strh	r3, [r7, #24]
    if (msg->msg_iov[i].iov_len > len_left) {
 8018ebc:	687b      	ldr	r3, [r7, #4]
 8018ebe:	689a      	ldr	r2, [r3, #8]
 8018ec0:	69fb      	ldr	r3, [r7, #28]
 8018ec2:	00db      	lsls	r3, r3, #3
 8018ec4:	4413      	add	r3, r2
 8018ec6:	685a      	ldr	r2, [r3, #4]
 8018ec8:	8b3b      	ldrh	r3, [r7, #24]
 8018eca:	429a      	cmp	r2, r3
 8018ecc:	d902      	bls.n	8018ed4 <lwip_recvfrom_udp_raw+0xc8>
      copylen = len_left;
 8018ece:	8b3b      	ldrh	r3, [r7, #24]
 8018ed0:	84bb      	strh	r3, [r7, #36]	@ 0x24
 8018ed2:	e006      	b.n	8018ee2 <lwip_recvfrom_udp_raw+0xd6>
    } else {
      copylen = (u16_t)msg->msg_iov[i].iov_len;
 8018ed4:	687b      	ldr	r3, [r7, #4]
 8018ed6:	689a      	ldr	r2, [r3, #8]
 8018ed8:	69fb      	ldr	r3, [r7, #28]
 8018eda:	00db      	lsls	r3, r3, #3
 8018edc:	4413      	add	r3, r2
 8018ede:	685b      	ldr	r3, [r3, #4]
 8018ee0:	84bb      	strh	r3, [r7, #36]	@ 0x24
    }

    /* copy the contents of the received buffer into
        the supplied memory buffer */
    pbuf_copy_partial(buf->p, (u8_t *)msg->msg_iov[i].iov_base, copylen, copied);
 8018ee2:	693b      	ldr	r3, [r7, #16]
 8018ee4:	6818      	ldr	r0, [r3, #0]
 8018ee6:	687b      	ldr	r3, [r7, #4]
 8018ee8:	689a      	ldr	r2, [r3, #8]
 8018eea:	69fb      	ldr	r3, [r7, #28]
 8018eec:	00db      	lsls	r3, r3, #3
 8018eee:	4413      	add	r3, r2
 8018ef0:	6819      	ldr	r1, [r3, #0]
 8018ef2:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8018ef4:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 8018ef6:	f002 fd3f 	bl	801b978 <pbuf_copy_partial>
    copied = (u16_t)(copied + copylen);
 8018efa:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8018efc:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8018efe:	4413      	add	r3, r2
 8018f00:	847b      	strh	r3, [r7, #34]	@ 0x22
  for (i = 0; (i < msg->msg_iovlen) && (copied < buflen); i++) {
 8018f02:	69fb      	ldr	r3, [r7, #28]
 8018f04:	3301      	adds	r3, #1
 8018f06:	61fb      	str	r3, [r7, #28]
 8018f08:	687b      	ldr	r3, [r7, #4]
 8018f0a:	68db      	ldr	r3, [r3, #12]
 8018f0c:	69fa      	ldr	r2, [r7, #28]
 8018f0e:	429a      	cmp	r2, r3
 8018f10:	da03      	bge.n	8018f1a <lwip_recvfrom_udp_raw+0x10e>
 8018f12:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8018f14:	8b7b      	ldrh	r3, [r7, #26]
 8018f16:	429a      	cmp	r2, r3
 8018f18:	d3cc      	bcc.n	8018eb4 <lwip_recvfrom_udp_raw+0xa8>
  }

  /* Check to see from where the data was.*/
#if !SOCKETS_DEBUG
  if (msg->msg_name && msg->msg_namelen)
 8018f1a:	687b      	ldr	r3, [r7, #4]
 8018f1c:	681b      	ldr	r3, [r3, #0]
 8018f1e:	2b00      	cmp	r3, #0
 8018f20:	d01a      	beq.n	8018f58 <lwip_recvfrom_udp_raw+0x14c>
 8018f22:	687b      	ldr	r3, [r7, #4]
 8018f24:	685b      	ldr	r3, [r3, #4]
 8018f26:	2b00      	cmp	r3, #0
 8018f28:	d016      	beq.n	8018f58 <lwip_recvfrom_udp_raw+0x14c>
#endif /* !SOCKETS_DEBUG */
  {
    LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom_udp_raw(%d):  addr=", dbg_s));
    ip_addr_debug_print_val(SOCKETS_DEBUG, *netbuf_fromaddr(buf));
    LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%d\n", netbuf_fromport(buf), copied));
    if (msg->msg_name && msg->msg_namelen) {
 8018f2a:	687b      	ldr	r3, [r7, #4]
 8018f2c:	681b      	ldr	r3, [r3, #0]
 8018f2e:	2b00      	cmp	r3, #0
 8018f30:	d012      	beq.n	8018f58 <lwip_recvfrom_udp_raw+0x14c>
 8018f32:	687b      	ldr	r3, [r7, #4]
 8018f34:	685b      	ldr	r3, [r3, #4]
 8018f36:	2b00      	cmp	r3, #0
 8018f38:	d00e      	beq.n	8018f58 <lwip_recvfrom_udp_raw+0x14c>
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 8018f3a:	68fb      	ldr	r3, [r7, #12]
 8018f3c:	6818      	ldr	r0, [r3, #0]
 8018f3e:	693b      	ldr	r3, [r7, #16]
 8018f40:	f103 0108 	add.w	r1, r3, #8
 8018f44:	693b      	ldr	r3, [r7, #16]
 8018f46:	899a      	ldrh	r2, [r3, #12]
                          (struct sockaddr *)msg->msg_name, &msg->msg_namelen);
 8018f48:	687b      	ldr	r3, [r7, #4]
 8018f4a:	681c      	ldr	r4, [r3, #0]
      lwip_sock_make_addr(sock->conn, netbuf_fromaddr(buf), netbuf_fromport(buf),
 8018f4c:	687b      	ldr	r3, [r7, #4]
 8018f4e:	3304      	adds	r3, #4
 8018f50:	9300      	str	r3, [sp, #0]
 8018f52:	4623      	mov	r3, r4
 8018f54:	f7ff feba 	bl	8018ccc <lwip_sock_make_addr>
    }
  }

  /* Initialize flag output */
  msg->msg_flags = 0;
 8018f58:	687b      	ldr	r3, [r7, #4]
 8018f5a:	2200      	movs	r2, #0
 8018f5c:	619a      	str	r2, [r3, #24]

  if (msg->msg_control) {
 8018f5e:	687b      	ldr	r3, [r7, #4]
 8018f60:	691b      	ldr	r3, [r3, #16]
 8018f62:	2b00      	cmp	r3, #0
 8018f64:	d007      	beq.n	8018f76 <lwip_recvfrom_udp_raw+0x16a>
    u8_t wrote_msg = 0;
 8018f66:	2300      	movs	r3, #0
 8018f68:	75fb      	strb	r3, [r7, #23]
#endif /* LWIP_IPV4 */
      }
    }
#endif /* LWIP_NETBUF_RECVINFO */

    if (!wrote_msg) {
 8018f6a:	7dfb      	ldrb	r3, [r7, #23]
 8018f6c:	2b00      	cmp	r3, #0
 8018f6e:	d102      	bne.n	8018f76 <lwip_recvfrom_udp_raw+0x16a>
      msg->msg_controllen = 0;
 8018f70:	687b      	ldr	r3, [r7, #4]
 8018f72:	2200      	movs	r2, #0
 8018f74:	615a      	str	r2, [r3, #20]
    }
  }

  /* If we don't peek the incoming message: zero lastdata pointer and free the netbuf */
  if ((flags & MSG_PEEK) == 0) {
 8018f76:	68bb      	ldr	r3, [r7, #8]
 8018f78:	f003 0301 	and.w	r3, r3, #1
 8018f7c:	2b00      	cmp	r3, #0
 8018f7e:	d106      	bne.n	8018f8e <lwip_recvfrom_udp_raw+0x182>
    sock->lastdata.netbuf = NULL;
 8018f80:	68fb      	ldr	r3, [r7, #12]
 8018f82:	2200      	movs	r2, #0
 8018f84:	605a      	str	r2, [r3, #4]
    netbuf_delete(buf);
 8018f86:	693b      	ldr	r3, [r7, #16]
 8018f88:	4618      	mov	r0, r3
 8018f8a:	f7ff fb05 	bl	8018598 <netbuf_delete>
  }
  if (datagram_len) {
 8018f8e:	683b      	ldr	r3, [r7, #0]
 8018f90:	2b00      	cmp	r3, #0
 8018f92:	d002      	beq.n	8018f9a <lwip_recvfrom_udp_raw+0x18e>
    *datagram_len = buflen;
 8018f94:	683b      	ldr	r3, [r7, #0]
 8018f96:	8b7a      	ldrh	r2, [r7, #26]
 8018f98:	801a      	strh	r2, [r3, #0]
  }
  return ERR_OK;
 8018f9a:	2300      	movs	r3, #0
}
 8018f9c:	4618      	mov	r0, r3
 8018f9e:	372c      	adds	r7, #44	@ 0x2c
 8018fa0:	46bd      	mov	sp, r7
 8018fa2:	bd90      	pop	{r4, r7, pc}
 8018fa4:	0802e844 	.word	0x0802e844
 8018fa8:	0802e9e8 	.word	0x0802e9e8
 8018fac:	0802e898 	.word	0x0802e898
 8018fb0:	0802ea14 	.word	0x0802ea14

08018fb4 <lwip_recvfrom>:

ssize_t
lwip_recvfrom(int s, void *mem, size_t len, int flags,
              struct sockaddr *from, socklen_t *fromlen)
{
 8018fb4:	b580      	push	{r7, lr}
 8018fb6:	b096      	sub	sp, #88	@ 0x58
 8018fb8:	af02      	add	r7, sp, #8
 8018fba:	60f8      	str	r0, [r7, #12]
 8018fbc:	60b9      	str	r1, [r7, #8]
 8018fbe:	607a      	str	r2, [r7, #4]
 8018fc0:	603b      	str	r3, [r7, #0]
  struct lwip_sock *sock;
  ssize_t ret;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %"SZT_F", 0x%x, ..)\n", s, mem, len, flags));
  sock = get_socket(s);
 8018fc2:	68f8      	ldr	r0, [r7, #12]
 8018fc4:	f7ff fbb8 	bl	8018738 <get_socket>
 8018fc8:	64f8      	str	r0, [r7, #76]	@ 0x4c
  if (!sock) {
 8018fca:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8018fcc:	2b00      	cmp	r3, #0
 8018fce:	d102      	bne.n	8018fd6 <lwip_recvfrom+0x22>
    return -1;
 8018fd0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8018fd4:	e078      	b.n	80190c8 <lwip_recvfrom+0x114>
  }
#if LWIP_TCP
  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8018fd6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8018fd8:	681b      	ldr	r3, [r3, #0]
 8018fda:	781b      	ldrb	r3, [r3, #0]
 8018fdc:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8018fe0:	2b10      	cmp	r3, #16
 8018fe2:	d112      	bne.n	801900a <lwip_recvfrom+0x56>
    ret = lwip_recv_tcp(sock, mem, len, flags);
 8018fe4:	683b      	ldr	r3, [r7, #0]
 8018fe6:	687a      	ldr	r2, [r7, #4]
 8018fe8:	68b9      	ldr	r1, [r7, #8]
 8018fea:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8018fec:	f7ff fd5e 	bl	8018aac <lwip_recv_tcp>
 8018ff0:	6478      	str	r0, [r7, #68]	@ 0x44
    lwip_recv_tcp_from(sock, from, fromlen, "lwip_recvfrom", s, ret);
 8018ff2:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8018ff4:	9301      	str	r3, [sp, #4]
 8018ff6:	68fb      	ldr	r3, [r7, #12]
 8018ff8:	9300      	str	r3, [sp, #0]
 8018ffa:	4b35      	ldr	r3, [pc, #212]	@ (80190d0 <lwip_recvfrom+0x11c>)
 8018ffc:	6dfa      	ldr	r2, [r7, #92]	@ 0x5c
 8018ffe:	6db9      	ldr	r1, [r7, #88]	@ 0x58
 8019000:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8019002:	f7ff fed1 	bl	8018da8 <lwip_recv_tcp_from>
    done_socket(sock);
    return ret;
 8019006:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8019008:	e05e      	b.n	80190c8 <lwip_recvfrom+0x114>
  } else
#endif
  {
    u16_t datagram_len = 0;
 801900a:	2300      	movs	r3, #0
 801900c:	877b      	strh	r3, [r7, #58]	@ 0x3a
    struct iovec vec;
    struct msghdr msg;
    err_t err;
    vec.iov_base = mem;
 801900e:	68bb      	ldr	r3, [r7, #8]
 8019010:	633b      	str	r3, [r7, #48]	@ 0x30
    vec.iov_len = len;
 8019012:	687b      	ldr	r3, [r7, #4]
 8019014:	637b      	str	r3, [r7, #52]	@ 0x34
    msg.msg_control = NULL;
 8019016:	2300      	movs	r3, #0
 8019018:	627b      	str	r3, [r7, #36]	@ 0x24
    msg.msg_controllen = 0;
 801901a:	2300      	movs	r3, #0
 801901c:	62bb      	str	r3, [r7, #40]	@ 0x28
    msg.msg_flags = 0;
 801901e:	2300      	movs	r3, #0
 8019020:	62fb      	str	r3, [r7, #44]	@ 0x2c
    msg.msg_iov = &vec;
 8019022:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8019026:	61fb      	str	r3, [r7, #28]
    msg.msg_iovlen = 1;
 8019028:	2301      	movs	r3, #1
 801902a:	623b      	str	r3, [r7, #32]
    msg.msg_name = from;
 801902c:	6dbb      	ldr	r3, [r7, #88]	@ 0x58
 801902e:	617b      	str	r3, [r7, #20]
    msg.msg_namelen = (fromlen ? *fromlen : 0);
 8019030:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8019032:	2b00      	cmp	r3, #0
 8019034:	d002      	beq.n	801903c <lwip_recvfrom+0x88>
 8019036:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 8019038:	681b      	ldr	r3, [r3, #0]
 801903a:	e000      	b.n	801903e <lwip_recvfrom+0x8a>
 801903c:	2300      	movs	r3, #0
 801903e:	61bb      	str	r3, [r7, #24]
    err = lwip_recvfrom_udp_raw(sock, flags, &msg, &datagram_len, s);
 8019040:	f107 013a 	add.w	r1, r7, #58	@ 0x3a
 8019044:	f107 0214 	add.w	r2, r7, #20
 8019048:	68fb      	ldr	r3, [r7, #12]
 801904a:	9300      	str	r3, [sp, #0]
 801904c:	460b      	mov	r3, r1
 801904e:	6839      	ldr	r1, [r7, #0]
 8019050:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 8019052:	f7ff fedb 	bl	8018e0c <lwip_recvfrom_udp_raw>
 8019056:	4603      	mov	r3, r0
 8019058:	f887 304b 	strb.w	r3, [r7, #75]	@ 0x4b
    if (err != ERR_OK) {
 801905c:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 8019060:	2b00      	cmp	r3, #0
 8019062:	d00e      	beq.n	8019082 <lwip_recvfrom+0xce>
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom[UDP/RAW](%d): buf == NULL, error is \"%s\"!\n",
                                  s, lwip_strerr(err)));
      sock_set_errno(sock, err_to_errno(err));
 8019064:	f997 304b 	ldrsb.w	r3, [r7, #75]	@ 0x4b
 8019068:	4618      	mov	r0, r3
 801906a:	f7ff fa77 	bl	801855c <err_to_errno>
 801906e:	63f8      	str	r0, [r7, #60]	@ 0x3c
 8019070:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8019072:	2b00      	cmp	r3, #0
 8019074:	d002      	beq.n	801907c <lwip_recvfrom+0xc8>
 8019076:	4a17      	ldr	r2, [pc, #92]	@ (80190d4 <lwip_recvfrom+0x120>)
 8019078:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801907a:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return -1;
 801907c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8019080:	e022      	b.n	80190c8 <lwip_recvfrom+0x114>
    }
    ret = (ssize_t)LWIP_MIN(LWIP_MIN(len, datagram_len), SSIZE_MAX);
 8019082:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8019084:	461a      	mov	r2, r3
 8019086:	687b      	ldr	r3, [r7, #4]
 8019088:	4293      	cmp	r3, r2
 801908a:	bf28      	it	cs
 801908c:	4613      	movcs	r3, r2
 801908e:	f06f 4200 	mvn.w	r2, #2147483648	@ 0x80000000
 8019092:	4293      	cmp	r3, r2
 8019094:	d206      	bcs.n	80190a4 <lwip_recvfrom+0xf0>
 8019096:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8019098:	461a      	mov	r2, r3
 801909a:	687b      	ldr	r3, [r7, #4]
 801909c:	4293      	cmp	r3, r2
 801909e:	bf28      	it	cs
 80190a0:	4613      	movcs	r3, r2
 80190a2:	e001      	b.n	80190a8 <lwip_recvfrom+0xf4>
 80190a4:	f06f 4300 	mvn.w	r3, #2147483648	@ 0x80000000
 80190a8:	647b      	str	r3, [r7, #68]	@ 0x44
    if (fromlen) {
 80190aa:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 80190ac:	2b00      	cmp	r3, #0
 80190ae:	d002      	beq.n	80190b6 <lwip_recvfrom+0x102>
      *fromlen = msg.msg_namelen;
 80190b0:	69ba      	ldr	r2, [r7, #24]
 80190b2:	6dfb      	ldr	r3, [r7, #92]	@ 0x5c
 80190b4:	601a      	str	r2, [r3, #0]
    }
  }

  sock_set_errno(sock, 0);
 80190b6:	2300      	movs	r3, #0
 80190b8:	643b      	str	r3, [r7, #64]	@ 0x40
 80190ba:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80190bc:	2b00      	cmp	r3, #0
 80190be:	d002      	beq.n	80190c6 <lwip_recvfrom+0x112>
 80190c0:	4a04      	ldr	r2, [pc, #16]	@ (80190d4 <lwip_recvfrom+0x120>)
 80190c2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80190c4:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return ret;
 80190c6:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
}
 80190c8:	4618      	mov	r0, r3
 80190ca:	3750      	adds	r7, #80	@ 0x50
 80190cc:	46bd      	mov	sp, r7
 80190ce:	bd80      	pop	{r7, pc}
 80190d0:	0802ea20 	.word	0x0802ea20
 80190d4:	2402b2a0 	.word	0x2402b2a0

080190d8 <lwip_recv>:
  return lwip_recvmsg(s, &msg, 0);
}

ssize_t
lwip_recv(int s, void *mem, size_t len, int flags)
{
 80190d8:	b580      	push	{r7, lr}
 80190da:	b086      	sub	sp, #24
 80190dc:	af02      	add	r7, sp, #8
 80190de:	60f8      	str	r0, [r7, #12]
 80190e0:	60b9      	str	r1, [r7, #8]
 80190e2:	607a      	str	r2, [r7, #4]
 80190e4:	603b      	str	r3, [r7, #0]
  return lwip_recvfrom(s, mem, len, flags, NULL, NULL);
 80190e6:	2300      	movs	r3, #0
 80190e8:	9301      	str	r3, [sp, #4]
 80190ea:	2300      	movs	r3, #0
 80190ec:	9300      	str	r3, [sp, #0]
 80190ee:	683b      	ldr	r3, [r7, #0]
 80190f0:	687a      	ldr	r2, [r7, #4]
 80190f2:	68b9      	ldr	r1, [r7, #8]
 80190f4:	68f8      	ldr	r0, [r7, #12]
 80190f6:	f7ff ff5d 	bl	8018fb4 <lwip_recvfrom>
 80190fa:	4603      	mov	r3, r0
}
 80190fc:	4618      	mov	r0, r3
 80190fe:	3710      	adds	r7, #16
 8019100:	46bd      	mov	sp, r7
 8019102:	bd80      	pop	{r7, pc}

08019104 <lwip_send>:
#endif /* LWIP_UDP || LWIP_RAW */
}

ssize_t
lwip_send(int s, const void *data, size_t size, int flags)
{
 8019104:	b580      	push	{r7, lr}
 8019106:	b08a      	sub	sp, #40	@ 0x28
 8019108:	af02      	add	r7, sp, #8
 801910a:	60f8      	str	r0, [r7, #12]
 801910c:	60b9      	str	r1, [r7, #8]
 801910e:	607a      	str	r2, [r7, #4]
 8019110:	603b      	str	r3, [r7, #0]
  size_t written;

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%"SZT_F", flags=0x%x)\n",
                              s, data, size, flags));

  sock = get_socket(s);
 8019112:	68f8      	ldr	r0, [r7, #12]
 8019114:	f7ff fb10 	bl	8018738 <get_socket>
 8019118:	61f8      	str	r0, [r7, #28]
  if (!sock) {
 801911a:	69fb      	ldr	r3, [r7, #28]
 801911c:	2b00      	cmp	r3, #0
 801911e:	d102      	bne.n	8019126 <lwip_send+0x22>
    return -1;
 8019120:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8019124:	e046      	b.n	80191b4 <lwip_send+0xb0>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) != NETCONN_TCP) {
 8019126:	69fb      	ldr	r3, [r7, #28]
 8019128:	681b      	ldr	r3, [r3, #0]
 801912a:	781b      	ldrb	r3, [r3, #0]
 801912c:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8019130:	2b10      	cmp	r3, #16
 8019132:	d00b      	beq.n	801914c <lwip_send+0x48>
#if (LWIP_UDP || LWIP_RAW)
    done_socket(sock);
    return lwip_sendto(s, data, size, flags, NULL, 0);
 8019134:	2300      	movs	r3, #0
 8019136:	9301      	str	r3, [sp, #4]
 8019138:	2300      	movs	r3, #0
 801913a:	9300      	str	r3, [sp, #0]
 801913c:	683b      	ldr	r3, [r7, #0]
 801913e:	687a      	ldr	r2, [r7, #4]
 8019140:	68b9      	ldr	r1, [r7, #8]
 8019142:	68f8      	ldr	r0, [r7, #12]
 8019144:	f000 f83c 	bl	80191c0 <lwip_sendto>
 8019148:	4603      	mov	r3, r0
 801914a:	e033      	b.n	80191b4 <lwip_send+0xb0>
    return -1;
#endif /* (LWIP_UDP || LWIP_RAW) */
  }

  write_flags = (u8_t)(NETCONN_COPY |
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 801914c:	683b      	ldr	r3, [r7, #0]
 801914e:	f003 0310 	and.w	r3, r3, #16
  write_flags = (u8_t)(NETCONN_COPY |
 8019152:	2b00      	cmp	r3, #0
 8019154:	d001      	beq.n	801915a <lwip_send+0x56>
 8019156:	2203      	movs	r2, #3
 8019158:	e000      	b.n	801915c <lwip_send+0x58>
 801915a:	2201      	movs	r2, #1
                       ((flags & MSG_MORE)     ? NETCONN_MORE      : 0) |
 801915c:	683b      	ldr	r3, [r7, #0]
 801915e:	105b      	asrs	r3, r3, #1
 8019160:	b25b      	sxtb	r3, r3
 8019162:	f003 0304 	and.w	r3, r3, #4
 8019166:	b25b      	sxtb	r3, r3
 8019168:	4313      	orrs	r3, r2
 801916a:	b25b      	sxtb	r3, r3
  write_flags = (u8_t)(NETCONN_COPY |
 801916c:	76fb      	strb	r3, [r7, #27]
                       ((flags & MSG_DONTWAIT) ? NETCONN_DONTBLOCK : 0));
  written = 0;
 801916e:	2300      	movs	r3, #0
 8019170:	613b      	str	r3, [r7, #16]
  err = netconn_write_partly(sock->conn, data, size, write_flags, &written);
 8019172:	69fb      	ldr	r3, [r7, #28]
 8019174:	6818      	ldr	r0, [r3, #0]
 8019176:	7efa      	ldrb	r2, [r7, #27]
 8019178:	f107 0310 	add.w	r3, r7, #16
 801917c:	9300      	str	r3, [sp, #0]
 801917e:	4613      	mov	r3, r2
 8019180:	687a      	ldr	r2, [r7, #4]
 8019182:	68b9      	ldr	r1, [r7, #8]
 8019184:	f7fd fc04 	bl	8016990 <netconn_write_partly>
 8019188:	4603      	mov	r3, r0
 801918a:	76bb      	strb	r3, [r7, #26]

  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d written=%"SZT_F"\n", s, err, written));
  sock_set_errno(sock, err_to_errno(err));
 801918c:	f997 301a 	ldrsb.w	r3, [r7, #26]
 8019190:	4618      	mov	r0, r3
 8019192:	f7ff f9e3 	bl	801855c <err_to_errno>
 8019196:	6178      	str	r0, [r7, #20]
 8019198:	697b      	ldr	r3, [r7, #20]
 801919a:	2b00      	cmp	r3, #0
 801919c:	d002      	beq.n	80191a4 <lwip_send+0xa0>
 801919e:	4a07      	ldr	r2, [pc, #28]	@ (80191bc <lwip_send+0xb8>)
 80191a0:	697b      	ldr	r3, [r7, #20]
 80191a2:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  /* casting 'written' to ssize_t is OK here since the netconn API limits it to SSIZE_MAX */
  return (err == ERR_OK ? (ssize_t)written : -1);
 80191a4:	f997 301a 	ldrsb.w	r3, [r7, #26]
 80191a8:	2b00      	cmp	r3, #0
 80191aa:	d101      	bne.n	80191b0 <lwip_send+0xac>
 80191ac:	693b      	ldr	r3, [r7, #16]
 80191ae:	e001      	b.n	80191b4 <lwip_send+0xb0>
 80191b0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 80191b4:	4618      	mov	r0, r3
 80191b6:	3720      	adds	r7, #32
 80191b8:	46bd      	mov	sp, r7
 80191ba:	bd80      	pop	{r7, pc}
 80191bc:	2402b2a0 	.word	0x2402b2a0

080191c0 <lwip_sendto>:
}

ssize_t
lwip_sendto(int s, const void *data, size_t size, int flags,
            const struct sockaddr *to, socklen_t tolen)
{
 80191c0:	b580      	push	{r7, lr}
 80191c2:	b08e      	sub	sp, #56	@ 0x38
 80191c4:	af00      	add	r7, sp, #0
 80191c6:	60f8      	str	r0, [r7, #12]
 80191c8:	60b9      	str	r1, [r7, #8]
 80191ca:	607a      	str	r2, [r7, #4]
 80191cc:	603b      	str	r3, [r7, #0]
  err_t err;
  u16_t short_size;
  u16_t remote_port;
  struct netbuf buf;

  sock = get_socket(s);
 80191ce:	68f8      	ldr	r0, [r7, #12]
 80191d0:	f7ff fab2 	bl	8018738 <get_socket>
 80191d4:	6338      	str	r0, [r7, #48]	@ 0x30
  if (!sock) {
 80191d6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80191d8:	2b00      	cmp	r3, #0
 80191da:	d102      	bne.n	80191e2 <lwip_sendto+0x22>
    return -1;
 80191dc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80191e0:	e093      	b.n	801930a <lwip_sendto+0x14a>
  }

  if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 80191e2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80191e4:	681b      	ldr	r3, [r3, #0]
 80191e6:	781b      	ldrb	r3, [r3, #0]
 80191e8:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 80191ec:	2b10      	cmp	r3, #16
 80191ee:	d107      	bne.n	8019200 <lwip_sendto+0x40>
#if LWIP_TCP
    done_socket(sock);
    return lwip_send(s, data, size, flags);
 80191f0:	683b      	ldr	r3, [r7, #0]
 80191f2:	687a      	ldr	r2, [r7, #4]
 80191f4:	68b9      	ldr	r1, [r7, #8]
 80191f6:	68f8      	ldr	r0, [r7, #12]
 80191f8:	f7ff ff84 	bl	8019104 <lwip_send>
 80191fc:	4603      	mov	r3, r0
 80191fe:	e084      	b.n	801930a <lwip_sendto+0x14a>
    done_socket(sock);
    return -1;
#endif /* LWIP_TCP */
  }

  if (size > LWIP_MIN(0xFFFF, SSIZE_MAX)) {
 8019200:	687b      	ldr	r3, [r7, #4]
 8019202:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8019206:	d30a      	bcc.n	801921e <lwip_sendto+0x5e>
    /* cannot fit into one datagram (at least for us) */
    sock_set_errno(sock, EMSGSIZE);
 8019208:	235a      	movs	r3, #90	@ 0x5a
 801920a:	623b      	str	r3, [r7, #32]
 801920c:	6a3b      	ldr	r3, [r7, #32]
 801920e:	2b00      	cmp	r3, #0
 8019210:	d002      	beq.n	8019218 <lwip_sendto+0x58>
 8019212:	4a40      	ldr	r2, [pc, #256]	@ (8019314 <lwip_sendto+0x154>)
 8019214:	6a3b      	ldr	r3, [r7, #32]
 8019216:	6013      	str	r3, [r2, #0]
    done_socket(sock);
    return -1;
 8019218:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801921c:	e075      	b.n	801930a <lwip_sendto+0x14a>
  }
  short_size = (u16_t)size;
 801921e:	687b      	ldr	r3, [r7, #4]
 8019220:	85fb      	strh	r3, [r7, #46]	@ 0x2e
  LWIP_ERROR("lwip_sendto: invalid address", (((to == NULL) && (tolen == 0)) ||
 8019222:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8019224:	2b00      	cmp	r3, #0
 8019226:	d102      	bne.n	801922e <lwip_sendto+0x6e>
 8019228:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801922a:	2b00      	cmp	r3, #0
 801922c:	d023      	beq.n	8019276 <lwip_sendto+0xb6>
 801922e:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 8019230:	2b10      	cmp	r3, #16
 8019232:	d10b      	bne.n	801924c <lwip_sendto+0x8c>
 8019234:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8019236:	2b00      	cmp	r3, #0
 8019238:	d008      	beq.n	801924c <lwip_sendto+0x8c>
 801923a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801923c:	785b      	ldrb	r3, [r3, #1]
 801923e:	2b02      	cmp	r3, #2
 8019240:	d104      	bne.n	801924c <lwip_sendto+0x8c>
 8019242:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8019244:	f003 0303 	and.w	r3, r3, #3
 8019248:	2b00      	cmp	r3, #0
 801924a:	d014      	beq.n	8019276 <lwip_sendto+0xb6>
 801924c:	4b32      	ldr	r3, [pc, #200]	@ (8019318 <lwip_sendto+0x158>)
 801924e:	f240 6252 	movw	r2, #1618	@ 0x652
 8019252:	4932      	ldr	r1, [pc, #200]	@ (801931c <lwip_sendto+0x15c>)
 8019254:	4832      	ldr	r0, [pc, #200]	@ (8019320 <lwip_sendto+0x160>)
 8019256:	f011 fc01 	bl	802aa5c <iprintf>
 801925a:	f06f 000f 	mvn.w	r0, #15
 801925e:	f7ff f97d 	bl	801855c <err_to_errno>
 8019262:	62b8      	str	r0, [r7, #40]	@ 0x28
 8019264:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8019266:	2b00      	cmp	r3, #0
 8019268:	d002      	beq.n	8019270 <lwip_sendto+0xb0>
 801926a:	4a2a      	ldr	r2, [pc, #168]	@ (8019314 <lwip_sendto+0x154>)
 801926c:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801926e:	6013      	str	r3, [r2, #0]
 8019270:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8019274:	e049      	b.n	801930a <lwip_sendto+0x14a>
              ((to != NULL) && (IS_SOCK_ADDR_TYPE_VALID(to) && IS_SOCK_ADDR_ALIGNED(to))))),
             sock_set_errno(sock, err_to_errno(ERR_ARG)); done_socket(sock); return -1;);
  LWIP_UNUSED_ARG(tolen);

  /* initialize a buffer */
  buf.p = buf.ptr = NULL;
 8019276:	2300      	movs	r3, #0
 8019278:	617b      	str	r3, [r7, #20]
 801927a:	697b      	ldr	r3, [r7, #20]
 801927c:	613b      	str	r3, [r7, #16]
#if LWIP_CHECKSUM_ON_COPY
  buf.flags = 0;
#endif /* LWIP_CHECKSUM_ON_COPY */
  if (to) {
 801927e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8019280:	2b00      	cmp	r3, #0
 8019282:	d00a      	beq.n	801929a <lwip_sendto+0xda>
    SOCKADDR_TO_IPADDR_PORT(to, &buf.addr, remote_port);
 8019284:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8019286:	685b      	ldr	r3, [r3, #4]
 8019288:	61bb      	str	r3, [r7, #24]
 801928a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 801928c:	885b      	ldrh	r3, [r3, #2]
 801928e:	4618      	mov	r0, r3
 8019290:	f000 fc8a 	bl	8019ba8 <lwip_htons>
 8019294:	4603      	mov	r3, r0
 8019296:	86fb      	strh	r3, [r7, #54]	@ 0x36
 8019298:	e003      	b.n	80192a2 <lwip_sendto+0xe2>
  } else {
    remote_port = 0;
 801929a:	2300      	movs	r3, #0
 801929c:	86fb      	strh	r3, [r7, #54]	@ 0x36
    ip_addr_set_any(NETCONNTYPE_ISIPV6(netconn_type(sock->conn)), &buf.addr);
 801929e:	2300      	movs	r3, #0
 80192a0:	61bb      	str	r3, [r7, #24]
  }
  netbuf_fromport(&buf) = remote_port;
 80192a2:	8efb      	ldrh	r3, [r7, #54]	@ 0x36
 80192a4:	83bb      	strh	r3, [r7, #28]
      MEMCPY(buf.p->payload, data, short_size);
    }
    err = ERR_OK;
  }
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  err = netbuf_ref(&buf, data, short_size);
 80192a6:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 80192a8:	f107 0310 	add.w	r3, r7, #16
 80192ac:	68b9      	ldr	r1, [r7, #8]
 80192ae:	4618      	mov	r0, r3
 80192b0:	f7ff f9ba 	bl	8018628 <netbuf_ref>
 80192b4:	4603      	mov	r3, r0
 80192b6:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (err == ERR_OK) {
 80192ba:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 80192be:	2b00      	cmp	r3, #0
 80192c0:	d10a      	bne.n	80192d8 <lwip_sendto+0x118>
      IP_SET_TYPE_VAL(buf.addr, IPADDR_TYPE_V4);
    }
#endif /* LWIP_IPV4 && LWIP_IPV6 */

    /* send the data */
    err = netconn_send(sock->conn, &buf);
 80192c2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80192c4:	681b      	ldr	r3, [r3, #0]
 80192c6:	f107 0210 	add.w	r2, r7, #16
 80192ca:	4611      	mov	r1, r2
 80192cc:	4618      	mov	r0, r3
 80192ce:	f7fd fb31 	bl	8016934 <netconn_send>
 80192d2:	4603      	mov	r3, r0
 80192d4:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
  }

  /* deallocated the buffer */
  netbuf_free(&buf);
 80192d8:	f107 0310 	add.w	r3, r7, #16
 80192dc:	4618      	mov	r0, r3
 80192de:	f7ff f97b 	bl	80185d8 <netbuf_free>

  sock_set_errno(sock, err_to_errno(err));
 80192e2:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 80192e6:	4618      	mov	r0, r3
 80192e8:	f7ff f938 	bl	801855c <err_to_errno>
 80192ec:	6278      	str	r0, [r7, #36]	@ 0x24
 80192ee:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80192f0:	2b00      	cmp	r3, #0
 80192f2:	d002      	beq.n	80192fa <lwip_sendto+0x13a>
 80192f4:	4a07      	ldr	r2, [pc, #28]	@ (8019314 <lwip_sendto+0x154>)
 80192f6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80192f8:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return (err == ERR_OK ? short_size : -1);
 80192fa:	f997 302d 	ldrsb.w	r3, [r7, #45]	@ 0x2d
 80192fe:	2b00      	cmp	r3, #0
 8019300:	d101      	bne.n	8019306 <lwip_sendto+0x146>
 8019302:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 8019304:	e001      	b.n	801930a <lwip_sendto+0x14a>
 8019306:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 801930a:	4618      	mov	r0, r3
 801930c:	3738      	adds	r7, #56	@ 0x38
 801930e:	46bd      	mov	sp, r7
 8019310:	bd80      	pop	{r7, pc}
 8019312:	bf00      	nop
 8019314:	2402b2a0 	.word	0x2402b2a0
 8019318:	0802e844 	.word	0x0802e844
 801931c:	0802eb24 	.word	0x0802eb24
 8019320:	0802e898 	.word	0x0802e898

08019324 <lwip_socket>:

int
lwip_socket(int domain, int type, int protocol)
{
 8019324:	b580      	push	{r7, lr}
 8019326:	b086      	sub	sp, #24
 8019328:	af00      	add	r7, sp, #0
 801932a:	60f8      	str	r0, [r7, #12]
 801932c:	60b9      	str	r1, [r7, #8]
 801932e:	607a      	str	r2, [r7, #4]
  int i;

  LWIP_UNUSED_ARG(domain); /* @todo: check this */

  /* create a netconn */
  switch (type) {
 8019330:	68bb      	ldr	r3, [r7, #8]
 8019332:	2b03      	cmp	r3, #3
 8019334:	d009      	beq.n	801934a <lwip_socket+0x26>
 8019336:	68bb      	ldr	r3, [r7, #8]
 8019338:	2b03      	cmp	r3, #3
 801933a:	dc23      	bgt.n	8019384 <lwip_socket+0x60>
 801933c:	68bb      	ldr	r3, [r7, #8]
 801933e:	2b01      	cmp	r3, #1
 8019340:	d019      	beq.n	8019376 <lwip_socket+0x52>
 8019342:	68bb      	ldr	r3, [r7, #8]
 8019344:	2b02      	cmp	r3, #2
 8019346:	d009      	beq.n	801935c <lwip_socket+0x38>
 8019348:	e01c      	b.n	8019384 <lwip_socket+0x60>
    case SOCK_RAW:
      conn = netconn_new_with_proto_and_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_RAW),
 801934a:	687b      	ldr	r3, [r7, #4]
 801934c:	b2db      	uxtb	r3, r3
 801934e:	4a22      	ldr	r2, [pc, #136]	@ (80193d8 <lwip_socket+0xb4>)
 8019350:	4619      	mov	r1, r3
 8019352:	2040      	movs	r0, #64	@ 0x40
 8019354:	f7fc ff60 	bl	8016218 <netconn_new_with_proto_and_callback>
 8019358:	6178      	str	r0, [r7, #20]
             (u8_t)protocol, DEFAULT_SOCKET_EVENTCB);
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 801935a:	e019      	b.n	8019390 <lwip_socket+0x6c>
    case SOCK_DGRAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain,
 801935c:	687b      	ldr	r3, [r7, #4]
 801935e:	2b88      	cmp	r3, #136	@ 0x88
 8019360:	d101      	bne.n	8019366 <lwip_socket+0x42>
 8019362:	2321      	movs	r3, #33	@ 0x21
 8019364:	e000      	b.n	8019368 <lwip_socket+0x44>
 8019366:	2320      	movs	r3, #32
 8019368:	4a1b      	ldr	r2, [pc, #108]	@ (80193d8 <lwip_socket+0xb4>)
 801936a:	2100      	movs	r1, #0
 801936c:	4618      	mov	r0, r3
 801936e:	f7fc ff53 	bl	8016218 <netconn_new_with_proto_and_callback>
 8019372:	6178      	str	r0, [r7, #20]
      if (conn) {
        /* netconn layer enables pktinfo by default, sockets default to off */
        conn->flags &= ~NETCONN_FLAG_PKTINFO;
      }
#endif /* LWIP_NETBUF_RECVINFO */
      break;
 8019374:	e00c      	b.n	8019390 <lwip_socket+0x6c>
    case SOCK_STREAM:
      conn = netconn_new_with_callback(DOMAIN_TO_NETCONN_TYPE(domain, NETCONN_TCP), DEFAULT_SOCKET_EVENTCB);
 8019376:	4a18      	ldr	r2, [pc, #96]	@ (80193d8 <lwip_socket+0xb4>)
 8019378:	2100      	movs	r1, #0
 801937a:	2010      	movs	r0, #16
 801937c:	f7fc ff4c 	bl	8016218 <netconn_new_with_proto_and_callback>
 8019380:	6178      	str	r0, [r7, #20]
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ",
                                  domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol));
      break;
 8019382:	e005      	b.n	8019390 <lwip_socket+0x6c>
    default:
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n",
                                  domain, type, protocol));
      set_errno(EINVAL);
 8019384:	4b15      	ldr	r3, [pc, #84]	@ (80193dc <lwip_socket+0xb8>)
 8019386:	2216      	movs	r2, #22
 8019388:	601a      	str	r2, [r3, #0]
      return -1;
 801938a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801938e:	e01e      	b.n	80193ce <lwip_socket+0xaa>
  }

  if (!conn) {
 8019390:	697b      	ldr	r3, [r7, #20]
 8019392:	2b00      	cmp	r3, #0
 8019394:	d105      	bne.n	80193a2 <lwip_socket+0x7e>
    LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n"));
    set_errno(ENOBUFS);
 8019396:	4b11      	ldr	r3, [pc, #68]	@ (80193dc <lwip_socket+0xb8>)
 8019398:	2269      	movs	r2, #105	@ 0x69
 801939a:	601a      	str	r2, [r3, #0]
    return -1;
 801939c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80193a0:	e015      	b.n	80193ce <lwip_socket+0xaa>
  }

  i = alloc_socket(conn, 0);
 80193a2:	2100      	movs	r1, #0
 80193a4:	6978      	ldr	r0, [r7, #20]
 80193a6:	f7ff f9df 	bl	8018768 <alloc_socket>
 80193aa:	6138      	str	r0, [r7, #16]

  if (i == -1) {
 80193ac:	693b      	ldr	r3, [r7, #16]
 80193ae:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80193b2:	d108      	bne.n	80193c6 <lwip_socket+0xa2>
    netconn_delete(conn);
 80193b4:	6978      	ldr	r0, [r7, #20]
 80193b6:	f7fc ffcd 	bl	8016354 <netconn_delete>
    set_errno(ENFILE);
 80193ba:	4b08      	ldr	r3, [pc, #32]	@ (80193dc <lwip_socket+0xb8>)
 80193bc:	2217      	movs	r2, #23
 80193be:	601a      	str	r2, [r3, #0]
    return -1;
 80193c0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80193c4:	e003      	b.n	80193ce <lwip_socket+0xaa>
  }
  conn->socket = i;
 80193c6:	697b      	ldr	r3, [r7, #20]
 80193c8:	693a      	ldr	r2, [r7, #16]
 80193ca:	619a      	str	r2, [r3, #24]
  done_socket(&sockets[i - LWIP_SOCKET_OFFSET]);
  LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i));
  set_errno(0);
  return i;
 80193cc:	693b      	ldr	r3, [r7, #16]
}
 80193ce:	4618      	mov	r0, r3
 80193d0:	3718      	adds	r7, #24
 80193d2:	46bd      	mov	sp, r7
 80193d4:	bd80      	pop	{r7, pc}
 80193d6:	bf00      	nop
 80193d8:	08019469 	.word	0x08019469
 80193dc:	2402b2a0 	.word	0x2402b2a0

080193e0 <lwip_poll_should_wake>:
 * Check whether event_callback should wake up a thread waiting in
 * lwip_poll.
 */
static int
lwip_poll_should_wake(const struct lwip_select_cb *scb, int fd, int has_recvevent, int has_sendevent, int has_errevent)
{
 80193e0:	b480      	push	{r7}
 80193e2:	b087      	sub	sp, #28
 80193e4:	af00      	add	r7, sp, #0
 80193e6:	60f8      	str	r0, [r7, #12]
 80193e8:	60b9      	str	r1, [r7, #8]
 80193ea:	607a      	str	r2, [r7, #4]
 80193ec:	603b      	str	r3, [r7, #0]
  nfds_t fdi;
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 80193ee:	2300      	movs	r3, #0
 80193f0:	617b      	str	r3, [r7, #20]
 80193f2:	e02c      	b.n	801944e <lwip_poll_should_wake+0x6e>
    const struct pollfd *pollfd = &scb->poll_fds[fdi];
 80193f4:	68fb      	ldr	r3, [r7, #12]
 80193f6:	695a      	ldr	r2, [r3, #20]
 80193f8:	697b      	ldr	r3, [r7, #20]
 80193fa:	00db      	lsls	r3, r3, #3
 80193fc:	4413      	add	r3, r2
 80193fe:	613b      	str	r3, [r7, #16]
    if (pollfd->fd == fd) {
 8019400:	693b      	ldr	r3, [r7, #16]
 8019402:	681b      	ldr	r3, [r3, #0]
 8019404:	68ba      	ldr	r2, [r7, #8]
 8019406:	429a      	cmp	r2, r3
 8019408:	d11e      	bne.n	8019448 <lwip_poll_should_wake+0x68>
      /* Do not update pollfd->revents right here;
         that would be a data race because lwip_pollscan
         accesses revents without protecting. */
      if (has_recvevent && (pollfd->events & POLLIN) != 0) {
 801940a:	687b      	ldr	r3, [r7, #4]
 801940c:	2b00      	cmp	r3, #0
 801940e:	d009      	beq.n	8019424 <lwip_poll_should_wake+0x44>
 8019410:	693b      	ldr	r3, [r7, #16]
 8019412:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 8019416:	b29b      	uxth	r3, r3
 8019418:	f003 0301 	and.w	r3, r3, #1
 801941c:	2b00      	cmp	r3, #0
 801941e:	d001      	beq.n	8019424 <lwip_poll_should_wake+0x44>
        return 1;
 8019420:	2301      	movs	r3, #1
 8019422:	e01a      	b.n	801945a <lwip_poll_should_wake+0x7a>
      }
      if (has_sendevent && (pollfd->events & POLLOUT) != 0) {
 8019424:	683b      	ldr	r3, [r7, #0]
 8019426:	2b00      	cmp	r3, #0
 8019428:	d009      	beq.n	801943e <lwip_poll_should_wake+0x5e>
 801942a:	693b      	ldr	r3, [r7, #16]
 801942c:	f9b3 3004 	ldrsh.w	r3, [r3, #4]
 8019430:	b29b      	uxth	r3, r3
 8019432:	f003 0302 	and.w	r3, r3, #2
 8019436:	2b00      	cmp	r3, #0
 8019438:	d001      	beq.n	801943e <lwip_poll_should_wake+0x5e>
        return 1;
 801943a:	2301      	movs	r3, #1
 801943c:	e00d      	b.n	801945a <lwip_poll_should_wake+0x7a>
      }
      if (has_errevent) {
 801943e:	6a3b      	ldr	r3, [r7, #32]
 8019440:	2b00      	cmp	r3, #0
 8019442:	d001      	beq.n	8019448 <lwip_poll_should_wake+0x68>
        /* POLLERR is output only. */
        return 1;
 8019444:	2301      	movs	r3, #1
 8019446:	e008      	b.n	801945a <lwip_poll_should_wake+0x7a>
  for (fdi = 0; fdi < scb->poll_nfds; fdi++) {
 8019448:	697b      	ldr	r3, [r7, #20]
 801944a:	3301      	adds	r3, #1
 801944c:	617b      	str	r3, [r7, #20]
 801944e:	68fb      	ldr	r3, [r7, #12]
 8019450:	699b      	ldr	r3, [r3, #24]
 8019452:	697a      	ldr	r2, [r7, #20]
 8019454:	429a      	cmp	r2, r3
 8019456:	d3cd      	bcc.n	80193f4 <lwip_poll_should_wake+0x14>
      }
    }
  }
  return 0;
 8019458:	2300      	movs	r3, #0
}
 801945a:	4618      	mov	r0, r3
 801945c:	371c      	adds	r7, #28
 801945e:	46bd      	mov	sp, r7
 8019460:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019464:	4770      	bx	lr
	...

08019468 <event_callback>:
 *   NETCONN_EVT_ERROR
 * This requirement will be asserted in select_check_waiters()
 */
static void
event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len)
{
 8019468:	b580      	push	{r7, lr}
 801946a:	b08a      	sub	sp, #40	@ 0x28
 801946c:	af00      	add	r7, sp, #0
 801946e:	6078      	str	r0, [r7, #4]
 8019470:	460b      	mov	r3, r1
 8019472:	70fb      	strb	r3, [r7, #3]
 8019474:	4613      	mov	r3, r2
 8019476:	803b      	strh	r3, [r7, #0]
  SYS_ARCH_DECL_PROTECT(lev);

  LWIP_UNUSED_ARG(len);

  /* Get socket */
  if (conn) {
 8019478:	687b      	ldr	r3, [r7, #4]
 801947a:	2b00      	cmp	r3, #0
 801947c:	f000 80a4 	beq.w	80195c8 <event_callback+0x160>
    s = conn->socket;
 8019480:	687b      	ldr	r3, [r7, #4]
 8019482:	699b      	ldr	r3, [r3, #24]
 8019484:	627b      	str	r3, [r7, #36]	@ 0x24
    if (s < 0) {
 8019486:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019488:	2b00      	cmp	r3, #0
 801948a:	da18      	bge.n	80194be <event_callback+0x56>
      /* Data comes in right away after an accept, even though
       * the server task might not have created a new socket yet.
       * Just count down (or up) if that's the case and we
       * will use the data later. Note that only receive events
       * can happen before the new socket is set up. */
      SYS_ARCH_PROTECT(lev);
 801948c:	f00e f850 	bl	8027530 <sys_arch_protect>
 8019490:	61f8      	str	r0, [r7, #28]
      if (conn->socket < 0) {
 8019492:	687b      	ldr	r3, [r7, #4]
 8019494:	699b      	ldr	r3, [r3, #24]
 8019496:	2b00      	cmp	r3, #0
 8019498:	da0b      	bge.n	80194b2 <event_callback+0x4a>
        if (evt == NETCONN_EVT_RCVPLUS) {
 801949a:	78fb      	ldrb	r3, [r7, #3]
 801949c:	2b00      	cmp	r3, #0
 801949e:	d104      	bne.n	80194aa <event_callback+0x42>
          /* conn->socket is -1 on initialization
             lwip_accept adjusts sock->recvevent if conn->socket < -1 */
          conn->socket--;
 80194a0:	687b      	ldr	r3, [r7, #4]
 80194a2:	699b      	ldr	r3, [r3, #24]
 80194a4:	1e5a      	subs	r2, r3, #1
 80194a6:	687b      	ldr	r3, [r7, #4]
 80194a8:	619a      	str	r2, [r3, #24]
        }
        SYS_ARCH_UNPROTECT(lev);
 80194aa:	69f8      	ldr	r0, [r7, #28]
 80194ac:	f00e f84e 	bl	802754c <sys_arch_unprotect>
        return;
 80194b0:	e08d      	b.n	80195ce <event_callback+0x166>
      }
      s = conn->socket;
 80194b2:	687b      	ldr	r3, [r7, #4]
 80194b4:	699b      	ldr	r3, [r3, #24]
 80194b6:	627b      	str	r3, [r7, #36]	@ 0x24
      SYS_ARCH_UNPROTECT(lev);
 80194b8:	69f8      	ldr	r0, [r7, #28]
 80194ba:	f00e f847 	bl	802754c <sys_arch_unprotect>
    }

    sock = get_socket(s);
 80194be:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80194c0:	f7ff f93a 	bl	8018738 <get_socket>
 80194c4:	61b8      	str	r0, [r7, #24]
    if (!sock) {
 80194c6:	69bb      	ldr	r3, [r7, #24]
 80194c8:	2b00      	cmp	r3, #0
 80194ca:	d07f      	beq.n	80195cc <event_callback+0x164>
    }
  } else {
    return;
  }

  check_waiters = 1;
 80194cc:	2301      	movs	r3, #1
 80194ce:	623b      	str	r3, [r7, #32]
  SYS_ARCH_PROTECT(lev);
 80194d0:	f00e f82e 	bl	8027530 <sys_arch_protect>
 80194d4:	61f8      	str	r0, [r7, #28]
  /* Set event as required */
  switch (evt) {
 80194d6:	78fb      	ldrb	r3, [r7, #3]
 80194d8:	2b04      	cmp	r3, #4
 80194da:	d83e      	bhi.n	801955a <event_callback+0xf2>
 80194dc:	a201      	add	r2, pc, #4	@ (adr r2, 80194e4 <event_callback+0x7c>)
 80194de:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80194e2:	bf00      	nop
 80194e4:	080194f9 	.word	0x080194f9
 80194e8:	0801951b 	.word	0x0801951b
 80194ec:	08019533 	.word	0x08019533
 80194f0:	08019547 	.word	0x08019547
 80194f4:	08019553 	.word	0x08019553
    case NETCONN_EVT_RCVPLUS:
      sock->rcvevent++;
 80194f8:	69bb      	ldr	r3, [r7, #24]
 80194fa:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 80194fe:	b29b      	uxth	r3, r3
 8019500:	3301      	adds	r3, #1
 8019502:	b29b      	uxth	r3, r3
 8019504:	b21a      	sxth	r2, r3
 8019506:	69bb      	ldr	r3, [r7, #24]
 8019508:	811a      	strh	r2, [r3, #8]
      if (sock->rcvevent > 1) {
 801950a:	69bb      	ldr	r3, [r7, #24]
 801950c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8019510:	2b01      	cmp	r3, #1
 8019512:	dd2a      	ble.n	801956a <event_callback+0x102>
        check_waiters = 0;
 8019514:	2300      	movs	r3, #0
 8019516:	623b      	str	r3, [r7, #32]
      }
      break;
 8019518:	e027      	b.n	801956a <event_callback+0x102>
    case NETCONN_EVT_RCVMINUS:
      sock->rcvevent--;
 801951a:	69bb      	ldr	r3, [r7, #24]
 801951c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8019520:	b29b      	uxth	r3, r3
 8019522:	3b01      	subs	r3, #1
 8019524:	b29b      	uxth	r3, r3
 8019526:	b21a      	sxth	r2, r3
 8019528:	69bb      	ldr	r3, [r7, #24]
 801952a:	811a      	strh	r2, [r3, #8]
      check_waiters = 0;
 801952c:	2300      	movs	r3, #0
 801952e:	623b      	str	r3, [r7, #32]
      break;
 8019530:	e01c      	b.n	801956c <event_callback+0x104>
    case NETCONN_EVT_SENDPLUS:
      if (sock->sendevent) {
 8019532:	69bb      	ldr	r3, [r7, #24]
 8019534:	895b      	ldrh	r3, [r3, #10]
 8019536:	2b00      	cmp	r3, #0
 8019538:	d001      	beq.n	801953e <event_callback+0xd6>
        check_waiters = 0;
 801953a:	2300      	movs	r3, #0
 801953c:	623b      	str	r3, [r7, #32]
      }
      sock->sendevent = 1;
 801953e:	69bb      	ldr	r3, [r7, #24]
 8019540:	2201      	movs	r2, #1
 8019542:	815a      	strh	r2, [r3, #10]
      break;
 8019544:	e012      	b.n	801956c <event_callback+0x104>
    case NETCONN_EVT_SENDMINUS:
      sock->sendevent = 0;
 8019546:	69bb      	ldr	r3, [r7, #24]
 8019548:	2200      	movs	r2, #0
 801954a:	815a      	strh	r2, [r3, #10]
      check_waiters = 0;
 801954c:	2300      	movs	r3, #0
 801954e:	623b      	str	r3, [r7, #32]
      break;
 8019550:	e00c      	b.n	801956c <event_callback+0x104>
    case NETCONN_EVT_ERROR:
      sock->errevent = 1;
 8019552:	69bb      	ldr	r3, [r7, #24]
 8019554:	2201      	movs	r2, #1
 8019556:	819a      	strh	r2, [r3, #12]
      break;
 8019558:	e008      	b.n	801956c <event_callback+0x104>
    default:
      LWIP_ASSERT("unknown event", 0);
 801955a:	4b1e      	ldr	r3, [pc, #120]	@ (80195d4 <event_callback+0x16c>)
 801955c:	f44f 621f 	mov.w	r2, #2544	@ 0x9f0
 8019560:	491d      	ldr	r1, [pc, #116]	@ (80195d8 <event_callback+0x170>)
 8019562:	481e      	ldr	r0, [pc, #120]	@ (80195dc <event_callback+0x174>)
 8019564:	f011 fa7a 	bl	802aa5c <iprintf>
      break;
 8019568:	e000      	b.n	801956c <event_callback+0x104>
      break;
 801956a:	bf00      	nop
  }

  if (sock->select_waiting && check_waiters) {
 801956c:	69bb      	ldr	r3, [r7, #24]
 801956e:	7b9b      	ldrb	r3, [r3, #14]
 8019570:	2b00      	cmp	r3, #0
 8019572:	d025      	beq.n	80195c0 <event_callback+0x158>
 8019574:	6a3b      	ldr	r3, [r7, #32]
 8019576:	2b00      	cmp	r3, #0
 8019578:	d022      	beq.n	80195c0 <event_callback+0x158>
    /* Save which events are active */
    int has_recvevent, has_sendevent, has_errevent;
    has_recvevent = sock->rcvevent > 0;
 801957a:	69bb      	ldr	r3, [r7, #24]
 801957c:	f9b3 3008 	ldrsh.w	r3, [r3, #8]
 8019580:	2b00      	cmp	r3, #0
 8019582:	bfcc      	ite	gt
 8019584:	2301      	movgt	r3, #1
 8019586:	2300      	movle	r3, #0
 8019588:	b2db      	uxtb	r3, r3
 801958a:	617b      	str	r3, [r7, #20]
    has_sendevent = sock->sendevent != 0;
 801958c:	69bb      	ldr	r3, [r7, #24]
 801958e:	895b      	ldrh	r3, [r3, #10]
 8019590:	2b00      	cmp	r3, #0
 8019592:	bf14      	ite	ne
 8019594:	2301      	movne	r3, #1
 8019596:	2300      	moveq	r3, #0
 8019598:	b2db      	uxtb	r3, r3
 801959a:	613b      	str	r3, [r7, #16]
    has_errevent = sock->errevent != 0;
 801959c:	69bb      	ldr	r3, [r7, #24]
 801959e:	899b      	ldrh	r3, [r3, #12]
 80195a0:	2b00      	cmp	r3, #0
 80195a2:	bf14      	ite	ne
 80195a4:	2301      	movne	r3, #1
 80195a6:	2300      	moveq	r3, #0
 80195a8:	b2db      	uxtb	r3, r3
 80195aa:	60fb      	str	r3, [r7, #12]
    SYS_ARCH_UNPROTECT(lev);
 80195ac:	69f8      	ldr	r0, [r7, #28]
 80195ae:	f00d ffcd 	bl	802754c <sys_arch_unprotect>
    /* Check any select calls waiting on this socket */
    select_check_waiters(s, has_recvevent, has_sendevent, has_errevent);
 80195b2:	68fb      	ldr	r3, [r7, #12]
 80195b4:	693a      	ldr	r2, [r7, #16]
 80195b6:	6979      	ldr	r1, [r7, #20]
 80195b8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80195ba:	f000 f811 	bl	80195e0 <select_check_waiters>
  if (sock->select_waiting && check_waiters) {
 80195be:	e006      	b.n	80195ce <event_callback+0x166>
  } else {
    SYS_ARCH_UNPROTECT(lev);
 80195c0:	69f8      	ldr	r0, [r7, #28]
 80195c2:	f00d ffc3 	bl	802754c <sys_arch_unprotect>
 80195c6:	e002      	b.n	80195ce <event_callback+0x166>
    return;
 80195c8:	bf00      	nop
 80195ca:	e000      	b.n	80195ce <event_callback+0x166>
      return;
 80195cc:	bf00      	nop
  }
  done_socket(sock);
}
 80195ce:	3728      	adds	r7, #40	@ 0x28
 80195d0:	46bd      	mov	sp, r7
 80195d2:	bd80      	pop	{r7, pc}
 80195d4:	0802e844 	.word	0x0802e844
 80195d8:	0802ebc0 	.word	0x0802ebc0
 80195dc:	0802e898 	.word	0x0802e898

080195e0 <select_check_waiters>:
 * of the loop, thus creating a possibility where a thread could modify the
 * select_cb_list during our UNPROTECT/PROTECT. We use a generational counter to
 * detect this change and restart the list walk. The list is expected to be small
 */
static void select_check_waiters(int s, int has_recvevent, int has_sendevent, int has_errevent)
{
 80195e0:	b580      	push	{r7, lr}
 80195e2:	b088      	sub	sp, #32
 80195e4:	af02      	add	r7, sp, #8
 80195e6:	60f8      	str	r0, [r7, #12]
 80195e8:	60b9      	str	r1, [r7, #8]
 80195ea:	607a      	str	r2, [r7, #4]
 80195ec:	603b      	str	r3, [r7, #0]
#if !LWIP_TCPIP_CORE_LOCKING
  int last_select_cb_ctr;
  SYS_ARCH_DECL_PROTECT(lev);
#endif /* !LWIP_TCPIP_CORE_LOCKING */

  LWIP_ASSERT_CORE_LOCKED();
 80195ee:	f7f7 fe09 	bl	8011204 <sys_check_core_locking>
  SYS_ARCH_PROTECT(lev);
again:
  /* remember the state of select_cb_list to detect changes */
  last_select_cb_ctr = select_cb_ctr;
#endif /* !LWIP_TCPIP_CORE_LOCKING */
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 80195f2:	4b42      	ldr	r3, [pc, #264]	@ (80196fc <select_check_waiters+0x11c>)
 80195f4:	681b      	ldr	r3, [r3, #0]
 80195f6:	617b      	str	r3, [r7, #20]
 80195f8:	e078      	b.n	80196ec <select_check_waiters+0x10c>
    if (scb->sem_signalled == 0) {
 80195fa:	697b      	ldr	r3, [r7, #20]
 80195fc:	69db      	ldr	r3, [r3, #28]
 80195fe:	2b00      	cmp	r3, #0
 8019600:	d171      	bne.n	80196e6 <select_check_waiters+0x106>
      /* semaphore not signalled yet */
      int do_signal = 0;
 8019602:	2300      	movs	r3, #0
 8019604:	613b      	str	r3, [r7, #16]
#if LWIP_SOCKET_POLL
      if (scb->poll_fds != NULL) {
 8019606:	697b      	ldr	r3, [r7, #20]
 8019608:	695b      	ldr	r3, [r3, #20]
 801960a:	2b00      	cmp	r3, #0
 801960c:	d009      	beq.n	8019622 <select_check_waiters+0x42>
        do_signal = lwip_poll_should_wake(scb, s, has_recvevent, has_sendevent, has_errevent);
 801960e:	683b      	ldr	r3, [r7, #0]
 8019610:	9300      	str	r3, [sp, #0]
 8019612:	687b      	ldr	r3, [r7, #4]
 8019614:	68ba      	ldr	r2, [r7, #8]
 8019616:	68f9      	ldr	r1, [r7, #12]
 8019618:	6978      	ldr	r0, [r7, #20]
 801961a:	f7ff fee1 	bl	80193e0 <lwip_poll_should_wake>
 801961e:	6138      	str	r0, [r7, #16]
 8019620:	e056      	b.n	80196d0 <select_check_waiters+0xf0>
      else
#endif /* LWIP_SOCKET_SELECT && LWIP_SOCKET_POLL */
#if LWIP_SOCKET_SELECT
      {
        /* Test this select call for our socket */
        if (has_recvevent) {
 8019622:	68bb      	ldr	r3, [r7, #8]
 8019624:	2b00      	cmp	r3, #0
 8019626:	d017      	beq.n	8019658 <select_check_waiters+0x78>
          if (scb->readset && FD_ISSET(s, scb->readset)) {
 8019628:	697b      	ldr	r3, [r7, #20]
 801962a:	689b      	ldr	r3, [r3, #8]
 801962c:	2b00      	cmp	r3, #0
 801962e:	d013      	beq.n	8019658 <select_check_waiters+0x78>
 8019630:	697b      	ldr	r3, [r7, #20]
 8019632:	689a      	ldr	r2, [r3, #8]
 8019634:	68fb      	ldr	r3, [r7, #12]
 8019636:	2b00      	cmp	r3, #0
 8019638:	da00      	bge.n	801963c <select_check_waiters+0x5c>
 801963a:	331f      	adds	r3, #31
 801963c:	115b      	asrs	r3, r3, #5
 801963e:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 8019642:	68fb      	ldr	r3, [r7, #12]
 8019644:	f003 031f 	and.w	r3, r3, #31
 8019648:	fa22 f303 	lsr.w	r3, r2, r3
 801964c:	f003 0301 	and.w	r3, r3, #1
 8019650:	2b00      	cmp	r3, #0
 8019652:	d001      	beq.n	8019658 <select_check_waiters+0x78>
            do_signal = 1;
 8019654:	2301      	movs	r3, #1
 8019656:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_sendevent) {
 8019658:	687b      	ldr	r3, [r7, #4]
 801965a:	2b00      	cmp	r3, #0
 801965c:	d01a      	beq.n	8019694 <select_check_waiters+0xb4>
          if (!do_signal && scb->writeset && FD_ISSET(s, scb->writeset)) {
 801965e:	693b      	ldr	r3, [r7, #16]
 8019660:	2b00      	cmp	r3, #0
 8019662:	d117      	bne.n	8019694 <select_check_waiters+0xb4>
 8019664:	697b      	ldr	r3, [r7, #20]
 8019666:	68db      	ldr	r3, [r3, #12]
 8019668:	2b00      	cmp	r3, #0
 801966a:	d013      	beq.n	8019694 <select_check_waiters+0xb4>
 801966c:	697b      	ldr	r3, [r7, #20]
 801966e:	68da      	ldr	r2, [r3, #12]
 8019670:	68fb      	ldr	r3, [r7, #12]
 8019672:	2b00      	cmp	r3, #0
 8019674:	da00      	bge.n	8019678 <select_check_waiters+0x98>
 8019676:	331f      	adds	r3, #31
 8019678:	115b      	asrs	r3, r3, #5
 801967a:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 801967e:	68fb      	ldr	r3, [r7, #12]
 8019680:	f003 031f 	and.w	r3, r3, #31
 8019684:	fa22 f303 	lsr.w	r3, r2, r3
 8019688:	f003 0301 	and.w	r3, r3, #1
 801968c:	2b00      	cmp	r3, #0
 801968e:	d001      	beq.n	8019694 <select_check_waiters+0xb4>
            do_signal = 1;
 8019690:	2301      	movs	r3, #1
 8019692:	613b      	str	r3, [r7, #16]
          }
        }
        if (has_errevent) {
 8019694:	683b      	ldr	r3, [r7, #0]
 8019696:	2b00      	cmp	r3, #0
 8019698:	d01a      	beq.n	80196d0 <select_check_waiters+0xf0>
          if (!do_signal && scb->exceptset && FD_ISSET(s, scb->exceptset)) {
 801969a:	693b      	ldr	r3, [r7, #16]
 801969c:	2b00      	cmp	r3, #0
 801969e:	d117      	bne.n	80196d0 <select_check_waiters+0xf0>
 80196a0:	697b      	ldr	r3, [r7, #20]
 80196a2:	691b      	ldr	r3, [r3, #16]
 80196a4:	2b00      	cmp	r3, #0
 80196a6:	d013      	beq.n	80196d0 <select_check_waiters+0xf0>
 80196a8:	697b      	ldr	r3, [r7, #20]
 80196aa:	691a      	ldr	r2, [r3, #16]
 80196ac:	68fb      	ldr	r3, [r7, #12]
 80196ae:	2b00      	cmp	r3, #0
 80196b0:	da00      	bge.n	80196b4 <select_check_waiters+0xd4>
 80196b2:	331f      	adds	r3, #31
 80196b4:	115b      	asrs	r3, r3, #5
 80196b6:	f852 2023 	ldr.w	r2, [r2, r3, lsl #2]
 80196ba:	68fb      	ldr	r3, [r7, #12]
 80196bc:	f003 031f 	and.w	r3, r3, #31
 80196c0:	fa22 f303 	lsr.w	r3, r2, r3
 80196c4:	f003 0301 	and.w	r3, r3, #1
 80196c8:	2b00      	cmp	r3, #0
 80196ca:	d001      	beq.n	80196d0 <select_check_waiters+0xf0>
            do_signal = 1;
 80196cc:	2301      	movs	r3, #1
 80196ce:	613b      	str	r3, [r7, #16]
          }
        }
      }
#endif /* LWIP_SOCKET_SELECT */
      if (do_signal) {
 80196d0:	693b      	ldr	r3, [r7, #16]
 80196d2:	2b00      	cmp	r3, #0
 80196d4:	d007      	beq.n	80196e6 <select_check_waiters+0x106>
        scb->sem_signalled = 1;
 80196d6:	697b      	ldr	r3, [r7, #20]
 80196d8:	2201      	movs	r2, #1
 80196da:	61da      	str	r2, [r3, #28]
        /* For !LWIP_TCPIP_CORE_LOCKING, we don't call SYS_ARCH_UNPROTECT() before signaling
           the semaphore, as this might lead to the select thread taking itself off the list,
           invalidating the semaphore. */
        sys_sem_signal(SELECT_SEM_PTR(scb->sem));
 80196dc:	697b      	ldr	r3, [r7, #20]
 80196de:	3320      	adds	r3, #32
 80196e0:	4618      	mov	r0, r3
 80196e2:	f00d fe8f 	bl	8027404 <sys_sem_signal>
  for (scb = select_cb_list; scb != NULL; scb = scb->next) {
 80196e6:	697b      	ldr	r3, [r7, #20]
 80196e8:	681b      	ldr	r3, [r3, #0]
 80196ea:	617b      	str	r3, [r7, #20]
 80196ec:	697b      	ldr	r3, [r7, #20]
 80196ee:	2b00      	cmp	r3, #0
 80196f0:	d183      	bne.n	80195fa <select_check_waiters+0x1a>
    /* remember the state of select_cb_list to detect changes */
    last_select_cb_ctr = select_cb_ctr;
  }
  SYS_ARCH_UNPROTECT(lev);
#endif
}
 80196f2:	bf00      	nop
 80196f4:	bf00      	nop
 80196f6:	3718      	adds	r7, #24
 80196f8:	46bd      	mov	sp, r7
 80196fa:	bd80      	pop	{r7, pc}
 80196fc:	24024444 	.word	0x24024444

08019700 <lwip_ioctl>:
  return err;
}

int
lwip_ioctl(int s, long cmd, void *argp)
{
 8019700:	b580      	push	{r7, lr}
 8019702:	b08c      	sub	sp, #48	@ 0x30
 8019704:	af00      	add	r7, sp, #0
 8019706:	60f8      	str	r0, [r7, #12]
 8019708:	60b9      	str	r1, [r7, #8]
 801970a:	607a      	str	r2, [r7, #4]
  struct lwip_sock *sock = get_socket(s);
 801970c:	68f8      	ldr	r0, [r7, #12]
 801970e:	f7ff f813 	bl	8018738 <get_socket>
 8019712:	6278      	str	r0, [r7, #36]	@ 0x24
  u8_t val;
#if LWIP_SO_RCVBUF
  int recv_avail;
#endif /* LWIP_SO_RCVBUF */

  if (!sock) {
 8019714:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019716:	2b00      	cmp	r3, #0
 8019718:	d102      	bne.n	8019720 <lwip_ioctl+0x20>
    return -1;
 801971a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801971e:	e089      	b.n	8019834 <lwip_ioctl+0x134>
  }

  switch (cmd) {
 8019720:	68bb      	ldr	r3, [r7, #8]
 8019722:	4a46      	ldr	r2, [pc, #280]	@ (801983c <lwip_ioctl+0x13c>)
 8019724:	4293      	cmp	r3, r2
 8019726:	d048      	beq.n	80197ba <lwip_ioctl+0xba>
 8019728:	68bb      	ldr	r3, [r7, #8]
 801972a:	4a45      	ldr	r2, [pc, #276]	@ (8019840 <lwip_ioctl+0x140>)
 801972c:	4293      	cmp	r3, r2
 801972e:	d176      	bne.n	801981e <lwip_ioctl+0x11e>
#if LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE
    case FIONREAD:
      if (!argp) {
 8019730:	687b      	ldr	r3, [r7, #4]
 8019732:	2b00      	cmp	r3, #0
 8019734:	d10a      	bne.n	801974c <lwip_ioctl+0x4c>
        sock_set_errno(sock, EINVAL);
 8019736:	2316      	movs	r3, #22
 8019738:	61bb      	str	r3, [r7, #24]
 801973a:	69bb      	ldr	r3, [r7, #24]
 801973c:	2b00      	cmp	r3, #0
 801973e:	d002      	beq.n	8019746 <lwip_ioctl+0x46>
 8019740:	4a40      	ldr	r2, [pc, #256]	@ (8019844 <lwip_ioctl+0x144>)
 8019742:	69bb      	ldr	r3, [r7, #24]
 8019744:	6013      	str	r3, [r2, #0]
        done_socket(sock);
        return -1;
 8019746:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 801974a:	e073      	b.n	8019834 <lwip_ioctl+0x134>
      }
#endif /* LWIP_FIONREAD_LINUXMODE */

#if LWIP_SO_RCVBUF
      /* we come here if either LWIP_FIONREAD_LINUXMODE==0 or this is a TCP socket */
      SYS_ARCH_GET(sock->conn->recv_avail, recv_avail);
 801974c:	f00d fef0 	bl	8027530 <sys_arch_protect>
 8019750:	6238      	str	r0, [r7, #32]
 8019752:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019754:	681b      	ldr	r3, [r3, #0]
 8019756:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8019758:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801975a:	6a38      	ldr	r0, [r7, #32]
 801975c:	f00d fef6 	bl	802754c <sys_arch_unprotect>
      if (recv_avail < 0) {
 8019760:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8019762:	2b00      	cmp	r3, #0
 8019764:	da01      	bge.n	801976a <lwip_ioctl+0x6a>
        recv_avail = 0;
 8019766:	2300      	movs	r3, #0
 8019768:	62fb      	str	r3, [r7, #44]	@ 0x2c
      }

      /* Check if there is data left from the last recv operation. /maq 041215 */
      if (sock->lastdata.netbuf) {
 801976a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801976c:	685b      	ldr	r3, [r3, #4]
 801976e:	2b00      	cmp	r3, #0
 8019770:	d016      	beq.n	80197a0 <lwip_ioctl+0xa0>
        if (NETCONNTYPE_GROUP(netconn_type(sock->conn)) == NETCONN_TCP) {
 8019772:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019774:	681b      	ldr	r3, [r3, #0]
 8019776:	781b      	ldrb	r3, [r3, #0]
 8019778:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 801977c:	2b10      	cmp	r3, #16
 801977e:	d107      	bne.n	8019790 <lwip_ioctl+0x90>
          recv_avail += sock->lastdata.pbuf->tot_len;
 8019780:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019782:	685b      	ldr	r3, [r3, #4]
 8019784:	891b      	ldrh	r3, [r3, #8]
 8019786:	461a      	mov	r2, r3
 8019788:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801978a:	4413      	add	r3, r2
 801978c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 801978e:	e007      	b.n	80197a0 <lwip_ioctl+0xa0>
        } else {
          recv_avail += sock->lastdata.netbuf->p->tot_len;
 8019790:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8019792:	685b      	ldr	r3, [r3, #4]
 8019794:	681b      	ldr	r3, [r3, #0]
 8019796:	891b      	ldrh	r3, [r3, #8]
 8019798:	461a      	mov	r2, r3
 801979a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801979c:	4413      	add	r3, r2
 801979e:	62fb      	str	r3, [r7, #44]	@ 0x2c
        }
      }
      *((int *)argp) = recv_avail;
 80197a0:	687b      	ldr	r3, [r7, #4]
 80197a2:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 80197a4:	601a      	str	r2, [r3, #0]

      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %"U16_F"\n", s, argp, *((u16_t *)argp)));
      sock_set_errno(sock, 0);
 80197a6:	2300      	movs	r3, #0
 80197a8:	61fb      	str	r3, [r7, #28]
 80197aa:	69fb      	ldr	r3, [r7, #28]
 80197ac:	2b00      	cmp	r3, #0
 80197ae:	d002      	beq.n	80197b6 <lwip_ioctl+0xb6>
 80197b0:	4a24      	ldr	r2, [pc, #144]	@ (8019844 <lwip_ioctl+0x144>)
 80197b2:	69fb      	ldr	r3, [r7, #28]
 80197b4:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 80197b6:	2300      	movs	r3, #0
 80197b8:	e03c      	b.n	8019834 <lwip_ioctl+0x134>
      break;
#endif /* LWIP_SO_RCVBUF */
#endif /* LWIP_SO_RCVBUF || LWIP_FIONREAD_LINUXMODE */

    case (long)FIONBIO:
      val = 0;
 80197ba:	2300      	movs	r3, #0
 80197bc:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      if (argp && *(int *)argp) {
 80197c0:	687b      	ldr	r3, [r7, #4]
 80197c2:	2b00      	cmp	r3, #0
 80197c4:	d006      	beq.n	80197d4 <lwip_ioctl+0xd4>
 80197c6:	687b      	ldr	r3, [r7, #4]
 80197c8:	681b      	ldr	r3, [r3, #0]
 80197ca:	2b00      	cmp	r3, #0
 80197cc:	d002      	beq.n	80197d4 <lwip_ioctl+0xd4>
        val = 1;
 80197ce:	2301      	movs	r3, #1
 80197d0:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
      }
      netconn_set_nonblocking(sock->conn, val);
 80197d4:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80197d8:	2b00      	cmp	r3, #0
 80197da:	d00b      	beq.n	80197f4 <lwip_ioctl+0xf4>
 80197dc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80197de:	681b      	ldr	r3, [r3, #0]
 80197e0:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 80197e4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80197e6:	681b      	ldr	r3, [r3, #0]
 80197e8:	f042 0202 	orr.w	r2, r2, #2
 80197ec:	b2d2      	uxtb	r2, r2
 80197ee:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
 80197f2:	e00a      	b.n	801980a <lwip_ioctl+0x10a>
 80197f4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80197f6:	681b      	ldr	r3, [r3, #0]
 80197f8:	f893 2028 	ldrb.w	r2, [r3, #40]	@ 0x28
 80197fc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80197fe:	681b      	ldr	r3, [r3, #0]
 8019800:	f022 0202 	bic.w	r2, r2, #2
 8019804:	b2d2      	uxtb	r2, r2
 8019806:	f883 2028 	strb.w	r2, [r3, #40]	@ 0x28
      LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, val));
      sock_set_errno(sock, 0);
 801980a:	2300      	movs	r3, #0
 801980c:	617b      	str	r3, [r7, #20]
 801980e:	697b      	ldr	r3, [r7, #20]
 8019810:	2b00      	cmp	r3, #0
 8019812:	d002      	beq.n	801981a <lwip_ioctl+0x11a>
 8019814:	4a0b      	ldr	r2, [pc, #44]	@ (8019844 <lwip_ioctl+0x144>)
 8019816:	697b      	ldr	r3, [r7, #20]
 8019818:	6013      	str	r3, [r2, #0]
      done_socket(sock);
      return 0;
 801981a:	2300      	movs	r3, #0
 801981c:	e00a      	b.n	8019834 <lwip_ioctl+0x134>

    default:
      break;
 801981e:	bf00      	nop
  } /* switch (cmd) */
  LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp));
  sock_set_errno(sock, ENOSYS); /* not yet implemented */
 8019820:	2326      	movs	r3, #38	@ 0x26
 8019822:	613b      	str	r3, [r7, #16]
 8019824:	693b      	ldr	r3, [r7, #16]
 8019826:	2b00      	cmp	r3, #0
 8019828:	d002      	beq.n	8019830 <lwip_ioctl+0x130>
 801982a:	4a06      	ldr	r2, [pc, #24]	@ (8019844 <lwip_ioctl+0x144>)
 801982c:	693b      	ldr	r3, [r7, #16]
 801982e:	6013      	str	r3, [r2, #0]
  done_socket(sock);
  return -1;
 8019830:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8019834:	4618      	mov	r0, r3
 8019836:	3730      	adds	r7, #48	@ 0x30
 8019838:	46bd      	mov	sp, r7
 801983a:	bd80      	pop	{r7, pc}
 801983c:	8004667e 	.word	0x8004667e
 8019840:	4004667f 	.word	0x4004667f
 8019844:	2402b2a0 	.word	0x2402b2a0

08019848 <tcpip_timeouts_mbox_fetch>:
 * @param mbox the mbox to fetch the message from
 * @param msg the place to store the message
 */
static void
tcpip_timeouts_mbox_fetch(sys_mbox_t *mbox, void **msg)
{
 8019848:	b580      	push	{r7, lr}
 801984a:	b084      	sub	sp, #16
 801984c:	af00      	add	r7, sp, #0
 801984e:	6078      	str	r0, [r7, #4]
 8019850:	6039      	str	r1, [r7, #0]
  u32_t sleeptime, res;

again:
  LWIP_ASSERT_CORE_LOCKED();
 8019852:	f7f7 fcd7 	bl	8011204 <sys_check_core_locking>

  sleeptime = sys_timeouts_sleeptime();
 8019856:	f008 fb41 	bl	8021edc <sys_timeouts_sleeptime>
 801985a:	60f8      	str	r0, [r7, #12]
  if (sleeptime == SYS_TIMEOUTS_SLEEPTIME_INFINITE) {
 801985c:	68fb      	ldr	r3, [r7, #12]
 801985e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8019862:	d109      	bne.n	8019878 <tcpip_timeouts_mbox_fetch+0x30>
    UNLOCK_TCPIP_CORE();
 8019864:	f7f7 fcc0 	bl	80111e8 <sys_unlock_tcpip_core>
    sys_arch_mbox_fetch(mbox, msg, 0);
 8019868:	2200      	movs	r2, #0
 801986a:	6839      	ldr	r1, [r7, #0]
 801986c:	6878      	ldr	r0, [r7, #4]
 801986e:	f00d fd0d 	bl	802728c <sys_arch_mbox_fetch>
    LOCK_TCPIP_CORE();
 8019872:	f7f7 fca9 	bl	80111c8 <sys_lock_tcpip_core>
    return;
 8019876:	e016      	b.n	80198a6 <tcpip_timeouts_mbox_fetch+0x5e>
  } else if (sleeptime == 0) {
 8019878:	68fb      	ldr	r3, [r7, #12]
 801987a:	2b00      	cmp	r3, #0
 801987c:	d102      	bne.n	8019884 <tcpip_timeouts_mbox_fetch+0x3c>
    sys_check_timeouts();
 801987e:	f008 faf1 	bl	8021e64 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 8019882:	e7e6      	b.n	8019852 <tcpip_timeouts_mbox_fetch+0xa>
  }

  UNLOCK_TCPIP_CORE();
 8019884:	f7f7 fcb0 	bl	80111e8 <sys_unlock_tcpip_core>
  res = sys_arch_mbox_fetch(mbox, msg, sleeptime);
 8019888:	68fa      	ldr	r2, [r7, #12]
 801988a:	6839      	ldr	r1, [r7, #0]
 801988c:	6878      	ldr	r0, [r7, #4]
 801988e:	f00d fcfd 	bl	802728c <sys_arch_mbox_fetch>
 8019892:	60b8      	str	r0, [r7, #8]
  LOCK_TCPIP_CORE();
 8019894:	f7f7 fc98 	bl	80111c8 <sys_lock_tcpip_core>
  if (res == SYS_ARCH_TIMEOUT) {
 8019898:	68bb      	ldr	r3, [r7, #8]
 801989a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801989e:	d102      	bne.n	80198a6 <tcpip_timeouts_mbox_fetch+0x5e>
    /* If a SYS_ARCH_TIMEOUT value is returned, a timeout occurred
       before a message could be fetched. */
    sys_check_timeouts();
 80198a0:	f008 fae0 	bl	8021e64 <sys_check_timeouts>
    /* We try again to fetch a message from the mbox. */
    goto again;
 80198a4:	e7d5      	b.n	8019852 <tcpip_timeouts_mbox_fetch+0xa>
  }
}
 80198a6:	3710      	adds	r7, #16
 80198a8:	46bd      	mov	sp, r7
 80198aa:	bd80      	pop	{r7, pc}

080198ac <tcpip_thread>:
 *
 * @param arg unused argument
 */
static void
tcpip_thread(void *arg)
{
 80198ac:	b580      	push	{r7, lr}
 80198ae:	b084      	sub	sp, #16
 80198b0:	af00      	add	r7, sp, #0
 80198b2:	6078      	str	r0, [r7, #4]
  struct tcpip_msg *msg;
  LWIP_UNUSED_ARG(arg);

  LWIP_MARK_TCPIP_THREAD();
 80198b4:	f7f7 fce2 	bl	801127c <sys_mark_tcpip_thread>

  LOCK_TCPIP_CORE();
 80198b8:	f7f7 fc86 	bl	80111c8 <sys_lock_tcpip_core>
  if (tcpip_init_done != NULL) {
 80198bc:	4b0f      	ldr	r3, [pc, #60]	@ (80198fc <tcpip_thread+0x50>)
 80198be:	681b      	ldr	r3, [r3, #0]
 80198c0:	2b00      	cmp	r3, #0
 80198c2:	d005      	beq.n	80198d0 <tcpip_thread+0x24>
    tcpip_init_done(tcpip_init_done_arg);
 80198c4:	4b0d      	ldr	r3, [pc, #52]	@ (80198fc <tcpip_thread+0x50>)
 80198c6:	681b      	ldr	r3, [r3, #0]
 80198c8:	4a0d      	ldr	r2, [pc, #52]	@ (8019900 <tcpip_thread+0x54>)
 80198ca:	6812      	ldr	r2, [r2, #0]
 80198cc:	4610      	mov	r0, r2
 80198ce:	4798      	blx	r3
  }

  while (1) {                          /* MAIN Loop */
    LWIP_TCPIP_THREAD_ALIVE();
    /* wait for a message, timeouts are processed while waiting */
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 80198d0:	f107 030c 	add.w	r3, r7, #12
 80198d4:	4619      	mov	r1, r3
 80198d6:	480b      	ldr	r0, [pc, #44]	@ (8019904 <tcpip_thread+0x58>)
 80198d8:	f7ff ffb6 	bl	8019848 <tcpip_timeouts_mbox_fetch>
    if (msg == NULL) {
 80198dc:	68fb      	ldr	r3, [r7, #12]
 80198de:	2b00      	cmp	r3, #0
 80198e0:	d106      	bne.n	80198f0 <tcpip_thread+0x44>
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: NULL\n"));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 80198e2:	4b09      	ldr	r3, [pc, #36]	@ (8019908 <tcpip_thread+0x5c>)
 80198e4:	2291      	movs	r2, #145	@ 0x91
 80198e6:	4909      	ldr	r1, [pc, #36]	@ (801990c <tcpip_thread+0x60>)
 80198e8:	4809      	ldr	r0, [pc, #36]	@ (8019910 <tcpip_thread+0x64>)
 80198ea:	f011 f8b7 	bl	802aa5c <iprintf>
      continue;
 80198ee:	e003      	b.n	80198f8 <tcpip_thread+0x4c>
    }
    tcpip_thread_handle_msg(msg);
 80198f0:	68fb      	ldr	r3, [r7, #12]
 80198f2:	4618      	mov	r0, r3
 80198f4:	f000 f80e 	bl	8019914 <tcpip_thread_handle_msg>
    TCPIP_MBOX_FETCH(&tcpip_mbox, (void **)&msg);
 80198f8:	e7ea      	b.n	80198d0 <tcpip_thread+0x24>
 80198fa:	bf00      	nop
 80198fc:	24024448 	.word	0x24024448
 8019900:	2402444c 	.word	0x2402444c
 8019904:	24024450 	.word	0x24024450
 8019908:	0802ec14 	.word	0x0802ec14
 801990c:	0802ec44 	.word	0x0802ec44
 8019910:	0802ec64 	.word	0x0802ec64

08019914 <tcpip_thread_handle_msg>:
/* Handle a single tcpip_msg
 * This is in its own function for access by tests only.
 */
static void
tcpip_thread_handle_msg(struct tcpip_msg *msg)
{
 8019914:	b580      	push	{r7, lr}
 8019916:	b082      	sub	sp, #8
 8019918:	af00      	add	r7, sp, #0
 801991a:	6078      	str	r0, [r7, #4]
  switch (msg->type) {
 801991c:	687b      	ldr	r3, [r7, #4]
 801991e:	781b      	ldrb	r3, [r3, #0]
 8019920:	2b02      	cmp	r3, #2
 8019922:	d026      	beq.n	8019972 <tcpip_thread_handle_msg+0x5e>
 8019924:	2b02      	cmp	r3, #2
 8019926:	dc2b      	bgt.n	8019980 <tcpip_thread_handle_msg+0x6c>
 8019928:	2b00      	cmp	r3, #0
 801992a:	d002      	beq.n	8019932 <tcpip_thread_handle_msg+0x1e>
 801992c:	2b01      	cmp	r3, #1
 801992e:	d015      	beq.n	801995c <tcpip_thread_handle_msg+0x48>
 8019930:	e026      	b.n	8019980 <tcpip_thread_handle_msg+0x6c>
#endif /* !LWIP_TCPIP_CORE_LOCKING */

#if !LWIP_TCPIP_CORE_LOCKING_INPUT
    case TCPIP_MSG_INPKT:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: PACKET %p\n", (void *)msg));
      if (msg->msg.inp.input_fn(msg->msg.inp.p, msg->msg.inp.netif) != ERR_OK) {
 8019932:	687b      	ldr	r3, [r7, #4]
 8019934:	68db      	ldr	r3, [r3, #12]
 8019936:	687a      	ldr	r2, [r7, #4]
 8019938:	6850      	ldr	r0, [r2, #4]
 801993a:	687a      	ldr	r2, [r7, #4]
 801993c:	6892      	ldr	r2, [r2, #8]
 801993e:	4611      	mov	r1, r2
 8019940:	4798      	blx	r3
 8019942:	4603      	mov	r3, r0
 8019944:	2b00      	cmp	r3, #0
 8019946:	d004      	beq.n	8019952 <tcpip_thread_handle_msg+0x3e>
        pbuf_free(msg->msg.inp.p);
 8019948:	687b      	ldr	r3, [r7, #4]
 801994a:	685b      	ldr	r3, [r3, #4]
 801994c:	4618      	mov	r0, r3
 801994e:	f001 fe0d 	bl	801b56c <pbuf_free>
      }
      memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 8019952:	6879      	ldr	r1, [r7, #4]
 8019954:	2009      	movs	r0, #9
 8019956:	f000 ff1b 	bl	801a790 <memp_free>
      break;
 801995a:	e018      	b.n	801998e <tcpip_thread_handle_msg+0x7a>
      break;
#endif /* LWIP_TCPIP_TIMEOUT && LWIP_TIMERS */

    case TCPIP_MSG_CALLBACK:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 801995c:	687b      	ldr	r3, [r7, #4]
 801995e:	685b      	ldr	r3, [r3, #4]
 8019960:	687a      	ldr	r2, [r7, #4]
 8019962:	6892      	ldr	r2, [r2, #8]
 8019964:	4610      	mov	r0, r2
 8019966:	4798      	blx	r3
      memp_free(MEMP_TCPIP_MSG_API, msg);
 8019968:	6879      	ldr	r1, [r7, #4]
 801996a:	2008      	movs	r0, #8
 801996c:	f000 ff10 	bl	801a790 <memp_free>
      break;
 8019970:	e00d      	b.n	801998e <tcpip_thread_handle_msg+0x7a>

    case TCPIP_MSG_CALLBACK_STATIC:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK_STATIC %p\n", (void *)msg));
      msg->msg.cb.function(msg->msg.cb.ctx);
 8019972:	687b      	ldr	r3, [r7, #4]
 8019974:	685b      	ldr	r3, [r3, #4]
 8019976:	687a      	ldr	r2, [r7, #4]
 8019978:	6892      	ldr	r2, [r2, #8]
 801997a:	4610      	mov	r0, r2
 801997c:	4798      	blx	r3
      break;
 801997e:	e006      	b.n	801998e <tcpip_thread_handle_msg+0x7a>

    default:
      LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: invalid message: %d\n", msg->type));
      LWIP_ASSERT("tcpip_thread: invalid message", 0);
 8019980:	4b05      	ldr	r3, [pc, #20]	@ (8019998 <tcpip_thread_handle_msg+0x84>)
 8019982:	22cf      	movs	r2, #207	@ 0xcf
 8019984:	4905      	ldr	r1, [pc, #20]	@ (801999c <tcpip_thread_handle_msg+0x88>)
 8019986:	4806      	ldr	r0, [pc, #24]	@ (80199a0 <tcpip_thread_handle_msg+0x8c>)
 8019988:	f011 f868 	bl	802aa5c <iprintf>
      break;
 801998c:	bf00      	nop
  }
}
 801998e:	bf00      	nop
 8019990:	3708      	adds	r7, #8
 8019992:	46bd      	mov	sp, r7
 8019994:	bd80      	pop	{r7, pc}
 8019996:	bf00      	nop
 8019998:	0802ec14 	.word	0x0802ec14
 801999c:	0802ec44 	.word	0x0802ec44
 80199a0:	0802ec64 	.word	0x0802ec64

080199a4 <tcpip_inpkt>:
 * @param inp the network interface on which the packet was received
 * @param input_fn input function to call
 */
err_t
tcpip_inpkt(struct pbuf *p, struct netif *inp, netif_input_fn input_fn)
{
 80199a4:	b580      	push	{r7, lr}
 80199a6:	b086      	sub	sp, #24
 80199a8:	af00      	add	r7, sp, #0
 80199aa:	60f8      	str	r0, [r7, #12]
 80199ac:	60b9      	str	r1, [r7, #8]
 80199ae:	607a      	str	r2, [r7, #4]
  UNLOCK_TCPIP_CORE();
  return ret;
#else /* LWIP_TCPIP_CORE_LOCKING_INPUT */
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 80199b0:	481a      	ldr	r0, [pc, #104]	@ (8019a1c <tcpip_inpkt+0x78>)
 80199b2:	f00d fcb3 	bl	802731c <sys_mbox_valid>
 80199b6:	4603      	mov	r3, r0
 80199b8:	2b00      	cmp	r3, #0
 80199ba:	d105      	bne.n	80199c8 <tcpip_inpkt+0x24>
 80199bc:	4b18      	ldr	r3, [pc, #96]	@ (8019a20 <tcpip_inpkt+0x7c>)
 80199be:	22fc      	movs	r2, #252	@ 0xfc
 80199c0:	4918      	ldr	r1, [pc, #96]	@ (8019a24 <tcpip_inpkt+0x80>)
 80199c2:	4819      	ldr	r0, [pc, #100]	@ (8019a28 <tcpip_inpkt+0x84>)
 80199c4:	f011 f84a 	bl	802aa5c <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_INPKT);
 80199c8:	2009      	movs	r0, #9
 80199ca:	f000 fe6b 	bl	801a6a4 <memp_malloc>
 80199ce:	6178      	str	r0, [r7, #20]
  if (msg == NULL) {
 80199d0:	697b      	ldr	r3, [r7, #20]
 80199d2:	2b00      	cmp	r3, #0
 80199d4:	d102      	bne.n	80199dc <tcpip_inpkt+0x38>
    return ERR_MEM;
 80199d6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80199da:	e01a      	b.n	8019a12 <tcpip_inpkt+0x6e>
  }

  msg->type = TCPIP_MSG_INPKT;
 80199dc:	697b      	ldr	r3, [r7, #20]
 80199de:	2200      	movs	r2, #0
 80199e0:	701a      	strb	r2, [r3, #0]
  msg->msg.inp.p = p;
 80199e2:	697b      	ldr	r3, [r7, #20]
 80199e4:	68fa      	ldr	r2, [r7, #12]
 80199e6:	605a      	str	r2, [r3, #4]
  msg->msg.inp.netif = inp;
 80199e8:	697b      	ldr	r3, [r7, #20]
 80199ea:	68ba      	ldr	r2, [r7, #8]
 80199ec:	609a      	str	r2, [r3, #8]
  msg->msg.inp.input_fn = input_fn;
 80199ee:	697b      	ldr	r3, [r7, #20]
 80199f0:	687a      	ldr	r2, [r7, #4]
 80199f2:	60da      	str	r2, [r3, #12]
  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 80199f4:	6979      	ldr	r1, [r7, #20]
 80199f6:	4809      	ldr	r0, [pc, #36]	@ (8019a1c <tcpip_inpkt+0x78>)
 80199f8:	f00d fc2e 	bl	8027258 <sys_mbox_trypost>
 80199fc:	4603      	mov	r3, r0
 80199fe:	2b00      	cmp	r3, #0
 8019a00:	d006      	beq.n	8019a10 <tcpip_inpkt+0x6c>
    memp_free(MEMP_TCPIP_MSG_INPKT, msg);
 8019a02:	6979      	ldr	r1, [r7, #20]
 8019a04:	2009      	movs	r0, #9
 8019a06:	f000 fec3 	bl	801a790 <memp_free>
    return ERR_MEM;
 8019a0a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8019a0e:	e000      	b.n	8019a12 <tcpip_inpkt+0x6e>
  }
  return ERR_OK;
 8019a10:	2300      	movs	r3, #0
#endif /* LWIP_TCPIP_CORE_LOCKING_INPUT */
}
 8019a12:	4618      	mov	r0, r3
 8019a14:	3718      	adds	r7, #24
 8019a16:	46bd      	mov	sp, r7
 8019a18:	bd80      	pop	{r7, pc}
 8019a1a:	bf00      	nop
 8019a1c:	24024450 	.word	0x24024450
 8019a20:	0802ec14 	.word	0x0802ec14
 8019a24:	0802ec8c 	.word	0x0802ec8c
 8019a28:	0802ec64 	.word	0x0802ec64

08019a2c <tcpip_input>:
 *          NETIF_FLAG_ETHERNET flags)
 * @param inp the network interface on which the packet was received
 */
err_t
tcpip_input(struct pbuf *p, struct netif *inp)
{
 8019a2c:	b580      	push	{r7, lr}
 8019a2e:	b082      	sub	sp, #8
 8019a30:	af00      	add	r7, sp, #0
 8019a32:	6078      	str	r0, [r7, #4]
 8019a34:	6039      	str	r1, [r7, #0]
#if LWIP_ETHERNET
  if (inp->flags & (NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET)) {
 8019a36:	683b      	ldr	r3, [r7, #0]
 8019a38:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8019a3c:	f003 0318 	and.w	r3, r3, #24
 8019a40:	2b00      	cmp	r3, #0
 8019a42:	d006      	beq.n	8019a52 <tcpip_input+0x26>
    return tcpip_inpkt(p, inp, ethernet_input);
 8019a44:	4a08      	ldr	r2, [pc, #32]	@ (8019a68 <tcpip_input+0x3c>)
 8019a46:	6839      	ldr	r1, [r7, #0]
 8019a48:	6878      	ldr	r0, [r7, #4]
 8019a4a:	f7ff ffab 	bl	80199a4 <tcpip_inpkt>
 8019a4e:	4603      	mov	r3, r0
 8019a50:	e005      	b.n	8019a5e <tcpip_input+0x32>
  } else
#endif /* LWIP_ETHERNET */
    return tcpip_inpkt(p, inp, ip_input);
 8019a52:	4a06      	ldr	r2, [pc, #24]	@ (8019a6c <tcpip_input+0x40>)
 8019a54:	6839      	ldr	r1, [r7, #0]
 8019a56:	6878      	ldr	r0, [r7, #4]
 8019a58:	f7ff ffa4 	bl	80199a4 <tcpip_inpkt>
 8019a5c:	4603      	mov	r3, r0
}
 8019a5e:	4618      	mov	r0, r3
 8019a60:	3708      	adds	r7, #8
 8019a62:	46bd      	mov	sp, r7
 8019a64:	bd80      	pop	{r7, pc}
 8019a66:	bf00      	nop
 8019a68:	0802704d 	.word	0x0802704d
 8019a6c:	08025b75 	.word	0x08025b75

08019a70 <tcpip_try_callback>:
 *
 * @see tcpip_callback
 */
err_t
tcpip_try_callback(tcpip_callback_fn function, void *ctx)
{
 8019a70:	b580      	push	{r7, lr}
 8019a72:	b084      	sub	sp, #16
 8019a74:	af00      	add	r7, sp, #0
 8019a76:	6078      	str	r0, [r7, #4]
 8019a78:	6039      	str	r1, [r7, #0]
  struct tcpip_msg *msg;

  LWIP_ASSERT("Invalid mbox", sys_mbox_valid_val(tcpip_mbox));
 8019a7a:	4819      	ldr	r0, [pc, #100]	@ (8019ae0 <tcpip_try_callback+0x70>)
 8019a7c:	f00d fc4e 	bl	802731c <sys_mbox_valid>
 8019a80:	4603      	mov	r3, r0
 8019a82:	2b00      	cmp	r3, #0
 8019a84:	d106      	bne.n	8019a94 <tcpip_try_callback+0x24>
 8019a86:	4b17      	ldr	r3, [pc, #92]	@ (8019ae4 <tcpip_try_callback+0x74>)
 8019a88:	f240 125d 	movw	r2, #349	@ 0x15d
 8019a8c:	4916      	ldr	r1, [pc, #88]	@ (8019ae8 <tcpip_try_callback+0x78>)
 8019a8e:	4817      	ldr	r0, [pc, #92]	@ (8019aec <tcpip_try_callback+0x7c>)
 8019a90:	f010 ffe4 	bl	802aa5c <iprintf>

  msg = (struct tcpip_msg *)memp_malloc(MEMP_TCPIP_MSG_API);
 8019a94:	2008      	movs	r0, #8
 8019a96:	f000 fe05 	bl	801a6a4 <memp_malloc>
 8019a9a:	60f8      	str	r0, [r7, #12]
  if (msg == NULL) {
 8019a9c:	68fb      	ldr	r3, [r7, #12]
 8019a9e:	2b00      	cmp	r3, #0
 8019aa0:	d102      	bne.n	8019aa8 <tcpip_try_callback+0x38>
    return ERR_MEM;
 8019aa2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8019aa6:	e017      	b.n	8019ad8 <tcpip_try_callback+0x68>
  }

  msg->type = TCPIP_MSG_CALLBACK;
 8019aa8:	68fb      	ldr	r3, [r7, #12]
 8019aaa:	2201      	movs	r2, #1
 8019aac:	701a      	strb	r2, [r3, #0]
  msg->msg.cb.function = function;
 8019aae:	68fb      	ldr	r3, [r7, #12]
 8019ab0:	687a      	ldr	r2, [r7, #4]
 8019ab2:	605a      	str	r2, [r3, #4]
  msg->msg.cb.ctx = ctx;
 8019ab4:	68fb      	ldr	r3, [r7, #12]
 8019ab6:	683a      	ldr	r2, [r7, #0]
 8019ab8:	609a      	str	r2, [r3, #8]

  if (sys_mbox_trypost(&tcpip_mbox, msg) != ERR_OK) {
 8019aba:	68f9      	ldr	r1, [r7, #12]
 8019abc:	4808      	ldr	r0, [pc, #32]	@ (8019ae0 <tcpip_try_callback+0x70>)
 8019abe:	f00d fbcb 	bl	8027258 <sys_mbox_trypost>
 8019ac2:	4603      	mov	r3, r0
 8019ac4:	2b00      	cmp	r3, #0
 8019ac6:	d006      	beq.n	8019ad6 <tcpip_try_callback+0x66>
    memp_free(MEMP_TCPIP_MSG_API, msg);
 8019ac8:	68f9      	ldr	r1, [r7, #12]
 8019aca:	2008      	movs	r0, #8
 8019acc:	f000 fe60 	bl	801a790 <memp_free>
    return ERR_MEM;
 8019ad0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8019ad4:	e000      	b.n	8019ad8 <tcpip_try_callback+0x68>
  }
  return ERR_OK;
 8019ad6:	2300      	movs	r3, #0
}
 8019ad8:	4618      	mov	r0, r3
 8019ada:	3710      	adds	r7, #16
 8019adc:	46bd      	mov	sp, r7
 8019ade:	bd80      	pop	{r7, pc}
 8019ae0:	24024450 	.word	0x24024450
 8019ae4:	0802ec14 	.word	0x0802ec14
 8019ae8:	0802ec8c 	.word	0x0802ec8c
 8019aec:	0802ec64 	.word	0x0802ec64

08019af0 <tcpip_send_msg_wait_sem>:
 * @param sem semaphore to wait on
 * @return ERR_OK if the function was called, another err_t if not
 */
err_t
tcpip_send_msg_wait_sem(tcpip_callback_fn fn, void *apimsg, sys_sem_t *sem)
{
 8019af0:	b580      	push	{r7, lr}
 8019af2:	b084      	sub	sp, #16
 8019af4:	af00      	add	r7, sp, #0
 8019af6:	60f8      	str	r0, [r7, #12]
 8019af8:	60b9      	str	r1, [r7, #8]
 8019afa:	607a      	str	r2, [r7, #4]
#if LWIP_TCPIP_CORE_LOCKING
  LWIP_UNUSED_ARG(sem);
  LOCK_TCPIP_CORE();
 8019afc:	f7f7 fb64 	bl	80111c8 <sys_lock_tcpip_core>
  fn(apimsg);
 8019b00:	68fb      	ldr	r3, [r7, #12]
 8019b02:	68b8      	ldr	r0, [r7, #8]
 8019b04:	4798      	blx	r3
  UNLOCK_TCPIP_CORE();
 8019b06:	f7f7 fb6f 	bl	80111e8 <sys_unlock_tcpip_core>
  return ERR_OK;
 8019b0a:	2300      	movs	r3, #0
  sys_mbox_post(&tcpip_mbox, &TCPIP_MSG_VAR_REF(msg));
  sys_arch_sem_wait(sem, 0);
  TCPIP_MSG_VAR_FREE(msg);
  return ERR_OK;
#endif /* LWIP_TCPIP_CORE_LOCKING */
}
 8019b0c:	4618      	mov	r0, r3
 8019b0e:	3710      	adds	r7, #16
 8019b10:	46bd      	mov	sp, r7
 8019b12:	bd80      	pop	{r7, pc}

08019b14 <tcpip_init>:
 * @param initfunc a function to call when tcpip_thread is running and finished initializing
 * @param arg argument to pass to initfunc
 */
void
tcpip_init(tcpip_init_done_fn initfunc, void *arg)
{
 8019b14:	b580      	push	{r7, lr}
 8019b16:	b084      	sub	sp, #16
 8019b18:	af02      	add	r7, sp, #8
 8019b1a:	6078      	str	r0, [r7, #4]
 8019b1c:	6039      	str	r1, [r7, #0]
  lwip_init();
 8019b1e:	f000 f92d 	bl	8019d7c <lwip_init>

  tcpip_init_done = initfunc;
 8019b22:	4a17      	ldr	r2, [pc, #92]	@ (8019b80 <tcpip_init+0x6c>)
 8019b24:	687b      	ldr	r3, [r7, #4]
 8019b26:	6013      	str	r3, [r2, #0]
  tcpip_init_done_arg = arg;
 8019b28:	4a16      	ldr	r2, [pc, #88]	@ (8019b84 <tcpip_init+0x70>)
 8019b2a:	683b      	ldr	r3, [r7, #0]
 8019b2c:	6013      	str	r3, [r2, #0]
  if (sys_mbox_new(&tcpip_mbox, TCPIP_MBOX_SIZE) != ERR_OK) {
 8019b2e:	2106      	movs	r1, #6
 8019b30:	4815      	ldr	r0, [pc, #84]	@ (8019b88 <tcpip_init+0x74>)
 8019b32:	f00d fb65 	bl	8027200 <sys_mbox_new>
 8019b36:	4603      	mov	r3, r0
 8019b38:	2b00      	cmp	r3, #0
 8019b3a:	d006      	beq.n	8019b4a <tcpip_init+0x36>
    LWIP_ASSERT("failed to create tcpip_thread mbox", 0);
 8019b3c:	4b13      	ldr	r3, [pc, #76]	@ (8019b8c <tcpip_init+0x78>)
 8019b3e:	f240 2261 	movw	r2, #609	@ 0x261
 8019b42:	4913      	ldr	r1, [pc, #76]	@ (8019b90 <tcpip_init+0x7c>)
 8019b44:	4813      	ldr	r0, [pc, #76]	@ (8019b94 <tcpip_init+0x80>)
 8019b46:	f010 ff89 	bl	802aa5c <iprintf>
  }
#if LWIP_TCPIP_CORE_LOCKING
  if (sys_mutex_new(&lock_tcpip_core) != ERR_OK) {
 8019b4a:	4813      	ldr	r0, [pc, #76]	@ (8019b98 <tcpip_init+0x84>)
 8019b4c:	f00d fc9e 	bl	802748c <sys_mutex_new>
 8019b50:	4603      	mov	r3, r0
 8019b52:	2b00      	cmp	r3, #0
 8019b54:	d006      	beq.n	8019b64 <tcpip_init+0x50>
    LWIP_ASSERT("failed to create lock_tcpip_core", 0);
 8019b56:	4b0d      	ldr	r3, [pc, #52]	@ (8019b8c <tcpip_init+0x78>)
 8019b58:	f240 2265 	movw	r2, #613	@ 0x265
 8019b5c:	490f      	ldr	r1, [pc, #60]	@ (8019b9c <tcpip_init+0x88>)
 8019b5e:	480d      	ldr	r0, [pc, #52]	@ (8019b94 <tcpip_init+0x80>)
 8019b60:	f010 ff7c 	bl	802aa5c <iprintf>
  }
#endif /* LWIP_TCPIP_CORE_LOCKING */

  sys_thread_new(TCPIP_THREAD_NAME, tcpip_thread, NULL, TCPIP_THREAD_STACKSIZE, TCPIP_THREAD_PRIO);
 8019b64:	2330      	movs	r3, #48	@ 0x30
 8019b66:	9300      	str	r3, [sp, #0]
 8019b68:	f44f 5380 	mov.w	r3, #4096	@ 0x1000
 8019b6c:	2200      	movs	r2, #0
 8019b6e:	490c      	ldr	r1, [pc, #48]	@ (8019ba0 <tcpip_init+0x8c>)
 8019b70:	480c      	ldr	r0, [pc, #48]	@ (8019ba4 <tcpip_init+0x90>)
 8019b72:	f00d fcbd 	bl	80274f0 <sys_thread_new>
}
 8019b76:	bf00      	nop
 8019b78:	3708      	adds	r7, #8
 8019b7a:	46bd      	mov	sp, r7
 8019b7c:	bd80      	pop	{r7, pc}
 8019b7e:	bf00      	nop
 8019b80:	24024448 	.word	0x24024448
 8019b84:	2402444c 	.word	0x2402444c
 8019b88:	24024450 	.word	0x24024450
 8019b8c:	0802ec14 	.word	0x0802ec14
 8019b90:	0802ec9c 	.word	0x0802ec9c
 8019b94:	0802ec64 	.word	0x0802ec64
 8019b98:	24024454 	.word	0x24024454
 8019b9c:	0802ecc0 	.word	0x0802ecc0
 8019ba0:	080198ad 	.word	0x080198ad
 8019ba4:	0802ece4 	.word	0x0802ece4

08019ba8 <lwip_htons>:
 * @param n u16_t in host byte order
 * @return n in network byte order
 */
u16_t
lwip_htons(u16_t n)
{
 8019ba8:	b480      	push	{r7}
 8019baa:	b083      	sub	sp, #12
 8019bac:	af00      	add	r7, sp, #0
 8019bae:	4603      	mov	r3, r0
 8019bb0:	80fb      	strh	r3, [r7, #6]
  return PP_HTONS(n);
 8019bb2:	88fb      	ldrh	r3, [r7, #6]
 8019bb4:	021b      	lsls	r3, r3, #8
 8019bb6:	b21a      	sxth	r2, r3
 8019bb8:	88fb      	ldrh	r3, [r7, #6]
 8019bba:	0a1b      	lsrs	r3, r3, #8
 8019bbc:	b29b      	uxth	r3, r3
 8019bbe:	b21b      	sxth	r3, r3
 8019bc0:	4313      	orrs	r3, r2
 8019bc2:	b21b      	sxth	r3, r3
 8019bc4:	b29b      	uxth	r3, r3
}
 8019bc6:	4618      	mov	r0, r3
 8019bc8:	370c      	adds	r7, #12
 8019bca:	46bd      	mov	sp, r7
 8019bcc:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019bd0:	4770      	bx	lr

08019bd2 <lwip_htonl>:
 * @param n u32_t in host byte order
 * @return n in network byte order
 */
u32_t
lwip_htonl(u32_t n)
{
 8019bd2:	b480      	push	{r7}
 8019bd4:	b083      	sub	sp, #12
 8019bd6:	af00      	add	r7, sp, #0
 8019bd8:	6078      	str	r0, [r7, #4]
  return PP_HTONL(n);
 8019bda:	687b      	ldr	r3, [r7, #4]
 8019bdc:	061a      	lsls	r2, r3, #24
 8019bde:	687b      	ldr	r3, [r7, #4]
 8019be0:	021b      	lsls	r3, r3, #8
 8019be2:	f403 037f 	and.w	r3, r3, #16711680	@ 0xff0000
 8019be6:	431a      	orrs	r2, r3
 8019be8:	687b      	ldr	r3, [r7, #4]
 8019bea:	0a1b      	lsrs	r3, r3, #8
 8019bec:	f403 437f 	and.w	r3, r3, #65280	@ 0xff00
 8019bf0:	431a      	orrs	r2, r3
 8019bf2:	687b      	ldr	r3, [r7, #4]
 8019bf4:	0e1b      	lsrs	r3, r3, #24
 8019bf6:	4313      	orrs	r3, r2
}
 8019bf8:	4618      	mov	r0, r3
 8019bfa:	370c      	adds	r7, #12
 8019bfc:	46bd      	mov	sp, r7
 8019bfe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019c02:	4770      	bx	lr

08019c04 <lwip_standard_chksum>:
 * @param len length of data to be summed
 * @return host order (!) lwip checksum (non-inverted Internet sum)
 */
u16_t
lwip_standard_chksum(const void *dataptr, int len)
{
 8019c04:	b480      	push	{r7}
 8019c06:	b089      	sub	sp, #36	@ 0x24
 8019c08:	af00      	add	r7, sp, #0
 8019c0a:	6078      	str	r0, [r7, #4]
 8019c0c:	6039      	str	r1, [r7, #0]
  const u8_t *pb = (const u8_t *)dataptr;
 8019c0e:	687b      	ldr	r3, [r7, #4]
 8019c10:	61fb      	str	r3, [r7, #28]
  const u16_t *ps;
  u16_t t = 0;
 8019c12:	2300      	movs	r3, #0
 8019c14:	81fb      	strh	r3, [r7, #14]
  u32_t sum = 0;
 8019c16:	2300      	movs	r3, #0
 8019c18:	617b      	str	r3, [r7, #20]
  int odd = ((mem_ptr_t)pb & 1);
 8019c1a:	69fb      	ldr	r3, [r7, #28]
 8019c1c:	f003 0301 	and.w	r3, r3, #1
 8019c20:	613b      	str	r3, [r7, #16]

  /* Get aligned to u16_t */
  if (odd && len > 0) {
 8019c22:	693b      	ldr	r3, [r7, #16]
 8019c24:	2b00      	cmp	r3, #0
 8019c26:	d00d      	beq.n	8019c44 <lwip_standard_chksum+0x40>
 8019c28:	683b      	ldr	r3, [r7, #0]
 8019c2a:	2b00      	cmp	r3, #0
 8019c2c:	dd0a      	ble.n	8019c44 <lwip_standard_chksum+0x40>
    ((u8_t *)&t)[1] = *pb++;
 8019c2e:	69fa      	ldr	r2, [r7, #28]
 8019c30:	1c53      	adds	r3, r2, #1
 8019c32:	61fb      	str	r3, [r7, #28]
 8019c34:	f107 030e 	add.w	r3, r7, #14
 8019c38:	3301      	adds	r3, #1
 8019c3a:	7812      	ldrb	r2, [r2, #0]
 8019c3c:	701a      	strb	r2, [r3, #0]
    len--;
 8019c3e:	683b      	ldr	r3, [r7, #0]
 8019c40:	3b01      	subs	r3, #1
 8019c42:	603b      	str	r3, [r7, #0]
  }

  /* Add the bulk of the data */
  ps = (const u16_t *)(const void *)pb;
 8019c44:	69fb      	ldr	r3, [r7, #28]
 8019c46:	61bb      	str	r3, [r7, #24]
  while (len > 1) {
 8019c48:	e00a      	b.n	8019c60 <lwip_standard_chksum+0x5c>
    sum += *ps++;
 8019c4a:	69bb      	ldr	r3, [r7, #24]
 8019c4c:	1c9a      	adds	r2, r3, #2
 8019c4e:	61ba      	str	r2, [r7, #24]
 8019c50:	881b      	ldrh	r3, [r3, #0]
 8019c52:	461a      	mov	r2, r3
 8019c54:	697b      	ldr	r3, [r7, #20]
 8019c56:	4413      	add	r3, r2
 8019c58:	617b      	str	r3, [r7, #20]
    len -= 2;
 8019c5a:	683b      	ldr	r3, [r7, #0]
 8019c5c:	3b02      	subs	r3, #2
 8019c5e:	603b      	str	r3, [r7, #0]
  while (len > 1) {
 8019c60:	683b      	ldr	r3, [r7, #0]
 8019c62:	2b01      	cmp	r3, #1
 8019c64:	dcf1      	bgt.n	8019c4a <lwip_standard_chksum+0x46>
  }

  /* Consume left-over byte, if any */
  if (len > 0) {
 8019c66:	683b      	ldr	r3, [r7, #0]
 8019c68:	2b00      	cmp	r3, #0
 8019c6a:	dd04      	ble.n	8019c76 <lwip_standard_chksum+0x72>
    ((u8_t *)&t)[0] = *(const u8_t *)ps;
 8019c6c:	f107 030e 	add.w	r3, r7, #14
 8019c70:	69ba      	ldr	r2, [r7, #24]
 8019c72:	7812      	ldrb	r2, [r2, #0]
 8019c74:	701a      	strb	r2, [r3, #0]
  }

  /* Add end bytes */
  sum += t;
 8019c76:	89fb      	ldrh	r3, [r7, #14]
 8019c78:	461a      	mov	r2, r3
 8019c7a:	697b      	ldr	r3, [r7, #20]
 8019c7c:	4413      	add	r3, r2
 8019c7e:	617b      	str	r3, [r7, #20]

  /* Fold 32-bit sum to 16 bits
     calling this twice is probably faster than if statements... */
  sum = FOLD_U32T(sum);
 8019c80:	697b      	ldr	r3, [r7, #20]
 8019c82:	0c1a      	lsrs	r2, r3, #16
 8019c84:	697b      	ldr	r3, [r7, #20]
 8019c86:	b29b      	uxth	r3, r3
 8019c88:	4413      	add	r3, r2
 8019c8a:	617b      	str	r3, [r7, #20]
  sum = FOLD_U32T(sum);
 8019c8c:	697b      	ldr	r3, [r7, #20]
 8019c8e:	0c1a      	lsrs	r2, r3, #16
 8019c90:	697b      	ldr	r3, [r7, #20]
 8019c92:	b29b      	uxth	r3, r3
 8019c94:	4413      	add	r3, r2
 8019c96:	617b      	str	r3, [r7, #20]

  /* Swap if alignment was odd */
  if (odd) {
 8019c98:	693b      	ldr	r3, [r7, #16]
 8019c9a:	2b00      	cmp	r3, #0
 8019c9c:	d007      	beq.n	8019cae <lwip_standard_chksum+0xaa>
    sum = SWAP_BYTES_IN_WORD(sum);
 8019c9e:	697b      	ldr	r3, [r7, #20]
 8019ca0:	021b      	lsls	r3, r3, #8
 8019ca2:	b29a      	uxth	r2, r3
 8019ca4:	697b      	ldr	r3, [r7, #20]
 8019ca6:	0a1b      	lsrs	r3, r3, #8
 8019ca8:	b2db      	uxtb	r3, r3
 8019caa:	4313      	orrs	r3, r2
 8019cac:	617b      	str	r3, [r7, #20]
  }

  return (u16_t)sum;
 8019cae:	697b      	ldr	r3, [r7, #20]
 8019cb0:	b29b      	uxth	r3, r3
}
 8019cb2:	4618      	mov	r0, r3
 8019cb4:	3724      	adds	r7, #36	@ 0x24
 8019cb6:	46bd      	mov	sp, r7
 8019cb8:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019cbc:	4770      	bx	lr

08019cbe <inet_chksum>:
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */

u16_t
inet_chksum(const void *dataptr, u16_t len)
{
 8019cbe:	b580      	push	{r7, lr}
 8019cc0:	b082      	sub	sp, #8
 8019cc2:	af00      	add	r7, sp, #0
 8019cc4:	6078      	str	r0, [r7, #4]
 8019cc6:	460b      	mov	r3, r1
 8019cc8:	807b      	strh	r3, [r7, #2]
  return (u16_t)~(unsigned int)LWIP_CHKSUM(dataptr, len);
 8019cca:	887b      	ldrh	r3, [r7, #2]
 8019ccc:	4619      	mov	r1, r3
 8019cce:	6878      	ldr	r0, [r7, #4]
 8019cd0:	f7ff ff98 	bl	8019c04 <lwip_standard_chksum>
 8019cd4:	4603      	mov	r3, r0
 8019cd6:	43db      	mvns	r3, r3
 8019cd8:	b29b      	uxth	r3, r3
}
 8019cda:	4618      	mov	r0, r3
 8019cdc:	3708      	adds	r7, #8
 8019cde:	46bd      	mov	sp, r7
 8019ce0:	bd80      	pop	{r7, pc}

08019ce2 <inet_chksum_pbuf>:
 * @param p pbuf chain over that the checksum should be calculated
 * @return checksum (as u16_t) to be saved directly in the protocol header
 */
u16_t
inet_chksum_pbuf(struct pbuf *p)
{
 8019ce2:	b580      	push	{r7, lr}
 8019ce4:	b086      	sub	sp, #24
 8019ce6:	af00      	add	r7, sp, #0
 8019ce8:	6078      	str	r0, [r7, #4]
  u32_t acc;
  struct pbuf *q;
  int swapped = 0;
 8019cea:	2300      	movs	r3, #0
 8019cec:	60fb      	str	r3, [r7, #12]

  acc = 0;
 8019cee:	2300      	movs	r3, #0
 8019cf0:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 8019cf2:	687b      	ldr	r3, [r7, #4]
 8019cf4:	613b      	str	r3, [r7, #16]
 8019cf6:	e02b      	b.n	8019d50 <inet_chksum_pbuf+0x6e>
    acc += LWIP_CHKSUM(q->payload, q->len);
 8019cf8:	693b      	ldr	r3, [r7, #16]
 8019cfa:	685a      	ldr	r2, [r3, #4]
 8019cfc:	693b      	ldr	r3, [r7, #16]
 8019cfe:	895b      	ldrh	r3, [r3, #10]
 8019d00:	4619      	mov	r1, r3
 8019d02:	4610      	mov	r0, r2
 8019d04:	f7ff ff7e 	bl	8019c04 <lwip_standard_chksum>
 8019d08:	4603      	mov	r3, r0
 8019d0a:	461a      	mov	r2, r3
 8019d0c:	697b      	ldr	r3, [r7, #20]
 8019d0e:	4413      	add	r3, r2
 8019d10:	617b      	str	r3, [r7, #20]
    acc = FOLD_U32T(acc);
 8019d12:	697b      	ldr	r3, [r7, #20]
 8019d14:	0c1a      	lsrs	r2, r3, #16
 8019d16:	697b      	ldr	r3, [r7, #20]
 8019d18:	b29b      	uxth	r3, r3
 8019d1a:	4413      	add	r3, r2
 8019d1c:	617b      	str	r3, [r7, #20]
    if (q->len % 2 != 0) {
 8019d1e:	693b      	ldr	r3, [r7, #16]
 8019d20:	895b      	ldrh	r3, [r3, #10]
 8019d22:	f003 0301 	and.w	r3, r3, #1
 8019d26:	b29b      	uxth	r3, r3
 8019d28:	2b00      	cmp	r3, #0
 8019d2a:	d00e      	beq.n	8019d4a <inet_chksum_pbuf+0x68>
      swapped = !swapped;
 8019d2c:	68fb      	ldr	r3, [r7, #12]
 8019d2e:	2b00      	cmp	r3, #0
 8019d30:	bf0c      	ite	eq
 8019d32:	2301      	moveq	r3, #1
 8019d34:	2300      	movne	r3, #0
 8019d36:	b2db      	uxtb	r3, r3
 8019d38:	60fb      	str	r3, [r7, #12]
      acc = SWAP_BYTES_IN_WORD(acc);
 8019d3a:	697b      	ldr	r3, [r7, #20]
 8019d3c:	021b      	lsls	r3, r3, #8
 8019d3e:	b29a      	uxth	r2, r3
 8019d40:	697b      	ldr	r3, [r7, #20]
 8019d42:	0a1b      	lsrs	r3, r3, #8
 8019d44:	b2db      	uxtb	r3, r3
 8019d46:	4313      	orrs	r3, r2
 8019d48:	617b      	str	r3, [r7, #20]
  for (q = p; q != NULL; q = q->next) {
 8019d4a:	693b      	ldr	r3, [r7, #16]
 8019d4c:	681b      	ldr	r3, [r3, #0]
 8019d4e:	613b      	str	r3, [r7, #16]
 8019d50:	693b      	ldr	r3, [r7, #16]
 8019d52:	2b00      	cmp	r3, #0
 8019d54:	d1d0      	bne.n	8019cf8 <inet_chksum_pbuf+0x16>
    }
  }

  if (swapped) {
 8019d56:	68fb      	ldr	r3, [r7, #12]
 8019d58:	2b00      	cmp	r3, #0
 8019d5a:	d007      	beq.n	8019d6c <inet_chksum_pbuf+0x8a>
    acc = SWAP_BYTES_IN_WORD(acc);
 8019d5c:	697b      	ldr	r3, [r7, #20]
 8019d5e:	021b      	lsls	r3, r3, #8
 8019d60:	b29a      	uxth	r2, r3
 8019d62:	697b      	ldr	r3, [r7, #20]
 8019d64:	0a1b      	lsrs	r3, r3, #8
 8019d66:	b2db      	uxtb	r3, r3
 8019d68:	4313      	orrs	r3, r2
 8019d6a:	617b      	str	r3, [r7, #20]
  }
  return (u16_t)~(acc & 0xffffUL);
 8019d6c:	697b      	ldr	r3, [r7, #20]
 8019d6e:	b29b      	uxth	r3, r3
 8019d70:	43db      	mvns	r3, r3
 8019d72:	b29b      	uxth	r3, r3
}
 8019d74:	4618      	mov	r0, r3
 8019d76:	3718      	adds	r7, #24
 8019d78:	46bd      	mov	sp, r7
 8019d7a:	bd80      	pop	{r7, pc}

08019d7c <lwip_init>:
 * Initialize all modules.
 * Use this in NO_SYS mode. Use tcpip_init() otherwise.
 */
void
lwip_init(void)
{
 8019d7c:	b580      	push	{r7, lr}
 8019d7e:	b082      	sub	sp, #8
 8019d80:	af00      	add	r7, sp, #0
#ifndef LWIP_SKIP_CONST_CHECK
  int a = 0;
 8019d82:	2300      	movs	r3, #0
 8019d84:	607b      	str	r3, [r7, #4]
#endif

  /* Modules initialization */
  stats_init();
#if !NO_SYS
  sys_init();
 8019d86:	f00d fb75 	bl	8027474 <sys_init>
#endif /* !NO_SYS */
  mem_init();
 8019d8a:	f000 f8d3 	bl	8019f34 <mem_init>
  memp_init();
 8019d8e:	f000 fc1b 	bl	801a5c8 <memp_init>
  pbuf_init();
  netif_init();
 8019d92:	f000 fd27 	bl	801a7e4 <netif_init>
#endif /* LWIP_IPV4 */
#if LWIP_RAW
  raw_init();
#endif /* LWIP_RAW */
#if LWIP_UDP
  udp_init();
 8019d96:	f008 f8db 	bl	8021f50 <udp_init>
#endif /* LWIP_UDP */
#if LWIP_TCP
  tcp_init();
 8019d9a:	f001 fe91 	bl	801bac0 <tcp_init>
#if PPP_SUPPORT
  ppp_init();
#endif

#if LWIP_TIMERS
  sys_timeouts_init();
 8019d9e:	f008 f817 	bl	8021dd0 <sys_timeouts_init>
#endif /* LWIP_TIMERS */
}
 8019da2:	bf00      	nop
 8019da4:	3708      	adds	r7, #8
 8019da6:	46bd      	mov	sp, r7
 8019da8:	bd80      	pop	{r7, pc}
	...

08019dac <ptr_to_mem>:
#define mem_overflow_check_element(mem)
#endif /* MEM_OVERFLOW_CHECK */

static struct mem *
ptr_to_mem(mem_size_t ptr)
{
 8019dac:	b480      	push	{r7}
 8019dae:	b083      	sub	sp, #12
 8019db0:	af00      	add	r7, sp, #0
 8019db2:	6078      	str	r0, [r7, #4]
  return (struct mem *)(void *)&ram[ptr];
 8019db4:	4b04      	ldr	r3, [pc, #16]	@ (8019dc8 <ptr_to_mem+0x1c>)
 8019db6:	681a      	ldr	r2, [r3, #0]
 8019db8:	687b      	ldr	r3, [r7, #4]
 8019dba:	4413      	add	r3, r2
}
 8019dbc:	4618      	mov	r0, r3
 8019dbe:	370c      	adds	r7, #12
 8019dc0:	46bd      	mov	sp, r7
 8019dc2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019dc6:	4770      	bx	lr
 8019dc8:	24024470 	.word	0x24024470

08019dcc <mem_to_ptr>:

static mem_size_t
mem_to_ptr(void *mem)
{
 8019dcc:	b480      	push	{r7}
 8019dce:	b083      	sub	sp, #12
 8019dd0:	af00      	add	r7, sp, #0
 8019dd2:	6078      	str	r0, [r7, #4]
  return (mem_size_t)((u8_t *)mem - ram);
 8019dd4:	4b04      	ldr	r3, [pc, #16]	@ (8019de8 <mem_to_ptr+0x1c>)
 8019dd6:	681b      	ldr	r3, [r3, #0]
 8019dd8:	687a      	ldr	r2, [r7, #4]
 8019dda:	1ad3      	subs	r3, r2, r3
}
 8019ddc:	4618      	mov	r0, r3
 8019dde:	370c      	adds	r7, #12
 8019de0:	46bd      	mov	sp, r7
 8019de2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8019de6:	4770      	bx	lr
 8019de8:	24024470 	.word	0x24024470

08019dec <plug_holes>:
 * This assumes access to the heap is protected by the calling function
 * already.
 */
static void
plug_holes(struct mem *mem)
{
 8019dec:	b590      	push	{r4, r7, lr}
 8019dee:	b085      	sub	sp, #20
 8019df0:	af00      	add	r7, sp, #0
 8019df2:	6078      	str	r0, [r7, #4]
  struct mem *nmem;
  struct mem *pmem;

  LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram);
 8019df4:	4b45      	ldr	r3, [pc, #276]	@ (8019f0c <plug_holes+0x120>)
 8019df6:	681b      	ldr	r3, [r3, #0]
 8019df8:	687a      	ldr	r2, [r7, #4]
 8019dfa:	429a      	cmp	r2, r3
 8019dfc:	d206      	bcs.n	8019e0c <plug_holes+0x20>
 8019dfe:	4b44      	ldr	r3, [pc, #272]	@ (8019f10 <plug_holes+0x124>)
 8019e00:	f240 12df 	movw	r2, #479	@ 0x1df
 8019e04:	4943      	ldr	r1, [pc, #268]	@ (8019f14 <plug_holes+0x128>)
 8019e06:	4844      	ldr	r0, [pc, #272]	@ (8019f18 <plug_holes+0x12c>)
 8019e08:	f010 fe28 	bl	802aa5c <iprintf>
  LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end);
 8019e0c:	4b43      	ldr	r3, [pc, #268]	@ (8019f1c <plug_holes+0x130>)
 8019e0e:	681b      	ldr	r3, [r3, #0]
 8019e10:	687a      	ldr	r2, [r7, #4]
 8019e12:	429a      	cmp	r2, r3
 8019e14:	d306      	bcc.n	8019e24 <plug_holes+0x38>
 8019e16:	4b3e      	ldr	r3, [pc, #248]	@ (8019f10 <plug_holes+0x124>)
 8019e18:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 8019e1c:	4940      	ldr	r1, [pc, #256]	@ (8019f20 <plug_holes+0x134>)
 8019e1e:	483e      	ldr	r0, [pc, #248]	@ (8019f18 <plug_holes+0x12c>)
 8019e20:	f010 fe1c 	bl	802aa5c <iprintf>
  LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0);
 8019e24:	687b      	ldr	r3, [r7, #4]
 8019e26:	7a1b      	ldrb	r3, [r3, #8]
 8019e28:	2b00      	cmp	r3, #0
 8019e2a:	d006      	beq.n	8019e3a <plug_holes+0x4e>
 8019e2c:	4b38      	ldr	r3, [pc, #224]	@ (8019f10 <plug_holes+0x124>)
 8019e2e:	f240 12e1 	movw	r2, #481	@ 0x1e1
 8019e32:	493c      	ldr	r1, [pc, #240]	@ (8019f24 <plug_holes+0x138>)
 8019e34:	4838      	ldr	r0, [pc, #224]	@ (8019f18 <plug_holes+0x12c>)
 8019e36:	f010 fe11 	bl	802aa5c <iprintf>

  /* plug hole forward */
  LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED);
 8019e3a:	687b      	ldr	r3, [r7, #4]
 8019e3c:	681b      	ldr	r3, [r3, #0]
 8019e3e:	4a3a      	ldr	r2, [pc, #232]	@ (8019f28 <plug_holes+0x13c>)
 8019e40:	4293      	cmp	r3, r2
 8019e42:	d906      	bls.n	8019e52 <plug_holes+0x66>
 8019e44:	4b32      	ldr	r3, [pc, #200]	@ (8019f10 <plug_holes+0x124>)
 8019e46:	f44f 72f2 	mov.w	r2, #484	@ 0x1e4
 8019e4a:	4938      	ldr	r1, [pc, #224]	@ (8019f2c <plug_holes+0x140>)
 8019e4c:	4832      	ldr	r0, [pc, #200]	@ (8019f18 <plug_holes+0x12c>)
 8019e4e:	f010 fe05 	bl	802aa5c <iprintf>

  nmem = ptr_to_mem(mem->next);
 8019e52:	687b      	ldr	r3, [r7, #4]
 8019e54:	681b      	ldr	r3, [r3, #0]
 8019e56:	4618      	mov	r0, r3
 8019e58:	f7ff ffa8 	bl	8019dac <ptr_to_mem>
 8019e5c:	60f8      	str	r0, [r7, #12]
  if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) {
 8019e5e:	687a      	ldr	r2, [r7, #4]
 8019e60:	68fb      	ldr	r3, [r7, #12]
 8019e62:	429a      	cmp	r2, r3
 8019e64:	d024      	beq.n	8019eb0 <plug_holes+0xc4>
 8019e66:	68fb      	ldr	r3, [r7, #12]
 8019e68:	7a1b      	ldrb	r3, [r3, #8]
 8019e6a:	2b00      	cmp	r3, #0
 8019e6c:	d120      	bne.n	8019eb0 <plug_holes+0xc4>
 8019e6e:	4b2b      	ldr	r3, [pc, #172]	@ (8019f1c <plug_holes+0x130>)
 8019e70:	681b      	ldr	r3, [r3, #0]
 8019e72:	68fa      	ldr	r2, [r7, #12]
 8019e74:	429a      	cmp	r2, r3
 8019e76:	d01b      	beq.n	8019eb0 <plug_holes+0xc4>
    /* if mem->next is unused and not end of ram, combine mem and mem->next */
    if (lfree == nmem) {
 8019e78:	4b2d      	ldr	r3, [pc, #180]	@ (8019f30 <plug_holes+0x144>)
 8019e7a:	681b      	ldr	r3, [r3, #0]
 8019e7c:	68fa      	ldr	r2, [r7, #12]
 8019e7e:	429a      	cmp	r2, r3
 8019e80:	d102      	bne.n	8019e88 <plug_holes+0x9c>
      lfree = mem;
 8019e82:	4a2b      	ldr	r2, [pc, #172]	@ (8019f30 <plug_holes+0x144>)
 8019e84:	687b      	ldr	r3, [r7, #4]
 8019e86:	6013      	str	r3, [r2, #0]
    }
    mem->next = nmem->next;
 8019e88:	68fb      	ldr	r3, [r7, #12]
 8019e8a:	681a      	ldr	r2, [r3, #0]
 8019e8c:	687b      	ldr	r3, [r7, #4]
 8019e8e:	601a      	str	r2, [r3, #0]
    if (nmem->next != MEM_SIZE_ALIGNED) {
 8019e90:	68fb      	ldr	r3, [r7, #12]
 8019e92:	681b      	ldr	r3, [r3, #0]
 8019e94:	4a24      	ldr	r2, [pc, #144]	@ (8019f28 <plug_holes+0x13c>)
 8019e96:	4293      	cmp	r3, r2
 8019e98:	d00a      	beq.n	8019eb0 <plug_holes+0xc4>
      ptr_to_mem(nmem->next)->prev = mem_to_ptr(mem);
 8019e9a:	68fb      	ldr	r3, [r7, #12]
 8019e9c:	681b      	ldr	r3, [r3, #0]
 8019e9e:	4618      	mov	r0, r3
 8019ea0:	f7ff ff84 	bl	8019dac <ptr_to_mem>
 8019ea4:	4604      	mov	r4, r0
 8019ea6:	6878      	ldr	r0, [r7, #4]
 8019ea8:	f7ff ff90 	bl	8019dcc <mem_to_ptr>
 8019eac:	4603      	mov	r3, r0
 8019eae:	6063      	str	r3, [r4, #4]
    }
  }

  /* plug hole backward */
  pmem = ptr_to_mem(mem->prev);
 8019eb0:	687b      	ldr	r3, [r7, #4]
 8019eb2:	685b      	ldr	r3, [r3, #4]
 8019eb4:	4618      	mov	r0, r3
 8019eb6:	f7ff ff79 	bl	8019dac <ptr_to_mem>
 8019eba:	60b8      	str	r0, [r7, #8]
  if (pmem != mem && pmem->used == 0) {
 8019ebc:	68ba      	ldr	r2, [r7, #8]
 8019ebe:	687b      	ldr	r3, [r7, #4]
 8019ec0:	429a      	cmp	r2, r3
 8019ec2:	d01f      	beq.n	8019f04 <plug_holes+0x118>
 8019ec4:	68bb      	ldr	r3, [r7, #8]
 8019ec6:	7a1b      	ldrb	r3, [r3, #8]
 8019ec8:	2b00      	cmp	r3, #0
 8019eca:	d11b      	bne.n	8019f04 <plug_holes+0x118>
    /* if mem->prev is unused, combine mem and mem->prev */
    if (lfree == mem) {
 8019ecc:	4b18      	ldr	r3, [pc, #96]	@ (8019f30 <plug_holes+0x144>)
 8019ece:	681b      	ldr	r3, [r3, #0]
 8019ed0:	687a      	ldr	r2, [r7, #4]
 8019ed2:	429a      	cmp	r2, r3
 8019ed4:	d102      	bne.n	8019edc <plug_holes+0xf0>
      lfree = pmem;
 8019ed6:	4a16      	ldr	r2, [pc, #88]	@ (8019f30 <plug_holes+0x144>)
 8019ed8:	68bb      	ldr	r3, [r7, #8]
 8019eda:	6013      	str	r3, [r2, #0]
    }
    pmem->next = mem->next;
 8019edc:	687b      	ldr	r3, [r7, #4]
 8019ede:	681a      	ldr	r2, [r3, #0]
 8019ee0:	68bb      	ldr	r3, [r7, #8]
 8019ee2:	601a      	str	r2, [r3, #0]
    if (mem->next != MEM_SIZE_ALIGNED) {
 8019ee4:	687b      	ldr	r3, [r7, #4]
 8019ee6:	681b      	ldr	r3, [r3, #0]
 8019ee8:	4a0f      	ldr	r2, [pc, #60]	@ (8019f28 <plug_holes+0x13c>)
 8019eea:	4293      	cmp	r3, r2
 8019eec:	d00a      	beq.n	8019f04 <plug_holes+0x118>
      ptr_to_mem(mem->next)->prev = mem_to_ptr(pmem);
 8019eee:	687b      	ldr	r3, [r7, #4]
 8019ef0:	681b      	ldr	r3, [r3, #0]
 8019ef2:	4618      	mov	r0, r3
 8019ef4:	f7ff ff5a 	bl	8019dac <ptr_to_mem>
 8019ef8:	4604      	mov	r4, r0
 8019efa:	68b8      	ldr	r0, [r7, #8]
 8019efc:	f7ff ff66 	bl	8019dcc <mem_to_ptr>
 8019f00:	4603      	mov	r3, r0
 8019f02:	6063      	str	r3, [r4, #4]
    }
  }
}
 8019f04:	bf00      	nop
 8019f06:	3714      	adds	r7, #20
 8019f08:	46bd      	mov	sp, r7
 8019f0a:	bd90      	pop	{r4, r7, pc}
 8019f0c:	24024470 	.word	0x24024470
 8019f10:	0802ecf4 	.word	0x0802ecf4
 8019f14:	0802ed24 	.word	0x0802ed24
 8019f18:	0802ed3c 	.word	0x0802ed3c
 8019f1c:	24024474 	.word	0x24024474
 8019f20:	0802ed64 	.word	0x0802ed64
 8019f24:	0802ed80 	.word	0x0802ed80
 8019f28:	0001ffe8 	.word	0x0001ffe8
 8019f2c:	0802ed9c 	.word	0x0802ed9c
 8019f30:	2402447c 	.word	0x2402447c

08019f34 <mem_init>:
/**
 * Zero the heap and initialize start, end and lowest-free
 */
void
mem_init(void)
{
 8019f34:	b580      	push	{r7, lr}
 8019f36:	b082      	sub	sp, #8
 8019f38:	af00      	add	r7, sp, #0

  LWIP_ASSERT("Sanity check alignment",
              (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT - 1)) == 0);

  /* align the heap */
  ram = (u8_t *)LWIP_MEM_ALIGN(LWIP_RAM_HEAP_POINTER);
 8019f3a:	4b1b      	ldr	r3, [pc, #108]	@ (8019fa8 <mem_init+0x74>)
 8019f3c:	4a1b      	ldr	r2, [pc, #108]	@ (8019fac <mem_init+0x78>)
 8019f3e:	601a      	str	r2, [r3, #0]
  /* initialize the start of the heap */
  mem = (struct mem *)(void *)ram;
 8019f40:	4b19      	ldr	r3, [pc, #100]	@ (8019fa8 <mem_init+0x74>)
 8019f42:	681b      	ldr	r3, [r3, #0]
 8019f44:	607b      	str	r3, [r7, #4]
  mem->next = MEM_SIZE_ALIGNED;
 8019f46:	687b      	ldr	r3, [r7, #4]
 8019f48:	4a19      	ldr	r2, [pc, #100]	@ (8019fb0 <mem_init+0x7c>)
 8019f4a:	601a      	str	r2, [r3, #0]
  mem->prev = 0;
 8019f4c:	687b      	ldr	r3, [r7, #4]
 8019f4e:	2200      	movs	r2, #0
 8019f50:	605a      	str	r2, [r3, #4]
  mem->used = 0;
 8019f52:	687b      	ldr	r3, [r7, #4]
 8019f54:	2200      	movs	r2, #0
 8019f56:	721a      	strb	r2, [r3, #8]
  /* initialize the end of the heap */
  ram_end = ptr_to_mem(MEM_SIZE_ALIGNED);
 8019f58:	4815      	ldr	r0, [pc, #84]	@ (8019fb0 <mem_init+0x7c>)
 8019f5a:	f7ff ff27 	bl	8019dac <ptr_to_mem>
 8019f5e:	4603      	mov	r3, r0
 8019f60:	4a14      	ldr	r2, [pc, #80]	@ (8019fb4 <mem_init+0x80>)
 8019f62:	6013      	str	r3, [r2, #0]
  ram_end->used = 1;
 8019f64:	4b13      	ldr	r3, [pc, #76]	@ (8019fb4 <mem_init+0x80>)
 8019f66:	681b      	ldr	r3, [r3, #0]
 8019f68:	2201      	movs	r2, #1
 8019f6a:	721a      	strb	r2, [r3, #8]
  ram_end->next = MEM_SIZE_ALIGNED;
 8019f6c:	4b11      	ldr	r3, [pc, #68]	@ (8019fb4 <mem_init+0x80>)
 8019f6e:	681b      	ldr	r3, [r3, #0]
 8019f70:	4a0f      	ldr	r2, [pc, #60]	@ (8019fb0 <mem_init+0x7c>)
 8019f72:	601a      	str	r2, [r3, #0]
  ram_end->prev = MEM_SIZE_ALIGNED;
 8019f74:	4b0f      	ldr	r3, [pc, #60]	@ (8019fb4 <mem_init+0x80>)
 8019f76:	681b      	ldr	r3, [r3, #0]
 8019f78:	4a0d      	ldr	r2, [pc, #52]	@ (8019fb0 <mem_init+0x7c>)
 8019f7a:	605a      	str	r2, [r3, #4]
  MEM_SANITY();

  /* initialize the lowest-free pointer to the start of the heap */
  lfree = (struct mem *)(void *)ram;
 8019f7c:	4b0a      	ldr	r3, [pc, #40]	@ (8019fa8 <mem_init+0x74>)
 8019f7e:	681b      	ldr	r3, [r3, #0]
 8019f80:	4a0d      	ldr	r2, [pc, #52]	@ (8019fb8 <mem_init+0x84>)
 8019f82:	6013      	str	r3, [r2, #0]

  MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED);

  if (sys_mutex_new(&mem_mutex) != ERR_OK) {
 8019f84:	480d      	ldr	r0, [pc, #52]	@ (8019fbc <mem_init+0x88>)
 8019f86:	f00d fa81 	bl	802748c <sys_mutex_new>
 8019f8a:	4603      	mov	r3, r0
 8019f8c:	2b00      	cmp	r3, #0
 8019f8e:	d006      	beq.n	8019f9e <mem_init+0x6a>
    LWIP_ASSERT("failed to create mem_mutex", 0);
 8019f90:	4b0b      	ldr	r3, [pc, #44]	@ (8019fc0 <mem_init+0x8c>)
 8019f92:	f240 221f 	movw	r2, #543	@ 0x21f
 8019f96:	490b      	ldr	r1, [pc, #44]	@ (8019fc4 <mem_init+0x90>)
 8019f98:	480b      	ldr	r0, [pc, #44]	@ (8019fc8 <mem_init+0x94>)
 8019f9a:	f010 fd5f 	bl	802aa5c <iprintf>
  }
}
 8019f9e:	bf00      	nop
 8019fa0:	3708      	adds	r7, #8
 8019fa2:	46bd      	mov	sp, r7
 8019fa4:	bd80      	pop	{r7, pc}
 8019fa6:	bf00      	nop
 8019fa8:	24024470 	.word	0x24024470
 8019fac:	24020000 	.word	0x24020000
 8019fb0:	0001ffe8 	.word	0x0001ffe8
 8019fb4:	24024474 	.word	0x24024474
 8019fb8:	2402447c 	.word	0x2402447c
 8019fbc:	24024478 	.word	0x24024478
 8019fc0:	0802ecf4 	.word	0x0802ecf4
 8019fc4:	0802edc8 	.word	0x0802edc8
 8019fc8:	0802ed3c 	.word	0x0802ed3c

08019fcc <mem_link_valid>:
/* Check if a struct mem is correctly linked.
 * If not, double-free is a possible reason.
 */
static int
mem_link_valid(struct mem *mem)
{
 8019fcc:	b580      	push	{r7, lr}
 8019fce:	b086      	sub	sp, #24
 8019fd0:	af00      	add	r7, sp, #0
 8019fd2:	6078      	str	r0, [r7, #4]
  struct mem *nmem, *pmem;
  mem_size_t rmem_idx;
  rmem_idx = mem_to_ptr(mem);
 8019fd4:	6878      	ldr	r0, [r7, #4]
 8019fd6:	f7ff fef9 	bl	8019dcc <mem_to_ptr>
 8019fda:	6178      	str	r0, [r7, #20]
  nmem = ptr_to_mem(mem->next);
 8019fdc:	687b      	ldr	r3, [r7, #4]
 8019fde:	681b      	ldr	r3, [r3, #0]
 8019fe0:	4618      	mov	r0, r3
 8019fe2:	f7ff fee3 	bl	8019dac <ptr_to_mem>
 8019fe6:	6138      	str	r0, [r7, #16]
  pmem = ptr_to_mem(mem->prev);
 8019fe8:	687b      	ldr	r3, [r7, #4]
 8019fea:	685b      	ldr	r3, [r3, #4]
 8019fec:	4618      	mov	r0, r3
 8019fee:	f7ff fedd 	bl	8019dac <ptr_to_mem>
 8019ff2:	60f8      	str	r0, [r7, #12]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 8019ff4:	687b      	ldr	r3, [r7, #4]
 8019ff6:	681b      	ldr	r3, [r3, #0]
 8019ff8:	4a11      	ldr	r2, [pc, #68]	@ (801a040 <mem_link_valid+0x74>)
 8019ffa:	4293      	cmp	r3, r2
 8019ffc:	d818      	bhi.n	801a030 <mem_link_valid+0x64>
 8019ffe:	687b      	ldr	r3, [r7, #4]
 801a000:	685b      	ldr	r3, [r3, #4]
 801a002:	4a0f      	ldr	r2, [pc, #60]	@ (801a040 <mem_link_valid+0x74>)
 801a004:	4293      	cmp	r3, r2
 801a006:	d813      	bhi.n	801a030 <mem_link_valid+0x64>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 801a008:	687b      	ldr	r3, [r7, #4]
 801a00a:	685b      	ldr	r3, [r3, #4]
  if ((mem->next > MEM_SIZE_ALIGNED) || (mem->prev > MEM_SIZE_ALIGNED) ||
 801a00c:	697a      	ldr	r2, [r7, #20]
 801a00e:	429a      	cmp	r2, r3
 801a010:	d004      	beq.n	801a01c <mem_link_valid+0x50>
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 801a012:	68fb      	ldr	r3, [r7, #12]
 801a014:	681b      	ldr	r3, [r3, #0]
 801a016:	697a      	ldr	r2, [r7, #20]
 801a018:	429a      	cmp	r2, r3
 801a01a:	d109      	bne.n	801a030 <mem_link_valid+0x64>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 801a01c:	4b09      	ldr	r3, [pc, #36]	@ (801a044 <mem_link_valid+0x78>)
 801a01e:	681b      	ldr	r3, [r3, #0]
      ((mem->prev != rmem_idx) && (pmem->next != rmem_idx)) ||
 801a020:	693a      	ldr	r2, [r7, #16]
 801a022:	429a      	cmp	r2, r3
 801a024:	d006      	beq.n	801a034 <mem_link_valid+0x68>
      ((nmem != ram_end) && (nmem->prev != rmem_idx))) {
 801a026:	693b      	ldr	r3, [r7, #16]
 801a028:	685b      	ldr	r3, [r3, #4]
 801a02a:	697a      	ldr	r2, [r7, #20]
 801a02c:	429a      	cmp	r2, r3
 801a02e:	d001      	beq.n	801a034 <mem_link_valid+0x68>
    return 0;
 801a030:	2300      	movs	r3, #0
 801a032:	e000      	b.n	801a036 <mem_link_valid+0x6a>
  }
  return 1;
 801a034:	2301      	movs	r3, #1
}
 801a036:	4618      	mov	r0, r3
 801a038:	3718      	adds	r7, #24
 801a03a:	46bd      	mov	sp, r7
 801a03c:	bd80      	pop	{r7, pc}
 801a03e:	bf00      	nop
 801a040:	0001ffe8 	.word	0x0001ffe8
 801a044:	24024474 	.word	0x24024474

0801a048 <mem_free>:
 * @param rmem is the data portion of a struct mem as returned by a previous
 *             call to mem_malloc()
 */
void
mem_free(void *rmem)
{
 801a048:	b580      	push	{r7, lr}
 801a04a:	b088      	sub	sp, #32
 801a04c:	af00      	add	r7, sp, #0
 801a04e:	6078      	str	r0, [r7, #4]
  struct mem *mem;
  LWIP_MEM_FREE_DECL_PROTECT();

  if (rmem == NULL) {
 801a050:	687b      	ldr	r3, [r7, #4]
 801a052:	2b00      	cmp	r3, #0
 801a054:	d070      	beq.n	801a138 <mem_free+0xf0>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n"));
    return;
  }
  if ((((mem_ptr_t)rmem) & (MEM_ALIGNMENT - 1)) != 0) {
 801a056:	687b      	ldr	r3, [r7, #4]
 801a058:	f003 0303 	and.w	r3, r3, #3
 801a05c:	2b00      	cmp	r3, #0
 801a05e:	d00d      	beq.n	801a07c <mem_free+0x34>
    LWIP_MEM_ILLEGAL_FREE("mem_free: sanity check alignment");
 801a060:	4b37      	ldr	r3, [pc, #220]	@ (801a140 <mem_free+0xf8>)
 801a062:	f240 2273 	movw	r2, #627	@ 0x273
 801a066:	4937      	ldr	r1, [pc, #220]	@ (801a144 <mem_free+0xfc>)
 801a068:	4837      	ldr	r0, [pc, #220]	@ (801a148 <mem_free+0x100>)
 801a06a:	f010 fcf7 	bl	802aa5c <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: sanity check alignment\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 801a06e:	f00d fa5f 	bl	8027530 <sys_arch_protect>
 801a072:	60f8      	str	r0, [r7, #12]
 801a074:	68f8      	ldr	r0, [r7, #12]
 801a076:	f00d fa69 	bl	802754c <sys_arch_unprotect>
    return;
 801a07a:	e05e      	b.n	801a13a <mem_free+0xf2>
  }

  /* Get the corresponding struct mem: */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 801a07c:	687b      	ldr	r3, [r7, #4]
 801a07e:	3b0c      	subs	r3, #12
 801a080:	61fb      	str	r3, [r7, #28]

  if ((u8_t *)mem < ram || (u8_t *)rmem + MIN_SIZE_ALIGNED > (u8_t *)ram_end) {
 801a082:	4b32      	ldr	r3, [pc, #200]	@ (801a14c <mem_free+0x104>)
 801a084:	681b      	ldr	r3, [r3, #0]
 801a086:	69fa      	ldr	r2, [r7, #28]
 801a088:	429a      	cmp	r2, r3
 801a08a:	d306      	bcc.n	801a09a <mem_free+0x52>
 801a08c:	687b      	ldr	r3, [r7, #4]
 801a08e:	f103 020c 	add.w	r2, r3, #12
 801a092:	4b2f      	ldr	r3, [pc, #188]	@ (801a150 <mem_free+0x108>)
 801a094:	681b      	ldr	r3, [r3, #0]
 801a096:	429a      	cmp	r2, r3
 801a098:	d90d      	bls.n	801a0b6 <mem_free+0x6e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory");
 801a09a:	4b29      	ldr	r3, [pc, #164]	@ (801a140 <mem_free+0xf8>)
 801a09c:	f240 227f 	movw	r2, #639	@ 0x27f
 801a0a0:	492c      	ldr	r1, [pc, #176]	@ (801a154 <mem_free+0x10c>)
 801a0a2:	4829      	ldr	r0, [pc, #164]	@ (801a148 <mem_free+0x100>)
 801a0a4:	f010 fcda 	bl	802aa5c <iprintf>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 801a0a8:	f00d fa42 	bl	8027530 <sys_arch_protect>
 801a0ac:	6138      	str	r0, [r7, #16]
 801a0ae:	6938      	ldr	r0, [r7, #16]
 801a0b0:	f00d fa4c 	bl	802754c <sys_arch_unprotect>
    return;
 801a0b4:	e041      	b.n	801a13a <mem_free+0xf2>
  }
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 801a0b6:	4828      	ldr	r0, [pc, #160]	@ (801a158 <mem_free+0x110>)
 801a0b8:	f00d f9fe 	bl	80274b8 <sys_mutex_lock>
  /* mem has to be in a used state */
  if (!mem->used) {
 801a0bc:	69fb      	ldr	r3, [r7, #28]
 801a0be:	7a1b      	ldrb	r3, [r3, #8]
 801a0c0:	2b00      	cmp	r3, #0
 801a0c2:	d110      	bne.n	801a0e6 <mem_free+0x9e>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: double free");
 801a0c4:	4b1e      	ldr	r3, [pc, #120]	@ (801a140 <mem_free+0xf8>)
 801a0c6:	f44f 7223 	mov.w	r2, #652	@ 0x28c
 801a0ca:	4924      	ldr	r1, [pc, #144]	@ (801a15c <mem_free+0x114>)
 801a0cc:	481e      	ldr	r0, [pc, #120]	@ (801a148 <mem_free+0x100>)
 801a0ce:	f010 fcc5 	bl	802aa5c <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 801a0d2:	4821      	ldr	r0, [pc, #132]	@ (801a158 <mem_free+0x110>)
 801a0d4:	f00d f9ff 	bl	80274d6 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 801a0d8:	f00d fa2a 	bl	8027530 <sys_arch_protect>
 801a0dc:	6178      	str	r0, [r7, #20]
 801a0de:	6978      	ldr	r0, [r7, #20]
 801a0e0:	f00d fa34 	bl	802754c <sys_arch_unprotect>
    return;
 801a0e4:	e029      	b.n	801a13a <mem_free+0xf2>
  }

  if (!mem_link_valid(mem)) {
 801a0e6:	69f8      	ldr	r0, [r7, #28]
 801a0e8:	f7ff ff70 	bl	8019fcc <mem_link_valid>
 801a0ec:	4603      	mov	r3, r0
 801a0ee:	2b00      	cmp	r3, #0
 801a0f0:	d110      	bne.n	801a114 <mem_free+0xcc>
    LWIP_MEM_ILLEGAL_FREE("mem_free: illegal memory: non-linked: double free");
 801a0f2:	4b13      	ldr	r3, [pc, #76]	@ (801a140 <mem_free+0xf8>)
 801a0f4:	f240 2295 	movw	r2, #661	@ 0x295
 801a0f8:	4919      	ldr	r1, [pc, #100]	@ (801a160 <mem_free+0x118>)
 801a0fa:	4813      	ldr	r0, [pc, #76]	@ (801a148 <mem_free+0x100>)
 801a0fc:	f010 fcae 	bl	802aa5c <iprintf>
    LWIP_MEM_FREE_UNPROTECT();
 801a100:	4815      	ldr	r0, [pc, #84]	@ (801a158 <mem_free+0x110>)
 801a102:	f00d f9e8 	bl	80274d6 <sys_mutex_unlock>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory: non-linked: double free?\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 801a106:	f00d fa13 	bl	8027530 <sys_arch_protect>
 801a10a:	61b8      	str	r0, [r7, #24]
 801a10c:	69b8      	ldr	r0, [r7, #24]
 801a10e:	f00d fa1d 	bl	802754c <sys_arch_unprotect>
    return;
 801a112:	e012      	b.n	801a13a <mem_free+0xf2>
  }

  /* mem is now unused. */
  mem->used = 0;
 801a114:	69fb      	ldr	r3, [r7, #28]
 801a116:	2200      	movs	r2, #0
 801a118:	721a      	strb	r2, [r3, #8]

  if (mem < lfree) {
 801a11a:	4b12      	ldr	r3, [pc, #72]	@ (801a164 <mem_free+0x11c>)
 801a11c:	681b      	ldr	r3, [r3, #0]
 801a11e:	69fa      	ldr	r2, [r7, #28]
 801a120:	429a      	cmp	r2, r3
 801a122:	d202      	bcs.n	801a12a <mem_free+0xe2>
    /* the newly freed struct is now the lowest */
    lfree = mem;
 801a124:	4a0f      	ldr	r2, [pc, #60]	@ (801a164 <mem_free+0x11c>)
 801a126:	69fb      	ldr	r3, [r7, #28]
 801a128:	6013      	str	r3, [r2, #0]
  }

  MEM_STATS_DEC_USED(used, mem->next - (mem_size_t)(((u8_t *)mem - ram)));

  /* finally, see if prev or next are free also */
  plug_holes(mem);
 801a12a:	69f8      	ldr	r0, [r7, #28]
 801a12c:	f7ff fe5e 	bl	8019dec <plug_holes>
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 801a130:	4809      	ldr	r0, [pc, #36]	@ (801a158 <mem_free+0x110>)
 801a132:	f00d f9d0 	bl	80274d6 <sys_mutex_unlock>
 801a136:	e000      	b.n	801a13a <mem_free+0xf2>
    return;
 801a138:	bf00      	nop
}
 801a13a:	3720      	adds	r7, #32
 801a13c:	46bd      	mov	sp, r7
 801a13e:	bd80      	pop	{r7, pc}
 801a140:	0802ecf4 	.word	0x0802ecf4
 801a144:	0802ede4 	.word	0x0802ede4
 801a148:	0802ed3c 	.word	0x0802ed3c
 801a14c:	24024470 	.word	0x24024470
 801a150:	24024474 	.word	0x24024474
 801a154:	0802ee08 	.word	0x0802ee08
 801a158:	24024478 	.word	0x24024478
 801a15c:	0802ee24 	.word	0x0802ee24
 801a160:	0802ee4c 	.word	0x0802ee4c
 801a164:	2402447c 	.word	0x2402447c

0801a168 <mem_trim>:
 *         or NULL if newsize is > old size, in which case rmem is NOT touched
 *         or freed!
 */
void *
mem_trim(void *rmem, mem_size_t new_size)
{
 801a168:	b580      	push	{r7, lr}
 801a16a:	b08a      	sub	sp, #40	@ 0x28
 801a16c:	af00      	add	r7, sp, #0
 801a16e:	6078      	str	r0, [r7, #4]
 801a170:	6039      	str	r1, [r7, #0]
  /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */
  LWIP_MEM_FREE_DECL_PROTECT();

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  newsize = (mem_size_t)LWIP_MEM_ALIGN_SIZE(new_size);
 801a172:	683b      	ldr	r3, [r7, #0]
 801a174:	3303      	adds	r3, #3
 801a176:	f023 0303 	bic.w	r3, r3, #3
 801a17a:	627b      	str	r3, [r7, #36]	@ 0x24
  if (newsize < MIN_SIZE_ALIGNED) {
 801a17c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a17e:	2b0b      	cmp	r3, #11
 801a180:	d801      	bhi.n	801a186 <mem_trim+0x1e>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    newsize = MIN_SIZE_ALIGNED;
 801a182:	230c      	movs	r3, #12
 801a184:	627b      	str	r3, [r7, #36]	@ 0x24
  }
#if MEM_OVERFLOW_CHECK
  newsize += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((newsize > MEM_SIZE_ALIGNED) || (newsize < new_size)) {
 801a186:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a188:	4a6e      	ldr	r2, [pc, #440]	@ (801a344 <mem_trim+0x1dc>)
 801a18a:	4293      	cmp	r3, r2
 801a18c:	d803      	bhi.n	801a196 <mem_trim+0x2e>
 801a18e:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801a190:	683b      	ldr	r3, [r7, #0]
 801a192:	429a      	cmp	r2, r3
 801a194:	d201      	bcs.n	801a19a <mem_trim+0x32>
    return NULL;
 801a196:	2300      	movs	r3, #0
 801a198:	e0d0      	b.n	801a33c <mem_trim+0x1d4>
  }

  LWIP_ASSERT("mem_trim: legal memory", (u8_t *)rmem >= (u8_t *)ram &&
 801a19a:	4b6b      	ldr	r3, [pc, #428]	@ (801a348 <mem_trim+0x1e0>)
 801a19c:	681b      	ldr	r3, [r3, #0]
 801a19e:	687a      	ldr	r2, [r7, #4]
 801a1a0:	429a      	cmp	r2, r3
 801a1a2:	d304      	bcc.n	801a1ae <mem_trim+0x46>
 801a1a4:	4b69      	ldr	r3, [pc, #420]	@ (801a34c <mem_trim+0x1e4>)
 801a1a6:	681b      	ldr	r3, [r3, #0]
 801a1a8:	687a      	ldr	r2, [r7, #4]
 801a1aa:	429a      	cmp	r2, r3
 801a1ac:	d306      	bcc.n	801a1bc <mem_trim+0x54>
 801a1ae:	4b68      	ldr	r3, [pc, #416]	@ (801a350 <mem_trim+0x1e8>)
 801a1b0:	f240 22d1 	movw	r2, #721	@ 0x2d1
 801a1b4:	4967      	ldr	r1, [pc, #412]	@ (801a354 <mem_trim+0x1ec>)
 801a1b6:	4868      	ldr	r0, [pc, #416]	@ (801a358 <mem_trim+0x1f0>)
 801a1b8:	f010 fc50 	bl	802aa5c <iprintf>
              (u8_t *)rmem < (u8_t *)ram_end);

  if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) {
 801a1bc:	4b62      	ldr	r3, [pc, #392]	@ (801a348 <mem_trim+0x1e0>)
 801a1be:	681b      	ldr	r3, [r3, #0]
 801a1c0:	687a      	ldr	r2, [r7, #4]
 801a1c2:	429a      	cmp	r2, r3
 801a1c4:	d304      	bcc.n	801a1d0 <mem_trim+0x68>
 801a1c6:	4b61      	ldr	r3, [pc, #388]	@ (801a34c <mem_trim+0x1e4>)
 801a1c8:	681b      	ldr	r3, [r3, #0]
 801a1ca:	687a      	ldr	r2, [r7, #4]
 801a1cc:	429a      	cmp	r2, r3
 801a1ce:	d307      	bcc.n	801a1e0 <mem_trim+0x78>
    LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_trim: illegal memory\n"));
    /* protect mem stats from concurrent access */
    MEM_STATS_INC_LOCKED(illegal);
 801a1d0:	f00d f9ae 	bl	8027530 <sys_arch_protect>
 801a1d4:	60b8      	str	r0, [r7, #8]
 801a1d6:	68b8      	ldr	r0, [r7, #8]
 801a1d8:	f00d f9b8 	bl	802754c <sys_arch_unprotect>
    return rmem;
 801a1dc:	687b      	ldr	r3, [r7, #4]
 801a1de:	e0ad      	b.n	801a33c <mem_trim+0x1d4>
  }
  /* Get the corresponding struct mem ... */
  /* cast through void* to get rid of alignment warnings */
  mem = (struct mem *)(void *)((u8_t *)rmem - (SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET));
 801a1e0:	687b      	ldr	r3, [r7, #4]
 801a1e2:	3b0c      	subs	r3, #12
 801a1e4:	623b      	str	r3, [r7, #32]
#if MEM_OVERFLOW_CHECK
  mem_overflow_check_element(mem);
#endif
  /* ... and its offset pointer */
  ptr = mem_to_ptr(mem);
 801a1e6:	6a38      	ldr	r0, [r7, #32]
 801a1e8:	f7ff fdf0 	bl	8019dcc <mem_to_ptr>
 801a1ec:	61f8      	str	r0, [r7, #28]

  size = (mem_size_t)((mem_size_t)(mem->next - ptr) - (SIZEOF_STRUCT_MEM + MEM_SANITY_OVERHEAD));
 801a1ee:	6a3b      	ldr	r3, [r7, #32]
 801a1f0:	681a      	ldr	r2, [r3, #0]
 801a1f2:	69fb      	ldr	r3, [r7, #28]
 801a1f4:	1ad3      	subs	r3, r2, r3
 801a1f6:	3b0c      	subs	r3, #12
 801a1f8:	61bb      	str	r3, [r7, #24]
  LWIP_ASSERT("mem_trim can only shrink memory", newsize <= size);
 801a1fa:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801a1fc:	69bb      	ldr	r3, [r7, #24]
 801a1fe:	429a      	cmp	r2, r3
 801a200:	d906      	bls.n	801a210 <mem_trim+0xa8>
 801a202:	4b53      	ldr	r3, [pc, #332]	@ (801a350 <mem_trim+0x1e8>)
 801a204:	f44f 7239 	mov.w	r2, #740	@ 0x2e4
 801a208:	4954      	ldr	r1, [pc, #336]	@ (801a35c <mem_trim+0x1f4>)
 801a20a:	4853      	ldr	r0, [pc, #332]	@ (801a358 <mem_trim+0x1f0>)
 801a20c:	f010 fc26 	bl	802aa5c <iprintf>
  if (newsize > size) {
 801a210:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801a212:	69bb      	ldr	r3, [r7, #24]
 801a214:	429a      	cmp	r2, r3
 801a216:	d901      	bls.n	801a21c <mem_trim+0xb4>
    /* not supported */
    return NULL;
 801a218:	2300      	movs	r3, #0
 801a21a:	e08f      	b.n	801a33c <mem_trim+0x1d4>
  }
  if (newsize == size) {
 801a21c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801a21e:	69bb      	ldr	r3, [r7, #24]
 801a220:	429a      	cmp	r2, r3
 801a222:	d101      	bne.n	801a228 <mem_trim+0xc0>
    /* No change in size, simply return */
    return rmem;
 801a224:	687b      	ldr	r3, [r7, #4]
 801a226:	e089      	b.n	801a33c <mem_trim+0x1d4>
  }

  /* protect the heap from concurrent access */
  LWIP_MEM_FREE_PROTECT();
 801a228:	484d      	ldr	r0, [pc, #308]	@ (801a360 <mem_trim+0x1f8>)
 801a22a:	f00d f945 	bl	80274b8 <sys_mutex_lock>

  mem2 = ptr_to_mem(mem->next);
 801a22e:	6a3b      	ldr	r3, [r7, #32]
 801a230:	681b      	ldr	r3, [r3, #0]
 801a232:	4618      	mov	r0, r3
 801a234:	f7ff fdba 	bl	8019dac <ptr_to_mem>
 801a238:	6178      	str	r0, [r7, #20]
  if (mem2->used == 0) {
 801a23a:	697b      	ldr	r3, [r7, #20]
 801a23c:	7a1b      	ldrb	r3, [r3, #8]
 801a23e:	2b00      	cmp	r3, #0
 801a240:	d13c      	bne.n	801a2bc <mem_trim+0x154>
    /* The next struct is unused, we can simply move it at little */
    mem_size_t next;
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 801a242:	6a3b      	ldr	r3, [r7, #32]
 801a244:	681b      	ldr	r3, [r3, #0]
 801a246:	4a3f      	ldr	r2, [pc, #252]	@ (801a344 <mem_trim+0x1dc>)
 801a248:	4293      	cmp	r3, r2
 801a24a:	d106      	bne.n	801a25a <mem_trim+0xf2>
 801a24c:	4b40      	ldr	r3, [pc, #256]	@ (801a350 <mem_trim+0x1e8>)
 801a24e:	f240 22f5 	movw	r2, #757	@ 0x2f5
 801a252:	4944      	ldr	r1, [pc, #272]	@ (801a364 <mem_trim+0x1fc>)
 801a254:	4840      	ldr	r0, [pc, #256]	@ (801a358 <mem_trim+0x1f0>)
 801a256:	f010 fc01 	bl	802aa5c <iprintf>
    /* remember the old next pointer */
    next = mem2->next;
 801a25a:	697b      	ldr	r3, [r7, #20]
 801a25c:	681b      	ldr	r3, [r3, #0]
 801a25e:	60fb      	str	r3, [r7, #12]
    /* create new struct mem which is moved directly after the shrinked mem */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 801a260:	69fa      	ldr	r2, [r7, #28]
 801a262:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a264:	4413      	add	r3, r2
 801a266:	330c      	adds	r3, #12
 801a268:	613b      	str	r3, [r7, #16]
    if (lfree == mem2) {
 801a26a:	4b3f      	ldr	r3, [pc, #252]	@ (801a368 <mem_trim+0x200>)
 801a26c:	681b      	ldr	r3, [r3, #0]
 801a26e:	697a      	ldr	r2, [r7, #20]
 801a270:	429a      	cmp	r2, r3
 801a272:	d105      	bne.n	801a280 <mem_trim+0x118>
      lfree = ptr_to_mem(ptr2);
 801a274:	6938      	ldr	r0, [r7, #16]
 801a276:	f7ff fd99 	bl	8019dac <ptr_to_mem>
 801a27a:	4603      	mov	r3, r0
 801a27c:	4a3a      	ldr	r2, [pc, #232]	@ (801a368 <mem_trim+0x200>)
 801a27e:	6013      	str	r3, [r2, #0]
    }
    mem2 = ptr_to_mem(ptr2);
 801a280:	6938      	ldr	r0, [r7, #16]
 801a282:	f7ff fd93 	bl	8019dac <ptr_to_mem>
 801a286:	6178      	str	r0, [r7, #20]
    mem2->used = 0;
 801a288:	697b      	ldr	r3, [r7, #20]
 801a28a:	2200      	movs	r2, #0
 801a28c:	721a      	strb	r2, [r3, #8]
    /* restore the next pointer */
    mem2->next = next;
 801a28e:	697b      	ldr	r3, [r7, #20]
 801a290:	68fa      	ldr	r2, [r7, #12]
 801a292:	601a      	str	r2, [r3, #0]
    /* link it back to mem */
    mem2->prev = ptr;
 801a294:	697b      	ldr	r3, [r7, #20]
 801a296:	69fa      	ldr	r2, [r7, #28]
 801a298:	605a      	str	r2, [r3, #4]
    /* link mem to it */
    mem->next = ptr2;
 801a29a:	6a3b      	ldr	r3, [r7, #32]
 801a29c:	693a      	ldr	r2, [r7, #16]
 801a29e:	601a      	str	r2, [r3, #0]
    /* last thing to restore linked list: as we have moved mem2,
     * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not
     * the end of the heap */
    if (mem2->next != MEM_SIZE_ALIGNED) {
 801a2a0:	697b      	ldr	r3, [r7, #20]
 801a2a2:	681b      	ldr	r3, [r3, #0]
 801a2a4:	4a27      	ldr	r2, [pc, #156]	@ (801a344 <mem_trim+0x1dc>)
 801a2a6:	4293      	cmp	r3, r2
 801a2a8:	d044      	beq.n	801a334 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 801a2aa:	697b      	ldr	r3, [r7, #20]
 801a2ac:	681b      	ldr	r3, [r3, #0]
 801a2ae:	4618      	mov	r0, r3
 801a2b0:	f7ff fd7c 	bl	8019dac <ptr_to_mem>
 801a2b4:	4602      	mov	r2, r0
 801a2b6:	693b      	ldr	r3, [r7, #16]
 801a2b8:	6053      	str	r3, [r2, #4]
 801a2ba:	e03b      	b.n	801a334 <mem_trim+0x1cc>
    }
    MEM_STATS_DEC_USED(used, (size - newsize));
    /* no need to plug holes, we've already done that */
  } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) {
 801a2bc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a2be:	3318      	adds	r3, #24
 801a2c0:	69ba      	ldr	r2, [r7, #24]
 801a2c2:	429a      	cmp	r2, r3
 801a2c4:	d336      	bcc.n	801a334 <mem_trim+0x1cc>
     * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem
     * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED').
     * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
     *       region that couldn't hold data, but when mem->next gets freed,
     *       the 2 regions would be combined, resulting in more free memory */
    ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + newsize);
 801a2c6:	69fa      	ldr	r2, [r7, #28]
 801a2c8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a2ca:	4413      	add	r3, r2
 801a2cc:	330c      	adds	r3, #12
 801a2ce:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("invalid next ptr", mem->next != MEM_SIZE_ALIGNED);
 801a2d0:	6a3b      	ldr	r3, [r7, #32]
 801a2d2:	681b      	ldr	r3, [r3, #0]
 801a2d4:	4a1b      	ldr	r2, [pc, #108]	@ (801a344 <mem_trim+0x1dc>)
 801a2d6:	4293      	cmp	r3, r2
 801a2d8:	d106      	bne.n	801a2e8 <mem_trim+0x180>
 801a2da:	4b1d      	ldr	r3, [pc, #116]	@ (801a350 <mem_trim+0x1e8>)
 801a2dc:	f240 3216 	movw	r2, #790	@ 0x316
 801a2e0:	4920      	ldr	r1, [pc, #128]	@ (801a364 <mem_trim+0x1fc>)
 801a2e2:	481d      	ldr	r0, [pc, #116]	@ (801a358 <mem_trim+0x1f0>)
 801a2e4:	f010 fbba 	bl	802aa5c <iprintf>
    mem2 = ptr_to_mem(ptr2);
 801a2e8:	6938      	ldr	r0, [r7, #16]
 801a2ea:	f7ff fd5f 	bl	8019dac <ptr_to_mem>
 801a2ee:	6178      	str	r0, [r7, #20]
    if (mem2 < lfree) {
 801a2f0:	4b1d      	ldr	r3, [pc, #116]	@ (801a368 <mem_trim+0x200>)
 801a2f2:	681b      	ldr	r3, [r3, #0]
 801a2f4:	697a      	ldr	r2, [r7, #20]
 801a2f6:	429a      	cmp	r2, r3
 801a2f8:	d202      	bcs.n	801a300 <mem_trim+0x198>
      lfree = mem2;
 801a2fa:	4a1b      	ldr	r2, [pc, #108]	@ (801a368 <mem_trim+0x200>)
 801a2fc:	697b      	ldr	r3, [r7, #20]
 801a2fe:	6013      	str	r3, [r2, #0]
    }
    mem2->used = 0;
 801a300:	697b      	ldr	r3, [r7, #20]
 801a302:	2200      	movs	r2, #0
 801a304:	721a      	strb	r2, [r3, #8]
    mem2->next = mem->next;
 801a306:	6a3b      	ldr	r3, [r7, #32]
 801a308:	681a      	ldr	r2, [r3, #0]
 801a30a:	697b      	ldr	r3, [r7, #20]
 801a30c:	601a      	str	r2, [r3, #0]
    mem2->prev = ptr;
 801a30e:	697b      	ldr	r3, [r7, #20]
 801a310:	69fa      	ldr	r2, [r7, #28]
 801a312:	605a      	str	r2, [r3, #4]
    mem->next = ptr2;
 801a314:	6a3b      	ldr	r3, [r7, #32]
 801a316:	693a      	ldr	r2, [r7, #16]
 801a318:	601a      	str	r2, [r3, #0]
    if (mem2->next != MEM_SIZE_ALIGNED) {
 801a31a:	697b      	ldr	r3, [r7, #20]
 801a31c:	681b      	ldr	r3, [r3, #0]
 801a31e:	4a09      	ldr	r2, [pc, #36]	@ (801a344 <mem_trim+0x1dc>)
 801a320:	4293      	cmp	r3, r2
 801a322:	d007      	beq.n	801a334 <mem_trim+0x1cc>
      ptr_to_mem(mem2->next)->prev = ptr2;
 801a324:	697b      	ldr	r3, [r7, #20]
 801a326:	681b      	ldr	r3, [r3, #0]
 801a328:	4618      	mov	r0, r3
 801a32a:	f7ff fd3f 	bl	8019dac <ptr_to_mem>
 801a32e:	4602      	mov	r2, r0
 801a330:	693b      	ldr	r3, [r7, #16]
 801a332:	6053      	str	r3, [r2, #4]
#endif
  MEM_SANITY();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_FREE_UNPROTECT();
 801a334:	480a      	ldr	r0, [pc, #40]	@ (801a360 <mem_trim+0x1f8>)
 801a336:	f00d f8ce 	bl	80274d6 <sys_mutex_unlock>
  return rmem;
 801a33a:	687b      	ldr	r3, [r7, #4]
}
 801a33c:	4618      	mov	r0, r3
 801a33e:	3728      	adds	r7, #40	@ 0x28
 801a340:	46bd      	mov	sp, r7
 801a342:	bd80      	pop	{r7, pc}
 801a344:	0001ffe8 	.word	0x0001ffe8
 801a348:	24024470 	.word	0x24024470
 801a34c:	24024474 	.word	0x24024474
 801a350:	0802ecf4 	.word	0x0802ecf4
 801a354:	0802ee80 	.word	0x0802ee80
 801a358:	0802ed3c 	.word	0x0802ed3c
 801a35c:	0802ee98 	.word	0x0802ee98
 801a360:	24024478 	.word	0x24024478
 801a364:	0802eeb8 	.word	0x0802eeb8
 801a368:	2402447c 	.word	0x2402447c

0801a36c <mem_malloc>:
 *
 * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT).
 */
void *
mem_malloc(mem_size_t size_in)
{
 801a36c:	b580      	push	{r7, lr}
 801a36e:	b088      	sub	sp, #32
 801a370:	af00      	add	r7, sp, #0
 801a372:	6078      	str	r0, [r7, #4]
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
  u8_t local_mem_free_count = 0;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  LWIP_MEM_ALLOC_DECL_PROTECT();

  if (size_in == 0) {
 801a374:	687b      	ldr	r3, [r7, #4]
 801a376:	2b00      	cmp	r3, #0
 801a378:	d101      	bne.n	801a37e <mem_malloc+0x12>
    return NULL;
 801a37a:	2300      	movs	r3, #0
 801a37c:	e0d9      	b.n	801a532 <mem_malloc+0x1c6>
  }

  /* Expand the size of the allocated memory region so that we can
     adjust for alignment. */
  size = (mem_size_t)LWIP_MEM_ALIGN_SIZE(size_in);
 801a37e:	687b      	ldr	r3, [r7, #4]
 801a380:	3303      	adds	r3, #3
 801a382:	f023 0303 	bic.w	r3, r3, #3
 801a386:	61bb      	str	r3, [r7, #24]
  if (size < MIN_SIZE_ALIGNED) {
 801a388:	69bb      	ldr	r3, [r7, #24]
 801a38a:	2b0b      	cmp	r3, #11
 801a38c:	d801      	bhi.n	801a392 <mem_malloc+0x26>
    /* every data block must be at least MIN_SIZE_ALIGNED long */
    size = MIN_SIZE_ALIGNED;
 801a38e:	230c      	movs	r3, #12
 801a390:	61bb      	str	r3, [r7, #24]
  }
#if MEM_OVERFLOW_CHECK
  size += MEM_SANITY_REGION_BEFORE_ALIGNED + MEM_SANITY_REGION_AFTER_ALIGNED;
#endif
  if ((size > MEM_SIZE_ALIGNED) || (size < size_in)) {
 801a392:	69bb      	ldr	r3, [r7, #24]
 801a394:	4a69      	ldr	r2, [pc, #420]	@ (801a53c <mem_malloc+0x1d0>)
 801a396:	4293      	cmp	r3, r2
 801a398:	d803      	bhi.n	801a3a2 <mem_malloc+0x36>
 801a39a:	69ba      	ldr	r2, [r7, #24]
 801a39c:	687b      	ldr	r3, [r7, #4]
 801a39e:	429a      	cmp	r2, r3
 801a3a0:	d201      	bcs.n	801a3a6 <mem_malloc+0x3a>
    return NULL;
 801a3a2:	2300      	movs	r3, #0
 801a3a4:	e0c5      	b.n	801a532 <mem_malloc+0x1c6>
  }

  /* protect the heap from concurrent access */
  sys_mutex_lock(&mem_mutex);
 801a3a6:	4866      	ldr	r0, [pc, #408]	@ (801a540 <mem_malloc+0x1d4>)
 801a3a8:	f00d f886 	bl	80274b8 <sys_mutex_lock>
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

    /* Scan through the heap searching for a free block that is big enough,
     * beginning with the lowest free block.
     */
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 801a3ac:	4b65      	ldr	r3, [pc, #404]	@ (801a544 <mem_malloc+0x1d8>)
 801a3ae:	681b      	ldr	r3, [r3, #0]
 801a3b0:	4618      	mov	r0, r3
 801a3b2:	f7ff fd0b 	bl	8019dcc <mem_to_ptr>
 801a3b6:	61f8      	str	r0, [r7, #28]
 801a3b8:	e0b0      	b.n	801a51c <mem_malloc+0x1b0>
         ptr = ptr_to_mem(ptr)->next) {
      mem = ptr_to_mem(ptr);
 801a3ba:	69f8      	ldr	r0, [r7, #28]
 801a3bc:	f7ff fcf6 	bl	8019dac <ptr_to_mem>
 801a3c0:	6138      	str	r0, [r7, #16]
        local_mem_free_count = 1;
        break;
      }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */

      if ((!mem->used) &&
 801a3c2:	693b      	ldr	r3, [r7, #16]
 801a3c4:	7a1b      	ldrb	r3, [r3, #8]
 801a3c6:	2b00      	cmp	r3, #0
 801a3c8:	f040 80a2 	bne.w	801a510 <mem_malloc+0x1a4>
          (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) {
 801a3cc:	693b      	ldr	r3, [r7, #16]
 801a3ce:	681a      	ldr	r2, [r3, #0]
 801a3d0:	69fb      	ldr	r3, [r7, #28]
 801a3d2:	1ad3      	subs	r3, r2, r3
 801a3d4:	3b0c      	subs	r3, #12
      if ((!mem->used) &&
 801a3d6:	69ba      	ldr	r2, [r7, #24]
 801a3d8:	429a      	cmp	r2, r3
 801a3da:	f200 8099 	bhi.w	801a510 <mem_malloc+0x1a4>
        /* mem is not used and at least perfect fit is possible:
         * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */

        if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) {
 801a3de:	693b      	ldr	r3, [r7, #16]
 801a3e0:	681a      	ldr	r2, [r3, #0]
 801a3e2:	69fb      	ldr	r3, [r7, #28]
 801a3e4:	1ad3      	subs	r3, r2, r3
 801a3e6:	f1a3 020c 	sub.w	r2, r3, #12
 801a3ea:	69bb      	ldr	r3, [r7, #24]
 801a3ec:	3318      	adds	r3, #24
 801a3ee:	429a      	cmp	r2, r3
 801a3f0:	d331      	bcc.n	801a456 <mem_malloc+0xea>
           * struct mem would fit in but no data between mem2 and mem2->next
           * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
           *       region that couldn't hold data, but when mem->next gets freed,
           *       the 2 regions would be combined, resulting in more free memory
           */
          ptr2 = (mem_size_t)(ptr + SIZEOF_STRUCT_MEM + size);
 801a3f2:	69fa      	ldr	r2, [r7, #28]
 801a3f4:	69bb      	ldr	r3, [r7, #24]
 801a3f6:	4413      	add	r3, r2
 801a3f8:	330c      	adds	r3, #12
 801a3fa:	60fb      	str	r3, [r7, #12]
          LWIP_ASSERT("invalid next ptr",ptr2 != MEM_SIZE_ALIGNED);
 801a3fc:	68fb      	ldr	r3, [r7, #12]
 801a3fe:	4a4f      	ldr	r2, [pc, #316]	@ (801a53c <mem_malloc+0x1d0>)
 801a400:	4293      	cmp	r3, r2
 801a402:	d106      	bne.n	801a412 <mem_malloc+0xa6>
 801a404:	4b50      	ldr	r3, [pc, #320]	@ (801a548 <mem_malloc+0x1dc>)
 801a406:	f240 3287 	movw	r2, #903	@ 0x387
 801a40a:	4950      	ldr	r1, [pc, #320]	@ (801a54c <mem_malloc+0x1e0>)
 801a40c:	4850      	ldr	r0, [pc, #320]	@ (801a550 <mem_malloc+0x1e4>)
 801a40e:	f010 fb25 	bl	802aa5c <iprintf>
          /* create mem2 struct */
          mem2 = ptr_to_mem(ptr2);
 801a412:	68f8      	ldr	r0, [r7, #12]
 801a414:	f7ff fcca 	bl	8019dac <ptr_to_mem>
 801a418:	60b8      	str	r0, [r7, #8]
          mem2->used = 0;
 801a41a:	68bb      	ldr	r3, [r7, #8]
 801a41c:	2200      	movs	r2, #0
 801a41e:	721a      	strb	r2, [r3, #8]
          mem2->next = mem->next;
 801a420:	693b      	ldr	r3, [r7, #16]
 801a422:	681a      	ldr	r2, [r3, #0]
 801a424:	68bb      	ldr	r3, [r7, #8]
 801a426:	601a      	str	r2, [r3, #0]
          mem2->prev = ptr;
 801a428:	68bb      	ldr	r3, [r7, #8]
 801a42a:	69fa      	ldr	r2, [r7, #28]
 801a42c:	605a      	str	r2, [r3, #4]
          /* and insert it between mem and mem->next */
          mem->next = ptr2;
 801a42e:	693b      	ldr	r3, [r7, #16]
 801a430:	68fa      	ldr	r2, [r7, #12]
 801a432:	601a      	str	r2, [r3, #0]
          mem->used = 1;
 801a434:	693b      	ldr	r3, [r7, #16]
 801a436:	2201      	movs	r2, #1
 801a438:	721a      	strb	r2, [r3, #8]

          if (mem2->next != MEM_SIZE_ALIGNED) {
 801a43a:	68bb      	ldr	r3, [r7, #8]
 801a43c:	681b      	ldr	r3, [r3, #0]
 801a43e:	4a3f      	ldr	r2, [pc, #252]	@ (801a53c <mem_malloc+0x1d0>)
 801a440:	4293      	cmp	r3, r2
 801a442:	d00b      	beq.n	801a45c <mem_malloc+0xf0>
            ptr_to_mem(mem2->next)->prev = ptr2;
 801a444:	68bb      	ldr	r3, [r7, #8]
 801a446:	681b      	ldr	r3, [r3, #0]
 801a448:	4618      	mov	r0, r3
 801a44a:	f7ff fcaf 	bl	8019dac <ptr_to_mem>
 801a44e:	4602      	mov	r2, r0
 801a450:	68fb      	ldr	r3, [r7, #12]
 801a452:	6053      	str	r3, [r2, #4]
 801a454:	e002      	b.n	801a45c <mem_malloc+0xf0>
           * take care of this).
           * -> near fit or exact fit: do not split, no mem2 creation
           * also can't move mem->next directly behind mem, since mem->next
           * will always be used at this point!
           */
          mem->used = 1;
 801a456:	693b      	ldr	r3, [r7, #16]
 801a458:	2201      	movs	r2, #1
 801a45a:	721a      	strb	r2, [r3, #8]
          MEM_STATS_INC_USED(used, mem->next - mem_to_ptr(mem));
        }
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_malloc_adjust_lfree:
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
        if (mem == lfree) {
 801a45c:	4b39      	ldr	r3, [pc, #228]	@ (801a544 <mem_malloc+0x1d8>)
 801a45e:	681b      	ldr	r3, [r3, #0]
 801a460:	693a      	ldr	r2, [r7, #16]
 801a462:	429a      	cmp	r2, r3
 801a464:	d127      	bne.n	801a4b6 <mem_malloc+0x14a>
          struct mem *cur = lfree;
 801a466:	4b37      	ldr	r3, [pc, #220]	@ (801a544 <mem_malloc+0x1d8>)
 801a468:	681b      	ldr	r3, [r3, #0]
 801a46a:	617b      	str	r3, [r7, #20]
          /* Find next free block after mem and update lowest free pointer */
          while (cur->used && cur != ram_end) {
 801a46c:	e005      	b.n	801a47a <mem_malloc+0x10e>
              /* If mem_free or mem_trim have run, we have to restart since they
                 could have altered our current struct mem or lfree. */
              goto mem_malloc_adjust_lfree;
            }
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
            cur = ptr_to_mem(cur->next);
 801a46e:	697b      	ldr	r3, [r7, #20]
 801a470:	681b      	ldr	r3, [r3, #0]
 801a472:	4618      	mov	r0, r3
 801a474:	f7ff fc9a 	bl	8019dac <ptr_to_mem>
 801a478:	6178      	str	r0, [r7, #20]
          while (cur->used && cur != ram_end) {
 801a47a:	697b      	ldr	r3, [r7, #20]
 801a47c:	7a1b      	ldrb	r3, [r3, #8]
 801a47e:	2b00      	cmp	r3, #0
 801a480:	d004      	beq.n	801a48c <mem_malloc+0x120>
 801a482:	4b34      	ldr	r3, [pc, #208]	@ (801a554 <mem_malloc+0x1e8>)
 801a484:	681b      	ldr	r3, [r3, #0]
 801a486:	697a      	ldr	r2, [r7, #20]
 801a488:	429a      	cmp	r2, r3
 801a48a:	d1f0      	bne.n	801a46e <mem_malloc+0x102>
          }
          lfree = cur;
 801a48c:	4a2d      	ldr	r2, [pc, #180]	@ (801a544 <mem_malloc+0x1d8>)
 801a48e:	697b      	ldr	r3, [r7, #20]
 801a490:	6013      	str	r3, [r2, #0]
          LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used)));
 801a492:	4b2c      	ldr	r3, [pc, #176]	@ (801a544 <mem_malloc+0x1d8>)
 801a494:	681a      	ldr	r2, [r3, #0]
 801a496:	4b2f      	ldr	r3, [pc, #188]	@ (801a554 <mem_malloc+0x1e8>)
 801a498:	681b      	ldr	r3, [r3, #0]
 801a49a:	429a      	cmp	r2, r3
 801a49c:	d00b      	beq.n	801a4b6 <mem_malloc+0x14a>
 801a49e:	4b29      	ldr	r3, [pc, #164]	@ (801a544 <mem_malloc+0x1d8>)
 801a4a0:	681b      	ldr	r3, [r3, #0]
 801a4a2:	7a1b      	ldrb	r3, [r3, #8]
 801a4a4:	2b00      	cmp	r3, #0
 801a4a6:	d006      	beq.n	801a4b6 <mem_malloc+0x14a>
 801a4a8:	4b27      	ldr	r3, [pc, #156]	@ (801a548 <mem_malloc+0x1dc>)
 801a4aa:	f240 32b5 	movw	r2, #949	@ 0x3b5
 801a4ae:	492a      	ldr	r1, [pc, #168]	@ (801a558 <mem_malloc+0x1ec>)
 801a4b0:	4827      	ldr	r0, [pc, #156]	@ (801a550 <mem_malloc+0x1e4>)
 801a4b2:	f010 fad3 	bl	802aa5c <iprintf>
        }
        LWIP_MEM_ALLOC_UNPROTECT();
        sys_mutex_unlock(&mem_mutex);
 801a4b6:	4822      	ldr	r0, [pc, #136]	@ (801a540 <mem_malloc+0x1d4>)
 801a4b8:	f00d f80d 	bl	80274d6 <sys_mutex_unlock>
        LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.",
 801a4bc:	693a      	ldr	r2, [r7, #16]
 801a4be:	69bb      	ldr	r3, [r7, #24]
 801a4c0:	4413      	add	r3, r2
 801a4c2:	330c      	adds	r3, #12
 801a4c4:	4a23      	ldr	r2, [pc, #140]	@ (801a554 <mem_malloc+0x1e8>)
 801a4c6:	6812      	ldr	r2, [r2, #0]
 801a4c8:	4293      	cmp	r3, r2
 801a4ca:	d906      	bls.n	801a4da <mem_malloc+0x16e>
 801a4cc:	4b1e      	ldr	r3, [pc, #120]	@ (801a548 <mem_malloc+0x1dc>)
 801a4ce:	f240 32b9 	movw	r2, #953	@ 0x3b9
 801a4d2:	4922      	ldr	r1, [pc, #136]	@ (801a55c <mem_malloc+0x1f0>)
 801a4d4:	481e      	ldr	r0, [pc, #120]	@ (801a550 <mem_malloc+0x1e4>)
 801a4d6:	f010 fac1 	bl	802aa5c <iprintf>
                    (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end);
        LWIP_ASSERT("mem_malloc: allocated memory properly aligned.",
 801a4da:	693b      	ldr	r3, [r7, #16]
 801a4dc:	f003 0303 	and.w	r3, r3, #3
 801a4e0:	2b00      	cmp	r3, #0
 801a4e2:	d006      	beq.n	801a4f2 <mem_malloc+0x186>
 801a4e4:	4b18      	ldr	r3, [pc, #96]	@ (801a548 <mem_malloc+0x1dc>)
 801a4e6:	f240 32bb 	movw	r2, #955	@ 0x3bb
 801a4ea:	491d      	ldr	r1, [pc, #116]	@ (801a560 <mem_malloc+0x1f4>)
 801a4ec:	4818      	ldr	r0, [pc, #96]	@ (801a550 <mem_malloc+0x1e4>)
 801a4ee:	f010 fab5 	bl	802aa5c <iprintf>
                    ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0);
        LWIP_ASSERT("mem_malloc: sanity check alignment",
 801a4f2:	693b      	ldr	r3, [r7, #16]
 801a4f4:	f003 0303 	and.w	r3, r3, #3
 801a4f8:	2b00      	cmp	r3, #0
 801a4fa:	d006      	beq.n	801a50a <mem_malloc+0x19e>
 801a4fc:	4b12      	ldr	r3, [pc, #72]	@ (801a548 <mem_malloc+0x1dc>)
 801a4fe:	f240 32bd 	movw	r2, #957	@ 0x3bd
 801a502:	4918      	ldr	r1, [pc, #96]	@ (801a564 <mem_malloc+0x1f8>)
 801a504:	4812      	ldr	r0, [pc, #72]	@ (801a550 <mem_malloc+0x1e4>)
 801a506:	f010 faa9 	bl	802aa5c <iprintf>

#if MEM_OVERFLOW_CHECK
        mem_overflow_init_element(mem, size_in);
#endif
        MEM_SANITY();
        return (u8_t *)mem + SIZEOF_STRUCT_MEM + MEM_SANITY_OFFSET;
 801a50a:	693b      	ldr	r3, [r7, #16]
 801a50c:	330c      	adds	r3, #12
 801a50e:	e010      	b.n	801a532 <mem_malloc+0x1c6>
         ptr = ptr_to_mem(ptr)->next) {
 801a510:	69f8      	ldr	r0, [r7, #28]
 801a512:	f7ff fc4b 	bl	8019dac <ptr_to_mem>
 801a516:	4603      	mov	r3, r0
 801a518:	681b      	ldr	r3, [r3, #0]
 801a51a:	61fb      	str	r3, [r7, #28]
    for (ptr = mem_to_ptr(lfree); ptr < MEM_SIZE_ALIGNED - size;
 801a51c:	69ba      	ldr	r2, [r7, #24]
 801a51e:	4b07      	ldr	r3, [pc, #28]	@ (801a53c <mem_malloc+0x1d0>)
 801a520:	1a9b      	subs	r3, r3, r2
 801a522:	69fa      	ldr	r2, [r7, #28]
 801a524:	429a      	cmp	r2, r3
 801a526:	f4ff af48 	bcc.w	801a3ba <mem_malloc+0x4e>
    /* if we got interrupted by a mem_free, try again */
  } while (local_mem_free_count != 0);
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
  MEM_STATS_INC(err);
  LWIP_MEM_ALLOC_UNPROTECT();
  sys_mutex_unlock(&mem_mutex);
 801a52a:	4805      	ldr	r0, [pc, #20]	@ (801a540 <mem_malloc+0x1d4>)
 801a52c:	f00c ffd3 	bl	80274d6 <sys_mutex_unlock>
  LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size));
  return NULL;
 801a530:	2300      	movs	r3, #0
}
 801a532:	4618      	mov	r0, r3
 801a534:	3720      	adds	r7, #32
 801a536:	46bd      	mov	sp, r7
 801a538:	bd80      	pop	{r7, pc}
 801a53a:	bf00      	nop
 801a53c:	0001ffe8 	.word	0x0001ffe8
 801a540:	24024478 	.word	0x24024478
 801a544:	2402447c 	.word	0x2402447c
 801a548:	0802ecf4 	.word	0x0802ecf4
 801a54c:	0802eeb8 	.word	0x0802eeb8
 801a550:	0802ed3c 	.word	0x0802ed3c
 801a554:	24024474 	.word	0x24024474
 801a558:	0802eecc 	.word	0x0802eecc
 801a55c:	0802eee8 	.word	0x0802eee8
 801a560:	0802ef18 	.word	0x0802ef18
 801a564:	0802ef48 	.word	0x0802ef48

0801a568 <memp_init_pool>:
 *
 * @param desc pool to initialize
 */
void
memp_init_pool(const struct memp_desc *desc)
{
 801a568:	b480      	push	{r7}
 801a56a:	b085      	sub	sp, #20
 801a56c:	af00      	add	r7, sp, #0
 801a56e:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(desc);
#else
  int i;
  struct memp *memp;

  *desc->tab = NULL;
 801a570:	687b      	ldr	r3, [r7, #4]
 801a572:	68db      	ldr	r3, [r3, #12]
 801a574:	2200      	movs	r2, #0
 801a576:	601a      	str	r2, [r3, #0]
  memp = (struct memp *)LWIP_MEM_ALIGN(desc->base);
 801a578:	687b      	ldr	r3, [r7, #4]
 801a57a:	689b      	ldr	r3, [r3, #8]
 801a57c:	3303      	adds	r3, #3
 801a57e:	f023 0303 	bic.w	r3, r3, #3
 801a582:	60bb      	str	r3, [r7, #8]
                                       + MEM_SANITY_REGION_AFTER_ALIGNED
#endif
                                      ));
#endif
  /* create a linked list of memp elements */
  for (i = 0; i < desc->num; ++i) {
 801a584:	2300      	movs	r3, #0
 801a586:	60fb      	str	r3, [r7, #12]
 801a588:	e011      	b.n	801a5ae <memp_init_pool+0x46>
    memp->next = *desc->tab;
 801a58a:	687b      	ldr	r3, [r7, #4]
 801a58c:	68db      	ldr	r3, [r3, #12]
 801a58e:	681a      	ldr	r2, [r3, #0]
 801a590:	68bb      	ldr	r3, [r7, #8]
 801a592:	601a      	str	r2, [r3, #0]
    *desc->tab = memp;
 801a594:	687b      	ldr	r3, [r7, #4]
 801a596:	68db      	ldr	r3, [r3, #12]
 801a598:	68ba      	ldr	r2, [r7, #8]
 801a59a:	601a      	str	r2, [r3, #0]
#if MEMP_OVERFLOW_CHECK
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */
    /* cast through void* to get rid of alignment warnings */
    memp = (struct memp *)(void *)((u8_t *)memp + MEMP_SIZE + desc->size
 801a59c:	687b      	ldr	r3, [r7, #4]
 801a59e:	889b      	ldrh	r3, [r3, #4]
 801a5a0:	461a      	mov	r2, r3
 801a5a2:	68bb      	ldr	r3, [r7, #8]
 801a5a4:	4413      	add	r3, r2
 801a5a6:	60bb      	str	r3, [r7, #8]
  for (i = 0; i < desc->num; ++i) {
 801a5a8:	68fb      	ldr	r3, [r7, #12]
 801a5aa:	3301      	adds	r3, #1
 801a5ac:	60fb      	str	r3, [r7, #12]
 801a5ae:	687b      	ldr	r3, [r7, #4]
 801a5b0:	88db      	ldrh	r3, [r3, #6]
 801a5b2:	461a      	mov	r2, r3
 801a5b4:	68fb      	ldr	r3, [r7, #12]
 801a5b6:	4293      	cmp	r3, r2
 801a5b8:	dbe7      	blt.n	801a58a <memp_init_pool+0x22>
#endif /* !MEMP_MEM_MALLOC */

#if MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY)
  desc->stats->name  = desc->desc;
#endif /* MEMP_STATS && (defined(LWIP_DEBUG) || LWIP_STATS_DISPLAY) */
}
 801a5ba:	bf00      	nop
 801a5bc:	bf00      	nop
 801a5be:	3714      	adds	r7, #20
 801a5c0:	46bd      	mov	sp, r7
 801a5c2:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a5c6:	4770      	bx	lr

0801a5c8 <memp_init>:
 *
 * Carves out memp_memory into linked lists for each pool-type.
 */
void
memp_init(void)
{
 801a5c8:	b580      	push	{r7, lr}
 801a5ca:	b082      	sub	sp, #8
 801a5cc:	af00      	add	r7, sp, #0
  u16_t i;

  /* for every pool: */
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 801a5ce:	2300      	movs	r3, #0
 801a5d0:	80fb      	strh	r3, [r7, #6]
 801a5d2:	e009      	b.n	801a5e8 <memp_init+0x20>
    memp_init_pool(memp_pools[i]);
 801a5d4:	88fb      	ldrh	r3, [r7, #6]
 801a5d6:	4a08      	ldr	r2, [pc, #32]	@ (801a5f8 <memp_init+0x30>)
 801a5d8:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801a5dc:	4618      	mov	r0, r3
 801a5de:	f7ff ffc3 	bl	801a568 <memp_init_pool>
  for (i = 0; i < LWIP_ARRAYSIZE(memp_pools); i++) {
 801a5e2:	88fb      	ldrh	r3, [r7, #6]
 801a5e4:	3301      	adds	r3, #1
 801a5e6:	80fb      	strh	r3, [r7, #6]
 801a5e8:	88fb      	ldrh	r3, [r7, #6]
 801a5ea:	2b0c      	cmp	r3, #12
 801a5ec:	d9f2      	bls.n	801a5d4 <memp_init+0xc>

#if MEMP_OVERFLOW_CHECK >= 2
  /* check everything a first time to see if it worked */
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */
}
 801a5ee:	bf00      	nop
 801a5f0:	bf00      	nop
 801a5f2:	3708      	adds	r7, #8
 801a5f4:	46bd      	mov	sp, r7
 801a5f6:	bd80      	pop	{r7, pc}
 801a5f8:	08031e74 	.word	0x08031e74

0801a5fc <do_memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
do_memp_malloc_pool(const struct memp_desc *desc)
#else
do_memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 801a5fc:	b580      	push	{r7, lr}
 801a5fe:	b084      	sub	sp, #16
 801a600:	af00      	add	r7, sp, #0
 801a602:	6078      	str	r0, [r7, #4]

#if MEMP_MEM_MALLOC
  memp = (struct memp *)mem_malloc(MEMP_SIZE + MEMP_ALIGN_SIZE(desc->size));
  SYS_ARCH_PROTECT(old_level);
#else /* MEMP_MEM_MALLOC */
  SYS_ARCH_PROTECT(old_level);
 801a604:	f00c ff94 	bl	8027530 <sys_arch_protect>
 801a608:	60f8      	str	r0, [r7, #12]

  memp = *desc->tab;
 801a60a:	687b      	ldr	r3, [r7, #4]
 801a60c:	68db      	ldr	r3, [r3, #12]
 801a60e:	681b      	ldr	r3, [r3, #0]
 801a610:	60bb      	str	r3, [r7, #8]
#endif /* MEMP_MEM_MALLOC */

  if (memp != NULL) {
 801a612:	68bb      	ldr	r3, [r7, #8]
 801a614:	2b00      	cmp	r3, #0
 801a616:	d015      	beq.n	801a644 <do_memp_malloc_pool+0x48>
#if !MEMP_MEM_MALLOC
#if MEMP_OVERFLOW_CHECK == 1
    memp_overflow_check_element(memp, desc);
#endif /* MEMP_OVERFLOW_CHECK */

    *desc->tab = memp->next;
 801a618:	687b      	ldr	r3, [r7, #4]
 801a61a:	68db      	ldr	r3, [r3, #12]
 801a61c:	68ba      	ldr	r2, [r7, #8]
 801a61e:	6812      	ldr	r2, [r2, #0]
 801a620:	601a      	str	r2, [r3, #0]
    memp->line = line;
#if MEMP_MEM_MALLOC
    memp_overflow_init_element(memp, desc);
#endif /* MEMP_MEM_MALLOC */
#endif /* MEMP_OVERFLOW_CHECK */
    LWIP_ASSERT("memp_malloc: memp properly aligned",
 801a622:	68bb      	ldr	r3, [r7, #8]
 801a624:	f003 0303 	and.w	r3, r3, #3
 801a628:	2b00      	cmp	r3, #0
 801a62a:	d006      	beq.n	801a63a <do_memp_malloc_pool+0x3e>
 801a62c:	4b09      	ldr	r3, [pc, #36]	@ (801a654 <do_memp_malloc_pool+0x58>)
 801a62e:	f44f 728c 	mov.w	r2, #280	@ 0x118
 801a632:	4909      	ldr	r1, [pc, #36]	@ (801a658 <do_memp_malloc_pool+0x5c>)
 801a634:	4809      	ldr	r0, [pc, #36]	@ (801a65c <do_memp_malloc_pool+0x60>)
 801a636:	f010 fa11 	bl	802aa5c <iprintf>
    desc->stats->used++;
    if (desc->stats->used > desc->stats->max) {
      desc->stats->max = desc->stats->used;
    }
#endif
    SYS_ARCH_UNPROTECT(old_level);
 801a63a:	68f8      	ldr	r0, [r7, #12]
 801a63c:	f00c ff86 	bl	802754c <sys_arch_unprotect>
    /* cast through u8_t* to get rid of alignment warnings */
    return ((u8_t *)memp + MEMP_SIZE);
 801a640:	68bb      	ldr	r3, [r7, #8]
 801a642:	e003      	b.n	801a64c <do_memp_malloc_pool+0x50>
  } else {
#if MEMP_STATS
    desc->stats->err++;
#endif
    SYS_ARCH_UNPROTECT(old_level);
 801a644:	68f8      	ldr	r0, [r7, #12]
 801a646:	f00c ff81 	bl	802754c <sys_arch_unprotect>
    LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", desc->desc));
  }

  return NULL;
 801a64a:	2300      	movs	r3, #0
}
 801a64c:	4618      	mov	r0, r3
 801a64e:	3710      	adds	r7, #16
 801a650:	46bd      	mov	sp, r7
 801a652:	bd80      	pop	{r7, pc}
 801a654:	0802f004 	.word	0x0802f004
 801a658:	0802f034 	.word	0x0802f034
 801a65c:	0802f058 	.word	0x0802f058

0801a660 <memp_malloc_pool>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc_pool(const struct memp_desc *desc)
#else
memp_malloc_pool_fn(const struct memp_desc *desc, const char *file, const int line)
#endif
{
 801a660:	b580      	push	{r7, lr}
 801a662:	b082      	sub	sp, #8
 801a664:	af00      	add	r7, sp, #0
 801a666:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 801a668:	687b      	ldr	r3, [r7, #4]
 801a66a:	2b00      	cmp	r3, #0
 801a66c:	d106      	bne.n	801a67c <memp_malloc_pool+0x1c>
 801a66e:	4b0a      	ldr	r3, [pc, #40]	@ (801a698 <memp_malloc_pool+0x38>)
 801a670:	f44f 729e 	mov.w	r2, #316	@ 0x13c
 801a674:	4909      	ldr	r1, [pc, #36]	@ (801a69c <memp_malloc_pool+0x3c>)
 801a676:	480a      	ldr	r0, [pc, #40]	@ (801a6a0 <memp_malloc_pool+0x40>)
 801a678:	f010 f9f0 	bl	802aa5c <iprintf>
  if (desc == NULL) {
 801a67c:	687b      	ldr	r3, [r7, #4]
 801a67e:	2b00      	cmp	r3, #0
 801a680:	d101      	bne.n	801a686 <memp_malloc_pool+0x26>
    return NULL;
 801a682:	2300      	movs	r3, #0
 801a684:	e003      	b.n	801a68e <memp_malloc_pool+0x2e>
  }

#if !MEMP_OVERFLOW_CHECK
  return do_memp_malloc_pool(desc);
 801a686:	6878      	ldr	r0, [r7, #4]
 801a688:	f7ff ffb8 	bl	801a5fc <do_memp_malloc_pool>
 801a68c:	4603      	mov	r3, r0
#else
  return do_memp_malloc_pool_fn(desc, file, line);
#endif
}
 801a68e:	4618      	mov	r0, r3
 801a690:	3708      	adds	r7, #8
 801a692:	46bd      	mov	sp, r7
 801a694:	bd80      	pop	{r7, pc}
 801a696:	bf00      	nop
 801a698:	0802f004 	.word	0x0802f004
 801a69c:	0802f080 	.word	0x0802f080
 801a6a0:	0802f058 	.word	0x0802f058

0801a6a4 <memp_malloc>:
#if !MEMP_OVERFLOW_CHECK
memp_malloc(memp_t type)
#else
memp_malloc_fn(memp_t type, const char *file, const int line)
#endif
{
 801a6a4:	b580      	push	{r7, lr}
 801a6a6:	b084      	sub	sp, #16
 801a6a8:	af00      	add	r7, sp, #0
 801a6aa:	4603      	mov	r3, r0
 801a6ac:	71fb      	strb	r3, [r7, #7]
  void *memp;
  LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;);
 801a6ae:	79fb      	ldrb	r3, [r7, #7]
 801a6b0:	2b0c      	cmp	r3, #12
 801a6b2:	d908      	bls.n	801a6c6 <memp_malloc+0x22>
 801a6b4:	4b0a      	ldr	r3, [pc, #40]	@ (801a6e0 <memp_malloc+0x3c>)
 801a6b6:	f240 1257 	movw	r2, #343	@ 0x157
 801a6ba:	490a      	ldr	r1, [pc, #40]	@ (801a6e4 <memp_malloc+0x40>)
 801a6bc:	480a      	ldr	r0, [pc, #40]	@ (801a6e8 <memp_malloc+0x44>)
 801a6be:	f010 f9cd 	bl	802aa5c <iprintf>
 801a6c2:	2300      	movs	r3, #0
 801a6c4:	e008      	b.n	801a6d8 <memp_malloc+0x34>
#if MEMP_OVERFLOW_CHECK >= 2
  memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */

#if !MEMP_OVERFLOW_CHECK
  memp = do_memp_malloc_pool(memp_pools[type]);
 801a6c6:	79fb      	ldrb	r3, [r7, #7]
 801a6c8:	4a08      	ldr	r2, [pc, #32]	@ (801a6ec <memp_malloc+0x48>)
 801a6ca:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801a6ce:	4618      	mov	r0, r3
 801a6d0:	f7ff ff94 	bl	801a5fc <do_memp_malloc_pool>
 801a6d4:	60f8      	str	r0, [r7, #12]
#else
  memp = do_memp_malloc_pool_fn(memp_pools[type], file, line);
#endif

  return memp;
 801a6d6:	68fb      	ldr	r3, [r7, #12]
}
 801a6d8:	4618      	mov	r0, r3
 801a6da:	3710      	adds	r7, #16
 801a6dc:	46bd      	mov	sp, r7
 801a6de:	bd80      	pop	{r7, pc}
 801a6e0:	0802f004 	.word	0x0802f004
 801a6e4:	0802f094 	.word	0x0802f094
 801a6e8:	0802f058 	.word	0x0802f058
 801a6ec:	08031e74 	.word	0x08031e74

0801a6f0 <do_memp_free_pool>:

static void
do_memp_free_pool(const struct memp_desc *desc, void *mem)
{
 801a6f0:	b580      	push	{r7, lr}
 801a6f2:	b084      	sub	sp, #16
 801a6f4:	af00      	add	r7, sp, #0
 801a6f6:	6078      	str	r0, [r7, #4]
 801a6f8:	6039      	str	r1, [r7, #0]
  struct memp *memp;
  SYS_ARCH_DECL_PROTECT(old_level);

  LWIP_ASSERT("memp_free: mem properly aligned",
 801a6fa:	683b      	ldr	r3, [r7, #0]
 801a6fc:	f003 0303 	and.w	r3, r3, #3
 801a700:	2b00      	cmp	r3, #0
 801a702:	d006      	beq.n	801a712 <do_memp_free_pool+0x22>
 801a704:	4b0d      	ldr	r3, [pc, #52]	@ (801a73c <do_memp_free_pool+0x4c>)
 801a706:	f44f 72b6 	mov.w	r2, #364	@ 0x16c
 801a70a:	490d      	ldr	r1, [pc, #52]	@ (801a740 <do_memp_free_pool+0x50>)
 801a70c:	480d      	ldr	r0, [pc, #52]	@ (801a744 <do_memp_free_pool+0x54>)
 801a70e:	f010 f9a5 	bl	802aa5c <iprintf>
              ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0);

  /* cast through void* to get rid of alignment warnings */
  memp = (struct memp *)(void *)((u8_t *)mem - MEMP_SIZE);
 801a712:	683b      	ldr	r3, [r7, #0]
 801a714:	60fb      	str	r3, [r7, #12]

  SYS_ARCH_PROTECT(old_level);
 801a716:	f00c ff0b 	bl	8027530 <sys_arch_protect>
 801a71a:	60b8      	str	r0, [r7, #8]
#if MEMP_MEM_MALLOC
  LWIP_UNUSED_ARG(desc);
  SYS_ARCH_UNPROTECT(old_level);
  mem_free(memp);
#else /* MEMP_MEM_MALLOC */
  memp->next = *desc->tab;
 801a71c:	687b      	ldr	r3, [r7, #4]
 801a71e:	68db      	ldr	r3, [r3, #12]
 801a720:	681a      	ldr	r2, [r3, #0]
 801a722:	68fb      	ldr	r3, [r7, #12]
 801a724:	601a      	str	r2, [r3, #0]
  *desc->tab = memp;
 801a726:	687b      	ldr	r3, [r7, #4]
 801a728:	68db      	ldr	r3, [r3, #12]
 801a72a:	68fa      	ldr	r2, [r7, #12]
 801a72c:	601a      	str	r2, [r3, #0]

#if MEMP_SANITY_CHECK
  LWIP_ASSERT("memp sanity", memp_sanity(desc));
#endif /* MEMP_SANITY_CHECK */

  SYS_ARCH_UNPROTECT(old_level);
 801a72e:	68b8      	ldr	r0, [r7, #8]
 801a730:	f00c ff0c 	bl	802754c <sys_arch_unprotect>
#endif /* !MEMP_MEM_MALLOC */
}
 801a734:	bf00      	nop
 801a736:	3710      	adds	r7, #16
 801a738:	46bd      	mov	sp, r7
 801a73a:	bd80      	pop	{r7, pc}
 801a73c:	0802f004 	.word	0x0802f004
 801a740:	0802f0b4 	.word	0x0802f0b4
 801a744:	0802f058 	.word	0x0802f058

0801a748 <memp_free_pool>:
 * @param desc the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free_pool(const struct memp_desc *desc, void *mem)
{
 801a748:	b580      	push	{r7, lr}
 801a74a:	b082      	sub	sp, #8
 801a74c:	af00      	add	r7, sp, #0
 801a74e:	6078      	str	r0, [r7, #4]
 801a750:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("invalid pool desc", desc != NULL);
 801a752:	687b      	ldr	r3, [r7, #4]
 801a754:	2b00      	cmp	r3, #0
 801a756:	d106      	bne.n	801a766 <memp_free_pool+0x1e>
 801a758:	4b0a      	ldr	r3, [pc, #40]	@ (801a784 <memp_free_pool+0x3c>)
 801a75a:	f240 1295 	movw	r2, #405	@ 0x195
 801a75e:	490a      	ldr	r1, [pc, #40]	@ (801a788 <memp_free_pool+0x40>)
 801a760:	480a      	ldr	r0, [pc, #40]	@ (801a78c <memp_free_pool+0x44>)
 801a762:	f010 f97b 	bl	802aa5c <iprintf>
  if ((desc == NULL) || (mem == NULL)) {
 801a766:	687b      	ldr	r3, [r7, #4]
 801a768:	2b00      	cmp	r3, #0
 801a76a:	d007      	beq.n	801a77c <memp_free_pool+0x34>
 801a76c:	683b      	ldr	r3, [r7, #0]
 801a76e:	2b00      	cmp	r3, #0
 801a770:	d004      	beq.n	801a77c <memp_free_pool+0x34>
    return;
  }

  do_memp_free_pool(desc, mem);
 801a772:	6839      	ldr	r1, [r7, #0]
 801a774:	6878      	ldr	r0, [r7, #4]
 801a776:	f7ff ffbb 	bl	801a6f0 <do_memp_free_pool>
 801a77a:	e000      	b.n	801a77e <memp_free_pool+0x36>
    return;
 801a77c:	bf00      	nop
}
 801a77e:	3708      	adds	r7, #8
 801a780:	46bd      	mov	sp, r7
 801a782:	bd80      	pop	{r7, pc}
 801a784:	0802f004 	.word	0x0802f004
 801a788:	0802f080 	.word	0x0802f080
 801a78c:	0802f058 	.word	0x0802f058

0801a790 <memp_free>:
 * @param type the pool where to put mem
 * @param mem the memp element to free
 */
void
memp_free(memp_t type, void *mem)
{
 801a790:	b580      	push	{r7, lr}
 801a792:	b082      	sub	sp, #8
 801a794:	af00      	add	r7, sp, #0
 801a796:	4603      	mov	r3, r0
 801a798:	6039      	str	r1, [r7, #0]
 801a79a:	71fb      	strb	r3, [r7, #7]
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  struct memp *old_first;
#endif

  LWIP_ERROR("memp_free: type < MEMP_MAX", (type < MEMP_MAX), return;);
 801a79c:	79fb      	ldrb	r3, [r7, #7]
 801a79e:	2b0c      	cmp	r3, #12
 801a7a0:	d907      	bls.n	801a7b2 <memp_free+0x22>
 801a7a2:	4b0c      	ldr	r3, [pc, #48]	@ (801a7d4 <memp_free+0x44>)
 801a7a4:	f44f 72d5 	mov.w	r2, #426	@ 0x1aa
 801a7a8:	490b      	ldr	r1, [pc, #44]	@ (801a7d8 <memp_free+0x48>)
 801a7aa:	480c      	ldr	r0, [pc, #48]	@ (801a7dc <memp_free+0x4c>)
 801a7ac:	f010 f956 	bl	802aa5c <iprintf>
 801a7b0:	e00c      	b.n	801a7cc <memp_free+0x3c>

  if (mem == NULL) {
 801a7b2:	683b      	ldr	r3, [r7, #0]
 801a7b4:	2b00      	cmp	r3, #0
 801a7b6:	d008      	beq.n	801a7ca <memp_free+0x3a>

#ifdef LWIP_HOOK_MEMP_AVAILABLE
  old_first = *memp_pools[type]->tab;
#endif

  do_memp_free_pool(memp_pools[type], mem);
 801a7b8:	79fb      	ldrb	r3, [r7, #7]
 801a7ba:	4a09      	ldr	r2, [pc, #36]	@ (801a7e0 <memp_free+0x50>)
 801a7bc:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801a7c0:	6839      	ldr	r1, [r7, #0]
 801a7c2:	4618      	mov	r0, r3
 801a7c4:	f7ff ff94 	bl	801a6f0 <do_memp_free_pool>
 801a7c8:	e000      	b.n	801a7cc <memp_free+0x3c>
    return;
 801a7ca:	bf00      	nop
#ifdef LWIP_HOOK_MEMP_AVAILABLE
  if (old_first == NULL) {
    LWIP_HOOK_MEMP_AVAILABLE(type);
  }
#endif
}
 801a7cc:	3708      	adds	r7, #8
 801a7ce:	46bd      	mov	sp, r7
 801a7d0:	bd80      	pop	{r7, pc}
 801a7d2:	bf00      	nop
 801a7d4:	0802f004 	.word	0x0802f004
 801a7d8:	0802f0d4 	.word	0x0802f0d4
 801a7dc:	0802f058 	.word	0x0802f058
 801a7e0:	08031e74 	.word	0x08031e74

0801a7e4 <netif_init>:
}
#endif /* LWIP_HAVE_LOOPIF */

void
netif_init(void)
{
 801a7e4:	b480      	push	{r7}
 801a7e6:	af00      	add	r7, sp, #0

  netif_set_link_up(&loop_netif);
  netif_set_up(&loop_netif);

#endif /* LWIP_HAVE_LOOPIF */
}
 801a7e8:	bf00      	nop
 801a7ea:	46bd      	mov	sp, r7
 801a7ec:	f85d 7b04 	ldr.w	r7, [sp], #4
 801a7f0:	4770      	bx	lr
	...

0801a7f4 <netif_add>:
netif_add(struct netif *netif,
#if LWIP_IPV4
          const ip4_addr_t *ipaddr, const ip4_addr_t *netmask, const ip4_addr_t *gw,
#endif /* LWIP_IPV4 */
          void *state, netif_init_fn init, netif_input_fn input)
{
 801a7f4:	b580      	push	{r7, lr}
 801a7f6:	b086      	sub	sp, #24
 801a7f8:	af00      	add	r7, sp, #0
 801a7fa:	60f8      	str	r0, [r7, #12]
 801a7fc:	60b9      	str	r1, [r7, #8]
 801a7fe:	607a      	str	r2, [r7, #4]
 801a800:	603b      	str	r3, [r7, #0]
#if LWIP_IPV6
  s8_t i;
#endif

  LWIP_ASSERT_CORE_LOCKED();
 801a802:	f7f6 fcff 	bl	8011204 <sys_check_core_locking>
    LWIP_ASSERT("single netif already set", 0);
    return NULL;
  }
#endif

  LWIP_ERROR("netif_add: invalid netif", netif != NULL, return NULL);
 801a806:	68fb      	ldr	r3, [r7, #12]
 801a808:	2b00      	cmp	r3, #0
 801a80a:	d108      	bne.n	801a81e <netif_add+0x2a>
 801a80c:	4b5b      	ldr	r3, [pc, #364]	@ (801a97c <netif_add+0x188>)
 801a80e:	f240 1227 	movw	r2, #295	@ 0x127
 801a812:	495b      	ldr	r1, [pc, #364]	@ (801a980 <netif_add+0x18c>)
 801a814:	485b      	ldr	r0, [pc, #364]	@ (801a984 <netif_add+0x190>)
 801a816:	f010 f921 	bl	802aa5c <iprintf>
 801a81a:	2300      	movs	r3, #0
 801a81c:	e0a9      	b.n	801a972 <netif_add+0x17e>
  LWIP_ERROR("netif_add: No init function given", init != NULL, return NULL);
 801a81e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a820:	2b00      	cmp	r3, #0
 801a822:	d108      	bne.n	801a836 <netif_add+0x42>
 801a824:	4b55      	ldr	r3, [pc, #340]	@ (801a97c <netif_add+0x188>)
 801a826:	f44f 7294 	mov.w	r2, #296	@ 0x128
 801a82a:	4957      	ldr	r1, [pc, #348]	@ (801a988 <netif_add+0x194>)
 801a82c:	4855      	ldr	r0, [pc, #340]	@ (801a984 <netif_add+0x190>)
 801a82e:	f010 f915 	bl	802aa5c <iprintf>
 801a832:	2300      	movs	r3, #0
 801a834:	e09d      	b.n	801a972 <netif_add+0x17e>

#if LWIP_IPV4
  if (ipaddr == NULL) {
 801a836:	68bb      	ldr	r3, [r7, #8]
 801a838:	2b00      	cmp	r3, #0
 801a83a:	d101      	bne.n	801a840 <netif_add+0x4c>
    ipaddr = ip_2_ip4(IP4_ADDR_ANY);
 801a83c:	4b53      	ldr	r3, [pc, #332]	@ (801a98c <netif_add+0x198>)
 801a83e:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 801a840:	687b      	ldr	r3, [r7, #4]
 801a842:	2b00      	cmp	r3, #0
 801a844:	d101      	bne.n	801a84a <netif_add+0x56>
    netmask = ip_2_ip4(IP4_ADDR_ANY);
 801a846:	4b51      	ldr	r3, [pc, #324]	@ (801a98c <netif_add+0x198>)
 801a848:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 801a84a:	683b      	ldr	r3, [r7, #0]
 801a84c:	2b00      	cmp	r3, #0
 801a84e:	d101      	bne.n	801a854 <netif_add+0x60>
    gw = ip_2_ip4(IP4_ADDR_ANY);
 801a850:	4b4e      	ldr	r3, [pc, #312]	@ (801a98c <netif_add+0x198>)
 801a852:	603b      	str	r3, [r7, #0]
  }

  /* reset new interface configuration state */
  ip_addr_set_zero_ip4(&netif->ip_addr);
 801a854:	68fb      	ldr	r3, [r7, #12]
 801a856:	2200      	movs	r2, #0
 801a858:	605a      	str	r2, [r3, #4]
  ip_addr_set_zero_ip4(&netif->netmask);
 801a85a:	68fb      	ldr	r3, [r7, #12]
 801a85c:	2200      	movs	r2, #0
 801a85e:	609a      	str	r2, [r3, #8]
  ip_addr_set_zero_ip4(&netif->gw);
 801a860:	68fb      	ldr	r3, [r7, #12]
 801a862:	2200      	movs	r2, #0
 801a864:	60da      	str	r2, [r3, #12]
  netif->output = netif_null_output_ip4;
 801a866:	68fb      	ldr	r3, [r7, #12]
 801a868:	4a49      	ldr	r2, [pc, #292]	@ (801a990 <netif_add+0x19c>)
 801a86a:	615a      	str	r2, [r3, #20]
#endif /* LWIP_IPV6_ADDRESS_LIFETIMES */
  }
  netif->output_ip6 = netif_null_output_ip6;
#endif /* LWIP_IPV6 */
  NETIF_SET_CHECKSUM_CTRL(netif, NETIF_CHECKSUM_ENABLE_ALL);
  netif->mtu = 0;
 801a86c:	68fb      	ldr	r3, [r7, #12]
 801a86e:	2200      	movs	r2, #0
 801a870:	851a      	strh	r2, [r3, #40]	@ 0x28
  netif->flags = 0;
 801a872:	68fb      	ldr	r3, [r7, #12]
 801a874:	2200      	movs	r2, #0
 801a876:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
#ifdef netif_get_client_data
  memset(netif->client_data, 0, sizeof(netif->client_data));
 801a87a:	68fb      	ldr	r3, [r7, #12]
 801a87c:	3324      	adds	r3, #36	@ 0x24
 801a87e:	2204      	movs	r2, #4
 801a880:	2100      	movs	r1, #0
 801a882:	4618      	mov	r0, r3
 801a884:	f010 fa7c 	bl	802ad80 <memset>
#endif /* LWIP_IPV6 */
#if LWIP_NETIF_STATUS_CALLBACK
  netif->status_callback = NULL;
#endif /* LWIP_NETIF_STATUS_CALLBACK */
#if LWIP_NETIF_LINK_CALLBACK
  netif->link_callback = NULL;
 801a888:	68fb      	ldr	r3, [r7, #12]
 801a88a:	2200      	movs	r2, #0
 801a88c:	61da      	str	r2, [r3, #28]
  netif->loop_first = NULL;
  netif->loop_last = NULL;
#endif /* ENABLE_LOOPBACK */

  /* remember netif specific state information data */
  netif->state = state;
 801a88e:	68fb      	ldr	r3, [r7, #12]
 801a890:	6a3a      	ldr	r2, [r7, #32]
 801a892:	621a      	str	r2, [r3, #32]
  netif->num = netif_num;
 801a894:	4b3f      	ldr	r3, [pc, #252]	@ (801a994 <netif_add+0x1a0>)
 801a896:	781a      	ldrb	r2, [r3, #0]
 801a898:	68fb      	ldr	r3, [r7, #12]
 801a89a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
  netif->input = input;
 801a89e:	68fb      	ldr	r3, [r7, #12]
 801a8a0:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801a8a2:	611a      	str	r2, [r3, #16]
#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS
  netif->loop_cnt_current = 0;
#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */

#if LWIP_IPV4
  netif_set_addr(netif, ipaddr, netmask, gw);
 801a8a4:	683b      	ldr	r3, [r7, #0]
 801a8a6:	687a      	ldr	r2, [r7, #4]
 801a8a8:	68b9      	ldr	r1, [r7, #8]
 801a8aa:	68f8      	ldr	r0, [r7, #12]
 801a8ac:	f000 f914 	bl	801aad8 <netif_set_addr>
#endif /* LWIP_IPV4 */

  /* call user specified initialization function for netif */
  if (init(netif) != ERR_OK) {
 801a8b0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801a8b2:	68f8      	ldr	r0, [r7, #12]
 801a8b4:	4798      	blx	r3
 801a8b6:	4603      	mov	r3, r0
 801a8b8:	2b00      	cmp	r3, #0
 801a8ba:	d001      	beq.n	801a8c0 <netif_add+0xcc>
    return NULL;
 801a8bc:	2300      	movs	r3, #0
 801a8be:	e058      	b.n	801a972 <netif_add+0x17e>
     */
  {
    struct netif *netif2;
    int num_netifs;
    do {
      if (netif->num == 255) {
 801a8c0:	68fb      	ldr	r3, [r7, #12]
 801a8c2:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a8c6:	2bff      	cmp	r3, #255	@ 0xff
 801a8c8:	d103      	bne.n	801a8d2 <netif_add+0xde>
        netif->num = 0;
 801a8ca:	68fb      	ldr	r3, [r7, #12]
 801a8cc:	2200      	movs	r2, #0
 801a8ce:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
      }
      num_netifs = 0;
 801a8d2:	2300      	movs	r3, #0
 801a8d4:	613b      	str	r3, [r7, #16]
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 801a8d6:	4b30      	ldr	r3, [pc, #192]	@ (801a998 <netif_add+0x1a4>)
 801a8d8:	681b      	ldr	r3, [r3, #0]
 801a8da:	617b      	str	r3, [r7, #20]
 801a8dc:	e02b      	b.n	801a936 <netif_add+0x142>
        LWIP_ASSERT("netif already added", netif2 != netif);
 801a8de:	697a      	ldr	r2, [r7, #20]
 801a8e0:	68fb      	ldr	r3, [r7, #12]
 801a8e2:	429a      	cmp	r2, r3
 801a8e4:	d106      	bne.n	801a8f4 <netif_add+0x100>
 801a8e6:	4b25      	ldr	r3, [pc, #148]	@ (801a97c <netif_add+0x188>)
 801a8e8:	f240 128b 	movw	r2, #395	@ 0x18b
 801a8ec:	492b      	ldr	r1, [pc, #172]	@ (801a99c <netif_add+0x1a8>)
 801a8ee:	4825      	ldr	r0, [pc, #148]	@ (801a984 <netif_add+0x190>)
 801a8f0:	f010 f8b4 	bl	802aa5c <iprintf>
        num_netifs++;
 801a8f4:	693b      	ldr	r3, [r7, #16]
 801a8f6:	3301      	adds	r3, #1
 801a8f8:	613b      	str	r3, [r7, #16]
        LWIP_ASSERT("too many netifs, max. supported number is 255", num_netifs <= 255);
 801a8fa:	693b      	ldr	r3, [r7, #16]
 801a8fc:	2bff      	cmp	r3, #255	@ 0xff
 801a8fe:	dd06      	ble.n	801a90e <netif_add+0x11a>
 801a900:	4b1e      	ldr	r3, [pc, #120]	@ (801a97c <netif_add+0x188>)
 801a902:	f240 128d 	movw	r2, #397	@ 0x18d
 801a906:	4926      	ldr	r1, [pc, #152]	@ (801a9a0 <netif_add+0x1ac>)
 801a908:	481e      	ldr	r0, [pc, #120]	@ (801a984 <netif_add+0x190>)
 801a90a:	f010 f8a7 	bl	802aa5c <iprintf>
        if (netif2->num == netif->num) {
 801a90e:	697b      	ldr	r3, [r7, #20]
 801a910:	f893 2034 	ldrb.w	r2, [r3, #52]	@ 0x34
 801a914:	68fb      	ldr	r3, [r7, #12]
 801a916:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a91a:	429a      	cmp	r2, r3
 801a91c:	d108      	bne.n	801a930 <netif_add+0x13c>
          netif->num++;
 801a91e:	68fb      	ldr	r3, [r7, #12]
 801a920:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a924:	3301      	adds	r3, #1
 801a926:	b2da      	uxtb	r2, r3
 801a928:	68fb      	ldr	r3, [r7, #12]
 801a92a:	f883 2034 	strb.w	r2, [r3, #52]	@ 0x34
          break;
 801a92e:	e005      	b.n	801a93c <netif_add+0x148>
      for (netif2 = netif_list; netif2 != NULL; netif2 = netif2->next) {
 801a930:	697b      	ldr	r3, [r7, #20]
 801a932:	681b      	ldr	r3, [r3, #0]
 801a934:	617b      	str	r3, [r7, #20]
 801a936:	697b      	ldr	r3, [r7, #20]
 801a938:	2b00      	cmp	r3, #0
 801a93a:	d1d0      	bne.n	801a8de <netif_add+0xea>
        }
      }
    } while (netif2 != NULL);
 801a93c:	697b      	ldr	r3, [r7, #20]
 801a93e:	2b00      	cmp	r3, #0
 801a940:	d1be      	bne.n	801a8c0 <netif_add+0xcc>
  }
  if (netif->num == 254) {
 801a942:	68fb      	ldr	r3, [r7, #12]
 801a944:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a948:	2bfe      	cmp	r3, #254	@ 0xfe
 801a94a:	d103      	bne.n	801a954 <netif_add+0x160>
    netif_num = 0;
 801a94c:	4b11      	ldr	r3, [pc, #68]	@ (801a994 <netif_add+0x1a0>)
 801a94e:	2200      	movs	r2, #0
 801a950:	701a      	strb	r2, [r3, #0]
 801a952:	e006      	b.n	801a962 <netif_add+0x16e>
  } else {
    netif_num = (u8_t)(netif->num + 1);
 801a954:	68fb      	ldr	r3, [r7, #12]
 801a956:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801a95a:	3301      	adds	r3, #1
 801a95c:	b2da      	uxtb	r2, r3
 801a95e:	4b0d      	ldr	r3, [pc, #52]	@ (801a994 <netif_add+0x1a0>)
 801a960:	701a      	strb	r2, [r3, #0]
  }

  /* add this netif to the list */
  netif->next = netif_list;
 801a962:	4b0d      	ldr	r3, [pc, #52]	@ (801a998 <netif_add+0x1a4>)
 801a964:	681a      	ldr	r2, [r3, #0]
 801a966:	68fb      	ldr	r3, [r7, #12]
 801a968:	601a      	str	r2, [r3, #0]
  netif_list = netif;
 801a96a:	4a0b      	ldr	r2, [pc, #44]	@ (801a998 <netif_add+0x1a4>)
 801a96c:	68fb      	ldr	r3, [r7, #12]
 801a96e:	6013      	str	r3, [r2, #0]
#endif /* LWIP_IPV4 */
  LWIP_DEBUGF(NETIF_DEBUG, ("\n"));

  netif_invoke_ext_callback(netif, LWIP_NSC_NETIF_ADDED, NULL);

  return netif;
 801a970:	68fb      	ldr	r3, [r7, #12]
}
 801a972:	4618      	mov	r0, r3
 801a974:	3718      	adds	r7, #24
 801a976:	46bd      	mov	sp, r7
 801a978:	bd80      	pop	{r7, pc}
 801a97a:	bf00      	nop
 801a97c:	0802f0f0 	.word	0x0802f0f0
 801a980:	0802f184 	.word	0x0802f184
 801a984:	0802f140 	.word	0x0802f140
 801a988:	0802f1a0 	.word	0x0802f1a0
 801a98c:	08031ef8 	.word	0x08031ef8
 801a990:	0801adcf 	.word	0x0801adcf
 801a994:	2402afa4 	.word	0x2402afa4
 801a998:	2402af9c 	.word	0x2402af9c
 801a99c:	0802f1c4 	.word	0x0802f1c4
 801a9a0:	0802f1d8 	.word	0x0802f1d8

0801a9a4 <netif_do_ip_addr_changed>:

static void
netif_do_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 801a9a4:	b580      	push	{r7, lr}
 801a9a6:	b082      	sub	sp, #8
 801a9a8:	af00      	add	r7, sp, #0
 801a9aa:	6078      	str	r0, [r7, #4]
 801a9ac:	6039      	str	r1, [r7, #0]
#if LWIP_TCP
  tcp_netif_ip_addr_changed(old_addr, new_addr);
 801a9ae:	6839      	ldr	r1, [r7, #0]
 801a9b0:	6878      	ldr	r0, [r7, #4]
 801a9b2:	f002 fe6f 	bl	801d694 <tcp_netif_ip_addr_changed>
#endif /* LWIP_TCP */
#if LWIP_UDP
  udp_netif_ip_addr_changed(old_addr, new_addr);
 801a9b6:	6839      	ldr	r1, [r7, #0]
 801a9b8:	6878      	ldr	r0, [r7, #4]
 801a9ba:	f008 f82b 	bl	8022a14 <udp_netif_ip_addr_changed>
#endif /* LWIP_UDP */
#if LWIP_RAW
  raw_netif_ip_addr_changed(old_addr, new_addr);
#endif /* LWIP_RAW */
}
 801a9be:	bf00      	nop
 801a9c0:	3708      	adds	r7, #8
 801a9c2:	46bd      	mov	sp, r7
 801a9c4:	bd80      	pop	{r7, pc}
	...

0801a9c8 <netif_do_set_ipaddr>:

#if LWIP_IPV4
static int
netif_do_set_ipaddr(struct netif *netif, const ip4_addr_t *ipaddr, ip_addr_t *old_addr)
{
 801a9c8:	b580      	push	{r7, lr}
 801a9ca:	b086      	sub	sp, #24
 801a9cc:	af00      	add	r7, sp, #0
 801a9ce:	60f8      	str	r0, [r7, #12]
 801a9d0:	60b9      	str	r1, [r7, #8]
 801a9d2:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT("invalid pointer", ipaddr != NULL);
 801a9d4:	68bb      	ldr	r3, [r7, #8]
 801a9d6:	2b00      	cmp	r3, #0
 801a9d8:	d106      	bne.n	801a9e8 <netif_do_set_ipaddr+0x20>
 801a9da:	4b1d      	ldr	r3, [pc, #116]	@ (801aa50 <netif_do_set_ipaddr+0x88>)
 801a9dc:	f240 12cb 	movw	r2, #459	@ 0x1cb
 801a9e0:	491c      	ldr	r1, [pc, #112]	@ (801aa54 <netif_do_set_ipaddr+0x8c>)
 801a9e2:	481d      	ldr	r0, [pc, #116]	@ (801aa58 <netif_do_set_ipaddr+0x90>)
 801a9e4:	f010 f83a 	bl	802aa5c <iprintf>
  LWIP_ASSERT("invalid pointer", old_addr != NULL);
 801a9e8:	687b      	ldr	r3, [r7, #4]
 801a9ea:	2b00      	cmp	r3, #0
 801a9ec:	d106      	bne.n	801a9fc <netif_do_set_ipaddr+0x34>
 801a9ee:	4b18      	ldr	r3, [pc, #96]	@ (801aa50 <netif_do_set_ipaddr+0x88>)
 801a9f0:	f44f 72e6 	mov.w	r2, #460	@ 0x1cc
 801a9f4:	4917      	ldr	r1, [pc, #92]	@ (801aa54 <netif_do_set_ipaddr+0x8c>)
 801a9f6:	4818      	ldr	r0, [pc, #96]	@ (801aa58 <netif_do_set_ipaddr+0x90>)
 801a9f8:	f010 f830 	bl	802aa5c <iprintf>

  /* address is actually being changed? */
  if (ip4_addr_cmp(ipaddr, netif_ip4_addr(netif)) == 0) {
 801a9fc:	68bb      	ldr	r3, [r7, #8]
 801a9fe:	681a      	ldr	r2, [r3, #0]
 801aa00:	68fb      	ldr	r3, [r7, #12]
 801aa02:	3304      	adds	r3, #4
 801aa04:	681b      	ldr	r3, [r3, #0]
 801aa06:	429a      	cmp	r2, r3
 801aa08:	d01c      	beq.n	801aa44 <netif_do_set_ipaddr+0x7c>
    ip_addr_t new_addr;
    *ip_2_ip4(&new_addr) = *ipaddr;
 801aa0a:	68bb      	ldr	r3, [r7, #8]
 801aa0c:	681b      	ldr	r3, [r3, #0]
 801aa0e:	617b      	str	r3, [r7, #20]
    IP_SET_TYPE_VAL(new_addr, IPADDR_TYPE_V4);

    ip_addr_copy(*old_addr, *netif_ip_addr4(netif));
 801aa10:	68fb      	ldr	r3, [r7, #12]
 801aa12:	3304      	adds	r3, #4
 801aa14:	681a      	ldr	r2, [r3, #0]
 801aa16:	687b      	ldr	r3, [r7, #4]
 801aa18:	601a      	str	r2, [r3, #0]

    LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n"));
    netif_do_ip_addr_changed(old_addr, &new_addr);
 801aa1a:	f107 0314 	add.w	r3, r7, #20
 801aa1e:	4619      	mov	r1, r3
 801aa20:	6878      	ldr	r0, [r7, #4]
 801aa22:	f7ff ffbf 	bl	801a9a4 <netif_do_ip_addr_changed>

    mib2_remove_ip4(netif);
    mib2_remove_route_ip4(0, netif);
    /* set new IP address to netif */
    ip4_addr_set(ip_2_ip4(&netif->ip_addr), ipaddr);
 801aa26:	68bb      	ldr	r3, [r7, #8]
 801aa28:	2b00      	cmp	r3, #0
 801aa2a:	d002      	beq.n	801aa32 <netif_do_set_ipaddr+0x6a>
 801aa2c:	68bb      	ldr	r3, [r7, #8]
 801aa2e:	681b      	ldr	r3, [r3, #0]
 801aa30:	e000      	b.n	801aa34 <netif_do_set_ipaddr+0x6c>
 801aa32:	2300      	movs	r3, #0
 801aa34:	68fa      	ldr	r2, [r7, #12]
 801aa36:	6053      	str	r3, [r2, #4]
    IP_SET_TYPE_VAL(netif->ip_addr, IPADDR_TYPE_V4);
    mib2_add_ip4(netif);
    mib2_add_route_ip4(0, netif);

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4);
 801aa38:	2101      	movs	r1, #1
 801aa3a:	68f8      	ldr	r0, [r7, #12]
 801aa3c:	f000 f8d6 	bl	801abec <netif_issue_reports>

    NETIF_STATUS_CALLBACK(netif);
    return 1; /* address changed */
 801aa40:	2301      	movs	r3, #1
 801aa42:	e000      	b.n	801aa46 <netif_do_set_ipaddr+0x7e>
  }
  return 0; /* address unchanged */
 801aa44:	2300      	movs	r3, #0
}
 801aa46:	4618      	mov	r0, r3
 801aa48:	3718      	adds	r7, #24
 801aa4a:	46bd      	mov	sp, r7
 801aa4c:	bd80      	pop	{r7, pc}
 801aa4e:	bf00      	nop
 801aa50:	0802f0f0 	.word	0x0802f0f0
 801aa54:	0802f208 	.word	0x0802f208
 801aa58:	0802f140 	.word	0x0802f140

0801aa5c <netif_do_set_netmask>:
  }
}

static int
netif_do_set_netmask(struct netif *netif, const ip4_addr_t *netmask, ip_addr_t *old_nm)
{
 801aa5c:	b480      	push	{r7}
 801aa5e:	b085      	sub	sp, #20
 801aa60:	af00      	add	r7, sp, #0
 801aa62:	60f8      	str	r0, [r7, #12]
 801aa64:	60b9      	str	r1, [r7, #8]
 801aa66:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(netmask, netif_ip4_netmask(netif)) == 0) {
 801aa68:	68bb      	ldr	r3, [r7, #8]
 801aa6a:	681a      	ldr	r2, [r3, #0]
 801aa6c:	68fb      	ldr	r3, [r7, #12]
 801aa6e:	3308      	adds	r3, #8
 801aa70:	681b      	ldr	r3, [r3, #0]
 801aa72:	429a      	cmp	r2, r3
 801aa74:	d00a      	beq.n	801aa8c <netif_do_set_netmask+0x30>
#else
    LWIP_UNUSED_ARG(old_nm);
#endif
    mib2_remove_route_ip4(0, netif);
    /* set new netmask to netif */
    ip4_addr_set(ip_2_ip4(&netif->netmask), netmask);
 801aa76:	68bb      	ldr	r3, [r7, #8]
 801aa78:	2b00      	cmp	r3, #0
 801aa7a:	d002      	beq.n	801aa82 <netif_do_set_netmask+0x26>
 801aa7c:	68bb      	ldr	r3, [r7, #8]
 801aa7e:	681b      	ldr	r3, [r3, #0]
 801aa80:	e000      	b.n	801aa84 <netif_do_set_netmask+0x28>
 801aa82:	2300      	movs	r3, #0
 801aa84:	68fa      	ldr	r2, [r7, #12]
 801aa86:	6093      	str	r3, [r2, #8]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_netmask(netif)),
                ip4_addr2_16(netif_ip4_netmask(netif)),
                ip4_addr3_16(netif_ip4_netmask(netif)),
                ip4_addr4_16(netif_ip4_netmask(netif))));
    return 1; /* netmask changed */
 801aa88:	2301      	movs	r3, #1
 801aa8a:	e000      	b.n	801aa8e <netif_do_set_netmask+0x32>
  }
  return 0; /* netmask unchanged */
 801aa8c:	2300      	movs	r3, #0
}
 801aa8e:	4618      	mov	r0, r3
 801aa90:	3714      	adds	r7, #20
 801aa92:	46bd      	mov	sp, r7
 801aa94:	f85d 7b04 	ldr.w	r7, [sp], #4
 801aa98:	4770      	bx	lr

0801aa9a <netif_do_set_gw>:
  }
}

static int
netif_do_set_gw(struct netif *netif, const ip4_addr_t *gw, ip_addr_t *old_gw)
{
 801aa9a:	b480      	push	{r7}
 801aa9c:	b085      	sub	sp, #20
 801aa9e:	af00      	add	r7, sp, #0
 801aaa0:	60f8      	str	r0, [r7, #12]
 801aaa2:	60b9      	str	r1, [r7, #8]
 801aaa4:	607a      	str	r2, [r7, #4]
  /* address is actually being changed? */
  if (ip4_addr_cmp(gw, netif_ip4_gw(netif)) == 0) {
 801aaa6:	68bb      	ldr	r3, [r7, #8]
 801aaa8:	681a      	ldr	r2, [r3, #0]
 801aaaa:	68fb      	ldr	r3, [r7, #12]
 801aaac:	330c      	adds	r3, #12
 801aaae:	681b      	ldr	r3, [r3, #0]
 801aab0:	429a      	cmp	r2, r3
 801aab2:	d00a      	beq.n	801aaca <netif_do_set_gw+0x30>
    ip_addr_copy(*old_gw, *netif_ip_gw4(netif));
#else
    LWIP_UNUSED_ARG(old_gw);
#endif

    ip4_addr_set(ip_2_ip4(&netif->gw), gw);
 801aab4:	68bb      	ldr	r3, [r7, #8]
 801aab6:	2b00      	cmp	r3, #0
 801aab8:	d002      	beq.n	801aac0 <netif_do_set_gw+0x26>
 801aaba:	68bb      	ldr	r3, [r7, #8]
 801aabc:	681b      	ldr	r3, [r3, #0]
 801aabe:	e000      	b.n	801aac2 <netif_do_set_gw+0x28>
 801aac0:	2300      	movs	r3, #0
 801aac2:	68fa      	ldr	r2, [r7, #12]
 801aac4:	60d3      	str	r3, [r2, #12]
                netif->name[0], netif->name[1],
                ip4_addr1_16(netif_ip4_gw(netif)),
                ip4_addr2_16(netif_ip4_gw(netif)),
                ip4_addr3_16(netif_ip4_gw(netif)),
                ip4_addr4_16(netif_ip4_gw(netif))));
    return 1; /* gateway changed */
 801aac6:	2301      	movs	r3, #1
 801aac8:	e000      	b.n	801aacc <netif_do_set_gw+0x32>
  }
  return 0; /* gateway unchanged */
 801aaca:	2300      	movs	r3, #0
}
 801aacc:	4618      	mov	r0, r3
 801aace:	3714      	adds	r7, #20
 801aad0:	46bd      	mov	sp, r7
 801aad2:	f85d 7b04 	ldr.w	r7, [sp], #4
 801aad6:	4770      	bx	lr

0801aad8 <netif_set_addr>:
 * @param gw the new default gateway
 */
void
netif_set_addr(struct netif *netif, const ip4_addr_t *ipaddr, const ip4_addr_t *netmask,
               const ip4_addr_t *gw)
{
 801aad8:	b580      	push	{r7, lr}
 801aada:	b088      	sub	sp, #32
 801aadc:	af00      	add	r7, sp, #0
 801aade:	60f8      	str	r0, [r7, #12]
 801aae0:	60b9      	str	r1, [r7, #8]
 801aae2:	607a      	str	r2, [r7, #4]
 801aae4:	603b      	str	r3, [r7, #0]
  ip_addr_t old_nm_val;
  ip_addr_t old_gw_val;
  ip_addr_t *old_nm = &old_nm_val;
  ip_addr_t *old_gw = &old_gw_val;
#else
  ip_addr_t *old_nm = NULL;
 801aae6:	2300      	movs	r3, #0
 801aae8:	61fb      	str	r3, [r7, #28]
  ip_addr_t *old_gw = NULL;
 801aaea:	2300      	movs	r3, #0
 801aaec:	61bb      	str	r3, [r7, #24]
#endif
  ip_addr_t old_addr;
  int remove;

  LWIP_ASSERT_CORE_LOCKED();
 801aaee:	f7f6 fb89 	bl	8011204 <sys_check_core_locking>

  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 801aaf2:	68bb      	ldr	r3, [r7, #8]
 801aaf4:	2b00      	cmp	r3, #0
 801aaf6:	d101      	bne.n	801aafc <netif_set_addr+0x24>
    ipaddr = IP4_ADDR_ANY4;
 801aaf8:	4b1c      	ldr	r3, [pc, #112]	@ (801ab6c <netif_set_addr+0x94>)
 801aafa:	60bb      	str	r3, [r7, #8]
  }
  if (netmask == NULL) {
 801aafc:	687b      	ldr	r3, [r7, #4]
 801aafe:	2b00      	cmp	r3, #0
 801ab00:	d101      	bne.n	801ab06 <netif_set_addr+0x2e>
    netmask = IP4_ADDR_ANY4;
 801ab02:	4b1a      	ldr	r3, [pc, #104]	@ (801ab6c <netif_set_addr+0x94>)
 801ab04:	607b      	str	r3, [r7, #4]
  }
  if (gw == NULL) {
 801ab06:	683b      	ldr	r3, [r7, #0]
 801ab08:	2b00      	cmp	r3, #0
 801ab0a:	d101      	bne.n	801ab10 <netif_set_addr+0x38>
    gw = IP4_ADDR_ANY4;
 801ab0c:	4b17      	ldr	r3, [pc, #92]	@ (801ab6c <netif_set_addr+0x94>)
 801ab0e:	603b      	str	r3, [r7, #0]
  }

  remove = ip4_addr_isany(ipaddr);
 801ab10:	68bb      	ldr	r3, [r7, #8]
 801ab12:	2b00      	cmp	r3, #0
 801ab14:	d003      	beq.n	801ab1e <netif_set_addr+0x46>
 801ab16:	68bb      	ldr	r3, [r7, #8]
 801ab18:	681b      	ldr	r3, [r3, #0]
 801ab1a:	2b00      	cmp	r3, #0
 801ab1c:	d101      	bne.n	801ab22 <netif_set_addr+0x4a>
 801ab1e:	2301      	movs	r3, #1
 801ab20:	e000      	b.n	801ab24 <netif_set_addr+0x4c>
 801ab22:	2300      	movs	r3, #0
 801ab24:	617b      	str	r3, [r7, #20]
  if (remove) {
 801ab26:	697b      	ldr	r3, [r7, #20]
 801ab28:	2b00      	cmp	r3, #0
 801ab2a:	d006      	beq.n	801ab3a <netif_set_addr+0x62>
    /* when removing an address, we have to remove it *before* changing netmask/gw
       to ensure that tcp RST segment can be sent correctly */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 801ab2c:	f107 0310 	add.w	r3, r7, #16
 801ab30:	461a      	mov	r2, r3
 801ab32:	68b9      	ldr	r1, [r7, #8]
 801ab34:	68f8      	ldr	r0, [r7, #12]
 801ab36:	f7ff ff47 	bl	801a9c8 <netif_do_set_ipaddr>
      change_reason |= LWIP_NSC_IPV4_ADDRESS_CHANGED;
      cb_args.ipv4_changed.old_address = &old_addr;
#endif
    }
  }
  if (netif_do_set_netmask(netif, netmask, old_nm)) {
 801ab3a:	69fa      	ldr	r2, [r7, #28]
 801ab3c:	6879      	ldr	r1, [r7, #4]
 801ab3e:	68f8      	ldr	r0, [r7, #12]
 801ab40:	f7ff ff8c 	bl	801aa5c <netif_do_set_netmask>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_NETMASK_CHANGED;
    cb_args.ipv4_changed.old_netmask = old_nm;
#endif
  }
  if (netif_do_set_gw(netif, gw, old_gw)) {
 801ab44:	69ba      	ldr	r2, [r7, #24]
 801ab46:	6839      	ldr	r1, [r7, #0]
 801ab48:	68f8      	ldr	r0, [r7, #12]
 801ab4a:	f7ff ffa6 	bl	801aa9a <netif_do_set_gw>
#if LWIP_NETIF_EXT_STATUS_CALLBACK
    change_reason |= LWIP_NSC_IPV4_GATEWAY_CHANGED;
    cb_args.ipv4_changed.old_gw = old_gw;
#endif
  }
  if (!remove) {
 801ab4e:	697b      	ldr	r3, [r7, #20]
 801ab50:	2b00      	cmp	r3, #0
 801ab52:	d106      	bne.n	801ab62 <netif_set_addr+0x8a>
    /* set ipaddr last to ensure netmask/gw have been set when status callback is called */
    if (netif_do_set_ipaddr(netif, ipaddr, &old_addr)) {
 801ab54:	f107 0310 	add.w	r3, r7, #16
 801ab58:	461a      	mov	r2, r3
 801ab5a:	68b9      	ldr	r1, [r7, #8]
 801ab5c:	68f8      	ldr	r0, [r7, #12]
 801ab5e:	f7ff ff33 	bl	801a9c8 <netif_do_set_ipaddr>
  if (change_reason != LWIP_NSC_NONE) {
    change_reason |= LWIP_NSC_IPV4_SETTINGS_CHANGED;
    netif_invoke_ext_callback(netif, change_reason, &cb_args);
  }
#endif
}
 801ab62:	bf00      	nop
 801ab64:	3720      	adds	r7, #32
 801ab66:	46bd      	mov	sp, r7
 801ab68:	bd80      	pop	{r7, pc}
 801ab6a:	bf00      	nop
 801ab6c:	08031ef8 	.word	0x08031ef8

0801ab70 <netif_set_default>:
 *
 * @param netif the default network interface
 */
void
netif_set_default(struct netif *netif)
{
 801ab70:	b580      	push	{r7, lr}
 801ab72:	b082      	sub	sp, #8
 801ab74:	af00      	add	r7, sp, #0
 801ab76:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801ab78:	f7f6 fb44 	bl	8011204 <sys_check_core_locking>
    mib2_remove_route_ip4(1, netif);
  } else {
    /* install default route */
    mib2_add_route_ip4(1, netif);
  }
  netif_default = netif;
 801ab7c:	4a03      	ldr	r2, [pc, #12]	@ (801ab8c <netif_set_default+0x1c>)
 801ab7e:	687b      	ldr	r3, [r7, #4]
 801ab80:	6013      	str	r3, [r2, #0]
  LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n",
                            netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\''));
}
 801ab82:	bf00      	nop
 801ab84:	3708      	adds	r7, #8
 801ab86:	46bd      	mov	sp, r7
 801ab88:	bd80      	pop	{r7, pc}
 801ab8a:	bf00      	nop
 801ab8c:	2402afa0 	.word	0x2402afa0

0801ab90 <netif_set_up>:
 * Bring an interface up, available for processing
 * traffic.
 */
void
netif_set_up(struct netif *netif)
{
 801ab90:	b580      	push	{r7, lr}
 801ab92:	b082      	sub	sp, #8
 801ab94:	af00      	add	r7, sp, #0
 801ab96:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801ab98:	f7f6 fb34 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("netif_set_up: invalid netif", netif != NULL, return);
 801ab9c:	687b      	ldr	r3, [r7, #4]
 801ab9e:	2b00      	cmp	r3, #0
 801aba0:	d107      	bne.n	801abb2 <netif_set_up+0x22>
 801aba2:	4b0f      	ldr	r3, [pc, #60]	@ (801abe0 <netif_set_up+0x50>)
 801aba4:	f44f 7254 	mov.w	r2, #848	@ 0x350
 801aba8:	490e      	ldr	r1, [pc, #56]	@ (801abe4 <netif_set_up+0x54>)
 801abaa:	480f      	ldr	r0, [pc, #60]	@ (801abe8 <netif_set_up+0x58>)
 801abac:	f00f ff56 	bl	802aa5c <iprintf>
 801abb0:	e013      	b.n	801abda <netif_set_up+0x4a>

  if (!(netif->flags & NETIF_FLAG_UP)) {
 801abb2:	687b      	ldr	r3, [r7, #4]
 801abb4:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801abb8:	f003 0301 	and.w	r3, r3, #1
 801abbc:	2b00      	cmp	r3, #0
 801abbe:	d10c      	bne.n	801abda <netif_set_up+0x4a>
    netif_set_flags(netif, NETIF_FLAG_UP);
 801abc0:	687b      	ldr	r3, [r7, #4]
 801abc2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801abc6:	f043 0301 	orr.w	r3, r3, #1
 801abca:	b2da      	uxtb	r2, r3
 801abcc:	687b      	ldr	r3, [r7, #4]
 801abce:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
      args.status_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 801abd2:	2103      	movs	r1, #3
 801abd4:	6878      	ldr	r0, [r7, #4]
 801abd6:	f000 f809 	bl	801abec <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */
  }
}
 801abda:	3708      	adds	r7, #8
 801abdc:	46bd      	mov	sp, r7
 801abde:	bd80      	pop	{r7, pc}
 801abe0:	0802f0f0 	.word	0x0802f0f0
 801abe4:	0802f278 	.word	0x0802f278
 801abe8:	0802f140 	.word	0x0802f140

0801abec <netif_issue_reports>:

/** Send ARP/IGMP/MLD/RS events, e.g. on link-up/netif-up or addr-change
 */
static void
netif_issue_reports(struct netif *netif, u8_t report_type)
{
 801abec:	b580      	push	{r7, lr}
 801abee:	b082      	sub	sp, #8
 801abf0:	af00      	add	r7, sp, #0
 801abf2:	6078      	str	r0, [r7, #4]
 801abf4:	460b      	mov	r3, r1
 801abf6:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("netif_issue_reports: invalid netif", netif != NULL);
 801abf8:	687b      	ldr	r3, [r7, #4]
 801abfa:	2b00      	cmp	r3, #0
 801abfc:	d106      	bne.n	801ac0c <netif_issue_reports+0x20>
 801abfe:	4b18      	ldr	r3, [pc, #96]	@ (801ac60 <netif_issue_reports+0x74>)
 801ac00:	f240 326d 	movw	r2, #877	@ 0x36d
 801ac04:	4917      	ldr	r1, [pc, #92]	@ (801ac64 <netif_issue_reports+0x78>)
 801ac06:	4818      	ldr	r0, [pc, #96]	@ (801ac68 <netif_issue_reports+0x7c>)
 801ac08:	f00f ff28 	bl	802aa5c <iprintf>

  /* Only send reports when both link and admin states are up */
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 801ac0c:	687b      	ldr	r3, [r7, #4]
 801ac0e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801ac12:	f003 0304 	and.w	r3, r3, #4
 801ac16:	2b00      	cmp	r3, #0
 801ac18:	d01e      	beq.n	801ac58 <netif_issue_reports+0x6c>
      !(netif->flags & NETIF_FLAG_UP)) {
 801ac1a:	687b      	ldr	r3, [r7, #4]
 801ac1c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801ac20:	f003 0301 	and.w	r3, r3, #1
  if (!(netif->flags & NETIF_FLAG_LINK_UP) ||
 801ac24:	2b00      	cmp	r3, #0
 801ac26:	d017      	beq.n	801ac58 <netif_issue_reports+0x6c>
    return;
  }

#if LWIP_IPV4
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 801ac28:	78fb      	ldrb	r3, [r7, #3]
 801ac2a:	f003 0301 	and.w	r3, r3, #1
 801ac2e:	2b00      	cmp	r3, #0
 801ac30:	d013      	beq.n	801ac5a <netif_issue_reports+0x6e>
      !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 801ac32:	687b      	ldr	r3, [r7, #4]
 801ac34:	3304      	adds	r3, #4
 801ac36:	681b      	ldr	r3, [r3, #0]
  if ((report_type & NETIF_REPORT_TYPE_IPV4) &&
 801ac38:	2b00      	cmp	r3, #0
 801ac3a:	d00e      	beq.n	801ac5a <netif_issue_reports+0x6e>
#if LWIP_ARP
    /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */
    if (netif->flags & (NETIF_FLAG_ETHARP)) {
 801ac3c:	687b      	ldr	r3, [r7, #4]
 801ac3e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801ac42:	f003 0308 	and.w	r3, r3, #8
 801ac46:	2b00      	cmp	r3, #0
 801ac48:	d007      	beq.n	801ac5a <netif_issue_reports+0x6e>
      etharp_gratuitous(netif);
 801ac4a:	687b      	ldr	r3, [r7, #4]
 801ac4c:	3304      	adds	r3, #4
 801ac4e:	4619      	mov	r1, r3
 801ac50:	6878      	ldr	r0, [r7, #4]
 801ac52:	f00a fd2b 	bl	80256ac <etharp_request>
 801ac56:	e000      	b.n	801ac5a <netif_issue_reports+0x6e>
    return;
 801ac58:	bf00      	nop
    /* send mld memberships */
    mld6_report_groups(netif);
#endif /* LWIP_IPV6_MLD */
  }
#endif /* LWIP_IPV6 */
}
 801ac5a:	3708      	adds	r7, #8
 801ac5c:	46bd      	mov	sp, r7
 801ac5e:	bd80      	pop	{r7, pc}
 801ac60:	0802f0f0 	.word	0x0802f0f0
 801ac64:	0802f294 	.word	0x0802f294
 801ac68:	0802f140 	.word	0x0802f140

0801ac6c <netif_set_down>:
 * @ingroup netif
 * Bring an interface down, disabling any traffic processing.
 */
void
netif_set_down(struct netif *netif)
{
 801ac6c:	b580      	push	{r7, lr}
 801ac6e:	b082      	sub	sp, #8
 801ac70:	af00      	add	r7, sp, #0
 801ac72:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801ac74:	f7f6 fac6 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("netif_set_down: invalid netif", netif != NULL, return);
 801ac78:	687b      	ldr	r3, [r7, #4]
 801ac7a:	2b00      	cmp	r3, #0
 801ac7c:	d107      	bne.n	801ac8e <netif_set_down+0x22>
 801ac7e:	4b12      	ldr	r3, [pc, #72]	@ (801acc8 <netif_set_down+0x5c>)
 801ac80:	f240 329b 	movw	r2, #923	@ 0x39b
 801ac84:	4911      	ldr	r1, [pc, #68]	@ (801accc <netif_set_down+0x60>)
 801ac86:	4812      	ldr	r0, [pc, #72]	@ (801acd0 <netif_set_down+0x64>)
 801ac88:	f00f fee8 	bl	802aa5c <iprintf>
 801ac8c:	e019      	b.n	801acc2 <netif_set_down+0x56>

  if (netif->flags & NETIF_FLAG_UP) {
 801ac8e:	687b      	ldr	r3, [r7, #4]
 801ac90:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801ac94:	f003 0301 	and.w	r3, r3, #1
 801ac98:	2b00      	cmp	r3, #0
 801ac9a:	d012      	beq.n	801acc2 <netif_set_down+0x56>
      args.status_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_STATUS_CHANGED, &args);
    }
#endif

    netif_clear_flags(netif, NETIF_FLAG_UP);
 801ac9c:	687b      	ldr	r3, [r7, #4]
 801ac9e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801aca2:	f023 0301 	bic.w	r3, r3, #1
 801aca6:	b2da      	uxtb	r2, r3
 801aca8:	687b      	ldr	r3, [r7, #4]
 801acaa:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    MIB2_COPY_SYSUPTIME_TO(&netif->ts);

#if LWIP_IPV4 && LWIP_ARP
    if (netif->flags & NETIF_FLAG_ETHARP) {
 801acae:	687b      	ldr	r3, [r7, #4]
 801acb0:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801acb4:	f003 0308 	and.w	r3, r3, #8
 801acb8:	2b00      	cmp	r3, #0
 801acba:	d002      	beq.n	801acc2 <netif_set_down+0x56>
      etharp_cleanup_netif(netif);
 801acbc:	6878      	ldr	r0, [r7, #4]
 801acbe:	f00a f8ab 	bl	8024e18 <etharp_cleanup_netif>
    nd6_cleanup_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_STATUS_CALLBACK(netif);
  }
}
 801acc2:	3708      	adds	r7, #8
 801acc4:	46bd      	mov	sp, r7
 801acc6:	bd80      	pop	{r7, pc}
 801acc8:	0802f0f0 	.word	0x0802f0f0
 801accc:	0802f2b8 	.word	0x0802f2b8
 801acd0:	0802f140 	.word	0x0802f140

0801acd4 <netif_set_link_up>:
 * @ingroup netif
 * Called by a driver when its link goes up
 */
void
netif_set_link_up(struct netif *netif)
{
 801acd4:	b580      	push	{r7, lr}
 801acd6:	b082      	sub	sp, #8
 801acd8:	af00      	add	r7, sp, #0
 801acda:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801acdc:	f7f6 fa92 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_up: invalid netif", netif != NULL, return);
 801ace0:	687b      	ldr	r3, [r7, #4]
 801ace2:	2b00      	cmp	r3, #0
 801ace4:	d107      	bne.n	801acf6 <netif_set_link_up+0x22>
 801ace6:	4b15      	ldr	r3, [pc, #84]	@ (801ad3c <netif_set_link_up+0x68>)
 801ace8:	f44f 7278 	mov.w	r2, #992	@ 0x3e0
 801acec:	4914      	ldr	r1, [pc, #80]	@ (801ad40 <netif_set_link_up+0x6c>)
 801acee:	4815      	ldr	r0, [pc, #84]	@ (801ad44 <netif_set_link_up+0x70>)
 801acf0:	f00f feb4 	bl	802aa5c <iprintf>
 801acf4:	e01e      	b.n	801ad34 <netif_set_link_up+0x60>

  if (!(netif->flags & NETIF_FLAG_LINK_UP)) {
 801acf6:	687b      	ldr	r3, [r7, #4]
 801acf8:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801acfc:	f003 0304 	and.w	r3, r3, #4
 801ad00:	2b00      	cmp	r3, #0
 801ad02:	d117      	bne.n	801ad34 <netif_set_link_up+0x60>
    netif_set_flags(netif, NETIF_FLAG_LINK_UP);
 801ad04:	687b      	ldr	r3, [r7, #4]
 801ad06:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801ad0a:	f043 0304 	orr.w	r3, r3, #4
 801ad0e:	b2da      	uxtb	r2, r3
 801ad10:	687b      	ldr	r3, [r7, #4]
 801ad12:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31

#if LWIP_DHCP
    dhcp_network_changed(netif);
 801ad16:	6878      	ldr	r0, [r7, #4]
 801ad18:	f008 faaa 	bl	8023270 <dhcp_network_changed>

#if LWIP_AUTOIP
    autoip_network_changed(netif);
#endif /* LWIP_AUTOIP */

    netif_issue_reports(netif, NETIF_REPORT_TYPE_IPV4 | NETIF_REPORT_TYPE_IPV6);
 801ad1c:	2103      	movs	r1, #3
 801ad1e:	6878      	ldr	r0, [r7, #4]
 801ad20:	f7ff ff64 	bl	801abec <netif_issue_reports>
#if LWIP_IPV6
    nd6_restart_netif(netif);
#endif /* LWIP_IPV6 */

    NETIF_LINK_CALLBACK(netif);
 801ad24:	687b      	ldr	r3, [r7, #4]
 801ad26:	69db      	ldr	r3, [r3, #28]
 801ad28:	2b00      	cmp	r3, #0
 801ad2a:	d003      	beq.n	801ad34 <netif_set_link_up+0x60>
 801ad2c:	687b      	ldr	r3, [r7, #4]
 801ad2e:	69db      	ldr	r3, [r3, #28]
 801ad30:	6878      	ldr	r0, [r7, #4]
 801ad32:	4798      	blx	r3
      args.link_changed.state = 1;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 801ad34:	3708      	adds	r7, #8
 801ad36:	46bd      	mov	sp, r7
 801ad38:	bd80      	pop	{r7, pc}
 801ad3a:	bf00      	nop
 801ad3c:	0802f0f0 	.word	0x0802f0f0
 801ad40:	0802f2d8 	.word	0x0802f2d8
 801ad44:	0802f140 	.word	0x0802f140

0801ad48 <netif_set_link_down>:
 * @ingroup netif
 * Called by a driver when its link goes down
 */
void
netif_set_link_down(struct netif *netif)
{
 801ad48:	b580      	push	{r7, lr}
 801ad4a:	b082      	sub	sp, #8
 801ad4c:	af00      	add	r7, sp, #0
 801ad4e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801ad50:	f7f6 fa58 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("netif_set_link_down: invalid netif", netif != NULL, return);
 801ad54:	687b      	ldr	r3, [r7, #4]
 801ad56:	2b00      	cmp	r3, #0
 801ad58:	d107      	bne.n	801ad6a <netif_set_link_down+0x22>
 801ad5a:	4b11      	ldr	r3, [pc, #68]	@ (801ada0 <netif_set_link_down+0x58>)
 801ad5c:	f240 4206 	movw	r2, #1030	@ 0x406
 801ad60:	4910      	ldr	r1, [pc, #64]	@ (801ada4 <netif_set_link_down+0x5c>)
 801ad62:	4811      	ldr	r0, [pc, #68]	@ (801ada8 <netif_set_link_down+0x60>)
 801ad64:	f00f fe7a 	bl	802aa5c <iprintf>
 801ad68:	e017      	b.n	801ad9a <netif_set_link_down+0x52>

  if (netif->flags & NETIF_FLAG_LINK_UP) {
 801ad6a:	687b      	ldr	r3, [r7, #4]
 801ad6c:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801ad70:	f003 0304 	and.w	r3, r3, #4
 801ad74:	2b00      	cmp	r3, #0
 801ad76:	d010      	beq.n	801ad9a <netif_set_link_down+0x52>
    netif_clear_flags(netif, NETIF_FLAG_LINK_UP);
 801ad78:	687b      	ldr	r3, [r7, #4]
 801ad7a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 801ad7e:	f023 0304 	bic.w	r3, r3, #4
 801ad82:	b2da      	uxtb	r2, r3
 801ad84:	687b      	ldr	r3, [r7, #4]
 801ad86:	f883 2031 	strb.w	r2, [r3, #49]	@ 0x31
    NETIF_LINK_CALLBACK(netif);
 801ad8a:	687b      	ldr	r3, [r7, #4]
 801ad8c:	69db      	ldr	r3, [r3, #28]
 801ad8e:	2b00      	cmp	r3, #0
 801ad90:	d003      	beq.n	801ad9a <netif_set_link_down+0x52>
 801ad92:	687b      	ldr	r3, [r7, #4]
 801ad94:	69db      	ldr	r3, [r3, #28]
 801ad96:	6878      	ldr	r0, [r7, #4]
 801ad98:	4798      	blx	r3
      args.link_changed.state = 0;
      netif_invoke_ext_callback(netif, LWIP_NSC_LINK_CHANGED, &args);
    }
#endif
  }
}
 801ad9a:	3708      	adds	r7, #8
 801ad9c:	46bd      	mov	sp, r7
 801ad9e:	bd80      	pop	{r7, pc}
 801ada0:	0802f0f0 	.word	0x0802f0f0
 801ada4:	0802f2fc 	.word	0x0802f2fc
 801ada8:	0802f140 	.word	0x0802f140

0801adac <netif_set_link_callback>:
 * @ingroup netif
 * Set callback to be called when link is brought up/down
 */
void
netif_set_link_callback(struct netif *netif, netif_status_callback_fn link_callback)
{
 801adac:	b580      	push	{r7, lr}
 801adae:	b082      	sub	sp, #8
 801adb0:	af00      	add	r7, sp, #0
 801adb2:	6078      	str	r0, [r7, #4]
 801adb4:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801adb6:	f7f6 fa25 	bl	8011204 <sys_check_core_locking>

  if (netif) {
 801adba:	687b      	ldr	r3, [r7, #4]
 801adbc:	2b00      	cmp	r3, #0
 801adbe:	d002      	beq.n	801adc6 <netif_set_link_callback+0x1a>
    netif->link_callback = link_callback;
 801adc0:	687b      	ldr	r3, [r7, #4]
 801adc2:	683a      	ldr	r2, [r7, #0]
 801adc4:	61da      	str	r2, [r3, #28]
  }
}
 801adc6:	bf00      	nop
 801adc8:	3708      	adds	r7, #8
 801adca:	46bd      	mov	sp, r7
 801adcc:	bd80      	pop	{r7, pc}

0801adce <netif_null_output_ip4>:
#if LWIP_IPV4
/** Dummy IPv4 output function for netifs not supporting IPv4
 */
static err_t
netif_null_output_ip4(struct netif *netif, struct pbuf *p, const ip4_addr_t *ipaddr)
{
 801adce:	b480      	push	{r7}
 801add0:	b085      	sub	sp, #20
 801add2:	af00      	add	r7, sp, #0
 801add4:	60f8      	str	r0, [r7, #12]
 801add6:	60b9      	str	r1, [r7, #8]
 801add8:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(netif);
  LWIP_UNUSED_ARG(p);
  LWIP_UNUSED_ARG(ipaddr);

  return ERR_IF;
 801adda:	f06f 030b 	mvn.w	r3, #11
}
 801adde:	4618      	mov	r0, r3
 801ade0:	3714      	adds	r7, #20
 801ade2:	46bd      	mov	sp, r7
 801ade4:	f85d 7b04 	ldr.w	r7, [sp], #4
 801ade8:	4770      	bx	lr
	...

0801adec <netif_get_by_index>:
*
* @param idx index of netif to find
*/
struct netif *
netif_get_by_index(u8_t idx)
{
 801adec:	b580      	push	{r7, lr}
 801adee:	b084      	sub	sp, #16
 801adf0:	af00      	add	r7, sp, #0
 801adf2:	4603      	mov	r3, r0
 801adf4:	71fb      	strb	r3, [r7, #7]
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 801adf6:	f7f6 fa05 	bl	8011204 <sys_check_core_locking>

  if (idx != NETIF_NO_INDEX) {
 801adfa:	79fb      	ldrb	r3, [r7, #7]
 801adfc:	2b00      	cmp	r3, #0
 801adfe:	d013      	beq.n	801ae28 <netif_get_by_index+0x3c>
    NETIF_FOREACH(netif) {
 801ae00:	4b0c      	ldr	r3, [pc, #48]	@ (801ae34 <netif_get_by_index+0x48>)
 801ae02:	681b      	ldr	r3, [r3, #0]
 801ae04:	60fb      	str	r3, [r7, #12]
 801ae06:	e00c      	b.n	801ae22 <netif_get_by_index+0x36>
      if (idx == netif_get_index(netif)) {
 801ae08:	68fb      	ldr	r3, [r7, #12]
 801ae0a:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801ae0e:	3301      	adds	r3, #1
 801ae10:	b2db      	uxtb	r3, r3
 801ae12:	79fa      	ldrb	r2, [r7, #7]
 801ae14:	429a      	cmp	r2, r3
 801ae16:	d101      	bne.n	801ae1c <netif_get_by_index+0x30>
        return netif; /* found! */
 801ae18:	68fb      	ldr	r3, [r7, #12]
 801ae1a:	e006      	b.n	801ae2a <netif_get_by_index+0x3e>
    NETIF_FOREACH(netif) {
 801ae1c:	68fb      	ldr	r3, [r7, #12]
 801ae1e:	681b      	ldr	r3, [r3, #0]
 801ae20:	60fb      	str	r3, [r7, #12]
 801ae22:	68fb      	ldr	r3, [r7, #12]
 801ae24:	2b00      	cmp	r3, #0
 801ae26:	d1ef      	bne.n	801ae08 <netif_get_by_index+0x1c>
      }
    }
  }

  return NULL;
 801ae28:	2300      	movs	r3, #0
}
 801ae2a:	4618      	mov	r0, r3
 801ae2c:	3710      	adds	r7, #16
 801ae2e:	46bd      	mov	sp, r7
 801ae30:	bd80      	pop	{r7, pc}
 801ae32:	bf00      	nop
 801ae34:	2402af9c 	.word	0x2402af9c

0801ae38 <pbuf_free_ooseq>:
#if !NO_SYS
static
#endif /* !NO_SYS */
void
pbuf_free_ooseq(void)
{
 801ae38:	b580      	push	{r7, lr}
 801ae3a:	b082      	sub	sp, #8
 801ae3c:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 0);
 801ae3e:	f00c fb77 	bl	8027530 <sys_arch_protect>
 801ae42:	6038      	str	r0, [r7, #0]
 801ae44:	4b0d      	ldr	r3, [pc, #52]	@ (801ae7c <pbuf_free_ooseq+0x44>)
 801ae46:	2200      	movs	r2, #0
 801ae48:	701a      	strb	r2, [r3, #0]
 801ae4a:	6838      	ldr	r0, [r7, #0]
 801ae4c:	f00c fb7e 	bl	802754c <sys_arch_unprotect>

  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 801ae50:	4b0b      	ldr	r3, [pc, #44]	@ (801ae80 <pbuf_free_ooseq+0x48>)
 801ae52:	681b      	ldr	r3, [r3, #0]
 801ae54:	607b      	str	r3, [r7, #4]
 801ae56:	e00a      	b.n	801ae6e <pbuf_free_ooseq+0x36>
    if (pcb->ooseq != NULL) {
 801ae58:	687b      	ldr	r3, [r7, #4]
 801ae5a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801ae5c:	2b00      	cmp	r3, #0
 801ae5e:	d003      	beq.n	801ae68 <pbuf_free_ooseq+0x30>
      /** Free the ooseq pbufs of one PCB only */
      LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n"));
      tcp_free_ooseq(pcb);
 801ae60:	6878      	ldr	r0, [r7, #4]
 801ae62:	f002 fc55 	bl	801d710 <tcp_free_ooseq>
      return;
 801ae66:	e005      	b.n	801ae74 <pbuf_free_ooseq+0x3c>
  for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
 801ae68:	687b      	ldr	r3, [r7, #4]
 801ae6a:	68db      	ldr	r3, [r3, #12]
 801ae6c:	607b      	str	r3, [r7, #4]
 801ae6e:	687b      	ldr	r3, [r7, #4]
 801ae70:	2b00      	cmp	r3, #0
 801ae72:	d1f1      	bne.n	801ae58 <pbuf_free_ooseq+0x20>
    }
  }
}
 801ae74:	3708      	adds	r7, #8
 801ae76:	46bd      	mov	sp, r7
 801ae78:	bd80      	pop	{r7, pc}
 801ae7a:	bf00      	nop
 801ae7c:	2402afa5 	.word	0x2402afa5
 801ae80:	2402afb4 	.word	0x2402afb4

0801ae84 <pbuf_free_ooseq_callback>:
/**
 * Just a callback function for tcpip_callback() that calls pbuf_free_ooseq().
 */
static void
pbuf_free_ooseq_callback(void *arg)
{
 801ae84:	b580      	push	{r7, lr}
 801ae86:	b082      	sub	sp, #8
 801ae88:	af00      	add	r7, sp, #0
 801ae8a:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);
  pbuf_free_ooseq();
 801ae8c:	f7ff ffd4 	bl	801ae38 <pbuf_free_ooseq>
}
 801ae90:	bf00      	nop
 801ae92:	3708      	adds	r7, #8
 801ae94:	46bd      	mov	sp, r7
 801ae96:	bd80      	pop	{r7, pc}

0801ae98 <pbuf_pool_is_empty>:
#endif /* !NO_SYS */

/** Queue a call to pbuf_free_ooseq if not already queued. */
static void
pbuf_pool_is_empty(void)
{
 801ae98:	b580      	push	{r7, lr}
 801ae9a:	b082      	sub	sp, #8
 801ae9c:	af00      	add	r7, sp, #0
#ifndef PBUF_POOL_FREE_OOSEQ_QUEUE_CALL
  SYS_ARCH_SET(pbuf_free_ooseq_pending, 1);
#else /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
  u8_t queued;
  SYS_ARCH_DECL_PROTECT(old_level);
  SYS_ARCH_PROTECT(old_level);
 801ae9e:	f00c fb47 	bl	8027530 <sys_arch_protect>
 801aea2:	6078      	str	r0, [r7, #4]
  queued = pbuf_free_ooseq_pending;
 801aea4:	4b0f      	ldr	r3, [pc, #60]	@ (801aee4 <pbuf_pool_is_empty+0x4c>)
 801aea6:	781b      	ldrb	r3, [r3, #0]
 801aea8:	70fb      	strb	r3, [r7, #3]
  pbuf_free_ooseq_pending = 1;
 801aeaa:	4b0e      	ldr	r3, [pc, #56]	@ (801aee4 <pbuf_pool_is_empty+0x4c>)
 801aeac:	2201      	movs	r2, #1
 801aeae:	701a      	strb	r2, [r3, #0]
  SYS_ARCH_UNPROTECT(old_level);
 801aeb0:	6878      	ldr	r0, [r7, #4]
 801aeb2:	f00c fb4b 	bl	802754c <sys_arch_unprotect>

  if (!queued) {
 801aeb6:	78fb      	ldrb	r3, [r7, #3]
 801aeb8:	2b00      	cmp	r3, #0
 801aeba:	d10f      	bne.n	801aedc <pbuf_pool_is_empty+0x44>
    /* queue a call to pbuf_free_ooseq if not already queued */
    PBUF_POOL_FREE_OOSEQ_QUEUE_CALL();
 801aebc:	2100      	movs	r1, #0
 801aebe:	480a      	ldr	r0, [pc, #40]	@ (801aee8 <pbuf_pool_is_empty+0x50>)
 801aec0:	f7fe fdd6 	bl	8019a70 <tcpip_try_callback>
 801aec4:	4603      	mov	r3, r0
 801aec6:	2b00      	cmp	r3, #0
 801aec8:	d008      	beq.n	801aedc <pbuf_pool_is_empty+0x44>
 801aeca:	f00c fb31 	bl	8027530 <sys_arch_protect>
 801aece:	6078      	str	r0, [r7, #4]
 801aed0:	4b04      	ldr	r3, [pc, #16]	@ (801aee4 <pbuf_pool_is_empty+0x4c>)
 801aed2:	2200      	movs	r2, #0
 801aed4:	701a      	strb	r2, [r3, #0]
 801aed6:	6878      	ldr	r0, [r7, #4]
 801aed8:	f00c fb38 	bl	802754c <sys_arch_unprotect>
  }
#endif /* PBUF_POOL_FREE_OOSEQ_QUEUE_CALL */
}
 801aedc:	bf00      	nop
 801aede:	3708      	adds	r7, #8
 801aee0:	46bd      	mov	sp, r7
 801aee2:	bd80      	pop	{r7, pc}
 801aee4:	2402afa5 	.word	0x2402afa5
 801aee8:	0801ae85 	.word	0x0801ae85

0801aeec <pbuf_init_alloced_pbuf>:
#endif /* !LWIP_TCP || !TCP_QUEUE_OOSEQ || !PBUF_POOL_FREE_OOSEQ */

/* Initialize members of struct pbuf after allocation */
static void
pbuf_init_alloced_pbuf(struct pbuf *p, void *payload, u16_t tot_len, u16_t len, pbuf_type type, u8_t flags)
{
 801aeec:	b480      	push	{r7}
 801aeee:	b085      	sub	sp, #20
 801aef0:	af00      	add	r7, sp, #0
 801aef2:	60f8      	str	r0, [r7, #12]
 801aef4:	60b9      	str	r1, [r7, #8]
 801aef6:	4611      	mov	r1, r2
 801aef8:	461a      	mov	r2, r3
 801aefa:	460b      	mov	r3, r1
 801aefc:	80fb      	strh	r3, [r7, #6]
 801aefe:	4613      	mov	r3, r2
 801af00:	80bb      	strh	r3, [r7, #4]
  p->next = NULL;
 801af02:	68fb      	ldr	r3, [r7, #12]
 801af04:	2200      	movs	r2, #0
 801af06:	601a      	str	r2, [r3, #0]
  p->payload = payload;
 801af08:	68fb      	ldr	r3, [r7, #12]
 801af0a:	68ba      	ldr	r2, [r7, #8]
 801af0c:	605a      	str	r2, [r3, #4]
  p->tot_len = tot_len;
 801af0e:	68fb      	ldr	r3, [r7, #12]
 801af10:	88fa      	ldrh	r2, [r7, #6]
 801af12:	811a      	strh	r2, [r3, #8]
  p->len = len;
 801af14:	68fb      	ldr	r3, [r7, #12]
 801af16:	88ba      	ldrh	r2, [r7, #4]
 801af18:	815a      	strh	r2, [r3, #10]
  p->type_internal = (u8_t)type;
 801af1a:	8b3b      	ldrh	r3, [r7, #24]
 801af1c:	b2da      	uxtb	r2, r3
 801af1e:	68fb      	ldr	r3, [r7, #12]
 801af20:	731a      	strb	r2, [r3, #12]
  p->flags = flags;
 801af22:	68fb      	ldr	r3, [r7, #12]
 801af24:	7f3a      	ldrb	r2, [r7, #28]
 801af26:	735a      	strb	r2, [r3, #13]
  p->ref = 1;
 801af28:	68fb      	ldr	r3, [r7, #12]
 801af2a:	2201      	movs	r2, #1
 801af2c:	739a      	strb	r2, [r3, #14]
  p->if_idx = NETIF_NO_INDEX;
 801af2e:	68fb      	ldr	r3, [r7, #12]
 801af30:	2200      	movs	r2, #0
 801af32:	73da      	strb	r2, [r3, #15]
}
 801af34:	bf00      	nop
 801af36:	3714      	adds	r7, #20
 801af38:	46bd      	mov	sp, r7
 801af3a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801af3e:	4770      	bx	lr

0801af40 <pbuf_alloc>:
 * @return the allocated pbuf. If multiple pbufs where allocated, this
 * is the first pbuf of a pbuf chain.
 */
struct pbuf *
pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type)
{
 801af40:	b580      	push	{r7, lr}
 801af42:	b08c      	sub	sp, #48	@ 0x30
 801af44:	af02      	add	r7, sp, #8
 801af46:	4603      	mov	r3, r0
 801af48:	71fb      	strb	r3, [r7, #7]
 801af4a:	460b      	mov	r3, r1
 801af4c:	80bb      	strh	r3, [r7, #4]
 801af4e:	4613      	mov	r3, r2
 801af50:	807b      	strh	r3, [r7, #2]
  struct pbuf *p;
  u16_t offset = (u16_t)layer;
 801af52:	79fb      	ldrb	r3, [r7, #7]
 801af54:	847b      	strh	r3, [r7, #34]	@ 0x22
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length));

  switch (type) {
 801af56:	887b      	ldrh	r3, [r7, #2]
 801af58:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 801af5c:	f000 8082 	beq.w	801b064 <pbuf_alloc+0x124>
 801af60:	f5b3 7f20 	cmp.w	r3, #640	@ 0x280
 801af64:	f300 80c9 	bgt.w	801b0fa <pbuf_alloc+0x1ba>
 801af68:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 801af6c:	d010      	beq.n	801af90 <pbuf_alloc+0x50>
 801af6e:	f5b3 7fc1 	cmp.w	r3, #386	@ 0x182
 801af72:	f300 80c2 	bgt.w	801b0fa <pbuf_alloc+0x1ba>
 801af76:	2b01      	cmp	r3, #1
 801af78:	d002      	beq.n	801af80 <pbuf_alloc+0x40>
 801af7a:	2b41      	cmp	r3, #65	@ 0x41
 801af7c:	f040 80bd 	bne.w	801b0fa <pbuf_alloc+0x1ba>
    case PBUF_REF: /* fall through */
    case PBUF_ROM:
      p = pbuf_alloc_reference(NULL, length, type);
 801af80:	887a      	ldrh	r2, [r7, #2]
 801af82:	88bb      	ldrh	r3, [r7, #4]
 801af84:	4619      	mov	r1, r3
 801af86:	2000      	movs	r0, #0
 801af88:	f000 f8d2 	bl	801b130 <pbuf_alloc_reference>
 801af8c:	6278      	str	r0, [r7, #36]	@ 0x24
      break;
 801af8e:	e0be      	b.n	801b10e <pbuf_alloc+0x1ce>
    case PBUF_POOL: {
      struct pbuf *q, *last;
      u16_t rem_len; /* remaining length */
      p = NULL;
 801af90:	2300      	movs	r3, #0
 801af92:	627b      	str	r3, [r7, #36]	@ 0x24
      last = NULL;
 801af94:	2300      	movs	r3, #0
 801af96:	61fb      	str	r3, [r7, #28]
      rem_len = length;
 801af98:	88bb      	ldrh	r3, [r7, #4]
 801af9a:	837b      	strh	r3, [r7, #26]
      do {
        u16_t qlen;
        q = (struct pbuf *)memp_malloc(MEMP_PBUF_POOL);
 801af9c:	200c      	movs	r0, #12
 801af9e:	f7ff fb81 	bl	801a6a4 <memp_malloc>
 801afa2:	6138      	str	r0, [r7, #16]
        if (q == NULL) {
 801afa4:	693b      	ldr	r3, [r7, #16]
 801afa6:	2b00      	cmp	r3, #0
 801afa8:	d109      	bne.n	801afbe <pbuf_alloc+0x7e>
          PBUF_POOL_IS_EMPTY();
 801afaa:	f7ff ff75 	bl	801ae98 <pbuf_pool_is_empty>
          /* free chain so far allocated */
          if (p) {
 801afae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801afb0:	2b00      	cmp	r3, #0
 801afb2:	d002      	beq.n	801afba <pbuf_alloc+0x7a>
            pbuf_free(p);
 801afb4:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801afb6:	f000 fad9 	bl	801b56c <pbuf_free>
          }
          /* bail out unsuccessfully */
          return NULL;
 801afba:	2300      	movs	r3, #0
 801afbc:	e0a8      	b.n	801b110 <pbuf_alloc+0x1d0>
        }
        qlen = LWIP_MIN(rem_len, (u16_t)(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)));
 801afbe:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801afc0:	3303      	adds	r3, #3
 801afc2:	b29b      	uxth	r3, r3
 801afc4:	f023 0303 	bic.w	r3, r3, #3
 801afc8:	b29a      	uxth	r2, r3
 801afca:	f240 53ec 	movw	r3, #1516	@ 0x5ec
 801afce:	1a9b      	subs	r3, r3, r2
 801afd0:	b29b      	uxth	r3, r3
 801afd2:	8b7a      	ldrh	r2, [r7, #26]
 801afd4:	4293      	cmp	r3, r2
 801afd6:	bf28      	it	cs
 801afd8:	4613      	movcs	r3, r2
 801afda:	81fb      	strh	r3, [r7, #14]
        pbuf_init_alloced_pbuf(q, LWIP_MEM_ALIGN((void *)((u8_t *)q + SIZEOF_STRUCT_PBUF + offset)),
 801afdc:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801afde:	3310      	adds	r3, #16
 801afe0:	693a      	ldr	r2, [r7, #16]
 801afe2:	4413      	add	r3, r2
 801afe4:	3303      	adds	r3, #3
 801afe6:	f023 0303 	bic.w	r3, r3, #3
 801afea:	4618      	mov	r0, r3
 801afec:	89f9      	ldrh	r1, [r7, #14]
 801afee:	8b7a      	ldrh	r2, [r7, #26]
 801aff0:	2300      	movs	r3, #0
 801aff2:	9301      	str	r3, [sp, #4]
 801aff4:	887b      	ldrh	r3, [r7, #2]
 801aff6:	9300      	str	r3, [sp, #0]
 801aff8:	460b      	mov	r3, r1
 801affa:	4601      	mov	r1, r0
 801affc:	6938      	ldr	r0, [r7, #16]
 801affe:	f7ff ff75 	bl	801aeec <pbuf_init_alloced_pbuf>
                               rem_len, qlen, type, 0);
        LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned",
 801b002:	693b      	ldr	r3, [r7, #16]
 801b004:	685b      	ldr	r3, [r3, #4]
 801b006:	f003 0303 	and.w	r3, r3, #3
 801b00a:	2b00      	cmp	r3, #0
 801b00c:	d006      	beq.n	801b01c <pbuf_alloc+0xdc>
 801b00e:	4b42      	ldr	r3, [pc, #264]	@ (801b118 <pbuf_alloc+0x1d8>)
 801b010:	f44f 7280 	mov.w	r2, #256	@ 0x100
 801b014:	4941      	ldr	r1, [pc, #260]	@ (801b11c <pbuf_alloc+0x1dc>)
 801b016:	4842      	ldr	r0, [pc, #264]	@ (801b120 <pbuf_alloc+0x1e0>)
 801b018:	f00f fd20 	bl	802aa5c <iprintf>
                    ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0);
        LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT",
 801b01c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801b01e:	3303      	adds	r3, #3
 801b020:	f023 0303 	bic.w	r3, r3, #3
 801b024:	f240 52ec 	movw	r2, #1516	@ 0x5ec
 801b028:	4293      	cmp	r3, r2
 801b02a:	d106      	bne.n	801b03a <pbuf_alloc+0xfa>
 801b02c:	4b3a      	ldr	r3, [pc, #232]	@ (801b118 <pbuf_alloc+0x1d8>)
 801b02e:	f44f 7281 	mov.w	r2, #258	@ 0x102
 801b032:	493c      	ldr	r1, [pc, #240]	@ (801b124 <pbuf_alloc+0x1e4>)
 801b034:	483a      	ldr	r0, [pc, #232]	@ (801b120 <pbuf_alloc+0x1e0>)
 801b036:	f00f fd11 	bl	802aa5c <iprintf>
                    (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 );
        if (p == NULL) {
 801b03a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801b03c:	2b00      	cmp	r3, #0
 801b03e:	d102      	bne.n	801b046 <pbuf_alloc+0x106>
          /* allocated head of pbuf chain (into p) */
          p = q;
 801b040:	693b      	ldr	r3, [r7, #16]
 801b042:	627b      	str	r3, [r7, #36]	@ 0x24
 801b044:	e002      	b.n	801b04c <pbuf_alloc+0x10c>
        } else {
          /* make previous pbuf point to this pbuf */
          last->next = q;
 801b046:	69fb      	ldr	r3, [r7, #28]
 801b048:	693a      	ldr	r2, [r7, #16]
 801b04a:	601a      	str	r2, [r3, #0]
        }
        last = q;
 801b04c:	693b      	ldr	r3, [r7, #16]
 801b04e:	61fb      	str	r3, [r7, #28]
        rem_len = (u16_t)(rem_len - qlen);
 801b050:	8b7a      	ldrh	r2, [r7, #26]
 801b052:	89fb      	ldrh	r3, [r7, #14]
 801b054:	1ad3      	subs	r3, r2, r3
 801b056:	837b      	strh	r3, [r7, #26]
        offset = 0;
 801b058:	2300      	movs	r3, #0
 801b05a:	847b      	strh	r3, [r7, #34]	@ 0x22
      } while (rem_len > 0);
 801b05c:	8b7b      	ldrh	r3, [r7, #26]
 801b05e:	2b00      	cmp	r3, #0
 801b060:	d19c      	bne.n	801af9c <pbuf_alloc+0x5c>
      break;
 801b062:	e054      	b.n	801b10e <pbuf_alloc+0x1ce>
    }
    case PBUF_RAM: {
      u16_t payload_len = (u16_t)(LWIP_MEM_ALIGN_SIZE(offset) + LWIP_MEM_ALIGN_SIZE(length));
 801b064:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801b066:	3303      	adds	r3, #3
 801b068:	b29b      	uxth	r3, r3
 801b06a:	f023 0303 	bic.w	r3, r3, #3
 801b06e:	b29a      	uxth	r2, r3
 801b070:	88bb      	ldrh	r3, [r7, #4]
 801b072:	3303      	adds	r3, #3
 801b074:	b29b      	uxth	r3, r3
 801b076:	f023 0303 	bic.w	r3, r3, #3
 801b07a:	b29b      	uxth	r3, r3
 801b07c:	4413      	add	r3, r2
 801b07e:	833b      	strh	r3, [r7, #24]
      mem_size_t alloc_len = (mem_size_t)(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF) + payload_len);
 801b080:	8b3b      	ldrh	r3, [r7, #24]
 801b082:	3310      	adds	r3, #16
 801b084:	617b      	str	r3, [r7, #20]

      /* bug #50040: Check for integer overflow when calculating alloc_len */
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 801b086:	8b3a      	ldrh	r2, [r7, #24]
 801b088:	88bb      	ldrh	r3, [r7, #4]
 801b08a:	3303      	adds	r3, #3
 801b08c:	f023 0303 	bic.w	r3, r3, #3
 801b090:	429a      	cmp	r2, r3
 801b092:	d306      	bcc.n	801b0a2 <pbuf_alloc+0x162>
          (alloc_len < LWIP_MEM_ALIGN_SIZE(length))) {
 801b094:	88bb      	ldrh	r3, [r7, #4]
 801b096:	3303      	adds	r3, #3
 801b098:	f023 0303 	bic.w	r3, r3, #3
      if ((payload_len < LWIP_MEM_ALIGN_SIZE(length)) ||
 801b09c:	697a      	ldr	r2, [r7, #20]
 801b09e:	429a      	cmp	r2, r3
 801b0a0:	d201      	bcs.n	801b0a6 <pbuf_alloc+0x166>
        return NULL;
 801b0a2:	2300      	movs	r3, #0
 801b0a4:	e034      	b.n	801b110 <pbuf_alloc+0x1d0>
      }

      /* If pbuf is to be allocated in RAM, allocate memory for it. */
      p = (struct pbuf *)mem_malloc(alloc_len);
 801b0a6:	6978      	ldr	r0, [r7, #20]
 801b0a8:	f7ff f960 	bl	801a36c <mem_malloc>
 801b0ac:	6278      	str	r0, [r7, #36]	@ 0x24
      if (p == NULL) {
 801b0ae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801b0b0:	2b00      	cmp	r3, #0
 801b0b2:	d101      	bne.n	801b0b8 <pbuf_alloc+0x178>
        return NULL;
 801b0b4:	2300      	movs	r3, #0
 801b0b6:	e02b      	b.n	801b110 <pbuf_alloc+0x1d0>
      }
      pbuf_init_alloced_pbuf(p, LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)),
 801b0b8:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 801b0ba:	3310      	adds	r3, #16
 801b0bc:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 801b0be:	4413      	add	r3, r2
 801b0c0:	3303      	adds	r3, #3
 801b0c2:	f023 0303 	bic.w	r3, r3, #3
 801b0c6:	4618      	mov	r0, r3
 801b0c8:	88b9      	ldrh	r1, [r7, #4]
 801b0ca:	88ba      	ldrh	r2, [r7, #4]
 801b0cc:	2300      	movs	r3, #0
 801b0ce:	9301      	str	r3, [sp, #4]
 801b0d0:	887b      	ldrh	r3, [r7, #2]
 801b0d2:	9300      	str	r3, [sp, #0]
 801b0d4:	460b      	mov	r3, r1
 801b0d6:	4601      	mov	r1, r0
 801b0d8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 801b0da:	f7ff ff07 	bl	801aeec <pbuf_init_alloced_pbuf>
                             length, length, type, 0);
      LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned",
 801b0de:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801b0e0:	685b      	ldr	r3, [r3, #4]
 801b0e2:	f003 0303 	and.w	r3, r3, #3
 801b0e6:	2b00      	cmp	r3, #0
 801b0e8:	d010      	beq.n	801b10c <pbuf_alloc+0x1cc>
 801b0ea:	4b0b      	ldr	r3, [pc, #44]	@ (801b118 <pbuf_alloc+0x1d8>)
 801b0ec:	f44f 7291 	mov.w	r2, #290	@ 0x122
 801b0f0:	490d      	ldr	r1, [pc, #52]	@ (801b128 <pbuf_alloc+0x1e8>)
 801b0f2:	480b      	ldr	r0, [pc, #44]	@ (801b120 <pbuf_alloc+0x1e0>)
 801b0f4:	f00f fcb2 	bl	802aa5c <iprintf>
                  ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0);
      break;
 801b0f8:	e008      	b.n	801b10c <pbuf_alloc+0x1cc>
    }
    default:
      LWIP_ASSERT("pbuf_alloc: erroneous type", 0);
 801b0fa:	4b07      	ldr	r3, [pc, #28]	@ (801b118 <pbuf_alloc+0x1d8>)
 801b0fc:	f240 1227 	movw	r2, #295	@ 0x127
 801b100:	490a      	ldr	r1, [pc, #40]	@ (801b12c <pbuf_alloc+0x1ec>)
 801b102:	4807      	ldr	r0, [pc, #28]	@ (801b120 <pbuf_alloc+0x1e0>)
 801b104:	f00f fcaa 	bl	802aa5c <iprintf>
      return NULL;
 801b108:	2300      	movs	r3, #0
 801b10a:	e001      	b.n	801b110 <pbuf_alloc+0x1d0>
      break;
 801b10c:	bf00      	nop
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p));
  return p;
 801b10e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 801b110:	4618      	mov	r0, r3
 801b112:	3728      	adds	r7, #40	@ 0x28
 801b114:	46bd      	mov	sp, r7
 801b116:	bd80      	pop	{r7, pc}
 801b118:	0802f320 	.word	0x0802f320
 801b11c:	0802f350 	.word	0x0802f350
 801b120:	0802f380 	.word	0x0802f380
 801b124:	0802f3a8 	.word	0x0802f3a8
 801b128:	0802f3dc 	.word	0x0802f3dc
 801b12c:	0802f408 	.word	0x0802f408

0801b130 <pbuf_alloc_reference>:
 *
 * @return the allocated pbuf.
 */
struct pbuf *
pbuf_alloc_reference(void *payload, u16_t length, pbuf_type type)
{
 801b130:	b580      	push	{r7, lr}
 801b132:	b086      	sub	sp, #24
 801b134:	af02      	add	r7, sp, #8
 801b136:	6078      	str	r0, [r7, #4]
 801b138:	460b      	mov	r3, r1
 801b13a:	807b      	strh	r3, [r7, #2]
 801b13c:	4613      	mov	r3, r2
 801b13e:	803b      	strh	r3, [r7, #0]
  struct pbuf *p;
  LWIP_ASSERT("invalid pbuf_type", (type == PBUF_REF) || (type == PBUF_ROM));
 801b140:	883b      	ldrh	r3, [r7, #0]
 801b142:	2b41      	cmp	r3, #65	@ 0x41
 801b144:	d009      	beq.n	801b15a <pbuf_alloc_reference+0x2a>
 801b146:	883b      	ldrh	r3, [r7, #0]
 801b148:	2b01      	cmp	r3, #1
 801b14a:	d006      	beq.n	801b15a <pbuf_alloc_reference+0x2a>
 801b14c:	4b0f      	ldr	r3, [pc, #60]	@ (801b18c <pbuf_alloc_reference+0x5c>)
 801b14e:	f44f 72a5 	mov.w	r2, #330	@ 0x14a
 801b152:	490f      	ldr	r1, [pc, #60]	@ (801b190 <pbuf_alloc_reference+0x60>)
 801b154:	480f      	ldr	r0, [pc, #60]	@ (801b194 <pbuf_alloc_reference+0x64>)
 801b156:	f00f fc81 	bl	802aa5c <iprintf>
  /* only allocate memory for the pbuf structure */
  p = (struct pbuf *)memp_malloc(MEMP_PBUF);
 801b15a:	200b      	movs	r0, #11
 801b15c:	f7ff faa2 	bl	801a6a4 <memp_malloc>
 801b160:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 801b162:	68fb      	ldr	r3, [r7, #12]
 801b164:	2b00      	cmp	r3, #0
 801b166:	d101      	bne.n	801b16c <pbuf_alloc_reference+0x3c>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_alloc_reference: Could not allocate MEMP_PBUF for PBUF_%s.\n",
                 (type == PBUF_ROM) ? "ROM" : "REF"));
    return NULL;
 801b168:	2300      	movs	r3, #0
 801b16a:	e00b      	b.n	801b184 <pbuf_alloc_reference+0x54>
  }
  pbuf_init_alloced_pbuf(p, payload, length, length, type, 0);
 801b16c:	8879      	ldrh	r1, [r7, #2]
 801b16e:	887a      	ldrh	r2, [r7, #2]
 801b170:	2300      	movs	r3, #0
 801b172:	9301      	str	r3, [sp, #4]
 801b174:	883b      	ldrh	r3, [r7, #0]
 801b176:	9300      	str	r3, [sp, #0]
 801b178:	460b      	mov	r3, r1
 801b17a:	6879      	ldr	r1, [r7, #4]
 801b17c:	68f8      	ldr	r0, [r7, #12]
 801b17e:	f7ff feb5 	bl	801aeec <pbuf_init_alloced_pbuf>
  return p;
 801b182:	68fb      	ldr	r3, [r7, #12]
}
 801b184:	4618      	mov	r0, r3
 801b186:	3710      	adds	r7, #16
 801b188:	46bd      	mov	sp, r7
 801b18a:	bd80      	pop	{r7, pc}
 801b18c:	0802f320 	.word	0x0802f320
 801b190:	0802f424 	.word	0x0802f424
 801b194:	0802f380 	.word	0x0802f380

0801b198 <pbuf_alloced_custom>:
 *        big enough to hold 'length' plus the header size
 */
struct pbuf *
pbuf_alloced_custom(pbuf_layer l, u16_t length, pbuf_type type, struct pbuf_custom *p,
                    void *payload_mem, u16_t payload_mem_len)
{
 801b198:	b580      	push	{r7, lr}
 801b19a:	b088      	sub	sp, #32
 801b19c:	af02      	add	r7, sp, #8
 801b19e:	607b      	str	r3, [r7, #4]
 801b1a0:	4603      	mov	r3, r0
 801b1a2:	73fb      	strb	r3, [r7, #15]
 801b1a4:	460b      	mov	r3, r1
 801b1a6:	81bb      	strh	r3, [r7, #12]
 801b1a8:	4613      	mov	r3, r2
 801b1aa:	817b      	strh	r3, [r7, #10]
  u16_t offset = (u16_t)l;
 801b1ac:	7bfb      	ldrb	r3, [r7, #15]
 801b1ae:	827b      	strh	r3, [r7, #18]
  void *payload;
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloced_custom(length=%"U16_F")\n", length));

  if (LWIP_MEM_ALIGN_SIZE(offset) + length > payload_mem_len) {
 801b1b0:	8a7b      	ldrh	r3, [r7, #18]
 801b1b2:	3303      	adds	r3, #3
 801b1b4:	f023 0203 	bic.w	r2, r3, #3
 801b1b8:	89bb      	ldrh	r3, [r7, #12]
 801b1ba:	441a      	add	r2, r3
 801b1bc:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 801b1be:	429a      	cmp	r2, r3
 801b1c0:	d901      	bls.n	801b1c6 <pbuf_alloced_custom+0x2e>
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_WARNING, ("pbuf_alloced_custom(length=%"U16_F") buffer too short\n", length));
    return NULL;
 801b1c2:	2300      	movs	r3, #0
 801b1c4:	e018      	b.n	801b1f8 <pbuf_alloced_custom+0x60>
  }

  if (payload_mem != NULL) {
 801b1c6:	6a3b      	ldr	r3, [r7, #32]
 801b1c8:	2b00      	cmp	r3, #0
 801b1ca:	d007      	beq.n	801b1dc <pbuf_alloced_custom+0x44>
    payload = (u8_t *)payload_mem + LWIP_MEM_ALIGN_SIZE(offset);
 801b1cc:	8a7b      	ldrh	r3, [r7, #18]
 801b1ce:	3303      	adds	r3, #3
 801b1d0:	f023 0303 	bic.w	r3, r3, #3
 801b1d4:	6a3a      	ldr	r2, [r7, #32]
 801b1d6:	4413      	add	r3, r2
 801b1d8:	617b      	str	r3, [r7, #20]
 801b1da:	e001      	b.n	801b1e0 <pbuf_alloced_custom+0x48>
  } else {
    payload = NULL;
 801b1dc:	2300      	movs	r3, #0
 801b1de:	617b      	str	r3, [r7, #20]
  }
  pbuf_init_alloced_pbuf(&p->pbuf, payload, length, length, type, PBUF_FLAG_IS_CUSTOM);
 801b1e0:	6878      	ldr	r0, [r7, #4]
 801b1e2:	89b9      	ldrh	r1, [r7, #12]
 801b1e4:	89ba      	ldrh	r2, [r7, #12]
 801b1e6:	2302      	movs	r3, #2
 801b1e8:	9301      	str	r3, [sp, #4]
 801b1ea:	897b      	ldrh	r3, [r7, #10]
 801b1ec:	9300      	str	r3, [sp, #0]
 801b1ee:	460b      	mov	r3, r1
 801b1f0:	6979      	ldr	r1, [r7, #20]
 801b1f2:	f7ff fe7b 	bl	801aeec <pbuf_init_alloced_pbuf>
  return &p->pbuf;
 801b1f6:	687b      	ldr	r3, [r7, #4]
}
 801b1f8:	4618      	mov	r0, r3
 801b1fa:	3718      	adds	r7, #24
 801b1fc:	46bd      	mov	sp, r7
 801b1fe:	bd80      	pop	{r7, pc}

0801b200 <pbuf_realloc>:
 *
 * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain).
 */
void
pbuf_realloc(struct pbuf *p, u16_t new_len)
{
 801b200:	b580      	push	{r7, lr}
 801b202:	b084      	sub	sp, #16
 801b204:	af00      	add	r7, sp, #0
 801b206:	6078      	str	r0, [r7, #4]
 801b208:	460b      	mov	r3, r1
 801b20a:	807b      	strh	r3, [r7, #2]
  struct pbuf *q;
  u16_t rem_len; /* remaining length */
  u16_t shrink;

  LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL);
 801b20c:	687b      	ldr	r3, [r7, #4]
 801b20e:	2b00      	cmp	r3, #0
 801b210:	d106      	bne.n	801b220 <pbuf_realloc+0x20>
 801b212:	4b39      	ldr	r3, [pc, #228]	@ (801b2f8 <pbuf_realloc+0xf8>)
 801b214:	f44f 72cc 	mov.w	r2, #408	@ 0x198
 801b218:	4938      	ldr	r1, [pc, #224]	@ (801b2fc <pbuf_realloc+0xfc>)
 801b21a:	4839      	ldr	r0, [pc, #228]	@ (801b300 <pbuf_realloc+0x100>)
 801b21c:	f00f fc1e 	bl	802aa5c <iprintf>

  /* desired length larger than current length? */
  if (new_len >= p->tot_len) {
 801b220:	687b      	ldr	r3, [r7, #4]
 801b222:	891b      	ldrh	r3, [r3, #8]
 801b224:	887a      	ldrh	r2, [r7, #2]
 801b226:	429a      	cmp	r2, r3
 801b228:	d261      	bcs.n	801b2ee <pbuf_realloc+0xee>
    return;
  }

  /* the pbuf chain grows by (new_len - p->tot_len) bytes
   * (which may be negative in case of shrinking) */
  shrink = (u16_t)(p->tot_len - new_len);
 801b22a:	687b      	ldr	r3, [r7, #4]
 801b22c:	891a      	ldrh	r2, [r3, #8]
 801b22e:	887b      	ldrh	r3, [r7, #2]
 801b230:	1ad3      	subs	r3, r2, r3
 801b232:	813b      	strh	r3, [r7, #8]

  /* first, step over any pbufs that should remain in the chain */
  rem_len = new_len;
 801b234:	887b      	ldrh	r3, [r7, #2]
 801b236:	817b      	strh	r3, [r7, #10]
  q = p;
 801b238:	687b      	ldr	r3, [r7, #4]
 801b23a:	60fb      	str	r3, [r7, #12]
  /* should this pbuf be kept? */
  while (rem_len > q->len) {
 801b23c:	e018      	b.n	801b270 <pbuf_realloc+0x70>
    /* decrease remaining length by pbuf length */
    rem_len = (u16_t)(rem_len - q->len);
 801b23e:	68fb      	ldr	r3, [r7, #12]
 801b240:	895b      	ldrh	r3, [r3, #10]
 801b242:	897a      	ldrh	r2, [r7, #10]
 801b244:	1ad3      	subs	r3, r2, r3
 801b246:	817b      	strh	r3, [r7, #10]
    /* decrease total length indicator */
    q->tot_len = (u16_t)(q->tot_len - shrink);
 801b248:	68fb      	ldr	r3, [r7, #12]
 801b24a:	891a      	ldrh	r2, [r3, #8]
 801b24c:	893b      	ldrh	r3, [r7, #8]
 801b24e:	1ad3      	subs	r3, r2, r3
 801b250:	b29a      	uxth	r2, r3
 801b252:	68fb      	ldr	r3, [r7, #12]
 801b254:	811a      	strh	r2, [r3, #8]
    /* proceed to next pbuf in chain */
    q = q->next;
 801b256:	68fb      	ldr	r3, [r7, #12]
 801b258:	681b      	ldr	r3, [r3, #0]
 801b25a:	60fb      	str	r3, [r7, #12]
    LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL);
 801b25c:	68fb      	ldr	r3, [r7, #12]
 801b25e:	2b00      	cmp	r3, #0
 801b260:	d106      	bne.n	801b270 <pbuf_realloc+0x70>
 801b262:	4b25      	ldr	r3, [pc, #148]	@ (801b2f8 <pbuf_realloc+0xf8>)
 801b264:	f240 12af 	movw	r2, #431	@ 0x1af
 801b268:	4926      	ldr	r1, [pc, #152]	@ (801b304 <pbuf_realloc+0x104>)
 801b26a:	4825      	ldr	r0, [pc, #148]	@ (801b300 <pbuf_realloc+0x100>)
 801b26c:	f00f fbf6 	bl	802aa5c <iprintf>
  while (rem_len > q->len) {
 801b270:	68fb      	ldr	r3, [r7, #12]
 801b272:	895b      	ldrh	r3, [r3, #10]
 801b274:	897a      	ldrh	r2, [r7, #10]
 801b276:	429a      	cmp	r2, r3
 801b278:	d8e1      	bhi.n	801b23e <pbuf_realloc+0x3e>
  /* we have now reached the new last pbuf (in q) */
  /* rem_len == desired length for pbuf q */

  /* shrink allocated memory for PBUF_RAM */
  /* (other types merely adjust their length fields */
  if (pbuf_match_allocsrc(q, PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) && (rem_len != q->len)
 801b27a:	68fb      	ldr	r3, [r7, #12]
 801b27c:	7b1b      	ldrb	r3, [r3, #12]
 801b27e:	f003 030f 	and.w	r3, r3, #15
 801b282:	2b00      	cmp	r3, #0
 801b284:	d11f      	bne.n	801b2c6 <pbuf_realloc+0xc6>
 801b286:	68fb      	ldr	r3, [r7, #12]
 801b288:	895b      	ldrh	r3, [r3, #10]
 801b28a:	897a      	ldrh	r2, [r7, #10]
 801b28c:	429a      	cmp	r2, r3
 801b28e:	d01a      	beq.n	801b2c6 <pbuf_realloc+0xc6>
#if LWIP_SUPPORT_CUSTOM_PBUF
      && ((q->flags & PBUF_FLAG_IS_CUSTOM) == 0)
 801b290:	68fb      	ldr	r3, [r7, #12]
 801b292:	7b5b      	ldrb	r3, [r3, #13]
 801b294:	f003 0302 	and.w	r3, r3, #2
 801b298:	2b00      	cmp	r3, #0
 801b29a:	d114      	bne.n	801b2c6 <pbuf_realloc+0xc6>
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
     ) {
    /* reallocate and adjust the length of the pbuf that will be split */
    q = (struct pbuf *)mem_trim(q, (mem_size_t)(((u8_t *)q->payload - (u8_t *)q) + rem_len));
 801b29c:	68fb      	ldr	r3, [r7, #12]
 801b29e:	685a      	ldr	r2, [r3, #4]
 801b2a0:	68fb      	ldr	r3, [r7, #12]
 801b2a2:	1ad2      	subs	r2, r2, r3
 801b2a4:	897b      	ldrh	r3, [r7, #10]
 801b2a6:	4413      	add	r3, r2
 801b2a8:	4619      	mov	r1, r3
 801b2aa:	68f8      	ldr	r0, [r7, #12]
 801b2ac:	f7fe ff5c 	bl	801a168 <mem_trim>
 801b2b0:	60f8      	str	r0, [r7, #12]
    LWIP_ASSERT("mem_trim returned q == NULL", q != NULL);
 801b2b2:	68fb      	ldr	r3, [r7, #12]
 801b2b4:	2b00      	cmp	r3, #0
 801b2b6:	d106      	bne.n	801b2c6 <pbuf_realloc+0xc6>
 801b2b8:	4b0f      	ldr	r3, [pc, #60]	@ (801b2f8 <pbuf_realloc+0xf8>)
 801b2ba:	f240 12bd 	movw	r2, #445	@ 0x1bd
 801b2be:	4912      	ldr	r1, [pc, #72]	@ (801b308 <pbuf_realloc+0x108>)
 801b2c0:	480f      	ldr	r0, [pc, #60]	@ (801b300 <pbuf_realloc+0x100>)
 801b2c2:	f00f fbcb 	bl	802aa5c <iprintf>
  }
  /* adjust length fields for new last pbuf */
  q->len = rem_len;
 801b2c6:	68fb      	ldr	r3, [r7, #12]
 801b2c8:	897a      	ldrh	r2, [r7, #10]
 801b2ca:	815a      	strh	r2, [r3, #10]
  q->tot_len = q->len;
 801b2cc:	68fb      	ldr	r3, [r7, #12]
 801b2ce:	895a      	ldrh	r2, [r3, #10]
 801b2d0:	68fb      	ldr	r3, [r7, #12]
 801b2d2:	811a      	strh	r2, [r3, #8]

  /* any remaining pbufs in chain? */
  if (q->next != NULL) {
 801b2d4:	68fb      	ldr	r3, [r7, #12]
 801b2d6:	681b      	ldr	r3, [r3, #0]
 801b2d8:	2b00      	cmp	r3, #0
 801b2da:	d004      	beq.n	801b2e6 <pbuf_realloc+0xe6>
    /* free remaining pbufs in chain */
    pbuf_free(q->next);
 801b2dc:	68fb      	ldr	r3, [r7, #12]
 801b2de:	681b      	ldr	r3, [r3, #0]
 801b2e0:	4618      	mov	r0, r3
 801b2e2:	f000 f943 	bl	801b56c <pbuf_free>
  }
  /* q is last packet in chain */
  q->next = NULL;
 801b2e6:	68fb      	ldr	r3, [r7, #12]
 801b2e8:	2200      	movs	r2, #0
 801b2ea:	601a      	str	r2, [r3, #0]
 801b2ec:	e000      	b.n	801b2f0 <pbuf_realloc+0xf0>
    return;
 801b2ee:	bf00      	nop

}
 801b2f0:	3710      	adds	r7, #16
 801b2f2:	46bd      	mov	sp, r7
 801b2f4:	bd80      	pop	{r7, pc}
 801b2f6:	bf00      	nop
 801b2f8:	0802f320 	.word	0x0802f320
 801b2fc:	0802f438 	.word	0x0802f438
 801b300:	0802f380 	.word	0x0802f380
 801b304:	0802f450 	.word	0x0802f450
 801b308:	0802f468 	.word	0x0802f468

0801b30c <pbuf_add_header_impl>:
 * @return non-zero on failure, zero on success.
 *
 */
static u8_t
pbuf_add_header_impl(struct pbuf *p, size_t header_size_increment, u8_t force)
{
 801b30c:	b580      	push	{r7, lr}
 801b30e:	b086      	sub	sp, #24
 801b310:	af00      	add	r7, sp, #0
 801b312:	60f8      	str	r0, [r7, #12]
 801b314:	60b9      	str	r1, [r7, #8]
 801b316:	4613      	mov	r3, r2
 801b318:	71fb      	strb	r3, [r7, #7]
  u16_t type_internal;
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 801b31a:	68fb      	ldr	r3, [r7, #12]
 801b31c:	2b00      	cmp	r3, #0
 801b31e:	d106      	bne.n	801b32e <pbuf_add_header_impl+0x22>
 801b320:	4b2b      	ldr	r3, [pc, #172]	@ (801b3d0 <pbuf_add_header_impl+0xc4>)
 801b322:	f240 12df 	movw	r2, #479	@ 0x1df
 801b326:	492b      	ldr	r1, [pc, #172]	@ (801b3d4 <pbuf_add_header_impl+0xc8>)
 801b328:	482b      	ldr	r0, [pc, #172]	@ (801b3d8 <pbuf_add_header_impl+0xcc>)
 801b32a:	f00f fb97 	bl	802aa5c <iprintf>
  if ((p == NULL) || (header_size_increment > 0xFFFF)) {
 801b32e:	68fb      	ldr	r3, [r7, #12]
 801b330:	2b00      	cmp	r3, #0
 801b332:	d003      	beq.n	801b33c <pbuf_add_header_impl+0x30>
 801b334:	68bb      	ldr	r3, [r7, #8]
 801b336:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801b33a:	d301      	bcc.n	801b340 <pbuf_add_header_impl+0x34>
    return 1;
 801b33c:	2301      	movs	r3, #1
 801b33e:	e043      	b.n	801b3c8 <pbuf_add_header_impl+0xbc>
  }
  if (header_size_increment == 0) {
 801b340:	68bb      	ldr	r3, [r7, #8]
 801b342:	2b00      	cmp	r3, #0
 801b344:	d101      	bne.n	801b34a <pbuf_add_header_impl+0x3e>
    return 0;
 801b346:	2300      	movs	r3, #0
 801b348:	e03e      	b.n	801b3c8 <pbuf_add_header_impl+0xbc>
  }

  increment_magnitude = (u16_t)header_size_increment;
 801b34a:	68bb      	ldr	r3, [r7, #8]
 801b34c:	827b      	strh	r3, [r7, #18]
  /* Do not allow tot_len to wrap as a result. */
  if ((u16_t)(increment_magnitude + p->tot_len) < increment_magnitude) {
 801b34e:	68fb      	ldr	r3, [r7, #12]
 801b350:	891a      	ldrh	r2, [r3, #8]
 801b352:	8a7b      	ldrh	r3, [r7, #18]
 801b354:	4413      	add	r3, r2
 801b356:	b29b      	uxth	r3, r3
 801b358:	8a7a      	ldrh	r2, [r7, #18]
 801b35a:	429a      	cmp	r2, r3
 801b35c:	d901      	bls.n	801b362 <pbuf_add_header_impl+0x56>
    return 1;
 801b35e:	2301      	movs	r3, #1
 801b360:	e032      	b.n	801b3c8 <pbuf_add_header_impl+0xbc>
  }

  type_internal = p->type_internal;
 801b362:	68fb      	ldr	r3, [r7, #12]
 801b364:	7b1b      	ldrb	r3, [r3, #12]
 801b366:	823b      	strh	r3, [r7, #16]

  /* pbuf types containing payloads? */
  if (type_internal & PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS) {
 801b368:	8a3b      	ldrh	r3, [r7, #16]
 801b36a:	f003 0380 	and.w	r3, r3, #128	@ 0x80
 801b36e:	2b00      	cmp	r3, #0
 801b370:	d00c      	beq.n	801b38c <pbuf_add_header_impl+0x80>
    /* set new payload pointer */
    payload = (u8_t *)p->payload - header_size_increment;
 801b372:	68fb      	ldr	r3, [r7, #12]
 801b374:	685a      	ldr	r2, [r3, #4]
 801b376:	68bb      	ldr	r3, [r7, #8]
 801b378:	425b      	negs	r3, r3
 801b37a:	4413      	add	r3, r2
 801b37c:	617b      	str	r3, [r7, #20]
    /* boundary check fails? */
    if ((u8_t *)payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) {
 801b37e:	68fb      	ldr	r3, [r7, #12]
 801b380:	3310      	adds	r3, #16
 801b382:	697a      	ldr	r2, [r7, #20]
 801b384:	429a      	cmp	r2, r3
 801b386:	d20d      	bcs.n	801b3a4 <pbuf_add_header_impl+0x98>
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE,
                   ("pbuf_add_header: failed as %p < %p (not enough space for new header size)\n",
                    (void *)payload, (void *)((u8_t *)p + SIZEOF_STRUCT_PBUF)));
      /* bail out unsuccessfully */
      return 1;
 801b388:	2301      	movs	r3, #1
 801b38a:	e01d      	b.n	801b3c8 <pbuf_add_header_impl+0xbc>
    }
    /* pbuf types referring to external payloads? */
  } else {
    /* hide a header in the payload? */
    if (force) {
 801b38c:	79fb      	ldrb	r3, [r7, #7]
 801b38e:	2b00      	cmp	r3, #0
 801b390:	d006      	beq.n	801b3a0 <pbuf_add_header_impl+0x94>
      payload = (u8_t *)p->payload - header_size_increment;
 801b392:	68fb      	ldr	r3, [r7, #12]
 801b394:	685a      	ldr	r2, [r3, #4]
 801b396:	68bb      	ldr	r3, [r7, #8]
 801b398:	425b      	negs	r3, r3
 801b39a:	4413      	add	r3, r2
 801b39c:	617b      	str	r3, [r7, #20]
 801b39e:	e001      	b.n	801b3a4 <pbuf_add_header_impl+0x98>
    } else {
      /* cannot expand payload to front (yet!)
       * bail out unsuccessfully */
      return 1;
 801b3a0:	2301      	movs	r3, #1
 801b3a2:	e011      	b.n	801b3c8 <pbuf_add_header_impl+0xbc>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_add_header: old %p new %p (%"U16_F")\n",
              (void *)p->payload, (void *)payload, increment_magnitude));

  /* modify pbuf fields */
  p->payload = payload;
 801b3a4:	68fb      	ldr	r3, [r7, #12]
 801b3a6:	697a      	ldr	r2, [r7, #20]
 801b3a8:	605a      	str	r2, [r3, #4]
  p->len = (u16_t)(p->len + increment_magnitude);
 801b3aa:	68fb      	ldr	r3, [r7, #12]
 801b3ac:	895a      	ldrh	r2, [r3, #10]
 801b3ae:	8a7b      	ldrh	r3, [r7, #18]
 801b3b0:	4413      	add	r3, r2
 801b3b2:	b29a      	uxth	r2, r3
 801b3b4:	68fb      	ldr	r3, [r7, #12]
 801b3b6:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len + increment_magnitude);
 801b3b8:	68fb      	ldr	r3, [r7, #12]
 801b3ba:	891a      	ldrh	r2, [r3, #8]
 801b3bc:	8a7b      	ldrh	r3, [r7, #18]
 801b3be:	4413      	add	r3, r2
 801b3c0:	b29a      	uxth	r2, r3
 801b3c2:	68fb      	ldr	r3, [r7, #12]
 801b3c4:	811a      	strh	r2, [r3, #8]


  return 0;
 801b3c6:	2300      	movs	r3, #0
}
 801b3c8:	4618      	mov	r0, r3
 801b3ca:	3718      	adds	r7, #24
 801b3cc:	46bd      	mov	sp, r7
 801b3ce:	bd80      	pop	{r7, pc}
 801b3d0:	0802f320 	.word	0x0802f320
 801b3d4:	0802f484 	.word	0x0802f484
 801b3d8:	0802f380 	.word	0x0802f380

0801b3dc <pbuf_add_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_add_header(struct pbuf *p, size_t header_size_increment)
{
 801b3dc:	b580      	push	{r7, lr}
 801b3de:	b082      	sub	sp, #8
 801b3e0:	af00      	add	r7, sp, #0
 801b3e2:	6078      	str	r0, [r7, #4]
 801b3e4:	6039      	str	r1, [r7, #0]
  return pbuf_add_header_impl(p, header_size_increment, 0);
 801b3e6:	2200      	movs	r2, #0
 801b3e8:	6839      	ldr	r1, [r7, #0]
 801b3ea:	6878      	ldr	r0, [r7, #4]
 801b3ec:	f7ff ff8e 	bl	801b30c <pbuf_add_header_impl>
 801b3f0:	4603      	mov	r3, r0
}
 801b3f2:	4618      	mov	r0, r3
 801b3f4:	3708      	adds	r7, #8
 801b3f6:	46bd      	mov	sp, r7
 801b3f8:	bd80      	pop	{r7, pc}
	...

0801b3fc <pbuf_remove_header>:
 * @return non-zero on failure, zero on success.
 *
 */
u8_t
pbuf_remove_header(struct pbuf *p, size_t header_size_decrement)
{
 801b3fc:	b580      	push	{r7, lr}
 801b3fe:	b084      	sub	sp, #16
 801b400:	af00      	add	r7, sp, #0
 801b402:	6078      	str	r0, [r7, #4]
 801b404:	6039      	str	r1, [r7, #0]
  void *payload;
  u16_t increment_magnitude;

  LWIP_ASSERT("p != NULL", p != NULL);
 801b406:	687b      	ldr	r3, [r7, #4]
 801b408:	2b00      	cmp	r3, #0
 801b40a:	d106      	bne.n	801b41a <pbuf_remove_header+0x1e>
 801b40c:	4b20      	ldr	r3, [pc, #128]	@ (801b490 <pbuf_remove_header+0x94>)
 801b40e:	f240 224b 	movw	r2, #587	@ 0x24b
 801b412:	4920      	ldr	r1, [pc, #128]	@ (801b494 <pbuf_remove_header+0x98>)
 801b414:	4820      	ldr	r0, [pc, #128]	@ (801b498 <pbuf_remove_header+0x9c>)
 801b416:	f00f fb21 	bl	802aa5c <iprintf>
  if ((p == NULL) || (header_size_decrement > 0xFFFF)) {
 801b41a:	687b      	ldr	r3, [r7, #4]
 801b41c:	2b00      	cmp	r3, #0
 801b41e:	d003      	beq.n	801b428 <pbuf_remove_header+0x2c>
 801b420:	683b      	ldr	r3, [r7, #0]
 801b422:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801b426:	d301      	bcc.n	801b42c <pbuf_remove_header+0x30>
    return 1;
 801b428:	2301      	movs	r3, #1
 801b42a:	e02c      	b.n	801b486 <pbuf_remove_header+0x8a>
  }
  if (header_size_decrement == 0) {
 801b42c:	683b      	ldr	r3, [r7, #0]
 801b42e:	2b00      	cmp	r3, #0
 801b430:	d101      	bne.n	801b436 <pbuf_remove_header+0x3a>
    return 0;
 801b432:	2300      	movs	r3, #0
 801b434:	e027      	b.n	801b486 <pbuf_remove_header+0x8a>
  }

  increment_magnitude = (u16_t)header_size_decrement;
 801b436:	683b      	ldr	r3, [r7, #0]
 801b438:	81fb      	strh	r3, [r7, #14]
  /* Check that we aren't going to move off the end of the pbuf */
  LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;);
 801b43a:	687b      	ldr	r3, [r7, #4]
 801b43c:	895b      	ldrh	r3, [r3, #10]
 801b43e:	89fa      	ldrh	r2, [r7, #14]
 801b440:	429a      	cmp	r2, r3
 801b442:	d908      	bls.n	801b456 <pbuf_remove_header+0x5a>
 801b444:	4b12      	ldr	r3, [pc, #72]	@ (801b490 <pbuf_remove_header+0x94>)
 801b446:	f240 2255 	movw	r2, #597	@ 0x255
 801b44a:	4914      	ldr	r1, [pc, #80]	@ (801b49c <pbuf_remove_header+0xa0>)
 801b44c:	4812      	ldr	r0, [pc, #72]	@ (801b498 <pbuf_remove_header+0x9c>)
 801b44e:	f00f fb05 	bl	802aa5c <iprintf>
 801b452:	2301      	movs	r3, #1
 801b454:	e017      	b.n	801b486 <pbuf_remove_header+0x8a>

  /* remember current payload pointer */
  payload = p->payload;
 801b456:	687b      	ldr	r3, [r7, #4]
 801b458:	685b      	ldr	r3, [r3, #4]
 801b45a:	60bb      	str	r3, [r7, #8]
  LWIP_UNUSED_ARG(payload); /* only used in LWIP_DEBUGF below */

  /* increase payload pointer (guarded by length check above) */
  p->payload = (u8_t *)p->payload + header_size_decrement;
 801b45c:	687b      	ldr	r3, [r7, #4]
 801b45e:	685a      	ldr	r2, [r3, #4]
 801b460:	683b      	ldr	r3, [r7, #0]
 801b462:	441a      	add	r2, r3
 801b464:	687b      	ldr	r3, [r7, #4]
 801b466:	605a      	str	r2, [r3, #4]
  /* modify pbuf length fields */
  p->len = (u16_t)(p->len - increment_magnitude);
 801b468:	687b      	ldr	r3, [r7, #4]
 801b46a:	895a      	ldrh	r2, [r3, #10]
 801b46c:	89fb      	ldrh	r3, [r7, #14]
 801b46e:	1ad3      	subs	r3, r2, r3
 801b470:	b29a      	uxth	r2, r3
 801b472:	687b      	ldr	r3, [r7, #4]
 801b474:	815a      	strh	r2, [r3, #10]
  p->tot_len = (u16_t)(p->tot_len - increment_magnitude);
 801b476:	687b      	ldr	r3, [r7, #4]
 801b478:	891a      	ldrh	r2, [r3, #8]
 801b47a:	89fb      	ldrh	r3, [r7, #14]
 801b47c:	1ad3      	subs	r3, r2, r3
 801b47e:	b29a      	uxth	r2, r3
 801b480:	687b      	ldr	r3, [r7, #4]
 801b482:	811a      	strh	r2, [r3, #8]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_remove_header: old %p new %p (%"U16_F")\n",
              (void *)payload, (void *)p->payload, increment_magnitude));

  return 0;
 801b484:	2300      	movs	r3, #0
}
 801b486:	4618      	mov	r0, r3
 801b488:	3710      	adds	r7, #16
 801b48a:	46bd      	mov	sp, r7
 801b48c:	bd80      	pop	{r7, pc}
 801b48e:	bf00      	nop
 801b490:	0802f320 	.word	0x0802f320
 801b494:	0802f484 	.word	0x0802f484
 801b498:	0802f380 	.word	0x0802f380
 801b49c:	0802f490 	.word	0x0802f490

0801b4a0 <pbuf_header_impl>:

static u8_t
pbuf_header_impl(struct pbuf *p, s16_t header_size_increment, u8_t force)
{
 801b4a0:	b580      	push	{r7, lr}
 801b4a2:	b082      	sub	sp, #8
 801b4a4:	af00      	add	r7, sp, #0
 801b4a6:	6078      	str	r0, [r7, #4]
 801b4a8:	460b      	mov	r3, r1
 801b4aa:	807b      	strh	r3, [r7, #2]
 801b4ac:	4613      	mov	r3, r2
 801b4ae:	707b      	strb	r3, [r7, #1]
  if (header_size_increment < 0) {
 801b4b0:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801b4b4:	2b00      	cmp	r3, #0
 801b4b6:	da08      	bge.n	801b4ca <pbuf_header_impl+0x2a>
    return pbuf_remove_header(p, (size_t) - header_size_increment);
 801b4b8:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801b4bc:	425b      	negs	r3, r3
 801b4be:	4619      	mov	r1, r3
 801b4c0:	6878      	ldr	r0, [r7, #4]
 801b4c2:	f7ff ff9b 	bl	801b3fc <pbuf_remove_header>
 801b4c6:	4603      	mov	r3, r0
 801b4c8:	e007      	b.n	801b4da <pbuf_header_impl+0x3a>
  } else {
    return pbuf_add_header_impl(p, (size_t)header_size_increment, force);
 801b4ca:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801b4ce:	787a      	ldrb	r2, [r7, #1]
 801b4d0:	4619      	mov	r1, r3
 801b4d2:	6878      	ldr	r0, [r7, #4]
 801b4d4:	f7ff ff1a 	bl	801b30c <pbuf_add_header_impl>
 801b4d8:	4603      	mov	r3, r0
  }
}
 801b4da:	4618      	mov	r0, r3
 801b4dc:	3708      	adds	r7, #8
 801b4de:	46bd      	mov	sp, r7
 801b4e0:	bd80      	pop	{r7, pc}

0801b4e2 <pbuf_header_force>:
 * Same as pbuf_header but does not check if 'header_size > 0' is allowed.
 * This is used internally only, to allow PBUF_REF for RX.
 */
u8_t
pbuf_header_force(struct pbuf *p, s16_t header_size_increment)
{
 801b4e2:	b580      	push	{r7, lr}
 801b4e4:	b082      	sub	sp, #8
 801b4e6:	af00      	add	r7, sp, #0
 801b4e8:	6078      	str	r0, [r7, #4]
 801b4ea:	460b      	mov	r3, r1
 801b4ec:	807b      	strh	r3, [r7, #2]
  return pbuf_header_impl(p, header_size_increment, 1);
 801b4ee:	f9b7 3002 	ldrsh.w	r3, [r7, #2]
 801b4f2:	2201      	movs	r2, #1
 801b4f4:	4619      	mov	r1, r3
 801b4f6:	6878      	ldr	r0, [r7, #4]
 801b4f8:	f7ff ffd2 	bl	801b4a0 <pbuf_header_impl>
 801b4fc:	4603      	mov	r3, r0
}
 801b4fe:	4618      	mov	r0, r3
 801b500:	3708      	adds	r7, #8
 801b502:	46bd      	mov	sp, r7
 801b504:	bd80      	pop	{r7, pc}

0801b506 <pbuf_free_header>:
 *                   takes an u16_t not s16_t!
 * @return the new head pbuf
 */
struct pbuf *
pbuf_free_header(struct pbuf *q, u16_t size)
{
 801b506:	b580      	push	{r7, lr}
 801b508:	b086      	sub	sp, #24
 801b50a:	af00      	add	r7, sp, #0
 801b50c:	6078      	str	r0, [r7, #4]
 801b50e:	460b      	mov	r3, r1
 801b510:	807b      	strh	r3, [r7, #2]
  struct pbuf *p = q;
 801b512:	687b      	ldr	r3, [r7, #4]
 801b514:	617b      	str	r3, [r7, #20]
  u16_t free_left = size;
 801b516:	887b      	ldrh	r3, [r7, #2]
 801b518:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 801b51a:	e01c      	b.n	801b556 <pbuf_free_header+0x50>
    if (free_left >= p->len) {
 801b51c:	697b      	ldr	r3, [r7, #20]
 801b51e:	895b      	ldrh	r3, [r3, #10]
 801b520:	8a7a      	ldrh	r2, [r7, #18]
 801b522:	429a      	cmp	r2, r3
 801b524:	d310      	bcc.n	801b548 <pbuf_free_header+0x42>
      struct pbuf *f = p;
 801b526:	697b      	ldr	r3, [r7, #20]
 801b528:	60fb      	str	r3, [r7, #12]
      free_left = (u16_t)(free_left - p->len);
 801b52a:	697b      	ldr	r3, [r7, #20]
 801b52c:	895b      	ldrh	r3, [r3, #10]
 801b52e:	8a7a      	ldrh	r2, [r7, #18]
 801b530:	1ad3      	subs	r3, r2, r3
 801b532:	827b      	strh	r3, [r7, #18]
      p = p->next;
 801b534:	697b      	ldr	r3, [r7, #20]
 801b536:	681b      	ldr	r3, [r3, #0]
 801b538:	617b      	str	r3, [r7, #20]
      f->next = 0;
 801b53a:	68fb      	ldr	r3, [r7, #12]
 801b53c:	2200      	movs	r2, #0
 801b53e:	601a      	str	r2, [r3, #0]
      pbuf_free(f);
 801b540:	68f8      	ldr	r0, [r7, #12]
 801b542:	f000 f813 	bl	801b56c <pbuf_free>
 801b546:	e006      	b.n	801b556 <pbuf_free_header+0x50>
    } else {
      pbuf_remove_header(p, free_left);
 801b548:	8a7b      	ldrh	r3, [r7, #18]
 801b54a:	4619      	mov	r1, r3
 801b54c:	6978      	ldr	r0, [r7, #20]
 801b54e:	f7ff ff55 	bl	801b3fc <pbuf_remove_header>
      free_left = 0;
 801b552:	2300      	movs	r3, #0
 801b554:	827b      	strh	r3, [r7, #18]
  while (free_left && p) {
 801b556:	8a7b      	ldrh	r3, [r7, #18]
 801b558:	2b00      	cmp	r3, #0
 801b55a:	d002      	beq.n	801b562 <pbuf_free_header+0x5c>
 801b55c:	697b      	ldr	r3, [r7, #20]
 801b55e:	2b00      	cmp	r3, #0
 801b560:	d1dc      	bne.n	801b51c <pbuf_free_header+0x16>
    }
  }
  return p;
 801b562:	697b      	ldr	r3, [r7, #20]
}
 801b564:	4618      	mov	r0, r3
 801b566:	3718      	adds	r7, #24
 801b568:	46bd      	mov	sp, r7
 801b56a:	bd80      	pop	{r7, pc}

0801b56c <pbuf_free>:
 * 1->1->1 becomes .......
 *
 */
u8_t
pbuf_free(struct pbuf *p)
{
 801b56c:	b580      	push	{r7, lr}
 801b56e:	b088      	sub	sp, #32
 801b570:	af00      	add	r7, sp, #0
 801b572:	6078      	str	r0, [r7, #4]
  u8_t alloc_src;
  struct pbuf *q;
  u8_t count;

  if (p == NULL) {
 801b574:	687b      	ldr	r3, [r7, #4]
 801b576:	2b00      	cmp	r3, #0
 801b578:	d10b      	bne.n	801b592 <pbuf_free+0x26>
    LWIP_ASSERT("p != NULL", p != NULL);
 801b57a:	687b      	ldr	r3, [r7, #4]
 801b57c:	2b00      	cmp	r3, #0
 801b57e:	d106      	bne.n	801b58e <pbuf_free+0x22>
 801b580:	4b3b      	ldr	r3, [pc, #236]	@ (801b670 <pbuf_free+0x104>)
 801b582:	f44f 7237 	mov.w	r2, #732	@ 0x2dc
 801b586:	493b      	ldr	r1, [pc, #236]	@ (801b674 <pbuf_free+0x108>)
 801b588:	483b      	ldr	r0, [pc, #236]	@ (801b678 <pbuf_free+0x10c>)
 801b58a:	f00f fa67 	bl	802aa5c <iprintf>
    /* if assertions are disabled, proceed with debug output */
    LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                ("pbuf_free(p == NULL) was called.\n"));
    return 0;
 801b58e:	2300      	movs	r3, #0
 801b590:	e069      	b.n	801b666 <pbuf_free+0xfa>
  }
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p));

  PERF_START;

  count = 0;
 801b592:	2300      	movs	r3, #0
 801b594:	77fb      	strb	r3, [r7, #31]
  /* de-allocate all consecutive pbufs from the head of the chain that
   * obtain a zero reference count after decrementing*/
  while (p != NULL) {
 801b596:	e062      	b.n	801b65e <pbuf_free+0xf2>
    LWIP_PBUF_REF_T ref;
    SYS_ARCH_DECL_PROTECT(old_level);
    /* Since decrementing ref cannot be guaranteed to be a single machine operation
     * we must protect it. We put the new ref into a local variable to prevent
     * further protection. */
    SYS_ARCH_PROTECT(old_level);
 801b598:	f00b ffca 	bl	8027530 <sys_arch_protect>
 801b59c:	61b8      	str	r0, [r7, #24]
    /* all pbufs in a chain are referenced at least once */
    LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0);
 801b59e:	687b      	ldr	r3, [r7, #4]
 801b5a0:	7b9b      	ldrb	r3, [r3, #14]
 801b5a2:	2b00      	cmp	r3, #0
 801b5a4:	d106      	bne.n	801b5b4 <pbuf_free+0x48>
 801b5a6:	4b32      	ldr	r3, [pc, #200]	@ (801b670 <pbuf_free+0x104>)
 801b5a8:	f240 22f1 	movw	r2, #753	@ 0x2f1
 801b5ac:	4933      	ldr	r1, [pc, #204]	@ (801b67c <pbuf_free+0x110>)
 801b5ae:	4832      	ldr	r0, [pc, #200]	@ (801b678 <pbuf_free+0x10c>)
 801b5b0:	f00f fa54 	bl	802aa5c <iprintf>
    /* decrease reference count (number of pointers to pbuf) */
    ref = --(p->ref);
 801b5b4:	687b      	ldr	r3, [r7, #4]
 801b5b6:	7b9b      	ldrb	r3, [r3, #14]
 801b5b8:	3b01      	subs	r3, #1
 801b5ba:	b2da      	uxtb	r2, r3
 801b5bc:	687b      	ldr	r3, [r7, #4]
 801b5be:	739a      	strb	r2, [r3, #14]
 801b5c0:	687b      	ldr	r3, [r7, #4]
 801b5c2:	7b9b      	ldrb	r3, [r3, #14]
 801b5c4:	75fb      	strb	r3, [r7, #23]
    SYS_ARCH_UNPROTECT(old_level);
 801b5c6:	69b8      	ldr	r0, [r7, #24]
 801b5c8:	f00b ffc0 	bl	802754c <sys_arch_unprotect>
    /* this pbuf is no longer referenced to? */
    if (ref == 0) {
 801b5cc:	7dfb      	ldrb	r3, [r7, #23]
 801b5ce:	2b00      	cmp	r3, #0
 801b5d0:	d143      	bne.n	801b65a <pbuf_free+0xee>
      /* remember next pbuf in chain for next iteration */
      q = p->next;
 801b5d2:	687b      	ldr	r3, [r7, #4]
 801b5d4:	681b      	ldr	r3, [r3, #0]
 801b5d6:	613b      	str	r3, [r7, #16]
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p));
      alloc_src = pbuf_get_allocsrc(p);
 801b5d8:	687b      	ldr	r3, [r7, #4]
 801b5da:	7b1b      	ldrb	r3, [r3, #12]
 801b5dc:	f003 030f 	and.w	r3, r3, #15
 801b5e0:	73fb      	strb	r3, [r7, #15]
#if LWIP_SUPPORT_CUSTOM_PBUF
      /* is this a custom pbuf? */
      if ((p->flags & PBUF_FLAG_IS_CUSTOM) != 0) {
 801b5e2:	687b      	ldr	r3, [r7, #4]
 801b5e4:	7b5b      	ldrb	r3, [r3, #13]
 801b5e6:	f003 0302 	and.w	r3, r3, #2
 801b5ea:	2b00      	cmp	r3, #0
 801b5ec:	d011      	beq.n	801b612 <pbuf_free+0xa6>
        struct pbuf_custom *pc = (struct pbuf_custom *)p;
 801b5ee:	687b      	ldr	r3, [r7, #4]
 801b5f0:	60bb      	str	r3, [r7, #8]
        LWIP_ASSERT("pc->custom_free_function != NULL", pc->custom_free_function != NULL);
 801b5f2:	68bb      	ldr	r3, [r7, #8]
 801b5f4:	691b      	ldr	r3, [r3, #16]
 801b5f6:	2b00      	cmp	r3, #0
 801b5f8:	d106      	bne.n	801b608 <pbuf_free+0x9c>
 801b5fa:	4b1d      	ldr	r3, [pc, #116]	@ (801b670 <pbuf_free+0x104>)
 801b5fc:	f240 22ff 	movw	r2, #767	@ 0x2ff
 801b600:	491f      	ldr	r1, [pc, #124]	@ (801b680 <pbuf_free+0x114>)
 801b602:	481d      	ldr	r0, [pc, #116]	@ (801b678 <pbuf_free+0x10c>)
 801b604:	f00f fa2a 	bl	802aa5c <iprintf>
        pc->custom_free_function(p);
 801b608:	68bb      	ldr	r3, [r7, #8]
 801b60a:	691b      	ldr	r3, [r3, #16]
 801b60c:	6878      	ldr	r0, [r7, #4]
 801b60e:	4798      	blx	r3
 801b610:	e01d      	b.n	801b64e <pbuf_free+0xe2>
      } else
#endif /* LWIP_SUPPORT_CUSTOM_PBUF */
      {
        /* is this a pbuf from the pool? */
        if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL) {
 801b612:	7bfb      	ldrb	r3, [r7, #15]
 801b614:	2b02      	cmp	r3, #2
 801b616:	d104      	bne.n	801b622 <pbuf_free+0xb6>
          memp_free(MEMP_PBUF_POOL, p);
 801b618:	6879      	ldr	r1, [r7, #4]
 801b61a:	200c      	movs	r0, #12
 801b61c:	f7ff f8b8 	bl	801a790 <memp_free>
 801b620:	e015      	b.n	801b64e <pbuf_free+0xe2>
          /* is this a ROM or RAM referencing pbuf? */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF) {
 801b622:	7bfb      	ldrb	r3, [r7, #15]
 801b624:	2b01      	cmp	r3, #1
 801b626:	d104      	bne.n	801b632 <pbuf_free+0xc6>
          memp_free(MEMP_PBUF, p);
 801b628:	6879      	ldr	r1, [r7, #4]
 801b62a:	200b      	movs	r0, #11
 801b62c:	f7ff f8b0 	bl	801a790 <memp_free>
 801b630:	e00d      	b.n	801b64e <pbuf_free+0xe2>
          /* type == PBUF_RAM */
        } else if (alloc_src == PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP) {
 801b632:	7bfb      	ldrb	r3, [r7, #15]
 801b634:	2b00      	cmp	r3, #0
 801b636:	d103      	bne.n	801b640 <pbuf_free+0xd4>
          mem_free(p);
 801b638:	6878      	ldr	r0, [r7, #4]
 801b63a:	f7fe fd05 	bl	801a048 <mem_free>
 801b63e:	e006      	b.n	801b64e <pbuf_free+0xe2>
        } else {
          /* @todo: support freeing other types */
          LWIP_ASSERT("invalid pbuf type", 0);
 801b640:	4b0b      	ldr	r3, [pc, #44]	@ (801b670 <pbuf_free+0x104>)
 801b642:	f240 320f 	movw	r2, #783	@ 0x30f
 801b646:	490f      	ldr	r1, [pc, #60]	@ (801b684 <pbuf_free+0x118>)
 801b648:	480b      	ldr	r0, [pc, #44]	@ (801b678 <pbuf_free+0x10c>)
 801b64a:	f00f fa07 	bl	802aa5c <iprintf>
        }
      }
      count++;
 801b64e:	7ffb      	ldrb	r3, [r7, #31]
 801b650:	3301      	adds	r3, #1
 801b652:	77fb      	strb	r3, [r7, #31]
      /* proceed to next pbuf */
      p = q;
 801b654:	693b      	ldr	r3, [r7, #16]
 801b656:	607b      	str	r3, [r7, #4]
 801b658:	e001      	b.n	801b65e <pbuf_free+0xf2>
      /* p->ref > 0, this pbuf is still referenced to */
      /* (and so the remaining pbufs in chain as well) */
    } else {
      LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, (u16_t)ref));
      /* stop walking through the chain */
      p = NULL;
 801b65a:	2300      	movs	r3, #0
 801b65c:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801b65e:	687b      	ldr	r3, [r7, #4]
 801b660:	2b00      	cmp	r3, #0
 801b662:	d199      	bne.n	801b598 <pbuf_free+0x2c>
    }
  }
  PERF_STOP("pbuf_free");
  /* return number of de-allocated pbufs */
  return count;
 801b664:	7ffb      	ldrb	r3, [r7, #31]
}
 801b666:	4618      	mov	r0, r3
 801b668:	3720      	adds	r7, #32
 801b66a:	46bd      	mov	sp, r7
 801b66c:	bd80      	pop	{r7, pc}
 801b66e:	bf00      	nop
 801b670:	0802f320 	.word	0x0802f320
 801b674:	0802f484 	.word	0x0802f484
 801b678:	0802f380 	.word	0x0802f380
 801b67c:	0802f4b0 	.word	0x0802f4b0
 801b680:	0802f4c8 	.word	0x0802f4c8
 801b684:	0802f4ec 	.word	0x0802f4ec

0801b688 <pbuf_clen>:
 * @param p first pbuf of chain
 * @return the number of pbufs in a chain
 */
u16_t
pbuf_clen(const struct pbuf *p)
{
 801b688:	b480      	push	{r7}
 801b68a:	b085      	sub	sp, #20
 801b68c:	af00      	add	r7, sp, #0
 801b68e:	6078      	str	r0, [r7, #4]
  u16_t len;

  len = 0;
 801b690:	2300      	movs	r3, #0
 801b692:	81fb      	strh	r3, [r7, #14]
  while (p != NULL) {
 801b694:	e005      	b.n	801b6a2 <pbuf_clen+0x1a>
    ++len;
 801b696:	89fb      	ldrh	r3, [r7, #14]
 801b698:	3301      	adds	r3, #1
 801b69a:	81fb      	strh	r3, [r7, #14]
    p = p->next;
 801b69c:	687b      	ldr	r3, [r7, #4]
 801b69e:	681b      	ldr	r3, [r3, #0]
 801b6a0:	607b      	str	r3, [r7, #4]
  while (p != NULL) {
 801b6a2:	687b      	ldr	r3, [r7, #4]
 801b6a4:	2b00      	cmp	r3, #0
 801b6a6:	d1f6      	bne.n	801b696 <pbuf_clen+0xe>
  }
  return len;
 801b6a8:	89fb      	ldrh	r3, [r7, #14]
}
 801b6aa:	4618      	mov	r0, r3
 801b6ac:	3714      	adds	r7, #20
 801b6ae:	46bd      	mov	sp, r7
 801b6b0:	f85d 7b04 	ldr.w	r7, [sp], #4
 801b6b4:	4770      	bx	lr
	...

0801b6b8 <pbuf_ref>:
 * @param p pbuf to increase reference counter of
 *
 */
void
pbuf_ref(struct pbuf *p)
{
 801b6b8:	b580      	push	{r7, lr}
 801b6ba:	b084      	sub	sp, #16
 801b6bc:	af00      	add	r7, sp, #0
 801b6be:	6078      	str	r0, [r7, #4]
  /* pbuf given? */
  if (p != NULL) {
 801b6c0:	687b      	ldr	r3, [r7, #4]
 801b6c2:	2b00      	cmp	r3, #0
 801b6c4:	d016      	beq.n	801b6f4 <pbuf_ref+0x3c>
    SYS_ARCH_SET(p->ref, (LWIP_PBUF_REF_T)(p->ref + 1));
 801b6c6:	f00b ff33 	bl	8027530 <sys_arch_protect>
 801b6ca:	60f8      	str	r0, [r7, #12]
 801b6cc:	687b      	ldr	r3, [r7, #4]
 801b6ce:	7b9b      	ldrb	r3, [r3, #14]
 801b6d0:	3301      	adds	r3, #1
 801b6d2:	b2da      	uxtb	r2, r3
 801b6d4:	687b      	ldr	r3, [r7, #4]
 801b6d6:	739a      	strb	r2, [r3, #14]
 801b6d8:	68f8      	ldr	r0, [r7, #12]
 801b6da:	f00b ff37 	bl	802754c <sys_arch_unprotect>
    LWIP_ASSERT("pbuf ref overflow", p->ref > 0);
 801b6de:	687b      	ldr	r3, [r7, #4]
 801b6e0:	7b9b      	ldrb	r3, [r3, #14]
 801b6e2:	2b00      	cmp	r3, #0
 801b6e4:	d106      	bne.n	801b6f4 <pbuf_ref+0x3c>
 801b6e6:	4b05      	ldr	r3, [pc, #20]	@ (801b6fc <pbuf_ref+0x44>)
 801b6e8:	f240 3242 	movw	r2, #834	@ 0x342
 801b6ec:	4904      	ldr	r1, [pc, #16]	@ (801b700 <pbuf_ref+0x48>)
 801b6ee:	4805      	ldr	r0, [pc, #20]	@ (801b704 <pbuf_ref+0x4c>)
 801b6f0:	f00f f9b4 	bl	802aa5c <iprintf>
  }
}
 801b6f4:	bf00      	nop
 801b6f6:	3710      	adds	r7, #16
 801b6f8:	46bd      	mov	sp, r7
 801b6fa:	bd80      	pop	{r7, pc}
 801b6fc:	0802f320 	.word	0x0802f320
 801b700:	0802f500 	.word	0x0802f500
 801b704:	0802f380 	.word	0x0802f380

0801b708 <pbuf_cat>:
 *
 * @see pbuf_chain()
 */
void
pbuf_cat(struct pbuf *h, struct pbuf *t)
{
 801b708:	b580      	push	{r7, lr}
 801b70a:	b084      	sub	sp, #16
 801b70c:	af00      	add	r7, sp, #0
 801b70e:	6078      	str	r0, [r7, #4]
 801b710:	6039      	str	r1, [r7, #0]
  struct pbuf *p;

  LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)",
 801b712:	687b      	ldr	r3, [r7, #4]
 801b714:	2b00      	cmp	r3, #0
 801b716:	d002      	beq.n	801b71e <pbuf_cat+0x16>
 801b718:	683b      	ldr	r3, [r7, #0]
 801b71a:	2b00      	cmp	r3, #0
 801b71c:	d107      	bne.n	801b72e <pbuf_cat+0x26>
 801b71e:	4b20      	ldr	r3, [pc, #128]	@ (801b7a0 <pbuf_cat+0x98>)
 801b720:	f240 3259 	movw	r2, #857	@ 0x359
 801b724:	491f      	ldr	r1, [pc, #124]	@ (801b7a4 <pbuf_cat+0x9c>)
 801b726:	4820      	ldr	r0, [pc, #128]	@ (801b7a8 <pbuf_cat+0xa0>)
 801b728:	f00f f998 	bl	802aa5c <iprintf>
 801b72c:	e034      	b.n	801b798 <pbuf_cat+0x90>
             ((h != NULL) && (t != NULL)), return;);

  /* proceed to last pbuf of chain */
  for (p = h; p->next != NULL; p = p->next) {
 801b72e:	687b      	ldr	r3, [r7, #4]
 801b730:	60fb      	str	r3, [r7, #12]
 801b732:	e00a      	b.n	801b74a <pbuf_cat+0x42>
    /* add total length of second chain to all totals of first chain */
    p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801b734:	68fb      	ldr	r3, [r7, #12]
 801b736:	891a      	ldrh	r2, [r3, #8]
 801b738:	683b      	ldr	r3, [r7, #0]
 801b73a:	891b      	ldrh	r3, [r3, #8]
 801b73c:	4413      	add	r3, r2
 801b73e:	b29a      	uxth	r2, r3
 801b740:	68fb      	ldr	r3, [r7, #12]
 801b742:	811a      	strh	r2, [r3, #8]
  for (p = h; p->next != NULL; p = p->next) {
 801b744:	68fb      	ldr	r3, [r7, #12]
 801b746:	681b      	ldr	r3, [r3, #0]
 801b748:	60fb      	str	r3, [r7, #12]
 801b74a:	68fb      	ldr	r3, [r7, #12]
 801b74c:	681b      	ldr	r3, [r3, #0]
 801b74e:	2b00      	cmp	r3, #0
 801b750:	d1f0      	bne.n	801b734 <pbuf_cat+0x2c>
  }
  /* { p is last pbuf of first h chain, p->next == NULL } */
  LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len);
 801b752:	68fb      	ldr	r3, [r7, #12]
 801b754:	891a      	ldrh	r2, [r3, #8]
 801b756:	68fb      	ldr	r3, [r7, #12]
 801b758:	895b      	ldrh	r3, [r3, #10]
 801b75a:	429a      	cmp	r2, r3
 801b75c:	d006      	beq.n	801b76c <pbuf_cat+0x64>
 801b75e:	4b10      	ldr	r3, [pc, #64]	@ (801b7a0 <pbuf_cat+0x98>)
 801b760:	f240 3262 	movw	r2, #866	@ 0x362
 801b764:	4911      	ldr	r1, [pc, #68]	@ (801b7ac <pbuf_cat+0xa4>)
 801b766:	4810      	ldr	r0, [pc, #64]	@ (801b7a8 <pbuf_cat+0xa0>)
 801b768:	f00f f978 	bl	802aa5c <iprintf>
  LWIP_ASSERT("p->next == NULL", p->next == NULL);
 801b76c:	68fb      	ldr	r3, [r7, #12]
 801b76e:	681b      	ldr	r3, [r3, #0]
 801b770:	2b00      	cmp	r3, #0
 801b772:	d006      	beq.n	801b782 <pbuf_cat+0x7a>
 801b774:	4b0a      	ldr	r3, [pc, #40]	@ (801b7a0 <pbuf_cat+0x98>)
 801b776:	f240 3263 	movw	r2, #867	@ 0x363
 801b77a:	490d      	ldr	r1, [pc, #52]	@ (801b7b0 <pbuf_cat+0xa8>)
 801b77c:	480a      	ldr	r0, [pc, #40]	@ (801b7a8 <pbuf_cat+0xa0>)
 801b77e:	f00f f96d 	bl	802aa5c <iprintf>
  /* add total length of second chain to last pbuf total of first chain */
  p->tot_len = (u16_t)(p->tot_len + t->tot_len);
 801b782:	68fb      	ldr	r3, [r7, #12]
 801b784:	891a      	ldrh	r2, [r3, #8]
 801b786:	683b      	ldr	r3, [r7, #0]
 801b788:	891b      	ldrh	r3, [r3, #8]
 801b78a:	4413      	add	r3, r2
 801b78c:	b29a      	uxth	r2, r3
 801b78e:	68fb      	ldr	r3, [r7, #12]
 801b790:	811a      	strh	r2, [r3, #8]
  /* chain last pbuf of head (p) with first of tail (t) */
  p->next = t;
 801b792:	68fb      	ldr	r3, [r7, #12]
 801b794:	683a      	ldr	r2, [r7, #0]
 801b796:	601a      	str	r2, [r3, #0]
  /* p->next now references t, but the caller will drop its reference to t,
   * so netto there is no change to the reference count of t.
   */
}
 801b798:	3710      	adds	r7, #16
 801b79a:	46bd      	mov	sp, r7
 801b79c:	bd80      	pop	{r7, pc}
 801b79e:	bf00      	nop
 801b7a0:	0802f320 	.word	0x0802f320
 801b7a4:	0802f514 	.word	0x0802f514
 801b7a8:	0802f380 	.word	0x0802f380
 801b7ac:	0802f54c 	.word	0x0802f54c
 801b7b0:	0802f57c 	.word	0x0802f57c

0801b7b4 <pbuf_chain>:
 * The ->ref field of the first pbuf of the tail chain is adjusted.
 *
 */
void
pbuf_chain(struct pbuf *h, struct pbuf *t)
{
 801b7b4:	b580      	push	{r7, lr}
 801b7b6:	b082      	sub	sp, #8
 801b7b8:	af00      	add	r7, sp, #0
 801b7ba:	6078      	str	r0, [r7, #4]
 801b7bc:	6039      	str	r1, [r7, #0]
  pbuf_cat(h, t);
 801b7be:	6839      	ldr	r1, [r7, #0]
 801b7c0:	6878      	ldr	r0, [r7, #4]
 801b7c2:	f7ff ffa1 	bl	801b708 <pbuf_cat>
  /* t is now referenced by h */
  pbuf_ref(t);
 801b7c6:	6838      	ldr	r0, [r7, #0]
 801b7c8:	f7ff ff76 	bl	801b6b8 <pbuf_ref>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t));
}
 801b7cc:	bf00      	nop
 801b7ce:	3708      	adds	r7, #8
 801b7d0:	46bd      	mov	sp, r7
 801b7d2:	bd80      	pop	{r7, pc}

0801b7d4 <pbuf_copy>:
 *         ERR_ARG if one of the pbufs is NULL or p_to is not big
 *                 enough to hold p_from
 */
err_t
pbuf_copy(struct pbuf *p_to, const struct pbuf *p_from)
{
 801b7d4:	b580      	push	{r7, lr}
 801b7d6:	b086      	sub	sp, #24
 801b7d8:	af00      	add	r7, sp, #0
 801b7da:	6078      	str	r0, [r7, #4]
 801b7dc:	6039      	str	r1, [r7, #0]
  size_t offset_to = 0, offset_from = 0, len;
 801b7de:	2300      	movs	r3, #0
 801b7e0:	617b      	str	r3, [r7, #20]
 801b7e2:	2300      	movs	r3, #0
 801b7e4:	613b      	str	r3, [r7, #16]

  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n",
              (const void *)p_to, (const void *)p_from));

  /* is the target big enough to hold the source? */
  LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) &&
 801b7e6:	687b      	ldr	r3, [r7, #4]
 801b7e8:	2b00      	cmp	r3, #0
 801b7ea:	d008      	beq.n	801b7fe <pbuf_copy+0x2a>
 801b7ec:	683b      	ldr	r3, [r7, #0]
 801b7ee:	2b00      	cmp	r3, #0
 801b7f0:	d005      	beq.n	801b7fe <pbuf_copy+0x2a>
 801b7f2:	687b      	ldr	r3, [r7, #4]
 801b7f4:	891a      	ldrh	r2, [r3, #8]
 801b7f6:	683b      	ldr	r3, [r7, #0]
 801b7f8:	891b      	ldrh	r3, [r3, #8]
 801b7fa:	429a      	cmp	r2, r3
 801b7fc:	d209      	bcs.n	801b812 <pbuf_copy+0x3e>
 801b7fe:	4b57      	ldr	r3, [pc, #348]	@ (801b95c <pbuf_copy+0x188>)
 801b800:	f240 32c9 	movw	r2, #969	@ 0x3c9
 801b804:	4956      	ldr	r1, [pc, #344]	@ (801b960 <pbuf_copy+0x18c>)
 801b806:	4857      	ldr	r0, [pc, #348]	@ (801b964 <pbuf_copy+0x190>)
 801b808:	f00f f928 	bl	802aa5c <iprintf>
 801b80c:	f06f 030f 	mvn.w	r3, #15
 801b810:	e09f      	b.n	801b952 <pbuf_copy+0x17e>
             (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;);

  /* iterate through pbuf chain */
  do {
    /* copy one part of the original chain */
    if ((p_to->len - offset_to) >= (p_from->len - offset_from)) {
 801b812:	687b      	ldr	r3, [r7, #4]
 801b814:	895b      	ldrh	r3, [r3, #10]
 801b816:	461a      	mov	r2, r3
 801b818:	697b      	ldr	r3, [r7, #20]
 801b81a:	1ad2      	subs	r2, r2, r3
 801b81c:	683b      	ldr	r3, [r7, #0]
 801b81e:	895b      	ldrh	r3, [r3, #10]
 801b820:	4619      	mov	r1, r3
 801b822:	693b      	ldr	r3, [r7, #16]
 801b824:	1acb      	subs	r3, r1, r3
 801b826:	429a      	cmp	r2, r3
 801b828:	d306      	bcc.n	801b838 <pbuf_copy+0x64>
      /* complete current p_from fits into current p_to */
      len = p_from->len - offset_from;
 801b82a:	683b      	ldr	r3, [r7, #0]
 801b82c:	895b      	ldrh	r3, [r3, #10]
 801b82e:	461a      	mov	r2, r3
 801b830:	693b      	ldr	r3, [r7, #16]
 801b832:	1ad3      	subs	r3, r2, r3
 801b834:	60fb      	str	r3, [r7, #12]
 801b836:	e005      	b.n	801b844 <pbuf_copy+0x70>
    } else {
      /* current p_from does not fit into current p_to */
      len = p_to->len - offset_to;
 801b838:	687b      	ldr	r3, [r7, #4]
 801b83a:	895b      	ldrh	r3, [r3, #10]
 801b83c:	461a      	mov	r2, r3
 801b83e:	697b      	ldr	r3, [r7, #20]
 801b840:	1ad3      	subs	r3, r2, r3
 801b842:	60fb      	str	r3, [r7, #12]
    }
    MEMCPY((u8_t *)p_to->payload + offset_to, (u8_t *)p_from->payload + offset_from, len);
 801b844:	687b      	ldr	r3, [r7, #4]
 801b846:	685a      	ldr	r2, [r3, #4]
 801b848:	697b      	ldr	r3, [r7, #20]
 801b84a:	18d0      	adds	r0, r2, r3
 801b84c:	683b      	ldr	r3, [r7, #0]
 801b84e:	685a      	ldr	r2, [r3, #4]
 801b850:	693b      	ldr	r3, [r7, #16]
 801b852:	4413      	add	r3, r2
 801b854:	68fa      	ldr	r2, [r7, #12]
 801b856:	4619      	mov	r1, r3
 801b858:	f00f fb89 	bl	802af6e <memcpy>
    offset_to += len;
 801b85c:	697a      	ldr	r2, [r7, #20]
 801b85e:	68fb      	ldr	r3, [r7, #12]
 801b860:	4413      	add	r3, r2
 801b862:	617b      	str	r3, [r7, #20]
    offset_from += len;
 801b864:	693a      	ldr	r2, [r7, #16]
 801b866:	68fb      	ldr	r3, [r7, #12]
 801b868:	4413      	add	r3, r2
 801b86a:	613b      	str	r3, [r7, #16]
    LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len);
 801b86c:	687b      	ldr	r3, [r7, #4]
 801b86e:	895b      	ldrh	r3, [r3, #10]
 801b870:	461a      	mov	r2, r3
 801b872:	697b      	ldr	r3, [r7, #20]
 801b874:	4293      	cmp	r3, r2
 801b876:	d906      	bls.n	801b886 <pbuf_copy+0xb2>
 801b878:	4b38      	ldr	r3, [pc, #224]	@ (801b95c <pbuf_copy+0x188>)
 801b87a:	f240 32d9 	movw	r2, #985	@ 0x3d9
 801b87e:	493a      	ldr	r1, [pc, #232]	@ (801b968 <pbuf_copy+0x194>)
 801b880:	4838      	ldr	r0, [pc, #224]	@ (801b964 <pbuf_copy+0x190>)
 801b882:	f00f f8eb 	bl	802aa5c <iprintf>
    LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len);
 801b886:	683b      	ldr	r3, [r7, #0]
 801b888:	895b      	ldrh	r3, [r3, #10]
 801b88a:	461a      	mov	r2, r3
 801b88c:	693b      	ldr	r3, [r7, #16]
 801b88e:	4293      	cmp	r3, r2
 801b890:	d906      	bls.n	801b8a0 <pbuf_copy+0xcc>
 801b892:	4b32      	ldr	r3, [pc, #200]	@ (801b95c <pbuf_copy+0x188>)
 801b894:	f240 32da 	movw	r2, #986	@ 0x3da
 801b898:	4934      	ldr	r1, [pc, #208]	@ (801b96c <pbuf_copy+0x198>)
 801b89a:	4832      	ldr	r0, [pc, #200]	@ (801b964 <pbuf_copy+0x190>)
 801b89c:	f00f f8de 	bl	802aa5c <iprintf>
    if (offset_from >= p_from->len) {
 801b8a0:	683b      	ldr	r3, [r7, #0]
 801b8a2:	895b      	ldrh	r3, [r3, #10]
 801b8a4:	461a      	mov	r2, r3
 801b8a6:	693b      	ldr	r3, [r7, #16]
 801b8a8:	4293      	cmp	r3, r2
 801b8aa:	d304      	bcc.n	801b8b6 <pbuf_copy+0xe2>
      /* on to next p_from (if any) */
      offset_from = 0;
 801b8ac:	2300      	movs	r3, #0
 801b8ae:	613b      	str	r3, [r7, #16]
      p_from = p_from->next;
 801b8b0:	683b      	ldr	r3, [r7, #0]
 801b8b2:	681b      	ldr	r3, [r3, #0]
 801b8b4:	603b      	str	r3, [r7, #0]
    }
    if (offset_to == p_to->len) {
 801b8b6:	687b      	ldr	r3, [r7, #4]
 801b8b8:	895b      	ldrh	r3, [r3, #10]
 801b8ba:	461a      	mov	r2, r3
 801b8bc:	697b      	ldr	r3, [r7, #20]
 801b8be:	4293      	cmp	r3, r2
 801b8c0:	d114      	bne.n	801b8ec <pbuf_copy+0x118>
      /* on to next p_to (if any) */
      offset_to = 0;
 801b8c2:	2300      	movs	r3, #0
 801b8c4:	617b      	str	r3, [r7, #20]
      p_to = p_to->next;
 801b8c6:	687b      	ldr	r3, [r7, #4]
 801b8c8:	681b      	ldr	r3, [r3, #0]
 801b8ca:	607b      	str	r3, [r7, #4]
      LWIP_ERROR("p_to != NULL", (p_to != NULL) || (p_from == NULL), return ERR_ARG;);
 801b8cc:	687b      	ldr	r3, [r7, #4]
 801b8ce:	2b00      	cmp	r3, #0
 801b8d0:	d10c      	bne.n	801b8ec <pbuf_copy+0x118>
 801b8d2:	683b      	ldr	r3, [r7, #0]
 801b8d4:	2b00      	cmp	r3, #0
 801b8d6:	d009      	beq.n	801b8ec <pbuf_copy+0x118>
 801b8d8:	4b20      	ldr	r3, [pc, #128]	@ (801b95c <pbuf_copy+0x188>)
 801b8da:	f44f 7279 	mov.w	r2, #996	@ 0x3e4
 801b8de:	4924      	ldr	r1, [pc, #144]	@ (801b970 <pbuf_copy+0x19c>)
 801b8e0:	4820      	ldr	r0, [pc, #128]	@ (801b964 <pbuf_copy+0x190>)
 801b8e2:	f00f f8bb 	bl	802aa5c <iprintf>
 801b8e6:	f06f 030f 	mvn.w	r3, #15
 801b8ea:	e032      	b.n	801b952 <pbuf_copy+0x17e>
    }

    if ((p_from != NULL) && (p_from->len == p_from->tot_len)) {
 801b8ec:	683b      	ldr	r3, [r7, #0]
 801b8ee:	2b00      	cmp	r3, #0
 801b8f0:	d013      	beq.n	801b91a <pbuf_copy+0x146>
 801b8f2:	683b      	ldr	r3, [r7, #0]
 801b8f4:	895a      	ldrh	r2, [r3, #10]
 801b8f6:	683b      	ldr	r3, [r7, #0]
 801b8f8:	891b      	ldrh	r3, [r3, #8]
 801b8fa:	429a      	cmp	r2, r3
 801b8fc:	d10d      	bne.n	801b91a <pbuf_copy+0x146>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801b8fe:	683b      	ldr	r3, [r7, #0]
 801b900:	681b      	ldr	r3, [r3, #0]
 801b902:	2b00      	cmp	r3, #0
 801b904:	d009      	beq.n	801b91a <pbuf_copy+0x146>
 801b906:	4b15      	ldr	r3, [pc, #84]	@ (801b95c <pbuf_copy+0x188>)
 801b908:	f240 32e9 	movw	r2, #1001	@ 0x3e9
 801b90c:	4919      	ldr	r1, [pc, #100]	@ (801b974 <pbuf_copy+0x1a0>)
 801b90e:	4815      	ldr	r0, [pc, #84]	@ (801b964 <pbuf_copy+0x190>)
 801b910:	f00f f8a4 	bl	802aa5c <iprintf>
 801b914:	f06f 0305 	mvn.w	r3, #5
 801b918:	e01b      	b.n	801b952 <pbuf_copy+0x17e>
                 (p_from->next == NULL), return ERR_VAL;);
    }
    if ((p_to != NULL) && (p_to->len == p_to->tot_len)) {
 801b91a:	687b      	ldr	r3, [r7, #4]
 801b91c:	2b00      	cmp	r3, #0
 801b91e:	d013      	beq.n	801b948 <pbuf_copy+0x174>
 801b920:	687b      	ldr	r3, [r7, #4]
 801b922:	895a      	ldrh	r2, [r3, #10]
 801b924:	687b      	ldr	r3, [r7, #4]
 801b926:	891b      	ldrh	r3, [r3, #8]
 801b928:	429a      	cmp	r2, r3
 801b92a:	d10d      	bne.n	801b948 <pbuf_copy+0x174>
      /* don't copy more than one packet! */
      LWIP_ERROR("pbuf_copy() does not allow packet queues!",
 801b92c:	687b      	ldr	r3, [r7, #4]
 801b92e:	681b      	ldr	r3, [r3, #0]
 801b930:	2b00      	cmp	r3, #0
 801b932:	d009      	beq.n	801b948 <pbuf_copy+0x174>
 801b934:	4b09      	ldr	r3, [pc, #36]	@ (801b95c <pbuf_copy+0x188>)
 801b936:	f240 32ee 	movw	r2, #1006	@ 0x3ee
 801b93a:	490e      	ldr	r1, [pc, #56]	@ (801b974 <pbuf_copy+0x1a0>)
 801b93c:	4809      	ldr	r0, [pc, #36]	@ (801b964 <pbuf_copy+0x190>)
 801b93e:	f00f f88d 	bl	802aa5c <iprintf>
 801b942:	f06f 0305 	mvn.w	r3, #5
 801b946:	e004      	b.n	801b952 <pbuf_copy+0x17e>
                 (p_to->next == NULL), return ERR_VAL;);
    }
  } while (p_from);
 801b948:	683b      	ldr	r3, [r7, #0]
 801b94a:	2b00      	cmp	r3, #0
 801b94c:	f47f af61 	bne.w	801b812 <pbuf_copy+0x3e>
  LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n"));
  return ERR_OK;
 801b950:	2300      	movs	r3, #0
}
 801b952:	4618      	mov	r0, r3
 801b954:	3718      	adds	r7, #24
 801b956:	46bd      	mov	sp, r7
 801b958:	bd80      	pop	{r7, pc}
 801b95a:	bf00      	nop
 801b95c:	0802f320 	.word	0x0802f320
 801b960:	0802f5c8 	.word	0x0802f5c8
 801b964:	0802f380 	.word	0x0802f380
 801b968:	0802f5f8 	.word	0x0802f5f8
 801b96c:	0802f610 	.word	0x0802f610
 801b970:	0802f62c 	.word	0x0802f62c
 801b974:	0802f63c 	.word	0x0802f63c

0801b978 <pbuf_copy_partial>:
 * @param offset offset into the packet buffer from where to begin copying len bytes
 * @return the number of bytes copied, or 0 on failure
 */
u16_t
pbuf_copy_partial(const struct pbuf *buf, void *dataptr, u16_t len, u16_t offset)
{
 801b978:	b580      	push	{r7, lr}
 801b97a:	b088      	sub	sp, #32
 801b97c:	af00      	add	r7, sp, #0
 801b97e:	60f8      	str	r0, [r7, #12]
 801b980:	60b9      	str	r1, [r7, #8]
 801b982:	4611      	mov	r1, r2
 801b984:	461a      	mov	r2, r3
 801b986:	460b      	mov	r3, r1
 801b988:	80fb      	strh	r3, [r7, #6]
 801b98a:	4613      	mov	r3, r2
 801b98c:	80bb      	strh	r3, [r7, #4]
  const struct pbuf *p;
  u16_t left = 0;
 801b98e:	2300      	movs	r3, #0
 801b990:	837b      	strh	r3, [r7, #26]
  u16_t buf_copy_len;
  u16_t copied_total = 0;
 801b992:	2300      	movs	r3, #0
 801b994:	82fb      	strh	r3, [r7, #22]

  LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;);
 801b996:	68fb      	ldr	r3, [r7, #12]
 801b998:	2b00      	cmp	r3, #0
 801b99a:	d108      	bne.n	801b9ae <pbuf_copy_partial+0x36>
 801b99c:	4b2b      	ldr	r3, [pc, #172]	@ (801ba4c <pbuf_copy_partial+0xd4>)
 801b99e:	f240 420a 	movw	r2, #1034	@ 0x40a
 801b9a2:	492b      	ldr	r1, [pc, #172]	@ (801ba50 <pbuf_copy_partial+0xd8>)
 801b9a4:	482b      	ldr	r0, [pc, #172]	@ (801ba54 <pbuf_copy_partial+0xdc>)
 801b9a6:	f00f f859 	bl	802aa5c <iprintf>
 801b9aa:	2300      	movs	r3, #0
 801b9ac:	e04a      	b.n	801ba44 <pbuf_copy_partial+0xcc>
  LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;);
 801b9ae:	68bb      	ldr	r3, [r7, #8]
 801b9b0:	2b00      	cmp	r3, #0
 801b9b2:	d108      	bne.n	801b9c6 <pbuf_copy_partial+0x4e>
 801b9b4:	4b25      	ldr	r3, [pc, #148]	@ (801ba4c <pbuf_copy_partial+0xd4>)
 801b9b6:	f240 420b 	movw	r2, #1035	@ 0x40b
 801b9ba:	4927      	ldr	r1, [pc, #156]	@ (801ba58 <pbuf_copy_partial+0xe0>)
 801b9bc:	4825      	ldr	r0, [pc, #148]	@ (801ba54 <pbuf_copy_partial+0xdc>)
 801b9be:	f00f f84d 	bl	802aa5c <iprintf>
 801b9c2:	2300      	movs	r3, #0
 801b9c4:	e03e      	b.n	801ba44 <pbuf_copy_partial+0xcc>

  /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801b9c6:	68fb      	ldr	r3, [r7, #12]
 801b9c8:	61fb      	str	r3, [r7, #28]
 801b9ca:	e034      	b.n	801ba36 <pbuf_copy_partial+0xbe>
    if ((offset != 0) && (offset >= p->len)) {
 801b9cc:	88bb      	ldrh	r3, [r7, #4]
 801b9ce:	2b00      	cmp	r3, #0
 801b9d0:	d00a      	beq.n	801b9e8 <pbuf_copy_partial+0x70>
 801b9d2:	69fb      	ldr	r3, [r7, #28]
 801b9d4:	895b      	ldrh	r3, [r3, #10]
 801b9d6:	88ba      	ldrh	r2, [r7, #4]
 801b9d8:	429a      	cmp	r2, r3
 801b9da:	d305      	bcc.n	801b9e8 <pbuf_copy_partial+0x70>
      /* don't copy from this buffer -> on to the next */
      offset = (u16_t)(offset - p->len);
 801b9dc:	69fb      	ldr	r3, [r7, #28]
 801b9de:	895b      	ldrh	r3, [r3, #10]
 801b9e0:	88ba      	ldrh	r2, [r7, #4]
 801b9e2:	1ad3      	subs	r3, r2, r3
 801b9e4:	80bb      	strh	r3, [r7, #4]
 801b9e6:	e023      	b.n	801ba30 <pbuf_copy_partial+0xb8>
    } else {
      /* copy from this buffer. maybe only partially. */
      buf_copy_len = (u16_t)(p->len - offset);
 801b9e8:	69fb      	ldr	r3, [r7, #28]
 801b9ea:	895a      	ldrh	r2, [r3, #10]
 801b9ec:	88bb      	ldrh	r3, [r7, #4]
 801b9ee:	1ad3      	subs	r3, r2, r3
 801b9f0:	833b      	strh	r3, [r7, #24]
      if (buf_copy_len > len) {
 801b9f2:	8b3a      	ldrh	r2, [r7, #24]
 801b9f4:	88fb      	ldrh	r3, [r7, #6]
 801b9f6:	429a      	cmp	r2, r3
 801b9f8:	d901      	bls.n	801b9fe <pbuf_copy_partial+0x86>
        buf_copy_len = len;
 801b9fa:	88fb      	ldrh	r3, [r7, #6]
 801b9fc:	833b      	strh	r3, [r7, #24]
      }
      /* copy the necessary parts of the buffer */
      MEMCPY(&((char *)dataptr)[left], &((char *)p->payload)[offset], buf_copy_len);
 801b9fe:	8b7b      	ldrh	r3, [r7, #26]
 801ba00:	68ba      	ldr	r2, [r7, #8]
 801ba02:	18d0      	adds	r0, r2, r3
 801ba04:	69fb      	ldr	r3, [r7, #28]
 801ba06:	685a      	ldr	r2, [r3, #4]
 801ba08:	88bb      	ldrh	r3, [r7, #4]
 801ba0a:	4413      	add	r3, r2
 801ba0c:	8b3a      	ldrh	r2, [r7, #24]
 801ba0e:	4619      	mov	r1, r3
 801ba10:	f00f faad 	bl	802af6e <memcpy>
      copied_total = (u16_t)(copied_total + buf_copy_len);
 801ba14:	8afa      	ldrh	r2, [r7, #22]
 801ba16:	8b3b      	ldrh	r3, [r7, #24]
 801ba18:	4413      	add	r3, r2
 801ba1a:	82fb      	strh	r3, [r7, #22]
      left = (u16_t)(left + buf_copy_len);
 801ba1c:	8b7a      	ldrh	r2, [r7, #26]
 801ba1e:	8b3b      	ldrh	r3, [r7, #24]
 801ba20:	4413      	add	r3, r2
 801ba22:	837b      	strh	r3, [r7, #26]
      len = (u16_t)(len - buf_copy_len);
 801ba24:	88fa      	ldrh	r2, [r7, #6]
 801ba26:	8b3b      	ldrh	r3, [r7, #24]
 801ba28:	1ad3      	subs	r3, r2, r3
 801ba2a:	80fb      	strh	r3, [r7, #6]
      offset = 0;
 801ba2c:	2300      	movs	r3, #0
 801ba2e:	80bb      	strh	r3, [r7, #4]
  for (p = buf; len != 0 && p != NULL; p = p->next) {
 801ba30:	69fb      	ldr	r3, [r7, #28]
 801ba32:	681b      	ldr	r3, [r3, #0]
 801ba34:	61fb      	str	r3, [r7, #28]
 801ba36:	88fb      	ldrh	r3, [r7, #6]
 801ba38:	2b00      	cmp	r3, #0
 801ba3a:	d002      	beq.n	801ba42 <pbuf_copy_partial+0xca>
 801ba3c:	69fb      	ldr	r3, [r7, #28]
 801ba3e:	2b00      	cmp	r3, #0
 801ba40:	d1c4      	bne.n	801b9cc <pbuf_copy_partial+0x54>
    }
  }
  return copied_total;
 801ba42:	8afb      	ldrh	r3, [r7, #22]
}
 801ba44:	4618      	mov	r0, r3
 801ba46:	3720      	adds	r7, #32
 801ba48:	46bd      	mov	sp, r7
 801ba4a:	bd80      	pop	{r7, pc}
 801ba4c:	0802f320 	.word	0x0802f320
 801ba50:	0802f668 	.word	0x0802f668
 801ba54:	0802f380 	.word	0x0802f380
 801ba58:	0802f688 	.word	0x0802f688

0801ba5c <pbuf_clone>:
 *
 * @return a new pbuf or NULL if allocation fails
 */
struct pbuf *
pbuf_clone(pbuf_layer layer, pbuf_type type, struct pbuf *p)
{
 801ba5c:	b580      	push	{r7, lr}
 801ba5e:	b084      	sub	sp, #16
 801ba60:	af00      	add	r7, sp, #0
 801ba62:	4603      	mov	r3, r0
 801ba64:	603a      	str	r2, [r7, #0]
 801ba66:	71fb      	strb	r3, [r7, #7]
 801ba68:	460b      	mov	r3, r1
 801ba6a:	80bb      	strh	r3, [r7, #4]
  struct pbuf *q;
  err_t err;
  q = pbuf_alloc(layer, p->tot_len, type);
 801ba6c:	683b      	ldr	r3, [r7, #0]
 801ba6e:	8919      	ldrh	r1, [r3, #8]
 801ba70:	88ba      	ldrh	r2, [r7, #4]
 801ba72:	79fb      	ldrb	r3, [r7, #7]
 801ba74:	4618      	mov	r0, r3
 801ba76:	f7ff fa63 	bl	801af40 <pbuf_alloc>
 801ba7a:	60f8      	str	r0, [r7, #12]
  if (q == NULL) {
 801ba7c:	68fb      	ldr	r3, [r7, #12]
 801ba7e:	2b00      	cmp	r3, #0
 801ba80:	d101      	bne.n	801ba86 <pbuf_clone+0x2a>
    return NULL;
 801ba82:	2300      	movs	r3, #0
 801ba84:	e011      	b.n	801baaa <pbuf_clone+0x4e>
  }
  err = pbuf_copy(q, p);
 801ba86:	6839      	ldr	r1, [r7, #0]
 801ba88:	68f8      	ldr	r0, [r7, #12]
 801ba8a:	f7ff fea3 	bl	801b7d4 <pbuf_copy>
 801ba8e:	4603      	mov	r3, r0
 801ba90:	72fb      	strb	r3, [r7, #11]
  LWIP_UNUSED_ARG(err); /* in case of LWIP_NOASSERT */
  LWIP_ASSERT("pbuf_copy failed", err == ERR_OK);
 801ba92:	f997 300b 	ldrsb.w	r3, [r7, #11]
 801ba96:	2b00      	cmp	r3, #0
 801ba98:	d006      	beq.n	801baa8 <pbuf_clone+0x4c>
 801ba9a:	4b06      	ldr	r3, [pc, #24]	@ (801bab4 <pbuf_clone+0x58>)
 801ba9c:	f240 5224 	movw	r2, #1316	@ 0x524
 801baa0:	4905      	ldr	r1, [pc, #20]	@ (801bab8 <pbuf_clone+0x5c>)
 801baa2:	4806      	ldr	r0, [pc, #24]	@ (801babc <pbuf_clone+0x60>)
 801baa4:	f00e ffda 	bl	802aa5c <iprintf>
  return q;
 801baa8:	68fb      	ldr	r3, [r7, #12]
}
 801baaa:	4618      	mov	r0, r3
 801baac:	3710      	adds	r7, #16
 801baae:	46bd      	mov	sp, r7
 801bab0:	bd80      	pop	{r7, pc}
 801bab2:	bf00      	nop
 801bab4:	0802f320 	.word	0x0802f320
 801bab8:	0802f794 	.word	0x0802f794
 801babc:	0802f380 	.word	0x0802f380

0801bac0 <tcp_init>:
/**
 * Initialize this module.
 */
void
tcp_init(void)
{
 801bac0:	b580      	push	{r7, lr}
 801bac2:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  tcp_port = TCP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 801bac4:	f00d fca0 	bl	8029408 <rand>
 801bac8:	4603      	mov	r3, r0
 801baca:	b29b      	uxth	r3, r3
 801bacc:	f3c3 030d 	ubfx	r3, r3, #0, #14
 801bad0:	b29b      	uxth	r3, r3
 801bad2:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 801bad6:	b29a      	uxth	r2, r3
 801bad8:	4b01      	ldr	r3, [pc, #4]	@ (801bae0 <tcp_init+0x20>)
 801bada:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 801badc:	bf00      	nop
 801bade:	bd80      	pop	{r7, pc}
 801bae0:	2400004c 	.word	0x2400004c

0801bae4 <tcp_free>:

/** Free a tcp pcb */
void
tcp_free(struct tcp_pcb *pcb)
{
 801bae4:	b580      	push	{r7, lr}
 801bae6:	b082      	sub	sp, #8
 801bae8:	af00      	add	r7, sp, #0
 801baea:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free: LISTEN", pcb->state != LISTEN);
 801baec:	687b      	ldr	r3, [r7, #4]
 801baee:	7d1b      	ldrb	r3, [r3, #20]
 801baf0:	2b01      	cmp	r3, #1
 801baf2:	d105      	bne.n	801bb00 <tcp_free+0x1c>
 801baf4:	4b06      	ldr	r3, [pc, #24]	@ (801bb10 <tcp_free+0x2c>)
 801baf6:	22d4      	movs	r2, #212	@ 0xd4
 801baf8:	4906      	ldr	r1, [pc, #24]	@ (801bb14 <tcp_free+0x30>)
 801bafa:	4807      	ldr	r0, [pc, #28]	@ (801bb18 <tcp_free+0x34>)
 801bafc:	f00e ffae 	bl	802aa5c <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB, pcb);
 801bb00:	6879      	ldr	r1, [r7, #4]
 801bb02:	2001      	movs	r0, #1
 801bb04:	f7fe fe44 	bl	801a790 <memp_free>
}
 801bb08:	bf00      	nop
 801bb0a:	3708      	adds	r7, #8
 801bb0c:	46bd      	mov	sp, r7
 801bb0e:	bd80      	pop	{r7, pc}
 801bb10:	0802f820 	.word	0x0802f820
 801bb14:	0802f850 	.word	0x0802f850
 801bb18:	0802f864 	.word	0x0802f864

0801bb1c <tcp_free_listen>:

/** Free a tcp listen pcb */
static void
tcp_free_listen(struct tcp_pcb *pcb)
{
 801bb1c:	b580      	push	{r7, lr}
 801bb1e:	b082      	sub	sp, #8
 801bb20:	af00      	add	r7, sp, #0
 801bb22:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_free_listen: !LISTEN", pcb->state != LISTEN);
 801bb24:	687b      	ldr	r3, [r7, #4]
 801bb26:	7d1b      	ldrb	r3, [r3, #20]
 801bb28:	2b01      	cmp	r3, #1
 801bb2a:	d105      	bne.n	801bb38 <tcp_free_listen+0x1c>
 801bb2c:	4b06      	ldr	r3, [pc, #24]	@ (801bb48 <tcp_free_listen+0x2c>)
 801bb2e:	22df      	movs	r2, #223	@ 0xdf
 801bb30:	4906      	ldr	r1, [pc, #24]	@ (801bb4c <tcp_free_listen+0x30>)
 801bb32:	4807      	ldr	r0, [pc, #28]	@ (801bb50 <tcp_free_listen+0x34>)
 801bb34:	f00e ff92 	bl	802aa5c <iprintf>
#if LWIP_TCP_PCB_NUM_EXT_ARGS
  tcp_ext_arg_invoke_callbacks_destroyed(pcb->ext_args);
#endif
  memp_free(MEMP_TCP_PCB_LISTEN, pcb);
 801bb38:	6879      	ldr	r1, [r7, #4]
 801bb3a:	2002      	movs	r0, #2
 801bb3c:	f7fe fe28 	bl	801a790 <memp_free>
}
 801bb40:	bf00      	nop
 801bb42:	3708      	adds	r7, #8
 801bb44:	46bd      	mov	sp, r7
 801bb46:	bd80      	pop	{r7, pc}
 801bb48:	0802f820 	.word	0x0802f820
 801bb4c:	0802f88c 	.word	0x0802f88c
 801bb50:	0802f864 	.word	0x0802f864

0801bb54 <tcp_tmr>:
/**
 * Called periodically to dispatch TCP timers.
 */
void
tcp_tmr(void)
{
 801bb54:	b580      	push	{r7, lr}
 801bb56:	af00      	add	r7, sp, #0
  /* Call tcp_fasttmr() every 250 ms */
  tcp_fasttmr();
 801bb58:	f001 f86a 	bl	801cc30 <tcp_fasttmr>

  if (++tcp_timer & 1) {
 801bb5c:	4b07      	ldr	r3, [pc, #28]	@ (801bb7c <tcp_tmr+0x28>)
 801bb5e:	781b      	ldrb	r3, [r3, #0]
 801bb60:	3301      	adds	r3, #1
 801bb62:	b2da      	uxtb	r2, r3
 801bb64:	4b05      	ldr	r3, [pc, #20]	@ (801bb7c <tcp_tmr+0x28>)
 801bb66:	701a      	strb	r2, [r3, #0]
 801bb68:	4b04      	ldr	r3, [pc, #16]	@ (801bb7c <tcp_tmr+0x28>)
 801bb6a:	781b      	ldrb	r3, [r3, #0]
 801bb6c:	f003 0301 	and.w	r3, r3, #1
 801bb70:	2b00      	cmp	r3, #0
 801bb72:	d001      	beq.n	801bb78 <tcp_tmr+0x24>
    /* Call tcp_slowtmr() every 500 ms, i.e., every other timer
       tcp_tmr() is called. */
    tcp_slowtmr();
 801bb74:	f000 fd1a 	bl	801c5ac <tcp_slowtmr>
  }
}
 801bb78:	bf00      	nop
 801bb7a:	bd80      	pop	{r7, pc}
 801bb7c:	2402afbd 	.word	0x2402afbd

0801bb80 <tcp_remove_listener>:
/** Called when a listen pcb is closed. Iterates one pcb list and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_remove_listener(struct tcp_pcb *list, struct tcp_pcb_listen *lpcb)
{
 801bb80:	b580      	push	{r7, lr}
 801bb82:	b084      	sub	sp, #16
 801bb84:	af00      	add	r7, sp, #0
 801bb86:	6078      	str	r0, [r7, #4]
 801bb88:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;

  LWIP_ASSERT("tcp_remove_listener: invalid listener", lpcb != NULL);
 801bb8a:	683b      	ldr	r3, [r7, #0]
 801bb8c:	2b00      	cmp	r3, #0
 801bb8e:	d105      	bne.n	801bb9c <tcp_remove_listener+0x1c>
 801bb90:	4b0d      	ldr	r3, [pc, #52]	@ (801bbc8 <tcp_remove_listener+0x48>)
 801bb92:	22ff      	movs	r2, #255	@ 0xff
 801bb94:	490d      	ldr	r1, [pc, #52]	@ (801bbcc <tcp_remove_listener+0x4c>)
 801bb96:	480e      	ldr	r0, [pc, #56]	@ (801bbd0 <tcp_remove_listener+0x50>)
 801bb98:	f00e ff60 	bl	802aa5c <iprintf>

  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801bb9c:	687b      	ldr	r3, [r7, #4]
 801bb9e:	60fb      	str	r3, [r7, #12]
 801bba0:	e00a      	b.n	801bbb8 <tcp_remove_listener+0x38>
    if (pcb->listener == lpcb) {
 801bba2:	68fb      	ldr	r3, [r7, #12]
 801bba4:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801bba6:	683a      	ldr	r2, [r7, #0]
 801bba8:	429a      	cmp	r2, r3
 801bbaa:	d102      	bne.n	801bbb2 <tcp_remove_listener+0x32>
      pcb->listener = NULL;
 801bbac:	68fb      	ldr	r3, [r7, #12]
 801bbae:	2200      	movs	r2, #0
 801bbb0:	67da      	str	r2, [r3, #124]	@ 0x7c
  for (pcb = list; pcb != NULL; pcb = pcb->next) {
 801bbb2:	68fb      	ldr	r3, [r7, #12]
 801bbb4:	68db      	ldr	r3, [r3, #12]
 801bbb6:	60fb      	str	r3, [r7, #12]
 801bbb8:	68fb      	ldr	r3, [r7, #12]
 801bbba:	2b00      	cmp	r3, #0
 801bbbc:	d1f1      	bne.n	801bba2 <tcp_remove_listener+0x22>
    }
  }
}
 801bbbe:	bf00      	nop
 801bbc0:	bf00      	nop
 801bbc2:	3710      	adds	r7, #16
 801bbc4:	46bd      	mov	sp, r7
 801bbc6:	bd80      	pop	{r7, pc}
 801bbc8:	0802f820 	.word	0x0802f820
 801bbcc:	0802f8a8 	.word	0x0802f8a8
 801bbd0:	0802f864 	.word	0x0802f864

0801bbd4 <tcp_listen_closed>:
/** Called when a listen pcb is closed. Iterates all pcb lists and removes the
 * closed listener pcb from pcb->listener if matching.
 */
static void
tcp_listen_closed(struct tcp_pcb *pcb)
{
 801bbd4:	b580      	push	{r7, lr}
 801bbd6:	b084      	sub	sp, #16
 801bbd8:	af00      	add	r7, sp, #0
 801bbda:	6078      	str	r0, [r7, #4]
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
  size_t i;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801bbdc:	687b      	ldr	r3, [r7, #4]
 801bbde:	2b00      	cmp	r3, #0
 801bbe0:	d106      	bne.n	801bbf0 <tcp_listen_closed+0x1c>
 801bbe2:	4b14      	ldr	r3, [pc, #80]	@ (801bc34 <tcp_listen_closed+0x60>)
 801bbe4:	f240 1211 	movw	r2, #273	@ 0x111
 801bbe8:	4913      	ldr	r1, [pc, #76]	@ (801bc38 <tcp_listen_closed+0x64>)
 801bbea:	4814      	ldr	r0, [pc, #80]	@ (801bc3c <tcp_listen_closed+0x68>)
 801bbec:	f00e ff36 	bl	802aa5c <iprintf>
  LWIP_ASSERT("pcb->state == LISTEN", pcb->state == LISTEN);
 801bbf0:	687b      	ldr	r3, [r7, #4]
 801bbf2:	7d1b      	ldrb	r3, [r3, #20]
 801bbf4:	2b01      	cmp	r3, #1
 801bbf6:	d006      	beq.n	801bc06 <tcp_listen_closed+0x32>
 801bbf8:	4b0e      	ldr	r3, [pc, #56]	@ (801bc34 <tcp_listen_closed+0x60>)
 801bbfa:	f44f 7289 	mov.w	r2, #274	@ 0x112
 801bbfe:	4910      	ldr	r1, [pc, #64]	@ (801bc40 <tcp_listen_closed+0x6c>)
 801bc00:	480e      	ldr	r0, [pc, #56]	@ (801bc3c <tcp_listen_closed+0x68>)
 801bc02:	f00e ff2b 	bl	802aa5c <iprintf>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801bc06:	2301      	movs	r3, #1
 801bc08:	60fb      	str	r3, [r7, #12]
 801bc0a:	e00b      	b.n	801bc24 <tcp_listen_closed+0x50>
    tcp_remove_listener(*tcp_pcb_lists[i], (struct tcp_pcb_listen *)pcb);
 801bc0c:	4a0d      	ldr	r2, [pc, #52]	@ (801bc44 <tcp_listen_closed+0x70>)
 801bc0e:	68fb      	ldr	r3, [r7, #12]
 801bc10:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801bc14:	681b      	ldr	r3, [r3, #0]
 801bc16:	6879      	ldr	r1, [r7, #4]
 801bc18:	4618      	mov	r0, r3
 801bc1a:	f7ff ffb1 	bl	801bb80 <tcp_remove_listener>
  for (i = 1; i < LWIP_ARRAYSIZE(tcp_pcb_lists); i++) {
 801bc1e:	68fb      	ldr	r3, [r7, #12]
 801bc20:	3301      	adds	r3, #1
 801bc22:	60fb      	str	r3, [r7, #12]
 801bc24:	68fb      	ldr	r3, [r7, #12]
 801bc26:	2b03      	cmp	r3, #3
 801bc28:	d9f0      	bls.n	801bc0c <tcp_listen_closed+0x38>
  }
#endif
  LWIP_UNUSED_ARG(pcb);
}
 801bc2a:	bf00      	nop
 801bc2c:	bf00      	nop
 801bc2e:	3710      	adds	r7, #16
 801bc30:	46bd      	mov	sp, r7
 801bc32:	bd80      	pop	{r7, pc}
 801bc34:	0802f820 	.word	0x0802f820
 801bc38:	0802f8d0 	.word	0x0802f8d0
 801bc3c:	0802f864 	.word	0x0802f864
 801bc40:	0802f8dc 	.word	0x0802f8dc
 801bc44:	08031ec0 	.word	0x08031ec0

0801bc48 <tcp_close_shutdown>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
static err_t
tcp_close_shutdown(struct tcp_pcb *pcb, u8_t rst_on_unacked_data)
{
 801bc48:	b5b0      	push	{r4, r5, r7, lr}
 801bc4a:	b088      	sub	sp, #32
 801bc4c:	af04      	add	r7, sp, #16
 801bc4e:	6078      	str	r0, [r7, #4]
 801bc50:	460b      	mov	r3, r1
 801bc52:	70fb      	strb	r3, [r7, #3]
  LWIP_ASSERT("tcp_close_shutdown: invalid pcb", pcb != NULL);
 801bc54:	687b      	ldr	r3, [r7, #4]
 801bc56:	2b00      	cmp	r3, #0
 801bc58:	d106      	bne.n	801bc68 <tcp_close_shutdown+0x20>
 801bc5a:	4b63      	ldr	r3, [pc, #396]	@ (801bde8 <tcp_close_shutdown+0x1a0>)
 801bc5c:	f44f 72af 	mov.w	r2, #350	@ 0x15e
 801bc60:	4962      	ldr	r1, [pc, #392]	@ (801bdec <tcp_close_shutdown+0x1a4>)
 801bc62:	4863      	ldr	r0, [pc, #396]	@ (801bdf0 <tcp_close_shutdown+0x1a8>)
 801bc64:	f00e fefa 	bl	802aa5c <iprintf>

  if (rst_on_unacked_data && ((pcb->state == ESTABLISHED) || (pcb->state == CLOSE_WAIT))) {
 801bc68:	78fb      	ldrb	r3, [r7, #3]
 801bc6a:	2b00      	cmp	r3, #0
 801bc6c:	d067      	beq.n	801bd3e <tcp_close_shutdown+0xf6>
 801bc6e:	687b      	ldr	r3, [r7, #4]
 801bc70:	7d1b      	ldrb	r3, [r3, #20]
 801bc72:	2b04      	cmp	r3, #4
 801bc74:	d003      	beq.n	801bc7e <tcp_close_shutdown+0x36>
 801bc76:	687b      	ldr	r3, [r7, #4]
 801bc78:	7d1b      	ldrb	r3, [r3, #20]
 801bc7a:	2b07      	cmp	r3, #7
 801bc7c:	d15f      	bne.n	801bd3e <tcp_close_shutdown+0xf6>
    if ((pcb->refused_data != NULL) || (pcb->rcv_wnd != TCP_WND_MAX(pcb))) {
 801bc7e:	687b      	ldr	r3, [r7, #4]
 801bc80:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801bc82:	2b00      	cmp	r3, #0
 801bc84:	d105      	bne.n	801bc92 <tcp_close_shutdown+0x4a>
 801bc86:	687b      	ldr	r3, [r7, #4]
 801bc88:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801bc8a:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801bc8e:	4293      	cmp	r3, r2
 801bc90:	d055      	beq.n	801bd3e <tcp_close_shutdown+0xf6>
      /* Not all data received by application, send RST to tell the remote
         side about this. */
      LWIP_ASSERT("pcb->flags & TF_RXCLOSED", pcb->flags & TF_RXCLOSED);
 801bc92:	687b      	ldr	r3, [r7, #4]
 801bc94:	8b5b      	ldrh	r3, [r3, #26]
 801bc96:	f003 0310 	and.w	r3, r3, #16
 801bc9a:	2b00      	cmp	r3, #0
 801bc9c:	d106      	bne.n	801bcac <tcp_close_shutdown+0x64>
 801bc9e:	4b52      	ldr	r3, [pc, #328]	@ (801bde8 <tcp_close_shutdown+0x1a0>)
 801bca0:	f44f 72b2 	mov.w	r2, #356	@ 0x164
 801bca4:	4953      	ldr	r1, [pc, #332]	@ (801bdf4 <tcp_close_shutdown+0x1ac>)
 801bca6:	4852      	ldr	r0, [pc, #328]	@ (801bdf0 <tcp_close_shutdown+0x1a8>)
 801bca8:	f00e fed8 	bl	802aa5c <iprintf>

      /* don't call tcp_abort here: we must not deallocate the pcb since
         that might not be expected when calling tcp_close */
      tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801bcac:	687b      	ldr	r3, [r7, #4]
 801bcae:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801bcb0:	687b      	ldr	r3, [r7, #4]
 801bcb2:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801bcb4:	687d      	ldr	r5, [r7, #4]
 801bcb6:	687b      	ldr	r3, [r7, #4]
 801bcb8:	3304      	adds	r3, #4
 801bcba:	687a      	ldr	r2, [r7, #4]
 801bcbc:	8ad2      	ldrh	r2, [r2, #22]
 801bcbe:	6879      	ldr	r1, [r7, #4]
 801bcc0:	8b09      	ldrh	r1, [r1, #24]
 801bcc2:	9102      	str	r1, [sp, #8]
 801bcc4:	9201      	str	r2, [sp, #4]
 801bcc6:	9300      	str	r3, [sp, #0]
 801bcc8:	462b      	mov	r3, r5
 801bcca:	4622      	mov	r2, r4
 801bccc:	4601      	mov	r1, r0
 801bcce:	6878      	ldr	r0, [r7, #4]
 801bcd0:	f005 fdfa 	bl	80218c8 <tcp_rst>
              pcb->local_port, pcb->remote_port);

      tcp_pcb_purge(pcb);
 801bcd4:	6878      	ldr	r0, [r7, #4]
 801bcd6:	f001 fb67 	bl	801d3a8 <tcp_pcb_purge>
      TCP_RMV_ACTIVE(pcb);
 801bcda:	4b47      	ldr	r3, [pc, #284]	@ (801bdf8 <tcp_close_shutdown+0x1b0>)
 801bcdc:	681b      	ldr	r3, [r3, #0]
 801bcde:	687a      	ldr	r2, [r7, #4]
 801bce0:	429a      	cmp	r2, r3
 801bce2:	d105      	bne.n	801bcf0 <tcp_close_shutdown+0xa8>
 801bce4:	4b44      	ldr	r3, [pc, #272]	@ (801bdf8 <tcp_close_shutdown+0x1b0>)
 801bce6:	681b      	ldr	r3, [r3, #0]
 801bce8:	68db      	ldr	r3, [r3, #12]
 801bcea:	4a43      	ldr	r2, [pc, #268]	@ (801bdf8 <tcp_close_shutdown+0x1b0>)
 801bcec:	6013      	str	r3, [r2, #0]
 801bcee:	e013      	b.n	801bd18 <tcp_close_shutdown+0xd0>
 801bcf0:	4b41      	ldr	r3, [pc, #260]	@ (801bdf8 <tcp_close_shutdown+0x1b0>)
 801bcf2:	681b      	ldr	r3, [r3, #0]
 801bcf4:	60fb      	str	r3, [r7, #12]
 801bcf6:	e00c      	b.n	801bd12 <tcp_close_shutdown+0xca>
 801bcf8:	68fb      	ldr	r3, [r7, #12]
 801bcfa:	68db      	ldr	r3, [r3, #12]
 801bcfc:	687a      	ldr	r2, [r7, #4]
 801bcfe:	429a      	cmp	r2, r3
 801bd00:	d104      	bne.n	801bd0c <tcp_close_shutdown+0xc4>
 801bd02:	687b      	ldr	r3, [r7, #4]
 801bd04:	68da      	ldr	r2, [r3, #12]
 801bd06:	68fb      	ldr	r3, [r7, #12]
 801bd08:	60da      	str	r2, [r3, #12]
 801bd0a:	e005      	b.n	801bd18 <tcp_close_shutdown+0xd0>
 801bd0c:	68fb      	ldr	r3, [r7, #12]
 801bd0e:	68db      	ldr	r3, [r3, #12]
 801bd10:	60fb      	str	r3, [r7, #12]
 801bd12:	68fb      	ldr	r3, [r7, #12]
 801bd14:	2b00      	cmp	r3, #0
 801bd16:	d1ef      	bne.n	801bcf8 <tcp_close_shutdown+0xb0>
 801bd18:	687b      	ldr	r3, [r7, #4]
 801bd1a:	2200      	movs	r2, #0
 801bd1c:	60da      	str	r2, [r3, #12]
 801bd1e:	4b37      	ldr	r3, [pc, #220]	@ (801bdfc <tcp_close_shutdown+0x1b4>)
 801bd20:	2201      	movs	r2, #1
 801bd22:	701a      	strb	r2, [r3, #0]
      /* Deallocate the pcb since we already sent a RST for it */
      if (tcp_input_pcb == pcb) {
 801bd24:	4b36      	ldr	r3, [pc, #216]	@ (801be00 <tcp_close_shutdown+0x1b8>)
 801bd26:	681b      	ldr	r3, [r3, #0]
 801bd28:	687a      	ldr	r2, [r7, #4]
 801bd2a:	429a      	cmp	r2, r3
 801bd2c:	d102      	bne.n	801bd34 <tcp_close_shutdown+0xec>
        /* prevent using a deallocated pcb: free it from tcp_input later */
        tcp_trigger_input_pcb_close();
 801bd2e:	f003 ffff 	bl	801fd30 <tcp_trigger_input_pcb_close>
 801bd32:	e002      	b.n	801bd3a <tcp_close_shutdown+0xf2>
      } else {
        tcp_free(pcb);
 801bd34:	6878      	ldr	r0, [r7, #4]
 801bd36:	f7ff fed5 	bl	801bae4 <tcp_free>
      }
      return ERR_OK;
 801bd3a:	2300      	movs	r3, #0
 801bd3c:	e050      	b.n	801bde0 <tcp_close_shutdown+0x198>
    }
  }

  /* - states which free the pcb are handled here,
     - states which send FIN and change state are handled in tcp_close_shutdown_fin() */
  switch (pcb->state) {
 801bd3e:	687b      	ldr	r3, [r7, #4]
 801bd40:	7d1b      	ldrb	r3, [r3, #20]
 801bd42:	2b02      	cmp	r3, #2
 801bd44:	d03b      	beq.n	801bdbe <tcp_close_shutdown+0x176>
 801bd46:	2b02      	cmp	r3, #2
 801bd48:	dc44      	bgt.n	801bdd4 <tcp_close_shutdown+0x18c>
 801bd4a:	2b00      	cmp	r3, #0
 801bd4c:	d002      	beq.n	801bd54 <tcp_close_shutdown+0x10c>
 801bd4e:	2b01      	cmp	r3, #1
 801bd50:	d02a      	beq.n	801bda8 <tcp_close_shutdown+0x160>
 801bd52:	e03f      	b.n	801bdd4 <tcp_close_shutdown+0x18c>
       * and the user needs some way to free it should the need arise.
       * Calling tcp_close() with a pcb that has already been closed, (i.e. twice)
       * or for a pcb that has been used and then entered the CLOSED state
       * is erroneous, but this should never happen as the pcb has in those cases
       * been freed, and so any remaining handles are bogus. */
      if (pcb->local_port != 0) {
 801bd54:	687b      	ldr	r3, [r7, #4]
 801bd56:	8adb      	ldrh	r3, [r3, #22]
 801bd58:	2b00      	cmp	r3, #0
 801bd5a:	d021      	beq.n	801bda0 <tcp_close_shutdown+0x158>
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801bd5c:	4b29      	ldr	r3, [pc, #164]	@ (801be04 <tcp_close_shutdown+0x1bc>)
 801bd5e:	681b      	ldr	r3, [r3, #0]
 801bd60:	687a      	ldr	r2, [r7, #4]
 801bd62:	429a      	cmp	r2, r3
 801bd64:	d105      	bne.n	801bd72 <tcp_close_shutdown+0x12a>
 801bd66:	4b27      	ldr	r3, [pc, #156]	@ (801be04 <tcp_close_shutdown+0x1bc>)
 801bd68:	681b      	ldr	r3, [r3, #0]
 801bd6a:	68db      	ldr	r3, [r3, #12]
 801bd6c:	4a25      	ldr	r2, [pc, #148]	@ (801be04 <tcp_close_shutdown+0x1bc>)
 801bd6e:	6013      	str	r3, [r2, #0]
 801bd70:	e013      	b.n	801bd9a <tcp_close_shutdown+0x152>
 801bd72:	4b24      	ldr	r3, [pc, #144]	@ (801be04 <tcp_close_shutdown+0x1bc>)
 801bd74:	681b      	ldr	r3, [r3, #0]
 801bd76:	60bb      	str	r3, [r7, #8]
 801bd78:	e00c      	b.n	801bd94 <tcp_close_shutdown+0x14c>
 801bd7a:	68bb      	ldr	r3, [r7, #8]
 801bd7c:	68db      	ldr	r3, [r3, #12]
 801bd7e:	687a      	ldr	r2, [r7, #4]
 801bd80:	429a      	cmp	r2, r3
 801bd82:	d104      	bne.n	801bd8e <tcp_close_shutdown+0x146>
 801bd84:	687b      	ldr	r3, [r7, #4]
 801bd86:	68da      	ldr	r2, [r3, #12]
 801bd88:	68bb      	ldr	r3, [r7, #8]
 801bd8a:	60da      	str	r2, [r3, #12]
 801bd8c:	e005      	b.n	801bd9a <tcp_close_shutdown+0x152>
 801bd8e:	68bb      	ldr	r3, [r7, #8]
 801bd90:	68db      	ldr	r3, [r3, #12]
 801bd92:	60bb      	str	r3, [r7, #8]
 801bd94:	68bb      	ldr	r3, [r7, #8]
 801bd96:	2b00      	cmp	r3, #0
 801bd98:	d1ef      	bne.n	801bd7a <tcp_close_shutdown+0x132>
 801bd9a:	687b      	ldr	r3, [r7, #4]
 801bd9c:	2200      	movs	r2, #0
 801bd9e:	60da      	str	r2, [r3, #12]
      }
      tcp_free(pcb);
 801bda0:	6878      	ldr	r0, [r7, #4]
 801bda2:	f7ff fe9f 	bl	801bae4 <tcp_free>
      break;
 801bda6:	e01a      	b.n	801bdde <tcp_close_shutdown+0x196>
    case LISTEN:
      tcp_listen_closed(pcb);
 801bda8:	6878      	ldr	r0, [r7, #4]
 801bdaa:	f7ff ff13 	bl	801bbd4 <tcp_listen_closed>
      tcp_pcb_remove(&tcp_listen_pcbs.pcbs, pcb);
 801bdae:	6879      	ldr	r1, [r7, #4]
 801bdb0:	4815      	ldr	r0, [pc, #84]	@ (801be08 <tcp_close_shutdown+0x1c0>)
 801bdb2:	f001 fb49 	bl	801d448 <tcp_pcb_remove>
      tcp_free_listen(pcb);
 801bdb6:	6878      	ldr	r0, [r7, #4]
 801bdb8:	f7ff feb0 	bl	801bb1c <tcp_free_listen>
      break;
 801bdbc:	e00f      	b.n	801bdde <tcp_close_shutdown+0x196>
    case SYN_SENT:
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801bdbe:	6879      	ldr	r1, [r7, #4]
 801bdc0:	480d      	ldr	r0, [pc, #52]	@ (801bdf8 <tcp_close_shutdown+0x1b0>)
 801bdc2:	f001 fb41 	bl	801d448 <tcp_pcb_remove>
 801bdc6:	4b0d      	ldr	r3, [pc, #52]	@ (801bdfc <tcp_close_shutdown+0x1b4>)
 801bdc8:	2201      	movs	r2, #1
 801bdca:	701a      	strb	r2, [r3, #0]
      tcp_free(pcb);
 801bdcc:	6878      	ldr	r0, [r7, #4]
 801bdce:	f7ff fe89 	bl	801bae4 <tcp_free>
      MIB2_STATS_INC(mib2.tcpattemptfails);
      break;
 801bdd2:	e004      	b.n	801bdde <tcp_close_shutdown+0x196>
    default:
      return tcp_close_shutdown_fin(pcb);
 801bdd4:	6878      	ldr	r0, [r7, #4]
 801bdd6:	f000 f819 	bl	801be0c <tcp_close_shutdown_fin>
 801bdda:	4603      	mov	r3, r0
 801bddc:	e000      	b.n	801bde0 <tcp_close_shutdown+0x198>
  }
  return ERR_OK;
 801bdde:	2300      	movs	r3, #0
}
 801bde0:	4618      	mov	r0, r3
 801bde2:	3710      	adds	r7, #16
 801bde4:	46bd      	mov	sp, r7
 801bde6:	bdb0      	pop	{r4, r5, r7, pc}
 801bde8:	0802f820 	.word	0x0802f820
 801bdec:	0802f8f4 	.word	0x0802f8f4
 801bdf0:	0802f864 	.word	0x0802f864
 801bdf4:	0802f914 	.word	0x0802f914
 801bdf8:	2402afb4 	.word	0x2402afb4
 801bdfc:	2402afbc 	.word	0x2402afbc
 801be00:	2402aff8 	.word	0x2402aff8
 801be04:	2402afac 	.word	0x2402afac
 801be08:	2402afb0 	.word	0x2402afb0

0801be0c <tcp_close_shutdown_fin>:

static err_t
tcp_close_shutdown_fin(struct tcp_pcb *pcb)
{
 801be0c:	b580      	push	{r7, lr}
 801be0e:	b084      	sub	sp, #16
 801be10:	af00      	add	r7, sp, #0
 801be12:	6078      	str	r0, [r7, #4]
  err_t err;
  LWIP_ASSERT("pcb != NULL", pcb != NULL);
 801be14:	687b      	ldr	r3, [r7, #4]
 801be16:	2b00      	cmp	r3, #0
 801be18:	d106      	bne.n	801be28 <tcp_close_shutdown_fin+0x1c>
 801be1a:	4b2e      	ldr	r3, [pc, #184]	@ (801bed4 <tcp_close_shutdown_fin+0xc8>)
 801be1c:	f44f 72ce 	mov.w	r2, #412	@ 0x19c
 801be20:	492d      	ldr	r1, [pc, #180]	@ (801bed8 <tcp_close_shutdown_fin+0xcc>)
 801be22:	482e      	ldr	r0, [pc, #184]	@ (801bedc <tcp_close_shutdown_fin+0xd0>)
 801be24:	f00e fe1a 	bl	802aa5c <iprintf>

  switch (pcb->state) {
 801be28:	687b      	ldr	r3, [r7, #4]
 801be2a:	7d1b      	ldrb	r3, [r3, #20]
 801be2c:	2b07      	cmp	r3, #7
 801be2e:	d020      	beq.n	801be72 <tcp_close_shutdown_fin+0x66>
 801be30:	2b07      	cmp	r3, #7
 801be32:	dc2b      	bgt.n	801be8c <tcp_close_shutdown_fin+0x80>
 801be34:	2b03      	cmp	r3, #3
 801be36:	d002      	beq.n	801be3e <tcp_close_shutdown_fin+0x32>
 801be38:	2b04      	cmp	r3, #4
 801be3a:	d00d      	beq.n	801be58 <tcp_close_shutdown_fin+0x4c>
 801be3c:	e026      	b.n	801be8c <tcp_close_shutdown_fin+0x80>
    case SYN_RCVD:
      err = tcp_send_fin(pcb);
 801be3e:	6878      	ldr	r0, [r7, #4]
 801be40:	f004 fe42 	bl	8020ac8 <tcp_send_fin>
 801be44:	4603      	mov	r3, r0
 801be46:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801be48:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801be4c:	2b00      	cmp	r3, #0
 801be4e:	d11f      	bne.n	801be90 <tcp_close_shutdown_fin+0x84>
        tcp_backlog_accepted(pcb);
        MIB2_STATS_INC(mib2.tcpattemptfails);
        pcb->state = FIN_WAIT_1;
 801be50:	687b      	ldr	r3, [r7, #4]
 801be52:	2205      	movs	r2, #5
 801be54:	751a      	strb	r2, [r3, #20]
      }
      break;
 801be56:	e01b      	b.n	801be90 <tcp_close_shutdown_fin+0x84>
    case ESTABLISHED:
      err = tcp_send_fin(pcb);
 801be58:	6878      	ldr	r0, [r7, #4]
 801be5a:	f004 fe35 	bl	8020ac8 <tcp_send_fin>
 801be5e:	4603      	mov	r3, r0
 801be60:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801be62:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801be66:	2b00      	cmp	r3, #0
 801be68:	d114      	bne.n	801be94 <tcp_close_shutdown_fin+0x88>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = FIN_WAIT_1;
 801be6a:	687b      	ldr	r3, [r7, #4]
 801be6c:	2205      	movs	r2, #5
 801be6e:	751a      	strb	r2, [r3, #20]
      }
      break;
 801be70:	e010      	b.n	801be94 <tcp_close_shutdown_fin+0x88>
    case CLOSE_WAIT:
      err = tcp_send_fin(pcb);
 801be72:	6878      	ldr	r0, [r7, #4]
 801be74:	f004 fe28 	bl	8020ac8 <tcp_send_fin>
 801be78:	4603      	mov	r3, r0
 801be7a:	73fb      	strb	r3, [r7, #15]
      if (err == ERR_OK) {
 801be7c:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801be80:	2b00      	cmp	r3, #0
 801be82:	d109      	bne.n	801be98 <tcp_close_shutdown_fin+0x8c>
        MIB2_STATS_INC(mib2.tcpestabresets);
        pcb->state = LAST_ACK;
 801be84:	687b      	ldr	r3, [r7, #4]
 801be86:	2209      	movs	r2, #9
 801be88:	751a      	strb	r2, [r3, #20]
      }
      break;
 801be8a:	e005      	b.n	801be98 <tcp_close_shutdown_fin+0x8c>
    default:
      /* Has already been closed, do nothing. */
      return ERR_OK;
 801be8c:	2300      	movs	r3, #0
 801be8e:	e01c      	b.n	801beca <tcp_close_shutdown_fin+0xbe>
      break;
 801be90:	bf00      	nop
 801be92:	e002      	b.n	801be9a <tcp_close_shutdown_fin+0x8e>
      break;
 801be94:	bf00      	nop
 801be96:	e000      	b.n	801be9a <tcp_close_shutdown_fin+0x8e>
      break;
 801be98:	bf00      	nop
  }

  if (err == ERR_OK) {
 801be9a:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801be9e:	2b00      	cmp	r3, #0
 801bea0:	d103      	bne.n	801beaa <tcp_close_shutdown_fin+0x9e>
    /* To ensure all data has been sent when tcp_close returns, we have
       to make sure tcp_output doesn't fail.
       Since we don't really have to ensure all data has been sent when tcp_close
       returns (unsent data is sent from tcp timer functions, also), we don't care
       for the return value of tcp_output for now. */
    tcp_output(pcb);
 801bea2:	6878      	ldr	r0, [r7, #4]
 801bea4:	f004 ff4e 	bl	8020d44 <tcp_output>
 801bea8:	e00d      	b.n	801bec6 <tcp_close_shutdown_fin+0xba>
  } else if (err == ERR_MEM) {
 801beaa:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801beae:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 801beb2:	d108      	bne.n	801bec6 <tcp_close_shutdown_fin+0xba>
    /* Mark this pcb for closing. Closing is retried from tcp_tmr. */
    tcp_set_flags(pcb, TF_CLOSEPEND);
 801beb4:	687b      	ldr	r3, [r7, #4]
 801beb6:	8b5b      	ldrh	r3, [r3, #26]
 801beb8:	f043 0308 	orr.w	r3, r3, #8
 801bebc:	b29a      	uxth	r2, r3
 801bebe:	687b      	ldr	r3, [r7, #4]
 801bec0:	835a      	strh	r2, [r3, #26]
    /* We have to return ERR_OK from here to indicate to the callers that this
       pcb should not be used any more as it will be freed soon via tcp_tmr.
       This is OK here since sending FIN does not guarantee a time frime for
       actually freeing the pcb, either (it is left in closure states for
       remote ACK or timeout) */
    return ERR_OK;
 801bec2:	2300      	movs	r3, #0
 801bec4:	e001      	b.n	801beca <tcp_close_shutdown_fin+0xbe>
  }
  return err;
 801bec6:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 801beca:	4618      	mov	r0, r3
 801becc:	3710      	adds	r7, #16
 801bece:	46bd      	mov	sp, r7
 801bed0:	bd80      	pop	{r7, pc}
 801bed2:	bf00      	nop
 801bed4:	0802f820 	.word	0x0802f820
 801bed8:	0802f8d0 	.word	0x0802f8d0
 801bedc:	0802f864 	.word	0x0802f864

0801bee0 <tcp_close>:
 * @return ERR_OK if connection has been closed
 *         another err_t if closing failed and pcb is not freed
 */
err_t
tcp_close(struct tcp_pcb *pcb)
{
 801bee0:	b580      	push	{r7, lr}
 801bee2:	b082      	sub	sp, #8
 801bee4:	af00      	add	r7, sp, #0
 801bee6:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801bee8:	f7f5 f98c 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("tcp_close: invalid pcb", pcb != NULL, return ERR_ARG);
 801beec:	687b      	ldr	r3, [r7, #4]
 801beee:	2b00      	cmp	r3, #0
 801bef0:	d109      	bne.n	801bf06 <tcp_close+0x26>
 801bef2:	4b0f      	ldr	r3, [pc, #60]	@ (801bf30 <tcp_close+0x50>)
 801bef4:	f44f 72f4 	mov.w	r2, #488	@ 0x1e8
 801bef8:	490e      	ldr	r1, [pc, #56]	@ (801bf34 <tcp_close+0x54>)
 801befa:	480f      	ldr	r0, [pc, #60]	@ (801bf38 <tcp_close+0x58>)
 801befc:	f00e fdae 	bl	802aa5c <iprintf>
 801bf00:	f06f 030f 	mvn.w	r3, #15
 801bf04:	e00f      	b.n	801bf26 <tcp_close+0x46>
  LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in "));

  tcp_debug_print_state(pcb->state);

  if (pcb->state != LISTEN) {
 801bf06:	687b      	ldr	r3, [r7, #4]
 801bf08:	7d1b      	ldrb	r3, [r3, #20]
 801bf0a:	2b01      	cmp	r3, #1
 801bf0c:	d006      	beq.n	801bf1c <tcp_close+0x3c>
    /* Set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801bf0e:	687b      	ldr	r3, [r7, #4]
 801bf10:	8b5b      	ldrh	r3, [r3, #26]
 801bf12:	f043 0310 	orr.w	r3, r3, #16
 801bf16:	b29a      	uxth	r2, r3
 801bf18:	687b      	ldr	r3, [r7, #4]
 801bf1a:	835a      	strh	r2, [r3, #26]
  }
  /* ... and close */
  return tcp_close_shutdown(pcb, 1);
 801bf1c:	2101      	movs	r1, #1
 801bf1e:	6878      	ldr	r0, [r7, #4]
 801bf20:	f7ff fe92 	bl	801bc48 <tcp_close_shutdown>
 801bf24:	4603      	mov	r3, r0
}
 801bf26:	4618      	mov	r0, r3
 801bf28:	3708      	adds	r7, #8
 801bf2a:	46bd      	mov	sp, r7
 801bf2c:	bd80      	pop	{r7, pc}
 801bf2e:	bf00      	nop
 801bf30:	0802f820 	.word	0x0802f820
 801bf34:	0802f930 	.word	0x0802f930
 801bf38:	0802f864 	.word	0x0802f864

0801bf3c <tcp_shutdown>:
 * @return ERR_OK if shutdown succeeded (or the PCB has already been shut down)
 *         another err_t on error.
 */
err_t
tcp_shutdown(struct tcp_pcb *pcb, int shut_rx, int shut_tx)
{
 801bf3c:	b580      	push	{r7, lr}
 801bf3e:	b084      	sub	sp, #16
 801bf40:	af00      	add	r7, sp, #0
 801bf42:	60f8      	str	r0, [r7, #12]
 801bf44:	60b9      	str	r1, [r7, #8]
 801bf46:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 801bf48:	f7f5 f95c 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("tcp_shutdown: invalid pcb", pcb != NULL, return ERR_ARG);
 801bf4c:	68fb      	ldr	r3, [r7, #12]
 801bf4e:	2b00      	cmp	r3, #0
 801bf50:	d109      	bne.n	801bf66 <tcp_shutdown+0x2a>
 801bf52:	4b26      	ldr	r3, [pc, #152]	@ (801bfec <tcp_shutdown+0xb0>)
 801bf54:	f240 2207 	movw	r2, #519	@ 0x207
 801bf58:	4925      	ldr	r1, [pc, #148]	@ (801bff0 <tcp_shutdown+0xb4>)
 801bf5a:	4826      	ldr	r0, [pc, #152]	@ (801bff4 <tcp_shutdown+0xb8>)
 801bf5c:	f00e fd7e 	bl	802aa5c <iprintf>
 801bf60:	f06f 030f 	mvn.w	r3, #15
 801bf64:	e03d      	b.n	801bfe2 <tcp_shutdown+0xa6>

  if (pcb->state == LISTEN) {
 801bf66:	68fb      	ldr	r3, [r7, #12]
 801bf68:	7d1b      	ldrb	r3, [r3, #20]
 801bf6a:	2b01      	cmp	r3, #1
 801bf6c:	d102      	bne.n	801bf74 <tcp_shutdown+0x38>
    return ERR_CONN;
 801bf6e:	f06f 030a 	mvn.w	r3, #10
 801bf72:	e036      	b.n	801bfe2 <tcp_shutdown+0xa6>
  }
  if (shut_rx) {
 801bf74:	68bb      	ldr	r3, [r7, #8]
 801bf76:	2b00      	cmp	r3, #0
 801bf78:	d01b      	beq.n	801bfb2 <tcp_shutdown+0x76>
    /* shut down the receive side: set a flag not to receive any more data... */
    tcp_set_flags(pcb, TF_RXCLOSED);
 801bf7a:	68fb      	ldr	r3, [r7, #12]
 801bf7c:	8b5b      	ldrh	r3, [r3, #26]
 801bf7e:	f043 0310 	orr.w	r3, r3, #16
 801bf82:	b29a      	uxth	r2, r3
 801bf84:	68fb      	ldr	r3, [r7, #12]
 801bf86:	835a      	strh	r2, [r3, #26]
    if (shut_tx) {
 801bf88:	687b      	ldr	r3, [r7, #4]
 801bf8a:	2b00      	cmp	r3, #0
 801bf8c:	d005      	beq.n	801bf9a <tcp_shutdown+0x5e>
      /* shutting down the tx AND rx side is the same as closing for the raw API */
      return tcp_close_shutdown(pcb, 1);
 801bf8e:	2101      	movs	r1, #1
 801bf90:	68f8      	ldr	r0, [r7, #12]
 801bf92:	f7ff fe59 	bl	801bc48 <tcp_close_shutdown>
 801bf96:	4603      	mov	r3, r0
 801bf98:	e023      	b.n	801bfe2 <tcp_shutdown+0xa6>
    }
    /* ... and free buffered data */
    if (pcb->refused_data != NULL) {
 801bf9a:	68fb      	ldr	r3, [r7, #12]
 801bf9c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801bf9e:	2b00      	cmp	r3, #0
 801bfa0:	d007      	beq.n	801bfb2 <tcp_shutdown+0x76>
      pbuf_free(pcb->refused_data);
 801bfa2:	68fb      	ldr	r3, [r7, #12]
 801bfa4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801bfa6:	4618      	mov	r0, r3
 801bfa8:	f7ff fae0 	bl	801b56c <pbuf_free>
      pcb->refused_data = NULL;
 801bfac:	68fb      	ldr	r3, [r7, #12]
 801bfae:	2200      	movs	r2, #0
 801bfb0:	679a      	str	r2, [r3, #120]	@ 0x78
    }
  }
  if (shut_tx) {
 801bfb2:	687b      	ldr	r3, [r7, #4]
 801bfb4:	2b00      	cmp	r3, #0
 801bfb6:	d013      	beq.n	801bfe0 <tcp_shutdown+0xa4>
    /* This can't happen twice since if it succeeds, the pcb's state is changed.
       Only close in these states as the others directly deallocate the PCB */
    switch (pcb->state) {
 801bfb8:	68fb      	ldr	r3, [r7, #12]
 801bfba:	7d1b      	ldrb	r3, [r3, #20]
 801bfbc:	2b04      	cmp	r3, #4
 801bfbe:	dc02      	bgt.n	801bfc6 <tcp_shutdown+0x8a>
 801bfc0:	2b03      	cmp	r3, #3
 801bfc2:	da02      	bge.n	801bfca <tcp_shutdown+0x8e>
 801bfc4:	e009      	b.n	801bfda <tcp_shutdown+0x9e>
 801bfc6:	2b07      	cmp	r3, #7
 801bfc8:	d107      	bne.n	801bfda <tcp_shutdown+0x9e>
      case SYN_RCVD:
      case ESTABLISHED:
      case CLOSE_WAIT:
        return tcp_close_shutdown(pcb, (u8_t)shut_rx);
 801bfca:	68bb      	ldr	r3, [r7, #8]
 801bfcc:	b2db      	uxtb	r3, r3
 801bfce:	4619      	mov	r1, r3
 801bfd0:	68f8      	ldr	r0, [r7, #12]
 801bfd2:	f7ff fe39 	bl	801bc48 <tcp_close_shutdown>
 801bfd6:	4603      	mov	r3, r0
 801bfd8:	e003      	b.n	801bfe2 <tcp_shutdown+0xa6>
      default:
        /* Not (yet?) connected, cannot shutdown the TX side as that would bring us
          into CLOSED state, where the PCB is deallocated. */
        return ERR_CONN;
 801bfda:	f06f 030a 	mvn.w	r3, #10
 801bfde:	e000      	b.n	801bfe2 <tcp_shutdown+0xa6>
    }
  }
  return ERR_OK;
 801bfe0:	2300      	movs	r3, #0
}
 801bfe2:	4618      	mov	r0, r3
 801bfe4:	3710      	adds	r7, #16
 801bfe6:	46bd      	mov	sp, r7
 801bfe8:	bd80      	pop	{r7, pc}
 801bfea:	bf00      	nop
 801bfec:	0802f820 	.word	0x0802f820
 801bff0:	0802f948 	.word	0x0802f948
 801bff4:	0802f864 	.word	0x0802f864

0801bff8 <tcp_abandon>:
 * @param pcb the tcp_pcb to abort
 * @param reset boolean to indicate whether a reset should be sent
 */
void
tcp_abandon(struct tcp_pcb *pcb, int reset)
{
 801bff8:	b580      	push	{r7, lr}
 801bffa:	b08e      	sub	sp, #56	@ 0x38
 801bffc:	af04      	add	r7, sp, #16
 801bffe:	6078      	str	r0, [r7, #4]
 801c000:	6039      	str	r1, [r7, #0]
#if LWIP_CALLBACK_API
  tcp_err_fn errf;
#endif /* LWIP_CALLBACK_API */
  void *errf_arg;

  LWIP_ASSERT_CORE_LOCKED();
 801c002:	f7f5 f8ff 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("tcp_abandon: invalid pcb", pcb != NULL, return);
 801c006:	687b      	ldr	r3, [r7, #4]
 801c008:	2b00      	cmp	r3, #0
 801c00a:	d107      	bne.n	801c01c <tcp_abandon+0x24>
 801c00c:	4b52      	ldr	r3, [pc, #328]	@ (801c158 <tcp_abandon+0x160>)
 801c00e:	f240 223d 	movw	r2, #573	@ 0x23d
 801c012:	4952      	ldr	r1, [pc, #328]	@ (801c15c <tcp_abandon+0x164>)
 801c014:	4852      	ldr	r0, [pc, #328]	@ (801c160 <tcp_abandon+0x168>)
 801c016:	f00e fd21 	bl	802aa5c <iprintf>
 801c01a:	e099      	b.n	801c150 <tcp_abandon+0x158>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_abort/tcp_abandon for listen-pcbs",
 801c01c:	687b      	ldr	r3, [r7, #4]
 801c01e:	7d1b      	ldrb	r3, [r3, #20]
 801c020:	2b01      	cmp	r3, #1
 801c022:	d106      	bne.n	801c032 <tcp_abandon+0x3a>
 801c024:	4b4c      	ldr	r3, [pc, #304]	@ (801c158 <tcp_abandon+0x160>)
 801c026:	f44f 7210 	mov.w	r2, #576	@ 0x240
 801c02a:	494e      	ldr	r1, [pc, #312]	@ (801c164 <tcp_abandon+0x16c>)
 801c02c:	484c      	ldr	r0, [pc, #304]	@ (801c160 <tcp_abandon+0x168>)
 801c02e:	f00e fd15 	bl	802aa5c <iprintf>
              pcb->state != LISTEN);
  /* Figure out on which TCP PCB list we are, and remove us. If we
     are in an active state, call the receive function associated with
     the PCB with a NULL argument, and send an RST to the remote end. */
  if (pcb->state == TIME_WAIT) {
 801c032:	687b      	ldr	r3, [r7, #4]
 801c034:	7d1b      	ldrb	r3, [r3, #20]
 801c036:	2b0a      	cmp	r3, #10
 801c038:	d107      	bne.n	801c04a <tcp_abandon+0x52>
    tcp_pcb_remove(&tcp_tw_pcbs, pcb);
 801c03a:	6879      	ldr	r1, [r7, #4]
 801c03c:	484a      	ldr	r0, [pc, #296]	@ (801c168 <tcp_abandon+0x170>)
 801c03e:	f001 fa03 	bl	801d448 <tcp_pcb_remove>
    tcp_free(pcb);
 801c042:	6878      	ldr	r0, [r7, #4]
 801c044:	f7ff fd4e 	bl	801bae4 <tcp_free>
 801c048:	e082      	b.n	801c150 <tcp_abandon+0x158>
  } else {
    int send_rst = 0;
 801c04a:	2300      	movs	r3, #0
 801c04c:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t local_port = 0;
 801c04e:	2300      	movs	r3, #0
 801c050:	847b      	strh	r3, [r7, #34]	@ 0x22
    enum tcp_state last_state;
    seqno = pcb->snd_nxt;
 801c052:	687b      	ldr	r3, [r7, #4]
 801c054:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801c056:	61bb      	str	r3, [r7, #24]
    ackno = pcb->rcv_nxt;
 801c058:	687b      	ldr	r3, [r7, #4]
 801c05a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801c05c:	617b      	str	r3, [r7, #20]
#if LWIP_CALLBACK_API
    errf = pcb->errf;
 801c05e:	687b      	ldr	r3, [r7, #4]
 801c060:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801c064:	613b      	str	r3, [r7, #16]
#endif /* LWIP_CALLBACK_API */
    errf_arg = pcb->callback_arg;
 801c066:	687b      	ldr	r3, [r7, #4]
 801c068:	691b      	ldr	r3, [r3, #16]
 801c06a:	60fb      	str	r3, [r7, #12]
    if (pcb->state == CLOSED) {
 801c06c:	687b      	ldr	r3, [r7, #4]
 801c06e:	7d1b      	ldrb	r3, [r3, #20]
 801c070:	2b00      	cmp	r3, #0
 801c072:	d126      	bne.n	801c0c2 <tcp_abandon+0xca>
      if (pcb->local_port != 0) {
 801c074:	687b      	ldr	r3, [r7, #4]
 801c076:	8adb      	ldrh	r3, [r3, #22]
 801c078:	2b00      	cmp	r3, #0
 801c07a:	d02e      	beq.n	801c0da <tcp_abandon+0xe2>
        /* bound, not yet opened */
        TCP_RMV(&tcp_bound_pcbs, pcb);
 801c07c:	4b3b      	ldr	r3, [pc, #236]	@ (801c16c <tcp_abandon+0x174>)
 801c07e:	681b      	ldr	r3, [r3, #0]
 801c080:	687a      	ldr	r2, [r7, #4]
 801c082:	429a      	cmp	r2, r3
 801c084:	d105      	bne.n	801c092 <tcp_abandon+0x9a>
 801c086:	4b39      	ldr	r3, [pc, #228]	@ (801c16c <tcp_abandon+0x174>)
 801c088:	681b      	ldr	r3, [r3, #0]
 801c08a:	68db      	ldr	r3, [r3, #12]
 801c08c:	4a37      	ldr	r2, [pc, #220]	@ (801c16c <tcp_abandon+0x174>)
 801c08e:	6013      	str	r3, [r2, #0]
 801c090:	e013      	b.n	801c0ba <tcp_abandon+0xc2>
 801c092:	4b36      	ldr	r3, [pc, #216]	@ (801c16c <tcp_abandon+0x174>)
 801c094:	681b      	ldr	r3, [r3, #0]
 801c096:	61fb      	str	r3, [r7, #28]
 801c098:	e00c      	b.n	801c0b4 <tcp_abandon+0xbc>
 801c09a:	69fb      	ldr	r3, [r7, #28]
 801c09c:	68db      	ldr	r3, [r3, #12]
 801c09e:	687a      	ldr	r2, [r7, #4]
 801c0a0:	429a      	cmp	r2, r3
 801c0a2:	d104      	bne.n	801c0ae <tcp_abandon+0xb6>
 801c0a4:	687b      	ldr	r3, [r7, #4]
 801c0a6:	68da      	ldr	r2, [r3, #12]
 801c0a8:	69fb      	ldr	r3, [r7, #28]
 801c0aa:	60da      	str	r2, [r3, #12]
 801c0ac:	e005      	b.n	801c0ba <tcp_abandon+0xc2>
 801c0ae:	69fb      	ldr	r3, [r7, #28]
 801c0b0:	68db      	ldr	r3, [r3, #12]
 801c0b2:	61fb      	str	r3, [r7, #28]
 801c0b4:	69fb      	ldr	r3, [r7, #28]
 801c0b6:	2b00      	cmp	r3, #0
 801c0b8:	d1ef      	bne.n	801c09a <tcp_abandon+0xa2>
 801c0ba:	687b      	ldr	r3, [r7, #4]
 801c0bc:	2200      	movs	r2, #0
 801c0be:	60da      	str	r2, [r3, #12]
 801c0c0:	e00b      	b.n	801c0da <tcp_abandon+0xe2>
      }
    } else {
      send_rst = reset;
 801c0c2:	683b      	ldr	r3, [r7, #0]
 801c0c4:	627b      	str	r3, [r7, #36]	@ 0x24
      local_port = pcb->local_port;
 801c0c6:	687b      	ldr	r3, [r7, #4]
 801c0c8:	8adb      	ldrh	r3, [r3, #22]
 801c0ca:	847b      	strh	r3, [r7, #34]	@ 0x22
      TCP_PCB_REMOVE_ACTIVE(pcb);
 801c0cc:	6879      	ldr	r1, [r7, #4]
 801c0ce:	4828      	ldr	r0, [pc, #160]	@ (801c170 <tcp_abandon+0x178>)
 801c0d0:	f001 f9ba 	bl	801d448 <tcp_pcb_remove>
 801c0d4:	4b27      	ldr	r3, [pc, #156]	@ (801c174 <tcp_abandon+0x17c>)
 801c0d6:	2201      	movs	r2, #1
 801c0d8:	701a      	strb	r2, [r3, #0]
    }
    if (pcb->unacked != NULL) {
 801c0da:	687b      	ldr	r3, [r7, #4]
 801c0dc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801c0de:	2b00      	cmp	r3, #0
 801c0e0:	d004      	beq.n	801c0ec <tcp_abandon+0xf4>
      tcp_segs_free(pcb->unacked);
 801c0e2:	687b      	ldr	r3, [r7, #4]
 801c0e4:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801c0e6:	4618      	mov	r0, r3
 801c0e8:	f000 fe84 	bl	801cdf4 <tcp_segs_free>
    }
    if (pcb->unsent != NULL) {
 801c0ec:	687b      	ldr	r3, [r7, #4]
 801c0ee:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801c0f0:	2b00      	cmp	r3, #0
 801c0f2:	d004      	beq.n	801c0fe <tcp_abandon+0x106>
      tcp_segs_free(pcb->unsent);
 801c0f4:	687b      	ldr	r3, [r7, #4]
 801c0f6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801c0f8:	4618      	mov	r0, r3
 801c0fa:	f000 fe7b 	bl	801cdf4 <tcp_segs_free>
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801c0fe:	687b      	ldr	r3, [r7, #4]
 801c100:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c102:	2b00      	cmp	r3, #0
 801c104:	d004      	beq.n	801c110 <tcp_abandon+0x118>
      tcp_segs_free(pcb->ooseq);
 801c106:	687b      	ldr	r3, [r7, #4]
 801c108:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c10a:	4618      	mov	r0, r3
 801c10c:	f000 fe72 	bl	801cdf4 <tcp_segs_free>
    }
#endif /* TCP_QUEUE_OOSEQ */
    tcp_backlog_accepted(pcb);
    if (send_rst) {
 801c110:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801c112:	2b00      	cmp	r3, #0
 801c114:	d00e      	beq.n	801c134 <tcp_abandon+0x13c>
      LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n"));
      tcp_rst(pcb, seqno, ackno, &pcb->local_ip, &pcb->remote_ip, local_port, pcb->remote_port);
 801c116:	6879      	ldr	r1, [r7, #4]
 801c118:	687b      	ldr	r3, [r7, #4]
 801c11a:	3304      	adds	r3, #4
 801c11c:	687a      	ldr	r2, [r7, #4]
 801c11e:	8b12      	ldrh	r2, [r2, #24]
 801c120:	9202      	str	r2, [sp, #8]
 801c122:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801c124:	9201      	str	r2, [sp, #4]
 801c126:	9300      	str	r3, [sp, #0]
 801c128:	460b      	mov	r3, r1
 801c12a:	697a      	ldr	r2, [r7, #20]
 801c12c:	69b9      	ldr	r1, [r7, #24]
 801c12e:	6878      	ldr	r0, [r7, #4]
 801c130:	f005 fbca 	bl	80218c8 <tcp_rst>
    }
    last_state = pcb->state;
 801c134:	687b      	ldr	r3, [r7, #4]
 801c136:	7d1b      	ldrb	r3, [r3, #20]
 801c138:	72fb      	strb	r3, [r7, #11]
    tcp_free(pcb);
 801c13a:	6878      	ldr	r0, [r7, #4]
 801c13c:	f7ff fcd2 	bl	801bae4 <tcp_free>
    TCP_EVENT_ERR(last_state, errf, errf_arg, ERR_ABRT);
 801c140:	693b      	ldr	r3, [r7, #16]
 801c142:	2b00      	cmp	r3, #0
 801c144:	d004      	beq.n	801c150 <tcp_abandon+0x158>
 801c146:	693b      	ldr	r3, [r7, #16]
 801c148:	f06f 010c 	mvn.w	r1, #12
 801c14c:	68f8      	ldr	r0, [r7, #12]
 801c14e:	4798      	blx	r3
  }
}
 801c150:	3728      	adds	r7, #40	@ 0x28
 801c152:	46bd      	mov	sp, r7
 801c154:	bd80      	pop	{r7, pc}
 801c156:	bf00      	nop
 801c158:	0802f820 	.word	0x0802f820
 801c15c:	0802f964 	.word	0x0802f964
 801c160:	0802f864 	.word	0x0802f864
 801c164:	0802f980 	.word	0x0802f980
 801c168:	2402afb8 	.word	0x2402afb8
 801c16c:	2402afac 	.word	0x2402afac
 801c170:	2402afb4 	.word	0x2402afb4
 801c174:	2402afbc 	.word	0x2402afbc

0801c178 <tcp_abort>:
 *
 * @param pcb the tcp pcb to abort
 */
void
tcp_abort(struct tcp_pcb *pcb)
{
 801c178:	b580      	push	{r7, lr}
 801c17a:	b082      	sub	sp, #8
 801c17c:	af00      	add	r7, sp, #0
 801c17e:	6078      	str	r0, [r7, #4]
  tcp_abandon(pcb, 1);
 801c180:	2101      	movs	r1, #1
 801c182:	6878      	ldr	r0, [r7, #4]
 801c184:	f7ff ff38 	bl	801bff8 <tcp_abandon>
}
 801c188:	bf00      	nop
 801c18a:	3708      	adds	r7, #8
 801c18c:	46bd      	mov	sp, r7
 801c18e:	bd80      	pop	{r7, pc}

0801c190 <tcp_update_rcv_ann_wnd>:
 * Returns how much extra window would be advertised if we sent an
 * update now.
 */
u32_t
tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb)
{
 801c190:	b580      	push	{r7, lr}
 801c192:	b084      	sub	sp, #16
 801c194:	af00      	add	r7, sp, #0
 801c196:	6078      	str	r0, [r7, #4]
  u32_t new_right_edge;

  LWIP_ASSERT("tcp_update_rcv_ann_wnd: invalid pcb", pcb != NULL);
 801c198:	687b      	ldr	r3, [r7, #4]
 801c19a:	2b00      	cmp	r3, #0
 801c19c:	d106      	bne.n	801c1ac <tcp_update_rcv_ann_wnd+0x1c>
 801c19e:	4b25      	ldr	r3, [pc, #148]	@ (801c234 <tcp_update_rcv_ann_wnd+0xa4>)
 801c1a0:	f240 32a6 	movw	r2, #934	@ 0x3a6
 801c1a4:	4924      	ldr	r1, [pc, #144]	@ (801c238 <tcp_update_rcv_ann_wnd+0xa8>)
 801c1a6:	4825      	ldr	r0, [pc, #148]	@ (801c23c <tcp_update_rcv_ann_wnd+0xac>)
 801c1a8:	f00e fc58 	bl	802aa5c <iprintf>
  new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd;
 801c1ac:	687b      	ldr	r3, [r7, #4]
 801c1ae:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801c1b0:	687a      	ldr	r2, [r7, #4]
 801c1b2:	8d12      	ldrh	r2, [r2, #40]	@ 0x28
 801c1b4:	4413      	add	r3, r2
 801c1b6:	60fb      	str	r3, [r7, #12]

  if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) {
 801c1b8:	687b      	ldr	r3, [r7, #4]
 801c1ba:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801c1bc:	687a      	ldr	r2, [r7, #4]
 801c1be:	8e52      	ldrh	r2, [r2, #50]	@ 0x32
 801c1c0:	f640 3168 	movw	r1, #2920	@ 0xb68
 801c1c4:	428a      	cmp	r2, r1
 801c1c6:	bf28      	it	cs
 801c1c8:	460a      	movcs	r2, r1
 801c1ca:	b292      	uxth	r2, r2
 801c1cc:	4413      	add	r3, r2
 801c1ce:	68fa      	ldr	r2, [r7, #12]
 801c1d0:	1ad3      	subs	r3, r2, r3
 801c1d2:	2b00      	cmp	r3, #0
 801c1d4:	db08      	blt.n	801c1e8 <tcp_update_rcv_ann_wnd+0x58>
    /* we can advertise more window */
    pcb->rcv_ann_wnd = pcb->rcv_wnd;
 801c1d6:	687b      	ldr	r3, [r7, #4]
 801c1d8:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801c1da:	687b      	ldr	r3, [r7, #4]
 801c1dc:	855a      	strh	r2, [r3, #42]	@ 0x2a
    return new_right_edge - pcb->rcv_ann_right_edge;
 801c1de:	687b      	ldr	r3, [r7, #4]
 801c1e0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801c1e2:	68fa      	ldr	r2, [r7, #12]
 801c1e4:	1ad3      	subs	r3, r2, r3
 801c1e6:	e020      	b.n	801c22a <tcp_update_rcv_ann_wnd+0x9a>
  } else {
    if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) {
 801c1e8:	687b      	ldr	r3, [r7, #4]
 801c1ea:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801c1ec:	687b      	ldr	r3, [r7, #4]
 801c1ee:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 801c1f0:	1ad3      	subs	r3, r2, r3
 801c1f2:	2b00      	cmp	r3, #0
 801c1f4:	dd03      	ble.n	801c1fe <tcp_update_rcv_ann_wnd+0x6e>
      /* Can happen due to other end sending out of advertised window,
       * but within actual available (but not yet advertised) window */
      pcb->rcv_ann_wnd = 0;
 801c1f6:	687b      	ldr	r3, [r7, #4]
 801c1f8:	2200      	movs	r2, #0
 801c1fa:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801c1fc:	e014      	b.n	801c228 <tcp_update_rcv_ann_wnd+0x98>
    } else {
      /* keep the right edge of window constant */
      u32_t new_rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt;
 801c1fe:	687b      	ldr	r3, [r7, #4]
 801c200:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 801c202:	687b      	ldr	r3, [r7, #4]
 801c204:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801c206:	1ad3      	subs	r3, r2, r3
 801c208:	60bb      	str	r3, [r7, #8]
#if !LWIP_WND_SCALE
      LWIP_ASSERT("new_rcv_ann_wnd <= 0xffff", new_rcv_ann_wnd <= 0xffff);
 801c20a:	68bb      	ldr	r3, [r7, #8]
 801c20c:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 801c210:	d306      	bcc.n	801c220 <tcp_update_rcv_ann_wnd+0x90>
 801c212:	4b08      	ldr	r3, [pc, #32]	@ (801c234 <tcp_update_rcv_ann_wnd+0xa4>)
 801c214:	f240 32b6 	movw	r2, #950	@ 0x3b6
 801c218:	4909      	ldr	r1, [pc, #36]	@ (801c240 <tcp_update_rcv_ann_wnd+0xb0>)
 801c21a:	4808      	ldr	r0, [pc, #32]	@ (801c23c <tcp_update_rcv_ann_wnd+0xac>)
 801c21c:	f00e fc1e 	bl	802aa5c <iprintf>
#endif
      pcb->rcv_ann_wnd = (tcpwnd_size_t)new_rcv_ann_wnd;
 801c220:	68bb      	ldr	r3, [r7, #8]
 801c222:	b29a      	uxth	r2, r3
 801c224:	687b      	ldr	r3, [r7, #4]
 801c226:	855a      	strh	r2, [r3, #42]	@ 0x2a
    }
    return 0;
 801c228:	2300      	movs	r3, #0
  }
}
 801c22a:	4618      	mov	r0, r3
 801c22c:	3710      	adds	r7, #16
 801c22e:	46bd      	mov	sp, r7
 801c230:	bd80      	pop	{r7, pc}
 801c232:	bf00      	nop
 801c234:	0802f820 	.word	0x0802f820
 801c238:	0802fa7c 	.word	0x0802fa7c
 801c23c:	0802f864 	.word	0x0802f864
 801c240:	0802faa0 	.word	0x0802faa0

0801c244 <tcp_recved>:
 * @param pcb the tcp_pcb for which data is read
 * @param len the amount of bytes that have been read by the application
 */
void
tcp_recved(struct tcp_pcb *pcb, u16_t len)
{
 801c244:	b580      	push	{r7, lr}
 801c246:	b084      	sub	sp, #16
 801c248:	af00      	add	r7, sp, #0
 801c24a:	6078      	str	r0, [r7, #4]
 801c24c:	460b      	mov	r3, r1
 801c24e:	807b      	strh	r3, [r7, #2]
  u32_t wnd_inflation;
  tcpwnd_size_t rcv_wnd;

  LWIP_ASSERT_CORE_LOCKED();
 801c250:	f7f4 ffd8 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("tcp_recved: invalid pcb", pcb != NULL, return);
 801c254:	687b      	ldr	r3, [r7, #4]
 801c256:	2b00      	cmp	r3, #0
 801c258:	d107      	bne.n	801c26a <tcp_recved+0x26>
 801c25a:	4b20      	ldr	r3, [pc, #128]	@ (801c2dc <tcp_recved+0x98>)
 801c25c:	f240 32cf 	movw	r2, #975	@ 0x3cf
 801c260:	491f      	ldr	r1, [pc, #124]	@ (801c2e0 <tcp_recved+0x9c>)
 801c262:	4820      	ldr	r0, [pc, #128]	@ (801c2e4 <tcp_recved+0xa0>)
 801c264:	f00e fbfa 	bl	802aa5c <iprintf>
 801c268:	e034      	b.n	801c2d4 <tcp_recved+0x90>

  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_recved for listen-pcbs",
 801c26a:	687b      	ldr	r3, [r7, #4]
 801c26c:	7d1b      	ldrb	r3, [r3, #20]
 801c26e:	2b01      	cmp	r3, #1
 801c270:	d106      	bne.n	801c280 <tcp_recved+0x3c>
 801c272:	4b1a      	ldr	r3, [pc, #104]	@ (801c2dc <tcp_recved+0x98>)
 801c274:	f240 32d2 	movw	r2, #978	@ 0x3d2
 801c278:	491b      	ldr	r1, [pc, #108]	@ (801c2e8 <tcp_recved+0xa4>)
 801c27a:	481a      	ldr	r0, [pc, #104]	@ (801c2e4 <tcp_recved+0xa0>)
 801c27c:	f00e fbee 	bl	802aa5c <iprintf>
              pcb->state != LISTEN);

  rcv_wnd = (tcpwnd_size_t)(pcb->rcv_wnd + len);
 801c280:	687b      	ldr	r3, [r7, #4]
 801c282:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801c284:	887b      	ldrh	r3, [r7, #2]
 801c286:	4413      	add	r3, r2
 801c288:	81fb      	strh	r3, [r7, #14]
  if ((rcv_wnd > TCP_WND_MAX(pcb)) || (rcv_wnd < pcb->rcv_wnd)) {
 801c28a:	89fb      	ldrh	r3, [r7, #14]
 801c28c:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c290:	4293      	cmp	r3, r2
 801c292:	d804      	bhi.n	801c29e <tcp_recved+0x5a>
 801c294:	687b      	ldr	r3, [r7, #4]
 801c296:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801c298:	89fa      	ldrh	r2, [r7, #14]
 801c29a:	429a      	cmp	r2, r3
 801c29c:	d204      	bcs.n	801c2a8 <tcp_recved+0x64>
    /* window got too big or tcpwnd_size_t overflow */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: window got too big or tcpwnd_size_t overflow\n"));
    pcb->rcv_wnd = TCP_WND_MAX(pcb);
 801c29e:	687b      	ldr	r3, [r7, #4]
 801c2a0:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c2a4:	851a      	strh	r2, [r3, #40]	@ 0x28
 801c2a6:	e002      	b.n	801c2ae <tcp_recved+0x6a>
  } else  {
    pcb->rcv_wnd = rcv_wnd;
 801c2a8:	687b      	ldr	r3, [r7, #4]
 801c2aa:	89fa      	ldrh	r2, [r7, #14]
 801c2ac:	851a      	strh	r2, [r3, #40]	@ 0x28
  }

  wnd_inflation = tcp_update_rcv_ann_wnd(pcb);
 801c2ae:	6878      	ldr	r0, [r7, #4]
 801c2b0:	f7ff ff6e 	bl	801c190 <tcp_update_rcv_ann_wnd>
 801c2b4:	60b8      	str	r0, [r7, #8]

  /* If the change in the right edge of window is significant (default
   * watermark is TCP_WND/4), then send an explicit update now.
   * Otherwise wait for a packet to be sent in the normal course of
   * events (or more window to be available later) */
  if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) {
 801c2b6:	68bb      	ldr	r3, [r7, #8]
 801c2b8:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801c2bc:	4293      	cmp	r3, r2
 801c2be:	d909      	bls.n	801c2d4 <tcp_recved+0x90>
    tcp_ack_now(pcb);
 801c2c0:	687b      	ldr	r3, [r7, #4]
 801c2c2:	8b5b      	ldrh	r3, [r3, #26]
 801c2c4:	f043 0302 	orr.w	r3, r3, #2
 801c2c8:	b29a      	uxth	r2, r3
 801c2ca:	687b      	ldr	r3, [r7, #4]
 801c2cc:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801c2ce:	6878      	ldr	r0, [r7, #4]
 801c2d0:	f004 fd38 	bl	8020d44 <tcp_output>
  }

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: received %"U16_F" bytes, wnd %"TCPWNDSIZE_F" (%"TCPWNDSIZE_F").\n",
                          len, pcb->rcv_wnd, (u16_t)(TCP_WND_MAX(pcb) - pcb->rcv_wnd)));
}
 801c2d4:	3710      	adds	r7, #16
 801c2d6:	46bd      	mov	sp, r7
 801c2d8:	bd80      	pop	{r7, pc}
 801c2da:	bf00      	nop
 801c2dc:	0802f820 	.word	0x0802f820
 801c2e0:	0802fabc 	.word	0x0802fabc
 801c2e4:	0802f864 	.word	0x0802f864
 801c2e8:	0802fad4 	.word	0x0802fad4

0801c2ec <tcp_new_port>:
 *
 * @return a new (free) local TCP port number
 */
static u16_t
tcp_new_port(void)
{
 801c2ec:	b480      	push	{r7}
 801c2ee:	b083      	sub	sp, #12
 801c2f0:	af00      	add	r7, sp, #0
  u8_t i;
  u16_t n = 0;
 801c2f2:	2300      	movs	r3, #0
 801c2f4:	80bb      	strh	r3, [r7, #4]
  struct tcp_pcb *pcb;

again:
  tcp_port++;
 801c2f6:	4b1e      	ldr	r3, [pc, #120]	@ (801c370 <tcp_new_port+0x84>)
 801c2f8:	881b      	ldrh	r3, [r3, #0]
 801c2fa:	3301      	adds	r3, #1
 801c2fc:	b29a      	uxth	r2, r3
 801c2fe:	4b1c      	ldr	r3, [pc, #112]	@ (801c370 <tcp_new_port+0x84>)
 801c300:	801a      	strh	r2, [r3, #0]
  if (tcp_port == TCP_LOCAL_PORT_RANGE_END) {
 801c302:	4b1b      	ldr	r3, [pc, #108]	@ (801c370 <tcp_new_port+0x84>)
 801c304:	881b      	ldrh	r3, [r3, #0]
 801c306:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801c30a:	4293      	cmp	r3, r2
 801c30c:	d103      	bne.n	801c316 <tcp_new_port+0x2a>
    tcp_port = TCP_LOCAL_PORT_RANGE_START;
 801c30e:	4b18      	ldr	r3, [pc, #96]	@ (801c370 <tcp_new_port+0x84>)
 801c310:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 801c314:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCB lists. */
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801c316:	2300      	movs	r3, #0
 801c318:	71fb      	strb	r3, [r7, #7]
 801c31a:	e01e      	b.n	801c35a <tcp_new_port+0x6e>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801c31c:	79fb      	ldrb	r3, [r7, #7]
 801c31e:	4a15      	ldr	r2, [pc, #84]	@ (801c374 <tcp_new_port+0x88>)
 801c320:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 801c324:	681b      	ldr	r3, [r3, #0]
 801c326:	603b      	str	r3, [r7, #0]
 801c328:	e011      	b.n	801c34e <tcp_new_port+0x62>
      if (pcb->local_port == tcp_port) {
 801c32a:	683b      	ldr	r3, [r7, #0]
 801c32c:	8ada      	ldrh	r2, [r3, #22]
 801c32e:	4b10      	ldr	r3, [pc, #64]	@ (801c370 <tcp_new_port+0x84>)
 801c330:	881b      	ldrh	r3, [r3, #0]
 801c332:	429a      	cmp	r2, r3
 801c334:	d108      	bne.n	801c348 <tcp_new_port+0x5c>
        n++;
 801c336:	88bb      	ldrh	r3, [r7, #4]
 801c338:	3301      	adds	r3, #1
 801c33a:	80bb      	strh	r3, [r7, #4]
        if (n > (TCP_LOCAL_PORT_RANGE_END - TCP_LOCAL_PORT_RANGE_START)) {
 801c33c:	88bb      	ldrh	r3, [r7, #4]
 801c33e:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 801c342:	d3d8      	bcc.n	801c2f6 <tcp_new_port+0xa>
          return 0;
 801c344:	2300      	movs	r3, #0
 801c346:	e00d      	b.n	801c364 <tcp_new_port+0x78>
    for (pcb = *tcp_pcb_lists[i]; pcb != NULL; pcb = pcb->next) {
 801c348:	683b      	ldr	r3, [r7, #0]
 801c34a:	68db      	ldr	r3, [r3, #12]
 801c34c:	603b      	str	r3, [r7, #0]
 801c34e:	683b      	ldr	r3, [r7, #0]
 801c350:	2b00      	cmp	r3, #0
 801c352:	d1ea      	bne.n	801c32a <tcp_new_port+0x3e>
  for (i = 0; i < NUM_TCP_PCB_LISTS; i++) {
 801c354:	79fb      	ldrb	r3, [r7, #7]
 801c356:	3301      	adds	r3, #1
 801c358:	71fb      	strb	r3, [r7, #7]
 801c35a:	79fb      	ldrb	r3, [r7, #7]
 801c35c:	2b03      	cmp	r3, #3
 801c35e:	d9dd      	bls.n	801c31c <tcp_new_port+0x30>
        }
        goto again;
      }
    }
  }
  return tcp_port;
 801c360:	4b03      	ldr	r3, [pc, #12]	@ (801c370 <tcp_new_port+0x84>)
 801c362:	881b      	ldrh	r3, [r3, #0]
}
 801c364:	4618      	mov	r0, r3
 801c366:	370c      	adds	r7, #12
 801c368:	46bd      	mov	sp, r7
 801c36a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801c36e:	4770      	bx	lr
 801c370:	2400004c 	.word	0x2400004c
 801c374:	08031ec0 	.word	0x08031ec0

0801c378 <tcp_connect>:
 *         other err_t values if connect request couldn't be sent
 */
err_t
tcp_connect(struct tcp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port,
            tcp_connected_fn connected)
{
 801c378:	b580      	push	{r7, lr}
 801c37a:	b08a      	sub	sp, #40	@ 0x28
 801c37c:	af00      	add	r7, sp, #0
 801c37e:	60f8      	str	r0, [r7, #12]
 801c380:	60b9      	str	r1, [r7, #8]
 801c382:	603b      	str	r3, [r7, #0]
 801c384:	4613      	mov	r3, r2
 801c386:	80fb      	strh	r3, [r7, #6]
  struct netif *netif = NULL;
 801c388:	2300      	movs	r3, #0
 801c38a:	627b      	str	r3, [r7, #36]	@ 0x24
  err_t ret;
  u32_t iss;
  u16_t old_local_port;

  LWIP_ASSERT_CORE_LOCKED();
 801c38c:	f7f4 ff3a 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("tcp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 801c390:	68fb      	ldr	r3, [r7, #12]
 801c392:	2b00      	cmp	r3, #0
 801c394:	d109      	bne.n	801c3aa <tcp_connect+0x32>
 801c396:	4b7d      	ldr	r3, [pc, #500]	@ (801c58c <tcp_connect+0x214>)
 801c398:	f240 4235 	movw	r2, #1077	@ 0x435
 801c39c:	497c      	ldr	r1, [pc, #496]	@ (801c590 <tcp_connect+0x218>)
 801c39e:	487d      	ldr	r0, [pc, #500]	@ (801c594 <tcp_connect+0x21c>)
 801c3a0:	f00e fb5c 	bl	802aa5c <iprintf>
 801c3a4:	f06f 030f 	mvn.w	r3, #15
 801c3a8:	e0ec      	b.n	801c584 <tcp_connect+0x20c>
  LWIP_ERROR("tcp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 801c3aa:	68bb      	ldr	r3, [r7, #8]
 801c3ac:	2b00      	cmp	r3, #0
 801c3ae:	d109      	bne.n	801c3c4 <tcp_connect+0x4c>
 801c3b0:	4b76      	ldr	r3, [pc, #472]	@ (801c58c <tcp_connect+0x214>)
 801c3b2:	f240 4236 	movw	r2, #1078	@ 0x436
 801c3b6:	4978      	ldr	r1, [pc, #480]	@ (801c598 <tcp_connect+0x220>)
 801c3b8:	4876      	ldr	r0, [pc, #472]	@ (801c594 <tcp_connect+0x21c>)
 801c3ba:	f00e fb4f 	bl	802aa5c <iprintf>
 801c3be:	f06f 030f 	mvn.w	r3, #15
 801c3c2:	e0df      	b.n	801c584 <tcp_connect+0x20c>

  LWIP_ERROR("tcp_connect: can only connect from state CLOSED", pcb->state == CLOSED, return ERR_ISCONN);
 801c3c4:	68fb      	ldr	r3, [r7, #12]
 801c3c6:	7d1b      	ldrb	r3, [r3, #20]
 801c3c8:	2b00      	cmp	r3, #0
 801c3ca:	d009      	beq.n	801c3e0 <tcp_connect+0x68>
 801c3cc:	4b6f      	ldr	r3, [pc, #444]	@ (801c58c <tcp_connect+0x214>)
 801c3ce:	f44f 6287 	mov.w	r2, #1080	@ 0x438
 801c3d2:	4972      	ldr	r1, [pc, #456]	@ (801c59c <tcp_connect+0x224>)
 801c3d4:	486f      	ldr	r0, [pc, #444]	@ (801c594 <tcp_connect+0x21c>)
 801c3d6:	f00e fb41 	bl	802aa5c <iprintf>
 801c3da:	f06f 0309 	mvn.w	r3, #9
 801c3de:	e0d1      	b.n	801c584 <tcp_connect+0x20c>

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port));
  ip_addr_set(&pcb->remote_ip, ipaddr);
 801c3e0:	68bb      	ldr	r3, [r7, #8]
 801c3e2:	2b00      	cmp	r3, #0
 801c3e4:	d002      	beq.n	801c3ec <tcp_connect+0x74>
 801c3e6:	68bb      	ldr	r3, [r7, #8]
 801c3e8:	681b      	ldr	r3, [r3, #0]
 801c3ea:	e000      	b.n	801c3ee <tcp_connect+0x76>
 801c3ec:	2300      	movs	r3, #0
 801c3ee:	68fa      	ldr	r2, [r7, #12]
 801c3f0:	6053      	str	r3, [r2, #4]
  pcb->remote_port = port;
 801c3f2:	68fb      	ldr	r3, [r7, #12]
 801c3f4:	88fa      	ldrh	r2, [r7, #6]
 801c3f6:	831a      	strh	r2, [r3, #24]

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 801c3f8:	68fb      	ldr	r3, [r7, #12]
 801c3fa:	7a1b      	ldrb	r3, [r3, #8]
 801c3fc:	2b00      	cmp	r3, #0
 801c3fe:	d006      	beq.n	801c40e <tcp_connect+0x96>
    netif = netif_get_by_index(pcb->netif_idx);
 801c400:	68fb      	ldr	r3, [r7, #12]
 801c402:	7a1b      	ldrb	r3, [r3, #8]
 801c404:	4618      	mov	r0, r3
 801c406:	f7fe fcf1 	bl	801adec <netif_get_by_index>
 801c40a:	6278      	str	r0, [r7, #36]	@ 0x24
 801c40c:	e005      	b.n	801c41a <tcp_connect+0xa2>
  } else {
    /* check if we have a route to the remote host */
    netif = ip_route(&pcb->local_ip, &pcb->remote_ip);
 801c40e:	68fb      	ldr	r3, [r7, #12]
 801c410:	3304      	adds	r3, #4
 801c412:	4618      	mov	r0, r3
 801c414:	f009 fb14 	bl	8025a40 <ip4_route>
 801c418:	6278      	str	r0, [r7, #36]	@ 0x24
  }
  if (netif == NULL) {
 801c41a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801c41c:	2b00      	cmp	r3, #0
 801c41e:	d102      	bne.n	801c426 <tcp_connect+0xae>
    /* Don't even try to send a SYN packet if we have no route since that will fail. */
    return ERR_RTE;
 801c420:	f06f 0303 	mvn.w	r3, #3
 801c424:	e0ae      	b.n	801c584 <tcp_connect+0x20c>
  }

  /* check if local IP has been assigned to pcb, if not, get one */
  if (ip_addr_isany(&pcb->local_ip)) {
 801c426:	68fb      	ldr	r3, [r7, #12]
 801c428:	2b00      	cmp	r3, #0
 801c42a:	d003      	beq.n	801c434 <tcp_connect+0xbc>
 801c42c:	68fb      	ldr	r3, [r7, #12]
 801c42e:	681b      	ldr	r3, [r3, #0]
 801c430:	2b00      	cmp	r3, #0
 801c432:	d111      	bne.n	801c458 <tcp_connect+0xe0>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, ipaddr);
 801c434:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801c436:	2b00      	cmp	r3, #0
 801c438:	d002      	beq.n	801c440 <tcp_connect+0xc8>
 801c43a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801c43c:	3304      	adds	r3, #4
 801c43e:	e000      	b.n	801c442 <tcp_connect+0xca>
 801c440:	2300      	movs	r3, #0
 801c442:	61fb      	str	r3, [r7, #28]
    if (local_ip == NULL) {
 801c444:	69fb      	ldr	r3, [r7, #28]
 801c446:	2b00      	cmp	r3, #0
 801c448:	d102      	bne.n	801c450 <tcp_connect+0xd8>
      return ERR_RTE;
 801c44a:	f06f 0303 	mvn.w	r3, #3
 801c44e:	e099      	b.n	801c584 <tcp_connect+0x20c>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 801c450:	69fb      	ldr	r3, [r7, #28]
 801c452:	681a      	ldr	r2, [r3, #0]
 801c454:	68fb      	ldr	r3, [r7, #12]
 801c456:	601a      	str	r2, [r3, #0]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST)) {
    ip6_addr_assign_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNICAST, netif);
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  old_local_port = pcb->local_port;
 801c458:	68fb      	ldr	r3, [r7, #12]
 801c45a:	8adb      	ldrh	r3, [r3, #22]
 801c45c:	837b      	strh	r3, [r7, #26]
  if (pcb->local_port == 0) {
 801c45e:	68fb      	ldr	r3, [r7, #12]
 801c460:	8adb      	ldrh	r3, [r3, #22]
 801c462:	2b00      	cmp	r3, #0
 801c464:	d10c      	bne.n	801c480 <tcp_connect+0x108>
    pcb->local_port = tcp_new_port();
 801c466:	f7ff ff41 	bl	801c2ec <tcp_new_port>
 801c46a:	4603      	mov	r3, r0
 801c46c:	461a      	mov	r2, r3
 801c46e:	68fb      	ldr	r3, [r7, #12]
 801c470:	82da      	strh	r2, [r3, #22]
    if (pcb->local_port == 0) {
 801c472:	68fb      	ldr	r3, [r7, #12]
 801c474:	8adb      	ldrh	r3, [r3, #22]
 801c476:	2b00      	cmp	r3, #0
 801c478:	d102      	bne.n	801c480 <tcp_connect+0x108>
      return ERR_BUF;
 801c47a:	f06f 0301 	mvn.w	r3, #1
 801c47e:	e081      	b.n	801c584 <tcp_connect+0x20c>
      }
    }
#endif /* SO_REUSE */
  }

  iss = tcp_next_iss(pcb);
 801c480:	68f8      	ldr	r0, [r7, #12]
 801c482:	f001 f875 	bl	801d570 <tcp_next_iss>
 801c486:	6178      	str	r0, [r7, #20]
  pcb->rcv_nxt = 0;
 801c488:	68fb      	ldr	r3, [r7, #12]
 801c48a:	2200      	movs	r2, #0
 801c48c:	625a      	str	r2, [r3, #36]	@ 0x24
  pcb->snd_nxt = iss;
 801c48e:	68fb      	ldr	r3, [r7, #12]
 801c490:	697a      	ldr	r2, [r7, #20]
 801c492:	651a      	str	r2, [r3, #80]	@ 0x50
  pcb->lastack = iss - 1;
 801c494:	697b      	ldr	r3, [r7, #20]
 801c496:	1e5a      	subs	r2, r3, #1
 801c498:	68fb      	ldr	r3, [r7, #12]
 801c49a:	645a      	str	r2, [r3, #68]	@ 0x44
  pcb->snd_wl2 = iss - 1;
 801c49c:	697b      	ldr	r3, [r7, #20]
 801c49e:	1e5a      	subs	r2, r3, #1
 801c4a0:	68fb      	ldr	r3, [r7, #12]
 801c4a2:	659a      	str	r2, [r3, #88]	@ 0x58
  pcb->snd_lbb = iss - 1;
 801c4a4:	697b      	ldr	r3, [r7, #20]
 801c4a6:	1e5a      	subs	r2, r3, #1
 801c4a8:	68fb      	ldr	r3, [r7, #12]
 801c4aa:	65da      	str	r2, [r3, #92]	@ 0x5c
  /* Start with a window that does not need scaling. When window scaling is
     enabled and used, the window is enlarged when both sides agree on scaling. */
  pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801c4ac:	68fb      	ldr	r3, [r7, #12]
 801c4ae:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c4b2:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801c4b4:	68fb      	ldr	r3, [r7, #12]
 801c4b6:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801c4b8:	68fb      	ldr	r3, [r7, #12]
 801c4ba:	851a      	strh	r2, [r3, #40]	@ 0x28
  pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801c4bc:	68fb      	ldr	r3, [r7, #12]
 801c4be:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801c4c0:	68fb      	ldr	r3, [r7, #12]
 801c4c2:	62da      	str	r2, [r3, #44]	@ 0x2c
  pcb->snd_wnd = TCP_WND;
 801c4c4:	68fb      	ldr	r3, [r7, #12]
 801c4c6:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801c4ca:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
  /* As initial send MSS, we use TCP_MSS but limit it to 536.
     The send MSS is updated when an MSS option is received. */
  pcb->mss = INITIAL_MSS;
 801c4ce:	68fb      	ldr	r3, [r7, #12]
 801c4d0:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801c4d4:	865a      	strh	r2, [r3, #50]	@ 0x32
#if TCP_CALCULATE_EFF_SEND_MSS
  pcb->mss = tcp_eff_send_mss_netif(pcb->mss, netif, &pcb->remote_ip);
 801c4d6:	68fb      	ldr	r3, [r7, #12]
 801c4d8:	8e58      	ldrh	r0, [r3, #50]	@ 0x32
 801c4da:	68fb      	ldr	r3, [r7, #12]
 801c4dc:	3304      	adds	r3, #4
 801c4de:	461a      	mov	r2, r3
 801c4e0:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 801c4e2:	f001 f86b 	bl	801d5bc <tcp_eff_send_mss_netif>
 801c4e6:	4603      	mov	r3, r0
 801c4e8:	461a      	mov	r2, r3
 801c4ea:	68fb      	ldr	r3, [r7, #12]
 801c4ec:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
  pcb->cwnd = 1;
 801c4ee:	68fb      	ldr	r3, [r7, #12]
 801c4f0:	2201      	movs	r2, #1
 801c4f2:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
#if LWIP_CALLBACK_API
  pcb->connected = connected;
 801c4f6:	68fb      	ldr	r3, [r7, #12]
 801c4f8:	683a      	ldr	r2, [r7, #0]
 801c4fa:	f8c3 2088 	str.w	r2, [r3, #136]	@ 0x88
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(connected);
#endif /* LWIP_CALLBACK_API */

  /* Send a SYN together with the MSS option. */
  ret = tcp_enqueue_flags(pcb, TCP_SYN);
 801c4fe:	2102      	movs	r1, #2
 801c500:	68f8      	ldr	r0, [r7, #12]
 801c502:	f004 fb31 	bl	8020b68 <tcp_enqueue_flags>
 801c506:	4603      	mov	r3, r0
 801c508:	74fb      	strb	r3, [r7, #19]
  if (ret == ERR_OK) {
 801c50a:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801c50e:	2b00      	cmp	r3, #0
 801c510:	d136      	bne.n	801c580 <tcp_connect+0x208>
    /* SYN segment was enqueued, changed the pcbs state now */
    pcb->state = SYN_SENT;
 801c512:	68fb      	ldr	r3, [r7, #12]
 801c514:	2202      	movs	r2, #2
 801c516:	751a      	strb	r2, [r3, #20]
    if (old_local_port != 0) {
 801c518:	8b7b      	ldrh	r3, [r7, #26]
 801c51a:	2b00      	cmp	r3, #0
 801c51c:	d021      	beq.n	801c562 <tcp_connect+0x1ea>
      TCP_RMV(&tcp_bound_pcbs, pcb);
 801c51e:	4b20      	ldr	r3, [pc, #128]	@ (801c5a0 <tcp_connect+0x228>)
 801c520:	681b      	ldr	r3, [r3, #0]
 801c522:	68fa      	ldr	r2, [r7, #12]
 801c524:	429a      	cmp	r2, r3
 801c526:	d105      	bne.n	801c534 <tcp_connect+0x1bc>
 801c528:	4b1d      	ldr	r3, [pc, #116]	@ (801c5a0 <tcp_connect+0x228>)
 801c52a:	681b      	ldr	r3, [r3, #0]
 801c52c:	68db      	ldr	r3, [r3, #12]
 801c52e:	4a1c      	ldr	r2, [pc, #112]	@ (801c5a0 <tcp_connect+0x228>)
 801c530:	6013      	str	r3, [r2, #0]
 801c532:	e013      	b.n	801c55c <tcp_connect+0x1e4>
 801c534:	4b1a      	ldr	r3, [pc, #104]	@ (801c5a0 <tcp_connect+0x228>)
 801c536:	681b      	ldr	r3, [r3, #0]
 801c538:	623b      	str	r3, [r7, #32]
 801c53a:	e00c      	b.n	801c556 <tcp_connect+0x1de>
 801c53c:	6a3b      	ldr	r3, [r7, #32]
 801c53e:	68db      	ldr	r3, [r3, #12]
 801c540:	68fa      	ldr	r2, [r7, #12]
 801c542:	429a      	cmp	r2, r3
 801c544:	d104      	bne.n	801c550 <tcp_connect+0x1d8>
 801c546:	68fb      	ldr	r3, [r7, #12]
 801c548:	68da      	ldr	r2, [r3, #12]
 801c54a:	6a3b      	ldr	r3, [r7, #32]
 801c54c:	60da      	str	r2, [r3, #12]
 801c54e:	e005      	b.n	801c55c <tcp_connect+0x1e4>
 801c550:	6a3b      	ldr	r3, [r7, #32]
 801c552:	68db      	ldr	r3, [r3, #12]
 801c554:	623b      	str	r3, [r7, #32]
 801c556:	6a3b      	ldr	r3, [r7, #32]
 801c558:	2b00      	cmp	r3, #0
 801c55a:	d1ef      	bne.n	801c53c <tcp_connect+0x1c4>
 801c55c:	68fb      	ldr	r3, [r7, #12]
 801c55e:	2200      	movs	r2, #0
 801c560:	60da      	str	r2, [r3, #12]
    }
    TCP_REG_ACTIVE(pcb);
 801c562:	4b10      	ldr	r3, [pc, #64]	@ (801c5a4 <tcp_connect+0x22c>)
 801c564:	681a      	ldr	r2, [r3, #0]
 801c566:	68fb      	ldr	r3, [r7, #12]
 801c568:	60da      	str	r2, [r3, #12]
 801c56a:	4a0e      	ldr	r2, [pc, #56]	@ (801c5a4 <tcp_connect+0x22c>)
 801c56c:	68fb      	ldr	r3, [r7, #12]
 801c56e:	6013      	str	r3, [r2, #0]
 801c570:	f005 fb6c 	bl	8021c4c <tcp_timer_needed>
 801c574:	4b0c      	ldr	r3, [pc, #48]	@ (801c5a8 <tcp_connect+0x230>)
 801c576:	2201      	movs	r2, #1
 801c578:	701a      	strb	r2, [r3, #0]
    MIB2_STATS_INC(mib2.tcpactiveopens);

    tcp_output(pcb);
 801c57a:	68f8      	ldr	r0, [r7, #12]
 801c57c:	f004 fbe2 	bl	8020d44 <tcp_output>
  }
  return ret;
 801c580:	f997 3013 	ldrsb.w	r3, [r7, #19]
}
 801c584:	4618      	mov	r0, r3
 801c586:	3728      	adds	r7, #40	@ 0x28
 801c588:	46bd      	mov	sp, r7
 801c58a:	bd80      	pop	{r7, pc}
 801c58c:	0802f820 	.word	0x0802f820
 801c590:	0802fafc 	.word	0x0802fafc
 801c594:	0802f864 	.word	0x0802f864
 801c598:	0802fb18 	.word	0x0802fb18
 801c59c:	0802fb34 	.word	0x0802fb34
 801c5a0:	2402afac 	.word	0x2402afac
 801c5a4:	2402afb4 	.word	0x2402afb4
 801c5a8:	2402afbc 	.word	0x2402afbc

0801c5ac <tcp_slowtmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_slowtmr(void)
{
 801c5ac:	b5b0      	push	{r4, r5, r7, lr}
 801c5ae:	b090      	sub	sp, #64	@ 0x40
 801c5b0:	af04      	add	r7, sp, #16
  tcpwnd_size_t eff_wnd;
  u8_t pcb_remove;      /* flag if a PCB should be removed */
  u8_t pcb_reset;       /* flag if a RST should be sent when removing */
  err_t err;

  err = ERR_OK;
 801c5b2:	2300      	movs	r3, #0
 801c5b4:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25

  ++tcp_ticks;
 801c5b8:	4b95      	ldr	r3, [pc, #596]	@ (801c810 <tcp_slowtmr+0x264>)
 801c5ba:	681b      	ldr	r3, [r3, #0]
 801c5bc:	3301      	adds	r3, #1
 801c5be:	4a94      	ldr	r2, [pc, #592]	@ (801c810 <tcp_slowtmr+0x264>)
 801c5c0:	6013      	str	r3, [r2, #0]
  ++tcp_timer_ctr;
 801c5c2:	4b94      	ldr	r3, [pc, #592]	@ (801c814 <tcp_slowtmr+0x268>)
 801c5c4:	781b      	ldrb	r3, [r3, #0]
 801c5c6:	3301      	adds	r3, #1
 801c5c8:	b2da      	uxtb	r2, r3
 801c5ca:	4b92      	ldr	r3, [pc, #584]	@ (801c814 <tcp_slowtmr+0x268>)
 801c5cc:	701a      	strb	r2, [r3, #0]
 801c5ce:	e000      	b.n	801c5d2 <tcp_slowtmr+0x26>
        prev->polltmr = 0;
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n"));
        tcp_active_pcbs_changed = 0;
        TCP_EVENT_POLL(prev, err);
        if (tcp_active_pcbs_changed) {
          goto tcp_slowtmr_start;
 801c5d0:	bf00      	nop
  prev = NULL;
 801c5d2:	2300      	movs	r3, #0
 801c5d4:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_active_pcbs;
 801c5d6:	4b90      	ldr	r3, [pc, #576]	@ (801c818 <tcp_slowtmr+0x26c>)
 801c5d8:	681b      	ldr	r3, [r3, #0]
 801c5da:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801c5dc:	e29d      	b.n	801cb1a <tcp_slowtmr+0x56e>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED);
 801c5de:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5e0:	7d1b      	ldrb	r3, [r3, #20]
 801c5e2:	2b00      	cmp	r3, #0
 801c5e4:	d106      	bne.n	801c5f4 <tcp_slowtmr+0x48>
 801c5e6:	4b8d      	ldr	r3, [pc, #564]	@ (801c81c <tcp_slowtmr+0x270>)
 801c5e8:	f240 42be 	movw	r2, #1214	@ 0x4be
 801c5ec:	498c      	ldr	r1, [pc, #560]	@ (801c820 <tcp_slowtmr+0x274>)
 801c5ee:	488d      	ldr	r0, [pc, #564]	@ (801c824 <tcp_slowtmr+0x278>)
 801c5f0:	f00e fa34 	bl	802aa5c <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN);
 801c5f4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c5f6:	7d1b      	ldrb	r3, [r3, #20]
 801c5f8:	2b01      	cmp	r3, #1
 801c5fa:	d106      	bne.n	801c60a <tcp_slowtmr+0x5e>
 801c5fc:	4b87      	ldr	r3, [pc, #540]	@ (801c81c <tcp_slowtmr+0x270>)
 801c5fe:	f240 42bf 	movw	r2, #1215	@ 0x4bf
 801c602:	4989      	ldr	r1, [pc, #548]	@ (801c828 <tcp_slowtmr+0x27c>)
 801c604:	4887      	ldr	r0, [pc, #540]	@ (801c824 <tcp_slowtmr+0x278>)
 801c606:	f00e fa29 	bl	802aa5c <iprintf>
    LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT);
 801c60a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c60c:	7d1b      	ldrb	r3, [r3, #20]
 801c60e:	2b0a      	cmp	r3, #10
 801c610:	d106      	bne.n	801c620 <tcp_slowtmr+0x74>
 801c612:	4b82      	ldr	r3, [pc, #520]	@ (801c81c <tcp_slowtmr+0x270>)
 801c614:	f44f 6298 	mov.w	r2, #1216	@ 0x4c0
 801c618:	4984      	ldr	r1, [pc, #528]	@ (801c82c <tcp_slowtmr+0x280>)
 801c61a:	4882      	ldr	r0, [pc, #520]	@ (801c824 <tcp_slowtmr+0x278>)
 801c61c:	f00e fa1e 	bl	802aa5c <iprintf>
    if (pcb->last_timer == tcp_timer_ctr) {
 801c620:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c622:	7f9a      	ldrb	r2, [r3, #30]
 801c624:	4b7b      	ldr	r3, [pc, #492]	@ (801c814 <tcp_slowtmr+0x268>)
 801c626:	781b      	ldrb	r3, [r3, #0]
 801c628:	429a      	cmp	r2, r3
 801c62a:	d105      	bne.n	801c638 <tcp_slowtmr+0x8c>
      prev = pcb;
 801c62c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c62e:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801c630:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c632:	68db      	ldr	r3, [r3, #12]
 801c634:	62fb      	str	r3, [r7, #44]	@ 0x2c
      continue;
 801c636:	e270      	b.n	801cb1a <tcp_slowtmr+0x56e>
    pcb->last_timer = tcp_timer_ctr;
 801c638:	4b76      	ldr	r3, [pc, #472]	@ (801c814 <tcp_slowtmr+0x268>)
 801c63a:	781a      	ldrb	r2, [r3, #0]
 801c63c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c63e:	779a      	strb	r2, [r3, #30]
    pcb_remove = 0;
 801c640:	2300      	movs	r3, #0
 801c642:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    pcb_reset = 0;
 801c646:	2300      	movs	r3, #0
 801c648:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    if (pcb->state == SYN_SENT && pcb->nrtx >= TCP_SYNMAXRTX) {
 801c64c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c64e:	7d1b      	ldrb	r3, [r3, #20]
 801c650:	2b02      	cmp	r3, #2
 801c652:	d10a      	bne.n	801c66a <tcp_slowtmr+0xbe>
 801c654:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c656:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801c65a:	2b05      	cmp	r3, #5
 801c65c:	d905      	bls.n	801c66a <tcp_slowtmr+0xbe>
      ++pcb_remove;
 801c65e:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c662:	3301      	adds	r3, #1
 801c664:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n"));
 801c668:	e11e      	b.n	801c8a8 <tcp_slowtmr+0x2fc>
    } else if (pcb->nrtx >= TCP_MAXRTX) {
 801c66a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c66c:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801c670:	2b0b      	cmp	r3, #11
 801c672:	d905      	bls.n	801c680 <tcp_slowtmr+0xd4>
      ++pcb_remove;
 801c674:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c678:	3301      	adds	r3, #1
 801c67a:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801c67e:	e113      	b.n	801c8a8 <tcp_slowtmr+0x2fc>
      if (pcb->persist_backoff > 0) {
 801c680:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c682:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801c686:	2b00      	cmp	r3, #0
 801c688:	d075      	beq.n	801c776 <tcp_slowtmr+0x1ca>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with in-flight data", pcb->unacked == NULL);
 801c68a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c68c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801c68e:	2b00      	cmp	r3, #0
 801c690:	d006      	beq.n	801c6a0 <tcp_slowtmr+0xf4>
 801c692:	4b62      	ldr	r3, [pc, #392]	@ (801c81c <tcp_slowtmr+0x270>)
 801c694:	f240 42d4 	movw	r2, #1236	@ 0x4d4
 801c698:	4965      	ldr	r1, [pc, #404]	@ (801c830 <tcp_slowtmr+0x284>)
 801c69a:	4862      	ldr	r0, [pc, #392]	@ (801c824 <tcp_slowtmr+0x278>)
 801c69c:	f00e f9de 	bl	802aa5c <iprintf>
        LWIP_ASSERT("tcp_slowtimr: persist ticking with empty send buffer", pcb->unsent != NULL);
 801c6a0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6a2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801c6a4:	2b00      	cmp	r3, #0
 801c6a6:	d106      	bne.n	801c6b6 <tcp_slowtmr+0x10a>
 801c6a8:	4b5c      	ldr	r3, [pc, #368]	@ (801c81c <tcp_slowtmr+0x270>)
 801c6aa:	f240 42d5 	movw	r2, #1237	@ 0x4d5
 801c6ae:	4961      	ldr	r1, [pc, #388]	@ (801c834 <tcp_slowtmr+0x288>)
 801c6b0:	485c      	ldr	r0, [pc, #368]	@ (801c824 <tcp_slowtmr+0x278>)
 801c6b2:	f00e f9d3 	bl	802aa5c <iprintf>
        if (pcb->persist_probe >= TCP_MAXRTX) {
 801c6b6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6b8:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 801c6bc:	2b0b      	cmp	r3, #11
 801c6be:	d905      	bls.n	801c6cc <tcp_slowtmr+0x120>
          ++pcb_remove; /* max probes reached */
 801c6c0:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c6c4:	3301      	adds	r3, #1
 801c6c6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 801c6ca:	e0ed      	b.n	801c8a8 <tcp_slowtmr+0x2fc>
          u8_t backoff_cnt = tcp_persist_backoff[pcb->persist_backoff - 1];
 801c6cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6ce:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801c6d2:	3b01      	subs	r3, #1
 801c6d4:	4a58      	ldr	r2, [pc, #352]	@ (801c838 <tcp_slowtmr+0x28c>)
 801c6d6:	5cd3      	ldrb	r3, [r2, r3]
 801c6d8:	747b      	strb	r3, [r7, #17]
          if (pcb->persist_cnt < backoff_cnt) {
 801c6da:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6dc:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801c6e0:	7c7a      	ldrb	r2, [r7, #17]
 801c6e2:	429a      	cmp	r2, r3
 801c6e4:	d907      	bls.n	801c6f6 <tcp_slowtmr+0x14a>
            pcb->persist_cnt++;
 801c6e6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6e8:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801c6ec:	3301      	adds	r3, #1
 801c6ee:	b2da      	uxtb	r2, r3
 801c6f0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6f2:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
          if (pcb->persist_cnt >= backoff_cnt) {
 801c6f6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c6f8:	f893 3098 	ldrb.w	r3, [r3, #152]	@ 0x98
 801c6fc:	7c7a      	ldrb	r2, [r7, #17]
 801c6fe:	429a      	cmp	r2, r3
 801c700:	f200 80d2 	bhi.w	801c8a8 <tcp_slowtmr+0x2fc>
            int next_slot = 1; /* increment timer to next slot */
 801c704:	2301      	movs	r3, #1
 801c706:	623b      	str	r3, [r7, #32]
            if (pcb->snd_wnd == 0) {
 801c708:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c70a:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801c70e:	2b00      	cmp	r3, #0
 801c710:	d108      	bne.n	801c724 <tcp_slowtmr+0x178>
              if (tcp_zero_window_probe(pcb) != ERR_OK) {
 801c712:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c714:	f005 f9cc 	bl	8021ab0 <tcp_zero_window_probe>
 801c718:	4603      	mov	r3, r0
 801c71a:	2b00      	cmp	r3, #0
 801c71c:	d014      	beq.n	801c748 <tcp_slowtmr+0x19c>
                next_slot = 0; /* try probe again with current slot */
 801c71e:	2300      	movs	r3, #0
 801c720:	623b      	str	r3, [r7, #32]
 801c722:	e011      	b.n	801c748 <tcp_slowtmr+0x19c>
              if (tcp_split_unsent_seg(pcb, (u16_t)pcb->snd_wnd) == ERR_OK) {
 801c724:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c726:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801c72a:	4619      	mov	r1, r3
 801c72c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c72e:	f004 f87f 	bl	8020830 <tcp_split_unsent_seg>
 801c732:	4603      	mov	r3, r0
 801c734:	2b00      	cmp	r3, #0
 801c736:	d107      	bne.n	801c748 <tcp_slowtmr+0x19c>
                if (tcp_output(pcb) == ERR_OK) {
 801c738:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c73a:	f004 fb03 	bl	8020d44 <tcp_output>
 801c73e:	4603      	mov	r3, r0
 801c740:	2b00      	cmp	r3, #0
 801c742:	d101      	bne.n	801c748 <tcp_slowtmr+0x19c>
                  next_slot = 0;
 801c744:	2300      	movs	r3, #0
 801c746:	623b      	str	r3, [r7, #32]
            if (next_slot) {
 801c748:	6a3b      	ldr	r3, [r7, #32]
 801c74a:	2b00      	cmp	r3, #0
 801c74c:	f000 80ac 	beq.w	801c8a8 <tcp_slowtmr+0x2fc>
              pcb->persist_cnt = 0;
 801c750:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c752:	2200      	movs	r2, #0
 801c754:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
              if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) {
 801c758:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c75a:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801c75e:	2b06      	cmp	r3, #6
 801c760:	f200 80a2 	bhi.w	801c8a8 <tcp_slowtmr+0x2fc>
                pcb->persist_backoff++;
 801c764:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c766:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 801c76a:	3301      	adds	r3, #1
 801c76c:	b2da      	uxtb	r2, r3
 801c76e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c770:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
 801c774:	e098      	b.n	801c8a8 <tcp_slowtmr+0x2fc>
        if ((pcb->rtime >= 0) && (pcb->rtime < 0x7FFF)) {
 801c776:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c778:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801c77c:	2b00      	cmp	r3, #0
 801c77e:	db0f      	blt.n	801c7a0 <tcp_slowtmr+0x1f4>
 801c780:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c782:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801c786:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801c78a:	4293      	cmp	r3, r2
 801c78c:	d008      	beq.n	801c7a0 <tcp_slowtmr+0x1f4>
          ++pcb->rtime;
 801c78e:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c790:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801c794:	b29b      	uxth	r3, r3
 801c796:	3301      	adds	r3, #1
 801c798:	b29b      	uxth	r3, r3
 801c79a:	b21a      	sxth	r2, r3
 801c79c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c79e:	861a      	strh	r2, [r3, #48]	@ 0x30
        if (pcb->rtime >= pcb->rto) {
 801c7a0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7a2:	f9b3 2030 	ldrsh.w	r2, [r3, #48]	@ 0x30
 801c7a6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7a8:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801c7ac:	429a      	cmp	r2, r3
 801c7ae:	db7b      	blt.n	801c8a8 <tcp_slowtmr+0x2fc>
          if ((tcp_rexmit_rto_prepare(pcb) == ERR_OK) || ((pcb->unacked == NULL) && (pcb->unsent != NULL))) {
 801c7b0:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c7b2:	f004 fdbf 	bl	8021334 <tcp_rexmit_rto_prepare>
 801c7b6:	4603      	mov	r3, r0
 801c7b8:	2b00      	cmp	r3, #0
 801c7ba:	d007      	beq.n	801c7cc <tcp_slowtmr+0x220>
 801c7bc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7be:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801c7c0:	2b00      	cmp	r3, #0
 801c7c2:	d171      	bne.n	801c8a8 <tcp_slowtmr+0x2fc>
 801c7c4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7c6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801c7c8:	2b00      	cmp	r3, #0
 801c7ca:	d06d      	beq.n	801c8a8 <tcp_slowtmr+0x2fc>
            if (pcb->state != SYN_SENT) {
 801c7cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7ce:	7d1b      	ldrb	r3, [r3, #20]
 801c7d0:	2b02      	cmp	r3, #2
 801c7d2:	d03a      	beq.n	801c84a <tcp_slowtmr+0x29e>
              u8_t backoff_idx = LWIP_MIN(pcb->nrtx, sizeof(tcp_backoff) - 1);
 801c7d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7d6:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801c7da:	2b0c      	cmp	r3, #12
 801c7dc:	bf28      	it	cs
 801c7de:	230c      	movcs	r3, #12
 801c7e0:	76fb      	strb	r3, [r7, #27]
              int calc_rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[backoff_idx];
 801c7e2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7e4:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801c7e8:	10db      	asrs	r3, r3, #3
 801c7ea:	b21b      	sxth	r3, r3
 801c7ec:	461a      	mov	r2, r3
 801c7ee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c7f0:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801c7f4:	4413      	add	r3, r2
 801c7f6:	7efa      	ldrb	r2, [r7, #27]
 801c7f8:	4910      	ldr	r1, [pc, #64]	@ (801c83c <tcp_slowtmr+0x290>)
 801c7fa:	5c8a      	ldrb	r2, [r1, r2]
 801c7fc:	4093      	lsls	r3, r2
 801c7fe:	617b      	str	r3, [r7, #20]
              pcb->rto = (s16_t)LWIP_MIN(calc_rto, 0x7FFF);
 801c800:	697b      	ldr	r3, [r7, #20]
 801c802:	f647 72fe 	movw	r2, #32766	@ 0x7ffe
 801c806:	4293      	cmp	r3, r2
 801c808:	dc1a      	bgt.n	801c840 <tcp_slowtmr+0x294>
 801c80a:	697b      	ldr	r3, [r7, #20]
 801c80c:	b21a      	sxth	r2, r3
 801c80e:	e019      	b.n	801c844 <tcp_slowtmr+0x298>
 801c810:	2402afa8 	.word	0x2402afa8
 801c814:	2402afbe 	.word	0x2402afbe
 801c818:	2402afb4 	.word	0x2402afb4
 801c81c:	0802f820 	.word	0x0802f820
 801c820:	0802fb64 	.word	0x0802fb64
 801c824:	0802f864 	.word	0x0802f864
 801c828:	0802fb90 	.word	0x0802fb90
 801c82c:	0802fbbc 	.word	0x0802fbbc
 801c830:	0802fbec 	.word	0x0802fbec
 801c834:	0802fc20 	.word	0x0802fc20
 801c838:	08031eb8 	.word	0x08031eb8
 801c83c:	08031ea8 	.word	0x08031ea8
 801c840:	f647 72ff 	movw	r2, #32767	@ 0x7fff
 801c844:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c846:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
            pcb->rtime = 0;
 801c84a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c84c:	2200      	movs	r2, #0
 801c84e:	861a      	strh	r2, [r3, #48]	@ 0x30
            eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd);
 801c850:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c852:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801c856:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c858:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801c85c:	4293      	cmp	r3, r2
 801c85e:	bf28      	it	cs
 801c860:	4613      	movcs	r3, r2
 801c862:	827b      	strh	r3, [r7, #18]
            pcb->ssthresh = eff_wnd >> 1;
 801c864:	8a7b      	ldrh	r3, [r7, #18]
 801c866:	085b      	lsrs	r3, r3, #1
 801c868:	b29a      	uxth	r2, r3
 801c86a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c86c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            if (pcb->ssthresh < (tcpwnd_size_t)(pcb->mss << 1)) {
 801c870:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c872:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801c876:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c878:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801c87a:	005b      	lsls	r3, r3, #1
 801c87c:	b29b      	uxth	r3, r3
 801c87e:	429a      	cmp	r2, r3
 801c880:	d206      	bcs.n	801c890 <tcp_slowtmr+0x2e4>
              pcb->ssthresh = (tcpwnd_size_t)(pcb->mss << 1);
 801c882:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c884:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801c886:	005b      	lsls	r3, r3, #1
 801c888:	b29a      	uxth	r2, r3
 801c88a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c88c:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
            pcb->cwnd = pcb->mss;
 801c890:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c892:	8e5a      	ldrh	r2, [r3, #50]	@ 0x32
 801c894:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c896:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
            pcb->bytes_acked = 0;
 801c89a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c89c:	2200      	movs	r2, #0
 801c89e:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            tcp_rexmit_rto_commit(pcb);
 801c8a2:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c8a4:	f004 fdc0 	bl	8021428 <tcp_rexmit_rto_commit>
    if (pcb->state == FIN_WAIT_2) {
 801c8a8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8aa:	7d1b      	ldrb	r3, [r3, #20]
 801c8ac:	2b06      	cmp	r3, #6
 801c8ae:	d111      	bne.n	801c8d4 <tcp_slowtmr+0x328>
      if (pcb->flags & TF_RXCLOSED) {
 801c8b0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8b2:	8b5b      	ldrh	r3, [r3, #26]
 801c8b4:	f003 0310 	and.w	r3, r3, #16
 801c8b8:	2b00      	cmp	r3, #0
 801c8ba:	d00b      	beq.n	801c8d4 <tcp_slowtmr+0x328>
        if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c8bc:	4b9c      	ldr	r3, [pc, #624]	@ (801cb30 <tcp_slowtmr+0x584>)
 801c8be:	681a      	ldr	r2, [r3, #0]
 801c8c0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8c2:	6a1b      	ldr	r3, [r3, #32]
 801c8c4:	1ad3      	subs	r3, r2, r3
 801c8c6:	2b28      	cmp	r3, #40	@ 0x28
 801c8c8:	d904      	bls.n	801c8d4 <tcp_slowtmr+0x328>
          ++pcb_remove;
 801c8ca:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c8ce:	3301      	adds	r3, #1
 801c8d0:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801c8d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8d6:	7a5b      	ldrb	r3, [r3, #9]
 801c8d8:	f003 0308 	and.w	r3, r3, #8
 801c8dc:	2b00      	cmp	r3, #0
 801c8de:	d04a      	beq.n	801c976 <tcp_slowtmr+0x3ca>
        ((pcb->state == ESTABLISHED) ||
 801c8e0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8e2:	7d1b      	ldrb	r3, [r3, #20]
    if (ip_get_option(pcb, SOF_KEEPALIVE) &&
 801c8e4:	2b04      	cmp	r3, #4
 801c8e6:	d003      	beq.n	801c8f0 <tcp_slowtmr+0x344>
         (pcb->state == CLOSE_WAIT))) {
 801c8e8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8ea:	7d1b      	ldrb	r3, [r3, #20]
        ((pcb->state == ESTABLISHED) ||
 801c8ec:	2b07      	cmp	r3, #7
 801c8ee:	d142      	bne.n	801c976 <tcp_slowtmr+0x3ca>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c8f0:	4b8f      	ldr	r3, [pc, #572]	@ (801cb30 <tcp_slowtmr+0x584>)
 801c8f2:	681a      	ldr	r2, [r3, #0]
 801c8f4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8f6:	6a1b      	ldr	r3, [r3, #32]
 801c8f8:	1ad2      	subs	r2, r2, r3
          (pcb->keep_idle + TCP_KEEP_DUR(pcb)) / TCP_SLOW_INTERVAL) {
 801c8fa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c8fc:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801c900:	4b8c      	ldr	r3, [pc, #560]	@ (801cb34 <tcp_slowtmr+0x588>)
 801c902:	440b      	add	r3, r1
 801c904:	498c      	ldr	r1, [pc, #560]	@ (801cb38 <tcp_slowtmr+0x58c>)
 801c906:	fba1 1303 	umull	r1, r3, r1, r3
 801c90a:	095b      	lsrs	r3, r3, #5
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c90c:	429a      	cmp	r2, r3
 801c90e:	d90a      	bls.n	801c926 <tcp_slowtmr+0x37a>
        ++pcb_remove;
 801c910:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c914:	3301      	adds	r3, #1
 801c916:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
        ++pcb_reset;
 801c91a:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801c91e:	3301      	adds	r3, #1
 801c920:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
 801c924:	e027      	b.n	801c976 <tcp_slowtmr+0x3ca>
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c926:	4b82      	ldr	r3, [pc, #520]	@ (801cb30 <tcp_slowtmr+0x584>)
 801c928:	681a      	ldr	r2, [r3, #0]
 801c92a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c92c:	6a1b      	ldr	r3, [r3, #32]
 801c92e:	1ad2      	subs	r2, r2, r3
                 (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEP_INTVL(pcb))
 801c930:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c932:	f8d3 1094 	ldr.w	r1, [r3, #148]	@ 0x94
 801c936:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c938:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801c93c:	4618      	mov	r0, r3
 801c93e:	4b7f      	ldr	r3, [pc, #508]	@ (801cb3c <tcp_slowtmr+0x590>)
 801c940:	fb00 f303 	mul.w	r3, r0, r3
 801c944:	440b      	add	r3, r1
                 / TCP_SLOW_INTERVAL) {
 801c946:	497c      	ldr	r1, [pc, #496]	@ (801cb38 <tcp_slowtmr+0x58c>)
 801c948:	fba1 1303 	umull	r1, r3, r1, r3
 801c94c:	095b      	lsrs	r3, r3, #5
      } else if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c94e:	429a      	cmp	r2, r3
 801c950:	d911      	bls.n	801c976 <tcp_slowtmr+0x3ca>
        err = tcp_keepalive(pcb);
 801c952:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c954:	f005 f86c 	bl	8021a30 <tcp_keepalive>
 801c958:	4603      	mov	r3, r0
 801c95a:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (err == ERR_OK) {
 801c95e:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801c962:	2b00      	cmp	r3, #0
 801c964:	d107      	bne.n	801c976 <tcp_slowtmr+0x3ca>
          pcb->keep_cnt_sent++;
 801c966:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c968:	f893 309b 	ldrb.w	r3, [r3, #155]	@ 0x9b
 801c96c:	3301      	adds	r3, #1
 801c96e:	b2da      	uxtb	r2, r3
 801c970:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c972:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
    if (pcb->ooseq != NULL &&
 801c976:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c978:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801c97a:	2b00      	cmp	r3, #0
 801c97c:	d011      	beq.n	801c9a2 <tcp_slowtmr+0x3f6>
        (tcp_ticks - pcb->tmr >= (u32_t)pcb->rto * TCP_OOSEQ_TIMEOUT)) {
 801c97e:	4b6c      	ldr	r3, [pc, #432]	@ (801cb30 <tcp_slowtmr+0x584>)
 801c980:	681a      	ldr	r2, [r3, #0]
 801c982:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c984:	6a1b      	ldr	r3, [r3, #32]
 801c986:	1ad2      	subs	r2, r2, r3
 801c988:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c98a:	f9b3 3040 	ldrsh.w	r3, [r3, #64]	@ 0x40
 801c98e:	4619      	mov	r1, r3
 801c990:	460b      	mov	r3, r1
 801c992:	005b      	lsls	r3, r3, #1
 801c994:	440b      	add	r3, r1
 801c996:	005b      	lsls	r3, r3, #1
    if (pcb->ooseq != NULL &&
 801c998:	429a      	cmp	r2, r3
 801c99a:	d302      	bcc.n	801c9a2 <tcp_slowtmr+0x3f6>
      tcp_free_ooseq(pcb);
 801c99c:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c99e:	f000 feb7 	bl	801d710 <tcp_free_ooseq>
    if (pcb->state == SYN_RCVD) {
 801c9a2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c9a4:	7d1b      	ldrb	r3, [r3, #20]
 801c9a6:	2b03      	cmp	r3, #3
 801c9a8:	d10b      	bne.n	801c9c2 <tcp_slowtmr+0x416>
      if ((u32_t)(tcp_ticks - pcb->tmr) >
 801c9aa:	4b61      	ldr	r3, [pc, #388]	@ (801cb30 <tcp_slowtmr+0x584>)
 801c9ac:	681a      	ldr	r2, [r3, #0]
 801c9ae:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c9b0:	6a1b      	ldr	r3, [r3, #32]
 801c9b2:	1ad3      	subs	r3, r2, r3
 801c9b4:	2b28      	cmp	r3, #40	@ 0x28
 801c9b6:	d904      	bls.n	801c9c2 <tcp_slowtmr+0x416>
        ++pcb_remove;
 801c9b8:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c9bc:	3301      	adds	r3, #1
 801c9be:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb->state == LAST_ACK) {
 801c9c2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c9c4:	7d1b      	ldrb	r3, [r3, #20]
 801c9c6:	2b09      	cmp	r3, #9
 801c9c8:	d10b      	bne.n	801c9e2 <tcp_slowtmr+0x436>
      if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801c9ca:	4b59      	ldr	r3, [pc, #356]	@ (801cb30 <tcp_slowtmr+0x584>)
 801c9cc:	681a      	ldr	r2, [r3, #0]
 801c9ce:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c9d0:	6a1b      	ldr	r3, [r3, #32]
 801c9d2:	1ad3      	subs	r3, r2, r3
 801c9d4:	2bf0      	cmp	r3, #240	@ 0xf0
 801c9d6:	d904      	bls.n	801c9e2 <tcp_slowtmr+0x436>
        ++pcb_remove;
 801c9d8:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c9dc:	3301      	adds	r3, #1
 801c9de:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    if (pcb_remove) {
 801c9e2:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801c9e6:	2b00      	cmp	r3, #0
 801c9e8:	d060      	beq.n	801caac <tcp_slowtmr+0x500>
      tcp_err_fn err_fn = pcb->errf;
 801c9ea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801c9ec:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801c9f0:	60fb      	str	r3, [r7, #12]
      tcp_pcb_purge(pcb);
 801c9f2:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801c9f4:	f000 fcd8 	bl	801d3a8 <tcp_pcb_purge>
      if (prev != NULL) {
 801c9f8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801c9fa:	2b00      	cmp	r3, #0
 801c9fc:	d010      	beq.n	801ca20 <tcp_slowtmr+0x474>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs);
 801c9fe:	4b50      	ldr	r3, [pc, #320]	@ (801cb40 <tcp_slowtmr+0x594>)
 801ca00:	681b      	ldr	r3, [r3, #0]
 801ca02:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801ca04:	429a      	cmp	r2, r3
 801ca06:	d106      	bne.n	801ca16 <tcp_slowtmr+0x46a>
 801ca08:	4b4e      	ldr	r3, [pc, #312]	@ (801cb44 <tcp_slowtmr+0x598>)
 801ca0a:	f240 526d 	movw	r2, #1389	@ 0x56d
 801ca0e:	494e      	ldr	r1, [pc, #312]	@ (801cb48 <tcp_slowtmr+0x59c>)
 801ca10:	484e      	ldr	r0, [pc, #312]	@ (801cb4c <tcp_slowtmr+0x5a0>)
 801ca12:	f00e f823 	bl	802aa5c <iprintf>
        prev->next = pcb->next;
 801ca16:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ca18:	68da      	ldr	r2, [r3, #12]
 801ca1a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801ca1c:	60da      	str	r2, [r3, #12]
 801ca1e:	e00f      	b.n	801ca40 <tcp_slowtmr+0x494>
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb);
 801ca20:	4b47      	ldr	r3, [pc, #284]	@ (801cb40 <tcp_slowtmr+0x594>)
 801ca22:	681b      	ldr	r3, [r3, #0]
 801ca24:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801ca26:	429a      	cmp	r2, r3
 801ca28:	d006      	beq.n	801ca38 <tcp_slowtmr+0x48c>
 801ca2a:	4b46      	ldr	r3, [pc, #280]	@ (801cb44 <tcp_slowtmr+0x598>)
 801ca2c:	f240 5271 	movw	r2, #1393	@ 0x571
 801ca30:	4947      	ldr	r1, [pc, #284]	@ (801cb50 <tcp_slowtmr+0x5a4>)
 801ca32:	4846      	ldr	r0, [pc, #280]	@ (801cb4c <tcp_slowtmr+0x5a0>)
 801ca34:	f00e f812 	bl	802aa5c <iprintf>
        tcp_active_pcbs = pcb->next;
 801ca38:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ca3a:	68db      	ldr	r3, [r3, #12]
 801ca3c:	4a40      	ldr	r2, [pc, #256]	@ (801cb40 <tcp_slowtmr+0x594>)
 801ca3e:	6013      	str	r3, [r2, #0]
      if (pcb_reset) {
 801ca40:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 801ca44:	2b00      	cmp	r3, #0
 801ca46:	d013      	beq.n	801ca70 <tcp_slowtmr+0x4c4>
        tcp_rst(pcb, pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip,
 801ca48:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ca4a:	6d18      	ldr	r0, [r3, #80]	@ 0x50
 801ca4c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ca4e:	6a5c      	ldr	r4, [r3, #36]	@ 0x24
 801ca50:	6afd      	ldr	r5, [r7, #44]	@ 0x2c
 801ca52:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ca54:	3304      	adds	r3, #4
 801ca56:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801ca58:	8ad2      	ldrh	r2, [r2, #22]
 801ca5a:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 801ca5c:	8b09      	ldrh	r1, [r1, #24]
 801ca5e:	9102      	str	r1, [sp, #8]
 801ca60:	9201      	str	r2, [sp, #4]
 801ca62:	9300      	str	r3, [sp, #0]
 801ca64:	462b      	mov	r3, r5
 801ca66:	4622      	mov	r2, r4
 801ca68:	4601      	mov	r1, r0
 801ca6a:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801ca6c:	f004 ff2c 	bl	80218c8 <tcp_rst>
      err_arg = pcb->callback_arg;
 801ca70:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ca72:	691b      	ldr	r3, [r3, #16]
 801ca74:	60bb      	str	r3, [r7, #8]
      last_state = pcb->state;
 801ca76:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ca78:	7d1b      	ldrb	r3, [r3, #20]
 801ca7a:	71fb      	strb	r3, [r7, #7]
      pcb2 = pcb;
 801ca7c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ca7e:	603b      	str	r3, [r7, #0]
      pcb = pcb->next;
 801ca80:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801ca82:	68db      	ldr	r3, [r3, #12]
 801ca84:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801ca86:	6838      	ldr	r0, [r7, #0]
 801ca88:	f7ff f82c 	bl	801bae4 <tcp_free>
      tcp_active_pcbs_changed = 0;
 801ca8c:	4b31      	ldr	r3, [pc, #196]	@ (801cb54 <tcp_slowtmr+0x5a8>)
 801ca8e:	2200      	movs	r2, #0
 801ca90:	701a      	strb	r2, [r3, #0]
      TCP_EVENT_ERR(last_state, err_fn, err_arg, ERR_ABRT);
 801ca92:	68fb      	ldr	r3, [r7, #12]
 801ca94:	2b00      	cmp	r3, #0
 801ca96:	d004      	beq.n	801caa2 <tcp_slowtmr+0x4f6>
 801ca98:	68fb      	ldr	r3, [r7, #12]
 801ca9a:	f06f 010c 	mvn.w	r1, #12
 801ca9e:	68b8      	ldr	r0, [r7, #8]
 801caa0:	4798      	blx	r3
      if (tcp_active_pcbs_changed) {
 801caa2:	4b2c      	ldr	r3, [pc, #176]	@ (801cb54 <tcp_slowtmr+0x5a8>)
 801caa4:	781b      	ldrb	r3, [r3, #0]
 801caa6:	2b00      	cmp	r3, #0
 801caa8:	d037      	beq.n	801cb1a <tcp_slowtmr+0x56e>
        goto tcp_slowtmr_start;
 801caaa:	e592      	b.n	801c5d2 <tcp_slowtmr+0x26>
      prev = pcb;
 801caac:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801caae:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801cab0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cab2:	68db      	ldr	r3, [r3, #12]
 801cab4:	62fb      	str	r3, [r7, #44]	@ 0x2c
      ++prev->polltmr;
 801cab6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801cab8:	7f1b      	ldrb	r3, [r3, #28]
 801caba:	3301      	adds	r3, #1
 801cabc:	b2da      	uxtb	r2, r3
 801cabe:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801cac0:	771a      	strb	r2, [r3, #28]
      if (prev->polltmr >= prev->pollinterval) {
 801cac2:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801cac4:	7f1a      	ldrb	r2, [r3, #28]
 801cac6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801cac8:	7f5b      	ldrb	r3, [r3, #29]
 801caca:	429a      	cmp	r2, r3
 801cacc:	d325      	bcc.n	801cb1a <tcp_slowtmr+0x56e>
        prev->polltmr = 0;
 801cace:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801cad0:	2200      	movs	r2, #0
 801cad2:	771a      	strb	r2, [r3, #28]
        tcp_active_pcbs_changed = 0;
 801cad4:	4b1f      	ldr	r3, [pc, #124]	@ (801cb54 <tcp_slowtmr+0x5a8>)
 801cad6:	2200      	movs	r2, #0
 801cad8:	701a      	strb	r2, [r3, #0]
        TCP_EVENT_POLL(prev, err);
 801cada:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801cadc:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801cae0:	2b00      	cmp	r3, #0
 801cae2:	d00b      	beq.n	801cafc <tcp_slowtmr+0x550>
 801cae4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801cae6:	f8d3 308c 	ldr.w	r3, [r3, #140]	@ 0x8c
 801caea:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 801caec:	6912      	ldr	r2, [r2, #16]
 801caee:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 801caf0:	4610      	mov	r0, r2
 801caf2:	4798      	blx	r3
 801caf4:	4603      	mov	r3, r0
 801caf6:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
 801cafa:	e002      	b.n	801cb02 <tcp_slowtmr+0x556>
 801cafc:	2300      	movs	r3, #0
 801cafe:	f887 3025 	strb.w	r3, [r7, #37]	@ 0x25
        if (tcp_active_pcbs_changed) {
 801cb02:	4b14      	ldr	r3, [pc, #80]	@ (801cb54 <tcp_slowtmr+0x5a8>)
 801cb04:	781b      	ldrb	r3, [r3, #0]
 801cb06:	2b00      	cmp	r3, #0
 801cb08:	f47f ad62 	bne.w	801c5d0 <tcp_slowtmr+0x24>
        }
        /* if err == ERR_ABRT, 'prev' is already deallocated */
        if (err == ERR_OK) {
 801cb0c:	f997 3025 	ldrsb.w	r3, [r7, #37]	@ 0x25
 801cb10:	2b00      	cmp	r3, #0
 801cb12:	d102      	bne.n	801cb1a <tcp_slowtmr+0x56e>
          tcp_output(prev);
 801cb14:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 801cb16:	f004 f915 	bl	8020d44 <tcp_output>
  while (pcb != NULL) {
 801cb1a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cb1c:	2b00      	cmp	r3, #0
 801cb1e:	f47f ad5e 	bne.w	801c5de <tcp_slowtmr+0x32>
    }
  }


  /* Steps through all of the TIME-WAIT PCBs. */
  prev = NULL;
 801cb22:	2300      	movs	r3, #0
 801cb24:	62bb      	str	r3, [r7, #40]	@ 0x28
  pcb = tcp_tw_pcbs;
 801cb26:	4b0c      	ldr	r3, [pc, #48]	@ (801cb58 <tcp_slowtmr+0x5ac>)
 801cb28:	681b      	ldr	r3, [r3, #0]
 801cb2a:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801cb2c:	e069      	b.n	801cc02 <tcp_slowtmr+0x656>
 801cb2e:	bf00      	nop
 801cb30:	2402afa8 	.word	0x2402afa8
 801cb34:	000a4cb8 	.word	0x000a4cb8
 801cb38:	10624dd3 	.word	0x10624dd3
 801cb3c:	000124f8 	.word	0x000124f8
 801cb40:	2402afb4 	.word	0x2402afb4
 801cb44:	0802f820 	.word	0x0802f820
 801cb48:	0802fc58 	.word	0x0802fc58
 801cb4c:	0802f864 	.word	0x0802f864
 801cb50:	0802fc84 	.word	0x0802fc84
 801cb54:	2402afbc 	.word	0x2402afbc
 801cb58:	2402afb8 	.word	0x2402afb8
    LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801cb5c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cb5e:	7d1b      	ldrb	r3, [r3, #20]
 801cb60:	2b0a      	cmp	r3, #10
 801cb62:	d006      	beq.n	801cb72 <tcp_slowtmr+0x5c6>
 801cb64:	4b2b      	ldr	r3, [pc, #172]	@ (801cc14 <tcp_slowtmr+0x668>)
 801cb66:	f240 52a1 	movw	r2, #1441	@ 0x5a1
 801cb6a:	492b      	ldr	r1, [pc, #172]	@ (801cc18 <tcp_slowtmr+0x66c>)
 801cb6c:	482b      	ldr	r0, [pc, #172]	@ (801cc1c <tcp_slowtmr+0x670>)
 801cb6e:	f00d ff75 	bl	802aa5c <iprintf>
    pcb_remove = 0;
 801cb72:	2300      	movs	r3, #0
 801cb74:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27

    /* Check if this PCB has stayed long enough in TIME-WAIT */
    if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) {
 801cb78:	4b29      	ldr	r3, [pc, #164]	@ (801cc20 <tcp_slowtmr+0x674>)
 801cb7a:	681a      	ldr	r2, [r3, #0]
 801cb7c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cb7e:	6a1b      	ldr	r3, [r3, #32]
 801cb80:	1ad3      	subs	r3, r2, r3
 801cb82:	2bf0      	cmp	r3, #240	@ 0xf0
 801cb84:	d904      	bls.n	801cb90 <tcp_slowtmr+0x5e4>
      ++pcb_remove;
 801cb86:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801cb8a:	3301      	adds	r3, #1
 801cb8c:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }

    /* If the PCB should be removed, do it. */
    if (pcb_remove) {
 801cb90:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 801cb94:	2b00      	cmp	r3, #0
 801cb96:	d02f      	beq.n	801cbf8 <tcp_slowtmr+0x64c>
      struct tcp_pcb *pcb2;
      tcp_pcb_purge(pcb);
 801cb98:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 801cb9a:	f000 fc05 	bl	801d3a8 <tcp_pcb_purge>
      /* Remove PCB from tcp_tw_pcbs list. */
      if (prev != NULL) {
 801cb9e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801cba0:	2b00      	cmp	r3, #0
 801cba2:	d010      	beq.n	801cbc6 <tcp_slowtmr+0x61a>
        LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs);
 801cba4:	4b1f      	ldr	r3, [pc, #124]	@ (801cc24 <tcp_slowtmr+0x678>)
 801cba6:	681b      	ldr	r3, [r3, #0]
 801cba8:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801cbaa:	429a      	cmp	r2, r3
 801cbac:	d106      	bne.n	801cbbc <tcp_slowtmr+0x610>
 801cbae:	4b19      	ldr	r3, [pc, #100]	@ (801cc14 <tcp_slowtmr+0x668>)
 801cbb0:	f240 52af 	movw	r2, #1455	@ 0x5af
 801cbb4:	491c      	ldr	r1, [pc, #112]	@ (801cc28 <tcp_slowtmr+0x67c>)
 801cbb6:	4819      	ldr	r0, [pc, #100]	@ (801cc1c <tcp_slowtmr+0x670>)
 801cbb8:	f00d ff50 	bl	802aa5c <iprintf>
        prev->next = pcb->next;
 801cbbc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cbbe:	68da      	ldr	r2, [r3, #12]
 801cbc0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 801cbc2:	60da      	str	r2, [r3, #12]
 801cbc4:	e00f      	b.n	801cbe6 <tcp_slowtmr+0x63a>
      } else {
        /* This PCB was the first. */
        LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb);
 801cbc6:	4b17      	ldr	r3, [pc, #92]	@ (801cc24 <tcp_slowtmr+0x678>)
 801cbc8:	681b      	ldr	r3, [r3, #0]
 801cbca:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 801cbcc:	429a      	cmp	r2, r3
 801cbce:	d006      	beq.n	801cbde <tcp_slowtmr+0x632>
 801cbd0:	4b10      	ldr	r3, [pc, #64]	@ (801cc14 <tcp_slowtmr+0x668>)
 801cbd2:	f240 52b3 	movw	r2, #1459	@ 0x5b3
 801cbd6:	4915      	ldr	r1, [pc, #84]	@ (801cc2c <tcp_slowtmr+0x680>)
 801cbd8:	4810      	ldr	r0, [pc, #64]	@ (801cc1c <tcp_slowtmr+0x670>)
 801cbda:	f00d ff3f 	bl	802aa5c <iprintf>
        tcp_tw_pcbs = pcb->next;
 801cbde:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cbe0:	68db      	ldr	r3, [r3, #12]
 801cbe2:	4a10      	ldr	r2, [pc, #64]	@ (801cc24 <tcp_slowtmr+0x678>)
 801cbe4:	6013      	str	r3, [r2, #0]
      }
      pcb2 = pcb;
 801cbe6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cbe8:	61fb      	str	r3, [r7, #28]
      pcb = pcb->next;
 801cbea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cbec:	68db      	ldr	r3, [r3, #12]
 801cbee:	62fb      	str	r3, [r7, #44]	@ 0x2c
      tcp_free(pcb2);
 801cbf0:	69f8      	ldr	r0, [r7, #28]
 801cbf2:	f7fe ff77 	bl	801bae4 <tcp_free>
 801cbf6:	e004      	b.n	801cc02 <tcp_slowtmr+0x656>
    } else {
      prev = pcb;
 801cbf8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cbfa:	62bb      	str	r3, [r7, #40]	@ 0x28
      pcb = pcb->next;
 801cbfc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cbfe:	68db      	ldr	r3, [r3, #12]
 801cc00:	62fb      	str	r3, [r7, #44]	@ 0x2c
  while (pcb != NULL) {
 801cc02:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 801cc04:	2b00      	cmp	r3, #0
 801cc06:	d1a9      	bne.n	801cb5c <tcp_slowtmr+0x5b0>
    }
  }
}
 801cc08:	bf00      	nop
 801cc0a:	bf00      	nop
 801cc0c:	3730      	adds	r7, #48	@ 0x30
 801cc0e:	46bd      	mov	sp, r7
 801cc10:	bdb0      	pop	{r4, r5, r7, pc}
 801cc12:	bf00      	nop
 801cc14:	0802f820 	.word	0x0802f820
 801cc18:	0802fcb0 	.word	0x0802fcb0
 801cc1c:	0802f864 	.word	0x0802f864
 801cc20:	2402afa8 	.word	0x2402afa8
 801cc24:	2402afb8 	.word	0x2402afb8
 801cc28:	0802fce0 	.word	0x0802fce0
 801cc2c:	0802fd08 	.word	0x0802fd08

0801cc30 <tcp_fasttmr>:
 *
 * Automatically called from tcp_tmr().
 */
void
tcp_fasttmr(void)
{
 801cc30:	b580      	push	{r7, lr}
 801cc32:	b082      	sub	sp, #8
 801cc34:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb;

  ++tcp_timer_ctr;
 801cc36:	4b2d      	ldr	r3, [pc, #180]	@ (801ccec <tcp_fasttmr+0xbc>)
 801cc38:	781b      	ldrb	r3, [r3, #0]
 801cc3a:	3301      	adds	r3, #1
 801cc3c:	b2da      	uxtb	r2, r3
 801cc3e:	4b2b      	ldr	r3, [pc, #172]	@ (801ccec <tcp_fasttmr+0xbc>)
 801cc40:	701a      	strb	r2, [r3, #0]

tcp_fasttmr_start:
  pcb = tcp_active_pcbs;
 801cc42:	4b2b      	ldr	r3, [pc, #172]	@ (801ccf0 <tcp_fasttmr+0xc0>)
 801cc44:	681b      	ldr	r3, [r3, #0]
 801cc46:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801cc48:	e048      	b.n	801ccdc <tcp_fasttmr+0xac>
    if (pcb->last_timer != tcp_timer_ctr) {
 801cc4a:	687b      	ldr	r3, [r7, #4]
 801cc4c:	7f9a      	ldrb	r2, [r3, #30]
 801cc4e:	4b27      	ldr	r3, [pc, #156]	@ (801ccec <tcp_fasttmr+0xbc>)
 801cc50:	781b      	ldrb	r3, [r3, #0]
 801cc52:	429a      	cmp	r2, r3
 801cc54:	d03f      	beq.n	801ccd6 <tcp_fasttmr+0xa6>
      struct tcp_pcb *next;
      pcb->last_timer = tcp_timer_ctr;
 801cc56:	4b25      	ldr	r3, [pc, #148]	@ (801ccec <tcp_fasttmr+0xbc>)
 801cc58:	781a      	ldrb	r2, [r3, #0]
 801cc5a:	687b      	ldr	r3, [r7, #4]
 801cc5c:	779a      	strb	r2, [r3, #30]
      /* send delayed ACKs */
      if (pcb->flags & TF_ACK_DELAY) {
 801cc5e:	687b      	ldr	r3, [r7, #4]
 801cc60:	8b5b      	ldrh	r3, [r3, #26]
 801cc62:	f003 0301 	and.w	r3, r3, #1
 801cc66:	2b00      	cmp	r3, #0
 801cc68:	d010      	beq.n	801cc8c <tcp_fasttmr+0x5c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n"));
        tcp_ack_now(pcb);
 801cc6a:	687b      	ldr	r3, [r7, #4]
 801cc6c:	8b5b      	ldrh	r3, [r3, #26]
 801cc6e:	f043 0302 	orr.w	r3, r3, #2
 801cc72:	b29a      	uxth	r2, r3
 801cc74:	687b      	ldr	r3, [r7, #4]
 801cc76:	835a      	strh	r2, [r3, #26]
        tcp_output(pcb);
 801cc78:	6878      	ldr	r0, [r7, #4]
 801cc7a:	f004 f863 	bl	8020d44 <tcp_output>
        tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 801cc7e:	687b      	ldr	r3, [r7, #4]
 801cc80:	8b5b      	ldrh	r3, [r3, #26]
 801cc82:	f023 0303 	bic.w	r3, r3, #3
 801cc86:	b29a      	uxth	r2, r3
 801cc88:	687b      	ldr	r3, [r7, #4]
 801cc8a:	835a      	strh	r2, [r3, #26]
      }
      /* send pending FIN */
      if (pcb->flags & TF_CLOSEPEND) {
 801cc8c:	687b      	ldr	r3, [r7, #4]
 801cc8e:	8b5b      	ldrh	r3, [r3, #26]
 801cc90:	f003 0308 	and.w	r3, r3, #8
 801cc94:	2b00      	cmp	r3, #0
 801cc96:	d009      	beq.n	801ccac <tcp_fasttmr+0x7c>
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: pending FIN\n"));
        tcp_clear_flags(pcb, TF_CLOSEPEND);
 801cc98:	687b      	ldr	r3, [r7, #4]
 801cc9a:	8b5b      	ldrh	r3, [r3, #26]
 801cc9c:	f023 0308 	bic.w	r3, r3, #8
 801cca0:	b29a      	uxth	r2, r3
 801cca2:	687b      	ldr	r3, [r7, #4]
 801cca4:	835a      	strh	r2, [r3, #26]
        tcp_close_shutdown_fin(pcb);
 801cca6:	6878      	ldr	r0, [r7, #4]
 801cca8:	f7ff f8b0 	bl	801be0c <tcp_close_shutdown_fin>
      }

      next = pcb->next;
 801ccac:	687b      	ldr	r3, [r7, #4]
 801ccae:	68db      	ldr	r3, [r3, #12]
 801ccb0:	603b      	str	r3, [r7, #0]

      /* If there is data which was previously "refused" by upper layer */
      if (pcb->refused_data != NULL) {
 801ccb2:	687b      	ldr	r3, [r7, #4]
 801ccb4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801ccb6:	2b00      	cmp	r3, #0
 801ccb8:	d00a      	beq.n	801ccd0 <tcp_fasttmr+0xa0>
        tcp_active_pcbs_changed = 0;
 801ccba:	4b0e      	ldr	r3, [pc, #56]	@ (801ccf4 <tcp_fasttmr+0xc4>)
 801ccbc:	2200      	movs	r2, #0
 801ccbe:	701a      	strb	r2, [r3, #0]
        tcp_process_refused_data(pcb);
 801ccc0:	6878      	ldr	r0, [r7, #4]
 801ccc2:	f000 f819 	bl	801ccf8 <tcp_process_refused_data>
        if (tcp_active_pcbs_changed) {
 801ccc6:	4b0b      	ldr	r3, [pc, #44]	@ (801ccf4 <tcp_fasttmr+0xc4>)
 801ccc8:	781b      	ldrb	r3, [r3, #0]
 801ccca:	2b00      	cmp	r3, #0
 801cccc:	d000      	beq.n	801ccd0 <tcp_fasttmr+0xa0>
          /* application callback has changed the pcb list: restart the loop */
          goto tcp_fasttmr_start;
 801ccce:	e7b8      	b.n	801cc42 <tcp_fasttmr+0x12>
        }
      }
      pcb = next;
 801ccd0:	683b      	ldr	r3, [r7, #0]
 801ccd2:	607b      	str	r3, [r7, #4]
 801ccd4:	e002      	b.n	801ccdc <tcp_fasttmr+0xac>
    } else {
      pcb = pcb->next;
 801ccd6:	687b      	ldr	r3, [r7, #4]
 801ccd8:	68db      	ldr	r3, [r3, #12]
 801ccda:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801ccdc:	687b      	ldr	r3, [r7, #4]
 801ccde:	2b00      	cmp	r3, #0
 801cce0:	d1b3      	bne.n	801cc4a <tcp_fasttmr+0x1a>
    }
  }
}
 801cce2:	bf00      	nop
 801cce4:	bf00      	nop
 801cce6:	3708      	adds	r7, #8
 801cce8:	46bd      	mov	sp, r7
 801ccea:	bd80      	pop	{r7, pc}
 801ccec:	2402afbe 	.word	0x2402afbe
 801ccf0:	2402afb4 	.word	0x2402afb4
 801ccf4:	2402afbc 	.word	0x2402afbc

0801ccf8 <tcp_process_refused_data>:
}

/** Pass pcb->refused_data to the recv callback */
err_t
tcp_process_refused_data(struct tcp_pcb *pcb)
{
 801ccf8:	b590      	push	{r4, r7, lr}
 801ccfa:	b085      	sub	sp, #20
 801ccfc:	af00      	add	r7, sp, #0
 801ccfe:	6078      	str	r0, [r7, #4]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  struct pbuf *rest;
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

  LWIP_ERROR("tcp_process_refused_data: invalid pcb", pcb != NULL, return ERR_ARG);
 801cd00:	687b      	ldr	r3, [r7, #4]
 801cd02:	2b00      	cmp	r3, #0
 801cd04:	d109      	bne.n	801cd1a <tcp_process_refused_data+0x22>
 801cd06:	4b38      	ldr	r3, [pc, #224]	@ (801cde8 <tcp_process_refused_data+0xf0>)
 801cd08:	f240 6209 	movw	r2, #1545	@ 0x609
 801cd0c:	4937      	ldr	r1, [pc, #220]	@ (801cdec <tcp_process_refused_data+0xf4>)
 801cd0e:	4838      	ldr	r0, [pc, #224]	@ (801cdf0 <tcp_process_refused_data+0xf8>)
 801cd10:	f00d fea4 	bl	802aa5c <iprintf>
 801cd14:	f06f 030f 	mvn.w	r3, #15
 801cd18:	e061      	b.n	801cdde <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
  while (pcb->refused_data != NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
  {
    err_t err;
    u8_t refused_flags = pcb->refused_data->flags;
 801cd1a:	687b      	ldr	r3, [r7, #4]
 801cd1c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801cd1e:	7b5b      	ldrb	r3, [r3, #13]
 801cd20:	73bb      	strb	r3, [r7, #14]
    /* set pcb->refused_data to NULL in case the callback frees it and then
       closes the pcb */
    struct pbuf *refused_data = pcb->refused_data;
 801cd22:	687b      	ldr	r3, [r7, #4]
 801cd24:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801cd26:	60bb      	str	r3, [r7, #8]
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
    pbuf_split_64k(refused_data, &rest);
    pcb->refused_data = rest;
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    pcb->refused_data = NULL;
 801cd28:	687b      	ldr	r3, [r7, #4]
 801cd2a:	2200      	movs	r2, #0
 801cd2c:	679a      	str	r2, [r3, #120]	@ 0x78
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
    /* Notify again application with data previously received. */
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n"));
    TCP_EVENT_RECV(pcb, refused_data, ERR_OK, err);
 801cd2e:	687b      	ldr	r3, [r7, #4]
 801cd30:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801cd34:	2b00      	cmp	r3, #0
 801cd36:	d00b      	beq.n	801cd50 <tcp_process_refused_data+0x58>
 801cd38:	687b      	ldr	r3, [r7, #4]
 801cd3a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801cd3e:	687b      	ldr	r3, [r7, #4]
 801cd40:	6918      	ldr	r0, [r3, #16]
 801cd42:	2300      	movs	r3, #0
 801cd44:	68ba      	ldr	r2, [r7, #8]
 801cd46:	6879      	ldr	r1, [r7, #4]
 801cd48:	47a0      	blx	r4
 801cd4a:	4603      	mov	r3, r0
 801cd4c:	73fb      	strb	r3, [r7, #15]
 801cd4e:	e007      	b.n	801cd60 <tcp_process_refused_data+0x68>
 801cd50:	2300      	movs	r3, #0
 801cd52:	68ba      	ldr	r2, [r7, #8]
 801cd54:	6879      	ldr	r1, [r7, #4]
 801cd56:	2000      	movs	r0, #0
 801cd58:	f000 f8a6 	bl	801cea8 <tcp_recv_null>
 801cd5c:	4603      	mov	r3, r0
 801cd5e:	73fb      	strb	r3, [r7, #15]
    if (err == ERR_OK) {
 801cd60:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801cd64:	2b00      	cmp	r3, #0
 801cd66:	d12b      	bne.n	801cdc0 <tcp_process_refused_data+0xc8>
      /* did refused_data include a FIN? */
      if ((refused_flags & PBUF_FLAG_TCP_FIN)
 801cd68:	7bbb      	ldrb	r3, [r7, #14]
 801cd6a:	f003 0320 	and.w	r3, r3, #32
 801cd6e:	2b00      	cmp	r3, #0
 801cd70:	d034      	beq.n	801cddc <tcp_process_refused_data+0xe4>
          && (rest == NULL)
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
         ) {
        /* correct rcv_wnd as the application won't call tcp_recved()
           for the FIN's seqno */
        if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801cd72:	687b      	ldr	r3, [r7, #4]
 801cd74:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801cd76:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801cd7a:	4293      	cmp	r3, r2
 801cd7c:	d005      	beq.n	801cd8a <tcp_process_refused_data+0x92>
          pcb->rcv_wnd++;
 801cd7e:	687b      	ldr	r3, [r7, #4]
 801cd80:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801cd82:	3301      	adds	r3, #1
 801cd84:	b29a      	uxth	r2, r3
 801cd86:	687b      	ldr	r3, [r7, #4]
 801cd88:	851a      	strh	r2, [r3, #40]	@ 0x28
        }
        TCP_EVENT_CLOSED(pcb, err);
 801cd8a:	687b      	ldr	r3, [r7, #4]
 801cd8c:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801cd90:	2b00      	cmp	r3, #0
 801cd92:	d00b      	beq.n	801cdac <tcp_process_refused_data+0xb4>
 801cd94:	687b      	ldr	r3, [r7, #4]
 801cd96:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801cd9a:	687b      	ldr	r3, [r7, #4]
 801cd9c:	6918      	ldr	r0, [r3, #16]
 801cd9e:	2300      	movs	r3, #0
 801cda0:	2200      	movs	r2, #0
 801cda2:	6879      	ldr	r1, [r7, #4]
 801cda4:	47a0      	blx	r4
 801cda6:	4603      	mov	r3, r0
 801cda8:	73fb      	strb	r3, [r7, #15]
 801cdaa:	e001      	b.n	801cdb0 <tcp_process_refused_data+0xb8>
 801cdac:	2300      	movs	r3, #0
 801cdae:	73fb      	strb	r3, [r7, #15]
        if (err == ERR_ABRT) {
 801cdb0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801cdb4:	f113 0f0d 	cmn.w	r3, #13
 801cdb8:	d110      	bne.n	801cddc <tcp_process_refused_data+0xe4>
          return ERR_ABRT;
 801cdba:	f06f 030c 	mvn.w	r3, #12
 801cdbe:	e00e      	b.n	801cdde <tcp_process_refused_data+0xe6>
        }
      }
    } else if (err == ERR_ABRT) {
 801cdc0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801cdc4:	f113 0f0d 	cmn.w	r3, #13
 801cdc8:	d102      	bne.n	801cdd0 <tcp_process_refused_data+0xd8>
      /* if err == ERR_ABRT, 'pcb' is already deallocated */
      /* Drop incoming packets because pcb is "full" (only if the incoming
         segment contains data). */
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n"));
      return ERR_ABRT;
 801cdca:	f06f 030c 	mvn.w	r3, #12
 801cdce:	e006      	b.n	801cdde <tcp_process_refused_data+0xe6>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
      if (rest != NULL) {
        pbuf_cat(refused_data, rest);
      }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
      pcb->refused_data = refused_data;
 801cdd0:	687b      	ldr	r3, [r7, #4]
 801cdd2:	68ba      	ldr	r2, [r7, #8]
 801cdd4:	679a      	str	r2, [r3, #120]	@ 0x78
      return ERR_INPROGRESS;
 801cdd6:	f06f 0304 	mvn.w	r3, #4
 801cdda:	e000      	b.n	801cdde <tcp_process_refused_data+0xe6>
    }
  }
  return ERR_OK;
 801cddc:	2300      	movs	r3, #0
}
 801cdde:	4618      	mov	r0, r3
 801cde0:	3714      	adds	r7, #20
 801cde2:	46bd      	mov	sp, r7
 801cde4:	bd90      	pop	{r4, r7, pc}
 801cde6:	bf00      	nop
 801cde8:	0802f820 	.word	0x0802f820
 801cdec:	0802fd30 	.word	0x0802fd30
 801cdf0:	0802f864 	.word	0x0802f864

0801cdf4 <tcp_segs_free>:
 *
 * @param seg tcp_seg list of TCP segments to free
 */
void
tcp_segs_free(struct tcp_seg *seg)
{
 801cdf4:	b580      	push	{r7, lr}
 801cdf6:	b084      	sub	sp, #16
 801cdf8:	af00      	add	r7, sp, #0
 801cdfa:	6078      	str	r0, [r7, #4]
  while (seg != NULL) {
 801cdfc:	e007      	b.n	801ce0e <tcp_segs_free+0x1a>
    struct tcp_seg *next = seg->next;
 801cdfe:	687b      	ldr	r3, [r7, #4]
 801ce00:	681b      	ldr	r3, [r3, #0]
 801ce02:	60fb      	str	r3, [r7, #12]
    tcp_seg_free(seg);
 801ce04:	6878      	ldr	r0, [r7, #4]
 801ce06:	f000 f80a 	bl	801ce1e <tcp_seg_free>
    seg = next;
 801ce0a:	68fb      	ldr	r3, [r7, #12]
 801ce0c:	607b      	str	r3, [r7, #4]
  while (seg != NULL) {
 801ce0e:	687b      	ldr	r3, [r7, #4]
 801ce10:	2b00      	cmp	r3, #0
 801ce12:	d1f4      	bne.n	801cdfe <tcp_segs_free+0xa>
  }
}
 801ce14:	bf00      	nop
 801ce16:	bf00      	nop
 801ce18:	3710      	adds	r7, #16
 801ce1a:	46bd      	mov	sp, r7
 801ce1c:	bd80      	pop	{r7, pc}

0801ce1e <tcp_seg_free>:
 *
 * @param seg single tcp_seg to free
 */
void
tcp_seg_free(struct tcp_seg *seg)
{
 801ce1e:	b580      	push	{r7, lr}
 801ce20:	b082      	sub	sp, #8
 801ce22:	af00      	add	r7, sp, #0
 801ce24:	6078      	str	r0, [r7, #4]
  if (seg != NULL) {
 801ce26:	687b      	ldr	r3, [r7, #4]
 801ce28:	2b00      	cmp	r3, #0
 801ce2a:	d00c      	beq.n	801ce46 <tcp_seg_free+0x28>
    if (seg->p != NULL) {
 801ce2c:	687b      	ldr	r3, [r7, #4]
 801ce2e:	685b      	ldr	r3, [r3, #4]
 801ce30:	2b00      	cmp	r3, #0
 801ce32:	d004      	beq.n	801ce3e <tcp_seg_free+0x20>
      pbuf_free(seg->p);
 801ce34:	687b      	ldr	r3, [r7, #4]
 801ce36:	685b      	ldr	r3, [r3, #4]
 801ce38:	4618      	mov	r0, r3
 801ce3a:	f7fe fb97 	bl	801b56c <pbuf_free>
#if TCP_DEBUG
      seg->p = NULL;
#endif /* TCP_DEBUG */
    }
    memp_free(MEMP_TCP_SEG, seg);
 801ce3e:	6879      	ldr	r1, [r7, #4]
 801ce40:	2003      	movs	r0, #3
 801ce42:	f7fd fca5 	bl	801a790 <memp_free>
  }
}
 801ce46:	bf00      	nop
 801ce48:	3708      	adds	r7, #8
 801ce4a:	46bd      	mov	sp, r7
 801ce4c:	bd80      	pop	{r7, pc}
	...

0801ce50 <tcp_seg_copy>:
 * @param seg the old tcp_seg
 * @return a copy of seg
 */
struct tcp_seg *
tcp_seg_copy(struct tcp_seg *seg)
{
 801ce50:	b580      	push	{r7, lr}
 801ce52:	b084      	sub	sp, #16
 801ce54:	af00      	add	r7, sp, #0
 801ce56:	6078      	str	r0, [r7, #4]
  struct tcp_seg *cseg;

  LWIP_ASSERT("tcp_seg_copy: invalid seg", seg != NULL);
 801ce58:	687b      	ldr	r3, [r7, #4]
 801ce5a:	2b00      	cmp	r3, #0
 801ce5c:	d106      	bne.n	801ce6c <tcp_seg_copy+0x1c>
 801ce5e:	4b0f      	ldr	r3, [pc, #60]	@ (801ce9c <tcp_seg_copy+0x4c>)
 801ce60:	f240 6282 	movw	r2, #1666	@ 0x682
 801ce64:	490e      	ldr	r1, [pc, #56]	@ (801cea0 <tcp_seg_copy+0x50>)
 801ce66:	480f      	ldr	r0, [pc, #60]	@ (801cea4 <tcp_seg_copy+0x54>)
 801ce68:	f00d fdf8 	bl	802aa5c <iprintf>

  cseg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG);
 801ce6c:	2003      	movs	r0, #3
 801ce6e:	f7fd fc19 	bl	801a6a4 <memp_malloc>
 801ce72:	60f8      	str	r0, [r7, #12]
  if (cseg == NULL) {
 801ce74:	68fb      	ldr	r3, [r7, #12]
 801ce76:	2b00      	cmp	r3, #0
 801ce78:	d101      	bne.n	801ce7e <tcp_seg_copy+0x2e>
    return NULL;
 801ce7a:	2300      	movs	r3, #0
 801ce7c:	e00a      	b.n	801ce94 <tcp_seg_copy+0x44>
  }
  SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg));
 801ce7e:	2214      	movs	r2, #20
 801ce80:	6879      	ldr	r1, [r7, #4]
 801ce82:	68f8      	ldr	r0, [r7, #12]
 801ce84:	f00e f873 	bl	802af6e <memcpy>
  pbuf_ref(cseg->p);
 801ce88:	68fb      	ldr	r3, [r7, #12]
 801ce8a:	685b      	ldr	r3, [r3, #4]
 801ce8c:	4618      	mov	r0, r3
 801ce8e:	f7fe fc13 	bl	801b6b8 <pbuf_ref>
  return cseg;
 801ce92:	68fb      	ldr	r3, [r7, #12]
}
 801ce94:	4618      	mov	r0, r3
 801ce96:	3710      	adds	r7, #16
 801ce98:	46bd      	mov	sp, r7
 801ce9a:	bd80      	pop	{r7, pc}
 801ce9c:	0802f820 	.word	0x0802f820
 801cea0:	0802fd74 	.word	0x0802fd74
 801cea4:	0802f864 	.word	0x0802f864

0801cea8 <tcp_recv_null>:
 * Default receive callback that is called if the user didn't register
 * a recv callback for the pcb.
 */
err_t
tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err)
{
 801cea8:	b580      	push	{r7, lr}
 801ceaa:	b084      	sub	sp, #16
 801ceac:	af00      	add	r7, sp, #0
 801ceae:	60f8      	str	r0, [r7, #12]
 801ceb0:	60b9      	str	r1, [r7, #8]
 801ceb2:	607a      	str	r2, [r7, #4]
 801ceb4:	70fb      	strb	r3, [r7, #3]
  LWIP_UNUSED_ARG(arg);

  LWIP_ERROR("tcp_recv_null: invalid pcb", pcb != NULL, return ERR_ARG);
 801ceb6:	68bb      	ldr	r3, [r7, #8]
 801ceb8:	2b00      	cmp	r3, #0
 801ceba:	d109      	bne.n	801ced0 <tcp_recv_null+0x28>
 801cebc:	4b12      	ldr	r3, [pc, #72]	@ (801cf08 <tcp_recv_null+0x60>)
 801cebe:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 801cec2:	4912      	ldr	r1, [pc, #72]	@ (801cf0c <tcp_recv_null+0x64>)
 801cec4:	4812      	ldr	r0, [pc, #72]	@ (801cf10 <tcp_recv_null+0x68>)
 801cec6:	f00d fdc9 	bl	802aa5c <iprintf>
 801ceca:	f06f 030f 	mvn.w	r3, #15
 801cece:	e016      	b.n	801cefe <tcp_recv_null+0x56>

  if (p != NULL) {
 801ced0:	687b      	ldr	r3, [r7, #4]
 801ced2:	2b00      	cmp	r3, #0
 801ced4:	d009      	beq.n	801ceea <tcp_recv_null+0x42>
    tcp_recved(pcb, p->tot_len);
 801ced6:	687b      	ldr	r3, [r7, #4]
 801ced8:	891b      	ldrh	r3, [r3, #8]
 801ceda:	4619      	mov	r1, r3
 801cedc:	68b8      	ldr	r0, [r7, #8]
 801cede:	f7ff f9b1 	bl	801c244 <tcp_recved>
    pbuf_free(p);
 801cee2:	6878      	ldr	r0, [r7, #4]
 801cee4:	f7fe fb42 	bl	801b56c <pbuf_free>
 801cee8:	e008      	b.n	801cefc <tcp_recv_null+0x54>
  } else if (err == ERR_OK) {
 801ceea:	f997 3003 	ldrsb.w	r3, [r7, #3]
 801ceee:	2b00      	cmp	r3, #0
 801cef0:	d104      	bne.n	801cefc <tcp_recv_null+0x54>
    return tcp_close(pcb);
 801cef2:	68b8      	ldr	r0, [r7, #8]
 801cef4:	f7fe fff4 	bl	801bee0 <tcp_close>
 801cef8:	4603      	mov	r3, r0
 801cefa:	e000      	b.n	801cefe <tcp_recv_null+0x56>
  }
  return ERR_OK;
 801cefc:	2300      	movs	r3, #0
}
 801cefe:	4618      	mov	r0, r3
 801cf00:	3710      	adds	r7, #16
 801cf02:	46bd      	mov	sp, r7
 801cf04:	bd80      	pop	{r7, pc}
 801cf06:	bf00      	nop
 801cf08:	0802f820 	.word	0x0802f820
 801cf0c:	0802fd90 	.word	0x0802fd90
 801cf10:	0802f864 	.word	0x0802f864

0801cf14 <tcp_kill_prio>:
 *
 * @param prio minimum priority
 */
static void
tcp_kill_prio(u8_t prio)
{
 801cf14:	b580      	push	{r7, lr}
 801cf16:	b086      	sub	sp, #24
 801cf18:	af00      	add	r7, sp, #0
 801cf1a:	4603      	mov	r3, r0
 801cf1c:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;
  u8_t mprio;

  mprio = LWIP_MIN(TCP_PRIO_MAX, prio);
 801cf1e:	f997 3007 	ldrsb.w	r3, [r7, #7]
 801cf22:	2b00      	cmp	r3, #0
 801cf24:	db01      	blt.n	801cf2a <tcp_kill_prio+0x16>
 801cf26:	79fb      	ldrb	r3, [r7, #7]
 801cf28:	e000      	b.n	801cf2c <tcp_kill_prio+0x18>
 801cf2a:	237f      	movs	r3, #127	@ 0x7f
 801cf2c:	72fb      	strb	r3, [r7, #11]

  /* We want to kill connections with a lower prio, so bail out if 
   * supplied prio is 0 - there can never be a lower prio
   */
  if (mprio == 0) {
 801cf2e:	7afb      	ldrb	r3, [r7, #11]
 801cf30:	2b00      	cmp	r3, #0
 801cf32:	d034      	beq.n	801cf9e <tcp_kill_prio+0x8a>
  /* We only want kill connections with a lower prio, so decrement prio by one 
   * and start searching for oldest connection with same or lower priority than mprio.
   * We want to find the connections with the lowest possible prio, and among
   * these the one with the longest inactivity time.
   */
  mprio--;
 801cf34:	7afb      	ldrb	r3, [r7, #11]
 801cf36:	3b01      	subs	r3, #1
 801cf38:	72fb      	strb	r3, [r7, #11]

  inactivity = 0;
 801cf3a:	2300      	movs	r3, #0
 801cf3c:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801cf3e:	2300      	movs	r3, #0
 801cf40:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801cf42:	4b19      	ldr	r3, [pc, #100]	@ (801cfa8 <tcp_kill_prio+0x94>)
 801cf44:	681b      	ldr	r3, [r3, #0]
 801cf46:	617b      	str	r3, [r7, #20]
 801cf48:	e01f      	b.n	801cf8a <tcp_kill_prio+0x76>
        /* lower prio is always a kill candidate */
    if ((pcb->prio < mprio) ||
 801cf4a:	697b      	ldr	r3, [r7, #20]
 801cf4c:	7d5b      	ldrb	r3, [r3, #21]
 801cf4e:	7afa      	ldrb	r2, [r7, #11]
 801cf50:	429a      	cmp	r2, r3
 801cf52:	d80c      	bhi.n	801cf6e <tcp_kill_prio+0x5a>
        /* longer inactivity is also a kill candidate */
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801cf54:	697b      	ldr	r3, [r7, #20]
 801cf56:	7d5b      	ldrb	r3, [r3, #21]
    if ((pcb->prio < mprio) ||
 801cf58:	7afa      	ldrb	r2, [r7, #11]
 801cf5a:	429a      	cmp	r2, r3
 801cf5c:	d112      	bne.n	801cf84 <tcp_kill_prio+0x70>
        ((pcb->prio == mprio) && ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity))) {
 801cf5e:	4b13      	ldr	r3, [pc, #76]	@ (801cfac <tcp_kill_prio+0x98>)
 801cf60:	681a      	ldr	r2, [r3, #0]
 801cf62:	697b      	ldr	r3, [r7, #20]
 801cf64:	6a1b      	ldr	r3, [r3, #32]
 801cf66:	1ad3      	subs	r3, r2, r3
 801cf68:	68fa      	ldr	r2, [r7, #12]
 801cf6a:	429a      	cmp	r2, r3
 801cf6c:	d80a      	bhi.n	801cf84 <tcp_kill_prio+0x70>
      inactivity = tcp_ticks - pcb->tmr;
 801cf6e:	4b0f      	ldr	r3, [pc, #60]	@ (801cfac <tcp_kill_prio+0x98>)
 801cf70:	681a      	ldr	r2, [r3, #0]
 801cf72:	697b      	ldr	r3, [r7, #20]
 801cf74:	6a1b      	ldr	r3, [r3, #32]
 801cf76:	1ad3      	subs	r3, r2, r3
 801cf78:	60fb      	str	r3, [r7, #12]
      inactive   = pcb;
 801cf7a:	697b      	ldr	r3, [r7, #20]
 801cf7c:	613b      	str	r3, [r7, #16]
      mprio      = pcb->prio;
 801cf7e:	697b      	ldr	r3, [r7, #20]
 801cf80:	7d5b      	ldrb	r3, [r3, #21]
 801cf82:	72fb      	strb	r3, [r7, #11]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801cf84:	697b      	ldr	r3, [r7, #20]
 801cf86:	68db      	ldr	r3, [r3, #12]
 801cf88:	617b      	str	r3, [r7, #20]
 801cf8a:	697b      	ldr	r3, [r7, #20]
 801cf8c:	2b00      	cmp	r3, #0
 801cf8e:	d1dc      	bne.n	801cf4a <tcp_kill_prio+0x36>
    }
  }
  if (inactive != NULL) {
 801cf90:	693b      	ldr	r3, [r7, #16]
 801cf92:	2b00      	cmp	r3, #0
 801cf94:	d004      	beq.n	801cfa0 <tcp_kill_prio+0x8c>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801cf96:	6938      	ldr	r0, [r7, #16]
 801cf98:	f7ff f8ee 	bl	801c178 <tcp_abort>
 801cf9c:	e000      	b.n	801cfa0 <tcp_kill_prio+0x8c>
    return;
 801cf9e:	bf00      	nop
  }
}
 801cfa0:	3718      	adds	r7, #24
 801cfa2:	46bd      	mov	sp, r7
 801cfa4:	bd80      	pop	{r7, pc}
 801cfa6:	bf00      	nop
 801cfa8:	2402afb4 	.word	0x2402afb4
 801cfac:	2402afa8 	.word	0x2402afa8

0801cfb0 <tcp_kill_state>:
 * Kills the oldest connection that is in specific state.
 * Called from tcp_alloc() for LAST_ACK and CLOSING if no more connections are available.
 */
static void
tcp_kill_state(enum tcp_state state)
{
 801cfb0:	b580      	push	{r7, lr}
 801cfb2:	b086      	sub	sp, #24
 801cfb4:	af00      	add	r7, sp, #0
 801cfb6:	4603      	mov	r3, r0
 801cfb8:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  LWIP_ASSERT("invalid state", (state == CLOSING) || (state == LAST_ACK));
 801cfba:	79fb      	ldrb	r3, [r7, #7]
 801cfbc:	2b08      	cmp	r3, #8
 801cfbe:	d009      	beq.n	801cfd4 <tcp_kill_state+0x24>
 801cfc0:	79fb      	ldrb	r3, [r7, #7]
 801cfc2:	2b09      	cmp	r3, #9
 801cfc4:	d006      	beq.n	801cfd4 <tcp_kill_state+0x24>
 801cfc6:	4b1a      	ldr	r3, [pc, #104]	@ (801d030 <tcp_kill_state+0x80>)
 801cfc8:	f240 62dd 	movw	r2, #1757	@ 0x6dd
 801cfcc:	4919      	ldr	r1, [pc, #100]	@ (801d034 <tcp_kill_state+0x84>)
 801cfce:	481a      	ldr	r0, [pc, #104]	@ (801d038 <tcp_kill_state+0x88>)
 801cfd0:	f00d fd44 	bl	802aa5c <iprintf>

  inactivity = 0;
 801cfd4:	2300      	movs	r3, #0
 801cfd6:	60fb      	str	r3, [r7, #12]
  inactive = NULL;
 801cfd8:	2300      	movs	r3, #0
 801cfda:	613b      	str	r3, [r7, #16]
  /* Go through the list of active pcbs and get the oldest pcb that is in state
     CLOSING/LAST_ACK. */
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801cfdc:	4b17      	ldr	r3, [pc, #92]	@ (801d03c <tcp_kill_state+0x8c>)
 801cfde:	681b      	ldr	r3, [r3, #0]
 801cfe0:	617b      	str	r3, [r7, #20]
 801cfe2:	e017      	b.n	801d014 <tcp_kill_state+0x64>
    if (pcb->state == state) {
 801cfe4:	697b      	ldr	r3, [r7, #20]
 801cfe6:	7d1b      	ldrb	r3, [r3, #20]
 801cfe8:	79fa      	ldrb	r2, [r7, #7]
 801cfea:	429a      	cmp	r2, r3
 801cfec:	d10f      	bne.n	801d00e <tcp_kill_state+0x5e>
      if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801cfee:	4b14      	ldr	r3, [pc, #80]	@ (801d040 <tcp_kill_state+0x90>)
 801cff0:	681a      	ldr	r2, [r3, #0]
 801cff2:	697b      	ldr	r3, [r7, #20]
 801cff4:	6a1b      	ldr	r3, [r3, #32]
 801cff6:	1ad3      	subs	r3, r2, r3
 801cff8:	68fa      	ldr	r2, [r7, #12]
 801cffa:	429a      	cmp	r2, r3
 801cffc:	d807      	bhi.n	801d00e <tcp_kill_state+0x5e>
        inactivity = tcp_ticks - pcb->tmr;
 801cffe:	4b10      	ldr	r3, [pc, #64]	@ (801d040 <tcp_kill_state+0x90>)
 801d000:	681a      	ldr	r2, [r3, #0]
 801d002:	697b      	ldr	r3, [r7, #20]
 801d004:	6a1b      	ldr	r3, [r3, #32]
 801d006:	1ad3      	subs	r3, r2, r3
 801d008:	60fb      	str	r3, [r7, #12]
        inactive = pcb;
 801d00a:	697b      	ldr	r3, [r7, #20]
 801d00c:	613b      	str	r3, [r7, #16]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801d00e:	697b      	ldr	r3, [r7, #20]
 801d010:	68db      	ldr	r3, [r3, #12]
 801d012:	617b      	str	r3, [r7, #20]
 801d014:	697b      	ldr	r3, [r7, #20]
 801d016:	2b00      	cmp	r3, #0
 801d018:	d1e4      	bne.n	801cfe4 <tcp_kill_state+0x34>
      }
    }
  }
  if (inactive != NULL) {
 801d01a:	693b      	ldr	r3, [r7, #16]
 801d01c:	2b00      	cmp	r3, #0
 801d01e:	d003      	beq.n	801d028 <tcp_kill_state+0x78>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_closing: killing oldest %s PCB %p (%"S32_F")\n",
                            tcp_state_str[state], (void *)inactive, inactivity));
    /* Don't send a RST, since no data is lost. */
    tcp_abandon(inactive, 0);
 801d020:	2100      	movs	r1, #0
 801d022:	6938      	ldr	r0, [r7, #16]
 801d024:	f7fe ffe8 	bl	801bff8 <tcp_abandon>
  }
}
 801d028:	bf00      	nop
 801d02a:	3718      	adds	r7, #24
 801d02c:	46bd      	mov	sp, r7
 801d02e:	bd80      	pop	{r7, pc}
 801d030:	0802f820 	.word	0x0802f820
 801d034:	0802fdac 	.word	0x0802fdac
 801d038:	0802f864 	.word	0x0802f864
 801d03c:	2402afb4 	.word	0x2402afb4
 801d040:	2402afa8 	.word	0x2402afa8

0801d044 <tcp_kill_timewait>:
 * Kills the oldest connection that is in TIME_WAIT state.
 * Called from tcp_alloc() if no more connections are available.
 */
static void
tcp_kill_timewait(void)
{
 801d044:	b580      	push	{r7, lr}
 801d046:	b084      	sub	sp, #16
 801d048:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb, *inactive;
  u32_t inactivity;

  inactivity = 0;
 801d04a:	2300      	movs	r3, #0
 801d04c:	607b      	str	r3, [r7, #4]
  inactive = NULL;
 801d04e:	2300      	movs	r3, #0
 801d050:	60bb      	str	r3, [r7, #8]
  /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801d052:	4b12      	ldr	r3, [pc, #72]	@ (801d09c <tcp_kill_timewait+0x58>)
 801d054:	681b      	ldr	r3, [r3, #0]
 801d056:	60fb      	str	r3, [r7, #12]
 801d058:	e012      	b.n	801d080 <tcp_kill_timewait+0x3c>
    if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) {
 801d05a:	4b11      	ldr	r3, [pc, #68]	@ (801d0a0 <tcp_kill_timewait+0x5c>)
 801d05c:	681a      	ldr	r2, [r3, #0]
 801d05e:	68fb      	ldr	r3, [r7, #12]
 801d060:	6a1b      	ldr	r3, [r3, #32]
 801d062:	1ad3      	subs	r3, r2, r3
 801d064:	687a      	ldr	r2, [r7, #4]
 801d066:	429a      	cmp	r2, r3
 801d068:	d807      	bhi.n	801d07a <tcp_kill_timewait+0x36>
      inactivity = tcp_ticks - pcb->tmr;
 801d06a:	4b0d      	ldr	r3, [pc, #52]	@ (801d0a0 <tcp_kill_timewait+0x5c>)
 801d06c:	681a      	ldr	r2, [r3, #0]
 801d06e:	68fb      	ldr	r3, [r7, #12]
 801d070:	6a1b      	ldr	r3, [r3, #32]
 801d072:	1ad3      	subs	r3, r2, r3
 801d074:	607b      	str	r3, [r7, #4]
      inactive = pcb;
 801d076:	68fb      	ldr	r3, [r7, #12]
 801d078:	60bb      	str	r3, [r7, #8]
  for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801d07a:	68fb      	ldr	r3, [r7, #12]
 801d07c:	68db      	ldr	r3, [r3, #12]
 801d07e:	60fb      	str	r3, [r7, #12]
 801d080:	68fb      	ldr	r3, [r7, #12]
 801d082:	2b00      	cmp	r3, #0
 801d084:	d1e9      	bne.n	801d05a <tcp_kill_timewait+0x16>
    }
  }
  if (inactive != NULL) {
 801d086:	68bb      	ldr	r3, [r7, #8]
 801d088:	2b00      	cmp	r3, #0
 801d08a:	d002      	beq.n	801d092 <tcp_kill_timewait+0x4e>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n",
                            (void *)inactive, inactivity));
    tcp_abort(inactive);
 801d08c:	68b8      	ldr	r0, [r7, #8]
 801d08e:	f7ff f873 	bl	801c178 <tcp_abort>
  }
}
 801d092:	bf00      	nop
 801d094:	3710      	adds	r7, #16
 801d096:	46bd      	mov	sp, r7
 801d098:	bd80      	pop	{r7, pc}
 801d09a:	bf00      	nop
 801d09c:	2402afb8 	.word	0x2402afb8
 801d0a0:	2402afa8 	.word	0x2402afa8

0801d0a4 <tcp_handle_closepend>:
 * now send the FIN (which failed before), the pcb might be in a state that is
 * OK for us to now free it.
 */
static void
tcp_handle_closepend(void)
{
 801d0a4:	b580      	push	{r7, lr}
 801d0a6:	b082      	sub	sp, #8
 801d0a8:	af00      	add	r7, sp, #0
  struct tcp_pcb *pcb = tcp_active_pcbs;
 801d0aa:	4b10      	ldr	r3, [pc, #64]	@ (801d0ec <tcp_handle_closepend+0x48>)
 801d0ac:	681b      	ldr	r3, [r3, #0]
 801d0ae:	607b      	str	r3, [r7, #4]

  while (pcb != NULL) {
 801d0b0:	e014      	b.n	801d0dc <tcp_handle_closepend+0x38>
    struct tcp_pcb *next = pcb->next;
 801d0b2:	687b      	ldr	r3, [r7, #4]
 801d0b4:	68db      	ldr	r3, [r3, #12]
 801d0b6:	603b      	str	r3, [r7, #0]
    /* send pending FIN */
    if (pcb->flags & TF_CLOSEPEND) {
 801d0b8:	687b      	ldr	r3, [r7, #4]
 801d0ba:	8b5b      	ldrh	r3, [r3, #26]
 801d0bc:	f003 0308 	and.w	r3, r3, #8
 801d0c0:	2b00      	cmp	r3, #0
 801d0c2:	d009      	beq.n	801d0d8 <tcp_handle_closepend+0x34>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_handle_closepend: pending FIN\n"));
      tcp_clear_flags(pcb, TF_CLOSEPEND);
 801d0c4:	687b      	ldr	r3, [r7, #4]
 801d0c6:	8b5b      	ldrh	r3, [r3, #26]
 801d0c8:	f023 0308 	bic.w	r3, r3, #8
 801d0cc:	b29a      	uxth	r2, r3
 801d0ce:	687b      	ldr	r3, [r7, #4]
 801d0d0:	835a      	strh	r2, [r3, #26]
      tcp_close_shutdown_fin(pcb);
 801d0d2:	6878      	ldr	r0, [r7, #4]
 801d0d4:	f7fe fe9a 	bl	801be0c <tcp_close_shutdown_fin>
    }
    pcb = next;
 801d0d8:	683b      	ldr	r3, [r7, #0]
 801d0da:	607b      	str	r3, [r7, #4]
  while (pcb != NULL) {
 801d0dc:	687b      	ldr	r3, [r7, #4]
 801d0de:	2b00      	cmp	r3, #0
 801d0e0:	d1e7      	bne.n	801d0b2 <tcp_handle_closepend+0xe>
  }
}
 801d0e2:	bf00      	nop
 801d0e4:	bf00      	nop
 801d0e6:	3708      	adds	r7, #8
 801d0e8:	46bd      	mov	sp, r7
 801d0ea:	bd80      	pop	{r7, pc}
 801d0ec:	2402afb4 	.word	0x2402afb4

0801d0f0 <tcp_alloc>:
 * @param prio priority for the new pcb
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_alloc(u8_t prio)
{
 801d0f0:	b580      	push	{r7, lr}
 801d0f2:	b084      	sub	sp, #16
 801d0f4:	af00      	add	r7, sp, #0
 801d0f6:	4603      	mov	r3, r0
 801d0f8:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 801d0fa:	f7f4 f883 	bl	8011204 <sys_check_core_locking>

  pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801d0fe:	2001      	movs	r0, #1
 801d100:	f7fd fad0 	bl	801a6a4 <memp_malloc>
 801d104:	60f8      	str	r0, [r7, #12]
  if (pcb == NULL) {
 801d106:	68fb      	ldr	r3, [r7, #12]
 801d108:	2b00      	cmp	r3, #0
 801d10a:	d126      	bne.n	801d15a <tcp_alloc+0x6a>
    /* Try to send FIN for all pcbs stuck in TF_CLOSEPEND first */
    tcp_handle_closepend();
 801d10c:	f7ff ffca 	bl	801d0a4 <tcp_handle_closepend>

    /* Try killing oldest connection in TIME-WAIT. */
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n"));
    tcp_kill_timewait();
 801d110:	f7ff ff98 	bl	801d044 <tcp_kill_timewait>
    /* Try to allocate a tcp_pcb again. */
    pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801d114:	2001      	movs	r0, #1
 801d116:	f7fd fac5 	bl	801a6a4 <memp_malloc>
 801d11a:	60f8      	str	r0, [r7, #12]
    if (pcb == NULL) {
 801d11c:	68fb      	ldr	r3, [r7, #12]
 801d11e:	2b00      	cmp	r3, #0
 801d120:	d11b      	bne.n	801d15a <tcp_alloc+0x6a>
      /* Try killing oldest connection in LAST-ACK (these wouldn't go to TIME-WAIT). */
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest LAST-ACK connection\n"));
      tcp_kill_state(LAST_ACK);
 801d122:	2009      	movs	r0, #9
 801d124:	f7ff ff44 	bl	801cfb0 <tcp_kill_state>
      /* Try to allocate a tcp_pcb again. */
      pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801d128:	2001      	movs	r0, #1
 801d12a:	f7fd fabb 	bl	801a6a4 <memp_malloc>
 801d12e:	60f8      	str	r0, [r7, #12]
      if (pcb == NULL) {
 801d130:	68fb      	ldr	r3, [r7, #12]
 801d132:	2b00      	cmp	r3, #0
 801d134:	d111      	bne.n	801d15a <tcp_alloc+0x6a>
        /* Try killing oldest connection in CLOSING. */
        LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest CLOSING connection\n"));
        tcp_kill_state(CLOSING);
 801d136:	2008      	movs	r0, #8
 801d138:	f7ff ff3a 	bl	801cfb0 <tcp_kill_state>
        /* Try to allocate a tcp_pcb again. */
        pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801d13c:	2001      	movs	r0, #1
 801d13e:	f7fd fab1 	bl	801a6a4 <memp_malloc>
 801d142:	60f8      	str	r0, [r7, #12]
        if (pcb == NULL) {
 801d144:	68fb      	ldr	r3, [r7, #12]
 801d146:	2b00      	cmp	r3, #0
 801d148:	d107      	bne.n	801d15a <tcp_alloc+0x6a>
          /* Try killing oldest active connection with lower priority than the new one. */
          LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing oldest connection with prio lower than %d\n", prio));
          tcp_kill_prio(prio);
 801d14a:	79fb      	ldrb	r3, [r7, #7]
 801d14c:	4618      	mov	r0, r3
 801d14e:	f7ff fee1 	bl	801cf14 <tcp_kill_prio>
          /* Try to allocate a tcp_pcb again. */
          pcb = (struct tcp_pcb *)memp_malloc(MEMP_TCP_PCB);
 801d152:	2001      	movs	r0, #1
 801d154:	f7fd faa6 	bl	801a6a4 <memp_malloc>
 801d158:	60f8      	str	r0, [r7, #12]
    if (pcb != NULL) {
      /* adjust err stats: memp_malloc failed above */
      MEMP_STATS_DEC(err, MEMP_TCP_PCB);
    }
  }
  if (pcb != NULL) {
 801d15a:	68fb      	ldr	r3, [r7, #12]
 801d15c:	2b00      	cmp	r3, #0
 801d15e:	d03f      	beq.n	801d1e0 <tcp_alloc+0xf0>
    /* zero out the whole pcb, so there is no need to initialize members to zero */
    memset(pcb, 0, sizeof(struct tcp_pcb));
 801d160:	229c      	movs	r2, #156	@ 0x9c
 801d162:	2100      	movs	r1, #0
 801d164:	68f8      	ldr	r0, [r7, #12]
 801d166:	f00d fe0b 	bl	802ad80 <memset>
    pcb->prio = prio;
 801d16a:	68fb      	ldr	r3, [r7, #12]
 801d16c:	79fa      	ldrb	r2, [r7, #7]
 801d16e:	755a      	strb	r2, [r3, #21]
    pcb->snd_buf = TCP_SND_BUF;
 801d170:	68fb      	ldr	r3, [r7, #12]
 801d172:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801d176:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
    /* Start with a window that does not need scaling. When window scaling is
       enabled and used, the window is enlarged when both sides agree on scaling. */
    pcb->rcv_wnd = pcb->rcv_ann_wnd = TCPWND_MIN16(TCP_WND);
 801d17a:	68fb      	ldr	r3, [r7, #12]
 801d17c:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801d180:	855a      	strh	r2, [r3, #42]	@ 0x2a
 801d182:	68fb      	ldr	r3, [r7, #12]
 801d184:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 801d186:	68fb      	ldr	r3, [r7, #12]
 801d188:	851a      	strh	r2, [r3, #40]	@ 0x28
    pcb->ttl = TCP_TTL;
 801d18a:	68fb      	ldr	r3, [r7, #12]
 801d18c:	22ff      	movs	r2, #255	@ 0xff
 801d18e:	72da      	strb	r2, [r3, #11]
    /* As initial send MSS, we use TCP_MSS but limit it to 536.
       The send MSS is updated when an MSS option is received. */
    pcb->mss = INITIAL_MSS;
 801d190:	68fb      	ldr	r3, [r7, #12]
 801d192:	f44f 7206 	mov.w	r2, #536	@ 0x218
 801d196:	865a      	strh	r2, [r3, #50]	@ 0x32
    pcb->rto = 3000 / TCP_SLOW_INTERVAL;
 801d198:	68fb      	ldr	r3, [r7, #12]
 801d19a:	2206      	movs	r2, #6
 801d19c:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40
    pcb->sv = 3000 / TCP_SLOW_INTERVAL;
 801d1a0:	68fb      	ldr	r3, [r7, #12]
 801d1a2:	2206      	movs	r2, #6
 801d1a4:	87da      	strh	r2, [r3, #62]	@ 0x3e
    pcb->rtime = -1;
 801d1a6:	68fb      	ldr	r3, [r7, #12]
 801d1a8:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801d1ac:	861a      	strh	r2, [r3, #48]	@ 0x30
    pcb->cwnd = 1;
 801d1ae:	68fb      	ldr	r3, [r7, #12]
 801d1b0:	2201      	movs	r2, #1
 801d1b2:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
    pcb->tmr = tcp_ticks;
 801d1b6:	4b0d      	ldr	r3, [pc, #52]	@ (801d1ec <tcp_alloc+0xfc>)
 801d1b8:	681a      	ldr	r2, [r3, #0]
 801d1ba:	68fb      	ldr	r3, [r7, #12]
 801d1bc:	621a      	str	r2, [r3, #32]
    pcb->last_timer = tcp_timer_ctr;
 801d1be:	4b0c      	ldr	r3, [pc, #48]	@ (801d1f0 <tcp_alloc+0x100>)
 801d1c0:	781a      	ldrb	r2, [r3, #0]
 801d1c2:	68fb      	ldr	r3, [r7, #12]
 801d1c4:	779a      	strb	r2, [r3, #30]
    of using the largest advertised receive window.  We've seen complications with
    receiving TCPs that use window scaling and/or window auto-tuning where the
    initial advertised window is very small and then grows rapidly once the
    connection is established. To avoid these complications, we set ssthresh to the
    largest effective cwnd (amount of in-flight data) that the sender can have. */
    pcb->ssthresh = TCP_SND_BUF;
 801d1c6:	68fb      	ldr	r3, [r7, #12]
 801d1c8:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801d1cc:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

#if LWIP_CALLBACK_API
    pcb->recv = tcp_recv_null;
 801d1d0:	68fb      	ldr	r3, [r7, #12]
 801d1d2:	4a08      	ldr	r2, [pc, #32]	@ (801d1f4 <tcp_alloc+0x104>)
 801d1d4:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
#endif /* LWIP_CALLBACK_API */

    /* Init KEEPALIVE timer */
    pcb->keep_idle  = TCP_KEEPIDLE_DEFAULT;
 801d1d8:	68fb      	ldr	r3, [r7, #12]
 801d1da:	4a07      	ldr	r2, [pc, #28]	@ (801d1f8 <tcp_alloc+0x108>)
 801d1dc:	f8c3 2094 	str.w	r2, [r3, #148]	@ 0x94
#if LWIP_TCP_KEEPALIVE
    pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT;
    pcb->keep_cnt   = TCP_KEEPCNT_DEFAULT;
#endif /* LWIP_TCP_KEEPALIVE */
  }
  return pcb;
 801d1e0:	68fb      	ldr	r3, [r7, #12]
}
 801d1e2:	4618      	mov	r0, r3
 801d1e4:	3710      	adds	r7, #16
 801d1e6:	46bd      	mov	sp, r7
 801d1e8:	bd80      	pop	{r7, pc}
 801d1ea:	bf00      	nop
 801d1ec:	2402afa8 	.word	0x2402afa8
 801d1f0:	2402afbe 	.word	0x2402afbe
 801d1f4:	0801cea9 	.word	0x0801cea9
 801d1f8:	006ddd00 	.word	0x006ddd00

0801d1fc <tcp_new_ip_type>:
 * supply @ref IPADDR_TYPE_ANY as argument and bind to @ref IP_ANY_TYPE.
 * @return a new tcp_pcb that initially is in state CLOSED
 */
struct tcp_pcb *
tcp_new_ip_type(u8_t type)
{
 801d1fc:	b580      	push	{r7, lr}
 801d1fe:	b084      	sub	sp, #16
 801d200:	af00      	add	r7, sp, #0
 801d202:	4603      	mov	r3, r0
 801d204:	71fb      	strb	r3, [r7, #7]
  struct tcp_pcb *pcb;
  pcb = tcp_alloc(TCP_PRIO_NORMAL);
 801d206:	2040      	movs	r0, #64	@ 0x40
 801d208:	f7ff ff72 	bl	801d0f0 <tcp_alloc>
 801d20c:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 801d20e:	68fb      	ldr	r3, [r7, #12]
}
 801d210:	4618      	mov	r0, r3
 801d212:	3710      	adds	r7, #16
 801d214:	46bd      	mov	sp, r7
 801d216:	bd80      	pop	{r7, pc}

0801d218 <tcp_arg>:
 * @param pcb tcp_pcb to set the callback argument
 * @param arg void pointer argument to pass to callback functions
 */
void
tcp_arg(struct tcp_pcb *pcb, void *arg)
{
 801d218:	b580      	push	{r7, lr}
 801d21a:	b082      	sub	sp, #8
 801d21c:	af00      	add	r7, sp, #0
 801d21e:	6078      	str	r0, [r7, #4]
 801d220:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801d222:	f7f3 ffef 	bl	8011204 <sys_check_core_locking>
  /* This function is allowed to be called for both listen pcbs and
     connection pcbs. */
  if (pcb != NULL) {
 801d226:	687b      	ldr	r3, [r7, #4]
 801d228:	2b00      	cmp	r3, #0
 801d22a:	d002      	beq.n	801d232 <tcp_arg+0x1a>
    pcb->callback_arg = arg;
 801d22c:	687b      	ldr	r3, [r7, #4]
 801d22e:	683a      	ldr	r2, [r7, #0]
 801d230:	611a      	str	r2, [r3, #16]
  }
}
 801d232:	bf00      	nop
 801d234:	3708      	adds	r7, #8
 801d236:	46bd      	mov	sp, r7
 801d238:	bd80      	pop	{r7, pc}
	...

0801d23c <tcp_recv>:
 * @param pcb tcp_pcb to set the recv callback
 * @param recv callback function to call for this pcb when data is received
 */
void
tcp_recv(struct tcp_pcb *pcb, tcp_recv_fn recv)
{
 801d23c:	b580      	push	{r7, lr}
 801d23e:	b082      	sub	sp, #8
 801d240:	af00      	add	r7, sp, #0
 801d242:	6078      	str	r0, [r7, #4]
 801d244:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801d246:	f7f3 ffdd 	bl	8011204 <sys_check_core_locking>
  if (pcb != NULL) {
 801d24a:	687b      	ldr	r3, [r7, #4]
 801d24c:	2b00      	cmp	r3, #0
 801d24e:	d00e      	beq.n	801d26e <tcp_recv+0x32>
    LWIP_ASSERT("invalid socket state for recv callback", pcb->state != LISTEN);
 801d250:	687b      	ldr	r3, [r7, #4]
 801d252:	7d1b      	ldrb	r3, [r3, #20]
 801d254:	2b01      	cmp	r3, #1
 801d256:	d106      	bne.n	801d266 <tcp_recv+0x2a>
 801d258:	4b07      	ldr	r3, [pc, #28]	@ (801d278 <tcp_recv+0x3c>)
 801d25a:	f240 72df 	movw	r2, #2015	@ 0x7df
 801d25e:	4907      	ldr	r1, [pc, #28]	@ (801d27c <tcp_recv+0x40>)
 801d260:	4807      	ldr	r0, [pc, #28]	@ (801d280 <tcp_recv+0x44>)
 801d262:	f00d fbfb 	bl	802aa5c <iprintf>
    pcb->recv = recv;
 801d266:	687b      	ldr	r3, [r7, #4]
 801d268:	683a      	ldr	r2, [r7, #0]
 801d26a:	f8c3 2084 	str.w	r2, [r3, #132]	@ 0x84
  }
}
 801d26e:	bf00      	nop
 801d270:	3708      	adds	r7, #8
 801d272:	46bd      	mov	sp, r7
 801d274:	bd80      	pop	{r7, pc}
 801d276:	bf00      	nop
 801d278:	0802f820 	.word	0x0802f820
 801d27c:	0802fdbc 	.word	0x0802fdbc
 801d280:	0802f864 	.word	0x0802f864

0801d284 <tcp_sent>:
 * @param pcb tcp_pcb to set the sent callback
 * @param sent callback function to call for this pcb when data is successfully sent
 */
void
tcp_sent(struct tcp_pcb *pcb, tcp_sent_fn sent)
{
 801d284:	b580      	push	{r7, lr}
 801d286:	b082      	sub	sp, #8
 801d288:	af00      	add	r7, sp, #0
 801d28a:	6078      	str	r0, [r7, #4]
 801d28c:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801d28e:	f7f3 ffb9 	bl	8011204 <sys_check_core_locking>
  if (pcb != NULL) {
 801d292:	687b      	ldr	r3, [r7, #4]
 801d294:	2b00      	cmp	r3, #0
 801d296:	d00e      	beq.n	801d2b6 <tcp_sent+0x32>
    LWIP_ASSERT("invalid socket state for sent callback", pcb->state != LISTEN);
 801d298:	687b      	ldr	r3, [r7, #4]
 801d29a:	7d1b      	ldrb	r3, [r3, #20]
 801d29c:	2b01      	cmp	r3, #1
 801d29e:	d106      	bne.n	801d2ae <tcp_sent+0x2a>
 801d2a0:	4b07      	ldr	r3, [pc, #28]	@ (801d2c0 <tcp_sent+0x3c>)
 801d2a2:	f240 72f3 	movw	r2, #2035	@ 0x7f3
 801d2a6:	4907      	ldr	r1, [pc, #28]	@ (801d2c4 <tcp_sent+0x40>)
 801d2a8:	4807      	ldr	r0, [pc, #28]	@ (801d2c8 <tcp_sent+0x44>)
 801d2aa:	f00d fbd7 	bl	802aa5c <iprintf>
    pcb->sent = sent;
 801d2ae:	687b      	ldr	r3, [r7, #4]
 801d2b0:	683a      	ldr	r2, [r7, #0]
 801d2b2:	f8c3 2080 	str.w	r2, [r3, #128]	@ 0x80
  }
}
 801d2b6:	bf00      	nop
 801d2b8:	3708      	adds	r7, #8
 801d2ba:	46bd      	mov	sp, r7
 801d2bc:	bd80      	pop	{r7, pc}
 801d2be:	bf00      	nop
 801d2c0:	0802f820 	.word	0x0802f820
 801d2c4:	0802fde4 	.word	0x0802fde4
 801d2c8:	0802f864 	.word	0x0802f864

0801d2cc <tcp_err>:
 * @param err callback function to call for this pcb when a fatal error
 *        has occurred on the connection
 */
void
tcp_err(struct tcp_pcb *pcb, tcp_err_fn err)
{
 801d2cc:	b580      	push	{r7, lr}
 801d2ce:	b082      	sub	sp, #8
 801d2d0:	af00      	add	r7, sp, #0
 801d2d2:	6078      	str	r0, [r7, #4]
 801d2d4:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801d2d6:	f7f3 ff95 	bl	8011204 <sys_check_core_locking>
  if (pcb != NULL) {
 801d2da:	687b      	ldr	r3, [r7, #4]
 801d2dc:	2b00      	cmp	r3, #0
 801d2de:	d00e      	beq.n	801d2fe <tcp_err+0x32>
    LWIP_ASSERT("invalid socket state for err callback", pcb->state != LISTEN);
 801d2e0:	687b      	ldr	r3, [r7, #4]
 801d2e2:	7d1b      	ldrb	r3, [r3, #20]
 801d2e4:	2b01      	cmp	r3, #1
 801d2e6:	d106      	bne.n	801d2f6 <tcp_err+0x2a>
 801d2e8:	4b07      	ldr	r3, [pc, #28]	@ (801d308 <tcp_err+0x3c>)
 801d2ea:	f640 020d 	movw	r2, #2061	@ 0x80d
 801d2ee:	4907      	ldr	r1, [pc, #28]	@ (801d30c <tcp_err+0x40>)
 801d2f0:	4807      	ldr	r0, [pc, #28]	@ (801d310 <tcp_err+0x44>)
 801d2f2:	f00d fbb3 	bl	802aa5c <iprintf>
    pcb->errf = err;
 801d2f6:	687b      	ldr	r3, [r7, #4]
 801d2f8:	683a      	ldr	r2, [r7, #0]
 801d2fa:	f8c3 2090 	str.w	r2, [r3, #144]	@ 0x90
  }
}
 801d2fe:	bf00      	nop
 801d300:	3708      	adds	r7, #8
 801d302:	46bd      	mov	sp, r7
 801d304:	bd80      	pop	{r7, pc}
 801d306:	bf00      	nop
 801d308:	0802f820 	.word	0x0802f820
 801d30c:	0802fe0c 	.word	0x0802fe0c
 801d310:	0802f864 	.word	0x0802f864

0801d314 <tcp_accept>:
 * @param accept callback function to call for this pcb when LISTENing
 *        connection has been connected to another host
 */
void
tcp_accept(struct tcp_pcb *pcb, tcp_accept_fn accept)
{
 801d314:	b580      	push	{r7, lr}
 801d316:	b084      	sub	sp, #16
 801d318:	af00      	add	r7, sp, #0
 801d31a:	6078      	str	r0, [r7, #4]
 801d31c:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT_CORE_LOCKED();
 801d31e:	f7f3 ff71 	bl	8011204 <sys_check_core_locking>
  if ((pcb != NULL) && (pcb->state == LISTEN)) {
 801d322:	687b      	ldr	r3, [r7, #4]
 801d324:	2b00      	cmp	r3, #0
 801d326:	d008      	beq.n	801d33a <tcp_accept+0x26>
 801d328:	687b      	ldr	r3, [r7, #4]
 801d32a:	7d1b      	ldrb	r3, [r3, #20]
 801d32c:	2b01      	cmp	r3, #1
 801d32e:	d104      	bne.n	801d33a <tcp_accept+0x26>
    struct tcp_pcb_listen *lpcb = (struct tcp_pcb_listen *)pcb;
 801d330:	687b      	ldr	r3, [r7, #4]
 801d332:	60fb      	str	r3, [r7, #12]
    lpcb->accept = accept;
 801d334:	68fb      	ldr	r3, [r7, #12]
 801d336:	683a      	ldr	r2, [r7, #0]
 801d338:	619a      	str	r2, [r3, #24]
  }
}
 801d33a:	bf00      	nop
 801d33c:	3710      	adds	r7, #16
 801d33e:	46bd      	mov	sp, r7
 801d340:	bd80      	pop	{r7, pc}
	...

0801d344 <tcp_poll>:
 * the application may use the polling functionality to call tcp_write()
 * again when the connection has been idle for a while.
 */
void
tcp_poll(struct tcp_pcb *pcb, tcp_poll_fn poll, u8_t interval)
{
 801d344:	b580      	push	{r7, lr}
 801d346:	b084      	sub	sp, #16
 801d348:	af00      	add	r7, sp, #0
 801d34a:	60f8      	str	r0, [r7, #12]
 801d34c:	60b9      	str	r1, [r7, #8]
 801d34e:	4613      	mov	r3, r2
 801d350:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT_CORE_LOCKED();
 801d352:	f7f3 ff57 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("tcp_poll: invalid pcb", pcb != NULL, return);
 801d356:	68fb      	ldr	r3, [r7, #12]
 801d358:	2b00      	cmp	r3, #0
 801d35a:	d107      	bne.n	801d36c <tcp_poll+0x28>
 801d35c:	4b0e      	ldr	r3, [pc, #56]	@ (801d398 <tcp_poll+0x54>)
 801d35e:	f640 023d 	movw	r2, #2109	@ 0x83d
 801d362:	490e      	ldr	r1, [pc, #56]	@ (801d39c <tcp_poll+0x58>)
 801d364:	480e      	ldr	r0, [pc, #56]	@ (801d3a0 <tcp_poll+0x5c>)
 801d366:	f00d fb79 	bl	802aa5c <iprintf>
 801d36a:	e011      	b.n	801d390 <tcp_poll+0x4c>
  LWIP_ASSERT("invalid socket state for poll", pcb->state != LISTEN);
 801d36c:	68fb      	ldr	r3, [r7, #12]
 801d36e:	7d1b      	ldrb	r3, [r3, #20]
 801d370:	2b01      	cmp	r3, #1
 801d372:	d106      	bne.n	801d382 <tcp_poll+0x3e>
 801d374:	4b08      	ldr	r3, [pc, #32]	@ (801d398 <tcp_poll+0x54>)
 801d376:	f640 023e 	movw	r2, #2110	@ 0x83e
 801d37a:	490a      	ldr	r1, [pc, #40]	@ (801d3a4 <tcp_poll+0x60>)
 801d37c:	4808      	ldr	r0, [pc, #32]	@ (801d3a0 <tcp_poll+0x5c>)
 801d37e:	f00d fb6d 	bl	802aa5c <iprintf>

#if LWIP_CALLBACK_API
  pcb->poll = poll;
 801d382:	68fb      	ldr	r3, [r7, #12]
 801d384:	68ba      	ldr	r2, [r7, #8]
 801d386:	f8c3 208c 	str.w	r2, [r3, #140]	@ 0x8c
#else /* LWIP_CALLBACK_API */
  LWIP_UNUSED_ARG(poll);
#endif /* LWIP_CALLBACK_API */
  pcb->pollinterval = interval;
 801d38a:	68fb      	ldr	r3, [r7, #12]
 801d38c:	79fa      	ldrb	r2, [r7, #7]
 801d38e:	775a      	strb	r2, [r3, #29]
}
 801d390:	3710      	adds	r7, #16
 801d392:	46bd      	mov	sp, r7
 801d394:	bd80      	pop	{r7, pc}
 801d396:	bf00      	nop
 801d398:	0802f820 	.word	0x0802f820
 801d39c:	0802fe34 	.word	0x0802fe34
 801d3a0:	0802f864 	.word	0x0802f864
 801d3a4:	0802fe4c 	.word	0x0802fe4c

0801d3a8 <tcp_pcb_purge>:
 *
 * @param pcb tcp_pcb to purge. The pcb itself is not deallocated!
 */
void
tcp_pcb_purge(struct tcp_pcb *pcb)
{
 801d3a8:	b580      	push	{r7, lr}
 801d3aa:	b082      	sub	sp, #8
 801d3ac:	af00      	add	r7, sp, #0
 801d3ae:	6078      	str	r0, [r7, #4]
  LWIP_ERROR("tcp_pcb_purge: invalid pcb", pcb != NULL, return);
 801d3b0:	687b      	ldr	r3, [r7, #4]
 801d3b2:	2b00      	cmp	r3, #0
 801d3b4:	d107      	bne.n	801d3c6 <tcp_pcb_purge+0x1e>
 801d3b6:	4b21      	ldr	r3, [pc, #132]	@ (801d43c <tcp_pcb_purge+0x94>)
 801d3b8:	f640 0251 	movw	r2, #2129	@ 0x851
 801d3bc:	4920      	ldr	r1, [pc, #128]	@ (801d440 <tcp_pcb_purge+0x98>)
 801d3be:	4821      	ldr	r0, [pc, #132]	@ (801d444 <tcp_pcb_purge+0x9c>)
 801d3c0:	f00d fb4c 	bl	802aa5c <iprintf>
 801d3c4:	e037      	b.n	801d436 <tcp_pcb_purge+0x8e>

  if (pcb->state != CLOSED &&
 801d3c6:	687b      	ldr	r3, [r7, #4]
 801d3c8:	7d1b      	ldrb	r3, [r3, #20]
 801d3ca:	2b00      	cmp	r3, #0
 801d3cc:	d033      	beq.n	801d436 <tcp_pcb_purge+0x8e>
      pcb->state != TIME_WAIT &&
 801d3ce:	687b      	ldr	r3, [r7, #4]
 801d3d0:	7d1b      	ldrb	r3, [r3, #20]
  if (pcb->state != CLOSED &&
 801d3d2:	2b0a      	cmp	r3, #10
 801d3d4:	d02f      	beq.n	801d436 <tcp_pcb_purge+0x8e>
      pcb->state != LISTEN) {
 801d3d6:	687b      	ldr	r3, [r7, #4]
 801d3d8:	7d1b      	ldrb	r3, [r3, #20]
      pcb->state != TIME_WAIT &&
 801d3da:	2b01      	cmp	r3, #1
 801d3dc:	d02b      	beq.n	801d436 <tcp_pcb_purge+0x8e>

    LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n"));

    tcp_backlog_accepted(pcb);

    if (pcb->refused_data != NULL) {
 801d3de:	687b      	ldr	r3, [r7, #4]
 801d3e0:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d3e2:	2b00      	cmp	r3, #0
 801d3e4:	d007      	beq.n	801d3f6 <tcp_pcb_purge+0x4e>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n"));
      pbuf_free(pcb->refused_data);
 801d3e6:	687b      	ldr	r3, [r7, #4]
 801d3e8:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801d3ea:	4618      	mov	r0, r3
 801d3ec:	f7fe f8be 	bl	801b56c <pbuf_free>
      pcb->refused_data = NULL;
 801d3f0:	687b      	ldr	r3, [r7, #4]
 801d3f2:	2200      	movs	r2, #0
 801d3f4:	679a      	str	r2, [r3, #120]	@ 0x78
    }
    if (pcb->unacked != NULL) {
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n"));
    }
#if TCP_QUEUE_OOSEQ
    if (pcb->ooseq != NULL) {
 801d3f6:	687b      	ldr	r3, [r7, #4]
 801d3f8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801d3fa:	2b00      	cmp	r3, #0
 801d3fc:	d002      	beq.n	801d404 <tcp_pcb_purge+0x5c>
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n"));
      tcp_free_ooseq(pcb);
 801d3fe:	6878      	ldr	r0, [r7, #4]
 801d400:	f000 f986 	bl	801d710 <tcp_free_ooseq>
    }
#endif /* TCP_QUEUE_OOSEQ */

    /* Stop the retransmission timer as it will expect data on unacked
       queue if it fires */
    pcb->rtime = -1;
 801d404:	687b      	ldr	r3, [r7, #4]
 801d406:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801d40a:	861a      	strh	r2, [r3, #48]	@ 0x30

    tcp_segs_free(pcb->unsent);
 801d40c:	687b      	ldr	r3, [r7, #4]
 801d40e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801d410:	4618      	mov	r0, r3
 801d412:	f7ff fcef 	bl	801cdf4 <tcp_segs_free>
    tcp_segs_free(pcb->unacked);
 801d416:	687b      	ldr	r3, [r7, #4]
 801d418:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801d41a:	4618      	mov	r0, r3
 801d41c:	f7ff fcea 	bl	801cdf4 <tcp_segs_free>
    pcb->unacked = pcb->unsent = NULL;
 801d420:	687b      	ldr	r3, [r7, #4]
 801d422:	2200      	movs	r2, #0
 801d424:	66da      	str	r2, [r3, #108]	@ 0x6c
 801d426:	687b      	ldr	r3, [r7, #4]
 801d428:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 801d42a:	687b      	ldr	r3, [r7, #4]
 801d42c:	671a      	str	r2, [r3, #112]	@ 0x70
#if TCP_OVERSIZE
    pcb->unsent_oversize = 0;
 801d42e:	687b      	ldr	r3, [r7, #4]
 801d430:	2200      	movs	r2, #0
 801d432:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */
  }
}
 801d436:	3708      	adds	r7, #8
 801d438:	46bd      	mov	sp, r7
 801d43a:	bd80      	pop	{r7, pc}
 801d43c:	0802f820 	.word	0x0802f820
 801d440:	0802fe6c 	.word	0x0802fe6c
 801d444:	0802f864 	.word	0x0802f864

0801d448 <tcp_pcb_remove>:
 * @param pcblist PCB list to purge.
 * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated!
 */
void
tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb)
{
 801d448:	b580      	push	{r7, lr}
 801d44a:	b084      	sub	sp, #16
 801d44c:	af00      	add	r7, sp, #0
 801d44e:	6078      	str	r0, [r7, #4]
 801d450:	6039      	str	r1, [r7, #0]
  LWIP_ASSERT("tcp_pcb_remove: invalid pcb", pcb != NULL);
 801d452:	683b      	ldr	r3, [r7, #0]
 801d454:	2b00      	cmp	r3, #0
 801d456:	d106      	bne.n	801d466 <tcp_pcb_remove+0x1e>
 801d458:	4b3e      	ldr	r3, [pc, #248]	@ (801d554 <tcp_pcb_remove+0x10c>)
 801d45a:	f640 0283 	movw	r2, #2179	@ 0x883
 801d45e:	493e      	ldr	r1, [pc, #248]	@ (801d558 <tcp_pcb_remove+0x110>)
 801d460:	483e      	ldr	r0, [pc, #248]	@ (801d55c <tcp_pcb_remove+0x114>)
 801d462:	f00d fafb 	bl	802aa5c <iprintf>
  LWIP_ASSERT("tcp_pcb_remove: invalid pcblist", pcblist != NULL);
 801d466:	687b      	ldr	r3, [r7, #4]
 801d468:	2b00      	cmp	r3, #0
 801d46a:	d106      	bne.n	801d47a <tcp_pcb_remove+0x32>
 801d46c:	4b39      	ldr	r3, [pc, #228]	@ (801d554 <tcp_pcb_remove+0x10c>)
 801d46e:	f640 0284 	movw	r2, #2180	@ 0x884
 801d472:	493b      	ldr	r1, [pc, #236]	@ (801d560 <tcp_pcb_remove+0x118>)
 801d474:	4839      	ldr	r0, [pc, #228]	@ (801d55c <tcp_pcb_remove+0x114>)
 801d476:	f00d faf1 	bl	802aa5c <iprintf>

  TCP_RMV(pcblist, pcb);
 801d47a:	687b      	ldr	r3, [r7, #4]
 801d47c:	681b      	ldr	r3, [r3, #0]
 801d47e:	683a      	ldr	r2, [r7, #0]
 801d480:	429a      	cmp	r2, r3
 801d482:	d105      	bne.n	801d490 <tcp_pcb_remove+0x48>
 801d484:	687b      	ldr	r3, [r7, #4]
 801d486:	681b      	ldr	r3, [r3, #0]
 801d488:	68da      	ldr	r2, [r3, #12]
 801d48a:	687b      	ldr	r3, [r7, #4]
 801d48c:	601a      	str	r2, [r3, #0]
 801d48e:	e013      	b.n	801d4b8 <tcp_pcb_remove+0x70>
 801d490:	687b      	ldr	r3, [r7, #4]
 801d492:	681b      	ldr	r3, [r3, #0]
 801d494:	60fb      	str	r3, [r7, #12]
 801d496:	e00c      	b.n	801d4b2 <tcp_pcb_remove+0x6a>
 801d498:	68fb      	ldr	r3, [r7, #12]
 801d49a:	68db      	ldr	r3, [r3, #12]
 801d49c:	683a      	ldr	r2, [r7, #0]
 801d49e:	429a      	cmp	r2, r3
 801d4a0:	d104      	bne.n	801d4ac <tcp_pcb_remove+0x64>
 801d4a2:	683b      	ldr	r3, [r7, #0]
 801d4a4:	68da      	ldr	r2, [r3, #12]
 801d4a6:	68fb      	ldr	r3, [r7, #12]
 801d4a8:	60da      	str	r2, [r3, #12]
 801d4aa:	e005      	b.n	801d4b8 <tcp_pcb_remove+0x70>
 801d4ac:	68fb      	ldr	r3, [r7, #12]
 801d4ae:	68db      	ldr	r3, [r3, #12]
 801d4b0:	60fb      	str	r3, [r7, #12]
 801d4b2:	68fb      	ldr	r3, [r7, #12]
 801d4b4:	2b00      	cmp	r3, #0
 801d4b6:	d1ef      	bne.n	801d498 <tcp_pcb_remove+0x50>
 801d4b8:	683b      	ldr	r3, [r7, #0]
 801d4ba:	2200      	movs	r2, #0
 801d4bc:	60da      	str	r2, [r3, #12]

  tcp_pcb_purge(pcb);
 801d4be:	6838      	ldr	r0, [r7, #0]
 801d4c0:	f7ff ff72 	bl	801d3a8 <tcp_pcb_purge>

  /* if there is an outstanding delayed ACKs, send it */
  if ((pcb->state != TIME_WAIT) &&
 801d4c4:	683b      	ldr	r3, [r7, #0]
 801d4c6:	7d1b      	ldrb	r3, [r3, #20]
 801d4c8:	2b0a      	cmp	r3, #10
 801d4ca:	d013      	beq.n	801d4f4 <tcp_pcb_remove+0xac>
      (pcb->state != LISTEN) &&
 801d4cc:	683b      	ldr	r3, [r7, #0]
 801d4ce:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != TIME_WAIT) &&
 801d4d0:	2b01      	cmp	r3, #1
 801d4d2:	d00f      	beq.n	801d4f4 <tcp_pcb_remove+0xac>
      (pcb->flags & TF_ACK_DELAY)) {
 801d4d4:	683b      	ldr	r3, [r7, #0]
 801d4d6:	8b5b      	ldrh	r3, [r3, #26]
 801d4d8:	f003 0301 	and.w	r3, r3, #1
      (pcb->state != LISTEN) &&
 801d4dc:	2b00      	cmp	r3, #0
 801d4de:	d009      	beq.n	801d4f4 <tcp_pcb_remove+0xac>
    tcp_ack_now(pcb);
 801d4e0:	683b      	ldr	r3, [r7, #0]
 801d4e2:	8b5b      	ldrh	r3, [r3, #26]
 801d4e4:	f043 0302 	orr.w	r3, r3, #2
 801d4e8:	b29a      	uxth	r2, r3
 801d4ea:	683b      	ldr	r3, [r7, #0]
 801d4ec:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801d4ee:	6838      	ldr	r0, [r7, #0]
 801d4f0:	f003 fc28 	bl	8020d44 <tcp_output>
  }

  if (pcb->state != LISTEN) {
 801d4f4:	683b      	ldr	r3, [r7, #0]
 801d4f6:	7d1b      	ldrb	r3, [r3, #20]
 801d4f8:	2b01      	cmp	r3, #1
 801d4fa:	d020      	beq.n	801d53e <tcp_pcb_remove+0xf6>
    LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL);
 801d4fc:	683b      	ldr	r3, [r7, #0]
 801d4fe:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801d500:	2b00      	cmp	r3, #0
 801d502:	d006      	beq.n	801d512 <tcp_pcb_remove+0xca>
 801d504:	4b13      	ldr	r3, [pc, #76]	@ (801d554 <tcp_pcb_remove+0x10c>)
 801d506:	f640 0293 	movw	r2, #2195	@ 0x893
 801d50a:	4916      	ldr	r1, [pc, #88]	@ (801d564 <tcp_pcb_remove+0x11c>)
 801d50c:	4813      	ldr	r0, [pc, #76]	@ (801d55c <tcp_pcb_remove+0x114>)
 801d50e:	f00d faa5 	bl	802aa5c <iprintf>
    LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL);
 801d512:	683b      	ldr	r3, [r7, #0]
 801d514:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801d516:	2b00      	cmp	r3, #0
 801d518:	d006      	beq.n	801d528 <tcp_pcb_remove+0xe0>
 801d51a:	4b0e      	ldr	r3, [pc, #56]	@ (801d554 <tcp_pcb_remove+0x10c>)
 801d51c:	f640 0294 	movw	r2, #2196	@ 0x894
 801d520:	4911      	ldr	r1, [pc, #68]	@ (801d568 <tcp_pcb_remove+0x120>)
 801d522:	480e      	ldr	r0, [pc, #56]	@ (801d55c <tcp_pcb_remove+0x114>)
 801d524:	f00d fa9a 	bl	802aa5c <iprintf>
#if TCP_QUEUE_OOSEQ
    LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL);
 801d528:	683b      	ldr	r3, [r7, #0]
 801d52a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801d52c:	2b00      	cmp	r3, #0
 801d52e:	d006      	beq.n	801d53e <tcp_pcb_remove+0xf6>
 801d530:	4b08      	ldr	r3, [pc, #32]	@ (801d554 <tcp_pcb_remove+0x10c>)
 801d532:	f640 0296 	movw	r2, #2198	@ 0x896
 801d536:	490d      	ldr	r1, [pc, #52]	@ (801d56c <tcp_pcb_remove+0x124>)
 801d538:	4808      	ldr	r0, [pc, #32]	@ (801d55c <tcp_pcb_remove+0x114>)
 801d53a:	f00d fa8f 	bl	802aa5c <iprintf>
#endif /* TCP_QUEUE_OOSEQ */
  }

  pcb->state = CLOSED;
 801d53e:	683b      	ldr	r3, [r7, #0]
 801d540:	2200      	movs	r2, #0
 801d542:	751a      	strb	r2, [r3, #20]
  /* reset the local port to prevent the pcb from being 'bound' */
  pcb->local_port = 0;
 801d544:	683b      	ldr	r3, [r7, #0]
 801d546:	2200      	movs	r2, #0
 801d548:	82da      	strh	r2, [r3, #22]

  LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane());
}
 801d54a:	bf00      	nop
 801d54c:	3710      	adds	r7, #16
 801d54e:	46bd      	mov	sp, r7
 801d550:	bd80      	pop	{r7, pc}
 801d552:	bf00      	nop
 801d554:	0802f820 	.word	0x0802f820
 801d558:	0802fe88 	.word	0x0802fe88
 801d55c:	0802f864 	.word	0x0802f864
 801d560:	0802fea4 	.word	0x0802fea4
 801d564:	0802fec4 	.word	0x0802fec4
 801d568:	0802fedc 	.word	0x0802fedc
 801d56c:	0802fef8 	.word	0x0802fef8

0801d570 <tcp_next_iss>:
 *
 * @return u32_t pseudo random sequence number
 */
u32_t
tcp_next_iss(struct tcp_pcb *pcb)
{
 801d570:	b580      	push	{r7, lr}
 801d572:	b082      	sub	sp, #8
 801d574:	af00      	add	r7, sp, #0
 801d576:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
  return LWIP_HOOK_TCP_ISN(&pcb->local_ip, pcb->local_port, &pcb->remote_ip, pcb->remote_port);
#else /* LWIP_HOOK_TCP_ISN */
  static u32_t iss = 6510;

  LWIP_ASSERT("tcp_next_iss: invalid pcb", pcb != NULL);
 801d578:	687b      	ldr	r3, [r7, #4]
 801d57a:	2b00      	cmp	r3, #0
 801d57c:	d106      	bne.n	801d58c <tcp_next_iss+0x1c>
 801d57e:	4b0a      	ldr	r3, [pc, #40]	@ (801d5a8 <tcp_next_iss+0x38>)
 801d580:	f640 02af 	movw	r2, #2223	@ 0x8af
 801d584:	4909      	ldr	r1, [pc, #36]	@ (801d5ac <tcp_next_iss+0x3c>)
 801d586:	480a      	ldr	r0, [pc, #40]	@ (801d5b0 <tcp_next_iss+0x40>)
 801d588:	f00d fa68 	bl	802aa5c <iprintf>
  LWIP_UNUSED_ARG(pcb);

  iss += tcp_ticks;       /* XXX */
 801d58c:	4b09      	ldr	r3, [pc, #36]	@ (801d5b4 <tcp_next_iss+0x44>)
 801d58e:	681a      	ldr	r2, [r3, #0]
 801d590:	4b09      	ldr	r3, [pc, #36]	@ (801d5b8 <tcp_next_iss+0x48>)
 801d592:	681b      	ldr	r3, [r3, #0]
 801d594:	4413      	add	r3, r2
 801d596:	4a07      	ldr	r2, [pc, #28]	@ (801d5b4 <tcp_next_iss+0x44>)
 801d598:	6013      	str	r3, [r2, #0]
  return iss;
 801d59a:	4b06      	ldr	r3, [pc, #24]	@ (801d5b4 <tcp_next_iss+0x44>)
 801d59c:	681b      	ldr	r3, [r3, #0]
#endif /* LWIP_HOOK_TCP_ISN */
}
 801d59e:	4618      	mov	r0, r3
 801d5a0:	3708      	adds	r7, #8
 801d5a2:	46bd      	mov	sp, r7
 801d5a4:	bd80      	pop	{r7, pc}
 801d5a6:	bf00      	nop
 801d5a8:	0802f820 	.word	0x0802f820
 801d5ac:	0802ff10 	.word	0x0802ff10
 801d5b0:	0802f864 	.word	0x0802f864
 801d5b4:	24000050 	.word	0x24000050
 801d5b8:	2402afa8 	.word	0x2402afa8

0801d5bc <tcp_eff_send_mss_netif>:
 * by calculating the minimum of TCP_MSS and the mtu (if set) of the target
 * netif (if not NULL).
 */
u16_t
tcp_eff_send_mss_netif(u16_t sendmss, struct netif *outif, const ip_addr_t *dest)
{
 801d5bc:	b580      	push	{r7, lr}
 801d5be:	b086      	sub	sp, #24
 801d5c0:	af00      	add	r7, sp, #0
 801d5c2:	4603      	mov	r3, r0
 801d5c4:	60b9      	str	r1, [r7, #8]
 801d5c6:	607a      	str	r2, [r7, #4]
 801d5c8:	81fb      	strh	r3, [r7, #14]
  u16_t mss_s;
  u16_t mtu;

  LWIP_UNUSED_ARG(dest); /* in case IPv6 is disabled */

  LWIP_ASSERT("tcp_eff_send_mss_netif: invalid dst_ip", dest != NULL);
 801d5ca:	687b      	ldr	r3, [r7, #4]
 801d5cc:	2b00      	cmp	r3, #0
 801d5ce:	d106      	bne.n	801d5de <tcp_eff_send_mss_netif+0x22>
 801d5d0:	4b14      	ldr	r3, [pc, #80]	@ (801d624 <tcp_eff_send_mss_netif+0x68>)
 801d5d2:	f640 02c5 	movw	r2, #2245	@ 0x8c5
 801d5d6:	4914      	ldr	r1, [pc, #80]	@ (801d628 <tcp_eff_send_mss_netif+0x6c>)
 801d5d8:	4814      	ldr	r0, [pc, #80]	@ (801d62c <tcp_eff_send_mss_netif+0x70>)
 801d5da:	f00d fa3f 	bl	802aa5c <iprintf>
  else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
  {
    if (outif == NULL) {
 801d5de:	68bb      	ldr	r3, [r7, #8]
 801d5e0:	2b00      	cmp	r3, #0
 801d5e2:	d101      	bne.n	801d5e8 <tcp_eff_send_mss_netif+0x2c>
      return sendmss;
 801d5e4:	89fb      	ldrh	r3, [r7, #14]
 801d5e6:	e019      	b.n	801d61c <tcp_eff_send_mss_netif+0x60>
    }
    mtu = outif->mtu;
 801d5e8:	68bb      	ldr	r3, [r7, #8]
 801d5ea:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801d5ec:	82fb      	strh	r3, [r7, #22]
  }
#endif /* LWIP_IPV4 */

  if (mtu != 0) {
 801d5ee:	8afb      	ldrh	r3, [r7, #22]
 801d5f0:	2b00      	cmp	r3, #0
 801d5f2:	d012      	beq.n	801d61a <tcp_eff_send_mss_netif+0x5e>
    else
#endif /* LWIP_IPV4 */
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    {
      offset = IP_HLEN + TCP_HLEN;
 801d5f4:	2328      	movs	r3, #40	@ 0x28
 801d5f6:	82bb      	strh	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
    mss_s = (mtu > offset) ? (u16_t)(mtu - offset) : 0;
 801d5f8:	8afa      	ldrh	r2, [r7, #22]
 801d5fa:	8abb      	ldrh	r3, [r7, #20]
 801d5fc:	429a      	cmp	r2, r3
 801d5fe:	d904      	bls.n	801d60a <tcp_eff_send_mss_netif+0x4e>
 801d600:	8afa      	ldrh	r2, [r7, #22]
 801d602:	8abb      	ldrh	r3, [r7, #20]
 801d604:	1ad3      	subs	r3, r2, r3
 801d606:	b29b      	uxth	r3, r3
 801d608:	e000      	b.n	801d60c <tcp_eff_send_mss_netif+0x50>
 801d60a:	2300      	movs	r3, #0
 801d60c:	827b      	strh	r3, [r7, #18]
    /* RFC 1122, chap 4.2.2.6:
     * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize
     * We correct for TCP options in tcp_write(), and don't support IP options.
     */
    sendmss = LWIP_MIN(sendmss, mss_s);
 801d60e:	8a7a      	ldrh	r2, [r7, #18]
 801d610:	89fb      	ldrh	r3, [r7, #14]
 801d612:	4293      	cmp	r3, r2
 801d614:	bf28      	it	cs
 801d616:	4613      	movcs	r3, r2
 801d618:	81fb      	strh	r3, [r7, #14]
  }
  return sendmss;
 801d61a:	89fb      	ldrh	r3, [r7, #14]
}
 801d61c:	4618      	mov	r0, r3
 801d61e:	3718      	adds	r7, #24
 801d620:	46bd      	mov	sp, r7
 801d622:	bd80      	pop	{r7, pc}
 801d624:	0802f820 	.word	0x0802f820
 801d628:	0802ff2c 	.word	0x0802ff2c
 801d62c:	0802f864 	.word	0x0802f864

0801d630 <tcp_netif_ip_addr_changed_pcblist>:
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

/** Helper function for tcp_netif_ip_addr_changed() that iterates a pcb list */
static void
tcp_netif_ip_addr_changed_pcblist(const ip_addr_t *old_addr, struct tcp_pcb *pcb_list)
{
 801d630:	b580      	push	{r7, lr}
 801d632:	b084      	sub	sp, #16
 801d634:	af00      	add	r7, sp, #0
 801d636:	6078      	str	r0, [r7, #4]
 801d638:	6039      	str	r1, [r7, #0]
  struct tcp_pcb *pcb;
  pcb = pcb_list;
 801d63a:	683b      	ldr	r3, [r7, #0]
 801d63c:	60fb      	str	r3, [r7, #12]

  LWIP_ASSERT("tcp_netif_ip_addr_changed_pcblist: invalid old_addr", old_addr != NULL);
 801d63e:	687b      	ldr	r3, [r7, #4]
 801d640:	2b00      	cmp	r3, #0
 801d642:	d119      	bne.n	801d678 <tcp_netif_ip_addr_changed_pcblist+0x48>
 801d644:	4b10      	ldr	r3, [pc, #64]	@ (801d688 <tcp_netif_ip_addr_changed_pcblist+0x58>)
 801d646:	f44f 6210 	mov.w	r2, #2304	@ 0x900
 801d64a:	4910      	ldr	r1, [pc, #64]	@ (801d68c <tcp_netif_ip_addr_changed_pcblist+0x5c>)
 801d64c:	4810      	ldr	r0, [pc, #64]	@ (801d690 <tcp_netif_ip_addr_changed_pcblist+0x60>)
 801d64e:	f00d fa05 	bl	802aa5c <iprintf>

  while (pcb != NULL) {
 801d652:	e011      	b.n	801d678 <tcp_netif_ip_addr_changed_pcblist+0x48>
    /* PCB bound to current local interface address? */
    if (ip_addr_cmp(&pcb->local_ip, old_addr)
 801d654:	68fb      	ldr	r3, [r7, #12]
 801d656:	681a      	ldr	r2, [r3, #0]
 801d658:	687b      	ldr	r3, [r7, #4]
 801d65a:	681b      	ldr	r3, [r3, #0]
 801d65c:	429a      	cmp	r2, r3
 801d65e:	d108      	bne.n	801d672 <tcp_netif_ip_addr_changed_pcblist+0x42>
        /* connections to link-local addresses must persist (RFC3927 ch. 1.9) */
        && (!IP_IS_V4_VAL(pcb->local_ip) || !ip4_addr_islinklocal(ip_2_ip4(&pcb->local_ip)))
#endif /* LWIP_AUTOIP */
       ) {
      /* this connection must be aborted */
      struct tcp_pcb *next = pcb->next;
 801d660:	68fb      	ldr	r3, [r7, #12]
 801d662:	68db      	ldr	r3, [r3, #12]
 801d664:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb));
      tcp_abort(pcb);
 801d666:	68f8      	ldr	r0, [r7, #12]
 801d668:	f7fe fd86 	bl	801c178 <tcp_abort>
      pcb = next;
 801d66c:	68bb      	ldr	r3, [r7, #8]
 801d66e:	60fb      	str	r3, [r7, #12]
 801d670:	e002      	b.n	801d678 <tcp_netif_ip_addr_changed_pcblist+0x48>
    } else {
      pcb = pcb->next;
 801d672:	68fb      	ldr	r3, [r7, #12]
 801d674:	68db      	ldr	r3, [r3, #12]
 801d676:	60fb      	str	r3, [r7, #12]
  while (pcb != NULL) {
 801d678:	68fb      	ldr	r3, [r7, #12]
 801d67a:	2b00      	cmp	r3, #0
 801d67c:	d1ea      	bne.n	801d654 <tcp_netif_ip_addr_changed_pcblist+0x24>
    }
  }
}
 801d67e:	bf00      	nop
 801d680:	bf00      	nop
 801d682:	3710      	adds	r7, #16
 801d684:	46bd      	mov	sp, r7
 801d686:	bd80      	pop	{r7, pc}
 801d688:	0802f820 	.word	0x0802f820
 801d68c:	0802ff54 	.word	0x0802ff54
 801d690:	0802f864 	.word	0x0802f864

0801d694 <tcp_netif_ip_addr_changed>:
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change or NULL if netif has been removed
 */
void
tcp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 801d694:	b580      	push	{r7, lr}
 801d696:	b084      	sub	sp, #16
 801d698:	af00      	add	r7, sp, #0
 801d69a:	6078      	str	r0, [r7, #4]
 801d69c:	6039      	str	r1, [r7, #0]
  struct tcp_pcb_listen *lpcb;

  if (!ip_addr_isany(old_addr)) {
 801d69e:	687b      	ldr	r3, [r7, #4]
 801d6a0:	2b00      	cmp	r3, #0
 801d6a2:	d02a      	beq.n	801d6fa <tcp_netif_ip_addr_changed+0x66>
 801d6a4:	687b      	ldr	r3, [r7, #4]
 801d6a6:	681b      	ldr	r3, [r3, #0]
 801d6a8:	2b00      	cmp	r3, #0
 801d6aa:	d026      	beq.n	801d6fa <tcp_netif_ip_addr_changed+0x66>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_active_pcbs);
 801d6ac:	4b15      	ldr	r3, [pc, #84]	@ (801d704 <tcp_netif_ip_addr_changed+0x70>)
 801d6ae:	681b      	ldr	r3, [r3, #0]
 801d6b0:	4619      	mov	r1, r3
 801d6b2:	6878      	ldr	r0, [r7, #4]
 801d6b4:	f7ff ffbc 	bl	801d630 <tcp_netif_ip_addr_changed_pcblist>
    tcp_netif_ip_addr_changed_pcblist(old_addr, tcp_bound_pcbs);
 801d6b8:	4b13      	ldr	r3, [pc, #76]	@ (801d708 <tcp_netif_ip_addr_changed+0x74>)
 801d6ba:	681b      	ldr	r3, [r3, #0]
 801d6bc:	4619      	mov	r1, r3
 801d6be:	6878      	ldr	r0, [r7, #4]
 801d6c0:	f7ff ffb6 	bl	801d630 <tcp_netif_ip_addr_changed_pcblist>

    if (!ip_addr_isany(new_addr)) {
 801d6c4:	683b      	ldr	r3, [r7, #0]
 801d6c6:	2b00      	cmp	r3, #0
 801d6c8:	d017      	beq.n	801d6fa <tcp_netif_ip_addr_changed+0x66>
 801d6ca:	683b      	ldr	r3, [r7, #0]
 801d6cc:	681b      	ldr	r3, [r3, #0]
 801d6ce:	2b00      	cmp	r3, #0
 801d6d0:	d013      	beq.n	801d6fa <tcp_netif_ip_addr_changed+0x66>
      /* PCB bound to current local interface address? */
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801d6d2:	4b0e      	ldr	r3, [pc, #56]	@ (801d70c <tcp_netif_ip_addr_changed+0x78>)
 801d6d4:	681b      	ldr	r3, [r3, #0]
 801d6d6:	60fb      	str	r3, [r7, #12]
 801d6d8:	e00c      	b.n	801d6f4 <tcp_netif_ip_addr_changed+0x60>
        /* PCB bound to current local interface address? */
        if (ip_addr_cmp(&lpcb->local_ip, old_addr)) {
 801d6da:	68fb      	ldr	r3, [r7, #12]
 801d6dc:	681a      	ldr	r2, [r3, #0]
 801d6de:	687b      	ldr	r3, [r7, #4]
 801d6e0:	681b      	ldr	r3, [r3, #0]
 801d6e2:	429a      	cmp	r2, r3
 801d6e4:	d103      	bne.n	801d6ee <tcp_netif_ip_addr_changed+0x5a>
          /* The PCB is listening to the old ipaddr and
            * is set to listen to the new one instead */
          ip_addr_copy(lpcb->local_ip, *new_addr);
 801d6e6:	683b      	ldr	r3, [r7, #0]
 801d6e8:	681a      	ldr	r2, [r3, #0]
 801d6ea:	68fb      	ldr	r3, [r7, #12]
 801d6ec:	601a      	str	r2, [r3, #0]
      for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801d6ee:	68fb      	ldr	r3, [r7, #12]
 801d6f0:	68db      	ldr	r3, [r3, #12]
 801d6f2:	60fb      	str	r3, [r7, #12]
 801d6f4:	68fb      	ldr	r3, [r7, #12]
 801d6f6:	2b00      	cmp	r3, #0
 801d6f8:	d1ef      	bne.n	801d6da <tcp_netif_ip_addr_changed+0x46>
        }
      }
    }
  }
}
 801d6fa:	bf00      	nop
 801d6fc:	3710      	adds	r7, #16
 801d6fe:	46bd      	mov	sp, r7
 801d700:	bd80      	pop	{r7, pc}
 801d702:	bf00      	nop
 801d704:	2402afb4 	.word	0x2402afb4
 801d708:	2402afac 	.word	0x2402afac
 801d70c:	2402afb0 	.word	0x2402afb0

0801d710 <tcp_free_ooseq>:

#if TCP_QUEUE_OOSEQ
/* Free all ooseq pbufs (and possibly reset SACK state) */
void
tcp_free_ooseq(struct tcp_pcb *pcb)
{
 801d710:	b580      	push	{r7, lr}
 801d712:	b082      	sub	sp, #8
 801d714:	af00      	add	r7, sp, #0
 801d716:	6078      	str	r0, [r7, #4]
  if (pcb->ooseq) {
 801d718:	687b      	ldr	r3, [r7, #4]
 801d71a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801d71c:	2b00      	cmp	r3, #0
 801d71e:	d007      	beq.n	801d730 <tcp_free_ooseq+0x20>
    tcp_segs_free(pcb->ooseq);
 801d720:	687b      	ldr	r3, [r7, #4]
 801d722:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801d724:	4618      	mov	r0, r3
 801d726:	f7ff fb65 	bl	801cdf4 <tcp_segs_free>
    pcb->ooseq = NULL;
 801d72a:	687b      	ldr	r3, [r7, #4]
 801d72c:	2200      	movs	r2, #0
 801d72e:	675a      	str	r2, [r3, #116]	@ 0x74
#if LWIP_TCP_SACK_OUT
    memset(pcb->rcv_sacks, 0, sizeof(pcb->rcv_sacks));
#endif /* LWIP_TCP_SACK_OUT */
  }
}
 801d730:	bf00      	nop
 801d732:	3708      	adds	r7, #8
 801d734:	46bd      	mov	sp, r7
 801d736:	bd80      	pop	{r7, pc}

0801d738 <tcp_input>:
 * @param p received TCP segment to process (p->payload pointing to the TCP header)
 * @param inp network interface on which this segment was received
 */
void
tcp_input(struct pbuf *p, struct netif *inp)
{
 801d738:	b590      	push	{r4, r7, lr}
 801d73a:	b08d      	sub	sp, #52	@ 0x34
 801d73c:	af04      	add	r7, sp, #16
 801d73e:	6078      	str	r0, [r7, #4]
 801d740:	6039      	str	r1, [r7, #0]
#endif /* SO_REUSE */
  u8_t hdrlen_bytes;
  err_t err;

  LWIP_UNUSED_ARG(inp);
  LWIP_ASSERT_CORE_LOCKED();
 801d742:	f7f3 fd5f 	bl	8011204 <sys_check_core_locking>
  LWIP_ASSERT("tcp_input: invalid pbuf", p != NULL);
 801d746:	687b      	ldr	r3, [r7, #4]
 801d748:	2b00      	cmp	r3, #0
 801d74a:	d105      	bne.n	801d758 <tcp_input+0x20>
 801d74c:	4b9b      	ldr	r3, [pc, #620]	@ (801d9bc <tcp_input+0x284>)
 801d74e:	2283      	movs	r2, #131	@ 0x83
 801d750:	499b      	ldr	r1, [pc, #620]	@ (801d9c0 <tcp_input+0x288>)
 801d752:	489c      	ldr	r0, [pc, #624]	@ (801d9c4 <tcp_input+0x28c>)
 801d754:	f00d f982 	bl	802aa5c <iprintf>
  PERF_START;

  TCP_STATS_INC(tcp.recv);
  MIB2_STATS_INC(mib2.tcpinsegs);

  tcphdr = (struct tcp_hdr *)p->payload;
 801d758:	687b      	ldr	r3, [r7, #4]
 801d75a:	685b      	ldr	r3, [r3, #4]
 801d75c:	4a9a      	ldr	r2, [pc, #616]	@ (801d9c8 <tcp_input+0x290>)
 801d75e:	6013      	str	r3, [r2, #0]
#if TCP_INPUT_DEBUG
  tcp_debug_print(tcphdr);
#endif

  /* Check that TCP header fits in payload */
  if (p->len < TCP_HLEN) {
 801d760:	687b      	ldr	r3, [r7, #4]
 801d762:	895b      	ldrh	r3, [r3, #10]
 801d764:	2b13      	cmp	r3, #19
 801d766:	f240 83d1 	bls.w	801df0c <tcp_input+0x7d4>
    TCP_STATS_INC(tcp.lenerr);
    goto dropped;
  }

  /* Don't even process incoming broadcasts/multicasts. */
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801d76a:	4b98      	ldr	r3, [pc, #608]	@ (801d9cc <tcp_input+0x294>)
 801d76c:	695b      	ldr	r3, [r3, #20]
 801d76e:	4a97      	ldr	r2, [pc, #604]	@ (801d9cc <tcp_input+0x294>)
 801d770:	6812      	ldr	r2, [r2, #0]
 801d772:	4611      	mov	r1, r2
 801d774:	4618      	mov	r0, r3
 801d776:	f008 fc1b 	bl	8025fb0 <ip4_addr_isbroadcast_u32>
 801d77a:	4603      	mov	r3, r0
 801d77c:	2b00      	cmp	r3, #0
 801d77e:	f040 83c7 	bne.w	801df10 <tcp_input+0x7d8>
      ip_addr_ismulticast(ip_current_dest_addr())) {
 801d782:	4b92      	ldr	r3, [pc, #584]	@ (801d9cc <tcp_input+0x294>)
 801d784:	695b      	ldr	r3, [r3, #20]
 801d786:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif()) ||
 801d78a:	2be0      	cmp	r3, #224	@ 0xe0
 801d78c:	f000 83c0 	beq.w	801df10 <tcp_input+0x7d8>
    }
  }
#endif /* CHECKSUM_CHECK_TCP */

  /* sanity-check header length */
  hdrlen_bytes = TCPH_HDRLEN_BYTES(tcphdr);
 801d790:	4b8d      	ldr	r3, [pc, #564]	@ (801d9c8 <tcp_input+0x290>)
 801d792:	681b      	ldr	r3, [r3, #0]
 801d794:	899b      	ldrh	r3, [r3, #12]
 801d796:	b29b      	uxth	r3, r3
 801d798:	4618      	mov	r0, r3
 801d79a:	f7fc fa05 	bl	8019ba8 <lwip_htons>
 801d79e:	4603      	mov	r3, r0
 801d7a0:	0b1b      	lsrs	r3, r3, #12
 801d7a2:	b29b      	uxth	r3, r3
 801d7a4:	b2db      	uxtb	r3, r3
 801d7a6:	009b      	lsls	r3, r3, #2
 801d7a8:	74bb      	strb	r3, [r7, #18]
  if ((hdrlen_bytes < TCP_HLEN) || (hdrlen_bytes > p->tot_len)) {
 801d7aa:	7cbb      	ldrb	r3, [r7, #18]
 801d7ac:	2b13      	cmp	r3, #19
 801d7ae:	f240 83b1 	bls.w	801df14 <tcp_input+0x7dc>
 801d7b2:	7cbb      	ldrb	r3, [r7, #18]
 801d7b4:	b29a      	uxth	r2, r3
 801d7b6:	687b      	ldr	r3, [r7, #4]
 801d7b8:	891b      	ldrh	r3, [r3, #8]
 801d7ba:	429a      	cmp	r2, r3
 801d7bc:	f200 83aa 	bhi.w	801df14 <tcp_input+0x7dc>
    goto dropped;
  }

  /* Move the payload pointer in the pbuf so that it points to the
     TCP data instead of the TCP header. */
  tcphdr_optlen = (u16_t)(hdrlen_bytes - TCP_HLEN);
 801d7c0:	7cbb      	ldrb	r3, [r7, #18]
 801d7c2:	b29b      	uxth	r3, r3
 801d7c4:	3b14      	subs	r3, #20
 801d7c6:	b29a      	uxth	r2, r3
 801d7c8:	4b81      	ldr	r3, [pc, #516]	@ (801d9d0 <tcp_input+0x298>)
 801d7ca:	801a      	strh	r2, [r3, #0]
  tcphdr_opt2 = NULL;
 801d7cc:	4b81      	ldr	r3, [pc, #516]	@ (801d9d4 <tcp_input+0x29c>)
 801d7ce:	2200      	movs	r2, #0
 801d7d0:	601a      	str	r2, [r3, #0]
  if (p->len >= hdrlen_bytes) {
 801d7d2:	687b      	ldr	r3, [r7, #4]
 801d7d4:	895a      	ldrh	r2, [r3, #10]
 801d7d6:	7cbb      	ldrb	r3, [r7, #18]
 801d7d8:	b29b      	uxth	r3, r3
 801d7da:	429a      	cmp	r2, r3
 801d7dc:	d309      	bcc.n	801d7f2 <tcp_input+0xba>
    /* all options are in the first pbuf */
    tcphdr_opt1len = tcphdr_optlen;
 801d7de:	4b7c      	ldr	r3, [pc, #496]	@ (801d9d0 <tcp_input+0x298>)
 801d7e0:	881a      	ldrh	r2, [r3, #0]
 801d7e2:	4b7d      	ldr	r3, [pc, #500]	@ (801d9d8 <tcp_input+0x2a0>)
 801d7e4:	801a      	strh	r2, [r3, #0]
    pbuf_remove_header(p, hdrlen_bytes); /* cannot fail */
 801d7e6:	7cbb      	ldrb	r3, [r7, #18]
 801d7e8:	4619      	mov	r1, r3
 801d7ea:	6878      	ldr	r0, [r7, #4]
 801d7ec:	f7fd fe06 	bl	801b3fc <pbuf_remove_header>
 801d7f0:	e04e      	b.n	801d890 <tcp_input+0x158>
  } else {
    u16_t opt2len;
    /* TCP header fits into first pbuf, options don't - data is in the next pbuf */
    /* there must be a next pbuf, due to hdrlen_bytes sanity check above */
    LWIP_ASSERT("p->next != NULL", p->next != NULL);
 801d7f2:	687b      	ldr	r3, [r7, #4]
 801d7f4:	681b      	ldr	r3, [r3, #0]
 801d7f6:	2b00      	cmp	r3, #0
 801d7f8:	d105      	bne.n	801d806 <tcp_input+0xce>
 801d7fa:	4b70      	ldr	r3, [pc, #448]	@ (801d9bc <tcp_input+0x284>)
 801d7fc:	22c2      	movs	r2, #194	@ 0xc2
 801d7fe:	4977      	ldr	r1, [pc, #476]	@ (801d9dc <tcp_input+0x2a4>)
 801d800:	4870      	ldr	r0, [pc, #448]	@ (801d9c4 <tcp_input+0x28c>)
 801d802:	f00d f92b 	bl	802aa5c <iprintf>

    /* advance over the TCP header (cannot fail) */
    pbuf_remove_header(p, TCP_HLEN);
 801d806:	2114      	movs	r1, #20
 801d808:	6878      	ldr	r0, [r7, #4]
 801d80a:	f7fd fdf7 	bl	801b3fc <pbuf_remove_header>

    /* determine how long the first and second parts of the options are */
    tcphdr_opt1len = p->len;
 801d80e:	687b      	ldr	r3, [r7, #4]
 801d810:	895a      	ldrh	r2, [r3, #10]
 801d812:	4b71      	ldr	r3, [pc, #452]	@ (801d9d8 <tcp_input+0x2a0>)
 801d814:	801a      	strh	r2, [r3, #0]
    opt2len = (u16_t)(tcphdr_optlen - tcphdr_opt1len);
 801d816:	4b6e      	ldr	r3, [pc, #440]	@ (801d9d0 <tcp_input+0x298>)
 801d818:	881a      	ldrh	r2, [r3, #0]
 801d81a:	4b6f      	ldr	r3, [pc, #444]	@ (801d9d8 <tcp_input+0x2a0>)
 801d81c:	881b      	ldrh	r3, [r3, #0]
 801d81e:	1ad3      	subs	r3, r2, r3
 801d820:	823b      	strh	r3, [r7, #16]

    /* options continue in the next pbuf: set p to zero length and hide the
        options in the next pbuf (adjusting p->tot_len) */
    pbuf_remove_header(p, tcphdr_opt1len);
 801d822:	4b6d      	ldr	r3, [pc, #436]	@ (801d9d8 <tcp_input+0x2a0>)
 801d824:	881b      	ldrh	r3, [r3, #0]
 801d826:	4619      	mov	r1, r3
 801d828:	6878      	ldr	r0, [r7, #4]
 801d82a:	f7fd fde7 	bl	801b3fc <pbuf_remove_header>

    /* check that the options fit in the second pbuf */
    if (opt2len > p->next->len) {
 801d82e:	687b      	ldr	r3, [r7, #4]
 801d830:	681b      	ldr	r3, [r3, #0]
 801d832:	895b      	ldrh	r3, [r3, #10]
 801d834:	8a3a      	ldrh	r2, [r7, #16]
 801d836:	429a      	cmp	r2, r3
 801d838:	f200 836e 	bhi.w	801df18 <tcp_input+0x7e0>
      TCP_STATS_INC(tcp.lenerr);
      goto dropped;
    }

    /* remember the pointer to the second part of the options */
    tcphdr_opt2 = (u8_t *)p->next->payload;
 801d83c:	687b      	ldr	r3, [r7, #4]
 801d83e:	681b      	ldr	r3, [r3, #0]
 801d840:	685b      	ldr	r3, [r3, #4]
 801d842:	4a64      	ldr	r2, [pc, #400]	@ (801d9d4 <tcp_input+0x29c>)
 801d844:	6013      	str	r3, [r2, #0]

    /* advance p->next to point after the options, and manually
        adjust p->tot_len to keep it consistent with the changed p->next */
    pbuf_remove_header(p->next, opt2len);
 801d846:	687b      	ldr	r3, [r7, #4]
 801d848:	681b      	ldr	r3, [r3, #0]
 801d84a:	8a3a      	ldrh	r2, [r7, #16]
 801d84c:	4611      	mov	r1, r2
 801d84e:	4618      	mov	r0, r3
 801d850:	f7fd fdd4 	bl	801b3fc <pbuf_remove_header>
    p->tot_len = (u16_t)(p->tot_len - opt2len);
 801d854:	687b      	ldr	r3, [r7, #4]
 801d856:	891a      	ldrh	r2, [r3, #8]
 801d858:	8a3b      	ldrh	r3, [r7, #16]
 801d85a:	1ad3      	subs	r3, r2, r3
 801d85c:	b29a      	uxth	r2, r3
 801d85e:	687b      	ldr	r3, [r7, #4]
 801d860:	811a      	strh	r2, [r3, #8]

    LWIP_ASSERT("p->len == 0", p->len == 0);
 801d862:	687b      	ldr	r3, [r7, #4]
 801d864:	895b      	ldrh	r3, [r3, #10]
 801d866:	2b00      	cmp	r3, #0
 801d868:	d005      	beq.n	801d876 <tcp_input+0x13e>
 801d86a:	4b54      	ldr	r3, [pc, #336]	@ (801d9bc <tcp_input+0x284>)
 801d86c:	22df      	movs	r2, #223	@ 0xdf
 801d86e:	495c      	ldr	r1, [pc, #368]	@ (801d9e0 <tcp_input+0x2a8>)
 801d870:	4854      	ldr	r0, [pc, #336]	@ (801d9c4 <tcp_input+0x28c>)
 801d872:	f00d f8f3 	bl	802aa5c <iprintf>
    LWIP_ASSERT("p->tot_len == p->next->tot_len", p->tot_len == p->next->tot_len);
 801d876:	687b      	ldr	r3, [r7, #4]
 801d878:	891a      	ldrh	r2, [r3, #8]
 801d87a:	687b      	ldr	r3, [r7, #4]
 801d87c:	681b      	ldr	r3, [r3, #0]
 801d87e:	891b      	ldrh	r3, [r3, #8]
 801d880:	429a      	cmp	r2, r3
 801d882:	d005      	beq.n	801d890 <tcp_input+0x158>
 801d884:	4b4d      	ldr	r3, [pc, #308]	@ (801d9bc <tcp_input+0x284>)
 801d886:	22e0      	movs	r2, #224	@ 0xe0
 801d888:	4956      	ldr	r1, [pc, #344]	@ (801d9e4 <tcp_input+0x2ac>)
 801d88a:	484e      	ldr	r0, [pc, #312]	@ (801d9c4 <tcp_input+0x28c>)
 801d88c:	f00d f8e6 	bl	802aa5c <iprintf>
  }

  /* Convert fields in TCP header to host byte order. */
  tcphdr->src = lwip_ntohs(tcphdr->src);
 801d890:	4b4d      	ldr	r3, [pc, #308]	@ (801d9c8 <tcp_input+0x290>)
 801d892:	681b      	ldr	r3, [r3, #0]
 801d894:	881b      	ldrh	r3, [r3, #0]
 801d896:	b29b      	uxth	r3, r3
 801d898:	4a4b      	ldr	r2, [pc, #300]	@ (801d9c8 <tcp_input+0x290>)
 801d89a:	6814      	ldr	r4, [r2, #0]
 801d89c:	4618      	mov	r0, r3
 801d89e:	f7fc f983 	bl	8019ba8 <lwip_htons>
 801d8a2:	4603      	mov	r3, r0
 801d8a4:	8023      	strh	r3, [r4, #0]
  tcphdr->dest = lwip_ntohs(tcphdr->dest);
 801d8a6:	4b48      	ldr	r3, [pc, #288]	@ (801d9c8 <tcp_input+0x290>)
 801d8a8:	681b      	ldr	r3, [r3, #0]
 801d8aa:	885b      	ldrh	r3, [r3, #2]
 801d8ac:	b29b      	uxth	r3, r3
 801d8ae:	4a46      	ldr	r2, [pc, #280]	@ (801d9c8 <tcp_input+0x290>)
 801d8b0:	6814      	ldr	r4, [r2, #0]
 801d8b2:	4618      	mov	r0, r3
 801d8b4:	f7fc f978 	bl	8019ba8 <lwip_htons>
 801d8b8:	4603      	mov	r3, r0
 801d8ba:	8063      	strh	r3, [r4, #2]
  seqno = tcphdr->seqno = lwip_ntohl(tcphdr->seqno);
 801d8bc:	4b42      	ldr	r3, [pc, #264]	@ (801d9c8 <tcp_input+0x290>)
 801d8be:	681b      	ldr	r3, [r3, #0]
 801d8c0:	685b      	ldr	r3, [r3, #4]
 801d8c2:	4a41      	ldr	r2, [pc, #260]	@ (801d9c8 <tcp_input+0x290>)
 801d8c4:	6814      	ldr	r4, [r2, #0]
 801d8c6:	4618      	mov	r0, r3
 801d8c8:	f7fc f983 	bl	8019bd2 <lwip_htonl>
 801d8cc:	4603      	mov	r3, r0
 801d8ce:	6063      	str	r3, [r4, #4]
 801d8d0:	6863      	ldr	r3, [r4, #4]
 801d8d2:	4a45      	ldr	r2, [pc, #276]	@ (801d9e8 <tcp_input+0x2b0>)
 801d8d4:	6013      	str	r3, [r2, #0]
  ackno = tcphdr->ackno = lwip_ntohl(tcphdr->ackno);
 801d8d6:	4b3c      	ldr	r3, [pc, #240]	@ (801d9c8 <tcp_input+0x290>)
 801d8d8:	681b      	ldr	r3, [r3, #0]
 801d8da:	689b      	ldr	r3, [r3, #8]
 801d8dc:	4a3a      	ldr	r2, [pc, #232]	@ (801d9c8 <tcp_input+0x290>)
 801d8de:	6814      	ldr	r4, [r2, #0]
 801d8e0:	4618      	mov	r0, r3
 801d8e2:	f7fc f976 	bl	8019bd2 <lwip_htonl>
 801d8e6:	4603      	mov	r3, r0
 801d8e8:	60a3      	str	r3, [r4, #8]
 801d8ea:	68a3      	ldr	r3, [r4, #8]
 801d8ec:	4a3f      	ldr	r2, [pc, #252]	@ (801d9ec <tcp_input+0x2b4>)
 801d8ee:	6013      	str	r3, [r2, #0]
  tcphdr->wnd = lwip_ntohs(tcphdr->wnd);
 801d8f0:	4b35      	ldr	r3, [pc, #212]	@ (801d9c8 <tcp_input+0x290>)
 801d8f2:	681b      	ldr	r3, [r3, #0]
 801d8f4:	89db      	ldrh	r3, [r3, #14]
 801d8f6:	b29b      	uxth	r3, r3
 801d8f8:	4a33      	ldr	r2, [pc, #204]	@ (801d9c8 <tcp_input+0x290>)
 801d8fa:	6814      	ldr	r4, [r2, #0]
 801d8fc:	4618      	mov	r0, r3
 801d8fe:	f7fc f953 	bl	8019ba8 <lwip_htons>
 801d902:	4603      	mov	r3, r0
 801d904:	81e3      	strh	r3, [r4, #14]

  flags = TCPH_FLAGS(tcphdr);
 801d906:	4b30      	ldr	r3, [pc, #192]	@ (801d9c8 <tcp_input+0x290>)
 801d908:	681b      	ldr	r3, [r3, #0]
 801d90a:	899b      	ldrh	r3, [r3, #12]
 801d90c:	b29b      	uxth	r3, r3
 801d90e:	4618      	mov	r0, r3
 801d910:	f7fc f94a 	bl	8019ba8 <lwip_htons>
 801d914:	4603      	mov	r3, r0
 801d916:	b2db      	uxtb	r3, r3
 801d918:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 801d91c:	b2da      	uxtb	r2, r3
 801d91e:	4b34      	ldr	r3, [pc, #208]	@ (801d9f0 <tcp_input+0x2b8>)
 801d920:	701a      	strb	r2, [r3, #0]
  tcplen = p->tot_len;
 801d922:	687b      	ldr	r3, [r7, #4]
 801d924:	891a      	ldrh	r2, [r3, #8]
 801d926:	4b33      	ldr	r3, [pc, #204]	@ (801d9f4 <tcp_input+0x2bc>)
 801d928:	801a      	strh	r2, [r3, #0]
  if (flags & (TCP_FIN | TCP_SYN)) {
 801d92a:	4b31      	ldr	r3, [pc, #196]	@ (801d9f0 <tcp_input+0x2b8>)
 801d92c:	781b      	ldrb	r3, [r3, #0]
 801d92e:	f003 0303 	and.w	r3, r3, #3
 801d932:	2b00      	cmp	r3, #0
 801d934:	d00c      	beq.n	801d950 <tcp_input+0x218>
    tcplen++;
 801d936:	4b2f      	ldr	r3, [pc, #188]	@ (801d9f4 <tcp_input+0x2bc>)
 801d938:	881b      	ldrh	r3, [r3, #0]
 801d93a:	3301      	adds	r3, #1
 801d93c:	b29a      	uxth	r2, r3
 801d93e:	4b2d      	ldr	r3, [pc, #180]	@ (801d9f4 <tcp_input+0x2bc>)
 801d940:	801a      	strh	r2, [r3, #0]
    if (tcplen < p->tot_len) {
 801d942:	687b      	ldr	r3, [r7, #4]
 801d944:	891a      	ldrh	r2, [r3, #8]
 801d946:	4b2b      	ldr	r3, [pc, #172]	@ (801d9f4 <tcp_input+0x2bc>)
 801d948:	881b      	ldrh	r3, [r3, #0]
 801d94a:	429a      	cmp	r2, r3
 801d94c:	f200 82e6 	bhi.w	801df1c <tcp_input+0x7e4>
    }
  }

  /* Demultiplex an incoming segment. First, we check if it is destined
     for an active connection. */
  prev = NULL;
 801d950:	2300      	movs	r3, #0
 801d952:	61fb      	str	r3, [r7, #28]

  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801d954:	4b28      	ldr	r3, [pc, #160]	@ (801d9f8 <tcp_input+0x2c0>)
 801d956:	681b      	ldr	r3, [r3, #0]
 801d958:	61bb      	str	r3, [r7, #24]
 801d95a:	e09d      	b.n	801da98 <tcp_input+0x360>
    LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED);
 801d95c:	69bb      	ldr	r3, [r7, #24]
 801d95e:	7d1b      	ldrb	r3, [r3, #20]
 801d960:	2b00      	cmp	r3, #0
 801d962:	d105      	bne.n	801d970 <tcp_input+0x238>
 801d964:	4b15      	ldr	r3, [pc, #84]	@ (801d9bc <tcp_input+0x284>)
 801d966:	22fb      	movs	r2, #251	@ 0xfb
 801d968:	4924      	ldr	r1, [pc, #144]	@ (801d9fc <tcp_input+0x2c4>)
 801d96a:	4816      	ldr	r0, [pc, #88]	@ (801d9c4 <tcp_input+0x28c>)
 801d96c:	f00d f876 	bl	802aa5c <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT);
 801d970:	69bb      	ldr	r3, [r7, #24]
 801d972:	7d1b      	ldrb	r3, [r3, #20]
 801d974:	2b0a      	cmp	r3, #10
 801d976:	d105      	bne.n	801d984 <tcp_input+0x24c>
 801d978:	4b10      	ldr	r3, [pc, #64]	@ (801d9bc <tcp_input+0x284>)
 801d97a:	22fc      	movs	r2, #252	@ 0xfc
 801d97c:	4920      	ldr	r1, [pc, #128]	@ (801da00 <tcp_input+0x2c8>)
 801d97e:	4811      	ldr	r0, [pc, #68]	@ (801d9c4 <tcp_input+0x28c>)
 801d980:	f00d f86c 	bl	802aa5c <iprintf>
    LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN);
 801d984:	69bb      	ldr	r3, [r7, #24]
 801d986:	7d1b      	ldrb	r3, [r3, #20]
 801d988:	2b01      	cmp	r3, #1
 801d98a:	d105      	bne.n	801d998 <tcp_input+0x260>
 801d98c:	4b0b      	ldr	r3, [pc, #44]	@ (801d9bc <tcp_input+0x284>)
 801d98e:	22fd      	movs	r2, #253	@ 0xfd
 801d990:	491c      	ldr	r1, [pc, #112]	@ (801da04 <tcp_input+0x2cc>)
 801d992:	480c      	ldr	r0, [pc, #48]	@ (801d9c4 <tcp_input+0x28c>)
 801d994:	f00d f862 	bl	802aa5c <iprintf>

    /* check if PCB is bound to specific netif */
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d998:	69bb      	ldr	r3, [r7, #24]
 801d99a:	7a1b      	ldrb	r3, [r3, #8]
 801d99c:	2b00      	cmp	r3, #0
 801d99e:	d033      	beq.n	801da08 <tcp_input+0x2d0>
        (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801d9a0:	69bb      	ldr	r3, [r7, #24]
 801d9a2:	7a1a      	ldrb	r2, [r3, #8]
 801d9a4:	4b09      	ldr	r3, [pc, #36]	@ (801d9cc <tcp_input+0x294>)
 801d9a6:	685b      	ldr	r3, [r3, #4]
 801d9a8:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801d9ac:	3301      	adds	r3, #1
 801d9ae:	b2db      	uxtb	r3, r3
    if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801d9b0:	429a      	cmp	r2, r3
 801d9b2:	d029      	beq.n	801da08 <tcp_input+0x2d0>
      prev = pcb;
 801d9b4:	69bb      	ldr	r3, [r7, #24]
 801d9b6:	61fb      	str	r3, [r7, #28]
      continue;
 801d9b8:	e06b      	b.n	801da92 <tcp_input+0x35a>
 801d9ba:	bf00      	nop
 801d9bc:	0802ff88 	.word	0x0802ff88
 801d9c0:	0802ffbc 	.word	0x0802ffbc
 801d9c4:	0802ffd4 	.word	0x0802ffd4
 801d9c8:	2402afd4 	.word	0x2402afd4
 801d9cc:	24024458 	.word	0x24024458
 801d9d0:	2402afd8 	.word	0x2402afd8
 801d9d4:	2402afdc 	.word	0x2402afdc
 801d9d8:	2402afda 	.word	0x2402afda
 801d9dc:	0802fffc 	.word	0x0802fffc
 801d9e0:	0803000c 	.word	0x0803000c
 801d9e4:	08030018 	.word	0x08030018
 801d9e8:	2402afe4 	.word	0x2402afe4
 801d9ec:	2402afe8 	.word	0x2402afe8
 801d9f0:	2402aff0 	.word	0x2402aff0
 801d9f4:	2402afee 	.word	0x2402afee
 801d9f8:	2402afb4 	.word	0x2402afb4
 801d9fc:	08030038 	.word	0x08030038
 801da00:	08030060 	.word	0x08030060
 801da04:	0803008c 	.word	0x0803008c
    }

    if (pcb->remote_port == tcphdr->src &&
 801da08:	69bb      	ldr	r3, [r7, #24]
 801da0a:	8b1a      	ldrh	r2, [r3, #24]
 801da0c:	4b72      	ldr	r3, [pc, #456]	@ (801dbd8 <tcp_input+0x4a0>)
 801da0e:	681b      	ldr	r3, [r3, #0]
 801da10:	881b      	ldrh	r3, [r3, #0]
 801da12:	b29b      	uxth	r3, r3
 801da14:	429a      	cmp	r2, r3
 801da16:	d13a      	bne.n	801da8e <tcp_input+0x356>
        pcb->local_port == tcphdr->dest &&
 801da18:	69bb      	ldr	r3, [r7, #24]
 801da1a:	8ada      	ldrh	r2, [r3, #22]
 801da1c:	4b6e      	ldr	r3, [pc, #440]	@ (801dbd8 <tcp_input+0x4a0>)
 801da1e:	681b      	ldr	r3, [r3, #0]
 801da20:	885b      	ldrh	r3, [r3, #2]
 801da22:	b29b      	uxth	r3, r3
    if (pcb->remote_port == tcphdr->src &&
 801da24:	429a      	cmp	r2, r3
 801da26:	d132      	bne.n	801da8e <tcp_input+0x356>
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801da28:	69bb      	ldr	r3, [r7, #24]
 801da2a:	685a      	ldr	r2, [r3, #4]
 801da2c:	4b6b      	ldr	r3, [pc, #428]	@ (801dbdc <tcp_input+0x4a4>)
 801da2e:	691b      	ldr	r3, [r3, #16]
        pcb->local_port == tcphdr->dest &&
 801da30:	429a      	cmp	r2, r3
 801da32:	d12c      	bne.n	801da8e <tcp_input+0x356>
        ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801da34:	69bb      	ldr	r3, [r7, #24]
 801da36:	681a      	ldr	r2, [r3, #0]
 801da38:	4b68      	ldr	r3, [pc, #416]	@ (801dbdc <tcp_input+0x4a4>)
 801da3a:	695b      	ldr	r3, [r3, #20]
        ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801da3c:	429a      	cmp	r2, r3
 801da3e:	d126      	bne.n	801da8e <tcp_input+0x356>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb);
 801da40:	69bb      	ldr	r3, [r7, #24]
 801da42:	68db      	ldr	r3, [r3, #12]
 801da44:	69ba      	ldr	r2, [r7, #24]
 801da46:	429a      	cmp	r2, r3
 801da48:	d106      	bne.n	801da58 <tcp_input+0x320>
 801da4a:	4b65      	ldr	r3, [pc, #404]	@ (801dbe0 <tcp_input+0x4a8>)
 801da4c:	f240 120d 	movw	r2, #269	@ 0x10d
 801da50:	4964      	ldr	r1, [pc, #400]	@ (801dbe4 <tcp_input+0x4ac>)
 801da52:	4865      	ldr	r0, [pc, #404]	@ (801dbe8 <tcp_input+0x4b0>)
 801da54:	f00d f802 	bl	802aa5c <iprintf>
      if (prev != NULL) {
 801da58:	69fb      	ldr	r3, [r7, #28]
 801da5a:	2b00      	cmp	r3, #0
 801da5c:	d00a      	beq.n	801da74 <tcp_input+0x33c>
        prev->next = pcb->next;
 801da5e:	69bb      	ldr	r3, [r7, #24]
 801da60:	68da      	ldr	r2, [r3, #12]
 801da62:	69fb      	ldr	r3, [r7, #28]
 801da64:	60da      	str	r2, [r3, #12]
        pcb->next = tcp_active_pcbs;
 801da66:	4b61      	ldr	r3, [pc, #388]	@ (801dbec <tcp_input+0x4b4>)
 801da68:	681a      	ldr	r2, [r3, #0]
 801da6a:	69bb      	ldr	r3, [r7, #24]
 801da6c:	60da      	str	r2, [r3, #12]
        tcp_active_pcbs = pcb;
 801da6e:	4a5f      	ldr	r2, [pc, #380]	@ (801dbec <tcp_input+0x4b4>)
 801da70:	69bb      	ldr	r3, [r7, #24]
 801da72:	6013      	str	r3, [r2, #0]
      } else {
        TCP_STATS_INC(tcp.cachehit);
      }
      LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb);
 801da74:	69bb      	ldr	r3, [r7, #24]
 801da76:	68db      	ldr	r3, [r3, #12]
 801da78:	69ba      	ldr	r2, [r7, #24]
 801da7a:	429a      	cmp	r2, r3
 801da7c:	d111      	bne.n	801daa2 <tcp_input+0x36a>
 801da7e:	4b58      	ldr	r3, [pc, #352]	@ (801dbe0 <tcp_input+0x4a8>)
 801da80:	f240 1215 	movw	r2, #277	@ 0x115
 801da84:	495a      	ldr	r1, [pc, #360]	@ (801dbf0 <tcp_input+0x4b8>)
 801da86:	4858      	ldr	r0, [pc, #352]	@ (801dbe8 <tcp_input+0x4b0>)
 801da88:	f00c ffe8 	bl	802aa5c <iprintf>
      break;
 801da8c:	e009      	b.n	801daa2 <tcp_input+0x36a>
    }
    prev = pcb;
 801da8e:	69bb      	ldr	r3, [r7, #24]
 801da90:	61fb      	str	r3, [r7, #28]
  for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) {
 801da92:	69bb      	ldr	r3, [r7, #24]
 801da94:	68db      	ldr	r3, [r3, #12]
 801da96:	61bb      	str	r3, [r7, #24]
 801da98:	69bb      	ldr	r3, [r7, #24]
 801da9a:	2b00      	cmp	r3, #0
 801da9c:	f47f af5e 	bne.w	801d95c <tcp_input+0x224>
 801daa0:	e000      	b.n	801daa4 <tcp_input+0x36c>
      break;
 801daa2:	bf00      	nop
  }

  if (pcb == NULL) {
 801daa4:	69bb      	ldr	r3, [r7, #24]
 801daa6:	2b00      	cmp	r3, #0
 801daa8:	f040 80aa 	bne.w	801dc00 <tcp_input+0x4c8>
    /* If it did not go to an active connection, we check the connections
       in the TIME-WAIT state. */
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801daac:	4b51      	ldr	r3, [pc, #324]	@ (801dbf4 <tcp_input+0x4bc>)
 801daae:	681b      	ldr	r3, [r3, #0]
 801dab0:	61bb      	str	r3, [r7, #24]
 801dab2:	e03f      	b.n	801db34 <tcp_input+0x3fc>
      LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT);
 801dab4:	69bb      	ldr	r3, [r7, #24]
 801dab6:	7d1b      	ldrb	r3, [r3, #20]
 801dab8:	2b0a      	cmp	r3, #10
 801daba:	d006      	beq.n	801daca <tcp_input+0x392>
 801dabc:	4b48      	ldr	r3, [pc, #288]	@ (801dbe0 <tcp_input+0x4a8>)
 801dabe:	f240 121f 	movw	r2, #287	@ 0x11f
 801dac2:	494d      	ldr	r1, [pc, #308]	@ (801dbf8 <tcp_input+0x4c0>)
 801dac4:	4848      	ldr	r0, [pc, #288]	@ (801dbe8 <tcp_input+0x4b0>)
 801dac6:	f00c ffc9 	bl	802aa5c <iprintf>

      /* check if PCB is bound to specific netif */
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801daca:	69bb      	ldr	r3, [r7, #24]
 801dacc:	7a1b      	ldrb	r3, [r3, #8]
 801dace:	2b00      	cmp	r3, #0
 801dad0:	d009      	beq.n	801dae6 <tcp_input+0x3ae>
          (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801dad2:	69bb      	ldr	r3, [r7, #24]
 801dad4:	7a1a      	ldrb	r2, [r3, #8]
 801dad6:	4b41      	ldr	r3, [pc, #260]	@ (801dbdc <tcp_input+0x4a4>)
 801dad8:	685b      	ldr	r3, [r3, #4]
 801dada:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801dade:	3301      	adds	r3, #1
 801dae0:	b2db      	uxtb	r3, r3
      if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 801dae2:	429a      	cmp	r2, r3
 801dae4:	d122      	bne.n	801db2c <tcp_input+0x3f4>
        continue;
      }

      if (pcb->remote_port == tcphdr->src &&
 801dae6:	69bb      	ldr	r3, [r7, #24]
 801dae8:	8b1a      	ldrh	r2, [r3, #24]
 801daea:	4b3b      	ldr	r3, [pc, #236]	@ (801dbd8 <tcp_input+0x4a0>)
 801daec:	681b      	ldr	r3, [r3, #0]
 801daee:	881b      	ldrh	r3, [r3, #0]
 801daf0:	b29b      	uxth	r3, r3
 801daf2:	429a      	cmp	r2, r3
 801daf4:	d11b      	bne.n	801db2e <tcp_input+0x3f6>
          pcb->local_port == tcphdr->dest &&
 801daf6:	69bb      	ldr	r3, [r7, #24]
 801daf8:	8ada      	ldrh	r2, [r3, #22]
 801dafa:	4b37      	ldr	r3, [pc, #220]	@ (801dbd8 <tcp_input+0x4a0>)
 801dafc:	681b      	ldr	r3, [r3, #0]
 801dafe:	885b      	ldrh	r3, [r3, #2]
 801db00:	b29b      	uxth	r3, r3
      if (pcb->remote_port == tcphdr->src &&
 801db02:	429a      	cmp	r2, r3
 801db04:	d113      	bne.n	801db2e <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801db06:	69bb      	ldr	r3, [r7, #24]
 801db08:	685a      	ldr	r2, [r3, #4]
 801db0a:	4b34      	ldr	r3, [pc, #208]	@ (801dbdc <tcp_input+0x4a4>)
 801db0c:	691b      	ldr	r3, [r3, #16]
          pcb->local_port == tcphdr->dest &&
 801db0e:	429a      	cmp	r2, r3
 801db10:	d10d      	bne.n	801db2e <tcp_input+0x3f6>
          ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 801db12:	69bb      	ldr	r3, [r7, #24]
 801db14:	681a      	ldr	r2, [r3, #0]
 801db16:	4b31      	ldr	r3, [pc, #196]	@ (801dbdc <tcp_input+0x4a4>)
 801db18:	695b      	ldr	r3, [r3, #20]
          ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()) &&
 801db1a:	429a      	cmp	r2, r3
 801db1c:	d107      	bne.n	801db2e <tcp_input+0x3f6>
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
        if (LWIP_HOOK_TCP_INPACKET_PCB(pcb, tcphdr, tcphdr_optlen, tcphdr_opt1len,
                                       tcphdr_opt2, p) == ERR_OK)
#endif
        {
          tcp_timewait_input(pcb);
 801db1e:	69b8      	ldr	r0, [r7, #24]
 801db20:	f000 fb56 	bl	801e1d0 <tcp_timewait_input>
        }
        pbuf_free(p);
 801db24:	6878      	ldr	r0, [r7, #4]
 801db26:	f7fd fd21 	bl	801b56c <pbuf_free>
        return;
 801db2a:	e1fd      	b.n	801df28 <tcp_input+0x7f0>
        continue;
 801db2c:	bf00      	nop
    for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) {
 801db2e:	69bb      	ldr	r3, [r7, #24]
 801db30:	68db      	ldr	r3, [r3, #12]
 801db32:	61bb      	str	r3, [r7, #24]
 801db34:	69bb      	ldr	r3, [r7, #24]
 801db36:	2b00      	cmp	r3, #0
 801db38:	d1bc      	bne.n	801dab4 <tcp_input+0x37c>
      }
    }

    /* Finally, if we still did not get a match, we check all PCBs that
       are LISTENing for incoming connections. */
    prev = NULL;
 801db3a:	2300      	movs	r3, #0
 801db3c:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801db3e:	4b2f      	ldr	r3, [pc, #188]	@ (801dbfc <tcp_input+0x4c4>)
 801db40:	681b      	ldr	r3, [r3, #0]
 801db42:	617b      	str	r3, [r7, #20]
 801db44:	e02a      	b.n	801db9c <tcp_input+0x464>
      /* check if PCB is bound to specific netif */
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801db46:	697b      	ldr	r3, [r7, #20]
 801db48:	7a1b      	ldrb	r3, [r3, #8]
 801db4a:	2b00      	cmp	r3, #0
 801db4c:	d00c      	beq.n	801db68 <tcp_input+0x430>
          (lpcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 801db4e:	697b      	ldr	r3, [r7, #20]
 801db50:	7a1a      	ldrb	r2, [r3, #8]
 801db52:	4b22      	ldr	r3, [pc, #136]	@ (801dbdc <tcp_input+0x4a4>)
 801db54:	685b      	ldr	r3, [r3, #4]
 801db56:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 801db5a:	3301      	adds	r3, #1
 801db5c:	b2db      	uxtb	r3, r3
      if ((lpcb->netif_idx != NETIF_NO_INDEX) &&
 801db5e:	429a      	cmp	r2, r3
 801db60:	d002      	beq.n	801db68 <tcp_input+0x430>
        prev = (struct tcp_pcb *)lpcb;
 801db62:	697b      	ldr	r3, [r7, #20]
 801db64:	61fb      	str	r3, [r7, #28]
        continue;
 801db66:	e016      	b.n	801db96 <tcp_input+0x45e>
      }

      if (lpcb->local_port == tcphdr->dest) {
 801db68:	697b      	ldr	r3, [r7, #20]
 801db6a:	8ada      	ldrh	r2, [r3, #22]
 801db6c:	4b1a      	ldr	r3, [pc, #104]	@ (801dbd8 <tcp_input+0x4a0>)
 801db6e:	681b      	ldr	r3, [r3, #0]
 801db70:	885b      	ldrh	r3, [r3, #2]
 801db72:	b29b      	uxth	r3, r3
 801db74:	429a      	cmp	r2, r3
 801db76:	d10c      	bne.n	801db92 <tcp_input+0x45a>
          lpcb_prev = prev;
#else /* SO_REUSE */
          break;
#endif /* SO_REUSE */
        } else if (IP_ADDR_PCB_VERSION_MATCH_EXACT(lpcb, ip_current_dest_addr())) {
          if (ip_addr_cmp(&lpcb->local_ip, ip_current_dest_addr())) {
 801db78:	697b      	ldr	r3, [r7, #20]
 801db7a:	681a      	ldr	r2, [r3, #0]
 801db7c:	4b17      	ldr	r3, [pc, #92]	@ (801dbdc <tcp_input+0x4a4>)
 801db7e:	695b      	ldr	r3, [r3, #20]
 801db80:	429a      	cmp	r2, r3
 801db82:	d00f      	beq.n	801dba4 <tcp_input+0x46c>
            /* found an exact match */
            break;
          } else if (ip_addr_isany(&lpcb->local_ip)) {
 801db84:	697b      	ldr	r3, [r7, #20]
 801db86:	2b00      	cmp	r3, #0
 801db88:	d00d      	beq.n	801dba6 <tcp_input+0x46e>
 801db8a:	697b      	ldr	r3, [r7, #20]
 801db8c:	681b      	ldr	r3, [r3, #0]
 801db8e:	2b00      	cmp	r3, #0
 801db90:	d009      	beq.n	801dba6 <tcp_input+0x46e>
            break;
#endif /* SO_REUSE */
          }
        }
      }
      prev = (struct tcp_pcb *)lpcb;
 801db92:	697b      	ldr	r3, [r7, #20]
 801db94:	61fb      	str	r3, [r7, #28]
    for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
 801db96:	697b      	ldr	r3, [r7, #20]
 801db98:	68db      	ldr	r3, [r3, #12]
 801db9a:	617b      	str	r3, [r7, #20]
 801db9c:	697b      	ldr	r3, [r7, #20]
 801db9e:	2b00      	cmp	r3, #0
 801dba0:	d1d1      	bne.n	801db46 <tcp_input+0x40e>
 801dba2:	e000      	b.n	801dba6 <tcp_input+0x46e>
            break;
 801dba4:	bf00      	nop
      /* only pass to ANY if no specific local IP has been found */
      lpcb = lpcb_any;
      prev = lpcb_prev;
    }
#endif /* SO_REUSE */
    if (lpcb != NULL) {
 801dba6:	697b      	ldr	r3, [r7, #20]
 801dba8:	2b00      	cmp	r3, #0
 801dbaa:	d029      	beq.n	801dc00 <tcp_input+0x4c8>
      /* Move this PCB to the front of the list so that subsequent
         lookups will be faster (we exploit locality in TCP segment
         arrivals). */
      if (prev != NULL) {
 801dbac:	69fb      	ldr	r3, [r7, #28]
 801dbae:	2b00      	cmp	r3, #0
 801dbb0:	d00a      	beq.n	801dbc8 <tcp_input+0x490>
        ((struct tcp_pcb_listen *)prev)->next = lpcb->next;
 801dbb2:	697b      	ldr	r3, [r7, #20]
 801dbb4:	68da      	ldr	r2, [r3, #12]
 801dbb6:	69fb      	ldr	r3, [r7, #28]
 801dbb8:	60da      	str	r2, [r3, #12]
        /* our successor is the remainder of the listening list */
        lpcb->next = tcp_listen_pcbs.listen_pcbs;
 801dbba:	4b10      	ldr	r3, [pc, #64]	@ (801dbfc <tcp_input+0x4c4>)
 801dbbc:	681a      	ldr	r2, [r3, #0]
 801dbbe:	697b      	ldr	r3, [r7, #20]
 801dbc0:	60da      	str	r2, [r3, #12]
        /* put this listening pcb at the head of the listening list */
        tcp_listen_pcbs.listen_pcbs = lpcb;
 801dbc2:	4a0e      	ldr	r2, [pc, #56]	@ (801dbfc <tcp_input+0x4c4>)
 801dbc4:	697b      	ldr	r3, [r7, #20]
 801dbc6:	6013      	str	r3, [r2, #0]
#ifdef LWIP_HOOK_TCP_INPACKET_PCB
      if (LWIP_HOOK_TCP_INPACKET_PCB((struct tcp_pcb *)lpcb, tcphdr, tcphdr_optlen,
                                     tcphdr_opt1len, tcphdr_opt2, p) == ERR_OK)
#endif
      {
        tcp_listen_input(lpcb);
 801dbc8:	6978      	ldr	r0, [r7, #20]
 801dbca:	f000 fa03 	bl	801dfd4 <tcp_listen_input>
      }
      pbuf_free(p);
 801dbce:	6878      	ldr	r0, [r7, #4]
 801dbd0:	f7fd fccc 	bl	801b56c <pbuf_free>
      return;
 801dbd4:	e1a8      	b.n	801df28 <tcp_input+0x7f0>
 801dbd6:	bf00      	nop
 801dbd8:	2402afd4 	.word	0x2402afd4
 801dbdc:	24024458 	.word	0x24024458
 801dbe0:	0802ff88 	.word	0x0802ff88
 801dbe4:	080300b4 	.word	0x080300b4
 801dbe8:	0802ffd4 	.word	0x0802ffd4
 801dbec:	2402afb4 	.word	0x2402afb4
 801dbf0:	080300e0 	.word	0x080300e0
 801dbf4:	2402afb8 	.word	0x2402afb8
 801dbf8:	0803010c 	.word	0x0803010c
 801dbfc:	2402afb0 	.word	0x2402afb0
      tcphdr_opt1len, tcphdr_opt2, p) != ERR_OK) {
    pbuf_free(p);
    return;
  }
#endif
  if (pcb != NULL) {
 801dc00:	69bb      	ldr	r3, [r7, #24]
 801dc02:	2b00      	cmp	r3, #0
 801dc04:	f000 8158 	beq.w	801deb8 <tcp_input+0x780>
#if TCP_INPUT_DEBUG
    tcp_debug_print_state(pcb->state);
#endif /* TCP_INPUT_DEBUG */

    /* Set up a tcp_seg structure. */
    inseg.next = NULL;
 801dc08:	4b95      	ldr	r3, [pc, #596]	@ (801de60 <tcp_input+0x728>)
 801dc0a:	2200      	movs	r2, #0
 801dc0c:	601a      	str	r2, [r3, #0]
    inseg.len = p->tot_len;
 801dc0e:	687b      	ldr	r3, [r7, #4]
 801dc10:	891a      	ldrh	r2, [r3, #8]
 801dc12:	4b93      	ldr	r3, [pc, #588]	@ (801de60 <tcp_input+0x728>)
 801dc14:	811a      	strh	r2, [r3, #8]
    inseg.p = p;
 801dc16:	4a92      	ldr	r2, [pc, #584]	@ (801de60 <tcp_input+0x728>)
 801dc18:	687b      	ldr	r3, [r7, #4]
 801dc1a:	6053      	str	r3, [r2, #4]
    inseg.tcphdr = tcphdr;
 801dc1c:	4b91      	ldr	r3, [pc, #580]	@ (801de64 <tcp_input+0x72c>)
 801dc1e:	681b      	ldr	r3, [r3, #0]
 801dc20:	4a8f      	ldr	r2, [pc, #572]	@ (801de60 <tcp_input+0x728>)
 801dc22:	6113      	str	r3, [r2, #16]

    recv_data = NULL;
 801dc24:	4b90      	ldr	r3, [pc, #576]	@ (801de68 <tcp_input+0x730>)
 801dc26:	2200      	movs	r2, #0
 801dc28:	601a      	str	r2, [r3, #0]
    recv_flags = 0;
 801dc2a:	4b90      	ldr	r3, [pc, #576]	@ (801de6c <tcp_input+0x734>)
 801dc2c:	2200      	movs	r2, #0
 801dc2e:	701a      	strb	r2, [r3, #0]
    recv_acked = 0;
 801dc30:	4b8f      	ldr	r3, [pc, #572]	@ (801de70 <tcp_input+0x738>)
 801dc32:	2200      	movs	r2, #0
 801dc34:	801a      	strh	r2, [r3, #0]

    if (flags & TCP_PSH) {
 801dc36:	4b8f      	ldr	r3, [pc, #572]	@ (801de74 <tcp_input+0x73c>)
 801dc38:	781b      	ldrb	r3, [r3, #0]
 801dc3a:	f003 0308 	and.w	r3, r3, #8
 801dc3e:	2b00      	cmp	r3, #0
 801dc40:	d006      	beq.n	801dc50 <tcp_input+0x518>
      p->flags |= PBUF_FLAG_PUSH;
 801dc42:	687b      	ldr	r3, [r7, #4]
 801dc44:	7b5b      	ldrb	r3, [r3, #13]
 801dc46:	f043 0301 	orr.w	r3, r3, #1
 801dc4a:	b2da      	uxtb	r2, r3
 801dc4c:	687b      	ldr	r3, [r7, #4]
 801dc4e:	735a      	strb	r2, [r3, #13]
    }

    /* If there is data which was previously "refused" by upper layer */
    if (pcb->refused_data != NULL) {
 801dc50:	69bb      	ldr	r3, [r7, #24]
 801dc52:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801dc54:	2b00      	cmp	r3, #0
 801dc56:	d017      	beq.n	801dc88 <tcp_input+0x550>
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801dc58:	69b8      	ldr	r0, [r7, #24]
 801dc5a:	f7ff f84d 	bl	801ccf8 <tcp_process_refused_data>
 801dc5e:	4603      	mov	r3, r0
 801dc60:	f113 0f0d 	cmn.w	r3, #13
 801dc64:	d007      	beq.n	801dc76 <tcp_input+0x53e>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801dc66:	69bb      	ldr	r3, [r7, #24]
 801dc68:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
      if ((tcp_process_refused_data(pcb) == ERR_ABRT) ||
 801dc6a:	2b00      	cmp	r3, #0
 801dc6c:	d00c      	beq.n	801dc88 <tcp_input+0x550>
          ((pcb->refused_data != NULL) && (tcplen > 0))) {
 801dc6e:	4b82      	ldr	r3, [pc, #520]	@ (801de78 <tcp_input+0x740>)
 801dc70:	881b      	ldrh	r3, [r3, #0]
 801dc72:	2b00      	cmp	r3, #0
 801dc74:	d008      	beq.n	801dc88 <tcp_input+0x550>
        /* pcb has been aborted or refused data is still refused and the new
           segment contains data */
        if (pcb->rcv_ann_wnd == 0) {
 801dc76:	69bb      	ldr	r3, [r7, #24]
 801dc78:	8d5b      	ldrh	r3, [r3, #42]	@ 0x2a
 801dc7a:	2b00      	cmp	r3, #0
 801dc7c:	f040 80e4 	bne.w	801de48 <tcp_input+0x710>
          /* this is a zero-window probe, we respond to it with current RCV.NXT
          and drop the data segment */
          tcp_send_empty_ack(pcb);
 801dc80:	69b8      	ldr	r0, [r7, #24]
 801dc82:	f003 fe73 	bl	802196c <tcp_send_empty_ack>
        }
        TCP_STATS_INC(tcp.drop);
        MIB2_STATS_INC(mib2.tcpinerrs);
        goto aborted;
 801dc86:	e0df      	b.n	801de48 <tcp_input+0x710>
      }
    }
    tcp_input_pcb = pcb;
 801dc88:	4a7c      	ldr	r2, [pc, #496]	@ (801de7c <tcp_input+0x744>)
 801dc8a:	69bb      	ldr	r3, [r7, #24]
 801dc8c:	6013      	str	r3, [r2, #0]
    err = tcp_process(pcb);
 801dc8e:	69b8      	ldr	r0, [r7, #24]
 801dc90:	f000 fb18 	bl	801e2c4 <tcp_process>
 801dc94:	4603      	mov	r3, r0
 801dc96:	74fb      	strb	r3, [r7, #19]
    /* A return value of ERR_ABRT means that tcp_abort() was called
       and that the pcb has been freed. If so, we don't do anything. */
    if (err != ERR_ABRT) {
 801dc98:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801dc9c:	f113 0f0d 	cmn.w	r3, #13
 801dca0:	f000 80d4 	beq.w	801de4c <tcp_input+0x714>
      if (recv_flags & TF_RESET) {
 801dca4:	4b71      	ldr	r3, [pc, #452]	@ (801de6c <tcp_input+0x734>)
 801dca6:	781b      	ldrb	r3, [r3, #0]
 801dca8:	f003 0308 	and.w	r3, r3, #8
 801dcac:	2b00      	cmp	r3, #0
 801dcae:	d015      	beq.n	801dcdc <tcp_input+0x5a4>
        /* TF_RESET means that the connection was reset by the other
           end. We then call the error callback to inform the
           application that the connection is dead before we
           deallocate the PCB. */
        TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_RST);
 801dcb0:	69bb      	ldr	r3, [r7, #24]
 801dcb2:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801dcb6:	2b00      	cmp	r3, #0
 801dcb8:	d008      	beq.n	801dccc <tcp_input+0x594>
 801dcba:	69bb      	ldr	r3, [r7, #24]
 801dcbc:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801dcc0:	69ba      	ldr	r2, [r7, #24]
 801dcc2:	6912      	ldr	r2, [r2, #16]
 801dcc4:	f06f 010d 	mvn.w	r1, #13
 801dcc8:	4610      	mov	r0, r2
 801dcca:	4798      	blx	r3
        tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801dccc:	69b9      	ldr	r1, [r7, #24]
 801dcce:	486c      	ldr	r0, [pc, #432]	@ (801de80 <tcp_input+0x748>)
 801dcd0:	f7ff fbba 	bl	801d448 <tcp_pcb_remove>
        tcp_free(pcb);
 801dcd4:	69b8      	ldr	r0, [r7, #24]
 801dcd6:	f7fd ff05 	bl	801bae4 <tcp_free>
 801dcda:	e0da      	b.n	801de92 <tcp_input+0x75a>
      } else {
        err = ERR_OK;
 801dcdc:	2300      	movs	r3, #0
 801dcde:	74fb      	strb	r3, [r7, #19]
        /* If the application has registered a "sent" function to be
           called when new send buffer space is available, we call it
           now. */
        if (recv_acked > 0) {
 801dce0:	4b63      	ldr	r3, [pc, #396]	@ (801de70 <tcp_input+0x738>)
 801dce2:	881b      	ldrh	r3, [r3, #0]
 801dce4:	2b00      	cmp	r3, #0
 801dce6:	d01d      	beq.n	801dd24 <tcp_input+0x5ec>
          while (acked > 0) {
            acked16 = (u16_t)LWIP_MIN(acked, 0xffffu);
            acked -= acked16;
#else
          {
            acked16 = recv_acked;
 801dce8:	4b61      	ldr	r3, [pc, #388]	@ (801de70 <tcp_input+0x738>)
 801dcea:	881b      	ldrh	r3, [r3, #0]
 801dcec:	81fb      	strh	r3, [r7, #14]
#endif
            TCP_EVENT_SENT(pcb, (u16_t)acked16, err);
 801dcee:	69bb      	ldr	r3, [r7, #24]
 801dcf0:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801dcf4:	2b00      	cmp	r3, #0
 801dcf6:	d00a      	beq.n	801dd0e <tcp_input+0x5d6>
 801dcf8:	69bb      	ldr	r3, [r7, #24]
 801dcfa:	f8d3 3080 	ldr.w	r3, [r3, #128]	@ 0x80
 801dcfe:	69ba      	ldr	r2, [r7, #24]
 801dd00:	6910      	ldr	r0, [r2, #16]
 801dd02:	89fa      	ldrh	r2, [r7, #14]
 801dd04:	69b9      	ldr	r1, [r7, #24]
 801dd06:	4798      	blx	r3
 801dd08:	4603      	mov	r3, r0
 801dd0a:	74fb      	strb	r3, [r7, #19]
 801dd0c:	e001      	b.n	801dd12 <tcp_input+0x5da>
 801dd0e:	2300      	movs	r3, #0
 801dd10:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801dd12:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801dd16:	f113 0f0d 	cmn.w	r3, #13
 801dd1a:	f000 8099 	beq.w	801de50 <tcp_input+0x718>
              goto aborted;
            }
          }
          recv_acked = 0;
 801dd1e:	4b54      	ldr	r3, [pc, #336]	@ (801de70 <tcp_input+0x738>)
 801dd20:	2200      	movs	r2, #0
 801dd22:	801a      	strh	r2, [r3, #0]
        }
        if (tcp_input_delayed_close(pcb)) {
 801dd24:	69b8      	ldr	r0, [r7, #24]
 801dd26:	f000 f915 	bl	801df54 <tcp_input_delayed_close>
 801dd2a:	4603      	mov	r3, r0
 801dd2c:	2b00      	cmp	r3, #0
 801dd2e:	f040 8091 	bne.w	801de54 <tcp_input+0x71c>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
        while (recv_data != NULL) {
          struct pbuf *rest = NULL;
          pbuf_split_64k(recv_data, &rest);
#else /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
        if (recv_data != NULL) {
 801dd32:	4b4d      	ldr	r3, [pc, #308]	@ (801de68 <tcp_input+0x730>)
 801dd34:	681b      	ldr	r3, [r3, #0]
 801dd36:	2b00      	cmp	r3, #0
 801dd38:	d041      	beq.n	801ddbe <tcp_input+0x686>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */

          LWIP_ASSERT("pcb->refused_data == NULL", pcb->refused_data == NULL);
 801dd3a:	69bb      	ldr	r3, [r7, #24]
 801dd3c:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801dd3e:	2b00      	cmp	r3, #0
 801dd40:	d006      	beq.n	801dd50 <tcp_input+0x618>
 801dd42:	4b50      	ldr	r3, [pc, #320]	@ (801de84 <tcp_input+0x74c>)
 801dd44:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 801dd48:	494f      	ldr	r1, [pc, #316]	@ (801de88 <tcp_input+0x750>)
 801dd4a:	4850      	ldr	r0, [pc, #320]	@ (801de8c <tcp_input+0x754>)
 801dd4c:	f00c fe86 	bl	802aa5c <iprintf>
          if (pcb->flags & TF_RXCLOSED) {
 801dd50:	69bb      	ldr	r3, [r7, #24]
 801dd52:	8b5b      	ldrh	r3, [r3, #26]
 801dd54:	f003 0310 	and.w	r3, r3, #16
 801dd58:	2b00      	cmp	r3, #0
 801dd5a:	d008      	beq.n	801dd6e <tcp_input+0x636>
            /* received data although already closed -> abort (send RST) to
               notify the remote host that not all data has been processed */
            pbuf_free(recv_data);
 801dd5c:	4b42      	ldr	r3, [pc, #264]	@ (801de68 <tcp_input+0x730>)
 801dd5e:	681b      	ldr	r3, [r3, #0]
 801dd60:	4618      	mov	r0, r3
 801dd62:	f7fd fc03 	bl	801b56c <pbuf_free>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_free(rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            tcp_abort(pcb);
 801dd66:	69b8      	ldr	r0, [r7, #24]
 801dd68:	f7fe fa06 	bl	801c178 <tcp_abort>
            goto aborted;
 801dd6c:	e091      	b.n	801de92 <tcp_input+0x75a>
          }

          /* Notify application that data has been received. */
          TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err);
 801dd6e:	69bb      	ldr	r3, [r7, #24]
 801dd70:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801dd74:	2b00      	cmp	r3, #0
 801dd76:	d00c      	beq.n	801dd92 <tcp_input+0x65a>
 801dd78:	69bb      	ldr	r3, [r7, #24]
 801dd7a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801dd7e:	69bb      	ldr	r3, [r7, #24]
 801dd80:	6918      	ldr	r0, [r3, #16]
 801dd82:	4b39      	ldr	r3, [pc, #228]	@ (801de68 <tcp_input+0x730>)
 801dd84:	681a      	ldr	r2, [r3, #0]
 801dd86:	2300      	movs	r3, #0
 801dd88:	69b9      	ldr	r1, [r7, #24]
 801dd8a:	47a0      	blx	r4
 801dd8c:	4603      	mov	r3, r0
 801dd8e:	74fb      	strb	r3, [r7, #19]
 801dd90:	e008      	b.n	801dda4 <tcp_input+0x66c>
 801dd92:	4b35      	ldr	r3, [pc, #212]	@ (801de68 <tcp_input+0x730>)
 801dd94:	681a      	ldr	r2, [r3, #0]
 801dd96:	2300      	movs	r3, #0
 801dd98:	69b9      	ldr	r1, [r7, #24]
 801dd9a:	2000      	movs	r0, #0
 801dd9c:	f7ff f884 	bl	801cea8 <tcp_recv_null>
 801dda0:	4603      	mov	r3, r0
 801dda2:	74fb      	strb	r3, [r7, #19]
          if (err == ERR_ABRT) {
 801dda4:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801dda8:	f113 0f0d 	cmn.w	r3, #13
 801ddac:	d054      	beq.n	801de58 <tcp_input+0x720>
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            goto aborted;
          }

          /* If the upper layer can't receive this data, store it */
          if (err != ERR_OK) {
 801ddae:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801ddb2:	2b00      	cmp	r3, #0
 801ddb4:	d003      	beq.n	801ddbe <tcp_input+0x686>
#if TCP_QUEUE_OOSEQ && LWIP_WND_SCALE
            if (rest != NULL) {
              pbuf_cat(recv_data, rest);
            }
#endif /* TCP_QUEUE_OOSEQ && LWIP_WND_SCALE */
            pcb->refused_data = recv_data;
 801ddb6:	4b2c      	ldr	r3, [pc, #176]	@ (801de68 <tcp_input+0x730>)
 801ddb8:	681a      	ldr	r2, [r3, #0]
 801ddba:	69bb      	ldr	r3, [r7, #24]
 801ddbc:	679a      	str	r2, [r3, #120]	@ 0x78
          }
        }

        /* If a FIN segment was received, we call the callback
           function with a NULL buffer to indicate EOF. */
        if (recv_flags & TF_GOT_FIN) {
 801ddbe:	4b2b      	ldr	r3, [pc, #172]	@ (801de6c <tcp_input+0x734>)
 801ddc0:	781b      	ldrb	r3, [r3, #0]
 801ddc2:	f003 0320 	and.w	r3, r3, #32
 801ddc6:	2b00      	cmp	r3, #0
 801ddc8:	d031      	beq.n	801de2e <tcp_input+0x6f6>
          if (pcb->refused_data != NULL) {
 801ddca:	69bb      	ldr	r3, [r7, #24]
 801ddcc:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801ddce:	2b00      	cmp	r3, #0
 801ddd0:	d009      	beq.n	801dde6 <tcp_input+0x6ae>
            /* Delay this if we have refused data. */
            pcb->refused_data->flags |= PBUF_FLAG_TCP_FIN;
 801ddd2:	69bb      	ldr	r3, [r7, #24]
 801ddd4:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801ddd6:	7b5a      	ldrb	r2, [r3, #13]
 801ddd8:	69bb      	ldr	r3, [r7, #24]
 801ddda:	6f9b      	ldr	r3, [r3, #120]	@ 0x78
 801dddc:	f042 0220 	orr.w	r2, r2, #32
 801dde0:	b2d2      	uxtb	r2, r2
 801dde2:	735a      	strb	r2, [r3, #13]
 801dde4:	e023      	b.n	801de2e <tcp_input+0x6f6>
          } else {
            /* correct rcv_wnd as the application won't call tcp_recved()
               for the FIN's seqno */
            if (pcb->rcv_wnd != TCP_WND_MAX(pcb)) {
 801dde6:	69bb      	ldr	r3, [r7, #24]
 801dde8:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801ddea:	f241 62d0 	movw	r2, #5840	@ 0x16d0
 801ddee:	4293      	cmp	r3, r2
 801ddf0:	d005      	beq.n	801ddfe <tcp_input+0x6c6>
              pcb->rcv_wnd++;
 801ddf2:	69bb      	ldr	r3, [r7, #24]
 801ddf4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801ddf6:	3301      	adds	r3, #1
 801ddf8:	b29a      	uxth	r2, r3
 801ddfa:	69bb      	ldr	r3, [r7, #24]
 801ddfc:	851a      	strh	r2, [r3, #40]	@ 0x28
            }
            TCP_EVENT_CLOSED(pcb, err);
 801ddfe:	69bb      	ldr	r3, [r7, #24]
 801de00:	f8d3 3084 	ldr.w	r3, [r3, #132]	@ 0x84
 801de04:	2b00      	cmp	r3, #0
 801de06:	d00b      	beq.n	801de20 <tcp_input+0x6e8>
 801de08:	69bb      	ldr	r3, [r7, #24]
 801de0a:	f8d3 4084 	ldr.w	r4, [r3, #132]	@ 0x84
 801de0e:	69bb      	ldr	r3, [r7, #24]
 801de10:	6918      	ldr	r0, [r3, #16]
 801de12:	2300      	movs	r3, #0
 801de14:	2200      	movs	r2, #0
 801de16:	69b9      	ldr	r1, [r7, #24]
 801de18:	47a0      	blx	r4
 801de1a:	4603      	mov	r3, r0
 801de1c:	74fb      	strb	r3, [r7, #19]
 801de1e:	e001      	b.n	801de24 <tcp_input+0x6ec>
 801de20:	2300      	movs	r3, #0
 801de22:	74fb      	strb	r3, [r7, #19]
            if (err == ERR_ABRT) {
 801de24:	f997 3013 	ldrsb.w	r3, [r7, #19]
 801de28:	f113 0f0d 	cmn.w	r3, #13
 801de2c:	d016      	beq.n	801de5c <tcp_input+0x724>
              goto aborted;
            }
          }
        }

        tcp_input_pcb = NULL;
 801de2e:	4b13      	ldr	r3, [pc, #76]	@ (801de7c <tcp_input+0x744>)
 801de30:	2200      	movs	r2, #0
 801de32:	601a      	str	r2, [r3, #0]
        if (tcp_input_delayed_close(pcb)) {
 801de34:	69b8      	ldr	r0, [r7, #24]
 801de36:	f000 f88d 	bl	801df54 <tcp_input_delayed_close>
 801de3a:	4603      	mov	r3, r0
 801de3c:	2b00      	cmp	r3, #0
 801de3e:	d127      	bne.n	801de90 <tcp_input+0x758>
          goto aborted;
        }
        /* Try to send something out. */
        tcp_output(pcb);
 801de40:	69b8      	ldr	r0, [r7, #24]
 801de42:	f002 ff7f 	bl	8020d44 <tcp_output>
 801de46:	e024      	b.n	801de92 <tcp_input+0x75a>
        goto aborted;
 801de48:	bf00      	nop
 801de4a:	e022      	b.n	801de92 <tcp_input+0x75a>
#endif /* TCP_INPUT_DEBUG */
      }
    }
    /* Jump target if pcb has been aborted in a callback (by calling tcp_abort()).
       Below this line, 'pcb' may not be dereferenced! */
aborted:
 801de4c:	bf00      	nop
 801de4e:	e020      	b.n	801de92 <tcp_input+0x75a>
              goto aborted;
 801de50:	bf00      	nop
 801de52:	e01e      	b.n	801de92 <tcp_input+0x75a>
          goto aborted;
 801de54:	bf00      	nop
 801de56:	e01c      	b.n	801de92 <tcp_input+0x75a>
            goto aborted;
 801de58:	bf00      	nop
 801de5a:	e01a      	b.n	801de92 <tcp_input+0x75a>
              goto aborted;
 801de5c:	bf00      	nop
 801de5e:	e018      	b.n	801de92 <tcp_input+0x75a>
 801de60:	2402afc0 	.word	0x2402afc0
 801de64:	2402afd4 	.word	0x2402afd4
 801de68:	2402aff4 	.word	0x2402aff4
 801de6c:	2402aff1 	.word	0x2402aff1
 801de70:	2402afec 	.word	0x2402afec
 801de74:	2402aff0 	.word	0x2402aff0
 801de78:	2402afee 	.word	0x2402afee
 801de7c:	2402aff8 	.word	0x2402aff8
 801de80:	2402afb4 	.word	0x2402afb4
 801de84:	0802ff88 	.word	0x0802ff88
 801de88:	0803013c 	.word	0x0803013c
 801de8c:	0802ffd4 	.word	0x0802ffd4
          goto aborted;
 801de90:	bf00      	nop
    tcp_input_pcb = NULL;
 801de92:	4b27      	ldr	r3, [pc, #156]	@ (801df30 <tcp_input+0x7f8>)
 801de94:	2200      	movs	r2, #0
 801de96:	601a      	str	r2, [r3, #0]
    recv_data = NULL;
 801de98:	4b26      	ldr	r3, [pc, #152]	@ (801df34 <tcp_input+0x7fc>)
 801de9a:	2200      	movs	r2, #0
 801de9c:	601a      	str	r2, [r3, #0]

    /* give up our reference to inseg.p */
    if (inseg.p != NULL) {
 801de9e:	4b26      	ldr	r3, [pc, #152]	@ (801df38 <tcp_input+0x800>)
 801dea0:	685b      	ldr	r3, [r3, #4]
 801dea2:	2b00      	cmp	r3, #0
 801dea4:	d03f      	beq.n	801df26 <tcp_input+0x7ee>
      pbuf_free(inseg.p);
 801dea6:	4b24      	ldr	r3, [pc, #144]	@ (801df38 <tcp_input+0x800>)
 801dea8:	685b      	ldr	r3, [r3, #4]
 801deaa:	4618      	mov	r0, r3
 801deac:	f7fd fb5e 	bl	801b56c <pbuf_free>
      inseg.p = NULL;
 801deb0:	4b21      	ldr	r3, [pc, #132]	@ (801df38 <tcp_input+0x800>)
 801deb2:	2200      	movs	r2, #0
 801deb4:	605a      	str	r2, [r3, #4]
    pbuf_free(p);
  }

  LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane());
  PERF_STOP("tcp_input");
  return;
 801deb6:	e036      	b.n	801df26 <tcp_input+0x7ee>
    if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) {
 801deb8:	4b20      	ldr	r3, [pc, #128]	@ (801df3c <tcp_input+0x804>)
 801deba:	681b      	ldr	r3, [r3, #0]
 801debc:	899b      	ldrh	r3, [r3, #12]
 801debe:	b29b      	uxth	r3, r3
 801dec0:	4618      	mov	r0, r3
 801dec2:	f7fb fe71 	bl	8019ba8 <lwip_htons>
 801dec6:	4603      	mov	r3, r0
 801dec8:	b2db      	uxtb	r3, r3
 801deca:	f003 0304 	and.w	r3, r3, #4
 801dece:	2b00      	cmp	r3, #0
 801ded0:	d118      	bne.n	801df04 <tcp_input+0x7cc>
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801ded2:	4b1b      	ldr	r3, [pc, #108]	@ (801df40 <tcp_input+0x808>)
 801ded4:	6819      	ldr	r1, [r3, #0]
 801ded6:	4b1b      	ldr	r3, [pc, #108]	@ (801df44 <tcp_input+0x80c>)
 801ded8:	881b      	ldrh	r3, [r3, #0]
 801deda:	461a      	mov	r2, r3
 801dedc:	4b1a      	ldr	r3, [pc, #104]	@ (801df48 <tcp_input+0x810>)
 801dede:	681b      	ldr	r3, [r3, #0]
 801dee0:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801dee2:	4b16      	ldr	r3, [pc, #88]	@ (801df3c <tcp_input+0x804>)
 801dee4:	681b      	ldr	r3, [r3, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801dee6:	885b      	ldrh	r3, [r3, #2]
 801dee8:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801deea:	4a14      	ldr	r2, [pc, #80]	@ (801df3c <tcp_input+0x804>)
 801deec:	6812      	ldr	r2, [r2, #0]
      tcp_rst(NULL, ackno, seqno + tcplen, ip_current_dest_addr(),
 801deee:	8812      	ldrh	r2, [r2, #0]
 801def0:	b292      	uxth	r2, r2
 801def2:	9202      	str	r2, [sp, #8]
 801def4:	9301      	str	r3, [sp, #4]
 801def6:	4b15      	ldr	r3, [pc, #84]	@ (801df4c <tcp_input+0x814>)
 801def8:	9300      	str	r3, [sp, #0]
 801defa:	4b15      	ldr	r3, [pc, #84]	@ (801df50 <tcp_input+0x818>)
 801defc:	4602      	mov	r2, r0
 801defe:	2000      	movs	r0, #0
 801df00:	f003 fce2 	bl	80218c8 <tcp_rst>
    pbuf_free(p);
 801df04:	6878      	ldr	r0, [r7, #4]
 801df06:	f7fd fb31 	bl	801b56c <pbuf_free>
  return;
 801df0a:	e00c      	b.n	801df26 <tcp_input+0x7ee>
    goto dropped;
 801df0c:	bf00      	nop
 801df0e:	e006      	b.n	801df1e <tcp_input+0x7e6>
    goto dropped;
 801df10:	bf00      	nop
 801df12:	e004      	b.n	801df1e <tcp_input+0x7e6>
    goto dropped;
 801df14:	bf00      	nop
 801df16:	e002      	b.n	801df1e <tcp_input+0x7e6>
      goto dropped;
 801df18:	bf00      	nop
 801df1a:	e000      	b.n	801df1e <tcp_input+0x7e6>
      goto dropped;
 801df1c:	bf00      	nop
dropped:
  TCP_STATS_INC(tcp.drop);
  MIB2_STATS_INC(mib2.tcpinerrs);
  pbuf_free(p);
 801df1e:	6878      	ldr	r0, [r7, #4]
 801df20:	f7fd fb24 	bl	801b56c <pbuf_free>
 801df24:	e000      	b.n	801df28 <tcp_input+0x7f0>
  return;
 801df26:	bf00      	nop
}
 801df28:	3724      	adds	r7, #36	@ 0x24
 801df2a:	46bd      	mov	sp, r7
 801df2c:	bd90      	pop	{r4, r7, pc}
 801df2e:	bf00      	nop
 801df30:	2402aff8 	.word	0x2402aff8
 801df34:	2402aff4 	.word	0x2402aff4
 801df38:	2402afc0 	.word	0x2402afc0
 801df3c:	2402afd4 	.word	0x2402afd4
 801df40:	2402afe8 	.word	0x2402afe8
 801df44:	2402afee 	.word	0x2402afee
 801df48:	2402afe4 	.word	0x2402afe4
 801df4c:	24024468 	.word	0x24024468
 801df50:	2402446c 	.word	0x2402446c

0801df54 <tcp_input_delayed_close>:
 * any more.
 * @returns 1 if the pcb has been closed and deallocated, 0 otherwise
 */
static int
tcp_input_delayed_close(struct tcp_pcb *pcb)
{
 801df54:	b580      	push	{r7, lr}
 801df56:	b082      	sub	sp, #8
 801df58:	af00      	add	r7, sp, #0
 801df5a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_input_delayed_close: invalid pcb", pcb != NULL);
 801df5c:	687b      	ldr	r3, [r7, #4]
 801df5e:	2b00      	cmp	r3, #0
 801df60:	d106      	bne.n	801df70 <tcp_input_delayed_close+0x1c>
 801df62:	4b17      	ldr	r3, [pc, #92]	@ (801dfc0 <tcp_input_delayed_close+0x6c>)
 801df64:	f240 225a 	movw	r2, #602	@ 0x25a
 801df68:	4916      	ldr	r1, [pc, #88]	@ (801dfc4 <tcp_input_delayed_close+0x70>)
 801df6a:	4817      	ldr	r0, [pc, #92]	@ (801dfc8 <tcp_input_delayed_close+0x74>)
 801df6c:	f00c fd76 	bl	802aa5c <iprintf>

  if (recv_flags & TF_CLOSED) {
 801df70:	4b16      	ldr	r3, [pc, #88]	@ (801dfcc <tcp_input_delayed_close+0x78>)
 801df72:	781b      	ldrb	r3, [r3, #0]
 801df74:	f003 0310 	and.w	r3, r3, #16
 801df78:	2b00      	cmp	r3, #0
 801df7a:	d01c      	beq.n	801dfb6 <tcp_input_delayed_close+0x62>
    /* The connection has been closed and we will deallocate the
        PCB. */
    if (!(pcb->flags & TF_RXCLOSED)) {
 801df7c:	687b      	ldr	r3, [r7, #4]
 801df7e:	8b5b      	ldrh	r3, [r3, #26]
 801df80:	f003 0310 	and.w	r3, r3, #16
 801df84:	2b00      	cmp	r3, #0
 801df86:	d10d      	bne.n	801dfa4 <tcp_input_delayed_close+0x50>
      /* Connection closed although the application has only shut down the
          tx side: call the PCB's err callback and indicate the closure to
          ensure the application doesn't continue using the PCB. */
      TCP_EVENT_ERR(pcb->state, pcb->errf, pcb->callback_arg, ERR_CLSD);
 801df88:	687b      	ldr	r3, [r7, #4]
 801df8a:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801df8e:	2b00      	cmp	r3, #0
 801df90:	d008      	beq.n	801dfa4 <tcp_input_delayed_close+0x50>
 801df92:	687b      	ldr	r3, [r7, #4]
 801df94:	f8d3 3090 	ldr.w	r3, [r3, #144]	@ 0x90
 801df98:	687a      	ldr	r2, [r7, #4]
 801df9a:	6912      	ldr	r2, [r2, #16]
 801df9c:	f06f 010e 	mvn.w	r1, #14
 801dfa0:	4610      	mov	r0, r2
 801dfa2:	4798      	blx	r3
    }
    tcp_pcb_remove(&tcp_active_pcbs, pcb);
 801dfa4:	6879      	ldr	r1, [r7, #4]
 801dfa6:	480a      	ldr	r0, [pc, #40]	@ (801dfd0 <tcp_input_delayed_close+0x7c>)
 801dfa8:	f7ff fa4e 	bl	801d448 <tcp_pcb_remove>
    tcp_free(pcb);
 801dfac:	6878      	ldr	r0, [r7, #4]
 801dfae:	f7fd fd99 	bl	801bae4 <tcp_free>
    return 1;
 801dfb2:	2301      	movs	r3, #1
 801dfb4:	e000      	b.n	801dfb8 <tcp_input_delayed_close+0x64>
  }
  return 0;
 801dfb6:	2300      	movs	r3, #0
}
 801dfb8:	4618      	mov	r0, r3
 801dfba:	3708      	adds	r7, #8
 801dfbc:	46bd      	mov	sp, r7
 801dfbe:	bd80      	pop	{r7, pc}
 801dfc0:	0802ff88 	.word	0x0802ff88
 801dfc4:	08030158 	.word	0x08030158
 801dfc8:	0802ffd4 	.word	0x0802ffd4
 801dfcc:	2402aff1 	.word	0x2402aff1
 801dfd0:	2402afb4 	.word	0x2402afb4

0801dfd4 <tcp_listen_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_listen_input(struct tcp_pcb_listen *pcb)
{
 801dfd4:	b590      	push	{r4, r7, lr}
 801dfd6:	b08b      	sub	sp, #44	@ 0x2c
 801dfd8:	af04      	add	r7, sp, #16
 801dfda:	6078      	str	r0, [r7, #4]
  struct tcp_pcb *npcb;
  u32_t iss;
  err_t rc;

  if (flags & TCP_RST) {
 801dfdc:	4b6f      	ldr	r3, [pc, #444]	@ (801e19c <tcp_listen_input+0x1c8>)
 801dfde:	781b      	ldrb	r3, [r3, #0]
 801dfe0:	f003 0304 	and.w	r3, r3, #4
 801dfe4:	2b00      	cmp	r3, #0
 801dfe6:	f040 80d2 	bne.w	801e18e <tcp_listen_input+0x1ba>
    /* An incoming RST should be ignored. Return. */
    return;
  }

  LWIP_ASSERT("tcp_listen_input: invalid pcb", pcb != NULL);
 801dfea:	687b      	ldr	r3, [r7, #4]
 801dfec:	2b00      	cmp	r3, #0
 801dfee:	d106      	bne.n	801dffe <tcp_listen_input+0x2a>
 801dff0:	4b6b      	ldr	r3, [pc, #428]	@ (801e1a0 <tcp_listen_input+0x1cc>)
 801dff2:	f240 2281 	movw	r2, #641	@ 0x281
 801dff6:	496b      	ldr	r1, [pc, #428]	@ (801e1a4 <tcp_listen_input+0x1d0>)
 801dff8:	486b      	ldr	r0, [pc, #428]	@ (801e1a8 <tcp_listen_input+0x1d4>)
 801dffa:	f00c fd2f 	bl	802aa5c <iprintf>

  /* In the LISTEN state, we check for incoming SYN segments,
     creates a new PCB, and responds with a SYN|ACK. */
  if (flags & TCP_ACK) {
 801dffe:	4b67      	ldr	r3, [pc, #412]	@ (801e19c <tcp_listen_input+0x1c8>)
 801e000:	781b      	ldrb	r3, [r3, #0]
 801e002:	f003 0310 	and.w	r3, r3, #16
 801e006:	2b00      	cmp	r3, #0
 801e008:	d019      	beq.n	801e03e <tcp_listen_input+0x6a>
    /* For incoming segments with the ACK flag set, respond with a
       RST. */
    LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n"));
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e00a:	4b68      	ldr	r3, [pc, #416]	@ (801e1ac <tcp_listen_input+0x1d8>)
 801e00c:	6819      	ldr	r1, [r3, #0]
 801e00e:	4b68      	ldr	r3, [pc, #416]	@ (801e1b0 <tcp_listen_input+0x1dc>)
 801e010:	881b      	ldrh	r3, [r3, #0]
 801e012:	461a      	mov	r2, r3
 801e014:	4b67      	ldr	r3, [pc, #412]	@ (801e1b4 <tcp_listen_input+0x1e0>)
 801e016:	681b      	ldr	r3, [r3, #0]
 801e018:	18d0      	adds	r0, r2, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e01a:	4b67      	ldr	r3, [pc, #412]	@ (801e1b8 <tcp_listen_input+0x1e4>)
 801e01c:	681b      	ldr	r3, [r3, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e01e:	885b      	ldrh	r3, [r3, #2]
 801e020:	b29b      	uxth	r3, r3
            ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e022:	4a65      	ldr	r2, [pc, #404]	@ (801e1b8 <tcp_listen_input+0x1e4>)
 801e024:	6812      	ldr	r2, [r2, #0]
    tcp_rst((const struct tcp_pcb *)pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e026:	8812      	ldrh	r2, [r2, #0]
 801e028:	b292      	uxth	r2, r2
 801e02a:	9202      	str	r2, [sp, #8]
 801e02c:	9301      	str	r3, [sp, #4]
 801e02e:	4b63      	ldr	r3, [pc, #396]	@ (801e1bc <tcp_listen_input+0x1e8>)
 801e030:	9300      	str	r3, [sp, #0]
 801e032:	4b63      	ldr	r3, [pc, #396]	@ (801e1c0 <tcp_listen_input+0x1ec>)
 801e034:	4602      	mov	r2, r0
 801e036:	6878      	ldr	r0, [r7, #4]
 801e038:	f003 fc46 	bl	80218c8 <tcp_rst>
      tcp_abandon(npcb, 0);
      return;
    }
    tcp_output(npcb);
  }
  return;
 801e03c:	e0a9      	b.n	801e192 <tcp_listen_input+0x1be>
  } else if (flags & TCP_SYN) {
 801e03e:	4b57      	ldr	r3, [pc, #348]	@ (801e19c <tcp_listen_input+0x1c8>)
 801e040:	781b      	ldrb	r3, [r3, #0]
 801e042:	f003 0302 	and.w	r3, r3, #2
 801e046:	2b00      	cmp	r3, #0
 801e048:	f000 80a3 	beq.w	801e192 <tcp_listen_input+0x1be>
    npcb = tcp_alloc(pcb->prio);
 801e04c:	687b      	ldr	r3, [r7, #4]
 801e04e:	7d5b      	ldrb	r3, [r3, #21]
 801e050:	4618      	mov	r0, r3
 801e052:	f7ff f84d 	bl	801d0f0 <tcp_alloc>
 801e056:	6178      	str	r0, [r7, #20]
    if (npcb == NULL) {
 801e058:	697b      	ldr	r3, [r7, #20]
 801e05a:	2b00      	cmp	r3, #0
 801e05c:	d111      	bne.n	801e082 <tcp_listen_input+0xae>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801e05e:	687b      	ldr	r3, [r7, #4]
 801e060:	699b      	ldr	r3, [r3, #24]
 801e062:	2b00      	cmp	r3, #0
 801e064:	d00a      	beq.n	801e07c <tcp_listen_input+0xa8>
 801e066:	687b      	ldr	r3, [r7, #4]
 801e068:	699b      	ldr	r3, [r3, #24]
 801e06a:	687a      	ldr	r2, [r7, #4]
 801e06c:	6910      	ldr	r0, [r2, #16]
 801e06e:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 801e072:	2100      	movs	r1, #0
 801e074:	4798      	blx	r3
 801e076:	4603      	mov	r3, r0
 801e078:	73bb      	strb	r3, [r7, #14]
      return;
 801e07a:	e08b      	b.n	801e194 <tcp_listen_input+0x1c0>
      TCP_EVENT_ACCEPT(pcb, NULL, pcb->callback_arg, ERR_MEM, err);
 801e07c:	23f0      	movs	r3, #240	@ 0xf0
 801e07e:	73bb      	strb	r3, [r7, #14]
      return;
 801e080:	e088      	b.n	801e194 <tcp_listen_input+0x1c0>
    ip_addr_copy(npcb->local_ip, *ip_current_dest_addr());
 801e082:	4b50      	ldr	r3, [pc, #320]	@ (801e1c4 <tcp_listen_input+0x1f0>)
 801e084:	695a      	ldr	r2, [r3, #20]
 801e086:	697b      	ldr	r3, [r7, #20]
 801e088:	601a      	str	r2, [r3, #0]
    ip_addr_copy(npcb->remote_ip, *ip_current_src_addr());
 801e08a:	4b4e      	ldr	r3, [pc, #312]	@ (801e1c4 <tcp_listen_input+0x1f0>)
 801e08c:	691a      	ldr	r2, [r3, #16]
 801e08e:	697b      	ldr	r3, [r7, #20]
 801e090:	605a      	str	r2, [r3, #4]
    npcb->local_port = pcb->local_port;
 801e092:	687b      	ldr	r3, [r7, #4]
 801e094:	8ada      	ldrh	r2, [r3, #22]
 801e096:	697b      	ldr	r3, [r7, #20]
 801e098:	82da      	strh	r2, [r3, #22]
    npcb->remote_port = tcphdr->src;
 801e09a:	4b47      	ldr	r3, [pc, #284]	@ (801e1b8 <tcp_listen_input+0x1e4>)
 801e09c:	681b      	ldr	r3, [r3, #0]
 801e09e:	881b      	ldrh	r3, [r3, #0]
 801e0a0:	b29a      	uxth	r2, r3
 801e0a2:	697b      	ldr	r3, [r7, #20]
 801e0a4:	831a      	strh	r2, [r3, #24]
    npcb->state = SYN_RCVD;
 801e0a6:	697b      	ldr	r3, [r7, #20]
 801e0a8:	2203      	movs	r2, #3
 801e0aa:	751a      	strb	r2, [r3, #20]
    npcb->rcv_nxt = seqno + 1;
 801e0ac:	4b41      	ldr	r3, [pc, #260]	@ (801e1b4 <tcp_listen_input+0x1e0>)
 801e0ae:	681b      	ldr	r3, [r3, #0]
 801e0b0:	1c5a      	adds	r2, r3, #1
 801e0b2:	697b      	ldr	r3, [r7, #20]
 801e0b4:	625a      	str	r2, [r3, #36]	@ 0x24
    npcb->rcv_ann_right_edge = npcb->rcv_nxt;
 801e0b6:	697b      	ldr	r3, [r7, #20]
 801e0b8:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e0ba:	697b      	ldr	r3, [r7, #20]
 801e0bc:	62da      	str	r2, [r3, #44]	@ 0x2c
    iss = tcp_next_iss(npcb);
 801e0be:	6978      	ldr	r0, [r7, #20]
 801e0c0:	f7ff fa56 	bl	801d570 <tcp_next_iss>
 801e0c4:	6138      	str	r0, [r7, #16]
    npcb->snd_wl2 = iss;
 801e0c6:	697b      	ldr	r3, [r7, #20]
 801e0c8:	693a      	ldr	r2, [r7, #16]
 801e0ca:	659a      	str	r2, [r3, #88]	@ 0x58
    npcb->snd_nxt = iss;
 801e0cc:	697b      	ldr	r3, [r7, #20]
 801e0ce:	693a      	ldr	r2, [r7, #16]
 801e0d0:	651a      	str	r2, [r3, #80]	@ 0x50
    npcb->lastack = iss;
 801e0d2:	697b      	ldr	r3, [r7, #20]
 801e0d4:	693a      	ldr	r2, [r7, #16]
 801e0d6:	645a      	str	r2, [r3, #68]	@ 0x44
    npcb->snd_lbb = iss;
 801e0d8:	697b      	ldr	r3, [r7, #20]
 801e0da:	693a      	ldr	r2, [r7, #16]
 801e0dc:	65da      	str	r2, [r3, #92]	@ 0x5c
    npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */
 801e0de:	4b35      	ldr	r3, [pc, #212]	@ (801e1b4 <tcp_listen_input+0x1e0>)
 801e0e0:	681b      	ldr	r3, [r3, #0]
 801e0e2:	1e5a      	subs	r2, r3, #1
 801e0e4:	697b      	ldr	r3, [r7, #20]
 801e0e6:	655a      	str	r2, [r3, #84]	@ 0x54
    npcb->callback_arg = pcb->callback_arg;
 801e0e8:	687b      	ldr	r3, [r7, #4]
 801e0ea:	691a      	ldr	r2, [r3, #16]
 801e0ec:	697b      	ldr	r3, [r7, #20]
 801e0ee:	611a      	str	r2, [r3, #16]
    npcb->listener = pcb;
 801e0f0:	697b      	ldr	r3, [r7, #20]
 801e0f2:	687a      	ldr	r2, [r7, #4]
 801e0f4:	67da      	str	r2, [r3, #124]	@ 0x7c
    npcb->so_options = pcb->so_options & SOF_INHERITED;
 801e0f6:	687b      	ldr	r3, [r7, #4]
 801e0f8:	7a5b      	ldrb	r3, [r3, #9]
 801e0fa:	f003 030c 	and.w	r3, r3, #12
 801e0fe:	b2da      	uxtb	r2, r3
 801e100:	697b      	ldr	r3, [r7, #20]
 801e102:	725a      	strb	r2, [r3, #9]
    npcb->netif_idx = pcb->netif_idx;
 801e104:	687b      	ldr	r3, [r7, #4]
 801e106:	7a1a      	ldrb	r2, [r3, #8]
 801e108:	697b      	ldr	r3, [r7, #20]
 801e10a:	721a      	strb	r2, [r3, #8]
    TCP_REG_ACTIVE(npcb);
 801e10c:	4b2e      	ldr	r3, [pc, #184]	@ (801e1c8 <tcp_listen_input+0x1f4>)
 801e10e:	681a      	ldr	r2, [r3, #0]
 801e110:	697b      	ldr	r3, [r7, #20]
 801e112:	60da      	str	r2, [r3, #12]
 801e114:	4a2c      	ldr	r2, [pc, #176]	@ (801e1c8 <tcp_listen_input+0x1f4>)
 801e116:	697b      	ldr	r3, [r7, #20]
 801e118:	6013      	str	r3, [r2, #0]
 801e11a:	f003 fd97 	bl	8021c4c <tcp_timer_needed>
 801e11e:	4b2b      	ldr	r3, [pc, #172]	@ (801e1cc <tcp_listen_input+0x1f8>)
 801e120:	2201      	movs	r2, #1
 801e122:	701a      	strb	r2, [r3, #0]
    tcp_parseopt(npcb);
 801e124:	6978      	ldr	r0, [r7, #20]
 801e126:	f001 fd8b 	bl	801fc40 <tcp_parseopt>
    npcb->snd_wnd = tcphdr->wnd;
 801e12a:	4b23      	ldr	r3, [pc, #140]	@ (801e1b8 <tcp_listen_input+0x1e4>)
 801e12c:	681b      	ldr	r3, [r3, #0]
 801e12e:	89db      	ldrh	r3, [r3, #14]
 801e130:	b29a      	uxth	r2, r3
 801e132:	697b      	ldr	r3, [r7, #20]
 801e134:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
    npcb->snd_wnd_max = npcb->snd_wnd;
 801e138:	697b      	ldr	r3, [r7, #20]
 801e13a:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801e13e:	697b      	ldr	r3, [r7, #20]
 801e140:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
    npcb->mss = tcp_eff_send_mss(npcb->mss, &npcb->local_ip, &npcb->remote_ip);
 801e144:	697b      	ldr	r3, [r7, #20]
 801e146:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801e148:	697b      	ldr	r3, [r7, #20]
 801e14a:	3304      	adds	r3, #4
 801e14c:	4618      	mov	r0, r3
 801e14e:	f007 fc77 	bl	8025a40 <ip4_route>
 801e152:	4601      	mov	r1, r0
 801e154:	697b      	ldr	r3, [r7, #20]
 801e156:	3304      	adds	r3, #4
 801e158:	461a      	mov	r2, r3
 801e15a:	4620      	mov	r0, r4
 801e15c:	f7ff fa2e 	bl	801d5bc <tcp_eff_send_mss_netif>
 801e160:	4603      	mov	r3, r0
 801e162:	461a      	mov	r2, r3
 801e164:	697b      	ldr	r3, [r7, #20]
 801e166:	865a      	strh	r2, [r3, #50]	@ 0x32
    rc = tcp_enqueue_flags(npcb, TCP_SYN | TCP_ACK);
 801e168:	2112      	movs	r1, #18
 801e16a:	6978      	ldr	r0, [r7, #20]
 801e16c:	f002 fcfc 	bl	8020b68 <tcp_enqueue_flags>
 801e170:	4603      	mov	r3, r0
 801e172:	73fb      	strb	r3, [r7, #15]
    if (rc != ERR_OK) {
 801e174:	f997 300f 	ldrsb.w	r3, [r7, #15]
 801e178:	2b00      	cmp	r3, #0
 801e17a:	d004      	beq.n	801e186 <tcp_listen_input+0x1b2>
      tcp_abandon(npcb, 0);
 801e17c:	2100      	movs	r1, #0
 801e17e:	6978      	ldr	r0, [r7, #20]
 801e180:	f7fd ff3a 	bl	801bff8 <tcp_abandon>
      return;
 801e184:	e006      	b.n	801e194 <tcp_listen_input+0x1c0>
    tcp_output(npcb);
 801e186:	6978      	ldr	r0, [r7, #20]
 801e188:	f002 fddc 	bl	8020d44 <tcp_output>
  return;
 801e18c:	e001      	b.n	801e192 <tcp_listen_input+0x1be>
    return;
 801e18e:	bf00      	nop
 801e190:	e000      	b.n	801e194 <tcp_listen_input+0x1c0>
  return;
 801e192:	bf00      	nop
}
 801e194:	371c      	adds	r7, #28
 801e196:	46bd      	mov	sp, r7
 801e198:	bd90      	pop	{r4, r7, pc}
 801e19a:	bf00      	nop
 801e19c:	2402aff0 	.word	0x2402aff0
 801e1a0:	0802ff88 	.word	0x0802ff88
 801e1a4:	08030180 	.word	0x08030180
 801e1a8:	0802ffd4 	.word	0x0802ffd4
 801e1ac:	2402afe8 	.word	0x2402afe8
 801e1b0:	2402afee 	.word	0x2402afee
 801e1b4:	2402afe4 	.word	0x2402afe4
 801e1b8:	2402afd4 	.word	0x2402afd4
 801e1bc:	24024468 	.word	0x24024468
 801e1c0:	2402446c 	.word	0x2402446c
 801e1c4:	24024458 	.word	0x24024458
 801e1c8:	2402afb4 	.word	0x2402afb4
 801e1cc:	2402afbc 	.word	0x2402afbc

0801e1d0 <tcp_timewait_input>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static void
tcp_timewait_input(struct tcp_pcb *pcb)
{
 801e1d0:	b580      	push	{r7, lr}
 801e1d2:	b086      	sub	sp, #24
 801e1d4:	af04      	add	r7, sp, #16
 801e1d6:	6078      	str	r0, [r7, #4]
  /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */
  /* RFC 793 3.9 Event Processing - Segment Arrives:
   * - first check sequence number - we skip that one in TIME_WAIT (always
   *   acceptable since we only send ACKs)
   * - second check the RST bit (... return) */
  if (flags & TCP_RST) {
 801e1d8:	4b2f      	ldr	r3, [pc, #188]	@ (801e298 <tcp_timewait_input+0xc8>)
 801e1da:	781b      	ldrb	r3, [r3, #0]
 801e1dc:	f003 0304 	and.w	r3, r3, #4
 801e1e0:	2b00      	cmp	r3, #0
 801e1e2:	d153      	bne.n	801e28c <tcp_timewait_input+0xbc>
    return;
  }

  LWIP_ASSERT("tcp_timewait_input: invalid pcb", pcb != NULL);
 801e1e4:	687b      	ldr	r3, [r7, #4]
 801e1e6:	2b00      	cmp	r3, #0
 801e1e8:	d106      	bne.n	801e1f8 <tcp_timewait_input+0x28>
 801e1ea:	4b2c      	ldr	r3, [pc, #176]	@ (801e29c <tcp_timewait_input+0xcc>)
 801e1ec:	f240 22ee 	movw	r2, #750	@ 0x2ee
 801e1f0:	492b      	ldr	r1, [pc, #172]	@ (801e2a0 <tcp_timewait_input+0xd0>)
 801e1f2:	482c      	ldr	r0, [pc, #176]	@ (801e2a4 <tcp_timewait_input+0xd4>)
 801e1f4:	f00c fc32 	bl	802aa5c <iprintf>

  /* - fourth, check the SYN bit, */
  if (flags & TCP_SYN) {
 801e1f8:	4b27      	ldr	r3, [pc, #156]	@ (801e298 <tcp_timewait_input+0xc8>)
 801e1fa:	781b      	ldrb	r3, [r3, #0]
 801e1fc:	f003 0302 	and.w	r3, r3, #2
 801e200:	2b00      	cmp	r3, #0
 801e202:	d02a      	beq.n	801e25a <tcp_timewait_input+0x8a>
    /* If an incoming segment is not acceptable, an acknowledgment
       should be sent in reply */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd)) {
 801e204:	4b28      	ldr	r3, [pc, #160]	@ (801e2a8 <tcp_timewait_input+0xd8>)
 801e206:	681a      	ldr	r2, [r3, #0]
 801e208:	687b      	ldr	r3, [r7, #4]
 801e20a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e20c:	1ad3      	subs	r3, r2, r3
 801e20e:	2b00      	cmp	r3, #0
 801e210:	db2d      	blt.n	801e26e <tcp_timewait_input+0x9e>
 801e212:	4b25      	ldr	r3, [pc, #148]	@ (801e2a8 <tcp_timewait_input+0xd8>)
 801e214:	681a      	ldr	r2, [r3, #0]
 801e216:	687b      	ldr	r3, [r7, #4]
 801e218:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e21a:	6879      	ldr	r1, [r7, #4]
 801e21c:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801e21e:	440b      	add	r3, r1
 801e220:	1ad3      	subs	r3, r2, r3
 801e222:	2b00      	cmp	r3, #0
 801e224:	dc23      	bgt.n	801e26e <tcp_timewait_input+0x9e>
      /* If the SYN is in the window it is an error, send a reset */
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e226:	4b21      	ldr	r3, [pc, #132]	@ (801e2ac <tcp_timewait_input+0xdc>)
 801e228:	6819      	ldr	r1, [r3, #0]
 801e22a:	4b21      	ldr	r3, [pc, #132]	@ (801e2b0 <tcp_timewait_input+0xe0>)
 801e22c:	881b      	ldrh	r3, [r3, #0]
 801e22e:	461a      	mov	r2, r3
 801e230:	4b1d      	ldr	r3, [pc, #116]	@ (801e2a8 <tcp_timewait_input+0xd8>)
 801e232:	681b      	ldr	r3, [r3, #0]
 801e234:	18d0      	adds	r0, r2, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e236:	4b1f      	ldr	r3, [pc, #124]	@ (801e2b4 <tcp_timewait_input+0xe4>)
 801e238:	681b      	ldr	r3, [r3, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e23a:	885b      	ldrh	r3, [r3, #2]
 801e23c:	b29b      	uxth	r3, r3
              ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e23e:	4a1d      	ldr	r2, [pc, #116]	@ (801e2b4 <tcp_timewait_input+0xe4>)
 801e240:	6812      	ldr	r2, [r2, #0]
      tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e242:	8812      	ldrh	r2, [r2, #0]
 801e244:	b292      	uxth	r2, r2
 801e246:	9202      	str	r2, [sp, #8]
 801e248:	9301      	str	r3, [sp, #4]
 801e24a:	4b1b      	ldr	r3, [pc, #108]	@ (801e2b8 <tcp_timewait_input+0xe8>)
 801e24c:	9300      	str	r3, [sp, #0]
 801e24e:	4b1b      	ldr	r3, [pc, #108]	@ (801e2bc <tcp_timewait_input+0xec>)
 801e250:	4602      	mov	r2, r0
 801e252:	6878      	ldr	r0, [r7, #4]
 801e254:	f003 fb38 	bl	80218c8 <tcp_rst>
      return;
 801e258:	e01b      	b.n	801e292 <tcp_timewait_input+0xc2>
    }
  } else if (flags & TCP_FIN) {
 801e25a:	4b0f      	ldr	r3, [pc, #60]	@ (801e298 <tcp_timewait_input+0xc8>)
 801e25c:	781b      	ldrb	r3, [r3, #0]
 801e25e:	f003 0301 	and.w	r3, r3, #1
 801e262:	2b00      	cmp	r3, #0
 801e264:	d003      	beq.n	801e26e <tcp_timewait_input+0x9e>
    /* - eighth, check the FIN bit: Remain in the TIME-WAIT state.
         Restart the 2 MSL time-wait timeout.*/
    pcb->tmr = tcp_ticks;
 801e266:	4b16      	ldr	r3, [pc, #88]	@ (801e2c0 <tcp_timewait_input+0xf0>)
 801e268:	681a      	ldr	r2, [r3, #0]
 801e26a:	687b      	ldr	r3, [r7, #4]
 801e26c:	621a      	str	r2, [r3, #32]
  }

  if ((tcplen > 0)) {
 801e26e:	4b10      	ldr	r3, [pc, #64]	@ (801e2b0 <tcp_timewait_input+0xe0>)
 801e270:	881b      	ldrh	r3, [r3, #0]
 801e272:	2b00      	cmp	r3, #0
 801e274:	d00c      	beq.n	801e290 <tcp_timewait_input+0xc0>
    /* Acknowledge data, FIN or out-of-window SYN */
    tcp_ack_now(pcb);
 801e276:	687b      	ldr	r3, [r7, #4]
 801e278:	8b5b      	ldrh	r3, [r3, #26]
 801e27a:	f043 0302 	orr.w	r3, r3, #2
 801e27e:	b29a      	uxth	r2, r3
 801e280:	687b      	ldr	r3, [r7, #4]
 801e282:	835a      	strh	r2, [r3, #26]
    tcp_output(pcb);
 801e284:	6878      	ldr	r0, [r7, #4]
 801e286:	f002 fd5d 	bl	8020d44 <tcp_output>
  }
  return;
 801e28a:	e001      	b.n	801e290 <tcp_timewait_input+0xc0>
    return;
 801e28c:	bf00      	nop
 801e28e:	e000      	b.n	801e292 <tcp_timewait_input+0xc2>
  return;
 801e290:	bf00      	nop
}
 801e292:	3708      	adds	r7, #8
 801e294:	46bd      	mov	sp, r7
 801e296:	bd80      	pop	{r7, pc}
 801e298:	2402aff0 	.word	0x2402aff0
 801e29c:	0802ff88 	.word	0x0802ff88
 801e2a0:	080301a0 	.word	0x080301a0
 801e2a4:	0802ffd4 	.word	0x0802ffd4
 801e2a8:	2402afe4 	.word	0x2402afe4
 801e2ac:	2402afe8 	.word	0x2402afe8
 801e2b0:	2402afee 	.word	0x2402afee
 801e2b4:	2402afd4 	.word	0x2402afd4
 801e2b8:	24024468 	.word	0x24024468
 801e2bc:	2402446c 	.word	0x2402446c
 801e2c0:	2402afa8 	.word	0x2402afa8

0801e2c4 <tcp_process>:
 * @note the segment which arrived is saved in global variables, therefore only the pcb
 *       involved is passed as a parameter to this function
 */
static err_t
tcp_process(struct tcp_pcb *pcb)
{
 801e2c4:	b590      	push	{r4, r7, lr}
 801e2c6:	b08d      	sub	sp, #52	@ 0x34
 801e2c8:	af04      	add	r7, sp, #16
 801e2ca:	6078      	str	r0, [r7, #4]
  struct tcp_seg *rseg;
  u8_t acceptable = 0;
 801e2cc:	2300      	movs	r3, #0
 801e2ce:	77fb      	strb	r3, [r7, #31]
  err_t err;

  err = ERR_OK;
 801e2d0:	2300      	movs	r3, #0
 801e2d2:	77bb      	strb	r3, [r7, #30]

  LWIP_ASSERT("tcp_process: invalid pcb", pcb != NULL);
 801e2d4:	687b      	ldr	r3, [r7, #4]
 801e2d6:	2b00      	cmp	r3, #0
 801e2d8:	d106      	bne.n	801e2e8 <tcp_process+0x24>
 801e2da:	4b9d      	ldr	r3, [pc, #628]	@ (801e550 <tcp_process+0x28c>)
 801e2dc:	f44f 7247 	mov.w	r2, #796	@ 0x31c
 801e2e0:	499c      	ldr	r1, [pc, #624]	@ (801e554 <tcp_process+0x290>)
 801e2e2:	489d      	ldr	r0, [pc, #628]	@ (801e558 <tcp_process+0x294>)
 801e2e4:	f00c fbba 	bl	802aa5c <iprintf>

  /* Process incoming RST segments. */
  if (flags & TCP_RST) {
 801e2e8:	4b9c      	ldr	r3, [pc, #624]	@ (801e55c <tcp_process+0x298>)
 801e2ea:	781b      	ldrb	r3, [r3, #0]
 801e2ec:	f003 0304 	and.w	r3, r3, #4
 801e2f0:	2b00      	cmp	r3, #0
 801e2f2:	d04e      	beq.n	801e392 <tcp_process+0xce>
    /* First, determine if the reset is acceptable. */
    if (pcb->state == SYN_SENT) {
 801e2f4:	687b      	ldr	r3, [r7, #4]
 801e2f6:	7d1b      	ldrb	r3, [r3, #20]
 801e2f8:	2b02      	cmp	r3, #2
 801e2fa:	d108      	bne.n	801e30e <tcp_process+0x4a>
      /* "In the SYN-SENT state (a RST received in response to an initial SYN),
          the RST is acceptable if the ACK field acknowledges the SYN." */
      if (ackno == pcb->snd_nxt) {
 801e2fc:	687b      	ldr	r3, [r7, #4]
 801e2fe:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e300:	4b97      	ldr	r3, [pc, #604]	@ (801e560 <tcp_process+0x29c>)
 801e302:	681b      	ldr	r3, [r3, #0]
 801e304:	429a      	cmp	r2, r3
 801e306:	d123      	bne.n	801e350 <tcp_process+0x8c>
        acceptable = 1;
 801e308:	2301      	movs	r3, #1
 801e30a:	77fb      	strb	r3, [r7, #31]
 801e30c:	e020      	b.n	801e350 <tcp_process+0x8c>
      }
    } else {
      /* "In all states except SYN-SENT, all reset (RST) segments are validated
          by checking their SEQ-fields." */
      if (seqno == pcb->rcv_nxt) {
 801e30e:	687b      	ldr	r3, [r7, #4]
 801e310:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e312:	4b94      	ldr	r3, [pc, #592]	@ (801e564 <tcp_process+0x2a0>)
 801e314:	681b      	ldr	r3, [r3, #0]
 801e316:	429a      	cmp	r2, r3
 801e318:	d102      	bne.n	801e320 <tcp_process+0x5c>
        acceptable = 1;
 801e31a:	2301      	movs	r3, #1
 801e31c:	77fb      	strb	r3, [r7, #31]
 801e31e:	e017      	b.n	801e350 <tcp_process+0x8c>
      } else  if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801e320:	4b90      	ldr	r3, [pc, #576]	@ (801e564 <tcp_process+0x2a0>)
 801e322:	681a      	ldr	r2, [r3, #0]
 801e324:	687b      	ldr	r3, [r7, #4]
 801e326:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e328:	1ad3      	subs	r3, r2, r3
 801e32a:	2b00      	cmp	r3, #0
 801e32c:	db10      	blt.n	801e350 <tcp_process+0x8c>
 801e32e:	4b8d      	ldr	r3, [pc, #564]	@ (801e564 <tcp_process+0x2a0>)
 801e330:	681a      	ldr	r2, [r3, #0]
 801e332:	687b      	ldr	r3, [r7, #4]
 801e334:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e336:	6879      	ldr	r1, [r7, #4]
 801e338:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801e33a:	440b      	add	r3, r1
 801e33c:	1ad3      	subs	r3, r2, r3
 801e33e:	2b00      	cmp	r3, #0
 801e340:	dc06      	bgt.n	801e350 <tcp_process+0x8c>
                                  pcb->rcv_nxt + pcb->rcv_wnd)) {
        /* If the sequence number is inside the window, we send a challenge ACK
           and wait for a re-send with matching sequence number.
           This follows RFC 5961 section 3.2 and addresses CVE-2004-0230
           (RST spoofing attack), which is present in RFC 793 RST handling. */
        tcp_ack_now(pcb);
 801e342:	687b      	ldr	r3, [r7, #4]
 801e344:	8b5b      	ldrh	r3, [r3, #26]
 801e346:	f043 0302 	orr.w	r3, r3, #2
 801e34a:	b29a      	uxth	r2, r3
 801e34c:	687b      	ldr	r3, [r7, #4]
 801e34e:	835a      	strh	r2, [r3, #26]
      }
    }

    if (acceptable) {
 801e350:	7ffb      	ldrb	r3, [r7, #31]
 801e352:	2b00      	cmp	r3, #0
 801e354:	d01b      	beq.n	801e38e <tcp_process+0xca>
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n"));
      LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED);
 801e356:	687b      	ldr	r3, [r7, #4]
 801e358:	7d1b      	ldrb	r3, [r3, #20]
 801e35a:	2b00      	cmp	r3, #0
 801e35c:	d106      	bne.n	801e36c <tcp_process+0xa8>
 801e35e:	4b7c      	ldr	r3, [pc, #496]	@ (801e550 <tcp_process+0x28c>)
 801e360:	f44f 724e 	mov.w	r2, #824	@ 0x338
 801e364:	4980      	ldr	r1, [pc, #512]	@ (801e568 <tcp_process+0x2a4>)
 801e366:	487c      	ldr	r0, [pc, #496]	@ (801e558 <tcp_process+0x294>)
 801e368:	f00c fb78 	bl	802aa5c <iprintf>
      recv_flags |= TF_RESET;
 801e36c:	4b7f      	ldr	r3, [pc, #508]	@ (801e56c <tcp_process+0x2a8>)
 801e36e:	781b      	ldrb	r3, [r3, #0]
 801e370:	f043 0308 	orr.w	r3, r3, #8
 801e374:	b2da      	uxtb	r2, r3
 801e376:	4b7d      	ldr	r3, [pc, #500]	@ (801e56c <tcp_process+0x2a8>)
 801e378:	701a      	strb	r2, [r3, #0]
      tcp_clear_flags(pcb, TF_ACK_DELAY);
 801e37a:	687b      	ldr	r3, [r7, #4]
 801e37c:	8b5b      	ldrh	r3, [r3, #26]
 801e37e:	f023 0301 	bic.w	r3, r3, #1
 801e382:	b29a      	uxth	r2, r3
 801e384:	687b      	ldr	r3, [r7, #4]
 801e386:	835a      	strh	r2, [r3, #26]
      return ERR_RST;
 801e388:	f06f 030d 	mvn.w	r3, #13
 801e38c:	e37a      	b.n	801ea84 <tcp_process+0x7c0>
    } else {
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                                    seqno, pcb->rcv_nxt));
      LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n",
                              seqno, pcb->rcv_nxt));
      return ERR_OK;
 801e38e:	2300      	movs	r3, #0
 801e390:	e378      	b.n	801ea84 <tcp_process+0x7c0>
    }
  }

  if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) {
 801e392:	4b72      	ldr	r3, [pc, #456]	@ (801e55c <tcp_process+0x298>)
 801e394:	781b      	ldrb	r3, [r3, #0]
 801e396:	f003 0302 	and.w	r3, r3, #2
 801e39a:	2b00      	cmp	r3, #0
 801e39c:	d010      	beq.n	801e3c0 <tcp_process+0xfc>
 801e39e:	687b      	ldr	r3, [r7, #4]
 801e3a0:	7d1b      	ldrb	r3, [r3, #20]
 801e3a2:	2b02      	cmp	r3, #2
 801e3a4:	d00c      	beq.n	801e3c0 <tcp_process+0xfc>
 801e3a6:	687b      	ldr	r3, [r7, #4]
 801e3a8:	7d1b      	ldrb	r3, [r3, #20]
 801e3aa:	2b03      	cmp	r3, #3
 801e3ac:	d008      	beq.n	801e3c0 <tcp_process+0xfc>
    /* Cope with new connection attempt after remote end crashed */
    tcp_ack_now(pcb);
 801e3ae:	687b      	ldr	r3, [r7, #4]
 801e3b0:	8b5b      	ldrh	r3, [r3, #26]
 801e3b2:	f043 0302 	orr.w	r3, r3, #2
 801e3b6:	b29a      	uxth	r2, r3
 801e3b8:	687b      	ldr	r3, [r7, #4]
 801e3ba:	835a      	strh	r2, [r3, #26]
    return ERR_OK;
 801e3bc:	2300      	movs	r3, #0
 801e3be:	e361      	b.n	801ea84 <tcp_process+0x7c0>
  }

  if ((pcb->flags & TF_RXCLOSED) == 0) {
 801e3c0:	687b      	ldr	r3, [r7, #4]
 801e3c2:	8b5b      	ldrh	r3, [r3, #26]
 801e3c4:	f003 0310 	and.w	r3, r3, #16
 801e3c8:	2b00      	cmp	r3, #0
 801e3ca:	d103      	bne.n	801e3d4 <tcp_process+0x110>
    /* Update the PCB (in)activity timer unless rx is closed (see tcp_shutdown) */
    pcb->tmr = tcp_ticks;
 801e3cc:	4b68      	ldr	r3, [pc, #416]	@ (801e570 <tcp_process+0x2ac>)
 801e3ce:	681a      	ldr	r2, [r3, #0]
 801e3d0:	687b      	ldr	r3, [r7, #4]
 801e3d2:	621a      	str	r2, [r3, #32]
  }
  pcb->keep_cnt_sent = 0;
 801e3d4:	687b      	ldr	r3, [r7, #4]
 801e3d6:	2200      	movs	r2, #0
 801e3d8:	f883 209b 	strb.w	r2, [r3, #155]	@ 0x9b
  pcb->persist_probe = 0;
 801e3dc:	687b      	ldr	r3, [r7, #4]
 801e3de:	2200      	movs	r2, #0
 801e3e0:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a

  tcp_parseopt(pcb);
 801e3e4:	6878      	ldr	r0, [r7, #4]
 801e3e6:	f001 fc2b 	bl	801fc40 <tcp_parseopt>

  /* Do different things depending on the TCP state. */
  switch (pcb->state) {
 801e3ea:	687b      	ldr	r3, [r7, #4]
 801e3ec:	7d1b      	ldrb	r3, [r3, #20]
 801e3ee:	3b02      	subs	r3, #2
 801e3f0:	2b07      	cmp	r3, #7
 801e3f2:	f200 8337 	bhi.w	801ea64 <tcp_process+0x7a0>
 801e3f6:	a201      	add	r2, pc, #4	@ (adr r2, 801e3fc <tcp_process+0x138>)
 801e3f8:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 801e3fc:	0801e41d 	.word	0x0801e41d
 801e400:	0801e64d 	.word	0x0801e64d
 801e404:	0801e7c5 	.word	0x0801e7c5
 801e408:	0801e7ef 	.word	0x0801e7ef
 801e40c:	0801e913 	.word	0x0801e913
 801e410:	0801e7c5 	.word	0x0801e7c5
 801e414:	0801e99f 	.word	0x0801e99f
 801e418:	0801ea2f 	.word	0x0801ea2f
    case SYN_SENT:
      LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno,
                                    pcb->snd_nxt, lwip_ntohl(pcb->unacked->tcphdr->seqno)));
      /* received SYN ACK with expected sequence number? */
      if ((flags & TCP_ACK) && (flags & TCP_SYN)
 801e41c:	4b4f      	ldr	r3, [pc, #316]	@ (801e55c <tcp_process+0x298>)
 801e41e:	781b      	ldrb	r3, [r3, #0]
 801e420:	f003 0310 	and.w	r3, r3, #16
 801e424:	2b00      	cmp	r3, #0
 801e426:	f000 80e4 	beq.w	801e5f2 <tcp_process+0x32e>
 801e42a:	4b4c      	ldr	r3, [pc, #304]	@ (801e55c <tcp_process+0x298>)
 801e42c:	781b      	ldrb	r3, [r3, #0]
 801e42e:	f003 0302 	and.w	r3, r3, #2
 801e432:	2b00      	cmp	r3, #0
 801e434:	f000 80dd 	beq.w	801e5f2 <tcp_process+0x32e>
          && (ackno == pcb->lastack + 1)) {
 801e438:	687b      	ldr	r3, [r7, #4]
 801e43a:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801e43c:	1c5a      	adds	r2, r3, #1
 801e43e:	4b48      	ldr	r3, [pc, #288]	@ (801e560 <tcp_process+0x29c>)
 801e440:	681b      	ldr	r3, [r3, #0]
 801e442:	429a      	cmp	r2, r3
 801e444:	f040 80d5 	bne.w	801e5f2 <tcp_process+0x32e>
        pcb->rcv_nxt = seqno + 1;
 801e448:	4b46      	ldr	r3, [pc, #280]	@ (801e564 <tcp_process+0x2a0>)
 801e44a:	681b      	ldr	r3, [r3, #0]
 801e44c:	1c5a      	adds	r2, r3, #1
 801e44e:	687b      	ldr	r3, [r7, #4]
 801e450:	625a      	str	r2, [r3, #36]	@ 0x24
        pcb->rcv_ann_right_edge = pcb->rcv_nxt;
 801e452:	687b      	ldr	r3, [r7, #4]
 801e454:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801e456:	687b      	ldr	r3, [r7, #4]
 801e458:	62da      	str	r2, [r3, #44]	@ 0x2c
        pcb->lastack = ackno;
 801e45a:	4b41      	ldr	r3, [pc, #260]	@ (801e560 <tcp_process+0x29c>)
 801e45c:	681a      	ldr	r2, [r3, #0]
 801e45e:	687b      	ldr	r3, [r7, #4]
 801e460:	645a      	str	r2, [r3, #68]	@ 0x44
        pcb->snd_wnd = tcphdr->wnd;
 801e462:	4b44      	ldr	r3, [pc, #272]	@ (801e574 <tcp_process+0x2b0>)
 801e464:	681b      	ldr	r3, [r3, #0]
 801e466:	89db      	ldrh	r3, [r3, #14]
 801e468:	b29a      	uxth	r2, r3
 801e46a:	687b      	ldr	r3, [r7, #4]
 801e46c:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
        pcb->snd_wnd_max = pcb->snd_wnd;
 801e470:	687b      	ldr	r3, [r7, #4]
 801e472:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801e476:	687b      	ldr	r3, [r7, #4]
 801e478:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
        pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */
 801e47c:	4b39      	ldr	r3, [pc, #228]	@ (801e564 <tcp_process+0x2a0>)
 801e47e:	681b      	ldr	r3, [r3, #0]
 801e480:	1e5a      	subs	r2, r3, #1
 801e482:	687b      	ldr	r3, [r7, #4]
 801e484:	655a      	str	r2, [r3, #84]	@ 0x54
        pcb->state = ESTABLISHED;
 801e486:	687b      	ldr	r3, [r7, #4]
 801e488:	2204      	movs	r2, #4
 801e48a:	751a      	strb	r2, [r3, #20]

#if TCP_CALCULATE_EFF_SEND_MSS
        pcb->mss = tcp_eff_send_mss(pcb->mss, &pcb->local_ip, &pcb->remote_ip);
 801e48c:	687b      	ldr	r3, [r7, #4]
 801e48e:	8e5c      	ldrh	r4, [r3, #50]	@ 0x32
 801e490:	687b      	ldr	r3, [r7, #4]
 801e492:	3304      	adds	r3, #4
 801e494:	4618      	mov	r0, r3
 801e496:	f007 fad3 	bl	8025a40 <ip4_route>
 801e49a:	4601      	mov	r1, r0
 801e49c:	687b      	ldr	r3, [r7, #4]
 801e49e:	3304      	adds	r3, #4
 801e4a0:	461a      	mov	r2, r3
 801e4a2:	4620      	mov	r0, r4
 801e4a4:	f7ff f88a 	bl	801d5bc <tcp_eff_send_mss_netif>
 801e4a8:	4603      	mov	r3, r0
 801e4aa:	461a      	mov	r2, r3
 801e4ac:	687b      	ldr	r3, [r7, #4]
 801e4ae:	865a      	strh	r2, [r3, #50]	@ 0x32
#endif /* TCP_CALCULATE_EFF_SEND_MSS */

        pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801e4b0:	687b      	ldr	r3, [r7, #4]
 801e4b2:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e4b4:	009a      	lsls	r2, r3, #2
 801e4b6:	687b      	ldr	r3, [r7, #4]
 801e4b8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e4ba:	005b      	lsls	r3, r3, #1
 801e4bc:	f241 111c 	movw	r1, #4380	@ 0x111c
 801e4c0:	428b      	cmp	r3, r1
 801e4c2:	bf38      	it	cc
 801e4c4:	460b      	movcc	r3, r1
 801e4c6:	429a      	cmp	r2, r3
 801e4c8:	d204      	bcs.n	801e4d4 <tcp_process+0x210>
 801e4ca:	687b      	ldr	r3, [r7, #4]
 801e4cc:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e4ce:	009b      	lsls	r3, r3, #2
 801e4d0:	b29b      	uxth	r3, r3
 801e4d2:	e00d      	b.n	801e4f0 <tcp_process+0x22c>
 801e4d4:	687b      	ldr	r3, [r7, #4]
 801e4d6:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e4d8:	005b      	lsls	r3, r3, #1
 801e4da:	f241 121c 	movw	r2, #4380	@ 0x111c
 801e4de:	4293      	cmp	r3, r2
 801e4e0:	d904      	bls.n	801e4ec <tcp_process+0x228>
 801e4e2:	687b      	ldr	r3, [r7, #4]
 801e4e4:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e4e6:	005b      	lsls	r3, r3, #1
 801e4e8:	b29b      	uxth	r3, r3
 801e4ea:	e001      	b.n	801e4f0 <tcp_process+0x22c>
 801e4ec:	f241 131c 	movw	r3, #4380	@ 0x111c
 801e4f0:	687a      	ldr	r2, [r7, #4]
 801e4f2:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
        LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SENT): cwnd %"TCPWNDSIZE_F
                                     " ssthresh %"TCPWNDSIZE_F"\n",
                                     pcb->cwnd, pcb->ssthresh));
        LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0));
 801e4f6:	687b      	ldr	r3, [r7, #4]
 801e4f8:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801e4fc:	2b00      	cmp	r3, #0
 801e4fe:	d106      	bne.n	801e50e <tcp_process+0x24a>
 801e500:	4b13      	ldr	r3, [pc, #76]	@ (801e550 <tcp_process+0x28c>)
 801e502:	f44f 725b 	mov.w	r2, #876	@ 0x36c
 801e506:	491c      	ldr	r1, [pc, #112]	@ (801e578 <tcp_process+0x2b4>)
 801e508:	4813      	ldr	r0, [pc, #76]	@ (801e558 <tcp_process+0x294>)
 801e50a:	f00c faa7 	bl	802aa5c <iprintf>
        --pcb->snd_queuelen;
 801e50e:	687b      	ldr	r3, [r7, #4]
 801e510:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801e514:	3b01      	subs	r3, #1
 801e516:	b29a      	uxth	r2, r3
 801e518:	687b      	ldr	r3, [r7, #4]
 801e51a:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
        LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));
        rseg = pcb->unacked;
 801e51e:	687b      	ldr	r3, [r7, #4]
 801e520:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e522:	617b      	str	r3, [r7, #20]
        if (rseg == NULL) {
 801e524:	697b      	ldr	r3, [r7, #20]
 801e526:	2b00      	cmp	r3, #0
 801e528:	d12a      	bne.n	801e580 <tcp_process+0x2bc>
          /* might happen if tcp_output fails in tcp_rexmit_rto()
             in which case the segment is on the unsent list */
          rseg = pcb->unsent;
 801e52a:	687b      	ldr	r3, [r7, #4]
 801e52c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e52e:	617b      	str	r3, [r7, #20]
          LWIP_ASSERT("no segment to free", rseg != NULL);
 801e530:	697b      	ldr	r3, [r7, #20]
 801e532:	2b00      	cmp	r3, #0
 801e534:	d106      	bne.n	801e544 <tcp_process+0x280>
 801e536:	4b06      	ldr	r3, [pc, #24]	@ (801e550 <tcp_process+0x28c>)
 801e538:	f44f 725d 	mov.w	r2, #884	@ 0x374
 801e53c:	490f      	ldr	r1, [pc, #60]	@ (801e57c <tcp_process+0x2b8>)
 801e53e:	4806      	ldr	r0, [pc, #24]	@ (801e558 <tcp_process+0x294>)
 801e540:	f00c fa8c 	bl	802aa5c <iprintf>
          pcb->unsent = rseg->next;
 801e544:	697b      	ldr	r3, [r7, #20]
 801e546:	681a      	ldr	r2, [r3, #0]
 801e548:	687b      	ldr	r3, [r7, #4]
 801e54a:	66da      	str	r2, [r3, #108]	@ 0x6c
 801e54c:	e01c      	b.n	801e588 <tcp_process+0x2c4>
 801e54e:	bf00      	nop
 801e550:	0802ff88 	.word	0x0802ff88
 801e554:	080301c0 	.word	0x080301c0
 801e558:	0802ffd4 	.word	0x0802ffd4
 801e55c:	2402aff0 	.word	0x2402aff0
 801e560:	2402afe8 	.word	0x2402afe8
 801e564:	2402afe4 	.word	0x2402afe4
 801e568:	080301dc 	.word	0x080301dc
 801e56c:	2402aff1 	.word	0x2402aff1
 801e570:	2402afa8 	.word	0x2402afa8
 801e574:	2402afd4 	.word	0x2402afd4
 801e578:	080301fc 	.word	0x080301fc
 801e57c:	08030214 	.word	0x08030214
        } else {
          pcb->unacked = rseg->next;
 801e580:	697b      	ldr	r3, [r7, #20]
 801e582:	681a      	ldr	r2, [r3, #0]
 801e584:	687b      	ldr	r3, [r7, #4]
 801e586:	671a      	str	r2, [r3, #112]	@ 0x70
        }
        tcp_seg_free(rseg);
 801e588:	6978      	ldr	r0, [r7, #20]
 801e58a:	f7fe fc48 	bl	801ce1e <tcp_seg_free>

        /* If there's nothing left to acknowledge, stop the retransmit
           timer, otherwise reset it to start again */
        if (pcb->unacked == NULL) {
 801e58e:	687b      	ldr	r3, [r7, #4]
 801e590:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801e592:	2b00      	cmp	r3, #0
 801e594:	d104      	bne.n	801e5a0 <tcp_process+0x2dc>
          pcb->rtime = -1;
 801e596:	687b      	ldr	r3, [r7, #4]
 801e598:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801e59c:	861a      	strh	r2, [r3, #48]	@ 0x30
 801e59e:	e006      	b.n	801e5ae <tcp_process+0x2ea>
        } else {
          pcb->rtime = 0;
 801e5a0:	687b      	ldr	r3, [r7, #4]
 801e5a2:	2200      	movs	r2, #0
 801e5a4:	861a      	strh	r2, [r3, #48]	@ 0x30
          pcb->nrtx = 0;
 801e5a6:	687b      	ldr	r3, [r7, #4]
 801e5a8:	2200      	movs	r2, #0
 801e5aa:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
        }

        /* Call the user specified function to call when successfully
         * connected. */
        TCP_EVENT_CONNECTED(pcb, ERR_OK, err);
 801e5ae:	687b      	ldr	r3, [r7, #4]
 801e5b0:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801e5b4:	2b00      	cmp	r3, #0
 801e5b6:	d00a      	beq.n	801e5ce <tcp_process+0x30a>
 801e5b8:	687b      	ldr	r3, [r7, #4]
 801e5ba:	f8d3 3088 	ldr.w	r3, [r3, #136]	@ 0x88
 801e5be:	687a      	ldr	r2, [r7, #4]
 801e5c0:	6910      	ldr	r0, [r2, #16]
 801e5c2:	2200      	movs	r2, #0
 801e5c4:	6879      	ldr	r1, [r7, #4]
 801e5c6:	4798      	blx	r3
 801e5c8:	4603      	mov	r3, r0
 801e5ca:	77bb      	strb	r3, [r7, #30]
 801e5cc:	e001      	b.n	801e5d2 <tcp_process+0x30e>
 801e5ce:	2300      	movs	r3, #0
 801e5d0:	77bb      	strb	r3, [r7, #30]
        if (err == ERR_ABRT) {
 801e5d2:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801e5d6:	f113 0f0d 	cmn.w	r3, #13
 801e5da:	d102      	bne.n	801e5e2 <tcp_process+0x31e>
          return ERR_ABRT;
 801e5dc:	f06f 030c 	mvn.w	r3, #12
 801e5e0:	e250      	b.n	801ea84 <tcp_process+0x7c0>
        }
        tcp_ack_now(pcb);
 801e5e2:	687b      	ldr	r3, [r7, #4]
 801e5e4:	8b5b      	ldrh	r3, [r3, #26]
 801e5e6:	f043 0302 	orr.w	r3, r3, #2
 801e5ea:	b29a      	uxth	r2, r3
 801e5ec:	687b      	ldr	r3, [r7, #4]
 801e5ee:	835a      	strh	r2, [r3, #26]
        if (pcb->nrtx < TCP_SYNMAXRTX) {
          pcb->rtime = 0;
          tcp_rexmit_rto(pcb);
        }
      }
      break;
 801e5f0:	e23a      	b.n	801ea68 <tcp_process+0x7a4>
      else if (flags & TCP_ACK) {
 801e5f2:	4b98      	ldr	r3, [pc, #608]	@ (801e854 <tcp_process+0x590>)
 801e5f4:	781b      	ldrb	r3, [r3, #0]
 801e5f6:	f003 0310 	and.w	r3, r3, #16
 801e5fa:	2b00      	cmp	r3, #0
 801e5fc:	f000 8234 	beq.w	801ea68 <tcp_process+0x7a4>
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e600:	4b95      	ldr	r3, [pc, #596]	@ (801e858 <tcp_process+0x594>)
 801e602:	6819      	ldr	r1, [r3, #0]
 801e604:	4b95      	ldr	r3, [pc, #596]	@ (801e85c <tcp_process+0x598>)
 801e606:	881b      	ldrh	r3, [r3, #0]
 801e608:	461a      	mov	r2, r3
 801e60a:	4b95      	ldr	r3, [pc, #596]	@ (801e860 <tcp_process+0x59c>)
 801e60c:	681b      	ldr	r3, [r3, #0]
 801e60e:	18d0      	adds	r0, r2, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e610:	4b94      	ldr	r3, [pc, #592]	@ (801e864 <tcp_process+0x5a0>)
 801e612:	681b      	ldr	r3, [r3, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e614:	885b      	ldrh	r3, [r3, #2]
 801e616:	b29b      	uxth	r3, r3
                ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e618:	4a92      	ldr	r2, [pc, #584]	@ (801e864 <tcp_process+0x5a0>)
 801e61a:	6812      	ldr	r2, [r2, #0]
        tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e61c:	8812      	ldrh	r2, [r2, #0]
 801e61e:	b292      	uxth	r2, r2
 801e620:	9202      	str	r2, [sp, #8]
 801e622:	9301      	str	r3, [sp, #4]
 801e624:	4b90      	ldr	r3, [pc, #576]	@ (801e868 <tcp_process+0x5a4>)
 801e626:	9300      	str	r3, [sp, #0]
 801e628:	4b90      	ldr	r3, [pc, #576]	@ (801e86c <tcp_process+0x5a8>)
 801e62a:	4602      	mov	r2, r0
 801e62c:	6878      	ldr	r0, [r7, #4]
 801e62e:	f003 f94b 	bl	80218c8 <tcp_rst>
        if (pcb->nrtx < TCP_SYNMAXRTX) {
 801e632:	687b      	ldr	r3, [r7, #4]
 801e634:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 801e638:	2b05      	cmp	r3, #5
 801e63a:	f200 8215 	bhi.w	801ea68 <tcp_process+0x7a4>
          pcb->rtime = 0;
 801e63e:	687b      	ldr	r3, [r7, #4]
 801e640:	2200      	movs	r2, #0
 801e642:	861a      	strh	r2, [r3, #48]	@ 0x30
          tcp_rexmit_rto(pcb);
 801e644:	6878      	ldr	r0, [r7, #4]
 801e646:	f002 ff17 	bl	8021478 <tcp_rexmit_rto>
      break;
 801e64a:	e20d      	b.n	801ea68 <tcp_process+0x7a4>
    case SYN_RCVD:
      if (flags & TCP_ACK) {
 801e64c:	4b81      	ldr	r3, [pc, #516]	@ (801e854 <tcp_process+0x590>)
 801e64e:	781b      	ldrb	r3, [r3, #0]
 801e650:	f003 0310 	and.w	r3, r3, #16
 801e654:	2b00      	cmp	r3, #0
 801e656:	f000 80a1 	beq.w	801e79c <tcp_process+0x4d8>
        /* expected ACK number? */
        if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801e65a:	4b7f      	ldr	r3, [pc, #508]	@ (801e858 <tcp_process+0x594>)
 801e65c:	681a      	ldr	r2, [r3, #0]
 801e65e:	687b      	ldr	r3, [r7, #4]
 801e660:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801e662:	1ad3      	subs	r3, r2, r3
 801e664:	3b01      	subs	r3, #1
 801e666:	2b00      	cmp	r3, #0
 801e668:	db7e      	blt.n	801e768 <tcp_process+0x4a4>
 801e66a:	4b7b      	ldr	r3, [pc, #492]	@ (801e858 <tcp_process+0x594>)
 801e66c:	681a      	ldr	r2, [r3, #0]
 801e66e:	687b      	ldr	r3, [r7, #4]
 801e670:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801e672:	1ad3      	subs	r3, r2, r3
 801e674:	2b00      	cmp	r3, #0
 801e676:	dc77      	bgt.n	801e768 <tcp_process+0x4a4>
          pcb->state = ESTABLISHED;
 801e678:	687b      	ldr	r3, [r7, #4]
 801e67a:	2204      	movs	r2, #4
 801e67c:	751a      	strb	r2, [r3, #20]
          LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
#if LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG
          if (pcb->listener == NULL) {
 801e67e:	687b      	ldr	r3, [r7, #4]
 801e680:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801e682:	2b00      	cmp	r3, #0
 801e684:	d102      	bne.n	801e68c <tcp_process+0x3c8>
            /* listen pcb might be closed by now */
            err = ERR_VAL;
 801e686:	23fa      	movs	r3, #250	@ 0xfa
 801e688:	77bb      	strb	r3, [r7, #30]
 801e68a:	e01d      	b.n	801e6c8 <tcp_process+0x404>
          } else
#endif /* LWIP_CALLBACK_API || TCP_LISTEN_BACKLOG */
          {
#if LWIP_CALLBACK_API
            LWIP_ASSERT("pcb->listener->accept != NULL", pcb->listener->accept != NULL);
 801e68c:	687b      	ldr	r3, [r7, #4]
 801e68e:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801e690:	699b      	ldr	r3, [r3, #24]
 801e692:	2b00      	cmp	r3, #0
 801e694:	d106      	bne.n	801e6a4 <tcp_process+0x3e0>
 801e696:	4b76      	ldr	r3, [pc, #472]	@ (801e870 <tcp_process+0x5ac>)
 801e698:	f44f 726a 	mov.w	r2, #936	@ 0x3a8
 801e69c:	4975      	ldr	r1, [pc, #468]	@ (801e874 <tcp_process+0x5b0>)
 801e69e:	4876      	ldr	r0, [pc, #472]	@ (801e878 <tcp_process+0x5b4>)
 801e6a0:	f00c f9dc 	bl	802aa5c <iprintf>
#endif
            tcp_backlog_accepted(pcb);
            /* Call the accept function. */
            TCP_EVENT_ACCEPT(pcb->listener, pcb, pcb->callback_arg, ERR_OK, err);
 801e6a4:	687b      	ldr	r3, [r7, #4]
 801e6a6:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801e6a8:	699b      	ldr	r3, [r3, #24]
 801e6aa:	2b00      	cmp	r3, #0
 801e6ac:	d00a      	beq.n	801e6c4 <tcp_process+0x400>
 801e6ae:	687b      	ldr	r3, [r7, #4]
 801e6b0:	6fdb      	ldr	r3, [r3, #124]	@ 0x7c
 801e6b2:	699b      	ldr	r3, [r3, #24]
 801e6b4:	687a      	ldr	r2, [r7, #4]
 801e6b6:	6910      	ldr	r0, [r2, #16]
 801e6b8:	2200      	movs	r2, #0
 801e6ba:	6879      	ldr	r1, [r7, #4]
 801e6bc:	4798      	blx	r3
 801e6be:	4603      	mov	r3, r0
 801e6c0:	77bb      	strb	r3, [r7, #30]
 801e6c2:	e001      	b.n	801e6c8 <tcp_process+0x404>
 801e6c4:	23f0      	movs	r3, #240	@ 0xf0
 801e6c6:	77bb      	strb	r3, [r7, #30]
          }
          if (err != ERR_OK) {
 801e6c8:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801e6cc:	2b00      	cmp	r3, #0
 801e6ce:	d00a      	beq.n	801e6e6 <tcp_process+0x422>
            /* If the accept function returns with an error, we abort
             * the connection. */
            /* Already aborted? */
            if (err != ERR_ABRT) {
 801e6d0:	f997 301e 	ldrsb.w	r3, [r7, #30]
 801e6d4:	f113 0f0d 	cmn.w	r3, #13
 801e6d8:	d002      	beq.n	801e6e0 <tcp_process+0x41c>
              tcp_abort(pcb);
 801e6da:	6878      	ldr	r0, [r7, #4]
 801e6dc:	f7fd fd4c 	bl	801c178 <tcp_abort>
            }
            return ERR_ABRT;
 801e6e0:	f06f 030c 	mvn.w	r3, #12
 801e6e4:	e1ce      	b.n	801ea84 <tcp_process+0x7c0>
          }
          /* If there was any data contained within this ACK,
           * we'd better pass it on to the application as well. */
          tcp_receive(pcb);
 801e6e6:	6878      	ldr	r0, [r7, #4]
 801e6e8:	f000 fae0 	bl	801ecac <tcp_receive>

          /* Prevent ACK for SYN to generate a sent event */
          if (recv_acked != 0) {
 801e6ec:	4b63      	ldr	r3, [pc, #396]	@ (801e87c <tcp_process+0x5b8>)
 801e6ee:	881b      	ldrh	r3, [r3, #0]
 801e6f0:	2b00      	cmp	r3, #0
 801e6f2:	d005      	beq.n	801e700 <tcp_process+0x43c>
            recv_acked--;
 801e6f4:	4b61      	ldr	r3, [pc, #388]	@ (801e87c <tcp_process+0x5b8>)
 801e6f6:	881b      	ldrh	r3, [r3, #0]
 801e6f8:	3b01      	subs	r3, #1
 801e6fa:	b29a      	uxth	r2, r3
 801e6fc:	4b5f      	ldr	r3, [pc, #380]	@ (801e87c <tcp_process+0x5b8>)
 801e6fe:	801a      	strh	r2, [r3, #0]
          }

          pcb->cwnd = LWIP_TCP_CALC_INITIAL_CWND(pcb->mss);
 801e700:	687b      	ldr	r3, [r7, #4]
 801e702:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e704:	009a      	lsls	r2, r3, #2
 801e706:	687b      	ldr	r3, [r7, #4]
 801e708:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e70a:	005b      	lsls	r3, r3, #1
 801e70c:	f241 111c 	movw	r1, #4380	@ 0x111c
 801e710:	428b      	cmp	r3, r1
 801e712:	bf38      	it	cc
 801e714:	460b      	movcc	r3, r1
 801e716:	429a      	cmp	r2, r3
 801e718:	d204      	bcs.n	801e724 <tcp_process+0x460>
 801e71a:	687b      	ldr	r3, [r7, #4]
 801e71c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e71e:	009b      	lsls	r3, r3, #2
 801e720:	b29b      	uxth	r3, r3
 801e722:	e00d      	b.n	801e740 <tcp_process+0x47c>
 801e724:	687b      	ldr	r3, [r7, #4]
 801e726:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e728:	005b      	lsls	r3, r3, #1
 801e72a:	f241 121c 	movw	r2, #4380	@ 0x111c
 801e72e:	4293      	cmp	r3, r2
 801e730:	d904      	bls.n	801e73c <tcp_process+0x478>
 801e732:	687b      	ldr	r3, [r7, #4]
 801e734:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801e736:	005b      	lsls	r3, r3, #1
 801e738:	b29b      	uxth	r3, r3
 801e73a:	e001      	b.n	801e740 <tcp_process+0x47c>
 801e73c:	f241 131c 	movw	r3, #4380	@ 0x111c
 801e740:	687a      	ldr	r2, [r7, #4]
 801e742:	f8a2 3048 	strh.w	r3, [r2, #72]	@ 0x48
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_process (SYN_RCVD): cwnd %"TCPWNDSIZE_F
                                       " ssthresh %"TCPWNDSIZE_F"\n",
                                       pcb->cwnd, pcb->ssthresh));

          if (recv_flags & TF_GOT_FIN) {
 801e746:	4b4e      	ldr	r3, [pc, #312]	@ (801e880 <tcp_process+0x5bc>)
 801e748:	781b      	ldrb	r3, [r3, #0]
 801e74a:	f003 0320 	and.w	r3, r3, #32
 801e74e:	2b00      	cmp	r3, #0
 801e750:	d037      	beq.n	801e7c2 <tcp_process+0x4fe>
            tcp_ack_now(pcb);
 801e752:	687b      	ldr	r3, [r7, #4]
 801e754:	8b5b      	ldrh	r3, [r3, #26]
 801e756:	f043 0302 	orr.w	r3, r3, #2
 801e75a:	b29a      	uxth	r2, r3
 801e75c:	687b      	ldr	r3, [r7, #4]
 801e75e:	835a      	strh	r2, [r3, #26]
            pcb->state = CLOSE_WAIT;
 801e760:	687b      	ldr	r3, [r7, #4]
 801e762:	2207      	movs	r2, #7
 801e764:	751a      	strb	r2, [r3, #20]
          if (recv_flags & TF_GOT_FIN) {
 801e766:	e02c      	b.n	801e7c2 <tcp_process+0x4fe>
          }
        } else {
          /* incorrect ACK number, send RST */
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e768:	4b3b      	ldr	r3, [pc, #236]	@ (801e858 <tcp_process+0x594>)
 801e76a:	6819      	ldr	r1, [r3, #0]
 801e76c:	4b3b      	ldr	r3, [pc, #236]	@ (801e85c <tcp_process+0x598>)
 801e76e:	881b      	ldrh	r3, [r3, #0]
 801e770:	461a      	mov	r2, r3
 801e772:	4b3b      	ldr	r3, [pc, #236]	@ (801e860 <tcp_process+0x59c>)
 801e774:	681b      	ldr	r3, [r3, #0]
 801e776:	18d0      	adds	r0, r2, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e778:	4b3a      	ldr	r3, [pc, #232]	@ (801e864 <tcp_process+0x5a0>)
 801e77a:	681b      	ldr	r3, [r3, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e77c:	885b      	ldrh	r3, [r3, #2]
 801e77e:	b29b      	uxth	r3, r3
                  ip_current_src_addr(), tcphdr->dest, tcphdr->src);
 801e780:	4a38      	ldr	r2, [pc, #224]	@ (801e864 <tcp_process+0x5a0>)
 801e782:	6812      	ldr	r2, [r2, #0]
          tcp_rst(pcb, ackno, seqno + tcplen, ip_current_dest_addr(),
 801e784:	8812      	ldrh	r2, [r2, #0]
 801e786:	b292      	uxth	r2, r2
 801e788:	9202      	str	r2, [sp, #8]
 801e78a:	9301      	str	r3, [sp, #4]
 801e78c:	4b36      	ldr	r3, [pc, #216]	@ (801e868 <tcp_process+0x5a4>)
 801e78e:	9300      	str	r3, [sp, #0]
 801e790:	4b36      	ldr	r3, [pc, #216]	@ (801e86c <tcp_process+0x5a8>)
 801e792:	4602      	mov	r2, r0
 801e794:	6878      	ldr	r0, [r7, #4]
 801e796:	f003 f897 	bl	80218c8 <tcp_rst>
        }
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
        /* Looks like another copy of the SYN - retransmit our SYN-ACK */
        tcp_rexmit(pcb);
      }
      break;
 801e79a:	e167      	b.n	801ea6c <tcp_process+0x7a8>
      } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) {
 801e79c:	4b2d      	ldr	r3, [pc, #180]	@ (801e854 <tcp_process+0x590>)
 801e79e:	781b      	ldrb	r3, [r3, #0]
 801e7a0:	f003 0302 	and.w	r3, r3, #2
 801e7a4:	2b00      	cmp	r3, #0
 801e7a6:	f000 8161 	beq.w	801ea6c <tcp_process+0x7a8>
 801e7aa:	687b      	ldr	r3, [r7, #4]
 801e7ac:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801e7ae:	1e5a      	subs	r2, r3, #1
 801e7b0:	4b2b      	ldr	r3, [pc, #172]	@ (801e860 <tcp_process+0x59c>)
 801e7b2:	681b      	ldr	r3, [r3, #0]
 801e7b4:	429a      	cmp	r2, r3
 801e7b6:	f040 8159 	bne.w	801ea6c <tcp_process+0x7a8>
        tcp_rexmit(pcb);
 801e7ba:	6878      	ldr	r0, [r7, #4]
 801e7bc:	f002 fe7e 	bl	80214bc <tcp_rexmit>
      break;
 801e7c0:	e154      	b.n	801ea6c <tcp_process+0x7a8>
 801e7c2:	e153      	b.n	801ea6c <tcp_process+0x7a8>
    case CLOSE_WAIT:
    /* FALLTHROUGH */
    case ESTABLISHED:
      tcp_receive(pcb);
 801e7c4:	6878      	ldr	r0, [r7, #4]
 801e7c6:	f000 fa71 	bl	801ecac <tcp_receive>
      if (recv_flags & TF_GOT_FIN) { /* passive close */
 801e7ca:	4b2d      	ldr	r3, [pc, #180]	@ (801e880 <tcp_process+0x5bc>)
 801e7cc:	781b      	ldrb	r3, [r3, #0]
 801e7ce:	f003 0320 	and.w	r3, r3, #32
 801e7d2:	2b00      	cmp	r3, #0
 801e7d4:	f000 814c 	beq.w	801ea70 <tcp_process+0x7ac>
        tcp_ack_now(pcb);
 801e7d8:	687b      	ldr	r3, [r7, #4]
 801e7da:	8b5b      	ldrh	r3, [r3, #26]
 801e7dc:	f043 0302 	orr.w	r3, r3, #2
 801e7e0:	b29a      	uxth	r2, r3
 801e7e2:	687b      	ldr	r3, [r7, #4]
 801e7e4:	835a      	strh	r2, [r3, #26]
        pcb->state = CLOSE_WAIT;
 801e7e6:	687b      	ldr	r3, [r7, #4]
 801e7e8:	2207      	movs	r2, #7
 801e7ea:	751a      	strb	r2, [r3, #20]
      }
      break;
 801e7ec:	e140      	b.n	801ea70 <tcp_process+0x7ac>
    case FIN_WAIT_1:
      tcp_receive(pcb);
 801e7ee:	6878      	ldr	r0, [r7, #4]
 801e7f0:	f000 fa5c 	bl	801ecac <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801e7f4:	4b22      	ldr	r3, [pc, #136]	@ (801e880 <tcp_process+0x5bc>)
 801e7f6:	781b      	ldrb	r3, [r3, #0]
 801e7f8:	f003 0320 	and.w	r3, r3, #32
 801e7fc:	2b00      	cmp	r3, #0
 801e7fe:	d071      	beq.n	801e8e4 <tcp_process+0x620>
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e800:	4b14      	ldr	r3, [pc, #80]	@ (801e854 <tcp_process+0x590>)
 801e802:	781b      	ldrb	r3, [r3, #0]
 801e804:	f003 0310 	and.w	r3, r3, #16
 801e808:	2b00      	cmp	r3, #0
 801e80a:	d060      	beq.n	801e8ce <tcp_process+0x60a>
 801e80c:	687b      	ldr	r3, [r7, #4]
 801e80e:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e810:	4b11      	ldr	r3, [pc, #68]	@ (801e858 <tcp_process+0x594>)
 801e812:	681b      	ldr	r3, [r3, #0]
 801e814:	429a      	cmp	r2, r3
 801e816:	d15a      	bne.n	801e8ce <tcp_process+0x60a>
            pcb->unsent == NULL) {
 801e818:	687b      	ldr	r3, [r7, #4]
 801e81a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
        if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e81c:	2b00      	cmp	r3, #0
 801e81e:	d156      	bne.n	801e8ce <tcp_process+0x60a>
          LWIP_DEBUGF(TCP_DEBUG,
                      ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
          tcp_ack_now(pcb);
 801e820:	687b      	ldr	r3, [r7, #4]
 801e822:	8b5b      	ldrh	r3, [r3, #26]
 801e824:	f043 0302 	orr.w	r3, r3, #2
 801e828:	b29a      	uxth	r2, r3
 801e82a:	687b      	ldr	r3, [r7, #4]
 801e82c:	835a      	strh	r2, [r3, #26]
          tcp_pcb_purge(pcb);
 801e82e:	6878      	ldr	r0, [r7, #4]
 801e830:	f7fe fdba 	bl	801d3a8 <tcp_pcb_purge>
          TCP_RMV_ACTIVE(pcb);
 801e834:	4b13      	ldr	r3, [pc, #76]	@ (801e884 <tcp_process+0x5c0>)
 801e836:	681b      	ldr	r3, [r3, #0]
 801e838:	687a      	ldr	r2, [r7, #4]
 801e83a:	429a      	cmp	r2, r3
 801e83c:	d105      	bne.n	801e84a <tcp_process+0x586>
 801e83e:	4b11      	ldr	r3, [pc, #68]	@ (801e884 <tcp_process+0x5c0>)
 801e840:	681b      	ldr	r3, [r3, #0]
 801e842:	68db      	ldr	r3, [r3, #12]
 801e844:	4a0f      	ldr	r2, [pc, #60]	@ (801e884 <tcp_process+0x5c0>)
 801e846:	6013      	str	r3, [r2, #0]
 801e848:	e02e      	b.n	801e8a8 <tcp_process+0x5e4>
 801e84a:	4b0e      	ldr	r3, [pc, #56]	@ (801e884 <tcp_process+0x5c0>)
 801e84c:	681b      	ldr	r3, [r3, #0]
 801e84e:	613b      	str	r3, [r7, #16]
 801e850:	e027      	b.n	801e8a2 <tcp_process+0x5de>
 801e852:	bf00      	nop
 801e854:	2402aff0 	.word	0x2402aff0
 801e858:	2402afe8 	.word	0x2402afe8
 801e85c:	2402afee 	.word	0x2402afee
 801e860:	2402afe4 	.word	0x2402afe4
 801e864:	2402afd4 	.word	0x2402afd4
 801e868:	24024468 	.word	0x24024468
 801e86c:	2402446c 	.word	0x2402446c
 801e870:	0802ff88 	.word	0x0802ff88
 801e874:	08030228 	.word	0x08030228
 801e878:	0802ffd4 	.word	0x0802ffd4
 801e87c:	2402afec 	.word	0x2402afec
 801e880:	2402aff1 	.word	0x2402aff1
 801e884:	2402afb4 	.word	0x2402afb4
 801e888:	693b      	ldr	r3, [r7, #16]
 801e88a:	68db      	ldr	r3, [r3, #12]
 801e88c:	687a      	ldr	r2, [r7, #4]
 801e88e:	429a      	cmp	r2, r3
 801e890:	d104      	bne.n	801e89c <tcp_process+0x5d8>
 801e892:	687b      	ldr	r3, [r7, #4]
 801e894:	68da      	ldr	r2, [r3, #12]
 801e896:	693b      	ldr	r3, [r7, #16]
 801e898:	60da      	str	r2, [r3, #12]
 801e89a:	e005      	b.n	801e8a8 <tcp_process+0x5e4>
 801e89c:	693b      	ldr	r3, [r7, #16]
 801e89e:	68db      	ldr	r3, [r3, #12]
 801e8a0:	613b      	str	r3, [r7, #16]
 801e8a2:	693b      	ldr	r3, [r7, #16]
 801e8a4:	2b00      	cmp	r3, #0
 801e8a6:	d1ef      	bne.n	801e888 <tcp_process+0x5c4>
 801e8a8:	687b      	ldr	r3, [r7, #4]
 801e8aa:	2200      	movs	r2, #0
 801e8ac:	60da      	str	r2, [r3, #12]
 801e8ae:	4b77      	ldr	r3, [pc, #476]	@ (801ea8c <tcp_process+0x7c8>)
 801e8b0:	2201      	movs	r2, #1
 801e8b2:	701a      	strb	r2, [r3, #0]
          pcb->state = TIME_WAIT;
 801e8b4:	687b      	ldr	r3, [r7, #4]
 801e8b6:	220a      	movs	r2, #10
 801e8b8:	751a      	strb	r2, [r3, #20]
          TCP_REG(&tcp_tw_pcbs, pcb);
 801e8ba:	4b75      	ldr	r3, [pc, #468]	@ (801ea90 <tcp_process+0x7cc>)
 801e8bc:	681a      	ldr	r2, [r3, #0]
 801e8be:	687b      	ldr	r3, [r7, #4]
 801e8c0:	60da      	str	r2, [r3, #12]
 801e8c2:	4a73      	ldr	r2, [pc, #460]	@ (801ea90 <tcp_process+0x7cc>)
 801e8c4:	687b      	ldr	r3, [r7, #4]
 801e8c6:	6013      	str	r3, [r2, #0]
 801e8c8:	f003 f9c0 	bl	8021c4c <tcp_timer_needed>
        }
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
                 pcb->unsent == NULL) {
        pcb->state = FIN_WAIT_2;
      }
      break;
 801e8cc:	e0d2      	b.n	801ea74 <tcp_process+0x7b0>
          tcp_ack_now(pcb);
 801e8ce:	687b      	ldr	r3, [r7, #4]
 801e8d0:	8b5b      	ldrh	r3, [r3, #26]
 801e8d2:	f043 0302 	orr.w	r3, r3, #2
 801e8d6:	b29a      	uxth	r2, r3
 801e8d8:	687b      	ldr	r3, [r7, #4]
 801e8da:	835a      	strh	r2, [r3, #26]
          pcb->state = CLOSING;
 801e8dc:	687b      	ldr	r3, [r7, #4]
 801e8de:	2208      	movs	r2, #8
 801e8e0:	751a      	strb	r2, [r3, #20]
      break;
 801e8e2:	e0c7      	b.n	801ea74 <tcp_process+0x7b0>
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e8e4:	4b6b      	ldr	r3, [pc, #428]	@ (801ea94 <tcp_process+0x7d0>)
 801e8e6:	781b      	ldrb	r3, [r3, #0]
 801e8e8:	f003 0310 	and.w	r3, r3, #16
 801e8ec:	2b00      	cmp	r3, #0
 801e8ee:	f000 80c1 	beq.w	801ea74 <tcp_process+0x7b0>
 801e8f2:	687b      	ldr	r3, [r7, #4]
 801e8f4:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e8f6:	4b68      	ldr	r3, [pc, #416]	@ (801ea98 <tcp_process+0x7d4>)
 801e8f8:	681b      	ldr	r3, [r3, #0]
 801e8fa:	429a      	cmp	r2, r3
 801e8fc:	f040 80ba 	bne.w	801ea74 <tcp_process+0x7b0>
                 pcb->unsent == NULL) {
 801e900:	687b      	ldr	r3, [r7, #4]
 801e902:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
      } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt) &&
 801e904:	2b00      	cmp	r3, #0
 801e906:	f040 80b5 	bne.w	801ea74 <tcp_process+0x7b0>
        pcb->state = FIN_WAIT_2;
 801e90a:	687b      	ldr	r3, [r7, #4]
 801e90c:	2206      	movs	r2, #6
 801e90e:	751a      	strb	r2, [r3, #20]
      break;
 801e910:	e0b0      	b.n	801ea74 <tcp_process+0x7b0>
    case FIN_WAIT_2:
      tcp_receive(pcb);
 801e912:	6878      	ldr	r0, [r7, #4]
 801e914:	f000 f9ca 	bl	801ecac <tcp_receive>
      if (recv_flags & TF_GOT_FIN) {
 801e918:	4b60      	ldr	r3, [pc, #384]	@ (801ea9c <tcp_process+0x7d8>)
 801e91a:	781b      	ldrb	r3, [r3, #0]
 801e91c:	f003 0320 	and.w	r3, r3, #32
 801e920:	2b00      	cmp	r3, #0
 801e922:	f000 80a9 	beq.w	801ea78 <tcp_process+0x7b4>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_ack_now(pcb);
 801e926:	687b      	ldr	r3, [r7, #4]
 801e928:	8b5b      	ldrh	r3, [r3, #26]
 801e92a:	f043 0302 	orr.w	r3, r3, #2
 801e92e:	b29a      	uxth	r2, r3
 801e930:	687b      	ldr	r3, [r7, #4]
 801e932:	835a      	strh	r2, [r3, #26]
        tcp_pcb_purge(pcb);
 801e934:	6878      	ldr	r0, [r7, #4]
 801e936:	f7fe fd37 	bl	801d3a8 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801e93a:	4b59      	ldr	r3, [pc, #356]	@ (801eaa0 <tcp_process+0x7dc>)
 801e93c:	681b      	ldr	r3, [r3, #0]
 801e93e:	687a      	ldr	r2, [r7, #4]
 801e940:	429a      	cmp	r2, r3
 801e942:	d105      	bne.n	801e950 <tcp_process+0x68c>
 801e944:	4b56      	ldr	r3, [pc, #344]	@ (801eaa0 <tcp_process+0x7dc>)
 801e946:	681b      	ldr	r3, [r3, #0]
 801e948:	68db      	ldr	r3, [r3, #12]
 801e94a:	4a55      	ldr	r2, [pc, #340]	@ (801eaa0 <tcp_process+0x7dc>)
 801e94c:	6013      	str	r3, [r2, #0]
 801e94e:	e013      	b.n	801e978 <tcp_process+0x6b4>
 801e950:	4b53      	ldr	r3, [pc, #332]	@ (801eaa0 <tcp_process+0x7dc>)
 801e952:	681b      	ldr	r3, [r3, #0]
 801e954:	60fb      	str	r3, [r7, #12]
 801e956:	e00c      	b.n	801e972 <tcp_process+0x6ae>
 801e958:	68fb      	ldr	r3, [r7, #12]
 801e95a:	68db      	ldr	r3, [r3, #12]
 801e95c:	687a      	ldr	r2, [r7, #4]
 801e95e:	429a      	cmp	r2, r3
 801e960:	d104      	bne.n	801e96c <tcp_process+0x6a8>
 801e962:	687b      	ldr	r3, [r7, #4]
 801e964:	68da      	ldr	r2, [r3, #12]
 801e966:	68fb      	ldr	r3, [r7, #12]
 801e968:	60da      	str	r2, [r3, #12]
 801e96a:	e005      	b.n	801e978 <tcp_process+0x6b4>
 801e96c:	68fb      	ldr	r3, [r7, #12]
 801e96e:	68db      	ldr	r3, [r3, #12]
 801e970:	60fb      	str	r3, [r7, #12]
 801e972:	68fb      	ldr	r3, [r7, #12]
 801e974:	2b00      	cmp	r3, #0
 801e976:	d1ef      	bne.n	801e958 <tcp_process+0x694>
 801e978:	687b      	ldr	r3, [r7, #4]
 801e97a:	2200      	movs	r2, #0
 801e97c:	60da      	str	r2, [r3, #12]
 801e97e:	4b43      	ldr	r3, [pc, #268]	@ (801ea8c <tcp_process+0x7c8>)
 801e980:	2201      	movs	r2, #1
 801e982:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801e984:	687b      	ldr	r3, [r7, #4]
 801e986:	220a      	movs	r2, #10
 801e988:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801e98a:	4b41      	ldr	r3, [pc, #260]	@ (801ea90 <tcp_process+0x7cc>)
 801e98c:	681a      	ldr	r2, [r3, #0]
 801e98e:	687b      	ldr	r3, [r7, #4]
 801e990:	60da      	str	r2, [r3, #12]
 801e992:	4a3f      	ldr	r2, [pc, #252]	@ (801ea90 <tcp_process+0x7cc>)
 801e994:	687b      	ldr	r3, [r7, #4]
 801e996:	6013      	str	r3, [r2, #0]
 801e998:	f003 f958 	bl	8021c4c <tcp_timer_needed>
      }
      break;
 801e99c:	e06c      	b.n	801ea78 <tcp_process+0x7b4>
    case CLOSING:
      tcp_receive(pcb);
 801e99e:	6878      	ldr	r0, [r7, #4]
 801e9a0:	f000 f984 	bl	801ecac <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801e9a4:	4b3b      	ldr	r3, [pc, #236]	@ (801ea94 <tcp_process+0x7d0>)
 801e9a6:	781b      	ldrb	r3, [r3, #0]
 801e9a8:	f003 0310 	and.w	r3, r3, #16
 801e9ac:	2b00      	cmp	r3, #0
 801e9ae:	d065      	beq.n	801ea7c <tcp_process+0x7b8>
 801e9b0:	687b      	ldr	r3, [r7, #4]
 801e9b2:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801e9b4:	4b38      	ldr	r3, [pc, #224]	@ (801ea98 <tcp_process+0x7d4>)
 801e9b6:	681b      	ldr	r3, [r3, #0]
 801e9b8:	429a      	cmp	r2, r3
 801e9ba:	d15f      	bne.n	801ea7c <tcp_process+0x7b8>
 801e9bc:	687b      	ldr	r3, [r7, #4]
 801e9be:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801e9c0:	2b00      	cmp	r3, #0
 801e9c2:	d15b      	bne.n	801ea7c <tcp_process+0x7b8>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        tcp_pcb_purge(pcb);
 801e9c4:	6878      	ldr	r0, [r7, #4]
 801e9c6:	f7fe fcef 	bl	801d3a8 <tcp_pcb_purge>
        TCP_RMV_ACTIVE(pcb);
 801e9ca:	4b35      	ldr	r3, [pc, #212]	@ (801eaa0 <tcp_process+0x7dc>)
 801e9cc:	681b      	ldr	r3, [r3, #0]
 801e9ce:	687a      	ldr	r2, [r7, #4]
 801e9d0:	429a      	cmp	r2, r3
 801e9d2:	d105      	bne.n	801e9e0 <tcp_process+0x71c>
 801e9d4:	4b32      	ldr	r3, [pc, #200]	@ (801eaa0 <tcp_process+0x7dc>)
 801e9d6:	681b      	ldr	r3, [r3, #0]
 801e9d8:	68db      	ldr	r3, [r3, #12]
 801e9da:	4a31      	ldr	r2, [pc, #196]	@ (801eaa0 <tcp_process+0x7dc>)
 801e9dc:	6013      	str	r3, [r2, #0]
 801e9de:	e013      	b.n	801ea08 <tcp_process+0x744>
 801e9e0:	4b2f      	ldr	r3, [pc, #188]	@ (801eaa0 <tcp_process+0x7dc>)
 801e9e2:	681b      	ldr	r3, [r3, #0]
 801e9e4:	61bb      	str	r3, [r7, #24]
 801e9e6:	e00c      	b.n	801ea02 <tcp_process+0x73e>
 801e9e8:	69bb      	ldr	r3, [r7, #24]
 801e9ea:	68db      	ldr	r3, [r3, #12]
 801e9ec:	687a      	ldr	r2, [r7, #4]
 801e9ee:	429a      	cmp	r2, r3
 801e9f0:	d104      	bne.n	801e9fc <tcp_process+0x738>
 801e9f2:	687b      	ldr	r3, [r7, #4]
 801e9f4:	68da      	ldr	r2, [r3, #12]
 801e9f6:	69bb      	ldr	r3, [r7, #24]
 801e9f8:	60da      	str	r2, [r3, #12]
 801e9fa:	e005      	b.n	801ea08 <tcp_process+0x744>
 801e9fc:	69bb      	ldr	r3, [r7, #24]
 801e9fe:	68db      	ldr	r3, [r3, #12]
 801ea00:	61bb      	str	r3, [r7, #24]
 801ea02:	69bb      	ldr	r3, [r7, #24]
 801ea04:	2b00      	cmp	r3, #0
 801ea06:	d1ef      	bne.n	801e9e8 <tcp_process+0x724>
 801ea08:	687b      	ldr	r3, [r7, #4]
 801ea0a:	2200      	movs	r2, #0
 801ea0c:	60da      	str	r2, [r3, #12]
 801ea0e:	4b1f      	ldr	r3, [pc, #124]	@ (801ea8c <tcp_process+0x7c8>)
 801ea10:	2201      	movs	r2, #1
 801ea12:	701a      	strb	r2, [r3, #0]
        pcb->state = TIME_WAIT;
 801ea14:	687b      	ldr	r3, [r7, #4]
 801ea16:	220a      	movs	r2, #10
 801ea18:	751a      	strb	r2, [r3, #20]
        TCP_REG(&tcp_tw_pcbs, pcb);
 801ea1a:	4b1d      	ldr	r3, [pc, #116]	@ (801ea90 <tcp_process+0x7cc>)
 801ea1c:	681a      	ldr	r2, [r3, #0]
 801ea1e:	687b      	ldr	r3, [r7, #4]
 801ea20:	60da      	str	r2, [r3, #12]
 801ea22:	4a1b      	ldr	r2, [pc, #108]	@ (801ea90 <tcp_process+0x7cc>)
 801ea24:	687b      	ldr	r3, [r7, #4]
 801ea26:	6013      	str	r3, [r2, #0]
 801ea28:	f003 f910 	bl	8021c4c <tcp_timer_needed>
      }
      break;
 801ea2c:	e026      	b.n	801ea7c <tcp_process+0x7b8>
    case LAST_ACK:
      tcp_receive(pcb);
 801ea2e:	6878      	ldr	r0, [r7, #4]
 801ea30:	f000 f93c 	bl	801ecac <tcp_receive>
      if ((flags & TCP_ACK) && ackno == pcb->snd_nxt && pcb->unsent == NULL) {
 801ea34:	4b17      	ldr	r3, [pc, #92]	@ (801ea94 <tcp_process+0x7d0>)
 801ea36:	781b      	ldrb	r3, [r3, #0]
 801ea38:	f003 0310 	and.w	r3, r3, #16
 801ea3c:	2b00      	cmp	r3, #0
 801ea3e:	d01f      	beq.n	801ea80 <tcp_process+0x7bc>
 801ea40:	687b      	ldr	r3, [r7, #4]
 801ea42:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 801ea44:	4b14      	ldr	r3, [pc, #80]	@ (801ea98 <tcp_process+0x7d4>)
 801ea46:	681b      	ldr	r3, [r3, #0]
 801ea48:	429a      	cmp	r2, r3
 801ea4a:	d119      	bne.n	801ea80 <tcp_process+0x7bc>
 801ea4c:	687b      	ldr	r3, [r7, #4]
 801ea4e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801ea50:	2b00      	cmp	r3, #0
 801ea52:	d115      	bne.n	801ea80 <tcp_process+0x7bc>
        LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest));
        /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */
        recv_flags |= TF_CLOSED;
 801ea54:	4b11      	ldr	r3, [pc, #68]	@ (801ea9c <tcp_process+0x7d8>)
 801ea56:	781b      	ldrb	r3, [r3, #0]
 801ea58:	f043 0310 	orr.w	r3, r3, #16
 801ea5c:	b2da      	uxtb	r2, r3
 801ea5e:	4b0f      	ldr	r3, [pc, #60]	@ (801ea9c <tcp_process+0x7d8>)
 801ea60:	701a      	strb	r2, [r3, #0]
      }
      break;
 801ea62:	e00d      	b.n	801ea80 <tcp_process+0x7bc>
    default:
      break;
 801ea64:	bf00      	nop
 801ea66:	e00c      	b.n	801ea82 <tcp_process+0x7be>
      break;
 801ea68:	bf00      	nop
 801ea6a:	e00a      	b.n	801ea82 <tcp_process+0x7be>
      break;
 801ea6c:	bf00      	nop
 801ea6e:	e008      	b.n	801ea82 <tcp_process+0x7be>
      break;
 801ea70:	bf00      	nop
 801ea72:	e006      	b.n	801ea82 <tcp_process+0x7be>
      break;
 801ea74:	bf00      	nop
 801ea76:	e004      	b.n	801ea82 <tcp_process+0x7be>
      break;
 801ea78:	bf00      	nop
 801ea7a:	e002      	b.n	801ea82 <tcp_process+0x7be>
      break;
 801ea7c:	bf00      	nop
 801ea7e:	e000      	b.n	801ea82 <tcp_process+0x7be>
      break;
 801ea80:	bf00      	nop
  }
  return ERR_OK;
 801ea82:	2300      	movs	r3, #0
}
 801ea84:	4618      	mov	r0, r3
 801ea86:	3724      	adds	r7, #36	@ 0x24
 801ea88:	46bd      	mov	sp, r7
 801ea8a:	bd90      	pop	{r4, r7, pc}
 801ea8c:	2402afbc 	.word	0x2402afbc
 801ea90:	2402afb8 	.word	0x2402afb8
 801ea94:	2402aff0 	.word	0x2402aff0
 801ea98:	2402afe8 	.word	0x2402afe8
 801ea9c:	2402aff1 	.word	0x2402aff1
 801eaa0:	2402afb4 	.word	0x2402afb4

0801eaa4 <tcp_oos_insert_segment>:
 *
 * Called from tcp_receive()
 */
static void
tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next)
{
 801eaa4:	b590      	push	{r4, r7, lr}
 801eaa6:	b085      	sub	sp, #20
 801eaa8:	af00      	add	r7, sp, #0
 801eaaa:	6078      	str	r0, [r7, #4]
 801eaac:	6039      	str	r1, [r7, #0]
  struct tcp_seg *old_seg;

  LWIP_ASSERT("tcp_oos_insert_segment: invalid cseg", cseg != NULL);
 801eaae:	687b      	ldr	r3, [r7, #4]
 801eab0:	2b00      	cmp	r3, #0
 801eab2:	d106      	bne.n	801eac2 <tcp_oos_insert_segment+0x1e>
 801eab4:	4b3b      	ldr	r3, [pc, #236]	@ (801eba4 <tcp_oos_insert_segment+0x100>)
 801eab6:	f240 421f 	movw	r2, #1055	@ 0x41f
 801eaba:	493b      	ldr	r1, [pc, #236]	@ (801eba8 <tcp_oos_insert_segment+0x104>)
 801eabc:	483b      	ldr	r0, [pc, #236]	@ (801ebac <tcp_oos_insert_segment+0x108>)
 801eabe:	f00b ffcd 	bl	802aa5c <iprintf>

  if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801eac2:	687b      	ldr	r3, [r7, #4]
 801eac4:	691b      	ldr	r3, [r3, #16]
 801eac6:	899b      	ldrh	r3, [r3, #12]
 801eac8:	b29b      	uxth	r3, r3
 801eaca:	4618      	mov	r0, r3
 801eacc:	f7fb f86c 	bl	8019ba8 <lwip_htons>
 801ead0:	4603      	mov	r3, r0
 801ead2:	b2db      	uxtb	r3, r3
 801ead4:	f003 0301 	and.w	r3, r3, #1
 801ead8:	2b00      	cmp	r3, #0
 801eada:	d028      	beq.n	801eb2e <tcp_oos_insert_segment+0x8a>
    /* received segment overlaps all following segments */
    tcp_segs_free(next);
 801eadc:	6838      	ldr	r0, [r7, #0]
 801eade:	f7fe f989 	bl	801cdf4 <tcp_segs_free>
    next = NULL;
 801eae2:	2300      	movs	r3, #0
 801eae4:	603b      	str	r3, [r7, #0]
 801eae6:	e056      	b.n	801eb96 <tcp_oos_insert_segment+0xf2>
       oos queue may have segments with FIN flag */
    while (next &&
           TCP_SEQ_GEQ((seqno + cseg->len),
                       (next->tcphdr->seqno + next->len))) {
      /* cseg with FIN already processed */
      if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801eae8:	683b      	ldr	r3, [r7, #0]
 801eaea:	691b      	ldr	r3, [r3, #16]
 801eaec:	899b      	ldrh	r3, [r3, #12]
 801eaee:	b29b      	uxth	r3, r3
 801eaf0:	4618      	mov	r0, r3
 801eaf2:	f7fb f859 	bl	8019ba8 <lwip_htons>
 801eaf6:	4603      	mov	r3, r0
 801eaf8:	b2db      	uxtb	r3, r3
 801eafa:	f003 0301 	and.w	r3, r3, #1
 801eafe:	2b00      	cmp	r3, #0
 801eb00:	d00d      	beq.n	801eb1e <tcp_oos_insert_segment+0x7a>
        TCPH_SET_FLAG(cseg->tcphdr, TCP_FIN);
 801eb02:	687b      	ldr	r3, [r7, #4]
 801eb04:	691b      	ldr	r3, [r3, #16]
 801eb06:	899b      	ldrh	r3, [r3, #12]
 801eb08:	b29c      	uxth	r4, r3
 801eb0a:	2001      	movs	r0, #1
 801eb0c:	f7fb f84c 	bl	8019ba8 <lwip_htons>
 801eb10:	4603      	mov	r3, r0
 801eb12:	461a      	mov	r2, r3
 801eb14:	687b      	ldr	r3, [r7, #4]
 801eb16:	691b      	ldr	r3, [r3, #16]
 801eb18:	4322      	orrs	r2, r4
 801eb1a:	b292      	uxth	r2, r2
 801eb1c:	819a      	strh	r2, [r3, #12]
      }
      old_seg = next;
 801eb1e:	683b      	ldr	r3, [r7, #0]
 801eb20:	60fb      	str	r3, [r7, #12]
      next = next->next;
 801eb22:	683b      	ldr	r3, [r7, #0]
 801eb24:	681b      	ldr	r3, [r3, #0]
 801eb26:	603b      	str	r3, [r7, #0]
      tcp_seg_free(old_seg);
 801eb28:	68f8      	ldr	r0, [r7, #12]
 801eb2a:	f7fe f978 	bl	801ce1e <tcp_seg_free>
    while (next &&
 801eb2e:	683b      	ldr	r3, [r7, #0]
 801eb30:	2b00      	cmp	r3, #0
 801eb32:	d00e      	beq.n	801eb52 <tcp_oos_insert_segment+0xae>
           TCP_SEQ_GEQ((seqno + cseg->len),
 801eb34:	687b      	ldr	r3, [r7, #4]
 801eb36:	891b      	ldrh	r3, [r3, #8]
 801eb38:	461a      	mov	r2, r3
 801eb3a:	4b1d      	ldr	r3, [pc, #116]	@ (801ebb0 <tcp_oos_insert_segment+0x10c>)
 801eb3c:	681b      	ldr	r3, [r3, #0]
 801eb3e:	441a      	add	r2, r3
 801eb40:	683b      	ldr	r3, [r7, #0]
 801eb42:	691b      	ldr	r3, [r3, #16]
 801eb44:	685b      	ldr	r3, [r3, #4]
 801eb46:	6839      	ldr	r1, [r7, #0]
 801eb48:	8909      	ldrh	r1, [r1, #8]
 801eb4a:	440b      	add	r3, r1
 801eb4c:	1ad3      	subs	r3, r2, r3
    while (next &&
 801eb4e:	2b00      	cmp	r3, #0
 801eb50:	daca      	bge.n	801eae8 <tcp_oos_insert_segment+0x44>
    }
    if (next &&
 801eb52:	683b      	ldr	r3, [r7, #0]
 801eb54:	2b00      	cmp	r3, #0
 801eb56:	d01e      	beq.n	801eb96 <tcp_oos_insert_segment+0xf2>
        TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) {
 801eb58:	687b      	ldr	r3, [r7, #4]
 801eb5a:	891b      	ldrh	r3, [r3, #8]
 801eb5c:	461a      	mov	r2, r3
 801eb5e:	4b14      	ldr	r3, [pc, #80]	@ (801ebb0 <tcp_oos_insert_segment+0x10c>)
 801eb60:	681b      	ldr	r3, [r3, #0]
 801eb62:	441a      	add	r2, r3
 801eb64:	683b      	ldr	r3, [r7, #0]
 801eb66:	691b      	ldr	r3, [r3, #16]
 801eb68:	685b      	ldr	r3, [r3, #4]
 801eb6a:	1ad3      	subs	r3, r2, r3
    if (next &&
 801eb6c:	2b00      	cmp	r3, #0
 801eb6e:	dd12      	ble.n	801eb96 <tcp_oos_insert_segment+0xf2>
      /* We need to trim the incoming segment. */
      cseg->len = (u16_t)(next->tcphdr->seqno - seqno);
 801eb70:	683b      	ldr	r3, [r7, #0]
 801eb72:	691b      	ldr	r3, [r3, #16]
 801eb74:	685b      	ldr	r3, [r3, #4]
 801eb76:	b29a      	uxth	r2, r3
 801eb78:	4b0d      	ldr	r3, [pc, #52]	@ (801ebb0 <tcp_oos_insert_segment+0x10c>)
 801eb7a:	681b      	ldr	r3, [r3, #0]
 801eb7c:	b29b      	uxth	r3, r3
 801eb7e:	1ad3      	subs	r3, r2, r3
 801eb80:	b29a      	uxth	r2, r3
 801eb82:	687b      	ldr	r3, [r7, #4]
 801eb84:	811a      	strh	r2, [r3, #8]
      pbuf_realloc(cseg->p, cseg->len);
 801eb86:	687b      	ldr	r3, [r7, #4]
 801eb88:	685a      	ldr	r2, [r3, #4]
 801eb8a:	687b      	ldr	r3, [r7, #4]
 801eb8c:	891b      	ldrh	r3, [r3, #8]
 801eb8e:	4619      	mov	r1, r3
 801eb90:	4610      	mov	r0, r2
 801eb92:	f7fc fb35 	bl	801b200 <pbuf_realloc>
    }
  }
  cseg->next = next;
 801eb96:	687b      	ldr	r3, [r7, #4]
 801eb98:	683a      	ldr	r2, [r7, #0]
 801eb9a:	601a      	str	r2, [r3, #0]
}
 801eb9c:	bf00      	nop
 801eb9e:	3714      	adds	r7, #20
 801eba0:	46bd      	mov	sp, r7
 801eba2:	bd90      	pop	{r4, r7, pc}
 801eba4:	0802ff88 	.word	0x0802ff88
 801eba8:	08030248 	.word	0x08030248
 801ebac:	0802ffd4 	.word	0x0802ffd4
 801ebb0:	2402afe4 	.word	0x2402afe4

0801ebb4 <tcp_free_acked_segments>:

/** Remove segments from a list if the incoming ACK acknowledges them */
static struct tcp_seg *
tcp_free_acked_segments(struct tcp_pcb *pcb, struct tcp_seg *seg_list, const char *dbg_list_name,
                        struct tcp_seg *dbg_other_seg_list)
{
 801ebb4:	b5b0      	push	{r4, r5, r7, lr}
 801ebb6:	b086      	sub	sp, #24
 801ebb8:	af00      	add	r7, sp, #0
 801ebba:	60f8      	str	r0, [r7, #12]
 801ebbc:	60b9      	str	r1, [r7, #8]
 801ebbe:	607a      	str	r2, [r7, #4]
 801ebc0:	603b      	str	r3, [r7, #0]
  u16_t clen;

  LWIP_UNUSED_ARG(dbg_list_name);
  LWIP_UNUSED_ARG(dbg_other_seg_list);

  while (seg_list != NULL &&
 801ebc2:	e03e      	b.n	801ec42 <tcp_free_acked_segments+0x8e>
    LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->%s\n",
                                  lwip_ntohl(seg_list->tcphdr->seqno),
                                  lwip_ntohl(seg_list->tcphdr->seqno) + TCP_TCPLEN(seg_list),
                                  dbg_list_name));

    next = seg_list;
 801ebc4:	68bb      	ldr	r3, [r7, #8]
 801ebc6:	617b      	str	r3, [r7, #20]
    seg_list = seg_list->next;
 801ebc8:	68bb      	ldr	r3, [r7, #8]
 801ebca:	681b      	ldr	r3, [r3, #0]
 801ebcc:	60bb      	str	r3, [r7, #8]

    clen = pbuf_clen(next->p);
 801ebce:	697b      	ldr	r3, [r7, #20]
 801ebd0:	685b      	ldr	r3, [r3, #4]
 801ebd2:	4618      	mov	r0, r3
 801ebd4:	f7fc fd58 	bl	801b688 <pbuf_clen>
 801ebd8:	4603      	mov	r3, r0
 801ebda:	827b      	strh	r3, [r7, #18]
    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"TCPWNDSIZE_F" ... ",
                                 (tcpwnd_size_t)pcb->snd_queuelen));
    LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= clen));
 801ebdc:	68fb      	ldr	r3, [r7, #12]
 801ebde:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801ebe2:	8a7a      	ldrh	r2, [r7, #18]
 801ebe4:	429a      	cmp	r2, r3
 801ebe6:	d906      	bls.n	801ebf6 <tcp_free_acked_segments+0x42>
 801ebe8:	4b2a      	ldr	r3, [pc, #168]	@ (801ec94 <tcp_free_acked_segments+0xe0>)
 801ebea:	f240 4257 	movw	r2, #1111	@ 0x457
 801ebee:	492a      	ldr	r1, [pc, #168]	@ (801ec98 <tcp_free_acked_segments+0xe4>)
 801ebf0:	482a      	ldr	r0, [pc, #168]	@ (801ec9c <tcp_free_acked_segments+0xe8>)
 801ebf2:	f00b ff33 	bl	802aa5c <iprintf>

    pcb->snd_queuelen = (u16_t)(pcb->snd_queuelen - clen);
 801ebf6:	68fb      	ldr	r3, [r7, #12]
 801ebf8:	f8b3 2066 	ldrh.w	r2, [r3, #102]	@ 0x66
 801ebfc:	8a7b      	ldrh	r3, [r7, #18]
 801ebfe:	1ad3      	subs	r3, r2, r3
 801ec00:	b29a      	uxth	r2, r3
 801ec02:	68fb      	ldr	r3, [r7, #12]
 801ec04:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
    recv_acked = (tcpwnd_size_t)(recv_acked + next->len);
 801ec08:	697b      	ldr	r3, [r7, #20]
 801ec0a:	891a      	ldrh	r2, [r3, #8]
 801ec0c:	4b24      	ldr	r3, [pc, #144]	@ (801eca0 <tcp_free_acked_segments+0xec>)
 801ec0e:	881b      	ldrh	r3, [r3, #0]
 801ec10:	4413      	add	r3, r2
 801ec12:	b29a      	uxth	r2, r3
 801ec14:	4b22      	ldr	r3, [pc, #136]	@ (801eca0 <tcp_free_acked_segments+0xec>)
 801ec16:	801a      	strh	r2, [r3, #0]
    tcp_seg_free(next);
 801ec18:	6978      	ldr	r0, [r7, #20]
 801ec1a:	f7fe f900 	bl	801ce1e <tcp_seg_free>

    LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"TCPWNDSIZE_F" (after freeing %s)\n",
                                 (tcpwnd_size_t)pcb->snd_queuelen,
                                 dbg_list_name));
    if (pcb->snd_queuelen != 0) {
 801ec1e:	68fb      	ldr	r3, [r7, #12]
 801ec20:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 801ec24:	2b00      	cmp	r3, #0
 801ec26:	d00c      	beq.n	801ec42 <tcp_free_acked_segments+0x8e>
      LWIP_ASSERT("tcp_receive: valid queue length",
 801ec28:	68bb      	ldr	r3, [r7, #8]
 801ec2a:	2b00      	cmp	r3, #0
 801ec2c:	d109      	bne.n	801ec42 <tcp_free_acked_segments+0x8e>
 801ec2e:	683b      	ldr	r3, [r7, #0]
 801ec30:	2b00      	cmp	r3, #0
 801ec32:	d106      	bne.n	801ec42 <tcp_free_acked_segments+0x8e>
 801ec34:	4b17      	ldr	r3, [pc, #92]	@ (801ec94 <tcp_free_acked_segments+0xe0>)
 801ec36:	f240 4261 	movw	r2, #1121	@ 0x461
 801ec3a:	491a      	ldr	r1, [pc, #104]	@ (801eca4 <tcp_free_acked_segments+0xf0>)
 801ec3c:	4817      	ldr	r0, [pc, #92]	@ (801ec9c <tcp_free_acked_segments+0xe8>)
 801ec3e:	f00b ff0d 	bl	802aa5c <iprintf>
  while (seg_list != NULL &&
 801ec42:	68bb      	ldr	r3, [r7, #8]
 801ec44:	2b00      	cmp	r3, #0
 801ec46:	d020      	beq.n	801ec8a <tcp_free_acked_segments+0xd6>
         TCP_SEQ_LEQ(lwip_ntohl(seg_list->tcphdr->seqno) +
 801ec48:	68bb      	ldr	r3, [r7, #8]
 801ec4a:	691b      	ldr	r3, [r3, #16]
 801ec4c:	685b      	ldr	r3, [r3, #4]
 801ec4e:	4618      	mov	r0, r3
 801ec50:	f7fa ffbf 	bl	8019bd2 <lwip_htonl>
 801ec54:	4604      	mov	r4, r0
 801ec56:	68bb      	ldr	r3, [r7, #8]
 801ec58:	891b      	ldrh	r3, [r3, #8]
 801ec5a:	461d      	mov	r5, r3
 801ec5c:	68bb      	ldr	r3, [r7, #8]
 801ec5e:	691b      	ldr	r3, [r3, #16]
 801ec60:	899b      	ldrh	r3, [r3, #12]
 801ec62:	b29b      	uxth	r3, r3
 801ec64:	4618      	mov	r0, r3
 801ec66:	f7fa ff9f 	bl	8019ba8 <lwip_htons>
 801ec6a:	4603      	mov	r3, r0
 801ec6c:	b2db      	uxtb	r3, r3
 801ec6e:	f003 0303 	and.w	r3, r3, #3
 801ec72:	2b00      	cmp	r3, #0
 801ec74:	d001      	beq.n	801ec7a <tcp_free_acked_segments+0xc6>
 801ec76:	2301      	movs	r3, #1
 801ec78:	e000      	b.n	801ec7c <tcp_free_acked_segments+0xc8>
 801ec7a:	2300      	movs	r3, #0
 801ec7c:	442b      	add	r3, r5
 801ec7e:	18e2      	adds	r2, r4, r3
 801ec80:	4b09      	ldr	r3, [pc, #36]	@ (801eca8 <tcp_free_acked_segments+0xf4>)
 801ec82:	681b      	ldr	r3, [r3, #0]
 801ec84:	1ad3      	subs	r3, r2, r3
  while (seg_list != NULL &&
 801ec86:	2b00      	cmp	r3, #0
 801ec88:	dd9c      	ble.n	801ebc4 <tcp_free_acked_segments+0x10>
                  seg_list != NULL || dbg_other_seg_list != NULL);
    }
  }
  return seg_list;
 801ec8a:	68bb      	ldr	r3, [r7, #8]
}
 801ec8c:	4618      	mov	r0, r3
 801ec8e:	3718      	adds	r7, #24
 801ec90:	46bd      	mov	sp, r7
 801ec92:	bdb0      	pop	{r4, r5, r7, pc}
 801ec94:	0802ff88 	.word	0x0802ff88
 801ec98:	08030270 	.word	0x08030270
 801ec9c:	0802ffd4 	.word	0x0802ffd4
 801eca0:	2402afec 	.word	0x2402afec
 801eca4:	08030298 	.word	0x08030298
 801eca8:	2402afe8 	.word	0x2402afe8

0801ecac <tcp_receive>:
 *
 * Called from tcp_process().
 */
static void
tcp_receive(struct tcp_pcb *pcb)
{
 801ecac:	b5b0      	push	{r4, r5, r7, lr}
 801ecae:	b094      	sub	sp, #80	@ 0x50
 801ecb0:	af00      	add	r7, sp, #0
 801ecb2:	6078      	str	r0, [r7, #4]
  s16_t m;
  u32_t right_wnd_edge;
  int found_dupack = 0;
 801ecb4:	2300      	movs	r3, #0
 801ecb6:	64bb      	str	r3, [r7, #72]	@ 0x48

  LWIP_ASSERT("tcp_receive: invalid pcb", pcb != NULL);
 801ecb8:	687b      	ldr	r3, [r7, #4]
 801ecba:	2b00      	cmp	r3, #0
 801ecbc:	d106      	bne.n	801eccc <tcp_receive+0x20>
 801ecbe:	4b91      	ldr	r3, [pc, #580]	@ (801ef04 <tcp_receive+0x258>)
 801ecc0:	f240 427b 	movw	r2, #1147	@ 0x47b
 801ecc4:	4990      	ldr	r1, [pc, #576]	@ (801ef08 <tcp_receive+0x25c>)
 801ecc6:	4891      	ldr	r0, [pc, #580]	@ (801ef0c <tcp_receive+0x260>)
 801ecc8:	f00b fec8 	bl	802aa5c <iprintf>
  LWIP_ASSERT("tcp_receive: wrong state", pcb->state >= ESTABLISHED);
 801eccc:	687b      	ldr	r3, [r7, #4]
 801ecce:	7d1b      	ldrb	r3, [r3, #20]
 801ecd0:	2b03      	cmp	r3, #3
 801ecd2:	d806      	bhi.n	801ece2 <tcp_receive+0x36>
 801ecd4:	4b8b      	ldr	r3, [pc, #556]	@ (801ef04 <tcp_receive+0x258>)
 801ecd6:	f240 427c 	movw	r2, #1148	@ 0x47c
 801ecda:	498d      	ldr	r1, [pc, #564]	@ (801ef10 <tcp_receive+0x264>)
 801ecdc:	488b      	ldr	r0, [pc, #556]	@ (801ef0c <tcp_receive+0x260>)
 801ecde:	f00b febd 	bl	802aa5c <iprintf>

  if (flags & TCP_ACK) {
 801ece2:	4b8c      	ldr	r3, [pc, #560]	@ (801ef14 <tcp_receive+0x268>)
 801ece4:	781b      	ldrb	r3, [r3, #0]
 801ece6:	f003 0310 	and.w	r3, r3, #16
 801ecea:	2b00      	cmp	r3, #0
 801ecec:	f000 8264 	beq.w	801f1b8 <tcp_receive+0x50c>
    right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2;
 801ecf0:	687b      	ldr	r3, [r7, #4]
 801ecf2:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801ecf6:	461a      	mov	r2, r3
 801ecf8:	687b      	ldr	r3, [r7, #4]
 801ecfa:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801ecfc:	4413      	add	r3, r2
 801ecfe:	633b      	str	r3, [r7, #48]	@ 0x30

    /* Update window. */
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801ed00:	687b      	ldr	r3, [r7, #4]
 801ed02:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801ed04:	4b84      	ldr	r3, [pc, #528]	@ (801ef18 <tcp_receive+0x26c>)
 801ed06:	681b      	ldr	r3, [r3, #0]
 801ed08:	1ad3      	subs	r3, r2, r3
 801ed0a:	2b00      	cmp	r3, #0
 801ed0c:	db1b      	blt.n	801ed46 <tcp_receive+0x9a>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801ed0e:	687b      	ldr	r3, [r7, #4]
 801ed10:	6d5a      	ldr	r2, [r3, #84]	@ 0x54
 801ed12:	4b81      	ldr	r3, [pc, #516]	@ (801ef18 <tcp_receive+0x26c>)
 801ed14:	681b      	ldr	r3, [r3, #0]
    if (TCP_SEQ_LT(pcb->snd_wl1, seqno) ||
 801ed16:	429a      	cmp	r2, r3
 801ed18:	d106      	bne.n	801ed28 <tcp_receive+0x7c>
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801ed1a:	687b      	ldr	r3, [r7, #4]
 801ed1c:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801ed1e:	4b7f      	ldr	r3, [pc, #508]	@ (801ef1c <tcp_receive+0x270>)
 801ed20:	681b      	ldr	r3, [r3, #0]
 801ed22:	1ad3      	subs	r3, r2, r3
 801ed24:	2b00      	cmp	r3, #0
 801ed26:	db0e      	blt.n	801ed46 <tcp_receive+0x9a>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801ed28:	687b      	ldr	r3, [r7, #4]
 801ed2a:	6d9a      	ldr	r2, [r3, #88]	@ 0x58
 801ed2c:	4b7b      	ldr	r3, [pc, #492]	@ (801ef1c <tcp_receive+0x270>)
 801ed2e:	681b      	ldr	r3, [r3, #0]
        (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) ||
 801ed30:	429a      	cmp	r2, r3
 801ed32:	d125      	bne.n	801ed80 <tcp_receive+0xd4>
        (pcb->snd_wl2 == ackno && (u32_t)SND_WND_SCALE(pcb, tcphdr->wnd) > pcb->snd_wnd)) {
 801ed34:	4b7a      	ldr	r3, [pc, #488]	@ (801ef20 <tcp_receive+0x274>)
 801ed36:	681b      	ldr	r3, [r3, #0]
 801ed38:	89db      	ldrh	r3, [r3, #14]
 801ed3a:	b29a      	uxth	r2, r3
 801ed3c:	687b      	ldr	r3, [r7, #4]
 801ed3e:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801ed42:	429a      	cmp	r2, r3
 801ed44:	d91c      	bls.n	801ed80 <tcp_receive+0xd4>
      pcb->snd_wnd = SND_WND_SCALE(pcb, tcphdr->wnd);
 801ed46:	4b76      	ldr	r3, [pc, #472]	@ (801ef20 <tcp_receive+0x274>)
 801ed48:	681b      	ldr	r3, [r3, #0]
 801ed4a:	89db      	ldrh	r3, [r3, #14]
 801ed4c:	b29a      	uxth	r2, r3
 801ed4e:	687b      	ldr	r3, [r7, #4]
 801ed50:	f8a3 2060 	strh.w	r2, [r3, #96]	@ 0x60
      /* keep track of the biggest window announced by the remote host to calculate
         the maximum segment size */
      if (pcb->snd_wnd_max < pcb->snd_wnd) {
 801ed54:	687b      	ldr	r3, [r7, #4]
 801ed56:	f8b3 2062 	ldrh.w	r2, [r3, #98]	@ 0x62
 801ed5a:	687b      	ldr	r3, [r7, #4]
 801ed5c:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 801ed60:	429a      	cmp	r2, r3
 801ed62:	d205      	bcs.n	801ed70 <tcp_receive+0xc4>
        pcb->snd_wnd_max = pcb->snd_wnd;
 801ed64:	687b      	ldr	r3, [r7, #4]
 801ed66:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 801ed6a:	687b      	ldr	r3, [r7, #4]
 801ed6c:	f8a3 2062 	strh.w	r2, [r3, #98]	@ 0x62
      }
      pcb->snd_wl1 = seqno;
 801ed70:	4b69      	ldr	r3, [pc, #420]	@ (801ef18 <tcp_receive+0x26c>)
 801ed72:	681a      	ldr	r2, [r3, #0]
 801ed74:	687b      	ldr	r3, [r7, #4]
 801ed76:	655a      	str	r2, [r3, #84]	@ 0x54
      pcb->snd_wl2 = ackno;
 801ed78:	4b68      	ldr	r3, [pc, #416]	@ (801ef1c <tcp_receive+0x270>)
 801ed7a:	681a      	ldr	r2, [r3, #0]
 801ed7c:	687b      	ldr	r3, [r7, #4]
 801ed7e:	659a      	str	r2, [r3, #88]	@ 0x58
     * If it only passes 1, should reset dupack counter
     *
     */

    /* Clause 1 */
    if (TCP_SEQ_LEQ(ackno, pcb->lastack)) {
 801ed80:	4b66      	ldr	r3, [pc, #408]	@ (801ef1c <tcp_receive+0x270>)
 801ed82:	681a      	ldr	r2, [r3, #0]
 801ed84:	687b      	ldr	r3, [r7, #4]
 801ed86:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801ed88:	1ad3      	subs	r3, r2, r3
 801ed8a:	2b00      	cmp	r3, #0
 801ed8c:	dc58      	bgt.n	801ee40 <tcp_receive+0x194>
      /* Clause 2 */
      if (tcplen == 0) {
 801ed8e:	4b65      	ldr	r3, [pc, #404]	@ (801ef24 <tcp_receive+0x278>)
 801ed90:	881b      	ldrh	r3, [r3, #0]
 801ed92:	2b00      	cmp	r3, #0
 801ed94:	d14b      	bne.n	801ee2e <tcp_receive+0x182>
        /* Clause 3 */
        if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge) {
 801ed96:	687b      	ldr	r3, [r7, #4]
 801ed98:	6d9b      	ldr	r3, [r3, #88]	@ 0x58
 801ed9a:	687a      	ldr	r2, [r7, #4]
 801ed9c:	f8b2 2060 	ldrh.w	r2, [r2, #96]	@ 0x60
 801eda0:	4413      	add	r3, r2
 801eda2:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 801eda4:	429a      	cmp	r2, r3
 801eda6:	d142      	bne.n	801ee2e <tcp_receive+0x182>
          /* Clause 4 */
          if (pcb->rtime >= 0) {
 801eda8:	687b      	ldr	r3, [r7, #4]
 801edaa:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 801edae:	2b00      	cmp	r3, #0
 801edb0:	db3d      	blt.n	801ee2e <tcp_receive+0x182>
            /* Clause 5 */
            if (pcb->lastack == ackno) {
 801edb2:	687b      	ldr	r3, [r7, #4]
 801edb4:	6c5a      	ldr	r2, [r3, #68]	@ 0x44
 801edb6:	4b59      	ldr	r3, [pc, #356]	@ (801ef1c <tcp_receive+0x270>)
 801edb8:	681b      	ldr	r3, [r3, #0]
 801edba:	429a      	cmp	r2, r3
 801edbc:	d137      	bne.n	801ee2e <tcp_receive+0x182>
              found_dupack = 1;
 801edbe:	2301      	movs	r3, #1
 801edc0:	64bb      	str	r3, [r7, #72]	@ 0x48
              if ((u8_t)(pcb->dupacks + 1) > pcb->dupacks) {
 801edc2:	687b      	ldr	r3, [r7, #4]
 801edc4:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801edc8:	2bff      	cmp	r3, #255	@ 0xff
 801edca:	d007      	beq.n	801eddc <tcp_receive+0x130>
                ++pcb->dupacks;
 801edcc:	687b      	ldr	r3, [r7, #4]
 801edce:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801edd2:	3301      	adds	r3, #1
 801edd4:	b2da      	uxtb	r2, r3
 801edd6:	687b      	ldr	r3, [r7, #4]
 801edd8:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
              }
              if (pcb->dupacks > 3) {
 801eddc:	687b      	ldr	r3, [r7, #4]
 801edde:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801ede2:	2b03      	cmp	r3, #3
 801ede4:	d91b      	bls.n	801ee1e <tcp_receive+0x172>
                /* Inflate the congestion window */
                TCP_WND_INC(pcb->cwnd, pcb->mss);
 801ede6:	687b      	ldr	r3, [r7, #4]
 801ede8:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801edec:	687b      	ldr	r3, [r7, #4]
 801edee:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801edf0:	4413      	add	r3, r2
 801edf2:	b29a      	uxth	r2, r3
 801edf4:	687b      	ldr	r3, [r7, #4]
 801edf6:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801edfa:	429a      	cmp	r2, r3
 801edfc:	d30a      	bcc.n	801ee14 <tcp_receive+0x168>
 801edfe:	687b      	ldr	r3, [r7, #4]
 801ee00:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801ee04:	687b      	ldr	r3, [r7, #4]
 801ee06:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801ee08:	4413      	add	r3, r2
 801ee0a:	b29a      	uxth	r2, r3
 801ee0c:	687b      	ldr	r3, [r7, #4]
 801ee0e:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801ee12:	e004      	b.n	801ee1e <tcp_receive+0x172>
 801ee14:	687b      	ldr	r3, [r7, #4]
 801ee16:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801ee1a:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
              }
              if (pcb->dupacks >= 3) {
 801ee1e:	687b      	ldr	r3, [r7, #4]
 801ee20:	f893 3043 	ldrb.w	r3, [r3, #67]	@ 0x43
 801ee24:	2b02      	cmp	r3, #2
 801ee26:	d902      	bls.n	801ee2e <tcp_receive+0x182>
                /* Do fast retransmit (checked via TF_INFR, not via dupacks count) */
                tcp_rexmit_fast(pcb);
 801ee28:	6878      	ldr	r0, [r7, #4]
 801ee2a:	f002 fbb3 	bl	8021594 <tcp_rexmit_fast>
          }
        }
      }
      /* If Clause (1) or more is true, but not a duplicate ack, reset
       * count of consecutive duplicate acks */
      if (!found_dupack) {
 801ee2e:	6cbb      	ldr	r3, [r7, #72]	@ 0x48
 801ee30:	2b00      	cmp	r3, #0
 801ee32:	f040 8161 	bne.w	801f0f8 <tcp_receive+0x44c>
        pcb->dupacks = 0;
 801ee36:	687b      	ldr	r3, [r7, #4]
 801ee38:	2200      	movs	r2, #0
 801ee3a:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
 801ee3e:	e15b      	b.n	801f0f8 <tcp_receive+0x44c>
      }
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801ee40:	4b36      	ldr	r3, [pc, #216]	@ (801ef1c <tcp_receive+0x270>)
 801ee42:	681a      	ldr	r2, [r3, #0]
 801ee44:	687b      	ldr	r3, [r7, #4]
 801ee46:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801ee48:	1ad3      	subs	r3, r2, r3
 801ee4a:	3b01      	subs	r3, #1
 801ee4c:	2b00      	cmp	r3, #0
 801ee4e:	f2c0 814e 	blt.w	801f0ee <tcp_receive+0x442>
 801ee52:	4b32      	ldr	r3, [pc, #200]	@ (801ef1c <tcp_receive+0x270>)
 801ee54:	681a      	ldr	r2, [r3, #0]
 801ee56:	687b      	ldr	r3, [r7, #4]
 801ee58:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 801ee5a:	1ad3      	subs	r3, r2, r3
 801ee5c:	2b00      	cmp	r3, #0
 801ee5e:	f300 8146 	bgt.w	801f0ee <tcp_receive+0x442>
      tcpwnd_size_t acked;

      /* Reset the "IN Fast Retransmit" flag, since we are no longer
         in fast retransmit. Also reset the congestion window to the
         slow start threshold. */
      if (pcb->flags & TF_INFR) {
 801ee62:	687b      	ldr	r3, [r7, #4]
 801ee64:	8b5b      	ldrh	r3, [r3, #26]
 801ee66:	f003 0304 	and.w	r3, r3, #4
 801ee6a:	2b00      	cmp	r3, #0
 801ee6c:	d010      	beq.n	801ee90 <tcp_receive+0x1e4>
        tcp_clear_flags(pcb, TF_INFR);
 801ee6e:	687b      	ldr	r3, [r7, #4]
 801ee70:	8b5b      	ldrh	r3, [r3, #26]
 801ee72:	f023 0304 	bic.w	r3, r3, #4
 801ee76:	b29a      	uxth	r2, r3
 801ee78:	687b      	ldr	r3, [r7, #4]
 801ee7a:	835a      	strh	r2, [r3, #26]
        pcb->cwnd = pcb->ssthresh;
 801ee7c:	687b      	ldr	r3, [r7, #4]
 801ee7e:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 801ee82:	687b      	ldr	r3, [r7, #4]
 801ee84:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
        pcb->bytes_acked = 0;
 801ee88:	687b      	ldr	r3, [r7, #4]
 801ee8a:	2200      	movs	r2, #0
 801ee8c:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
      }

      /* Reset the number of retransmissions. */
      pcb->nrtx = 0;
 801ee90:	687b      	ldr	r3, [r7, #4]
 801ee92:	2200      	movs	r2, #0
 801ee94:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42

      /* Reset the retransmission time-out. */
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801ee98:	687b      	ldr	r3, [r7, #4]
 801ee9a:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801ee9e:	10db      	asrs	r3, r3, #3
 801eea0:	b21b      	sxth	r3, r3
 801eea2:	b29a      	uxth	r2, r3
 801eea4:	687b      	ldr	r3, [r7, #4]
 801eea6:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801eeaa:	b29b      	uxth	r3, r3
 801eeac:	4413      	add	r3, r2
 801eeae:	b29b      	uxth	r3, r3
 801eeb0:	b21a      	sxth	r2, r3
 801eeb2:	687b      	ldr	r3, [r7, #4]
 801eeb4:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      /* Record how much data this ACK acks */
      acked = (tcpwnd_size_t)(ackno - pcb->lastack);
 801eeb8:	4b18      	ldr	r3, [pc, #96]	@ (801ef1c <tcp_receive+0x270>)
 801eeba:	681b      	ldr	r3, [r3, #0]
 801eebc:	b29a      	uxth	r2, r3
 801eebe:	687b      	ldr	r3, [r7, #4]
 801eec0:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 801eec2:	b29b      	uxth	r3, r3
 801eec4:	1ad3      	subs	r3, r2, r3
 801eec6:	85fb      	strh	r3, [r7, #46]	@ 0x2e

      /* Reset the fast retransmit variables. */
      pcb->dupacks = 0;
 801eec8:	687b      	ldr	r3, [r7, #4]
 801eeca:	2200      	movs	r2, #0
 801eecc:	f883 2043 	strb.w	r2, [r3, #67]	@ 0x43
      pcb->lastack = ackno;
 801eed0:	4b12      	ldr	r3, [pc, #72]	@ (801ef1c <tcp_receive+0x270>)
 801eed2:	681a      	ldr	r2, [r3, #0]
 801eed4:	687b      	ldr	r3, [r7, #4]
 801eed6:	645a      	str	r2, [r3, #68]	@ 0x44

      /* Update the congestion control variables (cwnd and
         ssthresh). */
      if (pcb->state >= ESTABLISHED) {
 801eed8:	687b      	ldr	r3, [r7, #4]
 801eeda:	7d1b      	ldrb	r3, [r3, #20]
 801eedc:	2b03      	cmp	r3, #3
 801eede:	f240 8097 	bls.w	801f010 <tcp_receive+0x364>
        if (pcb->cwnd < pcb->ssthresh) {
 801eee2:	687b      	ldr	r3, [r7, #4]
 801eee4:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801eee8:	687b      	ldr	r3, [r7, #4]
 801eeea:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 801eeee:	429a      	cmp	r2, r3
 801eef0:	d245      	bcs.n	801ef7e <tcp_receive+0x2d2>
          tcpwnd_size_t increase;
          /* limit to 1 SMSS segment during period following RTO */
          u8_t num_seg = (pcb->flags & TF_RTO) ? 1 : 2;
 801eef2:	687b      	ldr	r3, [r7, #4]
 801eef4:	8b5b      	ldrh	r3, [r3, #26]
 801eef6:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801eefa:	2b00      	cmp	r3, #0
 801eefc:	d014      	beq.n	801ef28 <tcp_receive+0x27c>
 801eefe:	2301      	movs	r3, #1
 801ef00:	e013      	b.n	801ef2a <tcp_receive+0x27e>
 801ef02:	bf00      	nop
 801ef04:	0802ff88 	.word	0x0802ff88
 801ef08:	080302b8 	.word	0x080302b8
 801ef0c:	0802ffd4 	.word	0x0802ffd4
 801ef10:	080302d4 	.word	0x080302d4
 801ef14:	2402aff0 	.word	0x2402aff0
 801ef18:	2402afe4 	.word	0x2402afe4
 801ef1c:	2402afe8 	.word	0x2402afe8
 801ef20:	2402afd4 	.word	0x2402afd4
 801ef24:	2402afee 	.word	0x2402afee
 801ef28:	2302      	movs	r3, #2
 801ef2a:	f887 302d 	strb.w	r3, [r7, #45]	@ 0x2d
          /* RFC 3465, section 2.2 Slow Start */
          increase = LWIP_MIN(acked, (tcpwnd_size_t)(num_seg * pcb->mss));
 801ef2e:	f897 302d 	ldrb.w	r3, [r7, #45]	@ 0x2d
 801ef32:	b29a      	uxth	r2, r3
 801ef34:	687b      	ldr	r3, [r7, #4]
 801ef36:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801ef38:	fb12 f303 	smulbb	r3, r2, r3
 801ef3c:	b29b      	uxth	r3, r3
 801ef3e:	8dfa      	ldrh	r2, [r7, #46]	@ 0x2e
 801ef40:	4293      	cmp	r3, r2
 801ef42:	bf28      	it	cs
 801ef44:	4613      	movcs	r3, r2
 801ef46:	857b      	strh	r3, [r7, #42]	@ 0x2a
          TCP_WND_INC(pcb->cwnd, increase);
 801ef48:	687b      	ldr	r3, [r7, #4]
 801ef4a:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801ef4e:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801ef50:	4413      	add	r3, r2
 801ef52:	b29a      	uxth	r2, r3
 801ef54:	687b      	ldr	r3, [r7, #4]
 801ef56:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801ef5a:	429a      	cmp	r2, r3
 801ef5c:	d309      	bcc.n	801ef72 <tcp_receive+0x2c6>
 801ef5e:	687b      	ldr	r3, [r7, #4]
 801ef60:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801ef64:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 801ef66:	4413      	add	r3, r2
 801ef68:	b29a      	uxth	r2, r3
 801ef6a:	687b      	ldr	r3, [r7, #4]
 801ef6c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801ef70:	e04e      	b.n	801f010 <tcp_receive+0x364>
 801ef72:	687b      	ldr	r3, [r7, #4]
 801ef74:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801ef78:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801ef7c:	e048      	b.n	801f010 <tcp_receive+0x364>
          LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"TCPWNDSIZE_F"\n", pcb->cwnd));
        } else {
          /* RFC 3465, section 2.1 Congestion Avoidance */
          TCP_WND_INC(pcb->bytes_acked, acked);
 801ef7e:	687b      	ldr	r3, [r7, #4]
 801ef80:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801ef84:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801ef86:	4413      	add	r3, r2
 801ef88:	b29a      	uxth	r2, r3
 801ef8a:	687b      	ldr	r3, [r7, #4]
 801ef8c:	f8b3 306a 	ldrh.w	r3, [r3, #106]	@ 0x6a
 801ef90:	429a      	cmp	r2, r3
 801ef92:	d309      	bcc.n	801efa8 <tcp_receive+0x2fc>
 801ef94:	687b      	ldr	r3, [r7, #4]
 801ef96:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801ef9a:	8dfb      	ldrh	r3, [r7, #46]	@ 0x2e
 801ef9c:	4413      	add	r3, r2
 801ef9e:	b29a      	uxth	r2, r3
 801efa0:	687b      	ldr	r3, [r7, #4]
 801efa2:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
 801efa6:	e004      	b.n	801efb2 <tcp_receive+0x306>
 801efa8:	687b      	ldr	r3, [r7, #4]
 801efaa:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801efae:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
          if (pcb->bytes_acked >= pcb->cwnd) {
 801efb2:	687b      	ldr	r3, [r7, #4]
 801efb4:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801efb8:	687b      	ldr	r3, [r7, #4]
 801efba:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801efbe:	429a      	cmp	r2, r3
 801efc0:	d326      	bcc.n	801f010 <tcp_receive+0x364>
            pcb->bytes_acked = (tcpwnd_size_t)(pcb->bytes_acked - pcb->cwnd);
 801efc2:	687b      	ldr	r3, [r7, #4]
 801efc4:	f8b3 206a 	ldrh.w	r2, [r3, #106]	@ 0x6a
 801efc8:	687b      	ldr	r3, [r7, #4]
 801efca:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801efce:	1ad3      	subs	r3, r2, r3
 801efd0:	b29a      	uxth	r2, r3
 801efd2:	687b      	ldr	r3, [r7, #4]
 801efd4:	f8a3 206a 	strh.w	r2, [r3, #106]	@ 0x6a
            TCP_WND_INC(pcb->cwnd, pcb->mss);
 801efd8:	687b      	ldr	r3, [r7, #4]
 801efda:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801efde:	687b      	ldr	r3, [r7, #4]
 801efe0:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801efe2:	4413      	add	r3, r2
 801efe4:	b29a      	uxth	r2, r3
 801efe6:	687b      	ldr	r3, [r7, #4]
 801efe8:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 801efec:	429a      	cmp	r2, r3
 801efee:	d30a      	bcc.n	801f006 <tcp_receive+0x35a>
 801eff0:	687b      	ldr	r3, [r7, #4]
 801eff2:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 801eff6:	687b      	ldr	r3, [r7, #4]
 801eff8:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 801effa:	4413      	add	r3, r2
 801effc:	b29a      	uxth	r2, r3
 801effe:	687b      	ldr	r3, [r7, #4]
 801f000:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
 801f004:	e004      	b.n	801f010 <tcp_receive+0x364>
 801f006:	687b      	ldr	r3, [r7, #4]
 801f008:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801f00c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
                                    pcb->unacked != NULL ?
                                    lwip_ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked) : 0));

      /* Remove segment from the unacknowledged list if the incoming
         ACK acknowledges them. */
      pcb->unacked = tcp_free_acked_segments(pcb, pcb->unacked, "unacked", pcb->unsent);
 801f010:	687b      	ldr	r3, [r7, #4]
 801f012:	6f19      	ldr	r1, [r3, #112]	@ 0x70
 801f014:	687b      	ldr	r3, [r7, #4]
 801f016:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f018:	4a98      	ldr	r2, [pc, #608]	@ (801f27c <tcp_receive+0x5d0>)
 801f01a:	6878      	ldr	r0, [r7, #4]
 801f01c:	f7ff fdca 	bl	801ebb4 <tcp_free_acked_segments>
 801f020:	4602      	mov	r2, r0
 801f022:	687b      	ldr	r3, [r7, #4]
 801f024:	671a      	str	r2, [r3, #112]	@ 0x70
         on the list are acknowledged by the ACK. This may seem
         strange since an "unsent" segment shouldn't be acked. The
         rationale is that lwIP puts all outstanding segments on the
         ->unsent list after a retransmission, so these segments may
         in fact have been sent once. */
      pcb->unsent = tcp_free_acked_segments(pcb, pcb->unsent, "unsent", pcb->unacked);
 801f026:	687b      	ldr	r3, [r7, #4]
 801f028:	6ed9      	ldr	r1, [r3, #108]	@ 0x6c
 801f02a:	687b      	ldr	r3, [r7, #4]
 801f02c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f02e:	4a94      	ldr	r2, [pc, #592]	@ (801f280 <tcp_receive+0x5d4>)
 801f030:	6878      	ldr	r0, [r7, #4]
 801f032:	f7ff fdbf 	bl	801ebb4 <tcp_free_acked_segments>
 801f036:	4602      	mov	r2, r0
 801f038:	687b      	ldr	r3, [r7, #4]
 801f03a:	66da      	str	r2, [r3, #108]	@ 0x6c

      /* If there's nothing left to acknowledge, stop the retransmit
         timer, otherwise reset it to start again */
      if (pcb->unacked == NULL) {
 801f03c:	687b      	ldr	r3, [r7, #4]
 801f03e:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f040:	2b00      	cmp	r3, #0
 801f042:	d104      	bne.n	801f04e <tcp_receive+0x3a2>
        pcb->rtime = -1;
 801f044:	687b      	ldr	r3, [r7, #4]
 801f046:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 801f04a:	861a      	strh	r2, [r3, #48]	@ 0x30
 801f04c:	e002      	b.n	801f054 <tcp_receive+0x3a8>
      } else {
        pcb->rtime = 0;
 801f04e:	687b      	ldr	r3, [r7, #4]
 801f050:	2200      	movs	r2, #0
 801f052:	861a      	strh	r2, [r3, #48]	@ 0x30
      }

      pcb->polltmr = 0;
 801f054:	687b      	ldr	r3, [r7, #4]
 801f056:	2200      	movs	r2, #0
 801f058:	771a      	strb	r2, [r3, #28]

#if TCP_OVERSIZE
      if (pcb->unsent == NULL) {
 801f05a:	687b      	ldr	r3, [r7, #4]
 801f05c:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f05e:	2b00      	cmp	r3, #0
 801f060:	d103      	bne.n	801f06a <tcp_receive+0x3be>
        pcb->unsent_oversize = 0;
 801f062:	687b      	ldr	r3, [r7, #4]
 801f064:	2200      	movs	r2, #0
 801f066:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
        /* Inform neighbor reachability of forward progress. */
        nd6_reachability_hint(ip6_current_src_addr());
      }
#endif /* LWIP_IPV6 && LWIP_ND6_TCP_REACHABILITY_HINTS*/

      pcb->snd_buf = (tcpwnd_size_t)(pcb->snd_buf + recv_acked);
 801f06a:	687b      	ldr	r3, [r7, #4]
 801f06c:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 801f070:	4b84      	ldr	r3, [pc, #528]	@ (801f284 <tcp_receive+0x5d8>)
 801f072:	881b      	ldrh	r3, [r3, #0]
 801f074:	4413      	add	r3, r2
 801f076:	b29a      	uxth	r2, r3
 801f078:	687b      	ldr	r3, [r7, #4]
 801f07a:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
      /* check if this ACK ends our retransmission of in-flight data */
      if (pcb->flags & TF_RTO) {
 801f07e:	687b      	ldr	r3, [r7, #4]
 801f080:	8b5b      	ldrh	r3, [r3, #26]
 801f082:	f403 6300 	and.w	r3, r3, #2048	@ 0x800
 801f086:	2b00      	cmp	r3, #0
 801f088:	d035      	beq.n	801f0f6 <tcp_receive+0x44a>
        /* RTO is done if
            1) both queues are empty or
            2) unacked is empty and unsent head contains data not part of RTO or
            3) unacked head contains data not part of RTO */
        if (pcb->unacked == NULL) {
 801f08a:	687b      	ldr	r3, [r7, #4]
 801f08c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f08e:	2b00      	cmp	r3, #0
 801f090:	d118      	bne.n	801f0c4 <tcp_receive+0x418>
          if ((pcb->unsent == NULL) ||
 801f092:	687b      	ldr	r3, [r7, #4]
 801f094:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f096:	2b00      	cmp	r3, #0
 801f098:	d00c      	beq.n	801f0b4 <tcp_receive+0x408>
              (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unsent->tcphdr->seqno)))) {
 801f09a:	687b      	ldr	r3, [r7, #4]
 801f09c:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801f09e:	687b      	ldr	r3, [r7, #4]
 801f0a0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 801f0a2:	691b      	ldr	r3, [r3, #16]
 801f0a4:	685b      	ldr	r3, [r3, #4]
 801f0a6:	4618      	mov	r0, r3
 801f0a8:	f7fa fd93 	bl	8019bd2 <lwip_htonl>
 801f0ac:	4603      	mov	r3, r0
 801f0ae:	1ae3      	subs	r3, r4, r3
          if ((pcb->unsent == NULL) ||
 801f0b0:	2b00      	cmp	r3, #0
 801f0b2:	dc20      	bgt.n	801f0f6 <tcp_receive+0x44a>
            tcp_clear_flags(pcb, TF_RTO);
 801f0b4:	687b      	ldr	r3, [r7, #4]
 801f0b6:	8b5b      	ldrh	r3, [r3, #26]
 801f0b8:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801f0bc:	b29a      	uxth	r2, r3
 801f0be:	687b      	ldr	r3, [r7, #4]
 801f0c0:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801f0c2:	e018      	b.n	801f0f6 <tcp_receive+0x44a>
          }
        } else if (TCP_SEQ_LEQ(pcb->rto_end, lwip_ntohl(pcb->unacked->tcphdr->seqno))) {
 801f0c4:	687b      	ldr	r3, [r7, #4]
 801f0c6:	6cdc      	ldr	r4, [r3, #76]	@ 0x4c
 801f0c8:	687b      	ldr	r3, [r7, #4]
 801f0ca:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 801f0cc:	691b      	ldr	r3, [r3, #16]
 801f0ce:	685b      	ldr	r3, [r3, #4]
 801f0d0:	4618      	mov	r0, r3
 801f0d2:	f7fa fd7e 	bl	8019bd2 <lwip_htonl>
 801f0d6:	4603      	mov	r3, r0
 801f0d8:	1ae3      	subs	r3, r4, r3
 801f0da:	2b00      	cmp	r3, #0
 801f0dc:	dc0b      	bgt.n	801f0f6 <tcp_receive+0x44a>
          tcp_clear_flags(pcb, TF_RTO);
 801f0de:	687b      	ldr	r3, [r7, #4]
 801f0e0:	8b5b      	ldrh	r3, [r3, #26]
 801f0e2:	f423 6300 	bic.w	r3, r3, #2048	@ 0x800
 801f0e6:	b29a      	uxth	r2, r3
 801f0e8:	687b      	ldr	r3, [r7, #4]
 801f0ea:	835a      	strh	r2, [r3, #26]
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801f0ec:	e003      	b.n	801f0f6 <tcp_receive+0x44a>
        }
      }
      /* End of ACK for new data processing. */
    } else {
      /* Out of sequence ACK, didn't really ack anything */
      tcp_send_empty_ack(pcb);
 801f0ee:	6878      	ldr	r0, [r7, #4]
 801f0f0:	f002 fc3c 	bl	802196c <tcp_send_empty_ack>
 801f0f4:	e000      	b.n	801f0f8 <tcp_receive+0x44c>
    } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack + 1, pcb->snd_nxt)) {
 801f0f6:	bf00      	nop
                                pcb->rttest, pcb->rtseq, ackno));

    /* RTT estimation calculations. This is done by checking if the
       incoming segment acknowledges the segment we use to take a
       round-trip time measurement. */
    if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) {
 801f0f8:	687b      	ldr	r3, [r7, #4]
 801f0fa:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801f0fc:	2b00      	cmp	r3, #0
 801f0fe:	d05b      	beq.n	801f1b8 <tcp_receive+0x50c>
 801f100:	687b      	ldr	r3, [r7, #4]
 801f102:	6b9a      	ldr	r2, [r3, #56]	@ 0x38
 801f104:	4b60      	ldr	r3, [pc, #384]	@ (801f288 <tcp_receive+0x5dc>)
 801f106:	681b      	ldr	r3, [r3, #0]
 801f108:	1ad3      	subs	r3, r2, r3
 801f10a:	2b00      	cmp	r3, #0
 801f10c:	da54      	bge.n	801f1b8 <tcp_receive+0x50c>
      /* diff between this shouldn't exceed 32K since this are tcp timer ticks
         and a round-trip shouldn't be that long... */
      m = (s16_t)(tcp_ticks - pcb->rttest);
 801f10e:	4b5f      	ldr	r3, [pc, #380]	@ (801f28c <tcp_receive+0x5e0>)
 801f110:	681b      	ldr	r3, [r3, #0]
 801f112:	b29a      	uxth	r2, r3
 801f114:	687b      	ldr	r3, [r7, #4]
 801f116:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 801f118:	b29b      	uxth	r3, r3
 801f11a:	1ad3      	subs	r3, r2, r3
 801f11c:	b29b      	uxth	r3, r3
 801f11e:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n",
                                  m, (u16_t)(m * TCP_SLOW_INTERVAL)));

      /* This is taken directly from VJs original code in his paper */
      m = (s16_t)(m - (pcb->sa >> 3));
 801f122:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801f126:	687b      	ldr	r3, [r7, #4]
 801f128:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801f12c:	10db      	asrs	r3, r3, #3
 801f12e:	b21b      	sxth	r3, r3
 801f130:	b29b      	uxth	r3, r3
 801f132:	1ad3      	subs	r3, r2, r3
 801f134:	b29b      	uxth	r3, r3
 801f136:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sa = (s16_t)(pcb->sa + m);
 801f13a:	687b      	ldr	r3, [r7, #4]
 801f13c:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801f140:	b29a      	uxth	r2, r3
 801f142:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801f146:	4413      	add	r3, r2
 801f148:	b29b      	uxth	r3, r3
 801f14a:	b21a      	sxth	r2, r3
 801f14c:	687b      	ldr	r3, [r7, #4]
 801f14e:	879a      	strh	r2, [r3, #60]	@ 0x3c
      if (m < 0) {
 801f150:	f9b7 304e 	ldrsh.w	r3, [r7, #78]	@ 0x4e
 801f154:	2b00      	cmp	r3, #0
 801f156:	da05      	bge.n	801f164 <tcp_receive+0x4b8>
        m = (s16_t) - m;
 801f158:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801f15c:	425b      	negs	r3, r3
 801f15e:	b29b      	uxth	r3, r3
 801f160:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      }
      m = (s16_t)(m - (pcb->sv >> 2));
 801f164:	f8b7 204e 	ldrh.w	r2, [r7, #78]	@ 0x4e
 801f168:	687b      	ldr	r3, [r7, #4]
 801f16a:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801f16e:	109b      	asrs	r3, r3, #2
 801f170:	b21b      	sxth	r3, r3
 801f172:	b29b      	uxth	r3, r3
 801f174:	1ad3      	subs	r3, r2, r3
 801f176:	b29b      	uxth	r3, r3
 801f178:	f8a7 304e 	strh.w	r3, [r7, #78]	@ 0x4e
      pcb->sv = (s16_t)(pcb->sv + m);
 801f17c:	687b      	ldr	r3, [r7, #4]
 801f17e:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801f182:	b29a      	uxth	r2, r3
 801f184:	f8b7 304e 	ldrh.w	r3, [r7, #78]	@ 0x4e
 801f188:	4413      	add	r3, r2
 801f18a:	b29b      	uxth	r3, r3
 801f18c:	b21a      	sxth	r2, r3
 801f18e:	687b      	ldr	r3, [r7, #4]
 801f190:	87da      	strh	r2, [r3, #62]	@ 0x3e
      pcb->rto = (s16_t)((pcb->sa >> 3) + pcb->sv);
 801f192:	687b      	ldr	r3, [r7, #4]
 801f194:	f9b3 303c 	ldrsh.w	r3, [r3, #60]	@ 0x3c
 801f198:	10db      	asrs	r3, r3, #3
 801f19a:	b21b      	sxth	r3, r3
 801f19c:	b29a      	uxth	r2, r3
 801f19e:	687b      	ldr	r3, [r7, #4]
 801f1a0:	f9b3 303e 	ldrsh.w	r3, [r3, #62]	@ 0x3e
 801f1a4:	b29b      	uxth	r3, r3
 801f1a6:	4413      	add	r3, r2
 801f1a8:	b29b      	uxth	r3, r3
 801f1aa:	b21a      	sxth	r2, r3
 801f1ac:	687b      	ldr	r3, [r7, #4]
 801f1ae:	f8a3 2040 	strh.w	r2, [r3, #64]	@ 0x40

      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n",
                                  pcb->rto, (u16_t)(pcb->rto * TCP_SLOW_INTERVAL)));

      pcb->rttest = 0;
 801f1b2:	687b      	ldr	r3, [r7, #4]
 801f1b4:	2200      	movs	r2, #0
 801f1b6:	635a      	str	r2, [r3, #52]	@ 0x34

  /* If the incoming segment contains data, we must process it
     further unless the pcb already received a FIN.
     (RFC 793, chapter 3.9, "SEGMENT ARRIVES" in states CLOSE-WAIT, CLOSING,
     LAST-ACK and TIME-WAIT: "Ignore the segment text.") */
  if ((tcplen > 0) && (pcb->state < CLOSE_WAIT)) {
 801f1b8:	4b35      	ldr	r3, [pc, #212]	@ (801f290 <tcp_receive+0x5e4>)
 801f1ba:	881b      	ldrh	r3, [r3, #0]
 801f1bc:	2b00      	cmp	r3, #0
 801f1be:	f000 84df 	beq.w	801fb80 <tcp_receive+0xed4>
 801f1c2:	687b      	ldr	r3, [r7, #4]
 801f1c4:	7d1b      	ldrb	r3, [r3, #20]
 801f1c6:	2b06      	cmp	r3, #6
 801f1c8:	f200 84da 	bhi.w	801fb80 <tcp_receive+0xed4>
       this if the sequence number of the incoming segment is less
       than rcv_nxt, and the sequence number plus the length of the
       segment is larger than rcv_nxt. */
    /*    if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
          if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801f1cc:	687b      	ldr	r3, [r7, #4]
 801f1ce:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801f1d0:	4b30      	ldr	r3, [pc, #192]	@ (801f294 <tcp_receive+0x5e8>)
 801f1d2:	681b      	ldr	r3, [r3, #0]
 801f1d4:	1ad3      	subs	r3, r2, r3
 801f1d6:	3b01      	subs	r3, #1
 801f1d8:	2b00      	cmp	r3, #0
 801f1da:	f2c0 808f 	blt.w	801f2fc <tcp_receive+0x650>
 801f1de:	687b      	ldr	r3, [r7, #4]
 801f1e0:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801f1e2:	4b2b      	ldr	r3, [pc, #172]	@ (801f290 <tcp_receive+0x5e4>)
 801f1e4:	881b      	ldrh	r3, [r3, #0]
 801f1e6:	4619      	mov	r1, r3
 801f1e8:	4b2a      	ldr	r3, [pc, #168]	@ (801f294 <tcp_receive+0x5e8>)
 801f1ea:	681b      	ldr	r3, [r3, #0]
 801f1ec:	440b      	add	r3, r1
 801f1ee:	1ad3      	subs	r3, r2, r3
 801f1f0:	3301      	adds	r3, #1
 801f1f2:	2b00      	cmp	r3, #0
 801f1f4:	f300 8082 	bgt.w	801f2fc <tcp_receive+0x650>

         After we are done with adjusting the pbuf pointers we must
         adjust the ->data pointer in the seg and the segment
         length.*/

      struct pbuf *p = inseg.p;
 801f1f8:	4b27      	ldr	r3, [pc, #156]	@ (801f298 <tcp_receive+0x5ec>)
 801f1fa:	685b      	ldr	r3, [r3, #4]
 801f1fc:	647b      	str	r3, [r7, #68]	@ 0x44
      u32_t off32 = pcb->rcv_nxt - seqno;
 801f1fe:	687b      	ldr	r3, [r7, #4]
 801f200:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801f202:	4b24      	ldr	r3, [pc, #144]	@ (801f294 <tcp_receive+0x5e8>)
 801f204:	681b      	ldr	r3, [r3, #0]
 801f206:	1ad3      	subs	r3, r2, r3
 801f208:	627b      	str	r3, [r7, #36]	@ 0x24
      u16_t new_tot_len, off;
      LWIP_ASSERT("inseg.p != NULL", inseg.p);
 801f20a:	4b23      	ldr	r3, [pc, #140]	@ (801f298 <tcp_receive+0x5ec>)
 801f20c:	685b      	ldr	r3, [r3, #4]
 801f20e:	2b00      	cmp	r3, #0
 801f210:	d106      	bne.n	801f220 <tcp_receive+0x574>
 801f212:	4b22      	ldr	r3, [pc, #136]	@ (801f29c <tcp_receive+0x5f0>)
 801f214:	f240 5294 	movw	r2, #1428	@ 0x594
 801f218:	4921      	ldr	r1, [pc, #132]	@ (801f2a0 <tcp_receive+0x5f4>)
 801f21a:	4822      	ldr	r0, [pc, #136]	@ (801f2a4 <tcp_receive+0x5f8>)
 801f21c:	f00b fc1e 	bl	802aa5c <iprintf>
      LWIP_ASSERT("insane offset!", (off32 < 0xffff));
 801f220:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801f222:	f64f 72fe 	movw	r2, #65534	@ 0xfffe
 801f226:	4293      	cmp	r3, r2
 801f228:	d906      	bls.n	801f238 <tcp_receive+0x58c>
 801f22a:	4b1c      	ldr	r3, [pc, #112]	@ (801f29c <tcp_receive+0x5f0>)
 801f22c:	f240 5295 	movw	r2, #1429	@ 0x595
 801f230:	491d      	ldr	r1, [pc, #116]	@ (801f2a8 <tcp_receive+0x5fc>)
 801f232:	481c      	ldr	r0, [pc, #112]	@ (801f2a4 <tcp_receive+0x5f8>)
 801f234:	f00b fc12 	bl	802aa5c <iprintf>
      off = (u16_t)off32;
 801f238:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 801f23a:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
      LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off));
 801f23e:	4b16      	ldr	r3, [pc, #88]	@ (801f298 <tcp_receive+0x5ec>)
 801f240:	685b      	ldr	r3, [r3, #4]
 801f242:	891b      	ldrh	r3, [r3, #8]
 801f244:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801f248:	429a      	cmp	r2, r3
 801f24a:	d906      	bls.n	801f25a <tcp_receive+0x5ae>
 801f24c:	4b13      	ldr	r3, [pc, #76]	@ (801f29c <tcp_receive+0x5f0>)
 801f24e:	f240 5297 	movw	r2, #1431	@ 0x597
 801f252:	4916      	ldr	r1, [pc, #88]	@ (801f2ac <tcp_receive+0x600>)
 801f254:	4813      	ldr	r0, [pc, #76]	@ (801f2a4 <tcp_receive+0x5f8>)
 801f256:	f00b fc01 	bl	802aa5c <iprintf>
      inseg.len -= off;
 801f25a:	4b0f      	ldr	r3, [pc, #60]	@ (801f298 <tcp_receive+0x5ec>)
 801f25c:	891a      	ldrh	r2, [r3, #8]
 801f25e:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801f262:	1ad3      	subs	r3, r2, r3
 801f264:	b29a      	uxth	r2, r3
 801f266:	4b0c      	ldr	r3, [pc, #48]	@ (801f298 <tcp_receive+0x5ec>)
 801f268:	811a      	strh	r2, [r3, #8]
      new_tot_len = (u16_t)(inseg.p->tot_len - off);
 801f26a:	4b0b      	ldr	r3, [pc, #44]	@ (801f298 <tcp_receive+0x5ec>)
 801f26c:	685b      	ldr	r3, [r3, #4]
 801f26e:	891a      	ldrh	r2, [r3, #8]
 801f270:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801f274:	1ad3      	subs	r3, r2, r3
 801f276:	847b      	strh	r3, [r7, #34]	@ 0x22
      while (p->len < off) {
 801f278:	e02a      	b.n	801f2d0 <tcp_receive+0x624>
 801f27a:	bf00      	nop
 801f27c:	080302f0 	.word	0x080302f0
 801f280:	080302f8 	.word	0x080302f8
 801f284:	2402afec 	.word	0x2402afec
 801f288:	2402afe8 	.word	0x2402afe8
 801f28c:	2402afa8 	.word	0x2402afa8
 801f290:	2402afee 	.word	0x2402afee
 801f294:	2402afe4 	.word	0x2402afe4
 801f298:	2402afc0 	.word	0x2402afc0
 801f29c:	0802ff88 	.word	0x0802ff88
 801f2a0:	08030300 	.word	0x08030300
 801f2a4:	0802ffd4 	.word	0x0802ffd4
 801f2a8:	08030310 	.word	0x08030310
 801f2ac:	08030320 	.word	0x08030320
        off -= p->len;
 801f2b0:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801f2b2:	895b      	ldrh	r3, [r3, #10]
 801f2b4:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801f2b8:	1ad3      	subs	r3, r2, r3
 801f2ba:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
        /* all pbufs up to and including this one have len==0, so tot_len is equal */
        p->tot_len = new_tot_len;
 801f2be:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801f2c0:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 801f2c2:	811a      	strh	r2, [r3, #8]
        p->len = 0;
 801f2c4:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801f2c6:	2200      	movs	r2, #0
 801f2c8:	815a      	strh	r2, [r3, #10]
        p = p->next;
 801f2ca:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801f2cc:	681b      	ldr	r3, [r3, #0]
 801f2ce:	647b      	str	r3, [r7, #68]	@ 0x44
      while (p->len < off) {
 801f2d0:	6c7b      	ldr	r3, [r7, #68]	@ 0x44
 801f2d2:	895b      	ldrh	r3, [r3, #10]
 801f2d4:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 801f2d8:	429a      	cmp	r2, r3
 801f2da:	d8e9      	bhi.n	801f2b0 <tcp_receive+0x604>
      }
      /* cannot fail... */
      pbuf_remove_header(p, off);
 801f2dc:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 801f2e0:	4619      	mov	r1, r3
 801f2e2:	6c78      	ldr	r0, [r7, #68]	@ 0x44
 801f2e4:	f7fc f88a 	bl	801b3fc <pbuf_remove_header>
      inseg.tcphdr->seqno = seqno = pcb->rcv_nxt;
 801f2e8:	687b      	ldr	r3, [r7, #4]
 801f2ea:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f2ec:	4a90      	ldr	r2, [pc, #576]	@ (801f530 <tcp_receive+0x884>)
 801f2ee:	6013      	str	r3, [r2, #0]
 801f2f0:	4b90      	ldr	r3, [pc, #576]	@ (801f534 <tcp_receive+0x888>)
 801f2f2:	691b      	ldr	r3, [r3, #16]
 801f2f4:	4a8e      	ldr	r2, [pc, #568]	@ (801f530 <tcp_receive+0x884>)
 801f2f6:	6812      	ldr	r2, [r2, #0]
 801f2f8:	605a      	str	r2, [r3, #4]
    if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)) {
 801f2fa:	e00d      	b.n	801f318 <tcp_receive+0x66c>
    } else {
      if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)) {
 801f2fc:	4b8c      	ldr	r3, [pc, #560]	@ (801f530 <tcp_receive+0x884>)
 801f2fe:	681a      	ldr	r2, [r3, #0]
 801f300:	687b      	ldr	r3, [r7, #4]
 801f302:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f304:	1ad3      	subs	r3, r2, r3
 801f306:	2b00      	cmp	r3, #0
 801f308:	da06      	bge.n	801f318 <tcp_receive+0x66c>
        /* the whole segment is < rcv_nxt */
        /* must be a duplicate of a packet that has already been correctly handled */

        LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno));
        tcp_ack_now(pcb);
 801f30a:	687b      	ldr	r3, [r7, #4]
 801f30c:	8b5b      	ldrh	r3, [r3, #26]
 801f30e:	f043 0302 	orr.w	r3, r3, #2
 801f312:	b29a      	uxth	r2, r3
 801f314:	687b      	ldr	r3, [r7, #4]
 801f316:	835a      	strh	r2, [r3, #26]
    }

    /* The sequence number must be within the window (above rcv_nxt
       and below rcv_nxt + rcv_wnd) in order to be further
       processed. */
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801f318:	4b85      	ldr	r3, [pc, #532]	@ (801f530 <tcp_receive+0x884>)
 801f31a:	681a      	ldr	r2, [r3, #0]
 801f31c:	687b      	ldr	r3, [r7, #4]
 801f31e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f320:	1ad3      	subs	r3, r2, r3
 801f322:	2b00      	cmp	r3, #0
 801f324:	f2c0 8427 	blt.w	801fb76 <tcp_receive+0xeca>
 801f328:	4b81      	ldr	r3, [pc, #516]	@ (801f530 <tcp_receive+0x884>)
 801f32a:	681a      	ldr	r2, [r3, #0]
 801f32c:	687b      	ldr	r3, [r7, #4]
 801f32e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f330:	6879      	ldr	r1, [r7, #4]
 801f332:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f334:	440b      	add	r3, r1
 801f336:	1ad3      	subs	r3, r2, r3
 801f338:	3301      	adds	r3, #1
 801f33a:	2b00      	cmp	r3, #0
 801f33c:	f300 841b 	bgt.w	801fb76 <tcp_receive+0xeca>
                        pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
      if (pcb->rcv_nxt == seqno) {
 801f340:	687b      	ldr	r3, [r7, #4]
 801f342:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 801f344:	4b7a      	ldr	r3, [pc, #488]	@ (801f530 <tcp_receive+0x884>)
 801f346:	681b      	ldr	r3, [r3, #0]
 801f348:	429a      	cmp	r2, r3
 801f34a:	f040 8298 	bne.w	801f87e <tcp_receive+0xbd2>
        /* The incoming segment is the next in sequence. We check if
           we have to trim the end of the segment and update rcv_nxt
           and pass the data to the application. */
        tcplen = TCP_TCPLEN(&inseg);
 801f34e:	4b79      	ldr	r3, [pc, #484]	@ (801f534 <tcp_receive+0x888>)
 801f350:	891c      	ldrh	r4, [r3, #8]
 801f352:	4b78      	ldr	r3, [pc, #480]	@ (801f534 <tcp_receive+0x888>)
 801f354:	691b      	ldr	r3, [r3, #16]
 801f356:	899b      	ldrh	r3, [r3, #12]
 801f358:	b29b      	uxth	r3, r3
 801f35a:	4618      	mov	r0, r3
 801f35c:	f7fa fc24 	bl	8019ba8 <lwip_htons>
 801f360:	4603      	mov	r3, r0
 801f362:	b2db      	uxtb	r3, r3
 801f364:	f003 0303 	and.w	r3, r3, #3
 801f368:	2b00      	cmp	r3, #0
 801f36a:	d001      	beq.n	801f370 <tcp_receive+0x6c4>
 801f36c:	2301      	movs	r3, #1
 801f36e:	e000      	b.n	801f372 <tcp_receive+0x6c6>
 801f370:	2300      	movs	r3, #0
 801f372:	4423      	add	r3, r4
 801f374:	b29a      	uxth	r2, r3
 801f376:	4b70      	ldr	r3, [pc, #448]	@ (801f538 <tcp_receive+0x88c>)
 801f378:	801a      	strh	r2, [r3, #0]

        if (tcplen > pcb->rcv_wnd) {
 801f37a:	687b      	ldr	r3, [r7, #4]
 801f37c:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f37e:	4b6e      	ldr	r3, [pc, #440]	@ (801f538 <tcp_receive+0x88c>)
 801f380:	881b      	ldrh	r3, [r3, #0]
 801f382:	429a      	cmp	r2, r3
 801f384:	d274      	bcs.n	801f470 <tcp_receive+0x7c4>
          LWIP_DEBUGF(TCP_INPUT_DEBUG,
                      ("tcp_receive: other end overran receive window"
                       "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                       seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801f386:	4b6b      	ldr	r3, [pc, #428]	@ (801f534 <tcp_receive+0x888>)
 801f388:	691b      	ldr	r3, [r3, #16]
 801f38a:	899b      	ldrh	r3, [r3, #12]
 801f38c:	b29b      	uxth	r3, r3
 801f38e:	4618      	mov	r0, r3
 801f390:	f7fa fc0a 	bl	8019ba8 <lwip_htons>
 801f394:	4603      	mov	r3, r0
 801f396:	b2db      	uxtb	r3, r3
 801f398:	f003 0301 	and.w	r3, r3, #1
 801f39c:	2b00      	cmp	r3, #0
 801f39e:	d01e      	beq.n	801f3de <tcp_receive+0x732>
            /* Must remove the FIN from the header as we're trimming
             * that byte of sequence-space from the packet */
            TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) & ~(unsigned int)TCP_FIN);
 801f3a0:	4b64      	ldr	r3, [pc, #400]	@ (801f534 <tcp_receive+0x888>)
 801f3a2:	691b      	ldr	r3, [r3, #16]
 801f3a4:	899b      	ldrh	r3, [r3, #12]
 801f3a6:	b29b      	uxth	r3, r3
 801f3a8:	b21b      	sxth	r3, r3
 801f3aa:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801f3ae:	b21c      	sxth	r4, r3
 801f3b0:	4b60      	ldr	r3, [pc, #384]	@ (801f534 <tcp_receive+0x888>)
 801f3b2:	691b      	ldr	r3, [r3, #16]
 801f3b4:	899b      	ldrh	r3, [r3, #12]
 801f3b6:	b29b      	uxth	r3, r3
 801f3b8:	4618      	mov	r0, r3
 801f3ba:	f7fa fbf5 	bl	8019ba8 <lwip_htons>
 801f3be:	4603      	mov	r3, r0
 801f3c0:	b2db      	uxtb	r3, r3
 801f3c2:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801f3c6:	b29b      	uxth	r3, r3
 801f3c8:	4618      	mov	r0, r3
 801f3ca:	f7fa fbed 	bl	8019ba8 <lwip_htons>
 801f3ce:	4603      	mov	r3, r0
 801f3d0:	b21b      	sxth	r3, r3
 801f3d2:	4323      	orrs	r3, r4
 801f3d4:	b21a      	sxth	r2, r3
 801f3d6:	4b57      	ldr	r3, [pc, #348]	@ (801f534 <tcp_receive+0x888>)
 801f3d8:	691b      	ldr	r3, [r3, #16]
 801f3da:	b292      	uxth	r2, r2
 801f3dc:	819a      	strh	r2, [r3, #12]
          }
          /* Adjust length of segment to fit in the window. */
          TCPWND_CHECK16(pcb->rcv_wnd);
          inseg.len = (u16_t)pcb->rcv_wnd;
 801f3de:	687b      	ldr	r3, [r7, #4]
 801f3e0:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f3e2:	4b54      	ldr	r3, [pc, #336]	@ (801f534 <tcp_receive+0x888>)
 801f3e4:	811a      	strh	r2, [r3, #8]
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801f3e6:	4b53      	ldr	r3, [pc, #332]	@ (801f534 <tcp_receive+0x888>)
 801f3e8:	691b      	ldr	r3, [r3, #16]
 801f3ea:	899b      	ldrh	r3, [r3, #12]
 801f3ec:	b29b      	uxth	r3, r3
 801f3ee:	4618      	mov	r0, r3
 801f3f0:	f7fa fbda 	bl	8019ba8 <lwip_htons>
 801f3f4:	4603      	mov	r3, r0
 801f3f6:	b2db      	uxtb	r3, r3
 801f3f8:	f003 0302 	and.w	r3, r3, #2
 801f3fc:	2b00      	cmp	r3, #0
 801f3fe:	d005      	beq.n	801f40c <tcp_receive+0x760>
            inseg.len -= 1;
 801f400:	4b4c      	ldr	r3, [pc, #304]	@ (801f534 <tcp_receive+0x888>)
 801f402:	891b      	ldrh	r3, [r3, #8]
 801f404:	3b01      	subs	r3, #1
 801f406:	b29a      	uxth	r2, r3
 801f408:	4b4a      	ldr	r3, [pc, #296]	@ (801f534 <tcp_receive+0x888>)
 801f40a:	811a      	strh	r2, [r3, #8]
          }
          pbuf_realloc(inseg.p, inseg.len);
 801f40c:	4b49      	ldr	r3, [pc, #292]	@ (801f534 <tcp_receive+0x888>)
 801f40e:	685b      	ldr	r3, [r3, #4]
 801f410:	4a48      	ldr	r2, [pc, #288]	@ (801f534 <tcp_receive+0x888>)
 801f412:	8912      	ldrh	r2, [r2, #8]
 801f414:	4611      	mov	r1, r2
 801f416:	4618      	mov	r0, r3
 801f418:	f7fb fef2 	bl	801b200 <pbuf_realloc>
          tcplen = TCP_TCPLEN(&inseg);
 801f41c:	4b45      	ldr	r3, [pc, #276]	@ (801f534 <tcp_receive+0x888>)
 801f41e:	891c      	ldrh	r4, [r3, #8]
 801f420:	4b44      	ldr	r3, [pc, #272]	@ (801f534 <tcp_receive+0x888>)
 801f422:	691b      	ldr	r3, [r3, #16]
 801f424:	899b      	ldrh	r3, [r3, #12]
 801f426:	b29b      	uxth	r3, r3
 801f428:	4618      	mov	r0, r3
 801f42a:	f7fa fbbd 	bl	8019ba8 <lwip_htons>
 801f42e:	4603      	mov	r3, r0
 801f430:	b2db      	uxtb	r3, r3
 801f432:	f003 0303 	and.w	r3, r3, #3
 801f436:	2b00      	cmp	r3, #0
 801f438:	d001      	beq.n	801f43e <tcp_receive+0x792>
 801f43a:	2301      	movs	r3, #1
 801f43c:	e000      	b.n	801f440 <tcp_receive+0x794>
 801f43e:	2300      	movs	r3, #0
 801f440:	4423      	add	r3, r4
 801f442:	b29a      	uxth	r2, r3
 801f444:	4b3c      	ldr	r3, [pc, #240]	@ (801f538 <tcp_receive+0x88c>)
 801f446:	801a      	strh	r2, [r3, #0]
          LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801f448:	4b3b      	ldr	r3, [pc, #236]	@ (801f538 <tcp_receive+0x88c>)
 801f44a:	881b      	ldrh	r3, [r3, #0]
 801f44c:	461a      	mov	r2, r3
 801f44e:	4b38      	ldr	r3, [pc, #224]	@ (801f530 <tcp_receive+0x884>)
 801f450:	681b      	ldr	r3, [r3, #0]
 801f452:	441a      	add	r2, r3
 801f454:	687b      	ldr	r3, [r7, #4]
 801f456:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f458:	6879      	ldr	r1, [r7, #4]
 801f45a:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801f45c:	440b      	add	r3, r1
 801f45e:	429a      	cmp	r2, r3
 801f460:	d006      	beq.n	801f470 <tcp_receive+0x7c4>
 801f462:	4b36      	ldr	r3, [pc, #216]	@ (801f53c <tcp_receive+0x890>)
 801f464:	f240 52cb 	movw	r2, #1483	@ 0x5cb
 801f468:	4935      	ldr	r1, [pc, #212]	@ (801f540 <tcp_receive+0x894>)
 801f46a:	4836      	ldr	r0, [pc, #216]	@ (801f544 <tcp_receive+0x898>)
 801f46c:	f00b faf6 	bl	802aa5c <iprintf>
        }
#if TCP_QUEUE_OOSEQ
        /* Received in-sequence data, adjust ooseq data if:
           - FIN has been received or
           - inseq overlaps with ooseq */
        if (pcb->ooseq != NULL) {
 801f470:	687b      	ldr	r3, [r7, #4]
 801f472:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f474:	2b00      	cmp	r3, #0
 801f476:	f000 80e6 	beq.w	801f646 <tcp_receive+0x99a>
          if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801f47a:	4b2e      	ldr	r3, [pc, #184]	@ (801f534 <tcp_receive+0x888>)
 801f47c:	691b      	ldr	r3, [r3, #16]
 801f47e:	899b      	ldrh	r3, [r3, #12]
 801f480:	b29b      	uxth	r3, r3
 801f482:	4618      	mov	r0, r3
 801f484:	f7fa fb90 	bl	8019ba8 <lwip_htons>
 801f488:	4603      	mov	r3, r0
 801f48a:	b2db      	uxtb	r3, r3
 801f48c:	f003 0301 	and.w	r3, r3, #1
 801f490:	2b00      	cmp	r3, #0
 801f492:	d010      	beq.n	801f4b6 <tcp_receive+0x80a>
            LWIP_DEBUGF(TCP_INPUT_DEBUG,
                        ("tcp_receive: received in-order FIN, binning ooseq queue\n"));
            /* Received in-order FIN means anything that was received
             * out of order must now have been received in-order, so
             * bin the ooseq queue */
            while (pcb->ooseq != NULL) {
 801f494:	e00a      	b.n	801f4ac <tcp_receive+0x800>
              struct tcp_seg *old_ooseq = pcb->ooseq;
 801f496:	687b      	ldr	r3, [r7, #4]
 801f498:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f49a:	60fb      	str	r3, [r7, #12]
              pcb->ooseq = pcb->ooseq->next;
 801f49c:	687b      	ldr	r3, [r7, #4]
 801f49e:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f4a0:	681a      	ldr	r2, [r3, #0]
 801f4a2:	687b      	ldr	r3, [r7, #4]
 801f4a4:	675a      	str	r2, [r3, #116]	@ 0x74
              tcp_seg_free(old_ooseq);
 801f4a6:	68f8      	ldr	r0, [r7, #12]
 801f4a8:	f7fd fcb9 	bl	801ce1e <tcp_seg_free>
            while (pcb->ooseq != NULL) {
 801f4ac:	687b      	ldr	r3, [r7, #4]
 801f4ae:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f4b0:	2b00      	cmp	r3, #0
 801f4b2:	d1f0      	bne.n	801f496 <tcp_receive+0x7ea>
 801f4b4:	e0c7      	b.n	801f646 <tcp_receive+0x99a>
            }
          } else {
            struct tcp_seg *next = pcb->ooseq;
 801f4b6:	687b      	ldr	r3, [r7, #4]
 801f4b8:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f4ba:	63fb      	str	r3, [r7, #60]	@ 0x3c
            /* Remove all segments on ooseq that are covered by inseg already.
             * FIN is copied from ooseq to inseg if present. */
            while (next &&
 801f4bc:	e051      	b.n	801f562 <tcp_receive+0x8b6>
                   TCP_SEQ_GEQ(seqno + tcplen,
                               next->tcphdr->seqno + next->len)) {
              struct tcp_seg *tmp;
              /* inseg cannot have FIN here (already processed above) */
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801f4be:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f4c0:	691b      	ldr	r3, [r3, #16]
 801f4c2:	899b      	ldrh	r3, [r3, #12]
 801f4c4:	b29b      	uxth	r3, r3
 801f4c6:	4618      	mov	r0, r3
 801f4c8:	f7fa fb6e 	bl	8019ba8 <lwip_htons>
 801f4cc:	4603      	mov	r3, r0
 801f4ce:	b2db      	uxtb	r3, r3
 801f4d0:	f003 0301 	and.w	r3, r3, #1
 801f4d4:	2b00      	cmp	r3, #0
 801f4d6:	d03c      	beq.n	801f552 <tcp_receive+0x8a6>
                  (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) {
 801f4d8:	4b16      	ldr	r3, [pc, #88]	@ (801f534 <tcp_receive+0x888>)
 801f4da:	691b      	ldr	r3, [r3, #16]
 801f4dc:	899b      	ldrh	r3, [r3, #12]
 801f4de:	b29b      	uxth	r3, r3
 801f4e0:	4618      	mov	r0, r3
 801f4e2:	f7fa fb61 	bl	8019ba8 <lwip_htons>
 801f4e6:	4603      	mov	r3, r0
 801f4e8:	b2db      	uxtb	r3, r3
 801f4ea:	f003 0302 	and.w	r3, r3, #2
              if ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0 &&
 801f4ee:	2b00      	cmp	r3, #0
 801f4f0:	d12f      	bne.n	801f552 <tcp_receive+0x8a6>
                TCPH_SET_FLAG(inseg.tcphdr, TCP_FIN);
 801f4f2:	4b10      	ldr	r3, [pc, #64]	@ (801f534 <tcp_receive+0x888>)
 801f4f4:	691b      	ldr	r3, [r3, #16]
 801f4f6:	899b      	ldrh	r3, [r3, #12]
 801f4f8:	b29c      	uxth	r4, r3
 801f4fa:	2001      	movs	r0, #1
 801f4fc:	f7fa fb54 	bl	8019ba8 <lwip_htons>
 801f500:	4603      	mov	r3, r0
 801f502:	461a      	mov	r2, r3
 801f504:	4b0b      	ldr	r3, [pc, #44]	@ (801f534 <tcp_receive+0x888>)
 801f506:	691b      	ldr	r3, [r3, #16]
 801f508:	4322      	orrs	r2, r4
 801f50a:	b292      	uxth	r2, r2
 801f50c:	819a      	strh	r2, [r3, #12]
                tcplen = TCP_TCPLEN(&inseg);
 801f50e:	4b09      	ldr	r3, [pc, #36]	@ (801f534 <tcp_receive+0x888>)
 801f510:	891c      	ldrh	r4, [r3, #8]
 801f512:	4b08      	ldr	r3, [pc, #32]	@ (801f534 <tcp_receive+0x888>)
 801f514:	691b      	ldr	r3, [r3, #16]
 801f516:	899b      	ldrh	r3, [r3, #12]
 801f518:	b29b      	uxth	r3, r3
 801f51a:	4618      	mov	r0, r3
 801f51c:	f7fa fb44 	bl	8019ba8 <lwip_htons>
 801f520:	4603      	mov	r3, r0
 801f522:	b2db      	uxtb	r3, r3
 801f524:	f003 0303 	and.w	r3, r3, #3
 801f528:	2b00      	cmp	r3, #0
 801f52a:	d00d      	beq.n	801f548 <tcp_receive+0x89c>
 801f52c:	2301      	movs	r3, #1
 801f52e:	e00c      	b.n	801f54a <tcp_receive+0x89e>
 801f530:	2402afe4 	.word	0x2402afe4
 801f534:	2402afc0 	.word	0x2402afc0
 801f538:	2402afee 	.word	0x2402afee
 801f53c:	0802ff88 	.word	0x0802ff88
 801f540:	08030330 	.word	0x08030330
 801f544:	0802ffd4 	.word	0x0802ffd4
 801f548:	2300      	movs	r3, #0
 801f54a:	4423      	add	r3, r4
 801f54c:	b29a      	uxth	r2, r3
 801f54e:	4b98      	ldr	r3, [pc, #608]	@ (801f7b0 <tcp_receive+0xb04>)
 801f550:	801a      	strh	r2, [r3, #0]
              }
              tmp = next;
 801f552:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f554:	613b      	str	r3, [r7, #16]
              next = next->next;
 801f556:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f558:	681b      	ldr	r3, [r3, #0]
 801f55a:	63fb      	str	r3, [r7, #60]	@ 0x3c
              tcp_seg_free(tmp);
 801f55c:	6938      	ldr	r0, [r7, #16]
 801f55e:	f7fd fc5e 	bl	801ce1e <tcp_seg_free>
            while (next &&
 801f562:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f564:	2b00      	cmp	r3, #0
 801f566:	d00e      	beq.n	801f586 <tcp_receive+0x8da>
                   TCP_SEQ_GEQ(seqno + tcplen,
 801f568:	4b91      	ldr	r3, [pc, #580]	@ (801f7b0 <tcp_receive+0xb04>)
 801f56a:	881b      	ldrh	r3, [r3, #0]
 801f56c:	461a      	mov	r2, r3
 801f56e:	4b91      	ldr	r3, [pc, #580]	@ (801f7b4 <tcp_receive+0xb08>)
 801f570:	681b      	ldr	r3, [r3, #0]
 801f572:	441a      	add	r2, r3
 801f574:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f576:	691b      	ldr	r3, [r3, #16]
 801f578:	685b      	ldr	r3, [r3, #4]
 801f57a:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 801f57c:	8909      	ldrh	r1, [r1, #8]
 801f57e:	440b      	add	r3, r1
 801f580:	1ad3      	subs	r3, r2, r3
            while (next &&
 801f582:	2b00      	cmp	r3, #0
 801f584:	da9b      	bge.n	801f4be <tcp_receive+0x812>
            }
            /* Now trim right side of inseg if it overlaps with the first
             * segment on ooseq */
            if (next &&
 801f586:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f588:	2b00      	cmp	r3, #0
 801f58a:	d059      	beq.n	801f640 <tcp_receive+0x994>
                TCP_SEQ_GT(seqno + tcplen,
 801f58c:	4b88      	ldr	r3, [pc, #544]	@ (801f7b0 <tcp_receive+0xb04>)
 801f58e:	881b      	ldrh	r3, [r3, #0]
 801f590:	461a      	mov	r2, r3
 801f592:	4b88      	ldr	r3, [pc, #544]	@ (801f7b4 <tcp_receive+0xb08>)
 801f594:	681b      	ldr	r3, [r3, #0]
 801f596:	441a      	add	r2, r3
 801f598:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f59a:	691b      	ldr	r3, [r3, #16]
 801f59c:	685b      	ldr	r3, [r3, #4]
 801f59e:	1ad3      	subs	r3, r2, r3
            if (next &&
 801f5a0:	2b00      	cmp	r3, #0
 801f5a2:	dd4d      	ble.n	801f640 <tcp_receive+0x994>
                           next->tcphdr->seqno)) {
              /* inseg cannot have FIN here (already processed above) */
              inseg.len = (u16_t)(next->tcphdr->seqno - seqno);
 801f5a4:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f5a6:	691b      	ldr	r3, [r3, #16]
 801f5a8:	685b      	ldr	r3, [r3, #4]
 801f5aa:	b29a      	uxth	r2, r3
 801f5ac:	4b81      	ldr	r3, [pc, #516]	@ (801f7b4 <tcp_receive+0xb08>)
 801f5ae:	681b      	ldr	r3, [r3, #0]
 801f5b0:	b29b      	uxth	r3, r3
 801f5b2:	1ad3      	subs	r3, r2, r3
 801f5b4:	b29a      	uxth	r2, r3
 801f5b6:	4b80      	ldr	r3, [pc, #512]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f5b8:	811a      	strh	r2, [r3, #8]
              if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) {
 801f5ba:	4b7f      	ldr	r3, [pc, #508]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f5bc:	691b      	ldr	r3, [r3, #16]
 801f5be:	899b      	ldrh	r3, [r3, #12]
 801f5c0:	b29b      	uxth	r3, r3
 801f5c2:	4618      	mov	r0, r3
 801f5c4:	f7fa faf0 	bl	8019ba8 <lwip_htons>
 801f5c8:	4603      	mov	r3, r0
 801f5ca:	b2db      	uxtb	r3, r3
 801f5cc:	f003 0302 	and.w	r3, r3, #2
 801f5d0:	2b00      	cmp	r3, #0
 801f5d2:	d005      	beq.n	801f5e0 <tcp_receive+0x934>
                inseg.len -= 1;
 801f5d4:	4b78      	ldr	r3, [pc, #480]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f5d6:	891b      	ldrh	r3, [r3, #8]
 801f5d8:	3b01      	subs	r3, #1
 801f5da:	b29a      	uxth	r2, r3
 801f5dc:	4b76      	ldr	r3, [pc, #472]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f5de:	811a      	strh	r2, [r3, #8]
              }
              pbuf_realloc(inseg.p, inseg.len);
 801f5e0:	4b75      	ldr	r3, [pc, #468]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f5e2:	685b      	ldr	r3, [r3, #4]
 801f5e4:	4a74      	ldr	r2, [pc, #464]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f5e6:	8912      	ldrh	r2, [r2, #8]
 801f5e8:	4611      	mov	r1, r2
 801f5ea:	4618      	mov	r0, r3
 801f5ec:	f7fb fe08 	bl	801b200 <pbuf_realloc>
              tcplen = TCP_TCPLEN(&inseg);
 801f5f0:	4b71      	ldr	r3, [pc, #452]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f5f2:	891c      	ldrh	r4, [r3, #8]
 801f5f4:	4b70      	ldr	r3, [pc, #448]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f5f6:	691b      	ldr	r3, [r3, #16]
 801f5f8:	899b      	ldrh	r3, [r3, #12]
 801f5fa:	b29b      	uxth	r3, r3
 801f5fc:	4618      	mov	r0, r3
 801f5fe:	f7fa fad3 	bl	8019ba8 <lwip_htons>
 801f602:	4603      	mov	r3, r0
 801f604:	b2db      	uxtb	r3, r3
 801f606:	f003 0303 	and.w	r3, r3, #3
 801f60a:	2b00      	cmp	r3, #0
 801f60c:	d001      	beq.n	801f612 <tcp_receive+0x966>
 801f60e:	2301      	movs	r3, #1
 801f610:	e000      	b.n	801f614 <tcp_receive+0x968>
 801f612:	2300      	movs	r3, #0
 801f614:	4423      	add	r3, r4
 801f616:	b29a      	uxth	r2, r3
 801f618:	4b65      	ldr	r3, [pc, #404]	@ (801f7b0 <tcp_receive+0xb04>)
 801f61a:	801a      	strh	r2, [r3, #0]
              LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n",
 801f61c:	4b64      	ldr	r3, [pc, #400]	@ (801f7b0 <tcp_receive+0xb04>)
 801f61e:	881b      	ldrh	r3, [r3, #0]
 801f620:	461a      	mov	r2, r3
 801f622:	4b64      	ldr	r3, [pc, #400]	@ (801f7b4 <tcp_receive+0xb08>)
 801f624:	681b      	ldr	r3, [r3, #0]
 801f626:	441a      	add	r2, r3
 801f628:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 801f62a:	691b      	ldr	r3, [r3, #16]
 801f62c:	685b      	ldr	r3, [r3, #4]
 801f62e:	429a      	cmp	r2, r3
 801f630:	d006      	beq.n	801f640 <tcp_receive+0x994>
 801f632:	4b62      	ldr	r3, [pc, #392]	@ (801f7bc <tcp_receive+0xb10>)
 801f634:	f240 52fc 	movw	r2, #1532	@ 0x5fc
 801f638:	4961      	ldr	r1, [pc, #388]	@ (801f7c0 <tcp_receive+0xb14>)
 801f63a:	4862      	ldr	r0, [pc, #392]	@ (801f7c4 <tcp_receive+0xb18>)
 801f63c:	f00b fa0e 	bl	802aa5c <iprintf>
                          (seqno + tcplen) == next->tcphdr->seqno);
            }
            pcb->ooseq = next;
 801f640:	687b      	ldr	r3, [r7, #4]
 801f642:	6bfa      	ldr	r2, [r7, #60]	@ 0x3c
 801f644:	675a      	str	r2, [r3, #116]	@ 0x74
          }
        }
#endif /* TCP_QUEUE_OOSEQ */

        pcb->rcv_nxt = seqno + tcplen;
 801f646:	4b5a      	ldr	r3, [pc, #360]	@ (801f7b0 <tcp_receive+0xb04>)
 801f648:	881b      	ldrh	r3, [r3, #0]
 801f64a:	461a      	mov	r2, r3
 801f64c:	4b59      	ldr	r3, [pc, #356]	@ (801f7b4 <tcp_receive+0xb08>)
 801f64e:	681b      	ldr	r3, [r3, #0]
 801f650:	441a      	add	r2, r3
 801f652:	687b      	ldr	r3, [r7, #4]
 801f654:	625a      	str	r2, [r3, #36]	@ 0x24

        /* Update the receiver's (our) window. */
        LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen);
 801f656:	687b      	ldr	r3, [r7, #4]
 801f658:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f65a:	4b55      	ldr	r3, [pc, #340]	@ (801f7b0 <tcp_receive+0xb04>)
 801f65c:	881b      	ldrh	r3, [r3, #0]
 801f65e:	429a      	cmp	r2, r3
 801f660:	d206      	bcs.n	801f670 <tcp_receive+0x9c4>
 801f662:	4b56      	ldr	r3, [pc, #344]	@ (801f7bc <tcp_receive+0xb10>)
 801f664:	f240 6207 	movw	r2, #1543	@ 0x607
 801f668:	4957      	ldr	r1, [pc, #348]	@ (801f7c8 <tcp_receive+0xb1c>)
 801f66a:	4856      	ldr	r0, [pc, #344]	@ (801f7c4 <tcp_receive+0xb18>)
 801f66c:	f00b f9f6 	bl	802aa5c <iprintf>
        pcb->rcv_wnd -= tcplen;
 801f670:	687b      	ldr	r3, [r7, #4]
 801f672:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f674:	4b4e      	ldr	r3, [pc, #312]	@ (801f7b0 <tcp_receive+0xb04>)
 801f676:	881b      	ldrh	r3, [r3, #0]
 801f678:	1ad3      	subs	r3, r2, r3
 801f67a:	b29a      	uxth	r2, r3
 801f67c:	687b      	ldr	r3, [r7, #4]
 801f67e:	851a      	strh	r2, [r3, #40]	@ 0x28

        tcp_update_rcv_ann_wnd(pcb);
 801f680:	6878      	ldr	r0, [r7, #4]
 801f682:	f7fc fd85 	bl	801c190 <tcp_update_rcv_ann_wnd>
           chains its data on this pbuf as well.

           If the segment was a FIN, we set the TF_GOT_FIN flag that will
           be used to indicate to the application that the remote side has
           closed its end of the connection. */
        if (inseg.p->tot_len > 0) {
 801f686:	4b4c      	ldr	r3, [pc, #304]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f688:	685b      	ldr	r3, [r3, #4]
 801f68a:	891b      	ldrh	r3, [r3, #8]
 801f68c:	2b00      	cmp	r3, #0
 801f68e:	d006      	beq.n	801f69e <tcp_receive+0x9f2>
          recv_data = inseg.p;
 801f690:	4b49      	ldr	r3, [pc, #292]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f692:	685b      	ldr	r3, [r3, #4]
 801f694:	4a4d      	ldr	r2, [pc, #308]	@ (801f7cc <tcp_receive+0xb20>)
 801f696:	6013      	str	r3, [r2, #0]
          /* Since this pbuf now is the responsibility of the
             application, we delete our reference to it so that we won't
             (mistakingly) deallocate it. */
          inseg.p = NULL;
 801f698:	4b47      	ldr	r3, [pc, #284]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f69a:	2200      	movs	r2, #0
 801f69c:	605a      	str	r2, [r3, #4]
        }
        if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) {
 801f69e:	4b46      	ldr	r3, [pc, #280]	@ (801f7b8 <tcp_receive+0xb0c>)
 801f6a0:	691b      	ldr	r3, [r3, #16]
 801f6a2:	899b      	ldrh	r3, [r3, #12]
 801f6a4:	b29b      	uxth	r3, r3
 801f6a6:	4618      	mov	r0, r3
 801f6a8:	f7fa fa7e 	bl	8019ba8 <lwip_htons>
 801f6ac:	4603      	mov	r3, r0
 801f6ae:	b2db      	uxtb	r3, r3
 801f6b0:	f003 0301 	and.w	r3, r3, #1
 801f6b4:	2b00      	cmp	r3, #0
 801f6b6:	f000 80b8 	beq.w	801f82a <tcp_receive+0xb7e>
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n"));
          recv_flags |= TF_GOT_FIN;
 801f6ba:	4b45      	ldr	r3, [pc, #276]	@ (801f7d0 <tcp_receive+0xb24>)
 801f6bc:	781b      	ldrb	r3, [r3, #0]
 801f6be:	f043 0320 	orr.w	r3, r3, #32
 801f6c2:	b2da      	uxtb	r2, r3
 801f6c4:	4b42      	ldr	r3, [pc, #264]	@ (801f7d0 <tcp_receive+0xb24>)
 801f6c6:	701a      	strb	r2, [r3, #0]
        }

#if TCP_QUEUE_OOSEQ
        /* We now check if we have segments on the ->ooseq queue that
           are now in sequence. */
        while (pcb->ooseq != NULL &&
 801f6c8:	e0af      	b.n	801f82a <tcp_receive+0xb7e>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {

          struct tcp_seg *cseg = pcb->ooseq;
 801f6ca:	687b      	ldr	r3, [r7, #4]
 801f6cc:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f6ce:	60bb      	str	r3, [r7, #8]
          seqno = pcb->ooseq->tcphdr->seqno;
 801f6d0:	687b      	ldr	r3, [r7, #4]
 801f6d2:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f6d4:	691b      	ldr	r3, [r3, #16]
 801f6d6:	685b      	ldr	r3, [r3, #4]
 801f6d8:	4a36      	ldr	r2, [pc, #216]	@ (801f7b4 <tcp_receive+0xb08>)
 801f6da:	6013      	str	r3, [r2, #0]

          pcb->rcv_nxt += TCP_TCPLEN(cseg);
 801f6dc:	68bb      	ldr	r3, [r7, #8]
 801f6de:	891b      	ldrh	r3, [r3, #8]
 801f6e0:	461c      	mov	r4, r3
 801f6e2:	68bb      	ldr	r3, [r7, #8]
 801f6e4:	691b      	ldr	r3, [r3, #16]
 801f6e6:	899b      	ldrh	r3, [r3, #12]
 801f6e8:	b29b      	uxth	r3, r3
 801f6ea:	4618      	mov	r0, r3
 801f6ec:	f7fa fa5c 	bl	8019ba8 <lwip_htons>
 801f6f0:	4603      	mov	r3, r0
 801f6f2:	b2db      	uxtb	r3, r3
 801f6f4:	f003 0303 	and.w	r3, r3, #3
 801f6f8:	2b00      	cmp	r3, #0
 801f6fa:	d001      	beq.n	801f700 <tcp_receive+0xa54>
 801f6fc:	2301      	movs	r3, #1
 801f6fe:	e000      	b.n	801f702 <tcp_receive+0xa56>
 801f700:	2300      	movs	r3, #0
 801f702:	191a      	adds	r2, r3, r4
 801f704:	687b      	ldr	r3, [r7, #4]
 801f706:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801f708:	441a      	add	r2, r3
 801f70a:	687b      	ldr	r3, [r7, #4]
 801f70c:	625a      	str	r2, [r3, #36]	@ 0x24
          LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n",
 801f70e:	687b      	ldr	r3, [r7, #4]
 801f710:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801f712:	461c      	mov	r4, r3
 801f714:	68bb      	ldr	r3, [r7, #8]
 801f716:	891b      	ldrh	r3, [r3, #8]
 801f718:	461d      	mov	r5, r3
 801f71a:	68bb      	ldr	r3, [r7, #8]
 801f71c:	691b      	ldr	r3, [r3, #16]
 801f71e:	899b      	ldrh	r3, [r3, #12]
 801f720:	b29b      	uxth	r3, r3
 801f722:	4618      	mov	r0, r3
 801f724:	f7fa fa40 	bl	8019ba8 <lwip_htons>
 801f728:	4603      	mov	r3, r0
 801f72a:	b2db      	uxtb	r3, r3
 801f72c:	f003 0303 	and.w	r3, r3, #3
 801f730:	2b00      	cmp	r3, #0
 801f732:	d001      	beq.n	801f738 <tcp_receive+0xa8c>
 801f734:	2301      	movs	r3, #1
 801f736:	e000      	b.n	801f73a <tcp_receive+0xa8e>
 801f738:	2300      	movs	r3, #0
 801f73a:	442b      	add	r3, r5
 801f73c:	429c      	cmp	r4, r3
 801f73e:	d206      	bcs.n	801f74e <tcp_receive+0xaa2>
 801f740:	4b1e      	ldr	r3, [pc, #120]	@ (801f7bc <tcp_receive+0xb10>)
 801f742:	f240 622b 	movw	r2, #1579	@ 0x62b
 801f746:	4923      	ldr	r1, [pc, #140]	@ (801f7d4 <tcp_receive+0xb28>)
 801f748:	481e      	ldr	r0, [pc, #120]	@ (801f7c4 <tcp_receive+0xb18>)
 801f74a:	f00b f987 	bl	802aa5c <iprintf>
                      pcb->rcv_wnd >= TCP_TCPLEN(cseg));
          pcb->rcv_wnd -= TCP_TCPLEN(cseg);
 801f74e:	68bb      	ldr	r3, [r7, #8]
 801f750:	891b      	ldrh	r3, [r3, #8]
 801f752:	461c      	mov	r4, r3
 801f754:	68bb      	ldr	r3, [r7, #8]
 801f756:	691b      	ldr	r3, [r3, #16]
 801f758:	899b      	ldrh	r3, [r3, #12]
 801f75a:	b29b      	uxth	r3, r3
 801f75c:	4618      	mov	r0, r3
 801f75e:	f7fa fa23 	bl	8019ba8 <lwip_htons>
 801f762:	4603      	mov	r3, r0
 801f764:	b2db      	uxtb	r3, r3
 801f766:	f003 0303 	and.w	r3, r3, #3
 801f76a:	2b00      	cmp	r3, #0
 801f76c:	d001      	beq.n	801f772 <tcp_receive+0xac6>
 801f76e:	2301      	movs	r3, #1
 801f770:	e000      	b.n	801f774 <tcp_receive+0xac8>
 801f772:	2300      	movs	r3, #0
 801f774:	1919      	adds	r1, r3, r4
 801f776:	687b      	ldr	r3, [r7, #4]
 801f778:	8d1a      	ldrh	r2, [r3, #40]	@ 0x28
 801f77a:	b28b      	uxth	r3, r1
 801f77c:	1ad3      	subs	r3, r2, r3
 801f77e:	b29a      	uxth	r2, r3
 801f780:	687b      	ldr	r3, [r7, #4]
 801f782:	851a      	strh	r2, [r3, #40]	@ 0x28

          tcp_update_rcv_ann_wnd(pcb);
 801f784:	6878      	ldr	r0, [r7, #4]
 801f786:	f7fc fd03 	bl	801c190 <tcp_update_rcv_ann_wnd>

          if (cseg->p->tot_len > 0) {
 801f78a:	68bb      	ldr	r3, [r7, #8]
 801f78c:	685b      	ldr	r3, [r3, #4]
 801f78e:	891b      	ldrh	r3, [r3, #8]
 801f790:	2b00      	cmp	r3, #0
 801f792:	d028      	beq.n	801f7e6 <tcp_receive+0xb3a>
            /* Chain this pbuf onto the pbuf that we will pass to
               the application. */
            /* With window scaling, this can overflow recv_data->tot_len, but
               that's not a problem since we explicitly fix that before passing
               recv_data to the application. */
            if (recv_data) {
 801f794:	4b0d      	ldr	r3, [pc, #52]	@ (801f7cc <tcp_receive+0xb20>)
 801f796:	681b      	ldr	r3, [r3, #0]
 801f798:	2b00      	cmp	r3, #0
 801f79a:	d01d      	beq.n	801f7d8 <tcp_receive+0xb2c>
              pbuf_cat(recv_data, cseg->p);
 801f79c:	4b0b      	ldr	r3, [pc, #44]	@ (801f7cc <tcp_receive+0xb20>)
 801f79e:	681a      	ldr	r2, [r3, #0]
 801f7a0:	68bb      	ldr	r3, [r7, #8]
 801f7a2:	685b      	ldr	r3, [r3, #4]
 801f7a4:	4619      	mov	r1, r3
 801f7a6:	4610      	mov	r0, r2
 801f7a8:	f7fb ffae 	bl	801b708 <pbuf_cat>
 801f7ac:	e018      	b.n	801f7e0 <tcp_receive+0xb34>
 801f7ae:	bf00      	nop
 801f7b0:	2402afee 	.word	0x2402afee
 801f7b4:	2402afe4 	.word	0x2402afe4
 801f7b8:	2402afc0 	.word	0x2402afc0
 801f7bc:	0802ff88 	.word	0x0802ff88
 801f7c0:	08030368 	.word	0x08030368
 801f7c4:	0802ffd4 	.word	0x0802ffd4
 801f7c8:	080303a4 	.word	0x080303a4
 801f7cc:	2402aff4 	.word	0x2402aff4
 801f7d0:	2402aff1 	.word	0x2402aff1
 801f7d4:	080303c4 	.word	0x080303c4
            } else {
              recv_data = cseg->p;
 801f7d8:	68bb      	ldr	r3, [r7, #8]
 801f7da:	685b      	ldr	r3, [r3, #4]
 801f7dc:	4a70      	ldr	r2, [pc, #448]	@ (801f9a0 <tcp_receive+0xcf4>)
 801f7de:	6013      	str	r3, [r2, #0]
            }
            cseg->p = NULL;
 801f7e0:	68bb      	ldr	r3, [r7, #8]
 801f7e2:	2200      	movs	r2, #0
 801f7e4:	605a      	str	r2, [r3, #4]
          }
          if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) {
 801f7e6:	68bb      	ldr	r3, [r7, #8]
 801f7e8:	691b      	ldr	r3, [r3, #16]
 801f7ea:	899b      	ldrh	r3, [r3, #12]
 801f7ec:	b29b      	uxth	r3, r3
 801f7ee:	4618      	mov	r0, r3
 801f7f0:	f7fa f9da 	bl	8019ba8 <lwip_htons>
 801f7f4:	4603      	mov	r3, r0
 801f7f6:	b2db      	uxtb	r3, r3
 801f7f8:	f003 0301 	and.w	r3, r3, #1
 801f7fc:	2b00      	cmp	r3, #0
 801f7fe:	d00d      	beq.n	801f81c <tcp_receive+0xb70>
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n"));
            recv_flags |= TF_GOT_FIN;
 801f800:	4b68      	ldr	r3, [pc, #416]	@ (801f9a4 <tcp_receive+0xcf8>)
 801f802:	781b      	ldrb	r3, [r3, #0]
 801f804:	f043 0320 	orr.w	r3, r3, #32
 801f808:	b2da      	uxtb	r2, r3
 801f80a:	4b66      	ldr	r3, [pc, #408]	@ (801f9a4 <tcp_receive+0xcf8>)
 801f80c:	701a      	strb	r2, [r3, #0]
            if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */
 801f80e:	687b      	ldr	r3, [r7, #4]
 801f810:	7d1b      	ldrb	r3, [r3, #20]
 801f812:	2b04      	cmp	r3, #4
 801f814:	d102      	bne.n	801f81c <tcp_receive+0xb70>
              pcb->state = CLOSE_WAIT;
 801f816:	687b      	ldr	r3, [r7, #4]
 801f818:	2207      	movs	r2, #7
 801f81a:	751a      	strb	r2, [r3, #20]
            }
          }

          pcb->ooseq = cseg->next;
 801f81c:	68bb      	ldr	r3, [r7, #8]
 801f81e:	681a      	ldr	r2, [r3, #0]
 801f820:	687b      	ldr	r3, [r7, #4]
 801f822:	675a      	str	r2, [r3, #116]	@ 0x74
          tcp_seg_free(cseg);
 801f824:	68b8      	ldr	r0, [r7, #8]
 801f826:	f7fd fafa 	bl	801ce1e <tcp_seg_free>
        while (pcb->ooseq != NULL &&
 801f82a:	687b      	ldr	r3, [r7, #4]
 801f82c:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f82e:	2b00      	cmp	r3, #0
 801f830:	d008      	beq.n	801f844 <tcp_receive+0xb98>
               pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) {
 801f832:	687b      	ldr	r3, [r7, #4]
 801f834:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f836:	691b      	ldr	r3, [r3, #16]
 801f838:	685a      	ldr	r2, [r3, #4]
 801f83a:	687b      	ldr	r3, [r7, #4]
 801f83c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
        while (pcb->ooseq != NULL &&
 801f83e:	429a      	cmp	r2, r3
 801f840:	f43f af43 	beq.w	801f6ca <tcp_receive+0xa1e>
#endif /* LWIP_TCP_SACK_OUT */
#endif /* TCP_QUEUE_OOSEQ */


        /* Acknowledge the segment(s). */
        tcp_ack(pcb);
 801f844:	687b      	ldr	r3, [r7, #4]
 801f846:	8b5b      	ldrh	r3, [r3, #26]
 801f848:	f003 0301 	and.w	r3, r3, #1
 801f84c:	2b00      	cmp	r3, #0
 801f84e:	d00e      	beq.n	801f86e <tcp_receive+0xbc2>
 801f850:	687b      	ldr	r3, [r7, #4]
 801f852:	8b5b      	ldrh	r3, [r3, #26]
 801f854:	f023 0301 	bic.w	r3, r3, #1
 801f858:	b29a      	uxth	r2, r3
 801f85a:	687b      	ldr	r3, [r7, #4]
 801f85c:	835a      	strh	r2, [r3, #26]
 801f85e:	687b      	ldr	r3, [r7, #4]
 801f860:	8b5b      	ldrh	r3, [r3, #26]
 801f862:	f043 0302 	orr.w	r3, r3, #2
 801f866:	b29a      	uxth	r2, r3
 801f868:	687b      	ldr	r3, [r7, #4]
 801f86a:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801f86c:	e187      	b.n	801fb7e <tcp_receive+0xed2>
        tcp_ack(pcb);
 801f86e:	687b      	ldr	r3, [r7, #4]
 801f870:	8b5b      	ldrh	r3, [r3, #26]
 801f872:	f043 0301 	orr.w	r3, r3, #1
 801f876:	b29a      	uxth	r2, r3
 801f878:	687b      	ldr	r3, [r7, #4]
 801f87a:	835a      	strh	r2, [r3, #26]
      if (pcb->rcv_nxt == seqno) {
 801f87c:	e17f      	b.n	801fb7e <tcp_receive+0xed2>
      } else {
        /* We get here if the incoming segment is out-of-sequence. */

#if TCP_QUEUE_OOSEQ
        /* We queue the segment on the ->ooseq queue. */
        if (pcb->ooseq == NULL) {
 801f87e:	687b      	ldr	r3, [r7, #4]
 801f880:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f882:	2b00      	cmp	r3, #0
 801f884:	d106      	bne.n	801f894 <tcp_receive+0xbe8>
          pcb->ooseq = tcp_seg_copy(&inseg);
 801f886:	4848      	ldr	r0, [pc, #288]	@ (801f9a8 <tcp_receive+0xcfc>)
 801f888:	f7fd fae2 	bl	801ce50 <tcp_seg_copy>
 801f88c:	4602      	mov	r2, r0
 801f88e:	687b      	ldr	r3, [r7, #4]
 801f890:	675a      	str	r2, [r3, #116]	@ 0x74
 801f892:	e16c      	b.n	801fb6e <tcp_receive+0xec2>
#if LWIP_TCP_SACK_OUT
          /* This is the left edge of the lowest possible SACK range.
             It may start before the newly received segment (possibly adjusted below). */
          u32_t sackbeg = TCP_SEQ_LT(seqno, pcb->ooseq->tcphdr->seqno) ? seqno : pcb->ooseq->tcphdr->seqno;
#endif /* LWIP_TCP_SACK_OUT */
          struct tcp_seg *next, *prev = NULL;
 801f894:	2300      	movs	r3, #0
 801f896:	637b      	str	r3, [r7, #52]	@ 0x34
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801f898:	687b      	ldr	r3, [r7, #4]
 801f89a:	6f5b      	ldr	r3, [r3, #116]	@ 0x74
 801f89c:	63bb      	str	r3, [r7, #56]	@ 0x38
 801f89e:	e156      	b.n	801fb4e <tcp_receive+0xea2>
            if (seqno == next->tcphdr->seqno) {
 801f8a0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f8a2:	691b      	ldr	r3, [r3, #16]
 801f8a4:	685a      	ldr	r2, [r3, #4]
 801f8a6:	4b41      	ldr	r3, [pc, #260]	@ (801f9ac <tcp_receive+0xd00>)
 801f8a8:	681b      	ldr	r3, [r3, #0]
 801f8aa:	429a      	cmp	r2, r3
 801f8ac:	d11d      	bne.n	801f8ea <tcp_receive+0xc3e>
              /* The sequence number of the incoming segment is the
                 same as the sequence number of the segment on
                 ->ooseq. We check the lengths to see which one to
                 discard. */
              if (inseg.len > next->len) {
 801f8ae:	4b3e      	ldr	r3, [pc, #248]	@ (801f9a8 <tcp_receive+0xcfc>)
 801f8b0:	891a      	ldrh	r2, [r3, #8]
 801f8b2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f8b4:	891b      	ldrh	r3, [r3, #8]
 801f8b6:	429a      	cmp	r2, r3
 801f8b8:	f240 814e 	bls.w	801fb58 <tcp_receive+0xeac>
                /* The incoming segment is larger than the old
                   segment. We replace some segments with the new
                   one. */
                struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801f8bc:	483a      	ldr	r0, [pc, #232]	@ (801f9a8 <tcp_receive+0xcfc>)
 801f8be:	f7fd fac7 	bl	801ce50 <tcp_seg_copy>
 801f8c2:	6178      	str	r0, [r7, #20]
                if (cseg != NULL) {
 801f8c4:	697b      	ldr	r3, [r7, #20]
 801f8c6:	2b00      	cmp	r3, #0
 801f8c8:	f000 8148 	beq.w	801fb5c <tcp_receive+0xeb0>
                  if (prev != NULL) {
 801f8cc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f8ce:	2b00      	cmp	r3, #0
 801f8d0:	d003      	beq.n	801f8da <tcp_receive+0xc2e>
                    prev->next = cseg;
 801f8d2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f8d4:	697a      	ldr	r2, [r7, #20]
 801f8d6:	601a      	str	r2, [r3, #0]
 801f8d8:	e002      	b.n	801f8e0 <tcp_receive+0xc34>
                  } else {
                    pcb->ooseq = cseg;
 801f8da:	687b      	ldr	r3, [r7, #4]
 801f8dc:	697a      	ldr	r2, [r7, #20]
 801f8de:	675a      	str	r2, [r3, #116]	@ 0x74
                  }
                  tcp_oos_insert_segment(cseg, next);
 801f8e0:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801f8e2:	6978      	ldr	r0, [r7, #20]
 801f8e4:	f7ff f8de 	bl	801eaa4 <tcp_oos_insert_segment>
                }
                break;
 801f8e8:	e138      	b.n	801fb5c <tcp_receive+0xeb0>
                   segment was smaller than the old one; in either
                   case, we ditch the incoming segment. */
                break;
              }
            } else {
              if (prev == NULL) {
 801f8ea:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f8ec:	2b00      	cmp	r3, #0
 801f8ee:	d117      	bne.n	801f920 <tcp_receive+0xc74>
                if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {
 801f8f0:	4b2e      	ldr	r3, [pc, #184]	@ (801f9ac <tcp_receive+0xd00>)
 801f8f2:	681a      	ldr	r2, [r3, #0]
 801f8f4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f8f6:	691b      	ldr	r3, [r3, #16]
 801f8f8:	685b      	ldr	r3, [r3, #4]
 801f8fa:	1ad3      	subs	r3, r2, r3
 801f8fc:	2b00      	cmp	r3, #0
 801f8fe:	da57      	bge.n	801f9b0 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is lower
                     than the sequence number of the first segment on the
                     queue. We put the incoming segment first on the
                     queue. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801f900:	4829      	ldr	r0, [pc, #164]	@ (801f9a8 <tcp_receive+0xcfc>)
 801f902:	f7fd faa5 	bl	801ce50 <tcp_seg_copy>
 801f906:	61b8      	str	r0, [r7, #24]
                  if (cseg != NULL) {
 801f908:	69bb      	ldr	r3, [r7, #24]
 801f90a:	2b00      	cmp	r3, #0
 801f90c:	f000 8128 	beq.w	801fb60 <tcp_receive+0xeb4>
                    pcb->ooseq = cseg;
 801f910:	687b      	ldr	r3, [r7, #4]
 801f912:	69ba      	ldr	r2, [r7, #24]
 801f914:	675a      	str	r2, [r3, #116]	@ 0x74
                    tcp_oos_insert_segment(cseg, next);
 801f916:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801f918:	69b8      	ldr	r0, [r7, #24]
 801f91a:	f7ff f8c3 	bl	801eaa4 <tcp_oos_insert_segment>
                  }
                  break;
 801f91e:	e11f      	b.n	801fb60 <tcp_receive+0xeb4>
                }
              } else {
                /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) &&
                  TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/
                if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno + 1, next->tcphdr->seqno - 1)) {
 801f920:	4b22      	ldr	r3, [pc, #136]	@ (801f9ac <tcp_receive+0xd00>)
 801f922:	681a      	ldr	r2, [r3, #0]
 801f924:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f926:	691b      	ldr	r3, [r3, #16]
 801f928:	685b      	ldr	r3, [r3, #4]
 801f92a:	1ad3      	subs	r3, r2, r3
 801f92c:	3b01      	subs	r3, #1
 801f92e:	2b00      	cmp	r3, #0
 801f930:	db3e      	blt.n	801f9b0 <tcp_receive+0xd04>
 801f932:	4b1e      	ldr	r3, [pc, #120]	@ (801f9ac <tcp_receive+0xd00>)
 801f934:	681a      	ldr	r2, [r3, #0]
 801f936:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f938:	691b      	ldr	r3, [r3, #16]
 801f93a:	685b      	ldr	r3, [r3, #4]
 801f93c:	1ad3      	subs	r3, r2, r3
 801f93e:	3301      	adds	r3, #1
 801f940:	2b00      	cmp	r3, #0
 801f942:	dc35      	bgt.n	801f9b0 <tcp_receive+0xd04>
                  /* The sequence number of the incoming segment is in
                     between the sequence numbers of the previous and
                     the next segment on ->ooseq. We trim trim the previous
                     segment, delete next segments that included in received segment
                     and trim received, if needed. */
                  struct tcp_seg *cseg = tcp_seg_copy(&inseg);
 801f944:	4818      	ldr	r0, [pc, #96]	@ (801f9a8 <tcp_receive+0xcfc>)
 801f946:	f7fd fa83 	bl	801ce50 <tcp_seg_copy>
 801f94a:	61f8      	str	r0, [r7, #28]
                  if (cseg != NULL) {
 801f94c:	69fb      	ldr	r3, [r7, #28]
 801f94e:	2b00      	cmp	r3, #0
 801f950:	f000 8108 	beq.w	801fb64 <tcp_receive+0xeb8>
                    if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) {
 801f954:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f956:	691b      	ldr	r3, [r3, #16]
 801f958:	685b      	ldr	r3, [r3, #4]
 801f95a:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 801f95c:	8912      	ldrh	r2, [r2, #8]
 801f95e:	441a      	add	r2, r3
 801f960:	4b12      	ldr	r3, [pc, #72]	@ (801f9ac <tcp_receive+0xd00>)
 801f962:	681b      	ldr	r3, [r3, #0]
 801f964:	1ad3      	subs	r3, r2, r3
 801f966:	2b00      	cmp	r3, #0
 801f968:	dd12      	ble.n	801f990 <tcp_receive+0xce4>
                      /* We need to trim the prev segment. */
                      prev->len = (u16_t)(seqno - prev->tcphdr->seqno);
 801f96a:	4b10      	ldr	r3, [pc, #64]	@ (801f9ac <tcp_receive+0xd00>)
 801f96c:	681b      	ldr	r3, [r3, #0]
 801f96e:	b29a      	uxth	r2, r3
 801f970:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f972:	691b      	ldr	r3, [r3, #16]
 801f974:	685b      	ldr	r3, [r3, #4]
 801f976:	b29b      	uxth	r3, r3
 801f978:	1ad3      	subs	r3, r2, r3
 801f97a:	b29a      	uxth	r2, r3
 801f97c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f97e:	811a      	strh	r2, [r3, #8]
                      pbuf_realloc(prev->p, prev->len);
 801f980:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f982:	685a      	ldr	r2, [r3, #4]
 801f984:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f986:	891b      	ldrh	r3, [r3, #8]
 801f988:	4619      	mov	r1, r3
 801f98a:	4610      	mov	r0, r2
 801f98c:	f7fb fc38 	bl	801b200 <pbuf_realloc>
                    }
                    prev->next = cseg;
 801f990:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 801f992:	69fa      	ldr	r2, [r7, #28]
 801f994:	601a      	str	r2, [r3, #0]
                    tcp_oos_insert_segment(cseg, next);
 801f996:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 801f998:	69f8      	ldr	r0, [r7, #28]
 801f99a:	f7ff f883 	bl	801eaa4 <tcp_oos_insert_segment>
                  }
                  break;
 801f99e:	e0e1      	b.n	801fb64 <tcp_receive+0xeb8>
 801f9a0:	2402aff4 	.word	0x2402aff4
 801f9a4:	2402aff1 	.word	0x2402aff1
 801f9a8:	2402afc0 	.word	0x2402afc0
 801f9ac:	2402afe4 	.word	0x2402afe4
#endif /* LWIP_TCP_SACK_OUT */

              /* We don't use 'prev' below, so let's set it to current 'next'.
                 This way even if we break the loop below, 'prev' will be pointing
                 at the segment right in front of the newly added one. */
              prev = next;
 801f9b0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f9b2:	637b      	str	r3, [r7, #52]	@ 0x34

              /* If the "next" segment is the last segment on the
                 ooseq queue, we add the incoming segment to the end
                 of the list. */
              if (next->next == NULL &&
 801f9b4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f9b6:	681b      	ldr	r3, [r3, #0]
 801f9b8:	2b00      	cmp	r3, #0
 801f9ba:	f040 80c5 	bne.w	801fb48 <tcp_receive+0xe9c>
                  TCP_SEQ_GT(seqno, next->tcphdr->seqno)) {
 801f9be:	4b7f      	ldr	r3, [pc, #508]	@ (801fbbc <tcp_receive+0xf10>)
 801f9c0:	681a      	ldr	r2, [r3, #0]
 801f9c2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f9c4:	691b      	ldr	r3, [r3, #16]
 801f9c6:	685b      	ldr	r3, [r3, #4]
 801f9c8:	1ad3      	subs	r3, r2, r3
              if (next->next == NULL &&
 801f9ca:	2b00      	cmp	r3, #0
 801f9cc:	f340 80bc 	ble.w	801fb48 <tcp_receive+0xe9c>
                if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) {
 801f9d0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f9d2:	691b      	ldr	r3, [r3, #16]
 801f9d4:	899b      	ldrh	r3, [r3, #12]
 801f9d6:	b29b      	uxth	r3, r3
 801f9d8:	4618      	mov	r0, r3
 801f9da:	f7fa f8e5 	bl	8019ba8 <lwip_htons>
 801f9de:	4603      	mov	r3, r0
 801f9e0:	b2db      	uxtb	r3, r3
 801f9e2:	f003 0301 	and.w	r3, r3, #1
 801f9e6:	2b00      	cmp	r3, #0
 801f9e8:	f040 80be 	bne.w	801fb68 <tcp_receive+0xebc>
                  /* segment "next" already contains all data */
                  break;
                }
                next->next = tcp_seg_copy(&inseg);
 801f9ec:	4874      	ldr	r0, [pc, #464]	@ (801fbc0 <tcp_receive+0xf14>)
 801f9ee:	f7fd fa2f 	bl	801ce50 <tcp_seg_copy>
 801f9f2:	4602      	mov	r2, r0
 801f9f4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f9f6:	601a      	str	r2, [r3, #0]
                if (next->next != NULL) {
 801f9f8:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801f9fa:	681b      	ldr	r3, [r3, #0]
 801f9fc:	2b00      	cmp	r3, #0
 801f9fe:	f000 80b5 	beq.w	801fb6c <tcp_receive+0xec0>
                  if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) {
 801fa02:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa04:	691b      	ldr	r3, [r3, #16]
 801fa06:	685b      	ldr	r3, [r3, #4]
 801fa08:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 801fa0a:	8912      	ldrh	r2, [r2, #8]
 801fa0c:	441a      	add	r2, r3
 801fa0e:	4b6b      	ldr	r3, [pc, #428]	@ (801fbbc <tcp_receive+0xf10>)
 801fa10:	681b      	ldr	r3, [r3, #0]
 801fa12:	1ad3      	subs	r3, r2, r3
 801fa14:	2b00      	cmp	r3, #0
 801fa16:	dd12      	ble.n	801fa3e <tcp_receive+0xd92>
                    /* We need to trim the last segment. */
                    next->len = (u16_t)(seqno - next->tcphdr->seqno);
 801fa18:	4b68      	ldr	r3, [pc, #416]	@ (801fbbc <tcp_receive+0xf10>)
 801fa1a:	681b      	ldr	r3, [r3, #0]
 801fa1c:	b29a      	uxth	r2, r3
 801fa1e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa20:	691b      	ldr	r3, [r3, #16]
 801fa22:	685b      	ldr	r3, [r3, #4]
 801fa24:	b29b      	uxth	r3, r3
 801fa26:	1ad3      	subs	r3, r2, r3
 801fa28:	b29a      	uxth	r2, r3
 801fa2a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa2c:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->p, next->len);
 801fa2e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa30:	685a      	ldr	r2, [r3, #4]
 801fa32:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa34:	891b      	ldrh	r3, [r3, #8]
 801fa36:	4619      	mov	r1, r3
 801fa38:	4610      	mov	r0, r2
 801fa3a:	f7fb fbe1 	bl	801b200 <pbuf_realloc>
                  }
                  /* check if the remote side overruns our receive window */
                  if (TCP_SEQ_GT((u32_t)tcplen + seqno, pcb->rcv_nxt + (u32_t)pcb->rcv_wnd)) {
 801fa3e:	4b61      	ldr	r3, [pc, #388]	@ (801fbc4 <tcp_receive+0xf18>)
 801fa40:	881b      	ldrh	r3, [r3, #0]
 801fa42:	461a      	mov	r2, r3
 801fa44:	4b5d      	ldr	r3, [pc, #372]	@ (801fbbc <tcp_receive+0xf10>)
 801fa46:	681b      	ldr	r3, [r3, #0]
 801fa48:	441a      	add	r2, r3
 801fa4a:	687b      	ldr	r3, [r7, #4]
 801fa4c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801fa4e:	6879      	ldr	r1, [r7, #4]
 801fa50:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801fa52:	440b      	add	r3, r1
 801fa54:	1ad3      	subs	r3, r2, r3
 801fa56:	2b00      	cmp	r3, #0
 801fa58:	f340 8088 	ble.w	801fb6c <tcp_receive+0xec0>
                    LWIP_DEBUGF(TCP_INPUT_DEBUG,
                                ("tcp_receive: other end overran receive window"
                                 "seqno %"U32_F" len %"U16_F" right edge %"U32_F"\n",
                                 seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd));
                    if (TCPH_FLAGS(next->next->tcphdr) & TCP_FIN) {
 801fa5c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa5e:	681b      	ldr	r3, [r3, #0]
 801fa60:	691b      	ldr	r3, [r3, #16]
 801fa62:	899b      	ldrh	r3, [r3, #12]
 801fa64:	b29b      	uxth	r3, r3
 801fa66:	4618      	mov	r0, r3
 801fa68:	f7fa f89e 	bl	8019ba8 <lwip_htons>
 801fa6c:	4603      	mov	r3, r0
 801fa6e:	b2db      	uxtb	r3, r3
 801fa70:	f003 0301 	and.w	r3, r3, #1
 801fa74:	2b00      	cmp	r3, #0
 801fa76:	d021      	beq.n	801fabc <tcp_receive+0xe10>
                      /* Must remove the FIN from the header as we're trimming
                       * that byte of sequence-space from the packet */
                      TCPH_FLAGS_SET(next->next->tcphdr, TCPH_FLAGS(next->next->tcphdr) & ~TCP_FIN);
 801fa78:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa7a:	681b      	ldr	r3, [r3, #0]
 801fa7c:	691b      	ldr	r3, [r3, #16]
 801fa7e:	899b      	ldrh	r3, [r3, #12]
 801fa80:	b29b      	uxth	r3, r3
 801fa82:	b21b      	sxth	r3, r3
 801fa84:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 801fa88:	b21c      	sxth	r4, r3
 801fa8a:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fa8c:	681b      	ldr	r3, [r3, #0]
 801fa8e:	691b      	ldr	r3, [r3, #16]
 801fa90:	899b      	ldrh	r3, [r3, #12]
 801fa92:	b29b      	uxth	r3, r3
 801fa94:	4618      	mov	r0, r3
 801fa96:	f7fa f887 	bl	8019ba8 <lwip_htons>
 801fa9a:	4603      	mov	r3, r0
 801fa9c:	b2db      	uxtb	r3, r3
 801fa9e:	f003 033e 	and.w	r3, r3, #62	@ 0x3e
 801faa2:	b29b      	uxth	r3, r3
 801faa4:	4618      	mov	r0, r3
 801faa6:	f7fa f87f 	bl	8019ba8 <lwip_htons>
 801faaa:	4603      	mov	r3, r0
 801faac:	b21b      	sxth	r3, r3
 801faae:	4323      	orrs	r3, r4
 801fab0:	b21a      	sxth	r2, r3
 801fab2:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fab4:	681b      	ldr	r3, [r3, #0]
 801fab6:	691b      	ldr	r3, [r3, #16]
 801fab8:	b292      	uxth	r2, r2
 801faba:	819a      	strh	r2, [r3, #12]
                    }
                    /* Adjust length of segment to fit in the window. */
                    next->next->len = (u16_t)(pcb->rcv_nxt + pcb->rcv_wnd - seqno);
 801fabc:	687b      	ldr	r3, [r7, #4]
 801fabe:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801fac0:	b29a      	uxth	r2, r3
 801fac2:	687b      	ldr	r3, [r7, #4]
 801fac4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 801fac6:	4413      	add	r3, r2
 801fac8:	b299      	uxth	r1, r3
 801faca:	4b3c      	ldr	r3, [pc, #240]	@ (801fbbc <tcp_receive+0xf10>)
 801facc:	681b      	ldr	r3, [r3, #0]
 801face:	b29a      	uxth	r2, r3
 801fad0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fad2:	681b      	ldr	r3, [r3, #0]
 801fad4:	1a8a      	subs	r2, r1, r2
 801fad6:	b292      	uxth	r2, r2
 801fad8:	811a      	strh	r2, [r3, #8]
                    pbuf_realloc(next->next->p, next->next->len);
 801fada:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fadc:	681b      	ldr	r3, [r3, #0]
 801fade:	685a      	ldr	r2, [r3, #4]
 801fae0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fae2:	681b      	ldr	r3, [r3, #0]
 801fae4:	891b      	ldrh	r3, [r3, #8]
 801fae6:	4619      	mov	r1, r3
 801fae8:	4610      	mov	r0, r2
 801faea:	f7fb fb89 	bl	801b200 <pbuf_realloc>
                    tcplen = TCP_TCPLEN(next->next);
 801faee:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801faf0:	681b      	ldr	r3, [r3, #0]
 801faf2:	891c      	ldrh	r4, [r3, #8]
 801faf4:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801faf6:	681b      	ldr	r3, [r3, #0]
 801faf8:	691b      	ldr	r3, [r3, #16]
 801fafa:	899b      	ldrh	r3, [r3, #12]
 801fafc:	b29b      	uxth	r3, r3
 801fafe:	4618      	mov	r0, r3
 801fb00:	f7fa f852 	bl	8019ba8 <lwip_htons>
 801fb04:	4603      	mov	r3, r0
 801fb06:	b2db      	uxtb	r3, r3
 801fb08:	f003 0303 	and.w	r3, r3, #3
 801fb0c:	2b00      	cmp	r3, #0
 801fb0e:	d001      	beq.n	801fb14 <tcp_receive+0xe68>
 801fb10:	2301      	movs	r3, #1
 801fb12:	e000      	b.n	801fb16 <tcp_receive+0xe6a>
 801fb14:	2300      	movs	r3, #0
 801fb16:	4423      	add	r3, r4
 801fb18:	b29a      	uxth	r2, r3
 801fb1a:	4b2a      	ldr	r3, [pc, #168]	@ (801fbc4 <tcp_receive+0xf18>)
 801fb1c:	801a      	strh	r2, [r3, #0]
                    LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n",
 801fb1e:	4b29      	ldr	r3, [pc, #164]	@ (801fbc4 <tcp_receive+0xf18>)
 801fb20:	881b      	ldrh	r3, [r3, #0]
 801fb22:	461a      	mov	r2, r3
 801fb24:	4b25      	ldr	r3, [pc, #148]	@ (801fbbc <tcp_receive+0xf10>)
 801fb26:	681b      	ldr	r3, [r3, #0]
 801fb28:	441a      	add	r2, r3
 801fb2a:	687b      	ldr	r3, [r7, #4]
 801fb2c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801fb2e:	6879      	ldr	r1, [r7, #4]
 801fb30:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801fb32:	440b      	add	r3, r1
 801fb34:	429a      	cmp	r2, r3
 801fb36:	d019      	beq.n	801fb6c <tcp_receive+0xec0>
 801fb38:	4b23      	ldr	r3, [pc, #140]	@ (801fbc8 <tcp_receive+0xf1c>)
 801fb3a:	f44f 62df 	mov.w	r2, #1784	@ 0x6f8
 801fb3e:	4923      	ldr	r1, [pc, #140]	@ (801fbcc <tcp_receive+0xf20>)
 801fb40:	4823      	ldr	r0, [pc, #140]	@ (801fbd0 <tcp_receive+0xf24>)
 801fb42:	f00a ff8b 	bl	802aa5c <iprintf>
                                (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd));
                  }
                }
                break;
 801fb46:	e011      	b.n	801fb6c <tcp_receive+0xec0>
          for (next = pcb->ooseq; next != NULL; next = next->next) {
 801fb48:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fb4a:	681b      	ldr	r3, [r3, #0]
 801fb4c:	63bb      	str	r3, [r7, #56]	@ 0x38
 801fb4e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 801fb50:	2b00      	cmp	r3, #0
 801fb52:	f47f aea5 	bne.w	801f8a0 <tcp_receive+0xbf4>
 801fb56:	e00a      	b.n	801fb6e <tcp_receive+0xec2>
                break;
 801fb58:	bf00      	nop
 801fb5a:	e008      	b.n	801fb6e <tcp_receive+0xec2>
                break;
 801fb5c:	bf00      	nop
 801fb5e:	e006      	b.n	801fb6e <tcp_receive+0xec2>
                  break;
 801fb60:	bf00      	nop
 801fb62:	e004      	b.n	801fb6e <tcp_receive+0xec2>
                  break;
 801fb64:	bf00      	nop
 801fb66:	e002      	b.n	801fb6e <tcp_receive+0xec2>
                  break;
 801fb68:	bf00      	nop
 801fb6a:	e000      	b.n	801fb6e <tcp_receive+0xec2>
                break;
 801fb6c:	bf00      	nop
#endif /* TCP_OOSEQ_BYTES_LIMIT || TCP_OOSEQ_PBUFS_LIMIT */
#endif /* TCP_QUEUE_OOSEQ */

        /* We send the ACK packet after we've (potentially) dealt with SACKs,
           so they can be included in the acknowledgment. */
        tcp_send_empty_ack(pcb);
 801fb6e:	6878      	ldr	r0, [r7, #4]
 801fb70:	f001 fefc 	bl	802196c <tcp_send_empty_ack>
      if (pcb->rcv_nxt == seqno) {
 801fb74:	e003      	b.n	801fb7e <tcp_receive+0xed2>
      }
    } else {
      /* The incoming segment is not within the window. */
      tcp_send_empty_ack(pcb);
 801fb76:	6878      	ldr	r0, [r7, #4]
 801fb78:	f001 fef8 	bl	802196c <tcp_send_empty_ack>
    if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt,
 801fb7c:	e01a      	b.n	801fbb4 <tcp_receive+0xf08>
 801fb7e:	e019      	b.n	801fbb4 <tcp_receive+0xf08>
    }
  } else {
    /* Segments with length 0 is taken care of here. Segments that
       fall out of the window are ACKed. */
    if (!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd - 1)) {
 801fb80:	4b0e      	ldr	r3, [pc, #56]	@ (801fbbc <tcp_receive+0xf10>)
 801fb82:	681a      	ldr	r2, [r3, #0]
 801fb84:	687b      	ldr	r3, [r7, #4]
 801fb86:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801fb88:	1ad3      	subs	r3, r2, r3
 801fb8a:	2b00      	cmp	r3, #0
 801fb8c:	db0a      	blt.n	801fba4 <tcp_receive+0xef8>
 801fb8e:	4b0b      	ldr	r3, [pc, #44]	@ (801fbbc <tcp_receive+0xf10>)
 801fb90:	681a      	ldr	r2, [r3, #0]
 801fb92:	687b      	ldr	r3, [r7, #4]
 801fb94:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 801fb96:	6879      	ldr	r1, [r7, #4]
 801fb98:	8d09      	ldrh	r1, [r1, #40]	@ 0x28
 801fb9a:	440b      	add	r3, r1
 801fb9c:	1ad3      	subs	r3, r2, r3
 801fb9e:	3301      	adds	r3, #1
 801fba0:	2b00      	cmp	r3, #0
 801fba2:	dd07      	ble.n	801fbb4 <tcp_receive+0xf08>
      tcp_ack_now(pcb);
 801fba4:	687b      	ldr	r3, [r7, #4]
 801fba6:	8b5b      	ldrh	r3, [r3, #26]
 801fba8:	f043 0302 	orr.w	r3, r3, #2
 801fbac:	b29a      	uxth	r2, r3
 801fbae:	687b      	ldr	r3, [r7, #4]
 801fbb0:	835a      	strh	r2, [r3, #26]
    }
  }
}
 801fbb2:	e7ff      	b.n	801fbb4 <tcp_receive+0xf08>
 801fbb4:	bf00      	nop
 801fbb6:	3750      	adds	r7, #80	@ 0x50
 801fbb8:	46bd      	mov	sp, r7
 801fbba:	bdb0      	pop	{r4, r5, r7, pc}
 801fbbc:	2402afe4 	.word	0x2402afe4
 801fbc0:	2402afc0 	.word	0x2402afc0
 801fbc4:	2402afee 	.word	0x2402afee
 801fbc8:	0802ff88 	.word	0x0802ff88
 801fbcc:	08030330 	.word	0x08030330
 801fbd0:	0802ffd4 	.word	0x0802ffd4

0801fbd4 <tcp_get_next_optbyte>:

static u8_t
tcp_get_next_optbyte(void)
{
 801fbd4:	b480      	push	{r7}
 801fbd6:	b083      	sub	sp, #12
 801fbd8:	af00      	add	r7, sp, #0
  u16_t optidx = tcp_optidx++;
 801fbda:	4b15      	ldr	r3, [pc, #84]	@ (801fc30 <tcp_get_next_optbyte+0x5c>)
 801fbdc:	881b      	ldrh	r3, [r3, #0]
 801fbde:	1c5a      	adds	r2, r3, #1
 801fbe0:	b291      	uxth	r1, r2
 801fbe2:	4a13      	ldr	r2, [pc, #76]	@ (801fc30 <tcp_get_next_optbyte+0x5c>)
 801fbe4:	8011      	strh	r1, [r2, #0]
 801fbe6:	80fb      	strh	r3, [r7, #6]
  if ((tcphdr_opt2 == NULL) || (optidx < tcphdr_opt1len)) {
 801fbe8:	4b12      	ldr	r3, [pc, #72]	@ (801fc34 <tcp_get_next_optbyte+0x60>)
 801fbea:	681b      	ldr	r3, [r3, #0]
 801fbec:	2b00      	cmp	r3, #0
 801fbee:	d004      	beq.n	801fbfa <tcp_get_next_optbyte+0x26>
 801fbf0:	4b11      	ldr	r3, [pc, #68]	@ (801fc38 <tcp_get_next_optbyte+0x64>)
 801fbf2:	881b      	ldrh	r3, [r3, #0]
 801fbf4:	88fa      	ldrh	r2, [r7, #6]
 801fbf6:	429a      	cmp	r2, r3
 801fbf8:	d208      	bcs.n	801fc0c <tcp_get_next_optbyte+0x38>
    u8_t *opts = (u8_t *)tcphdr + TCP_HLEN;
 801fbfa:	4b10      	ldr	r3, [pc, #64]	@ (801fc3c <tcp_get_next_optbyte+0x68>)
 801fbfc:	681b      	ldr	r3, [r3, #0]
 801fbfe:	3314      	adds	r3, #20
 801fc00:	603b      	str	r3, [r7, #0]
    return opts[optidx];
 801fc02:	88fb      	ldrh	r3, [r7, #6]
 801fc04:	683a      	ldr	r2, [r7, #0]
 801fc06:	4413      	add	r3, r2
 801fc08:	781b      	ldrb	r3, [r3, #0]
 801fc0a:	e00b      	b.n	801fc24 <tcp_get_next_optbyte+0x50>
  } else {
    u8_t idx = (u8_t)(optidx - tcphdr_opt1len);
 801fc0c:	88fb      	ldrh	r3, [r7, #6]
 801fc0e:	b2da      	uxtb	r2, r3
 801fc10:	4b09      	ldr	r3, [pc, #36]	@ (801fc38 <tcp_get_next_optbyte+0x64>)
 801fc12:	881b      	ldrh	r3, [r3, #0]
 801fc14:	b2db      	uxtb	r3, r3
 801fc16:	1ad3      	subs	r3, r2, r3
 801fc18:	717b      	strb	r3, [r7, #5]
    return tcphdr_opt2[idx];
 801fc1a:	4b06      	ldr	r3, [pc, #24]	@ (801fc34 <tcp_get_next_optbyte+0x60>)
 801fc1c:	681a      	ldr	r2, [r3, #0]
 801fc1e:	797b      	ldrb	r3, [r7, #5]
 801fc20:	4413      	add	r3, r2
 801fc22:	781b      	ldrb	r3, [r3, #0]
  }
}
 801fc24:	4618      	mov	r0, r3
 801fc26:	370c      	adds	r7, #12
 801fc28:	46bd      	mov	sp, r7
 801fc2a:	f85d 7b04 	ldr.w	r7, [sp], #4
 801fc2e:	4770      	bx	lr
 801fc30:	2402afe0 	.word	0x2402afe0
 801fc34:	2402afdc 	.word	0x2402afdc
 801fc38:	2402afda 	.word	0x2402afda
 801fc3c:	2402afd4 	.word	0x2402afd4

0801fc40 <tcp_parseopt>:
 *
 * @param pcb the tcp_pcb for which a segment arrived
 */
static void
tcp_parseopt(struct tcp_pcb *pcb)
{
 801fc40:	b580      	push	{r7, lr}
 801fc42:	b084      	sub	sp, #16
 801fc44:	af00      	add	r7, sp, #0
 801fc46:	6078      	str	r0, [r7, #4]
  u16_t mss;
#if LWIP_TCP_TIMESTAMPS
  u32_t tsval;
#endif

  LWIP_ASSERT("tcp_parseopt: invalid pcb", pcb != NULL);
 801fc48:	687b      	ldr	r3, [r7, #4]
 801fc4a:	2b00      	cmp	r3, #0
 801fc4c:	d106      	bne.n	801fc5c <tcp_parseopt+0x1c>
 801fc4e:	4b33      	ldr	r3, [pc, #204]	@ (801fd1c <tcp_parseopt+0xdc>)
 801fc50:	f240 727d 	movw	r2, #1917	@ 0x77d
 801fc54:	4932      	ldr	r1, [pc, #200]	@ (801fd20 <tcp_parseopt+0xe0>)
 801fc56:	4833      	ldr	r0, [pc, #204]	@ (801fd24 <tcp_parseopt+0xe4>)
 801fc58:	f00a ff00 	bl	802aa5c <iprintf>

  /* Parse the TCP MSS option, if present. */
  if (tcphdr_optlen != 0) {
 801fc5c:	4b32      	ldr	r3, [pc, #200]	@ (801fd28 <tcp_parseopt+0xe8>)
 801fc5e:	881b      	ldrh	r3, [r3, #0]
 801fc60:	2b00      	cmp	r3, #0
 801fc62:	d057      	beq.n	801fd14 <tcp_parseopt+0xd4>
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801fc64:	4b31      	ldr	r3, [pc, #196]	@ (801fd2c <tcp_parseopt+0xec>)
 801fc66:	2200      	movs	r2, #0
 801fc68:	801a      	strh	r2, [r3, #0]
 801fc6a:	e047      	b.n	801fcfc <tcp_parseopt+0xbc>
      u8_t opt = tcp_get_next_optbyte();
 801fc6c:	f7ff ffb2 	bl	801fbd4 <tcp_get_next_optbyte>
 801fc70:	4603      	mov	r3, r0
 801fc72:	73fb      	strb	r3, [r7, #15]
      switch (opt) {
 801fc74:	7bfb      	ldrb	r3, [r7, #15]
 801fc76:	2b02      	cmp	r3, #2
 801fc78:	d006      	beq.n	801fc88 <tcp_parseopt+0x48>
 801fc7a:	2b02      	cmp	r3, #2
 801fc7c:	dc2b      	bgt.n	801fcd6 <tcp_parseopt+0x96>
 801fc7e:	2b00      	cmp	r3, #0
 801fc80:	d043      	beq.n	801fd0a <tcp_parseopt+0xca>
 801fc82:	2b01      	cmp	r3, #1
 801fc84:	d039      	beq.n	801fcfa <tcp_parseopt+0xba>
 801fc86:	e026      	b.n	801fcd6 <tcp_parseopt+0x96>
          /* NOP option. */
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n"));
          break;
        case LWIP_TCP_OPT_MSS:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n"));
          if (tcp_get_next_optbyte() != LWIP_TCP_OPT_LEN_MSS || (tcp_optidx - 2 + LWIP_TCP_OPT_LEN_MSS) > tcphdr_optlen) {
 801fc88:	f7ff ffa4 	bl	801fbd4 <tcp_get_next_optbyte>
 801fc8c:	4603      	mov	r3, r0
 801fc8e:	2b04      	cmp	r3, #4
 801fc90:	d13d      	bne.n	801fd0e <tcp_parseopt+0xce>
 801fc92:	4b26      	ldr	r3, [pc, #152]	@ (801fd2c <tcp_parseopt+0xec>)
 801fc94:	881b      	ldrh	r3, [r3, #0]
 801fc96:	3301      	adds	r3, #1
 801fc98:	4a23      	ldr	r2, [pc, #140]	@ (801fd28 <tcp_parseopt+0xe8>)
 801fc9a:	8812      	ldrh	r2, [r2, #0]
 801fc9c:	4293      	cmp	r3, r2
 801fc9e:	da36      	bge.n	801fd0e <tcp_parseopt+0xce>
            /* Bad length */
            LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n"));
            return;
          }
          /* An MSS option with the right option length. */
          mss = (u16_t)(tcp_get_next_optbyte() << 8);
 801fca0:	f7ff ff98 	bl	801fbd4 <tcp_get_next_optbyte>
 801fca4:	4603      	mov	r3, r0
 801fca6:	021b      	lsls	r3, r3, #8
 801fca8:	81bb      	strh	r3, [r7, #12]
          mss |= tcp_get_next_optbyte();
 801fcaa:	f7ff ff93 	bl	801fbd4 <tcp_get_next_optbyte>
 801fcae:	4603      	mov	r3, r0
 801fcb0:	461a      	mov	r2, r3
 801fcb2:	89bb      	ldrh	r3, [r7, #12]
 801fcb4:	4313      	orrs	r3, r2
 801fcb6:	81bb      	strh	r3, [r7, #12]
          /* Limit the mss to the configured TCP_MSS and prevent division by zero */
          pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss;
 801fcb8:	89bb      	ldrh	r3, [r7, #12]
 801fcba:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801fcbe:	4293      	cmp	r3, r2
 801fcc0:	d804      	bhi.n	801fccc <tcp_parseopt+0x8c>
 801fcc2:	89bb      	ldrh	r3, [r7, #12]
 801fcc4:	2b00      	cmp	r3, #0
 801fcc6:	d001      	beq.n	801fccc <tcp_parseopt+0x8c>
 801fcc8:	89ba      	ldrh	r2, [r7, #12]
 801fcca:	e001      	b.n	801fcd0 <tcp_parseopt+0x90>
 801fccc:	f240 52b4 	movw	r2, #1460	@ 0x5b4
 801fcd0:	687b      	ldr	r3, [r7, #4]
 801fcd2:	865a      	strh	r2, [r3, #50]	@ 0x32
          break;
 801fcd4:	e012      	b.n	801fcfc <tcp_parseopt+0xbc>
          }
          break;
#endif /* LWIP_TCP_SACK_OUT */
        default:
          LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n"));
          data = tcp_get_next_optbyte();
 801fcd6:	f7ff ff7d 	bl	801fbd4 <tcp_get_next_optbyte>
 801fcda:	4603      	mov	r3, r0
 801fcdc:	72fb      	strb	r3, [r7, #11]
          if (data < 2) {
 801fcde:	7afb      	ldrb	r3, [r7, #11]
 801fce0:	2b01      	cmp	r3, #1
 801fce2:	d916      	bls.n	801fd12 <tcp_parseopt+0xd2>
               and we don't process them further. */
            return;
          }
          /* All other options have a length field, so that we easily
             can skip past them. */
          tcp_optidx += data - 2;
 801fce4:	7afb      	ldrb	r3, [r7, #11]
 801fce6:	b29a      	uxth	r2, r3
 801fce8:	4b10      	ldr	r3, [pc, #64]	@ (801fd2c <tcp_parseopt+0xec>)
 801fcea:	881b      	ldrh	r3, [r3, #0]
 801fcec:	4413      	add	r3, r2
 801fcee:	b29b      	uxth	r3, r3
 801fcf0:	3b02      	subs	r3, #2
 801fcf2:	b29a      	uxth	r2, r3
 801fcf4:	4b0d      	ldr	r3, [pc, #52]	@ (801fd2c <tcp_parseopt+0xec>)
 801fcf6:	801a      	strh	r2, [r3, #0]
 801fcf8:	e000      	b.n	801fcfc <tcp_parseopt+0xbc>
          break;
 801fcfa:	bf00      	nop
    for (tcp_optidx = 0; tcp_optidx < tcphdr_optlen; ) {
 801fcfc:	4b0b      	ldr	r3, [pc, #44]	@ (801fd2c <tcp_parseopt+0xec>)
 801fcfe:	881a      	ldrh	r2, [r3, #0]
 801fd00:	4b09      	ldr	r3, [pc, #36]	@ (801fd28 <tcp_parseopt+0xe8>)
 801fd02:	881b      	ldrh	r3, [r3, #0]
 801fd04:	429a      	cmp	r2, r3
 801fd06:	d3b1      	bcc.n	801fc6c <tcp_parseopt+0x2c>
 801fd08:	e004      	b.n	801fd14 <tcp_parseopt+0xd4>
          return;
 801fd0a:	bf00      	nop
 801fd0c:	e002      	b.n	801fd14 <tcp_parseopt+0xd4>
            return;
 801fd0e:	bf00      	nop
 801fd10:	e000      	b.n	801fd14 <tcp_parseopt+0xd4>
            return;
 801fd12:	bf00      	nop
      }
    }
  }
}
 801fd14:	3710      	adds	r7, #16
 801fd16:	46bd      	mov	sp, r7
 801fd18:	bd80      	pop	{r7, pc}
 801fd1a:	bf00      	nop
 801fd1c:	0802ff88 	.word	0x0802ff88
 801fd20:	080303ec 	.word	0x080303ec
 801fd24:	0802ffd4 	.word	0x0802ffd4
 801fd28:	2402afd8 	.word	0x2402afd8
 801fd2c:	2402afe0 	.word	0x2402afe0

0801fd30 <tcp_trigger_input_pcb_close>:

void
tcp_trigger_input_pcb_close(void)
{
 801fd30:	b480      	push	{r7}
 801fd32:	af00      	add	r7, sp, #0
  recv_flags |= TF_CLOSED;
 801fd34:	4b05      	ldr	r3, [pc, #20]	@ (801fd4c <tcp_trigger_input_pcb_close+0x1c>)
 801fd36:	781b      	ldrb	r3, [r3, #0]
 801fd38:	f043 0310 	orr.w	r3, r3, #16
 801fd3c:	b2da      	uxtb	r2, r3
 801fd3e:	4b03      	ldr	r3, [pc, #12]	@ (801fd4c <tcp_trigger_input_pcb_close+0x1c>)
 801fd40:	701a      	strb	r2, [r3, #0]
}
 801fd42:	bf00      	nop
 801fd44:	46bd      	mov	sp, r7
 801fd46:	f85d 7b04 	ldr.w	r7, [sp], #4
 801fd4a:	4770      	bx	lr
 801fd4c:	2402aff1 	.word	0x2402aff1

0801fd50 <tcp_route>:
static err_t tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif);

/* tcp_route: common code that returns a fixed bound netif or calls ip_route */
static struct netif *
tcp_route(const struct tcp_pcb *pcb, const ip_addr_t *src, const ip_addr_t *dst)
{
 801fd50:	b580      	push	{r7, lr}
 801fd52:	b084      	sub	sp, #16
 801fd54:	af00      	add	r7, sp, #0
 801fd56:	60f8      	str	r0, [r7, #12]
 801fd58:	60b9      	str	r1, [r7, #8]
 801fd5a:	607a      	str	r2, [r7, #4]
  LWIP_UNUSED_ARG(src); /* in case IPv4-only and source-based routing is disabled */

  if ((pcb != NULL) && (pcb->netif_idx != NETIF_NO_INDEX)) {
 801fd5c:	68fb      	ldr	r3, [r7, #12]
 801fd5e:	2b00      	cmp	r3, #0
 801fd60:	d00a      	beq.n	801fd78 <tcp_route+0x28>
 801fd62:	68fb      	ldr	r3, [r7, #12]
 801fd64:	7a1b      	ldrb	r3, [r3, #8]
 801fd66:	2b00      	cmp	r3, #0
 801fd68:	d006      	beq.n	801fd78 <tcp_route+0x28>
    return netif_get_by_index(pcb->netif_idx);
 801fd6a:	68fb      	ldr	r3, [r7, #12]
 801fd6c:	7a1b      	ldrb	r3, [r3, #8]
 801fd6e:	4618      	mov	r0, r3
 801fd70:	f7fb f83c 	bl	801adec <netif_get_by_index>
 801fd74:	4603      	mov	r3, r0
 801fd76:	e003      	b.n	801fd80 <tcp_route+0x30>
  } else {
    return ip_route(src, dst);
 801fd78:	6878      	ldr	r0, [r7, #4]
 801fd7a:	f005 fe61 	bl	8025a40 <ip4_route>
 801fd7e:	4603      	mov	r3, r0
  }
}
 801fd80:	4618      	mov	r0, r3
 801fd82:	3710      	adds	r7, #16
 801fd84:	46bd      	mov	sp, r7
 801fd86:	bd80      	pop	{r7, pc}

0801fd88 <tcp_create_segment>:
 * The TCP header is filled in except ackno and wnd.
 * p is freed on failure.
 */
static struct tcp_seg *
tcp_create_segment(const struct tcp_pcb *pcb, struct pbuf *p, u8_t hdrflags, u32_t seqno, u8_t optflags)
{
 801fd88:	b590      	push	{r4, r7, lr}
 801fd8a:	b087      	sub	sp, #28
 801fd8c:	af00      	add	r7, sp, #0
 801fd8e:	60f8      	str	r0, [r7, #12]
 801fd90:	60b9      	str	r1, [r7, #8]
 801fd92:	603b      	str	r3, [r7, #0]
 801fd94:	4613      	mov	r3, r2
 801fd96:	71fb      	strb	r3, [r7, #7]
  struct tcp_seg *seg;
  u8_t optlen;

  LWIP_ASSERT("tcp_create_segment: invalid pcb", pcb != NULL);
 801fd98:	68fb      	ldr	r3, [r7, #12]
 801fd9a:	2b00      	cmp	r3, #0
 801fd9c:	d105      	bne.n	801fdaa <tcp_create_segment+0x22>
 801fd9e:	4b45      	ldr	r3, [pc, #276]	@ (801feb4 <tcp_create_segment+0x12c>)
 801fda0:	22a3      	movs	r2, #163	@ 0xa3
 801fda2:	4945      	ldr	r1, [pc, #276]	@ (801feb8 <tcp_create_segment+0x130>)
 801fda4:	4845      	ldr	r0, [pc, #276]	@ (801febc <tcp_create_segment+0x134>)
 801fda6:	f00a fe59 	bl	802aa5c <iprintf>
  LWIP_ASSERT("tcp_create_segment: invalid pbuf", p != NULL);
 801fdaa:	68bb      	ldr	r3, [r7, #8]
 801fdac:	2b00      	cmp	r3, #0
 801fdae:	d105      	bne.n	801fdbc <tcp_create_segment+0x34>
 801fdb0:	4b40      	ldr	r3, [pc, #256]	@ (801feb4 <tcp_create_segment+0x12c>)
 801fdb2:	22a4      	movs	r2, #164	@ 0xa4
 801fdb4:	4942      	ldr	r1, [pc, #264]	@ (801fec0 <tcp_create_segment+0x138>)
 801fdb6:	4841      	ldr	r0, [pc, #260]	@ (801febc <tcp_create_segment+0x134>)
 801fdb8:	f00a fe50 	bl	802aa5c <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 801fdbc:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801fdc0:	009b      	lsls	r3, r3, #2
 801fdc2:	b2db      	uxtb	r3, r3
 801fdc4:	f003 0304 	and.w	r3, r3, #4
 801fdc8:	75fb      	strb	r3, [r7, #23]

  if ((seg = (struct tcp_seg *)memp_malloc(MEMP_TCP_SEG)) == NULL) {
 801fdca:	2003      	movs	r0, #3
 801fdcc:	f7fa fc6a 	bl	801a6a4 <memp_malloc>
 801fdd0:	6138      	str	r0, [r7, #16]
 801fdd2:	693b      	ldr	r3, [r7, #16]
 801fdd4:	2b00      	cmp	r3, #0
 801fdd6:	d104      	bne.n	801fde2 <tcp_create_segment+0x5a>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no memory.\n"));
    pbuf_free(p);
 801fdd8:	68b8      	ldr	r0, [r7, #8]
 801fdda:	f7fb fbc7 	bl	801b56c <pbuf_free>
    return NULL;
 801fdde:	2300      	movs	r3, #0
 801fde0:	e063      	b.n	801feaa <tcp_create_segment+0x122>
  }
  seg->flags = optflags;
 801fde2:	693b      	ldr	r3, [r7, #16]
 801fde4:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 801fde8:	731a      	strb	r2, [r3, #12]
  seg->next = NULL;
 801fdea:	693b      	ldr	r3, [r7, #16]
 801fdec:	2200      	movs	r2, #0
 801fdee:	601a      	str	r2, [r3, #0]
  seg->p = p;
 801fdf0:	693b      	ldr	r3, [r7, #16]
 801fdf2:	68ba      	ldr	r2, [r7, #8]
 801fdf4:	605a      	str	r2, [r3, #4]
  LWIP_ASSERT("p->tot_len >= optlen", p->tot_len >= optlen);
 801fdf6:	68bb      	ldr	r3, [r7, #8]
 801fdf8:	891a      	ldrh	r2, [r3, #8]
 801fdfa:	7dfb      	ldrb	r3, [r7, #23]
 801fdfc:	b29b      	uxth	r3, r3
 801fdfe:	429a      	cmp	r2, r3
 801fe00:	d205      	bcs.n	801fe0e <tcp_create_segment+0x86>
 801fe02:	4b2c      	ldr	r3, [pc, #176]	@ (801feb4 <tcp_create_segment+0x12c>)
 801fe04:	22b0      	movs	r2, #176	@ 0xb0
 801fe06:	492f      	ldr	r1, [pc, #188]	@ (801fec4 <tcp_create_segment+0x13c>)
 801fe08:	482c      	ldr	r0, [pc, #176]	@ (801febc <tcp_create_segment+0x134>)
 801fe0a:	f00a fe27 	bl	802aa5c <iprintf>
  seg->len = p->tot_len - optlen;
 801fe0e:	68bb      	ldr	r3, [r7, #8]
 801fe10:	891a      	ldrh	r2, [r3, #8]
 801fe12:	7dfb      	ldrb	r3, [r7, #23]
 801fe14:	b29b      	uxth	r3, r3
 801fe16:	1ad3      	subs	r3, r2, r3
 801fe18:	b29a      	uxth	r2, r3
 801fe1a:	693b      	ldr	r3, [r7, #16]
 801fe1c:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
  seg->oversize_left = 0;
 801fe1e:	693b      	ldr	r3, [r7, #16]
 801fe20:	2200      	movs	r2, #0
 801fe22:	815a      	strh	r2, [r3, #10]
  LWIP_ASSERT("invalid optflags passed: TF_SEG_DATA_CHECKSUMMED",
              (optflags & TF_SEG_DATA_CHECKSUMMED) == 0);
#endif /* TCP_CHECKSUM_ON_COPY */

  /* build TCP header */
  if (pbuf_add_header(p, TCP_HLEN)) {
 801fe24:	2114      	movs	r1, #20
 801fe26:	68b8      	ldr	r0, [r7, #8]
 801fe28:	f7fb fad8 	bl	801b3dc <pbuf_add_header>
 801fe2c:	4603      	mov	r3, r0
 801fe2e:	2b00      	cmp	r3, #0
 801fe30:	d004      	beq.n	801fe3c <tcp_create_segment+0xb4>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_create_segment: no room for TCP header in pbuf.\n"));
    TCP_STATS_INC(tcp.err);
    tcp_seg_free(seg);
 801fe32:	6938      	ldr	r0, [r7, #16]
 801fe34:	f7fc fff3 	bl	801ce1e <tcp_seg_free>
    return NULL;
 801fe38:	2300      	movs	r3, #0
 801fe3a:	e036      	b.n	801feaa <tcp_create_segment+0x122>
  }
  seg->tcphdr = (struct tcp_hdr *)seg->p->payload;
 801fe3c:	693b      	ldr	r3, [r7, #16]
 801fe3e:	685b      	ldr	r3, [r3, #4]
 801fe40:	685a      	ldr	r2, [r3, #4]
 801fe42:	693b      	ldr	r3, [r7, #16]
 801fe44:	611a      	str	r2, [r3, #16]
  seg->tcphdr->src = lwip_htons(pcb->local_port);
 801fe46:	68fb      	ldr	r3, [r7, #12]
 801fe48:	8ada      	ldrh	r2, [r3, #22]
 801fe4a:	693b      	ldr	r3, [r7, #16]
 801fe4c:	691c      	ldr	r4, [r3, #16]
 801fe4e:	4610      	mov	r0, r2
 801fe50:	f7f9 feaa 	bl	8019ba8 <lwip_htons>
 801fe54:	4603      	mov	r3, r0
 801fe56:	8023      	strh	r3, [r4, #0]
  seg->tcphdr->dest = lwip_htons(pcb->remote_port);
 801fe58:	68fb      	ldr	r3, [r7, #12]
 801fe5a:	8b1a      	ldrh	r2, [r3, #24]
 801fe5c:	693b      	ldr	r3, [r7, #16]
 801fe5e:	691c      	ldr	r4, [r3, #16]
 801fe60:	4610      	mov	r0, r2
 801fe62:	f7f9 fea1 	bl	8019ba8 <lwip_htons>
 801fe66:	4603      	mov	r3, r0
 801fe68:	8063      	strh	r3, [r4, #2]
  seg->tcphdr->seqno = lwip_htonl(seqno);
 801fe6a:	693b      	ldr	r3, [r7, #16]
 801fe6c:	691c      	ldr	r4, [r3, #16]
 801fe6e:	6838      	ldr	r0, [r7, #0]
 801fe70:	f7f9 feaf 	bl	8019bd2 <lwip_htonl>
 801fe74:	4603      	mov	r3, r0
 801fe76:	6063      	str	r3, [r4, #4]
  /* ackno is set in tcp_output */
  TCPH_HDRLEN_FLAGS_SET(seg->tcphdr, (5 + optlen / 4), hdrflags);
 801fe78:	7dfb      	ldrb	r3, [r7, #23]
 801fe7a:	089b      	lsrs	r3, r3, #2
 801fe7c:	b2db      	uxtb	r3, r3
 801fe7e:	3305      	adds	r3, #5
 801fe80:	b29b      	uxth	r3, r3
 801fe82:	031b      	lsls	r3, r3, #12
 801fe84:	b29a      	uxth	r2, r3
 801fe86:	79fb      	ldrb	r3, [r7, #7]
 801fe88:	b29b      	uxth	r3, r3
 801fe8a:	4313      	orrs	r3, r2
 801fe8c:	b29a      	uxth	r2, r3
 801fe8e:	693b      	ldr	r3, [r7, #16]
 801fe90:	691c      	ldr	r4, [r3, #16]
 801fe92:	4610      	mov	r0, r2
 801fe94:	f7f9 fe88 	bl	8019ba8 <lwip_htons>
 801fe98:	4603      	mov	r3, r0
 801fe9a:	81a3      	strh	r3, [r4, #12]
  /* wnd and chksum are set in tcp_output */
  seg->tcphdr->urgp = 0;
 801fe9c:	693b      	ldr	r3, [r7, #16]
 801fe9e:	691b      	ldr	r3, [r3, #16]
 801fea0:	2200      	movs	r2, #0
 801fea2:	749a      	strb	r2, [r3, #18]
 801fea4:	2200      	movs	r2, #0
 801fea6:	74da      	strb	r2, [r3, #19]
  return seg;
 801fea8:	693b      	ldr	r3, [r7, #16]
}
 801feaa:	4618      	mov	r0, r3
 801feac:	371c      	adds	r7, #28
 801feae:	46bd      	mov	sp, r7
 801feb0:	bd90      	pop	{r4, r7, pc}
 801feb2:	bf00      	nop
 801feb4:	08030408 	.word	0x08030408
 801feb8:	0803043c 	.word	0x0803043c
 801febc:	0803045c 	.word	0x0803045c
 801fec0:	08030484 	.word	0x08030484
 801fec4:	080304a8 	.word	0x080304a8

0801fec8 <tcp_pbuf_prealloc>:
#if TCP_OVERSIZE
static struct pbuf *
tcp_pbuf_prealloc(pbuf_layer layer, u16_t length, u16_t max_length,
                  u16_t *oversize, const struct tcp_pcb *pcb, u8_t apiflags,
                  u8_t first_seg)
{
 801fec8:	b580      	push	{r7, lr}
 801feca:	b086      	sub	sp, #24
 801fecc:	af00      	add	r7, sp, #0
 801fece:	607b      	str	r3, [r7, #4]
 801fed0:	4603      	mov	r3, r0
 801fed2:	73fb      	strb	r3, [r7, #15]
 801fed4:	460b      	mov	r3, r1
 801fed6:	81bb      	strh	r3, [r7, #12]
 801fed8:	4613      	mov	r3, r2
 801feda:	817b      	strh	r3, [r7, #10]
  struct pbuf *p;
  u16_t alloc = length;
 801fedc:	89bb      	ldrh	r3, [r7, #12]
 801fede:	82fb      	strh	r3, [r7, #22]

  LWIP_ASSERT("tcp_pbuf_prealloc: invalid oversize", oversize != NULL);
 801fee0:	687b      	ldr	r3, [r7, #4]
 801fee2:	2b00      	cmp	r3, #0
 801fee4:	d105      	bne.n	801fef2 <tcp_pbuf_prealloc+0x2a>
 801fee6:	4b30      	ldr	r3, [pc, #192]	@ (801ffa8 <tcp_pbuf_prealloc+0xe0>)
 801fee8:	22e8      	movs	r2, #232	@ 0xe8
 801feea:	4930      	ldr	r1, [pc, #192]	@ (801ffac <tcp_pbuf_prealloc+0xe4>)
 801feec:	4830      	ldr	r0, [pc, #192]	@ (801ffb0 <tcp_pbuf_prealloc+0xe8>)
 801feee:	f00a fdb5 	bl	802aa5c <iprintf>
  LWIP_ASSERT("tcp_pbuf_prealloc: invalid pcb", pcb != NULL);
 801fef2:	6a3b      	ldr	r3, [r7, #32]
 801fef4:	2b00      	cmp	r3, #0
 801fef6:	d105      	bne.n	801ff04 <tcp_pbuf_prealloc+0x3c>
 801fef8:	4b2b      	ldr	r3, [pc, #172]	@ (801ffa8 <tcp_pbuf_prealloc+0xe0>)
 801fefa:	22e9      	movs	r2, #233	@ 0xe9
 801fefc:	492d      	ldr	r1, [pc, #180]	@ (801ffb4 <tcp_pbuf_prealloc+0xec>)
 801fefe:	482c      	ldr	r0, [pc, #176]	@ (801ffb0 <tcp_pbuf_prealloc+0xe8>)
 801ff00:	f00a fdac 	bl	802aa5c <iprintf>
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(apiflags);
  LWIP_UNUSED_ARG(first_seg);
  alloc = max_length;
#else /* LWIP_NETIF_TX_SINGLE_PBUF */
  if (length < max_length) {
 801ff04:	89ba      	ldrh	r2, [r7, #12]
 801ff06:	897b      	ldrh	r3, [r7, #10]
 801ff08:	429a      	cmp	r2, r3
 801ff0a:	d221      	bcs.n	801ff50 <tcp_pbuf_prealloc+0x88>
     *
     * Did the user set TCP_WRITE_FLAG_MORE?
     *
     * Will the Nagle algorithm defer transmission of this segment?
     */
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801ff0c:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 801ff10:	f003 0302 	and.w	r3, r3, #2
 801ff14:	2b00      	cmp	r3, #0
 801ff16:	d111      	bne.n	801ff3c <tcp_pbuf_prealloc+0x74>
        (!(pcb->flags & TF_NODELAY) &&
 801ff18:	6a3b      	ldr	r3, [r7, #32]
 801ff1a:	8b5b      	ldrh	r3, [r3, #26]
 801ff1c:	f003 0340 	and.w	r3, r3, #64	@ 0x40
    if ((apiflags & TCP_WRITE_FLAG_MORE) ||
 801ff20:	2b00      	cmp	r3, #0
 801ff22:	d115      	bne.n	801ff50 <tcp_pbuf_prealloc+0x88>
        (!(pcb->flags & TF_NODELAY) &&
 801ff24:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 801ff28:	2b00      	cmp	r3, #0
 801ff2a:	d007      	beq.n	801ff3c <tcp_pbuf_prealloc+0x74>
         (!first_seg ||
          pcb->unsent != NULL ||
 801ff2c:	6a3b      	ldr	r3, [r7, #32]
 801ff2e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
         (!first_seg ||
 801ff30:	2b00      	cmp	r3, #0
 801ff32:	d103      	bne.n	801ff3c <tcp_pbuf_prealloc+0x74>
          pcb->unacked != NULL))) {
 801ff34:	6a3b      	ldr	r3, [r7, #32]
 801ff36:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
          pcb->unsent != NULL ||
 801ff38:	2b00      	cmp	r3, #0
 801ff3a:	d009      	beq.n	801ff50 <tcp_pbuf_prealloc+0x88>
      alloc = LWIP_MIN(max_length, LWIP_MEM_ALIGN_SIZE(TCP_OVERSIZE_CALC_LENGTH(length)));
 801ff3c:	89bb      	ldrh	r3, [r7, #12]
 801ff3e:	f203 53b7 	addw	r3, r3, #1463	@ 0x5b7
 801ff42:	f023 0203 	bic.w	r2, r3, #3
 801ff46:	897b      	ldrh	r3, [r7, #10]
 801ff48:	4293      	cmp	r3, r2
 801ff4a:	bf28      	it	cs
 801ff4c:	4613      	movcs	r3, r2
 801ff4e:	82fb      	strh	r3, [r7, #22]
    }
  }
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */
  p = pbuf_alloc(layer, alloc, PBUF_RAM);
 801ff50:	8af9      	ldrh	r1, [r7, #22]
 801ff52:	7bfb      	ldrb	r3, [r7, #15]
 801ff54:	f44f 7220 	mov.w	r2, #640	@ 0x280
 801ff58:	4618      	mov	r0, r3
 801ff5a:	f7fa fff1 	bl	801af40 <pbuf_alloc>
 801ff5e:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 801ff60:	693b      	ldr	r3, [r7, #16]
 801ff62:	2b00      	cmp	r3, #0
 801ff64:	d101      	bne.n	801ff6a <tcp_pbuf_prealloc+0xa2>
    return NULL;
 801ff66:	2300      	movs	r3, #0
 801ff68:	e019      	b.n	801ff9e <tcp_pbuf_prealloc+0xd6>
  }
  LWIP_ASSERT("need unchained pbuf", p->next == NULL);
 801ff6a:	693b      	ldr	r3, [r7, #16]
 801ff6c:	681b      	ldr	r3, [r3, #0]
 801ff6e:	2b00      	cmp	r3, #0
 801ff70:	d006      	beq.n	801ff80 <tcp_pbuf_prealloc+0xb8>
 801ff72:	4b0d      	ldr	r3, [pc, #52]	@ (801ffa8 <tcp_pbuf_prealloc+0xe0>)
 801ff74:	f240 120b 	movw	r2, #267	@ 0x10b
 801ff78:	490f      	ldr	r1, [pc, #60]	@ (801ffb8 <tcp_pbuf_prealloc+0xf0>)
 801ff7a:	480d      	ldr	r0, [pc, #52]	@ (801ffb0 <tcp_pbuf_prealloc+0xe8>)
 801ff7c:	f00a fd6e 	bl	802aa5c <iprintf>
  *oversize = p->len - length;
 801ff80:	693b      	ldr	r3, [r7, #16]
 801ff82:	895a      	ldrh	r2, [r3, #10]
 801ff84:	89bb      	ldrh	r3, [r7, #12]
 801ff86:	1ad3      	subs	r3, r2, r3
 801ff88:	b29a      	uxth	r2, r3
 801ff8a:	687b      	ldr	r3, [r7, #4]
 801ff8c:	801a      	strh	r2, [r3, #0]
  /* trim p->len to the currently used size */
  p->len = p->tot_len = length;
 801ff8e:	693b      	ldr	r3, [r7, #16]
 801ff90:	89ba      	ldrh	r2, [r7, #12]
 801ff92:	811a      	strh	r2, [r3, #8]
 801ff94:	693b      	ldr	r3, [r7, #16]
 801ff96:	891a      	ldrh	r2, [r3, #8]
 801ff98:	693b      	ldr	r3, [r7, #16]
 801ff9a:	815a      	strh	r2, [r3, #10]
  return p;
 801ff9c:	693b      	ldr	r3, [r7, #16]
}
 801ff9e:	4618      	mov	r0, r3
 801ffa0:	3718      	adds	r7, #24
 801ffa2:	46bd      	mov	sp, r7
 801ffa4:	bd80      	pop	{r7, pc}
 801ffa6:	bf00      	nop
 801ffa8:	08030408 	.word	0x08030408
 801ffac:	080304c0 	.word	0x080304c0
 801ffb0:	0803045c 	.word	0x0803045c
 801ffb4:	080304e4 	.word	0x080304e4
 801ffb8:	08030504 	.word	0x08030504

0801ffbc <tcp_write_checks>:
 * @param len length of data to send (checked agains snd_buf)
 * @return ERR_OK if tcp_write is allowed to proceed, another err_t otherwise
 */
static err_t
tcp_write_checks(struct tcp_pcb *pcb, u16_t len)
{
 801ffbc:	b580      	push	{r7, lr}
 801ffbe:	b082      	sub	sp, #8
 801ffc0:	af00      	add	r7, sp, #0
 801ffc2:	6078      	str	r0, [r7, #4]
 801ffc4:	460b      	mov	r3, r1
 801ffc6:	807b      	strh	r3, [r7, #2]
  LWIP_ASSERT("tcp_write_checks: invalid pcb", pcb != NULL);
 801ffc8:	687b      	ldr	r3, [r7, #4]
 801ffca:	2b00      	cmp	r3, #0
 801ffcc:	d106      	bne.n	801ffdc <tcp_write_checks+0x20>
 801ffce:	4b33      	ldr	r3, [pc, #204]	@ (802009c <tcp_write_checks+0xe0>)
 801ffd0:	f240 1233 	movw	r2, #307	@ 0x133
 801ffd4:	4932      	ldr	r1, [pc, #200]	@ (80200a0 <tcp_write_checks+0xe4>)
 801ffd6:	4833      	ldr	r0, [pc, #204]	@ (80200a4 <tcp_write_checks+0xe8>)
 801ffd8:	f00a fd40 	bl	802aa5c <iprintf>

  /* connection is in invalid state for data transmission? */
  if ((pcb->state != ESTABLISHED) &&
 801ffdc:	687b      	ldr	r3, [r7, #4]
 801ffde:	7d1b      	ldrb	r3, [r3, #20]
 801ffe0:	2b04      	cmp	r3, #4
 801ffe2:	d00e      	beq.n	8020002 <tcp_write_checks+0x46>
      (pcb->state != CLOSE_WAIT) &&
 801ffe4:	687b      	ldr	r3, [r7, #4]
 801ffe6:	7d1b      	ldrb	r3, [r3, #20]
  if ((pcb->state != ESTABLISHED) &&
 801ffe8:	2b07      	cmp	r3, #7
 801ffea:	d00a      	beq.n	8020002 <tcp_write_checks+0x46>
      (pcb->state != SYN_SENT) &&
 801ffec:	687b      	ldr	r3, [r7, #4]
 801ffee:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != CLOSE_WAIT) &&
 801fff0:	2b02      	cmp	r3, #2
 801fff2:	d006      	beq.n	8020002 <tcp_write_checks+0x46>
      (pcb->state != SYN_RCVD)) {
 801fff4:	687b      	ldr	r3, [r7, #4]
 801fff6:	7d1b      	ldrb	r3, [r3, #20]
      (pcb->state != SYN_SENT) &&
 801fff8:	2b03      	cmp	r3, #3
 801fffa:	d002      	beq.n	8020002 <tcp_write_checks+0x46>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n"));
    return ERR_CONN;
 801fffc:	f06f 030a 	mvn.w	r3, #10
 8020000:	e048      	b.n	8020094 <tcp_write_checks+0xd8>
  } else if (len == 0) {
 8020002:	887b      	ldrh	r3, [r7, #2]
 8020004:	2b00      	cmp	r3, #0
 8020006:	d101      	bne.n	802000c <tcp_write_checks+0x50>
    return ERR_OK;
 8020008:	2300      	movs	r3, #0
 802000a:	e043      	b.n	8020094 <tcp_write_checks+0xd8>
  }

  /* fail on too much data */
  if (len > pcb->snd_buf) {
 802000c:	687b      	ldr	r3, [r7, #4]
 802000e:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8020012:	887a      	ldrh	r2, [r7, #2]
 8020014:	429a      	cmp	r2, r3
 8020016:	d909      	bls.n	802002c <tcp_write_checks+0x70>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too much data (len=%"U16_F" > snd_buf=%"TCPWNDSIZE_F")\n",
                len, pcb->snd_buf));
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 8020018:	687b      	ldr	r3, [r7, #4]
 802001a:	8b5b      	ldrh	r3, [r3, #26]
 802001c:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 8020020:	b29a      	uxth	r2, r3
 8020022:	687b      	ldr	r3, [r7, #4]
 8020024:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 8020026:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802002a:	e033      	b.n	8020094 <tcp_write_checks+0xd8>
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: queuelen: %"TCPWNDSIZE_F"\n", (tcpwnd_size_t)pcb->snd_queuelen));

  /* If total number of pbufs on the unsent/unacked queues exceeds the
   * configured maximum, return an error */
  /* check for configured max queuelen and possible overflow */
  if (pcb->snd_queuelen >= LWIP_MIN(TCP_SND_QUEUELEN, (TCP_SNDQUEUELEN_OVERFLOW + 1))) {
 802002c:	687b      	ldr	r3, [r7, #4]
 802002e:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020032:	2b0f      	cmp	r3, #15
 8020034:	d909      	bls.n	802004a <tcp_write_checks+0x8e>
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("tcp_write: too long queue %"U16_F" (max %"U16_F")\n",
                pcb->snd_queuelen, (u16_t)TCP_SND_QUEUELEN));
    TCP_STATS_INC(tcp.memerr);
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 8020036:	687b      	ldr	r3, [r7, #4]
 8020038:	8b5b      	ldrh	r3, [r3, #26]
 802003a:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802003e:	b29a      	uxth	r2, r3
 8020040:	687b      	ldr	r3, [r7, #4]
 8020042:	835a      	strh	r2, [r3, #26]
    return ERR_MEM;
 8020044:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8020048:	e024      	b.n	8020094 <tcp_write_checks+0xd8>
  }
  if (pcb->snd_queuelen != 0) {
 802004a:	687b      	ldr	r3, [r7, #4]
 802004c:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020050:	2b00      	cmp	r3, #0
 8020052:	d00f      	beq.n	8020074 <tcp_write_checks+0xb8>
    LWIP_ASSERT("tcp_write: pbufs on queue => at least one queue non-empty",
 8020054:	687b      	ldr	r3, [r7, #4]
 8020056:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020058:	2b00      	cmp	r3, #0
 802005a:	d11a      	bne.n	8020092 <tcp_write_checks+0xd6>
 802005c:	687b      	ldr	r3, [r7, #4]
 802005e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020060:	2b00      	cmp	r3, #0
 8020062:	d116      	bne.n	8020092 <tcp_write_checks+0xd6>
 8020064:	4b0d      	ldr	r3, [pc, #52]	@ (802009c <tcp_write_checks+0xe0>)
 8020066:	f240 1255 	movw	r2, #341	@ 0x155
 802006a:	490f      	ldr	r1, [pc, #60]	@ (80200a8 <tcp_write_checks+0xec>)
 802006c:	480d      	ldr	r0, [pc, #52]	@ (80200a4 <tcp_write_checks+0xe8>)
 802006e:	f00a fcf5 	bl	802aa5c <iprintf>
 8020072:	e00e      	b.n	8020092 <tcp_write_checks+0xd6>
                pcb->unacked != NULL || pcb->unsent != NULL);
  } else {
    LWIP_ASSERT("tcp_write: no pbufs on queue => both queues empty",
 8020074:	687b      	ldr	r3, [r7, #4]
 8020076:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020078:	2b00      	cmp	r3, #0
 802007a:	d103      	bne.n	8020084 <tcp_write_checks+0xc8>
 802007c:	687b      	ldr	r3, [r7, #4]
 802007e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020080:	2b00      	cmp	r3, #0
 8020082:	d006      	beq.n	8020092 <tcp_write_checks+0xd6>
 8020084:	4b05      	ldr	r3, [pc, #20]	@ (802009c <tcp_write_checks+0xe0>)
 8020086:	f44f 72ac 	mov.w	r2, #344	@ 0x158
 802008a:	4908      	ldr	r1, [pc, #32]	@ (80200ac <tcp_write_checks+0xf0>)
 802008c:	4805      	ldr	r0, [pc, #20]	@ (80200a4 <tcp_write_checks+0xe8>)
 802008e:	f00a fce5 	bl	802aa5c <iprintf>
                pcb->unacked == NULL && pcb->unsent == NULL);
  }
  return ERR_OK;
 8020092:	2300      	movs	r3, #0
}
 8020094:	4618      	mov	r0, r3
 8020096:	3708      	adds	r7, #8
 8020098:	46bd      	mov	sp, r7
 802009a:	bd80      	pop	{r7, pc}
 802009c:	08030408 	.word	0x08030408
 80200a0:	08030518 	.word	0x08030518
 80200a4:	0803045c 	.word	0x0803045c
 80200a8:	08030538 	.word	0x08030538
 80200ac:	08030574 	.word	0x08030574

080200b0 <tcp_write>:
 * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will not be set on last segment sent,
 * @return ERR_OK if enqueued, another err_t on error
 */
err_t
tcp_write(struct tcp_pcb *pcb, const void *arg, u16_t len, u8_t apiflags)
{
 80200b0:	b590      	push	{r4, r7, lr}
 80200b2:	b09d      	sub	sp, #116	@ 0x74
 80200b4:	af04      	add	r7, sp, #16
 80200b6:	60f8      	str	r0, [r7, #12]
 80200b8:	60b9      	str	r1, [r7, #8]
 80200ba:	4611      	mov	r1, r2
 80200bc:	461a      	mov	r2, r3
 80200be:	460b      	mov	r3, r1
 80200c0:	80fb      	strh	r3, [r7, #6]
 80200c2:	4613      	mov	r3, r2
 80200c4:	717b      	strb	r3, [r7, #5]
  struct pbuf *concat_p = NULL;
 80200c6:	2300      	movs	r3, #0
 80200c8:	63fb      	str	r3, [r7, #60]	@ 0x3c
  struct tcp_seg *last_unsent = NULL, *seg = NULL, *prev_seg = NULL, *queue = NULL;
 80200ca:	2300      	movs	r3, #0
 80200cc:	643b      	str	r3, [r7, #64]	@ 0x40
 80200ce:	2300      	movs	r3, #0
 80200d0:	657b      	str	r3, [r7, #84]	@ 0x54
 80200d2:	2300      	movs	r3, #0
 80200d4:	653b      	str	r3, [r7, #80]	@ 0x50
 80200d6:	2300      	movs	r3, #0
 80200d8:	64fb      	str	r3, [r7, #76]	@ 0x4c
  u16_t pos = 0; /* position in 'arg' data */
 80200da:	2300      	movs	r3, #0
 80200dc:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  u16_t queuelen;
  u8_t optlen;
  u8_t optflags = 0;
 80200e0:	2300      	movs	r3, #0
 80200e2:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
#if TCP_OVERSIZE
  u16_t oversize = 0;
 80200e6:	2300      	movs	r3, #0
 80200e8:	82fb      	strh	r3, [r7, #22]
  u16_t oversize_used = 0;
 80200ea:	2300      	movs	r3, #0
 80200ec:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
#if TCP_OVERSIZE_DBGCHECK
  u16_t oversize_add = 0;
 80200f0:	2300      	movs	r3, #0
 80200f2:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK*/
#endif /* TCP_OVERSIZE */
  u16_t extendlen = 0;
 80200f6:	2300      	movs	r3, #0
 80200f8:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
  u16_t concat_chksummed = 0;
#endif /* TCP_CHECKSUM_ON_COPY */
  err_t err;
  u16_t mss_local;

  LWIP_ERROR("tcp_write: invalid pcb", pcb != NULL, return ERR_ARG);
 80200fc:	68fb      	ldr	r3, [r7, #12]
 80200fe:	2b00      	cmp	r3, #0
 8020100:	d109      	bne.n	8020116 <tcp_write+0x66>
 8020102:	4b9d      	ldr	r3, [pc, #628]	@ (8020378 <tcp_write+0x2c8>)
 8020104:	f44f 72cf 	mov.w	r2, #414	@ 0x19e
 8020108:	499c      	ldr	r1, [pc, #624]	@ (802037c <tcp_write+0x2cc>)
 802010a:	489d      	ldr	r0, [pc, #628]	@ (8020380 <tcp_write+0x2d0>)
 802010c:	f00a fca6 	bl	802aa5c <iprintf>
 8020110:	f06f 030f 	mvn.w	r3, #15
 8020114:	e37b      	b.n	802080e <tcp_write+0x75e>

  /* don't allocate segments bigger than half the maximum window we ever received */
  mss_local = LWIP_MIN(pcb->mss, TCPWND_MIN16(pcb->snd_wnd_max / 2));
 8020116:	68fb      	ldr	r3, [r7, #12]
 8020118:	f8b3 3062 	ldrh.w	r3, [r3, #98]	@ 0x62
 802011c:	085b      	lsrs	r3, r3, #1
 802011e:	b29a      	uxth	r2, r3
 8020120:	68fb      	ldr	r3, [r7, #12]
 8020122:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8020124:	4293      	cmp	r3, r2
 8020126:	bf28      	it	cs
 8020128:	4613      	movcs	r3, r2
 802012a:	853b      	strh	r3, [r7, #40]	@ 0x28
  mss_local = mss_local ? mss_local : pcb->mss;
 802012c:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 802012e:	2b00      	cmp	r3, #0
 8020130:	d102      	bne.n	8020138 <tcp_write+0x88>
 8020132:	68fb      	ldr	r3, [r7, #12]
 8020134:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8020136:	e000      	b.n	802013a <tcp_write+0x8a>
 8020138:	8d3b      	ldrh	r3, [r7, #40]	@ 0x28
 802013a:	853b      	strh	r3, [r7, #40]	@ 0x28

  LWIP_ASSERT_CORE_LOCKED();
 802013c:	f7f1 f862 	bl	8011204 <sys_check_core_locking>
  apiflags |= TCP_WRITE_FLAG_COPY;
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n",
                                 (void *)pcb, arg, len, (u16_t)apiflags));
  LWIP_ERROR("tcp_write: arg == NULL (programmer violates API)",
 8020140:	68bb      	ldr	r3, [r7, #8]
 8020142:	2b00      	cmp	r3, #0
 8020144:	d109      	bne.n	802015a <tcp_write+0xaa>
 8020146:	4b8c      	ldr	r3, [pc, #560]	@ (8020378 <tcp_write+0x2c8>)
 8020148:	f240 12ad 	movw	r2, #429	@ 0x1ad
 802014c:	498d      	ldr	r1, [pc, #564]	@ (8020384 <tcp_write+0x2d4>)
 802014e:	488c      	ldr	r0, [pc, #560]	@ (8020380 <tcp_write+0x2d0>)
 8020150:	f00a fc84 	bl	802aa5c <iprintf>
 8020154:	f06f 030f 	mvn.w	r3, #15
 8020158:	e359      	b.n	802080e <tcp_write+0x75e>
             arg != NULL, return ERR_ARG;);

  err = tcp_write_checks(pcb, len);
 802015a:	88fb      	ldrh	r3, [r7, #6]
 802015c:	4619      	mov	r1, r3
 802015e:	68f8      	ldr	r0, [r7, #12]
 8020160:	f7ff ff2c 	bl	801ffbc <tcp_write_checks>
 8020164:	4603      	mov	r3, r0
 8020166:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  if (err != ERR_OK) {
 802016a:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 802016e:	2b00      	cmp	r3, #0
 8020170:	d002      	beq.n	8020178 <tcp_write+0xc8>
    return err;
 8020172:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 8020176:	e34a      	b.n	802080e <tcp_write+0x75e>
  }
  queuelen = pcb->snd_queuelen;
 8020178:	68fb      	ldr	r3, [r7, #12]
 802017a:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 802017e:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
    /* ensure that segments can hold at least one data byte... */
    mss_local = LWIP_MAX(mss_local, LWIP_TCP_OPT_LEN_TS + 1);
  } else
#endif /* LWIP_TCP_TIMESTAMPS */
  {
    optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 8020182:	2300      	movs	r3, #0
 8020184:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
   *
   * pos records progress as data is segmented.
   */

  /* Find the tail of the unsent queue. */
  if (pcb->unsent != NULL) {
 8020188:	68fb      	ldr	r3, [r7, #12]
 802018a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 802018c:	2b00      	cmp	r3, #0
 802018e:	f000 8127 	beq.w	80203e0 <tcp_write+0x330>
    u16_t space;
    u16_t unsent_optlen;

    /* @todo: this could be sped up by keeping last_unsent in the pcb */
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 8020192:	68fb      	ldr	r3, [r7, #12]
 8020194:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020196:	643b      	str	r3, [r7, #64]	@ 0x40
 8020198:	e002      	b.n	80201a0 <tcp_write+0xf0>
         last_unsent = last_unsent->next);
 802019a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802019c:	681b      	ldr	r3, [r3, #0]
 802019e:	643b      	str	r3, [r7, #64]	@ 0x40
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 80201a0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80201a2:	681b      	ldr	r3, [r3, #0]
 80201a4:	2b00      	cmp	r3, #0
 80201a6:	d1f8      	bne.n	802019a <tcp_write+0xea>

    /* Usable space at the end of the last unsent segment */
    unsent_optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(last_unsent->flags, pcb);
 80201a8:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80201aa:	7b1b      	ldrb	r3, [r3, #12]
 80201ac:	009b      	lsls	r3, r3, #2
 80201ae:	b29b      	uxth	r3, r3
 80201b0:	f003 0304 	and.w	r3, r3, #4
 80201b4:	84bb      	strh	r3, [r7, #36]	@ 0x24
    LWIP_ASSERT("mss_local is too small", mss_local >= last_unsent->len + unsent_optlen);
 80201b6:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 80201b8:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80201ba:	891b      	ldrh	r3, [r3, #8]
 80201bc:	4619      	mov	r1, r3
 80201be:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 80201c0:	440b      	add	r3, r1
 80201c2:	429a      	cmp	r2, r3
 80201c4:	da06      	bge.n	80201d4 <tcp_write+0x124>
 80201c6:	4b6c      	ldr	r3, [pc, #432]	@ (8020378 <tcp_write+0x2c8>)
 80201c8:	f44f 72f3 	mov.w	r2, #486	@ 0x1e6
 80201cc:	496e      	ldr	r1, [pc, #440]	@ (8020388 <tcp_write+0x2d8>)
 80201ce:	486c      	ldr	r0, [pc, #432]	@ (8020380 <tcp_write+0x2d0>)
 80201d0:	f00a fc44 	bl	802aa5c <iprintf>
    space = mss_local - (last_unsent->len + unsent_optlen);
 80201d4:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80201d6:	891a      	ldrh	r2, [r3, #8]
 80201d8:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 80201da:	4413      	add	r3, r2
 80201dc:	b29b      	uxth	r3, r3
 80201de:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 80201e0:	1ad3      	subs	r3, r2, r3
 80201e2:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
     * function.
     */
#if TCP_OVERSIZE
#if TCP_OVERSIZE_DBGCHECK
    /* check that pcb->unsent_oversize matches last_unsent->oversize_left */
    LWIP_ASSERT("unsent_oversize mismatch (pcb vs. last_unsent)",
 80201e6:	68fb      	ldr	r3, [r7, #12]
 80201e8:	f8b3 2068 	ldrh.w	r2, [r3, #104]	@ 0x68
 80201ec:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80201ee:	895b      	ldrh	r3, [r3, #10]
 80201f0:	429a      	cmp	r2, r3
 80201f2:	d006      	beq.n	8020202 <tcp_write+0x152>
 80201f4:	4b60      	ldr	r3, [pc, #384]	@ (8020378 <tcp_write+0x2c8>)
 80201f6:	f240 12f3 	movw	r2, #499	@ 0x1f3
 80201fa:	4964      	ldr	r1, [pc, #400]	@ (802038c <tcp_write+0x2dc>)
 80201fc:	4860      	ldr	r0, [pc, #384]	@ (8020380 <tcp_write+0x2d0>)
 80201fe:	f00a fc2d 	bl	802aa5c <iprintf>
                pcb->unsent_oversize == last_unsent->oversize_left);
#endif /* TCP_OVERSIZE_DBGCHECK */
    oversize = pcb->unsent_oversize;
 8020202:	68fb      	ldr	r3, [r7, #12]
 8020204:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 8020208:	82fb      	strh	r3, [r7, #22]
    if (oversize > 0) {
 802020a:	8afb      	ldrh	r3, [r7, #22]
 802020c:	2b00      	cmp	r3, #0
 802020e:	d02e      	beq.n	802026e <tcp_write+0x1be>
      LWIP_ASSERT("inconsistent oversize vs. space", oversize <= space);
 8020210:	8afb      	ldrh	r3, [r7, #22]
 8020212:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 8020216:	429a      	cmp	r2, r3
 8020218:	d206      	bcs.n	8020228 <tcp_write+0x178>
 802021a:	4b57      	ldr	r3, [pc, #348]	@ (8020378 <tcp_write+0x2c8>)
 802021c:	f44f 72fc 	mov.w	r2, #504	@ 0x1f8
 8020220:	495b      	ldr	r1, [pc, #364]	@ (8020390 <tcp_write+0x2e0>)
 8020222:	4857      	ldr	r0, [pc, #348]	@ (8020380 <tcp_write+0x2d0>)
 8020224:	f00a fc1a 	bl	802aa5c <iprintf>
      seg = last_unsent;
 8020228:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802022a:	657b      	str	r3, [r7, #84]	@ 0x54
      oversize_used = LWIP_MIN(space, LWIP_MIN(oversize, len));
 802022c:	8afb      	ldrh	r3, [r7, #22]
 802022e:	88fa      	ldrh	r2, [r7, #6]
 8020230:	4293      	cmp	r3, r2
 8020232:	bf28      	it	cs
 8020234:	4613      	movcs	r3, r2
 8020236:	b29b      	uxth	r3, r3
 8020238:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 802023c:	4293      	cmp	r3, r2
 802023e:	bf28      	it	cs
 8020240:	4613      	movcs	r3, r2
 8020242:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      pos += oversize_used;
 8020246:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 802024a:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 802024e:	4413      	add	r3, r2
 8020250:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
      oversize -= oversize_used;
 8020254:	8afa      	ldrh	r2, [r7, #22]
 8020256:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 802025a:	1ad3      	subs	r3, r2, r3
 802025c:	b29b      	uxth	r3, r3
 802025e:	82fb      	strh	r3, [r7, #22]
      space -= oversize_used;
 8020260:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 8020264:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8020268:	1ad3      	subs	r3, r2, r3
 802026a:	f8a7 305c 	strh.w	r3, [r7, #92]	@ 0x5c
    }
    /* now we are either finished or oversize is zero */
    LWIP_ASSERT("inconsistent oversize vs. len", (oversize == 0) || (pos == len));
 802026e:	8afb      	ldrh	r3, [r7, #22]
 8020270:	2b00      	cmp	r3, #0
 8020272:	d00b      	beq.n	802028c <tcp_write+0x1dc>
 8020274:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 8020278:	88fb      	ldrh	r3, [r7, #6]
 802027a:	429a      	cmp	r2, r3
 802027c:	d006      	beq.n	802028c <tcp_write+0x1dc>
 802027e:	4b3e      	ldr	r3, [pc, #248]	@ (8020378 <tcp_write+0x2c8>)
 8020280:	f44f 7200 	mov.w	r2, #512	@ 0x200
 8020284:	4943      	ldr	r1, [pc, #268]	@ (8020394 <tcp_write+0x2e4>)
 8020286:	483e      	ldr	r0, [pc, #248]	@ (8020380 <tcp_write+0x2d0>)
 8020288:	f00a fbe8 	bl	802aa5c <iprintf>
     *
     * This phase is skipped for LWIP_NETIF_TX_SINGLE_PBUF as we could only execute
     * it after rexmit puts a segment from unacked to unsent and at this point,
     * oversize info is lost.
     */
    if ((pos < len) && (space > 0) && (last_unsent->len > 0)) {
 802028c:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 8020290:	88fb      	ldrh	r3, [r7, #6]
 8020292:	429a      	cmp	r2, r3
 8020294:	f080 8172 	bcs.w	802057c <tcp_write+0x4cc>
 8020298:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 802029c:	2b00      	cmp	r3, #0
 802029e:	f000 816d 	beq.w	802057c <tcp_write+0x4cc>
 80202a2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80202a4:	891b      	ldrh	r3, [r3, #8]
 80202a6:	2b00      	cmp	r3, #0
 80202a8:	f000 8168 	beq.w	802057c <tcp_write+0x4cc>
      u16_t seglen = LWIP_MIN(space, len - pos);
 80202ac:	88fa      	ldrh	r2, [r7, #6]
 80202ae:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 80202b2:	1ad2      	subs	r2, r2, r3
 80202b4:	f8b7 305c 	ldrh.w	r3, [r7, #92]	@ 0x5c
 80202b8:	4293      	cmp	r3, r2
 80202ba:	bfa8      	it	ge
 80202bc:	4613      	movge	r3, r2
 80202be:	847b      	strh	r3, [r7, #34]	@ 0x22
      seg = last_unsent;
 80202c0:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80202c2:	657b      	str	r3, [r7, #84]	@ 0x54

      /* Create a pbuf with a copy or reference to seglen bytes. We
       * can use PBUF_RAW here since the data appears in the middle of
       * a segment. A header will never be prepended. */
      if (apiflags & TCP_WRITE_FLAG_COPY) {
 80202c4:	797b      	ldrb	r3, [r7, #5]
 80202c6:	f003 0301 	and.w	r3, r3, #1
 80202ca:	2b00      	cmp	r3, #0
 80202cc:	d02b      	beq.n	8020326 <tcp_write+0x276>
        /* Data is copied */
        if ((concat_p = tcp_pbuf_prealloc(PBUF_RAW, seglen, space, &oversize, pcb, apiflags, 1)) == NULL) {
 80202ce:	f107 0016 	add.w	r0, r7, #22
 80202d2:	f8b7 205c 	ldrh.w	r2, [r7, #92]	@ 0x5c
 80202d6:	8c79      	ldrh	r1, [r7, #34]	@ 0x22
 80202d8:	2301      	movs	r3, #1
 80202da:	9302      	str	r3, [sp, #8]
 80202dc:	797b      	ldrb	r3, [r7, #5]
 80202de:	9301      	str	r3, [sp, #4]
 80202e0:	68fb      	ldr	r3, [r7, #12]
 80202e2:	9300      	str	r3, [sp, #0]
 80202e4:	4603      	mov	r3, r0
 80202e6:	2000      	movs	r0, #0
 80202e8:	f7ff fdee 	bl	801fec8 <tcp_pbuf_prealloc>
 80202ec:	63f8      	str	r0, [r7, #60]	@ 0x3c
 80202ee:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80202f0:	2b00      	cmp	r3, #0
 80202f2:	f000 825a 	beq.w	80207aa <tcp_write+0x6fa>
                      ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n",
                       seglen));
          goto memerr;
        }
#if TCP_OVERSIZE_DBGCHECK
        oversize_add = oversize;
 80202f6:	8afb      	ldrh	r3, [r7, #22]
 80202f8:	f8a7 305a 	strh.w	r3, [r7, #90]	@ 0x5a
#endif /* TCP_OVERSIZE_DBGCHECK */
        TCP_DATA_COPY2(concat_p->payload, (const u8_t *)arg + pos, seglen, &concat_chksum, &concat_chksum_swapped);
 80202fc:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80202fe:	6858      	ldr	r0, [r3, #4]
 8020300:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 8020304:	68ba      	ldr	r2, [r7, #8]
 8020306:	4413      	add	r3, r2
 8020308:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 802030a:	4619      	mov	r1, r3
 802030c:	f00a fe2f 	bl	802af6e <memcpy>
#if TCP_CHECKSUM_ON_COPY
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
        queuelen += pbuf_clen(concat_p);
 8020310:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 8020312:	f7fb f9b9 	bl	801b688 <pbuf_clen>
 8020316:	4603      	mov	r3, r0
 8020318:	461a      	mov	r2, r3
 802031a:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 802031e:	4413      	add	r3, r2
 8020320:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
 8020324:	e055      	b.n	80203d2 <tcp_write+0x322>
      } else {
        /* Data is not copied */
        /* If the last unsent pbuf is of type PBUF_ROM, try to extend it. */
        struct pbuf *p;
        for (p = last_unsent->p; p->next != NULL; p = p->next);
 8020326:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020328:	685b      	ldr	r3, [r3, #4]
 802032a:	63bb      	str	r3, [r7, #56]	@ 0x38
 802032c:	e002      	b.n	8020334 <tcp_write+0x284>
 802032e:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8020330:	681b      	ldr	r3, [r3, #0]
 8020332:	63bb      	str	r3, [r7, #56]	@ 0x38
 8020334:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8020336:	681b      	ldr	r3, [r3, #0]
 8020338:	2b00      	cmp	r3, #0
 802033a:	d1f8      	bne.n	802032e <tcp_write+0x27e>
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 802033c:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 802033e:	7b1b      	ldrb	r3, [r3, #12]
 8020340:	f003 03c0 	and.w	r3, r3, #192	@ 0xc0
 8020344:	2b00      	cmp	r3, #0
 8020346:	d129      	bne.n	802039c <tcp_write+0x2ec>
            (const u8_t *)p->payload + p->len == (const u8_t *)arg) {
 8020348:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 802034a:	685b      	ldr	r3, [r3, #4]
 802034c:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 802034e:	8952      	ldrh	r2, [r2, #10]
 8020350:	4413      	add	r3, r2
        if (((p->type_internal & (PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS | PBUF_TYPE_FLAG_DATA_VOLATILE)) == 0) &&
 8020352:	68ba      	ldr	r2, [r7, #8]
 8020354:	429a      	cmp	r2, r3
 8020356:	d121      	bne.n	802039c <tcp_write+0x2ec>
          LWIP_ASSERT("tcp_write: ROM pbufs cannot be oversized", pos == 0);
 8020358:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 802035c:	2b00      	cmp	r3, #0
 802035e:	d006      	beq.n	802036e <tcp_write+0x2be>
 8020360:	4b05      	ldr	r3, [pc, #20]	@ (8020378 <tcp_write+0x2c8>)
 8020362:	f240 2231 	movw	r2, #561	@ 0x231
 8020366:	490c      	ldr	r1, [pc, #48]	@ (8020398 <tcp_write+0x2e8>)
 8020368:	4805      	ldr	r0, [pc, #20]	@ (8020380 <tcp_write+0x2d0>)
 802036a:	f00a fb77 	bl	802aa5c <iprintf>
          extendlen = seglen;
 802036e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8020370:	f8a7 305e 	strh.w	r3, [r7, #94]	@ 0x5e
 8020374:	e02d      	b.n	80203d2 <tcp_write+0x322>
 8020376:	bf00      	nop
 8020378:	08030408 	.word	0x08030408
 802037c:	080305a8 	.word	0x080305a8
 8020380:	0803045c 	.word	0x0803045c
 8020384:	080305c0 	.word	0x080305c0
 8020388:	080305f4 	.word	0x080305f4
 802038c:	0803060c 	.word	0x0803060c
 8020390:	0803063c 	.word	0x0803063c
 8020394:	0803065c 	.word	0x0803065c
 8020398:	0803067c 	.word	0x0803067c
        } else {
          if ((concat_p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) {
 802039c:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 802039e:	2201      	movs	r2, #1
 80203a0:	4619      	mov	r1, r3
 80203a2:	2000      	movs	r0, #0
 80203a4:	f7fa fdcc 	bl	801af40 <pbuf_alloc>
 80203a8:	63f8      	str	r0, [r7, #60]	@ 0x3c
 80203aa:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80203ac:	2b00      	cmp	r3, #0
 80203ae:	f000 81fe 	beq.w	80207ae <tcp_write+0x6fe>
            LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                        ("tcp_write: could not allocate memory for zero-copy pbuf\n"));
            goto memerr;
          }
          /* reference the non-volatile payload data */
          ((struct pbuf_rom *)concat_p)->payload = (const u8_t *)arg + pos;
 80203b2:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 80203b6:	68ba      	ldr	r2, [r7, #8]
 80203b8:	441a      	add	r2, r3
 80203ba:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80203bc:	605a      	str	r2, [r3, #4]
          queuelen += pbuf_clen(concat_p);
 80203be:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 80203c0:	f7fb f962 	bl	801b688 <pbuf_clen>
 80203c4:	4603      	mov	r3, r0
 80203c6:	461a      	mov	r2, r3
 80203c8:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 80203cc:	4413      	add	r3, r2
 80203ce:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48
                           &concat_chksum, &concat_chksum_swapped);
        concat_chksummed += seglen;
#endif /* TCP_CHECKSUM_ON_COPY */
      }

      pos += seglen;
 80203d2:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 80203d6:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80203d8:	4413      	add	r3, r2
 80203da:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
 80203de:	e0cd      	b.n	802057c <tcp_write+0x4cc>
    }
#endif /* !LWIP_NETIF_TX_SINGLE_PBUF */
  } else {
#if TCP_OVERSIZE
    LWIP_ASSERT("unsent_oversize mismatch (pcb->unsent is NULL)",
 80203e0:	68fb      	ldr	r3, [r7, #12]
 80203e2:	f8b3 3068 	ldrh.w	r3, [r3, #104]	@ 0x68
 80203e6:	2b00      	cmp	r3, #0
 80203e8:	f000 80c8 	beq.w	802057c <tcp_write+0x4cc>
 80203ec:	4b72      	ldr	r3, [pc, #456]	@ (80205b8 <tcp_write+0x508>)
 80203ee:	f240 224a 	movw	r2, #586	@ 0x24a
 80203f2:	4972      	ldr	r1, [pc, #456]	@ (80205bc <tcp_write+0x50c>)
 80203f4:	4872      	ldr	r0, [pc, #456]	@ (80205c0 <tcp_write+0x510>)
 80203f6:	f00a fb31 	bl	802aa5c <iprintf>
   * Phase 3: Create new segments.
   *
   * The new segments are chained together in the local 'queue'
   * variable, ready to be appended to pcb->unsent.
   */
  while (pos < len) {
 80203fa:	e0bf      	b.n	802057c <tcp_write+0x4cc>
    struct pbuf *p;
    u16_t left = len - pos;
 80203fc:	88fa      	ldrh	r2, [r7, #6]
 80203fe:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 8020402:	1ad3      	subs	r3, r2, r3
 8020404:	843b      	strh	r3, [r7, #32]
    u16_t max_len = mss_local - optlen;
 8020406:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 802040a:	b29b      	uxth	r3, r3
 802040c:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 802040e:	1ad3      	subs	r3, r2, r3
 8020410:	83fb      	strh	r3, [r7, #30]
    u16_t seglen = LWIP_MIN(left, max_len);
 8020412:	8bfa      	ldrh	r2, [r7, #30]
 8020414:	8c3b      	ldrh	r3, [r7, #32]
 8020416:	4293      	cmp	r3, r2
 8020418:	bf28      	it	cs
 802041a:	4613      	movcs	r3, r2
 802041c:	83bb      	strh	r3, [r7, #28]
#if TCP_CHECKSUM_ON_COPY
    u16_t chksum = 0;
    u8_t chksum_swapped = 0;
#endif /* TCP_CHECKSUM_ON_COPY */

    if (apiflags & TCP_WRITE_FLAG_COPY) {
 802041e:	797b      	ldrb	r3, [r7, #5]
 8020420:	f003 0301 	and.w	r3, r3, #1
 8020424:	2b00      	cmp	r3, #0
 8020426:	d036      	beq.n	8020496 <tcp_write+0x3e6>
      /* If copy is set, memory should be allocated and data copied
       * into pbuf */
      if ((p = tcp_pbuf_prealloc(PBUF_TRANSPORT, seglen + optlen, mss_local, &oversize, pcb, apiflags, queue == NULL)) == NULL) {
 8020428:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 802042c:	b29a      	uxth	r2, r3
 802042e:	8bbb      	ldrh	r3, [r7, #28]
 8020430:	4413      	add	r3, r2
 8020432:	b299      	uxth	r1, r3
 8020434:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8020436:	2b00      	cmp	r3, #0
 8020438:	bf0c      	ite	eq
 802043a:	2301      	moveq	r3, #1
 802043c:	2300      	movne	r3, #0
 802043e:	b2db      	uxtb	r3, r3
 8020440:	f107 0016 	add.w	r0, r7, #22
 8020444:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 8020446:	9302      	str	r3, [sp, #8]
 8020448:	797b      	ldrb	r3, [r7, #5]
 802044a:	9301      	str	r3, [sp, #4]
 802044c:	68fb      	ldr	r3, [r7, #12]
 802044e:	9300      	str	r3, [sp, #0]
 8020450:	4603      	mov	r3, r0
 8020452:	2036      	movs	r0, #54	@ 0x36
 8020454:	f7ff fd38 	bl	801fec8 <tcp_pbuf_prealloc>
 8020458:	6378      	str	r0, [r7, #52]	@ 0x34
 802045a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802045c:	2b00      	cmp	r3, #0
 802045e:	f000 81a8 	beq.w	80207b2 <tcp_write+0x702>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write : could not allocate memory for pbuf copy size %"U16_F"\n", seglen));
        goto memerr;
      }
      LWIP_ASSERT("tcp_write: check that first pbuf can hold the complete seglen",
 8020462:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8020464:	895b      	ldrh	r3, [r3, #10]
 8020466:	8bba      	ldrh	r2, [r7, #28]
 8020468:	429a      	cmp	r2, r3
 802046a:	d906      	bls.n	802047a <tcp_write+0x3ca>
 802046c:	4b52      	ldr	r3, [pc, #328]	@ (80205b8 <tcp_write+0x508>)
 802046e:	f240 2266 	movw	r2, #614	@ 0x266
 8020472:	4954      	ldr	r1, [pc, #336]	@ (80205c4 <tcp_write+0x514>)
 8020474:	4852      	ldr	r0, [pc, #328]	@ (80205c0 <tcp_write+0x510>)
 8020476:	f00a faf1 	bl	802aa5c <iprintf>
                  (p->len >= seglen));
      TCP_DATA_COPY2((char *)p->payload + optlen, (const u8_t *)arg + pos, seglen, &chksum, &chksum_swapped);
 802047a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802047c:	685a      	ldr	r2, [r3, #4]
 802047e:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 8020482:	18d0      	adds	r0, r2, r3
 8020484:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 8020488:	68ba      	ldr	r2, [r7, #8]
 802048a:	4413      	add	r3, r2
 802048c:	8bba      	ldrh	r2, [r7, #28]
 802048e:	4619      	mov	r1, r3
 8020490:	f00a fd6d 	bl	802af6e <memcpy>
 8020494:	e02f      	b.n	80204f6 <tcp_write+0x446>
       * sent out on the link (as it has to be ACKed by the remote
       * party) we can safely use PBUF_ROM instead of PBUF_REF here.
       */
      struct pbuf *p2;
#if TCP_OVERSIZE
      LWIP_ASSERT("oversize == 0", oversize == 0);
 8020496:	8afb      	ldrh	r3, [r7, #22]
 8020498:	2b00      	cmp	r3, #0
 802049a:	d006      	beq.n	80204aa <tcp_write+0x3fa>
 802049c:	4b46      	ldr	r3, [pc, #280]	@ (80205b8 <tcp_write+0x508>)
 802049e:	f240 2271 	movw	r2, #625	@ 0x271
 80204a2:	4949      	ldr	r1, [pc, #292]	@ (80205c8 <tcp_write+0x518>)
 80204a4:	4846      	ldr	r0, [pc, #280]	@ (80205c0 <tcp_write+0x510>)
 80204a6:	f00a fad9 	bl	802aa5c <iprintf>
#endif /* TCP_OVERSIZE */
      if ((p2 = pbuf_alloc(PBUF_TRANSPORT, seglen, PBUF_ROM)) == NULL) {
 80204aa:	8bbb      	ldrh	r3, [r7, #28]
 80204ac:	2201      	movs	r2, #1
 80204ae:	4619      	mov	r1, r3
 80204b0:	2036      	movs	r0, #54	@ 0x36
 80204b2:	f7fa fd45 	bl	801af40 <pbuf_alloc>
 80204b6:	61b8      	str	r0, [r7, #24]
 80204b8:	69bb      	ldr	r3, [r7, #24]
 80204ba:	2b00      	cmp	r3, #0
 80204bc:	f000 817b 	beq.w	80207b6 <tcp_write+0x706>
        chksum_swapped = 1;
        chksum = SWAP_BYTES_IN_WORD(chksum);
      }
#endif /* TCP_CHECKSUM_ON_COPY */
      /* reference the non-volatile payload data */
      ((struct pbuf_rom *)p2)->payload = (const u8_t *)arg + pos;
 80204c0:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 80204c4:	68ba      	ldr	r2, [r7, #8]
 80204c6:	441a      	add	r2, r3
 80204c8:	69bb      	ldr	r3, [r7, #24]
 80204ca:	605a      	str	r2, [r3, #4]

      /* Second, allocate a pbuf for the headers. */
      if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 80204cc:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 80204d0:	b29b      	uxth	r3, r3
 80204d2:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80204d6:	4619      	mov	r1, r3
 80204d8:	2036      	movs	r0, #54	@ 0x36
 80204da:	f7fa fd31 	bl	801af40 <pbuf_alloc>
 80204de:	6378      	str	r0, [r7, #52]	@ 0x34
 80204e0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80204e2:	2b00      	cmp	r3, #0
 80204e4:	d103      	bne.n	80204ee <tcp_write+0x43e>
        /* If allocation fails, we have to deallocate the data pbuf as
         * well. */
        pbuf_free(p2);
 80204e6:	69b8      	ldr	r0, [r7, #24]
 80204e8:	f7fb f840 	bl	801b56c <pbuf_free>
        LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: could not allocate memory for header pbuf\n"));
        goto memerr;
 80204ec:	e166      	b.n	80207bc <tcp_write+0x70c>
      }
      /* Concatenate the headers and data pbufs together. */
      pbuf_cat(p/*header*/, p2/*data*/);
 80204ee:	69b9      	ldr	r1, [r7, #24]
 80204f0:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 80204f2:	f7fb f909 	bl	801b708 <pbuf_cat>
    }

    queuelen += pbuf_clen(p);
 80204f6:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 80204f8:	f7fb f8c6 	bl	801b688 <pbuf_clen>
 80204fc:	4603      	mov	r3, r0
 80204fe:	461a      	mov	r2, r3
 8020500:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 8020504:	4413      	add	r3, r2
 8020506:	f8a7 3048 	strh.w	r3, [r7, #72]	@ 0x48

    /* Now that there are more segments queued, we check again if the
     * length of the queue exceeds the configured maximum or
     * overflows. */
    if (queuelen > LWIP_MIN(TCP_SND_QUEUELEN, TCP_SNDQUEUELEN_OVERFLOW)) {
 802050a:	f8b7 3048 	ldrh.w	r3, [r7, #72]	@ 0x48
 802050e:	2b10      	cmp	r3, #16
 8020510:	d903      	bls.n	802051a <tcp_write+0x46a>
      LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_write: queue too long %"U16_F" (%d)\n",
                  queuelen, (int)TCP_SND_QUEUELEN));
      pbuf_free(p);
 8020512:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 8020514:	f7fb f82a 	bl	801b56c <pbuf_free>
      goto memerr;
 8020518:	e150      	b.n	80207bc <tcp_write+0x70c>
    }

    if ((seg = tcp_create_segment(pcb, p, 0, pcb->snd_lbb + pos, optflags)) == NULL) {
 802051a:	68fb      	ldr	r3, [r7, #12]
 802051c:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 802051e:	f8b7 304a 	ldrh.w	r3, [r7, #74]	@ 0x4a
 8020522:	441a      	add	r2, r3
 8020524:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8020528:	9300      	str	r3, [sp, #0]
 802052a:	4613      	mov	r3, r2
 802052c:	2200      	movs	r2, #0
 802052e:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8020530:	68f8      	ldr	r0, [r7, #12]
 8020532:	f7ff fc29 	bl	801fd88 <tcp_create_segment>
 8020536:	6578      	str	r0, [r7, #84]	@ 0x54
 8020538:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802053a:	2b00      	cmp	r3, #0
 802053c:	f000 813d 	beq.w	80207ba <tcp_write+0x70a>
      goto memerr;
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = oversize;
 8020540:	8afa      	ldrh	r2, [r7, #22]
 8020542:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 8020544:	815a      	strh	r2, [r3, #10]
    seg->chksum_swapped = chksum_swapped;
    seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

    /* first segment of to-be-queued data? */
    if (queue == NULL) {
 8020546:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 8020548:	2b00      	cmp	r3, #0
 802054a:	d102      	bne.n	8020552 <tcp_write+0x4a2>
      queue = seg;
 802054c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802054e:	64fb      	str	r3, [r7, #76]	@ 0x4c
 8020550:	e00c      	b.n	802056c <tcp_write+0x4bc>
    } else {
      /* Attach the segment to the end of the queued segments */
      LWIP_ASSERT("prev_seg != NULL", prev_seg != NULL);
 8020552:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8020554:	2b00      	cmp	r3, #0
 8020556:	d106      	bne.n	8020566 <tcp_write+0x4b6>
 8020558:	4b17      	ldr	r3, [pc, #92]	@ (80205b8 <tcp_write+0x508>)
 802055a:	f240 22ab 	movw	r2, #683	@ 0x2ab
 802055e:	491b      	ldr	r1, [pc, #108]	@ (80205cc <tcp_write+0x51c>)
 8020560:	4817      	ldr	r0, [pc, #92]	@ (80205c0 <tcp_write+0x510>)
 8020562:	f00a fa7b 	bl	802aa5c <iprintf>
      prev_seg->next = seg;
 8020566:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 8020568:	6d7a      	ldr	r2, [r7, #84]	@ 0x54
 802056a:	601a      	str	r2, [r3, #0]
    }
    /* remember last segment of to-be-queued data for next iteration */
    prev_seg = seg;
 802056c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802056e:	653b      	str	r3, [r7, #80]	@ 0x50

    LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_write: queueing %"U32_F":%"U32_F"\n",
                lwip_ntohl(seg->tcphdr->seqno),
                lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg)));

    pos += seglen;
 8020570:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 8020574:	8bbb      	ldrh	r3, [r7, #28]
 8020576:	4413      	add	r3, r2
 8020578:	f8a7 304a 	strh.w	r3, [r7, #74]	@ 0x4a
  while (pos < len) {
 802057c:	f8b7 204a 	ldrh.w	r2, [r7, #74]	@ 0x4a
 8020580:	88fb      	ldrh	r3, [r7, #6]
 8020582:	429a      	cmp	r2, r3
 8020584:	f4ff af3a 	bcc.w	80203fc <tcp_write+0x34c>
  /*
   * All three segmentation phases were successful. We can commit the
   * transaction.
   */
#if TCP_OVERSIZE_DBGCHECK
  if ((last_unsent != NULL) && (oversize_add != 0)) {
 8020588:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802058a:	2b00      	cmp	r3, #0
 802058c:	d00b      	beq.n	80205a6 <tcp_write+0x4f6>
 802058e:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 8020592:	2b00      	cmp	r3, #0
 8020594:	d007      	beq.n	80205a6 <tcp_write+0x4f6>
    last_unsent->oversize_left += oversize_add;
 8020596:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020598:	895a      	ldrh	r2, [r3, #10]
 802059a:	f8b7 305a 	ldrh.w	r3, [r7, #90]	@ 0x5a
 802059e:	4413      	add	r3, r2
 80205a0:	b29a      	uxth	r2, r3
 80205a2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80205a4:	815a      	strh	r2, [r3, #10]
  /*
   * Phase 1: If data has been added to the preallocated tail of
   * last_unsent, we update the length fields of the pbuf chain.
   */
#if TCP_OVERSIZE
  if (oversize_used > 0) {
 80205a6:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 80205aa:	2b00      	cmp	r3, #0
 80205ac:	d052      	beq.n	8020654 <tcp_write+0x5a4>
    struct pbuf *p;
    /* Bump tot_len of whole chain, len of tail */
    for (p = last_unsent->p; p; p = p->next) {
 80205ae:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80205b0:	685b      	ldr	r3, [r3, #4]
 80205b2:	633b      	str	r3, [r7, #48]	@ 0x30
 80205b4:	e02e      	b.n	8020614 <tcp_write+0x564>
 80205b6:	bf00      	nop
 80205b8:	08030408 	.word	0x08030408
 80205bc:	080306a8 	.word	0x080306a8
 80205c0:	0803045c 	.word	0x0803045c
 80205c4:	080306d8 	.word	0x080306d8
 80205c8:	08030718 	.word	0x08030718
 80205cc:	08030728 	.word	0x08030728
      p->tot_len += oversize_used;
 80205d0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80205d2:	891a      	ldrh	r2, [r3, #8]
 80205d4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 80205d8:	4413      	add	r3, r2
 80205da:	b29a      	uxth	r2, r3
 80205dc:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80205de:	811a      	strh	r2, [r3, #8]
      if (p->next == NULL) {
 80205e0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80205e2:	681b      	ldr	r3, [r3, #0]
 80205e4:	2b00      	cmp	r3, #0
 80205e6:	d112      	bne.n	802060e <tcp_write+0x55e>
        TCP_DATA_COPY((char *)p->payload + p->len, arg, oversize_used, last_unsent);
 80205e8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80205ea:	685b      	ldr	r3, [r3, #4]
 80205ec:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 80205ee:	8952      	ldrh	r2, [r2, #10]
 80205f0:	4413      	add	r3, r2
 80205f2:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 80205f6:	68b9      	ldr	r1, [r7, #8]
 80205f8:	4618      	mov	r0, r3
 80205fa:	f00a fcb8 	bl	802af6e <memcpy>
        p->len += oversize_used;
 80205fe:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8020600:	895a      	ldrh	r2, [r3, #10]
 8020602:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8020606:	4413      	add	r3, r2
 8020608:	b29a      	uxth	r2, r3
 802060a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802060c:	815a      	strh	r2, [r3, #10]
    for (p = last_unsent->p; p; p = p->next) {
 802060e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8020610:	681b      	ldr	r3, [r3, #0]
 8020612:	633b      	str	r3, [r7, #48]	@ 0x30
 8020614:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8020616:	2b00      	cmp	r3, #0
 8020618:	d1da      	bne.n	80205d0 <tcp_write+0x520>
      }
    }
    last_unsent->len += oversize_used;
 802061a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802061c:	891a      	ldrh	r2, [r3, #8]
 802061e:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8020622:	4413      	add	r3, r2
 8020624:	b29a      	uxth	r2, r3
 8020626:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020628:	811a      	strh	r2, [r3, #8]
#if TCP_OVERSIZE_DBGCHECK
    LWIP_ASSERT("last_unsent->oversize_left >= oversize_used",
 802062a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802062c:	895b      	ldrh	r3, [r3, #10]
 802062e:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8020632:	429a      	cmp	r2, r3
 8020634:	d906      	bls.n	8020644 <tcp_write+0x594>
 8020636:	4b78      	ldr	r3, [pc, #480]	@ (8020818 <tcp_write+0x768>)
 8020638:	f240 22d3 	movw	r2, #723	@ 0x2d3
 802063c:	4977      	ldr	r1, [pc, #476]	@ (802081c <tcp_write+0x76c>)
 802063e:	4878      	ldr	r0, [pc, #480]	@ (8020820 <tcp_write+0x770>)
 8020640:	f00a fa0c 	bl	802aa5c <iprintf>
                last_unsent->oversize_left >= oversize_used);
    last_unsent->oversize_left -= oversize_used;
 8020644:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020646:	895a      	ldrh	r2, [r3, #10]
 8020648:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 802064c:	1ad3      	subs	r3, r2, r3
 802064e:	b29a      	uxth	r2, r3
 8020650:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020652:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
  }
  pcb->unsent_oversize = oversize;
 8020654:	8afa      	ldrh	r2, [r7, #22]
 8020656:	68fb      	ldr	r3, [r7, #12]
 8020658:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68

  /*
   * Phase 2: concat_p can be concatenated onto last_unsent->p, unless we
   * determined that the last ROM pbuf can be extended to include the new data.
   */
  if (concat_p != NULL) {
 802065c:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 802065e:	2b00      	cmp	r3, #0
 8020660:	d018      	beq.n	8020694 <tcp_write+0x5e4>
    LWIP_ASSERT("tcp_write: cannot concatenate when pcb->unsent is empty",
 8020662:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020664:	2b00      	cmp	r3, #0
 8020666:	d106      	bne.n	8020676 <tcp_write+0x5c6>
 8020668:	4b6b      	ldr	r3, [pc, #428]	@ (8020818 <tcp_write+0x768>)
 802066a:	f44f 7238 	mov.w	r2, #736	@ 0x2e0
 802066e:	496d      	ldr	r1, [pc, #436]	@ (8020824 <tcp_write+0x774>)
 8020670:	486b      	ldr	r0, [pc, #428]	@ (8020820 <tcp_write+0x770>)
 8020672:	f00a f9f3 	bl	802aa5c <iprintf>
                (last_unsent != NULL));
    pbuf_cat(last_unsent->p, concat_p);
 8020676:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020678:	685b      	ldr	r3, [r3, #4]
 802067a:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 802067c:	4618      	mov	r0, r3
 802067e:	f7fb f843 	bl	801b708 <pbuf_cat>
    last_unsent->len += concat_p->tot_len;
 8020682:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020684:	891a      	ldrh	r2, [r3, #8]
 8020686:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8020688:	891b      	ldrh	r3, [r3, #8]
 802068a:	4413      	add	r3, r2
 802068c:	b29a      	uxth	r2, r3
 802068e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020690:	811a      	strh	r2, [r3, #8]
 8020692:	e03c      	b.n	802070e <tcp_write+0x65e>
  } else if (extendlen > 0) {
 8020694:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 8020698:	2b00      	cmp	r3, #0
 802069a:	d038      	beq.n	802070e <tcp_write+0x65e>
    struct pbuf *p;
    LWIP_ASSERT("tcp_write: extension of reference requires reference",
 802069c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802069e:	2b00      	cmp	r3, #0
 80206a0:	d003      	beq.n	80206aa <tcp_write+0x5fa>
 80206a2:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80206a4:	685b      	ldr	r3, [r3, #4]
 80206a6:	2b00      	cmp	r3, #0
 80206a8:	d106      	bne.n	80206b8 <tcp_write+0x608>
 80206aa:	4b5b      	ldr	r3, [pc, #364]	@ (8020818 <tcp_write+0x768>)
 80206ac:	f240 22e6 	movw	r2, #742	@ 0x2e6
 80206b0:	495d      	ldr	r1, [pc, #372]	@ (8020828 <tcp_write+0x778>)
 80206b2:	485b      	ldr	r0, [pc, #364]	@ (8020820 <tcp_write+0x770>)
 80206b4:	f00a f9d2 	bl	802aa5c <iprintf>
                last_unsent != NULL && last_unsent->p != NULL);
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 80206b8:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 80206ba:	685b      	ldr	r3, [r3, #4]
 80206bc:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80206be:	e00a      	b.n	80206d6 <tcp_write+0x626>
      p->tot_len += extendlen;
 80206c0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80206c2:	891a      	ldrh	r2, [r3, #8]
 80206c4:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 80206c8:	4413      	add	r3, r2
 80206ca:	b29a      	uxth	r2, r3
 80206cc:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80206ce:	811a      	strh	r2, [r3, #8]
    for (p = last_unsent->p; p->next != NULL; p = p->next) {
 80206d0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80206d2:	681b      	ldr	r3, [r3, #0]
 80206d4:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80206d6:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80206d8:	681b      	ldr	r3, [r3, #0]
 80206da:	2b00      	cmp	r3, #0
 80206dc:	d1f0      	bne.n	80206c0 <tcp_write+0x610>
    }
    p->tot_len += extendlen;
 80206de:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80206e0:	891a      	ldrh	r2, [r3, #8]
 80206e2:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 80206e6:	4413      	add	r3, r2
 80206e8:	b29a      	uxth	r2, r3
 80206ea:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80206ec:	811a      	strh	r2, [r3, #8]
    p->len += extendlen;
 80206ee:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80206f0:	895a      	ldrh	r2, [r3, #10]
 80206f2:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 80206f6:	4413      	add	r3, r2
 80206f8:	b29a      	uxth	r2, r3
 80206fa:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80206fc:	815a      	strh	r2, [r3, #10]
    last_unsent->len += extendlen;
 80206fe:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020700:	891a      	ldrh	r2, [r3, #8]
 8020702:	f8b7 305e 	ldrh.w	r3, [r7, #94]	@ 0x5e
 8020706:	4413      	add	r3, r2
 8020708:	b29a      	uxth	r2, r3
 802070a:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802070c:	811a      	strh	r2, [r3, #8]

  /*
   * Phase 3: Append queue to pcb->unsent. Queue may be NULL, but that
   * is harmless
   */
  if (last_unsent == NULL) {
 802070e:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8020710:	2b00      	cmp	r3, #0
 8020712:	d103      	bne.n	802071c <tcp_write+0x66c>
    pcb->unsent = queue;
 8020714:	68fb      	ldr	r3, [r7, #12]
 8020716:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 8020718:	66da      	str	r2, [r3, #108]	@ 0x6c
 802071a:	e002      	b.n	8020722 <tcp_write+0x672>
  } else {
    last_unsent->next = queue;
 802071c:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 802071e:	6cfa      	ldr	r2, [r7, #76]	@ 0x4c
 8020720:	601a      	str	r2, [r3, #0]
  }

  /*
   * Finally update the pcb state.
   */
  pcb->snd_lbb += len;
 8020722:	68fb      	ldr	r3, [r7, #12]
 8020724:	6dda      	ldr	r2, [r3, #92]	@ 0x5c
 8020726:	88fb      	ldrh	r3, [r7, #6]
 8020728:	441a      	add	r2, r3
 802072a:	68fb      	ldr	r3, [r7, #12]
 802072c:	65da      	str	r2, [r3, #92]	@ 0x5c
  pcb->snd_buf -= len;
 802072e:	68fb      	ldr	r3, [r7, #12]
 8020730:	f8b3 2064 	ldrh.w	r2, [r3, #100]	@ 0x64
 8020734:	88fb      	ldrh	r3, [r7, #6]
 8020736:	1ad3      	subs	r3, r2, r3
 8020738:	b29a      	uxth	r2, r3
 802073a:	68fb      	ldr	r3, [r7, #12]
 802073c:	f8a3 2064 	strh.w	r2, [r3, #100]	@ 0x64
  pcb->snd_queuelen = queuelen;
 8020740:	68fb      	ldr	r3, [r7, #12]
 8020742:	f8b7 2048 	ldrh.w	r2, [r7, #72]	@ 0x48
 8020746:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_write: %"S16_F" (after enqueued)\n",
                               pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 802074a:	68fb      	ldr	r3, [r7, #12]
 802074c:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020750:	2b00      	cmp	r3, #0
 8020752:	d00e      	beq.n	8020772 <tcp_write+0x6c2>
    LWIP_ASSERT("tcp_write: valid queue length",
 8020754:	68fb      	ldr	r3, [r7, #12]
 8020756:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020758:	2b00      	cmp	r3, #0
 802075a:	d10a      	bne.n	8020772 <tcp_write+0x6c2>
 802075c:	68fb      	ldr	r3, [r7, #12]
 802075e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020760:	2b00      	cmp	r3, #0
 8020762:	d106      	bne.n	8020772 <tcp_write+0x6c2>
 8020764:	4b2c      	ldr	r3, [pc, #176]	@ (8020818 <tcp_write+0x768>)
 8020766:	f240 3212 	movw	r2, #786	@ 0x312
 802076a:	4930      	ldr	r1, [pc, #192]	@ (802082c <tcp_write+0x77c>)
 802076c:	482c      	ldr	r0, [pc, #176]	@ (8020820 <tcp_write+0x770>)
 802076e:	f00a f975 	bl	802aa5c <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  /* Set the PSH flag in the last segment that we enqueued. */
  if (seg != NULL && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE) == 0)) {
 8020772:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 8020774:	2b00      	cmp	r3, #0
 8020776:	d016      	beq.n	80207a6 <tcp_write+0x6f6>
 8020778:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802077a:	691b      	ldr	r3, [r3, #16]
 802077c:	2b00      	cmp	r3, #0
 802077e:	d012      	beq.n	80207a6 <tcp_write+0x6f6>
 8020780:	797b      	ldrb	r3, [r7, #5]
 8020782:	f003 0302 	and.w	r3, r3, #2
 8020786:	2b00      	cmp	r3, #0
 8020788:	d10d      	bne.n	80207a6 <tcp_write+0x6f6>
    TCPH_SET_FLAG(seg->tcphdr, TCP_PSH);
 802078a:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802078c:	691b      	ldr	r3, [r3, #16]
 802078e:	899b      	ldrh	r3, [r3, #12]
 8020790:	b29c      	uxth	r4, r3
 8020792:	2008      	movs	r0, #8
 8020794:	f7f9 fa08 	bl	8019ba8 <lwip_htons>
 8020798:	4603      	mov	r3, r0
 802079a:	461a      	mov	r2, r3
 802079c:	6d7b      	ldr	r3, [r7, #84]	@ 0x54
 802079e:	691b      	ldr	r3, [r3, #16]
 80207a0:	4322      	orrs	r2, r4
 80207a2:	b292      	uxth	r2, r2
 80207a4:	819a      	strh	r2, [r3, #12]
  }

  return ERR_OK;
 80207a6:	2300      	movs	r3, #0
 80207a8:	e031      	b.n	802080e <tcp_write+0x75e>
          goto memerr;
 80207aa:	bf00      	nop
 80207ac:	e006      	b.n	80207bc <tcp_write+0x70c>
            goto memerr;
 80207ae:	bf00      	nop
 80207b0:	e004      	b.n	80207bc <tcp_write+0x70c>
        goto memerr;
 80207b2:	bf00      	nop
 80207b4:	e002      	b.n	80207bc <tcp_write+0x70c>
        goto memerr;
 80207b6:	bf00      	nop
 80207b8:	e000      	b.n	80207bc <tcp_write+0x70c>
      goto memerr;
 80207ba:	bf00      	nop
memerr:
  tcp_set_flags(pcb, TF_NAGLEMEMERR);
 80207bc:	68fb      	ldr	r3, [r7, #12]
 80207be:	8b5b      	ldrh	r3, [r3, #26]
 80207c0:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 80207c4:	b29a      	uxth	r2, r3
 80207c6:	68fb      	ldr	r3, [r7, #12]
 80207c8:	835a      	strh	r2, [r3, #26]
  TCP_STATS_INC(tcp.memerr);

  if (concat_p != NULL) {
 80207ca:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80207cc:	2b00      	cmp	r3, #0
 80207ce:	d002      	beq.n	80207d6 <tcp_write+0x726>
    pbuf_free(concat_p);
 80207d0:	6bf8      	ldr	r0, [r7, #60]	@ 0x3c
 80207d2:	f7fa fecb 	bl	801b56c <pbuf_free>
  }
  if (queue != NULL) {
 80207d6:	6cfb      	ldr	r3, [r7, #76]	@ 0x4c
 80207d8:	2b00      	cmp	r3, #0
 80207da:	d002      	beq.n	80207e2 <tcp_write+0x732>
    tcp_segs_free(queue);
 80207dc:	6cf8      	ldr	r0, [r7, #76]	@ 0x4c
 80207de:	f7fc fb09 	bl	801cdf4 <tcp_segs_free>
  }
  if (pcb->snd_queuelen != 0) {
 80207e2:	68fb      	ldr	r3, [r7, #12]
 80207e4:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 80207e8:	2b00      	cmp	r3, #0
 80207ea:	d00e      	beq.n	802080a <tcp_write+0x75a>
    LWIP_ASSERT("tcp_write: valid queue length", pcb->unacked != NULL ||
 80207ec:	68fb      	ldr	r3, [r7, #12]
 80207ee:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80207f0:	2b00      	cmp	r3, #0
 80207f2:	d10a      	bne.n	802080a <tcp_write+0x75a>
 80207f4:	68fb      	ldr	r3, [r7, #12]
 80207f6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80207f8:	2b00      	cmp	r3, #0
 80207fa:	d106      	bne.n	802080a <tcp_write+0x75a>
 80207fc:	4b06      	ldr	r3, [pc, #24]	@ (8020818 <tcp_write+0x768>)
 80207fe:	f240 3227 	movw	r2, #807	@ 0x327
 8020802:	490a      	ldr	r1, [pc, #40]	@ (802082c <tcp_write+0x77c>)
 8020804:	4806      	ldr	r0, [pc, #24]	@ (8020820 <tcp_write+0x770>)
 8020806:	f00a f929 	bl	802aa5c <iprintf>
                pcb->unsent != NULL);
  }
  LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_write: %"S16_F" (with mem err)\n", pcb->snd_queuelen));
  return ERR_MEM;
 802080a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 802080e:	4618      	mov	r0, r3
 8020810:	3764      	adds	r7, #100	@ 0x64
 8020812:	46bd      	mov	sp, r7
 8020814:	bd90      	pop	{r4, r7, pc}
 8020816:	bf00      	nop
 8020818:	08030408 	.word	0x08030408
 802081c:	0803073c 	.word	0x0803073c
 8020820:	0803045c 	.word	0x0803045c
 8020824:	08030768 	.word	0x08030768
 8020828:	080307a0 	.word	0x080307a0
 802082c:	080307d8 	.word	0x080307d8

08020830 <tcp_split_unsent_seg>:
 * @param pcb the tcp_pcb for which to split the unsent head
 * @param split the amount of payload to remain in the head
 */
err_t
tcp_split_unsent_seg(struct tcp_pcb *pcb, u16_t split)
{
 8020830:	b590      	push	{r4, r7, lr}
 8020832:	b08b      	sub	sp, #44	@ 0x2c
 8020834:	af02      	add	r7, sp, #8
 8020836:	6078      	str	r0, [r7, #4]
 8020838:	460b      	mov	r3, r1
 802083a:	807b      	strh	r3, [r7, #2]
  struct tcp_seg *seg = NULL, *useg = NULL;
 802083c:	2300      	movs	r3, #0
 802083e:	61bb      	str	r3, [r7, #24]
 8020840:	2300      	movs	r3, #0
 8020842:	617b      	str	r3, [r7, #20]
  struct pbuf *p = NULL;
 8020844:	2300      	movs	r3, #0
 8020846:	613b      	str	r3, [r7, #16]
  u16_t chksum = 0;
  u8_t chksum_swapped = 0;
  struct pbuf *q;
#endif /* TCP_CHECKSUM_ON_COPY */

  LWIP_ASSERT("tcp_split_unsent_seg: invalid pcb", pcb != NULL);
 8020848:	687b      	ldr	r3, [r7, #4]
 802084a:	2b00      	cmp	r3, #0
 802084c:	d106      	bne.n	802085c <tcp_split_unsent_seg+0x2c>
 802084e:	4b97      	ldr	r3, [pc, #604]	@ (8020aac <tcp_split_unsent_seg+0x27c>)
 8020850:	f240 324b 	movw	r2, #843	@ 0x34b
 8020854:	4996      	ldr	r1, [pc, #600]	@ (8020ab0 <tcp_split_unsent_seg+0x280>)
 8020856:	4897      	ldr	r0, [pc, #604]	@ (8020ab4 <tcp_split_unsent_seg+0x284>)
 8020858:	f00a f900 	bl	802aa5c <iprintf>

  useg = pcb->unsent;
 802085c:	687b      	ldr	r3, [r7, #4]
 802085e:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020860:	617b      	str	r3, [r7, #20]
  if (useg == NULL) {
 8020862:	697b      	ldr	r3, [r7, #20]
 8020864:	2b00      	cmp	r3, #0
 8020866:	d102      	bne.n	802086e <tcp_split_unsent_seg+0x3e>
    return ERR_MEM;
 8020868:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802086c:	e119      	b.n	8020aa2 <tcp_split_unsent_seg+0x272>
  }

  if (split == 0) {
 802086e:	887b      	ldrh	r3, [r7, #2]
 8020870:	2b00      	cmp	r3, #0
 8020872:	d109      	bne.n	8020888 <tcp_split_unsent_seg+0x58>
    LWIP_ASSERT("Can't split segment into length 0", 0);
 8020874:	4b8d      	ldr	r3, [pc, #564]	@ (8020aac <tcp_split_unsent_seg+0x27c>)
 8020876:	f240 3253 	movw	r2, #851	@ 0x353
 802087a:	498f      	ldr	r1, [pc, #572]	@ (8020ab8 <tcp_split_unsent_seg+0x288>)
 802087c:	488d      	ldr	r0, [pc, #564]	@ (8020ab4 <tcp_split_unsent_seg+0x284>)
 802087e:	f00a f8ed 	bl	802aa5c <iprintf>
    return ERR_VAL;
 8020882:	f06f 0305 	mvn.w	r3, #5
 8020886:	e10c      	b.n	8020aa2 <tcp_split_unsent_seg+0x272>
  }

  if (useg->len <= split) {
 8020888:	697b      	ldr	r3, [r7, #20]
 802088a:	891b      	ldrh	r3, [r3, #8]
 802088c:	887a      	ldrh	r2, [r7, #2]
 802088e:	429a      	cmp	r2, r3
 8020890:	d301      	bcc.n	8020896 <tcp_split_unsent_seg+0x66>
    return ERR_OK;
 8020892:	2300      	movs	r3, #0
 8020894:	e105      	b.n	8020aa2 <tcp_split_unsent_seg+0x272>
  }

  LWIP_ASSERT("split <= mss", split <= pcb->mss);
 8020896:	687b      	ldr	r3, [r7, #4]
 8020898:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 802089a:	887a      	ldrh	r2, [r7, #2]
 802089c:	429a      	cmp	r2, r3
 802089e:	d906      	bls.n	80208ae <tcp_split_unsent_seg+0x7e>
 80208a0:	4b82      	ldr	r3, [pc, #520]	@ (8020aac <tcp_split_unsent_seg+0x27c>)
 80208a2:	f240 325b 	movw	r2, #859	@ 0x35b
 80208a6:	4985      	ldr	r1, [pc, #532]	@ (8020abc <tcp_split_unsent_seg+0x28c>)
 80208a8:	4882      	ldr	r0, [pc, #520]	@ (8020ab4 <tcp_split_unsent_seg+0x284>)
 80208aa:	f00a f8d7 	bl	802aa5c <iprintf>
  LWIP_ASSERT("useg->len > 0", useg->len > 0);
 80208ae:	697b      	ldr	r3, [r7, #20]
 80208b0:	891b      	ldrh	r3, [r3, #8]
 80208b2:	2b00      	cmp	r3, #0
 80208b4:	d106      	bne.n	80208c4 <tcp_split_unsent_seg+0x94>
 80208b6:	4b7d      	ldr	r3, [pc, #500]	@ (8020aac <tcp_split_unsent_seg+0x27c>)
 80208b8:	f44f 7257 	mov.w	r2, #860	@ 0x35c
 80208bc:	4980      	ldr	r1, [pc, #512]	@ (8020ac0 <tcp_split_unsent_seg+0x290>)
 80208be:	487d      	ldr	r0, [pc, #500]	@ (8020ab4 <tcp_split_unsent_seg+0x284>)
 80208c0:	f00a f8cc 	bl	802aa5c <iprintf>
   * to split this packet so we may actually exceed the max value by
   * one!
   */
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: split_unsent_seg: %u\n", (unsigned int)pcb->snd_queuelen));

  optflags = useg->flags;
 80208c4:	697b      	ldr	r3, [r7, #20]
 80208c6:	7b1b      	ldrb	r3, [r3, #12]
 80208c8:	73fb      	strb	r3, [r7, #15]
#if TCP_CHECKSUM_ON_COPY
  /* Remove since checksum is not stored until after tcp_create_segment() */
  optflags &= ~TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */
  optlen = LWIP_TCP_OPT_LENGTH(optflags);
 80208ca:	7bfb      	ldrb	r3, [r7, #15]
 80208cc:	009b      	lsls	r3, r3, #2
 80208ce:	b2db      	uxtb	r3, r3
 80208d0:	f003 0304 	and.w	r3, r3, #4
 80208d4:	73bb      	strb	r3, [r7, #14]
  remainder = useg->len - split;
 80208d6:	697b      	ldr	r3, [r7, #20]
 80208d8:	891a      	ldrh	r2, [r3, #8]
 80208da:	887b      	ldrh	r3, [r7, #2]
 80208dc:	1ad3      	subs	r3, r2, r3
 80208de:	81bb      	strh	r3, [r7, #12]

  /* Create new pbuf for the remainder of the split */
  p = pbuf_alloc(PBUF_TRANSPORT, remainder + optlen, PBUF_RAM);
 80208e0:	7bbb      	ldrb	r3, [r7, #14]
 80208e2:	b29a      	uxth	r2, r3
 80208e4:	89bb      	ldrh	r3, [r7, #12]
 80208e6:	4413      	add	r3, r2
 80208e8:	b29b      	uxth	r3, r3
 80208ea:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80208ee:	4619      	mov	r1, r3
 80208f0:	2036      	movs	r0, #54	@ 0x36
 80208f2:	f7fa fb25 	bl	801af40 <pbuf_alloc>
 80208f6:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 80208f8:	693b      	ldr	r3, [r7, #16]
 80208fa:	2b00      	cmp	r3, #0
 80208fc:	f000 80ba 	beq.w	8020a74 <tcp_split_unsent_seg+0x244>
                ("tcp_split_unsent_seg: could not allocate memory for pbuf remainder %u\n", remainder));
    goto memerr;
  }

  /* Offset into the original pbuf is past TCP/IP headers, options, and split amount */
  offset = useg->p->tot_len - useg->len + split;
 8020900:	697b      	ldr	r3, [r7, #20]
 8020902:	685b      	ldr	r3, [r3, #4]
 8020904:	891a      	ldrh	r2, [r3, #8]
 8020906:	697b      	ldr	r3, [r7, #20]
 8020908:	891b      	ldrh	r3, [r3, #8]
 802090a:	1ad3      	subs	r3, r2, r3
 802090c:	b29a      	uxth	r2, r3
 802090e:	887b      	ldrh	r3, [r7, #2]
 8020910:	4413      	add	r3, r2
 8020912:	817b      	strh	r3, [r7, #10]
  /* Copy remainder into new pbuf, headers and options will not be filled out */
  if (pbuf_copy_partial(useg->p, (u8_t *)p->payload + optlen, remainder, offset ) != remainder) {
 8020914:	697b      	ldr	r3, [r7, #20]
 8020916:	6858      	ldr	r0, [r3, #4]
 8020918:	693b      	ldr	r3, [r7, #16]
 802091a:	685a      	ldr	r2, [r3, #4]
 802091c:	7bbb      	ldrb	r3, [r7, #14]
 802091e:	18d1      	adds	r1, r2, r3
 8020920:	897b      	ldrh	r3, [r7, #10]
 8020922:	89ba      	ldrh	r2, [r7, #12]
 8020924:	f7fb f828 	bl	801b978 <pbuf_copy_partial>
 8020928:	4603      	mov	r3, r0
 802092a:	461a      	mov	r2, r3
 802092c:	89bb      	ldrh	r3, [r7, #12]
 802092e:	4293      	cmp	r3, r2
 8020930:	f040 80a2 	bne.w	8020a78 <tcp_split_unsent_seg+0x248>
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Options are created when calling tcp_output() */

  /* Migrate flags from original segment */
  split_flags = TCPH_FLAGS(useg->tcphdr);
 8020934:	697b      	ldr	r3, [r7, #20]
 8020936:	691b      	ldr	r3, [r3, #16]
 8020938:	899b      	ldrh	r3, [r3, #12]
 802093a:	b29b      	uxth	r3, r3
 802093c:	4618      	mov	r0, r3
 802093e:	f7f9 f933 	bl	8019ba8 <lwip_htons>
 8020942:	4603      	mov	r3, r0
 8020944:	b2db      	uxtb	r3, r3
 8020946:	f003 033f 	and.w	r3, r3, #63	@ 0x3f
 802094a:	77fb      	strb	r3, [r7, #31]
  remainder_flags = 0; /* ACK added in tcp_output() */
 802094c:	2300      	movs	r3, #0
 802094e:	77bb      	strb	r3, [r7, #30]

  if (split_flags & TCP_PSH) {
 8020950:	7ffb      	ldrb	r3, [r7, #31]
 8020952:	f003 0308 	and.w	r3, r3, #8
 8020956:	2b00      	cmp	r3, #0
 8020958:	d007      	beq.n	802096a <tcp_split_unsent_seg+0x13a>
    split_flags &= ~TCP_PSH;
 802095a:	7ffb      	ldrb	r3, [r7, #31]
 802095c:	f023 0308 	bic.w	r3, r3, #8
 8020960:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_PSH;
 8020962:	7fbb      	ldrb	r3, [r7, #30]
 8020964:	f043 0308 	orr.w	r3, r3, #8
 8020968:	77bb      	strb	r3, [r7, #30]
  }
  if (split_flags & TCP_FIN) {
 802096a:	7ffb      	ldrb	r3, [r7, #31]
 802096c:	f003 0301 	and.w	r3, r3, #1
 8020970:	2b00      	cmp	r3, #0
 8020972:	d007      	beq.n	8020984 <tcp_split_unsent_seg+0x154>
    split_flags &= ~TCP_FIN;
 8020974:	7ffb      	ldrb	r3, [r7, #31]
 8020976:	f023 0301 	bic.w	r3, r3, #1
 802097a:	77fb      	strb	r3, [r7, #31]
    remainder_flags |= TCP_FIN;
 802097c:	7fbb      	ldrb	r3, [r7, #30]
 802097e:	f043 0301 	orr.w	r3, r3, #1
 8020982:	77bb      	strb	r3, [r7, #30]
  }
  /* SYN should be left on split, RST should not be present with data */

  seg = tcp_create_segment(pcb, p, remainder_flags, lwip_ntohl(useg->tcphdr->seqno) + split, optflags);
 8020984:	697b      	ldr	r3, [r7, #20]
 8020986:	691b      	ldr	r3, [r3, #16]
 8020988:	685b      	ldr	r3, [r3, #4]
 802098a:	4618      	mov	r0, r3
 802098c:	f7f9 f921 	bl	8019bd2 <lwip_htonl>
 8020990:	4602      	mov	r2, r0
 8020992:	887b      	ldrh	r3, [r7, #2]
 8020994:	18d1      	adds	r1, r2, r3
 8020996:	7fba      	ldrb	r2, [r7, #30]
 8020998:	7bfb      	ldrb	r3, [r7, #15]
 802099a:	9300      	str	r3, [sp, #0]
 802099c:	460b      	mov	r3, r1
 802099e:	6939      	ldr	r1, [r7, #16]
 80209a0:	6878      	ldr	r0, [r7, #4]
 80209a2:	f7ff f9f1 	bl	801fd88 <tcp_create_segment>
 80209a6:	61b8      	str	r0, [r7, #24]
  if (seg == NULL) {
 80209a8:	69bb      	ldr	r3, [r7, #24]
 80209aa:	2b00      	cmp	r3, #0
 80209ac:	d066      	beq.n	8020a7c <tcp_split_unsent_seg+0x24c>
  seg->chksum_swapped = chksum_swapped;
  seg->flags |= TF_SEG_DATA_CHECKSUMMED;
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Remove this segment from the queue since trimming it may free pbufs */
  pcb->snd_queuelen -= pbuf_clen(useg->p);
 80209ae:	697b      	ldr	r3, [r7, #20]
 80209b0:	685b      	ldr	r3, [r3, #4]
 80209b2:	4618      	mov	r0, r3
 80209b4:	f7fa fe68 	bl	801b688 <pbuf_clen>
 80209b8:	4603      	mov	r3, r0
 80209ba:	461a      	mov	r2, r3
 80209bc:	687b      	ldr	r3, [r7, #4]
 80209be:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 80209c2:	1a9b      	subs	r3, r3, r2
 80209c4:	b29a      	uxth	r2, r3
 80209c6:	687b      	ldr	r3, [r7, #4]
 80209c8:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Trim the original pbuf into our split size.  At this point our remainder segment must be setup
  successfully because we are modifying the original segment */
  pbuf_realloc(useg->p, useg->p->tot_len - remainder);
 80209cc:	697b      	ldr	r3, [r7, #20]
 80209ce:	6858      	ldr	r0, [r3, #4]
 80209d0:	697b      	ldr	r3, [r7, #20]
 80209d2:	685b      	ldr	r3, [r3, #4]
 80209d4:	891a      	ldrh	r2, [r3, #8]
 80209d6:	89bb      	ldrh	r3, [r7, #12]
 80209d8:	1ad3      	subs	r3, r2, r3
 80209da:	b29b      	uxth	r3, r3
 80209dc:	4619      	mov	r1, r3
 80209de:	f7fa fc0f 	bl	801b200 <pbuf_realloc>
  useg->len -= remainder;
 80209e2:	697b      	ldr	r3, [r7, #20]
 80209e4:	891a      	ldrh	r2, [r3, #8]
 80209e6:	89bb      	ldrh	r3, [r7, #12]
 80209e8:	1ad3      	subs	r3, r2, r3
 80209ea:	b29a      	uxth	r2, r3
 80209ec:	697b      	ldr	r3, [r7, #20]
 80209ee:	811a      	strh	r2, [r3, #8]
  TCPH_SET_FLAG(useg->tcphdr, split_flags);
 80209f0:	697b      	ldr	r3, [r7, #20]
 80209f2:	691b      	ldr	r3, [r3, #16]
 80209f4:	899b      	ldrh	r3, [r3, #12]
 80209f6:	b29c      	uxth	r4, r3
 80209f8:	7ffb      	ldrb	r3, [r7, #31]
 80209fa:	b29b      	uxth	r3, r3
 80209fc:	4618      	mov	r0, r3
 80209fe:	f7f9 f8d3 	bl	8019ba8 <lwip_htons>
 8020a02:	4603      	mov	r3, r0
 8020a04:	461a      	mov	r2, r3
 8020a06:	697b      	ldr	r3, [r7, #20]
 8020a08:	691b      	ldr	r3, [r3, #16]
 8020a0a:	4322      	orrs	r2, r4
 8020a0c:	b292      	uxth	r2, r2
 8020a0e:	819a      	strh	r2, [r3, #12]
#if TCP_OVERSIZE_DBGCHECK
  /* By trimming, realloc may have actually shrunk the pbuf, so clear oversize_left */
  useg->oversize_left = 0;
 8020a10:	697b      	ldr	r3, [r7, #20]
 8020a12:	2200      	movs	r2, #0
 8020a14:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */

  /* Add back to the queue with new trimmed pbuf */
  pcb->snd_queuelen += pbuf_clen(useg->p);
 8020a16:	697b      	ldr	r3, [r7, #20]
 8020a18:	685b      	ldr	r3, [r3, #4]
 8020a1a:	4618      	mov	r0, r3
 8020a1c:	f7fa fe34 	bl	801b688 <pbuf_clen>
 8020a20:	4603      	mov	r3, r0
 8020a22:	461a      	mov	r2, r3
 8020a24:	687b      	ldr	r3, [r7, #4]
 8020a26:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020a2a:	4413      	add	r3, r2
 8020a2c:	b29a      	uxth	r2, r3
 8020a2e:	687b      	ldr	r3, [r7, #4]
 8020a30:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
#endif /* TCP_CHECKSUM_ON_COPY */

  /* Update number of segments on the queues. Note that length now may
   * exceed TCP_SND_QUEUELEN! We don't have to touch pcb->snd_buf
   * because the total amount of data is constant when packet is split */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 8020a34:	69bb      	ldr	r3, [r7, #24]
 8020a36:	685b      	ldr	r3, [r3, #4]
 8020a38:	4618      	mov	r0, r3
 8020a3a:	f7fa fe25 	bl	801b688 <pbuf_clen>
 8020a3e:	4603      	mov	r3, r0
 8020a40:	461a      	mov	r2, r3
 8020a42:	687b      	ldr	r3, [r7, #4]
 8020a44:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020a48:	4413      	add	r3, r2
 8020a4a:	b29a      	uxth	r2, r3
 8020a4c:	687b      	ldr	r3, [r7, #4]
 8020a4e:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66

  /* Finally insert remainder into queue after split (which stays head) */
  seg->next = useg->next;
 8020a52:	697b      	ldr	r3, [r7, #20]
 8020a54:	681a      	ldr	r2, [r3, #0]
 8020a56:	69bb      	ldr	r3, [r7, #24]
 8020a58:	601a      	str	r2, [r3, #0]
  useg->next = seg;
 8020a5a:	697b      	ldr	r3, [r7, #20]
 8020a5c:	69ba      	ldr	r2, [r7, #24]
 8020a5e:	601a      	str	r2, [r3, #0]

#if TCP_OVERSIZE
  /* If remainder is last segment on the unsent, ensure we clear the oversize amount
   * because the remainder is always sized to the exact remaining amount */
  if (seg->next == NULL) {
 8020a60:	69bb      	ldr	r3, [r7, #24]
 8020a62:	681b      	ldr	r3, [r3, #0]
 8020a64:	2b00      	cmp	r3, #0
 8020a66:	d103      	bne.n	8020a70 <tcp_split_unsent_seg+0x240>
    pcb->unsent_oversize = 0;
 8020a68:	687b      	ldr	r3, [r7, #4]
 8020a6a:	2200      	movs	r2, #0
 8020a6c:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  return ERR_OK;
 8020a70:	2300      	movs	r3, #0
 8020a72:	e016      	b.n	8020aa2 <tcp_split_unsent_seg+0x272>
    goto memerr;
 8020a74:	bf00      	nop
 8020a76:	e002      	b.n	8020a7e <tcp_split_unsent_seg+0x24e>
    goto memerr;
 8020a78:	bf00      	nop
 8020a7a:	e000      	b.n	8020a7e <tcp_split_unsent_seg+0x24e>
    goto memerr;
 8020a7c:	bf00      	nop
memerr:
  TCP_STATS_INC(tcp.memerr);

  LWIP_ASSERT("seg == NULL", seg == NULL);
 8020a7e:	69bb      	ldr	r3, [r7, #24]
 8020a80:	2b00      	cmp	r3, #0
 8020a82:	d006      	beq.n	8020a92 <tcp_split_unsent_seg+0x262>
 8020a84:	4b09      	ldr	r3, [pc, #36]	@ (8020aac <tcp_split_unsent_seg+0x27c>)
 8020a86:	f44f 7276 	mov.w	r2, #984	@ 0x3d8
 8020a8a:	490e      	ldr	r1, [pc, #56]	@ (8020ac4 <tcp_split_unsent_seg+0x294>)
 8020a8c:	4809      	ldr	r0, [pc, #36]	@ (8020ab4 <tcp_split_unsent_seg+0x284>)
 8020a8e:	f009 ffe5 	bl	802aa5c <iprintf>
  if (p != NULL) {
 8020a92:	693b      	ldr	r3, [r7, #16]
 8020a94:	2b00      	cmp	r3, #0
 8020a96:	d002      	beq.n	8020a9e <tcp_split_unsent_seg+0x26e>
    pbuf_free(p);
 8020a98:	6938      	ldr	r0, [r7, #16]
 8020a9a:	f7fa fd67 	bl	801b56c <pbuf_free>
  }

  return ERR_MEM;
 8020a9e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8020aa2:	4618      	mov	r0, r3
 8020aa4:	3724      	adds	r7, #36	@ 0x24
 8020aa6:	46bd      	mov	sp, r7
 8020aa8:	bd90      	pop	{r4, r7, pc}
 8020aaa:	bf00      	nop
 8020aac:	08030408 	.word	0x08030408
 8020ab0:	080307f8 	.word	0x080307f8
 8020ab4:	0803045c 	.word	0x0803045c
 8020ab8:	0803081c 	.word	0x0803081c
 8020abc:	08030840 	.word	0x08030840
 8020ac0:	08030850 	.word	0x08030850
 8020ac4:	08030860 	.word	0x08030860

08020ac8 <tcp_send_fin>:
 * @param pcb the tcp_pcb over which to send a segment
 * @return ERR_OK if sent, another err_t otherwise
 */
err_t
tcp_send_fin(struct tcp_pcb *pcb)
{
 8020ac8:	b590      	push	{r4, r7, lr}
 8020aca:	b085      	sub	sp, #20
 8020acc:	af00      	add	r7, sp, #0
 8020ace:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_send_fin: invalid pcb", pcb != NULL);
 8020ad0:	687b      	ldr	r3, [r7, #4]
 8020ad2:	2b00      	cmp	r3, #0
 8020ad4:	d106      	bne.n	8020ae4 <tcp_send_fin+0x1c>
 8020ad6:	4b21      	ldr	r3, [pc, #132]	@ (8020b5c <tcp_send_fin+0x94>)
 8020ad8:	f240 32eb 	movw	r2, #1003	@ 0x3eb
 8020adc:	4920      	ldr	r1, [pc, #128]	@ (8020b60 <tcp_send_fin+0x98>)
 8020ade:	4821      	ldr	r0, [pc, #132]	@ (8020b64 <tcp_send_fin+0x9c>)
 8020ae0:	f009 ffbc 	bl	802aa5c <iprintf>

  /* first, try to add the fin to the last unsent segment */
  if (pcb->unsent != NULL) {
 8020ae4:	687b      	ldr	r3, [r7, #4]
 8020ae6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020ae8:	2b00      	cmp	r3, #0
 8020aea:	d02e      	beq.n	8020b4a <tcp_send_fin+0x82>
    struct tcp_seg *last_unsent;
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 8020aec:	687b      	ldr	r3, [r7, #4]
 8020aee:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020af0:	60fb      	str	r3, [r7, #12]
 8020af2:	e002      	b.n	8020afa <tcp_send_fin+0x32>
         last_unsent = last_unsent->next);
 8020af4:	68fb      	ldr	r3, [r7, #12]
 8020af6:	681b      	ldr	r3, [r3, #0]
 8020af8:	60fb      	str	r3, [r7, #12]
    for (last_unsent = pcb->unsent; last_unsent->next != NULL;
 8020afa:	68fb      	ldr	r3, [r7, #12]
 8020afc:	681b      	ldr	r3, [r3, #0]
 8020afe:	2b00      	cmp	r3, #0
 8020b00:	d1f8      	bne.n	8020af4 <tcp_send_fin+0x2c>

    if ((TCPH_FLAGS(last_unsent->tcphdr) & (TCP_SYN | TCP_FIN | TCP_RST)) == 0) {
 8020b02:	68fb      	ldr	r3, [r7, #12]
 8020b04:	691b      	ldr	r3, [r3, #16]
 8020b06:	899b      	ldrh	r3, [r3, #12]
 8020b08:	b29b      	uxth	r3, r3
 8020b0a:	4618      	mov	r0, r3
 8020b0c:	f7f9 f84c 	bl	8019ba8 <lwip_htons>
 8020b10:	4603      	mov	r3, r0
 8020b12:	b2db      	uxtb	r3, r3
 8020b14:	f003 0307 	and.w	r3, r3, #7
 8020b18:	2b00      	cmp	r3, #0
 8020b1a:	d116      	bne.n	8020b4a <tcp_send_fin+0x82>
      /* no SYN/FIN/RST flag in the header, we can add the FIN flag */
      TCPH_SET_FLAG(last_unsent->tcphdr, TCP_FIN);
 8020b1c:	68fb      	ldr	r3, [r7, #12]
 8020b1e:	691b      	ldr	r3, [r3, #16]
 8020b20:	899b      	ldrh	r3, [r3, #12]
 8020b22:	b29c      	uxth	r4, r3
 8020b24:	2001      	movs	r0, #1
 8020b26:	f7f9 f83f 	bl	8019ba8 <lwip_htons>
 8020b2a:	4603      	mov	r3, r0
 8020b2c:	461a      	mov	r2, r3
 8020b2e:	68fb      	ldr	r3, [r7, #12]
 8020b30:	691b      	ldr	r3, [r3, #16]
 8020b32:	4322      	orrs	r2, r4
 8020b34:	b292      	uxth	r2, r2
 8020b36:	819a      	strh	r2, [r3, #12]
      tcp_set_flags(pcb, TF_FIN);
 8020b38:	687b      	ldr	r3, [r7, #4]
 8020b3a:	8b5b      	ldrh	r3, [r3, #26]
 8020b3c:	f043 0320 	orr.w	r3, r3, #32
 8020b40:	b29a      	uxth	r2, r3
 8020b42:	687b      	ldr	r3, [r7, #4]
 8020b44:	835a      	strh	r2, [r3, #26]
      return ERR_OK;
 8020b46:	2300      	movs	r3, #0
 8020b48:	e004      	b.n	8020b54 <tcp_send_fin+0x8c>
    }
  }
  /* no data, no length, flags, copy=1, no optdata */
  return tcp_enqueue_flags(pcb, TCP_FIN);
 8020b4a:	2101      	movs	r1, #1
 8020b4c:	6878      	ldr	r0, [r7, #4]
 8020b4e:	f000 f80b 	bl	8020b68 <tcp_enqueue_flags>
 8020b52:	4603      	mov	r3, r0
}
 8020b54:	4618      	mov	r0, r3
 8020b56:	3714      	adds	r7, #20
 8020b58:	46bd      	mov	sp, r7
 8020b5a:	bd90      	pop	{r4, r7, pc}
 8020b5c:	08030408 	.word	0x08030408
 8020b60:	0803086c 	.word	0x0803086c
 8020b64:	0803045c 	.word	0x0803045c

08020b68 <tcp_enqueue_flags>:
 * @param pcb Protocol control block for the TCP connection.
 * @param flags TCP header flags to set in the outgoing segment.
 */
err_t
tcp_enqueue_flags(struct tcp_pcb *pcb, u8_t flags)
{
 8020b68:	b580      	push	{r7, lr}
 8020b6a:	b088      	sub	sp, #32
 8020b6c:	af02      	add	r7, sp, #8
 8020b6e:	6078      	str	r0, [r7, #4]
 8020b70:	460b      	mov	r3, r1
 8020b72:	70fb      	strb	r3, [r7, #3]
  struct pbuf *p;
  struct tcp_seg *seg;
  u8_t optflags = 0;
 8020b74:	2300      	movs	r3, #0
 8020b76:	75fb      	strb	r3, [r7, #23]
  u8_t optlen = 0;
 8020b78:	2300      	movs	r3, #0
 8020b7a:	75bb      	strb	r3, [r7, #22]

  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen));

  LWIP_ASSERT("tcp_enqueue_flags: need either TCP_SYN or TCP_FIN in flags (programmer violates API)",
 8020b7c:	78fb      	ldrb	r3, [r7, #3]
 8020b7e:	f003 0303 	and.w	r3, r3, #3
 8020b82:	2b00      	cmp	r3, #0
 8020b84:	d106      	bne.n	8020b94 <tcp_enqueue_flags+0x2c>
 8020b86:	4b67      	ldr	r3, [pc, #412]	@ (8020d24 <tcp_enqueue_flags+0x1bc>)
 8020b88:	f240 4211 	movw	r2, #1041	@ 0x411
 8020b8c:	4966      	ldr	r1, [pc, #408]	@ (8020d28 <tcp_enqueue_flags+0x1c0>)
 8020b8e:	4867      	ldr	r0, [pc, #412]	@ (8020d2c <tcp_enqueue_flags+0x1c4>)
 8020b90:	f009 ff64 	bl	802aa5c <iprintf>
              (flags & (TCP_SYN | TCP_FIN)) != 0);
  LWIP_ASSERT("tcp_enqueue_flags: invalid pcb", pcb != NULL);
 8020b94:	687b      	ldr	r3, [r7, #4]
 8020b96:	2b00      	cmp	r3, #0
 8020b98:	d106      	bne.n	8020ba8 <tcp_enqueue_flags+0x40>
 8020b9a:	4b62      	ldr	r3, [pc, #392]	@ (8020d24 <tcp_enqueue_flags+0x1bc>)
 8020b9c:	f240 4213 	movw	r2, #1043	@ 0x413
 8020ba0:	4963      	ldr	r1, [pc, #396]	@ (8020d30 <tcp_enqueue_flags+0x1c8>)
 8020ba2:	4862      	ldr	r0, [pc, #392]	@ (8020d2c <tcp_enqueue_flags+0x1c4>)
 8020ba4:	f009 ff5a 	bl	802aa5c <iprintf>

  /* No need to check pcb->snd_queuelen if only SYN or FIN are allowed! */

  /* Get options for this segment. This is a special case since this is the
     only place where a SYN can be sent. */
  if (flags & TCP_SYN) {
 8020ba8:	78fb      	ldrb	r3, [r7, #3]
 8020baa:	f003 0302 	and.w	r3, r3, #2
 8020bae:	2b00      	cmp	r3, #0
 8020bb0:	d001      	beq.n	8020bb6 <tcp_enqueue_flags+0x4e>
    optflags = TF_SEG_OPTS_MSS;
 8020bb2:	2301      	movs	r3, #1
 8020bb4:	75fb      	strb	r3, [r7, #23]
    /* Make sure the timestamp option is only included in data segments if we
       agreed about it with the remote host (and in active open SYN segments). */
    optflags |= TF_SEG_OPTS_TS;
  }
#endif /* LWIP_TCP_TIMESTAMPS */
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 8020bb6:	7dfb      	ldrb	r3, [r7, #23]
 8020bb8:	009b      	lsls	r3, r3, #2
 8020bba:	b2db      	uxtb	r3, r3
 8020bbc:	f003 0304 	and.w	r3, r3, #4
 8020bc0:	75bb      	strb	r3, [r7, #22]

  /* Allocate pbuf with room for TCP header + options */
  if ((p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) {
 8020bc2:	7dbb      	ldrb	r3, [r7, #22]
 8020bc4:	b29b      	uxth	r3, r3
 8020bc6:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8020bca:	4619      	mov	r1, r3
 8020bcc:	2036      	movs	r0, #54	@ 0x36
 8020bce:	f7fa f9b7 	bl	801af40 <pbuf_alloc>
 8020bd2:	60f8      	str	r0, [r7, #12]
 8020bd4:	68fb      	ldr	r3, [r7, #12]
 8020bd6:	2b00      	cmp	r3, #0
 8020bd8:	d109      	bne.n	8020bee <tcp_enqueue_flags+0x86>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 8020bda:	687b      	ldr	r3, [r7, #4]
 8020bdc:	8b5b      	ldrh	r3, [r3, #26]
 8020bde:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 8020be2:	b29a      	uxth	r2, r3
 8020be4:	687b      	ldr	r3, [r7, #4]
 8020be6:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 8020be8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8020bec:	e095      	b.n	8020d1a <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("tcp_enqueue_flags: check that first pbuf can hold optlen",
 8020bee:	68fb      	ldr	r3, [r7, #12]
 8020bf0:	895a      	ldrh	r2, [r3, #10]
 8020bf2:	7dbb      	ldrb	r3, [r7, #22]
 8020bf4:	b29b      	uxth	r3, r3
 8020bf6:	429a      	cmp	r2, r3
 8020bf8:	d206      	bcs.n	8020c08 <tcp_enqueue_flags+0xa0>
 8020bfa:	4b4a      	ldr	r3, [pc, #296]	@ (8020d24 <tcp_enqueue_flags+0x1bc>)
 8020bfc:	f240 4239 	movw	r2, #1081	@ 0x439
 8020c00:	494c      	ldr	r1, [pc, #304]	@ (8020d34 <tcp_enqueue_flags+0x1cc>)
 8020c02:	484a      	ldr	r0, [pc, #296]	@ (8020d2c <tcp_enqueue_flags+0x1c4>)
 8020c04:	f009 ff2a 	bl	802aa5c <iprintf>
              (p->len >= optlen));

  /* Allocate memory for tcp_seg, and fill in fields. */
  if ((seg = tcp_create_segment(pcb, p, flags, pcb->snd_lbb, optflags)) == NULL) {
 8020c08:	687b      	ldr	r3, [r7, #4]
 8020c0a:	6dd9      	ldr	r1, [r3, #92]	@ 0x5c
 8020c0c:	78fa      	ldrb	r2, [r7, #3]
 8020c0e:	7dfb      	ldrb	r3, [r7, #23]
 8020c10:	9300      	str	r3, [sp, #0]
 8020c12:	460b      	mov	r3, r1
 8020c14:	68f9      	ldr	r1, [r7, #12]
 8020c16:	6878      	ldr	r0, [r7, #4]
 8020c18:	f7ff f8b6 	bl	801fd88 <tcp_create_segment>
 8020c1c:	60b8      	str	r0, [r7, #8]
 8020c1e:	68bb      	ldr	r3, [r7, #8]
 8020c20:	2b00      	cmp	r3, #0
 8020c22:	d109      	bne.n	8020c38 <tcp_enqueue_flags+0xd0>
    tcp_set_flags(pcb, TF_NAGLEMEMERR);
 8020c24:	687b      	ldr	r3, [r7, #4]
 8020c26:	8b5b      	ldrh	r3, [r3, #26]
 8020c28:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 8020c2c:	b29a      	uxth	r2, r3
 8020c2e:	687b      	ldr	r3, [r7, #4]
 8020c30:	835a      	strh	r2, [r3, #26]
    TCP_STATS_INC(tcp.memerr);
    return ERR_MEM;
 8020c32:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8020c36:	e070      	b.n	8020d1a <tcp_enqueue_flags+0x1b2>
  }
  LWIP_ASSERT("seg->tcphdr not aligned", ((mem_ptr_t)seg->tcphdr % LWIP_MIN(MEM_ALIGNMENT, 4)) == 0);
 8020c38:	68bb      	ldr	r3, [r7, #8]
 8020c3a:	691b      	ldr	r3, [r3, #16]
 8020c3c:	f003 0303 	and.w	r3, r3, #3
 8020c40:	2b00      	cmp	r3, #0
 8020c42:	d006      	beq.n	8020c52 <tcp_enqueue_flags+0xea>
 8020c44:	4b37      	ldr	r3, [pc, #220]	@ (8020d24 <tcp_enqueue_flags+0x1bc>)
 8020c46:	f240 4242 	movw	r2, #1090	@ 0x442
 8020c4a:	493b      	ldr	r1, [pc, #236]	@ (8020d38 <tcp_enqueue_flags+0x1d0>)
 8020c4c:	4837      	ldr	r0, [pc, #220]	@ (8020d2c <tcp_enqueue_flags+0x1c4>)
 8020c4e:	f009 ff05 	bl	802aa5c <iprintf>
  LWIP_ASSERT("tcp_enqueue_flags: invalid segment length", seg->len == 0);
 8020c52:	68bb      	ldr	r3, [r7, #8]
 8020c54:	891b      	ldrh	r3, [r3, #8]
 8020c56:	2b00      	cmp	r3, #0
 8020c58:	d006      	beq.n	8020c68 <tcp_enqueue_flags+0x100>
 8020c5a:	4b32      	ldr	r3, [pc, #200]	@ (8020d24 <tcp_enqueue_flags+0x1bc>)
 8020c5c:	f240 4243 	movw	r2, #1091	@ 0x443
 8020c60:	4936      	ldr	r1, [pc, #216]	@ (8020d3c <tcp_enqueue_flags+0x1d4>)
 8020c62:	4832      	ldr	r0, [pc, #200]	@ (8020d2c <tcp_enqueue_flags+0x1c4>)
 8020c64:	f009 fefa 	bl	802aa5c <iprintf>
               lwip_ntohl(seg->tcphdr->seqno),
               lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg),
               (u16_t)flags));

  /* Now append seg to pcb->unsent queue */
  if (pcb->unsent == NULL) {
 8020c68:	687b      	ldr	r3, [r7, #4]
 8020c6a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020c6c:	2b00      	cmp	r3, #0
 8020c6e:	d103      	bne.n	8020c78 <tcp_enqueue_flags+0x110>
    pcb->unsent = seg;
 8020c70:	687b      	ldr	r3, [r7, #4]
 8020c72:	68ba      	ldr	r2, [r7, #8]
 8020c74:	66da      	str	r2, [r3, #108]	@ 0x6c
 8020c76:	e00d      	b.n	8020c94 <tcp_enqueue_flags+0x12c>
  } else {
    struct tcp_seg *useg;
    for (useg = pcb->unsent; useg->next != NULL; useg = useg->next);
 8020c78:	687b      	ldr	r3, [r7, #4]
 8020c7a:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020c7c:	613b      	str	r3, [r7, #16]
 8020c7e:	e002      	b.n	8020c86 <tcp_enqueue_flags+0x11e>
 8020c80:	693b      	ldr	r3, [r7, #16]
 8020c82:	681b      	ldr	r3, [r3, #0]
 8020c84:	613b      	str	r3, [r7, #16]
 8020c86:	693b      	ldr	r3, [r7, #16]
 8020c88:	681b      	ldr	r3, [r3, #0]
 8020c8a:	2b00      	cmp	r3, #0
 8020c8c:	d1f8      	bne.n	8020c80 <tcp_enqueue_flags+0x118>
    useg->next = seg;
 8020c8e:	693b      	ldr	r3, [r7, #16]
 8020c90:	68ba      	ldr	r2, [r7, #8]
 8020c92:	601a      	str	r2, [r3, #0]
  }
#if TCP_OVERSIZE
  /* The new unsent tail has no space */
  pcb->unsent_oversize = 0;
 8020c94:	687b      	ldr	r3, [r7, #4]
 8020c96:	2200      	movs	r2, #0
 8020c98:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
#endif /* TCP_OVERSIZE */

  /* SYN and FIN bump the sequence number */
  if ((flags & TCP_SYN) || (flags & TCP_FIN)) {
 8020c9c:	78fb      	ldrb	r3, [r7, #3]
 8020c9e:	f003 0302 	and.w	r3, r3, #2
 8020ca2:	2b00      	cmp	r3, #0
 8020ca4:	d104      	bne.n	8020cb0 <tcp_enqueue_flags+0x148>
 8020ca6:	78fb      	ldrb	r3, [r7, #3]
 8020ca8:	f003 0301 	and.w	r3, r3, #1
 8020cac:	2b00      	cmp	r3, #0
 8020cae:	d004      	beq.n	8020cba <tcp_enqueue_flags+0x152>
    pcb->snd_lbb++;
 8020cb0:	687b      	ldr	r3, [r7, #4]
 8020cb2:	6ddb      	ldr	r3, [r3, #92]	@ 0x5c
 8020cb4:	1c5a      	adds	r2, r3, #1
 8020cb6:	687b      	ldr	r3, [r7, #4]
 8020cb8:	65da      	str	r2, [r3, #92]	@ 0x5c
    /* optlen does not influence snd_buf */
  }
  if (flags & TCP_FIN) {
 8020cba:	78fb      	ldrb	r3, [r7, #3]
 8020cbc:	f003 0301 	and.w	r3, r3, #1
 8020cc0:	2b00      	cmp	r3, #0
 8020cc2:	d006      	beq.n	8020cd2 <tcp_enqueue_flags+0x16a>
    tcp_set_flags(pcb, TF_FIN);
 8020cc4:	687b      	ldr	r3, [r7, #4]
 8020cc6:	8b5b      	ldrh	r3, [r3, #26]
 8020cc8:	f043 0320 	orr.w	r3, r3, #32
 8020ccc:	b29a      	uxth	r2, r3
 8020cce:	687b      	ldr	r3, [r7, #4]
 8020cd0:	835a      	strh	r2, [r3, #26]
  }

  /* update number of segments on the queues */
  pcb->snd_queuelen += pbuf_clen(seg->p);
 8020cd2:	68bb      	ldr	r3, [r7, #8]
 8020cd4:	685b      	ldr	r3, [r3, #4]
 8020cd6:	4618      	mov	r0, r3
 8020cd8:	f7fa fcd6 	bl	801b688 <pbuf_clen>
 8020cdc:	4603      	mov	r3, r0
 8020cde:	461a      	mov	r2, r3
 8020ce0:	687b      	ldr	r3, [r7, #4]
 8020ce2:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020ce6:	4413      	add	r3, r2
 8020ce8:	b29a      	uxth	r2, r3
 8020cea:	687b      	ldr	r3, [r7, #4]
 8020cec:	f8a3 2066 	strh.w	r2, [r3, #102]	@ 0x66
  LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue_flags: %"S16_F" (after enqueued)\n", pcb->snd_queuelen));
  if (pcb->snd_queuelen != 0) {
 8020cf0:	687b      	ldr	r3, [r7, #4]
 8020cf2:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020cf6:	2b00      	cmp	r3, #0
 8020cf8:	d00e      	beq.n	8020d18 <tcp_enqueue_flags+0x1b0>
    LWIP_ASSERT("tcp_enqueue_flags: invalid queue length",
 8020cfa:	687b      	ldr	r3, [r7, #4]
 8020cfc:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020cfe:	2b00      	cmp	r3, #0
 8020d00:	d10a      	bne.n	8020d18 <tcp_enqueue_flags+0x1b0>
 8020d02:	687b      	ldr	r3, [r7, #4]
 8020d04:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020d06:	2b00      	cmp	r3, #0
 8020d08:	d106      	bne.n	8020d18 <tcp_enqueue_flags+0x1b0>
 8020d0a:	4b06      	ldr	r3, [pc, #24]	@ (8020d24 <tcp_enqueue_flags+0x1bc>)
 8020d0c:	f240 4265 	movw	r2, #1125	@ 0x465
 8020d10:	490b      	ldr	r1, [pc, #44]	@ (8020d40 <tcp_enqueue_flags+0x1d8>)
 8020d12:	4806      	ldr	r0, [pc, #24]	@ (8020d2c <tcp_enqueue_flags+0x1c4>)
 8020d14:	f009 fea2 	bl	802aa5c <iprintf>
                pcb->unacked != NULL || pcb->unsent != NULL);
  }

  return ERR_OK;
 8020d18:	2300      	movs	r3, #0
}
 8020d1a:	4618      	mov	r0, r3
 8020d1c:	3718      	adds	r7, #24
 8020d1e:	46bd      	mov	sp, r7
 8020d20:	bd80      	pop	{r7, pc}
 8020d22:	bf00      	nop
 8020d24:	08030408 	.word	0x08030408
 8020d28:	08030888 	.word	0x08030888
 8020d2c:	0803045c 	.word	0x0803045c
 8020d30:	080308e0 	.word	0x080308e0
 8020d34:	08030900 	.word	0x08030900
 8020d38:	0803093c 	.word	0x0803093c
 8020d3c:	08030954 	.word	0x08030954
 8020d40:	08030980 	.word	0x08030980

08020d44 <tcp_output>:
 * @return ERR_OK if data has been sent or nothing to send
 *         another err_t on error
 */
err_t
tcp_output(struct tcp_pcb *pcb)
{
 8020d44:	b5b0      	push	{r4, r5, r7, lr}
 8020d46:	b08a      	sub	sp, #40	@ 0x28
 8020d48:	af00      	add	r7, sp, #0
 8020d4a:	6078      	str	r0, [r7, #4]
  struct netif *netif;
#if TCP_CWND_DEBUG
  s16_t i = 0;
#endif /* TCP_CWND_DEBUG */

  LWIP_ASSERT_CORE_LOCKED();
 8020d4c:	f7f0 fa5a 	bl	8011204 <sys_check_core_locking>

  LWIP_ASSERT("tcp_output: invalid pcb", pcb != NULL);
 8020d50:	687b      	ldr	r3, [r7, #4]
 8020d52:	2b00      	cmp	r3, #0
 8020d54:	d106      	bne.n	8020d64 <tcp_output+0x20>
 8020d56:	4b8a      	ldr	r3, [pc, #552]	@ (8020f80 <tcp_output+0x23c>)
 8020d58:	f240 42e1 	movw	r2, #1249	@ 0x4e1
 8020d5c:	4989      	ldr	r1, [pc, #548]	@ (8020f84 <tcp_output+0x240>)
 8020d5e:	488a      	ldr	r0, [pc, #552]	@ (8020f88 <tcp_output+0x244>)
 8020d60:	f009 fe7c 	bl	802aa5c <iprintf>
  /* pcb->state LISTEN not allowed here */
  LWIP_ASSERT("don't call tcp_output for listen-pcbs",
 8020d64:	687b      	ldr	r3, [r7, #4]
 8020d66:	7d1b      	ldrb	r3, [r3, #20]
 8020d68:	2b01      	cmp	r3, #1
 8020d6a:	d106      	bne.n	8020d7a <tcp_output+0x36>
 8020d6c:	4b84      	ldr	r3, [pc, #528]	@ (8020f80 <tcp_output+0x23c>)
 8020d6e:	f240 42e3 	movw	r2, #1251	@ 0x4e3
 8020d72:	4986      	ldr	r1, [pc, #536]	@ (8020f8c <tcp_output+0x248>)
 8020d74:	4884      	ldr	r0, [pc, #528]	@ (8020f88 <tcp_output+0x244>)
 8020d76:	f009 fe71 	bl	802aa5c <iprintf>

  /* First, check if we are invoked by the TCP input processing
     code. If so, we do not output anything. Instead, we rely on the
     input processing code to call us when input processing is done
     with. */
  if (tcp_input_pcb == pcb) {
 8020d7a:	4b85      	ldr	r3, [pc, #532]	@ (8020f90 <tcp_output+0x24c>)
 8020d7c:	681b      	ldr	r3, [r3, #0]
 8020d7e:	687a      	ldr	r2, [r7, #4]
 8020d80:	429a      	cmp	r2, r3
 8020d82:	d101      	bne.n	8020d88 <tcp_output+0x44>
    return ERR_OK;
 8020d84:	2300      	movs	r3, #0
 8020d86:	e1d1      	b.n	802112c <tcp_output+0x3e8>
  }

  wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd);
 8020d88:	687b      	ldr	r3, [r7, #4]
 8020d8a:	f8b3 2048 	ldrh.w	r2, [r3, #72]	@ 0x48
 8020d8e:	687b      	ldr	r3, [r7, #4]
 8020d90:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 8020d94:	4293      	cmp	r3, r2
 8020d96:	bf28      	it	cs
 8020d98:	4613      	movcs	r3, r2
 8020d9a:	b29b      	uxth	r3, r3
 8020d9c:	61bb      	str	r3, [r7, #24]

  seg = pcb->unsent;
 8020d9e:	687b      	ldr	r3, [r7, #4]
 8020da0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020da2:	627b      	str	r3, [r7, #36]	@ 0x24

  if (seg == NULL) {
 8020da4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020da6:	2b00      	cmp	r3, #0
 8020da8:	d10b      	bne.n	8020dc2 <tcp_output+0x7e>
                                 ", seg == NULL, ack %"U32_F"\n",
                                 pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack));

    /* If the TF_ACK_NOW flag is set and the ->unsent queue is empty, construct
     * an empty ACK segment and send it. */
    if (pcb->flags & TF_ACK_NOW) {
 8020daa:	687b      	ldr	r3, [r7, #4]
 8020dac:	8b5b      	ldrh	r3, [r3, #26]
 8020dae:	f003 0302 	and.w	r3, r3, #2
 8020db2:	2b00      	cmp	r3, #0
 8020db4:	f000 81ad 	beq.w	8021112 <tcp_output+0x3ce>
      return tcp_send_empty_ack(pcb);
 8020db8:	6878      	ldr	r0, [r7, #4]
 8020dba:	f000 fdd7 	bl	802196c <tcp_send_empty_ack>
 8020dbe:	4603      	mov	r3, r0
 8020dc0:	e1b4      	b.n	802112c <tcp_output+0x3e8>
                 pcb->snd_wnd, pcb->cwnd, wnd,
                 lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len,
                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack));
  }

  netif = tcp_route(pcb, &pcb->local_ip, &pcb->remote_ip);
 8020dc2:	6879      	ldr	r1, [r7, #4]
 8020dc4:	687b      	ldr	r3, [r7, #4]
 8020dc6:	3304      	adds	r3, #4
 8020dc8:	461a      	mov	r2, r3
 8020dca:	6878      	ldr	r0, [r7, #4]
 8020dcc:	f7fe ffc0 	bl	801fd50 <tcp_route>
 8020dd0:	6178      	str	r0, [r7, #20]
  if (netif == NULL) {
 8020dd2:	697b      	ldr	r3, [r7, #20]
 8020dd4:	2b00      	cmp	r3, #0
 8020dd6:	d102      	bne.n	8020dde <tcp_output+0x9a>
    return ERR_RTE;
 8020dd8:	f06f 0303 	mvn.w	r3, #3
 8020ddc:	e1a6      	b.n	802112c <tcp_output+0x3e8>
  }

  /* If we don't have a local IP address, we get one from netif */
  if (ip_addr_isany(&pcb->local_ip)) {
 8020dde:	687b      	ldr	r3, [r7, #4]
 8020de0:	2b00      	cmp	r3, #0
 8020de2:	d003      	beq.n	8020dec <tcp_output+0xa8>
 8020de4:	687b      	ldr	r3, [r7, #4]
 8020de6:	681b      	ldr	r3, [r3, #0]
 8020de8:	2b00      	cmp	r3, #0
 8020dea:	d111      	bne.n	8020e10 <tcp_output+0xcc>
    const ip_addr_t *local_ip = ip_netif_get_local_ip(netif, &pcb->remote_ip);
 8020dec:	697b      	ldr	r3, [r7, #20]
 8020dee:	2b00      	cmp	r3, #0
 8020df0:	d002      	beq.n	8020df8 <tcp_output+0xb4>
 8020df2:	697b      	ldr	r3, [r7, #20]
 8020df4:	3304      	adds	r3, #4
 8020df6:	e000      	b.n	8020dfa <tcp_output+0xb6>
 8020df8:	2300      	movs	r3, #0
 8020dfa:	613b      	str	r3, [r7, #16]
    if (local_ip == NULL) {
 8020dfc:	693b      	ldr	r3, [r7, #16]
 8020dfe:	2b00      	cmp	r3, #0
 8020e00:	d102      	bne.n	8020e08 <tcp_output+0xc4>
      return ERR_RTE;
 8020e02:	f06f 0303 	mvn.w	r3, #3
 8020e06:	e191      	b.n	802112c <tcp_output+0x3e8>
    }
    ip_addr_copy(pcb->local_ip, *local_ip);
 8020e08:	693b      	ldr	r3, [r7, #16]
 8020e0a:	681a      	ldr	r2, [r3, #0]
 8020e0c:	687b      	ldr	r3, [r7, #4]
 8020e0e:	601a      	str	r2, [r3, #0]
  }

  /* Handle the current segment not fitting within the window */
  if (lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd) {
 8020e10:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020e12:	691b      	ldr	r3, [r3, #16]
 8020e14:	685b      	ldr	r3, [r3, #4]
 8020e16:	4618      	mov	r0, r3
 8020e18:	f7f8 fedb 	bl	8019bd2 <lwip_htonl>
 8020e1c:	4602      	mov	r2, r0
 8020e1e:	687b      	ldr	r3, [r7, #4]
 8020e20:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 8020e22:	1ad3      	subs	r3, r2, r3
 8020e24:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8020e26:	8912      	ldrh	r2, [r2, #8]
 8020e28:	4413      	add	r3, r2
 8020e2a:	69ba      	ldr	r2, [r7, #24]
 8020e2c:	429a      	cmp	r2, r3
 8020e2e:	d227      	bcs.n	8020e80 <tcp_output+0x13c>
     * within the remaining (could be 0) send window and RTO timer is not running (we
     * have no in-flight data). If window is still too small after persist timer fires,
     * then we split the segment. We don't consider the congestion window since a cwnd
     * smaller than 1 SMSS implies in-flight data
     */
    if (wnd == pcb->snd_wnd && pcb->unacked == NULL && pcb->persist_backoff == 0) {
 8020e30:	687b      	ldr	r3, [r7, #4]
 8020e32:	f8b3 3060 	ldrh.w	r3, [r3, #96]	@ 0x60
 8020e36:	461a      	mov	r2, r3
 8020e38:	69bb      	ldr	r3, [r7, #24]
 8020e3a:	4293      	cmp	r3, r2
 8020e3c:	d114      	bne.n	8020e68 <tcp_output+0x124>
 8020e3e:	687b      	ldr	r3, [r7, #4]
 8020e40:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020e42:	2b00      	cmp	r3, #0
 8020e44:	d110      	bne.n	8020e68 <tcp_output+0x124>
 8020e46:	687b      	ldr	r3, [r7, #4]
 8020e48:	f893 3099 	ldrb.w	r3, [r3, #153]	@ 0x99
 8020e4c:	2b00      	cmp	r3, #0
 8020e4e:	d10b      	bne.n	8020e68 <tcp_output+0x124>
      pcb->persist_cnt = 0;
 8020e50:	687b      	ldr	r3, [r7, #4]
 8020e52:	2200      	movs	r2, #0
 8020e54:	f883 2098 	strb.w	r2, [r3, #152]	@ 0x98
      pcb->persist_backoff = 1;
 8020e58:	687b      	ldr	r3, [r7, #4]
 8020e5a:	2201      	movs	r2, #1
 8020e5c:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99
      pcb->persist_probe = 0;
 8020e60:	687b      	ldr	r3, [r7, #4]
 8020e62:	2200      	movs	r2, #0
 8020e64:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
    }
    /* We need an ACK, but can't send data now, so send an empty ACK */
    if (pcb->flags & TF_ACK_NOW) {
 8020e68:	687b      	ldr	r3, [r7, #4]
 8020e6a:	8b5b      	ldrh	r3, [r3, #26]
 8020e6c:	f003 0302 	and.w	r3, r3, #2
 8020e70:	2b00      	cmp	r3, #0
 8020e72:	f000 8150 	beq.w	8021116 <tcp_output+0x3d2>
      return tcp_send_empty_ack(pcb);
 8020e76:	6878      	ldr	r0, [r7, #4]
 8020e78:	f000 fd78 	bl	802196c <tcp_send_empty_ack>
 8020e7c:	4603      	mov	r3, r0
 8020e7e:	e155      	b.n	802112c <tcp_output+0x3e8>
    }
    goto output_done;
  }
  /* Stop persist timer, above conditions are not active */
  pcb->persist_backoff = 0;
 8020e80:	687b      	ldr	r3, [r7, #4]
 8020e82:	2200      	movs	r2, #0
 8020e84:	f883 2099 	strb.w	r2, [r3, #153]	@ 0x99

  /* useg should point to last segment on unacked queue */
  useg = pcb->unacked;
 8020e88:	687b      	ldr	r3, [r7, #4]
 8020e8a:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020e8c:	623b      	str	r3, [r7, #32]
  if (useg != NULL) {
 8020e8e:	6a3b      	ldr	r3, [r7, #32]
 8020e90:	2b00      	cmp	r3, #0
 8020e92:	f000 811f 	beq.w	80210d4 <tcp_output+0x390>
    for (; useg->next != NULL; useg = useg->next);
 8020e96:	e002      	b.n	8020e9e <tcp_output+0x15a>
 8020e98:	6a3b      	ldr	r3, [r7, #32]
 8020e9a:	681b      	ldr	r3, [r3, #0]
 8020e9c:	623b      	str	r3, [r7, #32]
 8020e9e:	6a3b      	ldr	r3, [r7, #32]
 8020ea0:	681b      	ldr	r3, [r3, #0]
 8020ea2:	2b00      	cmp	r3, #0
 8020ea4:	d1f8      	bne.n	8020e98 <tcp_output+0x154>
  }
  /* data available and window allows it to be sent? */
  while (seg != NULL &&
 8020ea6:	e115      	b.n	80210d4 <tcp_output+0x390>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
    LWIP_ASSERT("RST not expected here!",
 8020ea8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020eaa:	691b      	ldr	r3, [r3, #16]
 8020eac:	899b      	ldrh	r3, [r3, #12]
 8020eae:	b29b      	uxth	r3, r3
 8020eb0:	4618      	mov	r0, r3
 8020eb2:	f7f8 fe79 	bl	8019ba8 <lwip_htons>
 8020eb6:	4603      	mov	r3, r0
 8020eb8:	b2db      	uxtb	r3, r3
 8020eba:	f003 0304 	and.w	r3, r3, #4
 8020ebe:	2b00      	cmp	r3, #0
 8020ec0:	d006      	beq.n	8020ed0 <tcp_output+0x18c>
 8020ec2:	4b2f      	ldr	r3, [pc, #188]	@ (8020f80 <tcp_output+0x23c>)
 8020ec4:	f240 5236 	movw	r2, #1334	@ 0x536
 8020ec8:	4932      	ldr	r1, [pc, #200]	@ (8020f94 <tcp_output+0x250>)
 8020eca:	482f      	ldr	r0, [pc, #188]	@ (8020f88 <tcp_output+0x244>)
 8020ecc:	f009 fdc6 	bl	802aa5c <iprintf>
     * - if tcp_write had a memory error before (prevent delayed ACK timeout) or
     * - if FIN was already enqueued for this PCB (SYN is always alone in a segment -
     *   either seg->next != NULL or pcb->unacked == NULL;
     *   RST is no sent using tcp_write/tcp_output.
     */
    if ((tcp_do_output_nagle(pcb) == 0) &&
 8020ed0:	687b      	ldr	r3, [r7, #4]
 8020ed2:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8020ed4:	2b00      	cmp	r3, #0
 8020ed6:	d01f      	beq.n	8020f18 <tcp_output+0x1d4>
 8020ed8:	687b      	ldr	r3, [r7, #4]
 8020eda:	8b5b      	ldrh	r3, [r3, #26]
 8020edc:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 8020ee0:	2b00      	cmp	r3, #0
 8020ee2:	d119      	bne.n	8020f18 <tcp_output+0x1d4>
 8020ee4:	687b      	ldr	r3, [r7, #4]
 8020ee6:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020ee8:	2b00      	cmp	r3, #0
 8020eea:	d00b      	beq.n	8020f04 <tcp_output+0x1c0>
 8020eec:	687b      	ldr	r3, [r7, #4]
 8020eee:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020ef0:	681b      	ldr	r3, [r3, #0]
 8020ef2:	2b00      	cmp	r3, #0
 8020ef4:	d110      	bne.n	8020f18 <tcp_output+0x1d4>
 8020ef6:	687b      	ldr	r3, [r7, #4]
 8020ef8:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8020efa:	891a      	ldrh	r2, [r3, #8]
 8020efc:	687b      	ldr	r3, [r7, #4]
 8020efe:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8020f00:	429a      	cmp	r2, r3
 8020f02:	d209      	bcs.n	8020f18 <tcp_output+0x1d4>
 8020f04:	687b      	ldr	r3, [r7, #4]
 8020f06:	f8b3 3064 	ldrh.w	r3, [r3, #100]	@ 0x64
 8020f0a:	2b00      	cmp	r3, #0
 8020f0c:	d004      	beq.n	8020f18 <tcp_output+0x1d4>
 8020f0e:	687b      	ldr	r3, [r7, #4]
 8020f10:	f8b3 3066 	ldrh.w	r3, [r3, #102]	@ 0x66
 8020f14:	2b0f      	cmp	r3, #15
 8020f16:	d901      	bls.n	8020f1c <tcp_output+0x1d8>
 8020f18:	2301      	movs	r3, #1
 8020f1a:	e000      	b.n	8020f1e <tcp_output+0x1da>
 8020f1c:	2300      	movs	r3, #0
 8020f1e:	2b00      	cmp	r3, #0
 8020f20:	d106      	bne.n	8020f30 <tcp_output+0x1ec>
        ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)) {
 8020f22:	687b      	ldr	r3, [r7, #4]
 8020f24:	8b5b      	ldrh	r3, [r3, #26]
 8020f26:	f003 03a0 	and.w	r3, r3, #160	@ 0xa0
    if ((tcp_do_output_nagle(pcb) == 0) &&
 8020f2a:	2b00      	cmp	r3, #0
 8020f2c:	f000 80e7 	beq.w	80210fe <tcp_output+0x3ba>
                                 pcb->lastack,
                                 lwip_ntohl(seg->tcphdr->seqno), pcb->lastack, i));
    ++i;
#endif /* TCP_CWND_DEBUG */

    if (pcb->state != SYN_SENT) {
 8020f30:	687b      	ldr	r3, [r7, #4]
 8020f32:	7d1b      	ldrb	r3, [r3, #20]
 8020f34:	2b02      	cmp	r3, #2
 8020f36:	d00d      	beq.n	8020f54 <tcp_output+0x210>
      TCPH_SET_FLAG(seg->tcphdr, TCP_ACK);
 8020f38:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020f3a:	691b      	ldr	r3, [r3, #16]
 8020f3c:	899b      	ldrh	r3, [r3, #12]
 8020f3e:	b29c      	uxth	r4, r3
 8020f40:	2010      	movs	r0, #16
 8020f42:	f7f8 fe31 	bl	8019ba8 <lwip_htons>
 8020f46:	4603      	mov	r3, r0
 8020f48:	461a      	mov	r2, r3
 8020f4a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020f4c:	691b      	ldr	r3, [r3, #16]
 8020f4e:	4322      	orrs	r2, r4
 8020f50:	b292      	uxth	r2, r2
 8020f52:	819a      	strh	r2, [r3, #12]
    }

    err = tcp_output_segment(seg, pcb, netif);
 8020f54:	697a      	ldr	r2, [r7, #20]
 8020f56:	6879      	ldr	r1, [r7, #4]
 8020f58:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8020f5a:	f000 f90b 	bl	8021174 <tcp_output_segment>
 8020f5e:	4603      	mov	r3, r0
 8020f60:	73fb      	strb	r3, [r7, #15]
    if (err != ERR_OK) {
 8020f62:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8020f66:	2b00      	cmp	r3, #0
 8020f68:	d016      	beq.n	8020f98 <tcp_output+0x254>
      /* segment could not be sent, for whatever reason */
      tcp_set_flags(pcb, TF_NAGLEMEMERR);
 8020f6a:	687b      	ldr	r3, [r7, #4]
 8020f6c:	8b5b      	ldrh	r3, [r3, #26]
 8020f6e:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 8020f72:	b29a      	uxth	r2, r3
 8020f74:	687b      	ldr	r3, [r7, #4]
 8020f76:	835a      	strh	r2, [r3, #26]
      return err;
 8020f78:	f997 300f 	ldrsb.w	r3, [r7, #15]
 8020f7c:	e0d6      	b.n	802112c <tcp_output+0x3e8>
 8020f7e:	bf00      	nop
 8020f80:	08030408 	.word	0x08030408
 8020f84:	080309a8 	.word	0x080309a8
 8020f88:	0803045c 	.word	0x0803045c
 8020f8c:	080309c0 	.word	0x080309c0
 8020f90:	2402aff8 	.word	0x2402aff8
 8020f94:	080309e8 	.word	0x080309e8
    }
#if TCP_OVERSIZE_DBGCHECK
    seg->oversize_left = 0;
 8020f98:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020f9a:	2200      	movs	r2, #0
 8020f9c:	815a      	strh	r2, [r3, #10]
#endif /* TCP_OVERSIZE_DBGCHECK */
    pcb->unsent = seg->next;
 8020f9e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020fa0:	681a      	ldr	r2, [r3, #0]
 8020fa2:	687b      	ldr	r3, [r7, #4]
 8020fa4:	66da      	str	r2, [r3, #108]	@ 0x6c
    if (pcb->state != SYN_SENT) {
 8020fa6:	687b      	ldr	r3, [r7, #4]
 8020fa8:	7d1b      	ldrb	r3, [r3, #20]
 8020faa:	2b02      	cmp	r3, #2
 8020fac:	d006      	beq.n	8020fbc <tcp_output+0x278>
      tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 8020fae:	687b      	ldr	r3, [r7, #4]
 8020fb0:	8b5b      	ldrh	r3, [r3, #26]
 8020fb2:	f023 0303 	bic.w	r3, r3, #3
 8020fb6:	b29a      	uxth	r2, r3
 8020fb8:	687b      	ldr	r3, [r7, #4]
 8020fba:	835a      	strh	r2, [r3, #26]
    }
    snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 8020fbc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020fbe:	691b      	ldr	r3, [r3, #16]
 8020fc0:	685b      	ldr	r3, [r3, #4]
 8020fc2:	4618      	mov	r0, r3
 8020fc4:	f7f8 fe05 	bl	8019bd2 <lwip_htonl>
 8020fc8:	4604      	mov	r4, r0
 8020fca:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020fcc:	891b      	ldrh	r3, [r3, #8]
 8020fce:	461d      	mov	r5, r3
 8020fd0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8020fd2:	691b      	ldr	r3, [r3, #16]
 8020fd4:	899b      	ldrh	r3, [r3, #12]
 8020fd6:	b29b      	uxth	r3, r3
 8020fd8:	4618      	mov	r0, r3
 8020fda:	f7f8 fde5 	bl	8019ba8 <lwip_htons>
 8020fde:	4603      	mov	r3, r0
 8020fe0:	b2db      	uxtb	r3, r3
 8020fe2:	f003 0303 	and.w	r3, r3, #3
 8020fe6:	2b00      	cmp	r3, #0
 8020fe8:	d001      	beq.n	8020fee <tcp_output+0x2aa>
 8020fea:	2301      	movs	r3, #1
 8020fec:	e000      	b.n	8020ff0 <tcp_output+0x2ac>
 8020fee:	2300      	movs	r3, #0
 8020ff0:	442b      	add	r3, r5
 8020ff2:	4423      	add	r3, r4
 8020ff4:	60bb      	str	r3, [r7, #8]
    if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 8020ff6:	687b      	ldr	r3, [r7, #4]
 8020ff8:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8020ffa:	68bb      	ldr	r3, [r7, #8]
 8020ffc:	1ad3      	subs	r3, r2, r3
 8020ffe:	2b00      	cmp	r3, #0
 8021000:	da02      	bge.n	8021008 <tcp_output+0x2c4>
      pcb->snd_nxt = snd_nxt;
 8021002:	687b      	ldr	r3, [r7, #4]
 8021004:	68ba      	ldr	r2, [r7, #8]
 8021006:	651a      	str	r2, [r3, #80]	@ 0x50
    }
    /* put segment on unacknowledged list if length > 0 */
    if (TCP_TCPLEN(seg) > 0) {
 8021008:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802100a:	891b      	ldrh	r3, [r3, #8]
 802100c:	461c      	mov	r4, r3
 802100e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021010:	691b      	ldr	r3, [r3, #16]
 8021012:	899b      	ldrh	r3, [r3, #12]
 8021014:	b29b      	uxth	r3, r3
 8021016:	4618      	mov	r0, r3
 8021018:	f7f8 fdc6 	bl	8019ba8 <lwip_htons>
 802101c:	4603      	mov	r3, r0
 802101e:	b2db      	uxtb	r3, r3
 8021020:	f003 0303 	and.w	r3, r3, #3
 8021024:	2b00      	cmp	r3, #0
 8021026:	d001      	beq.n	802102c <tcp_output+0x2e8>
 8021028:	2301      	movs	r3, #1
 802102a:	e000      	b.n	802102e <tcp_output+0x2ea>
 802102c:	2300      	movs	r3, #0
 802102e:	4423      	add	r3, r4
 8021030:	2b00      	cmp	r3, #0
 8021032:	d049      	beq.n	80210c8 <tcp_output+0x384>
      seg->next = NULL;
 8021034:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021036:	2200      	movs	r2, #0
 8021038:	601a      	str	r2, [r3, #0]
      /* unacked list is empty? */
      if (pcb->unacked == NULL) {
 802103a:	687b      	ldr	r3, [r7, #4]
 802103c:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 802103e:	2b00      	cmp	r3, #0
 8021040:	d105      	bne.n	802104e <tcp_output+0x30a>
        pcb->unacked = seg;
 8021042:	687b      	ldr	r3, [r7, #4]
 8021044:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8021046:	671a      	str	r2, [r3, #112]	@ 0x70
        useg = seg;
 8021048:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802104a:	623b      	str	r3, [r7, #32]
 802104c:	e03f      	b.n	80210ce <tcp_output+0x38a>
        /* unacked list is not empty? */
      } else {
        /* In the case of fast retransmit, the packet should not go to the tail
         * of the unacked queue, but rather somewhere before it. We need to check for
         * this case. -STJ Jul 27, 2004 */
        if (TCP_SEQ_LT(lwip_ntohl(seg->tcphdr->seqno), lwip_ntohl(useg->tcphdr->seqno))) {
 802104e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021050:	691b      	ldr	r3, [r3, #16]
 8021052:	685b      	ldr	r3, [r3, #4]
 8021054:	4618      	mov	r0, r3
 8021056:	f7f8 fdbc 	bl	8019bd2 <lwip_htonl>
 802105a:	4604      	mov	r4, r0
 802105c:	6a3b      	ldr	r3, [r7, #32]
 802105e:	691b      	ldr	r3, [r3, #16]
 8021060:	685b      	ldr	r3, [r3, #4]
 8021062:	4618      	mov	r0, r3
 8021064:	f7f8 fdb5 	bl	8019bd2 <lwip_htonl>
 8021068:	4603      	mov	r3, r0
 802106a:	1ae3      	subs	r3, r4, r3
 802106c:	2b00      	cmp	r3, #0
 802106e:	da24      	bge.n	80210ba <tcp_output+0x376>
          /* add segment to before tail of unacked list, keeping the list sorted */
          struct tcp_seg **cur_seg = &(pcb->unacked);
 8021070:	687b      	ldr	r3, [r7, #4]
 8021072:	3370      	adds	r3, #112	@ 0x70
 8021074:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 8021076:	e002      	b.n	802107e <tcp_output+0x33a>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
            cur_seg = &((*cur_seg)->next );
 8021078:	69fb      	ldr	r3, [r7, #28]
 802107a:	681b      	ldr	r3, [r3, #0]
 802107c:	61fb      	str	r3, [r7, #28]
          while (*cur_seg &&
 802107e:	69fb      	ldr	r3, [r7, #28]
 8021080:	681b      	ldr	r3, [r3, #0]
 8021082:	2b00      	cmp	r3, #0
 8021084:	d011      	beq.n	80210aa <tcp_output+0x366>
                 TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 8021086:	69fb      	ldr	r3, [r7, #28]
 8021088:	681b      	ldr	r3, [r3, #0]
 802108a:	691b      	ldr	r3, [r3, #16]
 802108c:	685b      	ldr	r3, [r3, #4]
 802108e:	4618      	mov	r0, r3
 8021090:	f7f8 fd9f 	bl	8019bd2 <lwip_htonl>
 8021094:	4604      	mov	r4, r0
 8021096:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021098:	691b      	ldr	r3, [r3, #16]
 802109a:	685b      	ldr	r3, [r3, #4]
 802109c:	4618      	mov	r0, r3
 802109e:	f7f8 fd98 	bl	8019bd2 <lwip_htonl>
 80210a2:	4603      	mov	r3, r0
 80210a4:	1ae3      	subs	r3, r4, r3
          while (*cur_seg &&
 80210a6:	2b00      	cmp	r3, #0
 80210a8:	dbe6      	blt.n	8021078 <tcp_output+0x334>
          }
          seg->next = (*cur_seg);
 80210aa:	69fb      	ldr	r3, [r7, #28]
 80210ac:	681a      	ldr	r2, [r3, #0]
 80210ae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80210b0:	601a      	str	r2, [r3, #0]
          (*cur_seg) = seg;
 80210b2:	69fb      	ldr	r3, [r7, #28]
 80210b4:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80210b6:	601a      	str	r2, [r3, #0]
 80210b8:	e009      	b.n	80210ce <tcp_output+0x38a>
        } else {
          /* add segment to tail of unacked list */
          useg->next = seg;
 80210ba:	6a3b      	ldr	r3, [r7, #32]
 80210bc:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80210be:	601a      	str	r2, [r3, #0]
          useg = useg->next;
 80210c0:	6a3b      	ldr	r3, [r7, #32]
 80210c2:	681b      	ldr	r3, [r3, #0]
 80210c4:	623b      	str	r3, [r7, #32]
 80210c6:	e002      	b.n	80210ce <tcp_output+0x38a>
        }
      }
      /* do not queue empty segments on the unacked list */
    } else {
      tcp_seg_free(seg);
 80210c8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 80210ca:	f7fb fea8 	bl	801ce1e <tcp_seg_free>
    }
    seg = pcb->unsent;
 80210ce:	687b      	ldr	r3, [r7, #4]
 80210d0:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80210d2:	627b      	str	r3, [r7, #36]	@ 0x24
  while (seg != NULL &&
 80210d4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80210d6:	2b00      	cmp	r3, #0
 80210d8:	d012      	beq.n	8021100 <tcp_output+0x3bc>
         lwip_ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) {
 80210da:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80210dc:	691b      	ldr	r3, [r3, #16]
 80210de:	685b      	ldr	r3, [r3, #4]
 80210e0:	4618      	mov	r0, r3
 80210e2:	f7f8 fd76 	bl	8019bd2 <lwip_htonl>
 80210e6:	4602      	mov	r2, r0
 80210e8:	687b      	ldr	r3, [r7, #4]
 80210ea:	6c5b      	ldr	r3, [r3, #68]	@ 0x44
 80210ec:	1ad3      	subs	r3, r2, r3
 80210ee:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80210f0:	8912      	ldrh	r2, [r2, #8]
 80210f2:	4413      	add	r3, r2
  while (seg != NULL &&
 80210f4:	69ba      	ldr	r2, [r7, #24]
 80210f6:	429a      	cmp	r2, r3
 80210f8:	f4bf aed6 	bcs.w	8020ea8 <tcp_output+0x164>
 80210fc:	e000      	b.n	8021100 <tcp_output+0x3bc>
      break;
 80210fe:	bf00      	nop
  }
#if TCP_OVERSIZE
  if (pcb->unsent == NULL) {
 8021100:	687b      	ldr	r3, [r7, #4]
 8021102:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8021104:	2b00      	cmp	r3, #0
 8021106:	d108      	bne.n	802111a <tcp_output+0x3d6>
    /* last unsent has been removed, reset unsent_oversize */
    pcb->unsent_oversize = 0;
 8021108:	687b      	ldr	r3, [r7, #4]
 802110a:	2200      	movs	r2, #0
 802110c:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
 8021110:	e004      	b.n	802111c <tcp_output+0x3d8>
    goto output_done;
 8021112:	bf00      	nop
 8021114:	e002      	b.n	802111c <tcp_output+0x3d8>
    goto output_done;
 8021116:	bf00      	nop
 8021118:	e000      	b.n	802111c <tcp_output+0x3d8>
  }
#endif /* TCP_OVERSIZE */

output_done:
 802111a:	bf00      	nop
  tcp_clear_flags(pcb, TF_NAGLEMEMERR);
 802111c:	687b      	ldr	r3, [r7, #4]
 802111e:	8b5b      	ldrh	r3, [r3, #26]
 8021120:	f023 0380 	bic.w	r3, r3, #128	@ 0x80
 8021124:	b29a      	uxth	r2, r3
 8021126:	687b      	ldr	r3, [r7, #4]
 8021128:	835a      	strh	r2, [r3, #26]
  return ERR_OK;
 802112a:	2300      	movs	r3, #0
}
 802112c:	4618      	mov	r0, r3
 802112e:	3728      	adds	r7, #40	@ 0x28
 8021130:	46bd      	mov	sp, r7
 8021132:	bdb0      	pop	{r4, r5, r7, pc}

08021134 <tcp_output_segment_busy>:
 * @arg seg the tcp segment to check
 * @return 1 if ref != 1, 0 if ref == 1
 */
static int
tcp_output_segment_busy(const struct tcp_seg *seg)
{
 8021134:	b580      	push	{r7, lr}
 8021136:	b082      	sub	sp, #8
 8021138:	af00      	add	r7, sp, #0
 802113a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_output_segment_busy: invalid seg", seg != NULL);
 802113c:	687b      	ldr	r3, [r7, #4]
 802113e:	2b00      	cmp	r3, #0
 8021140:	d106      	bne.n	8021150 <tcp_output_segment_busy+0x1c>
 8021142:	4b09      	ldr	r3, [pc, #36]	@ (8021168 <tcp_output_segment_busy+0x34>)
 8021144:	f240 529a 	movw	r2, #1434	@ 0x59a
 8021148:	4908      	ldr	r1, [pc, #32]	@ (802116c <tcp_output_segment_busy+0x38>)
 802114a:	4809      	ldr	r0, [pc, #36]	@ (8021170 <tcp_output_segment_busy+0x3c>)
 802114c:	f009 fc86 	bl	802aa5c <iprintf>

  /* We only need to check the first pbuf here:
     If a pbuf is queued for transmission, a driver calls pbuf_ref(),
     which only changes the ref count of the first pbuf */
  if (seg->p->ref != 1) {
 8021150:	687b      	ldr	r3, [r7, #4]
 8021152:	685b      	ldr	r3, [r3, #4]
 8021154:	7b9b      	ldrb	r3, [r3, #14]
 8021156:	2b01      	cmp	r3, #1
 8021158:	d001      	beq.n	802115e <tcp_output_segment_busy+0x2a>
    /* other reference found */
    return 1;
 802115a:	2301      	movs	r3, #1
 802115c:	e000      	b.n	8021160 <tcp_output_segment_busy+0x2c>
  }
  /* no other references found */
  return 0;
 802115e:	2300      	movs	r3, #0
}
 8021160:	4618      	mov	r0, r3
 8021162:	3708      	adds	r7, #8
 8021164:	46bd      	mov	sp, r7
 8021166:	bd80      	pop	{r7, pc}
 8021168:	08030408 	.word	0x08030408
 802116c:	08030a00 	.word	0x08030a00
 8021170:	0803045c 	.word	0x0803045c

08021174 <tcp_output_segment>:
 * @param pcb the tcp_pcb for the TCP connection used to send the segment
 * @param netif the netif used to send the segment
 */
static err_t
tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb, struct netif *netif)
{
 8021174:	b5b0      	push	{r4, r5, r7, lr}
 8021176:	b08c      	sub	sp, #48	@ 0x30
 8021178:	af04      	add	r7, sp, #16
 802117a:	60f8      	str	r0, [r7, #12]
 802117c:	60b9      	str	r1, [r7, #8]
 802117e:	607a      	str	r2, [r7, #4]
  u32_t *opts;
#if TCP_CHECKSUM_ON_COPY
  int seg_chksum_was_swapped = 0;
#endif

  LWIP_ASSERT("tcp_output_segment: invalid seg", seg != NULL);
 8021180:	68fb      	ldr	r3, [r7, #12]
 8021182:	2b00      	cmp	r3, #0
 8021184:	d106      	bne.n	8021194 <tcp_output_segment+0x20>
 8021186:	4b64      	ldr	r3, [pc, #400]	@ (8021318 <tcp_output_segment+0x1a4>)
 8021188:	f44f 62b7 	mov.w	r2, #1464	@ 0x5b8
 802118c:	4963      	ldr	r1, [pc, #396]	@ (802131c <tcp_output_segment+0x1a8>)
 802118e:	4864      	ldr	r0, [pc, #400]	@ (8021320 <tcp_output_segment+0x1ac>)
 8021190:	f009 fc64 	bl	802aa5c <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid pcb", pcb != NULL);
 8021194:	68bb      	ldr	r3, [r7, #8]
 8021196:	2b00      	cmp	r3, #0
 8021198:	d106      	bne.n	80211a8 <tcp_output_segment+0x34>
 802119a:	4b5f      	ldr	r3, [pc, #380]	@ (8021318 <tcp_output_segment+0x1a4>)
 802119c:	f240 52b9 	movw	r2, #1465	@ 0x5b9
 80211a0:	4960      	ldr	r1, [pc, #384]	@ (8021324 <tcp_output_segment+0x1b0>)
 80211a2:	485f      	ldr	r0, [pc, #380]	@ (8021320 <tcp_output_segment+0x1ac>)
 80211a4:	f009 fc5a 	bl	802aa5c <iprintf>
  LWIP_ASSERT("tcp_output_segment: invalid netif", netif != NULL);
 80211a8:	687b      	ldr	r3, [r7, #4]
 80211aa:	2b00      	cmp	r3, #0
 80211ac:	d106      	bne.n	80211bc <tcp_output_segment+0x48>
 80211ae:	4b5a      	ldr	r3, [pc, #360]	@ (8021318 <tcp_output_segment+0x1a4>)
 80211b0:	f240 52ba 	movw	r2, #1466	@ 0x5ba
 80211b4:	495c      	ldr	r1, [pc, #368]	@ (8021328 <tcp_output_segment+0x1b4>)
 80211b6:	485a      	ldr	r0, [pc, #360]	@ (8021320 <tcp_output_segment+0x1ac>)
 80211b8:	f009 fc50 	bl	802aa5c <iprintf>

  if (tcp_output_segment_busy(seg)) {
 80211bc:	68f8      	ldr	r0, [r7, #12]
 80211be:	f7ff ffb9 	bl	8021134 <tcp_output_segment_busy>
 80211c2:	4603      	mov	r3, r0
 80211c4:	2b00      	cmp	r3, #0
 80211c6:	d001      	beq.n	80211cc <tcp_output_segment+0x58>
    /* This should not happen: rexmit functions should have checked this.
       However, since this function modifies p->len, we must not continue in this case. */
    LWIP_DEBUGF(TCP_RTO_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_output_segment: segment busy\n"));
    return ERR_OK;
 80211c8:	2300      	movs	r3, #0
 80211ca:	e0a1      	b.n	8021310 <tcp_output_segment+0x19c>
  }

  /* The TCP header has already been constructed, but the ackno and
   wnd fields remain. */
  seg->tcphdr->ackno = lwip_htonl(pcb->rcv_nxt);
 80211cc:	68bb      	ldr	r3, [r7, #8]
 80211ce:	6a5a      	ldr	r2, [r3, #36]	@ 0x24
 80211d0:	68fb      	ldr	r3, [r7, #12]
 80211d2:	691c      	ldr	r4, [r3, #16]
 80211d4:	4610      	mov	r0, r2
 80211d6:	f7f8 fcfc 	bl	8019bd2 <lwip_htonl>
 80211da:	4603      	mov	r3, r0
 80211dc:	60a3      	str	r3, [r4, #8]
       the window scale option) is never scaled. */
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(pcb->rcv_ann_wnd));
  } else
#endif /* LWIP_WND_SCALE */
  {
    seg->tcphdr->wnd = lwip_htons(TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
 80211de:	68bb      	ldr	r3, [r7, #8]
 80211e0:	8d5a      	ldrh	r2, [r3, #42]	@ 0x2a
 80211e2:	68fb      	ldr	r3, [r7, #12]
 80211e4:	691c      	ldr	r4, [r3, #16]
 80211e6:	4610      	mov	r0, r2
 80211e8:	f7f8 fcde 	bl	8019ba8 <lwip_htons>
 80211ec:	4603      	mov	r3, r0
 80211ee:	81e3      	strh	r3, [r4, #14]
  }

  pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 80211f0:	68bb      	ldr	r3, [r7, #8]
 80211f2:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80211f4:	68ba      	ldr	r2, [r7, #8]
 80211f6:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 80211f8:	441a      	add	r2, r3
 80211fa:	68bb      	ldr	r3, [r7, #8]
 80211fc:	62da      	str	r2, [r3, #44]	@ 0x2c

  /* Add any requested options.  NB MSS option is only set on SYN
     packets, so ignore it here */
  /* cast through void* to get rid of alignment warnings */
  opts = (u32_t *)(void *)(seg->tcphdr + 1);
 80211fe:	68fb      	ldr	r3, [r7, #12]
 8021200:	691b      	ldr	r3, [r3, #16]
 8021202:	3314      	adds	r3, #20
 8021204:	61fb      	str	r3, [r7, #28]
  if (seg->flags & TF_SEG_OPTS_MSS) {
 8021206:	68fb      	ldr	r3, [r7, #12]
 8021208:	7b1b      	ldrb	r3, [r3, #12]
 802120a:	f003 0301 	and.w	r3, r3, #1
 802120e:	2b00      	cmp	r3, #0
 8021210:	d015      	beq.n	802123e <tcp_output_segment+0xca>
    u16_t mss;
#if TCP_CALCULATE_EFF_SEND_MSS
    mss = tcp_eff_send_mss_netif(TCP_MSS, netif, &pcb->remote_ip);
 8021212:	68bb      	ldr	r3, [r7, #8]
 8021214:	3304      	adds	r3, #4
 8021216:	461a      	mov	r2, r3
 8021218:	6879      	ldr	r1, [r7, #4]
 802121a:	f240 50b4 	movw	r0, #1460	@ 0x5b4
 802121e:	f7fc f9cd 	bl	801d5bc <tcp_eff_send_mss_netif>
 8021222:	4603      	mov	r3, r0
 8021224:	837b      	strh	r3, [r7, #26]
#else /* TCP_CALCULATE_EFF_SEND_MSS */
    mss = TCP_MSS;
#endif /* TCP_CALCULATE_EFF_SEND_MSS */
    *opts = TCP_BUILD_MSS_OPTION(mss);
 8021226:	8b7b      	ldrh	r3, [r7, #26]
 8021228:	f043 7301 	orr.w	r3, r3, #33816576	@ 0x2040000
 802122c:	4618      	mov	r0, r3
 802122e:	f7f8 fcd0 	bl	8019bd2 <lwip_htonl>
 8021232:	4602      	mov	r2, r0
 8021234:	69fb      	ldr	r3, [r7, #28]
 8021236:	601a      	str	r2, [r3, #0]
    opts += 1;
 8021238:	69fb      	ldr	r3, [r7, #28]
 802123a:	3304      	adds	r3, #4
 802123c:	61fb      	str	r3, [r7, #28]
  }
#endif

  /* Set retransmission timer running if it is not currently enabled
     This must be set before checking the route. */
  if (pcb->rtime < 0) {
 802123e:	68bb      	ldr	r3, [r7, #8]
 8021240:	f9b3 3030 	ldrsh.w	r3, [r3, #48]	@ 0x30
 8021244:	2b00      	cmp	r3, #0
 8021246:	da02      	bge.n	802124e <tcp_output_segment+0xda>
    pcb->rtime = 0;
 8021248:	68bb      	ldr	r3, [r7, #8]
 802124a:	2200      	movs	r2, #0
 802124c:	861a      	strh	r2, [r3, #48]	@ 0x30
  }

  if (pcb->rttest == 0) {
 802124e:	68bb      	ldr	r3, [r7, #8]
 8021250:	6b5b      	ldr	r3, [r3, #52]	@ 0x34
 8021252:	2b00      	cmp	r3, #0
 8021254:	d10c      	bne.n	8021270 <tcp_output_segment+0xfc>
    pcb->rttest = tcp_ticks;
 8021256:	4b35      	ldr	r3, [pc, #212]	@ (802132c <tcp_output_segment+0x1b8>)
 8021258:	681a      	ldr	r2, [r3, #0]
 802125a:	68bb      	ldr	r3, [r7, #8]
 802125c:	635a      	str	r2, [r3, #52]	@ 0x34
    pcb->rtseq = lwip_ntohl(seg->tcphdr->seqno);
 802125e:	68fb      	ldr	r3, [r7, #12]
 8021260:	691b      	ldr	r3, [r3, #16]
 8021262:	685b      	ldr	r3, [r3, #4]
 8021264:	4618      	mov	r0, r3
 8021266:	f7f8 fcb4 	bl	8019bd2 <lwip_htonl>
 802126a:	4602      	mov	r2, r0
 802126c:	68bb      	ldr	r3, [r7, #8]
 802126e:	639a      	str	r2, [r3, #56]	@ 0x38
  }
  LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n",
                                 lwip_htonl(seg->tcphdr->seqno), lwip_htonl(seg->tcphdr->seqno) +
                                 seg->len));

  len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload);
 8021270:	68fb      	ldr	r3, [r7, #12]
 8021272:	691a      	ldr	r2, [r3, #16]
 8021274:	68fb      	ldr	r3, [r7, #12]
 8021276:	685b      	ldr	r3, [r3, #4]
 8021278:	685b      	ldr	r3, [r3, #4]
 802127a:	1ad3      	subs	r3, r2, r3
 802127c:	833b      	strh	r3, [r7, #24]
  if (len == 0) {
    /** Exclude retransmitted segments from this count. */
    MIB2_STATS_INC(mib2.tcpoutsegs);
  }

  seg->p->len -= len;
 802127e:	68fb      	ldr	r3, [r7, #12]
 8021280:	685b      	ldr	r3, [r3, #4]
 8021282:	8959      	ldrh	r1, [r3, #10]
 8021284:	68fb      	ldr	r3, [r7, #12]
 8021286:	685b      	ldr	r3, [r3, #4]
 8021288:	8b3a      	ldrh	r2, [r7, #24]
 802128a:	1a8a      	subs	r2, r1, r2
 802128c:	b292      	uxth	r2, r2
 802128e:	815a      	strh	r2, [r3, #10]
  seg->p->tot_len -= len;
 8021290:	68fb      	ldr	r3, [r7, #12]
 8021292:	685b      	ldr	r3, [r3, #4]
 8021294:	8919      	ldrh	r1, [r3, #8]
 8021296:	68fb      	ldr	r3, [r7, #12]
 8021298:	685b      	ldr	r3, [r3, #4]
 802129a:	8b3a      	ldrh	r2, [r7, #24]
 802129c:	1a8a      	subs	r2, r1, r2
 802129e:	b292      	uxth	r2, r2
 80212a0:	811a      	strh	r2, [r3, #8]

  seg->p->payload = seg->tcphdr;
 80212a2:	68fb      	ldr	r3, [r7, #12]
 80212a4:	685b      	ldr	r3, [r3, #4]
 80212a6:	68fa      	ldr	r2, [r7, #12]
 80212a8:	6912      	ldr	r2, [r2, #16]
 80212aa:	605a      	str	r2, [r3, #4]

  seg->tcphdr->chksum = 0;
 80212ac:	68fb      	ldr	r3, [r7, #12]
 80212ae:	691b      	ldr	r3, [r3, #16]
 80212b0:	2200      	movs	r2, #0
 80212b2:	741a      	strb	r2, [r3, #16]
 80212b4:	2200      	movs	r2, #0
 80212b6:	745a      	strb	r2, [r3, #17]

#ifdef LWIP_HOOK_TCP_OUT_ADD_TCPOPTS
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(seg->p, seg->tcphdr, pcb, opts);
#endif
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(seg->tcphdr + 1)) + LWIP_TCP_OPT_LENGTH_SEGMENT(seg->flags, pcb));
 80212b8:	68fb      	ldr	r3, [r7, #12]
 80212ba:	691a      	ldr	r2, [r3, #16]
 80212bc:	68fb      	ldr	r3, [r7, #12]
 80212be:	7b1b      	ldrb	r3, [r3, #12]
 80212c0:	f003 0301 	and.w	r3, r3, #1
 80212c4:	2b00      	cmp	r3, #0
 80212c6:	d001      	beq.n	80212cc <tcp_output_segment+0x158>
 80212c8:	2318      	movs	r3, #24
 80212ca:	e000      	b.n	80212ce <tcp_output_segment+0x15a>
 80212cc:	2314      	movs	r3, #20
 80212ce:	4413      	add	r3, r2
 80212d0:	69fa      	ldr	r2, [r7, #28]
 80212d2:	429a      	cmp	r2, r3
 80212d4:	d006      	beq.n	80212e4 <tcp_output_segment+0x170>
 80212d6:	4b10      	ldr	r3, [pc, #64]	@ (8021318 <tcp_output_segment+0x1a4>)
 80212d8:	f240 621c 	movw	r2, #1564	@ 0x61c
 80212dc:	4914      	ldr	r1, [pc, #80]	@ (8021330 <tcp_output_segment+0x1bc>)
 80212de:	4810      	ldr	r0, [pc, #64]	@ (8021320 <tcp_output_segment+0x1ac>)
 80212e0:	f009 fbbc 	bl	802aa5c <iprintf>
  }
#endif /* CHECKSUM_GEN_TCP */
  TCP_STATS_INC(tcp.xmit);

  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if(seg->p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl,
 80212e4:	68fb      	ldr	r3, [r7, #12]
 80212e6:	6858      	ldr	r0, [r3, #4]
 80212e8:	68b9      	ldr	r1, [r7, #8]
 80212ea:	68bb      	ldr	r3, [r7, #8]
 80212ec:	1d1c      	adds	r4, r3, #4
 80212ee:	68bb      	ldr	r3, [r7, #8]
 80212f0:	7add      	ldrb	r5, [r3, #11]
 80212f2:	68bb      	ldr	r3, [r7, #8]
 80212f4:	7a9b      	ldrb	r3, [r3, #10]
 80212f6:	687a      	ldr	r2, [r7, #4]
 80212f8:	9202      	str	r2, [sp, #8]
 80212fa:	2206      	movs	r2, #6
 80212fc:	9201      	str	r2, [sp, #4]
 80212fe:	9300      	str	r3, [sp, #0]
 8021300:	462b      	mov	r3, r5
 8021302:	4622      	mov	r2, r4
 8021304:	f004 fd7a 	bl	8025dfc <ip4_output_if>
 8021308:	4603      	mov	r3, r0
 802130a:	75fb      	strb	r3, [r7, #23]
    seg->chksum = SWAP_BYTES_IN_WORD(seg->chksum);
    seg->chksum_swapped = 1;
  }
#endif

  return err;
 802130c:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8021310:	4618      	mov	r0, r3
 8021312:	3720      	adds	r7, #32
 8021314:	46bd      	mov	sp, r7
 8021316:	bdb0      	pop	{r4, r5, r7, pc}
 8021318:	08030408 	.word	0x08030408
 802131c:	08030a28 	.word	0x08030a28
 8021320:	0803045c 	.word	0x0803045c
 8021324:	08030a48 	.word	0x08030a48
 8021328:	08030a68 	.word	0x08030a68
 802132c:	2402afa8 	.word	0x2402afa8
 8021330:	08030a8c 	.word	0x08030a8c

08021334 <tcp_rexmit_rto_prepare>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
err_t
tcp_rexmit_rto_prepare(struct tcp_pcb *pcb)
{
 8021334:	b5b0      	push	{r4, r5, r7, lr}
 8021336:	b084      	sub	sp, #16
 8021338:	af00      	add	r7, sp, #0
 802133a:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;

  LWIP_ASSERT("tcp_rexmit_rto_prepare: invalid pcb", pcb != NULL);
 802133c:	687b      	ldr	r3, [r7, #4]
 802133e:	2b00      	cmp	r3, #0
 8021340:	d106      	bne.n	8021350 <tcp_rexmit_rto_prepare+0x1c>
 8021342:	4b36      	ldr	r3, [pc, #216]	@ (802141c <tcp_rexmit_rto_prepare+0xe8>)
 8021344:	f240 6263 	movw	r2, #1635	@ 0x663
 8021348:	4935      	ldr	r1, [pc, #212]	@ (8021420 <tcp_rexmit_rto_prepare+0xec>)
 802134a:	4836      	ldr	r0, [pc, #216]	@ (8021424 <tcp_rexmit_rto_prepare+0xf0>)
 802134c:	f009 fb86 	bl	802aa5c <iprintf>

  if (pcb->unacked == NULL) {
 8021350:	687b      	ldr	r3, [r7, #4]
 8021352:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8021354:	2b00      	cmp	r3, #0
 8021356:	d102      	bne.n	802135e <tcp_rexmit_rto_prepare+0x2a>
    return ERR_VAL;
 8021358:	f06f 0305 	mvn.w	r3, #5
 802135c:	e059      	b.n	8021412 <tcp_rexmit_rto_prepare+0xde>

  /* Move all unacked segments to the head of the unsent queue.
     However, give up if any of the unsent pbufs are still referenced by the
     netif driver due to deferred transmission. No point loading the link further
     if it is struggling to flush its buffered writes. */
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 802135e:	687b      	ldr	r3, [r7, #4]
 8021360:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 8021362:	60fb      	str	r3, [r7, #12]
 8021364:	e00b      	b.n	802137e <tcp_rexmit_rto_prepare+0x4a>
    if (tcp_output_segment_busy(seg)) {
 8021366:	68f8      	ldr	r0, [r7, #12]
 8021368:	f7ff fee4 	bl	8021134 <tcp_output_segment_busy>
 802136c:	4603      	mov	r3, r0
 802136e:	2b00      	cmp	r3, #0
 8021370:	d002      	beq.n	8021378 <tcp_rexmit_rto_prepare+0x44>
      LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
      return ERR_VAL;
 8021372:	f06f 0305 	mvn.w	r3, #5
 8021376:	e04c      	b.n	8021412 <tcp_rexmit_rto_prepare+0xde>
  for (seg = pcb->unacked; seg->next != NULL; seg = seg->next) {
 8021378:	68fb      	ldr	r3, [r7, #12]
 802137a:	681b      	ldr	r3, [r3, #0]
 802137c:	60fb      	str	r3, [r7, #12]
 802137e:	68fb      	ldr	r3, [r7, #12]
 8021380:	681b      	ldr	r3, [r3, #0]
 8021382:	2b00      	cmp	r3, #0
 8021384:	d1ef      	bne.n	8021366 <tcp_rexmit_rto_prepare+0x32>
    }
  }
  if (tcp_output_segment_busy(seg)) {
 8021386:	68f8      	ldr	r0, [r7, #12]
 8021388:	f7ff fed4 	bl	8021134 <tcp_output_segment_busy>
 802138c:	4603      	mov	r3, r0
 802138e:	2b00      	cmp	r3, #0
 8021390:	d002      	beq.n	8021398 <tcp_rexmit_rto_prepare+0x64>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit_rto: segment busy\n"));
    return ERR_VAL;
 8021392:	f06f 0305 	mvn.w	r3, #5
 8021396:	e03c      	b.n	8021412 <tcp_rexmit_rto_prepare+0xde>
  }
  /* concatenate unsent queue after unacked queue */
  seg->next = pcb->unsent;
 8021398:	687b      	ldr	r3, [r7, #4]
 802139a:	6eda      	ldr	r2, [r3, #108]	@ 0x6c
 802139c:	68fb      	ldr	r3, [r7, #12]
 802139e:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE_DBGCHECK
  /* if last unsent changed, we need to update unsent_oversize */
  if (pcb->unsent == NULL) {
 80213a0:	687b      	ldr	r3, [r7, #4]
 80213a2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 80213a4:	2b00      	cmp	r3, #0
 80213a6:	d104      	bne.n	80213b2 <tcp_rexmit_rto_prepare+0x7e>
    pcb->unsent_oversize = seg->oversize_left;
 80213a8:	68fb      	ldr	r3, [r7, #12]
 80213aa:	895a      	ldrh	r2, [r3, #10]
 80213ac:	687b      	ldr	r3, [r7, #4]
 80213ae:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE_DBGCHECK */
  /* unsent queue is the concatenated queue (of unacked, unsent) */
  pcb->unsent = pcb->unacked;
 80213b2:	687b      	ldr	r3, [r7, #4]
 80213b4:	6f1a      	ldr	r2, [r3, #112]	@ 0x70
 80213b6:	687b      	ldr	r3, [r7, #4]
 80213b8:	66da      	str	r2, [r3, #108]	@ 0x6c
  /* unacked queue is now empty */
  pcb->unacked = NULL;
 80213ba:	687b      	ldr	r3, [r7, #4]
 80213bc:	2200      	movs	r2, #0
 80213be:	671a      	str	r2, [r3, #112]	@ 0x70

  /* Mark RTO in-progress */
  tcp_set_flags(pcb, TF_RTO);
 80213c0:	687b      	ldr	r3, [r7, #4]
 80213c2:	8b5b      	ldrh	r3, [r3, #26]
 80213c4:	f443 6300 	orr.w	r3, r3, #2048	@ 0x800
 80213c8:	b29a      	uxth	r2, r3
 80213ca:	687b      	ldr	r3, [r7, #4]
 80213cc:	835a      	strh	r2, [r3, #26]
  /* Record the next byte following retransmit */
  pcb->rto_end = lwip_ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg);
 80213ce:	68fb      	ldr	r3, [r7, #12]
 80213d0:	691b      	ldr	r3, [r3, #16]
 80213d2:	685b      	ldr	r3, [r3, #4]
 80213d4:	4618      	mov	r0, r3
 80213d6:	f7f8 fbfc 	bl	8019bd2 <lwip_htonl>
 80213da:	4604      	mov	r4, r0
 80213dc:	68fb      	ldr	r3, [r7, #12]
 80213de:	891b      	ldrh	r3, [r3, #8]
 80213e0:	461d      	mov	r5, r3
 80213e2:	68fb      	ldr	r3, [r7, #12]
 80213e4:	691b      	ldr	r3, [r3, #16]
 80213e6:	899b      	ldrh	r3, [r3, #12]
 80213e8:	b29b      	uxth	r3, r3
 80213ea:	4618      	mov	r0, r3
 80213ec:	f7f8 fbdc 	bl	8019ba8 <lwip_htons>
 80213f0:	4603      	mov	r3, r0
 80213f2:	b2db      	uxtb	r3, r3
 80213f4:	f003 0303 	and.w	r3, r3, #3
 80213f8:	2b00      	cmp	r3, #0
 80213fa:	d001      	beq.n	8021400 <tcp_rexmit_rto_prepare+0xcc>
 80213fc:	2301      	movs	r3, #1
 80213fe:	e000      	b.n	8021402 <tcp_rexmit_rto_prepare+0xce>
 8021400:	2300      	movs	r3, #0
 8021402:	442b      	add	r3, r5
 8021404:	18e2      	adds	r2, r4, r3
 8021406:	687b      	ldr	r3, [r7, #4]
 8021408:	64da      	str	r2, [r3, #76]	@ 0x4c
  /* Don't take any RTT measurements after retransmitting. */
  pcb->rttest = 0;
 802140a:	687b      	ldr	r3, [r7, #4]
 802140c:	2200      	movs	r2, #0
 802140e:	635a      	str	r2, [r3, #52]	@ 0x34

  return ERR_OK;
 8021410:	2300      	movs	r3, #0
}
 8021412:	4618      	mov	r0, r3
 8021414:	3710      	adds	r7, #16
 8021416:	46bd      	mov	sp, r7
 8021418:	bdb0      	pop	{r4, r5, r7, pc}
 802141a:	bf00      	nop
 802141c:	08030408 	.word	0x08030408
 8021420:	08030aa0 	.word	0x08030aa0
 8021424:	0803045c 	.word	0x0803045c

08021428 <tcp_rexmit_rto_commit>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto_commit(struct tcp_pcb *pcb)
{
 8021428:	b580      	push	{r7, lr}
 802142a:	b082      	sub	sp, #8
 802142c:	af00      	add	r7, sp, #0
 802142e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto_commit: invalid pcb", pcb != NULL);
 8021430:	687b      	ldr	r3, [r7, #4]
 8021432:	2b00      	cmp	r3, #0
 8021434:	d106      	bne.n	8021444 <tcp_rexmit_rto_commit+0x1c>
 8021436:	4b0d      	ldr	r3, [pc, #52]	@ (802146c <tcp_rexmit_rto_commit+0x44>)
 8021438:	f44f 62d3 	mov.w	r2, #1688	@ 0x698
 802143c:	490c      	ldr	r1, [pc, #48]	@ (8021470 <tcp_rexmit_rto_commit+0x48>)
 802143e:	480d      	ldr	r0, [pc, #52]	@ (8021474 <tcp_rexmit_rto_commit+0x4c>)
 8021440:	f009 fb0c 	bl	802aa5c <iprintf>

  /* increment number of retransmissions */
  if (pcb->nrtx < 0xFF) {
 8021444:	687b      	ldr	r3, [r7, #4]
 8021446:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 802144a:	2bff      	cmp	r3, #255	@ 0xff
 802144c:	d007      	beq.n	802145e <tcp_rexmit_rto_commit+0x36>
    ++pcb->nrtx;
 802144e:	687b      	ldr	r3, [r7, #4]
 8021450:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 8021454:	3301      	adds	r3, #1
 8021456:	b2da      	uxtb	r2, r3
 8021458:	687b      	ldr	r3, [r7, #4]
 802145a:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }
  /* Do the actual retransmission */
  tcp_output(pcb);
 802145e:	6878      	ldr	r0, [r7, #4]
 8021460:	f7ff fc70 	bl	8020d44 <tcp_output>
}
 8021464:	bf00      	nop
 8021466:	3708      	adds	r7, #8
 8021468:	46bd      	mov	sp, r7
 802146a:	bd80      	pop	{r7, pc}
 802146c:	08030408 	.word	0x08030408
 8021470:	08030ac4 	.word	0x08030ac4
 8021474:	0803045c 	.word	0x0803045c

08021478 <tcp_rexmit_rto>:
 *
 * @param pcb the tcp_pcb for which to re-enqueue all unacked segments
 */
void
tcp_rexmit_rto(struct tcp_pcb *pcb)
{
 8021478:	b580      	push	{r7, lr}
 802147a:	b082      	sub	sp, #8
 802147c:	af00      	add	r7, sp, #0
 802147e:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_rto: invalid pcb", pcb != NULL);
 8021480:	687b      	ldr	r3, [r7, #4]
 8021482:	2b00      	cmp	r3, #0
 8021484:	d106      	bne.n	8021494 <tcp_rexmit_rto+0x1c>
 8021486:	4b0a      	ldr	r3, [pc, #40]	@ (80214b0 <tcp_rexmit_rto+0x38>)
 8021488:	f240 62ad 	movw	r2, #1709	@ 0x6ad
 802148c:	4909      	ldr	r1, [pc, #36]	@ (80214b4 <tcp_rexmit_rto+0x3c>)
 802148e:	480a      	ldr	r0, [pc, #40]	@ (80214b8 <tcp_rexmit_rto+0x40>)
 8021490:	f009 fae4 	bl	802aa5c <iprintf>

  if (tcp_rexmit_rto_prepare(pcb) == ERR_OK) {
 8021494:	6878      	ldr	r0, [r7, #4]
 8021496:	f7ff ff4d 	bl	8021334 <tcp_rexmit_rto_prepare>
 802149a:	4603      	mov	r3, r0
 802149c:	2b00      	cmp	r3, #0
 802149e:	d102      	bne.n	80214a6 <tcp_rexmit_rto+0x2e>
    tcp_rexmit_rto_commit(pcb);
 80214a0:	6878      	ldr	r0, [r7, #4]
 80214a2:	f7ff ffc1 	bl	8021428 <tcp_rexmit_rto_commit>
  }
}
 80214a6:	bf00      	nop
 80214a8:	3708      	adds	r7, #8
 80214aa:	46bd      	mov	sp, r7
 80214ac:	bd80      	pop	{r7, pc}
 80214ae:	bf00      	nop
 80214b0:	08030408 	.word	0x08030408
 80214b4:	08030ae8 	.word	0x08030ae8
 80214b8:	0803045c 	.word	0x0803045c

080214bc <tcp_rexmit>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
err_t
tcp_rexmit(struct tcp_pcb *pcb)
{
 80214bc:	b590      	push	{r4, r7, lr}
 80214be:	b085      	sub	sp, #20
 80214c0:	af00      	add	r7, sp, #0
 80214c2:	6078      	str	r0, [r7, #4]
  struct tcp_seg *seg;
  struct tcp_seg **cur_seg;

  LWIP_ASSERT("tcp_rexmit: invalid pcb", pcb != NULL);
 80214c4:	687b      	ldr	r3, [r7, #4]
 80214c6:	2b00      	cmp	r3, #0
 80214c8:	d106      	bne.n	80214d8 <tcp_rexmit+0x1c>
 80214ca:	4b2f      	ldr	r3, [pc, #188]	@ (8021588 <tcp_rexmit+0xcc>)
 80214cc:	f240 62c1 	movw	r2, #1729	@ 0x6c1
 80214d0:	492e      	ldr	r1, [pc, #184]	@ (802158c <tcp_rexmit+0xd0>)
 80214d2:	482f      	ldr	r0, [pc, #188]	@ (8021590 <tcp_rexmit+0xd4>)
 80214d4:	f009 fac2 	bl	802aa5c <iprintf>

  if (pcb->unacked == NULL) {
 80214d8:	687b      	ldr	r3, [r7, #4]
 80214da:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80214dc:	2b00      	cmp	r3, #0
 80214de:	d102      	bne.n	80214e6 <tcp_rexmit+0x2a>
    return ERR_VAL;
 80214e0:	f06f 0305 	mvn.w	r3, #5
 80214e4:	e04c      	b.n	8021580 <tcp_rexmit+0xc4>
  }

  seg = pcb->unacked;
 80214e6:	687b      	ldr	r3, [r7, #4]
 80214e8:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80214ea:	60bb      	str	r3, [r7, #8]

  /* Give up if the segment is still referenced by the netif driver
     due to deferred transmission. */
  if (tcp_output_segment_busy(seg)) {
 80214ec:	68b8      	ldr	r0, [r7, #8]
 80214ee:	f7ff fe21 	bl	8021134 <tcp_output_segment_busy>
 80214f2:	4603      	mov	r3, r0
 80214f4:	2b00      	cmp	r3, #0
 80214f6:	d002      	beq.n	80214fe <tcp_rexmit+0x42>
    LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_rexmit busy\n"));
    return ERR_VAL;
 80214f8:	f06f 0305 	mvn.w	r3, #5
 80214fc:	e040      	b.n	8021580 <tcp_rexmit+0xc4>
  }

  /* Move the first unacked segment to the unsent queue */
  /* Keep the unsent queue sorted. */
  pcb->unacked = seg->next;
 80214fe:	68bb      	ldr	r3, [r7, #8]
 8021500:	681a      	ldr	r2, [r3, #0]
 8021502:	687b      	ldr	r3, [r7, #4]
 8021504:	671a      	str	r2, [r3, #112]	@ 0x70

  cur_seg = &(pcb->unsent);
 8021506:	687b      	ldr	r3, [r7, #4]
 8021508:	336c      	adds	r3, #108	@ 0x6c
 802150a:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 802150c:	e002      	b.n	8021514 <tcp_rexmit+0x58>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
    cur_seg = &((*cur_seg)->next );
 802150e:	68fb      	ldr	r3, [r7, #12]
 8021510:	681b      	ldr	r3, [r3, #0]
 8021512:	60fb      	str	r3, [r7, #12]
  while (*cur_seg &&
 8021514:	68fb      	ldr	r3, [r7, #12]
 8021516:	681b      	ldr	r3, [r3, #0]
 8021518:	2b00      	cmp	r3, #0
 802151a:	d011      	beq.n	8021540 <tcp_rexmit+0x84>
         TCP_SEQ_LT(lwip_ntohl((*cur_seg)->tcphdr->seqno), lwip_ntohl(seg->tcphdr->seqno))) {
 802151c:	68fb      	ldr	r3, [r7, #12]
 802151e:	681b      	ldr	r3, [r3, #0]
 8021520:	691b      	ldr	r3, [r3, #16]
 8021522:	685b      	ldr	r3, [r3, #4]
 8021524:	4618      	mov	r0, r3
 8021526:	f7f8 fb54 	bl	8019bd2 <lwip_htonl>
 802152a:	4604      	mov	r4, r0
 802152c:	68bb      	ldr	r3, [r7, #8]
 802152e:	691b      	ldr	r3, [r3, #16]
 8021530:	685b      	ldr	r3, [r3, #4]
 8021532:	4618      	mov	r0, r3
 8021534:	f7f8 fb4d 	bl	8019bd2 <lwip_htonl>
 8021538:	4603      	mov	r3, r0
 802153a:	1ae3      	subs	r3, r4, r3
  while (*cur_seg &&
 802153c:	2b00      	cmp	r3, #0
 802153e:	dbe6      	blt.n	802150e <tcp_rexmit+0x52>
  }
  seg->next = *cur_seg;
 8021540:	68fb      	ldr	r3, [r7, #12]
 8021542:	681a      	ldr	r2, [r3, #0]
 8021544:	68bb      	ldr	r3, [r7, #8]
 8021546:	601a      	str	r2, [r3, #0]
  *cur_seg = seg;
 8021548:	68fb      	ldr	r3, [r7, #12]
 802154a:	68ba      	ldr	r2, [r7, #8]
 802154c:	601a      	str	r2, [r3, #0]
#if TCP_OVERSIZE
  if (seg->next == NULL) {
 802154e:	68bb      	ldr	r3, [r7, #8]
 8021550:	681b      	ldr	r3, [r3, #0]
 8021552:	2b00      	cmp	r3, #0
 8021554:	d103      	bne.n	802155e <tcp_rexmit+0xa2>
    /* the retransmitted segment is last in unsent, so reset unsent_oversize */
    pcb->unsent_oversize = 0;
 8021556:	687b      	ldr	r3, [r7, #4]
 8021558:	2200      	movs	r2, #0
 802155a:	f8a3 2068 	strh.w	r2, [r3, #104]	@ 0x68
  }
#endif /* TCP_OVERSIZE */

  if (pcb->nrtx < 0xFF) {
 802155e:	687b      	ldr	r3, [r7, #4]
 8021560:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 8021564:	2bff      	cmp	r3, #255	@ 0xff
 8021566:	d007      	beq.n	8021578 <tcp_rexmit+0xbc>
    ++pcb->nrtx;
 8021568:	687b      	ldr	r3, [r7, #4]
 802156a:	f893 3042 	ldrb.w	r3, [r3, #66]	@ 0x42
 802156e:	3301      	adds	r3, #1
 8021570:	b2da      	uxtb	r2, r3
 8021572:	687b      	ldr	r3, [r7, #4]
 8021574:	f883 2042 	strb.w	r2, [r3, #66]	@ 0x42
  }

  /* Don't take any rtt measurements after retransmitting. */
  pcb->rttest = 0;
 8021578:	687b      	ldr	r3, [r7, #4]
 802157a:	2200      	movs	r2, #0
 802157c:	635a      	str	r2, [r3, #52]	@ 0x34

  /* Do the actual retransmission. */
  MIB2_STATS_INC(mib2.tcpretranssegs);
  /* No need to call tcp_output: we are always called from tcp_input()
     and thus tcp_output directly returns. */
  return ERR_OK;
 802157e:	2300      	movs	r3, #0
}
 8021580:	4618      	mov	r0, r3
 8021582:	3714      	adds	r7, #20
 8021584:	46bd      	mov	sp, r7
 8021586:	bd90      	pop	{r4, r7, pc}
 8021588:	08030408 	.word	0x08030408
 802158c:	08030b04 	.word	0x08030b04
 8021590:	0803045c 	.word	0x0803045c

08021594 <tcp_rexmit_fast>:
 *
 * @param pcb the tcp_pcb for which to retransmit the first unacked segment
 */
void
tcp_rexmit_fast(struct tcp_pcb *pcb)
{
 8021594:	b580      	push	{r7, lr}
 8021596:	b082      	sub	sp, #8
 8021598:	af00      	add	r7, sp, #0
 802159a:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("tcp_rexmit_fast: invalid pcb", pcb != NULL);
 802159c:	687b      	ldr	r3, [r7, #4]
 802159e:	2b00      	cmp	r3, #0
 80215a0:	d106      	bne.n	80215b0 <tcp_rexmit_fast+0x1c>
 80215a2:	4b2a      	ldr	r3, [pc, #168]	@ (802164c <tcp_rexmit_fast+0xb8>)
 80215a4:	f240 62f9 	movw	r2, #1785	@ 0x6f9
 80215a8:	4929      	ldr	r1, [pc, #164]	@ (8021650 <tcp_rexmit_fast+0xbc>)
 80215aa:	482a      	ldr	r0, [pc, #168]	@ (8021654 <tcp_rexmit_fast+0xc0>)
 80215ac:	f009 fa56 	bl	802aa5c <iprintf>

  if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) {
 80215b0:	687b      	ldr	r3, [r7, #4]
 80215b2:	6f1b      	ldr	r3, [r3, #112]	@ 0x70
 80215b4:	2b00      	cmp	r3, #0
 80215b6:	d045      	beq.n	8021644 <tcp_rexmit_fast+0xb0>
 80215b8:	687b      	ldr	r3, [r7, #4]
 80215ba:	8b5b      	ldrh	r3, [r3, #26]
 80215bc:	f003 0304 	and.w	r3, r3, #4
 80215c0:	2b00      	cmp	r3, #0
 80215c2:	d13f      	bne.n	8021644 <tcp_rexmit_fast+0xb0>
    LWIP_DEBUGF(TCP_FR_DEBUG,
                ("tcp_receive: dupacks %"U16_F" (%"U32_F
                 "), fast retransmit %"U32_F"\n",
                 (u16_t)pcb->dupacks, pcb->lastack,
                 lwip_ntohl(pcb->unacked->tcphdr->seqno)));
    if (tcp_rexmit(pcb) == ERR_OK) {
 80215c4:	6878      	ldr	r0, [r7, #4]
 80215c6:	f7ff ff79 	bl	80214bc <tcp_rexmit>
 80215ca:	4603      	mov	r3, r0
 80215cc:	2b00      	cmp	r3, #0
 80215ce:	d139      	bne.n	8021644 <tcp_rexmit_fast+0xb0>
      /* Set ssthresh to half of the minimum of the current
       * cwnd and the advertised window */
      pcb->ssthresh = LWIP_MIN(pcb->cwnd, pcb->snd_wnd) / 2;
 80215d0:	687b      	ldr	r3, [r7, #4]
 80215d2:	f8b3 2060 	ldrh.w	r2, [r3, #96]	@ 0x60
 80215d6:	687b      	ldr	r3, [r7, #4]
 80215d8:	f8b3 3048 	ldrh.w	r3, [r3, #72]	@ 0x48
 80215dc:	4293      	cmp	r3, r2
 80215de:	bf28      	it	cs
 80215e0:	4613      	movcs	r3, r2
 80215e2:	b29b      	uxth	r3, r3
 80215e4:	2b00      	cmp	r3, #0
 80215e6:	da00      	bge.n	80215ea <tcp_rexmit_fast+0x56>
 80215e8:	3301      	adds	r3, #1
 80215ea:	105b      	asrs	r3, r3, #1
 80215ec:	b29a      	uxth	r2, r3
 80215ee:	687b      	ldr	r3, [r7, #4]
 80215f0:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a

      /* The minimum value for ssthresh should be 2 MSS */
      if (pcb->ssthresh < (2U * pcb->mss)) {
 80215f4:	687b      	ldr	r3, [r7, #4]
 80215f6:	f8b3 304a 	ldrh.w	r3, [r3, #74]	@ 0x4a
 80215fa:	461a      	mov	r2, r3
 80215fc:	687b      	ldr	r3, [r7, #4]
 80215fe:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 8021600:	005b      	lsls	r3, r3, #1
 8021602:	429a      	cmp	r2, r3
 8021604:	d206      	bcs.n	8021614 <tcp_rexmit_fast+0x80>
        LWIP_DEBUGF(TCP_FR_DEBUG,
                    ("tcp_receive: The minimum value for ssthresh %"TCPWNDSIZE_F
                     " should be min 2 mss %"U16_F"...\n",
                     pcb->ssthresh, (u16_t)(2 * pcb->mss)));
        pcb->ssthresh = 2 * pcb->mss;
 8021606:	687b      	ldr	r3, [r7, #4]
 8021608:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 802160a:	005b      	lsls	r3, r3, #1
 802160c:	b29a      	uxth	r2, r3
 802160e:	687b      	ldr	r3, [r7, #4]
 8021610:	f8a3 204a 	strh.w	r2, [r3, #74]	@ 0x4a
      }

      pcb->cwnd = pcb->ssthresh + 3 * pcb->mss;
 8021614:	687b      	ldr	r3, [r7, #4]
 8021616:	f8b3 204a 	ldrh.w	r2, [r3, #74]	@ 0x4a
 802161a:	687b      	ldr	r3, [r7, #4]
 802161c:	8e5b      	ldrh	r3, [r3, #50]	@ 0x32
 802161e:	4619      	mov	r1, r3
 8021620:	0049      	lsls	r1, r1, #1
 8021622:	440b      	add	r3, r1
 8021624:	b29b      	uxth	r3, r3
 8021626:	4413      	add	r3, r2
 8021628:	b29a      	uxth	r2, r3
 802162a:	687b      	ldr	r3, [r7, #4]
 802162c:	f8a3 2048 	strh.w	r2, [r3, #72]	@ 0x48
      tcp_set_flags(pcb, TF_INFR);
 8021630:	687b      	ldr	r3, [r7, #4]
 8021632:	8b5b      	ldrh	r3, [r3, #26]
 8021634:	f043 0304 	orr.w	r3, r3, #4
 8021638:	b29a      	uxth	r2, r3
 802163a:	687b      	ldr	r3, [r7, #4]
 802163c:	835a      	strh	r2, [r3, #26]

      /* Reset the retransmission timer to prevent immediate rto retransmissions */
      pcb->rtime = 0;
 802163e:	687b      	ldr	r3, [r7, #4]
 8021640:	2200      	movs	r2, #0
 8021642:	861a      	strh	r2, [r3, #48]	@ 0x30
    }
  }
}
 8021644:	bf00      	nop
 8021646:	3708      	adds	r7, #8
 8021648:	46bd      	mov	sp, r7
 802164a:	bd80      	pop	{r7, pc}
 802164c:	08030408 	.word	0x08030408
 8021650:	08030b1c 	.word	0x08030b1c
 8021654:	0803045c 	.word	0x0803045c

08021658 <tcp_output_alloc_header_common>:

static struct pbuf *
tcp_output_alloc_header_common(u32_t ackno, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */,
                        u16_t src_port, u16_t dst_port, u8_t flags, u16_t wnd)
{
 8021658:	b580      	push	{r7, lr}
 802165a:	b086      	sub	sp, #24
 802165c:	af00      	add	r7, sp, #0
 802165e:	60f8      	str	r0, [r7, #12]
 8021660:	607b      	str	r3, [r7, #4]
 8021662:	460b      	mov	r3, r1
 8021664:	817b      	strh	r3, [r7, #10]
 8021666:	4613      	mov	r3, r2
 8021668:	813b      	strh	r3, [r7, #8]
  struct tcp_hdr *tcphdr;
  struct pbuf *p;

  p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen + datalen, PBUF_RAM);
 802166a:	897a      	ldrh	r2, [r7, #10]
 802166c:	893b      	ldrh	r3, [r7, #8]
 802166e:	4413      	add	r3, r2
 8021670:	b29b      	uxth	r3, r3
 8021672:	3314      	adds	r3, #20
 8021674:	b29b      	uxth	r3, r3
 8021676:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802167a:	4619      	mov	r1, r3
 802167c:	2022      	movs	r0, #34	@ 0x22
 802167e:	f7f9 fc5f 	bl	801af40 <pbuf_alloc>
 8021682:	6178      	str	r0, [r7, #20]
  if (p != NULL) {
 8021684:	697b      	ldr	r3, [r7, #20]
 8021686:	2b00      	cmp	r3, #0
 8021688:	d04d      	beq.n	8021726 <tcp_output_alloc_header_common+0xce>
    LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr",
 802168a:	897b      	ldrh	r3, [r7, #10]
 802168c:	3313      	adds	r3, #19
 802168e:	697a      	ldr	r2, [r7, #20]
 8021690:	8952      	ldrh	r2, [r2, #10]
 8021692:	4293      	cmp	r3, r2
 8021694:	db06      	blt.n	80216a4 <tcp_output_alloc_header_common+0x4c>
 8021696:	4b26      	ldr	r3, [pc, #152]	@ (8021730 <tcp_output_alloc_header_common+0xd8>)
 8021698:	f240 7223 	movw	r2, #1827	@ 0x723
 802169c:	4925      	ldr	r1, [pc, #148]	@ (8021734 <tcp_output_alloc_header_common+0xdc>)
 802169e:	4826      	ldr	r0, [pc, #152]	@ (8021738 <tcp_output_alloc_header_common+0xe0>)
 80216a0:	f009 f9dc 	bl	802aa5c <iprintf>
                (p->len >= TCP_HLEN + optlen));
    tcphdr = (struct tcp_hdr *)p->payload;
 80216a4:	697b      	ldr	r3, [r7, #20]
 80216a6:	685b      	ldr	r3, [r3, #4]
 80216a8:	613b      	str	r3, [r7, #16]
    tcphdr->src = lwip_htons(src_port);
 80216aa:	8c3b      	ldrh	r3, [r7, #32]
 80216ac:	4618      	mov	r0, r3
 80216ae:	f7f8 fa7b 	bl	8019ba8 <lwip_htons>
 80216b2:	4603      	mov	r3, r0
 80216b4:	461a      	mov	r2, r3
 80216b6:	693b      	ldr	r3, [r7, #16]
 80216b8:	801a      	strh	r2, [r3, #0]
    tcphdr->dest = lwip_htons(dst_port);
 80216ba:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 80216bc:	4618      	mov	r0, r3
 80216be:	f7f8 fa73 	bl	8019ba8 <lwip_htons>
 80216c2:	4603      	mov	r3, r0
 80216c4:	461a      	mov	r2, r3
 80216c6:	693b      	ldr	r3, [r7, #16]
 80216c8:	805a      	strh	r2, [r3, #2]
    tcphdr->seqno = seqno_be;
 80216ca:	693b      	ldr	r3, [r7, #16]
 80216cc:	687a      	ldr	r2, [r7, #4]
 80216ce:	605a      	str	r2, [r3, #4]
    tcphdr->ackno = lwip_htonl(ackno);
 80216d0:	68f8      	ldr	r0, [r7, #12]
 80216d2:	f7f8 fa7e 	bl	8019bd2 <lwip_htonl>
 80216d6:	4602      	mov	r2, r0
 80216d8:	693b      	ldr	r3, [r7, #16]
 80216da:	609a      	str	r2, [r3, #8]
    TCPH_HDRLEN_FLAGS_SET(tcphdr, (5 + optlen / 4), flags);
 80216dc:	897b      	ldrh	r3, [r7, #10]
 80216de:	089b      	lsrs	r3, r3, #2
 80216e0:	b29b      	uxth	r3, r3
 80216e2:	3305      	adds	r3, #5
 80216e4:	b29b      	uxth	r3, r3
 80216e6:	031b      	lsls	r3, r3, #12
 80216e8:	b29a      	uxth	r2, r3
 80216ea:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 80216ee:	b29b      	uxth	r3, r3
 80216f0:	4313      	orrs	r3, r2
 80216f2:	b29b      	uxth	r3, r3
 80216f4:	4618      	mov	r0, r3
 80216f6:	f7f8 fa57 	bl	8019ba8 <lwip_htons>
 80216fa:	4603      	mov	r3, r0
 80216fc:	461a      	mov	r2, r3
 80216fe:	693b      	ldr	r3, [r7, #16]
 8021700:	819a      	strh	r2, [r3, #12]
    tcphdr->wnd = lwip_htons(wnd);
 8021702:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 8021704:	4618      	mov	r0, r3
 8021706:	f7f8 fa4f 	bl	8019ba8 <lwip_htons>
 802170a:	4603      	mov	r3, r0
 802170c:	461a      	mov	r2, r3
 802170e:	693b      	ldr	r3, [r7, #16]
 8021710:	81da      	strh	r2, [r3, #14]
    tcphdr->chksum = 0;
 8021712:	693b      	ldr	r3, [r7, #16]
 8021714:	2200      	movs	r2, #0
 8021716:	741a      	strb	r2, [r3, #16]
 8021718:	2200      	movs	r2, #0
 802171a:	745a      	strb	r2, [r3, #17]
    tcphdr->urgp = 0;
 802171c:	693b      	ldr	r3, [r7, #16]
 802171e:	2200      	movs	r2, #0
 8021720:	749a      	strb	r2, [r3, #18]
 8021722:	2200      	movs	r2, #0
 8021724:	74da      	strb	r2, [r3, #19]
  }
  return p;
 8021726:	697b      	ldr	r3, [r7, #20]
}
 8021728:	4618      	mov	r0, r3
 802172a:	3718      	adds	r7, #24
 802172c:	46bd      	mov	sp, r7
 802172e:	bd80      	pop	{r7, pc}
 8021730:	08030408 	.word	0x08030408
 8021734:	08030b3c 	.word	0x08030b3c
 8021738:	0803045c 	.word	0x0803045c

0802173c <tcp_output_alloc_header>:
 * @return pbuf with p->payload being the tcp_hdr
 */
static struct pbuf *
tcp_output_alloc_header(struct tcp_pcb *pcb, u16_t optlen, u16_t datalen,
                        u32_t seqno_be /* already in network byte order */)
{
 802173c:	b5b0      	push	{r4, r5, r7, lr}
 802173e:	b08a      	sub	sp, #40	@ 0x28
 8021740:	af04      	add	r7, sp, #16
 8021742:	60f8      	str	r0, [r7, #12]
 8021744:	607b      	str	r3, [r7, #4]
 8021746:	460b      	mov	r3, r1
 8021748:	817b      	strh	r3, [r7, #10]
 802174a:	4613      	mov	r3, r2
 802174c:	813b      	strh	r3, [r7, #8]
  struct pbuf *p;

  LWIP_ASSERT("tcp_output_alloc_header: invalid pcb", pcb != NULL);
 802174e:	68fb      	ldr	r3, [r7, #12]
 8021750:	2b00      	cmp	r3, #0
 8021752:	d106      	bne.n	8021762 <tcp_output_alloc_header+0x26>
 8021754:	4b15      	ldr	r3, [pc, #84]	@ (80217ac <tcp_output_alloc_header+0x70>)
 8021756:	f240 7242 	movw	r2, #1858	@ 0x742
 802175a:	4915      	ldr	r1, [pc, #84]	@ (80217b0 <tcp_output_alloc_header+0x74>)
 802175c:	4815      	ldr	r0, [pc, #84]	@ (80217b4 <tcp_output_alloc_header+0x78>)
 802175e:	f009 f97d 	bl	802aa5c <iprintf>

  p = tcp_output_alloc_header_common(pcb->rcv_nxt, optlen, datalen,
 8021762:	68fb      	ldr	r3, [r7, #12]
 8021764:	6a58      	ldr	r0, [r3, #36]	@ 0x24
 8021766:	68fb      	ldr	r3, [r7, #12]
 8021768:	8adb      	ldrh	r3, [r3, #22]
 802176a:	68fa      	ldr	r2, [r7, #12]
 802176c:	8b12      	ldrh	r2, [r2, #24]
 802176e:	68f9      	ldr	r1, [r7, #12]
 8021770:	8d49      	ldrh	r1, [r1, #42]	@ 0x2a
 8021772:	893d      	ldrh	r5, [r7, #8]
 8021774:	897c      	ldrh	r4, [r7, #10]
 8021776:	9103      	str	r1, [sp, #12]
 8021778:	2110      	movs	r1, #16
 802177a:	9102      	str	r1, [sp, #8]
 802177c:	9201      	str	r2, [sp, #4]
 802177e:	9300      	str	r3, [sp, #0]
 8021780:	687b      	ldr	r3, [r7, #4]
 8021782:	462a      	mov	r2, r5
 8021784:	4621      	mov	r1, r4
 8021786:	f7ff ff67 	bl	8021658 <tcp_output_alloc_header_common>
 802178a:	6178      	str	r0, [r7, #20]
    seqno_be, pcb->local_port, pcb->remote_port, TCP_ACK,
    TCPWND_MIN16(RCV_WND_SCALE(pcb, pcb->rcv_ann_wnd)));
  if (p != NULL) {
 802178c:	697b      	ldr	r3, [r7, #20]
 802178e:	2b00      	cmp	r3, #0
 8021790:	d006      	beq.n	80217a0 <tcp_output_alloc_header+0x64>
    /* If we're sending a packet, update the announced right window edge */
    pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd;
 8021792:	68fb      	ldr	r3, [r7, #12]
 8021794:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8021796:	68fa      	ldr	r2, [r7, #12]
 8021798:	8d52      	ldrh	r2, [r2, #42]	@ 0x2a
 802179a:	441a      	add	r2, r3
 802179c:	68fb      	ldr	r3, [r7, #12]
 802179e:	62da      	str	r2, [r3, #44]	@ 0x2c
  }
  return p;
 80217a0:	697b      	ldr	r3, [r7, #20]
}
 80217a2:	4618      	mov	r0, r3
 80217a4:	3718      	adds	r7, #24
 80217a6:	46bd      	mov	sp, r7
 80217a8:	bdb0      	pop	{r4, r5, r7, pc}
 80217aa:	bf00      	nop
 80217ac:	08030408 	.word	0x08030408
 80217b0:	08030b6c 	.word	0x08030b6c
 80217b4:	0803045c 	.word	0x0803045c

080217b8 <tcp_output_fill_options>:

/* Fill in options for control segments */
static void
tcp_output_fill_options(const struct tcp_pcb *pcb, struct pbuf *p, u8_t optflags, u8_t num_sacks)
{
 80217b8:	b580      	push	{r7, lr}
 80217ba:	b088      	sub	sp, #32
 80217bc:	af00      	add	r7, sp, #0
 80217be:	60f8      	str	r0, [r7, #12]
 80217c0:	60b9      	str	r1, [r7, #8]
 80217c2:	4611      	mov	r1, r2
 80217c4:	461a      	mov	r2, r3
 80217c6:	460b      	mov	r3, r1
 80217c8:	71fb      	strb	r3, [r7, #7]
 80217ca:	4613      	mov	r3, r2
 80217cc:	71bb      	strb	r3, [r7, #6]
  struct tcp_hdr *tcphdr;
  u32_t *opts;
  u16_t sacks_len = 0;
 80217ce:	2300      	movs	r3, #0
 80217d0:	83fb      	strh	r3, [r7, #30]

  LWIP_ASSERT("tcp_output_fill_options: invalid pbuf", p != NULL);
 80217d2:	68bb      	ldr	r3, [r7, #8]
 80217d4:	2b00      	cmp	r3, #0
 80217d6:	d106      	bne.n	80217e6 <tcp_output_fill_options+0x2e>
 80217d8:	4b12      	ldr	r3, [pc, #72]	@ (8021824 <tcp_output_fill_options+0x6c>)
 80217da:	f240 7256 	movw	r2, #1878	@ 0x756
 80217de:	4912      	ldr	r1, [pc, #72]	@ (8021828 <tcp_output_fill_options+0x70>)
 80217e0:	4812      	ldr	r0, [pc, #72]	@ (802182c <tcp_output_fill_options+0x74>)
 80217e2:	f009 f93b 	bl	802aa5c <iprintf>

  tcphdr = (struct tcp_hdr *)p->payload;
 80217e6:	68bb      	ldr	r3, [r7, #8]
 80217e8:	685b      	ldr	r3, [r3, #4]
 80217ea:	61bb      	str	r3, [r7, #24]
  opts = (u32_t *)(void *)(tcphdr + 1);
 80217ec:	69bb      	ldr	r3, [r7, #24]
 80217ee:	3314      	adds	r3, #20
 80217f0:	617b      	str	r3, [r7, #20]
  opts = LWIP_HOOK_TCP_OUT_ADD_TCPOPTS(p, tcphdr, pcb, opts);
#endif

  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(sacks_len);
  LWIP_ASSERT("options not filled", (u8_t *)opts == ((u8_t *)(tcphdr + 1)) + sacks_len * 4 + LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb));
 80217f2:	8bfb      	ldrh	r3, [r7, #30]
 80217f4:	009b      	lsls	r3, r3, #2
 80217f6:	461a      	mov	r2, r3
 80217f8:	79fb      	ldrb	r3, [r7, #7]
 80217fa:	009b      	lsls	r3, r3, #2
 80217fc:	f003 0304 	and.w	r3, r3, #4
 8021800:	4413      	add	r3, r2
 8021802:	3314      	adds	r3, #20
 8021804:	69ba      	ldr	r2, [r7, #24]
 8021806:	4413      	add	r3, r2
 8021808:	697a      	ldr	r2, [r7, #20]
 802180a:	429a      	cmp	r2, r3
 802180c:	d006      	beq.n	802181c <tcp_output_fill_options+0x64>
 802180e:	4b05      	ldr	r3, [pc, #20]	@ (8021824 <tcp_output_fill_options+0x6c>)
 8021810:	f240 7275 	movw	r2, #1909	@ 0x775
 8021814:	4906      	ldr	r1, [pc, #24]	@ (8021830 <tcp_output_fill_options+0x78>)
 8021816:	4805      	ldr	r0, [pc, #20]	@ (802182c <tcp_output_fill_options+0x74>)
 8021818:	f009 f920 	bl	802aa5c <iprintf>
  LWIP_UNUSED_ARG(optflags); /* for LWIP_NOASSERT */
  LWIP_UNUSED_ARG(opts); /* for LWIP_NOASSERT */
}
 802181c:	bf00      	nop
 802181e:	3720      	adds	r7, #32
 8021820:	46bd      	mov	sp, r7
 8021822:	bd80      	pop	{r7, pc}
 8021824:	08030408 	.word	0x08030408
 8021828:	08030b94 	.word	0x08030b94
 802182c:	0803045c 	.word	0x0803045c
 8021830:	08030a8c 	.word	0x08030a8c

08021834 <tcp_output_control_segment>:
 * header checksum and calling ip_output_if while handling netif hints and stats.
 */
static err_t
tcp_output_control_segment(const struct tcp_pcb *pcb, struct pbuf *p,
                           const ip_addr_t *src, const ip_addr_t *dst)
{
 8021834:	b580      	push	{r7, lr}
 8021836:	b08a      	sub	sp, #40	@ 0x28
 8021838:	af04      	add	r7, sp, #16
 802183a:	60f8      	str	r0, [r7, #12]
 802183c:	60b9      	str	r1, [r7, #8]
 802183e:	607a      	str	r2, [r7, #4]
 8021840:	603b      	str	r3, [r7, #0]
  err_t err;
  struct netif *netif;

  LWIP_ASSERT("tcp_output_control_segment: invalid pbuf", p != NULL);
 8021842:	68bb      	ldr	r3, [r7, #8]
 8021844:	2b00      	cmp	r3, #0
 8021846:	d106      	bne.n	8021856 <tcp_output_control_segment+0x22>
 8021848:	4b1c      	ldr	r3, [pc, #112]	@ (80218bc <tcp_output_control_segment+0x88>)
 802184a:	f240 7287 	movw	r2, #1927	@ 0x787
 802184e:	491c      	ldr	r1, [pc, #112]	@ (80218c0 <tcp_output_control_segment+0x8c>)
 8021850:	481c      	ldr	r0, [pc, #112]	@ (80218c4 <tcp_output_control_segment+0x90>)
 8021852:	f009 f903 	bl	802aa5c <iprintf>

  netif = tcp_route(pcb, src, dst);
 8021856:	683a      	ldr	r2, [r7, #0]
 8021858:	6879      	ldr	r1, [r7, #4]
 802185a:	68f8      	ldr	r0, [r7, #12]
 802185c:	f7fe fa78 	bl	801fd50 <tcp_route>
 8021860:	6138      	str	r0, [r7, #16]
  if (netif == NULL) {
 8021862:	693b      	ldr	r3, [r7, #16]
 8021864:	2b00      	cmp	r3, #0
 8021866:	d102      	bne.n	802186e <tcp_output_control_segment+0x3a>
    err = ERR_RTE;
 8021868:	23fc      	movs	r3, #252	@ 0xfc
 802186a:	75fb      	strb	r3, [r7, #23]
 802186c:	e01c      	b.n	80218a8 <tcp_output_control_segment+0x74>
      struct tcp_hdr *tcphdr = (struct tcp_hdr *)p->payload;
      tcphdr->chksum = ip_chksum_pseudo(p, IP_PROTO_TCP, p->tot_len,
                                        src, dst);
    }
#endif
    if (pcb != NULL) {
 802186e:	68fb      	ldr	r3, [r7, #12]
 8021870:	2b00      	cmp	r3, #0
 8021872:	d006      	beq.n	8021882 <tcp_output_control_segment+0x4e>
      NETIF_SET_HINTS(netif, LWIP_CONST_CAST(struct netif_hint*, &(pcb->netif_hints)));
      ttl = pcb->ttl;
 8021874:	68fb      	ldr	r3, [r7, #12]
 8021876:	7adb      	ldrb	r3, [r3, #11]
 8021878:	75bb      	strb	r3, [r7, #22]
      tos = pcb->tos;
 802187a:	68fb      	ldr	r3, [r7, #12]
 802187c:	7a9b      	ldrb	r3, [r3, #10]
 802187e:	757b      	strb	r3, [r7, #21]
 8021880:	e003      	b.n	802188a <tcp_output_control_segment+0x56>
    } else {
      /* Send output with hardcoded TTL/HL since we have no access to the pcb */
      ttl = TCP_TTL;
 8021882:	23ff      	movs	r3, #255	@ 0xff
 8021884:	75bb      	strb	r3, [r7, #22]
      tos = 0;
 8021886:	2300      	movs	r3, #0
 8021888:	757b      	strb	r3, [r7, #21]
    }
    TCP_STATS_INC(tcp.xmit);
    err = ip_output_if(p, src, dst, ttl, tos, IP_PROTO_TCP, netif);
 802188a:	7dba      	ldrb	r2, [r7, #22]
 802188c:	693b      	ldr	r3, [r7, #16]
 802188e:	9302      	str	r3, [sp, #8]
 8021890:	2306      	movs	r3, #6
 8021892:	9301      	str	r3, [sp, #4]
 8021894:	7d7b      	ldrb	r3, [r7, #21]
 8021896:	9300      	str	r3, [sp, #0]
 8021898:	4613      	mov	r3, r2
 802189a:	683a      	ldr	r2, [r7, #0]
 802189c:	6879      	ldr	r1, [r7, #4]
 802189e:	68b8      	ldr	r0, [r7, #8]
 80218a0:	f004 faac 	bl	8025dfc <ip4_output_if>
 80218a4:	4603      	mov	r3, r0
 80218a6:	75fb      	strb	r3, [r7, #23]
    NETIF_RESET_HINTS(netif);
  }
  pbuf_free(p);
 80218a8:	68b8      	ldr	r0, [r7, #8]
 80218aa:	f7f9 fe5f 	bl	801b56c <pbuf_free>
  return err;
 80218ae:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 80218b2:	4618      	mov	r0, r3
 80218b4:	3718      	adds	r7, #24
 80218b6:	46bd      	mov	sp, r7
 80218b8:	bd80      	pop	{r7, pc}
 80218ba:	bf00      	nop
 80218bc:	08030408 	.word	0x08030408
 80218c0:	08030bbc 	.word	0x08030bbc
 80218c4:	0803045c 	.word	0x0803045c

080218c8 <tcp_rst>:
 */
void
tcp_rst(const struct tcp_pcb *pcb, u32_t seqno, u32_t ackno,
        const ip_addr_t *local_ip, const ip_addr_t *remote_ip,
        u16_t local_port, u16_t remote_port)
{
 80218c8:	b590      	push	{r4, r7, lr}
 80218ca:	b08b      	sub	sp, #44	@ 0x2c
 80218cc:	af04      	add	r7, sp, #16
 80218ce:	60f8      	str	r0, [r7, #12]
 80218d0:	60b9      	str	r1, [r7, #8]
 80218d2:	607a      	str	r2, [r7, #4]
 80218d4:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  u16_t wnd;
  u8_t optlen;

  LWIP_ASSERT("tcp_rst: invalid local_ip", local_ip != NULL);
 80218d6:	683b      	ldr	r3, [r7, #0]
 80218d8:	2b00      	cmp	r3, #0
 80218da:	d106      	bne.n	80218ea <tcp_rst+0x22>
 80218dc:	4b1f      	ldr	r3, [pc, #124]	@ (802195c <tcp_rst+0x94>)
 80218de:	f240 72c4 	movw	r2, #1988	@ 0x7c4
 80218e2:	491f      	ldr	r1, [pc, #124]	@ (8021960 <tcp_rst+0x98>)
 80218e4:	481f      	ldr	r0, [pc, #124]	@ (8021964 <tcp_rst+0x9c>)
 80218e6:	f009 f8b9 	bl	802aa5c <iprintf>
  LWIP_ASSERT("tcp_rst: invalid remote_ip", remote_ip != NULL);
 80218ea:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80218ec:	2b00      	cmp	r3, #0
 80218ee:	d106      	bne.n	80218fe <tcp_rst+0x36>
 80218f0:	4b1a      	ldr	r3, [pc, #104]	@ (802195c <tcp_rst+0x94>)
 80218f2:	f240 72c5 	movw	r2, #1989	@ 0x7c5
 80218f6:	491c      	ldr	r1, [pc, #112]	@ (8021968 <tcp_rst+0xa0>)
 80218f8:	481a      	ldr	r0, [pc, #104]	@ (8021964 <tcp_rst+0x9c>)
 80218fa:	f009 f8af 	bl	802aa5c <iprintf>

  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 80218fe:	2300      	movs	r3, #0
 8021900:	75fb      	strb	r3, [r7, #23]

#if LWIP_WND_SCALE
  wnd = PP_HTONS(((TCP_WND >> TCP_RCV_SCALE) & 0xFFFF));
#else
  wnd = PP_HTONS(TCP_WND);
 8021902:	f24d 0316 	movw	r3, #53270	@ 0xd016
 8021906:	82bb      	strh	r3, [r7, #20]
#endif

  p = tcp_output_alloc_header_common(ackno, optlen, 0, lwip_htonl(seqno), local_port,
 8021908:	7dfb      	ldrb	r3, [r7, #23]
 802190a:	b29c      	uxth	r4, r3
 802190c:	68b8      	ldr	r0, [r7, #8]
 802190e:	f7f8 f960 	bl	8019bd2 <lwip_htonl>
 8021912:	4602      	mov	r2, r0
 8021914:	8abb      	ldrh	r3, [r7, #20]
 8021916:	9303      	str	r3, [sp, #12]
 8021918:	2314      	movs	r3, #20
 802191a:	9302      	str	r3, [sp, #8]
 802191c:	8e3b      	ldrh	r3, [r7, #48]	@ 0x30
 802191e:	9301      	str	r3, [sp, #4]
 8021920:	8dbb      	ldrh	r3, [r7, #44]	@ 0x2c
 8021922:	9300      	str	r3, [sp, #0]
 8021924:	4613      	mov	r3, r2
 8021926:	2200      	movs	r2, #0
 8021928:	4621      	mov	r1, r4
 802192a:	6878      	ldr	r0, [r7, #4]
 802192c:	f7ff fe94 	bl	8021658 <tcp_output_alloc_header_common>
 8021930:	6138      	str	r0, [r7, #16]
    remote_port, TCP_RST | TCP_ACK, wnd);
  if (p == NULL) {
 8021932:	693b      	ldr	r3, [r7, #16]
 8021934:	2b00      	cmp	r3, #0
 8021936:	d00c      	beq.n	8021952 <tcp_rst+0x8a>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n"));
    return;
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 8021938:	7dfb      	ldrb	r3, [r7, #23]
 802193a:	2200      	movs	r2, #0
 802193c:	6939      	ldr	r1, [r7, #16]
 802193e:	68f8      	ldr	r0, [r7, #12]
 8021940:	f7ff ff3a 	bl	80217b8 <tcp_output_fill_options>

  MIB2_STATS_INC(mib2.tcpoutrsts);

  tcp_output_control_segment(pcb, p, local_ip, remote_ip);
 8021944:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8021946:	683a      	ldr	r2, [r7, #0]
 8021948:	6939      	ldr	r1, [r7, #16]
 802194a:	68f8      	ldr	r0, [r7, #12]
 802194c:	f7ff ff72 	bl	8021834 <tcp_output_control_segment>
 8021950:	e000      	b.n	8021954 <tcp_rst+0x8c>
    return;
 8021952:	bf00      	nop
  LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno));
}
 8021954:	371c      	adds	r7, #28
 8021956:	46bd      	mov	sp, r7
 8021958:	bd90      	pop	{r4, r7, pc}
 802195a:	bf00      	nop
 802195c:	08030408 	.word	0x08030408
 8021960:	08030be8 	.word	0x08030be8
 8021964:	0803045c 	.word	0x0803045c
 8021968:	08030c04 	.word	0x08030c04

0802196c <tcp_send_empty_ack>:
 *
 * @param pcb Protocol control block for the TCP connection to send the ACK
 */
err_t
tcp_send_empty_ack(struct tcp_pcb *pcb)
{
 802196c:	b590      	push	{r4, r7, lr}
 802196e:	b087      	sub	sp, #28
 8021970:	af00      	add	r7, sp, #0
 8021972:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen, optflags = 0;
 8021974:	2300      	movs	r3, #0
 8021976:	75fb      	strb	r3, [r7, #23]
  u8_t num_sacks = 0;
 8021978:	2300      	movs	r3, #0
 802197a:	75bb      	strb	r3, [r7, #22]

  LWIP_ASSERT("tcp_send_empty_ack: invalid pcb", pcb != NULL);
 802197c:	687b      	ldr	r3, [r7, #4]
 802197e:	2b00      	cmp	r3, #0
 8021980:	d106      	bne.n	8021990 <tcp_send_empty_ack+0x24>
 8021982:	4b28      	ldr	r3, [pc, #160]	@ (8021a24 <tcp_send_empty_ack+0xb8>)
 8021984:	f240 72ea 	movw	r2, #2026	@ 0x7ea
 8021988:	4927      	ldr	r1, [pc, #156]	@ (8021a28 <tcp_send_empty_ack+0xbc>)
 802198a:	4828      	ldr	r0, [pc, #160]	@ (8021a2c <tcp_send_empty_ack+0xc0>)
 802198c:	f009 f866 	bl	802aa5c <iprintf>
#if LWIP_TCP_TIMESTAMPS
  if (pcb->flags & TF_TIMESTAMP) {
    optflags = TF_SEG_OPTS_TS;
  }
#endif
  optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(optflags, pcb);
 8021990:	7dfb      	ldrb	r3, [r7, #23]
 8021992:	009b      	lsls	r3, r3, #2
 8021994:	b2db      	uxtb	r3, r3
 8021996:	f003 0304 	and.w	r3, r3, #4
 802199a:	757b      	strb	r3, [r7, #21]
  if ((num_sacks = tcp_get_num_sacks(pcb, optlen)) > 0) {
    optlen += 4 + num_sacks * 8; /* 4 bytes for header (including 2*NOP), plus 8B for each SACK */
  }
#endif

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt));
 802199c:	7d7b      	ldrb	r3, [r7, #21]
 802199e:	b29c      	uxth	r4, r3
 80219a0:	687b      	ldr	r3, [r7, #4]
 80219a2:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80219a4:	4618      	mov	r0, r3
 80219a6:	f7f8 f914 	bl	8019bd2 <lwip_htonl>
 80219aa:	4603      	mov	r3, r0
 80219ac:	2200      	movs	r2, #0
 80219ae:	4621      	mov	r1, r4
 80219b0:	6878      	ldr	r0, [r7, #4]
 80219b2:	f7ff fec3 	bl	802173c <tcp_output_alloc_header>
 80219b6:	6138      	str	r0, [r7, #16]
  if (p == NULL) {
 80219b8:	693b      	ldr	r3, [r7, #16]
 80219ba:	2b00      	cmp	r3, #0
 80219bc:	d109      	bne.n	80219d2 <tcp_send_empty_ack+0x66>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 80219be:	687b      	ldr	r3, [r7, #4]
 80219c0:	8b5b      	ldrh	r3, [r3, #26]
 80219c2:	f043 0303 	orr.w	r3, r3, #3
 80219c6:	b29a      	uxth	r2, r3
 80219c8:	687b      	ldr	r3, [r7, #4]
 80219ca:	835a      	strh	r2, [r3, #26]
    LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n"));
    return ERR_BUF;
 80219cc:	f06f 0301 	mvn.w	r3, #1
 80219d0:	e023      	b.n	8021a1a <tcp_send_empty_ack+0xae>
  }
  tcp_output_fill_options(pcb, p, optflags, num_sacks);
 80219d2:	7dbb      	ldrb	r3, [r7, #22]
 80219d4:	7dfa      	ldrb	r2, [r7, #23]
 80219d6:	6939      	ldr	r1, [r7, #16]
 80219d8:	6878      	ldr	r0, [r7, #4]
 80219da:	f7ff feed 	bl	80217b8 <tcp_output_fill_options>
  pcb->ts_lastacksent = pcb->rcv_nxt;
#endif

  LWIP_DEBUGF(TCP_OUTPUT_DEBUG,
              ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt));
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 80219de:	687a      	ldr	r2, [r7, #4]
 80219e0:	687b      	ldr	r3, [r7, #4]
 80219e2:	3304      	adds	r3, #4
 80219e4:	6939      	ldr	r1, [r7, #16]
 80219e6:	6878      	ldr	r0, [r7, #4]
 80219e8:	f7ff ff24 	bl	8021834 <tcp_output_control_segment>
 80219ec:	4603      	mov	r3, r0
 80219ee:	73fb      	strb	r3, [r7, #15]
  if (err != ERR_OK) {
 80219f0:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80219f4:	2b00      	cmp	r3, #0
 80219f6:	d007      	beq.n	8021a08 <tcp_send_empty_ack+0x9c>
    /* let tcp_fasttmr retry sending this ACK */
    tcp_set_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 80219f8:	687b      	ldr	r3, [r7, #4]
 80219fa:	8b5b      	ldrh	r3, [r3, #26]
 80219fc:	f043 0303 	orr.w	r3, r3, #3
 8021a00:	b29a      	uxth	r2, r3
 8021a02:	687b      	ldr	r3, [r7, #4]
 8021a04:	835a      	strh	r2, [r3, #26]
 8021a06:	e006      	b.n	8021a16 <tcp_send_empty_ack+0xaa>
  } else {
    /* remove ACK flags from the PCB, as we sent an empty ACK now */
    tcp_clear_flags(pcb, TF_ACK_DELAY | TF_ACK_NOW);
 8021a08:	687b      	ldr	r3, [r7, #4]
 8021a0a:	8b5b      	ldrh	r3, [r3, #26]
 8021a0c:	f023 0303 	bic.w	r3, r3, #3
 8021a10:	b29a      	uxth	r2, r3
 8021a12:	687b      	ldr	r3, [r7, #4]
 8021a14:	835a      	strh	r2, [r3, #26]
  }

  return err;
 8021a16:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8021a1a:	4618      	mov	r0, r3
 8021a1c:	371c      	adds	r7, #28
 8021a1e:	46bd      	mov	sp, r7
 8021a20:	bd90      	pop	{r4, r7, pc}
 8021a22:	bf00      	nop
 8021a24:	08030408 	.word	0x08030408
 8021a28:	08030c20 	.word	0x08030c20
 8021a2c:	0803045c 	.word	0x0803045c

08021a30 <tcp_keepalive>:
 *
 * @param pcb the tcp_pcb for which to send a keepalive packet
 */
err_t
tcp_keepalive(struct tcp_pcb *pcb)
{
 8021a30:	b590      	push	{r4, r7, lr}
 8021a32:	b085      	sub	sp, #20
 8021a34:	af00      	add	r7, sp, #0
 8021a36:	6078      	str	r0, [r7, #4]
  err_t err;
  struct pbuf *p;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 8021a38:	2300      	movs	r3, #0
 8021a3a:	72bb      	strb	r3, [r7, #10]

  LWIP_ASSERT("tcp_keepalive: invalid pcb", pcb != NULL);
 8021a3c:	687b      	ldr	r3, [r7, #4]
 8021a3e:	2b00      	cmp	r3, #0
 8021a40:	d106      	bne.n	8021a50 <tcp_keepalive+0x20>
 8021a42:	4b18      	ldr	r3, [pc, #96]	@ (8021aa4 <tcp_keepalive+0x74>)
 8021a44:	f640 0224 	movw	r2, #2084	@ 0x824
 8021a48:	4917      	ldr	r1, [pc, #92]	@ (8021aa8 <tcp_keepalive+0x78>)
 8021a4a:	4818      	ldr	r0, [pc, #96]	@ (8021aac <tcp_keepalive+0x7c>)
 8021a4c:	f009 f806 	bl	802aa5c <iprintf>
  LWIP_DEBUGF(TCP_DEBUG, ("\n"));

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F"   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
                          tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  p = tcp_output_alloc_header(pcb, optlen, 0, lwip_htonl(pcb->snd_nxt - 1));
 8021a50:	7abb      	ldrb	r3, [r7, #10]
 8021a52:	b29c      	uxth	r4, r3
 8021a54:	687b      	ldr	r3, [r7, #4]
 8021a56:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8021a58:	3b01      	subs	r3, #1
 8021a5a:	4618      	mov	r0, r3
 8021a5c:	f7f8 f8b9 	bl	8019bd2 <lwip_htonl>
 8021a60:	4603      	mov	r3, r0
 8021a62:	2200      	movs	r2, #0
 8021a64:	4621      	mov	r1, r4
 8021a66:	6878      	ldr	r0, [r7, #4]
 8021a68:	f7ff fe68 	bl	802173c <tcp_output_alloc_header>
 8021a6c:	60f8      	str	r0, [r7, #12]
  if (p == NULL) {
 8021a6e:	68fb      	ldr	r3, [r7, #12]
 8021a70:	2b00      	cmp	r3, #0
 8021a72:	d102      	bne.n	8021a7a <tcp_keepalive+0x4a>
    LWIP_DEBUGF(TCP_DEBUG,
                ("tcp_keepalive: could not allocate memory for pbuf\n"));
    return ERR_MEM;
 8021a74:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021a78:	e010      	b.n	8021a9c <tcp_keepalive+0x6c>
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 8021a7a:	7abb      	ldrb	r3, [r7, #10]
 8021a7c:	2200      	movs	r2, #0
 8021a7e:	68f9      	ldr	r1, [r7, #12]
 8021a80:	6878      	ldr	r0, [r7, #4]
 8021a82:	f7ff fe99 	bl	80217b8 <tcp_output_fill_options>
  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 8021a86:	687a      	ldr	r2, [r7, #4]
 8021a88:	687b      	ldr	r3, [r7, #4]
 8021a8a:	3304      	adds	r3, #4
 8021a8c:	68f9      	ldr	r1, [r7, #12]
 8021a8e:	6878      	ldr	r0, [r7, #4]
 8021a90:	f7ff fed0 	bl	8021834 <tcp_output_control_segment>
 8021a94:	4603      	mov	r3, r0
 8021a96:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 8021a98:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8021a9c:	4618      	mov	r0, r3
 8021a9e:	3714      	adds	r7, #20
 8021aa0:	46bd      	mov	sp, r7
 8021aa2:	bd90      	pop	{r4, r7, pc}
 8021aa4:	08030408 	.word	0x08030408
 8021aa8:	08030c40 	.word	0x08030c40
 8021aac:	0803045c 	.word	0x0803045c

08021ab0 <tcp_zero_window_probe>:
 *
 * @param pcb the tcp_pcb for which to send a zero-window probe packet
 */
err_t
tcp_zero_window_probe(struct tcp_pcb *pcb)
{
 8021ab0:	b590      	push	{r4, r7, lr}
 8021ab2:	b08b      	sub	sp, #44	@ 0x2c
 8021ab4:	af00      	add	r7, sp, #0
 8021ab6:	6078      	str	r0, [r7, #4]
  struct tcp_hdr *tcphdr;
  struct tcp_seg *seg;
  u16_t len;
  u8_t is_fin;
  u32_t snd_nxt;
  u8_t optlen = LWIP_TCP_OPT_LENGTH_SEGMENT(0, pcb);
 8021ab8:	2300      	movs	r3, #0
 8021aba:	74fb      	strb	r3, [r7, #19]

  LWIP_ASSERT("tcp_zero_window_probe: invalid pcb", pcb != NULL);
 8021abc:	687b      	ldr	r3, [r7, #4]
 8021abe:	2b00      	cmp	r3, #0
 8021ac0:	d106      	bne.n	8021ad0 <tcp_zero_window_probe+0x20>
 8021ac2:	4b4d      	ldr	r3, [pc, #308]	@ (8021bf8 <tcp_zero_window_probe+0x148>)
 8021ac4:	f640 024f 	movw	r2, #2127	@ 0x84f
 8021ac8:	494c      	ldr	r1, [pc, #304]	@ (8021bfc <tcp_zero_window_probe+0x14c>)
 8021aca:	484d      	ldr	r0, [pc, #308]	@ (8021c00 <tcp_zero_window_probe+0x150>)
 8021acc:	f008 ffc6 	bl	802aa5c <iprintf>
              ("tcp_zero_window_probe: tcp_ticks %"U32_F
               "   pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n",
               tcp_ticks, pcb->tmr, (u16_t)pcb->keep_cnt_sent));

  /* Only consider unsent, persist timer should be off when there is data in-flight */
  seg = pcb->unsent;
 8021ad0:	687b      	ldr	r3, [r7, #4]
 8021ad2:	6edb      	ldr	r3, [r3, #108]	@ 0x6c
 8021ad4:	627b      	str	r3, [r7, #36]	@ 0x24
  if (seg == NULL) {
 8021ad6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021ad8:	2b00      	cmp	r3, #0
 8021ada:	d101      	bne.n	8021ae0 <tcp_zero_window_probe+0x30>
    /* Not expected, persist timer should be off when the send buffer is empty */
    return ERR_OK;
 8021adc:	2300      	movs	r3, #0
 8021ade:	e087      	b.n	8021bf0 <tcp_zero_window_probe+0x140>

  /* increment probe count. NOTE: we record probe even if it fails
     to actually transmit due to an error. This ensures memory exhaustion/
     routing problem doesn't leave a zero-window pcb as an indefinite zombie.
     RTO mechanism has similar behavior, see pcb->nrtx */
  if (pcb->persist_probe < 0xFF) {
 8021ae0:	687b      	ldr	r3, [r7, #4]
 8021ae2:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 8021ae6:	2bff      	cmp	r3, #255	@ 0xff
 8021ae8:	d007      	beq.n	8021afa <tcp_zero_window_probe+0x4a>
    ++pcb->persist_probe;
 8021aea:	687b      	ldr	r3, [r7, #4]
 8021aec:	f893 309a 	ldrb.w	r3, [r3, #154]	@ 0x9a
 8021af0:	3301      	adds	r3, #1
 8021af2:	b2da      	uxtb	r2, r3
 8021af4:	687b      	ldr	r3, [r7, #4]
 8021af6:	f883 209a 	strb.w	r2, [r3, #154]	@ 0x9a
  }

  is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0);
 8021afa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021afc:	691b      	ldr	r3, [r3, #16]
 8021afe:	899b      	ldrh	r3, [r3, #12]
 8021b00:	b29b      	uxth	r3, r3
 8021b02:	4618      	mov	r0, r3
 8021b04:	f7f8 f850 	bl	8019ba8 <lwip_htons>
 8021b08:	4603      	mov	r3, r0
 8021b0a:	b2db      	uxtb	r3, r3
 8021b0c:	f003 0301 	and.w	r3, r3, #1
 8021b10:	2b00      	cmp	r3, #0
 8021b12:	d005      	beq.n	8021b20 <tcp_zero_window_probe+0x70>
 8021b14:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021b16:	891b      	ldrh	r3, [r3, #8]
 8021b18:	2b00      	cmp	r3, #0
 8021b1a:	d101      	bne.n	8021b20 <tcp_zero_window_probe+0x70>
 8021b1c:	2301      	movs	r3, #1
 8021b1e:	e000      	b.n	8021b22 <tcp_zero_window_probe+0x72>
 8021b20:	2300      	movs	r3, #0
 8021b22:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* we want to send one seqno: either FIN or data (no options) */
  len = is_fin ? 0 : 1;
 8021b26:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8021b2a:	2b00      	cmp	r3, #0
 8021b2c:	bf0c      	ite	eq
 8021b2e:	2301      	moveq	r3, #1
 8021b30:	2300      	movne	r3, #0
 8021b32:	b2db      	uxtb	r3, r3
 8021b34:	843b      	strh	r3, [r7, #32]

  p = tcp_output_alloc_header(pcb, optlen, len, seg->tcphdr->seqno);
 8021b36:	7cfb      	ldrb	r3, [r7, #19]
 8021b38:	b299      	uxth	r1, r3
 8021b3a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021b3c:	691b      	ldr	r3, [r3, #16]
 8021b3e:	685b      	ldr	r3, [r3, #4]
 8021b40:	8c3a      	ldrh	r2, [r7, #32]
 8021b42:	6878      	ldr	r0, [r7, #4]
 8021b44:	f7ff fdfa 	bl	802173c <tcp_output_alloc_header>
 8021b48:	61f8      	str	r0, [r7, #28]
  if (p == NULL) {
 8021b4a:	69fb      	ldr	r3, [r7, #28]
 8021b4c:	2b00      	cmp	r3, #0
 8021b4e:	d102      	bne.n	8021b56 <tcp_zero_window_probe+0xa6>
    LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n"));
    return ERR_MEM;
 8021b50:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021b54:	e04c      	b.n	8021bf0 <tcp_zero_window_probe+0x140>
  }
  tcphdr = (struct tcp_hdr *)p->payload;
 8021b56:	69fb      	ldr	r3, [r7, #28]
 8021b58:	685b      	ldr	r3, [r3, #4]
 8021b5a:	61bb      	str	r3, [r7, #24]

  if (is_fin) {
 8021b5c:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8021b60:	2b00      	cmp	r3, #0
 8021b62:	d011      	beq.n	8021b88 <tcp_zero_window_probe+0xd8>
    /* FIN segment, no data */
    TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN);
 8021b64:	69bb      	ldr	r3, [r7, #24]
 8021b66:	899b      	ldrh	r3, [r3, #12]
 8021b68:	b29b      	uxth	r3, r3
 8021b6a:	b21b      	sxth	r3, r3
 8021b6c:	f423 537c 	bic.w	r3, r3, #16128	@ 0x3f00
 8021b70:	b21c      	sxth	r4, r3
 8021b72:	2011      	movs	r0, #17
 8021b74:	f7f8 f818 	bl	8019ba8 <lwip_htons>
 8021b78:	4603      	mov	r3, r0
 8021b7a:	b21b      	sxth	r3, r3
 8021b7c:	4323      	orrs	r3, r4
 8021b7e:	b21b      	sxth	r3, r3
 8021b80:	b29a      	uxth	r2, r3
 8021b82:	69bb      	ldr	r3, [r7, #24]
 8021b84:	819a      	strh	r2, [r3, #12]
 8021b86:	e010      	b.n	8021baa <tcp_zero_window_probe+0xfa>
  } else {
    /* Data segment, copy in one byte from the head of the unacked queue */
    char *d = ((char *)p->payload + TCP_HLEN);
 8021b88:	69fb      	ldr	r3, [r7, #28]
 8021b8a:	685b      	ldr	r3, [r3, #4]
 8021b8c:	3314      	adds	r3, #20
 8021b8e:	617b      	str	r3, [r7, #20]
    /* Depending on whether the segment has already been sent (unacked) or not
       (unsent), seg->p->payload points to the IP header or TCP header.
       Ensure we copy the first TCP data byte: */
    pbuf_copy_partial(seg->p, d, 1, seg->p->tot_len - seg->len);
 8021b90:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021b92:	6858      	ldr	r0, [r3, #4]
 8021b94:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021b96:	685b      	ldr	r3, [r3, #4]
 8021b98:	891a      	ldrh	r2, [r3, #8]
 8021b9a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021b9c:	891b      	ldrh	r3, [r3, #8]
 8021b9e:	1ad3      	subs	r3, r2, r3
 8021ba0:	b29b      	uxth	r3, r3
 8021ba2:	2201      	movs	r2, #1
 8021ba4:	6979      	ldr	r1, [r7, #20]
 8021ba6:	f7f9 fee7 	bl	801b978 <pbuf_copy_partial>
  }

  /* The byte may be acknowledged without the window being opened. */
  snd_nxt = lwip_ntohl(seg->tcphdr->seqno) + 1;
 8021baa:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8021bac:	691b      	ldr	r3, [r3, #16]
 8021bae:	685b      	ldr	r3, [r3, #4]
 8021bb0:	4618      	mov	r0, r3
 8021bb2:	f7f8 f80e 	bl	8019bd2 <lwip_htonl>
 8021bb6:	4603      	mov	r3, r0
 8021bb8:	3301      	adds	r3, #1
 8021bba:	60fb      	str	r3, [r7, #12]
  if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) {
 8021bbc:	687b      	ldr	r3, [r7, #4]
 8021bbe:	6d1a      	ldr	r2, [r3, #80]	@ 0x50
 8021bc0:	68fb      	ldr	r3, [r7, #12]
 8021bc2:	1ad3      	subs	r3, r2, r3
 8021bc4:	2b00      	cmp	r3, #0
 8021bc6:	da02      	bge.n	8021bce <tcp_zero_window_probe+0x11e>
    pcb->snd_nxt = snd_nxt;
 8021bc8:	687b      	ldr	r3, [r7, #4]
 8021bca:	68fa      	ldr	r2, [r7, #12]
 8021bcc:	651a      	str	r2, [r3, #80]	@ 0x50
  }
  tcp_output_fill_options(pcb, p, 0, optlen);
 8021bce:	7cfb      	ldrb	r3, [r7, #19]
 8021bd0:	2200      	movs	r2, #0
 8021bd2:	69f9      	ldr	r1, [r7, #28]
 8021bd4:	6878      	ldr	r0, [r7, #4]
 8021bd6:	f7ff fdef 	bl	80217b8 <tcp_output_fill_options>

  err = tcp_output_control_segment(pcb, p, &pcb->local_ip, &pcb->remote_ip);
 8021bda:	687a      	ldr	r2, [r7, #4]
 8021bdc:	687b      	ldr	r3, [r7, #4]
 8021bde:	3304      	adds	r3, #4
 8021be0:	69f9      	ldr	r1, [r7, #28]
 8021be2:	6878      	ldr	r0, [r7, #4]
 8021be4:	f7ff fe26 	bl	8021834 <tcp_output_control_segment>
 8021be8:	4603      	mov	r3, r0
 8021bea:	72fb      	strb	r3, [r7, #11]

  LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F
                          " ackno %"U32_F" err %d.\n",
                          pcb->snd_nxt - 1, pcb->rcv_nxt, (int)err));
  return err;
 8021bec:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8021bf0:	4618      	mov	r0, r3
 8021bf2:	372c      	adds	r7, #44	@ 0x2c
 8021bf4:	46bd      	mov	sp, r7
 8021bf6:	bd90      	pop	{r4, r7, pc}
 8021bf8:	08030408 	.word	0x08030408
 8021bfc:	08030c5c 	.word	0x08030c5c
 8021c00:	0803045c 	.word	0x0803045c

08021c04 <tcpip_tcp_timer>:
 *
 * @param arg unused argument
 */
static void
tcpip_tcp_timer(void *arg)
{
 8021c04:	b580      	push	{r7, lr}
 8021c06:	b082      	sub	sp, #8
 8021c08:	af00      	add	r7, sp, #0
 8021c0a:	6078      	str	r0, [r7, #4]
  LWIP_UNUSED_ARG(arg);

  /* call TCP timer handler */
  tcp_tmr();
 8021c0c:	f7f9 ffa2 	bl	801bb54 <tcp_tmr>
  /* timer still needed? */
  if (tcp_active_pcbs || tcp_tw_pcbs) {
 8021c10:	4b0a      	ldr	r3, [pc, #40]	@ (8021c3c <tcpip_tcp_timer+0x38>)
 8021c12:	681b      	ldr	r3, [r3, #0]
 8021c14:	2b00      	cmp	r3, #0
 8021c16:	d103      	bne.n	8021c20 <tcpip_tcp_timer+0x1c>
 8021c18:	4b09      	ldr	r3, [pc, #36]	@ (8021c40 <tcpip_tcp_timer+0x3c>)
 8021c1a:	681b      	ldr	r3, [r3, #0]
 8021c1c:	2b00      	cmp	r3, #0
 8021c1e:	d005      	beq.n	8021c2c <tcpip_tcp_timer+0x28>
    /* restart timer */
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 8021c20:	2200      	movs	r2, #0
 8021c22:	4908      	ldr	r1, [pc, #32]	@ (8021c44 <tcpip_tcp_timer+0x40>)
 8021c24:	20fa      	movs	r0, #250	@ 0xfa
 8021c26:	f000 f8f5 	bl	8021e14 <sys_timeout>
 8021c2a:	e003      	b.n	8021c34 <tcpip_tcp_timer+0x30>
  } else {
    /* disable timer */
    tcpip_tcp_timer_active = 0;
 8021c2c:	4b06      	ldr	r3, [pc, #24]	@ (8021c48 <tcpip_tcp_timer+0x44>)
 8021c2e:	2200      	movs	r2, #0
 8021c30:	601a      	str	r2, [r3, #0]
  }
}
 8021c32:	bf00      	nop
 8021c34:	bf00      	nop
 8021c36:	3708      	adds	r7, #8
 8021c38:	46bd      	mov	sp, r7
 8021c3a:	bd80      	pop	{r7, pc}
 8021c3c:	2402afb4 	.word	0x2402afb4
 8021c40:	2402afb8 	.word	0x2402afb8
 8021c44:	08021c05 	.word	0x08021c05
 8021c48:	2402b004 	.word	0x2402b004

08021c4c <tcp_timer_needed>:
 * the reason is to have the TCP timer only running when
 * there are active (or time-wait) PCBs.
 */
void
tcp_timer_needed(void)
{
 8021c4c:	b580      	push	{r7, lr}
 8021c4e:	af00      	add	r7, sp, #0
  LWIP_ASSERT_CORE_LOCKED();
 8021c50:	f7ef fad8 	bl	8011204 <sys_check_core_locking>

  /* timer is off but needed again? */
  if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) {
 8021c54:	4b0a      	ldr	r3, [pc, #40]	@ (8021c80 <tcp_timer_needed+0x34>)
 8021c56:	681b      	ldr	r3, [r3, #0]
 8021c58:	2b00      	cmp	r3, #0
 8021c5a:	d10f      	bne.n	8021c7c <tcp_timer_needed+0x30>
 8021c5c:	4b09      	ldr	r3, [pc, #36]	@ (8021c84 <tcp_timer_needed+0x38>)
 8021c5e:	681b      	ldr	r3, [r3, #0]
 8021c60:	2b00      	cmp	r3, #0
 8021c62:	d103      	bne.n	8021c6c <tcp_timer_needed+0x20>
 8021c64:	4b08      	ldr	r3, [pc, #32]	@ (8021c88 <tcp_timer_needed+0x3c>)
 8021c66:	681b      	ldr	r3, [r3, #0]
 8021c68:	2b00      	cmp	r3, #0
 8021c6a:	d007      	beq.n	8021c7c <tcp_timer_needed+0x30>
    /* enable and start timer */
    tcpip_tcp_timer_active = 1;
 8021c6c:	4b04      	ldr	r3, [pc, #16]	@ (8021c80 <tcp_timer_needed+0x34>)
 8021c6e:	2201      	movs	r2, #1
 8021c70:	601a      	str	r2, [r3, #0]
    sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL);
 8021c72:	2200      	movs	r2, #0
 8021c74:	4905      	ldr	r1, [pc, #20]	@ (8021c8c <tcp_timer_needed+0x40>)
 8021c76:	20fa      	movs	r0, #250	@ 0xfa
 8021c78:	f000 f8cc 	bl	8021e14 <sys_timeout>
  }
}
 8021c7c:	bf00      	nop
 8021c7e:	bd80      	pop	{r7, pc}
 8021c80:	2402b004 	.word	0x2402b004
 8021c84:	2402afb4 	.word	0x2402afb4
 8021c88:	2402afb8 	.word	0x2402afb8
 8021c8c:	08021c05 	.word	0x08021c05

08021c90 <sys_timeout_abs>:
#if LWIP_DEBUG_TIMERNAMES
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
sys_timeout_abs(u32_t abs_time, sys_timeout_handler handler, void *arg)
#endif
{
 8021c90:	b580      	push	{r7, lr}
 8021c92:	b086      	sub	sp, #24
 8021c94:	af00      	add	r7, sp, #0
 8021c96:	60f8      	str	r0, [r7, #12]
 8021c98:	60b9      	str	r1, [r7, #8]
 8021c9a:	607a      	str	r2, [r7, #4]
  struct sys_timeo *timeout, *t;

  timeout = (struct sys_timeo *)memp_malloc(MEMP_SYS_TIMEOUT);
 8021c9c:	200a      	movs	r0, #10
 8021c9e:	f7f8 fd01 	bl	801a6a4 <memp_malloc>
 8021ca2:	6138      	str	r0, [r7, #16]
  if (timeout == NULL) {
 8021ca4:	693b      	ldr	r3, [r7, #16]
 8021ca6:	2b00      	cmp	r3, #0
 8021ca8:	d109      	bne.n	8021cbe <sys_timeout_abs+0x2e>
    LWIP_ASSERT("sys_timeout: timeout != NULL, pool MEMP_SYS_TIMEOUT is empty", timeout != NULL);
 8021caa:	693b      	ldr	r3, [r7, #16]
 8021cac:	2b00      	cmp	r3, #0
 8021cae:	d151      	bne.n	8021d54 <sys_timeout_abs+0xc4>
 8021cb0:	4b2a      	ldr	r3, [pc, #168]	@ (8021d5c <sys_timeout_abs+0xcc>)
 8021cb2:	22be      	movs	r2, #190	@ 0xbe
 8021cb4:	492a      	ldr	r1, [pc, #168]	@ (8021d60 <sys_timeout_abs+0xd0>)
 8021cb6:	482b      	ldr	r0, [pc, #172]	@ (8021d64 <sys_timeout_abs+0xd4>)
 8021cb8:	f008 fed0 	bl	802aa5c <iprintf>
    return;
 8021cbc:	e04a      	b.n	8021d54 <sys_timeout_abs+0xc4>
  }

  timeout->next = NULL;
 8021cbe:	693b      	ldr	r3, [r7, #16]
 8021cc0:	2200      	movs	r2, #0
 8021cc2:	601a      	str	r2, [r3, #0]
  timeout->h = handler;
 8021cc4:	693b      	ldr	r3, [r7, #16]
 8021cc6:	68ba      	ldr	r2, [r7, #8]
 8021cc8:	609a      	str	r2, [r3, #8]
  timeout->arg = arg;
 8021cca:	693b      	ldr	r3, [r7, #16]
 8021ccc:	687a      	ldr	r2, [r7, #4]
 8021cce:	60da      	str	r2, [r3, #12]
  timeout->time = abs_time;
 8021cd0:	693b      	ldr	r3, [r7, #16]
 8021cd2:	68fa      	ldr	r2, [r7, #12]
 8021cd4:	605a      	str	r2, [r3, #4]
  timeout->handler_name = handler_name;
  LWIP_DEBUGF(TIMERS_DEBUG, ("sys_timeout: %p abs_time=%"U32_F" handler=%s arg=%p\n",
                             (void *)timeout, abs_time, handler_name, (void *)arg));
#endif /* LWIP_DEBUG_TIMERNAMES */

  if (next_timeout == NULL) {
 8021cd6:	4b24      	ldr	r3, [pc, #144]	@ (8021d68 <sys_timeout_abs+0xd8>)
 8021cd8:	681b      	ldr	r3, [r3, #0]
 8021cda:	2b00      	cmp	r3, #0
 8021cdc:	d103      	bne.n	8021ce6 <sys_timeout_abs+0x56>
    next_timeout = timeout;
 8021cde:	4a22      	ldr	r2, [pc, #136]	@ (8021d68 <sys_timeout_abs+0xd8>)
 8021ce0:	693b      	ldr	r3, [r7, #16]
 8021ce2:	6013      	str	r3, [r2, #0]
    return;
 8021ce4:	e037      	b.n	8021d56 <sys_timeout_abs+0xc6>
  }
  if (TIME_LESS_THAN(timeout->time, next_timeout->time)) {
 8021ce6:	693b      	ldr	r3, [r7, #16]
 8021ce8:	685a      	ldr	r2, [r3, #4]
 8021cea:	4b1f      	ldr	r3, [pc, #124]	@ (8021d68 <sys_timeout_abs+0xd8>)
 8021cec:	681b      	ldr	r3, [r3, #0]
 8021cee:	685b      	ldr	r3, [r3, #4]
 8021cf0:	1ad3      	subs	r3, r2, r3
 8021cf2:	0fdb      	lsrs	r3, r3, #31
 8021cf4:	f003 0301 	and.w	r3, r3, #1
 8021cf8:	b2db      	uxtb	r3, r3
 8021cfa:	2b00      	cmp	r3, #0
 8021cfc:	d007      	beq.n	8021d0e <sys_timeout_abs+0x7e>
    timeout->next = next_timeout;
 8021cfe:	4b1a      	ldr	r3, [pc, #104]	@ (8021d68 <sys_timeout_abs+0xd8>)
 8021d00:	681a      	ldr	r2, [r3, #0]
 8021d02:	693b      	ldr	r3, [r7, #16]
 8021d04:	601a      	str	r2, [r3, #0]
    next_timeout = timeout;
 8021d06:	4a18      	ldr	r2, [pc, #96]	@ (8021d68 <sys_timeout_abs+0xd8>)
 8021d08:	693b      	ldr	r3, [r7, #16]
 8021d0a:	6013      	str	r3, [r2, #0]
 8021d0c:	e023      	b.n	8021d56 <sys_timeout_abs+0xc6>
  } else {
    for (t = next_timeout; t != NULL; t = t->next) {
 8021d0e:	4b16      	ldr	r3, [pc, #88]	@ (8021d68 <sys_timeout_abs+0xd8>)
 8021d10:	681b      	ldr	r3, [r3, #0]
 8021d12:	617b      	str	r3, [r7, #20]
 8021d14:	e01a      	b.n	8021d4c <sys_timeout_abs+0xbc>
      if ((t->next == NULL) || TIME_LESS_THAN(timeout->time, t->next->time)) {
 8021d16:	697b      	ldr	r3, [r7, #20]
 8021d18:	681b      	ldr	r3, [r3, #0]
 8021d1a:	2b00      	cmp	r3, #0
 8021d1c:	d00b      	beq.n	8021d36 <sys_timeout_abs+0xa6>
 8021d1e:	693b      	ldr	r3, [r7, #16]
 8021d20:	685a      	ldr	r2, [r3, #4]
 8021d22:	697b      	ldr	r3, [r7, #20]
 8021d24:	681b      	ldr	r3, [r3, #0]
 8021d26:	685b      	ldr	r3, [r3, #4]
 8021d28:	1ad3      	subs	r3, r2, r3
 8021d2a:	0fdb      	lsrs	r3, r3, #31
 8021d2c:	f003 0301 	and.w	r3, r3, #1
 8021d30:	b2db      	uxtb	r3, r3
 8021d32:	2b00      	cmp	r3, #0
 8021d34:	d007      	beq.n	8021d46 <sys_timeout_abs+0xb6>
        timeout->next = t->next;
 8021d36:	697b      	ldr	r3, [r7, #20]
 8021d38:	681a      	ldr	r2, [r3, #0]
 8021d3a:	693b      	ldr	r3, [r7, #16]
 8021d3c:	601a      	str	r2, [r3, #0]
        t->next = timeout;
 8021d3e:	697b      	ldr	r3, [r7, #20]
 8021d40:	693a      	ldr	r2, [r7, #16]
 8021d42:	601a      	str	r2, [r3, #0]
        break;
 8021d44:	e007      	b.n	8021d56 <sys_timeout_abs+0xc6>
    for (t = next_timeout; t != NULL; t = t->next) {
 8021d46:	697b      	ldr	r3, [r7, #20]
 8021d48:	681b      	ldr	r3, [r3, #0]
 8021d4a:	617b      	str	r3, [r7, #20]
 8021d4c:	697b      	ldr	r3, [r7, #20]
 8021d4e:	2b00      	cmp	r3, #0
 8021d50:	d1e1      	bne.n	8021d16 <sys_timeout_abs+0x86>
 8021d52:	e000      	b.n	8021d56 <sys_timeout_abs+0xc6>
    return;
 8021d54:	bf00      	nop
      }
    }
  }
}
 8021d56:	3718      	adds	r7, #24
 8021d58:	46bd      	mov	sp, r7
 8021d5a:	bd80      	pop	{r7, pc}
 8021d5c:	08030c80 	.word	0x08030c80
 8021d60:	08030cb4 	.word	0x08030cb4
 8021d64:	08030cf4 	.word	0x08030cf4
 8021d68:	2402affc 	.word	0x2402affc

08021d6c <lwip_cyclic_timer>:
#if !LWIP_TESTMODE
static
#endif
void
lwip_cyclic_timer(void *arg)
{
 8021d6c:	b580      	push	{r7, lr}
 8021d6e:	b086      	sub	sp, #24
 8021d70:	af00      	add	r7, sp, #0
 8021d72:	6078      	str	r0, [r7, #4]
  u32_t now;
  u32_t next_timeout_time;
  const struct lwip_cyclic_timer *cyclic = (const struct lwip_cyclic_timer *)arg;
 8021d74:	687b      	ldr	r3, [r7, #4]
 8021d76:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  LWIP_DEBUGF(TIMERS_DEBUG, ("tcpip: %s()\n", cyclic->handler_name));
#endif
  cyclic->handler();
 8021d78:	697b      	ldr	r3, [r7, #20]
 8021d7a:	685b      	ldr	r3, [r3, #4]
 8021d7c:	4798      	blx	r3

  now = sys_now();
 8021d7e:	f7ee ffa5 	bl	8010ccc <sys_now>
 8021d82:	6138      	str	r0, [r7, #16]
  next_timeout_time = (u32_t)(current_timeout_due_time + cyclic->interval_ms);  /* overflow handled by TIME_LESS_THAN macro */ 
 8021d84:	697b      	ldr	r3, [r7, #20]
 8021d86:	681a      	ldr	r2, [r3, #0]
 8021d88:	4b0f      	ldr	r3, [pc, #60]	@ (8021dc8 <lwip_cyclic_timer+0x5c>)
 8021d8a:	681b      	ldr	r3, [r3, #0]
 8021d8c:	4413      	add	r3, r2
 8021d8e:	60fb      	str	r3, [r7, #12]
  if (TIME_LESS_THAN(next_timeout_time, now)) {
 8021d90:	68fa      	ldr	r2, [r7, #12]
 8021d92:	693b      	ldr	r3, [r7, #16]
 8021d94:	1ad3      	subs	r3, r2, r3
 8021d96:	0fdb      	lsrs	r3, r3, #31
 8021d98:	f003 0301 	and.w	r3, r3, #1
 8021d9c:	b2db      	uxtb	r3, r3
 8021d9e:	2b00      	cmp	r3, #0
 8021da0:	d009      	beq.n	8021db6 <lwip_cyclic_timer+0x4a>
    /* timer would immediately expire again -> "overload" -> restart without any correction */
#if LWIP_DEBUG_TIMERNAMES
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs((u32_t)(now + cyclic->interval_ms), lwip_cyclic_timer, arg);
 8021da2:	697b      	ldr	r3, [r7, #20]
 8021da4:	681a      	ldr	r2, [r3, #0]
 8021da6:	693b      	ldr	r3, [r7, #16]
 8021da8:	4413      	add	r3, r2
 8021daa:	687a      	ldr	r2, [r7, #4]
 8021dac:	4907      	ldr	r1, [pc, #28]	@ (8021dcc <lwip_cyclic_timer+0x60>)
 8021dae:	4618      	mov	r0, r3
 8021db0:	f7ff ff6e 	bl	8021c90 <sys_timeout_abs>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg, cyclic->handler_name);
#else
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
#endif
  }
}
 8021db4:	e004      	b.n	8021dc0 <lwip_cyclic_timer+0x54>
    sys_timeout_abs(next_timeout_time, lwip_cyclic_timer, arg);
 8021db6:	687a      	ldr	r2, [r7, #4]
 8021db8:	4904      	ldr	r1, [pc, #16]	@ (8021dcc <lwip_cyclic_timer+0x60>)
 8021dba:	68f8      	ldr	r0, [r7, #12]
 8021dbc:	f7ff ff68 	bl	8021c90 <sys_timeout_abs>
}
 8021dc0:	bf00      	nop
 8021dc2:	3718      	adds	r7, #24
 8021dc4:	46bd      	mov	sp, r7
 8021dc6:	bd80      	pop	{r7, pc}
 8021dc8:	2402b000 	.word	0x2402b000
 8021dcc:	08021d6d 	.word	0x08021d6d

08021dd0 <sys_timeouts_init>:

/** Initialize this module */
void sys_timeouts_init(void)
{
 8021dd0:	b580      	push	{r7, lr}
 8021dd2:	b082      	sub	sp, #8
 8021dd4:	af00      	add	r7, sp, #0
  size_t i;
  /* tcp_tmr() at index 0 is started on demand */
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 8021dd6:	2301      	movs	r3, #1
 8021dd8:	607b      	str	r3, [r7, #4]
 8021dda:	e00e      	b.n	8021dfa <sys_timeouts_init+0x2a>
    /* we have to cast via size_t to get rid of const warning
      (this is OK as cyclic_timer() casts back to const* */
    sys_timeout(lwip_cyclic_timers[i].interval_ms, lwip_cyclic_timer, LWIP_CONST_CAST(void *, &lwip_cyclic_timers[i]));
 8021ddc:	4a0b      	ldr	r2, [pc, #44]	@ (8021e0c <sys_timeouts_init+0x3c>)
 8021dde:	687b      	ldr	r3, [r7, #4]
 8021de0:	f852 0033 	ldr.w	r0, [r2, r3, lsl #3]
 8021de4:	687b      	ldr	r3, [r7, #4]
 8021de6:	00db      	lsls	r3, r3, #3
 8021de8:	4a08      	ldr	r2, [pc, #32]	@ (8021e0c <sys_timeouts_init+0x3c>)
 8021dea:	4413      	add	r3, r2
 8021dec:	461a      	mov	r2, r3
 8021dee:	4908      	ldr	r1, [pc, #32]	@ (8021e10 <sys_timeouts_init+0x40>)
 8021df0:	f000 f810 	bl	8021e14 <sys_timeout>
  for (i = (LWIP_TCP ? 1 : 0); i < LWIP_ARRAYSIZE(lwip_cyclic_timers); i++) {
 8021df4:	687b      	ldr	r3, [r7, #4]
 8021df6:	3301      	adds	r3, #1
 8021df8:	607b      	str	r3, [r7, #4]
 8021dfa:	687b      	ldr	r3, [r7, #4]
 8021dfc:	2b04      	cmp	r3, #4
 8021dfe:	d9ed      	bls.n	8021ddc <sys_timeouts_init+0xc>
  }
}
 8021e00:	bf00      	nop
 8021e02:	bf00      	nop
 8021e04:	3708      	adds	r7, #8
 8021e06:	46bd      	mov	sp, r7
 8021e08:	bd80      	pop	{r7, pc}
 8021e0a:	bf00      	nop
 8021e0c:	08031ed0 	.word	0x08031ed0
 8021e10:	08021d6d 	.word	0x08021d6d

08021e14 <sys_timeout>:
sys_timeout_debug(u32_t msecs, sys_timeout_handler handler, void *arg, const char *handler_name)
#else /* LWIP_DEBUG_TIMERNAMES */
void
sys_timeout(u32_t msecs, sys_timeout_handler handler, void *arg)
#endif /* LWIP_DEBUG_TIMERNAMES */
{
 8021e14:	b580      	push	{r7, lr}
 8021e16:	b086      	sub	sp, #24
 8021e18:	af00      	add	r7, sp, #0
 8021e1a:	60f8      	str	r0, [r7, #12]
 8021e1c:	60b9      	str	r1, [r7, #8]
 8021e1e:	607a      	str	r2, [r7, #4]
  u32_t next_timeout_time;

  LWIP_ASSERT_CORE_LOCKED();
 8021e20:	f7ef f9f0 	bl	8011204 <sys_check_core_locking>

  LWIP_ASSERT("Timeout time too long, max is LWIP_UINT32_MAX/4 msecs", msecs <= (LWIP_UINT32_MAX / 4));
 8021e24:	68fb      	ldr	r3, [r7, #12]
 8021e26:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 8021e2a:	d306      	bcc.n	8021e3a <sys_timeout+0x26>
 8021e2c:	4b0a      	ldr	r3, [pc, #40]	@ (8021e58 <sys_timeout+0x44>)
 8021e2e:	f240 1229 	movw	r2, #297	@ 0x129
 8021e32:	490a      	ldr	r1, [pc, #40]	@ (8021e5c <sys_timeout+0x48>)
 8021e34:	480a      	ldr	r0, [pc, #40]	@ (8021e60 <sys_timeout+0x4c>)
 8021e36:	f008 fe11 	bl	802aa5c <iprintf>

  next_timeout_time = (u32_t)(sys_now() + msecs); /* overflow handled by TIME_LESS_THAN macro */ 
 8021e3a:	f7ee ff47 	bl	8010ccc <sys_now>
 8021e3e:	4602      	mov	r2, r0
 8021e40:	68fb      	ldr	r3, [r7, #12]
 8021e42:	4413      	add	r3, r2
 8021e44:	617b      	str	r3, [r7, #20]

#if LWIP_DEBUG_TIMERNAMES
  sys_timeout_abs(next_timeout_time, handler, arg, handler_name);
#else
  sys_timeout_abs(next_timeout_time, handler, arg);
 8021e46:	687a      	ldr	r2, [r7, #4]
 8021e48:	68b9      	ldr	r1, [r7, #8]
 8021e4a:	6978      	ldr	r0, [r7, #20]
 8021e4c:	f7ff ff20 	bl	8021c90 <sys_timeout_abs>
#endif
}
 8021e50:	bf00      	nop
 8021e52:	3718      	adds	r7, #24
 8021e54:	46bd      	mov	sp, r7
 8021e56:	bd80      	pop	{r7, pc}
 8021e58:	08030c80 	.word	0x08030c80
 8021e5c:	08030d1c 	.word	0x08030d1c
 8021e60:	08030cf4 	.word	0x08030cf4

08021e64 <sys_check_timeouts>:
 *
 * Must be called periodically from your main loop.
 */
void
sys_check_timeouts(void)
{
 8021e64:	b580      	push	{r7, lr}
 8021e66:	b084      	sub	sp, #16
 8021e68:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 8021e6a:	f7ef f9cb 	bl	8011204 <sys_check_core_locking>

  /* Process only timers expired at the start of the function. */
  now = sys_now();
 8021e6e:	f7ee ff2d 	bl	8010ccc <sys_now>
 8021e72:	60f8      	str	r0, [r7, #12]
    sys_timeout_handler handler;
    void *arg;

    PBUF_CHECK_FREE_OOSEQ();

    tmptimeout = next_timeout;
 8021e74:	4b17      	ldr	r3, [pc, #92]	@ (8021ed4 <sys_check_timeouts+0x70>)
 8021e76:	681b      	ldr	r3, [r3, #0]
 8021e78:	60bb      	str	r3, [r7, #8]
    if (tmptimeout == NULL) {
 8021e7a:	68bb      	ldr	r3, [r7, #8]
 8021e7c:	2b00      	cmp	r3, #0
 8021e7e:	d022      	beq.n	8021ec6 <sys_check_timeouts+0x62>
      return;
    }

    if (TIME_LESS_THAN(now, tmptimeout->time)) {
 8021e80:	68bb      	ldr	r3, [r7, #8]
 8021e82:	685b      	ldr	r3, [r3, #4]
 8021e84:	68fa      	ldr	r2, [r7, #12]
 8021e86:	1ad3      	subs	r3, r2, r3
 8021e88:	0fdb      	lsrs	r3, r3, #31
 8021e8a:	f003 0301 	and.w	r3, r3, #1
 8021e8e:	b2db      	uxtb	r3, r3
 8021e90:	2b00      	cmp	r3, #0
 8021e92:	d11a      	bne.n	8021eca <sys_check_timeouts+0x66>
      return;
    }

    /* Timeout has expired */
    next_timeout = tmptimeout->next;
 8021e94:	68bb      	ldr	r3, [r7, #8]
 8021e96:	681b      	ldr	r3, [r3, #0]
 8021e98:	4a0e      	ldr	r2, [pc, #56]	@ (8021ed4 <sys_check_timeouts+0x70>)
 8021e9a:	6013      	str	r3, [r2, #0]
    handler = tmptimeout->h;
 8021e9c:	68bb      	ldr	r3, [r7, #8]
 8021e9e:	689b      	ldr	r3, [r3, #8]
 8021ea0:	607b      	str	r3, [r7, #4]
    arg = tmptimeout->arg;
 8021ea2:	68bb      	ldr	r3, [r7, #8]
 8021ea4:	68db      	ldr	r3, [r3, #12]
 8021ea6:	603b      	str	r3, [r7, #0]
    current_timeout_due_time = tmptimeout->time;
 8021ea8:	68bb      	ldr	r3, [r7, #8]
 8021eaa:	685b      	ldr	r3, [r3, #4]
 8021eac:	4a0a      	ldr	r2, [pc, #40]	@ (8021ed8 <sys_check_timeouts+0x74>)
 8021eae:	6013      	str	r3, [r2, #0]
    if (handler != NULL) {
      LWIP_DEBUGF(TIMERS_DEBUG, ("sct calling h=%s t=%"U32_F" arg=%p\n",
                                 tmptimeout->handler_name, sys_now() - tmptimeout->time, arg));
    }
#endif /* LWIP_DEBUG_TIMERNAMES */
    memp_free(MEMP_SYS_TIMEOUT, tmptimeout);
 8021eb0:	68b9      	ldr	r1, [r7, #8]
 8021eb2:	200a      	movs	r0, #10
 8021eb4:	f7f8 fc6c 	bl	801a790 <memp_free>
    if (handler != NULL) {
 8021eb8:	687b      	ldr	r3, [r7, #4]
 8021eba:	2b00      	cmp	r3, #0
 8021ebc:	d0da      	beq.n	8021e74 <sys_check_timeouts+0x10>
      handler(arg);
 8021ebe:	687b      	ldr	r3, [r7, #4]
 8021ec0:	6838      	ldr	r0, [r7, #0]
 8021ec2:	4798      	blx	r3
  do {
 8021ec4:	e7d6      	b.n	8021e74 <sys_check_timeouts+0x10>
      return;
 8021ec6:	bf00      	nop
 8021ec8:	e000      	b.n	8021ecc <sys_check_timeouts+0x68>
      return;
 8021eca:	bf00      	nop
    }
    LWIP_TCPIP_THREAD_ALIVE();

    /* Repeat until all expired timers have been called */
  } while (1);
}
 8021ecc:	3710      	adds	r7, #16
 8021ece:	46bd      	mov	sp, r7
 8021ed0:	bd80      	pop	{r7, pc}
 8021ed2:	bf00      	nop
 8021ed4:	2402affc 	.word	0x2402affc
 8021ed8:	2402b000 	.word	0x2402b000

08021edc <sys_timeouts_sleeptime>:
/** Return the time left before the next timeout is due. If no timeouts are
 * enqueued, returns 0xffffffff
 */
u32_t
sys_timeouts_sleeptime(void)
{
 8021edc:	b580      	push	{r7, lr}
 8021ede:	b082      	sub	sp, #8
 8021ee0:	af00      	add	r7, sp, #0
  u32_t now;

  LWIP_ASSERT_CORE_LOCKED();
 8021ee2:	f7ef f98f 	bl	8011204 <sys_check_core_locking>

  if (next_timeout == NULL) {
 8021ee6:	4b16      	ldr	r3, [pc, #88]	@ (8021f40 <sys_timeouts_sleeptime+0x64>)
 8021ee8:	681b      	ldr	r3, [r3, #0]
 8021eea:	2b00      	cmp	r3, #0
 8021eec:	d102      	bne.n	8021ef4 <sys_timeouts_sleeptime+0x18>
    return SYS_TIMEOUTS_SLEEPTIME_INFINITE;
 8021eee:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8021ef2:	e020      	b.n	8021f36 <sys_timeouts_sleeptime+0x5a>
  }
  now = sys_now();
 8021ef4:	f7ee feea 	bl	8010ccc <sys_now>
 8021ef8:	6078      	str	r0, [r7, #4]
  if (TIME_LESS_THAN(next_timeout->time, now)) {
 8021efa:	4b11      	ldr	r3, [pc, #68]	@ (8021f40 <sys_timeouts_sleeptime+0x64>)
 8021efc:	681b      	ldr	r3, [r3, #0]
 8021efe:	685a      	ldr	r2, [r3, #4]
 8021f00:	687b      	ldr	r3, [r7, #4]
 8021f02:	1ad3      	subs	r3, r2, r3
 8021f04:	0fdb      	lsrs	r3, r3, #31
 8021f06:	f003 0301 	and.w	r3, r3, #1
 8021f0a:	b2db      	uxtb	r3, r3
 8021f0c:	2b00      	cmp	r3, #0
 8021f0e:	d001      	beq.n	8021f14 <sys_timeouts_sleeptime+0x38>
    return 0;
 8021f10:	2300      	movs	r3, #0
 8021f12:	e010      	b.n	8021f36 <sys_timeouts_sleeptime+0x5a>
  } else {
    u32_t ret = (u32_t)(next_timeout->time - now);
 8021f14:	4b0a      	ldr	r3, [pc, #40]	@ (8021f40 <sys_timeouts_sleeptime+0x64>)
 8021f16:	681b      	ldr	r3, [r3, #0]
 8021f18:	685a      	ldr	r2, [r3, #4]
 8021f1a:	687b      	ldr	r3, [r7, #4]
 8021f1c:	1ad3      	subs	r3, r2, r3
 8021f1e:	603b      	str	r3, [r7, #0]
    LWIP_ASSERT("invalid sleeptime", ret <= LWIP_MAX_TIMEOUT);
 8021f20:	683b      	ldr	r3, [r7, #0]
 8021f22:	2b00      	cmp	r3, #0
 8021f24:	da06      	bge.n	8021f34 <sys_timeouts_sleeptime+0x58>
 8021f26:	4b07      	ldr	r3, [pc, #28]	@ (8021f44 <sys_timeouts_sleeptime+0x68>)
 8021f28:	f44f 72dc 	mov.w	r2, #440	@ 0x1b8
 8021f2c:	4906      	ldr	r1, [pc, #24]	@ (8021f48 <sys_timeouts_sleeptime+0x6c>)
 8021f2e:	4807      	ldr	r0, [pc, #28]	@ (8021f4c <sys_timeouts_sleeptime+0x70>)
 8021f30:	f008 fd94 	bl	802aa5c <iprintf>
    return ret;
 8021f34:	683b      	ldr	r3, [r7, #0]
  }
}
 8021f36:	4618      	mov	r0, r3
 8021f38:	3708      	adds	r7, #8
 8021f3a:	46bd      	mov	sp, r7
 8021f3c:	bd80      	pop	{r7, pc}
 8021f3e:	bf00      	nop
 8021f40:	2402affc 	.word	0x2402affc
 8021f44:	08030c80 	.word	0x08030c80
 8021f48:	08030d54 	.word	0x08030d54
 8021f4c:	08030cf4 	.word	0x08030cf4

08021f50 <udp_init>:
/**
 * Initialize this module.
 */
void
udp_init(void)
{
 8021f50:	b580      	push	{r7, lr}
 8021f52:	af00      	add	r7, sp, #0
#ifdef LWIP_RAND
  udp_port = UDP_ENSURE_LOCAL_PORT_RANGE(LWIP_RAND());
 8021f54:	f007 fa58 	bl	8029408 <rand>
 8021f58:	4603      	mov	r3, r0
 8021f5a:	b29b      	uxth	r3, r3
 8021f5c:	f3c3 030d 	ubfx	r3, r3, #0, #14
 8021f60:	b29b      	uxth	r3, r3
 8021f62:	f5a3 4380 	sub.w	r3, r3, #16384	@ 0x4000
 8021f66:	b29a      	uxth	r2, r3
 8021f68:	4b01      	ldr	r3, [pc, #4]	@ (8021f70 <udp_init+0x20>)
 8021f6a:	801a      	strh	r2, [r3, #0]
#endif /* LWIP_RAND */
}
 8021f6c:	bf00      	nop
 8021f6e:	bd80      	pop	{r7, pc}
 8021f70:	24000054 	.word	0x24000054

08021f74 <udp_new_port>:
 *
 * @return a new (free) local UDP port number
 */
static u16_t
udp_new_port(void)
{
 8021f74:	b480      	push	{r7}
 8021f76:	b083      	sub	sp, #12
 8021f78:	af00      	add	r7, sp, #0
  u16_t n = 0;
 8021f7a:	2300      	movs	r3, #0
 8021f7c:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *pcb;

again:
  if (udp_port++ == UDP_LOCAL_PORT_RANGE_END) {
 8021f7e:	4b17      	ldr	r3, [pc, #92]	@ (8021fdc <udp_new_port+0x68>)
 8021f80:	881b      	ldrh	r3, [r3, #0]
 8021f82:	1c5a      	adds	r2, r3, #1
 8021f84:	b291      	uxth	r1, r2
 8021f86:	4a15      	ldr	r2, [pc, #84]	@ (8021fdc <udp_new_port+0x68>)
 8021f88:	8011      	strh	r1, [r2, #0]
 8021f8a:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 8021f8e:	4293      	cmp	r3, r2
 8021f90:	d103      	bne.n	8021f9a <udp_new_port+0x26>
    udp_port = UDP_LOCAL_PORT_RANGE_START;
 8021f92:	4b12      	ldr	r3, [pc, #72]	@ (8021fdc <udp_new_port+0x68>)
 8021f94:	f44f 4240 	mov.w	r2, #49152	@ 0xc000
 8021f98:	801a      	strh	r2, [r3, #0]
  }
  /* Check all PCBs. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021f9a:	4b11      	ldr	r3, [pc, #68]	@ (8021fe0 <udp_new_port+0x6c>)
 8021f9c:	681b      	ldr	r3, [r3, #0]
 8021f9e:	603b      	str	r3, [r7, #0]
 8021fa0:	e011      	b.n	8021fc6 <udp_new_port+0x52>
    if (pcb->local_port == udp_port) {
 8021fa2:	683b      	ldr	r3, [r7, #0]
 8021fa4:	8a5a      	ldrh	r2, [r3, #18]
 8021fa6:	4b0d      	ldr	r3, [pc, #52]	@ (8021fdc <udp_new_port+0x68>)
 8021fa8:	881b      	ldrh	r3, [r3, #0]
 8021faa:	429a      	cmp	r2, r3
 8021fac:	d108      	bne.n	8021fc0 <udp_new_port+0x4c>
      if (++n > (UDP_LOCAL_PORT_RANGE_END - UDP_LOCAL_PORT_RANGE_START)) {
 8021fae:	88fb      	ldrh	r3, [r7, #6]
 8021fb0:	3301      	adds	r3, #1
 8021fb2:	80fb      	strh	r3, [r7, #6]
 8021fb4:	88fb      	ldrh	r3, [r7, #6]
 8021fb6:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 8021fba:	d3e0      	bcc.n	8021f7e <udp_new_port+0xa>
        return 0;
 8021fbc:	2300      	movs	r3, #0
 8021fbe:	e007      	b.n	8021fd0 <udp_new_port+0x5c>
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8021fc0:	683b      	ldr	r3, [r7, #0]
 8021fc2:	68db      	ldr	r3, [r3, #12]
 8021fc4:	603b      	str	r3, [r7, #0]
 8021fc6:	683b      	ldr	r3, [r7, #0]
 8021fc8:	2b00      	cmp	r3, #0
 8021fca:	d1ea      	bne.n	8021fa2 <udp_new_port+0x2e>
      }
      goto again;
    }
  }
  return udp_port;
 8021fcc:	4b03      	ldr	r3, [pc, #12]	@ (8021fdc <udp_new_port+0x68>)
 8021fce:	881b      	ldrh	r3, [r3, #0]
}
 8021fd0:	4618      	mov	r0, r3
 8021fd2:	370c      	adds	r7, #12
 8021fd4:	46bd      	mov	sp, r7
 8021fd6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8021fda:	4770      	bx	lr
 8021fdc:	24000054 	.word	0x24000054
 8021fe0:	2402b008 	.word	0x2402b008

08021fe4 <udp_input_local_match>:
 * @param broadcast 1 if his is an IPv4 broadcast (global or subnet-only), 0 otherwise (only used for IPv4)
 * @return 1 on match, 0 otherwise
 */
static u8_t
udp_input_local_match(struct udp_pcb *pcb, struct netif *inp, u8_t broadcast)
{
 8021fe4:	b580      	push	{r7, lr}
 8021fe6:	b084      	sub	sp, #16
 8021fe8:	af00      	add	r7, sp, #0
 8021fea:	60f8      	str	r0, [r7, #12]
 8021fec:	60b9      	str	r1, [r7, #8]
 8021fee:	4613      	mov	r3, r2
 8021ff0:	71fb      	strb	r3, [r7, #7]
  LWIP_UNUSED_ARG(inp);       /* in IPv6 only case */
  LWIP_UNUSED_ARG(broadcast); /* in IPv6 only case */

  LWIP_ASSERT("udp_input_local_match: invalid pcb", pcb != NULL);
 8021ff2:	68fb      	ldr	r3, [r7, #12]
 8021ff4:	2b00      	cmp	r3, #0
 8021ff6:	d105      	bne.n	8022004 <udp_input_local_match+0x20>
 8021ff8:	4b27      	ldr	r3, [pc, #156]	@ (8022098 <udp_input_local_match+0xb4>)
 8021ffa:	2287      	movs	r2, #135	@ 0x87
 8021ffc:	4927      	ldr	r1, [pc, #156]	@ (802209c <udp_input_local_match+0xb8>)
 8021ffe:	4828      	ldr	r0, [pc, #160]	@ (80220a0 <udp_input_local_match+0xbc>)
 8022000:	f008 fd2c 	bl	802aa5c <iprintf>
  LWIP_ASSERT("udp_input_local_match: invalid netif", inp != NULL);
 8022004:	68bb      	ldr	r3, [r7, #8]
 8022006:	2b00      	cmp	r3, #0
 8022008:	d105      	bne.n	8022016 <udp_input_local_match+0x32>
 802200a:	4b23      	ldr	r3, [pc, #140]	@ (8022098 <udp_input_local_match+0xb4>)
 802200c:	2288      	movs	r2, #136	@ 0x88
 802200e:	4925      	ldr	r1, [pc, #148]	@ (80220a4 <udp_input_local_match+0xc0>)
 8022010:	4823      	ldr	r0, [pc, #140]	@ (80220a0 <udp_input_local_match+0xbc>)
 8022012:	f008 fd23 	bl	802aa5c <iprintf>

  /* check if PCB is bound to specific netif */
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 8022016:	68fb      	ldr	r3, [r7, #12]
 8022018:	7a1b      	ldrb	r3, [r3, #8]
 802201a:	2b00      	cmp	r3, #0
 802201c:	d00b      	beq.n	8022036 <udp_input_local_match+0x52>
      (pcb->netif_idx != netif_get_index(ip_data.current_input_netif))) {
 802201e:	68fb      	ldr	r3, [r7, #12]
 8022020:	7a1a      	ldrb	r2, [r3, #8]
 8022022:	4b21      	ldr	r3, [pc, #132]	@ (80220a8 <udp_input_local_match+0xc4>)
 8022024:	685b      	ldr	r3, [r3, #4]
 8022026:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 802202a:	3301      	adds	r3, #1
 802202c:	b2db      	uxtb	r3, r3
  if ((pcb->netif_idx != NETIF_NO_INDEX) &&
 802202e:	429a      	cmp	r2, r3
 8022030:	d001      	beq.n	8022036 <udp_input_local_match+0x52>
    return 0;
 8022032:	2300      	movs	r3, #0
 8022034:	e02b      	b.n	802208e <udp_input_local_match+0xaa>
  /* Only need to check PCB if incoming IP version matches PCB IP version */
  if (IP_ADDR_PCB_VERSION_MATCH_EXACT(pcb, ip_current_dest_addr())) {
#if LWIP_IPV4
    /* Special case: IPv4 broadcast: all or broadcasts in my subnet
     * Note: broadcast variable can only be 1 if it is an IPv4 broadcast */
    if (broadcast != 0) {
 8022036:	79fb      	ldrb	r3, [r7, #7]
 8022038:	2b00      	cmp	r3, #0
 802203a:	d018      	beq.n	802206e <udp_input_local_match+0x8a>
#if IP_SOF_BROADCAST_RECV
      if (ip_get_option(pcb, SOF_BROADCAST))
#endif /* IP_SOF_BROADCAST_RECV */
      {
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 802203c:	68fb      	ldr	r3, [r7, #12]
 802203e:	2b00      	cmp	r3, #0
 8022040:	d013      	beq.n	802206a <udp_input_local_match+0x86>
 8022042:	68fb      	ldr	r3, [r7, #12]
 8022044:	681b      	ldr	r3, [r3, #0]
 8022046:	2b00      	cmp	r3, #0
 8022048:	d00f      	beq.n	802206a <udp_input_local_match+0x86>
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 802204a:	4b17      	ldr	r3, [pc, #92]	@ (80220a8 <udp_input_local_match+0xc4>)
 802204c:	695b      	ldr	r3, [r3, #20]
        if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 802204e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8022052:	d00a      	beq.n	802206a <udp_input_local_match+0x86>
            ip4_addr_netcmp(ip_2_ip4(&pcb->local_ip), ip4_current_dest_addr(), netif_ip4_netmask(inp))) {
 8022054:	68fb      	ldr	r3, [r7, #12]
 8022056:	681a      	ldr	r2, [r3, #0]
 8022058:	4b13      	ldr	r3, [pc, #76]	@ (80220a8 <udp_input_local_match+0xc4>)
 802205a:	695b      	ldr	r3, [r3, #20]
 802205c:	405a      	eors	r2, r3
 802205e:	68bb      	ldr	r3, [r7, #8]
 8022060:	3308      	adds	r3, #8
 8022062:	681b      	ldr	r3, [r3, #0]
 8022064:	4013      	ands	r3, r2
            ((ip4_current_dest_addr()->addr == IPADDR_BROADCAST)) ||
 8022066:	2b00      	cmp	r3, #0
 8022068:	d110      	bne.n	802208c <udp_input_local_match+0xa8>
          return 1;
 802206a:	2301      	movs	r3, #1
 802206c:	e00f      	b.n	802208e <udp_input_local_match+0xaa>
        }
      }
    } else
#endif /* LWIP_IPV4 */
      /* Handle IPv4 and IPv6: all or exact match */
      if (ip_addr_isany(&pcb->local_ip) || ip_addr_cmp(&pcb->local_ip, ip_current_dest_addr())) {
 802206e:	68fb      	ldr	r3, [r7, #12]
 8022070:	2b00      	cmp	r3, #0
 8022072:	d009      	beq.n	8022088 <udp_input_local_match+0xa4>
 8022074:	68fb      	ldr	r3, [r7, #12]
 8022076:	681b      	ldr	r3, [r3, #0]
 8022078:	2b00      	cmp	r3, #0
 802207a:	d005      	beq.n	8022088 <udp_input_local_match+0xa4>
 802207c:	68fb      	ldr	r3, [r7, #12]
 802207e:	681a      	ldr	r2, [r3, #0]
 8022080:	4b09      	ldr	r3, [pc, #36]	@ (80220a8 <udp_input_local_match+0xc4>)
 8022082:	695b      	ldr	r3, [r3, #20]
 8022084:	429a      	cmp	r2, r3
 8022086:	d101      	bne.n	802208c <udp_input_local_match+0xa8>
        return 1;
 8022088:	2301      	movs	r3, #1
 802208a:	e000      	b.n	802208e <udp_input_local_match+0xaa>
      }
  }

  return 0;
 802208c:	2300      	movs	r3, #0
}
 802208e:	4618      	mov	r0, r3
 8022090:	3710      	adds	r7, #16
 8022092:	46bd      	mov	sp, r7
 8022094:	bd80      	pop	{r7, pc}
 8022096:	bf00      	nop
 8022098:	08030d68 	.word	0x08030d68
 802209c:	08030d98 	.word	0x08030d98
 80220a0:	08030dbc 	.word	0x08030dbc
 80220a4:	08030de4 	.word	0x08030de4
 80220a8:	24024458 	.word	0x24024458

080220ac <udp_input>:
 * @param inp network interface on which the datagram was received.
 *
 */
void
udp_input(struct pbuf *p, struct netif *inp)
{
 80220ac:	b590      	push	{r4, r7, lr}
 80220ae:	b08d      	sub	sp, #52	@ 0x34
 80220b0:	af02      	add	r7, sp, #8
 80220b2:	6078      	str	r0, [r7, #4]
 80220b4:	6039      	str	r1, [r7, #0]
  struct udp_hdr *udphdr;
  struct udp_pcb *pcb, *prev;
  struct udp_pcb *uncon_pcb;
  u16_t src, dest;
  u8_t broadcast;
  u8_t for_us = 0;
 80220b6:	2300      	movs	r3, #0
 80220b8:	77fb      	strb	r3, [r7, #31]

  LWIP_UNUSED_ARG(inp);

  LWIP_ASSERT_CORE_LOCKED();
 80220ba:	f7ef f8a3 	bl	8011204 <sys_check_core_locking>

  LWIP_ASSERT("udp_input: invalid pbuf", p != NULL);
 80220be:	687b      	ldr	r3, [r7, #4]
 80220c0:	2b00      	cmp	r3, #0
 80220c2:	d105      	bne.n	80220d0 <udp_input+0x24>
 80220c4:	4b7c      	ldr	r3, [pc, #496]	@ (80222b8 <udp_input+0x20c>)
 80220c6:	22cf      	movs	r2, #207	@ 0xcf
 80220c8:	497c      	ldr	r1, [pc, #496]	@ (80222bc <udp_input+0x210>)
 80220ca:	487d      	ldr	r0, [pc, #500]	@ (80222c0 <udp_input+0x214>)
 80220cc:	f008 fcc6 	bl	802aa5c <iprintf>
  LWIP_ASSERT("udp_input: invalid netif", inp != NULL);
 80220d0:	683b      	ldr	r3, [r7, #0]
 80220d2:	2b00      	cmp	r3, #0
 80220d4:	d105      	bne.n	80220e2 <udp_input+0x36>
 80220d6:	4b78      	ldr	r3, [pc, #480]	@ (80222b8 <udp_input+0x20c>)
 80220d8:	22d0      	movs	r2, #208	@ 0xd0
 80220da:	497a      	ldr	r1, [pc, #488]	@ (80222c4 <udp_input+0x218>)
 80220dc:	4878      	ldr	r0, [pc, #480]	@ (80222c0 <udp_input+0x214>)
 80220de:	f008 fcbd 	bl	802aa5c <iprintf>
  PERF_START;

  UDP_STATS_INC(udp.recv);

  /* Check minimum length (UDP header) */
  if (p->len < UDP_HLEN) {
 80220e2:	687b      	ldr	r3, [r7, #4]
 80220e4:	895b      	ldrh	r3, [r3, #10]
 80220e6:	2b07      	cmp	r3, #7
 80220e8:	d803      	bhi.n	80220f2 <udp_input+0x46>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len));
    UDP_STATS_INC(udp.lenerr);
    UDP_STATS_INC(udp.drop);
    MIB2_STATS_INC(mib2.udpinerrors);
    pbuf_free(p);
 80220ea:	6878      	ldr	r0, [r7, #4]
 80220ec:	f7f9 fa3e 	bl	801b56c <pbuf_free>
    goto end;
 80220f0:	e0de      	b.n	80222b0 <udp_input+0x204>
  }

  udphdr = (struct udp_hdr *)p->payload;
 80220f2:	687b      	ldr	r3, [r7, #4]
 80220f4:	685b      	ldr	r3, [r3, #4]
 80220f6:	617b      	str	r3, [r7, #20]

  /* is broadcast packet ? */
  broadcast = ip_addr_isbroadcast(ip_current_dest_addr(), ip_current_netif());
 80220f8:	4b73      	ldr	r3, [pc, #460]	@ (80222c8 <udp_input+0x21c>)
 80220fa:	695b      	ldr	r3, [r3, #20]
 80220fc:	4a72      	ldr	r2, [pc, #456]	@ (80222c8 <udp_input+0x21c>)
 80220fe:	6812      	ldr	r2, [r2, #0]
 8022100:	4611      	mov	r1, r2
 8022102:	4618      	mov	r0, r3
 8022104:	f003 ff54 	bl	8025fb0 <ip4_addr_isbroadcast_u32>
 8022108:	4603      	mov	r3, r0
 802210a:	74fb      	strb	r3, [r7, #19]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len));

  /* convert src and dest ports to host byte order */
  src = lwip_ntohs(udphdr->src);
 802210c:	697b      	ldr	r3, [r7, #20]
 802210e:	881b      	ldrh	r3, [r3, #0]
 8022110:	b29b      	uxth	r3, r3
 8022112:	4618      	mov	r0, r3
 8022114:	f7f7 fd48 	bl	8019ba8 <lwip_htons>
 8022118:	4603      	mov	r3, r0
 802211a:	823b      	strh	r3, [r7, #16]
  dest = lwip_ntohs(udphdr->dest);
 802211c:	697b      	ldr	r3, [r7, #20]
 802211e:	885b      	ldrh	r3, [r3, #2]
 8022120:	b29b      	uxth	r3, r3
 8022122:	4618      	mov	r0, r3
 8022124:	f7f7 fd40 	bl	8019ba8 <lwip_htons>
 8022128:	4603      	mov	r3, r0
 802212a:	81fb      	strh	r3, [r7, #14]
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_dest_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", lwip_ntohs(udphdr->dest)));
  ip_addr_debug_print_val(UDP_DEBUG, *ip_current_src_addr());
  LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", lwip_ntohs(udphdr->src)));

  pcb = NULL;
 802212c:	2300      	movs	r3, #0
 802212e:	623b      	str	r3, [r7, #32]
  prev = NULL;
 8022130:	2300      	movs	r3, #0
 8022132:	627b      	str	r3, [r7, #36]	@ 0x24
  uncon_pcb = NULL;
 8022134:	2300      	movs	r3, #0
 8022136:	61bb      	str	r3, [r7, #24]
  /* Iterate through the UDP pcb list for a matching pcb.
   * 'Perfect match' pcbs (connected to the remote port & ip address) are
   * preferred. If no perfect match is found, the first unconnected pcb that
   * matches the local port and ip address gets the datagram. */
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 8022138:	4b64      	ldr	r3, [pc, #400]	@ (80222cc <udp_input+0x220>)
 802213a:	681b      	ldr	r3, [r3, #0]
 802213c:	623b      	str	r3, [r7, #32]
 802213e:	e054      	b.n	80221ea <udp_input+0x13e>
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F") <-- (", pcb->local_port));
    ip_addr_debug_print_val(UDP_DEBUG, pcb->remote_ip);
    LWIP_DEBUGF(UDP_DEBUG, (", %"U16_F")\n", pcb->remote_port));

    /* compare PCB local addr+port to UDP destination addr+port */
    if ((pcb->local_port == dest) &&
 8022140:	6a3b      	ldr	r3, [r7, #32]
 8022142:	8a5b      	ldrh	r3, [r3, #18]
 8022144:	89fa      	ldrh	r2, [r7, #14]
 8022146:	429a      	cmp	r2, r3
 8022148:	d14a      	bne.n	80221e0 <udp_input+0x134>
        (udp_input_local_match(pcb, inp, broadcast) != 0)) {
 802214a:	7cfb      	ldrb	r3, [r7, #19]
 802214c:	461a      	mov	r2, r3
 802214e:	6839      	ldr	r1, [r7, #0]
 8022150:	6a38      	ldr	r0, [r7, #32]
 8022152:	f7ff ff47 	bl	8021fe4 <udp_input_local_match>
 8022156:	4603      	mov	r3, r0
    if ((pcb->local_port == dest) &&
 8022158:	2b00      	cmp	r3, #0
 802215a:	d041      	beq.n	80221e0 <udp_input+0x134>
      if ((pcb->flags & UDP_FLAGS_CONNECTED) == 0) {
 802215c:	6a3b      	ldr	r3, [r7, #32]
 802215e:	7c1b      	ldrb	r3, [r3, #16]
 8022160:	f003 0304 	and.w	r3, r3, #4
 8022164:	2b00      	cmp	r3, #0
 8022166:	d11d      	bne.n	80221a4 <udp_input+0xf8>
        if (uncon_pcb == NULL) {
 8022168:	69bb      	ldr	r3, [r7, #24]
 802216a:	2b00      	cmp	r3, #0
 802216c:	d102      	bne.n	8022174 <udp_input+0xc8>
          /* the first unconnected matching PCB */
          uncon_pcb = pcb;
 802216e:	6a3b      	ldr	r3, [r7, #32]
 8022170:	61bb      	str	r3, [r7, #24]
 8022172:	e017      	b.n	80221a4 <udp_input+0xf8>
#if LWIP_IPV4
        } else if (broadcast && ip4_current_dest_addr()->addr == IPADDR_BROADCAST) {
 8022174:	7cfb      	ldrb	r3, [r7, #19]
 8022176:	2b00      	cmp	r3, #0
 8022178:	d014      	beq.n	80221a4 <udp_input+0xf8>
 802217a:	4b53      	ldr	r3, [pc, #332]	@ (80222c8 <udp_input+0x21c>)
 802217c:	695b      	ldr	r3, [r3, #20]
 802217e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8022182:	d10f      	bne.n	80221a4 <udp_input+0xf8>
          /* global broadcast address (only valid for IPv4; match was checked before) */
          if (!IP_IS_V4_VAL(uncon_pcb->local_ip) || !ip4_addr_cmp(ip_2_ip4(&uncon_pcb->local_ip), netif_ip4_addr(inp))) {
 8022184:	69bb      	ldr	r3, [r7, #24]
 8022186:	681a      	ldr	r2, [r3, #0]
 8022188:	683b      	ldr	r3, [r7, #0]
 802218a:	3304      	adds	r3, #4
 802218c:	681b      	ldr	r3, [r3, #0]
 802218e:	429a      	cmp	r2, r3
 8022190:	d008      	beq.n	80221a4 <udp_input+0xf8>
            /* uncon_pcb does not match the input netif, check this pcb */
            if (IP_IS_V4_VAL(pcb->local_ip) && ip4_addr_cmp(ip_2_ip4(&pcb->local_ip), netif_ip4_addr(inp))) {
 8022192:	6a3b      	ldr	r3, [r7, #32]
 8022194:	681a      	ldr	r2, [r3, #0]
 8022196:	683b      	ldr	r3, [r7, #0]
 8022198:	3304      	adds	r3, #4
 802219a:	681b      	ldr	r3, [r3, #0]
 802219c:	429a      	cmp	r2, r3
 802219e:	d101      	bne.n	80221a4 <udp_input+0xf8>
              /* better match */
              uncon_pcb = pcb;
 80221a0:	6a3b      	ldr	r3, [r7, #32]
 80221a2:	61bb      	str	r3, [r7, #24]
        }
#endif /* SO_REUSE */
      }

      /* compare PCB remote addr+port to UDP source addr+port */
      if ((pcb->remote_port == src) &&
 80221a4:	6a3b      	ldr	r3, [r7, #32]
 80221a6:	8a9b      	ldrh	r3, [r3, #20]
 80221a8:	8a3a      	ldrh	r2, [r7, #16]
 80221aa:	429a      	cmp	r2, r3
 80221ac:	d118      	bne.n	80221e0 <udp_input+0x134>
          (ip_addr_isany_val(pcb->remote_ip) ||
 80221ae:	6a3b      	ldr	r3, [r7, #32]
 80221b0:	685b      	ldr	r3, [r3, #4]
      if ((pcb->remote_port == src) &&
 80221b2:	2b00      	cmp	r3, #0
 80221b4:	d005      	beq.n	80221c2 <udp_input+0x116>
           ip_addr_cmp(&pcb->remote_ip, ip_current_src_addr()))) {
 80221b6:	6a3b      	ldr	r3, [r7, #32]
 80221b8:	685a      	ldr	r2, [r3, #4]
 80221ba:	4b43      	ldr	r3, [pc, #268]	@ (80222c8 <udp_input+0x21c>)
 80221bc:	691b      	ldr	r3, [r3, #16]
          (ip_addr_isany_val(pcb->remote_ip) ||
 80221be:	429a      	cmp	r2, r3
 80221c0:	d10e      	bne.n	80221e0 <udp_input+0x134>
        /* the first fully matching PCB */
        if (prev != NULL) {
 80221c2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80221c4:	2b00      	cmp	r3, #0
 80221c6:	d014      	beq.n	80221f2 <udp_input+0x146>
          /* move the pcb to the front of udp_pcbs so that is
             found faster next time */
          prev->next = pcb->next;
 80221c8:	6a3b      	ldr	r3, [r7, #32]
 80221ca:	68da      	ldr	r2, [r3, #12]
 80221cc:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80221ce:	60da      	str	r2, [r3, #12]
          pcb->next = udp_pcbs;
 80221d0:	4b3e      	ldr	r3, [pc, #248]	@ (80222cc <udp_input+0x220>)
 80221d2:	681a      	ldr	r2, [r3, #0]
 80221d4:	6a3b      	ldr	r3, [r7, #32]
 80221d6:	60da      	str	r2, [r3, #12]
          udp_pcbs = pcb;
 80221d8:	4a3c      	ldr	r2, [pc, #240]	@ (80222cc <udp_input+0x220>)
 80221da:	6a3b      	ldr	r3, [r7, #32]
 80221dc:	6013      	str	r3, [r2, #0]
        } else {
          UDP_STATS_INC(udp.cachehit);
        }
        break;
 80221de:	e008      	b.n	80221f2 <udp_input+0x146>
      }
    }

    prev = pcb;
 80221e0:	6a3b      	ldr	r3, [r7, #32]
 80221e2:	627b      	str	r3, [r7, #36]	@ 0x24
  for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
 80221e4:	6a3b      	ldr	r3, [r7, #32]
 80221e6:	68db      	ldr	r3, [r3, #12]
 80221e8:	623b      	str	r3, [r7, #32]
 80221ea:	6a3b      	ldr	r3, [r7, #32]
 80221ec:	2b00      	cmp	r3, #0
 80221ee:	d1a7      	bne.n	8022140 <udp_input+0x94>
 80221f0:	e000      	b.n	80221f4 <udp_input+0x148>
        break;
 80221f2:	bf00      	nop
  }
  /* no fully matching pcb found? then look for an unconnected pcb */
  if (pcb == NULL) {
 80221f4:	6a3b      	ldr	r3, [r7, #32]
 80221f6:	2b00      	cmp	r3, #0
 80221f8:	d101      	bne.n	80221fe <udp_input+0x152>
    pcb = uncon_pcb;
 80221fa:	69bb      	ldr	r3, [r7, #24]
 80221fc:	623b      	str	r3, [r7, #32]
  }

  /* Check checksum if this is a match or if it was directed at us. */
  if (pcb != NULL) {
 80221fe:	6a3b      	ldr	r3, [r7, #32]
 8022200:	2b00      	cmp	r3, #0
 8022202:	d002      	beq.n	802220a <udp_input+0x15e>
    for_us = 1;
 8022204:	2301      	movs	r3, #1
 8022206:	77fb      	strb	r3, [r7, #31]
 8022208:	e00a      	b.n	8022220 <udp_input+0x174>
      for_us = netif_get_ip6_addr_match(inp, ip6_current_dest_addr()) >= 0;
    }
#endif /* LWIP_IPV6 */
#if LWIP_IPV4
    if (!ip_current_is_v6()) {
      for_us = ip4_addr_cmp(netif_ip4_addr(inp), ip4_current_dest_addr());
 802220a:	683b      	ldr	r3, [r7, #0]
 802220c:	3304      	adds	r3, #4
 802220e:	681a      	ldr	r2, [r3, #0]
 8022210:	4b2d      	ldr	r3, [pc, #180]	@ (80222c8 <udp_input+0x21c>)
 8022212:	695b      	ldr	r3, [r3, #20]
 8022214:	429a      	cmp	r2, r3
 8022216:	bf0c      	ite	eq
 8022218:	2301      	moveq	r3, #1
 802221a:	2300      	movne	r3, #0
 802221c:	b2db      	uxtb	r3, r3
 802221e:	77fb      	strb	r3, [r7, #31]
    }
#endif /* LWIP_IPV4 */
  }

  if (for_us) {
 8022220:	7ffb      	ldrb	r3, [r7, #31]
 8022222:	2b00      	cmp	r3, #0
 8022224:	d041      	beq.n	80222aa <udp_input+0x1fe>
          }
        }
      }
    }
#endif /* CHECKSUM_CHECK_UDP */
    if (pbuf_remove_header(p, UDP_HLEN)) {
 8022226:	2108      	movs	r1, #8
 8022228:	6878      	ldr	r0, [r7, #4]
 802222a:	f7f9 f8e7 	bl	801b3fc <pbuf_remove_header>
 802222e:	4603      	mov	r3, r0
 8022230:	2b00      	cmp	r3, #0
 8022232:	d00a      	beq.n	802224a <udp_input+0x19e>
      /* Can we cope with this failing? Just assert for now */
      LWIP_ASSERT("pbuf_remove_header failed\n", 0);
 8022234:	4b20      	ldr	r3, [pc, #128]	@ (80222b8 <udp_input+0x20c>)
 8022236:	f44f 72b8 	mov.w	r2, #368	@ 0x170
 802223a:	4925      	ldr	r1, [pc, #148]	@ (80222d0 <udp_input+0x224>)
 802223c:	4820      	ldr	r0, [pc, #128]	@ (80222c0 <udp_input+0x214>)
 802223e:	f008 fc0d 	bl	802aa5c <iprintf>
      UDP_STATS_INC(udp.drop);
      MIB2_STATS_INC(mib2.udpinerrors);
      pbuf_free(p);
 8022242:	6878      	ldr	r0, [r7, #4]
 8022244:	f7f9 f992 	bl	801b56c <pbuf_free>
      goto end;
 8022248:	e032      	b.n	80222b0 <udp_input+0x204>
    }

    if (pcb != NULL) {
 802224a:	6a3b      	ldr	r3, [r7, #32]
 802224c:	2b00      	cmp	r3, #0
 802224e:	d012      	beq.n	8022276 <udp_input+0x1ca>
          }
        }
      }
#endif /* SO_REUSE && SO_REUSE_RXTOALL */
      /* callback */
      if (pcb->recv != NULL) {
 8022250:	6a3b      	ldr	r3, [r7, #32]
 8022252:	699b      	ldr	r3, [r3, #24]
 8022254:	2b00      	cmp	r3, #0
 8022256:	d00a      	beq.n	802226e <udp_input+0x1c2>
        /* now the recv function is responsible for freeing p */
        pcb->recv(pcb->recv_arg, pcb, p, ip_current_src_addr(), src);
 8022258:	6a3b      	ldr	r3, [r7, #32]
 802225a:	699c      	ldr	r4, [r3, #24]
 802225c:	6a3b      	ldr	r3, [r7, #32]
 802225e:	69d8      	ldr	r0, [r3, #28]
 8022260:	8a3b      	ldrh	r3, [r7, #16]
 8022262:	9300      	str	r3, [sp, #0]
 8022264:	4b1b      	ldr	r3, [pc, #108]	@ (80222d4 <udp_input+0x228>)
 8022266:	687a      	ldr	r2, [r7, #4]
 8022268:	6a39      	ldr	r1, [r7, #32]
 802226a:	47a0      	blx	r4
  } else {
    pbuf_free(p);
  }
end:
  PERF_STOP("udp_input");
  return;
 802226c:	e021      	b.n	80222b2 <udp_input+0x206>
        pbuf_free(p);
 802226e:	6878      	ldr	r0, [r7, #4]
 8022270:	f7f9 f97c 	bl	801b56c <pbuf_free>
        goto end;
 8022274:	e01c      	b.n	80222b0 <udp_input+0x204>
      if (!broadcast && !ip_addr_ismulticast(ip_current_dest_addr())) {
 8022276:	7cfb      	ldrb	r3, [r7, #19]
 8022278:	2b00      	cmp	r3, #0
 802227a:	d112      	bne.n	80222a2 <udp_input+0x1f6>
 802227c:	4b12      	ldr	r3, [pc, #72]	@ (80222c8 <udp_input+0x21c>)
 802227e:	695b      	ldr	r3, [r3, #20]
 8022280:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8022284:	2be0      	cmp	r3, #224	@ 0xe0
 8022286:	d00c      	beq.n	80222a2 <udp_input+0x1f6>
        pbuf_header_force(p, (s16_t)(ip_current_header_tot_len() + UDP_HLEN));
 8022288:	4b0f      	ldr	r3, [pc, #60]	@ (80222c8 <udp_input+0x21c>)
 802228a:	899b      	ldrh	r3, [r3, #12]
 802228c:	3308      	adds	r3, #8
 802228e:	b29b      	uxth	r3, r3
 8022290:	b21b      	sxth	r3, r3
 8022292:	4619      	mov	r1, r3
 8022294:	6878      	ldr	r0, [r7, #4]
 8022296:	f7f9 f924 	bl	801b4e2 <pbuf_header_force>
        icmp_port_unreach(ip_current_is_v6(), p);
 802229a:	2103      	movs	r1, #3
 802229c:	6878      	ldr	r0, [r7, #4]
 802229e:	f003 fb3b 	bl	8025918 <icmp_dest_unreach>
      pbuf_free(p);
 80222a2:	6878      	ldr	r0, [r7, #4]
 80222a4:	f7f9 f962 	bl	801b56c <pbuf_free>
  return;
 80222a8:	e003      	b.n	80222b2 <udp_input+0x206>
    pbuf_free(p);
 80222aa:	6878      	ldr	r0, [r7, #4]
 80222ac:	f7f9 f95e 	bl	801b56c <pbuf_free>
  return;
 80222b0:	bf00      	nop
  UDP_STATS_INC(udp.drop);
  MIB2_STATS_INC(mib2.udpinerrors);
  pbuf_free(p);
  PERF_STOP("udp_input");
#endif /* CHECKSUM_CHECK_UDP */
}
 80222b2:	372c      	adds	r7, #44	@ 0x2c
 80222b4:	46bd      	mov	sp, r7
 80222b6:	bd90      	pop	{r4, r7, pc}
 80222b8:	08030d68 	.word	0x08030d68
 80222bc:	08030e0c 	.word	0x08030e0c
 80222c0:	08030dbc 	.word	0x08030dbc
 80222c4:	08030e24 	.word	0x08030e24
 80222c8:	24024458 	.word	0x24024458
 80222cc:	2402b008 	.word	0x2402b008
 80222d0:	08030e40 	.word	0x08030e40
 80222d4:	24024468 	.word	0x24024468

080222d8 <udp_send>:
 *
 * @see udp_disconnect() udp_sendto()
 */
err_t
udp_send(struct udp_pcb *pcb, struct pbuf *p)
{
 80222d8:	b580      	push	{r7, lr}
 80222da:	b082      	sub	sp, #8
 80222dc:	af00      	add	r7, sp, #0
 80222de:	6078      	str	r0, [r7, #4]
 80222e0:	6039      	str	r1, [r7, #0]
  LWIP_ERROR("udp_send: invalid pcb", pcb != NULL, return ERR_ARG);
 80222e2:	687b      	ldr	r3, [r7, #4]
 80222e4:	2b00      	cmp	r3, #0
 80222e6:	d109      	bne.n	80222fc <udp_send+0x24>
 80222e8:	4b11      	ldr	r3, [pc, #68]	@ (8022330 <udp_send+0x58>)
 80222ea:	f240 12d5 	movw	r2, #469	@ 0x1d5
 80222ee:	4911      	ldr	r1, [pc, #68]	@ (8022334 <udp_send+0x5c>)
 80222f0:	4811      	ldr	r0, [pc, #68]	@ (8022338 <udp_send+0x60>)
 80222f2:	f008 fbb3 	bl	802aa5c <iprintf>
 80222f6:	f06f 030f 	mvn.w	r3, #15
 80222fa:	e015      	b.n	8022328 <udp_send+0x50>
  LWIP_ERROR("udp_send: invalid pbuf", p != NULL, return ERR_ARG);
 80222fc:	683b      	ldr	r3, [r7, #0]
 80222fe:	2b00      	cmp	r3, #0
 8022300:	d109      	bne.n	8022316 <udp_send+0x3e>
 8022302:	4b0b      	ldr	r3, [pc, #44]	@ (8022330 <udp_send+0x58>)
 8022304:	f44f 72eb 	mov.w	r2, #470	@ 0x1d6
 8022308:	490c      	ldr	r1, [pc, #48]	@ (802233c <udp_send+0x64>)
 802230a:	480b      	ldr	r0, [pc, #44]	@ (8022338 <udp_send+0x60>)
 802230c:	f008 fba6 	bl	802aa5c <iprintf>
 8022310:	f06f 030f 	mvn.w	r3, #15
 8022314:	e008      	b.n	8022328 <udp_send+0x50>
  if (IP_IS_ANY_TYPE_VAL(pcb->remote_ip)) {
    return ERR_VAL;
  }

  /* send to the packet using remote ip and port stored in the pcb */
  return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port);
 8022316:	687b      	ldr	r3, [r7, #4]
 8022318:	1d1a      	adds	r2, r3, #4
 802231a:	687b      	ldr	r3, [r7, #4]
 802231c:	8a9b      	ldrh	r3, [r3, #20]
 802231e:	6839      	ldr	r1, [r7, #0]
 8022320:	6878      	ldr	r0, [r7, #4]
 8022322:	f000 f80d 	bl	8022340 <udp_sendto>
 8022326:	4603      	mov	r3, r0
}
 8022328:	4618      	mov	r0, r3
 802232a:	3708      	adds	r7, #8
 802232c:	46bd      	mov	sp, r7
 802232e:	bd80      	pop	{r7, pc}
 8022330:	08030d68 	.word	0x08030d68
 8022334:	08030e5c 	.word	0x08030e5c
 8022338:	08030dbc 	.word	0x08030dbc
 802233c:	08030e74 	.word	0x08030e74

08022340 <udp_sendto>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto(struct udp_pcb *pcb, struct pbuf *p,
           const ip_addr_t *dst_ip, u16_t dst_port)
{
 8022340:	b580      	push	{r7, lr}
 8022342:	b088      	sub	sp, #32
 8022344:	af02      	add	r7, sp, #8
 8022346:	60f8      	str	r0, [r7, #12]
 8022348:	60b9      	str	r1, [r7, #8]
 802234a:	607a      	str	r2, [r7, #4]
 802234c:	807b      	strh	r3, [r7, #2]
                  u16_t dst_port, u8_t have_chksum, u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  struct netif *netif;

  LWIP_ERROR("udp_sendto: invalid pcb", pcb != NULL, return ERR_ARG);
 802234e:	68fb      	ldr	r3, [r7, #12]
 8022350:	2b00      	cmp	r3, #0
 8022352:	d109      	bne.n	8022368 <udp_sendto+0x28>
 8022354:	4b23      	ldr	r3, [pc, #140]	@ (80223e4 <udp_sendto+0xa4>)
 8022356:	f44f 7206 	mov.w	r2, #536	@ 0x218
 802235a:	4923      	ldr	r1, [pc, #140]	@ (80223e8 <udp_sendto+0xa8>)
 802235c:	4823      	ldr	r0, [pc, #140]	@ (80223ec <udp_sendto+0xac>)
 802235e:	f008 fb7d 	bl	802aa5c <iprintf>
 8022362:	f06f 030f 	mvn.w	r3, #15
 8022366:	e038      	b.n	80223da <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid pbuf", p != NULL, return ERR_ARG);
 8022368:	68bb      	ldr	r3, [r7, #8]
 802236a:	2b00      	cmp	r3, #0
 802236c:	d109      	bne.n	8022382 <udp_sendto+0x42>
 802236e:	4b1d      	ldr	r3, [pc, #116]	@ (80223e4 <udp_sendto+0xa4>)
 8022370:	f240 2219 	movw	r2, #537	@ 0x219
 8022374:	491e      	ldr	r1, [pc, #120]	@ (80223f0 <udp_sendto+0xb0>)
 8022376:	481d      	ldr	r0, [pc, #116]	@ (80223ec <udp_sendto+0xac>)
 8022378:	f008 fb70 	bl	802aa5c <iprintf>
 802237c:	f06f 030f 	mvn.w	r3, #15
 8022380:	e02b      	b.n	80223da <udp_sendto+0x9a>
  LWIP_ERROR("udp_sendto: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8022382:	687b      	ldr	r3, [r7, #4]
 8022384:	2b00      	cmp	r3, #0
 8022386:	d109      	bne.n	802239c <udp_sendto+0x5c>
 8022388:	4b16      	ldr	r3, [pc, #88]	@ (80223e4 <udp_sendto+0xa4>)
 802238a:	f240 221a 	movw	r2, #538	@ 0x21a
 802238e:	4919      	ldr	r1, [pc, #100]	@ (80223f4 <udp_sendto+0xb4>)
 8022390:	4816      	ldr	r0, [pc, #88]	@ (80223ec <udp_sendto+0xac>)
 8022392:	f008 fb63 	bl	802aa5c <iprintf>
 8022396:	f06f 030f 	mvn.w	r3, #15
 802239a:	e01e      	b.n	80223da <udp_sendto+0x9a>
    return ERR_VAL;
  }

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n"));

  if (pcb->netif_idx != NETIF_NO_INDEX) {
 802239c:	68fb      	ldr	r3, [r7, #12]
 802239e:	7a1b      	ldrb	r3, [r3, #8]
 80223a0:	2b00      	cmp	r3, #0
 80223a2:	d006      	beq.n	80223b2 <udp_sendto+0x72>
    netif = netif_get_by_index(pcb->netif_idx);
 80223a4:	68fb      	ldr	r3, [r7, #12]
 80223a6:	7a1b      	ldrb	r3, [r3, #8]
 80223a8:	4618      	mov	r0, r3
 80223aa:	f7f8 fd1f 	bl	801adec <netif_get_by_index>
 80223ae:	6178      	str	r0, [r7, #20]
 80223b0:	e003      	b.n	80223ba <udp_sendto+0x7a>

    if (netif == NULL)
#endif /* LWIP_MULTICAST_TX_OPTIONS */
    {
      /* find the outgoing network interface for this packet */
      netif = ip_route(&pcb->local_ip, dst_ip);
 80223b2:	6878      	ldr	r0, [r7, #4]
 80223b4:	f003 fb44 	bl	8025a40 <ip4_route>
 80223b8:	6178      	str	r0, [r7, #20]
    }
  }

  /* no outgoing network interface could be found? */
  if (netif == NULL) {
 80223ba:	697b      	ldr	r3, [r7, #20]
 80223bc:	2b00      	cmp	r3, #0
 80223be:	d102      	bne.n	80223c6 <udp_sendto+0x86>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to "));
    ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, dst_ip);
    LWIP_DEBUGF(UDP_DEBUG, ("\n"));
    UDP_STATS_INC(udp.rterr);
    return ERR_RTE;
 80223c0:	f06f 0303 	mvn.w	r3, #3
 80223c4:	e009      	b.n	80223da <udp_sendto+0x9a>
  }
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if(pcb, p, dst_ip, dst_port, netif);
 80223c6:	887a      	ldrh	r2, [r7, #2]
 80223c8:	697b      	ldr	r3, [r7, #20]
 80223ca:	9300      	str	r3, [sp, #0]
 80223cc:	4613      	mov	r3, r2
 80223ce:	687a      	ldr	r2, [r7, #4]
 80223d0:	68b9      	ldr	r1, [r7, #8]
 80223d2:	68f8      	ldr	r0, [r7, #12]
 80223d4:	f000 f810 	bl	80223f8 <udp_sendto_if>
 80223d8:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 80223da:	4618      	mov	r0, r3
 80223dc:	3718      	adds	r7, #24
 80223de:	46bd      	mov	sp, r7
 80223e0:	bd80      	pop	{r7, pc}
 80223e2:	bf00      	nop
 80223e4:	08030d68 	.word	0x08030d68
 80223e8:	08030e8c 	.word	0x08030e8c
 80223ec:	08030dbc 	.word	0x08030dbc
 80223f0:	08030ea4 	.word	0x08030ea4
 80223f4:	08030ec0 	.word	0x08030ec0

080223f8 <udp_sendto_if>:
 * @see udp_disconnect() udp_send()
 */
err_t
udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p,
              const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif)
{
 80223f8:	b580      	push	{r7, lr}
 80223fa:	b088      	sub	sp, #32
 80223fc:	af02      	add	r7, sp, #8
 80223fe:	60f8      	str	r0, [r7, #12]
 8022400:	60b9      	str	r1, [r7, #8]
 8022402:	607a      	str	r2, [r7, #4]
 8022404:	807b      	strh	r3, [r7, #2]
                     u16_t chksum)
{
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  const ip_addr_t *src_ip;

  LWIP_ERROR("udp_sendto_if: invalid pcb", pcb != NULL, return ERR_ARG);
 8022406:	68fb      	ldr	r3, [r7, #12]
 8022408:	2b00      	cmp	r3, #0
 802240a:	d109      	bne.n	8022420 <udp_sendto_if+0x28>
 802240c:	4b2e      	ldr	r3, [pc, #184]	@ (80224c8 <udp_sendto_if+0xd0>)
 802240e:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8022412:	492e      	ldr	r1, [pc, #184]	@ (80224cc <udp_sendto_if+0xd4>)
 8022414:	482e      	ldr	r0, [pc, #184]	@ (80224d0 <udp_sendto_if+0xd8>)
 8022416:	f008 fb21 	bl	802aa5c <iprintf>
 802241a:	f06f 030f 	mvn.w	r3, #15
 802241e:	e04f      	b.n	80224c0 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid pbuf", p != NULL, return ERR_ARG);
 8022420:	68bb      	ldr	r3, [r7, #8]
 8022422:	2b00      	cmp	r3, #0
 8022424:	d109      	bne.n	802243a <udp_sendto_if+0x42>
 8022426:	4b28      	ldr	r3, [pc, #160]	@ (80224c8 <udp_sendto_if+0xd0>)
 8022428:	f240 2281 	movw	r2, #641	@ 0x281
 802242c:	4929      	ldr	r1, [pc, #164]	@ (80224d4 <udp_sendto_if+0xdc>)
 802242e:	4828      	ldr	r0, [pc, #160]	@ (80224d0 <udp_sendto_if+0xd8>)
 8022430:	f008 fb14 	bl	802aa5c <iprintf>
 8022434:	f06f 030f 	mvn.w	r3, #15
 8022438:	e042      	b.n	80224c0 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 802243a:	687b      	ldr	r3, [r7, #4]
 802243c:	2b00      	cmp	r3, #0
 802243e:	d109      	bne.n	8022454 <udp_sendto_if+0x5c>
 8022440:	4b21      	ldr	r3, [pc, #132]	@ (80224c8 <udp_sendto_if+0xd0>)
 8022442:	f240 2282 	movw	r2, #642	@ 0x282
 8022446:	4924      	ldr	r1, [pc, #144]	@ (80224d8 <udp_sendto_if+0xe0>)
 8022448:	4821      	ldr	r0, [pc, #132]	@ (80224d0 <udp_sendto_if+0xd8>)
 802244a:	f008 fb07 	bl	802aa5c <iprintf>
 802244e:	f06f 030f 	mvn.w	r3, #15
 8022452:	e035      	b.n	80224c0 <udp_sendto_if+0xc8>
  LWIP_ERROR("udp_sendto_if: invalid netif", netif != NULL, return ERR_ARG);
 8022454:	6a3b      	ldr	r3, [r7, #32]
 8022456:	2b00      	cmp	r3, #0
 8022458:	d109      	bne.n	802246e <udp_sendto_if+0x76>
 802245a:	4b1b      	ldr	r3, [pc, #108]	@ (80224c8 <udp_sendto_if+0xd0>)
 802245c:	f240 2283 	movw	r2, #643	@ 0x283
 8022460:	491e      	ldr	r1, [pc, #120]	@ (80224dc <udp_sendto_if+0xe4>)
 8022462:	481b      	ldr	r0, [pc, #108]	@ (80224d0 <udp_sendto_if+0xd8>)
 8022464:	f008 fafa 	bl	802aa5c <iprintf>
 8022468:	f06f 030f 	mvn.w	r3, #15
 802246c:	e028      	b.n	80224c0 <udp_sendto_if+0xc8>
#endif /* LWIP_IPV6 */
#if LWIP_IPV4 && LWIP_IPV6
  else
#endif /* LWIP_IPV4 && LWIP_IPV6 */
#if LWIP_IPV4
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 802246e:	68fb      	ldr	r3, [r7, #12]
 8022470:	2b00      	cmp	r3, #0
 8022472:	d009      	beq.n	8022488 <udp_sendto_if+0x90>
 8022474:	68fb      	ldr	r3, [r7, #12]
 8022476:	681b      	ldr	r3, [r3, #0]
 8022478:	2b00      	cmp	r3, #0
 802247a:	d005      	beq.n	8022488 <udp_sendto_if+0x90>
        ip4_addr_ismulticast(ip_2_ip4(&pcb->local_ip))) {
 802247c:	68fb      	ldr	r3, [r7, #12]
 802247e:	681b      	ldr	r3, [r3, #0]
 8022480:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if (ip4_addr_isany(ip_2_ip4(&pcb->local_ip)) ||
 8022484:	2be0      	cmp	r3, #224	@ 0xe0
 8022486:	d103      	bne.n	8022490 <udp_sendto_if+0x98>
      /* if the local_ip is any or multicast
       * use the outgoing network interface IP address as source address */
      src_ip = netif_ip_addr4(netif);
 8022488:	6a3b      	ldr	r3, [r7, #32]
 802248a:	3304      	adds	r3, #4
 802248c:	617b      	str	r3, [r7, #20]
 802248e:	e00b      	b.n	80224a8 <udp_sendto_if+0xb0>
    } else {
      /* check if UDP PCB local IP address is correct
       * this could be an old address if netif->ip_addr has changed */
      if (!ip4_addr_cmp(ip_2_ip4(&(pcb->local_ip)), netif_ip4_addr(netif))) {
 8022490:	68fb      	ldr	r3, [r7, #12]
 8022492:	681a      	ldr	r2, [r3, #0]
 8022494:	6a3b      	ldr	r3, [r7, #32]
 8022496:	3304      	adds	r3, #4
 8022498:	681b      	ldr	r3, [r3, #0]
 802249a:	429a      	cmp	r2, r3
 802249c:	d002      	beq.n	80224a4 <udp_sendto_if+0xac>
        /* local_ip doesn't match, drop the packet */
        return ERR_RTE;
 802249e:	f06f 0303 	mvn.w	r3, #3
 80224a2:	e00d      	b.n	80224c0 <udp_sendto_if+0xc8>
      }
      /* use UDP PCB local IP address as source address */
      src_ip = &pcb->local_ip;
 80224a4:	68fb      	ldr	r3, [r7, #12]
 80224a6:	617b      	str	r3, [r7, #20]
    }
#endif /* LWIP_IPV4 */
#if LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP
  return udp_sendto_if_src_chksum(pcb, p, dst_ip, dst_port, netif, have_chksum, chksum, src_ip);
#else /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
  return udp_sendto_if_src(pcb, p, dst_ip, dst_port, netif, src_ip);
 80224a8:	887a      	ldrh	r2, [r7, #2]
 80224aa:	697b      	ldr	r3, [r7, #20]
 80224ac:	9301      	str	r3, [sp, #4]
 80224ae:	6a3b      	ldr	r3, [r7, #32]
 80224b0:	9300      	str	r3, [sp, #0]
 80224b2:	4613      	mov	r3, r2
 80224b4:	687a      	ldr	r2, [r7, #4]
 80224b6:	68b9      	ldr	r1, [r7, #8]
 80224b8:	68f8      	ldr	r0, [r7, #12]
 80224ba:	f000 f811 	bl	80224e0 <udp_sendto_if_src>
 80224be:	4603      	mov	r3, r0
#endif /* LWIP_CHECKSUM_ON_COPY && CHECKSUM_GEN_UDP */
}
 80224c0:	4618      	mov	r0, r3
 80224c2:	3718      	adds	r7, #24
 80224c4:	46bd      	mov	sp, r7
 80224c6:	bd80      	pop	{r7, pc}
 80224c8:	08030d68 	.word	0x08030d68
 80224cc:	08030edc 	.word	0x08030edc
 80224d0:	08030dbc 	.word	0x08030dbc
 80224d4:	08030ef8 	.word	0x08030ef8
 80224d8:	08030f14 	.word	0x08030f14
 80224dc:	08030f34 	.word	0x08030f34

080224e0 <udp_sendto_if_src>:
/** @ingroup udp_raw
 * Same as @ref udp_sendto_if, but with source address */
err_t
udp_sendto_if_src(struct udp_pcb *pcb, struct pbuf *p,
                  const ip_addr_t *dst_ip, u16_t dst_port, struct netif *netif, const ip_addr_t *src_ip)
{
 80224e0:	b580      	push	{r7, lr}
 80224e2:	b08c      	sub	sp, #48	@ 0x30
 80224e4:	af04      	add	r7, sp, #16
 80224e6:	60f8      	str	r0, [r7, #12]
 80224e8:	60b9      	str	r1, [r7, #8]
 80224ea:	607a      	str	r2, [r7, #4]
 80224ec:	807b      	strh	r3, [r7, #2]
  err_t err;
  struct pbuf *q; /* q will be sent down the stack */
  u8_t ip_proto;
  u8_t ttl;

  LWIP_ASSERT_CORE_LOCKED();
 80224ee:	f7ee fe89 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("udp_sendto_if_src: invalid pcb", pcb != NULL, return ERR_ARG);
 80224f2:	68fb      	ldr	r3, [r7, #12]
 80224f4:	2b00      	cmp	r3, #0
 80224f6:	d109      	bne.n	802250c <udp_sendto_if_src+0x2c>
 80224f8:	4b65      	ldr	r3, [pc, #404]	@ (8022690 <udp_sendto_if_src+0x1b0>)
 80224fa:	f240 22d1 	movw	r2, #721	@ 0x2d1
 80224fe:	4965      	ldr	r1, [pc, #404]	@ (8022694 <udp_sendto_if_src+0x1b4>)
 8022500:	4865      	ldr	r0, [pc, #404]	@ (8022698 <udp_sendto_if_src+0x1b8>)
 8022502:	f008 faab 	bl	802aa5c <iprintf>
 8022506:	f06f 030f 	mvn.w	r3, #15
 802250a:	e0bc      	b.n	8022686 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid pbuf", p != NULL, return ERR_ARG);
 802250c:	68bb      	ldr	r3, [r7, #8]
 802250e:	2b00      	cmp	r3, #0
 8022510:	d109      	bne.n	8022526 <udp_sendto_if_src+0x46>
 8022512:	4b5f      	ldr	r3, [pc, #380]	@ (8022690 <udp_sendto_if_src+0x1b0>)
 8022514:	f240 22d2 	movw	r2, #722	@ 0x2d2
 8022518:	4960      	ldr	r1, [pc, #384]	@ (802269c <udp_sendto_if_src+0x1bc>)
 802251a:	485f      	ldr	r0, [pc, #380]	@ (8022698 <udp_sendto_if_src+0x1b8>)
 802251c:	f008 fa9e 	bl	802aa5c <iprintf>
 8022520:	f06f 030f 	mvn.w	r3, #15
 8022524:	e0af      	b.n	8022686 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid dst_ip", dst_ip != NULL, return ERR_ARG);
 8022526:	687b      	ldr	r3, [r7, #4]
 8022528:	2b00      	cmp	r3, #0
 802252a:	d109      	bne.n	8022540 <udp_sendto_if_src+0x60>
 802252c:	4b58      	ldr	r3, [pc, #352]	@ (8022690 <udp_sendto_if_src+0x1b0>)
 802252e:	f240 22d3 	movw	r2, #723	@ 0x2d3
 8022532:	495b      	ldr	r1, [pc, #364]	@ (80226a0 <udp_sendto_if_src+0x1c0>)
 8022534:	4858      	ldr	r0, [pc, #352]	@ (8022698 <udp_sendto_if_src+0x1b8>)
 8022536:	f008 fa91 	bl	802aa5c <iprintf>
 802253a:	f06f 030f 	mvn.w	r3, #15
 802253e:	e0a2      	b.n	8022686 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid src_ip", src_ip != NULL, return ERR_ARG);
 8022540:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8022542:	2b00      	cmp	r3, #0
 8022544:	d109      	bne.n	802255a <udp_sendto_if_src+0x7a>
 8022546:	4b52      	ldr	r3, [pc, #328]	@ (8022690 <udp_sendto_if_src+0x1b0>)
 8022548:	f44f 7235 	mov.w	r2, #724	@ 0x2d4
 802254c:	4955      	ldr	r1, [pc, #340]	@ (80226a4 <udp_sendto_if_src+0x1c4>)
 802254e:	4852      	ldr	r0, [pc, #328]	@ (8022698 <udp_sendto_if_src+0x1b8>)
 8022550:	f008 fa84 	bl	802aa5c <iprintf>
 8022554:	f06f 030f 	mvn.w	r3, #15
 8022558:	e095      	b.n	8022686 <udp_sendto_if_src+0x1a6>
  LWIP_ERROR("udp_sendto_if_src: invalid netif", netif != NULL, return ERR_ARG);
 802255a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802255c:	2b00      	cmp	r3, #0
 802255e:	d109      	bne.n	8022574 <udp_sendto_if_src+0x94>
 8022560:	4b4b      	ldr	r3, [pc, #300]	@ (8022690 <udp_sendto_if_src+0x1b0>)
 8022562:	f240 22d5 	movw	r2, #725	@ 0x2d5
 8022566:	4950      	ldr	r1, [pc, #320]	@ (80226a8 <udp_sendto_if_src+0x1c8>)
 8022568:	484b      	ldr	r0, [pc, #300]	@ (8022698 <udp_sendto_if_src+0x1b8>)
 802256a:	f008 fa77 	bl	802aa5c <iprintf>
 802256e:	f06f 030f 	mvn.w	r3, #15
 8022572:	e088      	b.n	8022686 <udp_sendto_if_src+0x1a6>
    return ERR_VAL;
  }
#endif /* LWIP_IPV4 && IP_SOF_BROADCAST */

  /* if the PCB is not yet bound to a port, bind it here */
  if (pcb->local_port == 0) {
 8022574:	68fb      	ldr	r3, [r7, #12]
 8022576:	8a5b      	ldrh	r3, [r3, #18]
 8022578:	2b00      	cmp	r3, #0
 802257a:	d10f      	bne.n	802259c <udp_sendto_if_src+0xbc>
    LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n"));
    err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 802257c:	68f9      	ldr	r1, [r7, #12]
 802257e:	68fb      	ldr	r3, [r7, #12]
 8022580:	8a5b      	ldrh	r3, [r3, #18]
 8022582:	461a      	mov	r2, r3
 8022584:	68f8      	ldr	r0, [r7, #12]
 8022586:	f000 f893 	bl	80226b0 <udp_bind>
 802258a:	4603      	mov	r3, r0
 802258c:	76fb      	strb	r3, [r7, #27]
    if (err != ERR_OK) {
 802258e:	f997 301b 	ldrsb.w	r3, [r7, #27]
 8022592:	2b00      	cmp	r3, #0
 8022594:	d002      	beq.n	802259c <udp_sendto_if_src+0xbc>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n"));
      return err;
 8022596:	f997 301b 	ldrsb.w	r3, [r7, #27]
 802259a:	e074      	b.n	8022686 <udp_sendto_if_src+0x1a6>
    }
  }

  /* packet too large to add a UDP header without causing an overflow? */
  if ((u16_t)(p->tot_len + UDP_HLEN) < p->tot_len) {
 802259c:	68bb      	ldr	r3, [r7, #8]
 802259e:	891b      	ldrh	r3, [r3, #8]
 80225a0:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 80225a4:	4293      	cmp	r3, r2
 80225a6:	d902      	bls.n	80225ae <udp_sendto_if_src+0xce>
    return ERR_MEM;
 80225a8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80225ac:	e06b      	b.n	8022686 <udp_sendto_if_src+0x1a6>
  }
  /* not enough space to add an UDP header to first pbuf in given p chain? */
  if (pbuf_add_header(p, UDP_HLEN)) {
 80225ae:	2108      	movs	r1, #8
 80225b0:	68b8      	ldr	r0, [r7, #8]
 80225b2:	f7f8 ff13 	bl	801b3dc <pbuf_add_header>
 80225b6:	4603      	mov	r3, r0
 80225b8:	2b00      	cmp	r3, #0
 80225ba:	d015      	beq.n	80225e8 <udp_sendto_if_src+0x108>
    /* allocate header in a separate new pbuf */
    q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM);
 80225bc:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80225c0:	2108      	movs	r1, #8
 80225c2:	2022      	movs	r0, #34	@ 0x22
 80225c4:	f7f8 fcbc 	bl	801af40 <pbuf_alloc>
 80225c8:	61f8      	str	r0, [r7, #28]
    /* new header pbuf could not be allocated? */
    if (q == NULL) {
 80225ca:	69fb      	ldr	r3, [r7, #28]
 80225cc:	2b00      	cmp	r3, #0
 80225ce:	d102      	bne.n	80225d6 <udp_sendto_if_src+0xf6>
      LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n"));
      return ERR_MEM;
 80225d0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80225d4:	e057      	b.n	8022686 <udp_sendto_if_src+0x1a6>
    }
    if (p->tot_len != 0) {
 80225d6:	68bb      	ldr	r3, [r7, #8]
 80225d8:	891b      	ldrh	r3, [r3, #8]
 80225da:	2b00      	cmp	r3, #0
 80225dc:	d006      	beq.n	80225ec <udp_sendto_if_src+0x10c>
      /* chain header q in front of given pbuf p (only if p contains data) */
      pbuf_chain(q, p);
 80225de:	68b9      	ldr	r1, [r7, #8]
 80225e0:	69f8      	ldr	r0, [r7, #28]
 80225e2:	f7f9 f8e7 	bl	801b7b4 <pbuf_chain>
 80225e6:	e001      	b.n	80225ec <udp_sendto_if_src+0x10c>
    LWIP_DEBUGF(UDP_DEBUG,
                ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p));
  } else {
    /* adding space for header within p succeeded */
    /* first pbuf q equals given pbuf */
    q = p;
 80225e8:	68bb      	ldr	r3, [r7, #8]
 80225ea:	61fb      	str	r3, [r7, #28]
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p));
  }
  LWIP_ASSERT("check that first pbuf can hold struct udp_hdr",
 80225ec:	69fb      	ldr	r3, [r7, #28]
 80225ee:	895b      	ldrh	r3, [r3, #10]
 80225f0:	2b07      	cmp	r3, #7
 80225f2:	d806      	bhi.n	8022602 <udp_sendto_if_src+0x122>
 80225f4:	4b26      	ldr	r3, [pc, #152]	@ (8022690 <udp_sendto_if_src+0x1b0>)
 80225f6:	f240 320d 	movw	r2, #781	@ 0x30d
 80225fa:	492c      	ldr	r1, [pc, #176]	@ (80226ac <udp_sendto_if_src+0x1cc>)
 80225fc:	4826      	ldr	r0, [pc, #152]	@ (8022698 <udp_sendto_if_src+0x1b8>)
 80225fe:	f008 fa2d 	bl	802aa5c <iprintf>
              (q->len >= sizeof(struct udp_hdr)));
  /* q now represents the packet to be sent */
  udphdr = (struct udp_hdr *)q->payload;
 8022602:	69fb      	ldr	r3, [r7, #28]
 8022604:	685b      	ldr	r3, [r3, #4]
 8022606:	617b      	str	r3, [r7, #20]
  udphdr->src = lwip_htons(pcb->local_port);
 8022608:	68fb      	ldr	r3, [r7, #12]
 802260a:	8a5b      	ldrh	r3, [r3, #18]
 802260c:	4618      	mov	r0, r3
 802260e:	f7f7 facb 	bl	8019ba8 <lwip_htons>
 8022612:	4603      	mov	r3, r0
 8022614:	461a      	mov	r2, r3
 8022616:	697b      	ldr	r3, [r7, #20]
 8022618:	801a      	strh	r2, [r3, #0]
  udphdr->dest = lwip_htons(dst_port);
 802261a:	887b      	ldrh	r3, [r7, #2]
 802261c:	4618      	mov	r0, r3
 802261e:	f7f7 fac3 	bl	8019ba8 <lwip_htons>
 8022622:	4603      	mov	r3, r0
 8022624:	461a      	mov	r2, r3
 8022626:	697b      	ldr	r3, [r7, #20]
 8022628:	805a      	strh	r2, [r3, #2]
  /* in UDP, 0 checksum means 'no checksum' */
  udphdr->chksum = 0x0000;
 802262a:	697b      	ldr	r3, [r7, #20]
 802262c:	2200      	movs	r2, #0
 802262e:	719a      	strb	r2, [r3, #6]
 8022630:	2200      	movs	r2, #0
 8022632:	71da      	strb	r2, [r3, #7]
    ip_proto = IP_PROTO_UDPLITE;
  } else
#endif /* LWIP_UDPLITE */
  {      /* UDP */
    LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len));
    udphdr->len = lwip_htons(q->tot_len);
 8022634:	69fb      	ldr	r3, [r7, #28]
 8022636:	891b      	ldrh	r3, [r3, #8]
 8022638:	4618      	mov	r0, r3
 802263a:	f7f7 fab5 	bl	8019ba8 <lwip_htons>
 802263e:	4603      	mov	r3, r0
 8022640:	461a      	mov	r2, r3
 8022642:	697b      	ldr	r3, [r7, #20]
 8022644:	809a      	strh	r2, [r3, #4]
        }
        udphdr->chksum = udpchksum;
      }
    }
#endif /* CHECKSUM_GEN_UDP */
    ip_proto = IP_PROTO_UDP;
 8022646:	2311      	movs	r3, #17
 8022648:	74fb      	strb	r3, [r7, #19]

  /* Determine TTL to use */
#if LWIP_MULTICAST_TX_OPTIONS
  ttl = (ip_addr_ismulticast(dst_ip) ? udp_get_multicast_ttl(pcb) : pcb->ttl);
#else /* LWIP_MULTICAST_TX_OPTIONS */
  ttl = pcb->ttl;
 802264a:	68fb      	ldr	r3, [r7, #12]
 802264c:	7adb      	ldrb	r3, [r3, #11]
 802264e:	74bb      	strb	r3, [r7, #18]

  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum));
  LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,0x%02"X16_F",)\n", (u16_t)ip_proto));
  /* output to IP */
  NETIF_SET_HINTS(netif, &(pcb->netif_hints));
  err = ip_output_if_src(q, src_ip, dst_ip, ttl, pcb->tos, ip_proto, netif);
 8022650:	68fb      	ldr	r3, [r7, #12]
 8022652:	7a9b      	ldrb	r3, [r3, #10]
 8022654:	7cb9      	ldrb	r1, [r7, #18]
 8022656:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 8022658:	9202      	str	r2, [sp, #8]
 802265a:	7cfa      	ldrb	r2, [r7, #19]
 802265c:	9201      	str	r2, [sp, #4]
 802265e:	9300      	str	r3, [sp, #0]
 8022660:	460b      	mov	r3, r1
 8022662:	687a      	ldr	r2, [r7, #4]
 8022664:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8022666:	69f8      	ldr	r0, [r7, #28]
 8022668:	f003 fbf2 	bl	8025e50 <ip4_output_if_src>
 802266c:	4603      	mov	r3, r0
 802266e:	76fb      	strb	r3, [r7, #27]

  /* @todo: must this be increased even if error occurred? */
  MIB2_STATS_INC(mib2.udpoutdatagrams);

  /* did we chain a separate header pbuf earlier? */
  if (q != p) {
 8022670:	69fa      	ldr	r2, [r7, #28]
 8022672:	68bb      	ldr	r3, [r7, #8]
 8022674:	429a      	cmp	r2, r3
 8022676:	d004      	beq.n	8022682 <udp_sendto_if_src+0x1a2>
    /* free the header pbuf */
    pbuf_free(q);
 8022678:	69f8      	ldr	r0, [r7, #28]
 802267a:	f7f8 ff77 	bl	801b56c <pbuf_free>
    q = NULL;
 802267e:	2300      	movs	r3, #0
 8022680:	61fb      	str	r3, [r7, #28]
    /* p is still referenced by the caller, and will live on */
  }

  UDP_STATS_INC(udp.xmit);
  return err;
 8022682:	f997 301b 	ldrsb.w	r3, [r7, #27]
}
 8022686:	4618      	mov	r0, r3
 8022688:	3720      	adds	r7, #32
 802268a:	46bd      	mov	sp, r7
 802268c:	bd80      	pop	{r7, pc}
 802268e:	bf00      	nop
 8022690:	08030d68 	.word	0x08030d68
 8022694:	08030f54 	.word	0x08030f54
 8022698:	08030dbc 	.word	0x08030dbc
 802269c:	08030f74 	.word	0x08030f74
 80226a0:	08030f94 	.word	0x08030f94
 80226a4:	08030fb8 	.word	0x08030fb8
 80226a8:	08030fdc 	.word	0x08030fdc
 80226ac:	08031000 	.word	0x08031000

080226b0 <udp_bind>:
 *
 * @see udp_disconnect()
 */
err_t
udp_bind(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 80226b0:	b580      	push	{r7, lr}
 80226b2:	b086      	sub	sp, #24
 80226b4:	af00      	add	r7, sp, #0
 80226b6:	60f8      	str	r0, [r7, #12]
 80226b8:	60b9      	str	r1, [r7, #8]
 80226ba:	4613      	mov	r3, r2
 80226bc:	80fb      	strh	r3, [r7, #6]
  u8_t rebind;
#if LWIP_IPV6 && LWIP_IPV6_SCOPES
  ip_addr_t zoned_ipaddr;
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  LWIP_ASSERT_CORE_LOCKED();
 80226be:	f7ee fda1 	bl	8011204 <sys_check_core_locking>

#if LWIP_IPV4
  /* Don't propagate NULL pointer (IPv4 ANY) to subsequent functions */
  if (ipaddr == NULL) {
 80226c2:	68bb      	ldr	r3, [r7, #8]
 80226c4:	2b00      	cmp	r3, #0
 80226c6:	d101      	bne.n	80226cc <udp_bind+0x1c>
    ipaddr = IP4_ADDR_ANY;
 80226c8:	4b39      	ldr	r3, [pc, #228]	@ (80227b0 <udp_bind+0x100>)
 80226ca:	60bb      	str	r3, [r7, #8]
  }
#else /* LWIP_IPV4 */
  LWIP_ERROR("udp_bind: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
#endif /* LWIP_IPV4 */

  LWIP_ERROR("udp_bind: invalid pcb", pcb != NULL, return ERR_ARG);
 80226cc:	68fb      	ldr	r3, [r7, #12]
 80226ce:	2b00      	cmp	r3, #0
 80226d0:	d109      	bne.n	80226e6 <udp_bind+0x36>
 80226d2:	4b38      	ldr	r3, [pc, #224]	@ (80227b4 <udp_bind+0x104>)
 80226d4:	f240 32b7 	movw	r2, #951	@ 0x3b7
 80226d8:	4937      	ldr	r1, [pc, #220]	@ (80227b8 <udp_bind+0x108>)
 80226da:	4838      	ldr	r0, [pc, #224]	@ (80227bc <udp_bind+0x10c>)
 80226dc:	f008 f9be 	bl	802aa5c <iprintf>
 80226e0:	f06f 030f 	mvn.w	r3, #15
 80226e4:	e060      	b.n	80227a8 <udp_bind+0xf8>

  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = "));
  ip_addr_debug_print(UDP_DEBUG | LWIP_DBG_TRACE, ipaddr);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port));

  rebind = 0;
 80226e6:	2300      	movs	r3, #0
 80226e8:	74fb      	strb	r3, [r7, #19]
  /* Check for double bind and rebind of the same pcb */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 80226ea:	4b35      	ldr	r3, [pc, #212]	@ (80227c0 <udp_bind+0x110>)
 80226ec:	681b      	ldr	r3, [r3, #0]
 80226ee:	617b      	str	r3, [r7, #20]
 80226f0:	e009      	b.n	8022706 <udp_bind+0x56>
    /* is this UDP PCB already on active list? */
    if (pcb == ipcb) {
 80226f2:	68fa      	ldr	r2, [r7, #12]
 80226f4:	697b      	ldr	r3, [r7, #20]
 80226f6:	429a      	cmp	r2, r3
 80226f8:	d102      	bne.n	8022700 <udp_bind+0x50>
      rebind = 1;
 80226fa:	2301      	movs	r3, #1
 80226fc:	74fb      	strb	r3, [r7, #19]
      break;
 80226fe:	e005      	b.n	802270c <udp_bind+0x5c>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8022700:	697b      	ldr	r3, [r7, #20]
 8022702:	68db      	ldr	r3, [r3, #12]
 8022704:	617b      	str	r3, [r7, #20]
 8022706:	697b      	ldr	r3, [r7, #20]
 8022708:	2b00      	cmp	r3, #0
 802270a:	d1f2      	bne.n	80226f2 <udp_bind+0x42>
    ipaddr = &zoned_ipaddr;
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  /* no port specified? */
  if (port == 0) {
 802270c:	88fb      	ldrh	r3, [r7, #6]
 802270e:	2b00      	cmp	r3, #0
 8022710:	d109      	bne.n	8022726 <udp_bind+0x76>
    port = udp_new_port();
 8022712:	f7ff fc2f 	bl	8021f74 <udp_new_port>
 8022716:	4603      	mov	r3, r0
 8022718:	80fb      	strh	r3, [r7, #6]
    if (port == 0) {
 802271a:	88fb      	ldrh	r3, [r7, #6]
 802271c:	2b00      	cmp	r3, #0
 802271e:	d12c      	bne.n	802277a <udp_bind+0xca>
      /* no more ports available in local range */
      LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n"));
      return ERR_USE;
 8022720:	f06f 0307 	mvn.w	r3, #7
 8022724:	e040      	b.n	80227a8 <udp_bind+0xf8>
    }
  } else {
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8022726:	4b26      	ldr	r3, [pc, #152]	@ (80227c0 <udp_bind+0x110>)
 8022728:	681b      	ldr	r3, [r3, #0]
 802272a:	617b      	str	r3, [r7, #20]
 802272c:	e022      	b.n	8022774 <udp_bind+0xc4>
      if (pcb != ipcb) {
 802272e:	68fa      	ldr	r2, [r7, #12]
 8022730:	697b      	ldr	r3, [r7, #20]
 8022732:	429a      	cmp	r2, r3
 8022734:	d01b      	beq.n	802276e <udp_bind+0xbe>
        if (!ip_get_option(pcb, SOF_REUSEADDR) ||
            !ip_get_option(ipcb, SOF_REUSEADDR))
#endif /* SO_REUSE */
        {
          /* port matches that of PCB in list and REUSEADDR not set -> reject */
          if ((ipcb->local_port == port) &&
 8022736:	697b      	ldr	r3, [r7, #20]
 8022738:	8a5b      	ldrh	r3, [r3, #18]
 802273a:	88fa      	ldrh	r2, [r7, #6]
 802273c:	429a      	cmp	r2, r3
 802273e:	d116      	bne.n	802276e <udp_bind+0xbe>
              /* IP address matches or any IP used? */
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 8022740:	697b      	ldr	r3, [r7, #20]
 8022742:	681a      	ldr	r2, [r3, #0]
 8022744:	68bb      	ldr	r3, [r7, #8]
 8022746:	681b      	ldr	r3, [r3, #0]
          if ((ipcb->local_port == port) &&
 8022748:	429a      	cmp	r2, r3
 802274a:	d00d      	beq.n	8022768 <udp_bind+0xb8>
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 802274c:	68bb      	ldr	r3, [r7, #8]
 802274e:	2b00      	cmp	r3, #0
 8022750:	d00a      	beq.n	8022768 <udp_bind+0xb8>
 8022752:	68bb      	ldr	r3, [r7, #8]
 8022754:	681b      	ldr	r3, [r3, #0]
 8022756:	2b00      	cmp	r3, #0
 8022758:	d006      	beq.n	8022768 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 802275a:	697b      	ldr	r3, [r7, #20]
              (ip_addr_cmp(&ipcb->local_ip, ipaddr) || ip_addr_isany(ipaddr) ||
 802275c:	2b00      	cmp	r3, #0
 802275e:	d003      	beq.n	8022768 <udp_bind+0xb8>
              ip_addr_isany(&ipcb->local_ip))) {
 8022760:	697b      	ldr	r3, [r7, #20]
 8022762:	681b      	ldr	r3, [r3, #0]
 8022764:	2b00      	cmp	r3, #0
 8022766:	d102      	bne.n	802276e <udp_bind+0xbe>
            /* other PCB already binds to this local IP and port */
            LWIP_DEBUGF(UDP_DEBUG,
                        ("udp_bind: local port %"U16_F" already bound by another pcb\n", port));
            return ERR_USE;
 8022768:	f06f 0307 	mvn.w	r3, #7
 802276c:	e01c      	b.n	80227a8 <udp_bind+0xf8>
    for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 802276e:	697b      	ldr	r3, [r7, #20]
 8022770:	68db      	ldr	r3, [r3, #12]
 8022772:	617b      	str	r3, [r7, #20]
 8022774:	697b      	ldr	r3, [r7, #20]
 8022776:	2b00      	cmp	r3, #0
 8022778:	d1d9      	bne.n	802272e <udp_bind+0x7e>
        }
      }
    }
  }

  ip_addr_set_ipaddr(&pcb->local_ip, ipaddr);
 802277a:	68bb      	ldr	r3, [r7, #8]
 802277c:	2b00      	cmp	r3, #0
 802277e:	d002      	beq.n	8022786 <udp_bind+0xd6>
 8022780:	68bb      	ldr	r3, [r7, #8]
 8022782:	681b      	ldr	r3, [r3, #0]
 8022784:	e000      	b.n	8022788 <udp_bind+0xd8>
 8022786:	2300      	movs	r3, #0
 8022788:	68fa      	ldr	r2, [r7, #12]
 802278a:	6013      	str	r3, [r2, #0]

  pcb->local_port = port;
 802278c:	68fb      	ldr	r3, [r7, #12]
 802278e:	88fa      	ldrh	r2, [r7, #6]
 8022790:	825a      	strh	r2, [r3, #18]
  mib2_udp_bind(pcb);
  /* pcb not active yet? */
  if (rebind == 0) {
 8022792:	7cfb      	ldrb	r3, [r7, #19]
 8022794:	2b00      	cmp	r3, #0
 8022796:	d106      	bne.n	80227a6 <udp_bind+0xf6>
    /* place the PCB on the active list if not already there */
    pcb->next = udp_pcbs;
 8022798:	4b09      	ldr	r3, [pc, #36]	@ (80227c0 <udp_bind+0x110>)
 802279a:	681a      	ldr	r2, [r3, #0]
 802279c:	68fb      	ldr	r3, [r7, #12]
 802279e:	60da      	str	r2, [r3, #12]
    udp_pcbs = pcb;
 80227a0:	4a07      	ldr	r2, [pc, #28]	@ (80227c0 <udp_bind+0x110>)
 80227a2:	68fb      	ldr	r3, [r7, #12]
 80227a4:	6013      	str	r3, [r2, #0]
  }
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("udp_bind: bound to "));
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, pcb->local_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->local_port));
  return ERR_OK;
 80227a6:	2300      	movs	r3, #0
}
 80227a8:	4618      	mov	r0, r3
 80227aa:	3718      	adds	r7, #24
 80227ac:	46bd      	mov	sp, r7
 80227ae:	bd80      	pop	{r7, pc}
 80227b0:	08031ef8 	.word	0x08031ef8
 80227b4:	08030d68 	.word	0x08030d68
 80227b8:	08031030 	.word	0x08031030
 80227bc:	08030dbc 	.word	0x08030dbc
 80227c0:	2402b008 	.word	0x2402b008

080227c4 <udp_connect>:
 *
 * @see udp_disconnect()
 */
err_t
udp_connect(struct udp_pcb *pcb, const ip_addr_t *ipaddr, u16_t port)
{
 80227c4:	b580      	push	{r7, lr}
 80227c6:	b086      	sub	sp, #24
 80227c8:	af00      	add	r7, sp, #0
 80227ca:	60f8      	str	r0, [r7, #12]
 80227cc:	60b9      	str	r1, [r7, #8]
 80227ce:	4613      	mov	r3, r2
 80227d0:	80fb      	strh	r3, [r7, #6]
  struct udp_pcb *ipcb;

  LWIP_ASSERT_CORE_LOCKED();
 80227d2:	f7ee fd17 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("udp_connect: invalid pcb", pcb != NULL, return ERR_ARG);
 80227d6:	68fb      	ldr	r3, [r7, #12]
 80227d8:	2b00      	cmp	r3, #0
 80227da:	d109      	bne.n	80227f0 <udp_connect+0x2c>
 80227dc:	4b2c      	ldr	r3, [pc, #176]	@ (8022890 <udp_connect+0xcc>)
 80227de:	f240 4235 	movw	r2, #1077	@ 0x435
 80227e2:	492c      	ldr	r1, [pc, #176]	@ (8022894 <udp_connect+0xd0>)
 80227e4:	482c      	ldr	r0, [pc, #176]	@ (8022898 <udp_connect+0xd4>)
 80227e6:	f008 f939 	bl	802aa5c <iprintf>
 80227ea:	f06f 030f 	mvn.w	r3, #15
 80227ee:	e04b      	b.n	8022888 <udp_connect+0xc4>
  LWIP_ERROR("udp_connect: invalid ipaddr", ipaddr != NULL, return ERR_ARG);
 80227f0:	68bb      	ldr	r3, [r7, #8]
 80227f2:	2b00      	cmp	r3, #0
 80227f4:	d109      	bne.n	802280a <udp_connect+0x46>
 80227f6:	4b26      	ldr	r3, [pc, #152]	@ (8022890 <udp_connect+0xcc>)
 80227f8:	f240 4236 	movw	r2, #1078	@ 0x436
 80227fc:	4927      	ldr	r1, [pc, #156]	@ (802289c <udp_connect+0xd8>)
 80227fe:	4826      	ldr	r0, [pc, #152]	@ (8022898 <udp_connect+0xd4>)
 8022800:	f008 f92c 	bl	802aa5c <iprintf>
 8022804:	f06f 030f 	mvn.w	r3, #15
 8022808:	e03e      	b.n	8022888 <udp_connect+0xc4>

  if (pcb->local_port == 0) {
 802280a:	68fb      	ldr	r3, [r7, #12]
 802280c:	8a5b      	ldrh	r3, [r3, #18]
 802280e:	2b00      	cmp	r3, #0
 8022810:	d10f      	bne.n	8022832 <udp_connect+0x6e>
    err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
 8022812:	68f9      	ldr	r1, [r7, #12]
 8022814:	68fb      	ldr	r3, [r7, #12]
 8022816:	8a5b      	ldrh	r3, [r3, #18]
 8022818:	461a      	mov	r2, r3
 802281a:	68f8      	ldr	r0, [r7, #12]
 802281c:	f7ff ff48 	bl	80226b0 <udp_bind>
 8022820:	4603      	mov	r3, r0
 8022822:	75fb      	strb	r3, [r7, #23]
    if (err != ERR_OK) {
 8022824:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8022828:	2b00      	cmp	r3, #0
 802282a:	d002      	beq.n	8022832 <udp_connect+0x6e>
      return err;
 802282c:	f997 3017 	ldrsb.w	r3, [r7, #23]
 8022830:	e02a      	b.n	8022888 <udp_connect+0xc4>
    }
  }

  ip_addr_set_ipaddr(&pcb->remote_ip, ipaddr);
 8022832:	68bb      	ldr	r3, [r7, #8]
 8022834:	2b00      	cmp	r3, #0
 8022836:	d002      	beq.n	802283e <udp_connect+0x7a>
 8022838:	68bb      	ldr	r3, [r7, #8]
 802283a:	681b      	ldr	r3, [r3, #0]
 802283c:	e000      	b.n	8022840 <udp_connect+0x7c>
 802283e:	2300      	movs	r3, #0
 8022840:	68fa      	ldr	r2, [r7, #12]
 8022842:	6053      	str	r3, [r2, #4]
      ip6_addr_lacks_zone(ip_2_ip6(&pcb->remote_ip), IP6_UNKNOWN)) {
    ip6_addr_select_zone(ip_2_ip6(&pcb->remote_ip), ip_2_ip6(&pcb->local_ip));
  }
#endif /* LWIP_IPV6 && LWIP_IPV6_SCOPES */

  pcb->remote_port = port;
 8022844:	68fb      	ldr	r3, [r7, #12]
 8022846:	88fa      	ldrh	r2, [r7, #6]
 8022848:	829a      	strh	r2, [r3, #20]
  pcb->flags |= UDP_FLAGS_CONNECTED;
 802284a:	68fb      	ldr	r3, [r7, #12]
 802284c:	7c1b      	ldrb	r3, [r3, #16]
 802284e:	f043 0304 	orr.w	r3, r3, #4
 8022852:	b2da      	uxtb	r2, r3
 8022854:	68fb      	ldr	r3, [r7, #12]
 8022856:	741a      	strb	r2, [r3, #16]
  ip_addr_debug_print_val(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                          pcb->remote_ip);
  LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, (", port %"U16_F")\n", pcb->remote_port));

  /* Insert UDP PCB into the list of active UDP PCBs. */
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 8022858:	4b11      	ldr	r3, [pc, #68]	@ (80228a0 <udp_connect+0xdc>)
 802285a:	681b      	ldr	r3, [r3, #0]
 802285c:	613b      	str	r3, [r7, #16]
 802285e:	e008      	b.n	8022872 <udp_connect+0xae>
    if (pcb == ipcb) {
 8022860:	68fa      	ldr	r2, [r7, #12]
 8022862:	693b      	ldr	r3, [r7, #16]
 8022864:	429a      	cmp	r2, r3
 8022866:	d101      	bne.n	802286c <udp_connect+0xa8>
      /* already on the list, just return */
      return ERR_OK;
 8022868:	2300      	movs	r3, #0
 802286a:	e00d      	b.n	8022888 <udp_connect+0xc4>
  for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
 802286c:	693b      	ldr	r3, [r7, #16]
 802286e:	68db      	ldr	r3, [r3, #12]
 8022870:	613b      	str	r3, [r7, #16]
 8022872:	693b      	ldr	r3, [r7, #16]
 8022874:	2b00      	cmp	r3, #0
 8022876:	d1f3      	bne.n	8022860 <udp_connect+0x9c>
    }
  }
  /* PCB not yet on the list, add PCB now */
  pcb->next = udp_pcbs;
 8022878:	4b09      	ldr	r3, [pc, #36]	@ (80228a0 <udp_connect+0xdc>)
 802287a:	681a      	ldr	r2, [r3, #0]
 802287c:	68fb      	ldr	r3, [r7, #12]
 802287e:	60da      	str	r2, [r3, #12]
  udp_pcbs = pcb;
 8022880:	4a07      	ldr	r2, [pc, #28]	@ (80228a0 <udp_connect+0xdc>)
 8022882:	68fb      	ldr	r3, [r7, #12]
 8022884:	6013      	str	r3, [r2, #0]
  return ERR_OK;
 8022886:	2300      	movs	r3, #0
}
 8022888:	4618      	mov	r0, r3
 802288a:	3718      	adds	r7, #24
 802288c:	46bd      	mov	sp, r7
 802288e:	bd80      	pop	{r7, pc}
 8022890:	08030d68 	.word	0x08030d68
 8022894:	08031048 	.word	0x08031048
 8022898:	08030dbc 	.word	0x08030dbc
 802289c:	08031064 	.word	0x08031064
 80228a0:	2402b008 	.word	0x2402b008

080228a4 <udp_disconnect>:
 *
 * @param pcb the udp pcb to disconnect.
 */
void
udp_disconnect(struct udp_pcb *pcb)
{
 80228a4:	b580      	push	{r7, lr}
 80228a6:	b082      	sub	sp, #8
 80228a8:	af00      	add	r7, sp, #0
 80228aa:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 80228ac:	f7ee fcaa 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("udp_disconnect: invalid pcb", pcb != NULL, return);
 80228b0:	687b      	ldr	r3, [r7, #4]
 80228b2:	2b00      	cmp	r3, #0
 80228b4:	d107      	bne.n	80228c6 <udp_disconnect+0x22>
 80228b6:	4b0d      	ldr	r3, [pc, #52]	@ (80228ec <udp_disconnect+0x48>)
 80228b8:	f240 426a 	movw	r2, #1130	@ 0x46a
 80228bc:	490c      	ldr	r1, [pc, #48]	@ (80228f0 <udp_disconnect+0x4c>)
 80228be:	480d      	ldr	r0, [pc, #52]	@ (80228f4 <udp_disconnect+0x50>)
 80228c0:	f008 f8cc 	bl	802aa5c <iprintf>
 80228c4:	e00f      	b.n	80228e6 <udp_disconnect+0x42>
#if LWIP_IPV4 && LWIP_IPV6
  if (IP_IS_ANY_TYPE_VAL(pcb->local_ip)) {
    ip_addr_copy(pcb->remote_ip, *IP_ANY_TYPE);
  } else {
#endif
    ip_addr_set_any(IP_IS_V6_VAL(pcb->remote_ip), &pcb->remote_ip);
 80228c6:	687b      	ldr	r3, [r7, #4]
 80228c8:	2200      	movs	r2, #0
 80228ca:	605a      	str	r2, [r3, #4]
#if LWIP_IPV4 && LWIP_IPV6
  }
#endif
  pcb->remote_port = 0;
 80228cc:	687b      	ldr	r3, [r7, #4]
 80228ce:	2200      	movs	r2, #0
 80228d0:	829a      	strh	r2, [r3, #20]
  pcb->netif_idx = NETIF_NO_INDEX;
 80228d2:	687b      	ldr	r3, [r7, #4]
 80228d4:	2200      	movs	r2, #0
 80228d6:	721a      	strb	r2, [r3, #8]
  /* mark PCB as unconnected */
  udp_clear_flags(pcb, UDP_FLAGS_CONNECTED);
 80228d8:	687b      	ldr	r3, [r7, #4]
 80228da:	7c1b      	ldrb	r3, [r3, #16]
 80228dc:	f023 0304 	bic.w	r3, r3, #4
 80228e0:	b2da      	uxtb	r2, r3
 80228e2:	687b      	ldr	r3, [r7, #4]
 80228e4:	741a      	strb	r2, [r3, #16]
}
 80228e6:	3708      	adds	r7, #8
 80228e8:	46bd      	mov	sp, r7
 80228ea:	bd80      	pop	{r7, pc}
 80228ec:	08030d68 	.word	0x08030d68
 80228f0:	08031080 	.word	0x08031080
 80228f4:	08030dbc 	.word	0x08030dbc

080228f8 <udp_recv>:
 * @param recv function pointer of the callback function
 * @param recv_arg additional argument to pass to the callback function
 */
void
udp_recv(struct udp_pcb *pcb, udp_recv_fn recv, void *recv_arg)
{
 80228f8:	b580      	push	{r7, lr}
 80228fa:	b084      	sub	sp, #16
 80228fc:	af00      	add	r7, sp, #0
 80228fe:	60f8      	str	r0, [r7, #12]
 8022900:	60b9      	str	r1, [r7, #8]
 8022902:	607a      	str	r2, [r7, #4]
  LWIP_ASSERT_CORE_LOCKED();
 8022904:	f7ee fc7e 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("udp_recv: invalid pcb", pcb != NULL, return);
 8022908:	68fb      	ldr	r3, [r7, #12]
 802290a:	2b00      	cmp	r3, #0
 802290c:	d107      	bne.n	802291e <udp_recv+0x26>
 802290e:	4b08      	ldr	r3, [pc, #32]	@ (8022930 <udp_recv+0x38>)
 8022910:	f240 428a 	movw	r2, #1162	@ 0x48a
 8022914:	4907      	ldr	r1, [pc, #28]	@ (8022934 <udp_recv+0x3c>)
 8022916:	4808      	ldr	r0, [pc, #32]	@ (8022938 <udp_recv+0x40>)
 8022918:	f008 f8a0 	bl	802aa5c <iprintf>
 802291c:	e005      	b.n	802292a <udp_recv+0x32>

  /* remember recv() callback and user data */
  pcb->recv = recv;
 802291e:	68fb      	ldr	r3, [r7, #12]
 8022920:	68ba      	ldr	r2, [r7, #8]
 8022922:	619a      	str	r2, [r3, #24]
  pcb->recv_arg = recv_arg;
 8022924:	68fb      	ldr	r3, [r7, #12]
 8022926:	687a      	ldr	r2, [r7, #4]
 8022928:	61da      	str	r2, [r3, #28]
}
 802292a:	3710      	adds	r7, #16
 802292c:	46bd      	mov	sp, r7
 802292e:	bd80      	pop	{r7, pc}
 8022930:	08030d68 	.word	0x08030d68
 8022934:	0803109c 	.word	0x0803109c
 8022938:	08030dbc 	.word	0x08030dbc

0802293c <udp_remove>:
 *
 * @see udp_new()
 */
void
udp_remove(struct udp_pcb *pcb)
{
 802293c:	b580      	push	{r7, lr}
 802293e:	b084      	sub	sp, #16
 8022940:	af00      	add	r7, sp, #0
 8022942:	6078      	str	r0, [r7, #4]
  struct udp_pcb *pcb2;

  LWIP_ASSERT_CORE_LOCKED();
 8022944:	f7ee fc5e 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("udp_remove: invalid pcb", pcb != NULL, return);
 8022948:	687b      	ldr	r3, [r7, #4]
 802294a:	2b00      	cmp	r3, #0
 802294c:	d107      	bne.n	802295e <udp_remove+0x22>
 802294e:	4b19      	ldr	r3, [pc, #100]	@ (80229b4 <udp_remove+0x78>)
 8022950:	f240 42a1 	movw	r2, #1185	@ 0x4a1
 8022954:	4918      	ldr	r1, [pc, #96]	@ (80229b8 <udp_remove+0x7c>)
 8022956:	4819      	ldr	r0, [pc, #100]	@ (80229bc <udp_remove+0x80>)
 8022958:	f008 f880 	bl	802aa5c <iprintf>
 802295c:	e026      	b.n	80229ac <udp_remove+0x70>

  mib2_udp_unbind(pcb);
  /* pcb to be removed is first in list? */
  if (udp_pcbs == pcb) {
 802295e:	4b18      	ldr	r3, [pc, #96]	@ (80229c0 <udp_remove+0x84>)
 8022960:	681b      	ldr	r3, [r3, #0]
 8022962:	687a      	ldr	r2, [r7, #4]
 8022964:	429a      	cmp	r2, r3
 8022966:	d105      	bne.n	8022974 <udp_remove+0x38>
    /* make list start at 2nd pcb */
    udp_pcbs = udp_pcbs->next;
 8022968:	4b15      	ldr	r3, [pc, #84]	@ (80229c0 <udp_remove+0x84>)
 802296a:	681b      	ldr	r3, [r3, #0]
 802296c:	68db      	ldr	r3, [r3, #12]
 802296e:	4a14      	ldr	r2, [pc, #80]	@ (80229c0 <udp_remove+0x84>)
 8022970:	6013      	str	r3, [r2, #0]
 8022972:	e017      	b.n	80229a4 <udp_remove+0x68>
    /* pcb not 1st in list */
  } else {
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 8022974:	4b12      	ldr	r3, [pc, #72]	@ (80229c0 <udp_remove+0x84>)
 8022976:	681b      	ldr	r3, [r3, #0]
 8022978:	60fb      	str	r3, [r7, #12]
 802297a:	e010      	b.n	802299e <udp_remove+0x62>
      /* find pcb in udp_pcbs list */
      if (pcb2->next != NULL && pcb2->next == pcb) {
 802297c:	68fb      	ldr	r3, [r7, #12]
 802297e:	68db      	ldr	r3, [r3, #12]
 8022980:	2b00      	cmp	r3, #0
 8022982:	d009      	beq.n	8022998 <udp_remove+0x5c>
 8022984:	68fb      	ldr	r3, [r7, #12]
 8022986:	68db      	ldr	r3, [r3, #12]
 8022988:	687a      	ldr	r2, [r7, #4]
 802298a:	429a      	cmp	r2, r3
 802298c:	d104      	bne.n	8022998 <udp_remove+0x5c>
        /* remove pcb from list */
        pcb2->next = pcb->next;
 802298e:	687b      	ldr	r3, [r7, #4]
 8022990:	68da      	ldr	r2, [r3, #12]
 8022992:	68fb      	ldr	r3, [r7, #12]
 8022994:	60da      	str	r2, [r3, #12]
        break;
 8022996:	e005      	b.n	80229a4 <udp_remove+0x68>
    for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
 8022998:	68fb      	ldr	r3, [r7, #12]
 802299a:	68db      	ldr	r3, [r3, #12]
 802299c:	60fb      	str	r3, [r7, #12]
 802299e:	68fb      	ldr	r3, [r7, #12]
 80229a0:	2b00      	cmp	r3, #0
 80229a2:	d1eb      	bne.n	802297c <udp_remove+0x40>
      }
    }
  }
  memp_free(MEMP_UDP_PCB, pcb);
 80229a4:	6879      	ldr	r1, [r7, #4]
 80229a6:	2000      	movs	r0, #0
 80229a8:	f7f7 fef2 	bl	801a790 <memp_free>
}
 80229ac:	3710      	adds	r7, #16
 80229ae:	46bd      	mov	sp, r7
 80229b0:	bd80      	pop	{r7, pc}
 80229b2:	bf00      	nop
 80229b4:	08030d68 	.word	0x08030d68
 80229b8:	080310b4 	.word	0x080310b4
 80229bc:	08030dbc 	.word	0x08030dbc
 80229c0:	2402b008 	.word	0x2402b008

080229c4 <udp_new>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new(void)
{
 80229c4:	b580      	push	{r7, lr}
 80229c6:	b082      	sub	sp, #8
 80229c8:	af00      	add	r7, sp, #0
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 80229ca:	f7ee fc1b 	bl	8011204 <sys_check_core_locking>

  pcb = (struct udp_pcb *)memp_malloc(MEMP_UDP_PCB);
 80229ce:	2000      	movs	r0, #0
 80229d0:	f7f7 fe68 	bl	801a6a4 <memp_malloc>
 80229d4:	6078      	str	r0, [r7, #4]
  /* could allocate UDP PCB? */
  if (pcb != NULL) {
 80229d6:	687b      	ldr	r3, [r7, #4]
 80229d8:	2b00      	cmp	r3, #0
 80229da:	d007      	beq.n	80229ec <udp_new+0x28>
    /* UDP Lite: by initializing to all zeroes, chksum_len is set to 0
     * which means checksum is generated over the whole datagram per default
     * (recommended as default by RFC 3828). */
    /* initialize PCB to all zeroes */
    memset(pcb, 0, sizeof(struct udp_pcb));
 80229dc:	2220      	movs	r2, #32
 80229de:	2100      	movs	r1, #0
 80229e0:	6878      	ldr	r0, [r7, #4]
 80229e2:	f008 f9cd 	bl	802ad80 <memset>
    pcb->ttl = UDP_TTL;
 80229e6:	687b      	ldr	r3, [r7, #4]
 80229e8:	22ff      	movs	r2, #255	@ 0xff
 80229ea:	72da      	strb	r2, [r3, #11]
#if LWIP_MULTICAST_TX_OPTIONS
    udp_set_multicast_ttl(pcb, UDP_TTL);
#endif /* LWIP_MULTICAST_TX_OPTIONS */
  }
  return pcb;
 80229ec:	687b      	ldr	r3, [r7, #4]
}
 80229ee:	4618      	mov	r0, r3
 80229f0:	3708      	adds	r7, #8
 80229f2:	46bd      	mov	sp, r7
 80229f4:	bd80      	pop	{r7, pc}

080229f6 <udp_new_ip_type>:
 *
 * @see udp_remove()
 */
struct udp_pcb *
udp_new_ip_type(u8_t type)
{
 80229f6:	b580      	push	{r7, lr}
 80229f8:	b084      	sub	sp, #16
 80229fa:	af00      	add	r7, sp, #0
 80229fc:	4603      	mov	r3, r0
 80229fe:	71fb      	strb	r3, [r7, #7]
  struct udp_pcb *pcb;

  LWIP_ASSERT_CORE_LOCKED();
 8022a00:	f7ee fc00 	bl	8011204 <sys_check_core_locking>

  pcb = udp_new();
 8022a04:	f7ff ffde 	bl	80229c4 <udp_new>
 8022a08:	60f8      	str	r0, [r7, #12]
    IP_SET_TYPE_VAL(pcb->remote_ip, type);
  }
#else
  LWIP_UNUSED_ARG(type);
#endif /* LWIP_IPV4 && LWIP_IPV6 */
  return pcb;
 8022a0a:	68fb      	ldr	r3, [r7, #12]
}
 8022a0c:	4618      	mov	r0, r3
 8022a0e:	3710      	adds	r7, #16
 8022a10:	46bd      	mov	sp, r7
 8022a12:	bd80      	pop	{r7, pc}

08022a14 <udp_netif_ip_addr_changed>:
 *
 * @param old_addr IP address of the netif before change
 * @param new_addr IP address of the netif after change
 */
void udp_netif_ip_addr_changed(const ip_addr_t *old_addr, const ip_addr_t *new_addr)
{
 8022a14:	b480      	push	{r7}
 8022a16:	b085      	sub	sp, #20
 8022a18:	af00      	add	r7, sp, #0
 8022a1a:	6078      	str	r0, [r7, #4]
 8022a1c:	6039      	str	r1, [r7, #0]
  struct udp_pcb *upcb;

  if (!ip_addr_isany(old_addr) && !ip_addr_isany(new_addr)) {
 8022a1e:	687b      	ldr	r3, [r7, #4]
 8022a20:	2b00      	cmp	r3, #0
 8022a22:	d01e      	beq.n	8022a62 <udp_netif_ip_addr_changed+0x4e>
 8022a24:	687b      	ldr	r3, [r7, #4]
 8022a26:	681b      	ldr	r3, [r3, #0]
 8022a28:	2b00      	cmp	r3, #0
 8022a2a:	d01a      	beq.n	8022a62 <udp_netif_ip_addr_changed+0x4e>
 8022a2c:	683b      	ldr	r3, [r7, #0]
 8022a2e:	2b00      	cmp	r3, #0
 8022a30:	d017      	beq.n	8022a62 <udp_netif_ip_addr_changed+0x4e>
 8022a32:	683b      	ldr	r3, [r7, #0]
 8022a34:	681b      	ldr	r3, [r3, #0]
 8022a36:	2b00      	cmp	r3, #0
 8022a38:	d013      	beq.n	8022a62 <udp_netif_ip_addr_changed+0x4e>
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 8022a3a:	4b0d      	ldr	r3, [pc, #52]	@ (8022a70 <udp_netif_ip_addr_changed+0x5c>)
 8022a3c:	681b      	ldr	r3, [r3, #0]
 8022a3e:	60fb      	str	r3, [r7, #12]
 8022a40:	e00c      	b.n	8022a5c <udp_netif_ip_addr_changed+0x48>
      /* PCB bound to current local interface address? */
      if (ip_addr_cmp(&upcb->local_ip, old_addr)) {
 8022a42:	68fb      	ldr	r3, [r7, #12]
 8022a44:	681a      	ldr	r2, [r3, #0]
 8022a46:	687b      	ldr	r3, [r7, #4]
 8022a48:	681b      	ldr	r3, [r3, #0]
 8022a4a:	429a      	cmp	r2, r3
 8022a4c:	d103      	bne.n	8022a56 <udp_netif_ip_addr_changed+0x42>
        /* The PCB is bound to the old ipaddr and
         * is set to bound to the new one instead */
        ip_addr_copy(upcb->local_ip, *new_addr);
 8022a4e:	683b      	ldr	r3, [r7, #0]
 8022a50:	681a      	ldr	r2, [r3, #0]
 8022a52:	68fb      	ldr	r3, [r7, #12]
 8022a54:	601a      	str	r2, [r3, #0]
    for (upcb = udp_pcbs; upcb != NULL; upcb = upcb->next) {
 8022a56:	68fb      	ldr	r3, [r7, #12]
 8022a58:	68db      	ldr	r3, [r3, #12]
 8022a5a:	60fb      	str	r3, [r7, #12]
 8022a5c:	68fb      	ldr	r3, [r7, #12]
 8022a5e:	2b00      	cmp	r3, #0
 8022a60:	d1ef      	bne.n	8022a42 <udp_netif_ip_addr_changed+0x2e>
      }
    }
  }
}
 8022a62:	bf00      	nop
 8022a64:	3714      	adds	r7, #20
 8022a66:	46bd      	mov	sp, r7
 8022a68:	f85d 7b04 	ldr.w	r7, [sp], #4
 8022a6c:	4770      	bx	lr
 8022a6e:	bf00      	nop
 8022a70:	2402b008 	.word	0x2402b008

08022a74 <dhcp_inc_pcb_refcount>:
static void dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out);

/** Ensure DHCP PCB is allocated and bound */
static err_t
dhcp_inc_pcb_refcount(void)
{
 8022a74:	b580      	push	{r7, lr}
 8022a76:	af00      	add	r7, sp, #0
  if (dhcp_pcb_refcount == 0) {
 8022a78:	4b20      	ldr	r3, [pc, #128]	@ (8022afc <dhcp_inc_pcb_refcount+0x88>)
 8022a7a:	781b      	ldrb	r3, [r3, #0]
 8022a7c:	2b00      	cmp	r3, #0
 8022a7e:	d133      	bne.n	8022ae8 <dhcp_inc_pcb_refcount+0x74>
    LWIP_ASSERT("dhcp_inc_pcb_refcount(): memory leak", dhcp_pcb == NULL);
 8022a80:	4b1f      	ldr	r3, [pc, #124]	@ (8022b00 <dhcp_inc_pcb_refcount+0x8c>)
 8022a82:	681b      	ldr	r3, [r3, #0]
 8022a84:	2b00      	cmp	r3, #0
 8022a86:	d005      	beq.n	8022a94 <dhcp_inc_pcb_refcount+0x20>
 8022a88:	4b1e      	ldr	r3, [pc, #120]	@ (8022b04 <dhcp_inc_pcb_refcount+0x90>)
 8022a8a:	22e5      	movs	r2, #229	@ 0xe5
 8022a8c:	491e      	ldr	r1, [pc, #120]	@ (8022b08 <dhcp_inc_pcb_refcount+0x94>)
 8022a8e:	481f      	ldr	r0, [pc, #124]	@ (8022b0c <dhcp_inc_pcb_refcount+0x98>)
 8022a90:	f007 ffe4 	bl	802aa5c <iprintf>

    /* allocate UDP PCB */
    dhcp_pcb = udp_new();
 8022a94:	f7ff ff96 	bl	80229c4 <udp_new>
 8022a98:	4603      	mov	r3, r0
 8022a9a:	4a19      	ldr	r2, [pc, #100]	@ (8022b00 <dhcp_inc_pcb_refcount+0x8c>)
 8022a9c:	6013      	str	r3, [r2, #0]

    if (dhcp_pcb == NULL) {
 8022a9e:	4b18      	ldr	r3, [pc, #96]	@ (8022b00 <dhcp_inc_pcb_refcount+0x8c>)
 8022aa0:	681b      	ldr	r3, [r3, #0]
 8022aa2:	2b00      	cmp	r3, #0
 8022aa4:	d102      	bne.n	8022aac <dhcp_inc_pcb_refcount+0x38>
      return ERR_MEM;
 8022aa6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8022aaa:	e024      	b.n	8022af6 <dhcp_inc_pcb_refcount+0x82>
    }

    ip_set_option(dhcp_pcb, SOF_BROADCAST);
 8022aac:	4b14      	ldr	r3, [pc, #80]	@ (8022b00 <dhcp_inc_pcb_refcount+0x8c>)
 8022aae:	681b      	ldr	r3, [r3, #0]
 8022ab0:	7a5a      	ldrb	r2, [r3, #9]
 8022ab2:	4b13      	ldr	r3, [pc, #76]	@ (8022b00 <dhcp_inc_pcb_refcount+0x8c>)
 8022ab4:	681b      	ldr	r3, [r3, #0]
 8022ab6:	f042 0220 	orr.w	r2, r2, #32
 8022aba:	b2d2      	uxtb	r2, r2
 8022abc:	725a      	strb	r2, [r3, #9]

    /* set up local and remote port for the pcb -> listen on all interfaces on all src/dest IPs */
    udp_bind(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_CLIENT);
 8022abe:	4b10      	ldr	r3, [pc, #64]	@ (8022b00 <dhcp_inc_pcb_refcount+0x8c>)
 8022ac0:	681b      	ldr	r3, [r3, #0]
 8022ac2:	2244      	movs	r2, #68	@ 0x44
 8022ac4:	4912      	ldr	r1, [pc, #72]	@ (8022b10 <dhcp_inc_pcb_refcount+0x9c>)
 8022ac6:	4618      	mov	r0, r3
 8022ac8:	f7ff fdf2 	bl	80226b0 <udp_bind>
    udp_connect(dhcp_pcb, IP4_ADDR_ANY, LWIP_IANA_PORT_DHCP_SERVER);
 8022acc:	4b0c      	ldr	r3, [pc, #48]	@ (8022b00 <dhcp_inc_pcb_refcount+0x8c>)
 8022ace:	681b      	ldr	r3, [r3, #0]
 8022ad0:	2243      	movs	r2, #67	@ 0x43
 8022ad2:	490f      	ldr	r1, [pc, #60]	@ (8022b10 <dhcp_inc_pcb_refcount+0x9c>)
 8022ad4:	4618      	mov	r0, r3
 8022ad6:	f7ff fe75 	bl	80227c4 <udp_connect>
    udp_recv(dhcp_pcb, dhcp_recv, NULL);
 8022ada:	4b09      	ldr	r3, [pc, #36]	@ (8022b00 <dhcp_inc_pcb_refcount+0x8c>)
 8022adc:	681b      	ldr	r3, [r3, #0]
 8022ade:	2200      	movs	r2, #0
 8022ae0:	490c      	ldr	r1, [pc, #48]	@ (8022b14 <dhcp_inc_pcb_refcount+0xa0>)
 8022ae2:	4618      	mov	r0, r3
 8022ae4:	f7ff ff08 	bl	80228f8 <udp_recv>
  }

  dhcp_pcb_refcount++;
 8022ae8:	4b04      	ldr	r3, [pc, #16]	@ (8022afc <dhcp_inc_pcb_refcount+0x88>)
 8022aea:	781b      	ldrb	r3, [r3, #0]
 8022aec:	3301      	adds	r3, #1
 8022aee:	b2da      	uxtb	r2, r3
 8022af0:	4b02      	ldr	r3, [pc, #8]	@ (8022afc <dhcp_inc_pcb_refcount+0x88>)
 8022af2:	701a      	strb	r2, [r3, #0]

  return ERR_OK;
 8022af4:	2300      	movs	r3, #0
}
 8022af6:	4618      	mov	r0, r3
 8022af8:	bd80      	pop	{r7, pc}
 8022afa:	bf00      	nop
 8022afc:	2402b038 	.word	0x2402b038
 8022b00:	2402b034 	.word	0x2402b034
 8022b04:	080310cc 	.word	0x080310cc
 8022b08:	08031104 	.word	0x08031104
 8022b0c:	0803112c 	.word	0x0803112c
 8022b10:	08031ef8 	.word	0x08031ef8
 8022b14:	080243e5 	.word	0x080243e5

08022b18 <dhcp_dec_pcb_refcount>:

/** Free DHCP PCB if the last netif stops using it */
static void
dhcp_dec_pcb_refcount(void)
{
 8022b18:	b580      	push	{r7, lr}
 8022b1a:	af00      	add	r7, sp, #0
  LWIP_ASSERT("dhcp_pcb_refcount(): refcount error", (dhcp_pcb_refcount > 0));
 8022b1c:	4b0e      	ldr	r3, [pc, #56]	@ (8022b58 <dhcp_dec_pcb_refcount+0x40>)
 8022b1e:	781b      	ldrb	r3, [r3, #0]
 8022b20:	2b00      	cmp	r3, #0
 8022b22:	d105      	bne.n	8022b30 <dhcp_dec_pcb_refcount+0x18>
 8022b24:	4b0d      	ldr	r3, [pc, #52]	@ (8022b5c <dhcp_dec_pcb_refcount+0x44>)
 8022b26:	22ff      	movs	r2, #255	@ 0xff
 8022b28:	490d      	ldr	r1, [pc, #52]	@ (8022b60 <dhcp_dec_pcb_refcount+0x48>)
 8022b2a:	480e      	ldr	r0, [pc, #56]	@ (8022b64 <dhcp_dec_pcb_refcount+0x4c>)
 8022b2c:	f007 ff96 	bl	802aa5c <iprintf>
  dhcp_pcb_refcount--;
 8022b30:	4b09      	ldr	r3, [pc, #36]	@ (8022b58 <dhcp_dec_pcb_refcount+0x40>)
 8022b32:	781b      	ldrb	r3, [r3, #0]
 8022b34:	3b01      	subs	r3, #1
 8022b36:	b2da      	uxtb	r2, r3
 8022b38:	4b07      	ldr	r3, [pc, #28]	@ (8022b58 <dhcp_dec_pcb_refcount+0x40>)
 8022b3a:	701a      	strb	r2, [r3, #0]

  if (dhcp_pcb_refcount == 0) {
 8022b3c:	4b06      	ldr	r3, [pc, #24]	@ (8022b58 <dhcp_dec_pcb_refcount+0x40>)
 8022b3e:	781b      	ldrb	r3, [r3, #0]
 8022b40:	2b00      	cmp	r3, #0
 8022b42:	d107      	bne.n	8022b54 <dhcp_dec_pcb_refcount+0x3c>
    udp_remove(dhcp_pcb);
 8022b44:	4b08      	ldr	r3, [pc, #32]	@ (8022b68 <dhcp_dec_pcb_refcount+0x50>)
 8022b46:	681b      	ldr	r3, [r3, #0]
 8022b48:	4618      	mov	r0, r3
 8022b4a:	f7ff fef7 	bl	802293c <udp_remove>
    dhcp_pcb = NULL;
 8022b4e:	4b06      	ldr	r3, [pc, #24]	@ (8022b68 <dhcp_dec_pcb_refcount+0x50>)
 8022b50:	2200      	movs	r2, #0
 8022b52:	601a      	str	r2, [r3, #0]
  }
}
 8022b54:	bf00      	nop
 8022b56:	bd80      	pop	{r7, pc}
 8022b58:	2402b038 	.word	0x2402b038
 8022b5c:	080310cc 	.word	0x080310cc
 8022b60:	08031154 	.word	0x08031154
 8022b64:	0803112c 	.word	0x0803112c
 8022b68:	2402b034 	.word	0x2402b034

08022b6c <dhcp_handle_nak>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_nak(struct netif *netif)
{
 8022b6c:	b580      	push	{r7, lr}
 8022b6e:	b084      	sub	sp, #16
 8022b70:	af00      	add	r7, sp, #0
 8022b72:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022b74:	687b      	ldr	r3, [r7, #4]
 8022b76:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022b78:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* Change to a defined state - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 8022b7a:	210c      	movs	r1, #12
 8022b7c:	68f8      	ldr	r0, [r7, #12]
 8022b7e:	f001 f862 	bl	8023c46 <dhcp_set_state>
  /* remove IP address from interface (must no longer be used, as per RFC2131) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 8022b82:	4b06      	ldr	r3, [pc, #24]	@ (8022b9c <dhcp_handle_nak+0x30>)
 8022b84:	4a05      	ldr	r2, [pc, #20]	@ (8022b9c <dhcp_handle_nak+0x30>)
 8022b86:	4905      	ldr	r1, [pc, #20]	@ (8022b9c <dhcp_handle_nak+0x30>)
 8022b88:	6878      	ldr	r0, [r7, #4]
 8022b8a:	f7f7 ffa5 	bl	801aad8 <netif_set_addr>
  /* We can immediately restart discovery */
  dhcp_discover(netif);
 8022b8e:	6878      	ldr	r0, [r7, #4]
 8022b90:	f000 fc4c 	bl	802342c <dhcp_discover>
}
 8022b94:	bf00      	nop
 8022b96:	3710      	adds	r7, #16
 8022b98:	46bd      	mov	sp, r7
 8022b9a:	bd80      	pop	{r7, pc}
 8022b9c:	08031ef8 	.word	0x08031ef8

08022ba0 <dhcp_check>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_check(struct netif *netif)
{
 8022ba0:	b580      	push	{r7, lr}
 8022ba2:	b084      	sub	sp, #16
 8022ba4:	af00      	add	r7, sp, #0
 8022ba6:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022ba8:	687b      	ldr	r3, [r7, #4]
 8022baa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022bac:	60fb      	str	r3, [r7, #12]
  err_t result;
  u16_t msecs;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0],
              (s16_t)netif->name[1]));
  dhcp_set_state(dhcp, DHCP_STATE_CHECKING);
 8022bae:	2108      	movs	r1, #8
 8022bb0:	68f8      	ldr	r0, [r7, #12]
 8022bb2:	f001 f848 	bl	8023c46 <dhcp_set_state>
  /* create an ARP query for the offered IP address, expecting that no host
     responds, as the IP address should not be in use. */
  result = etharp_query(netif, &dhcp->offered_ip_addr, NULL);
 8022bb6:	68fb      	ldr	r3, [r7, #12]
 8022bb8:	331c      	adds	r3, #28
 8022bba:	2200      	movs	r2, #0
 8022bbc:	4619      	mov	r1, r3
 8022bbe:	6878      	ldr	r0, [r7, #4]
 8022bc0:	f002 fb88 	bl	80252d4 <etharp_query>
 8022bc4:	4603      	mov	r3, r0
 8022bc6:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n"));
  }
  if (dhcp->tries < 255) {
 8022bc8:	68fb      	ldr	r3, [r7, #12]
 8022bca:	799b      	ldrb	r3, [r3, #6]
 8022bcc:	2bff      	cmp	r3, #255	@ 0xff
 8022bce:	d005      	beq.n	8022bdc <dhcp_check+0x3c>
    dhcp->tries++;
 8022bd0:	68fb      	ldr	r3, [r7, #12]
 8022bd2:	799b      	ldrb	r3, [r3, #6]
 8022bd4:	3301      	adds	r3, #1
 8022bd6:	b2da      	uxtb	r2, r3
 8022bd8:	68fb      	ldr	r3, [r7, #12]
 8022bda:	719a      	strb	r2, [r3, #6]
  }
  msecs = 500;
 8022bdc:	f44f 73fa 	mov.w	r3, #500	@ 0x1f4
 8022be0:	813b      	strh	r3, [r7, #8]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022be2:	893b      	ldrh	r3, [r7, #8]
 8022be4:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022be8:	4a06      	ldr	r2, [pc, #24]	@ (8022c04 <dhcp_check+0x64>)
 8022bea:	fb82 1203 	smull	r1, r2, r2, r3
 8022bee:	1152      	asrs	r2, r2, #5
 8022bf0:	17db      	asrs	r3, r3, #31
 8022bf2:	1ad3      	subs	r3, r2, r3
 8022bf4:	b29a      	uxth	r2, r3
 8022bf6:	68fb      	ldr	r3, [r7, #12]
 8022bf8:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs));
}
 8022bfa:	bf00      	nop
 8022bfc:	3710      	adds	r7, #16
 8022bfe:	46bd      	mov	sp, r7
 8022c00:	bd80      	pop	{r7, pc}
 8022c02:	bf00      	nop
 8022c04:	10624dd3 	.word	0x10624dd3

08022c08 <dhcp_handle_offer>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_offer(struct netif *netif, struct dhcp_msg *msg_in)
{
 8022c08:	b580      	push	{r7, lr}
 8022c0a:	b084      	sub	sp, #16
 8022c0c:	af00      	add	r7, sp, #0
 8022c0e:	6078      	str	r0, [r7, #4]
 8022c10:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022c12:	687b      	ldr	r3, [r7, #4]
 8022c14:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022c16:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n",
              (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  /* obtain the server address */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SERVER_ID)) {
 8022c18:	4b0c      	ldr	r3, [pc, #48]	@ (8022c4c <dhcp_handle_offer+0x44>)
 8022c1a:	789b      	ldrb	r3, [r3, #2]
 8022c1c:	2b00      	cmp	r3, #0
 8022c1e:	d011      	beq.n	8022c44 <dhcp_handle_offer+0x3c>
    dhcp->request_timeout = 0; /* stop timer */
 8022c20:	68fb      	ldr	r3, [r7, #12]
 8022c22:	2200      	movs	r2, #0
 8022c24:	811a      	strh	r2, [r3, #8]

    ip_addr_set_ip4_u32(&dhcp->server_ip_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SERVER_ID)));
 8022c26:	4b0a      	ldr	r3, [pc, #40]	@ (8022c50 <dhcp_handle_offer+0x48>)
 8022c28:	689b      	ldr	r3, [r3, #8]
 8022c2a:	4618      	mov	r0, r3
 8022c2c:	f7f6 ffd1 	bl	8019bd2 <lwip_htonl>
 8022c30:	4602      	mov	r2, r0
 8022c32:	68fb      	ldr	r3, [r7, #12]
 8022c34:	619a      	str	r2, [r3, #24]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n",
                ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
    /* remember offered address */
    ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 8022c36:	683b      	ldr	r3, [r7, #0]
 8022c38:	691a      	ldr	r2, [r3, #16]
 8022c3a:	68fb      	ldr	r3, [r7, #12]
 8022c3c:	61da      	str	r2, [r3, #28]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n",
                ip4_addr_get_u32(&dhcp->offered_ip_addr)));

    dhcp_select(netif);
 8022c3e:	6878      	ldr	r0, [r7, #4]
 8022c40:	f000 f808 	bl	8022c54 <dhcp_select>
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_handle_offer(netif=%p) did not get server ID!\n", (void *)netif));
  }
}
 8022c44:	bf00      	nop
 8022c46:	3710      	adds	r7, #16
 8022c48:	46bd      	mov	sp, r7
 8022c4a:	bd80      	pop	{r7, pc}
 8022c4c:	2402b02c 	.word	0x2402b02c
 8022c50:	2402b00c 	.word	0x2402b00c

08022c54 <dhcp_select>:
 * @param netif the netif under DHCP control
 * @return lwIP specific error (see error.h)
 */
static err_t
dhcp_select(struct netif *netif)
{
 8022c54:	b5b0      	push	{r4, r5, r7, lr}
 8022c56:	b08a      	sub	sp, #40	@ 0x28
 8022c58:	af02      	add	r7, sp, #8
 8022c5a:	6078      	str	r0, [r7, #4]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ERROR("dhcp_select: netif != NULL", (netif != NULL), return ERR_ARG;);
 8022c5c:	687b      	ldr	r3, [r7, #4]
 8022c5e:	2b00      	cmp	r3, #0
 8022c60:	d109      	bne.n	8022c76 <dhcp_select+0x22>
 8022c62:	4b71      	ldr	r3, [pc, #452]	@ (8022e28 <dhcp_select+0x1d4>)
 8022c64:	f240 1277 	movw	r2, #375	@ 0x177
 8022c68:	4970      	ldr	r1, [pc, #448]	@ (8022e2c <dhcp_select+0x1d8>)
 8022c6a:	4871      	ldr	r0, [pc, #452]	@ (8022e30 <dhcp_select+0x1dc>)
 8022c6c:	f007 fef6 	bl	802aa5c <iprintf>
 8022c70:	f06f 030f 	mvn.w	r3, #15
 8022c74:	e0d3      	b.n	8022e1e <dhcp_select+0x1ca>
  dhcp = netif_dhcp_data(netif);
 8022c76:	687b      	ldr	r3, [r7, #4]
 8022c78:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022c7a:	61bb      	str	r3, [r7, #24]
  LWIP_ERROR("dhcp_select: dhcp != NULL", (dhcp != NULL), return ERR_VAL;);
 8022c7c:	69bb      	ldr	r3, [r7, #24]
 8022c7e:	2b00      	cmp	r3, #0
 8022c80:	d109      	bne.n	8022c96 <dhcp_select+0x42>
 8022c82:	4b69      	ldr	r3, [pc, #420]	@ (8022e28 <dhcp_select+0x1d4>)
 8022c84:	f240 1279 	movw	r2, #377	@ 0x179
 8022c88:	496a      	ldr	r1, [pc, #424]	@ (8022e34 <dhcp_select+0x1e0>)
 8022c8a:	4869      	ldr	r0, [pc, #420]	@ (8022e30 <dhcp_select+0x1dc>)
 8022c8c:	f007 fee6 	bl	802aa5c <iprintf>
 8022c90:	f06f 0305 	mvn.w	r3, #5
 8022c94:	e0c3      	b.n	8022e1e <dhcp_select+0x1ca>

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));
  dhcp_set_state(dhcp, DHCP_STATE_REQUESTING);
 8022c96:	2101      	movs	r1, #1
 8022c98:	69b8      	ldr	r0, [r7, #24]
 8022c9a:	f000 ffd4 	bl	8023c46 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8022c9e:	f107 030c 	add.w	r3, r7, #12
 8022ca2:	2203      	movs	r2, #3
 8022ca4:	69b9      	ldr	r1, [r7, #24]
 8022ca6:	6878      	ldr	r0, [r7, #4]
 8022ca8:	f001 fc66 	bl	8024578 <dhcp_create_msg>
 8022cac:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8022cae:	697b      	ldr	r3, [r7, #20]
 8022cb0:	2b00      	cmp	r3, #0
 8022cb2:	f000 8085 	beq.w	8022dc0 <dhcp_select+0x16c>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8022cb6:	697b      	ldr	r3, [r7, #20]
 8022cb8:	685b      	ldr	r3, [r3, #4]
 8022cba:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8022cbc:	89b8      	ldrh	r0, [r7, #12]
 8022cbe:	693b      	ldr	r3, [r7, #16]
 8022cc0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022cc4:	2302      	movs	r3, #2
 8022cc6:	2239      	movs	r2, #57	@ 0x39
 8022cc8:	f000 ffd8 	bl	8023c7c <dhcp_option>
 8022ccc:	4603      	mov	r3, r0
 8022cce:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 8022cd0:	89b8      	ldrh	r0, [r7, #12]
 8022cd2:	693b      	ldr	r3, [r7, #16]
 8022cd4:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022cd8:	687b      	ldr	r3, [r7, #4]
 8022cda:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8022cdc:	461a      	mov	r2, r3
 8022cde:	f001 f827 	bl	8023d30 <dhcp_option_short>
 8022ce2:	4603      	mov	r3, r0
 8022ce4:	81bb      	strh	r3, [r7, #12]

    /* MUST request the offered IP address */
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 8022ce6:	89b8      	ldrh	r0, [r7, #12]
 8022ce8:	693b      	ldr	r3, [r7, #16]
 8022cea:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022cee:	2304      	movs	r3, #4
 8022cf0:	2232      	movs	r2, #50	@ 0x32
 8022cf2:	f000 ffc3 	bl	8023c7c <dhcp_option>
 8022cf6:	4603      	mov	r3, r0
 8022cf8:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 8022cfa:	89bc      	ldrh	r4, [r7, #12]
 8022cfc:	693b      	ldr	r3, [r7, #16]
 8022cfe:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022d02:	69bb      	ldr	r3, [r7, #24]
 8022d04:	69db      	ldr	r3, [r3, #28]
 8022d06:	4618      	mov	r0, r3
 8022d08:	f7f6 ff63 	bl	8019bd2 <lwip_htonl>
 8022d0c:	4603      	mov	r3, r0
 8022d0e:	461a      	mov	r2, r3
 8022d10:	4629      	mov	r1, r5
 8022d12:	4620      	mov	r0, r4
 8022d14:	f001 f83e 	bl	8023d94 <dhcp_option_long>
 8022d18:	4603      	mov	r3, r0
 8022d1a:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 8022d1c:	89b8      	ldrh	r0, [r7, #12]
 8022d1e:	693b      	ldr	r3, [r7, #16]
 8022d20:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022d24:	2304      	movs	r3, #4
 8022d26:	2236      	movs	r2, #54	@ 0x36
 8022d28:	f000 ffa8 	bl	8023c7c <dhcp_option>
 8022d2c:	4603      	mov	r3, r0
 8022d2e:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&dhcp->server_ip_addr))));
 8022d30:	89bc      	ldrh	r4, [r7, #12]
 8022d32:	693b      	ldr	r3, [r7, #16]
 8022d34:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8022d38:	69bb      	ldr	r3, [r7, #24]
 8022d3a:	699b      	ldr	r3, [r3, #24]
 8022d3c:	4618      	mov	r0, r3
 8022d3e:	f7f6 ff48 	bl	8019bd2 <lwip_htonl>
 8022d42:	4603      	mov	r3, r0
 8022d44:	461a      	mov	r2, r3
 8022d46:	4629      	mov	r1, r5
 8022d48:	4620      	mov	r0, r4
 8022d4a:	f001 f823 	bl	8023d94 <dhcp_option_long>
 8022d4e:	4603      	mov	r3, r0
 8022d50:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8022d52:	89b8      	ldrh	r0, [r7, #12]
 8022d54:	693b      	ldr	r3, [r7, #16]
 8022d56:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022d5a:	2303      	movs	r3, #3
 8022d5c:	2237      	movs	r2, #55	@ 0x37
 8022d5e:	f000 ff8d 	bl	8023c7c <dhcp_option>
 8022d62:	4603      	mov	r3, r0
 8022d64:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022d66:	2300      	movs	r3, #0
 8022d68:	77fb      	strb	r3, [r7, #31]
 8022d6a:	e00e      	b.n	8022d8a <dhcp_select+0x136>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8022d6c:	89b8      	ldrh	r0, [r7, #12]
 8022d6e:	693b      	ldr	r3, [r7, #16]
 8022d70:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8022d74:	7ffb      	ldrb	r3, [r7, #31]
 8022d76:	4a30      	ldr	r2, [pc, #192]	@ (8022e38 <dhcp_select+0x1e4>)
 8022d78:	5cd3      	ldrb	r3, [r2, r3]
 8022d7a:	461a      	mov	r2, r3
 8022d7c:	f000 ffb2 	bl	8023ce4 <dhcp_option_byte>
 8022d80:	4603      	mov	r3, r0
 8022d82:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8022d84:	7ffb      	ldrb	r3, [r7, #31]
 8022d86:	3301      	adds	r3, #1
 8022d88:	77fb      	strb	r3, [r7, #31]
 8022d8a:	7ffb      	ldrb	r3, [r7, #31]
 8022d8c:	2b02      	cmp	r3, #2
 8022d8e:	d9ed      	bls.n	8022d6c <dhcp_select+0x118>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REQUESTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8022d90:	89b8      	ldrh	r0, [r7, #12]
 8022d92:	693b      	ldr	r3, [r7, #16]
 8022d94:	33f0      	adds	r3, #240	@ 0xf0
 8022d96:	697a      	ldr	r2, [r7, #20]
 8022d98:	4619      	mov	r1, r3
 8022d9a:	f001 fcc3 	bl	8024724 <dhcp_option_trailer>

    /* send broadcast to any DHCP server */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 8022d9e:	4b27      	ldr	r3, [pc, #156]	@ (8022e3c <dhcp_select+0x1e8>)
 8022da0:	6818      	ldr	r0, [r3, #0]
 8022da2:	4b27      	ldr	r3, [pc, #156]	@ (8022e40 <dhcp_select+0x1ec>)
 8022da4:	9301      	str	r3, [sp, #4]
 8022da6:	687b      	ldr	r3, [r7, #4]
 8022da8:	9300      	str	r3, [sp, #0]
 8022daa:	2343      	movs	r3, #67	@ 0x43
 8022dac:	4a25      	ldr	r2, [pc, #148]	@ (8022e44 <dhcp_select+0x1f0>)
 8022dae:	6979      	ldr	r1, [r7, #20]
 8022db0:	f7ff fb96 	bl	80224e0 <udp_sendto_if_src>
 8022db4:	4603      	mov	r3, r0
 8022db6:	77bb      	strb	r3, [r7, #30]
    pbuf_free(p_out);
 8022db8:	6978      	ldr	r0, [r7, #20]
 8022dba:	f7f8 fbd7 	bl	801b56c <pbuf_free>
 8022dbe:	e001      	b.n	8022dc4 <dhcp_select+0x170>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8022dc0:	23ff      	movs	r3, #255	@ 0xff
 8022dc2:	77bb      	strb	r3, [r7, #30]
  }
  if (dhcp->tries < 255) {
 8022dc4:	69bb      	ldr	r3, [r7, #24]
 8022dc6:	799b      	ldrb	r3, [r3, #6]
 8022dc8:	2bff      	cmp	r3, #255	@ 0xff
 8022dca:	d005      	beq.n	8022dd8 <dhcp_select+0x184>
    dhcp->tries++;
 8022dcc:	69bb      	ldr	r3, [r7, #24]
 8022dce:	799b      	ldrb	r3, [r3, #6]
 8022dd0:	3301      	adds	r3, #1
 8022dd2:	b2da      	uxtb	r2, r3
 8022dd4:	69bb      	ldr	r3, [r7, #24]
 8022dd6:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 8022dd8:	69bb      	ldr	r3, [r7, #24]
 8022dda:	799b      	ldrb	r3, [r3, #6]
 8022ddc:	2b05      	cmp	r3, #5
 8022dde:	d80d      	bhi.n	8022dfc <dhcp_select+0x1a8>
 8022de0:	69bb      	ldr	r3, [r7, #24]
 8022de2:	799b      	ldrb	r3, [r3, #6]
 8022de4:	461a      	mov	r2, r3
 8022de6:	2301      	movs	r3, #1
 8022de8:	4093      	lsls	r3, r2
 8022dea:	b29b      	uxth	r3, r3
 8022dec:	461a      	mov	r2, r3
 8022dee:	0152      	lsls	r2, r2, #5
 8022df0:	1ad2      	subs	r2, r2, r3
 8022df2:	0092      	lsls	r2, r2, #2
 8022df4:	4413      	add	r3, r2
 8022df6:	00db      	lsls	r3, r3, #3
 8022df8:	b29b      	uxth	r3, r3
 8022dfa:	e001      	b.n	8022e00 <dhcp_select+0x1ac>
 8022dfc:	f64e 2360 	movw	r3, #60000	@ 0xea60
 8022e00:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8022e02:	89fb      	ldrh	r3, [r7, #14]
 8022e04:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8022e08:	4a0f      	ldr	r2, [pc, #60]	@ (8022e48 <dhcp_select+0x1f4>)
 8022e0a:	fb82 1203 	smull	r1, r2, r2, r3
 8022e0e:	1152      	asrs	r2, r2, #5
 8022e10:	17db      	asrs	r3, r3, #31
 8022e12:	1ad3      	subs	r3, r2, r3
 8022e14:	b29a      	uxth	r2, r3
 8022e16:	69bb      	ldr	r3, [r7, #24]
 8022e18:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8022e1a:	f997 301e 	ldrsb.w	r3, [r7, #30]
}
 8022e1e:	4618      	mov	r0, r3
 8022e20:	3720      	adds	r7, #32
 8022e22:	46bd      	mov	sp, r7
 8022e24:	bdb0      	pop	{r4, r5, r7, pc}
 8022e26:	bf00      	nop
 8022e28:	080310cc 	.word	0x080310cc
 8022e2c:	08031178 	.word	0x08031178
 8022e30:	0803112c 	.word	0x0803112c
 8022e34:	08031194 	.word	0x08031194
 8022e38:	24000058 	.word	0x24000058
 8022e3c:	2402b034 	.word	0x2402b034
 8022e40:	08031ef8 	.word	0x08031ef8
 8022e44:	08031efc 	.word	0x08031efc
 8022e48:	10624dd3 	.word	0x10624dd3

08022e4c <dhcp_coarse_tmr>:
 * The DHCP timer that checks for lease renewal/rebind timeouts.
 * Must be called once a minute (see @ref DHCP_COARSE_TIMER_SECS).
 */
void
dhcp_coarse_tmr(void)
{
 8022e4c:	b580      	push	{r7, lr}
 8022e4e:	b082      	sub	sp, #8
 8022e50:	af00      	add	r7, sp, #0
  struct netif *netif;
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n"));
  /* iterate through all network interfaces */
  NETIF_FOREACH(netif) {
 8022e52:	4b27      	ldr	r3, [pc, #156]	@ (8022ef0 <dhcp_coarse_tmr+0xa4>)
 8022e54:	681b      	ldr	r3, [r3, #0]
 8022e56:	607b      	str	r3, [r7, #4]
 8022e58:	e042      	b.n	8022ee0 <dhcp_coarse_tmr+0x94>
    /* only act on DHCP configured interfaces */
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8022e5a:	687b      	ldr	r3, [r7, #4]
 8022e5c:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022e5e:	603b      	str	r3, [r7, #0]
    if ((dhcp != NULL) && (dhcp->state != DHCP_STATE_OFF)) {
 8022e60:	683b      	ldr	r3, [r7, #0]
 8022e62:	2b00      	cmp	r3, #0
 8022e64:	d039      	beq.n	8022eda <dhcp_coarse_tmr+0x8e>
 8022e66:	683b      	ldr	r3, [r7, #0]
 8022e68:	795b      	ldrb	r3, [r3, #5]
 8022e6a:	2b00      	cmp	r3, #0
 8022e6c:	d035      	beq.n	8022eda <dhcp_coarse_tmr+0x8e>
      /* compare lease time to expire timeout */
      if (dhcp->t0_timeout && (++dhcp->lease_used == dhcp->t0_timeout)) {
 8022e6e:	683b      	ldr	r3, [r7, #0]
 8022e70:	8a9b      	ldrh	r3, [r3, #20]
 8022e72:	2b00      	cmp	r3, #0
 8022e74:	d012      	beq.n	8022e9c <dhcp_coarse_tmr+0x50>
 8022e76:	683b      	ldr	r3, [r7, #0]
 8022e78:	8a5b      	ldrh	r3, [r3, #18]
 8022e7a:	3301      	adds	r3, #1
 8022e7c:	b29a      	uxth	r2, r3
 8022e7e:	683b      	ldr	r3, [r7, #0]
 8022e80:	825a      	strh	r2, [r3, #18]
 8022e82:	683b      	ldr	r3, [r7, #0]
 8022e84:	8a5a      	ldrh	r2, [r3, #18]
 8022e86:	683b      	ldr	r3, [r7, #0]
 8022e88:	8a9b      	ldrh	r3, [r3, #20]
 8022e8a:	429a      	cmp	r2, r3
 8022e8c:	d106      	bne.n	8022e9c <dhcp_coarse_tmr+0x50>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t0 timeout\n"));
        /* this clients' lease time has expired */
        dhcp_release_and_stop(netif);
 8022e8e:	6878      	ldr	r0, [r7, #4]
 8022e90:	f000 fe32 	bl	8023af8 <dhcp_release_and_stop>
        dhcp_start(netif);
 8022e94:	6878      	ldr	r0, [r7, #4]
 8022e96:	f000 f96b 	bl	8023170 <dhcp_start>
 8022e9a:	e01e      	b.n	8022eda <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now? */
      } else if (dhcp->t2_rebind_time && (dhcp->t2_rebind_time-- == 1)) {
 8022e9c:	683b      	ldr	r3, [r7, #0]
 8022e9e:	8a1b      	ldrh	r3, [r3, #16]
 8022ea0:	2b00      	cmp	r3, #0
 8022ea2:	d00b      	beq.n	8022ebc <dhcp_coarse_tmr+0x70>
 8022ea4:	683b      	ldr	r3, [r7, #0]
 8022ea6:	8a1b      	ldrh	r3, [r3, #16]
 8022ea8:	1e5a      	subs	r2, r3, #1
 8022eaa:	b291      	uxth	r1, r2
 8022eac:	683a      	ldr	r2, [r7, #0]
 8022eae:	8211      	strh	r1, [r2, #16]
 8022eb0:	2b01      	cmp	r3, #1
 8022eb2:	d103      	bne.n	8022ebc <dhcp_coarse_tmr+0x70>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n"));
        /* this clients' rebind timeout triggered */
        dhcp_t2_timeout(netif);
 8022eb4:	6878      	ldr	r0, [r7, #4]
 8022eb6:	f000 f8c7 	bl	8023048 <dhcp_t2_timeout>
 8022eba:	e00e      	b.n	8022eda <dhcp_coarse_tmr+0x8e>
        /* timer is active (non zero), and triggers (zeroes) now */
      } else if (dhcp->t1_renew_time && (dhcp->t1_renew_time-- == 1)) {
 8022ebc:	683b      	ldr	r3, [r7, #0]
 8022ebe:	89db      	ldrh	r3, [r3, #14]
 8022ec0:	2b00      	cmp	r3, #0
 8022ec2:	d00a      	beq.n	8022eda <dhcp_coarse_tmr+0x8e>
 8022ec4:	683b      	ldr	r3, [r7, #0]
 8022ec6:	89db      	ldrh	r3, [r3, #14]
 8022ec8:	1e5a      	subs	r2, r3, #1
 8022eca:	b291      	uxth	r1, r2
 8022ecc:	683a      	ldr	r2, [r7, #0]
 8022ece:	81d1      	strh	r1, [r2, #14]
 8022ed0:	2b01      	cmp	r3, #1
 8022ed2:	d102      	bne.n	8022eda <dhcp_coarse_tmr+0x8e>
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n"));
        /* this clients' renewal timeout triggered */
        dhcp_t1_timeout(netif);
 8022ed4:	6878      	ldr	r0, [r7, #4]
 8022ed6:	f000 f888 	bl	8022fea <dhcp_t1_timeout>
  NETIF_FOREACH(netif) {
 8022eda:	687b      	ldr	r3, [r7, #4]
 8022edc:	681b      	ldr	r3, [r3, #0]
 8022ede:	607b      	str	r3, [r7, #4]
 8022ee0:	687b      	ldr	r3, [r7, #4]
 8022ee2:	2b00      	cmp	r3, #0
 8022ee4:	d1b9      	bne.n	8022e5a <dhcp_coarse_tmr+0xe>
      }
    }
  }
}
 8022ee6:	bf00      	nop
 8022ee8:	bf00      	nop
 8022eea:	3708      	adds	r7, #8
 8022eec:	46bd      	mov	sp, r7
 8022eee:	bd80      	pop	{r7, pc}
 8022ef0:	2402af9c 	.word	0x2402af9c

08022ef4 <dhcp_fine_tmr>:
 * A DHCP server is expected to respond within a short period of time.
 * This timer checks whether an outstanding DHCP request is timed out.
 */
void
dhcp_fine_tmr(void)
{
 8022ef4:	b580      	push	{r7, lr}
 8022ef6:	b082      	sub	sp, #8
 8022ef8:	af00      	add	r7, sp, #0
  struct netif *netif;
  /* loop through netif's */
  NETIF_FOREACH(netif) {
 8022efa:	4b16      	ldr	r3, [pc, #88]	@ (8022f54 <dhcp_fine_tmr+0x60>)
 8022efc:	681b      	ldr	r3, [r3, #0]
 8022efe:	607b      	str	r3, [r7, #4]
 8022f00:	e020      	b.n	8022f44 <dhcp_fine_tmr+0x50>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8022f02:	687b      	ldr	r3, [r7, #4]
 8022f04:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022f06:	603b      	str	r3, [r7, #0]
    /* only act on DHCP configured interfaces */
    if (dhcp != NULL) {
 8022f08:	683b      	ldr	r3, [r7, #0]
 8022f0a:	2b00      	cmp	r3, #0
 8022f0c:	d017      	beq.n	8022f3e <dhcp_fine_tmr+0x4a>
      /* timer is active (non zero), and is about to trigger now */
      if (dhcp->request_timeout > 1) {
 8022f0e:	683b      	ldr	r3, [r7, #0]
 8022f10:	891b      	ldrh	r3, [r3, #8]
 8022f12:	2b01      	cmp	r3, #1
 8022f14:	d906      	bls.n	8022f24 <dhcp_fine_tmr+0x30>
        dhcp->request_timeout--;
 8022f16:	683b      	ldr	r3, [r7, #0]
 8022f18:	891b      	ldrh	r3, [r3, #8]
 8022f1a:	3b01      	subs	r3, #1
 8022f1c:	b29a      	uxth	r2, r3
 8022f1e:	683b      	ldr	r3, [r7, #0]
 8022f20:	811a      	strh	r2, [r3, #8]
 8022f22:	e00c      	b.n	8022f3e <dhcp_fine_tmr+0x4a>
      } else if (dhcp->request_timeout == 1) {
 8022f24:	683b      	ldr	r3, [r7, #0]
 8022f26:	891b      	ldrh	r3, [r3, #8]
 8022f28:	2b01      	cmp	r3, #1
 8022f2a:	d108      	bne.n	8022f3e <dhcp_fine_tmr+0x4a>
        dhcp->request_timeout--;
 8022f2c:	683b      	ldr	r3, [r7, #0]
 8022f2e:	891b      	ldrh	r3, [r3, #8]
 8022f30:	3b01      	subs	r3, #1
 8022f32:	b29a      	uxth	r2, r3
 8022f34:	683b      	ldr	r3, [r7, #0]
 8022f36:	811a      	strh	r2, [r3, #8]
        /* { dhcp->request_timeout == 0 } */
        LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n"));
        /* this client's request timeout triggered */
        dhcp_timeout(netif);
 8022f38:	6878      	ldr	r0, [r7, #4]
 8022f3a:	f000 f80d 	bl	8022f58 <dhcp_timeout>
  NETIF_FOREACH(netif) {
 8022f3e:	687b      	ldr	r3, [r7, #4]
 8022f40:	681b      	ldr	r3, [r3, #0]
 8022f42:	607b      	str	r3, [r7, #4]
 8022f44:	687b      	ldr	r3, [r7, #4]
 8022f46:	2b00      	cmp	r3, #0
 8022f48:	d1db      	bne.n	8022f02 <dhcp_fine_tmr+0xe>
      }
    }
  }
}
 8022f4a:	bf00      	nop
 8022f4c:	bf00      	nop
 8022f4e:	3708      	adds	r7, #8
 8022f50:	46bd      	mov	sp, r7
 8022f52:	bd80      	pop	{r7, pc}
 8022f54:	2402af9c 	.word	0x2402af9c

08022f58 <dhcp_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_timeout(struct netif *netif)
{
 8022f58:	b580      	push	{r7, lr}
 8022f5a:	b084      	sub	sp, #16
 8022f5c:	af00      	add	r7, sp, #0
 8022f5e:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022f60:	687b      	ldr	r3, [r7, #4]
 8022f62:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022f64:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n"));
  /* back-off period has passed, or server selection timed out */
  if ((dhcp->state == DHCP_STATE_BACKING_OFF) || (dhcp->state == DHCP_STATE_SELECTING)) {
 8022f66:	68fb      	ldr	r3, [r7, #12]
 8022f68:	795b      	ldrb	r3, [r3, #5]
 8022f6a:	2b0c      	cmp	r3, #12
 8022f6c:	d003      	beq.n	8022f76 <dhcp_timeout+0x1e>
 8022f6e:	68fb      	ldr	r3, [r7, #12]
 8022f70:	795b      	ldrb	r3, [r3, #5]
 8022f72:	2b06      	cmp	r3, #6
 8022f74:	d103      	bne.n	8022f7e <dhcp_timeout+0x26>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n"));
    dhcp_discover(netif);
 8022f76:	6878      	ldr	r0, [r7, #4]
 8022f78:	f000 fa58 	bl	802342c <dhcp_discover>
      dhcp_reboot(netif);
    } else {
      dhcp_discover(netif);
    }
  }
}
 8022f7c:	e031      	b.n	8022fe2 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REQUESTING) {
 8022f7e:	68fb      	ldr	r3, [r7, #12]
 8022f80:	795b      	ldrb	r3, [r3, #5]
 8022f82:	2b01      	cmp	r3, #1
 8022f84:	d10e      	bne.n	8022fa4 <dhcp_timeout+0x4c>
    if (dhcp->tries <= 5) {
 8022f86:	68fb      	ldr	r3, [r7, #12]
 8022f88:	799b      	ldrb	r3, [r3, #6]
 8022f8a:	2b05      	cmp	r3, #5
 8022f8c:	d803      	bhi.n	8022f96 <dhcp_timeout+0x3e>
      dhcp_select(netif);
 8022f8e:	6878      	ldr	r0, [r7, #4]
 8022f90:	f7ff fe60 	bl	8022c54 <dhcp_select>
}
 8022f94:	e025      	b.n	8022fe2 <dhcp_timeout+0x8a>
      dhcp_release_and_stop(netif);
 8022f96:	6878      	ldr	r0, [r7, #4]
 8022f98:	f000 fdae 	bl	8023af8 <dhcp_release_and_stop>
      dhcp_start(netif);
 8022f9c:	6878      	ldr	r0, [r7, #4]
 8022f9e:	f000 f8e7 	bl	8023170 <dhcp_start>
}
 8022fa2:	e01e      	b.n	8022fe2 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_CHECKING) {
 8022fa4:	68fb      	ldr	r3, [r7, #12]
 8022fa6:	795b      	ldrb	r3, [r3, #5]
 8022fa8:	2b08      	cmp	r3, #8
 8022faa:	d10b      	bne.n	8022fc4 <dhcp_timeout+0x6c>
    if (dhcp->tries <= 1) {
 8022fac:	68fb      	ldr	r3, [r7, #12]
 8022fae:	799b      	ldrb	r3, [r3, #6]
 8022fb0:	2b01      	cmp	r3, #1
 8022fb2:	d803      	bhi.n	8022fbc <dhcp_timeout+0x64>
      dhcp_check(netif);
 8022fb4:	6878      	ldr	r0, [r7, #4]
 8022fb6:	f7ff fdf3 	bl	8022ba0 <dhcp_check>
}
 8022fba:	e012      	b.n	8022fe2 <dhcp_timeout+0x8a>
      dhcp_bind(netif);
 8022fbc:	6878      	ldr	r0, [r7, #4]
 8022fbe:	f000 fad7 	bl	8023570 <dhcp_bind>
}
 8022fc2:	e00e      	b.n	8022fe2 <dhcp_timeout+0x8a>
  } else if (dhcp->state == DHCP_STATE_REBOOTING) {
 8022fc4:	68fb      	ldr	r3, [r7, #12]
 8022fc6:	795b      	ldrb	r3, [r3, #5]
 8022fc8:	2b03      	cmp	r3, #3
 8022fca:	d10a      	bne.n	8022fe2 <dhcp_timeout+0x8a>
    if (dhcp->tries < REBOOT_TRIES) {
 8022fcc:	68fb      	ldr	r3, [r7, #12]
 8022fce:	799b      	ldrb	r3, [r3, #6]
 8022fd0:	2b01      	cmp	r3, #1
 8022fd2:	d803      	bhi.n	8022fdc <dhcp_timeout+0x84>
      dhcp_reboot(netif);
 8022fd4:	6878      	ldr	r0, [r7, #4]
 8022fd6:	f000 fcdb 	bl	8023990 <dhcp_reboot>
}
 8022fda:	e002      	b.n	8022fe2 <dhcp_timeout+0x8a>
      dhcp_discover(netif);
 8022fdc:	6878      	ldr	r0, [r7, #4]
 8022fde:	f000 fa25 	bl	802342c <dhcp_discover>
}
 8022fe2:	bf00      	nop
 8022fe4:	3710      	adds	r7, #16
 8022fe6:	46bd      	mov	sp, r7
 8022fe8:	bd80      	pop	{r7, pc}

08022fea <dhcp_t1_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t1_timeout(struct netif *netif)
{
 8022fea:	b580      	push	{r7, lr}
 8022fec:	b084      	sub	sp, #16
 8022fee:	af00      	add	r7, sp, #0
 8022ff0:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8022ff2:	687b      	ldr	r3, [r7, #4]
 8022ff4:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8022ff6:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8022ff8:	68fb      	ldr	r3, [r7, #12]
 8022ffa:	795b      	ldrb	r3, [r3, #5]
 8022ffc:	2b01      	cmp	r3, #1
 8022ffe:	d007      	beq.n	8023010 <dhcp_t1_timeout+0x26>
 8023000:	68fb      	ldr	r3, [r7, #12]
 8023002:	795b      	ldrb	r3, [r3, #5]
 8023004:	2b0a      	cmp	r3, #10
 8023006:	d003      	beq.n	8023010 <dhcp_t1_timeout+0x26>
      (dhcp->state == DHCP_STATE_RENEWING)) {
 8023008:	68fb      	ldr	r3, [r7, #12]
 802300a:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 802300c:	2b05      	cmp	r3, #5
 802300e:	d117      	bne.n	8023040 <dhcp_t1_timeout+0x56>
     * eventually time-out if renew tries fail. */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t1_timeout(): must renew\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_RENEWING, not DHCP_STATE_BOUND */
    dhcp_renew(netif);
 8023010:	6878      	ldr	r0, [r7, #4]
 8023012:	f000 fb87 	bl	8023724 <dhcp_renew>
    /* Calculate next timeout */
    if (((dhcp->t2_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 8023016:	68fb      	ldr	r3, [r7, #12]
 8023018:	899b      	ldrh	r3, [r3, #12]
 802301a:	461a      	mov	r2, r3
 802301c:	68fb      	ldr	r3, [r7, #12]
 802301e:	8a5b      	ldrh	r3, [r3, #18]
 8023020:	1ad3      	subs	r3, r2, r3
 8023022:	2b01      	cmp	r3, #1
 8023024:	dd0c      	ble.n	8023040 <dhcp_t1_timeout+0x56>
      dhcp->t1_renew_time = (u16_t)((dhcp->t2_timeout - dhcp->lease_used) / 2);
 8023026:	68fb      	ldr	r3, [r7, #12]
 8023028:	899b      	ldrh	r3, [r3, #12]
 802302a:	461a      	mov	r2, r3
 802302c:	68fb      	ldr	r3, [r7, #12]
 802302e:	8a5b      	ldrh	r3, [r3, #18]
 8023030:	1ad3      	subs	r3, r2, r3
 8023032:	2b00      	cmp	r3, #0
 8023034:	da00      	bge.n	8023038 <dhcp_t1_timeout+0x4e>
 8023036:	3301      	adds	r3, #1
 8023038:	105b      	asrs	r3, r3, #1
 802303a:	b29a      	uxth	r2, r3
 802303c:	68fb      	ldr	r3, [r7, #12]
 802303e:	81da      	strh	r2, [r3, #14]
    }
  }
}
 8023040:	bf00      	nop
 8023042:	3710      	adds	r7, #16
 8023044:	46bd      	mov	sp, r7
 8023046:	bd80      	pop	{r7, pc}

08023048 <dhcp_t2_timeout>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_t2_timeout(struct netif *netif)
{
 8023048:	b580      	push	{r7, lr}
 802304a:	b084      	sub	sp, #16
 802304c:	af00      	add	r7, sp, #0
 802304e:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023050:	687b      	ldr	r3, [r7, #4]
 8023052:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023054:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n"));
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 8023056:	68fb      	ldr	r3, [r7, #12]
 8023058:	795b      	ldrb	r3, [r3, #5]
 802305a:	2b01      	cmp	r3, #1
 802305c:	d00b      	beq.n	8023076 <dhcp_t2_timeout+0x2e>
 802305e:	68fb      	ldr	r3, [r7, #12]
 8023060:	795b      	ldrb	r3, [r3, #5]
 8023062:	2b0a      	cmp	r3, #10
 8023064:	d007      	beq.n	8023076 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 8023066:	68fb      	ldr	r3, [r7, #12]
 8023068:	795b      	ldrb	r3, [r3, #5]
  if ((dhcp->state == DHCP_STATE_REQUESTING) || (dhcp->state == DHCP_STATE_BOUND) ||
 802306a:	2b05      	cmp	r3, #5
 802306c:	d003      	beq.n	8023076 <dhcp_t2_timeout+0x2e>
      (dhcp->state == DHCP_STATE_RENEWING) || (dhcp->state == DHCP_STATE_REBINDING)) {
 802306e:	68fb      	ldr	r3, [r7, #12]
 8023070:	795b      	ldrb	r3, [r3, #5]
 8023072:	2b04      	cmp	r3, #4
 8023074:	d117      	bne.n	80230a6 <dhcp_t2_timeout+0x5e>
    /* just retry to rebind */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
                ("dhcp_t2_timeout(): must rebind\n"));
    /* This slightly different to RFC2131: DHCPREQUEST will be sent from state
       DHCP_STATE_REBINDING, not DHCP_STATE_BOUND */
    dhcp_rebind(netif);
 8023076:	6878      	ldr	r0, [r7, #4]
 8023078:	f000 fbf0 	bl	802385c <dhcp_rebind>
    /* Calculate next timeout */
    if (((dhcp->t0_timeout - dhcp->lease_used) / 2) >= ((60 + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS)) {
 802307c:	68fb      	ldr	r3, [r7, #12]
 802307e:	8a9b      	ldrh	r3, [r3, #20]
 8023080:	461a      	mov	r2, r3
 8023082:	68fb      	ldr	r3, [r7, #12]
 8023084:	8a5b      	ldrh	r3, [r3, #18]
 8023086:	1ad3      	subs	r3, r2, r3
 8023088:	2b01      	cmp	r3, #1
 802308a:	dd0c      	ble.n	80230a6 <dhcp_t2_timeout+0x5e>
      dhcp->t2_rebind_time = (u16_t)((dhcp->t0_timeout - dhcp->lease_used) / 2);
 802308c:	68fb      	ldr	r3, [r7, #12]
 802308e:	8a9b      	ldrh	r3, [r3, #20]
 8023090:	461a      	mov	r2, r3
 8023092:	68fb      	ldr	r3, [r7, #12]
 8023094:	8a5b      	ldrh	r3, [r3, #18]
 8023096:	1ad3      	subs	r3, r2, r3
 8023098:	2b00      	cmp	r3, #0
 802309a:	da00      	bge.n	802309e <dhcp_t2_timeout+0x56>
 802309c:	3301      	adds	r3, #1
 802309e:	105b      	asrs	r3, r3, #1
 80230a0:	b29a      	uxth	r2, r3
 80230a2:	68fb      	ldr	r3, [r7, #12]
 80230a4:	821a      	strh	r2, [r3, #16]
    }
  }
}
 80230a6:	bf00      	nop
 80230a8:	3710      	adds	r7, #16
 80230aa:	46bd      	mov	sp, r7
 80230ac:	bd80      	pop	{r7, pc}
	...

080230b0 <dhcp_handle_ack>:
 *
 * @param netif the netif under DHCP control
 */
static void
dhcp_handle_ack(struct netif *netif, struct dhcp_msg *msg_in)
{
 80230b0:	b580      	push	{r7, lr}
 80230b2:	b084      	sub	sp, #16
 80230b4:	af00      	add	r7, sp, #0
 80230b6:	6078      	str	r0, [r7, #4]
 80230b8:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80230ba:	687b      	ldr	r3, [r7, #4]
 80230bc:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80230be:	60fb      	str	r3, [r7, #12]
#if LWIP_DHCP_GET_NTP_SRV
  ip4_addr_t ntp_server_addrs[LWIP_DHCP_MAX_NTP_SERVERS];
#endif

  /* clear options we might not get from the ACK */
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 80230c0:	68fb      	ldr	r3, [r7, #12]
 80230c2:	2200      	movs	r2, #0
 80230c4:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 80230c6:	68fb      	ldr	r3, [r7, #12]
 80230c8:	2200      	movs	r2, #0
 80230ca:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* lease time given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_LEASE_TIME)) {
 80230cc:	4b26      	ldr	r3, [pc, #152]	@ (8023168 <dhcp_handle_ack+0xb8>)
 80230ce:	78db      	ldrb	r3, [r3, #3]
 80230d0:	2b00      	cmp	r3, #0
 80230d2:	d003      	beq.n	80230dc <dhcp_handle_ack+0x2c>
    /* remember offered lease time */
    dhcp->offered_t0_lease = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_LEASE_TIME);
 80230d4:	4b25      	ldr	r3, [pc, #148]	@ (802316c <dhcp_handle_ack+0xbc>)
 80230d6:	68da      	ldr	r2, [r3, #12]
 80230d8:	68fb      	ldr	r3, [r7, #12]
 80230da:	629a      	str	r2, [r3, #40]	@ 0x28
  }
  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T1)) {
 80230dc:	4b22      	ldr	r3, [pc, #136]	@ (8023168 <dhcp_handle_ack+0xb8>)
 80230de:	791b      	ldrb	r3, [r3, #4]
 80230e0:	2b00      	cmp	r3, #0
 80230e2:	d004      	beq.n	80230ee <dhcp_handle_ack+0x3e>
    /* remember given renewal period */
    dhcp->offered_t1_renew = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T1);
 80230e4:	4b21      	ldr	r3, [pc, #132]	@ (802316c <dhcp_handle_ack+0xbc>)
 80230e6:	691a      	ldr	r2, [r3, #16]
 80230e8:	68fb      	ldr	r3, [r7, #12]
 80230ea:	62da      	str	r2, [r3, #44]	@ 0x2c
 80230ec:	e004      	b.n	80230f8 <dhcp_handle_ack+0x48>
  } else {
    /* calculate safe periods for renewal */
    dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2;
 80230ee:	68fb      	ldr	r3, [r7, #12]
 80230f0:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80230f2:	085a      	lsrs	r2, r3, #1
 80230f4:	68fb      	ldr	r3, [r7, #12]
 80230f6:	62da      	str	r2, [r3, #44]	@ 0x2c
  }

  /* renewal period given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_T2)) {
 80230f8:	4b1b      	ldr	r3, [pc, #108]	@ (8023168 <dhcp_handle_ack+0xb8>)
 80230fa:	795b      	ldrb	r3, [r3, #5]
 80230fc:	2b00      	cmp	r3, #0
 80230fe:	d004      	beq.n	802310a <dhcp_handle_ack+0x5a>
    /* remember given rebind period */
    dhcp->offered_t2_rebind = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_T2);
 8023100:	4b1a      	ldr	r3, [pc, #104]	@ (802316c <dhcp_handle_ack+0xbc>)
 8023102:	695a      	ldr	r2, [r3, #20]
 8023104:	68fb      	ldr	r3, [r7, #12]
 8023106:	631a      	str	r2, [r3, #48]	@ 0x30
 8023108:	e007      	b.n	802311a <dhcp_handle_ack+0x6a>
  } else {
    /* calculate safe periods for rebinding (offered_t0_lease * 0.875 -> 87.5%)*/
    dhcp->offered_t2_rebind = (dhcp->offered_t0_lease * 7U) / 8U;
 802310a:	68fb      	ldr	r3, [r7, #12]
 802310c:	6a9a      	ldr	r2, [r3, #40]	@ 0x28
 802310e:	4613      	mov	r3, r2
 8023110:	00db      	lsls	r3, r3, #3
 8023112:	1a9b      	subs	r3, r3, r2
 8023114:	08da      	lsrs	r2, r3, #3
 8023116:	68fb      	ldr	r3, [r7, #12]
 8023118:	631a      	str	r2, [r3, #48]	@ 0x30
  }

  /* (y)our internet address */
  ip4_addr_copy(dhcp->offered_ip_addr, msg_in->yiaddr);
 802311a:	683b      	ldr	r3, [r7, #0]
 802311c:	691a      	ldr	r2, [r3, #16]
 802311e:	68fb      	ldr	r3, [r7, #12]
 8023120:	61da      	str	r2, [r3, #28]
     boot file name copied in dhcp_parse_reply if not overloaded */
  ip4_addr_copy(dhcp->offered_si_addr, msg_in->siaddr);
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* subnet mask given? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)) {
 8023122:	4b11      	ldr	r3, [pc, #68]	@ (8023168 <dhcp_handle_ack+0xb8>)
 8023124:	799b      	ldrb	r3, [r3, #6]
 8023126:	2b00      	cmp	r3, #0
 8023128:	d00b      	beq.n	8023142 <dhcp_handle_ack+0x92>
    /* remember given subnet mask */
    ip4_addr_set_u32(&dhcp->offered_sn_mask, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_SUBNET_MASK)));
 802312a:	4b10      	ldr	r3, [pc, #64]	@ (802316c <dhcp_handle_ack+0xbc>)
 802312c:	699b      	ldr	r3, [r3, #24]
 802312e:	4618      	mov	r0, r3
 8023130:	f7f6 fd4f 	bl	8019bd2 <lwip_htonl>
 8023134:	4602      	mov	r2, r0
 8023136:	68fb      	ldr	r3, [r7, #12]
 8023138:	621a      	str	r2, [r3, #32]
    dhcp->subnet_mask_given = 1;
 802313a:	68fb      	ldr	r3, [r7, #12]
 802313c:	2201      	movs	r2, #1
 802313e:	71da      	strb	r2, [r3, #7]
 8023140:	e002      	b.n	8023148 <dhcp_handle_ack+0x98>
  } else {
    dhcp->subnet_mask_given = 0;
 8023142:	68fb      	ldr	r3, [r7, #12]
 8023144:	2200      	movs	r2, #0
 8023146:	71da      	strb	r2, [r3, #7]
  }

  /* gateway router */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_ROUTER)) {
 8023148:	4b07      	ldr	r3, [pc, #28]	@ (8023168 <dhcp_handle_ack+0xb8>)
 802314a:	79db      	ldrb	r3, [r3, #7]
 802314c:	2b00      	cmp	r3, #0
 802314e:	d007      	beq.n	8023160 <dhcp_handle_ack+0xb0>
    ip4_addr_set_u32(&dhcp->offered_gw_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_ROUTER)));
 8023150:	4b06      	ldr	r3, [pc, #24]	@ (802316c <dhcp_handle_ack+0xbc>)
 8023152:	69db      	ldr	r3, [r3, #28]
 8023154:	4618      	mov	r0, r3
 8023156:	f7f6 fd3c 	bl	8019bd2 <lwip_htonl>
 802315a:	4602      	mov	r2, r0
 802315c:	68fb      	ldr	r3, [r7, #12]
 802315e:	625a      	str	r2, [r3, #36]	@ 0x24
    ip_addr_t dns_addr;
    ip_addr_set_ip4_u32_val(dns_addr, lwip_htonl(dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_DNS_SERVER + n)));
    dns_setserver(n, &dns_addr);
  }
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
}
 8023160:	bf00      	nop
 8023162:	3710      	adds	r7, #16
 8023164:	46bd      	mov	sp, r7
 8023166:	bd80      	pop	{r7, pc}
 8023168:	2402b02c 	.word	0x2402b02c
 802316c:	2402b00c 	.word	0x2402b00c

08023170 <dhcp_start>:
 * - ERR_OK - No error
 * - ERR_MEM - Out of memory
 */
err_t
dhcp_start(struct netif *netif)
{
 8023170:	b580      	push	{r7, lr}
 8023172:	b084      	sub	sp, #16
 8023174:	af00      	add	r7, sp, #0
 8023176:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp;
  err_t result;

  LWIP_ASSERT_CORE_LOCKED();
 8023178:	f7ee f844 	bl	8011204 <sys_check_core_locking>
  LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;);
 802317c:	687b      	ldr	r3, [r7, #4]
 802317e:	2b00      	cmp	r3, #0
 8023180:	d109      	bne.n	8023196 <dhcp_start+0x26>
 8023182:	4b37      	ldr	r3, [pc, #220]	@ (8023260 <dhcp_start+0xf0>)
 8023184:	f240 22e7 	movw	r2, #743	@ 0x2e7
 8023188:	4936      	ldr	r1, [pc, #216]	@ (8023264 <dhcp_start+0xf4>)
 802318a:	4837      	ldr	r0, [pc, #220]	@ (8023268 <dhcp_start+0xf8>)
 802318c:	f007 fc66 	bl	802aa5c <iprintf>
 8023190:	f06f 030f 	mvn.w	r3, #15
 8023194:	e060      	b.n	8023258 <dhcp_start+0xe8>
  LWIP_ERROR("netif is not up, old style port?", netif_is_up(netif), return ERR_ARG;);
 8023196:	687b      	ldr	r3, [r7, #4]
 8023198:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802319c:	f003 0301 	and.w	r3, r3, #1
 80231a0:	2b00      	cmp	r3, #0
 80231a2:	d109      	bne.n	80231b8 <dhcp_start+0x48>
 80231a4:	4b2e      	ldr	r3, [pc, #184]	@ (8023260 <dhcp_start+0xf0>)
 80231a6:	f44f 723a 	mov.w	r2, #744	@ 0x2e8
 80231aa:	4930      	ldr	r1, [pc, #192]	@ (802326c <dhcp_start+0xfc>)
 80231ac:	482e      	ldr	r0, [pc, #184]	@ (8023268 <dhcp_start+0xf8>)
 80231ae:	f007 fc55 	bl	802aa5c <iprintf>
 80231b2:	f06f 030f 	mvn.w	r3, #15
 80231b6:	e04f      	b.n	8023258 <dhcp_start+0xe8>
  dhcp = netif_dhcp_data(netif);
 80231b8:	687b      	ldr	r3, [r7, #4]
 80231ba:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80231bc:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* check MTU of the netif */
  if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) {
 80231be:	687b      	ldr	r3, [r7, #4]
 80231c0:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 80231c2:	f5b3 7f10 	cmp.w	r3, #576	@ 0x240
 80231c6:	d202      	bcs.n	80231ce <dhcp_start+0x5e>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n"));
    return ERR_MEM;
 80231c8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80231cc:	e044      	b.n	8023258 <dhcp_start+0xe8>
  }

  /* no DHCP client attached yet? */
  if (dhcp == NULL) {
 80231ce:	68fb      	ldr	r3, [r7, #12]
 80231d0:	2b00      	cmp	r3, #0
 80231d2:	d10d      	bne.n	80231f0 <dhcp_start+0x80>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): mallocing new DHCP client\n"));
    dhcp = (struct dhcp *)mem_malloc(sizeof(struct dhcp));
 80231d4:	2034      	movs	r0, #52	@ 0x34
 80231d6:	f7f7 f8c9 	bl	801a36c <mem_malloc>
 80231da:	60f8      	str	r0, [r7, #12]
    if (dhcp == NULL) {
 80231dc:	68fb      	ldr	r3, [r7, #12]
 80231de:	2b00      	cmp	r3, #0
 80231e0:	d102      	bne.n	80231e8 <dhcp_start+0x78>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n"));
      return ERR_MEM;
 80231e2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80231e6:	e037      	b.n	8023258 <dhcp_start+0xe8>
    }

    /* store this dhcp client in the netif */
    netif_set_client_data(netif, LWIP_NETIF_CLIENT_DATA_INDEX_DHCP, dhcp);
 80231e8:	687b      	ldr	r3, [r7, #4]
 80231ea:	68fa      	ldr	r2, [r7, #12]
 80231ec:	625a      	str	r2, [r3, #36]	@ 0x24
 80231ee:	e005      	b.n	80231fc <dhcp_start+0x8c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp"));
    /* already has DHCP client attached */
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n"));

    if (dhcp->pcb_allocated != 0) {
 80231f0:	68fb      	ldr	r3, [r7, #12]
 80231f2:	791b      	ldrb	r3, [r3, #4]
 80231f4:	2b00      	cmp	r3, #0
 80231f6:	d001      	beq.n	80231fc <dhcp_start+0x8c>
      dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 80231f8:	f7ff fc8e 	bl	8022b18 <dhcp_dec_pcb_refcount>
    }
    /* dhcp is cleared below, no need to reset flag*/
  }

  /* clear data structure */
  memset(dhcp, 0, sizeof(struct dhcp));
 80231fc:	2234      	movs	r2, #52	@ 0x34
 80231fe:	2100      	movs	r1, #0
 8023200:	68f8      	ldr	r0, [r7, #12]
 8023202:	f007 fdbd 	bl	802ad80 <memset>
  /* dhcp_set_state(&dhcp, DHCP_STATE_OFF); */

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n"));

  if (dhcp_inc_pcb_refcount() != ERR_OK) { /* ensure DHCP PCB is allocated */
 8023206:	f7ff fc35 	bl	8022a74 <dhcp_inc_pcb_refcount>
 802320a:	4603      	mov	r3, r0
 802320c:	2b00      	cmp	r3, #0
 802320e:	d002      	beq.n	8023216 <dhcp_start+0xa6>
    return ERR_MEM;
 8023210:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8023214:	e020      	b.n	8023258 <dhcp_start+0xe8>
  }
  dhcp->pcb_allocated = 1;
 8023216:	68fb      	ldr	r3, [r7, #12]
 8023218:	2201      	movs	r2, #1
 802321a:	711a      	strb	r2, [r3, #4]

  if (!netif_is_link_up(netif)) {
 802321c:	687b      	ldr	r3, [r7, #4]
 802321e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8023222:	f003 0304 	and.w	r3, r3, #4
 8023226:	2b00      	cmp	r3, #0
 8023228:	d105      	bne.n	8023236 <dhcp_start+0xc6>
    /* set state INIT and wait for dhcp_network_changed() to call dhcp_discover() */
    dhcp_set_state(dhcp, DHCP_STATE_INIT);
 802322a:	2102      	movs	r1, #2
 802322c:	68f8      	ldr	r0, [r7, #12]
 802322e:	f000 fd0a 	bl	8023c46 <dhcp_set_state>
    return ERR_OK;
 8023232:	2300      	movs	r3, #0
 8023234:	e010      	b.n	8023258 <dhcp_start+0xe8>
  }

  /* (re)start the DHCP negotiation */
  result = dhcp_discover(netif);
 8023236:	6878      	ldr	r0, [r7, #4]
 8023238:	f000 f8f8 	bl	802342c <dhcp_discover>
 802323c:	4603      	mov	r3, r0
 802323e:	72fb      	strb	r3, [r7, #11]
  if (result != ERR_OK) {
 8023240:	f997 300b 	ldrsb.w	r3, [r7, #11]
 8023244:	2b00      	cmp	r3, #0
 8023246:	d005      	beq.n	8023254 <dhcp_start+0xe4>
    /* free resources allocated above */
    dhcp_release_and_stop(netif);
 8023248:	6878      	ldr	r0, [r7, #4]
 802324a:	f000 fc55 	bl	8023af8 <dhcp_release_and_stop>
    return ERR_MEM;
 802324e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8023252:	e001      	b.n	8023258 <dhcp_start+0xe8>
  }
  return result;
 8023254:	f997 300b 	ldrsb.w	r3, [r7, #11]
}
 8023258:	4618      	mov	r0, r3
 802325a:	3710      	adds	r7, #16
 802325c:	46bd      	mov	sp, r7
 802325e:	bd80      	pop	{r7, pc}
 8023260:	080310cc 	.word	0x080310cc
 8023264:	080311b0 	.word	0x080311b0
 8023268:	0803112c 	.word	0x0803112c
 802326c:	080311f4 	.word	0x080311f4

08023270 <dhcp_network_changed>:
 * This enters the REBOOTING state to verify that the currently bound
 * address is still valid.
 */
void
dhcp_network_changed(struct netif *netif)
{
 8023270:	b580      	push	{r7, lr}
 8023272:	b084      	sub	sp, #16
 8023274:	af00      	add	r7, sp, #0
 8023276:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023278:	687b      	ldr	r3, [r7, #4]
 802327a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802327c:	60fb      	str	r3, [r7, #12]

  if (!dhcp) {
 802327e:	68fb      	ldr	r3, [r7, #12]
 8023280:	2b00      	cmp	r3, #0
 8023282:	d025      	beq.n	80232d0 <dhcp_network_changed+0x60>
    return;
  }
  switch (dhcp->state) {
 8023284:	68fb      	ldr	r3, [r7, #12]
 8023286:	795b      	ldrb	r3, [r3, #5]
 8023288:	2b0a      	cmp	r3, #10
 802328a:	d008      	beq.n	802329e <dhcp_network_changed+0x2e>
 802328c:	2b0a      	cmp	r3, #10
 802328e:	dc0d      	bgt.n	80232ac <dhcp_network_changed+0x3c>
 8023290:	2b00      	cmp	r3, #0
 8023292:	d01f      	beq.n	80232d4 <dhcp_network_changed+0x64>
 8023294:	2b00      	cmp	r3, #0
 8023296:	db09      	blt.n	80232ac <dhcp_network_changed+0x3c>
 8023298:	3b03      	subs	r3, #3
 802329a:	2b02      	cmp	r3, #2
 802329c:	d806      	bhi.n	80232ac <dhcp_network_changed+0x3c>
    case DHCP_STATE_REBINDING:
    case DHCP_STATE_RENEWING:
    case DHCP_STATE_BOUND:
    case DHCP_STATE_REBOOTING:
      dhcp->tries = 0;
 802329e:	68fb      	ldr	r3, [r7, #12]
 80232a0:	2200      	movs	r2, #0
 80232a2:	719a      	strb	r2, [r3, #6]
      dhcp_reboot(netif);
 80232a4:	6878      	ldr	r0, [r7, #4]
 80232a6:	f000 fb73 	bl	8023990 <dhcp_reboot>
      break;
 80232aa:	e014      	b.n	80232d6 <dhcp_network_changed+0x66>
    case DHCP_STATE_OFF:
      /* stay off */
      break;
    default:
      LWIP_ASSERT("invalid dhcp->state", dhcp->state <= DHCP_STATE_BACKING_OFF);
 80232ac:	68fb      	ldr	r3, [r7, #12]
 80232ae:	795b      	ldrb	r3, [r3, #5]
 80232b0:	2b0c      	cmp	r3, #12
 80232b2:	d906      	bls.n	80232c2 <dhcp_network_changed+0x52>
 80232b4:	4b09      	ldr	r3, [pc, #36]	@ (80232dc <dhcp_network_changed+0x6c>)
 80232b6:	f240 326d 	movw	r2, #877	@ 0x36d
 80232ba:	4909      	ldr	r1, [pc, #36]	@ (80232e0 <dhcp_network_changed+0x70>)
 80232bc:	4809      	ldr	r0, [pc, #36]	@ (80232e4 <dhcp_network_changed+0x74>)
 80232be:	f007 fbcd 	bl	802aa5c <iprintf>
        autoip_stop(netif);
        dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
      }
#endif /* LWIP_DHCP_AUTOIP_COOP */
      /* ensure we start with short timeouts, even if already discovering */
      dhcp->tries = 0;
 80232c2:	68fb      	ldr	r3, [r7, #12]
 80232c4:	2200      	movs	r2, #0
 80232c6:	719a      	strb	r2, [r3, #6]
      dhcp_discover(netif);
 80232c8:	6878      	ldr	r0, [r7, #4]
 80232ca:	f000 f8af 	bl	802342c <dhcp_discover>
      break;
 80232ce:	e002      	b.n	80232d6 <dhcp_network_changed+0x66>
    return;
 80232d0:	bf00      	nop
 80232d2:	e000      	b.n	80232d6 <dhcp_network_changed+0x66>
      break;
 80232d4:	bf00      	nop
  }
}
 80232d6:	3710      	adds	r7, #16
 80232d8:	46bd      	mov	sp, r7
 80232da:	bd80      	pop	{r7, pc}
 80232dc:	080310cc 	.word	0x080310cc
 80232e0:	08031218 	.word	0x08031218
 80232e4:	0803112c 	.word	0x0803112c

080232e8 <dhcp_arp_reply>:
 * @param netif the network interface on which the reply was received
 * @param addr The IP address we received a reply from
 */
void
dhcp_arp_reply(struct netif *netif, const ip4_addr_t *addr)
{
 80232e8:	b580      	push	{r7, lr}
 80232ea:	b084      	sub	sp, #16
 80232ec:	af00      	add	r7, sp, #0
 80232ee:	6078      	str	r0, [r7, #4]
 80232f0:	6039      	str	r1, [r7, #0]
  struct dhcp *dhcp;

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 80232f2:	687b      	ldr	r3, [r7, #4]
 80232f4:	2b00      	cmp	r3, #0
 80232f6:	d107      	bne.n	8023308 <dhcp_arp_reply+0x20>
 80232f8:	4b0e      	ldr	r3, [pc, #56]	@ (8023334 <dhcp_arp_reply+0x4c>)
 80232fa:	f240 328b 	movw	r2, #907	@ 0x38b
 80232fe:	490e      	ldr	r1, [pc, #56]	@ (8023338 <dhcp_arp_reply+0x50>)
 8023300:	480e      	ldr	r0, [pc, #56]	@ (802333c <dhcp_arp_reply+0x54>)
 8023302:	f007 fbab 	bl	802aa5c <iprintf>
 8023306:	e012      	b.n	802332e <dhcp_arp_reply+0x46>
  dhcp = netif_dhcp_data(netif);
 8023308:	687b      	ldr	r3, [r7, #4]
 802330a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802330c:	60fb      	str	r3, [r7, #12]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n"));
  /* is a DHCP client doing an ARP check? */
  if ((dhcp != NULL) && (dhcp->state == DHCP_STATE_CHECKING)) {
 802330e:	68fb      	ldr	r3, [r7, #12]
 8023310:	2b00      	cmp	r3, #0
 8023312:	d00c      	beq.n	802332e <dhcp_arp_reply+0x46>
 8023314:	68fb      	ldr	r3, [r7, #12]
 8023316:	795b      	ldrb	r3, [r3, #5]
 8023318:	2b08      	cmp	r3, #8
 802331a:	d108      	bne.n	802332e <dhcp_arp_reply+0x46>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n",
                ip4_addr_get_u32(addr)));
    /* did a host respond with the address we
       were offered by the DHCP server? */
    if (ip4_addr_cmp(addr, &dhcp->offered_ip_addr)) {
 802331c:	683b      	ldr	r3, [r7, #0]
 802331e:	681a      	ldr	r2, [r3, #0]
 8023320:	68fb      	ldr	r3, [r7, #12]
 8023322:	69db      	ldr	r3, [r3, #28]
 8023324:	429a      	cmp	r2, r3
 8023326:	d102      	bne.n	802332e <dhcp_arp_reply+0x46>
      /* we will not accept the offered address */
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING,
                  ("dhcp_arp_reply(): arp reply matched with offered address, declining\n"));
      dhcp_decline(netif);
 8023328:	6878      	ldr	r0, [r7, #4]
 802332a:	f000 f809 	bl	8023340 <dhcp_decline>
    }
  }
}
 802332e:	3710      	adds	r7, #16
 8023330:	46bd      	mov	sp, r7
 8023332:	bd80      	pop	{r7, pc}
 8023334:	080310cc 	.word	0x080310cc
 8023338:	080311b0 	.word	0x080311b0
 802333c:	0803112c 	.word	0x0803112c

08023340 <dhcp_decline>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_decline(struct netif *netif)
{
 8023340:	b5b0      	push	{r4, r5, r7, lr}
 8023342:	b08a      	sub	sp, #40	@ 0x28
 8023344:	af02      	add	r7, sp, #8
 8023346:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023348:	687b      	ldr	r3, [r7, #4]
 802334a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802334c:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_BACKING_OFF);
 802334e:	210c      	movs	r1, #12
 8023350:	69b8      	ldr	r0, [r7, #24]
 8023352:	f000 fc78 	bl	8023c46 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DECLINE, &options_out_len);
 8023356:	f107 030c 	add.w	r3, r7, #12
 802335a:	2204      	movs	r2, #4
 802335c:	69b9      	ldr	r1, [r7, #24]
 802335e:	6878      	ldr	r0, [r7, #4]
 8023360:	f001 f90a 	bl	8024578 <dhcp_create_msg>
 8023364:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8023366:	697b      	ldr	r3, [r7, #20]
 8023368:	2b00      	cmp	r3, #0
 802336a:	d035      	beq.n	80233d8 <dhcp_decline+0x98>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 802336c:	697b      	ldr	r3, [r7, #20]
 802336e:	685b      	ldr	r3, [r3, #4]
 8023370:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 8023372:	89b8      	ldrh	r0, [r7, #12]
 8023374:	693b      	ldr	r3, [r7, #16]
 8023376:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802337a:	2304      	movs	r3, #4
 802337c:	2232      	movs	r2, #50	@ 0x32
 802337e:	f000 fc7d 	bl	8023c7c <dhcp_option>
 8023382:	4603      	mov	r3, r0
 8023384:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 8023386:	89bc      	ldrh	r4, [r7, #12]
 8023388:	693b      	ldr	r3, [r7, #16]
 802338a:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 802338e:	69bb      	ldr	r3, [r7, #24]
 8023390:	69db      	ldr	r3, [r3, #28]
 8023392:	4618      	mov	r0, r3
 8023394:	f7f6 fc1d 	bl	8019bd2 <lwip_htonl>
 8023398:	4603      	mov	r3, r0
 802339a:	461a      	mov	r2, r3
 802339c:	4629      	mov	r1, r5
 802339e:	4620      	mov	r0, r4
 80233a0:	f000 fcf8 	bl	8023d94 <dhcp_option_long>
 80233a4:	4603      	mov	r3, r0
 80233a6:	81bb      	strh	r3, [r7, #12]

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_BACKING_OFF, msg_out, DHCP_DECLINE, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80233a8:	89b8      	ldrh	r0, [r7, #12]
 80233aa:	693b      	ldr	r3, [r7, #16]
 80233ac:	33f0      	adds	r3, #240	@ 0xf0
 80233ae:	697a      	ldr	r2, [r7, #20]
 80233b0:	4619      	mov	r1, r3
 80233b2:	f001 f9b7 	bl	8024724 <dhcp_option_trailer>

    /* per section 4.4.4, broadcast DECLINE messages */
    result = udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 80233b6:	4b19      	ldr	r3, [pc, #100]	@ (802341c <dhcp_decline+0xdc>)
 80233b8:	6818      	ldr	r0, [r3, #0]
 80233ba:	4b19      	ldr	r3, [pc, #100]	@ (8023420 <dhcp_decline+0xe0>)
 80233bc:	9301      	str	r3, [sp, #4]
 80233be:	687b      	ldr	r3, [r7, #4]
 80233c0:	9300      	str	r3, [sp, #0]
 80233c2:	2343      	movs	r3, #67	@ 0x43
 80233c4:	4a17      	ldr	r2, [pc, #92]	@ (8023424 <dhcp_decline+0xe4>)
 80233c6:	6979      	ldr	r1, [r7, #20]
 80233c8:	f7ff f88a 	bl	80224e0 <udp_sendto_if_src>
 80233cc:	4603      	mov	r3, r0
 80233ce:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 80233d0:	6978      	ldr	r0, [r7, #20]
 80233d2:	f7f8 f8cb 	bl	801b56c <pbuf_free>
 80233d6:	e001      	b.n	80233dc <dhcp_decline+0x9c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_decline: could not allocate DHCP request\n"));
    result = ERR_MEM;
 80233d8:	23ff      	movs	r3, #255	@ 0xff
 80233da:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 80233dc:	69bb      	ldr	r3, [r7, #24]
 80233de:	799b      	ldrb	r3, [r3, #6]
 80233e0:	2bff      	cmp	r3, #255	@ 0xff
 80233e2:	d005      	beq.n	80233f0 <dhcp_decline+0xb0>
    dhcp->tries++;
 80233e4:	69bb      	ldr	r3, [r7, #24]
 80233e6:	799b      	ldrb	r3, [r3, #6]
 80233e8:	3301      	adds	r3, #1
 80233ea:	b2da      	uxtb	r2, r3
 80233ec:	69bb      	ldr	r3, [r7, #24]
 80233ee:	719a      	strb	r2, [r3, #6]
  }
  msecs = 10 * 1000;
 80233f0:	f242 7310 	movw	r3, #10000	@ 0x2710
 80233f4:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 80233f6:	89fb      	ldrh	r3, [r7, #14]
 80233f8:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 80233fc:	4a0a      	ldr	r2, [pc, #40]	@ (8023428 <dhcp_decline+0xe8>)
 80233fe:	fb82 1203 	smull	r1, r2, r2, r3
 8023402:	1152      	asrs	r2, r2, #5
 8023404:	17db      	asrs	r3, r3, #31
 8023406:	1ad3      	subs	r3, r2, r3
 8023408:	b29a      	uxth	r2, r3
 802340a:	69bb      	ldr	r3, [r7, #24]
 802340c:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 802340e:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8023412:	4618      	mov	r0, r3
 8023414:	3720      	adds	r7, #32
 8023416:	46bd      	mov	sp, r7
 8023418:	bdb0      	pop	{r4, r5, r7, pc}
 802341a:	bf00      	nop
 802341c:	2402b034 	.word	0x2402b034
 8023420:	08031ef8 	.word	0x08031ef8
 8023424:	08031efc 	.word	0x08031efc
 8023428:	10624dd3 	.word	0x10624dd3

0802342c <dhcp_discover>:
 *
 * @param netif the netif under DHCP control
 */
static err_t
dhcp_discover(struct netif *netif)
{
 802342c:	b580      	push	{r7, lr}
 802342e:	b08a      	sub	sp, #40	@ 0x28
 8023430:	af02      	add	r7, sp, #8
 8023432:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023434:	687b      	ldr	r3, [r7, #4]
 8023436:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023438:	61bb      	str	r3, [r7, #24]
  err_t result = ERR_OK;
 802343a:	2300      	movs	r3, #0
 802343c:	75fb      	strb	r3, [r7, #23]
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n"));

  ip4_addr_set_any(&dhcp->offered_ip_addr);
 802343e:	69bb      	ldr	r3, [r7, #24]
 8023440:	2200      	movs	r2, #0
 8023442:	61da      	str	r2, [r3, #28]
  dhcp_set_state(dhcp, DHCP_STATE_SELECTING);
 8023444:	2106      	movs	r1, #6
 8023446:	69b8      	ldr	r0, [r7, #24]
 8023448:	f000 fbfd 	bl	8023c46 <dhcp_set_state>
  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_DISCOVER, &options_out_len);
 802344c:	f107 0308 	add.w	r3, r7, #8
 8023450:	2201      	movs	r2, #1
 8023452:	69b9      	ldr	r1, [r7, #24]
 8023454:	6878      	ldr	r0, [r7, #4]
 8023456:	f001 f88f 	bl	8024578 <dhcp_create_msg>
 802345a:	6138      	str	r0, [r7, #16]
  if (p_out != NULL) {
 802345c:	693b      	ldr	r3, [r7, #16]
 802345e:	2b00      	cmp	r3, #0
 8023460:	d04b      	beq.n	80234fa <dhcp_discover+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8023462:	693b      	ldr	r3, [r7, #16]
 8023464:	685b      	ldr	r3, [r3, #4]
 8023466:	60fb      	str	r3, [r7, #12]
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n"));

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 8023468:	8938      	ldrh	r0, [r7, #8]
 802346a:	68fb      	ldr	r3, [r7, #12]
 802346c:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023470:	2302      	movs	r3, #2
 8023472:	2239      	movs	r2, #57	@ 0x39
 8023474:	f000 fc02 	bl	8023c7c <dhcp_option>
 8023478:	4603      	mov	r3, r0
 802347a:	813b      	strh	r3, [r7, #8]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 802347c:	8938      	ldrh	r0, [r7, #8]
 802347e:	68fb      	ldr	r3, [r7, #12]
 8023480:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023484:	687b      	ldr	r3, [r7, #4]
 8023486:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8023488:	461a      	mov	r2, r3
 802348a:	f000 fc51 	bl	8023d30 <dhcp_option_short>
 802348e:	4603      	mov	r3, r0
 8023490:	813b      	strh	r3, [r7, #8]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8023492:	8938      	ldrh	r0, [r7, #8]
 8023494:	68fb      	ldr	r3, [r7, #12]
 8023496:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802349a:	2303      	movs	r3, #3
 802349c:	2237      	movs	r2, #55	@ 0x37
 802349e:	f000 fbed 	bl	8023c7c <dhcp_option>
 80234a2:	4603      	mov	r3, r0
 80234a4:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80234a6:	2300      	movs	r3, #0
 80234a8:	77fb      	strb	r3, [r7, #31]
 80234aa:	e00e      	b.n	80234ca <dhcp_discover+0x9e>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 80234ac:	8938      	ldrh	r0, [r7, #8]
 80234ae:	68fb      	ldr	r3, [r7, #12]
 80234b0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80234b4:	7ffb      	ldrb	r3, [r7, #31]
 80234b6:	4a29      	ldr	r2, [pc, #164]	@ (802355c <dhcp_discover+0x130>)
 80234b8:	5cd3      	ldrb	r3, [r2, r3]
 80234ba:	461a      	mov	r2, r3
 80234bc:	f000 fc12 	bl	8023ce4 <dhcp_option_byte>
 80234c0:	4603      	mov	r3, r0
 80234c2:	813b      	strh	r3, [r7, #8]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80234c4:	7ffb      	ldrb	r3, [r7, #31]
 80234c6:	3301      	adds	r3, #1
 80234c8:	77fb      	strb	r3, [r7, #31]
 80234ca:	7ffb      	ldrb	r3, [r7, #31]
 80234cc:	2b02      	cmp	r3, #2
 80234ce:	d9ed      	bls.n	80234ac <dhcp_discover+0x80>
    }
    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_SELECTING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80234d0:	8938      	ldrh	r0, [r7, #8]
 80234d2:	68fb      	ldr	r3, [r7, #12]
 80234d4:	33f0      	adds	r3, #240	@ 0xf0
 80234d6:	693a      	ldr	r2, [r7, #16]
 80234d8:	4619      	mov	r1, r3
 80234da:	f001 f923 	bl	8024724 <dhcp_option_trailer>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER)\n"));
    udp_sendto_if_src(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif, IP4_ADDR_ANY);
 80234de:	4b20      	ldr	r3, [pc, #128]	@ (8023560 <dhcp_discover+0x134>)
 80234e0:	6818      	ldr	r0, [r3, #0]
 80234e2:	4b20      	ldr	r3, [pc, #128]	@ (8023564 <dhcp_discover+0x138>)
 80234e4:	9301      	str	r3, [sp, #4]
 80234e6:	687b      	ldr	r3, [r7, #4]
 80234e8:	9300      	str	r3, [sp, #0]
 80234ea:	2343      	movs	r3, #67	@ 0x43
 80234ec:	4a1e      	ldr	r2, [pc, #120]	@ (8023568 <dhcp_discover+0x13c>)
 80234ee:	6939      	ldr	r1, [r7, #16]
 80234f0:	f7fe fff6 	bl	80224e0 <udp_sendto_if_src>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n"));
    pbuf_free(p_out);
 80234f4:	6938      	ldr	r0, [r7, #16]
 80234f6:	f7f8 f839 	bl	801b56c <pbuf_free>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n"));
  }
  if (dhcp->tries < 255) {
 80234fa:	69bb      	ldr	r3, [r7, #24]
 80234fc:	799b      	ldrb	r3, [r3, #6]
 80234fe:	2bff      	cmp	r3, #255	@ 0xff
 8023500:	d005      	beq.n	802350e <dhcp_discover+0xe2>
    dhcp->tries++;
 8023502:	69bb      	ldr	r3, [r7, #24]
 8023504:	799b      	ldrb	r3, [r3, #6]
 8023506:	3301      	adds	r3, #1
 8023508:	b2da      	uxtb	r2, r3
 802350a:	69bb      	ldr	r3, [r7, #24]
 802350c:	719a      	strb	r2, [r3, #6]
  if (dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) {
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON;
    autoip_start(netif);
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */
  msecs = (u16_t)((dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000);
 802350e:	69bb      	ldr	r3, [r7, #24]
 8023510:	799b      	ldrb	r3, [r3, #6]
 8023512:	2b05      	cmp	r3, #5
 8023514:	d80d      	bhi.n	8023532 <dhcp_discover+0x106>
 8023516:	69bb      	ldr	r3, [r7, #24]
 8023518:	799b      	ldrb	r3, [r3, #6]
 802351a:	461a      	mov	r2, r3
 802351c:	2301      	movs	r3, #1
 802351e:	4093      	lsls	r3, r2
 8023520:	b29b      	uxth	r3, r3
 8023522:	461a      	mov	r2, r3
 8023524:	0152      	lsls	r2, r2, #5
 8023526:	1ad2      	subs	r2, r2, r3
 8023528:	0092      	lsls	r2, r2, #2
 802352a:	4413      	add	r3, r2
 802352c:	00db      	lsls	r3, r3, #3
 802352e:	b29b      	uxth	r3, r3
 8023530:	e001      	b.n	8023536 <dhcp_discover+0x10a>
 8023532:	f64e 2360 	movw	r3, #60000	@ 0xea60
 8023536:	817b      	strh	r3, [r7, #10]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8023538:	897b      	ldrh	r3, [r7, #10]
 802353a:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 802353e:	4a0b      	ldr	r2, [pc, #44]	@ (802356c <dhcp_discover+0x140>)
 8023540:	fb82 1203 	smull	r1, r2, r2, r3
 8023544:	1152      	asrs	r2, r2, #5
 8023546:	17db      	asrs	r3, r3, #31
 8023548:	1ad3      	subs	r3, r2, r3
 802354a:	b29a      	uxth	r2, r3
 802354c:	69bb      	ldr	r3, [r7, #24]
 802354e:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8023550:	f997 3017 	ldrsb.w	r3, [r7, #23]
}
 8023554:	4618      	mov	r0, r3
 8023556:	3720      	adds	r7, #32
 8023558:	46bd      	mov	sp, r7
 802355a:	bd80      	pop	{r7, pc}
 802355c:	24000058 	.word	0x24000058
 8023560:	2402b034 	.word	0x2402b034
 8023564:	08031ef8 	.word	0x08031ef8
 8023568:	08031efc 	.word	0x08031efc
 802356c:	10624dd3 	.word	0x10624dd3

08023570 <dhcp_bind>:
 *
 * @param netif network interface to bind to the offered address
 */
static void
dhcp_bind(struct netif *netif)
{
 8023570:	b580      	push	{r7, lr}
 8023572:	b088      	sub	sp, #32
 8023574:	af00      	add	r7, sp, #0
 8023576:	6078      	str	r0, [r7, #4]
  u32_t timeout;
  struct dhcp *dhcp;
  ip4_addr_t sn_mask, gw_addr;
  LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;);
 8023578:	687b      	ldr	r3, [r7, #4]
 802357a:	2b00      	cmp	r3, #0
 802357c:	d107      	bne.n	802358e <dhcp_bind+0x1e>
 802357e:	4b64      	ldr	r3, [pc, #400]	@ (8023710 <dhcp_bind+0x1a0>)
 8023580:	f240 4215 	movw	r2, #1045	@ 0x415
 8023584:	4963      	ldr	r1, [pc, #396]	@ (8023714 <dhcp_bind+0x1a4>)
 8023586:	4864      	ldr	r0, [pc, #400]	@ (8023718 <dhcp_bind+0x1a8>)
 8023588:	f007 fa68 	bl	802aa5c <iprintf>
 802358c:	e0bc      	b.n	8023708 <dhcp_bind+0x198>
  dhcp = netif_dhcp_data(netif);
 802358e:	687b      	ldr	r3, [r7, #4]
 8023590:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023592:	61fb      	str	r3, [r7, #28]
  LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;);
 8023594:	69fb      	ldr	r3, [r7, #28]
 8023596:	2b00      	cmp	r3, #0
 8023598:	d107      	bne.n	80235aa <dhcp_bind+0x3a>
 802359a:	4b5d      	ldr	r3, [pc, #372]	@ (8023710 <dhcp_bind+0x1a0>)
 802359c:	f240 4217 	movw	r2, #1047	@ 0x417
 80235a0:	495e      	ldr	r1, [pc, #376]	@ (802371c <dhcp_bind+0x1ac>)
 80235a2:	485d      	ldr	r0, [pc, #372]	@ (8023718 <dhcp_bind+0x1a8>)
 80235a4:	f007 fa5a 	bl	802aa5c <iprintf>
 80235a8:	e0ae      	b.n	8023708 <dhcp_bind+0x198>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void *)netif, netif->name[0], netif->name[1], (u16_t)netif->num));

  /* reset time used of lease */
  dhcp->lease_used = 0;
 80235aa:	69fb      	ldr	r3, [r7, #28]
 80235ac:	2200      	movs	r2, #0
 80235ae:	825a      	strh	r2, [r3, #18]

  if (dhcp->offered_t0_lease != 0xffffffffUL) {
 80235b0:	69fb      	ldr	r3, [r7, #28]
 80235b2:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80235b4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80235b8:	d019      	beq.n	80235ee <dhcp_bind+0x7e>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t0 renewal timer %"U32_F" secs\n", dhcp->offered_t0_lease));
    timeout = (dhcp->offered_t0_lease + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 80235ba:	69fb      	ldr	r3, [r7, #28]
 80235bc:	6a9b      	ldr	r3, [r3, #40]	@ 0x28
 80235be:	331e      	adds	r3, #30
 80235c0:	4a57      	ldr	r2, [pc, #348]	@ (8023720 <dhcp_bind+0x1b0>)
 80235c2:	fba2 2303 	umull	r2, r3, r2, r3
 80235c6:	095b      	lsrs	r3, r3, #5
 80235c8:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 80235ca:	69bb      	ldr	r3, [r7, #24]
 80235cc:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80235d0:	d302      	bcc.n	80235d8 <dhcp_bind+0x68>
      timeout = 0xffff;
 80235d2:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 80235d6:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t0_timeout = (u16_t)timeout;
 80235d8:	69bb      	ldr	r3, [r7, #24]
 80235da:	b29a      	uxth	r2, r3
 80235dc:	69fb      	ldr	r3, [r7, #28]
 80235de:	829a      	strh	r2, [r3, #20]
    if (dhcp->t0_timeout == 0) {
 80235e0:	69fb      	ldr	r3, [r7, #28]
 80235e2:	8a9b      	ldrh	r3, [r3, #20]
 80235e4:	2b00      	cmp	r3, #0
 80235e6:	d102      	bne.n	80235ee <dhcp_bind+0x7e>
      dhcp->t0_timeout = 1;
 80235e8:	69fb      	ldr	r3, [r7, #28]
 80235ea:	2201      	movs	r2, #1
 80235ec:	829a      	strh	r2, [r3, #20]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t0_lease * 1000));
  }

  /* temporary DHCP lease? */
  if (dhcp->offered_t1_renew != 0xffffffffUL) {
 80235ee:	69fb      	ldr	r3, [r7, #28]
 80235f0:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80235f2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80235f6:	d01d      	beq.n	8023634 <dhcp_bind+0xc4>
    /* set renewal period timer */
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew));
    timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 80235f8:	69fb      	ldr	r3, [r7, #28]
 80235fa:	6adb      	ldr	r3, [r3, #44]	@ 0x2c
 80235fc:	331e      	adds	r3, #30
 80235fe:	4a48      	ldr	r2, [pc, #288]	@ (8023720 <dhcp_bind+0x1b0>)
 8023600:	fba2 2303 	umull	r2, r3, r2, r3
 8023604:	095b      	lsrs	r3, r3, #5
 8023606:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 8023608:	69bb      	ldr	r3, [r7, #24]
 802360a:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 802360e:	d302      	bcc.n	8023616 <dhcp_bind+0xa6>
      timeout = 0xffff;
 8023610:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 8023614:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t1_timeout = (u16_t)timeout;
 8023616:	69bb      	ldr	r3, [r7, #24]
 8023618:	b29a      	uxth	r2, r3
 802361a:	69fb      	ldr	r3, [r7, #28]
 802361c:	815a      	strh	r2, [r3, #10]
    if (dhcp->t1_timeout == 0) {
 802361e:	69fb      	ldr	r3, [r7, #28]
 8023620:	895b      	ldrh	r3, [r3, #10]
 8023622:	2b00      	cmp	r3, #0
 8023624:	d102      	bne.n	802362c <dhcp_bind+0xbc>
      dhcp->t1_timeout = 1;
 8023626:	69fb      	ldr	r3, [r7, #28]
 8023628:	2201      	movs	r2, #1
 802362a:	815a      	strh	r2, [r3, #10]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew * 1000));
    dhcp->t1_renew_time = dhcp->t1_timeout;
 802362c:	69fb      	ldr	r3, [r7, #28]
 802362e:	895a      	ldrh	r2, [r3, #10]
 8023630:	69fb      	ldr	r3, [r7, #28]
 8023632:	81da      	strh	r2, [r3, #14]
  }
  /* set renewal period timer */
  if (dhcp->offered_t2_rebind != 0xffffffffUL) {
 8023634:	69fb      	ldr	r3, [r7, #28]
 8023636:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8023638:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 802363c:	d01d      	beq.n	802367a <dhcp_bind+0x10a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind));
    timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
 802363e:	69fb      	ldr	r3, [r7, #28]
 8023640:	6b1b      	ldr	r3, [r3, #48]	@ 0x30
 8023642:	331e      	adds	r3, #30
 8023644:	4a36      	ldr	r2, [pc, #216]	@ (8023720 <dhcp_bind+0x1b0>)
 8023646:	fba2 2303 	umull	r2, r3, r2, r3
 802364a:	095b      	lsrs	r3, r3, #5
 802364c:	61bb      	str	r3, [r7, #24]
    if (timeout > 0xffff) {
 802364e:	69bb      	ldr	r3, [r7, #24]
 8023650:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8023654:	d302      	bcc.n	802365c <dhcp_bind+0xec>
      timeout = 0xffff;
 8023656:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 802365a:	61bb      	str	r3, [r7, #24]
    }
    dhcp->t2_timeout = (u16_t)timeout;
 802365c:	69bb      	ldr	r3, [r7, #24]
 802365e:	b29a      	uxth	r2, r3
 8023660:	69fb      	ldr	r3, [r7, #28]
 8023662:	819a      	strh	r2, [r3, #12]
    if (dhcp->t2_timeout == 0) {
 8023664:	69fb      	ldr	r3, [r7, #28]
 8023666:	899b      	ldrh	r3, [r3, #12]
 8023668:	2b00      	cmp	r3, #0
 802366a:	d102      	bne.n	8023672 <dhcp_bind+0x102>
      dhcp->t2_timeout = 1;
 802366c:	69fb      	ldr	r3, [r7, #28]
 802366e:	2201      	movs	r2, #1
 8023670:	819a      	strh	r2, [r3, #12]
    }
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind * 1000));
    dhcp->t2_rebind_time = dhcp->t2_timeout;
 8023672:	69fb      	ldr	r3, [r7, #28]
 8023674:	899a      	ldrh	r2, [r3, #12]
 8023676:	69fb      	ldr	r3, [r7, #28]
 8023678:	821a      	strh	r2, [r3, #16]
  }

  /* If we have sub 1 minute lease, t2 and t1 will kick in at the same time. */
  if ((dhcp->t1_timeout >= dhcp->t2_timeout) && (dhcp->t2_timeout > 0)) {
 802367a:	69fb      	ldr	r3, [r7, #28]
 802367c:	895a      	ldrh	r2, [r3, #10]
 802367e:	69fb      	ldr	r3, [r7, #28]
 8023680:	899b      	ldrh	r3, [r3, #12]
 8023682:	429a      	cmp	r2, r3
 8023684:	d306      	bcc.n	8023694 <dhcp_bind+0x124>
 8023686:	69fb      	ldr	r3, [r7, #28]
 8023688:	899b      	ldrh	r3, [r3, #12]
 802368a:	2b00      	cmp	r3, #0
 802368c:	d002      	beq.n	8023694 <dhcp_bind+0x124>
    dhcp->t1_timeout = 0;
 802368e:	69fb      	ldr	r3, [r7, #28]
 8023690:	2200      	movs	r2, #0
 8023692:	815a      	strh	r2, [r3, #10]
  }

  if (dhcp->subnet_mask_given) {
 8023694:	69fb      	ldr	r3, [r7, #28]
 8023696:	79db      	ldrb	r3, [r3, #7]
 8023698:	2b00      	cmp	r3, #0
 802369a:	d003      	beq.n	80236a4 <dhcp_bind+0x134>
    /* copy offered network mask */
    ip4_addr_copy(sn_mask, dhcp->offered_sn_mask);
 802369c:	69fb      	ldr	r3, [r7, #28]
 802369e:	6a1b      	ldr	r3, [r3, #32]
 80236a0:	613b      	str	r3, [r7, #16]
 80236a2:	e014      	b.n	80236ce <dhcp_bind+0x15e>
  } else {
    /* subnet mask not given, choose a safe subnet mask given the network class */
    u8_t first_octet = ip4_addr1(&dhcp->offered_ip_addr);
 80236a4:	69fb      	ldr	r3, [r7, #28]
 80236a6:	331c      	adds	r3, #28
 80236a8:	781b      	ldrb	r3, [r3, #0]
 80236aa:	75fb      	strb	r3, [r7, #23]
    if (first_octet <= 127) {
 80236ac:	f997 3017 	ldrsb.w	r3, [r7, #23]
 80236b0:	2b00      	cmp	r3, #0
 80236b2:	db02      	blt.n	80236ba <dhcp_bind+0x14a>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xff000000UL));
 80236b4:	23ff      	movs	r3, #255	@ 0xff
 80236b6:	613b      	str	r3, [r7, #16]
 80236b8:	e009      	b.n	80236ce <dhcp_bind+0x15e>
    } else if (first_octet >= 192) {
 80236ba:	7dfb      	ldrb	r3, [r7, #23]
 80236bc:	2bbf      	cmp	r3, #191	@ 0xbf
 80236be:	d903      	bls.n	80236c8 <dhcp_bind+0x158>
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffffff00UL));
 80236c0:	f06f 437f 	mvn.w	r3, #4278190080	@ 0xff000000
 80236c4:	613b      	str	r3, [r7, #16]
 80236c6:	e002      	b.n	80236ce <dhcp_bind+0x15e>
    } else {
      ip4_addr_set_u32(&sn_mask, PP_HTONL(0xffff0000UL));
 80236c8:	f64f 73ff 	movw	r3, #65535	@ 0xffff
 80236cc:	613b      	str	r3, [r7, #16]
    }
  }

  ip4_addr_copy(gw_addr, dhcp->offered_gw_addr);
 80236ce:	69fb      	ldr	r3, [r7, #28]
 80236d0:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80236d2:	60fb      	str	r3, [r7, #12]
  /* gateway address not given? */
  if (ip4_addr_isany_val(gw_addr)) {
 80236d4:	68fb      	ldr	r3, [r7, #12]
 80236d6:	2b00      	cmp	r3, #0
 80236d8:	d108      	bne.n	80236ec <dhcp_bind+0x17c>
    /* copy network address */
    ip4_addr_get_network(&gw_addr, &dhcp->offered_ip_addr, &sn_mask);
 80236da:	69fb      	ldr	r3, [r7, #28]
 80236dc:	69da      	ldr	r2, [r3, #28]
 80236de:	693b      	ldr	r3, [r7, #16]
 80236e0:	4013      	ands	r3, r2
 80236e2:	60fb      	str	r3, [r7, #12]
    /* use first host address on network as gateway */
    ip4_addr_set_u32(&gw_addr, ip4_addr_get_u32(&gw_addr) | PP_HTONL(0x00000001UL));
 80236e4:	68fb      	ldr	r3, [r7, #12]
 80236e6:	f043 7380 	orr.w	r3, r3, #16777216	@ 0x1000000
 80236ea:	60fb      	str	r3, [r7, #12]

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F" SN: 0x%08"X32_F" GW: 0x%08"X32_F"\n",
              ip4_addr_get_u32(&dhcp->offered_ip_addr), ip4_addr_get_u32(&sn_mask), ip4_addr_get_u32(&gw_addr)));
  /* netif is now bound to DHCP leased address - set this before assigning the address
     to ensure the callback can use dhcp_supplied_address() */
  dhcp_set_state(dhcp, DHCP_STATE_BOUND);
 80236ec:	210a      	movs	r1, #10
 80236ee:	69f8      	ldr	r0, [r7, #28]
 80236f0:	f000 faa9 	bl	8023c46 <dhcp_set_state>

  netif_set_addr(netif, &dhcp->offered_ip_addr, &sn_mask, &gw_addr);
 80236f4:	69fb      	ldr	r3, [r7, #28]
 80236f6:	f103 011c 	add.w	r1, r3, #28
 80236fa:	f107 030c 	add.w	r3, r7, #12
 80236fe:	f107 0210 	add.w	r2, r7, #16
 8023702:	6878      	ldr	r0, [r7, #4]
 8023704:	f7f7 f9e8 	bl	801aad8 <netif_set_addr>
  /* interface is used by routing now that an address is set */
}
 8023708:	3720      	adds	r7, #32
 802370a:	46bd      	mov	sp, r7
 802370c:	bd80      	pop	{r7, pc}
 802370e:	bf00      	nop
 8023710:	080310cc 	.word	0x080310cc
 8023714:	0803122c 	.word	0x0803122c
 8023718:	0803112c 	.word	0x0803112c
 802371c:	08031248 	.word	0x08031248
 8023720:	88888889 	.word	0x88888889

08023724 <dhcp_renew>:
 *
 * @param netif network interface which must renew its lease
 */
err_t
dhcp_renew(struct netif *netif)
{
 8023724:	b580      	push	{r7, lr}
 8023726:	b08a      	sub	sp, #40	@ 0x28
 8023728:	af02      	add	r7, sp, #8
 802372a:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 802372c:	687b      	ldr	r3, [r7, #4]
 802372e:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023730:	61bb      	str	r3, [r7, #24]
  u16_t msecs;
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_ASSERT_CORE_LOCKED();
 8023732:	f7ed fd67 	bl	8011204 <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_RENEWING);
 8023736:	2105      	movs	r1, #5
 8023738:	69b8      	ldr	r0, [r7, #24]
 802373a:	f000 fa84 	bl	8023c46 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 802373e:	f107 030c 	add.w	r3, r7, #12
 8023742:	2203      	movs	r2, #3
 8023744:	69b9      	ldr	r1, [r7, #24]
 8023746:	6878      	ldr	r0, [r7, #4]
 8023748:	f000 ff16 	bl	8024578 <dhcp_create_msg>
 802374c:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 802374e:	697b      	ldr	r3, [r7, #20]
 8023750:	2b00      	cmp	r3, #0
 8023752:	d04e      	beq.n	80237f2 <dhcp_renew+0xce>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8023754:	697b      	ldr	r3, [r7, #20]
 8023756:	685b      	ldr	r3, [r3, #4]
 8023758:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 802375a:	89b8      	ldrh	r0, [r7, #12]
 802375c:	693b      	ldr	r3, [r7, #16]
 802375e:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023762:	2302      	movs	r3, #2
 8023764:	2239      	movs	r2, #57	@ 0x39
 8023766:	f000 fa89 	bl	8023c7c <dhcp_option>
 802376a:	4603      	mov	r3, r0
 802376c:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 802376e:	89b8      	ldrh	r0, [r7, #12]
 8023770:	693b      	ldr	r3, [r7, #16]
 8023772:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023776:	687b      	ldr	r3, [r7, #4]
 8023778:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 802377a:	461a      	mov	r2, r3
 802377c:	f000 fad8 	bl	8023d30 <dhcp_option_short>
 8023780:	4603      	mov	r3, r0
 8023782:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8023784:	89b8      	ldrh	r0, [r7, #12]
 8023786:	693b      	ldr	r3, [r7, #16]
 8023788:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 802378c:	2303      	movs	r3, #3
 802378e:	2237      	movs	r2, #55	@ 0x37
 8023790:	f000 fa74 	bl	8023c7c <dhcp_option>
 8023794:	4603      	mov	r3, r0
 8023796:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8023798:	2300      	movs	r3, #0
 802379a:	77bb      	strb	r3, [r7, #30]
 802379c:	e00e      	b.n	80237bc <dhcp_renew+0x98>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 802379e:	89b8      	ldrh	r0, [r7, #12]
 80237a0:	693b      	ldr	r3, [r7, #16]
 80237a2:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80237a6:	7fbb      	ldrb	r3, [r7, #30]
 80237a8:	4a29      	ldr	r2, [pc, #164]	@ (8023850 <dhcp_renew+0x12c>)
 80237aa:	5cd3      	ldrb	r3, [r2, r3]
 80237ac:	461a      	mov	r2, r3
 80237ae:	f000 fa99 	bl	8023ce4 <dhcp_option_byte>
 80237b2:	4603      	mov	r3, r0
 80237b4:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80237b6:	7fbb      	ldrb	r3, [r7, #30]
 80237b8:	3301      	adds	r3, #1
 80237ba:	77bb      	strb	r3, [r7, #30]
 80237bc:	7fbb      	ldrb	r3, [r7, #30]
 80237be:	2b02      	cmp	r3, #2
 80237c0:	d9ed      	bls.n	802379e <dhcp_renew+0x7a>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_RENEWING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80237c2:	89b8      	ldrh	r0, [r7, #12]
 80237c4:	693b      	ldr	r3, [r7, #16]
 80237c6:	33f0      	adds	r3, #240	@ 0xf0
 80237c8:	697a      	ldr	r2, [r7, #20]
 80237ca:	4619      	mov	r1, r3
 80237cc:	f000 ffaa 	bl	8024724 <dhcp_option_trailer>

    result = udp_sendto_if(dhcp_pcb, p_out, &dhcp->server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 80237d0:	4b20      	ldr	r3, [pc, #128]	@ (8023854 <dhcp_renew+0x130>)
 80237d2:	6818      	ldr	r0, [r3, #0]
 80237d4:	69bb      	ldr	r3, [r7, #24]
 80237d6:	f103 0218 	add.w	r2, r3, #24
 80237da:	687b      	ldr	r3, [r7, #4]
 80237dc:	9300      	str	r3, [sp, #0]
 80237de:	2343      	movs	r3, #67	@ 0x43
 80237e0:	6979      	ldr	r1, [r7, #20]
 80237e2:	f7fe fe09 	bl	80223f8 <udp_sendto_if>
 80237e6:	4603      	mov	r3, r0
 80237e8:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 80237ea:	6978      	ldr	r0, [r7, #20]
 80237ec:	f7f7 febe 	bl	801b56c <pbuf_free>
 80237f0:	e001      	b.n	80237f6 <dhcp_renew+0xd2>

    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n"));
    result = ERR_MEM;
 80237f2:	23ff      	movs	r3, #255	@ 0xff
 80237f4:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 80237f6:	69bb      	ldr	r3, [r7, #24]
 80237f8:	799b      	ldrb	r3, [r3, #6]
 80237fa:	2bff      	cmp	r3, #255	@ 0xff
 80237fc:	d005      	beq.n	802380a <dhcp_renew+0xe6>
    dhcp->tries++;
 80237fe:	69bb      	ldr	r3, [r7, #24]
 8023800:	799b      	ldrb	r3, [r3, #6]
 8023802:	3301      	adds	r3, #1
 8023804:	b2da      	uxtb	r2, r3
 8023806:	69bb      	ldr	r3, [r7, #24]
 8023808:	719a      	strb	r2, [r3, #6]
  }
  /* back-off on retries, but to a maximum of 20 seconds */
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000);
 802380a:	69bb      	ldr	r3, [r7, #24]
 802380c:	799b      	ldrb	r3, [r3, #6]
 802380e:	2b09      	cmp	r3, #9
 8023810:	d809      	bhi.n	8023826 <dhcp_renew+0x102>
 8023812:	69bb      	ldr	r3, [r7, #24]
 8023814:	799b      	ldrb	r3, [r3, #6]
 8023816:	461a      	mov	r2, r3
 8023818:	0152      	lsls	r2, r2, #5
 802381a:	1ad2      	subs	r2, r2, r3
 802381c:	0092      	lsls	r2, r2, #2
 802381e:	4413      	add	r3, r2
 8023820:	011b      	lsls	r3, r3, #4
 8023822:	b29b      	uxth	r3, r3
 8023824:	e001      	b.n	802382a <dhcp_renew+0x106>
 8023826:	f644 6320 	movw	r3, #20000	@ 0x4e20
 802382a:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 802382c:	89fb      	ldrh	r3, [r7, #14]
 802382e:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8023832:	4a09      	ldr	r2, [pc, #36]	@ (8023858 <dhcp_renew+0x134>)
 8023834:	fb82 1203 	smull	r1, r2, r2, r3
 8023838:	1152      	asrs	r2, r2, #5
 802383a:	17db      	asrs	r3, r3, #31
 802383c:	1ad3      	subs	r3, r2, r3
 802383e:	b29a      	uxth	r2, r3
 8023840:	69bb      	ldr	r3, [r7, #24]
 8023842:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8023844:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8023848:	4618      	mov	r0, r3
 802384a:	3720      	adds	r7, #32
 802384c:	46bd      	mov	sp, r7
 802384e:	bd80      	pop	{r7, pc}
 8023850:	24000058 	.word	0x24000058
 8023854:	2402b034 	.word	0x2402b034
 8023858:	10624dd3 	.word	0x10624dd3

0802385c <dhcp_rebind>:
 *
 * @param netif network interface which must rebind with a DHCP server
 */
static err_t
dhcp_rebind(struct netif *netif)
{
 802385c:	b580      	push	{r7, lr}
 802385e:	b08a      	sub	sp, #40	@ 0x28
 8023860:	af02      	add	r7, sp, #8
 8023862:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023864:	687b      	ldr	r3, [r7, #4]
 8023866:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023868:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBINDING);
 802386a:	2104      	movs	r1, #4
 802386c:	69b8      	ldr	r0, [r7, #24]
 802386e:	f000 f9ea 	bl	8023c46 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 8023872:	f107 030c 	add.w	r3, r7, #12
 8023876:	2203      	movs	r2, #3
 8023878:	69b9      	ldr	r1, [r7, #24]
 802387a:	6878      	ldr	r0, [r7, #4]
 802387c:	f000 fe7c 	bl	8024578 <dhcp_create_msg>
 8023880:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 8023882:	697b      	ldr	r3, [r7, #20]
 8023884:	2b00      	cmp	r3, #0
 8023886:	d04c      	beq.n	8023922 <dhcp_rebind+0xc6>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8023888:	697b      	ldr	r3, [r7, #20]
 802388a:	685b      	ldr	r3, [r3, #4]
 802388c:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 802388e:	89b8      	ldrh	r0, [r7, #12]
 8023890:	693b      	ldr	r3, [r7, #16]
 8023892:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023896:	2302      	movs	r3, #2
 8023898:	2239      	movs	r2, #57	@ 0x39
 802389a:	f000 f9ef 	bl	8023c7c <dhcp_option>
 802389e:	4603      	mov	r3, r0
 80238a0:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN(netif));
 80238a2:	89b8      	ldrh	r0, [r7, #12]
 80238a4:	693b      	ldr	r3, [r7, #16]
 80238a6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80238aa:	687b      	ldr	r3, [r7, #4]
 80238ac:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 80238ae:	461a      	mov	r2, r3
 80238b0:	f000 fa3e 	bl	8023d30 <dhcp_option_short>
 80238b4:	4603      	mov	r3, r0
 80238b6:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 80238b8:	89b8      	ldrh	r0, [r7, #12]
 80238ba:	693b      	ldr	r3, [r7, #16]
 80238bc:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80238c0:	2303      	movs	r3, #3
 80238c2:	2237      	movs	r2, #55	@ 0x37
 80238c4:	f000 f9da 	bl	8023c7c <dhcp_option>
 80238c8:	4603      	mov	r3, r0
 80238ca:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80238cc:	2300      	movs	r3, #0
 80238ce:	77bb      	strb	r3, [r7, #30]
 80238d0:	e00e      	b.n	80238f0 <dhcp_rebind+0x94>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 80238d2:	89b8      	ldrh	r0, [r7, #12]
 80238d4:	693b      	ldr	r3, [r7, #16]
 80238d6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80238da:	7fbb      	ldrb	r3, [r7, #30]
 80238dc:	4a28      	ldr	r2, [pc, #160]	@ (8023980 <dhcp_rebind+0x124>)
 80238de:	5cd3      	ldrb	r3, [r2, r3]
 80238e0:	461a      	mov	r2, r3
 80238e2:	f000 f9ff 	bl	8023ce4 <dhcp_option_byte>
 80238e6:	4603      	mov	r3, r0
 80238e8:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 80238ea:	7fbb      	ldrb	r3, [r7, #30]
 80238ec:	3301      	adds	r3, #1
 80238ee:	77bb      	strb	r3, [r7, #30]
 80238f0:	7fbb      	ldrb	r3, [r7, #30]
 80238f2:	2b02      	cmp	r3, #2
 80238f4:	d9ed      	bls.n	80238d2 <dhcp_rebind+0x76>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBINDING, msg_out, DHCP_DISCOVER, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 80238f6:	89b8      	ldrh	r0, [r7, #12]
 80238f8:	693b      	ldr	r3, [r7, #16]
 80238fa:	33f0      	adds	r3, #240	@ 0xf0
 80238fc:	697a      	ldr	r2, [r7, #20]
 80238fe:	4619      	mov	r1, r3
 8023900:	f000 ff10 	bl	8024724 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8023904:	4b1f      	ldr	r3, [pc, #124]	@ (8023984 <dhcp_rebind+0x128>)
 8023906:	6818      	ldr	r0, [r3, #0]
 8023908:	687b      	ldr	r3, [r7, #4]
 802390a:	9300      	str	r3, [sp, #0]
 802390c:	2343      	movs	r3, #67	@ 0x43
 802390e:	4a1e      	ldr	r2, [pc, #120]	@ (8023988 <dhcp_rebind+0x12c>)
 8023910:	6979      	ldr	r1, [r7, #20]
 8023912:	f7fe fd71 	bl	80223f8 <udp_sendto_if>
 8023916:	4603      	mov	r3, r0
 8023918:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 802391a:	6978      	ldr	r0, [r7, #20]
 802391c:	f7f7 fe26 	bl	801b56c <pbuf_free>
 8023920:	e001      	b.n	8023926 <dhcp_rebind+0xca>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8023922:	23ff      	movs	r3, #255	@ 0xff
 8023924:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 8023926:	69bb      	ldr	r3, [r7, #24]
 8023928:	799b      	ldrb	r3, [r3, #6]
 802392a:	2bff      	cmp	r3, #255	@ 0xff
 802392c:	d005      	beq.n	802393a <dhcp_rebind+0xde>
    dhcp->tries++;
 802392e:	69bb      	ldr	r3, [r7, #24]
 8023930:	799b      	ldrb	r3, [r3, #6]
 8023932:	3301      	adds	r3, #1
 8023934:	b2da      	uxtb	r2, r3
 8023936:	69bb      	ldr	r3, [r7, #24]
 8023938:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 802393a:	69bb      	ldr	r3, [r7, #24]
 802393c:	799b      	ldrb	r3, [r3, #6]
 802393e:	2b09      	cmp	r3, #9
 8023940:	d809      	bhi.n	8023956 <dhcp_rebind+0xfa>
 8023942:	69bb      	ldr	r3, [r7, #24]
 8023944:	799b      	ldrb	r3, [r3, #6]
 8023946:	461a      	mov	r2, r3
 8023948:	0152      	lsls	r2, r2, #5
 802394a:	1ad2      	subs	r2, r2, r3
 802394c:	0092      	lsls	r2, r2, #2
 802394e:	4413      	add	r3, r2
 8023950:	00db      	lsls	r3, r3, #3
 8023952:	b29b      	uxth	r3, r3
 8023954:	e001      	b.n	802395a <dhcp_rebind+0xfe>
 8023956:	f242 7310 	movw	r3, #10000	@ 0x2710
 802395a:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 802395c:	89fb      	ldrh	r3, [r7, #14]
 802395e:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8023962:	4a0a      	ldr	r2, [pc, #40]	@ (802398c <dhcp_rebind+0x130>)
 8023964:	fb82 1203 	smull	r1, r2, r2, r3
 8023968:	1152      	asrs	r2, r2, #5
 802396a:	17db      	asrs	r3, r3, #31
 802396c:	1ad3      	subs	r3, r2, r3
 802396e:	b29a      	uxth	r2, r3
 8023970:	69bb      	ldr	r3, [r7, #24]
 8023972:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8023974:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8023978:	4618      	mov	r0, r3
 802397a:	3720      	adds	r7, #32
 802397c:	46bd      	mov	sp, r7
 802397e:	bd80      	pop	{r7, pc}
 8023980:	24000058 	.word	0x24000058
 8023984:	2402b034 	.word	0x2402b034
 8023988:	08031efc 	.word	0x08031efc
 802398c:	10624dd3 	.word	0x10624dd3

08023990 <dhcp_reboot>:
 *
 * @param netif network interface which must reboot
 */
static err_t
dhcp_reboot(struct netif *netif)
{
 8023990:	b5b0      	push	{r4, r5, r7, lr}
 8023992:	b08a      	sub	sp, #40	@ 0x28
 8023994:	af02      	add	r7, sp, #8
 8023996:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023998:	687b      	ldr	r3, [r7, #4]
 802399a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802399c:	61bb      	str	r3, [r7, #24]
  u8_t i;
  struct pbuf *p_out;
  u16_t options_out_len;

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n"));
  dhcp_set_state(dhcp, DHCP_STATE_REBOOTING);
 802399e:	2103      	movs	r1, #3
 80239a0:	69b8      	ldr	r0, [r7, #24]
 80239a2:	f000 f950 	bl	8023c46 <dhcp_set_state>

  /* create and initialize the DHCP message header */
  p_out = dhcp_create_msg(netif, dhcp, DHCP_REQUEST, &options_out_len);
 80239a6:	f107 030c 	add.w	r3, r7, #12
 80239aa:	2203      	movs	r2, #3
 80239ac:	69b9      	ldr	r1, [r7, #24]
 80239ae:	6878      	ldr	r0, [r7, #4]
 80239b0:	f000 fde2 	bl	8024578 <dhcp_create_msg>
 80239b4:	6178      	str	r0, [r7, #20]
  if (p_out != NULL) {
 80239b6:	697b      	ldr	r3, [r7, #20]
 80239b8:	2b00      	cmp	r3, #0
 80239ba:	d066      	beq.n	8023a8a <dhcp_reboot+0xfa>
    struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 80239bc:	697b      	ldr	r3, [r7, #20]
 80239be:	685b      	ldr	r3, [r3, #4]
 80239c0:	613b      	str	r3, [r7, #16]
    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN);
 80239c2:	89b8      	ldrh	r0, [r7, #12]
 80239c4:	693b      	ldr	r3, [r7, #16]
 80239c6:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80239ca:	2302      	movs	r3, #2
 80239cc:	2239      	movs	r2, #57	@ 0x39
 80239ce:	f000 f955 	bl	8023c7c <dhcp_option>
 80239d2:	4603      	mov	r3, r0
 80239d4:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_short(options_out_len, msg_out->options, DHCP_MAX_MSG_LEN_MIN_REQUIRED);
 80239d6:	89b8      	ldrh	r0, [r7, #12]
 80239d8:	693b      	ldr	r3, [r7, #16]
 80239da:	33f0      	adds	r3, #240	@ 0xf0
 80239dc:	f44f 7210 	mov.w	r2, #576	@ 0x240
 80239e0:	4619      	mov	r1, r3
 80239e2:	f000 f9a5 	bl	8023d30 <dhcp_option_short>
 80239e6:	4603      	mov	r3, r0
 80239e8:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_REQUESTED_IP, 4);
 80239ea:	89b8      	ldrh	r0, [r7, #12]
 80239ec:	693b      	ldr	r3, [r7, #16]
 80239ee:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80239f2:	2304      	movs	r3, #4
 80239f4:	2232      	movs	r2, #50	@ 0x32
 80239f6:	f000 f941 	bl	8023c7c <dhcp_option>
 80239fa:	4603      	mov	r3, r0
 80239fc:	81bb      	strh	r3, [r7, #12]
    options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(&dhcp->offered_ip_addr)));
 80239fe:	89bc      	ldrh	r4, [r7, #12]
 8023a00:	693b      	ldr	r3, [r7, #16]
 8023a02:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8023a06:	69bb      	ldr	r3, [r7, #24]
 8023a08:	69db      	ldr	r3, [r3, #28]
 8023a0a:	4618      	mov	r0, r3
 8023a0c:	f7f6 f8e1 	bl	8019bd2 <lwip_htonl>
 8023a10:	4603      	mov	r3, r0
 8023a12:	461a      	mov	r2, r3
 8023a14:	4629      	mov	r1, r5
 8023a16:	4620      	mov	r0, r4
 8023a18:	f000 f9bc 	bl	8023d94 <dhcp_option_long>
 8023a1c:	4603      	mov	r3, r0
 8023a1e:	81bb      	strh	r3, [r7, #12]

    options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_PARAMETER_REQUEST_LIST, LWIP_ARRAYSIZE(dhcp_discover_request_options));
 8023a20:	89b8      	ldrh	r0, [r7, #12]
 8023a22:	693b      	ldr	r3, [r7, #16]
 8023a24:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023a28:	2303      	movs	r3, #3
 8023a2a:	2237      	movs	r2, #55	@ 0x37
 8023a2c:	f000 f926 	bl	8023c7c <dhcp_option>
 8023a30:	4603      	mov	r3, r0
 8023a32:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8023a34:	2300      	movs	r3, #0
 8023a36:	77bb      	strb	r3, [r7, #30]
 8023a38:	e00e      	b.n	8023a58 <dhcp_reboot+0xc8>
      options_out_len = dhcp_option_byte(options_out_len, msg_out->options, dhcp_discover_request_options[i]);
 8023a3a:	89b8      	ldrh	r0, [r7, #12]
 8023a3c:	693b      	ldr	r3, [r7, #16]
 8023a3e:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023a42:	7fbb      	ldrb	r3, [r7, #30]
 8023a44:	4a28      	ldr	r2, [pc, #160]	@ (8023ae8 <dhcp_reboot+0x158>)
 8023a46:	5cd3      	ldrb	r3, [r2, r3]
 8023a48:	461a      	mov	r2, r3
 8023a4a:	f000 f94b 	bl	8023ce4 <dhcp_option_byte>
 8023a4e:	4603      	mov	r3, r0
 8023a50:	81bb      	strh	r3, [r7, #12]
    for (i = 0; i < LWIP_ARRAYSIZE(dhcp_discover_request_options); i++) {
 8023a52:	7fbb      	ldrb	r3, [r7, #30]
 8023a54:	3301      	adds	r3, #1
 8023a56:	77bb      	strb	r3, [r7, #30]
 8023a58:	7fbb      	ldrb	r3, [r7, #30]
 8023a5a:	2b02      	cmp	r3, #2
 8023a5c:	d9ed      	bls.n	8023a3a <dhcp_reboot+0xaa>
#if LWIP_NETIF_HOSTNAME
    options_out_len = dhcp_option_hostname(options_out_len, msg_out->options, netif);
#endif /* LWIP_NETIF_HOSTNAME */

    LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, DHCP_STATE_REBOOTING, msg_out, DHCP_REQUEST, &options_out_len);
    dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8023a5e:	89b8      	ldrh	r0, [r7, #12]
 8023a60:	693b      	ldr	r3, [r7, #16]
 8023a62:	33f0      	adds	r3, #240	@ 0xf0
 8023a64:	697a      	ldr	r2, [r7, #20]
 8023a66:	4619      	mov	r1, r3
 8023a68:	f000 fe5c 	bl	8024724 <dhcp_option_trailer>

    /* broadcast to server */
    result = udp_sendto_if(dhcp_pcb, p_out, IP_ADDR_BROADCAST, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8023a6c:	4b1f      	ldr	r3, [pc, #124]	@ (8023aec <dhcp_reboot+0x15c>)
 8023a6e:	6818      	ldr	r0, [r3, #0]
 8023a70:	687b      	ldr	r3, [r7, #4]
 8023a72:	9300      	str	r3, [sp, #0]
 8023a74:	2343      	movs	r3, #67	@ 0x43
 8023a76:	4a1e      	ldr	r2, [pc, #120]	@ (8023af0 <dhcp_reboot+0x160>)
 8023a78:	6979      	ldr	r1, [r7, #20]
 8023a7a:	f7fe fcbd 	bl	80223f8 <udp_sendto_if>
 8023a7e:	4603      	mov	r3, r0
 8023a80:	77fb      	strb	r3, [r7, #31]
    pbuf_free(p_out);
 8023a82:	6978      	ldr	r0, [r7, #20]
 8023a84:	f7f7 fd72 	bl	801b56c <pbuf_free>
 8023a88:	e001      	b.n	8023a8e <dhcp_reboot+0xfe>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n"));
  } else {
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n"));
    result = ERR_MEM;
 8023a8a:	23ff      	movs	r3, #255	@ 0xff
 8023a8c:	77fb      	strb	r3, [r7, #31]
  }
  if (dhcp->tries < 255) {
 8023a8e:	69bb      	ldr	r3, [r7, #24]
 8023a90:	799b      	ldrb	r3, [r3, #6]
 8023a92:	2bff      	cmp	r3, #255	@ 0xff
 8023a94:	d005      	beq.n	8023aa2 <dhcp_reboot+0x112>
    dhcp->tries++;
 8023a96:	69bb      	ldr	r3, [r7, #24]
 8023a98:	799b      	ldrb	r3, [r3, #6]
 8023a9a:	3301      	adds	r3, #1
 8023a9c:	b2da      	uxtb	r2, r3
 8023a9e:	69bb      	ldr	r3, [r7, #24]
 8023aa0:	719a      	strb	r2, [r3, #6]
  }
  msecs = (u16_t)(dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000);
 8023aa2:	69bb      	ldr	r3, [r7, #24]
 8023aa4:	799b      	ldrb	r3, [r3, #6]
 8023aa6:	2b09      	cmp	r3, #9
 8023aa8:	d809      	bhi.n	8023abe <dhcp_reboot+0x12e>
 8023aaa:	69bb      	ldr	r3, [r7, #24]
 8023aac:	799b      	ldrb	r3, [r3, #6]
 8023aae:	461a      	mov	r2, r3
 8023ab0:	0152      	lsls	r2, r2, #5
 8023ab2:	1ad2      	subs	r2, r2, r3
 8023ab4:	0092      	lsls	r2, r2, #2
 8023ab6:	4413      	add	r3, r2
 8023ab8:	00db      	lsls	r3, r3, #3
 8023aba:	b29b      	uxth	r3, r3
 8023abc:	e001      	b.n	8023ac2 <dhcp_reboot+0x132>
 8023abe:	f242 7310 	movw	r3, #10000	@ 0x2710
 8023ac2:	81fb      	strh	r3, [r7, #14]
  dhcp->request_timeout = (u16_t)((msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS);
 8023ac4:	89fb      	ldrh	r3, [r7, #14]
 8023ac6:	f203 13f3 	addw	r3, r3, #499	@ 0x1f3
 8023aca:	4a0a      	ldr	r2, [pc, #40]	@ (8023af4 <dhcp_reboot+0x164>)
 8023acc:	fb82 1203 	smull	r1, r2, r2, r3
 8023ad0:	1152      	asrs	r2, r2, #5
 8023ad2:	17db      	asrs	r3, r3, #31
 8023ad4:	1ad3      	subs	r3, r2, r3
 8023ad6:	b29a      	uxth	r2, r3
 8023ad8:	69bb      	ldr	r3, [r7, #24]
 8023ada:	811a      	strh	r2, [r3, #8]
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs));
  return result;
 8023adc:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 8023ae0:	4618      	mov	r0, r3
 8023ae2:	3720      	adds	r7, #32
 8023ae4:	46bd      	mov	sp, r7
 8023ae6:	bdb0      	pop	{r4, r5, r7, pc}
 8023ae8:	24000058 	.word	0x24000058
 8023aec:	2402b034 	.word	0x2402b034
 8023af0:	08031efc 	.word	0x08031efc
 8023af4:	10624dd3 	.word	0x10624dd3

08023af8 <dhcp_release_and_stop>:
 *
 * @param netif network interface
 */
void
dhcp_release_and_stop(struct netif *netif)
{
 8023af8:	b5b0      	push	{r4, r5, r7, lr}
 8023afa:	b08a      	sub	sp, #40	@ 0x28
 8023afc:	af02      	add	r7, sp, #8
 8023afe:	6078      	str	r0, [r7, #4]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 8023b00:	687b      	ldr	r3, [r7, #4]
 8023b02:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8023b04:	61fb      	str	r3, [r7, #28]
  ip_addr_t server_ip_addr;

  LWIP_ASSERT_CORE_LOCKED();
 8023b06:	f7ed fb7d 	bl	8011204 <sys_check_core_locking>
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release_and_stop()\n"));
  if (dhcp == NULL) {
 8023b0a:	69fb      	ldr	r3, [r7, #28]
 8023b0c:	2b00      	cmp	r3, #0
 8023b0e:	f000 8084 	beq.w	8023c1a <dhcp_release_and_stop+0x122>
    return;
  }

  /* already off? -> nothing to do */
  if (dhcp->state == DHCP_STATE_OFF) {
 8023b12:	69fb      	ldr	r3, [r7, #28]
 8023b14:	795b      	ldrb	r3, [r3, #5]
 8023b16:	2b00      	cmp	r3, #0
 8023b18:	f000 8081 	beq.w	8023c1e <dhcp_release_and_stop+0x126>
    return;
  }

  ip_addr_copy(server_ip_addr, dhcp->server_ip_addr);
 8023b1c:	69fb      	ldr	r3, [r7, #28]
 8023b1e:	699b      	ldr	r3, [r3, #24]
 8023b20:	613b      	str	r3, [r7, #16]

  /* clean old DHCP offer */
  ip_addr_set_zero_ip4(&dhcp->server_ip_addr);
 8023b22:	69fb      	ldr	r3, [r7, #28]
 8023b24:	2200      	movs	r2, #0
 8023b26:	619a      	str	r2, [r3, #24]
  ip4_addr_set_zero(&dhcp->offered_ip_addr);
 8023b28:	69fb      	ldr	r3, [r7, #28]
 8023b2a:	2200      	movs	r2, #0
 8023b2c:	61da      	str	r2, [r3, #28]
  ip4_addr_set_zero(&dhcp->offered_sn_mask);
 8023b2e:	69fb      	ldr	r3, [r7, #28]
 8023b30:	2200      	movs	r2, #0
 8023b32:	621a      	str	r2, [r3, #32]
  ip4_addr_set_zero(&dhcp->offered_gw_addr);
 8023b34:	69fb      	ldr	r3, [r7, #28]
 8023b36:	2200      	movs	r2, #0
 8023b38:	625a      	str	r2, [r3, #36]	@ 0x24
#if LWIP_DHCP_BOOTP_FILE
  ip4_addr_set_zero(&dhcp->offered_si_addr);
#endif /* LWIP_DHCP_BOOTP_FILE */
  dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0;
 8023b3a:	69fb      	ldr	r3, [r7, #28]
 8023b3c:	2200      	movs	r2, #0
 8023b3e:	631a      	str	r2, [r3, #48]	@ 0x30
 8023b40:	69fb      	ldr	r3, [r7, #28]
 8023b42:	6b1a      	ldr	r2, [r3, #48]	@ 0x30
 8023b44:	69fb      	ldr	r3, [r7, #28]
 8023b46:	62da      	str	r2, [r3, #44]	@ 0x2c
 8023b48:	69fb      	ldr	r3, [r7, #28]
 8023b4a:	6ada      	ldr	r2, [r3, #44]	@ 0x2c
 8023b4c:	69fb      	ldr	r3, [r7, #28]
 8023b4e:	629a      	str	r2, [r3, #40]	@ 0x28
  dhcp->t1_renew_time = dhcp->t2_rebind_time = dhcp->lease_used = dhcp->t0_timeout = 0;
 8023b50:	69fb      	ldr	r3, [r7, #28]
 8023b52:	2200      	movs	r2, #0
 8023b54:	829a      	strh	r2, [r3, #20]
 8023b56:	69fb      	ldr	r3, [r7, #28]
 8023b58:	8a9a      	ldrh	r2, [r3, #20]
 8023b5a:	69fb      	ldr	r3, [r7, #28]
 8023b5c:	825a      	strh	r2, [r3, #18]
 8023b5e:	69fb      	ldr	r3, [r7, #28]
 8023b60:	8a5a      	ldrh	r2, [r3, #18]
 8023b62:	69fb      	ldr	r3, [r7, #28]
 8023b64:	821a      	strh	r2, [r3, #16]
 8023b66:	69fb      	ldr	r3, [r7, #28]
 8023b68:	8a1a      	ldrh	r2, [r3, #16]
 8023b6a:	69fb      	ldr	r3, [r7, #28]
 8023b6c:	81da      	strh	r2, [r3, #14]

  /* send release message when current IP was assigned via DHCP */
  if (dhcp_supplied_address(netif)) {
 8023b6e:	6878      	ldr	r0, [r7, #4]
 8023b70:	f000 fe06 	bl	8024780 <dhcp_supplied_address>
 8023b74:	4603      	mov	r3, r0
 8023b76:	2b00      	cmp	r3, #0
 8023b78:	d03b      	beq.n	8023bf2 <dhcp_release_and_stop+0xfa>
    /* create and initialize the DHCP message header */
    struct pbuf *p_out;
    u16_t options_out_len;
    p_out = dhcp_create_msg(netif, dhcp, DHCP_RELEASE, &options_out_len);
 8023b7a:	f107 030e 	add.w	r3, r7, #14
 8023b7e:	2207      	movs	r2, #7
 8023b80:	69f9      	ldr	r1, [r7, #28]
 8023b82:	6878      	ldr	r0, [r7, #4]
 8023b84:	f000 fcf8 	bl	8024578 <dhcp_create_msg>
 8023b88:	61b8      	str	r0, [r7, #24]
    if (p_out != NULL) {
 8023b8a:	69bb      	ldr	r3, [r7, #24]
 8023b8c:	2b00      	cmp	r3, #0
 8023b8e:	d030      	beq.n	8023bf2 <dhcp_release_and_stop+0xfa>
      struct dhcp_msg *msg_out = (struct dhcp_msg *)p_out->payload;
 8023b90:	69bb      	ldr	r3, [r7, #24]
 8023b92:	685b      	ldr	r3, [r3, #4]
 8023b94:	617b      	str	r3, [r7, #20]
      options_out_len = dhcp_option(options_out_len, msg_out->options, DHCP_OPTION_SERVER_ID, 4);
 8023b96:	89f8      	ldrh	r0, [r7, #14]
 8023b98:	697b      	ldr	r3, [r7, #20]
 8023b9a:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 8023b9e:	2304      	movs	r3, #4
 8023ba0:	2236      	movs	r2, #54	@ 0x36
 8023ba2:	f000 f86b 	bl	8023c7c <dhcp_option>
 8023ba6:	4603      	mov	r3, r0
 8023ba8:	81fb      	strh	r3, [r7, #14]
      options_out_len = dhcp_option_long(options_out_len, msg_out->options, lwip_ntohl(ip4_addr_get_u32(ip_2_ip4(&server_ip_addr))));
 8023baa:	89fc      	ldrh	r4, [r7, #14]
 8023bac:	697b      	ldr	r3, [r7, #20]
 8023bae:	f103 05f0 	add.w	r5, r3, #240	@ 0xf0
 8023bb2:	693b      	ldr	r3, [r7, #16]
 8023bb4:	4618      	mov	r0, r3
 8023bb6:	f7f6 f80c 	bl	8019bd2 <lwip_htonl>
 8023bba:	4603      	mov	r3, r0
 8023bbc:	461a      	mov	r2, r3
 8023bbe:	4629      	mov	r1, r5
 8023bc0:	4620      	mov	r0, r4
 8023bc2:	f000 f8e7 	bl	8023d94 <dhcp_option_long>
 8023bc6:	4603      	mov	r3, r0
 8023bc8:	81fb      	strh	r3, [r7, #14]

      LWIP_HOOK_DHCP_APPEND_OPTIONS(netif, dhcp, dhcp->state, msg_out, DHCP_RELEASE, &options_out_len);
      dhcp_option_trailer(options_out_len, msg_out->options, p_out);
 8023bca:	89f8      	ldrh	r0, [r7, #14]
 8023bcc:	697b      	ldr	r3, [r7, #20]
 8023bce:	33f0      	adds	r3, #240	@ 0xf0
 8023bd0:	69ba      	ldr	r2, [r7, #24]
 8023bd2:	4619      	mov	r1, r3
 8023bd4:	f000 fda6 	bl	8024724 <dhcp_option_trailer>

      udp_sendto_if(dhcp_pcb, p_out, &server_ip_addr, LWIP_IANA_PORT_DHCP_SERVER, netif);
 8023bd8:	4b13      	ldr	r3, [pc, #76]	@ (8023c28 <dhcp_release_and_stop+0x130>)
 8023bda:	6818      	ldr	r0, [r3, #0]
 8023bdc:	f107 0210 	add.w	r2, r7, #16
 8023be0:	687b      	ldr	r3, [r7, #4]
 8023be2:	9300      	str	r3, [sp, #0]
 8023be4:	2343      	movs	r3, #67	@ 0x43
 8023be6:	69b9      	ldr	r1, [r7, #24]
 8023be8:	f7fe fc06 	bl	80223f8 <udp_sendto_if>
      pbuf_free(p_out);
 8023bec:	69b8      	ldr	r0, [r7, #24]
 8023bee:	f7f7 fcbd 	bl	801b56c <pbuf_free>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n"));
    }
  }

  /* remove IP address from interface (prevents routing from selecting this interface) */
  netif_set_addr(netif, IP4_ADDR_ANY4, IP4_ADDR_ANY4, IP4_ADDR_ANY4);
 8023bf2:	4b0e      	ldr	r3, [pc, #56]	@ (8023c2c <dhcp_release_and_stop+0x134>)
 8023bf4:	4a0d      	ldr	r2, [pc, #52]	@ (8023c2c <dhcp_release_and_stop+0x134>)
 8023bf6:	490d      	ldr	r1, [pc, #52]	@ (8023c2c <dhcp_release_and_stop+0x134>)
 8023bf8:	6878      	ldr	r0, [r7, #4]
 8023bfa:	f7f6 ff6d 	bl	801aad8 <netif_set_addr>
    autoip_stop(netif);
    dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF;
  }
#endif /* LWIP_DHCP_AUTOIP_COOP */

  dhcp_set_state(dhcp, DHCP_STATE_OFF);
 8023bfe:	2100      	movs	r1, #0
 8023c00:	69f8      	ldr	r0, [r7, #28]
 8023c02:	f000 f820 	bl	8023c46 <dhcp_set_state>

  if (dhcp->pcb_allocated != 0) {
 8023c06:	69fb      	ldr	r3, [r7, #28]
 8023c08:	791b      	ldrb	r3, [r3, #4]
 8023c0a:	2b00      	cmp	r3, #0
 8023c0c:	d008      	beq.n	8023c20 <dhcp_release_and_stop+0x128>
    dhcp_dec_pcb_refcount(); /* free DHCP PCB if not needed any more */
 8023c0e:	f7fe ff83 	bl	8022b18 <dhcp_dec_pcb_refcount>
    dhcp->pcb_allocated = 0;
 8023c12:	69fb      	ldr	r3, [r7, #28]
 8023c14:	2200      	movs	r2, #0
 8023c16:	711a      	strb	r2, [r3, #4]
 8023c18:	e002      	b.n	8023c20 <dhcp_release_and_stop+0x128>
    return;
 8023c1a:	bf00      	nop
 8023c1c:	e000      	b.n	8023c20 <dhcp_release_and_stop+0x128>
    return;
 8023c1e:	bf00      	nop
  }
}
 8023c20:	3720      	adds	r7, #32
 8023c22:	46bd      	mov	sp, r7
 8023c24:	bdb0      	pop	{r4, r5, r7, pc}
 8023c26:	bf00      	nop
 8023c28:	2402b034 	.word	0x2402b034
 8023c2c:	08031ef8 	.word	0x08031ef8

08023c30 <dhcp_stop>:
 * This function calls dhcp_release_and_stop() internally.
 * @deprecated Use dhcp_release_and_stop() instead.
 */
void
dhcp_stop(struct netif *netif)
{
 8023c30:	b580      	push	{r7, lr}
 8023c32:	b082      	sub	sp, #8
 8023c34:	af00      	add	r7, sp, #0
 8023c36:	6078      	str	r0, [r7, #4]
  dhcp_release_and_stop(netif);
 8023c38:	6878      	ldr	r0, [r7, #4]
 8023c3a:	f7ff ff5d 	bl	8023af8 <dhcp_release_and_stop>
}
 8023c3e:	bf00      	nop
 8023c40:	3708      	adds	r7, #8
 8023c42:	46bd      	mov	sp, r7
 8023c44:	bd80      	pop	{r7, pc}

08023c46 <dhcp_set_state>:
 *
 * If the state changed, reset the number of tries.
 */
static void
dhcp_set_state(struct dhcp *dhcp, u8_t new_state)
{
 8023c46:	b480      	push	{r7}
 8023c48:	b083      	sub	sp, #12
 8023c4a:	af00      	add	r7, sp, #0
 8023c4c:	6078      	str	r0, [r7, #4]
 8023c4e:	460b      	mov	r3, r1
 8023c50:	70fb      	strb	r3, [r7, #3]
  if (new_state != dhcp->state) {
 8023c52:	687b      	ldr	r3, [r7, #4]
 8023c54:	795b      	ldrb	r3, [r3, #5]
 8023c56:	78fa      	ldrb	r2, [r7, #3]
 8023c58:	429a      	cmp	r2, r3
 8023c5a:	d008      	beq.n	8023c6e <dhcp_set_state+0x28>
    dhcp->state = new_state;
 8023c5c:	687b      	ldr	r3, [r7, #4]
 8023c5e:	78fa      	ldrb	r2, [r7, #3]
 8023c60:	715a      	strb	r2, [r3, #5]
    dhcp->tries = 0;
 8023c62:	687b      	ldr	r3, [r7, #4]
 8023c64:	2200      	movs	r2, #0
 8023c66:	719a      	strb	r2, [r3, #6]
    dhcp->request_timeout = 0;
 8023c68:	687b      	ldr	r3, [r7, #4]
 8023c6a:	2200      	movs	r2, #0
 8023c6c:	811a      	strh	r2, [r3, #8]
  }
}
 8023c6e:	bf00      	nop
 8023c70:	370c      	adds	r7, #12
 8023c72:	46bd      	mov	sp, r7
 8023c74:	f85d 7b04 	ldr.w	r7, [sp], #4
 8023c78:	4770      	bx	lr
	...

08023c7c <dhcp_option>:
 * DHCP message.
 *
 */
static u16_t
dhcp_option(u16_t options_out_len, u8_t *options, u8_t option_type, u8_t option_len)
{
 8023c7c:	b580      	push	{r7, lr}
 8023c7e:	b082      	sub	sp, #8
 8023c80:	af00      	add	r7, sp, #0
 8023c82:	6039      	str	r1, [r7, #0]
 8023c84:	4611      	mov	r1, r2
 8023c86:	461a      	mov	r2, r3
 8023c88:	4603      	mov	r3, r0
 8023c8a:	80fb      	strh	r3, [r7, #6]
 8023c8c:	460b      	mov	r3, r1
 8023c8e:	717b      	strb	r3, [r7, #5]
 8023c90:	4613      	mov	r3, r2
 8023c92:	713b      	strb	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option: options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN);
 8023c94:	88fa      	ldrh	r2, [r7, #6]
 8023c96:	793b      	ldrb	r3, [r7, #4]
 8023c98:	4413      	add	r3, r2
 8023c9a:	3302      	adds	r3, #2
 8023c9c:	2b44      	cmp	r3, #68	@ 0x44
 8023c9e:	d906      	bls.n	8023cae <dhcp_option+0x32>
 8023ca0:	4b0d      	ldr	r3, [pc, #52]	@ (8023cd8 <dhcp_option+0x5c>)
 8023ca2:	f240 529a 	movw	r2, #1434	@ 0x59a
 8023ca6:	490d      	ldr	r1, [pc, #52]	@ (8023cdc <dhcp_option+0x60>)
 8023ca8:	480d      	ldr	r0, [pc, #52]	@ (8023ce0 <dhcp_option+0x64>)
 8023caa:	f006 fed7 	bl	802aa5c <iprintf>
  options[options_out_len++] = option_type;
 8023cae:	88fb      	ldrh	r3, [r7, #6]
 8023cb0:	1c5a      	adds	r2, r3, #1
 8023cb2:	80fa      	strh	r2, [r7, #6]
 8023cb4:	461a      	mov	r2, r3
 8023cb6:	683b      	ldr	r3, [r7, #0]
 8023cb8:	4413      	add	r3, r2
 8023cba:	797a      	ldrb	r2, [r7, #5]
 8023cbc:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = option_len;
 8023cbe:	88fb      	ldrh	r3, [r7, #6]
 8023cc0:	1c5a      	adds	r2, r3, #1
 8023cc2:	80fa      	strh	r2, [r7, #6]
 8023cc4:	461a      	mov	r2, r3
 8023cc6:	683b      	ldr	r3, [r7, #0]
 8023cc8:	4413      	add	r3, r2
 8023cca:	793a      	ldrb	r2, [r7, #4]
 8023ccc:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8023cce:	88fb      	ldrh	r3, [r7, #6]
}
 8023cd0:	4618      	mov	r0, r3
 8023cd2:	3708      	adds	r7, #8
 8023cd4:	46bd      	mov	sp, r7
 8023cd6:	bd80      	pop	{r7, pc}
 8023cd8:	080310cc 	.word	0x080310cc
 8023cdc:	08031260 	.word	0x08031260
 8023ce0:	0803112c 	.word	0x0803112c

08023ce4 <dhcp_option_byte>:
 * Concatenate a single byte to the outgoing DHCP message.
 *
 */
static u16_t
dhcp_option_byte(u16_t options_out_len, u8_t *options, u8_t value)
{
 8023ce4:	b580      	push	{r7, lr}
 8023ce6:	b082      	sub	sp, #8
 8023ce8:	af00      	add	r7, sp, #0
 8023cea:	4603      	mov	r3, r0
 8023cec:	6039      	str	r1, [r7, #0]
 8023cee:	80fb      	strh	r3, [r7, #6]
 8023cf0:	4613      	mov	r3, r2
 8023cf2:	717b      	strb	r3, [r7, #5]
  LWIP_ASSERT("dhcp_option_byte: options_out_len < DHCP_OPTIONS_LEN", options_out_len < DHCP_OPTIONS_LEN);
 8023cf4:	88fb      	ldrh	r3, [r7, #6]
 8023cf6:	2b43      	cmp	r3, #67	@ 0x43
 8023cf8:	d906      	bls.n	8023d08 <dhcp_option_byte+0x24>
 8023cfa:	4b0a      	ldr	r3, [pc, #40]	@ (8023d24 <dhcp_option_byte+0x40>)
 8023cfc:	f240 52a6 	movw	r2, #1446	@ 0x5a6
 8023d00:	4909      	ldr	r1, [pc, #36]	@ (8023d28 <dhcp_option_byte+0x44>)
 8023d02:	480a      	ldr	r0, [pc, #40]	@ (8023d2c <dhcp_option_byte+0x48>)
 8023d04:	f006 feaa 	bl	802aa5c <iprintf>
  options[options_out_len++] = value;
 8023d08:	88fb      	ldrh	r3, [r7, #6]
 8023d0a:	1c5a      	adds	r2, r3, #1
 8023d0c:	80fa      	strh	r2, [r7, #6]
 8023d0e:	461a      	mov	r2, r3
 8023d10:	683b      	ldr	r3, [r7, #0]
 8023d12:	4413      	add	r3, r2
 8023d14:	797a      	ldrb	r2, [r7, #5]
 8023d16:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8023d18:	88fb      	ldrh	r3, [r7, #6]
}
 8023d1a:	4618      	mov	r0, r3
 8023d1c:	3708      	adds	r7, #8
 8023d1e:	46bd      	mov	sp, r7
 8023d20:	bd80      	pop	{r7, pc}
 8023d22:	bf00      	nop
 8023d24:	080310cc 	.word	0x080310cc
 8023d28:	080312a4 	.word	0x080312a4
 8023d2c:	0803112c 	.word	0x0803112c

08023d30 <dhcp_option_short>:

static u16_t
dhcp_option_short(u16_t options_out_len, u8_t *options, u16_t value)
{
 8023d30:	b580      	push	{r7, lr}
 8023d32:	b082      	sub	sp, #8
 8023d34:	af00      	add	r7, sp, #0
 8023d36:	4603      	mov	r3, r0
 8023d38:	6039      	str	r1, [r7, #0]
 8023d3a:	80fb      	strh	r3, [r7, #6]
 8023d3c:	4613      	mov	r3, r2
 8023d3e:	80bb      	strh	r3, [r7, #4]
  LWIP_ASSERT("dhcp_option_short: options_out_len + 2 <= DHCP_OPTIONS_LEN", options_out_len + 2U <= DHCP_OPTIONS_LEN);
 8023d40:	88fb      	ldrh	r3, [r7, #6]
 8023d42:	3302      	adds	r3, #2
 8023d44:	2b44      	cmp	r3, #68	@ 0x44
 8023d46:	d906      	bls.n	8023d56 <dhcp_option_short+0x26>
 8023d48:	4b0f      	ldr	r3, [pc, #60]	@ (8023d88 <dhcp_option_short+0x58>)
 8023d4a:	f240 52ae 	movw	r2, #1454	@ 0x5ae
 8023d4e:	490f      	ldr	r1, [pc, #60]	@ (8023d8c <dhcp_option_short+0x5c>)
 8023d50:	480f      	ldr	r0, [pc, #60]	@ (8023d90 <dhcp_option_short+0x60>)
 8023d52:	f006 fe83 	bl	802aa5c <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff00U) >> 8);
 8023d56:	88bb      	ldrh	r3, [r7, #4]
 8023d58:	0a1b      	lsrs	r3, r3, #8
 8023d5a:	b29a      	uxth	r2, r3
 8023d5c:	88fb      	ldrh	r3, [r7, #6]
 8023d5e:	1c59      	adds	r1, r3, #1
 8023d60:	80f9      	strh	r1, [r7, #6]
 8023d62:	4619      	mov	r1, r3
 8023d64:	683b      	ldr	r3, [r7, #0]
 8023d66:	440b      	add	r3, r1
 8023d68:	b2d2      	uxtb	r2, r2
 8023d6a:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t) (value & 0x00ffU);
 8023d6c:	88fb      	ldrh	r3, [r7, #6]
 8023d6e:	1c5a      	adds	r2, r3, #1
 8023d70:	80fa      	strh	r2, [r7, #6]
 8023d72:	461a      	mov	r2, r3
 8023d74:	683b      	ldr	r3, [r7, #0]
 8023d76:	4413      	add	r3, r2
 8023d78:	88ba      	ldrh	r2, [r7, #4]
 8023d7a:	b2d2      	uxtb	r2, r2
 8023d7c:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8023d7e:	88fb      	ldrh	r3, [r7, #6]
}
 8023d80:	4618      	mov	r0, r3
 8023d82:	3708      	adds	r7, #8
 8023d84:	46bd      	mov	sp, r7
 8023d86:	bd80      	pop	{r7, pc}
 8023d88:	080310cc 	.word	0x080310cc
 8023d8c:	080312dc 	.word	0x080312dc
 8023d90:	0803112c 	.word	0x0803112c

08023d94 <dhcp_option_long>:

static u16_t
dhcp_option_long(u16_t options_out_len, u8_t *options, u32_t value)
{
 8023d94:	b580      	push	{r7, lr}
 8023d96:	b084      	sub	sp, #16
 8023d98:	af00      	add	r7, sp, #0
 8023d9a:	4603      	mov	r3, r0
 8023d9c:	60b9      	str	r1, [r7, #8]
 8023d9e:	607a      	str	r2, [r7, #4]
 8023da0:	81fb      	strh	r3, [r7, #14]
  LWIP_ASSERT("dhcp_option_long: options_out_len + 4 <= DHCP_OPTIONS_LEN", options_out_len + 4U <= DHCP_OPTIONS_LEN);
 8023da2:	89fb      	ldrh	r3, [r7, #14]
 8023da4:	3304      	adds	r3, #4
 8023da6:	2b44      	cmp	r3, #68	@ 0x44
 8023da8:	d906      	bls.n	8023db8 <dhcp_option_long+0x24>
 8023daa:	4b19      	ldr	r3, [pc, #100]	@ (8023e10 <dhcp_option_long+0x7c>)
 8023dac:	f240 52b7 	movw	r2, #1463	@ 0x5b7
 8023db0:	4918      	ldr	r1, [pc, #96]	@ (8023e14 <dhcp_option_long+0x80>)
 8023db2:	4819      	ldr	r0, [pc, #100]	@ (8023e18 <dhcp_option_long+0x84>)
 8023db4:	f006 fe52 	bl	802aa5c <iprintf>
  options[options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24);
 8023db8:	687b      	ldr	r3, [r7, #4]
 8023dba:	0e1a      	lsrs	r2, r3, #24
 8023dbc:	89fb      	ldrh	r3, [r7, #14]
 8023dbe:	1c59      	adds	r1, r3, #1
 8023dc0:	81f9      	strh	r1, [r7, #14]
 8023dc2:	4619      	mov	r1, r3
 8023dc4:	68bb      	ldr	r3, [r7, #8]
 8023dc6:	440b      	add	r3, r1
 8023dc8:	b2d2      	uxtb	r2, r2
 8023dca:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16);
 8023dcc:	687b      	ldr	r3, [r7, #4]
 8023dce:	0c1a      	lsrs	r2, r3, #16
 8023dd0:	89fb      	ldrh	r3, [r7, #14]
 8023dd2:	1c59      	adds	r1, r3, #1
 8023dd4:	81f9      	strh	r1, [r7, #14]
 8023dd6:	4619      	mov	r1, r3
 8023dd8:	68bb      	ldr	r3, [r7, #8]
 8023dda:	440b      	add	r3, r1
 8023ddc:	b2d2      	uxtb	r2, r2
 8023dde:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8);
 8023de0:	687b      	ldr	r3, [r7, #4]
 8023de2:	0a1a      	lsrs	r2, r3, #8
 8023de4:	89fb      	ldrh	r3, [r7, #14]
 8023de6:	1c59      	adds	r1, r3, #1
 8023de8:	81f9      	strh	r1, [r7, #14]
 8023dea:	4619      	mov	r1, r3
 8023dec:	68bb      	ldr	r3, [r7, #8]
 8023dee:	440b      	add	r3, r1
 8023df0:	b2d2      	uxtb	r2, r2
 8023df2:	701a      	strb	r2, [r3, #0]
  options[options_out_len++] = (u8_t)((value & 0x000000ffUL));
 8023df4:	89fb      	ldrh	r3, [r7, #14]
 8023df6:	1c5a      	adds	r2, r3, #1
 8023df8:	81fa      	strh	r2, [r7, #14]
 8023dfa:	461a      	mov	r2, r3
 8023dfc:	68bb      	ldr	r3, [r7, #8]
 8023dfe:	4413      	add	r3, r2
 8023e00:	687a      	ldr	r2, [r7, #4]
 8023e02:	b2d2      	uxtb	r2, r2
 8023e04:	701a      	strb	r2, [r3, #0]
  return options_out_len;
 8023e06:	89fb      	ldrh	r3, [r7, #14]
}
 8023e08:	4618      	mov	r0, r3
 8023e0a:	3710      	adds	r7, #16
 8023e0c:	46bd      	mov	sp, r7
 8023e0e:	bd80      	pop	{r7, pc}
 8023e10:	080310cc 	.word	0x080310cc
 8023e14:	08031318 	.word	0x08031318
 8023e18:	0803112c 	.word	0x0803112c

08023e1c <dhcp_parse_reply>:
 * use that further on.
 *
 */
static err_t
dhcp_parse_reply(struct pbuf *p, struct dhcp *dhcp)
{
 8023e1c:	b580      	push	{r7, lr}
 8023e1e:	b092      	sub	sp, #72	@ 0x48
 8023e20:	af00      	add	r7, sp, #0
 8023e22:	6078      	str	r0, [r7, #4]
 8023e24:	6039      	str	r1, [r7, #0]
  u16_t offset;
  u16_t offset_max;
  u16_t options_idx;
  u16_t options_idx_max;
  struct pbuf *q;
  int parse_file_as_options = 0;
 8023e26:	2300      	movs	r3, #0
 8023e28:	633b      	str	r3, [r7, #48]	@ 0x30
  int parse_sname_as_options = 0;
 8023e2a:	2300      	movs	r3, #0
 8023e2c:	62fb      	str	r3, [r7, #44]	@ 0x2c
#endif

  LWIP_UNUSED_ARG(dhcp);

  /* clear received options */
  dhcp_clear_all_options(dhcp);
 8023e2e:	2208      	movs	r2, #8
 8023e30:	2100      	movs	r1, #0
 8023e32:	48b8      	ldr	r0, [pc, #736]	@ (8024114 <dhcp_parse_reply+0x2f8>)
 8023e34:	f006 ffa4 	bl	802ad80 <memset>
  /* check that beginning of dhcp_msg (up to and including chaddr) is in first pbuf */
  if (p->len < DHCP_SNAME_OFS) {
 8023e38:	687b      	ldr	r3, [r7, #4]
 8023e3a:	895b      	ldrh	r3, [r3, #10]
 8023e3c:	2b2b      	cmp	r3, #43	@ 0x2b
 8023e3e:	d802      	bhi.n	8023e46 <dhcp_parse_reply+0x2a>
    return ERR_BUF;
 8023e40:	f06f 0301 	mvn.w	r3, #1
 8023e44:	e2b8      	b.n	80243b8 <dhcp_parse_reply+0x59c>
  }
  msg_in = (struct dhcp_msg *)p->payload;
 8023e46:	687b      	ldr	r3, [r7, #4]
 8023e48:	685b      	ldr	r3, [r3, #4]
 8023e4a:	61fb      	str	r3, [r7, #28]
#endif /* LWIP_DHCP_BOOTP_FILE */

  /* parse options */

  /* start with options field */
  options_idx = DHCP_OPTIONS_OFS;
 8023e4c:	23f0      	movs	r3, #240	@ 0xf0
 8023e4e:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  /* parse options to the end of the received packet */
  options_idx_max = p->tot_len;
 8023e50:	687b      	ldr	r3, [r7, #4]
 8023e52:	891b      	ldrh	r3, [r3, #8]
 8023e54:	877b      	strh	r3, [r7, #58]	@ 0x3a
again:
  q = p;
 8023e56:	687b      	ldr	r3, [r7, #4]
 8023e58:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 8023e5a:	e00c      	b.n	8023e76 <dhcp_parse_reply+0x5a>
    options_idx = (u16_t)(options_idx - q->len);
 8023e5c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023e5e:	895b      	ldrh	r3, [r3, #10]
 8023e60:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 8023e62:	1ad3      	subs	r3, r2, r3
 8023e64:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = (u16_t)(options_idx_max - q->len);
 8023e66:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023e68:	895b      	ldrh	r3, [r3, #10]
 8023e6a:	8f7a      	ldrh	r2, [r7, #58]	@ 0x3a
 8023e6c:	1ad3      	subs	r3, r2, r3
 8023e6e:	877b      	strh	r3, [r7, #58]	@ 0x3a
    q = q->next;
 8023e70:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023e72:	681b      	ldr	r3, [r3, #0]
 8023e74:	637b      	str	r3, [r7, #52]	@ 0x34
  while ((q != NULL) && (options_idx >= q->len)) {
 8023e76:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023e78:	2b00      	cmp	r3, #0
 8023e7a:	d004      	beq.n	8023e86 <dhcp_parse_reply+0x6a>
 8023e7c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023e7e:	895b      	ldrh	r3, [r3, #10]
 8023e80:	8fba      	ldrh	r2, [r7, #60]	@ 0x3c
 8023e82:	429a      	cmp	r2, r3
 8023e84:	d2ea      	bcs.n	8023e5c <dhcp_parse_reply+0x40>
  }
  if (q == NULL) {
 8023e86:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023e88:	2b00      	cmp	r3, #0
 8023e8a:	d102      	bne.n	8023e92 <dhcp_parse_reply+0x76>
    return ERR_BUF;
 8023e8c:	f06f 0301 	mvn.w	r3, #1
 8023e90:	e292      	b.n	80243b8 <dhcp_parse_reply+0x59c>
  }
  offset = options_idx;
 8023e92:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8023e94:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  offset_max = options_idx_max;
 8023e98:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8023e9a:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  options = (u8_t *)q->payload;
 8023e9c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023e9e:	685b      	ldr	r3, [r3, #4]
 8023ea0:	643b      	str	r3, [r7, #64]	@ 0x40
  /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 8023ea2:	e247      	b.n	8024334 <dhcp_parse_reply+0x518>
    u8_t op = options[offset];
 8023ea4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023ea8:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8023eaa:	4413      	add	r3, r2
 8023eac:	781b      	ldrb	r3, [r3, #0]
 8023eae:	76fb      	strb	r3, [r7, #27]
    u8_t len;
    u8_t decode_len = 0;
 8023eb0:	2300      	movs	r3, #0
 8023eb2:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    int decode_idx = -1;
 8023eb6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8023eba:	627b      	str	r3, [r7, #36]	@ 0x24
    u16_t val_offset = (u16_t)(offset + 2);
 8023ebc:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023ec0:	3302      	adds	r3, #2
 8023ec2:	847b      	strh	r3, [r7, #34]	@ 0x22
    if (val_offset < offset) {
 8023ec4:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 8023ec6:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023eca:	429a      	cmp	r2, r3
 8023ecc:	d202      	bcs.n	8023ed4 <dhcp_parse_reply+0xb8>
      /* overflow */
      return ERR_BUF;
 8023ece:	f06f 0301 	mvn.w	r3, #1
 8023ed2:	e271      	b.n	80243b8 <dhcp_parse_reply+0x59c>
    }
    /* len byte might be in the next pbuf */
    if ((offset + 1) < q->len) {
 8023ed4:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023ed8:	3301      	adds	r3, #1
 8023eda:	6b7a      	ldr	r2, [r7, #52]	@ 0x34
 8023edc:	8952      	ldrh	r2, [r2, #10]
 8023ede:	4293      	cmp	r3, r2
 8023ee0:	da08      	bge.n	8023ef4 <dhcp_parse_reply+0xd8>
      len = options[offset + 1];
 8023ee2:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8023ee6:	3301      	adds	r3, #1
 8023ee8:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8023eea:	4413      	add	r3, r2
 8023eec:	781b      	ldrb	r3, [r3, #0]
 8023eee:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 8023ef2:	e00b      	b.n	8023f0c <dhcp_parse_reply+0xf0>
    } else {
      len = (q->next != NULL ? ((u8_t *)q->next->payload)[0] : 0);
 8023ef4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023ef6:	681b      	ldr	r3, [r3, #0]
 8023ef8:	2b00      	cmp	r3, #0
 8023efa:	d004      	beq.n	8023f06 <dhcp_parse_reply+0xea>
 8023efc:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8023efe:	681b      	ldr	r3, [r3, #0]
 8023f00:	685b      	ldr	r3, [r3, #4]
 8023f02:	781b      	ldrb	r3, [r3, #0]
 8023f04:	e000      	b.n	8023f08 <dhcp_parse_reply+0xec>
 8023f06:	2300      	movs	r3, #0
 8023f08:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
    }
    /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */
    decode_len = len;
 8023f0c:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8023f10:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
    switch (op) {
 8023f14:	7efb      	ldrb	r3, [r7, #27]
 8023f16:	2b3b      	cmp	r3, #59	@ 0x3b
 8023f18:	f200 812c 	bhi.w	8024174 <dhcp_parse_reply+0x358>
 8023f1c:	a201      	add	r2, pc, #4	@ (adr r2, 8023f24 <dhcp_parse_reply+0x108>)
 8023f1e:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8023f22:	bf00      	nop
 8023f24:	08024015 	.word	0x08024015
 8023f28:	08024025 	.word	0x08024025
 8023f2c:	08024175 	.word	0x08024175
 8023f30:	08024047 	.word	0x08024047
 8023f34:	08024175 	.word	0x08024175
 8023f38:	08024175 	.word	0x08024175
 8023f3c:	08024175 	.word	0x08024175
 8023f40:	08024175 	.word	0x08024175
 8023f44:	08024175 	.word	0x08024175
 8023f48:	08024175 	.word	0x08024175
 8023f4c:	08024175 	.word	0x08024175
 8023f50:	08024175 	.word	0x08024175
 8023f54:	08024175 	.word	0x08024175
 8023f58:	08024175 	.word	0x08024175
 8023f5c:	08024175 	.word	0x08024175
 8023f60:	08024175 	.word	0x08024175
 8023f64:	08024175 	.word	0x08024175
 8023f68:	08024175 	.word	0x08024175
 8023f6c:	08024175 	.word	0x08024175
 8023f70:	08024175 	.word	0x08024175
 8023f74:	08024175 	.word	0x08024175
 8023f78:	08024175 	.word	0x08024175
 8023f7c:	08024175 	.word	0x08024175
 8023f80:	08024175 	.word	0x08024175
 8023f84:	08024175 	.word	0x08024175
 8023f88:	08024175 	.word	0x08024175
 8023f8c:	08024175 	.word	0x08024175
 8023f90:	08024175 	.word	0x08024175
 8023f94:	08024175 	.word	0x08024175
 8023f98:	08024175 	.word	0x08024175
 8023f9c:	08024175 	.word	0x08024175
 8023fa0:	08024175 	.word	0x08024175
 8023fa4:	08024175 	.word	0x08024175
 8023fa8:	08024175 	.word	0x08024175
 8023fac:	08024175 	.word	0x08024175
 8023fb0:	08024175 	.word	0x08024175
 8023fb4:	08024175 	.word	0x08024175
 8023fb8:	08024175 	.word	0x08024175
 8023fbc:	08024175 	.word	0x08024175
 8023fc0:	08024175 	.word	0x08024175
 8023fc4:	08024175 	.word	0x08024175
 8023fc8:	08024175 	.word	0x08024175
 8023fcc:	08024175 	.word	0x08024175
 8023fd0:	08024175 	.word	0x08024175
 8023fd4:	08024175 	.word	0x08024175
 8023fd8:	08024175 	.word	0x08024175
 8023fdc:	08024175 	.word	0x08024175
 8023fe0:	08024175 	.word	0x08024175
 8023fe4:	08024175 	.word	0x08024175
 8023fe8:	08024175 	.word	0x08024175
 8023fec:	08024175 	.word	0x08024175
 8023ff0:	08024073 	.word	0x08024073
 8023ff4:	08024095 	.word	0x08024095
 8023ff8:	080240d1 	.word	0x080240d1
 8023ffc:	080240f3 	.word	0x080240f3
 8024000:	08024175 	.word	0x08024175
 8024004:	08024175 	.word	0x08024175
 8024008:	08024175 	.word	0x08024175
 802400c:	08024131 	.word	0x08024131
 8024010:	08024153 	.word	0x08024153
      /* case(DHCP_OPTION_END): handled above */
      case (DHCP_OPTION_PAD):
        /* special option: no len encoded */
        decode_len = len = 0;
 8024014:	2300      	movs	r3, #0
 8024016:	f887 302b 	strb.w	r3, [r7, #43]	@ 0x2b
 802401a:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 802401e:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        /* will be increased below */
        break;
 8024022:	e0ab      	b.n	802417c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SUBNET_MASK):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8024024:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8024028:	2b04      	cmp	r3, #4
 802402a:	d009      	beq.n	8024040 <dhcp_parse_reply+0x224>
 802402c:	4b3a      	ldr	r3, [pc, #232]	@ (8024118 <dhcp_parse_reply+0x2fc>)
 802402e:	f240 622e 	movw	r2, #1582	@ 0x62e
 8024032:	493a      	ldr	r1, [pc, #232]	@ (802411c <dhcp_parse_reply+0x300>)
 8024034:	483a      	ldr	r0, [pc, #232]	@ (8024120 <dhcp_parse_reply+0x304>)
 8024036:	f006 fd11 	bl	802aa5c <iprintf>
 802403a:	f06f 0305 	mvn.w	r3, #5
 802403e:	e1bb      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SUBNET_MASK;
 8024040:	2306      	movs	r3, #6
 8024042:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8024044:	e09a      	b.n	802417c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_ROUTER):
        decode_len = 4; /* only copy the first given router */
 8024046:	2304      	movs	r3, #4
 8024048:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
 802404c:	f897 202b 	ldrb.w	r2, [r7, #43]	@ 0x2b
 8024050:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8024054:	429a      	cmp	r2, r3
 8024056:	d209      	bcs.n	802406c <dhcp_parse_reply+0x250>
 8024058:	4b2f      	ldr	r3, [pc, #188]	@ (8024118 <dhcp_parse_reply+0x2fc>)
 802405a:	f240 6233 	movw	r2, #1587	@ 0x633
 802405e:	4931      	ldr	r1, [pc, #196]	@ (8024124 <dhcp_parse_reply+0x308>)
 8024060:	482f      	ldr	r0, [pc, #188]	@ (8024120 <dhcp_parse_reply+0x304>)
 8024062:	f006 fcfb 	bl	802aa5c <iprintf>
 8024066:	f06f 0305 	mvn.w	r3, #5
 802406a:	e1a5      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_ROUTER;
 802406c:	2307      	movs	r3, #7
 802406e:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8024070:	e084      	b.n	802417c <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_DNS_SERVER;
        break;
#endif /* LWIP_DHCP_PROVIDE_DNS_SERVERS */
      case (DHCP_OPTION_LEASE_TIME):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8024072:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8024076:	2b04      	cmp	r3, #4
 8024078:	d009      	beq.n	802408e <dhcp_parse_reply+0x272>
 802407a:	4b27      	ldr	r3, [pc, #156]	@ (8024118 <dhcp_parse_reply+0x2fc>)
 802407c:	f240 6241 	movw	r2, #1601	@ 0x641
 8024080:	4926      	ldr	r1, [pc, #152]	@ (802411c <dhcp_parse_reply+0x300>)
 8024082:	4827      	ldr	r0, [pc, #156]	@ (8024120 <dhcp_parse_reply+0x304>)
 8024084:	f006 fcea 	bl	802aa5c <iprintf>
 8024088:	f06f 0305 	mvn.w	r3, #5
 802408c:	e194      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_LEASE_TIME;
 802408e:	2303      	movs	r3, #3
 8024090:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8024092:	e073      	b.n	802417c <dhcp_parse_reply+0x360>
        LWIP_ERROR("len >= decode_len", len >= decode_len, return ERR_VAL;);
        decode_idx = DHCP_OPTION_IDX_NTP_SERVER;
        break;
#endif /* LWIP_DHCP_GET_NTP_SRV*/
      case (DHCP_OPTION_OVERLOAD):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 8024094:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8024098:	2b01      	cmp	r3, #1
 802409a:	d009      	beq.n	80240b0 <dhcp_parse_reply+0x294>
 802409c:	4b1e      	ldr	r3, [pc, #120]	@ (8024118 <dhcp_parse_reply+0x2fc>)
 802409e:	f240 624f 	movw	r2, #1615	@ 0x64f
 80240a2:	4921      	ldr	r1, [pc, #132]	@ (8024128 <dhcp_parse_reply+0x30c>)
 80240a4:	481e      	ldr	r0, [pc, #120]	@ (8024120 <dhcp_parse_reply+0x304>)
 80240a6:	f006 fcd9 	bl	802aa5c <iprintf>
 80240aa:	f06f 0305 	mvn.w	r3, #5
 80240ae:	e183      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        /* decode overload only in options, not in file/sname: invalid packet */
        LWIP_ERROR("overload in file/sname", options_idx == DHCP_OPTIONS_OFS, return ERR_VAL;);
 80240b0:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 80240b2:	2bf0      	cmp	r3, #240	@ 0xf0
 80240b4:	d009      	beq.n	80240ca <dhcp_parse_reply+0x2ae>
 80240b6:	4b18      	ldr	r3, [pc, #96]	@ (8024118 <dhcp_parse_reply+0x2fc>)
 80240b8:	f240 6251 	movw	r2, #1617	@ 0x651
 80240bc:	491b      	ldr	r1, [pc, #108]	@ (802412c <dhcp_parse_reply+0x310>)
 80240be:	4818      	ldr	r0, [pc, #96]	@ (8024120 <dhcp_parse_reply+0x304>)
 80240c0:	f006 fccc 	bl	802aa5c <iprintf>
 80240c4:	f06f 0305 	mvn.w	r3, #5
 80240c8:	e176      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_OVERLOAD;
 80240ca:	2300      	movs	r3, #0
 80240cc:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 80240ce:	e055      	b.n	802417c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_MESSAGE_TYPE):
        LWIP_ERROR("len == 1", len == 1, return ERR_VAL;);
 80240d0:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80240d4:	2b01      	cmp	r3, #1
 80240d6:	d009      	beq.n	80240ec <dhcp_parse_reply+0x2d0>
 80240d8:	4b0f      	ldr	r3, [pc, #60]	@ (8024118 <dhcp_parse_reply+0x2fc>)
 80240da:	f240 6255 	movw	r2, #1621	@ 0x655
 80240de:	4912      	ldr	r1, [pc, #72]	@ (8024128 <dhcp_parse_reply+0x30c>)
 80240e0:	480f      	ldr	r0, [pc, #60]	@ (8024120 <dhcp_parse_reply+0x304>)
 80240e2:	f006 fcbb 	bl	802aa5c <iprintf>
 80240e6:	f06f 0305 	mvn.w	r3, #5
 80240ea:	e165      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_MSG_TYPE;
 80240ec:	2301      	movs	r3, #1
 80240ee:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 80240f0:	e044      	b.n	802417c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_SERVER_ID):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 80240f2:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80240f6:	2b04      	cmp	r3, #4
 80240f8:	d009      	beq.n	802410e <dhcp_parse_reply+0x2f2>
 80240fa:	4b07      	ldr	r3, [pc, #28]	@ (8024118 <dhcp_parse_reply+0x2fc>)
 80240fc:	f240 6259 	movw	r2, #1625	@ 0x659
 8024100:	4906      	ldr	r1, [pc, #24]	@ (802411c <dhcp_parse_reply+0x300>)
 8024102:	4807      	ldr	r0, [pc, #28]	@ (8024120 <dhcp_parse_reply+0x304>)
 8024104:	f006 fcaa 	bl	802aa5c <iprintf>
 8024108:	f06f 0305 	mvn.w	r3, #5
 802410c:	e154      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_SERVER_ID;
 802410e:	2302      	movs	r3, #2
 8024110:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8024112:	e033      	b.n	802417c <dhcp_parse_reply+0x360>
 8024114:	2402b02c 	.word	0x2402b02c
 8024118:	080310cc 	.word	0x080310cc
 802411c:	08031354 	.word	0x08031354
 8024120:	0803112c 	.word	0x0803112c
 8024124:	08031360 	.word	0x08031360
 8024128:	08031374 	.word	0x08031374
 802412c:	08031380 	.word	0x08031380
      case (DHCP_OPTION_T1):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8024130:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8024134:	2b04      	cmp	r3, #4
 8024136:	d009      	beq.n	802414c <dhcp_parse_reply+0x330>
 8024138:	4ba1      	ldr	r3, [pc, #644]	@ (80243c0 <dhcp_parse_reply+0x5a4>)
 802413a:	f240 625d 	movw	r2, #1629	@ 0x65d
 802413e:	49a1      	ldr	r1, [pc, #644]	@ (80243c4 <dhcp_parse_reply+0x5a8>)
 8024140:	48a1      	ldr	r0, [pc, #644]	@ (80243c8 <dhcp_parse_reply+0x5ac>)
 8024142:	f006 fc8b 	bl	802aa5c <iprintf>
 8024146:	f06f 0305 	mvn.w	r3, #5
 802414a:	e135      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T1;
 802414c:	2304      	movs	r3, #4
 802414e:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8024150:	e014      	b.n	802417c <dhcp_parse_reply+0x360>
      case (DHCP_OPTION_T2):
        LWIP_ERROR("len == 4", len == 4, return ERR_VAL;);
 8024152:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8024156:	2b04      	cmp	r3, #4
 8024158:	d009      	beq.n	802416e <dhcp_parse_reply+0x352>
 802415a:	4b99      	ldr	r3, [pc, #612]	@ (80243c0 <dhcp_parse_reply+0x5a4>)
 802415c:	f240 6261 	movw	r2, #1633	@ 0x661
 8024160:	4998      	ldr	r1, [pc, #608]	@ (80243c4 <dhcp_parse_reply+0x5a8>)
 8024162:	4899      	ldr	r0, [pc, #612]	@ (80243c8 <dhcp_parse_reply+0x5ac>)
 8024164:	f006 fc7a 	bl	802aa5c <iprintf>
 8024168:	f06f 0305 	mvn.w	r3, #5
 802416c:	e124      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        decode_idx = DHCP_OPTION_IDX_T2;
 802416e:	2305      	movs	r3, #5
 8024170:	627b      	str	r3, [r7, #36]	@ 0x24
        break;
 8024172:	e003      	b.n	802417c <dhcp_parse_reply+0x360>
      default:
        decode_len = 0;
 8024174:	2300      	movs	r3, #0
 8024176:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
        LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", (u16_t)op));
        LWIP_HOOK_DHCP_PARSE_OPTION(ip_current_netif(), dhcp, dhcp->state, msg_in,
                                    dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE) ? (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE) : 0,
                                    op, len, q, val_offset);
        break;
 802417a:	bf00      	nop
    }
    if (op == DHCP_OPTION_PAD) {
 802417c:	7efb      	ldrb	r3, [r7, #27]
 802417e:	2b00      	cmp	r3, #0
 8024180:	d105      	bne.n	802418e <dhcp_parse_reply+0x372>
      offset++;
 8024182:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8024186:	3301      	adds	r3, #1
 8024188:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
 802418c:	e0a4      	b.n	80242d8 <dhcp_parse_reply+0x4bc>
    } else {
      if (offset + len + 2 > 0xFFFF) {
 802418e:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8024192:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 8024196:	4413      	add	r3, r2
 8024198:	f64f 72fd 	movw	r2, #65533	@ 0xfffd
 802419c:	4293      	cmp	r3, r2
 802419e:	dd02      	ble.n	80241a6 <dhcp_parse_reply+0x38a>
        /* overflow */
        return ERR_BUF;
 80241a0:	f06f 0301 	mvn.w	r3, #1
 80241a4:	e108      	b.n	80243b8 <dhcp_parse_reply+0x59c>
      }
      offset = (u16_t)(offset + len + 2);
 80241a6:	f897 302b 	ldrb.w	r3, [r7, #43]	@ 0x2b
 80241aa:	b29a      	uxth	r2, r3
 80241ac:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 80241b0:	4413      	add	r3, r2
 80241b2:	b29b      	uxth	r3, r3
 80241b4:	3302      	adds	r3, #2
 80241b6:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      if (decode_len > 0) {
 80241ba:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 80241be:	2b00      	cmp	r3, #0
 80241c0:	f000 808a 	beq.w	80242d8 <dhcp_parse_reply+0x4bc>
        u32_t value = 0;
 80241c4:	2300      	movs	r3, #0
 80241c6:	60fb      	str	r3, [r7, #12]
        u16_t copy_len;
decode_next:
        LWIP_ASSERT("check decode_idx", decode_idx >= 0 && decode_idx < DHCP_OPTION_IDX_MAX);
 80241c8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80241ca:	2b00      	cmp	r3, #0
 80241cc:	db02      	blt.n	80241d4 <dhcp_parse_reply+0x3b8>
 80241ce:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80241d0:	2b07      	cmp	r3, #7
 80241d2:	dd06      	ble.n	80241e2 <dhcp_parse_reply+0x3c6>
 80241d4:	4b7a      	ldr	r3, [pc, #488]	@ (80243c0 <dhcp_parse_reply+0x5a4>)
 80241d6:	f44f 62cf 	mov.w	r2, #1656	@ 0x678
 80241da:	497c      	ldr	r1, [pc, #496]	@ (80243cc <dhcp_parse_reply+0x5b0>)
 80241dc:	487a      	ldr	r0, [pc, #488]	@ (80243c8 <dhcp_parse_reply+0x5ac>)
 80241de:	f006 fc3d 	bl	802aa5c <iprintf>
        if (!dhcp_option_given(dhcp, decode_idx)) {
 80241e2:	4a7b      	ldr	r2, [pc, #492]	@ (80243d0 <dhcp_parse_reply+0x5b4>)
 80241e4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80241e6:	4413      	add	r3, r2
 80241e8:	781b      	ldrb	r3, [r3, #0]
 80241ea:	2b00      	cmp	r3, #0
 80241ec:	d174      	bne.n	80242d8 <dhcp_parse_reply+0x4bc>
          copy_len = LWIP_MIN(decode_len, 4);
 80241ee:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 80241f2:	2b04      	cmp	r3, #4
 80241f4:	bf28      	it	cs
 80241f6:	2304      	movcs	r3, #4
 80241f8:	b2db      	uxtb	r3, r3
 80241fa:	833b      	strh	r3, [r7, #24]
          if (pbuf_copy_partial(q, &value, copy_len, val_offset) != copy_len) {
 80241fc:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80241fe:	8b3a      	ldrh	r2, [r7, #24]
 8024200:	f107 010c 	add.w	r1, r7, #12
 8024204:	6b78      	ldr	r0, [r7, #52]	@ 0x34
 8024206:	f7f7 fbb7 	bl	801b978 <pbuf_copy_partial>
 802420a:	4603      	mov	r3, r0
 802420c:	461a      	mov	r2, r3
 802420e:	8b3b      	ldrh	r3, [r7, #24]
 8024210:	4293      	cmp	r3, r2
 8024212:	d002      	beq.n	802421a <dhcp_parse_reply+0x3fe>
            return ERR_BUF;
 8024214:	f06f 0301 	mvn.w	r3, #1
 8024218:	e0ce      	b.n	80243b8 <dhcp_parse_reply+0x59c>
          }
          if (decode_len > 4) {
 802421a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 802421e:	2b04      	cmp	r3, #4
 8024220:	d933      	bls.n	802428a <dhcp_parse_reply+0x46e>
            /* decode more than one u32_t */
            u16_t next_val_offset;
            LWIP_ERROR("decode_len %% 4 == 0", decode_len % 4 == 0, return ERR_VAL;);
 8024222:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8024226:	f003 0303 	and.w	r3, r3, #3
 802422a:	b2db      	uxtb	r3, r3
 802422c:	2b00      	cmp	r3, #0
 802422e:	d009      	beq.n	8024244 <dhcp_parse_reply+0x428>
 8024230:	4b63      	ldr	r3, [pc, #396]	@ (80243c0 <dhcp_parse_reply+0x5a4>)
 8024232:	f240 6281 	movw	r2, #1665	@ 0x681
 8024236:	4967      	ldr	r1, [pc, #412]	@ (80243d4 <dhcp_parse_reply+0x5b8>)
 8024238:	4863      	ldr	r0, [pc, #396]	@ (80243c8 <dhcp_parse_reply+0x5ac>)
 802423a:	f006 fc0f 	bl	802aa5c <iprintf>
 802423e:	f06f 0305 	mvn.w	r3, #5
 8024242:	e0b9      	b.n	80243b8 <dhcp_parse_reply+0x59c>
            dhcp_got_option(dhcp, decode_idx);
 8024244:	4a62      	ldr	r2, [pc, #392]	@ (80243d0 <dhcp_parse_reply+0x5b4>)
 8024246:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8024248:	4413      	add	r3, r2
 802424a:	2201      	movs	r2, #1
 802424c:	701a      	strb	r2, [r3, #0]
            dhcp_set_option_value(dhcp, decode_idx, lwip_htonl(value));
 802424e:	68fb      	ldr	r3, [r7, #12]
 8024250:	4618      	mov	r0, r3
 8024252:	f7f5 fcbe 	bl	8019bd2 <lwip_htonl>
 8024256:	4602      	mov	r2, r0
 8024258:	495f      	ldr	r1, [pc, #380]	@ (80243d8 <dhcp_parse_reply+0x5bc>)
 802425a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802425c:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
            decode_len = (u8_t)(decode_len - 4);
 8024260:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 8024264:	3b04      	subs	r3, #4
 8024266:	f887 302a 	strb.w	r3, [r7, #42]	@ 0x2a
            next_val_offset = (u16_t)(val_offset + 4);
 802426a:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 802426c:	3304      	adds	r3, #4
 802426e:	82fb      	strh	r3, [r7, #22]
            if (next_val_offset < val_offset) {
 8024270:	8afa      	ldrh	r2, [r7, #22]
 8024272:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024274:	429a      	cmp	r2, r3
 8024276:	d202      	bcs.n	802427e <dhcp_parse_reply+0x462>
              /* overflow */
              return ERR_BUF;
 8024278:	f06f 0301 	mvn.w	r3, #1
 802427c:	e09c      	b.n	80243b8 <dhcp_parse_reply+0x59c>
            }
            val_offset = next_val_offset;
 802427e:	8afb      	ldrh	r3, [r7, #22]
 8024280:	847b      	strh	r3, [r7, #34]	@ 0x22
            decode_idx++;
 8024282:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8024284:	3301      	adds	r3, #1
 8024286:	627b      	str	r3, [r7, #36]	@ 0x24
            goto decode_next;
 8024288:	e79e      	b.n	80241c8 <dhcp_parse_reply+0x3ac>
          } else if (decode_len == 4) {
 802428a:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 802428e:	2b04      	cmp	r3, #4
 8024290:	d106      	bne.n	80242a0 <dhcp_parse_reply+0x484>
            value = lwip_ntohl(value);
 8024292:	68fb      	ldr	r3, [r7, #12]
 8024294:	4618      	mov	r0, r3
 8024296:	f7f5 fc9c 	bl	8019bd2 <lwip_htonl>
 802429a:	4603      	mov	r3, r0
 802429c:	60fb      	str	r3, [r7, #12]
 802429e:	e011      	b.n	80242c4 <dhcp_parse_reply+0x4a8>
          } else {
            LWIP_ERROR("invalid decode_len", decode_len == 1, return ERR_VAL;);
 80242a0:	f897 302a 	ldrb.w	r3, [r7, #42]	@ 0x2a
 80242a4:	2b01      	cmp	r3, #1
 80242a6:	d009      	beq.n	80242bc <dhcp_parse_reply+0x4a0>
 80242a8:	4b45      	ldr	r3, [pc, #276]	@ (80243c0 <dhcp_parse_reply+0x5a4>)
 80242aa:	f44f 62d2 	mov.w	r2, #1680	@ 0x690
 80242ae:	494b      	ldr	r1, [pc, #300]	@ (80243dc <dhcp_parse_reply+0x5c0>)
 80242b0:	4845      	ldr	r0, [pc, #276]	@ (80243c8 <dhcp_parse_reply+0x5ac>)
 80242b2:	f006 fbd3 	bl	802aa5c <iprintf>
 80242b6:	f06f 0305 	mvn.w	r3, #5
 80242ba:	e07d      	b.n	80243b8 <dhcp_parse_reply+0x59c>
            value = ((u8_t *)&value)[0];
 80242bc:	f107 030c 	add.w	r3, r7, #12
 80242c0:	781b      	ldrb	r3, [r3, #0]
 80242c2:	60fb      	str	r3, [r7, #12]
          }
          dhcp_got_option(dhcp, decode_idx);
 80242c4:	4a42      	ldr	r2, [pc, #264]	@ (80243d0 <dhcp_parse_reply+0x5b4>)
 80242c6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80242c8:	4413      	add	r3, r2
 80242ca:	2201      	movs	r2, #1
 80242cc:	701a      	strb	r2, [r3, #0]
          dhcp_set_option_value(dhcp, decode_idx, value);
 80242ce:	68fa      	ldr	r2, [r7, #12]
 80242d0:	4941      	ldr	r1, [pc, #260]	@ (80243d8 <dhcp_parse_reply+0x5bc>)
 80242d2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80242d4:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
        }
      }
    }
    if (offset >= q->len) {
 80242d8:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80242da:	895b      	ldrh	r3, [r3, #10]
 80242dc:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 80242e0:	429a      	cmp	r2, r3
 80242e2:	d327      	bcc.n	8024334 <dhcp_parse_reply+0x518>
      offset = (u16_t)(offset - q->len);
 80242e4:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80242e6:	895b      	ldrh	r3, [r3, #10]
 80242e8:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 80242ec:	1ad3      	subs	r3, r2, r3
 80242ee:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      offset_max = (u16_t)(offset_max - q->len);
 80242f2:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80242f4:	895b      	ldrh	r3, [r3, #10]
 80242f6:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 80242f8:	1ad3      	subs	r3, r2, r3
 80242fa:	87fb      	strh	r3, [r7, #62]	@ 0x3e
      if (offset < offset_max) {
 80242fc:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8024300:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8024302:	429a      	cmp	r2, r3
 8024304:	d213      	bcs.n	802432e <dhcp_parse_reply+0x512>
        q = q->next;
 8024306:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8024308:	681b      	ldr	r3, [r3, #0]
 802430a:	637b      	str	r3, [r7, #52]	@ 0x34
        LWIP_ERROR("next pbuf was null", q != NULL, return ERR_VAL;);
 802430c:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802430e:	2b00      	cmp	r3, #0
 8024310:	d109      	bne.n	8024326 <dhcp_parse_reply+0x50a>
 8024312:	4b2b      	ldr	r3, [pc, #172]	@ (80243c0 <dhcp_parse_reply+0x5a4>)
 8024314:	f240 629d 	movw	r2, #1693	@ 0x69d
 8024318:	4931      	ldr	r1, [pc, #196]	@ (80243e0 <dhcp_parse_reply+0x5c4>)
 802431a:	482b      	ldr	r0, [pc, #172]	@ (80243c8 <dhcp_parse_reply+0x5ac>)
 802431c:	f006 fb9e 	bl	802aa5c <iprintf>
 8024320:	f06f 0305 	mvn.w	r3, #5
 8024324:	e048      	b.n	80243b8 <dhcp_parse_reply+0x59c>
        options = (u8_t *)q->payload;
 8024326:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8024328:	685b      	ldr	r3, [r3, #4]
 802432a:	643b      	str	r3, [r7, #64]	@ 0x40
 802432c:	e002      	b.n	8024334 <dhcp_parse_reply+0x518>
      } else {
        /* We've run out of bytes, probably no end marker. Don't proceed. */
        return ERR_BUF;
 802432e:	f06f 0301 	mvn.w	r3, #1
 8024332:	e041      	b.n	80243b8 <dhcp_parse_reply+0x59c>
  while ((q != NULL) && (offset < offset_max) && (options[offset] != DHCP_OPTION_END)) {
 8024334:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8024336:	2b00      	cmp	r3, #0
 8024338:	d00c      	beq.n	8024354 <dhcp_parse_reply+0x538>
 802433a:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 802433e:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8024340:	429a      	cmp	r2, r3
 8024342:	d207      	bcs.n	8024354 <dhcp_parse_reply+0x538>
 8024344:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8024348:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 802434a:	4413      	add	r3, r2
 802434c:	781b      	ldrb	r3, [r3, #0]
 802434e:	2bff      	cmp	r3, #255	@ 0xff
 8024350:	f47f ada8 	bne.w	8023ea4 <dhcp_parse_reply+0x88>
      }
    }
  }
  /* is this an overloaded message? */
  if (dhcp_option_given(dhcp, DHCP_OPTION_IDX_OVERLOAD)) {
 8024354:	4b1e      	ldr	r3, [pc, #120]	@ (80243d0 <dhcp_parse_reply+0x5b4>)
 8024356:	781b      	ldrb	r3, [r3, #0]
 8024358:	2b00      	cmp	r3, #0
 802435a:	d018      	beq.n	802438e <dhcp_parse_reply+0x572>
    u32_t overload = dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 802435c:	4b1e      	ldr	r3, [pc, #120]	@ (80243d8 <dhcp_parse_reply+0x5bc>)
 802435e:	681b      	ldr	r3, [r3, #0]
 8024360:	613b      	str	r3, [r7, #16]
    dhcp_clear_option(dhcp, DHCP_OPTION_IDX_OVERLOAD);
 8024362:	4b1b      	ldr	r3, [pc, #108]	@ (80243d0 <dhcp_parse_reply+0x5b4>)
 8024364:	2200      	movs	r2, #0
 8024366:	701a      	strb	r2, [r3, #0]
    if (overload == DHCP_OVERLOAD_FILE) {
 8024368:	693b      	ldr	r3, [r7, #16]
 802436a:	2b01      	cmp	r3, #1
 802436c:	d102      	bne.n	8024374 <dhcp_parse_reply+0x558>
      parse_file_as_options = 1;
 802436e:	2301      	movs	r3, #1
 8024370:	633b      	str	r3, [r7, #48]	@ 0x30
 8024372:	e00c      	b.n	802438e <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME) {
 8024374:	693b      	ldr	r3, [r7, #16]
 8024376:	2b02      	cmp	r3, #2
 8024378:	d102      	bne.n	8024380 <dhcp_parse_reply+0x564>
      parse_sname_as_options = 1;
 802437a:	2301      	movs	r3, #1
 802437c:	62fb      	str	r3, [r7, #44]	@ 0x2c
 802437e:	e006      	b.n	802438e <dhcp_parse_reply+0x572>
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n"));
    } else if (overload == DHCP_OVERLOAD_SNAME_FILE) {
 8024380:	693b      	ldr	r3, [r7, #16]
 8024382:	2b03      	cmp	r3, #3
 8024384:	d103      	bne.n	802438e <dhcp_parse_reply+0x572>
      parse_sname_as_options = 1;
 8024386:	2301      	movs	r3, #1
 8024388:	62fb      	str	r3, [r7, #44]	@ 0x2c
      parse_file_as_options = 1;
 802438a:	2301      	movs	r3, #1
 802438c:	633b      	str	r3, [r7, #48]	@ 0x30
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n"));
    } else {
      LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("invalid overload option: %d\n", (int)overload));
    }
  }
  if (parse_file_as_options) {
 802438e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8024390:	2b00      	cmp	r3, #0
 8024392:	d006      	beq.n	80243a2 <dhcp_parse_reply+0x586>
    /* if both are overloaded, parse file first and then sname (RFC 2131 ch. 4.1) */
    parse_file_as_options = 0;
 8024394:	2300      	movs	r3, #0
 8024396:	633b      	str	r3, [r7, #48]	@ 0x30
    options_idx = DHCP_FILE_OFS;
 8024398:	236c      	movs	r3, #108	@ 0x6c
 802439a:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_FILE_OFS + DHCP_FILE_LEN;
 802439c:	23ec      	movs	r3, #236	@ 0xec
 802439e:	877b      	strh	r3, [r7, #58]	@ 0x3a
#if LWIP_DHCP_BOOTP_FILE
    file_overloaded = 1;
#endif
    goto again;
 80243a0:	e559      	b.n	8023e56 <dhcp_parse_reply+0x3a>
  } else if (parse_sname_as_options) {
 80243a2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80243a4:	2b00      	cmp	r3, #0
 80243a6:	d006      	beq.n	80243b6 <dhcp_parse_reply+0x59a>
    parse_sname_as_options = 0;
 80243a8:	2300      	movs	r3, #0
 80243aa:	62fb      	str	r3, [r7, #44]	@ 0x2c
    options_idx = DHCP_SNAME_OFS;
 80243ac:	232c      	movs	r3, #44	@ 0x2c
 80243ae:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    options_idx_max = DHCP_SNAME_OFS + DHCP_SNAME_LEN;
 80243b0:	236c      	movs	r3, #108	@ 0x6c
 80243b2:	877b      	strh	r3, [r7, #58]	@ 0x3a
    goto again;
 80243b4:	e54f      	b.n	8023e56 <dhcp_parse_reply+0x3a>
    }
    /* make sure the string is really NULL-terminated */
    dhcp->boot_file_name[DHCP_FILE_LEN-1] = 0;
  }
#endif /* LWIP_DHCP_BOOTP_FILE */ 
  return ERR_OK;
 80243b6:	2300      	movs	r3, #0
}
 80243b8:	4618      	mov	r0, r3
 80243ba:	3748      	adds	r7, #72	@ 0x48
 80243bc:	46bd      	mov	sp, r7
 80243be:	bd80      	pop	{r7, pc}
 80243c0:	080310cc 	.word	0x080310cc
 80243c4:	08031354 	.word	0x08031354
 80243c8:	0803112c 	.word	0x0803112c
 80243cc:	08031398 	.word	0x08031398
 80243d0:	2402b02c 	.word	0x2402b02c
 80243d4:	080313ac 	.word	0x080313ac
 80243d8:	2402b00c 	.word	0x2402b00c
 80243dc:	080313c4 	.word	0x080313c4
 80243e0:	080313d8 	.word	0x080313d8

080243e4 <dhcp_recv>:
/**
 * If an incoming DHCP message is in response to us, then trigger the state machine
 */
static void
dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port)
{
 80243e4:	b580      	push	{r7, lr}
 80243e6:	b08a      	sub	sp, #40	@ 0x28
 80243e8:	af00      	add	r7, sp, #0
 80243ea:	60f8      	str	r0, [r7, #12]
 80243ec:	60b9      	str	r1, [r7, #8]
 80243ee:	607a      	str	r2, [r7, #4]
 80243f0:	603b      	str	r3, [r7, #0]
  struct netif *netif = ip_current_input_netif();
 80243f2:	4b5e      	ldr	r3, [pc, #376]	@ (802456c <dhcp_recv+0x188>)
 80243f4:	685b      	ldr	r3, [r3, #4]
 80243f6:	61fb      	str	r3, [r7, #28]
  struct dhcp *dhcp = netif_dhcp_data(netif);
 80243f8:	69fb      	ldr	r3, [r7, #28]
 80243fa:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 80243fc:	61bb      	str	r3, [r7, #24]
  struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload;
 80243fe:	687b      	ldr	r3, [r7, #4]
 8024400:	685b      	ldr	r3, [r3, #4]
 8024402:	617b      	str	r3, [r7, #20]
  struct dhcp_msg *msg_in;

  LWIP_UNUSED_ARG(arg);

  /* Caught DHCP message from netif that does not have DHCP enabled? -> not interested */
  if ((dhcp == NULL) || (dhcp->pcb_allocated == 0)) {
 8024404:	69bb      	ldr	r3, [r7, #24]
 8024406:	2b00      	cmp	r3, #0
 8024408:	f000 809a 	beq.w	8024540 <dhcp_recv+0x15c>
 802440c:	69bb      	ldr	r3, [r7, #24]
 802440e:	791b      	ldrb	r3, [r3, #4]
 8024410:	2b00      	cmp	r3, #0
 8024412:	f000 8095 	beq.w	8024540 <dhcp_recv+0x15c>
  /* prevent warnings about unused arguments */
  LWIP_UNUSED_ARG(pcb);
  LWIP_UNUSED_ARG(addr);
  LWIP_UNUSED_ARG(port);

  if (p->len < DHCP_MIN_REPLY_LEN) {
 8024416:	687b      	ldr	r3, [r7, #4]
 8024418:	895b      	ldrh	r3, [r3, #10]
 802441a:	2b2b      	cmp	r3, #43	@ 0x2b
 802441c:	f240 8092 	bls.w	8024544 <dhcp_recv+0x160>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message or pbuf too short\n"));
    goto free_pbuf_and_return;
  }

  if (reply_msg->op != DHCP_BOOTREPLY) {
 8024420:	697b      	ldr	r3, [r7, #20]
 8024422:	781b      	ldrb	r3, [r3, #0]
 8024424:	2b02      	cmp	r3, #2
 8024426:	f040 808f 	bne.w	8024548 <dhcp_recv+0x164>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op));
    goto free_pbuf_and_return;
  }
  /* iterate through hardware address and match against DHCP message */
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 802442a:	2300      	movs	r3, #0
 802442c:	74fb      	strb	r3, [r7, #19]
 802442e:	e00e      	b.n	802444e <dhcp_recv+0x6a>
    if (netif->hwaddr[i] != reply_msg->chaddr[i]) {
 8024430:	7cfb      	ldrb	r3, [r7, #19]
 8024432:	69fa      	ldr	r2, [r7, #28]
 8024434:	4413      	add	r3, r2
 8024436:	f893 202a 	ldrb.w	r2, [r3, #42]	@ 0x2a
 802443a:	7cfb      	ldrb	r3, [r7, #19]
 802443c:	6979      	ldr	r1, [r7, #20]
 802443e:	440b      	add	r3, r1
 8024440:	7f1b      	ldrb	r3, [r3, #28]
 8024442:	429a      	cmp	r2, r3
 8024444:	f040 8082 	bne.w	802454c <dhcp_recv+0x168>
  for (i = 0; i < netif->hwaddr_len && i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8024448:	7cfb      	ldrb	r3, [r7, #19]
 802444a:	3301      	adds	r3, #1
 802444c:	74fb      	strb	r3, [r7, #19]
 802444e:	69fb      	ldr	r3, [r7, #28]
 8024450:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8024454:	7cfa      	ldrb	r2, [r7, #19]
 8024456:	429a      	cmp	r2, r3
 8024458:	d202      	bcs.n	8024460 <dhcp_recv+0x7c>
 802445a:	7cfb      	ldrb	r3, [r7, #19]
 802445c:	2b05      	cmp	r3, #5
 802445e:	d9e7      	bls.n	8024430 <dhcp_recv+0x4c>
                   (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i]));
      goto free_pbuf_and_return;
    }
  }
  /* match transaction ID against what we expected */
  if (lwip_ntohl(reply_msg->xid) != dhcp->xid) {
 8024460:	697b      	ldr	r3, [r7, #20]
 8024462:	685b      	ldr	r3, [r3, #4]
 8024464:	4618      	mov	r0, r3
 8024466:	f7f5 fbb4 	bl	8019bd2 <lwip_htonl>
 802446a:	4602      	mov	r2, r0
 802446c:	69bb      	ldr	r3, [r7, #24]
 802446e:	681b      	ldr	r3, [r3, #0]
 8024470:	429a      	cmp	r2, r3
 8024472:	d16d      	bne.n	8024550 <dhcp_recv+0x16c>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n", lwip_ntohl(reply_msg->xid), dhcp->xid));
    goto free_pbuf_and_return;
  }
  /* option fields could be unfold? */
  if (dhcp_parse_reply(p, dhcp) != ERR_OK) {
 8024474:	69b9      	ldr	r1, [r7, #24]
 8024476:	6878      	ldr	r0, [r7, #4]
 8024478:	f7ff fcd0 	bl	8023e1c <dhcp_parse_reply>
 802447c:	4603      	mov	r3, r0
 802447e:	2b00      	cmp	r3, #0
 8024480:	d168      	bne.n	8024554 <dhcp_recv+0x170>
    goto free_pbuf_and_return;
  }

  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n"));
  /* obtain pointer to DHCP message type */
  if (!dhcp_option_given(dhcp, DHCP_OPTION_IDX_MSG_TYPE)) {
 8024482:	4b3b      	ldr	r3, [pc, #236]	@ (8024570 <dhcp_recv+0x18c>)
 8024484:	785b      	ldrb	r3, [r3, #1]
 8024486:	2b00      	cmp	r3, #0
 8024488:	d066      	beq.n	8024558 <dhcp_recv+0x174>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n"));
    goto free_pbuf_and_return;
  }

  msg_in = (struct dhcp_msg *)p->payload;
 802448a:	687b      	ldr	r3, [r7, #4]
 802448c:	685b      	ldr	r3, [r3, #4]
 802448e:	627b      	str	r3, [r7, #36]	@ 0x24
  /* read DHCP message type */
  msg_type = (u8_t)dhcp_get_option_value(dhcp, DHCP_OPTION_IDX_MSG_TYPE);
 8024490:	4b38      	ldr	r3, [pc, #224]	@ (8024574 <dhcp_recv+0x190>)
 8024492:	685b      	ldr	r3, [r3, #4]
 8024494:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  /* message type is DHCP ACK? */
  if (msg_type == DHCP_ACK) {
 8024498:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 802449c:	2b05      	cmp	r3, #5
 802449e:	d12a      	bne.n	80244f6 <dhcp_recv+0x112>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n"));
    /* in requesting state? */
    if (dhcp->state == DHCP_STATE_REQUESTING) {
 80244a0:	69bb      	ldr	r3, [r7, #24]
 80244a2:	795b      	ldrb	r3, [r3, #5]
 80244a4:	2b01      	cmp	r3, #1
 80244a6:	d112      	bne.n	80244ce <dhcp_recv+0xea>
      dhcp_handle_ack(netif, msg_in);
 80244a8:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 80244aa:	69f8      	ldr	r0, [r7, #28]
 80244ac:	f7fe fe00 	bl	80230b0 <dhcp_handle_ack>
#if DHCP_DOES_ARP_CHECK
      if ((netif->flags & NETIF_FLAG_ETHARP) != 0) {
 80244b0:	69fb      	ldr	r3, [r7, #28]
 80244b2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80244b6:	f003 0308 	and.w	r3, r3, #8
 80244ba:	2b00      	cmp	r3, #0
 80244bc:	d003      	beq.n	80244c6 <dhcp_recv+0xe2>
        /* check if the acknowledged lease address is already in use */
        dhcp_check(netif);
 80244be:	69f8      	ldr	r0, [r7, #28]
 80244c0:	f7fe fb6e 	bl	8022ba0 <dhcp_check>
 80244c4:	e04b      	b.n	802455e <dhcp_recv+0x17a>
      } else {
        /* bind interface to the acknowledged lease address */
        dhcp_bind(netif);
 80244c6:	69f8      	ldr	r0, [r7, #28]
 80244c8:	f7ff f852 	bl	8023570 <dhcp_bind>
 80244cc:	e047      	b.n	802455e <dhcp_recv+0x17a>
      /* bind interface to the acknowledged lease address */
      dhcp_bind(netif);
#endif
    }
    /* already bound to the given lease address? */
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 80244ce:	69bb      	ldr	r3, [r7, #24]
 80244d0:	795b      	ldrb	r3, [r3, #5]
 80244d2:	2b03      	cmp	r3, #3
 80244d4:	d007      	beq.n	80244e6 <dhcp_recv+0x102>
 80244d6:	69bb      	ldr	r3, [r7, #24]
 80244d8:	795b      	ldrb	r3, [r3, #5]
 80244da:	2b04      	cmp	r3, #4
 80244dc:	d003      	beq.n	80244e6 <dhcp_recv+0x102>
             (dhcp->state == DHCP_STATE_RENEWING)) {
 80244de:	69bb      	ldr	r3, [r7, #24]
 80244e0:	795b      	ldrb	r3, [r3, #5]
    else if ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REBINDING) ||
 80244e2:	2b05      	cmp	r3, #5
 80244e4:	d13b      	bne.n	802455e <dhcp_recv+0x17a>
      dhcp_handle_ack(netif, msg_in);
 80244e6:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 80244e8:	69f8      	ldr	r0, [r7, #28]
 80244ea:	f7fe fde1 	bl	80230b0 <dhcp_handle_ack>
      dhcp_bind(netif);
 80244ee:	69f8      	ldr	r0, [r7, #28]
 80244f0:	f7ff f83e 	bl	8023570 <dhcp_bind>
 80244f4:	e033      	b.n	802455e <dhcp_recv+0x17a>
    }
  }
  /* received a DHCP_NAK in appropriate state? */
  else if ((msg_type == DHCP_NAK) &&
 80244f6:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80244fa:	2b06      	cmp	r3, #6
 80244fc:	d113      	bne.n	8024526 <dhcp_recv+0x142>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 80244fe:	69bb      	ldr	r3, [r7, #24]
 8024500:	795b      	ldrb	r3, [r3, #5]
  else if ((msg_type == DHCP_NAK) &&
 8024502:	2b03      	cmp	r3, #3
 8024504:	d00b      	beq.n	802451e <dhcp_recv+0x13a>
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8024506:	69bb      	ldr	r3, [r7, #24]
 8024508:	795b      	ldrb	r3, [r3, #5]
 802450a:	2b01      	cmp	r3, #1
 802450c:	d007      	beq.n	802451e <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 802450e:	69bb      	ldr	r3, [r7, #24]
 8024510:	795b      	ldrb	r3, [r3, #5]
           ((dhcp->state == DHCP_STATE_REBOOTING) || (dhcp->state == DHCP_STATE_REQUESTING) ||
 8024512:	2b04      	cmp	r3, #4
 8024514:	d003      	beq.n	802451e <dhcp_recv+0x13a>
            (dhcp->state == DHCP_STATE_REBINDING) || (dhcp->state == DHCP_STATE_RENEWING  ))) {
 8024516:	69bb      	ldr	r3, [r7, #24]
 8024518:	795b      	ldrb	r3, [r3, #5]
 802451a:	2b05      	cmp	r3, #5
 802451c:	d103      	bne.n	8024526 <dhcp_recv+0x142>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n"));
    dhcp_handle_nak(netif);
 802451e:	69f8      	ldr	r0, [r7, #28]
 8024520:	f7fe fb24 	bl	8022b6c <dhcp_handle_nak>
 8024524:	e01b      	b.n	802455e <dhcp_recv+0x17a>
  }
  /* received a DHCP_OFFER in DHCP_STATE_SELECTING state? */
  else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_STATE_SELECTING)) {
 8024526:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 802452a:	2b02      	cmp	r3, #2
 802452c:	d116      	bne.n	802455c <dhcp_recv+0x178>
 802452e:	69bb      	ldr	r3, [r7, #24]
 8024530:	795b      	ldrb	r3, [r3, #5]
 8024532:	2b06      	cmp	r3, #6
 8024534:	d112      	bne.n	802455c <dhcp_recv+0x178>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_STATE_SELECTING state\n"));
    /* remember offered lease */
    dhcp_handle_offer(netif, msg_in);
 8024536:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8024538:	69f8      	ldr	r0, [r7, #28]
 802453a:	f7fe fb65 	bl	8022c08 <dhcp_handle_offer>
 802453e:	e00e      	b.n	802455e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024540:	bf00      	nop
 8024542:	e00c      	b.n	802455e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024544:	bf00      	nop
 8024546:	e00a      	b.n	802455e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024548:	bf00      	nop
 802454a:	e008      	b.n	802455e <dhcp_recv+0x17a>
      goto free_pbuf_and_return;
 802454c:	bf00      	nop
 802454e:	e006      	b.n	802455e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024550:	bf00      	nop
 8024552:	e004      	b.n	802455e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024554:	bf00      	nop
 8024556:	e002      	b.n	802455e <dhcp_recv+0x17a>
    goto free_pbuf_and_return;
 8024558:	bf00      	nop
 802455a:	e000      	b.n	802455e <dhcp_recv+0x17a>
  }

free_pbuf_and_return:
 802455c:	bf00      	nop
  pbuf_free(p);
 802455e:	6878      	ldr	r0, [r7, #4]
 8024560:	f7f7 f804 	bl	801b56c <pbuf_free>
}
 8024564:	bf00      	nop
 8024566:	3728      	adds	r7, #40	@ 0x28
 8024568:	46bd      	mov	sp, r7
 802456a:	bd80      	pop	{r7, pc}
 802456c:	24024458 	.word	0x24024458
 8024570:	2402b02c 	.word	0x2402b02c
 8024574:	2402b00c 	.word	0x2402b00c

08024578 <dhcp_create_msg>:
 * @param dhcp dhcp control struct
 * @param message_type message type of the request
 */
static struct pbuf *
dhcp_create_msg(struct netif *netif, struct dhcp *dhcp, u8_t message_type, u16_t *options_out_len)
{
 8024578:	b580      	push	{r7, lr}
 802457a:	b088      	sub	sp, #32
 802457c:	af00      	add	r7, sp, #0
 802457e:	60f8      	str	r0, [r7, #12]
 8024580:	60b9      	str	r1, [r7, #8]
 8024582:	603b      	str	r3, [r7, #0]
 8024584:	4613      	mov	r3, r2
 8024586:	71fb      	strb	r3, [r7, #7]
  if (!xid_initialised) {
    xid = DHCP_GLOBAL_XID;
    xid_initialised = !xid_initialised;
  }
#endif
  LWIP_ERROR("dhcp_create_msg: netif != NULL", (netif != NULL), return NULL;);
 8024588:	68fb      	ldr	r3, [r7, #12]
 802458a:	2b00      	cmp	r3, #0
 802458c:	d108      	bne.n	80245a0 <dhcp_create_msg+0x28>
 802458e:	4b5f      	ldr	r3, [pc, #380]	@ (802470c <dhcp_create_msg+0x194>)
 8024590:	f240 7269 	movw	r2, #1897	@ 0x769
 8024594:	495e      	ldr	r1, [pc, #376]	@ (8024710 <dhcp_create_msg+0x198>)
 8024596:	485f      	ldr	r0, [pc, #380]	@ (8024714 <dhcp_create_msg+0x19c>)
 8024598:	f006 fa60 	bl	802aa5c <iprintf>
 802459c:	2300      	movs	r3, #0
 802459e:	e0b1      	b.n	8024704 <dhcp_create_msg+0x18c>
  LWIP_ERROR("dhcp_create_msg: dhcp != NULL", (dhcp != NULL), return NULL;);
 80245a0:	68bb      	ldr	r3, [r7, #8]
 80245a2:	2b00      	cmp	r3, #0
 80245a4:	d108      	bne.n	80245b8 <dhcp_create_msg+0x40>
 80245a6:	4b59      	ldr	r3, [pc, #356]	@ (802470c <dhcp_create_msg+0x194>)
 80245a8:	f240 726a 	movw	r2, #1898	@ 0x76a
 80245ac:	495a      	ldr	r1, [pc, #360]	@ (8024718 <dhcp_create_msg+0x1a0>)
 80245ae:	4859      	ldr	r0, [pc, #356]	@ (8024714 <dhcp_create_msg+0x19c>)
 80245b0:	f006 fa54 	bl	802aa5c <iprintf>
 80245b4:	2300      	movs	r3, #0
 80245b6:	e0a5      	b.n	8024704 <dhcp_create_msg+0x18c>
  p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM);
 80245b8:	f44f 7220 	mov.w	r2, #640	@ 0x280
 80245bc:	f44f 719a 	mov.w	r1, #308	@ 0x134
 80245c0:	2036      	movs	r0, #54	@ 0x36
 80245c2:	f7f6 fcbd 	bl	801af40 <pbuf_alloc>
 80245c6:	61b8      	str	r0, [r7, #24]
  if (p_out == NULL) {
 80245c8:	69bb      	ldr	r3, [r7, #24]
 80245ca:	2b00      	cmp	r3, #0
 80245cc:	d101      	bne.n	80245d2 <dhcp_create_msg+0x5a>
    LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("dhcp_create_msg(): could not allocate pbuf\n"));
    return NULL;
 80245ce:	2300      	movs	r3, #0
 80245d0:	e098      	b.n	8024704 <dhcp_create_msg+0x18c>
  }
  LWIP_ASSERT("dhcp_create_msg: check that first pbuf can hold struct dhcp_msg",
 80245d2:	69bb      	ldr	r3, [r7, #24]
 80245d4:	895b      	ldrh	r3, [r3, #10]
 80245d6:	f5b3 7f9a 	cmp.w	r3, #308	@ 0x134
 80245da:	d206      	bcs.n	80245ea <dhcp_create_msg+0x72>
 80245dc:	4b4b      	ldr	r3, [pc, #300]	@ (802470c <dhcp_create_msg+0x194>)
 80245de:	f240 7271 	movw	r2, #1905	@ 0x771
 80245e2:	494e      	ldr	r1, [pc, #312]	@ (802471c <dhcp_create_msg+0x1a4>)
 80245e4:	484b      	ldr	r0, [pc, #300]	@ (8024714 <dhcp_create_msg+0x19c>)
 80245e6:	f006 fa39 	bl	802aa5c <iprintf>
              (p_out->len >= sizeof(struct dhcp_msg)));

  /* DHCP_REQUEST should reuse 'xid' from DHCPOFFER */
  if ((message_type != DHCP_REQUEST) || (dhcp->state == DHCP_STATE_REBOOTING)) {
 80245ea:	79fb      	ldrb	r3, [r7, #7]
 80245ec:	2b03      	cmp	r3, #3
 80245ee:	d103      	bne.n	80245f8 <dhcp_create_msg+0x80>
 80245f0:	68bb      	ldr	r3, [r7, #8]
 80245f2:	795b      	ldrb	r3, [r3, #5]
 80245f4:	2b03      	cmp	r3, #3
 80245f6:	d10d      	bne.n	8024614 <dhcp_create_msg+0x9c>
    /* reuse transaction identifier in retransmissions */
    if (dhcp->tries == 0) {
 80245f8:	68bb      	ldr	r3, [r7, #8]
 80245fa:	799b      	ldrb	r3, [r3, #6]
 80245fc:	2b00      	cmp	r3, #0
 80245fe:	d105      	bne.n	802460c <dhcp_create_msg+0x94>
#if DHCP_CREATE_RAND_XID && defined(LWIP_RAND)
      xid = LWIP_RAND();
 8024600:	f004 ff02 	bl	8029408 <rand>
 8024604:	4603      	mov	r3, r0
 8024606:	461a      	mov	r2, r3
 8024608:	4b45      	ldr	r3, [pc, #276]	@ (8024720 <dhcp_create_msg+0x1a8>)
 802460a:	601a      	str	r2, [r3, #0]
#else /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
      xid++;
#endif /* DHCP_CREATE_RAND_XID && defined(LWIP_RAND) */
    }
    dhcp->xid = xid;
 802460c:	4b44      	ldr	r3, [pc, #272]	@ (8024720 <dhcp_create_msg+0x1a8>)
 802460e:	681a      	ldr	r2, [r3, #0]
 8024610:	68bb      	ldr	r3, [r7, #8]
 8024612:	601a      	str	r2, [r3, #0]
  }
  LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE,
              ("transaction id xid(%"X32_F")\n", xid));

  msg_out = (struct dhcp_msg *)p_out->payload;
 8024614:	69bb      	ldr	r3, [r7, #24]
 8024616:	685b      	ldr	r3, [r3, #4]
 8024618:	617b      	str	r3, [r7, #20]
  memset(msg_out, 0, sizeof(struct dhcp_msg));
 802461a:	f44f 729a 	mov.w	r2, #308	@ 0x134
 802461e:	2100      	movs	r1, #0
 8024620:	6978      	ldr	r0, [r7, #20]
 8024622:	f006 fbad 	bl	802ad80 <memset>

  msg_out->op = DHCP_BOOTREQUEST;
 8024626:	697b      	ldr	r3, [r7, #20]
 8024628:	2201      	movs	r2, #1
 802462a:	701a      	strb	r2, [r3, #0]
  /* @todo: make link layer independent */
  msg_out->htype = LWIP_IANA_HWTYPE_ETHERNET;
 802462c:	697b      	ldr	r3, [r7, #20]
 802462e:	2201      	movs	r2, #1
 8024630:	705a      	strb	r2, [r3, #1]
  msg_out->hlen = netif->hwaddr_len;
 8024632:	68fb      	ldr	r3, [r7, #12]
 8024634:	f893 2030 	ldrb.w	r2, [r3, #48]	@ 0x30
 8024638:	697b      	ldr	r3, [r7, #20]
 802463a:	709a      	strb	r2, [r3, #2]
  msg_out->xid = lwip_htonl(dhcp->xid);
 802463c:	68bb      	ldr	r3, [r7, #8]
 802463e:	681b      	ldr	r3, [r3, #0]
 8024640:	4618      	mov	r0, r3
 8024642:	f7f5 fac6 	bl	8019bd2 <lwip_htonl>
 8024646:	4602      	mov	r2, r0
 8024648:	697b      	ldr	r3, [r7, #20]
 802464a:	605a      	str	r2, [r3, #4]
  /* we don't need the broadcast flag since we can receive unicast traffic
     before being fully configured! */
  /* set ciaddr to netif->ip_addr based on message_type and state */
  if ((message_type == DHCP_INFORM) || (message_type == DHCP_DECLINE) || (message_type == DHCP_RELEASE) ||
 802464c:	79fb      	ldrb	r3, [r7, #7]
 802464e:	2b08      	cmp	r3, #8
 8024650:	d010      	beq.n	8024674 <dhcp_create_msg+0xfc>
 8024652:	79fb      	ldrb	r3, [r7, #7]
 8024654:	2b04      	cmp	r3, #4
 8024656:	d00d      	beq.n	8024674 <dhcp_create_msg+0xfc>
 8024658:	79fb      	ldrb	r3, [r7, #7]
 802465a:	2b07      	cmp	r3, #7
 802465c:	d00a      	beq.n	8024674 <dhcp_create_msg+0xfc>
 802465e:	79fb      	ldrb	r3, [r7, #7]
 8024660:	2b03      	cmp	r3, #3
 8024662:	d10c      	bne.n	802467e <dhcp_create_msg+0x106>
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 8024664:	68bb      	ldr	r3, [r7, #8]
 8024666:	795b      	ldrb	r3, [r3, #5]
      ((message_type == DHCP_REQUEST) && /* DHCP_STATE_BOUND not used for sending! */
 8024668:	2b05      	cmp	r3, #5
 802466a:	d003      	beq.n	8024674 <dhcp_create_msg+0xfc>
       ((dhcp->state == DHCP_STATE_RENEWING) || dhcp->state == DHCP_STATE_REBINDING))) {
 802466c:	68bb      	ldr	r3, [r7, #8]
 802466e:	795b      	ldrb	r3, [r3, #5]
 8024670:	2b04      	cmp	r3, #4
 8024672:	d104      	bne.n	802467e <dhcp_create_msg+0x106>
    ip4_addr_copy(msg_out->ciaddr, *netif_ip4_addr(netif));
 8024674:	68fb      	ldr	r3, [r7, #12]
 8024676:	3304      	adds	r3, #4
 8024678:	681a      	ldr	r2, [r3, #0]
 802467a:	697b      	ldr	r3, [r7, #20]
 802467c:	60da      	str	r2, [r3, #12]
  }
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 802467e:	2300      	movs	r3, #0
 8024680:	83fb      	strh	r3, [r7, #30]
 8024682:	e00c      	b.n	802469e <dhcp_create_msg+0x126>
    /* copy netif hardware address (padded with zeroes through memset already) */
    msg_out->chaddr[i] = netif->hwaddr[i];
 8024684:	8bfa      	ldrh	r2, [r7, #30]
 8024686:	8bfb      	ldrh	r3, [r7, #30]
 8024688:	68f9      	ldr	r1, [r7, #12]
 802468a:	440a      	add	r2, r1
 802468c:	f892 102a 	ldrb.w	r1, [r2, #42]	@ 0x2a
 8024690:	697a      	ldr	r2, [r7, #20]
 8024692:	4413      	add	r3, r2
 8024694:	460a      	mov	r2, r1
 8024696:	771a      	strb	r2, [r3, #28]
  for (i = 0; i < LWIP_MIN(DHCP_CHADDR_LEN, NETIF_MAX_HWADDR_LEN); i++) {
 8024698:	8bfb      	ldrh	r3, [r7, #30]
 802469a:	3301      	adds	r3, #1
 802469c:	83fb      	strh	r3, [r7, #30]
 802469e:	8bfb      	ldrh	r3, [r7, #30]
 80246a0:	2b05      	cmp	r3, #5
 80246a2:	d9ef      	bls.n	8024684 <dhcp_create_msg+0x10c>
  }
  msg_out->cookie = PP_HTONL(DHCP_MAGIC_COOKIE);
 80246a4:	697b      	ldr	r3, [r7, #20]
 80246a6:	2200      	movs	r2, #0
 80246a8:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 80246ac:	f883 20ec 	strb.w	r2, [r3, #236]	@ 0xec
 80246b0:	2200      	movs	r2, #0
 80246b2:	f062 027d 	orn	r2, r2, #125	@ 0x7d
 80246b6:	f883 20ed 	strb.w	r2, [r3, #237]	@ 0xed
 80246ba:	2200      	movs	r2, #0
 80246bc:	f042 0253 	orr.w	r2, r2, #83	@ 0x53
 80246c0:	f883 20ee 	strb.w	r2, [r3, #238]	@ 0xee
 80246c4:	2200      	movs	r2, #0
 80246c6:	f042 0263 	orr.w	r2, r2, #99	@ 0x63
 80246ca:	f883 20ef 	strb.w	r2, [r3, #239]	@ 0xef
  /* Add option MESSAGE_TYPE */
  options_out_len_loc = dhcp_option(0, msg_out->options, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN);
 80246ce:	697b      	ldr	r3, [r7, #20]
 80246d0:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80246d4:	2301      	movs	r3, #1
 80246d6:	2235      	movs	r2, #53	@ 0x35
 80246d8:	2000      	movs	r0, #0
 80246da:	f7ff facf 	bl	8023c7c <dhcp_option>
 80246de:	4603      	mov	r3, r0
 80246e0:	827b      	strh	r3, [r7, #18]
  options_out_len_loc = dhcp_option_byte(options_out_len_loc, msg_out->options, message_type);
 80246e2:	697b      	ldr	r3, [r7, #20]
 80246e4:	f103 01f0 	add.w	r1, r3, #240	@ 0xf0
 80246e8:	79fa      	ldrb	r2, [r7, #7]
 80246ea:	8a7b      	ldrh	r3, [r7, #18]
 80246ec:	4618      	mov	r0, r3
 80246ee:	f7ff faf9 	bl	8023ce4 <dhcp_option_byte>
 80246f2:	4603      	mov	r3, r0
 80246f4:	827b      	strh	r3, [r7, #18]
  if (options_out_len) {
 80246f6:	683b      	ldr	r3, [r7, #0]
 80246f8:	2b00      	cmp	r3, #0
 80246fa:	d002      	beq.n	8024702 <dhcp_create_msg+0x18a>
    *options_out_len = options_out_len_loc;
 80246fc:	683b      	ldr	r3, [r7, #0]
 80246fe:	8a7a      	ldrh	r2, [r7, #18]
 8024700:	801a      	strh	r2, [r3, #0]
  }
  return p_out;
 8024702:	69bb      	ldr	r3, [r7, #24]
}
 8024704:	4618      	mov	r0, r3
 8024706:	3720      	adds	r7, #32
 8024708:	46bd      	mov	sp, r7
 802470a:	bd80      	pop	{r7, pc}
 802470c:	080310cc 	.word	0x080310cc
 8024710:	080313ec 	.word	0x080313ec
 8024714:	0803112c 	.word	0x0803112c
 8024718:	0803140c 	.word	0x0803140c
 802471c:	0803142c 	.word	0x0803142c
 8024720:	2402b03c 	.word	0x2402b03c

08024724 <dhcp_option_trailer>:
 * Adds the END option to the DHCP message, and if
 * necessary, up to three padding bytes.
 */
static void
dhcp_option_trailer(u16_t options_out_len, u8_t *options, struct pbuf *p_out)
{
 8024724:	b580      	push	{r7, lr}
 8024726:	b084      	sub	sp, #16
 8024728:	af00      	add	r7, sp, #0
 802472a:	4603      	mov	r3, r0
 802472c:	60b9      	str	r1, [r7, #8]
 802472e:	607a      	str	r2, [r7, #4]
 8024730:	81fb      	strh	r3, [r7, #14]
  options[options_out_len++] = DHCP_OPTION_END;
 8024732:	89fb      	ldrh	r3, [r7, #14]
 8024734:	1c5a      	adds	r2, r3, #1
 8024736:	81fa      	strh	r2, [r7, #14]
 8024738:	461a      	mov	r2, r3
 802473a:	68bb      	ldr	r3, [r7, #8]
 802473c:	4413      	add	r3, r2
 802473e:	22ff      	movs	r2, #255	@ 0xff
 8024740:	701a      	strb	r2, [r3, #0]
  /* packet is too small, or not 4 byte aligned? */
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 8024742:	e007      	b.n	8024754 <dhcp_option_trailer+0x30>
         (options_out_len < DHCP_OPTIONS_LEN)) {
    /* add a fill/padding byte */
    options[options_out_len++] = 0;
 8024744:	89fb      	ldrh	r3, [r7, #14]
 8024746:	1c5a      	adds	r2, r3, #1
 8024748:	81fa      	strh	r2, [r7, #14]
 802474a:	461a      	mov	r2, r3
 802474c:	68bb      	ldr	r3, [r7, #8]
 802474e:	4413      	add	r3, r2
 8024750:	2200      	movs	r2, #0
 8024752:	701a      	strb	r2, [r3, #0]
  while (((options_out_len < DHCP_MIN_OPTIONS_LEN) || (options_out_len & 3)) &&
 8024754:	89fb      	ldrh	r3, [r7, #14]
 8024756:	2b43      	cmp	r3, #67	@ 0x43
 8024758:	d904      	bls.n	8024764 <dhcp_option_trailer+0x40>
 802475a:	89fb      	ldrh	r3, [r7, #14]
 802475c:	f003 0303 	and.w	r3, r3, #3
 8024760:	2b00      	cmp	r3, #0
 8024762:	d002      	beq.n	802476a <dhcp_option_trailer+0x46>
 8024764:	89fb      	ldrh	r3, [r7, #14]
 8024766:	2b43      	cmp	r3, #67	@ 0x43
 8024768:	d9ec      	bls.n	8024744 <dhcp_option_trailer+0x20>
  }
  /* shrink the pbuf to the actual content length */
  pbuf_realloc(p_out, (u16_t)(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + options_out_len));
 802476a:	89fb      	ldrh	r3, [r7, #14]
 802476c:	33f0      	adds	r3, #240	@ 0xf0
 802476e:	b29b      	uxth	r3, r3
 8024770:	4619      	mov	r1, r3
 8024772:	6878      	ldr	r0, [r7, #4]
 8024774:	f7f6 fd44 	bl	801b200 <pbuf_realloc>
}
 8024778:	bf00      	nop
 802477a:	3710      	adds	r7, #16
 802477c:	46bd      	mov	sp, r7
 802477e:	bd80      	pop	{r7, pc}

08024780 <dhcp_supplied_address>:
 * @return 1 if DHCP supplied netif->ip_addr (states BOUND or RENEWING),
 *         0 otherwise
 */
u8_t
dhcp_supplied_address(const struct netif *netif)
{
 8024780:	b480      	push	{r7}
 8024782:	b085      	sub	sp, #20
 8024784:	af00      	add	r7, sp, #0
 8024786:	6078      	str	r0, [r7, #4]
  if ((netif != NULL) && (netif_dhcp_data(netif) != NULL)) {
 8024788:	687b      	ldr	r3, [r7, #4]
 802478a:	2b00      	cmp	r3, #0
 802478c:	d017      	beq.n	80247be <dhcp_supplied_address+0x3e>
 802478e:	687b      	ldr	r3, [r7, #4]
 8024790:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8024792:	2b00      	cmp	r3, #0
 8024794:	d013      	beq.n	80247be <dhcp_supplied_address+0x3e>
    struct dhcp *dhcp = netif_dhcp_data(netif);
 8024796:	687b      	ldr	r3, [r7, #4]
 8024798:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 802479a:	60fb      	str	r3, [r7, #12]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 802479c:	68fb      	ldr	r3, [r7, #12]
 802479e:	795b      	ldrb	r3, [r3, #5]
 80247a0:	2b0a      	cmp	r3, #10
 80247a2:	d007      	beq.n	80247b4 <dhcp_supplied_address+0x34>
 80247a4:	68fb      	ldr	r3, [r7, #12]
 80247a6:	795b      	ldrb	r3, [r3, #5]
 80247a8:	2b05      	cmp	r3, #5
 80247aa:	d003      	beq.n	80247b4 <dhcp_supplied_address+0x34>
           (dhcp->state == DHCP_STATE_REBINDING);
 80247ac:	68fb      	ldr	r3, [r7, #12]
 80247ae:	795b      	ldrb	r3, [r3, #5]
    return (dhcp->state == DHCP_STATE_BOUND) || (dhcp->state == DHCP_STATE_RENEWING) ||
 80247b0:	2b04      	cmp	r3, #4
 80247b2:	d101      	bne.n	80247b8 <dhcp_supplied_address+0x38>
 80247b4:	2301      	movs	r3, #1
 80247b6:	e000      	b.n	80247ba <dhcp_supplied_address+0x3a>
 80247b8:	2300      	movs	r3, #0
 80247ba:	b2db      	uxtb	r3, r3
 80247bc:	e000      	b.n	80247c0 <dhcp_supplied_address+0x40>
  }
  return 0;
 80247be:	2300      	movs	r3, #0
}
 80247c0:	4618      	mov	r0, r3
 80247c2:	3714      	adds	r7, #20
 80247c4:	46bd      	mov	sp, r7
 80247c6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80247ca:	4770      	bx	lr

080247cc <etharp_free_entry>:
#endif /* ARP_QUEUEING */

/** Clean up ARP table entries */
static void
etharp_free_entry(int i)
{
 80247cc:	b580      	push	{r7, lr}
 80247ce:	b082      	sub	sp, #8
 80247d0:	af00      	add	r7, sp, #0
 80247d2:	6078      	str	r0, [r7, #4]
  /* remove from SNMP ARP index tree */
  mib2_remove_arp_entry(arp_table[i].netif, &arp_table[i].ipaddr);
  /* and empty packet queue */
  if (arp_table[i].q != NULL) {
 80247d4:	492b      	ldr	r1, [pc, #172]	@ (8024884 <etharp_free_entry+0xb8>)
 80247d6:	687a      	ldr	r2, [r7, #4]
 80247d8:	4613      	mov	r3, r2
 80247da:	005b      	lsls	r3, r3, #1
 80247dc:	4413      	add	r3, r2
 80247de:	00db      	lsls	r3, r3, #3
 80247e0:	440b      	add	r3, r1
 80247e2:	681b      	ldr	r3, [r3, #0]
 80247e4:	2b00      	cmp	r3, #0
 80247e6:	d013      	beq.n	8024810 <etharp_free_entry+0x44>
    /* remove all queued packets */
    LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_free_entry: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q)));
    free_etharp_q(arp_table[i].q);
 80247e8:	4926      	ldr	r1, [pc, #152]	@ (8024884 <etharp_free_entry+0xb8>)
 80247ea:	687a      	ldr	r2, [r7, #4]
 80247ec:	4613      	mov	r3, r2
 80247ee:	005b      	lsls	r3, r3, #1
 80247f0:	4413      	add	r3, r2
 80247f2:	00db      	lsls	r3, r3, #3
 80247f4:	440b      	add	r3, r1
 80247f6:	681b      	ldr	r3, [r3, #0]
 80247f8:	4618      	mov	r0, r3
 80247fa:	f7f6 feb7 	bl	801b56c <pbuf_free>
    arp_table[i].q = NULL;
 80247fe:	4921      	ldr	r1, [pc, #132]	@ (8024884 <etharp_free_entry+0xb8>)
 8024800:	687a      	ldr	r2, [r7, #4]
 8024802:	4613      	mov	r3, r2
 8024804:	005b      	lsls	r3, r3, #1
 8024806:	4413      	add	r3, r2
 8024808:	00db      	lsls	r3, r3, #3
 802480a:	440b      	add	r3, r1
 802480c:	2200      	movs	r2, #0
 802480e:	601a      	str	r2, [r3, #0]
  }
  /* recycle entry for re-use */
  arp_table[i].state = ETHARP_STATE_EMPTY;
 8024810:	491c      	ldr	r1, [pc, #112]	@ (8024884 <etharp_free_entry+0xb8>)
 8024812:	687a      	ldr	r2, [r7, #4]
 8024814:	4613      	mov	r3, r2
 8024816:	005b      	lsls	r3, r3, #1
 8024818:	4413      	add	r3, r2
 802481a:	00db      	lsls	r3, r3, #3
 802481c:	440b      	add	r3, r1
 802481e:	3314      	adds	r3, #20
 8024820:	2200      	movs	r2, #0
 8024822:	701a      	strb	r2, [r3, #0]
#ifdef LWIP_DEBUG
  /* for debugging, clean out the complete entry */
  arp_table[i].ctime = 0;
 8024824:	4917      	ldr	r1, [pc, #92]	@ (8024884 <etharp_free_entry+0xb8>)
 8024826:	687a      	ldr	r2, [r7, #4]
 8024828:	4613      	mov	r3, r2
 802482a:	005b      	lsls	r3, r3, #1
 802482c:	4413      	add	r3, r2
 802482e:	00db      	lsls	r3, r3, #3
 8024830:	440b      	add	r3, r1
 8024832:	3312      	adds	r3, #18
 8024834:	2200      	movs	r2, #0
 8024836:	801a      	strh	r2, [r3, #0]
  arp_table[i].netif = NULL;
 8024838:	4912      	ldr	r1, [pc, #72]	@ (8024884 <etharp_free_entry+0xb8>)
 802483a:	687a      	ldr	r2, [r7, #4]
 802483c:	4613      	mov	r3, r2
 802483e:	005b      	lsls	r3, r3, #1
 8024840:	4413      	add	r3, r2
 8024842:	00db      	lsls	r3, r3, #3
 8024844:	440b      	add	r3, r1
 8024846:	3308      	adds	r3, #8
 8024848:	2200      	movs	r2, #0
 802484a:	601a      	str	r2, [r3, #0]
  ip4_addr_set_zero(&arp_table[i].ipaddr);
 802484c:	490d      	ldr	r1, [pc, #52]	@ (8024884 <etharp_free_entry+0xb8>)
 802484e:	687a      	ldr	r2, [r7, #4]
 8024850:	4613      	mov	r3, r2
 8024852:	005b      	lsls	r3, r3, #1
 8024854:	4413      	add	r3, r2
 8024856:	00db      	lsls	r3, r3, #3
 8024858:	440b      	add	r3, r1
 802485a:	3304      	adds	r3, #4
 802485c:	2200      	movs	r2, #0
 802485e:	601a      	str	r2, [r3, #0]
  arp_table[i].ethaddr = ethzero;
 8024860:	4908      	ldr	r1, [pc, #32]	@ (8024884 <etharp_free_entry+0xb8>)
 8024862:	687a      	ldr	r2, [r7, #4]
 8024864:	4613      	mov	r3, r2
 8024866:	005b      	lsls	r3, r3, #1
 8024868:	4413      	add	r3, r2
 802486a:	00db      	lsls	r3, r3, #3
 802486c:	440b      	add	r3, r1
 802486e:	3308      	adds	r3, #8
 8024870:	4a05      	ldr	r2, [pc, #20]	@ (8024888 <etharp_free_entry+0xbc>)
 8024872:	3304      	adds	r3, #4
 8024874:	6810      	ldr	r0, [r2, #0]
 8024876:	6018      	str	r0, [r3, #0]
 8024878:	8892      	ldrh	r2, [r2, #4]
 802487a:	809a      	strh	r2, [r3, #4]
#endif /* LWIP_DEBUG */
}
 802487c:	bf00      	nop
 802487e:	3708      	adds	r7, #8
 8024880:	46bd      	mov	sp, r7
 8024882:	bd80      	pop	{r7, pc}
 8024884:	2402b040 	.word	0x2402b040
 8024888:	08031f08 	.word	0x08031f08

0802488c <etharp_tmr>:
 * This function should be called every ARP_TMR_INTERVAL milliseconds (1 second),
 * in order to expire entries in the ARP table.
 */
void
etharp_tmr(void)
{
 802488c:	b580      	push	{r7, lr}
 802488e:	b082      	sub	sp, #8
 8024890:	af00      	add	r7, sp, #0
  int i;

  LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n"));
  /* remove expired entries from the ARP table */
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024892:	2300      	movs	r3, #0
 8024894:	607b      	str	r3, [r7, #4]
 8024896:	e096      	b.n	80249c6 <etharp_tmr+0x13a>
    u8_t state = arp_table[i].state;
 8024898:	494f      	ldr	r1, [pc, #316]	@ (80249d8 <etharp_tmr+0x14c>)
 802489a:	687a      	ldr	r2, [r7, #4]
 802489c:	4613      	mov	r3, r2
 802489e:	005b      	lsls	r3, r3, #1
 80248a0:	4413      	add	r3, r2
 80248a2:	00db      	lsls	r3, r3, #3
 80248a4:	440b      	add	r3, r1
 80248a6:	3314      	adds	r3, #20
 80248a8:	781b      	ldrb	r3, [r3, #0]
 80248aa:	70fb      	strb	r3, [r7, #3]
    if (state != ETHARP_STATE_EMPTY
 80248ac:	78fb      	ldrb	r3, [r7, #3]
 80248ae:	2b00      	cmp	r3, #0
 80248b0:	f000 8086 	beq.w	80249c0 <etharp_tmr+0x134>
#if ETHARP_SUPPORT_STATIC_ENTRIES
        && (state != ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
       ) {
      arp_table[i].ctime++;
 80248b4:	4948      	ldr	r1, [pc, #288]	@ (80249d8 <etharp_tmr+0x14c>)
 80248b6:	687a      	ldr	r2, [r7, #4]
 80248b8:	4613      	mov	r3, r2
 80248ba:	005b      	lsls	r3, r3, #1
 80248bc:	4413      	add	r3, r2
 80248be:	00db      	lsls	r3, r3, #3
 80248c0:	440b      	add	r3, r1
 80248c2:	3312      	adds	r3, #18
 80248c4:	881b      	ldrh	r3, [r3, #0]
 80248c6:	3301      	adds	r3, #1
 80248c8:	b298      	uxth	r0, r3
 80248ca:	4943      	ldr	r1, [pc, #268]	@ (80249d8 <etharp_tmr+0x14c>)
 80248cc:	687a      	ldr	r2, [r7, #4]
 80248ce:	4613      	mov	r3, r2
 80248d0:	005b      	lsls	r3, r3, #1
 80248d2:	4413      	add	r3, r2
 80248d4:	00db      	lsls	r3, r3, #3
 80248d6:	440b      	add	r3, r1
 80248d8:	3312      	adds	r3, #18
 80248da:	4602      	mov	r2, r0
 80248dc:	801a      	strh	r2, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 80248de:	493e      	ldr	r1, [pc, #248]	@ (80249d8 <etharp_tmr+0x14c>)
 80248e0:	687a      	ldr	r2, [r7, #4]
 80248e2:	4613      	mov	r3, r2
 80248e4:	005b      	lsls	r3, r3, #1
 80248e6:	4413      	add	r3, r2
 80248e8:	00db      	lsls	r3, r3, #3
 80248ea:	440b      	add	r3, r1
 80248ec:	3312      	adds	r3, #18
 80248ee:	881b      	ldrh	r3, [r3, #0]
 80248f0:	f5b3 7f96 	cmp.w	r3, #300	@ 0x12c
 80248f4:	d215      	bcs.n	8024922 <etharp_tmr+0x96>
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 80248f6:	4938      	ldr	r1, [pc, #224]	@ (80249d8 <etharp_tmr+0x14c>)
 80248f8:	687a      	ldr	r2, [r7, #4]
 80248fa:	4613      	mov	r3, r2
 80248fc:	005b      	lsls	r3, r3, #1
 80248fe:	4413      	add	r3, r2
 8024900:	00db      	lsls	r3, r3, #3
 8024902:	440b      	add	r3, r1
 8024904:	3314      	adds	r3, #20
 8024906:	781b      	ldrb	r3, [r3, #0]
      if ((arp_table[i].ctime >= ARP_MAXAGE) ||
 8024908:	2b01      	cmp	r3, #1
 802490a:	d10e      	bne.n	802492a <etharp_tmr+0x9e>
           (arp_table[i].ctime >= ARP_MAXPENDING))) {
 802490c:	4932      	ldr	r1, [pc, #200]	@ (80249d8 <etharp_tmr+0x14c>)
 802490e:	687a      	ldr	r2, [r7, #4]
 8024910:	4613      	mov	r3, r2
 8024912:	005b      	lsls	r3, r3, #1
 8024914:	4413      	add	r3, r2
 8024916:	00db      	lsls	r3, r3, #3
 8024918:	440b      	add	r3, r1
 802491a:	3312      	adds	r3, #18
 802491c:	881b      	ldrh	r3, [r3, #0]
          ((arp_table[i].state == ETHARP_STATE_PENDING)  &&
 802491e:	2b04      	cmp	r3, #4
 8024920:	d903      	bls.n	802492a <etharp_tmr+0x9e>
        /* pending or stable entry has become old! */
        LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %d.\n",
                                   arp_table[i].state >= ETHARP_STATE_STABLE ? "stable" : "pending", i));
        /* clean up entries that have just been expired */
        etharp_free_entry(i);
 8024922:	6878      	ldr	r0, [r7, #4]
 8024924:	f7ff ff52 	bl	80247cc <etharp_free_entry>
 8024928:	e04a      	b.n	80249c0 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_1) {
 802492a:	492b      	ldr	r1, [pc, #172]	@ (80249d8 <etharp_tmr+0x14c>)
 802492c:	687a      	ldr	r2, [r7, #4]
 802492e:	4613      	mov	r3, r2
 8024930:	005b      	lsls	r3, r3, #1
 8024932:	4413      	add	r3, r2
 8024934:	00db      	lsls	r3, r3, #3
 8024936:	440b      	add	r3, r1
 8024938:	3314      	adds	r3, #20
 802493a:	781b      	ldrb	r3, [r3, #0]
 802493c:	2b03      	cmp	r3, #3
 802493e:	d10a      	bne.n	8024956 <etharp_tmr+0xca>
        /* Don't send more than one request every 2 seconds. */
        arp_table[i].state = ETHARP_STATE_STABLE_REREQUESTING_2;
 8024940:	4925      	ldr	r1, [pc, #148]	@ (80249d8 <etharp_tmr+0x14c>)
 8024942:	687a      	ldr	r2, [r7, #4]
 8024944:	4613      	mov	r3, r2
 8024946:	005b      	lsls	r3, r3, #1
 8024948:	4413      	add	r3, r2
 802494a:	00db      	lsls	r3, r3, #3
 802494c:	440b      	add	r3, r1
 802494e:	3314      	adds	r3, #20
 8024950:	2204      	movs	r2, #4
 8024952:	701a      	strb	r2, [r3, #0]
 8024954:	e034      	b.n	80249c0 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_STABLE_REREQUESTING_2) {
 8024956:	4920      	ldr	r1, [pc, #128]	@ (80249d8 <etharp_tmr+0x14c>)
 8024958:	687a      	ldr	r2, [r7, #4]
 802495a:	4613      	mov	r3, r2
 802495c:	005b      	lsls	r3, r3, #1
 802495e:	4413      	add	r3, r2
 8024960:	00db      	lsls	r3, r3, #3
 8024962:	440b      	add	r3, r1
 8024964:	3314      	adds	r3, #20
 8024966:	781b      	ldrb	r3, [r3, #0]
 8024968:	2b04      	cmp	r3, #4
 802496a:	d10a      	bne.n	8024982 <etharp_tmr+0xf6>
        /* Reset state to stable, so that the next transmitted packet will
           re-send an ARP request. */
        arp_table[i].state = ETHARP_STATE_STABLE;
 802496c:	491a      	ldr	r1, [pc, #104]	@ (80249d8 <etharp_tmr+0x14c>)
 802496e:	687a      	ldr	r2, [r7, #4]
 8024970:	4613      	mov	r3, r2
 8024972:	005b      	lsls	r3, r3, #1
 8024974:	4413      	add	r3, r2
 8024976:	00db      	lsls	r3, r3, #3
 8024978:	440b      	add	r3, r1
 802497a:	3314      	adds	r3, #20
 802497c:	2202      	movs	r2, #2
 802497e:	701a      	strb	r2, [r3, #0]
 8024980:	e01e      	b.n	80249c0 <etharp_tmr+0x134>
      } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 8024982:	4915      	ldr	r1, [pc, #84]	@ (80249d8 <etharp_tmr+0x14c>)
 8024984:	687a      	ldr	r2, [r7, #4]
 8024986:	4613      	mov	r3, r2
 8024988:	005b      	lsls	r3, r3, #1
 802498a:	4413      	add	r3, r2
 802498c:	00db      	lsls	r3, r3, #3
 802498e:	440b      	add	r3, r1
 8024990:	3314      	adds	r3, #20
 8024992:	781b      	ldrb	r3, [r3, #0]
 8024994:	2b01      	cmp	r3, #1
 8024996:	d113      	bne.n	80249c0 <etharp_tmr+0x134>
        /* still pending, resend an ARP query */
        etharp_request(arp_table[i].netif, &arp_table[i].ipaddr);
 8024998:	490f      	ldr	r1, [pc, #60]	@ (80249d8 <etharp_tmr+0x14c>)
 802499a:	687a      	ldr	r2, [r7, #4]
 802499c:	4613      	mov	r3, r2
 802499e:	005b      	lsls	r3, r3, #1
 80249a0:	4413      	add	r3, r2
 80249a2:	00db      	lsls	r3, r3, #3
 80249a4:	440b      	add	r3, r1
 80249a6:	3308      	adds	r3, #8
 80249a8:	6818      	ldr	r0, [r3, #0]
 80249aa:	687a      	ldr	r2, [r7, #4]
 80249ac:	4613      	mov	r3, r2
 80249ae:	005b      	lsls	r3, r3, #1
 80249b0:	4413      	add	r3, r2
 80249b2:	00db      	lsls	r3, r3, #3
 80249b4:	4a08      	ldr	r2, [pc, #32]	@ (80249d8 <etharp_tmr+0x14c>)
 80249b6:	4413      	add	r3, r2
 80249b8:	3304      	adds	r3, #4
 80249ba:	4619      	mov	r1, r3
 80249bc:	f000 fe76 	bl	80256ac <etharp_request>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 80249c0:	687b      	ldr	r3, [r7, #4]
 80249c2:	3301      	adds	r3, #1
 80249c4:	607b      	str	r3, [r7, #4]
 80249c6:	687b      	ldr	r3, [r7, #4]
 80249c8:	2b09      	cmp	r3, #9
 80249ca:	f77f af65 	ble.w	8024898 <etharp_tmr+0xc>
      }
    }
  }
}
 80249ce:	bf00      	nop
 80249d0:	bf00      	nop
 80249d2:	3708      	adds	r7, #8
 80249d4:	46bd      	mov	sp, r7
 80249d6:	bd80      	pop	{r7, pc}
 80249d8:	2402b040 	.word	0x2402b040

080249dc <etharp_find_entry>:
 * @return The ARP entry index that matched or is created, ERR_MEM if no
 * entry is found or could be recycled.
 */
static s16_t
etharp_find_entry(const ip4_addr_t *ipaddr, u8_t flags, struct netif *netif)
{
 80249dc:	b580      	push	{r7, lr}
 80249de:	b08a      	sub	sp, #40	@ 0x28
 80249e0:	af00      	add	r7, sp, #0
 80249e2:	60f8      	str	r0, [r7, #12]
 80249e4:	460b      	mov	r3, r1
 80249e6:	607a      	str	r2, [r7, #4]
 80249e8:	72fb      	strb	r3, [r7, #11]
  s16_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE;
 80249ea:	230a      	movs	r3, #10
 80249ec:	843b      	strh	r3, [r7, #32]
 80249ee:	230a      	movs	r3, #10
 80249f0:	847b      	strh	r3, [r7, #34]	@ 0x22
  s16_t empty = ARP_TABLE_SIZE;
 80249f2:	230a      	movs	r3, #10
 80249f4:	84bb      	strh	r3, [r7, #36]	@ 0x24
  s16_t i = 0;
 80249f6:	2300      	movs	r3, #0
 80249f8:	84fb      	strh	r3, [r7, #38]	@ 0x26
  /* oldest entry with packets on queue */
  s16_t old_queue = ARP_TABLE_SIZE;
 80249fa:	230a      	movs	r3, #10
 80249fc:	83fb      	strh	r3, [r7, #30]
  /* its age */
  u16_t age_queue = 0, age_pending = 0, age_stable = 0;
 80249fe:	2300      	movs	r3, #0
 8024a00:	83bb      	strh	r3, [r7, #28]
 8024a02:	2300      	movs	r3, #0
 8024a04:	837b      	strh	r3, [r7, #26]
 8024a06:	2300      	movs	r3, #0
 8024a08:	833b      	strh	r3, [r7, #24]
   * 4) remember the oldest pending entry with queued packets (if any)
   * 5) search for a matching IP entry, either pending or stable
   *    until 5 matches, or all entries are searched for.
   */

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024a0a:	2300      	movs	r3, #0
 8024a0c:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8024a0e:	e0ae      	b.n	8024b6e <etharp_find_entry+0x192>
    u8_t state = arp_table[i].state;
 8024a10:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024a14:	49a6      	ldr	r1, [pc, #664]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024a16:	4613      	mov	r3, r2
 8024a18:	005b      	lsls	r3, r3, #1
 8024a1a:	4413      	add	r3, r2
 8024a1c:	00db      	lsls	r3, r3, #3
 8024a1e:	440b      	add	r3, r1
 8024a20:	3314      	adds	r3, #20
 8024a22:	781b      	ldrb	r3, [r3, #0]
 8024a24:	75fb      	strb	r3, [r7, #23]
    /* no empty entry found yet and now we do find one? */
    if ((empty == ARP_TABLE_SIZE) && (state == ETHARP_STATE_EMPTY)) {
 8024a26:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 8024a2a:	2b0a      	cmp	r3, #10
 8024a2c:	d105      	bne.n	8024a3a <etharp_find_entry+0x5e>
 8024a2e:	7dfb      	ldrb	r3, [r7, #23]
 8024a30:	2b00      	cmp	r3, #0
 8024a32:	d102      	bne.n	8024a3a <etharp_find_entry+0x5e>
      LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_find_entry: found empty entry %d\n", (int)i));
      /* remember first empty entry */
      empty = i;
 8024a34:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024a36:	84bb      	strh	r3, [r7, #36]	@ 0x24
 8024a38:	e095      	b.n	8024b66 <etharp_find_entry+0x18a>
    } else if (state != ETHARP_STATE_EMPTY) {
 8024a3a:	7dfb      	ldrb	r3, [r7, #23]
 8024a3c:	2b00      	cmp	r3, #0
 8024a3e:	f000 8092 	beq.w	8024b66 <etharp_find_entry+0x18a>
      LWIP_ASSERT("state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE",
 8024a42:	7dfb      	ldrb	r3, [r7, #23]
 8024a44:	2b01      	cmp	r3, #1
 8024a46:	d009      	beq.n	8024a5c <etharp_find_entry+0x80>
 8024a48:	7dfb      	ldrb	r3, [r7, #23]
 8024a4a:	2b01      	cmp	r3, #1
 8024a4c:	d806      	bhi.n	8024a5c <etharp_find_entry+0x80>
 8024a4e:	4b99      	ldr	r3, [pc, #612]	@ (8024cb4 <etharp_find_entry+0x2d8>)
 8024a50:	f240 1223 	movw	r2, #291	@ 0x123
 8024a54:	4998      	ldr	r1, [pc, #608]	@ (8024cb8 <etharp_find_entry+0x2dc>)
 8024a56:	4899      	ldr	r0, [pc, #612]	@ (8024cbc <etharp_find_entry+0x2e0>)
 8024a58:	f006 f800 	bl	802aa5c <iprintf>
                  state == ETHARP_STATE_PENDING || state >= ETHARP_STATE_STABLE);
      /* if given, does IP address match IP address in ARP entry? */
      if (ipaddr && ip4_addr_cmp(ipaddr, &arp_table[i].ipaddr)
 8024a5c:	68fb      	ldr	r3, [r7, #12]
 8024a5e:	2b00      	cmp	r3, #0
 8024a60:	d020      	beq.n	8024aa4 <etharp_find_entry+0xc8>
 8024a62:	68fb      	ldr	r3, [r7, #12]
 8024a64:	6819      	ldr	r1, [r3, #0]
 8024a66:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024a6a:	4891      	ldr	r0, [pc, #580]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024a6c:	4613      	mov	r3, r2
 8024a6e:	005b      	lsls	r3, r3, #1
 8024a70:	4413      	add	r3, r2
 8024a72:	00db      	lsls	r3, r3, #3
 8024a74:	4403      	add	r3, r0
 8024a76:	3304      	adds	r3, #4
 8024a78:	681b      	ldr	r3, [r3, #0]
 8024a7a:	4299      	cmp	r1, r3
 8024a7c:	d112      	bne.n	8024aa4 <etharp_find_entry+0xc8>
#if ETHARP_TABLE_MATCH_NETIF
          && ((netif == NULL) || (netif == arp_table[i].netif))
 8024a7e:	687b      	ldr	r3, [r7, #4]
 8024a80:	2b00      	cmp	r3, #0
 8024a82:	d00c      	beq.n	8024a9e <etharp_find_entry+0xc2>
 8024a84:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024a88:	4989      	ldr	r1, [pc, #548]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024a8a:	4613      	mov	r3, r2
 8024a8c:	005b      	lsls	r3, r3, #1
 8024a8e:	4413      	add	r3, r2
 8024a90:	00db      	lsls	r3, r3, #3
 8024a92:	440b      	add	r3, r1
 8024a94:	3308      	adds	r3, #8
 8024a96:	681b      	ldr	r3, [r3, #0]
 8024a98:	687a      	ldr	r2, [r7, #4]
 8024a9a:	429a      	cmp	r2, r3
 8024a9c:	d102      	bne.n	8024aa4 <etharp_find_entry+0xc8>
#endif /* ETHARP_TABLE_MATCH_NETIF */
         ) {
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: found matching entry %d\n", (int)i));
        /* found exact IP address match, simply bail out */
        return i;
 8024a9e:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024aa2:	e100      	b.n	8024ca6 <etharp_find_entry+0x2ca>
      }
      /* pending entry? */
      if (state == ETHARP_STATE_PENDING) {
 8024aa4:	7dfb      	ldrb	r3, [r7, #23]
 8024aa6:	2b01      	cmp	r3, #1
 8024aa8:	d140      	bne.n	8024b2c <etharp_find_entry+0x150>
        /* pending with queued packets? */
        if (arp_table[i].q != NULL) {
 8024aaa:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024aae:	4980      	ldr	r1, [pc, #512]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024ab0:	4613      	mov	r3, r2
 8024ab2:	005b      	lsls	r3, r3, #1
 8024ab4:	4413      	add	r3, r2
 8024ab6:	00db      	lsls	r3, r3, #3
 8024ab8:	440b      	add	r3, r1
 8024aba:	681b      	ldr	r3, [r3, #0]
 8024abc:	2b00      	cmp	r3, #0
 8024abe:	d01a      	beq.n	8024af6 <etharp_find_entry+0x11a>
          if (arp_table[i].ctime >= age_queue) {
 8024ac0:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024ac4:	497a      	ldr	r1, [pc, #488]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024ac6:	4613      	mov	r3, r2
 8024ac8:	005b      	lsls	r3, r3, #1
 8024aca:	4413      	add	r3, r2
 8024acc:	00db      	lsls	r3, r3, #3
 8024ace:	440b      	add	r3, r1
 8024ad0:	3312      	adds	r3, #18
 8024ad2:	881b      	ldrh	r3, [r3, #0]
 8024ad4:	8bba      	ldrh	r2, [r7, #28]
 8024ad6:	429a      	cmp	r2, r3
 8024ad8:	d845      	bhi.n	8024b66 <etharp_find_entry+0x18a>
            old_queue = i;
 8024ada:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024adc:	83fb      	strh	r3, [r7, #30]
            age_queue = arp_table[i].ctime;
 8024ade:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024ae2:	4973      	ldr	r1, [pc, #460]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024ae4:	4613      	mov	r3, r2
 8024ae6:	005b      	lsls	r3, r3, #1
 8024ae8:	4413      	add	r3, r2
 8024aea:	00db      	lsls	r3, r3, #3
 8024aec:	440b      	add	r3, r1
 8024aee:	3312      	adds	r3, #18
 8024af0:	881b      	ldrh	r3, [r3, #0]
 8024af2:	83bb      	strh	r3, [r7, #28]
 8024af4:	e037      	b.n	8024b66 <etharp_find_entry+0x18a>
          }
        } else
          /* pending without queued packets? */
        {
          if (arp_table[i].ctime >= age_pending) {
 8024af6:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024afa:	496d      	ldr	r1, [pc, #436]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024afc:	4613      	mov	r3, r2
 8024afe:	005b      	lsls	r3, r3, #1
 8024b00:	4413      	add	r3, r2
 8024b02:	00db      	lsls	r3, r3, #3
 8024b04:	440b      	add	r3, r1
 8024b06:	3312      	adds	r3, #18
 8024b08:	881b      	ldrh	r3, [r3, #0]
 8024b0a:	8b7a      	ldrh	r2, [r7, #26]
 8024b0c:	429a      	cmp	r2, r3
 8024b0e:	d82a      	bhi.n	8024b66 <etharp_find_entry+0x18a>
            old_pending = i;
 8024b10:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024b12:	843b      	strh	r3, [r7, #32]
            age_pending = arp_table[i].ctime;
 8024b14:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024b18:	4965      	ldr	r1, [pc, #404]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024b1a:	4613      	mov	r3, r2
 8024b1c:	005b      	lsls	r3, r3, #1
 8024b1e:	4413      	add	r3, r2
 8024b20:	00db      	lsls	r3, r3, #3
 8024b22:	440b      	add	r3, r1
 8024b24:	3312      	adds	r3, #18
 8024b26:	881b      	ldrh	r3, [r3, #0]
 8024b28:	837b      	strh	r3, [r7, #26]
 8024b2a:	e01c      	b.n	8024b66 <etharp_find_entry+0x18a>
          }
        }
        /* stable entry? */
      } else if (state >= ETHARP_STATE_STABLE) {
 8024b2c:	7dfb      	ldrb	r3, [r7, #23]
 8024b2e:	2b01      	cmp	r3, #1
 8024b30:	d919      	bls.n	8024b66 <etharp_find_entry+0x18a>
        /* don't record old_stable for static entries since they never expire */
        if (state < ETHARP_STATE_STATIC)
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
        {
          /* remember entry with oldest stable entry in oldest, its age in maxtime */
          if (arp_table[i].ctime >= age_stable) {
 8024b32:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024b36:	495e      	ldr	r1, [pc, #376]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024b38:	4613      	mov	r3, r2
 8024b3a:	005b      	lsls	r3, r3, #1
 8024b3c:	4413      	add	r3, r2
 8024b3e:	00db      	lsls	r3, r3, #3
 8024b40:	440b      	add	r3, r1
 8024b42:	3312      	adds	r3, #18
 8024b44:	881b      	ldrh	r3, [r3, #0]
 8024b46:	8b3a      	ldrh	r2, [r7, #24]
 8024b48:	429a      	cmp	r2, r3
 8024b4a:	d80c      	bhi.n	8024b66 <etharp_find_entry+0x18a>
            old_stable = i;
 8024b4c:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024b4e:	847b      	strh	r3, [r7, #34]	@ 0x22
            age_stable = arp_table[i].ctime;
 8024b50:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024b54:	4956      	ldr	r1, [pc, #344]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024b56:	4613      	mov	r3, r2
 8024b58:	005b      	lsls	r3, r3, #1
 8024b5a:	4413      	add	r3, r2
 8024b5c:	00db      	lsls	r3, r3, #3
 8024b5e:	440b      	add	r3, r1
 8024b60:	3312      	adds	r3, #18
 8024b62:	881b      	ldrh	r3, [r3, #0]
 8024b64:	833b      	strh	r3, [r7, #24]
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024b66:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8024b68:	3301      	adds	r3, #1
 8024b6a:	b29b      	uxth	r3, r3
 8024b6c:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8024b6e:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024b72:	2b09      	cmp	r3, #9
 8024b74:	f77f af4c 	ble.w	8024a10 <etharp_find_entry+0x34>
    }
  }
  /* { we have no match } => try to create a new entry */

  /* don't create new entry, only search? */
  if (((flags & ETHARP_FLAG_FIND_ONLY) != 0) ||
 8024b78:	7afb      	ldrb	r3, [r7, #11]
 8024b7a:	f003 0302 	and.w	r3, r3, #2
 8024b7e:	2b00      	cmp	r3, #0
 8024b80:	d108      	bne.n	8024b94 <etharp_find_entry+0x1b8>
 8024b82:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 8024b86:	2b0a      	cmp	r3, #10
 8024b88:	d107      	bne.n	8024b9a <etharp_find_entry+0x1be>
      /* or no empty entry found and not allowed to recycle? */
      ((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_FLAG_TRY_HARD) == 0))) {
 8024b8a:	7afb      	ldrb	r3, [r7, #11]
 8024b8c:	f003 0301 	and.w	r3, r3, #1
 8024b90:	2b00      	cmp	r3, #0
 8024b92:	d102      	bne.n	8024b9a <etharp_find_entry+0x1be>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty entry found and not allowed to recycle\n"));
    return (s16_t)ERR_MEM;
 8024b94:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8024b98:	e085      	b.n	8024ca6 <etharp_find_entry+0x2ca>
   *
   * { ETHARP_FLAG_TRY_HARD is set at this point }
   */

  /* 1) empty entry available? */
  if (empty < ARP_TABLE_SIZE) {
 8024b9a:	f9b7 3024 	ldrsh.w	r3, [r7, #36]	@ 0x24
 8024b9e:	2b09      	cmp	r3, #9
 8024ba0:	dc02      	bgt.n	8024ba8 <etharp_find_entry+0x1cc>
    i = empty;
 8024ba2:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8024ba4:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8024ba6:	e039      	b.n	8024c1c <etharp_find_entry+0x240>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting empty entry %d\n", (int)i));
  } else {
    /* 2) found recyclable stable entry? */
    if (old_stable < ARP_TABLE_SIZE) {
 8024ba8:	f9b7 3022 	ldrsh.w	r3, [r7, #34]	@ 0x22
 8024bac:	2b09      	cmp	r3, #9
 8024bae:	dc14      	bgt.n	8024bda <etharp_find_entry+0x1fe>
      /* recycle oldest stable*/
      i = old_stable;
 8024bb0:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8024bb2:	84fb      	strh	r3, [r7, #38]	@ 0x26
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest stable entry %d\n", (int)i));
      /* no queued packets should exist on stable entries */
      LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL);
 8024bb4:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024bb8:	493d      	ldr	r1, [pc, #244]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024bba:	4613      	mov	r3, r2
 8024bbc:	005b      	lsls	r3, r3, #1
 8024bbe:	4413      	add	r3, r2
 8024bc0:	00db      	lsls	r3, r3, #3
 8024bc2:	440b      	add	r3, r1
 8024bc4:	681b      	ldr	r3, [r3, #0]
 8024bc6:	2b00      	cmp	r3, #0
 8024bc8:	d018      	beq.n	8024bfc <etharp_find_entry+0x220>
 8024bca:	4b3a      	ldr	r3, [pc, #232]	@ (8024cb4 <etharp_find_entry+0x2d8>)
 8024bcc:	f240 126d 	movw	r2, #365	@ 0x16d
 8024bd0:	493b      	ldr	r1, [pc, #236]	@ (8024cc0 <etharp_find_entry+0x2e4>)
 8024bd2:	483a      	ldr	r0, [pc, #232]	@ (8024cbc <etharp_find_entry+0x2e0>)
 8024bd4:	f005 ff42 	bl	802aa5c <iprintf>
 8024bd8:	e010      	b.n	8024bfc <etharp_find_entry+0x220>
      /* 3) found recyclable pending entry without queued packets? */
    } else if (old_pending < ARP_TABLE_SIZE) {
 8024bda:	f9b7 3020 	ldrsh.w	r3, [r7, #32]
 8024bde:	2b09      	cmp	r3, #9
 8024be0:	dc02      	bgt.n	8024be8 <etharp_find_entry+0x20c>
      /* recycle oldest pending */
      i = old_pending;
 8024be2:	8c3b      	ldrh	r3, [r7, #32]
 8024be4:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8024be6:	e009      	b.n	8024bfc <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d (without queue)\n", (int)i));
      /* 4) found recyclable pending entry with queued packets? */
    } else if (old_queue < ARP_TABLE_SIZE) {
 8024be8:	f9b7 301e 	ldrsh.w	r3, [r7, #30]
 8024bec:	2b09      	cmp	r3, #9
 8024bee:	dc02      	bgt.n	8024bf6 <etharp_find_entry+0x21a>
      /* recycle oldest pending (queued packets are free in etharp_free_entry) */
      i = old_queue;
 8024bf0:	8bfb      	ldrh	r3, [r7, #30]
 8024bf2:	84fb      	strh	r3, [r7, #38]	@ 0x26
 8024bf4:	e002      	b.n	8024bfc <etharp_find_entry+0x220>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: selecting oldest pending entry %d, freeing packet queue %p\n", (int)i, (void *)(arp_table[i].q)));
      /* no empty or recyclable entries found */
    } else {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_find_entry: no empty or recyclable entries found\n"));
      return (s16_t)ERR_MEM;
 8024bf6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8024bfa:	e054      	b.n	8024ca6 <etharp_find_entry+0x2ca>
    }

    /* { empty or recyclable entry found } */
    LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 8024bfc:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024c00:	2b09      	cmp	r3, #9
 8024c02:	dd06      	ble.n	8024c12 <etharp_find_entry+0x236>
 8024c04:	4b2b      	ldr	r3, [pc, #172]	@ (8024cb4 <etharp_find_entry+0x2d8>)
 8024c06:	f240 127f 	movw	r2, #383	@ 0x17f
 8024c0a:	492e      	ldr	r1, [pc, #184]	@ (8024cc4 <etharp_find_entry+0x2e8>)
 8024c0c:	482b      	ldr	r0, [pc, #172]	@ (8024cbc <etharp_find_entry+0x2e0>)
 8024c0e:	f005 ff25 	bl	802aa5c <iprintf>
    etharp_free_entry(i);
 8024c12:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024c16:	4618      	mov	r0, r3
 8024c18:	f7ff fdd8 	bl	80247cc <etharp_free_entry>
  }

  LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE);
 8024c1c:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
 8024c20:	2b09      	cmp	r3, #9
 8024c22:	dd06      	ble.n	8024c32 <etharp_find_entry+0x256>
 8024c24:	4b23      	ldr	r3, [pc, #140]	@ (8024cb4 <etharp_find_entry+0x2d8>)
 8024c26:	f240 1283 	movw	r2, #387	@ 0x183
 8024c2a:	4926      	ldr	r1, [pc, #152]	@ (8024cc4 <etharp_find_entry+0x2e8>)
 8024c2c:	4823      	ldr	r0, [pc, #140]	@ (8024cbc <etharp_find_entry+0x2e0>)
 8024c2e:	f005 ff15 	bl	802aa5c <iprintf>
  LWIP_ASSERT("arp_table[i].state == ETHARP_STATE_EMPTY",
 8024c32:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024c36:	491e      	ldr	r1, [pc, #120]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024c38:	4613      	mov	r3, r2
 8024c3a:	005b      	lsls	r3, r3, #1
 8024c3c:	4413      	add	r3, r2
 8024c3e:	00db      	lsls	r3, r3, #3
 8024c40:	440b      	add	r3, r1
 8024c42:	3314      	adds	r3, #20
 8024c44:	781b      	ldrb	r3, [r3, #0]
 8024c46:	2b00      	cmp	r3, #0
 8024c48:	d006      	beq.n	8024c58 <etharp_find_entry+0x27c>
 8024c4a:	4b1a      	ldr	r3, [pc, #104]	@ (8024cb4 <etharp_find_entry+0x2d8>)
 8024c4c:	f44f 72c2 	mov.w	r2, #388	@ 0x184
 8024c50:	491d      	ldr	r1, [pc, #116]	@ (8024cc8 <etharp_find_entry+0x2ec>)
 8024c52:	481a      	ldr	r0, [pc, #104]	@ (8024cbc <etharp_find_entry+0x2e0>)
 8024c54:	f005 ff02 	bl	802aa5c <iprintf>
              arp_table[i].state == ETHARP_STATE_EMPTY);

  /* IP address given? */
  if (ipaddr != NULL) {
 8024c58:	68fb      	ldr	r3, [r7, #12]
 8024c5a:	2b00      	cmp	r3, #0
 8024c5c:	d00b      	beq.n	8024c76 <etharp_find_entry+0x29a>
    /* set IP address */
    ip4_addr_copy(arp_table[i].ipaddr, *ipaddr);
 8024c5e:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024c62:	68fb      	ldr	r3, [r7, #12]
 8024c64:	6819      	ldr	r1, [r3, #0]
 8024c66:	4812      	ldr	r0, [pc, #72]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024c68:	4613      	mov	r3, r2
 8024c6a:	005b      	lsls	r3, r3, #1
 8024c6c:	4413      	add	r3, r2
 8024c6e:	00db      	lsls	r3, r3, #3
 8024c70:	4403      	add	r3, r0
 8024c72:	3304      	adds	r3, #4
 8024c74:	6019      	str	r1, [r3, #0]
  }
  arp_table[i].ctime = 0;
 8024c76:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024c7a:	490d      	ldr	r1, [pc, #52]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024c7c:	4613      	mov	r3, r2
 8024c7e:	005b      	lsls	r3, r3, #1
 8024c80:	4413      	add	r3, r2
 8024c82:	00db      	lsls	r3, r3, #3
 8024c84:	440b      	add	r3, r1
 8024c86:	3312      	adds	r3, #18
 8024c88:	2200      	movs	r2, #0
 8024c8a:	801a      	strh	r2, [r3, #0]
#if ETHARP_TABLE_MATCH_NETIF
  arp_table[i].netif = netif;
 8024c8c:	f9b7 2026 	ldrsh.w	r2, [r7, #38]	@ 0x26
 8024c90:	4907      	ldr	r1, [pc, #28]	@ (8024cb0 <etharp_find_entry+0x2d4>)
 8024c92:	4613      	mov	r3, r2
 8024c94:	005b      	lsls	r3, r3, #1
 8024c96:	4413      	add	r3, r2
 8024c98:	00db      	lsls	r3, r3, #3
 8024c9a:	440b      	add	r3, r1
 8024c9c:	3308      	adds	r3, #8
 8024c9e:	687a      	ldr	r2, [r7, #4]
 8024ca0:	601a      	str	r2, [r3, #0]
#endif /* ETHARP_TABLE_MATCH_NETIF */
  return (s16_t)i;
 8024ca2:	f9b7 3026 	ldrsh.w	r3, [r7, #38]	@ 0x26
}
 8024ca6:	4618      	mov	r0, r3
 8024ca8:	3728      	adds	r7, #40	@ 0x28
 8024caa:	46bd      	mov	sp, r7
 8024cac:	bd80      	pop	{r7, pc}
 8024cae:	bf00      	nop
 8024cb0:	2402b040 	.word	0x2402b040
 8024cb4:	0803146c 	.word	0x0803146c
 8024cb8:	080314a4 	.word	0x080314a4
 8024cbc:	080314e4 	.word	0x080314e4
 8024cc0:	0803150c 	.word	0x0803150c
 8024cc4:	08031524 	.word	0x08031524
 8024cc8:	08031538 	.word	0x08031538

08024ccc <etharp_update_arp_entry>:
 *
 * @see pbuf_free()
 */
static err_t
etharp_update_arp_entry(struct netif *netif, const ip4_addr_t *ipaddr, struct eth_addr *ethaddr, u8_t flags)
{
 8024ccc:	b580      	push	{r7, lr}
 8024cce:	b088      	sub	sp, #32
 8024cd0:	af02      	add	r7, sp, #8
 8024cd2:	60f8      	str	r0, [r7, #12]
 8024cd4:	60b9      	str	r1, [r7, #8]
 8024cd6:	607a      	str	r2, [r7, #4]
 8024cd8:	70fb      	strb	r3, [r7, #3]
  s16_t i;
  LWIP_ASSERT("netif->hwaddr_len == ETH_HWADDR_LEN", netif->hwaddr_len == ETH_HWADDR_LEN);
 8024cda:	68fb      	ldr	r3, [r7, #12]
 8024cdc:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 8024ce0:	2b06      	cmp	r3, #6
 8024ce2:	d006      	beq.n	8024cf2 <etharp_update_arp_entry+0x26>
 8024ce4:	4b48      	ldr	r3, [pc, #288]	@ (8024e08 <etharp_update_arp_entry+0x13c>)
 8024ce6:	f240 12a9 	movw	r2, #425	@ 0x1a9
 8024cea:	4948      	ldr	r1, [pc, #288]	@ (8024e0c <etharp_update_arp_entry+0x140>)
 8024cec:	4848      	ldr	r0, [pc, #288]	@ (8024e10 <etharp_update_arp_entry+0x144>)
 8024cee:	f005 feb5 	bl	802aa5c <iprintf>
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n",
              ip4_addr1_16(ipaddr), ip4_addr2_16(ipaddr), ip4_addr3_16(ipaddr), ip4_addr4_16(ipaddr),
              (u16_t)ethaddr->addr[0], (u16_t)ethaddr->addr[1], (u16_t)ethaddr->addr[2],
              (u16_t)ethaddr->addr[3], (u16_t)ethaddr->addr[4], (u16_t)ethaddr->addr[5]));
  /* non-unicast address? */
  if (ip4_addr_isany(ipaddr) ||
 8024cf2:	68bb      	ldr	r3, [r7, #8]
 8024cf4:	2b00      	cmp	r3, #0
 8024cf6:	d012      	beq.n	8024d1e <etharp_update_arp_entry+0x52>
 8024cf8:	68bb      	ldr	r3, [r7, #8]
 8024cfa:	681b      	ldr	r3, [r3, #0]
 8024cfc:	2b00      	cmp	r3, #0
 8024cfe:	d00e      	beq.n	8024d1e <etharp_update_arp_entry+0x52>
      ip4_addr_isbroadcast(ipaddr, netif) ||
 8024d00:	68bb      	ldr	r3, [r7, #8]
 8024d02:	681b      	ldr	r3, [r3, #0]
 8024d04:	68f9      	ldr	r1, [r7, #12]
 8024d06:	4618      	mov	r0, r3
 8024d08:	f001 f952 	bl	8025fb0 <ip4_addr_isbroadcast_u32>
 8024d0c:	4603      	mov	r3, r0
  if (ip4_addr_isany(ipaddr) ||
 8024d0e:	2b00      	cmp	r3, #0
 8024d10:	d105      	bne.n	8024d1e <etharp_update_arp_entry+0x52>
      ip4_addr_ismulticast(ipaddr)) {
 8024d12:	68bb      	ldr	r3, [r7, #8]
 8024d14:	681b      	ldr	r3, [r3, #0]
 8024d16:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
      ip4_addr_isbroadcast(ipaddr, netif) ||
 8024d1a:	2be0      	cmp	r3, #224	@ 0xe0
 8024d1c:	d102      	bne.n	8024d24 <etharp_update_arp_entry+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 8024d1e:	f06f 030f 	mvn.w	r3, #15
 8024d22:	e06c      	b.n	8024dfe <etharp_update_arp_entry+0x132>
  }
  /* find or create ARP entry */
  i = etharp_find_entry(ipaddr, flags, netif);
 8024d24:	78fb      	ldrb	r3, [r7, #3]
 8024d26:	68fa      	ldr	r2, [r7, #12]
 8024d28:	4619      	mov	r1, r3
 8024d2a:	68b8      	ldr	r0, [r7, #8]
 8024d2c:	f7ff fe56 	bl	80249dc <etharp_find_entry>
 8024d30:	4603      	mov	r3, r0
 8024d32:	82fb      	strh	r3, [r7, #22]
  /* bail out if no entry could be found */
  if (i < 0) {
 8024d34:	f9b7 3016 	ldrsh.w	r3, [r7, #22]
 8024d38:	2b00      	cmp	r3, #0
 8024d3a:	da02      	bge.n	8024d42 <etharp_update_arp_entry+0x76>
    return (err_t)i;
 8024d3c:	8afb      	ldrh	r3, [r7, #22]
 8024d3e:	b25b      	sxtb	r3, r3
 8024d40:	e05d      	b.n	8024dfe <etharp_update_arp_entry+0x132>
    return ERR_VAL;
  } else
#endif /* ETHARP_SUPPORT_STATIC_ENTRIES */
  {
    /* mark it stable */
    arp_table[i].state = ETHARP_STATE_STABLE;
 8024d42:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024d46:	4933      	ldr	r1, [pc, #204]	@ (8024e14 <etharp_update_arp_entry+0x148>)
 8024d48:	4613      	mov	r3, r2
 8024d4a:	005b      	lsls	r3, r3, #1
 8024d4c:	4413      	add	r3, r2
 8024d4e:	00db      	lsls	r3, r3, #3
 8024d50:	440b      	add	r3, r1
 8024d52:	3314      	adds	r3, #20
 8024d54:	2202      	movs	r2, #2
 8024d56:	701a      	strb	r2, [r3, #0]
  }

  /* record network interface */
  arp_table[i].netif = netif;
 8024d58:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024d5c:	492d      	ldr	r1, [pc, #180]	@ (8024e14 <etharp_update_arp_entry+0x148>)
 8024d5e:	4613      	mov	r3, r2
 8024d60:	005b      	lsls	r3, r3, #1
 8024d62:	4413      	add	r3, r2
 8024d64:	00db      	lsls	r3, r3, #3
 8024d66:	440b      	add	r3, r1
 8024d68:	3308      	adds	r3, #8
 8024d6a:	68fa      	ldr	r2, [r7, #12]
 8024d6c:	601a      	str	r2, [r3, #0]
  /* insert in SNMP ARP index tree */
  mib2_add_arp_entry(netif, &arp_table[i].ipaddr);

  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_update_arp_entry: updating stable entry %"S16_F"\n", i));
  /* update address */
  SMEMCPY(&arp_table[i].ethaddr, ethaddr, ETH_HWADDR_LEN);
 8024d6e:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024d72:	4613      	mov	r3, r2
 8024d74:	005b      	lsls	r3, r3, #1
 8024d76:	4413      	add	r3, r2
 8024d78:	00db      	lsls	r3, r3, #3
 8024d7a:	3308      	adds	r3, #8
 8024d7c:	4a25      	ldr	r2, [pc, #148]	@ (8024e14 <etharp_update_arp_entry+0x148>)
 8024d7e:	4413      	add	r3, r2
 8024d80:	3304      	adds	r3, #4
 8024d82:	2206      	movs	r2, #6
 8024d84:	6879      	ldr	r1, [r7, #4]
 8024d86:	4618      	mov	r0, r3
 8024d88:	f006 f8f1 	bl	802af6e <memcpy>
  /* reset time stamp */
  arp_table[i].ctime = 0;
 8024d8c:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024d90:	4920      	ldr	r1, [pc, #128]	@ (8024e14 <etharp_update_arp_entry+0x148>)
 8024d92:	4613      	mov	r3, r2
 8024d94:	005b      	lsls	r3, r3, #1
 8024d96:	4413      	add	r3, r2
 8024d98:	00db      	lsls	r3, r3, #3
 8024d9a:	440b      	add	r3, r1
 8024d9c:	3312      	adds	r3, #18
 8024d9e:	2200      	movs	r2, #0
 8024da0:	801a      	strh	r2, [r3, #0]
    /* get the packet pointer */
    p = q->p;
    /* now queue entry can be freed */
    memp_free(MEMP_ARP_QUEUE, q);
#else /* ARP_QUEUEING */
  if (arp_table[i].q != NULL) {
 8024da2:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024da6:	491b      	ldr	r1, [pc, #108]	@ (8024e14 <etharp_update_arp_entry+0x148>)
 8024da8:	4613      	mov	r3, r2
 8024daa:	005b      	lsls	r3, r3, #1
 8024dac:	4413      	add	r3, r2
 8024dae:	00db      	lsls	r3, r3, #3
 8024db0:	440b      	add	r3, r1
 8024db2:	681b      	ldr	r3, [r3, #0]
 8024db4:	2b00      	cmp	r3, #0
 8024db6:	d021      	beq.n	8024dfc <etharp_update_arp_entry+0x130>
    struct pbuf *p = arp_table[i].q;
 8024db8:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024dbc:	4915      	ldr	r1, [pc, #84]	@ (8024e14 <etharp_update_arp_entry+0x148>)
 8024dbe:	4613      	mov	r3, r2
 8024dc0:	005b      	lsls	r3, r3, #1
 8024dc2:	4413      	add	r3, r2
 8024dc4:	00db      	lsls	r3, r3, #3
 8024dc6:	440b      	add	r3, r1
 8024dc8:	681b      	ldr	r3, [r3, #0]
 8024dca:	613b      	str	r3, [r7, #16]
    arp_table[i].q = NULL;
 8024dcc:	f9b7 2016 	ldrsh.w	r2, [r7, #22]
 8024dd0:	4910      	ldr	r1, [pc, #64]	@ (8024e14 <etharp_update_arp_entry+0x148>)
 8024dd2:	4613      	mov	r3, r2
 8024dd4:	005b      	lsls	r3, r3, #1
 8024dd6:	4413      	add	r3, r2
 8024dd8:	00db      	lsls	r3, r3, #3
 8024dda:	440b      	add	r3, r1
 8024ddc:	2200      	movs	r2, #0
 8024dde:	601a      	str	r2, [r3, #0]
#endif /* ARP_QUEUEING */
    /* send the queued IP packet */
    ethernet_output(netif, p, (struct eth_addr *)(netif->hwaddr), ethaddr, ETHTYPE_IP);
 8024de0:	68fb      	ldr	r3, [r7, #12]
 8024de2:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 8024de6:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 8024dea:	9300      	str	r3, [sp, #0]
 8024dec:	687b      	ldr	r3, [r7, #4]
 8024dee:	6939      	ldr	r1, [r7, #16]
 8024df0:	68f8      	ldr	r0, [r7, #12]
 8024df2:	f002 f9bb 	bl	802716c <ethernet_output>
    /* free the queued IP packet */
    pbuf_free(p);
 8024df6:	6938      	ldr	r0, [r7, #16]
 8024df8:	f7f6 fbb8 	bl	801b56c <pbuf_free>
  }
  return ERR_OK;
 8024dfc:	2300      	movs	r3, #0
}
 8024dfe:	4618      	mov	r0, r3
 8024e00:	3718      	adds	r7, #24
 8024e02:	46bd      	mov	sp, r7
 8024e04:	bd80      	pop	{r7, pc}
 8024e06:	bf00      	nop
 8024e08:	0803146c 	.word	0x0803146c
 8024e0c:	08031564 	.word	0x08031564
 8024e10:	080314e4 	.word	0x080314e4
 8024e14:	2402b040 	.word	0x2402b040

08024e18 <etharp_cleanup_netif>:
 *
 * @param netif points to a network interface
 */
void
etharp_cleanup_netif(struct netif *netif)
{
 8024e18:	b580      	push	{r7, lr}
 8024e1a:	b084      	sub	sp, #16
 8024e1c:	af00      	add	r7, sp, #0
 8024e1e:	6078      	str	r0, [r7, #4]
  int i;

  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024e20:	2300      	movs	r3, #0
 8024e22:	60fb      	str	r3, [r7, #12]
 8024e24:	e01e      	b.n	8024e64 <etharp_cleanup_netif+0x4c>
    u8_t state = arp_table[i].state;
 8024e26:	4913      	ldr	r1, [pc, #76]	@ (8024e74 <etharp_cleanup_netif+0x5c>)
 8024e28:	68fa      	ldr	r2, [r7, #12]
 8024e2a:	4613      	mov	r3, r2
 8024e2c:	005b      	lsls	r3, r3, #1
 8024e2e:	4413      	add	r3, r2
 8024e30:	00db      	lsls	r3, r3, #3
 8024e32:	440b      	add	r3, r1
 8024e34:	3314      	adds	r3, #20
 8024e36:	781b      	ldrb	r3, [r3, #0]
 8024e38:	72fb      	strb	r3, [r7, #11]
    if ((state != ETHARP_STATE_EMPTY) && (arp_table[i].netif == netif)) {
 8024e3a:	7afb      	ldrb	r3, [r7, #11]
 8024e3c:	2b00      	cmp	r3, #0
 8024e3e:	d00e      	beq.n	8024e5e <etharp_cleanup_netif+0x46>
 8024e40:	490c      	ldr	r1, [pc, #48]	@ (8024e74 <etharp_cleanup_netif+0x5c>)
 8024e42:	68fa      	ldr	r2, [r7, #12]
 8024e44:	4613      	mov	r3, r2
 8024e46:	005b      	lsls	r3, r3, #1
 8024e48:	4413      	add	r3, r2
 8024e4a:	00db      	lsls	r3, r3, #3
 8024e4c:	440b      	add	r3, r1
 8024e4e:	3308      	adds	r3, #8
 8024e50:	681b      	ldr	r3, [r3, #0]
 8024e52:	687a      	ldr	r2, [r7, #4]
 8024e54:	429a      	cmp	r2, r3
 8024e56:	d102      	bne.n	8024e5e <etharp_cleanup_netif+0x46>
      etharp_free_entry(i);
 8024e58:	68f8      	ldr	r0, [r7, #12]
 8024e5a:	f7ff fcb7 	bl	80247cc <etharp_free_entry>
  for (i = 0; i < ARP_TABLE_SIZE; ++i) {
 8024e5e:	68fb      	ldr	r3, [r7, #12]
 8024e60:	3301      	adds	r3, #1
 8024e62:	60fb      	str	r3, [r7, #12]
 8024e64:	68fb      	ldr	r3, [r7, #12]
 8024e66:	2b09      	cmp	r3, #9
 8024e68:	dddd      	ble.n	8024e26 <etharp_cleanup_netif+0xe>
    }
  }
}
 8024e6a:	bf00      	nop
 8024e6c:	bf00      	nop
 8024e6e:	3710      	adds	r7, #16
 8024e70:	46bd      	mov	sp, r7
 8024e72:	bd80      	pop	{r7, pc}
 8024e74:	2402b040 	.word	0x2402b040

08024e78 <etharp_input>:
 *
 * @see pbuf_free()
 */
void
etharp_input(struct pbuf *p, struct netif *netif)
{
 8024e78:	b5b0      	push	{r4, r5, r7, lr}
 8024e7a:	b08a      	sub	sp, #40	@ 0x28
 8024e7c:	af04      	add	r7, sp, #16
 8024e7e:	6078      	str	r0, [r7, #4]
 8024e80:	6039      	str	r1, [r7, #0]
  struct etharp_hdr *hdr;
  /* these are aligned properly, whereas the ARP header fields might not be */
  ip4_addr_t sipaddr, dipaddr;
  u8_t for_us;

  LWIP_ASSERT_CORE_LOCKED();
 8024e82:	f7ec f9bf 	bl	8011204 <sys_check_core_locking>

  LWIP_ERROR("netif != NULL", (netif != NULL), return;);
 8024e86:	683b      	ldr	r3, [r7, #0]
 8024e88:	2b00      	cmp	r3, #0
 8024e8a:	d107      	bne.n	8024e9c <etharp_input+0x24>
 8024e8c:	4b3f      	ldr	r3, [pc, #252]	@ (8024f8c <etharp_input+0x114>)
 8024e8e:	f240 228a 	movw	r2, #650	@ 0x28a
 8024e92:	493f      	ldr	r1, [pc, #252]	@ (8024f90 <etharp_input+0x118>)
 8024e94:	483f      	ldr	r0, [pc, #252]	@ (8024f94 <etharp_input+0x11c>)
 8024e96:	f005 fde1 	bl	802aa5c <iprintf>
 8024e9a:	e074      	b.n	8024f86 <etharp_input+0x10e>

  hdr = (struct etharp_hdr *)p->payload;
 8024e9c:	687b      	ldr	r3, [r7, #4]
 8024e9e:	685b      	ldr	r3, [r3, #4]
 8024ea0:	617b      	str	r3, [r7, #20]

  /* RFC 826 "Packet Reception": */
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8024ea2:	697b      	ldr	r3, [r7, #20]
 8024ea4:	881b      	ldrh	r3, [r3, #0]
 8024ea6:	b29b      	uxth	r3, r3
 8024ea8:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 8024eac:	d10c      	bne.n	8024ec8 <etharp_input+0x50>
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 8024eae:	697b      	ldr	r3, [r7, #20]
 8024eb0:	791b      	ldrb	r3, [r3, #4]
  if ((hdr->hwtype != PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET)) ||
 8024eb2:	2b06      	cmp	r3, #6
 8024eb4:	d108      	bne.n	8024ec8 <etharp_input+0x50>
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8024eb6:	697b      	ldr	r3, [r7, #20]
 8024eb8:	795b      	ldrb	r3, [r3, #5]
      (hdr->hwlen != ETH_HWADDR_LEN) ||
 8024eba:	2b04      	cmp	r3, #4
 8024ebc:	d104      	bne.n	8024ec8 <etharp_input+0x50>
      (hdr->proto != PP_HTONS(ETHTYPE_IP)))  {
 8024ebe:	697b      	ldr	r3, [r7, #20]
 8024ec0:	885b      	ldrh	r3, [r3, #2]
 8024ec2:	b29b      	uxth	r3, r3
      (hdr->protolen != sizeof(ip4_addr_t)) ||
 8024ec4:	2b08      	cmp	r3, #8
 8024ec6:	d003      	beq.n	8024ed0 <etharp_input+0x58>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING,
                ("etharp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n",
                 hdr->hwtype, (u16_t)hdr->hwlen, hdr->proto, (u16_t)hdr->protolen));
    ETHARP_STATS_INC(etharp.proterr);
    ETHARP_STATS_INC(etharp.drop);
    pbuf_free(p);
 8024ec8:	6878      	ldr	r0, [r7, #4]
 8024eca:	f7f6 fb4f 	bl	801b56c <pbuf_free>
    return;
 8024ece:	e05a      	b.n	8024f86 <etharp_input+0x10e>
  autoip_arp_reply(netif, hdr);
#endif /* LWIP_AUTOIP */

  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing (not using structure copy which breaks strict-aliasing rules). */
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&sipaddr, &hdr->sipaddr);
 8024ed0:	697b      	ldr	r3, [r7, #20]
 8024ed2:	330e      	adds	r3, #14
 8024ed4:	681b      	ldr	r3, [r3, #0]
 8024ed6:	60fb      	str	r3, [r7, #12]
  IPADDR_WORDALIGNED_COPY_TO_IP4_ADDR_T(&dipaddr, &hdr->dipaddr);
 8024ed8:	697b      	ldr	r3, [r7, #20]
 8024eda:	3318      	adds	r3, #24
 8024edc:	681b      	ldr	r3, [r3, #0]
 8024ede:	60bb      	str	r3, [r7, #8]

  /* this interface is not configured? */
  if (ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 8024ee0:	683b      	ldr	r3, [r7, #0]
 8024ee2:	3304      	adds	r3, #4
 8024ee4:	681b      	ldr	r3, [r3, #0]
 8024ee6:	2b00      	cmp	r3, #0
 8024ee8:	d102      	bne.n	8024ef0 <etharp_input+0x78>
    for_us = 0;
 8024eea:	2300      	movs	r3, #0
 8024eec:	74fb      	strb	r3, [r7, #19]
 8024eee:	e009      	b.n	8024f04 <etharp_input+0x8c>
  } else {
    /* ARP packet directed to us? */
    for_us = (u8_t)ip4_addr_cmp(&dipaddr, netif_ip4_addr(netif));
 8024ef0:	68ba      	ldr	r2, [r7, #8]
 8024ef2:	683b      	ldr	r3, [r7, #0]
 8024ef4:	3304      	adds	r3, #4
 8024ef6:	681b      	ldr	r3, [r3, #0]
 8024ef8:	429a      	cmp	r2, r3
 8024efa:	bf0c      	ite	eq
 8024efc:	2301      	moveq	r3, #1
 8024efe:	2300      	movne	r3, #0
 8024f00:	b2db      	uxtb	r3, r3
 8024f02:	74fb      	strb	r3, [r7, #19]
  /* ARP message directed to us?
      -> add IP address in ARP cache; assume requester wants to talk to us,
         can result in directly sending the queued packets for this host.
     ARP message not directed to us?
      ->  update the source IP address in the cache, if present */
  etharp_update_arp_entry(netif, &sipaddr, &(hdr->shwaddr),
 8024f04:	697b      	ldr	r3, [r7, #20]
 8024f06:	f103 0208 	add.w	r2, r3, #8
 8024f0a:	7cfb      	ldrb	r3, [r7, #19]
 8024f0c:	2b00      	cmp	r3, #0
 8024f0e:	d001      	beq.n	8024f14 <etharp_input+0x9c>
 8024f10:	2301      	movs	r3, #1
 8024f12:	e000      	b.n	8024f16 <etharp_input+0x9e>
 8024f14:	2302      	movs	r3, #2
 8024f16:	f107 010c 	add.w	r1, r7, #12
 8024f1a:	6838      	ldr	r0, [r7, #0]
 8024f1c:	f7ff fed6 	bl	8024ccc <etharp_update_arp_entry>
                          for_us ? ETHARP_FLAG_TRY_HARD : ETHARP_FLAG_FIND_ONLY);

  /* now act on the message itself */
  switch (hdr->opcode) {
 8024f20:	697b      	ldr	r3, [r7, #20]
 8024f22:	88db      	ldrh	r3, [r3, #6]
 8024f24:	b29b      	uxth	r3, r3
 8024f26:	f5b3 7f80 	cmp.w	r3, #256	@ 0x100
 8024f2a:	d003      	beq.n	8024f34 <etharp_input+0xbc>
 8024f2c:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 8024f30:	d01e      	beq.n	8024f70 <etharp_input+0xf8>
#endif /* (LWIP_DHCP && DHCP_DOES_ARP_CHECK) */
      break;
    default:
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_input: ARP unknown opcode type %"S16_F"\n", lwip_htons(hdr->opcode)));
      ETHARP_STATS_INC(etharp.err);
      break;
 8024f32:	e025      	b.n	8024f80 <etharp_input+0x108>
      if (for_us) {
 8024f34:	7cfb      	ldrb	r3, [r7, #19]
 8024f36:	2b00      	cmp	r3, #0
 8024f38:	d021      	beq.n	8024f7e <etharp_input+0x106>
                   (struct eth_addr *)netif->hwaddr, &hdr->shwaddr,
 8024f3a:	683b      	ldr	r3, [r7, #0]
 8024f3c:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 8024f40:	697b      	ldr	r3, [r7, #20]
 8024f42:	f103 0408 	add.w	r4, r3, #8
                   (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif),
 8024f46:	683b      	ldr	r3, [r7, #0]
 8024f48:	f103 052a 	add.w	r5, r3, #42	@ 0x2a
 8024f4c:	683b      	ldr	r3, [r7, #0]
 8024f4e:	3304      	adds	r3, #4
                   &hdr->shwaddr, &sipaddr,
 8024f50:	697a      	ldr	r2, [r7, #20]
 8024f52:	3208      	adds	r2, #8
        etharp_raw(netif,
 8024f54:	2102      	movs	r1, #2
 8024f56:	9103      	str	r1, [sp, #12]
 8024f58:	f107 010c 	add.w	r1, r7, #12
 8024f5c:	9102      	str	r1, [sp, #8]
 8024f5e:	9201      	str	r2, [sp, #4]
 8024f60:	9300      	str	r3, [sp, #0]
 8024f62:	462b      	mov	r3, r5
 8024f64:	4622      	mov	r2, r4
 8024f66:	4601      	mov	r1, r0
 8024f68:	6838      	ldr	r0, [r7, #0]
 8024f6a:	f000 faf1 	bl	8025550 <etharp_raw>
      break;
 8024f6e:	e006      	b.n	8024f7e <etharp_input+0x106>
      dhcp_arp_reply(netif, &sipaddr);
 8024f70:	f107 030c 	add.w	r3, r7, #12
 8024f74:	4619      	mov	r1, r3
 8024f76:	6838      	ldr	r0, [r7, #0]
 8024f78:	f7fe f9b6 	bl	80232e8 <dhcp_arp_reply>
      break;
 8024f7c:	e000      	b.n	8024f80 <etharp_input+0x108>
      break;
 8024f7e:	bf00      	nop
  }
  /* free ARP packet */
  pbuf_free(p);
 8024f80:	6878      	ldr	r0, [r7, #4]
 8024f82:	f7f6 faf3 	bl	801b56c <pbuf_free>
}
 8024f86:	3718      	adds	r7, #24
 8024f88:	46bd      	mov	sp, r7
 8024f8a:	bdb0      	pop	{r4, r5, r7, pc}
 8024f8c:	0803146c 	.word	0x0803146c
 8024f90:	080315bc 	.word	0x080315bc
 8024f94:	080314e4 	.word	0x080314e4

08024f98 <etharp_output_to_arp_index>:
/** Just a small helper function that sends a pbuf to an ethernet address
 * in the arp_table specified by the index 'arp_idx'.
 */
static err_t
etharp_output_to_arp_index(struct netif *netif, struct pbuf *q, netif_addr_idx_t arp_idx)
{
 8024f98:	b580      	push	{r7, lr}
 8024f9a:	b086      	sub	sp, #24
 8024f9c:	af02      	add	r7, sp, #8
 8024f9e:	60f8      	str	r0, [r7, #12]
 8024fa0:	60b9      	str	r1, [r7, #8]
 8024fa2:	4613      	mov	r3, r2
 8024fa4:	71fb      	strb	r3, [r7, #7]
  LWIP_ASSERT("arp_table[arp_idx].state >= ETHARP_STATE_STABLE",
 8024fa6:	79fa      	ldrb	r2, [r7, #7]
 8024fa8:	4944      	ldr	r1, [pc, #272]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 8024faa:	4613      	mov	r3, r2
 8024fac:	005b      	lsls	r3, r3, #1
 8024fae:	4413      	add	r3, r2
 8024fb0:	00db      	lsls	r3, r3, #3
 8024fb2:	440b      	add	r3, r1
 8024fb4:	3314      	adds	r3, #20
 8024fb6:	781b      	ldrb	r3, [r3, #0]
 8024fb8:	2b01      	cmp	r3, #1
 8024fba:	d806      	bhi.n	8024fca <etharp_output_to_arp_index+0x32>
 8024fbc:	4b40      	ldr	r3, [pc, #256]	@ (80250c0 <etharp_output_to_arp_index+0x128>)
 8024fbe:	f240 22ee 	movw	r2, #750	@ 0x2ee
 8024fc2:	4940      	ldr	r1, [pc, #256]	@ (80250c4 <etharp_output_to_arp_index+0x12c>)
 8024fc4:	4840      	ldr	r0, [pc, #256]	@ (80250c8 <etharp_output_to_arp_index+0x130>)
 8024fc6:	f005 fd49 	bl	802aa5c <iprintf>
              arp_table[arp_idx].state >= ETHARP_STATE_STABLE);
  /* if arp table entry is about to expire: re-request it,
     but only if its state is ETHARP_STATE_STABLE to prevent flooding the
     network with ARP requests if this address is used frequently. */
  if (arp_table[arp_idx].state == ETHARP_STATE_STABLE) {
 8024fca:	79fa      	ldrb	r2, [r7, #7]
 8024fcc:	493b      	ldr	r1, [pc, #236]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 8024fce:	4613      	mov	r3, r2
 8024fd0:	005b      	lsls	r3, r3, #1
 8024fd2:	4413      	add	r3, r2
 8024fd4:	00db      	lsls	r3, r3, #3
 8024fd6:	440b      	add	r3, r1
 8024fd8:	3314      	adds	r3, #20
 8024fda:	781b      	ldrb	r3, [r3, #0]
 8024fdc:	2b02      	cmp	r3, #2
 8024fde:	d153      	bne.n	8025088 <etharp_output_to_arp_index+0xf0>
    if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_BROADCAST) {
 8024fe0:	79fa      	ldrb	r2, [r7, #7]
 8024fe2:	4936      	ldr	r1, [pc, #216]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 8024fe4:	4613      	mov	r3, r2
 8024fe6:	005b      	lsls	r3, r3, #1
 8024fe8:	4413      	add	r3, r2
 8024fea:	00db      	lsls	r3, r3, #3
 8024fec:	440b      	add	r3, r1
 8024fee:	3312      	adds	r3, #18
 8024ff0:	881b      	ldrh	r3, [r3, #0]
 8024ff2:	f5b3 7f8e 	cmp.w	r3, #284	@ 0x11c
 8024ff6:	d919      	bls.n	802502c <etharp_output_to_arp_index+0x94>
      /* issue a standard request using broadcast */
      if (etharp_request(netif, &arp_table[arp_idx].ipaddr) == ERR_OK) {
 8024ff8:	79fa      	ldrb	r2, [r7, #7]
 8024ffa:	4613      	mov	r3, r2
 8024ffc:	005b      	lsls	r3, r3, #1
 8024ffe:	4413      	add	r3, r2
 8025000:	00db      	lsls	r3, r3, #3
 8025002:	4a2e      	ldr	r2, [pc, #184]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 8025004:	4413      	add	r3, r2
 8025006:	3304      	adds	r3, #4
 8025008:	4619      	mov	r1, r3
 802500a:	68f8      	ldr	r0, [r7, #12]
 802500c:	f000 fb4e 	bl	80256ac <etharp_request>
 8025010:	4603      	mov	r3, r0
 8025012:	2b00      	cmp	r3, #0
 8025014:	d138      	bne.n	8025088 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 8025016:	79fa      	ldrb	r2, [r7, #7]
 8025018:	4928      	ldr	r1, [pc, #160]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 802501a:	4613      	mov	r3, r2
 802501c:	005b      	lsls	r3, r3, #1
 802501e:	4413      	add	r3, r2
 8025020:	00db      	lsls	r3, r3, #3
 8025022:	440b      	add	r3, r1
 8025024:	3314      	adds	r3, #20
 8025026:	2203      	movs	r2, #3
 8025028:	701a      	strb	r2, [r3, #0]
 802502a:	e02d      	b.n	8025088 <etharp_output_to_arp_index+0xf0>
      }
    } else if (arp_table[arp_idx].ctime >= ARP_AGE_REREQUEST_USED_UNICAST) {
 802502c:	79fa      	ldrb	r2, [r7, #7]
 802502e:	4923      	ldr	r1, [pc, #140]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 8025030:	4613      	mov	r3, r2
 8025032:	005b      	lsls	r3, r3, #1
 8025034:	4413      	add	r3, r2
 8025036:	00db      	lsls	r3, r3, #3
 8025038:	440b      	add	r3, r1
 802503a:	3312      	adds	r3, #18
 802503c:	881b      	ldrh	r3, [r3, #0]
 802503e:	f5b3 7f87 	cmp.w	r3, #270	@ 0x10e
 8025042:	d321      	bcc.n	8025088 <etharp_output_to_arp_index+0xf0>
      /* issue a unicast request (for 15 seconds) to prevent unnecessary broadcast */
      if (etharp_request_dst(netif, &arp_table[arp_idx].ipaddr, &arp_table[arp_idx].ethaddr) == ERR_OK) {
 8025044:	79fa      	ldrb	r2, [r7, #7]
 8025046:	4613      	mov	r3, r2
 8025048:	005b      	lsls	r3, r3, #1
 802504a:	4413      	add	r3, r2
 802504c:	00db      	lsls	r3, r3, #3
 802504e:	4a1b      	ldr	r2, [pc, #108]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 8025050:	4413      	add	r3, r2
 8025052:	1d19      	adds	r1, r3, #4
 8025054:	79fa      	ldrb	r2, [r7, #7]
 8025056:	4613      	mov	r3, r2
 8025058:	005b      	lsls	r3, r3, #1
 802505a:	4413      	add	r3, r2
 802505c:	00db      	lsls	r3, r3, #3
 802505e:	3308      	adds	r3, #8
 8025060:	4a16      	ldr	r2, [pc, #88]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 8025062:	4413      	add	r3, r2
 8025064:	3304      	adds	r3, #4
 8025066:	461a      	mov	r2, r3
 8025068:	68f8      	ldr	r0, [r7, #12]
 802506a:	f000 fafd 	bl	8025668 <etharp_request_dst>
 802506e:	4603      	mov	r3, r0
 8025070:	2b00      	cmp	r3, #0
 8025072:	d109      	bne.n	8025088 <etharp_output_to_arp_index+0xf0>
        arp_table[arp_idx].state = ETHARP_STATE_STABLE_REREQUESTING_1;
 8025074:	79fa      	ldrb	r2, [r7, #7]
 8025076:	4911      	ldr	r1, [pc, #68]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 8025078:	4613      	mov	r3, r2
 802507a:	005b      	lsls	r3, r3, #1
 802507c:	4413      	add	r3, r2
 802507e:	00db      	lsls	r3, r3, #3
 8025080:	440b      	add	r3, r1
 8025082:	3314      	adds	r3, #20
 8025084:	2203      	movs	r2, #3
 8025086:	701a      	strb	r2, [r3, #0]
      }
    }
  }

  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), &arp_table[arp_idx].ethaddr, ETHTYPE_IP);
 8025088:	68fb      	ldr	r3, [r7, #12]
 802508a:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
 802508e:	79fa      	ldrb	r2, [r7, #7]
 8025090:	4613      	mov	r3, r2
 8025092:	005b      	lsls	r3, r3, #1
 8025094:	4413      	add	r3, r2
 8025096:	00db      	lsls	r3, r3, #3
 8025098:	3308      	adds	r3, #8
 802509a:	4a08      	ldr	r2, [pc, #32]	@ (80250bc <etharp_output_to_arp_index+0x124>)
 802509c:	4413      	add	r3, r2
 802509e:	3304      	adds	r3, #4
 80250a0:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 80250a4:	9200      	str	r2, [sp, #0]
 80250a6:	460a      	mov	r2, r1
 80250a8:	68b9      	ldr	r1, [r7, #8]
 80250aa:	68f8      	ldr	r0, [r7, #12]
 80250ac:	f002 f85e 	bl	802716c <ethernet_output>
 80250b0:	4603      	mov	r3, r0
}
 80250b2:	4618      	mov	r0, r3
 80250b4:	3710      	adds	r7, #16
 80250b6:	46bd      	mov	sp, r7
 80250b8:	bd80      	pop	{r7, pc}
 80250ba:	bf00      	nop
 80250bc:	2402b040 	.word	0x2402b040
 80250c0:	0803146c 	.word	0x0803146c
 80250c4:	080315dc 	.word	0x080315dc
 80250c8:	080314e4 	.word	0x080314e4

080250cc <etharp_output>:
 * - ERR_RTE No route to destination (no gateway to external networks),
 * or the return type of either etharp_query() or ethernet_output().
 */
err_t
etharp_output(struct netif *netif, struct pbuf *q, const ip4_addr_t *ipaddr)
{
 80250cc:	b580      	push	{r7, lr}
 80250ce:	b08a      	sub	sp, #40	@ 0x28
 80250d0:	af02      	add	r7, sp, #8
 80250d2:	60f8      	str	r0, [r7, #12]
 80250d4:	60b9      	str	r1, [r7, #8]
 80250d6:	607a      	str	r2, [r7, #4]
  const struct eth_addr *dest;
  struct eth_addr mcastaddr;
  const ip4_addr_t *dst_addr = ipaddr;
 80250d8:	687b      	ldr	r3, [r7, #4]
 80250da:	61bb      	str	r3, [r7, #24]

  LWIP_ASSERT_CORE_LOCKED();
 80250dc:	f7ec f892 	bl	8011204 <sys_check_core_locking>
  LWIP_ASSERT("netif != NULL", netif != NULL);
 80250e0:	68fb      	ldr	r3, [r7, #12]
 80250e2:	2b00      	cmp	r3, #0
 80250e4:	d106      	bne.n	80250f4 <etharp_output+0x28>
 80250e6:	4b73      	ldr	r3, [pc, #460]	@ (80252b4 <etharp_output+0x1e8>)
 80250e8:	f240 321e 	movw	r2, #798	@ 0x31e
 80250ec:	4972      	ldr	r1, [pc, #456]	@ (80252b8 <etharp_output+0x1ec>)
 80250ee:	4873      	ldr	r0, [pc, #460]	@ (80252bc <etharp_output+0x1f0>)
 80250f0:	f005 fcb4 	bl	802aa5c <iprintf>
  LWIP_ASSERT("q != NULL", q != NULL);
 80250f4:	68bb      	ldr	r3, [r7, #8]
 80250f6:	2b00      	cmp	r3, #0
 80250f8:	d106      	bne.n	8025108 <etharp_output+0x3c>
 80250fa:	4b6e      	ldr	r3, [pc, #440]	@ (80252b4 <etharp_output+0x1e8>)
 80250fc:	f240 321f 	movw	r2, #799	@ 0x31f
 8025100:	496f      	ldr	r1, [pc, #444]	@ (80252c0 <etharp_output+0x1f4>)
 8025102:	486e      	ldr	r0, [pc, #440]	@ (80252bc <etharp_output+0x1f0>)
 8025104:	f005 fcaa 	bl	802aa5c <iprintf>
  LWIP_ASSERT("ipaddr != NULL", ipaddr != NULL);
 8025108:	687b      	ldr	r3, [r7, #4]
 802510a:	2b00      	cmp	r3, #0
 802510c:	d106      	bne.n	802511c <etharp_output+0x50>
 802510e:	4b69      	ldr	r3, [pc, #420]	@ (80252b4 <etharp_output+0x1e8>)
 8025110:	f44f 7248 	mov.w	r2, #800	@ 0x320
 8025114:	496b      	ldr	r1, [pc, #428]	@ (80252c4 <etharp_output+0x1f8>)
 8025116:	4869      	ldr	r0, [pc, #420]	@ (80252bc <etharp_output+0x1f0>)
 8025118:	f005 fca0 	bl	802aa5c <iprintf>

  /* Determine on destination hardware address. Broadcasts and multicasts
   * are special, other IP addresses are looked up in the ARP table. */

  /* broadcast destination IP address? */
  if (ip4_addr_isbroadcast(ipaddr, netif)) {
 802511c:	687b      	ldr	r3, [r7, #4]
 802511e:	681b      	ldr	r3, [r3, #0]
 8025120:	68f9      	ldr	r1, [r7, #12]
 8025122:	4618      	mov	r0, r3
 8025124:	f000 ff44 	bl	8025fb0 <ip4_addr_isbroadcast_u32>
 8025128:	4603      	mov	r3, r0
 802512a:	2b00      	cmp	r3, #0
 802512c:	d002      	beq.n	8025134 <etharp_output+0x68>
    /* broadcast on Ethernet also */
    dest = (const struct eth_addr *)&ethbroadcast;
 802512e:	4b66      	ldr	r3, [pc, #408]	@ (80252c8 <etharp_output+0x1fc>)
 8025130:	61fb      	str	r3, [r7, #28]
 8025132:	e0af      	b.n	8025294 <etharp_output+0x1c8>
    /* multicast destination IP address? */
  } else if (ip4_addr_ismulticast(ipaddr)) {
 8025134:	687b      	ldr	r3, [r7, #4]
 8025136:	681b      	ldr	r3, [r3, #0]
 8025138:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 802513c:	2be0      	cmp	r3, #224	@ 0xe0
 802513e:	d118      	bne.n	8025172 <etharp_output+0xa6>
    /* Hash IP multicast address to MAC address.*/
    mcastaddr.addr[0] = LL_IP4_MULTICAST_ADDR_0;
 8025140:	2301      	movs	r3, #1
 8025142:	743b      	strb	r3, [r7, #16]
    mcastaddr.addr[1] = LL_IP4_MULTICAST_ADDR_1;
 8025144:	2300      	movs	r3, #0
 8025146:	747b      	strb	r3, [r7, #17]
    mcastaddr.addr[2] = LL_IP4_MULTICAST_ADDR_2;
 8025148:	235e      	movs	r3, #94	@ 0x5e
 802514a:	74bb      	strb	r3, [r7, #18]
    mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f;
 802514c:	687b      	ldr	r3, [r7, #4]
 802514e:	3301      	adds	r3, #1
 8025150:	781b      	ldrb	r3, [r3, #0]
 8025152:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8025156:	b2db      	uxtb	r3, r3
 8025158:	74fb      	strb	r3, [r7, #19]
    mcastaddr.addr[4] = ip4_addr3(ipaddr);
 802515a:	687b      	ldr	r3, [r7, #4]
 802515c:	3302      	adds	r3, #2
 802515e:	781b      	ldrb	r3, [r3, #0]
 8025160:	753b      	strb	r3, [r7, #20]
    mcastaddr.addr[5] = ip4_addr4(ipaddr);
 8025162:	687b      	ldr	r3, [r7, #4]
 8025164:	3303      	adds	r3, #3
 8025166:	781b      	ldrb	r3, [r3, #0]
 8025168:	757b      	strb	r3, [r7, #21]
    /* destination Ethernet address is multicast */
    dest = &mcastaddr;
 802516a:	f107 0310 	add.w	r3, r7, #16
 802516e:	61fb      	str	r3, [r7, #28]
 8025170:	e090      	b.n	8025294 <etharp_output+0x1c8>
    /* unicast destination IP address? */
  } else {
    netif_addr_idx_t i;
    /* outside local network? if so, this can neither be a global broadcast nor
       a subnet broadcast. */
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 8025172:	687b      	ldr	r3, [r7, #4]
 8025174:	681a      	ldr	r2, [r3, #0]
 8025176:	68fb      	ldr	r3, [r7, #12]
 8025178:	3304      	adds	r3, #4
 802517a:	681b      	ldr	r3, [r3, #0]
 802517c:	405a      	eors	r2, r3
 802517e:	68fb      	ldr	r3, [r7, #12]
 8025180:	3308      	adds	r3, #8
 8025182:	681b      	ldr	r3, [r3, #0]
 8025184:	4013      	ands	r3, r2
 8025186:	2b00      	cmp	r3, #0
 8025188:	d012      	beq.n	80251b0 <etharp_output+0xe4>
        !ip4_addr_islinklocal(ipaddr)) {
 802518a:	687b      	ldr	r3, [r7, #4]
 802518c:	681b      	ldr	r3, [r3, #0]
 802518e:	b29b      	uxth	r3, r3
    if (!ip4_addr_netcmp(ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif)) &&
 8025190:	f64f 62a9 	movw	r2, #65193	@ 0xfea9
 8025194:	4293      	cmp	r3, r2
 8025196:	d00b      	beq.n	80251b0 <etharp_output+0xe4>
        dst_addr = LWIP_HOOK_ETHARP_GET_GW(netif, ipaddr);
        if (dst_addr == NULL)
#endif /* LWIP_HOOK_ETHARP_GET_GW */
        {
          /* interface has default gateway? */
          if (!ip4_addr_isany_val(*netif_ip4_gw(netif))) {
 8025198:	68fb      	ldr	r3, [r7, #12]
 802519a:	330c      	adds	r3, #12
 802519c:	681b      	ldr	r3, [r3, #0]
 802519e:	2b00      	cmp	r3, #0
 80251a0:	d003      	beq.n	80251aa <etharp_output+0xde>
            /* send to hardware address of default gateway IP address */
            dst_addr = netif_ip4_gw(netif);
 80251a2:	68fb      	ldr	r3, [r7, #12]
 80251a4:	330c      	adds	r3, #12
 80251a6:	61bb      	str	r3, [r7, #24]
 80251a8:	e002      	b.n	80251b0 <etharp_output+0xe4>
            /* no default gateway available */
          } else {
            /* no route to destination error (default gateway missing) */
            return ERR_RTE;
 80251aa:	f06f 0303 	mvn.w	r3, #3
 80251ae:	e07d      	b.n	80252ac <etharp_output+0x1e0>
    if (netif->hints != NULL) {
      /* per-pcb cached entry was given */
      netif_addr_idx_t etharp_cached_entry = netif->hints->addr_hint;
      if (etharp_cached_entry < ARP_TABLE_SIZE) {
#endif /* LWIP_NETIF_HWADDRHINT */
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 80251b0:	4b46      	ldr	r3, [pc, #280]	@ (80252cc <etharp_output+0x200>)
 80251b2:	781b      	ldrb	r3, [r3, #0]
 80251b4:	4619      	mov	r1, r3
 80251b6:	4a46      	ldr	r2, [pc, #280]	@ (80252d0 <etharp_output+0x204>)
 80251b8:	460b      	mov	r3, r1
 80251ba:	005b      	lsls	r3, r3, #1
 80251bc:	440b      	add	r3, r1
 80251be:	00db      	lsls	r3, r3, #3
 80251c0:	4413      	add	r3, r2
 80251c2:	3314      	adds	r3, #20
 80251c4:	781b      	ldrb	r3, [r3, #0]
 80251c6:	2b01      	cmp	r3, #1
 80251c8:	d925      	bls.n	8025216 <etharp_output+0x14a>
#if ETHARP_TABLE_MATCH_NETIF
            (arp_table[etharp_cached_entry].netif == netif) &&
 80251ca:	4b40      	ldr	r3, [pc, #256]	@ (80252cc <etharp_output+0x200>)
 80251cc:	781b      	ldrb	r3, [r3, #0]
 80251ce:	4619      	mov	r1, r3
 80251d0:	4a3f      	ldr	r2, [pc, #252]	@ (80252d0 <etharp_output+0x204>)
 80251d2:	460b      	mov	r3, r1
 80251d4:	005b      	lsls	r3, r3, #1
 80251d6:	440b      	add	r3, r1
 80251d8:	00db      	lsls	r3, r3, #3
 80251da:	4413      	add	r3, r2
 80251dc:	3308      	adds	r3, #8
 80251de:	681b      	ldr	r3, [r3, #0]
        if ((arp_table[etharp_cached_entry].state >= ETHARP_STATE_STABLE) &&
 80251e0:	68fa      	ldr	r2, [r7, #12]
 80251e2:	429a      	cmp	r2, r3
 80251e4:	d117      	bne.n	8025216 <etharp_output+0x14a>
#endif
            (ip4_addr_cmp(dst_addr, &arp_table[etharp_cached_entry].ipaddr))) {
 80251e6:	69bb      	ldr	r3, [r7, #24]
 80251e8:	681a      	ldr	r2, [r3, #0]
 80251ea:	4b38      	ldr	r3, [pc, #224]	@ (80252cc <etharp_output+0x200>)
 80251ec:	781b      	ldrb	r3, [r3, #0]
 80251ee:	4618      	mov	r0, r3
 80251f0:	4937      	ldr	r1, [pc, #220]	@ (80252d0 <etharp_output+0x204>)
 80251f2:	4603      	mov	r3, r0
 80251f4:	005b      	lsls	r3, r3, #1
 80251f6:	4403      	add	r3, r0
 80251f8:	00db      	lsls	r3, r3, #3
 80251fa:	440b      	add	r3, r1
 80251fc:	3304      	adds	r3, #4
 80251fe:	681b      	ldr	r3, [r3, #0]
            (arp_table[etharp_cached_entry].netif == netif) &&
 8025200:	429a      	cmp	r2, r3
 8025202:	d108      	bne.n	8025216 <etharp_output+0x14a>
          /* the per-pcb-cached entry is stable and the right one! */
          ETHARP_STATS_INC(etharp.cachehit);
          return etharp_output_to_arp_index(netif, q, etharp_cached_entry);
 8025204:	4b31      	ldr	r3, [pc, #196]	@ (80252cc <etharp_output+0x200>)
 8025206:	781b      	ldrb	r3, [r3, #0]
 8025208:	461a      	mov	r2, r3
 802520a:	68b9      	ldr	r1, [r7, #8]
 802520c:	68f8      	ldr	r0, [r7, #12]
 802520e:	f7ff fec3 	bl	8024f98 <etharp_output_to_arp_index>
 8025212:	4603      	mov	r3, r0
 8025214:	e04a      	b.n	80252ac <etharp_output+0x1e0>
    }
#endif /* LWIP_NETIF_HWADDRHINT */

    /* find stable entry: do this here since this is a critical path for
       throughput and etharp_find_entry() is kind of slow */
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 8025216:	2300      	movs	r3, #0
 8025218:	75fb      	strb	r3, [r7, #23]
 802521a:	e031      	b.n	8025280 <etharp_output+0x1b4>
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 802521c:	7dfa      	ldrb	r2, [r7, #23]
 802521e:	492c      	ldr	r1, [pc, #176]	@ (80252d0 <etharp_output+0x204>)
 8025220:	4613      	mov	r3, r2
 8025222:	005b      	lsls	r3, r3, #1
 8025224:	4413      	add	r3, r2
 8025226:	00db      	lsls	r3, r3, #3
 8025228:	440b      	add	r3, r1
 802522a:	3314      	adds	r3, #20
 802522c:	781b      	ldrb	r3, [r3, #0]
 802522e:	2b01      	cmp	r3, #1
 8025230:	d923      	bls.n	802527a <etharp_output+0x1ae>
#if ETHARP_TABLE_MATCH_NETIF
          (arp_table[i].netif == netif) &&
 8025232:	7dfa      	ldrb	r2, [r7, #23]
 8025234:	4926      	ldr	r1, [pc, #152]	@ (80252d0 <etharp_output+0x204>)
 8025236:	4613      	mov	r3, r2
 8025238:	005b      	lsls	r3, r3, #1
 802523a:	4413      	add	r3, r2
 802523c:	00db      	lsls	r3, r3, #3
 802523e:	440b      	add	r3, r1
 8025240:	3308      	adds	r3, #8
 8025242:	681b      	ldr	r3, [r3, #0]
      if ((arp_table[i].state >= ETHARP_STATE_STABLE) &&
 8025244:	68fa      	ldr	r2, [r7, #12]
 8025246:	429a      	cmp	r2, r3
 8025248:	d117      	bne.n	802527a <etharp_output+0x1ae>
#endif
          (ip4_addr_cmp(dst_addr, &arp_table[i].ipaddr))) {
 802524a:	69bb      	ldr	r3, [r7, #24]
 802524c:	6819      	ldr	r1, [r3, #0]
 802524e:	7dfa      	ldrb	r2, [r7, #23]
 8025250:	481f      	ldr	r0, [pc, #124]	@ (80252d0 <etharp_output+0x204>)
 8025252:	4613      	mov	r3, r2
 8025254:	005b      	lsls	r3, r3, #1
 8025256:	4413      	add	r3, r2
 8025258:	00db      	lsls	r3, r3, #3
 802525a:	4403      	add	r3, r0
 802525c:	3304      	adds	r3, #4
 802525e:	681b      	ldr	r3, [r3, #0]
          (arp_table[i].netif == netif) &&
 8025260:	4299      	cmp	r1, r3
 8025262:	d10a      	bne.n	802527a <etharp_output+0x1ae>
        /* found an existing, stable entry */
        ETHARP_SET_ADDRHINT(netif, i);
 8025264:	4a19      	ldr	r2, [pc, #100]	@ (80252cc <etharp_output+0x200>)
 8025266:	7dfb      	ldrb	r3, [r7, #23]
 8025268:	7013      	strb	r3, [r2, #0]
        return etharp_output_to_arp_index(netif, q, i);
 802526a:	7dfb      	ldrb	r3, [r7, #23]
 802526c:	461a      	mov	r2, r3
 802526e:	68b9      	ldr	r1, [r7, #8]
 8025270:	68f8      	ldr	r0, [r7, #12]
 8025272:	f7ff fe91 	bl	8024f98 <etharp_output_to_arp_index>
 8025276:	4603      	mov	r3, r0
 8025278:	e018      	b.n	80252ac <etharp_output+0x1e0>
    for (i = 0; i < ARP_TABLE_SIZE; i++) {
 802527a:	7dfb      	ldrb	r3, [r7, #23]
 802527c:	3301      	adds	r3, #1
 802527e:	75fb      	strb	r3, [r7, #23]
 8025280:	7dfb      	ldrb	r3, [r7, #23]
 8025282:	2b09      	cmp	r3, #9
 8025284:	d9ca      	bls.n	802521c <etharp_output+0x150>
      }
    }
    /* no stable entry found, use the (slower) query function:
       queue on destination Ethernet address belonging to ipaddr */
    return etharp_query(netif, dst_addr, q);
 8025286:	68ba      	ldr	r2, [r7, #8]
 8025288:	69b9      	ldr	r1, [r7, #24]
 802528a:	68f8      	ldr	r0, [r7, #12]
 802528c:	f000 f822 	bl	80252d4 <etharp_query>
 8025290:	4603      	mov	r3, r0
 8025292:	e00b      	b.n	80252ac <etharp_output+0x1e0>
  }

  /* continuation for multicast/broadcast destinations */
  /* obtain source Ethernet address of the given interface */
  /* send packet directly on the link */
  return ethernet_output(netif, q, (struct eth_addr *)(netif->hwaddr), dest, ETHTYPE_IP);
 8025294:	68fb      	ldr	r3, [r7, #12]
 8025296:	f103 022a 	add.w	r2, r3, #42	@ 0x2a
 802529a:	f44f 6300 	mov.w	r3, #2048	@ 0x800
 802529e:	9300      	str	r3, [sp, #0]
 80252a0:	69fb      	ldr	r3, [r7, #28]
 80252a2:	68b9      	ldr	r1, [r7, #8]
 80252a4:	68f8      	ldr	r0, [r7, #12]
 80252a6:	f001 ff61 	bl	802716c <ethernet_output>
 80252aa:	4603      	mov	r3, r0
}
 80252ac:	4618      	mov	r0, r3
 80252ae:	3720      	adds	r7, #32
 80252b0:	46bd      	mov	sp, r7
 80252b2:	bd80      	pop	{r7, pc}
 80252b4:	0803146c 	.word	0x0803146c
 80252b8:	080315bc 	.word	0x080315bc
 80252bc:	080314e4 	.word	0x080314e4
 80252c0:	0803160c 	.word	0x0803160c
 80252c4:	080315ac 	.word	0x080315ac
 80252c8:	08031f00 	.word	0x08031f00
 80252cc:	2402b130 	.word	0x2402b130
 80252d0:	2402b040 	.word	0x2402b040

080252d4 <etharp_query>:
 * - ERR_ARG Non-unicast address given, those will not appear in ARP cache.
 *
 */
err_t
etharp_query(struct netif *netif, const ip4_addr_t *ipaddr, struct pbuf *q)
{
 80252d4:	b580      	push	{r7, lr}
 80252d6:	b08c      	sub	sp, #48	@ 0x30
 80252d8:	af02      	add	r7, sp, #8
 80252da:	60f8      	str	r0, [r7, #12]
 80252dc:	60b9      	str	r1, [r7, #8]
 80252de:	607a      	str	r2, [r7, #4]
  struct eth_addr *srcaddr = (struct eth_addr *)netif->hwaddr;
 80252e0:	68fb      	ldr	r3, [r7, #12]
 80252e2:	332a      	adds	r3, #42	@ 0x2a
 80252e4:	617b      	str	r3, [r7, #20]
  err_t result = ERR_MEM;
 80252e6:	23ff      	movs	r3, #255	@ 0xff
 80252e8:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
  int is_new_entry = 0;
 80252ec:	2300      	movs	r3, #0
 80252ee:	623b      	str	r3, [r7, #32]
  s16_t i_err;
  netif_addr_idx_t i;

  /* non-unicast address? */
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 80252f0:	68bb      	ldr	r3, [r7, #8]
 80252f2:	681b      	ldr	r3, [r3, #0]
 80252f4:	68f9      	ldr	r1, [r7, #12]
 80252f6:	4618      	mov	r0, r3
 80252f8:	f000 fe5a 	bl	8025fb0 <ip4_addr_isbroadcast_u32>
 80252fc:	4603      	mov	r3, r0
 80252fe:	2b00      	cmp	r3, #0
 8025300:	d10c      	bne.n	802531c <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 8025302:	68bb      	ldr	r3, [r7, #8]
 8025304:	681b      	ldr	r3, [r3, #0]
 8025306:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
  if (ip4_addr_isbroadcast(ipaddr, netif) ||
 802530a:	2be0      	cmp	r3, #224	@ 0xe0
 802530c:	d006      	beq.n	802531c <etharp_query+0x48>
      ip4_addr_ismulticast(ipaddr) ||
 802530e:	68bb      	ldr	r3, [r7, #8]
 8025310:	2b00      	cmp	r3, #0
 8025312:	d003      	beq.n	802531c <etharp_query+0x48>
      ip4_addr_isany(ipaddr)) {
 8025314:	68bb      	ldr	r3, [r7, #8]
 8025316:	681b      	ldr	r3, [r3, #0]
 8025318:	2b00      	cmp	r3, #0
 802531a:	d102      	bne.n	8025322 <etharp_query+0x4e>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n"));
    return ERR_ARG;
 802531c:	f06f 030f 	mvn.w	r3, #15
 8025320:	e101      	b.n	8025526 <etharp_query+0x252>
  }

  /* find entry in ARP cache, ask to create entry if queueing packet */
  i_err = etharp_find_entry(ipaddr, ETHARP_FLAG_TRY_HARD, netif);
 8025322:	68fa      	ldr	r2, [r7, #12]
 8025324:	2101      	movs	r1, #1
 8025326:	68b8      	ldr	r0, [r7, #8]
 8025328:	f7ff fb58 	bl	80249dc <etharp_find_entry>
 802532c:	4603      	mov	r3, r0
 802532e:	827b      	strh	r3, [r7, #18]

  /* could not find or create entry? */
  if (i_err < 0) {
 8025330:	f9b7 3012 	ldrsh.w	r3, [r7, #18]
 8025334:	2b00      	cmp	r3, #0
 8025336:	da02      	bge.n	802533e <etharp_query+0x6a>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n"));
    if (q) {
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n"));
      ETHARP_STATS_INC(etharp.memerr);
    }
    return (err_t)i_err;
 8025338:	8a7b      	ldrh	r3, [r7, #18]
 802533a:	b25b      	sxtb	r3, r3
 802533c:	e0f3      	b.n	8025526 <etharp_query+0x252>
  }
  LWIP_ASSERT("type overflow", (size_t)i_err < NETIF_ADDR_IDX_MAX);
 802533e:	8a7b      	ldrh	r3, [r7, #18]
 8025340:	2b7e      	cmp	r3, #126	@ 0x7e
 8025342:	d906      	bls.n	8025352 <etharp_query+0x7e>
 8025344:	4b7a      	ldr	r3, [pc, #488]	@ (8025530 <etharp_query+0x25c>)
 8025346:	f240 32c1 	movw	r2, #961	@ 0x3c1
 802534a:	497a      	ldr	r1, [pc, #488]	@ (8025534 <etharp_query+0x260>)
 802534c:	487a      	ldr	r0, [pc, #488]	@ (8025538 <etharp_query+0x264>)
 802534e:	f005 fb85 	bl	802aa5c <iprintf>
  i = (netif_addr_idx_t)i_err;
 8025352:	8a7b      	ldrh	r3, [r7, #18]
 8025354:	747b      	strb	r3, [r7, #17]

  /* mark a fresh entry as pending (we just sent a request) */
  if (arp_table[i].state == ETHARP_STATE_EMPTY) {
 8025356:	7c7a      	ldrb	r2, [r7, #17]
 8025358:	4978      	ldr	r1, [pc, #480]	@ (802553c <etharp_query+0x268>)
 802535a:	4613      	mov	r3, r2
 802535c:	005b      	lsls	r3, r3, #1
 802535e:	4413      	add	r3, r2
 8025360:	00db      	lsls	r3, r3, #3
 8025362:	440b      	add	r3, r1
 8025364:	3314      	adds	r3, #20
 8025366:	781b      	ldrb	r3, [r3, #0]
 8025368:	2b00      	cmp	r3, #0
 802536a:	d115      	bne.n	8025398 <etharp_query+0xc4>
    is_new_entry = 1;
 802536c:	2301      	movs	r3, #1
 802536e:	623b      	str	r3, [r7, #32]
    arp_table[i].state = ETHARP_STATE_PENDING;
 8025370:	7c7a      	ldrb	r2, [r7, #17]
 8025372:	4972      	ldr	r1, [pc, #456]	@ (802553c <etharp_query+0x268>)
 8025374:	4613      	mov	r3, r2
 8025376:	005b      	lsls	r3, r3, #1
 8025378:	4413      	add	r3, r2
 802537a:	00db      	lsls	r3, r3, #3
 802537c:	440b      	add	r3, r1
 802537e:	3314      	adds	r3, #20
 8025380:	2201      	movs	r2, #1
 8025382:	701a      	strb	r2, [r3, #0]
    /* record network interface for re-sending arp request in etharp_tmr */
    arp_table[i].netif = netif;
 8025384:	7c7a      	ldrb	r2, [r7, #17]
 8025386:	496d      	ldr	r1, [pc, #436]	@ (802553c <etharp_query+0x268>)
 8025388:	4613      	mov	r3, r2
 802538a:	005b      	lsls	r3, r3, #1
 802538c:	4413      	add	r3, r2
 802538e:	00db      	lsls	r3, r3, #3
 8025390:	440b      	add	r3, r1
 8025392:	3308      	adds	r3, #8
 8025394:	68fa      	ldr	r2, [r7, #12]
 8025396:	601a      	str	r2, [r3, #0]
  }

  /* { i is either a STABLE or (new or existing) PENDING entry } */
  LWIP_ASSERT("arp_table[i].state == PENDING or STABLE",
 8025398:	7c7a      	ldrb	r2, [r7, #17]
 802539a:	4968      	ldr	r1, [pc, #416]	@ (802553c <etharp_query+0x268>)
 802539c:	4613      	mov	r3, r2
 802539e:	005b      	lsls	r3, r3, #1
 80253a0:	4413      	add	r3, r2
 80253a2:	00db      	lsls	r3, r3, #3
 80253a4:	440b      	add	r3, r1
 80253a6:	3314      	adds	r3, #20
 80253a8:	781b      	ldrb	r3, [r3, #0]
 80253aa:	2b01      	cmp	r3, #1
 80253ac:	d011      	beq.n	80253d2 <etharp_query+0xfe>
 80253ae:	7c7a      	ldrb	r2, [r7, #17]
 80253b0:	4962      	ldr	r1, [pc, #392]	@ (802553c <etharp_query+0x268>)
 80253b2:	4613      	mov	r3, r2
 80253b4:	005b      	lsls	r3, r3, #1
 80253b6:	4413      	add	r3, r2
 80253b8:	00db      	lsls	r3, r3, #3
 80253ba:	440b      	add	r3, r1
 80253bc:	3314      	adds	r3, #20
 80253be:	781b      	ldrb	r3, [r3, #0]
 80253c0:	2b01      	cmp	r3, #1
 80253c2:	d806      	bhi.n	80253d2 <etharp_query+0xfe>
 80253c4:	4b5a      	ldr	r3, [pc, #360]	@ (8025530 <etharp_query+0x25c>)
 80253c6:	f240 32cd 	movw	r2, #973	@ 0x3cd
 80253ca:	495d      	ldr	r1, [pc, #372]	@ (8025540 <etharp_query+0x26c>)
 80253cc:	485a      	ldr	r0, [pc, #360]	@ (8025538 <etharp_query+0x264>)
 80253ce:	f005 fb45 	bl	802aa5c <iprintf>
              ((arp_table[i].state == ETHARP_STATE_PENDING) ||
               (arp_table[i].state >= ETHARP_STATE_STABLE)));

  /* do we have a new entry? or an implicit query request? */
  if (is_new_entry || (q == NULL)) {
 80253d2:	6a3b      	ldr	r3, [r7, #32]
 80253d4:	2b00      	cmp	r3, #0
 80253d6:	d102      	bne.n	80253de <etharp_query+0x10a>
 80253d8:	687b      	ldr	r3, [r7, #4]
 80253da:	2b00      	cmp	r3, #0
 80253dc:	d10c      	bne.n	80253f8 <etharp_query+0x124>
    /* try to resolve it; send out ARP request */
    result = etharp_request(netif, ipaddr);
 80253de:	68b9      	ldr	r1, [r7, #8]
 80253e0:	68f8      	ldr	r0, [r7, #12]
 80253e2:	f000 f963 	bl	80256ac <etharp_request>
 80253e6:	4603      	mov	r3, r0
 80253e8:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
      /* ARP request couldn't be sent */
      /* We don't re-send arp request in etharp_tmr, but we still queue packets,
         since this failure could be temporary, and the next packet calling
         etharp_query again could lead to sending the queued packets. */
    }
    if (q == NULL) {
 80253ec:	687b      	ldr	r3, [r7, #4]
 80253ee:	2b00      	cmp	r3, #0
 80253f0:	d102      	bne.n	80253f8 <etharp_query+0x124>
      return result;
 80253f2:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
 80253f6:	e096      	b.n	8025526 <etharp_query+0x252>
    }
  }

  /* packet given? */
  LWIP_ASSERT("q != NULL", q != NULL);
 80253f8:	687b      	ldr	r3, [r7, #4]
 80253fa:	2b00      	cmp	r3, #0
 80253fc:	d106      	bne.n	802540c <etharp_query+0x138>
 80253fe:	4b4c      	ldr	r3, [pc, #304]	@ (8025530 <etharp_query+0x25c>)
 8025400:	f240 32e1 	movw	r2, #993	@ 0x3e1
 8025404:	494f      	ldr	r1, [pc, #316]	@ (8025544 <etharp_query+0x270>)
 8025406:	484c      	ldr	r0, [pc, #304]	@ (8025538 <etharp_query+0x264>)
 8025408:	f005 fb28 	bl	802aa5c <iprintf>
  /* stable entry? */
  if (arp_table[i].state >= ETHARP_STATE_STABLE) {
 802540c:	7c7a      	ldrb	r2, [r7, #17]
 802540e:	494b      	ldr	r1, [pc, #300]	@ (802553c <etharp_query+0x268>)
 8025410:	4613      	mov	r3, r2
 8025412:	005b      	lsls	r3, r3, #1
 8025414:	4413      	add	r3, r2
 8025416:	00db      	lsls	r3, r3, #3
 8025418:	440b      	add	r3, r1
 802541a:	3314      	adds	r3, #20
 802541c:	781b      	ldrb	r3, [r3, #0]
 802541e:	2b01      	cmp	r3, #1
 8025420:	d917      	bls.n	8025452 <etharp_query+0x17e>
    /* we have a valid IP->Ethernet address mapping */
    ETHARP_SET_ADDRHINT(netif, i);
 8025422:	4a49      	ldr	r2, [pc, #292]	@ (8025548 <etharp_query+0x274>)
 8025424:	7c7b      	ldrb	r3, [r7, #17]
 8025426:	7013      	strb	r3, [r2, #0]
    /* send the packet */
    result = ethernet_output(netif, q, srcaddr, &(arp_table[i].ethaddr), ETHTYPE_IP);
 8025428:	7c7a      	ldrb	r2, [r7, #17]
 802542a:	4613      	mov	r3, r2
 802542c:	005b      	lsls	r3, r3, #1
 802542e:	4413      	add	r3, r2
 8025430:	00db      	lsls	r3, r3, #3
 8025432:	3308      	adds	r3, #8
 8025434:	4a41      	ldr	r2, [pc, #260]	@ (802553c <etharp_query+0x268>)
 8025436:	4413      	add	r3, r2
 8025438:	3304      	adds	r3, #4
 802543a:	f44f 6200 	mov.w	r2, #2048	@ 0x800
 802543e:	9200      	str	r2, [sp, #0]
 8025440:	697a      	ldr	r2, [r7, #20]
 8025442:	6879      	ldr	r1, [r7, #4]
 8025444:	68f8      	ldr	r0, [r7, #12]
 8025446:	f001 fe91 	bl	802716c <ethernet_output>
 802544a:	4603      	mov	r3, r0
 802544c:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 8025450:	e067      	b.n	8025522 <etharp_query+0x24e>
    /* pending entry? (either just created or already pending */
  } else if (arp_table[i].state == ETHARP_STATE_PENDING) {
 8025452:	7c7a      	ldrb	r2, [r7, #17]
 8025454:	4939      	ldr	r1, [pc, #228]	@ (802553c <etharp_query+0x268>)
 8025456:	4613      	mov	r3, r2
 8025458:	005b      	lsls	r3, r3, #1
 802545a:	4413      	add	r3, r2
 802545c:	00db      	lsls	r3, r3, #3
 802545e:	440b      	add	r3, r1
 8025460:	3314      	adds	r3, #20
 8025462:	781b      	ldrb	r3, [r3, #0]
 8025464:	2b01      	cmp	r3, #1
 8025466:	d15c      	bne.n	8025522 <etharp_query+0x24e>
    /* entry is still pending, queue the given packet 'q' */
    struct pbuf *p;
    int copy_needed = 0;
 8025468:	2300      	movs	r3, #0
 802546a:	61bb      	str	r3, [r7, #24]
    /* IF q includes a pbuf that must be copied, copy the whole chain into a
     * new PBUF_RAM. See the definition of PBUF_NEEDS_COPY for details. */
    p = q;
 802546c:	687b      	ldr	r3, [r7, #4]
 802546e:	61fb      	str	r3, [r7, #28]
    while (p) {
 8025470:	e01c      	b.n	80254ac <etharp_query+0x1d8>
      LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0));
 8025472:	69fb      	ldr	r3, [r7, #28]
 8025474:	895a      	ldrh	r2, [r3, #10]
 8025476:	69fb      	ldr	r3, [r7, #28]
 8025478:	891b      	ldrh	r3, [r3, #8]
 802547a:	429a      	cmp	r2, r3
 802547c:	d10a      	bne.n	8025494 <etharp_query+0x1c0>
 802547e:	69fb      	ldr	r3, [r7, #28]
 8025480:	681b      	ldr	r3, [r3, #0]
 8025482:	2b00      	cmp	r3, #0
 8025484:	d006      	beq.n	8025494 <etharp_query+0x1c0>
 8025486:	4b2a      	ldr	r3, [pc, #168]	@ (8025530 <etharp_query+0x25c>)
 8025488:	f240 32f1 	movw	r2, #1009	@ 0x3f1
 802548c:	492f      	ldr	r1, [pc, #188]	@ (802554c <etharp_query+0x278>)
 802548e:	482a      	ldr	r0, [pc, #168]	@ (8025538 <etharp_query+0x264>)
 8025490:	f005 fae4 	bl	802aa5c <iprintf>
      if (PBUF_NEEDS_COPY(p)) {
 8025494:	69fb      	ldr	r3, [r7, #28]
 8025496:	7b1b      	ldrb	r3, [r3, #12]
 8025498:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 802549c:	2b00      	cmp	r3, #0
 802549e:	d002      	beq.n	80254a6 <etharp_query+0x1d2>
        copy_needed = 1;
 80254a0:	2301      	movs	r3, #1
 80254a2:	61bb      	str	r3, [r7, #24]
        break;
 80254a4:	e005      	b.n	80254b2 <etharp_query+0x1de>
      }
      p = p->next;
 80254a6:	69fb      	ldr	r3, [r7, #28]
 80254a8:	681b      	ldr	r3, [r3, #0]
 80254aa:	61fb      	str	r3, [r7, #28]
    while (p) {
 80254ac:	69fb      	ldr	r3, [r7, #28]
 80254ae:	2b00      	cmp	r3, #0
 80254b0:	d1df      	bne.n	8025472 <etharp_query+0x19e>
    }
    if (copy_needed) {
 80254b2:	69bb      	ldr	r3, [r7, #24]
 80254b4:	2b00      	cmp	r3, #0
 80254b6:	d007      	beq.n	80254c8 <etharp_query+0x1f4>
      /* copy the whole packet into new pbufs */
      p = pbuf_clone(PBUF_LINK, PBUF_RAM, q);
 80254b8:	687a      	ldr	r2, [r7, #4]
 80254ba:	f44f 7120 	mov.w	r1, #640	@ 0x280
 80254be:	200e      	movs	r0, #14
 80254c0:	f7f6 facc 	bl	801ba5c <pbuf_clone>
 80254c4:	61f8      	str	r0, [r7, #28]
 80254c6:	e004      	b.n	80254d2 <etharp_query+0x1fe>
    } else {
      /* referencing the old pbuf is enough */
      p = q;
 80254c8:	687b      	ldr	r3, [r7, #4]
 80254ca:	61fb      	str	r3, [r7, #28]
      pbuf_ref(p);
 80254cc:	69f8      	ldr	r0, [r7, #28]
 80254ce:	f7f6 f8f3 	bl	801b6b8 <pbuf_ref>
    }
    /* packet could be taken over? */
    if (p != NULL) {
 80254d2:	69fb      	ldr	r3, [r7, #28]
 80254d4:	2b00      	cmp	r3, #0
 80254d6:	d021      	beq.n	802551c <etharp_query+0x248>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
        result = ERR_MEM;
      }
#else /* ARP_QUEUEING */
      /* always queue one packet per ARP request only, freeing a previously queued packet */
      if (arp_table[i].q != NULL) {
 80254d8:	7c7a      	ldrb	r2, [r7, #17]
 80254da:	4918      	ldr	r1, [pc, #96]	@ (802553c <etharp_query+0x268>)
 80254dc:	4613      	mov	r3, r2
 80254de:	005b      	lsls	r3, r3, #1
 80254e0:	4413      	add	r3, r2
 80254e2:	00db      	lsls	r3, r3, #3
 80254e4:	440b      	add	r3, r1
 80254e6:	681b      	ldr	r3, [r3, #0]
 80254e8:	2b00      	cmp	r3, #0
 80254ea:	d00a      	beq.n	8025502 <etharp_query+0x22e>
        LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: dropped previously queued packet %p for ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
        pbuf_free(arp_table[i].q);
 80254ec:	7c7a      	ldrb	r2, [r7, #17]
 80254ee:	4913      	ldr	r1, [pc, #76]	@ (802553c <etharp_query+0x268>)
 80254f0:	4613      	mov	r3, r2
 80254f2:	005b      	lsls	r3, r3, #1
 80254f4:	4413      	add	r3, r2
 80254f6:	00db      	lsls	r3, r3, #3
 80254f8:	440b      	add	r3, r1
 80254fa:	681b      	ldr	r3, [r3, #0]
 80254fc:	4618      	mov	r0, r3
 80254fe:	f7f6 f835 	bl	801b56c <pbuf_free>
      }
      arp_table[i].q = p;
 8025502:	7c7a      	ldrb	r2, [r7, #17]
 8025504:	490d      	ldr	r1, [pc, #52]	@ (802553c <etharp_query+0x268>)
 8025506:	4613      	mov	r3, r2
 8025508:	005b      	lsls	r3, r3, #1
 802550a:	4413      	add	r3, r2
 802550c:	00db      	lsls	r3, r3, #3
 802550e:	440b      	add	r3, r1
 8025510:	69fa      	ldr	r2, [r7, #28]
 8025512:	601a      	str	r2, [r3, #0]
      result = ERR_OK;
 8025514:	2300      	movs	r3, #0
 8025516:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 802551a:	e002      	b.n	8025522 <etharp_query+0x24e>
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"U16_F"\n", (void *)q, (u16_t)i));
#endif /* ARP_QUEUEING */
    } else {
      ETHARP_STATS_INC(etharp.memerr);
      LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q));
      result = ERR_MEM;
 802551c:	23ff      	movs	r3, #255	@ 0xff
 802551e:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
    }
  }
  return result;
 8025522:	f997 3027 	ldrsb.w	r3, [r7, #39]	@ 0x27
}
 8025526:	4618      	mov	r0, r3
 8025528:	3728      	adds	r7, #40	@ 0x28
 802552a:	46bd      	mov	sp, r7
 802552c:	bd80      	pop	{r7, pc}
 802552e:	bf00      	nop
 8025530:	0803146c 	.word	0x0803146c
 8025534:	08031618 	.word	0x08031618
 8025538:	080314e4 	.word	0x080314e4
 802553c:	2402b040 	.word	0x2402b040
 8025540:	08031628 	.word	0x08031628
 8025544:	0803160c 	.word	0x0803160c
 8025548:	2402b130 	.word	0x2402b130
 802554c:	08031650 	.word	0x08031650

08025550 <etharp_raw>:
etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr,
           const struct eth_addr *ethdst_addr,
           const struct eth_addr *hwsrc_addr, const ip4_addr_t *ipsrc_addr,
           const struct eth_addr *hwdst_addr, const ip4_addr_t *ipdst_addr,
           const u16_t opcode)
{
 8025550:	b580      	push	{r7, lr}
 8025552:	b08a      	sub	sp, #40	@ 0x28
 8025554:	af02      	add	r7, sp, #8
 8025556:	60f8      	str	r0, [r7, #12]
 8025558:	60b9      	str	r1, [r7, #8]
 802555a:	607a      	str	r2, [r7, #4]
 802555c:	603b      	str	r3, [r7, #0]
  struct pbuf *p;
  err_t result = ERR_OK;
 802555e:	2300      	movs	r3, #0
 8025560:	77fb      	strb	r3, [r7, #31]
  struct etharp_hdr *hdr;

  LWIP_ASSERT("netif != NULL", netif != NULL);
 8025562:	68fb      	ldr	r3, [r7, #12]
 8025564:	2b00      	cmp	r3, #0
 8025566:	d106      	bne.n	8025576 <etharp_raw+0x26>
 8025568:	4b3a      	ldr	r3, [pc, #232]	@ (8025654 <etharp_raw+0x104>)
 802556a:	f240 4257 	movw	r2, #1111	@ 0x457
 802556e:	493a      	ldr	r1, [pc, #232]	@ (8025658 <etharp_raw+0x108>)
 8025570:	483a      	ldr	r0, [pc, #232]	@ (802565c <etharp_raw+0x10c>)
 8025572:	f005 fa73 	bl	802aa5c <iprintf>

  /* allocate a pbuf for the outgoing ARP request packet */
  p = pbuf_alloc(PBUF_LINK, SIZEOF_ETHARP_HDR, PBUF_RAM);
 8025576:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802557a:	211c      	movs	r1, #28
 802557c:	200e      	movs	r0, #14
 802557e:	f7f5 fcdf 	bl	801af40 <pbuf_alloc>
 8025582:	61b8      	str	r0, [r7, #24]
  /* could allocate a pbuf for an ARP request? */
  if (p == NULL) {
 8025584:	69bb      	ldr	r3, [r7, #24]
 8025586:	2b00      	cmp	r3, #0
 8025588:	d102      	bne.n	8025590 <etharp_raw+0x40>
    LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
                ("etharp_raw: could not allocate pbuf for ARP request.\n"));
    ETHARP_STATS_INC(etharp.memerr);
    return ERR_MEM;
 802558a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802558e:	e05d      	b.n	802564c <etharp_raw+0xfc>
  }
  LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr",
 8025590:	69bb      	ldr	r3, [r7, #24]
 8025592:	895b      	ldrh	r3, [r3, #10]
 8025594:	2b1b      	cmp	r3, #27
 8025596:	d806      	bhi.n	80255a6 <etharp_raw+0x56>
 8025598:	4b2e      	ldr	r3, [pc, #184]	@ (8025654 <etharp_raw+0x104>)
 802559a:	f240 4262 	movw	r2, #1122	@ 0x462
 802559e:	4930      	ldr	r1, [pc, #192]	@ (8025660 <etharp_raw+0x110>)
 80255a0:	482e      	ldr	r0, [pc, #184]	@ (802565c <etharp_raw+0x10c>)
 80255a2:	f005 fa5b 	bl	802aa5c <iprintf>
              (p->len >= SIZEOF_ETHARP_HDR));

  hdr = (struct etharp_hdr *)p->payload;
 80255a6:	69bb      	ldr	r3, [r7, #24]
 80255a8:	685b      	ldr	r3, [r3, #4]
 80255aa:	617b      	str	r3, [r7, #20]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n"));
  hdr->opcode = lwip_htons(opcode);
 80255ac:	8ebb      	ldrh	r3, [r7, #52]	@ 0x34
 80255ae:	4618      	mov	r0, r3
 80255b0:	f7f4 fafa 	bl	8019ba8 <lwip_htons>
 80255b4:	4603      	mov	r3, r0
 80255b6:	461a      	mov	r2, r3
 80255b8:	697b      	ldr	r3, [r7, #20]
 80255ba:	80da      	strh	r2, [r3, #6]

  LWIP_ASSERT("netif->hwaddr_len must be the same as ETH_HWADDR_LEN for etharp!",
 80255bc:	68fb      	ldr	r3, [r7, #12]
 80255be:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 80255c2:	2b06      	cmp	r3, #6
 80255c4:	d006      	beq.n	80255d4 <etharp_raw+0x84>
 80255c6:	4b23      	ldr	r3, [pc, #140]	@ (8025654 <etharp_raw+0x104>)
 80255c8:	f240 4269 	movw	r2, #1129	@ 0x469
 80255cc:	4925      	ldr	r1, [pc, #148]	@ (8025664 <etharp_raw+0x114>)
 80255ce:	4823      	ldr	r0, [pc, #140]	@ (802565c <etharp_raw+0x10c>)
 80255d0:	f005 fa44 	bl	802aa5c <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));

  /* Write the ARP MAC-Addresses */
  SMEMCPY(&hdr->shwaddr, hwsrc_addr, ETH_HWADDR_LEN);
 80255d4:	697b      	ldr	r3, [r7, #20]
 80255d6:	3308      	adds	r3, #8
 80255d8:	2206      	movs	r2, #6
 80255da:	6839      	ldr	r1, [r7, #0]
 80255dc:	4618      	mov	r0, r3
 80255de:	f005 fcc6 	bl	802af6e <memcpy>
  SMEMCPY(&hdr->dhwaddr, hwdst_addr, ETH_HWADDR_LEN);
 80255e2:	697b      	ldr	r3, [r7, #20]
 80255e4:	3312      	adds	r3, #18
 80255e6:	2206      	movs	r2, #6
 80255e8:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 80255ea:	4618      	mov	r0, r3
 80255ec:	f005 fcbf 	bl	802af6e <memcpy>
  /* Copy struct ip4_addr_wordaligned to aligned ip4_addr, to support compilers without
   * structure packing. */
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->sipaddr, ipsrc_addr);
 80255f0:	697b      	ldr	r3, [r7, #20]
 80255f2:	330e      	adds	r3, #14
 80255f4:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80255f6:	6812      	ldr	r2, [r2, #0]
 80255f8:	601a      	str	r2, [r3, #0]
  IPADDR_WORDALIGNED_COPY_FROM_IP4_ADDR_T(&hdr->dipaddr, ipdst_addr);
 80255fa:	697b      	ldr	r3, [r7, #20]
 80255fc:	3318      	adds	r3, #24
 80255fe:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8025600:	6812      	ldr	r2, [r2, #0]
 8025602:	601a      	str	r2, [r3, #0]

  hdr->hwtype = PP_HTONS(LWIP_IANA_HWTYPE_ETHERNET);
 8025604:	697b      	ldr	r3, [r7, #20]
 8025606:	2200      	movs	r2, #0
 8025608:	701a      	strb	r2, [r3, #0]
 802560a:	2200      	movs	r2, #0
 802560c:	f042 0201 	orr.w	r2, r2, #1
 8025610:	705a      	strb	r2, [r3, #1]
  hdr->proto = PP_HTONS(ETHTYPE_IP);
 8025612:	697b      	ldr	r3, [r7, #20]
 8025614:	2200      	movs	r2, #0
 8025616:	f042 0208 	orr.w	r2, r2, #8
 802561a:	709a      	strb	r2, [r3, #2]
 802561c:	2200      	movs	r2, #0
 802561e:	70da      	strb	r2, [r3, #3]
  /* set hwlen and protolen */
  hdr->hwlen = ETH_HWADDR_LEN;
 8025620:	697b      	ldr	r3, [r7, #20]
 8025622:	2206      	movs	r2, #6
 8025624:	711a      	strb	r2, [r3, #4]
  hdr->protolen = sizeof(ip4_addr_t);
 8025626:	697b      	ldr	r3, [r7, #20]
 8025628:	2204      	movs	r2, #4
 802562a:	715a      	strb	r2, [r3, #5]
  if (ip4_addr_islinklocal(ipsrc_addr)) {
    ethernet_output(netif, p, ethsrc_addr, &ethbroadcast, ETHTYPE_ARP);
  } else
#endif /* LWIP_AUTOIP */
  {
    ethernet_output(netif, p, ethsrc_addr, ethdst_addr, ETHTYPE_ARP);
 802562c:	f640 0306 	movw	r3, #2054	@ 0x806
 8025630:	9300      	str	r3, [sp, #0]
 8025632:	687b      	ldr	r3, [r7, #4]
 8025634:	68ba      	ldr	r2, [r7, #8]
 8025636:	69b9      	ldr	r1, [r7, #24]
 8025638:	68f8      	ldr	r0, [r7, #12]
 802563a:	f001 fd97 	bl	802716c <ethernet_output>
  }

  ETHARP_STATS_INC(etharp.xmit);
  /* free ARP query packet */
  pbuf_free(p);
 802563e:	69b8      	ldr	r0, [r7, #24]
 8025640:	f7f5 ff94 	bl	801b56c <pbuf_free>
  p = NULL;
 8025644:	2300      	movs	r3, #0
 8025646:	61bb      	str	r3, [r7, #24]
  /* could not allocate pbuf for ARP request */

  return result;
 8025648:	f997 301f 	ldrsb.w	r3, [r7, #31]
}
 802564c:	4618      	mov	r0, r3
 802564e:	3720      	adds	r7, #32
 8025650:	46bd      	mov	sp, r7
 8025652:	bd80      	pop	{r7, pc}
 8025654:	0803146c 	.word	0x0803146c
 8025658:	080315bc 	.word	0x080315bc
 802565c:	080314e4 	.word	0x080314e4
 8025660:	0803166c 	.word	0x0803166c
 8025664:	080316a0 	.word	0x080316a0

08025668 <etharp_request_dst>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
static err_t
etharp_request_dst(struct netif *netif, const ip4_addr_t *ipaddr, const struct eth_addr *hw_dst_addr)
{
 8025668:	b580      	push	{r7, lr}
 802566a:	b088      	sub	sp, #32
 802566c:	af04      	add	r7, sp, #16
 802566e:	60f8      	str	r0, [r7, #12]
 8025670:	60b9      	str	r1, [r7, #8]
 8025672:	607a      	str	r2, [r7, #4]
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 8025674:	68fb      	ldr	r3, [r7, #12]
 8025676:	f103 012a 	add.w	r1, r3, #42	@ 0x2a
                    (struct eth_addr *)netif->hwaddr, netif_ip4_addr(netif), &ethzero,
 802567a:	68fb      	ldr	r3, [r7, #12]
 802567c:	f103 002a 	add.w	r0, r3, #42	@ 0x2a
 8025680:	68fb      	ldr	r3, [r7, #12]
 8025682:	3304      	adds	r3, #4
  return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, hw_dst_addr,
 8025684:	2201      	movs	r2, #1
 8025686:	9203      	str	r2, [sp, #12]
 8025688:	68ba      	ldr	r2, [r7, #8]
 802568a:	9202      	str	r2, [sp, #8]
 802568c:	4a06      	ldr	r2, [pc, #24]	@ (80256a8 <etharp_request_dst+0x40>)
 802568e:	9201      	str	r2, [sp, #4]
 8025690:	9300      	str	r3, [sp, #0]
 8025692:	4603      	mov	r3, r0
 8025694:	687a      	ldr	r2, [r7, #4]
 8025696:	68f8      	ldr	r0, [r7, #12]
 8025698:	f7ff ff5a 	bl	8025550 <etharp_raw>
 802569c:	4603      	mov	r3, r0
                    ipaddr, ARP_REQUEST);
}
 802569e:	4618      	mov	r0, r3
 80256a0:	3710      	adds	r7, #16
 80256a2:	46bd      	mov	sp, r7
 80256a4:	bd80      	pop	{r7, pc}
 80256a6:	bf00      	nop
 80256a8:	08031f08 	.word	0x08031f08

080256ac <etharp_request>:
 *         ERR_MEM if the ARP packet couldn't be allocated
 *         any other err_t on failure
 */
err_t
etharp_request(struct netif *netif, const ip4_addr_t *ipaddr)
{
 80256ac:	b580      	push	{r7, lr}
 80256ae:	b082      	sub	sp, #8
 80256b0:	af00      	add	r7, sp, #0
 80256b2:	6078      	str	r0, [r7, #4]
 80256b4:	6039      	str	r1, [r7, #0]
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n"));
  return etharp_request_dst(netif, ipaddr, &ethbroadcast);
 80256b6:	4a05      	ldr	r2, [pc, #20]	@ (80256cc <etharp_request+0x20>)
 80256b8:	6839      	ldr	r1, [r7, #0]
 80256ba:	6878      	ldr	r0, [r7, #4]
 80256bc:	f7ff ffd4 	bl	8025668 <etharp_request_dst>
 80256c0:	4603      	mov	r3, r0
}
 80256c2:	4618      	mov	r0, r3
 80256c4:	3708      	adds	r7, #8
 80256c6:	46bd      	mov	sp, r7
 80256c8:	bd80      	pop	{r7, pc}
 80256ca:	bf00      	nop
 80256cc:	08031f00 	.word	0x08031f00

080256d0 <icmp_input>:
 * @param p the icmp echo request packet, p->payload pointing to the icmp header
 * @param inp the netif on which this packet was received
 */
void
icmp_input(struct pbuf *p, struct netif *inp)
{
 80256d0:	b580      	push	{r7, lr}
 80256d2:	b08e      	sub	sp, #56	@ 0x38
 80256d4:	af04      	add	r7, sp, #16
 80256d6:	6078      	str	r0, [r7, #4]
 80256d8:	6039      	str	r1, [r7, #0]
  const ip4_addr_t *src;

  ICMP_STATS_INC(icmp.recv);
  MIB2_STATS_INC(mib2.icmpinmsgs);

  iphdr_in = ip4_current_header();
 80256da:	4b89      	ldr	r3, [pc, #548]	@ (8025900 <icmp_input+0x230>)
 80256dc:	689b      	ldr	r3, [r3, #8]
 80256de:	627b      	str	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(iphdr_in);
 80256e0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80256e2:	781b      	ldrb	r3, [r3, #0]
 80256e4:	f003 030f 	and.w	r3, r3, #15
 80256e8:	b2db      	uxtb	r3, r3
 80256ea:	009b      	lsls	r3, r3, #2
 80256ec:	b2db      	uxtb	r3, r3
 80256ee:	847b      	strh	r3, [r7, #34]	@ 0x22
  if (hlen < IP_HLEN) {
 80256f0:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80256f2:	2b13      	cmp	r3, #19
 80256f4:	f240 80ed 	bls.w	80258d2 <icmp_input+0x202>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short IP header (%"S16_F" bytes) received\n", hlen));
    goto lenerr;
  }
  if (p->len < sizeof(u16_t) * 2) {
 80256f8:	687b      	ldr	r3, [r7, #4]
 80256fa:	895b      	ldrh	r3, [r3, #10]
 80256fc:	2b03      	cmp	r3, #3
 80256fe:	f240 80ea 	bls.w	80258d6 <icmp_input+0x206>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len));
    goto lenerr;
  }

  type = *((u8_t *)p->payload);
 8025702:	687b      	ldr	r3, [r7, #4]
 8025704:	685b      	ldr	r3, [r3, #4]
 8025706:	781b      	ldrb	r3, [r3, #0]
 8025708:	f887 3021 	strb.w	r3, [r7, #33]	@ 0x21
#ifdef LWIP_DEBUG
  code = *(((u8_t *)p->payload) + 1);
 802570c:	687b      	ldr	r3, [r7, #4]
 802570e:	685b      	ldr	r3, [r3, #4]
 8025710:	785b      	ldrb	r3, [r3, #1]
 8025712:	f887 3020 	strb.w	r3, [r7, #32]
  /* if debug is enabled but debug statement below is somehow disabled: */
  LWIP_UNUSED_ARG(code);
#endif /* LWIP_DEBUG */
  switch (type) {
 8025716:	f897 3021 	ldrb.w	r3, [r7, #33]	@ 0x21
 802571a:	2b00      	cmp	r3, #0
 802571c:	f000 80d2 	beq.w	80258c4 <icmp_input+0x1f4>
 8025720:	2b08      	cmp	r3, #8
 8025722:	f040 80d2 	bne.w	80258ca <icmp_input+0x1fa>
         (as obviously, an echo request has been sent, too). */
      MIB2_STATS_INC(mib2.icmpinechoreps);
      break;
    case ICMP_ECHO:
      MIB2_STATS_INC(mib2.icmpinechos);
      src = ip4_current_dest_addr();
 8025726:	4b77      	ldr	r3, [pc, #476]	@ (8025904 <icmp_input+0x234>)
 8025728:	61fb      	str	r3, [r7, #28]
      /* multicast destination address? */
      if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 802572a:	4b75      	ldr	r3, [pc, #468]	@ (8025900 <icmp_input+0x230>)
 802572c:	695b      	ldr	r3, [r3, #20]
 802572e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8025732:	2be0      	cmp	r3, #224	@ 0xe0
 8025734:	f000 80d6 	beq.w	80258e4 <icmp_input+0x214>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast pings\n"));
        goto icmperr;
#endif /* LWIP_MULTICAST_PING */
      }
      /* broadcast destination address? */
      if (ip4_addr_isbroadcast(ip4_current_dest_addr(), ip_current_netif())) {
 8025738:	4b71      	ldr	r3, [pc, #452]	@ (8025900 <icmp_input+0x230>)
 802573a:	695b      	ldr	r3, [r3, #20]
 802573c:	4a70      	ldr	r2, [pc, #448]	@ (8025900 <icmp_input+0x230>)
 802573e:	6812      	ldr	r2, [r2, #0]
 8025740:	4611      	mov	r1, r2
 8025742:	4618      	mov	r0, r3
 8025744:	f000 fc34 	bl	8025fb0 <ip4_addr_isbroadcast_u32>
 8025748:	4603      	mov	r3, r0
 802574a:	2b00      	cmp	r3, #0
 802574c:	f040 80cc 	bne.w	80258e8 <icmp_input+0x218>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to broadcast pings\n"));
        goto icmperr;
#endif /* LWIP_BROADCAST_PING */
      }
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n"));
      if (p->tot_len < sizeof(struct icmp_echo_hdr)) {
 8025750:	687b      	ldr	r3, [r7, #4]
 8025752:	891b      	ldrh	r3, [r3, #8]
 8025754:	2b07      	cmp	r3, #7
 8025756:	f240 80c0 	bls.w	80258da <icmp_input+0x20a>
        LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n"));
        goto lenerr;
      }
#if CHECKSUM_CHECK_ICMP
      IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_CHECK_ICMP) {
        if (inet_chksum_pbuf(p) != 0) {
 802575a:	6878      	ldr	r0, [r7, #4]
 802575c:	f7f4 fac1 	bl	8019ce2 <inet_chksum_pbuf>
 8025760:	4603      	mov	r3, r0
 8025762:	2b00      	cmp	r3, #0
 8025764:	d003      	beq.n	802576e <icmp_input+0x9e>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n"));
          pbuf_free(p);
 8025766:	6878      	ldr	r0, [r7, #4]
 8025768:	f7f5 ff00 	bl	801b56c <pbuf_free>
          ICMP_STATS_INC(icmp.chkerr);
          MIB2_STATS_INC(mib2.icmpinerrors);
          return;
 802576c:	e0c5      	b.n	80258fa <icmp_input+0x22a>
        }
      }
#endif
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
      if (pbuf_add_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 802576e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8025770:	330e      	adds	r3, #14
 8025772:	4619      	mov	r1, r3
 8025774:	6878      	ldr	r0, [r7, #4]
 8025776:	f7f5 fe31 	bl	801b3dc <pbuf_add_header>
 802577a:	4603      	mov	r3, r0
 802577c:	2b00      	cmp	r3, #0
 802577e:	d04b      	beq.n	8025818 <icmp_input+0x148>
        /* p is not big enough to contain link headers
         * allocate a new one and copy p into it
         */
        struct pbuf *r;
        u16_t alloc_len = (u16_t)(p->tot_len + hlen);
 8025780:	687b      	ldr	r3, [r7, #4]
 8025782:	891a      	ldrh	r2, [r3, #8]
 8025784:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8025786:	4413      	add	r3, r2
 8025788:	837b      	strh	r3, [r7, #26]
        if (alloc_len < p->tot_len) {
 802578a:	687b      	ldr	r3, [r7, #4]
 802578c:	891b      	ldrh	r3, [r3, #8]
 802578e:	8b7a      	ldrh	r2, [r7, #26]
 8025790:	429a      	cmp	r2, r3
 8025792:	f0c0 80ab 	bcc.w	80258ec <icmp_input+0x21c>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed (tot_len overflow)\n"));
          goto icmperr;
        }
        /* allocate new packet buffer with space for link headers */
        r = pbuf_alloc(PBUF_LINK, alloc_len, PBUF_RAM);
 8025796:	8b7b      	ldrh	r3, [r7, #26]
 8025798:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802579c:	4619      	mov	r1, r3
 802579e:	200e      	movs	r0, #14
 80257a0:	f7f5 fbce 	bl	801af40 <pbuf_alloc>
 80257a4:	6178      	str	r0, [r7, #20]
        if (r == NULL) {
 80257a6:	697b      	ldr	r3, [r7, #20]
 80257a8:	2b00      	cmp	r3, #0
 80257aa:	f000 80a1 	beq.w	80258f0 <icmp_input+0x220>
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n"));
          goto icmperr;
        }
        if (r->len < hlen + sizeof(struct icmp_echo_hdr)) {
 80257ae:	697b      	ldr	r3, [r7, #20]
 80257b0:	895b      	ldrh	r3, [r3, #10]
 80257b2:	461a      	mov	r2, r3
 80257b4:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80257b6:	3308      	adds	r3, #8
 80257b8:	429a      	cmp	r2, r3
 80257ba:	d203      	bcs.n	80257c4 <icmp_input+0xf4>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("first pbuf cannot hold the ICMP header"));
          pbuf_free(r);
 80257bc:	6978      	ldr	r0, [r7, #20]
 80257be:	f7f5 fed5 	bl	801b56c <pbuf_free>
          goto icmperr;
 80257c2:	e096      	b.n	80258f2 <icmp_input+0x222>
        }
        /* copy the ip header */
        MEMCPY(r->payload, iphdr_in, hlen);
 80257c4:	697b      	ldr	r3, [r7, #20]
 80257c6:	685b      	ldr	r3, [r3, #4]
 80257c8:	8c7a      	ldrh	r2, [r7, #34]	@ 0x22
 80257ca:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 80257cc:	4618      	mov	r0, r3
 80257ce:	f005 fbce 	bl	802af6e <memcpy>
        /* switch r->payload back to icmp header (cannot fail) */
        if (pbuf_remove_header(r, hlen)) {
 80257d2:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 80257d4:	4619      	mov	r1, r3
 80257d6:	6978      	ldr	r0, [r7, #20]
 80257d8:	f7f5 fe10 	bl	801b3fc <pbuf_remove_header>
 80257dc:	4603      	mov	r3, r0
 80257de:	2b00      	cmp	r3, #0
 80257e0:	d009      	beq.n	80257f6 <icmp_input+0x126>
          LWIP_ASSERT("icmp_input: moving r->payload to icmp header failed\n", 0);
 80257e2:	4b49      	ldr	r3, [pc, #292]	@ (8025908 <icmp_input+0x238>)
 80257e4:	22b6      	movs	r2, #182	@ 0xb6
 80257e6:	4949      	ldr	r1, [pc, #292]	@ (802590c <icmp_input+0x23c>)
 80257e8:	4849      	ldr	r0, [pc, #292]	@ (8025910 <icmp_input+0x240>)
 80257ea:	f005 f937 	bl	802aa5c <iprintf>
          pbuf_free(r);
 80257ee:	6978      	ldr	r0, [r7, #20]
 80257f0:	f7f5 febc 	bl	801b56c <pbuf_free>
          goto icmperr;
 80257f4:	e07d      	b.n	80258f2 <icmp_input+0x222>
        }
        /* copy the rest of the packet without ip header */
        if (pbuf_copy(r, p) != ERR_OK) {
 80257f6:	6879      	ldr	r1, [r7, #4]
 80257f8:	6978      	ldr	r0, [r7, #20]
 80257fa:	f7f5 ffeb 	bl	801b7d4 <pbuf_copy>
 80257fe:	4603      	mov	r3, r0
 8025800:	2b00      	cmp	r3, #0
 8025802:	d003      	beq.n	802580c <icmp_input+0x13c>
          LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("icmp_input: copying to new pbuf failed"));
          pbuf_free(r);
 8025804:	6978      	ldr	r0, [r7, #20]
 8025806:	f7f5 feb1 	bl	801b56c <pbuf_free>
          goto icmperr;
 802580a:	e072      	b.n	80258f2 <icmp_input+0x222>
        }
        /* free the original p */
        pbuf_free(p);
 802580c:	6878      	ldr	r0, [r7, #4]
 802580e:	f7f5 fead 	bl	801b56c <pbuf_free>
        /* we now have an identical copy of p that has room for link headers */
        p = r;
 8025812:	697b      	ldr	r3, [r7, #20]
 8025814:	607b      	str	r3, [r7, #4]
 8025816:	e00f      	b.n	8025838 <icmp_input+0x168>
      } else {
        /* restore p->payload to point to icmp header (cannot fail) */
        if (pbuf_remove_header(p, hlen + PBUF_LINK_HLEN + PBUF_LINK_ENCAPSULATION_HLEN)) {
 8025818:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 802581a:	330e      	adds	r3, #14
 802581c:	4619      	mov	r1, r3
 802581e:	6878      	ldr	r0, [r7, #4]
 8025820:	f7f5 fdec 	bl	801b3fc <pbuf_remove_header>
 8025824:	4603      	mov	r3, r0
 8025826:	2b00      	cmp	r3, #0
 8025828:	d006      	beq.n	8025838 <icmp_input+0x168>
          LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0);
 802582a:	4b37      	ldr	r3, [pc, #220]	@ (8025908 <icmp_input+0x238>)
 802582c:	22c7      	movs	r2, #199	@ 0xc7
 802582e:	4939      	ldr	r1, [pc, #228]	@ (8025914 <icmp_input+0x244>)
 8025830:	4837      	ldr	r0, [pc, #220]	@ (8025910 <icmp_input+0x240>)
 8025832:	f005 f913 	bl	802aa5c <iprintf>
          goto icmperr;
 8025836:	e05c      	b.n	80258f2 <icmp_input+0x222>
      }
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
      /* At this point, all checks are OK. */
      /* We generate an answer by switching the dest and src ip addresses,
       * setting the icmp type to ECHO_RESPONSE and updating the checksum. */
      iecho = (struct icmp_echo_hdr *)p->payload;
 8025838:	687b      	ldr	r3, [r7, #4]
 802583a:	685b      	ldr	r3, [r3, #4]
 802583c:	613b      	str	r3, [r7, #16]
      if (pbuf_add_header(p, hlen)) {
 802583e:	8c7b      	ldrh	r3, [r7, #34]	@ 0x22
 8025840:	4619      	mov	r1, r3
 8025842:	6878      	ldr	r0, [r7, #4]
 8025844:	f7f5 fdca 	bl	801b3dc <pbuf_add_header>
 8025848:	4603      	mov	r3, r0
 802584a:	2b00      	cmp	r3, #0
 802584c:	d13c      	bne.n	80258c8 <icmp_input+0x1f8>
        LWIP_DEBUGF(ICMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Can't move over header in packet"));
      } else {
        err_t ret;
        struct ip_hdr *iphdr = (struct ip_hdr *)p->payload;
 802584e:	687b      	ldr	r3, [r7, #4]
 8025850:	685b      	ldr	r3, [r3, #4]
 8025852:	60fb      	str	r3, [r7, #12]
        ip4_addr_copy(iphdr->src, *src);
 8025854:	69fb      	ldr	r3, [r7, #28]
 8025856:	681a      	ldr	r2, [r3, #0]
 8025858:	68fb      	ldr	r3, [r7, #12]
 802585a:	60da      	str	r2, [r3, #12]
        ip4_addr_copy(iphdr->dest, *ip4_current_src_addr());
 802585c:	4b28      	ldr	r3, [pc, #160]	@ (8025900 <icmp_input+0x230>)
 802585e:	691a      	ldr	r2, [r3, #16]
 8025860:	68fb      	ldr	r3, [r7, #12]
 8025862:	611a      	str	r2, [r3, #16]
        ICMPH_TYPE_SET(iecho, ICMP_ER);
 8025864:	693b      	ldr	r3, [r7, #16]
 8025866:	2200      	movs	r2, #0
 8025868:	701a      	strb	r2, [r3, #0]
#if CHECKSUM_GEN_ICMP
        IF__NETIF_CHECKSUM_ENABLED(inp, NETIF_CHECKSUM_GEN_ICMP) {
          /* adjust the checksum */
          if (iecho->chksum > PP_HTONS(0xffffU - (ICMP_ECHO << 8))) {
 802586a:	693b      	ldr	r3, [r7, #16]
 802586c:	885b      	ldrh	r3, [r3, #2]
 802586e:	b29b      	uxth	r3, r3
 8025870:	f64f 72f7 	movw	r2, #65527	@ 0xfff7
 8025874:	4293      	cmp	r3, r2
 8025876:	d907      	bls.n	8025888 <icmp_input+0x1b8>
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS((u16_t)(ICMP_ECHO << 8)) + 1);
 8025878:	693b      	ldr	r3, [r7, #16]
 802587a:	885b      	ldrh	r3, [r3, #2]
 802587c:	b29b      	uxth	r3, r3
 802587e:	3309      	adds	r3, #9
 8025880:	b29a      	uxth	r2, r3
 8025882:	693b      	ldr	r3, [r7, #16]
 8025884:	805a      	strh	r2, [r3, #2]
 8025886:	e006      	b.n	8025896 <icmp_input+0x1c6>
          } else {
            iecho->chksum = (u16_t)(iecho->chksum + PP_HTONS(ICMP_ECHO << 8));
 8025888:	693b      	ldr	r3, [r7, #16]
 802588a:	885b      	ldrh	r3, [r3, #2]
 802588c:	b29b      	uxth	r3, r3
 802588e:	3308      	adds	r3, #8
 8025890:	b29a      	uxth	r2, r3
 8025892:	693b      	ldr	r3, [r7, #16]
 8025894:	805a      	strh	r2, [r3, #2]
#else /* CHECKSUM_GEN_ICMP */
        iecho->chksum = 0;
#endif /* CHECKSUM_GEN_ICMP */

        /* Set the correct TTL and recalculate the header checksum. */
        IPH_TTL_SET(iphdr, ICMP_TTL);
 8025896:	68fb      	ldr	r3, [r7, #12]
 8025898:	22ff      	movs	r2, #255	@ 0xff
 802589a:	721a      	strb	r2, [r3, #8]
        IPH_CHKSUM_SET(iphdr, 0);
 802589c:	68fb      	ldr	r3, [r7, #12]
 802589e:	2200      	movs	r2, #0
 80258a0:	729a      	strb	r2, [r3, #10]
 80258a2:	2200      	movs	r2, #0
 80258a4:	72da      	strb	r2, [r3, #11]
        MIB2_STATS_INC(mib2.icmpoutmsgs);
        /* increase number of echo replies attempted to send */
        MIB2_STATS_INC(mib2.icmpoutechoreps);

        /* send an ICMP packet */
        ret = ip4_output_if(p, src, LWIP_IP_HDRINCL,
 80258a6:	683b      	ldr	r3, [r7, #0]
 80258a8:	9302      	str	r3, [sp, #8]
 80258aa:	2301      	movs	r3, #1
 80258ac:	9301      	str	r3, [sp, #4]
 80258ae:	2300      	movs	r3, #0
 80258b0:	9300      	str	r3, [sp, #0]
 80258b2:	23ff      	movs	r3, #255	@ 0xff
 80258b4:	2200      	movs	r2, #0
 80258b6:	69f9      	ldr	r1, [r7, #28]
 80258b8:	6878      	ldr	r0, [r7, #4]
 80258ba:	f000 fa9f 	bl	8025dfc <ip4_output_if>
 80258be:	4603      	mov	r3, r0
 80258c0:	72fb      	strb	r3, [r7, #11]
                            ICMP_TTL, 0, IP_PROTO_ICMP, inp);
        if (ret != ERR_OK) {
          LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %s\n", lwip_strerr(ret)));
        }
      }
      break;
 80258c2:	e001      	b.n	80258c8 <icmp_input+0x1f8>
      break;
 80258c4:	bf00      	nop
 80258c6:	e000      	b.n	80258ca <icmp_input+0x1fa>
      break;
 80258c8:	bf00      	nop
      LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n",
                               (s16_t)type, (s16_t)code));
      ICMP_STATS_INC(icmp.proterr);
      ICMP_STATS_INC(icmp.drop);
  }
  pbuf_free(p);
 80258ca:	6878      	ldr	r0, [r7, #4]
 80258cc:	f7f5 fe4e 	bl	801b56c <pbuf_free>
  return;
 80258d0:	e013      	b.n	80258fa <icmp_input+0x22a>
    goto lenerr;
 80258d2:	bf00      	nop
 80258d4:	e002      	b.n	80258dc <icmp_input+0x20c>
    goto lenerr;
 80258d6:	bf00      	nop
 80258d8:	e000      	b.n	80258dc <icmp_input+0x20c>
        goto lenerr;
 80258da:	bf00      	nop
lenerr:
  pbuf_free(p);
 80258dc:	6878      	ldr	r0, [r7, #4]
 80258de:	f7f5 fe45 	bl	801b56c <pbuf_free>
  ICMP_STATS_INC(icmp.lenerr);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 80258e2:	e00a      	b.n	80258fa <icmp_input+0x22a>
        goto icmperr;
 80258e4:	bf00      	nop
 80258e6:	e004      	b.n	80258f2 <icmp_input+0x222>
        goto icmperr;
 80258e8:	bf00      	nop
 80258ea:	e002      	b.n	80258f2 <icmp_input+0x222>
          goto icmperr;
 80258ec:	bf00      	nop
 80258ee:	e000      	b.n	80258f2 <icmp_input+0x222>
          goto icmperr;
 80258f0:	bf00      	nop
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING
icmperr:
  pbuf_free(p);
 80258f2:	6878      	ldr	r0, [r7, #4]
 80258f4:	f7f5 fe3a 	bl	801b56c <pbuf_free>
  ICMP_STATS_INC(icmp.err);
  MIB2_STATS_INC(mib2.icmpinerrors);
  return;
 80258f8:	bf00      	nop
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN || !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */
}
 80258fa:	3728      	adds	r7, #40	@ 0x28
 80258fc:	46bd      	mov	sp, r7
 80258fe:	bd80      	pop	{r7, pc}
 8025900:	24024458 	.word	0x24024458
 8025904:	2402446c 	.word	0x2402446c
 8025908:	080316e4 	.word	0x080316e4
 802590c:	0803171c 	.word	0x0803171c
 8025910:	08031754 	.word	0x08031754
 8025914:	0803177c 	.word	0x0803177c

08025918 <icmp_dest_unreach>:
 *          p->payload pointing to the IP header
 * @param t type of the 'unreachable' packet
 */
void
icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t)
{
 8025918:	b580      	push	{r7, lr}
 802591a:	b082      	sub	sp, #8
 802591c:	af00      	add	r7, sp, #0
 802591e:	6078      	str	r0, [r7, #4]
 8025920:	460b      	mov	r3, r1
 8025922:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpoutdestunreachs);
  icmp_send_response(p, ICMP_DUR, t);
 8025924:	78fb      	ldrb	r3, [r7, #3]
 8025926:	461a      	mov	r2, r3
 8025928:	2103      	movs	r1, #3
 802592a:	6878      	ldr	r0, [r7, #4]
 802592c:	f000 f814 	bl	8025958 <icmp_send_response>
}
 8025930:	bf00      	nop
 8025932:	3708      	adds	r7, #8
 8025934:	46bd      	mov	sp, r7
 8025936:	bd80      	pop	{r7, pc}

08025938 <icmp_time_exceeded>:
 *          p->payload pointing to the IP header
 * @param t type of the 'time exceeded' packet
 */
void
icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t)
{
 8025938:	b580      	push	{r7, lr}
 802593a:	b082      	sub	sp, #8
 802593c:	af00      	add	r7, sp, #0
 802593e:	6078      	str	r0, [r7, #4]
 8025940:	460b      	mov	r3, r1
 8025942:	70fb      	strb	r3, [r7, #3]
  MIB2_STATS_INC(mib2.icmpouttimeexcds);
  icmp_send_response(p, ICMP_TE, t);
 8025944:	78fb      	ldrb	r3, [r7, #3]
 8025946:	461a      	mov	r2, r3
 8025948:	210b      	movs	r1, #11
 802594a:	6878      	ldr	r0, [r7, #4]
 802594c:	f000 f804 	bl	8025958 <icmp_send_response>
}
 8025950:	bf00      	nop
 8025952:	3708      	adds	r7, #8
 8025954:	46bd      	mov	sp, r7
 8025956:	bd80      	pop	{r7, pc}

08025958 <icmp_send_response>:
 * @param type Type of the ICMP header
 * @param code Code of the ICMP header
 */
static void
icmp_send_response(struct pbuf *p, u8_t type, u8_t code)
{
 8025958:	b580      	push	{r7, lr}
 802595a:	b08c      	sub	sp, #48	@ 0x30
 802595c:	af04      	add	r7, sp, #16
 802595e:	6078      	str	r0, [r7, #4]
 8025960:	460b      	mov	r3, r1
 8025962:	70fb      	strb	r3, [r7, #3]
 8025964:	4613      	mov	r3, r2
 8025966:	70bb      	strb	r3, [r7, #2]

  /* increase number of messages attempted to send */
  MIB2_STATS_INC(mib2.icmpoutmsgs);

  /* ICMP header + IP header + 8 bytes of data */
  q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE,
 8025968:	f44f 7220 	mov.w	r2, #640	@ 0x280
 802596c:	2124      	movs	r1, #36	@ 0x24
 802596e:	2022      	movs	r0, #34	@ 0x22
 8025970:	f7f5 fae6 	bl	801af40 <pbuf_alloc>
 8025974:	61b8      	str	r0, [r7, #24]
                 PBUF_RAM);
  if (q == NULL) {
 8025976:	69bb      	ldr	r3, [r7, #24]
 8025978:	2b00      	cmp	r3, #0
 802597a:	d056      	beq.n	8025a2a <icmp_send_response+0xd2>
    LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n"));
    MIB2_STATS_INC(mib2.icmpouterrors);
    return;
  }
  LWIP_ASSERT("check that first pbuf can hold icmp message",
 802597c:	69bb      	ldr	r3, [r7, #24]
 802597e:	895b      	ldrh	r3, [r3, #10]
 8025980:	2b23      	cmp	r3, #35	@ 0x23
 8025982:	d806      	bhi.n	8025992 <icmp_send_response+0x3a>
 8025984:	4b2b      	ldr	r3, [pc, #172]	@ (8025a34 <icmp_send_response+0xdc>)
 8025986:	f44f 72b4 	mov.w	r2, #360	@ 0x168
 802598a:	492b      	ldr	r1, [pc, #172]	@ (8025a38 <icmp_send_response+0xe0>)
 802598c:	482b      	ldr	r0, [pc, #172]	@ (8025a3c <icmp_send_response+0xe4>)
 802598e:	f005 f865 	bl	802aa5c <iprintf>
              (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE)));

  iphdr = (struct ip_hdr *)p->payload;
 8025992:	687b      	ldr	r3, [r7, #4]
 8025994:	685b      	ldr	r3, [r3, #4]
 8025996:	617b      	str	r3, [r7, #20]
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->src);
  LWIP_DEBUGF(ICMP_DEBUG, (" to "));
  ip4_addr_debug_print_val(ICMP_DEBUG, iphdr->dest);
  LWIP_DEBUGF(ICMP_DEBUG, ("\n"));

  icmphdr = (struct icmp_echo_hdr *)q->payload;
 8025998:	69bb      	ldr	r3, [r7, #24]
 802599a:	685b      	ldr	r3, [r3, #4]
 802599c:	613b      	str	r3, [r7, #16]
  icmphdr->type = type;
 802599e:	693b      	ldr	r3, [r7, #16]
 80259a0:	78fa      	ldrb	r2, [r7, #3]
 80259a2:	701a      	strb	r2, [r3, #0]
  icmphdr->code = code;
 80259a4:	693b      	ldr	r3, [r7, #16]
 80259a6:	78ba      	ldrb	r2, [r7, #2]
 80259a8:	705a      	strb	r2, [r3, #1]
  icmphdr->id = 0;
 80259aa:	693b      	ldr	r3, [r7, #16]
 80259ac:	2200      	movs	r2, #0
 80259ae:	711a      	strb	r2, [r3, #4]
 80259b0:	2200      	movs	r2, #0
 80259b2:	715a      	strb	r2, [r3, #5]
  icmphdr->seqno = 0;
 80259b4:	693b      	ldr	r3, [r7, #16]
 80259b6:	2200      	movs	r2, #0
 80259b8:	719a      	strb	r2, [r3, #6]
 80259ba:	2200      	movs	r2, #0
 80259bc:	71da      	strb	r2, [r3, #7]

  /* copy fields from original packet */
  SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload,
 80259be:	69bb      	ldr	r3, [r7, #24]
 80259c0:	685b      	ldr	r3, [r3, #4]
 80259c2:	f103 0008 	add.w	r0, r3, #8
 80259c6:	687b      	ldr	r3, [r7, #4]
 80259c8:	685b      	ldr	r3, [r3, #4]
 80259ca:	221c      	movs	r2, #28
 80259cc:	4619      	mov	r1, r3
 80259ce:	f005 face 	bl	802af6e <memcpy>
          IP_HLEN + ICMP_DEST_UNREACH_DATASIZE);

  ip4_addr_copy(iphdr_src, iphdr->src);
 80259d2:	697b      	ldr	r3, [r7, #20]
 80259d4:	68db      	ldr	r3, [r3, #12]
 80259d6:	60fb      	str	r3, [r7, #12]
    ip4_addr_t iphdr_dst;
    ip4_addr_copy(iphdr_dst, iphdr->dest);
    netif = ip4_route_src(&iphdr_dst, &iphdr_src);
  }
#else
  netif = ip4_route(&iphdr_src);
 80259d8:	f107 030c 	add.w	r3, r7, #12
 80259dc:	4618      	mov	r0, r3
 80259de:	f000 f82f 	bl	8025a40 <ip4_route>
 80259e2:	61f8      	str	r0, [r7, #28]
#endif
  if (netif != NULL) {
 80259e4:	69fb      	ldr	r3, [r7, #28]
 80259e6:	2b00      	cmp	r3, #0
 80259e8:	d01b      	beq.n	8025a22 <icmp_send_response+0xca>
    /* calculate checksum */
    icmphdr->chksum = 0;
 80259ea:	693b      	ldr	r3, [r7, #16]
 80259ec:	2200      	movs	r2, #0
 80259ee:	709a      	strb	r2, [r3, #2]
 80259f0:	2200      	movs	r2, #0
 80259f2:	70da      	strb	r2, [r3, #3]
#if CHECKSUM_GEN_ICMP
    IF__NETIF_CHECKSUM_ENABLED(netif, NETIF_CHECKSUM_GEN_ICMP) {
      icmphdr->chksum = inet_chksum(icmphdr, q->len);
 80259f4:	69bb      	ldr	r3, [r7, #24]
 80259f6:	895b      	ldrh	r3, [r3, #10]
 80259f8:	4619      	mov	r1, r3
 80259fa:	6938      	ldr	r0, [r7, #16]
 80259fc:	f7f4 f95f 	bl	8019cbe <inet_chksum>
 8025a00:	4603      	mov	r3, r0
 8025a02:	461a      	mov	r2, r3
 8025a04:	693b      	ldr	r3, [r7, #16]
 8025a06:	805a      	strh	r2, [r3, #2]
    }
#endif
    ICMP_STATS_INC(icmp.xmit);
    ip4_output_if(q, NULL, &iphdr_src, ICMP_TTL, 0, IP_PROTO_ICMP, netif);
 8025a08:	f107 020c 	add.w	r2, r7, #12
 8025a0c:	69fb      	ldr	r3, [r7, #28]
 8025a0e:	9302      	str	r3, [sp, #8]
 8025a10:	2301      	movs	r3, #1
 8025a12:	9301      	str	r3, [sp, #4]
 8025a14:	2300      	movs	r3, #0
 8025a16:	9300      	str	r3, [sp, #0]
 8025a18:	23ff      	movs	r3, #255	@ 0xff
 8025a1a:	2100      	movs	r1, #0
 8025a1c:	69b8      	ldr	r0, [r7, #24]
 8025a1e:	f000 f9ed 	bl	8025dfc <ip4_output_if>
  }
  pbuf_free(q);
 8025a22:	69b8      	ldr	r0, [r7, #24]
 8025a24:	f7f5 fda2 	bl	801b56c <pbuf_free>
 8025a28:	e000      	b.n	8025a2c <icmp_send_response+0xd4>
    return;
 8025a2a:	bf00      	nop
}
 8025a2c:	3720      	adds	r7, #32
 8025a2e:	46bd      	mov	sp, r7
 8025a30:	bd80      	pop	{r7, pc}
 8025a32:	bf00      	nop
 8025a34:	080316e4 	.word	0x080316e4
 8025a38:	080317b0 	.word	0x080317b0
 8025a3c:	08031754 	.word	0x08031754

08025a40 <ip4_route>:
 * @param dest the destination IP address for which to find the route
 * @return the netif on which to send to reach dest
 */
struct netif *
ip4_route(const ip4_addr_t *dest)
{
 8025a40:	b580      	push	{r7, lr}
 8025a42:	b084      	sub	sp, #16
 8025a44:	af00      	add	r7, sp, #0
 8025a46:	6078      	str	r0, [r7, #4]
#if !LWIP_SINGLE_NETIF
  struct netif *netif;

  LWIP_ASSERT_CORE_LOCKED();
 8025a48:	f7eb fbdc 	bl	8011204 <sys_check_core_locking>

  /* bug #54569: in case LWIP_SINGLE_NETIF=1 and LWIP_DEBUGF() disabled, the following loop is optimized away */
  LWIP_UNUSED_ARG(dest);

  /* iterate through netifs */
  NETIF_FOREACH(netif) {
 8025a4c:	4b32      	ldr	r3, [pc, #200]	@ (8025b18 <ip4_route+0xd8>)
 8025a4e:	681b      	ldr	r3, [r3, #0]
 8025a50:	60fb      	str	r3, [r7, #12]
 8025a52:	e036      	b.n	8025ac2 <ip4_route+0x82>
    /* is the netif up, does it have a link and a valid address? */
    if (netif_is_up(netif) && netif_is_link_up(netif) && !ip4_addr_isany_val(*netif_ip4_addr(netif))) {
 8025a54:	68fb      	ldr	r3, [r7, #12]
 8025a56:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025a5a:	f003 0301 	and.w	r3, r3, #1
 8025a5e:	b2db      	uxtb	r3, r3
 8025a60:	2b00      	cmp	r3, #0
 8025a62:	d02b      	beq.n	8025abc <ip4_route+0x7c>
 8025a64:	68fb      	ldr	r3, [r7, #12]
 8025a66:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025a6a:	089b      	lsrs	r3, r3, #2
 8025a6c:	f003 0301 	and.w	r3, r3, #1
 8025a70:	b2db      	uxtb	r3, r3
 8025a72:	2b00      	cmp	r3, #0
 8025a74:	d022      	beq.n	8025abc <ip4_route+0x7c>
 8025a76:	68fb      	ldr	r3, [r7, #12]
 8025a78:	3304      	adds	r3, #4
 8025a7a:	681b      	ldr	r3, [r3, #0]
 8025a7c:	2b00      	cmp	r3, #0
 8025a7e:	d01d      	beq.n	8025abc <ip4_route+0x7c>
      /* network mask matches? */
      if (ip4_addr_netcmp(dest, netif_ip4_addr(netif), netif_ip4_netmask(netif))) {
 8025a80:	687b      	ldr	r3, [r7, #4]
 8025a82:	681a      	ldr	r2, [r3, #0]
 8025a84:	68fb      	ldr	r3, [r7, #12]
 8025a86:	3304      	adds	r3, #4
 8025a88:	681b      	ldr	r3, [r3, #0]
 8025a8a:	405a      	eors	r2, r3
 8025a8c:	68fb      	ldr	r3, [r7, #12]
 8025a8e:	3308      	adds	r3, #8
 8025a90:	681b      	ldr	r3, [r3, #0]
 8025a92:	4013      	ands	r3, r2
 8025a94:	2b00      	cmp	r3, #0
 8025a96:	d101      	bne.n	8025a9c <ip4_route+0x5c>
        /* return netif on which to forward IP packet */
        return netif;
 8025a98:	68fb      	ldr	r3, [r7, #12]
 8025a9a:	e038      	b.n	8025b0e <ip4_route+0xce>
      }
      /* gateway matches on a non broadcast interface? (i.e. peer in a point to point interface) */
      if (((netif->flags & NETIF_FLAG_BROADCAST) == 0) && ip4_addr_cmp(dest, netif_ip4_gw(netif))) {
 8025a9c:	68fb      	ldr	r3, [r7, #12]
 8025a9e:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025aa2:	f003 0302 	and.w	r3, r3, #2
 8025aa6:	2b00      	cmp	r3, #0
 8025aa8:	d108      	bne.n	8025abc <ip4_route+0x7c>
 8025aaa:	687b      	ldr	r3, [r7, #4]
 8025aac:	681a      	ldr	r2, [r3, #0]
 8025aae:	68fb      	ldr	r3, [r7, #12]
 8025ab0:	330c      	adds	r3, #12
 8025ab2:	681b      	ldr	r3, [r3, #0]
 8025ab4:	429a      	cmp	r2, r3
 8025ab6:	d101      	bne.n	8025abc <ip4_route+0x7c>
        /* return netif on which to forward IP packet */
        return netif;
 8025ab8:	68fb      	ldr	r3, [r7, #12]
 8025aba:	e028      	b.n	8025b0e <ip4_route+0xce>
  NETIF_FOREACH(netif) {
 8025abc:	68fb      	ldr	r3, [r7, #12]
 8025abe:	681b      	ldr	r3, [r3, #0]
 8025ac0:	60fb      	str	r3, [r7, #12]
 8025ac2:	68fb      	ldr	r3, [r7, #12]
 8025ac4:	2b00      	cmp	r3, #0
 8025ac6:	d1c5      	bne.n	8025a54 <ip4_route+0x14>
    return netif;
  }
#endif
#endif /* !LWIP_SINGLE_NETIF */

  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 8025ac8:	4b14      	ldr	r3, [pc, #80]	@ (8025b1c <ip4_route+0xdc>)
 8025aca:	681b      	ldr	r3, [r3, #0]
 8025acc:	2b00      	cmp	r3, #0
 8025ace:	d01a      	beq.n	8025b06 <ip4_route+0xc6>
 8025ad0:	4b12      	ldr	r3, [pc, #72]	@ (8025b1c <ip4_route+0xdc>)
 8025ad2:	681b      	ldr	r3, [r3, #0]
 8025ad4:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025ad8:	f003 0301 	and.w	r3, r3, #1
 8025adc:	2b00      	cmp	r3, #0
 8025ade:	d012      	beq.n	8025b06 <ip4_route+0xc6>
 8025ae0:	4b0e      	ldr	r3, [pc, #56]	@ (8025b1c <ip4_route+0xdc>)
 8025ae2:	681b      	ldr	r3, [r3, #0]
 8025ae4:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025ae8:	f003 0304 	and.w	r3, r3, #4
 8025aec:	2b00      	cmp	r3, #0
 8025aee:	d00a      	beq.n	8025b06 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 8025af0:	4b0a      	ldr	r3, [pc, #40]	@ (8025b1c <ip4_route+0xdc>)
 8025af2:	681b      	ldr	r3, [r3, #0]
 8025af4:	3304      	adds	r3, #4
 8025af6:	681b      	ldr	r3, [r3, #0]
  if ((netif_default == NULL) || !netif_is_up(netif_default) || !netif_is_link_up(netif_default) ||
 8025af8:	2b00      	cmp	r3, #0
 8025afa:	d004      	beq.n	8025b06 <ip4_route+0xc6>
      ip4_addr_isany_val(*netif_ip4_addr(netif_default)) || ip4_addr_isloopback(dest)) {
 8025afc:	687b      	ldr	r3, [r7, #4]
 8025afe:	681b      	ldr	r3, [r3, #0]
 8025b00:	b2db      	uxtb	r3, r3
 8025b02:	2b7f      	cmp	r3, #127	@ 0x7f
 8025b04:	d101      	bne.n	8025b0a <ip4_route+0xca>
       If this is not good enough for you, use LWIP_HOOK_IP4_ROUTE() */
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_route: No route to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
                ip4_addr1_16(dest), ip4_addr2_16(dest), ip4_addr3_16(dest), ip4_addr4_16(dest)));
    IP_STATS_INC(ip.rterr);
    MIB2_STATS_INC(mib2.ipoutnoroutes);
    return NULL;
 8025b06:	2300      	movs	r3, #0
 8025b08:	e001      	b.n	8025b0e <ip4_route+0xce>
  }

  return netif_default;
 8025b0a:	4b04      	ldr	r3, [pc, #16]	@ (8025b1c <ip4_route+0xdc>)
 8025b0c:	681b      	ldr	r3, [r3, #0]
}
 8025b0e:	4618      	mov	r0, r3
 8025b10:	3710      	adds	r7, #16
 8025b12:	46bd      	mov	sp, r7
 8025b14:	bd80      	pop	{r7, pc}
 8025b16:	bf00      	nop
 8025b18:	2402af9c 	.word	0x2402af9c
 8025b1c:	2402afa0 	.word	0x2402afa0

08025b20 <ip4_input_accept>:
#endif /* IP_FORWARD */

/** Return true if the current input packet should be accepted on this netif */
static int
ip4_input_accept(struct netif *netif)
{
 8025b20:	b580      	push	{r7, lr}
 8025b22:	b082      	sub	sp, #8
 8025b24:	af00      	add	r7, sp, #0
 8025b26:	6078      	str	r0, [r7, #4]
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(netif_ip4_addr(netif)) & ip4_addr_get_u32(netif_ip4_netmask(netif)),
                         ip4_addr_get_u32(ip4_current_dest_addr()) & ~ip4_addr_get_u32(netif_ip4_netmask(netif))));

  /* interface is up and configured? */
  if ((netif_is_up(netif)) && (!ip4_addr_isany_val(*netif_ip4_addr(netif)))) {
 8025b28:	687b      	ldr	r3, [r7, #4]
 8025b2a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025b2e:	f003 0301 	and.w	r3, r3, #1
 8025b32:	b2db      	uxtb	r3, r3
 8025b34:	2b00      	cmp	r3, #0
 8025b36:	d016      	beq.n	8025b66 <ip4_input_accept+0x46>
 8025b38:	687b      	ldr	r3, [r7, #4]
 8025b3a:	3304      	adds	r3, #4
 8025b3c:	681b      	ldr	r3, [r3, #0]
 8025b3e:	2b00      	cmp	r3, #0
 8025b40:	d011      	beq.n	8025b66 <ip4_input_accept+0x46>
    /* unicast to this interface address? */
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 8025b42:	4b0b      	ldr	r3, [pc, #44]	@ (8025b70 <ip4_input_accept+0x50>)
 8025b44:	695a      	ldr	r2, [r3, #20]
 8025b46:	687b      	ldr	r3, [r7, #4]
 8025b48:	3304      	adds	r3, #4
 8025b4a:	681b      	ldr	r3, [r3, #0]
 8025b4c:	429a      	cmp	r2, r3
 8025b4e:	d008      	beq.n	8025b62 <ip4_input_accept+0x42>
        /* or broadcast on this interface network address? */
        ip4_addr_isbroadcast(ip4_current_dest_addr(), netif)
 8025b50:	4b07      	ldr	r3, [pc, #28]	@ (8025b70 <ip4_input_accept+0x50>)
 8025b52:	695b      	ldr	r3, [r3, #20]
 8025b54:	6879      	ldr	r1, [r7, #4]
 8025b56:	4618      	mov	r0, r3
 8025b58:	f000 fa2a 	bl	8025fb0 <ip4_addr_isbroadcast_u32>
 8025b5c:	4603      	mov	r3, r0
    if (ip4_addr_cmp(ip4_current_dest_addr(), netif_ip4_addr(netif)) ||
 8025b5e:	2b00      	cmp	r3, #0
 8025b60:	d001      	beq.n	8025b66 <ip4_input_accept+0x46>
#endif /* LWIP_NETIF_LOOPBACK && !LWIP_HAVE_LOOPIF */
       ) {
      LWIP_DEBUGF(IP_DEBUG, ("ip4_input: packet accepted on interface %c%c\n",
                             netif->name[0], netif->name[1]));
      /* accept on this netif */
      return 1;
 8025b62:	2301      	movs	r3, #1
 8025b64:	e000      	b.n	8025b68 <ip4_input_accept+0x48>
      /* accept on this netif */
      return 1;
    }
#endif /* LWIP_AUTOIP */
  }
  return 0;
 8025b66:	2300      	movs	r3, #0
}
 8025b68:	4618      	mov	r0, r3
 8025b6a:	3708      	adds	r7, #8
 8025b6c:	46bd      	mov	sp, r7
 8025b6e:	bd80      	pop	{r7, pc}
 8025b70:	24024458 	.word	0x24024458

08025b74 <ip4_input>:
 * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't
 *         processed, but currently always returns ERR_OK)
 */
err_t
ip4_input(struct pbuf *p, struct netif *inp)
{
 8025b74:	b580      	push	{r7, lr}
 8025b76:	b088      	sub	sp, #32
 8025b78:	af00      	add	r7, sp, #0
 8025b7a:	6078      	str	r0, [r7, #4]
 8025b7c:	6039      	str	r1, [r7, #0]
  const struct ip_hdr *iphdr;
  struct netif *netif;
  u16_t iphdr_hlen;
  u16_t iphdr_len;
#if IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP
  int check_ip_src = 1;
 8025b7e:	2301      	movs	r3, #1
 8025b80:	617b      	str	r3, [r7, #20]
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING || LWIP_IGMP */
#if LWIP_RAW
  raw_input_state_t raw_status;
#endif /* LWIP_RAW */

  LWIP_ASSERT_CORE_LOCKED();
 8025b82:	f7eb fb3f 	bl	8011204 <sys_check_core_locking>

  IP_STATS_INC(ip.recv);
  MIB2_STATS_INC(mib2.ipinreceives);

  /* identify the IP header */
  iphdr = (struct ip_hdr *)p->payload;
 8025b86:	687b      	ldr	r3, [r7, #4]
 8025b88:	685b      	ldr	r3, [r3, #4]
 8025b8a:	613b      	str	r3, [r7, #16]
  if (IPH_V(iphdr) != 4) {
 8025b8c:	693b      	ldr	r3, [r7, #16]
 8025b8e:	781b      	ldrb	r3, [r3, #0]
 8025b90:	091b      	lsrs	r3, r3, #4
 8025b92:	b2db      	uxtb	r3, r3
 8025b94:	2b04      	cmp	r3, #4
 8025b96:	d004      	beq.n	8025ba2 <ip4_input+0x2e>
    LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", (u16_t)IPH_V(iphdr)));
    ip4_debug_print(p);
    pbuf_free(p);
 8025b98:	6878      	ldr	r0, [r7, #4]
 8025b9a:	f7f5 fce7 	bl	801b56c <pbuf_free>
    IP_STATS_INC(ip.err);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipinhdrerrors);
    return ERR_OK;
 8025b9e:	2300      	movs	r3, #0
 8025ba0:	e123      	b.n	8025dea <ip4_input+0x276>
    return ERR_OK;
  }
#endif

  /* obtain IP header length in bytes */
  iphdr_hlen = IPH_HL_BYTES(iphdr);
 8025ba2:	693b      	ldr	r3, [r7, #16]
 8025ba4:	781b      	ldrb	r3, [r3, #0]
 8025ba6:	f003 030f 	and.w	r3, r3, #15
 8025baa:	b2db      	uxtb	r3, r3
 8025bac:	009b      	lsls	r3, r3, #2
 8025bae:	b2db      	uxtb	r3, r3
 8025bb0:	81fb      	strh	r3, [r7, #14]
  /* obtain ip length in bytes */
  iphdr_len = lwip_ntohs(IPH_LEN(iphdr));
 8025bb2:	693b      	ldr	r3, [r7, #16]
 8025bb4:	885b      	ldrh	r3, [r3, #2]
 8025bb6:	b29b      	uxth	r3, r3
 8025bb8:	4618      	mov	r0, r3
 8025bba:	f7f3 fff5 	bl	8019ba8 <lwip_htons>
 8025bbe:	4603      	mov	r3, r0
 8025bc0:	837b      	strh	r3, [r7, #26]

  /* Trim pbuf. This is especially required for packets < 60 bytes. */
  if (iphdr_len < p->tot_len) {
 8025bc2:	687b      	ldr	r3, [r7, #4]
 8025bc4:	891b      	ldrh	r3, [r3, #8]
 8025bc6:	8b7a      	ldrh	r2, [r7, #26]
 8025bc8:	429a      	cmp	r2, r3
 8025bca:	d204      	bcs.n	8025bd6 <ip4_input+0x62>
    pbuf_realloc(p, iphdr_len);
 8025bcc:	8b7b      	ldrh	r3, [r7, #26]
 8025bce:	4619      	mov	r1, r3
 8025bd0:	6878      	ldr	r0, [r7, #4]
 8025bd2:	f7f5 fb15 	bl	801b200 <pbuf_realloc>
  }

  /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */
  if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len) || (iphdr_hlen < IP_HLEN)) {
 8025bd6:	687b      	ldr	r3, [r7, #4]
 8025bd8:	895b      	ldrh	r3, [r3, #10]
 8025bda:	89fa      	ldrh	r2, [r7, #14]
 8025bdc:	429a      	cmp	r2, r3
 8025bde:	d807      	bhi.n	8025bf0 <ip4_input+0x7c>
 8025be0:	687b      	ldr	r3, [r7, #4]
 8025be2:	891b      	ldrh	r3, [r3, #8]
 8025be4:	8b7a      	ldrh	r2, [r7, #26]
 8025be6:	429a      	cmp	r2, r3
 8025be8:	d802      	bhi.n	8025bf0 <ip4_input+0x7c>
 8025bea:	89fb      	ldrh	r3, [r7, #14]
 8025bec:	2b13      	cmp	r3, #19
 8025bee:	d804      	bhi.n	8025bfa <ip4_input+0x86>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
                  ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n",
                   iphdr_len, p->tot_len));
    }
    /* free (drop) packet pbufs */
    pbuf_free(p);
 8025bf0:	6878      	ldr	r0, [r7, #4]
 8025bf2:	f7f5 fcbb 	bl	801b56c <pbuf_free>
    IP_STATS_INC(ip.lenerr);
    IP_STATS_INC(ip.drop);
    MIB2_STATS_INC(mib2.ipindiscards);
    return ERR_OK;
 8025bf6:	2300      	movs	r3, #0
 8025bf8:	e0f7      	b.n	8025dea <ip4_input+0x276>
    }
  }
#endif

  /* copy IP addresses to aligned ip_addr_t */
  ip_addr_copy_from_ip4(ip_data.current_iphdr_dest, iphdr->dest);
 8025bfa:	693b      	ldr	r3, [r7, #16]
 8025bfc:	691b      	ldr	r3, [r3, #16]
 8025bfe:	4a7d      	ldr	r2, [pc, #500]	@ (8025df4 <ip4_input+0x280>)
 8025c00:	6153      	str	r3, [r2, #20]
  ip_addr_copy_from_ip4(ip_data.current_iphdr_src, iphdr->src);
 8025c02:	693b      	ldr	r3, [r7, #16]
 8025c04:	68db      	ldr	r3, [r3, #12]
 8025c06:	4a7b      	ldr	r2, [pc, #492]	@ (8025df4 <ip4_input+0x280>)
 8025c08:	6113      	str	r3, [r2, #16]

  /* match packet against an interface, i.e. is this packet for us? */
  if (ip4_addr_ismulticast(ip4_current_dest_addr())) {
 8025c0a:	4b7a      	ldr	r3, [pc, #488]	@ (8025df4 <ip4_input+0x280>)
 8025c0c:	695b      	ldr	r3, [r3, #20]
 8025c0e:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
 8025c12:	2be0      	cmp	r3, #224	@ 0xe0
 8025c14:	d112      	bne.n	8025c3c <ip4_input+0xc8>
      netif = inp;
    } else {
      netif = NULL;
    }
#else /* LWIP_IGMP */
    if ((netif_is_up(inp)) && (!ip4_addr_isany_val(*netif_ip4_addr(inp)))) {
 8025c16:	683b      	ldr	r3, [r7, #0]
 8025c18:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025c1c:	f003 0301 	and.w	r3, r3, #1
 8025c20:	b2db      	uxtb	r3, r3
 8025c22:	2b00      	cmp	r3, #0
 8025c24:	d007      	beq.n	8025c36 <ip4_input+0xc2>
 8025c26:	683b      	ldr	r3, [r7, #0]
 8025c28:	3304      	adds	r3, #4
 8025c2a:	681b      	ldr	r3, [r3, #0]
 8025c2c:	2b00      	cmp	r3, #0
 8025c2e:	d002      	beq.n	8025c36 <ip4_input+0xc2>
      netif = inp;
 8025c30:	683b      	ldr	r3, [r7, #0]
 8025c32:	61fb      	str	r3, [r7, #28]
 8025c34:	e02a      	b.n	8025c8c <ip4_input+0x118>
    } else {
      netif = NULL;
 8025c36:	2300      	movs	r3, #0
 8025c38:	61fb      	str	r3, [r7, #28]
 8025c3a:	e027      	b.n	8025c8c <ip4_input+0x118>
    }
#endif /* LWIP_IGMP */
  } else {
    /* start trying with inp. if that's not acceptable, start walking the
       list of configured netifs. */
    if (ip4_input_accept(inp)) {
 8025c3c:	6838      	ldr	r0, [r7, #0]
 8025c3e:	f7ff ff6f 	bl	8025b20 <ip4_input_accept>
 8025c42:	4603      	mov	r3, r0
 8025c44:	2b00      	cmp	r3, #0
 8025c46:	d002      	beq.n	8025c4e <ip4_input+0xda>
      netif = inp;
 8025c48:	683b      	ldr	r3, [r7, #0]
 8025c4a:	61fb      	str	r3, [r7, #28]
 8025c4c:	e01e      	b.n	8025c8c <ip4_input+0x118>
    } else {
      netif = NULL;
 8025c4e:	2300      	movs	r3, #0
 8025c50:	61fb      	str	r3, [r7, #28]
#if !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF
      /* Packets sent to the loopback address must not be accepted on an
       * interface that does not have the loopback address assigned to it,
       * unless a non-loopback interface is used for loopback traffic. */
      if (!ip4_addr_isloopback(ip4_current_dest_addr()))
 8025c52:	4b68      	ldr	r3, [pc, #416]	@ (8025df4 <ip4_input+0x280>)
 8025c54:	695b      	ldr	r3, [r3, #20]
 8025c56:	b2db      	uxtb	r3, r3
 8025c58:	2b7f      	cmp	r3, #127	@ 0x7f
 8025c5a:	d017      	beq.n	8025c8c <ip4_input+0x118>
#endif /* !LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF */
      {
#if !LWIP_SINGLE_NETIF
        NETIF_FOREACH(netif) {
 8025c5c:	4b66      	ldr	r3, [pc, #408]	@ (8025df8 <ip4_input+0x284>)
 8025c5e:	681b      	ldr	r3, [r3, #0]
 8025c60:	61fb      	str	r3, [r7, #28]
 8025c62:	e00e      	b.n	8025c82 <ip4_input+0x10e>
          if (netif == inp) {
 8025c64:	69fa      	ldr	r2, [r7, #28]
 8025c66:	683b      	ldr	r3, [r7, #0]
 8025c68:	429a      	cmp	r2, r3
 8025c6a:	d006      	beq.n	8025c7a <ip4_input+0x106>
            /* we checked that before already */
            continue;
          }
          if (ip4_input_accept(netif)) {
 8025c6c:	69f8      	ldr	r0, [r7, #28]
 8025c6e:	f7ff ff57 	bl	8025b20 <ip4_input_accept>
 8025c72:	4603      	mov	r3, r0
 8025c74:	2b00      	cmp	r3, #0
 8025c76:	d108      	bne.n	8025c8a <ip4_input+0x116>
 8025c78:	e000      	b.n	8025c7c <ip4_input+0x108>
            continue;
 8025c7a:	bf00      	nop
        NETIF_FOREACH(netif) {
 8025c7c:	69fb      	ldr	r3, [r7, #28]
 8025c7e:	681b      	ldr	r3, [r3, #0]
 8025c80:	61fb      	str	r3, [r7, #28]
 8025c82:	69fb      	ldr	r3, [r7, #28]
 8025c84:	2b00      	cmp	r3, #0
 8025c86:	d1ed      	bne.n	8025c64 <ip4_input+0xf0>
 8025c88:	e000      	b.n	8025c8c <ip4_input+0x118>
            break;
 8025c8a:	bf00      	nop
   * If you want to accept private broadcast communication while a netif is down,
   * define LWIP_IP_ACCEPT_UDP_PORT(dst_port), e.g.:
   *
   * #define LWIP_IP_ACCEPT_UDP_PORT(dst_port) ((dst_port) == PP_NTOHS(12345))
   */
  if (netif == NULL) {
 8025c8c:	69fb      	ldr	r3, [r7, #28]
 8025c8e:	2b00      	cmp	r3, #0
 8025c90:	d111      	bne.n	8025cb6 <ip4_input+0x142>
    /* remote port is DHCP server? */
    if (IPH_PROTO(iphdr) == IP_PROTO_UDP) {
 8025c92:	693b      	ldr	r3, [r7, #16]
 8025c94:	7a5b      	ldrb	r3, [r3, #9]
 8025c96:	2b11      	cmp	r3, #17
 8025c98:	d10d      	bne.n	8025cb6 <ip4_input+0x142>
      const struct udp_hdr *udphdr = (const struct udp_hdr *)((const u8_t *)iphdr + iphdr_hlen);
 8025c9a:	89fb      	ldrh	r3, [r7, #14]
 8025c9c:	693a      	ldr	r2, [r7, #16]
 8025c9e:	4413      	add	r3, r2
 8025ca0:	60bb      	str	r3, [r7, #8]
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: UDP packet to DHCP client port %"U16_F"\n",
                                              lwip_ntohs(udphdr->dest)));
      if (IP_ACCEPT_LINK_LAYER_ADDRESSED_PORT(udphdr->dest)) {
 8025ca2:	68bb      	ldr	r3, [r7, #8]
 8025ca4:	885b      	ldrh	r3, [r3, #2]
 8025ca6:	b29b      	uxth	r3, r3
 8025ca8:	f5b3 4f88 	cmp.w	r3, #17408	@ 0x4400
 8025cac:	d103      	bne.n	8025cb6 <ip4_input+0x142>
        LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip4_input: DHCP packet accepted.\n"));
        netif = inp;
 8025cae:	683b      	ldr	r3, [r7, #0]
 8025cb0:	61fb      	str	r3, [r7, #28]
        check_ip_src = 0;
 8025cb2:	2300      	movs	r3, #0
 8025cb4:	617b      	str	r3, [r7, #20]
  }
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */

  /* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */
#if LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING
  if (check_ip_src
 8025cb6:	697b      	ldr	r3, [r7, #20]
 8025cb8:	2b00      	cmp	r3, #0
 8025cba:	d017      	beq.n	8025cec <ip4_input+0x178>
#if IP_ACCEPT_LINK_LAYER_ADDRESSING
      /* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */
      && !ip4_addr_isany_val(*ip4_current_src_addr())
 8025cbc:	4b4d      	ldr	r3, [pc, #308]	@ (8025df4 <ip4_input+0x280>)
 8025cbe:	691b      	ldr	r3, [r3, #16]
 8025cc0:	2b00      	cmp	r3, #0
 8025cc2:	d013      	beq.n	8025cec <ip4_input+0x178>
#endif /* IP_ACCEPT_LINK_LAYER_ADDRESSING */
     )
#endif /* LWIP_IGMP || IP_ACCEPT_LINK_LAYER_ADDRESSING */
  {
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 8025cc4:	4b4b      	ldr	r3, [pc, #300]	@ (8025df4 <ip4_input+0x280>)
 8025cc6:	691b      	ldr	r3, [r3, #16]
 8025cc8:	6839      	ldr	r1, [r7, #0]
 8025cca:	4618      	mov	r0, r3
 8025ccc:	f000 f970 	bl	8025fb0 <ip4_addr_isbroadcast_u32>
 8025cd0:	4603      	mov	r3, r0
 8025cd2:	2b00      	cmp	r3, #0
 8025cd4:	d105      	bne.n	8025ce2 <ip4_input+0x16e>
        (ip4_addr_ismulticast(ip4_current_src_addr()))) {
 8025cd6:	4b47      	ldr	r3, [pc, #284]	@ (8025df4 <ip4_input+0x280>)
 8025cd8:	691b      	ldr	r3, [r3, #16]
 8025cda:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
    if ((ip4_addr_isbroadcast(ip4_current_src_addr(), inp)) ||
 8025cde:	2be0      	cmp	r3, #224	@ 0xe0
 8025ce0:	d104      	bne.n	8025cec <ip4_input+0x178>
      /* packet source is not valid */
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip4_input: packet source is not valid.\n"));
      /* free (drop) packet pbufs */
      pbuf_free(p);
 8025ce2:	6878      	ldr	r0, [r7, #4]
 8025ce4:	f7f5 fc42 	bl	801b56c <pbuf_free>
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
      return ERR_OK;
 8025ce8:	2300      	movs	r3, #0
 8025cea:	e07e      	b.n	8025dea <ip4_input+0x276>
    }
  }

  /* packet not for us? */
  if (netif == NULL) {
 8025cec:	69fb      	ldr	r3, [r7, #28]
 8025cee:	2b00      	cmp	r3, #0
 8025cf0:	d104      	bne.n	8025cfc <ip4_input+0x188>
    {
      IP_STATS_INC(ip.drop);
      MIB2_STATS_INC(mib2.ipinaddrerrors);
      MIB2_STATS_INC(mib2.ipindiscards);
    }
    pbuf_free(p);
 8025cf2:	6878      	ldr	r0, [r7, #4]
 8025cf4:	f7f5 fc3a 	bl	801b56c <pbuf_free>
    return ERR_OK;
 8025cf8:	2300      	movs	r3, #0
 8025cfa:	e076      	b.n	8025dea <ip4_input+0x276>
  }
  /* packet consists of multiple fragments? */
  if ((IPH_OFFSET(iphdr) & PP_HTONS(IP_OFFMASK | IP_MF)) != 0) {
 8025cfc:	693b      	ldr	r3, [r7, #16]
 8025cfe:	88db      	ldrh	r3, [r3, #6]
 8025d00:	b29b      	uxth	r3, r3
 8025d02:	461a      	mov	r2, r3
 8025d04:	f64f 733f 	movw	r3, #65343	@ 0xff3f
 8025d08:	4013      	ands	r3, r2
 8025d0a:	2b00      	cmp	r3, #0
 8025d0c:	d00b      	beq.n	8025d26 <ip4_input+0x1b2>
#if IP_REASSEMBLY /* packet fragment reassembly code present? */
    LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip4_reass()\n",
                           lwip_ntohs(IPH_ID(iphdr)), p->tot_len, lwip_ntohs(IPH_LEN(iphdr)), (u16_t)!!(IPH_OFFSET(iphdr) & PP_HTONS(IP_MF)), (u16_t)((lwip_ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK) * 8)));
    /* reassemble the packet*/
    p = ip4_reass(p);
 8025d0e:	6878      	ldr	r0, [r7, #4]
 8025d10:	f000 fe62 	bl	80269d8 <ip4_reass>
 8025d14:	6078      	str	r0, [r7, #4]
    /* packet not fully reassembled yet? */
    if (p == NULL) {
 8025d16:	687b      	ldr	r3, [r7, #4]
 8025d18:	2b00      	cmp	r3, #0
 8025d1a:	d101      	bne.n	8025d20 <ip4_input+0x1ac>
      return ERR_OK;
 8025d1c:	2300      	movs	r3, #0
 8025d1e:	e064      	b.n	8025dea <ip4_input+0x276>
    }
    iphdr = (const struct ip_hdr *)p->payload;
 8025d20:	687b      	ldr	r3, [r7, #4]
 8025d22:	685b      	ldr	r3, [r3, #4]
 8025d24:	613b      	str	r3, [r7, #16]
  /* send to upper layers */
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: \n"));
  ip4_debug_print(p);
  LWIP_DEBUGF(IP_DEBUG, ("ip4_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len));

  ip_data.current_netif = netif;
 8025d26:	4a33      	ldr	r2, [pc, #204]	@ (8025df4 <ip4_input+0x280>)
 8025d28:	69fb      	ldr	r3, [r7, #28]
 8025d2a:	6013      	str	r3, [r2, #0]
  ip_data.current_input_netif = inp;
 8025d2c:	4a31      	ldr	r2, [pc, #196]	@ (8025df4 <ip4_input+0x280>)
 8025d2e:	683b      	ldr	r3, [r7, #0]
 8025d30:	6053      	str	r3, [r2, #4]
  ip_data.current_ip4_header = iphdr;
 8025d32:	4a30      	ldr	r2, [pc, #192]	@ (8025df4 <ip4_input+0x280>)
 8025d34:	693b      	ldr	r3, [r7, #16]
 8025d36:	6093      	str	r3, [r2, #8]
  ip_data.current_ip_header_tot_len = IPH_HL_BYTES(iphdr);
 8025d38:	693b      	ldr	r3, [r7, #16]
 8025d3a:	781b      	ldrb	r3, [r3, #0]
 8025d3c:	f003 030f 	and.w	r3, r3, #15
 8025d40:	b2db      	uxtb	r3, r3
 8025d42:	009b      	lsls	r3, r3, #2
 8025d44:	b2db      	uxtb	r3, r3
 8025d46:	461a      	mov	r2, r3
 8025d48:	4b2a      	ldr	r3, [pc, #168]	@ (8025df4 <ip4_input+0x280>)
 8025d4a:	819a      	strh	r2, [r3, #12]
  /* raw input did not eat the packet? */
  raw_status = raw_input(p, inp);
  if (raw_status != RAW_INPUT_EATEN)
#endif /* LWIP_RAW */
  {
    pbuf_remove_header(p, iphdr_hlen); /* Move to payload, no check necessary. */
 8025d4c:	89fb      	ldrh	r3, [r7, #14]
 8025d4e:	4619      	mov	r1, r3
 8025d50:	6878      	ldr	r0, [r7, #4]
 8025d52:	f7f5 fb53 	bl	801b3fc <pbuf_remove_header>

    switch (IPH_PROTO(iphdr)) {
 8025d56:	693b      	ldr	r3, [r7, #16]
 8025d58:	7a5b      	ldrb	r3, [r3, #9]
 8025d5a:	2b11      	cmp	r3, #17
 8025d5c:	d006      	beq.n	8025d6c <ip4_input+0x1f8>
 8025d5e:	2b11      	cmp	r3, #17
 8025d60:	dc13      	bgt.n	8025d8a <ip4_input+0x216>
 8025d62:	2b01      	cmp	r3, #1
 8025d64:	d00c      	beq.n	8025d80 <ip4_input+0x20c>
 8025d66:	2b06      	cmp	r3, #6
 8025d68:	d005      	beq.n	8025d76 <ip4_input+0x202>
 8025d6a:	e00e      	b.n	8025d8a <ip4_input+0x216>
      case IP_PROTO_UDP:
#if LWIP_UDPLITE
      case IP_PROTO_UDPLITE:
#endif /* LWIP_UDPLITE */
        MIB2_STATS_INC(mib2.ipindelivers);
        udp_input(p, inp);
 8025d6c:	6839      	ldr	r1, [r7, #0]
 8025d6e:	6878      	ldr	r0, [r7, #4]
 8025d70:	f7fc f99c 	bl	80220ac <udp_input>
        break;
 8025d74:	e026      	b.n	8025dc4 <ip4_input+0x250>
#endif /* LWIP_UDP */
#if LWIP_TCP
      case IP_PROTO_TCP:
        MIB2_STATS_INC(mib2.ipindelivers);
        tcp_input(p, inp);
 8025d76:	6839      	ldr	r1, [r7, #0]
 8025d78:	6878      	ldr	r0, [r7, #4]
 8025d7a:	f7f7 fcdd 	bl	801d738 <tcp_input>
        break;
 8025d7e:	e021      	b.n	8025dc4 <ip4_input+0x250>
#endif /* LWIP_TCP */
#if LWIP_ICMP
      case IP_PROTO_ICMP:
        MIB2_STATS_INC(mib2.ipindelivers);
        icmp_input(p, inp);
 8025d80:	6839      	ldr	r1, [r7, #0]
 8025d82:	6878      	ldr	r0, [r7, #4]
 8025d84:	f7ff fca4 	bl	80256d0 <icmp_input>
        break;
 8025d88:	e01c      	b.n	8025dc4 <ip4_input+0x250>
        } else
#endif /* LWIP_RAW */
        {
#if LWIP_ICMP
          /* send ICMP destination protocol unreachable unless is was a broadcast */
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 8025d8a:	4b1a      	ldr	r3, [pc, #104]	@ (8025df4 <ip4_input+0x280>)
 8025d8c:	695b      	ldr	r3, [r3, #20]
 8025d8e:	69f9      	ldr	r1, [r7, #28]
 8025d90:	4618      	mov	r0, r3
 8025d92:	f000 f90d 	bl	8025fb0 <ip4_addr_isbroadcast_u32>
 8025d96:	4603      	mov	r3, r0
 8025d98:	2b00      	cmp	r3, #0
 8025d9a:	d10f      	bne.n	8025dbc <ip4_input+0x248>
              !ip4_addr_ismulticast(ip4_current_dest_addr())) {
 8025d9c:	4b15      	ldr	r3, [pc, #84]	@ (8025df4 <ip4_input+0x280>)
 8025d9e:	695b      	ldr	r3, [r3, #20]
 8025da0:	f003 03f0 	and.w	r3, r3, #240	@ 0xf0
          if (!ip4_addr_isbroadcast(ip4_current_dest_addr(), netif) &&
 8025da4:	2be0      	cmp	r3, #224	@ 0xe0
 8025da6:	d009      	beq.n	8025dbc <ip4_input+0x248>
            pbuf_header_force(p, (s16_t)iphdr_hlen); /* Move to ip header, no check necessary. */
 8025da8:	f9b7 300e 	ldrsh.w	r3, [r7, #14]
 8025dac:	4619      	mov	r1, r3
 8025dae:	6878      	ldr	r0, [r7, #4]
 8025db0:	f7f5 fb97 	bl	801b4e2 <pbuf_header_force>
            icmp_dest_unreach(p, ICMP_DUR_PROTO);
 8025db4:	2102      	movs	r1, #2
 8025db6:	6878      	ldr	r0, [r7, #4]
 8025db8:	f7ff fdae 	bl	8025918 <icmp_dest_unreach>

          IP_STATS_INC(ip.proterr);
          IP_STATS_INC(ip.drop);
          MIB2_STATS_INC(mib2.ipinunknownprotos);
        }
        pbuf_free(p);
 8025dbc:	6878      	ldr	r0, [r7, #4]
 8025dbe:	f7f5 fbd5 	bl	801b56c <pbuf_free>
        break;
 8025dc2:	bf00      	nop
    }
  }

  /* @todo: this is not really necessary... */
  ip_data.current_netif = NULL;
 8025dc4:	4b0b      	ldr	r3, [pc, #44]	@ (8025df4 <ip4_input+0x280>)
 8025dc6:	2200      	movs	r2, #0
 8025dc8:	601a      	str	r2, [r3, #0]
  ip_data.current_input_netif = NULL;
 8025dca:	4b0a      	ldr	r3, [pc, #40]	@ (8025df4 <ip4_input+0x280>)
 8025dcc:	2200      	movs	r2, #0
 8025dce:	605a      	str	r2, [r3, #4]
  ip_data.current_ip4_header = NULL;
 8025dd0:	4b08      	ldr	r3, [pc, #32]	@ (8025df4 <ip4_input+0x280>)
 8025dd2:	2200      	movs	r2, #0
 8025dd4:	609a      	str	r2, [r3, #8]
  ip_data.current_ip_header_tot_len = 0;
 8025dd6:	4b07      	ldr	r3, [pc, #28]	@ (8025df4 <ip4_input+0x280>)
 8025dd8:	2200      	movs	r2, #0
 8025dda:	819a      	strh	r2, [r3, #12]
  ip4_addr_set_any(ip4_current_src_addr());
 8025ddc:	4b05      	ldr	r3, [pc, #20]	@ (8025df4 <ip4_input+0x280>)
 8025dde:	2200      	movs	r2, #0
 8025de0:	611a      	str	r2, [r3, #16]
  ip4_addr_set_any(ip4_current_dest_addr());
 8025de2:	4b04      	ldr	r3, [pc, #16]	@ (8025df4 <ip4_input+0x280>)
 8025de4:	2200      	movs	r2, #0
 8025de6:	615a      	str	r2, [r3, #20]

  return ERR_OK;
 8025de8:	2300      	movs	r3, #0
}
 8025dea:	4618      	mov	r0, r3
 8025dec:	3720      	adds	r7, #32
 8025dee:	46bd      	mov	sp, r7
 8025df0:	bd80      	pop	{r7, pc}
 8025df2:	bf00      	nop
 8025df4:	24024458 	.word	0x24024458
 8025df8:	2402af9c 	.word	0x2402af9c

08025dfc <ip4_output_if>:
 */
err_t
ip4_output_if(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
              u8_t ttl, u8_t tos,
              u8_t proto, struct netif *netif)
{
 8025dfc:	b580      	push	{r7, lr}
 8025dfe:	b08a      	sub	sp, #40	@ 0x28
 8025e00:	af04      	add	r7, sp, #16
 8025e02:	60f8      	str	r0, [r7, #12]
 8025e04:	60b9      	str	r1, [r7, #8]
 8025e06:	607a      	str	r2, [r7, #4]
 8025e08:	70fb      	strb	r3, [r7, #3]
ip4_output_if_opt(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
                  u16_t optlen)
{
#endif /* IP_OPTIONS_SEND */
  const ip4_addr_t *src_used = src;
 8025e0a:	68bb      	ldr	r3, [r7, #8]
 8025e0c:	617b      	str	r3, [r7, #20]
  if (dest != LWIP_IP_HDRINCL) {
 8025e0e:	687b      	ldr	r3, [r7, #4]
 8025e10:	2b00      	cmp	r3, #0
 8025e12:	d009      	beq.n	8025e28 <ip4_output_if+0x2c>
    if (ip4_addr_isany(src)) {
 8025e14:	68bb      	ldr	r3, [r7, #8]
 8025e16:	2b00      	cmp	r3, #0
 8025e18:	d003      	beq.n	8025e22 <ip4_output_if+0x26>
 8025e1a:	68bb      	ldr	r3, [r7, #8]
 8025e1c:	681b      	ldr	r3, [r3, #0]
 8025e1e:	2b00      	cmp	r3, #0
 8025e20:	d102      	bne.n	8025e28 <ip4_output_if+0x2c>
      src_used = netif_ip4_addr(netif);
 8025e22:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025e24:	3304      	adds	r3, #4
 8025e26:	617b      	str	r3, [r7, #20]

#if IP_OPTIONS_SEND
  return ip4_output_if_opt_src(p, src_used, dest, ttl, tos, proto, netif,
                               ip_options, optlen);
#else /* IP_OPTIONS_SEND */
  return ip4_output_if_src(p, src_used, dest, ttl, tos, proto, netif);
 8025e28:	78fa      	ldrb	r2, [r7, #3]
 8025e2a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8025e2c:	9302      	str	r3, [sp, #8]
 8025e2e:	f897 3024 	ldrb.w	r3, [r7, #36]	@ 0x24
 8025e32:	9301      	str	r3, [sp, #4]
 8025e34:	f897 3020 	ldrb.w	r3, [r7, #32]
 8025e38:	9300      	str	r3, [sp, #0]
 8025e3a:	4613      	mov	r3, r2
 8025e3c:	687a      	ldr	r2, [r7, #4]
 8025e3e:	6979      	ldr	r1, [r7, #20]
 8025e40:	68f8      	ldr	r0, [r7, #12]
 8025e42:	f000 f805 	bl	8025e50 <ip4_output_if_src>
 8025e46:	4603      	mov	r3, r0
#endif /* IP_OPTIONS_SEND */
}
 8025e48:	4618      	mov	r0, r3
 8025e4a:	3718      	adds	r7, #24
 8025e4c:	46bd      	mov	sp, r7
 8025e4e:	bd80      	pop	{r7, pc}

08025e50 <ip4_output_if_src>:
 */
err_t
ip4_output_if_src(struct pbuf *p, const ip4_addr_t *src, const ip4_addr_t *dest,
                  u8_t ttl, u8_t tos,
                  u8_t proto, struct netif *netif)
{
 8025e50:	b580      	push	{r7, lr}
 8025e52:	b088      	sub	sp, #32
 8025e54:	af00      	add	r7, sp, #0
 8025e56:	60f8      	str	r0, [r7, #12]
 8025e58:	60b9      	str	r1, [r7, #8]
 8025e5a:	607a      	str	r2, [r7, #4]
 8025e5c:	70fb      	strb	r3, [r7, #3]
  ip4_addr_t dest_addr;
#if CHECKSUM_GEN_IP_INLINE
  u32_t chk_sum = 0;
#endif /* CHECKSUM_GEN_IP_INLINE */

  LWIP_ASSERT_CORE_LOCKED();
 8025e5e:	f7eb f9d1 	bl	8011204 <sys_check_core_locking>
  LWIP_IP_CHECK_PBUF_REF_COUNT_FOR_TX(p);
 8025e62:	68fb      	ldr	r3, [r7, #12]
 8025e64:	7b9b      	ldrb	r3, [r3, #14]
 8025e66:	2b01      	cmp	r3, #1
 8025e68:	d006      	beq.n	8025e78 <ip4_output_if_src+0x28>
 8025e6a:	4b4b      	ldr	r3, [pc, #300]	@ (8025f98 <ip4_output_if_src+0x148>)
 8025e6c:	f44f 7255 	mov.w	r2, #852	@ 0x354
 8025e70:	494a      	ldr	r1, [pc, #296]	@ (8025f9c <ip4_output_if_src+0x14c>)
 8025e72:	484b      	ldr	r0, [pc, #300]	@ (8025fa0 <ip4_output_if_src+0x150>)
 8025e74:	f004 fdf2 	bl	802aa5c <iprintf>

  MIB2_STATS_INC(mib2.ipoutrequests);

  /* Should the IP header be generated or is it already included in p? */
  if (dest != LWIP_IP_HDRINCL) {
 8025e78:	687b      	ldr	r3, [r7, #4]
 8025e7a:	2b00      	cmp	r3, #0
 8025e7c:	d060      	beq.n	8025f40 <ip4_output_if_src+0xf0>
    u16_t ip_hlen = IP_HLEN;
 8025e7e:	2314      	movs	r3, #20
 8025e80:	837b      	strh	r3, [r7, #26]
      }
#endif /* CHECKSUM_GEN_IP_INLINE */
    }
#endif /* IP_OPTIONS_SEND */
    /* generate IP header */
    if (pbuf_add_header(p, IP_HLEN)) {
 8025e82:	2114      	movs	r1, #20
 8025e84:	68f8      	ldr	r0, [r7, #12]
 8025e86:	f7f5 faa9 	bl	801b3dc <pbuf_add_header>
 8025e8a:	4603      	mov	r3, r0
 8025e8c:	2b00      	cmp	r3, #0
 8025e8e:	d002      	beq.n	8025e96 <ip4_output_if_src+0x46>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: not enough room for IP header in pbuf\n"));

      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 8025e90:	f06f 0301 	mvn.w	r3, #1
 8025e94:	e07c      	b.n	8025f90 <ip4_output_if_src+0x140>
    }

    iphdr = (struct ip_hdr *)p->payload;
 8025e96:	68fb      	ldr	r3, [r7, #12]
 8025e98:	685b      	ldr	r3, [r3, #4]
 8025e9a:	61fb      	str	r3, [r7, #28]
    LWIP_ASSERT("check that first pbuf can hold struct ip_hdr",
 8025e9c:	68fb      	ldr	r3, [r7, #12]
 8025e9e:	895b      	ldrh	r3, [r3, #10]
 8025ea0:	2b13      	cmp	r3, #19
 8025ea2:	d806      	bhi.n	8025eb2 <ip4_output_if_src+0x62>
 8025ea4:	4b3c      	ldr	r3, [pc, #240]	@ (8025f98 <ip4_output_if_src+0x148>)
 8025ea6:	f44f 7262 	mov.w	r2, #904	@ 0x388
 8025eaa:	493e      	ldr	r1, [pc, #248]	@ (8025fa4 <ip4_output_if_src+0x154>)
 8025eac:	483c      	ldr	r0, [pc, #240]	@ (8025fa0 <ip4_output_if_src+0x150>)
 8025eae:	f004 fdd5 	bl	802aa5c <iprintf>
                (p->len >= sizeof(struct ip_hdr)));

    IPH_TTL_SET(iphdr, ttl);
 8025eb2:	69fb      	ldr	r3, [r7, #28]
 8025eb4:	78fa      	ldrb	r2, [r7, #3]
 8025eb6:	721a      	strb	r2, [r3, #8]
    IPH_PROTO_SET(iphdr, proto);
 8025eb8:	69fb      	ldr	r3, [r7, #28]
 8025eba:	f897 202c 	ldrb.w	r2, [r7, #44]	@ 0x2c
 8025ebe:	725a      	strb	r2, [r3, #9]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(proto | (ttl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */

    /* dest cannot be NULL here */
    ip4_addr_copy(iphdr->dest, *dest);
 8025ec0:	687b      	ldr	r3, [r7, #4]
 8025ec2:	681a      	ldr	r2, [r3, #0]
 8025ec4:	69fb      	ldr	r3, [r7, #28]
 8025ec6:	611a      	str	r2, [r3, #16]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += ip4_addr_get_u32(&iphdr->dest) & 0xFFFF;
    chk_sum += ip4_addr_get_u32(&iphdr->dest) >> 16;
#endif /* CHECKSUM_GEN_IP_INLINE */

    IPH_VHL_SET(iphdr, 4, ip_hlen / 4);
 8025ec8:	8b7b      	ldrh	r3, [r7, #26]
 8025eca:	089b      	lsrs	r3, r3, #2
 8025ecc:	b29b      	uxth	r3, r3
 8025ece:	b2db      	uxtb	r3, r3
 8025ed0:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8025ed4:	b2da      	uxtb	r2, r3
 8025ed6:	69fb      	ldr	r3, [r7, #28]
 8025ed8:	701a      	strb	r2, [r3, #0]
    IPH_TOS_SET(iphdr, tos);
 8025eda:	69fb      	ldr	r3, [r7, #28]
 8025edc:	f897 2028 	ldrb.w	r2, [r7, #40]	@ 0x28
 8025ee0:	705a      	strb	r2, [r3, #1]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += PP_NTOHS(tos | (iphdr->_v_hl << 8));
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_LEN_SET(iphdr, lwip_htons(p->tot_len));
 8025ee2:	68fb      	ldr	r3, [r7, #12]
 8025ee4:	891b      	ldrh	r3, [r3, #8]
 8025ee6:	4618      	mov	r0, r3
 8025ee8:	f7f3 fe5e 	bl	8019ba8 <lwip_htons>
 8025eec:	4603      	mov	r3, r0
 8025eee:	461a      	mov	r2, r3
 8025ef0:	69fb      	ldr	r3, [r7, #28]
 8025ef2:	805a      	strh	r2, [r3, #2]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_len;
#endif /* CHECKSUM_GEN_IP_INLINE */
    IPH_OFFSET_SET(iphdr, 0);
 8025ef4:	69fb      	ldr	r3, [r7, #28]
 8025ef6:	2200      	movs	r2, #0
 8025ef8:	719a      	strb	r2, [r3, #6]
 8025efa:	2200      	movs	r2, #0
 8025efc:	71da      	strb	r2, [r3, #7]
    IPH_ID_SET(iphdr, lwip_htons(ip_id));
 8025efe:	4b2a      	ldr	r3, [pc, #168]	@ (8025fa8 <ip4_output_if_src+0x158>)
 8025f00:	881b      	ldrh	r3, [r3, #0]
 8025f02:	4618      	mov	r0, r3
 8025f04:	f7f3 fe50 	bl	8019ba8 <lwip_htons>
 8025f08:	4603      	mov	r3, r0
 8025f0a:	461a      	mov	r2, r3
 8025f0c:	69fb      	ldr	r3, [r7, #28]
 8025f0e:	809a      	strh	r2, [r3, #4]
#if CHECKSUM_GEN_IP_INLINE
    chk_sum += iphdr->_id;
#endif /* CHECKSUM_GEN_IP_INLINE */
    ++ip_id;
 8025f10:	4b25      	ldr	r3, [pc, #148]	@ (8025fa8 <ip4_output_if_src+0x158>)
 8025f12:	881b      	ldrh	r3, [r3, #0]
 8025f14:	3301      	adds	r3, #1
 8025f16:	b29a      	uxth	r2, r3
 8025f18:	4b23      	ldr	r3, [pc, #140]	@ (8025fa8 <ip4_output_if_src+0x158>)
 8025f1a:	801a      	strh	r2, [r3, #0]

    if (src == NULL) {
 8025f1c:	68bb      	ldr	r3, [r7, #8]
 8025f1e:	2b00      	cmp	r3, #0
 8025f20:	d104      	bne.n	8025f2c <ip4_output_if_src+0xdc>
      ip4_addr_copy(iphdr->src, *IP4_ADDR_ANY4);
 8025f22:	4b22      	ldr	r3, [pc, #136]	@ (8025fac <ip4_output_if_src+0x15c>)
 8025f24:	681a      	ldr	r2, [r3, #0]
 8025f26:	69fb      	ldr	r3, [r7, #28]
 8025f28:	60da      	str	r2, [r3, #12]
 8025f2a:	e003      	b.n	8025f34 <ip4_output_if_src+0xe4>
    } else {
      /* src cannot be NULL here */
      ip4_addr_copy(iphdr->src, *src);
 8025f2c:	68bb      	ldr	r3, [r7, #8]
 8025f2e:	681a      	ldr	r2, [r3, #0]
 8025f30:	69fb      	ldr	r3, [r7, #28]
 8025f32:	60da      	str	r2, [r3, #12]
    else {
      IPH_CHKSUM_SET(iphdr, 0);
    }
#endif /* LWIP_CHECKSUM_CTRL_PER_NETIF*/
#else /* CHECKSUM_GEN_IP_INLINE */
    IPH_CHKSUM_SET(iphdr, 0);
 8025f34:	69fb      	ldr	r3, [r7, #28]
 8025f36:	2200      	movs	r2, #0
 8025f38:	729a      	strb	r2, [r3, #10]
 8025f3a:	2200      	movs	r2, #0
 8025f3c:	72da      	strb	r2, [r3, #11]
 8025f3e:	e00f      	b.n	8025f60 <ip4_output_if_src+0x110>
    }
#endif /* CHECKSUM_GEN_IP */
#endif /* CHECKSUM_GEN_IP_INLINE */
  } else {
    /* IP header already included in p */
    if (p->len < IP_HLEN) {
 8025f40:	68fb      	ldr	r3, [r7, #12]
 8025f42:	895b      	ldrh	r3, [r3, #10]
 8025f44:	2b13      	cmp	r3, #19
 8025f46:	d802      	bhi.n	8025f4e <ip4_output_if_src+0xfe>
      LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip4_output: LWIP_IP_HDRINCL but pbuf is too short\n"));
      IP_STATS_INC(ip.err);
      MIB2_STATS_INC(mib2.ipoutdiscards);
      return ERR_BUF;
 8025f48:	f06f 0301 	mvn.w	r3, #1
 8025f4c:	e020      	b.n	8025f90 <ip4_output_if_src+0x140>
    }
    iphdr = (struct ip_hdr *)p->payload;
 8025f4e:	68fb      	ldr	r3, [r7, #12]
 8025f50:	685b      	ldr	r3, [r3, #4]
 8025f52:	61fb      	str	r3, [r7, #28]
    ip4_addr_copy(dest_addr, iphdr->dest);
 8025f54:	69fb      	ldr	r3, [r7, #28]
 8025f56:	691b      	ldr	r3, [r3, #16]
 8025f58:	617b      	str	r3, [r7, #20]
    dest = &dest_addr;
 8025f5a:	f107 0314 	add.w	r3, r7, #20
 8025f5e:	607b      	str	r3, [r7, #4]
  }
#endif /* LWIP_MULTICAST_TX_OPTIONS */
#endif /* ENABLE_LOOPBACK */
#if IP_FRAG
  /* don't fragment if interface has mtu set to 0 [loopif] */
  if (netif->mtu && (p->tot_len > netif->mtu)) {
 8025f60:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025f62:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8025f64:	2b00      	cmp	r3, #0
 8025f66:	d00c      	beq.n	8025f82 <ip4_output_if_src+0x132>
 8025f68:	68fb      	ldr	r3, [r7, #12]
 8025f6a:	891a      	ldrh	r2, [r3, #8]
 8025f6c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025f6e:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8025f70:	429a      	cmp	r2, r3
 8025f72:	d906      	bls.n	8025f82 <ip4_output_if_src+0x132>
    return ip4_frag(p, netif, dest);
 8025f74:	687a      	ldr	r2, [r7, #4]
 8025f76:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 8025f78:	68f8      	ldr	r0, [r7, #12]
 8025f7a:	f000 ff21 	bl	8026dc0 <ip4_frag>
 8025f7e:	4603      	mov	r3, r0
 8025f80:	e006      	b.n	8025f90 <ip4_output_if_src+0x140>
  }
#endif /* IP_FRAG */

  LWIP_DEBUGF(IP_DEBUG, ("ip4_output_if: call netif->output()\n"));
  return netif->output(netif, p, dest);
 8025f82:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8025f84:	695b      	ldr	r3, [r3, #20]
 8025f86:	687a      	ldr	r2, [r7, #4]
 8025f88:	68f9      	ldr	r1, [r7, #12]
 8025f8a:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8025f8c:	4798      	blx	r3
 8025f8e:	4603      	mov	r3, r0
}
 8025f90:	4618      	mov	r0, r3
 8025f92:	3720      	adds	r7, #32
 8025f94:	46bd      	mov	sp, r7
 8025f96:	bd80      	pop	{r7, pc}
 8025f98:	080317dc 	.word	0x080317dc
 8025f9c:	08031810 	.word	0x08031810
 8025fa0:	0803181c 	.word	0x0803181c
 8025fa4:	08031844 	.word	0x08031844
 8025fa8:	2402b132 	.word	0x2402b132
 8025fac:	08031ef8 	.word	0x08031ef8

08025fb0 <ip4_addr_isbroadcast_u32>:
 * @param netif the network interface against which the address is checked
 * @return returns non-zero if the address is a broadcast address
 */
u8_t
ip4_addr_isbroadcast_u32(u32_t addr, const struct netif *netif)
{
 8025fb0:	b480      	push	{r7}
 8025fb2:	b085      	sub	sp, #20
 8025fb4:	af00      	add	r7, sp, #0
 8025fb6:	6078      	str	r0, [r7, #4]
 8025fb8:	6039      	str	r1, [r7, #0]
  ip4_addr_t ipaddr;
  ip4_addr_set_u32(&ipaddr, addr);
 8025fba:	687b      	ldr	r3, [r7, #4]
 8025fbc:	60fb      	str	r3, [r7, #12]

  /* all ones (broadcast) or all zeroes (old skool broadcast) */
  if ((~addr == IPADDR_ANY) ||
 8025fbe:	687b      	ldr	r3, [r7, #4]
 8025fc0:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8025fc4:	d002      	beq.n	8025fcc <ip4_addr_isbroadcast_u32+0x1c>
 8025fc6:	687b      	ldr	r3, [r7, #4]
 8025fc8:	2b00      	cmp	r3, #0
 8025fca:	d101      	bne.n	8025fd0 <ip4_addr_isbroadcast_u32+0x20>
      (addr == IPADDR_ANY)) {
    return 1;
 8025fcc:	2301      	movs	r3, #1
 8025fce:	e02a      	b.n	8026026 <ip4_addr_isbroadcast_u32+0x76>
    /* no broadcast support on this network interface? */
  } else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) {
 8025fd0:	683b      	ldr	r3, [r7, #0]
 8025fd2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 8025fd6:	f003 0302 	and.w	r3, r3, #2
 8025fda:	2b00      	cmp	r3, #0
 8025fdc:	d101      	bne.n	8025fe2 <ip4_addr_isbroadcast_u32+0x32>
    /* the given address cannot be a broadcast address
     * nor can we check against any broadcast addresses */
    return 0;
 8025fde:	2300      	movs	r3, #0
 8025fe0:	e021      	b.n	8026026 <ip4_addr_isbroadcast_u32+0x76>
    /* address matches network interface address exactly? => no broadcast */
  } else if (addr == ip4_addr_get_u32(netif_ip4_addr(netif))) {
 8025fe2:	683b      	ldr	r3, [r7, #0]
 8025fe4:	3304      	adds	r3, #4
 8025fe6:	681b      	ldr	r3, [r3, #0]
 8025fe8:	687a      	ldr	r2, [r7, #4]
 8025fea:	429a      	cmp	r2, r3
 8025fec:	d101      	bne.n	8025ff2 <ip4_addr_isbroadcast_u32+0x42>
    return 0;
 8025fee:	2300      	movs	r3, #0
 8025ff0:	e019      	b.n	8026026 <ip4_addr_isbroadcast_u32+0x76>
    /*  on the same (sub) network... */
  } else if (ip4_addr_netcmp(&ipaddr, netif_ip4_addr(netif), netif_ip4_netmask(netif))
 8025ff2:	68fa      	ldr	r2, [r7, #12]
 8025ff4:	683b      	ldr	r3, [r7, #0]
 8025ff6:	3304      	adds	r3, #4
 8025ff8:	681b      	ldr	r3, [r3, #0]
 8025ffa:	405a      	eors	r2, r3
 8025ffc:	683b      	ldr	r3, [r7, #0]
 8025ffe:	3308      	adds	r3, #8
 8026000:	681b      	ldr	r3, [r3, #0]
 8026002:	4013      	ands	r3, r2
 8026004:	2b00      	cmp	r3, #0
 8026006:	d10d      	bne.n	8026024 <ip4_addr_isbroadcast_u32+0x74>
             /* ...and host identifier bits are all ones? =>... */
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 8026008:	683b      	ldr	r3, [r7, #0]
 802600a:	3308      	adds	r3, #8
 802600c:	681b      	ldr	r3, [r3, #0]
 802600e:	43da      	mvns	r2, r3
 8026010:	687b      	ldr	r3, [r7, #4]
 8026012:	401a      	ands	r2, r3
                 (IPADDR_BROADCAST & ~ip4_addr_get_u32(netif_ip4_netmask(netif))))) {
 8026014:	683b      	ldr	r3, [r7, #0]
 8026016:	3308      	adds	r3, #8
 8026018:	681b      	ldr	r3, [r3, #0]
 802601a:	43db      	mvns	r3, r3
             && ((addr & ~ip4_addr_get_u32(netif_ip4_netmask(netif))) ==
 802601c:	429a      	cmp	r2, r3
 802601e:	d101      	bne.n	8026024 <ip4_addr_isbroadcast_u32+0x74>
    /* => network broadcast address */
    return 1;
 8026020:	2301      	movs	r3, #1
 8026022:	e000      	b.n	8026026 <ip4_addr_isbroadcast_u32+0x76>
  } else {
    return 0;
 8026024:	2300      	movs	r3, #0
  }
}
 8026026:	4618      	mov	r0, r3
 8026028:	3714      	adds	r7, #20
 802602a:	46bd      	mov	sp, r7
 802602c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8026030:	4770      	bx	lr

08026032 <ipaddr_addr>:
 * @param cp IP address in ascii representation (e.g. "127.0.0.1")
 * @return ip address in network order
 */
u32_t
ipaddr_addr(const char *cp)
{
 8026032:	b580      	push	{r7, lr}
 8026034:	b084      	sub	sp, #16
 8026036:	af00      	add	r7, sp, #0
 8026038:	6078      	str	r0, [r7, #4]
  ip4_addr_t val;

  if (ip4addr_aton(cp, &val)) {
 802603a:	f107 030c 	add.w	r3, r7, #12
 802603e:	4619      	mov	r1, r3
 8026040:	6878      	ldr	r0, [r7, #4]
 8026042:	f000 f80b 	bl	802605c <ip4addr_aton>
 8026046:	4603      	mov	r3, r0
 8026048:	2b00      	cmp	r3, #0
 802604a:	d001      	beq.n	8026050 <ipaddr_addr+0x1e>
    return ip4_addr_get_u32(&val);
 802604c:	68fb      	ldr	r3, [r7, #12]
 802604e:	e001      	b.n	8026054 <ipaddr_addr+0x22>
  }
  return (IPADDR_NONE);
 8026050:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 8026054:	4618      	mov	r0, r3
 8026056:	3710      	adds	r7, #16
 8026058:	46bd      	mov	sp, r7
 802605a:	bd80      	pop	{r7, pc}

0802605c <ip4addr_aton>:
 * @param addr pointer to which to save the ip address in network order
 * @return 1 if cp could be converted to addr, 0 on failure
 */
int
ip4addr_aton(const char *cp, ip4_addr_t *addr)
{
 802605c:	b580      	push	{r7, lr}
 802605e:	b08a      	sub	sp, #40	@ 0x28
 8026060:	af00      	add	r7, sp, #0
 8026062:	6078      	str	r0, [r7, #4]
 8026064:	6039      	str	r1, [r7, #0]
  u32_t val;
  u8_t base;
  char c;
  u32_t parts[4];
  u32_t *pp = parts;
 8026066:	f107 030c 	add.w	r3, r7, #12
 802606a:	61fb      	str	r3, [r7, #28]

  c = *cp;
 802606c:	687b      	ldr	r3, [r7, #4]
 802606e:	781b      	ldrb	r3, [r3, #0]
 8026070:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    /*
     * Collect number up to ``.''.
     * Values are specified as for C:
     * 0x=hex, 0=octal, 1-9=decimal.
     */
    if (!lwip_isdigit(c)) {
 8026074:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 8026078:	3301      	adds	r3, #1
 802607a:	4a89      	ldr	r2, [pc, #548]	@ (80262a0 <ip4addr_aton+0x244>)
 802607c:	4413      	add	r3, r2
 802607e:	781b      	ldrb	r3, [r3, #0]
 8026080:	f003 0304 	and.w	r3, r3, #4
 8026084:	2b00      	cmp	r3, #0
 8026086:	d101      	bne.n	802608c <ip4addr_aton+0x30>
      return 0;
 8026088:	2300      	movs	r3, #0
 802608a:	e105      	b.n	8026298 <ip4addr_aton+0x23c>
    }
    val = 0;
 802608c:	2300      	movs	r3, #0
 802608e:	627b      	str	r3, [r7, #36]	@ 0x24
    base = 10;
 8026090:	230a      	movs	r3, #10
 8026092:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
    if (c == '0') {
 8026096:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802609a:	2b30      	cmp	r3, #48	@ 0x30
 802609c:	d11c      	bne.n	80260d8 <ip4addr_aton+0x7c>
      c = *++cp;
 802609e:	687b      	ldr	r3, [r7, #4]
 80260a0:	3301      	adds	r3, #1
 80260a2:	607b      	str	r3, [r7, #4]
 80260a4:	687b      	ldr	r3, [r7, #4]
 80260a6:	781b      	ldrb	r3, [r3, #0]
 80260a8:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (c == 'x' || c == 'X') {
 80260ac:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80260b0:	2b78      	cmp	r3, #120	@ 0x78
 80260b2:	d003      	beq.n	80260bc <ip4addr_aton+0x60>
 80260b4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80260b8:	2b58      	cmp	r3, #88	@ 0x58
 80260ba:	d10a      	bne.n	80260d2 <ip4addr_aton+0x76>
        base = 16;
 80260bc:	2310      	movs	r3, #16
 80260be:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
        c = *++cp;
 80260c2:	687b      	ldr	r3, [r7, #4]
 80260c4:	3301      	adds	r3, #1
 80260c6:	607b      	str	r3, [r7, #4]
 80260c8:	687b      	ldr	r3, [r7, #4]
 80260ca:	781b      	ldrb	r3, [r3, #0]
 80260cc:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 80260d0:	e002      	b.n	80260d8 <ip4addr_aton+0x7c>
      } else {
        base = 8;
 80260d2:	2308      	movs	r3, #8
 80260d4:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
      }
    }
    for (;;) {
      if (lwip_isdigit(c)) {
 80260d8:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80260dc:	3301      	adds	r3, #1
 80260de:	4a70      	ldr	r2, [pc, #448]	@ (80262a0 <ip4addr_aton+0x244>)
 80260e0:	4413      	add	r3, r2
 80260e2:	781b      	ldrb	r3, [r3, #0]
 80260e4:	f003 0304 	and.w	r3, r3, #4
 80260e8:	2b00      	cmp	r3, #0
 80260ea:	d011      	beq.n	8026110 <ip4addr_aton+0xb4>
        val = (val * base) + (u32_t)(c - '0');
 80260ec:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 80260f0:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80260f2:	fb03 f202 	mul.w	r2, r3, r2
 80260f6:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80260fa:	4413      	add	r3, r2
 80260fc:	3b30      	subs	r3, #48	@ 0x30
 80260fe:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 8026100:	687b      	ldr	r3, [r7, #4]
 8026102:	3301      	adds	r3, #1
 8026104:	607b      	str	r3, [r7, #4]
 8026106:	687b      	ldr	r3, [r7, #4]
 8026108:	781b      	ldrb	r3, [r3, #0]
 802610a:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
 802610e:	e7e3      	b.n	80260d8 <ip4addr_aton+0x7c>
      } else if (base == 16 && lwip_isxdigit(c)) {
 8026110:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8026114:	2b10      	cmp	r3, #16
 8026116:	d127      	bne.n	8026168 <ip4addr_aton+0x10c>
 8026118:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802611c:	3301      	adds	r3, #1
 802611e:	4a60      	ldr	r2, [pc, #384]	@ (80262a0 <ip4addr_aton+0x244>)
 8026120:	4413      	add	r3, r2
 8026122:	781b      	ldrb	r3, [r3, #0]
 8026124:	f003 0344 	and.w	r3, r3, #68	@ 0x44
 8026128:	2b00      	cmp	r3, #0
 802612a:	d01d      	beq.n	8026168 <ip4addr_aton+0x10c>
        val = (val << 4) | (u32_t)(c + 10 - (lwip_islower(c) ? 'a' : 'A'));
 802612c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802612e:	011b      	lsls	r3, r3, #4
 8026130:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 8026134:	f102 010a 	add.w	r1, r2, #10
 8026138:	f897 2022 	ldrb.w	r2, [r7, #34]	@ 0x22
 802613c:	3201      	adds	r2, #1
 802613e:	4858      	ldr	r0, [pc, #352]	@ (80262a0 <ip4addr_aton+0x244>)
 8026140:	4402      	add	r2, r0
 8026142:	7812      	ldrb	r2, [r2, #0]
 8026144:	f002 0203 	and.w	r2, r2, #3
 8026148:	2a02      	cmp	r2, #2
 802614a:	d101      	bne.n	8026150 <ip4addr_aton+0xf4>
 802614c:	2261      	movs	r2, #97	@ 0x61
 802614e:	e000      	b.n	8026152 <ip4addr_aton+0xf6>
 8026150:	2241      	movs	r2, #65	@ 0x41
 8026152:	1a8a      	subs	r2, r1, r2
 8026154:	4313      	orrs	r3, r2
 8026156:	627b      	str	r3, [r7, #36]	@ 0x24
        c = *++cp;
 8026158:	687b      	ldr	r3, [r7, #4]
 802615a:	3301      	adds	r3, #1
 802615c:	607b      	str	r3, [r7, #4]
 802615e:	687b      	ldr	r3, [r7, #4]
 8026160:	781b      	ldrb	r3, [r3, #0]
 8026162:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
      if (lwip_isdigit(c)) {
 8026166:	e7b7      	b.n	80260d8 <ip4addr_aton+0x7c>
      } else {
        break;
      }
    }
    if (c == '.') {
 8026168:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 802616c:	2b2e      	cmp	r3, #46	@ 0x2e
 802616e:	d114      	bne.n	802619a <ip4addr_aton+0x13e>
       * Internet format:
       *  a.b.c.d
       *  a.b.c   (with c treated as 16 bits)
       *  a.b (with b treated as 24 bits)
       */
      if (pp >= parts + 3) {
 8026170:	f107 030c 	add.w	r3, r7, #12
 8026174:	330c      	adds	r3, #12
 8026176:	69fa      	ldr	r2, [r7, #28]
 8026178:	429a      	cmp	r2, r3
 802617a:	d301      	bcc.n	8026180 <ip4addr_aton+0x124>
        return 0;
 802617c:	2300      	movs	r3, #0
 802617e:	e08b      	b.n	8026298 <ip4addr_aton+0x23c>
      }
      *pp++ = val;
 8026180:	69fb      	ldr	r3, [r7, #28]
 8026182:	1d1a      	adds	r2, r3, #4
 8026184:	61fa      	str	r2, [r7, #28]
 8026186:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8026188:	601a      	str	r2, [r3, #0]
      c = *++cp;
 802618a:	687b      	ldr	r3, [r7, #4]
 802618c:	3301      	adds	r3, #1
 802618e:	607b      	str	r3, [r7, #4]
 8026190:	687b      	ldr	r3, [r7, #4]
 8026192:	781b      	ldrb	r3, [r3, #0]
 8026194:	f887 3022 	strb.w	r3, [r7, #34]	@ 0x22
    if (!lwip_isdigit(c)) {
 8026198:	e76c      	b.n	8026074 <ip4addr_aton+0x18>
    } else {
      break;
 802619a:	bf00      	nop
    }
  }
  /*
   * Check for trailing characters.
   */
  if (c != '\0' && !lwip_isspace(c)) {
 802619c:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80261a0:	2b00      	cmp	r3, #0
 80261a2:	d00b      	beq.n	80261bc <ip4addr_aton+0x160>
 80261a4:	f897 3022 	ldrb.w	r3, [r7, #34]	@ 0x22
 80261a8:	3301      	adds	r3, #1
 80261aa:	4a3d      	ldr	r2, [pc, #244]	@ (80262a0 <ip4addr_aton+0x244>)
 80261ac:	4413      	add	r3, r2
 80261ae:	781b      	ldrb	r3, [r3, #0]
 80261b0:	f003 0308 	and.w	r3, r3, #8
 80261b4:	2b00      	cmp	r3, #0
 80261b6:	d101      	bne.n	80261bc <ip4addr_aton+0x160>
    return 0;
 80261b8:	2300      	movs	r3, #0
 80261ba:	e06d      	b.n	8026298 <ip4addr_aton+0x23c>
  }
  /*
   * Concoct the address according to
   * the number of parts specified.
   */
  switch (pp - parts + 1) {
 80261bc:	f107 030c 	add.w	r3, r7, #12
 80261c0:	69fa      	ldr	r2, [r7, #28]
 80261c2:	1ad3      	subs	r3, r2, r3
 80261c4:	109b      	asrs	r3, r3, #2
 80261c6:	3301      	adds	r3, #1
 80261c8:	2b04      	cmp	r3, #4
 80261ca:	d853      	bhi.n	8026274 <ip4addr_aton+0x218>
 80261cc:	a201      	add	r2, pc, #4	@ (adr r2, 80261d4 <ip4addr_aton+0x178>)
 80261ce:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 80261d2:	bf00      	nop
 80261d4:	080261e9 	.word	0x080261e9
 80261d8:	08026283 	.word	0x08026283
 80261dc:	080261ed 	.word	0x080261ed
 80261e0:	0802620f 	.word	0x0802620f
 80261e4:	0802623d 	.word	0x0802623d

    case 0:
      return 0;       /* initial nondigit */
 80261e8:	2300      	movs	r3, #0
 80261ea:	e055      	b.n	8026298 <ip4addr_aton+0x23c>

    case 1:             /* a -- 32 bits */
      break;

    case 2:             /* a.b -- 8.24 bits */
      if (val > 0xffffffUL) {
 80261ec:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80261ee:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 80261f2:	d301      	bcc.n	80261f8 <ip4addr_aton+0x19c>
        return 0;
 80261f4:	2300      	movs	r3, #0
 80261f6:	e04f      	b.n	8026298 <ip4addr_aton+0x23c>
      }
      if (parts[0] > 0xff) {
 80261f8:	68fb      	ldr	r3, [r7, #12]
 80261fa:	2bff      	cmp	r3, #255	@ 0xff
 80261fc:	d901      	bls.n	8026202 <ip4addr_aton+0x1a6>
        return 0;
 80261fe:	2300      	movs	r3, #0
 8026200:	e04a      	b.n	8026298 <ip4addr_aton+0x23c>
      }
      val |= parts[0] << 24;
 8026202:	68fb      	ldr	r3, [r7, #12]
 8026204:	061b      	lsls	r3, r3, #24
 8026206:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8026208:	4313      	orrs	r3, r2
 802620a:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 802620c:	e03a      	b.n	8026284 <ip4addr_aton+0x228>

    case 3:             /* a.b.c -- 8.8.16 bits */
      if (val > 0xffff) {
 802620e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026210:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 8026214:	d301      	bcc.n	802621a <ip4addr_aton+0x1be>
        return 0;
 8026216:	2300      	movs	r3, #0
 8026218:	e03e      	b.n	8026298 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff)) {
 802621a:	68fb      	ldr	r3, [r7, #12]
 802621c:	2bff      	cmp	r3, #255	@ 0xff
 802621e:	d802      	bhi.n	8026226 <ip4addr_aton+0x1ca>
 8026220:	693b      	ldr	r3, [r7, #16]
 8026222:	2bff      	cmp	r3, #255	@ 0xff
 8026224:	d901      	bls.n	802622a <ip4addr_aton+0x1ce>
        return 0;
 8026226:	2300      	movs	r3, #0
 8026228:	e036      	b.n	8026298 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16);
 802622a:	68fb      	ldr	r3, [r7, #12]
 802622c:	061a      	lsls	r2, r3, #24
 802622e:	693b      	ldr	r3, [r7, #16]
 8026230:	041b      	lsls	r3, r3, #16
 8026232:	4313      	orrs	r3, r2
 8026234:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8026236:	4313      	orrs	r3, r2
 8026238:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 802623a:	e023      	b.n	8026284 <ip4addr_aton+0x228>

    case 4:             /* a.b.c.d -- 8.8.8.8 bits */
      if (val > 0xff) {
 802623c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 802623e:	2bff      	cmp	r3, #255	@ 0xff
 8026240:	d901      	bls.n	8026246 <ip4addr_aton+0x1ea>
        return 0;
 8026242:	2300      	movs	r3, #0
 8026244:	e028      	b.n	8026298 <ip4addr_aton+0x23c>
      }
      if ((parts[0] > 0xff) || (parts[1] > 0xff) || (parts[2] > 0xff)) {
 8026246:	68fb      	ldr	r3, [r7, #12]
 8026248:	2bff      	cmp	r3, #255	@ 0xff
 802624a:	d805      	bhi.n	8026258 <ip4addr_aton+0x1fc>
 802624c:	693b      	ldr	r3, [r7, #16]
 802624e:	2bff      	cmp	r3, #255	@ 0xff
 8026250:	d802      	bhi.n	8026258 <ip4addr_aton+0x1fc>
 8026252:	697b      	ldr	r3, [r7, #20]
 8026254:	2bff      	cmp	r3, #255	@ 0xff
 8026256:	d901      	bls.n	802625c <ip4addr_aton+0x200>
        return 0;
 8026258:	2300      	movs	r3, #0
 802625a:	e01d      	b.n	8026298 <ip4addr_aton+0x23c>
      }
      val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
 802625c:	68fb      	ldr	r3, [r7, #12]
 802625e:	061a      	lsls	r2, r3, #24
 8026260:	693b      	ldr	r3, [r7, #16]
 8026262:	041b      	lsls	r3, r3, #16
 8026264:	431a      	orrs	r2, r3
 8026266:	697b      	ldr	r3, [r7, #20]
 8026268:	021b      	lsls	r3, r3, #8
 802626a:	4313      	orrs	r3, r2
 802626c:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802626e:	4313      	orrs	r3, r2
 8026270:	627b      	str	r3, [r7, #36]	@ 0x24
      break;
 8026272:	e007      	b.n	8026284 <ip4addr_aton+0x228>
    default:
      LWIP_ASSERT("unhandled", 0);
 8026274:	4b0b      	ldr	r3, [pc, #44]	@ (80262a4 <ip4addr_aton+0x248>)
 8026276:	22f9      	movs	r2, #249	@ 0xf9
 8026278:	490b      	ldr	r1, [pc, #44]	@ (80262a8 <ip4addr_aton+0x24c>)
 802627a:	480c      	ldr	r0, [pc, #48]	@ (80262ac <ip4addr_aton+0x250>)
 802627c:	f004 fbee 	bl	802aa5c <iprintf>
      break;
 8026280:	e000      	b.n	8026284 <ip4addr_aton+0x228>
      break;
 8026282:	bf00      	nop
  }
  if (addr) {
 8026284:	683b      	ldr	r3, [r7, #0]
 8026286:	2b00      	cmp	r3, #0
 8026288:	d005      	beq.n	8026296 <ip4addr_aton+0x23a>
    ip4_addr_set_u32(addr, lwip_htonl(val));
 802628a:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 802628c:	f7f3 fca1 	bl	8019bd2 <lwip_htonl>
 8026290:	4602      	mov	r2, r0
 8026292:	683b      	ldr	r3, [r7, #0]
 8026294:	601a      	str	r2, [r3, #0]
  }
  return 1;
 8026296:	2301      	movs	r3, #1
}
 8026298:	4618      	mov	r0, r3
 802629a:	3728      	adds	r7, #40	@ 0x28
 802629c:	46bd      	mov	sp, r7
 802629e:	bd80      	pop	{r7, pc}
 80262a0:	08031fd0 	.word	0x08031fd0
 80262a4:	08031874 	.word	0x08031874
 80262a8:	080318b0 	.word	0x080318b0
 80262ac:	080318bc 	.word	0x080318bc

080262b0 <ip4addr_ntoa>:
 * @return pointer to a global static (!) buffer that holds the ASCII
 *         representation of addr
 */
char *
ip4addr_ntoa(const ip4_addr_t *addr)
{
 80262b0:	b580      	push	{r7, lr}
 80262b2:	b082      	sub	sp, #8
 80262b4:	af00      	add	r7, sp, #0
 80262b6:	6078      	str	r0, [r7, #4]
  static char str[IP4ADDR_STRLEN_MAX];
  return ip4addr_ntoa_r(addr, str, IP4ADDR_STRLEN_MAX);
 80262b8:	2210      	movs	r2, #16
 80262ba:	4904      	ldr	r1, [pc, #16]	@ (80262cc <ip4addr_ntoa+0x1c>)
 80262bc:	6878      	ldr	r0, [r7, #4]
 80262be:	f000 f807 	bl	80262d0 <ip4addr_ntoa_r>
 80262c2:	4603      	mov	r3, r0
}
 80262c4:	4618      	mov	r0, r3
 80262c6:	3708      	adds	r7, #8
 80262c8:	46bd      	mov	sp, r7
 80262ca:	bd80      	pop	{r7, pc}
 80262cc:	2402b134 	.word	0x2402b134

080262d0 <ip4addr_ntoa_r>:
 * @return either pointer to buf which now holds the ASCII
 *         representation of addr or NULL if buf was too small
 */
char *
ip4addr_ntoa_r(const ip4_addr_t *addr, char *buf, int buflen)
{
 80262d0:	b480      	push	{r7}
 80262d2:	b08d      	sub	sp, #52	@ 0x34
 80262d4:	af00      	add	r7, sp, #0
 80262d6:	60f8      	str	r0, [r7, #12]
 80262d8:	60b9      	str	r1, [r7, #8]
 80262da:	607a      	str	r2, [r7, #4]
  char *rp;
  u8_t *ap;
  u8_t rem;
  u8_t n;
  u8_t i;
  int len = 0;
 80262dc:	2300      	movs	r3, #0
 80262de:	623b      	str	r3, [r7, #32]

  s_addr = ip4_addr_get_u32(addr);
 80262e0:	68fb      	ldr	r3, [r7, #12]
 80262e2:	681b      	ldr	r3, [r3, #0]
 80262e4:	61bb      	str	r3, [r7, #24]

  rp = buf;
 80262e6:	68bb      	ldr	r3, [r7, #8]
 80262e8:	62fb      	str	r3, [r7, #44]	@ 0x2c
  ap = (u8_t *)&s_addr;
 80262ea:	f107 0318 	add.w	r3, r7, #24
 80262ee:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 80262f0:	2300      	movs	r3, #0
 80262f2:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 80262f6:	e058      	b.n	80263aa <ip4addr_ntoa_r+0xda>
    i = 0;
 80262f8:	2300      	movs	r3, #0
 80262fa:	f887 3026 	strb.w	r3, [r7, #38]	@ 0x26
    do {
      rem = *ap % (u8_t)10;
 80262fe:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026300:	781a      	ldrb	r2, [r3, #0]
 8026302:	4b32      	ldr	r3, [pc, #200]	@ (80263cc <ip4addr_ntoa_r+0xfc>)
 8026304:	fba3 1302 	umull	r1, r3, r3, r2
 8026308:	08d9      	lsrs	r1, r3, #3
 802630a:	460b      	mov	r3, r1
 802630c:	009b      	lsls	r3, r3, #2
 802630e:	440b      	add	r3, r1
 8026310:	005b      	lsls	r3, r3, #1
 8026312:	1ad3      	subs	r3, r2, r3
 8026314:	77fb      	strb	r3, [r7, #31]
      *ap /= (u8_t)10;
 8026316:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026318:	781b      	ldrb	r3, [r3, #0]
 802631a:	4a2c      	ldr	r2, [pc, #176]	@ (80263cc <ip4addr_ntoa_r+0xfc>)
 802631c:	fba2 2303 	umull	r2, r3, r2, r3
 8026320:	08db      	lsrs	r3, r3, #3
 8026322:	b2da      	uxtb	r2, r3
 8026324:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026326:	701a      	strb	r2, [r3, #0]
      inv[i++] = (char)('0' + rem);
 8026328:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 802632c:	1c5a      	adds	r2, r3, #1
 802632e:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 8026332:	4619      	mov	r1, r3
 8026334:	7ffb      	ldrb	r3, [r7, #31]
 8026336:	3330      	adds	r3, #48	@ 0x30
 8026338:	b2da      	uxtb	r2, r3
 802633a:	f101 0330 	add.w	r3, r1, #48	@ 0x30
 802633e:	443b      	add	r3, r7
 8026340:	f803 2c1c 	strb.w	r2, [r3, #-28]
    } while (*ap);
 8026344:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026346:	781b      	ldrb	r3, [r3, #0]
 8026348:	2b00      	cmp	r3, #0
 802634a:	d1d8      	bne.n	80262fe <ip4addr_ntoa_r+0x2e>
    while (i--) {
 802634c:	e011      	b.n	8026372 <ip4addr_ntoa_r+0xa2>
      if (len++ >= buflen) {
 802634e:	6a3b      	ldr	r3, [r7, #32]
 8026350:	1c5a      	adds	r2, r3, #1
 8026352:	623a      	str	r2, [r7, #32]
 8026354:	687a      	ldr	r2, [r7, #4]
 8026356:	429a      	cmp	r2, r3
 8026358:	dc01      	bgt.n	802635e <ip4addr_ntoa_r+0x8e>
        return NULL;
 802635a:	2300      	movs	r3, #0
 802635c:	e030      	b.n	80263c0 <ip4addr_ntoa_r+0xf0>
      }
      *rp++ = inv[i];
 802635e:	f897 2026 	ldrb.w	r2, [r7, #38]	@ 0x26
 8026362:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026364:	1c59      	adds	r1, r3, #1
 8026366:	62f9      	str	r1, [r7, #44]	@ 0x2c
 8026368:	3230      	adds	r2, #48	@ 0x30
 802636a:	443a      	add	r2, r7
 802636c:	f812 2c1c 	ldrb.w	r2, [r2, #-28]
 8026370:	701a      	strb	r2, [r3, #0]
    while (i--) {
 8026372:	f897 3026 	ldrb.w	r3, [r7, #38]	@ 0x26
 8026376:	1e5a      	subs	r2, r3, #1
 8026378:	f887 2026 	strb.w	r2, [r7, #38]	@ 0x26
 802637c:	2b00      	cmp	r3, #0
 802637e:	d1e6      	bne.n	802634e <ip4addr_ntoa_r+0x7e>
    }
    if (len++ >= buflen) {
 8026380:	6a3b      	ldr	r3, [r7, #32]
 8026382:	1c5a      	adds	r2, r3, #1
 8026384:	623a      	str	r2, [r7, #32]
 8026386:	687a      	ldr	r2, [r7, #4]
 8026388:	429a      	cmp	r2, r3
 802638a:	dc01      	bgt.n	8026390 <ip4addr_ntoa_r+0xc0>
      return NULL;
 802638c:	2300      	movs	r3, #0
 802638e:	e017      	b.n	80263c0 <ip4addr_ntoa_r+0xf0>
    }
    *rp++ = '.';
 8026390:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026392:	1c5a      	adds	r2, r3, #1
 8026394:	62fa      	str	r2, [r7, #44]	@ 0x2c
 8026396:	222e      	movs	r2, #46	@ 0x2e
 8026398:	701a      	strb	r2, [r3, #0]
    ap++;
 802639a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802639c:	3301      	adds	r3, #1
 802639e:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (n = 0; n < 4; n++) {
 80263a0:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 80263a4:	3301      	adds	r3, #1
 80263a6:	f887 3027 	strb.w	r3, [r7, #39]	@ 0x27
 80263aa:	f897 3027 	ldrb.w	r3, [r7, #39]	@ 0x27
 80263ae:	2b03      	cmp	r3, #3
 80263b0:	d9a2      	bls.n	80262f8 <ip4addr_ntoa_r+0x28>
  }
  *--rp = 0;
 80263b2:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80263b4:	3b01      	subs	r3, #1
 80263b6:	62fb      	str	r3, [r7, #44]	@ 0x2c
 80263b8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80263ba:	2200      	movs	r2, #0
 80263bc:	701a      	strb	r2, [r3, #0]
  return buf;
 80263be:	68bb      	ldr	r3, [r7, #8]
}
 80263c0:	4618      	mov	r0, r3
 80263c2:	3734      	adds	r7, #52	@ 0x34
 80263c4:	46bd      	mov	sp, r7
 80263c6:	f85d 7b04 	ldr.w	r7, [sp], #4
 80263ca:	4770      	bx	lr
 80263cc:	cccccccd 	.word	0xcccccccd

080263d0 <ip_reass_tmr>:
 *
 * Should be called every 1000 msec (defined by IP_TMR_INTERVAL).
 */
void
ip_reass_tmr(void)
{
 80263d0:	b580      	push	{r7, lr}
 80263d2:	b084      	sub	sp, #16
 80263d4:	af00      	add	r7, sp, #0
  struct ip_reassdata *r, *prev = NULL;
 80263d6:	2300      	movs	r3, #0
 80263d8:	60bb      	str	r3, [r7, #8]

  r = reassdatagrams;
 80263da:	4b12      	ldr	r3, [pc, #72]	@ (8026424 <ip_reass_tmr+0x54>)
 80263dc:	681b      	ldr	r3, [r3, #0]
 80263de:	60fb      	str	r3, [r7, #12]
  while (r != NULL) {
 80263e0:	e018      	b.n	8026414 <ip_reass_tmr+0x44>
    /* Decrement the timer. Once it reaches 0,
     * clean up the incomplete fragment assembly */
    if (r->timer > 0) {
 80263e2:	68fb      	ldr	r3, [r7, #12]
 80263e4:	7fdb      	ldrb	r3, [r3, #31]
 80263e6:	2b00      	cmp	r3, #0
 80263e8:	d00b      	beq.n	8026402 <ip_reass_tmr+0x32>
      r->timer--;
 80263ea:	68fb      	ldr	r3, [r7, #12]
 80263ec:	7fdb      	ldrb	r3, [r3, #31]
 80263ee:	3b01      	subs	r3, #1
 80263f0:	b2da      	uxtb	r2, r3
 80263f2:	68fb      	ldr	r3, [r7, #12]
 80263f4:	77da      	strb	r2, [r3, #31]
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n", (u16_t)r->timer));
      prev = r;
 80263f6:	68fb      	ldr	r3, [r7, #12]
 80263f8:	60bb      	str	r3, [r7, #8]
      r = r->next;
 80263fa:	68fb      	ldr	r3, [r7, #12]
 80263fc:	681b      	ldr	r3, [r3, #0]
 80263fe:	60fb      	str	r3, [r7, #12]
 8026400:	e008      	b.n	8026414 <ip_reass_tmr+0x44>
    } else {
      /* reassembly timed out */
      struct ip_reassdata *tmp;
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n"));
      tmp = r;
 8026402:	68fb      	ldr	r3, [r7, #12]
 8026404:	607b      	str	r3, [r7, #4]
      /* get the next pointer before freeing */
      r = r->next;
 8026406:	68fb      	ldr	r3, [r7, #12]
 8026408:	681b      	ldr	r3, [r3, #0]
 802640a:	60fb      	str	r3, [r7, #12]
      /* free the helper struct and all enqueued pbufs */
      ip_reass_free_complete_datagram(tmp, prev);
 802640c:	68b9      	ldr	r1, [r7, #8]
 802640e:	6878      	ldr	r0, [r7, #4]
 8026410:	f000 f80a 	bl	8026428 <ip_reass_free_complete_datagram>
  while (r != NULL) {
 8026414:	68fb      	ldr	r3, [r7, #12]
 8026416:	2b00      	cmp	r3, #0
 8026418:	d1e3      	bne.n	80263e2 <ip_reass_tmr+0x12>
    }
  }
}
 802641a:	bf00      	nop
 802641c:	bf00      	nop
 802641e:	3710      	adds	r7, #16
 8026420:	46bd      	mov	sp, r7
 8026422:	bd80      	pop	{r7, pc}
 8026424:	2402b144 	.word	0x2402b144

08026428 <ip_reass_free_complete_datagram>:
 * @param prev the previous datagram in the linked list
 * @return the number of pbufs freed
 */
static int
ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 8026428:	b580      	push	{r7, lr}
 802642a:	b088      	sub	sp, #32
 802642c:	af00      	add	r7, sp, #0
 802642e:	6078      	str	r0, [r7, #4]
 8026430:	6039      	str	r1, [r7, #0]
  u16_t pbufs_freed = 0;
 8026432:	2300      	movs	r3, #0
 8026434:	83fb      	strh	r3, [r7, #30]
  u16_t clen;
  struct pbuf *p;
  struct ip_reass_helper *iprh;

  LWIP_ASSERT("prev != ipr", prev != ipr);
 8026436:	683a      	ldr	r2, [r7, #0]
 8026438:	687b      	ldr	r3, [r7, #4]
 802643a:	429a      	cmp	r2, r3
 802643c:	d105      	bne.n	802644a <ip_reass_free_complete_datagram+0x22>
 802643e:	4b45      	ldr	r3, [pc, #276]	@ (8026554 <ip_reass_free_complete_datagram+0x12c>)
 8026440:	22ab      	movs	r2, #171	@ 0xab
 8026442:	4945      	ldr	r1, [pc, #276]	@ (8026558 <ip_reass_free_complete_datagram+0x130>)
 8026444:	4845      	ldr	r0, [pc, #276]	@ (802655c <ip_reass_free_complete_datagram+0x134>)
 8026446:	f004 fb09 	bl	802aa5c <iprintf>
  if (prev != NULL) {
 802644a:	683b      	ldr	r3, [r7, #0]
 802644c:	2b00      	cmp	r3, #0
 802644e:	d00a      	beq.n	8026466 <ip_reass_free_complete_datagram+0x3e>
    LWIP_ASSERT("prev->next == ipr", prev->next == ipr);
 8026450:	683b      	ldr	r3, [r7, #0]
 8026452:	681b      	ldr	r3, [r3, #0]
 8026454:	687a      	ldr	r2, [r7, #4]
 8026456:	429a      	cmp	r2, r3
 8026458:	d005      	beq.n	8026466 <ip_reass_free_complete_datagram+0x3e>
 802645a:	4b3e      	ldr	r3, [pc, #248]	@ (8026554 <ip_reass_free_complete_datagram+0x12c>)
 802645c:	22ad      	movs	r2, #173	@ 0xad
 802645e:	4940      	ldr	r1, [pc, #256]	@ (8026560 <ip_reass_free_complete_datagram+0x138>)
 8026460:	483e      	ldr	r0, [pc, #248]	@ (802655c <ip_reass_free_complete_datagram+0x134>)
 8026462:	f004 fafb 	bl	802aa5c <iprintf>
  }

  MIB2_STATS_INC(mib2.ipreasmfails);
#if LWIP_ICMP
  iprh = (struct ip_reass_helper *)ipr->p->payload;
 8026466:	687b      	ldr	r3, [r7, #4]
 8026468:	685b      	ldr	r3, [r3, #4]
 802646a:	685b      	ldr	r3, [r3, #4]
 802646c:	617b      	str	r3, [r7, #20]
  if (iprh->start == 0) {
 802646e:	697b      	ldr	r3, [r7, #20]
 8026470:	889b      	ldrh	r3, [r3, #4]
 8026472:	b29b      	uxth	r3, r3
 8026474:	2b00      	cmp	r3, #0
 8026476:	d12a      	bne.n	80264ce <ip_reass_free_complete_datagram+0xa6>
    /* The first fragment was received, send ICMP time exceeded. */
    /* First, de-queue the first pbuf from r->p. */
    p = ipr->p;
 8026478:	687b      	ldr	r3, [r7, #4]
 802647a:	685b      	ldr	r3, [r3, #4]
 802647c:	61bb      	str	r3, [r7, #24]
    ipr->p = iprh->next_pbuf;
 802647e:	697b      	ldr	r3, [r7, #20]
 8026480:	681a      	ldr	r2, [r3, #0]
 8026482:	687b      	ldr	r3, [r7, #4]
 8026484:	605a      	str	r2, [r3, #4]
    /* Then, copy the original header into it. */
    SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN);
 8026486:	69bb      	ldr	r3, [r7, #24]
 8026488:	6858      	ldr	r0, [r3, #4]
 802648a:	687b      	ldr	r3, [r7, #4]
 802648c:	3308      	adds	r3, #8
 802648e:	2214      	movs	r2, #20
 8026490:	4619      	mov	r1, r3
 8026492:	f004 fd6c 	bl	802af6e <memcpy>
    icmp_time_exceeded(p, ICMP_TE_FRAG);
 8026496:	2101      	movs	r1, #1
 8026498:	69b8      	ldr	r0, [r7, #24]
 802649a:	f7ff fa4d 	bl	8025938 <icmp_time_exceeded>
    clen = pbuf_clen(p);
 802649e:	69b8      	ldr	r0, [r7, #24]
 80264a0:	f7f5 f8f2 	bl	801b688 <pbuf_clen>
 80264a4:	4603      	mov	r3, r0
 80264a6:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 80264a8:	8bfa      	ldrh	r2, [r7, #30]
 80264aa:	8a7b      	ldrh	r3, [r7, #18]
 80264ac:	4413      	add	r3, r2
 80264ae:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80264b2:	db05      	blt.n	80264c0 <ip_reass_free_complete_datagram+0x98>
 80264b4:	4b27      	ldr	r3, [pc, #156]	@ (8026554 <ip_reass_free_complete_datagram+0x12c>)
 80264b6:	22bc      	movs	r2, #188	@ 0xbc
 80264b8:	492a      	ldr	r1, [pc, #168]	@ (8026564 <ip_reass_free_complete_datagram+0x13c>)
 80264ba:	4828      	ldr	r0, [pc, #160]	@ (802655c <ip_reass_free_complete_datagram+0x134>)
 80264bc:	f004 face 	bl	802aa5c <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 80264c0:	8bfa      	ldrh	r2, [r7, #30]
 80264c2:	8a7b      	ldrh	r3, [r7, #18]
 80264c4:	4413      	add	r3, r2
 80264c6:	83fb      	strh	r3, [r7, #30]
    pbuf_free(p);
 80264c8:	69b8      	ldr	r0, [r7, #24]
 80264ca:	f7f5 f84f 	bl	801b56c <pbuf_free>
  }
#endif /* LWIP_ICMP */

  /* First, free all received pbufs.  The individual pbufs need to be released
     separately as they have not yet been chained */
  p = ipr->p;
 80264ce:	687b      	ldr	r3, [r7, #4]
 80264d0:	685b      	ldr	r3, [r3, #4]
 80264d2:	61bb      	str	r3, [r7, #24]
  while (p != NULL) {
 80264d4:	e01f      	b.n	8026516 <ip_reass_free_complete_datagram+0xee>
    struct pbuf *pcur;
    iprh = (struct ip_reass_helper *)p->payload;
 80264d6:	69bb      	ldr	r3, [r7, #24]
 80264d8:	685b      	ldr	r3, [r3, #4]
 80264da:	617b      	str	r3, [r7, #20]
    pcur = p;
 80264dc:	69bb      	ldr	r3, [r7, #24]
 80264de:	60fb      	str	r3, [r7, #12]
    /* get the next pointer before freeing */
    p = iprh->next_pbuf;
 80264e0:	697b      	ldr	r3, [r7, #20]
 80264e2:	681b      	ldr	r3, [r3, #0]
 80264e4:	61bb      	str	r3, [r7, #24]
    clen = pbuf_clen(pcur);
 80264e6:	68f8      	ldr	r0, [r7, #12]
 80264e8:	f7f5 f8ce 	bl	801b688 <pbuf_clen>
 80264ec:	4603      	mov	r3, r0
 80264ee:	827b      	strh	r3, [r7, #18]
    LWIP_ASSERT("pbufs_freed + clen <= 0xffff", pbufs_freed + clen <= 0xffff);
 80264f0:	8bfa      	ldrh	r2, [r7, #30]
 80264f2:	8a7b      	ldrh	r3, [r7, #18]
 80264f4:	4413      	add	r3, r2
 80264f6:	f5b3 3f80 	cmp.w	r3, #65536	@ 0x10000
 80264fa:	db05      	blt.n	8026508 <ip_reass_free_complete_datagram+0xe0>
 80264fc:	4b15      	ldr	r3, [pc, #84]	@ (8026554 <ip_reass_free_complete_datagram+0x12c>)
 80264fe:	22cc      	movs	r2, #204	@ 0xcc
 8026500:	4918      	ldr	r1, [pc, #96]	@ (8026564 <ip_reass_free_complete_datagram+0x13c>)
 8026502:	4816      	ldr	r0, [pc, #88]	@ (802655c <ip_reass_free_complete_datagram+0x134>)
 8026504:	f004 faaa 	bl	802aa5c <iprintf>
    pbufs_freed = (u16_t)(pbufs_freed + clen);
 8026508:	8bfa      	ldrh	r2, [r7, #30]
 802650a:	8a7b      	ldrh	r3, [r7, #18]
 802650c:	4413      	add	r3, r2
 802650e:	83fb      	strh	r3, [r7, #30]
    pbuf_free(pcur);
 8026510:	68f8      	ldr	r0, [r7, #12]
 8026512:	f7f5 f82b 	bl	801b56c <pbuf_free>
  while (p != NULL) {
 8026516:	69bb      	ldr	r3, [r7, #24]
 8026518:	2b00      	cmp	r3, #0
 802651a:	d1dc      	bne.n	80264d6 <ip_reass_free_complete_datagram+0xae>
  }
  /* Then, unchain the struct ip_reassdata from the list and free it. */
  ip_reass_dequeue_datagram(ipr, prev);
 802651c:	6839      	ldr	r1, [r7, #0]
 802651e:	6878      	ldr	r0, [r7, #4]
 8026520:	f000 f8c2 	bl	80266a8 <ip_reass_dequeue_datagram>
  LWIP_ASSERT("ip_reass_pbufcount >= pbufs_freed", ip_reass_pbufcount >= pbufs_freed);
 8026524:	4b10      	ldr	r3, [pc, #64]	@ (8026568 <ip_reass_free_complete_datagram+0x140>)
 8026526:	881b      	ldrh	r3, [r3, #0]
 8026528:	8bfa      	ldrh	r2, [r7, #30]
 802652a:	429a      	cmp	r2, r3
 802652c:	d905      	bls.n	802653a <ip_reass_free_complete_datagram+0x112>
 802652e:	4b09      	ldr	r3, [pc, #36]	@ (8026554 <ip_reass_free_complete_datagram+0x12c>)
 8026530:	22d2      	movs	r2, #210	@ 0xd2
 8026532:	490e      	ldr	r1, [pc, #56]	@ (802656c <ip_reass_free_complete_datagram+0x144>)
 8026534:	4809      	ldr	r0, [pc, #36]	@ (802655c <ip_reass_free_complete_datagram+0x134>)
 8026536:	f004 fa91 	bl	802aa5c <iprintf>
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - pbufs_freed);
 802653a:	4b0b      	ldr	r3, [pc, #44]	@ (8026568 <ip_reass_free_complete_datagram+0x140>)
 802653c:	881a      	ldrh	r2, [r3, #0]
 802653e:	8bfb      	ldrh	r3, [r7, #30]
 8026540:	1ad3      	subs	r3, r2, r3
 8026542:	b29a      	uxth	r2, r3
 8026544:	4b08      	ldr	r3, [pc, #32]	@ (8026568 <ip_reass_free_complete_datagram+0x140>)
 8026546:	801a      	strh	r2, [r3, #0]

  return pbufs_freed;
 8026548:	8bfb      	ldrh	r3, [r7, #30]
}
 802654a:	4618      	mov	r0, r3
 802654c:	3720      	adds	r7, #32
 802654e:	46bd      	mov	sp, r7
 8026550:	bd80      	pop	{r7, pc}
 8026552:	bf00      	nop
 8026554:	080318e4 	.word	0x080318e4
 8026558:	08031920 	.word	0x08031920
 802655c:	0803192c 	.word	0x0803192c
 8026560:	08031954 	.word	0x08031954
 8026564:	08031968 	.word	0x08031968
 8026568:	2402b148 	.word	0x2402b148
 802656c:	08031988 	.word	0x08031988

08026570 <ip_reass_remove_oldest_datagram>:
 *        (used for freeing other datagrams if not enough space)
 * @return the number of pbufs freed
 */
static int
ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed)
{
 8026570:	b580      	push	{r7, lr}
 8026572:	b08a      	sub	sp, #40	@ 0x28
 8026574:	af00      	add	r7, sp, #0
 8026576:	6078      	str	r0, [r7, #4]
 8026578:	6039      	str	r1, [r7, #0]
  /* @todo Can't we simply remove the last datagram in the
   *       linked list behind reassdatagrams?
   */
  struct ip_reassdata *r, *oldest, *prev, *oldest_prev;
  int pbufs_freed = 0, pbufs_freed_current;
 802657a:	2300      	movs	r3, #0
 802657c:	617b      	str	r3, [r7, #20]
  int other_datagrams;

  /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs,
   * but don't free the datagram that 'fraghdr' belongs to! */
  do {
    oldest = NULL;
 802657e:	2300      	movs	r3, #0
 8026580:	623b      	str	r3, [r7, #32]
    prev = NULL;
 8026582:	2300      	movs	r3, #0
 8026584:	61fb      	str	r3, [r7, #28]
    oldest_prev = NULL;
 8026586:	2300      	movs	r3, #0
 8026588:	61bb      	str	r3, [r7, #24]
    other_datagrams = 0;
 802658a:	2300      	movs	r3, #0
 802658c:	613b      	str	r3, [r7, #16]
    r = reassdatagrams;
 802658e:	4b28      	ldr	r3, [pc, #160]	@ (8026630 <ip_reass_remove_oldest_datagram+0xc0>)
 8026590:	681b      	ldr	r3, [r3, #0]
 8026592:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 8026594:	e030      	b.n	80265f8 <ip_reass_remove_oldest_datagram+0x88>
      if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) {
 8026596:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026598:	695a      	ldr	r2, [r3, #20]
 802659a:	687b      	ldr	r3, [r7, #4]
 802659c:	68db      	ldr	r3, [r3, #12]
 802659e:	429a      	cmp	r2, r3
 80265a0:	d10c      	bne.n	80265bc <ip_reass_remove_oldest_datagram+0x4c>
 80265a2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265a4:	699a      	ldr	r2, [r3, #24]
 80265a6:	687b      	ldr	r3, [r7, #4]
 80265a8:	691b      	ldr	r3, [r3, #16]
 80265aa:	429a      	cmp	r2, r3
 80265ac:	d106      	bne.n	80265bc <ip_reass_remove_oldest_datagram+0x4c>
 80265ae:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265b0:	899a      	ldrh	r2, [r3, #12]
 80265b2:	687b      	ldr	r3, [r7, #4]
 80265b4:	889b      	ldrh	r3, [r3, #4]
 80265b6:	b29b      	uxth	r3, r3
 80265b8:	429a      	cmp	r2, r3
 80265ba:	d014      	beq.n	80265e6 <ip_reass_remove_oldest_datagram+0x76>
        /* Not the same datagram as fraghdr */
        other_datagrams++;
 80265bc:	693b      	ldr	r3, [r7, #16]
 80265be:	3301      	adds	r3, #1
 80265c0:	613b      	str	r3, [r7, #16]
        if (oldest == NULL) {
 80265c2:	6a3b      	ldr	r3, [r7, #32]
 80265c4:	2b00      	cmp	r3, #0
 80265c6:	d104      	bne.n	80265d2 <ip_reass_remove_oldest_datagram+0x62>
          oldest = r;
 80265c8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265ca:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 80265cc:	69fb      	ldr	r3, [r7, #28]
 80265ce:	61bb      	str	r3, [r7, #24]
 80265d0:	e009      	b.n	80265e6 <ip_reass_remove_oldest_datagram+0x76>
        } else if (r->timer <= oldest->timer) {
 80265d2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265d4:	7fda      	ldrb	r2, [r3, #31]
 80265d6:	6a3b      	ldr	r3, [r7, #32]
 80265d8:	7fdb      	ldrb	r3, [r3, #31]
 80265da:	429a      	cmp	r2, r3
 80265dc:	d803      	bhi.n	80265e6 <ip_reass_remove_oldest_datagram+0x76>
          /* older than the previous oldest */
          oldest = r;
 80265de:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265e0:	623b      	str	r3, [r7, #32]
          oldest_prev = prev;
 80265e2:	69fb      	ldr	r3, [r7, #28]
 80265e4:	61bb      	str	r3, [r7, #24]
        }
      }
      if (r->next != NULL) {
 80265e6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265e8:	681b      	ldr	r3, [r3, #0]
 80265ea:	2b00      	cmp	r3, #0
 80265ec:	d001      	beq.n	80265f2 <ip_reass_remove_oldest_datagram+0x82>
        prev = r;
 80265ee:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265f0:	61fb      	str	r3, [r7, #28]
      }
      r = r->next;
 80265f2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265f4:	681b      	ldr	r3, [r3, #0]
 80265f6:	627b      	str	r3, [r7, #36]	@ 0x24
    while (r != NULL) {
 80265f8:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80265fa:	2b00      	cmp	r3, #0
 80265fc:	d1cb      	bne.n	8026596 <ip_reass_remove_oldest_datagram+0x26>
    }
    if (oldest != NULL) {
 80265fe:	6a3b      	ldr	r3, [r7, #32]
 8026600:	2b00      	cmp	r3, #0
 8026602:	d008      	beq.n	8026616 <ip_reass_remove_oldest_datagram+0xa6>
      pbufs_freed_current = ip_reass_free_complete_datagram(oldest, oldest_prev);
 8026604:	69b9      	ldr	r1, [r7, #24]
 8026606:	6a38      	ldr	r0, [r7, #32]
 8026608:	f7ff ff0e 	bl	8026428 <ip_reass_free_complete_datagram>
 802660c:	60f8      	str	r0, [r7, #12]
      pbufs_freed += pbufs_freed_current;
 802660e:	697a      	ldr	r2, [r7, #20]
 8026610:	68fb      	ldr	r3, [r7, #12]
 8026612:	4413      	add	r3, r2
 8026614:	617b      	str	r3, [r7, #20]
    }
  } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1));
 8026616:	697a      	ldr	r2, [r7, #20]
 8026618:	683b      	ldr	r3, [r7, #0]
 802661a:	429a      	cmp	r2, r3
 802661c:	da02      	bge.n	8026624 <ip_reass_remove_oldest_datagram+0xb4>
 802661e:	693b      	ldr	r3, [r7, #16]
 8026620:	2b01      	cmp	r3, #1
 8026622:	dcac      	bgt.n	802657e <ip_reass_remove_oldest_datagram+0xe>
  return pbufs_freed;
 8026624:	697b      	ldr	r3, [r7, #20]
}
 8026626:	4618      	mov	r0, r3
 8026628:	3728      	adds	r7, #40	@ 0x28
 802662a:	46bd      	mov	sp, r7
 802662c:	bd80      	pop	{r7, pc}
 802662e:	bf00      	nop
 8026630:	2402b144 	.word	0x2402b144

08026634 <ip_reass_enqueue_new_datagram>:
 * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space)
 * @return A pointer to the queue location into which the fragment was enqueued
 */
static struct ip_reassdata *
ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen)
{
 8026634:	b580      	push	{r7, lr}
 8026636:	b084      	sub	sp, #16
 8026638:	af00      	add	r7, sp, #0
 802663a:	6078      	str	r0, [r7, #4]
 802663c:	6039      	str	r1, [r7, #0]
#if ! IP_REASS_FREE_OLDEST
  LWIP_UNUSED_ARG(clen);
#endif

  /* No matching previous fragment found, allocate a new reassdata struct */
  ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 802663e:	2004      	movs	r0, #4
 8026640:	f7f4 f830 	bl	801a6a4 <memp_malloc>
 8026644:	60f8      	str	r0, [r7, #12]
  if (ipr == NULL) {
 8026646:	68fb      	ldr	r3, [r7, #12]
 8026648:	2b00      	cmp	r3, #0
 802664a:	d110      	bne.n	802666e <ip_reass_enqueue_new_datagram+0x3a>
#if IP_REASS_FREE_OLDEST
    if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) {
 802664c:	6839      	ldr	r1, [r7, #0]
 802664e:	6878      	ldr	r0, [r7, #4]
 8026650:	f7ff ff8e 	bl	8026570 <ip_reass_remove_oldest_datagram>
 8026654:	4602      	mov	r2, r0
 8026656:	683b      	ldr	r3, [r7, #0]
 8026658:	4293      	cmp	r3, r2
 802665a:	dc03      	bgt.n	8026664 <ip_reass_enqueue_new_datagram+0x30>
      ipr = (struct ip_reassdata *)memp_malloc(MEMP_REASSDATA);
 802665c:	2004      	movs	r0, #4
 802665e:	f7f4 f821 	bl	801a6a4 <memp_malloc>
 8026662:	60f8      	str	r0, [r7, #12]
    }
    if (ipr == NULL)
 8026664:	68fb      	ldr	r3, [r7, #12]
 8026666:	2b00      	cmp	r3, #0
 8026668:	d101      	bne.n	802666e <ip_reass_enqueue_new_datagram+0x3a>
#endif /* IP_REASS_FREE_OLDEST */
    {
      IPFRAG_STATS_INC(ip_frag.memerr);
      LWIP_DEBUGF(IP_REASS_DEBUG, ("Failed to alloc reassdata struct\n"));
      return NULL;
 802666a:	2300      	movs	r3, #0
 802666c:	e016      	b.n	802669c <ip_reass_enqueue_new_datagram+0x68>
    }
  }
  memset(ipr, 0, sizeof(struct ip_reassdata));
 802666e:	2220      	movs	r2, #32
 8026670:	2100      	movs	r1, #0
 8026672:	68f8      	ldr	r0, [r7, #12]
 8026674:	f004 fb84 	bl	802ad80 <memset>
  ipr->timer = IP_REASS_MAXAGE;
 8026678:	68fb      	ldr	r3, [r7, #12]
 802667a:	220f      	movs	r2, #15
 802667c:	77da      	strb	r2, [r3, #31]

  /* enqueue the new structure to the front of the list */
  ipr->next = reassdatagrams;
 802667e:	4b09      	ldr	r3, [pc, #36]	@ (80266a4 <ip_reass_enqueue_new_datagram+0x70>)
 8026680:	681a      	ldr	r2, [r3, #0]
 8026682:	68fb      	ldr	r3, [r7, #12]
 8026684:	601a      	str	r2, [r3, #0]
  reassdatagrams = ipr;
 8026686:	4a07      	ldr	r2, [pc, #28]	@ (80266a4 <ip_reass_enqueue_new_datagram+0x70>)
 8026688:	68fb      	ldr	r3, [r7, #12]
 802668a:	6013      	str	r3, [r2, #0]
  /* copy the ip header for later tests and input */
  /* @todo: no ip options supported? */
  SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN);
 802668c:	68fb      	ldr	r3, [r7, #12]
 802668e:	3308      	adds	r3, #8
 8026690:	2214      	movs	r2, #20
 8026692:	6879      	ldr	r1, [r7, #4]
 8026694:	4618      	mov	r0, r3
 8026696:	f004 fc6a 	bl	802af6e <memcpy>
  return ipr;
 802669a:	68fb      	ldr	r3, [r7, #12]
}
 802669c:	4618      	mov	r0, r3
 802669e:	3710      	adds	r7, #16
 80266a0:	46bd      	mov	sp, r7
 80266a2:	bd80      	pop	{r7, pc}
 80266a4:	2402b144 	.word	0x2402b144

080266a8 <ip_reass_dequeue_datagram>:
 * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs.
 * @param ipr points to the queue entry to dequeue
 */
static void
ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
 80266a8:	b580      	push	{r7, lr}
 80266aa:	b082      	sub	sp, #8
 80266ac:	af00      	add	r7, sp, #0
 80266ae:	6078      	str	r0, [r7, #4]
 80266b0:	6039      	str	r1, [r7, #0]
  /* dequeue the reass struct  */
  if (reassdatagrams == ipr) {
 80266b2:	4b10      	ldr	r3, [pc, #64]	@ (80266f4 <ip_reass_dequeue_datagram+0x4c>)
 80266b4:	681b      	ldr	r3, [r3, #0]
 80266b6:	687a      	ldr	r2, [r7, #4]
 80266b8:	429a      	cmp	r2, r3
 80266ba:	d104      	bne.n	80266c6 <ip_reass_dequeue_datagram+0x1e>
    /* it was the first in the list */
    reassdatagrams = ipr->next;
 80266bc:	687b      	ldr	r3, [r7, #4]
 80266be:	681b      	ldr	r3, [r3, #0]
 80266c0:	4a0c      	ldr	r2, [pc, #48]	@ (80266f4 <ip_reass_dequeue_datagram+0x4c>)
 80266c2:	6013      	str	r3, [r2, #0]
 80266c4:	e00d      	b.n	80266e2 <ip_reass_dequeue_datagram+0x3a>
  } else {
    /* it wasn't the first, so it must have a valid 'prev' */
    LWIP_ASSERT("sanity check linked list", prev != NULL);
 80266c6:	683b      	ldr	r3, [r7, #0]
 80266c8:	2b00      	cmp	r3, #0
 80266ca:	d106      	bne.n	80266da <ip_reass_dequeue_datagram+0x32>
 80266cc:	4b0a      	ldr	r3, [pc, #40]	@ (80266f8 <ip_reass_dequeue_datagram+0x50>)
 80266ce:	f240 1245 	movw	r2, #325	@ 0x145
 80266d2:	490a      	ldr	r1, [pc, #40]	@ (80266fc <ip_reass_dequeue_datagram+0x54>)
 80266d4:	480a      	ldr	r0, [pc, #40]	@ (8026700 <ip_reass_dequeue_datagram+0x58>)
 80266d6:	f004 f9c1 	bl	802aa5c <iprintf>
    prev->next = ipr->next;
 80266da:	687b      	ldr	r3, [r7, #4]
 80266dc:	681a      	ldr	r2, [r3, #0]
 80266de:	683b      	ldr	r3, [r7, #0]
 80266e0:	601a      	str	r2, [r3, #0]
  }

  /* now we can free the ip_reassdata struct */
  memp_free(MEMP_REASSDATA, ipr);
 80266e2:	6879      	ldr	r1, [r7, #4]
 80266e4:	2004      	movs	r0, #4
 80266e6:	f7f4 f853 	bl	801a790 <memp_free>
}
 80266ea:	bf00      	nop
 80266ec:	3708      	adds	r7, #8
 80266ee:	46bd      	mov	sp, r7
 80266f0:	bd80      	pop	{r7, pc}
 80266f2:	bf00      	nop
 80266f4:	2402b144 	.word	0x2402b144
 80266f8:	080318e4 	.word	0x080318e4
 80266fc:	080319ac 	.word	0x080319ac
 8026700:	0803192c 	.word	0x0803192c

08026704 <ip_reass_chain_frag_into_datagram_and_validate>:
 * @param is_last is 1 if this pbuf has MF==0 (ipr->flags not updated yet)
 * @return see IP_REASS_VALIDATE_* defines
 */
static int
ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p, int is_last)
{
 8026704:	b580      	push	{r7, lr}
 8026706:	b08c      	sub	sp, #48	@ 0x30
 8026708:	af00      	add	r7, sp, #0
 802670a:	60f8      	str	r0, [r7, #12]
 802670c:	60b9      	str	r1, [r7, #8]
 802670e:	607a      	str	r2, [r7, #4]
  struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev = NULL;
 8026710:	2300      	movs	r3, #0
 8026712:	62bb      	str	r3, [r7, #40]	@ 0x28
  struct pbuf *q;
  u16_t offset, len;
  u8_t hlen;
  struct ip_hdr *fraghdr;
  int valid = 1;
 8026714:	2301      	movs	r3, #1
 8026716:	623b      	str	r3, [r7, #32]

  /* Extract length and fragment offset from current fragment */
  fraghdr = (struct ip_hdr *)new_p->payload;
 8026718:	68bb      	ldr	r3, [r7, #8]
 802671a:	685b      	ldr	r3, [r3, #4]
 802671c:	61fb      	str	r3, [r7, #28]
  len = lwip_ntohs(IPH_LEN(fraghdr));
 802671e:	69fb      	ldr	r3, [r7, #28]
 8026720:	885b      	ldrh	r3, [r3, #2]
 8026722:	b29b      	uxth	r3, r3
 8026724:	4618      	mov	r0, r3
 8026726:	f7f3 fa3f 	bl	8019ba8 <lwip_htons>
 802672a:	4603      	mov	r3, r0
 802672c:	837b      	strh	r3, [r7, #26]
  hlen = IPH_HL_BYTES(fraghdr);
 802672e:	69fb      	ldr	r3, [r7, #28]
 8026730:	781b      	ldrb	r3, [r3, #0]
 8026732:	f003 030f 	and.w	r3, r3, #15
 8026736:	b2db      	uxtb	r3, r3
 8026738:	009b      	lsls	r3, r3, #2
 802673a:	767b      	strb	r3, [r7, #25]
  if (hlen > len) {
 802673c:	7e7b      	ldrb	r3, [r7, #25]
 802673e:	b29b      	uxth	r3, r3
 8026740:	8b7a      	ldrh	r2, [r7, #26]
 8026742:	429a      	cmp	r2, r3
 8026744:	d202      	bcs.n	802674c <ip_reass_chain_frag_into_datagram_and_validate+0x48>
    /* invalid datagram */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 8026746:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802674a:	e135      	b.n	80269b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  len = (u16_t)(len - hlen);
 802674c:	7e7b      	ldrb	r3, [r7, #25]
 802674e:	b29b      	uxth	r3, r3
 8026750:	8b7a      	ldrh	r2, [r7, #26]
 8026752:	1ad3      	subs	r3, r2, r3
 8026754:	837b      	strh	r3, [r7, #26]
  offset = IPH_OFFSET_BYTES(fraghdr);
 8026756:	69fb      	ldr	r3, [r7, #28]
 8026758:	88db      	ldrh	r3, [r3, #6]
 802675a:	b29b      	uxth	r3, r3
 802675c:	4618      	mov	r0, r3
 802675e:	f7f3 fa23 	bl	8019ba8 <lwip_htons>
 8026762:	4603      	mov	r3, r0
 8026764:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026768:	b29b      	uxth	r3, r3
 802676a:	00db      	lsls	r3, r3, #3
 802676c:	82fb      	strh	r3, [r7, #22]
  /* overwrite the fragment's ip header from the pbuf with our helper struct,
   * and setup the embedded helper structure. */
  /* make sure the struct ip_reass_helper fits into the IP header */
  LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN",
              sizeof(struct ip_reass_helper) <= IP_HLEN);
  iprh = (struct ip_reass_helper *)new_p->payload;
 802676e:	68bb      	ldr	r3, [r7, #8]
 8026770:	685b      	ldr	r3, [r3, #4]
 8026772:	62fb      	str	r3, [r7, #44]	@ 0x2c
  iprh->next_pbuf = NULL;
 8026774:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026776:	2200      	movs	r2, #0
 8026778:	701a      	strb	r2, [r3, #0]
 802677a:	2200      	movs	r2, #0
 802677c:	705a      	strb	r2, [r3, #1]
 802677e:	2200      	movs	r2, #0
 8026780:	709a      	strb	r2, [r3, #2]
 8026782:	2200      	movs	r2, #0
 8026784:	70da      	strb	r2, [r3, #3]
  iprh->start = offset;
 8026786:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026788:	8afa      	ldrh	r2, [r7, #22]
 802678a:	809a      	strh	r2, [r3, #4]
  iprh->end = (u16_t)(offset + len);
 802678c:	8afa      	ldrh	r2, [r7, #22]
 802678e:	8b7b      	ldrh	r3, [r7, #26]
 8026790:	4413      	add	r3, r2
 8026792:	b29a      	uxth	r2, r3
 8026794:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026796:	80da      	strh	r2, [r3, #6]
  if (iprh->end < offset) {
 8026798:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802679a:	88db      	ldrh	r3, [r3, #6]
 802679c:	b29b      	uxth	r3, r3
 802679e:	8afa      	ldrh	r2, [r7, #22]
 80267a0:	429a      	cmp	r2, r3
 80267a2:	d902      	bls.n	80267aa <ip_reass_chain_frag_into_datagram_and_validate+0xa6>
    /* u16_t overflow, cannot handle this */
    return IP_REASS_VALIDATE_PBUF_DROPPED;
 80267a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80267a8:	e106      	b.n	80269b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }

  /* Iterate through until we either get to the end of the list (append),
   * or we find one with a larger offset (insert). */
  for (q = ipr->p; q != NULL;) {
 80267aa:	68fb      	ldr	r3, [r7, #12]
 80267ac:	685b      	ldr	r3, [r3, #4]
 80267ae:	627b      	str	r3, [r7, #36]	@ 0x24
 80267b0:	e068      	b.n	8026884 <ip_reass_chain_frag_into_datagram_and_validate+0x180>
    iprh_tmp = (struct ip_reass_helper *)q->payload;
 80267b2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80267b4:	685b      	ldr	r3, [r3, #4]
 80267b6:	613b      	str	r3, [r7, #16]
    if (iprh->start < iprh_tmp->start) {
 80267b8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80267ba:	889b      	ldrh	r3, [r3, #4]
 80267bc:	b29a      	uxth	r2, r3
 80267be:	693b      	ldr	r3, [r7, #16]
 80267c0:	889b      	ldrh	r3, [r3, #4]
 80267c2:	b29b      	uxth	r3, r3
 80267c4:	429a      	cmp	r2, r3
 80267c6:	d235      	bcs.n	8026834 <ip_reass_chain_frag_into_datagram_and_validate+0x130>
      /* the new pbuf should be inserted before this */
      iprh->next_pbuf = q;
 80267c8:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80267ca:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 80267cc:	601a      	str	r2, [r3, #0]
      if (iprh_prev != NULL) {
 80267ce:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80267d0:	2b00      	cmp	r3, #0
 80267d2:	d020      	beq.n	8026816 <ip_reass_chain_frag_into_datagram_and_validate+0x112>
        /* not the fragment with the lowest offset */
#if IP_REASS_CHECK_OVERLAP
        if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) {
 80267d4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80267d6:	889b      	ldrh	r3, [r3, #4]
 80267d8:	b29a      	uxth	r2, r3
 80267da:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80267dc:	88db      	ldrh	r3, [r3, #6]
 80267de:	b29b      	uxth	r3, r3
 80267e0:	429a      	cmp	r2, r3
 80267e2:	d307      	bcc.n	80267f4 <ip_reass_chain_frag_into_datagram_and_validate+0xf0>
 80267e4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80267e6:	88db      	ldrh	r3, [r3, #6]
 80267e8:	b29a      	uxth	r2, r3
 80267ea:	693b      	ldr	r3, [r7, #16]
 80267ec:	889b      	ldrh	r3, [r3, #4]
 80267ee:	b29b      	uxth	r3, r3
 80267f0:	429a      	cmp	r2, r3
 80267f2:	d902      	bls.n	80267fa <ip_reass_chain_frag_into_datagram_and_validate+0xf6>
          /* fragment overlaps with previous or following, throw away */
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 80267f4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80267f8:	e0de      	b.n	80269b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        iprh_prev->next_pbuf = new_p;
 80267fa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80267fc:	68ba      	ldr	r2, [r7, #8]
 80267fe:	601a      	str	r2, [r3, #0]
        if (iprh_prev->end != iprh->start) {
 8026800:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026802:	88db      	ldrh	r3, [r3, #6]
 8026804:	b29a      	uxth	r2, r3
 8026806:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026808:	889b      	ldrh	r3, [r3, #4]
 802680a:	b29b      	uxth	r3, r3
 802680c:	429a      	cmp	r2, r3
 802680e:	d03d      	beq.n	802688c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 8026810:	2300      	movs	r3, #0
 8026812:	623b      	str	r3, [r7, #32]
        }
#endif /* IP_REASS_CHECK_OVERLAP */
        /* fragment with the lowest offset */
        ipr->p = new_p;
      }
      break;
 8026814:	e03a      	b.n	802688c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
        if (iprh->end > iprh_tmp->start) {
 8026816:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026818:	88db      	ldrh	r3, [r3, #6]
 802681a:	b29a      	uxth	r2, r3
 802681c:	693b      	ldr	r3, [r7, #16]
 802681e:	889b      	ldrh	r3, [r3, #4]
 8026820:	b29b      	uxth	r3, r3
 8026822:	429a      	cmp	r2, r3
 8026824:	d902      	bls.n	802682c <ip_reass_chain_frag_into_datagram_and_validate+0x128>
          return IP_REASS_VALIDATE_PBUF_DROPPED;
 8026826:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802682a:	e0c5      	b.n	80269b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
        ipr->p = new_p;
 802682c:	68fb      	ldr	r3, [r7, #12]
 802682e:	68ba      	ldr	r2, [r7, #8]
 8026830:	605a      	str	r2, [r3, #4]
      break;
 8026832:	e02b      	b.n	802688c <ip_reass_chain_frag_into_datagram_and_validate+0x188>
    } else if (iprh->start == iprh_tmp->start) {
 8026834:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026836:	889b      	ldrh	r3, [r3, #4]
 8026838:	b29a      	uxth	r2, r3
 802683a:	693b      	ldr	r3, [r7, #16]
 802683c:	889b      	ldrh	r3, [r3, #4]
 802683e:	b29b      	uxth	r3, r3
 8026840:	429a      	cmp	r2, r3
 8026842:	d102      	bne.n	802684a <ip_reass_chain_frag_into_datagram_and_validate+0x146>
      /* received the same datagram twice: no need to keep the datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 8026844:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8026848:	e0b6      	b.n	80269b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#if IP_REASS_CHECK_OVERLAP
    } else if (iprh->start < iprh_tmp->end) {
 802684a:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802684c:	889b      	ldrh	r3, [r3, #4]
 802684e:	b29a      	uxth	r2, r3
 8026850:	693b      	ldr	r3, [r7, #16]
 8026852:	88db      	ldrh	r3, [r3, #6]
 8026854:	b29b      	uxth	r3, r3
 8026856:	429a      	cmp	r2, r3
 8026858:	d202      	bcs.n	8026860 <ip_reass_chain_frag_into_datagram_and_validate+0x15c>
      /* overlap: no need to keep the new datagram */
      return IP_REASS_VALIDATE_PBUF_DROPPED;
 802685a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802685e:	e0ab      	b.n	80269b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
#endif /* IP_REASS_CHECK_OVERLAP */
    } else {
      /* Check if the fragments received so far have no holes. */
      if (iprh_prev != NULL) {
 8026860:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026862:	2b00      	cmp	r3, #0
 8026864:	d009      	beq.n	802687a <ip_reass_chain_frag_into_datagram_and_validate+0x176>
        if (iprh_prev->end != iprh_tmp->start) {
 8026866:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026868:	88db      	ldrh	r3, [r3, #6]
 802686a:	b29a      	uxth	r2, r3
 802686c:	693b      	ldr	r3, [r7, #16]
 802686e:	889b      	ldrh	r3, [r3, #4]
 8026870:	b29b      	uxth	r3, r3
 8026872:	429a      	cmp	r2, r3
 8026874:	d001      	beq.n	802687a <ip_reass_chain_frag_into_datagram_and_validate+0x176>
          /* There is a fragment missing between the current
           * and the previous fragment */
          valid = 0;
 8026876:	2300      	movs	r3, #0
 8026878:	623b      	str	r3, [r7, #32]
        }
      }
    }
    q = iprh_tmp->next_pbuf;
 802687a:	693b      	ldr	r3, [r7, #16]
 802687c:	681b      	ldr	r3, [r3, #0]
 802687e:	627b      	str	r3, [r7, #36]	@ 0x24
    iprh_prev = iprh_tmp;
 8026880:	693b      	ldr	r3, [r7, #16]
 8026882:	62bb      	str	r3, [r7, #40]	@ 0x28
  for (q = ipr->p; q != NULL;) {
 8026884:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026886:	2b00      	cmp	r3, #0
 8026888:	d193      	bne.n	80267b2 <ip_reass_chain_frag_into_datagram_and_validate+0xae>
 802688a:	e000      	b.n	802688e <ip_reass_chain_frag_into_datagram_and_validate+0x18a>
      break;
 802688c:	bf00      	nop
  }

  /* If q is NULL, then we made it to the end of the list. Determine what to do now */
  if (q == NULL) {
 802688e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026890:	2b00      	cmp	r3, #0
 8026892:	d12d      	bne.n	80268f0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
    if (iprh_prev != NULL) {
 8026894:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026896:	2b00      	cmp	r3, #0
 8026898:	d01c      	beq.n	80268d4 <ip_reass_chain_frag_into_datagram_and_validate+0x1d0>
      /* this is (for now), the fragment with the highest offset:
       * chain it to the last fragment */
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start);
 802689a:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 802689c:	88db      	ldrh	r3, [r3, #6]
 802689e:	b29a      	uxth	r2, r3
 80268a0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80268a2:	889b      	ldrh	r3, [r3, #4]
 80268a4:	b29b      	uxth	r3, r3
 80268a6:	429a      	cmp	r2, r3
 80268a8:	d906      	bls.n	80268b8 <ip_reass_chain_frag_into_datagram_and_validate+0x1b4>
 80268aa:	4b45      	ldr	r3, [pc, #276]	@ (80269c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 80268ac:	f44f 72db 	mov.w	r2, #438	@ 0x1b6
 80268b0:	4944      	ldr	r1, [pc, #272]	@ (80269c4 <ip_reass_chain_frag_into_datagram_and_validate+0x2c0>)
 80268b2:	4845      	ldr	r0, [pc, #276]	@ (80269c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 80268b4:	f004 f8d2 	bl	802aa5c <iprintf>
#endif /* IP_REASS_CHECK_OVERLAP */
      iprh_prev->next_pbuf = new_p;
 80268b8:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80268ba:	68ba      	ldr	r2, [r7, #8]
 80268bc:	601a      	str	r2, [r3, #0]
      if (iprh_prev->end != iprh->start) {
 80268be:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80268c0:	88db      	ldrh	r3, [r3, #6]
 80268c2:	b29a      	uxth	r2, r3
 80268c4:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 80268c6:	889b      	ldrh	r3, [r3, #4]
 80268c8:	b29b      	uxth	r3, r3
 80268ca:	429a      	cmp	r2, r3
 80268cc:	d010      	beq.n	80268f0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
        valid = 0;
 80268ce:	2300      	movs	r3, #0
 80268d0:	623b      	str	r3, [r7, #32]
 80268d2:	e00d      	b.n	80268f0 <ip_reass_chain_frag_into_datagram_and_validate+0x1ec>
      }
    } else {
#if IP_REASS_CHECK_OVERLAP
      LWIP_ASSERT("no previous fragment, this must be the first fragment!",
 80268d4:	68fb      	ldr	r3, [r7, #12]
 80268d6:	685b      	ldr	r3, [r3, #4]
 80268d8:	2b00      	cmp	r3, #0
 80268da:	d006      	beq.n	80268ea <ip_reass_chain_frag_into_datagram_and_validate+0x1e6>
 80268dc:	4b38      	ldr	r3, [pc, #224]	@ (80269c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 80268de:	f44f 72df 	mov.w	r2, #446	@ 0x1be
 80268e2:	493a      	ldr	r1, [pc, #232]	@ (80269cc <ip_reass_chain_frag_into_datagram_and_validate+0x2c8>)
 80268e4:	4838      	ldr	r0, [pc, #224]	@ (80269c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 80268e6:	f004 f8b9 	bl	802aa5c <iprintf>
                  ipr->p == NULL);
#endif /* IP_REASS_CHECK_OVERLAP */
      /* this is the first fragment we ever received for this ip datagram */
      ipr->p = new_p;
 80268ea:	68fb      	ldr	r3, [r7, #12]
 80268ec:	68ba      	ldr	r2, [r7, #8]
 80268ee:	605a      	str	r2, [r3, #4]
    }
  }

  /* At this point, the validation part begins: */
  /* If we already received the last fragment */
  if (is_last || ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0)) {
 80268f0:	687b      	ldr	r3, [r7, #4]
 80268f2:	2b00      	cmp	r3, #0
 80268f4:	d105      	bne.n	8026902 <ip_reass_chain_frag_into_datagram_and_validate+0x1fe>
 80268f6:	68fb      	ldr	r3, [r7, #12]
 80268f8:	7f9b      	ldrb	r3, [r3, #30]
 80268fa:	f003 0301 	and.w	r3, r3, #1
 80268fe:	2b00      	cmp	r3, #0
 8026900:	d059      	beq.n	80269b6 <ip_reass_chain_frag_into_datagram_and_validate+0x2b2>
    /* and had no holes so far */
    if (valid) {
 8026902:	6a3b      	ldr	r3, [r7, #32]
 8026904:	2b00      	cmp	r3, #0
 8026906:	d04f      	beq.n	80269a8 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      /* then check if the rest of the fragments is here */
      /* Check if the queue starts with the first datagram */
      if ((ipr->p == NULL) || (((struct ip_reass_helper *)ipr->p->payload)->start != 0)) {
 8026908:	68fb      	ldr	r3, [r7, #12]
 802690a:	685b      	ldr	r3, [r3, #4]
 802690c:	2b00      	cmp	r3, #0
 802690e:	d006      	beq.n	802691e <ip_reass_chain_frag_into_datagram_and_validate+0x21a>
 8026910:	68fb      	ldr	r3, [r7, #12]
 8026912:	685b      	ldr	r3, [r3, #4]
 8026914:	685b      	ldr	r3, [r3, #4]
 8026916:	889b      	ldrh	r3, [r3, #4]
 8026918:	b29b      	uxth	r3, r3
 802691a:	2b00      	cmp	r3, #0
 802691c:	d002      	beq.n	8026924 <ip_reass_chain_frag_into_datagram_and_validate+0x220>
        valid = 0;
 802691e:	2300      	movs	r3, #0
 8026920:	623b      	str	r3, [r7, #32]
 8026922:	e041      	b.n	80269a8 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
      } else {
        /* and check that there are no holes after this datagram */
        iprh_prev = iprh;
 8026924:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026926:	62bb      	str	r3, [r7, #40]	@ 0x28
        q = iprh->next_pbuf;
 8026928:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802692a:	681b      	ldr	r3, [r3, #0]
 802692c:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 802692e:	e012      	b.n	8026956 <ip_reass_chain_frag_into_datagram_and_validate+0x252>
          iprh = (struct ip_reass_helper *)q->payload;
 8026930:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026932:	685b      	ldr	r3, [r3, #4]
 8026934:	62fb      	str	r3, [r7, #44]	@ 0x2c
          if (iprh_prev->end != iprh->start) {
 8026936:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026938:	88db      	ldrh	r3, [r3, #6]
 802693a:	b29a      	uxth	r2, r3
 802693c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802693e:	889b      	ldrh	r3, [r3, #4]
 8026940:	b29b      	uxth	r3, r3
 8026942:	429a      	cmp	r2, r3
 8026944:	d002      	beq.n	802694c <ip_reass_chain_frag_into_datagram_and_validate+0x248>
            valid = 0;
 8026946:	2300      	movs	r3, #0
 8026948:	623b      	str	r3, [r7, #32]
            break;
 802694a:	e007      	b.n	802695c <ip_reass_chain_frag_into_datagram_and_validate+0x258>
          }
          iprh_prev = iprh;
 802694c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 802694e:	62bb      	str	r3, [r7, #40]	@ 0x28
          q = iprh->next_pbuf;
 8026950:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026952:	681b      	ldr	r3, [r3, #0]
 8026954:	627b      	str	r3, [r7, #36]	@ 0x24
        while (q != NULL) {
 8026956:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026958:	2b00      	cmp	r3, #0
 802695a:	d1e9      	bne.n	8026930 <ip_reass_chain_frag_into_datagram_and_validate+0x22c>
        }
        /* if still valid, all fragments are received
         * (because to the MF==0 already arrived */
        if (valid) {
 802695c:	6a3b      	ldr	r3, [r7, #32]
 802695e:	2b00      	cmp	r3, #0
 8026960:	d022      	beq.n	80269a8 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
          LWIP_ASSERT("sanity check", ipr->p != NULL);
 8026962:	68fb      	ldr	r3, [r7, #12]
 8026964:	685b      	ldr	r3, [r3, #4]
 8026966:	2b00      	cmp	r3, #0
 8026968:	d106      	bne.n	8026978 <ip_reass_chain_frag_into_datagram_and_validate+0x274>
 802696a:	4b15      	ldr	r3, [pc, #84]	@ (80269c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802696c:	f240 12df 	movw	r2, #479	@ 0x1df
 8026970:	4917      	ldr	r1, [pc, #92]	@ (80269d0 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 8026972:	4815      	ldr	r0, [pc, #84]	@ (80269c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 8026974:	f004 f872 	bl	802aa5c <iprintf>
          LWIP_ASSERT("sanity check",
 8026978:	68fb      	ldr	r3, [r7, #12]
 802697a:	685b      	ldr	r3, [r3, #4]
 802697c:	685b      	ldr	r3, [r3, #4]
 802697e:	6afa      	ldr	r2, [r7, #44]	@ 0x2c
 8026980:	429a      	cmp	r2, r3
 8026982:	d106      	bne.n	8026992 <ip_reass_chain_frag_into_datagram_and_validate+0x28e>
 8026984:	4b0e      	ldr	r3, [pc, #56]	@ (80269c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 8026986:	f44f 72f0 	mov.w	r2, #480	@ 0x1e0
 802698a:	4911      	ldr	r1, [pc, #68]	@ (80269d0 <ip_reass_chain_frag_into_datagram_and_validate+0x2cc>)
 802698c:	480e      	ldr	r0, [pc, #56]	@ (80269c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 802698e:	f004 f865 	bl	802aa5c <iprintf>
                      ((struct ip_reass_helper *)ipr->p->payload) != iprh);
          LWIP_ASSERT("validate_datagram:next_pbuf!=NULL",
 8026992:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026994:	681b      	ldr	r3, [r3, #0]
 8026996:	2b00      	cmp	r3, #0
 8026998:	d006      	beq.n	80269a8 <ip_reass_chain_frag_into_datagram_and_validate+0x2a4>
 802699a:	4b09      	ldr	r3, [pc, #36]	@ (80269c0 <ip_reass_chain_frag_into_datagram_and_validate+0x2bc>)
 802699c:	f44f 72f1 	mov.w	r2, #482	@ 0x1e2
 80269a0:	490c      	ldr	r1, [pc, #48]	@ (80269d4 <ip_reass_chain_frag_into_datagram_and_validate+0x2d0>)
 80269a2:	4809      	ldr	r0, [pc, #36]	@ (80269c8 <ip_reass_chain_frag_into_datagram_and_validate+0x2c4>)
 80269a4:	f004 f85a 	bl	802aa5c <iprintf>
      }
    }
    /* If valid is 0 here, there are some fragments missing in the middle
     * (since MF == 0 has already arrived). Such datagrams simply time out if
     * no more fragments are received... */
    return valid ? IP_REASS_VALIDATE_TELEGRAM_FINISHED : IP_REASS_VALIDATE_PBUF_QUEUED;
 80269a8:	6a3b      	ldr	r3, [r7, #32]
 80269aa:	2b00      	cmp	r3, #0
 80269ac:	bf14      	ite	ne
 80269ae:	2301      	movne	r3, #1
 80269b0:	2300      	moveq	r3, #0
 80269b2:	b2db      	uxtb	r3, r3
 80269b4:	e000      	b.n	80269b8 <ip_reass_chain_frag_into_datagram_and_validate+0x2b4>
  }
  /* If we come here, not all fragments were received, yet! */
  return IP_REASS_VALIDATE_PBUF_QUEUED; /* not yet valid! */
 80269b6:	2300      	movs	r3, #0
}
 80269b8:	4618      	mov	r0, r3
 80269ba:	3730      	adds	r7, #48	@ 0x30
 80269bc:	46bd      	mov	sp, r7
 80269be:	bd80      	pop	{r7, pc}
 80269c0:	080318e4 	.word	0x080318e4
 80269c4:	080319c8 	.word	0x080319c8
 80269c8:	0803192c 	.word	0x0803192c
 80269cc:	080319e8 	.word	0x080319e8
 80269d0:	08031a20 	.word	0x08031a20
 80269d4:	08031a30 	.word	0x08031a30

080269d8 <ip4_reass>:
 * @param p points to a pbuf chain of the fragment
 * @return NULL if reassembly is incomplete, ? otherwise
 */
struct pbuf *
ip4_reass(struct pbuf *p)
{
 80269d8:	b580      	push	{r7, lr}
 80269da:	b08e      	sub	sp, #56	@ 0x38
 80269dc:	af00      	add	r7, sp, #0
 80269de:	6078      	str	r0, [r7, #4]
  int is_last;

  IPFRAG_STATS_INC(ip_frag.recv);
  MIB2_STATS_INC(mib2.ipreasmreqds);

  fraghdr = (struct ip_hdr *)p->payload;
 80269e0:	687b      	ldr	r3, [r7, #4]
 80269e2:	685b      	ldr	r3, [r3, #4]
 80269e4:	62bb      	str	r3, [r7, #40]	@ 0x28

  if (IPH_HL_BYTES(fraghdr) != IP_HLEN) {
 80269e6:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80269e8:	781b      	ldrb	r3, [r3, #0]
 80269ea:	f003 030f 	and.w	r3, r3, #15
 80269ee:	b2db      	uxtb	r3, r3
 80269f0:	009b      	lsls	r3, r3, #2
 80269f2:	b2db      	uxtb	r3, r3
 80269f4:	2b14      	cmp	r3, #20
 80269f6:	f040 8171 	bne.w	8026cdc <ip4_reass+0x304>
    LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: IP options currently not supported!\n"));
    IPFRAG_STATS_INC(ip_frag.err);
    goto nullreturn;
  }

  offset = IPH_OFFSET_BYTES(fraghdr);
 80269fa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 80269fc:	88db      	ldrh	r3, [r3, #6]
 80269fe:	b29b      	uxth	r3, r3
 8026a00:	4618      	mov	r0, r3
 8026a02:	f7f3 f8d1 	bl	8019ba8 <lwip_htons>
 8026a06:	4603      	mov	r3, r0
 8026a08:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026a0c:	b29b      	uxth	r3, r3
 8026a0e:	00db      	lsls	r3, r3, #3
 8026a10:	84fb      	strh	r3, [r7, #38]	@ 0x26
  len = lwip_ntohs(IPH_LEN(fraghdr));
 8026a12:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026a14:	885b      	ldrh	r3, [r3, #2]
 8026a16:	b29b      	uxth	r3, r3
 8026a18:	4618      	mov	r0, r3
 8026a1a:	f7f3 f8c5 	bl	8019ba8 <lwip_htons>
 8026a1e:	4603      	mov	r3, r0
 8026a20:	84bb      	strh	r3, [r7, #36]	@ 0x24
  hlen = IPH_HL_BYTES(fraghdr);
 8026a22:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026a24:	781b      	ldrb	r3, [r3, #0]
 8026a26:	f003 030f 	and.w	r3, r3, #15
 8026a2a:	b2db      	uxtb	r3, r3
 8026a2c:	009b      	lsls	r3, r3, #2
 8026a2e:	f887 3023 	strb.w	r3, [r7, #35]	@ 0x23
  if (hlen > len) {
 8026a32:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8026a36:	b29b      	uxth	r3, r3
 8026a38:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 8026a3a:	429a      	cmp	r2, r3
 8026a3c:	f0c0 8150 	bcc.w	8026ce0 <ip4_reass+0x308>
    /* invalid datagram */
    goto nullreturn;
  }
  len = (u16_t)(len - hlen);
 8026a40:	f897 3023 	ldrb.w	r3, [r7, #35]	@ 0x23
 8026a44:	b29b      	uxth	r3, r3
 8026a46:	8cba      	ldrh	r2, [r7, #36]	@ 0x24
 8026a48:	1ad3      	subs	r3, r2, r3
 8026a4a:	84bb      	strh	r3, [r7, #36]	@ 0x24

  /* Check if we are allowed to enqueue more datagrams. */
  clen = pbuf_clen(p);
 8026a4c:	6878      	ldr	r0, [r7, #4]
 8026a4e:	f7f4 fe1b 	bl	801b688 <pbuf_clen>
 8026a52:	4603      	mov	r3, r0
 8026a54:	843b      	strh	r3, [r7, #32]
  if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) {
 8026a56:	4b8c      	ldr	r3, [pc, #560]	@ (8026c88 <ip4_reass+0x2b0>)
 8026a58:	881b      	ldrh	r3, [r3, #0]
 8026a5a:	461a      	mov	r2, r3
 8026a5c:	8c3b      	ldrh	r3, [r7, #32]
 8026a5e:	4413      	add	r3, r2
 8026a60:	2b0a      	cmp	r3, #10
 8026a62:	dd10      	ble.n	8026a86 <ip4_reass+0xae>
#if IP_REASS_FREE_OLDEST
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 8026a64:	8c3b      	ldrh	r3, [r7, #32]
 8026a66:	4619      	mov	r1, r3
 8026a68:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8026a6a:	f7ff fd81 	bl	8026570 <ip_reass_remove_oldest_datagram>
 8026a6e:	4603      	mov	r3, r0
 8026a70:	2b00      	cmp	r3, #0
 8026a72:	f000 8137 	beq.w	8026ce4 <ip4_reass+0x30c>
        ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS))
 8026a76:	4b84      	ldr	r3, [pc, #528]	@ (8026c88 <ip4_reass+0x2b0>)
 8026a78:	881b      	ldrh	r3, [r3, #0]
 8026a7a:	461a      	mov	r2, r3
 8026a7c:	8c3b      	ldrh	r3, [r7, #32]
 8026a7e:	4413      	add	r3, r2
    if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
 8026a80:	2b0a      	cmp	r3, #10
 8026a82:	f300 812f 	bgt.w	8026ce4 <ip4_reass+0x30c>
    }
  }

  /* Look for the datagram the fragment belongs to in the current datagram queue,
   * remembering the previous in the queue for later dequeueing. */
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 8026a86:	4b81      	ldr	r3, [pc, #516]	@ (8026c8c <ip4_reass+0x2b4>)
 8026a88:	681b      	ldr	r3, [r3, #0]
 8026a8a:	633b      	str	r3, [r7, #48]	@ 0x30
 8026a8c:	e015      	b.n	8026aba <ip4_reass+0xe2>
    /* Check if the incoming fragment matches the one currently present
       in the reassembly buffer. If so, we proceed with copying the
       fragment into the buffer. */
    if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) {
 8026a8e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026a90:	695a      	ldr	r2, [r3, #20]
 8026a92:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026a94:	68db      	ldr	r3, [r3, #12]
 8026a96:	429a      	cmp	r2, r3
 8026a98:	d10c      	bne.n	8026ab4 <ip4_reass+0xdc>
 8026a9a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026a9c:	699a      	ldr	r2, [r3, #24]
 8026a9e:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026aa0:	691b      	ldr	r3, [r3, #16]
 8026aa2:	429a      	cmp	r2, r3
 8026aa4:	d106      	bne.n	8026ab4 <ip4_reass+0xdc>
 8026aa6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026aa8:	899a      	ldrh	r2, [r3, #12]
 8026aaa:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026aac:	889b      	ldrh	r3, [r3, #4]
 8026aae:	b29b      	uxth	r3, r3
 8026ab0:	429a      	cmp	r2, r3
 8026ab2:	d006      	beq.n	8026ac2 <ip4_reass+0xea>
  for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
 8026ab4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026ab6:	681b      	ldr	r3, [r3, #0]
 8026ab8:	633b      	str	r3, [r7, #48]	@ 0x30
 8026aba:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026abc:	2b00      	cmp	r3, #0
 8026abe:	d1e6      	bne.n	8026a8e <ip4_reass+0xb6>
 8026ac0:	e000      	b.n	8026ac4 <ip4_reass+0xec>
      LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: matching previous fragment ID=%"X16_F"\n",
                                   lwip_ntohs(IPH_ID(fraghdr))));
      IPFRAG_STATS_INC(ip_frag.cachehit);
      break;
 8026ac2:	bf00      	nop
    }
  }

  if (ipr == NULL) {
 8026ac4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026ac6:	2b00      	cmp	r3, #0
 8026ac8:	d109      	bne.n	8026ade <ip4_reass+0x106>
    /* Enqueue a new datagram into the datagram queue */
    ipr = ip_reass_enqueue_new_datagram(fraghdr, clen);
 8026aca:	8c3b      	ldrh	r3, [r7, #32]
 8026acc:	4619      	mov	r1, r3
 8026ace:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8026ad0:	f7ff fdb0 	bl	8026634 <ip_reass_enqueue_new_datagram>
 8026ad4:	6338      	str	r0, [r7, #48]	@ 0x30
    /* Bail if unable to enqueue */
    if (ipr == NULL) {
 8026ad6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026ad8:	2b00      	cmp	r3, #0
 8026ada:	d11c      	bne.n	8026b16 <ip4_reass+0x13e>
      goto nullreturn;
 8026adc:	e105      	b.n	8026cea <ip4_reass+0x312>
    }
  } else {
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 8026ade:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026ae0:	88db      	ldrh	r3, [r3, #6]
 8026ae2:	b29b      	uxth	r3, r3
 8026ae4:	4618      	mov	r0, r3
 8026ae6:	f7f3 f85f 	bl	8019ba8 <lwip_htons>
 8026aea:	4603      	mov	r3, r0
 8026aec:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026af0:	2b00      	cmp	r3, #0
 8026af2:	d110      	bne.n	8026b16 <ip4_reass+0x13e>
        ((lwip_ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) {
 8026af4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026af6:	89db      	ldrh	r3, [r3, #14]
 8026af8:	4618      	mov	r0, r3
 8026afa:	f7f3 f855 	bl	8019ba8 <lwip_htons>
 8026afe:	4603      	mov	r3, r0
 8026b00:	f3c3 030c 	ubfx	r3, r3, #0, #13
    if (((lwip_ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
 8026b04:	2b00      	cmp	r3, #0
 8026b06:	d006      	beq.n	8026b16 <ip4_reass+0x13e>
      /* ipr->iphdr is not the header from the first fragment, but fraghdr is
       * -> copy fraghdr into ipr->iphdr since we want to have the header
       * of the first fragment (for ICMP time exceeded and later, for copying
       * all options, if supported)*/
      SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN);
 8026b08:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026b0a:	3308      	adds	r3, #8
 8026b0c:	2214      	movs	r2, #20
 8026b0e:	6ab9      	ldr	r1, [r7, #40]	@ 0x28
 8026b10:	4618      	mov	r0, r3
 8026b12:	f004 fa2c 	bl	802af6e <memcpy>

  /* At this point, we have either created a new entry or pointing
   * to an existing one */

  /* check for 'no more fragments', and update queue entry*/
  is_last = (IPH_OFFSET(fraghdr) & PP_NTOHS(IP_MF)) == 0;
 8026b16:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026b18:	88db      	ldrh	r3, [r3, #6]
 8026b1a:	b29b      	uxth	r3, r3
 8026b1c:	f003 0320 	and.w	r3, r3, #32
 8026b20:	2b00      	cmp	r3, #0
 8026b22:	bf0c      	ite	eq
 8026b24:	2301      	moveq	r3, #1
 8026b26:	2300      	movne	r3, #0
 8026b28:	b2db      	uxtb	r3, r3
 8026b2a:	61fb      	str	r3, [r7, #28]
  if (is_last) {
 8026b2c:	69fb      	ldr	r3, [r7, #28]
 8026b2e:	2b00      	cmp	r3, #0
 8026b30:	d00e      	beq.n	8026b50 <ip4_reass+0x178>
    u16_t datagram_len = (u16_t)(offset + len);
 8026b32:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 8026b34:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8026b36:	4413      	add	r3, r2
 8026b38:	837b      	strh	r3, [r7, #26]
    if ((datagram_len < offset) || (datagram_len > (0xFFFF - IP_HLEN))) {
 8026b3a:	8b7a      	ldrh	r2, [r7, #26]
 8026b3c:	8cfb      	ldrh	r3, [r7, #38]	@ 0x26
 8026b3e:	429a      	cmp	r2, r3
 8026b40:	f0c0 80a0 	bcc.w	8026c84 <ip4_reass+0x2ac>
 8026b44:	8b7b      	ldrh	r3, [r7, #26]
 8026b46:	f64f 72eb 	movw	r2, #65515	@ 0xffeb
 8026b4a:	4293      	cmp	r3, r2
 8026b4c:	f200 809a 	bhi.w	8026c84 <ip4_reass+0x2ac>
      goto nullreturn_ipr;
    }
  }
  /* find the right place to insert this pbuf */
  /* @todo: trim pbufs if fragments are overlapping */
  valid = ip_reass_chain_frag_into_datagram_and_validate(ipr, p, is_last);
 8026b50:	69fa      	ldr	r2, [r7, #28]
 8026b52:	6879      	ldr	r1, [r7, #4]
 8026b54:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8026b56:	f7ff fdd5 	bl	8026704 <ip_reass_chain_frag_into_datagram_and_validate>
 8026b5a:	6178      	str	r0, [r7, #20]
  if (valid == IP_REASS_VALIDATE_PBUF_DROPPED) {
 8026b5c:	697b      	ldr	r3, [r7, #20]
 8026b5e:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8026b62:	f000 809b 	beq.w	8026c9c <ip4_reass+0x2c4>
  /* if we come here, the pbuf has been enqueued */

  /* Track the current number of pbufs current 'in-flight', in order to limit
     the number of fragments that may be enqueued at any one time
     (overflow checked by testing against IP_REASS_MAX_PBUFS) */
  ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount + clen);
 8026b66:	4b48      	ldr	r3, [pc, #288]	@ (8026c88 <ip4_reass+0x2b0>)
 8026b68:	881a      	ldrh	r2, [r3, #0]
 8026b6a:	8c3b      	ldrh	r3, [r7, #32]
 8026b6c:	4413      	add	r3, r2
 8026b6e:	b29a      	uxth	r2, r3
 8026b70:	4b45      	ldr	r3, [pc, #276]	@ (8026c88 <ip4_reass+0x2b0>)
 8026b72:	801a      	strh	r2, [r3, #0]
  if (is_last) {
 8026b74:	69fb      	ldr	r3, [r7, #28]
 8026b76:	2b00      	cmp	r3, #0
 8026b78:	d00d      	beq.n	8026b96 <ip4_reass+0x1be>
    u16_t datagram_len = (u16_t)(offset + len);
 8026b7a:	8cfa      	ldrh	r2, [r7, #38]	@ 0x26
 8026b7c:	8cbb      	ldrh	r3, [r7, #36]	@ 0x24
 8026b7e:	4413      	add	r3, r2
 8026b80:	827b      	strh	r3, [r7, #18]
    ipr->datagram_len = datagram_len;
 8026b82:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026b84:	8a7a      	ldrh	r2, [r7, #18]
 8026b86:	839a      	strh	r2, [r3, #28]
    ipr->flags |= IP_REASS_FLAG_LASTFRAG;
 8026b88:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026b8a:	7f9b      	ldrb	r3, [r3, #30]
 8026b8c:	f043 0301 	orr.w	r3, r3, #1
 8026b90:	b2da      	uxtb	r2, r3
 8026b92:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026b94:	779a      	strb	r2, [r3, #30]
    LWIP_DEBUGF(IP_REASS_DEBUG,
                ("ip4_reass: last fragment seen, total len %"S16_F"\n",
                 ipr->datagram_len));
  }

  if (valid == IP_REASS_VALIDATE_TELEGRAM_FINISHED) {
 8026b96:	697b      	ldr	r3, [r7, #20]
 8026b98:	2b01      	cmp	r3, #1
 8026b9a:	d171      	bne.n	8026c80 <ip4_reass+0x2a8>
    struct ip_reassdata *ipr_prev;
    /* the totally last fragment (flag more fragments = 0) was received at least
     * once AND all fragments are received */
    u16_t datagram_len = (u16_t)(ipr->datagram_len + IP_HLEN);
 8026b9c:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026b9e:	8b9b      	ldrh	r3, [r3, #28]
 8026ba0:	3314      	adds	r3, #20
 8026ba2:	823b      	strh	r3, [r7, #16]

    /* save the second pbuf before copying the header over the pointer */
    r = ((struct ip_reass_helper *)ipr->p->payload)->next_pbuf;
 8026ba4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026ba6:	685b      	ldr	r3, [r3, #4]
 8026ba8:	685b      	ldr	r3, [r3, #4]
 8026baa:	681b      	ldr	r3, [r3, #0]
 8026bac:	62fb      	str	r3, [r7, #44]	@ 0x2c

    /* copy the original ip header back to the first pbuf */
    fraghdr = (struct ip_hdr *)(ipr->p->payload);
 8026bae:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026bb0:	685b      	ldr	r3, [r3, #4]
 8026bb2:	685b      	ldr	r3, [r3, #4]
 8026bb4:	62bb      	str	r3, [r7, #40]	@ 0x28
    SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN);
 8026bb6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026bb8:	3308      	adds	r3, #8
 8026bba:	2214      	movs	r2, #20
 8026bbc:	4619      	mov	r1, r3
 8026bbe:	6ab8      	ldr	r0, [r7, #40]	@ 0x28
 8026bc0:	f004 f9d5 	bl	802af6e <memcpy>
    IPH_LEN_SET(fraghdr, lwip_htons(datagram_len));
 8026bc4:	8a3b      	ldrh	r3, [r7, #16]
 8026bc6:	4618      	mov	r0, r3
 8026bc8:	f7f2 ffee 	bl	8019ba8 <lwip_htons>
 8026bcc:	4603      	mov	r3, r0
 8026bce:	461a      	mov	r2, r3
 8026bd0:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026bd2:	805a      	strh	r2, [r3, #2]
    IPH_OFFSET_SET(fraghdr, 0);
 8026bd4:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026bd6:	2200      	movs	r2, #0
 8026bd8:	719a      	strb	r2, [r3, #6]
 8026bda:	2200      	movs	r2, #0
 8026bdc:	71da      	strb	r2, [r3, #7]
    IPH_CHKSUM_SET(fraghdr, 0);
 8026bde:	6abb      	ldr	r3, [r7, #40]	@ 0x28
 8026be0:	2200      	movs	r2, #0
 8026be2:	729a      	strb	r2, [r3, #10]
 8026be4:	2200      	movs	r2, #0
 8026be6:	72da      	strb	r2, [r3, #11]
    IF__NETIF_CHECKSUM_ENABLED(ip_current_input_netif(), NETIF_CHECKSUM_GEN_IP) {
      IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN));
    }
#endif /* CHECKSUM_GEN_IP */

    p = ipr->p;
 8026be8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026bea:	685b      	ldr	r3, [r3, #4]
 8026bec:	607b      	str	r3, [r7, #4]

    /* chain together the pbufs contained within the reass_data list. */
    while (r != NULL) {
 8026bee:	e00d      	b.n	8026c0c <ip4_reass+0x234>
      iprh = (struct ip_reass_helper *)r->payload;
 8026bf0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026bf2:	685b      	ldr	r3, [r3, #4]
 8026bf4:	60fb      	str	r3, [r7, #12]

      /* hide the ip header for every succeeding fragment */
      pbuf_remove_header(r, IP_HLEN);
 8026bf6:	2114      	movs	r1, #20
 8026bf8:	6af8      	ldr	r0, [r7, #44]	@ 0x2c
 8026bfa:	f7f4 fbff 	bl	801b3fc <pbuf_remove_header>
      pbuf_cat(p, r);
 8026bfe:	6af9      	ldr	r1, [r7, #44]	@ 0x2c
 8026c00:	6878      	ldr	r0, [r7, #4]
 8026c02:	f7f4 fd81 	bl	801b708 <pbuf_cat>
      r = iprh->next_pbuf;
 8026c06:	68fb      	ldr	r3, [r7, #12]
 8026c08:	681b      	ldr	r3, [r3, #0]
 8026c0a:	62fb      	str	r3, [r7, #44]	@ 0x2c
    while (r != NULL) {
 8026c0c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026c0e:	2b00      	cmp	r3, #0
 8026c10:	d1ee      	bne.n	8026bf0 <ip4_reass+0x218>
    }

    /* find the previous entry in the linked list */
    if (ipr == reassdatagrams) {
 8026c12:	4b1e      	ldr	r3, [pc, #120]	@ (8026c8c <ip4_reass+0x2b4>)
 8026c14:	681b      	ldr	r3, [r3, #0]
 8026c16:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8026c18:	429a      	cmp	r2, r3
 8026c1a:	d102      	bne.n	8026c22 <ip4_reass+0x24a>
      ipr_prev = NULL;
 8026c1c:	2300      	movs	r3, #0
 8026c1e:	637b      	str	r3, [r7, #52]	@ 0x34
 8026c20:	e010      	b.n	8026c44 <ip4_reass+0x26c>
    } else {
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 8026c22:	4b1a      	ldr	r3, [pc, #104]	@ (8026c8c <ip4_reass+0x2b4>)
 8026c24:	681b      	ldr	r3, [r3, #0]
 8026c26:	637b      	str	r3, [r7, #52]	@ 0x34
 8026c28:	e007      	b.n	8026c3a <ip4_reass+0x262>
        if (ipr_prev->next == ipr) {
 8026c2a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026c2c:	681b      	ldr	r3, [r3, #0]
 8026c2e:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8026c30:	429a      	cmp	r2, r3
 8026c32:	d006      	beq.n	8026c42 <ip4_reass+0x26a>
      for (ipr_prev = reassdatagrams; ipr_prev != NULL; ipr_prev = ipr_prev->next) {
 8026c34:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026c36:	681b      	ldr	r3, [r3, #0]
 8026c38:	637b      	str	r3, [r7, #52]	@ 0x34
 8026c3a:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026c3c:	2b00      	cmp	r3, #0
 8026c3e:	d1f4      	bne.n	8026c2a <ip4_reass+0x252>
 8026c40:	e000      	b.n	8026c44 <ip4_reass+0x26c>
          break;
 8026c42:	bf00      	nop
        }
      }
    }

    /* release the sources allocate for the fragment queue entry */
    ip_reass_dequeue_datagram(ipr, ipr_prev);
 8026c44:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8026c46:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8026c48:	f7ff fd2e 	bl	80266a8 <ip_reass_dequeue_datagram>

    /* and adjust the number of pbufs currently queued for reassembly. */
    clen = pbuf_clen(p);
 8026c4c:	6878      	ldr	r0, [r7, #4]
 8026c4e:	f7f4 fd1b 	bl	801b688 <pbuf_clen>
 8026c52:	4603      	mov	r3, r0
 8026c54:	843b      	strh	r3, [r7, #32]
    LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= clen);
 8026c56:	4b0c      	ldr	r3, [pc, #48]	@ (8026c88 <ip4_reass+0x2b0>)
 8026c58:	881b      	ldrh	r3, [r3, #0]
 8026c5a:	8c3a      	ldrh	r2, [r7, #32]
 8026c5c:	429a      	cmp	r2, r3
 8026c5e:	d906      	bls.n	8026c6e <ip4_reass+0x296>
 8026c60:	4b0b      	ldr	r3, [pc, #44]	@ (8026c90 <ip4_reass+0x2b8>)
 8026c62:	f240 229b 	movw	r2, #667	@ 0x29b
 8026c66:	490b      	ldr	r1, [pc, #44]	@ (8026c94 <ip4_reass+0x2bc>)
 8026c68:	480b      	ldr	r0, [pc, #44]	@ (8026c98 <ip4_reass+0x2c0>)
 8026c6a:	f003 fef7 	bl	802aa5c <iprintf>
    ip_reass_pbufcount = (u16_t)(ip_reass_pbufcount - clen);
 8026c6e:	4b06      	ldr	r3, [pc, #24]	@ (8026c88 <ip4_reass+0x2b0>)
 8026c70:	881a      	ldrh	r2, [r3, #0]
 8026c72:	8c3b      	ldrh	r3, [r7, #32]
 8026c74:	1ad3      	subs	r3, r2, r3
 8026c76:	b29a      	uxth	r2, r3
 8026c78:	4b03      	ldr	r3, [pc, #12]	@ (8026c88 <ip4_reass+0x2b0>)
 8026c7a:	801a      	strh	r2, [r3, #0]

    MIB2_STATS_INC(mib2.ipreasmoks);

    /* Return the pbuf chain */
    return p;
 8026c7c:	687b      	ldr	r3, [r7, #4]
 8026c7e:	e038      	b.n	8026cf2 <ip4_reass+0x31a>
  }
  /* the datagram is not (yet?) reassembled completely */
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount));
  return NULL;
 8026c80:	2300      	movs	r3, #0
 8026c82:	e036      	b.n	8026cf2 <ip4_reass+0x31a>
      goto nullreturn_ipr;
 8026c84:	bf00      	nop
 8026c86:	e00a      	b.n	8026c9e <ip4_reass+0x2c6>
 8026c88:	2402b148 	.word	0x2402b148
 8026c8c:	2402b144 	.word	0x2402b144
 8026c90:	080318e4 	.word	0x080318e4
 8026c94:	08031a54 	.word	0x08031a54
 8026c98:	0803192c 	.word	0x0803192c
    goto nullreturn_ipr;
 8026c9c:	bf00      	nop

nullreturn_ipr:
  LWIP_ASSERT("ipr != NULL", ipr != NULL);
 8026c9e:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026ca0:	2b00      	cmp	r3, #0
 8026ca2:	d106      	bne.n	8026cb2 <ip4_reass+0x2da>
 8026ca4:	4b15      	ldr	r3, [pc, #84]	@ (8026cfc <ip4_reass+0x324>)
 8026ca6:	f44f 722a 	mov.w	r2, #680	@ 0x2a8
 8026caa:	4915      	ldr	r1, [pc, #84]	@ (8026d00 <ip4_reass+0x328>)
 8026cac:	4815      	ldr	r0, [pc, #84]	@ (8026d04 <ip4_reass+0x32c>)
 8026cae:	f003 fed5 	bl	802aa5c <iprintf>
  if (ipr->p == NULL) {
 8026cb2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026cb4:	685b      	ldr	r3, [r3, #4]
 8026cb6:	2b00      	cmp	r3, #0
 8026cb8:	d116      	bne.n	8026ce8 <ip4_reass+0x310>
    /* dropped pbuf after creating a new datagram entry: remove the entry, too */
    LWIP_ASSERT("not firstalthough just enqueued", ipr == reassdatagrams);
 8026cba:	4b13      	ldr	r3, [pc, #76]	@ (8026d08 <ip4_reass+0x330>)
 8026cbc:	681b      	ldr	r3, [r3, #0]
 8026cbe:	6b3a      	ldr	r2, [r7, #48]	@ 0x30
 8026cc0:	429a      	cmp	r2, r3
 8026cc2:	d006      	beq.n	8026cd2 <ip4_reass+0x2fa>
 8026cc4:	4b0d      	ldr	r3, [pc, #52]	@ (8026cfc <ip4_reass+0x324>)
 8026cc6:	f240 22ab 	movw	r2, #683	@ 0x2ab
 8026cca:	4910      	ldr	r1, [pc, #64]	@ (8026d0c <ip4_reass+0x334>)
 8026ccc:	480d      	ldr	r0, [pc, #52]	@ (8026d04 <ip4_reass+0x32c>)
 8026cce:	f003 fec5 	bl	802aa5c <iprintf>
    ip_reass_dequeue_datagram(ipr, NULL);
 8026cd2:	2100      	movs	r1, #0
 8026cd4:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 8026cd6:	f7ff fce7 	bl	80266a8 <ip_reass_dequeue_datagram>
 8026cda:	e006      	b.n	8026cea <ip4_reass+0x312>
    goto nullreturn;
 8026cdc:	bf00      	nop
 8026cde:	e004      	b.n	8026cea <ip4_reass+0x312>
    goto nullreturn;
 8026ce0:	bf00      	nop
 8026ce2:	e002      	b.n	8026cea <ip4_reass+0x312>
      goto nullreturn;
 8026ce4:	bf00      	nop
 8026ce6:	e000      	b.n	8026cea <ip4_reass+0x312>
  }

nullreturn:
 8026ce8:	bf00      	nop
  LWIP_DEBUGF(IP_REASS_DEBUG, ("ip4_reass: nullreturn\n"));
  IPFRAG_STATS_INC(ip_frag.drop);
  pbuf_free(p);
 8026cea:	6878      	ldr	r0, [r7, #4]
 8026cec:	f7f4 fc3e 	bl	801b56c <pbuf_free>
  return NULL;
 8026cf0:	2300      	movs	r3, #0
}
 8026cf2:	4618      	mov	r0, r3
 8026cf4:	3738      	adds	r7, #56	@ 0x38
 8026cf6:	46bd      	mov	sp, r7
 8026cf8:	bd80      	pop	{r7, pc}
 8026cfa:	bf00      	nop
 8026cfc:	080318e4 	.word	0x080318e4
 8026d00:	08031a70 	.word	0x08031a70
 8026d04:	0803192c 	.word	0x0803192c
 8026d08:	2402b144 	.word	0x2402b144
 8026d0c:	08031a7c 	.word	0x08031a7c

08026d10 <ip_frag_alloc_pbuf_custom_ref>:
#if IP_FRAG
#if !LWIP_NETIF_TX_SINGLE_PBUF
/** Allocate a new struct pbuf_custom_ref */
static struct pbuf_custom_ref *
ip_frag_alloc_pbuf_custom_ref(void)
{
 8026d10:	b580      	push	{r7, lr}
 8026d12:	af00      	add	r7, sp, #0
  return (struct pbuf_custom_ref *)memp_malloc(MEMP_FRAG_PBUF);
 8026d14:	2005      	movs	r0, #5
 8026d16:	f7f3 fcc5 	bl	801a6a4 <memp_malloc>
 8026d1a:	4603      	mov	r3, r0
}
 8026d1c:	4618      	mov	r0, r3
 8026d1e:	bd80      	pop	{r7, pc}

08026d20 <ip_frag_free_pbuf_custom_ref>:

/** Free a struct pbuf_custom_ref */
static void
ip_frag_free_pbuf_custom_ref(struct pbuf_custom_ref *p)
{
 8026d20:	b580      	push	{r7, lr}
 8026d22:	b082      	sub	sp, #8
 8026d24:	af00      	add	r7, sp, #0
 8026d26:	6078      	str	r0, [r7, #4]
  LWIP_ASSERT("p != NULL", p != NULL);
 8026d28:	687b      	ldr	r3, [r7, #4]
 8026d2a:	2b00      	cmp	r3, #0
 8026d2c:	d106      	bne.n	8026d3c <ip_frag_free_pbuf_custom_ref+0x1c>
 8026d2e:	4b07      	ldr	r3, [pc, #28]	@ (8026d4c <ip_frag_free_pbuf_custom_ref+0x2c>)
 8026d30:	f44f 7231 	mov.w	r2, #708	@ 0x2c4
 8026d34:	4906      	ldr	r1, [pc, #24]	@ (8026d50 <ip_frag_free_pbuf_custom_ref+0x30>)
 8026d36:	4807      	ldr	r0, [pc, #28]	@ (8026d54 <ip_frag_free_pbuf_custom_ref+0x34>)
 8026d38:	f003 fe90 	bl	802aa5c <iprintf>
  memp_free(MEMP_FRAG_PBUF, p);
 8026d3c:	6879      	ldr	r1, [r7, #4]
 8026d3e:	2005      	movs	r0, #5
 8026d40:	f7f3 fd26 	bl	801a790 <memp_free>
}
 8026d44:	bf00      	nop
 8026d46:	3708      	adds	r7, #8
 8026d48:	46bd      	mov	sp, r7
 8026d4a:	bd80      	pop	{r7, pc}
 8026d4c:	080318e4 	.word	0x080318e4
 8026d50:	08031a9c 	.word	0x08031a9c
 8026d54:	0803192c 	.word	0x0803192c

08026d58 <ipfrag_free_pbuf_custom>:

/** Free-callback function to free a 'struct pbuf_custom_ref', called by
 * pbuf_free. */
static void
ipfrag_free_pbuf_custom(struct pbuf *p)
{
 8026d58:	b580      	push	{r7, lr}
 8026d5a:	b084      	sub	sp, #16
 8026d5c:	af00      	add	r7, sp, #0
 8026d5e:	6078      	str	r0, [r7, #4]
  struct pbuf_custom_ref *pcr = (struct pbuf_custom_ref *)p;
 8026d60:	687b      	ldr	r3, [r7, #4]
 8026d62:	60fb      	str	r3, [r7, #12]
  LWIP_ASSERT("pcr != NULL", pcr != NULL);
 8026d64:	68fb      	ldr	r3, [r7, #12]
 8026d66:	2b00      	cmp	r3, #0
 8026d68:	d106      	bne.n	8026d78 <ipfrag_free_pbuf_custom+0x20>
 8026d6a:	4b11      	ldr	r3, [pc, #68]	@ (8026db0 <ipfrag_free_pbuf_custom+0x58>)
 8026d6c:	f240 22ce 	movw	r2, #718	@ 0x2ce
 8026d70:	4910      	ldr	r1, [pc, #64]	@ (8026db4 <ipfrag_free_pbuf_custom+0x5c>)
 8026d72:	4811      	ldr	r0, [pc, #68]	@ (8026db8 <ipfrag_free_pbuf_custom+0x60>)
 8026d74:	f003 fe72 	bl	802aa5c <iprintf>
  LWIP_ASSERT("pcr == p", (void *)pcr == (void *)p);
 8026d78:	68fa      	ldr	r2, [r7, #12]
 8026d7a:	687b      	ldr	r3, [r7, #4]
 8026d7c:	429a      	cmp	r2, r3
 8026d7e:	d006      	beq.n	8026d8e <ipfrag_free_pbuf_custom+0x36>
 8026d80:	4b0b      	ldr	r3, [pc, #44]	@ (8026db0 <ipfrag_free_pbuf_custom+0x58>)
 8026d82:	f240 22cf 	movw	r2, #719	@ 0x2cf
 8026d86:	490d      	ldr	r1, [pc, #52]	@ (8026dbc <ipfrag_free_pbuf_custom+0x64>)
 8026d88:	480b      	ldr	r0, [pc, #44]	@ (8026db8 <ipfrag_free_pbuf_custom+0x60>)
 8026d8a:	f003 fe67 	bl	802aa5c <iprintf>
  if (pcr->original != NULL) {
 8026d8e:	68fb      	ldr	r3, [r7, #12]
 8026d90:	695b      	ldr	r3, [r3, #20]
 8026d92:	2b00      	cmp	r3, #0
 8026d94:	d004      	beq.n	8026da0 <ipfrag_free_pbuf_custom+0x48>
    pbuf_free(pcr->original);
 8026d96:	68fb      	ldr	r3, [r7, #12]
 8026d98:	695b      	ldr	r3, [r3, #20]
 8026d9a:	4618      	mov	r0, r3
 8026d9c:	f7f4 fbe6 	bl	801b56c <pbuf_free>
  }
  ip_frag_free_pbuf_custom_ref(pcr);
 8026da0:	68f8      	ldr	r0, [r7, #12]
 8026da2:	f7ff ffbd 	bl	8026d20 <ip_frag_free_pbuf_custom_ref>
}
 8026da6:	bf00      	nop
 8026da8:	3710      	adds	r7, #16
 8026daa:	46bd      	mov	sp, r7
 8026dac:	bd80      	pop	{r7, pc}
 8026dae:	bf00      	nop
 8026db0:	080318e4 	.word	0x080318e4
 8026db4:	08031aa8 	.word	0x08031aa8
 8026db8:	0803192c 	.word	0x0803192c
 8026dbc:	08031ab4 	.word	0x08031ab4

08026dc0 <ip4_frag>:
 *
 * @return ERR_OK if sent successfully, err_t otherwise
 */
err_t
ip4_frag(struct pbuf *p, struct netif *netif, const ip4_addr_t *dest)
{
 8026dc0:	b580      	push	{r7, lr}
 8026dc2:	b094      	sub	sp, #80	@ 0x50
 8026dc4:	af02      	add	r7, sp, #8
 8026dc6:	60f8      	str	r0, [r7, #12]
 8026dc8:	60b9      	str	r1, [r7, #8]
 8026dca:	607a      	str	r2, [r7, #4]
  struct pbuf *rambuf;
#if !LWIP_NETIF_TX_SINGLE_PBUF
  struct pbuf *newpbuf;
  u16_t newpbuflen = 0;
 8026dcc:	2300      	movs	r3, #0
 8026dce:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
  u16_t left_to_copy;
#endif
  struct ip_hdr *original_iphdr;
  struct ip_hdr *iphdr;
  const u16_t nfb = (u16_t)((netif->mtu - IP_HLEN) / 8);
 8026dd2:	68bb      	ldr	r3, [r7, #8]
 8026dd4:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8026dd6:	3b14      	subs	r3, #20
 8026dd8:	2b00      	cmp	r3, #0
 8026dda:	da00      	bge.n	8026dde <ip4_frag+0x1e>
 8026ddc:	3307      	adds	r3, #7
 8026dde:	10db      	asrs	r3, r3, #3
 8026de0:	877b      	strh	r3, [r7, #58]	@ 0x3a
  u16_t left, fragsize;
  u16_t ofo;
  int last;
  u16_t poff = IP_HLEN;
 8026de2:	2314      	movs	r3, #20
 8026de4:	87fb      	strh	r3, [r7, #62]	@ 0x3e
  u16_t tmp;
  int mf_set;

  original_iphdr = (struct ip_hdr *)p->payload;
 8026de6:	68fb      	ldr	r3, [r7, #12]
 8026de8:	685b      	ldr	r3, [r3, #4]
 8026dea:	637b      	str	r3, [r7, #52]	@ 0x34
  iphdr = original_iphdr;
 8026dec:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8026dee:	633b      	str	r3, [r7, #48]	@ 0x30
  if (IPH_HL_BYTES(iphdr) != IP_HLEN) {
 8026df0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026df2:	781b      	ldrb	r3, [r3, #0]
 8026df4:	f003 030f 	and.w	r3, r3, #15
 8026df8:	b2db      	uxtb	r3, r3
 8026dfa:	009b      	lsls	r3, r3, #2
 8026dfc:	b2db      	uxtb	r3, r3
 8026dfe:	2b14      	cmp	r3, #20
 8026e00:	d002      	beq.n	8026e08 <ip4_frag+0x48>
    /* ip4_frag() does not support IP options */
    return ERR_VAL;
 8026e02:	f06f 0305 	mvn.w	r3, #5
 8026e06:	e110      	b.n	802702a <ip4_frag+0x26a>
  }
  LWIP_ERROR("ip4_frag(): pbuf too short", p->len >= IP_HLEN, return ERR_VAL);
 8026e08:	68fb      	ldr	r3, [r7, #12]
 8026e0a:	895b      	ldrh	r3, [r3, #10]
 8026e0c:	2b13      	cmp	r3, #19
 8026e0e:	d809      	bhi.n	8026e24 <ip4_frag+0x64>
 8026e10:	4b88      	ldr	r3, [pc, #544]	@ (8027034 <ip4_frag+0x274>)
 8026e12:	f44f 723f 	mov.w	r2, #764	@ 0x2fc
 8026e16:	4988      	ldr	r1, [pc, #544]	@ (8027038 <ip4_frag+0x278>)
 8026e18:	4888      	ldr	r0, [pc, #544]	@ (802703c <ip4_frag+0x27c>)
 8026e1a:	f003 fe1f 	bl	802aa5c <iprintf>
 8026e1e:	f06f 0305 	mvn.w	r3, #5
 8026e22:	e102      	b.n	802702a <ip4_frag+0x26a>

  /* Save original offset */
  tmp = lwip_ntohs(IPH_OFFSET(iphdr));
 8026e24:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026e26:	88db      	ldrh	r3, [r3, #6]
 8026e28:	b29b      	uxth	r3, r3
 8026e2a:	4618      	mov	r0, r3
 8026e2c:	f7f2 febc 	bl	8019ba8 <lwip_htons>
 8026e30:	4603      	mov	r3, r0
 8026e32:	87bb      	strh	r3, [r7, #60]	@ 0x3c
  ofo = tmp & IP_OFFMASK;
 8026e34:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026e36:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026e3a:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  /* already fragmented? if so, the last fragment we create must have MF, too */
  mf_set = tmp & IP_MF;
 8026e3e:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026e40:	f403 5300 	and.w	r3, r3, #8192	@ 0x2000
 8026e44:	62fb      	str	r3, [r7, #44]	@ 0x2c

  left = (u16_t)(p->tot_len - IP_HLEN);
 8026e46:	68fb      	ldr	r3, [r7, #12]
 8026e48:	891b      	ldrh	r3, [r3, #8]
 8026e4a:	3b14      	subs	r3, #20
 8026e4c:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42

  while (left) {
 8026e50:	e0e1      	b.n	8027016 <ip4_frag+0x256>
    /* Fill this fragment */
    fragsize = LWIP_MIN(left, (u16_t)(nfb * 8));
 8026e52:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8026e54:	00db      	lsls	r3, r3, #3
 8026e56:	b29b      	uxth	r3, r3
 8026e58:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 8026e5c:	4293      	cmp	r3, r2
 8026e5e:	bf28      	it	cs
 8026e60:	4613      	movcs	r3, r2
 8026e62:	857b      	strh	r3, [r7, #42]	@ 0x2a
    /* When not using a static buffer, create a chain of pbufs.
     * The first will be a PBUF_RAM holding the link and IP header.
     * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged,
     * but limited to the size of an mtu.
     */
    rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM);
 8026e64:	f44f 7220 	mov.w	r2, #640	@ 0x280
 8026e68:	2114      	movs	r1, #20
 8026e6a:	200e      	movs	r0, #14
 8026e6c:	f7f4 f868 	bl	801af40 <pbuf_alloc>
 8026e70:	6278      	str	r0, [r7, #36]	@ 0x24
    if (rambuf == NULL) {
 8026e72:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026e74:	2b00      	cmp	r3, #0
 8026e76:	f000 80d5 	beq.w	8027024 <ip4_frag+0x264>
      goto memerr;
    }
    LWIP_ASSERT("this needs a pbuf in one piece!",
 8026e7a:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026e7c:	895b      	ldrh	r3, [r3, #10]
 8026e7e:	2b13      	cmp	r3, #19
 8026e80:	d806      	bhi.n	8026e90 <ip4_frag+0xd0>
 8026e82:	4b6c      	ldr	r3, [pc, #432]	@ (8027034 <ip4_frag+0x274>)
 8026e84:	f44f 7249 	mov.w	r2, #804	@ 0x324
 8026e88:	496d      	ldr	r1, [pc, #436]	@ (8027040 <ip4_frag+0x280>)
 8026e8a:	486c      	ldr	r0, [pc, #432]	@ (802703c <ip4_frag+0x27c>)
 8026e8c:	f003 fde6 	bl	802aa5c <iprintf>
                (rambuf->len >= (IP_HLEN)));
    SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN);
 8026e90:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026e92:	685b      	ldr	r3, [r3, #4]
 8026e94:	2214      	movs	r2, #20
 8026e96:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8026e98:	4618      	mov	r0, r3
 8026e9a:	f004 f868 	bl	802af6e <memcpy>
    iphdr = (struct ip_hdr *)rambuf->payload;
 8026e9e:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8026ea0:	685b      	ldr	r3, [r3, #4]
 8026ea2:	633b      	str	r3, [r7, #48]	@ 0x30

    left_to_copy = fragsize;
 8026ea4:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8026ea6:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
    while (left_to_copy) {
 8026eaa:	e064      	b.n	8026f76 <ip4_frag+0x1b6>
      struct pbuf_custom_ref *pcr;
      u16_t plen = (u16_t)(p->len - poff);
 8026eac:	68fb      	ldr	r3, [r7, #12]
 8026eae:	895a      	ldrh	r2, [r3, #10]
 8026eb0:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8026eb2:	1ad3      	subs	r3, r2, r3
 8026eb4:	83fb      	strh	r3, [r7, #30]
      LWIP_ASSERT("p->len >= poff", p->len >= poff);
 8026eb6:	68fb      	ldr	r3, [r7, #12]
 8026eb8:	895b      	ldrh	r3, [r3, #10]
 8026eba:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8026ebc:	429a      	cmp	r2, r3
 8026ebe:	d906      	bls.n	8026ece <ip4_frag+0x10e>
 8026ec0:	4b5c      	ldr	r3, [pc, #368]	@ (8027034 <ip4_frag+0x274>)
 8026ec2:	f240 322d 	movw	r2, #813	@ 0x32d
 8026ec6:	495f      	ldr	r1, [pc, #380]	@ (8027044 <ip4_frag+0x284>)
 8026ec8:	485c      	ldr	r0, [pc, #368]	@ (802703c <ip4_frag+0x27c>)
 8026eca:	f003 fdc7 	bl	802aa5c <iprintf>
      newpbuflen = LWIP_MIN(left_to_copy, plen);
 8026ece:	8bfa      	ldrh	r2, [r7, #30]
 8026ed0:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8026ed4:	4293      	cmp	r3, r2
 8026ed6:	bf28      	it	cs
 8026ed8:	4613      	movcs	r3, r2
 8026eda:	f8a7 3046 	strh.w	r3, [r7, #70]	@ 0x46
      /* Is this pbuf already empty? */
      if (!newpbuflen) {
 8026ede:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8026ee2:	2b00      	cmp	r3, #0
 8026ee4:	d105      	bne.n	8026ef2 <ip4_frag+0x132>
        poff = 0;
 8026ee6:	2300      	movs	r3, #0
 8026ee8:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 8026eea:	68fb      	ldr	r3, [r7, #12]
 8026eec:	681b      	ldr	r3, [r3, #0]
 8026eee:	60fb      	str	r3, [r7, #12]
        continue;
 8026ef0:	e041      	b.n	8026f76 <ip4_frag+0x1b6>
      }
      pcr = ip_frag_alloc_pbuf_custom_ref();
 8026ef2:	f7ff ff0d 	bl	8026d10 <ip_frag_alloc_pbuf_custom_ref>
 8026ef6:	61b8      	str	r0, [r7, #24]
      if (pcr == NULL) {
 8026ef8:	69bb      	ldr	r3, [r7, #24]
 8026efa:	2b00      	cmp	r3, #0
 8026efc:	d103      	bne.n	8026f06 <ip4_frag+0x146>
        pbuf_free(rambuf);
 8026efe:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026f00:	f7f4 fb34 	bl	801b56c <pbuf_free>
        goto memerr;
 8026f04:	e08f      	b.n	8027026 <ip4_frag+0x266>
      }
      /* Mirror this pbuf, although we might not need all of it. */
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 8026f06:	69b8      	ldr	r0, [r7, #24]
                                    (u8_t *)p->payload + poff, newpbuflen);
 8026f08:	68fb      	ldr	r3, [r7, #12]
 8026f0a:	685a      	ldr	r2, [r3, #4]
      newpbuf = pbuf_alloced_custom(PBUF_RAW, newpbuflen, PBUF_REF, &pcr->pc,
 8026f0c:	8ffb      	ldrh	r3, [r7, #62]	@ 0x3e
 8026f0e:	4413      	add	r3, r2
 8026f10:	f8b7 1046 	ldrh.w	r1, [r7, #70]	@ 0x46
 8026f14:	f8b7 2046 	ldrh.w	r2, [r7, #70]	@ 0x46
 8026f18:	9201      	str	r2, [sp, #4]
 8026f1a:	9300      	str	r3, [sp, #0]
 8026f1c:	4603      	mov	r3, r0
 8026f1e:	2241      	movs	r2, #65	@ 0x41
 8026f20:	2000      	movs	r0, #0
 8026f22:	f7f4 f939 	bl	801b198 <pbuf_alloced_custom>
 8026f26:	6178      	str	r0, [r7, #20]
      if (newpbuf == NULL) {
 8026f28:	697b      	ldr	r3, [r7, #20]
 8026f2a:	2b00      	cmp	r3, #0
 8026f2c:	d106      	bne.n	8026f3c <ip4_frag+0x17c>
        ip_frag_free_pbuf_custom_ref(pcr);
 8026f2e:	69b8      	ldr	r0, [r7, #24]
 8026f30:	f7ff fef6 	bl	8026d20 <ip_frag_free_pbuf_custom_ref>
        pbuf_free(rambuf);
 8026f34:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026f36:	f7f4 fb19 	bl	801b56c <pbuf_free>
        goto memerr;
 8026f3a:	e074      	b.n	8027026 <ip4_frag+0x266>
      }
      pbuf_ref(p);
 8026f3c:	68f8      	ldr	r0, [r7, #12]
 8026f3e:	f7f4 fbbb 	bl	801b6b8 <pbuf_ref>
      pcr->original = p;
 8026f42:	69bb      	ldr	r3, [r7, #24]
 8026f44:	68fa      	ldr	r2, [r7, #12]
 8026f46:	615a      	str	r2, [r3, #20]
      pcr->pc.custom_free_function = ipfrag_free_pbuf_custom;
 8026f48:	69bb      	ldr	r3, [r7, #24]
 8026f4a:	4a3f      	ldr	r2, [pc, #252]	@ (8027048 <ip4_frag+0x288>)
 8026f4c:	611a      	str	r2, [r3, #16]

      /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain
       * so that it is removed when pbuf_dechain is later called on rambuf.
       */
      pbuf_cat(rambuf, newpbuf);
 8026f4e:	6979      	ldr	r1, [r7, #20]
 8026f50:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026f52:	f7f4 fbd9 	bl	801b708 <pbuf_cat>
      left_to_copy = (u16_t)(left_to_copy - newpbuflen);
 8026f56:	f8b7 2044 	ldrh.w	r2, [r7, #68]	@ 0x44
 8026f5a:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8026f5e:	1ad3      	subs	r3, r2, r3
 8026f60:	f8a7 3044 	strh.w	r3, [r7, #68]	@ 0x44
      if (left_to_copy) {
 8026f64:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8026f68:	2b00      	cmp	r3, #0
 8026f6a:	d004      	beq.n	8026f76 <ip4_frag+0x1b6>
        poff = 0;
 8026f6c:	2300      	movs	r3, #0
 8026f6e:	87fb      	strh	r3, [r7, #62]	@ 0x3e
        p = p->next;
 8026f70:	68fb      	ldr	r3, [r7, #12]
 8026f72:	681b      	ldr	r3, [r3, #0]
 8026f74:	60fb      	str	r3, [r7, #12]
    while (left_to_copy) {
 8026f76:	f8b7 3044 	ldrh.w	r3, [r7, #68]	@ 0x44
 8026f7a:	2b00      	cmp	r3, #0
 8026f7c:	d196      	bne.n	8026eac <ip4_frag+0xec>
      }
    }
    poff = (u16_t)(poff + newpbuflen);
 8026f7e:	8ffa      	ldrh	r2, [r7, #62]	@ 0x3e
 8026f80:	f8b7 3046 	ldrh.w	r3, [r7, #70]	@ 0x46
 8026f84:	4413      	add	r3, r2
 8026f86:	87fb      	strh	r3, [r7, #62]	@ 0x3e
#endif /* LWIP_NETIF_TX_SINGLE_PBUF */

    /* Correct header */
    last = (left <= netif->mtu - IP_HLEN);
 8026f88:	68bb      	ldr	r3, [r7, #8]
 8026f8a:	8d1b      	ldrh	r3, [r3, #40]	@ 0x28
 8026f8c:	f1a3 0213 	sub.w	r2, r3, #19
 8026f90:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 8026f94:	429a      	cmp	r2, r3
 8026f96:	bfcc      	ite	gt
 8026f98:	2301      	movgt	r3, #1
 8026f9a:	2300      	movle	r3, #0
 8026f9c:	b2db      	uxtb	r3, r3
 8026f9e:	623b      	str	r3, [r7, #32]

    /* Set new offset and MF flag */
    tmp = (IP_OFFMASK & (ofo));
 8026fa0:	f8b7 3040 	ldrh.w	r3, [r7, #64]	@ 0x40
 8026fa4:	f3c3 030c 	ubfx	r3, r3, #0, #13
 8026fa8:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    if (!last || mf_set) {
 8026faa:	6a3b      	ldr	r3, [r7, #32]
 8026fac:	2b00      	cmp	r3, #0
 8026fae:	d002      	beq.n	8026fb6 <ip4_frag+0x1f6>
 8026fb0:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8026fb2:	2b00      	cmp	r3, #0
 8026fb4:	d003      	beq.n	8026fbe <ip4_frag+0x1fe>
      /* the last fragment has MF set if the input frame had it */
      tmp = tmp | IP_MF;
 8026fb6:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026fb8:	f443 5300 	orr.w	r3, r3, #8192	@ 0x2000
 8026fbc:	87bb      	strh	r3, [r7, #60]	@ 0x3c
    }
    IPH_OFFSET_SET(iphdr, lwip_htons(tmp));
 8026fbe:	8fbb      	ldrh	r3, [r7, #60]	@ 0x3c
 8026fc0:	4618      	mov	r0, r3
 8026fc2:	f7f2 fdf1 	bl	8019ba8 <lwip_htons>
 8026fc6:	4603      	mov	r3, r0
 8026fc8:	461a      	mov	r2, r3
 8026fca:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026fcc:	80da      	strh	r2, [r3, #6]
    IPH_LEN_SET(iphdr, lwip_htons((u16_t)(fragsize + IP_HLEN)));
 8026fce:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8026fd0:	3314      	adds	r3, #20
 8026fd2:	b29b      	uxth	r3, r3
 8026fd4:	4618      	mov	r0, r3
 8026fd6:	f7f2 fde7 	bl	8019ba8 <lwip_htons>
 8026fda:	4603      	mov	r3, r0
 8026fdc:	461a      	mov	r2, r3
 8026fde:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026fe0:	805a      	strh	r2, [r3, #2]
    IPH_CHKSUM_SET(iphdr, 0);
 8026fe2:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8026fe4:	2200      	movs	r2, #0
 8026fe6:	729a      	strb	r2, [r3, #10]
 8026fe8:	2200      	movs	r2, #0
 8026fea:	72da      	strb	r2, [r3, #11]
#endif /* CHECKSUM_GEN_IP */

    /* No need for separate header pbuf - we allowed room for it in rambuf
     * when allocated.
     */
    netif->output(netif, rambuf, dest);
 8026fec:	68bb      	ldr	r3, [r7, #8]
 8026fee:	695b      	ldr	r3, [r3, #20]
 8026ff0:	687a      	ldr	r2, [r7, #4]
 8026ff2:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 8026ff4:	68b8      	ldr	r0, [r7, #8]
 8026ff6:	4798      	blx	r3
     * recreate it next time round the loop. If we're lucky the hardware
     * will have already sent the packet, the free will really free, and
     * there will be zero memory penalty.
     */

    pbuf_free(rambuf);
 8026ff8:	6a78      	ldr	r0, [r7, #36]	@ 0x24
 8026ffa:	f7f4 fab7 	bl	801b56c <pbuf_free>
    left = (u16_t)(left - fragsize);
 8026ffe:	f8b7 2042 	ldrh.w	r2, [r7, #66]	@ 0x42
 8027002:	8d7b      	ldrh	r3, [r7, #42]	@ 0x2a
 8027004:	1ad3      	subs	r3, r2, r3
 8027006:	f8a7 3042 	strh.w	r3, [r7, #66]	@ 0x42
    ofo = (u16_t)(ofo + nfb);
 802700a:	f8b7 2040 	ldrh.w	r2, [r7, #64]	@ 0x40
 802700e:	8f7b      	ldrh	r3, [r7, #58]	@ 0x3a
 8027010:	4413      	add	r3, r2
 8027012:	f8a7 3040 	strh.w	r3, [r7, #64]	@ 0x40
  while (left) {
 8027016:	f8b7 3042 	ldrh.w	r3, [r7, #66]	@ 0x42
 802701a:	2b00      	cmp	r3, #0
 802701c:	f47f af19 	bne.w	8026e52 <ip4_frag+0x92>
  }
  MIB2_STATS_INC(mib2.ipfragoks);
  return ERR_OK;
 8027020:	2300      	movs	r3, #0
 8027022:	e002      	b.n	802702a <ip4_frag+0x26a>
      goto memerr;
 8027024:	bf00      	nop
memerr:
  MIB2_STATS_INC(mib2.ipfragfails);
  return ERR_MEM;
 8027026:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
}
 802702a:	4618      	mov	r0, r3
 802702c:	3748      	adds	r7, #72	@ 0x48
 802702e:	46bd      	mov	sp, r7
 8027030:	bd80      	pop	{r7, pc}
 8027032:	bf00      	nop
 8027034:	080318e4 	.word	0x080318e4
 8027038:	08031ac0 	.word	0x08031ac0
 802703c:	0803192c 	.word	0x0803192c
 8027040:	08031adc 	.word	0x08031adc
 8027044:	08031afc 	.word	0x08031afc
 8027048:	08026d59 	.word	0x08026d59

0802704c <ethernet_input>:
 * @see ETHARP_SUPPORT_VLAN
 * @see LWIP_HOOK_VLAN_CHECK
 */
err_t
ethernet_input(struct pbuf *p, struct netif *netif)
{
 802704c:	b580      	push	{r7, lr}
 802704e:	b086      	sub	sp, #24
 8027050:	af00      	add	r7, sp, #0
 8027052:	6078      	str	r0, [r7, #4]
 8027054:	6039      	str	r1, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t type;
#if LWIP_ARP || ETHARP_SUPPORT_VLAN || LWIP_IPV6
  u16_t next_hdr_offset = SIZEOF_ETH_HDR;
 8027056:	230e      	movs	r3, #14
 8027058:	82fb      	strh	r3, [r7, #22]
#endif /* LWIP_ARP || ETHARP_SUPPORT_VLAN */

  LWIP_ASSERT_CORE_LOCKED();
 802705a:	f7ea f8d3 	bl	8011204 <sys_check_core_locking>

  if (p->len <= SIZEOF_ETH_HDR) {
 802705e:	687b      	ldr	r3, [r7, #4]
 8027060:	895b      	ldrh	r3, [r3, #10]
 8027062:	2b0e      	cmp	r3, #14
 8027064:	d96e      	bls.n	8027144 <ethernet_input+0xf8>
    ETHARP_STATS_INC(etharp.drop);
    MIB2_STATS_NETIF_INC(netif, ifinerrors);
    goto free_and_return;
  }

  if (p->if_idx == NETIF_NO_INDEX) {
 8027066:	687b      	ldr	r3, [r7, #4]
 8027068:	7bdb      	ldrb	r3, [r3, #15]
 802706a:	2b00      	cmp	r3, #0
 802706c:	d106      	bne.n	802707c <ethernet_input+0x30>
    p->if_idx = netif_get_index(netif);
 802706e:	683b      	ldr	r3, [r7, #0]
 8027070:	f893 3034 	ldrb.w	r3, [r3, #52]	@ 0x34
 8027074:	3301      	adds	r3, #1
 8027076:	b2da      	uxtb	r2, r3
 8027078:	687b      	ldr	r3, [r7, #4]
 802707a:	73da      	strb	r2, [r3, #15]
  }

  /* points to packet payload, which starts with an Ethernet header */
  ethhdr = (struct eth_hdr *)p->payload;
 802707c:	687b      	ldr	r3, [r7, #4]
 802707e:	685b      	ldr	r3, [r3, #4]
 8027080:	613b      	str	r3, [r7, #16]
               (unsigned char)ethhdr->dest.addr[3], (unsigned char)ethhdr->dest.addr[4], (unsigned char)ethhdr->dest.addr[5],
               (unsigned char)ethhdr->src.addr[0],  (unsigned char)ethhdr->src.addr[1],  (unsigned char)ethhdr->src.addr[2],
               (unsigned char)ethhdr->src.addr[3],  (unsigned char)ethhdr->src.addr[4],  (unsigned char)ethhdr->src.addr[5],
               lwip_htons(ethhdr->type)));

  type = ethhdr->type;
 8027082:	693b      	ldr	r3, [r7, #16]
 8027084:	7b1a      	ldrb	r2, [r3, #12]
 8027086:	7b5b      	ldrb	r3, [r3, #13]
 8027088:	021b      	lsls	r3, r3, #8
 802708a:	4313      	orrs	r3, r2
 802708c:	81fb      	strh	r3, [r7, #14]

#if LWIP_ARP_FILTER_NETIF
  netif = LWIP_ARP_FILTER_NETIF_FN(p, netif, lwip_htons(type));
#endif /* LWIP_ARP_FILTER_NETIF*/

  if (ethhdr->dest.addr[0] & 1) {
 802708e:	693b      	ldr	r3, [r7, #16]
 8027090:	781b      	ldrb	r3, [r3, #0]
 8027092:	f003 0301 	and.w	r3, r3, #1
 8027096:	2b00      	cmp	r3, #0
 8027098:	d023      	beq.n	80270e2 <ethernet_input+0x96>
    /* this might be a multicast or broadcast packet */
    if (ethhdr->dest.addr[0] == LL_IP4_MULTICAST_ADDR_0) {
 802709a:	693b      	ldr	r3, [r7, #16]
 802709c:	781b      	ldrb	r3, [r3, #0]
 802709e:	2b01      	cmp	r3, #1
 80270a0:	d10f      	bne.n	80270c2 <ethernet_input+0x76>
#if LWIP_IPV4
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 80270a2:	693b      	ldr	r3, [r7, #16]
 80270a4:	785b      	ldrb	r3, [r3, #1]
 80270a6:	2b00      	cmp	r3, #0
 80270a8:	d11b      	bne.n	80270e2 <ethernet_input+0x96>
          (ethhdr->dest.addr[2] == LL_IP4_MULTICAST_ADDR_2)) {
 80270aa:	693b      	ldr	r3, [r7, #16]
 80270ac:	789b      	ldrb	r3, [r3, #2]
      if ((ethhdr->dest.addr[1] == LL_IP4_MULTICAST_ADDR_1) &&
 80270ae:	2b5e      	cmp	r3, #94	@ 0x5e
 80270b0:	d117      	bne.n	80270e2 <ethernet_input+0x96>
        /* mark the pbuf as link-layer multicast */
        p->flags |= PBUF_FLAG_LLMCAST;
 80270b2:	687b      	ldr	r3, [r7, #4]
 80270b4:	7b5b      	ldrb	r3, [r3, #13]
 80270b6:	f043 0310 	orr.w	r3, r3, #16
 80270ba:	b2da      	uxtb	r2, r3
 80270bc:	687b      	ldr	r3, [r7, #4]
 80270be:	735a      	strb	r2, [r3, #13]
 80270c0:	e00f      	b.n	80270e2 <ethernet_input+0x96>
             (ethhdr->dest.addr[1] == LL_IP6_MULTICAST_ADDR_1)) {
      /* mark the pbuf as link-layer multicast */
      p->flags |= PBUF_FLAG_LLMCAST;
    }
#endif /* LWIP_IPV6 */
    else if (eth_addr_cmp(&ethhdr->dest, &ethbroadcast)) {
 80270c2:	693b      	ldr	r3, [r7, #16]
 80270c4:	2206      	movs	r2, #6
 80270c6:	4928      	ldr	r1, [pc, #160]	@ (8027168 <ethernet_input+0x11c>)
 80270c8:	4618      	mov	r0, r3
 80270ca:	f003 fe2f 	bl	802ad2c <memcmp>
 80270ce:	4603      	mov	r3, r0
 80270d0:	2b00      	cmp	r3, #0
 80270d2:	d106      	bne.n	80270e2 <ethernet_input+0x96>
      /* mark the pbuf as link-layer broadcast */
      p->flags |= PBUF_FLAG_LLBCAST;
 80270d4:	687b      	ldr	r3, [r7, #4]
 80270d6:	7b5b      	ldrb	r3, [r3, #13]
 80270d8:	f043 0308 	orr.w	r3, r3, #8
 80270dc:	b2da      	uxtb	r2, r3
 80270de:	687b      	ldr	r3, [r7, #4]
 80270e0:	735a      	strb	r2, [r3, #13]
    }
  }

  switch (type) {
 80270e2:	89fb      	ldrh	r3, [r7, #14]
 80270e4:	2b08      	cmp	r3, #8
 80270e6:	d003      	beq.n	80270f0 <ethernet_input+0xa4>
 80270e8:	f5b3 6fc1 	cmp.w	r3, #1544	@ 0x608
 80270ec:	d014      	beq.n	8027118 <ethernet_input+0xcc>
      }
#endif
      ETHARP_STATS_INC(etharp.proterr);
      ETHARP_STATS_INC(etharp.drop);
      MIB2_STATS_NETIF_INC(netif, ifinunknownprotos);
      goto free_and_return;
 80270ee:	e032      	b.n	8027156 <ethernet_input+0x10a>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 80270f0:	683b      	ldr	r3, [r7, #0]
 80270f2:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 80270f6:	f003 0308 	and.w	r3, r3, #8
 80270fa:	2b00      	cmp	r3, #0
 80270fc:	d024      	beq.n	8027148 <ethernet_input+0xfc>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 80270fe:	8afb      	ldrh	r3, [r7, #22]
 8027100:	4619      	mov	r1, r3
 8027102:	6878      	ldr	r0, [r7, #4]
 8027104:	f7f4 f97a 	bl	801b3fc <pbuf_remove_header>
 8027108:	4603      	mov	r3, r0
 802710a:	2b00      	cmp	r3, #0
 802710c:	d11e      	bne.n	802714c <ethernet_input+0x100>
        ip4_input(p, netif);
 802710e:	6839      	ldr	r1, [r7, #0]
 8027110:	6878      	ldr	r0, [r7, #4]
 8027112:	f7fe fd2f 	bl	8025b74 <ip4_input>
      break;
 8027116:	e013      	b.n	8027140 <ethernet_input+0xf4>
      if (!(netif->flags & NETIF_FLAG_ETHARP)) {
 8027118:	683b      	ldr	r3, [r7, #0]
 802711a:	f893 3031 	ldrb.w	r3, [r3, #49]	@ 0x31
 802711e:	f003 0308 	and.w	r3, r3, #8
 8027122:	2b00      	cmp	r3, #0
 8027124:	d014      	beq.n	8027150 <ethernet_input+0x104>
      if (pbuf_remove_header(p, next_hdr_offset)) {
 8027126:	8afb      	ldrh	r3, [r7, #22]
 8027128:	4619      	mov	r1, r3
 802712a:	6878      	ldr	r0, [r7, #4]
 802712c:	f7f4 f966 	bl	801b3fc <pbuf_remove_header>
 8027130:	4603      	mov	r3, r0
 8027132:	2b00      	cmp	r3, #0
 8027134:	d10e      	bne.n	8027154 <ethernet_input+0x108>
        etharp_input(p, netif);
 8027136:	6839      	ldr	r1, [r7, #0]
 8027138:	6878      	ldr	r0, [r7, #4]
 802713a:	f7fd fe9d 	bl	8024e78 <etharp_input>
      break;
 802713e:	bf00      	nop
  }

  /* This means the pbuf is freed or consumed,
     so the caller doesn't have to free it again */
  return ERR_OK;
 8027140:	2300      	movs	r3, #0
 8027142:	e00c      	b.n	802715e <ethernet_input+0x112>
    goto free_and_return;
 8027144:	bf00      	nop
 8027146:	e006      	b.n	8027156 <ethernet_input+0x10a>
        goto free_and_return;
 8027148:	bf00      	nop
 802714a:	e004      	b.n	8027156 <ethernet_input+0x10a>
        goto free_and_return;
 802714c:	bf00      	nop
 802714e:	e002      	b.n	8027156 <ethernet_input+0x10a>
        goto free_and_return;
 8027150:	bf00      	nop
 8027152:	e000      	b.n	8027156 <ethernet_input+0x10a>
        goto free_and_return;
 8027154:	bf00      	nop

free_and_return:
  pbuf_free(p);
 8027156:	6878      	ldr	r0, [r7, #4]
 8027158:	f7f4 fa08 	bl	801b56c <pbuf_free>
  return ERR_OK;
 802715c:	2300      	movs	r3, #0
}
 802715e:	4618      	mov	r0, r3
 8027160:	3718      	adds	r7, #24
 8027162:	46bd      	mov	sp, r7
 8027164:	bd80      	pop	{r7, pc}
 8027166:	bf00      	nop
 8027168:	08031f00 	.word	0x08031f00

0802716c <ethernet_output>:
 * @return ERR_OK if the packet was sent, any other err_t on failure
 */
err_t
ethernet_output(struct netif * netif, struct pbuf * p,
                const struct eth_addr * src, const struct eth_addr * dst,
                u16_t eth_type) {
 802716c:	b580      	push	{r7, lr}
 802716e:	b086      	sub	sp, #24
 8027170:	af00      	add	r7, sp, #0
 8027172:	60f8      	str	r0, [r7, #12]
 8027174:	60b9      	str	r1, [r7, #8]
 8027176:	607a      	str	r2, [r7, #4]
 8027178:	603b      	str	r3, [r7, #0]
  struct eth_hdr *ethhdr;
  u16_t eth_type_be = lwip_htons(eth_type);
 802717a:	8c3b      	ldrh	r3, [r7, #32]
 802717c:	4618      	mov	r0, r3
 802717e:	f7f2 fd13 	bl	8019ba8 <lwip_htons>
 8027182:	4603      	mov	r3, r0
 8027184:	82fb      	strh	r3, [r7, #22]

    eth_type_be = PP_HTONS(ETHTYPE_VLAN);
  } else
#endif /* ETHARP_SUPPORT_VLAN && defined(LWIP_HOOK_VLAN_SET) */
  {
    if (pbuf_add_header(p, SIZEOF_ETH_HDR) != 0) {
 8027186:	210e      	movs	r1, #14
 8027188:	68b8      	ldr	r0, [r7, #8]
 802718a:	f7f4 f927 	bl	801b3dc <pbuf_add_header>
 802718e:	4603      	mov	r3, r0
 8027190:	2b00      	cmp	r3, #0
 8027192:	d127      	bne.n	80271e4 <ethernet_output+0x78>
      goto pbuf_header_failed;
    }
  }

  LWIP_ASSERT_CORE_LOCKED();
 8027194:	f7ea f836 	bl	8011204 <sys_check_core_locking>

  ethhdr = (struct eth_hdr *)p->payload;
 8027198:	68bb      	ldr	r3, [r7, #8]
 802719a:	685b      	ldr	r3, [r3, #4]
 802719c:	613b      	str	r3, [r7, #16]
  ethhdr->type = eth_type_be;
 802719e:	693b      	ldr	r3, [r7, #16]
 80271a0:	8afa      	ldrh	r2, [r7, #22]
 80271a2:	819a      	strh	r2, [r3, #12]
  SMEMCPY(&ethhdr->dest, dst, ETH_HWADDR_LEN);
 80271a4:	693b      	ldr	r3, [r7, #16]
 80271a6:	2206      	movs	r2, #6
 80271a8:	6839      	ldr	r1, [r7, #0]
 80271aa:	4618      	mov	r0, r3
 80271ac:	f003 fedf 	bl	802af6e <memcpy>
  SMEMCPY(&ethhdr->src,  src, ETH_HWADDR_LEN);
 80271b0:	693b      	ldr	r3, [r7, #16]
 80271b2:	3306      	adds	r3, #6
 80271b4:	2206      	movs	r2, #6
 80271b6:	6879      	ldr	r1, [r7, #4]
 80271b8:	4618      	mov	r0, r3
 80271ba:	f003 fed8 	bl	802af6e <memcpy>

  LWIP_ASSERT("netif->hwaddr_len must be 6 for ethernet_output!",
 80271be:	68fb      	ldr	r3, [r7, #12]
 80271c0:	f893 3030 	ldrb.w	r3, [r3, #48]	@ 0x30
 80271c4:	2b06      	cmp	r3, #6
 80271c6:	d006      	beq.n	80271d6 <ethernet_output+0x6a>
 80271c8:	4b0a      	ldr	r3, [pc, #40]	@ (80271f4 <ethernet_output+0x88>)
 80271ca:	f44f 7299 	mov.w	r2, #306	@ 0x132
 80271ce:	490a      	ldr	r1, [pc, #40]	@ (80271f8 <ethernet_output+0x8c>)
 80271d0:	480a      	ldr	r0, [pc, #40]	@ (80271fc <ethernet_output+0x90>)
 80271d2:	f003 fc43 	bl	802aa5c <iprintf>
              (netif->hwaddr_len == ETH_HWADDR_LEN));
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE,
              ("ethernet_output: sending packet %p\n", (void *)p));

  /* send the packet */
  return netif->linkoutput(netif, p);
 80271d6:	68fb      	ldr	r3, [r7, #12]
 80271d8:	699b      	ldr	r3, [r3, #24]
 80271da:	68b9      	ldr	r1, [r7, #8]
 80271dc:	68f8      	ldr	r0, [r7, #12]
 80271de:	4798      	blx	r3
 80271e0:	4603      	mov	r3, r0
 80271e2:	e002      	b.n	80271ea <ethernet_output+0x7e>
      goto pbuf_header_failed;
 80271e4:	bf00      	nop

pbuf_header_failed:
  LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS,
              ("ethernet_output: could not allocate room for header.\n"));
  LINK_STATS_INC(link.lenerr);
  return ERR_BUF;
 80271e6:	f06f 0301 	mvn.w	r3, #1
}
 80271ea:	4618      	mov	r0, r3
 80271ec:	3718      	adds	r7, #24
 80271ee:	46bd      	mov	sp, r7
 80271f0:	bd80      	pop	{r7, pc}
 80271f2:	bf00      	nop
 80271f4:	08031b0c 	.word	0x08031b0c
 80271f8:	08031b44 	.word	0x08031b44
 80271fc:	08031b78 	.word	0x08031b78

08027200 <sys_mbox_new>:
#endif

/*-----------------------------------------------------------------------------------*/
//  Creates an empty mailbox.
err_t sys_mbox_new(sys_mbox_t *mbox, int size)
{
 8027200:	b580      	push	{r7, lr}
 8027202:	b082      	sub	sp, #8
 8027204:	af00      	add	r7, sp, #0
 8027206:	6078      	str	r0, [r7, #4]
 8027208:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  osMessageQDef(QUEUE, size, void *);
  *mbox = osMessageCreate(osMessageQ(QUEUE), NULL);
#else
  *mbox = osMessageQueueNew(size, sizeof(void *), NULL);
 802720a:	683b      	ldr	r3, [r7, #0]
 802720c:	2200      	movs	r2, #0
 802720e:	2104      	movs	r1, #4
 8027210:	4618      	mov	r0, r3
 8027212:	f7ea fd83 	bl	8011d1c <osMessageQueueNew>
 8027216:	4602      	mov	r2, r0
 8027218:	687b      	ldr	r3, [r7, #4]
 802721a:	601a      	str	r2, [r3, #0]
  if(lwip_stats.sys.mbox.max < lwip_stats.sys.mbox.used)
  {
    lwip_stats.sys.mbox.max = lwip_stats.sys.mbox.used;
  }
#endif /* SYS_STATS */
  if(*mbox == NULL)
 802721c:	687b      	ldr	r3, [r7, #4]
 802721e:	681b      	ldr	r3, [r3, #0]
 8027220:	2b00      	cmp	r3, #0
 8027222:	d102      	bne.n	802722a <sys_mbox_new+0x2a>
    return ERR_MEM;
 8027224:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027228:	e000      	b.n	802722c <sys_mbox_new+0x2c>

  return ERR_OK;
 802722a:	2300      	movs	r3, #0
}
 802722c:	4618      	mov	r0, r3
 802722e:	3708      	adds	r7, #8
 8027230:	46bd      	mov	sp, r7
 8027232:	bd80      	pop	{r7, pc}

08027234 <sys_mbox_free>:
  Deallocates a mailbox. If there are messages still present in the
  mailbox when the mailbox is deallocated, it is an indication of a
  programming error in lwIP and the developer should be notified.
*/
void sys_mbox_free(sys_mbox_t *mbox)
{
 8027234:	b580      	push	{r7, lr}
 8027236:	b082      	sub	sp, #8
 8027238:	af00      	add	r7, sp, #0
 802723a:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  if(osMessageWaiting(*mbox))
#else
  if(osMessageQueueGetCount(*mbox))
 802723c:	687b      	ldr	r3, [r7, #4]
 802723e:	681b      	ldr	r3, [r3, #0]
 8027240:	4618      	mov	r0, r3
 8027242:	f7ea fe9d 	bl	8011f80 <osMessageQueueGetCount>

  }
#if (osCMSIS < 0x20000U)
  osMessageDelete(*mbox);
#else
  osMessageQueueDelete(*mbox);
 8027246:	687b      	ldr	r3, [r7, #4]
 8027248:	681b      	ldr	r3, [r3, #0]
 802724a:	4618      	mov	r0, r3
 802724c:	f7ea feb8 	bl	8011fc0 <osMessageQueueDelete>
#endif
#if SYS_STATS
  --lwip_stats.sys.mbox.used;
#endif /* SYS_STATS */
}
 8027250:	bf00      	nop
 8027252:	3708      	adds	r7, #8
 8027254:	46bd      	mov	sp, r7
 8027256:	bd80      	pop	{r7, pc}

08027258 <sys_mbox_trypost>:


/*-----------------------------------------------------------------------------------*/
//   Try to post the "msg" to the mailbox.
err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg)
{
 8027258:	b580      	push	{r7, lr}
 802725a:	b084      	sub	sp, #16
 802725c:	af00      	add	r7, sp, #0
 802725e:	6078      	str	r0, [r7, #4]
 8027260:	6039      	str	r1, [r7, #0]
  err_t result;
#if (osCMSIS < 0x20000U)
  if(osMessagePut(*mbox, (uint32_t)msg, 0) == osOK)
#else
  if(osMessageQueuePut(*mbox, &msg, 0, 0) == osOK)
 8027262:	687b      	ldr	r3, [r7, #4]
 8027264:	6818      	ldr	r0, [r3, #0]
 8027266:	4639      	mov	r1, r7
 8027268:	2300      	movs	r3, #0
 802726a:	2200      	movs	r2, #0
 802726c:	f7ea fdca 	bl	8011e04 <osMessageQueuePut>
 8027270:	4603      	mov	r3, r0
 8027272:	2b00      	cmp	r3, #0
 8027274:	d102      	bne.n	802727c <sys_mbox_trypost+0x24>
#endif
  {
    result = ERR_OK;
 8027276:	2300      	movs	r3, #0
 8027278:	73fb      	strb	r3, [r7, #15]
 802727a:	e001      	b.n	8027280 <sys_mbox_trypost+0x28>
  }
  else
  {
    // could not post, queue must be full
    result = ERR_MEM;
 802727c:	23ff      	movs	r3, #255	@ 0xff
 802727e:	73fb      	strb	r3, [r7, #15]
#if SYS_STATS
    lwip_stats.sys.mbox.err++;
#endif /* SYS_STATS */
  }

  return result;
 8027280:	f997 300f 	ldrsb.w	r3, [r7, #15]
}
 8027284:	4618      	mov	r0, r3
 8027286:	3710      	adds	r7, #16
 8027288:	46bd      	mov	sp, r7
 802728a:	bd80      	pop	{r7, pc}

0802728c <sys_arch_mbox_fetch>:

  Note that a function with a similar name, sys_mbox_fetch(), is
  implemented by lwIP.
*/
u32_t sys_arch_mbox_fetch(sys_mbox_t *mbox, void **msg, u32_t timeout)
{
 802728c:	b580      	push	{r7, lr}
 802728e:	b086      	sub	sp, #24
 8027290:	af00      	add	r7, sp, #0
 8027292:	60f8      	str	r0, [r7, #12]
 8027294:	60b9      	str	r1, [r7, #8]
 8027296:	607a      	str	r2, [r7, #4]
#if (osCMSIS < 0x20000U)
  osEvent event;
  uint32_t starttime = osKernelSysTick();
#else
  osStatus_t status;
  uint32_t starttime = osKernelGetTickCount();
 8027298:	f7ea f92a 	bl	80114f0 <osKernelGetTickCount>
 802729c:	6178      	str	r0, [r7, #20]
#endif
  if(timeout != 0)
 802729e:	687b      	ldr	r3, [r7, #4]
 80272a0:	2b00      	cmp	r3, #0
 80272a2:	d013      	beq.n	80272cc <sys_arch_mbox_fetch+0x40>
    {
      *msg = (void *)event.value.v;
      return (osKernelSysTick() - starttime);
    }
#else
    status = osMessageQueueGet(*mbox, msg, 0, timeout);
 80272a4:	68fb      	ldr	r3, [r7, #12]
 80272a6:	6818      	ldr	r0, [r3, #0]
 80272a8:	687b      	ldr	r3, [r7, #4]
 80272aa:	2200      	movs	r2, #0
 80272ac:	68b9      	ldr	r1, [r7, #8]
 80272ae:	f7ea fe09 	bl	8011ec4 <osMessageQueueGet>
 80272b2:	6138      	str	r0, [r7, #16]
    if (status == osOK)
 80272b4:	693b      	ldr	r3, [r7, #16]
 80272b6:	2b00      	cmp	r3, #0
 80272b8:	d105      	bne.n	80272c6 <sys_arch_mbox_fetch+0x3a>
    {
      return (osKernelGetTickCount() - starttime);
 80272ba:	f7ea f919 	bl	80114f0 <osKernelGetTickCount>
 80272be:	4602      	mov	r2, r0
 80272c0:	697b      	ldr	r3, [r7, #20]
 80272c2:	1ad3      	subs	r3, r2, r3
 80272c4:	e00f      	b.n	80272e6 <sys_arch_mbox_fetch+0x5a>
    }
#endif
    else
    {
      return SYS_ARCH_TIMEOUT;
 80272c6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80272ca:	e00c      	b.n	80272e6 <sys_arch_mbox_fetch+0x5a>
#if (osCMSIS < 0x20000U)
    event = osMessageGet (*mbox, osWaitForever);
    *msg = (void *)event.value.v;
    return (osKernelSysTick() - starttime);
#else
    osMessageQueueGet(*mbox, msg, 0, osWaitForever );
 80272cc:	68fb      	ldr	r3, [r7, #12]
 80272ce:	6818      	ldr	r0, [r3, #0]
 80272d0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80272d4:	2200      	movs	r2, #0
 80272d6:	68b9      	ldr	r1, [r7, #8]
 80272d8:	f7ea fdf4 	bl	8011ec4 <osMessageQueueGet>
    return (osKernelGetTickCount() - starttime);
 80272dc:	f7ea f908 	bl	80114f0 <osKernelGetTickCount>
 80272e0:	4602      	mov	r2, r0
 80272e2:	697b      	ldr	r3, [r7, #20]
 80272e4:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 80272e6:	4618      	mov	r0, r3
 80272e8:	3718      	adds	r7, #24
 80272ea:	46bd      	mov	sp, r7
 80272ec:	bd80      	pop	{r7, pc}

080272ee <sys_arch_mbox_tryfetch>:
/*
  Similar to sys_arch_mbox_fetch, but if message is not ready immediately, we'll
  return with SYS_MBOX_EMPTY.  On success, 0 is returned.
*/
u32_t sys_arch_mbox_tryfetch(sys_mbox_t *mbox, void **msg)
{
 80272ee:	b580      	push	{r7, lr}
 80272f0:	b082      	sub	sp, #8
 80272f2:	af00      	add	r7, sp, #0
 80272f4:	6078      	str	r0, [r7, #4]
 80272f6:	6039      	str	r1, [r7, #0]

  if(event.status == osEventMessage)
  {
    *msg = (void *)event.value.v;
#else
  if (osMessageQueueGet(*mbox, msg, 0, 0) == osOK)
 80272f8:	687b      	ldr	r3, [r7, #4]
 80272fa:	6818      	ldr	r0, [r3, #0]
 80272fc:	2300      	movs	r3, #0
 80272fe:	2200      	movs	r2, #0
 8027300:	6839      	ldr	r1, [r7, #0]
 8027302:	f7ea fddf 	bl	8011ec4 <osMessageQueueGet>
 8027306:	4603      	mov	r3, r0
 8027308:	2b00      	cmp	r3, #0
 802730a:	d101      	bne.n	8027310 <sys_arch_mbox_tryfetch+0x22>
  {
#endif
    return ERR_OK;
 802730c:	2300      	movs	r3, #0
 802730e:	e001      	b.n	8027314 <sys_arch_mbox_tryfetch+0x26>
  }
  else
  {
    return SYS_MBOX_EMPTY;
 8027310:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
  }
}
 8027314:	4618      	mov	r0, r3
 8027316:	3708      	adds	r7, #8
 8027318:	46bd      	mov	sp, r7
 802731a:	bd80      	pop	{r7, pc}

0802731c <sys_mbox_valid>:
/*----------------------------------------------------------------------------------*/
int sys_mbox_valid(sys_mbox_t *mbox)
{
 802731c:	b480      	push	{r7}
 802731e:	b083      	sub	sp, #12
 8027320:	af00      	add	r7, sp, #0
 8027322:	6078      	str	r0, [r7, #4]
  if (*mbox == SYS_MBOX_NULL)
 8027324:	687b      	ldr	r3, [r7, #4]
 8027326:	681b      	ldr	r3, [r3, #0]
 8027328:	2b00      	cmp	r3, #0
 802732a:	d101      	bne.n	8027330 <sys_mbox_valid+0x14>
    return 0;
 802732c:	2300      	movs	r3, #0
 802732e:	e000      	b.n	8027332 <sys_mbox_valid+0x16>
  else
    return 1;
 8027330:	2301      	movs	r3, #1
}
 8027332:	4618      	mov	r0, r3
 8027334:	370c      	adds	r7, #12
 8027336:	46bd      	mov	sp, r7
 8027338:	f85d 7b04 	ldr.w	r7, [sp], #4
 802733c:	4770      	bx	lr

0802733e <sys_mbox_set_invalid>:
/*-----------------------------------------------------------------------------------*/
void sys_mbox_set_invalid(sys_mbox_t *mbox)
{
 802733e:	b480      	push	{r7}
 8027340:	b083      	sub	sp, #12
 8027342:	af00      	add	r7, sp, #0
 8027344:	6078      	str	r0, [r7, #4]
  *mbox = SYS_MBOX_NULL;
 8027346:	687b      	ldr	r3, [r7, #4]
 8027348:	2200      	movs	r2, #0
 802734a:	601a      	str	r2, [r3, #0]
}
 802734c:	bf00      	nop
 802734e:	370c      	adds	r7, #12
 8027350:	46bd      	mov	sp, r7
 8027352:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027356:	4770      	bx	lr

08027358 <sys_sem_new>:

/*-----------------------------------------------------------------------------------*/
//  Creates a new semaphore. The "count" argument specifies
//  the initial state of the semaphore.
err_t sys_sem_new(sys_sem_t *sem, u8_t count)
{
 8027358:	b580      	push	{r7, lr}
 802735a:	b082      	sub	sp, #8
 802735c:	af00      	add	r7, sp, #0
 802735e:	6078      	str	r0, [r7, #4]
 8027360:	460b      	mov	r3, r1
 8027362:	70fb      	strb	r3, [r7, #3]
#if (osCMSIS < 0x20000U)
  osSemaphoreDef(SEM);
  *sem = osSemaphoreCreate (osSemaphore(SEM), 1);
#else
  *sem = osSemaphoreNew(UINT16_MAX, count, NULL);
 8027364:	78fb      	ldrb	r3, [r7, #3]
 8027366:	2200      	movs	r2, #0
 8027368:	4619      	mov	r1, r3
 802736a:	f64f 70ff 	movw	r0, #65535	@ 0xffff
 802736e:	f7ea fb92 	bl	8011a96 <osSemaphoreNew>
 8027372:	4602      	mov	r2, r0
 8027374:	687b      	ldr	r3, [r7, #4]
 8027376:	601a      	str	r2, [r3, #0]
#endif

  if(*sem == NULL)
 8027378:	687b      	ldr	r3, [r7, #4]
 802737a:	681b      	ldr	r3, [r3, #0]
 802737c:	2b00      	cmp	r3, #0
 802737e:	d102      	bne.n	8027386 <sys_sem_new+0x2e>
  {
#if SYS_STATS
    ++lwip_stats.sys.sem.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 8027380:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027384:	e009      	b.n	802739a <sys_sem_new+0x42>
  }

  if(count == 0)	// Means it can't be taken
 8027386:	78fb      	ldrb	r3, [r7, #3]
 8027388:	2b00      	cmp	r3, #0
 802738a:	d105      	bne.n	8027398 <sys_sem_new+0x40>
  {
#if (osCMSIS < 0x20000U)
    osSemaphoreWait(*sem, 0);
#else
    osSemaphoreAcquire(*sem, 0);
 802738c:	687b      	ldr	r3, [r7, #4]
 802738e:	681b      	ldr	r3, [r3, #0]
 8027390:	2100      	movs	r1, #0
 8027392:	4618      	mov	r0, r3
 8027394:	f7ea fc08 	bl	8011ba8 <osSemaphoreAcquire>
  if (lwip_stats.sys.sem.max < lwip_stats.sys.sem.used) {
    lwip_stats.sys.sem.max = lwip_stats.sys.sem.used;
  }
#endif /* SYS_STATS */

  return ERR_OK;
 8027398:	2300      	movs	r3, #0
}
 802739a:	4618      	mov	r0, r3
 802739c:	3708      	adds	r7, #8
 802739e:	46bd      	mov	sp, r7
 80273a0:	bd80      	pop	{r7, pc}

080273a2 <sys_arch_sem_wait>:

  Notice that lwIP implements a function with a similar name,
  sys_sem_wait(), that uses the sys_arch_sem_wait() function.
*/
u32_t sys_arch_sem_wait(sys_sem_t *sem, u32_t timeout)
{
 80273a2:	b580      	push	{r7, lr}
 80273a4:	b084      	sub	sp, #16
 80273a6:	af00      	add	r7, sp, #0
 80273a8:	6078      	str	r0, [r7, #4]
 80273aa:	6039      	str	r1, [r7, #0]
#if (osCMSIS < 0x20000U)
  uint32_t starttime = osKernelSysTick();
#else
  uint32_t starttime = osKernelGetTickCount();
 80273ac:	f7ea f8a0 	bl	80114f0 <osKernelGetTickCount>
 80273b0:	60f8      	str	r0, [r7, #12]
#endif
  if(timeout != 0)
 80273b2:	683b      	ldr	r3, [r7, #0]
 80273b4:	2b00      	cmp	r3, #0
 80273b6:	d011      	beq.n	80273dc <sys_arch_sem_wait+0x3a>
#if (osCMSIS < 0x20000U)
    if(osSemaphoreWait (*sem, timeout) == osOK)
    {
      return (osKernelSysTick() - starttime);
#else
    if(osSemaphoreAcquire(*sem, timeout) == osOK)
 80273b8:	687b      	ldr	r3, [r7, #4]
 80273ba:	681b      	ldr	r3, [r3, #0]
 80273bc:	6839      	ldr	r1, [r7, #0]
 80273be:	4618      	mov	r0, r3
 80273c0:	f7ea fbf2 	bl	8011ba8 <osSemaphoreAcquire>
 80273c4:	4603      	mov	r3, r0
 80273c6:	2b00      	cmp	r3, #0
 80273c8:	d105      	bne.n	80273d6 <sys_arch_sem_wait+0x34>
    {
        return (osKernelGetTickCount() - starttime);
 80273ca:	f7ea f891 	bl	80114f0 <osKernelGetTickCount>
 80273ce:	4602      	mov	r2, r0
 80273d0:	68fb      	ldr	r3, [r7, #12]
 80273d2:	1ad3      	subs	r3, r2, r3
 80273d4:	e012      	b.n	80273fc <sys_arch_sem_wait+0x5a>
#endif
    }
    else
    {
      return SYS_ARCH_TIMEOUT;
 80273d6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80273da:	e00f      	b.n	80273fc <sys_arch_sem_wait+0x5a>
  {
#if (osCMSIS < 0x20000U)
    while(osSemaphoreWait (*sem, osWaitForever) != osOK);
    return (osKernelSysTick() - starttime);
#else
    while(osSemaphoreAcquire(*sem, osWaitForever) != osOK);
 80273dc:	bf00      	nop
 80273de:	687b      	ldr	r3, [r7, #4]
 80273e0:	681b      	ldr	r3, [r3, #0]
 80273e2:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80273e6:	4618      	mov	r0, r3
 80273e8:	f7ea fbde 	bl	8011ba8 <osSemaphoreAcquire>
 80273ec:	4603      	mov	r3, r0
 80273ee:	2b00      	cmp	r3, #0
 80273f0:	d1f5      	bne.n	80273de <sys_arch_sem_wait+0x3c>
    return (osKernelGetTickCount() - starttime);
 80273f2:	f7ea f87d 	bl	80114f0 <osKernelGetTickCount>
 80273f6:	4602      	mov	r2, r0
 80273f8:	68fb      	ldr	r3, [r7, #12]
 80273fa:	1ad3      	subs	r3, r2, r3
#endif
  }
}
 80273fc:	4618      	mov	r0, r3
 80273fe:	3710      	adds	r7, #16
 8027400:	46bd      	mov	sp, r7
 8027402:	bd80      	pop	{r7, pc}

08027404 <sys_sem_signal>:

/*-----------------------------------------------------------------------------------*/
// Signals a semaphore
void sys_sem_signal(sys_sem_t *sem)
{
 8027404:	b580      	push	{r7, lr}
 8027406:	b082      	sub	sp, #8
 8027408:	af00      	add	r7, sp, #0
 802740a:	6078      	str	r0, [r7, #4]
  osSemaphoreRelease(*sem);
 802740c:	687b      	ldr	r3, [r7, #4]
 802740e:	681b      	ldr	r3, [r3, #0]
 8027410:	4618      	mov	r0, r3
 8027412:	f7ea fc1b 	bl	8011c4c <osSemaphoreRelease>
}
 8027416:	bf00      	nop
 8027418:	3708      	adds	r7, #8
 802741a:	46bd      	mov	sp, r7
 802741c:	bd80      	pop	{r7, pc}

0802741e <sys_sem_free>:

/*-----------------------------------------------------------------------------------*/
// Deallocates a semaphore
void sys_sem_free(sys_sem_t *sem)
{
 802741e:	b580      	push	{r7, lr}
 8027420:	b082      	sub	sp, #8
 8027422:	af00      	add	r7, sp, #0
 8027424:	6078      	str	r0, [r7, #4]
#if SYS_STATS
  --lwip_stats.sys.sem.used;
#endif /* SYS_STATS */

  osSemaphoreDelete(*sem);
 8027426:	687b      	ldr	r3, [r7, #4]
 8027428:	681b      	ldr	r3, [r3, #0]
 802742a:	4618      	mov	r0, r3
 802742c:	f7ea fc52 	bl	8011cd4 <osSemaphoreDelete>
}
 8027430:	bf00      	nop
 8027432:	3708      	adds	r7, #8
 8027434:	46bd      	mov	sp, r7
 8027436:	bd80      	pop	{r7, pc}

08027438 <sys_sem_valid>:
/*-----------------------------------------------------------------------------------*/
int sys_sem_valid(sys_sem_t *sem)
{
 8027438:	b480      	push	{r7}
 802743a:	b083      	sub	sp, #12
 802743c:	af00      	add	r7, sp, #0
 802743e:	6078      	str	r0, [r7, #4]
  if (*sem == SYS_SEM_NULL)
 8027440:	687b      	ldr	r3, [r7, #4]
 8027442:	681b      	ldr	r3, [r3, #0]
 8027444:	2b00      	cmp	r3, #0
 8027446:	d101      	bne.n	802744c <sys_sem_valid+0x14>
    return 0;
 8027448:	2300      	movs	r3, #0
 802744a:	e000      	b.n	802744e <sys_sem_valid+0x16>
  else
    return 1;
 802744c:	2301      	movs	r3, #1
}
 802744e:	4618      	mov	r0, r3
 8027450:	370c      	adds	r7, #12
 8027452:	46bd      	mov	sp, r7
 8027454:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027458:	4770      	bx	lr

0802745a <sys_sem_set_invalid>:

/*-----------------------------------------------------------------------------------*/
void sys_sem_set_invalid(sys_sem_t *sem)
{
 802745a:	b480      	push	{r7}
 802745c:	b083      	sub	sp, #12
 802745e:	af00      	add	r7, sp, #0
 8027460:	6078      	str	r0, [r7, #4]
  *sem = SYS_SEM_NULL;
 8027462:	687b      	ldr	r3, [r7, #4]
 8027464:	2200      	movs	r2, #0
 8027466:	601a      	str	r2, [r3, #0]
}
 8027468:	bf00      	nop
 802746a:	370c      	adds	r7, #12
 802746c:	46bd      	mov	sp, r7
 802746e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027472:	4770      	bx	lr

08027474 <sys_init>:
#else
osMutexId_t lwip_sys_mutex;
#endif
// Initialize sys arch
void sys_init(void)
{
 8027474:	b580      	push	{r7, lr}
 8027476:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  lwip_sys_mutex = osMutexCreate(osMutex(lwip_sys_mutex));
#else
  lwip_sys_mutex = osMutexNew(NULL);
 8027478:	2000      	movs	r0, #0
 802747a:	f7ea f9fe 	bl	801187a <osMutexNew>
 802747e:	4603      	mov	r3, r0
 8027480:	4a01      	ldr	r2, [pc, #4]	@ (8027488 <sys_init+0x14>)
 8027482:	6013      	str	r3, [r2, #0]
#endif
}
 8027484:	bf00      	nop
 8027486:	bd80      	pop	{r7, pc}
 8027488:	2402b14c 	.word	0x2402b14c

0802748c <sys_mutex_new>:
                                      /* Mutexes*/
/*-----------------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------*/
#if LWIP_COMPAT_MUTEX == 0
/* Create a new mutex*/
err_t sys_mutex_new(sys_mutex_t *mutex) {
 802748c:	b580      	push	{r7, lr}
 802748e:	b082      	sub	sp, #8
 8027490:	af00      	add	r7, sp, #0
 8027492:	6078      	str	r0, [r7, #4]

#if (osCMSIS < 0x20000U)
  osMutexDef(MUTEX);
  *mutex = osMutexCreate(osMutex(MUTEX));
#else
  *mutex = osMutexNew(NULL);
 8027494:	2000      	movs	r0, #0
 8027496:	f7ea f9f0 	bl	801187a <osMutexNew>
 802749a:	4602      	mov	r2, r0
 802749c:	687b      	ldr	r3, [r7, #4]
 802749e:	601a      	str	r2, [r3, #0]
#endif

  if(*mutex == NULL)
 80274a0:	687b      	ldr	r3, [r7, #4]
 80274a2:	681b      	ldr	r3, [r3, #0]
 80274a4:	2b00      	cmp	r3, #0
 80274a6:	d102      	bne.n	80274ae <sys_mutex_new+0x22>
  {
#if SYS_STATS
    ++lwip_stats.sys.mutex.err;
#endif /* SYS_STATS */
    return ERR_MEM;
 80274a8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80274ac:	e000      	b.n	80274b0 <sys_mutex_new+0x24>
  ++lwip_stats.sys.mutex.used;
  if (lwip_stats.sys.mutex.max < lwip_stats.sys.mutex.used) {
    lwip_stats.sys.mutex.max = lwip_stats.sys.mutex.used;
  }
#endif /* SYS_STATS */
  return ERR_OK;
 80274ae:	2300      	movs	r3, #0
}
 80274b0:	4618      	mov	r0, r3
 80274b2:	3708      	adds	r7, #8
 80274b4:	46bd      	mov	sp, r7
 80274b6:	bd80      	pop	{r7, pc}

080274b8 <sys_mutex_lock>:
  osMutexDelete(*mutex);
}
/*-----------------------------------------------------------------------------------*/
/* Lock a mutex*/
void sys_mutex_lock(sys_mutex_t *mutex)
{
 80274b8:	b580      	push	{r7, lr}
 80274ba:	b082      	sub	sp, #8
 80274bc:	af00      	add	r7, sp, #0
 80274be:	6078      	str	r0, [r7, #4]
#if (osCMSIS < 0x20000U)
  osMutexWait(*mutex, osWaitForever);
#else
  osMutexAcquire(*mutex, osWaitForever);
 80274c0:	687b      	ldr	r3, [r7, #4]
 80274c2:	681b      	ldr	r3, [r3, #0]
 80274c4:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 80274c8:	4618      	mov	r0, r3
 80274ca:	f7ea fa5c 	bl	8011986 <osMutexAcquire>
#endif
}
 80274ce:	bf00      	nop
 80274d0:	3708      	adds	r7, #8
 80274d2:	46bd      	mov	sp, r7
 80274d4:	bd80      	pop	{r7, pc}

080274d6 <sys_mutex_unlock>:

/*-----------------------------------------------------------------------------------*/
/* Unlock a mutex*/
void sys_mutex_unlock(sys_mutex_t *mutex)
{
 80274d6:	b580      	push	{r7, lr}
 80274d8:	b082      	sub	sp, #8
 80274da:	af00      	add	r7, sp, #0
 80274dc:	6078      	str	r0, [r7, #4]
  osMutexRelease(*mutex);
 80274de:	687b      	ldr	r3, [r7, #4]
 80274e0:	681b      	ldr	r3, [r3, #0]
 80274e2:	4618      	mov	r0, r3
 80274e4:	f7ea fa9a 	bl	8011a1c <osMutexRelease>
}
 80274e8:	bf00      	nop
 80274ea:	3708      	adds	r7, #8
 80274ec:	46bd      	mov	sp, r7
 80274ee:	bd80      	pop	{r7, pc}

080274f0 <sys_thread_new>:
  function "thread()". The "arg" argument will be passed as an argument to the
  thread() function. The id of the new thread is returned. Both the id and
  the priority are system dependent.
*/
sys_thread_t sys_thread_new(const char *name, lwip_thread_fn thread , void *arg, int stacksize, int prio)
{
 80274f0:	b580      	push	{r7, lr}
 80274f2:	b08e      	sub	sp, #56	@ 0x38
 80274f4:	af00      	add	r7, sp, #0
 80274f6:	60f8      	str	r0, [r7, #12]
 80274f8:	60b9      	str	r1, [r7, #8]
 80274fa:	607a      	str	r2, [r7, #4]
 80274fc:	603b      	str	r3, [r7, #0]
#if (osCMSIS < 0x20000U)
  const osThreadDef_t os_thread_def = { (char *)name, (os_pthread)thread, (osPriority)prio, 0, stacksize};
  return osThreadCreate(&os_thread_def, arg);
#else
  const osThreadAttr_t attributes = {
 80274fe:	f107 0314 	add.w	r3, r7, #20
 8027502:	2224      	movs	r2, #36	@ 0x24
 8027504:	2100      	movs	r1, #0
 8027506:	4618      	mov	r0, r3
 8027508:	f003 fc3a 	bl	802ad80 <memset>
 802750c:	68fb      	ldr	r3, [r7, #12]
 802750e:	617b      	str	r3, [r7, #20]
 8027510:	683b      	ldr	r3, [r7, #0]
 8027512:	62bb      	str	r3, [r7, #40]	@ 0x28
 8027514:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8027516:	62fb      	str	r3, [r7, #44]	@ 0x2c
                        .name = name,
                        .stack_size = stacksize,
                        .priority = (osPriority_t)prio,
                      };
  return osThreadNew(thread, arg, &attributes);
 8027518:	f107 0314 	add.w	r3, r7, #20
 802751c:	461a      	mov	r2, r3
 802751e:	6879      	ldr	r1, [r7, #4]
 8027520:	68b8      	ldr	r0, [r7, #8]
 8027522:	f7e9 fffa 	bl	801151a <osThreadNew>
 8027526:	4603      	mov	r3, r0
#endif
}
 8027528:	4618      	mov	r0, r3
 802752a:	3738      	adds	r7, #56	@ 0x38
 802752c:	46bd      	mov	sp, r7
 802752e:	bd80      	pop	{r7, pc}

08027530 <sys_arch_protect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
sys_prot_t sys_arch_protect(void)
{
 8027530:	b580      	push	{r7, lr}
 8027532:	af00      	add	r7, sp, #0
#if (osCMSIS < 0x20000U)
  osMutexWait(lwip_sys_mutex, osWaitForever);
#else
  osMutexAcquire(lwip_sys_mutex, osWaitForever);
 8027534:	4b04      	ldr	r3, [pc, #16]	@ (8027548 <sys_arch_protect+0x18>)
 8027536:	681b      	ldr	r3, [r3, #0]
 8027538:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 802753c:	4618      	mov	r0, r3
 802753e:	f7ea fa22 	bl	8011986 <osMutexAcquire>
#endif
  return (sys_prot_t)1;
 8027542:	2301      	movs	r3, #1
}
 8027544:	4618      	mov	r0, r3
 8027546:	bd80      	pop	{r7, pc}
 8027548:	2402b14c 	.word	0x2402b14c

0802754c <sys_arch_unprotect>:

  Note: This function is based on FreeRTOS API, because no equivalent CMSIS-RTOS
        API is available
*/
void sys_arch_unprotect(sys_prot_t pval)
{
 802754c:	b580      	push	{r7, lr}
 802754e:	b082      	sub	sp, #8
 8027550:	af00      	add	r7, sp, #0
 8027552:	6078      	str	r0, [r7, #4]
  ( void ) pval;
  osMutexRelease(lwip_sys_mutex);
 8027554:	4b04      	ldr	r3, [pc, #16]	@ (8027568 <sys_arch_unprotect+0x1c>)
 8027556:	681b      	ldr	r3, [r3, #0]
 8027558:	4618      	mov	r0, r3
 802755a:	f7ea fa5f 	bl	8011a1c <osMutexRelease>
}
 802755e:	bf00      	nop
 8027560:	3708      	adds	r7, #8
 8027562:	46bd      	mov	sp, r7
 8027564:	bd80      	pop	{r7, pc}
 8027566:	bf00      	nop
 8027568:	2402b14c 	.word	0x2402b14c

0802756c <NewMessageData>:
#include <string.h>
//#include "cmsis_os.h"

osMutexId_t mqttMutex;

static void NewMessageData(MessageData* md, MQTTString* aTopicName, MQTTMessage* aMessage) {
 802756c:	b480      	push	{r7}
 802756e:	b085      	sub	sp, #20
 8027570:	af00      	add	r7, sp, #0
 8027572:	60f8      	str	r0, [r7, #12]
 8027574:	60b9      	str	r1, [r7, #8]
 8027576:	607a      	str	r2, [r7, #4]
    md->topicName = aTopicName;
 8027578:	68fb      	ldr	r3, [r7, #12]
 802757a:	68ba      	ldr	r2, [r7, #8]
 802757c:	605a      	str	r2, [r3, #4]
    md->message = aMessage;
 802757e:	68fb      	ldr	r3, [r7, #12]
 8027580:	687a      	ldr	r2, [r7, #4]
 8027582:	601a      	str	r2, [r3, #0]
}
 8027584:	bf00      	nop
 8027586:	3714      	adds	r7, #20
 8027588:	46bd      	mov	sp, r7
 802758a:	f85d 7b04 	ldr.w	r7, [sp], #4
 802758e:	4770      	bx	lr

08027590 <getNextPacketId>:


static int getNextPacketId(MQTTClient *c) {
 8027590:	b480      	push	{r7}
 8027592:	b083      	sub	sp, #12
 8027594:	af00      	add	r7, sp, #0
 8027596:	6078      	str	r0, [r7, #4]
    return c->next_packetid = (c->next_packetid == MAX_PACKET_ID) ? 1 : c->next_packetid + 1;
 8027598:	687b      	ldr	r3, [r7, #4]
 802759a:	681b      	ldr	r3, [r3, #0]
 802759c:	f64f 72ff 	movw	r2, #65535	@ 0xffff
 80275a0:	4293      	cmp	r3, r2
 80275a2:	d003      	beq.n	80275ac <getNextPacketId+0x1c>
 80275a4:	687b      	ldr	r3, [r7, #4]
 80275a6:	681b      	ldr	r3, [r3, #0]
 80275a8:	3301      	adds	r3, #1
 80275aa:	e000      	b.n	80275ae <getNextPacketId+0x1e>
 80275ac:	2301      	movs	r3, #1
 80275ae:	687a      	ldr	r2, [r7, #4]
 80275b0:	6013      	str	r3, [r2, #0]
 80275b2:	687b      	ldr	r3, [r7, #4]
 80275b4:	681b      	ldr	r3, [r3, #0]
}
 80275b6:	4618      	mov	r0, r3
 80275b8:	370c      	adds	r7, #12
 80275ba:	46bd      	mov	sp, r7
 80275bc:	f85d 7b04 	ldr.w	r7, [sp], #4
 80275c0:	4770      	bx	lr

080275c2 <sendPacket>:


static int sendPacket(MQTTClient* c, int length, Timer* timer)
{
 80275c2:	b5f0      	push	{r4, r5, r6, r7, lr}
 80275c4:	b087      	sub	sp, #28
 80275c6:	af00      	add	r7, sp, #0
 80275c8:	60f8      	str	r0, [r7, #12]
 80275ca:	60b9      	str	r1, [r7, #8]
 80275cc:	607a      	str	r2, [r7, #4]
    int rc = FAILURE,
 80275ce:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80275d2:	617b      	str	r3, [r7, #20]
        sent = 0;
 80275d4:	2300      	movs	r3, #0
 80275d6:	613b      	str	r3, [r7, #16]

    while (sent < length && !TimerIsExpired(timer))
 80275d8:	e018      	b.n	802760c <sendPacket+0x4a>
    {
        rc = c->ipstack->mqttwrite(c->ipstack, &c->buf[sent], length, TimerLeftMS(timer));
 80275da:	68fb      	ldr	r3, [r7, #12]
 80275dc:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80275de:	689c      	ldr	r4, [r3, #8]
 80275e0:	68fb      	ldr	r3, [r7, #12]
 80275e2:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 80275e4:	68fb      	ldr	r3, [r7, #12]
 80275e6:	691a      	ldr	r2, [r3, #16]
 80275e8:	693b      	ldr	r3, [r7, #16]
 80275ea:	18d6      	adds	r6, r2, r3
 80275ec:	6878      	ldr	r0, [r7, #4]
 80275ee:	f000 fed3 	bl	8028398 <TimerLeftMS>
 80275f2:	4603      	mov	r3, r0
 80275f4:	68ba      	ldr	r2, [r7, #8]
 80275f6:	4631      	mov	r1, r6
 80275f8:	4628      	mov	r0, r5
 80275fa:	47a0      	blx	r4
 80275fc:	6178      	str	r0, [r7, #20]
        if (rc < 0)  // there was an error writing the data
 80275fe:	697b      	ldr	r3, [r7, #20]
 8027600:	2b00      	cmp	r3, #0
 8027602:	db0e      	blt.n	8027622 <sendPacket+0x60>
            break;
        sent += rc;
 8027604:	693a      	ldr	r2, [r7, #16]
 8027606:	697b      	ldr	r3, [r7, #20]
 8027608:	4413      	add	r3, r2
 802760a:	613b      	str	r3, [r7, #16]
    while (sent < length && !TimerIsExpired(timer))
 802760c:	693a      	ldr	r2, [r7, #16]
 802760e:	68bb      	ldr	r3, [r7, #8]
 8027610:	429a      	cmp	r2, r3
 8027612:	da07      	bge.n	8027624 <sendPacket+0x62>
 8027614:	6878      	ldr	r0, [r7, #4]
 8027616:	f000 fe7d 	bl	8028314 <TimerIsExpired>
 802761a:	4603      	mov	r3, r0
 802761c:	2b00      	cmp	r3, #0
 802761e:	d0dc      	beq.n	80275da <sendPacket+0x18>
 8027620:	e000      	b.n	8027624 <sendPacket+0x62>
            break;
 8027622:	bf00      	nop
    }
    if (sent == length)
 8027624:	693a      	ldr	r2, [r7, #16]
 8027626:	68bb      	ldr	r3, [r7, #8]
 8027628:	429a      	cmp	r2, r3
 802762a:	d10b      	bne.n	8027644 <sendPacket+0x82>
    {
        TimerCountdown(&c->last_sent, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully sent the packet
 802762c:	68fb      	ldr	r3, [r7, #12]
 802762e:	f103 0258 	add.w	r2, r3, #88	@ 0x58
 8027632:	68fb      	ldr	r3, [r7, #12]
 8027634:	699b      	ldr	r3, [r3, #24]
 8027636:	4619      	mov	r1, r3
 8027638:	4610      	mov	r0, r2
 802763a:	f000 fe95 	bl	8028368 <TimerCountdown>
        rc = MQTT_SUCCESS;
 802763e:	2300      	movs	r3, #0
 8027640:	617b      	str	r3, [r7, #20]
 8027642:	e002      	b.n	802764a <sendPacket+0x88>
    }
    else
        rc = FAILURE;
 8027644:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027648:	617b      	str	r3, [r7, #20]
    return rc;
 802764a:	697b      	ldr	r3, [r7, #20]
}
 802764c:	4618      	mov	r0, r3
 802764e:	371c      	adds	r7, #28
 8027650:	46bd      	mov	sp, r7
 8027652:	bdf0      	pop	{r4, r5, r6, r7, pc}

08027654 <MQTTClientInit>:


void MQTTClientInit(MQTTClient* c, Network* network, unsigned int command_timeout_ms,
		unsigned char* sendbuf, size_t sendbuf_size, unsigned char* readbuf, size_t readbuf_size)
{
 8027654:	b580      	push	{r7, lr}
 8027656:	b086      	sub	sp, #24
 8027658:	af00      	add	r7, sp, #0
 802765a:	60f8      	str	r0, [r7, #12]
 802765c:	60b9      	str	r1, [r7, #8]
 802765e:	607a      	str	r2, [r7, #4]
 8027660:	603b      	str	r3, [r7, #0]
    int i;
    c->ipstack = network;
 8027662:	68fb      	ldr	r3, [r7, #12]
 8027664:	68ba      	ldr	r2, [r7, #8]
 8027666:	655a      	str	r2, [r3, #84]	@ 0x54

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027668:	2300      	movs	r3, #0
 802766a:	617b      	str	r3, [r7, #20]
 802766c:	e008      	b.n	8027680 <MQTTClientInit+0x2c>
        c->messageHandlers[i].topicFilter = 0;
 802766e:	68fb      	ldr	r3, [r7, #12]
 8027670:	697a      	ldr	r2, [r7, #20]
 8027672:	3205      	adds	r2, #5
 8027674:	2100      	movs	r1, #0
 8027676:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 802767a:	697b      	ldr	r3, [r7, #20]
 802767c:	3301      	adds	r3, #1
 802767e:	617b      	str	r3, [r7, #20]
 8027680:	697b      	ldr	r3, [r7, #20]
 8027682:	2b04      	cmp	r3, #4
 8027684:	ddf3      	ble.n	802766e <MQTTClientInit+0x1a>
    c->command_timeout_ms = command_timeout_ms;
 8027686:	68fb      	ldr	r3, [r7, #12]
 8027688:	687a      	ldr	r2, [r7, #4]
 802768a:	605a      	str	r2, [r3, #4]
    c->buf = sendbuf;
 802768c:	68fb      	ldr	r3, [r7, #12]
 802768e:	683a      	ldr	r2, [r7, #0]
 8027690:	611a      	str	r2, [r3, #16]
    c->buf_size = sendbuf_size;
 8027692:	68fb      	ldr	r3, [r7, #12]
 8027694:	6a3a      	ldr	r2, [r7, #32]
 8027696:	609a      	str	r2, [r3, #8]
    c->readbuf = readbuf;
 8027698:	68fb      	ldr	r3, [r7, #12]
 802769a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802769c:	615a      	str	r2, [r3, #20]
    c->readbuf_size = readbuf_size;
 802769e:	68fb      	ldr	r3, [r7, #12]
 80276a0:	6aba      	ldr	r2, [r7, #40]	@ 0x28
 80276a2:	60da      	str	r2, [r3, #12]
    c->isconnected = 0;
 80276a4:	68fb      	ldr	r3, [r7, #12]
 80276a6:	2200      	movs	r2, #0
 80276a8:	621a      	str	r2, [r3, #32]
    c->cleansession = 0;
 80276aa:	68fb      	ldr	r3, [r7, #12]
 80276ac:	2200      	movs	r2, #0
 80276ae:	625a      	str	r2, [r3, #36]	@ 0x24
    c->ping_outstanding = 0;
 80276b0:	68fb      	ldr	r3, [r7, #12]
 80276b2:	2200      	movs	r2, #0
 80276b4:	771a      	strb	r2, [r3, #28]
    c->defaultMessageHandler = NULL;
 80276b6:	68fb      	ldr	r3, [r7, #12]
 80276b8:	2200      	movs	r2, #0
 80276ba:	651a      	str	r2, [r3, #80]	@ 0x50
	  c->next_packetid = 1;
 80276bc:	68fb      	ldr	r3, [r7, #12]
 80276be:	2201      	movs	r2, #1
 80276c0:	601a      	str	r2, [r3, #0]
    TimerInit(&c->last_sent);
 80276c2:	68fb      	ldr	r3, [r7, #12]
 80276c4:	3358      	adds	r3, #88	@ 0x58
 80276c6:	4618      	mov	r0, r3
 80276c8:	f000 fe7c 	bl	80283c4 <TimerInit>
    TimerInit(&c->last_received);
 80276cc:	68fb      	ldr	r3, [r7, #12]
 80276ce:	3360      	adds	r3, #96	@ 0x60
 80276d0:	4618      	mov	r0, r3
 80276d2:	f000 fe77 	bl	80283c4 <TimerInit>
#if defined(MQTT_TASK)
	  MutexInit(&c->mutex);
#endif
	  if(mqttMutex == NULL)
 80276d6:	4b07      	ldr	r3, [pc, #28]	@ (80276f4 <MQTTClientInit+0xa0>)
 80276d8:	681b      	ldr	r3, [r3, #0]
 80276da:	2b00      	cmp	r3, #0
 80276dc:	d105      	bne.n	80276ea <MQTTClientInit+0x96>
	  {
//		  osMutexDef(mqttMutex);
//		  mqttMutex = osMutexNew(NULL);
		  c->mutex = osMutexNew(NULL);
 80276de:	2000      	movs	r0, #0
 80276e0:	f7ea f8cb 	bl	801187a <osMutexNew>
 80276e4:	4602      	mov	r2, r0
 80276e6:	68fb      	ldr	r3, [r7, #12]
 80276e8:	669a      	str	r2, [r3, #104]	@ 0x68

	  }
}
 80276ea:	bf00      	nop
 80276ec:	3718      	adds	r7, #24
 80276ee:	46bd      	mov	sp, r7
 80276f0:	bd80      	pop	{r7, pc}
 80276f2:	bf00      	nop
 80276f4:	2402b150 	.word	0x2402b150

080276f8 <decodePacket>:


static int decodePacket(MQTTClient* c, int* value, int timeout)
{
 80276f8:	b590      	push	{r4, r7, lr}
 80276fa:	b08b      	sub	sp, #44	@ 0x2c
 80276fc:	af00      	add	r7, sp, #0
 80276fe:	60f8      	str	r0, [r7, #12]
 8027700:	60b9      	str	r1, [r7, #8]
 8027702:	607a      	str	r2, [r7, #4]
    unsigned char i;
    int multiplier = 1;
 8027704:	2301      	movs	r3, #1
 8027706:	627b      	str	r3, [r7, #36]	@ 0x24
    int len = 0;
 8027708:	2300      	movs	r3, #0
 802770a:	623b      	str	r3, [r7, #32]
    const int MAX_NO_OF_REMAINING_LENGTH_BYTES = 4;
 802770c:	2304      	movs	r3, #4
 802770e:	61fb      	str	r3, [r7, #28]

    *value = 0;
 8027710:	68bb      	ldr	r3, [r7, #8]
 8027712:	2200      	movs	r2, #0
 8027714:	601a      	str	r2, [r3, #0]
    do
    {
        int rc = MQTTPACKET_READ_ERROR;
 8027716:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802771a:	61bb      	str	r3, [r7, #24]

        if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 802771c:	6a3b      	ldr	r3, [r7, #32]
 802771e:	3301      	adds	r3, #1
 8027720:	623b      	str	r3, [r7, #32]
 8027722:	6a3a      	ldr	r2, [r7, #32]
 8027724:	69fb      	ldr	r3, [r7, #28]
 8027726:	429a      	cmp	r2, r3
 8027728:	dd03      	ble.n	8027732 <decodePacket+0x3a>
        {
            rc = MQTTPACKET_READ_ERROR; /* bad data */
 802772a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802772e:	61bb      	str	r3, [r7, #24]
            goto exit;
 8027730:	e021      	b.n	8027776 <decodePacket+0x7e>
        }
        rc = c->ipstack->mqttread(c->ipstack, &i, 1, timeout);
 8027732:	68fb      	ldr	r3, [r7, #12]
 8027734:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8027736:	685c      	ldr	r4, [r3, #4]
 8027738:	68fb      	ldr	r3, [r7, #12]
 802773a:	6d58      	ldr	r0, [r3, #84]	@ 0x54
 802773c:	f107 0117 	add.w	r1, r7, #23
 8027740:	687b      	ldr	r3, [r7, #4]
 8027742:	2201      	movs	r2, #1
 8027744:	47a0      	blx	r4
 8027746:	61b8      	str	r0, [r7, #24]
        if (rc != 1)
 8027748:	69bb      	ldr	r3, [r7, #24]
 802774a:	2b01      	cmp	r3, #1
 802774c:	d112      	bne.n	8027774 <decodePacket+0x7c>
            goto exit;
        *value += (i & 127) * multiplier;
 802774e:	68bb      	ldr	r3, [r7, #8]
 8027750:	681a      	ldr	r2, [r3, #0]
 8027752:	7dfb      	ldrb	r3, [r7, #23]
 8027754:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8027758:	6a79      	ldr	r1, [r7, #36]	@ 0x24
 802775a:	fb01 f303 	mul.w	r3, r1, r3
 802775e:	441a      	add	r2, r3
 8027760:	68bb      	ldr	r3, [r7, #8]
 8027762:	601a      	str	r2, [r3, #0]
        multiplier *= 128;
 8027764:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 8027766:	01db      	lsls	r3, r3, #7
 8027768:	627b      	str	r3, [r7, #36]	@ 0x24
    } while ((i & 128) != 0);
 802776a:	7dfb      	ldrb	r3, [r7, #23]
 802776c:	b25b      	sxtb	r3, r3
 802776e:	2b00      	cmp	r3, #0
 8027770:	dbd1      	blt.n	8027716 <decodePacket+0x1e>
exit:
 8027772:	e000      	b.n	8027776 <decodePacket+0x7e>
            goto exit;
 8027774:	bf00      	nop
    return len;
 8027776:	6a3b      	ldr	r3, [r7, #32]
}
 8027778:	4618      	mov	r0, r3
 802777a:	372c      	adds	r7, #44	@ 0x2c
 802777c:	46bd      	mov	sp, r7
 802777e:	bd90      	pop	{r4, r7, pc}

08027780 <readPacket>:


static int readPacket(MQTTClient* c, Timer* timer)
{
 8027780:	b5f0      	push	{r4, r5, r6, r7, lr}
 8027782:	b089      	sub	sp, #36	@ 0x24
 8027784:	af00      	add	r7, sp, #0
 8027786:	60f8      	str	r0, [r7, #12]
 8027788:	60b9      	str	r1, [r7, #8]
    MQTTHeader header = {0};
 802778a:	2300      	movs	r3, #0
 802778c:	617b      	str	r3, [r7, #20]
    int len = 0;
 802778e:	2300      	movs	r3, #0
 8027790:	61bb      	str	r3, [r7, #24]
    int rem_len = 0;
 8027792:	2300      	movs	r3, #0
 8027794:	613b      	str	r3, [r7, #16]

    /* 1. read the header byte.  This has the packet type in it */
    int rc = c->ipstack->mqttread(c->ipstack, c->readbuf, 1, TimerLeftMS(timer));
 8027796:	68fb      	ldr	r3, [r7, #12]
 8027798:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 802779a:	685c      	ldr	r4, [r3, #4]
 802779c:	68fb      	ldr	r3, [r7, #12]
 802779e:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 80277a0:	68fb      	ldr	r3, [r7, #12]
 80277a2:	695e      	ldr	r6, [r3, #20]
 80277a4:	68b8      	ldr	r0, [r7, #8]
 80277a6:	f000 fdf7 	bl	8028398 <TimerLeftMS>
 80277aa:	4603      	mov	r3, r0
 80277ac:	2201      	movs	r2, #1
 80277ae:	4631      	mov	r1, r6
 80277b0:	4628      	mov	r0, r5
 80277b2:	47a0      	blx	r4
 80277b4:	61f8      	str	r0, [r7, #28]
    if (rc != 1)
 80277b6:	69fb      	ldr	r3, [r7, #28]
 80277b8:	2b01      	cmp	r3, #1
 80277ba:	d15d      	bne.n	8027878 <readPacket+0xf8>
        goto exit;

    len = 1;
 80277bc:	2301      	movs	r3, #1
 80277be:	61bb      	str	r3, [r7, #24]
    /* 2. read the remaining length.  This is variable in itself */
    decodePacket(c, &rem_len, TimerLeftMS(timer));
 80277c0:	68b8      	ldr	r0, [r7, #8]
 80277c2:	f000 fde9 	bl	8028398 <TimerLeftMS>
 80277c6:	4602      	mov	r2, r0
 80277c8:	f107 0310 	add.w	r3, r7, #16
 80277cc:	4619      	mov	r1, r3
 80277ce:	68f8      	ldr	r0, [r7, #12]
 80277d0:	f7ff ff92 	bl	80276f8 <decodePacket>
    len += MQTTPacket_encode(c->readbuf + 1, rem_len); /* put the original remaining length back into the buffer */
 80277d4:	68fb      	ldr	r3, [r7, #12]
 80277d6:	695b      	ldr	r3, [r3, #20]
 80277d8:	3301      	adds	r3, #1
 80277da:	693a      	ldr	r2, [r7, #16]
 80277dc:	4611      	mov	r1, r2
 80277de:	4618      	mov	r0, r3
 80277e0:	f001 f959 	bl	8028a96 <MQTTPacket_encode>
 80277e4:	4602      	mov	r2, r0
 80277e6:	69bb      	ldr	r3, [r7, #24]
 80277e8:	4413      	add	r3, r2
 80277ea:	61bb      	str	r3, [r7, #24]

    if (rem_len > (c->readbuf_size - len))
 80277ec:	68fb      	ldr	r3, [r7, #12]
 80277ee:	68da      	ldr	r2, [r3, #12]
 80277f0:	69bb      	ldr	r3, [r7, #24]
 80277f2:	1ad3      	subs	r3, r2, r3
 80277f4:	693a      	ldr	r2, [r7, #16]
 80277f6:	4293      	cmp	r3, r2
 80277f8:	d203      	bcs.n	8027802 <readPacket+0x82>
    {
        rc = BUFFER_OVERFLOW;
 80277fa:	f06f 0301 	mvn.w	r3, #1
 80277fe:	61fb      	str	r3, [r7, #28]
        goto exit;
 8027800:	e03d      	b.n	802787e <readPacket+0xfe>
    }

    /* 3. read the rest of the buffer using a callback to supply the rest of the data */
    if (rem_len > 0 && (rc = c->ipstack->mqttread(c->ipstack, c->readbuf + len, rem_len, TimerLeftMS(timer)) != rem_len)) {
 8027802:	693b      	ldr	r3, [r7, #16]
 8027804:	2b00      	cmp	r3, #0
 8027806:	dd20      	ble.n	802784a <readPacket+0xca>
 8027808:	68fb      	ldr	r3, [r7, #12]
 802780a:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 802780c:	685c      	ldr	r4, [r3, #4]
 802780e:	68fb      	ldr	r3, [r7, #12]
 8027810:	6d5d      	ldr	r5, [r3, #84]	@ 0x54
 8027812:	68fb      	ldr	r3, [r7, #12]
 8027814:	695a      	ldr	r2, [r3, #20]
 8027816:	69bb      	ldr	r3, [r7, #24]
 8027818:	18d6      	adds	r6, r2, r3
 802781a:	693b      	ldr	r3, [r7, #16]
 802781c:	607b      	str	r3, [r7, #4]
 802781e:	68b8      	ldr	r0, [r7, #8]
 8027820:	f000 fdba 	bl	8028398 <TimerLeftMS>
 8027824:	4603      	mov	r3, r0
 8027826:	687a      	ldr	r2, [r7, #4]
 8027828:	4631      	mov	r1, r6
 802782a:	4628      	mov	r0, r5
 802782c:	47a0      	blx	r4
 802782e:	4602      	mov	r2, r0
 8027830:	693b      	ldr	r3, [r7, #16]
 8027832:	429a      	cmp	r2, r3
 8027834:	bf14      	ite	ne
 8027836:	2301      	movne	r3, #1
 8027838:	2300      	moveq	r3, #0
 802783a:	b2db      	uxtb	r3, r3
 802783c:	61fb      	str	r3, [r7, #28]
 802783e:	69fb      	ldr	r3, [r7, #28]
 8027840:	2b00      	cmp	r3, #0
 8027842:	d002      	beq.n	802784a <readPacket+0xca>
        rc = 0;
 8027844:	2300      	movs	r3, #0
 8027846:	61fb      	str	r3, [r7, #28]
        goto exit;
 8027848:	e019      	b.n	802787e <readPacket+0xfe>
    }

    header.byte = c->readbuf[0];
 802784a:	68fb      	ldr	r3, [r7, #12]
 802784c:	695b      	ldr	r3, [r3, #20]
 802784e:	781b      	ldrb	r3, [r3, #0]
 8027850:	753b      	strb	r3, [r7, #20]
    rc = header.bits.type;
 8027852:	7d3b      	ldrb	r3, [r7, #20]
 8027854:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8027858:	b2db      	uxtb	r3, r3
 802785a:	61fb      	str	r3, [r7, #28]
    if (c->keepAliveInterval > 0)
 802785c:	68fb      	ldr	r3, [r7, #12]
 802785e:	699b      	ldr	r3, [r3, #24]
 8027860:	2b00      	cmp	r3, #0
 8027862:	d00b      	beq.n	802787c <readPacket+0xfc>
        TimerCountdown(&c->last_received, c->keepAliveInterval); // record the fact that we have MQTT_SUCCESSfully received a packet
 8027864:	68fb      	ldr	r3, [r7, #12]
 8027866:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 802786a:	68fb      	ldr	r3, [r7, #12]
 802786c:	699b      	ldr	r3, [r3, #24]
 802786e:	4619      	mov	r1, r3
 8027870:	4610      	mov	r0, r2
 8027872:	f000 fd79 	bl	8028368 <TimerCountdown>
 8027876:	e002      	b.n	802787e <readPacket+0xfe>
        goto exit;
 8027878:	bf00      	nop
 802787a:	e000      	b.n	802787e <readPacket+0xfe>
exit:
 802787c:	bf00      	nop
    return rc;
 802787e:	69fb      	ldr	r3, [r7, #28]
}
 8027880:	4618      	mov	r0, r3
 8027882:	3724      	adds	r7, #36	@ 0x24
 8027884:	46bd      	mov	sp, r7
 8027886:	bdf0      	pop	{r4, r5, r6, r7, pc}

08027888 <isTopicMatched>:

// assume topic filter and name is in correct format
// # can only be at end
// + and # can only be next to separator
static char isTopicMatched(char* topicFilter, MQTTString* topicName)
{
 8027888:	b480      	push	{r7}
 802788a:	b087      	sub	sp, #28
 802788c:	af00      	add	r7, sp, #0
 802788e:	6078      	str	r0, [r7, #4]
 8027890:	6039      	str	r1, [r7, #0]
    char* curf = topicFilter;
 8027892:	687b      	ldr	r3, [r7, #4]
 8027894:	617b      	str	r3, [r7, #20]
    char* curn = topicName->lenstring.data;
 8027896:	683b      	ldr	r3, [r7, #0]
 8027898:	689b      	ldr	r3, [r3, #8]
 802789a:	613b      	str	r3, [r7, #16]
    char* curn_end = curn + topicName->lenstring.len;
 802789c:	683b      	ldr	r3, [r7, #0]
 802789e:	685b      	ldr	r3, [r3, #4]
 80278a0:	461a      	mov	r2, r3
 80278a2:	693b      	ldr	r3, [r7, #16]
 80278a4:	4413      	add	r3, r2
 80278a6:	60bb      	str	r3, [r7, #8]

    while (*curf && curn < curn_end)
 80278a8:	e039      	b.n	802791e <isTopicMatched+0x96>
    {
        if (*curn == '/' && *curf != '/')
 80278aa:	693b      	ldr	r3, [r7, #16]
 80278ac:	781b      	ldrb	r3, [r3, #0]
 80278ae:	2b2f      	cmp	r3, #47	@ 0x2f
 80278b0:	d103      	bne.n	80278ba <isTopicMatched+0x32>
 80278b2:	697b      	ldr	r3, [r7, #20]
 80278b4:	781b      	ldrb	r3, [r3, #0]
 80278b6:	2b2f      	cmp	r3, #47	@ 0x2f
 80278b8:	d13a      	bne.n	8027930 <isTopicMatched+0xa8>
            break;
        if (*curf != '+' && *curf != '#' && *curf != *curn)
 80278ba:	697b      	ldr	r3, [r7, #20]
 80278bc:	781b      	ldrb	r3, [r3, #0]
 80278be:	2b2b      	cmp	r3, #43	@ 0x2b
 80278c0:	d009      	beq.n	80278d6 <isTopicMatched+0x4e>
 80278c2:	697b      	ldr	r3, [r7, #20]
 80278c4:	781b      	ldrb	r3, [r3, #0]
 80278c6:	2b23      	cmp	r3, #35	@ 0x23
 80278c8:	d005      	beq.n	80278d6 <isTopicMatched+0x4e>
 80278ca:	697b      	ldr	r3, [r7, #20]
 80278cc:	781a      	ldrb	r2, [r3, #0]
 80278ce:	693b      	ldr	r3, [r7, #16]
 80278d0:	781b      	ldrb	r3, [r3, #0]
 80278d2:	429a      	cmp	r2, r3
 80278d4:	d12e      	bne.n	8027934 <isTopicMatched+0xac>
            break;
        if (*curf == '+')
 80278d6:	697b      	ldr	r3, [r7, #20]
 80278d8:	781b      	ldrb	r3, [r3, #0]
 80278da:	2b2b      	cmp	r3, #43	@ 0x2b
 80278dc:	d112      	bne.n	8027904 <isTopicMatched+0x7c>
        {   // skip until we meet the next separator, or end of string
            char* nextpos = curn + 1;
 80278de:	693b      	ldr	r3, [r7, #16]
 80278e0:	3301      	adds	r3, #1
 80278e2:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 80278e4:	e005      	b.n	80278f2 <isTopicMatched+0x6a>
                nextpos = ++curn + 1;
 80278e6:	693b      	ldr	r3, [r7, #16]
 80278e8:	3301      	adds	r3, #1
 80278ea:	613b      	str	r3, [r7, #16]
 80278ec:	693b      	ldr	r3, [r7, #16]
 80278ee:	3301      	adds	r3, #1
 80278f0:	60fb      	str	r3, [r7, #12]
            while (nextpos < curn_end && *nextpos != '/')
 80278f2:	68fa      	ldr	r2, [r7, #12]
 80278f4:	68bb      	ldr	r3, [r7, #8]
 80278f6:	429a      	cmp	r2, r3
 80278f8:	d20b      	bcs.n	8027912 <isTopicMatched+0x8a>
 80278fa:	68fb      	ldr	r3, [r7, #12]
 80278fc:	781b      	ldrb	r3, [r3, #0]
 80278fe:	2b2f      	cmp	r3, #47	@ 0x2f
 8027900:	d1f1      	bne.n	80278e6 <isTopicMatched+0x5e>
 8027902:	e006      	b.n	8027912 <isTopicMatched+0x8a>
        }
        else if (*curf == '#')
 8027904:	697b      	ldr	r3, [r7, #20]
 8027906:	781b      	ldrb	r3, [r3, #0]
 8027908:	2b23      	cmp	r3, #35	@ 0x23
 802790a:	d102      	bne.n	8027912 <isTopicMatched+0x8a>
            curn = curn_end - 1;    // skip until end of string
 802790c:	68bb      	ldr	r3, [r7, #8]
 802790e:	3b01      	subs	r3, #1
 8027910:	613b      	str	r3, [r7, #16]
        curf++;
 8027912:	697b      	ldr	r3, [r7, #20]
 8027914:	3301      	adds	r3, #1
 8027916:	617b      	str	r3, [r7, #20]
        curn++;
 8027918:	693b      	ldr	r3, [r7, #16]
 802791a:	3301      	adds	r3, #1
 802791c:	613b      	str	r3, [r7, #16]
    while (*curf && curn < curn_end)
 802791e:	697b      	ldr	r3, [r7, #20]
 8027920:	781b      	ldrb	r3, [r3, #0]
 8027922:	2b00      	cmp	r3, #0
 8027924:	d007      	beq.n	8027936 <isTopicMatched+0xae>
 8027926:	693a      	ldr	r2, [r7, #16]
 8027928:	68bb      	ldr	r3, [r7, #8]
 802792a:	429a      	cmp	r2, r3
 802792c:	d3bd      	bcc.n	80278aa <isTopicMatched+0x22>
 802792e:	e002      	b.n	8027936 <isTopicMatched+0xae>
            break;
 8027930:	bf00      	nop
 8027932:	e000      	b.n	8027936 <isTopicMatched+0xae>
            break;
 8027934:	bf00      	nop
    };

    return (curn == curn_end) && (*curf == '\0');
 8027936:	693a      	ldr	r2, [r7, #16]
 8027938:	68bb      	ldr	r3, [r7, #8]
 802793a:	429a      	cmp	r2, r3
 802793c:	d105      	bne.n	802794a <isTopicMatched+0xc2>
 802793e:	697b      	ldr	r3, [r7, #20]
 8027940:	781b      	ldrb	r3, [r3, #0]
 8027942:	2b00      	cmp	r3, #0
 8027944:	d101      	bne.n	802794a <isTopicMatched+0xc2>
 8027946:	2301      	movs	r3, #1
 8027948:	e000      	b.n	802794c <isTopicMatched+0xc4>
 802794a:	2300      	movs	r3, #0
 802794c:	b2db      	uxtb	r3, r3
}
 802794e:	4618      	mov	r0, r3
 8027950:	371c      	adds	r7, #28
 8027952:	46bd      	mov	sp, r7
 8027954:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027958:	4770      	bx	lr

0802795a <deliverMessage>:


int deliverMessage(MQTTClient* c, MQTTString* topicName, MQTTMessage* message)
{
 802795a:	b580      	push	{r7, lr}
 802795c:	b08a      	sub	sp, #40	@ 0x28
 802795e:	af00      	add	r7, sp, #0
 8027960:	60f8      	str	r0, [r7, #12]
 8027962:	60b9      	str	r1, [r7, #8]
 8027964:	607a      	str	r2, [r7, #4]
    int i;
    int rc = FAILURE;
 8027966:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802796a:	623b      	str	r3, [r7, #32]

    // we have to find the right message handler - indexed by topic
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 802796c:	2300      	movs	r3, #0
 802796e:	627b      	str	r3, [r7, #36]	@ 0x24
 8027970:	e03c      	b.n	80279ec <deliverMessage+0x92>
    {
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 8027972:	68fb      	ldr	r3, [r7, #12]
 8027974:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8027976:	3205      	adds	r2, #5
 8027978:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 802797c:	2b00      	cmp	r3, #0
 802797e:	d032      	beq.n	80279e6 <deliverMessage+0x8c>
 8027980:	68fb      	ldr	r3, [r7, #12]
 8027982:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8027984:	3205      	adds	r2, #5
 8027986:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 802798a:	4619      	mov	r1, r3
 802798c:	68b8      	ldr	r0, [r7, #8]
 802798e:	f001 fa51 	bl	8028e34 <MQTTPacket_equals>
 8027992:	4603      	mov	r3, r0
 8027994:	2b00      	cmp	r3, #0
 8027996:	d10b      	bne.n	80279b0 <deliverMessage+0x56>
                isTopicMatched((char*)c->messageHandlers[i].topicFilter, topicName)))
 8027998:	68fb      	ldr	r3, [r7, #12]
 802799a:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 802799c:	3205      	adds	r2, #5
 802799e:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 80279a2:	68b9      	ldr	r1, [r7, #8]
 80279a4:	4618      	mov	r0, r3
 80279a6:	f7ff ff6f 	bl	8027888 <isTopicMatched>
 80279aa:	4603      	mov	r3, r0
        if (c->messageHandlers[i].topicFilter != 0 && (MQTTPacket_equals(topicName, (char*)c->messageHandlers[i].topicFilter) ||
 80279ac:	2b00      	cmp	r3, #0
 80279ae:	d01a      	beq.n	80279e6 <deliverMessage+0x8c>
        {
            if (c->messageHandlers[i].fp != NULL)
 80279b0:	68fa      	ldr	r2, [r7, #12]
 80279b2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80279b4:	3305      	adds	r3, #5
 80279b6:	00db      	lsls	r3, r3, #3
 80279b8:	4413      	add	r3, r2
 80279ba:	685b      	ldr	r3, [r3, #4]
 80279bc:	2b00      	cmp	r3, #0
 80279be:	d012      	beq.n	80279e6 <deliverMessage+0x8c>
            {
                MessageData md;
                NewMessageData(&md, topicName, message);
 80279c0:	f107 0318 	add.w	r3, r7, #24
 80279c4:	687a      	ldr	r2, [r7, #4]
 80279c6:	68b9      	ldr	r1, [r7, #8]
 80279c8:	4618      	mov	r0, r3
 80279ca:	f7ff fdcf 	bl	802756c <NewMessageData>
                c->messageHandlers[i].fp(&md);
 80279ce:	68fa      	ldr	r2, [r7, #12]
 80279d0:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80279d2:	3305      	adds	r3, #5
 80279d4:	00db      	lsls	r3, r3, #3
 80279d6:	4413      	add	r3, r2
 80279d8:	685b      	ldr	r3, [r3, #4]
 80279da:	f107 0218 	add.w	r2, r7, #24
 80279de:	4610      	mov	r0, r2
 80279e0:	4798      	blx	r3
                rc = MQTT_SUCCESS;
 80279e2:	2300      	movs	r3, #0
 80279e4:	623b      	str	r3, [r7, #32]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 80279e6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80279e8:	3301      	adds	r3, #1
 80279ea:	627b      	str	r3, [r7, #36]	@ 0x24
 80279ec:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
 80279ee:	2b04      	cmp	r3, #4
 80279f0:	ddbf      	ble.n	8027972 <deliverMessage+0x18>
            }
        }
    }

    if (rc == FAILURE && c->defaultMessageHandler != NULL)
 80279f2:	6a3b      	ldr	r3, [r7, #32]
 80279f4:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80279f8:	d112      	bne.n	8027a20 <deliverMessage+0xc6>
 80279fa:	68fb      	ldr	r3, [r7, #12]
 80279fc:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 80279fe:	2b00      	cmp	r3, #0
 8027a00:	d00e      	beq.n	8027a20 <deliverMessage+0xc6>
    {
        MessageData md;
        NewMessageData(&md, topicName, message);
 8027a02:	f107 0310 	add.w	r3, r7, #16
 8027a06:	687a      	ldr	r2, [r7, #4]
 8027a08:	68b9      	ldr	r1, [r7, #8]
 8027a0a:	4618      	mov	r0, r3
 8027a0c:	f7ff fdae 	bl	802756c <NewMessageData>
        c->defaultMessageHandler(&md);
 8027a10:	68fb      	ldr	r3, [r7, #12]
 8027a12:	6d1b      	ldr	r3, [r3, #80]	@ 0x50
 8027a14:	f107 0210 	add.w	r2, r7, #16
 8027a18:	4610      	mov	r0, r2
 8027a1a:	4798      	blx	r3
        rc = MQTT_SUCCESS;
 8027a1c:	2300      	movs	r3, #0
 8027a1e:	623b      	str	r3, [r7, #32]
    }

    return rc;
 8027a20:	6a3b      	ldr	r3, [r7, #32]
}
 8027a22:	4618      	mov	r0, r3
 8027a24:	3728      	adds	r7, #40	@ 0x28
 8027a26:	46bd      	mov	sp, r7
 8027a28:	bd80      	pop	{r7, pc}

08027a2a <keepalive>:


int keepalive(MQTTClient* c)
{
 8027a2a:	b580      	push	{r7, lr}
 8027a2c:	b086      	sub	sp, #24
 8027a2e:	af00      	add	r7, sp, #0
 8027a30:	6078      	str	r0, [r7, #4]
    int rc = MQTT_SUCCESS;
 8027a32:	2300      	movs	r3, #0
 8027a34:	617b      	str	r3, [r7, #20]

    if (c->keepAliveInterval == 0)
 8027a36:	687b      	ldr	r3, [r7, #4]
 8027a38:	699b      	ldr	r3, [r3, #24]
 8027a3a:	2b00      	cmp	r3, #0
 8027a3c:	d03e      	beq.n	8027abc <keepalive+0x92>
        goto exit;

    if (TimerIsExpired(&c->last_sent) || TimerIsExpired(&c->last_received))
 8027a3e:	687b      	ldr	r3, [r7, #4]
 8027a40:	3358      	adds	r3, #88	@ 0x58
 8027a42:	4618      	mov	r0, r3
 8027a44:	f000 fc66 	bl	8028314 <TimerIsExpired>
 8027a48:	4603      	mov	r3, r0
 8027a4a:	2b00      	cmp	r3, #0
 8027a4c:	d107      	bne.n	8027a5e <keepalive+0x34>
 8027a4e:	687b      	ldr	r3, [r7, #4]
 8027a50:	3360      	adds	r3, #96	@ 0x60
 8027a52:	4618      	mov	r0, r3
 8027a54:	f000 fc5e 	bl	8028314 <TimerIsExpired>
 8027a58:	4603      	mov	r3, r0
 8027a5a:	2b00      	cmp	r3, #0
 8027a5c:	d030      	beq.n	8027ac0 <keepalive+0x96>
    {
        if (c->ping_outstanding)
 8027a5e:	687b      	ldr	r3, [r7, #4]
 8027a60:	7f1b      	ldrb	r3, [r3, #28]
 8027a62:	2b00      	cmp	r3, #0
 8027a64:	d003      	beq.n	8027a6e <keepalive+0x44>
            rc = FAILURE; /* PINGRESP not received in keepalive interval */
 8027a66:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027a6a:	617b      	str	r3, [r7, #20]
 8027a6c:	e029      	b.n	8027ac2 <keepalive+0x98>
        else
        {
            Timer timer;
            TimerInit(&timer);
 8027a6e:	f107 0308 	add.w	r3, r7, #8
 8027a72:	4618      	mov	r0, r3
 8027a74:	f000 fca6 	bl	80283c4 <TimerInit>
            TimerCountdownMS(&timer, 1000);
 8027a78:	f107 0308 	add.w	r3, r7, #8
 8027a7c:	f44f 717a 	mov.w	r1, #1000	@ 0x3e8
 8027a80:	4618      	mov	r0, r3
 8027a82:	f000 fc5d 	bl	8028340 <TimerCountdownMS>
            int len = MQTTSerialize_pingreq(c->buf, c->buf_size);
 8027a86:	687b      	ldr	r3, [r7, #4]
 8027a88:	691a      	ldr	r2, [r3, #16]
 8027a8a:	687b      	ldr	r3, [r7, #4]
 8027a8c:	689b      	ldr	r3, [r3, #8]
 8027a8e:	4619      	mov	r1, r3
 8027a90:	4610      	mov	r0, r2
 8027a92:	f000 ff34 	bl	80288fe <MQTTSerialize_pingreq>
 8027a96:	6138      	str	r0, [r7, #16]
            if (len > 0 && (rc = sendPacket(c, len, &timer)) == MQTT_SUCCESS) // send the ping packet
 8027a98:	693b      	ldr	r3, [r7, #16]
 8027a9a:	2b00      	cmp	r3, #0
 8027a9c:	dd11      	ble.n	8027ac2 <keepalive+0x98>
 8027a9e:	f107 0308 	add.w	r3, r7, #8
 8027aa2:	461a      	mov	r2, r3
 8027aa4:	6939      	ldr	r1, [r7, #16]
 8027aa6:	6878      	ldr	r0, [r7, #4]
 8027aa8:	f7ff fd8b 	bl	80275c2 <sendPacket>
 8027aac:	6178      	str	r0, [r7, #20]
 8027aae:	697b      	ldr	r3, [r7, #20]
 8027ab0:	2b00      	cmp	r3, #0
 8027ab2:	d106      	bne.n	8027ac2 <keepalive+0x98>
                c->ping_outstanding = 1;
 8027ab4:	687b      	ldr	r3, [r7, #4]
 8027ab6:	2201      	movs	r2, #1
 8027ab8:	771a      	strb	r2, [r3, #28]
 8027aba:	e002      	b.n	8027ac2 <keepalive+0x98>
        goto exit;
 8027abc:	bf00      	nop
 8027abe:	e000      	b.n	8027ac2 <keepalive+0x98>
        }
    }

exit:
 8027ac0:	bf00      	nop
    return rc;
 8027ac2:	697b      	ldr	r3, [r7, #20]
}
 8027ac4:	4618      	mov	r0, r3
 8027ac6:	3718      	adds	r7, #24
 8027ac8:	46bd      	mov	sp, r7
 8027aca:	bd80      	pop	{r7, pc}

08027acc <MQTTCleanSession>:


void MQTTCleanSession(MQTTClient* c)
{
 8027acc:	b480      	push	{r7}
 8027ace:	b085      	sub	sp, #20
 8027ad0:	af00      	add	r7, sp, #0
 8027ad2:	6078      	str	r0, [r7, #4]
    int i = 0;
 8027ad4:	2300      	movs	r3, #0
 8027ad6:	60fb      	str	r3, [r7, #12]

    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027ad8:	2300      	movs	r3, #0
 8027ada:	60fb      	str	r3, [r7, #12]
 8027adc:	e008      	b.n	8027af0 <MQTTCleanSession+0x24>
        c->messageHandlers[i].topicFilter = NULL;
 8027ade:	687b      	ldr	r3, [r7, #4]
 8027ae0:	68fa      	ldr	r2, [r7, #12]
 8027ae2:	3205      	adds	r2, #5
 8027ae4:	2100      	movs	r1, #0
 8027ae6:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027aea:	68fb      	ldr	r3, [r7, #12]
 8027aec:	3301      	adds	r3, #1
 8027aee:	60fb      	str	r3, [r7, #12]
 8027af0:	68fb      	ldr	r3, [r7, #12]
 8027af2:	2b04      	cmp	r3, #4
 8027af4:	ddf3      	ble.n	8027ade <MQTTCleanSession+0x12>
}
 8027af6:	bf00      	nop
 8027af8:	bf00      	nop
 8027afa:	3714      	adds	r7, #20
 8027afc:	46bd      	mov	sp, r7
 8027afe:	f85d 7b04 	ldr.w	r7, [sp], #4
 8027b02:	4770      	bx	lr

08027b04 <MQTTCloseSession>:


void MQTTCloseSession(MQTTClient* c)
{
 8027b04:	b580      	push	{r7, lr}
 8027b06:	b082      	sub	sp, #8
 8027b08:	af00      	add	r7, sp, #0
 8027b0a:	6078      	str	r0, [r7, #4]
    c->ping_outstanding = 0;
 8027b0c:	687b      	ldr	r3, [r7, #4]
 8027b0e:	2200      	movs	r2, #0
 8027b10:	771a      	strb	r2, [r3, #28]
    c->isconnected = 0;
 8027b12:	687b      	ldr	r3, [r7, #4]
 8027b14:	2200      	movs	r2, #0
 8027b16:	621a      	str	r2, [r3, #32]
    if (c->cleansession)
 8027b18:	687b      	ldr	r3, [r7, #4]
 8027b1a:	6a5b      	ldr	r3, [r3, #36]	@ 0x24
 8027b1c:	2b00      	cmp	r3, #0
 8027b1e:	d002      	beq.n	8027b26 <MQTTCloseSession+0x22>
        MQTTCleanSession(c);
 8027b20:	6878      	ldr	r0, [r7, #4]
 8027b22:	f7ff ffd3 	bl	8027acc <MQTTCleanSession>
}
 8027b26:	bf00      	nop
 8027b28:	3708      	adds	r7, #8
 8027b2a:	46bd      	mov	sp, r7
 8027b2c:	bd80      	pop	{r7, pc}
	...

08027b30 <cycle>:


int cycle(MQTTClient* c, Timer* timer)
{
 8027b30:	b5f0      	push	{r4, r5, r6, r7, lr}
 8027b32:	b095      	sub	sp, #84	@ 0x54
 8027b34:	af06      	add	r7, sp, #24
 8027b36:	6078      	str	r0, [r7, #4]
 8027b38:	6039      	str	r1, [r7, #0]
    int len = 0,
 8027b3a:	2300      	movs	r3, #0
 8027b3c:	637b      	str	r3, [r7, #52]	@ 0x34
        rc = MQTT_SUCCESS;
 8027b3e:	2300      	movs	r3, #0
 8027b40:	633b      	str	r3, [r7, #48]	@ 0x30

    int packet_type = readPacket(c, timer);     /* read the socket, see what work is due */
 8027b42:	6839      	ldr	r1, [r7, #0]
 8027b44:	6878      	ldr	r0, [r7, #4]
 8027b46:	f7ff fe1b 	bl	8027780 <readPacket>
 8027b4a:	62f8      	str	r0, [r7, #44]	@ 0x2c

    switch (packet_type)
 8027b4c:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8027b4e:	2b0d      	cmp	r3, #13
 8027b50:	d81e      	bhi.n	8027b90 <cycle+0x60>
 8027b52:	a201      	add	r2, pc, #4	@ (adr r2, 8027b58 <cycle+0x28>)
 8027b54:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8027b58:	08027ce7 	.word	0x08027ce7
 8027b5c:	08027b91 	.word	0x08027b91
 8027b60:	08027ce7 	.word	0x08027ce7
 8027b64:	08027b97 	.word	0x08027b97
 8027b68:	08027ce7 	.word	0x08027ce7
 8027b6c:	08027c63 	.word	0x08027c63
 8027b70:	08027c63 	.word	0x08027c63
 8027b74:	08027ce7 	.word	0x08027ce7
 8027b78:	08027b91 	.word	0x08027b91
 8027b7c:	08027ce7 	.word	0x08027ce7
 8027b80:	08027b91 	.word	0x08027b91
 8027b84:	08027ce7 	.word	0x08027ce7
 8027b88:	08027b91 	.word	0x08027b91
 8027b8c:	08027cdf 	.word	0x08027cdf
    {
        default:
            /* no more data to read, unrecoverable. Or read packet fails due to unexpected network error */
            rc = packet_type;
 8027b90:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8027b92:	633b      	str	r3, [r7, #48]	@ 0x30
            goto exit;
 8027b94:	e0b9      	b.n	8027d0a <cycle+0x1da>
        case PUBLISH:
        {
            MQTTString topicName;
            MQTTMessage msg;
            int intQoS;
            msg.payloadlen = 0; /* this is a size_t, but deserialize publish sets this as int */
 8027b96:	2300      	movs	r3, #0
 8027b98:	61fb      	str	r3, [r7, #28]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 8027b9a:	687b      	ldr	r3, [r7, #4]
 8027b9c:	695b      	ldr	r3, [r3, #20]
               (unsigned char**)&msg.payload, (int*)&msg.payloadlen, c->readbuf, c->readbuf_size) != 1)
 8027b9e:	687a      	ldr	r2, [r7, #4]
 8027ba0:	68d2      	ldr	r2, [r2, #12]
            if (MQTTDeserialize_publish(&msg.dup, &intQoS, &msg.retained, &msg.id, &topicName,
 8027ba2:	4616      	mov	r6, r2
 8027ba4:	f107 0210 	add.w	r2, r7, #16
 8027ba8:	1d15      	adds	r5, r2, #4
 8027baa:	f107 0210 	add.w	r2, r7, #16
 8027bae:	1c54      	adds	r4, r2, #1
 8027bb0:	f107 010c 	add.w	r1, r7, #12
 8027bb4:	f107 0210 	add.w	r2, r7, #16
 8027bb8:	1c90      	adds	r0, r2, #2
 8027bba:	9604      	str	r6, [sp, #16]
 8027bbc:	9303      	str	r3, [sp, #12]
 8027bbe:	f107 0310 	add.w	r3, r7, #16
 8027bc2:	330c      	adds	r3, #12
 8027bc4:	9302      	str	r3, [sp, #8]
 8027bc6:	f107 0310 	add.w	r3, r7, #16
 8027bca:	3308      	adds	r3, #8
 8027bcc:	9301      	str	r3, [sp, #4]
 8027bce:	f107 0320 	add.w	r3, r7, #32
 8027bd2:	9300      	str	r3, [sp, #0]
 8027bd4:	462b      	mov	r3, r5
 8027bd6:	4622      	mov	r2, r4
 8027bd8:	f000 fea0 	bl	802891c <MQTTDeserialize_publish>
 8027bdc:	4603      	mov	r3, r0
 8027bde:	2b01      	cmp	r3, #1
 8027be0:	f040 8090 	bne.w	8027d04 <cycle+0x1d4>
                goto exit;
            msg.qos = (enum QoS)intQoS;
 8027be4:	68fb      	ldr	r3, [r7, #12]
 8027be6:	b2db      	uxtb	r3, r3
 8027be8:	743b      	strb	r3, [r7, #16]
            deliverMessage(c, &topicName, &msg);
 8027bea:	f107 0210 	add.w	r2, r7, #16
 8027bee:	f107 0320 	add.w	r3, r7, #32
 8027bf2:	4619      	mov	r1, r3
 8027bf4:	6878      	ldr	r0, [r7, #4]
 8027bf6:	f7ff feb0 	bl	802795a <deliverMessage>
            if (msg.qos != QOS0)
 8027bfa:	7c3b      	ldrb	r3, [r7, #16]
 8027bfc:	2b00      	cmp	r3, #0
 8027bfe:	d074      	beq.n	8027cea <cycle+0x1ba>
            {
                if (msg.qos == QOS1)
 8027c00:	7c3b      	ldrb	r3, [r7, #16]
 8027c02:	2b01      	cmp	r3, #1
 8027c04:	d10c      	bne.n	8027c20 <cycle+0xf0>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBACK, 0, msg.id);
 8027c06:	687b      	ldr	r3, [r7, #4]
 8027c08:	6918      	ldr	r0, [r3, #16]
 8027c0a:	687b      	ldr	r3, [r7, #4]
 8027c0c:	689b      	ldr	r3, [r3, #8]
 8027c0e:	4619      	mov	r1, r3
 8027c10:	8abb      	ldrh	r3, [r7, #20]
 8027c12:	9300      	str	r3, [sp, #0]
 8027c14:	2300      	movs	r3, #0
 8027c16:	2204      	movs	r2, #4
 8027c18:	f001 f9d9 	bl	8028fce <MQTTSerialize_ack>
 8027c1c:	6378      	str	r0, [r7, #52]	@ 0x34
 8027c1e:	e00e      	b.n	8027c3e <cycle+0x10e>
                else if (msg.qos == QOS2)
 8027c20:	7c3b      	ldrb	r3, [r7, #16]
 8027c22:	2b02      	cmp	r3, #2
 8027c24:	d10b      	bne.n	8027c3e <cycle+0x10e>
                    len = MQTTSerialize_ack(c->buf, c->buf_size, PUBREC, 0, msg.id);
 8027c26:	687b      	ldr	r3, [r7, #4]
 8027c28:	6918      	ldr	r0, [r3, #16]
 8027c2a:	687b      	ldr	r3, [r7, #4]
 8027c2c:	689b      	ldr	r3, [r3, #8]
 8027c2e:	4619      	mov	r1, r3
 8027c30:	8abb      	ldrh	r3, [r7, #20]
 8027c32:	9300      	str	r3, [sp, #0]
 8027c34:	2300      	movs	r3, #0
 8027c36:	2205      	movs	r2, #5
 8027c38:	f001 f9c9 	bl	8028fce <MQTTSerialize_ack>
 8027c3c:	6378      	str	r0, [r7, #52]	@ 0x34
                if (len <= 0)
 8027c3e:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027c40:	2b00      	cmp	r3, #0
 8027c42:	dc03      	bgt.n	8027c4c <cycle+0x11c>
                    rc = FAILURE;
 8027c44:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027c48:	633b      	str	r3, [r7, #48]	@ 0x30
 8027c4a:	e005      	b.n	8027c58 <cycle+0x128>
                else
                    rc = sendPacket(c, len, timer);
 8027c4c:	683a      	ldr	r2, [r7, #0]
 8027c4e:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8027c50:	6878      	ldr	r0, [r7, #4]
 8027c52:	f7ff fcb6 	bl	80275c2 <sendPacket>
 8027c56:	6338      	str	r0, [r7, #48]	@ 0x30
                if (rc == FAILURE)
 8027c58:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8027c5a:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027c5e:	d144      	bne.n	8027cea <cycle+0x1ba>
                    goto exit; // there was a problem
 8027c60:	e053      	b.n	8027d0a <cycle+0x1da>
        case PUBREC:
        case PUBREL:
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8027c62:	687b      	ldr	r3, [r7, #4]
 8027c64:	695c      	ldr	r4, [r3, #20]
 8027c66:	687b      	ldr	r3, [r7, #4]
 8027c68:	68db      	ldr	r3, [r3, #12]
 8027c6a:	f107 020a 	add.w	r2, r7, #10
 8027c6e:	f107 0109 	add.w	r1, r7, #9
 8027c72:	f107 0008 	add.w	r0, r7, #8
 8027c76:	9300      	str	r3, [sp, #0]
 8027c78:	4623      	mov	r3, r4
 8027c7a:	f000 fec1 	bl	8028a00 <MQTTDeserialize_ack>
 8027c7e:	4603      	mov	r3, r0
 8027c80:	2b01      	cmp	r3, #1
 8027c82:	d003      	beq.n	8027c8c <cycle+0x15c>
                rc = FAILURE;
 8027c84:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027c88:	633b      	str	r3, [r7, #48]	@ 0x30
 8027c8a:	e023      	b.n	8027cd4 <cycle+0x1a4>
            else if ((len = MQTTSerialize_ack(c->buf, c->buf_size,
 8027c8c:	687b      	ldr	r3, [r7, #4]
 8027c8e:	6918      	ldr	r0, [r3, #16]
 8027c90:	687b      	ldr	r3, [r7, #4]
 8027c92:	689b      	ldr	r3, [r3, #8]
 8027c94:	4619      	mov	r1, r3
 8027c96:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8027c98:	2b05      	cmp	r3, #5
 8027c9a:	d101      	bne.n	8027ca0 <cycle+0x170>
 8027c9c:	2206      	movs	r2, #6
 8027c9e:	e000      	b.n	8027ca2 <cycle+0x172>
 8027ca0:	2207      	movs	r2, #7
 8027ca2:	897b      	ldrh	r3, [r7, #10]
 8027ca4:	9300      	str	r3, [sp, #0]
 8027ca6:	2300      	movs	r3, #0
 8027ca8:	f001 f991 	bl	8028fce <MQTTSerialize_ack>
 8027cac:	6378      	str	r0, [r7, #52]	@ 0x34
 8027cae:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8027cb0:	2b00      	cmp	r3, #0
 8027cb2:	dc03      	bgt.n	8027cbc <cycle+0x18c>
                (packet_type == PUBREC) ? PUBREL : PUBCOMP, 0, mypacketid)) <= 0)
                rc = FAILURE;
 8027cb4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027cb8:	633b      	str	r3, [r7, #48]	@ 0x30
 8027cba:	e00b      	b.n	8027cd4 <cycle+0x1a4>
            else if ((rc = sendPacket(c, len, timer)) != MQTT_SUCCESS) // send the PUBREL packet
 8027cbc:	683a      	ldr	r2, [r7, #0]
 8027cbe:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 8027cc0:	6878      	ldr	r0, [r7, #4]
 8027cc2:	f7ff fc7e 	bl	80275c2 <sendPacket>
 8027cc6:	6338      	str	r0, [r7, #48]	@ 0x30
 8027cc8:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8027cca:	2b00      	cmp	r3, #0
 8027ccc:	d002      	beq.n	8027cd4 <cycle+0x1a4>
                rc = FAILURE; // there was a problem
 8027cce:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027cd2:	633b      	str	r3, [r7, #48]	@ 0x30
            if (rc == FAILURE)
 8027cd4:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8027cd6:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027cda:	d108      	bne.n	8027cee <cycle+0x1be>
                goto exit; // there was a problem
 8027cdc:	e015      	b.n	8027d0a <cycle+0x1da>
        }

        case PUBCOMP:
            break;
        case PINGRESP:
            c->ping_outstanding = 0;
 8027cde:	687b      	ldr	r3, [r7, #4]
 8027ce0:	2200      	movs	r2, #0
 8027ce2:	771a      	strb	r2, [r3, #28]
            break;
 8027ce4:	e004      	b.n	8027cf0 <cycle+0x1c0>
            break;
 8027ce6:	bf00      	nop
 8027ce8:	e002      	b.n	8027cf0 <cycle+0x1c0>
            break;
 8027cea:	bf00      	nop
 8027cec:	e000      	b.n	8027cf0 <cycle+0x1c0>
            break;
 8027cee:	bf00      	nop
    }

    if (keepalive(c) != MQTT_SUCCESS) {
 8027cf0:	6878      	ldr	r0, [r7, #4]
 8027cf2:	f7ff fe9a 	bl	8027a2a <keepalive>
 8027cf6:	4603      	mov	r3, r0
 8027cf8:	2b00      	cmp	r3, #0
 8027cfa:	d005      	beq.n	8027d08 <cycle+0x1d8>
        //check only keepalive FAILURE status so that previous FAILURE status can be considered as FAULT
        rc = FAILURE;
 8027cfc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027d00:	633b      	str	r3, [r7, #48]	@ 0x30
 8027d02:	e002      	b.n	8027d0a <cycle+0x1da>
                goto exit;
 8027d04:	bf00      	nop
 8027d06:	e000      	b.n	8027d0a <cycle+0x1da>
    }

exit:
 8027d08:	bf00      	nop
    if (rc == MQTT_SUCCESS)
 8027d0a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 8027d0c:	2b00      	cmp	r3, #0
 8027d0e:	d102      	bne.n	8027d16 <cycle+0x1e6>
        rc = packet_type;
 8027d10:	6afb      	ldr	r3, [r7, #44]	@ 0x2c
 8027d12:	633b      	str	r3, [r7, #48]	@ 0x30
 8027d14:	e006      	b.n	8027d24 <cycle+0x1f4>
    else if (c->isconnected)
 8027d16:	687b      	ldr	r3, [r7, #4]
 8027d18:	6a1b      	ldr	r3, [r3, #32]
 8027d1a:	2b00      	cmp	r3, #0
 8027d1c:	d002      	beq.n	8027d24 <cycle+0x1f4>
        MQTTCloseSession(c);
 8027d1e:	6878      	ldr	r0, [r7, #4]
 8027d20:	f7ff fef0 	bl	8027b04 <MQTTCloseSession>
    return rc;
 8027d24:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
}
 8027d26:	4618      	mov	r0, r3
 8027d28:	373c      	adds	r7, #60	@ 0x3c
 8027d2a:	46bd      	mov	sp, r7
 8027d2c:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8027d2e:	bf00      	nop

08027d30 <MQTTYield>:


int MQTTYield(MQTTClient* c, int timeout_ms)
{
 8027d30:	b580      	push	{r7, lr}
 8027d32:	b086      	sub	sp, #24
 8027d34:	af00      	add	r7, sp, #0
 8027d36:	6078      	str	r0, [r7, #4]
 8027d38:	6039      	str	r1, [r7, #0]
    int rc = MQTT_SUCCESS;
 8027d3a:	2300      	movs	r3, #0
 8027d3c:	617b      	str	r3, [r7, #20]
    Timer timer;

    TimerInit(&timer);
 8027d3e:	f107 030c 	add.w	r3, r7, #12
 8027d42:	4618      	mov	r0, r3
 8027d44:	f000 fb3e 	bl	80283c4 <TimerInit>
    TimerCountdownMS(&timer, timeout_ms);
 8027d48:	683a      	ldr	r2, [r7, #0]
 8027d4a:	f107 030c 	add.w	r3, r7, #12
 8027d4e:	4611      	mov	r1, r2
 8027d50:	4618      	mov	r0, r3
 8027d52:	f000 faf5 	bl	8028340 <TimerCountdownMS>

	  do
    {
        if (cycle(c, &timer) < 0)
 8027d56:	f107 030c 	add.w	r3, r7, #12
 8027d5a:	4619      	mov	r1, r3
 8027d5c:	6878      	ldr	r0, [r7, #4]
 8027d5e:	f7ff fee7 	bl	8027b30 <cycle>
 8027d62:	4603      	mov	r3, r0
 8027d64:	2b00      	cmp	r3, #0
 8027d66:	da03      	bge.n	8027d70 <MQTTYield+0x40>
        {
            rc = FAILURE;
 8027d68:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027d6c:	617b      	str	r3, [r7, #20]
            break;
 8027d6e:	e007      	b.n	8027d80 <MQTTYield+0x50>
        }
  	} while (!TimerIsExpired(&timer));
 8027d70:	f107 030c 	add.w	r3, r7, #12
 8027d74:	4618      	mov	r0, r3
 8027d76:	f000 facd 	bl	8028314 <TimerIsExpired>
 8027d7a:	4603      	mov	r3, r0
 8027d7c:	2b00      	cmp	r3, #0
 8027d7e:	d0ea      	beq.n	8027d56 <MQTTYield+0x26>

    return rc;
 8027d80:	697b      	ldr	r3, [r7, #20]
}
 8027d82:	4618      	mov	r0, r3
 8027d84:	3718      	adds	r7, #24
 8027d86:	46bd      	mov	sp, r7
 8027d88:	bd80      	pop	{r7, pc}

08027d8a <waitfor>:
}
#endif


int waitfor(MQTTClient* c, int packet_type, Timer* timer)
{
 8027d8a:	b580      	push	{r7, lr}
 8027d8c:	b086      	sub	sp, #24
 8027d8e:	af00      	add	r7, sp, #0
 8027d90:	60f8      	str	r0, [r7, #12]
 8027d92:	60b9      	str	r1, [r7, #8]
 8027d94:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 8027d96:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027d9a:	617b      	str	r3, [r7, #20]

    do
    {
        if (TimerIsExpired(timer))
 8027d9c:	6878      	ldr	r0, [r7, #4]
 8027d9e:	f000 fab9 	bl	8028314 <TimerIsExpired>
 8027da2:	4603      	mov	r3, r0
 8027da4:	2b00      	cmp	r3, #0
 8027da6:	d10c      	bne.n	8027dc2 <waitfor+0x38>
            break; // we timed out
        rc = cycle(c, timer);
 8027da8:	6879      	ldr	r1, [r7, #4]
 8027daa:	68f8      	ldr	r0, [r7, #12]
 8027dac:	f7ff fec0 	bl	8027b30 <cycle>
 8027db0:	6178      	str	r0, [r7, #20]
    }
    while (rc != packet_type && rc >= 0);
 8027db2:	697a      	ldr	r2, [r7, #20]
 8027db4:	68bb      	ldr	r3, [r7, #8]
 8027db6:	429a      	cmp	r2, r3
 8027db8:	d004      	beq.n	8027dc4 <waitfor+0x3a>
 8027dba:	697b      	ldr	r3, [r7, #20]
 8027dbc:	2b00      	cmp	r3, #0
 8027dbe:	daed      	bge.n	8027d9c <waitfor+0x12>
 8027dc0:	e000      	b.n	8027dc4 <waitfor+0x3a>
            break; // we timed out
 8027dc2:	bf00      	nop

    return rc;
 8027dc4:	697b      	ldr	r3, [r7, #20]
}
 8027dc6:	4618      	mov	r0, r3
 8027dc8:	3718      	adds	r7, #24
 8027dca:	46bd      	mov	sp, r7
 8027dcc:	bd80      	pop	{r7, pc}
	...

08027dd0 <MQTTConnectWithResults>:




int MQTTConnectWithResults(MQTTClient* c, MQTTPacket_connectData* options, MQTTConnackData* data)
{
 8027dd0:	b580      	push	{r7, lr}
 8027dd2:	b09e      	sub	sp, #120	@ 0x78
 8027dd4:	af00      	add	r7, sp, #0
 8027dd6:	60f8      	str	r0, [r7, #12]
 8027dd8:	60b9      	str	r1, [r7, #8]
 8027dda:	607a      	str	r2, [r7, #4]
    Timer connect_timer;
    int rc = FAILURE;
 8027ddc:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027de0:	677b      	str	r3, [r7, #116]	@ 0x74
    MQTTPacket_connectData default_options = MQTTPacket_connectData_initializer;
 8027de2:	4a49      	ldr	r2, [pc, #292]	@ (8027f08 <MQTTConnectWithResults+0x138>)
 8027de4:	f107 0310 	add.w	r3, r7, #16
 8027de8:	4611      	mov	r1, r2
 8027dea:	2258      	movs	r2, #88	@ 0x58
 8027dec:	4618      	mov	r0, r3
 8027dee:	f003 f8be 	bl	802af6e <memcpy>
    int len = 0;
 8027df2:	2300      	movs	r3, #0
 8027df4:	673b      	str	r3, [r7, #112]	@ 0x70

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8027df6:	68fb      	ldr	r3, [r7, #12]
 8027df8:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027dfa:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8027dfe:	4618      	mov	r0, r3
 8027e00:	f7e9 fdc1 	bl	8011986 <osMutexAcquire>
	  if (c->isconnected) /* don't send connect packet again if we are already connected */
 8027e04:	68fb      	ldr	r3, [r7, #12]
 8027e06:	6a1b      	ldr	r3, [r3, #32]
 8027e08:	2b00      	cmp	r3, #0
 8027e0a:	d164      	bne.n	8027ed6 <MQTTConnectWithResults+0x106>
		  goto exit;

    TimerInit(&connect_timer);
 8027e0c:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8027e10:	4618      	mov	r0, r3
 8027e12:	f000 fad7 	bl	80283c4 <TimerInit>
    TimerCountdownMS(&connect_timer, c->command_timeout_ms);
 8027e16:	68fb      	ldr	r3, [r7, #12]
 8027e18:	685a      	ldr	r2, [r3, #4]
 8027e1a:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8027e1e:	4611      	mov	r1, r2
 8027e20:	4618      	mov	r0, r3
 8027e22:	f000 fa8d 	bl	8028340 <TimerCountdownMS>

    if (options == 0)
 8027e26:	68bb      	ldr	r3, [r7, #8]
 8027e28:	2b00      	cmp	r3, #0
 8027e2a:	d102      	bne.n	8027e32 <MQTTConnectWithResults+0x62>
        options = &default_options; /* set default options if none were supplied */
 8027e2c:	f107 0310 	add.w	r3, r7, #16
 8027e30:	60bb      	str	r3, [r7, #8]

    c->keepAliveInterval = options->keepAliveInterval;
 8027e32:	68bb      	ldr	r3, [r7, #8]
 8027e34:	8b1b      	ldrh	r3, [r3, #24]
 8027e36:	461a      	mov	r2, r3
 8027e38:	68fb      	ldr	r3, [r7, #12]
 8027e3a:	619a      	str	r2, [r3, #24]
    c->cleansession = options->cleansession;
 8027e3c:	68bb      	ldr	r3, [r7, #8]
 8027e3e:	7e9b      	ldrb	r3, [r3, #26]
 8027e40:	461a      	mov	r2, r3
 8027e42:	68fb      	ldr	r3, [r7, #12]
 8027e44:	625a      	str	r2, [r3, #36]	@ 0x24
    TimerCountdown(&c->last_received, c->keepAliveInterval);
 8027e46:	68fb      	ldr	r3, [r7, #12]
 8027e48:	f103 0260 	add.w	r2, r3, #96	@ 0x60
 8027e4c:	68fb      	ldr	r3, [r7, #12]
 8027e4e:	699b      	ldr	r3, [r3, #24]
 8027e50:	4619      	mov	r1, r3
 8027e52:	4610      	mov	r0, r2
 8027e54:	f000 fa88 	bl	8028368 <TimerCountdown>
    if ((len = MQTTSerialize_connect(c->buf, c->buf_size, options)) <= 0)
 8027e58:	68fb      	ldr	r3, [r7, #12]
 8027e5a:	6918      	ldr	r0, [r3, #16]
 8027e5c:	68fb      	ldr	r3, [r7, #12]
 8027e5e:	689b      	ldr	r3, [r3, #8]
 8027e60:	68ba      	ldr	r2, [r7, #8]
 8027e62:	4619      	mov	r1, r3
 8027e64:	f000 fbd2 	bl	802860c <MQTTSerialize_connect>
 8027e68:	6738      	str	r0, [r7, #112]	@ 0x70
 8027e6a:	6f3b      	ldr	r3, [r7, #112]	@ 0x70
 8027e6c:	2b00      	cmp	r3, #0
 8027e6e:	dd34      	ble.n	8027eda <MQTTConnectWithResults+0x10a>
        goto exit;
    if ((rc = sendPacket(c, len, &connect_timer)) != MQTT_SUCCESS)  // send the connect packet
 8027e70:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8027e74:	461a      	mov	r2, r3
 8027e76:	6f39      	ldr	r1, [r7, #112]	@ 0x70
 8027e78:	68f8      	ldr	r0, [r7, #12]
 8027e7a:	f7ff fba2 	bl	80275c2 <sendPacket>
 8027e7e:	6778      	str	r0, [r7, #116]	@ 0x74
 8027e80:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8027e82:	2b00      	cmp	r3, #0
 8027e84:	d12b      	bne.n	8027ede <MQTTConnectWithResults+0x10e>
        goto exit; // there was a problem

    // this will be a blocking call, wait for the connack
    if (waitfor(c, CONNACK, &connect_timer) == CONNACK)
 8027e86:	f107 0368 	add.w	r3, r7, #104	@ 0x68
 8027e8a:	461a      	mov	r2, r3
 8027e8c:	2102      	movs	r1, #2
 8027e8e:	68f8      	ldr	r0, [r7, #12]
 8027e90:	f7ff ff7b 	bl	8027d8a <waitfor>
 8027e94:	4603      	mov	r3, r0
 8027e96:	2b02      	cmp	r3, #2
 8027e98:	d119      	bne.n	8027ece <MQTTConnectWithResults+0xfe>
    {
        data->rc = 0;
 8027e9a:	687b      	ldr	r3, [r7, #4]
 8027e9c:	2200      	movs	r2, #0
 8027e9e:	701a      	strb	r2, [r3, #0]
        data->sessionPresent = 0;
 8027ea0:	687b      	ldr	r3, [r7, #4]
 8027ea2:	2200      	movs	r2, #0
 8027ea4:	705a      	strb	r2, [r3, #1]
        if (MQTTDeserialize_connack(&data->sessionPresent, &data->rc, c->readbuf, c->readbuf_size) == 1)
 8027ea6:	687b      	ldr	r3, [r7, #4]
 8027ea8:	1c58      	adds	r0, r3, #1
 8027eaa:	6879      	ldr	r1, [r7, #4]
 8027eac:	68fb      	ldr	r3, [r7, #12]
 8027eae:	695a      	ldr	r2, [r3, #20]
 8027eb0:	68fb      	ldr	r3, [r7, #12]
 8027eb2:	68db      	ldr	r3, [r3, #12]
 8027eb4:	f000 fc96 	bl	80287e4 <MQTTDeserialize_connack>
 8027eb8:	4603      	mov	r3, r0
 8027eba:	2b01      	cmp	r3, #1
 8027ebc:	d103      	bne.n	8027ec6 <MQTTConnectWithResults+0xf6>
            rc = data->rc;
 8027ebe:	687b      	ldr	r3, [r7, #4]
 8027ec0:	781b      	ldrb	r3, [r3, #0]
 8027ec2:	677b      	str	r3, [r7, #116]	@ 0x74
 8027ec4:	e00c      	b.n	8027ee0 <MQTTConnectWithResults+0x110>
//        	rc = MQTT_SUCCESS;
        else
            rc = FAILURE;
 8027ec6:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027eca:	677b      	str	r3, [r7, #116]	@ 0x74
 8027ecc:	e008      	b.n	8027ee0 <MQTTConnectWithResults+0x110>
    }
    else
        rc = FAILURE;
 8027ece:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027ed2:	677b      	str	r3, [r7, #116]	@ 0x74
 8027ed4:	e004      	b.n	8027ee0 <MQTTConnectWithResults+0x110>
		  goto exit;
 8027ed6:	bf00      	nop
 8027ed8:	e002      	b.n	8027ee0 <MQTTConnectWithResults+0x110>
        goto exit;
 8027eda:	bf00      	nop
 8027edc:	e000      	b.n	8027ee0 <MQTTConnectWithResults+0x110>
        goto exit; // there was a problem
 8027ede:	bf00      	nop

exit:
    if (rc == MQTT_SUCCESS)
 8027ee0:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
 8027ee2:	2b00      	cmp	r3, #0
 8027ee4:	d105      	bne.n	8027ef2 <MQTTConnectWithResults+0x122>
    {
        c->isconnected = 1;
 8027ee6:	68fb      	ldr	r3, [r7, #12]
 8027ee8:	2201      	movs	r2, #1
 8027eea:	621a      	str	r2, [r3, #32]
        c->ping_outstanding = 0;
 8027eec:	68fb      	ldr	r3, [r7, #12]
 8027eee:	2200      	movs	r2, #0
 8027ef0:	771a      	strb	r2, [r3, #28]

#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 8027ef2:	68fb      	ldr	r3, [r7, #12]
 8027ef4:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8027ef6:	4618      	mov	r0, r3
 8027ef8:	f7e9 fd90 	bl	8011a1c <osMutexRelease>
    return rc;
 8027efc:	6f7b      	ldr	r3, [r7, #116]	@ 0x74
}
 8027efe:	4618      	mov	r0, r3
 8027f00:	3778      	adds	r7, #120	@ 0x78
 8027f02:	46bd      	mov	sp, r7
 8027f04:	bd80      	pop	{r7, pc}
 8027f06:	bf00      	nop
 8027f08:	08031ba0 	.word	0x08031ba0

08027f0c <MQTTConnect>:


int MQTTConnect(MQTTClient* c, MQTTPacket_connectData* options)
{
 8027f0c:	b580      	push	{r7, lr}
 8027f0e:	b084      	sub	sp, #16
 8027f10:	af00      	add	r7, sp, #0
 8027f12:	6078      	str	r0, [r7, #4]
 8027f14:	6039      	str	r1, [r7, #0]
    MQTTConnackData data;
    return MQTTConnectWithResults(c, options, &data);
 8027f16:	f107 030c 	add.w	r3, r7, #12
 8027f1a:	461a      	mov	r2, r3
 8027f1c:	6839      	ldr	r1, [r7, #0]
 8027f1e:	6878      	ldr	r0, [r7, #4]
 8027f20:	f7ff ff56 	bl	8027dd0 <MQTTConnectWithResults>
 8027f24:	4603      	mov	r3, r0
}
 8027f26:	4618      	mov	r0, r3
 8027f28:	3710      	adds	r7, #16
 8027f2a:	46bd      	mov	sp, r7
 8027f2c:	bd80      	pop	{r7, pc}

08027f2e <MQTTSetMessageHandler>:


int MQTTSetMessageHandler(MQTTClient* c, const char* topicFilter, messageHandler messageHandler)
{
 8027f2e:	b580      	push	{r7, lr}
 8027f30:	b086      	sub	sp, #24
 8027f32:	af00      	add	r7, sp, #0
 8027f34:	60f8      	str	r0, [r7, #12]
 8027f36:	60b9      	str	r1, [r7, #8]
 8027f38:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 8027f3a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027f3e:	617b      	str	r3, [r7, #20]
    int i = -1;
 8027f40:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8027f44:	613b      	str	r3, [r7, #16]

    /* first check for an existing matching slot */
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027f46:	2300      	movs	r3, #0
 8027f48:	613b      	str	r3, [r7, #16]
 8027f4a:	e028      	b.n	8027f9e <MQTTSetMessageHandler+0x70>
    {
        if (c->messageHandlers[i].topicFilter != NULL && strcmp(c->messageHandlers[i].topicFilter, topicFilter) == 0)
 8027f4c:	68fb      	ldr	r3, [r7, #12]
 8027f4e:	693a      	ldr	r2, [r7, #16]
 8027f50:	3205      	adds	r2, #5
 8027f52:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8027f56:	2b00      	cmp	r3, #0
 8027f58:	d01e      	beq.n	8027f98 <MQTTSetMessageHandler+0x6a>
 8027f5a:	68fb      	ldr	r3, [r7, #12]
 8027f5c:	693a      	ldr	r2, [r7, #16]
 8027f5e:	3205      	adds	r2, #5
 8027f60:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8027f64:	68b9      	ldr	r1, [r7, #8]
 8027f66:	4618      	mov	r0, r3
 8027f68:	f7d8 f9ba 	bl	80002e0 <strcmp>
 8027f6c:	4603      	mov	r3, r0
 8027f6e:	2b00      	cmp	r3, #0
 8027f70:	d112      	bne.n	8027f98 <MQTTSetMessageHandler+0x6a>
        {
            if (messageHandler == NULL) /* remove existing */
 8027f72:	687b      	ldr	r3, [r7, #4]
 8027f74:	2b00      	cmp	r3, #0
 8027f76:	d10c      	bne.n	8027f92 <MQTTSetMessageHandler+0x64>
            {
                c->messageHandlers[i].topicFilter = NULL;
 8027f78:	68fb      	ldr	r3, [r7, #12]
 8027f7a:	693a      	ldr	r2, [r7, #16]
 8027f7c:	3205      	adds	r2, #5
 8027f7e:	2100      	movs	r1, #0
 8027f80:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
                c->messageHandlers[i].fp = NULL;
 8027f84:	68fa      	ldr	r2, [r7, #12]
 8027f86:	693b      	ldr	r3, [r7, #16]
 8027f88:	3305      	adds	r3, #5
 8027f8a:	00db      	lsls	r3, r3, #3
 8027f8c:	4413      	add	r3, r2
 8027f8e:	2200      	movs	r2, #0
 8027f90:	605a      	str	r2, [r3, #4]
            }
            rc = MQTT_SUCCESS; /* return i when adding new subscription */
 8027f92:	2300      	movs	r3, #0
 8027f94:	617b      	str	r3, [r7, #20]
            break;
 8027f96:	e005      	b.n	8027fa4 <MQTTSetMessageHandler+0x76>
    for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027f98:	693b      	ldr	r3, [r7, #16]
 8027f9a:	3301      	adds	r3, #1
 8027f9c:	613b      	str	r3, [r7, #16]
 8027f9e:	693b      	ldr	r3, [r7, #16]
 8027fa0:	2b04      	cmp	r3, #4
 8027fa2:	ddd3      	ble.n	8027f4c <MQTTSetMessageHandler+0x1e>
        }
    }
    /* if no existing, look for empty slot (unless we are removing) */
    if (messageHandler != NULL) {
 8027fa4:	687b      	ldr	r3, [r7, #4]
 8027fa6:	2b00      	cmp	r3, #0
 8027fa8:	d026      	beq.n	8027ff8 <MQTTSetMessageHandler+0xca>
        if (rc == FAILURE)
 8027faa:	697b      	ldr	r3, [r7, #20]
 8027fac:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8027fb0:	d112      	bne.n	8027fd8 <MQTTSetMessageHandler+0xaa>
        {
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027fb2:	2300      	movs	r3, #0
 8027fb4:	613b      	str	r3, [r7, #16]
 8027fb6:	e00c      	b.n	8027fd2 <MQTTSetMessageHandler+0xa4>
            {
                if (c->messageHandlers[i].topicFilter == NULL)
 8027fb8:	68fb      	ldr	r3, [r7, #12]
 8027fba:	693a      	ldr	r2, [r7, #16]
 8027fbc:	3205      	adds	r2, #5
 8027fbe:	f853 3032 	ldr.w	r3, [r3, r2, lsl #3]
 8027fc2:	2b00      	cmp	r3, #0
 8027fc4:	d102      	bne.n	8027fcc <MQTTSetMessageHandler+0x9e>
                {
                    rc = MQTT_SUCCESS;
 8027fc6:	2300      	movs	r3, #0
 8027fc8:	617b      	str	r3, [r7, #20]
                    break;
 8027fca:	e005      	b.n	8027fd8 <MQTTSetMessageHandler+0xaa>
            for (i = 0; i < MAX_MESSAGE_HANDLERS; ++i)
 8027fcc:	693b      	ldr	r3, [r7, #16]
 8027fce:	3301      	adds	r3, #1
 8027fd0:	613b      	str	r3, [r7, #16]
 8027fd2:	693b      	ldr	r3, [r7, #16]
 8027fd4:	2b04      	cmp	r3, #4
 8027fd6:	ddef      	ble.n	8027fb8 <MQTTSetMessageHandler+0x8a>
                }
            }
        }
        if (i < MAX_MESSAGE_HANDLERS)
 8027fd8:	693b      	ldr	r3, [r7, #16]
 8027fda:	2b04      	cmp	r3, #4
 8027fdc:	dc0c      	bgt.n	8027ff8 <MQTTSetMessageHandler+0xca>
        {
            c->messageHandlers[i].topicFilter = topicFilter;
 8027fde:	68fb      	ldr	r3, [r7, #12]
 8027fe0:	693a      	ldr	r2, [r7, #16]
 8027fe2:	3205      	adds	r2, #5
 8027fe4:	68b9      	ldr	r1, [r7, #8]
 8027fe6:	f843 1032 	str.w	r1, [r3, r2, lsl #3]
            c->messageHandlers[i].fp = messageHandler;
 8027fea:	68fa      	ldr	r2, [r7, #12]
 8027fec:	693b      	ldr	r3, [r7, #16]
 8027fee:	3305      	adds	r3, #5
 8027ff0:	00db      	lsls	r3, r3, #3
 8027ff2:	4413      	add	r3, r2
 8027ff4:	687a      	ldr	r2, [r7, #4]
 8027ff6:	605a      	str	r2, [r3, #4]
        }
    }
    return rc;
 8027ff8:	697b      	ldr	r3, [r7, #20]
}
 8027ffa:	4618      	mov	r0, r3
 8027ffc:	3718      	adds	r7, #24
 8027ffe:	46bd      	mov	sp, r7
 8028000:	bd80      	pop	{r7, pc}

08028002 <MQTTSubscribeWithResults>:


int MQTTSubscribeWithResults(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler, MQTTSubackData* data)
{
 8028002:	b5b0      	push	{r4, r5, r7, lr}
 8028004:	b094      	sub	sp, #80	@ 0x50
 8028006:	af04      	add	r7, sp, #16
 8028008:	60f8      	str	r0, [r7, #12]
 802800a:	60b9      	str	r1, [r7, #8]
 802800c:	603b      	str	r3, [r7, #0]
 802800e:	4613      	mov	r3, r2
 8028010:	71fb      	strb	r3, [r7, #7]
    int rc = FAILURE;
 8028012:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028016:	63fb      	str	r3, [r7, #60]	@ 0x3c
    Timer timer;
    int len = 0;
 8028018:	2300      	movs	r3, #0
 802801a:	63bb      	str	r3, [r7, #56]	@ 0x38
    MQTTString topic = MQTTString_initializer;
 802801c:	2300      	movs	r3, #0
 802801e:	627b      	str	r3, [r7, #36]	@ 0x24
 8028020:	2300      	movs	r3, #0
 8028022:	62bb      	str	r3, [r7, #40]	@ 0x28
 8028024:	2300      	movs	r3, #0
 8028026:	62fb      	str	r3, [r7, #44]	@ 0x2c
    topic.cstring = (char *)topicFilter;
 8028028:	68bb      	ldr	r3, [r7, #8]
 802802a:	627b      	str	r3, [r7, #36]	@ 0x24

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 802802c:	68fb      	ldr	r3, [r7, #12]
 802802e:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8028030:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8028034:	4618      	mov	r0, r3
 8028036:	f7e9 fca6 	bl	8011986 <osMutexAcquire>
	  if (!c->isconnected)
 802803a:	68fb      	ldr	r3, [r7, #12]
 802803c:	6a1b      	ldr	r3, [r3, #32]
 802803e:	2b00      	cmp	r3, #0
 8028040:	d069      	beq.n	8028116 <MQTTSubscribeWithResults+0x114>
		    goto exit;

    TimerInit(&timer);
 8028042:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8028046:	4618      	mov	r0, r3
 8028048:	f000 f9bc 	bl	80283c4 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 802804c:	68fb      	ldr	r3, [r7, #12]
 802804e:	685a      	ldr	r2, [r3, #4]
 8028050:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8028054:	4611      	mov	r1, r2
 8028056:	4618      	mov	r0, r3
 8028058:	f000 f972 	bl	8028340 <TimerCountdownMS>
    int _qos[1] = {(int)qos};
 802805c:	79fb      	ldrb	r3, [r7, #7]
 802805e:	623b      	str	r3, [r7, #32]
    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, _qos);
 8028060:	68fb      	ldr	r3, [r7, #12]
 8028062:	691c      	ldr	r4, [r3, #16]
 8028064:	68fb      	ldr	r3, [r7, #12]
 8028066:	689b      	ldr	r3, [r3, #8]
 8028068:	461d      	mov	r5, r3
 802806a:	68f8      	ldr	r0, [r7, #12]
 802806c:	f7ff fa90 	bl	8027590 <getNextPacketId>
 8028070:	4603      	mov	r3, r0
 8028072:	b29a      	uxth	r2, r3
 8028074:	f107 0320 	add.w	r3, r7, #32
 8028078:	9302      	str	r3, [sp, #8]
 802807a:	f107 0324 	add.w	r3, r7, #36	@ 0x24
 802807e:	9301      	str	r3, [sp, #4]
 8028080:	2301      	movs	r3, #1
 8028082:	9300      	str	r3, [sp, #0]
 8028084:	4613      	mov	r3, r2
 8028086:	2200      	movs	r2, #0
 8028088:	4629      	mov	r1, r5
 802808a:	4620      	mov	r0, r4
 802808c:	f001 f81b 	bl	80290c6 <MQTTSerialize_subscribe>
 8028090:	63b8      	str	r0, [r7, #56]	@ 0x38
//    len = MQTTSerialize_subscribe(c->buf, c->buf_size, 0, getNextPacketId(c), 1, &topic, (int*)&qos);
    if (len <= 0)
 8028092:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 8028094:	2b00      	cmp	r3, #0
 8028096:	dd40      	ble.n	802811a <MQTTSubscribeWithResults+0x118>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 8028098:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 802809c:	461a      	mov	r2, r3
 802809e:	6bb9      	ldr	r1, [r7, #56]	@ 0x38
 80280a0:	68f8      	ldr	r0, [r7, #12]
 80280a2:	f7ff fa8e 	bl	80275c2 <sendPacket>
 80280a6:	63f8      	str	r0, [r7, #60]	@ 0x3c
 80280a8:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 80280aa:	2b00      	cmp	r3, #0
 80280ac:	d137      	bne.n	802811e <MQTTSubscribeWithResults+0x11c>
        goto exit;             // there was a problem

    if (waitfor(c, SUBACK, &timer) == SUBACK)      // wait for suback
 80280ae:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 80280b2:	461a      	mov	r2, r3
 80280b4:	2109      	movs	r1, #9
 80280b6:	68f8      	ldr	r0, [r7, #12]
 80280b8:	f7ff fe67 	bl	8027d8a <waitfor>
 80280bc:	4603      	mov	r3, r0
 80280be:	2b09      	cmp	r3, #9
 80280c0:	d125      	bne.n	802810e <MQTTSubscribeWithResults+0x10c>
    {
        int count = 0;
 80280c2:	2300      	movs	r3, #0
 80280c4:	61fb      	str	r3, [r7, #28]
        unsigned short mypacketid;
        data->grantedQoS = QOS0;
 80280c6:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80280c8:	2200      	movs	r2, #0
 80280ca:	701a      	strb	r2, [r3, #0]
        int _grantedQoS[1] = {(int)&data->grantedQoS};
 80280cc:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80280ce:	617b      	str	r3, [r7, #20]
//        if (MQTTDeserialize_suback(&mypacketid, 1, &count, (int*)&data->grantedQoS, c->readbuf, c->readbuf_size) == 1)
        if (MQTTDeserialize_suback(&mypacketid, 1, &count, _grantedQoS, c->readbuf, c->readbuf_size) == 1)
 80280d0:	68fb      	ldr	r3, [r7, #12]
 80280d2:	695b      	ldr	r3, [r3, #20]
 80280d4:	68fa      	ldr	r2, [r7, #12]
 80280d6:	68d2      	ldr	r2, [r2, #12]
 80280d8:	4614      	mov	r4, r2
 80280da:	f107 0114 	add.w	r1, r7, #20
 80280de:	f107 021c 	add.w	r2, r7, #28
 80280e2:	f107 001a 	add.w	r0, r7, #26
 80280e6:	9401      	str	r4, [sp, #4]
 80280e8:	9300      	str	r3, [sp, #0]
 80280ea:	460b      	mov	r3, r1
 80280ec:	2101      	movs	r1, #1
 80280ee:	f001 f866 	bl	80291be <MQTTDeserialize_suback>
 80280f2:	4603      	mov	r3, r0
 80280f4:	2b01      	cmp	r3, #1
 80280f6:	d113      	bne.n	8028120 <MQTTSubscribeWithResults+0x11e>
        {
            if (data->grantedQoS != 0x80)
 80280f8:	6d3b      	ldr	r3, [r7, #80]	@ 0x50
 80280fa:	781b      	ldrb	r3, [r3, #0]
 80280fc:	2b80      	cmp	r3, #128	@ 0x80
 80280fe:	d00f      	beq.n	8028120 <MQTTSubscribeWithResults+0x11e>
                rc = MQTTSetMessageHandler(c, topicFilter, messageHandler);
 8028100:	683a      	ldr	r2, [r7, #0]
 8028102:	68b9      	ldr	r1, [r7, #8]
 8028104:	68f8      	ldr	r0, [r7, #12]
 8028106:	f7ff ff12 	bl	8027f2e <MQTTSetMessageHandler>
 802810a:	63f8      	str	r0, [r7, #60]	@ 0x3c
 802810c:	e008      	b.n	8028120 <MQTTSubscribeWithResults+0x11e>
        }
    }
    else
        rc = FAILURE;
 802810e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028112:	63fb      	str	r3, [r7, #60]	@ 0x3c
 8028114:	e004      	b.n	8028120 <MQTTSubscribeWithResults+0x11e>
		    goto exit;
 8028116:	bf00      	nop
 8028118:	e002      	b.n	8028120 <MQTTSubscribeWithResults+0x11e>
        goto exit;
 802811a:	bf00      	nop
 802811c:	e000      	b.n	8028120 <MQTTSubscribeWithResults+0x11e>
        goto exit;             // there was a problem
 802811e:	bf00      	nop

exit:
    if (rc == FAILURE)
 8028120:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8028122:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 8028126:	d102      	bne.n	802812e <MQTTSubscribeWithResults+0x12c>
        MQTTCloseSession(c);
 8028128:	68f8      	ldr	r0, [r7, #12]
 802812a:	f7ff fceb 	bl	8027b04 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	osMutexRelease(mqttMutex);
	osMutexRelease(c->mutex);
 802812e:	68fb      	ldr	r3, [r7, #12]
 8028130:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8028132:	4618      	mov	r0, r3
 8028134:	f7e9 fc72 	bl	8011a1c <osMutexRelease>
    return rc;
 8028138:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
}
 802813a:	4618      	mov	r0, r3
 802813c:	3740      	adds	r7, #64	@ 0x40
 802813e:	46bd      	mov	sp, r7
 8028140:	bdb0      	pop	{r4, r5, r7, pc}

08028142 <MQTTSubscribe>:


int MQTTSubscribe(MQTTClient* c, const char* topicFilter, enum QoS qos,
       messageHandler messageHandler)
{
 8028142:	b580      	push	{r7, lr}
 8028144:	b088      	sub	sp, #32
 8028146:	af02      	add	r7, sp, #8
 8028148:	60f8      	str	r0, [r7, #12]
 802814a:	60b9      	str	r1, [r7, #8]
 802814c:	603b      	str	r3, [r7, #0]
 802814e:	4613      	mov	r3, r2
 8028150:	71fb      	strb	r3, [r7, #7]
    MQTTSubackData data;
    return MQTTSubscribeWithResults(c, topicFilter, qos, messageHandler, &data);
 8028152:	79fa      	ldrb	r2, [r7, #7]
 8028154:	f107 0314 	add.w	r3, r7, #20
 8028158:	9300      	str	r3, [sp, #0]
 802815a:	683b      	ldr	r3, [r7, #0]
 802815c:	68b9      	ldr	r1, [r7, #8]
 802815e:	68f8      	ldr	r0, [r7, #12]
 8028160:	f7ff ff4f 	bl	8028002 <MQTTSubscribeWithResults>
 8028164:	4603      	mov	r3, r0
}
 8028166:	4618      	mov	r0, r3
 8028168:	3718      	adds	r7, #24
 802816a:	46bd      	mov	sp, r7
 802816c:	bd80      	pop	{r7, pc}

0802816e <MQTTPublish>:
    return rc;
}


int MQTTPublish(MQTTClient* c, const char* topicName, MQTTMessage* message)
{
 802816e:	b5f0      	push	{r4, r5, r6, r7, lr}
 8028170:	b097      	sub	sp, #92	@ 0x5c
 8028172:	af08      	add	r7, sp, #32
 8028174:	60f8      	str	r0, [r7, #12]
 8028176:	60b9      	str	r1, [r7, #8]
 8028178:	607a      	str	r2, [r7, #4]
    int rc = FAILURE;
 802817a:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802817e:	637b      	str	r3, [r7, #52]	@ 0x34
    Timer timer;
    MQTTString topic = MQTTString_initializer;
 8028180:	2300      	movs	r3, #0
 8028182:	61fb      	str	r3, [r7, #28]
 8028184:	2300      	movs	r3, #0
 8028186:	623b      	str	r3, [r7, #32]
 8028188:	2300      	movs	r3, #0
 802818a:	627b      	str	r3, [r7, #36]	@ 0x24
    topic.cstring = (char *)topicName;
 802818c:	68bb      	ldr	r3, [r7, #8]
 802818e:	61fb      	str	r3, [r7, #28]
    int len = 0;
 8028190:	2300      	movs	r3, #0
 8028192:	633b      	str	r3, [r7, #48]	@ 0x30

#if defined(MQTT_TASK)
	  MutexLock(&c->mutex);
#endif
//	  osMutexAcquire(mqttMutex, osWaitForever);
	  osMutexAcquire(c->mutex, osWaitForever);
 8028194:	68fb      	ldr	r3, [r7, #12]
 8028196:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8028198:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 802819c:	4618      	mov	r0, r3
 802819e:	f7e9 fbf2 	bl	8011986 <osMutexAcquire>
	  if (!c->isconnected)
 80281a2:	68fb      	ldr	r3, [r7, #12]
 80281a4:	6a1b      	ldr	r3, [r3, #32]
 80281a6:	2b00      	cmp	r3, #0
 80281a8:	f000 809b 	beq.w	80282e2 <MQTTPublish+0x174>
		    goto exit;

    TimerInit(&timer);
 80281ac:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 80281b0:	4618      	mov	r0, r3
 80281b2:	f000 f907 	bl	80283c4 <TimerInit>
    TimerCountdownMS(&timer, c->command_timeout_ms);
 80281b6:	68fb      	ldr	r3, [r7, #12]
 80281b8:	685a      	ldr	r2, [r3, #4]
 80281ba:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 80281be:	4611      	mov	r1, r2
 80281c0:	4618      	mov	r0, r3
 80281c2:	f000 f8bd 	bl	8028340 <TimerCountdownMS>

    if (message->qos == QOS1 || message->qos == QOS2)
 80281c6:	687b      	ldr	r3, [r7, #4]
 80281c8:	781b      	ldrb	r3, [r3, #0]
 80281ca:	2b01      	cmp	r3, #1
 80281cc:	d003      	beq.n	80281d6 <MQTTPublish+0x68>
 80281ce:	687b      	ldr	r3, [r7, #4]
 80281d0:	781b      	ldrb	r3, [r3, #0]
 80281d2:	2b02      	cmp	r3, #2
 80281d4:	d106      	bne.n	80281e4 <MQTTPublish+0x76>
        message->id = getNextPacketId(c);
 80281d6:	68f8      	ldr	r0, [r7, #12]
 80281d8:	f7ff f9da 	bl	8027590 <getNextPacketId>
 80281dc:	4603      	mov	r3, r0
 80281de:	b29a      	uxth	r2, r3
 80281e0:	687b      	ldr	r3, [r7, #4]
 80281e2:	809a      	strh	r2, [r3, #4]

    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 80281e4:	68fb      	ldr	r3, [r7, #12]
 80281e6:	691b      	ldr	r3, [r3, #16]
 80281e8:	603b      	str	r3, [r7, #0]
 80281ea:	68fb      	ldr	r3, [r7, #12]
 80281ec:	689b      	ldr	r3, [r3, #8]
 80281ee:	469c      	mov	ip, r3
 80281f0:	687b      	ldr	r3, [r7, #4]
 80281f2:	781b      	ldrb	r3, [r3, #0]
 80281f4:	469e      	mov	lr, r3
 80281f6:	687b      	ldr	r3, [r7, #4]
 80281f8:	785d      	ldrb	r5, [r3, #1]
 80281fa:	687b      	ldr	r3, [r7, #4]
 80281fc:	889e      	ldrh	r6, [r3, #4]
              topic, (unsigned char*)message->payload, message->payloadlen);
 80281fe:	687b      	ldr	r3, [r7, #4]
 8028200:	689b      	ldr	r3, [r3, #8]
 8028202:	687a      	ldr	r2, [r7, #4]
 8028204:	68d2      	ldr	r2, [r2, #12]
    len = MQTTSerialize_publish(c->buf, c->buf_size, 0, message->qos, message->retained, message->id,
 8028206:	9206      	str	r2, [sp, #24]
 8028208:	9305      	str	r3, [sp, #20]
 802820a:	ac02      	add	r4, sp, #8
 802820c:	f107 031c 	add.w	r3, r7, #28
 8028210:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028214:	e884 0007 	stmia.w	r4, {r0, r1, r2}
 8028218:	9601      	str	r6, [sp, #4]
 802821a:	9500      	str	r5, [sp, #0]
 802821c:	4673      	mov	r3, lr
 802821e:	2200      	movs	r2, #0
 8028220:	4661      	mov	r1, ip
 8028222:	6838      	ldr	r0, [r7, #0]
 8028224:	f000 fe5d 	bl	8028ee2 <MQTTSerialize_publish>
 8028228:	6338      	str	r0, [r7, #48]	@ 0x30
    if (len <= 0)
 802822a:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 802822c:	2b00      	cmp	r3, #0
 802822e:	dd5a      	ble.n	80282e6 <MQTTPublish+0x178>
        goto exit;
    if ((rc = sendPacket(c, len, &timer)) != MQTT_SUCCESS) // send the subscribe packet
 8028230:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8028234:	461a      	mov	r2, r3
 8028236:	6b39      	ldr	r1, [r7, #48]	@ 0x30
 8028238:	68f8      	ldr	r0, [r7, #12]
 802823a:	f7ff f9c2 	bl	80275c2 <sendPacket>
 802823e:	6378      	str	r0, [r7, #52]	@ 0x34
 8028240:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 8028242:	2b00      	cmp	r3, #0
 8028244:	d151      	bne.n	80282ea <MQTTPublish+0x17c>
        goto exit; // there was a problem

    if (message->qos == QOS1)
 8028246:	687b      	ldr	r3, [r7, #4]
 8028248:	781b      	ldrb	r3, [r3, #0]
 802824a:	2b01      	cmp	r3, #1
 802824c:	d122      	bne.n	8028294 <MQTTPublish+0x126>
    {
        if (waitfor(c, PUBACK, &timer) == PUBACK)
 802824e:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 8028252:	461a      	mov	r2, r3
 8028254:	2104      	movs	r1, #4
 8028256:	68f8      	ldr	r0, [r7, #12]
 8028258:	f7ff fd97 	bl	8027d8a <waitfor>
 802825c:	4603      	mov	r3, r0
 802825e:	2b04      	cmp	r3, #4
 8028260:	d114      	bne.n	802828c <MQTTPublish+0x11e>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 8028262:	68fb      	ldr	r3, [r7, #12]
 8028264:	695c      	ldr	r4, [r3, #20]
 8028266:	68fb      	ldr	r3, [r7, #12]
 8028268:	68db      	ldr	r3, [r3, #12]
 802826a:	f107 021a 	add.w	r2, r7, #26
 802826e:	f107 0119 	add.w	r1, r7, #25
 8028272:	f107 0018 	add.w	r0, r7, #24
 8028276:	9300      	str	r3, [sp, #0]
 8028278:	4623      	mov	r3, r4
 802827a:	f000 fbc1 	bl	8028a00 <MQTTDeserialize_ack>
 802827e:	4603      	mov	r3, r0
 8028280:	2b01      	cmp	r3, #1
 8028282:	d035      	beq.n	80282f0 <MQTTPublish+0x182>
                rc = FAILURE;
 8028284:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028288:	637b      	str	r3, [r7, #52]	@ 0x34
 802828a:	e031      	b.n	80282f0 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 802828c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028290:	637b      	str	r3, [r7, #52]	@ 0x34
 8028292:	e02d      	b.n	80282f0 <MQTTPublish+0x182>
    }
    else if (message->qos == QOS2)
 8028294:	687b      	ldr	r3, [r7, #4]
 8028296:	781b      	ldrb	r3, [r3, #0]
 8028298:	2b02      	cmp	r3, #2
 802829a:	d128      	bne.n	80282ee <MQTTPublish+0x180>
    {
        if (waitfor(c, PUBCOMP, &timer) == PUBCOMP)
 802829c:	f107 0328 	add.w	r3, r7, #40	@ 0x28
 80282a0:	461a      	mov	r2, r3
 80282a2:	2107      	movs	r1, #7
 80282a4:	68f8      	ldr	r0, [r7, #12]
 80282a6:	f7ff fd70 	bl	8027d8a <waitfor>
 80282aa:	4603      	mov	r3, r0
 80282ac:	2b07      	cmp	r3, #7
 80282ae:	d114      	bne.n	80282da <MQTTPublish+0x16c>
        {
            unsigned short mypacketid;
            unsigned char dup, type;
            if (MQTTDeserialize_ack(&type, &dup, &mypacketid, c->readbuf, c->readbuf_size) != 1)
 80282b0:	68fb      	ldr	r3, [r7, #12]
 80282b2:	695c      	ldr	r4, [r3, #20]
 80282b4:	68fb      	ldr	r3, [r7, #12]
 80282b6:	68db      	ldr	r3, [r3, #12]
 80282b8:	f107 0216 	add.w	r2, r7, #22
 80282bc:	f107 0115 	add.w	r1, r7, #21
 80282c0:	f107 0014 	add.w	r0, r7, #20
 80282c4:	9300      	str	r3, [sp, #0]
 80282c6:	4623      	mov	r3, r4
 80282c8:	f000 fb9a 	bl	8028a00 <MQTTDeserialize_ack>
 80282cc:	4603      	mov	r3, r0
 80282ce:	2b01      	cmp	r3, #1
 80282d0:	d00e      	beq.n	80282f0 <MQTTPublish+0x182>
                rc = FAILURE;
 80282d2:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80282d6:	637b      	str	r3, [r7, #52]	@ 0x34
 80282d8:	e00a      	b.n	80282f0 <MQTTPublish+0x182>
        }
        else
            rc = FAILURE;
 80282da:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80282de:	637b      	str	r3, [r7, #52]	@ 0x34
 80282e0:	e006      	b.n	80282f0 <MQTTPublish+0x182>
		    goto exit;
 80282e2:	bf00      	nop
 80282e4:	e004      	b.n	80282f0 <MQTTPublish+0x182>
        goto exit;
 80282e6:	bf00      	nop
 80282e8:	e002      	b.n	80282f0 <MQTTPublish+0x182>
        goto exit; // there was a problem
 80282ea:	bf00      	nop
 80282ec:	e000      	b.n	80282f0 <MQTTPublish+0x182>
    }

exit:
 80282ee:	bf00      	nop
    if (rc == FAILURE)
 80282f0:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80282f2:	f1b3 3fff 	cmp.w	r3, #4294967295	@ 0xffffffff
 80282f6:	d102      	bne.n	80282fe <MQTTPublish+0x190>
        MQTTCloseSession(c);
 80282f8:	68f8      	ldr	r0, [r7, #12]
 80282fa:	f7ff fc03 	bl	8027b04 <MQTTCloseSession>
#if defined(MQTT_TASK)
	  MutexUnlock(&c->mutex);
#endif
//	  osMutexRelease(mqttMutex);
	  osMutexRelease(c->mutex);
 80282fe:	68fb      	ldr	r3, [r7, #12]
 8028300:	6e9b      	ldr	r3, [r3, #104]	@ 0x68
 8028302:	4618      	mov	r0, r3
 8028304:	f7e9 fb8a 	bl	8011a1c <osMutexRelease>
    return rc;
 8028308:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
}
 802830a:	4618      	mov	r0, r3
 802830c:	373c      	adds	r7, #60	@ 0x3c
 802830e:	46bd      	mov	sp, r7
 8028310:	bdf0      	pop	{r4, r5, r6, r7, pc}
	...

08028314 <TimerIsExpired>:
#define SERVER_IP4	34

uint32_t MilliTimer;

//Timer functions
char TimerIsExpired(Timer *timer) {
 8028314:	b480      	push	{r7}
 8028316:	b085      	sub	sp, #20
 8028318:	af00      	add	r7, sp, #0
 802831a:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 802831c:	687b      	ldr	r3, [r7, #4]
 802831e:	685a      	ldr	r2, [r3, #4]
 8028320:	4b06      	ldr	r3, [pc, #24]	@ (802833c <TimerIsExpired+0x28>)
 8028322:	681b      	ldr	r3, [r3, #0]
 8028324:	1ad3      	subs	r3, r2, r3
 8028326:	60fb      	str	r3, [r7, #12]
	return (left < 0);
 8028328:	68fb      	ldr	r3, [r7, #12]
 802832a:	0fdb      	lsrs	r3, r3, #31
 802832c:	b2db      	uxtb	r3, r3
}
 802832e:	4618      	mov	r0, r3
 8028330:	3714      	adds	r7, #20
 8028332:	46bd      	mov	sp, r7
 8028334:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028338:	4770      	bx	lr
 802833a:	bf00      	nop
 802833c:	2402b154 	.word	0x2402b154

08028340 <TimerCountdownMS>:

void TimerCountdownMS(Timer *timer, unsigned int timeout) {
 8028340:	b480      	push	{r7}
 8028342:	b083      	sub	sp, #12
 8028344:	af00      	add	r7, sp, #0
 8028346:	6078      	str	r0, [r7, #4]
 8028348:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + timeout;
 802834a:	4b06      	ldr	r3, [pc, #24]	@ (8028364 <TimerCountdownMS+0x24>)
 802834c:	681a      	ldr	r2, [r3, #0]
 802834e:	683b      	ldr	r3, [r7, #0]
 8028350:	441a      	add	r2, r3
 8028352:	687b      	ldr	r3, [r7, #4]
 8028354:	605a      	str	r2, [r3, #4]
}
 8028356:	bf00      	nop
 8028358:	370c      	adds	r7, #12
 802835a:	46bd      	mov	sp, r7
 802835c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028360:	4770      	bx	lr
 8028362:	bf00      	nop
 8028364:	2402b154 	.word	0x2402b154

08028368 <TimerCountdown>:

void TimerCountdown(Timer *timer, unsigned int timeout) {
 8028368:	b480      	push	{r7}
 802836a:	b083      	sub	sp, #12
 802836c:	af00      	add	r7, sp, #0
 802836e:	6078      	str	r0, [r7, #4]
 8028370:	6039      	str	r1, [r7, #0]
	timer->end_time = MilliTimer + (timeout * 1000);
 8028372:	683b      	ldr	r3, [r7, #0]
 8028374:	f44f 727a 	mov.w	r2, #1000	@ 0x3e8
 8028378:	fb03 f202 	mul.w	r2, r3, r2
 802837c:	4b05      	ldr	r3, [pc, #20]	@ (8028394 <TimerCountdown+0x2c>)
 802837e:	681b      	ldr	r3, [r3, #0]
 8028380:	441a      	add	r2, r3
 8028382:	687b      	ldr	r3, [r7, #4]
 8028384:	605a      	str	r2, [r3, #4]
}
 8028386:	bf00      	nop
 8028388:	370c      	adds	r7, #12
 802838a:	46bd      	mov	sp, r7
 802838c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028390:	4770      	bx	lr
 8028392:	bf00      	nop
 8028394:	2402b154 	.word	0x2402b154

08028398 <TimerLeftMS>:

int TimerLeftMS(Timer *timer) {
 8028398:	b480      	push	{r7}
 802839a:	b085      	sub	sp, #20
 802839c:	af00      	add	r7, sp, #0
 802839e:	6078      	str	r0, [r7, #4]
	long left = timer->end_time - MilliTimer;
 80283a0:	687b      	ldr	r3, [r7, #4]
 80283a2:	685a      	ldr	r2, [r3, #4]
 80283a4:	4b06      	ldr	r3, [pc, #24]	@ (80283c0 <TimerLeftMS+0x28>)
 80283a6:	681b      	ldr	r3, [r3, #0]
 80283a8:	1ad3      	subs	r3, r2, r3
 80283aa:	60fb      	str	r3, [r7, #12]
	return (left < 0) ? 0 : left;
 80283ac:	68fb      	ldr	r3, [r7, #12]
 80283ae:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
}
 80283b2:	4618      	mov	r0, r3
 80283b4:	3714      	adds	r7, #20
 80283b6:	46bd      	mov	sp, r7
 80283b8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80283bc:	4770      	bx	lr
 80283be:	bf00      	nop
 80283c0:	2402b154 	.word	0x2402b154

080283c4 <TimerInit>:

void TimerInit(Timer *timer) {
 80283c4:	b480      	push	{r7}
 80283c6:	b083      	sub	sp, #12
 80283c8:	af00      	add	r7, sp, #0
 80283ca:	6078      	str	r0, [r7, #4]
	timer->end_time = 0;
 80283cc:	687b      	ldr	r3, [r7, #4]
 80283ce:	2200      	movs	r2, #0
 80283d0:	605a      	str	r2, [r3, #4]
}
 80283d2:	bf00      	nop
 80283d4:	370c      	adds	r7, #12
 80283d6:	46bd      	mov	sp, r7
 80283d8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80283dc:	4770      	bx	lr
	...

080283e0 <NewNetwork>:

#ifdef MQTT_LWIP_SOCKET
void NewNetwork(Network *n) {
 80283e0:	b480      	push	{r7}
 80283e2:	b083      	sub	sp, #12
 80283e4:	af00      	add	r7, sp, #0
 80283e6:	6078      	str	r0, [r7, #4]
	n->socket = 0; //clear
 80283e8:	687b      	ldr	r3, [r7, #4]
 80283ea:	2200      	movs	r2, #0
 80283ec:	601a      	str	r2, [r3, #0]
	n->mqttread = net_read; //receive function
 80283ee:	687b      	ldr	r3, [r7, #4]
 80283f0:	4a06      	ldr	r2, [pc, #24]	@ (802840c <NewNetwork+0x2c>)
 80283f2:	605a      	str	r2, [r3, #4]
	n->mqttwrite = net_write; //send function
 80283f4:	687b      	ldr	r3, [r7, #4]
 80283f6:	4a06      	ldr	r2, [pc, #24]	@ (8028410 <NewNetwork+0x30>)
 80283f8:	609a      	str	r2, [r3, #8]
	n->disconnect = net_disconnect; //disconnection function
 80283fa:	687b      	ldr	r3, [r7, #4]
 80283fc:	4a05      	ldr	r2, [pc, #20]	@ (8028414 <NewNetwork+0x34>)
 80283fe:	60da      	str	r2, [r3, #12]
}
 8028400:	bf00      	nop
 8028402:	370c      	adds	r7, #12
 8028404:	46bd      	mov	sp, r7
 8028406:	f85d 7b04 	ldr.w	r7, [sp], #4
 802840a:	4770      	bx	lr
 802840c:	080284b5 	.word	0x080284b5
 8028410:	08028505 	.word	0x08028505
 8028414:	0802852b 	.word	0x0802852b

08028418 <ConnectNetwork>:

int ConnectNetwork(Network *n, char *ip, int port) {
 8028418:	b580      	push	{r7, lr}
 802841a:	b088      	sub	sp, #32
 802841c:	af00      	add	r7, sp, #0
 802841e:	60f8      	str	r0, [r7, #12]
 8028420:	60b9      	str	r1, [r7, #8]
 8028422:	607a      	str	r2, [r7, #4]
	struct sockaddr_in server_addr;

	if(n->socket)
 8028424:	68fb      	ldr	r3, [r7, #12]
 8028426:	681b      	ldr	r3, [r3, #0]
 8028428:	2b00      	cmp	r3, #0
 802842a:	d004      	beq.n	8028436 <ConnectNetwork+0x1e>
	{
		close(n->socket);
 802842c:	68fb      	ldr	r3, [r7, #12]
 802842e:	681b      	ldr	r3, [r3, #0]
 8028430:	4618      	mov	r0, r3
 8028432:	f7f0 fa65 	bl	8018900 <lwip_close>
	}

	n->socket = socket(PF_INET, SOCK_STREAM, 0); //create socket
 8028436:	2200      	movs	r2, #0
 8028438:	2101      	movs	r1, #1
 802843a:	2002      	movs	r0, #2
 802843c:	f7f0 ff72 	bl	8019324 <lwip_socket>
 8028440:	4602      	mov	r2, r0
 8028442:	68fb      	ldr	r3, [r7, #12]
 8028444:	601a      	str	r2, [r3, #0]
	if(n->socket < 0)
 8028446:	68fb      	ldr	r3, [r7, #12]
 8028448:	681b      	ldr	r3, [r3, #0]
 802844a:	2b00      	cmp	r3, #0
 802844c:	da05      	bge.n	802845a <ConnectNetwork+0x42>
	{
		n->socket = 0;
 802844e:	68fb      	ldr	r3, [r7, #12]
 8028450:	2200      	movs	r2, #0
 8028452:	601a      	str	r2, [r3, #0]
		return -1;
 8028454:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028458:	e028      	b.n	80284ac <ConnectNetwork+0x94>
	}

	memset(&server_addr, 0, sizeof(struct sockaddr_in)); //broker address info
 802845a:	f107 0310 	add.w	r3, r7, #16
 802845e:	2210      	movs	r2, #16
 8028460:	2100      	movs	r1, #0
 8028462:	4618      	mov	r0, r3
 8028464:	f002 fc8c 	bl	802ad80 <memset>
	server_addr.sin_family = AF_INET;
 8028468:	2302      	movs	r3, #2
 802846a:	747b      	strb	r3, [r7, #17]
	server_addr.sin_addr.s_addr = inet_addr(ip);
 802846c:	68b8      	ldr	r0, [r7, #8]
 802846e:	f7fd fde0 	bl	8026032 <ipaddr_addr>
 8028472:	4603      	mov	r3, r0
 8028474:	617b      	str	r3, [r7, #20]
	server_addr.sin_port = htons(port);
 8028476:	687b      	ldr	r3, [r7, #4]
 8028478:	b29b      	uxth	r3, r3
 802847a:	4618      	mov	r0, r3
 802847c:	f7f1 fb94 	bl	8019ba8 <lwip_htons>
 8028480:	4603      	mov	r3, r0
 8028482:	827b      	strh	r3, [r7, #18]

	if(connect(n->socket, (struct sockaddr*)&server_addr, sizeof(struct sockaddr_in)) < 0) //connect to the broker
 8028484:	68fb      	ldr	r3, [r7, #12]
 8028486:	681b      	ldr	r3, [r3, #0]
 8028488:	f107 0110 	add.w	r1, r7, #16
 802848c:	2210      	movs	r2, #16
 802848e:	4618      	mov	r0, r3
 8028490:	f7f0 fa8c 	bl	80189ac <lwip_connect>
 8028494:	4603      	mov	r3, r0
 8028496:	2b00      	cmp	r3, #0
 8028498:	da07      	bge.n	80284aa <ConnectNetwork+0x92>
	{
		close(n->socket);
 802849a:	68fb      	ldr	r3, [r7, #12]
 802849c:	681b      	ldr	r3, [r3, #0]
 802849e:	4618      	mov	r0, r3
 80284a0:	f7f0 fa2e 	bl	8018900 <lwip_close>
		return -1;
 80284a4:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80284a8:	e000      	b.n	80284ac <ConnectNetwork+0x94>
	}
	return 0;
 80284aa:	2300      	movs	r3, #0
}
 80284ac:	4618      	mov	r0, r3
 80284ae:	3720      	adds	r7, #32
 80284b0:	46bd      	mov	sp, r7
 80284b2:	bd80      	pop	{r7, pc}

080284b4 <net_read>:

int net_read(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 80284b4:	b580      	push	{r7, lr}
 80284b6:	b086      	sub	sp, #24
 80284b8:	af00      	add	r7, sp, #0
 80284ba:	60f8      	str	r0, [r7, #12]
 80284bc:	60b9      	str	r1, [r7, #8]
 80284be:	607a      	str	r2, [r7, #4]
 80284c0:	603b      	str	r3, [r7, #0]
	int available;

	/* !!! LWIP_SO_RCVBUF must be enabled !!! */
	if(ioctl(n->socket, FIONREAD, &available) < 0) return -1; //check receive buffer
 80284c2:	68fb      	ldr	r3, [r7, #12]
 80284c4:	681b      	ldr	r3, [r3, #0]
 80284c6:	f107 0214 	add.w	r2, r7, #20
 80284ca:	490d      	ldr	r1, [pc, #52]	@ (8028500 <net_read+0x4c>)
 80284cc:	4618      	mov	r0, r3
 80284ce:	f7f1 f917 	bl	8019700 <lwip_ioctl>
 80284d2:	4603      	mov	r3, r0
 80284d4:	2b00      	cmp	r3, #0
 80284d6:	da02      	bge.n	80284de <net_read+0x2a>
 80284d8:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80284dc:	e00c      	b.n	80284f8 <net_read+0x44>

	if(available > 0)
 80284de:	697b      	ldr	r3, [r7, #20]
 80284e0:	2b00      	cmp	r3, #0
 80284e2:	dd08      	ble.n	80284f6 <net_read+0x42>
	{
		return recv(n->socket, buffer, len, 0);
 80284e4:	68fb      	ldr	r3, [r7, #12]
 80284e6:	6818      	ldr	r0, [r3, #0]
 80284e8:	687a      	ldr	r2, [r7, #4]
 80284ea:	2300      	movs	r3, #0
 80284ec:	68b9      	ldr	r1, [r7, #8]
 80284ee:	f7f0 fdf3 	bl	80190d8 <lwip_recv>
 80284f2:	4603      	mov	r3, r0
 80284f4:	e000      	b.n	80284f8 <net_read+0x44>
	}

	return 0;
 80284f6:	2300      	movs	r3, #0
}
 80284f8:	4618      	mov	r0, r3
 80284fa:	3718      	adds	r7, #24
 80284fc:	46bd      	mov	sp, r7
 80284fe:	bd80      	pop	{r7, pc}
 8028500:	4004667f 	.word	0x4004667f

08028504 <net_write>:

int net_write(Network *n, unsigned char *buffer, int len, int timeout_ms) {
 8028504:	b580      	push	{r7, lr}
 8028506:	b084      	sub	sp, #16
 8028508:	af00      	add	r7, sp, #0
 802850a:	60f8      	str	r0, [r7, #12]
 802850c:	60b9      	str	r1, [r7, #8]
 802850e:	607a      	str	r2, [r7, #4]
 8028510:	603b      	str	r3, [r7, #0]
	return send(n->socket, buffer, len, 0);
 8028512:	68fb      	ldr	r3, [r7, #12]
 8028514:	6818      	ldr	r0, [r3, #0]
 8028516:	687a      	ldr	r2, [r7, #4]
 8028518:	2300      	movs	r3, #0
 802851a:	68b9      	ldr	r1, [r7, #8]
 802851c:	f7f0 fdf2 	bl	8019104 <lwip_send>
 8028520:	4603      	mov	r3, r0
}
 8028522:	4618      	mov	r0, r3
 8028524:	3710      	adds	r7, #16
 8028526:	46bd      	mov	sp, r7
 8028528:	bd80      	pop	{r7, pc}

0802852a <net_disconnect>:

void net_disconnect(Network *n) {
 802852a:	b580      	push	{r7, lr}
 802852c:	b082      	sub	sp, #8
 802852e:	af00      	add	r7, sp, #0
 8028530:	6078      	str	r0, [r7, #4]
	close(n->socket);
 8028532:	687b      	ldr	r3, [r7, #4]
 8028534:	681b      	ldr	r3, [r3, #0]
 8028536:	4618      	mov	r0, r3
 8028538:	f7f0 f9e2 	bl	8018900 <lwip_close>
	n->socket = 0;
 802853c:	687b      	ldr	r3, [r7, #4]
 802853e:	2200      	movs	r2, #0
 8028540:	601a      	str	r2, [r3, #0]
}
 8028542:	bf00      	nop
 8028544:	3708      	adds	r7, #8
 8028546:	46bd      	mov	sp, r7
 8028548:	bd80      	pop	{r7, pc}

0802854a <MQTTSerialize_connectLength>:
  * Determines the length of the MQTT connect packet that would be produced using the supplied connect options.
  * @param options the options to be used to build the connect packet
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_connectLength(MQTTPacket_connectData* options)
{
 802854a:	b590      	push	{r4, r7, lr}
 802854c:	b085      	sub	sp, #20
 802854e:	af00      	add	r7, sp, #0
 8028550:	6078      	str	r0, [r7, #4]
	int len = 0;
 8028552:	2300      	movs	r3, #0
 8028554:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;

	if (options->MQTTVersion == 3)
 8028556:	687b      	ldr	r3, [r7, #4]
 8028558:	7a1b      	ldrb	r3, [r3, #8]
 802855a:	2b03      	cmp	r3, #3
 802855c:	d102      	bne.n	8028564 <MQTTSerialize_connectLength+0x1a>
		len = 12; /* variable depending on MQTT or MQIsdp */
 802855e:	230c      	movs	r3, #12
 8028560:	60fb      	str	r3, [r7, #12]
 8028562:	e005      	b.n	8028570 <MQTTSerialize_connectLength+0x26>
	else if (options->MQTTVersion == 4)
 8028564:	687b      	ldr	r3, [r7, #4]
 8028566:	7a1b      	ldrb	r3, [r3, #8]
 8028568:	2b04      	cmp	r3, #4
 802856a:	d101      	bne.n	8028570 <MQTTSerialize_connectLength+0x26>
		len = 10;
 802856c:	230a      	movs	r3, #10
 802856e:	60fb      	str	r3, [r7, #12]

	len += MQTTstrlen(options->clientID)+2;
 8028570:	687b      	ldr	r3, [r7, #4]
 8028572:	330c      	adds	r3, #12
 8028574:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028578:	f000 fc43 	bl	8028e02 <MQTTstrlen>
 802857c:	4603      	mov	r3, r0
 802857e:	3302      	adds	r3, #2
 8028580:	68fa      	ldr	r2, [r7, #12]
 8028582:	4413      	add	r3, r2
 8028584:	60fb      	str	r3, [r7, #12]
	if (options->willFlag)
 8028586:	687b      	ldr	r3, [r7, #4]
 8028588:	7edb      	ldrb	r3, [r3, #27]
 802858a:	2b00      	cmp	r3, #0
 802858c:	d013      	beq.n	80285b6 <MQTTSerialize_connectLength+0x6c>
		len += MQTTstrlen(options->will.topicName)+2 + MQTTstrlen(options->will.message)+2;
 802858e:	687b      	ldr	r3, [r7, #4]
 8028590:	3324      	adds	r3, #36	@ 0x24
 8028592:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028596:	f000 fc34 	bl	8028e02 <MQTTstrlen>
 802859a:	4603      	mov	r3, r0
 802859c:	1c9c      	adds	r4, r3, #2
 802859e:	687b      	ldr	r3, [r7, #4]
 80285a0:	3330      	adds	r3, #48	@ 0x30
 80285a2:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 80285a6:	f000 fc2c 	bl	8028e02 <MQTTstrlen>
 80285aa:	4603      	mov	r3, r0
 80285ac:	4423      	add	r3, r4
 80285ae:	3302      	adds	r3, #2
 80285b0:	68fa      	ldr	r2, [r7, #12]
 80285b2:	4413      	add	r3, r2
 80285b4:	60fb      	str	r3, [r7, #12]
	if (options->username.cstring || options->username.lenstring.data)
 80285b6:	687b      	ldr	r3, [r7, #4]
 80285b8:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 80285ba:	2b00      	cmp	r3, #0
 80285bc:	d103      	bne.n	80285c6 <MQTTSerialize_connectLength+0x7c>
 80285be:	687b      	ldr	r3, [r7, #4]
 80285c0:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 80285c2:	2b00      	cmp	r3, #0
 80285c4:	d00a      	beq.n	80285dc <MQTTSerialize_connectLength+0x92>
		len += MQTTstrlen(options->username)+2;
 80285c6:	687b      	ldr	r3, [r7, #4]
 80285c8:	3340      	adds	r3, #64	@ 0x40
 80285ca:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 80285ce:	f000 fc18 	bl	8028e02 <MQTTstrlen>
 80285d2:	4603      	mov	r3, r0
 80285d4:	3302      	adds	r3, #2
 80285d6:	68fa      	ldr	r2, [r7, #12]
 80285d8:	4413      	add	r3, r2
 80285da:	60fb      	str	r3, [r7, #12]
	if (options->password.cstring || options->password.lenstring.data)
 80285dc:	687b      	ldr	r3, [r7, #4]
 80285de:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 80285e0:	2b00      	cmp	r3, #0
 80285e2:	d103      	bne.n	80285ec <MQTTSerialize_connectLength+0xa2>
 80285e4:	687b      	ldr	r3, [r7, #4]
 80285e6:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 80285e8:	2b00      	cmp	r3, #0
 80285ea:	d00a      	beq.n	8028602 <MQTTSerialize_connectLength+0xb8>
		len += MQTTstrlen(options->password)+2;
 80285ec:	687b      	ldr	r3, [r7, #4]
 80285ee:	334c      	adds	r3, #76	@ 0x4c
 80285f0:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 80285f4:	f000 fc05 	bl	8028e02 <MQTTstrlen>
 80285f8:	4603      	mov	r3, r0
 80285fa:	3302      	adds	r3, #2
 80285fc:	68fa      	ldr	r2, [r7, #12]
 80285fe:	4413      	add	r3, r2
 8028600:	60fb      	str	r3, [r7, #12]

	FUNC_EXIT_RC(len);
	return len;
 8028602:	68fb      	ldr	r3, [r7, #12]
}
 8028604:	4618      	mov	r0, r3
 8028606:	3714      	adds	r7, #20
 8028608:	46bd      	mov	sp, r7
 802860a:	bd90      	pop	{r4, r7, pc}

0802860c <MQTTSerialize_connect>:
  * @param len the length in bytes of the supplied buffer
  * @param options the options to be used to build the connect packet
  * @return serialized length, or error if 0
  */
int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options)
{
 802860c:	b580      	push	{r7, lr}
 802860e:	b08a      	sub	sp, #40	@ 0x28
 8028610:	af00      	add	r7, sp, #0
 8028612:	60f8      	str	r0, [r7, #12]
 8028614:	60b9      	str	r1, [r7, #8]
 8028616:	607a      	str	r2, [r7, #4]
	unsigned char *ptr = buf;
 8028618:	68fb      	ldr	r3, [r7, #12]
 802861a:	61fb      	str	r3, [r7, #28]
	MQTTHeader header = {0};
 802861c:	2300      	movs	r3, #0
 802861e:	61bb      	str	r3, [r7, #24]
	MQTTConnectFlags flags = {0};
 8028620:	2300      	movs	r3, #0
 8028622:	617b      	str	r3, [r7, #20]
	int len = 0;
 8028624:	2300      	movs	r3, #0
 8028626:	623b      	str	r3, [r7, #32]
	int rc = -1;
 8028628:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 802862c:	627b      	str	r3, [r7, #36]	@ 0x24

	FUNC_ENTRY;
	if (MQTTPacket_len(len = MQTTSerialize_connectLength(options)) > buflen)
 802862e:	6878      	ldr	r0, [r7, #4]
 8028630:	f7ff ff8b 	bl	802854a <MQTTSerialize_connectLength>
 8028634:	6238      	str	r0, [r7, #32]
 8028636:	6a38      	ldr	r0, [r7, #32]
 8028638:	f000 fa98 	bl	8028b6c <MQTTPacket_len>
 802863c:	4602      	mov	r2, r0
 802863e:	68bb      	ldr	r3, [r7, #8]
 8028640:	4293      	cmp	r3, r2
 8028642:	da03      	bge.n	802864c <MQTTSerialize_connect+0x40>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028644:	f06f 0301 	mvn.w	r3, #1
 8028648:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 802864a:	e0c2      	b.n	80287d2 <MQTTSerialize_connect+0x1c6>
	}

	header.byte = 0;
 802864c:	2300      	movs	r3, #0
 802864e:	763b      	strb	r3, [r7, #24]
	header.bits.type = CONNECT;
 8028650:	7e3b      	ldrb	r3, [r7, #24]
 8028652:	2201      	movs	r2, #1
 8028654:	f362 1307 	bfi	r3, r2, #4, #4
 8028658:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 802865a:	7e3a      	ldrb	r2, [r7, #24]
 802865c:	f107 031c 	add.w	r3, r7, #28
 8028660:	4611      	mov	r1, r2
 8028662:	4618      	mov	r0, r3
 8028664:	f000 fb11 	bl	8028c8a <writeChar>

	ptr += MQTTPacket_encode(ptr, len); /* write remaining length */
 8028668:	69fb      	ldr	r3, [r7, #28]
 802866a:	6a39      	ldr	r1, [r7, #32]
 802866c:	4618      	mov	r0, r3
 802866e:	f000 fa12 	bl	8028a96 <MQTTPacket_encode>
 8028672:	4602      	mov	r2, r0
 8028674:	69fb      	ldr	r3, [r7, #28]
 8028676:	4413      	add	r3, r2
 8028678:	61fb      	str	r3, [r7, #28]

	if (options->MQTTVersion == 4)
 802867a:	687b      	ldr	r3, [r7, #4]
 802867c:	7a1b      	ldrb	r3, [r3, #8]
 802867e:	2b04      	cmp	r3, #4
 8028680:	d10c      	bne.n	802869c <MQTTSerialize_connect+0x90>
	{
		writeCString(&ptr, "MQTT");
 8028682:	f107 031c 	add.w	r3, r7, #28
 8028686:	4955      	ldr	r1, [pc, #340]	@ (80287dc <MQTTSerialize_connect+0x1d0>)
 8028688:	4618      	mov	r0, r3
 802868a:	f000 fb3c 	bl	8028d06 <writeCString>
		writeChar(&ptr, (char) 4);
 802868e:	f107 031c 	add.w	r3, r7, #28
 8028692:	2104      	movs	r1, #4
 8028694:	4618      	mov	r0, r3
 8028696:	f000 faf8 	bl	8028c8a <writeChar>
 802869a:	e00b      	b.n	80286b4 <MQTTSerialize_connect+0xa8>
	}
	else
	{
		writeCString(&ptr, "MQIsdp");
 802869c:	f107 031c 	add.w	r3, r7, #28
 80286a0:	494f      	ldr	r1, [pc, #316]	@ (80287e0 <MQTTSerialize_connect+0x1d4>)
 80286a2:	4618      	mov	r0, r3
 80286a4:	f000 fb2f 	bl	8028d06 <writeCString>
		writeChar(&ptr, (char) 3);
 80286a8:	f107 031c 	add.w	r3, r7, #28
 80286ac:	2103      	movs	r1, #3
 80286ae:	4618      	mov	r0, r3
 80286b0:	f000 faeb 	bl	8028c8a <writeChar>
	}

	flags.all = 0;
 80286b4:	2300      	movs	r3, #0
 80286b6:	753b      	strb	r3, [r7, #20]
	flags.bits.cleansession = options->cleansession;
 80286b8:	687b      	ldr	r3, [r7, #4]
 80286ba:	7e9b      	ldrb	r3, [r3, #26]
 80286bc:	f003 0301 	and.w	r3, r3, #1
 80286c0:	b2da      	uxtb	r2, r3
 80286c2:	7d3b      	ldrb	r3, [r7, #20]
 80286c4:	f362 0341 	bfi	r3, r2, #1, #1
 80286c8:	753b      	strb	r3, [r7, #20]
	flags.bits.will = (options->willFlag) ? 1 : 0;
 80286ca:	687b      	ldr	r3, [r7, #4]
 80286cc:	7edb      	ldrb	r3, [r3, #27]
 80286ce:	2b00      	cmp	r3, #0
 80286d0:	bf14      	ite	ne
 80286d2:	2301      	movne	r3, #1
 80286d4:	2300      	moveq	r3, #0
 80286d6:	b2da      	uxtb	r2, r3
 80286d8:	7d3b      	ldrb	r3, [r7, #20]
 80286da:	f362 0382 	bfi	r3, r2, #2, #1
 80286de:	753b      	strb	r3, [r7, #20]
	if (flags.bits.will)
 80286e0:	7d3b      	ldrb	r3, [r7, #20]
 80286e2:	f003 0304 	and.w	r3, r3, #4
 80286e6:	b2db      	uxtb	r3, r3
 80286e8:	2b00      	cmp	r3, #0
 80286ea:	d013      	beq.n	8028714 <MQTTSerialize_connect+0x108>
	{
		flags.bits.willQoS = options->will.qos;
 80286ec:	687b      	ldr	r3, [r7, #4]
 80286ee:	f893 303d 	ldrb.w	r3, [r3, #61]	@ 0x3d
 80286f2:	f003 0303 	and.w	r3, r3, #3
 80286f6:	b2da      	uxtb	r2, r3
 80286f8:	7d3b      	ldrb	r3, [r7, #20]
 80286fa:	f362 03c4 	bfi	r3, r2, #3, #2
 80286fe:	753b      	strb	r3, [r7, #20]
		flags.bits.willRetain = options->will.retained;
 8028700:	687b      	ldr	r3, [r7, #4]
 8028702:	f893 303c 	ldrb.w	r3, [r3, #60]	@ 0x3c
 8028706:	f003 0301 	and.w	r3, r3, #1
 802870a:	b2da      	uxtb	r2, r3
 802870c:	7d3b      	ldrb	r3, [r7, #20]
 802870e:	f362 1345 	bfi	r3, r2, #5, #1
 8028712:	753b      	strb	r3, [r7, #20]
	}

	if (options->username.cstring || options->username.lenstring.data)
 8028714:	687b      	ldr	r3, [r7, #4]
 8028716:	6c1b      	ldr	r3, [r3, #64]	@ 0x40
 8028718:	2b00      	cmp	r3, #0
 802871a:	d103      	bne.n	8028724 <MQTTSerialize_connect+0x118>
 802871c:	687b      	ldr	r3, [r7, #4]
 802871e:	6c9b      	ldr	r3, [r3, #72]	@ 0x48
 8028720:	2b00      	cmp	r3, #0
 8028722:	d003      	beq.n	802872c <MQTTSerialize_connect+0x120>
		flags.bits.username = 1;
 8028724:	7d3b      	ldrb	r3, [r7, #20]
 8028726:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802872a:	753b      	strb	r3, [r7, #20]
	if (options->password.cstring || options->password.lenstring.data)
 802872c:	687b      	ldr	r3, [r7, #4]
 802872e:	6cdb      	ldr	r3, [r3, #76]	@ 0x4c
 8028730:	2b00      	cmp	r3, #0
 8028732:	d103      	bne.n	802873c <MQTTSerialize_connect+0x130>
 8028734:	687b      	ldr	r3, [r7, #4]
 8028736:	6d5b      	ldr	r3, [r3, #84]	@ 0x54
 8028738:	2b00      	cmp	r3, #0
 802873a:	d003      	beq.n	8028744 <MQTTSerialize_connect+0x138>
		flags.bits.password = 1;
 802873c:	7d3b      	ldrb	r3, [r7, #20]
 802873e:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 8028742:	753b      	strb	r3, [r7, #20]

	writeChar(&ptr, flags.all);
 8028744:	7d3a      	ldrb	r2, [r7, #20]
 8028746:	f107 031c 	add.w	r3, r7, #28
 802874a:	4611      	mov	r1, r2
 802874c:	4618      	mov	r0, r3
 802874e:	f000 fa9c 	bl	8028c8a <writeChar>
	writeInt(&ptr, options->keepAliveInterval);
 8028752:	687b      	ldr	r3, [r7, #4]
 8028754:	8b1b      	ldrh	r3, [r3, #24]
 8028756:	461a      	mov	r2, r3
 8028758:	f107 031c 	add.w	r3, r7, #28
 802875c:	4611      	mov	r1, r2
 802875e:	4618      	mov	r0, r3
 8028760:	f000 faa8 	bl	8028cb4 <writeInt>
	writeMQTTString(&ptr, options->clientID);
 8028764:	687b      	ldr	r3, [r7, #4]
 8028766:	f107 001c 	add.w	r0, r7, #28
 802876a:	330c      	adds	r3, #12
 802876c:	cb0e      	ldmia	r3, {r1, r2, r3}
 802876e:	f000 fae9 	bl	8028d44 <writeMQTTString>
	if (options->willFlag)
 8028772:	687b      	ldr	r3, [r7, #4]
 8028774:	7edb      	ldrb	r3, [r3, #27]
 8028776:	2b00      	cmp	r3, #0
 8028778:	d00d      	beq.n	8028796 <MQTTSerialize_connect+0x18a>
	{
		writeMQTTString(&ptr, options->will.topicName);
 802877a:	687b      	ldr	r3, [r7, #4]
 802877c:	f107 001c 	add.w	r0, r7, #28
 8028780:	3324      	adds	r3, #36	@ 0x24
 8028782:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028784:	f000 fade 	bl	8028d44 <writeMQTTString>
		writeMQTTString(&ptr, options->will.message);
 8028788:	687b      	ldr	r3, [r7, #4]
 802878a:	f107 001c 	add.w	r0, r7, #28
 802878e:	3330      	adds	r3, #48	@ 0x30
 8028790:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028792:	f000 fad7 	bl	8028d44 <writeMQTTString>
	}
	if (flags.bits.username)
 8028796:	7d3b      	ldrb	r3, [r7, #20]
 8028798:	f023 037f 	bic.w	r3, r3, #127	@ 0x7f
 802879c:	b2db      	uxtb	r3, r3
 802879e:	2b00      	cmp	r3, #0
 80287a0:	d006      	beq.n	80287b0 <MQTTSerialize_connect+0x1a4>
		writeMQTTString(&ptr, options->username);
 80287a2:	687b      	ldr	r3, [r7, #4]
 80287a4:	f107 001c 	add.w	r0, r7, #28
 80287a8:	3340      	adds	r3, #64	@ 0x40
 80287aa:	cb0e      	ldmia	r3, {r1, r2, r3}
 80287ac:	f000 faca 	bl	8028d44 <writeMQTTString>
	if (flags.bits.password)
 80287b0:	7d3b      	ldrb	r3, [r7, #20]
 80287b2:	f003 0340 	and.w	r3, r3, #64	@ 0x40
 80287b6:	b2db      	uxtb	r3, r3
 80287b8:	2b00      	cmp	r3, #0
 80287ba:	d006      	beq.n	80287ca <MQTTSerialize_connect+0x1be>
		writeMQTTString(&ptr, options->password);
 80287bc:	687b      	ldr	r3, [r7, #4]
 80287be:	f107 001c 	add.w	r0, r7, #28
 80287c2:	334c      	adds	r3, #76	@ 0x4c
 80287c4:	cb0e      	ldmia	r3, {r1, r2, r3}
 80287c6:	f000 fabd 	bl	8028d44 <writeMQTTString>

	rc = ptr - buf;
 80287ca:	69fa      	ldr	r2, [r7, #28]
 80287cc:	68fb      	ldr	r3, [r7, #12]
 80287ce:	1ad3      	subs	r3, r2, r3
 80287d0:	627b      	str	r3, [r7, #36]	@ 0x24

	exit: FUNC_EXIT_RC(rc);
	return rc;
 80287d2:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 80287d4:	4618      	mov	r0, r3
 80287d6:	3728      	adds	r7, #40	@ 0x28
 80287d8:	46bd      	mov	sp, r7
 80287da:	bd80      	pop	{r7, pc}
 80287dc:	08031bf8 	.word	0x08031bf8
 80287e0:	08031c00 	.word	0x08031c00

080287e4 <MQTTDeserialize_connack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param len the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen)
{
 80287e4:	b580      	push	{r7, lr}
 80287e6:	b08a      	sub	sp, #40	@ 0x28
 80287e8:	af00      	add	r7, sp, #0
 80287ea:	60f8      	str	r0, [r7, #12]
 80287ec:	60b9      	str	r1, [r7, #8]
 80287ee:	607a      	str	r2, [r7, #4]
 80287f0:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 80287f2:	2300      	movs	r3, #0
 80287f4:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 80287f6:	687b      	ldr	r3, [r7, #4]
 80287f8:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 80287fa:	2300      	movs	r3, #0
 80287fc:	623b      	str	r3, [r7, #32]
	int rc = 0;
 80287fe:	2300      	movs	r3, #0
 8028800:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;
	MQTTConnackFlags flags = {0};
 8028802:	2300      	movs	r3, #0
 8028804:	613b      	str	r3, [r7, #16]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 8028806:	f107 0318 	add.w	r3, r7, #24
 802880a:	4618      	mov	r0, r3
 802880c:	f000 fa29 	bl	8028c62 <readChar>
 8028810:	4603      	mov	r3, r0
 8028812:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != CONNACK)
 8028814:	7f3b      	ldrb	r3, [r7, #28]
 8028816:	f023 030f 	bic.w	r3, r3, #15
 802881a:	b2db      	uxtb	r3, r3
 802881c:	2b20      	cmp	r3, #32
 802881e:	d12e      	bne.n	802887e <MQTTDeserialize_connack+0x9a>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8028820:	69bb      	ldr	r3, [r7, #24]
 8028822:	f107 0214 	add.w	r2, r7, #20
 8028826:	4611      	mov	r1, r2
 8028828:	4618      	mov	r0, r3
 802882a:	f000 f9e9 	bl	8028c00 <MQTTPacket_decodeBuf>
 802882e:	6278      	str	r0, [r7, #36]	@ 0x24
 8028830:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8028832:	69bb      	ldr	r3, [r7, #24]
 8028834:	4413      	add	r3, r2
 8028836:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 8028838:	69bb      	ldr	r3, [r7, #24]
 802883a:	697a      	ldr	r2, [r7, #20]
 802883c:	4413      	add	r3, r2
 802883e:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 8028840:	69bb      	ldr	r3, [r7, #24]
 8028842:	6a3a      	ldr	r2, [r7, #32]
 8028844:	1ad3      	subs	r3, r2, r3
 8028846:	2b01      	cmp	r3, #1
 8028848:	dd1b      	ble.n	8028882 <MQTTDeserialize_connack+0x9e>
		goto exit;

	flags.all = readChar(&curdata);
 802884a:	f107 0318 	add.w	r3, r7, #24
 802884e:	4618      	mov	r0, r3
 8028850:	f000 fa07 	bl	8028c62 <readChar>
 8028854:	4603      	mov	r3, r0
 8028856:	743b      	strb	r3, [r7, #16]
	*sessionPresent = flags.bits.sessionpresent;
 8028858:	7c3b      	ldrb	r3, [r7, #16]
 802885a:	f3c3 0300 	ubfx	r3, r3, #0, #1
 802885e:	b2db      	uxtb	r3, r3
 8028860:	461a      	mov	r2, r3
 8028862:	68fb      	ldr	r3, [r7, #12]
 8028864:	701a      	strb	r2, [r3, #0]
	*connack_rc = readChar(&curdata);
 8028866:	f107 0318 	add.w	r3, r7, #24
 802886a:	4618      	mov	r0, r3
 802886c:	f000 f9f9 	bl	8028c62 <readChar>
 8028870:	4603      	mov	r3, r0
 8028872:	461a      	mov	r2, r3
 8028874:	68bb      	ldr	r3, [r7, #8]
 8028876:	701a      	strb	r2, [r3, #0]

	rc = 1;
 8028878:	2301      	movs	r3, #1
 802887a:	627b      	str	r3, [r7, #36]	@ 0x24
 802887c:	e002      	b.n	8028884 <MQTTDeserialize_connack+0xa0>
		goto exit;
 802887e:	bf00      	nop
 8028880:	e000      	b.n	8028884 <MQTTDeserialize_connack+0xa0>
		goto exit;
 8028882:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028884:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8028886:	4618      	mov	r0, r3
 8028888:	3728      	adds	r7, #40	@ 0x28
 802888a:	46bd      	mov	sp, r7
 802888c:	bd80      	pop	{r7, pc}

0802888e <MQTTSerialize_zero>:
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @param packettype the message type
  * @return serialized length, or error if 0
  */
int MQTTSerialize_zero(unsigned char* buf, int buflen, unsigned char packettype)
{
 802888e:	b580      	push	{r7, lr}
 8028890:	b088      	sub	sp, #32
 8028892:	af00      	add	r7, sp, #0
 8028894:	60f8      	str	r0, [r7, #12]
 8028896:	60b9      	str	r1, [r7, #8]
 8028898:	4613      	mov	r3, r2
 802889a:	71fb      	strb	r3, [r7, #7]
	MQTTHeader header = {0};
 802889c:	2300      	movs	r3, #0
 802889e:	61bb      	str	r3, [r7, #24]
	int rc = -1;
 80288a0:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 80288a4:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 80288a6:	68fb      	ldr	r3, [r7, #12]
 80288a8:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 2)
 80288aa:	68bb      	ldr	r3, [r7, #8]
 80288ac:	2b01      	cmp	r3, #1
 80288ae:	dc03      	bgt.n	80288b8 <MQTTSerialize_zero+0x2a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 80288b0:	f06f 0301 	mvn.w	r3, #1
 80288b4:	61fb      	str	r3, [r7, #28]
		goto exit;
 80288b6:	e01d      	b.n	80288f4 <MQTTSerialize_zero+0x66>
	}
	header.byte = 0;
 80288b8:	2300      	movs	r3, #0
 80288ba:	763b      	strb	r3, [r7, #24]
	header.bits.type = packettype;
 80288bc:	79fb      	ldrb	r3, [r7, #7]
 80288be:	f003 030f 	and.w	r3, r3, #15
 80288c2:	b2da      	uxtb	r2, r3
 80288c4:	7e3b      	ldrb	r3, [r7, #24]
 80288c6:	f362 1307 	bfi	r3, r2, #4, #4
 80288ca:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 80288cc:	7e3a      	ldrb	r2, [r7, #24]
 80288ce:	f107 0314 	add.w	r3, r7, #20
 80288d2:	4611      	mov	r1, r2
 80288d4:	4618      	mov	r0, r3
 80288d6:	f000 f9d8 	bl	8028c8a <writeChar>

	ptr += MQTTPacket_encode(ptr, 0); /* write remaining length */
 80288da:	697b      	ldr	r3, [r7, #20]
 80288dc:	2100      	movs	r1, #0
 80288de:	4618      	mov	r0, r3
 80288e0:	f000 f8d9 	bl	8028a96 <MQTTPacket_encode>
 80288e4:	4602      	mov	r2, r0
 80288e6:	697b      	ldr	r3, [r7, #20]
 80288e8:	4413      	add	r3, r2
 80288ea:	617b      	str	r3, [r7, #20]
	rc = ptr - buf;
 80288ec:	697a      	ldr	r2, [r7, #20]
 80288ee:	68fb      	ldr	r3, [r7, #12]
 80288f0:	1ad3      	subs	r3, r2, r3
 80288f2:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80288f4:	69fb      	ldr	r3, [r7, #28]
}
 80288f6:	4618      	mov	r0, r3
 80288f8:	3720      	adds	r7, #32
 80288fa:	46bd      	mov	sp, r7
 80288fc:	bd80      	pop	{r7, pc}

080288fe <MQTTSerialize_pingreq>:
  * @param buf the buffer into which the packet will be serialized
  * @param buflen the length in bytes of the supplied buffer, to avoid overruns
  * @return serialized length, or error if 0
  */
int MQTTSerialize_pingreq(unsigned char* buf, int buflen)
{
 80288fe:	b580      	push	{r7, lr}
 8028900:	b082      	sub	sp, #8
 8028902:	af00      	add	r7, sp, #0
 8028904:	6078      	str	r0, [r7, #4]
 8028906:	6039      	str	r1, [r7, #0]
	return MQTTSerialize_zero(buf, buflen, PINGREQ);
 8028908:	220c      	movs	r2, #12
 802890a:	6839      	ldr	r1, [r7, #0]
 802890c:	6878      	ldr	r0, [r7, #4]
 802890e:	f7ff ffbe 	bl	802888e <MQTTSerialize_zero>
 8028912:	4603      	mov	r3, r0
}
 8028914:	4618      	mov	r0, r3
 8028916:	3708      	adds	r7, #8
 8028918:	46bd      	mov	sp, r7
 802891a:	bd80      	pop	{r7, pc}

0802891c <MQTTDeserialize_publish>:
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success
  */
int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName,
		unsigned char** payload, int* payloadlen, unsigned char* buf, int buflen)
{
 802891c:	b580      	push	{r7, lr}
 802891e:	b08a      	sub	sp, #40	@ 0x28
 8028920:	af00      	add	r7, sp, #0
 8028922:	60f8      	str	r0, [r7, #12]
 8028924:	60b9      	str	r1, [r7, #8]
 8028926:	607a      	str	r2, [r7, #4]
 8028928:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 802892a:	2300      	movs	r3, #0
 802892c:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 802892e:	6bfb      	ldr	r3, [r7, #60]	@ 0x3c
 8028930:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8028932:	2300      	movs	r3, #0
 8028934:	623b      	str	r3, [r7, #32]
	int rc = 0;
 8028936:	2300      	movs	r3, #0
 8028938:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen = 0;
 802893a:	2300      	movs	r3, #0
 802893c:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 802893e:	f107 0318 	add.w	r3, r7, #24
 8028942:	4618      	mov	r0, r3
 8028944:	f000 f98d 	bl	8028c62 <readChar>
 8028948:	4603      	mov	r3, r0
 802894a:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != PUBLISH)
 802894c:	7f3b      	ldrb	r3, [r7, #28]
 802894e:	f023 030f 	bic.w	r3, r3, #15
 8028952:	b2db      	uxtb	r3, r3
 8028954:	2b30      	cmp	r3, #48	@ 0x30
 8028956:	d14b      	bne.n	80289f0 <MQTTDeserialize_publish+0xd4>
		goto exit;
	*dup = header.bits.dup;
 8028958:	7f3b      	ldrb	r3, [r7, #28]
 802895a:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 802895e:	b2db      	uxtb	r3, r3
 8028960:	461a      	mov	r2, r3
 8028962:	68fb      	ldr	r3, [r7, #12]
 8028964:	701a      	strb	r2, [r3, #0]
	*qos = header.bits.qos;
 8028966:	7f3b      	ldrb	r3, [r7, #28]
 8028968:	f3c3 0341 	ubfx	r3, r3, #1, #2
 802896c:	b2db      	uxtb	r3, r3
 802896e:	461a      	mov	r2, r3
 8028970:	68bb      	ldr	r3, [r7, #8]
 8028972:	601a      	str	r2, [r3, #0]
	*retained = header.bits.retain;
 8028974:	7f3b      	ldrb	r3, [r7, #28]
 8028976:	f3c3 0300 	ubfx	r3, r3, #0, #1
 802897a:	b2db      	uxtb	r3, r3
 802897c:	461a      	mov	r2, r3
 802897e:	687b      	ldr	r3, [r7, #4]
 8028980:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8028982:	69bb      	ldr	r3, [r7, #24]
 8028984:	f107 0214 	add.w	r2, r7, #20
 8028988:	4611      	mov	r1, r2
 802898a:	4618      	mov	r0, r3
 802898c:	f000 f938 	bl	8028c00 <MQTTPacket_decodeBuf>
 8028990:	6278      	str	r0, [r7, #36]	@ 0x24
 8028992:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8028994:	69bb      	ldr	r3, [r7, #24]
 8028996:	4413      	add	r3, r2
 8028998:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 802899a:	69bb      	ldr	r3, [r7, #24]
 802899c:	697a      	ldr	r2, [r7, #20]
 802899e:	4413      	add	r3, r2
 80289a0:	623b      	str	r3, [r7, #32]

	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 80289a2:	f107 0318 	add.w	r3, r7, #24
 80289a6:	6a3a      	ldr	r2, [r7, #32]
 80289a8:	4619      	mov	r1, r3
 80289aa:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80289ac:	f000 f9f8 	bl	8028da0 <readMQTTLenString>
 80289b0:	4603      	mov	r3, r0
 80289b2:	2b00      	cmp	r3, #0
 80289b4:	d01e      	beq.n	80289f4 <MQTTDeserialize_publish+0xd8>
		enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */
 80289b6:	69bb      	ldr	r3, [r7, #24]
 80289b8:	6a3a      	ldr	r2, [r7, #32]
 80289ba:	1ad3      	subs	r3, r2, r3
	if (!readMQTTLenString(topicName, &curdata, enddata) ||
 80289bc:	2b00      	cmp	r3, #0
 80289be:	db19      	blt.n	80289f4 <MQTTDeserialize_publish+0xd8>
		goto exit;

	if (*qos > 0)
 80289c0:	68bb      	ldr	r3, [r7, #8]
 80289c2:	681b      	ldr	r3, [r3, #0]
 80289c4:	2b00      	cmp	r3, #0
 80289c6:	dd08      	ble.n	80289da <MQTTDeserialize_publish+0xbe>
		*packetid = readInt(&curdata);
 80289c8:	f107 0318 	add.w	r3, r7, #24
 80289cc:	4618      	mov	r0, r3
 80289ce:	f000 f92d 	bl	8028c2c <readInt>
 80289d2:	4603      	mov	r3, r0
 80289d4:	b29a      	uxth	r2, r3
 80289d6:	683b      	ldr	r3, [r7, #0]
 80289d8:	801a      	strh	r2, [r3, #0]

	*payloadlen = enddata - curdata;
 80289da:	69bb      	ldr	r3, [r7, #24]
 80289dc:	6a3a      	ldr	r2, [r7, #32]
 80289de:	1ad2      	subs	r2, r2, r3
 80289e0:	6bbb      	ldr	r3, [r7, #56]	@ 0x38
 80289e2:	601a      	str	r2, [r3, #0]
	*payload = curdata;
 80289e4:	69ba      	ldr	r2, [r7, #24]
 80289e6:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 80289e8:	601a      	str	r2, [r3, #0]
	rc = 1;
 80289ea:	2301      	movs	r3, #1
 80289ec:	627b      	str	r3, [r7, #36]	@ 0x24
 80289ee:	e002      	b.n	80289f6 <MQTTDeserialize_publish+0xda>
		goto exit;
 80289f0:	bf00      	nop
 80289f2:	e000      	b.n	80289f6 <MQTTDeserialize_publish+0xda>
		goto exit;
 80289f4:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80289f6:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 80289f8:	4618      	mov	r0, r3
 80289fa:	3728      	adds	r7, #40	@ 0x28
 80289fc:	46bd      	mov	sp, r7
 80289fe:	bd80      	pop	{r7, pc}

08028a00 <MQTTDeserialize_ack>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen)
{
 8028a00:	b580      	push	{r7, lr}
 8028a02:	b08a      	sub	sp, #40	@ 0x28
 8028a04:	af00      	add	r7, sp, #0
 8028a06:	60f8      	str	r0, [r7, #12]
 8028a08:	60b9      	str	r1, [r7, #8]
 8028a0a:	607a      	str	r2, [r7, #4]
 8028a0c:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 8028a0e:	2300      	movs	r3, #0
 8028a10:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 8028a12:	683b      	ldr	r3, [r7, #0]
 8028a14:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 8028a16:	2300      	movs	r3, #0
 8028a18:	623b      	str	r3, [r7, #32]
	int rc = 0;
 8028a1a:	2300      	movs	r3, #0
 8028a1c:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 8028a1e:	f107 0318 	add.w	r3, r7, #24
 8028a22:	4618      	mov	r0, r3
 8028a24:	f000 f91d 	bl	8028c62 <readChar>
 8028a28:	4603      	mov	r3, r0
 8028a2a:	773b      	strb	r3, [r7, #28]
	*dup = header.bits.dup;
 8028a2c:	7f3b      	ldrb	r3, [r7, #28]
 8028a2e:	f3c3 03c0 	ubfx	r3, r3, #3, #1
 8028a32:	b2db      	uxtb	r3, r3
 8028a34:	461a      	mov	r2, r3
 8028a36:	68bb      	ldr	r3, [r7, #8]
 8028a38:	701a      	strb	r2, [r3, #0]
	*packettype = header.bits.type;
 8028a3a:	7f3b      	ldrb	r3, [r7, #28]
 8028a3c:	f3c3 1303 	ubfx	r3, r3, #4, #4
 8028a40:	b2db      	uxtb	r3, r3
 8028a42:	461a      	mov	r2, r3
 8028a44:	68fb      	ldr	r3, [r7, #12]
 8028a46:	701a      	strb	r2, [r3, #0]

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 8028a48:	69bb      	ldr	r3, [r7, #24]
 8028a4a:	f107 0214 	add.w	r2, r7, #20
 8028a4e:	4611      	mov	r1, r2
 8028a50:	4618      	mov	r0, r3
 8028a52:	f000 f8d5 	bl	8028c00 <MQTTPacket_decodeBuf>
 8028a56:	6278      	str	r0, [r7, #36]	@ 0x24
 8028a58:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8028a5a:	69bb      	ldr	r3, [r7, #24]
 8028a5c:	4413      	add	r3, r2
 8028a5e:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 8028a60:	69bb      	ldr	r3, [r7, #24]
 8028a62:	697a      	ldr	r2, [r7, #20]
 8028a64:	4413      	add	r3, r2
 8028a66:	623b      	str	r3, [r7, #32]

	if (enddata - curdata < 2)
 8028a68:	69bb      	ldr	r3, [r7, #24]
 8028a6a:	6a3a      	ldr	r2, [r7, #32]
 8028a6c:	1ad3      	subs	r3, r2, r3
 8028a6e:	2b01      	cmp	r3, #1
 8028a70:	dd0b      	ble.n	8028a8a <MQTTDeserialize_ack+0x8a>
		goto exit;
	*packetid = readInt(&curdata);
 8028a72:	f107 0318 	add.w	r3, r7, #24
 8028a76:	4618      	mov	r0, r3
 8028a78:	f000 f8d8 	bl	8028c2c <readInt>
 8028a7c:	4603      	mov	r3, r0
 8028a7e:	b29a      	uxth	r2, r3
 8028a80:	687b      	ldr	r3, [r7, #4]
 8028a82:	801a      	strh	r2, [r3, #0]

	rc = 1;
 8028a84:	2301      	movs	r3, #1
 8028a86:	627b      	str	r3, [r7, #36]	@ 0x24
 8028a88:	e000      	b.n	8028a8c <MQTTDeserialize_ack+0x8c>
		goto exit;
 8028a8a:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028a8c:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8028a8e:	4618      	mov	r0, r3
 8028a90:	3728      	adds	r7, #40	@ 0x28
 8028a92:	46bd      	mov	sp, r7
 8028a94:	bd80      	pop	{r7, pc}

08028a96 <MQTTPacket_encode>:
 * @param buf the buffer into which the encoded data is written
 * @param length the length to be encoded
 * @return the number of bytes written to buffer
 */
int MQTTPacket_encode(unsigned char* buf, int length)
{
 8028a96:	b480      	push	{r7}
 8028a98:	b085      	sub	sp, #20
 8028a9a:	af00      	add	r7, sp, #0
 8028a9c:	6078      	str	r0, [r7, #4]
 8028a9e:	6039      	str	r1, [r7, #0]
	int rc = 0;
 8028aa0:	2300      	movs	r3, #0
 8028aa2:	60fb      	str	r3, [r7, #12]

	FUNC_ENTRY;
	do
	{
		char d = length % 128;
 8028aa4:	683b      	ldr	r3, [r7, #0]
 8028aa6:	425a      	negs	r2, r3
 8028aa8:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8028aac:	f002 027f 	and.w	r2, r2, #127	@ 0x7f
 8028ab0:	bf58      	it	pl
 8028ab2:	4253      	negpl	r3, r2
 8028ab4:	72fb      	strb	r3, [r7, #11]
		length /= 128;
 8028ab6:	683b      	ldr	r3, [r7, #0]
 8028ab8:	2b00      	cmp	r3, #0
 8028aba:	da00      	bge.n	8028abe <MQTTPacket_encode+0x28>
 8028abc:	337f      	adds	r3, #127	@ 0x7f
 8028abe:	11db      	asrs	r3, r3, #7
 8028ac0:	603b      	str	r3, [r7, #0]
		/* if there are more digits to encode, set the top bit of this digit */
		if (length > 0)
 8028ac2:	683b      	ldr	r3, [r7, #0]
 8028ac4:	2b00      	cmp	r3, #0
 8028ac6:	dd03      	ble.n	8028ad0 <MQTTPacket_encode+0x3a>
			d |= 0x80;
 8028ac8:	7afb      	ldrb	r3, [r7, #11]
 8028aca:	f063 037f 	orn	r3, r3, #127	@ 0x7f
 8028ace:	72fb      	strb	r3, [r7, #11]
		buf[rc++] = d;
 8028ad0:	68fb      	ldr	r3, [r7, #12]
 8028ad2:	1c5a      	adds	r2, r3, #1
 8028ad4:	60fa      	str	r2, [r7, #12]
 8028ad6:	461a      	mov	r2, r3
 8028ad8:	687b      	ldr	r3, [r7, #4]
 8028ada:	4413      	add	r3, r2
 8028adc:	7afa      	ldrb	r2, [r7, #11]
 8028ade:	701a      	strb	r2, [r3, #0]
	} while (length > 0);
 8028ae0:	683b      	ldr	r3, [r7, #0]
 8028ae2:	2b00      	cmp	r3, #0
 8028ae4:	dcde      	bgt.n	8028aa4 <MQTTPacket_encode+0xe>
	FUNC_EXIT_RC(rc);
	return rc;
 8028ae6:	68fb      	ldr	r3, [r7, #12]
}
 8028ae8:	4618      	mov	r0, r3
 8028aea:	3714      	adds	r7, #20
 8028aec:	46bd      	mov	sp, r7
 8028aee:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028af2:	4770      	bx	lr

08028af4 <MQTTPacket_decode>:
 * @param getcharfn pointer to function to read the next character from the data source
 * @param value the decoded length returned
 * @return the number of bytes read from the socket
 */
int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value)
{
 8028af4:	b580      	push	{r7, lr}
 8028af6:	b086      	sub	sp, #24
 8028af8:	af00      	add	r7, sp, #0
 8028afa:	6078      	str	r0, [r7, #4]
 8028afc:	6039      	str	r1, [r7, #0]
	unsigned char c;
	int multiplier = 1;
 8028afe:	2301      	movs	r3, #1
 8028b00:	617b      	str	r3, [r7, #20]
	int len = 0;
 8028b02:	2300      	movs	r3, #0
 8028b04:	613b      	str	r3, [r7, #16]
#define MAX_NO_OF_REMAINING_LENGTH_BYTES 4

	FUNC_ENTRY;
	*value = 0;
 8028b06:	683b      	ldr	r3, [r7, #0]
 8028b08:	2200      	movs	r2, #0
 8028b0a:	601a      	str	r2, [r3, #0]
	do
	{
		int rc = MQTTPACKET_READ_ERROR;
 8028b0c:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028b10:	60fb      	str	r3, [r7, #12]

		if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES)
 8028b12:	693b      	ldr	r3, [r7, #16]
 8028b14:	3301      	adds	r3, #1
 8028b16:	613b      	str	r3, [r7, #16]
 8028b18:	693b      	ldr	r3, [r7, #16]
 8028b1a:	2b04      	cmp	r3, #4
 8028b1c:	dd03      	ble.n	8028b26 <MQTTPacket_decode+0x32>
		{
			rc = MQTTPACKET_READ_ERROR;	/* bad data */
 8028b1e:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8028b22:	60fb      	str	r3, [r7, #12]
			goto exit;
 8028b24:	e01d      	b.n	8028b62 <MQTTPacket_decode+0x6e>
		}
		rc = (*getcharfn)(&c, 1);
 8028b26:	f107 020b 	add.w	r2, r7, #11
 8028b2a:	687b      	ldr	r3, [r7, #4]
 8028b2c:	2101      	movs	r1, #1
 8028b2e:	4610      	mov	r0, r2
 8028b30:	4798      	blx	r3
 8028b32:	60f8      	str	r0, [r7, #12]
		if (rc != 1)
 8028b34:	68fb      	ldr	r3, [r7, #12]
 8028b36:	2b01      	cmp	r3, #1
 8028b38:	d112      	bne.n	8028b60 <MQTTPacket_decode+0x6c>
			goto exit;
		*value += (c & 127) * multiplier;
 8028b3a:	683b      	ldr	r3, [r7, #0]
 8028b3c:	681a      	ldr	r2, [r3, #0]
 8028b3e:	7afb      	ldrb	r3, [r7, #11]
 8028b40:	f003 037f 	and.w	r3, r3, #127	@ 0x7f
 8028b44:	6979      	ldr	r1, [r7, #20]
 8028b46:	fb01 f303 	mul.w	r3, r1, r3
 8028b4a:	441a      	add	r2, r3
 8028b4c:	683b      	ldr	r3, [r7, #0]
 8028b4e:	601a      	str	r2, [r3, #0]
		multiplier *= 128;
 8028b50:	697b      	ldr	r3, [r7, #20]
 8028b52:	01db      	lsls	r3, r3, #7
 8028b54:	617b      	str	r3, [r7, #20]
	} while ((c & 128) != 0);
 8028b56:	7afb      	ldrb	r3, [r7, #11]
 8028b58:	b25b      	sxtb	r3, r3
 8028b5a:	2b00      	cmp	r3, #0
 8028b5c:	dbd6      	blt.n	8028b0c <MQTTPacket_decode+0x18>
exit:
 8028b5e:	e000      	b.n	8028b62 <MQTTPacket_decode+0x6e>
			goto exit;
 8028b60:	bf00      	nop
	FUNC_EXIT_RC(len);
	return len;
 8028b62:	693b      	ldr	r3, [r7, #16]
}
 8028b64:	4618      	mov	r0, r3
 8028b66:	3718      	adds	r7, #24
 8028b68:	46bd      	mov	sp, r7
 8028b6a:	bd80      	pop	{r7, pc}

08028b6c <MQTTPacket_len>:


int MQTTPacket_len(int rem_len)
{
 8028b6c:	b480      	push	{r7}
 8028b6e:	b083      	sub	sp, #12
 8028b70:	af00      	add	r7, sp, #0
 8028b72:	6078      	str	r0, [r7, #4]
	rem_len += 1; /* header byte */
 8028b74:	687b      	ldr	r3, [r7, #4]
 8028b76:	3301      	adds	r3, #1
 8028b78:	607b      	str	r3, [r7, #4]

	/* now remaining_length field */
	if (rem_len < 128)
 8028b7a:	687b      	ldr	r3, [r7, #4]
 8028b7c:	2b7f      	cmp	r3, #127	@ 0x7f
 8028b7e:	dc03      	bgt.n	8028b88 <MQTTPacket_len+0x1c>
		rem_len += 1;
 8028b80:	687b      	ldr	r3, [r7, #4]
 8028b82:	3301      	adds	r3, #1
 8028b84:	607b      	str	r3, [r7, #4]
 8028b86:	e012      	b.n	8028bae <MQTTPacket_len+0x42>
	else if (rem_len < 16384)
 8028b88:	687b      	ldr	r3, [r7, #4]
 8028b8a:	f5b3 4f80 	cmp.w	r3, #16384	@ 0x4000
 8028b8e:	da03      	bge.n	8028b98 <MQTTPacket_len+0x2c>
		rem_len += 2;
 8028b90:	687b      	ldr	r3, [r7, #4]
 8028b92:	3302      	adds	r3, #2
 8028b94:	607b      	str	r3, [r7, #4]
 8028b96:	e00a      	b.n	8028bae <MQTTPacket_len+0x42>
	else if (rem_len < 2097151)
 8028b98:	687b      	ldr	r3, [r7, #4]
 8028b9a:	4a08      	ldr	r2, [pc, #32]	@ (8028bbc <MQTTPacket_len+0x50>)
 8028b9c:	4293      	cmp	r3, r2
 8028b9e:	dc03      	bgt.n	8028ba8 <MQTTPacket_len+0x3c>
		rem_len += 3;
 8028ba0:	687b      	ldr	r3, [r7, #4]
 8028ba2:	3303      	adds	r3, #3
 8028ba4:	607b      	str	r3, [r7, #4]
 8028ba6:	e002      	b.n	8028bae <MQTTPacket_len+0x42>
	else
		rem_len += 4;
 8028ba8:	687b      	ldr	r3, [r7, #4]
 8028baa:	3304      	adds	r3, #4
 8028bac:	607b      	str	r3, [r7, #4]
	return rem_len;
 8028bae:	687b      	ldr	r3, [r7, #4]
}
 8028bb0:	4618      	mov	r0, r3
 8028bb2:	370c      	adds	r7, #12
 8028bb4:	46bd      	mov	sp, r7
 8028bb6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028bba:	4770      	bx	lr
 8028bbc:	001ffffe 	.word	0x001ffffe

08028bc0 <bufchar>:


static unsigned char* bufptr;

int bufchar(unsigned char* c, int count)
{
 8028bc0:	b480      	push	{r7}
 8028bc2:	b085      	sub	sp, #20
 8028bc4:	af00      	add	r7, sp, #0
 8028bc6:	6078      	str	r0, [r7, #4]
 8028bc8:	6039      	str	r1, [r7, #0]
	int i;

	for (i = 0; i < count; ++i)
 8028bca:	2300      	movs	r3, #0
 8028bcc:	60fb      	str	r3, [r7, #12]
 8028bce:	e00a      	b.n	8028be6 <bufchar+0x26>
		*c = *bufptr++;
 8028bd0:	4b0a      	ldr	r3, [pc, #40]	@ (8028bfc <bufchar+0x3c>)
 8028bd2:	681b      	ldr	r3, [r3, #0]
 8028bd4:	1c5a      	adds	r2, r3, #1
 8028bd6:	4909      	ldr	r1, [pc, #36]	@ (8028bfc <bufchar+0x3c>)
 8028bd8:	600a      	str	r2, [r1, #0]
 8028bda:	781a      	ldrb	r2, [r3, #0]
 8028bdc:	687b      	ldr	r3, [r7, #4]
 8028bde:	701a      	strb	r2, [r3, #0]
	for (i = 0; i < count; ++i)
 8028be0:	68fb      	ldr	r3, [r7, #12]
 8028be2:	3301      	adds	r3, #1
 8028be4:	60fb      	str	r3, [r7, #12]
 8028be6:	68fa      	ldr	r2, [r7, #12]
 8028be8:	683b      	ldr	r3, [r7, #0]
 8028bea:	429a      	cmp	r2, r3
 8028bec:	dbf0      	blt.n	8028bd0 <bufchar+0x10>
	return count;
 8028bee:	683b      	ldr	r3, [r7, #0]
}
 8028bf0:	4618      	mov	r0, r3
 8028bf2:	3714      	adds	r7, #20
 8028bf4:	46bd      	mov	sp, r7
 8028bf6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028bfa:	4770      	bx	lr
 8028bfc:	2402b158 	.word	0x2402b158

08028c00 <MQTTPacket_decodeBuf>:


int MQTTPacket_decodeBuf(unsigned char* buf, int* value)
{
 8028c00:	b580      	push	{r7, lr}
 8028c02:	b082      	sub	sp, #8
 8028c04:	af00      	add	r7, sp, #0
 8028c06:	6078      	str	r0, [r7, #4]
 8028c08:	6039      	str	r1, [r7, #0]
	bufptr = buf;
 8028c0a:	4a06      	ldr	r2, [pc, #24]	@ (8028c24 <MQTTPacket_decodeBuf+0x24>)
 8028c0c:	687b      	ldr	r3, [r7, #4]
 8028c0e:	6013      	str	r3, [r2, #0]
	return MQTTPacket_decode(bufchar, value);
 8028c10:	6839      	ldr	r1, [r7, #0]
 8028c12:	4805      	ldr	r0, [pc, #20]	@ (8028c28 <MQTTPacket_decodeBuf+0x28>)
 8028c14:	f7ff ff6e 	bl	8028af4 <MQTTPacket_decode>
 8028c18:	4603      	mov	r3, r0
}
 8028c1a:	4618      	mov	r0, r3
 8028c1c:	3708      	adds	r7, #8
 8028c1e:	46bd      	mov	sp, r7
 8028c20:	bd80      	pop	{r7, pc}
 8028c22:	bf00      	nop
 8028c24:	2402b158 	.word	0x2402b158
 8028c28:	08028bc1 	.word	0x08028bc1

08028c2c <readInt>:
 * Calculates an integer from two bytes read from the input buffer
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the integer value calculated
 */
int readInt(unsigned char** pptr)
{
 8028c2c:	b480      	push	{r7}
 8028c2e:	b085      	sub	sp, #20
 8028c30:	af00      	add	r7, sp, #0
 8028c32:	6078      	str	r0, [r7, #4]
	unsigned char* ptr = *pptr;
 8028c34:	687b      	ldr	r3, [r7, #4]
 8028c36:	681b      	ldr	r3, [r3, #0]
 8028c38:	60fb      	str	r3, [r7, #12]
	int len = 256*(*ptr) + (*(ptr+1));
 8028c3a:	68fb      	ldr	r3, [r7, #12]
 8028c3c:	781b      	ldrb	r3, [r3, #0]
 8028c3e:	021b      	lsls	r3, r3, #8
 8028c40:	68fa      	ldr	r2, [r7, #12]
 8028c42:	3201      	adds	r2, #1
 8028c44:	7812      	ldrb	r2, [r2, #0]
 8028c46:	4413      	add	r3, r2
 8028c48:	60bb      	str	r3, [r7, #8]
	*pptr += 2;
 8028c4a:	687b      	ldr	r3, [r7, #4]
 8028c4c:	681b      	ldr	r3, [r3, #0]
 8028c4e:	1c9a      	adds	r2, r3, #2
 8028c50:	687b      	ldr	r3, [r7, #4]
 8028c52:	601a      	str	r2, [r3, #0]
	return len;
 8028c54:	68bb      	ldr	r3, [r7, #8]
}
 8028c56:	4618      	mov	r0, r3
 8028c58:	3714      	adds	r7, #20
 8028c5a:	46bd      	mov	sp, r7
 8028c5c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028c60:	4770      	bx	lr

08028c62 <readChar>:
 * Reads one character from the input buffer.
 * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned
 * @return the character read
 */
char readChar(unsigned char** pptr)
{
 8028c62:	b480      	push	{r7}
 8028c64:	b085      	sub	sp, #20
 8028c66:	af00      	add	r7, sp, #0
 8028c68:	6078      	str	r0, [r7, #4]
	char c = **pptr;
 8028c6a:	687b      	ldr	r3, [r7, #4]
 8028c6c:	681b      	ldr	r3, [r3, #0]
 8028c6e:	781b      	ldrb	r3, [r3, #0]
 8028c70:	73fb      	strb	r3, [r7, #15]
	(*pptr)++;
 8028c72:	687b      	ldr	r3, [r7, #4]
 8028c74:	681b      	ldr	r3, [r3, #0]
 8028c76:	1c5a      	adds	r2, r3, #1
 8028c78:	687b      	ldr	r3, [r7, #4]
 8028c7a:	601a      	str	r2, [r3, #0]
	return c;
 8028c7c:	7bfb      	ldrb	r3, [r7, #15]
}
 8028c7e:	4618      	mov	r0, r3
 8028c80:	3714      	adds	r7, #20
 8028c82:	46bd      	mov	sp, r7
 8028c84:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028c88:	4770      	bx	lr

08028c8a <writeChar>:
 * Writes one character to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param c the character to write
 */
void writeChar(unsigned char** pptr, char c)
{
 8028c8a:	b480      	push	{r7}
 8028c8c:	b083      	sub	sp, #12
 8028c8e:	af00      	add	r7, sp, #0
 8028c90:	6078      	str	r0, [r7, #4]
 8028c92:	460b      	mov	r3, r1
 8028c94:	70fb      	strb	r3, [r7, #3]
	**pptr = c;
 8028c96:	687b      	ldr	r3, [r7, #4]
 8028c98:	681b      	ldr	r3, [r3, #0]
 8028c9a:	78fa      	ldrb	r2, [r7, #3]
 8028c9c:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 8028c9e:	687b      	ldr	r3, [r7, #4]
 8028ca0:	681b      	ldr	r3, [r3, #0]
 8028ca2:	1c5a      	adds	r2, r3, #1
 8028ca4:	687b      	ldr	r3, [r7, #4]
 8028ca6:	601a      	str	r2, [r3, #0]
}
 8028ca8:	bf00      	nop
 8028caa:	370c      	adds	r7, #12
 8028cac:	46bd      	mov	sp, r7
 8028cae:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028cb2:	4770      	bx	lr

08028cb4 <writeInt>:
 * Writes an integer as 2 bytes to an output buffer.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param anInt the integer to write
 */
void writeInt(unsigned char** pptr, int anInt)
{
 8028cb4:	b480      	push	{r7}
 8028cb6:	b083      	sub	sp, #12
 8028cb8:	af00      	add	r7, sp, #0
 8028cba:	6078      	str	r0, [r7, #4]
 8028cbc:	6039      	str	r1, [r7, #0]
	**pptr = (unsigned char)(anInt / 256);
 8028cbe:	683b      	ldr	r3, [r7, #0]
 8028cc0:	2b00      	cmp	r3, #0
 8028cc2:	da00      	bge.n	8028cc6 <writeInt+0x12>
 8028cc4:	33ff      	adds	r3, #255	@ 0xff
 8028cc6:	121b      	asrs	r3, r3, #8
 8028cc8:	461a      	mov	r2, r3
 8028cca:	687b      	ldr	r3, [r7, #4]
 8028ccc:	681b      	ldr	r3, [r3, #0]
 8028cce:	b2d2      	uxtb	r2, r2
 8028cd0:	701a      	strb	r2, [r3, #0]
	(*pptr)++;
 8028cd2:	687b      	ldr	r3, [r7, #4]
 8028cd4:	681b      	ldr	r3, [r3, #0]
 8028cd6:	1c5a      	adds	r2, r3, #1
 8028cd8:	687b      	ldr	r3, [r7, #4]
 8028cda:	601a      	str	r2, [r3, #0]
	**pptr = (unsigned char)(anInt % 256);
 8028cdc:	683b      	ldr	r3, [r7, #0]
 8028cde:	425a      	negs	r2, r3
 8028ce0:	b2db      	uxtb	r3, r3
 8028ce2:	b2d2      	uxtb	r2, r2
 8028ce4:	bf58      	it	pl
 8028ce6:	4253      	negpl	r3, r2
 8028ce8:	687a      	ldr	r2, [r7, #4]
 8028cea:	6812      	ldr	r2, [r2, #0]
 8028cec:	b2db      	uxtb	r3, r3
 8028cee:	7013      	strb	r3, [r2, #0]
	(*pptr)++;
 8028cf0:	687b      	ldr	r3, [r7, #4]
 8028cf2:	681b      	ldr	r3, [r3, #0]
 8028cf4:	1c5a      	adds	r2, r3, #1
 8028cf6:	687b      	ldr	r3, [r7, #4]
 8028cf8:	601a      	str	r2, [r3, #0]
}
 8028cfa:	bf00      	nop
 8028cfc:	370c      	adds	r7, #12
 8028cfe:	46bd      	mov	sp, r7
 8028d00:	f85d 7b04 	ldr.w	r7, [sp], #4
 8028d04:	4770      	bx	lr

08028d06 <writeCString>:
 * Writes a "UTF" string to an output buffer.  Converts C string to length-delimited.
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param string the C string to write
 */
void writeCString(unsigned char** pptr, const char* string)
{
 8028d06:	b580      	push	{r7, lr}
 8028d08:	b084      	sub	sp, #16
 8028d0a:	af00      	add	r7, sp, #0
 8028d0c:	6078      	str	r0, [r7, #4]
 8028d0e:	6039      	str	r1, [r7, #0]
	int len = strlen(string);
 8028d10:	6838      	ldr	r0, [r7, #0]
 8028d12:	f7d7 fb45 	bl	80003a0 <strlen>
 8028d16:	4603      	mov	r3, r0
 8028d18:	60fb      	str	r3, [r7, #12]
	writeInt(pptr, len);
 8028d1a:	68f9      	ldr	r1, [r7, #12]
 8028d1c:	6878      	ldr	r0, [r7, #4]
 8028d1e:	f7ff ffc9 	bl	8028cb4 <writeInt>
	memcpy(*pptr, string, len);
 8028d22:	687b      	ldr	r3, [r7, #4]
 8028d24:	681b      	ldr	r3, [r3, #0]
 8028d26:	68fa      	ldr	r2, [r7, #12]
 8028d28:	6839      	ldr	r1, [r7, #0]
 8028d2a:	4618      	mov	r0, r3
 8028d2c:	f002 f91f 	bl	802af6e <memcpy>
	*pptr += len;
 8028d30:	687b      	ldr	r3, [r7, #4]
 8028d32:	681a      	ldr	r2, [r3, #0]
 8028d34:	68fb      	ldr	r3, [r7, #12]
 8028d36:	441a      	add	r2, r3
 8028d38:	687b      	ldr	r3, [r7, #4]
 8028d3a:	601a      	str	r2, [r3, #0]
}
 8028d3c:	bf00      	nop
 8028d3e:	3710      	adds	r7, #16
 8028d40:	46bd      	mov	sp, r7
 8028d42:	bd80      	pop	{r7, pc}

08028d44 <writeMQTTString>:
	return len;
}


void writeMQTTString(unsigned char** pptr, MQTTString mqttstring)
{
 8028d44:	b580      	push	{r7, lr}
 8028d46:	b084      	sub	sp, #16
 8028d48:	af00      	add	r7, sp, #0
 8028d4a:	60f8      	str	r0, [r7, #12]
 8028d4c:	4638      	mov	r0, r7
 8028d4e:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	if (mqttstring.lenstring.len > 0)
 8028d52:	687b      	ldr	r3, [r7, #4]
 8028d54:	2b00      	cmp	r3, #0
 8028d56:	dd12      	ble.n	8028d7e <writeMQTTString+0x3a>
	{
		writeInt(pptr, mqttstring.lenstring.len);
 8028d58:	687b      	ldr	r3, [r7, #4]
 8028d5a:	4619      	mov	r1, r3
 8028d5c:	68f8      	ldr	r0, [r7, #12]
 8028d5e:	f7ff ffa9 	bl	8028cb4 <writeInt>
		memcpy(*pptr, mqttstring.lenstring.data, mqttstring.lenstring.len);
 8028d62:	68fb      	ldr	r3, [r7, #12]
 8028d64:	681b      	ldr	r3, [r3, #0]
 8028d66:	68b9      	ldr	r1, [r7, #8]
 8028d68:	687a      	ldr	r2, [r7, #4]
 8028d6a:	4618      	mov	r0, r3
 8028d6c:	f002 f8ff 	bl	802af6e <memcpy>
		*pptr += mqttstring.lenstring.len;
 8028d70:	68fb      	ldr	r3, [r7, #12]
 8028d72:	681b      	ldr	r3, [r3, #0]
 8028d74:	687a      	ldr	r2, [r7, #4]
 8028d76:	441a      	add	r2, r3
 8028d78:	68fb      	ldr	r3, [r7, #12]
 8028d7a:	601a      	str	r2, [r3, #0]
	}
	else if (mqttstring.cstring)
		writeCString(pptr, mqttstring.cstring);
	else
		writeInt(pptr, 0);
}
 8028d7c:	e00c      	b.n	8028d98 <writeMQTTString+0x54>
	else if (mqttstring.cstring)
 8028d7e:	683b      	ldr	r3, [r7, #0]
 8028d80:	2b00      	cmp	r3, #0
 8028d82:	d005      	beq.n	8028d90 <writeMQTTString+0x4c>
		writeCString(pptr, mqttstring.cstring);
 8028d84:	683b      	ldr	r3, [r7, #0]
 8028d86:	4619      	mov	r1, r3
 8028d88:	68f8      	ldr	r0, [r7, #12]
 8028d8a:	f7ff ffbc 	bl	8028d06 <writeCString>
}
 8028d8e:	e003      	b.n	8028d98 <writeMQTTString+0x54>
		writeInt(pptr, 0);
 8028d90:	2100      	movs	r1, #0
 8028d92:	68f8      	ldr	r0, [r7, #12]
 8028d94:	f7ff ff8e 	bl	8028cb4 <writeInt>
}
 8028d98:	bf00      	nop
 8028d9a:	3710      	adds	r7, #16
 8028d9c:	46bd      	mov	sp, r7
 8028d9e:	bd80      	pop	{r7, pc}

08028da0 <readMQTTLenString>:
 * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned
 * @param enddata pointer to the end of the data: do not read beyond
 * @return 1 if successful, 0 if not
 */
int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata)
{
 8028da0:	b580      	push	{r7, lr}
 8028da2:	b086      	sub	sp, #24
 8028da4:	af00      	add	r7, sp, #0
 8028da6:	60f8      	str	r0, [r7, #12]
 8028da8:	60b9      	str	r1, [r7, #8]
 8028daa:	607a      	str	r2, [r7, #4]
	int rc = 0;
 8028dac:	2300      	movs	r3, #0
 8028dae:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	/* the first two bytes are the length of the string */
	if (enddata - (*pptr) > 1) /* enough length to read the integer? */
 8028db0:	68bb      	ldr	r3, [r7, #8]
 8028db2:	681b      	ldr	r3, [r3, #0]
 8028db4:	687a      	ldr	r2, [r7, #4]
 8028db6:	1ad3      	subs	r3, r2, r3
 8028db8:	2b01      	cmp	r3, #1
 8028dba:	dd1a      	ble.n	8028df2 <readMQTTLenString+0x52>
	{
		mqttstring->lenstring.len = readInt(pptr); /* increments pptr to point past length */
 8028dbc:	68b8      	ldr	r0, [r7, #8]
 8028dbe:	f7ff ff35 	bl	8028c2c <readInt>
 8028dc2:	4602      	mov	r2, r0
 8028dc4:	68fb      	ldr	r3, [r7, #12]
 8028dc6:	605a      	str	r2, [r3, #4]
		if (&(*pptr)[mqttstring->lenstring.len] <= enddata)
 8028dc8:	68bb      	ldr	r3, [r7, #8]
 8028dca:	681b      	ldr	r3, [r3, #0]
 8028dcc:	68fa      	ldr	r2, [r7, #12]
 8028dce:	6852      	ldr	r2, [r2, #4]
 8028dd0:	4413      	add	r3, r2
 8028dd2:	687a      	ldr	r2, [r7, #4]
 8028dd4:	429a      	cmp	r2, r3
 8028dd6:	d30c      	bcc.n	8028df2 <readMQTTLenString+0x52>
		{
			mqttstring->lenstring.data = (char*)*pptr;
 8028dd8:	68bb      	ldr	r3, [r7, #8]
 8028dda:	681a      	ldr	r2, [r3, #0]
 8028ddc:	68fb      	ldr	r3, [r7, #12]
 8028dde:	609a      	str	r2, [r3, #8]
			*pptr += mqttstring->lenstring.len;
 8028de0:	68bb      	ldr	r3, [r7, #8]
 8028de2:	681b      	ldr	r3, [r3, #0]
 8028de4:	68fa      	ldr	r2, [r7, #12]
 8028de6:	6852      	ldr	r2, [r2, #4]
 8028de8:	441a      	add	r2, r3
 8028dea:	68bb      	ldr	r3, [r7, #8]
 8028dec:	601a      	str	r2, [r3, #0]
			rc = 1;
 8028dee:	2301      	movs	r3, #1
 8028df0:	617b      	str	r3, [r7, #20]
		}
	}
	mqttstring->cstring = NULL;
 8028df2:	68fb      	ldr	r3, [r7, #12]
 8028df4:	2200      	movs	r2, #0
 8028df6:	601a      	str	r2, [r3, #0]
	FUNC_EXIT_RC(rc);
	return rc;
 8028df8:	697b      	ldr	r3, [r7, #20]
}
 8028dfa:	4618      	mov	r0, r3
 8028dfc:	3718      	adds	r7, #24
 8028dfe:	46bd      	mov	sp, r7
 8028e00:	bd80      	pop	{r7, pc}

08028e02 <MQTTstrlen>:
 * Return the length of the MQTTstring - C string if there is one, otherwise the length delimited string
 * @param mqttstring the string to return the length of
 * @return the length of the string
 */
int MQTTstrlen(MQTTString mqttstring)
{
 8028e02:	b580      	push	{r7, lr}
 8028e04:	b086      	sub	sp, #24
 8028e06:	af00      	add	r7, sp, #0
 8028e08:	1d3b      	adds	r3, r7, #4
 8028e0a:	e883 0007 	stmia.w	r3, {r0, r1, r2}
	int rc = 0;
 8028e0e:	2300      	movs	r3, #0
 8028e10:	617b      	str	r3, [r7, #20]

	if (mqttstring.cstring)
 8028e12:	687b      	ldr	r3, [r7, #4]
 8028e14:	2b00      	cmp	r3, #0
 8028e16:	d006      	beq.n	8028e26 <MQTTstrlen+0x24>
		rc = strlen(mqttstring.cstring);
 8028e18:	687b      	ldr	r3, [r7, #4]
 8028e1a:	4618      	mov	r0, r3
 8028e1c:	f7d7 fac0 	bl	80003a0 <strlen>
 8028e20:	4603      	mov	r3, r0
 8028e22:	617b      	str	r3, [r7, #20]
 8028e24:	e001      	b.n	8028e2a <MQTTstrlen+0x28>
	else
		rc = mqttstring.lenstring.len;
 8028e26:	68bb      	ldr	r3, [r7, #8]
 8028e28:	617b      	str	r3, [r7, #20]
	return rc;
 8028e2a:	697b      	ldr	r3, [r7, #20]
}
 8028e2c:	4618      	mov	r0, r3
 8028e2e:	3718      	adds	r7, #24
 8028e30:	46bd      	mov	sp, r7
 8028e32:	bd80      	pop	{r7, pc}

08028e34 <MQTTPacket_equals>:
 * @param a the MQTTString to compare
 * @param bptr the C string to compare
 * @return boolean - equal or not
 */
int MQTTPacket_equals(MQTTString* a, char* bptr)
{
 8028e34:	b580      	push	{r7, lr}
 8028e36:	b086      	sub	sp, #24
 8028e38:	af00      	add	r7, sp, #0
 8028e3a:	6078      	str	r0, [r7, #4]
 8028e3c:	6039      	str	r1, [r7, #0]
	int alen = 0,
 8028e3e:	2300      	movs	r3, #0
 8028e40:	617b      	str	r3, [r7, #20]
		blen = 0;
 8028e42:	2300      	movs	r3, #0
 8028e44:	60fb      	str	r3, [r7, #12]
	char *aptr;
	
	if (a->cstring)
 8028e46:	687b      	ldr	r3, [r7, #4]
 8028e48:	681b      	ldr	r3, [r3, #0]
 8028e4a:	2b00      	cmp	r3, #0
 8028e4c:	d00a      	beq.n	8028e64 <MQTTPacket_equals+0x30>
	{
		aptr = a->cstring;
 8028e4e:	687b      	ldr	r3, [r7, #4]
 8028e50:	681b      	ldr	r3, [r3, #0]
 8028e52:	613b      	str	r3, [r7, #16]
		alen = strlen(a->cstring);
 8028e54:	687b      	ldr	r3, [r7, #4]
 8028e56:	681b      	ldr	r3, [r3, #0]
 8028e58:	4618      	mov	r0, r3
 8028e5a:	f7d7 faa1 	bl	80003a0 <strlen>
 8028e5e:	4603      	mov	r3, r0
 8028e60:	617b      	str	r3, [r7, #20]
 8028e62:	e005      	b.n	8028e70 <MQTTPacket_equals+0x3c>
	}
	else
	{
		aptr = a->lenstring.data;
 8028e64:	687b      	ldr	r3, [r7, #4]
 8028e66:	689b      	ldr	r3, [r3, #8]
 8028e68:	613b      	str	r3, [r7, #16]
		alen = a->lenstring.len;
 8028e6a:	687b      	ldr	r3, [r7, #4]
 8028e6c:	685b      	ldr	r3, [r3, #4]
 8028e6e:	617b      	str	r3, [r7, #20]
	}
	blen = strlen(bptr);
 8028e70:	6838      	ldr	r0, [r7, #0]
 8028e72:	f7d7 fa95 	bl	80003a0 <strlen>
 8028e76:	4603      	mov	r3, r0
 8028e78:	60fb      	str	r3, [r7, #12]
	
	return (alen == blen) && (strncmp(aptr, bptr, alen) == 0);
 8028e7a:	697a      	ldr	r2, [r7, #20]
 8028e7c:	68fb      	ldr	r3, [r7, #12]
 8028e7e:	429a      	cmp	r2, r3
 8028e80:	d10a      	bne.n	8028e98 <MQTTPacket_equals+0x64>
 8028e82:	697b      	ldr	r3, [r7, #20]
 8028e84:	461a      	mov	r2, r3
 8028e86:	6839      	ldr	r1, [r7, #0]
 8028e88:	6938      	ldr	r0, [r7, #16]
 8028e8a:	f001 ff81 	bl	802ad90 <strncmp>
 8028e8e:	4603      	mov	r3, r0
 8028e90:	2b00      	cmp	r3, #0
 8028e92:	d101      	bne.n	8028e98 <MQTTPacket_equals+0x64>
 8028e94:	2301      	movs	r3, #1
 8028e96:	e000      	b.n	8028e9a <MQTTPacket_equals+0x66>
 8028e98:	2300      	movs	r3, #0
}
 8028e9a:	4618      	mov	r0, r3
 8028e9c:	3718      	adds	r7, #24
 8028e9e:	46bd      	mov	sp, r7
 8028ea0:	bd80      	pop	{r7, pc}

08028ea2 <MQTTSerialize_publishLength>:
  * @param topicName the topic name to be used in the publish  
  * @param payloadlen the length of the payload to be sent
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_publishLength(int qos, MQTTString topicName, int payloadlen)
{
 8028ea2:	b580      	push	{r7, lr}
 8028ea4:	b086      	sub	sp, #24
 8028ea6:	af00      	add	r7, sp, #0
 8028ea8:	60f8      	str	r0, [r7, #12]
 8028eaa:	4638      	mov	r0, r7
 8028eac:	e880 000e 	stmia.w	r0, {r1, r2, r3}
	int len = 0;
 8028eb0:	2300      	movs	r3, #0
 8028eb2:	617b      	str	r3, [r7, #20]

	len += 2 + MQTTstrlen(topicName) + payloadlen;
 8028eb4:	463b      	mov	r3, r7
 8028eb6:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 8028eba:	f7ff ffa2 	bl	8028e02 <MQTTstrlen>
 8028ebe:	4603      	mov	r3, r0
 8028ec0:	1c9a      	adds	r2, r3, #2
 8028ec2:	6a3b      	ldr	r3, [r7, #32]
 8028ec4:	4413      	add	r3, r2
 8028ec6:	697a      	ldr	r2, [r7, #20]
 8028ec8:	4413      	add	r3, r2
 8028eca:	617b      	str	r3, [r7, #20]
	if (qos > 0)
 8028ecc:	68fb      	ldr	r3, [r7, #12]
 8028ece:	2b00      	cmp	r3, #0
 8028ed0:	dd02      	ble.n	8028ed8 <MQTTSerialize_publishLength+0x36>
		len += 2; /* packetid */
 8028ed2:	697b      	ldr	r3, [r7, #20]
 8028ed4:	3302      	adds	r3, #2
 8028ed6:	617b      	str	r3, [r7, #20]
	return len;
 8028ed8:	697b      	ldr	r3, [r7, #20]
}
 8028eda:	4618      	mov	r0, r3
 8028edc:	3718      	adds	r7, #24
 8028ede:	46bd      	mov	sp, r7
 8028ee0:	bd80      	pop	{r7, pc}

08028ee2 <MQTTSerialize_publish>:
  * @param payloadlen integer - the length of the MQTT payload
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid,
		MQTTString topicName, unsigned char* payload, int payloadlen)
{
 8028ee2:	b580      	push	{r7, lr}
 8028ee4:	b08a      	sub	sp, #40	@ 0x28
 8028ee6:	af02      	add	r7, sp, #8
 8028ee8:	60f8      	str	r0, [r7, #12]
 8028eea:	60b9      	str	r1, [r7, #8]
 8028eec:	603b      	str	r3, [r7, #0]
 8028eee:	4613      	mov	r3, r2
 8028ef0:	71fb      	strb	r3, [r7, #7]
	unsigned char *ptr = buf;
 8028ef2:	68fb      	ldr	r3, [r7, #12]
 8028ef4:	617b      	str	r3, [r7, #20]
	MQTTHeader header = {0};
 8028ef6:	2300      	movs	r3, #0
 8028ef8:	613b      	str	r3, [r7, #16]
	int rem_len = 0;
 8028efa:	2300      	movs	r3, #0
 8028efc:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 8028efe:	2300      	movs	r3, #0
 8028f00:	61fb      	str	r3, [r7, #28]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_publishLength(qos, topicName, payloadlen)) > buflen)
 8028f02:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8028f04:	9300      	str	r3, [sp, #0]
 8028f06:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8028f0a:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028f0c:	6838      	ldr	r0, [r7, #0]
 8028f0e:	f7ff ffc8 	bl	8028ea2 <MQTTSerialize_publishLength>
 8028f12:	61b8      	str	r0, [r7, #24]
 8028f14:	69b8      	ldr	r0, [r7, #24]
 8028f16:	f7ff fe29 	bl	8028b6c <MQTTPacket_len>
 8028f1a:	4602      	mov	r2, r0
 8028f1c:	68bb      	ldr	r3, [r7, #8]
 8028f1e:	4293      	cmp	r3, r2
 8028f20:	da03      	bge.n	8028f2a <MQTTSerialize_publish+0x48>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028f22:	f06f 0301 	mvn.w	r3, #1
 8028f26:	61fb      	str	r3, [r7, #28]
		goto exit;
 8028f28:	e04c      	b.n	8028fc4 <MQTTSerialize_publish+0xe2>
	}

	header.bits.type = PUBLISH;
 8028f2a:	7c3b      	ldrb	r3, [r7, #16]
 8028f2c:	2203      	movs	r2, #3
 8028f2e:	f362 1307 	bfi	r3, r2, #4, #4
 8028f32:	743b      	strb	r3, [r7, #16]
	header.bits.dup = dup;
 8028f34:	79fb      	ldrb	r3, [r7, #7]
 8028f36:	f003 0301 	and.w	r3, r3, #1
 8028f3a:	b2da      	uxtb	r2, r3
 8028f3c:	7c3b      	ldrb	r3, [r7, #16]
 8028f3e:	f362 03c3 	bfi	r3, r2, #3, #1
 8028f42:	743b      	strb	r3, [r7, #16]
	header.bits.qos = qos;
 8028f44:	683b      	ldr	r3, [r7, #0]
 8028f46:	f003 0303 	and.w	r3, r3, #3
 8028f4a:	b2da      	uxtb	r2, r3
 8028f4c:	7c3b      	ldrb	r3, [r7, #16]
 8028f4e:	f362 0342 	bfi	r3, r2, #1, #2
 8028f52:	743b      	strb	r3, [r7, #16]
	header.bits.retain = retained;
 8028f54:	f897 3028 	ldrb.w	r3, [r7, #40]	@ 0x28
 8028f58:	f003 0301 	and.w	r3, r3, #1
 8028f5c:	b2da      	uxtb	r2, r3
 8028f5e:	7c3b      	ldrb	r3, [r7, #16]
 8028f60:	f362 0300 	bfi	r3, r2, #0, #1
 8028f64:	743b      	strb	r3, [r7, #16]
	writeChar(&ptr, header.byte); /* write header */
 8028f66:	7c3a      	ldrb	r2, [r7, #16]
 8028f68:	f107 0314 	add.w	r3, r7, #20
 8028f6c:	4611      	mov	r1, r2
 8028f6e:	4618      	mov	r0, r3
 8028f70:	f7ff fe8b 	bl	8028c8a <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 8028f74:	697b      	ldr	r3, [r7, #20]
 8028f76:	69b9      	ldr	r1, [r7, #24]
 8028f78:	4618      	mov	r0, r3
 8028f7a:	f7ff fd8c 	bl	8028a96 <MQTTPacket_encode>
 8028f7e:	4602      	mov	r2, r0
 8028f80:	697b      	ldr	r3, [r7, #20]
 8028f82:	4413      	add	r3, r2
 8028f84:	617b      	str	r3, [r7, #20]

	writeMQTTString(&ptr, topicName);
 8028f86:	f107 0014 	add.w	r0, r7, #20
 8028f8a:	f107 0330 	add.w	r3, r7, #48	@ 0x30
 8028f8e:	cb0e      	ldmia	r3, {r1, r2, r3}
 8028f90:	f7ff fed8 	bl	8028d44 <writeMQTTString>

	if (qos > 0)
 8028f94:	683b      	ldr	r3, [r7, #0]
 8028f96:	2b00      	cmp	r3, #0
 8028f98:	dd06      	ble.n	8028fa8 <MQTTSerialize_publish+0xc6>
		writeInt(&ptr, packetid);
 8028f9a:	8dba      	ldrh	r2, [r7, #44]	@ 0x2c
 8028f9c:	f107 0314 	add.w	r3, r7, #20
 8028fa0:	4611      	mov	r1, r2
 8028fa2:	4618      	mov	r0, r3
 8028fa4:	f7ff fe86 	bl	8028cb4 <writeInt>

	memcpy(ptr, payload, payloadlen);
 8028fa8:	697b      	ldr	r3, [r7, #20]
 8028faa:	6c3a      	ldr	r2, [r7, #64]	@ 0x40
 8028fac:	6bf9      	ldr	r1, [r7, #60]	@ 0x3c
 8028fae:	4618      	mov	r0, r3
 8028fb0:	f001 ffdd 	bl	802af6e <memcpy>
	ptr += payloadlen;
 8028fb4:	697a      	ldr	r2, [r7, #20]
 8028fb6:	6c3b      	ldr	r3, [r7, #64]	@ 0x40
 8028fb8:	4413      	add	r3, r2
 8028fba:	617b      	str	r3, [r7, #20]

	rc = ptr - buf;
 8028fbc:	697a      	ldr	r2, [r7, #20]
 8028fbe:	68fb      	ldr	r3, [r7, #12]
 8028fc0:	1ad3      	subs	r3, r2, r3
 8028fc2:	61fb      	str	r3, [r7, #28]

exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8028fc4:	69fb      	ldr	r3, [r7, #28]
}
 8028fc6:	4618      	mov	r0, r3
 8028fc8:	3720      	adds	r7, #32
 8028fca:	46bd      	mov	sp, r7
 8028fcc:	bd80      	pop	{r7, pc}

08028fce <MQTTSerialize_ack>:
  * @param dup the MQTT dup flag
  * @param packetid the MQTT packet identifier
  * @return serialized length, or error if 0
  */
int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char packettype, unsigned char dup, unsigned short packetid)
{
 8028fce:	b580      	push	{r7, lr}
 8028fd0:	b088      	sub	sp, #32
 8028fd2:	af00      	add	r7, sp, #0
 8028fd4:	60f8      	str	r0, [r7, #12]
 8028fd6:	60b9      	str	r1, [r7, #8]
 8028fd8:	4611      	mov	r1, r2
 8028fda:	461a      	mov	r2, r3
 8028fdc:	460b      	mov	r3, r1
 8028fde:	71fb      	strb	r3, [r7, #7]
 8028fe0:	4613      	mov	r3, r2
 8028fe2:	71bb      	strb	r3, [r7, #6]
	MQTTHeader header = {0};
 8028fe4:	2300      	movs	r3, #0
 8028fe6:	61bb      	str	r3, [r7, #24]
	int rc = 0;
 8028fe8:	2300      	movs	r3, #0
 8028fea:	61fb      	str	r3, [r7, #28]
	unsigned char *ptr = buf;
 8028fec:	68fb      	ldr	r3, [r7, #12]
 8028fee:	617b      	str	r3, [r7, #20]

	FUNC_ENTRY;
	if (buflen < 4)
 8028ff0:	68bb      	ldr	r3, [r7, #8]
 8028ff2:	2b03      	cmp	r3, #3
 8028ff4:	dc03      	bgt.n	8028ffe <MQTTSerialize_ack+0x30>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8028ff6:	f06f 0301 	mvn.w	r3, #1
 8028ffa:	61fb      	str	r3, [r7, #28]
		goto exit;
 8028ffc:	e037      	b.n	802906e <MQTTSerialize_ack+0xa0>
	}
	header.bits.type = packettype;
 8028ffe:	79fb      	ldrb	r3, [r7, #7]
 8029000:	f003 030f 	and.w	r3, r3, #15
 8029004:	b2da      	uxtb	r2, r3
 8029006:	7e3b      	ldrb	r3, [r7, #24]
 8029008:	f362 1307 	bfi	r3, r2, #4, #4
 802900c:	763b      	strb	r3, [r7, #24]
	header.bits.dup = dup;
 802900e:	79bb      	ldrb	r3, [r7, #6]
 8029010:	f003 0301 	and.w	r3, r3, #1
 8029014:	b2da      	uxtb	r2, r3
 8029016:	7e3b      	ldrb	r3, [r7, #24]
 8029018:	f362 03c3 	bfi	r3, r2, #3, #1
 802901c:	763b      	strb	r3, [r7, #24]
	header.bits.qos = (packettype == PUBREL) ? 1 : 0;
 802901e:	79fb      	ldrb	r3, [r7, #7]
 8029020:	2b06      	cmp	r3, #6
 8029022:	bf0c      	ite	eq
 8029024:	2301      	moveq	r3, #1
 8029026:	2300      	movne	r3, #0
 8029028:	b2db      	uxtb	r3, r3
 802902a:	f003 0303 	and.w	r3, r3, #3
 802902e:	b2da      	uxtb	r2, r3
 8029030:	7e3b      	ldrb	r3, [r7, #24]
 8029032:	f362 0342 	bfi	r3, r2, #1, #2
 8029036:	763b      	strb	r3, [r7, #24]
	writeChar(&ptr, header.byte); /* write header */
 8029038:	7e3a      	ldrb	r2, [r7, #24]
 802903a:	f107 0314 	add.w	r3, r7, #20
 802903e:	4611      	mov	r1, r2
 8029040:	4618      	mov	r0, r3
 8029042:	f7ff fe22 	bl	8028c8a <writeChar>

	ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */
 8029046:	697b      	ldr	r3, [r7, #20]
 8029048:	2102      	movs	r1, #2
 802904a:	4618      	mov	r0, r3
 802904c:	f7ff fd23 	bl	8028a96 <MQTTPacket_encode>
 8029050:	4602      	mov	r2, r0
 8029052:	697b      	ldr	r3, [r7, #20]
 8029054:	4413      	add	r3, r2
 8029056:	617b      	str	r3, [r7, #20]
	writeInt(&ptr, packetid);
 8029058:	8d3a      	ldrh	r2, [r7, #40]	@ 0x28
 802905a:	f107 0314 	add.w	r3, r7, #20
 802905e:	4611      	mov	r1, r2
 8029060:	4618      	mov	r0, r3
 8029062:	f7ff fe27 	bl	8028cb4 <writeInt>
	rc = ptr - buf;
 8029066:	697a      	ldr	r2, [r7, #20]
 8029068:	68fb      	ldr	r3, [r7, #12]
 802906a:	1ad3      	subs	r3, r2, r3
 802906c:	61fb      	str	r3, [r7, #28]
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 802906e:	69fb      	ldr	r3, [r7, #28]
}
 8029070:	4618      	mov	r0, r3
 8029072:	3720      	adds	r7, #32
 8029074:	46bd      	mov	sp, r7
 8029076:	bd80      	pop	{r7, pc}

08029078 <MQTTSerialize_subscribeLength>:
  * @param count the number of topic filter strings in topicFilters
  * @param topicFilters the array of topic filter strings to be used in the publish
  * @return the length of buffer needed to contain the serialized version of the packet
  */
int MQTTSerialize_subscribeLength(int count, MQTTString topicFilters[])
{
 8029078:	b580      	push	{r7, lr}
 802907a:	b084      	sub	sp, #16
 802907c:	af00      	add	r7, sp, #0
 802907e:	6078      	str	r0, [r7, #4]
 8029080:	6039      	str	r1, [r7, #0]
	int i;
	int len = 2; /* packetid */
 8029082:	2302      	movs	r3, #2
 8029084:	60bb      	str	r3, [r7, #8]

	for (i = 0; i < count; ++i)
 8029086:	2300      	movs	r3, #0
 8029088:	60fb      	str	r3, [r7, #12]
 802908a:	e013      	b.n	80290b4 <MQTTSerialize_subscribeLength+0x3c>
		len += 2 + MQTTstrlen(topicFilters[i]) + 1; /* length + topic + req_qos */
 802908c:	68fa      	ldr	r2, [r7, #12]
 802908e:	4613      	mov	r3, r2
 8029090:	005b      	lsls	r3, r3, #1
 8029092:	4413      	add	r3, r2
 8029094:	009b      	lsls	r3, r3, #2
 8029096:	461a      	mov	r2, r3
 8029098:	683b      	ldr	r3, [r7, #0]
 802909a:	4413      	add	r3, r2
 802909c:	e893 0007 	ldmia.w	r3, {r0, r1, r2}
 80290a0:	f7ff feaf 	bl	8028e02 <MQTTstrlen>
 80290a4:	4603      	mov	r3, r0
 80290a6:	3303      	adds	r3, #3
 80290a8:	68ba      	ldr	r2, [r7, #8]
 80290aa:	4413      	add	r3, r2
 80290ac:	60bb      	str	r3, [r7, #8]
	for (i = 0; i < count; ++i)
 80290ae:	68fb      	ldr	r3, [r7, #12]
 80290b0:	3301      	adds	r3, #1
 80290b2:	60fb      	str	r3, [r7, #12]
 80290b4:	68fa      	ldr	r2, [r7, #12]
 80290b6:	687b      	ldr	r3, [r7, #4]
 80290b8:	429a      	cmp	r2, r3
 80290ba:	dbe7      	blt.n	802908c <MQTTSerialize_subscribeLength+0x14>
	return len;
 80290bc:	68bb      	ldr	r3, [r7, #8]
}
 80290be:	4618      	mov	r0, r3
 80290c0:	3710      	adds	r7, #16
 80290c2:	46bd      	mov	sp, r7
 80290c4:	bd80      	pop	{r7, pc}

080290c6 <MQTTSerialize_subscribe>:
  * @param requestedQoSs - array of requested QoS
  * @return the length of the serialized data.  <= 0 indicates error
  */
int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, int count,
		MQTTString topicFilters[], int requestedQoSs[])
{
 80290c6:	b580      	push	{r7, lr}
 80290c8:	b08a      	sub	sp, #40	@ 0x28
 80290ca:	af00      	add	r7, sp, #0
 80290cc:	60f8      	str	r0, [r7, #12]
 80290ce:	60b9      	str	r1, [r7, #8]
 80290d0:	4611      	mov	r1, r2
 80290d2:	461a      	mov	r2, r3
 80290d4:	460b      	mov	r3, r1
 80290d6:	71fb      	strb	r3, [r7, #7]
 80290d8:	4613      	mov	r3, r2
 80290da:	80bb      	strh	r3, [r7, #4]
	unsigned char *ptr = buf;
 80290dc:	68fb      	ldr	r3, [r7, #12]
 80290de:	61bb      	str	r3, [r7, #24]
	MQTTHeader header = {0};
 80290e0:	2300      	movs	r3, #0
 80290e2:	617b      	str	r3, [r7, #20]
	int rem_len = 0;
 80290e4:	2300      	movs	r3, #0
 80290e6:	61fb      	str	r3, [r7, #28]
	int rc = 0;
 80290e8:	2300      	movs	r3, #0
 80290ea:	627b      	str	r3, [r7, #36]	@ 0x24
	int i = 0;
 80290ec:	2300      	movs	r3, #0
 80290ee:	623b      	str	r3, [r7, #32]

	FUNC_ENTRY;
	if (MQTTPacket_len(rem_len = MQTTSerialize_subscribeLength(count, topicFilters)) > buflen)
 80290f0:	6b79      	ldr	r1, [r7, #52]	@ 0x34
 80290f2:	6b38      	ldr	r0, [r7, #48]	@ 0x30
 80290f4:	f7ff ffc0 	bl	8029078 <MQTTSerialize_subscribeLength>
 80290f8:	61f8      	str	r0, [r7, #28]
 80290fa:	69f8      	ldr	r0, [r7, #28]
 80290fc:	f7ff fd36 	bl	8028b6c <MQTTPacket_len>
 8029100:	4602      	mov	r2, r0
 8029102:	68bb      	ldr	r3, [r7, #8]
 8029104:	4293      	cmp	r3, r2
 8029106:	da03      	bge.n	8029110 <MQTTSerialize_subscribe+0x4a>
	{
		rc = MQTTPACKET_BUFFER_TOO_SHORT;
 8029108:	f06f 0301 	mvn.w	r3, #1
 802910c:	627b      	str	r3, [r7, #36]	@ 0x24
		goto exit;
 802910e:	e051      	b.n	80291b4 <MQTTSerialize_subscribe+0xee>
	}

	header.byte = 0;
 8029110:	2300      	movs	r3, #0
 8029112:	753b      	strb	r3, [r7, #20]
	header.bits.type = SUBSCRIBE;
 8029114:	7d3b      	ldrb	r3, [r7, #20]
 8029116:	2208      	movs	r2, #8
 8029118:	f362 1307 	bfi	r3, r2, #4, #4
 802911c:	753b      	strb	r3, [r7, #20]
	header.bits.dup = dup;
 802911e:	79fb      	ldrb	r3, [r7, #7]
 8029120:	f003 0301 	and.w	r3, r3, #1
 8029124:	b2da      	uxtb	r2, r3
 8029126:	7d3b      	ldrb	r3, [r7, #20]
 8029128:	f362 03c3 	bfi	r3, r2, #3, #1
 802912c:	753b      	strb	r3, [r7, #20]
	header.bits.qos = 1;
 802912e:	7d3b      	ldrb	r3, [r7, #20]
 8029130:	2201      	movs	r2, #1
 8029132:	f362 0342 	bfi	r3, r2, #1, #2
 8029136:	753b      	strb	r3, [r7, #20]
	writeChar(&ptr, header.byte); /* write header */
 8029138:	7d3a      	ldrb	r2, [r7, #20]
 802913a:	f107 0318 	add.w	r3, r7, #24
 802913e:	4611      	mov	r1, r2
 8029140:	4618      	mov	r0, r3
 8029142:	f7ff fda2 	bl	8028c8a <writeChar>

	ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */;
 8029146:	69bb      	ldr	r3, [r7, #24]
 8029148:	69f9      	ldr	r1, [r7, #28]
 802914a:	4618      	mov	r0, r3
 802914c:	f7ff fca3 	bl	8028a96 <MQTTPacket_encode>
 8029150:	4602      	mov	r2, r0
 8029152:	69bb      	ldr	r3, [r7, #24]
 8029154:	4413      	add	r3, r2
 8029156:	61bb      	str	r3, [r7, #24]

	writeInt(&ptr, packetid);
 8029158:	88ba      	ldrh	r2, [r7, #4]
 802915a:	f107 0318 	add.w	r3, r7, #24
 802915e:	4611      	mov	r1, r2
 8029160:	4618      	mov	r0, r3
 8029162:	f7ff fda7 	bl	8028cb4 <writeInt>

	for (i = 0; i < count; ++i)
 8029166:	2300      	movs	r3, #0
 8029168:	623b      	str	r3, [r7, #32]
 802916a:	e01b      	b.n	80291a4 <MQTTSerialize_subscribe+0xde>
	{
		writeMQTTString(&ptr, topicFilters[i]);
 802916c:	6a3a      	ldr	r2, [r7, #32]
 802916e:	4613      	mov	r3, r2
 8029170:	005b      	lsls	r3, r3, #1
 8029172:	4413      	add	r3, r2
 8029174:	009b      	lsls	r3, r3, #2
 8029176:	461a      	mov	r2, r3
 8029178:	6b7b      	ldr	r3, [r7, #52]	@ 0x34
 802917a:	4413      	add	r3, r2
 802917c:	f107 0018 	add.w	r0, r7, #24
 8029180:	cb0e      	ldmia	r3, {r1, r2, r3}
 8029182:	f7ff fddf 	bl	8028d44 <writeMQTTString>
		writeChar(&ptr, requestedQoSs[i]);
 8029186:	6a3b      	ldr	r3, [r7, #32]
 8029188:	009b      	lsls	r3, r3, #2
 802918a:	6bba      	ldr	r2, [r7, #56]	@ 0x38
 802918c:	4413      	add	r3, r2
 802918e:	681b      	ldr	r3, [r3, #0]
 8029190:	b2da      	uxtb	r2, r3
 8029192:	f107 0318 	add.w	r3, r7, #24
 8029196:	4611      	mov	r1, r2
 8029198:	4618      	mov	r0, r3
 802919a:	f7ff fd76 	bl	8028c8a <writeChar>
	for (i = 0; i < count; ++i)
 802919e:	6a3b      	ldr	r3, [r7, #32]
 80291a0:	3301      	adds	r3, #1
 80291a2:	623b      	str	r3, [r7, #32]
 80291a4:	6a3a      	ldr	r2, [r7, #32]
 80291a6:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80291a8:	429a      	cmp	r2, r3
 80291aa:	dbdf      	blt.n	802916c <MQTTSerialize_subscribe+0xa6>
	}

	rc = ptr - buf;
 80291ac:	69ba      	ldr	r2, [r7, #24]
 80291ae:	68fb      	ldr	r3, [r7, #12]
 80291b0:	1ad3      	subs	r3, r2, r3
 80291b2:	627b      	str	r3, [r7, #36]	@ 0x24
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 80291b4:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 80291b6:	4618      	mov	r0, r3
 80291b8:	3728      	adds	r7, #40	@ 0x28
 80291ba:	46bd      	mov	sp, r7
 80291bc:	bd80      	pop	{r7, pc}

080291be <MQTTDeserialize_suback>:
  * @param buf the raw buffer data, of the correct length determined by the remaining length field
  * @param buflen the length in bytes of the data in the supplied buffer
  * @return error code.  1 is success, 0 is failure
  */
int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int buflen)
{
 80291be:	b580      	push	{r7, lr}
 80291c0:	b08a      	sub	sp, #40	@ 0x28
 80291c2:	af00      	add	r7, sp, #0
 80291c4:	60f8      	str	r0, [r7, #12]
 80291c6:	60b9      	str	r1, [r7, #8]
 80291c8:	607a      	str	r2, [r7, #4]
 80291ca:	603b      	str	r3, [r7, #0]
	MQTTHeader header = {0};
 80291cc:	2300      	movs	r3, #0
 80291ce:	61fb      	str	r3, [r7, #28]
	unsigned char* curdata = buf;
 80291d0:	6b3b      	ldr	r3, [r7, #48]	@ 0x30
 80291d2:	61bb      	str	r3, [r7, #24]
	unsigned char* enddata = NULL;
 80291d4:	2300      	movs	r3, #0
 80291d6:	623b      	str	r3, [r7, #32]
	int rc = 0;
 80291d8:	2300      	movs	r3, #0
 80291da:	627b      	str	r3, [r7, #36]	@ 0x24
	int mylen;

	FUNC_ENTRY;
	header.byte = readChar(&curdata);
 80291dc:	f107 0318 	add.w	r3, r7, #24
 80291e0:	4618      	mov	r0, r3
 80291e2:	f7ff fd3e 	bl	8028c62 <readChar>
 80291e6:	4603      	mov	r3, r0
 80291e8:	773b      	strb	r3, [r7, #28]
	if (header.bits.type != SUBACK)
 80291ea:	7f3b      	ldrb	r3, [r7, #28]
 80291ec:	f023 030f 	bic.w	r3, r3, #15
 80291f0:	b2db      	uxtb	r3, r3
 80291f2:	2b90      	cmp	r3, #144	@ 0x90
 80291f4:	d142      	bne.n	802927c <MQTTDeserialize_suback+0xbe>
		goto exit;

	curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */
 80291f6:	69bb      	ldr	r3, [r7, #24]
 80291f8:	f107 0214 	add.w	r2, r7, #20
 80291fc:	4611      	mov	r1, r2
 80291fe:	4618      	mov	r0, r3
 8029200:	f7ff fcfe 	bl	8028c00 <MQTTPacket_decodeBuf>
 8029204:	6278      	str	r0, [r7, #36]	@ 0x24
 8029206:	6a7a      	ldr	r2, [r7, #36]	@ 0x24
 8029208:	69bb      	ldr	r3, [r7, #24]
 802920a:	4413      	add	r3, r2
 802920c:	61bb      	str	r3, [r7, #24]
	enddata = curdata + mylen;
 802920e:	69bb      	ldr	r3, [r7, #24]
 8029210:	697a      	ldr	r2, [r7, #20]
 8029212:	4413      	add	r3, r2
 8029214:	623b      	str	r3, [r7, #32]
	if (enddata - curdata < 2)
 8029216:	69bb      	ldr	r3, [r7, #24]
 8029218:	6a3a      	ldr	r2, [r7, #32]
 802921a:	1ad3      	subs	r3, r2, r3
 802921c:	2b01      	cmp	r3, #1
 802921e:	dd2f      	ble.n	8029280 <MQTTDeserialize_suback+0xc2>
		goto exit;

	*packetid = readInt(&curdata);
 8029220:	f107 0318 	add.w	r3, r7, #24
 8029224:	4618      	mov	r0, r3
 8029226:	f7ff fd01 	bl	8028c2c <readInt>
 802922a:	4603      	mov	r3, r0
 802922c:	b29a      	uxth	r2, r3
 802922e:	68fb      	ldr	r3, [r7, #12]
 8029230:	801a      	strh	r2, [r3, #0]

	*count = 0;
 8029232:	687b      	ldr	r3, [r7, #4]
 8029234:	2200      	movs	r2, #0
 8029236:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 8029238:	e019      	b.n	802926e <MQTTDeserialize_suback+0xb0>
	{
		if (*count > maxcount)
 802923a:	687b      	ldr	r3, [r7, #4]
 802923c:	681b      	ldr	r3, [r3, #0]
 802923e:	68ba      	ldr	r2, [r7, #8]
 8029240:	429a      	cmp	r2, r3
 8029242:	da03      	bge.n	802924c <MQTTDeserialize_suback+0x8e>
		{
			rc = -1;
 8029244:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8029248:	627b      	str	r3, [r7, #36]	@ 0x24
			goto exit;
 802924a:	e01a      	b.n	8029282 <MQTTDeserialize_suback+0xc4>
		}
		grantedQoSs[(*count)++] = readChar(&curdata);
 802924c:	f107 0318 	add.w	r3, r7, #24
 8029250:	4618      	mov	r0, r3
 8029252:	f7ff fd06 	bl	8028c62 <readChar>
 8029256:	4603      	mov	r3, r0
 8029258:	4618      	mov	r0, r3
 802925a:	687b      	ldr	r3, [r7, #4]
 802925c:	681b      	ldr	r3, [r3, #0]
 802925e:	1c59      	adds	r1, r3, #1
 8029260:	687a      	ldr	r2, [r7, #4]
 8029262:	6011      	str	r1, [r2, #0]
 8029264:	009b      	lsls	r3, r3, #2
 8029266:	683a      	ldr	r2, [r7, #0]
 8029268:	4413      	add	r3, r2
 802926a:	4602      	mov	r2, r0
 802926c:	601a      	str	r2, [r3, #0]
	while (curdata < enddata)
 802926e:	69bb      	ldr	r3, [r7, #24]
 8029270:	6a3a      	ldr	r2, [r7, #32]
 8029272:	429a      	cmp	r2, r3
 8029274:	d8e1      	bhi.n	802923a <MQTTDeserialize_suback+0x7c>
	}

	rc = 1;
 8029276:	2301      	movs	r3, #1
 8029278:	627b      	str	r3, [r7, #36]	@ 0x24
 802927a:	e002      	b.n	8029282 <MQTTDeserialize_suback+0xc4>
		goto exit;
 802927c:	bf00      	nop
 802927e:	e000      	b.n	8029282 <MQTTDeserialize_suback+0xc4>
		goto exit;
 8029280:	bf00      	nop
exit:
	FUNC_EXIT_RC(rc);
	return rc;
 8029282:	6a7b      	ldr	r3, [r7, #36]	@ 0x24
}
 8029284:	4618      	mov	r0, r3
 8029286:	3728      	adds	r7, #40	@ 0x28
 8029288:	46bd      	mov	sp, r7
 802928a:	bd80      	pop	{r7, pc}

0802928c <malloc>:
 802928c:	4b02      	ldr	r3, [pc, #8]	@ (8029298 <malloc+0xc>)
 802928e:	4601      	mov	r1, r0
 8029290:	6818      	ldr	r0, [r3, #0]
 8029292:	f000 b82d 	b.w	80292f0 <_malloc_r>
 8029296:	bf00      	nop
 8029298:	240001d4 	.word	0x240001d4

0802929c <free>:
 802929c:	4b02      	ldr	r3, [pc, #8]	@ (80292a8 <free+0xc>)
 802929e:	4601      	mov	r1, r0
 80292a0:	6818      	ldr	r0, [r3, #0]
 80292a2:	f002 bc7b 	b.w	802bb9c <_free_r>
 80292a6:	bf00      	nop
 80292a8:	240001d4 	.word	0x240001d4

080292ac <sbrk_aligned>:
 80292ac:	b570      	push	{r4, r5, r6, lr}
 80292ae:	4e0f      	ldr	r6, [pc, #60]	@ (80292ec <sbrk_aligned+0x40>)
 80292b0:	460c      	mov	r4, r1
 80292b2:	6831      	ldr	r1, [r6, #0]
 80292b4:	4605      	mov	r5, r0
 80292b6:	b911      	cbnz	r1, 80292be <sbrk_aligned+0x12>
 80292b8:	f001 fe0a 	bl	802aed0 <_sbrk_r>
 80292bc:	6030      	str	r0, [r6, #0]
 80292be:	4621      	mov	r1, r4
 80292c0:	4628      	mov	r0, r5
 80292c2:	f001 fe05 	bl	802aed0 <_sbrk_r>
 80292c6:	1c43      	adds	r3, r0, #1
 80292c8:	d103      	bne.n	80292d2 <sbrk_aligned+0x26>
 80292ca:	f04f 34ff 	mov.w	r4, #4294967295	@ 0xffffffff
 80292ce:	4620      	mov	r0, r4
 80292d0:	bd70      	pop	{r4, r5, r6, pc}
 80292d2:	1cc4      	adds	r4, r0, #3
 80292d4:	f024 0403 	bic.w	r4, r4, #3
 80292d8:	42a0      	cmp	r0, r4
 80292da:	d0f8      	beq.n	80292ce <sbrk_aligned+0x22>
 80292dc:	1a21      	subs	r1, r4, r0
 80292de:	4628      	mov	r0, r5
 80292e0:	f001 fdf6 	bl	802aed0 <_sbrk_r>
 80292e4:	3001      	adds	r0, #1
 80292e6:	d1f2      	bne.n	80292ce <sbrk_aligned+0x22>
 80292e8:	e7ef      	b.n	80292ca <sbrk_aligned+0x1e>
 80292ea:	bf00      	nop
 80292ec:	2402b15c 	.word	0x2402b15c

080292f0 <_malloc_r>:
 80292f0:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 80292f4:	1ccd      	adds	r5, r1, #3
 80292f6:	f025 0503 	bic.w	r5, r5, #3
 80292fa:	3508      	adds	r5, #8
 80292fc:	2d0c      	cmp	r5, #12
 80292fe:	bf38      	it	cc
 8029300:	250c      	movcc	r5, #12
 8029302:	2d00      	cmp	r5, #0
 8029304:	4606      	mov	r6, r0
 8029306:	db01      	blt.n	802930c <_malloc_r+0x1c>
 8029308:	42a9      	cmp	r1, r5
 802930a:	d904      	bls.n	8029316 <_malloc_r+0x26>
 802930c:	230c      	movs	r3, #12
 802930e:	6033      	str	r3, [r6, #0]
 8029310:	2000      	movs	r0, #0
 8029312:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 8029316:	f8df 80d4 	ldr.w	r8, [pc, #212]	@ 80293ec <_malloc_r+0xfc>
 802931a:	f000 f869 	bl	80293f0 <__malloc_lock>
 802931e:	f8d8 3000 	ldr.w	r3, [r8]
 8029322:	461c      	mov	r4, r3
 8029324:	bb44      	cbnz	r4, 8029378 <_malloc_r+0x88>
 8029326:	4629      	mov	r1, r5
 8029328:	4630      	mov	r0, r6
 802932a:	f7ff ffbf 	bl	80292ac <sbrk_aligned>
 802932e:	1c43      	adds	r3, r0, #1
 8029330:	4604      	mov	r4, r0
 8029332:	d158      	bne.n	80293e6 <_malloc_r+0xf6>
 8029334:	f8d8 4000 	ldr.w	r4, [r8]
 8029338:	4627      	mov	r7, r4
 802933a:	2f00      	cmp	r7, #0
 802933c:	d143      	bne.n	80293c6 <_malloc_r+0xd6>
 802933e:	2c00      	cmp	r4, #0
 8029340:	d04b      	beq.n	80293da <_malloc_r+0xea>
 8029342:	6823      	ldr	r3, [r4, #0]
 8029344:	4639      	mov	r1, r7
 8029346:	4630      	mov	r0, r6
 8029348:	eb04 0903 	add.w	r9, r4, r3
 802934c:	f001 fdc0 	bl	802aed0 <_sbrk_r>
 8029350:	4581      	cmp	r9, r0
 8029352:	d142      	bne.n	80293da <_malloc_r+0xea>
 8029354:	6821      	ldr	r1, [r4, #0]
 8029356:	1a6d      	subs	r5, r5, r1
 8029358:	4629      	mov	r1, r5
 802935a:	4630      	mov	r0, r6
 802935c:	f7ff ffa6 	bl	80292ac <sbrk_aligned>
 8029360:	3001      	adds	r0, #1
 8029362:	d03a      	beq.n	80293da <_malloc_r+0xea>
 8029364:	6823      	ldr	r3, [r4, #0]
 8029366:	442b      	add	r3, r5
 8029368:	6023      	str	r3, [r4, #0]
 802936a:	f8d8 3000 	ldr.w	r3, [r8]
 802936e:	685a      	ldr	r2, [r3, #4]
 8029370:	bb62      	cbnz	r2, 80293cc <_malloc_r+0xdc>
 8029372:	f8c8 7000 	str.w	r7, [r8]
 8029376:	e00f      	b.n	8029398 <_malloc_r+0xa8>
 8029378:	6822      	ldr	r2, [r4, #0]
 802937a:	1b52      	subs	r2, r2, r5
 802937c:	d420      	bmi.n	80293c0 <_malloc_r+0xd0>
 802937e:	2a0b      	cmp	r2, #11
 8029380:	d917      	bls.n	80293b2 <_malloc_r+0xc2>
 8029382:	1961      	adds	r1, r4, r5
 8029384:	42a3      	cmp	r3, r4
 8029386:	6025      	str	r5, [r4, #0]
 8029388:	bf18      	it	ne
 802938a:	6059      	strne	r1, [r3, #4]
 802938c:	6863      	ldr	r3, [r4, #4]
 802938e:	bf08      	it	eq
 8029390:	f8c8 1000 	streq.w	r1, [r8]
 8029394:	5162      	str	r2, [r4, r5]
 8029396:	604b      	str	r3, [r1, #4]
 8029398:	4630      	mov	r0, r6
 802939a:	f000 f82f 	bl	80293fc <__malloc_unlock>
 802939e:	f104 000b 	add.w	r0, r4, #11
 80293a2:	1d23      	adds	r3, r4, #4
 80293a4:	f020 0007 	bic.w	r0, r0, #7
 80293a8:	1ac2      	subs	r2, r0, r3
 80293aa:	bf1c      	itt	ne
 80293ac:	1a1b      	subne	r3, r3, r0
 80293ae:	50a3      	strne	r3, [r4, r2]
 80293b0:	e7af      	b.n	8029312 <_malloc_r+0x22>
 80293b2:	6862      	ldr	r2, [r4, #4]
 80293b4:	42a3      	cmp	r3, r4
 80293b6:	bf0c      	ite	eq
 80293b8:	f8c8 2000 	streq.w	r2, [r8]
 80293bc:	605a      	strne	r2, [r3, #4]
 80293be:	e7eb      	b.n	8029398 <_malloc_r+0xa8>
 80293c0:	4623      	mov	r3, r4
 80293c2:	6864      	ldr	r4, [r4, #4]
 80293c4:	e7ae      	b.n	8029324 <_malloc_r+0x34>
 80293c6:	463c      	mov	r4, r7
 80293c8:	687f      	ldr	r7, [r7, #4]
 80293ca:	e7b6      	b.n	802933a <_malloc_r+0x4a>
 80293cc:	461a      	mov	r2, r3
 80293ce:	685b      	ldr	r3, [r3, #4]
 80293d0:	42a3      	cmp	r3, r4
 80293d2:	d1fb      	bne.n	80293cc <_malloc_r+0xdc>
 80293d4:	2300      	movs	r3, #0
 80293d6:	6053      	str	r3, [r2, #4]
 80293d8:	e7de      	b.n	8029398 <_malloc_r+0xa8>
 80293da:	230c      	movs	r3, #12
 80293dc:	6033      	str	r3, [r6, #0]
 80293de:	4630      	mov	r0, r6
 80293e0:	f000 f80c 	bl	80293fc <__malloc_unlock>
 80293e4:	e794      	b.n	8029310 <_malloc_r+0x20>
 80293e6:	6005      	str	r5, [r0, #0]
 80293e8:	e7d6      	b.n	8029398 <_malloc_r+0xa8>
 80293ea:	bf00      	nop
 80293ec:	2402b160 	.word	0x2402b160

080293f0 <__malloc_lock>:
 80293f0:	4801      	ldr	r0, [pc, #4]	@ (80293f8 <__malloc_lock+0x8>)
 80293f2:	f001 bdba 	b.w	802af6a <__retarget_lock_acquire_recursive>
 80293f6:	bf00      	nop
 80293f8:	2402b2a4 	.word	0x2402b2a4

080293fc <__malloc_unlock>:
 80293fc:	4801      	ldr	r0, [pc, #4]	@ (8029404 <__malloc_unlock+0x8>)
 80293fe:	f001 bdb5 	b.w	802af6c <__retarget_lock_release_recursive>
 8029402:	bf00      	nop
 8029404:	2402b2a4 	.word	0x2402b2a4

08029408 <rand>:
 8029408:	4b16      	ldr	r3, [pc, #88]	@ (8029464 <rand+0x5c>)
 802940a:	b510      	push	{r4, lr}
 802940c:	681c      	ldr	r4, [r3, #0]
 802940e:	6b23      	ldr	r3, [r4, #48]	@ 0x30
 8029410:	b9b3      	cbnz	r3, 8029440 <rand+0x38>
 8029412:	2018      	movs	r0, #24
 8029414:	f7ff ff3a 	bl	802928c <malloc>
 8029418:	4602      	mov	r2, r0
 802941a:	6320      	str	r0, [r4, #48]	@ 0x30
 802941c:	b920      	cbnz	r0, 8029428 <rand+0x20>
 802941e:	4b12      	ldr	r3, [pc, #72]	@ (8029468 <rand+0x60>)
 8029420:	4812      	ldr	r0, [pc, #72]	@ (802946c <rand+0x64>)
 8029422:	2152      	movs	r1, #82	@ 0x52
 8029424:	f001 fdbc 	bl	802afa0 <__assert_func>
 8029428:	4911      	ldr	r1, [pc, #68]	@ (8029470 <rand+0x68>)
 802942a:	4b12      	ldr	r3, [pc, #72]	@ (8029474 <rand+0x6c>)
 802942c:	e9c0 1300 	strd	r1, r3, [r0]
 8029430:	4b11      	ldr	r3, [pc, #68]	@ (8029478 <rand+0x70>)
 8029432:	6083      	str	r3, [r0, #8]
 8029434:	230b      	movs	r3, #11
 8029436:	8183      	strh	r3, [r0, #12]
 8029438:	2100      	movs	r1, #0
 802943a:	2001      	movs	r0, #1
 802943c:	e9c2 0104 	strd	r0, r1, [r2, #16]
 8029440:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 8029442:	480e      	ldr	r0, [pc, #56]	@ (802947c <rand+0x74>)
 8029444:	690b      	ldr	r3, [r1, #16]
 8029446:	694c      	ldr	r4, [r1, #20]
 8029448:	4a0d      	ldr	r2, [pc, #52]	@ (8029480 <rand+0x78>)
 802944a:	4358      	muls	r0, r3
 802944c:	fb02 0004 	mla	r0, r2, r4, r0
 8029450:	fba3 3202 	umull	r3, r2, r3, r2
 8029454:	3301      	adds	r3, #1
 8029456:	eb40 0002 	adc.w	r0, r0, r2
 802945a:	e9c1 3004 	strd	r3, r0, [r1, #16]
 802945e:	f020 4000 	bic.w	r0, r0, #2147483648	@ 0x80000000
 8029462:	bd10      	pop	{r4, pc}
 8029464:	240001d4 	.word	0x240001d4
 8029468:	08031f0e 	.word	0x08031f0e
 802946c:	08031f25 	.word	0x08031f25
 8029470:	abcd330e 	.word	0xabcd330e
 8029474:	e66d1234 	.word	0xe66d1234
 8029478:	0005deec 	.word	0x0005deec
 802947c:	5851f42d 	.word	0x5851f42d
 8029480:	4c957f2d 	.word	0x4c957f2d

08029484 <realloc>:
 8029484:	4b02      	ldr	r3, [pc, #8]	@ (8029490 <realloc+0xc>)
 8029486:	460a      	mov	r2, r1
 8029488:	4601      	mov	r1, r0
 802948a:	6818      	ldr	r0, [r3, #0]
 802948c:	f000 b802 	b.w	8029494 <_realloc_r>
 8029490:	240001d4 	.word	0x240001d4

08029494 <_realloc_r>:
 8029494:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 8029498:	4680      	mov	r8, r0
 802949a:	4615      	mov	r5, r2
 802949c:	460c      	mov	r4, r1
 802949e:	b921      	cbnz	r1, 80294aa <_realloc_r+0x16>
 80294a0:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 80294a4:	4611      	mov	r1, r2
 80294a6:	f7ff bf23 	b.w	80292f0 <_malloc_r>
 80294aa:	b92a      	cbnz	r2, 80294b8 <_realloc_r+0x24>
 80294ac:	f002 fb76 	bl	802bb9c <_free_r>
 80294b0:	2400      	movs	r4, #0
 80294b2:	4620      	mov	r0, r4
 80294b4:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 80294b8:	f003 fbb5 	bl	802cc26 <_malloc_usable_size_r>
 80294bc:	4285      	cmp	r5, r0
 80294be:	4606      	mov	r6, r0
 80294c0:	d802      	bhi.n	80294c8 <_realloc_r+0x34>
 80294c2:	ebb5 0f50 	cmp.w	r5, r0, lsr #1
 80294c6:	d8f4      	bhi.n	80294b2 <_realloc_r+0x1e>
 80294c8:	4629      	mov	r1, r5
 80294ca:	4640      	mov	r0, r8
 80294cc:	f7ff ff10 	bl	80292f0 <_malloc_r>
 80294d0:	4607      	mov	r7, r0
 80294d2:	2800      	cmp	r0, #0
 80294d4:	d0ec      	beq.n	80294b0 <_realloc_r+0x1c>
 80294d6:	42b5      	cmp	r5, r6
 80294d8:	462a      	mov	r2, r5
 80294da:	4621      	mov	r1, r4
 80294dc:	bf28      	it	cs
 80294de:	4632      	movcs	r2, r6
 80294e0:	f001 fd45 	bl	802af6e <memcpy>
 80294e4:	4621      	mov	r1, r4
 80294e6:	4640      	mov	r0, r8
 80294e8:	f002 fb58 	bl	802bb9c <_free_r>
 80294ec:	463c      	mov	r4, r7
 80294ee:	e7e0      	b.n	80294b2 <_realloc_r+0x1e>

080294f0 <sulp>:
 80294f0:	b570      	push	{r4, r5, r6, lr}
 80294f2:	4604      	mov	r4, r0
 80294f4:	460d      	mov	r5, r1
 80294f6:	4616      	mov	r6, r2
 80294f8:	ec45 4b10 	vmov	d0, r4, r5
 80294fc:	f003 fa58 	bl	802c9b0 <__ulp>
 8029500:	b17e      	cbz	r6, 8029522 <sulp+0x32>
 8029502:	f3c5 530a 	ubfx	r3, r5, #20, #11
 8029506:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 802950a:	2b00      	cmp	r3, #0
 802950c:	dd09      	ble.n	8029522 <sulp+0x32>
 802950e:	051b      	lsls	r3, r3, #20
 8029510:	f103 517f 	add.w	r1, r3, #1069547520	@ 0x3fc00000
 8029514:	2000      	movs	r0, #0
 8029516:	f501 1140 	add.w	r1, r1, #3145728	@ 0x300000
 802951a:	ec41 0b17 	vmov	d7, r0, r1
 802951e:	ee20 0b07 	vmul.f64	d0, d0, d7
 8029522:	bd70      	pop	{r4, r5, r6, pc}
 8029524:	0000      	movs	r0, r0
	...

08029528 <_strtod_l>:
 8029528:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802952c:	ed2d 8b0a 	vpush	{d8-d12}
 8029530:	b097      	sub	sp, #92	@ 0x5c
 8029532:	4688      	mov	r8, r1
 8029534:	920e      	str	r2, [sp, #56]	@ 0x38
 8029536:	2200      	movs	r2, #0
 8029538:	9212      	str	r2, [sp, #72]	@ 0x48
 802953a:	9005      	str	r0, [sp, #20]
 802953c:	f04f 0a00 	mov.w	sl, #0
 8029540:	f04f 0b00 	mov.w	fp, #0
 8029544:	460a      	mov	r2, r1
 8029546:	9211      	str	r2, [sp, #68]	@ 0x44
 8029548:	7811      	ldrb	r1, [r2, #0]
 802954a:	292b      	cmp	r1, #43	@ 0x2b
 802954c:	d04c      	beq.n	80295e8 <_strtod_l+0xc0>
 802954e:	d839      	bhi.n	80295c4 <_strtod_l+0x9c>
 8029550:	290d      	cmp	r1, #13
 8029552:	d833      	bhi.n	80295bc <_strtod_l+0x94>
 8029554:	2908      	cmp	r1, #8
 8029556:	d833      	bhi.n	80295c0 <_strtod_l+0x98>
 8029558:	2900      	cmp	r1, #0
 802955a:	d03c      	beq.n	80295d6 <_strtod_l+0xae>
 802955c:	2200      	movs	r2, #0
 802955e:	9208      	str	r2, [sp, #32]
 8029560:	9d11      	ldr	r5, [sp, #68]	@ 0x44
 8029562:	782a      	ldrb	r2, [r5, #0]
 8029564:	2a30      	cmp	r2, #48	@ 0x30
 8029566:	f040 80b5 	bne.w	80296d4 <_strtod_l+0x1ac>
 802956a:	786a      	ldrb	r2, [r5, #1]
 802956c:	f002 02df 	and.w	r2, r2, #223	@ 0xdf
 8029570:	2a58      	cmp	r2, #88	@ 0x58
 8029572:	d170      	bne.n	8029656 <_strtod_l+0x12e>
 8029574:	9302      	str	r3, [sp, #8]
 8029576:	9b08      	ldr	r3, [sp, #32]
 8029578:	9301      	str	r3, [sp, #4]
 802957a:	ab12      	add	r3, sp, #72	@ 0x48
 802957c:	9300      	str	r3, [sp, #0]
 802957e:	4a8b      	ldr	r2, [pc, #556]	@ (80297ac <_strtod_l+0x284>)
 8029580:	9805      	ldr	r0, [sp, #20]
 8029582:	ab13      	add	r3, sp, #76	@ 0x4c
 8029584:	a911      	add	r1, sp, #68	@ 0x44
 8029586:	f002 fbbb 	bl	802bd00 <__gethex>
 802958a:	f010 060f 	ands.w	r6, r0, #15
 802958e:	4604      	mov	r4, r0
 8029590:	d005      	beq.n	802959e <_strtod_l+0x76>
 8029592:	2e06      	cmp	r6, #6
 8029594:	d12a      	bne.n	80295ec <_strtod_l+0xc4>
 8029596:	3501      	adds	r5, #1
 8029598:	2300      	movs	r3, #0
 802959a:	9511      	str	r5, [sp, #68]	@ 0x44
 802959c:	9308      	str	r3, [sp, #32]
 802959e:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 80295a0:	2b00      	cmp	r3, #0
 80295a2:	f040 852f 	bne.w	802a004 <_strtod_l+0xadc>
 80295a6:	9b08      	ldr	r3, [sp, #32]
 80295a8:	ec4b ab10 	vmov	d0, sl, fp
 80295ac:	b1cb      	cbz	r3, 80295e2 <_strtod_l+0xba>
 80295ae:	eeb1 0b40 	vneg.f64	d0, d0
 80295b2:	b017      	add	sp, #92	@ 0x5c
 80295b4:	ecbd 8b0a 	vpop	{d8-d12}
 80295b8:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 80295bc:	2920      	cmp	r1, #32
 80295be:	d1cd      	bne.n	802955c <_strtod_l+0x34>
 80295c0:	3201      	adds	r2, #1
 80295c2:	e7c0      	b.n	8029546 <_strtod_l+0x1e>
 80295c4:	292d      	cmp	r1, #45	@ 0x2d
 80295c6:	d1c9      	bne.n	802955c <_strtod_l+0x34>
 80295c8:	2101      	movs	r1, #1
 80295ca:	9108      	str	r1, [sp, #32]
 80295cc:	1c51      	adds	r1, r2, #1
 80295ce:	9111      	str	r1, [sp, #68]	@ 0x44
 80295d0:	7852      	ldrb	r2, [r2, #1]
 80295d2:	2a00      	cmp	r2, #0
 80295d4:	d1c4      	bne.n	8029560 <_strtod_l+0x38>
 80295d6:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 80295d8:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 80295dc:	2b00      	cmp	r3, #0
 80295de:	f040 850f 	bne.w	802a000 <_strtod_l+0xad8>
 80295e2:	ec4b ab10 	vmov	d0, sl, fp
 80295e6:	e7e4      	b.n	80295b2 <_strtod_l+0x8a>
 80295e8:	2100      	movs	r1, #0
 80295ea:	e7ee      	b.n	80295ca <_strtod_l+0xa2>
 80295ec:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 80295ee:	b13a      	cbz	r2, 8029600 <_strtod_l+0xd8>
 80295f0:	2135      	movs	r1, #53	@ 0x35
 80295f2:	a814      	add	r0, sp, #80	@ 0x50
 80295f4:	f003 fad3 	bl	802cb9e <__copybits>
 80295f8:	9912      	ldr	r1, [sp, #72]	@ 0x48
 80295fa:	9805      	ldr	r0, [sp, #20]
 80295fc:	f002 fea4 	bl	802c348 <_Bfree>
 8029600:	1e73      	subs	r3, r6, #1
 8029602:	9a13      	ldr	r2, [sp, #76]	@ 0x4c
 8029604:	2b04      	cmp	r3, #4
 8029606:	d806      	bhi.n	8029616 <_strtod_l+0xee>
 8029608:	e8df f003 	tbb	[pc, r3]
 802960c:	201d0314 	.word	0x201d0314
 8029610:	14          	.byte	0x14
 8029611:	00          	.byte	0x00
 8029612:	e9dd ab14 	ldrd	sl, fp, [sp, #80]	@ 0x50
 8029616:	05e3      	lsls	r3, r4, #23
 8029618:	bf48      	it	mi
 802961a:	f04b 4b00 	orrmi.w	fp, fp, #2147483648	@ 0x80000000
 802961e:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8029622:	0d1b      	lsrs	r3, r3, #20
 8029624:	051b      	lsls	r3, r3, #20
 8029626:	2b00      	cmp	r3, #0
 8029628:	d1b9      	bne.n	802959e <_strtod_l+0x76>
 802962a:	f001 fc73 	bl	802af14 <__errno>
 802962e:	2322      	movs	r3, #34	@ 0x22
 8029630:	6003      	str	r3, [r0, #0]
 8029632:	e7b4      	b.n	802959e <_strtod_l+0x76>
 8029634:	e9dd a314 	ldrd	sl, r3, [sp, #80]	@ 0x50
 8029638:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 802963c:	f423 1380 	bic.w	r3, r3, #1048576	@ 0x100000
 8029640:	ea43 5b02 	orr.w	fp, r3, r2, lsl #20
 8029644:	e7e7      	b.n	8029616 <_strtod_l+0xee>
 8029646:	f8df b16c 	ldr.w	fp, [pc, #364]	@ 80297b4 <_strtod_l+0x28c>
 802964a:	e7e4      	b.n	8029616 <_strtod_l+0xee>
 802964c:	f06f 4b00 	mvn.w	fp, #2147483648	@ 0x80000000
 8029650:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8029654:	e7df      	b.n	8029616 <_strtod_l+0xee>
 8029656:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029658:	1c5a      	adds	r2, r3, #1
 802965a:	9211      	str	r2, [sp, #68]	@ 0x44
 802965c:	785b      	ldrb	r3, [r3, #1]
 802965e:	2b30      	cmp	r3, #48	@ 0x30
 8029660:	d0f9      	beq.n	8029656 <_strtod_l+0x12e>
 8029662:	2b00      	cmp	r3, #0
 8029664:	d09b      	beq.n	802959e <_strtod_l+0x76>
 8029666:	2301      	movs	r3, #1
 8029668:	2600      	movs	r6, #0
 802966a:	9307      	str	r3, [sp, #28]
 802966c:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 802966e:	930a      	str	r3, [sp, #40]	@ 0x28
 8029670:	46b1      	mov	r9, r6
 8029672:	4635      	mov	r5, r6
 8029674:	220a      	movs	r2, #10
 8029676:	9811      	ldr	r0, [sp, #68]	@ 0x44
 8029678:	7804      	ldrb	r4, [r0, #0]
 802967a:	f1a4 0330 	sub.w	r3, r4, #48	@ 0x30
 802967e:	b2d9      	uxtb	r1, r3
 8029680:	2909      	cmp	r1, #9
 8029682:	d929      	bls.n	80296d8 <_strtod_l+0x1b0>
 8029684:	494a      	ldr	r1, [pc, #296]	@ (80297b0 <_strtod_l+0x288>)
 8029686:	2201      	movs	r2, #1
 8029688:	f001 fb82 	bl	802ad90 <strncmp>
 802968c:	b378      	cbz	r0, 80296ee <_strtod_l+0x1c6>
 802968e:	2000      	movs	r0, #0
 8029690:	4622      	mov	r2, r4
 8029692:	462b      	mov	r3, r5
 8029694:	4607      	mov	r7, r0
 8029696:	9006      	str	r0, [sp, #24]
 8029698:	2a65      	cmp	r2, #101	@ 0x65
 802969a:	d001      	beq.n	80296a0 <_strtod_l+0x178>
 802969c:	2a45      	cmp	r2, #69	@ 0x45
 802969e:	d117      	bne.n	80296d0 <_strtod_l+0x1a8>
 80296a0:	b91b      	cbnz	r3, 80296aa <_strtod_l+0x182>
 80296a2:	9b07      	ldr	r3, [sp, #28]
 80296a4:	4303      	orrs	r3, r0
 80296a6:	d096      	beq.n	80295d6 <_strtod_l+0xae>
 80296a8:	2300      	movs	r3, #0
 80296aa:	f8dd 8044 	ldr.w	r8, [sp, #68]	@ 0x44
 80296ae:	f108 0201 	add.w	r2, r8, #1
 80296b2:	9211      	str	r2, [sp, #68]	@ 0x44
 80296b4:	f898 2001 	ldrb.w	r2, [r8, #1]
 80296b8:	2a2b      	cmp	r2, #43	@ 0x2b
 80296ba:	d06b      	beq.n	8029794 <_strtod_l+0x26c>
 80296bc:	2a2d      	cmp	r2, #45	@ 0x2d
 80296be:	d071      	beq.n	80297a4 <_strtod_l+0x27c>
 80296c0:	f04f 0e00 	mov.w	lr, #0
 80296c4:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 80296c8:	2c09      	cmp	r4, #9
 80296ca:	d979      	bls.n	80297c0 <_strtod_l+0x298>
 80296cc:	f8cd 8044 	str.w	r8, [sp, #68]	@ 0x44
 80296d0:	2400      	movs	r4, #0
 80296d2:	e094      	b.n	80297fe <_strtod_l+0x2d6>
 80296d4:	2300      	movs	r3, #0
 80296d6:	e7c7      	b.n	8029668 <_strtod_l+0x140>
 80296d8:	2d08      	cmp	r5, #8
 80296da:	f100 0001 	add.w	r0, r0, #1
 80296de:	bfd4      	ite	le
 80296e0:	fb02 3909 	mlale	r9, r2, r9, r3
 80296e4:	fb02 3606 	mlagt	r6, r2, r6, r3
 80296e8:	3501      	adds	r5, #1
 80296ea:	9011      	str	r0, [sp, #68]	@ 0x44
 80296ec:	e7c3      	b.n	8029676 <_strtod_l+0x14e>
 80296ee:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 80296f0:	1c5a      	adds	r2, r3, #1
 80296f2:	9211      	str	r2, [sp, #68]	@ 0x44
 80296f4:	785a      	ldrb	r2, [r3, #1]
 80296f6:	b375      	cbz	r5, 8029756 <_strtod_l+0x22e>
 80296f8:	4607      	mov	r7, r0
 80296fa:	462b      	mov	r3, r5
 80296fc:	f1a2 0130 	sub.w	r1, r2, #48	@ 0x30
 8029700:	2909      	cmp	r1, #9
 8029702:	d913      	bls.n	802972c <_strtod_l+0x204>
 8029704:	2101      	movs	r1, #1
 8029706:	9106      	str	r1, [sp, #24]
 8029708:	e7c6      	b.n	8029698 <_strtod_l+0x170>
 802970a:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 802970c:	1c5a      	adds	r2, r3, #1
 802970e:	9211      	str	r2, [sp, #68]	@ 0x44
 8029710:	785a      	ldrb	r2, [r3, #1]
 8029712:	3001      	adds	r0, #1
 8029714:	2a30      	cmp	r2, #48	@ 0x30
 8029716:	d0f8      	beq.n	802970a <_strtod_l+0x1e2>
 8029718:	f1a2 0331 	sub.w	r3, r2, #49	@ 0x31
 802971c:	2b08      	cmp	r3, #8
 802971e:	f200 8476 	bhi.w	802a00e <_strtod_l+0xae6>
 8029722:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029724:	930a      	str	r3, [sp, #40]	@ 0x28
 8029726:	4607      	mov	r7, r0
 8029728:	2000      	movs	r0, #0
 802972a:	4603      	mov	r3, r0
 802972c:	3a30      	subs	r2, #48	@ 0x30
 802972e:	f100 0101 	add.w	r1, r0, #1
 8029732:	d023      	beq.n	802977c <_strtod_l+0x254>
 8029734:	440f      	add	r7, r1
 8029736:	eb00 0c03 	add.w	ip, r0, r3
 802973a:	4619      	mov	r1, r3
 802973c:	240a      	movs	r4, #10
 802973e:	4561      	cmp	r1, ip
 8029740:	d10b      	bne.n	802975a <_strtod_l+0x232>
 8029742:	1c5c      	adds	r4, r3, #1
 8029744:	4403      	add	r3, r0
 8029746:	2b08      	cmp	r3, #8
 8029748:	4404      	add	r4, r0
 802974a:	dc11      	bgt.n	8029770 <_strtod_l+0x248>
 802974c:	230a      	movs	r3, #10
 802974e:	fb03 2909 	mla	r9, r3, r9, r2
 8029752:	2100      	movs	r1, #0
 8029754:	e013      	b.n	802977e <_strtod_l+0x256>
 8029756:	4628      	mov	r0, r5
 8029758:	e7dc      	b.n	8029714 <_strtod_l+0x1ec>
 802975a:	2908      	cmp	r1, #8
 802975c:	f101 0101 	add.w	r1, r1, #1
 8029760:	dc02      	bgt.n	8029768 <_strtod_l+0x240>
 8029762:	fb04 f909 	mul.w	r9, r4, r9
 8029766:	e7ea      	b.n	802973e <_strtod_l+0x216>
 8029768:	2910      	cmp	r1, #16
 802976a:	bfd8      	it	le
 802976c:	4366      	mulle	r6, r4
 802976e:	e7e6      	b.n	802973e <_strtod_l+0x216>
 8029770:	2b0f      	cmp	r3, #15
 8029772:	dcee      	bgt.n	8029752 <_strtod_l+0x22a>
 8029774:	230a      	movs	r3, #10
 8029776:	fb03 2606 	mla	r6, r3, r6, r2
 802977a:	e7ea      	b.n	8029752 <_strtod_l+0x22a>
 802977c:	461c      	mov	r4, r3
 802977e:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029780:	1c5a      	adds	r2, r3, #1
 8029782:	9211      	str	r2, [sp, #68]	@ 0x44
 8029784:	785a      	ldrb	r2, [r3, #1]
 8029786:	4608      	mov	r0, r1
 8029788:	4623      	mov	r3, r4
 802978a:	e7b7      	b.n	80296fc <_strtod_l+0x1d4>
 802978c:	2301      	movs	r3, #1
 802978e:	2700      	movs	r7, #0
 8029790:	9306      	str	r3, [sp, #24]
 8029792:	e786      	b.n	80296a2 <_strtod_l+0x17a>
 8029794:	f04f 0e00 	mov.w	lr, #0
 8029798:	f108 0202 	add.w	r2, r8, #2
 802979c:	9211      	str	r2, [sp, #68]	@ 0x44
 802979e:	f898 2002 	ldrb.w	r2, [r8, #2]
 80297a2:	e78f      	b.n	80296c4 <_strtod_l+0x19c>
 80297a4:	f04f 0e01 	mov.w	lr, #1
 80297a8:	e7f6      	b.n	8029798 <_strtod_l+0x270>
 80297aa:	bf00      	nop
 80297ac:	08031f94 	.word	0x08031f94
 80297b0:	08031f7d 	.word	0x08031f7d
 80297b4:	7ff00000 	.word	0x7ff00000
 80297b8:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 80297ba:	1c54      	adds	r4, r2, #1
 80297bc:	9411      	str	r4, [sp, #68]	@ 0x44
 80297be:	7852      	ldrb	r2, [r2, #1]
 80297c0:	2a30      	cmp	r2, #48	@ 0x30
 80297c2:	d0f9      	beq.n	80297b8 <_strtod_l+0x290>
 80297c4:	f1a2 0431 	sub.w	r4, r2, #49	@ 0x31
 80297c8:	2c08      	cmp	r4, #8
 80297ca:	d881      	bhi.n	80296d0 <_strtod_l+0x1a8>
 80297cc:	f1a2 0c30 	sub.w	ip, r2, #48	@ 0x30
 80297d0:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 80297d2:	9209      	str	r2, [sp, #36]	@ 0x24
 80297d4:	9a11      	ldr	r2, [sp, #68]	@ 0x44
 80297d6:	1c51      	adds	r1, r2, #1
 80297d8:	9111      	str	r1, [sp, #68]	@ 0x44
 80297da:	7852      	ldrb	r2, [r2, #1]
 80297dc:	f1a2 0430 	sub.w	r4, r2, #48	@ 0x30
 80297e0:	2c09      	cmp	r4, #9
 80297e2:	d938      	bls.n	8029856 <_strtod_l+0x32e>
 80297e4:	9c09      	ldr	r4, [sp, #36]	@ 0x24
 80297e6:	1b0c      	subs	r4, r1, r4
 80297e8:	2c08      	cmp	r4, #8
 80297ea:	f644 641f 	movw	r4, #19999	@ 0x4e1f
 80297ee:	dc02      	bgt.n	80297f6 <_strtod_l+0x2ce>
 80297f0:	4564      	cmp	r4, ip
 80297f2:	bfa8      	it	ge
 80297f4:	4664      	movge	r4, ip
 80297f6:	f1be 0f00 	cmp.w	lr, #0
 80297fa:	d000      	beq.n	80297fe <_strtod_l+0x2d6>
 80297fc:	4264      	negs	r4, r4
 80297fe:	2b00      	cmp	r3, #0
 8029800:	d14e      	bne.n	80298a0 <_strtod_l+0x378>
 8029802:	9b07      	ldr	r3, [sp, #28]
 8029804:	4318      	orrs	r0, r3
 8029806:	f47f aeca 	bne.w	802959e <_strtod_l+0x76>
 802980a:	9b06      	ldr	r3, [sp, #24]
 802980c:	2b00      	cmp	r3, #0
 802980e:	f47f aee2 	bne.w	80295d6 <_strtod_l+0xae>
 8029812:	2a69      	cmp	r2, #105	@ 0x69
 8029814:	d027      	beq.n	8029866 <_strtod_l+0x33e>
 8029816:	dc24      	bgt.n	8029862 <_strtod_l+0x33a>
 8029818:	2a49      	cmp	r2, #73	@ 0x49
 802981a:	d024      	beq.n	8029866 <_strtod_l+0x33e>
 802981c:	2a4e      	cmp	r2, #78	@ 0x4e
 802981e:	f47f aeda 	bne.w	80295d6 <_strtod_l+0xae>
 8029822:	4997      	ldr	r1, [pc, #604]	@ (8029a80 <_strtod_l+0x558>)
 8029824:	a811      	add	r0, sp, #68	@ 0x44
 8029826:	f002 fc8d 	bl	802c144 <__match>
 802982a:	2800      	cmp	r0, #0
 802982c:	f43f aed3 	beq.w	80295d6 <_strtod_l+0xae>
 8029830:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029832:	781b      	ldrb	r3, [r3, #0]
 8029834:	2b28      	cmp	r3, #40	@ 0x28
 8029836:	d12d      	bne.n	8029894 <_strtod_l+0x36c>
 8029838:	4992      	ldr	r1, [pc, #584]	@ (8029a84 <_strtod_l+0x55c>)
 802983a:	aa14      	add	r2, sp, #80	@ 0x50
 802983c:	a811      	add	r0, sp, #68	@ 0x44
 802983e:	f002 fc95 	bl	802c16c <__hexnan>
 8029842:	2805      	cmp	r0, #5
 8029844:	d126      	bne.n	8029894 <_strtod_l+0x36c>
 8029846:	9b15      	ldr	r3, [sp, #84]	@ 0x54
 8029848:	f8dd a050 	ldr.w	sl, [sp, #80]	@ 0x50
 802984c:	f043 4bff 	orr.w	fp, r3, #2139095040	@ 0x7f800000
 8029850:	f44b 0be0 	orr.w	fp, fp, #7340032	@ 0x700000
 8029854:	e6a3      	b.n	802959e <_strtod_l+0x76>
 8029856:	240a      	movs	r4, #10
 8029858:	fb04 2c0c 	mla	ip, r4, ip, r2
 802985c:	f1ac 0c30 	sub.w	ip, ip, #48	@ 0x30
 8029860:	e7b8      	b.n	80297d4 <_strtod_l+0x2ac>
 8029862:	2a6e      	cmp	r2, #110	@ 0x6e
 8029864:	e7db      	b.n	802981e <_strtod_l+0x2f6>
 8029866:	4988      	ldr	r1, [pc, #544]	@ (8029a88 <_strtod_l+0x560>)
 8029868:	a811      	add	r0, sp, #68	@ 0x44
 802986a:	f002 fc6b 	bl	802c144 <__match>
 802986e:	2800      	cmp	r0, #0
 8029870:	f43f aeb1 	beq.w	80295d6 <_strtod_l+0xae>
 8029874:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029876:	4985      	ldr	r1, [pc, #532]	@ (8029a8c <_strtod_l+0x564>)
 8029878:	3b01      	subs	r3, #1
 802987a:	a811      	add	r0, sp, #68	@ 0x44
 802987c:	9311      	str	r3, [sp, #68]	@ 0x44
 802987e:	f002 fc61 	bl	802c144 <__match>
 8029882:	b910      	cbnz	r0, 802988a <_strtod_l+0x362>
 8029884:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 8029886:	3301      	adds	r3, #1
 8029888:	9311      	str	r3, [sp, #68]	@ 0x44
 802988a:	f8df b214 	ldr.w	fp, [pc, #532]	@ 8029aa0 <_strtod_l+0x578>
 802988e:	f04f 0a00 	mov.w	sl, #0
 8029892:	e684      	b.n	802959e <_strtod_l+0x76>
 8029894:	487e      	ldr	r0, [pc, #504]	@ (8029a90 <_strtod_l+0x568>)
 8029896:	f001 fb7b 	bl	802af90 <nan>
 802989a:	ec5b ab10 	vmov	sl, fp, d0
 802989e:	e67e      	b.n	802959e <_strtod_l+0x76>
 80298a0:	ee07 9a90 	vmov	s15, r9
 80298a4:	1be2      	subs	r2, r4, r7
 80298a6:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 80298aa:	2d00      	cmp	r5, #0
 80298ac:	bf08      	it	eq
 80298ae:	461d      	moveq	r5, r3
 80298b0:	2b10      	cmp	r3, #16
 80298b2:	9209      	str	r2, [sp, #36]	@ 0x24
 80298b4:	461a      	mov	r2, r3
 80298b6:	bfa8      	it	ge
 80298b8:	2210      	movge	r2, #16
 80298ba:	2b09      	cmp	r3, #9
 80298bc:	ec5b ab17 	vmov	sl, fp, d7
 80298c0:	dc15      	bgt.n	80298ee <_strtod_l+0x3c6>
 80298c2:	1be1      	subs	r1, r4, r7
 80298c4:	2900      	cmp	r1, #0
 80298c6:	f43f ae6a 	beq.w	802959e <_strtod_l+0x76>
 80298ca:	eba4 0107 	sub.w	r1, r4, r7
 80298ce:	dd72      	ble.n	80299b6 <_strtod_l+0x48e>
 80298d0:	2916      	cmp	r1, #22
 80298d2:	dc59      	bgt.n	8029988 <_strtod_l+0x460>
 80298d4:	4b6f      	ldr	r3, [pc, #444]	@ (8029a94 <_strtod_l+0x56c>)
 80298d6:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 80298d8:	eb03 03c2 	add.w	r3, r3, r2, lsl #3
 80298dc:	ed93 7b00 	vldr	d7, [r3]
 80298e0:	ec4b ab16 	vmov	d6, sl, fp
 80298e4:	ee27 7b06 	vmul.f64	d7, d7, d6
 80298e8:	ec5b ab17 	vmov	sl, fp, d7
 80298ec:	e657      	b.n	802959e <_strtod_l+0x76>
 80298ee:	4969      	ldr	r1, [pc, #420]	@ (8029a94 <_strtod_l+0x56c>)
 80298f0:	eb01 01c2 	add.w	r1, r1, r2, lsl #3
 80298f4:	ed11 5b12 	vldr	d5, [r1, #-72]	@ 0xffffffb8
 80298f8:	ee06 6a90 	vmov	s13, r6
 80298fc:	2b0f      	cmp	r3, #15
 80298fe:	eeb8 6b66 	vcvt.f64.u32	d6, s13
 8029902:	eea7 6b05 	vfma.f64	d6, d7, d5
 8029906:	ec5b ab16 	vmov	sl, fp, d6
 802990a:	ddda      	ble.n	80298c2 <_strtod_l+0x39a>
 802990c:	1a9a      	subs	r2, r3, r2
 802990e:	1be1      	subs	r1, r4, r7
 8029910:	440a      	add	r2, r1
 8029912:	2a00      	cmp	r2, #0
 8029914:	f340 8094 	ble.w	8029a40 <_strtod_l+0x518>
 8029918:	f012 000f 	ands.w	r0, r2, #15
 802991c:	d00a      	beq.n	8029934 <_strtod_l+0x40c>
 802991e:	495d      	ldr	r1, [pc, #372]	@ (8029a94 <_strtod_l+0x56c>)
 8029920:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 8029924:	ed91 7b00 	vldr	d7, [r1]
 8029928:	ec4b ab16 	vmov	d6, sl, fp
 802992c:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029930:	ec5b ab17 	vmov	sl, fp, d7
 8029934:	f032 020f 	bics.w	r2, r2, #15
 8029938:	d073      	beq.n	8029a22 <_strtod_l+0x4fa>
 802993a:	f5b2 7f9a 	cmp.w	r2, #308	@ 0x134
 802993e:	dd47      	ble.n	80299d0 <_strtod_l+0x4a8>
 8029940:	2400      	movs	r4, #0
 8029942:	4625      	mov	r5, r4
 8029944:	9407      	str	r4, [sp, #28]
 8029946:	4626      	mov	r6, r4
 8029948:	9a05      	ldr	r2, [sp, #20]
 802994a:	f8df b154 	ldr.w	fp, [pc, #340]	@ 8029aa0 <_strtod_l+0x578>
 802994e:	2322      	movs	r3, #34	@ 0x22
 8029950:	6013      	str	r3, [r2, #0]
 8029952:	f04f 0a00 	mov.w	sl, #0
 8029956:	9b07      	ldr	r3, [sp, #28]
 8029958:	2b00      	cmp	r3, #0
 802995a:	f43f ae20 	beq.w	802959e <_strtod_l+0x76>
 802995e:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8029960:	9805      	ldr	r0, [sp, #20]
 8029962:	f002 fcf1 	bl	802c348 <_Bfree>
 8029966:	9805      	ldr	r0, [sp, #20]
 8029968:	4631      	mov	r1, r6
 802996a:	f002 fced 	bl	802c348 <_Bfree>
 802996e:	9805      	ldr	r0, [sp, #20]
 8029970:	4629      	mov	r1, r5
 8029972:	f002 fce9 	bl	802c348 <_Bfree>
 8029976:	9907      	ldr	r1, [sp, #28]
 8029978:	9805      	ldr	r0, [sp, #20]
 802997a:	f002 fce5 	bl	802c348 <_Bfree>
 802997e:	9805      	ldr	r0, [sp, #20]
 8029980:	4621      	mov	r1, r4
 8029982:	f002 fce1 	bl	802c348 <_Bfree>
 8029986:	e60a      	b.n	802959e <_strtod_l+0x76>
 8029988:	f1c3 0125 	rsb	r1, r3, #37	@ 0x25
 802998c:	1be0      	subs	r0, r4, r7
 802998e:	4281      	cmp	r1, r0
 8029990:	dbbc      	blt.n	802990c <_strtod_l+0x3e4>
 8029992:	4a40      	ldr	r2, [pc, #256]	@ (8029a94 <_strtod_l+0x56c>)
 8029994:	f1c3 030f 	rsb	r3, r3, #15
 8029998:	eb02 01c3 	add.w	r1, r2, r3, lsl #3
 802999c:	ed91 7b00 	vldr	d7, [r1]
 80299a0:	9909      	ldr	r1, [sp, #36]	@ 0x24
 80299a2:	ec4b ab16 	vmov	d6, sl, fp
 80299a6:	1acb      	subs	r3, r1, r3
 80299a8:	eb02 02c3 	add.w	r2, r2, r3, lsl #3
 80299ac:	ee27 7b06 	vmul.f64	d7, d7, d6
 80299b0:	ed92 6b00 	vldr	d6, [r2]
 80299b4:	e796      	b.n	80298e4 <_strtod_l+0x3bc>
 80299b6:	3116      	adds	r1, #22
 80299b8:	dba8      	blt.n	802990c <_strtod_l+0x3e4>
 80299ba:	4b36      	ldr	r3, [pc, #216]	@ (8029a94 <_strtod_l+0x56c>)
 80299bc:	1b3c      	subs	r4, r7, r4
 80299be:	eb03 04c4 	add.w	r4, r3, r4, lsl #3
 80299c2:	ed94 7b00 	vldr	d7, [r4]
 80299c6:	ec4b ab16 	vmov	d6, sl, fp
 80299ca:	ee86 7b07 	vdiv.f64	d7, d6, d7
 80299ce:	e78b      	b.n	80298e8 <_strtod_l+0x3c0>
 80299d0:	2000      	movs	r0, #0
 80299d2:	ec4b ab17 	vmov	d7, sl, fp
 80299d6:	4e30      	ldr	r6, [pc, #192]	@ (8029a98 <_strtod_l+0x570>)
 80299d8:	1112      	asrs	r2, r2, #4
 80299da:	4601      	mov	r1, r0
 80299dc:	2a01      	cmp	r2, #1
 80299de:	dc23      	bgt.n	8029a28 <_strtod_l+0x500>
 80299e0:	b108      	cbz	r0, 80299e6 <_strtod_l+0x4be>
 80299e2:	ec5b ab17 	vmov	sl, fp, d7
 80299e6:	4a2c      	ldr	r2, [pc, #176]	@ (8029a98 <_strtod_l+0x570>)
 80299e8:	482c      	ldr	r0, [pc, #176]	@ (8029a9c <_strtod_l+0x574>)
 80299ea:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 80299ee:	ed92 7b00 	vldr	d7, [r2]
 80299f2:	f1ab 7b54 	sub.w	fp, fp, #55574528	@ 0x3500000
 80299f6:	ec4b ab16 	vmov	d6, sl, fp
 80299fa:	4a29      	ldr	r2, [pc, #164]	@ (8029aa0 <_strtod_l+0x578>)
 80299fc:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029a00:	ee17 1a90 	vmov	r1, s15
 8029a04:	400a      	ands	r2, r1
 8029a06:	4282      	cmp	r2, r0
 8029a08:	ec5b ab17 	vmov	sl, fp, d7
 8029a0c:	d898      	bhi.n	8029940 <_strtod_l+0x418>
 8029a0e:	f5a0 1080 	sub.w	r0, r0, #1048576	@ 0x100000
 8029a12:	4282      	cmp	r2, r0
 8029a14:	bf86      	itte	hi
 8029a16:	f8df b08c 	ldrhi.w	fp, [pc, #140]	@ 8029aa4 <_strtod_l+0x57c>
 8029a1a:	f04f 3aff 	movhi.w	sl, #4294967295	@ 0xffffffff
 8029a1e:	f101 7b54 	addls.w	fp, r1, #55574528	@ 0x3500000
 8029a22:	2200      	movs	r2, #0
 8029a24:	9206      	str	r2, [sp, #24]
 8029a26:	e076      	b.n	8029b16 <_strtod_l+0x5ee>
 8029a28:	f012 0f01 	tst.w	r2, #1
 8029a2c:	d004      	beq.n	8029a38 <_strtod_l+0x510>
 8029a2e:	ed96 6b00 	vldr	d6, [r6]
 8029a32:	2001      	movs	r0, #1
 8029a34:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029a38:	3101      	adds	r1, #1
 8029a3a:	1052      	asrs	r2, r2, #1
 8029a3c:	3608      	adds	r6, #8
 8029a3e:	e7cd      	b.n	80299dc <_strtod_l+0x4b4>
 8029a40:	d0ef      	beq.n	8029a22 <_strtod_l+0x4fa>
 8029a42:	4252      	negs	r2, r2
 8029a44:	f012 000f 	ands.w	r0, r2, #15
 8029a48:	d00a      	beq.n	8029a60 <_strtod_l+0x538>
 8029a4a:	4912      	ldr	r1, [pc, #72]	@ (8029a94 <_strtod_l+0x56c>)
 8029a4c:	eb01 01c0 	add.w	r1, r1, r0, lsl #3
 8029a50:	ed91 7b00 	vldr	d7, [r1]
 8029a54:	ec4b ab16 	vmov	d6, sl, fp
 8029a58:	ee86 7b07 	vdiv.f64	d7, d6, d7
 8029a5c:	ec5b ab17 	vmov	sl, fp, d7
 8029a60:	1112      	asrs	r2, r2, #4
 8029a62:	d0de      	beq.n	8029a22 <_strtod_l+0x4fa>
 8029a64:	2a1f      	cmp	r2, #31
 8029a66:	dd1f      	ble.n	8029aa8 <_strtod_l+0x580>
 8029a68:	2400      	movs	r4, #0
 8029a6a:	4625      	mov	r5, r4
 8029a6c:	9407      	str	r4, [sp, #28]
 8029a6e:	4626      	mov	r6, r4
 8029a70:	9a05      	ldr	r2, [sp, #20]
 8029a72:	2322      	movs	r3, #34	@ 0x22
 8029a74:	f04f 0a00 	mov.w	sl, #0
 8029a78:	f04f 0b00 	mov.w	fp, #0
 8029a7c:	6013      	str	r3, [r2, #0]
 8029a7e:	e76a      	b.n	8029956 <_strtod_l+0x42e>
 8029a80:	080320de 	.word	0x080320de
 8029a84:	08031f80 	.word	0x08031f80
 8029a88:	080320d6 	.word	0x080320d6
 8029a8c:	0803214c 	.word	0x0803214c
 8029a90:	08032148 	.word	0x08032148
 8029a94:	080322b0 	.word	0x080322b0
 8029a98:	08032288 	.word	0x08032288
 8029a9c:	7ca00000 	.word	0x7ca00000
 8029aa0:	7ff00000 	.word	0x7ff00000
 8029aa4:	7fefffff 	.word	0x7fefffff
 8029aa8:	f012 0110 	ands.w	r1, r2, #16
 8029aac:	bf18      	it	ne
 8029aae:	216a      	movne	r1, #106	@ 0x6a
 8029ab0:	9106      	str	r1, [sp, #24]
 8029ab2:	ec4b ab17 	vmov	d7, sl, fp
 8029ab6:	49b0      	ldr	r1, [pc, #704]	@ (8029d78 <_strtod_l+0x850>)
 8029ab8:	2000      	movs	r0, #0
 8029aba:	07d6      	lsls	r6, r2, #31
 8029abc:	d504      	bpl.n	8029ac8 <_strtod_l+0x5a0>
 8029abe:	ed91 6b00 	vldr	d6, [r1]
 8029ac2:	2001      	movs	r0, #1
 8029ac4:	ee27 7b06 	vmul.f64	d7, d7, d6
 8029ac8:	1052      	asrs	r2, r2, #1
 8029aca:	f101 0108 	add.w	r1, r1, #8
 8029ace:	d1f4      	bne.n	8029aba <_strtod_l+0x592>
 8029ad0:	b108      	cbz	r0, 8029ad6 <_strtod_l+0x5ae>
 8029ad2:	ec5b ab17 	vmov	sl, fp, d7
 8029ad6:	9a06      	ldr	r2, [sp, #24]
 8029ad8:	b1b2      	cbz	r2, 8029b08 <_strtod_l+0x5e0>
 8029ada:	f3cb 510a 	ubfx	r1, fp, #20, #11
 8029ade:	f1c1 026b 	rsb	r2, r1, #107	@ 0x6b
 8029ae2:	2a00      	cmp	r2, #0
 8029ae4:	4658      	mov	r0, fp
 8029ae6:	dd0f      	ble.n	8029b08 <_strtod_l+0x5e0>
 8029ae8:	2a1f      	cmp	r2, #31
 8029aea:	dd55      	ble.n	8029b98 <_strtod_l+0x670>
 8029aec:	2a34      	cmp	r2, #52	@ 0x34
 8029aee:	bfde      	ittt	le
 8029af0:	f04f 32ff 	movle.w	r2, #4294967295	@ 0xffffffff
 8029af4:	f1c1 014b 	rsble	r1, r1, #75	@ 0x4b
 8029af8:	408a      	lslle	r2, r1
 8029afa:	f04f 0a00 	mov.w	sl, #0
 8029afe:	bfcc      	ite	gt
 8029b00:	f04f 7b5c 	movgt.w	fp, #57671680	@ 0x3700000
 8029b04:	ea02 0b00 	andle.w	fp, r2, r0
 8029b08:	ec4b ab17 	vmov	d7, sl, fp
 8029b0c:	eeb5 7b40 	vcmp.f64	d7, #0.0
 8029b10:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029b14:	d0a8      	beq.n	8029a68 <_strtod_l+0x540>
 8029b16:	990a      	ldr	r1, [sp, #40]	@ 0x28
 8029b18:	9805      	ldr	r0, [sp, #20]
 8029b1a:	f8cd 9000 	str.w	r9, [sp]
 8029b1e:	462a      	mov	r2, r5
 8029b20:	f002 fc7a 	bl	802c418 <__s2b>
 8029b24:	9007      	str	r0, [sp, #28]
 8029b26:	2800      	cmp	r0, #0
 8029b28:	f43f af0a 	beq.w	8029940 <_strtod_l+0x418>
 8029b2c:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029b2e:	1b3f      	subs	r7, r7, r4
 8029b30:	2b00      	cmp	r3, #0
 8029b32:	bfb4      	ite	lt
 8029b34:	463b      	movlt	r3, r7
 8029b36:	2300      	movge	r3, #0
 8029b38:	930a      	str	r3, [sp, #40]	@ 0x28
 8029b3a:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029b3c:	ed9f bb8a 	vldr	d11, [pc, #552]	@ 8029d68 <_strtod_l+0x840>
 8029b40:	ea23 73e3 	bic.w	r3, r3, r3, asr #31
 8029b44:	2400      	movs	r4, #0
 8029b46:	930d      	str	r3, [sp, #52]	@ 0x34
 8029b48:	4625      	mov	r5, r4
 8029b4a:	9b07      	ldr	r3, [sp, #28]
 8029b4c:	9805      	ldr	r0, [sp, #20]
 8029b4e:	6859      	ldr	r1, [r3, #4]
 8029b50:	f002 fbba 	bl	802c2c8 <_Balloc>
 8029b54:	4606      	mov	r6, r0
 8029b56:	2800      	cmp	r0, #0
 8029b58:	f43f aef6 	beq.w	8029948 <_strtod_l+0x420>
 8029b5c:	9b07      	ldr	r3, [sp, #28]
 8029b5e:	691a      	ldr	r2, [r3, #16]
 8029b60:	ec4b ab19 	vmov	d9, sl, fp
 8029b64:	3202      	adds	r2, #2
 8029b66:	f103 010c 	add.w	r1, r3, #12
 8029b6a:	0092      	lsls	r2, r2, #2
 8029b6c:	300c      	adds	r0, #12
 8029b6e:	f001 f9fe 	bl	802af6e <memcpy>
 8029b72:	eeb0 0b49 	vmov.f64	d0, d9
 8029b76:	9805      	ldr	r0, [sp, #20]
 8029b78:	aa14      	add	r2, sp, #80	@ 0x50
 8029b7a:	a913      	add	r1, sp, #76	@ 0x4c
 8029b7c:	f002 ff88 	bl	802ca90 <__d2b>
 8029b80:	9012      	str	r0, [sp, #72]	@ 0x48
 8029b82:	2800      	cmp	r0, #0
 8029b84:	f43f aee0 	beq.w	8029948 <_strtod_l+0x420>
 8029b88:	9805      	ldr	r0, [sp, #20]
 8029b8a:	2101      	movs	r1, #1
 8029b8c:	f002 fcda 	bl	802c544 <__i2b>
 8029b90:	4605      	mov	r5, r0
 8029b92:	b940      	cbnz	r0, 8029ba6 <_strtod_l+0x67e>
 8029b94:	2500      	movs	r5, #0
 8029b96:	e6d7      	b.n	8029948 <_strtod_l+0x420>
 8029b98:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8029b9c:	fa01 f202 	lsl.w	r2, r1, r2
 8029ba0:	ea02 0a0a 	and.w	sl, r2, sl
 8029ba4:	e7b0      	b.n	8029b08 <_strtod_l+0x5e0>
 8029ba6:	9f13      	ldr	r7, [sp, #76]	@ 0x4c
 8029ba8:	9a14      	ldr	r2, [sp, #80]	@ 0x50
 8029baa:	2f00      	cmp	r7, #0
 8029bac:	bfab      	itete	ge
 8029bae:	9b0a      	ldrge	r3, [sp, #40]	@ 0x28
 8029bb0:	9b0d      	ldrlt	r3, [sp, #52]	@ 0x34
 8029bb2:	f8dd 8034 	ldrge.w	r8, [sp, #52]	@ 0x34
 8029bb6:	f8dd 9028 	ldrlt.w	r9, [sp, #40]	@ 0x28
 8029bba:	bfac      	ite	ge
 8029bbc:	eb07 0903 	addge.w	r9, r7, r3
 8029bc0:	eba3 0807 	sublt.w	r8, r3, r7
 8029bc4:	9b06      	ldr	r3, [sp, #24]
 8029bc6:	1aff      	subs	r7, r7, r3
 8029bc8:	4417      	add	r7, r2
 8029bca:	f1c2 0336 	rsb	r3, r2, #54	@ 0x36
 8029bce:	4a6b      	ldr	r2, [pc, #428]	@ (8029d7c <_strtod_l+0x854>)
 8029bd0:	3f01      	subs	r7, #1
 8029bd2:	4297      	cmp	r7, r2
 8029bd4:	da51      	bge.n	8029c7a <_strtod_l+0x752>
 8029bd6:	1bd1      	subs	r1, r2, r7
 8029bd8:	291f      	cmp	r1, #31
 8029bda:	eba3 0301 	sub.w	r3, r3, r1
 8029bde:	f04f 0201 	mov.w	r2, #1
 8029be2:	dc3e      	bgt.n	8029c62 <_strtod_l+0x73a>
 8029be4:	408a      	lsls	r2, r1
 8029be6:	920c      	str	r2, [sp, #48]	@ 0x30
 8029be8:	2200      	movs	r2, #0
 8029bea:	920b      	str	r2, [sp, #44]	@ 0x2c
 8029bec:	eb09 0703 	add.w	r7, r9, r3
 8029bf0:	4498      	add	r8, r3
 8029bf2:	9b06      	ldr	r3, [sp, #24]
 8029bf4:	45b9      	cmp	r9, r7
 8029bf6:	4498      	add	r8, r3
 8029bf8:	464b      	mov	r3, r9
 8029bfa:	bfa8      	it	ge
 8029bfc:	463b      	movge	r3, r7
 8029bfe:	4543      	cmp	r3, r8
 8029c00:	bfa8      	it	ge
 8029c02:	4643      	movge	r3, r8
 8029c04:	2b00      	cmp	r3, #0
 8029c06:	bfc2      	ittt	gt
 8029c08:	1aff      	subgt	r7, r7, r3
 8029c0a:	eba8 0803 	subgt.w	r8, r8, r3
 8029c0e:	eba9 0903 	subgt.w	r9, r9, r3
 8029c12:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 8029c14:	2b00      	cmp	r3, #0
 8029c16:	dd16      	ble.n	8029c46 <_strtod_l+0x71e>
 8029c18:	4629      	mov	r1, r5
 8029c1a:	9805      	ldr	r0, [sp, #20]
 8029c1c:	461a      	mov	r2, r3
 8029c1e:	f002 fd51 	bl	802c6c4 <__pow5mult>
 8029c22:	4605      	mov	r5, r0
 8029c24:	2800      	cmp	r0, #0
 8029c26:	d0b5      	beq.n	8029b94 <_strtod_l+0x66c>
 8029c28:	4601      	mov	r1, r0
 8029c2a:	9a12      	ldr	r2, [sp, #72]	@ 0x48
 8029c2c:	9805      	ldr	r0, [sp, #20]
 8029c2e:	f002 fc9f 	bl	802c570 <__multiply>
 8029c32:	900f      	str	r0, [sp, #60]	@ 0x3c
 8029c34:	2800      	cmp	r0, #0
 8029c36:	f43f ae87 	beq.w	8029948 <_strtod_l+0x420>
 8029c3a:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8029c3c:	9805      	ldr	r0, [sp, #20]
 8029c3e:	f002 fb83 	bl	802c348 <_Bfree>
 8029c42:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 8029c44:	9312      	str	r3, [sp, #72]	@ 0x48
 8029c46:	2f00      	cmp	r7, #0
 8029c48:	dc1b      	bgt.n	8029c82 <_strtod_l+0x75a>
 8029c4a:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 8029c4c:	2b00      	cmp	r3, #0
 8029c4e:	dd21      	ble.n	8029c94 <_strtod_l+0x76c>
 8029c50:	4631      	mov	r1, r6
 8029c52:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 8029c54:	9805      	ldr	r0, [sp, #20]
 8029c56:	f002 fd35 	bl	802c6c4 <__pow5mult>
 8029c5a:	4606      	mov	r6, r0
 8029c5c:	b9d0      	cbnz	r0, 8029c94 <_strtod_l+0x76c>
 8029c5e:	2600      	movs	r6, #0
 8029c60:	e672      	b.n	8029948 <_strtod_l+0x420>
 8029c62:	f1c7 477f 	rsb	r7, r7, #4278190080	@ 0xff000000
 8029c66:	f507 077f 	add.w	r7, r7, #16711680	@ 0xff0000
 8029c6a:	f507 477b 	add.w	r7, r7, #64256	@ 0xfb00
 8029c6e:	37e2      	adds	r7, #226	@ 0xe2
 8029c70:	fa02 f107 	lsl.w	r1, r2, r7
 8029c74:	910b      	str	r1, [sp, #44]	@ 0x2c
 8029c76:	920c      	str	r2, [sp, #48]	@ 0x30
 8029c78:	e7b8      	b.n	8029bec <_strtod_l+0x6c4>
 8029c7a:	2200      	movs	r2, #0
 8029c7c:	920b      	str	r2, [sp, #44]	@ 0x2c
 8029c7e:	2201      	movs	r2, #1
 8029c80:	e7f9      	b.n	8029c76 <_strtod_l+0x74e>
 8029c82:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8029c84:	9805      	ldr	r0, [sp, #20]
 8029c86:	463a      	mov	r2, r7
 8029c88:	f002 fd76 	bl	802c778 <__lshift>
 8029c8c:	9012      	str	r0, [sp, #72]	@ 0x48
 8029c8e:	2800      	cmp	r0, #0
 8029c90:	d1db      	bne.n	8029c4a <_strtod_l+0x722>
 8029c92:	e659      	b.n	8029948 <_strtod_l+0x420>
 8029c94:	f1b8 0f00 	cmp.w	r8, #0
 8029c98:	dd07      	ble.n	8029caa <_strtod_l+0x782>
 8029c9a:	4631      	mov	r1, r6
 8029c9c:	9805      	ldr	r0, [sp, #20]
 8029c9e:	4642      	mov	r2, r8
 8029ca0:	f002 fd6a 	bl	802c778 <__lshift>
 8029ca4:	4606      	mov	r6, r0
 8029ca6:	2800      	cmp	r0, #0
 8029ca8:	d0d9      	beq.n	8029c5e <_strtod_l+0x736>
 8029caa:	f1b9 0f00 	cmp.w	r9, #0
 8029cae:	dd08      	ble.n	8029cc2 <_strtod_l+0x79a>
 8029cb0:	4629      	mov	r1, r5
 8029cb2:	9805      	ldr	r0, [sp, #20]
 8029cb4:	464a      	mov	r2, r9
 8029cb6:	f002 fd5f 	bl	802c778 <__lshift>
 8029cba:	4605      	mov	r5, r0
 8029cbc:	2800      	cmp	r0, #0
 8029cbe:	f43f ae43 	beq.w	8029948 <_strtod_l+0x420>
 8029cc2:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8029cc4:	9805      	ldr	r0, [sp, #20]
 8029cc6:	4632      	mov	r2, r6
 8029cc8:	f002 fdde 	bl	802c888 <__mdiff>
 8029ccc:	4604      	mov	r4, r0
 8029cce:	2800      	cmp	r0, #0
 8029cd0:	f43f ae3a 	beq.w	8029948 <_strtod_l+0x420>
 8029cd4:	2300      	movs	r3, #0
 8029cd6:	f8d0 800c 	ldr.w	r8, [r0, #12]
 8029cda:	60c3      	str	r3, [r0, #12]
 8029cdc:	4629      	mov	r1, r5
 8029cde:	f002 fdb7 	bl	802c850 <__mcmp>
 8029ce2:	2800      	cmp	r0, #0
 8029ce4:	da4e      	bge.n	8029d84 <_strtod_l+0x85c>
 8029ce6:	ea58 080a 	orrs.w	r8, r8, sl
 8029cea:	d174      	bne.n	8029dd6 <_strtod_l+0x8ae>
 8029cec:	f3cb 0313 	ubfx	r3, fp, #0, #20
 8029cf0:	2b00      	cmp	r3, #0
 8029cf2:	d170      	bne.n	8029dd6 <_strtod_l+0x8ae>
 8029cf4:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8029cf8:	0d1b      	lsrs	r3, r3, #20
 8029cfa:	051b      	lsls	r3, r3, #20
 8029cfc:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 8029d00:	d969      	bls.n	8029dd6 <_strtod_l+0x8ae>
 8029d02:	6963      	ldr	r3, [r4, #20]
 8029d04:	b913      	cbnz	r3, 8029d0c <_strtod_l+0x7e4>
 8029d06:	6923      	ldr	r3, [r4, #16]
 8029d08:	2b01      	cmp	r3, #1
 8029d0a:	dd64      	ble.n	8029dd6 <_strtod_l+0x8ae>
 8029d0c:	4621      	mov	r1, r4
 8029d0e:	2201      	movs	r2, #1
 8029d10:	9805      	ldr	r0, [sp, #20]
 8029d12:	f002 fd31 	bl	802c778 <__lshift>
 8029d16:	4629      	mov	r1, r5
 8029d18:	4604      	mov	r4, r0
 8029d1a:	f002 fd99 	bl	802c850 <__mcmp>
 8029d1e:	2800      	cmp	r0, #0
 8029d20:	dd59      	ble.n	8029dd6 <_strtod_l+0x8ae>
 8029d22:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8029d26:	9a06      	ldr	r2, [sp, #24]
 8029d28:	0d1b      	lsrs	r3, r3, #20
 8029d2a:	051b      	lsls	r3, r3, #20
 8029d2c:	2a00      	cmp	r2, #0
 8029d2e:	d070      	beq.n	8029e12 <_strtod_l+0x8ea>
 8029d30:	f1b3 6fd6 	cmp.w	r3, #112197632	@ 0x6b00000
 8029d34:	d86d      	bhi.n	8029e12 <_strtod_l+0x8ea>
 8029d36:	f1b3 7f5c 	cmp.w	r3, #57671680	@ 0x3700000
 8029d3a:	f67f ae99 	bls.w	8029a70 <_strtod_l+0x548>
 8029d3e:	ed9f 7b0c 	vldr	d7, [pc, #48]	@ 8029d70 <_strtod_l+0x848>
 8029d42:	ec4b ab16 	vmov	d6, sl, fp
 8029d46:	4b0e      	ldr	r3, [pc, #56]	@ (8029d80 <_strtod_l+0x858>)
 8029d48:	ee26 7b07 	vmul.f64	d7, d6, d7
 8029d4c:	ee17 2a90 	vmov	r2, s15
 8029d50:	4013      	ands	r3, r2
 8029d52:	ec5b ab17 	vmov	sl, fp, d7
 8029d56:	2b00      	cmp	r3, #0
 8029d58:	f47f ae01 	bne.w	802995e <_strtod_l+0x436>
 8029d5c:	9a05      	ldr	r2, [sp, #20]
 8029d5e:	2322      	movs	r3, #34	@ 0x22
 8029d60:	6013      	str	r3, [r2, #0]
 8029d62:	e5fc      	b.n	802995e <_strtod_l+0x436>
 8029d64:	f3af 8000 	nop.w
 8029d68:	ffc00000 	.word	0xffc00000
 8029d6c:	41dfffff 	.word	0x41dfffff
 8029d70:	00000000 	.word	0x00000000
 8029d74:	39500000 	.word	0x39500000
 8029d78:	08031fa8 	.word	0x08031fa8
 8029d7c:	fffffc02 	.word	0xfffffc02
 8029d80:	7ff00000 	.word	0x7ff00000
 8029d84:	46d9      	mov	r9, fp
 8029d86:	d15d      	bne.n	8029e44 <_strtod_l+0x91c>
 8029d88:	f3cb 0313 	ubfx	r3, fp, #0, #20
 8029d8c:	f1b8 0f00 	cmp.w	r8, #0
 8029d90:	d02a      	beq.n	8029de8 <_strtod_l+0x8c0>
 8029d92:	4aab      	ldr	r2, [pc, #684]	@ (802a040 <_strtod_l+0xb18>)
 8029d94:	4293      	cmp	r3, r2
 8029d96:	d12a      	bne.n	8029dee <_strtod_l+0x8c6>
 8029d98:	9b06      	ldr	r3, [sp, #24]
 8029d9a:	4652      	mov	r2, sl
 8029d9c:	b1fb      	cbz	r3, 8029dde <_strtod_l+0x8b6>
 8029d9e:	4ba9      	ldr	r3, [pc, #676]	@ (802a044 <_strtod_l+0xb1c>)
 8029da0:	ea0b 0303 	and.w	r3, fp, r3
 8029da4:	f1b3 6fd4 	cmp.w	r3, #111149056	@ 0x6a00000
 8029da8:	f04f 31ff 	mov.w	r1, #4294967295	@ 0xffffffff
 8029dac:	d81a      	bhi.n	8029de4 <_strtod_l+0x8bc>
 8029dae:	0d1b      	lsrs	r3, r3, #20
 8029db0:	f1c3 036b 	rsb	r3, r3, #107	@ 0x6b
 8029db4:	fa01 f303 	lsl.w	r3, r1, r3
 8029db8:	429a      	cmp	r2, r3
 8029dba:	d118      	bne.n	8029dee <_strtod_l+0x8c6>
 8029dbc:	4ba2      	ldr	r3, [pc, #648]	@ (802a048 <_strtod_l+0xb20>)
 8029dbe:	4599      	cmp	r9, r3
 8029dc0:	d102      	bne.n	8029dc8 <_strtod_l+0x8a0>
 8029dc2:	3201      	adds	r2, #1
 8029dc4:	f43f adc0 	beq.w	8029948 <_strtod_l+0x420>
 8029dc8:	4b9e      	ldr	r3, [pc, #632]	@ (802a044 <_strtod_l+0xb1c>)
 8029dca:	ea09 0303 	and.w	r3, r9, r3
 8029dce:	f503 1b80 	add.w	fp, r3, #1048576	@ 0x100000
 8029dd2:	f04f 0a00 	mov.w	sl, #0
 8029dd6:	9b06      	ldr	r3, [sp, #24]
 8029dd8:	2b00      	cmp	r3, #0
 8029dda:	d1b0      	bne.n	8029d3e <_strtod_l+0x816>
 8029ddc:	e5bf      	b.n	802995e <_strtod_l+0x436>
 8029dde:	f04f 33ff 	mov.w	r3, #4294967295	@ 0xffffffff
 8029de2:	e7e9      	b.n	8029db8 <_strtod_l+0x890>
 8029de4:	460b      	mov	r3, r1
 8029de6:	e7e7      	b.n	8029db8 <_strtod_l+0x890>
 8029de8:	ea53 030a 	orrs.w	r3, r3, sl
 8029dec:	d099      	beq.n	8029d22 <_strtod_l+0x7fa>
 8029dee:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 8029df0:	b1c3      	cbz	r3, 8029e24 <_strtod_l+0x8fc>
 8029df2:	ea13 0f09 	tst.w	r3, r9
 8029df6:	d0ee      	beq.n	8029dd6 <_strtod_l+0x8ae>
 8029df8:	9a06      	ldr	r2, [sp, #24]
 8029dfa:	4650      	mov	r0, sl
 8029dfc:	4659      	mov	r1, fp
 8029dfe:	f1b8 0f00 	cmp.w	r8, #0
 8029e02:	d013      	beq.n	8029e2c <_strtod_l+0x904>
 8029e04:	f7ff fb74 	bl	80294f0 <sulp>
 8029e08:	ee39 7b00 	vadd.f64	d7, d9, d0
 8029e0c:	ec5b ab17 	vmov	sl, fp, d7
 8029e10:	e7e1      	b.n	8029dd6 <_strtod_l+0x8ae>
 8029e12:	f5a3 1380 	sub.w	r3, r3, #1048576	@ 0x100000
 8029e16:	ea6f 5b13 	mvn.w	fp, r3, lsr #20
 8029e1a:	ea6f 5b0b 	mvn.w	fp, fp, lsl #20
 8029e1e:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8029e22:	e7d8      	b.n	8029dd6 <_strtod_l+0x8ae>
 8029e24:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 8029e26:	ea13 0f0a 	tst.w	r3, sl
 8029e2a:	e7e4      	b.n	8029df6 <_strtod_l+0x8ce>
 8029e2c:	f7ff fb60 	bl	80294f0 <sulp>
 8029e30:	ee39 0b40 	vsub.f64	d0, d9, d0
 8029e34:	eeb5 0b40 	vcmp.f64	d0, #0.0
 8029e38:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029e3c:	ec5b ab10 	vmov	sl, fp, d0
 8029e40:	d1c9      	bne.n	8029dd6 <_strtod_l+0x8ae>
 8029e42:	e615      	b.n	8029a70 <_strtod_l+0x548>
 8029e44:	4629      	mov	r1, r5
 8029e46:	4620      	mov	r0, r4
 8029e48:	f002 fe7a 	bl	802cb40 <__ratio>
 8029e4c:	eeb0 7b00 	vmov.f64	d7, #0	@ 0x40000000  2.0
 8029e50:	eeb4 0bc7 	vcmpe.f64	d0, d7
 8029e54:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029e58:	d85d      	bhi.n	8029f16 <_strtod_l+0x9ee>
 8029e5a:	f1b8 0f00 	cmp.w	r8, #0
 8029e5e:	d164      	bne.n	8029f2a <_strtod_l+0xa02>
 8029e60:	f1ba 0f00 	cmp.w	sl, #0
 8029e64:	d14b      	bne.n	8029efe <_strtod_l+0x9d6>
 8029e66:	f3cb 0313 	ubfx	r3, fp, #0, #20
 8029e6a:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 8029e6e:	2b00      	cmp	r3, #0
 8029e70:	d160      	bne.n	8029f34 <_strtod_l+0xa0c>
 8029e72:	eeb4 0bc8 	vcmpe.f64	d0, d8
 8029e76:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 8029e7a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029e7e:	d401      	bmi.n	8029e84 <_strtod_l+0x95c>
 8029e80:	ee20 8b08 	vmul.f64	d8, d0, d8
 8029e84:	eeb1 ab48 	vneg.f64	d10, d8
 8029e88:	486e      	ldr	r0, [pc, #440]	@ (802a044 <_strtod_l+0xb1c>)
 8029e8a:	4970      	ldr	r1, [pc, #448]	@ (802a04c <_strtod_l+0xb24>)
 8029e8c:	ea09 0700 	and.w	r7, r9, r0
 8029e90:	428f      	cmp	r7, r1
 8029e92:	ec53 2b1a 	vmov	r2, r3, d10
 8029e96:	d17d      	bne.n	8029f94 <_strtod_l+0xa6c>
 8029e98:	f1a9 7b54 	sub.w	fp, r9, #55574528	@ 0x3500000
 8029e9c:	ec4b ab1c 	vmov	d12, sl, fp
 8029ea0:	eeb0 0b4c 	vmov.f64	d0, d12
 8029ea4:	f002 fd84 	bl	802c9b0 <__ulp>
 8029ea8:	4866      	ldr	r0, [pc, #408]	@ (802a044 <_strtod_l+0xb1c>)
 8029eaa:	eea0 cb0a 	vfma.f64	d12, d0, d10
 8029eae:	ee1c 3a90 	vmov	r3, s25
 8029eb2:	4a67      	ldr	r2, [pc, #412]	@ (802a050 <_strtod_l+0xb28>)
 8029eb4:	ea03 0100 	and.w	r1, r3, r0
 8029eb8:	4291      	cmp	r1, r2
 8029eba:	ec5b ab1c 	vmov	sl, fp, d12
 8029ebe:	d93c      	bls.n	8029f3a <_strtod_l+0xa12>
 8029ec0:	ee19 2a90 	vmov	r2, s19
 8029ec4:	4b60      	ldr	r3, [pc, #384]	@ (802a048 <_strtod_l+0xb20>)
 8029ec6:	429a      	cmp	r2, r3
 8029ec8:	d104      	bne.n	8029ed4 <_strtod_l+0x9ac>
 8029eca:	ee19 3a10 	vmov	r3, s18
 8029ece:	3301      	adds	r3, #1
 8029ed0:	f43f ad3a 	beq.w	8029948 <_strtod_l+0x420>
 8029ed4:	f8df b170 	ldr.w	fp, [pc, #368]	@ 802a048 <_strtod_l+0xb20>
 8029ed8:	f04f 3aff 	mov.w	sl, #4294967295	@ 0xffffffff
 8029edc:	9912      	ldr	r1, [sp, #72]	@ 0x48
 8029ede:	9805      	ldr	r0, [sp, #20]
 8029ee0:	f002 fa32 	bl	802c348 <_Bfree>
 8029ee4:	9805      	ldr	r0, [sp, #20]
 8029ee6:	4631      	mov	r1, r6
 8029ee8:	f002 fa2e 	bl	802c348 <_Bfree>
 8029eec:	9805      	ldr	r0, [sp, #20]
 8029eee:	4629      	mov	r1, r5
 8029ef0:	f002 fa2a 	bl	802c348 <_Bfree>
 8029ef4:	9805      	ldr	r0, [sp, #20]
 8029ef6:	4621      	mov	r1, r4
 8029ef8:	f002 fa26 	bl	802c348 <_Bfree>
 8029efc:	e625      	b.n	8029b4a <_strtod_l+0x622>
 8029efe:	f1ba 0f01 	cmp.w	sl, #1
 8029f02:	d103      	bne.n	8029f0c <_strtod_l+0x9e4>
 8029f04:	f1bb 0f00 	cmp.w	fp, #0
 8029f08:	f43f adb2 	beq.w	8029a70 <_strtod_l+0x548>
 8029f0c:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 8029f10:	eeb7 8b00 	vmov.f64	d8, #112	@ 0x3f800000  1.0
 8029f14:	e7b8      	b.n	8029e88 <_strtod_l+0x960>
 8029f16:	eeb6 8b00 	vmov.f64	d8, #96	@ 0x3f000000  0.5
 8029f1a:	ee20 8b08 	vmul.f64	d8, d0, d8
 8029f1e:	f1b8 0f00 	cmp.w	r8, #0
 8029f22:	d0af      	beq.n	8029e84 <_strtod_l+0x95c>
 8029f24:	eeb0 ab48 	vmov.f64	d10, d8
 8029f28:	e7ae      	b.n	8029e88 <_strtod_l+0x960>
 8029f2a:	eeb7 ab00 	vmov.f64	d10, #112	@ 0x3f800000  1.0
 8029f2e:	eeb0 8b4a 	vmov.f64	d8, d10
 8029f32:	e7a9      	b.n	8029e88 <_strtod_l+0x960>
 8029f34:	eebf ab00 	vmov.f64	d10, #240	@ 0xbf800000 -1.0
 8029f38:	e7a6      	b.n	8029e88 <_strtod_l+0x960>
 8029f3a:	f103 7b54 	add.w	fp, r3, #55574528	@ 0x3500000
 8029f3e:	9b06      	ldr	r3, [sp, #24]
 8029f40:	46d9      	mov	r9, fp
 8029f42:	2b00      	cmp	r3, #0
 8029f44:	d1ca      	bne.n	8029edc <_strtod_l+0x9b4>
 8029f46:	f02b 4300 	bic.w	r3, fp, #2147483648	@ 0x80000000
 8029f4a:	0d1b      	lsrs	r3, r3, #20
 8029f4c:	051b      	lsls	r3, r3, #20
 8029f4e:	429f      	cmp	r7, r3
 8029f50:	d1c4      	bne.n	8029edc <_strtod_l+0x9b4>
 8029f52:	ec51 0b18 	vmov	r0, r1, d8
 8029f56:	f7d6 fbff 	bl	8000758 <__aeabi_d2lz>
 8029f5a:	f7d6 fbb7 	bl	80006cc <__aeabi_l2d>
 8029f5e:	f3cb 0913 	ubfx	r9, fp, #0, #20
 8029f62:	ec41 0b17 	vmov	d7, r0, r1
 8029f66:	ea49 090a 	orr.w	r9, r9, sl
 8029f6a:	ea59 0908 	orrs.w	r9, r9, r8
 8029f6e:	ee38 8b47 	vsub.f64	d8, d8, d7
 8029f72:	d03c      	beq.n	8029fee <_strtod_l+0xac6>
 8029f74:	ed9f 7b2c 	vldr	d7, [pc, #176]	@ 802a028 <_strtod_l+0xb00>
 8029f78:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8029f7c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029f80:	f53f aced 	bmi.w	802995e <_strtod_l+0x436>
 8029f84:	ed9f 7b2a 	vldr	d7, [pc, #168]	@ 802a030 <_strtod_l+0xb08>
 8029f88:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8029f8c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029f90:	dda4      	ble.n	8029edc <_strtod_l+0x9b4>
 8029f92:	e4e4      	b.n	802995e <_strtod_l+0x436>
 8029f94:	9906      	ldr	r1, [sp, #24]
 8029f96:	b1e1      	cbz	r1, 8029fd2 <_strtod_l+0xaaa>
 8029f98:	f1b7 6fd4 	cmp.w	r7, #111149056	@ 0x6a00000
 8029f9c:	d819      	bhi.n	8029fd2 <_strtod_l+0xaaa>
 8029f9e:	eeb4 8bcb 	vcmpe.f64	d8, d11
 8029fa2:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029fa6:	d811      	bhi.n	8029fcc <_strtod_l+0xaa4>
 8029fa8:	eebc 8bc8 	vcvt.u32.f64	s16, d8
 8029fac:	ee18 3a10 	vmov	r3, s16
 8029fb0:	2b01      	cmp	r3, #1
 8029fb2:	bf38      	it	cc
 8029fb4:	2301      	movcc	r3, #1
 8029fb6:	ee08 3a10 	vmov	s16, r3
 8029fba:	eeb8 8b48 	vcvt.f64.u32	d8, s16
 8029fbe:	f1b8 0f00 	cmp.w	r8, #0
 8029fc2:	d111      	bne.n	8029fe8 <_strtod_l+0xac0>
 8029fc4:	eeb1 7b48 	vneg.f64	d7, d8
 8029fc8:	ec53 2b17 	vmov	r2, r3, d7
 8029fcc:	f103 61d6 	add.w	r1, r3, #112197632	@ 0x6b00000
 8029fd0:	1bcb      	subs	r3, r1, r7
 8029fd2:	eeb0 0b49 	vmov.f64	d0, d9
 8029fd6:	ec43 2b1a 	vmov	d10, r2, r3
 8029fda:	f002 fce9 	bl	802c9b0 <__ulp>
 8029fde:	eeaa 9b00 	vfma.f64	d9, d10, d0
 8029fe2:	ec5b ab19 	vmov	sl, fp, d9
 8029fe6:	e7aa      	b.n	8029f3e <_strtod_l+0xa16>
 8029fe8:	eeb0 7b48 	vmov.f64	d7, d8
 8029fec:	e7ec      	b.n	8029fc8 <_strtod_l+0xaa0>
 8029fee:	ed9f 7b12 	vldr	d7, [pc, #72]	@ 802a038 <_strtod_l+0xb10>
 8029ff2:	eeb4 8bc7 	vcmpe.f64	d8, d7
 8029ff6:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 8029ffa:	f57f af6f 	bpl.w	8029edc <_strtod_l+0x9b4>
 8029ffe:	e4ae      	b.n	802995e <_strtod_l+0x436>
 802a000:	2300      	movs	r3, #0
 802a002:	9308      	str	r3, [sp, #32]
 802a004:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802a006:	9b11      	ldr	r3, [sp, #68]	@ 0x44
 802a008:	6013      	str	r3, [r2, #0]
 802a00a:	f7ff bacc 	b.w	80295a6 <_strtod_l+0x7e>
 802a00e:	2a65      	cmp	r2, #101	@ 0x65
 802a010:	f43f abbc 	beq.w	802978c <_strtod_l+0x264>
 802a014:	2a45      	cmp	r2, #69	@ 0x45
 802a016:	f43f abb9 	beq.w	802978c <_strtod_l+0x264>
 802a01a:	2301      	movs	r3, #1
 802a01c:	9306      	str	r3, [sp, #24]
 802a01e:	f7ff bbf0 	b.w	8029802 <_strtod_l+0x2da>
 802a022:	bf00      	nop
 802a024:	f3af 8000 	nop.w
 802a028:	94a03595 	.word	0x94a03595
 802a02c:	3fdfffff 	.word	0x3fdfffff
 802a030:	35afe535 	.word	0x35afe535
 802a034:	3fe00000 	.word	0x3fe00000
 802a038:	94a03595 	.word	0x94a03595
 802a03c:	3fcfffff 	.word	0x3fcfffff
 802a040:	000fffff 	.word	0x000fffff
 802a044:	7ff00000 	.word	0x7ff00000
 802a048:	7fefffff 	.word	0x7fefffff
 802a04c:	7fe00000 	.word	0x7fe00000
 802a050:	7c9fffff 	.word	0x7c9fffff

0802a054 <strtod>:
 802a054:	460a      	mov	r2, r1
 802a056:	4601      	mov	r1, r0
 802a058:	4802      	ldr	r0, [pc, #8]	@ (802a064 <strtod+0x10>)
 802a05a:	4b03      	ldr	r3, [pc, #12]	@ (802a068 <strtod+0x14>)
 802a05c:	6800      	ldr	r0, [r0, #0]
 802a05e:	f7ff ba63 	b.w	8029528 <_strtod_l>
 802a062:	bf00      	nop
 802a064:	240001d4 	.word	0x240001d4
 802a068:	24000068 	.word	0x24000068

0802a06c <__cvt>:
 802a06c:	b5f0      	push	{r4, r5, r6, r7, lr}
 802a06e:	ed2d 8b02 	vpush	{d8}
 802a072:	eeb0 8b40 	vmov.f64	d8, d0
 802a076:	b085      	sub	sp, #20
 802a078:	4617      	mov	r7, r2
 802a07a:	9d0d      	ldr	r5, [sp, #52]	@ 0x34
 802a07c:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 802a07e:	ee18 2a90 	vmov	r2, s17
 802a082:	f025 0520 	bic.w	r5, r5, #32
 802a086:	2a00      	cmp	r2, #0
 802a088:	bfb6      	itet	lt
 802a08a:	222d      	movlt	r2, #45	@ 0x2d
 802a08c:	2200      	movge	r2, #0
 802a08e:	eeb1 8b40 	vneglt.f64	d8, d0
 802a092:	2d46      	cmp	r5, #70	@ 0x46
 802a094:	460c      	mov	r4, r1
 802a096:	701a      	strb	r2, [r3, #0]
 802a098:	d004      	beq.n	802a0a4 <__cvt+0x38>
 802a09a:	2d45      	cmp	r5, #69	@ 0x45
 802a09c:	d100      	bne.n	802a0a0 <__cvt+0x34>
 802a09e:	3401      	adds	r4, #1
 802a0a0:	2102      	movs	r1, #2
 802a0a2:	e000      	b.n	802a0a6 <__cvt+0x3a>
 802a0a4:	2103      	movs	r1, #3
 802a0a6:	ab03      	add	r3, sp, #12
 802a0a8:	9301      	str	r3, [sp, #4]
 802a0aa:	ab02      	add	r3, sp, #8
 802a0ac:	9300      	str	r3, [sp, #0]
 802a0ae:	4622      	mov	r2, r4
 802a0b0:	4633      	mov	r3, r6
 802a0b2:	eeb0 0b48 	vmov.f64	d0, d8
 802a0b6:	f001 f81b 	bl	802b0f0 <_dtoa_r>
 802a0ba:	2d47      	cmp	r5, #71	@ 0x47
 802a0bc:	d114      	bne.n	802a0e8 <__cvt+0x7c>
 802a0be:	07fb      	lsls	r3, r7, #31
 802a0c0:	d50a      	bpl.n	802a0d8 <__cvt+0x6c>
 802a0c2:	1902      	adds	r2, r0, r4
 802a0c4:	eeb5 8b40 	vcmp.f64	d8, #0.0
 802a0c8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a0cc:	bf08      	it	eq
 802a0ce:	9203      	streq	r2, [sp, #12]
 802a0d0:	2130      	movs	r1, #48	@ 0x30
 802a0d2:	9b03      	ldr	r3, [sp, #12]
 802a0d4:	4293      	cmp	r3, r2
 802a0d6:	d319      	bcc.n	802a10c <__cvt+0xa0>
 802a0d8:	9b03      	ldr	r3, [sp, #12]
 802a0da:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802a0dc:	1a1b      	subs	r3, r3, r0
 802a0de:	6013      	str	r3, [r2, #0]
 802a0e0:	b005      	add	sp, #20
 802a0e2:	ecbd 8b02 	vpop	{d8}
 802a0e6:	bdf0      	pop	{r4, r5, r6, r7, pc}
 802a0e8:	2d46      	cmp	r5, #70	@ 0x46
 802a0ea:	eb00 0204 	add.w	r2, r0, r4
 802a0ee:	d1e9      	bne.n	802a0c4 <__cvt+0x58>
 802a0f0:	7803      	ldrb	r3, [r0, #0]
 802a0f2:	2b30      	cmp	r3, #48	@ 0x30
 802a0f4:	d107      	bne.n	802a106 <__cvt+0x9a>
 802a0f6:	eeb5 8b40 	vcmp.f64	d8, #0.0
 802a0fa:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a0fe:	bf1c      	itt	ne
 802a100:	f1c4 0401 	rsbne	r4, r4, #1
 802a104:	6034      	strne	r4, [r6, #0]
 802a106:	6833      	ldr	r3, [r6, #0]
 802a108:	441a      	add	r2, r3
 802a10a:	e7db      	b.n	802a0c4 <__cvt+0x58>
 802a10c:	1c5c      	adds	r4, r3, #1
 802a10e:	9403      	str	r4, [sp, #12]
 802a110:	7019      	strb	r1, [r3, #0]
 802a112:	e7de      	b.n	802a0d2 <__cvt+0x66>

0802a114 <__exponent>:
 802a114:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 802a116:	2900      	cmp	r1, #0
 802a118:	bfba      	itte	lt
 802a11a:	4249      	neglt	r1, r1
 802a11c:	232d      	movlt	r3, #45	@ 0x2d
 802a11e:	232b      	movge	r3, #43	@ 0x2b
 802a120:	2909      	cmp	r1, #9
 802a122:	7002      	strb	r2, [r0, #0]
 802a124:	7043      	strb	r3, [r0, #1]
 802a126:	dd29      	ble.n	802a17c <__exponent+0x68>
 802a128:	f10d 0307 	add.w	r3, sp, #7
 802a12c:	461d      	mov	r5, r3
 802a12e:	270a      	movs	r7, #10
 802a130:	461a      	mov	r2, r3
 802a132:	fbb1 f6f7 	udiv	r6, r1, r7
 802a136:	fb07 1416 	mls	r4, r7, r6, r1
 802a13a:	3430      	adds	r4, #48	@ 0x30
 802a13c:	f802 4c01 	strb.w	r4, [r2, #-1]
 802a140:	460c      	mov	r4, r1
 802a142:	2c63      	cmp	r4, #99	@ 0x63
 802a144:	f103 33ff 	add.w	r3, r3, #4294967295	@ 0xffffffff
 802a148:	4631      	mov	r1, r6
 802a14a:	dcf1      	bgt.n	802a130 <__exponent+0x1c>
 802a14c:	3130      	adds	r1, #48	@ 0x30
 802a14e:	1e94      	subs	r4, r2, #2
 802a150:	f803 1c01 	strb.w	r1, [r3, #-1]
 802a154:	1c41      	adds	r1, r0, #1
 802a156:	4623      	mov	r3, r4
 802a158:	42ab      	cmp	r3, r5
 802a15a:	d30a      	bcc.n	802a172 <__exponent+0x5e>
 802a15c:	f10d 0309 	add.w	r3, sp, #9
 802a160:	1a9b      	subs	r3, r3, r2
 802a162:	42ac      	cmp	r4, r5
 802a164:	bf88      	it	hi
 802a166:	2300      	movhi	r3, #0
 802a168:	3302      	adds	r3, #2
 802a16a:	4403      	add	r3, r0
 802a16c:	1a18      	subs	r0, r3, r0
 802a16e:	b003      	add	sp, #12
 802a170:	bdf0      	pop	{r4, r5, r6, r7, pc}
 802a172:	f813 6b01 	ldrb.w	r6, [r3], #1
 802a176:	f801 6f01 	strb.w	r6, [r1, #1]!
 802a17a:	e7ed      	b.n	802a158 <__exponent+0x44>
 802a17c:	2330      	movs	r3, #48	@ 0x30
 802a17e:	3130      	adds	r1, #48	@ 0x30
 802a180:	7083      	strb	r3, [r0, #2]
 802a182:	70c1      	strb	r1, [r0, #3]
 802a184:	1d03      	adds	r3, r0, #4
 802a186:	e7f1      	b.n	802a16c <__exponent+0x58>

0802a188 <_printf_float>:
 802a188:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802a18c:	b08d      	sub	sp, #52	@ 0x34
 802a18e:	460c      	mov	r4, r1
 802a190:	f8dd 8058 	ldr.w	r8, [sp, #88]	@ 0x58
 802a194:	4616      	mov	r6, r2
 802a196:	461f      	mov	r7, r3
 802a198:	4605      	mov	r5, r0
 802a19a:	f000 fe0b 	bl	802adb4 <_localeconv_r>
 802a19e:	f8d0 b000 	ldr.w	fp, [r0]
 802a1a2:	4658      	mov	r0, fp
 802a1a4:	f7d6 f8fc 	bl	80003a0 <strlen>
 802a1a8:	2300      	movs	r3, #0
 802a1aa:	930a      	str	r3, [sp, #40]	@ 0x28
 802a1ac:	f8d8 3000 	ldr.w	r3, [r8]
 802a1b0:	f894 9018 	ldrb.w	r9, [r4, #24]
 802a1b4:	6822      	ldr	r2, [r4, #0]
 802a1b6:	9005      	str	r0, [sp, #20]
 802a1b8:	3307      	adds	r3, #7
 802a1ba:	f023 0307 	bic.w	r3, r3, #7
 802a1be:	f103 0108 	add.w	r1, r3, #8
 802a1c2:	f8c8 1000 	str.w	r1, [r8]
 802a1c6:	ed93 0b00 	vldr	d0, [r3]
 802a1ca:	ed9f 6b97 	vldr	d6, [pc, #604]	@ 802a428 <_printf_float+0x2a0>
 802a1ce:	eeb0 7bc0 	vabs.f64	d7, d0
 802a1d2:	eeb4 7b46 	vcmp.f64	d7, d6
 802a1d6:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a1da:	ed84 0b12 	vstr	d0, [r4, #72]	@ 0x48
 802a1de:	dd24      	ble.n	802a22a <_printf_float+0xa2>
 802a1e0:	eeb5 0bc0 	vcmpe.f64	d0, #0.0
 802a1e4:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a1e8:	d502      	bpl.n	802a1f0 <_printf_float+0x68>
 802a1ea:	232d      	movs	r3, #45	@ 0x2d
 802a1ec:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 802a1f0:	498f      	ldr	r1, [pc, #572]	@ (802a430 <_printf_float+0x2a8>)
 802a1f2:	4b90      	ldr	r3, [pc, #576]	@ (802a434 <_printf_float+0x2ac>)
 802a1f4:	f1b9 0f47 	cmp.w	r9, #71	@ 0x47
 802a1f8:	bf94      	ite	ls
 802a1fa:	4688      	movls	r8, r1
 802a1fc:	4698      	movhi	r8, r3
 802a1fe:	f022 0204 	bic.w	r2, r2, #4
 802a202:	2303      	movs	r3, #3
 802a204:	6123      	str	r3, [r4, #16]
 802a206:	6022      	str	r2, [r4, #0]
 802a208:	f04f 0a00 	mov.w	sl, #0
 802a20c:	9700      	str	r7, [sp, #0]
 802a20e:	4633      	mov	r3, r6
 802a210:	aa0b      	add	r2, sp, #44	@ 0x2c
 802a212:	4621      	mov	r1, r4
 802a214:	4628      	mov	r0, r5
 802a216:	f000 f9d1 	bl	802a5bc <_printf_common>
 802a21a:	3001      	adds	r0, #1
 802a21c:	f040 8089 	bne.w	802a332 <_printf_float+0x1aa>
 802a220:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802a224:	b00d      	add	sp, #52	@ 0x34
 802a226:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802a22a:	eeb4 0b40 	vcmp.f64	d0, d0
 802a22e:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a232:	d709      	bvc.n	802a248 <_printf_float+0xc0>
 802a234:	ee10 3a90 	vmov	r3, s1
 802a238:	2b00      	cmp	r3, #0
 802a23a:	bfbc      	itt	lt
 802a23c:	232d      	movlt	r3, #45	@ 0x2d
 802a23e:	f884 3043 	strblt.w	r3, [r4, #67]	@ 0x43
 802a242:	497d      	ldr	r1, [pc, #500]	@ (802a438 <_printf_float+0x2b0>)
 802a244:	4b7d      	ldr	r3, [pc, #500]	@ (802a43c <_printf_float+0x2b4>)
 802a246:	e7d5      	b.n	802a1f4 <_printf_float+0x6c>
 802a248:	6863      	ldr	r3, [r4, #4]
 802a24a:	1c59      	adds	r1, r3, #1
 802a24c:	f009 0adf 	and.w	sl, r9, #223	@ 0xdf
 802a250:	d139      	bne.n	802a2c6 <_printf_float+0x13e>
 802a252:	2306      	movs	r3, #6
 802a254:	6063      	str	r3, [r4, #4]
 802a256:	f442 6280 	orr.w	r2, r2, #1024	@ 0x400
 802a25a:	2300      	movs	r3, #0
 802a25c:	6022      	str	r2, [r4, #0]
 802a25e:	9303      	str	r3, [sp, #12]
 802a260:	ab0a      	add	r3, sp, #40	@ 0x28
 802a262:	e9cd 9301 	strd	r9, r3, [sp, #4]
 802a266:	ab09      	add	r3, sp, #36	@ 0x24
 802a268:	9300      	str	r3, [sp, #0]
 802a26a:	6861      	ldr	r1, [r4, #4]
 802a26c:	f10d 0323 	add.w	r3, sp, #35	@ 0x23
 802a270:	4628      	mov	r0, r5
 802a272:	f7ff fefb 	bl	802a06c <__cvt>
 802a276:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 802a27a:	9909      	ldr	r1, [sp, #36]	@ 0x24
 802a27c:	4680      	mov	r8, r0
 802a27e:	d129      	bne.n	802a2d4 <_printf_float+0x14c>
 802a280:	1cc8      	adds	r0, r1, #3
 802a282:	db02      	blt.n	802a28a <_printf_float+0x102>
 802a284:	6863      	ldr	r3, [r4, #4]
 802a286:	4299      	cmp	r1, r3
 802a288:	dd41      	ble.n	802a30e <_printf_float+0x186>
 802a28a:	f1a9 0902 	sub.w	r9, r9, #2
 802a28e:	fa5f f989 	uxtb.w	r9, r9
 802a292:	3901      	subs	r1, #1
 802a294:	464a      	mov	r2, r9
 802a296:	f104 0050 	add.w	r0, r4, #80	@ 0x50
 802a29a:	9109      	str	r1, [sp, #36]	@ 0x24
 802a29c:	f7ff ff3a 	bl	802a114 <__exponent>
 802a2a0:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 802a2a2:	1813      	adds	r3, r2, r0
 802a2a4:	2a01      	cmp	r2, #1
 802a2a6:	4682      	mov	sl, r0
 802a2a8:	6123      	str	r3, [r4, #16]
 802a2aa:	dc02      	bgt.n	802a2b2 <_printf_float+0x12a>
 802a2ac:	6822      	ldr	r2, [r4, #0]
 802a2ae:	07d2      	lsls	r2, r2, #31
 802a2b0:	d501      	bpl.n	802a2b6 <_printf_float+0x12e>
 802a2b2:	3301      	adds	r3, #1
 802a2b4:	6123      	str	r3, [r4, #16]
 802a2b6:	f89d 3023 	ldrb.w	r3, [sp, #35]	@ 0x23
 802a2ba:	2b00      	cmp	r3, #0
 802a2bc:	d0a6      	beq.n	802a20c <_printf_float+0x84>
 802a2be:	232d      	movs	r3, #45	@ 0x2d
 802a2c0:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 802a2c4:	e7a2      	b.n	802a20c <_printf_float+0x84>
 802a2c6:	f1ba 0f47 	cmp.w	sl, #71	@ 0x47
 802a2ca:	d1c4      	bne.n	802a256 <_printf_float+0xce>
 802a2cc:	2b00      	cmp	r3, #0
 802a2ce:	d1c2      	bne.n	802a256 <_printf_float+0xce>
 802a2d0:	2301      	movs	r3, #1
 802a2d2:	e7bf      	b.n	802a254 <_printf_float+0xcc>
 802a2d4:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 802a2d8:	d9db      	bls.n	802a292 <_printf_float+0x10a>
 802a2da:	f1b9 0f66 	cmp.w	r9, #102	@ 0x66
 802a2de:	d118      	bne.n	802a312 <_printf_float+0x18a>
 802a2e0:	2900      	cmp	r1, #0
 802a2e2:	6863      	ldr	r3, [r4, #4]
 802a2e4:	dd0b      	ble.n	802a2fe <_printf_float+0x176>
 802a2e6:	6121      	str	r1, [r4, #16]
 802a2e8:	b913      	cbnz	r3, 802a2f0 <_printf_float+0x168>
 802a2ea:	6822      	ldr	r2, [r4, #0]
 802a2ec:	07d0      	lsls	r0, r2, #31
 802a2ee:	d502      	bpl.n	802a2f6 <_printf_float+0x16e>
 802a2f0:	3301      	adds	r3, #1
 802a2f2:	440b      	add	r3, r1
 802a2f4:	6123      	str	r3, [r4, #16]
 802a2f6:	65a1      	str	r1, [r4, #88]	@ 0x58
 802a2f8:	f04f 0a00 	mov.w	sl, #0
 802a2fc:	e7db      	b.n	802a2b6 <_printf_float+0x12e>
 802a2fe:	b913      	cbnz	r3, 802a306 <_printf_float+0x17e>
 802a300:	6822      	ldr	r2, [r4, #0]
 802a302:	07d2      	lsls	r2, r2, #31
 802a304:	d501      	bpl.n	802a30a <_printf_float+0x182>
 802a306:	3302      	adds	r3, #2
 802a308:	e7f4      	b.n	802a2f4 <_printf_float+0x16c>
 802a30a:	2301      	movs	r3, #1
 802a30c:	e7f2      	b.n	802a2f4 <_printf_float+0x16c>
 802a30e:	f04f 0967 	mov.w	r9, #103	@ 0x67
 802a312:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802a314:	4299      	cmp	r1, r3
 802a316:	db05      	blt.n	802a324 <_printf_float+0x19c>
 802a318:	6823      	ldr	r3, [r4, #0]
 802a31a:	6121      	str	r1, [r4, #16]
 802a31c:	07d8      	lsls	r0, r3, #31
 802a31e:	d5ea      	bpl.n	802a2f6 <_printf_float+0x16e>
 802a320:	1c4b      	adds	r3, r1, #1
 802a322:	e7e7      	b.n	802a2f4 <_printf_float+0x16c>
 802a324:	2900      	cmp	r1, #0
 802a326:	bfd4      	ite	le
 802a328:	f1c1 0202 	rsble	r2, r1, #2
 802a32c:	2201      	movgt	r2, #1
 802a32e:	4413      	add	r3, r2
 802a330:	e7e0      	b.n	802a2f4 <_printf_float+0x16c>
 802a332:	6823      	ldr	r3, [r4, #0]
 802a334:	055a      	lsls	r2, r3, #21
 802a336:	d407      	bmi.n	802a348 <_printf_float+0x1c0>
 802a338:	6923      	ldr	r3, [r4, #16]
 802a33a:	4642      	mov	r2, r8
 802a33c:	4631      	mov	r1, r6
 802a33e:	4628      	mov	r0, r5
 802a340:	47b8      	blx	r7
 802a342:	3001      	adds	r0, #1
 802a344:	d12a      	bne.n	802a39c <_printf_float+0x214>
 802a346:	e76b      	b.n	802a220 <_printf_float+0x98>
 802a348:	f1b9 0f65 	cmp.w	r9, #101	@ 0x65
 802a34c:	f240 80e0 	bls.w	802a510 <_printf_float+0x388>
 802a350:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 802a354:	eeb5 7b40 	vcmp.f64	d7, #0.0
 802a358:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a35c:	d133      	bne.n	802a3c6 <_printf_float+0x23e>
 802a35e:	4a38      	ldr	r2, [pc, #224]	@ (802a440 <_printf_float+0x2b8>)
 802a360:	2301      	movs	r3, #1
 802a362:	4631      	mov	r1, r6
 802a364:	4628      	mov	r0, r5
 802a366:	47b8      	blx	r7
 802a368:	3001      	adds	r0, #1
 802a36a:	f43f af59 	beq.w	802a220 <_printf_float+0x98>
 802a36e:	e9dd 3809 	ldrd	r3, r8, [sp, #36]	@ 0x24
 802a372:	4543      	cmp	r3, r8
 802a374:	db02      	blt.n	802a37c <_printf_float+0x1f4>
 802a376:	6823      	ldr	r3, [r4, #0]
 802a378:	07d8      	lsls	r0, r3, #31
 802a37a:	d50f      	bpl.n	802a39c <_printf_float+0x214>
 802a37c:	9b05      	ldr	r3, [sp, #20]
 802a37e:	465a      	mov	r2, fp
 802a380:	4631      	mov	r1, r6
 802a382:	4628      	mov	r0, r5
 802a384:	47b8      	blx	r7
 802a386:	3001      	adds	r0, #1
 802a388:	f43f af4a 	beq.w	802a220 <_printf_float+0x98>
 802a38c:	f04f 0900 	mov.w	r9, #0
 802a390:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 802a394:	f104 0a1a 	add.w	sl, r4, #26
 802a398:	45c8      	cmp	r8, r9
 802a39a:	dc09      	bgt.n	802a3b0 <_printf_float+0x228>
 802a39c:	6823      	ldr	r3, [r4, #0]
 802a39e:	079b      	lsls	r3, r3, #30
 802a3a0:	f100 8107 	bmi.w	802a5b2 <_printf_float+0x42a>
 802a3a4:	68e0      	ldr	r0, [r4, #12]
 802a3a6:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802a3a8:	4298      	cmp	r0, r3
 802a3aa:	bfb8      	it	lt
 802a3ac:	4618      	movlt	r0, r3
 802a3ae:	e739      	b.n	802a224 <_printf_float+0x9c>
 802a3b0:	2301      	movs	r3, #1
 802a3b2:	4652      	mov	r2, sl
 802a3b4:	4631      	mov	r1, r6
 802a3b6:	4628      	mov	r0, r5
 802a3b8:	47b8      	blx	r7
 802a3ba:	3001      	adds	r0, #1
 802a3bc:	f43f af30 	beq.w	802a220 <_printf_float+0x98>
 802a3c0:	f109 0901 	add.w	r9, r9, #1
 802a3c4:	e7e8      	b.n	802a398 <_printf_float+0x210>
 802a3c6:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a3c8:	2b00      	cmp	r3, #0
 802a3ca:	dc3b      	bgt.n	802a444 <_printf_float+0x2bc>
 802a3cc:	4a1c      	ldr	r2, [pc, #112]	@ (802a440 <_printf_float+0x2b8>)
 802a3ce:	2301      	movs	r3, #1
 802a3d0:	4631      	mov	r1, r6
 802a3d2:	4628      	mov	r0, r5
 802a3d4:	47b8      	blx	r7
 802a3d6:	3001      	adds	r0, #1
 802a3d8:	f43f af22 	beq.w	802a220 <_printf_float+0x98>
 802a3dc:	e9dd 3909 	ldrd	r3, r9, [sp, #36]	@ 0x24
 802a3e0:	ea59 0303 	orrs.w	r3, r9, r3
 802a3e4:	d102      	bne.n	802a3ec <_printf_float+0x264>
 802a3e6:	6823      	ldr	r3, [r4, #0]
 802a3e8:	07d9      	lsls	r1, r3, #31
 802a3ea:	d5d7      	bpl.n	802a39c <_printf_float+0x214>
 802a3ec:	9b05      	ldr	r3, [sp, #20]
 802a3ee:	465a      	mov	r2, fp
 802a3f0:	4631      	mov	r1, r6
 802a3f2:	4628      	mov	r0, r5
 802a3f4:	47b8      	blx	r7
 802a3f6:	3001      	adds	r0, #1
 802a3f8:	f43f af12 	beq.w	802a220 <_printf_float+0x98>
 802a3fc:	f04f 0a00 	mov.w	sl, #0
 802a400:	f104 0b1a 	add.w	fp, r4, #26
 802a404:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a406:	425b      	negs	r3, r3
 802a408:	4553      	cmp	r3, sl
 802a40a:	dc01      	bgt.n	802a410 <_printf_float+0x288>
 802a40c:	464b      	mov	r3, r9
 802a40e:	e794      	b.n	802a33a <_printf_float+0x1b2>
 802a410:	2301      	movs	r3, #1
 802a412:	465a      	mov	r2, fp
 802a414:	4631      	mov	r1, r6
 802a416:	4628      	mov	r0, r5
 802a418:	47b8      	blx	r7
 802a41a:	3001      	adds	r0, #1
 802a41c:	f43f af00 	beq.w	802a220 <_printf_float+0x98>
 802a420:	f10a 0a01 	add.w	sl, sl, #1
 802a424:	e7ee      	b.n	802a404 <_printf_float+0x27c>
 802a426:	bf00      	nop
 802a428:	ffffffff 	.word	0xffffffff
 802a42c:	7fefffff 	.word	0x7fefffff
 802a430:	080320d1 	.word	0x080320d1
 802a434:	080320d5 	.word	0x080320d5
 802a438:	080320d9 	.word	0x080320d9
 802a43c:	080320dd 	.word	0x080320dd
 802a440:	080320e1 	.word	0x080320e1
 802a444:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 802a446:	f8dd a028 	ldr.w	sl, [sp, #40]	@ 0x28
 802a44a:	4553      	cmp	r3, sl
 802a44c:	bfa8      	it	ge
 802a44e:	4653      	movge	r3, sl
 802a450:	2b00      	cmp	r3, #0
 802a452:	4699      	mov	r9, r3
 802a454:	dc37      	bgt.n	802a4c6 <_printf_float+0x33e>
 802a456:	2300      	movs	r3, #0
 802a458:	9307      	str	r3, [sp, #28]
 802a45a:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 802a45e:	f104 021a 	add.w	r2, r4, #26
 802a462:	6da3      	ldr	r3, [r4, #88]	@ 0x58
 802a464:	9907      	ldr	r1, [sp, #28]
 802a466:	9306      	str	r3, [sp, #24]
 802a468:	eba3 0309 	sub.w	r3, r3, r9
 802a46c:	428b      	cmp	r3, r1
 802a46e:	dc31      	bgt.n	802a4d4 <_printf_float+0x34c>
 802a470:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a472:	459a      	cmp	sl, r3
 802a474:	dc3b      	bgt.n	802a4ee <_printf_float+0x366>
 802a476:	6823      	ldr	r3, [r4, #0]
 802a478:	07da      	lsls	r2, r3, #31
 802a47a:	d438      	bmi.n	802a4ee <_printf_float+0x366>
 802a47c:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a47e:	ebaa 0903 	sub.w	r9, sl, r3
 802a482:	9b06      	ldr	r3, [sp, #24]
 802a484:	ebaa 0303 	sub.w	r3, sl, r3
 802a488:	4599      	cmp	r9, r3
 802a48a:	bfa8      	it	ge
 802a48c:	4699      	movge	r9, r3
 802a48e:	f1b9 0f00 	cmp.w	r9, #0
 802a492:	dc34      	bgt.n	802a4fe <_printf_float+0x376>
 802a494:	f04f 0800 	mov.w	r8, #0
 802a498:	ea29 79e9 	bic.w	r9, r9, r9, asr #31
 802a49c:	f104 0b1a 	add.w	fp, r4, #26
 802a4a0:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802a4a2:	ebaa 0303 	sub.w	r3, sl, r3
 802a4a6:	eba3 0309 	sub.w	r3, r3, r9
 802a4aa:	4543      	cmp	r3, r8
 802a4ac:	f77f af76 	ble.w	802a39c <_printf_float+0x214>
 802a4b0:	2301      	movs	r3, #1
 802a4b2:	465a      	mov	r2, fp
 802a4b4:	4631      	mov	r1, r6
 802a4b6:	4628      	mov	r0, r5
 802a4b8:	47b8      	blx	r7
 802a4ba:	3001      	adds	r0, #1
 802a4bc:	f43f aeb0 	beq.w	802a220 <_printf_float+0x98>
 802a4c0:	f108 0801 	add.w	r8, r8, #1
 802a4c4:	e7ec      	b.n	802a4a0 <_printf_float+0x318>
 802a4c6:	4642      	mov	r2, r8
 802a4c8:	4631      	mov	r1, r6
 802a4ca:	4628      	mov	r0, r5
 802a4cc:	47b8      	blx	r7
 802a4ce:	3001      	adds	r0, #1
 802a4d0:	d1c1      	bne.n	802a456 <_printf_float+0x2ce>
 802a4d2:	e6a5      	b.n	802a220 <_printf_float+0x98>
 802a4d4:	2301      	movs	r3, #1
 802a4d6:	4631      	mov	r1, r6
 802a4d8:	4628      	mov	r0, r5
 802a4da:	9206      	str	r2, [sp, #24]
 802a4dc:	47b8      	blx	r7
 802a4de:	3001      	adds	r0, #1
 802a4e0:	f43f ae9e 	beq.w	802a220 <_printf_float+0x98>
 802a4e4:	9b07      	ldr	r3, [sp, #28]
 802a4e6:	9a06      	ldr	r2, [sp, #24]
 802a4e8:	3301      	adds	r3, #1
 802a4ea:	9307      	str	r3, [sp, #28]
 802a4ec:	e7b9      	b.n	802a462 <_printf_float+0x2da>
 802a4ee:	9b05      	ldr	r3, [sp, #20]
 802a4f0:	465a      	mov	r2, fp
 802a4f2:	4631      	mov	r1, r6
 802a4f4:	4628      	mov	r0, r5
 802a4f6:	47b8      	blx	r7
 802a4f8:	3001      	adds	r0, #1
 802a4fa:	d1bf      	bne.n	802a47c <_printf_float+0x2f4>
 802a4fc:	e690      	b.n	802a220 <_printf_float+0x98>
 802a4fe:	9a06      	ldr	r2, [sp, #24]
 802a500:	464b      	mov	r3, r9
 802a502:	4442      	add	r2, r8
 802a504:	4631      	mov	r1, r6
 802a506:	4628      	mov	r0, r5
 802a508:	47b8      	blx	r7
 802a50a:	3001      	adds	r0, #1
 802a50c:	d1c2      	bne.n	802a494 <_printf_float+0x30c>
 802a50e:	e687      	b.n	802a220 <_printf_float+0x98>
 802a510:	f8dd 9028 	ldr.w	r9, [sp, #40]	@ 0x28
 802a514:	f1b9 0f01 	cmp.w	r9, #1
 802a518:	dc01      	bgt.n	802a51e <_printf_float+0x396>
 802a51a:	07db      	lsls	r3, r3, #31
 802a51c:	d536      	bpl.n	802a58c <_printf_float+0x404>
 802a51e:	2301      	movs	r3, #1
 802a520:	4642      	mov	r2, r8
 802a522:	4631      	mov	r1, r6
 802a524:	4628      	mov	r0, r5
 802a526:	47b8      	blx	r7
 802a528:	3001      	adds	r0, #1
 802a52a:	f43f ae79 	beq.w	802a220 <_printf_float+0x98>
 802a52e:	9b05      	ldr	r3, [sp, #20]
 802a530:	465a      	mov	r2, fp
 802a532:	4631      	mov	r1, r6
 802a534:	4628      	mov	r0, r5
 802a536:	47b8      	blx	r7
 802a538:	3001      	adds	r0, #1
 802a53a:	f43f ae71 	beq.w	802a220 <_printf_float+0x98>
 802a53e:	ed94 7b12 	vldr	d7, [r4, #72]	@ 0x48
 802a542:	eeb5 7b40 	vcmp.f64	d7, #0.0
 802a546:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802a54a:	f109 39ff 	add.w	r9, r9, #4294967295	@ 0xffffffff
 802a54e:	d018      	beq.n	802a582 <_printf_float+0x3fa>
 802a550:	464b      	mov	r3, r9
 802a552:	f108 0201 	add.w	r2, r8, #1
 802a556:	4631      	mov	r1, r6
 802a558:	4628      	mov	r0, r5
 802a55a:	47b8      	blx	r7
 802a55c:	3001      	adds	r0, #1
 802a55e:	d10c      	bne.n	802a57a <_printf_float+0x3f2>
 802a560:	e65e      	b.n	802a220 <_printf_float+0x98>
 802a562:	2301      	movs	r3, #1
 802a564:	465a      	mov	r2, fp
 802a566:	4631      	mov	r1, r6
 802a568:	4628      	mov	r0, r5
 802a56a:	47b8      	blx	r7
 802a56c:	3001      	adds	r0, #1
 802a56e:	f43f ae57 	beq.w	802a220 <_printf_float+0x98>
 802a572:	f108 0801 	add.w	r8, r8, #1
 802a576:	45c8      	cmp	r8, r9
 802a578:	dbf3      	blt.n	802a562 <_printf_float+0x3da>
 802a57a:	4653      	mov	r3, sl
 802a57c:	f104 0250 	add.w	r2, r4, #80	@ 0x50
 802a580:	e6dc      	b.n	802a33c <_printf_float+0x1b4>
 802a582:	f04f 0800 	mov.w	r8, #0
 802a586:	f104 0b1a 	add.w	fp, r4, #26
 802a58a:	e7f4      	b.n	802a576 <_printf_float+0x3ee>
 802a58c:	2301      	movs	r3, #1
 802a58e:	4642      	mov	r2, r8
 802a590:	e7e1      	b.n	802a556 <_printf_float+0x3ce>
 802a592:	2301      	movs	r3, #1
 802a594:	464a      	mov	r2, r9
 802a596:	4631      	mov	r1, r6
 802a598:	4628      	mov	r0, r5
 802a59a:	47b8      	blx	r7
 802a59c:	3001      	adds	r0, #1
 802a59e:	f43f ae3f 	beq.w	802a220 <_printf_float+0x98>
 802a5a2:	f108 0801 	add.w	r8, r8, #1
 802a5a6:	68e3      	ldr	r3, [r4, #12]
 802a5a8:	990b      	ldr	r1, [sp, #44]	@ 0x2c
 802a5aa:	1a5b      	subs	r3, r3, r1
 802a5ac:	4543      	cmp	r3, r8
 802a5ae:	dcf0      	bgt.n	802a592 <_printf_float+0x40a>
 802a5b0:	e6f8      	b.n	802a3a4 <_printf_float+0x21c>
 802a5b2:	f04f 0800 	mov.w	r8, #0
 802a5b6:	f104 0919 	add.w	r9, r4, #25
 802a5ba:	e7f4      	b.n	802a5a6 <_printf_float+0x41e>

0802a5bc <_printf_common>:
 802a5bc:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802a5c0:	4616      	mov	r6, r2
 802a5c2:	4698      	mov	r8, r3
 802a5c4:	688a      	ldr	r2, [r1, #8]
 802a5c6:	690b      	ldr	r3, [r1, #16]
 802a5c8:	f8dd 9020 	ldr.w	r9, [sp, #32]
 802a5cc:	4293      	cmp	r3, r2
 802a5ce:	bfb8      	it	lt
 802a5d0:	4613      	movlt	r3, r2
 802a5d2:	6033      	str	r3, [r6, #0]
 802a5d4:	f891 2043 	ldrb.w	r2, [r1, #67]	@ 0x43
 802a5d8:	4607      	mov	r7, r0
 802a5da:	460c      	mov	r4, r1
 802a5dc:	b10a      	cbz	r2, 802a5e2 <_printf_common+0x26>
 802a5de:	3301      	adds	r3, #1
 802a5e0:	6033      	str	r3, [r6, #0]
 802a5e2:	6823      	ldr	r3, [r4, #0]
 802a5e4:	0699      	lsls	r1, r3, #26
 802a5e6:	bf42      	ittt	mi
 802a5e8:	6833      	ldrmi	r3, [r6, #0]
 802a5ea:	3302      	addmi	r3, #2
 802a5ec:	6033      	strmi	r3, [r6, #0]
 802a5ee:	6825      	ldr	r5, [r4, #0]
 802a5f0:	f015 0506 	ands.w	r5, r5, #6
 802a5f4:	d106      	bne.n	802a604 <_printf_common+0x48>
 802a5f6:	f104 0a19 	add.w	sl, r4, #25
 802a5fa:	68e3      	ldr	r3, [r4, #12]
 802a5fc:	6832      	ldr	r2, [r6, #0]
 802a5fe:	1a9b      	subs	r3, r3, r2
 802a600:	42ab      	cmp	r3, r5
 802a602:	dc26      	bgt.n	802a652 <_printf_common+0x96>
 802a604:	f894 3043 	ldrb.w	r3, [r4, #67]	@ 0x43
 802a608:	6822      	ldr	r2, [r4, #0]
 802a60a:	3b00      	subs	r3, #0
 802a60c:	bf18      	it	ne
 802a60e:	2301      	movne	r3, #1
 802a610:	0692      	lsls	r2, r2, #26
 802a612:	d42b      	bmi.n	802a66c <_printf_common+0xb0>
 802a614:	f104 0243 	add.w	r2, r4, #67	@ 0x43
 802a618:	4641      	mov	r1, r8
 802a61a:	4638      	mov	r0, r7
 802a61c:	47c8      	blx	r9
 802a61e:	3001      	adds	r0, #1
 802a620:	d01e      	beq.n	802a660 <_printf_common+0xa4>
 802a622:	6823      	ldr	r3, [r4, #0]
 802a624:	6922      	ldr	r2, [r4, #16]
 802a626:	f003 0306 	and.w	r3, r3, #6
 802a62a:	2b04      	cmp	r3, #4
 802a62c:	bf02      	ittt	eq
 802a62e:	68e5      	ldreq	r5, [r4, #12]
 802a630:	6833      	ldreq	r3, [r6, #0]
 802a632:	1aed      	subeq	r5, r5, r3
 802a634:	68a3      	ldr	r3, [r4, #8]
 802a636:	bf0c      	ite	eq
 802a638:	ea25 75e5 	biceq.w	r5, r5, r5, asr #31
 802a63c:	2500      	movne	r5, #0
 802a63e:	4293      	cmp	r3, r2
 802a640:	bfc4      	itt	gt
 802a642:	1a9b      	subgt	r3, r3, r2
 802a644:	18ed      	addgt	r5, r5, r3
 802a646:	2600      	movs	r6, #0
 802a648:	341a      	adds	r4, #26
 802a64a:	42b5      	cmp	r5, r6
 802a64c:	d11a      	bne.n	802a684 <_printf_common+0xc8>
 802a64e:	2000      	movs	r0, #0
 802a650:	e008      	b.n	802a664 <_printf_common+0xa8>
 802a652:	2301      	movs	r3, #1
 802a654:	4652      	mov	r2, sl
 802a656:	4641      	mov	r1, r8
 802a658:	4638      	mov	r0, r7
 802a65a:	47c8      	blx	r9
 802a65c:	3001      	adds	r0, #1
 802a65e:	d103      	bne.n	802a668 <_printf_common+0xac>
 802a660:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802a664:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802a668:	3501      	adds	r5, #1
 802a66a:	e7c6      	b.n	802a5fa <_printf_common+0x3e>
 802a66c:	18e1      	adds	r1, r4, r3
 802a66e:	1c5a      	adds	r2, r3, #1
 802a670:	2030      	movs	r0, #48	@ 0x30
 802a672:	f881 0043 	strb.w	r0, [r1, #67]	@ 0x43
 802a676:	4422      	add	r2, r4
 802a678:	f894 1045 	ldrb.w	r1, [r4, #69]	@ 0x45
 802a67c:	f882 1043 	strb.w	r1, [r2, #67]	@ 0x43
 802a680:	3302      	adds	r3, #2
 802a682:	e7c7      	b.n	802a614 <_printf_common+0x58>
 802a684:	2301      	movs	r3, #1
 802a686:	4622      	mov	r2, r4
 802a688:	4641      	mov	r1, r8
 802a68a:	4638      	mov	r0, r7
 802a68c:	47c8      	blx	r9
 802a68e:	3001      	adds	r0, #1
 802a690:	d0e6      	beq.n	802a660 <_printf_common+0xa4>
 802a692:	3601      	adds	r6, #1
 802a694:	e7d9      	b.n	802a64a <_printf_common+0x8e>
	...

0802a698 <_printf_i>:
 802a698:	e92d 47ff 	stmdb	sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
 802a69c:	7e0f      	ldrb	r7, [r1, #24]
 802a69e:	9e0c      	ldr	r6, [sp, #48]	@ 0x30
 802a6a0:	2f78      	cmp	r7, #120	@ 0x78
 802a6a2:	4691      	mov	r9, r2
 802a6a4:	4680      	mov	r8, r0
 802a6a6:	460c      	mov	r4, r1
 802a6a8:	469a      	mov	sl, r3
 802a6aa:	f101 0243 	add.w	r2, r1, #67	@ 0x43
 802a6ae:	d807      	bhi.n	802a6c0 <_printf_i+0x28>
 802a6b0:	2f62      	cmp	r7, #98	@ 0x62
 802a6b2:	d80a      	bhi.n	802a6ca <_printf_i+0x32>
 802a6b4:	2f00      	cmp	r7, #0
 802a6b6:	f000 80d2 	beq.w	802a85e <_printf_i+0x1c6>
 802a6ba:	2f58      	cmp	r7, #88	@ 0x58
 802a6bc:	f000 80b9 	beq.w	802a832 <_printf_i+0x19a>
 802a6c0:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 802a6c4:	f884 7042 	strb.w	r7, [r4, #66]	@ 0x42
 802a6c8:	e03a      	b.n	802a740 <_printf_i+0xa8>
 802a6ca:	f1a7 0363 	sub.w	r3, r7, #99	@ 0x63
 802a6ce:	2b15      	cmp	r3, #21
 802a6d0:	d8f6      	bhi.n	802a6c0 <_printf_i+0x28>
 802a6d2:	a101      	add	r1, pc, #4	@ (adr r1, 802a6d8 <_printf_i+0x40>)
 802a6d4:	f851 f023 	ldr.w	pc, [r1, r3, lsl #2]
 802a6d8:	0802a731 	.word	0x0802a731
 802a6dc:	0802a745 	.word	0x0802a745
 802a6e0:	0802a6c1 	.word	0x0802a6c1
 802a6e4:	0802a6c1 	.word	0x0802a6c1
 802a6e8:	0802a6c1 	.word	0x0802a6c1
 802a6ec:	0802a6c1 	.word	0x0802a6c1
 802a6f0:	0802a745 	.word	0x0802a745
 802a6f4:	0802a6c1 	.word	0x0802a6c1
 802a6f8:	0802a6c1 	.word	0x0802a6c1
 802a6fc:	0802a6c1 	.word	0x0802a6c1
 802a700:	0802a6c1 	.word	0x0802a6c1
 802a704:	0802a845 	.word	0x0802a845
 802a708:	0802a76f 	.word	0x0802a76f
 802a70c:	0802a7ff 	.word	0x0802a7ff
 802a710:	0802a6c1 	.word	0x0802a6c1
 802a714:	0802a6c1 	.word	0x0802a6c1
 802a718:	0802a867 	.word	0x0802a867
 802a71c:	0802a6c1 	.word	0x0802a6c1
 802a720:	0802a76f 	.word	0x0802a76f
 802a724:	0802a6c1 	.word	0x0802a6c1
 802a728:	0802a6c1 	.word	0x0802a6c1
 802a72c:	0802a807 	.word	0x0802a807
 802a730:	6833      	ldr	r3, [r6, #0]
 802a732:	1d1a      	adds	r2, r3, #4
 802a734:	681b      	ldr	r3, [r3, #0]
 802a736:	6032      	str	r2, [r6, #0]
 802a738:	f104 0642 	add.w	r6, r4, #66	@ 0x42
 802a73c:	f884 3042 	strb.w	r3, [r4, #66]	@ 0x42
 802a740:	2301      	movs	r3, #1
 802a742:	e09d      	b.n	802a880 <_printf_i+0x1e8>
 802a744:	6833      	ldr	r3, [r6, #0]
 802a746:	6820      	ldr	r0, [r4, #0]
 802a748:	1d19      	adds	r1, r3, #4
 802a74a:	6031      	str	r1, [r6, #0]
 802a74c:	0606      	lsls	r6, r0, #24
 802a74e:	d501      	bpl.n	802a754 <_printf_i+0xbc>
 802a750:	681d      	ldr	r5, [r3, #0]
 802a752:	e003      	b.n	802a75c <_printf_i+0xc4>
 802a754:	0645      	lsls	r5, r0, #25
 802a756:	d5fb      	bpl.n	802a750 <_printf_i+0xb8>
 802a758:	f9b3 5000 	ldrsh.w	r5, [r3]
 802a75c:	2d00      	cmp	r5, #0
 802a75e:	da03      	bge.n	802a768 <_printf_i+0xd0>
 802a760:	232d      	movs	r3, #45	@ 0x2d
 802a762:	426d      	negs	r5, r5
 802a764:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 802a768:	4859      	ldr	r0, [pc, #356]	@ (802a8d0 <_printf_i+0x238>)
 802a76a:	230a      	movs	r3, #10
 802a76c:	e011      	b.n	802a792 <_printf_i+0xfa>
 802a76e:	6821      	ldr	r1, [r4, #0]
 802a770:	6833      	ldr	r3, [r6, #0]
 802a772:	0608      	lsls	r0, r1, #24
 802a774:	f853 5b04 	ldr.w	r5, [r3], #4
 802a778:	d402      	bmi.n	802a780 <_printf_i+0xe8>
 802a77a:	0649      	lsls	r1, r1, #25
 802a77c:	bf48      	it	mi
 802a77e:	b2ad      	uxthmi	r5, r5
 802a780:	2f6f      	cmp	r7, #111	@ 0x6f
 802a782:	4853      	ldr	r0, [pc, #332]	@ (802a8d0 <_printf_i+0x238>)
 802a784:	6033      	str	r3, [r6, #0]
 802a786:	bf14      	ite	ne
 802a788:	230a      	movne	r3, #10
 802a78a:	2308      	moveq	r3, #8
 802a78c:	2100      	movs	r1, #0
 802a78e:	f884 1043 	strb.w	r1, [r4, #67]	@ 0x43
 802a792:	6866      	ldr	r6, [r4, #4]
 802a794:	60a6      	str	r6, [r4, #8]
 802a796:	2e00      	cmp	r6, #0
 802a798:	bfa2      	ittt	ge
 802a79a:	6821      	ldrge	r1, [r4, #0]
 802a79c:	f021 0104 	bicge.w	r1, r1, #4
 802a7a0:	6021      	strge	r1, [r4, #0]
 802a7a2:	b90d      	cbnz	r5, 802a7a8 <_printf_i+0x110>
 802a7a4:	2e00      	cmp	r6, #0
 802a7a6:	d04b      	beq.n	802a840 <_printf_i+0x1a8>
 802a7a8:	4616      	mov	r6, r2
 802a7aa:	fbb5 f1f3 	udiv	r1, r5, r3
 802a7ae:	fb03 5711 	mls	r7, r3, r1, r5
 802a7b2:	5dc7      	ldrb	r7, [r0, r7]
 802a7b4:	f806 7d01 	strb.w	r7, [r6, #-1]!
 802a7b8:	462f      	mov	r7, r5
 802a7ba:	42bb      	cmp	r3, r7
 802a7bc:	460d      	mov	r5, r1
 802a7be:	d9f4      	bls.n	802a7aa <_printf_i+0x112>
 802a7c0:	2b08      	cmp	r3, #8
 802a7c2:	d10b      	bne.n	802a7dc <_printf_i+0x144>
 802a7c4:	6823      	ldr	r3, [r4, #0]
 802a7c6:	07df      	lsls	r7, r3, #31
 802a7c8:	d508      	bpl.n	802a7dc <_printf_i+0x144>
 802a7ca:	6923      	ldr	r3, [r4, #16]
 802a7cc:	6861      	ldr	r1, [r4, #4]
 802a7ce:	4299      	cmp	r1, r3
 802a7d0:	bfde      	ittt	le
 802a7d2:	2330      	movle	r3, #48	@ 0x30
 802a7d4:	f806 3c01 	strble.w	r3, [r6, #-1]
 802a7d8:	f106 36ff 	addle.w	r6, r6, #4294967295	@ 0xffffffff
 802a7dc:	1b92      	subs	r2, r2, r6
 802a7de:	6122      	str	r2, [r4, #16]
 802a7e0:	f8cd a000 	str.w	sl, [sp]
 802a7e4:	464b      	mov	r3, r9
 802a7e6:	aa03      	add	r2, sp, #12
 802a7e8:	4621      	mov	r1, r4
 802a7ea:	4640      	mov	r0, r8
 802a7ec:	f7ff fee6 	bl	802a5bc <_printf_common>
 802a7f0:	3001      	adds	r0, #1
 802a7f2:	d14a      	bne.n	802a88a <_printf_i+0x1f2>
 802a7f4:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802a7f8:	b004      	add	sp, #16
 802a7fa:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802a7fe:	6823      	ldr	r3, [r4, #0]
 802a800:	f043 0320 	orr.w	r3, r3, #32
 802a804:	6023      	str	r3, [r4, #0]
 802a806:	4833      	ldr	r0, [pc, #204]	@ (802a8d4 <_printf_i+0x23c>)
 802a808:	2778      	movs	r7, #120	@ 0x78
 802a80a:	f884 7045 	strb.w	r7, [r4, #69]	@ 0x45
 802a80e:	6823      	ldr	r3, [r4, #0]
 802a810:	6831      	ldr	r1, [r6, #0]
 802a812:	061f      	lsls	r7, r3, #24
 802a814:	f851 5b04 	ldr.w	r5, [r1], #4
 802a818:	d402      	bmi.n	802a820 <_printf_i+0x188>
 802a81a:	065f      	lsls	r7, r3, #25
 802a81c:	bf48      	it	mi
 802a81e:	b2ad      	uxthmi	r5, r5
 802a820:	6031      	str	r1, [r6, #0]
 802a822:	07d9      	lsls	r1, r3, #31
 802a824:	bf44      	itt	mi
 802a826:	f043 0320 	orrmi.w	r3, r3, #32
 802a82a:	6023      	strmi	r3, [r4, #0]
 802a82c:	b11d      	cbz	r5, 802a836 <_printf_i+0x19e>
 802a82e:	2310      	movs	r3, #16
 802a830:	e7ac      	b.n	802a78c <_printf_i+0xf4>
 802a832:	4827      	ldr	r0, [pc, #156]	@ (802a8d0 <_printf_i+0x238>)
 802a834:	e7e9      	b.n	802a80a <_printf_i+0x172>
 802a836:	6823      	ldr	r3, [r4, #0]
 802a838:	f023 0320 	bic.w	r3, r3, #32
 802a83c:	6023      	str	r3, [r4, #0]
 802a83e:	e7f6      	b.n	802a82e <_printf_i+0x196>
 802a840:	4616      	mov	r6, r2
 802a842:	e7bd      	b.n	802a7c0 <_printf_i+0x128>
 802a844:	6833      	ldr	r3, [r6, #0]
 802a846:	6825      	ldr	r5, [r4, #0]
 802a848:	6961      	ldr	r1, [r4, #20]
 802a84a:	1d18      	adds	r0, r3, #4
 802a84c:	6030      	str	r0, [r6, #0]
 802a84e:	062e      	lsls	r6, r5, #24
 802a850:	681b      	ldr	r3, [r3, #0]
 802a852:	d501      	bpl.n	802a858 <_printf_i+0x1c0>
 802a854:	6019      	str	r1, [r3, #0]
 802a856:	e002      	b.n	802a85e <_printf_i+0x1c6>
 802a858:	0668      	lsls	r0, r5, #25
 802a85a:	d5fb      	bpl.n	802a854 <_printf_i+0x1bc>
 802a85c:	8019      	strh	r1, [r3, #0]
 802a85e:	2300      	movs	r3, #0
 802a860:	6123      	str	r3, [r4, #16]
 802a862:	4616      	mov	r6, r2
 802a864:	e7bc      	b.n	802a7e0 <_printf_i+0x148>
 802a866:	6833      	ldr	r3, [r6, #0]
 802a868:	1d1a      	adds	r2, r3, #4
 802a86a:	6032      	str	r2, [r6, #0]
 802a86c:	681e      	ldr	r6, [r3, #0]
 802a86e:	6862      	ldr	r2, [r4, #4]
 802a870:	2100      	movs	r1, #0
 802a872:	4630      	mov	r0, r6
 802a874:	f7d5 fd44 	bl	8000300 <memchr>
 802a878:	b108      	cbz	r0, 802a87e <_printf_i+0x1e6>
 802a87a:	1b80      	subs	r0, r0, r6
 802a87c:	6060      	str	r0, [r4, #4]
 802a87e:	6863      	ldr	r3, [r4, #4]
 802a880:	6123      	str	r3, [r4, #16]
 802a882:	2300      	movs	r3, #0
 802a884:	f884 3043 	strb.w	r3, [r4, #67]	@ 0x43
 802a888:	e7aa      	b.n	802a7e0 <_printf_i+0x148>
 802a88a:	6923      	ldr	r3, [r4, #16]
 802a88c:	4632      	mov	r2, r6
 802a88e:	4649      	mov	r1, r9
 802a890:	4640      	mov	r0, r8
 802a892:	47d0      	blx	sl
 802a894:	3001      	adds	r0, #1
 802a896:	d0ad      	beq.n	802a7f4 <_printf_i+0x15c>
 802a898:	6823      	ldr	r3, [r4, #0]
 802a89a:	079b      	lsls	r3, r3, #30
 802a89c:	d413      	bmi.n	802a8c6 <_printf_i+0x22e>
 802a89e:	68e0      	ldr	r0, [r4, #12]
 802a8a0:	9b03      	ldr	r3, [sp, #12]
 802a8a2:	4298      	cmp	r0, r3
 802a8a4:	bfb8      	it	lt
 802a8a6:	4618      	movlt	r0, r3
 802a8a8:	e7a6      	b.n	802a7f8 <_printf_i+0x160>
 802a8aa:	2301      	movs	r3, #1
 802a8ac:	4632      	mov	r2, r6
 802a8ae:	4649      	mov	r1, r9
 802a8b0:	4640      	mov	r0, r8
 802a8b2:	47d0      	blx	sl
 802a8b4:	3001      	adds	r0, #1
 802a8b6:	d09d      	beq.n	802a7f4 <_printf_i+0x15c>
 802a8b8:	3501      	adds	r5, #1
 802a8ba:	68e3      	ldr	r3, [r4, #12]
 802a8bc:	9903      	ldr	r1, [sp, #12]
 802a8be:	1a5b      	subs	r3, r3, r1
 802a8c0:	42ab      	cmp	r3, r5
 802a8c2:	dcf2      	bgt.n	802a8aa <_printf_i+0x212>
 802a8c4:	e7eb      	b.n	802a89e <_printf_i+0x206>
 802a8c6:	2500      	movs	r5, #0
 802a8c8:	f104 0619 	add.w	r6, r4, #25
 802a8cc:	e7f5      	b.n	802a8ba <_printf_i+0x222>
 802a8ce:	bf00      	nop
 802a8d0:	080320e3 	.word	0x080320e3
 802a8d4:	080320f4 	.word	0x080320f4

0802a8d8 <std>:
 802a8d8:	2300      	movs	r3, #0
 802a8da:	b510      	push	{r4, lr}
 802a8dc:	4604      	mov	r4, r0
 802a8de:	e9c0 3300 	strd	r3, r3, [r0]
 802a8e2:	e9c0 3304 	strd	r3, r3, [r0, #16]
 802a8e6:	6083      	str	r3, [r0, #8]
 802a8e8:	8181      	strh	r1, [r0, #12]
 802a8ea:	6643      	str	r3, [r0, #100]	@ 0x64
 802a8ec:	81c2      	strh	r2, [r0, #14]
 802a8ee:	6183      	str	r3, [r0, #24]
 802a8f0:	4619      	mov	r1, r3
 802a8f2:	2208      	movs	r2, #8
 802a8f4:	305c      	adds	r0, #92	@ 0x5c
 802a8f6:	f000 fa43 	bl	802ad80 <memset>
 802a8fa:	4b0d      	ldr	r3, [pc, #52]	@ (802a930 <std+0x58>)
 802a8fc:	6263      	str	r3, [r4, #36]	@ 0x24
 802a8fe:	4b0d      	ldr	r3, [pc, #52]	@ (802a934 <std+0x5c>)
 802a900:	62a3      	str	r3, [r4, #40]	@ 0x28
 802a902:	4b0d      	ldr	r3, [pc, #52]	@ (802a938 <std+0x60>)
 802a904:	62e3      	str	r3, [r4, #44]	@ 0x2c
 802a906:	4b0d      	ldr	r3, [pc, #52]	@ (802a93c <std+0x64>)
 802a908:	6323      	str	r3, [r4, #48]	@ 0x30
 802a90a:	4b0d      	ldr	r3, [pc, #52]	@ (802a940 <std+0x68>)
 802a90c:	6224      	str	r4, [r4, #32]
 802a90e:	429c      	cmp	r4, r3
 802a910:	d006      	beq.n	802a920 <std+0x48>
 802a912:	f103 0268 	add.w	r2, r3, #104	@ 0x68
 802a916:	4294      	cmp	r4, r2
 802a918:	d002      	beq.n	802a920 <std+0x48>
 802a91a:	33d0      	adds	r3, #208	@ 0xd0
 802a91c:	429c      	cmp	r4, r3
 802a91e:	d105      	bne.n	802a92c <std+0x54>
 802a920:	f104 0058 	add.w	r0, r4, #88	@ 0x58
 802a924:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a928:	f000 bb1e 	b.w	802af68 <__retarget_lock_init_recursive>
 802a92c:	bd10      	pop	{r4, pc}
 802a92e:	bf00      	nop
 802a930:	0802ab7d 	.word	0x0802ab7d
 802a934:	0802ab9f 	.word	0x0802ab9f
 802a938:	0802abd7 	.word	0x0802abd7
 802a93c:	0802abfb 	.word	0x0802abfb
 802a940:	2402b164 	.word	0x2402b164

0802a944 <stdio_exit_handler>:
 802a944:	4a02      	ldr	r2, [pc, #8]	@ (802a950 <stdio_exit_handler+0xc>)
 802a946:	4903      	ldr	r1, [pc, #12]	@ (802a954 <stdio_exit_handler+0x10>)
 802a948:	4803      	ldr	r0, [pc, #12]	@ (802a958 <stdio_exit_handler+0x14>)
 802a94a:	f000 b869 	b.w	802aa20 <_fwalk_sglue>
 802a94e:	bf00      	nop
 802a950:	2400005c 	.word	0x2400005c
 802a954:	0802d28d 	.word	0x0802d28d
 802a958:	240001d8 	.word	0x240001d8

0802a95c <cleanup_stdio>:
 802a95c:	6841      	ldr	r1, [r0, #4]
 802a95e:	4b0c      	ldr	r3, [pc, #48]	@ (802a990 <cleanup_stdio+0x34>)
 802a960:	4299      	cmp	r1, r3
 802a962:	b510      	push	{r4, lr}
 802a964:	4604      	mov	r4, r0
 802a966:	d001      	beq.n	802a96c <cleanup_stdio+0x10>
 802a968:	f002 fc90 	bl	802d28c <_fflush_r>
 802a96c:	68a1      	ldr	r1, [r4, #8]
 802a96e:	4b09      	ldr	r3, [pc, #36]	@ (802a994 <cleanup_stdio+0x38>)
 802a970:	4299      	cmp	r1, r3
 802a972:	d002      	beq.n	802a97a <cleanup_stdio+0x1e>
 802a974:	4620      	mov	r0, r4
 802a976:	f002 fc89 	bl	802d28c <_fflush_r>
 802a97a:	68e1      	ldr	r1, [r4, #12]
 802a97c:	4b06      	ldr	r3, [pc, #24]	@ (802a998 <cleanup_stdio+0x3c>)
 802a97e:	4299      	cmp	r1, r3
 802a980:	d004      	beq.n	802a98c <cleanup_stdio+0x30>
 802a982:	4620      	mov	r0, r4
 802a984:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a988:	f002 bc80 	b.w	802d28c <_fflush_r>
 802a98c:	bd10      	pop	{r4, pc}
 802a98e:	bf00      	nop
 802a990:	2402b164 	.word	0x2402b164
 802a994:	2402b1cc 	.word	0x2402b1cc
 802a998:	2402b234 	.word	0x2402b234

0802a99c <global_stdio_init.part.0>:
 802a99c:	b510      	push	{r4, lr}
 802a99e:	4b0b      	ldr	r3, [pc, #44]	@ (802a9cc <global_stdio_init.part.0+0x30>)
 802a9a0:	4c0b      	ldr	r4, [pc, #44]	@ (802a9d0 <global_stdio_init.part.0+0x34>)
 802a9a2:	4a0c      	ldr	r2, [pc, #48]	@ (802a9d4 <global_stdio_init.part.0+0x38>)
 802a9a4:	601a      	str	r2, [r3, #0]
 802a9a6:	4620      	mov	r0, r4
 802a9a8:	2200      	movs	r2, #0
 802a9aa:	2104      	movs	r1, #4
 802a9ac:	f7ff ff94 	bl	802a8d8 <std>
 802a9b0:	f104 0068 	add.w	r0, r4, #104	@ 0x68
 802a9b4:	2201      	movs	r2, #1
 802a9b6:	2109      	movs	r1, #9
 802a9b8:	f7ff ff8e 	bl	802a8d8 <std>
 802a9bc:	f104 00d0 	add.w	r0, r4, #208	@ 0xd0
 802a9c0:	2202      	movs	r2, #2
 802a9c2:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802a9c6:	2112      	movs	r1, #18
 802a9c8:	f7ff bf86 	b.w	802a8d8 <std>
 802a9cc:	2402b29c 	.word	0x2402b29c
 802a9d0:	2402b164 	.word	0x2402b164
 802a9d4:	0802a945 	.word	0x0802a945

0802a9d8 <__sfp_lock_acquire>:
 802a9d8:	4801      	ldr	r0, [pc, #4]	@ (802a9e0 <__sfp_lock_acquire+0x8>)
 802a9da:	f000 bac6 	b.w	802af6a <__retarget_lock_acquire_recursive>
 802a9de:	bf00      	nop
 802a9e0:	2402b2a5 	.word	0x2402b2a5

0802a9e4 <__sfp_lock_release>:
 802a9e4:	4801      	ldr	r0, [pc, #4]	@ (802a9ec <__sfp_lock_release+0x8>)
 802a9e6:	f000 bac1 	b.w	802af6c <__retarget_lock_release_recursive>
 802a9ea:	bf00      	nop
 802a9ec:	2402b2a5 	.word	0x2402b2a5

0802a9f0 <__sinit>:
 802a9f0:	b510      	push	{r4, lr}
 802a9f2:	4604      	mov	r4, r0
 802a9f4:	f7ff fff0 	bl	802a9d8 <__sfp_lock_acquire>
 802a9f8:	6a23      	ldr	r3, [r4, #32]
 802a9fa:	b11b      	cbz	r3, 802aa04 <__sinit+0x14>
 802a9fc:	e8bd 4010 	ldmia.w	sp!, {r4, lr}
 802aa00:	f7ff bff0 	b.w	802a9e4 <__sfp_lock_release>
 802aa04:	4b04      	ldr	r3, [pc, #16]	@ (802aa18 <__sinit+0x28>)
 802aa06:	6223      	str	r3, [r4, #32]
 802aa08:	4b04      	ldr	r3, [pc, #16]	@ (802aa1c <__sinit+0x2c>)
 802aa0a:	681b      	ldr	r3, [r3, #0]
 802aa0c:	2b00      	cmp	r3, #0
 802aa0e:	d1f5      	bne.n	802a9fc <__sinit+0xc>
 802aa10:	f7ff ffc4 	bl	802a99c <global_stdio_init.part.0>
 802aa14:	e7f2      	b.n	802a9fc <__sinit+0xc>
 802aa16:	bf00      	nop
 802aa18:	0802a95d 	.word	0x0802a95d
 802aa1c:	2402b29c 	.word	0x2402b29c

0802aa20 <_fwalk_sglue>:
 802aa20:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802aa24:	4607      	mov	r7, r0
 802aa26:	4688      	mov	r8, r1
 802aa28:	4614      	mov	r4, r2
 802aa2a:	2600      	movs	r6, #0
 802aa2c:	e9d4 9501 	ldrd	r9, r5, [r4, #4]
 802aa30:	f1b9 0901 	subs.w	r9, r9, #1
 802aa34:	d505      	bpl.n	802aa42 <_fwalk_sglue+0x22>
 802aa36:	6824      	ldr	r4, [r4, #0]
 802aa38:	2c00      	cmp	r4, #0
 802aa3a:	d1f7      	bne.n	802aa2c <_fwalk_sglue+0xc>
 802aa3c:	4630      	mov	r0, r6
 802aa3e:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802aa42:	89ab      	ldrh	r3, [r5, #12]
 802aa44:	2b01      	cmp	r3, #1
 802aa46:	d907      	bls.n	802aa58 <_fwalk_sglue+0x38>
 802aa48:	f9b5 300e 	ldrsh.w	r3, [r5, #14]
 802aa4c:	3301      	adds	r3, #1
 802aa4e:	d003      	beq.n	802aa58 <_fwalk_sglue+0x38>
 802aa50:	4629      	mov	r1, r5
 802aa52:	4638      	mov	r0, r7
 802aa54:	47c0      	blx	r8
 802aa56:	4306      	orrs	r6, r0
 802aa58:	3568      	adds	r5, #104	@ 0x68
 802aa5a:	e7e9      	b.n	802aa30 <_fwalk_sglue+0x10>

0802aa5c <iprintf>:
 802aa5c:	b40f      	push	{r0, r1, r2, r3}
 802aa5e:	b507      	push	{r0, r1, r2, lr}
 802aa60:	4906      	ldr	r1, [pc, #24]	@ (802aa7c <iprintf+0x20>)
 802aa62:	ab04      	add	r3, sp, #16
 802aa64:	6808      	ldr	r0, [r1, #0]
 802aa66:	f853 2b04 	ldr.w	r2, [r3], #4
 802aa6a:	6881      	ldr	r1, [r0, #8]
 802aa6c:	9301      	str	r3, [sp, #4]
 802aa6e:	f002 fa71 	bl	802cf54 <_vfiprintf_r>
 802aa72:	b003      	add	sp, #12
 802aa74:	f85d eb04 	ldr.w	lr, [sp], #4
 802aa78:	b004      	add	sp, #16
 802aa7a:	4770      	bx	lr
 802aa7c:	240001d4 	.word	0x240001d4

0802aa80 <_puts_r>:
 802aa80:	6a03      	ldr	r3, [r0, #32]
 802aa82:	b570      	push	{r4, r5, r6, lr}
 802aa84:	6884      	ldr	r4, [r0, #8]
 802aa86:	4605      	mov	r5, r0
 802aa88:	460e      	mov	r6, r1
 802aa8a:	b90b      	cbnz	r3, 802aa90 <_puts_r+0x10>
 802aa8c:	f7ff ffb0 	bl	802a9f0 <__sinit>
 802aa90:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802aa92:	07db      	lsls	r3, r3, #31
 802aa94:	d405      	bmi.n	802aaa2 <_puts_r+0x22>
 802aa96:	89a3      	ldrh	r3, [r4, #12]
 802aa98:	0598      	lsls	r0, r3, #22
 802aa9a:	d402      	bmi.n	802aaa2 <_puts_r+0x22>
 802aa9c:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802aa9e:	f000 fa64 	bl	802af6a <__retarget_lock_acquire_recursive>
 802aaa2:	89a3      	ldrh	r3, [r4, #12]
 802aaa4:	0719      	lsls	r1, r3, #28
 802aaa6:	d502      	bpl.n	802aaae <_puts_r+0x2e>
 802aaa8:	6923      	ldr	r3, [r4, #16]
 802aaaa:	2b00      	cmp	r3, #0
 802aaac:	d135      	bne.n	802ab1a <_puts_r+0x9a>
 802aaae:	4621      	mov	r1, r4
 802aab0:	4628      	mov	r0, r5
 802aab2:	f000 f8e5 	bl	802ac80 <__swsetup_r>
 802aab6:	b380      	cbz	r0, 802ab1a <_puts_r+0x9a>
 802aab8:	f04f 35ff 	mov.w	r5, #4294967295	@ 0xffffffff
 802aabc:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802aabe:	07da      	lsls	r2, r3, #31
 802aac0:	d405      	bmi.n	802aace <_puts_r+0x4e>
 802aac2:	89a3      	ldrh	r3, [r4, #12]
 802aac4:	059b      	lsls	r3, r3, #22
 802aac6:	d402      	bmi.n	802aace <_puts_r+0x4e>
 802aac8:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802aaca:	f000 fa4f 	bl	802af6c <__retarget_lock_release_recursive>
 802aace:	4628      	mov	r0, r5
 802aad0:	bd70      	pop	{r4, r5, r6, pc}
 802aad2:	2b00      	cmp	r3, #0
 802aad4:	da04      	bge.n	802aae0 <_puts_r+0x60>
 802aad6:	69a2      	ldr	r2, [r4, #24]
 802aad8:	429a      	cmp	r2, r3
 802aada:	dc17      	bgt.n	802ab0c <_puts_r+0x8c>
 802aadc:	290a      	cmp	r1, #10
 802aade:	d015      	beq.n	802ab0c <_puts_r+0x8c>
 802aae0:	6823      	ldr	r3, [r4, #0]
 802aae2:	1c5a      	adds	r2, r3, #1
 802aae4:	6022      	str	r2, [r4, #0]
 802aae6:	7019      	strb	r1, [r3, #0]
 802aae8:	68a3      	ldr	r3, [r4, #8]
 802aaea:	f816 1f01 	ldrb.w	r1, [r6, #1]!
 802aaee:	3b01      	subs	r3, #1
 802aaf0:	60a3      	str	r3, [r4, #8]
 802aaf2:	2900      	cmp	r1, #0
 802aaf4:	d1ed      	bne.n	802aad2 <_puts_r+0x52>
 802aaf6:	2b00      	cmp	r3, #0
 802aaf8:	da11      	bge.n	802ab1e <_puts_r+0x9e>
 802aafa:	4622      	mov	r2, r4
 802aafc:	210a      	movs	r1, #10
 802aafe:	4628      	mov	r0, r5
 802ab00:	f000 f87f 	bl	802ac02 <__swbuf_r>
 802ab04:	3001      	adds	r0, #1
 802ab06:	d0d7      	beq.n	802aab8 <_puts_r+0x38>
 802ab08:	250a      	movs	r5, #10
 802ab0a:	e7d7      	b.n	802aabc <_puts_r+0x3c>
 802ab0c:	4622      	mov	r2, r4
 802ab0e:	4628      	mov	r0, r5
 802ab10:	f000 f877 	bl	802ac02 <__swbuf_r>
 802ab14:	3001      	adds	r0, #1
 802ab16:	d1e7      	bne.n	802aae8 <_puts_r+0x68>
 802ab18:	e7ce      	b.n	802aab8 <_puts_r+0x38>
 802ab1a:	3e01      	subs	r6, #1
 802ab1c:	e7e4      	b.n	802aae8 <_puts_r+0x68>
 802ab1e:	6823      	ldr	r3, [r4, #0]
 802ab20:	1c5a      	adds	r2, r3, #1
 802ab22:	6022      	str	r2, [r4, #0]
 802ab24:	220a      	movs	r2, #10
 802ab26:	701a      	strb	r2, [r3, #0]
 802ab28:	e7ee      	b.n	802ab08 <_puts_r+0x88>
	...

0802ab2c <puts>:
 802ab2c:	4b02      	ldr	r3, [pc, #8]	@ (802ab38 <puts+0xc>)
 802ab2e:	4601      	mov	r1, r0
 802ab30:	6818      	ldr	r0, [r3, #0]
 802ab32:	f7ff bfa5 	b.w	802aa80 <_puts_r>
 802ab36:	bf00      	nop
 802ab38:	240001d4 	.word	0x240001d4

0802ab3c <siprintf>:
 802ab3c:	b40e      	push	{r1, r2, r3}
 802ab3e:	b500      	push	{lr}
 802ab40:	b09c      	sub	sp, #112	@ 0x70
 802ab42:	ab1d      	add	r3, sp, #116	@ 0x74
 802ab44:	9002      	str	r0, [sp, #8]
 802ab46:	9006      	str	r0, [sp, #24]
 802ab48:	f06f 4100 	mvn.w	r1, #2147483648	@ 0x80000000
 802ab4c:	4809      	ldr	r0, [pc, #36]	@ (802ab74 <siprintf+0x38>)
 802ab4e:	9107      	str	r1, [sp, #28]
 802ab50:	9104      	str	r1, [sp, #16]
 802ab52:	4909      	ldr	r1, [pc, #36]	@ (802ab78 <siprintf+0x3c>)
 802ab54:	f853 2b04 	ldr.w	r2, [r3], #4
 802ab58:	9105      	str	r1, [sp, #20]
 802ab5a:	6800      	ldr	r0, [r0, #0]
 802ab5c:	9301      	str	r3, [sp, #4]
 802ab5e:	a902      	add	r1, sp, #8
 802ab60:	f002 f8d2 	bl	802cd08 <_svfiprintf_r>
 802ab64:	9b02      	ldr	r3, [sp, #8]
 802ab66:	2200      	movs	r2, #0
 802ab68:	701a      	strb	r2, [r3, #0]
 802ab6a:	b01c      	add	sp, #112	@ 0x70
 802ab6c:	f85d eb04 	ldr.w	lr, [sp], #4
 802ab70:	b003      	add	sp, #12
 802ab72:	4770      	bx	lr
 802ab74:	240001d4 	.word	0x240001d4
 802ab78:	ffff0208 	.word	0xffff0208

0802ab7c <__sread>:
 802ab7c:	b510      	push	{r4, lr}
 802ab7e:	460c      	mov	r4, r1
 802ab80:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802ab84:	f000 f992 	bl	802aeac <_read_r>
 802ab88:	2800      	cmp	r0, #0
 802ab8a:	bfab      	itete	ge
 802ab8c:	6d63      	ldrge	r3, [r4, #84]	@ 0x54
 802ab8e:	89a3      	ldrhlt	r3, [r4, #12]
 802ab90:	181b      	addge	r3, r3, r0
 802ab92:	f423 5380 	biclt.w	r3, r3, #4096	@ 0x1000
 802ab96:	bfac      	ite	ge
 802ab98:	6563      	strge	r3, [r4, #84]	@ 0x54
 802ab9a:	81a3      	strhlt	r3, [r4, #12]
 802ab9c:	bd10      	pop	{r4, pc}

0802ab9e <__swrite>:
 802ab9e:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802aba2:	461f      	mov	r7, r3
 802aba4:	898b      	ldrh	r3, [r1, #12]
 802aba6:	05db      	lsls	r3, r3, #23
 802aba8:	4605      	mov	r5, r0
 802abaa:	460c      	mov	r4, r1
 802abac:	4616      	mov	r6, r2
 802abae:	d505      	bpl.n	802abbc <__swrite+0x1e>
 802abb0:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802abb4:	2302      	movs	r3, #2
 802abb6:	2200      	movs	r2, #0
 802abb8:	f000 f966 	bl	802ae88 <_lseek_r>
 802abbc:	89a3      	ldrh	r3, [r4, #12]
 802abbe:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 802abc2:	f423 5380 	bic.w	r3, r3, #4096	@ 0x1000
 802abc6:	81a3      	strh	r3, [r4, #12]
 802abc8:	4632      	mov	r2, r6
 802abca:	463b      	mov	r3, r7
 802abcc:	4628      	mov	r0, r5
 802abce:	e8bd 41f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, lr}
 802abd2:	f000 b98d 	b.w	802aef0 <_write_r>

0802abd6 <__sseek>:
 802abd6:	b510      	push	{r4, lr}
 802abd8:	460c      	mov	r4, r1
 802abda:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802abde:	f000 f953 	bl	802ae88 <_lseek_r>
 802abe2:	1c43      	adds	r3, r0, #1
 802abe4:	89a3      	ldrh	r3, [r4, #12]
 802abe6:	bf15      	itete	ne
 802abe8:	6560      	strne	r0, [r4, #84]	@ 0x54
 802abea:	f423 5380 	biceq.w	r3, r3, #4096	@ 0x1000
 802abee:	f443 5380 	orrne.w	r3, r3, #4096	@ 0x1000
 802abf2:	81a3      	strheq	r3, [r4, #12]
 802abf4:	bf18      	it	ne
 802abf6:	81a3      	strhne	r3, [r4, #12]
 802abf8:	bd10      	pop	{r4, pc}

0802abfa <__sclose>:
 802abfa:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802abfe:	f000 b8dd 	b.w	802adbc <_close_r>

0802ac02 <__swbuf_r>:
 802ac02:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802ac04:	460e      	mov	r6, r1
 802ac06:	4614      	mov	r4, r2
 802ac08:	4605      	mov	r5, r0
 802ac0a:	b118      	cbz	r0, 802ac14 <__swbuf_r+0x12>
 802ac0c:	6a03      	ldr	r3, [r0, #32]
 802ac0e:	b90b      	cbnz	r3, 802ac14 <__swbuf_r+0x12>
 802ac10:	f7ff feee 	bl	802a9f0 <__sinit>
 802ac14:	69a3      	ldr	r3, [r4, #24]
 802ac16:	60a3      	str	r3, [r4, #8]
 802ac18:	89a3      	ldrh	r3, [r4, #12]
 802ac1a:	071a      	lsls	r2, r3, #28
 802ac1c:	d501      	bpl.n	802ac22 <__swbuf_r+0x20>
 802ac1e:	6923      	ldr	r3, [r4, #16]
 802ac20:	b943      	cbnz	r3, 802ac34 <__swbuf_r+0x32>
 802ac22:	4621      	mov	r1, r4
 802ac24:	4628      	mov	r0, r5
 802ac26:	f000 f82b 	bl	802ac80 <__swsetup_r>
 802ac2a:	b118      	cbz	r0, 802ac34 <__swbuf_r+0x32>
 802ac2c:	f04f 37ff 	mov.w	r7, #4294967295	@ 0xffffffff
 802ac30:	4638      	mov	r0, r7
 802ac32:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
 802ac34:	6823      	ldr	r3, [r4, #0]
 802ac36:	6922      	ldr	r2, [r4, #16]
 802ac38:	1a98      	subs	r0, r3, r2
 802ac3a:	6963      	ldr	r3, [r4, #20]
 802ac3c:	b2f6      	uxtb	r6, r6
 802ac3e:	4283      	cmp	r3, r0
 802ac40:	4637      	mov	r7, r6
 802ac42:	dc05      	bgt.n	802ac50 <__swbuf_r+0x4e>
 802ac44:	4621      	mov	r1, r4
 802ac46:	4628      	mov	r0, r5
 802ac48:	f002 fb20 	bl	802d28c <_fflush_r>
 802ac4c:	2800      	cmp	r0, #0
 802ac4e:	d1ed      	bne.n	802ac2c <__swbuf_r+0x2a>
 802ac50:	68a3      	ldr	r3, [r4, #8]
 802ac52:	3b01      	subs	r3, #1
 802ac54:	60a3      	str	r3, [r4, #8]
 802ac56:	6823      	ldr	r3, [r4, #0]
 802ac58:	1c5a      	adds	r2, r3, #1
 802ac5a:	6022      	str	r2, [r4, #0]
 802ac5c:	701e      	strb	r6, [r3, #0]
 802ac5e:	6962      	ldr	r2, [r4, #20]
 802ac60:	1c43      	adds	r3, r0, #1
 802ac62:	429a      	cmp	r2, r3
 802ac64:	d004      	beq.n	802ac70 <__swbuf_r+0x6e>
 802ac66:	89a3      	ldrh	r3, [r4, #12]
 802ac68:	07db      	lsls	r3, r3, #31
 802ac6a:	d5e1      	bpl.n	802ac30 <__swbuf_r+0x2e>
 802ac6c:	2e0a      	cmp	r6, #10
 802ac6e:	d1df      	bne.n	802ac30 <__swbuf_r+0x2e>
 802ac70:	4621      	mov	r1, r4
 802ac72:	4628      	mov	r0, r5
 802ac74:	f002 fb0a 	bl	802d28c <_fflush_r>
 802ac78:	2800      	cmp	r0, #0
 802ac7a:	d0d9      	beq.n	802ac30 <__swbuf_r+0x2e>
 802ac7c:	e7d6      	b.n	802ac2c <__swbuf_r+0x2a>
	...

0802ac80 <__swsetup_r>:
 802ac80:	b538      	push	{r3, r4, r5, lr}
 802ac82:	4b29      	ldr	r3, [pc, #164]	@ (802ad28 <__swsetup_r+0xa8>)
 802ac84:	4605      	mov	r5, r0
 802ac86:	6818      	ldr	r0, [r3, #0]
 802ac88:	460c      	mov	r4, r1
 802ac8a:	b118      	cbz	r0, 802ac94 <__swsetup_r+0x14>
 802ac8c:	6a03      	ldr	r3, [r0, #32]
 802ac8e:	b90b      	cbnz	r3, 802ac94 <__swsetup_r+0x14>
 802ac90:	f7ff feae 	bl	802a9f0 <__sinit>
 802ac94:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802ac98:	0719      	lsls	r1, r3, #28
 802ac9a:	d422      	bmi.n	802ace2 <__swsetup_r+0x62>
 802ac9c:	06da      	lsls	r2, r3, #27
 802ac9e:	d407      	bmi.n	802acb0 <__swsetup_r+0x30>
 802aca0:	2209      	movs	r2, #9
 802aca2:	602a      	str	r2, [r5, #0]
 802aca4:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802aca8:	81a3      	strh	r3, [r4, #12]
 802acaa:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802acae:	e033      	b.n	802ad18 <__swsetup_r+0x98>
 802acb0:	0758      	lsls	r0, r3, #29
 802acb2:	d512      	bpl.n	802acda <__swsetup_r+0x5a>
 802acb4:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802acb6:	b141      	cbz	r1, 802acca <__swsetup_r+0x4a>
 802acb8:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 802acbc:	4299      	cmp	r1, r3
 802acbe:	d002      	beq.n	802acc6 <__swsetup_r+0x46>
 802acc0:	4628      	mov	r0, r5
 802acc2:	f000 ff6b 	bl	802bb9c <_free_r>
 802acc6:	2300      	movs	r3, #0
 802acc8:	6363      	str	r3, [r4, #52]	@ 0x34
 802acca:	89a3      	ldrh	r3, [r4, #12]
 802accc:	f023 0324 	bic.w	r3, r3, #36	@ 0x24
 802acd0:	81a3      	strh	r3, [r4, #12]
 802acd2:	2300      	movs	r3, #0
 802acd4:	6063      	str	r3, [r4, #4]
 802acd6:	6923      	ldr	r3, [r4, #16]
 802acd8:	6023      	str	r3, [r4, #0]
 802acda:	89a3      	ldrh	r3, [r4, #12]
 802acdc:	f043 0308 	orr.w	r3, r3, #8
 802ace0:	81a3      	strh	r3, [r4, #12]
 802ace2:	6923      	ldr	r3, [r4, #16]
 802ace4:	b94b      	cbnz	r3, 802acfa <__swsetup_r+0x7a>
 802ace6:	89a3      	ldrh	r3, [r4, #12]
 802ace8:	f403 7320 	and.w	r3, r3, #640	@ 0x280
 802acec:	f5b3 7f00 	cmp.w	r3, #512	@ 0x200
 802acf0:	d003      	beq.n	802acfa <__swsetup_r+0x7a>
 802acf2:	4621      	mov	r1, r4
 802acf4:	4628      	mov	r0, r5
 802acf6:	f002 fb29 	bl	802d34c <__smakebuf_r>
 802acfa:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802acfe:	f013 0201 	ands.w	r2, r3, #1
 802ad02:	d00a      	beq.n	802ad1a <__swsetup_r+0x9a>
 802ad04:	2200      	movs	r2, #0
 802ad06:	60a2      	str	r2, [r4, #8]
 802ad08:	6962      	ldr	r2, [r4, #20]
 802ad0a:	4252      	negs	r2, r2
 802ad0c:	61a2      	str	r2, [r4, #24]
 802ad0e:	6922      	ldr	r2, [r4, #16]
 802ad10:	b942      	cbnz	r2, 802ad24 <__swsetup_r+0xa4>
 802ad12:	f013 0080 	ands.w	r0, r3, #128	@ 0x80
 802ad16:	d1c5      	bne.n	802aca4 <__swsetup_r+0x24>
 802ad18:	bd38      	pop	{r3, r4, r5, pc}
 802ad1a:	0799      	lsls	r1, r3, #30
 802ad1c:	bf58      	it	pl
 802ad1e:	6962      	ldrpl	r2, [r4, #20]
 802ad20:	60a2      	str	r2, [r4, #8]
 802ad22:	e7f4      	b.n	802ad0e <__swsetup_r+0x8e>
 802ad24:	2000      	movs	r0, #0
 802ad26:	e7f7      	b.n	802ad18 <__swsetup_r+0x98>
 802ad28:	240001d4 	.word	0x240001d4

0802ad2c <memcmp>:
 802ad2c:	b510      	push	{r4, lr}
 802ad2e:	3901      	subs	r1, #1
 802ad30:	4402      	add	r2, r0
 802ad32:	4290      	cmp	r0, r2
 802ad34:	d101      	bne.n	802ad3a <memcmp+0xe>
 802ad36:	2000      	movs	r0, #0
 802ad38:	e005      	b.n	802ad46 <memcmp+0x1a>
 802ad3a:	7803      	ldrb	r3, [r0, #0]
 802ad3c:	f811 4f01 	ldrb.w	r4, [r1, #1]!
 802ad40:	42a3      	cmp	r3, r4
 802ad42:	d001      	beq.n	802ad48 <memcmp+0x1c>
 802ad44:	1b18      	subs	r0, r3, r4
 802ad46:	bd10      	pop	{r4, pc}
 802ad48:	3001      	adds	r0, #1
 802ad4a:	e7f2      	b.n	802ad32 <memcmp+0x6>

0802ad4c <memmove>:
 802ad4c:	4288      	cmp	r0, r1
 802ad4e:	b510      	push	{r4, lr}
 802ad50:	eb01 0402 	add.w	r4, r1, r2
 802ad54:	d902      	bls.n	802ad5c <memmove+0x10>
 802ad56:	4284      	cmp	r4, r0
 802ad58:	4623      	mov	r3, r4
 802ad5a:	d807      	bhi.n	802ad6c <memmove+0x20>
 802ad5c:	1e43      	subs	r3, r0, #1
 802ad5e:	42a1      	cmp	r1, r4
 802ad60:	d008      	beq.n	802ad74 <memmove+0x28>
 802ad62:	f811 2b01 	ldrb.w	r2, [r1], #1
 802ad66:	f803 2f01 	strb.w	r2, [r3, #1]!
 802ad6a:	e7f8      	b.n	802ad5e <memmove+0x12>
 802ad6c:	4402      	add	r2, r0
 802ad6e:	4601      	mov	r1, r0
 802ad70:	428a      	cmp	r2, r1
 802ad72:	d100      	bne.n	802ad76 <memmove+0x2a>
 802ad74:	bd10      	pop	{r4, pc}
 802ad76:	f813 4d01 	ldrb.w	r4, [r3, #-1]!
 802ad7a:	f802 4d01 	strb.w	r4, [r2, #-1]!
 802ad7e:	e7f7      	b.n	802ad70 <memmove+0x24>

0802ad80 <memset>:
 802ad80:	4402      	add	r2, r0
 802ad82:	4603      	mov	r3, r0
 802ad84:	4293      	cmp	r3, r2
 802ad86:	d100      	bne.n	802ad8a <memset+0xa>
 802ad88:	4770      	bx	lr
 802ad8a:	f803 1b01 	strb.w	r1, [r3], #1
 802ad8e:	e7f9      	b.n	802ad84 <memset+0x4>

0802ad90 <strncmp>:
 802ad90:	b510      	push	{r4, lr}
 802ad92:	b16a      	cbz	r2, 802adb0 <strncmp+0x20>
 802ad94:	3901      	subs	r1, #1
 802ad96:	1884      	adds	r4, r0, r2
 802ad98:	f810 2b01 	ldrb.w	r2, [r0], #1
 802ad9c:	f811 3f01 	ldrb.w	r3, [r1, #1]!
 802ada0:	429a      	cmp	r2, r3
 802ada2:	d103      	bne.n	802adac <strncmp+0x1c>
 802ada4:	42a0      	cmp	r0, r4
 802ada6:	d001      	beq.n	802adac <strncmp+0x1c>
 802ada8:	2a00      	cmp	r2, #0
 802adaa:	d1f5      	bne.n	802ad98 <strncmp+0x8>
 802adac:	1ad0      	subs	r0, r2, r3
 802adae:	bd10      	pop	{r4, pc}
 802adb0:	4610      	mov	r0, r2
 802adb2:	e7fc      	b.n	802adae <strncmp+0x1e>

0802adb4 <_localeconv_r>:
 802adb4:	4800      	ldr	r0, [pc, #0]	@ (802adb8 <_localeconv_r+0x4>)
 802adb6:	4770      	bx	lr
 802adb8:	24000158 	.word	0x24000158

0802adbc <_close_r>:
 802adbc:	b538      	push	{r3, r4, r5, lr}
 802adbe:	4d06      	ldr	r5, [pc, #24]	@ (802add8 <_close_r+0x1c>)
 802adc0:	2300      	movs	r3, #0
 802adc2:	4604      	mov	r4, r0
 802adc4:	4608      	mov	r0, r1
 802adc6:	602b      	str	r3, [r5, #0]
 802adc8:	f7d9 fb1a 	bl	8004400 <_close>
 802adcc:	1c43      	adds	r3, r0, #1
 802adce:	d102      	bne.n	802add6 <_close_r+0x1a>
 802add0:	682b      	ldr	r3, [r5, #0]
 802add2:	b103      	cbz	r3, 802add6 <_close_r+0x1a>
 802add4:	6023      	str	r3, [r4, #0]
 802add6:	bd38      	pop	{r3, r4, r5, pc}
 802add8:	2402b2a0 	.word	0x2402b2a0

0802addc <_reclaim_reent>:
 802addc:	4b29      	ldr	r3, [pc, #164]	@ (802ae84 <_reclaim_reent+0xa8>)
 802adde:	681b      	ldr	r3, [r3, #0]
 802ade0:	4283      	cmp	r3, r0
 802ade2:	b570      	push	{r4, r5, r6, lr}
 802ade4:	4604      	mov	r4, r0
 802ade6:	d04b      	beq.n	802ae80 <_reclaim_reent+0xa4>
 802ade8:	69c3      	ldr	r3, [r0, #28]
 802adea:	b1ab      	cbz	r3, 802ae18 <_reclaim_reent+0x3c>
 802adec:	68db      	ldr	r3, [r3, #12]
 802adee:	b16b      	cbz	r3, 802ae0c <_reclaim_reent+0x30>
 802adf0:	2500      	movs	r5, #0
 802adf2:	69e3      	ldr	r3, [r4, #28]
 802adf4:	68db      	ldr	r3, [r3, #12]
 802adf6:	5959      	ldr	r1, [r3, r5]
 802adf8:	2900      	cmp	r1, #0
 802adfa:	d13b      	bne.n	802ae74 <_reclaim_reent+0x98>
 802adfc:	3504      	adds	r5, #4
 802adfe:	2d80      	cmp	r5, #128	@ 0x80
 802ae00:	d1f7      	bne.n	802adf2 <_reclaim_reent+0x16>
 802ae02:	69e3      	ldr	r3, [r4, #28]
 802ae04:	4620      	mov	r0, r4
 802ae06:	68d9      	ldr	r1, [r3, #12]
 802ae08:	f000 fec8 	bl	802bb9c <_free_r>
 802ae0c:	69e3      	ldr	r3, [r4, #28]
 802ae0e:	6819      	ldr	r1, [r3, #0]
 802ae10:	b111      	cbz	r1, 802ae18 <_reclaim_reent+0x3c>
 802ae12:	4620      	mov	r0, r4
 802ae14:	f000 fec2 	bl	802bb9c <_free_r>
 802ae18:	6961      	ldr	r1, [r4, #20]
 802ae1a:	b111      	cbz	r1, 802ae22 <_reclaim_reent+0x46>
 802ae1c:	4620      	mov	r0, r4
 802ae1e:	f000 febd 	bl	802bb9c <_free_r>
 802ae22:	69e1      	ldr	r1, [r4, #28]
 802ae24:	b111      	cbz	r1, 802ae2c <_reclaim_reent+0x50>
 802ae26:	4620      	mov	r0, r4
 802ae28:	f000 feb8 	bl	802bb9c <_free_r>
 802ae2c:	6b21      	ldr	r1, [r4, #48]	@ 0x30
 802ae2e:	b111      	cbz	r1, 802ae36 <_reclaim_reent+0x5a>
 802ae30:	4620      	mov	r0, r4
 802ae32:	f000 feb3 	bl	802bb9c <_free_r>
 802ae36:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802ae38:	b111      	cbz	r1, 802ae40 <_reclaim_reent+0x64>
 802ae3a:	4620      	mov	r0, r4
 802ae3c:	f000 feae 	bl	802bb9c <_free_r>
 802ae40:	6ba1      	ldr	r1, [r4, #56]	@ 0x38
 802ae42:	b111      	cbz	r1, 802ae4a <_reclaim_reent+0x6e>
 802ae44:	4620      	mov	r0, r4
 802ae46:	f000 fea9 	bl	802bb9c <_free_r>
 802ae4a:	6ca1      	ldr	r1, [r4, #72]	@ 0x48
 802ae4c:	b111      	cbz	r1, 802ae54 <_reclaim_reent+0x78>
 802ae4e:	4620      	mov	r0, r4
 802ae50:	f000 fea4 	bl	802bb9c <_free_r>
 802ae54:	6c61      	ldr	r1, [r4, #68]	@ 0x44
 802ae56:	b111      	cbz	r1, 802ae5e <_reclaim_reent+0x82>
 802ae58:	4620      	mov	r0, r4
 802ae5a:	f000 fe9f 	bl	802bb9c <_free_r>
 802ae5e:	6ae1      	ldr	r1, [r4, #44]	@ 0x2c
 802ae60:	b111      	cbz	r1, 802ae68 <_reclaim_reent+0x8c>
 802ae62:	4620      	mov	r0, r4
 802ae64:	f000 fe9a 	bl	802bb9c <_free_r>
 802ae68:	6a23      	ldr	r3, [r4, #32]
 802ae6a:	b14b      	cbz	r3, 802ae80 <_reclaim_reent+0xa4>
 802ae6c:	4620      	mov	r0, r4
 802ae6e:	e8bd 4070 	ldmia.w	sp!, {r4, r5, r6, lr}
 802ae72:	4718      	bx	r3
 802ae74:	680e      	ldr	r6, [r1, #0]
 802ae76:	4620      	mov	r0, r4
 802ae78:	f000 fe90 	bl	802bb9c <_free_r>
 802ae7c:	4631      	mov	r1, r6
 802ae7e:	e7bb      	b.n	802adf8 <_reclaim_reent+0x1c>
 802ae80:	bd70      	pop	{r4, r5, r6, pc}
 802ae82:	bf00      	nop
 802ae84:	240001d4 	.word	0x240001d4

0802ae88 <_lseek_r>:
 802ae88:	b538      	push	{r3, r4, r5, lr}
 802ae8a:	4d07      	ldr	r5, [pc, #28]	@ (802aea8 <_lseek_r+0x20>)
 802ae8c:	4604      	mov	r4, r0
 802ae8e:	4608      	mov	r0, r1
 802ae90:	4611      	mov	r1, r2
 802ae92:	2200      	movs	r2, #0
 802ae94:	602a      	str	r2, [r5, #0]
 802ae96:	461a      	mov	r2, r3
 802ae98:	f7d9 fad9 	bl	800444e <_lseek>
 802ae9c:	1c43      	adds	r3, r0, #1
 802ae9e:	d102      	bne.n	802aea6 <_lseek_r+0x1e>
 802aea0:	682b      	ldr	r3, [r5, #0]
 802aea2:	b103      	cbz	r3, 802aea6 <_lseek_r+0x1e>
 802aea4:	6023      	str	r3, [r4, #0]
 802aea6:	bd38      	pop	{r3, r4, r5, pc}
 802aea8:	2402b2a0 	.word	0x2402b2a0

0802aeac <_read_r>:
 802aeac:	b538      	push	{r3, r4, r5, lr}
 802aeae:	4d07      	ldr	r5, [pc, #28]	@ (802aecc <_read_r+0x20>)
 802aeb0:	4604      	mov	r4, r0
 802aeb2:	4608      	mov	r0, r1
 802aeb4:	4611      	mov	r1, r2
 802aeb6:	2200      	movs	r2, #0
 802aeb8:	602a      	str	r2, [r5, #0]
 802aeba:	461a      	mov	r2, r3
 802aebc:	f7d9 fa67 	bl	800438e <_read>
 802aec0:	1c43      	adds	r3, r0, #1
 802aec2:	d102      	bne.n	802aeca <_read_r+0x1e>
 802aec4:	682b      	ldr	r3, [r5, #0]
 802aec6:	b103      	cbz	r3, 802aeca <_read_r+0x1e>
 802aec8:	6023      	str	r3, [r4, #0]
 802aeca:	bd38      	pop	{r3, r4, r5, pc}
 802aecc:	2402b2a0 	.word	0x2402b2a0

0802aed0 <_sbrk_r>:
 802aed0:	b538      	push	{r3, r4, r5, lr}
 802aed2:	4d06      	ldr	r5, [pc, #24]	@ (802aeec <_sbrk_r+0x1c>)
 802aed4:	2300      	movs	r3, #0
 802aed6:	4604      	mov	r4, r0
 802aed8:	4608      	mov	r0, r1
 802aeda:	602b      	str	r3, [r5, #0]
 802aedc:	f7d9 fac4 	bl	8004468 <_sbrk>
 802aee0:	1c43      	adds	r3, r0, #1
 802aee2:	d102      	bne.n	802aeea <_sbrk_r+0x1a>
 802aee4:	682b      	ldr	r3, [r5, #0]
 802aee6:	b103      	cbz	r3, 802aeea <_sbrk_r+0x1a>
 802aee8:	6023      	str	r3, [r4, #0]
 802aeea:	bd38      	pop	{r3, r4, r5, pc}
 802aeec:	2402b2a0 	.word	0x2402b2a0

0802aef0 <_write_r>:
 802aef0:	b538      	push	{r3, r4, r5, lr}
 802aef2:	4d07      	ldr	r5, [pc, #28]	@ (802af10 <_write_r+0x20>)
 802aef4:	4604      	mov	r4, r0
 802aef6:	4608      	mov	r0, r1
 802aef8:	4611      	mov	r1, r2
 802aefa:	2200      	movs	r2, #0
 802aefc:	602a      	str	r2, [r5, #0]
 802aefe:	461a      	mov	r2, r3
 802af00:	f7d9 fa62 	bl	80043c8 <_write>
 802af04:	1c43      	adds	r3, r0, #1
 802af06:	d102      	bne.n	802af0e <_write_r+0x1e>
 802af08:	682b      	ldr	r3, [r5, #0]
 802af0a:	b103      	cbz	r3, 802af0e <_write_r+0x1e>
 802af0c:	6023      	str	r3, [r4, #0]
 802af0e:	bd38      	pop	{r3, r4, r5, pc}
 802af10:	2402b2a0 	.word	0x2402b2a0

0802af14 <__errno>:
 802af14:	4b01      	ldr	r3, [pc, #4]	@ (802af1c <__errno+0x8>)
 802af16:	6818      	ldr	r0, [r3, #0]
 802af18:	4770      	bx	lr
 802af1a:	bf00      	nop
 802af1c:	240001d4 	.word	0x240001d4

0802af20 <__libc_init_array>:
 802af20:	b570      	push	{r4, r5, r6, lr}
 802af22:	4d0d      	ldr	r5, [pc, #52]	@ (802af58 <__libc_init_array+0x38>)
 802af24:	4c0d      	ldr	r4, [pc, #52]	@ (802af5c <__libc_init_array+0x3c>)
 802af26:	1b64      	subs	r4, r4, r5
 802af28:	10a4      	asrs	r4, r4, #2
 802af2a:	2600      	movs	r6, #0
 802af2c:	42a6      	cmp	r6, r4
 802af2e:	d109      	bne.n	802af44 <__libc_init_array+0x24>
 802af30:	4d0b      	ldr	r5, [pc, #44]	@ (802af60 <__libc_init_array+0x40>)
 802af32:	4c0c      	ldr	r4, [pc, #48]	@ (802af64 <__libc_init_array+0x44>)
 802af34:	f002 fac8 	bl	802d4c8 <_init>
 802af38:	1b64      	subs	r4, r4, r5
 802af3a:	10a4      	asrs	r4, r4, #2
 802af3c:	2600      	movs	r6, #0
 802af3e:	42a6      	cmp	r6, r4
 802af40:	d105      	bne.n	802af4e <__libc_init_array+0x2e>
 802af42:	bd70      	pop	{r4, r5, r6, pc}
 802af44:	f855 3b04 	ldr.w	r3, [r5], #4
 802af48:	4798      	blx	r3
 802af4a:	3601      	adds	r6, #1
 802af4c:	e7ee      	b.n	802af2c <__libc_init_array+0xc>
 802af4e:	f855 3b04 	ldr.w	r3, [r5], #4
 802af52:	4798      	blx	r3
 802af54:	3601      	adds	r6, #1
 802af56:	e7f2      	b.n	802af3e <__libc_init_array+0x1e>
 802af58:	08032394 	.word	0x08032394
 802af5c:	08032394 	.word	0x08032394
 802af60:	08032394 	.word	0x08032394
 802af64:	08032398 	.word	0x08032398

0802af68 <__retarget_lock_init_recursive>:
 802af68:	4770      	bx	lr

0802af6a <__retarget_lock_acquire_recursive>:
 802af6a:	4770      	bx	lr

0802af6c <__retarget_lock_release_recursive>:
 802af6c:	4770      	bx	lr

0802af6e <memcpy>:
 802af6e:	440a      	add	r2, r1
 802af70:	4291      	cmp	r1, r2
 802af72:	f100 33ff 	add.w	r3, r0, #4294967295	@ 0xffffffff
 802af76:	d100      	bne.n	802af7a <memcpy+0xc>
 802af78:	4770      	bx	lr
 802af7a:	b510      	push	{r4, lr}
 802af7c:	f811 4b01 	ldrb.w	r4, [r1], #1
 802af80:	f803 4f01 	strb.w	r4, [r3, #1]!
 802af84:	4291      	cmp	r1, r2
 802af86:	d1f9      	bne.n	802af7c <memcpy+0xe>
 802af88:	bd10      	pop	{r4, pc}
 802af8a:	0000      	movs	r0, r0
 802af8c:	0000      	movs	r0, r0
	...

0802af90 <nan>:
 802af90:	ed9f 0b01 	vldr	d0, [pc, #4]	@ 802af98 <nan+0x8>
 802af94:	4770      	bx	lr
 802af96:	bf00      	nop
 802af98:	00000000 	.word	0x00000000
 802af9c:	7ff80000 	.word	0x7ff80000

0802afa0 <__assert_func>:
 802afa0:	b51f      	push	{r0, r1, r2, r3, r4, lr}
 802afa2:	4614      	mov	r4, r2
 802afa4:	461a      	mov	r2, r3
 802afa6:	4b09      	ldr	r3, [pc, #36]	@ (802afcc <__assert_func+0x2c>)
 802afa8:	681b      	ldr	r3, [r3, #0]
 802afaa:	4605      	mov	r5, r0
 802afac:	68d8      	ldr	r0, [r3, #12]
 802afae:	b954      	cbnz	r4, 802afc6 <__assert_func+0x26>
 802afb0:	4b07      	ldr	r3, [pc, #28]	@ (802afd0 <__assert_func+0x30>)
 802afb2:	461c      	mov	r4, r3
 802afb4:	e9cd 3401 	strd	r3, r4, [sp, #4]
 802afb8:	9100      	str	r1, [sp, #0]
 802afba:	462b      	mov	r3, r5
 802afbc:	4905      	ldr	r1, [pc, #20]	@ (802afd4 <__assert_func+0x34>)
 802afbe:	f002 f98d 	bl	802d2dc <fiprintf>
 802afc2:	f002 fa21 	bl	802d408 <abort>
 802afc6:	4b04      	ldr	r3, [pc, #16]	@ (802afd8 <__assert_func+0x38>)
 802afc8:	e7f4      	b.n	802afb4 <__assert_func+0x14>
 802afca:	bf00      	nop
 802afcc:	240001d4 	.word	0x240001d4
 802afd0:	08032148 	.word	0x08032148
 802afd4:	0803211a 	.word	0x0803211a
 802afd8:	0803210d 	.word	0x0803210d

0802afdc <quorem>:
 802afdc:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802afe0:	6903      	ldr	r3, [r0, #16]
 802afe2:	690c      	ldr	r4, [r1, #16]
 802afe4:	42a3      	cmp	r3, r4
 802afe6:	4607      	mov	r7, r0
 802afe8:	db7e      	blt.n	802b0e8 <quorem+0x10c>
 802afea:	3c01      	subs	r4, #1
 802afec:	f101 0814 	add.w	r8, r1, #20
 802aff0:	00a3      	lsls	r3, r4, #2
 802aff2:	f100 0514 	add.w	r5, r0, #20
 802aff6:	9300      	str	r3, [sp, #0]
 802aff8:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 802affc:	9301      	str	r3, [sp, #4]
 802affe:	f858 3024 	ldr.w	r3, [r8, r4, lsl #2]
 802b002:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 802b006:	3301      	adds	r3, #1
 802b008:	429a      	cmp	r2, r3
 802b00a:	eb08 0984 	add.w	r9, r8, r4, lsl #2
 802b00e:	fbb2 f6f3 	udiv	r6, r2, r3
 802b012:	d32e      	bcc.n	802b072 <quorem+0x96>
 802b014:	f04f 0a00 	mov.w	sl, #0
 802b018:	46c4      	mov	ip, r8
 802b01a:	46ae      	mov	lr, r5
 802b01c:	46d3      	mov	fp, sl
 802b01e:	f85c 3b04 	ldr.w	r3, [ip], #4
 802b022:	b298      	uxth	r0, r3
 802b024:	fb06 a000 	mla	r0, r6, r0, sl
 802b028:	0c02      	lsrs	r2, r0, #16
 802b02a:	0c1b      	lsrs	r3, r3, #16
 802b02c:	fb06 2303 	mla	r3, r6, r3, r2
 802b030:	f8de 2000 	ldr.w	r2, [lr]
 802b034:	b280      	uxth	r0, r0
 802b036:	b292      	uxth	r2, r2
 802b038:	1a12      	subs	r2, r2, r0
 802b03a:	445a      	add	r2, fp
 802b03c:	f8de 0000 	ldr.w	r0, [lr]
 802b040:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802b044:	b29b      	uxth	r3, r3
 802b046:	ebc3 4322 	rsb	r3, r3, r2, asr #16
 802b04a:	eb03 4310 	add.w	r3, r3, r0, lsr #16
 802b04e:	b292      	uxth	r2, r2
 802b050:	ea42 4203 	orr.w	r2, r2, r3, lsl #16
 802b054:	45e1      	cmp	r9, ip
 802b056:	f84e 2b04 	str.w	r2, [lr], #4
 802b05a:	ea4f 4b23 	mov.w	fp, r3, asr #16
 802b05e:	d2de      	bcs.n	802b01e <quorem+0x42>
 802b060:	9b00      	ldr	r3, [sp, #0]
 802b062:	58eb      	ldr	r3, [r5, r3]
 802b064:	b92b      	cbnz	r3, 802b072 <quorem+0x96>
 802b066:	9b01      	ldr	r3, [sp, #4]
 802b068:	3b04      	subs	r3, #4
 802b06a:	429d      	cmp	r5, r3
 802b06c:	461a      	mov	r2, r3
 802b06e:	d32f      	bcc.n	802b0d0 <quorem+0xf4>
 802b070:	613c      	str	r4, [r7, #16]
 802b072:	4638      	mov	r0, r7
 802b074:	f001 fbec 	bl	802c850 <__mcmp>
 802b078:	2800      	cmp	r0, #0
 802b07a:	db25      	blt.n	802b0c8 <quorem+0xec>
 802b07c:	4629      	mov	r1, r5
 802b07e:	2000      	movs	r0, #0
 802b080:	f858 2b04 	ldr.w	r2, [r8], #4
 802b084:	f8d1 c000 	ldr.w	ip, [r1]
 802b088:	fa1f fe82 	uxth.w	lr, r2
 802b08c:	fa1f f38c 	uxth.w	r3, ip
 802b090:	eba3 030e 	sub.w	r3, r3, lr
 802b094:	4403      	add	r3, r0
 802b096:	0c12      	lsrs	r2, r2, #16
 802b098:	ebc2 4223 	rsb	r2, r2, r3, asr #16
 802b09c:	eb02 421c 	add.w	r2, r2, ip, lsr #16
 802b0a0:	b29b      	uxth	r3, r3
 802b0a2:	ea43 4302 	orr.w	r3, r3, r2, lsl #16
 802b0a6:	45c1      	cmp	r9, r8
 802b0a8:	f841 3b04 	str.w	r3, [r1], #4
 802b0ac:	ea4f 4022 	mov.w	r0, r2, asr #16
 802b0b0:	d2e6      	bcs.n	802b080 <quorem+0xa4>
 802b0b2:	f855 2024 	ldr.w	r2, [r5, r4, lsl #2]
 802b0b6:	eb05 0384 	add.w	r3, r5, r4, lsl #2
 802b0ba:	b922      	cbnz	r2, 802b0c6 <quorem+0xea>
 802b0bc:	3b04      	subs	r3, #4
 802b0be:	429d      	cmp	r5, r3
 802b0c0:	461a      	mov	r2, r3
 802b0c2:	d30b      	bcc.n	802b0dc <quorem+0x100>
 802b0c4:	613c      	str	r4, [r7, #16]
 802b0c6:	3601      	adds	r6, #1
 802b0c8:	4630      	mov	r0, r6
 802b0ca:	b003      	add	sp, #12
 802b0cc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802b0d0:	6812      	ldr	r2, [r2, #0]
 802b0d2:	3b04      	subs	r3, #4
 802b0d4:	2a00      	cmp	r2, #0
 802b0d6:	d1cb      	bne.n	802b070 <quorem+0x94>
 802b0d8:	3c01      	subs	r4, #1
 802b0da:	e7c6      	b.n	802b06a <quorem+0x8e>
 802b0dc:	6812      	ldr	r2, [r2, #0]
 802b0de:	3b04      	subs	r3, #4
 802b0e0:	2a00      	cmp	r2, #0
 802b0e2:	d1ef      	bne.n	802b0c4 <quorem+0xe8>
 802b0e4:	3c01      	subs	r4, #1
 802b0e6:	e7ea      	b.n	802b0be <quorem+0xe2>
 802b0e8:	2000      	movs	r0, #0
 802b0ea:	e7ee      	b.n	802b0ca <quorem+0xee>
 802b0ec:	0000      	movs	r0, r0
	...

0802b0f0 <_dtoa_r>:
 802b0f0:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802b0f4:	ed2d 8b02 	vpush	{d8}
 802b0f8:	69c7      	ldr	r7, [r0, #28]
 802b0fa:	b091      	sub	sp, #68	@ 0x44
 802b0fc:	ed8d 0b02 	vstr	d0, [sp, #8]
 802b100:	ec55 4b10 	vmov	r4, r5, d0
 802b104:	9e1c      	ldr	r6, [sp, #112]	@ 0x70
 802b106:	9107      	str	r1, [sp, #28]
 802b108:	4681      	mov	r9, r0
 802b10a:	9209      	str	r2, [sp, #36]	@ 0x24
 802b10c:	930d      	str	r3, [sp, #52]	@ 0x34
 802b10e:	b97f      	cbnz	r7, 802b130 <_dtoa_r+0x40>
 802b110:	2010      	movs	r0, #16
 802b112:	f7fe f8bb 	bl	802928c <malloc>
 802b116:	4602      	mov	r2, r0
 802b118:	f8c9 001c 	str.w	r0, [r9, #28]
 802b11c:	b920      	cbnz	r0, 802b128 <_dtoa_r+0x38>
 802b11e:	4ba0      	ldr	r3, [pc, #640]	@ (802b3a0 <_dtoa_r+0x2b0>)
 802b120:	21ef      	movs	r1, #239	@ 0xef
 802b122:	48a0      	ldr	r0, [pc, #640]	@ (802b3a4 <_dtoa_r+0x2b4>)
 802b124:	f7ff ff3c 	bl	802afa0 <__assert_func>
 802b128:	e9c0 7701 	strd	r7, r7, [r0, #4]
 802b12c:	6007      	str	r7, [r0, #0]
 802b12e:	60c7      	str	r7, [r0, #12]
 802b130:	f8d9 301c 	ldr.w	r3, [r9, #28]
 802b134:	6819      	ldr	r1, [r3, #0]
 802b136:	b159      	cbz	r1, 802b150 <_dtoa_r+0x60>
 802b138:	685a      	ldr	r2, [r3, #4]
 802b13a:	604a      	str	r2, [r1, #4]
 802b13c:	2301      	movs	r3, #1
 802b13e:	4093      	lsls	r3, r2
 802b140:	608b      	str	r3, [r1, #8]
 802b142:	4648      	mov	r0, r9
 802b144:	f001 f900 	bl	802c348 <_Bfree>
 802b148:	f8d9 301c 	ldr.w	r3, [r9, #28]
 802b14c:	2200      	movs	r2, #0
 802b14e:	601a      	str	r2, [r3, #0]
 802b150:	1e2b      	subs	r3, r5, #0
 802b152:	bfbb      	ittet	lt
 802b154:	f023 4300 	biclt.w	r3, r3, #2147483648	@ 0x80000000
 802b158:	9303      	strlt	r3, [sp, #12]
 802b15a:	2300      	movge	r3, #0
 802b15c:	2201      	movlt	r2, #1
 802b15e:	bfac      	ite	ge
 802b160:	6033      	strge	r3, [r6, #0]
 802b162:	6032      	strlt	r2, [r6, #0]
 802b164:	4b90      	ldr	r3, [pc, #576]	@ (802b3a8 <_dtoa_r+0x2b8>)
 802b166:	9e03      	ldr	r6, [sp, #12]
 802b168:	43b3      	bics	r3, r6
 802b16a:	d110      	bne.n	802b18e <_dtoa_r+0x9e>
 802b16c:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802b16e:	f242 730f 	movw	r3, #9999	@ 0x270f
 802b172:	6013      	str	r3, [r2, #0]
 802b174:	f3c6 0313 	ubfx	r3, r6, #0, #20
 802b178:	4323      	orrs	r3, r4
 802b17a:	f000 84de 	beq.w	802bb3a <_dtoa_r+0xa4a>
 802b17e:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802b180:	4f8a      	ldr	r7, [pc, #552]	@ (802b3ac <_dtoa_r+0x2bc>)
 802b182:	2b00      	cmp	r3, #0
 802b184:	f000 84e0 	beq.w	802bb48 <_dtoa_r+0xa58>
 802b188:	1cfb      	adds	r3, r7, #3
 802b18a:	f000 bcdb 	b.w	802bb44 <_dtoa_r+0xa54>
 802b18e:	ed9d 8b02 	vldr	d8, [sp, #8]
 802b192:	eeb5 8b40 	vcmp.f64	d8, #0.0
 802b196:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b19a:	d10a      	bne.n	802b1b2 <_dtoa_r+0xc2>
 802b19c:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802b19e:	2301      	movs	r3, #1
 802b1a0:	6013      	str	r3, [r2, #0]
 802b1a2:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802b1a4:	b113      	cbz	r3, 802b1ac <_dtoa_r+0xbc>
 802b1a6:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 802b1a8:	4b81      	ldr	r3, [pc, #516]	@ (802b3b0 <_dtoa_r+0x2c0>)
 802b1aa:	6013      	str	r3, [r2, #0]
 802b1ac:	4f81      	ldr	r7, [pc, #516]	@ (802b3b4 <_dtoa_r+0x2c4>)
 802b1ae:	f000 bccb 	b.w	802bb48 <_dtoa_r+0xa58>
 802b1b2:	aa0e      	add	r2, sp, #56	@ 0x38
 802b1b4:	a90f      	add	r1, sp, #60	@ 0x3c
 802b1b6:	4648      	mov	r0, r9
 802b1b8:	eeb0 0b48 	vmov.f64	d0, d8
 802b1bc:	f001 fc68 	bl	802ca90 <__d2b>
 802b1c0:	f3c6 530a 	ubfx	r3, r6, #20, #11
 802b1c4:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802b1c6:	9001      	str	r0, [sp, #4]
 802b1c8:	2b00      	cmp	r3, #0
 802b1ca:	d045      	beq.n	802b258 <_dtoa_r+0x168>
 802b1cc:	eeb0 7b48 	vmov.f64	d7, d8
 802b1d0:	ee18 1a90 	vmov	r1, s17
 802b1d4:	f3c1 0113 	ubfx	r1, r1, #0, #20
 802b1d8:	f041 517f 	orr.w	r1, r1, #1069547520	@ 0x3fc00000
 802b1dc:	f441 1140 	orr.w	r1, r1, #3145728	@ 0x300000
 802b1e0:	f2a3 33ff 	subw	r3, r3, #1023	@ 0x3ff
 802b1e4:	2500      	movs	r5, #0
 802b1e6:	ee07 1a90 	vmov	s15, r1
 802b1ea:	eeb7 6b08 	vmov.f64	d6, #120	@ 0x3fc00000  1.5
 802b1ee:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 802b388 <_dtoa_r+0x298>
 802b1f2:	ee37 7b46 	vsub.f64	d7, d7, d6
 802b1f6:	ed9f 6b66 	vldr	d6, [pc, #408]	@ 802b390 <_dtoa_r+0x2a0>
 802b1fa:	eea7 6b05 	vfma.f64	d6, d7, d5
 802b1fe:	ed9f 5b66 	vldr	d5, [pc, #408]	@ 802b398 <_dtoa_r+0x2a8>
 802b202:	ee07 3a90 	vmov	s15, r3
 802b206:	eeb8 4be7 	vcvt.f64.s32	d4, s15
 802b20a:	eeb0 7b46 	vmov.f64	d7, d6
 802b20e:	eea4 7b05 	vfma.f64	d7, d4, d5
 802b212:	eefd 6bc7 	vcvt.s32.f64	s13, d7
 802b216:	eeb5 7bc0 	vcmpe.f64	d7, #0.0
 802b21a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b21e:	ee16 8a90 	vmov	r8, s13
 802b222:	d508      	bpl.n	802b236 <_dtoa_r+0x146>
 802b224:	eeb8 6be6 	vcvt.f64.s32	d6, s13
 802b228:	eeb4 6b47 	vcmp.f64	d6, d7
 802b22c:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b230:	bf18      	it	ne
 802b232:	f108 38ff 	addne.w	r8, r8, #4294967295	@ 0xffffffff
 802b236:	f1b8 0f16 	cmp.w	r8, #22
 802b23a:	d82b      	bhi.n	802b294 <_dtoa_r+0x1a4>
 802b23c:	495e      	ldr	r1, [pc, #376]	@ (802b3b8 <_dtoa_r+0x2c8>)
 802b23e:	eb01 01c8 	add.w	r1, r1, r8, lsl #3
 802b242:	ed91 7b00 	vldr	d7, [r1]
 802b246:	eeb4 8bc7 	vcmpe.f64	d8, d7
 802b24a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b24e:	d501      	bpl.n	802b254 <_dtoa_r+0x164>
 802b250:	f108 38ff 	add.w	r8, r8, #4294967295	@ 0xffffffff
 802b254:	2100      	movs	r1, #0
 802b256:	e01e      	b.n	802b296 <_dtoa_r+0x1a6>
 802b258:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802b25a:	4413      	add	r3, r2
 802b25c:	f203 4132 	addw	r1, r3, #1074	@ 0x432
 802b260:	2920      	cmp	r1, #32
 802b262:	bfc1      	itttt	gt
 802b264:	f1c1 0140 	rsbgt	r1, r1, #64	@ 0x40
 802b268:	408e      	lslgt	r6, r1
 802b26a:	f203 4112 	addwgt	r1, r3, #1042	@ 0x412
 802b26e:	fa24 f101 	lsrgt.w	r1, r4, r1
 802b272:	bfd6      	itet	le
 802b274:	f1c1 0120 	rsble	r1, r1, #32
 802b278:	4331      	orrgt	r1, r6
 802b27a:	fa04 f101 	lslle.w	r1, r4, r1
 802b27e:	ee07 1a90 	vmov	s15, r1
 802b282:	eeb8 7b67 	vcvt.f64.u32	d7, s15
 802b286:	3b01      	subs	r3, #1
 802b288:	ee17 1a90 	vmov	r1, s15
 802b28c:	2501      	movs	r5, #1
 802b28e:	f1a1 71f8 	sub.w	r1, r1, #32505856	@ 0x1f00000
 802b292:	e7a8      	b.n	802b1e6 <_dtoa_r+0xf6>
 802b294:	2101      	movs	r1, #1
 802b296:	1ad2      	subs	r2, r2, r3
 802b298:	1e53      	subs	r3, r2, #1
 802b29a:	9306      	str	r3, [sp, #24]
 802b29c:	bf45      	ittet	mi
 802b29e:	f1c2 0301 	rsbmi	r3, r2, #1
 802b2a2:	9305      	strmi	r3, [sp, #20]
 802b2a4:	2300      	movpl	r3, #0
 802b2a6:	2300      	movmi	r3, #0
 802b2a8:	bf4c      	ite	mi
 802b2aa:	9306      	strmi	r3, [sp, #24]
 802b2ac:	9305      	strpl	r3, [sp, #20]
 802b2ae:	f1b8 0f00 	cmp.w	r8, #0
 802b2b2:	910c      	str	r1, [sp, #48]	@ 0x30
 802b2b4:	db18      	blt.n	802b2e8 <_dtoa_r+0x1f8>
 802b2b6:	9b06      	ldr	r3, [sp, #24]
 802b2b8:	f8cd 8028 	str.w	r8, [sp, #40]	@ 0x28
 802b2bc:	4443      	add	r3, r8
 802b2be:	9306      	str	r3, [sp, #24]
 802b2c0:	2300      	movs	r3, #0
 802b2c2:	9a07      	ldr	r2, [sp, #28]
 802b2c4:	2a09      	cmp	r2, #9
 802b2c6:	d849      	bhi.n	802b35c <_dtoa_r+0x26c>
 802b2c8:	2a05      	cmp	r2, #5
 802b2ca:	bfc4      	itt	gt
 802b2cc:	3a04      	subgt	r2, #4
 802b2ce:	9207      	strgt	r2, [sp, #28]
 802b2d0:	9a07      	ldr	r2, [sp, #28]
 802b2d2:	f1a2 0202 	sub.w	r2, r2, #2
 802b2d6:	bfcc      	ite	gt
 802b2d8:	2400      	movgt	r4, #0
 802b2da:	2401      	movle	r4, #1
 802b2dc:	2a03      	cmp	r2, #3
 802b2de:	d848      	bhi.n	802b372 <_dtoa_r+0x282>
 802b2e0:	e8df f002 	tbb	[pc, r2]
 802b2e4:	3a2c2e0b 	.word	0x3a2c2e0b
 802b2e8:	9b05      	ldr	r3, [sp, #20]
 802b2ea:	2200      	movs	r2, #0
 802b2ec:	eba3 0308 	sub.w	r3, r3, r8
 802b2f0:	9305      	str	r3, [sp, #20]
 802b2f2:	920a      	str	r2, [sp, #40]	@ 0x28
 802b2f4:	f1c8 0300 	rsb	r3, r8, #0
 802b2f8:	e7e3      	b.n	802b2c2 <_dtoa_r+0x1d2>
 802b2fa:	2200      	movs	r2, #0
 802b2fc:	9208      	str	r2, [sp, #32]
 802b2fe:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802b300:	2a00      	cmp	r2, #0
 802b302:	dc39      	bgt.n	802b378 <_dtoa_r+0x288>
 802b304:	f04f 0b01 	mov.w	fp, #1
 802b308:	46da      	mov	sl, fp
 802b30a:	465a      	mov	r2, fp
 802b30c:	f8cd b024 	str.w	fp, [sp, #36]	@ 0x24
 802b310:	f8d9 701c 	ldr.w	r7, [r9, #28]
 802b314:	2100      	movs	r1, #0
 802b316:	2004      	movs	r0, #4
 802b318:	f100 0614 	add.w	r6, r0, #20
 802b31c:	4296      	cmp	r6, r2
 802b31e:	d930      	bls.n	802b382 <_dtoa_r+0x292>
 802b320:	6079      	str	r1, [r7, #4]
 802b322:	4648      	mov	r0, r9
 802b324:	9304      	str	r3, [sp, #16]
 802b326:	f000 ffcf 	bl	802c2c8 <_Balloc>
 802b32a:	9b04      	ldr	r3, [sp, #16]
 802b32c:	4607      	mov	r7, r0
 802b32e:	2800      	cmp	r0, #0
 802b330:	d146      	bne.n	802b3c0 <_dtoa_r+0x2d0>
 802b332:	4b22      	ldr	r3, [pc, #136]	@ (802b3bc <_dtoa_r+0x2cc>)
 802b334:	4602      	mov	r2, r0
 802b336:	f240 11af 	movw	r1, #431	@ 0x1af
 802b33a:	e6f2      	b.n	802b122 <_dtoa_r+0x32>
 802b33c:	2201      	movs	r2, #1
 802b33e:	e7dd      	b.n	802b2fc <_dtoa_r+0x20c>
 802b340:	2200      	movs	r2, #0
 802b342:	9208      	str	r2, [sp, #32]
 802b344:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802b346:	eb08 0b02 	add.w	fp, r8, r2
 802b34a:	f10b 0a01 	add.w	sl, fp, #1
 802b34e:	4652      	mov	r2, sl
 802b350:	2a01      	cmp	r2, #1
 802b352:	bfb8      	it	lt
 802b354:	2201      	movlt	r2, #1
 802b356:	e7db      	b.n	802b310 <_dtoa_r+0x220>
 802b358:	2201      	movs	r2, #1
 802b35a:	e7f2      	b.n	802b342 <_dtoa_r+0x252>
 802b35c:	2401      	movs	r4, #1
 802b35e:	2200      	movs	r2, #0
 802b360:	e9cd 2407 	strd	r2, r4, [sp, #28]
 802b364:	f04f 3bff 	mov.w	fp, #4294967295	@ 0xffffffff
 802b368:	2100      	movs	r1, #0
 802b36a:	46da      	mov	sl, fp
 802b36c:	2212      	movs	r2, #18
 802b36e:	9109      	str	r1, [sp, #36]	@ 0x24
 802b370:	e7ce      	b.n	802b310 <_dtoa_r+0x220>
 802b372:	2201      	movs	r2, #1
 802b374:	9208      	str	r2, [sp, #32]
 802b376:	e7f5      	b.n	802b364 <_dtoa_r+0x274>
 802b378:	f8dd b024 	ldr.w	fp, [sp, #36]	@ 0x24
 802b37c:	46da      	mov	sl, fp
 802b37e:	465a      	mov	r2, fp
 802b380:	e7c6      	b.n	802b310 <_dtoa_r+0x220>
 802b382:	3101      	adds	r1, #1
 802b384:	0040      	lsls	r0, r0, #1
 802b386:	e7c7      	b.n	802b318 <_dtoa_r+0x228>
 802b388:	636f4361 	.word	0x636f4361
 802b38c:	3fd287a7 	.word	0x3fd287a7
 802b390:	8b60c8b3 	.word	0x8b60c8b3
 802b394:	3fc68a28 	.word	0x3fc68a28
 802b398:	509f79fb 	.word	0x509f79fb
 802b39c:	3fd34413 	.word	0x3fd34413
 802b3a0:	08031f0e 	.word	0x08031f0e
 802b3a4:	08032156 	.word	0x08032156
 802b3a8:	7ff00000 	.word	0x7ff00000
 802b3ac:	08032152 	.word	0x08032152
 802b3b0:	080320e2 	.word	0x080320e2
 802b3b4:	080320e1 	.word	0x080320e1
 802b3b8:	080322b0 	.word	0x080322b0
 802b3bc:	080321ae 	.word	0x080321ae
 802b3c0:	f8d9 201c 	ldr.w	r2, [r9, #28]
 802b3c4:	f1ba 0f0e 	cmp.w	sl, #14
 802b3c8:	6010      	str	r0, [r2, #0]
 802b3ca:	d86f      	bhi.n	802b4ac <_dtoa_r+0x3bc>
 802b3cc:	2c00      	cmp	r4, #0
 802b3ce:	d06d      	beq.n	802b4ac <_dtoa_r+0x3bc>
 802b3d0:	f1b8 0f00 	cmp.w	r8, #0
 802b3d4:	f340 80c2 	ble.w	802b55c <_dtoa_r+0x46c>
 802b3d8:	4aca      	ldr	r2, [pc, #808]	@ (802b704 <_dtoa_r+0x614>)
 802b3da:	f008 010f 	and.w	r1, r8, #15
 802b3de:	eb02 02c1 	add.w	r2, r2, r1, lsl #3
 802b3e2:	f418 7f80 	tst.w	r8, #256	@ 0x100
 802b3e6:	ed92 7b00 	vldr	d7, [r2]
 802b3ea:	ea4f 1128 	mov.w	r1, r8, asr #4
 802b3ee:	f000 80a9 	beq.w	802b544 <_dtoa_r+0x454>
 802b3f2:	4ac5      	ldr	r2, [pc, #788]	@ (802b708 <_dtoa_r+0x618>)
 802b3f4:	ed92 6b08 	vldr	d6, [r2, #32]
 802b3f8:	ee88 6b06 	vdiv.f64	d6, d8, d6
 802b3fc:	ed8d 6b02 	vstr	d6, [sp, #8]
 802b400:	f001 010f 	and.w	r1, r1, #15
 802b404:	2203      	movs	r2, #3
 802b406:	48c0      	ldr	r0, [pc, #768]	@ (802b708 <_dtoa_r+0x618>)
 802b408:	2900      	cmp	r1, #0
 802b40a:	f040 809d 	bne.w	802b548 <_dtoa_r+0x458>
 802b40e:	ed9d 6b02 	vldr	d6, [sp, #8]
 802b412:	ee86 7b07 	vdiv.f64	d7, d6, d7
 802b416:	ed8d 7b02 	vstr	d7, [sp, #8]
 802b41a:	990c      	ldr	r1, [sp, #48]	@ 0x30
 802b41c:	ed9d 7b02 	vldr	d7, [sp, #8]
 802b420:	2900      	cmp	r1, #0
 802b422:	f000 80c1 	beq.w	802b5a8 <_dtoa_r+0x4b8>
 802b426:	eeb7 6b00 	vmov.f64	d6, #112	@ 0x3f800000  1.0
 802b42a:	eeb4 7bc6 	vcmpe.f64	d7, d6
 802b42e:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b432:	f140 80b9 	bpl.w	802b5a8 <_dtoa_r+0x4b8>
 802b436:	f1ba 0f00 	cmp.w	sl, #0
 802b43a:	f000 80b5 	beq.w	802b5a8 <_dtoa_r+0x4b8>
 802b43e:	f1bb 0f00 	cmp.w	fp, #0
 802b442:	dd31      	ble.n	802b4a8 <_dtoa_r+0x3b8>
 802b444:	eeb2 6b04 	vmov.f64	d6, #36	@ 0x41200000  10.0
 802b448:	ee27 7b06 	vmul.f64	d7, d7, d6
 802b44c:	ed8d 7b02 	vstr	d7, [sp, #8]
 802b450:	f108 31ff 	add.w	r1, r8, #4294967295	@ 0xffffffff
 802b454:	9104      	str	r1, [sp, #16]
 802b456:	3201      	adds	r2, #1
 802b458:	465c      	mov	r4, fp
 802b45a:	ed9d 6b02 	vldr	d6, [sp, #8]
 802b45e:	eeb1 5b0c 	vmov.f64	d5, #28	@ 0x40e00000  7.0
 802b462:	ee07 2a90 	vmov	s15, r2
 802b466:	eeb8 7be7 	vcvt.f64.s32	d7, s15
 802b46a:	eea7 5b06 	vfma.f64	d5, d7, d6
 802b46e:	ee15 2a90 	vmov	r2, s11
 802b472:	ec51 0b15 	vmov	r0, r1, d5
 802b476:	f1a2 7150 	sub.w	r1, r2, #54525952	@ 0x3400000
 802b47a:	2c00      	cmp	r4, #0
 802b47c:	f040 8098 	bne.w	802b5b0 <_dtoa_r+0x4c0>
 802b480:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 802b484:	ee36 6b47 	vsub.f64	d6, d6, d7
 802b488:	ec41 0b17 	vmov	d7, r0, r1
 802b48c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802b490:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b494:	f300 8261 	bgt.w	802b95a <_dtoa_r+0x86a>
 802b498:	eeb1 7b47 	vneg.f64	d7, d7
 802b49c:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802b4a0:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b4a4:	f100 80f5 	bmi.w	802b692 <_dtoa_r+0x5a2>
 802b4a8:	ed8d 8b02 	vstr	d8, [sp, #8]
 802b4ac:	9a0f      	ldr	r2, [sp, #60]	@ 0x3c
 802b4ae:	2a00      	cmp	r2, #0
 802b4b0:	f2c0 812c 	blt.w	802b70c <_dtoa_r+0x61c>
 802b4b4:	f1b8 0f0e 	cmp.w	r8, #14
 802b4b8:	f300 8128 	bgt.w	802b70c <_dtoa_r+0x61c>
 802b4bc:	4b91      	ldr	r3, [pc, #580]	@ (802b704 <_dtoa_r+0x614>)
 802b4be:	eb03 03c8 	add.w	r3, r3, r8, lsl #3
 802b4c2:	ed93 6b00 	vldr	d6, [r3]
 802b4c6:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802b4c8:	2b00      	cmp	r3, #0
 802b4ca:	da03      	bge.n	802b4d4 <_dtoa_r+0x3e4>
 802b4cc:	f1ba 0f00 	cmp.w	sl, #0
 802b4d0:	f340 80d2 	ble.w	802b678 <_dtoa_r+0x588>
 802b4d4:	eeb2 4b04 	vmov.f64	d4, #36	@ 0x41200000  10.0
 802b4d8:	ed9d 7b02 	vldr	d7, [sp, #8]
 802b4dc:	463e      	mov	r6, r7
 802b4de:	ee87 5b06 	vdiv.f64	d5, d7, d6
 802b4e2:	eebd 5bc5 	vcvt.s32.f64	s10, d5
 802b4e6:	ee15 3a10 	vmov	r3, s10
 802b4ea:	3330      	adds	r3, #48	@ 0x30
 802b4ec:	f806 3b01 	strb.w	r3, [r6], #1
 802b4f0:	1bf3      	subs	r3, r6, r7
 802b4f2:	459a      	cmp	sl, r3
 802b4f4:	eeb8 3bc5 	vcvt.f64.s32	d3, s10
 802b4f8:	eea3 7b46 	vfms.f64	d7, d3, d6
 802b4fc:	f040 80f8 	bne.w	802b6f0 <_dtoa_r+0x600>
 802b500:	ee37 7b07 	vadd.f64	d7, d7, d7
 802b504:	eeb4 7bc6 	vcmpe.f64	d7, d6
 802b508:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b50c:	f300 80dd 	bgt.w	802b6ca <_dtoa_r+0x5da>
 802b510:	eeb4 7b46 	vcmp.f64	d7, d6
 802b514:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b518:	d104      	bne.n	802b524 <_dtoa_r+0x434>
 802b51a:	ee15 3a10 	vmov	r3, s10
 802b51e:	07db      	lsls	r3, r3, #31
 802b520:	f100 80d3 	bmi.w	802b6ca <_dtoa_r+0x5da>
 802b524:	9901      	ldr	r1, [sp, #4]
 802b526:	4648      	mov	r0, r9
 802b528:	f000 ff0e 	bl	802c348 <_Bfree>
 802b52c:	2300      	movs	r3, #0
 802b52e:	9a0d      	ldr	r2, [sp, #52]	@ 0x34
 802b530:	7033      	strb	r3, [r6, #0]
 802b532:	f108 0301 	add.w	r3, r8, #1
 802b536:	6013      	str	r3, [r2, #0]
 802b538:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802b53a:	2b00      	cmp	r3, #0
 802b53c:	f000 8304 	beq.w	802bb48 <_dtoa_r+0xa58>
 802b540:	601e      	str	r6, [r3, #0]
 802b542:	e301      	b.n	802bb48 <_dtoa_r+0xa58>
 802b544:	2202      	movs	r2, #2
 802b546:	e75e      	b.n	802b406 <_dtoa_r+0x316>
 802b548:	07cc      	lsls	r4, r1, #31
 802b54a:	d504      	bpl.n	802b556 <_dtoa_r+0x466>
 802b54c:	ed90 6b00 	vldr	d6, [r0]
 802b550:	3201      	adds	r2, #1
 802b552:	ee27 7b06 	vmul.f64	d7, d7, d6
 802b556:	1049      	asrs	r1, r1, #1
 802b558:	3008      	adds	r0, #8
 802b55a:	e755      	b.n	802b408 <_dtoa_r+0x318>
 802b55c:	d022      	beq.n	802b5a4 <_dtoa_r+0x4b4>
 802b55e:	f1c8 0100 	rsb	r1, r8, #0
 802b562:	4a68      	ldr	r2, [pc, #416]	@ (802b704 <_dtoa_r+0x614>)
 802b564:	f001 000f 	and.w	r0, r1, #15
 802b568:	eb02 02c0 	add.w	r2, r2, r0, lsl #3
 802b56c:	ed92 7b00 	vldr	d7, [r2]
 802b570:	ee28 7b07 	vmul.f64	d7, d8, d7
 802b574:	ed8d 7b02 	vstr	d7, [sp, #8]
 802b578:	4863      	ldr	r0, [pc, #396]	@ (802b708 <_dtoa_r+0x618>)
 802b57a:	1109      	asrs	r1, r1, #4
 802b57c:	2400      	movs	r4, #0
 802b57e:	2202      	movs	r2, #2
 802b580:	b929      	cbnz	r1, 802b58e <_dtoa_r+0x49e>
 802b582:	2c00      	cmp	r4, #0
 802b584:	f43f af49 	beq.w	802b41a <_dtoa_r+0x32a>
 802b588:	ed8d 7b02 	vstr	d7, [sp, #8]
 802b58c:	e745      	b.n	802b41a <_dtoa_r+0x32a>
 802b58e:	07ce      	lsls	r6, r1, #31
 802b590:	d505      	bpl.n	802b59e <_dtoa_r+0x4ae>
 802b592:	ed90 6b00 	vldr	d6, [r0]
 802b596:	3201      	adds	r2, #1
 802b598:	2401      	movs	r4, #1
 802b59a:	ee27 7b06 	vmul.f64	d7, d7, d6
 802b59e:	1049      	asrs	r1, r1, #1
 802b5a0:	3008      	adds	r0, #8
 802b5a2:	e7ed      	b.n	802b580 <_dtoa_r+0x490>
 802b5a4:	2202      	movs	r2, #2
 802b5a6:	e738      	b.n	802b41a <_dtoa_r+0x32a>
 802b5a8:	f8cd 8010 	str.w	r8, [sp, #16]
 802b5ac:	4654      	mov	r4, sl
 802b5ae:	e754      	b.n	802b45a <_dtoa_r+0x36a>
 802b5b0:	4a54      	ldr	r2, [pc, #336]	@ (802b704 <_dtoa_r+0x614>)
 802b5b2:	eb02 02c4 	add.w	r2, r2, r4, lsl #3
 802b5b6:	ed12 4b02 	vldr	d4, [r2, #-8]
 802b5ba:	9a08      	ldr	r2, [sp, #32]
 802b5bc:	ec41 0b17 	vmov	d7, r0, r1
 802b5c0:	443c      	add	r4, r7
 802b5c2:	b34a      	cbz	r2, 802b618 <_dtoa_r+0x528>
 802b5c4:	eeb6 3b00 	vmov.f64	d3, #96	@ 0x3f000000  0.5
 802b5c8:	eeb7 2b00 	vmov.f64	d2, #112	@ 0x3f800000  1.0
 802b5cc:	463e      	mov	r6, r7
 802b5ce:	ee83 5b04 	vdiv.f64	d5, d3, d4
 802b5d2:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802b5d6:	ee35 7b47 	vsub.f64	d7, d5, d7
 802b5da:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802b5de:	ee14 2a90 	vmov	r2, s9
 802b5e2:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802b5e6:	3230      	adds	r2, #48	@ 0x30
 802b5e8:	ee36 6b45 	vsub.f64	d6, d6, d5
 802b5ec:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802b5f0:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b5f4:	f806 2b01 	strb.w	r2, [r6], #1
 802b5f8:	d438      	bmi.n	802b66c <_dtoa_r+0x57c>
 802b5fa:	ee32 5b46 	vsub.f64	d5, d2, d6
 802b5fe:	eeb4 5bc7 	vcmpe.f64	d5, d7
 802b602:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b606:	d462      	bmi.n	802b6ce <_dtoa_r+0x5de>
 802b608:	42a6      	cmp	r6, r4
 802b60a:	f43f af4d 	beq.w	802b4a8 <_dtoa_r+0x3b8>
 802b60e:	ee27 7b03 	vmul.f64	d7, d7, d3
 802b612:	ee26 6b03 	vmul.f64	d6, d6, d3
 802b616:	e7e0      	b.n	802b5da <_dtoa_r+0x4ea>
 802b618:	4621      	mov	r1, r4
 802b61a:	463e      	mov	r6, r7
 802b61c:	ee27 7b04 	vmul.f64	d7, d7, d4
 802b620:	eeb2 3b04 	vmov.f64	d3, #36	@ 0x41200000  10.0
 802b624:	eefd 4bc6 	vcvt.s32.f64	s9, d6
 802b628:	ee14 2a90 	vmov	r2, s9
 802b62c:	3230      	adds	r2, #48	@ 0x30
 802b62e:	f806 2b01 	strb.w	r2, [r6], #1
 802b632:	42a6      	cmp	r6, r4
 802b634:	eeb8 5be4 	vcvt.f64.s32	d5, s9
 802b638:	ee36 6b45 	vsub.f64	d6, d6, d5
 802b63c:	d119      	bne.n	802b672 <_dtoa_r+0x582>
 802b63e:	eeb6 5b00 	vmov.f64	d5, #96	@ 0x3f000000  0.5
 802b642:	ee37 4b05 	vadd.f64	d4, d7, d5
 802b646:	eeb4 6bc4 	vcmpe.f64	d6, d4
 802b64a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b64e:	dc3e      	bgt.n	802b6ce <_dtoa_r+0x5de>
 802b650:	ee35 5b47 	vsub.f64	d5, d5, d7
 802b654:	eeb4 6bc5 	vcmpe.f64	d6, d5
 802b658:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b65c:	f57f af24 	bpl.w	802b4a8 <_dtoa_r+0x3b8>
 802b660:	460e      	mov	r6, r1
 802b662:	3901      	subs	r1, #1
 802b664:	f816 3c01 	ldrb.w	r3, [r6, #-1]
 802b668:	2b30      	cmp	r3, #48	@ 0x30
 802b66a:	d0f9      	beq.n	802b660 <_dtoa_r+0x570>
 802b66c:	f8dd 8010 	ldr.w	r8, [sp, #16]
 802b670:	e758      	b.n	802b524 <_dtoa_r+0x434>
 802b672:	ee26 6b03 	vmul.f64	d6, d6, d3
 802b676:	e7d5      	b.n	802b624 <_dtoa_r+0x534>
 802b678:	d10b      	bne.n	802b692 <_dtoa_r+0x5a2>
 802b67a:	eeb1 7b04 	vmov.f64	d7, #20	@ 0x40a00000  5.0
 802b67e:	ee26 6b07 	vmul.f64	d6, d6, d7
 802b682:	ed9d 7b02 	vldr	d7, [sp, #8]
 802b686:	eeb4 6bc7 	vcmpe.f64	d6, d7
 802b68a:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b68e:	f2c0 8161 	blt.w	802b954 <_dtoa_r+0x864>
 802b692:	2400      	movs	r4, #0
 802b694:	4625      	mov	r5, r4
 802b696:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802b698:	43db      	mvns	r3, r3
 802b69a:	9304      	str	r3, [sp, #16]
 802b69c:	463e      	mov	r6, r7
 802b69e:	f04f 0800 	mov.w	r8, #0
 802b6a2:	4621      	mov	r1, r4
 802b6a4:	4648      	mov	r0, r9
 802b6a6:	f000 fe4f 	bl	802c348 <_Bfree>
 802b6aa:	2d00      	cmp	r5, #0
 802b6ac:	d0de      	beq.n	802b66c <_dtoa_r+0x57c>
 802b6ae:	f1b8 0f00 	cmp.w	r8, #0
 802b6b2:	d005      	beq.n	802b6c0 <_dtoa_r+0x5d0>
 802b6b4:	45a8      	cmp	r8, r5
 802b6b6:	d003      	beq.n	802b6c0 <_dtoa_r+0x5d0>
 802b6b8:	4641      	mov	r1, r8
 802b6ba:	4648      	mov	r0, r9
 802b6bc:	f000 fe44 	bl	802c348 <_Bfree>
 802b6c0:	4629      	mov	r1, r5
 802b6c2:	4648      	mov	r0, r9
 802b6c4:	f000 fe40 	bl	802c348 <_Bfree>
 802b6c8:	e7d0      	b.n	802b66c <_dtoa_r+0x57c>
 802b6ca:	f8cd 8010 	str.w	r8, [sp, #16]
 802b6ce:	4633      	mov	r3, r6
 802b6d0:	461e      	mov	r6, r3
 802b6d2:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802b6d6:	2a39      	cmp	r2, #57	@ 0x39
 802b6d8:	d106      	bne.n	802b6e8 <_dtoa_r+0x5f8>
 802b6da:	429f      	cmp	r7, r3
 802b6dc:	d1f8      	bne.n	802b6d0 <_dtoa_r+0x5e0>
 802b6de:	9a04      	ldr	r2, [sp, #16]
 802b6e0:	3201      	adds	r2, #1
 802b6e2:	9204      	str	r2, [sp, #16]
 802b6e4:	2230      	movs	r2, #48	@ 0x30
 802b6e6:	703a      	strb	r2, [r7, #0]
 802b6e8:	781a      	ldrb	r2, [r3, #0]
 802b6ea:	3201      	adds	r2, #1
 802b6ec:	701a      	strb	r2, [r3, #0]
 802b6ee:	e7bd      	b.n	802b66c <_dtoa_r+0x57c>
 802b6f0:	ee27 7b04 	vmul.f64	d7, d7, d4
 802b6f4:	eeb5 7b40 	vcmp.f64	d7, #0.0
 802b6f8:	eef1 fa10 	vmrs	APSR_nzcv, fpscr
 802b6fc:	f47f aeef 	bne.w	802b4de <_dtoa_r+0x3ee>
 802b700:	e710      	b.n	802b524 <_dtoa_r+0x434>
 802b702:	bf00      	nop
 802b704:	080322b0 	.word	0x080322b0
 802b708:	08032288 	.word	0x08032288
 802b70c:	9908      	ldr	r1, [sp, #32]
 802b70e:	2900      	cmp	r1, #0
 802b710:	f000 80e3 	beq.w	802b8da <_dtoa_r+0x7ea>
 802b714:	9907      	ldr	r1, [sp, #28]
 802b716:	2901      	cmp	r1, #1
 802b718:	f300 80c8 	bgt.w	802b8ac <_dtoa_r+0x7bc>
 802b71c:	2d00      	cmp	r5, #0
 802b71e:	f000 80c1 	beq.w	802b8a4 <_dtoa_r+0x7b4>
 802b722:	f202 4233 	addw	r2, r2, #1075	@ 0x433
 802b726:	9e05      	ldr	r6, [sp, #20]
 802b728:	461c      	mov	r4, r3
 802b72a:	9304      	str	r3, [sp, #16]
 802b72c:	9b05      	ldr	r3, [sp, #20]
 802b72e:	4413      	add	r3, r2
 802b730:	9305      	str	r3, [sp, #20]
 802b732:	9b06      	ldr	r3, [sp, #24]
 802b734:	2101      	movs	r1, #1
 802b736:	4413      	add	r3, r2
 802b738:	4648      	mov	r0, r9
 802b73a:	9306      	str	r3, [sp, #24]
 802b73c:	f000 ff02 	bl	802c544 <__i2b>
 802b740:	9b04      	ldr	r3, [sp, #16]
 802b742:	4605      	mov	r5, r0
 802b744:	b166      	cbz	r6, 802b760 <_dtoa_r+0x670>
 802b746:	9a06      	ldr	r2, [sp, #24]
 802b748:	2a00      	cmp	r2, #0
 802b74a:	dd09      	ble.n	802b760 <_dtoa_r+0x670>
 802b74c:	42b2      	cmp	r2, r6
 802b74e:	9905      	ldr	r1, [sp, #20]
 802b750:	bfa8      	it	ge
 802b752:	4632      	movge	r2, r6
 802b754:	1a89      	subs	r1, r1, r2
 802b756:	9105      	str	r1, [sp, #20]
 802b758:	9906      	ldr	r1, [sp, #24]
 802b75a:	1ab6      	subs	r6, r6, r2
 802b75c:	1a8a      	subs	r2, r1, r2
 802b75e:	9206      	str	r2, [sp, #24]
 802b760:	b1fb      	cbz	r3, 802b7a2 <_dtoa_r+0x6b2>
 802b762:	9a08      	ldr	r2, [sp, #32]
 802b764:	2a00      	cmp	r2, #0
 802b766:	f000 80bc 	beq.w	802b8e2 <_dtoa_r+0x7f2>
 802b76a:	b19c      	cbz	r4, 802b794 <_dtoa_r+0x6a4>
 802b76c:	4629      	mov	r1, r5
 802b76e:	4622      	mov	r2, r4
 802b770:	4648      	mov	r0, r9
 802b772:	930b      	str	r3, [sp, #44]	@ 0x2c
 802b774:	f000 ffa6 	bl	802c6c4 <__pow5mult>
 802b778:	9a01      	ldr	r2, [sp, #4]
 802b77a:	4601      	mov	r1, r0
 802b77c:	4605      	mov	r5, r0
 802b77e:	4648      	mov	r0, r9
 802b780:	f000 fef6 	bl	802c570 <__multiply>
 802b784:	9901      	ldr	r1, [sp, #4]
 802b786:	9004      	str	r0, [sp, #16]
 802b788:	4648      	mov	r0, r9
 802b78a:	f000 fddd 	bl	802c348 <_Bfree>
 802b78e:	9a04      	ldr	r2, [sp, #16]
 802b790:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802b792:	9201      	str	r2, [sp, #4]
 802b794:	1b1a      	subs	r2, r3, r4
 802b796:	d004      	beq.n	802b7a2 <_dtoa_r+0x6b2>
 802b798:	9901      	ldr	r1, [sp, #4]
 802b79a:	4648      	mov	r0, r9
 802b79c:	f000 ff92 	bl	802c6c4 <__pow5mult>
 802b7a0:	9001      	str	r0, [sp, #4]
 802b7a2:	2101      	movs	r1, #1
 802b7a4:	4648      	mov	r0, r9
 802b7a6:	f000 fecd 	bl	802c544 <__i2b>
 802b7aa:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802b7ac:	4604      	mov	r4, r0
 802b7ae:	2b00      	cmp	r3, #0
 802b7b0:	f000 81d0 	beq.w	802bb54 <_dtoa_r+0xa64>
 802b7b4:	461a      	mov	r2, r3
 802b7b6:	4601      	mov	r1, r0
 802b7b8:	4648      	mov	r0, r9
 802b7ba:	f000 ff83 	bl	802c6c4 <__pow5mult>
 802b7be:	9b07      	ldr	r3, [sp, #28]
 802b7c0:	2b01      	cmp	r3, #1
 802b7c2:	4604      	mov	r4, r0
 802b7c4:	f300 8095 	bgt.w	802b8f2 <_dtoa_r+0x802>
 802b7c8:	9b02      	ldr	r3, [sp, #8]
 802b7ca:	2b00      	cmp	r3, #0
 802b7cc:	f040 808b 	bne.w	802b8e6 <_dtoa_r+0x7f6>
 802b7d0:	9b03      	ldr	r3, [sp, #12]
 802b7d2:	f3c3 0213 	ubfx	r2, r3, #0, #20
 802b7d6:	2a00      	cmp	r2, #0
 802b7d8:	f040 8087 	bne.w	802b8ea <_dtoa_r+0x7fa>
 802b7dc:	f023 4200 	bic.w	r2, r3, #2147483648	@ 0x80000000
 802b7e0:	0d12      	lsrs	r2, r2, #20
 802b7e2:	0512      	lsls	r2, r2, #20
 802b7e4:	2a00      	cmp	r2, #0
 802b7e6:	f000 8082 	beq.w	802b8ee <_dtoa_r+0x7fe>
 802b7ea:	9b05      	ldr	r3, [sp, #20]
 802b7ec:	3301      	adds	r3, #1
 802b7ee:	9305      	str	r3, [sp, #20]
 802b7f0:	9b06      	ldr	r3, [sp, #24]
 802b7f2:	3301      	adds	r3, #1
 802b7f4:	9306      	str	r3, [sp, #24]
 802b7f6:	2301      	movs	r3, #1
 802b7f8:	930b      	str	r3, [sp, #44]	@ 0x2c
 802b7fa:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802b7fc:	2b00      	cmp	r3, #0
 802b7fe:	f000 81af 	beq.w	802bb60 <_dtoa_r+0xa70>
 802b802:	6922      	ldr	r2, [r4, #16]
 802b804:	eb04 0282 	add.w	r2, r4, r2, lsl #2
 802b808:	6910      	ldr	r0, [r2, #16]
 802b80a:	f000 fe4f 	bl	802c4ac <__hi0bits>
 802b80e:	f1c0 0020 	rsb	r0, r0, #32
 802b812:	9b06      	ldr	r3, [sp, #24]
 802b814:	4418      	add	r0, r3
 802b816:	f010 001f 	ands.w	r0, r0, #31
 802b81a:	d076      	beq.n	802b90a <_dtoa_r+0x81a>
 802b81c:	f1c0 0220 	rsb	r2, r0, #32
 802b820:	2a04      	cmp	r2, #4
 802b822:	dd69      	ble.n	802b8f8 <_dtoa_r+0x808>
 802b824:	9b05      	ldr	r3, [sp, #20]
 802b826:	f1c0 001c 	rsb	r0, r0, #28
 802b82a:	4403      	add	r3, r0
 802b82c:	9305      	str	r3, [sp, #20]
 802b82e:	9b06      	ldr	r3, [sp, #24]
 802b830:	4406      	add	r6, r0
 802b832:	4403      	add	r3, r0
 802b834:	9306      	str	r3, [sp, #24]
 802b836:	9b05      	ldr	r3, [sp, #20]
 802b838:	2b00      	cmp	r3, #0
 802b83a:	dd05      	ble.n	802b848 <_dtoa_r+0x758>
 802b83c:	9901      	ldr	r1, [sp, #4]
 802b83e:	461a      	mov	r2, r3
 802b840:	4648      	mov	r0, r9
 802b842:	f000 ff99 	bl	802c778 <__lshift>
 802b846:	9001      	str	r0, [sp, #4]
 802b848:	9b06      	ldr	r3, [sp, #24]
 802b84a:	2b00      	cmp	r3, #0
 802b84c:	dd05      	ble.n	802b85a <_dtoa_r+0x76a>
 802b84e:	4621      	mov	r1, r4
 802b850:	461a      	mov	r2, r3
 802b852:	4648      	mov	r0, r9
 802b854:	f000 ff90 	bl	802c778 <__lshift>
 802b858:	4604      	mov	r4, r0
 802b85a:	9b0c      	ldr	r3, [sp, #48]	@ 0x30
 802b85c:	2b00      	cmp	r3, #0
 802b85e:	d056      	beq.n	802b90e <_dtoa_r+0x81e>
 802b860:	9801      	ldr	r0, [sp, #4]
 802b862:	4621      	mov	r1, r4
 802b864:	f000 fff4 	bl	802c850 <__mcmp>
 802b868:	2800      	cmp	r0, #0
 802b86a:	da50      	bge.n	802b90e <_dtoa_r+0x81e>
 802b86c:	f108 33ff 	add.w	r3, r8, #4294967295	@ 0xffffffff
 802b870:	9304      	str	r3, [sp, #16]
 802b872:	9901      	ldr	r1, [sp, #4]
 802b874:	2300      	movs	r3, #0
 802b876:	220a      	movs	r2, #10
 802b878:	4648      	mov	r0, r9
 802b87a:	f000 fd87 	bl	802c38c <__multadd>
 802b87e:	9b08      	ldr	r3, [sp, #32]
 802b880:	9001      	str	r0, [sp, #4]
 802b882:	2b00      	cmp	r3, #0
 802b884:	f000 816e 	beq.w	802bb64 <_dtoa_r+0xa74>
 802b888:	4629      	mov	r1, r5
 802b88a:	2300      	movs	r3, #0
 802b88c:	220a      	movs	r2, #10
 802b88e:	4648      	mov	r0, r9
 802b890:	f000 fd7c 	bl	802c38c <__multadd>
 802b894:	f1bb 0f00 	cmp.w	fp, #0
 802b898:	4605      	mov	r5, r0
 802b89a:	dc64      	bgt.n	802b966 <_dtoa_r+0x876>
 802b89c:	9b07      	ldr	r3, [sp, #28]
 802b89e:	2b02      	cmp	r3, #2
 802b8a0:	dc3e      	bgt.n	802b920 <_dtoa_r+0x830>
 802b8a2:	e060      	b.n	802b966 <_dtoa_r+0x876>
 802b8a4:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802b8a6:	f1c2 0236 	rsb	r2, r2, #54	@ 0x36
 802b8aa:	e73c      	b.n	802b726 <_dtoa_r+0x636>
 802b8ac:	f10a 34ff 	add.w	r4, sl, #4294967295	@ 0xffffffff
 802b8b0:	42a3      	cmp	r3, r4
 802b8b2:	bfbf      	itttt	lt
 802b8b4:	1ae2      	sublt	r2, r4, r3
 802b8b6:	9b0a      	ldrlt	r3, [sp, #40]	@ 0x28
 802b8b8:	189b      	addlt	r3, r3, r2
 802b8ba:	930a      	strlt	r3, [sp, #40]	@ 0x28
 802b8bc:	bfae      	itee	ge
 802b8be:	1b1c      	subge	r4, r3, r4
 802b8c0:	4623      	movlt	r3, r4
 802b8c2:	2400      	movlt	r4, #0
 802b8c4:	f1ba 0f00 	cmp.w	sl, #0
 802b8c8:	bfb5      	itete	lt
 802b8ca:	9a05      	ldrlt	r2, [sp, #20]
 802b8cc:	9e05      	ldrge	r6, [sp, #20]
 802b8ce:	eba2 060a 	sublt.w	r6, r2, sl
 802b8d2:	4652      	movge	r2, sl
 802b8d4:	bfb8      	it	lt
 802b8d6:	2200      	movlt	r2, #0
 802b8d8:	e727      	b.n	802b72a <_dtoa_r+0x63a>
 802b8da:	9e05      	ldr	r6, [sp, #20]
 802b8dc:	9d08      	ldr	r5, [sp, #32]
 802b8de:	461c      	mov	r4, r3
 802b8e0:	e730      	b.n	802b744 <_dtoa_r+0x654>
 802b8e2:	461a      	mov	r2, r3
 802b8e4:	e758      	b.n	802b798 <_dtoa_r+0x6a8>
 802b8e6:	2300      	movs	r3, #0
 802b8e8:	e786      	b.n	802b7f8 <_dtoa_r+0x708>
 802b8ea:	9b02      	ldr	r3, [sp, #8]
 802b8ec:	e784      	b.n	802b7f8 <_dtoa_r+0x708>
 802b8ee:	920b      	str	r2, [sp, #44]	@ 0x2c
 802b8f0:	e783      	b.n	802b7fa <_dtoa_r+0x70a>
 802b8f2:	2300      	movs	r3, #0
 802b8f4:	930b      	str	r3, [sp, #44]	@ 0x2c
 802b8f6:	e784      	b.n	802b802 <_dtoa_r+0x712>
 802b8f8:	d09d      	beq.n	802b836 <_dtoa_r+0x746>
 802b8fa:	9b05      	ldr	r3, [sp, #20]
 802b8fc:	321c      	adds	r2, #28
 802b8fe:	4413      	add	r3, r2
 802b900:	9305      	str	r3, [sp, #20]
 802b902:	9b06      	ldr	r3, [sp, #24]
 802b904:	4416      	add	r6, r2
 802b906:	4413      	add	r3, r2
 802b908:	e794      	b.n	802b834 <_dtoa_r+0x744>
 802b90a:	4602      	mov	r2, r0
 802b90c:	e7f5      	b.n	802b8fa <_dtoa_r+0x80a>
 802b90e:	f1ba 0f00 	cmp.w	sl, #0
 802b912:	f8cd 8010 	str.w	r8, [sp, #16]
 802b916:	46d3      	mov	fp, sl
 802b918:	dc21      	bgt.n	802b95e <_dtoa_r+0x86e>
 802b91a:	9b07      	ldr	r3, [sp, #28]
 802b91c:	2b02      	cmp	r3, #2
 802b91e:	dd1e      	ble.n	802b95e <_dtoa_r+0x86e>
 802b920:	f1bb 0f00 	cmp.w	fp, #0
 802b924:	f47f aeb7 	bne.w	802b696 <_dtoa_r+0x5a6>
 802b928:	4621      	mov	r1, r4
 802b92a:	465b      	mov	r3, fp
 802b92c:	2205      	movs	r2, #5
 802b92e:	4648      	mov	r0, r9
 802b930:	f000 fd2c 	bl	802c38c <__multadd>
 802b934:	4601      	mov	r1, r0
 802b936:	4604      	mov	r4, r0
 802b938:	9801      	ldr	r0, [sp, #4]
 802b93a:	f000 ff89 	bl	802c850 <__mcmp>
 802b93e:	2800      	cmp	r0, #0
 802b940:	f77f aea9 	ble.w	802b696 <_dtoa_r+0x5a6>
 802b944:	463e      	mov	r6, r7
 802b946:	2331      	movs	r3, #49	@ 0x31
 802b948:	f806 3b01 	strb.w	r3, [r6], #1
 802b94c:	9b04      	ldr	r3, [sp, #16]
 802b94e:	3301      	adds	r3, #1
 802b950:	9304      	str	r3, [sp, #16]
 802b952:	e6a4      	b.n	802b69e <_dtoa_r+0x5ae>
 802b954:	f8cd 8010 	str.w	r8, [sp, #16]
 802b958:	4654      	mov	r4, sl
 802b95a:	4625      	mov	r5, r4
 802b95c:	e7f2      	b.n	802b944 <_dtoa_r+0x854>
 802b95e:	9b08      	ldr	r3, [sp, #32]
 802b960:	2b00      	cmp	r3, #0
 802b962:	f000 8103 	beq.w	802bb6c <_dtoa_r+0xa7c>
 802b966:	2e00      	cmp	r6, #0
 802b968:	dd05      	ble.n	802b976 <_dtoa_r+0x886>
 802b96a:	4629      	mov	r1, r5
 802b96c:	4632      	mov	r2, r6
 802b96e:	4648      	mov	r0, r9
 802b970:	f000 ff02 	bl	802c778 <__lshift>
 802b974:	4605      	mov	r5, r0
 802b976:	9b0b      	ldr	r3, [sp, #44]	@ 0x2c
 802b978:	2b00      	cmp	r3, #0
 802b97a:	d058      	beq.n	802ba2e <_dtoa_r+0x93e>
 802b97c:	6869      	ldr	r1, [r5, #4]
 802b97e:	4648      	mov	r0, r9
 802b980:	f000 fca2 	bl	802c2c8 <_Balloc>
 802b984:	4606      	mov	r6, r0
 802b986:	b928      	cbnz	r0, 802b994 <_dtoa_r+0x8a4>
 802b988:	4b82      	ldr	r3, [pc, #520]	@ (802bb94 <_dtoa_r+0xaa4>)
 802b98a:	4602      	mov	r2, r0
 802b98c:	f240 21ef 	movw	r1, #751	@ 0x2ef
 802b990:	f7ff bbc7 	b.w	802b122 <_dtoa_r+0x32>
 802b994:	692a      	ldr	r2, [r5, #16]
 802b996:	3202      	adds	r2, #2
 802b998:	0092      	lsls	r2, r2, #2
 802b99a:	f105 010c 	add.w	r1, r5, #12
 802b99e:	300c      	adds	r0, #12
 802b9a0:	f7ff fae5 	bl	802af6e <memcpy>
 802b9a4:	2201      	movs	r2, #1
 802b9a6:	4631      	mov	r1, r6
 802b9a8:	4648      	mov	r0, r9
 802b9aa:	f000 fee5 	bl	802c778 <__lshift>
 802b9ae:	1c7b      	adds	r3, r7, #1
 802b9b0:	9305      	str	r3, [sp, #20]
 802b9b2:	eb07 030b 	add.w	r3, r7, fp
 802b9b6:	9309      	str	r3, [sp, #36]	@ 0x24
 802b9b8:	9b02      	ldr	r3, [sp, #8]
 802b9ba:	f003 0301 	and.w	r3, r3, #1
 802b9be:	46a8      	mov	r8, r5
 802b9c0:	9308      	str	r3, [sp, #32]
 802b9c2:	4605      	mov	r5, r0
 802b9c4:	9b05      	ldr	r3, [sp, #20]
 802b9c6:	9801      	ldr	r0, [sp, #4]
 802b9c8:	4621      	mov	r1, r4
 802b9ca:	f103 3bff 	add.w	fp, r3, #4294967295	@ 0xffffffff
 802b9ce:	f7ff fb05 	bl	802afdc <quorem>
 802b9d2:	4641      	mov	r1, r8
 802b9d4:	9002      	str	r0, [sp, #8]
 802b9d6:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802b9da:	9801      	ldr	r0, [sp, #4]
 802b9dc:	f000 ff38 	bl	802c850 <__mcmp>
 802b9e0:	462a      	mov	r2, r5
 802b9e2:	9006      	str	r0, [sp, #24]
 802b9e4:	4621      	mov	r1, r4
 802b9e6:	4648      	mov	r0, r9
 802b9e8:	f000 ff4e 	bl	802c888 <__mdiff>
 802b9ec:	68c2      	ldr	r2, [r0, #12]
 802b9ee:	4606      	mov	r6, r0
 802b9f0:	b9fa      	cbnz	r2, 802ba32 <_dtoa_r+0x942>
 802b9f2:	4601      	mov	r1, r0
 802b9f4:	9801      	ldr	r0, [sp, #4]
 802b9f6:	f000 ff2b 	bl	802c850 <__mcmp>
 802b9fa:	4602      	mov	r2, r0
 802b9fc:	4631      	mov	r1, r6
 802b9fe:	4648      	mov	r0, r9
 802ba00:	920a      	str	r2, [sp, #40]	@ 0x28
 802ba02:	f000 fca1 	bl	802c348 <_Bfree>
 802ba06:	9b07      	ldr	r3, [sp, #28]
 802ba08:	9a0a      	ldr	r2, [sp, #40]	@ 0x28
 802ba0a:	9e05      	ldr	r6, [sp, #20]
 802ba0c:	ea43 0102 	orr.w	r1, r3, r2
 802ba10:	9b08      	ldr	r3, [sp, #32]
 802ba12:	4319      	orrs	r1, r3
 802ba14:	d10f      	bne.n	802ba36 <_dtoa_r+0x946>
 802ba16:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802ba1a:	d028      	beq.n	802ba6e <_dtoa_r+0x97e>
 802ba1c:	9b06      	ldr	r3, [sp, #24]
 802ba1e:	2b00      	cmp	r3, #0
 802ba20:	dd02      	ble.n	802ba28 <_dtoa_r+0x938>
 802ba22:	9b02      	ldr	r3, [sp, #8]
 802ba24:	f103 0a31 	add.w	sl, r3, #49	@ 0x31
 802ba28:	f88b a000 	strb.w	sl, [fp]
 802ba2c:	e639      	b.n	802b6a2 <_dtoa_r+0x5b2>
 802ba2e:	4628      	mov	r0, r5
 802ba30:	e7bd      	b.n	802b9ae <_dtoa_r+0x8be>
 802ba32:	2201      	movs	r2, #1
 802ba34:	e7e2      	b.n	802b9fc <_dtoa_r+0x90c>
 802ba36:	9b06      	ldr	r3, [sp, #24]
 802ba38:	2b00      	cmp	r3, #0
 802ba3a:	db04      	blt.n	802ba46 <_dtoa_r+0x956>
 802ba3c:	9907      	ldr	r1, [sp, #28]
 802ba3e:	430b      	orrs	r3, r1
 802ba40:	9908      	ldr	r1, [sp, #32]
 802ba42:	430b      	orrs	r3, r1
 802ba44:	d120      	bne.n	802ba88 <_dtoa_r+0x998>
 802ba46:	2a00      	cmp	r2, #0
 802ba48:	ddee      	ble.n	802ba28 <_dtoa_r+0x938>
 802ba4a:	9901      	ldr	r1, [sp, #4]
 802ba4c:	2201      	movs	r2, #1
 802ba4e:	4648      	mov	r0, r9
 802ba50:	f000 fe92 	bl	802c778 <__lshift>
 802ba54:	4621      	mov	r1, r4
 802ba56:	9001      	str	r0, [sp, #4]
 802ba58:	f000 fefa 	bl	802c850 <__mcmp>
 802ba5c:	2800      	cmp	r0, #0
 802ba5e:	dc03      	bgt.n	802ba68 <_dtoa_r+0x978>
 802ba60:	d1e2      	bne.n	802ba28 <_dtoa_r+0x938>
 802ba62:	f01a 0f01 	tst.w	sl, #1
 802ba66:	d0df      	beq.n	802ba28 <_dtoa_r+0x938>
 802ba68:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802ba6c:	d1d9      	bne.n	802ba22 <_dtoa_r+0x932>
 802ba6e:	2339      	movs	r3, #57	@ 0x39
 802ba70:	f88b 3000 	strb.w	r3, [fp]
 802ba74:	4633      	mov	r3, r6
 802ba76:	461e      	mov	r6, r3
 802ba78:	3b01      	subs	r3, #1
 802ba7a:	f816 2c01 	ldrb.w	r2, [r6, #-1]
 802ba7e:	2a39      	cmp	r2, #57	@ 0x39
 802ba80:	d053      	beq.n	802bb2a <_dtoa_r+0xa3a>
 802ba82:	3201      	adds	r2, #1
 802ba84:	701a      	strb	r2, [r3, #0]
 802ba86:	e60c      	b.n	802b6a2 <_dtoa_r+0x5b2>
 802ba88:	2a00      	cmp	r2, #0
 802ba8a:	dd07      	ble.n	802ba9c <_dtoa_r+0x9ac>
 802ba8c:	f1ba 0f39 	cmp.w	sl, #57	@ 0x39
 802ba90:	d0ed      	beq.n	802ba6e <_dtoa_r+0x97e>
 802ba92:	f10a 0301 	add.w	r3, sl, #1
 802ba96:	f88b 3000 	strb.w	r3, [fp]
 802ba9a:	e602      	b.n	802b6a2 <_dtoa_r+0x5b2>
 802ba9c:	9b05      	ldr	r3, [sp, #20]
 802ba9e:	9a05      	ldr	r2, [sp, #20]
 802baa0:	f803 ac01 	strb.w	sl, [r3, #-1]
 802baa4:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802baa6:	4293      	cmp	r3, r2
 802baa8:	d029      	beq.n	802bafe <_dtoa_r+0xa0e>
 802baaa:	9901      	ldr	r1, [sp, #4]
 802baac:	2300      	movs	r3, #0
 802baae:	220a      	movs	r2, #10
 802bab0:	4648      	mov	r0, r9
 802bab2:	f000 fc6b 	bl	802c38c <__multadd>
 802bab6:	45a8      	cmp	r8, r5
 802bab8:	9001      	str	r0, [sp, #4]
 802baba:	f04f 0300 	mov.w	r3, #0
 802babe:	f04f 020a 	mov.w	r2, #10
 802bac2:	4641      	mov	r1, r8
 802bac4:	4648      	mov	r0, r9
 802bac6:	d107      	bne.n	802bad8 <_dtoa_r+0x9e8>
 802bac8:	f000 fc60 	bl	802c38c <__multadd>
 802bacc:	4680      	mov	r8, r0
 802bace:	4605      	mov	r5, r0
 802bad0:	9b05      	ldr	r3, [sp, #20]
 802bad2:	3301      	adds	r3, #1
 802bad4:	9305      	str	r3, [sp, #20]
 802bad6:	e775      	b.n	802b9c4 <_dtoa_r+0x8d4>
 802bad8:	f000 fc58 	bl	802c38c <__multadd>
 802badc:	4629      	mov	r1, r5
 802bade:	4680      	mov	r8, r0
 802bae0:	2300      	movs	r3, #0
 802bae2:	220a      	movs	r2, #10
 802bae4:	4648      	mov	r0, r9
 802bae6:	f000 fc51 	bl	802c38c <__multadd>
 802baea:	4605      	mov	r5, r0
 802baec:	e7f0      	b.n	802bad0 <_dtoa_r+0x9e0>
 802baee:	f1bb 0f00 	cmp.w	fp, #0
 802baf2:	bfcc      	ite	gt
 802baf4:	465e      	movgt	r6, fp
 802baf6:	2601      	movle	r6, #1
 802baf8:	443e      	add	r6, r7
 802bafa:	f04f 0800 	mov.w	r8, #0
 802bafe:	9901      	ldr	r1, [sp, #4]
 802bb00:	2201      	movs	r2, #1
 802bb02:	4648      	mov	r0, r9
 802bb04:	f000 fe38 	bl	802c778 <__lshift>
 802bb08:	4621      	mov	r1, r4
 802bb0a:	9001      	str	r0, [sp, #4]
 802bb0c:	f000 fea0 	bl	802c850 <__mcmp>
 802bb10:	2800      	cmp	r0, #0
 802bb12:	dcaf      	bgt.n	802ba74 <_dtoa_r+0x984>
 802bb14:	d102      	bne.n	802bb1c <_dtoa_r+0xa2c>
 802bb16:	f01a 0f01 	tst.w	sl, #1
 802bb1a:	d1ab      	bne.n	802ba74 <_dtoa_r+0x984>
 802bb1c:	4633      	mov	r3, r6
 802bb1e:	461e      	mov	r6, r3
 802bb20:	f813 2d01 	ldrb.w	r2, [r3, #-1]!
 802bb24:	2a30      	cmp	r2, #48	@ 0x30
 802bb26:	d0fa      	beq.n	802bb1e <_dtoa_r+0xa2e>
 802bb28:	e5bb      	b.n	802b6a2 <_dtoa_r+0x5b2>
 802bb2a:	429f      	cmp	r7, r3
 802bb2c:	d1a3      	bne.n	802ba76 <_dtoa_r+0x986>
 802bb2e:	9b04      	ldr	r3, [sp, #16]
 802bb30:	3301      	adds	r3, #1
 802bb32:	9304      	str	r3, [sp, #16]
 802bb34:	2331      	movs	r3, #49	@ 0x31
 802bb36:	703b      	strb	r3, [r7, #0]
 802bb38:	e5b3      	b.n	802b6a2 <_dtoa_r+0x5b2>
 802bb3a:	9b1d      	ldr	r3, [sp, #116]	@ 0x74
 802bb3c:	4f16      	ldr	r7, [pc, #88]	@ (802bb98 <_dtoa_r+0xaa8>)
 802bb3e:	b11b      	cbz	r3, 802bb48 <_dtoa_r+0xa58>
 802bb40:	f107 0308 	add.w	r3, r7, #8
 802bb44:	9a1d      	ldr	r2, [sp, #116]	@ 0x74
 802bb46:	6013      	str	r3, [r2, #0]
 802bb48:	4638      	mov	r0, r7
 802bb4a:	b011      	add	sp, #68	@ 0x44
 802bb4c:	ecbd 8b02 	vpop	{d8}
 802bb50:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802bb54:	9b07      	ldr	r3, [sp, #28]
 802bb56:	2b01      	cmp	r3, #1
 802bb58:	f77f ae36 	ble.w	802b7c8 <_dtoa_r+0x6d8>
 802bb5c:	9b0a      	ldr	r3, [sp, #40]	@ 0x28
 802bb5e:	930b      	str	r3, [sp, #44]	@ 0x2c
 802bb60:	2001      	movs	r0, #1
 802bb62:	e656      	b.n	802b812 <_dtoa_r+0x722>
 802bb64:	f1bb 0f00 	cmp.w	fp, #0
 802bb68:	f77f aed7 	ble.w	802b91a <_dtoa_r+0x82a>
 802bb6c:	463e      	mov	r6, r7
 802bb6e:	9801      	ldr	r0, [sp, #4]
 802bb70:	4621      	mov	r1, r4
 802bb72:	f7ff fa33 	bl	802afdc <quorem>
 802bb76:	f100 0a30 	add.w	sl, r0, #48	@ 0x30
 802bb7a:	f806 ab01 	strb.w	sl, [r6], #1
 802bb7e:	1bf2      	subs	r2, r6, r7
 802bb80:	4593      	cmp	fp, r2
 802bb82:	ddb4      	ble.n	802baee <_dtoa_r+0x9fe>
 802bb84:	9901      	ldr	r1, [sp, #4]
 802bb86:	2300      	movs	r3, #0
 802bb88:	220a      	movs	r2, #10
 802bb8a:	4648      	mov	r0, r9
 802bb8c:	f000 fbfe 	bl	802c38c <__multadd>
 802bb90:	9001      	str	r0, [sp, #4]
 802bb92:	e7ec      	b.n	802bb6e <_dtoa_r+0xa7e>
 802bb94:	080321ae 	.word	0x080321ae
 802bb98:	08032149 	.word	0x08032149

0802bb9c <_free_r>:
 802bb9c:	b538      	push	{r3, r4, r5, lr}
 802bb9e:	4605      	mov	r5, r0
 802bba0:	2900      	cmp	r1, #0
 802bba2:	d041      	beq.n	802bc28 <_free_r+0x8c>
 802bba4:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802bba8:	1f0c      	subs	r4, r1, #4
 802bbaa:	2b00      	cmp	r3, #0
 802bbac:	bfb8      	it	lt
 802bbae:	18e4      	addlt	r4, r4, r3
 802bbb0:	f7fd fc1e 	bl	80293f0 <__malloc_lock>
 802bbb4:	4a1d      	ldr	r2, [pc, #116]	@ (802bc2c <_free_r+0x90>)
 802bbb6:	6813      	ldr	r3, [r2, #0]
 802bbb8:	b933      	cbnz	r3, 802bbc8 <_free_r+0x2c>
 802bbba:	6063      	str	r3, [r4, #4]
 802bbbc:	6014      	str	r4, [r2, #0]
 802bbbe:	4628      	mov	r0, r5
 802bbc0:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802bbc4:	f7fd bc1a 	b.w	80293fc <__malloc_unlock>
 802bbc8:	42a3      	cmp	r3, r4
 802bbca:	d908      	bls.n	802bbde <_free_r+0x42>
 802bbcc:	6820      	ldr	r0, [r4, #0]
 802bbce:	1821      	adds	r1, r4, r0
 802bbd0:	428b      	cmp	r3, r1
 802bbd2:	bf01      	itttt	eq
 802bbd4:	6819      	ldreq	r1, [r3, #0]
 802bbd6:	685b      	ldreq	r3, [r3, #4]
 802bbd8:	1809      	addeq	r1, r1, r0
 802bbda:	6021      	streq	r1, [r4, #0]
 802bbdc:	e7ed      	b.n	802bbba <_free_r+0x1e>
 802bbde:	461a      	mov	r2, r3
 802bbe0:	685b      	ldr	r3, [r3, #4]
 802bbe2:	b10b      	cbz	r3, 802bbe8 <_free_r+0x4c>
 802bbe4:	42a3      	cmp	r3, r4
 802bbe6:	d9fa      	bls.n	802bbde <_free_r+0x42>
 802bbe8:	6811      	ldr	r1, [r2, #0]
 802bbea:	1850      	adds	r0, r2, r1
 802bbec:	42a0      	cmp	r0, r4
 802bbee:	d10b      	bne.n	802bc08 <_free_r+0x6c>
 802bbf0:	6820      	ldr	r0, [r4, #0]
 802bbf2:	4401      	add	r1, r0
 802bbf4:	1850      	adds	r0, r2, r1
 802bbf6:	4283      	cmp	r3, r0
 802bbf8:	6011      	str	r1, [r2, #0]
 802bbfa:	d1e0      	bne.n	802bbbe <_free_r+0x22>
 802bbfc:	6818      	ldr	r0, [r3, #0]
 802bbfe:	685b      	ldr	r3, [r3, #4]
 802bc00:	6053      	str	r3, [r2, #4]
 802bc02:	4408      	add	r0, r1
 802bc04:	6010      	str	r0, [r2, #0]
 802bc06:	e7da      	b.n	802bbbe <_free_r+0x22>
 802bc08:	d902      	bls.n	802bc10 <_free_r+0x74>
 802bc0a:	230c      	movs	r3, #12
 802bc0c:	602b      	str	r3, [r5, #0]
 802bc0e:	e7d6      	b.n	802bbbe <_free_r+0x22>
 802bc10:	6820      	ldr	r0, [r4, #0]
 802bc12:	1821      	adds	r1, r4, r0
 802bc14:	428b      	cmp	r3, r1
 802bc16:	bf04      	itt	eq
 802bc18:	6819      	ldreq	r1, [r3, #0]
 802bc1a:	685b      	ldreq	r3, [r3, #4]
 802bc1c:	6063      	str	r3, [r4, #4]
 802bc1e:	bf04      	itt	eq
 802bc20:	1809      	addeq	r1, r1, r0
 802bc22:	6021      	streq	r1, [r4, #0]
 802bc24:	6054      	str	r4, [r2, #4]
 802bc26:	e7ca      	b.n	802bbbe <_free_r+0x22>
 802bc28:	bd38      	pop	{r3, r4, r5, pc}
 802bc2a:	bf00      	nop
 802bc2c:	2402b160 	.word	0x2402b160

0802bc30 <rshift>:
 802bc30:	6903      	ldr	r3, [r0, #16]
 802bc32:	ebb3 1f61 	cmp.w	r3, r1, asr #5
 802bc36:	e92d 43f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, lr}
 802bc3a:	ea4f 1261 	mov.w	r2, r1, asr #5
 802bc3e:	f100 0414 	add.w	r4, r0, #20
 802bc42:	dd45      	ble.n	802bcd0 <rshift+0xa0>
 802bc44:	f011 011f 	ands.w	r1, r1, #31
 802bc48:	eb04 0683 	add.w	r6, r4, r3, lsl #2
 802bc4c:	eb04 0582 	add.w	r5, r4, r2, lsl #2
 802bc50:	d10c      	bne.n	802bc6c <rshift+0x3c>
 802bc52:	f100 0710 	add.w	r7, r0, #16
 802bc56:	4629      	mov	r1, r5
 802bc58:	42b1      	cmp	r1, r6
 802bc5a:	d334      	bcc.n	802bcc6 <rshift+0x96>
 802bc5c:	1a9b      	subs	r3, r3, r2
 802bc5e:	009b      	lsls	r3, r3, #2
 802bc60:	1eea      	subs	r2, r5, #3
 802bc62:	4296      	cmp	r6, r2
 802bc64:	bf38      	it	cc
 802bc66:	2300      	movcc	r3, #0
 802bc68:	4423      	add	r3, r4
 802bc6a:	e015      	b.n	802bc98 <rshift+0x68>
 802bc6c:	f854 7022 	ldr.w	r7, [r4, r2, lsl #2]
 802bc70:	f1c1 0820 	rsb	r8, r1, #32
 802bc74:	40cf      	lsrs	r7, r1
 802bc76:	f105 0e04 	add.w	lr, r5, #4
 802bc7a:	46a1      	mov	r9, r4
 802bc7c:	4576      	cmp	r6, lr
 802bc7e:	46f4      	mov	ip, lr
 802bc80:	d815      	bhi.n	802bcae <rshift+0x7e>
 802bc82:	1a9a      	subs	r2, r3, r2
 802bc84:	0092      	lsls	r2, r2, #2
 802bc86:	3a04      	subs	r2, #4
 802bc88:	3501      	adds	r5, #1
 802bc8a:	42ae      	cmp	r6, r5
 802bc8c:	bf38      	it	cc
 802bc8e:	2200      	movcc	r2, #0
 802bc90:	18a3      	adds	r3, r4, r2
 802bc92:	50a7      	str	r7, [r4, r2]
 802bc94:	b107      	cbz	r7, 802bc98 <rshift+0x68>
 802bc96:	3304      	adds	r3, #4
 802bc98:	1b1a      	subs	r2, r3, r4
 802bc9a:	42a3      	cmp	r3, r4
 802bc9c:	ea4f 02a2 	mov.w	r2, r2, asr #2
 802bca0:	bf08      	it	eq
 802bca2:	2300      	moveq	r3, #0
 802bca4:	6102      	str	r2, [r0, #16]
 802bca6:	bf08      	it	eq
 802bca8:	6143      	streq	r3, [r0, #20]
 802bcaa:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802bcae:	f8dc c000 	ldr.w	ip, [ip]
 802bcb2:	fa0c fc08 	lsl.w	ip, ip, r8
 802bcb6:	ea4c 0707 	orr.w	r7, ip, r7
 802bcba:	f849 7b04 	str.w	r7, [r9], #4
 802bcbe:	f85e 7b04 	ldr.w	r7, [lr], #4
 802bcc2:	40cf      	lsrs	r7, r1
 802bcc4:	e7da      	b.n	802bc7c <rshift+0x4c>
 802bcc6:	f851 cb04 	ldr.w	ip, [r1], #4
 802bcca:	f847 cf04 	str.w	ip, [r7, #4]!
 802bcce:	e7c3      	b.n	802bc58 <rshift+0x28>
 802bcd0:	4623      	mov	r3, r4
 802bcd2:	e7e1      	b.n	802bc98 <rshift+0x68>

0802bcd4 <__hexdig_fun>:
 802bcd4:	f1a0 0330 	sub.w	r3, r0, #48	@ 0x30
 802bcd8:	2b09      	cmp	r3, #9
 802bcda:	d802      	bhi.n	802bce2 <__hexdig_fun+0xe>
 802bcdc:	3820      	subs	r0, #32
 802bcde:	b2c0      	uxtb	r0, r0
 802bce0:	4770      	bx	lr
 802bce2:	f1a0 0361 	sub.w	r3, r0, #97	@ 0x61
 802bce6:	2b05      	cmp	r3, #5
 802bce8:	d801      	bhi.n	802bcee <__hexdig_fun+0x1a>
 802bcea:	3847      	subs	r0, #71	@ 0x47
 802bcec:	e7f7      	b.n	802bcde <__hexdig_fun+0xa>
 802bcee:	f1a0 0341 	sub.w	r3, r0, #65	@ 0x41
 802bcf2:	2b05      	cmp	r3, #5
 802bcf4:	d801      	bhi.n	802bcfa <__hexdig_fun+0x26>
 802bcf6:	3827      	subs	r0, #39	@ 0x27
 802bcf8:	e7f1      	b.n	802bcde <__hexdig_fun+0xa>
 802bcfa:	2000      	movs	r0, #0
 802bcfc:	4770      	bx	lr
	...

0802bd00 <__gethex>:
 802bd00:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802bd04:	b085      	sub	sp, #20
 802bd06:	468a      	mov	sl, r1
 802bd08:	9302      	str	r3, [sp, #8]
 802bd0a:	680b      	ldr	r3, [r1, #0]
 802bd0c:	9001      	str	r0, [sp, #4]
 802bd0e:	4690      	mov	r8, r2
 802bd10:	1c9c      	adds	r4, r3, #2
 802bd12:	46a1      	mov	r9, r4
 802bd14:	f814 0b01 	ldrb.w	r0, [r4], #1
 802bd18:	2830      	cmp	r0, #48	@ 0x30
 802bd1a:	d0fa      	beq.n	802bd12 <__gethex+0x12>
 802bd1c:	eba9 0303 	sub.w	r3, r9, r3
 802bd20:	f1a3 0b02 	sub.w	fp, r3, #2
 802bd24:	f7ff ffd6 	bl	802bcd4 <__hexdig_fun>
 802bd28:	4605      	mov	r5, r0
 802bd2a:	2800      	cmp	r0, #0
 802bd2c:	d168      	bne.n	802be00 <__gethex+0x100>
 802bd2e:	49a0      	ldr	r1, [pc, #640]	@ (802bfb0 <__gethex+0x2b0>)
 802bd30:	2201      	movs	r2, #1
 802bd32:	4648      	mov	r0, r9
 802bd34:	f7ff f82c 	bl	802ad90 <strncmp>
 802bd38:	4607      	mov	r7, r0
 802bd3a:	2800      	cmp	r0, #0
 802bd3c:	d167      	bne.n	802be0e <__gethex+0x10e>
 802bd3e:	f899 0001 	ldrb.w	r0, [r9, #1]
 802bd42:	4626      	mov	r6, r4
 802bd44:	f7ff ffc6 	bl	802bcd4 <__hexdig_fun>
 802bd48:	2800      	cmp	r0, #0
 802bd4a:	d062      	beq.n	802be12 <__gethex+0x112>
 802bd4c:	4623      	mov	r3, r4
 802bd4e:	7818      	ldrb	r0, [r3, #0]
 802bd50:	2830      	cmp	r0, #48	@ 0x30
 802bd52:	4699      	mov	r9, r3
 802bd54:	f103 0301 	add.w	r3, r3, #1
 802bd58:	d0f9      	beq.n	802bd4e <__gethex+0x4e>
 802bd5a:	f7ff ffbb 	bl	802bcd4 <__hexdig_fun>
 802bd5e:	fab0 f580 	clz	r5, r0
 802bd62:	096d      	lsrs	r5, r5, #5
 802bd64:	f04f 0b01 	mov.w	fp, #1
 802bd68:	464a      	mov	r2, r9
 802bd6a:	4616      	mov	r6, r2
 802bd6c:	3201      	adds	r2, #1
 802bd6e:	7830      	ldrb	r0, [r6, #0]
 802bd70:	f7ff ffb0 	bl	802bcd4 <__hexdig_fun>
 802bd74:	2800      	cmp	r0, #0
 802bd76:	d1f8      	bne.n	802bd6a <__gethex+0x6a>
 802bd78:	498d      	ldr	r1, [pc, #564]	@ (802bfb0 <__gethex+0x2b0>)
 802bd7a:	2201      	movs	r2, #1
 802bd7c:	4630      	mov	r0, r6
 802bd7e:	f7ff f807 	bl	802ad90 <strncmp>
 802bd82:	2800      	cmp	r0, #0
 802bd84:	d13f      	bne.n	802be06 <__gethex+0x106>
 802bd86:	b944      	cbnz	r4, 802bd9a <__gethex+0x9a>
 802bd88:	1c74      	adds	r4, r6, #1
 802bd8a:	4622      	mov	r2, r4
 802bd8c:	4616      	mov	r6, r2
 802bd8e:	3201      	adds	r2, #1
 802bd90:	7830      	ldrb	r0, [r6, #0]
 802bd92:	f7ff ff9f 	bl	802bcd4 <__hexdig_fun>
 802bd96:	2800      	cmp	r0, #0
 802bd98:	d1f8      	bne.n	802bd8c <__gethex+0x8c>
 802bd9a:	1ba4      	subs	r4, r4, r6
 802bd9c:	00a7      	lsls	r7, r4, #2
 802bd9e:	7833      	ldrb	r3, [r6, #0]
 802bda0:	f003 03df 	and.w	r3, r3, #223	@ 0xdf
 802bda4:	2b50      	cmp	r3, #80	@ 0x50
 802bda6:	d13e      	bne.n	802be26 <__gethex+0x126>
 802bda8:	7873      	ldrb	r3, [r6, #1]
 802bdaa:	2b2b      	cmp	r3, #43	@ 0x2b
 802bdac:	d033      	beq.n	802be16 <__gethex+0x116>
 802bdae:	2b2d      	cmp	r3, #45	@ 0x2d
 802bdb0:	d034      	beq.n	802be1c <__gethex+0x11c>
 802bdb2:	1c71      	adds	r1, r6, #1
 802bdb4:	2400      	movs	r4, #0
 802bdb6:	7808      	ldrb	r0, [r1, #0]
 802bdb8:	f7ff ff8c 	bl	802bcd4 <__hexdig_fun>
 802bdbc:	1e43      	subs	r3, r0, #1
 802bdbe:	b2db      	uxtb	r3, r3
 802bdc0:	2b18      	cmp	r3, #24
 802bdc2:	d830      	bhi.n	802be26 <__gethex+0x126>
 802bdc4:	f1a0 0210 	sub.w	r2, r0, #16
 802bdc8:	f811 0f01 	ldrb.w	r0, [r1, #1]!
 802bdcc:	f7ff ff82 	bl	802bcd4 <__hexdig_fun>
 802bdd0:	f100 3cff 	add.w	ip, r0, #4294967295	@ 0xffffffff
 802bdd4:	fa5f fc8c 	uxtb.w	ip, ip
 802bdd8:	f1bc 0f18 	cmp.w	ip, #24
 802bddc:	f04f 030a 	mov.w	r3, #10
 802bde0:	d91e      	bls.n	802be20 <__gethex+0x120>
 802bde2:	b104      	cbz	r4, 802bde6 <__gethex+0xe6>
 802bde4:	4252      	negs	r2, r2
 802bde6:	4417      	add	r7, r2
 802bde8:	f8ca 1000 	str.w	r1, [sl]
 802bdec:	b1ed      	cbz	r5, 802be2a <__gethex+0x12a>
 802bdee:	f1bb 0f00 	cmp.w	fp, #0
 802bdf2:	bf0c      	ite	eq
 802bdf4:	2506      	moveq	r5, #6
 802bdf6:	2500      	movne	r5, #0
 802bdf8:	4628      	mov	r0, r5
 802bdfa:	b005      	add	sp, #20
 802bdfc:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802be00:	2500      	movs	r5, #0
 802be02:	462c      	mov	r4, r5
 802be04:	e7b0      	b.n	802bd68 <__gethex+0x68>
 802be06:	2c00      	cmp	r4, #0
 802be08:	d1c7      	bne.n	802bd9a <__gethex+0x9a>
 802be0a:	4627      	mov	r7, r4
 802be0c:	e7c7      	b.n	802bd9e <__gethex+0x9e>
 802be0e:	464e      	mov	r6, r9
 802be10:	462f      	mov	r7, r5
 802be12:	2501      	movs	r5, #1
 802be14:	e7c3      	b.n	802bd9e <__gethex+0x9e>
 802be16:	2400      	movs	r4, #0
 802be18:	1cb1      	adds	r1, r6, #2
 802be1a:	e7cc      	b.n	802bdb6 <__gethex+0xb6>
 802be1c:	2401      	movs	r4, #1
 802be1e:	e7fb      	b.n	802be18 <__gethex+0x118>
 802be20:	fb03 0002 	mla	r0, r3, r2, r0
 802be24:	e7ce      	b.n	802bdc4 <__gethex+0xc4>
 802be26:	4631      	mov	r1, r6
 802be28:	e7de      	b.n	802bde8 <__gethex+0xe8>
 802be2a:	eba6 0309 	sub.w	r3, r6, r9
 802be2e:	3b01      	subs	r3, #1
 802be30:	4629      	mov	r1, r5
 802be32:	2b07      	cmp	r3, #7
 802be34:	dc0a      	bgt.n	802be4c <__gethex+0x14c>
 802be36:	9801      	ldr	r0, [sp, #4]
 802be38:	f000 fa46 	bl	802c2c8 <_Balloc>
 802be3c:	4604      	mov	r4, r0
 802be3e:	b940      	cbnz	r0, 802be52 <__gethex+0x152>
 802be40:	4b5c      	ldr	r3, [pc, #368]	@ (802bfb4 <__gethex+0x2b4>)
 802be42:	4602      	mov	r2, r0
 802be44:	21e4      	movs	r1, #228	@ 0xe4
 802be46:	485c      	ldr	r0, [pc, #368]	@ (802bfb8 <__gethex+0x2b8>)
 802be48:	f7ff f8aa 	bl	802afa0 <__assert_func>
 802be4c:	3101      	adds	r1, #1
 802be4e:	105b      	asrs	r3, r3, #1
 802be50:	e7ef      	b.n	802be32 <__gethex+0x132>
 802be52:	f100 0a14 	add.w	sl, r0, #20
 802be56:	2300      	movs	r3, #0
 802be58:	4655      	mov	r5, sl
 802be5a:	469b      	mov	fp, r3
 802be5c:	45b1      	cmp	r9, r6
 802be5e:	d337      	bcc.n	802bed0 <__gethex+0x1d0>
 802be60:	f845 bb04 	str.w	fp, [r5], #4
 802be64:	eba5 050a 	sub.w	r5, r5, sl
 802be68:	10ad      	asrs	r5, r5, #2
 802be6a:	6125      	str	r5, [r4, #16]
 802be6c:	4658      	mov	r0, fp
 802be6e:	f000 fb1d 	bl	802c4ac <__hi0bits>
 802be72:	016d      	lsls	r5, r5, #5
 802be74:	f8d8 6000 	ldr.w	r6, [r8]
 802be78:	1a2d      	subs	r5, r5, r0
 802be7a:	42b5      	cmp	r5, r6
 802be7c:	dd54      	ble.n	802bf28 <__gethex+0x228>
 802be7e:	1bad      	subs	r5, r5, r6
 802be80:	4629      	mov	r1, r5
 802be82:	4620      	mov	r0, r4
 802be84:	f000 feae 	bl	802cbe4 <__any_on>
 802be88:	4681      	mov	r9, r0
 802be8a:	b178      	cbz	r0, 802beac <__gethex+0x1ac>
 802be8c:	1e6b      	subs	r3, r5, #1
 802be8e:	1159      	asrs	r1, r3, #5
 802be90:	f003 021f 	and.w	r2, r3, #31
 802be94:	f85a 1021 	ldr.w	r1, [sl, r1, lsl #2]
 802be98:	f04f 0901 	mov.w	r9, #1
 802be9c:	fa09 f202 	lsl.w	r2, r9, r2
 802bea0:	420a      	tst	r2, r1
 802bea2:	d003      	beq.n	802beac <__gethex+0x1ac>
 802bea4:	454b      	cmp	r3, r9
 802bea6:	dc36      	bgt.n	802bf16 <__gethex+0x216>
 802bea8:	f04f 0902 	mov.w	r9, #2
 802beac:	4629      	mov	r1, r5
 802beae:	4620      	mov	r0, r4
 802beb0:	f7ff febe 	bl	802bc30 <rshift>
 802beb4:	442f      	add	r7, r5
 802beb6:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802beba:	42bb      	cmp	r3, r7
 802bebc:	da42      	bge.n	802bf44 <__gethex+0x244>
 802bebe:	9801      	ldr	r0, [sp, #4]
 802bec0:	4621      	mov	r1, r4
 802bec2:	f000 fa41 	bl	802c348 <_Bfree>
 802bec6:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802bec8:	2300      	movs	r3, #0
 802beca:	6013      	str	r3, [r2, #0]
 802becc:	25a3      	movs	r5, #163	@ 0xa3
 802bece:	e793      	b.n	802bdf8 <__gethex+0xf8>
 802bed0:	f816 2d01 	ldrb.w	r2, [r6, #-1]!
 802bed4:	2a2e      	cmp	r2, #46	@ 0x2e
 802bed6:	d012      	beq.n	802befe <__gethex+0x1fe>
 802bed8:	2b20      	cmp	r3, #32
 802beda:	d104      	bne.n	802bee6 <__gethex+0x1e6>
 802bedc:	f845 bb04 	str.w	fp, [r5], #4
 802bee0:	f04f 0b00 	mov.w	fp, #0
 802bee4:	465b      	mov	r3, fp
 802bee6:	7830      	ldrb	r0, [r6, #0]
 802bee8:	9303      	str	r3, [sp, #12]
 802beea:	f7ff fef3 	bl	802bcd4 <__hexdig_fun>
 802beee:	9b03      	ldr	r3, [sp, #12]
 802bef0:	f000 000f 	and.w	r0, r0, #15
 802bef4:	4098      	lsls	r0, r3
 802bef6:	ea4b 0b00 	orr.w	fp, fp, r0
 802befa:	3304      	adds	r3, #4
 802befc:	e7ae      	b.n	802be5c <__gethex+0x15c>
 802befe:	45b1      	cmp	r9, r6
 802bf00:	d8ea      	bhi.n	802bed8 <__gethex+0x1d8>
 802bf02:	492b      	ldr	r1, [pc, #172]	@ (802bfb0 <__gethex+0x2b0>)
 802bf04:	9303      	str	r3, [sp, #12]
 802bf06:	2201      	movs	r2, #1
 802bf08:	4630      	mov	r0, r6
 802bf0a:	f7fe ff41 	bl	802ad90 <strncmp>
 802bf0e:	9b03      	ldr	r3, [sp, #12]
 802bf10:	2800      	cmp	r0, #0
 802bf12:	d1e1      	bne.n	802bed8 <__gethex+0x1d8>
 802bf14:	e7a2      	b.n	802be5c <__gethex+0x15c>
 802bf16:	1ea9      	subs	r1, r5, #2
 802bf18:	4620      	mov	r0, r4
 802bf1a:	f000 fe63 	bl	802cbe4 <__any_on>
 802bf1e:	2800      	cmp	r0, #0
 802bf20:	d0c2      	beq.n	802bea8 <__gethex+0x1a8>
 802bf22:	f04f 0903 	mov.w	r9, #3
 802bf26:	e7c1      	b.n	802beac <__gethex+0x1ac>
 802bf28:	da09      	bge.n	802bf3e <__gethex+0x23e>
 802bf2a:	1b75      	subs	r5, r6, r5
 802bf2c:	4621      	mov	r1, r4
 802bf2e:	9801      	ldr	r0, [sp, #4]
 802bf30:	462a      	mov	r2, r5
 802bf32:	f000 fc21 	bl	802c778 <__lshift>
 802bf36:	1b7f      	subs	r7, r7, r5
 802bf38:	4604      	mov	r4, r0
 802bf3a:	f100 0a14 	add.w	sl, r0, #20
 802bf3e:	f04f 0900 	mov.w	r9, #0
 802bf42:	e7b8      	b.n	802beb6 <__gethex+0x1b6>
 802bf44:	f8d8 5004 	ldr.w	r5, [r8, #4]
 802bf48:	42bd      	cmp	r5, r7
 802bf4a:	dd6f      	ble.n	802c02c <__gethex+0x32c>
 802bf4c:	1bed      	subs	r5, r5, r7
 802bf4e:	42ae      	cmp	r6, r5
 802bf50:	dc34      	bgt.n	802bfbc <__gethex+0x2bc>
 802bf52:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802bf56:	2b02      	cmp	r3, #2
 802bf58:	d022      	beq.n	802bfa0 <__gethex+0x2a0>
 802bf5a:	2b03      	cmp	r3, #3
 802bf5c:	d024      	beq.n	802bfa8 <__gethex+0x2a8>
 802bf5e:	2b01      	cmp	r3, #1
 802bf60:	d115      	bne.n	802bf8e <__gethex+0x28e>
 802bf62:	42ae      	cmp	r6, r5
 802bf64:	d113      	bne.n	802bf8e <__gethex+0x28e>
 802bf66:	2e01      	cmp	r6, #1
 802bf68:	d10b      	bne.n	802bf82 <__gethex+0x282>
 802bf6a:	9a02      	ldr	r2, [sp, #8]
 802bf6c:	f8d8 3004 	ldr.w	r3, [r8, #4]
 802bf70:	6013      	str	r3, [r2, #0]
 802bf72:	2301      	movs	r3, #1
 802bf74:	6123      	str	r3, [r4, #16]
 802bf76:	f8ca 3000 	str.w	r3, [sl]
 802bf7a:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802bf7c:	2562      	movs	r5, #98	@ 0x62
 802bf7e:	601c      	str	r4, [r3, #0]
 802bf80:	e73a      	b.n	802bdf8 <__gethex+0xf8>
 802bf82:	1e71      	subs	r1, r6, #1
 802bf84:	4620      	mov	r0, r4
 802bf86:	f000 fe2d 	bl	802cbe4 <__any_on>
 802bf8a:	2800      	cmp	r0, #0
 802bf8c:	d1ed      	bne.n	802bf6a <__gethex+0x26a>
 802bf8e:	9801      	ldr	r0, [sp, #4]
 802bf90:	4621      	mov	r1, r4
 802bf92:	f000 f9d9 	bl	802c348 <_Bfree>
 802bf96:	9a0e      	ldr	r2, [sp, #56]	@ 0x38
 802bf98:	2300      	movs	r3, #0
 802bf9a:	6013      	str	r3, [r2, #0]
 802bf9c:	2550      	movs	r5, #80	@ 0x50
 802bf9e:	e72b      	b.n	802bdf8 <__gethex+0xf8>
 802bfa0:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802bfa2:	2b00      	cmp	r3, #0
 802bfa4:	d1f3      	bne.n	802bf8e <__gethex+0x28e>
 802bfa6:	e7e0      	b.n	802bf6a <__gethex+0x26a>
 802bfa8:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802bfaa:	2b00      	cmp	r3, #0
 802bfac:	d1dd      	bne.n	802bf6a <__gethex+0x26a>
 802bfae:	e7ee      	b.n	802bf8e <__gethex+0x28e>
 802bfb0:	08031f7d 	.word	0x08031f7d
 802bfb4:	080321ae 	.word	0x080321ae
 802bfb8:	080321bf 	.word	0x080321bf
 802bfbc:	1e6f      	subs	r7, r5, #1
 802bfbe:	f1b9 0f00 	cmp.w	r9, #0
 802bfc2:	d130      	bne.n	802c026 <__gethex+0x326>
 802bfc4:	b127      	cbz	r7, 802bfd0 <__gethex+0x2d0>
 802bfc6:	4639      	mov	r1, r7
 802bfc8:	4620      	mov	r0, r4
 802bfca:	f000 fe0b 	bl	802cbe4 <__any_on>
 802bfce:	4681      	mov	r9, r0
 802bfd0:	117a      	asrs	r2, r7, #5
 802bfd2:	2301      	movs	r3, #1
 802bfd4:	f85a 2022 	ldr.w	r2, [sl, r2, lsl #2]
 802bfd8:	f007 071f 	and.w	r7, r7, #31
 802bfdc:	40bb      	lsls	r3, r7
 802bfde:	4213      	tst	r3, r2
 802bfe0:	4629      	mov	r1, r5
 802bfe2:	4620      	mov	r0, r4
 802bfe4:	bf18      	it	ne
 802bfe6:	f049 0902 	orrne.w	r9, r9, #2
 802bfea:	f7ff fe21 	bl	802bc30 <rshift>
 802bfee:	f8d8 7004 	ldr.w	r7, [r8, #4]
 802bff2:	1b76      	subs	r6, r6, r5
 802bff4:	2502      	movs	r5, #2
 802bff6:	f1b9 0f00 	cmp.w	r9, #0
 802bffa:	d047      	beq.n	802c08c <__gethex+0x38c>
 802bffc:	f8d8 300c 	ldr.w	r3, [r8, #12]
 802c000:	2b02      	cmp	r3, #2
 802c002:	d015      	beq.n	802c030 <__gethex+0x330>
 802c004:	2b03      	cmp	r3, #3
 802c006:	d017      	beq.n	802c038 <__gethex+0x338>
 802c008:	2b01      	cmp	r3, #1
 802c00a:	d109      	bne.n	802c020 <__gethex+0x320>
 802c00c:	f019 0f02 	tst.w	r9, #2
 802c010:	d006      	beq.n	802c020 <__gethex+0x320>
 802c012:	f8da 3000 	ldr.w	r3, [sl]
 802c016:	ea49 0903 	orr.w	r9, r9, r3
 802c01a:	f019 0f01 	tst.w	r9, #1
 802c01e:	d10e      	bne.n	802c03e <__gethex+0x33e>
 802c020:	f045 0510 	orr.w	r5, r5, #16
 802c024:	e032      	b.n	802c08c <__gethex+0x38c>
 802c026:	f04f 0901 	mov.w	r9, #1
 802c02a:	e7d1      	b.n	802bfd0 <__gethex+0x2d0>
 802c02c:	2501      	movs	r5, #1
 802c02e:	e7e2      	b.n	802bff6 <__gethex+0x2f6>
 802c030:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802c032:	f1c3 0301 	rsb	r3, r3, #1
 802c036:	930f      	str	r3, [sp, #60]	@ 0x3c
 802c038:	9b0f      	ldr	r3, [sp, #60]	@ 0x3c
 802c03a:	2b00      	cmp	r3, #0
 802c03c:	d0f0      	beq.n	802c020 <__gethex+0x320>
 802c03e:	f8d4 b010 	ldr.w	fp, [r4, #16]
 802c042:	f104 0314 	add.w	r3, r4, #20
 802c046:	ea4f 0a8b 	mov.w	sl, fp, lsl #2
 802c04a:	eb03 018b 	add.w	r1, r3, fp, lsl #2
 802c04e:	f04f 0c00 	mov.w	ip, #0
 802c052:	4618      	mov	r0, r3
 802c054:	f853 2b04 	ldr.w	r2, [r3], #4
 802c058:	f1b2 3fff 	cmp.w	r2, #4294967295	@ 0xffffffff
 802c05c:	d01b      	beq.n	802c096 <__gethex+0x396>
 802c05e:	3201      	adds	r2, #1
 802c060:	6002      	str	r2, [r0, #0]
 802c062:	2d02      	cmp	r5, #2
 802c064:	f104 0314 	add.w	r3, r4, #20
 802c068:	d13c      	bne.n	802c0e4 <__gethex+0x3e4>
 802c06a:	f8d8 2000 	ldr.w	r2, [r8]
 802c06e:	3a01      	subs	r2, #1
 802c070:	42b2      	cmp	r2, r6
 802c072:	d109      	bne.n	802c088 <__gethex+0x388>
 802c074:	1171      	asrs	r1, r6, #5
 802c076:	2201      	movs	r2, #1
 802c078:	f853 3021 	ldr.w	r3, [r3, r1, lsl #2]
 802c07c:	f006 061f 	and.w	r6, r6, #31
 802c080:	fa02 f606 	lsl.w	r6, r2, r6
 802c084:	421e      	tst	r6, r3
 802c086:	d13a      	bne.n	802c0fe <__gethex+0x3fe>
 802c088:	f045 0520 	orr.w	r5, r5, #32
 802c08c:	9b0e      	ldr	r3, [sp, #56]	@ 0x38
 802c08e:	601c      	str	r4, [r3, #0]
 802c090:	9b02      	ldr	r3, [sp, #8]
 802c092:	601f      	str	r7, [r3, #0]
 802c094:	e6b0      	b.n	802bdf8 <__gethex+0xf8>
 802c096:	4299      	cmp	r1, r3
 802c098:	f843 cc04 	str.w	ip, [r3, #-4]
 802c09c:	d8d9      	bhi.n	802c052 <__gethex+0x352>
 802c09e:	68a3      	ldr	r3, [r4, #8]
 802c0a0:	459b      	cmp	fp, r3
 802c0a2:	db17      	blt.n	802c0d4 <__gethex+0x3d4>
 802c0a4:	6861      	ldr	r1, [r4, #4]
 802c0a6:	9801      	ldr	r0, [sp, #4]
 802c0a8:	3101      	adds	r1, #1
 802c0aa:	f000 f90d 	bl	802c2c8 <_Balloc>
 802c0ae:	4681      	mov	r9, r0
 802c0b0:	b918      	cbnz	r0, 802c0ba <__gethex+0x3ba>
 802c0b2:	4b1a      	ldr	r3, [pc, #104]	@ (802c11c <__gethex+0x41c>)
 802c0b4:	4602      	mov	r2, r0
 802c0b6:	2184      	movs	r1, #132	@ 0x84
 802c0b8:	e6c5      	b.n	802be46 <__gethex+0x146>
 802c0ba:	6922      	ldr	r2, [r4, #16]
 802c0bc:	3202      	adds	r2, #2
 802c0be:	f104 010c 	add.w	r1, r4, #12
 802c0c2:	0092      	lsls	r2, r2, #2
 802c0c4:	300c      	adds	r0, #12
 802c0c6:	f7fe ff52 	bl	802af6e <memcpy>
 802c0ca:	4621      	mov	r1, r4
 802c0cc:	9801      	ldr	r0, [sp, #4]
 802c0ce:	f000 f93b 	bl	802c348 <_Bfree>
 802c0d2:	464c      	mov	r4, r9
 802c0d4:	6923      	ldr	r3, [r4, #16]
 802c0d6:	1c5a      	adds	r2, r3, #1
 802c0d8:	eb04 0383 	add.w	r3, r4, r3, lsl #2
 802c0dc:	6122      	str	r2, [r4, #16]
 802c0de:	2201      	movs	r2, #1
 802c0e0:	615a      	str	r2, [r3, #20]
 802c0e2:	e7be      	b.n	802c062 <__gethex+0x362>
 802c0e4:	6922      	ldr	r2, [r4, #16]
 802c0e6:	455a      	cmp	r2, fp
 802c0e8:	dd0b      	ble.n	802c102 <__gethex+0x402>
 802c0ea:	2101      	movs	r1, #1
 802c0ec:	4620      	mov	r0, r4
 802c0ee:	f7ff fd9f 	bl	802bc30 <rshift>
 802c0f2:	f8d8 3008 	ldr.w	r3, [r8, #8]
 802c0f6:	3701      	adds	r7, #1
 802c0f8:	42bb      	cmp	r3, r7
 802c0fa:	f6ff aee0 	blt.w	802bebe <__gethex+0x1be>
 802c0fe:	2501      	movs	r5, #1
 802c100:	e7c2      	b.n	802c088 <__gethex+0x388>
 802c102:	f016 061f 	ands.w	r6, r6, #31
 802c106:	d0fa      	beq.n	802c0fe <__gethex+0x3fe>
 802c108:	4453      	add	r3, sl
 802c10a:	f1c6 0620 	rsb	r6, r6, #32
 802c10e:	f853 0c04 	ldr.w	r0, [r3, #-4]
 802c112:	f000 f9cb 	bl	802c4ac <__hi0bits>
 802c116:	42b0      	cmp	r0, r6
 802c118:	dbe7      	blt.n	802c0ea <__gethex+0x3ea>
 802c11a:	e7f0      	b.n	802c0fe <__gethex+0x3fe>
 802c11c:	080321ae 	.word	0x080321ae

0802c120 <L_shift>:
 802c120:	f1c2 0208 	rsb	r2, r2, #8
 802c124:	0092      	lsls	r2, r2, #2
 802c126:	b570      	push	{r4, r5, r6, lr}
 802c128:	f1c2 0620 	rsb	r6, r2, #32
 802c12c:	6843      	ldr	r3, [r0, #4]
 802c12e:	6804      	ldr	r4, [r0, #0]
 802c130:	fa03 f506 	lsl.w	r5, r3, r6
 802c134:	432c      	orrs	r4, r5
 802c136:	40d3      	lsrs	r3, r2
 802c138:	6004      	str	r4, [r0, #0]
 802c13a:	f840 3f04 	str.w	r3, [r0, #4]!
 802c13e:	4288      	cmp	r0, r1
 802c140:	d3f4      	bcc.n	802c12c <L_shift+0xc>
 802c142:	bd70      	pop	{r4, r5, r6, pc}

0802c144 <__match>:
 802c144:	b530      	push	{r4, r5, lr}
 802c146:	6803      	ldr	r3, [r0, #0]
 802c148:	3301      	adds	r3, #1
 802c14a:	f811 4b01 	ldrb.w	r4, [r1], #1
 802c14e:	b914      	cbnz	r4, 802c156 <__match+0x12>
 802c150:	6003      	str	r3, [r0, #0]
 802c152:	2001      	movs	r0, #1
 802c154:	bd30      	pop	{r4, r5, pc}
 802c156:	f813 2b01 	ldrb.w	r2, [r3], #1
 802c15a:	f1a2 0541 	sub.w	r5, r2, #65	@ 0x41
 802c15e:	2d19      	cmp	r5, #25
 802c160:	bf98      	it	ls
 802c162:	3220      	addls	r2, #32
 802c164:	42a2      	cmp	r2, r4
 802c166:	d0f0      	beq.n	802c14a <__match+0x6>
 802c168:	2000      	movs	r0, #0
 802c16a:	e7f3      	b.n	802c154 <__match+0x10>

0802c16c <__hexnan>:
 802c16c:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802c170:	680b      	ldr	r3, [r1, #0]
 802c172:	6801      	ldr	r1, [r0, #0]
 802c174:	115e      	asrs	r6, r3, #5
 802c176:	eb02 0686 	add.w	r6, r2, r6, lsl #2
 802c17a:	f013 031f 	ands.w	r3, r3, #31
 802c17e:	b087      	sub	sp, #28
 802c180:	bf18      	it	ne
 802c182:	3604      	addne	r6, #4
 802c184:	2500      	movs	r5, #0
 802c186:	1f37      	subs	r7, r6, #4
 802c188:	4682      	mov	sl, r0
 802c18a:	4690      	mov	r8, r2
 802c18c:	9301      	str	r3, [sp, #4]
 802c18e:	f846 5c04 	str.w	r5, [r6, #-4]
 802c192:	46b9      	mov	r9, r7
 802c194:	463c      	mov	r4, r7
 802c196:	9502      	str	r5, [sp, #8]
 802c198:	46ab      	mov	fp, r5
 802c19a:	784a      	ldrb	r2, [r1, #1]
 802c19c:	1c4b      	adds	r3, r1, #1
 802c19e:	9303      	str	r3, [sp, #12]
 802c1a0:	b342      	cbz	r2, 802c1f4 <__hexnan+0x88>
 802c1a2:	4610      	mov	r0, r2
 802c1a4:	9105      	str	r1, [sp, #20]
 802c1a6:	9204      	str	r2, [sp, #16]
 802c1a8:	f7ff fd94 	bl	802bcd4 <__hexdig_fun>
 802c1ac:	2800      	cmp	r0, #0
 802c1ae:	d151      	bne.n	802c254 <__hexnan+0xe8>
 802c1b0:	9a04      	ldr	r2, [sp, #16]
 802c1b2:	9905      	ldr	r1, [sp, #20]
 802c1b4:	2a20      	cmp	r2, #32
 802c1b6:	d818      	bhi.n	802c1ea <__hexnan+0x7e>
 802c1b8:	9b02      	ldr	r3, [sp, #8]
 802c1ba:	459b      	cmp	fp, r3
 802c1bc:	dd13      	ble.n	802c1e6 <__hexnan+0x7a>
 802c1be:	454c      	cmp	r4, r9
 802c1c0:	d206      	bcs.n	802c1d0 <__hexnan+0x64>
 802c1c2:	2d07      	cmp	r5, #7
 802c1c4:	dc04      	bgt.n	802c1d0 <__hexnan+0x64>
 802c1c6:	462a      	mov	r2, r5
 802c1c8:	4649      	mov	r1, r9
 802c1ca:	4620      	mov	r0, r4
 802c1cc:	f7ff ffa8 	bl	802c120 <L_shift>
 802c1d0:	4544      	cmp	r4, r8
 802c1d2:	d952      	bls.n	802c27a <__hexnan+0x10e>
 802c1d4:	2300      	movs	r3, #0
 802c1d6:	f1a4 0904 	sub.w	r9, r4, #4
 802c1da:	f844 3c04 	str.w	r3, [r4, #-4]
 802c1de:	f8cd b008 	str.w	fp, [sp, #8]
 802c1e2:	464c      	mov	r4, r9
 802c1e4:	461d      	mov	r5, r3
 802c1e6:	9903      	ldr	r1, [sp, #12]
 802c1e8:	e7d7      	b.n	802c19a <__hexnan+0x2e>
 802c1ea:	2a29      	cmp	r2, #41	@ 0x29
 802c1ec:	d157      	bne.n	802c29e <__hexnan+0x132>
 802c1ee:	3102      	adds	r1, #2
 802c1f0:	f8ca 1000 	str.w	r1, [sl]
 802c1f4:	f1bb 0f00 	cmp.w	fp, #0
 802c1f8:	d051      	beq.n	802c29e <__hexnan+0x132>
 802c1fa:	454c      	cmp	r4, r9
 802c1fc:	d206      	bcs.n	802c20c <__hexnan+0xa0>
 802c1fe:	2d07      	cmp	r5, #7
 802c200:	dc04      	bgt.n	802c20c <__hexnan+0xa0>
 802c202:	462a      	mov	r2, r5
 802c204:	4649      	mov	r1, r9
 802c206:	4620      	mov	r0, r4
 802c208:	f7ff ff8a 	bl	802c120 <L_shift>
 802c20c:	4544      	cmp	r4, r8
 802c20e:	d936      	bls.n	802c27e <__hexnan+0x112>
 802c210:	f1a8 0204 	sub.w	r2, r8, #4
 802c214:	4623      	mov	r3, r4
 802c216:	f853 1b04 	ldr.w	r1, [r3], #4
 802c21a:	f842 1f04 	str.w	r1, [r2, #4]!
 802c21e:	429f      	cmp	r7, r3
 802c220:	d2f9      	bcs.n	802c216 <__hexnan+0xaa>
 802c222:	1b3b      	subs	r3, r7, r4
 802c224:	f023 0303 	bic.w	r3, r3, #3
 802c228:	3304      	adds	r3, #4
 802c22a:	3401      	adds	r4, #1
 802c22c:	3e03      	subs	r6, #3
 802c22e:	42b4      	cmp	r4, r6
 802c230:	bf88      	it	hi
 802c232:	2304      	movhi	r3, #4
 802c234:	4443      	add	r3, r8
 802c236:	2200      	movs	r2, #0
 802c238:	f843 2b04 	str.w	r2, [r3], #4
 802c23c:	429f      	cmp	r7, r3
 802c23e:	d2fb      	bcs.n	802c238 <__hexnan+0xcc>
 802c240:	683b      	ldr	r3, [r7, #0]
 802c242:	b91b      	cbnz	r3, 802c24c <__hexnan+0xe0>
 802c244:	4547      	cmp	r7, r8
 802c246:	d128      	bne.n	802c29a <__hexnan+0x12e>
 802c248:	2301      	movs	r3, #1
 802c24a:	603b      	str	r3, [r7, #0]
 802c24c:	2005      	movs	r0, #5
 802c24e:	b007      	add	sp, #28
 802c250:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802c254:	3501      	adds	r5, #1
 802c256:	2d08      	cmp	r5, #8
 802c258:	f10b 0b01 	add.w	fp, fp, #1
 802c25c:	dd06      	ble.n	802c26c <__hexnan+0x100>
 802c25e:	4544      	cmp	r4, r8
 802c260:	d9c1      	bls.n	802c1e6 <__hexnan+0x7a>
 802c262:	2300      	movs	r3, #0
 802c264:	f844 3c04 	str.w	r3, [r4, #-4]
 802c268:	2501      	movs	r5, #1
 802c26a:	3c04      	subs	r4, #4
 802c26c:	6822      	ldr	r2, [r4, #0]
 802c26e:	f000 000f 	and.w	r0, r0, #15
 802c272:	ea40 1002 	orr.w	r0, r0, r2, lsl #4
 802c276:	6020      	str	r0, [r4, #0]
 802c278:	e7b5      	b.n	802c1e6 <__hexnan+0x7a>
 802c27a:	2508      	movs	r5, #8
 802c27c:	e7b3      	b.n	802c1e6 <__hexnan+0x7a>
 802c27e:	9b01      	ldr	r3, [sp, #4]
 802c280:	2b00      	cmp	r3, #0
 802c282:	d0dd      	beq.n	802c240 <__hexnan+0xd4>
 802c284:	f1c3 0320 	rsb	r3, r3, #32
 802c288:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802c28c:	40da      	lsrs	r2, r3
 802c28e:	f856 3c04 	ldr.w	r3, [r6, #-4]
 802c292:	4013      	ands	r3, r2
 802c294:	f846 3c04 	str.w	r3, [r6, #-4]
 802c298:	e7d2      	b.n	802c240 <__hexnan+0xd4>
 802c29a:	3f04      	subs	r7, #4
 802c29c:	e7d0      	b.n	802c240 <__hexnan+0xd4>
 802c29e:	2004      	movs	r0, #4
 802c2a0:	e7d5      	b.n	802c24e <__hexnan+0xe2>

0802c2a2 <__ascii_mbtowc>:
 802c2a2:	b082      	sub	sp, #8
 802c2a4:	b901      	cbnz	r1, 802c2a8 <__ascii_mbtowc+0x6>
 802c2a6:	a901      	add	r1, sp, #4
 802c2a8:	b142      	cbz	r2, 802c2bc <__ascii_mbtowc+0x1a>
 802c2aa:	b14b      	cbz	r3, 802c2c0 <__ascii_mbtowc+0x1e>
 802c2ac:	7813      	ldrb	r3, [r2, #0]
 802c2ae:	600b      	str	r3, [r1, #0]
 802c2b0:	7812      	ldrb	r2, [r2, #0]
 802c2b2:	1e10      	subs	r0, r2, #0
 802c2b4:	bf18      	it	ne
 802c2b6:	2001      	movne	r0, #1
 802c2b8:	b002      	add	sp, #8
 802c2ba:	4770      	bx	lr
 802c2bc:	4610      	mov	r0, r2
 802c2be:	e7fb      	b.n	802c2b8 <__ascii_mbtowc+0x16>
 802c2c0:	f06f 0001 	mvn.w	r0, #1
 802c2c4:	e7f8      	b.n	802c2b8 <__ascii_mbtowc+0x16>
	...

0802c2c8 <_Balloc>:
 802c2c8:	b570      	push	{r4, r5, r6, lr}
 802c2ca:	69c6      	ldr	r6, [r0, #28]
 802c2cc:	4604      	mov	r4, r0
 802c2ce:	460d      	mov	r5, r1
 802c2d0:	b976      	cbnz	r6, 802c2f0 <_Balloc+0x28>
 802c2d2:	2010      	movs	r0, #16
 802c2d4:	f7fc ffda 	bl	802928c <malloc>
 802c2d8:	4602      	mov	r2, r0
 802c2da:	61e0      	str	r0, [r4, #28]
 802c2dc:	b920      	cbnz	r0, 802c2e8 <_Balloc+0x20>
 802c2de:	4b18      	ldr	r3, [pc, #96]	@ (802c340 <_Balloc+0x78>)
 802c2e0:	4818      	ldr	r0, [pc, #96]	@ (802c344 <_Balloc+0x7c>)
 802c2e2:	216b      	movs	r1, #107	@ 0x6b
 802c2e4:	f7fe fe5c 	bl	802afa0 <__assert_func>
 802c2e8:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802c2ec:	6006      	str	r6, [r0, #0]
 802c2ee:	60c6      	str	r6, [r0, #12]
 802c2f0:	69e6      	ldr	r6, [r4, #28]
 802c2f2:	68f3      	ldr	r3, [r6, #12]
 802c2f4:	b183      	cbz	r3, 802c318 <_Balloc+0x50>
 802c2f6:	69e3      	ldr	r3, [r4, #28]
 802c2f8:	68db      	ldr	r3, [r3, #12]
 802c2fa:	f853 0025 	ldr.w	r0, [r3, r5, lsl #2]
 802c2fe:	b9b8      	cbnz	r0, 802c330 <_Balloc+0x68>
 802c300:	2101      	movs	r1, #1
 802c302:	fa01 f605 	lsl.w	r6, r1, r5
 802c306:	1d72      	adds	r2, r6, #5
 802c308:	0092      	lsls	r2, r2, #2
 802c30a:	4620      	mov	r0, r4
 802c30c:	f001 f883 	bl	802d416 <_calloc_r>
 802c310:	b160      	cbz	r0, 802c32c <_Balloc+0x64>
 802c312:	e9c0 5601 	strd	r5, r6, [r0, #4]
 802c316:	e00e      	b.n	802c336 <_Balloc+0x6e>
 802c318:	2221      	movs	r2, #33	@ 0x21
 802c31a:	2104      	movs	r1, #4
 802c31c:	4620      	mov	r0, r4
 802c31e:	f001 f87a 	bl	802d416 <_calloc_r>
 802c322:	69e3      	ldr	r3, [r4, #28]
 802c324:	60f0      	str	r0, [r6, #12]
 802c326:	68db      	ldr	r3, [r3, #12]
 802c328:	2b00      	cmp	r3, #0
 802c32a:	d1e4      	bne.n	802c2f6 <_Balloc+0x2e>
 802c32c:	2000      	movs	r0, #0
 802c32e:	bd70      	pop	{r4, r5, r6, pc}
 802c330:	6802      	ldr	r2, [r0, #0]
 802c332:	f843 2025 	str.w	r2, [r3, r5, lsl #2]
 802c336:	2300      	movs	r3, #0
 802c338:	e9c0 3303 	strd	r3, r3, [r0, #12]
 802c33c:	e7f7      	b.n	802c32e <_Balloc+0x66>
 802c33e:	bf00      	nop
 802c340:	08031f0e 	.word	0x08031f0e
 802c344:	0803221f 	.word	0x0803221f

0802c348 <_Bfree>:
 802c348:	b570      	push	{r4, r5, r6, lr}
 802c34a:	69c6      	ldr	r6, [r0, #28]
 802c34c:	4605      	mov	r5, r0
 802c34e:	460c      	mov	r4, r1
 802c350:	b976      	cbnz	r6, 802c370 <_Bfree+0x28>
 802c352:	2010      	movs	r0, #16
 802c354:	f7fc ff9a 	bl	802928c <malloc>
 802c358:	4602      	mov	r2, r0
 802c35a:	61e8      	str	r0, [r5, #28]
 802c35c:	b920      	cbnz	r0, 802c368 <_Bfree+0x20>
 802c35e:	4b09      	ldr	r3, [pc, #36]	@ (802c384 <_Bfree+0x3c>)
 802c360:	4809      	ldr	r0, [pc, #36]	@ (802c388 <_Bfree+0x40>)
 802c362:	218f      	movs	r1, #143	@ 0x8f
 802c364:	f7fe fe1c 	bl	802afa0 <__assert_func>
 802c368:	e9c0 6601 	strd	r6, r6, [r0, #4]
 802c36c:	6006      	str	r6, [r0, #0]
 802c36e:	60c6      	str	r6, [r0, #12]
 802c370:	b13c      	cbz	r4, 802c382 <_Bfree+0x3a>
 802c372:	69eb      	ldr	r3, [r5, #28]
 802c374:	6862      	ldr	r2, [r4, #4]
 802c376:	68db      	ldr	r3, [r3, #12]
 802c378:	f853 1022 	ldr.w	r1, [r3, r2, lsl #2]
 802c37c:	6021      	str	r1, [r4, #0]
 802c37e:	f843 4022 	str.w	r4, [r3, r2, lsl #2]
 802c382:	bd70      	pop	{r4, r5, r6, pc}
 802c384:	08031f0e 	.word	0x08031f0e
 802c388:	0803221f 	.word	0x0803221f

0802c38c <__multadd>:
 802c38c:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802c390:	690d      	ldr	r5, [r1, #16]
 802c392:	4607      	mov	r7, r0
 802c394:	460c      	mov	r4, r1
 802c396:	461e      	mov	r6, r3
 802c398:	f101 0c14 	add.w	ip, r1, #20
 802c39c:	2000      	movs	r0, #0
 802c39e:	f8dc 3000 	ldr.w	r3, [ip]
 802c3a2:	b299      	uxth	r1, r3
 802c3a4:	fb02 6101 	mla	r1, r2, r1, r6
 802c3a8:	0c1e      	lsrs	r6, r3, #16
 802c3aa:	0c0b      	lsrs	r3, r1, #16
 802c3ac:	fb02 3306 	mla	r3, r2, r6, r3
 802c3b0:	b289      	uxth	r1, r1
 802c3b2:	3001      	adds	r0, #1
 802c3b4:	eb01 4103 	add.w	r1, r1, r3, lsl #16
 802c3b8:	4285      	cmp	r5, r0
 802c3ba:	f84c 1b04 	str.w	r1, [ip], #4
 802c3be:	ea4f 4613 	mov.w	r6, r3, lsr #16
 802c3c2:	dcec      	bgt.n	802c39e <__multadd+0x12>
 802c3c4:	b30e      	cbz	r6, 802c40a <__multadd+0x7e>
 802c3c6:	68a3      	ldr	r3, [r4, #8]
 802c3c8:	42ab      	cmp	r3, r5
 802c3ca:	dc19      	bgt.n	802c400 <__multadd+0x74>
 802c3cc:	6861      	ldr	r1, [r4, #4]
 802c3ce:	4638      	mov	r0, r7
 802c3d0:	3101      	adds	r1, #1
 802c3d2:	f7ff ff79 	bl	802c2c8 <_Balloc>
 802c3d6:	4680      	mov	r8, r0
 802c3d8:	b928      	cbnz	r0, 802c3e6 <__multadd+0x5a>
 802c3da:	4602      	mov	r2, r0
 802c3dc:	4b0c      	ldr	r3, [pc, #48]	@ (802c410 <__multadd+0x84>)
 802c3de:	480d      	ldr	r0, [pc, #52]	@ (802c414 <__multadd+0x88>)
 802c3e0:	21ba      	movs	r1, #186	@ 0xba
 802c3e2:	f7fe fddd 	bl	802afa0 <__assert_func>
 802c3e6:	6922      	ldr	r2, [r4, #16]
 802c3e8:	3202      	adds	r2, #2
 802c3ea:	f104 010c 	add.w	r1, r4, #12
 802c3ee:	0092      	lsls	r2, r2, #2
 802c3f0:	300c      	adds	r0, #12
 802c3f2:	f7fe fdbc 	bl	802af6e <memcpy>
 802c3f6:	4621      	mov	r1, r4
 802c3f8:	4638      	mov	r0, r7
 802c3fa:	f7ff ffa5 	bl	802c348 <_Bfree>
 802c3fe:	4644      	mov	r4, r8
 802c400:	eb04 0385 	add.w	r3, r4, r5, lsl #2
 802c404:	3501      	adds	r5, #1
 802c406:	615e      	str	r6, [r3, #20]
 802c408:	6125      	str	r5, [r4, #16]
 802c40a:	4620      	mov	r0, r4
 802c40c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802c410:	080321ae 	.word	0x080321ae
 802c414:	0803221f 	.word	0x0803221f

0802c418 <__s2b>:
 802c418:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802c41c:	460c      	mov	r4, r1
 802c41e:	4615      	mov	r5, r2
 802c420:	461f      	mov	r7, r3
 802c422:	2209      	movs	r2, #9
 802c424:	3308      	adds	r3, #8
 802c426:	4606      	mov	r6, r0
 802c428:	fb93 f3f2 	sdiv	r3, r3, r2
 802c42c:	2100      	movs	r1, #0
 802c42e:	2201      	movs	r2, #1
 802c430:	429a      	cmp	r2, r3
 802c432:	db09      	blt.n	802c448 <__s2b+0x30>
 802c434:	4630      	mov	r0, r6
 802c436:	f7ff ff47 	bl	802c2c8 <_Balloc>
 802c43a:	b940      	cbnz	r0, 802c44e <__s2b+0x36>
 802c43c:	4602      	mov	r2, r0
 802c43e:	4b19      	ldr	r3, [pc, #100]	@ (802c4a4 <__s2b+0x8c>)
 802c440:	4819      	ldr	r0, [pc, #100]	@ (802c4a8 <__s2b+0x90>)
 802c442:	21d3      	movs	r1, #211	@ 0xd3
 802c444:	f7fe fdac 	bl	802afa0 <__assert_func>
 802c448:	0052      	lsls	r2, r2, #1
 802c44a:	3101      	adds	r1, #1
 802c44c:	e7f0      	b.n	802c430 <__s2b+0x18>
 802c44e:	9b08      	ldr	r3, [sp, #32]
 802c450:	6143      	str	r3, [r0, #20]
 802c452:	2d09      	cmp	r5, #9
 802c454:	f04f 0301 	mov.w	r3, #1
 802c458:	6103      	str	r3, [r0, #16]
 802c45a:	dd16      	ble.n	802c48a <__s2b+0x72>
 802c45c:	f104 0909 	add.w	r9, r4, #9
 802c460:	46c8      	mov	r8, r9
 802c462:	442c      	add	r4, r5
 802c464:	f818 3b01 	ldrb.w	r3, [r8], #1
 802c468:	4601      	mov	r1, r0
 802c46a:	3b30      	subs	r3, #48	@ 0x30
 802c46c:	220a      	movs	r2, #10
 802c46e:	4630      	mov	r0, r6
 802c470:	f7ff ff8c 	bl	802c38c <__multadd>
 802c474:	45a0      	cmp	r8, r4
 802c476:	d1f5      	bne.n	802c464 <__s2b+0x4c>
 802c478:	f1a5 0408 	sub.w	r4, r5, #8
 802c47c:	444c      	add	r4, r9
 802c47e:	1b2d      	subs	r5, r5, r4
 802c480:	1963      	adds	r3, r4, r5
 802c482:	42bb      	cmp	r3, r7
 802c484:	db04      	blt.n	802c490 <__s2b+0x78>
 802c486:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802c48a:	340a      	adds	r4, #10
 802c48c:	2509      	movs	r5, #9
 802c48e:	e7f6      	b.n	802c47e <__s2b+0x66>
 802c490:	f814 3b01 	ldrb.w	r3, [r4], #1
 802c494:	4601      	mov	r1, r0
 802c496:	3b30      	subs	r3, #48	@ 0x30
 802c498:	220a      	movs	r2, #10
 802c49a:	4630      	mov	r0, r6
 802c49c:	f7ff ff76 	bl	802c38c <__multadd>
 802c4a0:	e7ee      	b.n	802c480 <__s2b+0x68>
 802c4a2:	bf00      	nop
 802c4a4:	080321ae 	.word	0x080321ae
 802c4a8:	0803221f 	.word	0x0803221f

0802c4ac <__hi0bits>:
 802c4ac:	f5b0 3f80 	cmp.w	r0, #65536	@ 0x10000
 802c4b0:	4603      	mov	r3, r0
 802c4b2:	bf36      	itet	cc
 802c4b4:	0403      	lslcc	r3, r0, #16
 802c4b6:	2000      	movcs	r0, #0
 802c4b8:	2010      	movcc	r0, #16
 802c4ba:	f1b3 7f80 	cmp.w	r3, #16777216	@ 0x1000000
 802c4be:	bf3c      	itt	cc
 802c4c0:	021b      	lslcc	r3, r3, #8
 802c4c2:	3008      	addcc	r0, #8
 802c4c4:	f1b3 5f80 	cmp.w	r3, #268435456	@ 0x10000000
 802c4c8:	bf3c      	itt	cc
 802c4ca:	011b      	lslcc	r3, r3, #4
 802c4cc:	3004      	addcc	r0, #4
 802c4ce:	f1b3 4f80 	cmp.w	r3, #1073741824	@ 0x40000000
 802c4d2:	bf3c      	itt	cc
 802c4d4:	009b      	lslcc	r3, r3, #2
 802c4d6:	3002      	addcc	r0, #2
 802c4d8:	2b00      	cmp	r3, #0
 802c4da:	db05      	blt.n	802c4e8 <__hi0bits+0x3c>
 802c4dc:	f013 4f80 	tst.w	r3, #1073741824	@ 0x40000000
 802c4e0:	f100 0001 	add.w	r0, r0, #1
 802c4e4:	bf08      	it	eq
 802c4e6:	2020      	moveq	r0, #32
 802c4e8:	4770      	bx	lr

0802c4ea <__lo0bits>:
 802c4ea:	6803      	ldr	r3, [r0, #0]
 802c4ec:	4602      	mov	r2, r0
 802c4ee:	f013 0007 	ands.w	r0, r3, #7
 802c4f2:	d00b      	beq.n	802c50c <__lo0bits+0x22>
 802c4f4:	07d9      	lsls	r1, r3, #31
 802c4f6:	d421      	bmi.n	802c53c <__lo0bits+0x52>
 802c4f8:	0798      	lsls	r0, r3, #30
 802c4fa:	bf49      	itett	mi
 802c4fc:	085b      	lsrmi	r3, r3, #1
 802c4fe:	089b      	lsrpl	r3, r3, #2
 802c500:	2001      	movmi	r0, #1
 802c502:	6013      	strmi	r3, [r2, #0]
 802c504:	bf5c      	itt	pl
 802c506:	6013      	strpl	r3, [r2, #0]
 802c508:	2002      	movpl	r0, #2
 802c50a:	4770      	bx	lr
 802c50c:	b299      	uxth	r1, r3
 802c50e:	b909      	cbnz	r1, 802c514 <__lo0bits+0x2a>
 802c510:	0c1b      	lsrs	r3, r3, #16
 802c512:	2010      	movs	r0, #16
 802c514:	b2d9      	uxtb	r1, r3
 802c516:	b909      	cbnz	r1, 802c51c <__lo0bits+0x32>
 802c518:	3008      	adds	r0, #8
 802c51a:	0a1b      	lsrs	r3, r3, #8
 802c51c:	0719      	lsls	r1, r3, #28
 802c51e:	bf04      	itt	eq
 802c520:	091b      	lsreq	r3, r3, #4
 802c522:	3004      	addeq	r0, #4
 802c524:	0799      	lsls	r1, r3, #30
 802c526:	bf04      	itt	eq
 802c528:	089b      	lsreq	r3, r3, #2
 802c52a:	3002      	addeq	r0, #2
 802c52c:	07d9      	lsls	r1, r3, #31
 802c52e:	d403      	bmi.n	802c538 <__lo0bits+0x4e>
 802c530:	085b      	lsrs	r3, r3, #1
 802c532:	f100 0001 	add.w	r0, r0, #1
 802c536:	d003      	beq.n	802c540 <__lo0bits+0x56>
 802c538:	6013      	str	r3, [r2, #0]
 802c53a:	4770      	bx	lr
 802c53c:	2000      	movs	r0, #0
 802c53e:	4770      	bx	lr
 802c540:	2020      	movs	r0, #32
 802c542:	4770      	bx	lr

0802c544 <__i2b>:
 802c544:	b510      	push	{r4, lr}
 802c546:	460c      	mov	r4, r1
 802c548:	2101      	movs	r1, #1
 802c54a:	f7ff febd 	bl	802c2c8 <_Balloc>
 802c54e:	4602      	mov	r2, r0
 802c550:	b928      	cbnz	r0, 802c55e <__i2b+0x1a>
 802c552:	4b05      	ldr	r3, [pc, #20]	@ (802c568 <__i2b+0x24>)
 802c554:	4805      	ldr	r0, [pc, #20]	@ (802c56c <__i2b+0x28>)
 802c556:	f240 1145 	movw	r1, #325	@ 0x145
 802c55a:	f7fe fd21 	bl	802afa0 <__assert_func>
 802c55e:	2301      	movs	r3, #1
 802c560:	6144      	str	r4, [r0, #20]
 802c562:	6103      	str	r3, [r0, #16]
 802c564:	bd10      	pop	{r4, pc}
 802c566:	bf00      	nop
 802c568:	080321ae 	.word	0x080321ae
 802c56c:	0803221f 	.word	0x0803221f

0802c570 <__multiply>:
 802c570:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802c574:	4614      	mov	r4, r2
 802c576:	690a      	ldr	r2, [r1, #16]
 802c578:	6923      	ldr	r3, [r4, #16]
 802c57a:	429a      	cmp	r2, r3
 802c57c:	bfa8      	it	ge
 802c57e:	4623      	movge	r3, r4
 802c580:	460f      	mov	r7, r1
 802c582:	bfa4      	itt	ge
 802c584:	460c      	movge	r4, r1
 802c586:	461f      	movge	r7, r3
 802c588:	f8d4 a010 	ldr.w	sl, [r4, #16]
 802c58c:	f8d7 9010 	ldr.w	r9, [r7, #16]
 802c590:	68a3      	ldr	r3, [r4, #8]
 802c592:	6861      	ldr	r1, [r4, #4]
 802c594:	eb0a 0609 	add.w	r6, sl, r9
 802c598:	42b3      	cmp	r3, r6
 802c59a:	b085      	sub	sp, #20
 802c59c:	bfb8      	it	lt
 802c59e:	3101      	addlt	r1, #1
 802c5a0:	f7ff fe92 	bl	802c2c8 <_Balloc>
 802c5a4:	b930      	cbnz	r0, 802c5b4 <__multiply+0x44>
 802c5a6:	4602      	mov	r2, r0
 802c5a8:	4b44      	ldr	r3, [pc, #272]	@ (802c6bc <__multiply+0x14c>)
 802c5aa:	4845      	ldr	r0, [pc, #276]	@ (802c6c0 <__multiply+0x150>)
 802c5ac:	f44f 71b1 	mov.w	r1, #354	@ 0x162
 802c5b0:	f7fe fcf6 	bl	802afa0 <__assert_func>
 802c5b4:	f100 0514 	add.w	r5, r0, #20
 802c5b8:	eb05 0886 	add.w	r8, r5, r6, lsl #2
 802c5bc:	462b      	mov	r3, r5
 802c5be:	2200      	movs	r2, #0
 802c5c0:	4543      	cmp	r3, r8
 802c5c2:	d321      	bcc.n	802c608 <__multiply+0x98>
 802c5c4:	f107 0114 	add.w	r1, r7, #20
 802c5c8:	f104 0214 	add.w	r2, r4, #20
 802c5cc:	eb02 028a 	add.w	r2, r2, sl, lsl #2
 802c5d0:	eb01 0389 	add.w	r3, r1, r9, lsl #2
 802c5d4:	9302      	str	r3, [sp, #8]
 802c5d6:	1b13      	subs	r3, r2, r4
 802c5d8:	3b15      	subs	r3, #21
 802c5da:	f023 0303 	bic.w	r3, r3, #3
 802c5de:	3304      	adds	r3, #4
 802c5e0:	f104 0715 	add.w	r7, r4, #21
 802c5e4:	42ba      	cmp	r2, r7
 802c5e6:	bf38      	it	cc
 802c5e8:	2304      	movcc	r3, #4
 802c5ea:	9301      	str	r3, [sp, #4]
 802c5ec:	9b02      	ldr	r3, [sp, #8]
 802c5ee:	9103      	str	r1, [sp, #12]
 802c5f0:	428b      	cmp	r3, r1
 802c5f2:	d80c      	bhi.n	802c60e <__multiply+0x9e>
 802c5f4:	2e00      	cmp	r6, #0
 802c5f6:	dd03      	ble.n	802c600 <__multiply+0x90>
 802c5f8:	f858 3d04 	ldr.w	r3, [r8, #-4]!
 802c5fc:	2b00      	cmp	r3, #0
 802c5fe:	d05b      	beq.n	802c6b8 <__multiply+0x148>
 802c600:	6106      	str	r6, [r0, #16]
 802c602:	b005      	add	sp, #20
 802c604:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802c608:	f843 2b04 	str.w	r2, [r3], #4
 802c60c:	e7d8      	b.n	802c5c0 <__multiply+0x50>
 802c60e:	f8b1 a000 	ldrh.w	sl, [r1]
 802c612:	f1ba 0f00 	cmp.w	sl, #0
 802c616:	d024      	beq.n	802c662 <__multiply+0xf2>
 802c618:	f104 0e14 	add.w	lr, r4, #20
 802c61c:	46a9      	mov	r9, r5
 802c61e:	f04f 0c00 	mov.w	ip, #0
 802c622:	f85e 7b04 	ldr.w	r7, [lr], #4
 802c626:	f8d9 3000 	ldr.w	r3, [r9]
 802c62a:	fa1f fb87 	uxth.w	fp, r7
 802c62e:	b29b      	uxth	r3, r3
 802c630:	fb0a 330b 	mla	r3, sl, fp, r3
 802c634:	ea4f 4b17 	mov.w	fp, r7, lsr #16
 802c638:	f8d9 7000 	ldr.w	r7, [r9]
 802c63c:	4463      	add	r3, ip
 802c63e:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802c642:	fb0a c70b 	mla	r7, sl, fp, ip
 802c646:	eb07 4713 	add.w	r7, r7, r3, lsr #16
 802c64a:	b29b      	uxth	r3, r3
 802c64c:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802c650:	4572      	cmp	r2, lr
 802c652:	f849 3b04 	str.w	r3, [r9], #4
 802c656:	ea4f 4c17 	mov.w	ip, r7, lsr #16
 802c65a:	d8e2      	bhi.n	802c622 <__multiply+0xb2>
 802c65c:	9b01      	ldr	r3, [sp, #4]
 802c65e:	f845 c003 	str.w	ip, [r5, r3]
 802c662:	9b03      	ldr	r3, [sp, #12]
 802c664:	f8b3 9002 	ldrh.w	r9, [r3, #2]
 802c668:	3104      	adds	r1, #4
 802c66a:	f1b9 0f00 	cmp.w	r9, #0
 802c66e:	d021      	beq.n	802c6b4 <__multiply+0x144>
 802c670:	682b      	ldr	r3, [r5, #0]
 802c672:	f104 0c14 	add.w	ip, r4, #20
 802c676:	46ae      	mov	lr, r5
 802c678:	f04f 0a00 	mov.w	sl, #0
 802c67c:	f8bc b000 	ldrh.w	fp, [ip]
 802c680:	f8be 7002 	ldrh.w	r7, [lr, #2]
 802c684:	fb09 770b 	mla	r7, r9, fp, r7
 802c688:	4457      	add	r7, sl
 802c68a:	b29b      	uxth	r3, r3
 802c68c:	ea43 4307 	orr.w	r3, r3, r7, lsl #16
 802c690:	f84e 3b04 	str.w	r3, [lr], #4
 802c694:	f85c 3b04 	ldr.w	r3, [ip], #4
 802c698:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802c69c:	f8be 3000 	ldrh.w	r3, [lr]
 802c6a0:	fb09 330a 	mla	r3, r9, sl, r3
 802c6a4:	eb03 4317 	add.w	r3, r3, r7, lsr #16
 802c6a8:	4562      	cmp	r2, ip
 802c6aa:	ea4f 4a13 	mov.w	sl, r3, lsr #16
 802c6ae:	d8e5      	bhi.n	802c67c <__multiply+0x10c>
 802c6b0:	9f01      	ldr	r7, [sp, #4]
 802c6b2:	51eb      	str	r3, [r5, r7]
 802c6b4:	3504      	adds	r5, #4
 802c6b6:	e799      	b.n	802c5ec <__multiply+0x7c>
 802c6b8:	3e01      	subs	r6, #1
 802c6ba:	e79b      	b.n	802c5f4 <__multiply+0x84>
 802c6bc:	080321ae 	.word	0x080321ae
 802c6c0:	0803221f 	.word	0x0803221f

0802c6c4 <__pow5mult>:
 802c6c4:	e92d 43f8 	stmdb	sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
 802c6c8:	4615      	mov	r5, r2
 802c6ca:	f012 0203 	ands.w	r2, r2, #3
 802c6ce:	4607      	mov	r7, r0
 802c6d0:	460e      	mov	r6, r1
 802c6d2:	d007      	beq.n	802c6e4 <__pow5mult+0x20>
 802c6d4:	4c25      	ldr	r4, [pc, #148]	@ (802c76c <__pow5mult+0xa8>)
 802c6d6:	3a01      	subs	r2, #1
 802c6d8:	2300      	movs	r3, #0
 802c6da:	f854 2022 	ldr.w	r2, [r4, r2, lsl #2]
 802c6de:	f7ff fe55 	bl	802c38c <__multadd>
 802c6e2:	4606      	mov	r6, r0
 802c6e4:	10ad      	asrs	r5, r5, #2
 802c6e6:	d03d      	beq.n	802c764 <__pow5mult+0xa0>
 802c6e8:	69fc      	ldr	r4, [r7, #28]
 802c6ea:	b97c      	cbnz	r4, 802c70c <__pow5mult+0x48>
 802c6ec:	2010      	movs	r0, #16
 802c6ee:	f7fc fdcd 	bl	802928c <malloc>
 802c6f2:	4602      	mov	r2, r0
 802c6f4:	61f8      	str	r0, [r7, #28]
 802c6f6:	b928      	cbnz	r0, 802c704 <__pow5mult+0x40>
 802c6f8:	4b1d      	ldr	r3, [pc, #116]	@ (802c770 <__pow5mult+0xac>)
 802c6fa:	481e      	ldr	r0, [pc, #120]	@ (802c774 <__pow5mult+0xb0>)
 802c6fc:	f240 11b3 	movw	r1, #435	@ 0x1b3
 802c700:	f7fe fc4e 	bl	802afa0 <__assert_func>
 802c704:	e9c0 4401 	strd	r4, r4, [r0, #4]
 802c708:	6004      	str	r4, [r0, #0]
 802c70a:	60c4      	str	r4, [r0, #12]
 802c70c:	f8d7 801c 	ldr.w	r8, [r7, #28]
 802c710:	f8d8 4008 	ldr.w	r4, [r8, #8]
 802c714:	b94c      	cbnz	r4, 802c72a <__pow5mult+0x66>
 802c716:	f240 2171 	movw	r1, #625	@ 0x271
 802c71a:	4638      	mov	r0, r7
 802c71c:	f7ff ff12 	bl	802c544 <__i2b>
 802c720:	2300      	movs	r3, #0
 802c722:	f8c8 0008 	str.w	r0, [r8, #8]
 802c726:	4604      	mov	r4, r0
 802c728:	6003      	str	r3, [r0, #0]
 802c72a:	f04f 0900 	mov.w	r9, #0
 802c72e:	07eb      	lsls	r3, r5, #31
 802c730:	d50a      	bpl.n	802c748 <__pow5mult+0x84>
 802c732:	4631      	mov	r1, r6
 802c734:	4622      	mov	r2, r4
 802c736:	4638      	mov	r0, r7
 802c738:	f7ff ff1a 	bl	802c570 <__multiply>
 802c73c:	4631      	mov	r1, r6
 802c73e:	4680      	mov	r8, r0
 802c740:	4638      	mov	r0, r7
 802c742:	f7ff fe01 	bl	802c348 <_Bfree>
 802c746:	4646      	mov	r6, r8
 802c748:	106d      	asrs	r5, r5, #1
 802c74a:	d00b      	beq.n	802c764 <__pow5mult+0xa0>
 802c74c:	6820      	ldr	r0, [r4, #0]
 802c74e:	b938      	cbnz	r0, 802c760 <__pow5mult+0x9c>
 802c750:	4622      	mov	r2, r4
 802c752:	4621      	mov	r1, r4
 802c754:	4638      	mov	r0, r7
 802c756:	f7ff ff0b 	bl	802c570 <__multiply>
 802c75a:	6020      	str	r0, [r4, #0]
 802c75c:	f8c0 9000 	str.w	r9, [r0]
 802c760:	4604      	mov	r4, r0
 802c762:	e7e4      	b.n	802c72e <__pow5mult+0x6a>
 802c764:	4630      	mov	r0, r6
 802c766:	e8bd 83f8 	ldmia.w	sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
 802c76a:	bf00      	nop
 802c76c:	08032278 	.word	0x08032278
 802c770:	08031f0e 	.word	0x08031f0e
 802c774:	0803221f 	.word	0x0803221f

0802c778 <__lshift>:
 802c778:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802c77c:	460c      	mov	r4, r1
 802c77e:	6849      	ldr	r1, [r1, #4]
 802c780:	6923      	ldr	r3, [r4, #16]
 802c782:	eb03 1862 	add.w	r8, r3, r2, asr #5
 802c786:	68a3      	ldr	r3, [r4, #8]
 802c788:	4607      	mov	r7, r0
 802c78a:	4691      	mov	r9, r2
 802c78c:	ea4f 1a62 	mov.w	sl, r2, asr #5
 802c790:	f108 0601 	add.w	r6, r8, #1
 802c794:	42b3      	cmp	r3, r6
 802c796:	db0b      	blt.n	802c7b0 <__lshift+0x38>
 802c798:	4638      	mov	r0, r7
 802c79a:	f7ff fd95 	bl	802c2c8 <_Balloc>
 802c79e:	4605      	mov	r5, r0
 802c7a0:	b948      	cbnz	r0, 802c7b6 <__lshift+0x3e>
 802c7a2:	4602      	mov	r2, r0
 802c7a4:	4b28      	ldr	r3, [pc, #160]	@ (802c848 <__lshift+0xd0>)
 802c7a6:	4829      	ldr	r0, [pc, #164]	@ (802c84c <__lshift+0xd4>)
 802c7a8:	f44f 71ef 	mov.w	r1, #478	@ 0x1de
 802c7ac:	f7fe fbf8 	bl	802afa0 <__assert_func>
 802c7b0:	3101      	adds	r1, #1
 802c7b2:	005b      	lsls	r3, r3, #1
 802c7b4:	e7ee      	b.n	802c794 <__lshift+0x1c>
 802c7b6:	2300      	movs	r3, #0
 802c7b8:	f100 0114 	add.w	r1, r0, #20
 802c7bc:	f100 0210 	add.w	r2, r0, #16
 802c7c0:	4618      	mov	r0, r3
 802c7c2:	4553      	cmp	r3, sl
 802c7c4:	db33      	blt.n	802c82e <__lshift+0xb6>
 802c7c6:	6920      	ldr	r0, [r4, #16]
 802c7c8:	ea2a 7aea 	bic.w	sl, sl, sl, asr #31
 802c7cc:	f104 0314 	add.w	r3, r4, #20
 802c7d0:	f019 091f 	ands.w	r9, r9, #31
 802c7d4:	eb01 018a 	add.w	r1, r1, sl, lsl #2
 802c7d8:	eb03 0c80 	add.w	ip, r3, r0, lsl #2
 802c7dc:	d02b      	beq.n	802c836 <__lshift+0xbe>
 802c7de:	f1c9 0e20 	rsb	lr, r9, #32
 802c7e2:	468a      	mov	sl, r1
 802c7e4:	2200      	movs	r2, #0
 802c7e6:	6818      	ldr	r0, [r3, #0]
 802c7e8:	fa00 f009 	lsl.w	r0, r0, r9
 802c7ec:	4310      	orrs	r0, r2
 802c7ee:	f84a 0b04 	str.w	r0, [sl], #4
 802c7f2:	f853 2b04 	ldr.w	r2, [r3], #4
 802c7f6:	459c      	cmp	ip, r3
 802c7f8:	fa22 f20e 	lsr.w	r2, r2, lr
 802c7fc:	d8f3      	bhi.n	802c7e6 <__lshift+0x6e>
 802c7fe:	ebac 0304 	sub.w	r3, ip, r4
 802c802:	3b15      	subs	r3, #21
 802c804:	f023 0303 	bic.w	r3, r3, #3
 802c808:	3304      	adds	r3, #4
 802c80a:	f104 0015 	add.w	r0, r4, #21
 802c80e:	4584      	cmp	ip, r0
 802c810:	bf38      	it	cc
 802c812:	2304      	movcc	r3, #4
 802c814:	50ca      	str	r2, [r1, r3]
 802c816:	b10a      	cbz	r2, 802c81c <__lshift+0xa4>
 802c818:	f108 0602 	add.w	r6, r8, #2
 802c81c:	3e01      	subs	r6, #1
 802c81e:	4638      	mov	r0, r7
 802c820:	612e      	str	r6, [r5, #16]
 802c822:	4621      	mov	r1, r4
 802c824:	f7ff fd90 	bl	802c348 <_Bfree>
 802c828:	4628      	mov	r0, r5
 802c82a:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802c82e:	f842 0f04 	str.w	r0, [r2, #4]!
 802c832:	3301      	adds	r3, #1
 802c834:	e7c5      	b.n	802c7c2 <__lshift+0x4a>
 802c836:	3904      	subs	r1, #4
 802c838:	f853 2b04 	ldr.w	r2, [r3], #4
 802c83c:	f841 2f04 	str.w	r2, [r1, #4]!
 802c840:	459c      	cmp	ip, r3
 802c842:	d8f9      	bhi.n	802c838 <__lshift+0xc0>
 802c844:	e7ea      	b.n	802c81c <__lshift+0xa4>
 802c846:	bf00      	nop
 802c848:	080321ae 	.word	0x080321ae
 802c84c:	0803221f 	.word	0x0803221f

0802c850 <__mcmp>:
 802c850:	690a      	ldr	r2, [r1, #16]
 802c852:	4603      	mov	r3, r0
 802c854:	6900      	ldr	r0, [r0, #16]
 802c856:	1a80      	subs	r0, r0, r2
 802c858:	b530      	push	{r4, r5, lr}
 802c85a:	d10e      	bne.n	802c87a <__mcmp+0x2a>
 802c85c:	3314      	adds	r3, #20
 802c85e:	3114      	adds	r1, #20
 802c860:	eb03 0482 	add.w	r4, r3, r2, lsl #2
 802c864:	eb01 0182 	add.w	r1, r1, r2, lsl #2
 802c868:	f854 5d04 	ldr.w	r5, [r4, #-4]!
 802c86c:	f851 2d04 	ldr.w	r2, [r1, #-4]!
 802c870:	4295      	cmp	r5, r2
 802c872:	d003      	beq.n	802c87c <__mcmp+0x2c>
 802c874:	d205      	bcs.n	802c882 <__mcmp+0x32>
 802c876:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802c87a:	bd30      	pop	{r4, r5, pc}
 802c87c:	42a3      	cmp	r3, r4
 802c87e:	d3f3      	bcc.n	802c868 <__mcmp+0x18>
 802c880:	e7fb      	b.n	802c87a <__mcmp+0x2a>
 802c882:	2001      	movs	r0, #1
 802c884:	e7f9      	b.n	802c87a <__mcmp+0x2a>
	...

0802c888 <__mdiff>:
 802c888:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802c88c:	4689      	mov	r9, r1
 802c88e:	4606      	mov	r6, r0
 802c890:	4611      	mov	r1, r2
 802c892:	4648      	mov	r0, r9
 802c894:	4614      	mov	r4, r2
 802c896:	f7ff ffdb 	bl	802c850 <__mcmp>
 802c89a:	1e05      	subs	r5, r0, #0
 802c89c:	d112      	bne.n	802c8c4 <__mdiff+0x3c>
 802c89e:	4629      	mov	r1, r5
 802c8a0:	4630      	mov	r0, r6
 802c8a2:	f7ff fd11 	bl	802c2c8 <_Balloc>
 802c8a6:	4602      	mov	r2, r0
 802c8a8:	b928      	cbnz	r0, 802c8b6 <__mdiff+0x2e>
 802c8aa:	4b3f      	ldr	r3, [pc, #252]	@ (802c9a8 <__mdiff+0x120>)
 802c8ac:	f240 2137 	movw	r1, #567	@ 0x237
 802c8b0:	483e      	ldr	r0, [pc, #248]	@ (802c9ac <__mdiff+0x124>)
 802c8b2:	f7fe fb75 	bl	802afa0 <__assert_func>
 802c8b6:	2301      	movs	r3, #1
 802c8b8:	e9c0 3504 	strd	r3, r5, [r0, #16]
 802c8bc:	4610      	mov	r0, r2
 802c8be:	b003      	add	sp, #12
 802c8c0:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802c8c4:	bfbc      	itt	lt
 802c8c6:	464b      	movlt	r3, r9
 802c8c8:	46a1      	movlt	r9, r4
 802c8ca:	4630      	mov	r0, r6
 802c8cc:	f8d9 1004 	ldr.w	r1, [r9, #4]
 802c8d0:	bfba      	itte	lt
 802c8d2:	461c      	movlt	r4, r3
 802c8d4:	2501      	movlt	r5, #1
 802c8d6:	2500      	movge	r5, #0
 802c8d8:	f7ff fcf6 	bl	802c2c8 <_Balloc>
 802c8dc:	4602      	mov	r2, r0
 802c8de:	b918      	cbnz	r0, 802c8e8 <__mdiff+0x60>
 802c8e0:	4b31      	ldr	r3, [pc, #196]	@ (802c9a8 <__mdiff+0x120>)
 802c8e2:	f240 2145 	movw	r1, #581	@ 0x245
 802c8e6:	e7e3      	b.n	802c8b0 <__mdiff+0x28>
 802c8e8:	f8d9 7010 	ldr.w	r7, [r9, #16]
 802c8ec:	6926      	ldr	r6, [r4, #16]
 802c8ee:	60c5      	str	r5, [r0, #12]
 802c8f0:	f109 0310 	add.w	r3, r9, #16
 802c8f4:	f109 0514 	add.w	r5, r9, #20
 802c8f8:	f104 0e14 	add.w	lr, r4, #20
 802c8fc:	f100 0b14 	add.w	fp, r0, #20
 802c900:	eb05 0887 	add.w	r8, r5, r7, lsl #2
 802c904:	eb0e 0686 	add.w	r6, lr, r6, lsl #2
 802c908:	9301      	str	r3, [sp, #4]
 802c90a:	46d9      	mov	r9, fp
 802c90c:	f04f 0c00 	mov.w	ip, #0
 802c910:	9b01      	ldr	r3, [sp, #4]
 802c912:	f85e 0b04 	ldr.w	r0, [lr], #4
 802c916:	f853 af04 	ldr.w	sl, [r3, #4]!
 802c91a:	9301      	str	r3, [sp, #4]
 802c91c:	fa1f f38a 	uxth.w	r3, sl
 802c920:	4619      	mov	r1, r3
 802c922:	b283      	uxth	r3, r0
 802c924:	1acb      	subs	r3, r1, r3
 802c926:	0c00      	lsrs	r0, r0, #16
 802c928:	4463      	add	r3, ip
 802c92a:	ebc0 401a 	rsb	r0, r0, sl, lsr #16
 802c92e:	eb00 4023 	add.w	r0, r0, r3, asr #16
 802c932:	b29b      	uxth	r3, r3
 802c934:	ea43 4300 	orr.w	r3, r3, r0, lsl #16
 802c938:	4576      	cmp	r6, lr
 802c93a:	f849 3b04 	str.w	r3, [r9], #4
 802c93e:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802c942:	d8e5      	bhi.n	802c910 <__mdiff+0x88>
 802c944:	1b33      	subs	r3, r6, r4
 802c946:	3b15      	subs	r3, #21
 802c948:	f023 0303 	bic.w	r3, r3, #3
 802c94c:	3415      	adds	r4, #21
 802c94e:	3304      	adds	r3, #4
 802c950:	42a6      	cmp	r6, r4
 802c952:	bf38      	it	cc
 802c954:	2304      	movcc	r3, #4
 802c956:	441d      	add	r5, r3
 802c958:	445b      	add	r3, fp
 802c95a:	461e      	mov	r6, r3
 802c95c:	462c      	mov	r4, r5
 802c95e:	4544      	cmp	r4, r8
 802c960:	d30e      	bcc.n	802c980 <__mdiff+0xf8>
 802c962:	f108 0103 	add.w	r1, r8, #3
 802c966:	1b49      	subs	r1, r1, r5
 802c968:	f021 0103 	bic.w	r1, r1, #3
 802c96c:	3d03      	subs	r5, #3
 802c96e:	45a8      	cmp	r8, r5
 802c970:	bf38      	it	cc
 802c972:	2100      	movcc	r1, #0
 802c974:	440b      	add	r3, r1
 802c976:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802c97a:	b191      	cbz	r1, 802c9a2 <__mdiff+0x11a>
 802c97c:	6117      	str	r7, [r2, #16]
 802c97e:	e79d      	b.n	802c8bc <__mdiff+0x34>
 802c980:	f854 1b04 	ldr.w	r1, [r4], #4
 802c984:	46e6      	mov	lr, ip
 802c986:	0c08      	lsrs	r0, r1, #16
 802c988:	fa1c fc81 	uxtah	ip, ip, r1
 802c98c:	4471      	add	r1, lr
 802c98e:	eb00 402c 	add.w	r0, r0, ip, asr #16
 802c992:	b289      	uxth	r1, r1
 802c994:	ea41 4100 	orr.w	r1, r1, r0, lsl #16
 802c998:	f846 1b04 	str.w	r1, [r6], #4
 802c99c:	ea4f 4c20 	mov.w	ip, r0, asr #16
 802c9a0:	e7dd      	b.n	802c95e <__mdiff+0xd6>
 802c9a2:	3f01      	subs	r7, #1
 802c9a4:	e7e7      	b.n	802c976 <__mdiff+0xee>
 802c9a6:	bf00      	nop
 802c9a8:	080321ae 	.word	0x080321ae
 802c9ac:	0803221f 	.word	0x0803221f

0802c9b0 <__ulp>:
 802c9b0:	b082      	sub	sp, #8
 802c9b2:	ed8d 0b00 	vstr	d0, [sp]
 802c9b6:	9a01      	ldr	r2, [sp, #4]
 802c9b8:	4b0f      	ldr	r3, [pc, #60]	@ (802c9f8 <__ulp+0x48>)
 802c9ba:	4013      	ands	r3, r2
 802c9bc:	f1a3 7350 	sub.w	r3, r3, #54525952	@ 0x3400000
 802c9c0:	2b00      	cmp	r3, #0
 802c9c2:	dc08      	bgt.n	802c9d6 <__ulp+0x26>
 802c9c4:	425b      	negs	r3, r3
 802c9c6:	f1b3 7fa0 	cmp.w	r3, #20971520	@ 0x1400000
 802c9ca:	ea4f 5223 	mov.w	r2, r3, asr #20
 802c9ce:	da04      	bge.n	802c9da <__ulp+0x2a>
 802c9d0:	f44f 2300 	mov.w	r3, #524288	@ 0x80000
 802c9d4:	4113      	asrs	r3, r2
 802c9d6:	2200      	movs	r2, #0
 802c9d8:	e008      	b.n	802c9ec <__ulp+0x3c>
 802c9da:	f1a2 0314 	sub.w	r3, r2, #20
 802c9de:	2b1e      	cmp	r3, #30
 802c9e0:	bfda      	itte	le
 802c9e2:	f04f 4200 	movle.w	r2, #2147483648	@ 0x80000000
 802c9e6:	40da      	lsrle	r2, r3
 802c9e8:	2201      	movgt	r2, #1
 802c9ea:	2300      	movs	r3, #0
 802c9ec:	4619      	mov	r1, r3
 802c9ee:	4610      	mov	r0, r2
 802c9f0:	ec41 0b10 	vmov	d0, r0, r1
 802c9f4:	b002      	add	sp, #8
 802c9f6:	4770      	bx	lr
 802c9f8:	7ff00000 	.word	0x7ff00000

0802c9fc <__b2d>:
 802c9fc:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802ca00:	6906      	ldr	r6, [r0, #16]
 802ca02:	f100 0814 	add.w	r8, r0, #20
 802ca06:	eb08 0686 	add.w	r6, r8, r6, lsl #2
 802ca0a:	1f37      	subs	r7, r6, #4
 802ca0c:	f856 2c04 	ldr.w	r2, [r6, #-4]
 802ca10:	4610      	mov	r0, r2
 802ca12:	f7ff fd4b 	bl	802c4ac <__hi0bits>
 802ca16:	f1c0 0320 	rsb	r3, r0, #32
 802ca1a:	280a      	cmp	r0, #10
 802ca1c:	600b      	str	r3, [r1, #0]
 802ca1e:	491b      	ldr	r1, [pc, #108]	@ (802ca8c <__b2d+0x90>)
 802ca20:	dc15      	bgt.n	802ca4e <__b2d+0x52>
 802ca22:	f1c0 0c0b 	rsb	ip, r0, #11
 802ca26:	fa22 f30c 	lsr.w	r3, r2, ip
 802ca2a:	45b8      	cmp	r8, r7
 802ca2c:	ea43 0501 	orr.w	r5, r3, r1
 802ca30:	bf34      	ite	cc
 802ca32:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802ca36:	2300      	movcs	r3, #0
 802ca38:	3015      	adds	r0, #21
 802ca3a:	fa02 f000 	lsl.w	r0, r2, r0
 802ca3e:	fa23 f30c 	lsr.w	r3, r3, ip
 802ca42:	4303      	orrs	r3, r0
 802ca44:	461c      	mov	r4, r3
 802ca46:	ec45 4b10 	vmov	d0, r4, r5
 802ca4a:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802ca4e:	45b8      	cmp	r8, r7
 802ca50:	bf3a      	itte	cc
 802ca52:	f856 3c08 	ldrcc.w	r3, [r6, #-8]
 802ca56:	f1a6 0708 	subcc.w	r7, r6, #8
 802ca5a:	2300      	movcs	r3, #0
 802ca5c:	380b      	subs	r0, #11
 802ca5e:	d012      	beq.n	802ca86 <__b2d+0x8a>
 802ca60:	f1c0 0120 	rsb	r1, r0, #32
 802ca64:	fa23 f401 	lsr.w	r4, r3, r1
 802ca68:	4082      	lsls	r2, r0
 802ca6a:	4322      	orrs	r2, r4
 802ca6c:	4547      	cmp	r7, r8
 802ca6e:	f042 557f 	orr.w	r5, r2, #1069547520	@ 0x3fc00000
 802ca72:	bf8c      	ite	hi
 802ca74:	f857 2c04 	ldrhi.w	r2, [r7, #-4]
 802ca78:	2200      	movls	r2, #0
 802ca7a:	4083      	lsls	r3, r0
 802ca7c:	40ca      	lsrs	r2, r1
 802ca7e:	f445 1540 	orr.w	r5, r5, #3145728	@ 0x300000
 802ca82:	4313      	orrs	r3, r2
 802ca84:	e7de      	b.n	802ca44 <__b2d+0x48>
 802ca86:	ea42 0501 	orr.w	r5, r2, r1
 802ca8a:	e7db      	b.n	802ca44 <__b2d+0x48>
 802ca8c:	3ff00000 	.word	0x3ff00000

0802ca90 <__d2b>:
 802ca90:	e92d 43f7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
 802ca94:	460f      	mov	r7, r1
 802ca96:	2101      	movs	r1, #1
 802ca98:	ec59 8b10 	vmov	r8, r9, d0
 802ca9c:	4616      	mov	r6, r2
 802ca9e:	f7ff fc13 	bl	802c2c8 <_Balloc>
 802caa2:	4604      	mov	r4, r0
 802caa4:	b930      	cbnz	r0, 802cab4 <__d2b+0x24>
 802caa6:	4602      	mov	r2, r0
 802caa8:	4b23      	ldr	r3, [pc, #140]	@ (802cb38 <__d2b+0xa8>)
 802caaa:	4824      	ldr	r0, [pc, #144]	@ (802cb3c <__d2b+0xac>)
 802caac:	f240 310f 	movw	r1, #783	@ 0x30f
 802cab0:	f7fe fa76 	bl	802afa0 <__assert_func>
 802cab4:	f3c9 550a 	ubfx	r5, r9, #20, #11
 802cab8:	f3c9 0313 	ubfx	r3, r9, #0, #20
 802cabc:	b10d      	cbz	r5, 802cac2 <__d2b+0x32>
 802cabe:	f443 1380 	orr.w	r3, r3, #1048576	@ 0x100000
 802cac2:	9301      	str	r3, [sp, #4]
 802cac4:	f1b8 0300 	subs.w	r3, r8, #0
 802cac8:	d023      	beq.n	802cb12 <__d2b+0x82>
 802caca:	4668      	mov	r0, sp
 802cacc:	9300      	str	r3, [sp, #0]
 802cace:	f7ff fd0c 	bl	802c4ea <__lo0bits>
 802cad2:	e9dd 1200 	ldrd	r1, r2, [sp]
 802cad6:	b1d0      	cbz	r0, 802cb0e <__d2b+0x7e>
 802cad8:	f1c0 0320 	rsb	r3, r0, #32
 802cadc:	fa02 f303 	lsl.w	r3, r2, r3
 802cae0:	430b      	orrs	r3, r1
 802cae2:	40c2      	lsrs	r2, r0
 802cae4:	6163      	str	r3, [r4, #20]
 802cae6:	9201      	str	r2, [sp, #4]
 802cae8:	9b01      	ldr	r3, [sp, #4]
 802caea:	61a3      	str	r3, [r4, #24]
 802caec:	2b00      	cmp	r3, #0
 802caee:	bf0c      	ite	eq
 802caf0:	2201      	moveq	r2, #1
 802caf2:	2202      	movne	r2, #2
 802caf4:	6122      	str	r2, [r4, #16]
 802caf6:	b1a5      	cbz	r5, 802cb22 <__d2b+0x92>
 802caf8:	f2a5 4533 	subw	r5, r5, #1075	@ 0x433
 802cafc:	4405      	add	r5, r0
 802cafe:	603d      	str	r5, [r7, #0]
 802cb00:	f1c0 0035 	rsb	r0, r0, #53	@ 0x35
 802cb04:	6030      	str	r0, [r6, #0]
 802cb06:	4620      	mov	r0, r4
 802cb08:	b003      	add	sp, #12
 802cb0a:	e8bd 83f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, pc}
 802cb0e:	6161      	str	r1, [r4, #20]
 802cb10:	e7ea      	b.n	802cae8 <__d2b+0x58>
 802cb12:	a801      	add	r0, sp, #4
 802cb14:	f7ff fce9 	bl	802c4ea <__lo0bits>
 802cb18:	9b01      	ldr	r3, [sp, #4]
 802cb1a:	6163      	str	r3, [r4, #20]
 802cb1c:	3020      	adds	r0, #32
 802cb1e:	2201      	movs	r2, #1
 802cb20:	e7e8      	b.n	802caf4 <__d2b+0x64>
 802cb22:	eb04 0382 	add.w	r3, r4, r2, lsl #2
 802cb26:	f2a0 4032 	subw	r0, r0, #1074	@ 0x432
 802cb2a:	6038      	str	r0, [r7, #0]
 802cb2c:	6918      	ldr	r0, [r3, #16]
 802cb2e:	f7ff fcbd 	bl	802c4ac <__hi0bits>
 802cb32:	ebc0 1042 	rsb	r0, r0, r2, lsl #5
 802cb36:	e7e5      	b.n	802cb04 <__d2b+0x74>
 802cb38:	080321ae 	.word	0x080321ae
 802cb3c:	0803221f 	.word	0x0803221f

0802cb40 <__ratio>:
 802cb40:	e92d 4ff7 	stmdb	sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802cb44:	4688      	mov	r8, r1
 802cb46:	4669      	mov	r1, sp
 802cb48:	4681      	mov	r9, r0
 802cb4a:	f7ff ff57 	bl	802c9fc <__b2d>
 802cb4e:	a901      	add	r1, sp, #4
 802cb50:	4640      	mov	r0, r8
 802cb52:	ec55 4b10 	vmov	r4, r5, d0
 802cb56:	f7ff ff51 	bl	802c9fc <__b2d>
 802cb5a:	f8d8 3010 	ldr.w	r3, [r8, #16]
 802cb5e:	f8d9 2010 	ldr.w	r2, [r9, #16]
 802cb62:	1ad2      	subs	r2, r2, r3
 802cb64:	e9dd 3100 	ldrd	r3, r1, [sp]
 802cb68:	1a5b      	subs	r3, r3, r1
 802cb6a:	eb03 1342 	add.w	r3, r3, r2, lsl #5
 802cb6e:	ec57 6b10 	vmov	r6, r7, d0
 802cb72:	2b00      	cmp	r3, #0
 802cb74:	bfd6      	itet	le
 802cb76:	ebc3 3303 	rsble	r3, r3, r3, lsl #12
 802cb7a:	462a      	movgt	r2, r5
 802cb7c:	463a      	movle	r2, r7
 802cb7e:	46ab      	mov	fp, r5
 802cb80:	46a2      	mov	sl, r4
 802cb82:	bfce      	itee	gt
 802cb84:	eb02 5b03 	addgt.w	fp, r2, r3, lsl #20
 802cb88:	eb02 5303 	addle.w	r3, r2, r3, lsl #20
 802cb8c:	ee00 3a90 	vmovle	s1, r3
 802cb90:	ec4b ab17 	vmov	d7, sl, fp
 802cb94:	ee87 0b00 	vdiv.f64	d0, d7, d0
 802cb98:	b003      	add	sp, #12
 802cb9a:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}

0802cb9e <__copybits>:
 802cb9e:	3901      	subs	r1, #1
 802cba0:	b570      	push	{r4, r5, r6, lr}
 802cba2:	1149      	asrs	r1, r1, #5
 802cba4:	6914      	ldr	r4, [r2, #16]
 802cba6:	3101      	adds	r1, #1
 802cba8:	f102 0314 	add.w	r3, r2, #20
 802cbac:	eb00 0181 	add.w	r1, r0, r1, lsl #2
 802cbb0:	eb03 0484 	add.w	r4, r3, r4, lsl #2
 802cbb4:	1f05      	subs	r5, r0, #4
 802cbb6:	42a3      	cmp	r3, r4
 802cbb8:	d30c      	bcc.n	802cbd4 <__copybits+0x36>
 802cbba:	1aa3      	subs	r3, r4, r2
 802cbbc:	3b11      	subs	r3, #17
 802cbbe:	f023 0303 	bic.w	r3, r3, #3
 802cbc2:	3211      	adds	r2, #17
 802cbc4:	42a2      	cmp	r2, r4
 802cbc6:	bf88      	it	hi
 802cbc8:	2300      	movhi	r3, #0
 802cbca:	4418      	add	r0, r3
 802cbcc:	2300      	movs	r3, #0
 802cbce:	4288      	cmp	r0, r1
 802cbd0:	d305      	bcc.n	802cbde <__copybits+0x40>
 802cbd2:	bd70      	pop	{r4, r5, r6, pc}
 802cbd4:	f853 6b04 	ldr.w	r6, [r3], #4
 802cbd8:	f845 6f04 	str.w	r6, [r5, #4]!
 802cbdc:	e7eb      	b.n	802cbb6 <__copybits+0x18>
 802cbde:	f840 3b04 	str.w	r3, [r0], #4
 802cbe2:	e7f4      	b.n	802cbce <__copybits+0x30>

0802cbe4 <__any_on>:
 802cbe4:	f100 0214 	add.w	r2, r0, #20
 802cbe8:	6900      	ldr	r0, [r0, #16]
 802cbea:	114b      	asrs	r3, r1, #5
 802cbec:	4298      	cmp	r0, r3
 802cbee:	b510      	push	{r4, lr}
 802cbf0:	db11      	blt.n	802cc16 <__any_on+0x32>
 802cbf2:	dd0a      	ble.n	802cc0a <__any_on+0x26>
 802cbf4:	f011 011f 	ands.w	r1, r1, #31
 802cbf8:	d007      	beq.n	802cc0a <__any_on+0x26>
 802cbfa:	f852 4023 	ldr.w	r4, [r2, r3, lsl #2]
 802cbfe:	fa24 f001 	lsr.w	r0, r4, r1
 802cc02:	fa00 f101 	lsl.w	r1, r0, r1
 802cc06:	428c      	cmp	r4, r1
 802cc08:	d10b      	bne.n	802cc22 <__any_on+0x3e>
 802cc0a:	eb02 0383 	add.w	r3, r2, r3, lsl #2
 802cc0e:	4293      	cmp	r3, r2
 802cc10:	d803      	bhi.n	802cc1a <__any_on+0x36>
 802cc12:	2000      	movs	r0, #0
 802cc14:	bd10      	pop	{r4, pc}
 802cc16:	4603      	mov	r3, r0
 802cc18:	e7f7      	b.n	802cc0a <__any_on+0x26>
 802cc1a:	f853 1d04 	ldr.w	r1, [r3, #-4]!
 802cc1e:	2900      	cmp	r1, #0
 802cc20:	d0f5      	beq.n	802cc0e <__any_on+0x2a>
 802cc22:	2001      	movs	r0, #1
 802cc24:	e7f6      	b.n	802cc14 <__any_on+0x30>

0802cc26 <_malloc_usable_size_r>:
 802cc26:	f851 3c04 	ldr.w	r3, [r1, #-4]
 802cc2a:	1f18      	subs	r0, r3, #4
 802cc2c:	2b00      	cmp	r3, #0
 802cc2e:	bfbc      	itt	lt
 802cc30:	580b      	ldrlt	r3, [r1, r0]
 802cc32:	18c0      	addlt	r0, r0, r3
 802cc34:	4770      	bx	lr

0802cc36 <__ascii_wctomb>:
 802cc36:	4603      	mov	r3, r0
 802cc38:	4608      	mov	r0, r1
 802cc3a:	b141      	cbz	r1, 802cc4e <__ascii_wctomb+0x18>
 802cc3c:	2aff      	cmp	r2, #255	@ 0xff
 802cc3e:	d904      	bls.n	802cc4a <__ascii_wctomb+0x14>
 802cc40:	228a      	movs	r2, #138	@ 0x8a
 802cc42:	601a      	str	r2, [r3, #0]
 802cc44:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802cc48:	4770      	bx	lr
 802cc4a:	700a      	strb	r2, [r1, #0]
 802cc4c:	2001      	movs	r0, #1
 802cc4e:	4770      	bx	lr

0802cc50 <__ssputs_r>:
 802cc50:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 802cc54:	688e      	ldr	r6, [r1, #8]
 802cc56:	461f      	mov	r7, r3
 802cc58:	42be      	cmp	r6, r7
 802cc5a:	680b      	ldr	r3, [r1, #0]
 802cc5c:	4682      	mov	sl, r0
 802cc5e:	460c      	mov	r4, r1
 802cc60:	4690      	mov	r8, r2
 802cc62:	d82d      	bhi.n	802ccc0 <__ssputs_r+0x70>
 802cc64:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802cc68:	f412 6f90 	tst.w	r2, #1152	@ 0x480
 802cc6c:	d026      	beq.n	802ccbc <__ssputs_r+0x6c>
 802cc6e:	6965      	ldr	r5, [r4, #20]
 802cc70:	6909      	ldr	r1, [r1, #16]
 802cc72:	eb05 0545 	add.w	r5, r5, r5, lsl #1
 802cc76:	eba3 0901 	sub.w	r9, r3, r1
 802cc7a:	eb05 75d5 	add.w	r5, r5, r5, lsr #31
 802cc7e:	1c7b      	adds	r3, r7, #1
 802cc80:	444b      	add	r3, r9
 802cc82:	106d      	asrs	r5, r5, #1
 802cc84:	429d      	cmp	r5, r3
 802cc86:	bf38      	it	cc
 802cc88:	461d      	movcc	r5, r3
 802cc8a:	0553      	lsls	r3, r2, #21
 802cc8c:	d527      	bpl.n	802ccde <__ssputs_r+0x8e>
 802cc8e:	4629      	mov	r1, r5
 802cc90:	f7fc fb2e 	bl	80292f0 <_malloc_r>
 802cc94:	4606      	mov	r6, r0
 802cc96:	b360      	cbz	r0, 802ccf2 <__ssputs_r+0xa2>
 802cc98:	6921      	ldr	r1, [r4, #16]
 802cc9a:	464a      	mov	r2, r9
 802cc9c:	f7fe f967 	bl	802af6e <memcpy>
 802cca0:	89a3      	ldrh	r3, [r4, #12]
 802cca2:	f423 6390 	bic.w	r3, r3, #1152	@ 0x480
 802cca6:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802ccaa:	81a3      	strh	r3, [r4, #12]
 802ccac:	6126      	str	r6, [r4, #16]
 802ccae:	6165      	str	r5, [r4, #20]
 802ccb0:	444e      	add	r6, r9
 802ccb2:	eba5 0509 	sub.w	r5, r5, r9
 802ccb6:	6026      	str	r6, [r4, #0]
 802ccb8:	60a5      	str	r5, [r4, #8]
 802ccba:	463e      	mov	r6, r7
 802ccbc:	42be      	cmp	r6, r7
 802ccbe:	d900      	bls.n	802ccc2 <__ssputs_r+0x72>
 802ccc0:	463e      	mov	r6, r7
 802ccc2:	6820      	ldr	r0, [r4, #0]
 802ccc4:	4632      	mov	r2, r6
 802ccc6:	4641      	mov	r1, r8
 802ccc8:	f7fe f840 	bl	802ad4c <memmove>
 802cccc:	68a3      	ldr	r3, [r4, #8]
 802ccce:	1b9b      	subs	r3, r3, r6
 802ccd0:	60a3      	str	r3, [r4, #8]
 802ccd2:	6823      	ldr	r3, [r4, #0]
 802ccd4:	4433      	add	r3, r6
 802ccd6:	6023      	str	r3, [r4, #0]
 802ccd8:	2000      	movs	r0, #0
 802ccda:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 802ccde:	462a      	mov	r2, r5
 802cce0:	f7fc fbd8 	bl	8029494 <_realloc_r>
 802cce4:	4606      	mov	r6, r0
 802cce6:	2800      	cmp	r0, #0
 802cce8:	d1e0      	bne.n	802ccac <__ssputs_r+0x5c>
 802ccea:	6921      	ldr	r1, [r4, #16]
 802ccec:	4650      	mov	r0, sl
 802ccee:	f7fe ff55 	bl	802bb9c <_free_r>
 802ccf2:	230c      	movs	r3, #12
 802ccf4:	f8ca 3000 	str.w	r3, [sl]
 802ccf8:	89a3      	ldrh	r3, [r4, #12]
 802ccfa:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802ccfe:	81a3      	strh	r3, [r4, #12]
 802cd00:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802cd04:	e7e9      	b.n	802ccda <__ssputs_r+0x8a>
	...

0802cd08 <_svfiprintf_r>:
 802cd08:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802cd0c:	4698      	mov	r8, r3
 802cd0e:	898b      	ldrh	r3, [r1, #12]
 802cd10:	061b      	lsls	r3, r3, #24
 802cd12:	b09d      	sub	sp, #116	@ 0x74
 802cd14:	4607      	mov	r7, r0
 802cd16:	460d      	mov	r5, r1
 802cd18:	4614      	mov	r4, r2
 802cd1a:	d510      	bpl.n	802cd3e <_svfiprintf_r+0x36>
 802cd1c:	690b      	ldr	r3, [r1, #16]
 802cd1e:	b973      	cbnz	r3, 802cd3e <_svfiprintf_r+0x36>
 802cd20:	2140      	movs	r1, #64	@ 0x40
 802cd22:	f7fc fae5 	bl	80292f0 <_malloc_r>
 802cd26:	6028      	str	r0, [r5, #0]
 802cd28:	6128      	str	r0, [r5, #16]
 802cd2a:	b930      	cbnz	r0, 802cd3a <_svfiprintf_r+0x32>
 802cd2c:	230c      	movs	r3, #12
 802cd2e:	603b      	str	r3, [r7, #0]
 802cd30:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802cd34:	b01d      	add	sp, #116	@ 0x74
 802cd36:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802cd3a:	2340      	movs	r3, #64	@ 0x40
 802cd3c:	616b      	str	r3, [r5, #20]
 802cd3e:	2300      	movs	r3, #0
 802cd40:	9309      	str	r3, [sp, #36]	@ 0x24
 802cd42:	2320      	movs	r3, #32
 802cd44:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802cd48:	f8cd 800c 	str.w	r8, [sp, #12]
 802cd4c:	2330      	movs	r3, #48	@ 0x30
 802cd4e:	f8df 819c 	ldr.w	r8, [pc, #412]	@ 802ceec <_svfiprintf_r+0x1e4>
 802cd52:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802cd56:	f04f 0901 	mov.w	r9, #1
 802cd5a:	4623      	mov	r3, r4
 802cd5c:	469a      	mov	sl, r3
 802cd5e:	f813 2b01 	ldrb.w	r2, [r3], #1
 802cd62:	b10a      	cbz	r2, 802cd68 <_svfiprintf_r+0x60>
 802cd64:	2a25      	cmp	r2, #37	@ 0x25
 802cd66:	d1f9      	bne.n	802cd5c <_svfiprintf_r+0x54>
 802cd68:	ebba 0b04 	subs.w	fp, sl, r4
 802cd6c:	d00b      	beq.n	802cd86 <_svfiprintf_r+0x7e>
 802cd6e:	465b      	mov	r3, fp
 802cd70:	4622      	mov	r2, r4
 802cd72:	4629      	mov	r1, r5
 802cd74:	4638      	mov	r0, r7
 802cd76:	f7ff ff6b 	bl	802cc50 <__ssputs_r>
 802cd7a:	3001      	adds	r0, #1
 802cd7c:	f000 80a7 	beq.w	802cece <_svfiprintf_r+0x1c6>
 802cd80:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802cd82:	445a      	add	r2, fp
 802cd84:	9209      	str	r2, [sp, #36]	@ 0x24
 802cd86:	f89a 3000 	ldrb.w	r3, [sl]
 802cd8a:	2b00      	cmp	r3, #0
 802cd8c:	f000 809f 	beq.w	802cece <_svfiprintf_r+0x1c6>
 802cd90:	2300      	movs	r3, #0
 802cd92:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802cd96:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802cd9a:	f10a 0a01 	add.w	sl, sl, #1
 802cd9e:	9304      	str	r3, [sp, #16]
 802cda0:	9307      	str	r3, [sp, #28]
 802cda2:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802cda6:	931a      	str	r3, [sp, #104]	@ 0x68
 802cda8:	4654      	mov	r4, sl
 802cdaa:	2205      	movs	r2, #5
 802cdac:	f814 1b01 	ldrb.w	r1, [r4], #1
 802cdb0:	484e      	ldr	r0, [pc, #312]	@ (802ceec <_svfiprintf_r+0x1e4>)
 802cdb2:	f7d3 faa5 	bl	8000300 <memchr>
 802cdb6:	9a04      	ldr	r2, [sp, #16]
 802cdb8:	b9d8      	cbnz	r0, 802cdf2 <_svfiprintf_r+0xea>
 802cdba:	06d0      	lsls	r0, r2, #27
 802cdbc:	bf44      	itt	mi
 802cdbe:	2320      	movmi	r3, #32
 802cdc0:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802cdc4:	0711      	lsls	r1, r2, #28
 802cdc6:	bf44      	itt	mi
 802cdc8:	232b      	movmi	r3, #43	@ 0x2b
 802cdca:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802cdce:	f89a 3000 	ldrb.w	r3, [sl]
 802cdd2:	2b2a      	cmp	r3, #42	@ 0x2a
 802cdd4:	d015      	beq.n	802ce02 <_svfiprintf_r+0xfa>
 802cdd6:	9a07      	ldr	r2, [sp, #28]
 802cdd8:	4654      	mov	r4, sl
 802cdda:	2000      	movs	r0, #0
 802cddc:	f04f 0c0a 	mov.w	ip, #10
 802cde0:	4621      	mov	r1, r4
 802cde2:	f811 3b01 	ldrb.w	r3, [r1], #1
 802cde6:	3b30      	subs	r3, #48	@ 0x30
 802cde8:	2b09      	cmp	r3, #9
 802cdea:	d94b      	bls.n	802ce84 <_svfiprintf_r+0x17c>
 802cdec:	b1b0      	cbz	r0, 802ce1c <_svfiprintf_r+0x114>
 802cdee:	9207      	str	r2, [sp, #28]
 802cdf0:	e014      	b.n	802ce1c <_svfiprintf_r+0x114>
 802cdf2:	eba0 0308 	sub.w	r3, r0, r8
 802cdf6:	fa09 f303 	lsl.w	r3, r9, r3
 802cdfa:	4313      	orrs	r3, r2
 802cdfc:	9304      	str	r3, [sp, #16]
 802cdfe:	46a2      	mov	sl, r4
 802ce00:	e7d2      	b.n	802cda8 <_svfiprintf_r+0xa0>
 802ce02:	9b03      	ldr	r3, [sp, #12]
 802ce04:	1d19      	adds	r1, r3, #4
 802ce06:	681b      	ldr	r3, [r3, #0]
 802ce08:	9103      	str	r1, [sp, #12]
 802ce0a:	2b00      	cmp	r3, #0
 802ce0c:	bfbb      	ittet	lt
 802ce0e:	425b      	neglt	r3, r3
 802ce10:	f042 0202 	orrlt.w	r2, r2, #2
 802ce14:	9307      	strge	r3, [sp, #28]
 802ce16:	9307      	strlt	r3, [sp, #28]
 802ce18:	bfb8      	it	lt
 802ce1a:	9204      	strlt	r2, [sp, #16]
 802ce1c:	7823      	ldrb	r3, [r4, #0]
 802ce1e:	2b2e      	cmp	r3, #46	@ 0x2e
 802ce20:	d10a      	bne.n	802ce38 <_svfiprintf_r+0x130>
 802ce22:	7863      	ldrb	r3, [r4, #1]
 802ce24:	2b2a      	cmp	r3, #42	@ 0x2a
 802ce26:	d132      	bne.n	802ce8e <_svfiprintf_r+0x186>
 802ce28:	9b03      	ldr	r3, [sp, #12]
 802ce2a:	1d1a      	adds	r2, r3, #4
 802ce2c:	681b      	ldr	r3, [r3, #0]
 802ce2e:	9203      	str	r2, [sp, #12]
 802ce30:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802ce34:	3402      	adds	r4, #2
 802ce36:	9305      	str	r3, [sp, #20]
 802ce38:	f8df a0c0 	ldr.w	sl, [pc, #192]	@ 802cefc <_svfiprintf_r+0x1f4>
 802ce3c:	7821      	ldrb	r1, [r4, #0]
 802ce3e:	2203      	movs	r2, #3
 802ce40:	4650      	mov	r0, sl
 802ce42:	f7d3 fa5d 	bl	8000300 <memchr>
 802ce46:	b138      	cbz	r0, 802ce58 <_svfiprintf_r+0x150>
 802ce48:	9b04      	ldr	r3, [sp, #16]
 802ce4a:	eba0 000a 	sub.w	r0, r0, sl
 802ce4e:	2240      	movs	r2, #64	@ 0x40
 802ce50:	4082      	lsls	r2, r0
 802ce52:	4313      	orrs	r3, r2
 802ce54:	3401      	adds	r4, #1
 802ce56:	9304      	str	r3, [sp, #16]
 802ce58:	f814 1b01 	ldrb.w	r1, [r4], #1
 802ce5c:	4824      	ldr	r0, [pc, #144]	@ (802cef0 <_svfiprintf_r+0x1e8>)
 802ce5e:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802ce62:	2206      	movs	r2, #6
 802ce64:	f7d3 fa4c 	bl	8000300 <memchr>
 802ce68:	2800      	cmp	r0, #0
 802ce6a:	d036      	beq.n	802ceda <_svfiprintf_r+0x1d2>
 802ce6c:	4b21      	ldr	r3, [pc, #132]	@ (802cef4 <_svfiprintf_r+0x1ec>)
 802ce6e:	bb1b      	cbnz	r3, 802ceb8 <_svfiprintf_r+0x1b0>
 802ce70:	9b03      	ldr	r3, [sp, #12]
 802ce72:	3307      	adds	r3, #7
 802ce74:	f023 0307 	bic.w	r3, r3, #7
 802ce78:	3308      	adds	r3, #8
 802ce7a:	9303      	str	r3, [sp, #12]
 802ce7c:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802ce7e:	4433      	add	r3, r6
 802ce80:	9309      	str	r3, [sp, #36]	@ 0x24
 802ce82:	e76a      	b.n	802cd5a <_svfiprintf_r+0x52>
 802ce84:	fb0c 3202 	mla	r2, ip, r2, r3
 802ce88:	460c      	mov	r4, r1
 802ce8a:	2001      	movs	r0, #1
 802ce8c:	e7a8      	b.n	802cde0 <_svfiprintf_r+0xd8>
 802ce8e:	2300      	movs	r3, #0
 802ce90:	3401      	adds	r4, #1
 802ce92:	9305      	str	r3, [sp, #20]
 802ce94:	4619      	mov	r1, r3
 802ce96:	f04f 0c0a 	mov.w	ip, #10
 802ce9a:	4620      	mov	r0, r4
 802ce9c:	f810 2b01 	ldrb.w	r2, [r0], #1
 802cea0:	3a30      	subs	r2, #48	@ 0x30
 802cea2:	2a09      	cmp	r2, #9
 802cea4:	d903      	bls.n	802ceae <_svfiprintf_r+0x1a6>
 802cea6:	2b00      	cmp	r3, #0
 802cea8:	d0c6      	beq.n	802ce38 <_svfiprintf_r+0x130>
 802ceaa:	9105      	str	r1, [sp, #20]
 802ceac:	e7c4      	b.n	802ce38 <_svfiprintf_r+0x130>
 802ceae:	fb0c 2101 	mla	r1, ip, r1, r2
 802ceb2:	4604      	mov	r4, r0
 802ceb4:	2301      	movs	r3, #1
 802ceb6:	e7f0      	b.n	802ce9a <_svfiprintf_r+0x192>
 802ceb8:	ab03      	add	r3, sp, #12
 802ceba:	9300      	str	r3, [sp, #0]
 802cebc:	462a      	mov	r2, r5
 802cebe:	4b0e      	ldr	r3, [pc, #56]	@ (802cef8 <_svfiprintf_r+0x1f0>)
 802cec0:	a904      	add	r1, sp, #16
 802cec2:	4638      	mov	r0, r7
 802cec4:	f7fd f960 	bl	802a188 <_printf_float>
 802cec8:	1c42      	adds	r2, r0, #1
 802ceca:	4606      	mov	r6, r0
 802cecc:	d1d6      	bne.n	802ce7c <_svfiprintf_r+0x174>
 802cece:	89ab      	ldrh	r3, [r5, #12]
 802ced0:	065b      	lsls	r3, r3, #25
 802ced2:	f53f af2d 	bmi.w	802cd30 <_svfiprintf_r+0x28>
 802ced6:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802ced8:	e72c      	b.n	802cd34 <_svfiprintf_r+0x2c>
 802ceda:	ab03      	add	r3, sp, #12
 802cedc:	9300      	str	r3, [sp, #0]
 802cede:	462a      	mov	r2, r5
 802cee0:	4b05      	ldr	r3, [pc, #20]	@ (802cef8 <_svfiprintf_r+0x1f0>)
 802cee2:	a904      	add	r1, sp, #16
 802cee4:	4638      	mov	r0, r7
 802cee6:	f7fd fbd7 	bl	802a698 <_printf_i>
 802ceea:	e7ed      	b.n	802cec8 <_svfiprintf_r+0x1c0>
 802ceec:	08032378 	.word	0x08032378
 802cef0:	08032382 	.word	0x08032382
 802cef4:	0802a189 	.word	0x0802a189
 802cef8:	0802cc51 	.word	0x0802cc51
 802cefc:	0803237e 	.word	0x0803237e

0802cf00 <__sfputc_r>:
 802cf00:	6893      	ldr	r3, [r2, #8]
 802cf02:	3b01      	subs	r3, #1
 802cf04:	2b00      	cmp	r3, #0
 802cf06:	b410      	push	{r4}
 802cf08:	6093      	str	r3, [r2, #8]
 802cf0a:	da08      	bge.n	802cf1e <__sfputc_r+0x1e>
 802cf0c:	6994      	ldr	r4, [r2, #24]
 802cf0e:	42a3      	cmp	r3, r4
 802cf10:	db01      	blt.n	802cf16 <__sfputc_r+0x16>
 802cf12:	290a      	cmp	r1, #10
 802cf14:	d103      	bne.n	802cf1e <__sfputc_r+0x1e>
 802cf16:	f85d 4b04 	ldr.w	r4, [sp], #4
 802cf1a:	f7fd be72 	b.w	802ac02 <__swbuf_r>
 802cf1e:	6813      	ldr	r3, [r2, #0]
 802cf20:	1c58      	adds	r0, r3, #1
 802cf22:	6010      	str	r0, [r2, #0]
 802cf24:	7019      	strb	r1, [r3, #0]
 802cf26:	4608      	mov	r0, r1
 802cf28:	f85d 4b04 	ldr.w	r4, [sp], #4
 802cf2c:	4770      	bx	lr

0802cf2e <__sfputs_r>:
 802cf2e:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802cf30:	4606      	mov	r6, r0
 802cf32:	460f      	mov	r7, r1
 802cf34:	4614      	mov	r4, r2
 802cf36:	18d5      	adds	r5, r2, r3
 802cf38:	42ac      	cmp	r4, r5
 802cf3a:	d101      	bne.n	802cf40 <__sfputs_r+0x12>
 802cf3c:	2000      	movs	r0, #0
 802cf3e:	e007      	b.n	802cf50 <__sfputs_r+0x22>
 802cf40:	f814 1b01 	ldrb.w	r1, [r4], #1
 802cf44:	463a      	mov	r2, r7
 802cf46:	4630      	mov	r0, r6
 802cf48:	f7ff ffda 	bl	802cf00 <__sfputc_r>
 802cf4c:	1c43      	adds	r3, r0, #1
 802cf4e:	d1f3      	bne.n	802cf38 <__sfputs_r+0xa>
 802cf50:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
	...

0802cf54 <_vfiprintf_r>:
 802cf54:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 802cf58:	460d      	mov	r5, r1
 802cf5a:	b09d      	sub	sp, #116	@ 0x74
 802cf5c:	4614      	mov	r4, r2
 802cf5e:	4698      	mov	r8, r3
 802cf60:	4606      	mov	r6, r0
 802cf62:	b118      	cbz	r0, 802cf6c <_vfiprintf_r+0x18>
 802cf64:	6a03      	ldr	r3, [r0, #32]
 802cf66:	b90b      	cbnz	r3, 802cf6c <_vfiprintf_r+0x18>
 802cf68:	f7fd fd42 	bl	802a9f0 <__sinit>
 802cf6c:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802cf6e:	07d9      	lsls	r1, r3, #31
 802cf70:	d405      	bmi.n	802cf7e <_vfiprintf_r+0x2a>
 802cf72:	89ab      	ldrh	r3, [r5, #12]
 802cf74:	059a      	lsls	r2, r3, #22
 802cf76:	d402      	bmi.n	802cf7e <_vfiprintf_r+0x2a>
 802cf78:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802cf7a:	f7fd fff6 	bl	802af6a <__retarget_lock_acquire_recursive>
 802cf7e:	89ab      	ldrh	r3, [r5, #12]
 802cf80:	071b      	lsls	r3, r3, #28
 802cf82:	d501      	bpl.n	802cf88 <_vfiprintf_r+0x34>
 802cf84:	692b      	ldr	r3, [r5, #16]
 802cf86:	b99b      	cbnz	r3, 802cfb0 <_vfiprintf_r+0x5c>
 802cf88:	4629      	mov	r1, r5
 802cf8a:	4630      	mov	r0, r6
 802cf8c:	f7fd fe78 	bl	802ac80 <__swsetup_r>
 802cf90:	b170      	cbz	r0, 802cfb0 <_vfiprintf_r+0x5c>
 802cf92:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802cf94:	07dc      	lsls	r4, r3, #31
 802cf96:	d504      	bpl.n	802cfa2 <_vfiprintf_r+0x4e>
 802cf98:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802cf9c:	b01d      	add	sp, #116	@ 0x74
 802cf9e:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 802cfa2:	89ab      	ldrh	r3, [r5, #12]
 802cfa4:	0598      	lsls	r0, r3, #22
 802cfa6:	d4f7      	bmi.n	802cf98 <_vfiprintf_r+0x44>
 802cfa8:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802cfaa:	f7fd ffdf 	bl	802af6c <__retarget_lock_release_recursive>
 802cfae:	e7f3      	b.n	802cf98 <_vfiprintf_r+0x44>
 802cfb0:	2300      	movs	r3, #0
 802cfb2:	9309      	str	r3, [sp, #36]	@ 0x24
 802cfb4:	2320      	movs	r3, #32
 802cfb6:	f88d 3029 	strb.w	r3, [sp, #41]	@ 0x29
 802cfba:	f8cd 800c 	str.w	r8, [sp, #12]
 802cfbe:	2330      	movs	r3, #48	@ 0x30
 802cfc0:	f8df 81ac 	ldr.w	r8, [pc, #428]	@ 802d170 <_vfiprintf_r+0x21c>
 802cfc4:	f88d 302a 	strb.w	r3, [sp, #42]	@ 0x2a
 802cfc8:	f04f 0901 	mov.w	r9, #1
 802cfcc:	4623      	mov	r3, r4
 802cfce:	469a      	mov	sl, r3
 802cfd0:	f813 2b01 	ldrb.w	r2, [r3], #1
 802cfd4:	b10a      	cbz	r2, 802cfda <_vfiprintf_r+0x86>
 802cfd6:	2a25      	cmp	r2, #37	@ 0x25
 802cfd8:	d1f9      	bne.n	802cfce <_vfiprintf_r+0x7a>
 802cfda:	ebba 0b04 	subs.w	fp, sl, r4
 802cfde:	d00b      	beq.n	802cff8 <_vfiprintf_r+0xa4>
 802cfe0:	465b      	mov	r3, fp
 802cfe2:	4622      	mov	r2, r4
 802cfe4:	4629      	mov	r1, r5
 802cfe6:	4630      	mov	r0, r6
 802cfe8:	f7ff ffa1 	bl	802cf2e <__sfputs_r>
 802cfec:	3001      	adds	r0, #1
 802cfee:	f000 80a7 	beq.w	802d140 <_vfiprintf_r+0x1ec>
 802cff2:	9a09      	ldr	r2, [sp, #36]	@ 0x24
 802cff4:	445a      	add	r2, fp
 802cff6:	9209      	str	r2, [sp, #36]	@ 0x24
 802cff8:	f89a 3000 	ldrb.w	r3, [sl]
 802cffc:	2b00      	cmp	r3, #0
 802cffe:	f000 809f 	beq.w	802d140 <_vfiprintf_r+0x1ec>
 802d002:	2300      	movs	r3, #0
 802d004:	f04f 32ff 	mov.w	r2, #4294967295	@ 0xffffffff
 802d008:	e9cd 2305 	strd	r2, r3, [sp, #20]
 802d00c:	f10a 0a01 	add.w	sl, sl, #1
 802d010:	9304      	str	r3, [sp, #16]
 802d012:	9307      	str	r3, [sp, #28]
 802d014:	f88d 3053 	strb.w	r3, [sp, #83]	@ 0x53
 802d018:	931a      	str	r3, [sp, #104]	@ 0x68
 802d01a:	4654      	mov	r4, sl
 802d01c:	2205      	movs	r2, #5
 802d01e:	f814 1b01 	ldrb.w	r1, [r4], #1
 802d022:	4853      	ldr	r0, [pc, #332]	@ (802d170 <_vfiprintf_r+0x21c>)
 802d024:	f7d3 f96c 	bl	8000300 <memchr>
 802d028:	9a04      	ldr	r2, [sp, #16]
 802d02a:	b9d8      	cbnz	r0, 802d064 <_vfiprintf_r+0x110>
 802d02c:	06d1      	lsls	r1, r2, #27
 802d02e:	bf44      	itt	mi
 802d030:	2320      	movmi	r3, #32
 802d032:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802d036:	0713      	lsls	r3, r2, #28
 802d038:	bf44      	itt	mi
 802d03a:	232b      	movmi	r3, #43	@ 0x2b
 802d03c:	f88d 3053 	strbmi.w	r3, [sp, #83]	@ 0x53
 802d040:	f89a 3000 	ldrb.w	r3, [sl]
 802d044:	2b2a      	cmp	r3, #42	@ 0x2a
 802d046:	d015      	beq.n	802d074 <_vfiprintf_r+0x120>
 802d048:	9a07      	ldr	r2, [sp, #28]
 802d04a:	4654      	mov	r4, sl
 802d04c:	2000      	movs	r0, #0
 802d04e:	f04f 0c0a 	mov.w	ip, #10
 802d052:	4621      	mov	r1, r4
 802d054:	f811 3b01 	ldrb.w	r3, [r1], #1
 802d058:	3b30      	subs	r3, #48	@ 0x30
 802d05a:	2b09      	cmp	r3, #9
 802d05c:	d94b      	bls.n	802d0f6 <_vfiprintf_r+0x1a2>
 802d05e:	b1b0      	cbz	r0, 802d08e <_vfiprintf_r+0x13a>
 802d060:	9207      	str	r2, [sp, #28]
 802d062:	e014      	b.n	802d08e <_vfiprintf_r+0x13a>
 802d064:	eba0 0308 	sub.w	r3, r0, r8
 802d068:	fa09 f303 	lsl.w	r3, r9, r3
 802d06c:	4313      	orrs	r3, r2
 802d06e:	9304      	str	r3, [sp, #16]
 802d070:	46a2      	mov	sl, r4
 802d072:	e7d2      	b.n	802d01a <_vfiprintf_r+0xc6>
 802d074:	9b03      	ldr	r3, [sp, #12]
 802d076:	1d19      	adds	r1, r3, #4
 802d078:	681b      	ldr	r3, [r3, #0]
 802d07a:	9103      	str	r1, [sp, #12]
 802d07c:	2b00      	cmp	r3, #0
 802d07e:	bfbb      	ittet	lt
 802d080:	425b      	neglt	r3, r3
 802d082:	f042 0202 	orrlt.w	r2, r2, #2
 802d086:	9307      	strge	r3, [sp, #28]
 802d088:	9307      	strlt	r3, [sp, #28]
 802d08a:	bfb8      	it	lt
 802d08c:	9204      	strlt	r2, [sp, #16]
 802d08e:	7823      	ldrb	r3, [r4, #0]
 802d090:	2b2e      	cmp	r3, #46	@ 0x2e
 802d092:	d10a      	bne.n	802d0aa <_vfiprintf_r+0x156>
 802d094:	7863      	ldrb	r3, [r4, #1]
 802d096:	2b2a      	cmp	r3, #42	@ 0x2a
 802d098:	d132      	bne.n	802d100 <_vfiprintf_r+0x1ac>
 802d09a:	9b03      	ldr	r3, [sp, #12]
 802d09c:	1d1a      	adds	r2, r3, #4
 802d09e:	681b      	ldr	r3, [r3, #0]
 802d0a0:	9203      	str	r2, [sp, #12]
 802d0a2:	ea43 73e3 	orr.w	r3, r3, r3, asr #31
 802d0a6:	3402      	adds	r4, #2
 802d0a8:	9305      	str	r3, [sp, #20]
 802d0aa:	f8df a0d4 	ldr.w	sl, [pc, #212]	@ 802d180 <_vfiprintf_r+0x22c>
 802d0ae:	7821      	ldrb	r1, [r4, #0]
 802d0b0:	2203      	movs	r2, #3
 802d0b2:	4650      	mov	r0, sl
 802d0b4:	f7d3 f924 	bl	8000300 <memchr>
 802d0b8:	b138      	cbz	r0, 802d0ca <_vfiprintf_r+0x176>
 802d0ba:	9b04      	ldr	r3, [sp, #16]
 802d0bc:	eba0 000a 	sub.w	r0, r0, sl
 802d0c0:	2240      	movs	r2, #64	@ 0x40
 802d0c2:	4082      	lsls	r2, r0
 802d0c4:	4313      	orrs	r3, r2
 802d0c6:	3401      	adds	r4, #1
 802d0c8:	9304      	str	r3, [sp, #16]
 802d0ca:	f814 1b01 	ldrb.w	r1, [r4], #1
 802d0ce:	4829      	ldr	r0, [pc, #164]	@ (802d174 <_vfiprintf_r+0x220>)
 802d0d0:	f88d 1028 	strb.w	r1, [sp, #40]	@ 0x28
 802d0d4:	2206      	movs	r2, #6
 802d0d6:	f7d3 f913 	bl	8000300 <memchr>
 802d0da:	2800      	cmp	r0, #0
 802d0dc:	d03f      	beq.n	802d15e <_vfiprintf_r+0x20a>
 802d0de:	4b26      	ldr	r3, [pc, #152]	@ (802d178 <_vfiprintf_r+0x224>)
 802d0e0:	bb1b      	cbnz	r3, 802d12a <_vfiprintf_r+0x1d6>
 802d0e2:	9b03      	ldr	r3, [sp, #12]
 802d0e4:	3307      	adds	r3, #7
 802d0e6:	f023 0307 	bic.w	r3, r3, #7
 802d0ea:	3308      	adds	r3, #8
 802d0ec:	9303      	str	r3, [sp, #12]
 802d0ee:	9b09      	ldr	r3, [sp, #36]	@ 0x24
 802d0f0:	443b      	add	r3, r7
 802d0f2:	9309      	str	r3, [sp, #36]	@ 0x24
 802d0f4:	e76a      	b.n	802cfcc <_vfiprintf_r+0x78>
 802d0f6:	fb0c 3202 	mla	r2, ip, r2, r3
 802d0fa:	460c      	mov	r4, r1
 802d0fc:	2001      	movs	r0, #1
 802d0fe:	e7a8      	b.n	802d052 <_vfiprintf_r+0xfe>
 802d100:	2300      	movs	r3, #0
 802d102:	3401      	adds	r4, #1
 802d104:	9305      	str	r3, [sp, #20]
 802d106:	4619      	mov	r1, r3
 802d108:	f04f 0c0a 	mov.w	ip, #10
 802d10c:	4620      	mov	r0, r4
 802d10e:	f810 2b01 	ldrb.w	r2, [r0], #1
 802d112:	3a30      	subs	r2, #48	@ 0x30
 802d114:	2a09      	cmp	r2, #9
 802d116:	d903      	bls.n	802d120 <_vfiprintf_r+0x1cc>
 802d118:	2b00      	cmp	r3, #0
 802d11a:	d0c6      	beq.n	802d0aa <_vfiprintf_r+0x156>
 802d11c:	9105      	str	r1, [sp, #20]
 802d11e:	e7c4      	b.n	802d0aa <_vfiprintf_r+0x156>
 802d120:	fb0c 2101 	mla	r1, ip, r1, r2
 802d124:	4604      	mov	r4, r0
 802d126:	2301      	movs	r3, #1
 802d128:	e7f0      	b.n	802d10c <_vfiprintf_r+0x1b8>
 802d12a:	ab03      	add	r3, sp, #12
 802d12c:	9300      	str	r3, [sp, #0]
 802d12e:	462a      	mov	r2, r5
 802d130:	4b12      	ldr	r3, [pc, #72]	@ (802d17c <_vfiprintf_r+0x228>)
 802d132:	a904      	add	r1, sp, #16
 802d134:	4630      	mov	r0, r6
 802d136:	f7fd f827 	bl	802a188 <_printf_float>
 802d13a:	4607      	mov	r7, r0
 802d13c:	1c78      	adds	r0, r7, #1
 802d13e:	d1d6      	bne.n	802d0ee <_vfiprintf_r+0x19a>
 802d140:	6e6b      	ldr	r3, [r5, #100]	@ 0x64
 802d142:	07d9      	lsls	r1, r3, #31
 802d144:	d405      	bmi.n	802d152 <_vfiprintf_r+0x1fe>
 802d146:	89ab      	ldrh	r3, [r5, #12]
 802d148:	059a      	lsls	r2, r3, #22
 802d14a:	d402      	bmi.n	802d152 <_vfiprintf_r+0x1fe>
 802d14c:	6da8      	ldr	r0, [r5, #88]	@ 0x58
 802d14e:	f7fd ff0d 	bl	802af6c <__retarget_lock_release_recursive>
 802d152:	89ab      	ldrh	r3, [r5, #12]
 802d154:	065b      	lsls	r3, r3, #25
 802d156:	f53f af1f 	bmi.w	802cf98 <_vfiprintf_r+0x44>
 802d15a:	9809      	ldr	r0, [sp, #36]	@ 0x24
 802d15c:	e71e      	b.n	802cf9c <_vfiprintf_r+0x48>
 802d15e:	ab03      	add	r3, sp, #12
 802d160:	9300      	str	r3, [sp, #0]
 802d162:	462a      	mov	r2, r5
 802d164:	4b05      	ldr	r3, [pc, #20]	@ (802d17c <_vfiprintf_r+0x228>)
 802d166:	a904      	add	r1, sp, #16
 802d168:	4630      	mov	r0, r6
 802d16a:	f7fd fa95 	bl	802a698 <_printf_i>
 802d16e:	e7e4      	b.n	802d13a <_vfiprintf_r+0x1e6>
 802d170:	08032378 	.word	0x08032378
 802d174:	08032382 	.word	0x08032382
 802d178:	0802a189 	.word	0x0802a189
 802d17c:	0802cf2f 	.word	0x0802cf2f
 802d180:	0803237e 	.word	0x0803237e

0802d184 <__sflush_r>:
 802d184:	f9b1 200c 	ldrsh.w	r2, [r1, #12]
 802d188:	e92d 41f0 	stmdb	sp!, {r4, r5, r6, r7, r8, lr}
 802d18c:	0716      	lsls	r6, r2, #28
 802d18e:	4605      	mov	r5, r0
 802d190:	460c      	mov	r4, r1
 802d192:	d454      	bmi.n	802d23e <__sflush_r+0xba>
 802d194:	684b      	ldr	r3, [r1, #4]
 802d196:	2b00      	cmp	r3, #0
 802d198:	dc02      	bgt.n	802d1a0 <__sflush_r+0x1c>
 802d19a:	6c0b      	ldr	r3, [r1, #64]	@ 0x40
 802d19c:	2b00      	cmp	r3, #0
 802d19e:	dd48      	ble.n	802d232 <__sflush_r+0xae>
 802d1a0:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802d1a2:	2e00      	cmp	r6, #0
 802d1a4:	d045      	beq.n	802d232 <__sflush_r+0xae>
 802d1a6:	2300      	movs	r3, #0
 802d1a8:	f412 5280 	ands.w	r2, r2, #4096	@ 0x1000
 802d1ac:	682f      	ldr	r7, [r5, #0]
 802d1ae:	6a21      	ldr	r1, [r4, #32]
 802d1b0:	602b      	str	r3, [r5, #0]
 802d1b2:	d030      	beq.n	802d216 <__sflush_r+0x92>
 802d1b4:	6d62      	ldr	r2, [r4, #84]	@ 0x54
 802d1b6:	89a3      	ldrh	r3, [r4, #12]
 802d1b8:	0759      	lsls	r1, r3, #29
 802d1ba:	d505      	bpl.n	802d1c8 <__sflush_r+0x44>
 802d1bc:	6863      	ldr	r3, [r4, #4]
 802d1be:	1ad2      	subs	r2, r2, r3
 802d1c0:	6b63      	ldr	r3, [r4, #52]	@ 0x34
 802d1c2:	b10b      	cbz	r3, 802d1c8 <__sflush_r+0x44>
 802d1c4:	6c23      	ldr	r3, [r4, #64]	@ 0x40
 802d1c6:	1ad2      	subs	r2, r2, r3
 802d1c8:	2300      	movs	r3, #0
 802d1ca:	6ae6      	ldr	r6, [r4, #44]	@ 0x2c
 802d1cc:	6a21      	ldr	r1, [r4, #32]
 802d1ce:	4628      	mov	r0, r5
 802d1d0:	47b0      	blx	r6
 802d1d2:	1c43      	adds	r3, r0, #1
 802d1d4:	89a3      	ldrh	r3, [r4, #12]
 802d1d6:	d106      	bne.n	802d1e6 <__sflush_r+0x62>
 802d1d8:	6829      	ldr	r1, [r5, #0]
 802d1da:	291d      	cmp	r1, #29
 802d1dc:	d82b      	bhi.n	802d236 <__sflush_r+0xb2>
 802d1de:	4a2a      	ldr	r2, [pc, #168]	@ (802d288 <__sflush_r+0x104>)
 802d1e0:	410a      	asrs	r2, r1
 802d1e2:	07d6      	lsls	r6, r2, #31
 802d1e4:	d427      	bmi.n	802d236 <__sflush_r+0xb2>
 802d1e6:	2200      	movs	r2, #0
 802d1e8:	6062      	str	r2, [r4, #4]
 802d1ea:	04d9      	lsls	r1, r3, #19
 802d1ec:	6922      	ldr	r2, [r4, #16]
 802d1ee:	6022      	str	r2, [r4, #0]
 802d1f0:	d504      	bpl.n	802d1fc <__sflush_r+0x78>
 802d1f2:	1c42      	adds	r2, r0, #1
 802d1f4:	d101      	bne.n	802d1fa <__sflush_r+0x76>
 802d1f6:	682b      	ldr	r3, [r5, #0]
 802d1f8:	b903      	cbnz	r3, 802d1fc <__sflush_r+0x78>
 802d1fa:	6560      	str	r0, [r4, #84]	@ 0x54
 802d1fc:	6b61      	ldr	r1, [r4, #52]	@ 0x34
 802d1fe:	602f      	str	r7, [r5, #0]
 802d200:	b1b9      	cbz	r1, 802d232 <__sflush_r+0xae>
 802d202:	f104 0344 	add.w	r3, r4, #68	@ 0x44
 802d206:	4299      	cmp	r1, r3
 802d208:	d002      	beq.n	802d210 <__sflush_r+0x8c>
 802d20a:	4628      	mov	r0, r5
 802d20c:	f7fe fcc6 	bl	802bb9c <_free_r>
 802d210:	2300      	movs	r3, #0
 802d212:	6363      	str	r3, [r4, #52]	@ 0x34
 802d214:	e00d      	b.n	802d232 <__sflush_r+0xae>
 802d216:	2301      	movs	r3, #1
 802d218:	4628      	mov	r0, r5
 802d21a:	47b0      	blx	r6
 802d21c:	4602      	mov	r2, r0
 802d21e:	1c50      	adds	r0, r2, #1
 802d220:	d1c9      	bne.n	802d1b6 <__sflush_r+0x32>
 802d222:	682b      	ldr	r3, [r5, #0]
 802d224:	2b00      	cmp	r3, #0
 802d226:	d0c6      	beq.n	802d1b6 <__sflush_r+0x32>
 802d228:	2b1d      	cmp	r3, #29
 802d22a:	d001      	beq.n	802d230 <__sflush_r+0xac>
 802d22c:	2b16      	cmp	r3, #22
 802d22e:	d11e      	bne.n	802d26e <__sflush_r+0xea>
 802d230:	602f      	str	r7, [r5, #0]
 802d232:	2000      	movs	r0, #0
 802d234:	e022      	b.n	802d27c <__sflush_r+0xf8>
 802d236:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802d23a:	b21b      	sxth	r3, r3
 802d23c:	e01b      	b.n	802d276 <__sflush_r+0xf2>
 802d23e:	690f      	ldr	r7, [r1, #16]
 802d240:	2f00      	cmp	r7, #0
 802d242:	d0f6      	beq.n	802d232 <__sflush_r+0xae>
 802d244:	0793      	lsls	r3, r2, #30
 802d246:	680e      	ldr	r6, [r1, #0]
 802d248:	bf08      	it	eq
 802d24a:	694b      	ldreq	r3, [r1, #20]
 802d24c:	600f      	str	r7, [r1, #0]
 802d24e:	bf18      	it	ne
 802d250:	2300      	movne	r3, #0
 802d252:	eba6 0807 	sub.w	r8, r6, r7
 802d256:	608b      	str	r3, [r1, #8]
 802d258:	f1b8 0f00 	cmp.w	r8, #0
 802d25c:	dde9      	ble.n	802d232 <__sflush_r+0xae>
 802d25e:	6a21      	ldr	r1, [r4, #32]
 802d260:	6aa6      	ldr	r6, [r4, #40]	@ 0x28
 802d262:	4643      	mov	r3, r8
 802d264:	463a      	mov	r2, r7
 802d266:	4628      	mov	r0, r5
 802d268:	47b0      	blx	r6
 802d26a:	2800      	cmp	r0, #0
 802d26c:	dc08      	bgt.n	802d280 <__sflush_r+0xfc>
 802d26e:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802d272:	f043 0340 	orr.w	r3, r3, #64	@ 0x40
 802d276:	81a3      	strh	r3, [r4, #12]
 802d278:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802d27c:	e8bd 81f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, pc}
 802d280:	4407      	add	r7, r0
 802d282:	eba8 0800 	sub.w	r8, r8, r0
 802d286:	e7e7      	b.n	802d258 <__sflush_r+0xd4>
 802d288:	dfbffffe 	.word	0xdfbffffe

0802d28c <_fflush_r>:
 802d28c:	b538      	push	{r3, r4, r5, lr}
 802d28e:	690b      	ldr	r3, [r1, #16]
 802d290:	4605      	mov	r5, r0
 802d292:	460c      	mov	r4, r1
 802d294:	b913      	cbnz	r3, 802d29c <_fflush_r+0x10>
 802d296:	2500      	movs	r5, #0
 802d298:	4628      	mov	r0, r5
 802d29a:	bd38      	pop	{r3, r4, r5, pc}
 802d29c:	b118      	cbz	r0, 802d2a6 <_fflush_r+0x1a>
 802d29e:	6a03      	ldr	r3, [r0, #32]
 802d2a0:	b90b      	cbnz	r3, 802d2a6 <_fflush_r+0x1a>
 802d2a2:	f7fd fba5 	bl	802a9f0 <__sinit>
 802d2a6:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802d2aa:	2b00      	cmp	r3, #0
 802d2ac:	d0f3      	beq.n	802d296 <_fflush_r+0xa>
 802d2ae:	6e62      	ldr	r2, [r4, #100]	@ 0x64
 802d2b0:	07d0      	lsls	r0, r2, #31
 802d2b2:	d404      	bmi.n	802d2be <_fflush_r+0x32>
 802d2b4:	0599      	lsls	r1, r3, #22
 802d2b6:	d402      	bmi.n	802d2be <_fflush_r+0x32>
 802d2b8:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802d2ba:	f7fd fe56 	bl	802af6a <__retarget_lock_acquire_recursive>
 802d2be:	4628      	mov	r0, r5
 802d2c0:	4621      	mov	r1, r4
 802d2c2:	f7ff ff5f 	bl	802d184 <__sflush_r>
 802d2c6:	6e63      	ldr	r3, [r4, #100]	@ 0x64
 802d2c8:	07da      	lsls	r2, r3, #31
 802d2ca:	4605      	mov	r5, r0
 802d2cc:	d4e4      	bmi.n	802d298 <_fflush_r+0xc>
 802d2ce:	89a3      	ldrh	r3, [r4, #12]
 802d2d0:	059b      	lsls	r3, r3, #22
 802d2d2:	d4e1      	bmi.n	802d298 <_fflush_r+0xc>
 802d2d4:	6da0      	ldr	r0, [r4, #88]	@ 0x58
 802d2d6:	f7fd fe49 	bl	802af6c <__retarget_lock_release_recursive>
 802d2da:	e7dd      	b.n	802d298 <_fflush_r+0xc>

0802d2dc <fiprintf>:
 802d2dc:	b40e      	push	{r1, r2, r3}
 802d2de:	b503      	push	{r0, r1, lr}
 802d2e0:	4601      	mov	r1, r0
 802d2e2:	ab03      	add	r3, sp, #12
 802d2e4:	4805      	ldr	r0, [pc, #20]	@ (802d2fc <fiprintf+0x20>)
 802d2e6:	f853 2b04 	ldr.w	r2, [r3], #4
 802d2ea:	6800      	ldr	r0, [r0, #0]
 802d2ec:	9301      	str	r3, [sp, #4]
 802d2ee:	f7ff fe31 	bl	802cf54 <_vfiprintf_r>
 802d2f2:	b002      	add	sp, #8
 802d2f4:	f85d eb04 	ldr.w	lr, [sp], #4
 802d2f8:	b003      	add	sp, #12
 802d2fa:	4770      	bx	lr
 802d2fc:	240001d4 	.word	0x240001d4

0802d300 <__swhatbuf_r>:
 802d300:	b570      	push	{r4, r5, r6, lr}
 802d302:	460c      	mov	r4, r1
 802d304:	f9b1 100e 	ldrsh.w	r1, [r1, #14]
 802d308:	2900      	cmp	r1, #0
 802d30a:	b096      	sub	sp, #88	@ 0x58
 802d30c:	4615      	mov	r5, r2
 802d30e:	461e      	mov	r6, r3
 802d310:	da0d      	bge.n	802d32e <__swhatbuf_r+0x2e>
 802d312:	89a3      	ldrh	r3, [r4, #12]
 802d314:	f013 0f80 	tst.w	r3, #128	@ 0x80
 802d318:	f04f 0100 	mov.w	r1, #0
 802d31c:	bf14      	ite	ne
 802d31e:	2340      	movne	r3, #64	@ 0x40
 802d320:	f44f 6380 	moveq.w	r3, #1024	@ 0x400
 802d324:	2000      	movs	r0, #0
 802d326:	6031      	str	r1, [r6, #0]
 802d328:	602b      	str	r3, [r5, #0]
 802d32a:	b016      	add	sp, #88	@ 0x58
 802d32c:	bd70      	pop	{r4, r5, r6, pc}
 802d32e:	466a      	mov	r2, sp
 802d330:	f000 f848 	bl	802d3c4 <_fstat_r>
 802d334:	2800      	cmp	r0, #0
 802d336:	dbec      	blt.n	802d312 <__swhatbuf_r+0x12>
 802d338:	9901      	ldr	r1, [sp, #4]
 802d33a:	f401 4170 	and.w	r1, r1, #61440	@ 0xf000
 802d33e:	f5a1 5300 	sub.w	r3, r1, #8192	@ 0x2000
 802d342:	4259      	negs	r1, r3
 802d344:	4159      	adcs	r1, r3
 802d346:	f44f 6380 	mov.w	r3, #1024	@ 0x400
 802d34a:	e7eb      	b.n	802d324 <__swhatbuf_r+0x24>

0802d34c <__smakebuf_r>:
 802d34c:	898b      	ldrh	r3, [r1, #12]
 802d34e:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
 802d350:	079d      	lsls	r5, r3, #30
 802d352:	4606      	mov	r6, r0
 802d354:	460c      	mov	r4, r1
 802d356:	d507      	bpl.n	802d368 <__smakebuf_r+0x1c>
 802d358:	f104 0347 	add.w	r3, r4, #71	@ 0x47
 802d35c:	6023      	str	r3, [r4, #0]
 802d35e:	6123      	str	r3, [r4, #16]
 802d360:	2301      	movs	r3, #1
 802d362:	6163      	str	r3, [r4, #20]
 802d364:	b003      	add	sp, #12
 802d366:	bdf0      	pop	{r4, r5, r6, r7, pc}
 802d368:	ab01      	add	r3, sp, #4
 802d36a:	466a      	mov	r2, sp
 802d36c:	f7ff ffc8 	bl	802d300 <__swhatbuf_r>
 802d370:	9f00      	ldr	r7, [sp, #0]
 802d372:	4605      	mov	r5, r0
 802d374:	4639      	mov	r1, r7
 802d376:	4630      	mov	r0, r6
 802d378:	f7fb ffba 	bl	80292f0 <_malloc_r>
 802d37c:	b948      	cbnz	r0, 802d392 <__smakebuf_r+0x46>
 802d37e:	f9b4 300c 	ldrsh.w	r3, [r4, #12]
 802d382:	059a      	lsls	r2, r3, #22
 802d384:	d4ee      	bmi.n	802d364 <__smakebuf_r+0x18>
 802d386:	f023 0303 	bic.w	r3, r3, #3
 802d38a:	f043 0302 	orr.w	r3, r3, #2
 802d38e:	81a3      	strh	r3, [r4, #12]
 802d390:	e7e2      	b.n	802d358 <__smakebuf_r+0xc>
 802d392:	89a3      	ldrh	r3, [r4, #12]
 802d394:	6020      	str	r0, [r4, #0]
 802d396:	f043 0380 	orr.w	r3, r3, #128	@ 0x80
 802d39a:	81a3      	strh	r3, [r4, #12]
 802d39c:	9b01      	ldr	r3, [sp, #4]
 802d39e:	e9c4 0704 	strd	r0, r7, [r4, #16]
 802d3a2:	b15b      	cbz	r3, 802d3bc <__smakebuf_r+0x70>
 802d3a4:	f9b4 100e 	ldrsh.w	r1, [r4, #14]
 802d3a8:	4630      	mov	r0, r6
 802d3aa:	f000 f81d 	bl	802d3e8 <_isatty_r>
 802d3ae:	b128      	cbz	r0, 802d3bc <__smakebuf_r+0x70>
 802d3b0:	89a3      	ldrh	r3, [r4, #12]
 802d3b2:	f023 0303 	bic.w	r3, r3, #3
 802d3b6:	f043 0301 	orr.w	r3, r3, #1
 802d3ba:	81a3      	strh	r3, [r4, #12]
 802d3bc:	89a3      	ldrh	r3, [r4, #12]
 802d3be:	431d      	orrs	r5, r3
 802d3c0:	81a5      	strh	r5, [r4, #12]
 802d3c2:	e7cf      	b.n	802d364 <__smakebuf_r+0x18>

0802d3c4 <_fstat_r>:
 802d3c4:	b538      	push	{r3, r4, r5, lr}
 802d3c6:	4d07      	ldr	r5, [pc, #28]	@ (802d3e4 <_fstat_r+0x20>)
 802d3c8:	2300      	movs	r3, #0
 802d3ca:	4604      	mov	r4, r0
 802d3cc:	4608      	mov	r0, r1
 802d3ce:	4611      	mov	r1, r2
 802d3d0:	602b      	str	r3, [r5, #0]
 802d3d2:	f7d7 f821 	bl	8004418 <_fstat>
 802d3d6:	1c43      	adds	r3, r0, #1
 802d3d8:	d102      	bne.n	802d3e0 <_fstat_r+0x1c>
 802d3da:	682b      	ldr	r3, [r5, #0]
 802d3dc:	b103      	cbz	r3, 802d3e0 <_fstat_r+0x1c>
 802d3de:	6023      	str	r3, [r4, #0]
 802d3e0:	bd38      	pop	{r3, r4, r5, pc}
 802d3e2:	bf00      	nop
 802d3e4:	2402b2a0 	.word	0x2402b2a0

0802d3e8 <_isatty_r>:
 802d3e8:	b538      	push	{r3, r4, r5, lr}
 802d3ea:	4d06      	ldr	r5, [pc, #24]	@ (802d404 <_isatty_r+0x1c>)
 802d3ec:	2300      	movs	r3, #0
 802d3ee:	4604      	mov	r4, r0
 802d3f0:	4608      	mov	r0, r1
 802d3f2:	602b      	str	r3, [r5, #0]
 802d3f4:	f7d7 f820 	bl	8004438 <_isatty>
 802d3f8:	1c43      	adds	r3, r0, #1
 802d3fa:	d102      	bne.n	802d402 <_isatty_r+0x1a>
 802d3fc:	682b      	ldr	r3, [r5, #0]
 802d3fe:	b103      	cbz	r3, 802d402 <_isatty_r+0x1a>
 802d400:	6023      	str	r3, [r4, #0]
 802d402:	bd38      	pop	{r3, r4, r5, pc}
 802d404:	2402b2a0 	.word	0x2402b2a0

0802d408 <abort>:
 802d408:	b508      	push	{r3, lr}
 802d40a:	2006      	movs	r0, #6
 802d40c:	f000 f840 	bl	802d490 <raise>
 802d410:	2001      	movs	r0, #1
 802d412:	f7d6 ffb1 	bl	8004378 <_exit>

0802d416 <_calloc_r>:
 802d416:	b570      	push	{r4, r5, r6, lr}
 802d418:	fba1 5402 	umull	r5, r4, r1, r2
 802d41c:	b93c      	cbnz	r4, 802d42e <_calloc_r+0x18>
 802d41e:	4629      	mov	r1, r5
 802d420:	f7fb ff66 	bl	80292f0 <_malloc_r>
 802d424:	4606      	mov	r6, r0
 802d426:	b928      	cbnz	r0, 802d434 <_calloc_r+0x1e>
 802d428:	2600      	movs	r6, #0
 802d42a:	4630      	mov	r0, r6
 802d42c:	bd70      	pop	{r4, r5, r6, pc}
 802d42e:	220c      	movs	r2, #12
 802d430:	6002      	str	r2, [r0, #0]
 802d432:	e7f9      	b.n	802d428 <_calloc_r+0x12>
 802d434:	462a      	mov	r2, r5
 802d436:	4621      	mov	r1, r4
 802d438:	f7fd fca2 	bl	802ad80 <memset>
 802d43c:	e7f5      	b.n	802d42a <_calloc_r+0x14>

0802d43e <_raise_r>:
 802d43e:	291f      	cmp	r1, #31
 802d440:	b538      	push	{r3, r4, r5, lr}
 802d442:	4605      	mov	r5, r0
 802d444:	460c      	mov	r4, r1
 802d446:	d904      	bls.n	802d452 <_raise_r+0x14>
 802d448:	2316      	movs	r3, #22
 802d44a:	6003      	str	r3, [r0, #0]
 802d44c:	f04f 30ff 	mov.w	r0, #4294967295	@ 0xffffffff
 802d450:	bd38      	pop	{r3, r4, r5, pc}
 802d452:	6bc2      	ldr	r2, [r0, #60]	@ 0x3c
 802d454:	b112      	cbz	r2, 802d45c <_raise_r+0x1e>
 802d456:	f852 3021 	ldr.w	r3, [r2, r1, lsl #2]
 802d45a:	b94b      	cbnz	r3, 802d470 <_raise_r+0x32>
 802d45c:	4628      	mov	r0, r5
 802d45e:	f000 f831 	bl	802d4c4 <_getpid_r>
 802d462:	4622      	mov	r2, r4
 802d464:	4601      	mov	r1, r0
 802d466:	4628      	mov	r0, r5
 802d468:	e8bd 4038 	ldmia.w	sp!, {r3, r4, r5, lr}
 802d46c:	f000 b818 	b.w	802d4a0 <_kill_r>
 802d470:	2b01      	cmp	r3, #1
 802d472:	d00a      	beq.n	802d48a <_raise_r+0x4c>
 802d474:	1c59      	adds	r1, r3, #1
 802d476:	d103      	bne.n	802d480 <_raise_r+0x42>
 802d478:	2316      	movs	r3, #22
 802d47a:	6003      	str	r3, [r0, #0]
 802d47c:	2001      	movs	r0, #1
 802d47e:	e7e7      	b.n	802d450 <_raise_r+0x12>
 802d480:	2100      	movs	r1, #0
 802d482:	f842 1024 	str.w	r1, [r2, r4, lsl #2]
 802d486:	4620      	mov	r0, r4
 802d488:	4798      	blx	r3
 802d48a:	2000      	movs	r0, #0
 802d48c:	e7e0      	b.n	802d450 <_raise_r+0x12>
	...

0802d490 <raise>:
 802d490:	4b02      	ldr	r3, [pc, #8]	@ (802d49c <raise+0xc>)
 802d492:	4601      	mov	r1, r0
 802d494:	6818      	ldr	r0, [r3, #0]
 802d496:	f7ff bfd2 	b.w	802d43e <_raise_r>
 802d49a:	bf00      	nop
 802d49c:	240001d4 	.word	0x240001d4

0802d4a0 <_kill_r>:
 802d4a0:	b538      	push	{r3, r4, r5, lr}
 802d4a2:	4d07      	ldr	r5, [pc, #28]	@ (802d4c0 <_kill_r+0x20>)
 802d4a4:	2300      	movs	r3, #0
 802d4a6:	4604      	mov	r4, r0
 802d4a8:	4608      	mov	r0, r1
 802d4aa:	4611      	mov	r1, r2
 802d4ac:	602b      	str	r3, [r5, #0]
 802d4ae:	f7d6 ff51 	bl	8004354 <_kill>
 802d4b2:	1c43      	adds	r3, r0, #1
 802d4b4:	d102      	bne.n	802d4bc <_kill_r+0x1c>
 802d4b6:	682b      	ldr	r3, [r5, #0]
 802d4b8:	b103      	cbz	r3, 802d4bc <_kill_r+0x1c>
 802d4ba:	6023      	str	r3, [r4, #0]
 802d4bc:	bd38      	pop	{r3, r4, r5, pc}
 802d4be:	bf00      	nop
 802d4c0:	2402b2a0 	.word	0x2402b2a0

0802d4c4 <_getpid_r>:
 802d4c4:	f7d6 bf3e 	b.w	8004344 <_getpid>

0802d4c8 <_init>:
 802d4c8:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802d4ca:	bf00      	nop
 802d4cc:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802d4ce:	bc08      	pop	{r3}
 802d4d0:	469e      	mov	lr, r3
 802d4d2:	4770      	bx	lr

0802d4d4 <_fini>:
 802d4d4:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 802d4d6:	bf00      	nop
 802d4d8:	bcf8      	pop	{r3, r4, r5, r6, r7}
 802d4da:	bc08      	pop	{r3}
 802d4dc:	469e      	mov	lr, r3
 802d4de:	4770      	bx	lr